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Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/dma/mv-xor.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt new file mode 100644 index 000000000000..7c6cb7fcecd2 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mv-xor.txt | |||
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1 | * Marvell XOR engines | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: Should be "marvell,orion-xor" | ||
5 | - reg: Should contain registers location and length (two sets) | ||
6 | the first set is the low registers, the second set the high | ||
7 | registers for the XOR engine. | ||
8 | - clocks: pointer to the reference clock | ||
9 | |||
10 | The DT node must also contains sub-nodes for each XOR channel that the | ||
11 | XOR engine has. Those sub-nodes have the following required | ||
12 | properties: | ||
13 | - interrupts: interrupt of the XOR channel | ||
14 | |||
15 | And the following optional properties: | ||
16 | - dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations | ||
17 | - dmacap,memset to indicate that the XOR channel is capable of memset operations | ||
18 | - dmacap,xor to indicate that the XOR channel is capable of xor operations | ||
19 | |||
20 | Example: | ||
21 | |||
22 | xor@d0060900 { | ||
23 | compatible = "marvell,orion-xor"; | ||
24 | reg = <0xd0060900 0x100 | ||
25 | 0xd0060b00 0x100>; | ||
26 | clocks = <&coreclk 0>; | ||
27 | status = "okay"; | ||
28 | |||
29 | xor00 { | ||
30 | interrupts = <51>; | ||
31 | dmacap,memcpy; | ||
32 | dmacap,xor; | ||
33 | }; | ||
34 | xor01 { | ||
35 | interrupts = <52>; | ||
36 | dmacap,memcpy; | ||
37 | dmacap,xor; | ||
38 | dmacap,memset; | ||
39 | }; | ||
40 | }; | ||