diff options
Diffstat (limited to 'Documentation/devicetree')
35 files changed, 1012 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt index 19078bf5cca8..ad031211b5b8 100644 --- a/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt | |||
@@ -4,7 +4,7 @@ Required properties: | |||
4 | - compatible: Should be "atmel,<chip>-aic" | 4 | - compatible: Should be "atmel,<chip>-aic" |
5 | - interrupt-controller: Identifies the node as an interrupt controller. | 5 | - interrupt-controller: Identifies the node as an interrupt controller. |
6 | - interrupt-parent: For single AIC system, it is an empty property. | 6 | - interrupt-parent: For single AIC system, it is an empty property. |
7 | - #interrupt-cells: The number of cells to define the interrupts. It sould be 3. | 7 | - #interrupt-cells: The number of cells to define the interrupts. It should be 3. |
8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). | 8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). |
9 | The second cell is used to specify flags: | 9 | The second cell is used to specify flags: |
10 | bits[3:0] trigger type and level flags: | 10 | bits[3:0] trigger type and level flags: |
diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 62eb8df1e08d..3dfb0c0384f5 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt | |||
@@ -42,7 +42,7 @@ Main node required properties: | |||
42 | 42 | ||
43 | Optional | 43 | Optional |
44 | - interrupts : Interrupt source of the parent interrupt controller on | 44 | - interrupts : Interrupt source of the parent interrupt controller on |
45 | secondary GICs, or VGIC maintainance interrupt on primary GIC (see | 45 | secondary GICs, or VGIC maintenance interrupt on primary GIC (see |
46 | below). | 46 | below). |
47 | 47 | ||
48 | - cpu-offset : per-cpu offset within the distributor and cpu interface | 48 | - cpu-offset : per-cpu offset within the distributor and cpu interface |
@@ -74,7 +74,7 @@ Required properties: | |||
74 | virtual interface control register base and size. The 2nd additional | 74 | virtual interface control register base and size. The 2nd additional |
75 | region is the GIC virtual cpu interface register base and size. | 75 | region is the GIC virtual cpu interface register base and size. |
76 | 76 | ||
77 | - interrupts : VGIC maintainance interrupt. | 77 | - interrupts : VGIC maintenance interrupt. |
78 | 78 | ||
79 | Example: | 79 | Example: |
80 | 80 | ||
diff --git a/Documentation/devicetree/bindings/arm/kirkwood.txt b/Documentation/devicetree/bindings/arm/kirkwood.txt new file mode 100644 index 000000000000..98cce9a653eb --- /dev/null +++ b/Documentation/devicetree/bindings/arm/kirkwood.txt | |||
@@ -0,0 +1,27 @@ | |||
1 | Marvell Kirkwood Platforms Device Tree Bindings | ||
2 | ----------------------------------------------- | ||
3 | |||
4 | Boards with a SoC of the Marvell Kirkwood | ||
5 | shall have the following property: | ||
6 | |||
7 | Required root node property: | ||
8 | |||
9 | compatible: must contain "marvell,kirkwood"; | ||
10 | |||
11 | In order to support the kirkwood cpufreq driver, there must be a node | ||
12 | cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave", | ||
13 | where the "powersave" clock is a gating clock used to switch the CPU | ||
14 | between the "cpu_clk" and the "ddrclk". | ||
15 | |||
16 | Example: | ||
17 | |||
18 | cpus { | ||
19 | #address-cells = <1>; | ||
20 | #size-cells = <0>; | ||
21 | |||
22 | cpu@0 { | ||
23 | device_type = "cpu"; | ||
24 | compatible = "marvell,sheeva-88SV131"; | ||
25 | clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; | ||
26 | clock-names = "cpu_clk", "ddrclk", "powersave"; | ||
27 | }; | ||
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index d0051a750587..f8288ea1b530 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt | |||
@@ -39,16 +39,16 @@ Boards: | |||
39 | - OMAP3 Tobi with Overo : Commercial expansion board with daughter board | 39 | - OMAP3 Tobi with Overo : Commercial expansion board with daughter board |
40 | compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3" | 40 | compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3" |
41 | 41 | ||
42 | - OMAP4 SDP : Software Developement Board | 42 | - OMAP4 SDP : Software Development Board |
43 | compatible = "ti,omap4-sdp", "ti,omap4430" | 43 | compatible = "ti,omap4-sdp", "ti,omap4430" |
44 | 44 | ||
45 | - OMAP4 PandaBoard : Low cost community board | 45 | - OMAP4 PandaBoard : Low cost community board |
46 | compatible = "ti,omap4-panda", "ti,omap4430" | 46 | compatible = "ti,omap4-panda", "ti,omap4430" |
47 | 47 | ||
48 | - OMAP3 EVM : Software Developement Board for OMAP35x, AM/DM37x | 48 | - OMAP3 EVM : Software Development Board for OMAP35x, AM/DM37x |
49 | compatible = "ti,omap3-evm", "ti,omap3" | 49 | compatible = "ti,omap3-evm", "ti,omap3" |
50 | 50 | ||
51 | - AM335X EVM : Software Developement Board for AM335x | 51 | - AM335X EVM : Software Development Board for AM335x |
52 | compatible = "ti,am335x-evm", "ti,am33xx", "ti,omap3" | 52 | compatible = "ti,am335x-evm", "ti,am33xx", "ti,omap3" |
53 | 53 | ||
54 | - AM335X Bone : Low cost community board | 54 | - AM335X Bone : Low cost community board |
diff --git a/Documentation/devicetree/bindings/arm/psci.txt b/Documentation/devicetree/bindings/arm/psci.txt new file mode 100644 index 000000000000..433afe9cb590 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/psci.txt | |||
@@ -0,0 +1,55 @@ | |||
1 | * Power State Coordination Interface (PSCI) | ||
2 | |||
3 | Firmware implementing the PSCI functions described in ARM document number | ||
4 | ARM DEN 0022A ("Power State Coordination Interface System Software on ARM | ||
5 | processors") can be used by Linux to initiate various CPU-centric power | ||
6 | operations. | ||
7 | |||
8 | Issue A of the specification describes functions for CPU suspend, hotplug | ||
9 | and migration of secure software. | ||
10 | |||
11 | Functions are invoked by trapping to the privilege level of the PSCI | ||
12 | firmware (specified as part of the binding below) and passing arguments | ||
13 | in a manner similar to that specified by AAPCS: | ||
14 | |||
15 | r0 => 32-bit Function ID / return value | ||
16 | {r1 - r3} => Parameters | ||
17 | |||
18 | Note that the immediate field of the trapping instruction must be set | ||
19 | to #0. | ||
20 | |||
21 | |||
22 | Main node required properties: | ||
23 | |||
24 | - compatible : Must be "arm,psci" | ||
25 | |||
26 | - method : The method of calling the PSCI firmware. Permitted | ||
27 | values are: | ||
28 | |||
29 | "smc" : SMC #0, with the register assignments specified | ||
30 | in this binding. | ||
31 | |||
32 | "hvc" : HVC #0, with the register assignments specified | ||
33 | in this binding. | ||
34 | |||
35 | Main node optional properties: | ||
36 | |||
37 | - cpu_suspend : Function ID for CPU_SUSPEND operation | ||
38 | |||
39 | - cpu_off : Function ID for CPU_OFF operation | ||
40 | |||
41 | - cpu_on : Function ID for CPU_ON operation | ||
42 | |||
43 | - migrate : Function ID for MIGRATE operation | ||
44 | |||
45 | |||
46 | Example: | ||
47 | |||
48 | psci { | ||
49 | compatible = "arm,psci"; | ||
50 | method = "smc"; | ||
51 | cpu_suspend = <0x95c10000>; | ||
52 | cpu_off = <0x95c10001>; | ||
53 | cpu_on = <0x95c10002>; | ||
54 | migrate = <0x95c10003>; | ||
55 | }; | ||
diff --git a/Documentation/devicetree/bindings/clock/prima2-clock.txt b/Documentation/devicetree/bindings/clock/prima2-clock.txt new file mode 100644 index 000000000000..5016979c0f78 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/prima2-clock.txt | |||
@@ -0,0 +1,73 @@ | |||
1 | * Clock bindings for CSR SiRFprimaII | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: Should be "sirf,prima2-clkc" | ||
5 | - reg: Address and length of the register set | ||
6 | - interrupts: Should contain clock controller interrupt | ||
7 | - #clock-cells: Should be <1> | ||
8 | |||
9 | The clock consumer should specify the desired clock by having the clock | ||
10 | ID in its "clocks" phandle cell. The following is a full list of prima2 | ||
11 | clocks and IDs. | ||
12 | |||
13 | Clock ID | ||
14 | --------------------------- | ||
15 | rtc 0 | ||
16 | osc 1 | ||
17 | pll1 2 | ||
18 | pll2 3 | ||
19 | pll3 4 | ||
20 | mem 5 | ||
21 | sys 6 | ||
22 | security 7 | ||
23 | dsp 8 | ||
24 | gps 9 | ||
25 | mf 10 | ||
26 | io 11 | ||
27 | cpu 12 | ||
28 | uart0 13 | ||
29 | uart1 14 | ||
30 | uart2 15 | ||
31 | tsc 16 | ||
32 | i2c0 17 | ||
33 | i2c1 18 | ||
34 | spi0 19 | ||
35 | spi1 20 | ||
36 | pwmc 21 | ||
37 | efuse 22 | ||
38 | pulse 23 | ||
39 | dmac0 24 | ||
40 | dmac1 25 | ||
41 | nand 26 | ||
42 | audio 27 | ||
43 | usp0 28 | ||
44 | usp1 29 | ||
45 | usp2 30 | ||
46 | vip 31 | ||
47 | gfx 32 | ||
48 | mm 33 | ||
49 | lcd 34 | ||
50 | vpp 35 | ||
51 | mmc01 36 | ||
52 | mmc23 37 | ||
53 | mmc45 38 | ||
54 | usbpll 39 | ||
55 | usb0 40 | ||
56 | usb1 41 | ||
57 | |||
58 | Examples: | ||
59 | |||
60 | clks: clock-controller@88000000 { | ||
61 | compatible = "sirf,prima2-clkc"; | ||
62 | reg = <0x88000000 0x1000>; | ||
63 | interrupts = <3>; | ||
64 | #clock-cells = <1>; | ||
65 | }; | ||
66 | |||
67 | i2c0: i2c@b00e0000 { | ||
68 | cell-index = <0>; | ||
69 | compatible = "sirf,prima2-i2c"; | ||
70 | reg = <0xb00e0000 0x10000>; | ||
71 | interrupts = <24>; | ||
72 | clocks = <&clks 17>; | ||
73 | }; | ||
diff --git a/Documentation/devicetree/bindings/drm/exynos/g2d.txt b/Documentation/devicetree/bindings/drm/exynos/g2d.txt new file mode 100644 index 000000000000..1eb124d35a99 --- /dev/null +++ b/Documentation/devicetree/bindings/drm/exynos/g2d.txt | |||
@@ -0,0 +1,22 @@ | |||
1 | Samsung 2D Graphic Accelerator using DRM frame work | ||
2 | |||
3 | Samsung FIMG2D is a graphics 2D accelerator which supports Bit Block Transfer. | ||
4 | We set the drawing-context registers for configuring rendering parameters and | ||
5 | then start rendering. | ||
6 | This driver is for SOCs which contain G2D IPs with version 4.1. | ||
7 | |||
8 | Required properties: | ||
9 | -compatible: | ||
10 | should be "samsung,exynos-g2d-41". | ||
11 | -reg: | ||
12 | physical base address of the controller and length | ||
13 | of memory mapped region. | ||
14 | -interrupts: | ||
15 | interrupt combiner values. | ||
16 | |||
17 | Example: | ||
18 | g2d { | ||
19 | compatible = "samsung,exynos-g2d-41"; | ||
20 | reg = <0x10850000 0x1000>; | ||
21 | interrupts = <0 91 0>; | ||
22 | }; | ||
diff --git a/Documentation/devicetree/bindings/i2c/ina209.txt b/Documentation/devicetree/bindings/i2c/ina209.txt new file mode 100644 index 000000000000..9dd2bee80840 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/ina209.txt | |||
@@ -0,0 +1,18 @@ | |||
1 | ina209 properties | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: Must be "ti,ina209" | ||
5 | - reg: I2C address | ||
6 | |||
7 | Optional properties: | ||
8 | |||
9 | - shunt-resistor | ||
10 | Shunt resistor value in micro-Ohm | ||
11 | |||
12 | Example: | ||
13 | |||
14 | temp-sensor@4c { | ||
15 | compatible = "ti,ina209"; | ||
16 | reg = <0x4c>; | ||
17 | shunt-resistor = <5000>; | ||
18 | }; | ||
diff --git a/Documentation/devicetree/bindings/i2c/max6697.txt b/Documentation/devicetree/bindings/i2c/max6697.txt new file mode 100644 index 000000000000..5f793998e4a4 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/max6697.txt | |||
@@ -0,0 +1,64 @@ | |||
1 | max6697 properties | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: | ||
5 | Should be one of | ||
6 | maxim,max6581 | ||
7 | maxim,max6602 | ||
8 | maxim,max6622 | ||
9 | maxim,max6636 | ||
10 | maxim,max6689 | ||
11 | maxim,max6693 | ||
12 | maxim,max6694 | ||
13 | maxim,max6697 | ||
14 | maxim,max6698 | ||
15 | maxim,max6699 | ||
16 | - reg: I2C address | ||
17 | |||
18 | Optional properties: | ||
19 | |||
20 | - smbus-timeout-disable | ||
21 | Set to disable SMBus timeout. If not specified, SMBus timeout will be | ||
22 | enabled. | ||
23 | - extended-range-enable | ||
24 | Only valid for MAX6581. Set to enable extended temperature range. | ||
25 | Extended temperature will be disabled if not specified. | ||
26 | - beta-compensation-enable | ||
27 | Only valid for MAX6693 and MX6694. Set to enable beta compensation on | ||
28 | remote temperature channel 1. | ||
29 | Beta compensation will be disabled if not specified. | ||
30 | - alert-mask | ||
31 | Alert bit mask. Alert disabled for bits set. | ||
32 | Select bit 0 for local temperature, bit 1..7 for remote temperatures. | ||
33 | If not specified, alert will be enabled for all channels. | ||
34 | - over-temperature-mask | ||
35 | Over-temperature bit mask. Over-temperature reporting disabled for | ||
36 | bits set. | ||
37 | Select bit 0 for local temperature, bit 1..7 for remote temperatures. | ||
38 | If not specified, over-temperature reporting will be enabled for all | ||
39 | channels. | ||
40 | - resistance-cancellation | ||
41 | Boolean for all chips other than MAX6581. Set to enable resistance | ||
42 | cancellation on remote temperature channel 1. | ||
43 | For MAX6581, resistance cancellation enabled for all channels if | ||
44 | specified as boolean, otherwise as per bit mask specified. | ||
45 | Only supported for remote temperatures (bit 1..7). | ||
46 | If not specified, resistance cancellation will be disabled for all | ||
47 | channels. | ||
48 | - transistor-ideality | ||
49 | For MAX6581 only. Two values; first is bit mask, second is ideality | ||
50 | select value as per MAX6581 data sheet. Select bit 1..7 for remote | ||
51 | channels. | ||
52 | Transistor ideality will be initialized to default (1.008) if not | ||
53 | specified. | ||
54 | |||
55 | Example: | ||
56 | |||
57 | temp-sensor@1a { | ||
58 | compatible = "maxim,max6697"; | ||
59 | reg = <0x1a>; | ||
60 | smbus-timeout-disable; | ||
61 | resistance-cancellation; | ||
62 | alert-mask = <0x72>; | ||
63 | over-temperature-mask = <0x7f>; | ||
64 | }; | ||
diff --git a/Documentation/devicetree/bindings/input/imx-keypad.txt b/Documentation/devicetree/bindings/input/imx-keypad.txt new file mode 100644 index 000000000000..2ebaf7d26843 --- /dev/null +++ b/Documentation/devicetree/bindings/input/imx-keypad.txt | |||
@@ -0,0 +1,53 @@ | |||
1 | * Freescale i.MX Keypad Port(KPP) device tree bindings | ||
2 | |||
3 | The KPP is designed to interface with a keypad matrix with 2-point contact | ||
4 | or 3-point contact keys. The KPP is designed to simplify the software task | ||
5 | of scanning a keypad matrix. The KPP is capable of detecting, debouncing, | ||
6 | and decoding one or multiple keys pressed simultaneously on a keypad. | ||
7 | |||
8 | Required SoC Specific Properties: | ||
9 | - compatible: Should be "fsl,<soc>-kpp". | ||
10 | |||
11 | - reg: Physical base address of the KPP and length of memory mapped | ||
12 | region. | ||
13 | |||
14 | - interrupts: The KPP interrupt number to the CPU(s). | ||
15 | |||
16 | - clocks: The clock provided by the SoC to the KPP. Some SoCs use dummy | ||
17 | clock(The clock for the KPP is provided by the SoCs automatically). | ||
18 | |||
19 | Required Board Specific Properties: | ||
20 | - pinctrl-names: The definition can be found at | ||
21 | pinctrl/pinctrl-bindings.txt. | ||
22 | |||
23 | - pinctrl-0: The definition can be found at | ||
24 | pinctrl/pinctrl-bindings.txt. | ||
25 | |||
26 | - linux,keymap: The definition can be found at | ||
27 | bindings/input/matrix-keymap.txt. | ||
28 | |||
29 | Example: | ||
30 | kpp: kpp@73f94000 { | ||
31 | compatible = "fsl,imx51-kpp", "fsl,imx21-kpp"; | ||
32 | reg = <0x73f94000 0x4000>; | ||
33 | interrupts = <60>; | ||
34 | clocks = <&clks 0>; | ||
35 | pinctrl-names = "default"; | ||
36 | pinctrl-0 = <&pinctrl_kpp_1>; | ||
37 | linux,keymap = <0x00000067 /* KEY_UP */ | ||
38 | 0x0001006c /* KEY_DOWN */ | ||
39 | 0x00020072 /* KEY_VOLUMEDOWN */ | ||
40 | 0x00030066 /* KEY_HOME */ | ||
41 | 0x0100006a /* KEY_RIGHT */ | ||
42 | 0x01010069 /* KEY_LEFT */ | ||
43 | 0x0102001c /* KEY_ENTER */ | ||
44 | 0x01030073 /* KEY_VOLUMEUP */ | ||
45 | 0x02000040 /* KEY_F6 */ | ||
46 | 0x02010042 /* KEY_F8 */ | ||
47 | 0x02020043 /* KEY_F9 */ | ||
48 | 0x02030044 /* KEY_F10 */ | ||
49 | 0x0300003b /* KEY_F1 */ | ||
50 | 0x0301003c /* KEY_F2 */ | ||
51 | 0x0302003d /* KEY_F3 */ | ||
52 | 0x03030074>; /* KEY_POWER */ | ||
53 | }; | ||
diff --git a/Documentation/devicetree/bindings/input/lpc32xx-key.txt b/Documentation/devicetree/bindings/input/lpc32xx-key.txt index 31afd5014c48..bcf62f856358 100644 --- a/Documentation/devicetree/bindings/input/lpc32xx-key.txt +++ b/Documentation/devicetree/bindings/input/lpc32xx-key.txt | |||
@@ -1,19 +1,22 @@ | |||
1 | NXP LPC32xx Key Scan Interface | 1 | NXP LPC32xx Key Scan Interface |
2 | 2 | ||
3 | This binding is based on the matrix-keymap binding with the following | ||
4 | changes: | ||
5 | |||
3 | Required Properties: | 6 | Required Properties: |
4 | - compatible: Should be "nxp,lpc3220-key" | 7 | - compatible: Should be "nxp,lpc3220-key" |
5 | - reg: Physical base address of the controller and length of memory mapped | 8 | - reg: Physical base address of the controller and length of memory mapped |
6 | region. | 9 | region. |
7 | - interrupts: The interrupt number to the cpu. | 10 | - interrupts: The interrupt number to the cpu. |
8 | - keypad,num-rows: Number of rows and columns, e.g. 1: 1x1, 6: 6x6 | ||
9 | - keypad,num-columns: Must be equal to keypad,num-rows since LPC32xx only | ||
10 | supports square matrices | ||
11 | - nxp,debounce-delay-ms: Debounce delay in ms | 11 | - nxp,debounce-delay-ms: Debounce delay in ms |
12 | - nxp,scan-delay-ms: Repeated scan period in ms | 12 | - nxp,scan-delay-ms: Repeated scan period in ms |
13 | - linux,keymap: the key-code to be reported when the key is pressed | 13 | - linux,keymap: the key-code to be reported when the key is pressed |
14 | and released, see also | 14 | and released, see also |
15 | Documentation/devicetree/bindings/input/matrix-keymap.txt | 15 | Documentation/devicetree/bindings/input/matrix-keymap.txt |
16 | 16 | ||
17 | Note: keypad,num-rows and keypad,num-columns are required, and must be equal | ||
18 | since LPC32xx only supports square matrices | ||
19 | |||
17 | Example: | 20 | Example: |
18 | 21 | ||
19 | key@40050000 { | 22 | key@40050000 { |
diff --git a/Documentation/devicetree/bindings/input/matrix-keymap.txt b/Documentation/devicetree/bindings/input/matrix-keymap.txt index 3cd8b98ccd2d..c54919fad17e 100644 --- a/Documentation/devicetree/bindings/input/matrix-keymap.txt +++ b/Documentation/devicetree/bindings/input/matrix-keymap.txt | |||
@@ -9,6 +9,12 @@ Required properties: | |||
9 | row << 24 | column << 16 | key-code | 9 | row << 24 | column << 16 | key-code |
10 | 10 | ||
11 | Optional properties: | 11 | Optional properties: |
12 | Properties for the number of rows and columns are optional because some | ||
13 | drivers will use fixed values for these. | ||
14 | - keypad,num-rows: Number of row lines connected to the keypad controller. | ||
15 | - keypad,num-columns: Number of column lines connected to the keypad | ||
16 | controller. | ||
17 | |||
12 | Some users of this binding might choose to specify secondary keymaps for | 18 | Some users of this binding might choose to specify secondary keymaps for |
13 | cases where there is a modifier key such as a Fn key. Proposed names | 19 | cases where there is a modifier key such as a Fn key. Proposed names |
14 | for said properties are "linux,fn-keymap" or with another descriptive | 20 | for said properties are "linux,fn-keymap" or with another descriptive |
@@ -17,3 +23,5 @@ word for the modifier other from "Fn". | |||
17 | Example: | 23 | Example: |
18 | linux,keymap = < 0x00030012 | 24 | linux,keymap = < 0x00030012 |
19 | 0x0102003a >; | 25 | 0x0102003a >; |
26 | keypad,num-rows = <2>; | ||
27 | keypad,num-columns = <8>; | ||
diff --git a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt index 72683be6de35..2995fae7ee47 100644 --- a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt +++ b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt | |||
@@ -1,7 +1,18 @@ | |||
1 | * Tegra keyboard controller | 1 | * Tegra keyboard controller |
2 | The key controller has maximum 24 pins to make matrix keypad. Any pin | ||
3 | can be configured as row or column. The maximum column pin can be 8 | ||
4 | and maximum row pins can be 16 for Tegra20/Tegra30. | ||
2 | 5 | ||
3 | Required properties: | 6 | Required properties: |
4 | - compatible: "nvidia,tegra20-kbc" | 7 | - compatible: "nvidia,tegra20-kbc" |
8 | - reg: Register base address of KBC. | ||
9 | - interrupts: Interrupt number for the KBC. | ||
10 | - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an | ||
11 | array of pin numbers which is used as rows. | ||
12 | - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an | ||
13 | array of pin numbers which is used as column. | ||
14 | - linux,keymap: The keymap for keys as described in the binding document | ||
15 | devicetree/bindings/input/matrix-keymap.txt. | ||
5 | 16 | ||
6 | Optional properties, in addition to those specified by the shared | 17 | Optional properties, in addition to those specified by the shared |
7 | matrix-keyboard bindings: | 18 | matrix-keyboard bindings: |
@@ -19,5 +30,16 @@ Example: | |||
19 | keyboard: keyboard { | 30 | keyboard: keyboard { |
20 | compatible = "nvidia,tegra20-kbc"; | 31 | compatible = "nvidia,tegra20-kbc"; |
21 | reg = <0x7000e200 0x100>; | 32 | reg = <0x7000e200 0x100>; |
33 | interrupts = <0 85 0x04>; | ||
22 | nvidia,ghost-filter; | 34 | nvidia,ghost-filter; |
35 | nvidia,debounce-delay-ms = <640>; | ||
36 | nvidia,kbc-row-pins = <0 1 2>; /* pin 0, 1, 2 as rows */ | ||
37 | nvidia,kbc-col-pins = <11 12 13>; /* pin 11, 12, 13 as columns */ | ||
38 | linux,keymap = <0x00000074 | ||
39 | 0x00010067 | ||
40 | 0x00020066 | ||
41 | 0x01010068 | ||
42 | 0x02000069 | ||
43 | 0x02010070 | ||
44 | 0x02020071>; | ||
23 | }; | 45 | }; |
diff --git a/Documentation/devicetree/bindings/input/omap-keypad.txt b/Documentation/devicetree/bindings/input/omap-keypad.txt index f2fa5e10493d..34ed1c60ff95 100644 --- a/Documentation/devicetree/bindings/input/omap-keypad.txt +++ b/Documentation/devicetree/bindings/input/omap-keypad.txt | |||
@@ -6,19 +6,16 @@ A key can be placed at each intersection of a unique row and a unique column. | |||
6 | The keypad controller can sense a key-press and key-release and report the | 6 | The keypad controller can sense a key-press and key-release and report the |
7 | event using a interrupt to the cpu. | 7 | event using a interrupt to the cpu. |
8 | 8 | ||
9 | This binding is based on the matrix-keymap binding with the following | ||
10 | changes: | ||
11 | |||
12 | keypad,num-rows and keypad,num-columns are required. | ||
13 | |||
9 | Required SoC Specific Properties: | 14 | Required SoC Specific Properties: |
10 | - compatible: should be one of the following | 15 | - compatible: should be one of the following |
11 | - "ti,omap4-keypad": For controllers compatible with omap4 keypad | 16 | - "ti,omap4-keypad": For controllers compatible with omap4 keypad |
12 | controller. | 17 | controller. |
13 | 18 | ||
14 | Required Board Specific Properties, in addition to those specified by | ||
15 | the shared matrix-keyboard bindings: | ||
16 | - keypad,num-rows: Number of row lines connected to the keypad | ||
17 | controller. | ||
18 | |||
19 | - keypad,num-columns: Number of column lines connected to the | ||
20 | keypad controller. | ||
21 | |||
22 | Optional Properties specific to linux: | 19 | Optional Properties specific to linux: |
23 | - linux,keypad-no-autorepeat: do no enable autorepeat feature. | 20 | - linux,keypad-no-autorepeat: do no enable autorepeat feature. |
24 | 21 | ||
diff --git a/Documentation/devicetree/bindings/input/tca8418_keypad.txt b/Documentation/devicetree/bindings/input/tca8418_keypad.txt index 2a1538f0053f..255185009167 100644 --- a/Documentation/devicetree/bindings/input/tca8418_keypad.txt +++ b/Documentation/devicetree/bindings/input/tca8418_keypad.txt | |||
@@ -1,8 +1,10 @@ | |||
1 | This binding is based on the matrix-keymap binding with the following | ||
2 | changes: | ||
3 | |||
4 | keypad,num-rows and keypad,num-columns are required. | ||
1 | 5 | ||
2 | Required properties: | 6 | Required properties: |
3 | - compatible: "ti,tca8418" | 7 | - compatible: "ti,tca8418" |
4 | - reg: the I2C address | 8 | - reg: the I2C address |
5 | - interrupts: IRQ line number, should trigger on falling edge | 9 | - interrupts: IRQ line number, should trigger on falling edge |
6 | - keypad,num-rows: The number of rows | ||
7 | - keypad,num-columns: The number of columns | ||
8 | - linux,keymap: Keys definitions, see keypad-matrix. | 10 | - linux,keymap: Keys definitions, see keypad-matrix. |
diff --git a/Documentation/devicetree/bindings/gpio/leds-ns2.txt b/Documentation/devicetree/bindings/leds/leds-ns2.txt index aef3aca34d2d..aef3aca34d2d 100644 --- a/Documentation/devicetree/bindings/gpio/leds-ns2.txt +++ b/Documentation/devicetree/bindings/leds/leds-ns2.txt | |||
diff --git a/Documentation/devicetree/bindings/mfd/tps6507x.txt b/Documentation/devicetree/bindings/mfd/tps6507x.txt new file mode 100755 index 000000000000..8fffa3c5ed40 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/tps6507x.txt | |||
@@ -0,0 +1,91 @@ | |||
1 | TPS6507x Power Management Integrated Circuit | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: "ti,tps6507x" | ||
5 | - reg: I2C slave address | ||
6 | - regulators: This is the list of child nodes that specify the regulator | ||
7 | initialization data for defined regulators. Not all regulators for the | ||
8 | given device need to be present. The definition for each of these nodes | ||
9 | is defined using the standard binding for regulators found at | ||
10 | Documentation/devicetree/bindings/regulator/regulator.txt. | ||
11 | The regulator is matched with the regulator-compatible. | ||
12 | |||
13 | The valid regulator-compatible values are: | ||
14 | tps6507x: vdcdc1, vdcdc2, vdcdc3, vldo1, vldo2 | ||
15 | - xxx-supply: Input voltage supply regulator. | ||
16 | These entries are required if regulators are enabled for a device. | ||
17 | Missing of these properties can cause the regulator registration | ||
18 | fails. | ||
19 | If some of input supply is powered through battery or always-on | ||
20 | supply then also it is require to have these parameters with proper | ||
21 | node handle of always on power supply. | ||
22 | tps6507x: | ||
23 | vindcdc1_2-supply: VDCDC1 and VDCDC2 input. | ||
24 | vindcdc3-supply : VDCDC3 input. | ||
25 | vldo1_2-supply : VLDO1 and VLDO2 input. | ||
26 | |||
27 | Regulator Optional properties: | ||
28 | - defdcdc_default: It's property of DCDC2 and DCDC3 regulators. | ||
29 | 0: If defdcdc pin of DCDC2/DCDC3 is pulled to GND. | ||
30 | 1: If defdcdc pin of DCDC2/DCDC3 is driven HIGH. | ||
31 | If this property is not defined, it defaults to 0 (not enabled). | ||
32 | |||
33 | Example: | ||
34 | |||
35 | pmu: tps6507x@48 { | ||
36 | compatible = "ti,tps6507x"; | ||
37 | reg = <0x48>; | ||
38 | |||
39 | vindcdc1_2-supply = <&vbat>; | ||
40 | vindcdc3-supply = <...>; | ||
41 | vinldo1_2-supply = <...>; | ||
42 | |||
43 | regulators { | ||
44 | #address-cells = <1>; | ||
45 | #size-cells = <0>; | ||
46 | |||
47 | vdcdc1_reg: regulator@0 { | ||
48 | regulator-compatible = "VDCDC1"; | ||
49 | reg = <0>; | ||
50 | regulator-min-microvolt = <3150000>; | ||
51 | regulator-max-microvolt = <3450000>; | ||
52 | regulator-always-on; | ||
53 | regulator-boot-on; | ||
54 | }; | ||
55 | vdcdc2_reg: regulator@1 { | ||
56 | regulator-compatible = "VDCDC2"; | ||
57 | reg = <1>; | ||
58 | regulator-min-microvolt = <1710000>; | ||
59 | regulator-max-microvolt = <3450000>; | ||
60 | regulator-always-on; | ||
61 | regulator-boot-on; | ||
62 | defdcdc_default = <1>; | ||
63 | }; | ||
64 | vdcdc3_reg: regulator@2 { | ||
65 | regulator-compatible = "VDCDC3"; | ||
66 | reg = <2>; | ||
67 | regulator-min-microvolt = <950000> | ||
68 | regulator-max-microvolt = <1350000>; | ||
69 | regulator-always-on; | ||
70 | regulator-boot-on; | ||
71 | defdcdc_default = <1>; | ||
72 | }; | ||
73 | ldo1_reg: regulator@3 { | ||
74 | regulator-compatible = "LDO1"; | ||
75 | reg = <3>; | ||
76 | regulator-min-microvolt = <1710000>; | ||
77 | regulator-max-microvolt = <1890000>; | ||
78 | regulator-always-on; | ||
79 | regulator-boot-on; | ||
80 | }; | ||
81 | ldo2_reg: regulator@4 { | ||
82 | regulator-compatible = "LDO2"; | ||
83 | reg = <4>; | ||
84 | regulator-min-microvolt = <1140000>; | ||
85 | regulator-max-microvolt = <1320000>; | ||
86 | regulator-always-on; | ||
87 | regulator-boot-on; | ||
88 | }; | ||
89 | }; | ||
90 | |||
91 | }; | ||
diff --git a/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt b/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt index cb4291e3b1d1..a5bdff400002 100644 --- a/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt +++ b/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt | |||
@@ -1,7 +1,7 @@ | |||
1 | * DMA Engine. | 1 | * DMA Engine. |
2 | 2 | ||
3 | The Octeon DMA Engine transfers between the Boot Bus and main memory. | 3 | The Octeon DMA Engine transfers between the Boot Bus and main memory. |
4 | The DMA Engine will be refered to by phandle by any device that is | 4 | The DMA Engine will be referred to by phandle by any device that is |
5 | connected to it. | 5 | connected to it. |
6 | 6 | ||
7 | Properties: | 7 | Properties: |
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt index 792768953330..6d1c0988cfc7 100644 --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt | |||
@@ -4,18 +4,18 @@ | |||
4 | The Synopsis designware mobile storage host controller is used to interface | 4 | The Synopsis designware mobile storage host controller is used to interface |
5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
6 | differences between the core Synopsis dw mshc controller properties described | 6 | differences between the core Synopsis dw mshc controller properties described |
7 | by synposis-dw-mshc.txt and the properties used by the Samsung Exynos specific | 7 | by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific |
8 | extensions to the Synopsis Designware Mobile Storage Host Controller. | 8 | extensions to the Synopsis Designware Mobile Storage Host Controller. |
9 | 9 | ||
10 | Required Properties: | 10 | Required Properties: |
11 | 11 | ||
12 | * compatible: should be | 12 | * compatible: should be |
13 | - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210 | 13 | - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210 |
14 | specific extentions. | 14 | specific extensions. |
15 | - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412 | 15 | - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412 |
16 | specific extentions. | 16 | specific extensions. |
17 | - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250 | 17 | - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250 |
18 | specific extentions. | 18 | specific extensions. |
19 | 19 | ||
20 | * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface | 20 | * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface |
21 | unit (ciu) clock. This property is applicable only for Exynos5 SoC's and | 21 | unit (ciu) clock. This property is applicable only for Exynos5 SoC's and |
diff --git a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt index 97e9e315400d..3b3a1ee055ff 100644 --- a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt | |||
@@ -55,5 +55,5 @@ Example: | |||
55 | }; | 55 | }; |
56 | 56 | ||
57 | Note: This example shows both SoC specific and board specific properties | 57 | Note: This example shows both SoC specific and board specific properties |
58 | in a single device node. The properties can be actually be seperated | 58 | in a single device node. The properties can be actually be separated |
59 | into SoC specific node and board specific node. | 59 | into SoC specific node and board specific node. |
diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt index 6ddd0286a9b7..ecfdf756d10f 100644 --- a/Documentation/devicetree/bindings/net/cpsw.txt +++ b/Documentation/devicetree/bindings/net/cpsw.txt | |||
@@ -24,6 +24,8 @@ Required properties: | |||
24 | Optional properties: | 24 | Optional properties: |
25 | - ti,hwmods : Must be "cpgmac0" | 25 | - ti,hwmods : Must be "cpgmac0" |
26 | - no_bd_ram : Must be 0 or 1 | 26 | - no_bd_ram : Must be 0 or 1 |
27 | - dual_emac : Specifies Switch to act as Dual EMAC | ||
28 | - dual_emac_res_vlan : Specifies VID to be used to segregate the ports | ||
27 | 29 | ||
28 | Note: "ti,hwmods" field is used to fetch the base address and irq | 30 | Note: "ti,hwmods" field is used to fetch the base address and irq |
29 | resources from TI, omap hwmod data base during device registration. | 31 | resources from TI, omap hwmod data base during device registration. |
diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt new file mode 100644 index 000000000000..dff0e5f995e2 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | |||
@@ -0,0 +1,60 @@ | |||
1 | * Allwinner A1X Pin Controller | ||
2 | |||
3 | The pins controlled by sunXi pin controller are organized in banks, | ||
4 | each bank has 32 pins. Each pin has 7 multiplexing functions, with | ||
5 | the first two functions being GPIO in and out. The configuration on | ||
6 | the pins includes drive strength and pull-up. | ||
7 | |||
8 | Required properties: | ||
9 | - compatible: "allwinner,<soc>-pinctrl". Supported SoCs for now are: | ||
10 | sun5i-a13. | ||
11 | - reg: Should contain the register physical address and length for the | ||
12 | pin controller. | ||
13 | |||
14 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
15 | common pinctrl bindings used by client devices. | ||
16 | |||
17 | A pinctrl node should contain at least one subnodes representing the | ||
18 | pinctrl groups available on the machine. Each subnode will list the | ||
19 | pins it needs, and how they should be configured, with regard to muxer | ||
20 | configuration, drive strength and pullups. If one of these options is | ||
21 | not set, its actual value will be unspecified. | ||
22 | |||
23 | Required subnode-properties: | ||
24 | |||
25 | - allwinner,pins: List of strings containing the pin name. | ||
26 | - allwinner,function: Function to mux the pins listed above to. | ||
27 | |||
28 | Optional subnode-properties: | ||
29 | - allwinner,drive: Integer. Represents the current sent to the pin | ||
30 | 0: 10 mA | ||
31 | 1: 20 mA | ||
32 | 2: 30 mA | ||
33 | 3: 40 mA | ||
34 | - allwinner,pull: Integer. | ||
35 | 0: No resistor | ||
36 | 1: Pull-up resistor | ||
37 | 2: Pull-down resistor | ||
38 | |||
39 | Examples: | ||
40 | |||
41 | pinctrl@01c20800 { | ||
42 | compatible = "allwinner,sun5i-a13-pinctrl"; | ||
43 | reg = <0x01c20800 0x400>; | ||
44 | #address-cells = <1>; | ||
45 | #size-cells = <0>; | ||
46 | |||
47 | uart1_pins_a: uart1@0 { | ||
48 | allwinner,pins = "PE10", "PE11"; | ||
49 | allwinner,function = "uart1"; | ||
50 | allwinner,drive = <0>; | ||
51 | allwinner,pull = <0>; | ||
52 | }; | ||
53 | |||
54 | uart1_pins_b: uart1@1 { | ||
55 | allwinner,pins = "PG3", "PG4"; | ||
56 | allwinner,function = "uart1"; | ||
57 | allwinner,drive = <0>; | ||
58 | allwinner,pull = <0>; | ||
59 | }; | ||
60 | }; | ||
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt new file mode 100644 index 000000000000..e204d009f16c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt | |||
@@ -0,0 +1,120 @@ | |||
1 | NVIDIA Tegra114 pinmux controller | ||
2 | |||
3 | The Tegra114 pinctrl binding is very similar to the Tegra20 and Tegra30 | ||
4 | pinctrl binding, as described in nvidia,tegra20-pinmux.txt and | ||
5 | nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as | ||
6 | a baseline, and only documents the differences between the two bindings. | ||
7 | |||
8 | Required properties: | ||
9 | - compatible: "nvidia,tegra114-pinmux" | ||
10 | - reg: Should contain the register physical address and length for each of | ||
11 | the pad control and mux registers. The first bank of address must be the | ||
12 | driver strength pad control register address and second bank address must | ||
13 | be pinmux register address. | ||
14 | |||
15 | Tegra114 adds the following optional properties for pin configuration subnodes: | ||
16 | - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes. | ||
17 | - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes. | ||
18 | - nvidia,lock: Integer. Lock the pin configuration against further changes | ||
19 | until reset. 0: no, 1: yes. | ||
20 | - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes. | ||
21 | - nvidia,rcv-sel: Integer. Select VIL/VIH receivers. 0: normal, 1: high. | ||
22 | - nvidia,drive-type: Integer. Valid range 0...3. | ||
23 | |||
24 | As with Tegra20 and Terga30, see the Tegra TRM for complete details regarding | ||
25 | which groups support which functionality. | ||
26 | |||
27 | Valid values for pin and group names are: | ||
28 | |||
29 | per-pin mux groups: | ||
30 | |||
31 | These all support nvidia,function, nvidia,tristate, nvidia,pull, | ||
32 | nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain, | ||
33 | nvidia,io-reset and nvidia,rcv-sel. | ||
34 | |||
35 | ulpi_data0_po1, ulpi_data1_po2, ulpi_data2_po3, ulpi_data3_po4, | ||
36 | ulpi_data4_po5, ulpi_data5_po6, ulpi_data6_po7, ulpi_data7_po0, | ||
37 | ulpi_clk_py0, ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3, dap3_fs_pp0, | ||
38 | dap3_din_pp1, dap3_dout_pp2, dap3_sclk_pp3, pv0, pv1, sdmmc1_clk_pz0, | ||
39 | sdmmc1_cmd_pz1, sdmmc1_dat3_py4, sdmmc1_dat2_py5, sdmmc1_dat1_py6, | ||
40 | sdmmc1_dat0_py7, clk2_out_pw5, clk2_req_pcc5, hdmi_int_pn7, ddc_scl_pv4, | ||
41 | ddc_sda_pv5, uart2_rxd_pc3, uart2_txd_pc2, uart2_rts_n_pj6, | ||
42 | uart2_cts_n_pj5, uart3_txd_pw6, uart3_rxd_pw7, uart3_cts_n_pa1, | ||
43 | uart3_rts_n_pc0, pu0, pu1, pu2, pu3, pu4, pu5, pu6, gen1_i2c_sda_pc5, | ||
44 | gen1_i2c_scl_pc4, dap4_fs_pp4, dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, | ||
45 | clk3_out_pee0, clk3_req_pee1, gmi_wp_n_pc7, gmi_iordy_pi5, gmi_wait_pi7, | ||
46 | gmi_adv_n_pk0, gmi_clk_pk1, gmi_cs0_n_pj0, gmi_cs1_n_pj2, gmi_cs2_n_pk3, | ||
47 | gmi_cs3_n_pk4, gmi_cs4_n_pk2, gmi_cs6_n_pi3, gmi_cs7_n_pi6, gmi_ad0_pg0, | ||
48 | gmi_ad1_pg1, gmi_ad2_pg2, gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5, | ||
49 | gmi_ad6_pg6, gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2, | ||
50 | gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6, gmi_ad15_ph7, | ||
51 | gmi_a16_pj7, gmi_a17_pb0, gmi_a18_pb1, gmi_a19_pk7, gmi_wr_n_pi0, | ||
52 | gmi_oe_n_pi1, gmi_dqs_p_pj3, gmi_rst_n_pi4, gen2_i2c_scl_pt5, | ||
53 | gen2_i2c_sda_pt6, sdmmc4_clk_pcc4, sdmmc4_cmd_pt7, sdmmc4_dat0_paa0, | ||
54 | sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3, sdmmc4_dat4_paa4, | ||
55 | sdmmc4_dat5_paa5, sdmmc4_dat6_paa6, sdmmc4_dat7_paa7, cam_mclk_pcc0, | ||
56 | pcc1, pbb0, cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6, | ||
57 | pbb7, pcc2, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, kb_row0_pr0, kb_row1_pr1, | ||
58 | kb_row2_pr2, kb_row3_pr3, kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, | ||
59 | kb_row7_pr7, kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_col0_pq0, | ||
60 | kb_col1_pq1, kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5, | ||
61 | kb_col6_pq6, kb_col7_pq7, clk_32k_out_pa0, sys_clk_req_pz5, core_pwr_req, | ||
62 | cpu_pwr_req, pwr_int_n, owr, dap1_fs_pn0, dap1_din_pn1, dap1_dout_pn2, | ||
63 | dap1_sclk_pn3, clk1_req_pee2, clk1_out_pw4, spdif_in_pk6, spdif_out_pk5, | ||
64 | dap2_fs_pa2, dap2_din_pa4, dap2_dout_pa5, dap2_sclk_pa3, dvfs_pwm_px0, | ||
65 | gpio_x1_aud_px1, gpio_x3_aud_px3, dvfs_clk_px2, gpio_x4_aud_px4, | ||
66 | gpio_x5_aud_px5, gpio_x6_aud_px6, gpio_x7_aud_px7, sdmmc3_clk_pa6, | ||
67 | sdmmc3_cmd_pa7, sdmmc3_dat0_pb7, sdmmc3_dat1_pb6, sdmmc3_dat2_pb5, | ||
68 | sdmmc3_dat3_pb4, hdmi_cec_pee3, sdmmc1_wp_n_pv3, sdmmc3_cd_n_pv2, | ||
69 | gpio_w2_aud_pw2, gpio_w3_aud_pw3, usb_vbus_en0_pn4, usb_vbus_en1_pn5, | ||
70 | sdmmc3_clk_lb_in_pee5, sdmmc3_clk_lb_out_pee4, reset_out_n. | ||
71 | |||
72 | drive groups: | ||
73 | |||
74 | These all support nvidia,pull-down-strength, nvidia,pull-up-strength, | ||
75 | nvidia,slew-rate-rising, nvidia,slew-rate-falling. Most but not all | ||
76 | support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode | ||
77 | and nvidia,drive-type. | ||
78 | |||
79 | ao1, ao2, at1, at2, at3, at4, at5, cdev1, cdev2, dap1, dap2, dap3, dap4, | ||
80 | dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg, | ||
81 | gmh, owr, uda. | ||
82 | |||
83 | Example: | ||
84 | |||
85 | pinmux: pinmux { | ||
86 | compatible = "nvidia,tegra114-pinmux"; | ||
87 | reg = <0x70000868 0x148 /* Pad control registers */ | ||
88 | 0x70003000 0x40c>; /* PinMux registers */ | ||
89 | }; | ||
90 | |||
91 | Example board file extract: | ||
92 | |||
93 | pinctrl { | ||
94 | sdmmc4_default: pinmux { | ||
95 | sdmmc4_clk_pcc4 { | ||
96 | nvidia,pins = "sdmmc4_clk_pcc4", | ||
97 | nvidia,function = "sdmmc4"; | ||
98 | nvidia,pull = <0>; | ||
99 | nvidia,tristate = <0>; | ||
100 | }; | ||
101 | sdmmc4_dat0_paa0 { | ||
102 | nvidia,pins = "sdmmc4_dat0_paa0", | ||
103 | "sdmmc4_dat1_paa1", | ||
104 | "sdmmc4_dat2_paa2", | ||
105 | "sdmmc4_dat3_paa3", | ||
106 | "sdmmc4_dat4_paa4", | ||
107 | "sdmmc4_dat5_paa5", | ||
108 | "sdmmc4_dat6_paa6", | ||
109 | "sdmmc4_dat7_paa7"; | ||
110 | nvidia,function = "sdmmc4"; | ||
111 | nvidia,pull = <2>; | ||
112 | nvidia,tristate = <0>; | ||
113 | }; | ||
114 | }; | ||
115 | }; | ||
116 | |||
117 | sdhci@78000400 { | ||
118 | pinctrl-names = "default"; | ||
119 | pinctrl-0 = <&sdmmc4_default>; | ||
120 | }; | ||
diff --git a/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt b/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt new file mode 100644 index 000000000000..9a2f3f420526 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ste,nomadik.txt | |||
@@ -0,0 +1,140 @@ | |||
1 | ST Ericsson Nomadik pinmux controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: "stericsson,nmk-pinctrl", "stericsson,nmk-pinctrl-db8540", | ||
5 | "stericsson,nmk-pinctrl-stn8815" | ||
6 | - reg: Should contain the register physical address and length of the PRCMU. | ||
7 | |||
8 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
9 | common pinctrl bindings used by client devices, including the meaning of the | ||
10 | phrase "pin configuration node". | ||
11 | |||
12 | ST Ericsson's pin configuration nodes act as a container for an arbitrary number of | ||
13 | subnodes. Each of these subnodes represents some desired configuration for a | ||
14 | pin, a group, or a list of pins or groups. This configuration can include the | ||
15 | mux function to select on those pin(s)/group(s), and various pin configuration | ||
16 | parameters, such as input, output, pull up, pull down... | ||
17 | |||
18 | The name of each subnode is not important; all subnodes should be enumerated | ||
19 | and processed purely based on their content. | ||
20 | |||
21 | Required subnode-properties: | ||
22 | - ste,pins : An array of strings. Each string contains the name of a pin or | ||
23 | group. | ||
24 | |||
25 | Optional subnode-properties: | ||
26 | - ste,function: A string containing the name of the function to mux to the | ||
27 | pin or group. | ||
28 | |||
29 | - ste,config: Handle of pin configuration node (e.g. ste,config = <&slpm_in_wkup_pdis>) | ||
30 | |||
31 | - ste,input : <0/1/2> | ||
32 | 0: input with no pull | ||
33 | 1: input with pull up, | ||
34 | 2: input with pull down, | ||
35 | |||
36 | - ste,output: <0/1/2> | ||
37 | 0: output low, | ||
38 | 1: output high, | ||
39 | 2: output (value is not specified). | ||
40 | |||
41 | - ste,sleep: <0/1> | ||
42 | 0: sleep mode disable, | ||
43 | 1: sleep mode enable. | ||
44 | |||
45 | - ste,sleep-input: <0/1/2/3> | ||
46 | 0: sleep input with no pull, | ||
47 | 1: sleep input with pull up, | ||
48 | 2: sleep input with pull down. | ||
49 | 3: sleep input and keep last input configuration (no pull, pull up or pull down). | ||
50 | |||
51 | - ste,sleep-output: <0/1/2> | ||
52 | 0: sleep output low, | ||
53 | 1: sleep output high, | ||
54 | 2: sleep output (value is not specified). | ||
55 | |||
56 | - ste,sleep-gpio: <0/1> | ||
57 | 0: disable sleep gpio mode, | ||
58 | 1: enable sleep gpio mode. | ||
59 | |||
60 | - ste,sleep-wakeup: <0/1> | ||
61 | 0: wake-up detection enabled, | ||
62 | 1: wake-up detection disabled. | ||
63 | |||
64 | - ste,sleep-pull-disable: <0/1> | ||
65 | 0: GPIO pull-up or pull-down resistor is enabled, when pin is an input, | ||
66 | 1: GPIO pull-up and pull-down resistor are disabled. | ||
67 | |||
68 | Example board file extract: | ||
69 | |||
70 | pinctrl@80157000 { | ||
71 | compatible = "stericsson,nmk-pinctrl"; | ||
72 | reg = <0x80157000 0x2000>; | ||
73 | |||
74 | pinctrl-names = "default"; | ||
75 | |||
76 | slpm_in_wkup_pdis: slpm_in_wkup_pdis { | ||
77 | ste,sleep = <1>; | ||
78 | ste,sleep-input = <3>; | ||
79 | ste,sleep-wakeup = <1>; | ||
80 | ste,sleep-pull-disable = <0>; | ||
81 | }; | ||
82 | |||
83 | slpm_out_hi_wkup_pdis: slpm_out_hi_wkup_pdis { | ||
84 | ste,sleep = <1>; | ||
85 | ste,sleep-output = <1>; | ||
86 | ste,sleep-wakeup = <1>; | ||
87 | ste,sleep-pull-disable = <0>; | ||
88 | }; | ||
89 | |||
90 | slpm_out_wkup_pdis: slpm_out_wkup_pdis { | ||
91 | ste,sleep = <1>; | ||
92 | ste,sleep-output = <2>; | ||
93 | ste,sleep-wakeup = <1>; | ||
94 | ste,sleep-pull-disable = <0>; | ||
95 | }; | ||
96 | |||
97 | uart0 { | ||
98 | uart0_default_mux: uart0_mux { | ||
99 | u0_default_mux { | ||
100 | ste,function = "u0"; | ||
101 | ste,pins = "u0_a_1"; | ||
102 | }; | ||
103 | }; | ||
104 | uart0_default_mode: uart0_default { | ||
105 | uart0_default_cfg1 { | ||
106 | ste,pins = "GPIO0", "GPIO2"; | ||
107 | ste,input = <1>; | ||
108 | }; | ||
109 | |||
110 | uart0_default_cfg2 { | ||
111 | ste,pins = "GPIO1", "GPIO3"; | ||
112 | ste,output = <1>; | ||
113 | }; | ||
114 | }; | ||
115 | uart0_sleep_mode: uart0_sleep { | ||
116 | uart0_sleep_cfg1 { | ||
117 | ste,pins = "GPIO0", "GPIO2"; | ||
118 | ste,config = <&slpm_in_wkup_pdis>; | ||
119 | }; | ||
120 | uart0_sleep_cfg2 { | ||
121 | ste,pins = "GPIO1"; | ||
122 | ste,config = <&slpm_out_hi_wkup_pdis>; | ||
123 | }; | ||
124 | uart0_sleep_cfg3 { | ||
125 | ste,pins = "GPIO3"; | ||
126 | ste,config = <&slpm_out_wkup_pdis>; | ||
127 | }; | ||
128 | }; | ||
129 | }; | ||
130 | }; | ||
131 | |||
132 | uart@80120000 { | ||
133 | compatible = "arm,pl011", "arm,primecell"; | ||
134 | reg = <0x80120000 0x1000>; | ||
135 | interrupts = <0 11 0x4>; | ||
136 | |||
137 | pinctrl-names = "default","sleep"; | ||
138 | pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>; | ||
139 | pinctrl-1 = <&uart0_sleep_mode>; | ||
140 | }; | ||
diff --git a/Documentation/devicetree/bindings/power_supply/qnap-poweroff.txt b/Documentation/devicetree/bindings/power_supply/qnap-poweroff.txt new file mode 100644 index 000000000000..9a599d27bd75 --- /dev/null +++ b/Documentation/devicetree/bindings/power_supply/qnap-poweroff.txt | |||
@@ -0,0 +1,13 @@ | |||
1 | * QNAP Power Off | ||
2 | |||
3 | QNAP NAS devices have a microcontroller controlling the main power | ||
4 | supply. This microcontroller is connected to UART1 of the Kirkwood and | ||
5 | Orion5x SoCs. Sending the charactor 'A', at 19200 baud, tells the | ||
6 | microcontroller to turn the power off. This driver adds a handler to | ||
7 | pm_power_off which is called to turn the power off. | ||
8 | |||
9 | Required Properties: | ||
10 | - compatible: Should be "qnap,power-off" | ||
11 | |||
12 | - reg: Address and length of the register set for UART1 | ||
13 | - clocks: tclk clock | ||
diff --git a/Documentation/devicetree/bindings/power_supply/restart-poweroff.txt b/Documentation/devicetree/bindings/power_supply/restart-poweroff.txt new file mode 100644 index 000000000000..5776e684afda --- /dev/null +++ b/Documentation/devicetree/bindings/power_supply/restart-poweroff.txt | |||
@@ -0,0 +1,8 @@ | |||
1 | * Restart Power Off | ||
2 | |||
3 | Buffalo Linkstation LS-XHL and LS-CHLv2, and other devices power off | ||
4 | by restarting and letting u-boot keep hold of the machine until the | ||
5 | user presses a button. | ||
6 | |||
7 | Required Properties: | ||
8 | - compatible: Should be "restart-poweroff" | ||
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/srio.txt b/Documentation/devicetree/bindings/powerpc/fsl/srio.txt index b039bcbee134..07abf0f2f440 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/srio.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/srio.txt | |||
@@ -8,9 +8,9 @@ Properties: | |||
8 | Definition: Must include "fsl,srio" for IP blocks with IP Block | 8 | Definition: Must include "fsl,srio" for IP blocks with IP Block |
9 | Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0. | 9 | Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0. |
10 | 10 | ||
11 | Optionally, a compatiable string of "fsl,srio-vX.Y" where X is Major | 11 | Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major |
12 | version in IP Block Revision Register and Y is Minor version. If this | 12 | version in IP Block Revision Register and Y is Minor version. If this |
13 | compatiable is provided it should be ordered before "fsl,srio". | 13 | compatible is provided it should be ordered before "fsl,srio". |
14 | 14 | ||
15 | - reg | 15 | - reg |
16 | Usage: required | 16 | Usage: required |
diff --git a/Documentation/devicetree/bindings/regulator/anatop-regulator.txt b/Documentation/devicetree/bindings/regulator/anatop-regulator.txt index 357758cb6e92..758eae24082a 100644 --- a/Documentation/devicetree/bindings/regulator/anatop-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/anatop-regulator.txt | |||
@@ -9,6 +9,11 @@ Required properties: | |||
9 | - anatop-min-voltage: Minimum voltage of this regulator | 9 | - anatop-min-voltage: Minimum voltage of this regulator |
10 | - anatop-max-voltage: Maximum voltage of this regulator | 10 | - anatop-max-voltage: Maximum voltage of this regulator |
11 | 11 | ||
12 | Optional properties: | ||
13 | - anatop-delay-reg-offset: Anatop MFD step time register offset | ||
14 | - anatop-delay-bit-shift: Bit shift for the step time register | ||
15 | - anatop-delay-bit-width: Number of bits used in the step time register | ||
16 | |||
12 | Any property defined as part of the core regulator | 17 | Any property defined as part of the core regulator |
13 | binding, defined in regulator.txt, can also be used. | 18 | binding, defined in regulator.txt, can also be used. |
14 | 19 | ||
@@ -23,6 +28,9 @@ Example: | |||
23 | anatop-reg-offset = <0x140>; | 28 | anatop-reg-offset = <0x140>; |
24 | anatop-vol-bit-shift = <9>; | 29 | anatop-vol-bit-shift = <9>; |
25 | anatop-vol-bit-width = <5>; | 30 | anatop-vol-bit-width = <5>; |
31 | anatop-delay-reg-offset = <0x170>; | ||
32 | anatop-delay-bit-shift = <24>; | ||
33 | anatop-delay-bit-width = <2>; | ||
26 | anatop-min-bit-val = <1>; | 34 | anatop-min-bit-val = <1>; |
27 | anatop-min-voltage = <725000>; | 35 | anatop-min-voltage = <725000>; |
28 | anatop-max-voltage = <1300000>; | 36 | anatop-max-voltage = <1300000>; |
diff --git a/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt b/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt new file mode 100644 index 000000000000..a35ff99003a5 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt | |||
@@ -0,0 +1,152 @@ | |||
1 | * Samsung S5M8767 Voltage and Current Regulator | ||
2 | |||
3 | The Samsung S5M8767 is a multi-function device which includes volatage and | ||
4 | current regulators, rtc, charger controller and other sub-blocks. It is | ||
5 | interfaced to the host controller using a i2c interface. Each sub-block is | ||
6 | addressed by the host system using different i2c slave address. This document | ||
7 | describes the bindings for 'pmic' sub-block of s5m8767. | ||
8 | |||
9 | Required properties: | ||
10 | - compatible: Should be "samsung,s5m8767-pmic". | ||
11 | - reg: Specifies the i2c slave address of the pmic block. It should be 0x66. | ||
12 | |||
13 | - s5m8767,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt (uV) | ||
14 | units for buck2 when changing voltage using gpio dvs. Refer to [1] below | ||
15 | for additional information. | ||
16 | |||
17 | - s5m8767,pmic-buck3-dvs-voltage: A set of 8 voltage values in micro-volt (uV) | ||
18 | units for buck3 when changing voltage using gpio dvs. Refer to [1] below | ||
19 | for additional information. | ||
20 | |||
21 | - s5m8767,pmic-buck4-dvs-voltage: A set of 8 voltage values in micro-volt (uV) | ||
22 | units for buck4 when changing voltage using gpio dvs. Refer to [1] below | ||
23 | for additional information. | ||
24 | |||
25 | - s5m8767,pmic-buck-ds-gpios: GPIO specifiers for three host gpio's used | ||
26 | for selecting GPIO DVS lines. It is one-to-one mapped to dvs gpio lines. | ||
27 | |||
28 | [1] If none of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional | ||
29 | property is specified, the 's5m8767,pmic-buck[2/3/4]-dvs-voltage' | ||
30 | property should specify atleast one voltage level (which would be a | ||
31 | safe operating voltage). | ||
32 | |||
33 | If either of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional | ||
34 | property is specified, then all the eight voltage values for the | ||
35 | 's5m8767,pmic-buck[2/3/4]-dvs-voltage' should be specified. | ||
36 | |||
37 | Optional properties: | ||
38 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
39 | the interrupts from s5m8767 are delivered to. | ||
40 | - interrupts: Interrupt specifiers for two interrupt sources. | ||
41 | - First interrupt specifier is for 'irq1' interrupt. | ||
42 | - Second interrupt specifier is for 'alert' interrupt. | ||
43 | - s5m8767,pmic-buck2-uses-gpio-dvs: 'buck2' can be controlled by gpio dvs. | ||
44 | - s5m8767,pmic-buck3-uses-gpio-dvs: 'buck3' can be controlled by gpio dvs. | ||
45 | - s5m8767,pmic-buck4-uses-gpio-dvs: 'buck4' can be controlled by gpio dvs. | ||
46 | |||
47 | Additional properties required if either of the optional properties are used: | ||
48 | |||
49 | - s5m8767,pmic-buck234-default-dvs-idx: Default voltage setting selected from | ||
50 | the possible 8 options selectable by the dvs gpios. The value of this | ||
51 | property should be between 0 and 7. If not specified or if out of range, the | ||
52 | default value of this property is set to 0. | ||
53 | |||
54 | - s5m8767,pmic-buck-dvs-gpios: GPIO specifiers for three host gpio's used | ||
55 | for dvs. The format of the gpio specifier depends in the gpio controller. | ||
56 | |||
57 | Regulators: The regulators of s5m8767 that have to be instantiated should be | ||
58 | included in a sub-node named 'regulators'. Regulator nodes included in this | ||
59 | sub-node should be of the format as listed below. | ||
60 | |||
61 | regulator_name { | ||
62 | ldo1_reg: LDO1 { | ||
63 | regulator-name = "VDD_ALIVE_1.0V"; | ||
64 | regulator-min-microvolt = <1100000>; | ||
65 | regulator-max-microvolt = <1100000>; | ||
66 | regulator-always-on; | ||
67 | regulator-boot-on; | ||
68 | op_mode = <1>; /* Normal Mode */ | ||
69 | }; | ||
70 | }; | ||
71 | The above regulator entries are defined in regulator bindings documentation | ||
72 | except op_mode description. | ||
73 | - op_mode: describes the different operating modes of the LDO's with | ||
74 | power mode change in SOC. The different possible values are, | ||
75 | 0 - always off mode | ||
76 | 1 - on in normal mode | ||
77 | 2 - low power mode | ||
78 | 3 - suspend mode | ||
79 | |||
80 | The following are the names of the regulators that the s5m8767 pmic block | ||
81 | supports. Note: The 'n' in LDOn and BUCKn represents the LDO or BUCK number | ||
82 | as per the datasheet of s5m8767. | ||
83 | |||
84 | - LDOn | ||
85 | - valid values for n are 1 to 28 | ||
86 | - Example: LDO0, LD01, LDO28 | ||
87 | - BUCKn | ||
88 | - valid values for n are 1 to 9. | ||
89 | - Example: BUCK1, BUCK2, BUCK9 | ||
90 | |||
91 | The bindings inside the regulator nodes use the standard regulator bindings | ||
92 | which are documented elsewhere. | ||
93 | |||
94 | Example: | ||
95 | |||
96 | s5m8767_pmic@66 { | ||
97 | compatible = "samsung,s5m8767-pmic"; | ||
98 | reg = <0x66>; | ||
99 | |||
100 | s5m8767,pmic-buck2-uses-gpio-dvs; | ||
101 | s5m8767,pmic-buck3-uses-gpio-dvs; | ||
102 | s5m8767,pmic-buck4-uses-gpio-dvs; | ||
103 | |||
104 | s5m8767,pmic-buck-default-dvs-idx = <0>; | ||
105 | |||
106 | s5m8767,pmic-buck-dvs-gpios = <&gpx0 0 1 0 0>, /* DVS1 */ | ||
107 | <&gpx0 1 1 0 0>, /* DVS2 */ | ||
108 | <&gpx0 2 1 0 0>; /* DVS3 */ | ||
109 | |||
110 | s5m8767,pmic-buck-ds-gpios = <&gpx2 3 1 0 0>, /* SET1 */ | ||
111 | <&gpx2 4 1 0 0>, /* SET2 */ | ||
112 | <&gpx2 5 1 0 0>; /* SET3 */ | ||
113 | |||
114 | s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>, | ||
115 | <1250000>, <1200000>, | ||
116 | <1150000>, <1100000>, | ||
117 | <1000000>, <950000>; | ||
118 | |||
119 | s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>, | ||
120 | <1100000>, <1100000>, | ||
121 | <1000000>, <1000000>, | ||
122 | <1000000>, <1000000>; | ||
123 | |||
124 | s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>, | ||
125 | <1200000>, <1200000>, | ||
126 | <1200000>, <1200000>, | ||
127 | <1200000>, <1200000>; | ||
128 | |||
129 | regulators { | ||
130 | ldo1_reg: LDO1 { | ||
131 | regulator-name = "VDD_ABB_3.3V"; | ||
132 | regulator-min-microvolt = <3300000>; | ||
133 | regulator-max-microvolt = <3300000>; | ||
134 | op_mode = <1>; /* Normal Mode */ | ||
135 | }; | ||
136 | |||
137 | ldo2_reg: LDO2 { | ||
138 | regulator-name = "VDD_ALIVE_1.1V"; | ||
139 | regulator-min-microvolt = <1100000>; | ||
140 | regulator-max-microvolt = <1100000>; | ||
141 | regulator-always-on; | ||
142 | }; | ||
143 | |||
144 | buck1_reg: BUCK1 { | ||
145 | regulator-name = "VDD_MIF_1.2V"; | ||
146 | regulator-min-microvolt = <950000>; | ||
147 | regulator-max-microvolt = <1350000>; | ||
148 | regulator-always-on; | ||
149 | regulator-boot-on; | ||
150 | }; | ||
151 | }; | ||
152 | }; | ||
diff --git a/Documentation/devicetree/bindings/regulator/tps51632-regulator.txt b/Documentation/devicetree/bindings/regulator/tps51632-regulator.txt new file mode 100644 index 000000000000..2f7e44a96414 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/tps51632-regulator.txt | |||
@@ -0,0 +1,27 @@ | |||
1 | TPS51632 Voltage regulators | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: Must be "ti,tps51632" | ||
5 | - reg: I2C slave address | ||
6 | |||
7 | Optional properties: | ||
8 | - ti,enable-pwm-dvfs: Enable the DVFS voltage control through the PWM interface. | ||
9 | - ti,dvfs-step-20mV: The 20mV step voltage when PWM DVFS enabled. Missing this | ||
10 | will set 10mV step voltage in PWM DVFS mode. In normal mode, the voltage | ||
11 | step is 10mV as per datasheet. | ||
12 | |||
13 | Any property defined as part of the core regulator binding, defined in | ||
14 | regulator.txt, can also be used. | ||
15 | |||
16 | Example: | ||
17 | |||
18 | tps51632 { | ||
19 | compatible = "ti,tps51632"; | ||
20 | reg = <0x43>; | ||
21 | regulator-name = "tps51632-vout"; | ||
22 | regulator-min-microvolt = <500000>; | ||
23 | regulator-max-microvolt = <1500000>; | ||
24 | regulator-boot-on; | ||
25 | ti,enable-pwm-dvfs; | ||
26 | ti,dvfs-step-20mV; | ||
27 | }; | ||
diff --git a/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt b/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt index c8ca6b8f6582..1b20c3dbcdb8 100644 --- a/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt | |||
@@ -17,9 +17,9 @@ Optional properties: | |||
17 | - ti,vsel1-gpio: Gpio for controlling VSEL1 line. | 17 | - ti,vsel1-gpio: Gpio for controlling VSEL1 line. |
18 | If this property is missing, then assume that there is no GPIO | 18 | If this property is missing, then assume that there is no GPIO |
19 | for vsel1 control. | 19 | for vsel1 control. |
20 | - ti,vsel0-state-high: Inital state of vsel0 input is high. | 20 | - ti,vsel0-state-high: Initial state of vsel0 input is high. |
21 | If this property is missing, then assume the state as low (0). | 21 | If this property is missing, then assume the state as low (0). |
22 | - ti,vsel1-state-high: Inital state of vsel1 input is high. | 22 | - ti,vsel1-state-high: Initial state of vsel1 input is high. |
23 | If this property is missing, then assume the state as low (0). | 23 | If this property is missing, then assume the state as low (0). |
24 | 24 | ||
25 | Any property defined as part of the core regulator binding, defined in | 25 | Any property defined as part of the core regulator binding, defined in |
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt index 90ec45fd33ec..7ac7259fe9ea 100644 --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt | |||
@@ -7,7 +7,7 @@ Required properties: | |||
7 | - reg: physical base address of the controller and length of memory mapped | 7 | - reg: physical base address of the controller and length of memory mapped |
8 | region. | 8 | region. |
9 | - interrupts: Two interrupt numbers to the cpu should be specified. First | 9 | - interrupts: Two interrupt numbers to the cpu should be specified. First |
10 | interrupt number is the rtc alarm interupt and second interrupt number | 10 | interrupt number is the rtc alarm interrupt and second interrupt number |
11 | is the rtc tick interrupt. The number of cells representing a interrupt | 11 | is the rtc tick interrupt. The number of cells representing a interrupt |
12 | depends on the parent interrupt controller. | 12 | depends on the parent interrupt controller. |
13 | 13 | ||
diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt new file mode 100644 index 000000000000..e6222106ca36 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt | |||
@@ -0,0 +1,12 @@ | |||
1 | Renesas MSIOF spi controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : "renesas,sh-msiof" for SuperH or | ||
5 | "renesas,sh-mobile-msiof" for SH Mobile series | ||
6 | - reg : Offset and length of the register set for the device | ||
7 | - interrupts : interrupt line used by MSIOF | ||
8 | |||
9 | Optional properties: | ||
10 | - num-cs : total number of chip-selects | ||
11 | - renesas,tx-fifo-size : Overrides the default tx fifo size given in words | ||
12 | - renesas,rx-fifo-size : Overrides the default rx fifo size given in words | ||
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 902b1b1f568e..19e1ef73ab0d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt | |||
@@ -14,6 +14,7 @@ bosch Bosch Sensortec GmbH | |||
14 | brcm Broadcom Corporation | 14 | brcm Broadcom Corporation |
15 | cavium Cavium, Inc. | 15 | cavium Cavium, Inc. |
16 | chrp Common Hardware Reference Platform | 16 | chrp Common Hardware Reference Platform |
17 | cirrus Cirrus Logic, Inc. | ||
17 | cortina Cortina Systems, Inc. | 18 | cortina Cortina Systems, Inc. |
18 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) | 19 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) |
19 | denx Denx Software Engineering | 20 | denx Denx Software Engineering |
@@ -42,6 +43,7 @@ powervr PowerVR (deprecated, use img) | |||
42 | qcom Qualcomm, Inc. | 43 | qcom Qualcomm, Inc. |
43 | ramtron Ramtron International | 44 | ramtron Ramtron International |
44 | realtek Realtek Semiconductor Corp. | 45 | realtek Realtek Semiconductor Corp. |
46 | renesas Renesas Electronics Corporation | ||
45 | samsung Samsung Semiconductor | 47 | samsung Samsung Semiconductor |
46 | sbs Smart Battery System | 48 | sbs Smart Battery System |
47 | schindler Schindler | 49 | schindler Schindler |
@@ -50,8 +52,10 @@ simtek | |||
50 | sirf SiRF Technology, Inc. | 52 | sirf SiRF Technology, Inc. |
51 | snps Synopsys, Inc. | 53 | snps Synopsys, Inc. |
52 | st STMicroelectronics | 54 | st STMicroelectronics |
55 | ste ST-Ericsson | ||
53 | stericsson ST-Ericsson | 56 | stericsson ST-Ericsson |
54 | ti Texas Instruments | 57 | ti Texas Instruments |
58 | toshiba Toshiba Corporation | ||
55 | via VIA Technologies, Inc. | 59 | via VIA Technologies, Inc. |
56 | wlf Wolfson Microelectronics | 60 | wlf Wolfson Microelectronics |
57 | wm Wondermedia Technologies, Inc. | 61 | wm Wondermedia Technologies, Inc. |
diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt index 79ead8263ae4..ce0d8e78ed8f 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt | |||
@@ -2,7 +2,7 @@ | |||
2 | 2 | ||
3 | The Samsung's Watchdog controller is used for resuming system operation | 3 | The Samsung's Watchdog controller is used for resuming system operation |
4 | after a preset amount of time during which the WDT reset event has not | 4 | after a preset amount of time during which the WDT reset event has not |
5 | occured. | 5 | occurred. |
6 | 6 | ||
7 | Required properties: | 7 | Required properties: |
8 | - compatible : should be "samsung,s3c2410-wdt" | 8 | - compatible : should be "samsung,s3c2410-wdt" |