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-rw-r--r--Documentation/devicetree/bindings/video/adi,adv7511.txt88
-rw-r--r--Documentation/devicetree/bindings/video/backlight/lp855x.txt2
-rw-r--r--Documentation/devicetree/bindings/video/exynos_dsim.txt1
-rw-r--r--Documentation/devicetree/bindings/video/rockchip-drm.txt19
-rw-r--r--Documentation/devicetree/bindings/video/rockchip-vop.txt58
-rw-r--r--Documentation/devicetree/bindings/video/samsung-fimd.txt1
-rw-r--r--Documentation/devicetree/bindings/video/simple-framebuffer-sunxi.txt33
-rw-r--r--Documentation/devicetree/bindings/video/simple-framebuffer.txt68
8 files changed, 266 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/video/adi,adv7511.txt b/Documentation/devicetree/bindings/video/adi,adv7511.txt
new file mode 100644
index 000000000000..96c25ee01501
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/adi,adv7511.txt
@@ -0,0 +1,88 @@
1Analog Device ADV7511(W)/13 HDMI Encoders
2-----------------------------------------
3
4The ADV7511, ADV7511W and ADV7513 are HDMI audio and video transmitters
5compatible with HDMI 1.4 and DVI 1.0. They support color space conversion,
6S/PDIF, CEC and HDCP.
7
8Required properties:
9
10- compatible: Should be one of "adi,adv7511", "adi,adv7511w" or "adi,adv7513"
11- reg: I2C slave address
12
13The ADV7511 supports a large number of input data formats that differ by their
14color depth, color format, clock mode, bit justification and random
15arrangement of components on the data bus. The combination of the following
16properties describe the input and map directly to the video input tables of the
17ADV7511 datasheet that document all the supported combinations.
18
19- adi,input-depth: Number of bits per color component at the input (8, 10 or
20 12).
21- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
22 "yuv444".
23- adi,input-clock: The input clock type, one of "1x" (one clock cycle per
24 pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
25 data driven on both edges).
26
27The following input format properties are required except in "rgb 1x" and
28"yuv444 1x" modes, in which case they must not be specified.
29
30- adi,input-style: The input components arrangement variant (1, 2 or 3), as
31 listed in the input format tables in the datasheet.
32- adi,input-justification: The input bit justification ("left", "evenly",
33 "right").
34
35Optional properties:
36
37- interrupts: Specifier for the ADV7511 interrupt
38- pd-gpios: Specifier for the GPIO connected to the power down signal
39
40- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps
41 (-1200 ps .. 1600 ps). Defaults to no delay.
42- adi,embedded-sync: The input uses synchronization signals embedded in the
43 data stream (similar to BT.656). Defaults to separate H/V synchronization
44 signals.
45
46Required nodes:
47
48The ADV7511 has two video ports. Their connections are modelled using the OF
49graph bindings specified in Documentation/devicetree/bindings/graph.txt.
50
51- Video port 0 for the RGB or YUV input
52- Video port 1 for the HDMI output
53
54
55Example
56-------
57
58 adv7511w: hdmi@39 {
59 compatible = "adi,adv7511w";
60 reg = <39>;
61 interrupt-parent = <&gpio3>;
62 interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
63
64 adi,input-depth = <8>;
65 adi,input-colorspace = "rgb";
66 adi,input-clock = "1x";
67 adi,input-style = <1>;
68 adi,input-justification = "evenly";
69
70 ports {
71 #address-cells = <1>;
72 #size-cells = <0>;
73
74 port@0 {
75 reg = <0>;
76 adv7511w_in: endpoint {
77 remote-endpoint = <&dpi_out>;
78 };
79 };
80
81 port@1 {
82 reg = <1>;
83 adv7511_out: endpoint {
84 remote-endpoint = <&hdmi_connector_in>;
85 };
86 };
87 };
88 };
diff --git a/Documentation/devicetree/bindings/video/backlight/lp855x.txt b/Documentation/devicetree/bindings/video/backlight/lp855x.txt
index 96e83a56048e..0a3ecbc3a1b9 100644
--- a/Documentation/devicetree/bindings/video/backlight/lp855x.txt
+++ b/Documentation/devicetree/bindings/video/backlight/lp855x.txt
@@ -12,6 +12,7 @@ Optional properties:
12 - pwm-period: PWM period value. Set only PWM input mode used (u32) 12 - pwm-period: PWM period value. Set only PWM input mode used (u32)
13 - rom-addr: Register address of ROM area to be updated (u8) 13 - rom-addr: Register address of ROM area to be updated (u8)
14 - rom-val: Register value to be updated (u8) 14 - rom-val: Register value to be updated (u8)
15 - power-supply: Regulator which controls the 3V rail
15 16
16Example: 17Example:
17 18
@@ -56,6 +57,7 @@ Example:
56 backlight@2c { 57 backlight@2c {
57 compatible = "ti,lp8557"; 58 compatible = "ti,lp8557";
58 reg = <0x2c>; 59 reg = <0x2c>;
60 power-supply = <&backlight_vdd>;
59 61
60 dev-ctrl = /bits/ 8 <0x41>; 62 dev-ctrl = /bits/ 8 <0x41>;
61 init-brt = /bits/ 8 <0x0a>; 63 init-brt = /bits/ 8 <0x0a>;
diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt b/Documentation/devicetree/bindings/video/exynos_dsim.txt
index e74243b4b317..ca2b4aacd9af 100644
--- a/Documentation/devicetree/bindings/video/exynos_dsim.txt
+++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt
@@ -4,6 +4,7 @@ Required properties:
4 - compatible: value should be one of the following 4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ 5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ 6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ 8 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 - reg: physical base address and length of the registers set for the device 9 - reg: physical base address and length of the registers set for the device
9 - interrupts: should contain DSI interrupt 10 - interrupts: should contain DSI interrupt
diff --git a/Documentation/devicetree/bindings/video/rockchip-drm.txt b/Documentation/devicetree/bindings/video/rockchip-drm.txt
new file mode 100644
index 000000000000..7fff582495a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/rockchip-drm.txt
@@ -0,0 +1,19 @@
1Rockchip DRM master device
2================================
3
4The Rockchip DRM master device is a virtual device needed to list all
5vop devices or other display interface nodes that comprise the
6graphics subsystem.
7
8Required properties:
9- compatible: Should be "rockchip,display-subsystem"
10- ports: Should contain a list of phandles pointing to display interface port
11 of vop devices. vop definitions as defined in
12 Documentation/devicetree/bindings/video/rockchip-vop.txt
13
14example:
15
16display-subsystem {
17 compatible = "rockchip,display-subsystem";
18 ports = <&vopl_out>, <&vopb_out>;
19};
diff --git a/Documentation/devicetree/bindings/video/rockchip-vop.txt b/Documentation/devicetree/bindings/video/rockchip-vop.txt
new file mode 100644
index 000000000000..d15351f2313d
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/rockchip-vop.txt
@@ -0,0 +1,58 @@
1device-tree bindings for rockchip soc display controller (vop)
2
3VOP (Visual Output Processor) is the Display Controller for the Rockchip
4series of SoCs which transfers the image data from a video memory
5buffer to an external LCD interface.
6
7Required properties:
8- compatible: value should be one of the following
9 "rockchip,rk3288-vop";
10
11- interrupts: should contain a list of all VOP IP block interrupts in the
12 order: VSYNC, LCD_SYSTEM. The interrupt specifier
13 format depends on the interrupt controller used.
14
15- clocks: must include clock specifiers corresponding to entries in the
16 clock-names property.
17
18- clock-names: Must contain
19 aclk_vop: for ddr buffer transfer.
20 hclk_vop: for ahb bus to R/W the phy regs.
21 dclk_vop: pixel clock.
22
23- resets: Must contain an entry for each entry in reset-names.
24 See ../reset/reset.txt for details.
25- reset-names: Must include the following entries:
26 - axi
27 - ahb
28 - dclk
29
30- iommus: required a iommu node
31
32- port: A port node with endpoint definitions as defined in
33 Documentation/devicetree/bindings/media/video-interfaces.txt.
34
35Example:
36SoC specific DT entry:
37 vopb: vopb@ff930000 {
38 compatible = "rockchip,rk3288-vop";
39 reg = <0xff930000 0x19c>;
40 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
41 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
42 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
43 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
44 reset-names = "axi", "ahb", "dclk";
45 iommus = <&vopb_mmu>;
46 vopb_out: port {
47 #address-cells = <1>;
48 #size-cells = <0>;
49 vopb_out_edp: endpoint@0 {
50 reg = <0>;
51 remote-endpoint=<&edp_in_vopb>;
52 };
53 vopb_out_hdmi: endpoint@1 {
54 reg = <1>;
55 remote-endpoint=<&hdmi_in_vopb>;
56 };
57 };
58 };
diff --git a/Documentation/devicetree/bindings/video/samsung-fimd.txt b/Documentation/devicetree/bindings/video/samsung-fimd.txt
index 4e6c77c85546..cf1af6371021 100644
--- a/Documentation/devicetree/bindings/video/samsung-fimd.txt
+++ b/Documentation/devicetree/bindings/video/samsung-fimd.txt
@@ -11,6 +11,7 @@ Required properties:
11 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */ 11 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */
12 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */ 12 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */
13 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ 13 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
14 "samsung,exynos4415-fimd"; /* for Exynos4415 SoC */
14 "samsung,exynos5250-fimd"; /* for Exynos5 SoCs */ 15 "samsung,exynos5250-fimd"; /* for Exynos5 SoCs */
15 16
16- reg: physical base address and length of the FIMD registers set. 17- reg: physical base address and length of the FIMD registers set.
diff --git a/Documentation/devicetree/bindings/video/simple-framebuffer-sunxi.txt b/Documentation/devicetree/bindings/video/simple-framebuffer-sunxi.txt
new file mode 100644
index 000000000000..c46ba641a1df
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/simple-framebuffer-sunxi.txt
@@ -0,0 +1,33 @@
1Sunxi specific Simple Framebuffer bindings
2
3This binding documents sunxi specific extensions to the simple-framebuffer
4bindings. The sunxi simplefb u-boot code relies on the devicetree containing
5pre-populated simplefb nodes.
6
7These extensions are intended so that u-boot can select the right node based
8on which pipeline is being used. As such they are solely intended for
9firmware / bootloader use, and the OS should ignore them.
10
11Required properties:
12- compatible: "allwinner,simple-framebuffer"
13- allwinner,pipeline, one of:
14 "de_be0-lcd0"
15 "de_be1-lcd1"
16 "de_be0-lcd0-hdmi"
17 "de_be1-lcd1-hdmi"
18
19Example:
20
21chosen {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 framebuffer@0 {
27 compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
28 allwinner,pipeline = "de_be0-lcd0-hdmi";
29 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
30 <&ahb_gates 44>;
31 status = "disabled";
32 };
33};
diff --git a/Documentation/devicetree/bindings/video/simple-framebuffer.txt b/Documentation/devicetree/bindings/video/simple-framebuffer.txt
index 70c26f3a5b9a..4474ef6e0b95 100644
--- a/Documentation/devicetree/bindings/video/simple-framebuffer.txt
+++ b/Documentation/devicetree/bindings/video/simple-framebuffer.txt
@@ -1,8 +1,40 @@
1Simple Framebuffer 1Simple Framebuffer
2 2
3A simple frame-buffer describes a raw memory region that may be rendered to, 3A simple frame-buffer describes a frame-buffer setup by firmware or
4with the assumption that the display hardware has already been set up to scan 4the bootloader, with the assumption that the display hardware has already
5out from that buffer. 5been set up to scan out from the memory pointed to by the reg property.
6
7Since simplefb nodes represent runtime information they must be sub-nodes of
8the chosen node (*). Simplefb nodes must be named "framebuffer@<address>".
9
10If the devicetree contains nodes for the display hardware used by a simplefb,
11then the simplefb node must contain a property called "display", which
12contains a phandle pointing to the primary display hw node, so that the OS
13knows which simplefb to disable when handing over control to a driver for the
14real hardware. The bindings for the hw nodes must specify which node is
15considered the primary node.
16
17It is advised to add display# aliases to help the OS determine how to number
18things. If display# aliases are used, then if the simplefb node contains a
19"display" property then the /aliases/display# path must point to the display
20hw node the "display" property points to, otherwise it must point directly
21to the simplefb node.
22
23If a simplefb node represents the preferred console for user interaction,
24then the chosen node's stdout-path property should point to it, or to the
25primary display hw node, as with display# aliases. If display aliases are
26used then it should be set to the alias instead.
27
28It is advised that devicetree files contain pre-filled, disabled framebuffer
29nodes, so that the firmware only needs to update the mode information and
30enable them. This way if e.g. later on support for more display clocks get
31added, the simplefb nodes will already contain this info and the firmware
32does not need to be updated.
33
34If pre-filled framebuffer nodes are used, the firmware may need extra
35information to find the right node. In that case an extra platform specific
36compatible and platform specific properties should be used and documented,
37see e.g. simple-framebuffer-sunxi.txt .
6 38
7Required properties: 39Required properties:
8- compatible: "simple-framebuffer" 40- compatible: "simple-framebuffer"
@@ -14,13 +46,41 @@ Required properties:
14 - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b). 46 - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
15 - a8b8g8r8 (32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r). 47 - a8b8g8r8 (32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r).
16 48
49Optional properties:
50- clocks : List of clocks used by the framebuffer. Clocks listed here
51 are expected to already be configured correctly. The OS must
52 ensure these clocks are not modified or disabled while the
53 simple framebuffer remains active.
54- display : phandle pointing to the primary display hardware node
55
17Example: 56Example:
18 57
19 framebuffer { 58aliases {
59 display0 = &lcdc0;
60}
61
62chosen {
63 framebuffer0: framebuffer@1d385000 {
20 compatible = "simple-framebuffer"; 64 compatible = "simple-framebuffer";
21 reg = <0x1d385000 (1600 * 1200 * 2)>; 65 reg = <0x1d385000 (1600 * 1200 * 2)>;
22 width = <1600>; 66 width = <1600>;
23 height = <1200>; 67 height = <1200>;
24 stride = <(1600 * 2)>; 68 stride = <(1600 * 2)>;
25 format = "r5g6b5"; 69 format = "r5g6b5";
70 clocks = <&ahb_gates 36>, <&ahb_gates 43>, <&ahb_gates 44>;
71 display = <&lcdc0>;
72 };
73 stdout-path = "display0";
74};
75
76soc@01c00000 {
77 lcdc0: lcdc@1c0c000 {
78 compatible = "allwinner,sun4i-a10-lcdc";
79 ...
26 }; 80 };
81};
82
83
84*) Older devicetree files may have a compatible = "simple-framebuffer" node
85in a different place, operating systems must first enumerate any compatible
86nodes found under chosen and then check for other compatible nodes.