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Diffstat (limited to 'Documentation/devicetree/bindings/video')
4 files changed, 220 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/video/adi,adv7123.txt b/Documentation/devicetree/bindings/video/adi,adv7123.txt new file mode 100644 index 000000000000..a6b2b2b8f3d9 --- /dev/null +++ b/Documentation/devicetree/bindings/video/adi,adv7123.txt | |||
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1 | Analog Device ADV7123 Video DAC | ||
2 | ------------------------------- | ||
3 | |||
4 | The ADV7123 is a digital-to-analog converter that outputs VGA signals from a | ||
5 | parallel video input. | ||
6 | |||
7 | Required properties: | ||
8 | |||
9 | - compatible: Should be "adi,adv7123" | ||
10 | |||
11 | Optional properties: | ||
12 | |||
13 | - psave-gpios: Power save control GPIO | ||
14 | |||
15 | Required nodes: | ||
16 | |||
17 | The ADV7123 has two video ports. Their connections are modeled using the OF | ||
18 | graph bindings specified in Documentation/devicetree/bindings/graph.txt. | ||
19 | |||
20 | - Video port 0 for DPI input | ||
21 | - Video port 1 for VGA output | ||
22 | |||
23 | |||
24 | Example | ||
25 | ------- | ||
26 | |||
27 | adv7123: encoder@0 { | ||
28 | compatible = "adi,adv7123"; | ||
29 | |||
30 | ports { | ||
31 | #address-cells = <1>; | ||
32 | #size-cells = <0>; | ||
33 | |||
34 | port@0 { | ||
35 | reg = <0>; | ||
36 | |||
37 | adv7123_in: endpoint@0 { | ||
38 | remote-endpoint = <&dpi_out>; | ||
39 | }; | ||
40 | }; | ||
41 | |||
42 | port@1 { | ||
43 | reg = <1>; | ||
44 | |||
45 | adv7123_out: endpoint@0 { | ||
46 | remote-endpoint = <&vga_connector_in>; | ||
47 | }; | ||
48 | }; | ||
49 | }; | ||
50 | }; | ||
diff --git a/Documentation/devicetree/bindings/video/renesas,du.txt b/Documentation/devicetree/bindings/video/renesas,du.txt new file mode 100644 index 000000000000..5102830f2760 --- /dev/null +++ b/Documentation/devicetree/bindings/video/renesas,du.txt | |||
@@ -0,0 +1,84 @@ | |||
1 | * Renesas R-Car Display Unit (DU) | ||
2 | |||
3 | Required Properties: | ||
4 | |||
5 | - compatible: must be one of the following. | ||
6 | - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU | ||
7 | - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU | ||
8 | - "renesas,du-r8a7791" for R8A7791 (R-Car M2) compatible DU | ||
9 | |||
10 | - reg: A list of base address and length of each memory resource, one for | ||
11 | each entry in the reg-names property. | ||
12 | - reg-names: Name of the memory resources. The DU requires one memory | ||
13 | resource for the DU core (named "du") and one memory resource for each | ||
14 | LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical | ||
15 | index). | ||
16 | |||
17 | - interrupt-parent: phandle of the parent interrupt controller. | ||
18 | - interrupts: Interrupt specifiers for the DU interrupts. | ||
19 | |||
20 | - clocks: A list of phandles + clock-specifier pairs, one for each entry in | ||
21 | the clock-names property. | ||
22 | - clock-names: Name of the clocks. This property is model-dependent. | ||
23 | - R8A7779 uses a single functional clock. The clock doesn't need to be | ||
24 | named. | ||
25 | - R8A7790 and R8A7791 use one functional clock per channel and one clock | ||
26 | per LVDS encoder. The functional clocks must be named "du.x" with "x" | ||
27 | being the channel numerical index. The LVDS clocks must be named | ||
28 | "lvds.x" with "x" being the LVDS encoder numerical index. | ||
29 | |||
30 | Required nodes: | ||
31 | |||
32 | The connections to the DU output video ports are modeled using the OF graph | ||
33 | bindings specified in Documentation/devicetree/bindings/graph.txt. | ||
34 | |||
35 | The following table lists for each supported model the port number | ||
36 | corresponding to each DU output. | ||
37 | |||
38 | Port 0 Port1 Port2 | ||
39 | ----------------------------------------------------------------------------- | ||
40 | R8A7779 (H1) DPAD 0 DPAD 1 - | ||
41 | R8A7790 (H2) DPAD LVDS 0 LVDS 1 | ||
42 | R8A7791 (M2) DPAD LVDS 0 - | ||
43 | |||
44 | |||
45 | Example: R8A7790 (R-Car H2) DU | ||
46 | |||
47 | du: du@feb00000 { | ||
48 | compatible = "renesas,du-r8a7790"; | ||
49 | reg = <0 0xfeb00000 0 0x70000>, | ||
50 | <0 0xfeb90000 0 0x1c>, | ||
51 | <0 0xfeb94000 0 0x1c>; | ||
52 | reg-names = "du", "lvds.0", "lvds.1"; | ||
53 | interrupt-parent = <&gic>; | ||
54 | interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, | ||
55 | <0 268 IRQ_TYPE_LEVEL_HIGH>, | ||
56 | <0 269 IRQ_TYPE_LEVEL_HIGH>; | ||
57 | clocks = <&mstp7_clks R8A7790_CLK_DU0>, | ||
58 | <&mstp7_clks R8A7790_CLK_DU1>, | ||
59 | <&mstp7_clks R8A7790_CLK_DU2>, | ||
60 | <&mstp7_clks R8A7790_CLK_LVDS0>, | ||
61 | <&mstp7_clks R8A7790_CLK_LVDS1>; | ||
62 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; | ||
63 | |||
64 | ports { | ||
65 | #address-cells = <1>; | ||
66 | #size-cells = <0>; | ||
67 | |||
68 | port@0 { | ||
69 | reg = <0>; | ||
70 | du_out_rgb: endpoint { | ||
71 | }; | ||
72 | }; | ||
73 | port@1 { | ||
74 | reg = <1>; | ||
75 | du_out_lvds0: endpoint { | ||
76 | }; | ||
77 | }; | ||
78 | port@2 { | ||
79 | reg = <2>; | ||
80 | du_out_lvds1: endpoint { | ||
81 | }; | ||
82 | }; | ||
83 | }; | ||
84 | }; | ||
diff --git a/Documentation/devicetree/bindings/video/thine,thc63lvdm83d b/Documentation/devicetree/bindings/video/thine,thc63lvdm83d new file mode 100644 index 000000000000..527e236e9a2a --- /dev/null +++ b/Documentation/devicetree/bindings/video/thine,thc63lvdm83d | |||
@@ -0,0 +1,50 @@ | |||
1 | THine Electronics THC63LVDM83D LVDS serializer | ||
2 | ---------------------------------------------- | ||
3 | |||
4 | The THC63LVDM83D is an LVDS serializer designed to support pixel data | ||
5 | transmission between a host and a flat panel. | ||
6 | |||
7 | Required properties: | ||
8 | |||
9 | - compatible: Should be "thine,thc63lvdm83d" | ||
10 | |||
11 | Optional properties: | ||
12 | |||
13 | - pwdn-gpios: Power down control GPIO | ||
14 | |||
15 | Required nodes: | ||
16 | |||
17 | The THC63LVDM83D has two video ports. Their connections are modeled using the | ||
18 | OFgraph bindings specified in Documentation/devicetree/bindings/graph.txt. | ||
19 | |||
20 | - Video port 0 for CMOS/TTL input | ||
21 | - Video port 1 for LVDS output | ||
22 | |||
23 | |||
24 | Example | ||
25 | ------- | ||
26 | |||
27 | lvds_enc: encoder@0 { | ||
28 | compatible = "thine,thc63lvdm83d"; | ||
29 | |||
30 | ports { | ||
31 | #address-cells = <1>; | ||
32 | #size-cells = <0>; | ||
33 | |||
34 | port@0 { | ||
35 | reg = <0>; | ||
36 | |||
37 | lvds_enc_in: endpoint@0 { | ||
38 | remote-endpoint = <&rgb_out>; | ||
39 | }; | ||
40 | }; | ||
41 | |||
42 | port@1 { | ||
43 | reg = <1>; | ||
44 | |||
45 | lvds_enc_out: endpoint@0 { | ||
46 | remote-endpoint = <&panel_in>; | ||
47 | }; | ||
48 | }; | ||
49 | }; | ||
50 | }; | ||
diff --git a/Documentation/devicetree/bindings/video/vga-connector.txt b/Documentation/devicetree/bindings/video/vga-connector.txt new file mode 100644 index 000000000000..c727f298e7ad --- /dev/null +++ b/Documentation/devicetree/bindings/video/vga-connector.txt | |||
@@ -0,0 +1,36 @@ | |||
1 | VGA Connector | ||
2 | ============= | ||
3 | |||
4 | Required properties: | ||
5 | |||
6 | - compatible: "vga-connector" | ||
7 | |||
8 | Optional properties: | ||
9 | |||
10 | - label: a symbolic name for the connector corresponding to a hardware label | ||
11 | - ddc-i2c-bus: phandle to the I2C bus that is connected to VGA DDC | ||
12 | |||
13 | Required nodes: | ||
14 | |||
15 | The VGA connector internal connections are modeled using the OF graph bindings | ||
16 | specified in Documentation/devicetree/bindings/graph.txt. | ||
17 | |||
18 | The VGA connector has a single port that must be connected to a video source | ||
19 | port. | ||
20 | |||
21 | |||
22 | Example | ||
23 | ------- | ||
24 | |||
25 | vga0: connector@0 { | ||
26 | compatible = "vga-connector"; | ||
27 | label = "vga"; | ||
28 | |||
29 | ddc-i2c-bus = <&i2c3>; | ||
30 | |||
31 | port { | ||
32 | vga_connector_in: endpoint { | ||
33 | remote-endpoint = <&adv7123_out>; | ||
34 | }; | ||
35 | }; | ||
36 | }; | ||