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-rw-r--r--Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt15
-rw-r--r--Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt9
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,cmt.txt44
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,mtu2.txt9
-rw-r--r--Documentation/devicetree/bindings/timer/renesas,tmu.txt11
5 files changed, 73 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt b/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
new file mode 100644
index 000000000000..a092053f7902
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
@@ -0,0 +1,15 @@
1Amlogic Meson6 SoCs Timer Controller
2
3Required properties:
4
5- compatible : should be "amlogic,meson6-timer"
6- reg : Specifies base physical address and size of the registers.
7- interrupts : The interrupt of the first timer
8
9Example:
10
11timer@c1109940 {
12 compatible = "amlogic,meson6-timer";
13 reg = <0xc1109940 0x14>;
14 interrupts = <0 10 1>;
15};
diff --git a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
index f455182b1086..e9c78ce880e6 100644
--- a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
+++ b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
@@ -2,8 +2,10 @@ Marvell Armada 370 and Armada XP Timers
2--------------------------------------- 2---------------------------------------
3 3
4Required properties: 4Required properties:
5- compatible: Should be either "marvell,armada-370-timer" or 5- compatible: Should be one of the following
6 "marvell,armada-xp-timer" as appropriate. 6 "marvell,armada-370-timer",
7 "marvell,armada-375-timer",
8 "marvell,armada-xp-timer".
7- interrupts: Should contain the list of Global Timer interrupts and 9- interrupts: Should contain the list of Global Timer interrupts and
8 then local timer interrupts 10 then local timer interrupts
9- reg: Should contain location and length for timers register. First 11- reg: Should contain location and length for timers register. First
@@ -13,7 +15,8 @@ Required properties:
13Clocks required for compatible = "marvell,armada-370-timer": 15Clocks required for compatible = "marvell,armada-370-timer":
14- clocks : Must contain a single entry describing the clock input 16- clocks : Must contain a single entry describing the clock input
15 17
16Clocks required for compatible = "marvell,armada-xp-timer": 18Clocks required for compatibles = "marvell,armada-xp-timer",
19 "marvell,armada-375-timer":
17- clocks : Must contain an entry for each entry in clock-names. 20- clocks : Must contain an entry for each entry in clock-names.
18- clock-names : Must include the following entries: 21- clock-names : Must include the following entries:
19 "nbclk" (L2/coherency fabric clock), 22 "nbclk" (L2/coherency fabric clock),
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index a17418b0ece3..1a05c1b243c1 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -11,15 +11,47 @@ datasheets.
11 11
12Required Properties: 12Required Properties:
13 13
14 - compatible: must contain one of the following. 14 - compatible: must contain one or more of the following:
15 - "renesas,cmt-32" for the 32-bit CMT 15 - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
16 (CMT0)
17 - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
18 (CMT0)
19 - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
20 (CMT0)
21 - "renesas,cmt-32" for all 32-bit CMT without fast clock support
16 (CMT0 on sh7372, sh73a0 and r8a7740) 22 (CMT0 on sh7372, sh73a0 and r8a7740)
17 - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support 23 This is a fallback for the above renesas,cmt-32-* entries.
24
25 - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
26 clock support (CMT[234])
27 - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
28 clock support (CMT[234])
29 - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
30 clock support (CMT[234])
31 - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
18 (CMT[234] on sh7372, sh73a0 and r8a7740) 32 (CMT[234] on sh7372, sh73a0 and r8a7740)
19 - "renesas,cmt-48" for the 48-bit CMT 33 This is a fallback for the above renesas,cmt-32-fast-* entries.
34
35 - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
36 (CMT1)
37 - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
38 (CMT1)
39 - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
40 (CMT1)
41 - "renesas,cmt-48" for all non-second generation 48-bit CMT
20 (CMT1 on sh7372, sh73a0 and r8a7740) 42 (CMT1 on sh7372, sh73a0 and r8a7740)
21 - "renesas,cmt-48-gen2" for the second generation 48-bit CMT 43 This is a fallback for the above renesas,cmt-48-* entries.
44
45 - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
46 (CMT[01])
47 - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT
48 (CMT[01])
49 - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT
50 (CMT[01])
51 - "renesas,cmt-48-gen2" for all second generation 48-bit CMT
22 (CMT[01] on r8a73a4, r8a7790 and r8a7791) 52 (CMT[01] on r8a73a4, r8a7790 and r8a7791)
53 This is a fallback for the renesas,cmt-48-r8a73a4,
54 renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
23 55
24 - reg: base address and length of the registers block for the timer module. 56 - reg: base address and length of the registers block for the timer module.
25 - interrupts: interrupt-specifier for the timer, one per channel. 57 - interrupts: interrupt-specifier for the timer, one per channel.
@@ -36,7 +68,7 @@ Example: R8A7790 (R-Car H2) CMT0 node
36 them channels 0 and 1 in the documentation. 68 them channels 0 and 1 in the documentation.
37 69
38 cmt0: timer@ffca0000 { 70 cmt0: timer@ffca0000 {
39 compatible = "renesas,cmt-48-gen2"; 71 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
40 reg = <0 0xffca0000 0 0x1004>; 72 reg = <0 0xffca0000 0 0x1004>;
41 interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, 73 interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
42 <0 142 IRQ_TYPE_LEVEL_HIGH>; 74 <0 142 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/Documentation/devicetree/bindings/timer/renesas,mtu2.txt b/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
index 917453f826bc..ba0a34d97eb8 100644
--- a/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
@@ -1,4 +1,4 @@
1* Renesas R-Car Multi-Function Timer Pulse Unit 2 (MTU2) 1* Renesas Multi-Function Timer Pulse Unit 2 (MTU2)
2 2
3The MTU2 is a multi-purpose, multi-channel timer/counter with configurable 3The MTU2 is a multi-purpose, multi-channel timer/counter with configurable
4clock inputs and programmable compare match. 4clock inputs and programmable compare match.
@@ -8,7 +8,10 @@ are independent. The MTU2 hardware supports five channels indexed from 0 to 4.
8 8
9Required Properties: 9Required Properties:
10 10
11 - compatible: must contain "renesas,mtu2" 11 - compatible: must be one or more of the following:
12 - "renesas,mtu2-r7s72100" for the r7s72100 MTU2
13 - "renesas,mtu2" for any MTU2
14 This is a fallback for the above renesas,mtu2-* entries
12 15
13 - reg: base address and length of the registers block for the timer module. 16 - reg: base address and length of the registers block for the timer module.
14 17
@@ -26,7 +29,7 @@ Required Properties:
26Example: R7S72100 (RZ/A1H) MTU2 node 29Example: R7S72100 (RZ/A1H) MTU2 node
27 30
28 mtu2: timer@fcff0000 { 31 mtu2: timer@fcff0000 {
29 compatible = "renesas,mtu2"; 32 compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
30 reg = <0xfcff0000 0x400>; 33 reg = <0xfcff0000 0x400>;
31 interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>, 34 interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,
32 <0 146 IRQ_TYPE_LEVEL_HIGH>, 35 <0 146 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.txt b/Documentation/devicetree/bindings/timer/renesas,tmu.txt
index 425d0c5f4aee..cd5f20bf2582 100644
--- a/Documentation/devicetree/bindings/timer/renesas,tmu.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,tmu.txt
@@ -1,4 +1,4 @@
1* Renesas R-Car Timer Unit (TMU) 1* Renesas R-Mobile/R-Car Timer Unit (TMU)
2 2
3The TMU is a 32-bit timer/counter with configurable clock inputs and 3The TMU is a 32-bit timer/counter with configurable clock inputs and
4programmable compare match. 4programmable compare match.
@@ -8,7 +8,12 @@ are independent. The TMU hardware supports up to three channels.
8 8
9Required Properties: 9Required Properties:
10 10
11 - compatible: must contain "renesas,tmu" 11 - compatible: must contain one or more of the following:
12 - "renesas,tmu-r8a7740" for the r8a7740 TMU
13 - "renesas,tmu-r8a7778" for the r8a7778 TMU
14 - "renesas,tmu-r8a7779" for the r8a7779 TMU
15 - "renesas,tmu" for any TMU.
16 This is a fallback for the above renesas,tmu-* entries
12 17
13 - reg: base address and length of the registers block for the timer module. 18 - reg: base address and length of the registers block for the timer module.
14 19
@@ -27,7 +32,7 @@ Optional Properties:
27Example: R8A7779 (R-Car H1) TMU0 node 32Example: R8A7779 (R-Car H1) TMU0 node
28 33
29 tmu0: timer@ffd80000 { 34 tmu0: timer@ffd80000 {
30 compatible = "renesas,tmu"; 35 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
31 reg = <0xffd80000 0x30>; 36 reg = <0xffd80000 0x30>;
32 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, 37 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
33 <0 33 IRQ_TYPE_LEVEL_HIGH>, 38 <0 33 IRQ_TYPE_LEVEL_HIGH>,