6 files changed, 49 insertions, 2 deletions

diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 6cd3525d0e09..ee4fc0576c7d 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -18,6 +18,10 @@ Required Properties:
           specific extensions.
         - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
           specific extensions.
+        - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
+          specific extensions.
+        - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
+          specific extensions having an SMU.
 
 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
   unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
diff --git a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
new file mode 100644
index 000000000000..85de99fcaa2f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
@@ -0,0 +1,29 @@
+* Imagination specific extensions to the Synopsys Designware Mobile Storage
+  Host Controller
+
+The Synopsys designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsys dw mshc controller properties described
+by synopsys-dw-mshc.txt and the properties used by the Imagination specific
+extensions to the Synopsys Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be
+        - "img,pistachio-dw-mshc": for Pistachio SoCs
+
+Example:
+
+        mmc@18142000 {
+                compatible = "img,pistachio-dw-mshc";
+                reg = <0x18142000 0x400>;
+                interrupts = <GIC_SHARED 39 IRQ_TYPE_LEVEL_HIGH>;
+
+                clocks = <&system_clk>, <&sdhost_clk>;
+                clock-names = "biu", "ciu";
+
+                fifo-depth = <0x20>;
+                bus-width = <4>;
+                num-slots = <1>;
+                disable-wp;
+        };
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt
index 431716e37a39..b52628b18a53 100644
--- a/Documentation/devicetree/bindings/mmc/mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc.txt
@@ -40,6 +40,8 @@ Optional properties:
 - mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
 - mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
 - mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
+- dsr: Value the card's (optional) Driver Stage Register (DSR) should be
+  programmed with. Valid range: [0 .. 0xffff].
 
 *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
 polarity properties, we have to fix the meaning of the "normal" and "inverted"
diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index c559f3f36309..c327c2d6f23d 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -10,12 +10,14 @@ extensions to the Synopsys Designware Mobile Storage Host Controller.
 Required Properties:
 
 * compatible: should be
-        - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following
+        - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
+                                                        before RK3288
+        - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
 
 Example:
 
         rkdwmmc0@12200000 {
-                compatible = "rockchip,rk2928-dw-mshc";
+                compatible = "rockchip,rk3288-dw-mshc";
                 reg = <0x12200000 0x1000>;
                 interrupts = <0 75 0>;
                 #address-cells = <1>;
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
index 86223c3eda90..4dd6deb90719 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
@@ -12,6 +12,10 @@ Required properties:
   * for "marvell,armada-380-sdhci", two register areas. The first one
     for the SDHCI registers themselves, and the second one for the
     AXI/Mbus bridge registers of the SDHCI unit.
+- clocks: Array of clocks required for SDHCI; requires at least one for
+    I/O clock.
+- clock-names: Array of names corresponding to clocks property; shall be
+    "io" for I/O clock and "core" for optional core clock.
 
 Optional properties:
 - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
@@ -23,6 +27,8 @@ sdhci@d4280800 {
         reg = <0xd4280800 0x800>;
         bus-width = <8>;
         interrupts = <27>;
+        clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
+        clock-names = "io", "core";
         non-removable;
         mrvl,clk-delay-cycles = <31>;
 };
@@ -32,5 +38,6 @@ sdhci@d8000 {
         reg = <0xd8000 0x1000>, <0xdc000 0x100>;
         interrupts = <0 25 0x4>;
         clocks = <&gateclk 17>;
+        clock-names = "io";
         mrvl,clk-delay-cycles = <0x1F>;
 };
diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index fa0f327cde01..400b640fabc7 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -19,6 +19,9 @@ Required properties:
                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
                 "renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
+                "renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
+                "renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
+                "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
 
 Optional properties:
 - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable