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Diffstat (limited to 'Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt')
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1 | Qualcomm PM8xxx PMIC multi-function devices | ||
2 | |||
3 | The PM8xxx family of Power Management ICs are used to provide regulated | ||
4 | voltages and other various functionality to Qualcomm SoCs. | ||
5 | |||
6 | = PROPERTIES | ||
7 | |||
8 | - compatible: | ||
9 | Usage: required | ||
10 | Value type: <string> | ||
11 | Definition: must be one of: | ||
12 | "qcom,pm8058" | ||
13 | "qcom,pm8921" | ||
14 | |||
15 | - #address-cells: | ||
16 | Usage: required | ||
17 | Value type: <u32> | ||
18 | Definition: must be 1 | ||
19 | |||
20 | - #size-cells: | ||
21 | Usage: required | ||
22 | Value type: <u32> | ||
23 | Definition: must be 0 | ||
24 | |||
25 | - interrupts: | ||
26 | Usage: required | ||
27 | Value type: <prop-encoded-array> | ||
28 | Definition: specifies the interrupt that indicates a subdevice | ||
29 | has generated an interrupt (summary interrupt). The | ||
30 | format of the specifier is defined by the binding document | ||
31 | describing the node's interrupt parent. | ||
32 | |||
33 | - #interrupt-cells: | ||
34 | Usage: required | ||
35 | Value type : <u32> | ||
36 | Definition: must be 2. Specifies the number of cells needed to encode | ||
37 | an interrupt source. The 1st cell contains the interrupt | ||
38 | number. The 2nd cell is the trigger type and level flags | ||
39 | encoded as follows: | ||
40 | |||
41 | 1 = low-to-high edge triggered | ||
42 | 2 = high-to-low edge triggered | ||
43 | 4 = active high level-sensitive | ||
44 | 8 = active low level-sensitive | ||
45 | |||
46 | - interrupt-controller: | ||
47 | Usage: required | ||
48 | Value type: <empty> | ||
49 | Definition: identifies this node as an interrupt controller | ||
50 | |||
51 | = SUBCOMPONENTS | ||
52 | |||
53 | The PMIC contains multiple independent functions, each described in a subnode. | ||
54 | The below bindings specify the set of valid subnodes. | ||
55 | |||
56 | == Real-Time Clock | ||
57 | |||
58 | - compatible: | ||
59 | Usage: required | ||
60 | Value type: <string> | ||
61 | Definition: must be one of: | ||
62 | "qcom,pm8058-rtc" | ||
63 | "qcom,pm8921-rtc" | ||
64 | "qcom,pm8941-rtc" | ||
65 | |||
66 | - reg: | ||
67 | Usage: required | ||
68 | Value type: <prop-encoded-array> | ||
69 | Definition: single entry specifying the base address of the RTC registers | ||
70 | |||
71 | - interrupts: | ||
72 | Usage: required | ||
73 | Value type: <prop-encoded-array> | ||
74 | Definition: single entry specifying the RTC's alarm interrupt | ||
75 | |||
76 | - allow-set-time: | ||
77 | Usage: optional | ||
78 | Value type: <empty> | ||
79 | Definition: indicates that the setting of RTC time is allowed by | ||
80 | the host CPU | ||
81 | |||
82 | = EXAMPLE | ||
83 | |||
84 | pmicintc: pmic@0 { | ||
85 | compatible = "qcom,pm8921"; | ||
86 | interrupts = <104 8>; | ||
87 | #interrupt-cells = <2>; | ||
88 | interrupt-controller; | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | |||
92 | rtc@11d { | ||
93 | compatible = "qcom,pm8921-rtc"; | ||
94 | reg = <0x11d>; | ||
95 | interrupts = <0x27 0>; | ||
96 | }; | ||
97 | }; | ||