1 files changed, 22 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
index 72683be6de35..2995fae7ee47 100644
--- a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
+++ b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
@@ -1,7 +1,18 @@
 * Tegra keyboard controller
+The key controller has maximum 24 pins to make matrix keypad. Any pin
+can be configured as row or column. The maximum column pin can be 8
+and maximum row pins can be 16 for Tegra20/Tegra30.
 
 Required properties:
 - compatible: "nvidia,tegra20-kbc"
+- reg: Register base address of KBC.
+- interrupts: Interrupt number for the KBC.
+- nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
+  array of pin numbers which is used as rows.
+- nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
+  array of pin numbers which is used as column.
+- linux,keymap: The keymap for keys as described in the binding document
+  devicetree/bindings/input/matrix-keymap.txt.
 
 Optional properties, in addition to those specified by the shared
 matrix-keyboard bindings:
@@ -19,5 +30,16 @@ Example:
 keyboard: keyboard {
         compatible = "nvidia,tegra20-kbc";
         reg = <0x7000e200 0x100>;
+        interrupts = <0 85 0x04>;
         nvidia,ghost-filter;
+        nvidia,debounce-delay-ms = <640>;
+        nvidia,kbc-row-pins = <0 1 2>;    /* pin 0, 1, 2 as rows */
+        nvidia,kbc-col-pins = <11 12 13>; /* pin 11, 12, 13 as columns */
+        linux,keymap = <0x00000074
+                        0x00010067
+                        0x00020066
+                        0x01010068
+                        0x02000069
+                        0x02010070
+                        0x02020071>;
 };