1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt
index c280a0e6f42d..e1f343c7a34b 100644
--- a/Documentation/devicetree/bindings/dma/atmel-dma.txt
+++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt
@@ -18,14 +18,14 @@ dma0: dma@ffffec00 {
 DMA clients connected to the Atmel DMA controller must use the format
 described in the dma.txt file, using a three-cell specifier for each channel:
-a phandle plus two interger cells.
+a phandle plus two integer cells.
 The three cells in order are:
 1. A phandle pointing to the DMA controller.
 2. The memory interface (16 most significant bits), the peripheral interface
 (16 less significant bits).
 3. Parameters for the at91 DMA configuration register which are device
-dependant:
+dependent:
  - bit 7-0: peripheral identifier for the hardware handshaking interface. The
  identifier can be different for tx and rx.
  - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.

diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt index c280a0e6f42d..e1f343c7a34b 100644 --- a/Documentation/devicetree/bindings/dma/atmel-dma.txt +++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt
@@ -18,14 +18,14 @@ dma0: dma@ffffec00 {
18		18
19	DMA clients connected to the Atmel DMA controller must use the format	19	DMA clients connected to the Atmel DMA controller must use the format
20	described in the dma.txt file, using a three-cell specifier for each channel:	20	described in the dma.txt file, using a three-cell specifier for each channel:
21	a phandle plus two interger cells.	21	a phandle plus two integer cells.
22	The three cells in order are:	22	The three cells in order are:
23		23
24	1. A phandle pointing to the DMA controller.	24	1. A phandle pointing to the DMA controller.
25	2. The memory interface (16 most significant bits), the peripheral interface	25	2. The memory interface (16 most significant bits), the peripheral interface
26	(16 less significant bits).	26	(16 less significant bits).
27	3. Parameters for the at91 DMA configuration register which are device	27	3. Parameters for the at91 DMA configuration register which are device
28	dependant:	28	dependent:
29	- bit 7-0: peripheral identifier for the hardware handshaking interface. The	29	- bit 7-0: peripheral identifier for the hardware handshaking interface. The
30	identifier can be different for tx and rx.	30	identifier can be different for tx and rx.
31	- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.	31	- bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.