1 files changed, 6 insertions, 157 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 72ce617dea82..536eacd1063f 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -13,163 +13,12 @@ Required Properties:
 - #clock-cells: should be 1.
-The following is the list of clocks generated by the controller. Each clock is
+Each clock is assigned an identifier and client nodes can use this identifier
-assigned an identifier and client nodes use this identifier to specify the
+to specify the clock which they consume.
-clock which they consume.
-       [Core Clocks]
-  Clock                 ID
-  ----------------------------
-  fin_pll               1
-  [Clock Gate for Special Clocks]
-  Clock                 ID
-  ----------------------------
-  sclk_cam_bayer        128
-  sclk_cam0             129
-  sclk_cam1             130
-  sclk_gscl_wa          131
-  sclk_gscl_wb          132
-  sclk_fimd1            133
-  sclk_mipi1            134
-  sclk_dp               135
-  sclk_hdmi             136
-  sclk_pixel            137
-  sclk_audio0           138
-  sclk_mmc0             139
-  sclk_mmc1             140
-  sclk_mmc2             141
-  sclk_mmc3             142
-  sclk_sata             143
-  sclk_usb3             144
-  sclk_jpeg             145
-  sclk_uart0            146
-  sclk_uart1            147
-  sclk_uart2            148
-  sclk_uart3            149
-  sclk_pwm              150
-  sclk_audio1           151
-  sclk_audio2           152
-  sclk_spdif            153
-  sclk_spi0             154
-  sclk_spi1             155
-  sclk_spi2             156
-  div_i2s1              157
-  div_i2s2              158
-  sclk_hdmiphy          159
-  div_pcm0              160
-   [Peripheral Clock Gates]
-  Clock                 ID
-  ----------------------------
-  gscl0                 256
-  gscl1                 257
-  gscl2                 258
-  gscl3                 259
-  gscl_wa               260
-  gscl_wb               261
-  smmu_gscl0            262
-  smmu_gscl1            263
-  smmu_gscl2            264
-  smmu_gscl3            265
-  mfc                   266
-  smmu_mfcl             267
-  smmu_mfcr             268
-  rotator               269
-  jpeg                  270
-  mdma1                 271
-  smmu_rotator          272
-  smmu_jpeg             273
-  smmu_mdma1            274
-  pdma0                 275
-  pdma1                 276
-  sata                  277
-  usbotg                278
-  mipi_hsi              279
-  sdmmc0                280
-  sdmmc1                281
-  sdmmc2                282
-  sdmmc3                283
-  sromc                 284
-  usb2                  285
-  usb3                  286
-  sata_phyctrl          287
-  sata_phyi2c           288
-  uart0                 289
-  uart1                 290
-  uart2                 291
-  uart3                 292
-  uart4                 293
-  i2c0                  294
-  i2c1                  295
-  i2c2                  296
-  i2c3                  297
-  i2c4                  298
-  i2c5                  299
-  i2c6                  300
-  i2c7                  301
-  i2c_hdmi              302
-  adc                   303
-  spi0                  304
-  spi1                  305
-  spi2                  306
-  i2s1                  307
-  i2s2                  308
-  pcm1                  309
-  pcm2                  310
-  pwm                   311
-  spdif                 312
-  ac97                  313
-  hsi2c0                314
-  hsi2c1                315
-  hs12c2                316
-  hs12c3                317
-  chipid                318
-  sysreg                319
-  pmu                   320
-  cmu_top               321
-  cmu_core              322
-  cmu_mem               323
-  tzpc0                 324
-  tzpc1                 325
-  tzpc2                 326
-  tzpc3                 327
-  tzpc4                 328
-  tzpc5                 329
-  tzpc6                 330
-  tzpc7                 331
-  tzpc8                 332
-  tzpc9                 333
-  hdmi_cec              334
-  mct                   335
-  wdt                   336
-  rtc                   337
-  tmu                   338
-  fimd1                 339
-  mie1                  340
-  dsim0                 341
-  dp                    342
-  mixer                 343
-  hdmi                  344
-  g2d                   345
-  mdma0                 346
-  smmu_mdma0            347
-   [Clock Muxes]
-  Clock                 ID
-  ----------------------------
-  mout_hdmi             1024
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/exynos5250.h header and can be used in device
+tree sources.
 Example 1: An example of a clock controller node is listed below.
@@ -187,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
                compatible = "samsung,exynos4210-uart";
                reg = <0x13820000 0x100>;
                interrupts = <0 54 0>;
-                clocks = <&clock 314>, <&clock 153>;
+                clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
                clock-names = "uart", "clk_uart_baud0";
        };

diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 72ce617dea82..536eacd1063f 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -13,163 +13,12 @@ Required Properties:
13		13
14	- #clock-cells: should be 1.	14	- #clock-cells: should be 1.
15		15
16	The following is the list of clocks generated by the controller. Each clock is	16	Each clock is assigned an identifier and client nodes can use this identifier
17	assigned an identifier and client nodes use this identifier to specify the	17	to specify the clock which they consume.
18	clock which they consume.
19
20
21	[Core Clocks]
22
23	Clock ID
24	----------------------------
25
26	fin_pll 1
27
28	[Clock Gate for Special Clocks]
29
30	Clock ID
31	----------------------------
32
33	sclk_cam_bayer 128
34	sclk_cam0 129
35	sclk_cam1 130
36	sclk_gscl_wa 131
37	sclk_gscl_wb 132
38	sclk_fimd1 133
39	sclk_mipi1 134
40	sclk_dp 135
41	sclk_hdmi 136
42	sclk_pixel 137
43	sclk_audio0 138
44	sclk_mmc0 139
45	sclk_mmc1 140
46	sclk_mmc2 141
47	sclk_mmc3 142
48	sclk_sata 143
49	sclk_usb3 144
50	sclk_jpeg 145
51	sclk_uart0 146
52	sclk_uart1 147
53	sclk_uart2 148
54	sclk_uart3 149
55	sclk_pwm 150
56	sclk_audio1 151
57	sclk_audio2 152
58	sclk_spdif 153
59	sclk_spi0 154
60	sclk_spi1 155
61	sclk_spi2 156
62	div_i2s1 157
63	div_i2s2 158
64	sclk_hdmiphy 159
65	div_pcm0 160
66
67
68	[Peripheral Clock Gates]
69
70	Clock ID
71	----------------------------
72
73	gscl0 256
74	gscl1 257
75	gscl2 258
76	gscl3 259
77	gscl_wa 260
78	gscl_wb 261
79	smmu_gscl0 262
80	smmu_gscl1 263
81	smmu_gscl2 264
82	smmu_gscl3 265
83	mfc 266
84	smmu_mfcl 267
85	smmu_mfcr 268
86	rotator 269
87	jpeg 270
88	mdma1 271
89	smmu_rotator 272
90	smmu_jpeg 273
91	smmu_mdma1 274
92	pdma0 275
93	pdma1 276
94	sata 277
95	usbotg 278
96	mipi_hsi 279
97	sdmmc0 280
98	sdmmc1 281
99	sdmmc2 282
100	sdmmc3 283
101	sromc 284
102	usb2 285
103	usb3 286
104	sata_phyctrl 287
105	sata_phyi2c 288
106	uart0 289
107	uart1 290
108	uart2 291
109	uart3 292
110	uart4 293
111	i2c0 294
112	i2c1 295
113	i2c2 296
114	i2c3 297
115	i2c4 298
116	i2c5 299
117	i2c6 300
118	i2c7 301
119	i2c_hdmi 302
120	adc 303
121	spi0 304
122	spi1 305
123	spi2 306
124	i2s1 307
125	i2s2 308
126	pcm1 309
127	pcm2 310
128	pwm 311
129	spdif 312
130	ac97 313
131	hsi2c0 314
132	hsi2c1 315
133	hs12c2 316
134	hs12c3 317
135	chipid 318
136	sysreg 319
137	pmu 320
138	cmu_top 321
139	cmu_core 322
140	cmu_mem 323
141	tzpc0 324
142	tzpc1 325
143	tzpc2 326
144	tzpc3 327
145	tzpc4 328
146	tzpc5 329
147	tzpc6 330
148	tzpc7 331
149	tzpc8 332
150	tzpc9 333
151	hdmi_cec 334
152	mct 335
153	wdt 336
154	rtc 337
155	tmu 338
156	fimd1 339
157	mie1 340
158	dsim0 341
159	dp 342
160	mixer 343
161	hdmi 344
162	g2d 345
163	mdma0 346
164	smmu_mdma0 347
165
166
167	[Clock Muxes]
168
169	Clock ID
170	----------------------------
171	mout_hdmi 1024
172		18
		19	All available clocks are defined as preprocessor macros in
		20	dt-bindings/clock/exynos5250.h header and can be used in device
		21	tree sources.
173		22
174	Example 1: An example of a clock controller node is listed below.	23	Example 1: An example of a clock controller node is listed below.
175		24
@@ -187,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
187	compatible = "samsung,exynos4210-uart";	36	compatible = "samsung,exynos4210-uart";
188	reg = <0x13820000 0x100>;	37	reg = <0x13820000 0x100>;
189	interrupts = <0 54 0>;	38	interrupts = <0 54 0>;
190	clocks = <&clock 314>, <&clock 153>;	39	clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
191	clock-names = "uart", "clk_uart_baud0";	40	clock-names = "uart", "clk_uart_baud0";
192	};	41	};