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diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
index a1201802f90d..75e2e1999f87 100644
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@@ -2,7 +2,7 @@
2 2
3The Samsung Audio Subsystem clock controller generates and supplies clocks 3The Samsung Audio Subsystem clock controller generates and supplies clocks
4to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock 4to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
5binding described here is applicable to all SoC's in Exynos family. 5binding described here is applicable to all SoCs in Exynos family.
6 6
7Required Properties: 7Required Properties:
8 8