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1* MSM Timer
2
3Properties:
4
5- compatible : Should at least contain "qcom,msm-timer". More specific
6 properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general
7 purpose timer and a debug timer respectively.
8
9- interrupts : Interrupt indicating a match event.
10
11- reg : Specifies the base address of the timer registers. The second region
12 specifies an optional register used to configure the clock divider.
13
14- clock-frequency : The frequency of the timer in Hz.
15
16Optional:
17
18- cpu-offset : per-cpu offset used when the timer is accessed without the
19 CPU remapping facilities. The offset is cpu-offset * cpu-nr.
20
21Example:
22
23 timer@200a004 {
24 compatible = "qcom,msm-gpt", "qcom,msm-timer";
25 interrupts = <1 2 0x301>;
26 reg = <0x0200a004 0x10>;
27 clock-frequency = <32768>;
28 cpu-offset = <0x40000>;
29 };
30
31 timer@200a024 {
32 compatible = "qcom,msm-dgt", "qcom,msm-timer";
33 interrupts = <1 3 0x301>;
34 reg = <0x0200a024 0x10>,
35 <0x0200a034 0x4>;
36 clock-frequency = <6750000>;
37 cpu-offset = <0x40000>;
38 };