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-rw-r--r--Documentation/DMA-attributes.txt10
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index b768cc0e402b..811a5d458dae 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -31,3 +31,13 @@ may be weakly ordered, that is that reads and writes may pass each other.
31Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING, 31Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
32those that do not will simply ignore the attribute and exhibit default 32those that do not will simply ignore the attribute and exhibit default
33behavior. 33behavior.
34
35DMA_ATTR_WRITE_COMBINE
36----------------------
37
38DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
39buffered to improve performance.
40
41Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
42those that do not will simply ignore the attribute and exhibit default
43behavior.