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-rw-r--r--Documentation/devicetree/bindings/clock/exynos5250-clock.txt163
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi105
2 files changed, 60 insertions, 208 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 72ce617dea82..536eacd1063f 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -13,163 +13,12 @@ Required Properties:
13 13
14- #clock-cells: should be 1. 14- #clock-cells: should be 1.
15 15
16The following is the list of clocks generated by the controller. Each clock is 16Each clock is assigned an identifier and client nodes can use this identifier
17assigned an identifier and client nodes use this identifier to specify the 17to specify the clock which they consume.
18clock which they consume.
19
20
21 [Core Clocks]
22
23 Clock ID
24 ----------------------------
25
26 fin_pll 1
27
28 [Clock Gate for Special Clocks]
29
30 Clock ID
31 ----------------------------
32
33 sclk_cam_bayer 128
34 sclk_cam0 129
35 sclk_cam1 130
36 sclk_gscl_wa 131
37 sclk_gscl_wb 132
38 sclk_fimd1 133
39 sclk_mipi1 134
40 sclk_dp 135
41 sclk_hdmi 136
42 sclk_pixel 137
43 sclk_audio0 138
44 sclk_mmc0 139
45 sclk_mmc1 140
46 sclk_mmc2 141
47 sclk_mmc3 142
48 sclk_sata 143
49 sclk_usb3 144
50 sclk_jpeg 145
51 sclk_uart0 146
52 sclk_uart1 147
53 sclk_uart2 148
54 sclk_uart3 149
55 sclk_pwm 150
56 sclk_audio1 151
57 sclk_audio2 152
58 sclk_spdif 153
59 sclk_spi0 154
60 sclk_spi1 155
61 sclk_spi2 156
62 div_i2s1 157
63 div_i2s2 158
64 sclk_hdmiphy 159
65 div_pcm0 160
66
67
68 [Peripheral Clock Gates]
69
70 Clock ID
71 ----------------------------
72
73 gscl0 256
74 gscl1 257
75 gscl2 258
76 gscl3 259
77 gscl_wa 260
78 gscl_wb 261
79 smmu_gscl0 262
80 smmu_gscl1 263
81 smmu_gscl2 264
82 smmu_gscl3 265
83 mfc 266
84 smmu_mfcl 267
85 smmu_mfcr 268
86 rotator 269
87 jpeg 270
88 mdma1 271
89 smmu_rotator 272
90 smmu_jpeg 273
91 smmu_mdma1 274
92 pdma0 275
93 pdma1 276
94 sata 277
95 usbotg 278
96 mipi_hsi 279
97 sdmmc0 280
98 sdmmc1 281
99 sdmmc2 282
100 sdmmc3 283
101 sromc 284
102 usb2 285
103 usb3 286
104 sata_phyctrl 287
105 sata_phyi2c 288
106 uart0 289
107 uart1 290
108 uart2 291
109 uart3 292
110 uart4 293
111 i2c0 294
112 i2c1 295
113 i2c2 296
114 i2c3 297
115 i2c4 298
116 i2c5 299
117 i2c6 300
118 i2c7 301
119 i2c_hdmi 302
120 adc 303
121 spi0 304
122 spi1 305
123 spi2 306
124 i2s1 307
125 i2s2 308
126 pcm1 309
127 pcm2 310
128 pwm 311
129 spdif 312
130 ac97 313
131 hsi2c0 314
132 hsi2c1 315
133 hs12c2 316
134 hs12c3 317
135 chipid 318
136 sysreg 319
137 pmu 320
138 cmu_top 321
139 cmu_core 322
140 cmu_mem 323
141 tzpc0 324
142 tzpc1 325
143 tzpc2 326
144 tzpc3 327
145 tzpc4 328
146 tzpc5 329
147 tzpc6 330
148 tzpc7 331
149 tzpc8 332
150 tzpc9 333
151 hdmi_cec 334
152 mct 335
153 wdt 336
154 rtc 337
155 tmu 338
156 fimd1 339
157 mie1 340
158 dsim0 341
159 dp 342
160 mixer 343
161 hdmi 344
162 g2d 345
163 mdma0 346
164 smmu_mdma0 347
165
166
167 [Clock Muxes]
168
169 Clock ID
170 ----------------------------
171 mout_hdmi 1024
172 18
19All available clocks are defined as preprocessor macros in
20dt-bindings/clock/exynos5250.h header and can be used in device
21tree sources.
173 22
174Example 1: An example of a clock controller node is listed below. 23Example 1: An example of a clock controller node is listed below.
175 24
@@ -187,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
187 compatible = "samsung,exynos4210-uart"; 36 compatible = "samsung,exynos4210-uart";
188 reg = <0x13820000 0x100>; 37 reg = <0x13820000 0x100>;
189 interrupts = <0 54 0>; 38 interrupts = <0 54 0>;
190 clocks = <&clock 314>, <&clock 153>; 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
191 clock-names = "uart", "clk_uart_baud0"; 40 clock-names = "uart", "clk_uart_baud0";
192 }; 41 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 8f6300fb2315..987cfbe9634b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -17,6 +17,7 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18*/ 18*/
19 19
20#include <dt-bindings/clock/exynos5250.h>
20#include "exynos5.dtsi" 21#include "exynos5.dtsi"
21#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
22 23
@@ -90,7 +91,8 @@
90 compatible = "samsung,exynos5250-audss-clock"; 91 compatible = "samsung,exynos5250-audss-clock";
91 reg = <0x03810000 0x0C>; 92 reg = <0x03810000 0x0C>;
92 #clock-cells = <1>; 93 #clock-cells = <1>;
93 clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>; 94 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
95 <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
94 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 96 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
95 }; 97 };
96 98
@@ -115,7 +117,7 @@
115 interrupt-parent = <&mct_map>; 117 interrupt-parent = <&mct_map>;
116 interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 118 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
117 <4 0>, <5 0>; 119 <4 0>, <5 0>;
118 clocks = <&clock 1>, <&clock 335>; 120 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
119 clock-names = "fin_pll", "mct"; 121 clock-names = "fin_pll", "mct";
120 122
121 mct_map: mct-map { 123 mct_map: mct-map {
@@ -176,7 +178,7 @@
176 compatible = "samsung,exynos5250-wdt"; 178 compatible = "samsung,exynos5250-wdt";
177 reg = <0x101D0000 0x100>; 179 reg = <0x101D0000 0x100>;
178 interrupts = <0 42 0>; 180 interrupts = <0 42 0>;
179 clocks = <&clock 336>; 181 clocks = <&clock CLK_WDT>;
180 clock-names = "watchdog"; 182 clock-names = "watchdog";
181 samsung,syscon-phandle = <&pmu_system_controller>; 183 samsung,syscon-phandle = <&pmu_system_controller>;
182 }; 184 };
@@ -185,7 +187,7 @@
185 compatible = "samsung,exynos5250-g2d"; 187 compatible = "samsung,exynos5250-g2d";
186 reg = <0x10850000 0x1000>; 188 reg = <0x10850000 0x1000>;
187 interrupts = <0 91 0>; 189 interrupts = <0 91 0>;
188 clocks = <&clock 345>; 190 clocks = <&clock CLK_G2D>;
189 clock-names = "fimg2d"; 191 clock-names = "fimg2d";
190 }; 192 };
191 193
@@ -194,12 +196,12 @@
194 reg = <0x11000000 0x10000>; 196 reg = <0x11000000 0x10000>;
195 interrupts = <0 96 0>; 197 interrupts = <0 96 0>;
196 samsung,power-domain = <&pd_mfc>; 198 samsung,power-domain = <&pd_mfc>;
197 clocks = <&clock 266>; 199 clocks = <&clock CLK_MFC>;
198 clock-names = "mfc"; 200 clock-names = "mfc";
199 }; 201 };
200 202
201 rtc@101E0000 { 203 rtc@101E0000 {
202 clocks = <&clock 337>; 204 clocks = <&clock CLK_RTC>;
203 clock-names = "rtc"; 205 clock-names = "rtc";
204 status = "disabled"; 206 status = "disabled";
205 }; 207 };
@@ -208,27 +210,27 @@
208 compatible = "samsung,exynos5250-tmu"; 210 compatible = "samsung,exynos5250-tmu";
209 reg = <0x10060000 0x100>; 211 reg = <0x10060000 0x100>;
210 interrupts = <0 65 0>; 212 interrupts = <0 65 0>;
211 clocks = <&clock 338>; 213 clocks = <&clock CLK_TMU>;
212 clock-names = "tmu_apbif"; 214 clock-names = "tmu_apbif";
213 }; 215 };
214 216
215 serial@12C00000 { 217 serial@12C00000 {
216 clocks = <&clock 289>, <&clock 146>; 218 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
217 clock-names = "uart", "clk_uart_baud0"; 219 clock-names = "uart", "clk_uart_baud0";
218 }; 220 };
219 221
220 serial@12C10000 { 222 serial@12C10000 {
221 clocks = <&clock 290>, <&clock 147>; 223 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
222 clock-names = "uart", "clk_uart_baud0"; 224 clock-names = "uart", "clk_uart_baud0";
223 }; 225 };
224 226
225 serial@12C20000 { 227 serial@12C20000 {
226 clocks = <&clock 291>, <&clock 148>; 228 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
227 clock-names = "uart", "clk_uart_baud0"; 229 clock-names = "uart", "clk_uart_baud0";
228 }; 230 };
229 231
230 serial@12C30000 { 232 serial@12C30000 {
231 clocks = <&clock 292>, <&clock 149>; 233 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
232 clock-names = "uart", "clk_uart_baud0"; 234 clock-names = "uart", "clk_uart_baud0";
233 }; 235 };
234 236
@@ -236,7 +238,7 @@
236 compatible = "samsung,exynos5-sata-ahci"; 238 compatible = "samsung,exynos5-sata-ahci";
237 reg = <0x122F0000 0x1ff>; 239 reg = <0x122F0000 0x1ff>;
238 interrupts = <0 115 0>; 240 interrupts = <0 115 0>;
239 clocks = <&clock 277>, <&clock 143>; 241 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
240 clock-names = "sata", "sclk_sata"; 242 clock-names = "sata", "sclk_sata";
241 }; 243 };
242 244
@@ -251,7 +253,7 @@
251 interrupts = <0 56 0>; 253 interrupts = <0 56 0>;
252 #address-cells = <1>; 254 #address-cells = <1>;
253 #size-cells = <0>; 255 #size-cells = <0>;
254 clocks = <&clock 294>; 256 clocks = <&clock CLK_I2C0>;
255 clock-names = "i2c"; 257 clock-names = "i2c";
256 pinctrl-names = "default"; 258 pinctrl-names = "default";
257 pinctrl-0 = <&i2c0_bus>; 259 pinctrl-0 = <&i2c0_bus>;
@@ -264,7 +266,7 @@
264 interrupts = <0 57 0>; 266 interrupts = <0 57 0>;
265 #address-cells = <1>; 267 #address-cells = <1>;
266 #size-cells = <0>; 268 #size-cells = <0>;
267 clocks = <&clock 295>; 269 clocks = <&clock CLK_I2C1>;
268 clock-names = "i2c"; 270 clock-names = "i2c";
269 pinctrl-names = "default"; 271 pinctrl-names = "default";
270 pinctrl-0 = <&i2c1_bus>; 272 pinctrl-0 = <&i2c1_bus>;
@@ -277,7 +279,7 @@
277 interrupts = <0 58 0>; 279 interrupts = <0 58 0>;
278 #address-cells = <1>; 280 #address-cells = <1>;
279 #size-cells = <0>; 281 #size-cells = <0>;
280 clocks = <&clock 296>; 282 clocks = <&clock CLK_I2C2>;
281 clock-names = "i2c"; 283 clock-names = "i2c";
282 pinctrl-names = "default"; 284 pinctrl-names = "default";
283 pinctrl-0 = <&i2c2_bus>; 285 pinctrl-0 = <&i2c2_bus>;
@@ -290,7 +292,7 @@
290 interrupts = <0 59 0>; 292 interrupts = <0 59 0>;
291 #address-cells = <1>; 293 #address-cells = <1>;
292 #size-cells = <0>; 294 #size-cells = <0>;
293 clocks = <&clock 297>; 295 clocks = <&clock CLK_I2C3>;
294 clock-names = "i2c"; 296 clock-names = "i2c";
295 pinctrl-names = "default"; 297 pinctrl-names = "default";
296 pinctrl-0 = <&i2c3_bus>; 298 pinctrl-0 = <&i2c3_bus>;
@@ -303,7 +305,7 @@
303 interrupts = <0 60 0>; 305 interrupts = <0 60 0>;
304 #address-cells = <1>; 306 #address-cells = <1>;
305 #size-cells = <0>; 307 #size-cells = <0>;
306 clocks = <&clock 298>; 308 clocks = <&clock CLK_I2C4>;
307 clock-names = "i2c"; 309 clock-names = "i2c";
308 pinctrl-names = "default"; 310 pinctrl-names = "default";
309 pinctrl-0 = <&i2c4_bus>; 311 pinctrl-0 = <&i2c4_bus>;
@@ -316,7 +318,7 @@
316 interrupts = <0 61 0>; 318 interrupts = <0 61 0>;
317 #address-cells = <1>; 319 #address-cells = <1>;
318 #size-cells = <0>; 320 #size-cells = <0>;
319 clocks = <&clock 299>; 321 clocks = <&clock CLK_I2C5>;
320 clock-names = "i2c"; 322 clock-names = "i2c";
321 pinctrl-names = "default"; 323 pinctrl-names = "default";
322 pinctrl-0 = <&i2c5_bus>; 324 pinctrl-0 = <&i2c5_bus>;
@@ -329,7 +331,7 @@
329 interrupts = <0 62 0>; 331 interrupts = <0 62 0>;
330 #address-cells = <1>; 332 #address-cells = <1>;
331 #size-cells = <0>; 333 #size-cells = <0>;
332 clocks = <&clock 300>; 334 clocks = <&clock CLK_I2C6>;
333 clock-names = "i2c"; 335 clock-names = "i2c";
334 pinctrl-names = "default"; 336 pinctrl-names = "default";
335 pinctrl-0 = <&i2c6_bus>; 337 pinctrl-0 = <&i2c6_bus>;
@@ -342,7 +344,7 @@
342 interrupts = <0 63 0>; 344 interrupts = <0 63 0>;
343 #address-cells = <1>; 345 #address-cells = <1>;
344 #size-cells = <0>; 346 #size-cells = <0>;
345 clocks = <&clock 301>; 347 clocks = <&clock CLK_I2C7>;
346 clock-names = "i2c"; 348 clock-names = "i2c";
347 pinctrl-names = "default"; 349 pinctrl-names = "default";
348 pinctrl-0 = <&i2c7_bus>; 350 pinctrl-0 = <&i2c7_bus>;
@@ -355,7 +357,7 @@
355 interrupts = <0 64 0>; 357 interrupts = <0 64 0>;
356 #address-cells = <1>; 358 #address-cells = <1>;
357 #size-cells = <0>; 359 #size-cells = <0>;
358 clocks = <&clock 302>; 360 clocks = <&clock CLK_I2C_HDMI>;
359 clock-names = "i2c"; 361 clock-names = "i2c";
360 status = "disabled"; 362 status = "disabled";
361 }; 363 };
@@ -365,7 +367,7 @@
365 reg = <0x121D0000 0x100>; 367 reg = <0x121D0000 0x100>;
366 #address-cells = <1>; 368 #address-cells = <1>;
367 #size-cells = <0>; 369 #size-cells = <0>;
368 clocks = <&clock 288>; 370 clocks = <&clock CLK_SATA_PHYI2C>;
369 clock-names = "i2c"; 371 clock-names = "i2c";
370 status = "disabled"; 372 status = "disabled";
371 }; 373 };
@@ -380,7 +382,7 @@
380 dma-names = "tx", "rx"; 382 dma-names = "tx", "rx";
381 #address-cells = <1>; 383 #address-cells = <1>;
382 #size-cells = <0>; 384 #size-cells = <0>;
383 clocks = <&clock 304>, <&clock 154>; 385 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
384 clock-names = "spi", "spi_busclk0"; 386 clock-names = "spi", "spi_busclk0";
385 pinctrl-names = "default"; 387 pinctrl-names = "default";
386 pinctrl-0 = <&spi0_bus>; 388 pinctrl-0 = <&spi0_bus>;
@@ -396,7 +398,7 @@
396 dma-names = "tx", "rx"; 398 dma-names = "tx", "rx";
397 #address-cells = <1>; 399 #address-cells = <1>;
398 #size-cells = <0>; 400 #size-cells = <0>;
399 clocks = <&clock 305>, <&clock 155>; 401 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
400 clock-names = "spi", "spi_busclk0"; 402 clock-names = "spi", "spi_busclk0";
401 pinctrl-names = "default"; 403 pinctrl-names = "default";
402 pinctrl-0 = <&spi1_bus>; 404 pinctrl-0 = <&spi1_bus>;
@@ -412,7 +414,7 @@
412 dma-names = "tx", "rx"; 414 dma-names = "tx", "rx";
413 #address-cells = <1>; 415 #address-cells = <1>;
414 #size-cells = <0>; 416 #size-cells = <0>;
415 clocks = <&clock 306>, <&clock 156>; 417 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
416 clock-names = "spi", "spi_busclk0"; 418 clock-names = "spi", "spi_busclk0";
417 pinctrl-names = "default"; 419 pinctrl-names = "default";
418 pinctrl-0 = <&spi2_bus>; 420 pinctrl-0 = <&spi2_bus>;
@@ -424,7 +426,7 @@
424 #address-cells = <1>; 426 #address-cells = <1>;
425 #size-cells = <0>; 427 #size-cells = <0>;
426 reg = <0x12200000 0x1000>; 428 reg = <0x12200000 0x1000>;
427 clocks = <&clock 280>, <&clock 139>; 429 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
428 clock-names = "biu", "ciu"; 430 clock-names = "biu", "ciu";
429 fifo-depth = <0x80>; 431 fifo-depth = <0x80>;
430 status = "disabled"; 432 status = "disabled";
@@ -436,7 +438,7 @@
436 #address-cells = <1>; 438 #address-cells = <1>;
437 #size-cells = <0>; 439 #size-cells = <0>;
438 reg = <0x12210000 0x1000>; 440 reg = <0x12210000 0x1000>;
439 clocks = <&clock 281>, <&clock 140>; 441 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
440 clock-names = "biu", "ciu"; 442 clock-names = "biu", "ciu";
441 fifo-depth = <0x80>; 443 fifo-depth = <0x80>;
442 status = "disabled"; 444 status = "disabled";
@@ -448,7 +450,7 @@
448 #address-cells = <1>; 450 #address-cells = <1>;
449 #size-cells = <0>; 451 #size-cells = <0>;
450 reg = <0x12220000 0x1000>; 452 reg = <0x12220000 0x1000>;
451 clocks = <&clock 282>, <&clock 141>; 453 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
452 clock-names = "biu", "ciu"; 454 clock-names = "biu", "ciu";
453 fifo-depth = <0x80>; 455 fifo-depth = <0x80>;
454 status = "disabled"; 456 status = "disabled";
@@ -460,7 +462,7 @@
460 interrupts = <0 78 0>; 462 interrupts = <0 78 0>;
461 #address-cells = <1>; 463 #address-cells = <1>;
462 #size-cells = <0>; 464 #size-cells = <0>;
463 clocks = <&clock 283>, <&clock 142>; 465 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
464 clock-names = "biu", "ciu"; 466 clock-names = "biu", "ciu";
465 fifo-depth = <0x80>; 467 fifo-depth = <0x80>;
466 status = "disabled"; 468 status = "disabled";
@@ -490,7 +492,7 @@
490 dmas = <&pdma1 12 492 dmas = <&pdma1 12
491 &pdma1 11>; 493 &pdma1 11>;
492 dma-names = "tx", "rx"; 494 dma-names = "tx", "rx";
493 clocks = <&clock 307>, <&clock 157>; 495 clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
494 clock-names = "iis", "i2s_opclk0"; 496 clock-names = "iis", "i2s_opclk0";
495 pinctrl-names = "default"; 497 pinctrl-names = "default";
496 pinctrl-0 = <&i2s1_bus>; 498 pinctrl-0 = <&i2s1_bus>;
@@ -503,7 +505,7 @@
503 dmas = <&pdma0 12 505 dmas = <&pdma0 12
504 &pdma0 11>; 506 &pdma0 11>;
505 dma-names = "tx", "rx"; 507 dma-names = "tx", "rx";
506 clocks = <&clock 308>, <&clock 158>; 508 clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>;
507 clock-names = "iis", "i2s_opclk0"; 509 clock-names = "iis", "i2s_opclk0";
508 pinctrl-names = "default"; 510 pinctrl-names = "default";
509 pinctrl-0 = <&i2s2_bus>; 511 pinctrl-0 = <&i2s2_bus>;
@@ -511,7 +513,7 @@
511 513
512 usb@12000000 { 514 usb@12000000 {
513 compatible = "samsung,exynos5250-dwusb3"; 515 compatible = "samsung,exynos5250-dwusb3";
514 clocks = <&clock 286>; 516 clocks = <&clock CLK_USB3>;
515 clock-names = "usbdrd30"; 517 clock-names = "usbdrd30";
516 #address-cells = <1>; 518 #address-cells = <1>;
517 #size-cells = <1>; 519 #size-cells = <1>;
@@ -528,7 +530,7 @@
528 usb3_phy: usbphy@12100000 { 530 usb3_phy: usbphy@12100000 {
529 compatible = "samsung,exynos5250-usb3phy"; 531 compatible = "samsung,exynos5250-usb3phy";
530 reg = <0x12100000 0x100>; 532 reg = <0x12100000 0x100>;
531 clocks = <&clock 1>, <&clock 286>; 533 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>;
532 clock-names = "ext_xtal", "usbdrd30"; 534 clock-names = "ext_xtal", "usbdrd30";
533 #address-cells = <1>; 535 #address-cells = <1>;
534 #size-cells = <1>; 536 #size-cells = <1>;
@@ -544,7 +546,7 @@
544 reg = <0x12110000 0x100>; 546 reg = <0x12110000 0x100>;
545 interrupts = <0 71 0>; 547 interrupts = <0 71 0>;
546 548
547 clocks = <&clock 285>; 549 clocks = <&clock CLK_USB2>;
548 clock-names = "usbhost"; 550 clock-names = "usbhost";
549 }; 551 };
550 552
@@ -553,14 +555,14 @@
553 reg = <0x12120000 0x100>; 555 reg = <0x12120000 0x100>;
554 interrupts = <0 71 0>; 556 interrupts = <0 71 0>;
555 557
556 clocks = <&clock 285>; 558 clocks = <&clock CLK_USB2>;
557 clock-names = "usbhost"; 559 clock-names = "usbhost";
558 }; 560 };
559 561
560 usb2_phy: usbphy@12130000 { 562 usb2_phy: usbphy@12130000 {
561 compatible = "samsung,exynos5250-usb2phy"; 563 compatible = "samsung,exynos5250-usb2phy";
562 reg = <0x12130000 0x100>; 564 reg = <0x12130000 0x100>;
563 clocks = <&clock 1>, <&clock 285>; 565 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB2>;
564 clock-names = "ext_xtal", "usbhost"; 566 clock-names = "ext_xtal", "usbhost";
565 #address-cells = <1>; 567 #address-cells = <1>;
566 #size-cells = <1>; 568 #size-cells = <1>;
@@ -577,7 +579,7 @@
577 reg = <0x12dd0000 0x100>; 579 reg = <0x12dd0000 0x100>;
578 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 580 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
579 #pwm-cells = <3>; 581 #pwm-cells = <3>;
580 clocks = <&clock 311>; 582 clocks = <&clock CLK_PWM>;
581 clock-names = "timers"; 583 clock-names = "timers";
582 }; 584 };
583 585
@@ -592,7 +594,7 @@
592 compatible = "arm,pl330", "arm,primecell"; 594 compatible = "arm,pl330", "arm,primecell";
593 reg = <0x121A0000 0x1000>; 595 reg = <0x121A0000 0x1000>;
594 interrupts = <0 34 0>; 596 interrupts = <0 34 0>;
595 clocks = <&clock 275>; 597 clocks = <&clock CLK_PDMA0>;
596 clock-names = "apb_pclk"; 598 clock-names = "apb_pclk";
597 #dma-cells = <1>; 599 #dma-cells = <1>;
598 #dma-channels = <8>; 600 #dma-channels = <8>;
@@ -603,7 +605,7 @@
603 compatible = "arm,pl330", "arm,primecell"; 605 compatible = "arm,pl330", "arm,primecell";
604 reg = <0x121B0000 0x1000>; 606 reg = <0x121B0000 0x1000>;
605 interrupts = <0 35 0>; 607 interrupts = <0 35 0>;
606 clocks = <&clock 276>; 608 clocks = <&clock CLK_PDMA1>;
607 clock-names = "apb_pclk"; 609 clock-names = "apb_pclk";
608 #dma-cells = <1>; 610 #dma-cells = <1>;
609 #dma-channels = <8>; 611 #dma-channels = <8>;
@@ -614,7 +616,7 @@
614 compatible = "arm,pl330", "arm,primecell"; 616 compatible = "arm,pl330", "arm,primecell";
615 reg = <0x10800000 0x1000>; 617 reg = <0x10800000 0x1000>;
616 interrupts = <0 33 0>; 618 interrupts = <0 33 0>;
617 clocks = <&clock 346>; 619 clocks = <&clock CLK_MDMA0>;
618 clock-names = "apb_pclk"; 620 clock-names = "apb_pclk";
619 #dma-cells = <1>; 621 #dma-cells = <1>;
620 #dma-channels = <8>; 622 #dma-channels = <8>;
@@ -625,7 +627,7 @@
625 compatible = "arm,pl330", "arm,primecell"; 627 compatible = "arm,pl330", "arm,primecell";
626 reg = <0x11C10000 0x1000>; 628 reg = <0x11C10000 0x1000>;
627 interrupts = <0 124 0>; 629 interrupts = <0 124 0>;
628 clocks = <&clock 271>; 630 clocks = <&clock CLK_MDMA1>;
629 clock-names = "apb_pclk"; 631 clock-names = "apb_pclk";
630 #dma-cells = <1>; 632 #dma-cells = <1>;
631 #dma-channels = <8>; 633 #dma-channels = <8>;
@@ -638,7 +640,7 @@
638 reg = <0x13e00000 0x1000>; 640 reg = <0x13e00000 0x1000>;
639 interrupts = <0 85 0>; 641 interrupts = <0 85 0>;
640 samsung,power-domain = <&pd_gsc>; 642 samsung,power-domain = <&pd_gsc>;
641 clocks = <&clock 256>; 643 clocks = <&clock CLK_GSCL0>;
642 clock-names = "gscl"; 644 clock-names = "gscl";
643 }; 645 };
644 646
@@ -647,7 +649,7 @@
647 reg = <0x13e10000 0x1000>; 649 reg = <0x13e10000 0x1000>;
648 interrupts = <0 86 0>; 650 interrupts = <0 86 0>;
649 samsung,power-domain = <&pd_gsc>; 651 samsung,power-domain = <&pd_gsc>;
650 clocks = <&clock 257>; 652 clocks = <&clock CLK_GSCL1>;
651 clock-names = "gscl"; 653 clock-names = "gscl";
652 }; 654 };
653 655
@@ -656,7 +658,7 @@
656 reg = <0x13e20000 0x1000>; 658 reg = <0x13e20000 0x1000>;
657 interrupts = <0 87 0>; 659 interrupts = <0 87 0>;
658 samsung,power-domain = <&pd_gsc>; 660 samsung,power-domain = <&pd_gsc>;
659 clocks = <&clock 258>; 661 clocks = <&clock CLK_GSCL2>;
660 clock-names = "gscl"; 662 clock-names = "gscl";
661 }; 663 };
662 664
@@ -665,7 +667,7 @@
665 reg = <0x13e30000 0x1000>; 667 reg = <0x13e30000 0x1000>;
666 interrupts = <0 88 0>; 668 interrupts = <0 88 0>;
667 samsung,power-domain = <&pd_gsc>; 669 samsung,power-domain = <&pd_gsc>;
668 clocks = <&clock 259>; 670 clocks = <&clock CLK_GSCL3>;
669 clock-names = "gscl"; 671 clock-names = "gscl";
670 }; 672 };
671 673
@@ -673,8 +675,9 @@
673 compatible = "samsung,exynos4212-hdmi"; 675 compatible = "samsung,exynos4212-hdmi";
674 reg = <0x14530000 0x70000>; 676 reg = <0x14530000 0x70000>;
675 interrupts = <0 95 0>; 677 interrupts = <0 95 0>;
676 clocks = <&clock 344>, <&clock 136>, <&clock 137>, 678 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
677 <&clock 159>, <&clock 1024>; 679 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
680 <&clock CLK_MOUT_HDMI>;
678 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 681 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
679 "sclk_hdmiphy", "mout_hdmi"; 682 "sclk_hdmiphy", "mout_hdmi";
680 }; 683 };
@@ -683,7 +686,7 @@
683 compatible = "samsung,exynos5250-mixer"; 686 compatible = "samsung,exynos5250-mixer";
684 reg = <0x14450000 0x10000>; 687 reg = <0x14450000 0x10000>;
685 interrupts = <0 94 0>; 688 interrupts = <0 94 0>;
686 clocks = <&clock 343>, <&clock 136>; 689 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
687 clock-names = "mixer", "sclk_hdmi"; 690 clock-names = "mixer", "sclk_hdmi";
688 }; 691 };
689 692
@@ -694,14 +697,14 @@
694 }; 697 };
695 698
696 dp-controller@145B0000 { 699 dp-controller@145B0000 {
697 clocks = <&clock 342>; 700 clocks = <&clock CLK_DP>;
698 clock-names = "dp"; 701 clock-names = "dp";
699 phys = <&dp_phy>; 702 phys = <&dp_phy>;
700 phy-names = "dp"; 703 phy-names = "dp";
701 }; 704 };
702 705
703 fimd@14400000 { 706 fimd@14400000 {
704 clocks = <&clock 133>, <&clock 339>; 707 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
705 clock-names = "sclk_fimd", "fimd"; 708 clock-names = "sclk_fimd", "fimd";
706 }; 709 };
707 710
@@ -709,7 +712,7 @@
709 compatible = "samsung,exynos-adc-v1"; 712 compatible = "samsung,exynos-adc-v1";
710 reg = <0x12D10000 0x100>, <0x10040718 0x4>; 713 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
711 interrupts = <0 106 0>; 714 interrupts = <0 106 0>;
712 clocks = <&clock 303>; 715 clocks = <&clock CLK_ADC>;
713 clock-names = "adc"; 716 clock-names = "adc";
714 #io-channel-cells = <1>; 717 #io-channel-cells = <1>;
715 io-channel-ranges; 718 io-channel-ranges;
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-29 03:09:50 -0400