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-rw-r--r--drivers/mfd/wm5110-tables.c139
-rw-r--r--include/linux/mfd/arizona/registers.h162
-rw-r--r--sound/soc/codecs/Kconfig2
-rw-r--r--sound/soc/codecs/arizona.c204
-rw-r--r--sound/soc/codecs/arizona.h5
-rw-r--r--sound/soc/codecs/wm5102.c4
-rw-r--r--sound/soc/codecs/wm5110.c379
-rw-r--r--sound/soc/codecs/wm8997.c4
-rw-r--r--sound/soc/codecs/wm_adsp.c1
9 files changed, 811 insertions, 89 deletions
diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c
index bf8b3b5ad1fe..abd6713de7b0 100644
--- a/drivers/mfd/wm5110-tables.c
+++ b/drivers/mfd/wm5110-tables.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/mfd/arizona/core.h> 15#include <linux/mfd/arizona/core.h>
16#include <linux/mfd/arizona/registers.h> 16#include <linux/mfd/arizona/registers.h>
17#include <linux/device.h>
17 18
18#include "arizona.h" 19#include "arizona.h"
19 20
@@ -524,6 +525,7 @@ static const struct reg_default wm5110_reg_default[] = {
524 { 0x00000300, 0x0000 }, /* R768 - Input Enables */ 525 { 0x00000300, 0x0000 }, /* R768 - Input Enables */
525 { 0x00000308, 0x0000 }, /* R776 - Input Rate */ 526 { 0x00000308, 0x0000 }, /* R776 - Input Rate */
526 { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ 527 { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */
528 { 0x0000030C, 0x0002 }, /* R780 - HPF Control */
527 { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ 529 { 0x00000310, 0x2080 }, /* R784 - IN1L Control */
528 { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ 530 { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */
529 { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ 531 { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */
@@ -545,6 +547,7 @@ static const struct reg_default wm5110_reg_default[] = {
545 { 0x00000328, 0x2000 }, /* R808 - IN4L Control */ 547 { 0x00000328, 0x2000 }, /* R808 - IN4L Control */
546 { 0x00000329, 0x0180 }, /* R809 - ADC Digital Volume 4L */ 548 { 0x00000329, 0x0180 }, /* R809 - ADC Digital Volume 4L */
547 { 0x0000032A, 0x0000 }, /* R810 - DMIC4L Control */ 549 { 0x0000032A, 0x0000 }, /* R810 - DMIC4L Control */
550 { 0x0000032C, 0x0000 }, /* R812 - IN4R Control */
548 { 0x0000032D, 0x0180 }, /* R813 - ADC Digital Volume 4R */ 551 { 0x0000032D, 0x0180 }, /* R813 - ADC Digital Volume 4R */
549 { 0x0000032E, 0x0000 }, /* R814 - DMIC4R Control */ 552 { 0x0000032E, 0x0000 }, /* R814 - DMIC4R Control */
550 { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ 553 { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */
@@ -598,6 +601,7 @@ static const struct reg_default wm5110_reg_default[] = {
598 { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */ 601 { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */
599 { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ 602 { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */
600 { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ 603 { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */
604 { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */
601 { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ 605 { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */
602 { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ 606 { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */
603 { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */ 607 { 0x00000480, 0x0040 }, /* R1152 - Class W ANC Threshold 1 */
@@ -882,6 +886,38 @@ static const struct reg_default wm5110_reg_default[] = {
882 { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ 886 { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */
883 { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ 887 { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */
884 { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ 888 { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */
889 { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */
890 { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */
891 { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */
892 { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */
893 { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */
894 { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */
895 { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */
896 { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */
897 { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */
898 { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */
899 { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */
900 { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */
901 { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */
902 { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */
903 { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */
904 { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */
905 { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */
906 { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */
907 { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */
908 { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */
909 { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */
910 { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */
911 { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */
912 { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */
913 { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */
914 { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */
915 { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */
916 { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */
917 { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */
918 { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */
919 { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */
920 { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */
885 { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ 921 { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */
886 { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ 922 { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */
887 { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ 923 { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */
@@ -1342,6 +1378,64 @@ static const struct reg_default wm5110_reg_default[] = {
1342 { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */ 1378 { 0x00001404, 0x0000 }, /* R5124 - DSP4 Status 1 */
1343}; 1379};
1344 1380
1381static bool wm5110_is_rev_b_adsp_memory(unsigned int reg)
1382{
1383 if ((reg >= 0x100000 && reg < 0x103000) ||
1384 (reg >= 0x180000 && reg < 0x181000) ||
1385 (reg >= 0x190000 && reg < 0x192000) ||
1386 (reg >= 0x1a8000 && reg < 0x1a9000) ||
1387 (reg >= 0x200000 && reg < 0x209000) ||
1388 (reg >= 0x280000 && reg < 0x281000) ||
1389 (reg >= 0x290000 && reg < 0x29a000) ||
1390 (reg >= 0x2a8000 && reg < 0x2aa000) ||
1391 (reg >= 0x300000 && reg < 0x30f000) ||
1392 (reg >= 0x380000 && reg < 0x382000) ||
1393 (reg >= 0x390000 && reg < 0x39e000) ||
1394 (reg >= 0x3a8000 && reg < 0x3b6000) ||
1395 (reg >= 0x400000 && reg < 0x403000) ||
1396 (reg >= 0x480000 && reg < 0x481000) ||
1397 (reg >= 0x490000 && reg < 0x492000) ||
1398 (reg >= 0x4a8000 && reg < 0x4a9000))
1399 return true;
1400 else
1401 return false;
1402}
1403
1404static bool wm5110_is_rev_d_adsp_memory(unsigned int reg)
1405{
1406 if ((reg >= 0x100000 && reg < 0x106000) ||
1407 (reg >= 0x180000 && reg < 0x182000) ||
1408 (reg >= 0x190000 && reg < 0x198000) ||
1409 (reg >= 0x1a8000 && reg < 0x1aa000) ||
1410 (reg >= 0x200000 && reg < 0x20f000) ||
1411 (reg >= 0x280000 && reg < 0x282000) ||
1412 (reg >= 0x290000 && reg < 0x29c000) ||
1413 (reg >= 0x2a6000 && reg < 0x2b4000) ||
1414 (reg >= 0x300000 && reg < 0x30f000) ||
1415 (reg >= 0x380000 && reg < 0x382000) ||
1416 (reg >= 0x390000 && reg < 0x3a2000) ||
1417 (reg >= 0x3a6000 && reg < 0x3b4000) ||
1418 (reg >= 0x400000 && reg < 0x406000) ||
1419 (reg >= 0x480000 && reg < 0x482000) ||
1420 (reg >= 0x490000 && reg < 0x498000) ||
1421 (reg >= 0x4a8000 && reg < 0x4aa000))
1422 return true;
1423 else
1424 return false;
1425}
1426
1427static bool wm5110_is_adsp_memory(struct device *dev, unsigned int reg)
1428{
1429 struct arizona *arizona = dev_get_drvdata(dev);
1430
1431 switch (arizona->rev) {
1432 case 0 ... 2:
1433 return wm5110_is_rev_b_adsp_memory(reg);
1434 default:
1435 return wm5110_is_rev_d_adsp_memory(reg);
1436 }
1437}
1438
1345static bool wm5110_readable_register(struct device *dev, unsigned int reg) 1439static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1346{ 1440{
1347 switch (reg) { 1441 switch (reg) {
@@ -1460,6 +1554,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1460 case ARIZONA_INPUT_ENABLES_STATUS: 1554 case ARIZONA_INPUT_ENABLES_STATUS:
1461 case ARIZONA_INPUT_RATE: 1555 case ARIZONA_INPUT_RATE:
1462 case ARIZONA_INPUT_VOLUME_RAMP: 1556 case ARIZONA_INPUT_VOLUME_RAMP:
1557 case ARIZONA_HPF_CONTROL:
1463 case ARIZONA_IN1L_CONTROL: 1558 case ARIZONA_IN1L_CONTROL:
1464 case ARIZONA_ADC_DIGITAL_VOLUME_1L: 1559 case ARIZONA_ADC_DIGITAL_VOLUME_1L:
1465 case ARIZONA_DMIC1L_CONTROL: 1560 case ARIZONA_DMIC1L_CONTROL:
@@ -1481,6 +1576,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1481 case ARIZONA_IN4L_CONTROL: 1576 case ARIZONA_IN4L_CONTROL:
1482 case ARIZONA_ADC_DIGITAL_VOLUME_4L: 1577 case ARIZONA_ADC_DIGITAL_VOLUME_4L:
1483 case ARIZONA_DMIC4L_CONTROL: 1578 case ARIZONA_DMIC4L_CONTROL:
1579 case ARIZONA_IN4R_CONTROL:
1484 case ARIZONA_ADC_DIGITAL_VOLUME_4R: 1580 case ARIZONA_ADC_DIGITAL_VOLUME_4R:
1485 case ARIZONA_DMIC4R_CONTROL: 1581 case ARIZONA_DMIC4R_CONTROL:
1486 case ARIZONA_OUTPUT_ENABLES_1: 1582 case ARIZONA_OUTPUT_ENABLES_1:
@@ -1536,6 +1632,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1536 case ARIZONA_DAC_DIGITAL_VOLUME_6R: 1632 case ARIZONA_DAC_DIGITAL_VOLUME_6R:
1537 case ARIZONA_DAC_VOLUME_LIMIT_6R: 1633 case ARIZONA_DAC_VOLUME_LIMIT_6R:
1538 case ARIZONA_NOISE_GATE_SELECT_6R: 1634 case ARIZONA_NOISE_GATE_SELECT_6R:
1635 case ARIZONA_DRE_ENABLE:
1539 case ARIZONA_DAC_AEC_CONTROL_1: 1636 case ARIZONA_DAC_AEC_CONTROL_1:
1540 case ARIZONA_NOISE_GATE_CONTROL: 1637 case ARIZONA_NOISE_GATE_CONTROL:
1541 case ARIZONA_PDM_SPK1_CTRL_1: 1638 case ARIZONA_PDM_SPK1_CTRL_1:
@@ -1820,6 +1917,38 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1820 case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: 1917 case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME:
1821 case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: 1918 case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE:
1822 case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: 1919 case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME:
1920 case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE:
1921 case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME:
1922 case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE:
1923 case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME:
1924 case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE:
1925 case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME:
1926 case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE:
1927 case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME:
1928 case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE:
1929 case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME:
1930 case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE:
1931 case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME:
1932 case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE:
1933 case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME:
1934 case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE:
1935 case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME:
1936 case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE:
1937 case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME:
1938 case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE:
1939 case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME:
1940 case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE:
1941 case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME:
1942 case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE:
1943 case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME:
1944 case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE:
1945 case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME:
1946 case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE:
1947 case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME:
1948 case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE:
1949 case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME:
1950 case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE:
1951 case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME:
1823 case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: 1952 case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE:
1824 case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: 1953 case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME:
1825 case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: 1954 case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE:
@@ -2331,7 +2460,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
2331 case ARIZONA_DSP4_SCRATCH_3: 2460 case ARIZONA_DSP4_SCRATCH_3:
2332 return true; 2461 return true;
2333 default: 2462 default:
2334 return false; 2463 return wm5110_is_adsp_memory(dev, reg);
2335 } 2464 }
2336} 2465}
2337 2466
@@ -2407,16 +2536,18 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg)
2407 case ARIZONA_DSP4_SCRATCH_3: 2536 case ARIZONA_DSP4_SCRATCH_3:
2408 return true; 2537 return true;
2409 default: 2538 default:
2410 return false; 2539 return wm5110_is_adsp_memory(dev, reg);
2411 } 2540 }
2412} 2541}
2413 2542
2543#define WM5110_MAX_REGISTER 0x4a9fff
2544
2414const struct regmap_config wm5110_spi_regmap = { 2545const struct regmap_config wm5110_spi_regmap = {
2415 .reg_bits = 32, 2546 .reg_bits = 32,
2416 .pad_bits = 16, 2547 .pad_bits = 16,
2417 .val_bits = 16, 2548 .val_bits = 16,
2418 2549
2419 .max_register = ARIZONA_DSP1_STATUS_2, 2550 .max_register = WM5110_MAX_REGISTER,
2420 .readable_reg = wm5110_readable_register, 2551 .readable_reg = wm5110_readable_register,
2421 .volatile_reg = wm5110_volatile_register, 2552 .volatile_reg = wm5110_volatile_register,
2422 2553
@@ -2430,7 +2561,7 @@ const struct regmap_config wm5110_i2c_regmap = {
2430 .reg_bits = 32, 2561 .reg_bits = 32,
2431 .val_bits = 16, 2562 .val_bits = 16,
2432 2563
2433 .max_register = ARIZONA_DSP1_STATUS_2, 2564 .max_register = WM5110_MAX_REGISTER,
2434 .readable_reg = wm5110_readable_register, 2565 .readable_reg = wm5110_readable_register,
2435 .volatile_reg = wm5110_volatile_register, 2566 .volatile_reg = wm5110_volatile_register,
2436 2567
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index cb49417f8ba9..22916c0f1ca4 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -139,6 +139,7 @@
139#define ARIZONA_INPUT_ENABLES_STATUS 0x301 139#define ARIZONA_INPUT_ENABLES_STATUS 0x301
140#define ARIZONA_INPUT_RATE 0x308 140#define ARIZONA_INPUT_RATE 0x308
141#define ARIZONA_INPUT_VOLUME_RAMP 0x309 141#define ARIZONA_INPUT_VOLUME_RAMP 0x309
142#define ARIZONA_HPF_CONTROL 0x30C
142#define ARIZONA_IN1L_CONTROL 0x310 143#define ARIZONA_IN1L_CONTROL 0x310
143#define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311 144#define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
144#define ARIZONA_DMIC1L_CONTROL 0x312 145#define ARIZONA_DMIC1L_CONTROL 0x312
@@ -160,6 +161,7 @@
160#define ARIZONA_IN4L_CONTROL 0x328 161#define ARIZONA_IN4L_CONTROL 0x328
161#define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329 162#define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
162#define ARIZONA_DMIC4L_CONTROL 0x32A 163#define ARIZONA_DMIC4L_CONTROL 0x32A
164#define ARIZONA_IN4R_CONTROL 0x32C
163#define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D 165#define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
164#define ARIZONA_DMIC4R_CONTROL 0x32E 166#define ARIZONA_DMIC4R_CONTROL 0x32E
165#define ARIZONA_OUTPUT_ENABLES_1 0x400 167#define ARIZONA_OUTPUT_ENABLES_1 0x400
@@ -511,6 +513,38 @@
511#define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D 513#define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D
512#define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E 514#define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E
513#define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F 515#define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F
516#define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750
517#define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751
518#define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752
519#define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753
520#define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754
521#define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755
522#define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756
523#define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757
524#define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758
525#define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759
526#define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A
527#define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B
528#define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C
529#define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D
530#define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E
531#define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F
532#define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760
533#define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761
534#define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762
535#define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763
536#define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764
537#define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765
538#define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766
539#define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767
540#define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768
541#define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769
542#define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A
543#define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B
544#define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C
545#define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D
546#define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E
547#define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F
514#define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 548#define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780
515#define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 549#define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781
516#define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 550#define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782
@@ -2293,8 +2327,18 @@
2293#define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */ 2327#define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */
2294 2328
2295/* 2329/*
2330 * R780 (0x30C) - HPF Control
2331 */
2332#define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */
2333#define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */
2334#define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */
2335
2336/*
2296 * R784 (0x310) - IN1L Control 2337 * R784 (0x310) - IN1L Control
2297 */ 2338 */
2339#define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */
2340#define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */
2341#define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */
2298#define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */ 2342#define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */
2299#define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */ 2343#define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */
2300#define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */ 2344#define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */
@@ -2333,6 +2377,9 @@
2333/* 2377/*
2334 * R788 (0x314) - IN1R Control 2378 * R788 (0x314) - IN1R Control
2335 */ 2379 */
2380#define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */
2381#define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */
2382#define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */
2336#define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */ 2383#define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */
2337#define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */ 2384#define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */
2338#define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */ 2385#define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */
@@ -2362,6 +2409,9 @@
2362/* 2409/*
2363 * R792 (0x318) - IN2L Control 2410 * R792 (0x318) - IN2L Control
2364 */ 2411 */
2412#define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */
2413#define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */
2414#define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */
2365#define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */ 2415#define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */
2366#define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */ 2416#define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */
2367#define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */ 2417#define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */
@@ -2400,6 +2450,9 @@
2400/* 2450/*
2401 * R796 (0x31C) - IN2R Control 2451 * R796 (0x31C) - IN2R Control
2402 */ 2452 */
2453#define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */
2454#define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */
2455#define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */
2403#define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */ 2456#define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */
2404#define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */ 2457#define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */
2405#define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */ 2458#define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */
@@ -2429,6 +2482,9 @@
2429/* 2482/*
2430 * R800 (0x320) - IN3L Control 2483 * R800 (0x320) - IN3L Control
2431 */ 2484 */
2485#define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */
2486#define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */
2487#define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */
2432#define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */ 2488#define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */
2433#define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */ 2489#define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */
2434#define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */ 2490#define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */
@@ -2467,6 +2523,9 @@
2467/* 2523/*
2468 * R804 (0x324) - IN3R Control 2524 * R804 (0x324) - IN3R Control
2469 */ 2525 */
2526#define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */
2527#define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */
2528#define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */
2470#define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */ 2529#define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */
2471#define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */ 2530#define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */
2472#define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */ 2531#define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */
@@ -2496,6 +2555,9 @@
2496/* 2555/*
2497 * R808 (0x328) - IN4 Control 2556 * R808 (0x328) - IN4 Control
2498 */ 2557 */
2558#define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */
2559#define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */
2560#define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */
2499#define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */ 2561#define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */
2500#define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */ 2562#define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */
2501#define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */ 2563#define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */
@@ -2526,6 +2588,13 @@
2526#define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */ 2588#define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */
2527 2589
2528/* 2590/*
2591 * R812 (0x32C) - IN4R Control
2592 */
2593#define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */
2594#define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */
2595#define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */
2596
2597/*
2529 * R813 (0x32D) - ADC Digital Volume 4R 2598 * R813 (0x32D) - ADC Digital Volume 4R
2530 */ 2599 */
2531#define ARIZONA_IN_VU 0x0200 /* IN_VU */ 2600#define ARIZONA_IN_VU 0x0200 /* IN_VU */
@@ -3138,6 +3207,10 @@
3138/* 3207/*
3139 * R1088 (0x440) - DRE Enable 3208 * R1088 (0x440) - DRE Enable
3140 */ 3209 */
3210#define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */
3211#define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */
3212#define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3R_ENA */
3213#define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */
3141#define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ 3214#define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */
3142#define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ 3215#define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */
3143#define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ 3216#define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */
@@ -3726,6 +3799,35 @@
3726#define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ 3799#define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */
3727 3800
3728/* 3801/*
3802 * R1355 (0x54B) - AIF2 Frame Ctrl 5
3803 */
3804#define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */
3805#define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */
3806#define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */
3807
3808/*
3809 * R1356 (0x54C) - AIF2 Frame Ctrl 6
3810 */
3811#define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */
3812#define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */
3813#define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */
3814
3815
3816/*
3817 * R1357 (0x54D) - AIF2 Frame Ctrl 7
3818 */
3819#define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */
3820#define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */
3821#define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */
3822
3823/*
3824 * R1358 (0x54E) - AIF2 Frame Ctrl 8
3825 */
3826#define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */
3827#define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */
3828#define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */
3829
3830/*
3729 * R1361 (0x551) - AIF2 Frame Ctrl 11 3831 * R1361 (0x551) - AIF2 Frame Ctrl 11
3730 */ 3832 */
3731#define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */ 3833#define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */
@@ -3740,8 +3842,52 @@
3740#define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ 3842#define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */
3741 3843
3742/* 3844/*
3845 * R1363 (0x553) - AIF2 Frame Ctrl 13
3846 */
3847#define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */
3848#define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */
3849#define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */
3850
3851/*
3852 * R1364 (0x554) - AIF2 Frame Ctrl 14
3853 */
3854#define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */
3855#define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */
3856#define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */
3857
3858/*
3859 * R1365 (0x555) - AIF2 Frame Ctrl 15
3860 */
3861#define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */
3862#define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */
3863#define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */
3864
3865/*
3866 * R1366 (0x556) - AIF2 Frame Ctrl 16
3867 */
3868#define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */
3869#define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */
3870#define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */
3871
3872/*
3743 * R1369 (0x559) - AIF2 Tx Enables 3873 * R1369 (0x559) - AIF2 Tx Enables
3744 */ 3874 */
3875#define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */
3876#define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */
3877#define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */
3878#define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */
3879#define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */
3880#define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */
3881#define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */
3882#define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */
3883#define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */
3884#define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */
3885#define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */
3886#define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */
3887#define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */
3888#define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */
3889#define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */
3890#define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */
3745#define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ 3891#define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */
3746#define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ 3892#define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */
3747#define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ 3893#define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */
@@ -3754,6 +3900,22 @@
3754/* 3900/*
3755 * R1370 (0x55A) - AIF2 Rx Enables 3901 * R1370 (0x55A) - AIF2 Rx Enables
3756 */ 3902 */
3903#define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */
3904#define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */
3905#define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */
3906#define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */
3907#define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */
3908#define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */
3909#define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */
3910#define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */
3911#define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */
3912#define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */
3913#define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */
3914#define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */
3915#define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */
3916#define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */
3917#define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */
3918#define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */
3757#define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ 3919#define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */
3758#define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ 3920#define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */
3759#define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ 3921#define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index b33b45dfceec..983d087aa92a 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -163,8 +163,10 @@ config SND_SOC_WM_HUBS
163config SND_SOC_WM_ADSP 163config SND_SOC_WM_ADSP
164 tristate 164 tristate
165 default y if SND_SOC_WM5102=y 165 default y if SND_SOC_WM5102=y
166 default y if SND_SOC_WM5110=y
166 default y if SND_SOC_WM2200=y 167 default y if SND_SOC_WM2200=y
167 default m if SND_SOC_WM5102=m 168 default m if SND_SOC_WM5102=m
169 default m if SND_SOC_WM5110=m
168 default m if SND_SOC_WM2200=m 170 default m if SND_SOC_WM2200=m
169 171
170config SND_SOC_AB8500_CODEC 172config SND_SOC_AB8500_CODEC
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c
index fea991031be1..e4295fee8f13 100644
--- a/sound/soc/codecs/arizona.c
+++ b/sound/soc/codecs/arizona.c
@@ -93,7 +93,7 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
93 switch (event) { 93 switch (event) {
94 case SND_SOC_DAPM_PRE_PMU: 94 case SND_SOC_DAPM_PRE_PMU:
95 if (!priv->spk_ena && manual_ena) { 95 if (!priv->spk_ena && manual_ena) {
96 snd_soc_write(codec, 0x4f5, 0x25a); 96 regmap_write_async(arizona->regmap, 0x4f5, 0x25a);
97 priv->spk_ena_pending = true; 97 priv->spk_ena_pending = true;
98 } 98 }
99 break; 99 break;
@@ -105,12 +105,13 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
105 return -EBUSY; 105 return -EBUSY;
106 } 106 }
107 107
108 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 108 regmap_update_bits_async(arizona->regmap,
109 1 << w->shift, 1 << w->shift); 109 ARIZONA_OUTPUT_ENABLES_1,
110 1 << w->shift, 1 << w->shift);
110 111
111 if (priv->spk_ena_pending) { 112 if (priv->spk_ena_pending) {
112 msleep(75); 113 msleep(75);
113 snd_soc_write(codec, 0x4f5, 0xda); 114 regmap_write_async(arizona->regmap, 0x4f5, 0xda);
114 priv->spk_ena_pending = false; 115 priv->spk_ena_pending = false;
115 priv->spk_ena++; 116 priv->spk_ena++;
116 } 117 }
@@ -119,16 +120,19 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
119 if (manual_ena) { 120 if (manual_ena) {
120 priv->spk_ena--; 121 priv->spk_ena--;
121 if (!priv->spk_ena) 122 if (!priv->spk_ena)
122 snd_soc_write(codec, 0x4f5, 0x25a); 123 regmap_write_async(arizona->regmap,
124 0x4f5, 0x25a);
123 } 125 }
124 126
125 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 127 regmap_update_bits_async(arizona->regmap,
126 1 << w->shift, 0); 128 ARIZONA_OUTPUT_ENABLES_1,
129 1 << w->shift, 0);
127 break; 130 break;
128 case SND_SOC_DAPM_POST_PMD: 131 case SND_SOC_DAPM_POST_PMD:
129 if (manual_ena) { 132 if (manual_ena) {
130 if (!priv->spk_ena) 133 if (!priv->spk_ena)
131 snd_soc_write(codec, 0x4f5, 0x0da); 134 regmap_write_async(arizona->regmap,
135 0x4f5, 0x0da);
132 } 136 }
133 break; 137 break;
134 } 138 }
@@ -292,6 +296,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
292 "AIF1RX8", 296 "AIF1RX8",
293 "AIF2RX1", 297 "AIF2RX1",
294 "AIF2RX2", 298 "AIF2RX2",
299 "AIF2RX3",
300 "AIF2RX4",
301 "AIF2RX5",
302 "AIF2RX6",
295 "AIF3RX1", 303 "AIF3RX1",
296 "AIF3RX2", 304 "AIF3RX2",
297 "SLIMRX1", 305 "SLIMRX1",
@@ -395,6 +403,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
395 0x27, 403 0x27,
396 0x28, /* AIF2RX1 */ 404 0x28, /* AIF2RX1 */
397 0x29, 405 0x29,
406 0x2a,
407 0x2b,
408 0x2c,
409 0x2d,
398 0x30, /* AIF3RX1 */ 410 0x30, /* AIF3RX1 */
399 0x31, 411 0x31,
400 0x38, /* SLIMRX1 */ 412 0x38, /* SLIMRX1 */
@@ -486,6 +498,22 @@ const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
486EXPORT_SYMBOL_GPL(arizona_rate_val); 498EXPORT_SYMBOL_GPL(arizona_rate_val);
487 499
488 500
501const struct soc_enum arizona_isrc_fsh[] = {
502 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1,
503 ARIZONA_ISRC1_FSH_SHIFT, 0xf,
504 ARIZONA_RATE_ENUM_SIZE,
505 arizona_rate_text, arizona_rate_val),
506 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1,
507 ARIZONA_ISRC2_FSH_SHIFT, 0xf,
508 ARIZONA_RATE_ENUM_SIZE,
509 arizona_rate_text, arizona_rate_val),
510 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1,
511 ARIZONA_ISRC3_FSH_SHIFT, 0xf,
512 ARIZONA_RATE_ENUM_SIZE,
513 arizona_rate_text, arizona_rate_val),
514};
515EXPORT_SYMBOL_GPL(arizona_isrc_fsh);
516
489const struct soc_enum arizona_isrc_fsl[] = { 517const struct soc_enum arizona_isrc_fsl[] = {
490 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2, 518 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
491 ARIZONA_ISRC1_FSL_SHIFT, 0xf, 519 ARIZONA_ISRC1_FSL_SHIFT, 0xf,
@@ -502,6 +530,13 @@ const struct soc_enum arizona_isrc_fsl[] = {
502}; 530};
503EXPORT_SYMBOL_GPL(arizona_isrc_fsl); 531EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
504 532
533const struct soc_enum arizona_asrc_rate1 =
534 SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1,
535 ARIZONA_ASRC_RATE1_SHIFT, 0xf,
536 ARIZONA_RATE_ENUM_SIZE - 1,
537 arizona_rate_text, arizona_rate_val);
538EXPORT_SYMBOL_GPL(arizona_asrc_rate1);
539
505static const char *arizona_vol_ramp_text[] = { 540static const char *arizona_vol_ramp_text[] = {
506 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", 541 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
507 "15ms/6dB", "30ms/6dB", 542 "15ms/6dB", "30ms/6dB",
@@ -560,6 +595,16 @@ const struct soc_enum arizona_ng_hold =
560 4, arizona_ng_hold_text); 595 4, arizona_ng_hold_text);
561EXPORT_SYMBOL_GPL(arizona_ng_hold); 596EXPORT_SYMBOL_GPL(arizona_ng_hold);
562 597
598static const char * const arizona_in_hpf_cut_text[] = {
599 "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
600};
601
602const struct soc_enum arizona_in_hpf_cut_enum =
603 SOC_ENUM_SINGLE(ARIZONA_HPF_CONTROL, ARIZONA_IN_HPF_CUT_SHIFT,
604 ARRAY_SIZE(arizona_in_hpf_cut_text),
605 arizona_in_hpf_cut_text);
606EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum);
607
563static const char * const arizona_in_dmic_osr_text[] = { 608static const char * const arizona_in_dmic_osr_text[] = {
564 "1.536MHz", "3.072MHz", "6.144MHz", 609 "1.536MHz", "3.072MHz", "6.144MHz",
565}; 610};
@@ -669,6 +714,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w,
669 int event) 714 int event)
670{ 715{
671 struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); 716 struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
717 struct arizona *arizona = priv->arizona;
672 unsigned int mask = 1 << w->shift; 718 unsigned int mask = 1 << w->shift;
673 unsigned int val; 719 unsigned int val;
674 720
@@ -691,7 +737,8 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w,
691 if (priv->arizona->hpdet_magic) 737 if (priv->arizona->hpdet_magic)
692 val = 0; 738 val = 0;
693 739
694 snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); 740 regmap_update_bits_async(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1,
741 mask, val);
695 742
696 return arizona_out_ev(w, kcontrol, event); 743 return arizona_out_ev(w, kcontrol, event);
697} 744}
@@ -846,6 +893,8 @@ EXPORT_SYMBOL_GPL(arizona_set_sysclk);
846static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 893static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
847{ 894{
848 struct snd_soc_codec *codec = dai->codec; 895 struct snd_soc_codec *codec = dai->codec;
896 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
897 struct arizona *arizona = priv->arizona;
849 int lrclk, bclk, mode, base; 898 int lrclk, bclk, mode, base;
850 899
851 base = dai->driver->base; 900 base = dai->driver->base;
@@ -902,17 +951,19 @@ static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
902 return -EINVAL; 951 return -EINVAL;
903 } 952 }
904 953
905 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, 954 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_BCLK_CTRL,
906 ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR, 955 ARIZONA_AIF1_BCLK_INV |
907 bclk); 956 ARIZONA_AIF1_BCLK_MSTR,
908 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL, 957 bclk);
909 ARIZONA_AIF1TX_LRCLK_INV | 958 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_TX_PIN_CTRL,
910 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk); 959 ARIZONA_AIF1TX_LRCLK_INV |
911 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL, 960 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
912 ARIZONA_AIF1RX_LRCLK_INV | 961 regmap_update_bits_async(arizona->regmap,
913 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk); 962 base + ARIZONA_AIF_RX_PIN_CTRL,
914 snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT, 963 ARIZONA_AIF1RX_LRCLK_INV |
915 ARIZONA_AIF1_FMT_MASK, mode); 964 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
965 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FORMAT,
966 ARIZONA_AIF1_FMT_MASK, mode);
916 967
917 return 0; 968 return 0;
918} 969}
@@ -1164,18 +1215,22 @@ static int arizona_hw_params(struct snd_pcm_substream *substream,
1164 if (ret != 0) 1215 if (ret != 0)
1165 return ret; 1216 return ret;
1166 1217
1167 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, 1218 regmap_update_bits_async(arizona->regmap,
1168 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); 1219 base + ARIZONA_AIF_BCLK_CTRL,
1169 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE, 1220 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1170 ARIZONA_AIF1TX_BCPF_MASK, lrclk); 1221 regmap_update_bits_async(arizona->regmap,
1171 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE, 1222 base + ARIZONA_AIF_TX_BCLK_RATE,
1172 ARIZONA_AIF1RX_BCPF_MASK, lrclk); 1223 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1173 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1, 1224 regmap_update_bits_async(arizona->regmap,
1174 ARIZONA_AIF1TX_WL_MASK | 1225 base + ARIZONA_AIF_RX_BCLK_RATE,
1175 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); 1226 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1176 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2, 1227 regmap_update_bits_async(arizona->regmap,
1177 ARIZONA_AIF1RX_WL_MASK | 1228 base + ARIZONA_AIF_FRAME_CTRL_1,
1178 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); 1229 ARIZONA_AIF1TX_WL_MASK |
1230 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1231 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FRAME_CTRL_2,
1232 ARIZONA_AIF1RX_WL_MASK |
1233 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1179 1234
1180 return 0; 1235 return 0;
1181} 1236}
@@ -1428,31 +1483,31 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
1428 struct arizona_fll_cfg *cfg, int source, 1483 struct arizona_fll_cfg *cfg, int source,
1429 bool sync) 1484 bool sync)
1430{ 1485{
1431 regmap_update_bits(arizona->regmap, base + 3, 1486 regmap_update_bits_async(arizona->regmap, base + 3,
1432 ARIZONA_FLL1_THETA_MASK, cfg->theta); 1487 ARIZONA_FLL1_THETA_MASK, cfg->theta);
1433 regmap_update_bits(arizona->regmap, base + 4, 1488 regmap_update_bits_async(arizona->regmap, base + 4,
1434 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); 1489 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
1435 regmap_update_bits(arizona->regmap, base + 5, 1490 regmap_update_bits_async(arizona->regmap, base + 5,
1436 ARIZONA_FLL1_FRATIO_MASK, 1491 ARIZONA_FLL1_FRATIO_MASK,
1437 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); 1492 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
1438 regmap_update_bits(arizona->regmap, base + 6, 1493 regmap_update_bits_async(arizona->regmap, base + 6,
1439 ARIZONA_FLL1_CLK_REF_DIV_MASK | 1494 ARIZONA_FLL1_CLK_REF_DIV_MASK |
1440 ARIZONA_FLL1_CLK_REF_SRC_MASK, 1495 ARIZONA_FLL1_CLK_REF_SRC_MASK,
1441 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | 1496 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
1442 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); 1497 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
1443 1498
1444 if (sync) 1499 if (sync)
1445 regmap_update_bits(arizona->regmap, base + 0x7, 1500 regmap_update_bits_async(arizona->regmap, base + 0x7,
1446 ARIZONA_FLL1_GAIN_MASK, 1501 ARIZONA_FLL1_GAIN_MASK,
1447 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); 1502 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1448 else 1503 else
1449 regmap_update_bits(arizona->regmap, base + 0x9, 1504 regmap_update_bits_async(arizona->regmap, base + 0x9,
1450 ARIZONA_FLL1_GAIN_MASK, 1505 ARIZONA_FLL1_GAIN_MASK,
1451 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); 1506 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1452 1507
1453 regmap_update_bits(arizona->regmap, base + 2, 1508 regmap_update_bits_async(arizona->regmap, base + 2,
1454 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, 1509 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
1455 ARIZONA_FLL1_CTRL_UPD | cfg->n); 1510 ARIZONA_FLL1_CTRL_UPD | cfg->n);
1456} 1511}
1457 1512
1458static bool arizona_is_enabled_fll(struct arizona_fll *fll) 1513static bool arizona_is_enabled_fll(struct arizona_fll *fll)
@@ -1485,9 +1540,9 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1485 */ 1540 */
1486 if (fll->ref_src >= 0 && fll->ref_freq && 1541 if (fll->ref_src >= 0 && fll->ref_freq &&
1487 fll->ref_src != fll->sync_src) { 1542 fll->ref_src != fll->sync_src) {
1488 regmap_update_bits(arizona->regmap, fll->base + 5, 1543 regmap_update_bits_async(arizona->regmap, fll->base + 5,
1489 ARIZONA_FLL1_OUTDIV_MASK, 1544 ARIZONA_FLL1_OUTDIV_MASK,
1490 ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); 1545 ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1491 1546
1492 arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, 1547 arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
1493 false); 1548 false);
@@ -1497,15 +1552,15 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1497 use_sync = true; 1552 use_sync = true;
1498 } 1553 }
1499 } else if (fll->sync_src >= 0) { 1554 } else if (fll->sync_src >= 0) {
1500 regmap_update_bits(arizona->regmap, fll->base + 5, 1555 regmap_update_bits_async(arizona->regmap, fll->base + 5,
1501 ARIZONA_FLL1_OUTDIV_MASK, 1556 ARIZONA_FLL1_OUTDIV_MASK,
1502 sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); 1557 sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1503 1558
1504 arizona_apply_fll(arizona, fll->base, sync, 1559 arizona_apply_fll(arizona, fll->base, sync,
1505 fll->sync_src, false); 1560 fll->sync_src, false);
1506 1561
1507 regmap_update_bits(arizona->regmap, fll->base + 0x11, 1562 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
1508 ARIZONA_FLL1_SYNC_ENA, 0); 1563 ARIZONA_FLL1_SYNC_ENA, 0);
1509 } else { 1564 } else {
1510 arizona_fll_err(fll, "No clocks provided\n"); 1565 arizona_fll_err(fll, "No clocks provided\n");
1511 return; 1566 return;
@@ -1516,11 +1571,12 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1516 * sync source. 1571 * sync source.
1517 */ 1572 */
1518 if (use_sync && fll->sync_freq > 100000) 1573 if (use_sync && fll->sync_freq > 100000)
1519 regmap_update_bits(arizona->regmap, fll->base + 0x17, 1574 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
1520 ARIZONA_FLL1_SYNC_BW, 0); 1575 ARIZONA_FLL1_SYNC_BW, 0);
1521 else 1576 else
1522 regmap_update_bits(arizona->regmap, fll->base + 0x17, 1577 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
1523 ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); 1578 ARIZONA_FLL1_SYNC_BW,
1579 ARIZONA_FLL1_SYNC_BW);
1524 1580
1525 if (!arizona_is_enabled_fll(fll)) 1581 if (!arizona_is_enabled_fll(fll))
1526 pm_runtime_get(arizona->dev); 1582 pm_runtime_get(arizona->dev);
@@ -1528,14 +1584,14 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1528 /* Clear any pending completions */ 1584 /* Clear any pending completions */
1529 try_wait_for_completion(&fll->ok); 1585 try_wait_for_completion(&fll->ok);
1530 1586
1531 regmap_update_bits(arizona->regmap, fll->base + 1, 1587 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1532 ARIZONA_FLL1_FREERUN, 0); 1588 ARIZONA_FLL1_FREERUN, 0);
1533 regmap_update_bits(arizona->regmap, fll->base + 1, 1589 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1534 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); 1590 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
1535 if (use_sync) 1591 if (use_sync)
1536 regmap_update_bits(arizona->regmap, fll->base + 0x11, 1592 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
1537 ARIZONA_FLL1_SYNC_ENA, 1593 ARIZONA_FLL1_SYNC_ENA,
1538 ARIZONA_FLL1_SYNC_ENA); 1594 ARIZONA_FLL1_SYNC_ENA);
1539 1595
1540 ret = wait_for_completion_timeout(&fll->ok, 1596 ret = wait_for_completion_timeout(&fll->ok,
1541 msecs_to_jiffies(250)); 1597 msecs_to_jiffies(250));
@@ -1548,8 +1604,8 @@ static void arizona_disable_fll(struct arizona_fll *fll)
1548 struct arizona *arizona = fll->arizona; 1604 struct arizona *arizona = fll->arizona;
1549 bool change; 1605 bool change;
1550 1606
1551 regmap_update_bits(arizona->regmap, fll->base + 1, 1607 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1552 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); 1608 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
1553 regmap_update_bits_check(arizona->regmap, fll->base + 1, 1609 regmap_update_bits_check(arizona->regmap, fll->base + 1,
1554 ARIZONA_FLL1_ENA, 0, &change); 1610 ARIZONA_FLL1_ENA, 0, &change);
1555 regmap_update_bits(arizona->regmap, fll->base + 0x11, 1611 regmap_update_bits(arizona->regmap, fll->base + 0x11,
diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h
index 9e81b6392692..10b398477203 100644
--- a/sound/soc/codecs/arizona.h
+++ b/sound/soc/codecs/arizona.h
@@ -81,7 +81,7 @@ struct arizona_priv {
81 unsigned int spk_ena_pending:1; 81 unsigned int spk_ena_pending:1;
82}; 82};
83 83
84#define ARIZONA_NUM_MIXER_INPUTS 99 84#define ARIZONA_NUM_MIXER_INPUTS 103
85 85
86extern const unsigned int arizona_mixer_tlv[]; 86extern const unsigned int arizona_mixer_tlv[];
87extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; 87extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS];
@@ -186,6 +186,8 @@ extern const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE];
186extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE]; 186extern const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE];
187 187
188extern const struct soc_enum arizona_isrc_fsl[]; 188extern const struct soc_enum arizona_isrc_fsl[];
189extern const struct soc_enum arizona_isrc_fsh[];
190extern const struct soc_enum arizona_asrc_rate1;
189 191
190extern const struct soc_enum arizona_in_vi_ramp; 192extern const struct soc_enum arizona_in_vi_ramp;
191extern const struct soc_enum arizona_in_vd_ramp; 193extern const struct soc_enum arizona_in_vd_ramp;
@@ -199,6 +201,7 @@ extern const struct soc_enum arizona_lhpf3_mode;
199extern const struct soc_enum arizona_lhpf4_mode; 201extern const struct soc_enum arizona_lhpf4_mode;
200 202
201extern const struct soc_enum arizona_ng_hold; 203extern const struct soc_enum arizona_ng_hold;
204extern const struct soc_enum arizona_in_hpf_cut_enum;
202extern const struct soc_enum arizona_in_dmic_osr[]; 205extern const struct soc_enum arizona_in_dmic_osr[];
203 206
204extern int arizona_in_ev(struct snd_soc_dapm_widget *w, 207extern int arizona_in_ev(struct snd_soc_dapm_widget *w,
diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c
index a08e8bf6d07c..ce9c8e14d4bd 100644
--- a/sound/soc/codecs/wm5102.c
+++ b/sound/soc/codecs/wm5102.c
@@ -601,8 +601,8 @@ static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w,
601 case SND_SOC_DAPM_POST_PMU: 601 case SND_SOC_DAPM_POST_PMU:
602 if (patch) 602 if (patch)
603 for (i = 0; i < patch_size; i++) 603 for (i = 0; i < patch_size; i++)
604 regmap_write(regmap, patch[i].reg, 604 regmap_write_async(regmap, patch[i].reg,
605 patch[i].def); 605 patch[i].def);
606 break; 606 break;
607 607
608 default: 608 default:
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c
index 99b359e19d35..eee627b9bd13 100644
--- a/sound/soc/codecs/wm5110.c
+++ b/sound/soc/codecs/wm5110.c
@@ -30,13 +30,51 @@
30#include <linux/mfd/arizona/registers.h> 30#include <linux/mfd/arizona/registers.h>
31 31
32#include "arizona.h" 32#include "arizona.h"
33#include "wm_adsp.h"
33#include "wm5110.h" 34#include "wm5110.h"
34 35
36#define WM5110_NUM_ADSP 4
37
35struct wm5110_priv { 38struct wm5110_priv {
36 struct arizona_priv core; 39 struct arizona_priv core;
37 struct arizona_fll fll[2]; 40 struct arizona_fll fll[2];
38}; 41};
39 42
43static const struct wm_adsp_region wm5110_dsp1_regions[] = {
44 { .type = WMFW_ADSP2_PM, .base = 0x100000 },
45 { .type = WMFW_ADSP2_ZM, .base = 0x180000 },
46 { .type = WMFW_ADSP2_XM, .base = 0x190000 },
47 { .type = WMFW_ADSP2_YM, .base = 0x1a8000 },
48};
49
50static const struct wm_adsp_region wm5110_dsp2_regions[] = {
51 { .type = WMFW_ADSP2_PM, .base = 0x200000 },
52 { .type = WMFW_ADSP2_ZM, .base = 0x280000 },
53 { .type = WMFW_ADSP2_XM, .base = 0x290000 },
54 { .type = WMFW_ADSP2_YM, .base = 0x2a8000 },
55};
56
57static const struct wm_adsp_region wm5110_dsp3_regions[] = {
58 { .type = WMFW_ADSP2_PM, .base = 0x300000 },
59 { .type = WMFW_ADSP2_ZM, .base = 0x380000 },
60 { .type = WMFW_ADSP2_XM, .base = 0x390000 },
61 { .type = WMFW_ADSP2_YM, .base = 0x3a8000 },
62};
63
64static const struct wm_adsp_region wm5110_dsp4_regions[] = {
65 { .type = WMFW_ADSP2_PM, .base = 0x400000 },
66 { .type = WMFW_ADSP2_ZM, .base = 0x480000 },
67 { .type = WMFW_ADSP2_XM, .base = 0x490000 },
68 { .type = WMFW_ADSP2_YM, .base = 0x4a8000 },
69};
70
71static const struct wm_adsp_region *wm5110_dsp_regions[] = {
72 wm5110_dsp1_regions,
73 wm5110_dsp2_regions,
74 wm5110_dsp3_regions,
75 wm5110_dsp4_regions,
76};
77
40static const struct reg_default wm5110_sysclk_revd_patch[] = { 78static const struct reg_default wm5110_sysclk_revd_patch[] = {
41 { 0x3093, 0x1001 }, 79 { 0x3093, 0x1001 },
42 { 0x30E3, 0x1301 }, 80 { 0x30E3, 0x1301 },
@@ -67,8 +105,8 @@ static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w,
67 case SND_SOC_DAPM_POST_PMU: 105 case SND_SOC_DAPM_POST_PMU:
68 if (patch) 106 if (patch)
69 for (i = 0; i < patch_size; i++) 107 for (i = 0; i < patch_size; i++)
70 regmap_write(regmap, patch[i].reg, 108 regmap_write_async(regmap, patch[i].reg,
71 patch[i].def); 109 patch[i].def);
72 break; 110 break;
73 111
74 default: 112 default:
@@ -117,6 +155,25 @@ SOC_SINGLE_RANGE_TLV("IN3L Volume", ARIZONA_IN3L_CONTROL,
117SOC_SINGLE_RANGE_TLV("IN3R Volume", ARIZONA_IN3R_CONTROL, 155SOC_SINGLE_RANGE_TLV("IN3R Volume", ARIZONA_IN3R_CONTROL,
118 ARIZONA_IN3R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv), 156 ARIZONA_IN3R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, ana_tlv),
119 157
158SOC_ENUM("IN HPF Cutoff Frequency", arizona_in_hpf_cut_enum),
159
160SOC_SINGLE("IN1L HPF Switch", ARIZONA_IN1L_CONTROL,
161 ARIZONA_IN1L_HPF_SHIFT, 1, 0),
162SOC_SINGLE("IN1R HPF Switch", ARIZONA_IN1R_CONTROL,
163 ARIZONA_IN1R_HPF_SHIFT, 1, 0),
164SOC_SINGLE("IN2L HPF Switch", ARIZONA_IN2L_CONTROL,
165 ARIZONA_IN2L_HPF_SHIFT, 1, 0),
166SOC_SINGLE("IN2R HPF Switch", ARIZONA_IN2R_CONTROL,
167 ARIZONA_IN2R_HPF_SHIFT, 1, 0),
168SOC_SINGLE("IN3L HPF Switch", ARIZONA_IN3L_CONTROL,
169 ARIZONA_IN3L_HPF_SHIFT, 1, 0),
170SOC_SINGLE("IN3R HPF Switch", ARIZONA_IN3R_CONTROL,
171 ARIZONA_IN3R_HPF_SHIFT, 1, 0),
172SOC_SINGLE("IN4L HPF Switch", ARIZONA_IN4L_CONTROL,
173 ARIZONA_IN4L_HPF_SHIFT, 1, 0),
174SOC_SINGLE("IN4R HPF Switch", ARIZONA_IN4R_CONTROL,
175 ARIZONA_IN4R_HPF_SHIFT, 1, 0),
176
120SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L, 177SOC_SINGLE_TLV("IN1L Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1L,
121 ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv), 178 ARIZONA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, digital_tlv),
122SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R, 179SOC_SINGLE_TLV("IN1R Digital Volume", ARIZONA_ADC_DIGITAL_VOLUME_1R,
@@ -220,6 +277,14 @@ SOC_ENUM("LHPF2 Mode", arizona_lhpf2_mode),
220SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode), 277SOC_ENUM("LHPF3 Mode", arizona_lhpf3_mode),
221SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode), 278SOC_ENUM("LHPF4 Mode", arizona_lhpf4_mode),
222 279
280SOC_VALUE_ENUM("ISRC1 FSL", arizona_isrc_fsl[0]),
281SOC_VALUE_ENUM("ISRC2 FSL", arizona_isrc_fsl[1]),
282SOC_VALUE_ENUM("ISRC3 FSL", arizona_isrc_fsl[2]),
283SOC_VALUE_ENUM("ISRC1 FSH", arizona_isrc_fsh[0]),
284SOC_VALUE_ENUM("ISRC2 FSH", arizona_isrc_fsh[1]),
285SOC_VALUE_ENUM("ISRC3 FSH", arizona_isrc_fsh[2]),
286SOC_VALUE_ENUM("ASRC RATE 1", arizona_asrc_rate1),
287
223ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE), 288ARIZONA_MIXER_CONTROLS("DSP1L", ARIZONA_DSP1LMIX_INPUT_1_SOURCE),
224ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE), 289ARIZONA_MIXER_CONTROLS("DSP1R", ARIZONA_DSP1RMIX_INPUT_1_SOURCE),
225ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE), 290ARIZONA_MIXER_CONTROLS("DSP2L", ARIZONA_DSP2LMIX_INPUT_1_SOURCE),
@@ -285,6 +350,13 @@ SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT,
285SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, 350SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT,
286 ARIZONA_SPK2R_MUTE_SHIFT, 1, 1), 351 ARIZONA_SPK2R_MUTE_SHIFT, 1, 1),
287 352
353SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE,
354 ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0),
355SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE,
356 ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0),
357SOC_DOUBLE("HPOUT3 DRE Switch", ARIZONA_DRE_ENABLE,
358 ARIZONA_DRE3L_ENA_SHIFT, ARIZONA_DRE3R_ENA_SHIFT, 1, 0),
359
288SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp), 360SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp),
289SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp), 361SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp),
290 362
@@ -318,6 +390,10 @@ ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE),
318 390
319ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), 391ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE),
320ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), 392ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE),
393ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE),
394ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE),
395ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE),
396ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE),
321 397
322ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), 398ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE),
323ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), 399ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE),
@@ -347,6 +423,22 @@ ARIZONA_MIXER_ENUMS(LHPF2, ARIZONA_HPLP2MIX_INPUT_1_SOURCE);
347ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE); 423ARIZONA_MIXER_ENUMS(LHPF3, ARIZONA_HPLP3MIX_INPUT_1_SOURCE);
348ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE); 424ARIZONA_MIXER_ENUMS(LHPF4, ARIZONA_HPLP4MIX_INPUT_1_SOURCE);
349 425
426ARIZONA_MIXER_ENUMS(DSP1L, ARIZONA_DSP1LMIX_INPUT_1_SOURCE);
427ARIZONA_MIXER_ENUMS(DSP1R, ARIZONA_DSP1RMIX_INPUT_1_SOURCE);
428ARIZONA_DSP_AUX_ENUMS(DSP1, ARIZONA_DSP1AUX1MIX_INPUT_1_SOURCE);
429
430ARIZONA_MIXER_ENUMS(DSP2L, ARIZONA_DSP2LMIX_INPUT_1_SOURCE);
431ARIZONA_MIXER_ENUMS(DSP2R, ARIZONA_DSP2RMIX_INPUT_1_SOURCE);
432ARIZONA_DSP_AUX_ENUMS(DSP2, ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE);
433
434ARIZONA_MIXER_ENUMS(DSP3L, ARIZONA_DSP3LMIX_INPUT_1_SOURCE);
435ARIZONA_MIXER_ENUMS(DSP3R, ARIZONA_DSP3RMIX_INPUT_1_SOURCE);
436ARIZONA_DSP_AUX_ENUMS(DSP3, ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE);
437
438ARIZONA_MIXER_ENUMS(DSP4L, ARIZONA_DSP4LMIX_INPUT_1_SOURCE);
439ARIZONA_MIXER_ENUMS(DSP4R, ARIZONA_DSP4RMIX_INPUT_1_SOURCE);
440ARIZONA_DSP_AUX_ENUMS(DSP4, ARIZONA_DSP4AUX1MIX_INPUT_1_SOURCE);
441
350ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE); 442ARIZONA_MIXER_ENUMS(Mic, ARIZONA_MICMIX_INPUT_1_SOURCE);
351ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE); 443ARIZONA_MIXER_ENUMS(Noise, ARIZONA_NOISEMIX_INPUT_1_SOURCE);
352 444
@@ -377,6 +469,10 @@ ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE);
377 469
378ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); 470ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE);
379ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); 471ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE);
472ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE);
473ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE);
474ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE);
475ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE);
380 476
381ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); 477ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE);
382ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); 478ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE);
@@ -395,6 +491,36 @@ ARIZONA_MUX_ENUMS(ASRC1R, ARIZONA_ASRC1RMIX_INPUT_1_SOURCE);
395ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE); 491ARIZONA_MUX_ENUMS(ASRC2L, ARIZONA_ASRC2LMIX_INPUT_1_SOURCE);
396ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE); 492ARIZONA_MUX_ENUMS(ASRC2R, ARIZONA_ASRC2RMIX_INPUT_1_SOURCE);
397 493
494ARIZONA_MUX_ENUMS(ISRC1INT1, ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE);
495ARIZONA_MUX_ENUMS(ISRC1INT2, ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE);
496ARIZONA_MUX_ENUMS(ISRC1INT3, ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE);
497ARIZONA_MUX_ENUMS(ISRC1INT4, ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE);
498
499ARIZONA_MUX_ENUMS(ISRC1DEC1, ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE);
500ARIZONA_MUX_ENUMS(ISRC1DEC2, ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE);
501ARIZONA_MUX_ENUMS(ISRC1DEC3, ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE);
502ARIZONA_MUX_ENUMS(ISRC1DEC4, ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE);
503
504ARIZONA_MUX_ENUMS(ISRC2INT1, ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE);
505ARIZONA_MUX_ENUMS(ISRC2INT2, ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE);
506ARIZONA_MUX_ENUMS(ISRC2INT3, ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE);
507ARIZONA_MUX_ENUMS(ISRC2INT4, ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE);
508
509ARIZONA_MUX_ENUMS(ISRC2DEC1, ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE);
510ARIZONA_MUX_ENUMS(ISRC2DEC2, ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE);
511ARIZONA_MUX_ENUMS(ISRC2DEC3, ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE);
512ARIZONA_MUX_ENUMS(ISRC2DEC4, ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE);
513
514ARIZONA_MUX_ENUMS(ISRC3INT1, ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE);
515ARIZONA_MUX_ENUMS(ISRC3INT2, ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE);
516ARIZONA_MUX_ENUMS(ISRC3INT3, ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE);
517ARIZONA_MUX_ENUMS(ISRC3INT4, ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE);
518
519ARIZONA_MUX_ENUMS(ISRC3DEC1, ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE);
520ARIZONA_MUX_ENUMS(ISRC3DEC2, ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE);
521ARIZONA_MUX_ENUMS(ISRC3DEC3, ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE);
522ARIZONA_MUX_ENUMS(ISRC3DEC4, ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE);
523
398static const char *wm5110_aec_loopback_texts[] = { 524static const char *wm5110_aec_loopback_texts[] = {
399 "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", 525 "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R",
400 "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R", 526 "SPKOUTL", "SPKOUTR", "SPKDAT1L", "SPKDAT1R", "SPKDAT2L", "SPKDAT2R",
@@ -535,6 +661,65 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0,
535SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, 661SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0,
536 NULL, 0), 662 NULL, 0),
537 663
664WM_ADSP2("DSP1", 0),
665WM_ADSP2("DSP2", 1),
666WM_ADSP2("DSP3", 2),
667WM_ADSP2("DSP4", 3),
668
669SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3,
670 ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0),
671SND_SOC_DAPM_PGA("ISRC1INT2", ARIZONA_ISRC_1_CTRL_3,
672 ARIZONA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0),
673SND_SOC_DAPM_PGA("ISRC1INT3", ARIZONA_ISRC_1_CTRL_3,
674 ARIZONA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0),
675SND_SOC_DAPM_PGA("ISRC1INT4", ARIZONA_ISRC_1_CTRL_3,
676 ARIZONA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0),
677
678SND_SOC_DAPM_PGA("ISRC1DEC1", ARIZONA_ISRC_1_CTRL_3,
679 ARIZONA_ISRC1_DEC0_ENA_SHIFT, 0, NULL, 0),
680SND_SOC_DAPM_PGA("ISRC1DEC2", ARIZONA_ISRC_1_CTRL_3,
681 ARIZONA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0),
682SND_SOC_DAPM_PGA("ISRC1DEC3", ARIZONA_ISRC_1_CTRL_3,
683 ARIZONA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0),
684SND_SOC_DAPM_PGA("ISRC1DEC4", ARIZONA_ISRC_1_CTRL_3,
685 ARIZONA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0),
686
687SND_SOC_DAPM_PGA("ISRC2INT1", ARIZONA_ISRC_2_CTRL_3,
688 ARIZONA_ISRC2_INT0_ENA_SHIFT, 0, NULL, 0),
689SND_SOC_DAPM_PGA("ISRC2INT2", ARIZONA_ISRC_2_CTRL_3,
690 ARIZONA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0),
691SND_SOC_DAPM_PGA("ISRC2INT3", ARIZONA_ISRC_2_CTRL_3,
692 ARIZONA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0),
693SND_SOC_DAPM_PGA("ISRC2INT4", ARIZONA_ISRC_2_CTRL_3,
694 ARIZONA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0),
695
696SND_SOC_DAPM_PGA("ISRC2DEC1", ARIZONA_ISRC_2_CTRL_3,
697 ARIZONA_ISRC2_DEC0_ENA_SHIFT, 0, NULL, 0),
698SND_SOC_DAPM_PGA("ISRC2DEC2", ARIZONA_ISRC_2_CTRL_3,
699 ARIZONA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0),
700SND_SOC_DAPM_PGA("ISRC2DEC3", ARIZONA_ISRC_2_CTRL_3,
701 ARIZONA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0),
702SND_SOC_DAPM_PGA("ISRC2DEC4", ARIZONA_ISRC_2_CTRL_3,
703 ARIZONA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0),
704
705SND_SOC_DAPM_PGA("ISRC3INT1", ARIZONA_ISRC_3_CTRL_3,
706 ARIZONA_ISRC3_INT0_ENA_SHIFT, 0, NULL, 0),
707SND_SOC_DAPM_PGA("ISRC3INT2", ARIZONA_ISRC_3_CTRL_3,
708 ARIZONA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0),
709SND_SOC_DAPM_PGA("ISRC3INT3", ARIZONA_ISRC_3_CTRL_3,
710 ARIZONA_ISRC3_INT2_ENA_SHIFT, 0, NULL, 0),
711SND_SOC_DAPM_PGA("ISRC3INT4", ARIZONA_ISRC_3_CTRL_3,
712 ARIZONA_ISRC3_INT3_ENA_SHIFT, 0, NULL, 0),
713
714SND_SOC_DAPM_PGA("ISRC3DEC1", ARIZONA_ISRC_3_CTRL_3,
715 ARIZONA_ISRC3_DEC0_ENA_SHIFT, 0, NULL, 0),
716SND_SOC_DAPM_PGA("ISRC3DEC2", ARIZONA_ISRC_3_CTRL_3,
717 ARIZONA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0),
718SND_SOC_DAPM_PGA("ISRC3DEC3", ARIZONA_ISRC_3_CTRL_3,
719 ARIZONA_ISRC3_DEC2_ENA_SHIFT, 0, NULL, 0),
720SND_SOC_DAPM_PGA("ISRC3DEC4", ARIZONA_ISRC_3_CTRL_3,
721 ARIZONA_ISRC3_DEC3_ENA_SHIFT, 0, NULL, 0),
722
538SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1, 723SND_SOC_DAPM_VALUE_MUX("AEC Loopback", ARIZONA_DAC_AEC_CONTROL_1,
539 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0, 724 ARIZONA_AEC_LOOPBACK_ENA_SHIFT, 0,
540 &wm5110_aec_loopback_mux), 725 &wm5110_aec_loopback_mux),
@@ -577,11 +762,27 @@ SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0,
577 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), 762 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0),
578SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, 763SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0,
579 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), 764 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0),
765SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0,
766 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0),
767SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0,
768 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0),
769SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0,
770 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0),
771SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0,
772 ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0),
580 773
581SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, 774SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0,
582 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), 775 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0),
583SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, 776SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0,
584 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), 777 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0),
778SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0,
779 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0),
780SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0,
781 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0),
782SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0,
783 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0),
784SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0,
785 ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0),
585 786
586SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, 787SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0,
587 ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, 788 ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE,
@@ -719,6 +920,10 @@ ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"),
719 920
720ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), 921ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"),
721ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), 922ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"),
923ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"),
924ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"),
925ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"),
926ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"),
722 927
723ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), 928ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"),
724ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), 929ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"),
@@ -737,6 +942,41 @@ ARIZONA_MUX_WIDGETS(ASRC1R, "ASRC1R"),
737ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"), 942ARIZONA_MUX_WIDGETS(ASRC2L, "ASRC2L"),
738ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"), 943ARIZONA_MUX_WIDGETS(ASRC2R, "ASRC2R"),
739 944
945ARIZONA_DSP_WIDGETS(DSP1, "DSP1"),
946ARIZONA_DSP_WIDGETS(DSP2, "DSP2"),
947ARIZONA_DSP_WIDGETS(DSP3, "DSP3"),
948ARIZONA_DSP_WIDGETS(DSP4, "DSP4"),
949
950ARIZONA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"),
951ARIZONA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"),
952ARIZONA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"),
953ARIZONA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"),
954
955ARIZONA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"),
956ARIZONA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"),
957ARIZONA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"),
958ARIZONA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"),
959
960ARIZONA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"),
961ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"),
962ARIZONA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"),
963ARIZONA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"),
964
965ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"),
966ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"),
967ARIZONA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"),
968ARIZONA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"),
969
970ARIZONA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"),
971ARIZONA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"),
972ARIZONA_MUX_WIDGETS(ISRC3DEC3, "ISRC3DEC3"),
973ARIZONA_MUX_WIDGETS(ISRC3DEC4, "ISRC3DEC4"),
974
975ARIZONA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"),
976ARIZONA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"),
977ARIZONA_MUX_WIDGETS(ISRC3INT3, "ISRC3INT3"),
978ARIZONA_MUX_WIDGETS(ISRC3INT4, "ISRC3INT4"),
979
740SND_SOC_DAPM_OUTPUT("HPOUT1L"), 980SND_SOC_DAPM_OUTPUT("HPOUT1L"),
741SND_SOC_DAPM_OUTPUT("HPOUT1R"), 981SND_SOC_DAPM_OUTPUT("HPOUT1R"),
742SND_SOC_DAPM_OUTPUT("HPOUT2L"), 982SND_SOC_DAPM_OUTPUT("HPOUT2L"),
@@ -780,6 +1020,10 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"),
780 { name, "AIF1RX8", "AIF1RX8" }, \ 1020 { name, "AIF1RX8", "AIF1RX8" }, \
781 { name, "AIF2RX1", "AIF2RX1" }, \ 1021 { name, "AIF2RX1", "AIF2RX1" }, \
782 { name, "AIF2RX2", "AIF2RX2" }, \ 1022 { name, "AIF2RX2", "AIF2RX2" }, \
1023 { name, "AIF2RX3", "AIF2RX3" }, \
1024 { name, "AIF2RX4", "AIF2RX4" }, \
1025 { name, "AIF2RX5", "AIF2RX5" }, \
1026 { name, "AIF2RX6", "AIF2RX6" }, \
783 { name, "AIF3RX1", "AIF3RX1" }, \ 1027 { name, "AIF3RX1", "AIF3RX1" }, \
784 { name, "AIF3RX2", "AIF3RX2" }, \ 1028 { name, "AIF3RX2", "AIF3RX2" }, \
785 { name, "SLIMRX1", "SLIMRX1" }, \ 1029 { name, "SLIMRX1", "SLIMRX1" }, \
@@ -805,7 +1049,55 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"),
805 { name, "ASRC1L", "ASRC1L" }, \ 1049 { name, "ASRC1L", "ASRC1L" }, \
806 { name, "ASRC1R", "ASRC1R" }, \ 1050 { name, "ASRC1R", "ASRC1R" }, \
807 { name, "ASRC2L", "ASRC2L" }, \ 1051 { name, "ASRC2L", "ASRC2L" }, \
808 { name, "ASRC2R", "ASRC2R" } 1052 { name, "ASRC2R", "ASRC2R" }, \
1053 { name, "ISRC1DEC1", "ISRC1DEC1" }, \
1054 { name, "ISRC1DEC2", "ISRC1DEC2" }, \
1055 { name, "ISRC1DEC3", "ISRC1DEC3" }, \
1056 { name, "ISRC1DEC4", "ISRC1DEC4" }, \
1057 { name, "ISRC1INT1", "ISRC1INT1" }, \
1058 { name, "ISRC1INT2", "ISRC1INT2" }, \
1059 { name, "ISRC1INT3", "ISRC1INT3" }, \
1060 { name, "ISRC1INT4", "ISRC1INT4" }, \
1061 { name, "ISRC2DEC1", "ISRC2DEC1" }, \
1062 { name, "ISRC2DEC2", "ISRC2DEC2" }, \
1063 { name, "ISRC2DEC3", "ISRC2DEC3" }, \
1064 { name, "ISRC2DEC4", "ISRC2DEC4" }, \
1065 { name, "ISRC2INT1", "ISRC2INT1" }, \
1066 { name, "ISRC2INT2", "ISRC2INT2" }, \
1067 { name, "ISRC2INT3", "ISRC2INT3" }, \
1068 { name, "ISRC2INT4", "ISRC2INT4" }, \
1069 { name, "ISRC3DEC1", "ISRC3DEC1" }, \
1070 { name, "ISRC3DEC2", "ISRC3DEC2" }, \
1071 { name, "ISRC3DEC3", "ISRC3DEC3" }, \
1072 { name, "ISRC3DEC4", "ISRC3DEC4" }, \
1073 { name, "ISRC3INT1", "ISRC3INT1" }, \
1074 { name, "ISRC3INT2", "ISRC3INT2" }, \
1075 { name, "ISRC3INT3", "ISRC3INT3" }, \
1076 { name, "ISRC3INT4", "ISRC3INT4" }, \
1077 { name, "DSP1.1", "DSP1" }, \
1078 { name, "DSP1.2", "DSP1" }, \
1079 { name, "DSP1.3", "DSP1" }, \
1080 { name, "DSP1.4", "DSP1" }, \
1081 { name, "DSP1.5", "DSP1" }, \
1082 { name, "DSP1.6", "DSP1" }, \
1083 { name, "DSP2.1", "DSP2" }, \
1084 { name, "DSP2.2", "DSP2" }, \
1085 { name, "DSP2.3", "DSP2" }, \
1086 { name, "DSP2.4", "DSP2" }, \
1087 { name, "DSP2.5", "DSP2" }, \
1088 { name, "DSP2.6", "DSP2" }, \
1089 { name, "DSP3.1", "DSP3" }, \
1090 { name, "DSP3.2", "DSP3" }, \
1091 { name, "DSP3.3", "DSP3" }, \
1092 { name, "DSP3.4", "DSP3" }, \
1093 { name, "DSP3.5", "DSP3" }, \
1094 { name, "DSP3.6", "DSP3" }, \
1095 { name, "DSP4.1", "DSP4" }, \
1096 { name, "DSP4.2", "DSP4" }, \
1097 { name, "DSP4.3", "DSP4" }, \
1098 { name, "DSP4.4", "DSP4" }, \
1099 { name, "DSP4.5", "DSP4" }, \
1100 { name, "DSP4.6", "DSP4" }
809 1101
810static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { 1102static const struct snd_soc_dapm_route wm5110_dapm_routes[] = {
811 { "AIF2 Capture", NULL, "DBVDD2" }, 1103 { "AIF2 Capture", NULL, "DBVDD2" },
@@ -877,9 +1169,17 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = {
877 1169
878 { "AIF2 Capture", NULL, "AIF2TX1" }, 1170 { "AIF2 Capture", NULL, "AIF2TX1" },
879 { "AIF2 Capture", NULL, "AIF2TX2" }, 1171 { "AIF2 Capture", NULL, "AIF2TX2" },
1172 { "AIF2 Capture", NULL, "AIF2TX3" },
1173 { "AIF2 Capture", NULL, "AIF2TX4" },
1174 { "AIF2 Capture", NULL, "AIF2TX5" },
1175 { "AIF2 Capture", NULL, "AIF2TX6" },
880 1176
881 { "AIF2RX1", NULL, "AIF2 Playback" }, 1177 { "AIF2RX1", NULL, "AIF2 Playback" },
882 { "AIF2RX2", NULL, "AIF2 Playback" }, 1178 { "AIF2RX2", NULL, "AIF2 Playback" },
1179 { "AIF2RX3", NULL, "AIF2 Playback" },
1180 { "AIF2RX4", NULL, "AIF2 Playback" },
1181 { "AIF2RX5", NULL, "AIF2 Playback" },
1182 { "AIF2RX6", NULL, "AIF2 Playback" },
883 1183
884 { "AIF3 Capture", NULL, "AIF3TX1" }, 1184 { "AIF3 Capture", NULL, "AIF3TX1" },
885 { "AIF3 Capture", NULL, "AIF3TX2" }, 1185 { "AIF3 Capture", NULL, "AIF3TX2" },
@@ -963,6 +1263,10 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = {
963 1263
964 ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), 1264 ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"),
965 ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), 1265 ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"),
1266 ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"),
1267 ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"),
1268 ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"),
1269 ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"),
966 1270
967 ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), 1271 ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"),
968 ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), 1272 ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"),
@@ -999,6 +1303,41 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = {
999 ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), 1303 ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"),
1000 ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), 1304 ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"),
1001 1305
1306 ARIZONA_DSP_ROUTES("DSP1"),
1307 ARIZONA_DSP_ROUTES("DSP2"),
1308 ARIZONA_DSP_ROUTES("DSP3"),
1309 ARIZONA_DSP_ROUTES("DSP4"),
1310
1311 ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"),
1312 ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"),
1313 ARIZONA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"),
1314 ARIZONA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"),
1315
1316 ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"),
1317 ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"),
1318 ARIZONA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"),
1319 ARIZONA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"),
1320
1321 ARIZONA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"),
1322 ARIZONA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"),
1323 ARIZONA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"),
1324 ARIZONA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"),
1325
1326 ARIZONA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"),
1327 ARIZONA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"),
1328 ARIZONA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"),
1329 ARIZONA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"),
1330
1331 ARIZONA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"),
1332 ARIZONA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"),
1333 ARIZONA_MUX_ROUTES("ISRC3INT3", "ISRC3INT3"),
1334 ARIZONA_MUX_ROUTES("ISRC3INT4", "ISRC3INT4"),
1335
1336 ARIZONA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"),
1337 ARIZONA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"),
1338 ARIZONA_MUX_ROUTES("ISRC3DEC3", "ISRC3DEC3"),
1339 ARIZONA_MUX_ROUTES("ISRC3DEC4", "ISRC3DEC4"),
1340
1002 { "AEC Loopback", "HPOUT1L", "OUT1L" }, 1341 { "AEC Loopback", "HPOUT1L", "OUT1L" },
1003 { "AEC Loopback", "HPOUT1R", "OUT1R" }, 1342 { "AEC Loopback", "HPOUT1R", "OUT1R" },
1004 { "HPOUT1L", NULL, "OUT1L" }, 1343 { "HPOUT1L", NULL, "OUT1L" },
@@ -1095,14 +1434,14 @@ static struct snd_soc_dai_driver wm5110_dai[] = {
1095 .playback = { 1434 .playback = {
1096 .stream_name = "AIF2 Playback", 1435 .stream_name = "AIF2 Playback",
1097 .channels_min = 1, 1436 .channels_min = 1,
1098 .channels_max = 2, 1437 .channels_max = 6,
1099 .rates = WM5110_RATES, 1438 .rates = WM5110_RATES,
1100 .formats = WM5110_FORMATS, 1439 .formats = WM5110_FORMATS,
1101 }, 1440 },
1102 .capture = { 1441 .capture = {
1103 .stream_name = "AIF2 Capture", 1442 .stream_name = "AIF2 Capture",
1104 .channels_min = 1, 1443 .channels_min = 1,
1105 .channels_max = 2, 1444 .channels_max = 6,
1106 .rates = WM5110_RATES, 1445 .rates = WM5110_RATES,
1107 .formats = WM5110_FORMATS, 1446 .formats = WM5110_FORMATS,
1108 }, 1447 },
@@ -1204,6 +1543,10 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec)
1204 arizona_init_spk(codec); 1543 arizona_init_spk(codec);
1205 arizona_init_gpio(codec); 1544 arizona_init_gpio(codec);
1206 1545
1546 ret = snd_soc_add_codec_controls(codec, wm_adsp2_fw_controls, 8);
1547 if (ret != 0)
1548 return ret;
1549
1207 snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS"); 1550 snd_soc_dapm_disable_pin(&codec->dapm, "HAPTICS");
1208 1551
1209 priv->core.arizona->dapm = &codec->dapm; 1552 priv->core.arizona->dapm = &codec->dapm;
@@ -1258,7 +1601,7 @@ static int wm5110_probe(struct platform_device *pdev)
1258{ 1601{
1259 struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); 1602 struct arizona *arizona = dev_get_drvdata(pdev->dev.parent);
1260 struct wm5110_priv *wm5110; 1603 struct wm5110_priv *wm5110;
1261 int i; 1604 int i, ret;
1262 1605
1263 wm5110 = devm_kzalloc(&pdev->dev, sizeof(struct wm5110_priv), 1606 wm5110 = devm_kzalloc(&pdev->dev, sizeof(struct wm5110_priv),
1264 GFP_KERNEL); 1607 GFP_KERNEL);
@@ -1269,6 +1612,24 @@ static int wm5110_probe(struct platform_device *pdev)
1269 wm5110->core.arizona = arizona; 1612 wm5110->core.arizona = arizona;
1270 wm5110->core.num_inputs = 8; 1613 wm5110->core.num_inputs = 8;
1271 1614
1615 for (i = 0; i < WM5110_NUM_ADSP; i++) {
1616 wm5110->core.adsp[i].part = "wm5110";
1617 wm5110->core.adsp[i].num = i + 1;
1618 wm5110->core.adsp[i].type = WMFW_ADSP2;
1619 wm5110->core.adsp[i].dev = arizona->dev;
1620 wm5110->core.adsp[i].regmap = arizona->regmap;
1621
1622 wm5110->core.adsp[i].base = ARIZONA_DSP1_CONTROL_1
1623 + (0x100 * i);
1624 wm5110->core.adsp[i].mem = wm5110_dsp_regions[i];
1625 wm5110->core.adsp[i].num_mems
1626 = ARRAY_SIZE(wm5110_dsp1_regions);
1627
1628 ret = wm_adsp2_init(&wm5110->core.adsp[i], false);
1629 if (ret != 0)
1630 return ret;
1631 }
1632
1272 for (i = 0; i < ARRAY_SIZE(wm5110->fll); i++) 1633 for (i = 0; i < ARRAY_SIZE(wm5110->fll); i++)
1273 wm5110->fll[i].vco_mult = 3; 1634 wm5110->fll[i].vco_mult = 3;
1274 1635
@@ -1279,6 +1640,12 @@ static int wm5110_probe(struct platform_device *pdev)
1279 ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK, 1640 ARIZONA_IRQ_FLL2_LOCK, ARIZONA_IRQ_FLL2_CLOCK_OK,
1280 &wm5110->fll[1]); 1641 &wm5110->fll[1]);
1281 1642
1643 /* SR2 fixed at 8kHz, SR3 fixed at 16kHz */
1644 regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_2,
1645 ARIZONA_SAMPLE_RATE_2_MASK, 0x11);
1646 regmap_update_bits(arizona->regmap, ARIZONA_SAMPLE_RATE_3,
1647 ARIZONA_SAMPLE_RATE_3_MASK, 0x12);
1648
1282 for (i = 0; i < ARRAY_SIZE(wm5110_dai); i++) 1649 for (i = 0; i < ARRAY_SIZE(wm5110_dai); i++)
1283 arizona_init_dai(&wm5110->core, i); 1650 arizona_init_dai(&wm5110->core, i);
1284 1651
diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c
index 1392bb3c9254..555115ee2159 100644
--- a/sound/soc/codecs/wm8997.c
+++ b/sound/soc/codecs/wm8997.c
@@ -103,8 +103,8 @@ static int wm8997_sysclk_ev(struct snd_soc_dapm_widget *w,
103 case SND_SOC_DAPM_POST_PMU: 103 case SND_SOC_DAPM_POST_PMU:
104 if (patch) 104 if (patch)
105 for (i = 0; i < patch_size; i++) 105 for (i = 0; i < patch_size; i++)
106 regmap_write(regmap, patch[i].reg, 106 regmap_write_async(regmap, patch[i].reg,
107 patch[i].def); 107 patch[i].def);
108 break; 108 break;
109 default: 109 default:
110 break; 110 break;
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c
index 46ec0e9744d4..b42f9af163c8 100644
--- a/sound/soc/codecs/wm_adsp.c
+++ b/sound/soc/codecs/wm_adsp.c
@@ -1286,6 +1286,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1286 reg = wm_adsp_region_to_reg(mem, 1286 reg = wm_adsp_region_to_reg(mem,
1287 reg); 1287 reg);
1288 reg += offset; 1288 reg += offset;
1289 break;
1289 } 1290 }
1290 } 1291 }
1291 1292
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-28 03:31:37 -0400