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-rw-r--r--Documentation/RCU/NMI-RCU.txt3
-rw-r--r--Documentation/RCU/RTFP.txt108
-rw-r--r--Documentation/RCU/checklist.txt89
-rw-r--r--Documentation/RCU/torture.txt48
-rw-r--r--Documentation/RCU/whatisRCU.txt58
-rw-r--r--MAINTAINERS5
-rw-r--r--arch/Kconfig3
-rw-r--r--arch/alpha/Kconfig1
-rw-r--r--arch/alpha/kernel/core_marvel.c6
-rw-r--r--arch/alpha/kernel/process.c2
-rw-r--r--arch/alpha/kernel/smp.c180
-rw-r--r--arch/alpha/oprofile/common.c6
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/kernel/smp.c163
-rw-r--r--arch/arm/oprofile/op_model_mpcore.c2
-rw-r--r--arch/arm/vfp/vfpmodule.c2
-rw-r--r--arch/cris/arch-v32/kernel/smp.c5
-rw-r--r--arch/ia64/Kconfig1
-rw-r--r--arch/ia64/kernel/mca.c6
-rw-r--r--arch/ia64/kernel/palinfo.c2
-rw-r--r--arch/ia64/kernel/perfmon.c6
-rw-r--r--arch/ia64/kernel/process.c2
-rw-r--r--arch/ia64/kernel/smp.c254
-rw-r--r--arch/ia64/kernel/smpboot.c6
-rw-r--r--arch/ia64/kernel/uncached.c5
-rw-r--r--arch/ia64/sn/kernel/irq.c1
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_hwperf.c2
-rw-r--r--arch/m32r/Kconfig1
-rw-r--r--arch/m32r/kernel/m32r_ksyms.c3
-rw-r--r--arch/m32r/kernel/smp.c132
-rw-r--r--arch/m32r/kernel/traps.c3
-rw-r--r--arch/mips/Kconfig131
-rw-r--r--arch/mips/Makefile59
-rw-r--r--arch/mips/au1000/common/platform.c29
-rw-r--r--arch/mips/au1000/mtx-1/platform.c51
-rw-r--r--arch/mips/au1000/pb1200/platform.c5
-rw-r--r--arch/mips/cobalt/Makefile2
-rw-r--r--arch/mips/cobalt/lcd.c55
-rw-r--r--arch/mips/configs/atlas_defconfig1472
-rw-r--r--arch/mips/configs/bcm47xx_defconfig2
-rw-r--r--arch/mips/configs/bigsur_defconfig164
-rw-r--r--arch/mips/configs/capcella_defconfig2
-rw-r--r--arch/mips/configs/cobalt_defconfig2
-rw-r--r--arch/mips/configs/db1000_defconfig2
-rw-r--r--arch/mips/configs/db1100_defconfig2
-rw-r--r--arch/mips/configs/db1200_defconfig2
-rw-r--r--arch/mips/configs/db1500_defconfig2
-rw-r--r--arch/mips/configs/db1550_defconfig2
-rw-r--r--arch/mips/configs/decstation_defconfig2
-rw-r--r--arch/mips/configs/e55_defconfig2
-rw-r--r--arch/mips/configs/emma2rh_defconfig2
-rw-r--r--arch/mips/configs/excite_defconfig2
-rw-r--r--arch/mips/configs/fulong_defconfig2
-rw-r--r--arch/mips/configs/ip22_defconfig2
-rw-r--r--arch/mips/configs/ip27_defconfig2
-rw-r--r--arch/mips/configs/ip28_defconfig2
-rw-r--r--arch/mips/configs/ip32_defconfig2
-rw-r--r--arch/mips/configs/jazz_defconfig2
-rw-r--r--arch/mips/configs/jmr3927_defconfig190
-rw-r--r--arch/mips/configs/lasat_defconfig2
-rw-r--r--arch/mips/configs/malta_defconfig3
-rw-r--r--arch/mips/configs/mipssim_defconfig2
-rw-r--r--arch/mips/configs/mpc30x_defconfig2
-rw-r--r--arch/mips/configs/msp71xx_defconfig2
-rw-r--r--arch/mips/configs/mtx1_defconfig2
-rw-r--r--arch/mips/configs/pb1100_defconfig2
-rw-r--r--arch/mips/configs/pb1500_defconfig2
-rw-r--r--arch/mips/configs/pb1550_defconfig2
-rw-r--r--arch/mips/configs/pnx8550-jbs_defconfig2
-rw-r--r--arch/mips/configs/pnx8550-stb810_defconfig2
-rw-r--r--arch/mips/configs/rbhma4200_defconfig669
-rw-r--r--arch/mips/configs/rbtx49xx_defconfig (renamed from arch/mips/configs/rbhma4500_defconfig)208
-rw-r--r--arch/mips/configs/rm200_defconfig2
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig2
-rw-r--r--arch/mips/configs/sead_defconfig642
-rw-r--r--arch/mips/configs/tb0219_defconfig2
-rw-r--r--arch/mips/configs/tb0226_defconfig2
-rw-r--r--arch/mips/configs/tb0287_defconfig2
-rw-r--r--arch/mips/configs/workpad_defconfig2
-rw-r--r--arch/mips/configs/wrppmc_defconfig2
-rw-r--r--arch/mips/configs/yosemite_defconfig2
-rw-r--r--arch/mips/emma2rh/common/prom.c15
-rw-r--r--arch/mips/fw/arc/identify.c11
-rw-r--r--arch/mips/gt64120/wrppmc/reset.c14
-rw-r--r--arch/mips/gt64120/wrppmc/setup.c3
-rw-r--r--arch/mips/jazz/setup.c4
-rw-r--r--arch/mips/jmr3927/common/Makefile7
-rw-r--r--arch/mips/jmr3927/common/puts.c60
-rw-r--r--arch/mips/jmr3927/rbhma3100/init.c57
-rw-r--r--arch/mips/kernel/Makefile6
-rw-r--r--arch/mips/kernel/early_printk.c2
-rw-r--r--arch/mips/kernel/gpio_txx9.c10
-rw-r--r--arch/mips/kernel/i8253.c2
-rw-r--r--arch/mips/kernel/irix5sys.S1041
-rw-r--r--arch/mips/kernel/irixelf.c1361
-rw-r--r--arch/mips/kernel/irixinv.c78
-rw-r--r--arch/mips/kernel/irixioctl.c213
-rw-r--r--arch/mips/kernel/irixsig.c888
-rw-r--r--arch/mips/kernel/irq-rm9000.c4
-rw-r--r--arch/mips/kernel/irq.c4
-rw-r--r--arch/mips/kernel/mips-mt.c11
-rw-r--r--arch/mips/kernel/process.c7
-rw-r--r--arch/mips/kernel/scall32-o32.S19
-rw-r--r--arch/mips/kernel/setup.c13
-rw-r--r--arch/mips/kernel/smp.c149
-rw-r--r--arch/mips/kernel/smtc.c1
-rw-r--r--arch/mips/kernel/sysirix.c2140
-rw-r--r--arch/mips/kernel/traps.c14
-rw-r--r--arch/mips/lasat/interrupt.c21
-rw-r--r--arch/mips/lasat/lasat_board.c3
-rw-r--r--arch/mips/lasat/prom.c8
-rw-r--r--arch/mips/lasat/serial.c3
-rw-r--r--arch/mips/lasat/setup.c8
-rw-r--r--arch/mips/mips-boards/atlas/Makefile22
-rw-r--r--arch/mips/mips-boards/atlas/atlas_gdb.c97
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c272
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c82
-rw-r--r--arch/mips/mips-boards/generic/Makefile29
-rw-r--r--arch/mips/mips-boards/malta/Makefile27
-rw-r--r--arch/mips/mips-boards/sead/Makefile28
-rw-r--r--arch/mips/mips-boards/sead/sead_int.c117
-rw-r--r--arch/mips/mips-boards/sead/sead_setup.c77
-rw-r--r--arch/mips/mm/c-r4k.c18
-rw-r--r--arch/mips/mm/uasm.c4
-rw-r--r--arch/mips/mm/uasm.h2
-rw-r--r--arch/mips/mti-malta/Makefile21
-rw-r--r--arch/mips/mti-malta/malta-amon.c (renamed from arch/mips/mips-boards/generic/amon.c)0
-rw-r--r--arch/mips/mti-malta/malta-cmdline.c (renamed from arch/mips/mips-boards/generic/cmdline.c)0
-rw-r--r--arch/mips/mti-malta/malta-console.c (renamed from arch/mips/mips-boards/generic/console.c)21
-rw-r--r--arch/mips/mti-malta/malta-display.c (renamed from arch/mips/mips-boards/generic/display.c)1
-rw-r--r--arch/mips/mti-malta/malta-init.c (renamed from arch/mips/mips-boards/generic/init.c)12
-rw-r--r--arch/mips/mti-malta/malta-int.c (renamed from arch/mips/mips-boards/malta/malta_int.c)11
-rw-r--r--arch/mips/mti-malta/malta-kgdb.c (renamed from arch/mips/mips-boards/generic/gdb_hook.c)0
-rw-r--r--arch/mips/mti-malta/malta-memory.c (renamed from arch/mips/mips-boards/generic/memory.c)6
-rw-r--r--arch/mips/mti-malta/malta-mtd.c (renamed from arch/mips/mips-boards/malta/malta_mtd.c)0
-rw-r--r--arch/mips/mti-malta/malta-pci.c (renamed from arch/mips/mips-boards/generic/pci.c)0
-rw-r--r--arch/mips/mti-malta/malta-platform.c (renamed from arch/mips/mips-boards/malta/malta_platform.c)0
-rw-r--r--arch/mips/mti-malta/malta-reset.c (renamed from arch/mips/mips-boards/generic/reset.c)19
-rw-r--r--arch/mips/mti-malta/malta-setup.c (renamed from arch/mips/mips-boards/malta/malta_setup.c)0
-rw-r--r--arch/mips/mti-malta/malta-smtc.c (renamed from arch/mips/mips-boards/malta/malta_smtc.c)0
-rw-r--r--arch/mips/mti-malta/malta-time.c (renamed from arch/mips/mips-boards/generic/time.c)23
-rw-r--r--arch/mips/nxp/pnx8550/common/platform.c9
-rw-r--r--arch/mips/oprofile/common.c6
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c4
-rw-r--r--arch/mips/pci/Makefile13
-rw-r--r--arch/mips/pci/fixup-atlas.c91
-rw-r--r--arch/mips/pci/fixup-jmr3927.c35
-rw-r--r--arch/mips/pci/fixup-rbtx4927.c119
-rw-r--r--arch/mips/pci/fixup-rbtx4938.c53
-rw-r--r--arch/mips/pci/fixup-tx4938.c92
-rw-r--r--arch/mips/pci/fixup-vr4133.c195
-rw-r--r--arch/mips/pci/ops-mace.c7
-rw-r--r--arch/mips/pci/ops-tx3927.c87
-rw-r--r--arch/mips/pci/ops-tx4927.c517
-rw-r--r--arch/mips/pci/ops-tx4938.c214
-rw-r--r--arch/mips/pci/pci-bcm1480.c3
-rw-r--r--arch/mips/pci/pci-ip27.c1
-rw-r--r--arch/mips/pci/pci-jmr3927.c58
-rw-r--r--arch/mips/pci/pci-lasat.c14
-rw-r--r--arch/mips/pci/pci-sb1250.c4
-rw-r--r--arch/mips/pci/pci-tx4927.c83
-rw-r--r--arch/mips/pci/pci-tx4938.c134
-rw-r--r--arch/mips/pci/pci.c3
-rw-r--r--arch/mips/pmc-sierra/yosemite/prom.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-mc.c26
-rw-r--r--arch/mips/sgi-ip22/ip22-platform.c18
-rw-r--r--arch/mips/sgi-ip22/ip22-reset.c51
-rw-r--r--arch/mips/sgi-ip22/ip28-berr.c4
-rw-r--r--arch/mips/sgi-ip27/ip27-nmi.c10
-rw-r--r--arch/mips/sgi-ip32/ip32-platform.c36
-rw-r--r--arch/mips/sibyte/cfe/setup.c2
-rw-r--r--arch/mips/sibyte/sb1250/prom.c2
-rw-r--r--arch/mips/sni/setup.c1
-rw-r--r--arch/mips/tx4927/Kconfig3
-rw-r--r--arch/mips/tx4927/common/Makefile10
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/Makefile5
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c428
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c94
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c1001
-rw-r--r--arch/mips/tx4938/Kconfig24
-rw-r--r--arch/mips/tx4938/common/Makefile8
-rw-r--r--arch/mips/tx4938/common/irq.c48
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/prom.c74
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/setup.c1124
-rw-r--r--arch/mips/txx9/Kconfig115
-rw-r--r--arch/mips/txx9/generic/Makefile12
-rw-r--r--arch/mips/txx9/generic/dbgio.c (renamed from arch/mips/tx4938/common/dbgio.c)0
-rw-r--r--arch/mips/txx9/generic/irq_tx4927.c (renamed from arch/mips/tx4927/common/tx4927_irq.c)34
-rw-r--r--arch/mips/txx9/generic/irq_tx4938.c25
-rw-r--r--arch/mips/txx9/generic/mem_tx4927.c (renamed from arch/mips/tx4927/common/tx4927_prom.c)9
-rw-r--r--arch/mips/txx9/generic/mem_tx4938.c (renamed from arch/mips/tx4938/common/prom.c)0
-rw-r--r--arch/mips/txx9/generic/pci.c388
-rw-r--r--arch/mips/txx9/generic/setup.c212
-rw-r--r--arch/mips/txx9/generic/smsc_fdc37m81x.c (renamed from arch/mips/tx4927/common/smsc_fdc37m81x.c)2
-rw-r--r--arch/mips/txx9/jmr3927/Makefile (renamed from arch/mips/jmr3927/rbhma3100/Makefile)4
-rw-r--r--arch/mips/txx9/jmr3927/irq.c (renamed from arch/mips/jmr3927/rbhma3100/irq.c)49
-rw-r--r--arch/mips/txx9/jmr3927/kgdb_io.c (renamed from arch/mips/jmr3927/rbhma3100/kgdb_io.c)2
-rw-r--r--arch/mips/txx9/jmr3927/prom.c (renamed from arch/mips/jmr3927/common/prom.c)52
-rw-r--r--arch/mips/txx9/jmr3927/setup.c (renamed from arch/mips/jmr3927/rbhma3100/setup.c)168
-rw-r--r--arch/mips/txx9/rbtx4927/Makefile3
-rw-r--r--arch/mips/txx9/rbtx4927/irq.c199
-rw-r--r--arch/mips/txx9/rbtx4927/prom.c (renamed from arch/mips/tx4927/common/tx4927_dbgio.c)29
-rw-r--r--arch/mips/txx9/rbtx4927/setup.c443
-rw-r--r--arch/mips/txx9/rbtx4938/Makefile (renamed from arch/mips/tx4938/toshiba_rbtx4938/Makefile)4
-rw-r--r--arch/mips/txx9/rbtx4938/irq.c (renamed from arch/mips/tx4938/toshiba_rbtx4938/irq.c)52
-rw-r--r--arch/mips/txx9/rbtx4938/prom.c29
-rw-r--r--arch/mips/txx9/rbtx4938/setup.c625
-rw-r--r--arch/mips/txx9/rbtx4938/spi_eeprom.c (renamed from arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c)4
-rw-r--r--arch/mips/vr41xx/Kconfig17
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/Makefile8
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/init.c65
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/irq.c46
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c249
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/setup.c89
-rw-r--r--arch/parisc/Kconfig1
-rw-r--r--arch/parisc/kernel/cache.c6
-rw-r--r--arch/parisc/kernel/smp.c136
-rw-r--r--arch/parisc/mm/init.c2
-rw-r--r--arch/powerpc/Kconfig1
-rw-r--r--arch/powerpc/kernel/machine_kexec_64.c2
-rw-r--r--arch/powerpc/kernel/rtas.c2
-rw-r--r--arch/powerpc/kernel/smp.c234
-rw-r--r--arch/powerpc/kernel/tau_6xx.c4
-rw-r--r--arch/powerpc/kernel/time.c2
-rw-r--r--arch/powerpc/mm/slice.c2
-rw-r--r--arch/powerpc/mm/tlb_64.c2
-rw-r--r--arch/powerpc/oprofile/common.c6
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c1
-rw-r--r--arch/powerpc/platforms/ps3/smp.c7
-rw-r--r--arch/powerpc/platforms/pseries/xics.c6
-rw-r--r--arch/powerpc/sysdev/mpic.c2
-rw-r--r--arch/ppc/kernel/smp.c2
-rw-r--r--arch/s390/appldata/appldata_base.c4
-rw-r--r--arch/s390/kernel/smp.c22
-rw-r--r--arch/s390/kernel/time.c10
-rw-r--r--arch/sh/Kconfig1
-rw-r--r--arch/sh/kernel/smp.c62
-rw-r--r--arch/sparc64/kernel/smp.c13
-rw-r--r--arch/sparc64/mm/hugetlbpage.c2
-rw-r--r--arch/um/kernel/smp.c3
-rw-r--r--arch/x86/Kconfig1
-rw-r--r--arch/x86/kernel/apic_32.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c6
-rw-r--r--arch/x86/kernel/cpu/mcheck/non-fatal.c2
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c4
-rw-r--r--arch/x86/kernel/cpu/perfctr-watchdog.c4
-rw-r--r--arch/x86/kernel/cpuid.c2
-rw-r--r--arch/x86/kernel/entry_64.S3
-rw-r--r--arch/x86/kernel/io_apic_32.c2
-rw-r--r--arch/x86/kernel/io_apic_64.c2
-rw-r--r--arch/x86/kernel/irqinit_64.c4
-rw-r--r--arch/x86/kernel/ldt.c2
-rw-r--r--arch/x86/kernel/nmi.c6
-rw-r--r--arch/x86/kernel/process.c2
-rw-r--r--arch/x86/kernel/smp.c158
-rw-r--r--arch/x86/kernel/smpboot.c4
-rw-r--r--arch/x86/kernel/smpcommon.c56
-rw-r--r--arch/x86/kernel/tlb_32.c2
-rw-r--r--arch/x86/kernel/tlb_64.c2
-rw-r--r--arch/x86/kernel/vsyscall_64.c4
-rw-r--r--arch/x86/kvm/vmx.c4
-rw-r--r--arch/x86/kvm/x86.c2
-rw-r--r--arch/x86/lib/msr-on-cpu.c8
-rw-r--r--arch/x86/mach-voyager/voyager_smp.c98
-rw-r--r--arch/x86/mm/pageattr.c4
-rw-r--r--arch/x86/oprofile/nmi_int.c10
-rw-r--r--arch/x86/pci/amd_bus.c2
-rw-r--r--arch/x86/xen/enlighten.c4
-rw-r--r--arch/x86/xen/mmu.c2
-rw-r--r--arch/x86/xen/smp.c135
-rw-r--r--arch/x86/xen/xen-ops.h9
-rw-r--r--crypto/async_tx/async_tx.c1
-rw-r--r--drivers/acpi/processor_idle.c2
-rw-r--r--drivers/char/agp/generic.c2
-rw-r--r--drivers/char/sysrq.c2
-rw-r--r--drivers/cpuidle/cpuidle.c2
-rw-r--r--drivers/firewire/fw-card.c32
-rw-r--r--drivers/firewire/fw-device.c5
-rw-r--r--drivers/firewire/fw-device.h1
-rw-r--r--drivers/firewire/fw-ohci.c1
-rw-r--r--drivers/firewire/fw-sbp2.c25
-rw-r--r--drivers/firewire/fw-transaction.c32
-rw-r--r--drivers/firewire/fw-transaction.h34
-rw-r--r--drivers/ieee1394/csr1212.c32
-rw-r--r--drivers/ieee1394/dma.c2
-rw-r--r--drivers/ieee1394/highlevel.c4
-rw-r--r--drivers/ieee1394/highlevel.h13
-rw-r--r--drivers/ieee1394/raw1394.c20
-rw-r--r--drivers/ieee1394/sbp2.c22
-rw-r--r--drivers/ieee1394/sbp2.h1
-rw-r--r--drivers/ieee1394/video1394.c2
-rw-r--r--drivers/infiniband/hw/ipath/ipath_verbs.c1
-rw-r--r--drivers/infiniband/hw/ipath/ipath_verbs_mcast.c3
-rw-r--r--drivers/lguest/x86/core.c4
-rw-r--r--drivers/mtd/maps/Kconfig7
-rw-r--r--drivers/mtd/maps/Makefile1
-rw-r--r--drivers/mtd/maps/mtx-1_flash.c95
-rw-r--r--drivers/net/macvlan.c2
-rw-r--r--drivers/scsi/a100u2w.c49
-rw-r--r--drivers/scsi/sd.c5
-rw-r--r--drivers/watchdog/booke_wdt.c6
-rw-r--r--fs/buffer.c2
-rw-r--r--include/asm-alpha/smp.h5
-rw-r--r--include/asm-arm/smp.h3
-rw-r--r--include/asm-generic/pgtable.h2
-rw-r--r--include/asm-ia64/smp.h8
-rw-r--r--include/asm-m32r/smp.h4
-rw-r--r--include/asm-mips/barrier.h14
-rw-r--r--include/asm-mips/bitops.h6
-rw-r--r--include/asm-mips/bootinfo.h43
-rw-r--r--include/asm-mips/cpu.h4
-rw-r--r--include/asm-mips/dec/kn05.h9
-rw-r--r--include/asm-mips/inventory.h24
-rw-r--r--include/asm-mips/io.h17
-rw-r--r--include/asm-mips/lasat/lasat.h2
-rw-r--r--include/asm-mips/mach-atlas/mc146818rtc.h60
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h45
-rw-r--r--include/asm-mips/mach-malta/cpu-feature-overrides.h (renamed from include/asm-mips/mach-mips/cpu-feature-overrides.h)0
-rw-r--r--include/asm-mips/mach-malta/irq.h (renamed from include/asm-mips/mach-mips/irq.h)0
-rw-r--r--include/asm-mips/mach-malta/kernel-entry-init.h (renamed from include/asm-mips/mach-mips/kernel-entry-init.h)0
-rw-r--r--include/asm-mips/mach-malta/mach-gt64120.h (renamed from include/asm-mips/mach-mips/mach-gt64120.h)0
-rw-r--r--include/asm-mips/mach-malta/mc146818rtc.h (renamed from include/asm-mips/mach-mips/mc146818rtc.h)0
-rw-r--r--include/asm-mips/mach-malta/war.h (renamed from include/asm-mips/mach-mips/war.h)0
-rw-r--r--include/asm-mips/mach-tx39xx/ioremap.h (renamed from include/asm-mips/mach-jmr3927/ioremap.h)8
-rw-r--r--include/asm-mips/mach-tx39xx/mangle-port.h (renamed from include/asm-mips/mach-jmr3927/mangle-port.h)13
-rw-r--r--include/asm-mips/mach-tx39xx/war.h (renamed from include/asm-mips/mach-jmr3927/war.h)6
-rw-r--r--include/asm-mips/mach-vr41xx/irq.h3
-rw-r--r--include/asm-mips/mips-boards/generic.h9
-rw-r--r--include/asm-mips/namei.h25
-rw-r--r--include/asm-mips/pci.h3
-rw-r--r--include/asm-mips/prctl.h41
-rw-r--r--include/asm-mips/setup.h2
-rw-r--r--include/asm-mips/signal.h3
-rw-r--r--include/asm-mips/smp.h13
-rw-r--r--include/asm-mips/traps.h1
-rw-r--r--include/asm-mips/tx4927/tx4927.h46
-rw-r--r--include/asm-mips/tx4927/tx4927_pci.h268
-rw-r--r--include/asm-mips/txx9/generic.h41
-rw-r--r--include/asm-mips/txx9/jmr3927.h (renamed from include/asm-mips/jmr3927/jmr3927.h)13
-rw-r--r--include/asm-mips/txx9/pci.h36
-rw-r--r--include/asm-mips/txx9/rbtx4927.h (renamed from include/asm-mips/tx4927/toshiba_rbtx4927.h)52
-rw-r--r--include/asm-mips/txx9/rbtx4938.h (renamed from include/asm-mips/tx4938/rbtx4938.h)45
-rw-r--r--include/asm-mips/txx9/smsc_fdc37m81x.h (renamed from include/asm-mips/tx4927/smsc_fdc37m81x.h)2
-rw-r--r--include/asm-mips/txx9/spi.h (renamed from include/asm-mips/tx4938/spi.h)7
-rw-r--r--include/asm-mips/txx9/tx3927.h (renamed from include/asm-mips/jmr3927/tx3927.h)12
-rw-r--r--include/asm-mips/txx9/tx4927.h219
-rw-r--r--include/asm-mips/txx9/tx4927pcic.h199
-rw-r--r--include/asm-mips/txx9/tx4938.h (renamed from include/asm-mips/tx4938/tx4938.h)239
-rw-r--r--include/asm-mips/txx9/txx927.h (renamed from include/asm-mips/jmr3927/txx927.h)6
-rw-r--r--include/asm-mips/vr41xx/cmbvr4133.h56
-rw-r--r--include/asm-parisc/smp.h3
-rw-r--r--include/asm-powerpc/smp.h8
-rw-r--r--include/asm-sh/smp.h14
-rw-r--r--include/asm-sparc/smp.h2
-rw-r--r--include/asm-x86/hw_irq.h1
-rw-r--r--include/asm-x86/irq_vectors.h6
-rw-r--r--include/asm-x86/mach-default/entry_arch.h1
-rw-r--r--include/asm-x86/mach-visws/entry_arch.h22
-rw-r--r--include/asm-x86/mach-voyager/entry_arch.h2
-rw-r--r--include/asm-x86/smp.h21
-rw-r--r--include/asm-x86/xen/events.h1
-rw-r--r--include/linux/dcache.h1
-rw-r--r--include/linux/list.h367
-rw-r--r--include/linux/rcuclassic.h3
-rw-r--r--include/linux/rculist.h369
-rw-r--r--include/linux/rcupdate.h26
-rw-r--r--include/linux/rcupreempt.h42
-rw-r--r--include/linux/smp.h46
-rw-r--r--include/scsi/scsi_device.h1
-rw-r--r--init/main.c3
-rw-r--r--kernel/Makefile1
-rw-r--r--kernel/hrtimer.c2
-rw-r--r--kernel/pid.c1
-rw-r--r--kernel/profile.c6
-rw-r--r--kernel/rcuclassic.c34
-rw-r--r--kernel/rcupdate.c71
-rw-r--r--kernel/rcupreempt.c418
-rw-r--r--kernel/rcupreempt_trace.c1
-rw-r--r--kernel/rcutorture.c174
-rw-r--r--kernel/smp.c383
-rw-r--r--kernel/softirq.c4
-rw-r--r--kernel/sysctl.c13
-rw-r--r--kernel/time/tick-broadcast.c2
-rw-r--r--lib/Kconfig.debug20
-rw-r--r--lib/textsearch.c1
-rw-r--r--mm/page_alloc.c2
-rw-r--r--mm/slab.c4
-rw-r--r--mm/slub.c2
-rw-r--r--net/802/psnap.c1
-rw-r--r--net/8021q/vlan.c1
-rw-r--r--net/bridge/br_fdb.c1
-rw-r--r--net/bridge/br_stp.c1
-rw-r--r--net/core/flow.c2
-rw-r--r--net/iucv/iucv.c16
-rw-r--r--net/netfilter/nf_conntrack_helper.c1
-rw-r--r--net/netfilter/nf_conntrack_netlink.c1
-rw-r--r--net/netlabel/netlabel_domainhash.c3
-rw-r--r--virt/kvm/kvm_main.c14
398 files changed, 6758 insertions, 18039 deletions
diff --git a/Documentation/RCU/NMI-RCU.txt b/Documentation/RCU/NMI-RCU.txt
index c64158ecde43..a6d32e65d222 100644
--- a/Documentation/RCU/NMI-RCU.txt
+++ b/Documentation/RCU/NMI-RCU.txt
@@ -93,6 +93,9 @@ Since NMI handlers disable preemption, synchronize_sched() is guaranteed
93not to return until all ongoing NMI handlers exit. It is therefore safe 93not to return until all ongoing NMI handlers exit. It is therefore safe
94to free up the handler's data as soon as synchronize_sched() returns. 94to free up the handler's data as soon as synchronize_sched() returns.
95 95
96Important note: for this to work, the architecture in question must
97invoke irq_enter() and irq_exit() on NMI entry and exit, respectively.
98
96 99
97Answer to Quick Quiz 100Answer to Quick Quiz
98 101
diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt
index 39ad8f56783a..9f711d2df91b 100644
--- a/Documentation/RCU/RTFP.txt
+++ b/Documentation/RCU/RTFP.txt
@@ -52,6 +52,10 @@ of each iteration. Unfortunately, chaotic relaxation requires highly
52structured data, such as the matrices used in scientific programs, and 52structured data, such as the matrices used in scientific programs, and
53is thus inapplicable to most data structures in operating-system kernels. 53is thus inapplicable to most data structures in operating-system kernels.
54 54
55In 1992, Henry (now Alexia) Massalin completed a dissertation advising
56parallel programmers to defer processing when feasible to simplify
57synchronization. RCU makes extremely heavy use of this advice.
58
55In 1993, Jacobson [Jacobson93] verbally described what is perhaps the 59In 1993, Jacobson [Jacobson93] verbally described what is perhaps the
56simplest deferred-free technique: simply waiting a fixed amount of time 60simplest deferred-free technique: simply waiting a fixed amount of time
57before freeing blocks awaiting deferred free. Jacobson did not describe 61before freeing blocks awaiting deferred free. Jacobson did not describe
@@ -138,6 +142,13 @@ blocking in read-side critical sections appeared [PaulEMcKenney2006c],
138Robert Olsson described an RCU-protected trie-hash combination 142Robert Olsson described an RCU-protected trie-hash combination
139[RobertOlsson2006a]. 143[RobertOlsson2006a].
140 144
1452007 saw the journal version of the award-winning RCU paper from 2006
146[ThomasEHart2007a], as well as a paper demonstrating use of Promela
147and Spin to mechanically verify an optimization to Oleg Nesterov's
148QRCU [PaulEMcKenney2007QRCUspin], a design document describing
149preemptible RCU [PaulEMcKenney2007PreemptibleRCU], and the three-part
150LWN "What is RCU?" series [PaulEMcKenney2007WhatIsRCUFundamentally,
151PaulEMcKenney2008WhatIsRCUUsage, and PaulEMcKenney2008WhatIsRCUAPI].
141 152
142Bibtex Entries 153Bibtex Entries
143 154
@@ -202,6 +213,20 @@ Bibtex Entries
202,Year="1991" 213,Year="1991"
203} 214}
204 215
216@phdthesis{HMassalinPhD
217,author="H. Massalin"
218,title="Synthesis: An Efficient Implementation of Fundamental Operating
219System Services"
220,school="Columbia University"
221,address="New York, NY"
222,year="1992"
223,annotation="
224 Mondo optimizing compiler.
225 Wait-free stuff.
226 Good advice: defer work to avoid synchronization.
227"
228}
229
205@unpublished{Jacobson93 230@unpublished{Jacobson93
206,author="Van Jacobson" 231,author="Van Jacobson"
207,title="Avoid Read-Side Locking Via Delayed Free" 232,title="Avoid Read-Side Locking Via Delayed Free"
@@ -635,3 +660,86 @@ Revised:
635" 660"
636} 661}
637 662
663@unpublished{PaulEMcKenney2007PreemptibleRCU
664,Author="Paul E. McKenney"
665,Title="The design of preemptible read-copy-update"
666,month="October"
667,day="8"
668,year="2007"
669,note="Available:
670\url{http://lwn.net/Articles/253651/}
671[Viewed October 25, 2007]"
672,annotation="
673 LWN article describing the design of preemptible RCU.
674"
675}
676
677########################################################################
678#
679# "What is RCU?" LWN series.
680#
681
682@unpublished{PaulEMcKenney2007WhatIsRCUFundamentally
683,Author="Paul E. McKenney and Jonathan Walpole"
684,Title="What is {RCU}, Fundamentally?"
685,month="December"
686,day="17"
687,year="2007"
688,note="Available:
689\url{http://lwn.net/Articles/262464/}
690[Viewed December 27, 2007]"
691,annotation="
692 Lays out the three basic components of RCU: (1) publish-subscribe,
693 (2) wait for pre-existing readers to complete, and (2) maintain
694 multiple versions.
695"
696}
697
698@unpublished{PaulEMcKenney2008WhatIsRCUUsage
699,Author="Paul E. McKenney"
700,Title="What is {RCU}? Part 2: Usage"
701,month="January"
702,day="4"
703,year="2008"
704,note="Available:
705\url{http://lwn.net/Articles/263130/}
706[Viewed January 4, 2008]"
707,annotation="
708 Lays out six uses of RCU:
709 1. RCU is a Reader-Writer Lock Replacement
710 2. RCU is a Restricted Reference-Counting Mechanism
711 3. RCU is a Bulk Reference-Counting Mechanism
712 4. RCU is a Poor Man's Garbage Collector
713 5. RCU is a Way of Providing Existence Guarantees
714 6. RCU is a Way of Waiting for Things to Finish
715"
716}
717
718@unpublished{PaulEMcKenney2008WhatIsRCUAPI
719,Author="Paul E. McKenney"
720,Title="{RCU} part 3: the {RCU} {API}"
721,month="January"
722,day="17"
723,year="2008"
724,note="Available:
725\url{http://lwn.net/Articles/264090/}
726[Viewed January 10, 2008]"
727,annotation="
728 Gives an overview of the Linux-kernel RCU API and a brief annotated RCU
729 bibliography.
730"
731}
732
733@article{DinakarGuniguntala2008IBMSysJ
734,author="D. Guniguntala and P. E. McKenney and J. Triplett and J. Walpole"
735,title="The read-copy-update mechanism for supporting real-time applications on shared-memory multiprocessor systems with {Linux}"
736,Year="2008"
737,Month="April"
738,journal="IBM Systems Journal"
739,volume="47"
740,number="2"
741,pages="@@-@@"
742,annotation="
743 RCU, realtime RCU, sleepable RCU, performance.
744"
745}
diff --git a/Documentation/RCU/checklist.txt b/Documentation/RCU/checklist.txt
index 42b01bc2e1b4..cf5562cbe356 100644
--- a/Documentation/RCU/checklist.txt
+++ b/Documentation/RCU/checklist.txt
@@ -13,10 +13,13 @@ over a rather long period of time, but improvements are always welcome!
13 detailed performance measurements show that RCU is nonetheless 13 detailed performance measurements show that RCU is nonetheless
14 the right tool for the job. 14 the right tool for the job.
15 15
16 The other exception would be where performance is not an issue, 16 Another exception is where performance is not an issue, and RCU
17 and RCU provides a simpler implementation. An example of this 17 provides a simpler implementation. An example of this situation
18 situation is the dynamic NMI code in the Linux 2.6 kernel, 18 is the dynamic NMI code in the Linux 2.6 kernel, at least on
19 at least on architectures where NMIs are rare. 19 architectures where NMIs are rare.
20
21 Yet another exception is where the low real-time latency of RCU's
22 read-side primitives is critically important.
20 23
211. Does the update code have proper mutual exclusion? 241. Does the update code have proper mutual exclusion?
22 25
@@ -39,9 +42,10 @@ over a rather long period of time, but improvements are always welcome!
39 42
402. Do the RCU read-side critical sections make proper use of 432. Do the RCU read-side critical sections make proper use of
41 rcu_read_lock() and friends? These primitives are needed 44 rcu_read_lock() and friends? These primitives are needed
42 to suppress preemption (or bottom halves, in the case of 45 to prevent grace periods from ending prematurely, which
43 rcu_read_lock_bh()) in the read-side critical sections, 46 could result in data being unceremoniously freed out from
44 and are also an excellent aid to readability. 47 under your read-side code, which can greatly increase the
48 actuarial risk of your kernel.
45 49
46 As a rough rule of thumb, any dereference of an RCU-protected 50 As a rough rule of thumb, any dereference of an RCU-protected
47 pointer must be covered by rcu_read_lock() or rcu_read_lock_bh() 51 pointer must be covered by rcu_read_lock() or rcu_read_lock_bh()
@@ -54,15 +58,30 @@ over a rather long period of time, but improvements are always welcome!
54 be running while updates are in progress. There are a number 58 be running while updates are in progress. There are a number
55 of ways to handle this concurrency, depending on the situation: 59 of ways to handle this concurrency, depending on the situation:
56 60
57 a. Make updates appear atomic to readers. For example, 61 a. Use the RCU variants of the list and hlist update
62 primitives to add, remove, and replace elements on an
63 RCU-protected list. Alternatively, use the RCU-protected
64 trees that have been added to the Linux kernel.
65
66 This is almost always the best approach.
67
68 b. Proceed as in (a) above, but also maintain per-element
69 locks (that are acquired by both readers and writers)
70 that guard per-element state. Of course, fields that
71 the readers refrain from accessing can be guarded by the
72 update-side lock.
73
74 This works quite well, also.
75
76 c. Make updates appear atomic to readers. For example,
58 pointer updates to properly aligned fields will appear 77 pointer updates to properly aligned fields will appear
59 atomic, as will individual atomic primitives. Operations 78 atomic, as will individual atomic primitives. Operations
60 performed under a lock and sequences of multiple atomic 79 performed under a lock and sequences of multiple atomic
61 primitives will -not- appear to be atomic. 80 primitives will -not- appear to be atomic.
62 81
63 This is almost always the best approach. 82 This can work, but is starting to get a bit tricky.
64 83
65 b. Carefully order the updates and the reads so that 84 d. Carefully order the updates and the reads so that
66 readers see valid data at all phases of the update. 85 readers see valid data at all phases of the update.
67 This is often more difficult than it sounds, especially 86 This is often more difficult than it sounds, especially
68 given modern CPUs' tendency to reorder memory references. 87 given modern CPUs' tendency to reorder memory references.
@@ -123,18 +142,22 @@ over a rather long period of time, but improvements are always welcome!
123 when publicizing a pointer to a structure that can 142 when publicizing a pointer to a structure that can
124 be traversed by an RCU read-side critical section. 143 be traversed by an RCU read-side critical section.
125 144
1265. If call_rcu(), or a related primitive such as call_rcu_bh(), 1455. If call_rcu(), or a related primitive such as call_rcu_bh() or
127 is used, the callback function must be written to be called 146 call_rcu_sched(), is used, the callback function must be
128 from softirq context. In particular, it cannot block. 147 written to be called from softirq context. In particular,
148 it cannot block.
129 149
1306. Since synchronize_rcu() can block, it cannot be called from 1506. Since synchronize_rcu() can block, it cannot be called from
131 any sort of irq context. 151 any sort of irq context. Ditto for synchronize_sched() and
152 synchronize_srcu().
132 153
1337. If the updater uses call_rcu(), then the corresponding readers 1547. If the updater uses call_rcu(), then the corresponding readers
134 must use rcu_read_lock() and rcu_read_unlock(). If the updater 155 must use rcu_read_lock() and rcu_read_unlock(). If the updater
135 uses call_rcu_bh(), then the corresponding readers must use 156 uses call_rcu_bh(), then the corresponding readers must use
136 rcu_read_lock_bh() and rcu_read_unlock_bh(). Mixing things up 157 rcu_read_lock_bh() and rcu_read_unlock_bh(). If the updater
137 will result in confusion and broken kernels. 158 uses call_rcu_sched(), then the corresponding readers must
159 disable preemption. Mixing things up will result in confusion
160 and broken kernels.
138 161
139 One exception to this rule: rcu_read_lock() and rcu_read_unlock() 162 One exception to this rule: rcu_read_lock() and rcu_read_unlock()
140 may be substituted for rcu_read_lock_bh() and rcu_read_unlock_bh() 163 may be substituted for rcu_read_lock_bh() and rcu_read_unlock_bh()
@@ -143,9 +166,9 @@ over a rather long period of time, but improvements are always welcome!
143 such cases is a must, of course! And the jury is still out on 166 such cases is a must, of course! And the jury is still out on
144 whether the increased speed is worth it. 167 whether the increased speed is worth it.
145 168
1468. Although synchronize_rcu() is a bit slower than is call_rcu(), 1698. Although synchronize_rcu() is slower than is call_rcu(), it
147 it usually results in simpler code. So, unless update 170 usually results in simpler code. So, unless update performance
148 performance is critically important or the updaters cannot block, 171 is critically important or the updaters cannot block,
149 synchronize_rcu() should be used in preference to call_rcu(). 172 synchronize_rcu() should be used in preference to call_rcu().
150 173
151 An especially important property of the synchronize_rcu() 174 An especially important property of the synchronize_rcu()
@@ -187,23 +210,23 @@ over a rather long period of time, but improvements are always welcome!
187 number of updates per grace period. 210 number of updates per grace period.
188 211
1899. All RCU list-traversal primitives, which include 2129. All RCU list-traversal primitives, which include
190 list_for_each_rcu(), list_for_each_entry_rcu(), 213 rcu_dereference(), list_for_each_rcu(), list_for_each_entry_rcu(),
191 list_for_each_continue_rcu(), and list_for_each_safe_rcu(), 214 list_for_each_continue_rcu(), and list_for_each_safe_rcu(),
192 must be within an RCU read-side critical section. RCU 215 must be either within an RCU read-side critical section or
216 must be protected by appropriate update-side locks. RCU
193 read-side critical sections are delimited by rcu_read_lock() 217 read-side critical sections are delimited by rcu_read_lock()
194 and rcu_read_unlock(), or by similar primitives such as 218 and rcu_read_unlock(), or by similar primitives such as
195 rcu_read_lock_bh() and rcu_read_unlock_bh(). 219 rcu_read_lock_bh() and rcu_read_unlock_bh().
196 220
197 Use of the _rcu() list-traversal primitives outside of an 221 The reason that it is permissible to use RCU list-traversal
198 RCU read-side critical section causes no harm other than 222 primitives when the update-side lock is held is that doing so
199 a slight performance degradation on Alpha CPUs. It can 223 can be quite helpful in reducing code bloat when common code is
200 also be quite helpful in reducing code bloat when common 224 shared between readers and updaters.
201 code is shared between readers and updaters.
202 225
20310. Conversely, if you are in an RCU read-side critical section, 22610. Conversely, if you are in an RCU read-side critical section,
204 you -must- use the "_rcu()" variants of the list macros. 227 and you don't hold the appropriate update-side lock, you -must-
205 Failing to do so will break Alpha and confuse people reading 228 use the "_rcu()" variants of the list macros. Failing to do so
206 your code. 229 will break Alpha and confuse people reading your code.
207 230
20811. Note that synchronize_rcu() -only- guarantees to wait until 23111. Note that synchronize_rcu() -only- guarantees to wait until
209 all currently executing rcu_read_lock()-protected RCU read-side 232 all currently executing rcu_read_lock()-protected RCU read-side
@@ -230,6 +253,14 @@ over a rather long period of time, but improvements are always welcome!
230 must use whatever locking or other synchronization is required 253 must use whatever locking or other synchronization is required
231 to safely access and/or modify that data structure. 254 to safely access and/or modify that data structure.
232 255
256 RCU callbacks are -usually- executed on the same CPU that executed
257 the corresponding call_rcu(), call_rcu_bh(), or call_rcu_sched(),
258 but are by -no- means guaranteed to be. For example, if a given
259 CPU goes offline while having an RCU callback pending, then that
260 RCU callback will execute on some surviving CPU. (If this was
261 not the case, a self-spawning RCU callback would prevent the
262 victim CPU from ever going offline.)
263
23314. SRCU (srcu_read_lock(), srcu_read_unlock(), and synchronize_srcu()) 26414. SRCU (srcu_read_lock(), srcu_read_unlock(), and synchronize_srcu())
234 may only be invoked from process context. Unlike other forms of 265 may only be invoked from process context. Unlike other forms of
235 RCU, it -is- permissible to block in an SRCU read-side critical 266 RCU, it -is- permissible to block in an SRCU read-side critical
diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt
index 2967a65269d8..a342b6e1cc10 100644
--- a/Documentation/RCU/torture.txt
+++ b/Documentation/RCU/torture.txt
@@ -10,23 +10,30 @@ status messages via printk(), which can be examined via the dmesg
10command (perhaps grepping for "torture"). The test is started 10command (perhaps grepping for "torture"). The test is started
11when the module is loaded, and stops when the module is unloaded. 11when the module is loaded, and stops when the module is unloaded.
12 12
13However, actually setting this config option to "y" results in the system 13CONFIG_RCU_TORTURE_TEST_RUNNABLE
14running the test immediately upon boot, and ending only when the system 14
15is taken down. Normally, one will instead want to build the system 15It is also possible to specify CONFIG_RCU_TORTURE_TEST=y, which will
16with CONFIG_RCU_TORTURE_TEST=m and to use modprobe and rmmod to control 16result in the tests being loaded into the base kernel. In this case,
17the test, perhaps using a script similar to the one shown at the end of 17the CONFIG_RCU_TORTURE_TEST_RUNNABLE config option is used to specify
18this document. Note that you will need CONFIG_MODULE_UNLOAD in order 18whether the RCU torture tests are to be started immediately during
19to be able to end the test. 19boot or whether the /proc/sys/kernel/rcutorture_runnable file is used
20to enable them. This /proc file can be used to repeatedly pause and
21restart the tests, regardless of the initial state specified by the
22CONFIG_RCU_TORTURE_TEST_RUNNABLE config option.
23
24You will normally -not- want to start the RCU torture tests during boot
25(and thus the default is CONFIG_RCU_TORTURE_TEST_RUNNABLE=n), but doing
26this can sometimes be useful in finding boot-time bugs.
20 27
21 28
22MODULE PARAMETERS 29MODULE PARAMETERS
23 30
24This module has the following parameters: 31This module has the following parameters:
25 32
26nreaders This is the number of RCU reading threads supported. 33irqreaders Says to invoke RCU readers from irq level. This is currently
27 The default is twice the number of CPUs. Why twice? 34 done via timers. Defaults to "1" for variants of RCU that
28 To properly exercise RCU implementations with preemptible 35 permit this. (Or, more accurately, variants of RCU that do
29 read-side critical sections. 36 -not- permit this know to ignore this variable.)
30 37
31nfakewriters This is the number of RCU fake writer threads to run. Fake 38nfakewriters This is the number of RCU fake writer threads to run. Fake
32 writer threads repeatedly use the synchronous "wait for 39 writer threads repeatedly use the synchronous "wait for
@@ -37,6 +44,16 @@ nfakewriters This is the number of RCU fake writer threads to run. Fake
37 to trigger special cases caused by multiple writers, such as 44 to trigger special cases caused by multiple writers, such as
38 the synchronize_srcu() early return optimization. 45 the synchronize_srcu() early return optimization.
39 46
47nreaders This is the number of RCU reading threads supported.
48 The default is twice the number of CPUs. Why twice?
49 To properly exercise RCU implementations with preemptible
50 read-side critical sections.
51
52shuffle_interval
53 The number of seconds to keep the test threads affinitied
54 to a particular subset of the CPUs, defaults to 3 seconds.
55 Used in conjunction with test_no_idle_hz.
56
40stat_interval The number of seconds between output of torture 57stat_interval The number of seconds between output of torture
41 statistics (via printk()). Regardless of the interval, 58 statistics (via printk()). Regardless of the interval,
42 statistics are printed when the module is unloaded. 59 statistics are printed when the module is unloaded.
@@ -44,10 +61,11 @@ stat_interval The number of seconds between output of torture
44 be printed -only- when the module is unloaded, and this 61 be printed -only- when the module is unloaded, and this
45 is the default. 62 is the default.
46 63
47shuffle_interval 64stutter The length of time to run the test before pausing for this
48 The number of seconds to keep the test threads affinitied 65 same period of time. Defaults to "stutter=5", so as
49 to a particular subset of the CPUs, defaults to 5 seconds. 66 to run and pause for (roughly) five-second intervals.
50 Used in conjunction with test_no_idle_hz. 67 Specifying "stutter=0" causes the test to run continuously
68 without pausing, which is the old default behavior.
51 69
52test_no_idle_hz Whether or not to test the ability of RCU to operate in 70test_no_idle_hz Whether or not to test the ability of RCU to operate in
53 a kernel that disables the scheduling-clock interrupt to 71 a kernel that disables the scheduling-clock interrupt to
diff --git a/Documentation/RCU/whatisRCU.txt b/Documentation/RCU/whatisRCU.txt
index e0d6d99b8f9b..e04d643a9f57 100644
--- a/Documentation/RCU/whatisRCU.txt
+++ b/Documentation/RCU/whatisRCU.txt
@@ -1,3 +1,11 @@
1Please note that the "What is RCU?" LWN series is an excellent place
2to start learning about RCU:
3
41. What is RCU, Fundamentally? http://lwn.net/Articles/262464/
52. What is RCU? Part 2: Usage http://lwn.net/Articles/263130/
63. RCU part 3: the RCU API http://lwn.net/Articles/264090/
7
8
1What is RCU? 9What is RCU?
2 10
3RCU is a synchronization mechanism that was added to the Linux kernel 11RCU is a synchronization mechanism that was added to the Linux kernel
@@ -772,26 +780,18 @@ Linux-kernel source code, but it helps to have a full list of the
772APIs, since there does not appear to be a way to categorize them 780APIs, since there does not appear to be a way to categorize them
773in docbook. Here is the list, by category. 781in docbook. Here is the list, by category.
774 782
775Markers for RCU read-side critical sections:
776
777 rcu_read_lock
778 rcu_read_unlock
779 rcu_read_lock_bh
780 rcu_read_unlock_bh
781 srcu_read_lock
782 srcu_read_unlock
783
784RCU pointer/list traversal: 783RCU pointer/list traversal:
785 784
786 rcu_dereference 785 rcu_dereference
786 list_for_each_entry_rcu
787 hlist_for_each_entry_rcu
788
787 list_for_each_rcu (to be deprecated in favor of 789 list_for_each_rcu (to be deprecated in favor of
788 list_for_each_entry_rcu) 790 list_for_each_entry_rcu)
789 list_for_each_entry_rcu
790 list_for_each_continue_rcu (to be deprecated in favor of new 791 list_for_each_continue_rcu (to be deprecated in favor of new
791 list_for_each_entry_continue_rcu) 792 list_for_each_entry_continue_rcu)
792 hlist_for_each_entry_rcu
793 793
794RCU pointer update: 794RCU pointer/list update:
795 795
796 rcu_assign_pointer 796 rcu_assign_pointer
797 list_add_rcu 797 list_add_rcu
@@ -799,16 +799,36 @@ RCU pointer update:
799 list_del_rcu 799 list_del_rcu
800 list_replace_rcu 800 list_replace_rcu
801 hlist_del_rcu 801 hlist_del_rcu
802 hlist_add_after_rcu
803 hlist_add_before_rcu
802 hlist_add_head_rcu 804 hlist_add_head_rcu
805 hlist_replace_rcu
806 list_splice_init_rcu()
803 807
804RCU grace period: 808RCU: Critical sections Grace period Barrier
809
810 rcu_read_lock synchronize_net rcu_barrier
811 rcu_read_unlock synchronize_rcu
812 call_rcu
813
814
815bh: Critical sections Grace period Barrier
816
817 rcu_read_lock_bh call_rcu_bh rcu_barrier_bh
818 rcu_read_unlock_bh
819
820
821sched: Critical sections Grace period Barrier
822
823 [preempt_disable] synchronize_sched rcu_barrier_sched
824 [and friends] call_rcu_sched
825
826
827SRCU: Critical sections Grace period Barrier
828
829 srcu_read_lock synchronize_srcu N/A
830 srcu_read_unlock
805 831
806 synchronize_net
807 synchronize_sched
808 synchronize_rcu
809 synchronize_srcu
810 call_rcu
811 call_rcu_bh
812 832
813See the comment headers in the source code (or the docbook generated 833See the comment headers in the source code (or the docbook generated
814from them) for more information. 834from them) for more information.
diff --git a/MAINTAINERS b/MAINTAINERS
index 6198fa3deb99..fc6c005c531a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1777,6 +1777,11 @@ M: hch@infradead.org
1777W: ftp://ftp.openlinux.org/pub/people/hch/vxfs 1777W: ftp://ftp.openlinux.org/pub/people/hch/vxfs
1778S: Maintained 1778S: Maintained
1779 1779
1780FTRACE
1781P: Steven Rostedt
1782M: srostedt@redhat.com
1783S: Maintained
1784
1780FUJITSU FR-V (FRV) PORT 1785FUJITSU FR-V (FRV) PORT
1781P: David Howells 1786P: David Howells
1782M: dhowells@redhat.com 1787M: dhowells@redhat.com
diff --git a/arch/Kconfig b/arch/Kconfig
index 3ea332b009e5..ad89a33d8c6e 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -39,3 +39,6 @@ config HAVE_KRETPROBES
39 39
40config HAVE_DMA_ATTRS 40config HAVE_DMA_ATTRS
41 def_bool n 41 def_bool n
42
43config USE_GENERIC_SMP_HELPERS
44 def_bool n
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 729cdbdf8036..dbe8c280fea9 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -528,6 +528,7 @@ config ARCH_MAY_HAVE_PC_FDC
528config SMP 528config SMP
529 bool "Symmetric multi-processing support" 529 bool "Symmetric multi-processing support"
530 depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL 530 depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL
531 select USE_GENERIC_SMP_HELPERS
531 ---help--- 532 ---help---
532 This enables support for systems with more than one CPU. If you have 533 This enables support for systems with more than one CPU. If you have
533 a system with only one CPU, like most personal computers, say N. If 534 a system with only one CPU, like most personal computers, say N. If
diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c
index b04f1feb1dda..04dcc5e5d4c1 100644
--- a/arch/alpha/kernel/core_marvel.c
+++ b/arch/alpha/kernel/core_marvel.c
@@ -660,9 +660,9 @@ __marvel_rtc_io(u8 b, unsigned long addr, int write)
660 660
661#ifdef CONFIG_SMP 661#ifdef CONFIG_SMP
662 if (smp_processor_id() != boot_cpuid) 662 if (smp_processor_id() != boot_cpuid)
663 smp_call_function_on_cpu(__marvel_access_rtc, 663 smp_call_function_single(boot_cpuid,
664 &rtc_access, 1, 1, 664 __marvel_access_rtc,
665 cpumask_of_cpu(boot_cpuid)); 665 &rtc_access, 1);
666 else 666 else
667 __marvel_access_rtc(&rtc_access); 667 __marvel_access_rtc(&rtc_access);
668#else 668#else
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 96ed82fd9eef..351407e07e71 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -160,7 +160,7 @@ common_shutdown(int mode, char *restart_cmd)
160 struct halt_info args; 160 struct halt_info args;
161 args.mode = mode; 161 args.mode = mode;
162 args.restart_cmd = restart_cmd; 162 args.restart_cmd = restart_cmd;
163 on_each_cpu(common_shutdown_1, &args, 1, 0); 163 on_each_cpu(common_shutdown_1, &args, 0);
164} 164}
165 165
166void 166void
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 2525692db0ab..83df541650fc 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -62,6 +62,7 @@ static struct {
62enum ipi_message_type { 62enum ipi_message_type {
63 IPI_RESCHEDULE, 63 IPI_RESCHEDULE,
64 IPI_CALL_FUNC, 64 IPI_CALL_FUNC,
65 IPI_CALL_FUNC_SINGLE,
65 IPI_CPU_STOP, 66 IPI_CPU_STOP,
66}; 67};
67 68
@@ -558,51 +559,6 @@ send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation)
558 wripir(i); 559 wripir(i);
559} 560}
560 561
561/* Structure and data for smp_call_function. This is designed to
562 minimize static memory requirements. Plus it looks cleaner. */
563
564struct smp_call_struct {
565 void (*func) (void *info);
566 void *info;
567 long wait;
568 atomic_t unstarted_count;
569 atomic_t unfinished_count;
570};
571
572static struct smp_call_struct *smp_call_function_data;
573
574/* Atomicly drop data into a shared pointer. The pointer is free if
575 it is initially locked. If retry, spin until free. */
576
577static int
578pointer_lock (void *lock, void *data, int retry)
579{
580 void *old, *tmp;
581
582 mb();
583 again:
584 /* Compare and swap with zero. */
585 asm volatile (
586 "1: ldq_l %0,%1\n"
587 " mov %3,%2\n"
588 " bne %0,2f\n"
589 " stq_c %2,%1\n"
590 " beq %2,1b\n"
591 "2:"
592 : "=&r"(old), "=m"(*(void **)lock), "=&r"(tmp)
593 : "r"(data)
594 : "memory");
595
596 if (old == 0)
597 return 0;
598 if (! retry)
599 return -EBUSY;
600
601 while (*(void **)lock)
602 barrier();
603 goto again;
604}
605
606void 562void
607handle_ipi(struct pt_regs *regs) 563handle_ipi(struct pt_regs *regs)
608{ 564{
@@ -632,31 +588,12 @@ handle_ipi(struct pt_regs *regs)
632 break; 588 break;
633 589
634 case IPI_CALL_FUNC: 590 case IPI_CALL_FUNC:
635 { 591 generic_smp_call_function_interrupt();
636 struct smp_call_struct *data; 592 break;
637 void (*func)(void *info); 593
638 void *info; 594 case IPI_CALL_FUNC_SINGLE:
639 int wait; 595 generic_smp_call_function_single_interrupt();
640
641 data = smp_call_function_data;
642 func = data->func;
643 info = data->info;
644 wait = data->wait;
645
646 /* Notify the sending CPU that the data has been
647 received, and execution is about to begin. */
648 mb();
649 atomic_dec (&data->unstarted_count);
650
651 /* At this point the structure may be gone unless
652 wait is true. */
653 (*func)(info);
654
655 /* Notify the sending CPU that the task is done. */
656 mb();
657 if (wait) atomic_dec (&data->unfinished_count);
658 break; 596 break;
659 }
660 597
661 case IPI_CPU_STOP: 598 case IPI_CPU_STOP:
662 halt(); 599 halt();
@@ -700,102 +637,15 @@ smp_send_stop(void)
700 send_ipi_message(to_whom, IPI_CPU_STOP); 637 send_ipi_message(to_whom, IPI_CPU_STOP);
701} 638}
702 639
703/* 640void arch_send_call_function_ipi(cpumask_t mask)
704 * Run a function on all other CPUs.
705 * <func> The function to run. This must be fast and non-blocking.
706 * <info> An arbitrary pointer to pass to the function.
707 * <retry> If true, keep retrying until ready.
708 * <wait> If true, wait until function has completed on other CPUs.
709 * [RETURNS] 0 on success, else a negative status code.
710 *
711 * Does not return until remote CPUs are nearly ready to execute <func>
712 * or are or have executed.
713 * You must not call this function with disabled interrupts or from a
714 * hardware interrupt handler or from a bottom half handler.
715 */
716
717int
718smp_call_function_on_cpu (void (*func) (void *info), void *info, int retry,
719 int wait, cpumask_t to_whom)
720{ 641{
721 struct smp_call_struct data; 642 send_ipi_message(mask, IPI_CALL_FUNC);
722 unsigned long timeout;
723 int num_cpus_to_call;
724
725 /* Can deadlock when called with interrupts disabled */
726 WARN_ON(irqs_disabled());
727
728 data.func = func;
729 data.info = info;
730 data.wait = wait;
731
732 cpu_clear(smp_processor_id(), to_whom);
733 num_cpus_to_call = cpus_weight(to_whom);
734
735 atomic_set(&data.unstarted_count, num_cpus_to_call);
736 atomic_set(&data.unfinished_count, num_cpus_to_call);
737
738 /* Acquire the smp_call_function_data mutex. */
739 if (pointer_lock(&smp_call_function_data, &data, retry))
740 return -EBUSY;
741
742 /* Send a message to the requested CPUs. */
743 send_ipi_message(to_whom, IPI_CALL_FUNC);
744
745 /* Wait for a minimal response. */
746 timeout = jiffies + HZ;
747 while (atomic_read (&data.unstarted_count) > 0
748 && time_before (jiffies, timeout))
749 barrier();
750
751 /* If there's no response yet, log a message but allow a longer
752 * timeout period -- if we get a response this time, log
753 * a message saying when we got it..
754 */
755 if (atomic_read(&data.unstarted_count) > 0) {
756 long start_time = jiffies;
757 printk(KERN_ERR "%s: initial timeout -- trying long wait\n",
758 __func__);
759 timeout = jiffies + 30 * HZ;
760 while (atomic_read(&data.unstarted_count) > 0
761 && time_before(jiffies, timeout))
762 barrier();
763 if (atomic_read(&data.unstarted_count) <= 0) {
764 long delta = jiffies - start_time;
765 printk(KERN_ERR
766 "%s: response %ld.%ld seconds into long wait\n",
767 __func__, delta / HZ,
768 (100 * (delta - ((delta / HZ) * HZ))) / HZ);
769 }
770 }
771
772 /* We either got one or timed out -- clear the lock. */
773 mb();
774 smp_call_function_data = NULL;
775
776 /*
777 * If after both the initial and long timeout periods we still don't
778 * have a response, something is very wrong...
779 */
780 BUG_ON(atomic_read (&data.unstarted_count) > 0);
781
782 /* Wait for a complete response, if needed. */
783 if (wait) {
784 while (atomic_read (&data.unfinished_count) > 0)
785 barrier();
786 }
787
788 return 0;
789} 643}
790EXPORT_SYMBOL(smp_call_function_on_cpu);
791 644
792int 645void arch_send_call_function_single_ipi(int cpu)
793smp_call_function (void (*func) (void *info), void *info, int retry, int wait)
794{ 646{
795 return smp_call_function_on_cpu (func, info, retry, wait, 647 send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE);
796 cpu_online_map);
797} 648}
798EXPORT_SYMBOL(smp_call_function);
799 649
800static void 650static void
801ipi_imb(void *ignored) 651ipi_imb(void *ignored)
@@ -807,7 +657,7 @@ void
807smp_imb(void) 657smp_imb(void)
808{ 658{
809 /* Must wait other processors to flush their icache before continue. */ 659 /* Must wait other processors to flush their icache before continue. */
810 if (on_each_cpu(ipi_imb, NULL, 1, 1)) 660 if (on_each_cpu(ipi_imb, NULL, 1))
811 printk(KERN_CRIT "smp_imb: timed out\n"); 661 printk(KERN_CRIT "smp_imb: timed out\n");
812} 662}
813EXPORT_SYMBOL(smp_imb); 663EXPORT_SYMBOL(smp_imb);
@@ -823,7 +673,7 @@ flush_tlb_all(void)
823{ 673{
824 /* Although we don't have any data to pass, we do want to 674 /* Although we don't have any data to pass, we do want to
825 synchronize with the other processors. */ 675 synchronize with the other processors. */
826 if (on_each_cpu(ipi_flush_tlb_all, NULL, 1, 1)) { 676 if (on_each_cpu(ipi_flush_tlb_all, NULL, 1)) {
827 printk(KERN_CRIT "flush_tlb_all: timed out\n"); 677 printk(KERN_CRIT "flush_tlb_all: timed out\n");
828 } 678 }
829} 679}
@@ -860,7 +710,7 @@ flush_tlb_mm(struct mm_struct *mm)
860 } 710 }
861 } 711 }
862 712
863 if (smp_call_function(ipi_flush_tlb_mm, mm, 1, 1)) { 713 if (smp_call_function(ipi_flush_tlb_mm, mm, 1)) {
864 printk(KERN_CRIT "flush_tlb_mm: timed out\n"); 714 printk(KERN_CRIT "flush_tlb_mm: timed out\n");
865 } 715 }
866 716
@@ -913,7 +763,7 @@ flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
913 data.mm = mm; 763 data.mm = mm;
914 data.addr = addr; 764 data.addr = addr;
915 765
916 if (smp_call_function(ipi_flush_tlb_page, &data, 1, 1)) { 766 if (smp_call_function(ipi_flush_tlb_page, &data, 1)) {
917 printk(KERN_CRIT "flush_tlb_page: timed out\n"); 767 printk(KERN_CRIT "flush_tlb_page: timed out\n");
918 } 768 }
919 769
@@ -965,7 +815,7 @@ flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
965 } 815 }
966 } 816 }
967 817
968 if (smp_call_function(ipi_flush_icache_page, mm, 1, 1)) { 818 if (smp_call_function(ipi_flush_icache_page, mm, 1)) {
969 printk(KERN_CRIT "flush_icache_page: timed out\n"); 819 printk(KERN_CRIT "flush_icache_page: timed out\n");
970 } 820 }
971 821
diff --git a/arch/alpha/oprofile/common.c b/arch/alpha/oprofile/common.c
index 9fc0eeb4f0ab..7c3d5ec6ec67 100644
--- a/arch/alpha/oprofile/common.c
+++ b/arch/alpha/oprofile/common.c
@@ -65,7 +65,7 @@ op_axp_setup(void)
65 model->reg_setup(&reg, ctr, &sys); 65 model->reg_setup(&reg, ctr, &sys);
66 66
67 /* Configure the registers on all cpus. */ 67 /* Configure the registers on all cpus. */
68 (void)smp_call_function(model->cpu_setup, &reg, 0, 1); 68 (void)smp_call_function(model->cpu_setup, &reg, 1);
69 model->cpu_setup(&reg); 69 model->cpu_setup(&reg);
70 return 0; 70 return 0;
71} 71}
@@ -86,7 +86,7 @@ op_axp_cpu_start(void *dummy)
86static int 86static int
87op_axp_start(void) 87op_axp_start(void)
88{ 88{
89 (void)smp_call_function(op_axp_cpu_start, NULL, 0, 1); 89 (void)smp_call_function(op_axp_cpu_start, NULL, 1);
90 op_axp_cpu_start(NULL); 90 op_axp_cpu_start(NULL);
91 return 0; 91 return 0;
92} 92}
@@ -101,7 +101,7 @@ op_axp_cpu_stop(void *dummy)
101static void 101static void
102op_axp_stop(void) 102op_axp_stop(void)
103{ 103{
104 (void)smp_call_function(op_axp_cpu_stop, NULL, 0, 1); 104 (void)smp_call_function(op_axp_cpu_stop, NULL, 1);
105 op_axp_cpu_stop(NULL); 105 op_axp_cpu_stop(NULL);
106} 106}
107 107
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 258f1369fb0c..c7ad324ddf2c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -701,6 +701,7 @@ source "kernel/time/Kconfig"
701config SMP 701config SMP
702 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 702 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
703 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) 703 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
704 select USE_GENERIC_SMP_HELPERS
704 help 705 help
705 This enables support for systems with more than one CPU. If you have 706 This enables support for systems with more than one CPU. If you have
706 a system with only one CPU, like most personal computers, say N. If 707 a system with only one CPU, like most personal computers, say N. If
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index eefae1de334c..5a7c09564d13 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -68,20 +68,10 @@ enum ipi_msg_type {
68 IPI_TIMER, 68 IPI_TIMER,
69 IPI_RESCHEDULE, 69 IPI_RESCHEDULE,
70 IPI_CALL_FUNC, 70 IPI_CALL_FUNC,
71 IPI_CALL_FUNC_SINGLE,
71 IPI_CPU_STOP, 72 IPI_CPU_STOP,
72}; 73};
73 74
74struct smp_call_struct {
75 void (*func)(void *info);
76 void *info;
77 int wait;
78 cpumask_t pending;
79 cpumask_t unfinished;
80};
81
82static struct smp_call_struct * volatile smp_call_function_data;
83static DEFINE_SPINLOCK(smp_call_function_lock);
84
85int __cpuinit __cpu_up(unsigned int cpu) 75int __cpuinit __cpu_up(unsigned int cpu)
86{ 76{
87 struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); 77 struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
@@ -366,114 +356,15 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
366 local_irq_restore(flags); 356 local_irq_restore(flags);
367} 357}
368 358
369/* 359void arch_send_call_function_ipi(cpumask_t mask)
370 * You must not call this function with disabled interrupts, from a
371 * hardware interrupt handler, nor from a bottom half handler.
372 */
373static int smp_call_function_on_cpu(void (*func)(void *info), void *info,
374 int retry, int wait, cpumask_t callmap)
375{
376 struct smp_call_struct data;
377 unsigned long timeout;
378 int ret = 0;
379
380 data.func = func;
381 data.info = info;
382 data.wait = wait;
383
384 cpu_clear(smp_processor_id(), callmap);
385 if (cpus_empty(callmap))
386 goto out;
387
388 data.pending = callmap;
389 if (wait)
390 data.unfinished = callmap;
391
392 /*
393 * try to get the mutex on smp_call_function_data
394 */
395 spin_lock(&smp_call_function_lock);
396 smp_call_function_data = &data;
397
398 send_ipi_message(callmap, IPI_CALL_FUNC);
399
400 timeout = jiffies + HZ;
401 while (!cpus_empty(data.pending) && time_before(jiffies, timeout))
402 barrier();
403
404 /*
405 * did we time out?
406 */
407 if (!cpus_empty(data.pending)) {
408 /*
409 * this may be causing our panic - report it
410 */
411 printk(KERN_CRIT
412 "CPU%u: smp_call_function timeout for %p(%p)\n"
413 " callmap %lx pending %lx, %swait\n",
414 smp_processor_id(), func, info, *cpus_addr(callmap),
415 *cpus_addr(data.pending), wait ? "" : "no ");
416
417 /*
418 * TRACE
419 */
420 timeout = jiffies + (5 * HZ);
421 while (!cpus_empty(data.pending) && time_before(jiffies, timeout))
422 barrier();
423
424 if (cpus_empty(data.pending))
425 printk(KERN_CRIT " RESOLVED\n");
426 else
427 printk(KERN_CRIT " STILL STUCK\n");
428 }
429
430 /*
431 * whatever happened, we're done with the data, so release it
432 */
433 smp_call_function_data = NULL;
434 spin_unlock(&smp_call_function_lock);
435
436 if (!cpus_empty(data.pending)) {
437 ret = -ETIMEDOUT;
438 goto out;
439 }
440
441 if (wait)
442 while (!cpus_empty(data.unfinished))
443 barrier();
444 out:
445
446 return 0;
447}
448
449int smp_call_function(void (*func)(void *info), void *info, int retry,
450 int wait)
451{ 360{
452 return smp_call_function_on_cpu(func, info, retry, wait, 361 send_ipi_message(mask, IPI_CALL_FUNC);
453 cpu_online_map);
454} 362}
455EXPORT_SYMBOL_GPL(smp_call_function);
456 363
457int smp_call_function_single(int cpu, void (*func)(void *info), void *info, 364void arch_send_call_function_single_ipi(int cpu)
458 int retry, int wait)
459{ 365{
460 /* prevent preemption and reschedule on another processor */ 366 send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE);
461 int current_cpu = get_cpu();
462 int ret = 0;
463
464 if (cpu == current_cpu) {
465 local_irq_disable();
466 func(info);
467 local_irq_enable();
468 } else
469 ret = smp_call_function_on_cpu(func, info, retry, wait,
470 cpumask_of_cpu(cpu));
471
472 put_cpu();
473
474 return ret;
475} 367}
476EXPORT_SYMBOL_GPL(smp_call_function_single);
477 368
478void show_ipi_list(struct seq_file *p) 369void show_ipi_list(struct seq_file *p)
479{ 370{
@@ -521,27 +412,6 @@ asmlinkage void __exception do_local_timer(struct pt_regs *regs)
521} 412}
522#endif 413#endif
523 414
524/*
525 * ipi_call_function - handle IPI from smp_call_function()
526 *
527 * Note that we copy data out of the cross-call structure and then
528 * let the caller know that we're here and have done with their data
529 */
530static void ipi_call_function(unsigned int cpu)
531{
532 struct smp_call_struct *data = smp_call_function_data;
533 void (*func)(void *info) = data->func;
534 void *info = data->info;
535 int wait = data->wait;
536
537 cpu_clear(cpu, data->pending);
538
539 func(info);
540
541 if (wait)
542 cpu_clear(cpu, data->unfinished);
543}
544
545static DEFINE_SPINLOCK(stop_lock); 415static DEFINE_SPINLOCK(stop_lock);
546 416
547/* 417/*
@@ -611,7 +481,11 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs)
611 break; 481 break;
612 482
613 case IPI_CALL_FUNC: 483 case IPI_CALL_FUNC:
614 ipi_call_function(cpu); 484 generic_smp_call_function_interrupt();
485 break;
486
487 case IPI_CALL_FUNC_SINGLE:
488 generic_smp_call_function_single_interrupt();
615 break; 489 break;
616 490
617 case IPI_CPU_STOP: 491 case IPI_CPU_STOP:
@@ -662,14 +536,13 @@ int setup_profiling_timer(unsigned int multiplier)
662} 536}
663 537
664static int 538static int
665on_each_cpu_mask(void (*func)(void *), void *info, int retry, int wait, 539on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask)
666 cpumask_t mask)
667{ 540{
668 int ret = 0; 541 int ret = 0;
669 542
670 preempt_disable(); 543 preempt_disable();
671 544
672 ret = smp_call_function_on_cpu(func, info, retry, wait, mask); 545 ret = smp_call_function_mask(mask, func, info, wait);
673 if (cpu_isset(smp_processor_id(), mask)) 546 if (cpu_isset(smp_processor_id(), mask))
674 func(info); 547 func(info);
675 548
@@ -731,14 +604,14 @@ static inline void ipi_flush_tlb_kernel_range(void *arg)
731 604
732void flush_tlb_all(void) 605void flush_tlb_all(void)
733{ 606{
734 on_each_cpu(ipi_flush_tlb_all, NULL, 1, 1); 607 on_each_cpu(ipi_flush_tlb_all, NULL, 1);
735} 608}
736 609
737void flush_tlb_mm(struct mm_struct *mm) 610void flush_tlb_mm(struct mm_struct *mm)
738{ 611{
739 cpumask_t mask = mm->cpu_vm_mask; 612 cpumask_t mask = mm->cpu_vm_mask;
740 613
741 on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, 1, mask); 614 on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask);
742} 615}
743 616
744void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) 617void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
@@ -749,7 +622,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
749 ta.ta_vma = vma; 622 ta.ta_vma = vma;
750 ta.ta_start = uaddr; 623 ta.ta_start = uaddr;
751 624
752 on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, 1, mask); 625 on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask);
753} 626}
754 627
755void flush_tlb_kernel_page(unsigned long kaddr) 628void flush_tlb_kernel_page(unsigned long kaddr)
@@ -758,7 +631,7 @@ void flush_tlb_kernel_page(unsigned long kaddr)
758 631
759 ta.ta_start = kaddr; 632 ta.ta_start = kaddr;
760 633
761 on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1, 1); 634 on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
762} 635}
763 636
764void flush_tlb_range(struct vm_area_struct *vma, 637void flush_tlb_range(struct vm_area_struct *vma,
@@ -771,7 +644,7 @@ void flush_tlb_range(struct vm_area_struct *vma,
771 ta.ta_start = start; 644 ta.ta_start = start;
772 ta.ta_end = end; 645 ta.ta_end = end;
773 646
774 on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, 1, mask); 647 on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask);
775} 648}
776 649
777void flush_tlb_kernel_range(unsigned long start, unsigned long end) 650void flush_tlb_kernel_range(unsigned long start, unsigned long end)
@@ -781,5 +654,5 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
781 ta.ta_start = start; 654 ta.ta_start = start;
782 ta.ta_end = end; 655 ta.ta_end = end;
783 656
784 on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1, 1); 657 on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
785} 658}
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
index 74fae6045650..4458705021e0 100644
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -201,7 +201,7 @@ static int em_call_function(int (*fn)(void))
201 data.ret = 0; 201 data.ret = 0;
202 202
203 preempt_disable(); 203 preempt_disable();
204 smp_call_function(em_func, &data, 1, 1); 204 smp_call_function(em_func, &data, 1);
205 em_func(&data); 205 em_func(&data);
206 preempt_enable(); 206 preempt_enable();
207 207
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 32455c633f1c..c0d2c9bb952b 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -352,7 +352,7 @@ static int __init vfp_init(void)
352 else if (vfpsid & FPSID_NODOUBLE) { 352 else if (vfpsid & FPSID_NODOUBLE) {
353 printk("no double precision support\n"); 353 printk("no double precision support\n");
354 } else { 354 } else {
355 smp_call_function(vfp_enable, NULL, 1, 1); 355 smp_call_function(vfp_enable, NULL, 1);
356 356
357 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ 357 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
358 printk("implementor %02x architecture %d part %02x variant %x rev %x\n", 358 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index a9c3334e46c9..952a24b2f5a9 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -194,7 +194,7 @@ void stop_this_cpu(void* dummy)
194/* Other calls */ 194/* Other calls */
195void smp_send_stop(void) 195void smp_send_stop(void)
196{ 196{
197 smp_call_function(stop_this_cpu, NULL, 1, 0); 197 smp_call_function(stop_this_cpu, NULL, 0);
198} 198}
199 199
200int setup_profiling_timer(unsigned int multiplier) 200int setup_profiling_timer(unsigned int multiplier)
@@ -316,8 +316,7 @@ int send_ipi(int vector, int wait, cpumask_t cpu_mask)
316 * You must not call this function with disabled interrupts or from a 316 * You must not call this function with disabled interrupts or from a
317 * hardware interrupt handler or from a bottom half handler. 317 * hardware interrupt handler or from a bottom half handler.
318 */ 318 */
319int smp_call_function(void (*func)(void *info), void *info, 319int smp_call_function(void (*func)(void *info), void *info, int wait)
320 int nonatomic, int wait)
321{ 320{
322 cpumask_t cpu_mask = CPU_MASK_ALL; 321 cpumask_t cpu_mask = CPU_MASK_ALL;
323 struct call_data_struct data; 322 struct call_data_struct data;
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 16be41446b5b..18bcc10903b4 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -303,6 +303,7 @@ config VIRT_CPU_ACCOUNTING
303 303
304config SMP 304config SMP
305 bool "Symmetric multi-processing support" 305 bool "Symmetric multi-processing support"
306 select USE_GENERIC_SMP_HELPERS
306 help 307 help
307 This enables support for systems with more than one CPU. If you have 308 This enables support for systems with more than one CPU. If you have
308 a system with only one CPU, say N. If you have a system with more 309 a system with only one CPU, say N. If you have a system with more
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 705176b434b3..7dd96c127177 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -707,7 +707,7 @@ ia64_mca_cmc_vector_enable (void *dummy)
707static void 707static void
708ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused) 708ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
709{ 709{
710 on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0); 710 on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 0);
711} 711}
712 712
713/* 713/*
@@ -719,7 +719,7 @@ ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
719static void 719static void
720ia64_mca_cmc_vector_enable_keventd(struct work_struct *unused) 720ia64_mca_cmc_vector_enable_keventd(struct work_struct *unused)
721{ 721{
722 on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0); 722 on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 0);
723} 723}
724 724
725/* 725/*
@@ -1881,7 +1881,7 @@ static int __cpuinit mca_cpu_callback(struct notifier_block *nfb,
1881 case CPU_ONLINE: 1881 case CPU_ONLINE:
1882 case CPU_ONLINE_FROZEN: 1882 case CPU_ONLINE_FROZEN:
1883 smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust, 1883 smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust,
1884 NULL, 1, 0); 1884 NULL, 0);
1885 break; 1885 break;
1886 } 1886 }
1887 return NOTIFY_OK; 1887 return NOTIFY_OK;
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index 9dc00f7fe10e..e5c57f413ca2 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -921,7 +921,7 @@ int palinfo_handle_smp(pal_func_cpu_u_t *f, char *page)
921 921
922 922
923 /* will send IPI to other CPU and wait for completion of remote call */ 923 /* will send IPI to other CPU and wait for completion of remote call */
924 if ((ret=smp_call_function_single(f->req_cpu, palinfo_smp_call, &ptr, 0, 1))) { 924 if ((ret=smp_call_function_single(f->req_cpu, palinfo_smp_call, &ptr, 1))) {
925 printk(KERN_ERR "palinfo: remote CPU call from %d to %d on function %d: " 925 printk(KERN_ERR "palinfo: remote CPU call from %d to %d on function %d: "
926 "error %d\n", smp_processor_id(), f->req_cpu, f->func_id, ret); 926 "error %d\n", smp_processor_id(), f->req_cpu, f->func_id, ret);
927 return 0; 927 return 0;
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 7714a97b0104..19d4493c6193 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -1820,7 +1820,7 @@ pfm_syswide_cleanup_other_cpu(pfm_context_t *ctx)
1820 int ret; 1820 int ret;
1821 1821
1822 DPRINT(("calling CPU%d for cleanup\n", ctx->ctx_cpu)); 1822 DPRINT(("calling CPU%d for cleanup\n", ctx->ctx_cpu));
1823 ret = smp_call_function_single(ctx->ctx_cpu, pfm_syswide_force_stop, ctx, 0, 1); 1823 ret = smp_call_function_single(ctx->ctx_cpu, pfm_syswide_force_stop, ctx, 1);
1824 DPRINT(("called CPU%d for cleanup ret=%d\n", ctx->ctx_cpu, ret)); 1824 DPRINT(("called CPU%d for cleanup ret=%d\n", ctx->ctx_cpu, ret));
1825} 1825}
1826#endif /* CONFIG_SMP */ 1826#endif /* CONFIG_SMP */
@@ -6508,7 +6508,7 @@ pfm_install_alt_pmu_interrupt(pfm_intr_handler_desc_t *hdl)
6508 } 6508 }
6509 6509
6510 /* save the current system wide pmu states */ 6510 /* save the current system wide pmu states */
6511 ret = on_each_cpu(pfm_alt_save_pmu_state, NULL, 0, 1); 6511 ret = on_each_cpu(pfm_alt_save_pmu_state, NULL, 1);
6512 if (ret) { 6512 if (ret) {
6513 DPRINT(("on_each_cpu() failed: %d\n", ret)); 6513 DPRINT(("on_each_cpu() failed: %d\n", ret));
6514 goto cleanup_reserve; 6514 goto cleanup_reserve;
@@ -6553,7 +6553,7 @@ pfm_remove_alt_pmu_interrupt(pfm_intr_handler_desc_t *hdl)
6553 6553
6554 pfm_alt_intr_handler = NULL; 6554 pfm_alt_intr_handler = NULL;
6555 6555
6556 ret = on_each_cpu(pfm_alt_restore_pmu_state, NULL, 0, 1); 6556 ret = on_each_cpu(pfm_alt_restore_pmu_state, NULL, 1);
6557 if (ret) { 6557 if (ret) {
6558 DPRINT(("on_each_cpu() failed: %d\n", ret)); 6558 DPRINT(("on_each_cpu() failed: %d\n", ret));
6559 } 6559 }
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index a3a34b4eb038..fabaf08d9a69 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -286,7 +286,7 @@ void cpu_idle_wait(void)
286{ 286{
287 smp_mb(); 287 smp_mb();
288 /* kick all the CPUs so that they exit out of pm_idle */ 288 /* kick all the CPUs so that they exit out of pm_idle */
289 smp_call_function(do_nothing, NULL, 0, 1); 289 smp_call_function(do_nothing, NULL, 1);
290} 290}
291EXPORT_SYMBOL_GPL(cpu_idle_wait); 291EXPORT_SYMBOL_GPL(cpu_idle_wait);
292 292
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
index 983296f1c813..3676468612b6 100644
--- a/arch/ia64/kernel/smp.c
+++ b/arch/ia64/kernel/smp.c
@@ -60,25 +60,9 @@ static struct local_tlb_flush_counts {
60 60
61static DEFINE_PER_CPU(unsigned int, shadow_flush_counts[NR_CPUS]) ____cacheline_aligned; 61static DEFINE_PER_CPU(unsigned int, shadow_flush_counts[NR_CPUS]) ____cacheline_aligned;
62 62
63
64/*
65 * Structure and data for smp_call_function(). This is designed to minimise static memory
66 * requirements. It also looks cleaner.
67 */
68static __cacheline_aligned DEFINE_SPINLOCK(call_lock);
69
70struct call_data_struct {
71 void (*func) (void *info);
72 void *info;
73 long wait;
74 atomic_t started;
75 atomic_t finished;
76};
77
78static volatile struct call_data_struct *call_data;
79
80#define IPI_CALL_FUNC 0 63#define IPI_CALL_FUNC 0
81#define IPI_CPU_STOP 1 64#define IPI_CPU_STOP 1
65#define IPI_CALL_FUNC_SINGLE 2
82#define IPI_KDUMP_CPU_STOP 3 66#define IPI_KDUMP_CPU_STOP 3
83 67
84/* This needs to be cacheline aligned because it is written to by *other* CPUs. */ 68/* This needs to be cacheline aligned because it is written to by *other* CPUs. */
@@ -86,43 +70,6 @@ static DEFINE_PER_CPU_SHARED_ALIGNED(u64, ipi_operation);
86 70
87extern void cpu_halt (void); 71extern void cpu_halt (void);
88 72
89void
90lock_ipi_calllock(void)
91{
92 spin_lock_irq(&call_lock);
93}
94
95void
96unlock_ipi_calllock(void)
97{
98 spin_unlock_irq(&call_lock);
99}
100
101static inline void
102handle_call_data(void)
103{
104 struct call_data_struct *data;
105 void (*func)(void *info);
106 void *info;
107 int wait;
108
109 /* release the 'pointer lock' */
110 data = (struct call_data_struct *)call_data;
111 func = data->func;
112 info = data->info;
113 wait = data->wait;
114
115 mb();
116 atomic_inc(&data->started);
117 /* At this point the structure may be gone unless wait is true. */
118 (*func)(info);
119
120 /* Notify the sending CPU that the task is done. */
121 mb();
122 if (wait)
123 atomic_inc(&data->finished);
124}
125
126static void 73static void
127stop_this_cpu(void) 74stop_this_cpu(void)
128{ 75{
@@ -163,13 +110,15 @@ handle_IPI (int irq, void *dev_id)
163 ops &= ~(1 << which); 110 ops &= ~(1 << which);
164 111
165 switch (which) { 112 switch (which) {
166 case IPI_CALL_FUNC:
167 handle_call_data();
168 break;
169
170 case IPI_CPU_STOP: 113 case IPI_CPU_STOP:
171 stop_this_cpu(); 114 stop_this_cpu();
172 break; 115 break;
116 case IPI_CALL_FUNC:
117 generic_smp_call_function_interrupt();
118 break;
119 case IPI_CALL_FUNC_SINGLE:
120 generic_smp_call_function_single_interrupt();
121 break;
173#ifdef CONFIG_KEXEC 122#ifdef CONFIG_KEXEC
174 case IPI_KDUMP_CPU_STOP: 123 case IPI_KDUMP_CPU_STOP:
175 unw_init_running(kdump_cpu_freeze, NULL); 124 unw_init_running(kdump_cpu_freeze, NULL);
@@ -187,6 +136,8 @@ handle_IPI (int irq, void *dev_id)
187 return IRQ_HANDLED; 136 return IRQ_HANDLED;
188} 137}
189 138
139
140
190/* 141/*
191 * Called with preemption disabled. 142 * Called with preemption disabled.
192 */ 143 */
@@ -334,7 +285,7 @@ smp_flush_tlb_cpumask(cpumask_t xcpumask)
334void 285void
335smp_flush_tlb_all (void) 286smp_flush_tlb_all (void)
336{ 287{
337 on_each_cpu((void (*)(void *))local_flush_tlb_all, NULL, 1, 1); 288 on_each_cpu((void (*)(void *))local_flush_tlb_all, NULL, 1);
338} 289}
339 290
340void 291void
@@ -357,193 +308,18 @@ smp_flush_tlb_mm (struct mm_struct *mm)
357 * anyhow, and once a CPU is interrupted, the cost of local_flush_tlb_all() is 308 * anyhow, and once a CPU is interrupted, the cost of local_flush_tlb_all() is
358 * rather trivial. 309 * rather trivial.
359 */ 310 */
360 on_each_cpu((void (*)(void *))local_finish_flush_tlb_mm, mm, 1, 1); 311 on_each_cpu((void (*)(void *))local_finish_flush_tlb_mm, mm, 1);
361} 312}
362 313
363/* 314void arch_send_call_function_single_ipi(int cpu)
364 * Run a function on a specific CPU
365 * <func> The function to run. This must be fast and non-blocking.
366 * <info> An arbitrary pointer to pass to the function.
367 * <nonatomic> Currently unused.
368 * <wait> If true, wait until function has completed on other CPUs.
369 * [RETURNS] 0 on success, else a negative status code.
370 *
371 * Does not return until the remote CPU is nearly ready to execute <func>
372 * or is or has executed.
373 */
374
375int
376smp_call_function_single (int cpuid, void (*func) (void *info), void *info, int nonatomic,
377 int wait)
378{
379 struct call_data_struct data;
380 int cpus = 1;
381 int me = get_cpu(); /* prevent preemption and reschedule on another processor */
382
383 if (cpuid == me) {
384 local_irq_disable();
385 func(info);
386 local_irq_enable();
387 put_cpu();
388 return 0;
389 }
390
391 data.func = func;
392 data.info = info;
393 atomic_set(&data.started, 0);
394 data.wait = wait;
395 if (wait)
396 atomic_set(&data.finished, 0);
397
398 spin_lock_bh(&call_lock);
399
400 call_data = &data;
401 mb(); /* ensure store to call_data precedes setting of IPI_CALL_FUNC */
402 send_IPI_single(cpuid, IPI_CALL_FUNC);
403
404 /* Wait for response */
405 while (atomic_read(&data.started) != cpus)
406 cpu_relax();
407
408 if (wait)
409 while (atomic_read(&data.finished) != cpus)
410 cpu_relax();
411 call_data = NULL;
412
413 spin_unlock_bh(&call_lock);
414 put_cpu();
415 return 0;
416}
417EXPORT_SYMBOL(smp_call_function_single);
418
419/**
420 * smp_call_function_mask(): Run a function on a set of other CPUs.
421 * <mask> The set of cpus to run on. Must not include the current cpu.
422 * <func> The function to run. This must be fast and non-blocking.
423 * <info> An arbitrary pointer to pass to the function.
424 * <wait> If true, wait (atomically) until function
425 * has completed on other CPUs.
426 *
427 * Returns 0 on success, else a negative status code.
428 *
429 * If @wait is true, then returns once @func has returned; otherwise
430 * it returns just before the target cpu calls @func.
431 *
432 * You must not call this function with disabled interrupts or from a
433 * hardware interrupt handler or from a bottom half handler.
434 */
435int smp_call_function_mask(cpumask_t mask,
436 void (*func)(void *), void *info,
437 int wait)
438{ 315{
439 struct call_data_struct data; 316 send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
440 cpumask_t allbutself;
441 int cpus;
442
443 spin_lock(&call_lock);
444 allbutself = cpu_online_map;
445 cpu_clear(smp_processor_id(), allbutself);
446
447 cpus_and(mask, mask, allbutself);
448 cpus = cpus_weight(mask);
449 if (!cpus) {
450 spin_unlock(&call_lock);
451 return 0;
452 }
453
454 /* Can deadlock when called with interrupts disabled */
455 WARN_ON(irqs_disabled());
456
457 data.func = func;
458 data.info = info;
459 atomic_set(&data.started, 0);
460 data.wait = wait;
461 if (wait)
462 atomic_set(&data.finished, 0);
463
464 call_data = &data;
465 mb(); /* ensure store to call_data precedes setting of IPI_CALL_FUNC*/
466
467 /* Send a message to other CPUs */
468 if (cpus_equal(mask, allbutself))
469 send_IPI_allbutself(IPI_CALL_FUNC);
470 else
471 send_IPI_mask(mask, IPI_CALL_FUNC);
472
473 /* Wait for response */
474 while (atomic_read(&data.started) != cpus)
475 cpu_relax();
476
477 if (wait)
478 while (atomic_read(&data.finished) != cpus)
479 cpu_relax();
480 call_data = NULL;
481
482 spin_unlock(&call_lock);
483 return 0;
484
485} 317}
486EXPORT_SYMBOL(smp_call_function_mask);
487 318
488/* 319void arch_send_call_function_ipi(cpumask_t mask)
489 * this function sends a 'generic call function' IPI to all other CPUs
490 * in the system.
491 */
492
493/*
494 * [SUMMARY] Run a function on all other CPUs.
495 * <func> The function to run. This must be fast and non-blocking.
496 * <info> An arbitrary pointer to pass to the function.
497 * <nonatomic> currently unused.
498 * <wait> If true, wait (atomically) until function has completed on other CPUs.
499 * [RETURNS] 0 on success, else a negative status code.
500 *
501 * Does not return until remote CPUs are nearly ready to execute <func> or are or have
502 * executed.
503 *
504 * You must not call this function with disabled interrupts or from a
505 * hardware interrupt handler or from a bottom half handler.
506 */
507int
508smp_call_function (void (*func) (void *info), void *info, int nonatomic, int wait)
509{ 320{
510 struct call_data_struct data; 321 send_IPI_mask(mask, IPI_CALL_FUNC);
511 int cpus;
512
513 spin_lock(&call_lock);
514 cpus = num_online_cpus() - 1;
515 if (!cpus) {
516 spin_unlock(&call_lock);
517 return 0;
518 }
519
520 /* Can deadlock when called with interrupts disabled */
521 WARN_ON(irqs_disabled());
522
523 data.func = func;
524 data.info = info;
525 atomic_set(&data.started, 0);
526 data.wait = wait;
527 if (wait)
528 atomic_set(&data.finished, 0);
529
530 call_data = &data;
531 mb(); /* ensure store to call_data precedes setting of IPI_CALL_FUNC */
532 send_IPI_allbutself(IPI_CALL_FUNC);
533
534 /* Wait for response */
535 while (atomic_read(&data.started) != cpus)
536 cpu_relax();
537
538 if (wait)
539 while (atomic_read(&data.finished) != cpus)
540 cpu_relax();
541 call_data = NULL;
542
543 spin_unlock(&call_lock);
544 return 0;
545} 322}
546EXPORT_SYMBOL(smp_call_function);
547 323
548/* 324/*
549 * this function calls the 'stop' function on all other CPUs in the system. 325 * this function calls the 'stop' function on all other CPUs in the system.
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index d7ad42b77d41..9d1d429c6c59 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -317,7 +317,7 @@ ia64_sync_itc (unsigned int master)
317 317
318 go[MASTER] = 1; 318 go[MASTER] = 1;
319 319
320 if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) { 320 if (smp_call_function_single(master, sync_master, NULL, 0) < 0) {
321 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); 321 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
322 return; 322 return;
323 } 323 }
@@ -395,14 +395,14 @@ smp_callin (void)
395 395
396 fix_b0_for_bsp(); 396 fix_b0_for_bsp();
397 397
398 lock_ipi_calllock(); 398 ipi_call_lock_irq();
399 spin_lock(&vector_lock); 399 spin_lock(&vector_lock);
400 /* Setup the per cpu irq handling data structures */ 400 /* Setup the per cpu irq handling data structures */
401 __setup_vector_irq(cpuid); 401 __setup_vector_irq(cpuid);
402 cpu_set(cpuid, cpu_online_map); 402 cpu_set(cpuid, cpu_online_map);
403 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 403 per_cpu(cpu_state, cpuid) = CPU_ONLINE;
404 spin_unlock(&vector_lock); 404 spin_unlock(&vector_lock);
405 unlock_ipi_calllock(); 405 ipi_call_unlock_irq();
406 406
407 smp_setup_percpu_timer(); 407 smp_setup_percpu_timer();
408 408
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index e77995a6e3ed..8eff8c1d40a6 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -123,8 +123,7 @@ static int uncached_add_chunk(struct uncached_pool *uc_pool, int nid)
123 status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); 123 status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL);
124 if (status == PAL_VISIBILITY_OK_REMOTE_NEEDED) { 124 if (status == PAL_VISIBILITY_OK_REMOTE_NEEDED) {
125 atomic_set(&uc_pool->status, 0); 125 atomic_set(&uc_pool->status, 0);
126 status = smp_call_function(uncached_ipi_visibility, uc_pool, 126 status = smp_call_function(uncached_ipi_visibility, uc_pool, 1);
127 0, 1);
128 if (status || atomic_read(&uc_pool->status)) 127 if (status || atomic_read(&uc_pool->status))
129 goto failed; 128 goto failed;
130 } else if (status != PAL_VISIBILITY_OK) 129 } else if (status != PAL_VISIBILITY_OK)
@@ -146,7 +145,7 @@ static int uncached_add_chunk(struct uncached_pool *uc_pool, int nid)
146 if (status != PAL_STATUS_SUCCESS) 145 if (status != PAL_STATUS_SUCCESS)
147 goto failed; 146 goto failed;
148 atomic_set(&uc_pool->status, 0); 147 atomic_set(&uc_pool->status, 0);
149 status = smp_call_function(uncached_ipi_mc_drain, uc_pool, 0, 1); 148 status = smp_call_function(uncached_ipi_mc_drain, uc_pool, 1);
150 if (status || atomic_read(&uc_pool->status)) 149 if (status || atomic_read(&uc_pool->status))
151 goto failed; 150 goto failed;
152 151
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 53351c3cd7b1..96c31b4180c3 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -11,6 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/rculist.h>
14#include <asm/sn/addrs.h> 15#include <asm/sn/addrs.h>
15#include <asm/sn/arch.h> 16#include <asm/sn/arch.h>
16#include <asm/sn/intr.h> 17#include <asm/sn/intr.h>
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
index 8cc0c4753d89..636588e7e068 100644
--- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -629,7 +629,7 @@ static int sn_hwperf_op_cpu(struct sn_hwperf_op_info *op_info)
629 if (use_ipi) { 629 if (use_ipi) {
630 /* use an interprocessor interrupt to call SAL */ 630 /* use an interprocessor interrupt to call SAL */
631 smp_call_function_single(cpu, sn_hwperf_call_sal, 631 smp_call_function_single(cpu, sn_hwperf_call_sal,
632 op_info, 1, 1); 632 op_info, 1);
633 } 633 }
634 else { 634 else {
635 /* migrate the task before calling SAL */ 635 /* migrate the task before calling SAL */
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index de153de2ea9f..a5f864c445b2 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -296,6 +296,7 @@ config PREEMPT
296 296
297config SMP 297config SMP
298 bool "Symmetric multi-processing support" 298 bool "Symmetric multi-processing support"
299 select USE_GENERIC_SMP_HELPERS
299 ---help--- 300 ---help---
300 This enables support for systems with more than one CPU. If you have 301 This enables support for systems with more than one CPU. If you have
301 a system with only one CPU, like most personal computers, say N. If 302 a system with only one CPU, like most personal computers, say N. If
diff --git a/arch/m32r/kernel/m32r_ksyms.c b/arch/m32r/kernel/m32r_ksyms.c
index e6709fe950ba..16bcb189a383 100644
--- a/arch/m32r/kernel/m32r_ksyms.c
+++ b/arch/m32r/kernel/m32r_ksyms.c
@@ -43,9 +43,6 @@ EXPORT_SYMBOL(dcache_dummy);
43#endif 43#endif
44EXPORT_SYMBOL(cpu_data); 44EXPORT_SYMBOL(cpu_data);
45 45
46/* Global SMP stuff */
47EXPORT_SYMBOL(smp_call_function);
48
49/* TLB flushing */ 46/* TLB flushing */
50EXPORT_SYMBOL(smp_flush_tlb_page); 47EXPORT_SYMBOL(smp_flush_tlb_page);
51#endif 48#endif
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c
index c837bc13b015..7577f971ea4e 100644
--- a/arch/m32r/kernel/smp.c
+++ b/arch/m32r/kernel/smp.c
@@ -35,22 +35,6 @@
35/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ 35/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
36 36
37/* 37/*
38 * Structure and data for smp_call_function(). This is designed to minimise
39 * static memory requirements. It also looks cleaner.
40 */
41static DEFINE_SPINLOCK(call_lock);
42
43struct call_data_struct {
44 void (*func) (void *info);
45 void *info;
46 atomic_t started;
47 atomic_t finished;
48 int wait;
49} __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
50
51static struct call_data_struct *call_data;
52
53/*
54 * For flush_cache_all() 38 * For flush_cache_all()
55 */ 39 */
56static DEFINE_SPINLOCK(flushcache_lock); 40static DEFINE_SPINLOCK(flushcache_lock);
@@ -96,9 +80,6 @@ void smp_invalidate_interrupt(void);
96void smp_send_stop(void); 80void smp_send_stop(void);
97static void stop_this_cpu(void *); 81static void stop_this_cpu(void *);
98 82
99int smp_call_function(void (*) (void *), void *, int, int);
100void smp_call_function_interrupt(void);
101
102void smp_send_timer(void); 83void smp_send_timer(void);
103void smp_ipi_timer_interrupt(struct pt_regs *); 84void smp_ipi_timer_interrupt(struct pt_regs *);
104void smp_local_timer_interrupt(void); 85void smp_local_timer_interrupt(void);
@@ -231,7 +212,7 @@ void smp_flush_tlb_all(void)
231 local_irq_save(flags); 212 local_irq_save(flags);
232 __flush_tlb_all(); 213 __flush_tlb_all();
233 local_irq_restore(flags); 214 local_irq_restore(flags);
234 smp_call_function(flush_tlb_all_ipi, NULL, 1, 1); 215 smp_call_function(flush_tlb_all_ipi, NULL, 1);
235 preempt_enable(); 216 preempt_enable();
236} 217}
237 218
@@ -524,7 +505,7 @@ void smp_invalidate_interrupt(void)
524 *==========================================================================*/ 505 *==========================================================================*/
525void smp_send_stop(void) 506void smp_send_stop(void)
526{ 507{
527 smp_call_function(stop_this_cpu, NULL, 1, 0); 508 smp_call_function(stop_this_cpu, NULL, 0);
528} 509}
529 510
530/*==========================================================================* 511/*==========================================================================*
@@ -565,86 +546,14 @@ static void stop_this_cpu(void *dummy)
565 for ( ; ; ); 546 for ( ; ; );
566} 547}
567 548
568/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ 549void arch_send_call_function_ipi(cpumask_t mask)
569/* Call function Routines */
570/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
571
572/*==========================================================================*
573 * Name: smp_call_function
574 *
575 * Description: This routine sends a 'CALL_FUNCTION_IPI' to all other CPUs
576 * in the system.
577 *
578 * Born on Date: 2002.02.05
579 *
580 * Arguments: *func - The function to run. This must be fast and
581 * non-blocking.
582 * *info - An arbitrary pointer to pass to the function.
583 * nonatomic - currently unused.
584 * wait - If true, wait (atomically) until function has
585 * completed on other CPUs.
586 *
587 * Returns: 0 on success, else a negative status code. Does not return
588 * until remote CPUs are nearly ready to execute <<func>> or
589 * are or have executed.
590 *
591 * Cautions: You must not call this function with disabled interrupts or
592 * from a hardware interrupt handler, you may call it from a
593 * bottom half handler.
594 *
595 * Modification log:
596 * Date Who Description
597 * ---------- --- --------------------------------------------------------
598 *
599 *==========================================================================*/
600int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
601 int wait)
602{ 550{
603 struct call_data_struct data; 551 send_IPI_mask(mask, CALL_FUNCTION_IPI, 0);
604 int cpus; 552}
605
606#ifdef DEBUG_SMP
607 unsigned long flags;
608 __save_flags(flags);
609 if (!(flags & 0x0040)) /* Interrupt Disable NONONO */
610 BUG();
611#endif /* DEBUG_SMP */
612
613 /* Holding any lock stops cpus from going down. */
614 spin_lock(&call_lock);
615 cpus = num_online_cpus() - 1;
616
617 if (!cpus) {
618 spin_unlock(&call_lock);
619 return 0;
620 }
621
622 /* Can deadlock when called with interrupts disabled */
623 WARN_ON(irqs_disabled());
624
625 data.func = func;
626 data.info = info;
627 atomic_set(&data.started, 0);
628 data.wait = wait;
629 if (wait)
630 atomic_set(&data.finished, 0);
631
632 call_data = &data;
633 mb();
634
635 /* Send a message to all other CPUs and wait for them to respond */
636 send_IPI_allbutself(CALL_FUNCTION_IPI, 0);
637
638 /* Wait for response */
639 while (atomic_read(&data.started) != cpus)
640 barrier();
641
642 if (wait)
643 while (atomic_read(&data.finished) != cpus)
644 barrier();
645 spin_unlock(&call_lock);
646 553
647 return 0; 554void arch_send_call_function_single_ipi(int cpu)
555{
556 send_IPI_mask(cpumask_of_cpu(cpu), CALL_FUNC_SINGLE_IPI, 0);
648} 557}
649 558
650/*==========================================================================* 559/*==========================================================================*
@@ -666,27 +575,16 @@ int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
666 *==========================================================================*/ 575 *==========================================================================*/
667void smp_call_function_interrupt(void) 576void smp_call_function_interrupt(void)
668{ 577{
669 void (*func) (void *info) = call_data->func;
670 void *info = call_data->info;
671 int wait = call_data->wait;
672
673 /*
674 * Notify initiating CPU that I've grabbed the data and am
675 * about to execute the function
676 */
677 mb();
678 atomic_inc(&call_data->started);
679 /*
680 * At this point the info structure may be out of scope unless wait==1
681 */
682 irq_enter(); 578 irq_enter();
683 (*func)(info); 579 generic_smp_call_function_interrupt();
684 irq_exit(); 580 irq_exit();
581}
685 582
686 if (wait) { 583void smp_call_function_single_interrupt(void)
687 mb(); 584{
688 atomic_inc(&call_data->finished); 585 irq_enter();
689 } 586 generic_smp_call_function_single_interrupt();
587 irq_exit();
690} 588}
691 589
692/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ 590/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
diff --git a/arch/m32r/kernel/traps.c b/arch/m32r/kernel/traps.c
index 89ba4a0b5d51..46159a4e644b 100644
--- a/arch/m32r/kernel/traps.c
+++ b/arch/m32r/kernel/traps.c
@@ -40,6 +40,7 @@ extern void smp_invalidate_interrupt(void);
40extern void smp_call_function_interrupt(void); 40extern void smp_call_function_interrupt(void);
41extern void smp_ipi_timer_interrupt(void); 41extern void smp_ipi_timer_interrupt(void);
42extern void smp_flush_cache_all_interrupt(void); 42extern void smp_flush_cache_all_interrupt(void);
43extern void smp_call_function_single_interrupt(void);
43 44
44/* 45/*
45 * for Boot AP function 46 * for Boot AP function
@@ -103,7 +104,7 @@ void set_eit_vector_entries(void)
103 eit_vector[186] = (unsigned long)smp_call_function_interrupt; 104 eit_vector[186] = (unsigned long)smp_call_function_interrupt;
104 eit_vector[187] = (unsigned long)smp_ipi_timer_interrupt; 105 eit_vector[187] = (unsigned long)smp_ipi_timer_interrupt;
105 eit_vector[188] = (unsigned long)smp_flush_cache_all_interrupt; 106 eit_vector[188] = (unsigned long)smp_flush_cache_all_interrupt;
106 eit_vector[189] = 0; 107 eit_vector[189] = (unsigned long)smp_call_function_single_interrupt;
107 eit_vector[190] = 0; 108 eit_vector[190] = 0;
108 eit_vector[191] = 0; 109 eit_vector[191] = 0;
109#endif 110#endif
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 24c5dee91768..d21df5f1b1f3 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -181,38 +181,6 @@ config LEMOTE_FULONG
181 Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and 181 Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
182 an FPGA northbridge 182 an FPGA northbridge
183 183
184config MIPS_ATLAS
185 bool "MIPS Atlas board"
186 select BOOT_ELF32
187 select BOOT_RAW
188 select CEVT_R4K
189 select CSRC_R4K
190 select DMA_NONCOHERENT
191 select SYS_HAS_EARLY_PRINTK
192 select IRQ_CPU
193 select HW_HAS_PCI
194 select MIPS_BOARDS_GEN
195 select MIPS_BONITO64
196 select PCI_GT64XXX_PCI0
197 select MIPS_MSC
198 select RM7000_CPU_SCACHE
199 select SWAP_IO_SPACE
200 select SYS_HAS_CPU_MIPS32_R1
201 select SYS_HAS_CPU_MIPS32_R2
202 select SYS_HAS_CPU_MIPS64_R1
203 select SYS_HAS_CPU_NEVADA
204 select SYS_HAS_CPU_RM7000
205 select SYS_SUPPORTS_32BIT_KERNEL
206 select SYS_SUPPORTS_64BIT_KERNEL
207 select SYS_SUPPORTS_BIG_ENDIAN
208 select SYS_SUPPORTS_LITTLE_ENDIAN
209 select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
210 select SYS_SUPPORTS_SMARTMIPS
211 select GENERIC_HARDIRQS_NO__DO_IRQ
212 help
213 This enables support for the MIPS Technologies Atlas evaluation
214 board.
215
216config MIPS_MALTA 184config MIPS_MALTA
217 bool "MIPS Malta board" 185 bool "MIPS Malta board"
218 select ARCH_MAY_HAVE_PC_FDC 186 select ARCH_MAY_HAVE_PC_FDC
@@ -249,26 +217,6 @@ config MIPS_MALTA
249 This enables support for the MIPS Technologies Malta evaluation 217 This enables support for the MIPS Technologies Malta evaluation
250 board. 218 board.
251 219
252config MIPS_SEAD
253 bool "MIPS SEAD board"
254 select CEVT_R4K
255 select CSRC_R4K
256 select IRQ_CPU
257 select DMA_NONCOHERENT
258 select SYS_HAS_EARLY_PRINTK
259 select MIPS_BOARDS_GEN
260 select SYS_HAS_CPU_MIPS32_R1
261 select SYS_HAS_CPU_MIPS32_R2
262 select SYS_HAS_CPU_MIPS64_R1
263 select SYS_SUPPORTS_32BIT_KERNEL
264 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
265 select SYS_SUPPORTS_BIG_ENDIAN
266 select SYS_SUPPORTS_LITTLE_ENDIAN
267 select SYS_SUPPORTS_SMARTMIPS
268 help
269 This enables support for the MIPS Technologies SEAD evaluation
270 board.
271
272config MIPS_SIM 220config MIPS_SIM
273 bool 'MIPS simulator (MIPSsim)' 221 bool 'MIPS simulator (MIPSsim)'
274 select CEVT_R4K 222 select CEVT_R4K
@@ -437,6 +385,8 @@ config SGI_IP28
437 select SGI_HAS_DS1286 385 select SGI_HAS_DS1286
438 select SGI_HAS_I8042 386 select SGI_HAS_I8042
439 select SGI_HAS_INDYDOG 387 select SGI_HAS_INDYDOG
388 select SGI_HAS_HAL2
389 select SGI_HAS_HAL2
440 select SGI_HAS_SEEQ 390 select SGI_HAS_SEEQ
441 select SGI_HAS_WD93 391 select SGI_HAS_WD93
442 select SGI_HAS_ZILOG 392 select SGI_HAS_ZILOG
@@ -602,65 +552,11 @@ config SNI_RM
602 Technology and now in turn merged with Fujitsu. Say Y here to 552 Technology and now in turn merged with Fujitsu. Say Y here to
603 support this machine type. 553 support this machine type.
604 554
605config TOSHIBA_JMR3927 555config MACH_TX39XX
606 bool "Toshiba JMR-TX3927 board" 556 bool "Toshiba TX39 series based machines"
607 select CEVT_TXX9
608 select DMA_NONCOHERENT
609 select HW_HAS_PCI
610 select MIPS_TX3927
611 select IRQ_TXX9
612 select SWAP_IO_SPACE
613 select SYS_HAS_CPU_TX39XX
614 select SYS_SUPPORTS_32BIT_KERNEL
615 select SYS_SUPPORTS_LITTLE_ENDIAN
616 select SYS_SUPPORTS_BIG_ENDIAN
617 select GENERIC_HARDIRQS_NO__DO_IRQ
618 select GPIO_TXX9
619 557
620config TOSHIBA_RBTX4927 558config MACH_TX49XX
621 bool "Toshiba RBTX49[23]7 board" 559 bool "Toshiba TX49 series based machines"
622 select CEVT_R4K
623 select CSRC_R4K
624 select CEVT_TXX9
625 select DMA_NONCOHERENT
626 select HAS_TXX9_SERIAL
627 select HW_HAS_PCI
628 select IRQ_CPU
629 select IRQ_TXX9
630 select I8259 if TOSHIBA_FPCIB0
631 select SWAP_IO_SPACE
632 select SYS_HAS_CPU_TX49XX
633 select SYS_SUPPORTS_32BIT_KERNEL
634 select SYS_SUPPORTS_64BIT_KERNEL
635 select SYS_SUPPORTS_LITTLE_ENDIAN
636 select SYS_SUPPORTS_BIG_ENDIAN
637 select SYS_SUPPORTS_KGDB
638 select GENERIC_HARDIRQS_NO__DO_IRQ
639 help
640 This Toshiba board is based on the TX4927 processor. Say Y here to
641 support this machine type
642
643config TOSHIBA_RBTX4938
644 bool "Toshiba RBTX4938 board"
645 select CEVT_R4K
646 select CSRC_R4K
647 select CEVT_TXX9
648 select DMA_NONCOHERENT
649 select HAS_TXX9_SERIAL
650 select HW_HAS_PCI
651 select IRQ_CPU
652 select IRQ_TXX9
653 select SWAP_IO_SPACE
654 select SYS_HAS_CPU_TX49XX
655 select SYS_SUPPORTS_32BIT_KERNEL
656 select SYS_SUPPORTS_LITTLE_ENDIAN
657 select SYS_SUPPORTS_BIG_ENDIAN
658 select SYS_SUPPORTS_KGDB
659 select GENERIC_HARDIRQS_NO__DO_IRQ
660 select GPIO_TXX9
661 help
662 This Toshiba board is based on the TX4938 processor. Say Y here to
663 support this machine type
664 560
665config WR_PPMC 561config WR_PPMC
666 bool "Wind River PPMC board" 562 bool "Wind River PPMC board"
@@ -694,8 +590,7 @@ source "arch/mips/lasat/Kconfig"
694source "arch/mips/pmc-sierra/Kconfig" 590source "arch/mips/pmc-sierra/Kconfig"
695source "arch/mips/sgi-ip27/Kconfig" 591source "arch/mips/sgi-ip27/Kconfig"
696source "arch/mips/sibyte/Kconfig" 592source "arch/mips/sibyte/Kconfig"
697source "arch/mips/tx4927/Kconfig" 593source "arch/mips/txx9/Kconfig"
698source "arch/mips/tx4938/Kconfig"
699source "arch/mips/vr41xx/Kconfig" 594source "arch/mips/vr41xx/Kconfig"
700 595
701endmenu 596endmenu
@@ -939,10 +834,6 @@ config PCI_GT64XXX_PCI0
939config NO_EXCEPT_FILL 834config NO_EXCEPT_FILL
940 bool 835 bool
941 836
942config MIPS_TX3927
943 bool
944 select HAS_TXX9_SERIAL
945
946config MIPS_RM9122 837config MIPS_RM9122
947 bool 838 bool
948 select SERIAL_RM9000 839 select SERIAL_RM9000
@@ -979,6 +870,9 @@ config SGI_HAS_DS1286
979config SGI_HAS_INDYDOG 870config SGI_HAS_INDYDOG
980 bool 871 bool
981 872
873config SGI_HAS_HAL2
874 bool
875
982config SGI_HAS_SEEQ 876config SGI_HAS_SEEQ
983 bool 877 bool
984 878
@@ -1763,6 +1657,7 @@ config SMP
1763 bool "Multi-Processing support" 1657 bool "Multi-Processing support"
1764 depends on SYS_SUPPORTS_SMP 1658 depends on SYS_SUPPORTS_SMP
1765 select IRQ_PER_CPU 1659 select IRQ_PER_CPU
1660 select USE_GENERIC_SMP_HELPERS
1766 help 1661 help
1767 This enables support for systems with more than one CPU. If you have 1662 This enables support for systems with more than one CPU. If you have
1768 a system with only one CPU, like most personal computers, say N. If 1663 a system with only one CPU, like most personal computers, say N. If
@@ -2064,10 +1959,6 @@ source "fs/Kconfig.binfmt"
2064config TRAD_SIGNALS 1959config TRAD_SIGNALS
2065 bool 1960 bool
2066 1961
2067config BINFMT_IRIX
2068 bool "Include IRIX binary compatibility"
2069 depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
2070
2071config MIPS32_COMPAT 1962config MIPS32_COMPAT
2072 bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 1963 bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2073 depends on 64BIT 1964 depends on 64BIT
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index ad36c946ff96..356453322b49 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -14,7 +14,7 @@
14 14
15KBUILD_DEFCONFIG := ip22_defconfig 15KBUILD_DEFCONFIG := ip22_defconfig
16 16
17cflags-y := 17cflags-y := -ffunction-sections
18 18
19# 19#
20# Select the object file format to substitute into the linker script. 20# Select the object file format to substitute into the linker script.
@@ -305,36 +305,14 @@ load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
305cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote 305cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
306 306
307# 307#
308# For all MIPS, Inc. eval boards
309#
310core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
311
312#
313# MIPS Atlas board
314#
315core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
316cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
317cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
318load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
319all-$(CONFIG_MIPS_ATLAS) := vmlinux.bin
320
321#
322# MIPS Malta board 308# MIPS Malta board
323# 309#
324core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/ 310core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
325cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips 311cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta
326load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 312load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
327all-$(CONFIG_MIPS_MALTA) := vmlinux.bin 313all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
328 314
329# 315#
330# MIPS SEAD board
331#
332core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
333cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
334load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
335all-$(CONFIG_MIPS_SEAD) := vmlinux.srec
336
337#
338# MIPS SIM 316# MIPS SIM
339# 317#
340core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/ 318core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
@@ -377,12 +355,6 @@ core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
377cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx 355cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
378 356
379# 357#
380# NEC VR4133
381#
382core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
383load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
384
385#
386# ZAO Networks Capcella (VR4131) 358# ZAO Networks Capcella (VR4131)
387# 359#
388load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000 360load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
@@ -573,29 +545,30 @@ endif
573all-$(CONFIG_SNI_RM) := vmlinux.ecoff 545all-$(CONFIG_SNI_RM) := vmlinux.ecoff
574 546
575# 547#
548# Common TXx9
549#
550core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
551cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx
552load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
553core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
554cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx
555load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
556
557#
576# Toshiba JMR-TX3927 board 558# Toshiba JMR-TX3927 board
577# 559#
578core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \ 560core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
579 arch/mips/jmr3927/common/
580cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
581load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
582 561
583# 562#
584# Toshiba RBTX4927 board or 563# Toshiba RBTX4927 board or
585# Toshiba RBTX4937 board 564# Toshiba RBTX4937 board
586# 565#
587core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/ 566core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
588core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
589cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
590load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
591 567
592# 568#
593# Toshiba RBTX4938 board 569# Toshiba RBTX4938 board
594# 570#
595core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/ 571core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
596core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
597cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
598load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
599 572
600cflags-y += -Iinclude/asm-mips/mach-generic 573cflags-y += -Iinclude/asm-mips/mach-generic
601drivers-$(CONFIG_PCI) += arch/mips/pci/ 574drivers-$(CONFIG_PCI) += arch/mips/pci/
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 74d6d4a593be..dc8a67efac28 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -11,6 +11,7 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14#include <linux/dma-mapping.h>
14#include <linux/platform_device.h> 15#include <linux/platform_device.h>
15#include <linux/serial_8250.h> 16#include <linux/serial_8250.h>
16#include <linux/init.h> 17#include <linux/init.h>
@@ -77,14 +78,14 @@ static struct resource au1xxx_usb_ohci_resources[] = {
77}; 78};
78 79
79/* The dmamask must be set for OHCI to work */ 80/* The dmamask must be set for OHCI to work */
80static u64 ohci_dmamask = ~(u32)0; 81static u64 ohci_dmamask = DMA_32BIT_MASK;
81 82
82static struct platform_device au1xxx_usb_ohci_device = { 83static struct platform_device au1xxx_usb_ohci_device = {
83 .name = "au1xxx-ohci", 84 .name = "au1xxx-ohci",
84 .id = 0, 85 .id = 0,
85 .dev = { 86 .dev = {
86 .dma_mask = &ohci_dmamask, 87 .dma_mask = &ohci_dmamask,
87 .coherent_dma_mask = 0xffffffff, 88 .coherent_dma_mask = DMA_32BIT_MASK,
88 }, 89 },
89 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources), 90 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
90 .resource = au1xxx_usb_ohci_resources, 91 .resource = au1xxx_usb_ohci_resources,
@@ -106,14 +107,14 @@ static struct resource au1100_lcd_resources[] = {
106 } 107 }
107}; 108};
108 109
109static u64 au1100_lcd_dmamask = ~(u32)0; 110static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
110 111
111static struct platform_device au1100_lcd_device = { 112static struct platform_device au1100_lcd_device = {
112 .name = "au1100-lcd", 113 .name = "au1100-lcd",
113 .id = 0, 114 .id = 0,
114 .dev = { 115 .dev = {
115 .dma_mask = &au1100_lcd_dmamask, 116 .dma_mask = &au1100_lcd_dmamask,
116 .coherent_dma_mask = 0xffffffff, 117 .coherent_dma_mask = DMA_32BIT_MASK,
117 }, 118 },
118 .num_resources = ARRAY_SIZE(au1100_lcd_resources), 119 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
119 .resource = au1100_lcd_resources, 120 .resource = au1100_lcd_resources,
@@ -135,14 +136,14 @@ static struct resource au1xxx_usb_ehci_resources[] = {
135 }, 136 },
136}; 137};
137 138
138static u64 ehci_dmamask = ~(u32)0; 139static u64 ehci_dmamask = DMA_32BIT_MASK;
139 140
140static struct platform_device au1xxx_usb_ehci_device = { 141static struct platform_device au1xxx_usb_ehci_device = {
141 .name = "au1xxx-ehci", 142 .name = "au1xxx-ehci",
142 .id = 0, 143 .id = 0,
143 .dev = { 144 .dev = {
144 .dma_mask = &ehci_dmamask, 145 .dma_mask = &ehci_dmamask,
145 .coherent_dma_mask = 0xffffffff, 146 .coherent_dma_mask = DMA_32BIT_MASK,
146 }, 147 },
147 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources), 148 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
148 .resource = au1xxx_usb_ehci_resources, 149 .resource = au1xxx_usb_ehci_resources,
@@ -180,14 +181,14 @@ static struct resource au1xxx_mmc_resources[] = {
180 } 181 }
181}; 182};
182 183
183static u64 udc_dmamask = ~(u32)0; 184static u64 udc_dmamask = DMA_32BIT_MASK;
184 185
185static struct platform_device au1xxx_usb_gdt_device = { 186static struct platform_device au1xxx_usb_gdt_device = {
186 .name = "au1xxx-udc", 187 .name = "au1xxx-udc",
187 .id = 0, 188 .id = 0,
188 .dev = { 189 .dev = {
189 .dma_mask = &udc_dmamask, 190 .dma_mask = &udc_dmamask,
190 .coherent_dma_mask = 0xffffffff, 191 .coherent_dma_mask = DMA_32BIT_MASK,
191 }, 192 },
192 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources), 193 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
193 .resource = au1xxx_usb_gdt_resources, 194 .resource = au1xxx_usb_gdt_resources,
@@ -207,14 +208,14 @@ static struct resource au1xxx_usb_otg_resources[] = {
207 }, 208 },
208}; 209};
209 210
210static u64 uoc_dmamask = ~(u32)0; 211static u64 uoc_dmamask = DMA_32BIT_MASK;
211 212
212static struct platform_device au1xxx_usb_otg_device = { 213static struct platform_device au1xxx_usb_otg_device = {
213 .name = "au1xxx-uoc", 214 .name = "au1xxx-uoc",
214 .id = 0, 215 .id = 0,
215 .dev = { 216 .dev = {
216 .dma_mask = &uoc_dmamask, 217 .dma_mask = &uoc_dmamask,
217 .coherent_dma_mask = 0xffffffff, 218 .coherent_dma_mask = DMA_32BIT_MASK,
218 }, 219 },
219 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources), 220 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
220 .resource = au1xxx_usb_otg_resources, 221 .resource = au1xxx_usb_otg_resources,
@@ -233,27 +234,27 @@ static struct resource au1200_lcd_resources[] = {
233 } 234 }
234}; 235};
235 236
236static u64 au1200_lcd_dmamask = ~(u32)0; 237static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
237 238
238static struct platform_device au1200_lcd_device = { 239static struct platform_device au1200_lcd_device = {
239 .name = "au1200-lcd", 240 .name = "au1200-lcd",
240 .id = 0, 241 .id = 0,
241 .dev = { 242 .dev = {
242 .dma_mask = &au1200_lcd_dmamask, 243 .dma_mask = &au1200_lcd_dmamask,
243 .coherent_dma_mask = 0xffffffff, 244 .coherent_dma_mask = DMA_32BIT_MASK,
244 }, 245 },
245 .num_resources = ARRAY_SIZE(au1200_lcd_resources), 246 .num_resources = ARRAY_SIZE(au1200_lcd_resources),
246 .resource = au1200_lcd_resources, 247 .resource = au1200_lcd_resources,
247}; 248};
248 249
249static u64 au1xxx_mmc_dmamask = ~(u32)0; 250static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
250 251
251static struct platform_device au1xxx_mmc_device = { 252static struct platform_device au1xxx_mmc_device = {
252 .name = "au1xxx-mmc", 253 .name = "au1xxx-mmc",
253 .id = 0, 254 .id = 0,
254 .dev = { 255 .dev = {
255 .dma_mask = &au1xxx_mmc_dmamask, 256 .dma_mask = &au1xxx_mmc_dmamask,
256 .coherent_dma_mask = 0xffffffff, 257 .coherent_dma_mask = DMA_32BIT_MASK,
257 }, 258 },
258 .num_resources = ARRAY_SIZE(au1xxx_mmc_resources), 259 .num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
259 .resource = au1xxx_mmc_resources, 260 .resource = au1xxx_mmc_resources,
diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/au1000/mtx-1/platform.c
index 9807be37c32f..8b5914d1241f 100644
--- a/arch/mips/au1000/mtx-1/platform.c
+++ b/arch/mips/au1000/mtx-1/platform.c
@@ -24,6 +24,9 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <mtd/mtd-abi.h>
27 30
28static struct gpio_keys_button mtx1_gpio_button[] = { 31static struct gpio_keys_button mtx1_gpio_button[] = {
29 { 32 {
@@ -85,10 +88,56 @@ static struct platform_device mtx1_gpio_leds = {
85 } 88 }
86}; 89};
87 90
91static struct mtd_partition mtx1_mtd_partitions[] = {
92 {
93 .name = "filesystem",
94 .size = 0x01C00000,
95 .offset = 0,
96 },
97 {
98 .name = "yamon",
99 .size = 0x00100000,
100 .offset = MTDPART_OFS_APPEND,
101 .mask_flags = MTD_WRITEABLE,
102 },
103 {
104 .name = "kernel",
105 .size = 0x002c0000,
106 .offset = MTDPART_OFS_APPEND,
107 },
108 {
109 .name = "yamon env",
110 .size = 0x00040000,
111 .offset = MTDPART_OFS_APPEND,
112 },
113};
114
115static struct physmap_flash_data mtx1_flash_data = {
116 .width = 4,
117 .nr_parts = 4,
118 .parts = mtx1_mtd_partitions,
119};
120
121static struct resource mtx1_mtd_resource = {
122 .start = 0x1e000000,
123 .end = 0x1fffffff,
124 .flags = IORESOURCE_MEM,
125};
126
127static struct platform_device mtx1_mtd = {
128 .name = "physmap-flash",
129 .dev = {
130 .platform_data = &mtx1_flash_data,
131 },
132 .num_resources = 1,
133 .resource = &mtx1_mtd_resource,
134};
135
88static struct __initdata platform_device * mtx1_devs[] = { 136static struct __initdata platform_device * mtx1_devs[] = {
89 &mtx1_gpio_leds, 137 &mtx1_gpio_leds,
90 &mtx1_wdt, 138 &mtx1_wdt,
91 &mtx1_button 139 &mtx1_button,
140 &mtx1_mtd,
92}; 141};
93 142
94static int __init mtx1_register_devices(void) 143static int __init mtx1_register_devices(void)
diff --git a/arch/mips/au1000/pb1200/platform.c b/arch/mips/au1000/pb1200/platform.c
index 5930110b9b6d..f8fb0aeac571 100644
--- a/arch/mips/au1000/pb1200/platform.c
+++ b/arch/mips/au1000/pb1200/platform.c
@@ -18,6 +18,7 @@
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */ 19 */
20 20
21#include <linux/dma-mapping.h>
21#include <linux/init.h> 22#include <linux/init.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23 24
@@ -36,14 +37,14 @@ static struct resource ide_resources[] = {
36 } 37 }
37}; 38};
38 39
39static u64 ide_dmamask = ~(u32)0; 40static u64 ide_dmamask = DMA_32BIT_MASK;
40 41
41static struct platform_device ide_device = { 42static struct platform_device ide_device = {
42 .name = "au1200-ide", 43 .name = "au1200-ide",
43 .id = 0, 44 .id = 0,
44 .dev = { 45 .dev = {
45 .dma_mask = &ide_dmamask, 46 .dma_mask = &ide_dmamask,
46 .coherent_dma_mask = 0xffffffff, 47 .coherent_dma_mask = DMA_32BIT_MASK,
47 }, 48 },
48 .num_resources = ARRAY_SIZE(ide_resources), 49 .num_resources = ARRAY_SIZE(ide_resources),
49 .resource = ide_resources 50 .resource = ide_resources
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index d73833b7c781..237926288d6d 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Cobalt micro systems family specific parts of the kernel 2# Makefile for the Cobalt micro systems family specific parts of the kernel
3# 3#
4 4
5obj-y := buttons.o irq.o led.o reset.o rtc.o serial.o setup.o time.o 5obj-y := buttons.o irq.o lcd.o led.o reset.o rtc.o serial.o setup.o time.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8obj-$(CONFIG_EARLY_PRINTK) += console.o 8obj-$(CONFIG_EARLY_PRINTK) += console.o
diff --git a/arch/mips/cobalt/lcd.c b/arch/mips/cobalt/lcd.c
new file mode 100644
index 000000000000..0720e4fae311
--- /dev/null
+++ b/arch/mips/cobalt/lcd.c
@@ -0,0 +1,55 @@
1/*
2 * Registration of Cobalt LCD platform device.
3 *
4 * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24
25static struct resource cobalt_lcd_resource __initdata = {
26 .start = 0x1f000000,
27 .end = 0x1f00001f,
28 .flags = IORESOURCE_MEM,
29};
30
31static __init int cobalt_lcd_add(void)
32{
33 struct platform_device *pdev;
34 int retval;
35
36 pdev = platform_device_alloc("cobalt-lcd", -1);
37 if (!pdev)
38 return -ENOMEM;
39
40 retval = platform_device_add_resources(pdev, &cobalt_lcd_resource, 1);
41 if (retval)
42 goto err_free_device;
43
44 retval = platform_device_add(pdev);
45 if (retval)
46 goto err_free_device;
47
48 return 0;
49
50err_free_device:
51 platform_device_put(pdev);
52
53 return retval;
54}
55device_initcall(cobalt_lcd_add);
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
deleted file mode 100644
index 3443f6cd57bb..000000000000
--- a/arch/mips/configs/atlas_defconfig
+++ /dev/null
@@ -1,1472 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20
4# Sun Feb 18 21:27:35 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_ZONE_DMA=y
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set
26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set
29CONFIG_MIPS_ATLAS=y
30# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MIPS_XXS1500 is not set
36# CONFIG_PNX8550_JBS is not set
37# CONFIG_PNX8550_STB810 is not set
38# CONFIG_MACH_VR41XX is not set
39# CONFIG_PMC_YOSEMITE is not set
40# CONFIG_MARKEINS is not set
41# CONFIG_SGI_IP22 is not set
42# CONFIG_SGI_IP27 is not set
43# CONFIG_SGI_IP32 is not set
44# CONFIG_SIBYTE_BIGSUR is not set
45# CONFIG_SIBYTE_SWARM is not set
46# CONFIG_SIBYTE_SENTOSA is not set
47# CONFIG_SIBYTE_RHONE is not set
48# CONFIG_SIBYTE_CARMEL is not set
49# CONFIG_SIBYTE_LITTLESUR is not set
50# CONFIG_SIBYTE_CRHINE is not set
51# CONFIG_SIBYTE_CRHONE is not set
52# CONFIG_SNI_RM is not set
53# CONFIG_TOSHIBA_JMR3927 is not set
54# CONFIG_TOSHIBA_RBTX4927 is not set
55# CONFIG_TOSHIBA_RBTX4938 is not set
56CONFIG_RWSEM_GENERIC_SPINLOCK=y
57# CONFIG_ARCH_HAS_ILOG2_U32 is not set
58# CONFIG_ARCH_HAS_ILOG2_U64 is not set
59CONFIG_GENERIC_FIND_NEXT_BIT=y
60CONFIG_GENERIC_HWEIGHT=y
61CONFIG_GENERIC_CALIBRATE_DELAY=y
62CONFIG_GENERIC_TIME=y
63CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
64CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
65CONFIG_DMA_NONCOHERENT=y
66CONFIG_DMA_NEED_PCI_MAP_STATE=y
67CONFIG_MIPS_BONITO64=y
68CONFIG_MIPS_MSC=y
69# CONFIG_CPU_BIG_ENDIAN is not set
70CONFIG_CPU_LITTLE_ENDIAN=y
71CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
72CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
73CONFIG_IRQ_CPU=y
74CONFIG_MIPS_BOARDS_GEN=y
75CONFIG_MIPS_GT64120=y
76CONFIG_SWAP_IO_SPACE=y
77CONFIG_BOOT_ELF32=y
78CONFIG_MIPS_L1_CACHE_SHIFT=5
79
80#
81# CPU selection
82#
83CONFIG_CPU_MIPS32_R1=y
84# CONFIG_CPU_MIPS32_R2 is not set
85# CONFIG_CPU_MIPS64_R1 is not set
86# CONFIG_CPU_MIPS64_R2 is not set
87# CONFIG_CPU_R3000 is not set
88# CONFIG_CPU_TX39XX is not set
89# CONFIG_CPU_VR41XX is not set
90# CONFIG_CPU_R4300 is not set
91# CONFIG_CPU_R4X00 is not set
92# CONFIG_CPU_TX49XX is not set
93# CONFIG_CPU_R5000 is not set
94# CONFIG_CPU_R5432 is not set
95# CONFIG_CPU_R6000 is not set
96# CONFIG_CPU_NEVADA is not set
97# CONFIG_CPU_R8000 is not set
98# CONFIG_CPU_R10000 is not set
99# CONFIG_CPU_RM7000 is not set
100# CONFIG_CPU_RM9000 is not set
101# CONFIG_CPU_SB1 is not set
102CONFIG_SYS_HAS_CPU_MIPS32_R1=y
103CONFIG_SYS_HAS_CPU_MIPS32_R2=y
104CONFIG_SYS_HAS_CPU_MIPS64_R1=y
105CONFIG_SYS_HAS_CPU_NEVADA=y
106CONFIG_SYS_HAS_CPU_RM7000=y
107CONFIG_CPU_MIPS32=y
108CONFIG_CPU_MIPSR1=y
109CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
110CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
111CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
112
113#
114# Kernel type
115#
116CONFIG_32BIT=y
117# CONFIG_64BIT is not set
118CONFIG_PAGE_SIZE_4KB=y
119# CONFIG_PAGE_SIZE_8KB is not set
120# CONFIG_PAGE_SIZE_16KB is not set
121# CONFIG_PAGE_SIZE_64KB is not set
122CONFIG_BOARD_SCACHE=y
123CONFIG_RM7000_CPU_SCACHE=y
124CONFIG_CPU_HAS_PREFETCH=y
125CONFIG_MIPS_MT_DISABLED=y
126# CONFIG_MIPS_MT_SMP is not set
127# CONFIG_MIPS_MT_SMTC is not set
128# CONFIG_MIPS_VPE_LOADER is not set
129CONFIG_SYS_SUPPORTS_MULTITHREADING=y
130# CONFIG_64BIT_PHYS_ADDR is not set
131CONFIG_CPU_HAS_LLSC=y
132# CONFIG_CPU_HAS_SMARTMIPS is not set
133CONFIG_CPU_HAS_SYNC=y
134CONFIG_GENERIC_HARDIRQS=y
135CONFIG_GENERIC_IRQ_PROBE=y
136CONFIG_CPU_SUPPORTS_HIGHMEM=y
137CONFIG_SYS_SUPPORTS_SMARTMIPS=y
138CONFIG_ARCH_FLATMEM_ENABLE=y
139CONFIG_SELECT_MEMORY_MODEL=y
140CONFIG_FLATMEM_MANUAL=y
141# CONFIG_DISCONTIGMEM_MANUAL is not set
142# CONFIG_SPARSEMEM_MANUAL is not set
143CONFIG_FLATMEM=y
144CONFIG_FLAT_NODE_MEM_MAP=y
145# CONFIG_SPARSEMEM_STATIC is not set
146CONFIG_SPLIT_PTLOCK_CPUS=4
147# CONFIG_RESOURCES_64BIT is not set
148CONFIG_ZONE_DMA_FLAG=1
149# CONFIG_HZ_48 is not set
150CONFIG_HZ_100=y
151# CONFIG_HZ_128 is not set
152# CONFIG_HZ_250 is not set
153# CONFIG_HZ_256 is not set
154# CONFIG_HZ_1000 is not set
155# CONFIG_HZ_1024 is not set
156CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
157CONFIG_HZ=100
158CONFIG_PREEMPT_NONE=y
159# CONFIG_PREEMPT_VOLUNTARY is not set
160# CONFIG_PREEMPT is not set
161# CONFIG_KEXEC is not set
162CONFIG_LOCKDEP_SUPPORT=y
163CONFIG_STACKTRACE_SUPPORT=y
164CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
165
166#
167# Code maturity level options
168#
169CONFIG_EXPERIMENTAL=y
170CONFIG_BROKEN_ON_SMP=y
171CONFIG_INIT_ENV_ARG_LIMIT=32
172
173#
174# General setup
175#
176CONFIG_LOCALVERSION=""
177CONFIG_LOCALVERSION_AUTO=y
178CONFIG_SWAP=y
179CONFIG_SYSVIPC=y
180# CONFIG_IPC_NS is not set
181CONFIG_SYSVIPC_SYSCTL=y
182# CONFIG_POSIX_MQUEUE is not set
183# CONFIG_BSD_PROCESS_ACCT is not set
184# CONFIG_TASKSTATS is not set
185# CONFIG_UTS_NS is not set
186# CONFIG_AUDIT is not set
187# CONFIG_IKCONFIG is not set
188CONFIG_SYSFS_DEPRECATED=y
189CONFIG_RELAY=y
190# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
191CONFIG_SYSCTL=y
192CONFIG_EMBEDDED=y
193CONFIG_SYSCTL_SYSCALL=y
194CONFIG_KALLSYMS=y
195# CONFIG_KALLSYMS_EXTRA_PASS is not set
196CONFIG_HOTPLUG=y
197CONFIG_PRINTK=y
198CONFIG_BUG=y
199CONFIG_ELF_CORE=y
200CONFIG_BASE_FULL=y
201CONFIG_FUTEX=y
202CONFIG_EPOLL=y
203CONFIG_SHMEM=y
204CONFIG_SLAB=y
205CONFIG_VM_EVENT_COUNTERS=y
206CONFIG_RT_MUTEXES=y
207# CONFIG_TINY_SHMEM is not set
208CONFIG_BASE_SMALL=0
209# CONFIG_SLOB is not set
210
211#
212# Loadable module support
213#
214CONFIG_MODULES=y
215CONFIG_MODULE_UNLOAD=y
216# CONFIG_MODULE_FORCE_UNLOAD is not set
217CONFIG_MODVERSIONS=y
218CONFIG_MODULE_SRCVERSION_ALL=y
219CONFIG_KMOD=y
220
221#
222# Block layer
223#
224CONFIG_BLOCK=y
225# CONFIG_LBD is not set
226# CONFIG_BLK_DEV_IO_TRACE is not set
227# CONFIG_LSF is not set
228
229#
230# IO Schedulers
231#
232CONFIG_IOSCHED_NOOP=y
233CONFIG_IOSCHED_AS=y
234CONFIG_IOSCHED_DEADLINE=y
235CONFIG_IOSCHED_CFQ=y
236CONFIG_DEFAULT_AS=y
237# CONFIG_DEFAULT_DEADLINE is not set
238# CONFIG_DEFAULT_CFQ is not set
239# CONFIG_DEFAULT_NOOP is not set
240CONFIG_DEFAULT_IOSCHED="anticipatory"
241
242#
243# Bus options (PCI, PCMCIA, EISA, ISA, TC)
244#
245CONFIG_HW_HAS_PCI=y
246CONFIG_PCI=y
247CONFIG_MMU=y
248
249#
250# PCCARD (PCMCIA/CardBus) support
251#
252# CONFIG_PCCARD is not set
253
254#
255# PCI Hotplug Support
256#
257# CONFIG_HOTPLUG_PCI is not set
258
259#
260# Executable file formats
261#
262CONFIG_BINFMT_ELF=y
263# CONFIG_BINFMT_MISC is not set
264CONFIG_TRAD_SIGNALS=y
265
266#
267# Power management options
268#
269CONFIG_PM=y
270# CONFIG_PM_LEGACY is not set
271# CONFIG_PM_DEBUG is not set
272# CONFIG_PM_SYSFS_DEPRECATED is not set
273
274#
275# Networking
276#
277CONFIG_NET=y
278
279#
280# Networking options
281#
282# CONFIG_NETDEBUG is not set
283CONFIG_PACKET=y
284CONFIG_PACKET_MMAP=y
285CONFIG_UNIX=y
286CONFIG_XFRM=y
287CONFIG_XFRM_USER=m
288# CONFIG_XFRM_SUB_POLICY is not set
289CONFIG_XFRM_MIGRATE=y
290CONFIG_NET_KEY=y
291CONFIG_NET_KEY_MIGRATE=y
292CONFIG_INET=y
293CONFIG_IP_MULTICAST=y
294CONFIG_IP_ADVANCED_ROUTER=y
295CONFIG_ASK_IP_FIB_HASH=y
296# CONFIG_IP_FIB_TRIE is not set
297CONFIG_IP_FIB_HASH=y
298CONFIG_IP_MULTIPLE_TABLES=y
299CONFIG_IP_ROUTE_MULTIPATH=y
300# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
301CONFIG_IP_ROUTE_VERBOSE=y
302CONFIG_IP_PNP=y
303CONFIG_IP_PNP_DHCP=y
304CONFIG_IP_PNP_BOOTP=y
305# CONFIG_IP_PNP_RARP is not set
306CONFIG_NET_IPIP=m
307CONFIG_NET_IPGRE=m
308CONFIG_NET_IPGRE_BROADCAST=y
309CONFIG_IP_MROUTE=y
310CONFIG_IP_PIMSM_V1=y
311CONFIG_IP_PIMSM_V2=y
312# CONFIG_ARPD is not set
313CONFIG_SYN_COOKIES=y
314CONFIG_INET_AH=m
315CONFIG_INET_ESP=m
316CONFIG_INET_IPCOMP=m
317CONFIG_INET_XFRM_TUNNEL=m
318CONFIG_INET_TUNNEL=m
319CONFIG_INET_XFRM_MODE_TRANSPORT=m
320CONFIG_INET_XFRM_MODE_TUNNEL=m
321CONFIG_INET_XFRM_MODE_BEET=m
322CONFIG_INET_DIAG=y
323CONFIG_INET_TCP_DIAG=y
324# CONFIG_TCP_CONG_ADVANCED is not set
325CONFIG_TCP_CONG_CUBIC=y
326CONFIG_DEFAULT_TCP_CONG="cubic"
327CONFIG_TCP_MD5SIG=y
328
329#
330# IP: Virtual Server Configuration
331#
332CONFIG_IP_VS=m
333# CONFIG_IP_VS_DEBUG is not set
334CONFIG_IP_VS_TAB_BITS=12
335
336#
337# IPVS transport protocol load balancing support
338#
339CONFIG_IP_VS_PROTO_TCP=y
340CONFIG_IP_VS_PROTO_UDP=y
341CONFIG_IP_VS_PROTO_ESP=y
342CONFIG_IP_VS_PROTO_AH=y
343
344#
345# IPVS scheduler
346#
347CONFIG_IP_VS_RR=m
348CONFIG_IP_VS_WRR=m
349CONFIG_IP_VS_LC=m
350CONFIG_IP_VS_WLC=m
351CONFIG_IP_VS_LBLC=m
352CONFIG_IP_VS_LBLCR=m
353CONFIG_IP_VS_DH=m
354CONFIG_IP_VS_SH=m
355CONFIG_IP_VS_SED=m
356CONFIG_IP_VS_NQ=m
357
358#
359# IPVS application helper
360#
361CONFIG_IP_VS_FTP=m
362CONFIG_IPV6=m
363CONFIG_IPV6_PRIVACY=y
364CONFIG_IPV6_ROUTER_PREF=y
365CONFIG_IPV6_ROUTE_INFO=y
366CONFIG_INET6_AH=m
367CONFIG_INET6_ESP=m
368CONFIG_INET6_IPCOMP=m
369CONFIG_IPV6_MIP6=y
370CONFIG_INET6_XFRM_TUNNEL=m
371CONFIG_INET6_TUNNEL=m
372CONFIG_INET6_XFRM_MODE_TRANSPORT=m
373CONFIG_INET6_XFRM_MODE_TUNNEL=m
374CONFIG_INET6_XFRM_MODE_BEET=m
375CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
376CONFIG_IPV6_SIT=m
377CONFIG_IPV6_TUNNEL=m
378CONFIG_IPV6_MULTIPLE_TABLES=y
379CONFIG_IPV6_SUBTREES=y
380CONFIG_NETWORK_SECMARK=y
381CONFIG_NETFILTER=y
382# CONFIG_NETFILTER_DEBUG is not set
383CONFIG_BRIDGE_NETFILTER=y
384
385#
386# Core Netfilter Configuration
387#
388CONFIG_NETFILTER_NETLINK=m
389CONFIG_NETFILTER_NETLINK_QUEUE=m
390CONFIG_NETFILTER_NETLINK_LOG=m
391CONFIG_NF_CONNTRACK_ENABLED=m
392CONFIG_NF_CONNTRACK_SUPPORT=y
393# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
394CONFIG_NF_CONNTRACK=m
395CONFIG_NF_CT_ACCT=y
396CONFIG_NF_CONNTRACK_MARK=y
397CONFIG_NF_CONNTRACK_SECMARK=y
398CONFIG_NF_CONNTRACK_EVENTS=y
399CONFIG_NF_CT_PROTO_GRE=m
400CONFIG_NF_CT_PROTO_SCTP=m
401CONFIG_NF_CONNTRACK_AMANDA=m
402CONFIG_NF_CONNTRACK_FTP=m
403CONFIG_NF_CONNTRACK_H323=m
404CONFIG_NF_CONNTRACK_IRC=m
405# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
406CONFIG_NF_CONNTRACK_PPTP=m
407CONFIG_NF_CONNTRACK_SANE=m
408CONFIG_NF_CONNTRACK_SIP=m
409CONFIG_NF_CONNTRACK_TFTP=m
410CONFIG_NF_CT_NETLINK=m
411CONFIG_NETFILTER_XTABLES=m
412CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
413CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
414CONFIG_NETFILTER_XT_TARGET_DSCP=m
415CONFIG_NETFILTER_XT_TARGET_MARK=m
416CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
417CONFIG_NETFILTER_XT_TARGET_NFLOG=m
418CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
419CONFIG_NETFILTER_XT_TARGET_SECMARK=m
420CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
421CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
422CONFIG_NETFILTER_XT_MATCH_COMMENT=m
423CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
424CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
425CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
426CONFIG_NETFILTER_XT_MATCH_DCCP=m
427CONFIG_NETFILTER_XT_MATCH_DSCP=m
428CONFIG_NETFILTER_XT_MATCH_ESP=m
429CONFIG_NETFILTER_XT_MATCH_HELPER=m
430CONFIG_NETFILTER_XT_MATCH_LENGTH=m
431CONFIG_NETFILTER_XT_MATCH_LIMIT=m
432CONFIG_NETFILTER_XT_MATCH_MAC=m
433CONFIG_NETFILTER_XT_MATCH_MARK=m
434CONFIG_NETFILTER_XT_MATCH_POLICY=m
435CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
436CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
437CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
438CONFIG_NETFILTER_XT_MATCH_QUOTA=m
439CONFIG_NETFILTER_XT_MATCH_REALM=m
440CONFIG_NETFILTER_XT_MATCH_SCTP=m
441CONFIG_NETFILTER_XT_MATCH_STATE=m
442CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
443CONFIG_NETFILTER_XT_MATCH_STRING=m
444CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
445CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
446
447#
448# IP: Netfilter Configuration
449#
450CONFIG_NF_CONNTRACK_IPV4=m
451CONFIG_NF_CONNTRACK_PROC_COMPAT=y
452CONFIG_IP_NF_QUEUE=m
453CONFIG_IP_NF_IPTABLES=m
454CONFIG_IP_NF_MATCH_IPRANGE=m
455CONFIG_IP_NF_MATCH_TOS=m
456CONFIG_IP_NF_MATCH_RECENT=m
457CONFIG_IP_NF_MATCH_ECN=m
458CONFIG_IP_NF_MATCH_AH=m
459CONFIG_IP_NF_MATCH_TTL=m
460CONFIG_IP_NF_MATCH_OWNER=m
461CONFIG_IP_NF_MATCH_ADDRTYPE=m
462CONFIG_IP_NF_FILTER=m
463CONFIG_IP_NF_TARGET_REJECT=m
464CONFIG_IP_NF_TARGET_LOG=m
465CONFIG_IP_NF_TARGET_ULOG=m
466CONFIG_NF_NAT=m
467CONFIG_NF_NAT_NEEDED=y
468CONFIG_IP_NF_TARGET_MASQUERADE=m
469CONFIG_IP_NF_TARGET_REDIRECT=m
470CONFIG_IP_NF_TARGET_NETMAP=m
471CONFIG_IP_NF_TARGET_SAME=m
472CONFIG_NF_NAT_SNMP_BASIC=m
473CONFIG_NF_NAT_PROTO_GRE=m
474CONFIG_NF_NAT_FTP=m
475CONFIG_NF_NAT_IRC=m
476CONFIG_NF_NAT_TFTP=m
477CONFIG_NF_NAT_AMANDA=m
478CONFIG_NF_NAT_PPTP=m
479CONFIG_NF_NAT_H323=m
480CONFIG_NF_NAT_SIP=m
481CONFIG_IP_NF_MANGLE=m
482CONFIG_IP_NF_TARGET_TOS=m
483CONFIG_IP_NF_TARGET_ECN=m
484CONFIG_IP_NF_TARGET_TTL=m
485# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
486CONFIG_IP_NF_RAW=m
487CONFIG_IP_NF_ARPTABLES=m
488CONFIG_IP_NF_ARPFILTER=m
489CONFIG_IP_NF_ARP_MANGLE=m
490
491#
492# IPv6: Netfilter Configuration (EXPERIMENTAL)
493#
494CONFIG_NF_CONNTRACK_IPV6=m
495CONFIG_IP6_NF_QUEUE=m
496CONFIG_IP6_NF_IPTABLES=m
497CONFIG_IP6_NF_MATCH_RT=m
498CONFIG_IP6_NF_MATCH_OPTS=m
499CONFIG_IP6_NF_MATCH_FRAG=m
500CONFIG_IP6_NF_MATCH_HL=m
501CONFIG_IP6_NF_MATCH_OWNER=m
502CONFIG_IP6_NF_MATCH_IPV6HEADER=m
503CONFIG_IP6_NF_MATCH_AH=m
504CONFIG_IP6_NF_MATCH_MH=m
505CONFIG_IP6_NF_MATCH_EUI64=m
506CONFIG_IP6_NF_FILTER=m
507CONFIG_IP6_NF_TARGET_LOG=m
508CONFIG_IP6_NF_TARGET_REJECT=m
509CONFIG_IP6_NF_MANGLE=m
510CONFIG_IP6_NF_TARGET_HL=m
511CONFIG_IP6_NF_RAW=m
512
513#
514# Bridge: Netfilter Configuration
515#
516CONFIG_BRIDGE_NF_EBTABLES=m
517CONFIG_BRIDGE_EBT_BROUTE=m
518CONFIG_BRIDGE_EBT_T_FILTER=m
519CONFIG_BRIDGE_EBT_T_NAT=m
520CONFIG_BRIDGE_EBT_802_3=m
521CONFIG_BRIDGE_EBT_AMONG=m
522CONFIG_BRIDGE_EBT_ARP=m
523CONFIG_BRIDGE_EBT_IP=m
524CONFIG_BRIDGE_EBT_LIMIT=m
525CONFIG_BRIDGE_EBT_MARK=m
526CONFIG_BRIDGE_EBT_PKTTYPE=m
527CONFIG_BRIDGE_EBT_STP=m
528CONFIG_BRIDGE_EBT_VLAN=m
529CONFIG_BRIDGE_EBT_ARPREPLY=m
530CONFIG_BRIDGE_EBT_DNAT=m
531CONFIG_BRIDGE_EBT_MARK_T=m
532CONFIG_BRIDGE_EBT_REDIRECT=m
533CONFIG_BRIDGE_EBT_SNAT=m
534CONFIG_BRIDGE_EBT_LOG=m
535CONFIG_BRIDGE_EBT_ULOG=m
536
537#
538# DCCP Configuration (EXPERIMENTAL)
539#
540# CONFIG_IP_DCCP is not set
541
542#
543# SCTP Configuration (EXPERIMENTAL)
544#
545CONFIG_IP_SCTP=m
546# CONFIG_SCTP_DBG_MSG is not set
547# CONFIG_SCTP_DBG_OBJCNT is not set
548# CONFIG_SCTP_HMAC_NONE is not set
549# CONFIG_SCTP_HMAC_SHA1 is not set
550CONFIG_SCTP_HMAC_MD5=y
551
552#
553# TIPC Configuration (EXPERIMENTAL)
554#
555# CONFIG_TIPC is not set
556# CONFIG_ATM is not set
557CONFIG_BRIDGE=m
558CONFIG_VLAN_8021Q=m
559# CONFIG_DECNET is not set
560CONFIG_LLC=m
561# CONFIG_LLC2 is not set
562# CONFIG_IPX is not set
563CONFIG_ATALK=m
564CONFIG_DEV_APPLETALK=m
565CONFIG_IPDDP=m
566CONFIG_IPDDP_ENCAP=y
567CONFIG_IPDDP_DECAP=y
568# CONFIG_X25 is not set
569# CONFIG_LAPB is not set
570# CONFIG_ECONET is not set
571# CONFIG_WAN_ROUTER is not set
572
573#
574# QoS and/or fair queueing
575#
576CONFIG_NET_SCHED=y
577CONFIG_NET_SCH_FIFO=y
578CONFIG_NET_SCH_CLK_JIFFIES=y
579# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
580# CONFIG_NET_SCH_CLK_CPU is not set
581
582#
583# Queueing/Scheduling
584#
585CONFIG_NET_SCH_CBQ=m
586CONFIG_NET_SCH_HTB=m
587CONFIG_NET_SCH_HFSC=m
588CONFIG_NET_SCH_PRIO=m
589CONFIG_NET_SCH_RED=m
590CONFIG_NET_SCH_SFQ=m
591CONFIG_NET_SCH_TEQL=m
592CONFIG_NET_SCH_TBF=m
593CONFIG_NET_SCH_GRED=m
594CONFIG_NET_SCH_DSMARK=m
595CONFIG_NET_SCH_NETEM=m
596CONFIG_NET_SCH_INGRESS=m
597
598#
599# Classification
600#
601CONFIG_NET_CLS=y
602CONFIG_NET_CLS_BASIC=m
603CONFIG_NET_CLS_TCINDEX=m
604CONFIG_NET_CLS_ROUTE4=m
605CONFIG_NET_CLS_ROUTE=y
606CONFIG_NET_CLS_FW=m
607CONFIG_NET_CLS_U32=m
608# CONFIG_CLS_U32_PERF is not set
609# CONFIG_CLS_U32_MARK is not set
610CONFIG_NET_CLS_RSVP=m
611CONFIG_NET_CLS_RSVP6=m
612# CONFIG_NET_EMATCH is not set
613# CONFIG_NET_CLS_ACT is not set
614CONFIG_NET_CLS_POLICE=y
615CONFIG_NET_CLS_IND=y
616CONFIG_NET_ESTIMATOR=y
617
618#
619# Network testing
620#
621# CONFIG_NET_PKTGEN is not set
622# CONFIG_HAMRADIO is not set
623# CONFIG_IRDA is not set
624# CONFIG_BT is not set
625CONFIG_IEEE80211=m
626# CONFIG_IEEE80211_DEBUG is not set
627CONFIG_IEEE80211_CRYPT_WEP=m
628CONFIG_IEEE80211_CRYPT_CCMP=m
629CONFIG_IEEE80211_SOFTMAC=m
630# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
631CONFIG_WIRELESS_EXT=y
632CONFIG_FIB_RULES=y
633
634#
635# Device Drivers
636#
637
638#
639# Generic Driver Options
640#
641CONFIG_STANDALONE=y
642CONFIG_PREVENT_FIRMWARE_BUILD=y
643CONFIG_FW_LOADER=y
644# CONFIG_SYS_HYPERVISOR is not set
645
646#
647# Connector - unified userspace <-> kernelspace linker
648#
649CONFIG_CONNECTOR=m
650
651#
652# Memory Technology Devices (MTD)
653#
654# CONFIG_MTD is not set
655
656#
657# Parallel port support
658#
659# CONFIG_PARPORT is not set
660
661#
662# Plug and Play support
663#
664
665#
666# Block devices
667#
668# CONFIG_BLK_CPQ_DA is not set
669# CONFIG_BLK_CPQ_CISS_DA is not set
670# CONFIG_BLK_DEV_DAC960 is not set
671CONFIG_BLK_DEV_UMEM=m
672# CONFIG_BLK_DEV_COW_COMMON is not set
673CONFIG_BLK_DEV_LOOP=m
674CONFIG_BLK_DEV_CRYPTOLOOP=m
675CONFIG_BLK_DEV_NBD=m
676# CONFIG_BLK_DEV_SX8 is not set
677CONFIG_BLK_DEV_RAM=y
678CONFIG_BLK_DEV_RAM_COUNT=16
679CONFIG_BLK_DEV_RAM_SIZE=4096
680CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
681# CONFIG_BLK_DEV_INITRD is not set
682CONFIG_CDROM_PKTCDVD=m
683CONFIG_CDROM_PKTCDVD_BUFFERS=8
684# CONFIG_CDROM_PKTCDVD_WCACHE is not set
685CONFIG_ATA_OVER_ETH=m
686
687#
688# Misc devices
689#
690CONFIG_SGI_IOC4=m
691# CONFIG_TIFM_CORE is not set
692
693#
694# ATA/ATAPI/MFM/RLL support
695#
696CONFIG_IDE=y
697CONFIG_IDE_MAX_HWIFS=4
698CONFIG_BLK_DEV_IDE=y
699
700#
701# Please see Documentation/ide.txt for help/info on IDE drives
702#
703# CONFIG_BLK_DEV_IDE_SATA is not set
704CONFIG_BLK_DEV_IDEDISK=y
705# CONFIG_IDEDISK_MULTI_MODE is not set
706CONFIG_BLK_DEV_IDECD=y
707# CONFIG_BLK_DEV_IDETAPE is not set
708# CONFIG_BLK_DEV_IDEFLOPPY is not set
709# CONFIG_BLK_DEV_IDESCSI is not set
710# CONFIG_IDE_TASK_IOCTL is not set
711
712#
713# IDE chipset support/bugfixes
714#
715CONFIG_IDE_GENERIC=y
716# CONFIG_BLK_DEV_IDEPCI is not set
717# CONFIG_IDE_ARM is not set
718# CONFIG_BLK_DEV_IDEDMA is not set
719# CONFIG_IDEDMA_AUTO is not set
720# CONFIG_BLK_DEV_HD is not set
721
722#
723# SCSI device support
724#
725CONFIG_RAID_ATTRS=m
726CONFIG_SCSI=y
727CONFIG_SCSI_TGT=m
728CONFIG_SCSI_NETLINK=y
729CONFIG_SCSI_PROC_FS=y
730
731#
732# SCSI support type (disk, tape, CD-ROM)
733#
734CONFIG_BLK_DEV_SD=y
735CONFIG_CHR_DEV_ST=m
736CONFIG_CHR_DEV_OSST=m
737CONFIG_BLK_DEV_SR=m
738CONFIG_BLK_DEV_SR_VENDOR=y
739CONFIG_CHR_DEV_SG=m
740CONFIG_CHR_DEV_SCH=m
741
742#
743# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
744#
745CONFIG_SCSI_MULTI_LUN=y
746CONFIG_SCSI_CONSTANTS=y
747CONFIG_SCSI_LOGGING=y
748CONFIG_SCSI_SCAN_ASYNC=y
749
750#
751# SCSI Transports
752#
753CONFIG_SCSI_SPI_ATTRS=y
754CONFIG_SCSI_FC_ATTRS=y
755CONFIG_SCSI_ISCSI_ATTRS=m
756CONFIG_SCSI_SAS_ATTRS=m
757CONFIG_SCSI_SAS_LIBSAS=m
758CONFIG_SCSI_SAS_LIBSAS_DEBUG=y
759
760#
761# SCSI low-level drivers
762#
763CONFIG_ISCSI_TCP=m
764# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
765# CONFIG_SCSI_3W_9XXX is not set
766# CONFIG_SCSI_ACARD is not set
767# CONFIG_SCSI_AACRAID is not set
768# CONFIG_SCSI_AIC7XXX is not set
769# CONFIG_SCSI_AIC7XXX_OLD is not set
770# CONFIG_SCSI_AIC79XX is not set
771CONFIG_SCSI_AIC94XX=m
772# CONFIG_AIC94XX_DEBUG is not set
773# CONFIG_SCSI_DPT_I2O is not set
774# CONFIG_SCSI_ARCMSR is not set
775# CONFIG_MEGARAID_NEWGEN is not set
776# CONFIG_MEGARAID_LEGACY is not set
777# CONFIG_MEGARAID_SAS is not set
778# CONFIG_SCSI_HPTIOP is not set
779# CONFIG_SCSI_DMX3191D is not set
780# CONFIG_SCSI_FUTURE_DOMAIN is not set
781# CONFIG_SCSI_IPS is not set
782# CONFIG_SCSI_INITIO is not set
783# CONFIG_SCSI_INIA100 is not set
784# CONFIG_SCSI_STEX is not set
785CONFIG_SCSI_SYM53C8XX_2=y
786CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
787CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
788CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
789CONFIG_SCSI_SYM53C8XX_MMIO=y
790# CONFIG_SCSI_QLOGIC_1280 is not set
791# CONFIG_SCSI_QLA_FC is not set
792# CONFIG_SCSI_QLA_ISCSI is not set
793# CONFIG_SCSI_LPFC is not set
794# CONFIG_SCSI_DC395x is not set
795# CONFIG_SCSI_DC390T is not set
796# CONFIG_SCSI_NSP32 is not set
797# CONFIG_SCSI_DEBUG is not set
798# CONFIG_SCSI_SRP is not set
799
800#
801# Serial ATA (prod) and Parallel ATA (experimental) drivers
802#
803# CONFIG_ATA is not set
804
805#
806# Multi-device support (RAID and LVM)
807#
808CONFIG_MD=y
809CONFIG_BLK_DEV_MD=m
810CONFIG_MD_LINEAR=m
811CONFIG_MD_RAID0=m
812CONFIG_MD_RAID1=m
813CONFIG_MD_RAID10=m
814CONFIG_MD_RAID456=m
815CONFIG_MD_RAID5_RESHAPE=y
816CONFIG_MD_MULTIPATH=m
817CONFIG_MD_FAULTY=m
818CONFIG_BLK_DEV_DM=m
819# CONFIG_DM_DEBUG is not set
820CONFIG_DM_CRYPT=m
821CONFIG_DM_SNAPSHOT=m
822CONFIG_DM_MIRROR=m
823CONFIG_DM_ZERO=m
824CONFIG_DM_MULTIPATH=m
825CONFIG_DM_MULTIPATH_EMC=m
826
827#
828# Fusion MPT device support
829#
830# CONFIG_FUSION is not set
831# CONFIG_FUSION_SPI is not set
832# CONFIG_FUSION_FC is not set
833# CONFIG_FUSION_SAS is not set
834
835#
836# IEEE 1394 (FireWire) support
837#
838# CONFIG_IEEE1394 is not set
839
840#
841# I2O device support
842#
843# CONFIG_I2O is not set
844
845#
846# Network device support
847#
848CONFIG_NETDEVICES=y
849CONFIG_DUMMY=m
850CONFIG_BONDING=m
851CONFIG_EQUALIZER=m
852CONFIG_TUN=m
853
854#
855# ARCnet devices
856#
857# CONFIG_ARCNET is not set
858
859#
860# PHY device support
861#
862CONFIG_PHYLIB=m
863
864#
865# MII PHY device drivers
866#
867CONFIG_MARVELL_PHY=m
868CONFIG_DAVICOM_PHY=m
869CONFIG_QSEMI_PHY=m
870CONFIG_LXT_PHY=m
871CONFIG_CICADA_PHY=m
872CONFIG_VITESSE_PHY=m
873CONFIG_SMSC_PHY=m
874# CONFIG_BROADCOM_PHY is not set
875# CONFIG_FIXED_PHY is not set
876
877#
878# Ethernet (10 or 100Mbit)
879#
880CONFIG_NET_ETHERNET=y
881CONFIG_MII=y
882# CONFIG_HAPPYMEAL is not set
883# CONFIG_SUNGEM is not set
884# CONFIG_CASSINI is not set
885# CONFIG_NET_VENDOR_3COM is not set
886# CONFIG_DM9000 is not set
887
888#
889# Tulip family network device support
890#
891# CONFIG_NET_TULIP is not set
892# CONFIG_HP100 is not set
893CONFIG_NET_PCI=y
894CONFIG_PCNET32=y
895# CONFIG_PCNET32_NAPI is not set
896# CONFIG_AMD8111_ETH is not set
897# CONFIG_ADAPTEC_STARFIRE is not set
898# CONFIG_B44 is not set
899# CONFIG_FORCEDETH is not set
900# CONFIG_DGRS is not set
901# CONFIG_EEPRO100 is not set
902# CONFIG_E100 is not set
903# CONFIG_FEALNX is not set
904# CONFIG_NATSEMI is not set
905# CONFIG_NE2K_PCI is not set
906# CONFIG_8139CP is not set
907# CONFIG_8139TOO is not set
908# CONFIG_SIS900 is not set
909# CONFIG_EPIC100 is not set
910# CONFIG_SUNDANCE is not set
911# CONFIG_TLAN is not set
912# CONFIG_VIA_RHINE is not set
913CONFIG_LAN_SAA9730=y
914# CONFIG_SC92031 is not set
915
916#
917# Ethernet (1000 Mbit)
918#
919# CONFIG_ACENIC is not set
920# CONFIG_DL2K is not set
921# CONFIG_E1000 is not set
922# CONFIG_NS83820 is not set
923# CONFIG_HAMACHI is not set
924# CONFIG_YELLOWFIN is not set
925# CONFIG_R8169 is not set
926# CONFIG_SIS190 is not set
927# CONFIG_SKGE is not set
928# CONFIG_SKY2 is not set
929# CONFIG_SK98LIN is not set
930# CONFIG_VIA_VELOCITY is not set
931# CONFIG_TIGON3 is not set
932# CONFIG_BNX2 is not set
933CONFIG_QLA3XXX=m
934# CONFIG_ATL1 is not set
935
936#
937# Ethernet (10000 Mbit)
938#
939# CONFIG_CHELSIO_T1 is not set
940CONFIG_CHELSIO_T3=m
941# CONFIG_IXGB is not set
942# CONFIG_S2IO is not set
943# CONFIG_MYRI10GE is not set
944CONFIG_NETXEN_NIC=m
945
946#
947# Token Ring devices
948#
949# CONFIG_TR is not set
950
951#
952# Wireless LAN (non-hamradio)
953#
954# CONFIG_NET_RADIO is not set
955
956#
957# Wan interfaces
958#
959# CONFIG_WAN is not set
960# CONFIG_FDDI is not set
961# CONFIG_HIPPI is not set
962# CONFIG_PPP is not set
963# CONFIG_SLIP is not set
964# CONFIG_NET_FC is not set
965# CONFIG_SHAPER is not set
966# CONFIG_NETCONSOLE is not set
967# CONFIG_NETPOLL is not set
968# CONFIG_NET_POLL_CONTROLLER is not set
969
970#
971# ISDN subsystem
972#
973# CONFIG_ISDN is not set
974
975#
976# Telephony Support
977#
978# CONFIG_PHONE is not set
979
980#
981# Input device support
982#
983CONFIG_INPUT=y
984# CONFIG_INPUT_FF_MEMLESS is not set
985
986#
987# Userland interfaces
988#
989CONFIG_INPUT_MOUSEDEV=m
990CONFIG_INPUT_MOUSEDEV_PSAUX=y
991CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
992CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
993# CONFIG_INPUT_JOYDEV is not set
994# CONFIG_INPUT_TSDEV is not set
995# CONFIG_INPUT_EVDEV is not set
996# CONFIG_INPUT_EVBUG is not set
997
998#
999# Input Device Drivers
1000#
1001# CONFIG_INPUT_KEYBOARD is not set
1002CONFIG_INPUT_MOUSE=y
1003# CONFIG_MOUSE_PS2 is not set
1004CONFIG_MOUSE_SERIAL=m
1005# CONFIG_MOUSE_VSXXXAA is not set
1006# CONFIG_INPUT_JOYSTICK is not set
1007# CONFIG_INPUT_TOUCHSCREEN is not set
1008# CONFIG_INPUT_MISC is not set
1009
1010#
1011# Hardware I/O ports
1012#
1013CONFIG_SERIO=y
1014# CONFIG_SERIO_I8042 is not set
1015CONFIG_SERIO_SERPORT=y
1016# CONFIG_SERIO_PCIPS2 is not set
1017CONFIG_SERIO_LIBPS2=y
1018CONFIG_SERIO_RAW=y
1019# CONFIG_GAMEPORT is not set
1020
1021#
1022# Character devices
1023#
1024CONFIG_VT=y
1025CONFIG_VT_CONSOLE=y
1026CONFIG_HW_CONSOLE=y
1027CONFIG_VT_HW_CONSOLE_BINDING=y
1028# CONFIG_SERIAL_NONSTANDARD is not set
1029
1030#
1031# Serial drivers
1032#
1033CONFIG_SERIAL_8250=y
1034CONFIG_SERIAL_8250_CONSOLE=y
1035CONFIG_SERIAL_8250_PCI=m
1036CONFIG_SERIAL_8250_NR_UARTS=4
1037CONFIG_SERIAL_8250_RUNTIME_UARTS=4
1038# CONFIG_SERIAL_8250_EXTENDED is not set
1039
1040#
1041# Non-8250 serial port support
1042#
1043CONFIG_SERIAL_CORE=y
1044CONFIG_SERIAL_CORE_CONSOLE=y
1045# CONFIG_SERIAL_JSM is not set
1046CONFIG_UNIX98_PTYS=y
1047CONFIG_LEGACY_PTYS=y
1048CONFIG_LEGACY_PTY_COUNT=256
1049
1050#
1051# IPMI
1052#
1053# CONFIG_IPMI_HANDLER is not set
1054
1055#
1056# Watchdog Cards
1057#
1058# CONFIG_WATCHDOG is not set
1059# CONFIG_HW_RANDOM is not set
1060# CONFIG_RTC is not set
1061# CONFIG_GEN_RTC is not set
1062# CONFIG_DTLK is not set
1063# CONFIG_R3964 is not set
1064# CONFIG_APPLICOM is not set
1065# CONFIG_DRM is not set
1066# CONFIG_RAW_DRIVER is not set
1067
1068#
1069# TPM devices
1070#
1071# CONFIG_TCG_TPM is not set
1072
1073#
1074# I2C support
1075#
1076# CONFIG_I2C is not set
1077
1078#
1079# SPI support
1080#
1081# CONFIG_SPI is not set
1082# CONFIG_SPI_MASTER is not set
1083
1084#
1085# Dallas's 1-wire bus
1086#
1087# CONFIG_W1 is not set
1088
1089#
1090# Hardware Monitoring support
1091#
1092# CONFIG_HWMON is not set
1093# CONFIG_HWMON_VID is not set
1094
1095#
1096# Multimedia devices
1097#
1098# CONFIG_VIDEO_DEV is not set
1099
1100#
1101# Digital Video Broadcasting Devices
1102#
1103# CONFIG_DVB is not set
1104
1105#
1106# Graphics support
1107#
1108# CONFIG_FIRMWARE_EDID is not set
1109# CONFIG_FB is not set
1110
1111#
1112# Console display driver support
1113#
1114# CONFIG_VGA_CONSOLE is not set
1115CONFIG_DUMMY_CONSOLE=y
1116# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1117
1118#
1119# Sound
1120#
1121# CONFIG_SOUND is not set
1122
1123#
1124# HID Devices
1125#
1126CONFIG_HID=y
1127# CONFIG_HID_DEBUG is not set
1128
1129#
1130# USB support
1131#
1132CONFIG_USB_ARCH_HAS_HCD=y
1133CONFIG_USB_ARCH_HAS_OHCI=y
1134CONFIG_USB_ARCH_HAS_EHCI=y
1135# CONFIG_USB is not set
1136
1137#
1138# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1139#
1140
1141#
1142# USB Gadget Support
1143#
1144# CONFIG_USB_GADGET is not set
1145
1146#
1147# MMC/SD Card support
1148#
1149# CONFIG_MMC is not set
1150
1151#
1152# LED devices
1153#
1154# CONFIG_NEW_LEDS is not set
1155
1156#
1157# LED drivers
1158#
1159
1160#
1161# LED Triggers
1162#
1163
1164#
1165# InfiniBand support
1166#
1167# CONFIG_INFINIBAND is not set
1168
1169#
1170# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1171#
1172
1173#
1174# Real Time Clock
1175#
1176# CONFIG_RTC_CLASS is not set
1177
1178#
1179# DMA Engine support
1180#
1181# CONFIG_DMA_ENGINE is not set
1182
1183#
1184# DMA Clients
1185#
1186
1187#
1188# DMA Devices
1189#
1190
1191#
1192# Auxiliary Display support
1193#
1194
1195#
1196# Virtualization
1197#
1198
1199#
1200# File systems
1201#
1202CONFIG_EXT2_FS=y
1203# CONFIG_EXT2_FS_XATTR is not set
1204# CONFIG_EXT2_FS_XIP is not set
1205CONFIG_EXT3_FS=y
1206CONFIG_EXT3_FS_XATTR=y
1207# CONFIG_EXT3_FS_POSIX_ACL is not set
1208# CONFIG_EXT3_FS_SECURITY is not set
1209# CONFIG_EXT4DEV_FS is not set
1210CONFIG_JBD=y
1211# CONFIG_JBD_DEBUG is not set
1212CONFIG_FS_MBCACHE=y
1213CONFIG_REISERFS_FS=m
1214# CONFIG_REISERFS_CHECK is not set
1215CONFIG_REISERFS_PROC_INFO=y
1216CONFIG_REISERFS_FS_XATTR=y
1217CONFIG_REISERFS_FS_POSIX_ACL=y
1218CONFIG_REISERFS_FS_SECURITY=y
1219CONFIG_JFS_FS=m
1220CONFIG_JFS_POSIX_ACL=y
1221CONFIG_JFS_SECURITY=y
1222# CONFIG_JFS_DEBUG is not set
1223# CONFIG_JFS_STATISTICS is not set
1224CONFIG_FS_POSIX_ACL=y
1225CONFIG_XFS_FS=m
1226CONFIG_XFS_QUOTA=y
1227CONFIG_XFS_SECURITY=y
1228CONFIG_XFS_POSIX_ACL=y
1229# CONFIG_XFS_RT is not set
1230# CONFIG_GFS2_FS is not set
1231# CONFIG_OCFS2_FS is not set
1232CONFIG_MINIX_FS=m
1233CONFIG_ROMFS_FS=m
1234CONFIG_INOTIFY=y
1235CONFIG_INOTIFY_USER=y
1236CONFIG_QUOTA=y
1237# CONFIG_QFMT_V1 is not set
1238CONFIG_QFMT_V2=y
1239CONFIG_QUOTACTL=y
1240CONFIG_DNOTIFY=y
1241CONFIG_AUTOFS_FS=y
1242# CONFIG_AUTOFS4_FS is not set
1243CONFIG_FUSE_FS=m
1244CONFIG_GENERIC_ACL=y
1245
1246#
1247# CD-ROM/DVD Filesystems
1248#
1249CONFIG_ISO9660_FS=m
1250CONFIG_JOLIET=y
1251CONFIG_ZISOFS=y
1252CONFIG_UDF_FS=m
1253CONFIG_UDF_NLS=y
1254
1255#
1256# DOS/FAT/NT Filesystems
1257#
1258CONFIG_FAT_FS=m
1259CONFIG_MSDOS_FS=m
1260CONFIG_VFAT_FS=m
1261CONFIG_FAT_DEFAULT_CODEPAGE=437
1262CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1263# CONFIG_NTFS_FS is not set
1264
1265#
1266# Pseudo filesystems
1267#
1268CONFIG_PROC_FS=y
1269CONFIG_PROC_KCORE=y
1270CONFIG_PROC_SYSCTL=y
1271CONFIG_SYSFS=y
1272CONFIG_TMPFS=y
1273CONFIG_TMPFS_POSIX_ACL=y
1274# CONFIG_HUGETLB_PAGE is not set
1275CONFIG_RAMFS=y
1276CONFIG_CONFIGFS_FS=m
1277
1278#
1279# Miscellaneous filesystems
1280#
1281# CONFIG_ADFS_FS is not set
1282CONFIG_AFFS_FS=m
1283CONFIG_HFS_FS=m
1284CONFIG_HFSPLUS_FS=m
1285CONFIG_BEFS_FS=m
1286# CONFIG_BEFS_DEBUG is not set
1287CONFIG_BFS_FS=m
1288CONFIG_EFS_FS=m
1289CONFIG_CRAMFS=m
1290CONFIG_VXFS_FS=m
1291# CONFIG_HPFS_FS is not set
1292# CONFIG_QNX4FS_FS is not set
1293CONFIG_SYSV_FS=m
1294CONFIG_UFS_FS=m
1295# CONFIG_UFS_FS_WRITE is not set
1296# CONFIG_UFS_DEBUG is not set
1297
1298#
1299# Network File Systems
1300#
1301CONFIG_NFS_FS=y
1302CONFIG_NFS_V3=y
1303# CONFIG_NFS_V3_ACL is not set
1304# CONFIG_NFS_V4 is not set
1305# CONFIG_NFS_DIRECTIO is not set
1306CONFIG_NFSD=y
1307CONFIG_NFSD_V3=y
1308# CONFIG_NFSD_V3_ACL is not set
1309# CONFIG_NFSD_V4 is not set
1310# CONFIG_NFSD_TCP is not set
1311CONFIG_ROOT_NFS=y
1312CONFIG_LOCKD=y
1313CONFIG_LOCKD_V4=y
1314CONFIG_EXPORTFS=y
1315CONFIG_NFS_COMMON=y
1316CONFIG_SUNRPC=y
1317# CONFIG_RPCSEC_GSS_KRB5 is not set
1318# CONFIG_RPCSEC_GSS_SPKM3 is not set
1319# CONFIG_SMB_FS is not set
1320# CONFIG_CIFS is not set
1321# CONFIG_NCP_FS is not set
1322# CONFIG_CODA_FS is not set
1323# CONFIG_AFS_FS is not set
1324# CONFIG_9P_FS is not set
1325
1326#
1327# Partition Types
1328#
1329# CONFIG_PARTITION_ADVANCED is not set
1330CONFIG_MSDOS_PARTITION=y
1331
1332#
1333# Native Language Support
1334#
1335CONFIG_NLS=m
1336CONFIG_NLS_DEFAULT="iso8859-1"
1337CONFIG_NLS_CODEPAGE_437=m
1338CONFIG_NLS_CODEPAGE_737=m
1339CONFIG_NLS_CODEPAGE_775=m
1340CONFIG_NLS_CODEPAGE_850=m
1341CONFIG_NLS_CODEPAGE_852=m
1342CONFIG_NLS_CODEPAGE_855=m
1343CONFIG_NLS_CODEPAGE_857=m
1344CONFIG_NLS_CODEPAGE_860=m
1345CONFIG_NLS_CODEPAGE_861=m
1346CONFIG_NLS_CODEPAGE_862=m
1347CONFIG_NLS_CODEPAGE_863=m
1348CONFIG_NLS_CODEPAGE_864=m
1349CONFIG_NLS_CODEPAGE_865=m
1350CONFIG_NLS_CODEPAGE_866=m
1351CONFIG_NLS_CODEPAGE_869=m
1352CONFIG_NLS_CODEPAGE_936=m
1353CONFIG_NLS_CODEPAGE_950=m
1354CONFIG_NLS_CODEPAGE_932=m
1355CONFIG_NLS_CODEPAGE_949=m
1356CONFIG_NLS_CODEPAGE_874=m
1357CONFIG_NLS_ISO8859_8=m
1358CONFIG_NLS_CODEPAGE_1250=m
1359CONFIG_NLS_CODEPAGE_1251=m
1360CONFIG_NLS_ASCII=m
1361CONFIG_NLS_ISO8859_1=m
1362CONFIG_NLS_ISO8859_2=m
1363CONFIG_NLS_ISO8859_3=m
1364CONFIG_NLS_ISO8859_4=m
1365CONFIG_NLS_ISO8859_5=m
1366CONFIG_NLS_ISO8859_6=m
1367CONFIG_NLS_ISO8859_7=m
1368CONFIG_NLS_ISO8859_9=m
1369CONFIG_NLS_ISO8859_13=m
1370CONFIG_NLS_ISO8859_14=m
1371CONFIG_NLS_ISO8859_15=m
1372CONFIG_NLS_KOI8_R=m
1373CONFIG_NLS_KOI8_U=m
1374CONFIG_NLS_UTF8=m
1375
1376#
1377# Distributed Lock Manager
1378#
1379CONFIG_DLM=m
1380CONFIG_DLM_TCP=y
1381# CONFIG_DLM_SCTP is not set
1382# CONFIG_DLM_DEBUG is not set
1383
1384#
1385# Profiling support
1386#
1387# CONFIG_PROFILING is not set
1388
1389#
1390# Kernel hacking
1391#
1392CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1393# CONFIG_PRINTK_TIME is not set
1394CONFIG_ENABLE_MUST_CHECK=y
1395# CONFIG_MAGIC_SYSRQ is not set
1396# CONFIG_UNUSED_SYMBOLS is not set
1397# CONFIG_DEBUG_FS is not set
1398# CONFIG_HEADERS_CHECK is not set
1399# CONFIG_DEBUG_KERNEL is not set
1400CONFIG_LOG_BUF_SHIFT=14
1401CONFIG_CROSSCOMPILE=y
1402CONFIG_CMDLINE=""
1403
1404#
1405# Security options
1406#
1407# CONFIG_KEYS is not set
1408# CONFIG_SECURITY is not set
1409
1410#
1411# Cryptographic options
1412#
1413CONFIG_CRYPTO=y
1414CONFIG_CRYPTO_ALGAPI=y
1415CONFIG_CRYPTO_BLKCIPHER=m
1416CONFIG_CRYPTO_HASH=y
1417CONFIG_CRYPTO_MANAGER=y
1418CONFIG_CRYPTO_HMAC=y
1419CONFIG_CRYPTO_XCBC=m
1420CONFIG_CRYPTO_NULL=m
1421CONFIG_CRYPTO_MD4=m
1422CONFIG_CRYPTO_MD5=y
1423CONFIG_CRYPTO_SHA1=m
1424CONFIG_CRYPTO_SHA256=m
1425CONFIG_CRYPTO_SHA512=m
1426CONFIG_CRYPTO_WP512=m
1427CONFIG_CRYPTO_TGR192=m
1428CONFIG_CRYPTO_GF128MUL=m
1429CONFIG_CRYPTO_ECB=m
1430CONFIG_CRYPTO_CBC=m
1431CONFIG_CRYPTO_PCBC=m
1432CONFIG_CRYPTO_LRW=m
1433CONFIG_CRYPTO_DES=m
1434CONFIG_CRYPTO_FCRYPT=m
1435CONFIG_CRYPTO_BLOWFISH=m
1436CONFIG_CRYPTO_TWOFISH=m
1437CONFIG_CRYPTO_TWOFISH_COMMON=m
1438CONFIG_CRYPTO_SERPENT=m
1439CONFIG_CRYPTO_AES=m
1440CONFIG_CRYPTO_CAST5=m
1441CONFIG_CRYPTO_CAST6=m
1442CONFIG_CRYPTO_TEA=m
1443CONFIG_CRYPTO_ARC4=m
1444CONFIG_CRYPTO_KHAZAD=m
1445CONFIG_CRYPTO_ANUBIS=m
1446CONFIG_CRYPTO_DEFLATE=m
1447CONFIG_CRYPTO_MICHAEL_MIC=m
1448CONFIG_CRYPTO_CRC32C=m
1449CONFIG_CRYPTO_CAMELLIA=m
1450# CONFIG_CRYPTO_TEST is not set
1451
1452#
1453# Hardware crypto devices
1454#
1455
1456#
1457# Library routines
1458#
1459CONFIG_BITREVERSE=y
1460# CONFIG_CRC_CCITT is not set
1461CONFIG_CRC16=m
1462CONFIG_CRC32=y
1463CONFIG_LIBCRC32C=m
1464CONFIG_ZLIB_INFLATE=m
1465CONFIG_ZLIB_DEFLATE=m
1466CONFIG_TEXTSEARCH=y
1467CONFIG_TEXTSEARCH_KMP=m
1468CONFIG_TEXTSEARCH_BM=m
1469CONFIG_TEXTSEARCH_FSM=m
1470CONFIG_PLIST=y
1471CONFIG_HAS_IOMEM=y
1472CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig
index c0e42e74dfbd..d8694332b344 100644
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -16,9 +16,7 @@ CONFIG_BCM47XX=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 3b42cea2e402..a3bbbf067a3b 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.25-rc7 3# Linux kernel version: 2.6.26-rc8
4# Mon Mar 31 08:11:19 2008 4# Wed Jul 2 17:02:55 2008
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
@@ -148,6 +146,7 @@ CONFIG_FLATMEM=y
148CONFIG_FLAT_NODE_MEM_MAP=y 146CONFIG_FLAT_NODE_MEM_MAP=y
149# CONFIG_SPARSEMEM_STATIC is not set 147# CONFIG_SPARSEMEM_STATIC is not set
150# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 148# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
149CONFIG_PAGEFLAGS_EXTENDED=y
151CONFIG_SPLIT_PTLOCK_CPUS=4 150CONFIG_SPLIT_PTLOCK_CPUS=4
152CONFIG_RESOURCES_64BIT=y 151CONFIG_RESOURCES_64BIT=y
153CONFIG_ZONE_DMA_FLAG=0 152CONFIG_ZONE_DMA_FLAG=0
@@ -156,6 +155,7 @@ CONFIG_SMP=y
156CONFIG_SYS_SUPPORTS_SMP=y 155CONFIG_SYS_SUPPORTS_SMP=y
157CONFIG_NR_CPUS_DEFAULT_4=y 156CONFIG_NR_CPUS_DEFAULT_4=y
158CONFIG_NR_CPUS=4 157CONFIG_NR_CPUS=4
158# CONFIG_MIPS_CMP is not set
159CONFIG_TICK_ONESHOT=y 159CONFIG_TICK_ONESHOT=y
160CONFIG_NO_HZ=y 160CONFIG_NO_HZ=y
161CONFIG_HIGH_RES_TIMERS=y 161CONFIG_HIGH_RES_TIMERS=y
@@ -223,6 +223,7 @@ CONFIG_HOTPLUG=y
223CONFIG_PRINTK=y 223CONFIG_PRINTK=y
224CONFIG_BUG=y 224CONFIG_BUG=y
225CONFIG_ELF_CORE=y 225CONFIG_ELF_CORE=y
226# CONFIG_PCSPKR_PLATFORM is not set
226CONFIG_COMPAT_BRK=y 227CONFIG_COMPAT_BRK=y
227CONFIG_BASE_FULL=y 228CONFIG_BASE_FULL=y
228CONFIG_FUTEX=y 229CONFIG_FUTEX=y
@@ -241,12 +242,14 @@ CONFIG_SLAB=y
241CONFIG_HAVE_OPROFILE=y 242CONFIG_HAVE_OPROFILE=y
242# CONFIG_HAVE_KPROBES is not set 243# CONFIG_HAVE_KPROBES is not set
243# CONFIG_HAVE_KRETPROBES is not set 244# CONFIG_HAVE_KRETPROBES is not set
245# CONFIG_HAVE_DMA_ATTRS is not set
244CONFIG_PROC_PAGE_MONITOR=y 246CONFIG_PROC_PAGE_MONITOR=y
245CONFIG_SLABINFO=y 247CONFIG_SLABINFO=y
246CONFIG_RT_MUTEXES=y 248CONFIG_RT_MUTEXES=y
247# CONFIG_TINY_SHMEM is not set 249# CONFIG_TINY_SHMEM is not set
248CONFIG_BASE_SMALL=0 250CONFIG_BASE_SMALL=0
249CONFIG_MODULES=y 251CONFIG_MODULES=y
252# CONFIG_MODULE_FORCE_LOAD is not set
250CONFIG_MODULE_UNLOAD=y 253CONFIG_MODULE_UNLOAD=y
251# CONFIG_MODULE_FORCE_UNLOAD is not set 254# CONFIG_MODULE_FORCE_UNLOAD is not set
252CONFIG_MODVERSIONS=y 255CONFIG_MODVERSIONS=y
@@ -302,7 +305,6 @@ CONFIG_BINFMT_ELF32=y
302# Power management options 305# Power management options
303# 306#
304CONFIG_PM=y 307CONFIG_PM=y
305# CONFIG_PM_LEGACY is not set
306# CONFIG_PM_DEBUG is not set 308# CONFIG_PM_DEBUG is not set
307 309
308# 310#
@@ -399,9 +401,11 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
399CONFIG_INET6_XFRM_MODE_BEET=m 401CONFIG_INET6_XFRM_MODE_BEET=m
400CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m 402CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
401CONFIG_IPV6_SIT=m 403CONFIG_IPV6_SIT=m
404CONFIG_IPV6_NDISC_NODETYPE=y
402CONFIG_IPV6_TUNNEL=m 405CONFIG_IPV6_TUNNEL=m
403CONFIG_IPV6_MULTIPLE_TABLES=y 406CONFIG_IPV6_MULTIPLE_TABLES=y
404CONFIG_IPV6_SUBTREES=y 407CONFIG_IPV6_SUBTREES=y
408# CONFIG_IPV6_MROUTE is not set
405CONFIG_NETWORK_SECMARK=y 409CONFIG_NETWORK_SECMARK=y
406CONFIG_NETFILTER=y 410CONFIG_NETFILTER=y
407# CONFIG_NETFILTER_DEBUG is not set 411# CONFIG_NETFILTER_DEBUG is not set
@@ -600,7 +604,7 @@ CONFIG_BLK_DEV_IT8213=m
600CONFIG_BLK_DEV_TC86C001=m 604CONFIG_BLK_DEV_TC86C001=m
601# CONFIG_BLK_DEV_IDE_SWARM is not set 605# CONFIG_BLK_DEV_IDE_SWARM is not set
602CONFIG_BLK_DEV_IDEDMA=y 606CONFIG_BLK_DEV_IDEDMA=y
603CONFIG_IDE_ARCH_OBSOLETE_INIT=y 607# CONFIG_BLK_DEV_HD_ONLY is not set
604# CONFIG_BLK_DEV_HD is not set 608# CONFIG_BLK_DEV_HD is not set
605 609
606# 610#
@@ -617,11 +621,12 @@ CONFIG_SCSI_PROC_FS=y
617# SCSI support type (disk, tape, CD-ROM) 621# SCSI support type (disk, tape, CD-ROM)
618# 622#
619CONFIG_BLK_DEV_SD=y 623CONFIG_BLK_DEV_SD=y
620# CONFIG_CHR_DEV_ST is not set 624CONFIG_CHR_DEV_ST=m
621# CONFIG_CHR_DEV_OSST is not set 625# CONFIG_CHR_DEV_OSST is not set
622# CONFIG_BLK_DEV_SR is not set 626CONFIG_BLK_DEV_SR=m
623# CONFIG_CHR_DEV_SG is not set 627CONFIG_BLK_DEV_SR_VENDOR=y
624# CONFIG_CHR_DEV_SCH is not set 628CONFIG_CHR_DEV_SG=m
629CONFIG_CHR_DEV_SCH=m
625 630
626# 631#
627# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 632# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -650,6 +655,7 @@ CONFIG_SCSI_LOWLEVEL=y
650# CONFIG_SCSI_AIC7XXX_OLD is not set 655# CONFIG_SCSI_AIC7XXX_OLD is not set
651# CONFIG_SCSI_AIC79XX is not set 656# CONFIG_SCSI_AIC79XX is not set
652# CONFIG_SCSI_AIC94XX is not set 657# CONFIG_SCSI_AIC94XX is not set
658# CONFIG_SCSI_DPT_I2O is not set
653# CONFIG_SCSI_ADVANSYS is not set 659# CONFIG_SCSI_ADVANSYS is not set
654# CONFIG_SCSI_ARCMSR is not set 660# CONFIG_SCSI_ARCMSR is not set
655# CONFIG_MEGARAID_NEWGEN is not set 661# CONFIG_MEGARAID_NEWGEN is not set
@@ -675,7 +681,10 @@ CONFIG_SCSI_LOWLEVEL=y
675# CONFIG_SCSI_SRP is not set 681# CONFIG_SCSI_SRP is not set
676CONFIG_ATA=y 682CONFIG_ATA=y
677# CONFIG_ATA_NONSTANDARD is not set 683# CONFIG_ATA_NONSTANDARD is not set
684CONFIG_SATA_PMP=y
678# CONFIG_SATA_AHCI is not set 685# CONFIG_SATA_AHCI is not set
686CONFIG_SATA_SIL24=y
687CONFIG_ATA_SFF=y
679# CONFIG_SATA_SVW is not set 688# CONFIG_SATA_SVW is not set
680# CONFIG_ATA_PIIX is not set 689# CONFIG_ATA_PIIX is not set
681# CONFIG_SATA_MV is not set 690# CONFIG_SATA_MV is not set
@@ -685,7 +694,6 @@ CONFIG_ATA=y
685# CONFIG_SATA_PROMISE is not set 694# CONFIG_SATA_PROMISE is not set
686# CONFIG_SATA_SX4 is not set 695# CONFIG_SATA_SX4 is not set
687# CONFIG_SATA_SIL is not set 696# CONFIG_SATA_SIL is not set
688CONFIG_SATA_SIL24=y
689# CONFIG_SATA_SIS is not set 697# CONFIG_SATA_SIS is not set
690# CONFIG_SATA_ULI is not set 698# CONFIG_SATA_ULI is not set
691# CONFIG_SATA_VIA is not set 699# CONFIG_SATA_VIA is not set
@@ -730,12 +738,17 @@ CONFIG_PATA_SIL680=y
730# CONFIG_PATA_VIA is not set 738# CONFIG_PATA_VIA is not set
731# CONFIG_PATA_WINBOND is not set 739# CONFIG_PATA_WINBOND is not set
732# CONFIG_PATA_PLATFORM is not set 740# CONFIG_PATA_PLATFORM is not set
741# CONFIG_PATA_SCH is not set
733# CONFIG_MD is not set 742# CONFIG_MD is not set
734# CONFIG_FUSION is not set 743# CONFIG_FUSION is not set
735 744
736# 745#
737# IEEE 1394 (FireWire) support 746# IEEE 1394 (FireWire) support
738# 747#
748
749#
750# Enable only one of the two stacks, unless you know what you are doing
751#
739# CONFIG_FIREWIRE is not set 752# CONFIG_FIREWIRE is not set
740# CONFIG_IEEE1394 is not set 753# CONFIG_IEEE1394 is not set
741# CONFIG_I2O is not set 754# CONFIG_I2O is not set
@@ -797,7 +810,6 @@ CONFIG_SB1250_MAC=y
797# CONFIG_SIS190 is not set 810# CONFIG_SIS190 is not set
798# CONFIG_SKGE is not set 811# CONFIG_SKGE is not set
799# CONFIG_SKY2 is not set 812# CONFIG_SKY2 is not set
800# CONFIG_SK98LIN is not set
801# CONFIG_VIA_VELOCITY is not set 813# CONFIG_VIA_VELOCITY is not set
802# CONFIG_TIGON3 is not set 814# CONFIG_TIGON3 is not set
803# CONFIG_BNX2 is not set 815# CONFIG_BNX2 is not set
@@ -815,6 +827,7 @@ CONFIG_NETXEN_NIC=m
815# CONFIG_MLX4_CORE is not set 827# CONFIG_MLX4_CORE is not set
816# CONFIG_TEHUTI is not set 828# CONFIG_TEHUTI is not set
817# CONFIG_BNX2X is not set 829# CONFIG_BNX2X is not set
830# CONFIG_SFC is not set
818# CONFIG_TR is not set 831# CONFIG_TR is not set
819 832
820# 833#
@@ -822,6 +835,7 @@ CONFIG_NETXEN_NIC=m
822# 835#
823# CONFIG_WLAN_PRE80211 is not set 836# CONFIG_WLAN_PRE80211 is not set
824# CONFIG_WLAN_80211 is not set 837# CONFIG_WLAN_80211 is not set
838# CONFIG_IWLWIFI_LEDS is not set
825# CONFIG_WAN is not set 839# CONFIG_WAN is not set
826# CONFIG_FDDI is not set 840# CONFIG_FDDI is not set
827# CONFIG_HIPPI is not set 841# CONFIG_HIPPI is not set
@@ -867,6 +881,7 @@ CONFIG_SERIO_RAW=m
867# Character devices 881# Character devices
868# 882#
869# CONFIG_VT is not set 883# CONFIG_VT is not set
884CONFIG_DEVKMEM=y
870CONFIG_SERIAL_NONSTANDARD=y 885CONFIG_SERIAL_NONSTANDARD=y
871# CONFIG_COMPUTONE is not set 886# CONFIG_COMPUTONE is not set
872# CONFIG_ROCKETPORT is not set 887# CONFIG_ROCKETPORT is not set
@@ -903,7 +918,6 @@ CONFIG_LEGACY_PTYS=y
903CONFIG_LEGACY_PTY_COUNT=256 918CONFIG_LEGACY_PTY_COUNT=256
904# CONFIG_IPMI_HANDLER is not set 919# CONFIG_IPMI_HANDLER is not set
905# CONFIG_HW_RANDOM is not set 920# CONFIG_HW_RANDOM is not set
906# CONFIG_RTC is not set
907# CONFIG_R3964 is not set 921# CONFIG_R3964 is not set
908# CONFIG_APPLICOM is not set 922# CONFIG_APPLICOM is not set
909# CONFIG_RAW_DRIVER is not set 923# CONFIG_RAW_DRIVER is not set
@@ -914,13 +928,6 @@ CONFIG_I2C_BOARDINFO=y
914CONFIG_I2C_CHARDEV=y 928CONFIG_I2C_CHARDEV=y
915 929
916# 930#
917# I2C Algorithms
918#
919# CONFIG_I2C_ALGOBIT is not set
920# CONFIG_I2C_ALGOPCF is not set
921# CONFIG_I2C_ALGOPCA is not set
922
923#
924# I2C Hardware Bus support 931# I2C Hardware Bus support
925# 932#
926# CONFIG_I2C_ALI1535 is not set 933# CONFIG_I2C_ALI1535 is not set
@@ -946,6 +953,7 @@ CONFIG_I2C_SIBYTE=y
946# CONFIG_I2C_VIA is not set 953# CONFIG_I2C_VIA is not set
947# CONFIG_I2C_VIAPRO is not set 954# CONFIG_I2C_VIAPRO is not set
948# CONFIG_I2C_VOODOO3 is not set 955# CONFIG_I2C_VOODOO3 is not set
956# CONFIG_I2C_PCA_PLATFORM is not set
949 957
950# 958#
951# Miscellaneous I2C Chip support 959# Miscellaneous I2C Chip support
@@ -955,23 +963,18 @@ CONFIG_SENSORS_EEPROM=y
955CONFIG_SENSORS_PCF8574=y 963CONFIG_SENSORS_PCF8574=y
956# CONFIG_PCF8575 is not set 964# CONFIG_PCF8575 is not set
957CONFIG_SENSORS_PCF8591=y 965CONFIG_SENSORS_PCF8591=y
958# CONFIG_TPS65010 is not set
959CONFIG_SENSORS_MAX6875=y 966CONFIG_SENSORS_MAX6875=y
960# CONFIG_SENSORS_TSL2550 is not set 967# CONFIG_SENSORS_TSL2550 is not set
961CONFIG_I2C_DEBUG_CORE=y 968CONFIG_I2C_DEBUG_CORE=y
962CONFIG_I2C_DEBUG_ALGO=y 969CONFIG_I2C_DEBUG_ALGO=y
963CONFIG_I2C_DEBUG_BUS=y 970CONFIG_I2C_DEBUG_BUS=y
964CONFIG_I2C_DEBUG_CHIP=y 971CONFIG_I2C_DEBUG_CHIP=y
965
966#
967# SPI support
968#
969# CONFIG_SPI is not set 972# CONFIG_SPI is not set
970# CONFIG_SPI_MASTER is not set
971# CONFIG_W1 is not set 973# CONFIG_W1 is not set
972# CONFIG_POWER_SUPPLY is not set 974# CONFIG_POWER_SUPPLY is not set
973# CONFIG_HWMON is not set 975# CONFIG_HWMON is not set
974# CONFIG_THERMAL is not set 976# CONFIG_THERMAL is not set
977# CONFIG_THERMAL_HWMON is not set
975# CONFIG_WATCHDOG is not set 978# CONFIG_WATCHDOG is not set
976 979
977# 980#
@@ -984,12 +987,22 @@ CONFIG_SSB_POSSIBLE=y
984# Multifunction device drivers 987# Multifunction device drivers
985# 988#
986# CONFIG_MFD_SM501 is not set 989# CONFIG_MFD_SM501 is not set
990# CONFIG_HTC_PASIC3 is not set
987 991
988# 992#
989# Multimedia devices 993# Multimedia devices
990# 994#
995
996#
997# Multimedia core support
998#
991# CONFIG_VIDEO_DEV is not set 999# CONFIG_VIDEO_DEV is not set
992# CONFIG_DVB_CORE is not set 1000# CONFIG_DVB_CORE is not set
1001# CONFIG_VIDEO_MEDIA is not set
1002
1003#
1004# Multimedia drivers
1005#
993# CONFIG_DAB is not set 1006# CONFIG_DAB is not set
994 1007
995# 1008#
@@ -1015,6 +1028,8 @@ CONFIG_USB_ARCH_HAS_HCD=y
1015CONFIG_USB_ARCH_HAS_OHCI=y 1028CONFIG_USB_ARCH_HAS_OHCI=y
1016CONFIG_USB_ARCH_HAS_EHCI=y 1029CONFIG_USB_ARCH_HAS_EHCI=y
1017# CONFIG_USB is not set 1030# CONFIG_USB is not set
1031# CONFIG_USB_OTG_WHITELIST is not set
1032# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1018 1033
1019# 1034#
1020# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1035# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -1023,13 +1038,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y
1023# CONFIG_MMC is not set 1038# CONFIG_MMC is not set
1024# CONFIG_MEMSTICK is not set 1039# CONFIG_MEMSTICK is not set
1025# CONFIG_NEW_LEDS is not set 1040# CONFIG_NEW_LEDS is not set
1041# CONFIG_ACCESSIBILITY is not set
1026# CONFIG_INFINIBAND is not set 1042# CONFIG_INFINIBAND is not set
1027CONFIG_RTC_LIB=y 1043CONFIG_RTC_LIB=y
1028# CONFIG_RTC_CLASS is not set 1044# CONFIG_RTC_CLASS is not set
1029
1030#
1031# Userspace I/O
1032#
1033# CONFIG_UIO is not set 1045# CONFIG_UIO is not set
1034 1046
1035# 1047#
@@ -1123,7 +1135,6 @@ CONFIG_NFS_FS=y
1123CONFIG_NFS_V3=y 1135CONFIG_NFS_V3=y
1124# CONFIG_NFS_V3_ACL is not set 1136# CONFIG_NFS_V3_ACL is not set
1125# CONFIG_NFS_V4 is not set 1137# CONFIG_NFS_V4 is not set
1126# CONFIG_NFS_DIRECTIO is not set
1127# CONFIG_NFSD is not set 1138# CONFIG_NFSD is not set
1128CONFIG_ROOT_NFS=y 1139CONFIG_ROOT_NFS=y
1129CONFIG_LOCKD=y 1140CONFIG_LOCKD=y
@@ -1194,6 +1205,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1194# CONFIG_PRINTK_TIME is not set 1205# CONFIG_PRINTK_TIME is not set
1195CONFIG_ENABLE_WARN_DEPRECATED=y 1206CONFIG_ENABLE_WARN_DEPRECATED=y
1196CONFIG_ENABLE_MUST_CHECK=y 1207CONFIG_ENABLE_MUST_CHECK=y
1208CONFIG_FRAME_WARN=2048
1197CONFIG_MAGIC_SYSRQ=y 1209CONFIG_MAGIC_SYSRQ=y
1198# CONFIG_UNUSED_SYMBOLS is not set 1210# CONFIG_UNUSED_SYMBOLS is not set
1199# CONFIG_DEBUG_FS is not set 1211# CONFIG_DEBUG_FS is not set
@@ -1204,6 +1216,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
1204CONFIG_SCHED_DEBUG=y 1216CONFIG_SCHED_DEBUG=y
1205# CONFIG_SCHEDSTATS is not set 1217# CONFIG_SCHEDSTATS is not set
1206# CONFIG_TIMER_STATS is not set 1218# CONFIG_TIMER_STATS is not set
1219# CONFIG_DEBUG_OBJECTS is not set
1207# CONFIG_DEBUG_SLAB is not set 1220# CONFIG_DEBUG_SLAB is not set
1208# CONFIG_DEBUG_RT_MUTEXES is not set 1221# CONFIG_DEBUG_RT_MUTEXES is not set
1209# CONFIG_RT_MUTEX_TESTER is not set 1222# CONFIG_RT_MUTEX_TESTER is not set
@@ -1217,6 +1230,7 @@ CONFIG_DEBUG_MUTEXES=y
1217# CONFIG_DEBUG_KOBJECT is not set 1230# CONFIG_DEBUG_KOBJECT is not set
1218# CONFIG_DEBUG_INFO is not set 1231# CONFIG_DEBUG_INFO is not set
1219# CONFIG_DEBUG_VM is not set 1232# CONFIG_DEBUG_VM is not set
1233# CONFIG_DEBUG_WRITECOUNT is not set
1220# CONFIG_DEBUG_LIST is not set 1234# CONFIG_DEBUG_LIST is not set
1221# CONFIG_DEBUG_SG is not set 1235# CONFIG_DEBUG_SG is not set
1222# CONFIG_BOOT_PRINTK_DELAY is not set 1236# CONFIG_BOOT_PRINTK_DELAY is not set
@@ -1237,53 +1251,82 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
1237# CONFIG_SECURITY is not set 1251# CONFIG_SECURITY is not set
1238# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1252# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1239CONFIG_CRYPTO=y 1253CONFIG_CRYPTO=y
1254
1255#
1256# Crypto core or helper
1257#
1240CONFIG_CRYPTO_ALGAPI=y 1258CONFIG_CRYPTO_ALGAPI=y
1241CONFIG_CRYPTO_AEAD=m 1259CONFIG_CRYPTO_AEAD=m
1242CONFIG_CRYPTO_BLKCIPHER=y 1260CONFIG_CRYPTO_BLKCIPHER=y
1243CONFIG_CRYPTO_SEQIV=m
1244CONFIG_CRYPTO_HASH=y 1261CONFIG_CRYPTO_HASH=y
1245CONFIG_CRYPTO_MANAGER=y 1262CONFIG_CRYPTO_MANAGER=y
1263CONFIG_CRYPTO_GF128MUL=m
1264CONFIG_CRYPTO_NULL=y
1265# CONFIG_CRYPTO_CRYPTD is not set
1266CONFIG_CRYPTO_AUTHENC=m
1267# CONFIG_CRYPTO_TEST is not set
1268
1269#
1270# Authenticated Encryption with Associated Data
1271#
1272CONFIG_CRYPTO_CCM=m
1273CONFIG_CRYPTO_GCM=m
1274CONFIG_CRYPTO_SEQIV=m
1275
1276#
1277# Block modes
1278#
1279CONFIG_CRYPTO_CBC=m
1280CONFIG_CRYPTO_CTR=m
1281# CONFIG_CRYPTO_CTS is not set
1282CONFIG_CRYPTO_ECB=m
1283CONFIG_CRYPTO_LRW=m
1284CONFIG_CRYPTO_PCBC=m
1285CONFIG_CRYPTO_XTS=m
1286
1287#
1288# Hash modes
1289#
1246CONFIG_CRYPTO_HMAC=y 1290CONFIG_CRYPTO_HMAC=y
1247CONFIG_CRYPTO_XCBC=m 1291CONFIG_CRYPTO_XCBC=m
1248CONFIG_CRYPTO_NULL=y 1292
1293#
1294# Digest
1295#
1296# CONFIG_CRYPTO_CRC32C is not set
1249CONFIG_CRYPTO_MD4=m 1297CONFIG_CRYPTO_MD4=m
1250CONFIG_CRYPTO_MD5=y 1298CONFIG_CRYPTO_MD5=y
1299CONFIG_CRYPTO_MICHAEL_MIC=m
1251CONFIG_CRYPTO_SHA1=m 1300CONFIG_CRYPTO_SHA1=m
1252CONFIG_CRYPTO_SHA256=m 1301CONFIG_CRYPTO_SHA256=m
1253CONFIG_CRYPTO_SHA512=m 1302CONFIG_CRYPTO_SHA512=m
1254CONFIG_CRYPTO_WP512=m
1255CONFIG_CRYPTO_TGR192=m 1303CONFIG_CRYPTO_TGR192=m
1256CONFIG_CRYPTO_GF128MUL=m 1304CONFIG_CRYPTO_WP512=m
1257CONFIG_CRYPTO_ECB=m 1305
1258CONFIG_CRYPTO_CBC=m 1306#
1259CONFIG_CRYPTO_PCBC=m 1307# Ciphers
1260CONFIG_CRYPTO_LRW=m 1308#
1261CONFIG_CRYPTO_XTS=m
1262CONFIG_CRYPTO_CTR=m
1263CONFIG_CRYPTO_GCM=m
1264CONFIG_CRYPTO_CCM=m
1265# CONFIG_CRYPTO_CRYPTD is not set
1266CONFIG_CRYPTO_DES=m
1267CONFIG_CRYPTO_FCRYPT=m
1268CONFIG_CRYPTO_BLOWFISH=m
1269CONFIG_CRYPTO_TWOFISH=m
1270CONFIG_CRYPTO_TWOFISH_COMMON=m
1271CONFIG_CRYPTO_SERPENT=m
1272CONFIG_CRYPTO_AES=m 1309CONFIG_CRYPTO_AES=m
1310CONFIG_CRYPTO_ANUBIS=m
1311CONFIG_CRYPTO_ARC4=m
1312CONFIG_CRYPTO_BLOWFISH=m
1313CONFIG_CRYPTO_CAMELLIA=m
1273CONFIG_CRYPTO_CAST5=m 1314CONFIG_CRYPTO_CAST5=m
1274CONFIG_CRYPTO_CAST6=m 1315CONFIG_CRYPTO_CAST6=m
1275CONFIG_CRYPTO_TEA=m 1316CONFIG_CRYPTO_DES=m
1276CONFIG_CRYPTO_ARC4=m 1317CONFIG_CRYPTO_FCRYPT=m
1277CONFIG_CRYPTO_KHAZAD=m 1318CONFIG_CRYPTO_KHAZAD=m
1278CONFIG_CRYPTO_ANUBIS=m
1279CONFIG_CRYPTO_SEED=m
1280CONFIG_CRYPTO_SALSA20=m 1319CONFIG_CRYPTO_SALSA20=m
1320CONFIG_CRYPTO_SEED=m
1321CONFIG_CRYPTO_SERPENT=m
1322CONFIG_CRYPTO_TEA=m
1323CONFIG_CRYPTO_TWOFISH=m
1324CONFIG_CRYPTO_TWOFISH_COMMON=m
1325
1326#
1327# Compression
1328#
1281CONFIG_CRYPTO_DEFLATE=m 1329CONFIG_CRYPTO_DEFLATE=m
1282CONFIG_CRYPTO_MICHAEL_MIC=m
1283# CONFIG_CRYPTO_CRC32C is not set
1284CONFIG_CRYPTO_CAMELLIA=m
1285# CONFIG_CRYPTO_TEST is not set
1286CONFIG_CRYPTO_AUTHENC=m
1287# CONFIG_CRYPTO_LZO is not set 1330# CONFIG_CRYPTO_LZO is not set
1288CONFIG_CRYPTO_HW=y 1331CONFIG_CRYPTO_HW=y
1289# CONFIG_CRYPTO_DEV_HIFN_795X is not set 1332# CONFIG_CRYPTO_DEV_HIFN_795X is not set
@@ -1292,9 +1335,10 @@ CONFIG_CRYPTO_HW=y
1292# Library routines 1335# Library routines
1293# 1336#
1294CONFIG_BITREVERSE=y 1337CONFIG_BITREVERSE=y
1338# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1295CONFIG_CRC_CCITT=m 1339CONFIG_CRC_CCITT=m
1296# CONFIG_CRC16 is not set 1340# CONFIG_CRC16 is not set
1297# CONFIG_CRC_ITU_T is not set 1341CONFIG_CRC_ITU_T=m
1298CONFIG_CRC32=y 1342CONFIG_CRC32=y
1299# CONFIG_CRC7 is not set 1343# CONFIG_CRC7 is not set
1300CONFIG_LIBCRC32C=m 1344CONFIG_LIBCRC32C=m
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index a94f14b5c8fa..185df23fd460 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -14,9 +14,7 @@ CONFIG_MIPS=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22CONFIG_MACH_VR41XX=y 20CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index b7295e988381..2678b7ec3351 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -14,9 +14,7 @@ CONFIG_MIPS_COBALT=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set 20# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 36578968d386..ebb8ad62b3a3 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_DB1000=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 5a90740c363a..ad4e5ef65592 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_DB1100=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index 76f37a1159fe..d0dc2e83ad35 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_DB1200=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index 508c91944f30..9155082313c8 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_DB1500=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 0c2c70d21db9..e4e324422cd9 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_DB1550=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 58c2cd68c3a7..9e65e6a2dcb3 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27CONFIG_MACH_DECSTATION=y 27CONFIG_MACH_DECSTATION=y
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 90d81f5dcebc..1bd84d42b14f 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -14,9 +14,7 @@ CONFIG_MIPS=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22CONFIG_MACH_VR41XX=y 20CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig
index f9a003c2b3a1..634bb4eaf132 100644
--- a/arch/mips/configs/emma2rh_defconfig
+++ b/arch/mips/configs/emma2rh_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
index 15efacc75d73..3572e80356d2 100644
--- a/arch/mips/configs/excite_defconfig
+++ b/arch/mips/configs/excite_defconfig
@@ -27,9 +27,7 @@ CONFIG_BASLER_EXCITE=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/fulong_defconfig b/arch/mips/configs/fulong_defconfig
index 5887a1735fba..620980081a30 100644
--- a/arch/mips/configs/fulong_defconfig
+++ b/arch/mips/configs/fulong_defconfig
@@ -14,9 +14,7 @@ CONFIG_LEMOTE_FULONG=y
14# CONFIG_MIPS_COBALT is not set 14# CONFIG_MIPS_COBALT is not set
15# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_WR_PPMC is not set 18# CONFIG_WR_PPMC is not set
21# CONFIG_MIPS_SIM is not set 19# CONFIG_MIPS_SIM is not set
22# CONFIG_PNX8550_JBS is not set 20# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 4f5e56c9335e..cc8e6bf2b245 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -15,9 +15,7 @@ CONFIG_ZONE_DMA=y
15# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LEMOTE_FULONG is not set 17# CONFIG_LEMOTE_FULONG is not set
18# CONFIG_MIPS_ATLAS is not set
19# CONFIG_MIPS_MALTA is not set 18# CONFIG_MIPS_MALTA is not set
20# CONFIG_MIPS_SEAD is not set
21# CONFIG_MIPS_SIM is not set 19# CONFIG_MIPS_SIM is not set
22# CONFIG_MARKEINS is not set 20# CONFIG_MARKEINS is not set
23# CONFIG_MACH_VR41XX is not set 21# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index f40e437bd9e5..138c575a0151 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -14,9 +14,7 @@ CONFIG_MIPS=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set 20# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig
index ec188be9a67a..822b01f643e3 100644
--- a/arch/mips/configs/ip28_defconfig
+++ b/arch/mips/configs/ip28_defconfig
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 2c5c624c5d42..fe4699df9626 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index 56148745e8f2..bbacc35d804f 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28CONFIG_MACH_JAZZ=y 28CONFIG_MACH_JAZZ=y
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index a7cd67753aac..9d5bd2a0af3d 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc1 3# Linux kernel version: 2.6.26-rc9
4# Thu Aug 2 23:07:36 2007 4# Fri Jul 11 23:01:36 2008
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -10,13 +10,13 @@ CONFIG_MIPS=y
10# 10#
11# CONFIG_MACH_ALCHEMY is not set 11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_BASLER_EXCITE is not set 12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_BCM47XX is not set
13# CONFIG_MIPS_COBALT is not set 14# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set
16# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
@@ -26,6 +26,7 @@ CONFIG_MIPS=y
26# CONFIG_PMC_YOSEMITE is not set 26# CONFIG_PMC_YOSEMITE is not set
27# CONFIG_SGI_IP22 is not set 27# CONFIG_SGI_IP22 is not set
28# CONFIG_SGI_IP27 is not set 28# CONFIG_SGI_IP27 is not set
29# CONFIG_SGI_IP28 is not set
29# CONFIG_SGI_IP32 is not set 30# CONFIG_SGI_IP32 is not set
30# CONFIG_SIBYTE_CRHINE is not set 31# CONFIG_SIBYTE_CRHINE is not set
31# CONFIG_SIBYTE_CARMEL is not set 32# CONFIG_SIBYTE_CARMEL is not set
@@ -36,28 +37,37 @@ CONFIG_MIPS=y
36# CONFIG_SIBYTE_SENTOSA is not set 37# CONFIG_SIBYTE_SENTOSA is not set
37# CONFIG_SIBYTE_BIGSUR is not set 38# CONFIG_SIBYTE_BIGSUR is not set
38# CONFIG_SNI_RM is not set 39# CONFIG_SNI_RM is not set
39CONFIG_TOSHIBA_JMR3927=y 40CONFIG_MACH_TX39XX=y
40# CONFIG_TOSHIBA_RBTX4927 is not set 41# CONFIG_MACH_TX49XX is not set
41# CONFIG_TOSHIBA_RBTX4938 is not set
42# CONFIG_WR_PPMC is not set 42# CONFIG_WR_PPMC is not set
43CONFIG_TOSHIBA_JMR3927=y
44CONFIG_SOC_TX3927=y
45# CONFIG_TOSHIBA_FPCIB0 is not set
46CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
43CONFIG_RWSEM_GENERIC_SPINLOCK=y 47CONFIG_RWSEM_GENERIC_SPINLOCK=y
44# CONFIG_ARCH_HAS_ILOG2_U32 is not set 48# CONFIG_ARCH_HAS_ILOG2_U32 is not set
45# CONFIG_ARCH_HAS_ILOG2_U64 is not set 49# CONFIG_ARCH_HAS_ILOG2_U64 is not set
50CONFIG_ARCH_SUPPORTS_OPROFILE=y
46CONFIG_GENERIC_FIND_NEXT_BIT=y 51CONFIG_GENERIC_FIND_NEXT_BIT=y
47CONFIG_GENERIC_HWEIGHT=y 52CONFIG_GENERIC_HWEIGHT=y
48CONFIG_GENERIC_CALIBRATE_DELAY=y 53CONFIG_GENERIC_CALIBRATE_DELAY=y
54CONFIG_GENERIC_CLOCKEVENTS=y
49CONFIG_GENERIC_TIME=y 55CONFIG_GENERIC_TIME=y
56CONFIG_GENERIC_CMOS_UPDATE=y
50CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 57CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
51CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 58CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
59CONFIG_CEVT_TXX9=y
60CONFIG_GPIO_TXX9=y
52CONFIG_DMA_NONCOHERENT=y 61CONFIG_DMA_NONCOHERENT=y
53CONFIG_DMA_NEED_PCI_MAP_STATE=y 62CONFIG_DMA_NEED_PCI_MAP_STATE=y
63# CONFIG_HOTPLUG_CPU is not set
54# CONFIG_NO_IOPORT is not set 64# CONFIG_NO_IOPORT is not set
65CONFIG_GENERIC_GPIO=y
55CONFIG_CPU_BIG_ENDIAN=y 66CONFIG_CPU_BIG_ENDIAN=y
56# CONFIG_CPU_LITTLE_ENDIAN is not set 67# CONFIG_CPU_LITTLE_ENDIAN is not set
57CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 68CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
58CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y 69CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
59CONFIG_IRQ_TXX9=y 70CONFIG_IRQ_TXX9=y
60CONFIG_MIPS_TX3927=y
61CONFIG_SWAP_IO_SPACE=y 71CONFIG_SWAP_IO_SPACE=y
62CONFIG_MIPS_L1_CACHE_SHIFT=5 72CONFIG_MIPS_L1_CACHE_SHIFT=5
63 73
@@ -104,13 +114,20 @@ CONFIG_CPU_HAS_SYNC=y
104CONFIG_GENERIC_HARDIRQS=y 114CONFIG_GENERIC_HARDIRQS=y
105CONFIG_GENERIC_IRQ_PROBE=y 115CONFIG_GENERIC_IRQ_PROBE=y
106CONFIG_ARCH_FLATMEM_ENABLE=y 116CONFIG_ARCH_FLATMEM_ENABLE=y
117CONFIG_ARCH_POPULATES_NODE_MAP=y
107CONFIG_FLATMEM=y 118CONFIG_FLATMEM=y
108CONFIG_FLAT_NODE_MEM_MAP=y 119CONFIG_FLAT_NODE_MEM_MAP=y
109# CONFIG_SPARSEMEM_STATIC is not set 120# CONFIG_SPARSEMEM_STATIC is not set
121# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
122CONFIG_PAGEFLAGS_EXTENDED=y
110CONFIG_SPLIT_PTLOCK_CPUS=4 123CONFIG_SPLIT_PTLOCK_CPUS=4
111# CONFIG_RESOURCES_64BIT is not set 124# CONFIG_RESOURCES_64BIT is not set
112CONFIG_ZONE_DMA_FLAG=0 125CONFIG_ZONE_DMA_FLAG=0
113CONFIG_VIRT_TO_BUS=y 126CONFIG_VIRT_TO_BUS=y
127# CONFIG_TICK_ONESHOT is not set
128# CONFIG_NO_HZ is not set
129# CONFIG_HIGH_RES_TIMERS is not set
130CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
114# CONFIG_HZ_48 is not set 131# CONFIG_HZ_48 is not set
115# CONFIG_HZ_100 is not set 132# CONFIG_HZ_100 is not set
116# CONFIG_HZ_128 is not set 133# CONFIG_HZ_128 is not set
@@ -144,18 +161,25 @@ CONFIG_SYSVIPC_SYSCTL=y
144# CONFIG_AUDIT is not set 161# CONFIG_AUDIT is not set
145# CONFIG_IKCONFIG is not set 162# CONFIG_IKCONFIG is not set
146CONFIG_LOG_BUF_SHIFT=14 163CONFIG_LOG_BUF_SHIFT=14
164# CONFIG_CGROUPS is not set
147CONFIG_SYSFS_DEPRECATED=y 165CONFIG_SYSFS_DEPRECATED=y
166CONFIG_SYSFS_DEPRECATED_V2=y
148# CONFIG_RELAY is not set 167# CONFIG_RELAY is not set
168# CONFIG_NAMESPACES is not set
149# CONFIG_BLK_DEV_INITRD is not set 169# CONFIG_BLK_DEV_INITRD is not set
170CONFIG_CC_OPTIMIZE_FOR_SIZE=y
150CONFIG_SYSCTL=y 171CONFIG_SYSCTL=y
151CONFIG_EMBEDDED=y 172CONFIG_EMBEDDED=y
152CONFIG_SYSCTL_SYSCALL=y 173CONFIG_SYSCTL_SYSCALL=y
174CONFIG_SYSCTL_SYSCALL_CHECK=y
153CONFIG_KALLSYMS=y 175CONFIG_KALLSYMS=y
154# CONFIG_KALLSYMS_EXTRA_PASS is not set 176# CONFIG_KALLSYMS_EXTRA_PASS is not set
155# CONFIG_HOTPLUG is not set 177# CONFIG_HOTPLUG is not set
156CONFIG_PRINTK=y 178CONFIG_PRINTK=y
157CONFIG_BUG=y 179CONFIG_BUG=y
158CONFIG_ELF_CORE=y 180CONFIG_ELF_CORE=y
181# CONFIG_PCSPKR_PLATFORM is not set
182CONFIG_COMPAT_BRK=y
159CONFIG_BASE_FULL=y 183CONFIG_BASE_FULL=y
160CONFIG_FUTEX=y 184CONFIG_FUTEX=y
161CONFIG_ANON_INODES=y 185CONFIG_ANON_INODES=y
@@ -168,6 +192,14 @@ CONFIG_VM_EVENT_COUNTERS=y
168CONFIG_SLAB=y 192CONFIG_SLAB=y
169# CONFIG_SLUB is not set 193# CONFIG_SLUB is not set
170# CONFIG_SLOB is not set 194# CONFIG_SLOB is not set
195# CONFIG_PROFILING is not set
196# CONFIG_MARKERS is not set
197CONFIG_HAVE_OPROFILE=y
198# CONFIG_HAVE_KPROBES is not set
199# CONFIG_HAVE_KRETPROBES is not set
200# CONFIG_HAVE_DMA_ATTRS is not set
201CONFIG_PROC_PAGE_MONITOR=y
202CONFIG_SLABINFO=y
171CONFIG_RT_MUTEXES=y 203CONFIG_RT_MUTEXES=y
172# CONFIG_TINY_SHMEM is not set 204# CONFIG_TINY_SHMEM is not set
173CONFIG_BASE_SMALL=0 205CONFIG_BASE_SMALL=0
@@ -189,20 +221,19 @@ CONFIG_IOSCHED_CFQ=y
189CONFIG_DEFAULT_CFQ=y 221CONFIG_DEFAULT_CFQ=y
190# CONFIG_DEFAULT_NOOP is not set 222# CONFIG_DEFAULT_NOOP is not set
191CONFIG_DEFAULT_IOSCHED="cfq" 223CONFIG_DEFAULT_IOSCHED="cfq"
224CONFIG_CLASSIC_RCU=y
192 225
193# 226#
194# Bus options (PCI, PCMCIA, EISA, ISA, TC) 227# Bus options (PCI, PCMCIA, EISA, ISA, TC)
195# 228#
196CONFIG_HW_HAS_PCI=y 229CONFIG_HW_HAS_PCI=y
197CONFIG_PCI=y 230CONFIG_PCI=y
231CONFIG_PCI_DOMAINS=y
198# CONFIG_ARCH_SUPPORTS_MSI is not set 232# CONFIG_ARCH_SUPPORTS_MSI is not set
233CONFIG_PCI_LEGACY=y
199CONFIG_MMU=y 234CONFIG_MMU=y
200 235
201# 236#
202# PCCARD (PCMCIA/CardBus) support
203#
204
205#
206# Executable file formats 237# Executable file formats
207# 238#
208CONFIG_BINFMT_ELF=y 239CONFIG_BINFMT_ELF=y
@@ -212,6 +243,7 @@ CONFIG_TRAD_SIGNALS=y
212# 243#
213# Power management options 244# Power management options
214# 245#
246CONFIG_ARCH_SUSPEND_POSSIBLE=y
215# CONFIG_PM is not set 247# CONFIG_PM is not set
216 248
217# 249#
@@ -245,25 +277,21 @@ CONFIG_IP_PNP_BOOTP=y
245# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 277# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
246# CONFIG_INET_XFRM_MODE_TUNNEL is not set 278# CONFIG_INET_XFRM_MODE_TUNNEL is not set
247# CONFIG_INET_XFRM_MODE_BEET is not set 279# CONFIG_INET_XFRM_MODE_BEET is not set
280# CONFIG_INET_LRO is not set
248# CONFIG_INET_DIAG is not set 281# CONFIG_INET_DIAG is not set
249# CONFIG_TCP_CONG_ADVANCED is not set 282# CONFIG_TCP_CONG_ADVANCED is not set
250CONFIG_TCP_CONG_CUBIC=y 283CONFIG_TCP_CONG_CUBIC=y
251CONFIG_DEFAULT_TCP_CONG="cubic" 284CONFIG_DEFAULT_TCP_CONG="cubic"
252# CONFIG_IPV6 is not set 285# CONFIG_IPV6 is not set
253# CONFIG_INET6_XFRM_TUNNEL is not set
254# CONFIG_INET6_TUNNEL is not set
255# CONFIG_NETWORK_SECMARK is not set 286# CONFIG_NETWORK_SECMARK is not set
256# CONFIG_NETFILTER is not set 287# CONFIG_NETFILTER is not set
288# CONFIG_ATM is not set
257# CONFIG_BRIDGE is not set 289# CONFIG_BRIDGE is not set
258# CONFIG_VLAN_8021Q is not set 290# CONFIG_VLAN_8021Q is not set
259# CONFIG_DECNET is not set 291# CONFIG_DECNET is not set
260# CONFIG_LLC2 is not set 292# CONFIG_LLC2 is not set
261# CONFIG_IPX is not set 293# CONFIG_IPX is not set
262# CONFIG_ATALK is not set 294# CONFIG_ATALK is not set
263
264#
265# QoS and/or fair queueing
266#
267# CONFIG_NET_SCHED is not set 295# CONFIG_NET_SCHED is not set
268 296
269# 297#
@@ -271,6 +299,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
271# 299#
272# CONFIG_NET_PKTGEN is not set 300# CONFIG_NET_PKTGEN is not set
273# CONFIG_HAMRADIO is not set 301# CONFIG_HAMRADIO is not set
302# CONFIG_CAN is not set
274# CONFIG_IRDA is not set 303# CONFIG_IRDA is not set
275# CONFIG_BT is not set 304# CONFIG_BT is not set
276 305
@@ -279,6 +308,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
279# 308#
280# CONFIG_CFG80211 is not set 309# CONFIG_CFG80211 is not set
281# CONFIG_WIRELESS_EXT is not set 310# CONFIG_WIRELESS_EXT is not set
311# CONFIG_MAC80211 is not set
282# CONFIG_IEEE80211 is not set 312# CONFIG_IEEE80211 is not set
283# CONFIG_RFKILL is not set 313# CONFIG_RFKILL is not set
284 314
@@ -307,6 +337,7 @@ CONFIG_BLK_DEV=y
307# CONFIG_CDROM_PKTCDVD is not set 337# CONFIG_CDROM_PKTCDVD is not set
308# CONFIG_ATA_OVER_ETH is not set 338# CONFIG_ATA_OVER_ETH is not set
309# CONFIG_MISC_DEVICES is not set 339# CONFIG_MISC_DEVICES is not set
340CONFIG_HAVE_IDE=y
310# CONFIG_IDE is not set 341# CONFIG_IDE is not set
311 342
312# 343#
@@ -318,10 +349,6 @@ CONFIG_BLK_DEV=y
318# CONFIG_SCSI_NETLINK is not set 349# CONFIG_SCSI_NETLINK is not set
319# CONFIG_ATA is not set 350# CONFIG_ATA is not set
320# CONFIG_MD is not set 351# CONFIG_MD is not set
321
322#
323# Fusion MPT device support
324#
325# CONFIG_FUSION is not set 352# CONFIG_FUSION is not set
326 353
327# 354#
@@ -329,7 +356,7 @@ CONFIG_BLK_DEV=y
329# 356#
330 357
331# 358#
332# An alternative FireWire stack is available with EXPERIMENTAL=y 359# A new alternative FireWire stack is available with EXPERIMENTAL=y
333# 360#
334# CONFIG_IEEE1394 is not set 361# CONFIG_IEEE1394 is not set
335# CONFIG_I2O is not set 362# CONFIG_I2O is not set
@@ -339,10 +366,27 @@ CONFIG_NETDEVICES=y
339# CONFIG_BONDING is not set 366# CONFIG_BONDING is not set
340# CONFIG_EQUALIZER is not set 367# CONFIG_EQUALIZER is not set
341# CONFIG_TUN is not set 368# CONFIG_TUN is not set
369# CONFIG_VETH is not set
342# CONFIG_ARCNET is not set 370# CONFIG_ARCNET is not set
343# CONFIG_PHYLIB is not set 371CONFIG_PHYLIB=y
372
373#
374# MII PHY device drivers
375#
376# CONFIG_MARVELL_PHY is not set
377# CONFIG_DAVICOM_PHY is not set
378# CONFIG_QSEMI_PHY is not set
379# CONFIG_LXT_PHY is not set
380# CONFIG_CICADA_PHY is not set
381# CONFIG_VITESSE_PHY is not set
382# CONFIG_SMSC_PHY is not set
383# CONFIG_BROADCOM_PHY is not set
384# CONFIG_ICPLUS_PHY is not set
385# CONFIG_REALTEK_PHY is not set
386# CONFIG_FIXED_PHY is not set
387# CONFIG_MDIO_BITBANG is not set
344CONFIG_NET_ETHERNET=y 388CONFIG_NET_ETHERNET=y
345CONFIG_MII=y 389# CONFIG_MII is not set
346# CONFIG_AX88796 is not set 390# CONFIG_AX88796 is not set
347# CONFIG_HAPPYMEAL is not set 391# CONFIG_HAPPYMEAL is not set
348# CONFIG_SUNGEM is not set 392# CONFIG_SUNGEM is not set
@@ -351,6 +395,10 @@ CONFIG_MII=y
351# CONFIG_DM9000 is not set 395# CONFIG_DM9000 is not set
352# CONFIG_NET_TULIP is not set 396# CONFIG_NET_TULIP is not set
353# CONFIG_HP100 is not set 397# CONFIG_HP100 is not set
398# CONFIG_IBM_NEW_EMAC_ZMII is not set
399# CONFIG_IBM_NEW_EMAC_RGMII is not set
400# CONFIG_IBM_NEW_EMAC_TAH is not set
401# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
354CONFIG_NET_PCI=y 402CONFIG_NET_PCI=y
355# CONFIG_PCNET32 is not set 403# CONFIG_PCNET32 is not set
356# CONFIG_AMD8111_ETH is not set 404# CONFIG_AMD8111_ETH is not set
@@ -358,13 +406,13 @@ CONFIG_NET_PCI=y
358# CONFIG_B44 is not set 406# CONFIG_B44 is not set
359# CONFIG_FORCEDETH is not set 407# CONFIG_FORCEDETH is not set
360CONFIG_TC35815=y 408CONFIG_TC35815=y
361# CONFIG_DGRS is not set
362# CONFIG_EEPRO100 is not set 409# CONFIG_EEPRO100 is not set
363# CONFIG_E100 is not set 410# CONFIG_E100 is not set
364# CONFIG_FEALNX is not set 411# CONFIG_FEALNX is not set
365# CONFIG_NATSEMI is not set 412# CONFIG_NATSEMI is not set
366# CONFIG_NE2K_PCI is not set 413# CONFIG_NE2K_PCI is not set
367# CONFIG_8139TOO is not set 414# CONFIG_8139TOO is not set
415# CONFIG_R6040 is not set
368# CONFIG_SIS900 is not set 416# CONFIG_SIS900 is not set
369# CONFIG_EPIC100 is not set 417# CONFIG_EPIC100 is not set
370# CONFIG_SUNDANCE is not set 418# CONFIG_SUNDANCE is not set
@@ -379,6 +427,7 @@ CONFIG_TC35815=y
379# 427#
380# CONFIG_WLAN_PRE80211 is not set 428# CONFIG_WLAN_PRE80211 is not set
381# CONFIG_WLAN_80211 is not set 429# CONFIG_WLAN_80211 is not set
430# CONFIG_IWLWIFI_LEDS is not set
382# CONFIG_WAN is not set 431# CONFIG_WAN is not set
383# CONFIG_FDDI is not set 432# CONFIG_FDDI is not set
384# CONFIG_PPP is not set 433# CONFIG_PPP is not set
@@ -400,7 +449,6 @@ CONFIG_INPUT=y
400# 449#
401# CONFIG_INPUT_MOUSEDEV is not set 450# CONFIG_INPUT_MOUSEDEV is not set
402# CONFIG_INPUT_JOYDEV is not set 451# CONFIG_INPUT_JOYDEV is not set
403# CONFIG_INPUT_TSDEV is not set
404# CONFIG_INPUT_EVDEV is not set 452# CONFIG_INPUT_EVDEV is not set
405# CONFIG_INPUT_EVBUG is not set 453# CONFIG_INPUT_EVBUG is not set
406 454
@@ -424,6 +472,7 @@ CONFIG_INPUT=y
424# Character devices 472# Character devices
425# 473#
426# CONFIG_VT is not set 474# CONFIG_VT is not set
475CONFIG_DEVKMEM=y
427CONFIG_SERIAL_NONSTANDARD=y 476CONFIG_SERIAL_NONSTANDARD=y
428# CONFIG_COMPUTONE is not set 477# CONFIG_COMPUTONE is not set
429# CONFIG_ROCKETPORT is not set 478# CONFIG_ROCKETPORT is not set
@@ -431,7 +480,6 @@ CONFIG_SERIAL_NONSTANDARD=y
431# CONFIG_DIGIEPCA is not set 480# CONFIG_DIGIEPCA is not set
432# CONFIG_MOXA_INTELLIO is not set 481# CONFIG_MOXA_INTELLIO is not set
433# CONFIG_MOXA_SMARTIO is not set 482# CONFIG_MOXA_SMARTIO is not set
434# CONFIG_MOXA_SMARTIO_NEW is not set
435# CONFIG_ISI is not set 483# CONFIG_ISI is not set
436# CONFIG_SYNCLINKMP is not set 484# CONFIG_SYNCLINKMP is not set
437# CONFIG_SYNCLINK_GT is not set 485# CONFIG_SYNCLINK_GT is not set
@@ -463,22 +511,30 @@ CONFIG_LEGACY_PTYS=y
463CONFIG_LEGACY_PTY_COUNT=256 511CONFIG_LEGACY_PTY_COUNT=256
464# CONFIG_IPMI_HANDLER is not set 512# CONFIG_IPMI_HANDLER is not set
465# CONFIG_HW_RANDOM is not set 513# CONFIG_HW_RANDOM is not set
466# CONFIG_RTC is not set
467# CONFIG_R3964 is not set 514# CONFIG_R3964 is not set
468# CONFIG_APPLICOM is not set 515# CONFIG_APPLICOM is not set
469# CONFIG_DRM is not set
470# CONFIG_RAW_DRIVER is not set 516# CONFIG_RAW_DRIVER is not set
471CONFIG_DEVPORT=y 517CONFIG_DEVPORT=y
472# CONFIG_I2C is not set 518# CONFIG_I2C is not set
519# CONFIG_SPI is not set
520CONFIG_HAVE_GPIO_LIB=y
473 521
474# 522#
475# SPI support 523# GPIO Support
524#
525
526#
527# I2C GPIO expanders:
528#
529
530#
531# SPI GPIO expanders:
476# 532#
477# CONFIG_SPI is not set
478# CONFIG_SPI_MASTER is not set
479# CONFIG_W1 is not set 533# CONFIG_W1 is not set
480# CONFIG_POWER_SUPPLY is not set 534# CONFIG_POWER_SUPPLY is not set
481# CONFIG_HWMON is not set 535# CONFIG_HWMON is not set
536# CONFIG_THERMAL is not set
537# CONFIG_THERMAL_HWMON is not set
482CONFIG_WATCHDOG=y 538CONFIG_WATCHDOG=y
483# CONFIG_WATCHDOG_NOWAYOUT is not set 539# CONFIG_WATCHDOG_NOWAYOUT is not set
484 540
@@ -495,29 +551,46 @@ CONFIG_TXX9_WDT=y
495# CONFIG_WDTPCI is not set 551# CONFIG_WDTPCI is not set
496 552
497# 553#
554# Sonics Silicon Backplane
555#
556CONFIG_SSB_POSSIBLE=y
557# CONFIG_SSB is not set
558
559#
498# Multifunction device drivers 560# Multifunction device drivers
499# 561#
500# CONFIG_MFD_SM501 is not set 562# CONFIG_MFD_SM501 is not set
563# CONFIG_HTC_PASIC3 is not set
501 564
502# 565#
503# Multimedia devices 566# Multimedia devices
504# 567#
568
569#
570# Multimedia core support
571#
505# CONFIG_VIDEO_DEV is not set 572# CONFIG_VIDEO_DEV is not set
506# CONFIG_DVB_CORE is not set 573# CONFIG_DVB_CORE is not set
574# CONFIG_VIDEO_MEDIA is not set
575
576#
577# Multimedia drivers
578#
507# CONFIG_DAB is not set 579# CONFIG_DAB is not set
508 580
509# 581#
510# Graphics support 582# Graphics support
511# 583#
584# CONFIG_DRM is not set
585# CONFIG_VGASTATE is not set
586# CONFIG_VIDEO_OUTPUT_CONTROL is not set
587# CONFIG_FB is not set
512# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 588# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
513 589
514# 590#
515# Display device support 591# Display device support
516# 592#
517# CONFIG_DISPLAY_SUPPORT is not set 593# CONFIG_DISPLAY_SUPPORT is not set
518# CONFIG_VGASTATE is not set
519# CONFIG_VIDEO_OUTPUT_CONTROL is not set
520# CONFIG_FB is not set
521 594
522# 595#
523# Sound 596# Sound
@@ -526,7 +599,9 @@ CONFIG_TXX9_WDT=y
526# CONFIG_HID_SUPPORT is not set 599# CONFIG_HID_SUPPORT is not set
527# CONFIG_USB_SUPPORT is not set 600# CONFIG_USB_SUPPORT is not set
528# CONFIG_MMC is not set 601# CONFIG_MMC is not set
602# CONFIG_MEMSTICK is not set
529# CONFIG_NEW_LEDS is not set 603# CONFIG_NEW_LEDS is not set
604# CONFIG_ACCESSIBILITY is not set
530# CONFIG_INFINIBAND is not set 605# CONFIG_INFINIBAND is not set
531CONFIG_RTC_LIB=y 606CONFIG_RTC_LIB=y
532CONFIG_RTC_CLASS=y 607CONFIG_RTC_CLASS=y
@@ -551,9 +626,10 @@ CONFIG_RTC_INTF_DEV=y
551# Platform RTC drivers 626# Platform RTC drivers
552# 627#
553# CONFIG_RTC_DRV_CMOS is not set 628# CONFIG_RTC_DRV_CMOS is not set
629# CONFIG_RTC_DRV_DS1511 is not set
554# CONFIG_RTC_DRV_DS1553 is not set 630# CONFIG_RTC_DRV_DS1553 is not set
555# CONFIG_RTC_DRV_STK17TA8 is not set
556CONFIG_RTC_DRV_DS1742=y 631CONFIG_RTC_DRV_DS1742=y
632# CONFIG_RTC_DRV_STK17TA8 is not set
557# CONFIG_RTC_DRV_M48T86 is not set 633# CONFIG_RTC_DRV_M48T86 is not set
558# CONFIG_RTC_DRV_M48T59 is not set 634# CONFIG_RTC_DRV_M48T59 is not set
559# CONFIG_RTC_DRV_V3020 is not set 635# CONFIG_RTC_DRV_V3020 is not set
@@ -561,23 +637,6 @@ CONFIG_RTC_DRV_DS1742=y
561# 637#
562# on-CPU RTC drivers 638# on-CPU RTC drivers
563# 639#
564
565#
566# DMA Engine support
567#
568# CONFIG_DMA_ENGINE is not set
569
570#
571# DMA Clients
572#
573
574#
575# DMA Devices
576#
577
578#
579# Userspace I/O
580#
581# CONFIG_UIO is not set 640# CONFIG_UIO is not set
582 641
583# 642#
@@ -590,12 +649,10 @@ CONFIG_RTC_DRV_DS1742=y
590# CONFIG_FS_POSIX_ACL is not set 649# CONFIG_FS_POSIX_ACL is not set
591# CONFIG_XFS_FS is not set 650# CONFIG_XFS_FS is not set
592# CONFIG_OCFS2_FS is not set 651# CONFIG_OCFS2_FS is not set
593# CONFIG_MINIX_FS is not set 652CONFIG_DNOTIFY=y
594# CONFIG_ROMFS_FS is not set
595CONFIG_INOTIFY=y 653CONFIG_INOTIFY=y
596CONFIG_INOTIFY_USER=y 654CONFIG_INOTIFY_USER=y
597# CONFIG_QUOTA is not set 655# CONFIG_QUOTA is not set
598CONFIG_DNOTIFY=y
599# CONFIG_AUTOFS_FS is not set 656# CONFIG_AUTOFS_FS is not set
600# CONFIG_AUTOFS4_FS is not set 657# CONFIG_AUTOFS4_FS is not set
601# CONFIG_FUSE_FS is not set 658# CONFIG_FUSE_FS is not set
@@ -622,7 +679,7 @@ CONFIG_PROC_SYSCTL=y
622CONFIG_SYSFS=y 679CONFIG_SYSFS=y
623# CONFIG_TMPFS is not set 680# CONFIG_TMPFS is not set
624# CONFIG_HUGETLB_PAGE is not set 681# CONFIG_HUGETLB_PAGE is not set
625CONFIG_RAMFS=y 682# CONFIG_CONFIGFS_FS is not set
626 683
627# 684#
628# Miscellaneous filesystems 685# Miscellaneous filesystems
@@ -630,17 +687,15 @@ CONFIG_RAMFS=y
630# CONFIG_HFSPLUS_FS is not set 687# CONFIG_HFSPLUS_FS is not set
631# CONFIG_CRAMFS is not set 688# CONFIG_CRAMFS is not set
632# CONFIG_VXFS_FS is not set 689# CONFIG_VXFS_FS is not set
690# CONFIG_MINIX_FS is not set
633# CONFIG_HPFS_FS is not set 691# CONFIG_HPFS_FS is not set
634# CONFIG_QNX4FS_FS is not set 692# CONFIG_QNX4FS_FS is not set
693# CONFIG_ROMFS_FS is not set
635# CONFIG_SYSV_FS is not set 694# CONFIG_SYSV_FS is not set
636# CONFIG_UFS_FS is not set 695# CONFIG_UFS_FS is not set
637 696CONFIG_NETWORK_FILESYSTEMS=y
638#
639# Network File Systems
640#
641CONFIG_NFS_FS=y 697CONFIG_NFS_FS=y
642# CONFIG_NFS_V3 is not set 698# CONFIG_NFS_V3 is not set
643# CONFIG_NFS_DIRECTIO is not set
644# CONFIG_NFSD is not set 699# CONFIG_NFSD is not set
645CONFIG_ROOT_NFS=y 700CONFIG_ROOT_NFS=y
646CONFIG_LOCKD=y 701CONFIG_LOCKD=y
@@ -656,10 +711,6 @@ CONFIG_SUNRPC=y
656# 711#
657# CONFIG_PARTITION_ADVANCED is not set 712# CONFIG_PARTITION_ADVANCED is not set
658CONFIG_MSDOS_PARTITION=y 713CONFIG_MSDOS_PARTITION=y
659
660#
661# Native Language Support
662#
663# CONFIG_NLS is not set 714# CONFIG_NLS is not set
664 715
665# 716#
@@ -667,13 +718,15 @@ CONFIG_MSDOS_PARTITION=y
667# 718#
668CONFIG_TRACE_IRQFLAGS_SUPPORT=y 719CONFIG_TRACE_IRQFLAGS_SUPPORT=y
669# CONFIG_PRINTK_TIME is not set 720# CONFIG_PRINTK_TIME is not set
721CONFIG_ENABLE_WARN_DEPRECATED=y
670CONFIG_ENABLE_MUST_CHECK=y 722CONFIG_ENABLE_MUST_CHECK=y
723CONFIG_FRAME_WARN=1024
671# CONFIG_MAGIC_SYSRQ is not set 724# CONFIG_MAGIC_SYSRQ is not set
672# CONFIG_UNUSED_SYMBOLS is not set 725# CONFIG_UNUSED_SYMBOLS is not set
673# CONFIG_DEBUG_FS is not set 726# CONFIG_DEBUG_FS is not set
674# CONFIG_HEADERS_CHECK is not set 727# CONFIG_HEADERS_CHECK is not set
675# CONFIG_DEBUG_KERNEL is not set 728# CONFIG_DEBUG_KERNEL is not set
676CONFIG_CROSSCOMPILE=y 729# CONFIG_SAMPLES is not set
677CONFIG_CMDLINE="" 730CONFIG_CMDLINE=""
678 731
679# 732#
@@ -687,6 +740,7 @@ CONFIG_CMDLINE=""
687# Library routines 740# Library routines
688# 741#
689CONFIG_BITREVERSE=y 742CONFIG_BITREVERSE=y
743# CONFIG_GENERIC_FIND_FIRST_BIT is not set
690# CONFIG_CRC_CCITT is not set 744# CONFIG_CRC_CCITT is not set
691# CONFIG_CRC16 is not set 745# CONFIG_CRC16 is not set
692# CONFIG_CRC_ITU_T is not set 746# CONFIG_CRC_ITU_T is not set
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig
index e6aef999854c..bc9159fda728 100644
--- a/arch/mips/configs/lasat_defconfig
+++ b/arch/mips/configs/lasat_defconfig
@@ -15,9 +15,7 @@ CONFIG_MIPS=y
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16CONFIG_LASAT=y 16CONFIG_LASAT=y
17# CONFIG_LEMOTE_FULONG is not set 17# CONFIG_LEMOTE_FULONG is not set
18# CONFIG_MIPS_ATLAS is not set
19# CONFIG_MIPS_MALTA is not set 18# CONFIG_MIPS_MALTA is not set
20# CONFIG_MIPS_SEAD is not set
21# CONFIG_MIPS_SIM is not set 19# CONFIG_MIPS_SIM is not set
22# CONFIG_MARKEINS is not set 20# CONFIG_MARKEINS is not set
23# CONFIG_MACH_VR41XX is not set 21# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 3d0da952811c..74daa0cf87e6 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -15,9 +15,7 @@ CONFIG_ZONE_DMA=y
15# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LEMOTE_FULONG is not set 17# CONFIG_LEMOTE_FULONG is not set
18# CONFIG_MIPS_ATLAS is not set
19CONFIG_MIPS_MALTA=y 18CONFIG_MIPS_MALTA=y
20# CONFIG_MIPS_SEAD is not set
21# CONFIG_MIPS_SIM is not set 19# CONFIG_MIPS_SIM is not set
22# CONFIG_MARKEINS is not set 20# CONFIG_MARKEINS is not set
23# CONFIG_MACH_VR41XX is not set 21# CONFIG_MACH_VR41XX is not set
@@ -68,7 +66,6 @@ CONFIG_CPU_LITTLE_ENDIAN=y
68CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 66CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
69CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y 67CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
70CONFIG_IRQ_CPU=y 68CONFIG_IRQ_CPU=y
71CONFIG_MIPS_BOARDS_GEN=y
72CONFIG_PCI_GT64XXX_PCI0=y 69CONFIG_PCI_GT64XXX_PCI0=y
73CONFIG_SWAP_IO_SPACE=y 70CONFIG_SWAP_IO_SPACE=y
74CONFIG_BOOT_ELF32=y 71CONFIG_BOOT_ELF32=y
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 4f6bce99d5cf..2c0a6314e901 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22CONFIG_MIPS_SIM=y 20CONFIG_MIPS_SIM=y
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 27e23fc9363a..8c720e51795b 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -14,9 +14,7 @@ CONFIG_MIPS=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22CONFIG_MACH_VR41XX=y 20CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig
index b12b73f6d74f..59d19472b161 100644
--- a/arch/mips/configs/msp71xx_defconfig
+++ b/arch/mips/configs/msp71xx_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index fa3aa3919448..bacf0dd0e345 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -14,9 +14,7 @@ CONFIG_MACH_ALCHEMY=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set 20# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 1d0157d3a5bb..6dfe6f793cef 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_PB1100=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index d0491a05ee58..c965a87e6a96 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_PB1500=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 16d78d3cd2aa..0778996c682f 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -27,9 +27,7 @@ CONFIG_MIPS_PB1550=y
27# CONFIG_MIPS_COBALT is not set 27# CONFIG_MIPS_COBALT is not set
28# CONFIG_MACH_DECSTATION is not set 28# CONFIG_MACH_DECSTATION is not set
29# CONFIG_MACH_JAZZ is not set 29# CONFIG_MACH_JAZZ is not set
30# CONFIG_MIPS_ATLAS is not set
31# CONFIG_MIPS_MALTA is not set 30# CONFIG_MIPS_MALTA is not set
32# CONFIG_MIPS_SEAD is not set
33# CONFIG_WR_PPMC is not set 31# CONFIG_WR_PPMC is not set
34# CONFIG_MIPS_SIM is not set 32# CONFIG_MIPS_SIM is not set
35# CONFIG_MOMENCO_JAGUAR_ATX is not set 33# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 780c7fc24b82..37c7b5ffd474 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig
index 267f21ed1d0f..893e5c4ab66d 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550-stb810_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig
deleted file mode 100644
index 470f6f4d3ea2..000000000000
--- a/arch/mips/configs/rbhma4200_defconfig
+++ /dev/null
@@ -1,669 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc1
4# Thu Aug 2 22:55:57 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set
23# CONFIG_PNX8550_JBS is not set
24# CONFIG_PNX8550_STB810 is not set
25# CONFIG_PMC_MSP is not set
26# CONFIG_PMC_YOSEMITE is not set
27# CONFIG_SGI_IP22 is not set
28# CONFIG_SGI_IP27 is not set
29# CONFIG_SGI_IP32 is not set
30# CONFIG_SIBYTE_CRHINE is not set
31# CONFIG_SIBYTE_CARMEL is not set
32# CONFIG_SIBYTE_CRHONE is not set
33# CONFIG_SIBYTE_RHONE is not set
34# CONFIG_SIBYTE_SWARM is not set
35# CONFIG_SIBYTE_LITTLESUR is not set
36# CONFIG_SIBYTE_SENTOSA is not set
37# CONFIG_SIBYTE_BIGSUR is not set
38# CONFIG_SNI_RM is not set
39# CONFIG_TOSHIBA_JMR3927 is not set
40CONFIG_TOSHIBA_RBTX4927=y
41# CONFIG_TOSHIBA_RBTX4938 is not set
42# CONFIG_WR_PPMC is not set
43# CONFIG_TOSHIBA_FPCIB0 is not set
44CONFIG_RWSEM_GENERIC_SPINLOCK=y
45# CONFIG_ARCH_HAS_ILOG2_U32 is not set
46# CONFIG_ARCH_HAS_ILOG2_U64 is not set
47CONFIG_GENERIC_FIND_NEXT_BIT=y
48CONFIG_GENERIC_HWEIGHT=y
49CONFIG_GENERIC_CALIBRATE_DELAY=y
50CONFIG_GENERIC_TIME=y
51CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
52CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
53CONFIG_DMA_NONCOHERENT=y
54CONFIG_DMA_NEED_PCI_MAP_STATE=y
55# CONFIG_NO_IOPORT is not set
56CONFIG_CPU_BIG_ENDIAN=y
57# CONFIG_CPU_LITTLE_ENDIAN is not set
58CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
59CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
60CONFIG_IRQ_CPU=y
61CONFIG_IRQ_TXX9=y
62CONFIG_SWAP_IO_SPACE=y
63CONFIG_MIPS_L1_CACHE_SHIFT=5
64
65#
66# CPU selection
67#
68# CONFIG_CPU_LOONGSON2 is not set
69# CONFIG_CPU_MIPS32_R1 is not set
70# CONFIG_CPU_MIPS32_R2 is not set
71# CONFIG_CPU_MIPS64_R1 is not set
72# CONFIG_CPU_MIPS64_R2 is not set
73# CONFIG_CPU_R3000 is not set
74# CONFIG_CPU_TX39XX is not set
75# CONFIG_CPU_VR41XX is not set
76# CONFIG_CPU_R4300 is not set
77# CONFIG_CPU_R4X00 is not set
78CONFIG_CPU_TX49XX=y
79# CONFIG_CPU_R5000 is not set
80# CONFIG_CPU_R5432 is not set
81# CONFIG_CPU_R6000 is not set
82# CONFIG_CPU_NEVADA is not set
83# CONFIG_CPU_R8000 is not set
84# CONFIG_CPU_R10000 is not set
85# CONFIG_CPU_RM7000 is not set
86# CONFIG_CPU_RM9000 is not set
87# CONFIG_CPU_SB1 is not set
88CONFIG_SYS_HAS_CPU_TX49XX=y
89CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
90CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
91CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
92CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
93
94#
95# Kernel type
96#
97CONFIG_32BIT=y
98# CONFIG_64BIT is not set
99CONFIG_PAGE_SIZE_4KB=y
100# CONFIG_PAGE_SIZE_8KB is not set
101# CONFIG_PAGE_SIZE_16KB is not set
102# CONFIG_PAGE_SIZE_64KB is not set
103CONFIG_CPU_HAS_PREFETCH=y
104CONFIG_MIPS_MT_DISABLED=y
105# CONFIG_MIPS_MT_SMP is not set
106# CONFIG_MIPS_MT_SMTC is not set
107CONFIG_CPU_HAS_LLSC=y
108CONFIG_CPU_HAS_SYNC=y
109CONFIG_GENERIC_HARDIRQS=y
110CONFIG_GENERIC_IRQ_PROBE=y
111CONFIG_ARCH_FLATMEM_ENABLE=y
112CONFIG_FLATMEM=y
113CONFIG_FLAT_NODE_MEM_MAP=y
114# CONFIG_SPARSEMEM_STATIC is not set
115CONFIG_SPLIT_PTLOCK_CPUS=4
116# CONFIG_RESOURCES_64BIT is not set
117CONFIG_ZONE_DMA_FLAG=0
118CONFIG_VIRT_TO_BUS=y
119# CONFIG_HZ_48 is not set
120# CONFIG_HZ_100 is not set
121# CONFIG_HZ_128 is not set
122CONFIG_HZ_250=y
123# CONFIG_HZ_256 is not set
124# CONFIG_HZ_1000 is not set
125# CONFIG_HZ_1024 is not set
126CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
127CONFIG_HZ=250
128CONFIG_PREEMPT_NONE=y
129# CONFIG_PREEMPT_VOLUNTARY is not set
130# CONFIG_PREEMPT is not set
131# CONFIG_SECCOMP is not set
132CONFIG_LOCKDEP_SUPPORT=y
133CONFIG_STACKTRACE_SUPPORT=y
134CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
135
136#
137# General setup
138#
139# CONFIG_EXPERIMENTAL is not set
140CONFIG_BROKEN_ON_SMP=y
141CONFIG_INIT_ENV_ARG_LIMIT=32
142CONFIG_LOCALVERSION=""
143CONFIG_LOCALVERSION_AUTO=y
144CONFIG_SWAP=y
145CONFIG_SYSVIPC=y
146CONFIG_SYSVIPC_SYSCTL=y
147# CONFIG_BSD_PROCESS_ACCT is not set
148# CONFIG_TASKSTATS is not set
149# CONFIG_AUDIT is not set
150CONFIG_IKCONFIG=y
151CONFIG_IKCONFIG_PROC=y
152CONFIG_LOG_BUF_SHIFT=14
153CONFIG_SYSFS_DEPRECATED=y
154# CONFIG_RELAY is not set
155CONFIG_BLK_DEV_INITRD=y
156CONFIG_INITRAMFS_SOURCE=""
157CONFIG_SYSCTL=y
158CONFIG_EMBEDDED=y
159CONFIG_SYSCTL_SYSCALL=y
160CONFIG_KALLSYMS=y
161# CONFIG_KALLSYMS_EXTRA_PASS is not set
162# CONFIG_HOTPLUG is not set
163CONFIG_PRINTK=y
164CONFIG_BUG=y
165CONFIG_ELF_CORE=y
166CONFIG_BASE_FULL=y
167# CONFIG_FUTEX is not set
168CONFIG_ANON_INODES=y
169# CONFIG_EPOLL is not set
170CONFIG_SIGNALFD=y
171CONFIG_TIMERFD=y
172CONFIG_EVENTFD=y
173CONFIG_SHMEM=y
174CONFIG_VM_EVENT_COUNTERS=y
175CONFIG_SLAB=y
176# CONFIG_SLUB is not set
177# CONFIG_SLOB is not set
178# CONFIG_TINY_SHMEM is not set
179CONFIG_BASE_SMALL=0
180CONFIG_MODULES=y
181# CONFIG_MODULE_UNLOAD is not set
182# CONFIG_MODVERSIONS is not set
183# CONFIG_MODULE_SRCVERSION_ALL is not set
184CONFIG_KMOD=y
185CONFIG_BLOCK=y
186# CONFIG_LBD is not set
187# CONFIG_BLK_DEV_IO_TRACE is not set
188# CONFIG_LSF is not set
189
190#
191# IO Schedulers
192#
193CONFIG_IOSCHED_NOOP=y
194CONFIG_IOSCHED_AS=y
195CONFIG_IOSCHED_DEADLINE=y
196CONFIG_IOSCHED_CFQ=y
197CONFIG_DEFAULT_AS=y
198# CONFIG_DEFAULT_DEADLINE is not set
199# CONFIG_DEFAULT_CFQ is not set
200# CONFIG_DEFAULT_NOOP is not set
201CONFIG_DEFAULT_IOSCHED="anticipatory"
202
203#
204# Bus options (PCI, PCMCIA, EISA, ISA, TC)
205#
206CONFIG_HW_HAS_PCI=y
207CONFIG_PCI=y
208# CONFIG_ARCH_SUPPORTS_MSI is not set
209CONFIG_MMU=y
210
211#
212# PCCARD (PCMCIA/CardBus) support
213#
214
215#
216# Executable file formats
217#
218CONFIG_BINFMT_ELF=y
219# CONFIG_BINFMT_MISC is not set
220CONFIG_TRAD_SIGNALS=y
221
222#
223# Power management options
224#
225# CONFIG_PM is not set
226
227#
228# Networking
229#
230CONFIG_NET=y
231
232#
233# Networking options
234#
235CONFIG_PACKET=y
236# CONFIG_PACKET_MMAP is not set
237CONFIG_UNIX=y
238# CONFIG_NET_KEY is not set
239CONFIG_INET=y
240CONFIG_IP_MULTICAST=y
241# CONFIG_IP_ADVANCED_ROUTER is not set
242CONFIG_IP_FIB_HASH=y
243CONFIG_IP_PNP=y
244# CONFIG_IP_PNP_DHCP is not set
245# CONFIG_IP_PNP_BOOTP is not set
246# CONFIG_IP_PNP_RARP is not set
247# CONFIG_NET_IPIP is not set
248# CONFIG_NET_IPGRE is not set
249# CONFIG_IP_MROUTE is not set
250# CONFIG_SYN_COOKIES is not set
251# CONFIG_INET_AH is not set
252# CONFIG_INET_ESP is not set
253# CONFIG_INET_IPCOMP is not set
254# CONFIG_INET_XFRM_TUNNEL is not set
255# CONFIG_INET_TUNNEL is not set
256# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
257# CONFIG_INET_XFRM_MODE_TUNNEL is not set
258# CONFIG_INET_XFRM_MODE_BEET is not set
259CONFIG_INET_DIAG=y
260CONFIG_INET_TCP_DIAG=y
261# CONFIG_TCP_CONG_ADVANCED is not set
262CONFIG_TCP_CONG_CUBIC=y
263CONFIG_DEFAULT_TCP_CONG="cubic"
264# CONFIG_IPV6 is not set
265# CONFIG_INET6_XFRM_TUNNEL is not set
266# CONFIG_INET6_TUNNEL is not set
267# CONFIG_NETWORK_SECMARK is not set
268# CONFIG_NETFILTER is not set
269# CONFIG_BRIDGE is not set
270# CONFIG_VLAN_8021Q is not set
271# CONFIG_DECNET is not set
272# CONFIG_LLC2 is not set
273# CONFIG_IPX is not set
274# CONFIG_ATALK is not set
275
276#
277# QoS and/or fair queueing
278#
279# CONFIG_NET_SCHED is not set
280
281#
282# Network testing
283#
284# CONFIG_NET_PKTGEN is not set
285# CONFIG_HAMRADIO is not set
286# CONFIG_IRDA is not set
287# CONFIG_BT is not set
288
289#
290# Wireless
291#
292# CONFIG_CFG80211 is not set
293# CONFIG_WIRELESS_EXT is not set
294# CONFIG_IEEE80211 is not set
295# CONFIG_RFKILL is not set
296
297#
298# Device Drivers
299#
300
301#
302# Generic Driver Options
303#
304CONFIG_STANDALONE=y
305CONFIG_PREVENT_FIRMWARE_BUILD=y
306# CONFIG_SYS_HYPERVISOR is not set
307# CONFIG_CONNECTOR is not set
308# CONFIG_MTD is not set
309# CONFIG_PARPORT is not set
310CONFIG_BLK_DEV=y
311# CONFIG_BLK_CPQ_DA is not set
312# CONFIG_BLK_CPQ_CISS_DA is not set
313# CONFIG_BLK_DEV_DAC960 is not set
314# CONFIG_BLK_DEV_COW_COMMON is not set
315CONFIG_BLK_DEV_LOOP=y
316# CONFIG_BLK_DEV_CRYPTOLOOP is not set
317# CONFIG_BLK_DEV_NBD is not set
318# CONFIG_BLK_DEV_SX8 is not set
319CONFIG_BLK_DEV_RAM=y
320CONFIG_BLK_DEV_RAM_COUNT=16
321CONFIG_BLK_DEV_RAM_SIZE=8192
322CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
323# CONFIG_CDROM_PKTCDVD is not set
324# CONFIG_ATA_OVER_ETH is not set
325# CONFIG_MISC_DEVICES is not set
326# CONFIG_IDE is not set
327
328#
329# SCSI device support
330#
331# CONFIG_RAID_ATTRS is not set
332# CONFIG_SCSI is not set
333# CONFIG_SCSI_DMA is not set
334# CONFIG_SCSI_NETLINK is not set
335# CONFIG_ATA is not set
336# CONFIG_MD is not set
337
338#
339# Fusion MPT device support
340#
341# CONFIG_FUSION is not set
342
343#
344# IEEE 1394 (FireWire) support
345#
346
347#
348# An alternative FireWire stack is available with EXPERIMENTAL=y
349#
350# CONFIG_IEEE1394 is not set
351# CONFIG_I2O is not set
352CONFIG_NETDEVICES=y
353# CONFIG_NETDEVICES_MULTIQUEUE is not set
354# CONFIG_DUMMY is not set
355# CONFIG_BONDING is not set
356# CONFIG_EQUALIZER is not set
357# CONFIG_TUN is not set
358# CONFIG_ARCNET is not set
359# CONFIG_PHYLIB is not set
360CONFIG_NET_ETHERNET=y
361# CONFIG_MII is not set
362# CONFIG_AX88796 is not set
363# CONFIG_HAPPYMEAL is not set
364# CONFIG_SUNGEM is not set
365# CONFIG_CASSINI is not set
366# CONFIG_NET_VENDOR_3COM is not set
367# CONFIG_DM9000 is not set
368# CONFIG_NET_TULIP is not set
369# CONFIG_HP100 is not set
370CONFIG_NE2000=y
371# CONFIG_NET_PCI is not set
372# CONFIG_NETDEV_1000 is not set
373# CONFIG_NETDEV_10000 is not set
374# CONFIG_TR is not set
375
376#
377# Wireless LAN
378#
379# CONFIG_WLAN_PRE80211 is not set
380# CONFIG_WLAN_80211 is not set
381# CONFIG_WAN is not set
382# CONFIG_FDDI is not set
383# CONFIG_PPP is not set
384# CONFIG_SLIP is not set
385# CONFIG_NETPOLL is not set
386# CONFIG_NET_POLL_CONTROLLER is not set
387# CONFIG_ISDN is not set
388# CONFIG_PHONE is not set
389
390#
391# Input device support
392#
393# CONFIG_INPUT is not set
394
395#
396# Hardware I/O ports
397#
398CONFIG_SERIO=y
399# CONFIG_SERIO_I8042 is not set
400CONFIG_SERIO_SERPORT=y
401# CONFIG_SERIO_PCIPS2 is not set
402CONFIG_SERIO_LIBPS2=y
403# CONFIG_SERIO_RAW is not set
404# CONFIG_GAMEPORT is not set
405
406#
407# Character devices
408#
409# CONFIG_VT is not set
410# CONFIG_SERIAL_NONSTANDARD is not set
411
412#
413# Serial drivers
414#
415# CONFIG_SERIAL_8250 is not set
416
417#
418# Non-8250 serial port support
419#
420CONFIG_SERIAL_CORE=y
421CONFIG_SERIAL_CORE_CONSOLE=y
422CONFIG_SERIAL_TXX9=y
423CONFIG_HAS_TXX9_SERIAL=y
424CONFIG_SERIAL_TXX9_NR_UARTS=6
425CONFIG_SERIAL_TXX9_CONSOLE=y
426CONFIG_SERIAL_TXX9_STDSERIAL=y
427# CONFIG_SERIAL_JSM is not set
428CONFIG_UNIX98_PTYS=y
429CONFIG_LEGACY_PTYS=y
430CONFIG_LEGACY_PTY_COUNT=256
431# CONFIG_IPMI_HANDLER is not set
432# CONFIG_HW_RANDOM is not set
433# CONFIG_RTC is not set
434# CONFIG_R3964 is not set
435# CONFIG_APPLICOM is not set
436# CONFIG_DRM is not set
437# CONFIG_RAW_DRIVER is not set
438CONFIG_DEVPORT=y
439# CONFIG_I2C is not set
440
441#
442# SPI support
443#
444# CONFIG_SPI is not set
445# CONFIG_SPI_MASTER is not set
446# CONFIG_W1 is not set
447# CONFIG_POWER_SUPPLY is not set
448# CONFIG_HWMON is not set
449CONFIG_WATCHDOG=y
450# CONFIG_WATCHDOG_NOWAYOUT is not set
451
452#
453# Watchdog Device Drivers
454#
455# CONFIG_SOFT_WATCHDOG is not set
456CONFIG_TXX9_WDT=m
457
458#
459# PCI-based Watchdog Cards
460#
461# CONFIG_PCIPCWATCHDOG is not set
462# CONFIG_WDTPCI is not set
463
464#
465# Multifunction device drivers
466#
467# CONFIG_MFD_SM501 is not set
468
469#
470# Multimedia devices
471#
472# CONFIG_VIDEO_DEV is not set
473# CONFIG_DVB_CORE is not set
474# CONFIG_DAB is not set
475
476#
477# Graphics support
478#
479# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
480
481#
482# Display device support
483#
484# CONFIG_DISPLAY_SUPPORT is not set
485# CONFIG_VGASTATE is not set
486# CONFIG_VIDEO_OUTPUT_CONTROL is not set
487# CONFIG_FB is not set
488
489#
490# Sound
491#
492# CONFIG_SOUND is not set
493# CONFIG_USB_SUPPORT is not set
494# CONFIG_MMC is not set
495# CONFIG_NEW_LEDS is not set
496# CONFIG_INFINIBAND is not set
497CONFIG_RTC_LIB=y
498CONFIG_RTC_CLASS=y
499CONFIG_RTC_HCTOSYS=y
500CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
501# CONFIG_RTC_DEBUG is not set
502
503#
504# RTC interfaces
505#
506CONFIG_RTC_INTF_SYSFS=y
507CONFIG_RTC_INTF_PROC=y
508CONFIG_RTC_INTF_DEV=y
509# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
510# CONFIG_RTC_DRV_TEST is not set
511
512#
513# SPI RTC drivers
514#
515
516#
517# Platform RTC drivers
518#
519# CONFIG_RTC_DRV_CMOS is not set
520# CONFIG_RTC_DRV_DS1553 is not set
521# CONFIG_RTC_DRV_STK17TA8 is not set
522CONFIG_RTC_DRV_DS1742=y
523# CONFIG_RTC_DRV_M48T86 is not set
524# CONFIG_RTC_DRV_M48T59 is not set
525# CONFIG_RTC_DRV_V3020 is not set
526
527#
528# on-CPU RTC drivers
529#
530
531#
532# DMA Engine support
533#
534# CONFIG_DMA_ENGINE is not set
535
536#
537# DMA Clients
538#
539
540#
541# DMA Devices
542#
543
544#
545# Userspace I/O
546#
547# CONFIG_UIO is not set
548
549#
550# File systems
551#
552# CONFIG_EXT2_FS is not set
553# CONFIG_EXT3_FS is not set
554# CONFIG_REISERFS_FS is not set
555# CONFIG_JFS_FS is not set
556CONFIG_FS_POSIX_ACL=y
557# CONFIG_XFS_FS is not set
558# CONFIG_OCFS2_FS is not set
559# CONFIG_MINIX_FS is not set
560# CONFIG_ROMFS_FS is not set
561CONFIG_INOTIFY=y
562CONFIG_INOTIFY_USER=y
563# CONFIG_QUOTA is not set
564# CONFIG_DNOTIFY is not set
565# CONFIG_AUTOFS_FS is not set
566# CONFIG_AUTOFS4_FS is not set
567# CONFIG_FUSE_FS is not set
568CONFIG_GENERIC_ACL=y
569
570#
571# CD-ROM/DVD Filesystems
572#
573# CONFIG_ISO9660_FS is not set
574# CONFIG_UDF_FS is not set
575
576#
577# DOS/FAT/NT Filesystems
578#
579# CONFIG_MSDOS_FS is not set
580# CONFIG_VFAT_FS is not set
581# CONFIG_NTFS_FS is not set
582
583#
584# Pseudo filesystems
585#
586CONFIG_PROC_FS=y
587# CONFIG_PROC_KCORE is not set
588CONFIG_PROC_SYSCTL=y
589CONFIG_SYSFS=y
590CONFIG_TMPFS=y
591CONFIG_TMPFS_POSIX_ACL=y
592# CONFIG_HUGETLB_PAGE is not set
593CONFIG_RAMFS=y
594
595#
596# Miscellaneous filesystems
597#
598# CONFIG_HFSPLUS_FS is not set
599# CONFIG_CRAMFS is not set
600# CONFIG_VXFS_FS is not set
601# CONFIG_HPFS_FS is not set
602# CONFIG_QNX4FS_FS is not set
603# CONFIG_SYSV_FS is not set
604# CONFIG_UFS_FS is not set
605
606#
607# Network File Systems
608#
609CONFIG_NFS_FS=y
610CONFIG_NFS_V3=y
611# CONFIG_NFS_V3_ACL is not set
612# CONFIG_NFS_DIRECTIO is not set
613# CONFIG_NFSD is not set
614CONFIG_ROOT_NFS=y
615CONFIG_LOCKD=y
616CONFIG_LOCKD_V4=y
617CONFIG_NFS_COMMON=y
618CONFIG_SUNRPC=y
619# CONFIG_SMB_FS is not set
620# CONFIG_CIFS is not set
621# CONFIG_NCP_FS is not set
622# CONFIG_CODA_FS is not set
623
624#
625# Partition Types
626#
627# CONFIG_PARTITION_ADVANCED is not set
628CONFIG_MSDOS_PARTITION=y
629
630#
631# Native Language Support
632#
633# CONFIG_NLS is not set
634
635#
636# Kernel hacking
637#
638CONFIG_TRACE_IRQFLAGS_SUPPORT=y
639# CONFIG_PRINTK_TIME is not set
640CONFIG_ENABLE_MUST_CHECK=y
641# CONFIG_MAGIC_SYSRQ is not set
642# CONFIG_UNUSED_SYMBOLS is not set
643# CONFIG_DEBUG_FS is not set
644# CONFIG_HEADERS_CHECK is not set
645# CONFIG_DEBUG_KERNEL is not set
646CONFIG_CROSSCOMPILE=y
647CONFIG_CMDLINE=""
648CONFIG_SYS_SUPPORTS_KGDB=y
649
650#
651# Security options
652#
653# CONFIG_KEYS is not set
654# CONFIG_SECURITY is not set
655# CONFIG_CRYPTO is not set
656
657#
658# Library routines
659#
660CONFIG_BITREVERSE=y
661# CONFIG_CRC_CCITT is not set
662# CONFIG_CRC16 is not set
663# CONFIG_CRC_ITU_T is not set
664CONFIG_CRC32=y
665# CONFIG_CRC7 is not set
666# CONFIG_LIBCRC32C is not set
667CONFIG_HAS_IOMEM=y
668CONFIG_HAS_IOPORT=y
669CONFIG_HAS_DMA=y
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbtx49xx_defconfig
index 5a39f56b175e..e42aed5a38bb 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbtx49xx_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc1 3# Linux kernel version: 2.6.26-rc9
4# Thu Aug 2 22:59:53 2007 4# Fri Jul 11 23:03:21 2008
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -10,13 +10,13 @@ CONFIG_MIPS=y
10# 10#
11# CONFIG_MACH_ALCHEMY is not set 11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_BASLER_EXCITE is not set 12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_BCM47XX is not set
13# CONFIG_MIPS_COBALT is not set 14# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set
16# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
@@ -26,6 +26,7 @@ CONFIG_MIPS=y
26# CONFIG_PMC_YOSEMITE is not set 26# CONFIG_PMC_YOSEMITE is not set
27# CONFIG_SGI_IP22 is not set 27# CONFIG_SGI_IP22 is not set
28# CONFIG_SGI_IP27 is not set 28# CONFIG_SGI_IP27 is not set
29# CONFIG_SGI_IP28 is not set
29# CONFIG_SGI_IP32 is not set 30# CONFIG_SGI_IP32 is not set
30# CONFIG_SIBYTE_CRHINE is not set 31# CONFIG_SIBYTE_CRHINE is not set
31# CONFIG_SIBYTE_CARMEL is not set 32# CONFIG_SIBYTE_CARMEL is not set
@@ -36,10 +37,15 @@ CONFIG_MIPS=y
36# CONFIG_SIBYTE_SENTOSA is not set 37# CONFIG_SIBYTE_SENTOSA is not set
37# CONFIG_SIBYTE_BIGSUR is not set 38# CONFIG_SIBYTE_BIGSUR is not set
38# CONFIG_SNI_RM is not set 39# CONFIG_SNI_RM is not set
39# CONFIG_TOSHIBA_JMR3927 is not set 40# CONFIG_MACH_TX39XX is not set
40# CONFIG_TOSHIBA_RBTX4927 is not set 41CONFIG_MACH_TX49XX=y
41CONFIG_TOSHIBA_RBTX4938=y
42# CONFIG_WR_PPMC is not set 42# CONFIG_WR_PPMC is not set
43CONFIG_TOSHIBA_RBTX4927=y
44CONFIG_TOSHIBA_RBTX4938=y
45CONFIG_SOC_TX4927=y
46CONFIG_SOC_TX4938=y
47# CONFIG_TOSHIBA_FPCIB0 is not set
48CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
43 49
44# 50#
45# Multiplex Pin Select 51# Multiplex Pin Select
@@ -47,21 +53,30 @@ CONFIG_TOSHIBA_RBTX4938=y
47CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y 53CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y
48# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set 54# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set
49# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set 55# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
56CONFIG_PCI_TX4927=y
50CONFIG_RWSEM_GENERIC_SPINLOCK=y 57CONFIG_RWSEM_GENERIC_SPINLOCK=y
51# CONFIG_ARCH_HAS_ILOG2_U32 is not set 58# CONFIG_ARCH_HAS_ILOG2_U32 is not set
52# CONFIG_ARCH_HAS_ILOG2_U64 is not set 59# CONFIG_ARCH_HAS_ILOG2_U64 is not set
60CONFIG_ARCH_SUPPORTS_OPROFILE=y
53CONFIG_GENERIC_FIND_NEXT_BIT=y 61CONFIG_GENERIC_FIND_NEXT_BIT=y
54CONFIG_GENERIC_HWEIGHT=y 62CONFIG_GENERIC_HWEIGHT=y
55CONFIG_GENERIC_CALIBRATE_DELAY=y 63CONFIG_GENERIC_CALIBRATE_DELAY=y
64CONFIG_GENERIC_CLOCKEVENTS=y
56CONFIG_GENERIC_TIME=y 65CONFIG_GENERIC_TIME=y
66CONFIG_GENERIC_CMOS_UPDATE=y
57CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 67CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
58CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 68CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
69CONFIG_CEVT_R4K=y
70CONFIG_CEVT_TXX9=y
71CONFIG_CSRC_R4K=y
72CONFIG_GPIO_TXX9=y
59CONFIG_DMA_NONCOHERENT=y 73CONFIG_DMA_NONCOHERENT=y
60CONFIG_DMA_NEED_PCI_MAP_STATE=y 74CONFIG_DMA_NEED_PCI_MAP_STATE=y
75# CONFIG_HOTPLUG_CPU is not set
61# CONFIG_NO_IOPORT is not set 76# CONFIG_NO_IOPORT is not set
62CONFIG_GENERIC_GPIO=y 77CONFIG_GENERIC_GPIO=y
63# CONFIG_CPU_BIG_ENDIAN is not set 78CONFIG_CPU_BIG_ENDIAN=y
64CONFIG_CPU_LITTLE_ENDIAN=y 79# CONFIG_CPU_LITTLE_ENDIAN is not set
65CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 80CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
66CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y 81CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
67CONFIG_IRQ_CPU=y 82CONFIG_IRQ_CPU=y
@@ -94,6 +109,7 @@ CONFIG_CPU_TX49XX=y
94# CONFIG_CPU_SB1 is not set 109# CONFIG_CPU_SB1 is not set
95CONFIG_SYS_HAS_CPU_TX49XX=y 110CONFIG_SYS_HAS_CPU_TX49XX=y
96CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y 111CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
112CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
97CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 113CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
98CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y 114CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
99 115
@@ -115,13 +131,20 @@ CONFIG_CPU_HAS_SYNC=y
115CONFIG_GENERIC_HARDIRQS=y 131CONFIG_GENERIC_HARDIRQS=y
116CONFIG_GENERIC_IRQ_PROBE=y 132CONFIG_GENERIC_IRQ_PROBE=y
117CONFIG_ARCH_FLATMEM_ENABLE=y 133CONFIG_ARCH_FLATMEM_ENABLE=y
134CONFIG_ARCH_POPULATES_NODE_MAP=y
118CONFIG_FLATMEM=y 135CONFIG_FLATMEM=y
119CONFIG_FLAT_NODE_MEM_MAP=y 136CONFIG_FLAT_NODE_MEM_MAP=y
120# CONFIG_SPARSEMEM_STATIC is not set 137# CONFIG_SPARSEMEM_STATIC is not set
138# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
139CONFIG_PAGEFLAGS_EXTENDED=y
121CONFIG_SPLIT_PTLOCK_CPUS=4 140CONFIG_SPLIT_PTLOCK_CPUS=4
122# CONFIG_RESOURCES_64BIT is not set 141# CONFIG_RESOURCES_64BIT is not set
123CONFIG_ZONE_DMA_FLAG=0 142CONFIG_ZONE_DMA_FLAG=0
124CONFIG_VIRT_TO_BUS=y 143CONFIG_VIRT_TO_BUS=y
144CONFIG_TICK_ONESHOT=y
145CONFIG_NO_HZ=y
146CONFIG_HIGH_RES_TIMERS=y
147CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
125# CONFIG_HZ_48 is not set 148# CONFIG_HZ_48 is not set
126# CONFIG_HZ_100 is not set 149# CONFIG_HZ_100 is not set
127# CONFIG_HZ_128 is not set 150# CONFIG_HZ_128 is not set
@@ -156,19 +179,26 @@ CONFIG_SYSVIPC_SYSCTL=y
156CONFIG_IKCONFIG=y 179CONFIG_IKCONFIG=y
157CONFIG_IKCONFIG_PROC=y 180CONFIG_IKCONFIG_PROC=y
158CONFIG_LOG_BUF_SHIFT=14 181CONFIG_LOG_BUF_SHIFT=14
182# CONFIG_CGROUPS is not set
159CONFIG_SYSFS_DEPRECATED=y 183CONFIG_SYSFS_DEPRECATED=y
184CONFIG_SYSFS_DEPRECATED_V2=y
160# CONFIG_RELAY is not set 185# CONFIG_RELAY is not set
186# CONFIG_NAMESPACES is not set
161CONFIG_BLK_DEV_INITRD=y 187CONFIG_BLK_DEV_INITRD=y
162CONFIG_INITRAMFS_SOURCE="" 188CONFIG_INITRAMFS_SOURCE=""
189CONFIG_CC_OPTIMIZE_FOR_SIZE=y
163CONFIG_SYSCTL=y 190CONFIG_SYSCTL=y
164CONFIG_EMBEDDED=y 191CONFIG_EMBEDDED=y
165CONFIG_SYSCTL_SYSCALL=y 192CONFIG_SYSCTL_SYSCALL=y
193CONFIG_SYSCTL_SYSCALL_CHECK=y
166CONFIG_KALLSYMS=y 194CONFIG_KALLSYMS=y
167# CONFIG_KALLSYMS_EXTRA_PASS is not set 195# CONFIG_KALLSYMS_EXTRA_PASS is not set
168# CONFIG_HOTPLUG is not set 196# CONFIG_HOTPLUG is not set
169CONFIG_PRINTK=y 197CONFIG_PRINTK=y
170CONFIG_BUG=y 198CONFIG_BUG=y
171CONFIG_ELF_CORE=y 199CONFIG_ELF_CORE=y
200# CONFIG_PCSPKR_PLATFORM is not set
201CONFIG_COMPAT_BRK=y
172CONFIG_BASE_FULL=y 202CONFIG_BASE_FULL=y
173# CONFIG_FUTEX is not set 203# CONFIG_FUTEX is not set
174CONFIG_ANON_INODES=y 204CONFIG_ANON_INODES=y
@@ -181,9 +211,18 @@ CONFIG_VM_EVENT_COUNTERS=y
181CONFIG_SLAB=y 211CONFIG_SLAB=y
182# CONFIG_SLUB is not set 212# CONFIG_SLUB is not set
183# CONFIG_SLOB is not set 213# CONFIG_SLOB is not set
214# CONFIG_PROFILING is not set
215# CONFIG_MARKERS is not set
216CONFIG_HAVE_OPROFILE=y
217# CONFIG_HAVE_KPROBES is not set
218# CONFIG_HAVE_KRETPROBES is not set
219# CONFIG_HAVE_DMA_ATTRS is not set
220CONFIG_PROC_PAGE_MONITOR=y
221CONFIG_SLABINFO=y
184# CONFIG_TINY_SHMEM is not set 222# CONFIG_TINY_SHMEM is not set
185CONFIG_BASE_SMALL=0 223CONFIG_BASE_SMALL=0
186CONFIG_MODULES=y 224CONFIG_MODULES=y
225# CONFIG_MODULE_FORCE_LOAD is not set
187# CONFIG_MODULE_UNLOAD is not set 226# CONFIG_MODULE_UNLOAD is not set
188# CONFIG_MODVERSIONS is not set 227# CONFIG_MODVERSIONS is not set
189# CONFIG_MODULE_SRCVERSION_ALL is not set 228# CONFIG_MODULE_SRCVERSION_ALL is not set
@@ -205,20 +244,19 @@ CONFIG_DEFAULT_AS=y
205# CONFIG_DEFAULT_CFQ is not set 244# CONFIG_DEFAULT_CFQ is not set
206# CONFIG_DEFAULT_NOOP is not set 245# CONFIG_DEFAULT_NOOP is not set
207CONFIG_DEFAULT_IOSCHED="anticipatory" 246CONFIG_DEFAULT_IOSCHED="anticipatory"
247CONFIG_CLASSIC_RCU=y
208 248
209# 249#
210# Bus options (PCI, PCMCIA, EISA, ISA, TC) 250# Bus options (PCI, PCMCIA, EISA, ISA, TC)
211# 251#
212CONFIG_HW_HAS_PCI=y 252CONFIG_HW_HAS_PCI=y
213CONFIG_PCI=y 253CONFIG_PCI=y
254CONFIG_PCI_DOMAINS=y
214# CONFIG_ARCH_SUPPORTS_MSI is not set 255# CONFIG_ARCH_SUPPORTS_MSI is not set
256# CONFIG_PCI_LEGACY is not set
215CONFIG_MMU=y 257CONFIG_MMU=y
216 258
217# 259#
218# PCCARD (PCMCIA/CardBus) support
219#
220
221#
222# Executable file formats 260# Executable file formats
223# 261#
224CONFIG_BINFMT_ELF=y 262CONFIG_BINFMT_ELF=y
@@ -228,6 +266,7 @@ CONFIG_TRAD_SIGNALS=y
228# 266#
229# Power management options 267# Power management options
230# 268#
269CONFIG_ARCH_SUSPEND_POSSIBLE=y
231# CONFIG_PM is not set 270# CONFIG_PM is not set
232 271
233# 272#
@@ -262,26 +301,22 @@ CONFIG_IP_PNP=y
262# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 301# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
263# CONFIG_INET_XFRM_MODE_TUNNEL is not set 302# CONFIG_INET_XFRM_MODE_TUNNEL is not set
264# CONFIG_INET_XFRM_MODE_BEET is not set 303# CONFIG_INET_XFRM_MODE_BEET is not set
304# CONFIG_INET_LRO is not set
265CONFIG_INET_DIAG=y 305CONFIG_INET_DIAG=y
266CONFIG_INET_TCP_DIAG=y 306CONFIG_INET_TCP_DIAG=y
267# CONFIG_TCP_CONG_ADVANCED is not set 307# CONFIG_TCP_CONG_ADVANCED is not set
268CONFIG_TCP_CONG_CUBIC=y 308CONFIG_TCP_CONG_CUBIC=y
269CONFIG_DEFAULT_TCP_CONG="cubic" 309CONFIG_DEFAULT_TCP_CONG="cubic"
270# CONFIG_IPV6 is not set 310# CONFIG_IPV6 is not set
271# CONFIG_INET6_XFRM_TUNNEL is not set
272# CONFIG_INET6_TUNNEL is not set
273# CONFIG_NETWORK_SECMARK is not set 311# CONFIG_NETWORK_SECMARK is not set
274# CONFIG_NETFILTER is not set 312# CONFIG_NETFILTER is not set
313# CONFIG_ATM is not set
275# CONFIG_BRIDGE is not set 314# CONFIG_BRIDGE is not set
276# CONFIG_VLAN_8021Q is not set 315# CONFIG_VLAN_8021Q is not set
277# CONFIG_DECNET is not set 316# CONFIG_DECNET is not set
278# CONFIG_LLC2 is not set 317# CONFIG_LLC2 is not set
279# CONFIG_IPX is not set 318# CONFIG_IPX is not set
280# CONFIG_ATALK is not set 319# CONFIG_ATALK is not set
281
282#
283# QoS and/or fair queueing
284#
285# CONFIG_NET_SCHED is not set 320# CONFIG_NET_SCHED is not set
286 321
287# 322#
@@ -289,6 +324,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
289# 324#
290# CONFIG_NET_PKTGEN is not set 325# CONFIG_NET_PKTGEN is not set
291# CONFIG_HAMRADIO is not set 326# CONFIG_HAMRADIO is not set
327# CONFIG_CAN is not set
292# CONFIG_IRDA is not set 328# CONFIG_IRDA is not set
293# CONFIG_BT is not set 329# CONFIG_BT is not set
294 330
@@ -297,6 +333,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
297# 333#
298# CONFIG_CFG80211 is not set 334# CONFIG_CFG80211 is not set
299# CONFIG_WIRELESS_EXT is not set 335# CONFIG_WIRELESS_EXT is not set
336# CONFIG_MAC80211 is not set
300# CONFIG_IEEE80211 is not set 337# CONFIG_IEEE80211 is not set
301# CONFIG_RFKILL is not set 338# CONFIG_RFKILL is not set
302 339
@@ -325,10 +362,11 @@ CONFIG_BLK_DEV_LOOP=y
325CONFIG_BLK_DEV_RAM=y 362CONFIG_BLK_DEV_RAM=y
326CONFIG_BLK_DEV_RAM_COUNT=16 363CONFIG_BLK_DEV_RAM_COUNT=16
327CONFIG_BLK_DEV_RAM_SIZE=8192 364CONFIG_BLK_DEV_RAM_SIZE=8192
328CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 365# CONFIG_BLK_DEV_XIP is not set
329# CONFIG_CDROM_PKTCDVD is not set 366# CONFIG_CDROM_PKTCDVD is not set
330# CONFIG_ATA_OVER_ETH is not set 367# CONFIG_ATA_OVER_ETH is not set
331# CONFIG_MISC_DEVICES is not set 368# CONFIG_MISC_DEVICES is not set
369CONFIG_HAVE_IDE=y
332# CONFIG_IDE is not set 370# CONFIG_IDE is not set
333 371
334# 372#
@@ -340,10 +378,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
340# CONFIG_SCSI_NETLINK is not set 378# CONFIG_SCSI_NETLINK is not set
341# CONFIG_ATA is not set 379# CONFIG_ATA is not set
342# CONFIG_MD is not set 380# CONFIG_MD is not set
343
344#
345# Fusion MPT device support
346#
347# CONFIG_FUSION is not set 381# CONFIG_FUSION is not set
348 382
349# 383#
@@ -351,7 +385,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
351# 385#
352 386
353# 387#
354# An alternative FireWire stack is available with EXPERIMENTAL=y 388# A new alternative FireWire stack is available with EXPERIMENTAL=y
355# 389#
356# CONFIG_IEEE1394 is not set 390# CONFIG_IEEE1394 is not set
357# CONFIG_I2O is not set 391# CONFIG_I2O is not set
@@ -361,10 +395,27 @@ CONFIG_NETDEVICES=y
361# CONFIG_BONDING is not set 395# CONFIG_BONDING is not set
362# CONFIG_EQUALIZER is not set 396# CONFIG_EQUALIZER is not set
363# CONFIG_TUN is not set 397# CONFIG_TUN is not set
398# CONFIG_VETH is not set
364# CONFIG_ARCNET is not set 399# CONFIG_ARCNET is not set
365# CONFIG_PHYLIB is not set 400CONFIG_PHYLIB=y
401
402#
403# MII PHY device drivers
404#
405# CONFIG_MARVELL_PHY is not set
406# CONFIG_DAVICOM_PHY is not set
407# CONFIG_QSEMI_PHY is not set
408# CONFIG_LXT_PHY is not set
409# CONFIG_CICADA_PHY is not set
410# CONFIG_VITESSE_PHY is not set
411# CONFIG_SMSC_PHY is not set
412# CONFIG_BROADCOM_PHY is not set
413# CONFIG_ICPLUS_PHY is not set
414# CONFIG_REALTEK_PHY is not set
415# CONFIG_FIXED_PHY is not set
416# CONFIG_MDIO_BITBANG is not set
366CONFIG_NET_ETHERNET=y 417CONFIG_NET_ETHERNET=y
367CONFIG_MII=y 418# CONFIG_MII is not set
368# CONFIG_AX88796 is not set 419# CONFIG_AX88796 is not set
369# CONFIG_HAPPYMEAL is not set 420# CONFIG_HAPPYMEAL is not set
370# CONFIG_SUNGEM is not set 421# CONFIG_SUNGEM is not set
@@ -374,6 +425,10 @@ CONFIG_MII=y
374# CONFIG_NET_TULIP is not set 425# CONFIG_NET_TULIP is not set
375# CONFIG_HP100 is not set 426# CONFIG_HP100 is not set
376CONFIG_NE2000=y 427CONFIG_NE2000=y
428# CONFIG_IBM_NEW_EMAC_ZMII is not set
429# CONFIG_IBM_NEW_EMAC_RGMII is not set
430# CONFIG_IBM_NEW_EMAC_TAH is not set
431# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
377CONFIG_NET_PCI=y 432CONFIG_NET_PCI=y
378# CONFIG_PCNET32 is not set 433# CONFIG_PCNET32 is not set
379# CONFIG_AMD8111_ETH is not set 434# CONFIG_AMD8111_ETH is not set
@@ -381,13 +436,13 @@ CONFIG_NET_PCI=y
381# CONFIG_B44 is not set 436# CONFIG_B44 is not set
382# CONFIG_FORCEDETH is not set 437# CONFIG_FORCEDETH is not set
383CONFIG_TC35815=y 438CONFIG_TC35815=y
384# CONFIG_DGRS is not set
385# CONFIG_EEPRO100 is not set 439# CONFIG_EEPRO100 is not set
386# CONFIG_E100 is not set 440# CONFIG_E100 is not set
387# CONFIG_FEALNX is not set 441# CONFIG_FEALNX is not set
388# CONFIG_NATSEMI is not set 442# CONFIG_NATSEMI is not set
389# CONFIG_NE2K_PCI is not set 443# CONFIG_NE2K_PCI is not set
390# CONFIG_8139TOO is not set 444# CONFIG_8139TOO is not set
445# CONFIG_R6040 is not set
391# CONFIG_SIS900 is not set 446# CONFIG_SIS900 is not set
392# CONFIG_EPIC100 is not set 447# CONFIG_EPIC100 is not set
393# CONFIG_SUNDANCE is not set 448# CONFIG_SUNDANCE is not set
@@ -402,6 +457,7 @@ CONFIG_TC35815=y
402# 457#
403# CONFIG_WLAN_PRE80211 is not set 458# CONFIG_WLAN_PRE80211 is not set
404# CONFIG_WLAN_80211 is not set 459# CONFIG_WLAN_80211 is not set
460# CONFIG_IWLWIFI_LEDS is not set
405# CONFIG_WAN is not set 461# CONFIG_WAN is not set
406# CONFIG_FDDI is not set 462# CONFIG_FDDI is not set
407# CONFIG_PPP is not set 463# CONFIG_PPP is not set
@@ -426,6 +482,7 @@ CONFIG_TC35815=y
426# Character devices 482# Character devices
427# 483#
428# CONFIG_VT is not set 484# CONFIG_VT is not set
485CONFIG_DEVKMEM=y
429# CONFIG_SERIAL_NONSTANDARD is not set 486# CONFIG_SERIAL_NONSTANDARD is not set
430 487
431# 488#
@@ -449,17 +506,11 @@ CONFIG_LEGACY_PTYS=y
449CONFIG_LEGACY_PTY_COUNT=256 506CONFIG_LEGACY_PTY_COUNT=256
450# CONFIG_IPMI_HANDLER is not set 507# CONFIG_IPMI_HANDLER is not set
451# CONFIG_HW_RANDOM is not set 508# CONFIG_HW_RANDOM is not set
452# CONFIG_RTC is not set
453# CONFIG_R3964 is not set 509# CONFIG_R3964 is not set
454# CONFIG_APPLICOM is not set 510# CONFIG_APPLICOM is not set
455# CONFIG_DRM is not set
456# CONFIG_RAW_DRIVER is not set 511# CONFIG_RAW_DRIVER is not set
457CONFIG_DEVPORT=y 512CONFIG_DEVPORT=y
458# CONFIG_I2C is not set 513# CONFIG_I2C is not set
459
460#
461# SPI support
462#
463CONFIG_SPI=y 514CONFIG_SPI=y
464CONFIG_SPI_MASTER=y 515CONFIG_SPI_MASTER=y
465 516
@@ -473,9 +524,25 @@ CONFIG_SPI_TXX9=y
473# 524#
474CONFIG_SPI_AT25=y 525CONFIG_SPI_AT25=y
475# CONFIG_SPI_TLE62X0 is not set 526# CONFIG_SPI_TLE62X0 is not set
527CONFIG_HAVE_GPIO_LIB=y
528
529#
530# GPIO Support
531#
532
533#
534# I2C GPIO expanders:
535#
536
537#
538# SPI GPIO expanders:
539#
540# CONFIG_GPIO_MCP23S08 is not set
476# CONFIG_W1 is not set 541# CONFIG_W1 is not set
477# CONFIG_POWER_SUPPLY is not set 542# CONFIG_POWER_SUPPLY is not set
478# CONFIG_HWMON is not set 543# CONFIG_HWMON is not set
544# CONFIG_THERMAL is not set
545# CONFIG_THERMAL_HWMON is not set
479CONFIG_WATCHDOG=y 546CONFIG_WATCHDOG=y
480# CONFIG_WATCHDOG_NOWAYOUT is not set 547# CONFIG_WATCHDOG_NOWAYOUT is not set
481 548
@@ -492,29 +559,46 @@ CONFIG_TXX9_WDT=m
492# CONFIG_WDTPCI is not set 559# CONFIG_WDTPCI is not set
493 560
494# 561#
562# Sonics Silicon Backplane
563#
564CONFIG_SSB_POSSIBLE=y
565# CONFIG_SSB is not set
566
567#
495# Multifunction device drivers 568# Multifunction device drivers
496# 569#
497# CONFIG_MFD_SM501 is not set 570# CONFIG_MFD_SM501 is not set
571# CONFIG_HTC_PASIC3 is not set
498 572
499# 573#
500# Multimedia devices 574# Multimedia devices
501# 575#
576
577#
578# Multimedia core support
579#
502# CONFIG_VIDEO_DEV is not set 580# CONFIG_VIDEO_DEV is not set
503# CONFIG_DVB_CORE is not set 581# CONFIG_DVB_CORE is not set
582# CONFIG_VIDEO_MEDIA is not set
583
584#
585# Multimedia drivers
586#
504# CONFIG_DAB is not set 587# CONFIG_DAB is not set
505 588
506# 589#
507# Graphics support 590# Graphics support
508# 591#
592# CONFIG_DRM is not set
593# CONFIG_VGASTATE is not set
594# CONFIG_VIDEO_OUTPUT_CONTROL is not set
595# CONFIG_FB is not set
509# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 596# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
510 597
511# 598#
512# Display device support 599# Display device support
513# 600#
514# CONFIG_DISPLAY_SUPPORT is not set 601# CONFIG_DISPLAY_SUPPORT is not set
515# CONFIG_VGASTATE is not set
516# CONFIG_VIDEO_OUTPUT_CONTROL is not set
517# CONFIG_FB is not set
518 602
519# 603#
520# Sound 604# Sound
@@ -522,7 +606,9 @@ CONFIG_TXX9_WDT=m
522# CONFIG_SOUND is not set 606# CONFIG_SOUND is not set
523# CONFIG_USB_SUPPORT is not set 607# CONFIG_USB_SUPPORT is not set
524# CONFIG_MMC is not set 608# CONFIG_MMC is not set
609# CONFIG_MEMSTICK is not set
525# CONFIG_NEW_LEDS is not set 610# CONFIG_NEW_LEDS is not set
611# CONFIG_ACCESSIBILITY is not set
526# CONFIG_INFINIBAND is not set 612# CONFIG_INFINIBAND is not set
527CONFIG_RTC_LIB=y 613CONFIG_RTC_LIB=y
528CONFIG_RTC_CLASS=y 614CONFIG_RTC_CLASS=y
@@ -542,16 +628,18 @@ CONFIG_RTC_INTF_DEV_UIE_EMUL=y
542# 628#
543# SPI RTC drivers 629# SPI RTC drivers
544# 630#
545CONFIG_RTC_DRV_RS5C348=y
546# CONFIG_RTC_DRV_MAX6902 is not set 631# CONFIG_RTC_DRV_MAX6902 is not set
632# CONFIG_RTC_DRV_R9701 is not set
633CONFIG_RTC_DRV_RS5C348=y
547 634
548# 635#
549# Platform RTC drivers 636# Platform RTC drivers
550# 637#
551# CONFIG_RTC_DRV_CMOS is not set 638# CONFIG_RTC_DRV_CMOS is not set
639# CONFIG_RTC_DRV_DS1511 is not set
552# CONFIG_RTC_DRV_DS1553 is not set 640# CONFIG_RTC_DRV_DS1553 is not set
641CONFIG_RTC_DRV_DS1742=y
553# CONFIG_RTC_DRV_STK17TA8 is not set 642# CONFIG_RTC_DRV_STK17TA8 is not set
554# CONFIG_RTC_DRV_DS1742 is not set
555# CONFIG_RTC_DRV_M48T86 is not set 643# CONFIG_RTC_DRV_M48T86 is not set
556# CONFIG_RTC_DRV_M48T59 is not set 644# CONFIG_RTC_DRV_M48T59 is not set
557# CONFIG_RTC_DRV_V3020 is not set 645# CONFIG_RTC_DRV_V3020 is not set
@@ -559,23 +647,6 @@ CONFIG_RTC_DRV_RS5C348=y
559# 647#
560# on-CPU RTC drivers 648# on-CPU RTC drivers
561# 649#
562
563#
564# DMA Engine support
565#
566# CONFIG_DMA_ENGINE is not set
567
568#
569# DMA Clients
570#
571
572#
573# DMA Devices
574#
575
576#
577# Userspace I/O
578#
579# CONFIG_UIO is not set 650# CONFIG_UIO is not set
580 651
581# 652#
@@ -588,12 +659,10 @@ CONFIG_RTC_DRV_RS5C348=y
588CONFIG_FS_POSIX_ACL=y 659CONFIG_FS_POSIX_ACL=y
589# CONFIG_XFS_FS is not set 660# CONFIG_XFS_FS is not set
590# CONFIG_OCFS2_FS is not set 661# CONFIG_OCFS2_FS is not set
591# CONFIG_MINIX_FS is not set 662# CONFIG_DNOTIFY is not set
592# CONFIG_ROMFS_FS is not set
593CONFIG_INOTIFY=y 663CONFIG_INOTIFY=y
594CONFIG_INOTIFY_USER=y 664CONFIG_INOTIFY_USER=y
595# CONFIG_QUOTA is not set 665# CONFIG_QUOTA is not set
596# CONFIG_DNOTIFY is not set
597# CONFIG_AUTOFS_FS is not set 666# CONFIG_AUTOFS_FS is not set
598# CONFIG_AUTOFS4_FS is not set 667# CONFIG_AUTOFS4_FS is not set
599# CONFIG_FUSE_FS is not set 668# CONFIG_FUSE_FS is not set
@@ -622,7 +691,7 @@ CONFIG_SYSFS=y
622CONFIG_TMPFS=y 691CONFIG_TMPFS=y
623CONFIG_TMPFS_POSIX_ACL=y 692CONFIG_TMPFS_POSIX_ACL=y
624# CONFIG_HUGETLB_PAGE is not set 693# CONFIG_HUGETLB_PAGE is not set
625CONFIG_RAMFS=y 694# CONFIG_CONFIGFS_FS is not set
626 695
627# 696#
628# Miscellaneous filesystems 697# Miscellaneous filesystems
@@ -630,18 +699,16 @@ CONFIG_RAMFS=y
630# CONFIG_HFSPLUS_FS is not set 699# CONFIG_HFSPLUS_FS is not set
631# CONFIG_CRAMFS is not set 700# CONFIG_CRAMFS is not set
632# CONFIG_VXFS_FS is not set 701# CONFIG_VXFS_FS is not set
702# CONFIG_MINIX_FS is not set
633# CONFIG_HPFS_FS is not set 703# CONFIG_HPFS_FS is not set
634# CONFIG_QNX4FS_FS is not set 704# CONFIG_QNX4FS_FS is not set
705# CONFIG_ROMFS_FS is not set
635# CONFIG_SYSV_FS is not set 706# CONFIG_SYSV_FS is not set
636# CONFIG_UFS_FS is not set 707# CONFIG_UFS_FS is not set
637 708CONFIG_NETWORK_FILESYSTEMS=y
638#
639# Network File Systems
640#
641CONFIG_NFS_FS=y 709CONFIG_NFS_FS=y
642CONFIG_NFS_V3=y 710CONFIG_NFS_V3=y
643# CONFIG_NFS_V3_ACL is not set 711# CONFIG_NFS_V3_ACL is not set
644# CONFIG_NFS_DIRECTIO is not set
645# CONFIG_NFSD is not set 712# CONFIG_NFSD is not set
646CONFIG_ROOT_NFS=y 713CONFIG_ROOT_NFS=y
647CONFIG_LOCKD=y 714CONFIG_LOCKD=y
@@ -658,10 +725,6 @@ CONFIG_SUNRPC=y
658# 725#
659# CONFIG_PARTITION_ADVANCED is not set 726# CONFIG_PARTITION_ADVANCED is not set
660CONFIG_MSDOS_PARTITION=y 727CONFIG_MSDOS_PARTITION=y
661
662#
663# Native Language Support
664#
665# CONFIG_NLS is not set 728# CONFIG_NLS is not set
666 729
667# 730#
@@ -669,13 +732,15 @@ CONFIG_MSDOS_PARTITION=y
669# 732#
670CONFIG_TRACE_IRQFLAGS_SUPPORT=y 733CONFIG_TRACE_IRQFLAGS_SUPPORT=y
671# CONFIG_PRINTK_TIME is not set 734# CONFIG_PRINTK_TIME is not set
735CONFIG_ENABLE_WARN_DEPRECATED=y
672CONFIG_ENABLE_MUST_CHECK=y 736CONFIG_ENABLE_MUST_CHECK=y
737CONFIG_FRAME_WARN=1024
673# CONFIG_MAGIC_SYSRQ is not set 738# CONFIG_MAGIC_SYSRQ is not set
674# CONFIG_UNUSED_SYMBOLS is not set 739# CONFIG_UNUSED_SYMBOLS is not set
675# CONFIG_DEBUG_FS is not set 740CONFIG_DEBUG_FS=y
676# CONFIG_HEADERS_CHECK is not set 741# CONFIG_HEADERS_CHECK is not set
677# CONFIG_DEBUG_KERNEL is not set 742# CONFIG_DEBUG_KERNEL is not set
678CONFIG_CROSSCOMPILE=y 743# CONFIG_SAMPLES is not set
679CONFIG_CMDLINE="" 744CONFIG_CMDLINE=""
680CONFIG_SYS_SUPPORTS_KGDB=y 745CONFIG_SYS_SUPPORTS_KGDB=y
681 746
@@ -690,6 +755,7 @@ CONFIG_SYS_SUPPORTS_KGDB=y
690# Library routines 755# Library routines
691# 756#
692CONFIG_BITREVERSE=y 757CONFIG_BITREVERSE=y
758# CONFIG_GENERIC_FIND_FIRST_BIT is not set
693# CONFIG_CRC_CCITT is not set 759# CONFIG_CRC_CCITT is not set
694# CONFIG_CRC16 is not set 760# CONFIG_CRC16 is not set
695# CONFIG_CRC_ITU_T is not set 761# CONFIG_CRC_ITU_T is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 56371b860eb0..0f4da0325ea4 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 4b8799802788..1ea97865f2ce 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24# CONFIG_MACH_VR41XX is not set 22# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
deleted file mode 100644
index 3ee75b15c0b0..000000000000
--- a/arch/mips/configs/sead_defconfig
+++ /dev/null
@@ -1,642 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20
4# Sun Feb 18 21:28:10 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_ZONE_DMA=y
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set
26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set
31CONFIG_MIPS_SEAD=y
32# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set
35# CONFIG_MIPS_XXS1500 is not set
36# CONFIG_PNX8550_JBS is not set
37# CONFIG_PNX8550_STB810 is not set
38# CONFIG_MACH_VR41XX is not set
39# CONFIG_PMC_YOSEMITE is not set
40# CONFIG_MARKEINS is not set
41# CONFIG_SGI_IP22 is not set
42# CONFIG_SGI_IP27 is not set
43# CONFIG_SGI_IP32 is not set
44# CONFIG_SIBYTE_BIGSUR is not set
45# CONFIG_SIBYTE_SWARM is not set
46# CONFIG_SIBYTE_SENTOSA is not set
47# CONFIG_SIBYTE_RHONE is not set
48# CONFIG_SIBYTE_CARMEL is not set
49# CONFIG_SIBYTE_LITTLESUR is not set
50# CONFIG_SIBYTE_CRHINE is not set
51# CONFIG_SIBYTE_CRHONE is not set
52# CONFIG_SNI_RM is not set
53# CONFIG_TOSHIBA_JMR3927 is not set
54# CONFIG_TOSHIBA_RBTX4927 is not set
55# CONFIG_TOSHIBA_RBTX4938 is not set
56CONFIG_RWSEM_GENERIC_SPINLOCK=y
57# CONFIG_ARCH_HAS_ILOG2_U32 is not set
58# CONFIG_ARCH_HAS_ILOG2_U64 is not set
59CONFIG_GENERIC_FIND_NEXT_BIT=y
60CONFIG_GENERIC_HWEIGHT=y
61CONFIG_GENERIC_CALIBRATE_DELAY=y
62CONFIG_GENERIC_TIME=y
63CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
64# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
65CONFIG_DMA_NONCOHERENT=y
66CONFIG_DMA_NEED_PCI_MAP_STATE=y
67# CONFIG_CPU_BIG_ENDIAN is not set
68CONFIG_CPU_LITTLE_ENDIAN=y
69CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
70CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
71CONFIG_IRQ_CPU=y
72CONFIG_MIPS_BOARDS_GEN=y
73CONFIG_MIPS_L1_CACHE_SHIFT=5
74
75#
76# CPU selection
77#
78CONFIG_CPU_MIPS32_R1=y
79# CONFIG_CPU_MIPS32_R2 is not set
80# CONFIG_CPU_MIPS64_R1 is not set
81# CONFIG_CPU_MIPS64_R2 is not set
82# CONFIG_CPU_R3000 is not set
83# CONFIG_CPU_TX39XX is not set
84# CONFIG_CPU_VR41XX is not set
85# CONFIG_CPU_R4300 is not set
86# CONFIG_CPU_R4X00 is not set
87# CONFIG_CPU_TX49XX is not set
88# CONFIG_CPU_R5000 is not set
89# CONFIG_CPU_R5432 is not set
90# CONFIG_CPU_R6000 is not set
91# CONFIG_CPU_NEVADA is not set
92# CONFIG_CPU_R8000 is not set
93# CONFIG_CPU_R10000 is not set
94# CONFIG_CPU_RM7000 is not set
95# CONFIG_CPU_RM9000 is not set
96# CONFIG_CPU_SB1 is not set
97CONFIG_SYS_HAS_CPU_MIPS32_R1=y
98CONFIG_SYS_HAS_CPU_MIPS32_R2=y
99CONFIG_SYS_HAS_CPU_MIPS64_R1=y
100CONFIG_CPU_MIPS32=y
101CONFIG_CPU_MIPSR1=y
102CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
103CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
104CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
105
106#
107# Kernel type
108#
109CONFIG_32BIT=y
110# CONFIG_64BIT is not set
111CONFIG_PAGE_SIZE_4KB=y
112# CONFIG_PAGE_SIZE_8KB is not set
113# CONFIG_PAGE_SIZE_16KB is not set
114# CONFIG_PAGE_SIZE_64KB is not set
115CONFIG_CPU_HAS_PREFETCH=y
116CONFIG_MIPS_MT_DISABLED=y
117# CONFIG_MIPS_MT_SMP is not set
118# CONFIG_MIPS_MT_SMTC is not set
119# CONFIG_MIPS_VPE_LOADER is not set
120# CONFIG_64BIT_PHYS_ADDR is not set
121CONFIG_CPU_HAS_LLSC=y
122# CONFIG_CPU_HAS_SMARTMIPS is not set
123CONFIG_CPU_HAS_SYNC=y
124CONFIG_GENERIC_HARDIRQS=y
125CONFIG_GENERIC_IRQ_PROBE=y
126CONFIG_CPU_SUPPORTS_HIGHMEM=y
127CONFIG_SYS_SUPPORTS_SMARTMIPS=y
128CONFIG_ARCH_FLATMEM_ENABLE=y
129CONFIG_SELECT_MEMORY_MODEL=y
130CONFIG_FLATMEM_MANUAL=y
131# CONFIG_DISCONTIGMEM_MANUAL is not set
132# CONFIG_SPARSEMEM_MANUAL is not set
133CONFIG_FLATMEM=y
134CONFIG_FLAT_NODE_MEM_MAP=y
135# CONFIG_SPARSEMEM_STATIC is not set
136CONFIG_SPLIT_PTLOCK_CPUS=4
137# CONFIG_RESOURCES_64BIT is not set
138CONFIG_ZONE_DMA_FLAG=1
139# CONFIG_HZ_48 is not set
140# CONFIG_HZ_100 is not set
141# CONFIG_HZ_128 is not set
142# CONFIG_HZ_250 is not set
143# CONFIG_HZ_256 is not set
144CONFIG_HZ_1000=y
145# CONFIG_HZ_1024 is not set
146CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
147CONFIG_HZ=1000
148CONFIG_PREEMPT_NONE=y
149# CONFIG_PREEMPT_VOLUNTARY is not set
150# CONFIG_PREEMPT is not set
151# CONFIG_KEXEC is not set
152CONFIG_LOCKDEP_SUPPORT=y
153CONFIG_STACKTRACE_SUPPORT=y
154CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
155
156#
157# Code maturity level options
158#
159CONFIG_EXPERIMENTAL=y
160CONFIG_BROKEN_ON_SMP=y
161CONFIG_INIT_ENV_ARG_LIMIT=32
162
163#
164# General setup
165#
166CONFIG_LOCALVERSION=""
167CONFIG_LOCALVERSION_AUTO=y
168# CONFIG_SWAP is not set
169CONFIG_SYSVIPC=y
170# CONFIG_IPC_NS is not set
171CONFIG_SYSVIPC_SYSCTL=y
172# CONFIG_BSD_PROCESS_ACCT is not set
173# CONFIG_UTS_NS is not set
174# CONFIG_IKCONFIG is not set
175CONFIG_SYSFS_DEPRECATED=y
176CONFIG_RELAY=y
177CONFIG_INITRAMFS_SOURCE=""
178# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
179CONFIG_SYSCTL=y
180CONFIG_EMBEDDED=y
181CONFIG_SYSCTL_SYSCALL=y
182CONFIG_KALLSYMS=y
183# CONFIG_KALLSYMS_EXTRA_PASS is not set
184# CONFIG_HOTPLUG is not set
185CONFIG_PRINTK=y
186CONFIG_BUG=y
187CONFIG_ELF_CORE=y
188CONFIG_BASE_FULL=y
189CONFIG_FUTEX=y
190CONFIG_EPOLL=y
191CONFIG_SHMEM=y
192CONFIG_SLAB=y
193CONFIG_VM_EVENT_COUNTERS=y
194CONFIG_RT_MUTEXES=y
195# CONFIG_TINY_SHMEM is not set
196CONFIG_BASE_SMALL=0
197# CONFIG_SLOB is not set
198
199#
200# Loadable module support
201#
202# CONFIG_MODULES is not set
203
204#
205# Block layer
206#
207CONFIG_BLOCK=y
208# CONFIG_LBD is not set
209# CONFIG_BLK_DEV_IO_TRACE is not set
210# CONFIG_LSF is not set
211
212#
213# IO Schedulers
214#
215CONFIG_IOSCHED_NOOP=y
216CONFIG_IOSCHED_AS=y
217CONFIG_IOSCHED_DEADLINE=y
218CONFIG_IOSCHED_CFQ=y
219CONFIG_DEFAULT_AS=y
220# CONFIG_DEFAULT_DEADLINE is not set
221# CONFIG_DEFAULT_CFQ is not set
222# CONFIG_DEFAULT_NOOP is not set
223CONFIG_DEFAULT_IOSCHED="anticipatory"
224
225#
226# Bus options (PCI, PCMCIA, EISA, ISA, TC)
227#
228CONFIG_MMU=y
229
230#
231# PCCARD (PCMCIA/CardBus) support
232#
233
234#
235# PCI Hotplug Support
236#
237
238#
239# Executable file formats
240#
241CONFIG_BINFMT_ELF=y
242# CONFIG_BINFMT_MISC is not set
243CONFIG_TRAD_SIGNALS=y
244
245#
246# Power management options
247#
248CONFIG_PM=y
249# CONFIG_PM_LEGACY is not set
250# CONFIG_PM_DEBUG is not set
251# CONFIG_PM_SYSFS_DEPRECATED is not set
252
253#
254# Networking
255#
256# CONFIG_NET is not set
257
258#
259# Device Drivers
260#
261
262#
263# Generic Driver Options
264#
265CONFIG_STANDALONE=y
266CONFIG_PREVENT_FIRMWARE_BUILD=y
267# CONFIG_SYS_HYPERVISOR is not set
268
269#
270# Connector - unified userspace <-> kernelspace linker
271#
272
273#
274# Memory Technology Devices (MTD)
275#
276# CONFIG_MTD is not set
277
278#
279# Parallel port support
280#
281# CONFIG_PARPORT is not set
282
283#
284# Plug and Play support
285#
286
287#
288# Block devices
289#
290# CONFIG_BLK_DEV_COW_COMMON is not set
291CONFIG_BLK_DEV_LOOP=y
292# CONFIG_BLK_DEV_CRYPTOLOOP is not set
293CONFIG_BLK_DEV_RAM=y
294CONFIG_BLK_DEV_RAM_COUNT=16
295CONFIG_BLK_DEV_RAM_SIZE=18432
296CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
297CONFIG_BLK_DEV_INITRD=y
298# CONFIG_CDROM_PKTCDVD is not set
299
300#
301# Misc devices
302#
303
304#
305# ATA/ATAPI/MFM/RLL support
306#
307# CONFIG_IDE is not set
308
309#
310# SCSI device support
311#
312CONFIG_RAID_ATTRS=y
313# CONFIG_SCSI is not set
314# CONFIG_SCSI_NETLINK is not set
315
316#
317# Serial ATA (prod) and Parallel ATA (experimental) drivers
318#
319# CONFIG_ATA is not set
320
321#
322# Multi-device support (RAID and LVM)
323#
324# CONFIG_MD is not set
325
326#
327# Fusion MPT device support
328#
329# CONFIG_FUSION is not set
330
331#
332# IEEE 1394 (FireWire) support
333#
334
335#
336# I2O device support
337#
338
339#
340# ISDN subsystem
341#
342
343#
344# Telephony Support
345#
346# CONFIG_PHONE is not set
347
348#
349# Input device support
350#
351# CONFIG_INPUT is not set
352
353#
354# Hardware I/O ports
355#
356# CONFIG_SERIO is not set
357# CONFIG_GAMEPORT is not set
358
359#
360# Character devices
361#
362# CONFIG_VT is not set
363# CONFIG_SERIAL_NONSTANDARD is not set
364
365#
366# Serial drivers
367#
368CONFIG_SERIAL_8250=y
369CONFIG_SERIAL_8250_CONSOLE=y
370CONFIG_SERIAL_8250_NR_UARTS=4
371CONFIG_SERIAL_8250_RUNTIME_UARTS=4
372# CONFIG_SERIAL_8250_EXTENDED is not set
373
374#
375# Non-8250 serial port support
376#
377CONFIG_SERIAL_CORE=y
378CONFIG_SERIAL_CORE_CONSOLE=y
379CONFIG_UNIX98_PTYS=y
380CONFIG_LEGACY_PTYS=y
381CONFIG_LEGACY_PTY_COUNT=256
382
383#
384# IPMI
385#
386# CONFIG_IPMI_HANDLER is not set
387
388#
389# Watchdog Cards
390#
391# CONFIG_WATCHDOG is not set
392# CONFIG_HW_RANDOM is not set
393# CONFIG_RTC is not set
394# CONFIG_GEN_RTC is not set
395# CONFIG_DTLK is not set
396# CONFIG_R3964 is not set
397# CONFIG_RAW_DRIVER is not set
398
399#
400# TPM devices
401#
402# CONFIG_TCG_TPM is not set
403
404#
405# I2C support
406#
407# CONFIG_I2C is not set
408
409#
410# SPI support
411#
412# CONFIG_SPI is not set
413# CONFIG_SPI_MASTER is not set
414
415#
416# Dallas's 1-wire bus
417#
418# CONFIG_W1 is not set
419
420#
421# Hardware Monitoring support
422#
423# CONFIG_HWMON is not set
424# CONFIG_HWMON_VID is not set
425
426#
427# Multimedia devices
428#
429# CONFIG_VIDEO_DEV is not set
430
431#
432# Digital Video Broadcasting Devices
433#
434
435#
436# Graphics support
437#
438# CONFIG_FIRMWARE_EDID is not set
439# CONFIG_FB is not set
440# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
441
442#
443# Sound
444#
445# CONFIG_SOUND is not set
446
447#
448# USB support
449#
450# CONFIG_USB_ARCH_HAS_HCD is not set
451# CONFIG_USB_ARCH_HAS_OHCI is not set
452# CONFIG_USB_ARCH_HAS_EHCI is not set
453
454#
455# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
456#
457
458#
459# USB Gadget Support
460#
461# CONFIG_USB_GADGET is not set
462
463#
464# MMC/SD Card support
465#
466# CONFIG_MMC is not set
467
468#
469# LED devices
470#
471# CONFIG_NEW_LEDS is not set
472
473#
474# LED drivers
475#
476
477#
478# LED Triggers
479#
480
481#
482# InfiniBand support
483#
484
485#
486# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
487#
488
489#
490# Real Time Clock
491#
492# CONFIG_RTC_CLASS is not set
493
494#
495# DMA Engine support
496#
497# CONFIG_DMA_ENGINE is not set
498
499#
500# DMA Clients
501#
502
503#
504# DMA Devices
505#
506
507#
508# Auxiliary Display support
509#
510
511#
512# Virtualization
513#
514
515#
516# File systems
517#
518CONFIG_EXT2_FS=y
519# CONFIG_EXT2_FS_XATTR is not set
520# CONFIG_EXT2_FS_XIP is not set
521# CONFIG_EXT3_FS is not set
522# CONFIG_EXT4DEV_FS is not set
523# CONFIG_REISERFS_FS is not set
524# CONFIG_JFS_FS is not set
525# CONFIG_FS_POSIX_ACL is not set
526# CONFIG_XFS_FS is not set
527# CONFIG_GFS2_FS is not set
528# CONFIG_MINIX_FS is not set
529# CONFIG_ROMFS_FS is not set
530CONFIG_INOTIFY=y
531CONFIG_INOTIFY_USER=y
532# CONFIG_QUOTA is not set
533CONFIG_DNOTIFY=y
534# CONFIG_AUTOFS_FS is not set
535# CONFIG_AUTOFS4_FS is not set
536CONFIG_FUSE_FS=y
537
538#
539# CD-ROM/DVD Filesystems
540#
541# CONFIG_ISO9660_FS is not set
542# CONFIG_UDF_FS is not set
543
544#
545# DOS/FAT/NT Filesystems
546#
547# CONFIG_MSDOS_FS is not set
548# CONFIG_VFAT_FS is not set
549# CONFIG_NTFS_FS is not set
550
551#
552# Pseudo filesystems
553#
554CONFIG_PROC_FS=y
555CONFIG_PROC_KCORE=y
556CONFIG_PROC_SYSCTL=y
557CONFIG_SYSFS=y
558# CONFIG_TMPFS is not set
559# CONFIG_HUGETLB_PAGE is not set
560CONFIG_RAMFS=y
561# CONFIG_CONFIGFS_FS is not set
562
563#
564# Miscellaneous filesystems
565#
566# CONFIG_ADFS_FS is not set
567# CONFIG_AFFS_FS is not set
568# CONFIG_HFS_FS is not set
569# CONFIG_HFSPLUS_FS is not set
570# CONFIG_BEFS_FS is not set
571# CONFIG_BFS_FS is not set
572# CONFIG_EFS_FS is not set
573# CONFIG_CRAMFS is not set
574# CONFIG_VXFS_FS is not set
575# CONFIG_HPFS_FS is not set
576# CONFIG_QNX4FS_FS is not set
577# CONFIG_SYSV_FS is not set
578# CONFIG_UFS_FS is not set
579
580#
581# Partition Types
582#
583CONFIG_PARTITION_ADVANCED=y
584# CONFIG_ACORN_PARTITION is not set
585# CONFIG_OSF_PARTITION is not set
586# CONFIG_AMIGA_PARTITION is not set
587# CONFIG_ATARI_PARTITION is not set
588# CONFIG_MAC_PARTITION is not set
589# CONFIG_MSDOS_PARTITION is not set
590# CONFIG_LDM_PARTITION is not set
591# CONFIG_SGI_PARTITION is not set
592# CONFIG_ULTRIX_PARTITION is not set
593# CONFIG_SUN_PARTITION is not set
594# CONFIG_KARMA_PARTITION is not set
595# CONFIG_EFI_PARTITION is not set
596
597#
598# Native Language Support
599#
600# CONFIG_NLS is not set
601
602#
603# Profiling support
604#
605# CONFIG_PROFILING is not set
606
607#
608# Kernel hacking
609#
610CONFIG_TRACE_IRQFLAGS_SUPPORT=y
611# CONFIG_PRINTK_TIME is not set
612CONFIG_ENABLE_MUST_CHECK=y
613# CONFIG_MAGIC_SYSRQ is not set
614# CONFIG_UNUSED_SYMBOLS is not set
615# CONFIG_DEBUG_FS is not set
616# CONFIG_HEADERS_CHECK is not set
617# CONFIG_DEBUG_KERNEL is not set
618CONFIG_LOG_BUF_SHIFT=14
619CONFIG_CROSSCOMPILE=y
620CONFIG_CMDLINE=""
621
622#
623# Security options
624#
625# CONFIG_KEYS is not set
626# CONFIG_SECURITY is not set
627
628#
629# Cryptographic options
630#
631# CONFIG_CRYPTO is not set
632
633#
634# Library routines
635#
636# CONFIG_CRC_CCITT is not set
637CONFIG_CRC16=y
638# CONFIG_CRC32 is not set
639# CONFIG_LIBCRC32C is not set
640CONFIG_PLIST=y
641CONFIG_HAS_IOMEM=y
642CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig
index 8dd3ae39bcad..b5059881bc7e 100644
--- a/arch/mips/configs/tb0219_defconfig
+++ b/arch/mips/configs/tb0219_defconfig
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24CONFIG_MACH_VR41XX=y 22CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index 2ba240e897c6..b06a716bf23f 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24CONFIG_MACH_VR41XX=y 22CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index a5d0f3c55ed1..46512cf7ce04 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -16,9 +16,7 @@ CONFIG_MIPS=y
16# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set 17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LEMOTE_FULONG is not set
19# CONFIG_MIPS_ATLAS is not set
20# CONFIG_MIPS_MALTA is not set 19# CONFIG_MIPS_MALTA is not set
21# CONFIG_MIPS_SEAD is not set
22# CONFIG_MIPS_SIM is not set 20# CONFIG_MIPS_SIM is not set
23# CONFIG_MARKEINS is not set 21# CONFIG_MARKEINS is not set
24CONFIG_MACH_VR41XX=y 22CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index edf90b321fe6..b437eb7f8672 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -14,9 +14,7 @@ CONFIG_MIPS=y
14# CONFIG_MACH_DECSTATION is not set 14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set 15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set 16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set 17# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set 18# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set 19# CONFIG_MARKEINS is not set
22CONFIG_MACH_VR41XX=y 20CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index 2e3c683b2052..fc2c56731b98 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32CONFIG_WR_PPMC=y 30CONFIG_WR_PPMC=y
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index b6178ffbc523..7f86c43d1bda 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -26,9 +26,7 @@ CONFIG_ZONE_DMA=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 28# CONFIG_MACH_JAZZ is not set
29# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 29# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set 30# CONFIG_WR_PPMC is not set
33# CONFIG_MIPS_SIM is not set 31# CONFIG_MIPS_SIM is not set
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 32# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
index 0f791eb6bb66..5e92b3a9c5b8 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma2rh/common/prom.c
@@ -34,12 +34,11 @@
34 34
35const char *get_system_type(void) 35const char *get_system_type(void)
36{ 36{
37 switch (mips_machtype) { 37#if defined(CONFIG_MARKEINS)
38 case MACH_NEC_MARKEINS: 38 return "NEC EMMA2RH Mark-eins";
39 return "NEC EMMA2RH Mark-eins"; 39#else
40 default: 40#error Unknown NEC board
41 return "Unknown NEC board"; 41#endif
42 }
43} 42}
44 43
45/* [jsun@junsun.net] PMON passes arguments in C main() style */ 44/* [jsun@junsun.net] PMON passes arguments in C main() style */
@@ -63,10 +62,10 @@ void __init prom_init(void)
63 } 62 }
64 63
65#if defined(CONFIG_MARKEINS) 64#if defined(CONFIG_MARKEINS)
66 mips_machtype = MACH_NEC_MARKEINS;
67 add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM); 65 add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
66#else
67#error Unknown NEC board
68#endif 68#endif
69
70} 69}
71 70
72void __init prom_free_prom_memory(void) 71void __init prom_free_prom_memory(void)
diff --git a/arch/mips/fw/arc/identify.c b/arch/mips/fw/arc/identify.c
index 23066985a734..0ce9acf10c39 100644
--- a/arch/mips/fw/arc/identify.c
+++ b/arch/mips/fw/arc/identify.c
@@ -22,7 +22,6 @@
22struct smatch { 22struct smatch {
23 char *arcname; 23 char *arcname;
24 char *liname; 24 char *liname;
25 int type;
26 int flags; 25 int flags;
27}; 26};
28 27
@@ -30,47 +29,38 @@ static struct smatch mach_table[] = {
30 { 29 {
31 .arcname = "SGI-IP22", 30 .arcname = "SGI-IP22",
32 .liname = "SGI Indy", 31 .liname = "SGI Indy",
33 .type = MACH_SGI_IP22,
34 .flags = PROM_FLAG_ARCS, 32 .flags = PROM_FLAG_ARCS,
35 }, { 33 }, {
36 .arcname = "SGI-IP27", 34 .arcname = "SGI-IP27",
37 .liname = "SGI Origin", 35 .liname = "SGI Origin",
38 .type = MACH_SGI_IP27,
39 .flags = PROM_FLAG_ARCS, 36 .flags = PROM_FLAG_ARCS,
40 }, { 37 }, {
41 .arcname = "SGI-IP28", 38 .arcname = "SGI-IP28",
42 .liname = "SGI IP28", 39 .liname = "SGI IP28",
43 .type = MACH_SGI_IP28,
44 .flags = PROM_FLAG_ARCS, 40 .flags = PROM_FLAG_ARCS,
45 }, { 41 }, {
46 .arcname = "SGI-IP30", 42 .arcname = "SGI-IP30",
47 .liname = "SGI Octane", 43 .liname = "SGI Octane",
48 .type = MACH_SGI_IP30,
49 .flags = PROM_FLAG_ARCS, 44 .flags = PROM_FLAG_ARCS,
50 }, { 45 }, {
51 .arcname = "SGI-IP32", 46 .arcname = "SGI-IP32",
52 .liname = "SGI O2", 47 .liname = "SGI O2",
53 .type = MACH_SGI_IP32,
54 .flags = PROM_FLAG_ARCS, 48 .flags = PROM_FLAG_ARCS,
55 }, { 49 }, {
56 .arcname = "Microsoft-Jazz", 50 .arcname = "Microsoft-Jazz",
57 .liname = "Jazz MIPS_Magnum_4000", 51 .liname = "Jazz MIPS_Magnum_4000",
58 .type = MACH_MIPS_MAGNUM_4000,
59 .flags = 0, 52 .flags = 0,
60 }, { 53 }, {
61 .arcname = "PICA-61", 54 .arcname = "PICA-61",
62 .liname = "Jazz Acer_PICA_61", 55 .liname = "Jazz Acer_PICA_61",
63 .type = MACH_ACER_PICA_61,
64 .flags = 0, 56 .flags = 0,
65 }, { 57 }, {
66 .arcname = "RM200PCI", 58 .arcname = "RM200PCI",
67 .liname = "SNI RM200_PCI", 59 .liname = "SNI RM200_PCI",
68 .type = MACH_SNI_RM200_PCI,
69 .flags = PROM_FLAG_DONT_FREE_TEMP, 60 .flags = PROM_FLAG_DONT_FREE_TEMP,
70 }, { 61 }, {
71 .arcname = "RM200PCI-R5K", 62 .arcname = "RM200PCI-R5K",
72 .liname = "SNI RM200_PCI-R5K", 63 .liname = "SNI RM200_PCI-R5K",
73 .type = MACH_SNI_RM200_PCI,
74 .flags = PROM_FLAG_DONT_FREE_TEMP, 64 .flags = PROM_FLAG_DONT_FREE_TEMP,
75 } 65 }
76}; 66};
@@ -121,6 +111,5 @@ void __init prom_identify_arch(void)
121 mach = string_to_mach(iname); 111 mach = string_to_mach(iname);
122 system_type = mach->liname; 112 system_type = mach->liname;
123 113
124 mips_machtype = mach->type;
125 prom_flags = mach->flags; 114 prom_flags = mach->flags;
126} 115}
diff --git a/arch/mips/gt64120/wrppmc/reset.c b/arch/mips/gt64120/wrppmc/reset.c
index c355cff38f6c..cc5474b24f06 100644
--- a/arch/mips/gt64120/wrppmc/reset.c
+++ b/arch/mips/gt64120/wrppmc/reset.c
@@ -5,10 +5,12 @@
5 * 5 *
6 * Copyright (C) 1997 Ralf Baechle 6 * Copyright (C) 1997 Ralf Baechle
7 */ 7 */
8#include <linux/irqflags.h>
8#include <linux/kernel.h> 9#include <linux/kernel.h>
9 10
10#include <asm/cacheflush.h> 11#include <asm/cacheflush.h>
11#include <asm/mipsregs.h> 12#include <asm/mipsregs.h>
13#include <asm/processor.h>
12 14
13void wrppmc_machine_restart(char *command) 15void wrppmc_machine_restart(char *command)
14{ 16{
@@ -32,15 +34,7 @@ void wrppmc_machine_halt(void)
32 34
33 printk(KERN_NOTICE "You can safely turn off the power\n"); 35 printk(KERN_NOTICE "You can safely turn off the power\n");
34 while (1) { 36 while (1) {
35 __asm__( 37 if (cpu_wait)
36 ".set\tmips3\n\t" 38 cpu_wait();
37 "wait\n\t"
38 ".set\tmips0"
39 );
40 } 39 }
41} 40}
42
43void wrppmc_machine_power_off(void)
44{
45 wrppmc_machine_halt();
46}
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index 728ef6a80edd..ca65c84031a7 100644
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -98,11 +98,10 @@ void __init plat_mem_setup(void)
98{ 98{
99 extern void wrppmc_machine_restart(char *command); 99 extern void wrppmc_machine_restart(char *command);
100 extern void wrppmc_machine_halt(void); 100 extern void wrppmc_machine_halt(void);
101 extern void wrppmc_machine_power_off(void);
102 101
103 _machine_restart = wrppmc_machine_restart; 102 _machine_restart = wrppmc_machine_restart;
104 _machine_halt = wrppmc_machine_halt; 103 _machine_halt = wrppmc_machine_halt;
105 pm_power_off = wrppmc_machine_power_off; 104 pm_power_off = wrppmc_machine_halt;
106 105
107 /* This makes the operations of 'in/out[bwl]' to the 106 /* This makes the operations of 'in/out[bwl]' to the
108 * physical address ( < KSEG0) can work via KSEG1 107 * physical address ( < KSEG0) can work via KSEG1
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index a7947199c99b..f60524e8bc44 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -76,10 +76,8 @@ void __init plat_mem_setup(void)
76 76
77 set_io_port_base(JAZZ_PORT_BASE); 77 set_io_port_base(JAZZ_PORT_BASE);
78#ifdef CONFIG_EISA 78#ifdef CONFIG_EISA
79 if (mips_machtype == MACH_MIPS_MAGNUM_4000) 79 EISA_bus = 1;
80 EISA_bus = 1;
81#endif 80#endif
82 isa_slot_offset = 0xe3000000;
83 81
84 /* request I/O space for devices used on all i[345]86 PCs */ 82 /* request I/O space for devices used on all i[345]86 PCs */
85 for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++) 83 for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
diff --git a/arch/mips/jmr3927/common/Makefile b/arch/mips/jmr3927/common/Makefile
deleted file mode 100644
index 8fd4fcccf10e..000000000000
--- a/arch/mips/jmr3927/common/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the common code of TOSHIBA JMR-TX3927 board
3#
4
5obj-y += prom.o puts.o
6
7EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/jmr3927/common/puts.c b/arch/mips/jmr3927/common/puts.c
deleted file mode 100644
index c611ab497888..000000000000
--- a/arch/mips/jmr3927/common/puts.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Low level uart routines to directly access a TX[34]927 SIO.
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ahennessy@mvista.com or source@mvista.com
9 *
10 * Copyright (C) 2000-2001 Toshiba Corporation
11 *
12 * Based on arch/mips/au1000/common/puts.c
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
25 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * You should have received a copy of the GNU General Public License along
31 * with this program; if not, write to the Free Software Foundation, Inc.,
32 * 675 Mass Ave, Cambridge, MA 02139, USA.
33 */
34
35#include <asm/jmr3927/tx3927.h>
36
37#define TIMEOUT 0xffffff
38
39void
40prom_putchar(char c)
41{
42 int i = 0;
43
44 do {
45 i++;
46 if (i>TIMEOUT)
47 break;
48 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
49 tx3927_sioptr(1)->tfifo = c;
50 return;
51}
52
53void
54puts(const char *cp)
55{
56 while (*cp)
57 prom_putchar(*cp++);
58 prom_putchar('\r');
59 prom_putchar('\n');
60}
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
deleted file mode 100644
index 700b9cf8eb9d..000000000000
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ahennessy@mvista.com
5 *
6 * arch/mips/jmr3927/common/init.c
7 *
8 * Copyright (C) 2000-2001 Toshiba Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/init.h>
31#include <asm/bootinfo.h>
32#include <asm/jmr3927/jmr3927.h>
33
34extern void __init prom_init_cmdline(void);
35
36const char *get_system_type(void)
37{
38 return "Toshiba"
39#ifdef CONFIG_TOSHIBA_JMR3927
40 " JMR_TX3927"
41#endif
42 ;
43}
44
45extern void puts(const char *cp);
46
47void __init prom_init(void)
48{
49#ifdef CONFIG_TOSHIBA_JMR3927
50 /* CCFG */
51 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
52 puts("Warning: TX3927 TLB off\n");
53#endif
54
55 prom_init_cmdline();
56 add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
57}
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 65e46a6d4178..0fd31974ba28 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -20,9 +20,6 @@ obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o
20obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o 20obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
21obj-$(CONFIG_SYNC_R4K) += sync-r4k.o 21obj-$(CONFIG_SYNC_R4K) += sync-r4k.o
22 22
23binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
24 irix5sys.o sysirix.o
25
26obj-$(CONFIG_STACKTRACE) += stacktrace.o 23obj-$(CONFIG_STACKTRACE) += stacktrace.o
27obj-$(CONFIG_MODULES) += mips_ksyms.o module.o 24obj-$(CONFIG_MODULES) += mips_ksyms.o module.o
28 25
@@ -63,14 +60,13 @@ obj-$(CONFIG_I8259) += i8259.o
63obj-$(CONFIG_IRQ_CPU) += irq_cpu.o 60obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
64obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o 61obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
65obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o 62obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
66obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o 63obj-$(CONFIG_MIPS_MSC) += irq-msc01.o
67obj-$(CONFIG_IRQ_TXX9) += irq_txx9.o 64obj-$(CONFIG_IRQ_TXX9) += irq_txx9.o
68obj-$(CONFIG_IRQ_GT641XX) += irq-gt641xx.o 65obj-$(CONFIG_IRQ_GT641XX) += irq-gt641xx.o
69obj-$(CONFIG_IRQ_GIC) += irq-gic.o 66obj-$(CONFIG_IRQ_GIC) += irq-gic.o
70 67
71obj-$(CONFIG_32BIT) += scall32-o32.o 68obj-$(CONFIG_32BIT) += scall32-o32.o
72obj-$(CONFIG_64BIT) += scall64-64.o 69obj-$(CONFIG_64BIT) += scall64-64.o
73obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o
74obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o 70obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o
75obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o 71obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
76obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o 72obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o
diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c
index 9dccfa4752b2..9ae813eb782e 100644
--- a/arch/mips/kernel/early_printk.c
+++ b/arch/mips/kernel/early_printk.c
@@ -10,6 +10,8 @@
10#include <linux/console.h> 10#include <linux/console.h>
11#include <linux/init.h> 11#include <linux/init.h>
12 12
13#include <asm/setup.h>
14
13extern void prom_putchar(char); 15extern void prom_putchar(char);
14 16
15static void __init 17static void __init
diff --git a/arch/mips/kernel/gpio_txx9.c b/arch/mips/kernel/gpio_txx9.c
index b1436a857998..c6854d9df926 100644
--- a/arch/mips/kernel/gpio_txx9.c
+++ b/arch/mips/kernel/gpio_txx9.c
@@ -47,23 +47,25 @@ static void txx9_gpio_set(struct gpio_chip *chip, unsigned int offset,
47 47
48static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset) 48static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset)
49{ 49{
50 spin_lock_irq(&txx9_gpio_lock); 50 unsigned long flags;
51 spin_lock_irqsave(&txx9_gpio_lock, flags);
51 __raw_writel(__raw_readl(&txx9_pioptr->dir) & ~(1 << offset), 52 __raw_writel(__raw_readl(&txx9_pioptr->dir) & ~(1 << offset),
52 &txx9_pioptr->dir); 53 &txx9_pioptr->dir);
53 mmiowb(); 54 mmiowb();
54 spin_unlock_irq(&txx9_gpio_lock); 55 spin_unlock_irqrestore(&txx9_gpio_lock, flags);
55 return 0; 56 return 0;
56} 57}
57 58
58static int txx9_gpio_dir_out(struct gpio_chip *chip, unsigned int offset, 59static int txx9_gpio_dir_out(struct gpio_chip *chip, unsigned int offset,
59 int value) 60 int value)
60{ 61{
61 spin_lock_irq(&txx9_gpio_lock); 62 unsigned long flags;
63 spin_lock_irqsave(&txx9_gpio_lock, flags);
62 txx9_gpio_set_raw(offset, value); 64 txx9_gpio_set_raw(offset, value);
63 __raw_writel(__raw_readl(&txx9_pioptr->dir) | (1 << offset), 65 __raw_writel(__raw_readl(&txx9_pioptr->dir) | (1 << offset),
64 &txx9_pioptr->dir); 66 &txx9_pioptr->dir);
65 mmiowb(); 67 mmiowb();
66 spin_unlock_irq(&txx9_gpio_lock); 68 spin_unlock_irqrestore(&txx9_gpio_lock, flags);
67 return 0; 69 return 0;
68} 70}
69 71
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index 38fa1a194bf4..b6ac55162b9a 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -80,7 +80,7 @@ static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
80 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC - 80 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
81 * !using_apic_timer decisions in do_timer_interrupt_hook() 81 * !using_apic_timer decisions in do_timer_interrupt_hook()
82 */ 82 */
83struct clock_event_device pit_clockevent = { 83static struct clock_event_device pit_clockevent = {
84 .name = "pit", 84 .name = "pit",
85 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 85 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
86 .set_mode = init_pit_timer, 86 .set_mode = init_pit_timer,
diff --git a/arch/mips/kernel/irix5sys.S b/arch/mips/kernel/irix5sys.S
deleted file mode 100644
index eeef891093ed..000000000000
--- a/arch/mips/kernel/irix5sys.S
+++ /dev/null
@@ -1,1041 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * 32-bit IRIX5 ABI system call table derived from original file 'irix5sys.h'
7 * created by David S. Miller.
8 *
9 * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
10 * Copyright (C) 2004 Steven J. Hill <sjhill@realitydiluted.com>
11 */
12#include <asm/asm.h>
13
14 /*
15 * Key:
16 * V == Valid and should work as expected for most cases.
17 * HV == Half Valid, some things will work, some likely will not
18 * IV == InValid, certainly will not work at all yet
19 * ?V == ?'ably Valid, I have not done enough looking into it
20 * DC == Don't Care, a rats ass we couldn't give
21 */
22
23 .macro irix5syscalltable
24
25 sys sys_syscall 0 /* 1000 sysindir() V*/
26 sys sys_exit 1 /* 1001 exit() V*/
27 sys sys_fork 0 /* 1002 fork() V*/
28 sys sys_read 3 /* 1003 read() V*/
29 sys sys_write 3 /* 1004 write() V*/
30 sys sys_open 3 /* 1005 open() V*/
31 sys sys_close 1 /* 1006 close() V*/
32 sys irix_unimp 0 /* 1007 (XXX IRIX 4 wait) V*/
33 sys sys_creat 2 /* 1008 creat() V*/
34 sys sys_link 2 /* 1009 link() V*/
35 sys sys_unlink 1 /* 1010 unlink() V*/
36 sys irix_exec 0 /* 1011 exec() V*/
37 sys sys_chdir 1 /* 1012 chdir() V*/
38 sys irix_gtime 0 /* 1013 time() V*/
39 sys irix_unimp 0 /* 1014 (XXX IRIX 4 mknod) V*/
40 sys sys_chmod 2 /* 1015 chmod() V*/
41 sys sys_chown 3 /* 1016 chown() V*/
42 sys irix_brk 1 /* 1017 break() V*/
43 sys irix_unimp 0 /* 1018 (XXX IRIX 4 stat) V*/
44 sys sys_lseek 3 /* 1019 lseek() XXX64bit HV*/
45 sys irix_getpid 0 /* 1020 getpid() V*/
46 sys irix_mount 6 /* 1021 mount() IV*/
47 sys sys_umount 1 /* 1022 umount() V*/
48 sys sys_setuid 1 /* 1023 setuid() V*/
49 sys irix_getuid 0 /* 1024 getuid() V*/
50 sys irix_stime 1 /* 1025 stime() V*/
51 sys irix_unimp 4 /* 1026 XXX ptrace() IV*/
52 sys irix_alarm 1 /* 1027 alarm() V*/
53 sys irix_unimp 0 /* 1028 (XXX IRIX 4 fstat) V*/
54 sys irix_pause 0 /* 1029 pause() V*/
55 sys sys_utime 2 /* 1030 utime() V*/
56 sys irix_unimp 0 /* 1031 nuthin' V*/
57 sys irix_unimp 0 /* 1032 nobody home man... V*/
58 sys sys_access 2 /* 1033 access() V*/
59 sys sys_nice 1 /* 1034 nice() V*/
60 sys irix_statfs 2 /* 1035 statfs() V*/
61 sys sys_sync 0 /* 1036 sync() V*/
62 sys sys_kill 2 /* 1037 kill() V*/
63 sys irix_fstatfs 2 /* 1038 fstatfs() V*/
64 sys irix_setpgrp 1 /* 1039 setpgrp() V*/
65 sys irix_syssgi 0 /* 1040 syssgi() HV*/
66 sys sys_dup 1 /* 1041 dup() V*/
67 sys sys_pipe 0 /* 1042 pipe() V*/
68 sys irix_times 1 /* 1043 times() V*/
69 sys irix_unimp 0 /* 1044 XXX profil() IV*/
70 sys irix_unimp 0 /* 1045 XXX lock() IV*/
71 sys sys_setgid 1 /* 1046 setgid() V*/
72 sys irix_getgid 0 /* 1047 getgid() V*/
73 sys irix_unimp 0 /* 1048 (XXX IRIX 4 ssig) V*/
74 sys irix_msgsys 6 /* 1049 sys_msgsys V*/
75 sys sys_sysmips 4 /* 1050 sysmips() HV*/
76 sys irix_unimp 0 /* 1051 XXX sysacct() IV*/
77 sys irix_shmsys 5 /* 1052 sys_shmsys V*/
78 sys irix_semsys 0 /* 1053 sys_semsys V*/
79 sys irix_ioctl 3 /* 1054 ioctl() HV*/
80 sys irix_uadmin 0 /* 1055 XXX sys_uadmin() HC*/
81 sys irix_sysmp 0 /* 1056 sysmp() HV*/
82 sys irix_utssys 4 /* 1057 sys_utssys() HV*/
83 sys irix_unimp 0 /* 1058 nada enchilada V*/
84 sys irix_exece 0 /* 1059 exece() V*/
85 sys sys_umask 1 /* 1060 umask() V*/
86 sys sys_chroot 1 /* 1061 chroot() V*/
87 sys irix_fcntl 3 /* 1062 fcntl() ?V*/
88 sys irix_ulimit 2 /* 1063 ulimit() HV*/
89 sys irix_unimp 0 /* 1064 XXX AFS shit DC*/
90 sys irix_unimp 0 /* 1065 XXX AFS shit DC*/
91 sys irix_unimp 0 /* 1066 XXX AFS shit DC*/
92 sys irix_unimp 0 /* 1067 XXX AFS shit DC*/
93 sys irix_unimp 0 /* 1068 XXX AFS shit DC*/
94 sys irix_unimp 0 /* 1069 XXX AFS shit DC*/
95 sys irix_unimp 0 /* 1070 XXX AFS shit DC*/
96 sys irix_unimp 0 /* 1071 XXX AFS shit DC*/
97 sys irix_unimp 0 /* 1072 XXX AFS shit DC*/
98 sys irix_unimp 0 /* 1073 XXX AFS shit DC*/
99 sys irix_unimp 0 /* 1074 nuttin' V*/
100 sys irix_unimp 0 /* 1075 XXX sys_getrlimit64()IV*/
101 sys irix_unimp 0 /* 1076 XXX sys_setrlimit64()IV*/
102 sys sys_nanosleep 2 /* 1077 nanosleep() V*/
103 sys irix_lseek64 5 /* 1078 lseek64() ?V*/
104 sys sys_rmdir 1 /* 1079 rmdir() V*/
105 sys sys_mkdir 2 /* 1080 mkdir() V*/
106 sys sys_getdents 3 /* 1081 getdents() V*/
107 sys irix_sginap 1 /* 1082 sys_sginap() V*/
108 sys irix_sgikopt 3 /* 1083 sys_sgikopt() DC*/
109 sys sys_sysfs 3 /* 1084 sysfs() ?V*/
110 sys irix_unimp 0 /* 1085 XXX sys_getmsg() DC*/
111 sys irix_unimp 0 /* 1086 XXX sys_putmsg() DC*/
112 sys sys_poll 3 /* 1087 poll() V*/
113 sys irix_sigreturn 0 /* 1088 sigreturn() ?V*/
114 sys sys_accept 3 /* 1089 accept() V*/
115 sys sys_bind 3 /* 1090 bind() V*/
116 sys sys_connect 3 /* 1091 connect() V*/
117 sys irix_gethostid 0 /* 1092 sys_gethostid() ?V*/
118 sys sys_getpeername 3 /* 1093 getpeername() V*/
119 sys sys_getsockname 3 /* 1094 getsockname() V*/
120 sys sys_getsockopt 5 /* 1095 getsockopt() V*/
121 sys sys_listen 2 /* 1096 listen() V*/
122 sys sys_recv 4 /* 1097 recv() V*/
123 sys sys_recvfrom 6 /* 1098 recvfrom() V*/
124 sys sys_recvmsg 3 /* 1099 recvmsg() V*/
125 sys sys_select 5 /* 1100 select() V*/
126 sys sys_send 4 /* 1101 send() V*/
127 sys sys_sendmsg 3 /* 1102 sendmsg() V*/
128 sys sys_sendto 6 /* 1103 sendto() V*/
129 sys irix_sethostid 1 /* 1104 sys_sethostid() ?V*/
130 sys sys_setsockopt 5 /* 1105 setsockopt() V*/
131 sys sys_shutdown 2 /* 1106 shutdown() ?V*/
132 sys irix_socket 3 /* 1107 socket() V*/
133 sys sys_gethostname 2 /* 1108 sys_gethostname() ?V*/
134 sys sys_sethostname 2 /* 1109 sethostname() ?V*/
135 sys irix_getdomainname 2 /* 1110 sys_getdomainname() ?V*/
136 sys sys_setdomainname 2 /* 1111 setdomainname() ?V*/
137 sys sys_truncate 2 /* 1112 truncate() V*/
138 sys sys_ftruncate 2 /* 1113 ftruncate() V*/
139 sys sys_rename 2 /* 1114 rename() V*/
140 sys sys_symlink 2 /* 1115 symlink() V*/
141 sys sys_readlink 3 /* 1116 readlink() V*/
142 sys irix_unimp 0 /* 1117 XXX IRIX 4 lstat() DC*/
143 sys irix_unimp 0 /* 1118 nothin' V*/
144 sys irix_unimp 0 /* 1119 XXX nfs_svc() DC*/
145 sys irix_unimp 0 /* 1120 XXX nfs_getfh() DC*/
146 sys irix_unimp 0 /* 1121 XXX async_daemon() DC*/
147 sys irix_unimp 0 /* 1122 XXX exportfs() DC*/
148 sys sys_setregid 2 /* 1123 setregid() V*/
149 sys sys_setreuid 2 /* 1124 setreuid() V*/
150 sys sys_getitimer 2 /* 1125 getitimer() V*/
151 sys sys_setitimer 3 /* 1126 setitimer() V*/
152 sys irix_unimp 1 /* 1127 XXX adjtime() IV*/
153 sys irix_gettimeofday 1 /* 1128 gettimeofday() V*/
154 sys irix_unimp 0 /* 1129 XXX sproc() IV*/
155 sys irix_prctl 0 /* 1130 prctl() HV*/
156 sys irix_unimp 0 /* 1131 XXX procblk() IV*/
157 sys irix_unimp 0 /* 1132 XXX sprocsp() IV*/
158 sys irix_unimp 0 /* 1133 XXX sgigsc() IV*/
159 sys irix_mmap32 6 /* 1134 mmap() XXXflags? ?V*/
160 sys sys_munmap 2 /* 1135 munmap() V*/
161 sys sys_mprotect 3 /* 1136 mprotect() V*/
162 sys sys_msync 4 /* 1137 msync() V*/
163 sys irix_madvise 3 /* 1138 madvise() DC*/
164 sys irix_pagelock 3 /* 1139 pagelock() IV*/
165 sys irix_getpagesize 0 /* 1140 getpagesize() V*/
166 sys irix_quotactl 0 /* 1141 quotactl() V*/
167 sys irix_unimp 0 /* 1142 nobody home man V*/
168 sys sys_getpgid 1 /* 1143 BSD getpgrp() V*/
169 sys irix_BSDsetpgrp 2 /* 1143 BSD setpgrp() V*/
170 sys sys_vhangup 0 /* 1144 vhangup() V*/
171 sys sys_fsync 1 /* 1145 fsync() V*/
172 sys sys_fchdir 1 /* 1146 fchdir() V*/
173 sys sys_getrlimit 2 /* 1147 getrlimit() ?V*/
174 sys sys_setrlimit 2 /* 1148 setrlimit() ?V*/
175 sys sys_cacheflush 3 /* 1150 cacheflush() HV*/
176 sys sys_cachectl 3 /* 1151 cachectl() HV*/
177 sys sys_fchown 3 /* 1152 fchown() ?V*/
178 sys sys_fchmod 2 /* 1153 fchmod() ?V*/
179 sys irix_unimp 0 /* 1154 XXX IRIX 4 wait3() V*/
180 sys sys_socketpair 4 /* 1155 socketpair() V*/
181 sys irix_systeminfo 3 /* 1156 systeminfo() IV*/
182 sys irix_uname 1 /* 1157 uname() IV*/
183 sys irix_xstat 3 /* 1158 xstat() V*/
184 sys irix_lxstat 3 /* 1159 lxstat() V*/
185 sys irix_fxstat 3 /* 1160 fxstat() V*/
186 sys irix_xmknod 0 /* 1161 xmknod() ?V*/
187 sys irix_sigaction 4 /* 1162 sigaction() ?V*/
188 sys irix_sigpending 1 /* 1163 sigpending() ?V*/
189 sys irix_sigprocmask 3 /* 1164 sigprocmask() ?V*/
190 sys irix_sigsuspend 0 /* 1165 sigsuspend() ?V*/
191 sys irix_sigpoll_sys 3 /* 1166 sigpoll_sys() IV*/
192 sys irix_swapctl 2 /* 1167 swapctl() IV*/
193 sys irix_getcontext 0 /* 1168 getcontext() HV*/
194 sys irix_setcontext 0 /* 1169 setcontext() HV*/
195 sys irix_waitsys 5 /* 1170 waitsys() IV*/
196 sys irix_sigstack 2 /* 1171 sigstack() HV*/
197 sys irix_sigaltstack 2 /* 1172 sigaltstack() HV*/
198 sys irix_sigsendset 2 /* 1173 sigsendset() IV*/
199 sys irix_statvfs 2 /* 1174 statvfs() V*/
200 sys irix_fstatvfs 2 /* 1175 fstatvfs() V*/
201 sys irix_unimp 0 /* 1176 XXX getpmsg() DC*/
202 sys irix_unimp 0 /* 1177 XXX putpmsg() DC*/
203 sys sys_lchown 3 /* 1178 lchown() V*/
204 sys irix_priocntl 0 /* 1179 priocntl() DC*/
205 sys irix_sigqueue 4 /* 1180 sigqueue() IV*/
206 sys sys_readv 3 /* 1181 readv() V*/
207 sys sys_writev 3 /* 1182 writev() V*/
208 sys irix_truncate64 4 /* 1183 truncate64() XX32bit HV*/
209 sys irix_ftruncate64 4 /* 1184 ftruncate64()XX32bit HV*/
210 sys irix_mmap64 0 /* 1185 mmap64() XX32bit HV*/
211 sys irix_dmi 0 /* 1186 dmi() DC*/
212 sys irix_pread 6 /* 1187 pread() IV*/
213 sys irix_pwrite 6 /* 1188 pwrite() IV*/
214 sys sys_fsync 1 /* 1189 fdatasync() XXPOSIX HV*/
215 sys irix_sgifastpath 7 /* 1190 sgifastpath() WHEEE IV*/
216 sys irix_unimp 0 /* 1191 XXX attr_get() DC*/
217 sys irix_unimp 0 /* 1192 XXX attr_getf() DC*/
218 sys irix_unimp 0 /* 1193 XXX attr_set() DC*/
219 sys irix_unimp 0 /* 1194 XXX attr_setf() DC*/
220 sys irix_unimp 0 /* 1195 XXX attr_remove() DC*/
221 sys irix_unimp 0 /* 1196 XXX attr_removef() DC*/
222 sys irix_unimp 0 /* 1197 XXX attr_list() DC*/
223 sys irix_unimp 0 /* 1198 XXX attr_listf() DC*/
224 sys irix_unimp 0 /* 1199 XXX attr_multi() DC*/
225 sys irix_unimp 0 /* 1200 XXX attr_multif() DC*/
226 sys irix_statvfs64 2 /* 1201 statvfs64() V*/
227 sys irix_fstatvfs64 2 /* 1202 fstatvfs64() V*/
228 sys irix_getmountid 2 /* 1203 getmountid()XXXfsids HV*/
229 sys irix_nsproc 5 /* 1204 nsproc() IV*/
230 sys irix_getdents64 3 /* 1205 getdents64() HV*/
231 sys irix_unimp 0 /* 1206 XXX DFS garbage DC*/
232 sys irix_ngetdents 4 /* 1207 ngetdents() XXXeop HV*/
233 sys irix_ngetdents64 4 /* 1208 ngetdents64() XXXeop HV*/
234 sys irix_unimp 0 /* 1209 nothin' V*/
235 sys irix_unimp 0 /* 1210 XXX pidsprocsp() */
236 sys irix_unimp 0 /* 1211 XXX rexec() */
237 sys irix_unimp 0 /* 1212 XXX timer_create() */
238 sys irix_unimp 0 /* 1213 XXX timer_delete() */
239 sys irix_unimp 0 /* 1214 XXX timer_settime() */
240 sys irix_unimp 0 /* 1215 XXX timer_gettime() */
241 sys irix_unimp 0 /* 1216 XXX timer_setoverrun() */
242 sys sys_sched_rr_get_interval 2 /* 1217 sched_rr_get_interval()V*/
243 sys sys_sched_yield 0 /* 1218 sched_yield() V*/
244 sys sys_sched_getscheduler 1 /* 1219 sched_getscheduler() V*/
245 sys sys_sched_setscheduler 3 /* 1220 sched_setscheduler() V*/
246 sys sys_sched_getparam 2 /* 1221 sched_getparam() V*/
247 sys sys_sched_setparam 2 /* 1222 sched_setparam() V*/
248 sys irix_unimp 0 /* 1223 XXX usync_cntl() */
249 sys irix_unimp 0 /* 1224 XXX psema_cntl() */
250 sys irix_unimp 0 /* 1225 XXX restartreturn() */
251
252 /* Just to pad things out nicely. */
253 sys irix_unimp 0
254 sys irix_unimp 0
255 sys irix_unimp 0
256 sys irix_unimp 0
257 sys irix_unimp 0
258 sys irix_unimp 0
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563 sys irix_unimp 0
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570 sys irix_unimp 0
571 sys irix_unimp 0
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580 sys irix_unimp 0
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600 sys irix_unimp 0
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610 sys irix_unimp 0
611 sys irix_unimp 0
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617 sys irix_unimp 0
618 sys irix_unimp 0
619 sys irix_unimp 0
620 sys irix_unimp 0
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622 sys irix_unimp 0
623 sys irix_unimp 0
624 sys irix_unimp 0
625 sys irix_unimp 0
626 sys irix_unimp 0
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628 sys irix_unimp 0
629 sys irix_unimp 0
630 sys irix_unimp 0
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632 sys irix_unimp 0
633 sys irix_unimp 0
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635 sys irix_unimp 0
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640 sys irix_unimp 0
641 sys irix_unimp 0
642 sys irix_unimp 0
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644 sys irix_unimp 0
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646 sys irix_unimp 0
647 sys irix_unimp 0
648 sys irix_unimp 0
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660 sys irix_unimp 0
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665 sys irix_unimp 0
666 sys irix_unimp 0
667 sys irix_unimp 0
668 sys irix_unimp 0
669 sys irix_unimp 0
670 sys irix_unimp 0
671 sys irix_unimp 0
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673 sys irix_unimp 0
674 sys irix_unimp 0
675 sys irix_unimp 0
676 sys irix_unimp 0
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680 sys irix_unimp 0
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682 sys irix_unimp 0
683 sys irix_unimp 0
684 sys irix_unimp 0
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686 sys irix_unimp 0
687 sys irix_unimp 0
688 sys irix_unimp 0
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690 sys irix_unimp 0
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695 sys irix_unimp 0
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699 sys irix_unimp 0
700 sys irix_unimp 0
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703 sys irix_unimp 0
704 sys irix_unimp 0
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717 sys irix_unimp 0
718 sys irix_unimp 0
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720 sys irix_unimp 0
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722 sys irix_unimp 0
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730 sys irix_unimp 0
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732 sys irix_unimp 0
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735 sys irix_unimp 0
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737 sys irix_unimp 0
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740 sys irix_unimp 0
741 sys irix_unimp 0
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744 sys irix_unimp 0
745 sys irix_unimp 0
746 sys irix_unimp 0
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750 sys irix_unimp 0
751 sys irix_unimp 0
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780 sys irix_unimp 0
781 sys irix_unimp 0
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783 sys irix_unimp 0
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790 sys irix_unimp 0
791 sys irix_unimp 0
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800 sys irix_unimp 0
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820 sys irix_unimp 0
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825 sys irix_unimp 0
826 sys irix_unimp 0
827 sys irix_unimp 0
828 sys irix_unimp 0
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830 sys irix_unimp 0
831 sys irix_unimp 0
832 sys irix_unimp 0
833 sys irix_unimp 0
834 sys irix_unimp 0
835 sys irix_unimp 0
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837 sys irix_unimp 0
838 sys irix_unimp 0
839 sys irix_unimp 0
840 sys irix_unimp 0
841 sys irix_unimp 0
842 sys irix_unimp 0
843 sys irix_unimp 0
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846 sys irix_unimp 0
847 sys irix_unimp 0
848 sys irix_unimp 0
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850 sys irix_unimp 0
851 sys irix_unimp 0
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853 sys irix_unimp 0
854 sys irix_unimp 0
855 sys irix_unimp 0
856 sys irix_unimp 0
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859 sys irix_unimp 0
860 sys irix_unimp 0
861 sys irix_unimp 0
862 sys irix_unimp 0
863 sys irix_unimp 0
864 sys irix_unimp 0
865 sys irix_unimp 0
866 sys irix_unimp 0
867 sys irix_unimp 0
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869 sys irix_unimp 0
870 sys irix_unimp 0
871 sys irix_unimp 0
872 sys irix_unimp 0
873 sys irix_unimp 0
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875 sys irix_unimp 0
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880 sys irix_unimp 0
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883 sys irix_unimp 0
884 sys irix_unimp 0
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887 sys irix_unimp 0
888 sys irix_unimp 0
889 sys irix_unimp 0
890 sys irix_unimp 0
891 sys irix_unimp 0
892 sys irix_unimp 0
893 sys irix_unimp 0
894 sys irix_unimp 0
895 sys irix_unimp 0
896 sys irix_unimp 0
897 sys irix_unimp 0
898 sys irix_unimp 0
899 sys irix_unimp 0
900 sys irix_unimp 0
901 sys irix_unimp 0
902 sys irix_unimp 0
903 sys irix_unimp 0
904 sys irix_unimp 0
905 sys irix_unimp 0
906 sys irix_unimp 0
907 sys irix_unimp 0
908 sys irix_unimp 0
909 sys irix_unimp 0
910 sys irix_unimp 0
911 sys irix_unimp 0
912 sys irix_unimp 0
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915 sys irix_unimp 0
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920 sys irix_unimp 0
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924 sys irix_unimp 0
925 sys irix_unimp 0
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928 sys irix_unimp 0
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930 sys irix_unimp 0
931 sys irix_unimp 0
932 sys irix_unimp 0
933 sys irix_unimp 0
934 sys irix_unimp 0
935 sys irix_unimp 0
936 sys irix_unimp 0
937 sys irix_unimp 0
938 sys irix_unimp 0
939 sys irix_unimp 0
940 sys irix_unimp 0
941 sys irix_unimp 0
942 sys irix_unimp 0
943 sys irix_unimp 0
944 sys irix_unimp 0
945 sys irix_unimp 0
946 sys irix_unimp 0
947 sys irix_unimp 0
948 sys irix_unimp 0
949 sys irix_unimp 0
950 sys irix_unimp 0
951 sys irix_unimp 0
952 sys irix_unimp 0
953 sys irix_unimp 0
954 sys irix_unimp 0
955 sys irix_unimp 0
956 sys irix_unimp 0
957 sys irix_unimp 0
958 sys irix_unimp 0
959 sys irix_unimp 0
960 sys irix_unimp 0
961 sys irix_unimp 0
962 sys irix_unimp 0
963 sys irix_unimp 0
964 sys irix_unimp 0
965 sys irix_unimp 0
966 sys irix_unimp 0
967 sys irix_unimp 0
968 sys irix_unimp 0
969 sys irix_unimp 0
970 sys irix_unimp 0
971 sys irix_unimp 0
972 sys irix_unimp 0
973 sys irix_unimp 0
974 sys irix_unimp 0
975 sys irix_unimp 0
976 sys irix_unimp 0
977 sys irix_unimp 0
978 sys irix_unimp 0
979 sys irix_unimp 0
980 sys irix_unimp 0
981 sys irix_unimp 0
982 sys irix_unimp 0
983 sys irix_unimp 0
984 sys irix_unimp 0
985 sys irix_unimp 0
986 sys irix_unimp 0
987 sys irix_unimp 0
988 sys irix_unimp 0
989 sys irix_unimp 0
990 sys irix_unimp 0
991 sys irix_unimp 0
992 sys irix_unimp 0
993 sys irix_unimp 0
994 sys irix_unimp 0
995 sys irix_unimp 0
996 sys irix_unimp 0
997 sys irix_unimp 0
998 sys irix_unimp 0
999 sys irix_unimp 0
1000 sys irix_unimp 0
1001 sys irix_unimp 0
1002 sys irix_unimp 0
1003 sys irix_unimp 0
1004 sys irix_unimp 0
1005 sys irix_unimp 0
1006 sys irix_unimp 0
1007 sys irix_unimp 0
1008 sys irix_unimp 0
1009 sys irix_unimp 0
1010 sys irix_unimp 0
1011 sys irix_unimp 0
1012 sys irix_unimp 0
1013 sys irix_unimp 0
1014 sys irix_unimp 0
1015 sys irix_unimp 0
1016 sys irix_unimp 0
1017 sys irix_unimp 0
1018 sys irix_unimp 0
1019 sys irix_unimp 0
1020 sys irix_unimp 0
1021 sys irix_unimp 0
1022 sys irix_unimp 0
1023 sys irix_unimp 0
1024 sys irix_unimp 0
1025 sys irix_unimp 0
1026 sys irix_unimp 0
1027
1028 .endm
1029
1030 /*
1031 * Pre-compute the number of _instruction_ bytes needed to load
1032 * or store the arguments 6-8. Negative values are ignored.
1033 */
1034 .macro sys function, nargs
1035 PTR \function
1036 LONG (\nargs << 2) - (5 << 2)
1037 .endm
1038
1039 .align 4
1040EXPORT(sys_call_table_irix5)
1041 irix5syscalltable
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
deleted file mode 100644
index 469c7237e5ba..000000000000
--- a/arch/mips/kernel/irixelf.c
+++ /dev/null
@@ -1,1361 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * irixelf.c: Code to load IRIX ELF executables conforming to the MIPS ABI.
7 * Based off of work by Eric Youngdale.
8 *
9 * Copyright (C) 1993 - 1994 Eric Youngdale <ericy@cais.com>
10 * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
11 * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com>
12 */
13#undef DEBUG
14
15#include <linux/module.h>
16#include <linux/fs.h>
17#include <linux/stat.h>
18#include <linux/sched.h>
19#include <linux/mm.h>
20#include <linux/mman.h>
21#include <linux/a.out.h>
22#include <linux/errno.h>
23#include <linux/init.h>
24#include <linux/signal.h>
25#include <linux/binfmts.h>
26#include <linux/string.h>
27#include <linux/file.h>
28#include <linux/fcntl.h>
29#include <linux/ptrace.h>
30#include <linux/slab.h>
31#include <linux/shm.h>
32#include <linux/personality.h>
33#include <linux/elfcore.h>
34
35#include <asm/mipsregs.h>
36#include <asm/namei.h>
37#include <asm/prctl.h>
38#include <asm/uaccess.h>
39
40#define DLINFO_ITEMS 12
41
42#include <linux/elf.h>
43
44static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs);
45static int load_irix_library(struct file *);
46static int irix_core_dump(long signr, struct pt_regs * regs,
47 struct file *file, unsigned long limit);
48
49static struct linux_binfmt irix_format = {
50 .module = THIS_MODULE,
51 .load_binary = load_irix_binary,
52 .load_shlib = load_irix_library,
53 .core_dump = irix_core_dump,
54 .min_coredump = PAGE_SIZE,
55};
56
57/* Debugging routines. */
58static char *get_elf_p_type(Elf32_Word p_type)
59{
60#ifdef DEBUG
61 switch (p_type) {
62 case PT_NULL:
63 return "PT_NULL";
64 break;
65
66 case PT_LOAD:
67 return "PT_LOAD";
68 break;
69
70 case PT_DYNAMIC:
71 return "PT_DYNAMIC";
72 break;
73
74 case PT_INTERP:
75 return "PT_INTERP";
76 break;
77
78 case PT_NOTE:
79 return "PT_NOTE";
80 break;
81
82 case PT_SHLIB:
83 return "PT_SHLIB";
84 break;
85
86 case PT_PHDR:
87 return "PT_PHDR";
88 break;
89
90 case PT_LOPROC:
91 return "PT_LOPROC/REGINFO";
92 break;
93
94 case PT_HIPROC:
95 return "PT_HIPROC";
96 break;
97
98 default:
99 return "PT_BOGUS";
100 break;
101 }
102#endif
103}
104
105static void print_elfhdr(struct elfhdr *ehp)
106{
107 int i;
108
109 pr_debug("ELFHDR: e_ident<");
110 for (i = 0; i < (EI_NIDENT - 1); i++)
111 pr_debug("%x ", ehp->e_ident[i]);
112 pr_debug("%x>\n", ehp->e_ident[i]);
113 pr_debug(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n",
114 (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine,
115 (unsigned long) ehp->e_version);
116 pr_debug(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] "
117 "e_flags[%08lx]\n",
118 (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff,
119 (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags);
120 pr_debug(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n",
121 (unsigned short) ehp->e_ehsize,
122 (unsigned short) ehp->e_phentsize,
123 (unsigned short) ehp->e_phnum);
124 pr_debug(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n",
125 (unsigned short) ehp->e_shentsize,
126 (unsigned short) ehp->e_shnum,
127 (unsigned short) ehp->e_shstrndx);
128}
129
130static void print_phdr(int i, struct elf_phdr *ep)
131{
132 pr_debug("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] "
133 "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type),
134 (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr,
135 (unsigned long) ep->p_paddr);
136 pr_debug(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] "
137 "p_align[%08lx]\n", (unsigned long) ep->p_filesz,
138 (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags,
139 (unsigned long) ep->p_align);
140}
141
142static void dump_phdrs(struct elf_phdr *ep, int pnum)
143{
144 int i;
145
146 for (i = 0; i < pnum; i++, ep++) {
147 if ((ep->p_type == PT_LOAD) ||
148 (ep->p_type == PT_INTERP) ||
149 (ep->p_type == PT_PHDR))
150 print_phdr(i, ep);
151 }
152}
153
154static void set_brk(unsigned long start, unsigned long end)
155{
156 start = PAGE_ALIGN(start);
157 end = PAGE_ALIGN(end);
158 if (end <= start)
159 return;
160 down_write(&current->mm->mmap_sem);
161 do_brk(start, end - start);
162 up_write(&current->mm->mmap_sem);
163}
164
165
166/* We need to explicitly zero any fractional pages
167 * after the data section (i.e. bss). This would
168 * contain the junk from the file that should not
169 * be in memory.
170 */
171static void padzero(unsigned long elf_bss)
172{
173 unsigned long nbyte;
174
175 nbyte = elf_bss & (PAGE_SIZE-1);
176 if (nbyte) {
177 nbyte = PAGE_SIZE - nbyte;
178 clear_user((void __user *) elf_bss, nbyte);
179 }
180}
181
182static unsigned long * create_irix_tables(char * p, int argc, int envc,
183 struct elfhdr * exec, unsigned int load_addr,
184 unsigned int interp_load_addr, struct pt_regs *regs,
185 struct elf_phdr *ephdr)
186{
187 elf_addr_t *argv;
188 elf_addr_t *envp;
189 elf_addr_t *sp, *csp;
190
191 pr_debug("create_irix_tables: p[%p] argc[%d] envc[%d] "
192 "load_addr[%08x] interp_load_addr[%08x]\n",
193 p, argc, envc, load_addr, interp_load_addr);
194
195 sp = (elf_addr_t *) (~15UL & (unsigned long) p);
196 csp = sp;
197 csp -= exec ? DLINFO_ITEMS*2 : 2;
198 csp -= envc+1;
199 csp -= argc+1;
200 csp -= 1; /* argc itself */
201 if ((unsigned long)csp & 15UL) {
202 sp -= (16UL - ((unsigned long)csp & 15UL)) / sizeof(*sp);
203 }
204
205 /*
206 * Put the ELF interpreter info on the stack
207 */
208#define NEW_AUX_ENT(nr, id, val) \
209 __put_user((id), sp+(nr*2)); \
210 __put_user((val), sp+(nr*2+1)); \
211
212 sp -= 2;
213 NEW_AUX_ENT(0, AT_NULL, 0);
214
215 if (exec) {
216 sp -= 11*2;
217
218 NEW_AUX_ENT(0, AT_PHDR, load_addr + exec->e_phoff);
219 NEW_AUX_ENT(1, AT_PHENT, sizeof(struct elf_phdr));
220 NEW_AUX_ENT(2, AT_PHNUM, exec->e_phnum);
221 NEW_AUX_ENT(3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
222 NEW_AUX_ENT(4, AT_BASE, interp_load_addr);
223 NEW_AUX_ENT(5, AT_FLAGS, 0);
224 NEW_AUX_ENT(6, AT_ENTRY, (elf_addr_t) exec->e_entry);
225 NEW_AUX_ENT(7, AT_UID, (elf_addr_t) current->uid);
226 NEW_AUX_ENT(8, AT_EUID, (elf_addr_t) current->euid);
227 NEW_AUX_ENT(9, AT_GID, (elf_addr_t) current->gid);
228 NEW_AUX_ENT(10, AT_EGID, (elf_addr_t) current->egid);
229 }
230#undef NEW_AUX_ENT
231
232 sp -= envc+1;
233 envp = sp;
234 sp -= argc+1;
235 argv = sp;
236
237 __put_user((elf_addr_t)argc, --sp);
238 current->mm->arg_start = (unsigned long) p;
239 while (argc-->0) {
240 __put_user((unsigned long)p, argv++);
241 p += strlen_user(p);
242 }
243 __put_user((unsigned long) NULL, argv);
244 current->mm->arg_end = current->mm->env_start = (unsigned long) p;
245 while (envc-->0) {
246 __put_user((unsigned long)p, envp++);
247 p += strlen_user(p);
248 }
249 __put_user((unsigned long) NULL, envp);
250 current->mm->env_end = (unsigned long) p;
251 return sp;
252}
253
254
255/* This is much more generalized than the library routine read function,
256 * so we keep this separate. Technically the library read function
257 * is only provided so that we can read a.out libraries that have
258 * an ELF header.
259 */
260static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
261 struct file * interpreter,
262 unsigned int *interp_load_addr)
263{
264 struct elf_phdr *elf_phdata = NULL;
265 struct elf_phdr *eppnt;
266 unsigned int len;
267 unsigned int load_addr;
268 int elf_bss;
269 int retval;
270 unsigned int last_bss;
271 int error;
272 int i;
273 unsigned int k;
274
275 elf_bss = 0;
276 last_bss = 0;
277 error = load_addr = 0;
278
279 print_elfhdr(interp_elf_ex);
280
281 /* First of all, some simple consistency checks */
282 if ((interp_elf_ex->e_type != ET_EXEC &&
283 interp_elf_ex->e_type != ET_DYN) ||
284 !interpreter->f_op->mmap) {
285 printk("IRIX interp has bad e_type %d\n", interp_elf_ex->e_type);
286 return 0xffffffff;
287 }
288
289 /* Now read in all of the header information */
290 if (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) {
291 printk("IRIX interp header bigger than a page (%d)\n",
292 (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum));
293 return 0xffffffff;
294 }
295
296 elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum,
297 GFP_KERNEL);
298
299 if (!elf_phdata) {
300 printk("Cannot kmalloc phdata for IRIX interp.\n");
301 return 0xffffffff;
302 }
303
304 /* If the size of this structure has changed, then punt, since
305 * we will be doing the wrong thing.
306 */
307 if (interp_elf_ex->e_phentsize != 32) {
308 printk("IRIX interp e_phentsize == %d != 32 ",
309 interp_elf_ex->e_phentsize);
310 kfree(elf_phdata);
311 return 0xffffffff;
312 }
313
314 retval = kernel_read(interpreter, interp_elf_ex->e_phoff,
315 (char *) elf_phdata,
316 sizeof(struct elf_phdr) * interp_elf_ex->e_phnum);
317
318 dump_phdrs(elf_phdata, interp_elf_ex->e_phnum);
319
320 eppnt = elf_phdata;
321 for (i = 0; i < interp_elf_ex->e_phnum; i++, eppnt++) {
322 if (eppnt->p_type == PT_LOAD) {
323 int elf_type = MAP_PRIVATE | MAP_DENYWRITE;
324 int elf_prot = 0;
325 unsigned long vaddr = 0;
326 if (eppnt->p_flags & PF_R)
327 elf_prot = PROT_READ;
328 if (eppnt->p_flags & PF_W)
329 elf_prot |= PROT_WRITE;
330 if (eppnt->p_flags & PF_X)
331 elf_prot |= PROT_EXEC;
332 elf_type |= MAP_FIXED;
333 vaddr = eppnt->p_vaddr;
334
335 pr_debug("INTERP do_mmap"
336 "(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
337 interpreter, vaddr,
338 (unsigned long)
339 (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)),
340 (unsigned long)
341 elf_prot, (unsigned long) elf_type,
342 (unsigned long)
343 (eppnt->p_offset & 0xfffff000));
344
345 down_write(&current->mm->mmap_sem);
346 error = do_mmap(interpreter, vaddr,
347 eppnt->p_filesz + (eppnt->p_vaddr & 0xfff),
348 elf_prot, elf_type,
349 eppnt->p_offset & 0xfffff000);
350 up_write(&current->mm->mmap_sem);
351
352 if (error < 0 && error > -1024) {
353 printk("Aieee IRIX interp mmap error=%d\n",
354 error);
355 break; /* Real error */
356 }
357 pr_debug("error=%08lx ", (unsigned long) error);
358 if (!load_addr && interp_elf_ex->e_type == ET_DYN) {
359 load_addr = error;
360 pr_debug("load_addr = error ");
361 }
362
363 /*
364 * Find the end of the file mapping for this phdr, and
365 * keep track of the largest address we see for this.
366 */
367 k = eppnt->p_vaddr + eppnt->p_filesz;
368 if (k > elf_bss)
369 elf_bss = k;
370
371 /* Do the same thing for the memory mapping - between
372 * elf_bss and last_bss is the bss section.
373 */
374 k = eppnt->p_memsz + eppnt->p_vaddr;
375 if (k > last_bss)
376 last_bss = k;
377 pr_debug("\n");
378 }
379 }
380
381 /* Now use mmap to map the library into memory. */
382 if (error < 0 && error > -1024) {
383 pr_debug("got error %d\n", error);
384 kfree(elf_phdata);
385 return 0xffffffff;
386 }
387
388 /* Now fill out the bss section. First pad the last page up
389 * to the page boundary, and then perform a mmap to make sure
390 * that there are zero-mapped pages up to and including the
391 * last bss page.
392 */
393 pr_debug("padzero(%08lx) ", (unsigned long) (elf_bss));
394 padzero(elf_bss);
395 len = (elf_bss + 0xfff) & 0xfffff000; /* What we have mapped so far */
396
397 pr_debug("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss,
398 (unsigned long) len);
399
400 /* Map the last of the bss segment */
401 if (last_bss > len) {
402 down_write(&current->mm->mmap_sem);
403 do_brk(len, (last_bss - len));
404 up_write(&current->mm->mmap_sem);
405 }
406 kfree(elf_phdata);
407
408 *interp_load_addr = load_addr;
409 return ((unsigned int) interp_elf_ex->e_entry);
410}
411
412/* Check sanity of IRIX elf executable header. */
413static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm)
414{
415 if (memcmp(ehp->e_ident, ELFMAG, SELFMAG) != 0)
416 return -ENOEXEC;
417
418 /* First of all, some simple consistency checks */
419 if ((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) ||
420 !bprm->file->f_op->mmap) {
421 return -ENOEXEC;
422 }
423
424 /* XXX Don't support N32 or 64bit binaries yet because they can
425 * XXX and do execute 64 bit instructions and expect all registers
426 * XXX to be 64 bit as well. We need to make the kernel save
427 * XXX all registers as 64bits on cpu's capable of this at
428 * XXX exception time plus frob the XTLB exception vector.
429 */
430 if ((ehp->e_flags & EF_MIPS_ABI2))
431 return -ENOEXEC;
432
433 return 0;
434}
435
436/*
437 * This is where the detailed check is performed. Irix binaries
438 * use interpreters with 'libc.so' in the name, so this function
439 * can differentiate between Linux and Irix binaries.
440 */
441static inline int look_for_irix_interpreter(char **name,
442 struct file **interpreter,
443 struct elfhdr *interp_elf_ex,
444 struct elf_phdr *epp,
445 struct linux_binprm *bprm, int pnum)
446{
447 int i;
448 int retval = -EINVAL;
449 struct file *file = NULL;
450
451 *name = NULL;
452 for (i = 0; i < pnum; i++, epp++) {
453 if (epp->p_type != PT_INTERP)
454 continue;
455
456 /* It is illegal to have two interpreters for one executable. */
457 if (*name != NULL)
458 goto out;
459
460 *name = kmalloc(epp->p_filesz + strlen(IRIX_EMUL), GFP_KERNEL);
461 if (!*name)
462 return -ENOMEM;
463
464 strcpy(*name, IRIX_EMUL);
465 retval = kernel_read(bprm->file, epp->p_offset, (*name + 16),
466 epp->p_filesz);
467 if (retval < 0)
468 goto out;
469
470 file = open_exec(*name);
471 if (IS_ERR(file)) {
472 retval = PTR_ERR(file);
473 goto out;
474 }
475 retval = kernel_read(file, 0, bprm->buf, 128);
476 if (retval < 0)
477 goto dput_and_out;
478
479 *interp_elf_ex = *(struct elfhdr *) bprm->buf;
480 }
481 *interpreter = file;
482 return 0;
483
484dput_and_out:
485 fput(file);
486out:
487 kfree(*name);
488 return retval;
489}
490
491static inline int verify_irix_interpreter(struct elfhdr *ihp)
492{
493 if (memcmp(ihp->e_ident, ELFMAG, SELFMAG) != 0)
494 return -ELIBBAD;
495 return 0;
496}
497
498#define EXEC_MAP_FLAGS (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE)
499
500static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnum,
501 unsigned int *estack, unsigned int *laddr,
502 unsigned int *scode, unsigned int *ebss,
503 unsigned int *ecode, unsigned int *edata,
504 unsigned int *ebrk)
505{
506 unsigned int tmp;
507 int i, prot;
508
509 for (i = 0; i < pnum; i++, epp++) {
510 if (epp->p_type != PT_LOAD)
511 continue;
512
513 /* Map it. */
514 prot = (epp->p_flags & PF_R) ? PROT_READ : 0;
515 prot |= (epp->p_flags & PF_W) ? PROT_WRITE : 0;
516 prot |= (epp->p_flags & PF_X) ? PROT_EXEC : 0;
517 down_write(&current->mm->mmap_sem);
518 (void) do_mmap(fp, (epp->p_vaddr & 0xfffff000),
519 (epp->p_filesz + (epp->p_vaddr & 0xfff)),
520 prot, EXEC_MAP_FLAGS,
521 (epp->p_offset & 0xfffff000));
522 up_write(&current->mm->mmap_sem);
523
524 /* Fixup location tracking vars. */
525 if ((epp->p_vaddr & 0xfffff000) < *estack)
526 *estack = (epp->p_vaddr & 0xfffff000);
527 if (!*laddr)
528 *laddr = epp->p_vaddr - epp->p_offset;
529 if (epp->p_vaddr < *scode)
530 *scode = epp->p_vaddr;
531
532 tmp = epp->p_vaddr + epp->p_filesz;
533 if (tmp > *ebss)
534 *ebss = tmp;
535 if ((epp->p_flags & PF_X) && *ecode < tmp)
536 *ecode = tmp;
537 if (*edata < tmp)
538 *edata = tmp;
539
540 tmp = epp->p_vaddr + epp->p_memsz;
541 if (tmp > *ebrk)
542 *ebrk = tmp;
543 }
544
545}
546
547static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp,
548 struct file *interp, unsigned int *iladdr,
549 int pnum, mm_segment_t old_fs,
550 unsigned int *eentry)
551{
552 int i;
553
554 *eentry = 0xffffffff;
555 for (i = 0; i < pnum; i++, epp++) {
556 if (epp->p_type != PT_INTERP)
557 continue;
558
559 /* We should have fielded this error elsewhere... */
560 if (*eentry != 0xffffffff)
561 return -1;
562
563 set_fs(old_fs);
564 *eentry = load_irix_interp(ihp, interp, iladdr);
565 old_fs = get_fs();
566 set_fs(get_ds());
567
568 fput(interp);
569
570 if (*eentry == 0xffffffff)
571 return -1;
572 }
573 return 0;
574}
575
576/*
577 * IRIX maps a page at 0x200000 that holds information about the
578 * process and the system, here we map the page and fill the
579 * structure
580 */
581static int irix_map_prda_page(void)
582{
583 unsigned long v;
584 struct prda *pp;
585
586 down_write(&current->mm->mmap_sem);
587 v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
588 up_write(&current->mm->mmap_sem);
589
590 if (v != PRDA_ADDRESS)
591 return v; /* v must be an error code */
592
593 pp = (struct prda *) v;
594 pp->prda_sys.t_pid = task_pid_vnr(current);
595 pp->prda_sys.t_prid = read_c0_prid();
596 pp->prda_sys.t_rpid = task_pid_vnr(current);
597
598 /* We leave the rest set to zero */
599
600 return 0;
601}
602
603
604
605/* These are the functions used to load ELF style executables and shared
606 * libraries. There is no binary dependent code anywhere else.
607 */
608static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
609{
610 struct elfhdr elf_ex, interp_elf_ex;
611 struct file *interpreter;
612 struct elf_phdr *elf_phdata, *elf_ihdr, *elf_ephdr;
613 unsigned int load_addr, elf_bss, elf_brk;
614 unsigned int elf_entry, interp_load_addr = 0;
615 unsigned int start_code, end_code, end_data, elf_stack;
616 int retval, has_interp, has_ephdr, size, i;
617 char *elf_interpreter;
618 mm_segment_t old_fs;
619
620 load_addr = 0;
621 has_interp = has_ephdr = 0;
622 elf_ihdr = elf_ephdr = NULL;
623 elf_ex = *((struct elfhdr *) bprm->buf);
624 retval = -ENOEXEC;
625
626 if (verify_binary(&elf_ex, bprm))
627 goto out;
628
629 /*
630 * Telling -o32 static binaries from Linux and Irix apart from each
631 * other is difficult. There are 2 differences to be noted for static
632 * binaries from the 2 operating systems:
633 *
634 * 1) Irix binaries have their .text section before their .init
635 * section. Linux binaries are just the opposite.
636 *
637 * 2) Irix binaries usually have <= 12 sections and Linux
638 * binaries have > 20.
639 *
640 * We will use Method #2 since Method #1 would require us to read in
641 * the section headers which is way too much overhead. This appears
642 * to work for everything we have ran into so far. If anyone has a
643 * better method to tell the binaries apart, I'm listening.
644 */
645 if (elf_ex.e_shnum > 20)
646 goto out;
647
648 print_elfhdr(&elf_ex);
649
650 /* Now read in all of the header information */
651 size = elf_ex.e_phentsize * elf_ex.e_phnum;
652 if (size > 65536)
653 goto out;
654 elf_phdata = kmalloc(size, GFP_KERNEL);
655 if (elf_phdata == NULL) {
656 retval = -ENOMEM;
657 goto out;
658 }
659
660 retval = kernel_read(bprm->file, elf_ex.e_phoff, (char *)elf_phdata, size);
661 if (retval < 0)
662 goto out_free_ph;
663
664 dump_phdrs(elf_phdata, elf_ex.e_phnum);
665
666 /* Set some things for later. */
667 for (i = 0; i < elf_ex.e_phnum; i++) {
668 switch (elf_phdata[i].p_type) {
669 case PT_INTERP:
670 has_interp = 1;
671 elf_ihdr = &elf_phdata[i];
672 break;
673 case PT_PHDR:
674 has_ephdr = 1;
675 elf_ephdr = &elf_phdata[i];
676 break;
677 };
678 }
679
680 pr_debug("\n");
681
682 elf_bss = 0;
683 elf_brk = 0;
684
685 elf_stack = 0xffffffff;
686 elf_interpreter = NULL;
687 start_code = 0xffffffff;
688 end_code = 0;
689 end_data = 0;
690
691 /*
692 * If we get a return value, we change the value to be ENOEXEC
693 * so that we can exit gracefully and the main binary format
694 * search loop in 'fs/exec.c' will move onto the next handler
695 * which should be the normal ELF binary handler.
696 */
697 retval = look_for_irix_interpreter(&elf_interpreter, &interpreter,
698 &interp_elf_ex, elf_phdata, bprm,
699 elf_ex.e_phnum);
700 if (retval) {
701 retval = -ENOEXEC;
702 goto out_free_file;
703 }
704
705 if (elf_interpreter) {
706 retval = verify_irix_interpreter(&interp_elf_ex);
707 if (retval)
708 goto out_free_interp;
709 }
710
711 /* OK, we are done with that, now set up the arg stuff,
712 * and then start this sucker up.
713 */
714 retval = -E2BIG;
715 if (!bprm->sh_bang && !bprm->p)
716 goto out_free_interp;
717
718 /* Flush all traces of the currently running executable */
719 retval = flush_old_exec(bprm);
720 if (retval)
721 goto out_free_dentry;
722
723 /* OK, This is the point of no return */
724 current->mm->end_data = 0;
725 current->mm->end_code = 0;
726 current->mm->mmap = NULL;
727 current->flags &= ~PF_FORKNOEXEC;
728 elf_entry = (unsigned int) elf_ex.e_entry;
729
730 /* Do this so that we can load the interpreter, if need be. We will
731 * change some of these later.
732 */
733 setup_arg_pages(bprm, STACK_TOP, EXSTACK_DEFAULT);
734 current->mm->start_stack = bprm->p;
735
736 /* At this point, we assume that the image should be loaded at
737 * fixed address, not at a variable address.
738 */
739 old_fs = get_fs();
740 set_fs(get_ds());
741
742 map_executable(bprm->file, elf_phdata, elf_ex.e_phnum, &elf_stack,
743 &load_addr, &start_code, &elf_bss, &end_code,
744 &end_data, &elf_brk);
745
746 if (elf_interpreter) {
747 retval = map_interpreter(elf_phdata, &interp_elf_ex,
748 interpreter, &interp_load_addr,
749 elf_ex.e_phnum, old_fs, &elf_entry);
750 kfree(elf_interpreter);
751 if (retval) {
752 set_fs(old_fs);
753 printk("Unable to load IRIX ELF interpreter\n");
754 send_sig(SIGSEGV, current, 0);
755 retval = 0;
756 goto out_free_file;
757 }
758 }
759
760 set_fs(old_fs);
761
762 kfree(elf_phdata);
763 set_personality(PER_IRIX32);
764 set_binfmt(&irix_format);
765 compute_creds(bprm);
766 current->flags &= ~PF_FORKNOEXEC;
767 bprm->p = (unsigned long)
768 create_irix_tables((char *)bprm->p, bprm->argc, bprm->envc,
769 (elf_interpreter ? &elf_ex : NULL),
770 load_addr, interp_load_addr, regs, elf_ephdr);
771 current->mm->start_brk = current->mm->brk = elf_brk;
772 current->mm->end_code = end_code;
773 current->mm->start_code = start_code;
774 current->mm->end_data = end_data;
775 current->mm->start_stack = bprm->p;
776
777 /* Calling set_brk effectively mmaps the pages that we need for the
778 * bss and break sections.
779 */
780 set_brk(elf_bss, elf_brk);
781
782 /*
783 * IRIX maps a page at 0x200000 which holds some system
784 * information. Programs depend on this.
785 */
786 if (irix_map_prda_page())
787 goto out_free_dentry;
788
789 padzero(elf_bss);
790
791 pr_debug("(start_brk) %lx\n" , (long) current->mm->start_brk);
792 pr_debug("(end_code) %lx\n" , (long) current->mm->end_code);
793 pr_debug("(start_code) %lx\n" , (long) current->mm->start_code);
794 pr_debug("(end_data) %lx\n" , (long) current->mm->end_data);
795 pr_debug("(start_stack) %lx\n" , (long) current->mm->start_stack);
796 pr_debug("(brk) %lx\n" , (long) current->mm->brk);
797
798#if 0 /* XXX No fucking way dude... */
799 /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
800 * and some applications "depend" upon this behavior.
801 * Since we do not have the power to recompile these, we
802 * emulate the SVr4 behavior. Sigh.
803 */
804 down_write(&current->mm->mmap_sem);
805 (void) do_mmap(NULL, 0, 4096, PROT_READ | PROT_EXEC,
806 MAP_FIXED | MAP_PRIVATE, 0);
807 up_write(&current->mm->mmap_sem);
808#endif
809
810 start_thread(regs, elf_entry, bprm->p);
811 if (current->ptrace & PT_PTRACED)
812 send_sig(SIGTRAP, current, 0);
813 return 0;
814out:
815 return retval;
816
817out_free_dentry:
818 allow_write_access(interpreter);
819 fput(interpreter);
820out_free_interp:
821 kfree(elf_interpreter);
822out_free_file:
823out_free_ph:
824 kfree(elf_phdata);
825 goto out;
826}
827
828/* This is really simpleminded and specialized - we are loading an
829 * a.out library that is given an ELF header.
830 */
831static int load_irix_library(struct file *file)
832{
833 struct elfhdr elf_ex;
834 struct elf_phdr *elf_phdata = NULL;
835 unsigned int len = 0;
836 int elf_bss = 0;
837 int retval;
838 unsigned int bss;
839 int error;
840 int i, j, k;
841
842 error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex));
843 if (error != sizeof(elf_ex))
844 return -ENOEXEC;
845
846 if (memcmp(elf_ex.e_ident, ELFMAG, SELFMAG) != 0)
847 return -ENOEXEC;
848
849 /* First of all, some simple consistency checks. */
850 if (elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 ||
851 !file->f_op->mmap)
852 return -ENOEXEC;
853
854 /* Now read in all of the header information. */
855 if (sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE)
856 return -ENOEXEC;
857
858 elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL);
859 if (elf_phdata == NULL)
860 return -ENOMEM;
861
862 retval = kernel_read(file, elf_ex.e_phoff, (char *) elf_phdata,
863 sizeof(struct elf_phdr) * elf_ex.e_phnum);
864
865 j = 0;
866 for (i=0; i<elf_ex.e_phnum; i++)
867 if ((elf_phdata + i)->p_type == PT_LOAD) j++;
868
869 if (j != 1) {
870 kfree(elf_phdata);
871 return -ENOEXEC;
872 }
873
874 while (elf_phdata->p_type != PT_LOAD) elf_phdata++;
875
876 /* Now use mmap to map the library into memory. */
877 down_write(&current->mm->mmap_sem);
878 error = do_mmap(file,
879 elf_phdata->p_vaddr & 0xfffff000,
880 elf_phdata->p_filesz + (elf_phdata->p_vaddr & 0xfff),
881 PROT_READ | PROT_WRITE | PROT_EXEC,
882 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE,
883 elf_phdata->p_offset & 0xfffff000);
884 up_write(&current->mm->mmap_sem);
885
886 k = elf_phdata->p_vaddr + elf_phdata->p_filesz;
887 if (k > elf_bss) elf_bss = k;
888
889 if (error != (elf_phdata->p_vaddr & 0xfffff000)) {
890 kfree(elf_phdata);
891 return error;
892 }
893
894 padzero(elf_bss);
895
896 len = (elf_phdata->p_filesz + elf_phdata->p_vaddr+ 0xfff) & 0xfffff000;
897 bss = elf_phdata->p_memsz + elf_phdata->p_vaddr;
898 if (bss > len) {
899 down_write(&current->mm->mmap_sem);
900 do_brk(len, bss-len);
901 up_write(&current->mm->mmap_sem);
902 }
903 kfree(elf_phdata);
904 return 0;
905}
906
907/* Called through irix_syssgi() to map an elf image given an FD,
908 * a phdr ptr USER_PHDRP in userspace, and a count CNT telling how many
909 * phdrs there are in the USER_PHDRP array. We return the vaddr the
910 * first phdr was successfully mapped to.
911 */
912unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt)
913{
914 unsigned long type, vaddr, filesz, offset, flags;
915 struct elf_phdr __user *hp;
916 struct file *filp;
917 int i, retval;
918
919 pr_debug("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n",
920 fd, user_phdrp, cnt);
921
922 /* First get the verification out of the way. */
923 hp = user_phdrp;
924 if (!access_ok(VERIFY_READ, hp, (sizeof(struct elf_phdr) * cnt))) {
925 pr_debug("irix_mapelf: bad pointer to ELF PHDR!\n");
926
927 return -EFAULT;
928 }
929
930 dump_phdrs(user_phdrp, cnt);
931
932 for (i = 0; i < cnt; i++, hp++) {
933 if (__get_user(type, &hp->p_type))
934 return -EFAULT;
935 if (type != PT_LOAD) {
936 printk("irix_mapelf: One section is not PT_LOAD!\n");
937 return -ENOEXEC;
938 }
939 }
940
941 filp = fget(fd);
942 if (!filp)
943 return -EACCES;
944 if (!filp->f_op) {
945 printk("irix_mapelf: Bogon filp!\n");
946 fput(filp);
947 return -EACCES;
948 }
949
950 hp = user_phdrp;
951 for (i = 0; i < cnt; i++, hp++) {
952 int prot;
953
954 retval = __get_user(vaddr, &hp->p_vaddr);
955 retval |= __get_user(filesz, &hp->p_filesz);
956 retval |= __get_user(offset, &hp->p_offset);
957 retval |= __get_user(flags, &hp->p_flags);
958 if (retval)
959 return retval;
960
961 prot = (flags & PF_R) ? PROT_READ : 0;
962 prot |= (flags & PF_W) ? PROT_WRITE : 0;
963 prot |= (flags & PF_X) ? PROT_EXEC : 0;
964
965 down_write(&current->mm->mmap_sem);
966 retval = do_mmap(filp, (vaddr & 0xfffff000),
967 (filesz + (vaddr & 0xfff)),
968 prot, (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE),
969 (offset & 0xfffff000));
970 up_write(&current->mm->mmap_sem);
971
972 if (retval != (vaddr & 0xfffff000)) {
973 printk("irix_mapelf: do_mmap fails with %d!\n", retval);
974 fput(filp);
975 return retval;
976 }
977 }
978
979 pr_debug("irix_mapelf: Success, returning %08lx\n",
980 (unsigned long) user_phdrp->p_vaddr);
981
982 fput(filp);
983
984 if (__get_user(vaddr, &user_phdrp->p_vaddr))
985 return -EFAULT;
986
987 return vaddr;
988}
989
990/*
991 * ELF core dumper
992 *
993 * Modelled on fs/exec.c:aout_core_dump()
994 * Jeremy Fitzhardinge <jeremy@sw.oz.au>
995 */
996
997/* These are the only things you should do on a core-file: use only these
998 * functions to write out all the necessary info.
999 */
1000static int dump_write(struct file *file, const void __user *addr, int nr)
1001{
1002 return file->f_op->write(file, (const char __user *) addr, nr, &file->f_pos) == nr;
1003}
1004
1005static int dump_seek(struct file *file, off_t off)
1006{
1007 if (file->f_op->llseek) {
1008 if (file->f_op->llseek(file, off, 0) != off)
1009 return 0;
1010 } else
1011 file->f_pos = off;
1012 return 1;
1013}
1014
1015/* Decide whether a segment is worth dumping; default is yes to be
1016 * sure (missing info is worse than too much; etc).
1017 * Personally I'd include everything, and use the coredump limit...
1018 *
1019 * I think we should skip something. But I am not sure how. H.J.
1020 */
1021static inline int maydump(struct vm_area_struct *vma)
1022{
1023 if (!(vma->vm_flags & (VM_READ|VM_WRITE|VM_EXEC)))
1024 return 0;
1025#if 1
1026 if (vma->vm_flags & (VM_WRITE|VM_GROWSUP|VM_GROWSDOWN))
1027 return 1;
1028 if (vma->vm_flags & (VM_READ|VM_EXEC|VM_EXECUTABLE|VM_SHARED))
1029 return 0;
1030#endif
1031 return 1;
1032}
1033
1034/* An ELF note in memory. */
1035struct memelfnote
1036{
1037 const char *name;
1038 int type;
1039 unsigned int datasz;
1040 void *data;
1041};
1042
1043static int notesize(struct memelfnote *en)
1044{
1045 int sz;
1046
1047 sz = sizeof(struct elf_note);
1048 sz += roundup(strlen(en->name) + 1, 4);
1049 sz += roundup(en->datasz, 4);
1050
1051 return sz;
1052}
1053
1054#define DUMP_WRITE(addr, nr) \
1055 if (!dump_write(file, (addr), (nr))) \
1056 goto end_coredump;
1057#define DUMP_SEEK(off) \
1058 if (!dump_seek(file, (off))) \
1059 goto end_coredump;
1060
1061static int writenote(struct memelfnote *men, struct file *file)
1062{
1063 struct elf_note en;
1064
1065 en.n_namesz = strlen(men->name) + 1;
1066 en.n_descsz = men->datasz;
1067 en.n_type = men->type;
1068
1069 DUMP_WRITE(&en, sizeof(en));
1070 DUMP_WRITE(men->name, en.n_namesz);
1071 /* XXX - cast from long long to long to avoid need for libgcc.a */
1072 DUMP_SEEK(roundup((unsigned long)file->f_pos, 4)); /* XXX */
1073 DUMP_WRITE(men->data, men->datasz);
1074 DUMP_SEEK(roundup((unsigned long)file->f_pos, 4)); /* XXX */
1075
1076 return 1;
1077
1078end_coredump:
1079 return 0;
1080}
1081#undef DUMP_WRITE
1082#undef DUMP_SEEK
1083
1084#define DUMP_WRITE(addr, nr) \
1085 if (!dump_write(file, (addr), (nr))) \
1086 goto end_coredump;
1087#define DUMP_SEEK(off) \
1088 if (!dump_seek(file, (off))) \
1089 goto end_coredump;
1090
1091/* Actual dumper.
1092 *
1093 * This is a two-pass process; first we find the offsets of the bits,
1094 * and then they are actually written out. If we run out of core limit
1095 * we just truncate.
1096 */
1097static int irix_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit)
1098{
1099 int has_dumped = 0;
1100 mm_segment_t fs;
1101 int segs;
1102 int i;
1103 size_t size;
1104 struct vm_area_struct *vma;
1105 struct elfhdr elf;
1106 off_t offset = 0, dataoff;
1107 int numnote = 3;
1108 struct memelfnote notes[3];
1109 struct elf_prstatus prstatus; /* NT_PRSTATUS */
1110 elf_fpregset_t fpu; /* NT_PRFPREG */
1111 struct elf_prpsinfo psinfo; /* NT_PRPSINFO */
1112
1113 /* Count what's needed to dump, up to the limit of coredump size. */
1114 segs = 0;
1115 size = 0;
1116 for (vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) {
1117 if (maydump(vma))
1118 {
1119 int sz = vma->vm_end-vma->vm_start;
1120
1121 if (size+sz >= limit)
1122 break;
1123 else
1124 size += sz;
1125 }
1126
1127 segs++;
1128 }
1129 pr_debug("irix_core_dump: %d segs taking %d bytes\n", segs, size);
1130
1131 /* Set up header. */
1132 memcpy(elf.e_ident, ELFMAG, SELFMAG);
1133 elf.e_ident[EI_CLASS] = ELFCLASS32;
1134 elf.e_ident[EI_DATA] = ELFDATA2LSB;
1135 elf.e_ident[EI_VERSION] = EV_CURRENT;
1136 elf.e_ident[EI_OSABI] = ELF_OSABI;
1137 memset(elf.e_ident+EI_PAD, 0, EI_NIDENT-EI_PAD);
1138
1139 elf.e_type = ET_CORE;
1140 elf.e_machine = ELF_ARCH;
1141 elf.e_version = EV_CURRENT;
1142 elf.e_entry = 0;
1143 elf.e_phoff = sizeof(elf);
1144 elf.e_shoff = 0;
1145 elf.e_flags = 0;
1146 elf.e_ehsize = sizeof(elf);
1147 elf.e_phentsize = sizeof(struct elf_phdr);
1148 elf.e_phnum = segs+1; /* Include notes. */
1149 elf.e_shentsize = 0;
1150 elf.e_shnum = 0;
1151 elf.e_shstrndx = 0;
1152
1153 fs = get_fs();
1154 set_fs(KERNEL_DS);
1155
1156 has_dumped = 1;
1157 current->flags |= PF_DUMPCORE;
1158
1159 DUMP_WRITE(&elf, sizeof(elf));
1160 offset += sizeof(elf); /* Elf header. */
1161 offset += (segs+1) * sizeof(struct elf_phdr); /* Program headers. */
1162
1163 /* Set up the notes in similar form to SVR4 core dumps made
1164 * with info from their /proc.
1165 */
1166 memset(&psinfo, 0, sizeof(psinfo));
1167 memset(&prstatus, 0, sizeof(prstatus));
1168
1169 notes[0].name = "CORE";
1170 notes[0].type = NT_PRSTATUS;
1171 notes[0].datasz = sizeof(prstatus);
1172 notes[0].data = &prstatus;
1173 prstatus.pr_info.si_signo = prstatus.pr_cursig = signr;
1174 prstatus.pr_sigpend = current->pending.signal.sig[0];
1175 prstatus.pr_sighold = current->blocked.sig[0];
1176 psinfo.pr_pid = prstatus.pr_pid = task_pid_vnr(current);
1177 psinfo.pr_ppid = prstatus.pr_ppid = task_pid_vnr(current->parent);
1178 psinfo.pr_pgrp = prstatus.pr_pgrp = task_pgrp_vnr(current);
1179 psinfo.pr_sid = prstatus.pr_sid = task_session_vnr(current);
1180 if (thread_group_leader(current)) {
1181 /*
1182 * This is the record for the group leader. Add in the
1183 * cumulative times of previous dead threads. This total
1184 * won't include the time of each live thread whose state
1185 * is included in the core dump. The final total reported
1186 * to our parent process when it calls wait4 will include
1187 * those sums as well as the little bit more time it takes
1188 * this and each other thread to finish dying after the
1189 * core dump synchronization phase.
1190 */
1191 jiffies_to_timeval(current->utime + current->signal->utime,
1192 &prstatus.pr_utime);
1193 jiffies_to_timeval(current->stime + current->signal->stime,
1194 &prstatus.pr_stime);
1195 } else {
1196 jiffies_to_timeval(current->utime, &prstatus.pr_utime);
1197 jiffies_to_timeval(current->stime, &prstatus.pr_stime);
1198 }
1199 jiffies_to_timeval(current->signal->cutime, &prstatus.pr_cutime);
1200 jiffies_to_timeval(current->signal->cstime, &prstatus.pr_cstime);
1201
1202 if (sizeof(elf_gregset_t) != sizeof(struct pt_regs)) {
1203 printk("sizeof(elf_gregset_t) (%d) != sizeof(struct pt_regs) "
1204 "(%d)\n", sizeof(elf_gregset_t), sizeof(struct pt_regs));
1205 } else {
1206 *(struct pt_regs *)&prstatus.pr_reg = *regs;
1207 }
1208
1209 notes[1].name = "CORE";
1210 notes[1].type = NT_PRPSINFO;
1211 notes[1].datasz = sizeof(psinfo);
1212 notes[1].data = &psinfo;
1213 i = current->state ? ffz(~current->state) + 1 : 0;
1214 psinfo.pr_state = i;
1215 psinfo.pr_sname = (i < 0 || i > 5) ? '.' : "RSDZTD"[i];
1216 psinfo.pr_zomb = psinfo.pr_sname == 'Z';
1217 psinfo.pr_nice = task_nice(current);
1218 psinfo.pr_flag = current->flags;
1219 psinfo.pr_uid = current->uid;
1220 psinfo.pr_gid = current->gid;
1221 {
1222 int i, len;
1223
1224 set_fs(fs);
1225
1226 len = current->mm->arg_end - current->mm->arg_start;
1227 len = len >= ELF_PRARGSZ ? ELF_PRARGSZ : len;
1228 (void *) copy_from_user(&psinfo.pr_psargs,
1229 (const char __user *)current->mm->arg_start, len);
1230 for (i = 0; i < len; i++)
1231 if (psinfo.pr_psargs[i] == 0)
1232 psinfo.pr_psargs[i] = ' ';
1233 psinfo.pr_psargs[len] = 0;
1234
1235 set_fs(KERNEL_DS);
1236 }
1237 strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
1238
1239 /* Try to dump the FPU. */
1240 prstatus.pr_fpvalid = dump_fpu(regs, &fpu);
1241 if (!prstatus.pr_fpvalid) {
1242 numnote--;
1243 } else {
1244 notes[2].name = "CORE";
1245 notes[2].type = NT_PRFPREG;
1246 notes[2].datasz = sizeof(fpu);
1247 notes[2].data = &fpu;
1248 }
1249
1250 /* Write notes phdr entry. */
1251 {
1252 struct elf_phdr phdr;
1253 int sz = 0;
1254
1255 for (i = 0; i < numnote; i++)
1256 sz += notesize(&notes[i]);
1257
1258 phdr.p_type = PT_NOTE;
1259 phdr.p_offset = offset;
1260 phdr.p_vaddr = 0;
1261 phdr.p_paddr = 0;
1262 phdr.p_filesz = sz;
1263 phdr.p_memsz = 0;
1264 phdr.p_flags = 0;
1265 phdr.p_align = 0;
1266
1267 offset += phdr.p_filesz;
1268 DUMP_WRITE(&phdr, sizeof(phdr));
1269 }
1270
1271 /* Page-align dumped data. */
1272 dataoff = offset = roundup(offset, PAGE_SIZE);
1273
1274 /* Write program headers for segments dump. */
1275 for (vma = current->mm->mmap, i = 0;
1276 i < segs && vma != NULL; vma = vma->vm_next) {
1277 struct elf_phdr phdr;
1278 size_t sz;
1279
1280 i++;
1281
1282 sz = vma->vm_end - vma->vm_start;
1283
1284 phdr.p_type = PT_LOAD;
1285 phdr.p_offset = offset;
1286 phdr.p_vaddr = vma->vm_start;
1287 phdr.p_paddr = 0;
1288 phdr.p_filesz = maydump(vma) ? sz : 0;
1289 phdr.p_memsz = sz;
1290 offset += phdr.p_filesz;
1291 phdr.p_flags = vma->vm_flags & VM_READ ? PF_R : 0;
1292 if (vma->vm_flags & VM_WRITE)
1293 phdr.p_flags |= PF_W;
1294 if (vma->vm_flags & VM_EXEC)
1295 phdr.p_flags |= PF_X;
1296 phdr.p_align = PAGE_SIZE;
1297
1298 DUMP_WRITE(&phdr, sizeof(phdr));
1299 }
1300
1301 for (i = 0; i < numnote; i++)
1302 if (!writenote(&notes[i], file))
1303 goto end_coredump;
1304
1305 set_fs(fs);
1306
1307 DUMP_SEEK(dataoff);
1308
1309 for (i = 0, vma = current->mm->mmap;
1310 i < segs && vma != NULL;
1311 vma = vma->vm_next) {
1312 unsigned long addr = vma->vm_start;
1313 unsigned long len = vma->vm_end - vma->vm_start;
1314
1315 if (!maydump(vma))
1316 continue;
1317 i++;
1318 pr_debug("elf_core_dump: writing %08lx %lx\n", addr, len);
1319 DUMP_WRITE((void __user *)addr, len);
1320 }
1321
1322 if ((off_t) file->f_pos != offset) {
1323 /* Sanity check. */
1324 printk("elf_core_dump: file->f_pos (%ld) != offset (%ld)\n",
1325 (off_t) file->f_pos, offset);
1326 }
1327
1328end_coredump:
1329 set_fs(fs);
1330 return has_dumped;
1331}
1332
1333static int __init init_irix_binfmt(void)
1334{
1335 extern int init_inventory(void);
1336 extern asmlinkage unsigned long sys_call_table;
1337 extern asmlinkage unsigned long sys_call_table_irix5;
1338
1339 init_inventory();
1340
1341 /*
1342 * Copy the IRIX5 syscall table (8000 bytes) into the main syscall
1343 * table. The IRIX5 calls are located by an offset of 8000 bytes
1344 * from the beginning of the main table.
1345 */
1346 memcpy((void *) ((unsigned long) &sys_call_table + 8000),
1347 &sys_call_table_irix5, 8000);
1348
1349 return register_binfmt(&irix_format);
1350}
1351
1352static void __exit exit_irix_binfmt(void)
1353{
1354 /*
1355 * Remove the Irix ELF loader.
1356 */
1357 unregister_binfmt(&irix_format);
1358}
1359
1360module_init(init_irix_binfmt)
1361module_exit(exit_irix_binfmt)
diff --git a/arch/mips/kernel/irixinv.c b/arch/mips/kernel/irixinv.c
deleted file mode 100644
index cf2dcd3d6a93..000000000000
--- a/arch/mips/kernel/irixinv.c
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * Support the inventory interface for IRIX binaries
3 * This is invoked before the mm layer is working, so we do not
4 * use the linked lists for the inventory yet.
5 *
6 * Miguel de Icaza, 1997.
7 */
8#include <linux/mm.h>
9#include <asm/inventory.h>
10#include <asm/uaccess.h>
11
12#define MAX_INVENTORY 50
13int inventory_items = 0;
14
15static inventory_t inventory [MAX_INVENTORY];
16
17void add_to_inventory(int class, int type, int controller, int unit, int state)
18{
19 inventory_t *ni = &inventory [inventory_items];
20
21 if (inventory_items == MAX_INVENTORY)
22 return;
23
24 ni->inv_class = class;
25 ni->inv_type = type;
26 ni->inv_controller = controller;
27 ni->inv_unit = unit;
28 ni->inv_state = state;
29 ni->inv_next = ni;
30 inventory_items++;
31}
32
33int dump_inventory_to_user(void __user *userbuf, int size)
34{
35 inventory_t *inv = &inventory [0];
36 inventory_t __user *user = userbuf;
37 int v;
38
39 if (!access_ok(VERIFY_WRITE, userbuf, size))
40 return -EFAULT;
41
42 for (v = 0; v < inventory_items; v++){
43 inv = &inventory [v];
44 if (copy_to_user (user, inv, sizeof (inventory_t)))
45 return -EFAULT;
46 user++;
47 }
48 return inventory_items * sizeof(inventory_t);
49}
50
51int __init init_inventory(void)
52{
53 /*
54 * gross hack while we put the right bits all over the kernel
55 * most likely this will not let just anyone run the X server
56 * until we put the right values all over the place
57 */
58 add_to_inventory(10, 3, 0, 0, 16400);
59 add_to_inventory(1, 1, 150, -1, 12);
60 add_to_inventory(1, 3, 0, 0, 8976);
61 add_to_inventory(1, 2, 0, 0, 8976);
62 add_to_inventory(4, 8, 0, 0, 2);
63 add_to_inventory(5, 5, 0, 0, 1);
64 add_to_inventory(3, 3, 0, 0, 32768);
65 add_to_inventory(3, 4, 0, 0, 32768);
66 add_to_inventory(3, 8, 0, 0, 524288);
67 add_to_inventory(3, 9, 0, 0, 64);
68 add_to_inventory(3, 1, 0, 0, 67108864);
69 add_to_inventory(12, 3, 0, 0, 16);
70 add_to_inventory(8, 7, 17, 0, 16777472);
71 add_to_inventory(8, 0, 0, 0, 1);
72 add_to_inventory(2, 1, 0, 13, 2);
73 add_to_inventory(2, 2, 0, 2, 0);
74 add_to_inventory(2, 2, 0, 1, 0);
75 add_to_inventory(7, 14, 0, 0, 6);
76
77 return 0;
78}
diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c
deleted file mode 100644
index b39bdba82e02..000000000000
--- a/arch/mips/kernel/irixioctl.c
+++ /dev/null
@@ -1,213 +0,0 @@
1/*
2 * irixioctl.c: A fucking mess...
3 *
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 */
6
7#include <linux/kernel.h>
8#include <linux/sched.h>
9#include <linux/fs.h>
10#include <linux/mm.h>
11#include <linux/smp.h>
12#include <linux/sockios.h>
13#include <linux/syscalls.h>
14#include <linux/tty.h>
15#include <linux/file.h>
16#include <linux/rcupdate.h>
17
18#include <asm/uaccess.h>
19#include <asm/ioctl.h>
20#include <asm/ioctls.h>
21
22#undef DEBUG_IOCTLS
23#undef DEBUG_MISSING_IOCTL
24
25struct irix_termios {
26 tcflag_t c_iflag, c_oflag, c_cflag, c_lflag;
27 cc_t c_cc[NCCS];
28};
29
30asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
31{
32 struct tty_struct *tp, *rtp;
33 mm_segment_t old_fs;
34 int i, error = 0;
35
36#ifdef DEBUG_IOCTLS
37 printk("[%s:%d] irix_ioctl(%d, ", current->comm, current->pid, fd);
38#endif
39 switch(cmd) {
40 case 0x00005401:
41#ifdef DEBUG_IOCTLS
42 printk("TCGETA, %08lx) ", arg);
43#endif
44 error = sys_ioctl(fd, TCGETA, arg);
45 break;
46
47 case 0x0000540d: {
48 struct termios kt;
49 struct irix_termios __user *it =
50 (struct irix_termios __user *) arg;
51
52#ifdef DEBUG_IOCTLS
53 printk("TCGETS, %08lx) ", arg);
54#endif
55 if (!access_ok(VERIFY_WRITE, it, sizeof(*it))) {
56 error = -EFAULT;
57 break;
58 }
59 old_fs = get_fs(); set_fs(get_ds());
60 error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
61 set_fs(old_fs);
62 if (error)
63 break;
64
65 error = __put_user(kt.c_iflag, &it->c_iflag);
66 error |= __put_user(kt.c_oflag, &it->c_oflag);
67 error |= __put_user(kt.c_cflag, &it->c_cflag);
68 error |= __put_user(kt.c_lflag, &it->c_lflag);
69
70 for (i = 0; i < NCCS; i++)
71 error |= __put_user(kt.c_cc[i], &it->c_cc[i]);
72 break;
73 }
74
75 case 0x0000540e: {
76 struct termios kt;
77 struct irix_termios *it = (struct irix_termios *) arg;
78
79#ifdef DEBUG_IOCTLS
80 printk("TCSETS, %08lx) ", arg);
81#endif
82 if (!access_ok(VERIFY_READ, it, sizeof(*it))) {
83 error = -EFAULT;
84 break;
85 }
86 old_fs = get_fs(); set_fs(get_ds());
87 error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
88 set_fs(old_fs);
89 if (error)
90 break;
91
92 error = __get_user(kt.c_iflag, &it->c_iflag);
93 error |= __get_user(kt.c_oflag, &it->c_oflag);
94 error |= __get_user(kt.c_cflag, &it->c_cflag);
95 error |= __get_user(kt.c_lflag, &it->c_lflag);
96
97 for (i = 0; i < NCCS; i++)
98 error |= __get_user(kt.c_cc[i], &it->c_cc[i]);
99
100 if (error)
101 break;
102 old_fs = get_fs(); set_fs(get_ds());
103 error = sys_ioctl(fd, TCSETS, (unsigned long) &kt);
104 set_fs(old_fs);
105 break;
106 }
107
108 case 0x0000540f:
109#ifdef DEBUG_IOCTLS
110 printk("TCSETSW, %08lx) ", arg);
111#endif
112 error = sys_ioctl(fd, TCSETSW, arg);
113 break;
114
115 case 0x00005471:
116#ifdef DEBUG_IOCTLS
117 printk("TIOCNOTTY, %08lx) ", arg);
118#endif
119 error = sys_ioctl(fd, TIOCNOTTY, arg);
120 break;
121
122 case 0x00007416: {
123 pid_t pid;
124#ifdef DEBUG_IOCTLS
125 printk("TIOCGSID, %08lx) ", arg);
126#endif
127 old_fs = get_fs(); set_fs(get_ds());
128 error = sys_ioctl(fd, TIOCGSID, (unsigned long)&pid);
129 set_fs(old_fs);
130 if (!error)
131 error = put_user(pid, (unsigned long __user *) arg);
132 break;
133 }
134 case 0x746e:
135 /* TIOCSTART, same effect as hitting ^Q */
136#ifdef DEBUG_IOCTLS
137 printk("TIOCSTART, %08lx) ", arg);
138#endif
139 error = sys_ioctl(fd, TCXONC, TCOON);
140 break;
141
142 case 0x20006968:
143#ifdef DEBUG_IOCTLS
144 printk("SIOCGETLABEL, %08lx) ", arg);
145#endif
146 error = -ENOPKG;
147 break;
148
149 case 0x40047477:
150#ifdef DEBUG_IOCTLS
151 printk("TIOCGPGRP, %08lx) ", arg);
152#endif
153 error = sys_ioctl(fd, TIOCGPGRP, arg);
154#ifdef DEBUG_IOCTLS
155 printk("arg=%d ", *(int *)arg);
156#endif
157 break;
158
159 case 0x40087468:
160#ifdef DEBUG_IOCTLS
161 printk("TIOCGWINSZ, %08lx) ", arg);
162#endif
163 error = sys_ioctl(fd, TIOCGWINSZ, arg);
164 break;
165
166 case 0x8004667e:
167 error = sys_ioctl(fd, FIONBIO, arg);
168 break;
169
170 case 0x80047476:
171 error = sys_ioctl(fd, TIOCSPGRP, arg);
172 break;
173
174 case 0x8020690c:
175 error = sys_ioctl(fd, SIOCSIFADDR, arg);
176 break;
177
178 case 0x80206910:
179 error = sys_ioctl(fd, SIOCSIFFLAGS, arg);
180 break;
181
182 case 0xc0206911:
183 error = sys_ioctl(fd, SIOCGIFFLAGS, arg);
184 break;
185
186 case 0xc020691b:
187 error = sys_ioctl(fd, SIOCGIFMETRIC, arg);
188 break;
189
190 default: {
191#ifdef DEBUG_MISSING_IOCTL
192 char *msg = "Unimplemented IOCTL cmd tell linux-mips@linux-mips.org\n";
193
194#ifdef DEBUG_IOCTLS
195 printk("UNIMP_IOCTL, %08lx)\n", arg);
196#endif
197 old_fs = get_fs(); set_fs(get_ds());
198 sys_write(2, msg, strlen(msg));
199 set_fs(old_fs);
200 printk("[%s:%d] Does unimplemented IRIX ioctl cmd %08lx\n",
201 current->comm, current->pid, cmd);
202 do_exit(255);
203#else
204 error = sys_ioctl(fd, cmd, arg);
205#endif
206 }
207
208 };
209#ifdef DEBUG_IOCTLS
210 printk("error=%d\n", error);
211#endif
212 return error;
213}
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
deleted file mode 100644
index 0215c805a592..000000000000
--- a/arch/mips/kernel/irixsig.c
+++ /dev/null
@@ -1,888 +0,0 @@
1/*
2 * irixsig.c: WHEEE, IRIX signals! YOW, am I compatible or what?!?!
3 *
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 * Copyright (C) 1997 - 2000 Ralf Baechle (ralf@gnu.org)
6 * Copyright (C) 2000 Silicon Graphics, Inc.
7 */
8#include <linux/kernel.h>
9#include <linux/sched.h>
10#include <linux/mm.h>
11#include <linux/errno.h>
12#include <linux/smp.h>
13#include <linux/time.h>
14#include <linux/ptrace.h>
15#include <linux/resource.h>
16
17#include <asm/ptrace.h>
18#include <asm/uaccess.h>
19#include <asm/unistd.h>
20
21#undef DEBUG_SIG
22
23#define _S(nr) (1<<((nr)-1))
24
25#define _BLOCKABLE (~(_S(SIGKILL) | _S(SIGSTOP)))
26
27#define _IRIX_NSIG 128
28#define _IRIX_NSIG_BPW BITS_PER_LONG
29#define _IRIX_NSIG_WORDS (_IRIX_NSIG / _IRIX_NSIG_BPW)
30
31typedef struct {
32 unsigned long sig[_IRIX_NSIG_WORDS];
33} irix_sigset_t;
34
35struct sigctx_irix5 {
36 u32 rmask, cp0_status;
37 u64 pc;
38 u64 regs[32];
39 u64 fpregs[32];
40 u32 usedfp, fpcsr, fpeir, sstk_flags;
41 u64 hi, lo;
42 u64 cp0_cause, cp0_badvaddr, _unused0;
43 irix_sigset_t sigset;
44 u64 weird_fpu_thing;
45 u64 _unused1[31];
46};
47
48#ifdef DEBUG_SIG
49/* Debugging */
50static inline void dump_irix5_sigctx(struct sigctx_irix5 *c)
51{
52 int i;
53
54 printk("misc: rmask[%08lx] status[%08lx] pc[%08lx]\n",
55 (unsigned long) c->rmask,
56 (unsigned long) c->cp0_status,
57 (unsigned long) c->pc);
58 printk("regs: ");
59 for(i = 0; i < 16; i++)
60 printk("[%d]<%08lx> ", i, (unsigned long) c->regs[i]);
61 printk("\nregs: ");
62 for(i = 16; i < 32; i++)
63 printk("[%d]<%08lx> ", i, (unsigned long) c->regs[i]);
64 printk("\nfpregs: ");
65 for(i = 0; i < 16; i++)
66 printk("[%d]<%08lx> ", i, (unsigned long) c->fpregs[i]);
67 printk("\nfpregs: ");
68 for(i = 16; i < 32; i++)
69 printk("[%d]<%08lx> ", i, (unsigned long) c->fpregs[i]);
70 printk("misc: usedfp[%d] fpcsr[%08lx] fpeir[%08lx] stk_flgs[%08lx]\n",
71 (int) c->usedfp, (unsigned long) c->fpcsr,
72 (unsigned long) c->fpeir, (unsigned long) c->sstk_flags);
73 printk("misc: hi[%08lx] lo[%08lx] cause[%08lx] badvaddr[%08lx]\n",
74 (unsigned long) c->hi, (unsigned long) c->lo,
75 (unsigned long) c->cp0_cause, (unsigned long) c->cp0_badvaddr);
76 printk("misc: sigset<0>[%08lx] sigset<1>[%08lx] sigset<2>[%08lx] "
77 "sigset<3>[%08lx]\n", (unsigned long) c->sigset.sig[0],
78 (unsigned long) c->sigset.sig[1],
79 (unsigned long) c->sigset.sig[2],
80 (unsigned long) c->sigset.sig[3]);
81}
82#endif
83
84static int setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs,
85 int signr, sigset_t *oldmask)
86{
87 struct sigctx_irix5 __user *ctx;
88 unsigned long sp;
89 int error, i;
90
91 sp = regs->regs[29];
92 sp -= sizeof(struct sigctx_irix5);
93 sp &= ~(0xf);
94 ctx = (struct sigctx_irix5 __user *) sp;
95 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
96 goto segv_and_exit;
97
98 error = __put_user(0, &ctx->weird_fpu_thing);
99 error |= __put_user(~(0x00000001), &ctx->rmask);
100 error |= __put_user(0, &ctx->regs[0]);
101 for(i = 1; i < 32; i++)
102 error |= __put_user((u64) regs->regs[i], &ctx->regs[i]);
103
104 error |= __put_user((u64) regs->hi, &ctx->hi);
105 error |= __put_user((u64) regs->lo, &ctx->lo);
106 error |= __put_user((u64) regs->cp0_epc, &ctx->pc);
107 error |= __put_user(!!used_math(), &ctx->usedfp);
108 error |= __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
109 error |= __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
110
111 error |= __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */
112
113 error |= __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t)) ? -EFAULT : 0;
114
115 if (error)
116 goto segv_and_exit;
117
118#ifdef DEBUG_SIG
119 dump_irix5_sigctx(ctx);
120#endif
121
122 regs->regs[4] = (unsigned long) signr;
123 regs->regs[5] = 0; /* XXX sigcode XXX */
124 regs->regs[6] = regs->regs[29] = sp;
125 regs->regs[7] = (unsigned long) ka->sa.sa_handler;
126 regs->regs[25] = regs->cp0_epc = (unsigned long) ka->sa_restorer;
127
128 return 1;
129
130segv_and_exit:
131 force_sigsegv(signr, current);
132 return 0;
133}
134
135static int inline
136setup_irix_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
137 int signr, sigset_t *oldmask, siginfo_t *info)
138{
139 printk("Aiee: setup_tr_frame wants to be written");
140 do_exit(SIGSEGV);
141}
142
143static inline int handle_signal(unsigned long sig, siginfo_t *info,
144 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
145{
146 int ret;
147
148 switch(regs->regs[0]) {
149 case ERESTARTNOHAND:
150 regs->regs[2] = EINTR;
151 break;
152 case ERESTARTSYS:
153 if(!(ka->sa.sa_flags & SA_RESTART)) {
154 regs->regs[2] = EINTR;
155 break;
156 }
157 /* fallthrough */
158 case ERESTARTNOINTR: /* Userland will reload $v0. */
159 regs->cp0_epc -= 8;
160 }
161
162 regs->regs[0] = 0; /* Don't deal with this again. */
163
164 if (ka->sa.sa_flags & SA_SIGINFO)
165 ret = setup_irix_rt_frame(ka, regs, sig, oldset, info);
166 else
167 ret = setup_irix_frame(ka, regs, sig, oldset);
168
169 spin_lock_irq(&current->sighand->siglock);
170 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
171 if (!(ka->sa.sa_flags & SA_NODEFER))
172 sigaddset(&current->blocked, sig);
173 recalc_sigpending();
174 spin_unlock_irq(&current->sighand->siglock);
175
176 return ret;
177}
178
179void do_irix_signal(struct pt_regs *regs)
180{
181 struct k_sigaction ka;
182 siginfo_t info;
183 int signr;
184 sigset_t *oldset;
185
186 /*
187 * We want the common case to go fast, which is why we may in certain
188 * cases get here from kernel mode. Just return without doing anything
189 * if so.
190 */
191 if (!user_mode(regs))
192 return;
193
194 if (test_thread_flag(TIF_RESTORE_SIGMASK))
195 oldset = &current->saved_sigmask;
196 else
197 oldset = &current->blocked;
198
199 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
200 if (signr > 0) {
201 /* Whee! Actually deliver the signal. */
202 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
203 /* a signal was successfully delivered; the saved
204 * sigmask will have been stored in the signal frame,
205 * and will be restored by sigreturn, so we can simply
206 * clear the TIF_RESTORE_SIGMASK flag */
207 if (test_thread_flag(TIF_RESTORE_SIGMASK))
208 clear_thread_flag(TIF_RESTORE_SIGMASK);
209 }
210
211 return;
212 }
213
214 /*
215 * Who's code doesn't conform to the restartable syscall convention
216 * dies here!!! The li instruction, a single machine instruction,
217 * must directly be followed by the syscall instruction.
218 */
219 if (regs->regs[0]) {
220 if (regs->regs[2] == ERESTARTNOHAND ||
221 regs->regs[2] == ERESTARTSYS ||
222 regs->regs[2] == ERESTARTNOINTR) {
223 regs->cp0_epc -= 8;
224 }
225 if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
226 regs->regs[2] = __NR_restart_syscall;
227 regs->regs[7] = regs->regs[26];
228 regs->cp0_epc -= 4;
229 }
230 regs->regs[0] = 0; /* Don't deal with this again. */
231 }
232
233 /*
234 * If there's no signal to deliver, we just put the saved sigmask
235 * back
236 */
237 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
238 clear_thread_flag(TIF_RESTORE_SIGMASK);
239 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
240 }
241}
242
243asmlinkage void
244irix_sigreturn(struct pt_regs *regs)
245{
246 struct sigctx_irix5 __user *context, *magic;
247 unsigned long umask, mask;
248 u64 *fregs;
249 u32 usedfp;
250 int error, sig, i, base = 0;
251 sigset_t blocked;
252
253 /* Always make any pending restarted system calls return -EINTR */
254 current_thread_info()->restart_block.fn = do_no_restart_syscall;
255
256 if (regs->regs[2] == 1000)
257 base = 1;
258
259 context = (struct sigctx_irix5 __user *) regs->regs[base + 4];
260 magic = (struct sigctx_irix5 __user *) regs->regs[base + 5];
261 sig = (int) regs->regs[base + 6];
262#ifdef DEBUG_SIG
263 printk("[%s:%d] IRIX sigreturn(scp[%p],ucp[%p],sig[%d])\n",
264 current->comm, current->pid, context, magic, sig);
265#endif
266 if (!context)
267 context = magic;
268 if (!access_ok(VERIFY_READ, context, sizeof(struct sigctx_irix5)))
269 goto badframe;
270
271#ifdef DEBUG_SIG
272 dump_irix5_sigctx(context);
273#endif
274
275 error = __get_user(regs->cp0_epc, &context->pc);
276 error |= __get_user(umask, &context->rmask);
277
278 mask = 2;
279 for (i = 1; i < 32; i++, mask <<= 1) {
280 if (umask & mask)
281 error |= __get_user(regs->regs[i], &context->regs[i]);
282 }
283 error |= __get_user(regs->hi, &context->hi);
284 error |= __get_user(regs->lo, &context->lo);
285
286 error |= __get_user(usedfp, &context->usedfp);
287 if ((umask & 1) && usedfp) {
288 fregs = (u64 *) &current->thread.fpu;
289
290 for(i = 0; i < 32; i++)
291 error |= __get_user(fregs[i], &context->fpregs[i]);
292 error |= __get_user(current->thread.fpu.fcr31, &context->fpcsr);
293 }
294
295 /* XXX do sigstack crapola here... XXX */
296
297 error |= __copy_from_user(&blocked, &context->sigset, sizeof(blocked)) ? -EFAULT : 0;
298
299 if (error)
300 goto badframe;
301
302 sigdelsetmask(&blocked, ~_BLOCKABLE);
303 spin_lock_irq(&current->sighand->siglock);
304 current->blocked = blocked;
305 recalc_sigpending();
306 spin_unlock_irq(&current->sighand->siglock);
307
308 /*
309 * Don't let your children do this ...
310 */
311 __asm__ __volatile__(
312 "move\t$29,%0\n\t"
313 "j\tsyscall_exit"
314 :/* no outputs */
315 :"r" (&regs));
316 /* Unreached */
317
318badframe:
319 force_sig(SIGSEGV, current);
320}
321
322struct sigact_irix5 {
323 int flags;
324 void (*handler)(int);
325 u32 sigset[4];
326 int _unused0[2];
327};
328
329#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
330 set only the low 32 bit of the sigset. */
331
332#ifdef DEBUG_SIG
333static inline void dump_sigact_irix5(struct sigact_irix5 *p)
334{
335 printk("<f[%d] hndlr[%08lx] msk[%08lx]>", p->flags,
336 (unsigned long) p->handler,
337 (unsigned long) p->sigset[0]);
338}
339#endif
340
341asmlinkage int
342irix_sigaction(int sig, const struct sigaction __user *act,
343 struct sigaction __user *oact, void __user *trampoline)
344{
345 struct k_sigaction new_ka, old_ka;
346 int ret;
347
348#ifdef DEBUG_SIG
349 printk(" (%d,%s,%s,%08lx) ", sig, (!new ? "0" : "NEW"),
350 (!old ? "0" : "OLD"), trampoline);
351 if(new) {
352 dump_sigact_irix5(new); printk(" ");
353 }
354#endif
355 if (act) {
356 sigset_t mask;
357 int err;
358
359 if (!access_ok(VERIFY_READ, act, sizeof(*act)))
360 return -EFAULT;
361 err = __get_user(new_ka.sa.sa_handler, &act->sa_handler);
362 err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
363
364 err |= __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t)) ? -EFAULT : 0;
365 if (err)
366 return err;
367
368 /*
369 * Hmmm... methinks IRIX libc always passes a valid trampoline
370 * value for all invocations of sigaction. Will have to
371 * investigate. POSIX POSIX, die die die...
372 */
373 new_ka.sa_restorer = trampoline;
374 }
375
376/* XXX Implement SIG_SETMASK32 for IRIX compatibility */
377 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
378
379 if (!ret && oact) {
380 int err;
381
382 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
383 return -EFAULT;
384
385 err = __put_user(old_ka.sa.sa_handler, &oact->sa_handler);
386 err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
387 err |= __copy_to_user(&oact->sa_mask, &old_ka.sa.sa_mask,
388 sizeof(sigset_t)) ? -EFAULT : 0;
389 if (err)
390 return -EFAULT;
391 }
392
393 return ret;
394}
395
396asmlinkage int irix_sigpending(irix_sigset_t __user *set)
397{
398 return do_sigpending(set, sizeof(*set));
399}
400
401asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
402 irix_sigset_t __user *old)
403{
404 sigset_t oldbits, newbits;
405
406 if (new) {
407 if (!access_ok(VERIFY_READ, new, sizeof(*new)))
408 return -EFAULT;
409 if (__copy_from_user(&newbits, new, sizeof(unsigned long)*4))
410 return -EFAULT;
411 sigdelsetmask(&newbits, ~_BLOCKABLE);
412
413 spin_lock_irq(&current->sighand->siglock);
414 oldbits = current->blocked;
415
416 switch(how) {
417 case 1:
418 sigorsets(&newbits, &oldbits, &newbits);
419 break;
420
421 case 2:
422 sigandsets(&newbits, &oldbits, &newbits);
423 break;
424
425 case 3:
426 break;
427
428 case 256:
429 siginitset(&newbits, newbits.sig[0]);
430 break;
431
432 default:
433 spin_unlock_irq(&current->sighand->siglock);
434 return -EINVAL;
435 }
436 recalc_sigpending();
437 spin_unlock_irq(&current->sighand->siglock);
438 }
439 if (old)
440 return copy_to_user(old, &current->blocked,
441 sizeof(unsigned long)*4) ? -EFAULT : 0;
442
443 return 0;
444}
445
446asmlinkage int irix_sigsuspend(struct pt_regs *regs)
447{
448 sigset_t newset;
449 sigset_t __user *uset;
450
451 uset = (sigset_t __user *) regs->regs[4];
452 if (copy_from_user(&newset, uset, sizeof(sigset_t)))
453 return -EFAULT;
454 sigdelsetmask(&newset, ~_BLOCKABLE);
455
456 spin_lock_irq(&current->sighand->siglock);
457 current->saved_sigmask = current->blocked;
458 current->blocked = newset;
459 recalc_sigpending();
460 spin_unlock_irq(&current->sighand->siglock);
461
462 current->state = TASK_INTERRUPTIBLE;
463 schedule();
464 set_thread_flag(TIF_RESTORE_SIGMASK);
465 return -ERESTARTNOHAND;
466}
467
468/* hate hate hate... */
469struct irix5_siginfo {
470 int sig, code, error;
471 union {
472 char unused[128 - (3 * 4)]; /* Safety net. */
473 struct {
474 int pid;
475 union {
476 int uid;
477 struct {
478 int utime, status, stime;
479 } child;
480 } procdata;
481 } procinfo;
482
483 unsigned long fault_addr;
484
485 struct {
486 int fd;
487 long band;
488 } fileinfo;
489
490 unsigned long sigval;
491 } stuff;
492};
493
494asmlinkage int irix_sigpoll_sys(unsigned long __user *set,
495 struct irix5_siginfo __user *info, struct timespec __user *tp)
496{
497 long expire = MAX_SCHEDULE_TIMEOUT;
498 sigset_t kset;
499 int i, sig, error, timeo = 0;
500 struct timespec ktp;
501
502#ifdef DEBUG_SIG
503 printk("[%s:%d] irix_sigpoll_sys(%p,%p,%p)\n",
504 current->comm, current->pid, set, info, tp);
505#endif
506
507 /* Must always specify the signal set. */
508 if (!set)
509 return -EINVAL;
510
511 if (copy_from_user(&kset, set, sizeof(set)))
512 return -EFAULT;
513
514 if (info && clear_user(info, sizeof(*info))) {
515 error = -EFAULT;
516 goto out;
517 }
518
519 if (tp) {
520 if (copy_from_user(&ktp, tp, sizeof(*tp)))
521 return -EFAULT;
522
523 if (!ktp.tv_sec && !ktp.tv_nsec)
524 return -EINVAL;
525
526 expire = timespec_to_jiffies(&ktp) +
527 (ktp.tv_sec || ktp.tv_nsec);
528 }
529
530 while(1) {
531 long tmp = 0;
532
533 expire = schedule_timeout_interruptible(expire);
534
535 for (i=0; i < _IRIX_NSIG_WORDS; i++)
536 tmp |= (current->pending.signal.sig[i] & kset.sig[i]);
537
538 if (tmp)
539 break;
540 if (!expire) {
541 timeo = 1;
542 break;
543 }
544 if (signal_pending(current))
545 return -EINTR;
546 }
547 if (timeo)
548 return -EAGAIN;
549
550 for (sig = 1; i <= 65 /* IRIX_NSIG */; sig++) {
551 if (sigismember (&kset, sig))
552 continue;
553 if (sigismember (&current->pending.signal, sig)) {
554 /* XXX need more than this... */
555 if (info)
556 return copy_to_user(&info->sig, &sig, sizeof(sig));
557 return 0;
558 }
559 }
560
561 /* Should not get here, but do something sane if we do. */
562 error = -EINTR;
563
564out:
565 return error;
566}
567
568/* This is here because of irix5_siginfo definition. */
569#define IRIX_P_PID 0
570#define IRIX_P_PGID 2
571#define IRIX_P_ALL 7
572
573#define W_EXITED 1
574#define W_TRAPPED 2
575#define W_STOPPED 4
576#define W_CONT 8
577#define W_NOHANG 64
578
579#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG)
580
581asmlinkage int irix_waitsys(int type, int upid,
582 struct irix5_siginfo __user *info, int options,
583 struct rusage __user *ru)
584{
585 struct pid *pid = NULL;
586 int flag, retval;
587 DECLARE_WAITQUEUE(wait, current);
588 struct task_struct *tsk;
589 struct task_struct *p;
590 struct list_head *_p;
591
592 if (!info)
593 return -EINVAL;
594
595 if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
596 return -EFAULT;
597
598 if (ru)
599 if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru)))
600 return -EFAULT;
601
602 if (options & ~W_MASK)
603 return -EINVAL;
604
605 if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL)
606 return -EINVAL;
607
608 if (type != IRIX_P_ALL)
609 pid = find_get_pid(upid);
610 add_wait_queue(&current->signal->wait_chldexit, &wait);
611repeat:
612 flag = 0;
613 current->state = TASK_INTERRUPTIBLE;
614 read_lock(&tasklist_lock);
615 tsk = current;
616 list_for_each(_p, &tsk->children) {
617 p = list_entry(_p, struct task_struct, sibling);
618 if ((type == IRIX_P_PID) && task_pid(p) != pid)
619 continue;
620 if ((type == IRIX_P_PGID) && task_pgrp(p) != pid)
621 continue;
622 if ((p->exit_signal != SIGCHLD))
623 continue;
624 flag = 1;
625 switch (p->state) {
626 case TASK_STOPPED:
627 if (!p->exit_code)
628 continue;
629 if (!(options & (W_TRAPPED|W_STOPPED)) &&
630 !(p->ptrace & PT_PTRACED))
631 continue;
632 read_unlock(&tasklist_lock);
633
634 /* move to end of parent's list to avoid starvation */
635 write_lock_irq(&tasklist_lock);
636 remove_parent(p);
637 add_parent(p);
638 write_unlock_irq(&tasklist_lock);
639 retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0;
640 if (retval)
641 goto end_waitsys;
642
643 retval = __put_user(SIGCHLD, &info->sig);
644 retval |= __put_user(0, &info->code);
645 retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
646 retval |= __put_user((p->exit_code >> 8) & 0xff,
647 &info->stuff.procinfo.procdata.child.status);
648 retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
649 retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime);
650 if (retval)
651 goto end_waitsys;
652
653 p->exit_code = 0;
654 goto end_waitsys;
655
656 case EXIT_ZOMBIE:
657 current->signal->cutime += p->utime + p->signal->cutime;
658 current->signal->cstime += p->stime + p->signal->cstime;
659 if (ru != NULL)
660 getrusage(p, RUSAGE_BOTH, ru);
661 retval = __put_user(SIGCHLD, &info->sig);
662 retval |= __put_user(1, &info->code); /* CLD_EXITED */
663 retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
664 retval |= __put_user((p->exit_code >> 8) & 0xff,
665 &info->stuff.procinfo.procdata.child.status);
666 retval |= __put_user(p->utime,
667 &info->stuff.procinfo.procdata.child.utime);
668 retval |= __put_user(p->stime,
669 &info->stuff.procinfo.procdata.child.stime);
670 if (retval)
671 goto end_waitsys;
672
673 if (p->real_parent != p->parent) {
674 write_lock_irq(&tasklist_lock);
675 remove_parent(p);
676 p->parent = p->real_parent;
677 add_parent(p);
678 do_notify_parent(p, SIGCHLD);
679 write_unlock_irq(&tasklist_lock);
680 } else
681 release_task(p);
682 goto end_waitsys;
683 default:
684 continue;
685 }
686 tsk = next_thread(tsk);
687 }
688 read_unlock(&tasklist_lock);
689 if (flag) {
690 retval = 0;
691 if (options & W_NOHANG)
692 goto end_waitsys;
693 retval = -ERESTARTSYS;
694 if (signal_pending(current))
695 goto end_waitsys;
696 current->state = TASK_INTERRUPTIBLE;
697 schedule();
698 goto repeat;
699 }
700 retval = -ECHILD;
701end_waitsys:
702 current->state = TASK_RUNNING;
703 remove_wait_queue(&current->signal->wait_chldexit, &wait);
704 put_pid(pid);
705
706 return retval;
707}
708
709struct irix5_context {
710 u32 flags;
711 u32 link;
712 u32 sigmask[4];
713 struct { u32 sp, size, flags; } stack;
714 int regs[36];
715 u32 fpregs[32];
716 u32 fpcsr;
717 u32 _unused0;
718 u32 _unused1[47];
719 u32 weird_graphics_thing;
720};
721
722asmlinkage int irix_getcontext(struct pt_regs *regs)
723{
724 int error, i, base = 0;
725 struct irix5_context __user *ctx;
726 unsigned long flags;
727
728 if (regs->regs[2] == 1000)
729 base = 1;
730 ctx = (struct irix5_context __user *) regs->regs[base + 4];
731
732#ifdef DEBUG_SIG
733 printk("[%s:%d] irix_getcontext(%p)\n",
734 current->comm, current->pid, ctx);
735#endif
736
737 if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
738 return -EFAULT;
739
740 error = __put_user(current->thread.irix_oldctx, &ctx->link);
741
742 error |= __copy_to_user(&ctx->sigmask, &current->blocked, sizeof(irix_sigset_t)) ? -EFAULT : 0;
743
744 /* XXX Do sigstack stuff someday... */
745 error |= __put_user(0, &ctx->stack.sp);
746 error |= __put_user(0, &ctx->stack.size);
747 error |= __put_user(0, &ctx->stack.flags);
748
749 error |= __put_user(0, &ctx->weird_graphics_thing);
750 error |= __put_user(0, &ctx->regs[0]);
751 for (i = 1; i < 32; i++)
752 error |= __put_user(regs->regs[i], &ctx->regs[i]);
753 error |= __put_user(regs->lo, &ctx->regs[32]);
754 error |= __put_user(regs->hi, &ctx->regs[33]);
755 error |= __put_user(regs->cp0_cause, &ctx->regs[34]);
756 error |= __put_user(regs->cp0_epc, &ctx->regs[35]);
757
758 flags = 0x0f;
759 if (!used_math()) {
760 flags &= ~(0x08);
761 } else {
762 /* XXX wheee... */
763 printk("Wheee, no code for saving IRIX FPU context yet.\n");
764 }
765 error |= __put_user(flags, &ctx->flags);
766
767 return error;
768}
769
770asmlinkage void irix_setcontext(struct pt_regs *regs)
771{
772 struct irix5_context __user *ctx;
773 int err, base = 0;
774 u32 flags;
775
776 if (regs->regs[2] == 1000)
777 base = 1;
778 ctx = (struct irix5_context __user *) regs->regs[base + 4];
779
780#ifdef DEBUG_SIG
781 printk("[%s:%d] irix_setcontext(%p)\n",
782 current->comm, current->pid, ctx);
783#endif
784
785 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)))
786 goto segv_and_exit;
787
788 err = __get_user(flags, &ctx->flags);
789 if (flags & 0x02) {
790 /* XXX sigstack garbage, todo... */
791 printk("Wheee, cannot do sigstack stuff in setcontext\n");
792 }
793
794 if (flags & 0x04) {
795 int i;
796
797 /* XXX extra control block stuff... todo... */
798 for (i = 1; i < 32; i++)
799 err |= __get_user(regs->regs[i], &ctx->regs[i]);
800 err |= __get_user(regs->lo, &ctx->regs[32]);
801 err |= __get_user(regs->hi, &ctx->regs[33]);
802 err |= __get_user(regs->cp0_epc, &ctx->regs[35]);
803 }
804
805 if (flags & 0x08)
806 /* XXX fpu context, blah... */
807 printk(KERN_ERR "Wheee, cannot restore FPU context yet...\n");
808
809 err |= __get_user(current->thread.irix_oldctx, &ctx->link);
810 if (err)
811 goto segv_and_exit;
812
813 /*
814 * Don't let your children do this ...
815 */
816 __asm__ __volatile__(
817 "move\t$29,%0\n\t"
818 "j\tsyscall_exit"
819 :/* no outputs */
820 :"r" (&regs));
821 /* Unreached */
822
823segv_and_exit:
824 force_sigsegv(SIGSEGV, current);
825}
826
827struct irix_sigstack {
828 unsigned long sp;
829 int status;
830};
831
832asmlinkage int irix_sigstack(struct irix_sigstack __user *new,
833 struct irix_sigstack __user *old)
834{
835#ifdef DEBUG_SIG
836 printk("[%s:%d] irix_sigstack(%p,%p)\n",
837 current->comm, current->pid, new, old);
838#endif
839 if (new) {
840 if (!access_ok(VERIFY_READ, new, sizeof(*new)))
841 return -EFAULT;
842 }
843
844 if (old) {
845 if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
846 return -EFAULT;
847 }
848
849 return 0;
850}
851
852struct irix_sigaltstack { unsigned long sp; int size; int status; };
853
854asmlinkage int irix_sigaltstack(struct irix_sigaltstack __user *new,
855 struct irix_sigaltstack __user *old)
856{
857#ifdef DEBUG_SIG
858 printk("[%s:%d] irix_sigaltstack(%p,%p)\n",
859 current->comm, current->pid, new, old);
860#endif
861 if (new)
862 if (!access_ok(VERIFY_READ, new, sizeof(*new)))
863 return -EFAULT;
864
865 if (old) {
866 if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
867 return -EFAULT;
868 }
869
870 return 0;
871}
872
873struct irix_procset {
874 int cmd, ltype, lid, rtype, rid;
875};
876
877asmlinkage int irix_sigsendset(struct irix_procset __user *pset, int sig)
878{
879 if (!access_ok(VERIFY_READ, pset, sizeof(*pset)))
880 return -EFAULT;
881#ifdef DEBUG_SIG
882 printk("[%s:%d] irix_sigsendset([%d,%d,%d,%d,%d],%d)\n",
883 current->comm, current->pid,
884 pset->cmd, pset->ltype, pset->lid, pset->rtype, pset->rid,
885 sig);
886#endif
887 return -EINVAL;
888}
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index ed9febe63d72..b47e4615ec12 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -49,7 +49,7 @@ static void local_rm9k_perfcounter_irq_startup(void *args)
49 49
50static unsigned int rm9k_perfcounter_irq_startup(unsigned int irq) 50static unsigned int rm9k_perfcounter_irq_startup(unsigned int irq)
51{ 51{
52 on_each_cpu(local_rm9k_perfcounter_irq_startup, (void *) irq, 0, 1); 52 on_each_cpu(local_rm9k_perfcounter_irq_startup, (void *) irq, 1);
53 53
54 return 0; 54 return 0;
55} 55}
@@ -66,7 +66,7 @@ static void local_rm9k_perfcounter_irq_shutdown(void *args)
66 66
67static void rm9k_perfcounter_irq_shutdown(unsigned int irq) 67static void rm9k_perfcounter_irq_shutdown(unsigned int irq)
68{ 68{
69 on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 0, 1); 69 on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 1);
70} 70}
71 71
72static struct irq_chip rm9k_irq_controller = { 72static struct irq_chip rm9k_irq_controller = {
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index e3309ff9ece4..6045b9a51a35 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -44,8 +44,6 @@ again:
44 return irq; 44 return irq;
45} 45}
46 46
47EXPORT_SYMBOL_GPL(allocate_irqno);
48
49/* 47/*
50 * Allocate the 16 legacy interrupts for i8259 devices. This happens early 48 * Allocate the 16 legacy interrupts for i8259 devices. This happens early
51 * in the kernel initialization so treating allocation failure as BUG() is 49 * in the kernel initialization so treating allocation failure as BUG() is
@@ -66,8 +64,6 @@ void free_irqno(unsigned int irq)
66 smp_mb__after_clear_bit(); 64 smp_mb__after_clear_bit();
67} 65}
68 66
69EXPORT_SYMBOL_GPL(free_irqno);
70
71/* 67/*
72 * 'what should we do if we get a hw irq event on an illegal vector'. 68 * 'what should we do if we get a hw irq event on an illegal vector'.
73 * each architecture has to answer this themselves. 69 * each architecture has to answer this themselves.
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 640fb0cc6e39..d01665a453f5 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -4,7 +4,6 @@
4 */ 4 */
5 5
6#include <linux/device.h> 6#include <linux/device.h>
7#include <linux/kallsyms.h>
8#include <linux/kernel.h> 7#include <linux/kernel.h>
9#include <linux/sched.h> 8#include <linux/sched.h>
10#include <linux/module.h> 9#include <linux/module.h>
@@ -84,9 +83,9 @@ void mips_mt_regdump(unsigned long mvpctl)
84 read_vpe_c0_vpeconf0()); 83 read_vpe_c0_vpeconf0());
85 printk(" VPE%d.Status : %08lx\n", 84 printk(" VPE%d.Status : %08lx\n",
86 i, read_vpe_c0_status()); 85 i, read_vpe_c0_status());
87 printk(" VPE%d.EPC : %08lx ", 86 printk(" VPE%d.EPC : %08lx %pS\n",
88 i, read_vpe_c0_epc()); 87 i, read_vpe_c0_epc(),
89 print_symbol("%s\n", read_vpe_c0_epc()); 88 (void *) read_vpe_c0_epc());
90 printk(" VPE%d.Cause : %08lx\n", 89 printk(" VPE%d.Cause : %08lx\n",
91 i, read_vpe_c0_cause()); 90 i, read_vpe_c0_cause());
92 printk(" VPE%d.Config7 : %08lx\n", 91 printk(" VPE%d.Config7 : %08lx\n",
@@ -111,8 +110,8 @@ void mips_mt_regdump(unsigned long mvpctl)
111 } 110 }
112 printk(" TCStatus : %08lx\n", tcstatval); 111 printk(" TCStatus : %08lx\n", tcstatval);
113 printk(" TCBind : %08lx\n", read_tc_c0_tcbind()); 112 printk(" TCBind : %08lx\n", read_tc_c0_tcbind());
114 printk(" TCRestart : %08lx ", read_tc_c0_tcrestart()); 113 printk(" TCRestart : %08lx %pS\n",
115 print_symbol("%s\n", read_tc_c0_tcrestart()); 114 read_tc_c0_tcrestart(), (void *) read_tc_c0_tcrestart());
116 printk(" TCHalt : %08lx\n", haltval); 115 printk(" TCHalt : %08lx\n", haltval);
117 printk(" TCContext : %08lx\n", read_tc_c0_tccontext()); 116 printk(" TCContext : %08lx\n", read_tc_c0_tccontext());
118 if (!haltval) 117 if (!haltval)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 2c09a442e5e5..c06f5b5d764c 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -125,13 +125,6 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
125 *childregs = *regs; 125 *childregs = *regs;
126 childregs->regs[7] = 0; /* Clear error flag */ 126 childregs->regs[7] = 0; /* Clear error flag */
127 127
128#if defined(CONFIG_BINFMT_IRIX)
129 if (current->personality != PER_LINUX) {
130 /* Under IRIX things are a little different. */
131 childregs->regs[3] = 1;
132 regs->regs[3] = 0;
133 }
134#endif
135 childregs->regs[2] = 0; /* Child gets zero as return value */ 128 childregs->regs[2] = 0; /* Child gets zero as return value */
136 regs->regs[2] = p->pid; 129 regs->regs[2] = p->pid;
137 130
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 08a9c5070ea8..c058c0b61a2a 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -34,12 +34,8 @@ NESTED(handle_sys, PT_SIZE, sp)
34 34
35 lw t1, PT_EPC(sp) # skip syscall on return 35 lw t1, PT_EPC(sp) # skip syscall on return
36 36
37#if defined(CONFIG_BINFMT_IRIX)
38 sltiu t0, v0, MAX_SYSCALL_NO + 1 # check syscall number
39#else
40 subu v0, v0, __NR_O32_Linux # check syscall number 37 subu v0, v0, __NR_O32_Linux # check syscall number
41 sltiu t0, v0, __NR_O32_Linux_syscalls + 1 38 sltiu t0, v0, __NR_O32_Linux_syscalls + 1
42#endif
43 addiu t1, 4 # skip to next instruction 39 addiu t1, 4 # skip to next instruction
44 sw t1, PT_EPC(sp) 40 sw t1, PT_EPC(sp)
45 beqz t0, illegal_syscall 41 beqz t0, illegal_syscall
@@ -264,22 +260,14 @@ bad_alignment:
264 END(sys_sysmips) 260 END(sys_sysmips)
265 261
266 LEAF(sys_syscall) 262 LEAF(sys_syscall)
267#if defined(CONFIG_BINFMT_IRIX)
268 sltiu v0, a0, MAX_SYSCALL_NO + 1 # check syscall number
269#else
270 subu t0, a0, __NR_O32_Linux # check syscall number 263 subu t0, a0, __NR_O32_Linux # check syscall number
271 sltiu v0, t0, __NR_O32_Linux_syscalls + 1 264 sltiu v0, t0, __NR_O32_Linux_syscalls + 1
272#endif
273 sll t1, t0, 3 265 sll t1, t0, 3
274 beqz v0, einval 266 beqz v0, einval
275 267
276 lw t2, sys_call_table(t1) # syscall routine 268 lw t2, sys_call_table(t1) # syscall routine
277 269
278#if defined(CONFIG_BINFMT_IRIX)
279 li v1, 4000 # nr of sys_syscall
280#else
281 li v1, 4000 - __NR_O32_Linux # index of sys_syscall 270 li v1, 4000 - __NR_O32_Linux # index of sys_syscall
282#endif
283 beq t0, v1, einval # do not recurse 271 beq t0, v1, einval # do not recurse
284 272
285 /* Some syscalls like execve get their arguments from struct pt_regs 273 /* Some syscalls like execve get their arguments from struct pt_regs
@@ -324,13 +312,6 @@ einval: li v0, -EINVAL
324 .endm 312 .endm
325 313
326 .macro syscalltable 314 .macro syscalltable
327#if defined(CONFIG_BINFMT_IRIX)
328 mille sys_ni_syscall 0 /* 0 - 999 SVR4 flavour */
329 mille sys_ni_syscall 0 /* 1000 - 1999 32-bit IRIX */
330 mille sys_ni_syscall 0 /* 2000 - 2999 BSD43 flavour */
331 mille sys_ni_syscall 0 /* 3000 - 3999 POSIX flavour */
332#endif
333
334 sys sys_syscall 8 /* 4000 */ 315 sys sys_syscall 8 /* 4000 */
335 sys sys_exit 1 316 sys sys_exit 1
336 sys sys_fork 0 317 sys sys_fork 0
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index c6a063b2a0d9..8af84867e74d 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -68,13 +68,6 @@ static char command_line[CL_SIZE];
68const unsigned long mips_io_port_base __read_mostly = -1; 68const unsigned long mips_io_port_base __read_mostly = -1;
69EXPORT_SYMBOL(mips_io_port_base); 69EXPORT_SYMBOL(mips_io_port_base);
70 70
71/*
72 * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
73 * for the processor.
74 */
75unsigned long isa_slot_offset;
76EXPORT_SYMBOL(isa_slot_offset);
77
78static struct resource code_resource = { .name = "Kernel code", }; 71static struct resource code_resource = { .name = "Kernel code", };
79static struct resource data_resource = { .name = "Kernel data", }; 72static struct resource data_resource = { .name = "Kernel data", };
80 73
@@ -557,11 +550,7 @@ void __init setup_arch(char **cmdline_p)
557 prom_init(); 550 prom_init();
558 551
559#ifdef CONFIG_EARLY_PRINTK 552#ifdef CONFIG_EARLY_PRINTK
560 { 553 setup_early_printk();
561 extern void setup_early_printk(void);
562
563 setup_early_printk();
564 }
565#endif 554#endif
566 cpu_report(); 555 cpu_report();
567 check_bugs_early(); 556 check_bugs_early();
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index cdf87a9dd4ba..4410f172b8ab 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -131,148 +131,29 @@ asmlinkage __cpuinit void start_secondary(void)
131 cpu_idle(); 131 cpu_idle();
132} 132}
133 133
134DEFINE_SPINLOCK(smp_call_lock); 134void arch_send_call_function_ipi(cpumask_t mask)
135
136struct call_data_struct *call_data;
137
138/*
139 * Run a function on all other CPUs.
140 *
141 * <mask> cpuset_t of all processors to run the function on.
142 * <func> The function to run. This must be fast and non-blocking.
143 * <info> An arbitrary pointer to pass to the function.
144 * <retry> If true, keep retrying until ready.
145 * <wait> If true, wait until function has completed on other CPUs.
146 * [RETURNS] 0 on success, else a negative status code.
147 *
148 * Does not return until remote CPUs are nearly ready to execute <func>
149 * or are or have executed.
150 *
151 * You must not call this function with disabled interrupts or from a
152 * hardware interrupt handler or from a bottom half handler:
153 *
154 * CPU A CPU B
155 * Disable interrupts
156 * smp_call_function()
157 * Take call_lock
158 * Send IPIs
159 * Wait for all cpus to acknowledge IPI
160 * CPU A has not responded, spin waiting
161 * for cpu A to respond, holding call_lock
162 * smp_call_function()
163 * Spin waiting for call_lock
164 * Deadlock Deadlock
165 */
166int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),
167 void *info, int retry, int wait)
168{ 135{
169 struct call_data_struct data;
170 int cpu = smp_processor_id();
171 int cpus;
172
173 /*
174 * Can die spectacularly if this CPU isn't yet marked online
175 */
176 BUG_ON(!cpu_online(cpu));
177
178 cpu_clear(cpu, mask);
179 cpus = cpus_weight(mask);
180 if (!cpus)
181 return 0;
182
183 /* Can deadlock when called with interrupts disabled */
184 WARN_ON(irqs_disabled());
185
186 data.func = func;
187 data.info = info;
188 atomic_set(&data.started, 0);
189 data.wait = wait;
190 if (wait)
191 atomic_set(&data.finished, 0);
192
193 spin_lock(&smp_call_lock);
194 call_data = &data;
195 smp_mb();
196
197 /* Send a message to all other CPUs and wait for them to respond */
198 mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION); 136 mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
199
200 /* Wait for response */
201 /* FIXME: lock-up detection, backtrace on lock-up */
202 while (atomic_read(&data.started) != cpus)
203 barrier();
204
205 if (wait)
206 while (atomic_read(&data.finished) != cpus)
207 barrier();
208 call_data = NULL;
209 spin_unlock(&smp_call_lock);
210
211 return 0;
212} 137}
213 138
214int smp_call_function(void (*func) (void *info), void *info, int retry, 139/*
215 int wait) 140 * We reuse the same vector for the single IPI
141 */
142void arch_send_call_function_single_ipi(int cpu)
216{ 143{
217 return smp_call_function_mask(cpu_online_map, func, info, retry, wait); 144 mp_ops->send_ipi_mask(cpumask_of_cpu(cpu), SMP_CALL_FUNCTION);
218} 145}
219EXPORT_SYMBOL(smp_call_function);
220 146
147/*
148 * Call into both interrupt handlers, as we share the IPI for them
149 */
221void smp_call_function_interrupt(void) 150void smp_call_function_interrupt(void)
222{ 151{
223 void (*func) (void *info) = call_data->func;
224 void *info = call_data->info;
225 int wait = call_data->wait;
226
227 /*
228 * Notify initiating CPU that I've grabbed the data and am
229 * about to execute the function.
230 */
231 smp_mb();
232 atomic_inc(&call_data->started);
233
234 /*
235 * At this point the info structure may be out of scope unless wait==1.
236 */
237 irq_enter(); 152 irq_enter();
238 (*func)(info); 153 generic_smp_call_function_single_interrupt();
154 generic_smp_call_function_interrupt();
239 irq_exit(); 155 irq_exit();
240
241 if (wait) {
242 smp_mb();
243 atomic_inc(&call_data->finished);
244 }
245}
246
247int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
248 int retry, int wait)
249{
250 int ret, me;
251
252 /*
253 * Can die spectacularly if this CPU isn't yet marked online
254 */
255 if (!cpu_online(cpu))
256 return 0;
257
258 me = get_cpu();
259 BUG_ON(!cpu_online(me));
260
261 if (cpu == me) {
262 local_irq_disable();
263 func(info);
264 local_irq_enable();
265 put_cpu();
266 return 0;
267 }
268
269 ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, retry,
270 wait);
271
272 put_cpu();
273 return 0;
274} 156}
275EXPORT_SYMBOL(smp_call_function_single);
276 157
277static void stop_this_cpu(void *dummy) 158static void stop_this_cpu(void *dummy)
278{ 159{
@@ -286,7 +167,7 @@ static void stop_this_cpu(void *dummy)
286 167
287void smp_send_stop(void) 168void smp_send_stop(void)
288{ 169{
289 smp_call_function(stop_this_cpu, NULL, 1, 0); 170 smp_call_function(stop_this_cpu, NULL, 0);
290} 171}
291 172
292void __init smp_cpus_done(unsigned int max_cpus) 173void __init smp_cpus_done(unsigned int max_cpus)
@@ -365,7 +246,7 @@ static void flush_tlb_all_ipi(void *info)
365 246
366void flush_tlb_all(void) 247void flush_tlb_all(void)
367{ 248{
368 on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1); 249 on_each_cpu(flush_tlb_all_ipi, NULL, 1);
369} 250}
370 251
371static void flush_tlb_mm_ipi(void *mm) 252static void flush_tlb_mm_ipi(void *mm)
@@ -385,7 +266,7 @@ static void flush_tlb_mm_ipi(void *mm)
385static inline void smp_on_other_tlbs(void (*func) (void *info), void *info) 266static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
386{ 267{
387#ifndef CONFIG_MIPS_MT_SMTC 268#ifndef CONFIG_MIPS_MT_SMTC
388 smp_call_function(func, info, 1, 1); 269 smp_call_function(func, info, 1);
389#endif 270#endif
390} 271}
391 272
@@ -485,7 +366,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
485 .addr2 = end, 366 .addr2 = end,
486 }; 367 };
487 368
488 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1, 1); 369 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
489} 370}
490 371
491static void flush_tlb_page_ipi(void *info) 372static void flush_tlb_page_ipi(void *info)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 3e863186cd22..a516286532ab 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -877,7 +877,6 @@ static void ipi_resched_interrupt(void)
877 /* Return from interrupt should be enough to cause scheduler check */ 877 /* Return from interrupt should be enough to cause scheduler check */
878} 878}
879 879
880
881static void ipi_call_interrupt(void) 880static void ipi_call_interrupt(void)
882{ 881{
883 /* Invoke generic function invocation code in smp.c */ 882 /* Invoke generic function invocation code in smp.c */
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
deleted file mode 100644
index c357762b8012..000000000000
--- a/arch/mips/kernel/sysirix.c
+++ /dev/null
@@ -1,2140 +0,0 @@
1/*
2 * sysirix.c: IRIX system call emulation.
3 *
4 * Copyright (C) 1996 David S. Miller
5 * Copyright (C) 1997 Miguel de Icaza
6 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle
7 */
8#include <linux/kernel.h>
9#include <linux/sched.h>
10#include <linux/binfmts.h>
11#include <linux/capability.h>
12#include <linux/highuid.h>
13#include <linux/pagemap.h>
14#include <linux/mm.h>
15#include <linux/mman.h>
16#include <linux/slab.h>
17#include <linux/swap.h>
18#include <linux/errno.h>
19#include <linux/time.h>
20#include <linux/timex.h>
21#include <linux/times.h>
22#include <linux/elf.h>
23#include <linux/msg.h>
24#include <linux/shm.h>
25#include <linux/smp.h>
26#include <linux/smp_lock.h>
27#include <linux/utsname.h>
28#include <linux/file.h>
29#include <linux/vfs.h>
30#include <linux/namei.h>
31#include <linux/socket.h>
32#include <linux/security.h>
33#include <linux/syscalls.h>
34#include <linux/resource.h>
35
36#include <asm/ptrace.h>
37#include <asm/page.h>
38#include <asm/uaccess.h>
39#include <asm/inventory.h>
40
41/* 2,191 lines of complete and utter shit coming up... */
42
43extern int max_threads;
44
45/* The sysmp commands supported thus far. */
46#define MP_NPROCS 1 /* # processor in complex */
47#define MP_NAPROCS 2 /* # active processors in complex */
48#define MP_PGSIZE 14 /* Return system page size in v1. */
49
50asmlinkage int irix_sysmp(struct pt_regs *regs)
51{
52 unsigned long cmd;
53 int base = 0;
54 int error = 0;
55
56 if(regs->regs[2] == 1000)
57 base = 1;
58 cmd = regs->regs[base + 4];
59 switch(cmd) {
60 case MP_PGSIZE:
61 error = PAGE_SIZE;
62 break;
63 case MP_NPROCS:
64 case MP_NAPROCS:
65 error = num_online_cpus();
66 break;
67 default:
68 printk("SYSMP[%s:%d]: Unsupported opcode %d\n",
69 current->comm, current->pid, (int)cmd);
70 error = -EINVAL;
71 break;
72 }
73
74 return error;
75}
76
77/* The prctl commands. */
78#define PR_MAXPROCS 1 /* Tasks/user. */
79#define PR_ISBLOCKED 2 /* If blocked, return 1. */
80#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */
81#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */
82#define PR_MAXPPROCS 5 /* Num parallel tasks. */
83#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */
84#define PR_SETEXITSIG 8 /* When task exit's, set signal. */
85#define PR_RESIDENT 9 /* Make task unswappable. */
86#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */
87#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */
88#define PR_TERMCHILD 12 /* Kill child if the parent dies. */
89#define PR_GETSHMASK 13 /* Get the sproc() share mask. */
90#define PR_GETNSHARE 14 /* Number of share group members. */
91#define PR_COREPID 15 /* Add task pid to name when it core. */
92#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */
93#define PR_PTHREADEXIT 17 /* Kill a pthread, only for IRIX 6.[234] */
94
95asmlinkage int irix_prctl(unsigned option, ...)
96{
97 va_list args;
98 int error = 0;
99
100 va_start(args, option);
101 switch (option) {
102 case PR_MAXPROCS:
103 printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
104 current->comm, current->pid);
105 error = max_threads;
106 break;
107
108 case PR_ISBLOCKED: {
109 struct task_struct *task;
110
111 printk("irix_prctl[%s:%d]: Wants PR_ISBLOCKED\n",
112 current->comm, current->pid);
113 read_lock(&tasklist_lock);
114 task = find_task_by_vpid(va_arg(args, pid_t));
115 error = -ESRCH;
116 if (error)
117 error = (task->run_list.next != NULL);
118 read_unlock(&tasklist_lock);
119 /* Can _your_ OS find this out that fast? */
120 break;
121 }
122
123 case PR_SETSTACKSIZE: {
124 long value = va_arg(args, long);
125
126 printk("irix_prctl[%s:%d]: Wants PR_SETSTACKSIZE<%08lx>\n",
127 current->comm, current->pid, (unsigned long) value);
128 if (value > RLIM_INFINITY)
129 value = RLIM_INFINITY;
130 if (capable(CAP_SYS_ADMIN)) {
131 task_lock(current->group_leader);
132 current->signal->rlim[RLIMIT_STACK].rlim_max =
133 current->signal->rlim[RLIMIT_STACK].rlim_cur = value;
134 task_unlock(current->group_leader);
135 error = value;
136 break;
137 }
138 task_lock(current->group_leader);
139 if (value > current->signal->rlim[RLIMIT_STACK].rlim_max) {
140 error = -EINVAL;
141 task_unlock(current->group_leader);
142 break;
143 }
144 current->signal->rlim[RLIMIT_STACK].rlim_cur = value;
145 task_unlock(current->group_leader);
146 error = value;
147 break;
148 }
149
150 case PR_GETSTACKSIZE:
151 printk("irix_prctl[%s:%d]: Wants PR_GETSTACKSIZE\n",
152 current->comm, current->pid);
153 error = current->signal->rlim[RLIMIT_STACK].rlim_cur;
154 break;
155
156 case PR_MAXPPROCS:
157 printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
158 current->comm, current->pid);
159 error = 1;
160 break;
161
162 case PR_UNBLKONEXEC:
163 printk("irix_prctl[%s:%d]: Wants PR_UNBLKONEXEC\n",
164 current->comm, current->pid);
165 error = -EINVAL;
166 break;
167
168 case PR_SETEXITSIG:
169 printk("irix_prctl[%s:%d]: Wants PR_SETEXITSIG\n",
170 current->comm, current->pid);
171
172 /* We can probably play some game where we set the task
173 * exit_code to some non-zero value when this is requested,
174 * and check whether exit_code is already set in do_exit().
175 */
176 error = -EINVAL;
177 break;
178
179 case PR_RESIDENT:
180 printk("irix_prctl[%s:%d]: Wants PR_RESIDENT\n",
181 current->comm, current->pid);
182 error = 0; /* Compatibility indeed. */
183 break;
184
185 case PR_ATTACHADDR:
186 printk("irix_prctl[%s:%d]: Wants PR_ATTACHADDR\n",
187 current->comm, current->pid);
188 error = -EINVAL;
189 break;
190
191 case PR_DETACHADDR:
192 printk("irix_prctl[%s:%d]: Wants PR_DETACHADDR\n",
193 current->comm, current->pid);
194 error = -EINVAL;
195 break;
196
197 case PR_TERMCHILD:
198 printk("irix_prctl[%s:%d]: Wants PR_TERMCHILD\n",
199 current->comm, current->pid);
200 error = -EINVAL;
201 break;
202
203 case PR_GETSHMASK:
204 printk("irix_prctl[%s:%d]: Wants PR_GETSHMASK\n",
205 current->comm, current->pid);
206 error = -EINVAL; /* Until I have the sproc() stuff in. */
207 break;
208
209 case PR_GETNSHARE:
210 error = 0; /* Until I have the sproc() stuff in. */
211 break;
212
213 case PR_COREPID:
214 printk("irix_prctl[%s:%d]: Wants PR_COREPID\n",
215 current->comm, current->pid);
216 error = -EINVAL;
217 break;
218
219 case PR_ATTACHADDRPERM:
220 printk("irix_prctl[%s:%d]: Wants PR_ATTACHADDRPERM\n",
221 current->comm, current->pid);
222 error = -EINVAL;
223 break;
224
225 default:
226 printk("irix_prctl[%s:%d]: Non-existant opcode %d\n",
227 current->comm, current->pid, option);
228 error = -EINVAL;
229 break;
230 }
231 va_end(args);
232
233 return error;
234}
235
236#undef DEBUG_PROCGRPS
237
238extern unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt);
239extern char *prom_getenv(char *name);
240extern long prom_setenv(char *name, char *value);
241
242/* The syssgi commands supported thus far. */
243#define SGI_SYSID 1 /* Return unique per-machine identifier. */
244#define SGI_INVENT 5 /* Fetch inventory */
245# define SGI_INV_SIZEOF 1
246# define SGI_INV_READ 2
247#define SGI_RDNAME 6 /* Return string name of a process. */
248#define SGI_SETNVRAM 8 /* Set PROM variable. */
249#define SGI_GETNVRAM 9 /* Get PROM variable. */
250#define SGI_SETPGID 21 /* Set process group id. */
251#define SGI_SYSCONF 22 /* POSIX sysconf garbage. */
252#define SGI_PATHCONF 24 /* POSIX sysconf garbage. */
253#define SGI_SETGROUPS 40 /* POSIX sysconf garbage. */
254#define SGI_GETGROUPS 41 /* POSIX sysconf garbage. */
255#define SGI_RUSAGE 56 /* BSD style rusage(). */
256#define SGI_SSYNC 62 /* Synchronous fs sync. */
257#define SGI_GETSID 65 /* SysVr4 get session id. */
258#define SGI_ELFMAP 68 /* Map an elf image. */
259#define SGI_TOSSTSAVE 108 /* Toss saved vma's. */
260#define SGI_FP_BCOPY 129 /* Should FPU bcopy be used on this machine? */
261#define SGI_PHYSP 1011 /* Translate virtual into physical page. */
262
263asmlinkage int irix_syssgi(struct pt_regs *regs)
264{
265 unsigned long cmd;
266 int retval, base = 0;
267
268 if (regs->regs[2] == 1000)
269 base = 1;
270
271 cmd = regs->regs[base + 4];
272 switch(cmd) {
273 case SGI_SYSID: {
274 char __user *buf = (char __user *) regs->regs[base + 5];
275
276 /* XXX Use ethernet addr.... */
277 retval = clear_user(buf, 64) ? -EFAULT : 0;
278 break;
279 }
280#if 0
281 case SGI_RDNAME: {
282 int pid = (int) regs->regs[base + 5];
283 char __user *buf = (char __user *) regs->regs[base + 6];
284 struct task_struct *p;
285 char tcomm[sizeof(current->comm)];
286
287 read_lock(&tasklist_lock);
288 p = find_task_by_pid(pid);
289 if (!p) {
290 read_unlock(&tasklist_lock);
291 retval = -ESRCH;
292 break;
293 }
294 get_task_comm(tcomm, p);
295 read_unlock(&tasklist_lock);
296
297 /* XXX Need to check sizes. */
298 retval = copy_to_user(buf, tcomm, sizeof(tcomm)) ? -EFAULT : 0;
299 break;
300 }
301
302 case SGI_GETNVRAM: {
303 char __user *name = (char __user *) regs->regs[base+5];
304 char __user *buf = (char __user *) regs->regs[base+6];
305 char *value;
306 return -EINVAL; /* til I fix it */
307 value = prom_getenv(name); /* PROM lock? */
308 if (!value) {
309 retval = -EINVAL;
310 break;
311 }
312 /* Do I strlen() for the length? */
313 retval = copy_to_user(buf, value, 128) ? -EFAULT : 0;
314 break;
315 }
316
317 case SGI_SETNVRAM: {
318 char __user *name = (char __user *) regs->regs[base+5];
319 char __user *value = (char __user *) regs->regs[base+6];
320 return -EINVAL; /* til I fix it */
321 retval = prom_setenv(name, value);
322 /* XXX make sure retval conforms to syssgi(2) */
323 printk("[%s:%d] setnvram(\"%s\", \"%s\"): retval %d",
324 current->comm, current->pid, name, value, retval);
325/* if (retval == PROM_ENOENT)
326 retval = -ENOENT; */
327 break;
328 }
329#endif
330
331 case SGI_SETPGID: {
332#ifdef DEBUG_PROCGRPS
333 printk("[%s:%d] setpgid(%d, %d) ",
334 current->comm, current->pid,
335 (int) regs->regs[base + 5], (int)regs->regs[base + 6]);
336#endif
337 retval = sys_setpgid(regs->regs[base + 5], regs->regs[base + 6]);
338
339#ifdef DEBUG_PROCGRPS
340 printk("retval=%d\n", retval);
341#endif
342 }
343
344 case SGI_SYSCONF: {
345 switch(regs->regs[base + 5]) {
346 case 1:
347 retval = (MAX_ARG_PAGES >> 4); /* XXX estimate... */
348 goto out;
349 case 2:
350 retval = max_threads;
351 goto out;
352 case 3:
353 retval = HZ;
354 goto out;
355 case 4:
356 retval = NGROUPS_MAX;
357 goto out;
358 case 5:
359 retval = sysctl_nr_open;
360 goto out;
361 case 6:
362 retval = 1;
363 goto out;
364 case 7:
365 retval = 1;
366 goto out;
367 case 8:
368 retval = 199009;
369 goto out;
370 case 11:
371 retval = PAGE_SIZE;
372 goto out;
373 case 12:
374 retval = 4;
375 goto out;
376 case 25:
377 case 26:
378 case 27:
379 case 28:
380 case 29:
381 case 30:
382 retval = 0;
383 goto out;
384 case 31:
385 retval = 32;
386 goto out;
387 default:
388 retval = -EINVAL;
389 goto out;
390 };
391 }
392
393 case SGI_SETGROUPS:
394 retval = sys_setgroups((int) regs->regs[base + 5],
395 (gid_t __user *) regs->regs[base + 6]);
396 break;
397
398 case SGI_GETGROUPS:
399 retval = sys_getgroups((int) regs->regs[base + 5],
400 (gid_t __user *) regs->regs[base + 6]);
401 break;
402
403 case SGI_RUSAGE: {
404 struct rusage __user *ru = (struct rusage __user *) regs->regs[base + 6];
405
406 switch((int) regs->regs[base + 5]) {
407 case 0:
408 /* rusage self */
409 retval = getrusage(current, RUSAGE_SELF, ru);
410 goto out;
411
412 case -1:
413 /* rusage children */
414 retval = getrusage(current, RUSAGE_CHILDREN, ru);
415 goto out;
416
417 default:
418 retval = -EINVAL;
419 goto out;
420 };
421 }
422
423 case SGI_SSYNC:
424 sys_sync();
425 retval = 0;
426 break;
427
428 case SGI_GETSID:
429#ifdef DEBUG_PROCGRPS
430 printk("[%s:%d] getsid(%d) ", current->comm, current->pid,
431 (int) regs->regs[base + 5]);
432#endif
433 retval = sys_getsid(regs->regs[base + 5]);
434#ifdef DEBUG_PROCGRPS
435 printk("retval=%d\n", retval);
436#endif
437 break;
438
439 case SGI_ELFMAP:
440 retval = irix_mapelf((int) regs->regs[base + 5],
441 (struct elf_phdr __user *) regs->regs[base + 6],
442 (int) regs->regs[base + 7]);
443 break;
444
445 case SGI_TOSSTSAVE:
446 /* XXX We don't need to do anything? */
447 retval = 0;
448 break;
449
450 case SGI_FP_BCOPY:
451 retval = 0;
452 break;
453
454 case SGI_PHYSP: {
455 unsigned long addr = regs->regs[base + 5];
456 int __user *pageno = (int __user *) (regs->regs[base + 6]);
457 struct mm_struct *mm = current->mm;
458 pgd_t *pgdp;
459 pud_t *pudp;
460 pmd_t *pmdp;
461 pte_t *ptep;
462
463 down_read(&mm->mmap_sem);
464 pgdp = pgd_offset(mm, addr);
465 pudp = pud_offset(pgdp, addr);
466 pmdp = pmd_offset(pudp, addr);
467 ptep = pte_offset(pmdp, addr);
468 retval = -EINVAL;
469 if (ptep) {
470 pte_t pte = *ptep;
471
472 if (pte_val(pte) & (_PAGE_VALID | _PAGE_PRESENT)) {
473 /* b0rked on 64-bit */
474 retval = put_user((pte_val(pte) & PAGE_MASK) >>
475 PAGE_SHIFT, pageno);
476 }
477 }
478 up_read(&mm->mmap_sem);
479 break;
480 }
481
482 case SGI_INVENT: {
483 int arg1 = (int) regs->regs [base + 5];
484 void __user *buffer = (void __user *) regs->regs [base + 6];
485 int count = (int) regs->regs [base + 7];
486
487 switch (arg1) {
488 case SGI_INV_SIZEOF:
489 retval = sizeof(inventory_t);
490 break;
491 case SGI_INV_READ:
492 retval = dump_inventory_to_user(buffer, count);
493 break;
494 default:
495 retval = -EINVAL;
496 }
497 break;
498 }
499
500 default:
501 printk("irix_syssgi: Unsupported command %d\n", (int)cmd);
502 retval = -EINVAL;
503 break;
504 };
505
506out:
507 return retval;
508}
509
510asmlinkage int irix_gtime(struct pt_regs *regs)
511{
512 return get_seconds();
513}
514
515/*
516 * IRIX is completely broken... it returns 0 on success, otherwise
517 * ENOMEM.
518 */
519asmlinkage int irix_brk(unsigned long brk)
520{
521 unsigned long rlim;
522 unsigned long newbrk, oldbrk;
523 struct mm_struct *mm = current->mm;
524 int ret;
525
526 down_write(&mm->mmap_sem);
527 if (brk < mm->end_code) {
528 ret = -ENOMEM;
529 goto out;
530 }
531
532 newbrk = PAGE_ALIGN(brk);
533 oldbrk = PAGE_ALIGN(mm->brk);
534 if (oldbrk == newbrk) {
535 mm->brk = brk;
536 ret = 0;
537 goto out;
538 }
539
540 /*
541 * Always allow shrinking brk
542 */
543 if (brk <= mm->brk) {
544 mm->brk = brk;
545 do_munmap(mm, newbrk, oldbrk-newbrk);
546 ret = 0;
547 goto out;
548 }
549 /*
550 * Check against rlimit and stack..
551 */
552 rlim = current->signal->rlim[RLIMIT_DATA].rlim_cur;
553 if (rlim >= RLIM_INFINITY)
554 rlim = ~0;
555 if (brk - mm->end_code > rlim) {
556 ret = -ENOMEM;
557 goto out;
558 }
559
560 /*
561 * Check against existing mmap mappings.
562 */
563 if (find_vma_intersection(mm, oldbrk, newbrk+PAGE_SIZE)) {
564 ret = -ENOMEM;
565 goto out;
566 }
567
568 /*
569 * Ok, looks good - let it rip.
570 */
571 if (do_brk(oldbrk, newbrk-oldbrk) != oldbrk) {
572 ret = -ENOMEM;
573 goto out;
574 }
575 mm->brk = brk;
576 ret = 0;
577
578out:
579 up_write(&mm->mmap_sem);
580 return ret;
581}
582
583asmlinkage int irix_getpid(struct pt_regs *regs)
584{
585 regs->regs[3] = task_pid_vnr(current->real_parent);
586 return task_pid_vnr(current);
587}
588
589asmlinkage int irix_getuid(struct pt_regs *regs)
590{
591 regs->regs[3] = current->euid;
592 return current->uid;
593}
594
595asmlinkage int irix_getgid(struct pt_regs *regs)
596{
597 regs->regs[3] = current->egid;
598 return current->gid;
599}
600
601asmlinkage int irix_stime(int value)
602{
603 int err;
604 struct timespec tv;
605
606 tv.tv_sec = value;
607 tv.tv_nsec = 0;
608 err = security_settime(&tv, NULL);
609 if (err)
610 return err;
611
612 write_seqlock_irq(&xtime_lock);
613 xtime.tv_sec = value;
614 xtime.tv_nsec = 0;
615 ntp_clear();
616 write_sequnlock_irq(&xtime_lock);
617
618 return 0;
619}
620
621static inline void jiffiestotv(unsigned long jiffies, struct timeval *value)
622{
623 value->tv_usec = (jiffies % HZ) * (1000000 / HZ);
624 value->tv_sec = jiffies / HZ;
625}
626
627static inline void getitimer_real(struct itimerval *value)
628{
629 register unsigned long val, interval;
630
631 interval = current->it_real_incr;
632 val = 0;
633 if (del_timer(&current->real_timer)) {
634 unsigned long now = jiffies;
635 val = current->real_timer.expires;
636 add_timer(&current->real_timer);
637 /* look out for negative/zero itimer.. */
638 if (val <= now)
639 val = now+1;
640 val -= now;
641 }
642 jiffiestotv(val, &value->it_value);
643 jiffiestotv(interval, &value->it_interval);
644}
645
646asmlinkage unsigned int irix_alarm(unsigned int seconds)
647{
648 return alarm_setitimer(seconds);
649}
650
651asmlinkage int irix_pause(void)
652{
653 current->state = TASK_INTERRUPTIBLE;
654 schedule();
655
656 return -EINTR;
657}
658
659/* XXX need more than this... */
660asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name,
661 unsigned long flags, char __user *type, void __user *data, int datalen)
662{
663 printk("[%s:%d] irix_mount(%p,%p,%08lx,%p,%p,%d)\n",
664 current->comm, current->pid,
665 dev_name, dir_name, flags, type, data, datalen);
666
667 return sys_mount(dev_name, dir_name, type, flags, data);
668}
669
670struct irix_statfs {
671 short f_type;
672 long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree;
673 char f_fname[6], f_fpack[6];
674};
675
676asmlinkage int irix_statfs(const char __user *path,
677 struct irix_statfs __user *buf, int len, int fs_type)
678{
679 struct nameidata nd;
680 struct kstatfs kbuf;
681 int error, i;
682
683 /* We don't support this feature yet. */
684 if (fs_type) {
685 error = -EINVAL;
686 goto out;
687 }
688 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statfs))) {
689 error = -EFAULT;
690 goto out;
691 }
692
693 error = user_path_walk(path, &nd);
694 if (error)
695 goto out;
696
697 error = vfs_statfs(nd.path.dentry, &kbuf);
698 if (error)
699 goto dput_and_out;
700
701 error = __put_user(kbuf.f_type, &buf->f_type);
702 error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
703 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
704 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
705 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
706 error |= __put_user(kbuf.f_files, &buf->f_files);
707 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
708 for (i = 0; i < 6; i++) {
709 error |= __put_user(0, &buf->f_fname[i]);
710 error |= __put_user(0, &buf->f_fpack[i]);
711 }
712
713dput_and_out:
714 path_put(&nd.path);
715out:
716 return error;
717}
718
719asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs __user *buf)
720{
721 struct kstatfs kbuf;
722 struct file *file;
723 int error, i;
724
725 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statfs))) {
726 error = -EFAULT;
727 goto out;
728 }
729
730 if (!(file = fget(fd))) {
731 error = -EBADF;
732 goto out;
733 }
734
735 error = vfs_statfs(file->f_path.dentry, &kbuf);
736 if (error)
737 goto out_f;
738
739 error = __put_user(kbuf.f_type, &buf->f_type);
740 error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
741 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
742 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
743 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
744 error |= __put_user(kbuf.f_files, &buf->f_files);
745 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
746
747 for (i = 0; i < 6; i++) {
748 error |= __put_user(0, &buf->f_fname[i]);
749 error |= __put_user(0, &buf->f_fpack[i]);
750 }
751
752out_f:
753 fput(file);
754out:
755 return error;
756}
757
758asmlinkage int irix_setpgrp(int flags)
759{
760 int error;
761
762#ifdef DEBUG_PROCGRPS
763 printk("[%s:%d] setpgrp(%d) ", current->comm, current->pid, flags);
764#endif
765 if(!flags)
766 error = task_pgrp_vnr(current);
767 else
768 error = sys_setsid();
769#ifdef DEBUG_PROCGRPS
770 printk("returning %d\n", error);
771#endif
772
773 return error;
774}
775
776asmlinkage int irix_times(struct tms __user *tbuf)
777{
778 int err = 0;
779
780 if (tbuf) {
781 if (!access_ok(VERIFY_WRITE, tbuf, sizeof *tbuf))
782 return -EFAULT;
783
784 err = __put_user(current->utime, &tbuf->tms_utime);
785 err |= __put_user(current->stime, &tbuf->tms_stime);
786 err |= __put_user(current->signal->cutime, &tbuf->tms_cutime);
787 err |= __put_user(current->signal->cstime, &tbuf->tms_cstime);
788 }
789
790 return err;
791}
792
793asmlinkage int irix_exec(struct pt_regs *regs)
794{
795 int error, base = 0;
796 char *filename;
797
798 if(regs->regs[2] == 1000)
799 base = 1;
800 filename = getname((char __user *) (long)regs->regs[base + 4]);
801 error = PTR_ERR(filename);
802 if (IS_ERR(filename))
803 return error;
804
805 error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
806 NULL, regs);
807 putname(filename);
808
809 return error;
810}
811
812asmlinkage int irix_exece(struct pt_regs *regs)
813{
814 int error, base = 0;
815 char *filename;
816
817 if (regs->regs[2] == 1000)
818 base = 1;
819 filename = getname((char __user *) (long)regs->regs[base + 4]);
820 error = PTR_ERR(filename);
821 if (IS_ERR(filename))
822 return error;
823 error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
824 (char __user * __user *) (long)regs->regs[base + 6], regs);
825 putname(filename);
826
827 return error;
828}
829
830asmlinkage unsigned long irix_gethostid(void)
831{
832 printk("[%s:%d]: irix_gethostid() called...\n",
833 current->comm, current->pid);
834
835 return -EINVAL;
836}
837
838asmlinkage unsigned long irix_sethostid(unsigned long val)
839{
840 printk("[%s:%d]: irix_sethostid(%08lx) called...\n",
841 current->comm, current->pid, val);
842
843 return -EINVAL;
844}
845
846asmlinkage int irix_socket(int family, int type, int protocol)
847{
848 switch(type) {
849 case 1:
850 type = SOCK_DGRAM;
851 break;
852
853 case 2:
854 type = SOCK_STREAM;
855 break;
856
857 case 3:
858 type = 9; /* Invalid... */
859 break;
860
861 case 4:
862 type = SOCK_RAW;
863 break;
864
865 case 5:
866 type = SOCK_RDM;
867 break;
868
869 case 6:
870 type = SOCK_SEQPACKET;
871 break;
872
873 default:
874 break;
875 }
876
877 return sys_socket(family, type, protocol);
878}
879
880asmlinkage int irix_getdomainname(char __user *name, int len)
881{
882 int err;
883
884 down_read(&uts_sem);
885 if (len > __NEW_UTS_LEN)
886 len = __NEW_UTS_LEN;
887 err = copy_to_user(name, utsname()->domainname, len) ? -EFAULT : 0;
888 up_read(&uts_sem);
889
890 return err;
891}
892
893asmlinkage unsigned long irix_getpagesize(void)
894{
895 return PAGE_SIZE;
896}
897
898asmlinkage int irix_msgsys(int opcode, unsigned long arg0, unsigned long arg1,
899 unsigned long arg2, unsigned long arg3,
900 unsigned long arg4)
901{
902 switch (opcode) {
903 case 0:
904 return sys_msgget((key_t) arg0, (int) arg1);
905 case 1:
906 return sys_msgctl((int) arg0, (int) arg1,
907 (struct msqid_ds __user *)arg2);
908 case 2:
909 return sys_msgrcv((int) arg0, (struct msgbuf __user *) arg1,
910 (size_t) arg2, (long) arg3, (int) arg4);
911 case 3:
912 return sys_msgsnd((int) arg0, (struct msgbuf __user *) arg1,
913 (size_t) arg2, (int) arg3);
914 default:
915 return -EINVAL;
916 }
917}
918
919asmlinkage int irix_shmsys(int opcode, unsigned long arg0, unsigned long arg1,
920 unsigned long arg2, unsigned long arg3)
921{
922 switch (opcode) {
923 case 0:
924 return do_shmat((int) arg0, (char __user *) arg1, (int) arg2,
925 (unsigned long *) arg3);
926 case 1:
927 return sys_shmctl((int)arg0, (int)arg1,
928 (struct shmid_ds __user *)arg2);
929 case 2:
930 return sys_shmdt((char __user *)arg0);
931 case 3:
932 return sys_shmget((key_t) arg0, (int) arg1, (int) arg2);
933 default:
934 return -EINVAL;
935 }
936}
937
938asmlinkage int irix_semsys(int opcode, unsigned long arg0, unsigned long arg1,
939 unsigned long arg2, int arg3)
940{
941 switch (opcode) {
942 case 0:
943 return sys_semctl((int) arg0, (int) arg1, (int) arg2,
944 (union semun) arg3);
945 case 1:
946 return sys_semget((key_t) arg0, (int) arg1, (int) arg2);
947 case 2:
948 return sys_semop((int) arg0, (struct sembuf __user *)arg1,
949 (unsigned int) arg2);
950 default:
951 return -EINVAL;
952 }
953}
954
955static inline loff_t llseek(struct file *file, loff_t offset, int origin)
956{
957 loff_t (*fn)(struct file *, loff_t, int);
958 loff_t retval;
959
960 fn = default_llseek;
961 if (file->f_op && file->f_op->llseek)
962 fn = file->f_op->llseek;
963 lock_kernel();
964 retval = fn(file, offset, origin);
965 unlock_kernel();
966
967 return retval;
968}
969
970asmlinkage int irix_lseek64(int fd, int _unused, int offhi, int offlow,
971 int origin)
972{
973 struct file * file;
974 loff_t offset;
975 int retval;
976
977 retval = -EBADF;
978 file = fget(fd);
979 if (!file)
980 goto bad;
981 retval = -EINVAL;
982 if (origin > 2)
983 goto out_putf;
984
985 offset = llseek(file, ((loff_t) offhi << 32) | offlow, origin);
986 retval = (int) offset;
987
988out_putf:
989 fput(file);
990bad:
991 return retval;
992}
993
994asmlinkage int irix_sginap(int ticks)
995{
996 schedule_timeout_interruptible(ticks);
997 return 0;
998}
999
1000asmlinkage int irix_sgikopt(char __user *istring, char __user *ostring, int len)
1001{
1002 return -EINVAL;
1003}
1004
1005asmlinkage int irix_gettimeofday(struct timeval __user *tv)
1006{
1007 time_t sec;
1008 long nsec, seq;
1009 int err;
1010
1011 if (!access_ok(VERIFY_WRITE, tv, sizeof(struct timeval)))
1012 return -EFAULT;
1013
1014 do {
1015 seq = read_seqbegin(&xtime_lock);
1016 sec = xtime.tv_sec;
1017 nsec = xtime.tv_nsec;
1018 } while (read_seqretry(&xtime_lock, seq));
1019
1020 err = __put_user(sec, &tv->tv_sec);
1021 err |= __put_user((nsec / 1000), &tv->tv_usec);
1022
1023 return err;
1024}
1025
1026#define IRIX_MAP_AUTOGROW 0x40
1027
1028asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
1029 int flags, int fd, off_t offset)
1030{
1031 struct file *file = NULL;
1032 unsigned long retval;
1033
1034 if (!(flags & MAP_ANONYMOUS)) {
1035 if (!(file = fget(fd)))
1036 return -EBADF;
1037
1038 /* Ok, bad taste hack follows, try to think in something else
1039 * when reading this. */
1040 if (flags & IRIX_MAP_AUTOGROW) {
1041 unsigned long old_pos;
1042 long max_size = offset + len;
1043
1044 if (max_size > file->f_path.dentry->d_inode->i_size) {
1045 old_pos = sys_lseek(fd, max_size - 1, 0);
1046 sys_write(fd, (void __user *) "", 1);
1047 sys_lseek(fd, old_pos, 0);
1048 }
1049 }
1050 }
1051
1052 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
1053
1054 down_write(&current->mm->mmap_sem);
1055 retval = do_mmap(file, addr, len, prot, flags, offset);
1056 up_write(&current->mm->mmap_sem);
1057 if (file)
1058 fput(file);
1059
1060 return retval;
1061}
1062
1063asmlinkage int irix_madvise(unsigned long addr, int len, int behavior)
1064{
1065 printk("[%s:%d] Wheee.. irix_madvise(%08lx,%d,%d)\n",
1066 current->comm, current->pid, addr, len, behavior);
1067
1068 return -EINVAL;
1069}
1070
1071asmlinkage int irix_pagelock(char __user *addr, int len, int op)
1072{
1073 printk("[%s:%d] Wheee.. irix_pagelock(%p,%d,%d)\n",
1074 current->comm, current->pid, addr, len, op);
1075
1076 return -EINVAL;
1077}
1078
1079asmlinkage int irix_quotactl(struct pt_regs *regs)
1080{
1081 printk("[%s:%d] Wheee.. irix_quotactl()\n",
1082 current->comm, current->pid);
1083
1084 return -EINVAL;
1085}
1086
1087asmlinkage int irix_BSDsetpgrp(int pid, int pgrp)
1088{
1089 int error;
1090
1091#ifdef DEBUG_PROCGRPS
1092 printk("[%s:%d] BSDsetpgrp(%d, %d) ", current->comm, current->pid,
1093 pid, pgrp);
1094#endif
1095 if(!pid)
1096 pid = task_pid_vnr(current);
1097
1098 /* Wheee, weird sysv thing... */
1099 if ((pgrp == 0) && (pid == task_pid_vnr(current)))
1100 error = sys_setsid();
1101 else
1102 error = sys_setpgid(pid, pgrp);
1103
1104#ifdef DEBUG_PROCGRPS
1105 printk("error = %d\n", error);
1106#endif
1107
1108 return error;
1109}
1110
1111asmlinkage int irix_systeminfo(int cmd, char __user *buf, int cnt)
1112{
1113 printk("[%s:%d] Wheee.. irix_systeminfo(%d,%p,%d)\n",
1114 current->comm, current->pid, cmd, buf, cnt);
1115
1116 return -EINVAL;
1117}
1118
1119struct iuname {
1120 char sysname[257], nodename[257], release[257];
1121 char version[257], machine[257];
1122 char m_type[257], base_rel[257];
1123 char _unused0[257], _unused1[257], _unused2[257];
1124 char _unused3[257], _unused4[257], _unused5[257];
1125};
1126
1127asmlinkage int irix_uname(struct iuname __user *buf)
1128{
1129 down_read(&uts_sem);
1130 if (copy_from_user(utsname()->sysname, buf->sysname, 65)
1131 || copy_from_user(utsname()->nodename, buf->nodename, 65)
1132 || copy_from_user(utsname()->release, buf->release, 65)
1133 || copy_from_user(utsname()->version, buf->version, 65)
1134 || copy_from_user(utsname()->machine, buf->machine, 65)) {
1135 return -EFAULT;
1136 }
1137 up_read(&uts_sem);
1138
1139 return 1;
1140}
1141
1142#undef DEBUG_XSTAT
1143
1144static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
1145{
1146 struct xstat32 {
1147 u32 st_dev, st_pad1[3], st_ino, st_mode, st_nlink, st_uid, st_gid;
1148 u32 st_rdev, st_pad2[2], st_size, st_pad3;
1149 u32 st_atime0, st_atime1;
1150 u32 st_mtime0, st_mtime1;
1151 u32 st_ctime0, st_ctime1;
1152 u32 st_blksize, st_blocks;
1153 char st_fstype[16];
1154 u32 st_pad4[8];
1155 } ub;
1156
1157 if (!sysv_valid_dev(stat->dev) || !sysv_valid_dev(stat->rdev))
1158 return -EOVERFLOW;
1159 ub.st_dev = sysv_encode_dev(stat->dev);
1160 ub.st_ino = stat->ino;
1161 ub.st_mode = stat->mode;
1162 ub.st_nlink = stat->nlink;
1163 SET_UID(ub.st_uid, stat->uid);
1164 SET_GID(ub.st_gid, stat->gid);
1165 ub.st_rdev = sysv_encode_dev(stat->rdev);
1166#if BITS_PER_LONG == 32
1167 if (stat->size > MAX_NON_LFS)
1168 return -EOVERFLOW;
1169#endif
1170 ub.st_size = stat->size;
1171 ub.st_atime0 = stat->atime.tv_sec;
1172 ub.st_atime1 = stat->atime.tv_nsec;
1173 ub.st_mtime0 = stat->mtime.tv_sec;
1174 ub.st_mtime1 = stat->atime.tv_nsec;
1175 ub.st_ctime0 = stat->ctime.tv_sec;
1176 ub.st_ctime1 = stat->atime.tv_nsec;
1177 ub.st_blksize = stat->blksize;
1178 ub.st_blocks = stat->blocks;
1179 strcpy(ub.st_fstype, "efs");
1180
1181 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
1182}
1183
1184static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
1185{
1186 struct xstat64 {
1187 u32 st_dev; s32 st_pad1[3];
1188 unsigned long long st_ino;
1189 u32 st_mode;
1190 u32 st_nlink; s32 st_uid; s32 st_gid; u32 st_rdev;
1191 s32 st_pad2[2];
1192 long long st_size;
1193 s32 st_pad3;
1194 struct { s32 tv_sec, tv_nsec; } st_atime, st_mtime, st_ctime;
1195 s32 st_blksize;
1196 long long st_blocks;
1197 char st_fstype[16];
1198 s32 st_pad4[8];
1199 } ks;
1200
1201 if (!sysv_valid_dev(stat->dev) || !sysv_valid_dev(stat->rdev))
1202 return -EOVERFLOW;
1203
1204 ks.st_dev = sysv_encode_dev(stat->dev);
1205 ks.st_pad1[0] = ks.st_pad1[1] = ks.st_pad1[2] = 0;
1206 ks.st_ino = (unsigned long long) stat->ino;
1207 ks.st_mode = (u32) stat->mode;
1208 ks.st_nlink = (u32) stat->nlink;
1209 ks.st_uid = (s32) stat->uid;
1210 ks.st_gid = (s32) stat->gid;
1211 ks.st_rdev = sysv_encode_dev(stat->rdev);
1212 ks.st_pad2[0] = ks.st_pad2[1] = 0;
1213 ks.st_size = (long long) stat->size;
1214 ks.st_pad3 = 0;
1215
1216 /* XXX hackety hack... */
1217 ks.st_atime.tv_sec = (s32) stat->atime.tv_sec;
1218 ks.st_atime.tv_nsec = stat->atime.tv_nsec;
1219 ks.st_mtime.tv_sec = (s32) stat->mtime.tv_sec;
1220 ks.st_mtime.tv_nsec = stat->mtime.tv_nsec;
1221 ks.st_ctime.tv_sec = (s32) stat->ctime.tv_sec;
1222 ks.st_ctime.tv_nsec = stat->ctime.tv_nsec;
1223
1224 ks.st_blksize = (s32) stat->blksize;
1225 ks.st_blocks = (long long) stat->blocks;
1226 memset(ks.st_fstype, 0, 16);
1227 ks.st_pad4[0] = ks.st_pad4[1] = ks.st_pad4[2] = ks.st_pad4[3] = 0;
1228 ks.st_pad4[4] = ks.st_pad4[5] = ks.st_pad4[6] = ks.st_pad4[7] = 0;
1229
1230 /* Now write it all back. */
1231 return copy_to_user(ubuf, &ks, sizeof(ks)) ? -EFAULT : 0;
1232}
1233
1234asmlinkage int irix_xstat(int version, char __user *filename, struct stat __user *statbuf)
1235{
1236 int retval;
1237 struct kstat stat;
1238
1239#ifdef DEBUG_XSTAT
1240 printk("[%s:%d] Wheee.. irix_xstat(%d,%s,%p) ",
1241 current->comm, current->pid, version, filename, statbuf);
1242#endif
1243
1244 retval = vfs_stat(filename, &stat);
1245 if (!retval) {
1246 switch(version) {
1247 case 2:
1248 retval = irix_xstat32_xlate(&stat, statbuf);
1249 break;
1250 case 3:
1251 retval = irix_xstat64_xlate(&stat, statbuf);
1252 break;
1253 default:
1254 retval = -EINVAL;
1255 }
1256 }
1257 return retval;
1258}
1259
1260asmlinkage int irix_lxstat(int version, char __user *filename, struct stat __user *statbuf)
1261{
1262 int error;
1263 struct kstat stat;
1264
1265#ifdef DEBUG_XSTAT
1266 printk("[%s:%d] Wheee.. irix_lxstat(%d,%s,%p) ",
1267 current->comm, current->pid, version, filename, statbuf);
1268#endif
1269
1270 error = vfs_lstat(filename, &stat);
1271
1272 if (!error) {
1273 switch (version) {
1274 case 2:
1275 error = irix_xstat32_xlate(&stat, statbuf);
1276 break;
1277 case 3:
1278 error = irix_xstat64_xlate(&stat, statbuf);
1279 break;
1280 default:
1281 error = -EINVAL;
1282 }
1283 }
1284 return error;
1285}
1286
1287asmlinkage int irix_fxstat(int version, int fd, struct stat __user *statbuf)
1288{
1289 int error;
1290 struct kstat stat;
1291
1292#ifdef DEBUG_XSTAT
1293 printk("[%s:%d] Wheee.. irix_fxstat(%d,%d,%p) ",
1294 current->comm, current->pid, version, fd, statbuf);
1295#endif
1296
1297 error = vfs_fstat(fd, &stat);
1298 if (!error) {
1299 switch (version) {
1300 case 2:
1301 error = irix_xstat32_xlate(&stat, statbuf);
1302 break;
1303 case 3:
1304 error = irix_xstat64_xlate(&stat, statbuf);
1305 break;
1306 default:
1307 error = -EINVAL;
1308 }
1309 }
1310 return error;
1311}
1312
1313asmlinkage int irix_xmknod(int ver, char __user *filename, int mode, unsigned dev)
1314{
1315 int retval;
1316 printk("[%s:%d] Wheee.. irix_xmknod(%d,%s,%x,%x)\n",
1317 current->comm, current->pid, ver, filename, mode, dev);
1318
1319 switch(ver) {
1320 case 2:
1321 /* shouldn't we convert here as well as on stat()? */
1322 retval = sys_mknod(filename, mode, dev);
1323 break;
1324
1325 default:
1326 retval = -EINVAL;
1327 break;
1328 };
1329
1330 return retval;
1331}
1332
1333asmlinkage int irix_swapctl(int cmd, char __user *arg)
1334{
1335 printk("[%s:%d] Wheee.. irix_swapctl(%d,%p)\n",
1336 current->comm, current->pid, cmd, arg);
1337
1338 return -EINVAL;
1339}
1340
1341struct irix_statvfs {
1342 u32 f_bsize; u32 f_frsize; u32 f_blocks;
1343 u32 f_bfree; u32 f_bavail; u32 f_files; u32 f_ffree; u32 f_favail;
1344 u32 f_fsid; char f_basetype[16];
1345 u32 f_flag; u32 f_namemax;
1346 char f_fstr[32]; u32 f_filler[16];
1347};
1348
1349asmlinkage int irix_statvfs(char __user *fname, struct irix_statvfs __user *buf)
1350{
1351 struct nameidata nd;
1352 struct kstatfs kbuf;
1353 int error, i;
1354
1355 printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
1356 current->comm, current->pid, fname, buf);
1357 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
1358 return -EFAULT;
1359
1360 error = user_path_walk(fname, &nd);
1361 if (error)
1362 goto out;
1363 error = vfs_statfs(nd.path.dentry, &kbuf);
1364 if (error)
1365 goto dput_and_out;
1366
1367 error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
1368 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1369 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1370 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1371 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1372 error |= __put_user(kbuf.f_files, &buf->f_files);
1373 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1374 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1375#ifdef __MIPSEB__
1376 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1377#else
1378 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1379#endif
1380 for (i = 0; i < 16; i++)
1381 error |= __put_user(0, &buf->f_basetype[i]);
1382 error |= __put_user(0, &buf->f_flag);
1383 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1384 for (i = 0; i < 32; i++)
1385 error |= __put_user(0, &buf->f_fstr[i]);
1386
1387dput_and_out:
1388 path_put(&nd.path);
1389out:
1390 return error;
1391}
1392
1393asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs __user *buf)
1394{
1395 struct kstatfs kbuf;
1396 struct file *file;
1397 int error, i;
1398
1399 printk("[%s:%d] Wheee.. irix_fstatvfs(%d,%p)\n",
1400 current->comm, current->pid, fd, buf);
1401
1402 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
1403 return -EFAULT;
1404
1405 if (!(file = fget(fd))) {
1406 error = -EBADF;
1407 goto out;
1408 }
1409 error = vfs_statfs(file->f_path.dentry, &kbuf);
1410 if (error)
1411 goto out_f;
1412
1413 error = __put_user(kbuf.f_bsize, &buf->f_bsize);
1414 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1415 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1416 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1417 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1418 error |= __put_user(kbuf.f_files, &buf->f_files);
1419 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1420 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1421#ifdef __MIPSEB__
1422 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1423#else
1424 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1425#endif
1426 for(i = 0; i < 16; i++)
1427 error |= __put_user(0, &buf->f_basetype[i]);
1428 error |= __put_user(0, &buf->f_flag);
1429 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1430 error |= __clear_user(&buf->f_fstr, sizeof(buf->f_fstr)) ? -EFAULT : 0;
1431
1432out_f:
1433 fput(file);
1434out:
1435 return error;
1436}
1437
1438asmlinkage int irix_priocntl(struct pt_regs *regs)
1439{
1440 printk("[%s:%d] Wheee.. irix_priocntl()\n",
1441 current->comm, current->pid);
1442
1443 return -EINVAL;
1444}
1445
1446asmlinkage int irix_sigqueue(int pid, int sig, int code, int val)
1447{
1448 printk("[%s:%d] Wheee.. irix_sigqueue(%d,%d,%d,%d)\n",
1449 current->comm, current->pid, pid, sig, code, val);
1450
1451 return -EINVAL;
1452}
1453
1454asmlinkage int irix_truncate64(char __user *name, int pad, int size1, int size2)
1455{
1456 int retval;
1457
1458 if (size1) {
1459 retval = -EINVAL;
1460 goto out;
1461 }
1462 retval = sys_truncate(name, size2);
1463
1464out:
1465 return retval;
1466}
1467
1468asmlinkage int irix_ftruncate64(int fd, int pad, int size1, int size2)
1469{
1470 int retval;
1471
1472 if (size1) {
1473 retval = -EINVAL;
1474 goto out;
1475 }
1476 retval = sys_ftruncate(fd, size2);
1477
1478out:
1479 return retval;
1480}
1481
1482asmlinkage int irix_mmap64(struct pt_regs *regs)
1483{
1484 int len, prot, flags, fd, off1, off2, error, base = 0;
1485 unsigned long addr, pgoff, *sp;
1486 struct file *file = NULL;
1487 int err;
1488
1489 if (regs->regs[2] == 1000)
1490 base = 1;
1491 sp = (unsigned long *) (regs->regs[29] + 16);
1492 addr = regs->regs[base + 4];
1493 len = regs->regs[base + 5];
1494 prot = regs->regs[base + 6];
1495 if (!base) {
1496 flags = regs->regs[base + 7];
1497 if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long))))
1498 return -EFAULT;
1499 fd = sp[0];
1500 err = __get_user(off1, &sp[1]);
1501 err |= __get_user(off2, &sp[2]);
1502 } else {
1503 if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long))))
1504 return -EFAULT;
1505 err = __get_user(flags, &sp[0]);
1506 err |= __get_user(fd, &sp[1]);
1507 err |= __get_user(off1, &sp[2]);
1508 err |= __get_user(off2, &sp[3]);
1509 }
1510
1511 if (err)
1512 return err;
1513
1514 if (off1 & PAGE_MASK)
1515 return -EOVERFLOW;
1516
1517 pgoff = (off1 << (32 - PAGE_SHIFT)) | (off2 >> PAGE_SHIFT);
1518
1519 if (!(flags & MAP_ANONYMOUS)) {
1520 if (!(file = fget(fd)))
1521 return -EBADF;
1522
1523 /* Ok, bad taste hack follows, try to think in something else
1524 when reading this */
1525 if (flags & IRIX_MAP_AUTOGROW) {
1526 unsigned long old_pos;
1527 long max_size = off2 + len;
1528
1529 if (max_size > file->f_path.dentry->d_inode->i_size) {
1530 old_pos = sys_lseek(fd, max_size - 1, 0);
1531 sys_write(fd, (void __user *) "", 1);
1532 sys_lseek(fd, old_pos, 0);
1533 }
1534 }
1535 }
1536
1537 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
1538
1539 down_write(&current->mm->mmap_sem);
1540 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
1541 up_write(&current->mm->mmap_sem);
1542
1543 if (file)
1544 fput(file);
1545
1546 return error;
1547}
1548
1549asmlinkage int irix_dmi(struct pt_regs *regs)
1550{
1551 printk("[%s:%d] Wheee.. irix_dmi()\n",
1552 current->comm, current->pid);
1553
1554 return -EINVAL;
1555}
1556
1557asmlinkage int irix_pread(int fd, char __user *buf, int cnt, int off64,
1558 int off1, int off2)
1559{
1560 printk("[%s:%d] Wheee.. irix_pread(%d,%p,%d,%d,%d,%d)\n",
1561 current->comm, current->pid, fd, buf, cnt, off64, off1, off2);
1562
1563 return -EINVAL;
1564}
1565
1566asmlinkage int irix_pwrite(int fd, char __user *buf, int cnt, int off64,
1567 int off1, int off2)
1568{
1569 printk("[%s:%d] Wheee.. irix_pwrite(%d,%p,%d,%d,%d,%d)\n",
1570 current->comm, current->pid, fd, buf, cnt, off64, off1, off2);
1571
1572 return -EINVAL;
1573}
1574
1575asmlinkage int irix_sgifastpath(int cmd, unsigned long arg0, unsigned long arg1,
1576 unsigned long arg2, unsigned long arg3,
1577 unsigned long arg4, unsigned long arg5)
1578{
1579 printk("[%s:%d] Wheee.. irix_fastpath(%d,%08lx,%08lx,%08lx,%08lx,"
1580 "%08lx,%08lx)\n",
1581 current->comm, current->pid, cmd, arg0, arg1, arg2,
1582 arg3, arg4, arg5);
1583
1584 return -EINVAL;
1585}
1586
1587struct irix_statvfs64 {
1588 u32 f_bsize; u32 f_frsize;
1589 u64 f_blocks; u64 f_bfree; u64 f_bavail;
1590 u64 f_files; u64 f_ffree; u64 f_favail;
1591 u32 f_fsid;
1592 char f_basetype[16];
1593 u32 f_flag; u32 f_namemax;
1594 char f_fstr[32];
1595 u32 f_filler[16];
1596};
1597
1598asmlinkage int irix_statvfs64(char __user *fname, struct irix_statvfs64 __user *buf)
1599{
1600 struct nameidata nd;
1601 struct kstatfs kbuf;
1602 int error, i;
1603
1604 printk("[%s:%d] Wheee.. irix_statvfs64(%s,%p)\n",
1605 current->comm, current->pid, fname, buf);
1606 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs64))) {
1607 error = -EFAULT;
1608 goto out;
1609 }
1610
1611 error = user_path_walk(fname, &nd);
1612 if (error)
1613 goto out;
1614 error = vfs_statfs(nd.path.dentry, &kbuf);
1615 if (error)
1616 goto dput_and_out;
1617
1618 error = __put_user(kbuf.f_bsize, &buf->f_bsize);
1619 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1620 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1621 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1622 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1623 error |= __put_user(kbuf.f_files, &buf->f_files);
1624 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1625 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1626#ifdef __MIPSEB__
1627 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1628#else
1629 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1630#endif
1631 for(i = 0; i < 16; i++)
1632 error |= __put_user(0, &buf->f_basetype[i]);
1633 error |= __put_user(0, &buf->f_flag);
1634 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1635 for(i = 0; i < 32; i++)
1636 error |= __put_user(0, &buf->f_fstr[i]);
1637
1638dput_and_out:
1639 path_put(&nd.path);
1640out:
1641 return error;
1642}
1643
1644asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs __user *buf)
1645{
1646 struct kstatfs kbuf;
1647 struct file *file;
1648 int error, i;
1649
1650 printk("[%s:%d] Wheee.. irix_fstatvfs64(%d,%p)\n",
1651 current->comm, current->pid, fd, buf);
1652
1653 if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) {
1654 error = -EFAULT;
1655 goto out;
1656 }
1657 if (!(file = fget(fd))) {
1658 error = -EBADF;
1659 goto out;
1660 }
1661 error = vfs_statfs(file->f_path.dentry, &kbuf);
1662 if (error)
1663 goto out_f;
1664
1665 error = __put_user(kbuf.f_bsize, &buf->f_bsize);
1666 error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
1667 error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
1668 error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
1669 error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
1670 error |= __put_user(kbuf.f_files, &buf->f_files);
1671 error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
1672 error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
1673#ifdef __MIPSEB__
1674 error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
1675#else
1676 error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
1677#endif
1678 for(i = 0; i < 16; i++)
1679 error |= __put_user(0, &buf->f_basetype[i]);
1680 error |= __put_user(0, &buf->f_flag);
1681 error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
1682 error |= __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i])) ? -EFAULT : 0;
1683
1684out_f:
1685 fput(file);
1686out:
1687 return error;
1688}
1689
1690asmlinkage int irix_getmountid(char __user *fname, unsigned long __user *midbuf)
1691{
1692 int err;
1693
1694 printk("[%s:%d] irix_getmountid(%s, %p)\n",
1695 current->comm, current->pid, fname, midbuf);
1696 if (!access_ok(VERIFY_WRITE, midbuf, (sizeof(unsigned long) * 4)))
1697 return -EFAULT;
1698
1699 /*
1700 * The idea with this system call is that when trying to determine
1701 * 'pwd' and it's a toss-up for some reason, userland can use the
1702 * fsid of the filesystem to try and make the right decision, but
1703 * we don't have this so for now. XXX
1704 */
1705 err = __put_user(0, &midbuf[0]);
1706 err |= __put_user(0, &midbuf[1]);
1707 err |= __put_user(0, &midbuf[2]);
1708 err |= __put_user(0, &midbuf[3]);
1709
1710 return err;
1711}
1712
1713asmlinkage int irix_nsproc(unsigned long entry, unsigned long mask,
1714 unsigned long arg, unsigned long sp, int slen)
1715{
1716 printk("[%s:%d] Wheee.. irix_nsproc(%08lx,%08lx,%08lx,%08lx,%d)\n",
1717 current->comm, current->pid, entry, mask, arg, sp, slen);
1718
1719 return -EINVAL;
1720}
1721
1722#undef DEBUG_GETDENTS
1723
1724struct irix_dirent32 {
1725 u32 d_ino;
1726 u32 d_off;
1727 unsigned short d_reclen;
1728 char d_name[1];
1729};
1730
1731struct irix_dirent32_callback {
1732 struct irix_dirent32 __user *current_dir;
1733 struct irix_dirent32 __user *previous;
1734 int count;
1735 int error;
1736};
1737
1738#define NAME_OFFSET32(de) ((int) ((de)->d_name - (char *) (de)))
1739#define ROUND_UP32(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1))
1740
1741static int irix_filldir32(void *__buf, const char *name,
1742 int namlen, loff_t offset, u64 ino, unsigned int d_type)
1743{
1744 struct irix_dirent32 __user *dirent;
1745 struct irix_dirent32_callback *buf = __buf;
1746 unsigned short reclen = ROUND_UP32(NAME_OFFSET32(dirent) + namlen + 1);
1747 int err = 0;
1748 u32 d_ino;
1749
1750#ifdef DEBUG_GETDENTS
1751 printk("\nirix_filldir32[reclen<%d>namlen<%d>count<%d>]",
1752 reclen, namlen, buf->count);
1753#endif
1754 buf->error = -EINVAL; /* only used if we fail.. */
1755 if (reclen > buf->count)
1756 return -EINVAL;
1757 d_ino = ino;
1758 if (sizeof(d_ino) < sizeof(ino) && d_ino != ino)
1759 return -EOVERFLOW;
1760 dirent = buf->previous;
1761 if (dirent)
1762 err = __put_user(offset, &dirent->d_off);
1763 dirent = buf->current_dir;
1764 err |= __put_user(dirent, &buf->previous);
1765 err |= __put_user(d_ino, &dirent->d_ino);
1766 err |= __put_user(reclen, &dirent->d_reclen);
1767 err |= copy_to_user((char __user *)dirent->d_name, name, namlen) ? -EFAULT : 0;
1768 err |= __put_user(0, &dirent->d_name[namlen]);
1769 dirent = (struct irix_dirent32 __user *) ((char __user *) dirent + reclen);
1770
1771 buf->current_dir = dirent;
1772 buf->count -= reclen;
1773
1774 return err;
1775}
1776
1777asmlinkage int irix_ngetdents(unsigned int fd, void __user * dirent,
1778 unsigned int count, int __user *eob)
1779{
1780 struct file *file;
1781 struct irix_dirent32 __user *lastdirent;
1782 struct irix_dirent32_callback buf;
1783 int error;
1784
1785#ifdef DEBUG_GETDENTS
1786 printk("[%s:%d] ngetdents(%d, %p, %d, %p) ", current->comm,
1787 current->pid, fd, dirent, count, eob);
1788#endif
1789 error = -EBADF;
1790 file = fget(fd);
1791 if (!file)
1792 goto out;
1793
1794 buf.current_dir = (struct irix_dirent32 __user *) dirent;
1795 buf.previous = NULL;
1796 buf.count = count;
1797 buf.error = 0;
1798
1799 error = vfs_readdir(file, irix_filldir32, &buf);
1800 if (error < 0)
1801 goto out_putf;
1802
1803 error = buf.error;
1804 lastdirent = buf.previous;
1805 if (lastdirent) {
1806 put_user(file->f_pos, &lastdirent->d_off);
1807 error = count - buf.count;
1808 }
1809
1810 if (put_user(0, eob) < 0) {
1811 error = -EFAULT;
1812 goto out_putf;
1813 }
1814
1815#ifdef DEBUG_GETDENTS
1816 printk("eob=%d returning %d\n", *eob, count - buf.count);
1817#endif
1818 error = count - buf.count;
1819
1820out_putf:
1821 fput(file);
1822out:
1823 return error;
1824}
1825
1826struct irix_dirent64 {
1827 u64 d_ino;
1828 u64 d_off;
1829 unsigned short d_reclen;
1830 char d_name[1];
1831};
1832
1833struct irix_dirent64_callback {
1834 struct irix_dirent64 __user *curr;
1835 struct irix_dirent64 __user *previous;
1836 int count;
1837 int error;
1838};
1839
1840#define NAME_OFFSET64(de) ((int) ((de)->d_name - (char *) (de)))
1841#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
1842
1843static int irix_filldir64(void *__buf, const char *name,
1844 int namlen, loff_t offset, u64 ino, unsigned int d_type)
1845{
1846 struct irix_dirent64 __user *dirent;
1847 struct irix_dirent64_callback * buf = __buf;
1848 unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1);
1849 int err = 0;
1850
1851 if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf)))
1852 return -EFAULT;
1853
1854 if (__put_user(-EINVAL, &buf->error)) /* only used if we fail.. */
1855 return -EFAULT;
1856 if (reclen > buf->count)
1857 return -EINVAL;
1858 dirent = buf->previous;
1859 if (dirent)
1860 err = __put_user(offset, &dirent->d_off);
1861 dirent = buf->curr;
1862 buf->previous = dirent;
1863 err |= __put_user(ino, &dirent->d_ino);
1864 err |= __put_user(reclen, &dirent->d_reclen);
1865 err |= __copy_to_user((char __user *)dirent->d_name, name, namlen)
1866 ? -EFAULT : 0;
1867 err |= __put_user(0, &dirent->d_name[namlen]);
1868
1869 dirent = (struct irix_dirent64 __user *) ((char __user *) dirent + reclen);
1870
1871 buf->curr = dirent;
1872 buf->count -= reclen;
1873
1874 return err;
1875}
1876
1877asmlinkage int irix_getdents64(int fd, void __user *dirent, int cnt)
1878{
1879 struct file *file;
1880 struct irix_dirent64 __user *lastdirent;
1881 struct irix_dirent64_callback buf;
1882 int error;
1883
1884#ifdef DEBUG_GETDENTS
1885 printk("[%s:%d] getdents64(%d, %p, %d) ", current->comm,
1886 current->pid, fd, dirent, cnt);
1887#endif
1888 error = -EBADF;
1889 if (!(file = fget(fd)))
1890 goto out;
1891
1892 error = -EFAULT;
1893 if (!access_ok(VERIFY_WRITE, dirent, cnt))
1894 goto out_f;
1895
1896 error = -EINVAL;
1897 if (cnt < (sizeof(struct irix_dirent64) + 255))
1898 goto out_f;
1899
1900 buf.curr = (struct irix_dirent64 __user *) dirent;
1901 buf.previous = NULL;
1902 buf.count = cnt;
1903 buf.error = 0;
1904 error = vfs_readdir(file, irix_filldir64, &buf);
1905 if (error < 0)
1906 goto out_f;
1907 lastdirent = buf.previous;
1908 if (!lastdirent) {
1909 error = buf.error;
1910 goto out_f;
1911 }
1912 if (put_user(file->f_pos, &lastdirent->d_off))
1913 return -EFAULT;
1914#ifdef DEBUG_GETDENTS
1915 printk("returning %d\n", cnt - buf.count);
1916#endif
1917 error = cnt - buf.count;
1918
1919out_f:
1920 fput(file);
1921out:
1922 return error;
1923}
1924
1925asmlinkage int irix_ngetdents64(int fd, void __user *dirent, int cnt, int *eob)
1926{
1927 struct file *file;
1928 struct irix_dirent64 __user *lastdirent;
1929 struct irix_dirent64_callback buf;
1930 int error;
1931
1932#ifdef DEBUG_GETDENTS
1933 printk("[%s:%d] ngetdents64(%d, %p, %d) ", current->comm,
1934 current->pid, fd, dirent, cnt);
1935#endif
1936 error = -EBADF;
1937 if (!(file = fget(fd)))
1938 goto out;
1939
1940 error = -EFAULT;
1941 if (!access_ok(VERIFY_WRITE, dirent, cnt) ||
1942 !access_ok(VERIFY_WRITE, eob, sizeof(*eob)))
1943 goto out_f;
1944
1945 error = -EINVAL;
1946 if (cnt < (sizeof(struct irix_dirent64) + 255))
1947 goto out_f;
1948
1949 *eob = 0;
1950 buf.curr = (struct irix_dirent64 __user *) dirent;
1951 buf.previous = NULL;
1952 buf.count = cnt;
1953 buf.error = 0;
1954 error = vfs_readdir(file, irix_filldir64, &buf);
1955 if (error < 0)
1956 goto out_f;
1957 lastdirent = buf.previous;
1958 if (!lastdirent) {
1959 error = buf.error;
1960 goto out_f;
1961 }
1962 if (put_user(file->f_pos, &lastdirent->d_off))
1963 return -EFAULT;
1964#ifdef DEBUG_GETDENTS
1965 printk("eob=%d returning %d\n", *eob, cnt - buf.count);
1966#endif
1967 error = cnt - buf.count;
1968
1969out_f:
1970 fput(file);
1971out:
1972 return error;
1973}
1974
1975asmlinkage int irix_uadmin(unsigned long op, unsigned long func, unsigned long arg)
1976{
1977 int retval;
1978
1979 switch (op) {
1980 case 1:
1981 /* Reboot */
1982 printk("[%s:%d] irix_uadmin: Wants to reboot...\n",
1983 current->comm, current->pid);
1984 retval = -EINVAL;
1985 goto out;
1986
1987 case 2:
1988 /* Shutdown */
1989 printk("[%s:%d] irix_uadmin: Wants to shutdown...\n",
1990 current->comm, current->pid);
1991 retval = -EINVAL;
1992 goto out;
1993
1994 case 4:
1995 /* Remount-root */
1996 printk("[%s:%d] irix_uadmin: Wants to remount root...\n",
1997 current->comm, current->pid);
1998 retval = -EINVAL;
1999 goto out;
2000
2001 case 8:
2002 /* Kill all tasks. */
2003 printk("[%s:%d] irix_uadmin: Wants to kill all tasks...\n",
2004 current->comm, current->pid);
2005 retval = -EINVAL;
2006 goto out;
2007
2008 case 256:
2009 /* Set magic mushrooms... */
2010 printk("[%s:%d] irix_uadmin: Wants to set magic mushroom[%d]...\n",
2011 current->comm, current->pid, (int) func);
2012 retval = -EINVAL;
2013 goto out;
2014
2015 default:
2016 printk("[%s:%d] irix_uadmin: Unknown operation [%d]...\n",
2017 current->comm, current->pid, (int) op);
2018 retval = -EINVAL;
2019 goto out;
2020 };
2021
2022out:
2023 return retval;
2024}
2025
2026asmlinkage int irix_utssys(char __user *inbuf, int arg, int type, char __user *outbuf)
2027{
2028 int retval;
2029
2030 switch(type) {
2031 case 0:
2032 /* uname() */
2033 retval = irix_uname((struct iuname __user *)inbuf);
2034 goto out;
2035
2036 case 2:
2037 /* ustat() */
2038 printk("[%s:%d] irix_utssys: Wants to do ustat()\n",
2039 current->comm, current->pid);
2040 retval = -EINVAL;
2041 goto out;
2042
2043 case 3:
2044 /* fusers() */
2045 printk("[%s:%d] irix_utssys: Wants to do fusers()\n",
2046 current->comm, current->pid);
2047 retval = -EINVAL;
2048 goto out;
2049
2050 default:
2051 printk("[%s:%d] irix_utssys: Wants to do unknown type[%d]\n",
2052 current->comm, current->pid, (int) type);
2053 retval = -EINVAL;
2054 goto out;
2055 }
2056
2057out:
2058 return retval;
2059}
2060
2061#undef DEBUG_FCNTL
2062
2063#define IRIX_F_ALLOCSP 10
2064
2065asmlinkage int irix_fcntl(int fd, int cmd, int arg)
2066{
2067 int retval;
2068
2069#ifdef DEBUG_FCNTL
2070 printk("[%s:%d] irix_fcntl(%d, %d, %d) ", current->comm,
2071 current->pid, fd, cmd, arg);
2072#endif
2073 if (cmd == IRIX_F_ALLOCSP){
2074 return 0;
2075 }
2076 retval = sys_fcntl(fd, cmd, arg);
2077#ifdef DEBUG_FCNTL
2078 printk("%d\n", retval);
2079#endif
2080 return retval;
2081}
2082
2083asmlinkage int irix_ulimit(int cmd, int arg)
2084{
2085 int retval;
2086
2087 switch(cmd) {
2088 case 1:
2089 printk("[%s:%d] irix_ulimit: Wants to get file size limit.\n",
2090 current->comm, current->pid);
2091 retval = -EINVAL;
2092 goto out;
2093
2094 case 2:
2095 printk("[%s:%d] irix_ulimit: Wants to set file size limit.\n",
2096 current->comm, current->pid);
2097 retval = -EINVAL;
2098 goto out;
2099
2100 case 3:
2101 printk("[%s:%d] irix_ulimit: Wants to get brk limit.\n",
2102 current->comm, current->pid);
2103 retval = -EINVAL;
2104 goto out;
2105
2106 case 4:
2107#if 0
2108 printk("[%s:%d] irix_ulimit: Wants to get fd limit.\n",
2109 current->comm, current->pid);
2110 retval = -EINVAL;
2111 goto out;
2112#endif
2113 retval = current->signal->rlim[RLIMIT_NOFILE].rlim_cur;
2114 goto out;
2115
2116 case 5:
2117 printk("[%s:%d] irix_ulimit: Wants to get txt offset.\n",
2118 current->comm, current->pid);
2119 retval = -EINVAL;
2120 goto out;
2121
2122 default:
2123 printk("[%s:%d] irix_ulimit: Unknown command [%d].\n",
2124 current->comm, current->pid, cmd);
2125 retval = -EINVAL;
2126 goto out;
2127 }
2128out:
2129 return retval;
2130}
2131
2132asmlinkage int irix_unimp(struct pt_regs *regs)
2133{
2134 printk("irix_unimp [%s:%d] v0=%d v1=%d a0=%08lx a1=%08lx a2=%08lx "
2135 "a3=%08lx\n", current->comm, current->pid,
2136 (int) regs->regs[2], (int) regs->regs[3],
2137 regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]);
2138
2139 return -ENOSYS;
2140}
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index f9165d1a17bf..b8ea4e9d0d87 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -71,7 +71,6 @@ extern asmlinkage void handle_reserved(void);
71extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, 71extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
72 struct mips_fpu_struct *ctx, int has_fpu); 72 struct mips_fpu_struct *ctx, int has_fpu);
73 73
74void (*board_watchpoint_handler)(struct pt_regs *regs);
75void (*board_be_init)(void); 74void (*board_be_init)(void);
76int (*board_be_handler)(struct pt_regs *regs, int is_fixup); 75int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
77void (*board_nmi_handler_setup)(void); 76void (*board_nmi_handler_setup)(void);
@@ -249,11 +248,11 @@ static void __show_regs(const struct pt_regs *regs)
249 /* 248 /*
250 * Saved cp0 registers 249 * Saved cp0 registers
251 */ 250 */
252 printk("epc : %0*lx ", field, regs->cp0_epc); 251 printk("epc : %0*lx %pS\n", field, regs->cp0_epc,
253 print_symbol("%s ", regs->cp0_epc); 252 (void *) regs->cp0_epc);
254 printk(" %s\n", print_tainted()); 253 printk(" %s\n", print_tainted());
255 printk("ra : %0*lx ", field, regs->regs[31]); 254 printk("ra : %0*lx %pS\n", field, regs->regs[31],
256 print_symbol("%s\n", regs->regs[31]); 255 (void *) regs->regs[31]);
257 256
258 printk("Status: %08x ", (uint32_t) regs->cp0_status); 257 printk("Status: %08x ", (uint32_t) regs->cp0_status);
259 258
@@ -892,11 +891,6 @@ asmlinkage void do_mdmx(struct pt_regs *regs)
892 891
893asmlinkage void do_watch(struct pt_regs *regs) 892asmlinkage void do_watch(struct pt_regs *regs)
894{ 893{
895 if (board_watchpoint_handler) {
896 (*board_watchpoint_handler)(regs);
897 return;
898 }
899
900 /* 894 /*
901 * We use the watch exception where available to detect stack 895 * We use the watch exception where available to detect stack
902 * overflows. 896 * overflows.
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index a56c15026965..d1ac7a25c856 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -22,8 +22,8 @@
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24 24
25#include <asm/bootinfo.h>
26#include <asm/irq_cpu.h> 25#include <asm/irq_cpu.h>
26#include <asm/lasat/lasat.h>
27#include <asm/lasat/lasatint.h> 27#include <asm/lasat/lasatint.h>
28 28
29#include <irq.h> 29#include <irq.h>
@@ -112,23 +112,18 @@ void __init arch_init_irq(void)
112{ 112{
113 int i; 113 int i;
114 114
115 switch (mips_machtype) { 115 if (IS_LASAT_200()) {
116 case MACH_LASAT_100:
117 lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
118 lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
119 lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
120 get_int_status = get_int_status_100;
121 *lasat_int_mask = 0;
122 break;
123 case MACH_LASAT_200:
124 lasat_int_status = (void *)LASAT_INT_STATUS_REG_200; 116 lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
125 lasat_int_mask = (void *)LASAT_INT_MASK_REG_200; 117 lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
126 lasat_int_mask_shift = LASATINT_MASK_SHIFT_200; 118 lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
127 get_int_status = get_int_status_200; 119 get_int_status = get_int_status_200;
128 *lasat_int_mask &= 0xffff; 120 *lasat_int_mask &= 0xffff;
129 break; 121 } else {
130 default: 122 lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
131 panic("arch_init_irq: mips_machtype incorrect"); 123 lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
124 lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
125 get_int_status = get_int_status_100;
126 *lasat_int_mask = 0;
132 } 127 }
133 128
134 mips_cpu_irq_init(); 129 mips_cpu_irq_init();
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
index 31e328b3814d..577bb463a871 100644
--- a/arch/mips/lasat/lasat_board.c
+++ b/arch/mips/lasat/lasat_board.c
@@ -24,7 +24,6 @@
24#include <linux/string.h> 24#include <linux/string.h>
25#include <linux/ctype.h> 25#include <linux/ctype.h>
26#include <linux/mutex.h> 26#include <linux/mutex.h>
27#include <asm/bootinfo.h>
28#include <asm/addrspace.h> 27#include <asm/addrspace.h>
29#include "at93c.h" 28#include "at93c.h"
30/* New model description table */ 29/* New model description table */
@@ -66,7 +65,7 @@ static void init_flash_sizes(void)
66 ls[LASAT_MTD_SERVICE] = 0xC0000; 65 ls[LASAT_MTD_SERVICE] = 0xC0000;
67 ls[LASAT_MTD_NORMAL] = 0x100000; 66 ls[LASAT_MTD_NORMAL] = 0x100000;
68 67
69 if (mips_machtype == MACH_LASAT_100) { 68 if (!IS_LASAT_200()) {
70 lasat_board_info.li_flash_base = 0x1e000000; 69 lasat_board_info.li_flash_base = 0x1e000000;
71 70
72 lb[LASAT_MTD_BOOTLOADER] = 0x1e400000; 71 lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c
index 209edcc26f07..6acc6cb85f0a 100644
--- a/arch/mips/lasat/prom.c
+++ b/arch/mips/lasat/prom.c
@@ -86,18 +86,16 @@ void __init prom_init(void)
86 86
87 setup_prom_vectors(); 87 setup_prom_vectors();
88 88
89 if (current_cpu_data.cputype == CPU_R5000) { 89 if (IS_LASAT_200()) {
90 printk(KERN_INFO "LASAT 200 board\n"); 90 printk(KERN_INFO "LASAT 200 board\n");
91 mips_machtype = MACH_LASAT_200;
92 lasat_ndelay_divider = LASAT_200_DIVIDER; 91 lasat_ndelay_divider = LASAT_200_DIVIDER;
92 at93c = &at93c_defs[1];
93 } else { 93 } else {
94 printk(KERN_INFO "LASAT 100 board\n"); 94 printk(KERN_INFO "LASAT 100 board\n");
95 mips_machtype = MACH_LASAT_100;
96 lasat_ndelay_divider = LASAT_100_DIVIDER; 95 lasat_ndelay_divider = LASAT_100_DIVIDER;
96 at93c = &at93c_defs[0];
97 } 97 }
98 98
99 at93c = &at93c_defs[mips_machtype];
100
101 lasat_init_board_info(); /* Read info from EEPROM */ 99 lasat_init_board_info(); /* Read info from EEPROM */
102 100
103 /* Get the command line */ 101 /* Get the command line */
diff --git a/arch/mips/lasat/serial.c b/arch/mips/lasat/serial.c
index 205bd397d75b..5bcb6e89ab78 100644
--- a/arch/mips/lasat/serial.c
+++ b/arch/mips/lasat/serial.c
@@ -23,7 +23,6 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25 25
26#include <asm/bootinfo.h>
27#include <asm/lasat/lasat.h> 26#include <asm/lasat/lasat.h>
28#include <asm/lasat/serial.h> 27#include <asm/lasat/serial.h>
29 28
@@ -47,7 +46,7 @@ static __init int lasat_uart_add(void)
47 if (!pdev) 46 if (!pdev)
48 return -ENOMEM; 47 return -ENOMEM;
49 48
50 if (mips_machtype == MACH_LASAT_100) { 49 if (!IS_LASAT_200()) {
51 lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100); 50 lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100);
52 lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1; 51 lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1;
53 lasat_serial_res[0].flags = IORESOURCE_MEM; 52 lasat_serial_res[0].flags = IORESOURCE_MEM;
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index e072da4ff3b3..dbd3163a85c2 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -127,9 +127,11 @@ void __init plat_time_init(void)
127void __init plat_mem_setup(void) 127void __init plat_mem_setup(void)
128{ 128{
129 int i; 129 int i;
130 lasat_misc = &lasat_misc_info[mips_machtype]; 130 int lasat_type = IS_LASAT_200() ? 1 : 0;
131
132 lasat_misc = &lasat_misc_info[lasat_type];
131#ifdef CONFIG_PICVUE 133#ifdef CONFIG_PICVUE
132 picvue = &pvc_defs[mips_machtype]; 134 picvue = &pvc_defs[lasat_type];
133#endif 135#endif
134 136
135 /* Set up panic notifier */ 137 /* Set up panic notifier */
@@ -140,7 +142,7 @@ void __init plat_mem_setup(void)
140 lasat_reboot_setup(); 142 lasat_reboot_setup();
141 143
142#ifdef CONFIG_DS1603 144#ifdef CONFIG_DS1603
143 ds1603 = &ds_defs[mips_machtype]; 145 ds1603 = &ds_defs[lasat_type];
144#endif 146#endif
145 147
146#ifdef DYNAMIC_SERIAL_INIT 148#ifdef DYNAMIC_SERIAL_INIT
diff --git a/arch/mips/mips-boards/atlas/Makefile b/arch/mips/mips-boards/atlas/Makefile
deleted file mode 100644
index f71c2dd1041a..000000000000
--- a/arch/mips/mips-boards/atlas/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4#
5# This program is free software; you can distribute it and/or modify it
6# under the terms of the GNU General Public License (Version 2) as
7# published by the Free Software Foundation.
8#
9# This program is distributed in the hope it will be useful, but WITHOUT
10# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12# for more details.
13#
14# You should have received a copy of the GNU General Public License along
15# with this program; if not, write to the Free Software Foundation, Inc.,
16# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17#
18
19obj-y := atlas_int.o atlas_setup.o
20obj-$(CONFIG_KGDB) += atlas_gdb.o
21
22EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/atlas/atlas_gdb.c b/arch/mips/mips-boards/atlas/atlas_gdb.c
deleted file mode 100644
index 00c98cff62dc..000000000000
--- a/arch/mips/mips-boards/atlas/atlas_gdb.c
+++ /dev/null
@@ -1,97 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * This is the interface to the remote debugger stub.
19 */
20#include <asm/io.h>
21#include <asm/mips-boards/atlas.h>
22#include <asm/mips-boards/saa9730_uart.h>
23
24#define INB(a) inb((unsigned long)a)
25#define OUTB(x, a) outb(x, (unsigned long)a)
26
27/*
28 * This is the interface to the remote debugger stub
29 * if the Philips part is used for the debug port,
30 * called from the platform setup code.
31 */
32void *saa9730_base = (void *)ATLAS_SAA9730_REG;
33
34static int saa9730_kgdb_active = 0;
35
36#define SAA9730_BAUDCLOCK(baud) (((ATLAS_SAA9730_BAUDCLOCK/(baud))/16)-1)
37
38int saa9730_kgdb_hook(int speed)
39{
40 int baudclock;
41 t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
42
43 /*
44 * Clear all interrupts
45 */
46 (void) INB(&kgdb_uart->Lsr);
47 (void) INB(&kgdb_uart->Msr);
48 (void) INB(&kgdb_uart->Thr_Rbr);
49 (void) INB(&kgdb_uart->Iir_Fcr);
50
51 /*
52 * Now, initialize the UART
53 */
54 /* 8 data bits, one stop bit, no parity */
55 OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
56
57 baudclock = SAA9730_BAUDCLOCK(speed);
58
59 OUTB((baudclock >> 16) & 0xff, &kgdb_uart->BaudDivMsb);
60 OUTB( baudclock & 0xff, &kgdb_uart->BaudDivLsb);
61
62 /* Set RTS/DTR active */
63 OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
64 saa9730_kgdb_active = 1;
65
66 return speed;
67}
68
69int saa9730_putDebugChar(char c)
70{
71 t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
72
73 if (!saa9730_kgdb_active) { /* need to init device first */
74 return 0;
75 }
76
77 while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
78 ;
79 OUTB(c, &kgdb_uart->Thr_Rbr);
80
81 return 1;
82}
83
84char saa9730_getDebugChar(void)
85{
86 t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
87 char c;
88
89 if (!saa9730_kgdb_active) { /* need to init device first */
90 return 0;
91 }
92 while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
93 ;
94
95 c = INB(&kgdb_uart->Thr_Rbr);
96 return(c);
97}
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
deleted file mode 100644
index 6fb29c3ff62d..000000000000
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ /dev/null
@@ -1,272 +0,0 @@
1/*
2 * Copyright (C) 1999, 2000, 2006 MIPS Technologies, Inc.
3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
6 *
7 * ########################################################################
8 *
9 * This program is free software; you can distribute it and/or modify it
10 * under the terms of the GNU General Public License (Version 2) as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
21 *
22 * ########################################################################
23 *
24 * Routines for generic manipulation of the interrupts found on the MIPS
25 * Atlas board.
26 *
27 */
28#include <linux/compiler.h>
29#include <linux/init.h>
30#include <linux/irq.h>
31#include <linux/sched.h>
32#include <linux/slab.h>
33#include <linux/interrupt.h>
34#include <linux/kernel_stat.h>
35#include <linux/kernel.h>
36
37#include <asm/gdb-stub.h>
38#include <asm/io.h>
39#include <asm/irq_cpu.h>
40#include <asm/msc01_ic.h>
41
42#include <asm/mips-boards/atlas.h>
43#include <asm/mips-boards/atlasint.h>
44#include <asm/mips-boards/generic.h>
45
46static struct atlas_ictrl_regs *atlas_hw0_icregs;
47
48#if 0
49#define DEBUG_INT(x...) printk(x)
50#else
51#define DEBUG_INT(x...)
52#endif
53
54void disable_atlas_irq(unsigned int irq_nr)
55{
56 atlas_hw0_icregs->intrsten = 1 << (irq_nr - ATLAS_INT_BASE);
57 iob();
58}
59
60void enable_atlas_irq(unsigned int irq_nr)
61{
62 atlas_hw0_icregs->intseten = 1 << (irq_nr - ATLAS_INT_BASE);
63 iob();
64}
65
66static void end_atlas_irq(unsigned int irq)
67{
68 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
69 enable_atlas_irq(irq);
70}
71
72static struct irq_chip atlas_irq_type = {
73 .name = "Atlas",
74 .ack = disable_atlas_irq,
75 .mask = disable_atlas_irq,
76 .mask_ack = disable_atlas_irq,
77 .unmask = enable_atlas_irq,
78 .eoi = enable_atlas_irq,
79 .end = end_atlas_irq,
80};
81
82static inline int ls1bit32(unsigned int x)
83{
84 int b = 31, s;
85
86 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
87 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
88 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
89 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
90 s = 1; if (x << 1 == 0) s = 0; b -= s;
91
92 return b;
93}
94
95static inline void atlas_hw0_irqdispatch(void)
96{
97 unsigned long int_status;
98 int irq;
99
100 int_status = atlas_hw0_icregs->intstatus;
101
102 /* if int_status == 0, then the interrupt has already been cleared */
103 if (unlikely(int_status == 0))
104 return;
105
106 irq = ATLAS_INT_BASE + ls1bit32(int_status);
107
108 DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
109
110 do_IRQ(irq);
111}
112
113static inline int clz(unsigned long x)
114{
115 __asm__(
116 " .set push \n"
117 " .set mips32 \n"
118 " clz %0, %1 \n"
119 " .set pop \n"
120 : "=r" (x)
121 : "r" (x));
122
123 return x;
124}
125
126/*
127 * Version of ffs that only looks at bits 12..15.
128 */
129static inline unsigned int irq_ffs(unsigned int pending)
130{
131#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
132 return -clz(pending) + 31 - CAUSEB_IP;
133#else
134 unsigned int a0 = 7;
135 unsigned int t0;
136
137 t0 = s0 & 0xf000;
138 t0 = t0 < 1;
139 t0 = t0 << 2;
140 a0 = a0 - t0;
141 s0 = s0 << t0;
142
143 t0 = s0 & 0xc000;
144 t0 = t0 < 1;
145 t0 = t0 << 1;
146 a0 = a0 - t0;
147 s0 = s0 << t0;
148
149 t0 = s0 & 0x8000;
150 t0 = t0 < 1;
151 //t0 = t0 << 2;
152 a0 = a0 - t0;
153 //s0 = s0 << t0;
154
155 return a0;
156#endif
157}
158
159/*
160 * IRQs on the Atlas board look basically like (all external interrupt
161 * sources are combined together on hardware interrupt 0 (MIPS IRQ 2)):
162 *
163 * MIPS IRQ Source
164 * -------- ------
165 * 0 Software 0 (reschedule IPI on MT)
166 * 1 Software 1 (remote call IPI on MT)
167 * 2 Combined Atlas hardware interrupt (hw0)
168 * 3 Hardware (ignored)
169 * 4 Hardware (ignored)
170 * 5 Hardware (ignored)
171 * 6 Hardware (ignored)
172 * 7 R4k timer (what we use)
173 *
174 * We handle the IRQ according to _our_ priority which is:
175 *
176 * Highest ---- R4k Timer
177 * Lowest ---- Software 0
178 *
179 * then we just return, if multiple IRQs are pending then we will just take
180 * another exception, big deal.
181 */
182asmlinkage void plat_irq_dispatch(void)
183{
184 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
185 int irq;
186
187 irq = irq_ffs(pending);
188
189 if (irq == MIPSCPU_INT_ATLAS)
190 atlas_hw0_irqdispatch();
191 else if (irq >= 0)
192 do_IRQ(MIPS_CPU_IRQ_BASE + irq);
193 else
194 spurious_interrupt();
195}
196
197static inline void init_atlas_irqs(int base)
198{
199 int i;
200
201 atlas_hw0_icregs = (struct atlas_ictrl_regs *)
202 ioremap(ATLAS_ICTRL_REGS_BASE,
203 sizeof(struct atlas_ictrl_regs *));
204
205 /*
206 * Mask out all interrupt by writing "1" to all bit position in
207 * the interrupt reset reg.
208 */
209 atlas_hw0_icregs->intrsten = 0xffffffff;
210
211 for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++)
212 set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq);
213}
214
215static struct irqaction atlasirq = {
216 .handler = no_action,
217 .name = "Atlas cascade"
218};
219
220msc_irqmap_t __initdata msc_irqmap[] = {
221 {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
222 {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
223};
224int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
225
226msc_irqmap_t __initdata msc_eicirqmap[] = {
227 {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
228 {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
229 {MSC01E_INT_ATLAS, MSC01_IRQ_LEVEL, 0},
230 {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
231 {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
232 {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
233 {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
234};
235int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
236
237void __init arch_init_irq(void)
238{
239 init_atlas_irqs(ATLAS_INT_BASE);
240
241 if (!cpu_has_veic)
242 mips_cpu_irq_init();
243
244 switch(mips_revision_corid) {
245 case MIPS_REVISION_CORID_CORE_MSC:
246 case MIPS_REVISION_CORID_CORE_FPGA2:
247 case MIPS_REVISION_CORID_CORE_FPGA3:
248 case MIPS_REVISION_CORID_CORE_FPGA4:
249 case MIPS_REVISION_CORID_CORE_24K:
250 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
251 if (cpu_has_veic)
252 init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
253 msc_eicirqmap, msc_nr_eicirqs);
254 else
255 init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
256 msc_irqmap, msc_nr_irqs);
257 }
258
259 if (cpu_has_veic) {
260 set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
261 setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
262 } else if (cpu_has_vint) {
263 set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
264#ifdef CONFIG_MIPS_MT_SMTC
265 setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
266 &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
267#else /* Not SMTC */
268 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
269#endif /* CONFIG_MIPS_MT_SMTC */
270 } else
271 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
272}
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
deleted file mode 100644
index 5c500802271e..000000000000
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 */
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/ioport.h>
22#include <linux/tty.h>
23#include <linux/serial.h>
24#include <linux/serial_core.h>
25#include <linux/serial_8250.h>
26
27#include <asm/cpu.h>
28#include <asm/bootinfo.h>
29#include <asm/irq.h>
30#include <asm/mips-boards/generic.h>
31#include <asm/mips-boards/prom.h>
32#include <asm/mips-boards/atlas.h>
33#include <asm/mips-boards/atlasint.h>
34#include <asm/time.h>
35#include <asm/traps.h>
36
37static void __init serial_init(void);
38
39const char *get_system_type(void)
40{
41 return "MIPS Atlas";
42}
43
44const char display_string[] = " LINUX ON ATLAS ";
45
46void __init plat_mem_setup(void)
47{
48 mips_pcibios_init();
49
50 ioport_resource.end = 0x7fffffff;
51
52 serial_init();
53
54#ifdef CONFIG_KGDB
55 kgdb_config();
56#endif
57 mips_reboot_setup();
58}
59
60static void __init serial_init(void)
61{
62#ifdef CONFIG_SERIAL_8250
63 struct uart_port s;
64
65 memset(&s, 0, sizeof(s));
66
67#ifdef CONFIG_CPU_LITTLE_ENDIAN
68 s.iobase = ATLAS_UART_REGS_BASE;
69#else
70 s.iobase = ATLAS_UART_REGS_BASE+3;
71#endif
72 s.irq = ATLAS_INT_UART;
73 s.uartclk = ATLAS_BASE_BAUD * 16;
74 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
75 s.iotype = UPIO_PORT;
76 s.regshift = 3;
77
78 if (early_serial_setup(&s) != 0) {
79 printk(KERN_ERR "Serial setup failed!\n");
80 }
81#endif
82}
diff --git a/arch/mips/mips-boards/generic/Makefile b/arch/mips/mips-boards/generic/Makefile
deleted file mode 100644
index f7f87fc09d1e..000000000000
--- a/arch/mips/mips-boards/generic/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4#
5# This program is free software; you can distribute it and/or modify it
6# under the terms of the GNU General Public License (Version 2) as
7# published by the Free Software Foundation.
8#
9# This program is distributed in the hope it will be useful, but WITHOUT
10# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12# for more details.
13#
14# You should have received a copy of the GNU General Public License along
15# with this program; if not, write to the Free Software Foundation, Inc.,
16# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17#
18# Makefile for the MIPS boards generic routines under Linux.
19#
20
21obj-y := reset.o display.o init.o memory.o \
22 cmdline.o time.o
23obj-y += amon.o
24
25obj-$(CONFIG_EARLY_PRINTK) += console.o
26obj-$(CONFIG_PCI) += pci.o
27obj-$(CONFIG_KGDB) += gdb_hook.o
28
29EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile
deleted file mode 100644
index db4ad654a6d3..000000000000
--- a/arch/mips/mips-boards/malta/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4#
5# This program is free software; you can distribute it and/or modify it
6# under the terms of the GNU General Public License (Version 2) as
7# published by the Free Software Foundation.
8#
9# This program is distributed in the hope it will be useful, but WITHOUT
10# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12# for more details.
13#
14# You should have received a copy of the GNU General Public License along
15# with this program; if not, write to the Free Software Foundation, Inc.,
16# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17#
18# Makefile for the MIPS Malta specific kernel interface routines
19# under Linux.
20#
21
22obj-y := malta_int.o malta_mtd.o malta_platform.o malta_setup.o
23
24# FIXME FIXME FIXME
25obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
26
27EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/sead/Makefile b/arch/mips/mips-boards/sead/Makefile
deleted file mode 100644
index 3682fe217bd5..000000000000
--- a/arch/mips/mips-boards/sead/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
4#
5# ########################################################################
6#
7# This program is free software; you can distribute it and/or modify it
8# under the terms of the GNU General Public License (Version 2) as
9# published by the Free Software Foundation.
10#
11# This program is distributed in the hope it will be useful, but WITHOUT
12# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14# for more details.
15#
16# You should have received a copy of the GNU General Public License along
17# with this program; if not, write to the Free Software Foundation, Inc.,
18# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19#
20# #######################################################################
21#
22# Makefile for the MIPS SEAD specific kernel interface routines
23# under Linux.
24#
25
26obj-y := sead_int.o sead_setup.o
27
28EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
deleted file mode 100644
index ec6dd194c14a..000000000000
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
4 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
5 * Copyright (C) 2004 Maciej W. Rozycki
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * Routines for generic manipulation of the interrupts found on the MIPS
21 * Sead board.
22 */
23#include <linux/init.h>
24#include <linux/interrupt.h>
25
26#include <asm/irq_cpu.h>
27#include <asm/mipsregs.h>
28#include <asm/system.h>
29
30#include <asm/mips-boards/seadint.h>
31
32static inline int clz(unsigned long x)
33{
34 __asm__(
35 " .set push \n"
36 " .set mips32 \n"
37 " clz %0, %1 \n"
38 " .set pop \n"
39 : "=r" (x)
40 : "r" (x));
41
42 return x;
43}
44
45/*
46 * Version of ffs that only looks at bits 12..15.
47 */
48static inline unsigned int irq_ffs(unsigned int pending)
49{
50#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
51 return -clz(pending) + 31 - CAUSEB_IP;
52#else
53 unsigned int a0 = 7;
54 unsigned int t0;
55
56 t0 = s0 & 0xf000;
57 t0 = t0 < 1;
58 t0 = t0 << 2;
59 a0 = a0 - t0;
60 s0 = s0 << t0;
61
62 t0 = s0 & 0xc000;
63 t0 = t0 < 1;
64 t0 = t0 << 1;
65 a0 = a0 - t0;
66 s0 = s0 << t0;
67
68 t0 = s0 & 0x8000;
69 t0 = t0 < 1;
70 //t0 = t0 << 2;
71 a0 = a0 - t0;
72 //s0 = s0 << t0;
73
74 return a0;
75#endif
76}
77
78/*
79 * IRQs on the SEAD board look basically are combined together on hardware
80 * interrupt 0 (MIPS IRQ 2)) like:
81 *
82 * MIPS IRQ Source
83 * -------- ------
84 * 0 Software (ignored)
85 * 1 Software (ignored)
86 * 2 UART0 (hw0)
87 * 3 UART1 (hw1)
88 * 4 Hardware (ignored)
89 * 5 Hardware (ignored)
90 * 6 Hardware (ignored)
91 * 7 R4k timer (what we use)
92 *
93 * We handle the IRQ according to _our_ priority which is:
94 *
95 * Highest ---- R4k Timer
96 * Lowest ---- Combined hardware interrupt
97 *
98 * then we just return, if multiple IRQs are pending then we will just take
99 * another exception, big deal.
100 */
101asmlinkage void plat_irq_dispatch(void)
102{
103 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
104 int irq;
105
106 irq = irq_ffs(pending);
107
108 if (irq >= 0)
109 do_IRQ(MIPS_CPU_IRQ_BASE + irq);
110 else
111 spurious_interrupt();
112}
113
114void __init arch_init_irq(void)
115{
116 mips_cpu_irq_init();
117}
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
deleted file mode 100644
index 8aa8e5b7b074..000000000000
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * SEAD specific setup.
19 */
20#include <linux/init.h>
21#include <linux/sched.h>
22#include <linux/ioport.h>
23#include <linux/tty.h>
24#include <linux/serial.h>
25#include <linux/serial_core.h>
26#include <linux/serial_8250.h>
27
28#include <asm/cpu.h>
29#include <asm/bootinfo.h>
30#include <asm/irq.h>
31#include <asm/mips-boards/generic.h>
32#include <asm/mips-boards/prom.h>
33#include <asm/mips-boards/sead.h>
34#include <asm/mips-boards/seadint.h>
35#include <asm/time.h>
36
37static void __init serial_init(void);
38
39const char *get_system_type(void)
40{
41 return "MIPS SEAD";
42}
43
44const char display_string[] = " LINUX ON SEAD ";
45
46void __init plat_mem_setup(void)
47{
48 ioport_resource.end = 0x7fffffff;
49
50 serial_init();
51
52 mips_reboot_setup();
53}
54
55static void __init serial_init(void)
56{
57#ifdef CONFIG_SERIAL_8250
58 struct uart_port s;
59
60 memset(&s, 0, sizeof(s));
61
62#ifdef CONFIG_CPU_LITTLE_ENDIAN
63 s.iobase = SEAD_UART0_REGS_BASE;
64#else
65 s.iobase = SEAD_UART0_REGS_BASE+3;
66#endif
67 s.irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_UART0;
68 s.uartclk = SEAD_BASE_BAUD * 16;
69 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
70 s.iotype = UPIO_PORT;
71 s.regshift = 3;
72
73 if (early_serial_setup(&s) != 0) {
74 printk(KERN_ERR "Serial setup failed!\n");
75 }
76#endif
77}
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 27096751ddce..71df3390c07b 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -43,12 +43,12 @@
43 * primary cache. 43 * primary cache.
44 */ 44 */
45static inline void r4k_on_each_cpu(void (*func) (void *info), void *info, 45static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
46 int retry, int wait) 46 int wait)
47{ 47{
48 preempt_disable(); 48 preempt_disable();
49 49
50#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC) 50#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
51 smp_call_function(func, info, retry, wait); 51 smp_call_function(func, info, wait);
52#endif 52#endif
53 func(info); 53 func(info);
54 preempt_enable(); 54 preempt_enable();
@@ -350,7 +350,7 @@ static inline void local_r4k___flush_cache_all(void * args)
350 350
351static void r4k___flush_cache_all(void) 351static void r4k___flush_cache_all(void)
352{ 352{
353 r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1); 353 r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1);
354} 354}
355 355
356static inline int has_valid_asid(const struct mm_struct *mm) 356static inline int has_valid_asid(const struct mm_struct *mm)
@@ -397,7 +397,7 @@ static void r4k_flush_cache_range(struct vm_area_struct *vma,
397 int exec = vma->vm_flags & VM_EXEC; 397 int exec = vma->vm_flags & VM_EXEC;
398 398
399 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) 399 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc))
400 r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); 400 r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1);
401} 401}
402 402
403static inline void local_r4k_flush_cache_mm(void * args) 403static inline void local_r4k_flush_cache_mm(void * args)
@@ -429,7 +429,7 @@ static void r4k_flush_cache_mm(struct mm_struct *mm)
429 if (!cpu_has_dc_aliases) 429 if (!cpu_has_dc_aliases)
430 return; 430 return;
431 431
432 r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1); 432 r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1);
433} 433}
434 434
435struct flush_cache_page_args { 435struct flush_cache_page_args {
@@ -521,7 +521,7 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
521 args.addr = addr; 521 args.addr = addr;
522 args.pfn = pfn; 522 args.pfn = pfn;
523 523
524 r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1); 524 r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1);
525} 525}
526 526
527static inline void local_r4k_flush_data_cache_page(void * addr) 527static inline void local_r4k_flush_data_cache_page(void * addr)
@@ -535,7 +535,7 @@ static void r4k_flush_data_cache_page(unsigned long addr)
535 local_r4k_flush_data_cache_page((void *)addr); 535 local_r4k_flush_data_cache_page((void *)addr);
536 else 536 else
537 r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 537 r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr,
538 1, 1); 538 1);
539} 539}
540 540
541struct flush_icache_range_args { 541struct flush_icache_range_args {
@@ -571,7 +571,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
571 args.start = start; 571 args.start = start;
572 args.end = end; 572 args.end = end;
573 573
574 r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1); 574 r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1);
575 instruction_hazard(); 575 instruction_hazard();
576} 576}
577 577
@@ -672,7 +672,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
672 672
673static void r4k_flush_cache_sigtramp(unsigned long addr) 673static void r4k_flush_cache_sigtramp(unsigned long addr)
674{ 674{
675 r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1); 675 r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1);
676} 676}
677 677
678static void r4k_flush_icache_all(void) 678static void r4k_flush_icache_all(void)
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 1655aa69e133..f467199676a8 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -396,7 +396,7 @@ int __cpuinit uasm_in_compat_space_p(long addr)
396#endif 396#endif
397} 397}
398 398
399int __cpuinit uasm_rel_highest(long val) 399static int __cpuinit uasm_rel_highest(long val)
400{ 400{
401#ifdef CONFIG_64BIT 401#ifdef CONFIG_64BIT
402 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000; 402 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
@@ -405,7 +405,7 @@ int __cpuinit uasm_rel_highest(long val)
405#endif 405#endif
406} 406}
407 407
408int __cpuinit uasm_rel_higher(long val) 408static int __cpuinit uasm_rel_higher(long val)
409{ 409{
410#ifdef CONFIG_64BIT 410#ifdef CONFIG_64BIT
411 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000; 411 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
diff --git a/arch/mips/mm/uasm.h b/arch/mips/mm/uasm.h
index 0d6a66f32030..c6d1e3dd82d4 100644
--- a/arch/mips/mm/uasm.h
+++ b/arch/mips/mm/uasm.h
@@ -103,8 +103,6 @@ struct uasm_label {
103void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid); 103void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid);
104#ifdef CONFIG_64BIT 104#ifdef CONFIG_64BIT
105int uasm_in_compat_space_p(long addr); 105int uasm_in_compat_space_p(long addr);
106int uasm_rel_highest(long val);
107int uasm_rel_higher(long val);
108#endif 106#endif
109int uasm_rel_hi(long val); 107int uasm_rel_hi(long val);
110int uasm_rel_lo(long val); 108int uasm_rel_lo(long val);
diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile
new file mode 100644
index 000000000000..f8064446e812
--- /dev/null
+++ b/arch/mips/mti-malta/Makefile
@@ -0,0 +1,21 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4#
5# Copyright (C) 2008 Wind River Systems, Inc.
6# written by Ralf Baechle <ralf@linux-mips.org>
7#
8obj-y := malta-amon.o malta-cmdline.o \
9 malta-display.o malta-init.o malta-int.o \
10 malta-memory.o malta-mtd.o \
11 malta-platform.o malta-reset.o \
12 malta-setup.o malta-time.o
13
14obj-$(CONFIG_EARLY_PRINTK) += malta-console.o
15obj-$(CONFIG_PCI) += malta-pci.o
16obj-$(CONFIG_KGDB) += malta-kgdb.o
17
18# FIXME FIXME FIXME
19obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
20
21EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/generic/amon.c b/arch/mips/mti-malta/malta-amon.c
index 96236bf33838..96236bf33838 100644
--- a/arch/mips/mips-boards/generic/amon.c
+++ b/arch/mips/mti-malta/malta-amon.c
diff --git a/arch/mips/mips-boards/generic/cmdline.c b/arch/mips/mti-malta/malta-cmdline.c
index 1871c30ed2eb..1871c30ed2eb 100644
--- a/arch/mips/mips-boards/generic/cmdline.c
+++ b/arch/mips/mti-malta/malta-cmdline.c
diff --git a/arch/mips/mips-boards/generic/console.c b/arch/mips/mti-malta/malta-console.c
index 4d8ab99e4155..43bcfb4f8167 100644
--- a/arch/mips/mips-boards/generic/console.c
+++ b/arch/mips/mti-malta/malta-console.c
@@ -22,30 +22,9 @@
22#include <linux/serial_reg.h> 22#include <linux/serial_reg.h>
23#include <asm/io.h> 23#include <asm/io.h>
24 24
25#ifdef CONFIG_MIPS_ATLAS
26#include <asm/mips-boards/atlas.h>
27
28#ifdef CONFIG_CPU_LITTLE_ENDIAN
29#define PORT(offset) (ATLAS_UART_REGS_BASE + ((offset)<<3))
30#else
31#define PORT(offset) (ATLAS_UART_REGS_BASE + 3 + ((offset)<<3))
32#endif
33
34#elif defined(CONFIG_MIPS_SEAD)
35
36#include <asm/mips-boards/sead.h>
37
38#ifdef CONFIG_CPU_LITTLE_ENDIAN
39#define PORT(offset) (SEAD_UART0_REGS_BASE + ((offset)<<3))
40#else
41#define PORT(offset) (SEAD_UART0_REGS_BASE + 3 + ((offset)<<3))
42#endif
43
44#else
45 25
46#define PORT(offset) (0x3f8 + (offset)) 26#define PORT(offset) (0x3f8 + (offset))
47 27
48#endif
49 28
50static inline unsigned int serial_in(int offset) 29static inline unsigned int serial_in(int offset)
51{ 30{
diff --git a/arch/mips/mips-boards/generic/display.c b/arch/mips/mti-malta/malta-display.c
index 2a0057cfc30d..7c8828fcb0ad 100644
--- a/arch/mips/mips-boards/generic/display.c
+++ b/arch/mips/mti-malta/malta-display.c
@@ -22,6 +22,7 @@
22#include <linux/timer.h> 22#include <linux/timer.h>
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/mips-boards/generic.h> 24#include <asm/mips-boards/generic.h>
25#include <asm/mips-boards/prom.h>
25 26
26extern const char display_string[]; 27extern const char display_string[];
27static unsigned int display_count; 28static unsigned int display_count;
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mti-malta/malta-init.c
index 83b9dc739203..c0653021a171 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -197,14 +197,6 @@ void __init kgdb_config(void)
197 while ((c = *++argptr) && ('0' <= c && c <= '9')) 197 while ((c = *++argptr) && ('0' <= c && c <= '9'))
198 speed = speed * 10 + c - '0'; 198 speed = speed * 10 + c - '0';
199 } 199 }
200#ifdef CONFIG_MIPS_ATLAS
201 if (line == 1) {
202 speed = saa9730_kgdb_hook(speed);
203 generic_putDebugChar = saa9730_putDebugChar;
204 generic_getDebugChar = saa9730_getDebugChar;
205 }
206 else
207#endif
208 { 200 {
209 speed = rs_kgdb_hook(line, speed); 201 speed = rs_kgdb_hook(line, speed);
210 generic_putDebugChar = rs_putDebugChar; 202 generic_putDebugChar = rs_putDebugChar;
@@ -260,9 +252,6 @@ void __init prom_init(void)
260 252
261 mips_display_message("LINUX"); 253 mips_display_message("LINUX");
262 254
263#ifdef CONFIG_MIPS_SEAD
264 set_io_port_base(KSEG1);
265#else
266 /* 255 /*
267 * early setup of _pcictrl_bonito so that we can determine 256 * early setup of _pcictrl_bonito so that we can determine
268 * the system controller on a CORE_EMUL board 257 * the system controller on a CORE_EMUL board
@@ -414,7 +403,6 @@ void __init prom_init(void)
414 mips_display_message("SC Error"); 403 mips_display_message("SC Error");
415 while (1); /* We die here... */ 404 while (1); /* We die here... */
416 } 405 }
417#endif
418 board_nmi_handler_setup = mips_nmi_setup; 406 board_nmi_handler_setup = mips_nmi_setup;
419 board_ejtag_handler_setup = mips_ejtag_setup; 407 board_ejtag_handler_setup = mips_ejtag_setup;
420 408
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mti-malta/malta-int.c
index 8c495104b321..ea176113fea9 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -363,6 +363,7 @@ static msc_irqmap_t __initdata msc_eicirqmap[] = {
363 363
364static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); 364static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
365 365
366#if defined(CONFIG_MIPS_MT_SMP)
366/* 367/*
367 * This GIC specific tabular array defines the association between External 368 * This GIC specific tabular array defines the association between External
368 * Interrupts and CPUs/Core Interrupts. The nature of the External 369 * Interrupts and CPUs/Core Interrupts. The nature of the External
@@ -394,11 +395,12 @@ static struct gic_intr_map gic_intr_map[] = {
394 { GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, 395 { GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
395 { GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, 396 { GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
396}; 397};
398#endif
397 399
398/* 400/*
399 * GCMP needs to be detected before any SMP initialisation 401 * GCMP needs to be detected before any SMP initialisation
400 */ 402 */
401int __init gcmp_probe(unsigned long addr, unsigned long size) 403static int __init gcmp_probe(unsigned long addr, unsigned long size)
402{ 404{
403 if (gcmp_present >= 0) 405 if (gcmp_present >= 0)
404 return gcmp_present; 406 return gcmp_present;
@@ -412,7 +414,8 @@ int __init gcmp_probe(unsigned long addr, unsigned long size)
412 return gcmp_present; 414 return gcmp_present;
413} 415}
414 416
415void __init fill_ipi_map(void) 417#if defined(CONFIG_MIPS_MT_SMP)
418static void __init fill_ipi_map(void)
416{ 419{
417 int i; 420 int i;
418 421
@@ -422,6 +425,7 @@ void __init fill_ipi_map(void)
422 (1 << (gic_intr_map[i].pin + 2)); 425 (1 << (gic_intr_map[i].pin + 2));
423 } 426 }
424} 427}
428#endif
425 429
426void __init arch_init_irq(void) 430void __init arch_init_irq(void)
427{ 431{
@@ -527,7 +531,6 @@ void __init arch_init_irq(void)
527 .call = GIC_IPI_EXT_INTR_CALLFNC_VPE3 531 .call = GIC_IPI_EXT_INTR_CALLFNC_VPE3
528 } 532 }
529 }; 533 };
530#define NIPI (sizeof(ipiirq)/sizeof(ipiirq[0]))
531 fill_ipi_map(); 534 fill_ipi_map();
532 gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); 535 gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
533 if (!gcmp_present) { 536 if (!gcmp_present) {
@@ -549,7 +552,7 @@ void __init arch_init_irq(void)
549 printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status()); 552 printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status());
550 write_c0_status(0x1100dc00); 553 write_c0_status(0x1100dc00);
551 printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status()); 554 printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status());
552 for (i = 0; i < NIPI; i++) { 555 for (i = 0; i < ARRAY_SIZE(ipiirq); i++) {
553 setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched); 556 setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched);
554 setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call); 557 setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call);
555 558
diff --git a/arch/mips/mips-boards/generic/gdb_hook.c b/arch/mips/mti-malta/malta-kgdb.c
index 6a1854de4579..6a1854de4579 100644
--- a/arch/mips/mips-boards/generic/gdb_hook.c
+++ b/arch/mips/mti-malta/malta-kgdb.c
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mti-malta/malta-memory.c
index 5e443bba5662..61888ff72c87 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -97,7 +97,6 @@ static struct prom_pmemblock * __init prom_getmdesc(void)
97 mdesc[1].base = 0x00001000; 97 mdesc[1].base = 0x00001000;
98 mdesc[1].size = 0x000ef000; 98 mdesc[1].size = 0x000ef000;
99 99
100#ifdef CONFIG_MIPS_MALTA
101 /* 100 /*
102 * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the 101 * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
103 * south bridge and PCI access always forwarded to the ISA Bus and 102 * south bridge and PCI access always forwarded to the ISA Bus and
@@ -108,11 +107,6 @@ static struct prom_pmemblock * __init prom_getmdesc(void)
108 mdesc[2].type = yamon_dontuse; 107 mdesc[2].type = yamon_dontuse;
109 mdesc[2].base = 0x000f0000; 108 mdesc[2].base = 0x000f0000;
110 mdesc[2].size = 0x00010000; 109 mdesc[2].size = 0x00010000;
111#else
112 mdesc[2].type = yamon_prom;
113 mdesc[2].base = 0x000f0000;
114 mdesc[2].size = 0x00010000;
115#endif
116 110
117 mdesc[3].type = yamon_dontuse; 111 mdesc[3].type = yamon_dontuse;
118 mdesc[3].base = 0x00100000; 112 mdesc[3].base = 0x00100000;
diff --git a/arch/mips/mips-boards/malta/malta_mtd.c b/arch/mips/mti-malta/malta-mtd.c
index 8ad9bdf25dce..8ad9bdf25dce 100644
--- a/arch/mips/mips-boards/malta/malta_mtd.c
+++ b/arch/mips/mti-malta/malta-mtd.c
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mti-malta/malta-pci.c
index b9743190609a..b9743190609a 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
diff --git a/arch/mips/mips-boards/malta/malta_platform.c b/arch/mips/mti-malta/malta-platform.c
index 83b9bab3cd3f..83b9bab3cd3f 100644
--- a/arch/mips/mips-boards/malta/malta_platform.c
+++ b/arch/mips/mti-malta/malta-platform.c
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mti-malta/malta-reset.c
index 583d468d98a9..42dee4da37ba 100644
--- a/arch/mips/mips-boards/generic/reset.c
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -27,15 +27,9 @@
27#include <asm/io.h> 27#include <asm/io.h>
28#include <asm/reboot.h> 28#include <asm/reboot.h>
29#include <asm/mips-boards/generic.h> 29#include <asm/mips-boards/generic.h>
30#if defined(CONFIG_MIPS_ATLAS)
31#include <asm/mips-boards/atlas.h>
32#endif
33 30
34static void mips_machine_restart(char *command); 31static void mips_machine_restart(char *command);
35static void mips_machine_halt(void); 32static void mips_machine_halt(void);
36#if defined(CONFIG_MIPS_ATLAS)
37static void atlas_machine_power_off(void);
38#endif
39 33
40static void mips_machine_restart(char *command) 34static void mips_machine_restart(char *command)
41{ 35{
@@ -53,23 +47,10 @@ static void mips_machine_halt(void)
53 __raw_writel(GORESET, softres_reg); 47 __raw_writel(GORESET, softres_reg);
54} 48}
55 49
56#if defined(CONFIG_MIPS_ATLAS)
57static void atlas_machine_power_off(void)
58{
59 unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
60
61 writew(ATLAS_GOSTBY, psustby_reg);
62}
63#endif
64 50
65void mips_reboot_setup(void) 51void mips_reboot_setup(void)
66{ 52{
67 _machine_restart = mips_machine_restart; 53 _machine_restart = mips_machine_restart;
68 _machine_halt = mips_machine_halt; 54 _machine_halt = mips_machine_halt;
69#if defined(CONFIG_MIPS_ATLAS)
70 pm_power_off = atlas_machine_power_off;
71#endif
72#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_SEAD)
73 pm_power_off = mips_machine_halt; 55 pm_power_off = mips_machine_halt;
74#endif
75} 56}
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mti-malta/malta-setup.c
index e7cad54936ca..e7cad54936ca 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mti-malta/malta-smtc.c
index 5ea705e49454..5ea705e49454 100644
--- a/arch/mips/mips-boards/malta/malta_smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mti-malta/malta-time.c
index fe2cac1b4514..0b97d47691fc 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -42,15 +42,7 @@
42#include <asm/mips-boards/generic.h> 42#include <asm/mips-boards/generic.h>
43#include <asm/mips-boards/prom.h> 43#include <asm/mips-boards/prom.h>
44 44
45#ifdef CONFIG_MIPS_ATLAS
46#include <asm/mips-boards/atlasint.h>
47#endif
48#ifdef CONFIG_MIPS_MALTA
49#include <asm/mips-boards/maltaint.h> 45#include <asm/mips-boards/maltaint.h>
50#endif
51#ifdef CONFIG_MIPS_SEAD
52#include <asm/mips-boards/seadint.h>
53#endif
54 46
55unsigned long cpu_khz; 47unsigned long cpu_khz;
56 48
@@ -76,20 +68,6 @@ static unsigned int __init estimate_cpu_frequency(void)
76 unsigned int prid = read_c0_prid() & 0xffff00; 68 unsigned int prid = read_c0_prid() & 0xffff00;
77 unsigned int count; 69 unsigned int count;
78 70
79#if defined(CONFIG_MIPS_SEAD) || defined(CONFIG_MIPS_SIM)
80 /*
81 * The SEAD board doesn't have a real time clock, so we can't
82 * really calculate the timer frequency
83 * For now we hardwire the SEAD board frequency to 12MHz.
84 */
85
86 if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
87 (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
88 count = 12000000;
89 else
90 count = 6000000;
91#endif
92#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
93 unsigned long flags; 71 unsigned long flags;
94 unsigned int start; 72 unsigned int start;
95 73
@@ -110,7 +88,6 @@ static unsigned int __init estimate_cpu_frequency(void)
110 88
111 /* restore interrupts */ 89 /* restore interrupts */
112 local_irq_restore(flags); 90 local_irq_restore(flags);
113#endif
114 91
115 mips_hpt_frequency = count; 92 mips_hpt_frequency = count;
116 if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) && 93 if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
diff --git a/arch/mips/nxp/pnx8550/common/platform.c b/arch/mips/nxp/pnx8550/common/platform.c
index c7c763dbe588..21d2955359b3 100644
--- a/arch/mips/nxp/pnx8550/common/platform.c
+++ b/arch/mips/nxp/pnx8550/common/platform.c
@@ -13,6 +13,7 @@
13 * warranty of any kind, whether express or implied. 13 * warranty of any kind, whether express or implied.
14 */ 14 */
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/dma-mapping.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/resource.h> 19#include <linux/resource.h>
@@ -91,16 +92,16 @@ struct pnx8xxx_port pnx8xxx_ports[] = {
91}; 92};
92 93
93/* The dmamask must be set for OHCI to work */ 94/* The dmamask must be set for OHCI to work */
94static u64 ohci_dmamask = ~(u32)0; 95static u64 ohci_dmamask = DMA_32BIT_MASK;
95 96
96static u64 uart_dmamask = ~(u32)0; 97static u64 uart_dmamask = DMA_32BIT_MASK;
97 98
98static struct platform_device pnx8550_usb_ohci_device = { 99static struct platform_device pnx8550_usb_ohci_device = {
99 .name = "pnx8550-ohci", 100 .name = "pnx8550-ohci",
100 .id = -1, 101 .id = -1,
101 .dev = { 102 .dev = {
102 .dma_mask = &ohci_dmamask, 103 .dma_mask = &ohci_dmamask,
103 .coherent_dma_mask = 0xffffffff, 104 .coherent_dma_mask = DMA_32BIT_MASK,
104 }, 105 },
105 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources), 106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
106 .resource = pnx8550_usb_ohci_resources, 107 .resource = pnx8550_usb_ohci_resources,
@@ -111,7 +112,7 @@ static struct platform_device pnx8550_uart_device = {
111 .id = -1, 112 .id = -1,
112 .dev = { 113 .dev = {
113 .dma_mask = &uart_dmamask, 114 .dma_mask = &uart_dmamask,
114 .coherent_dma_mask = 0xffffffff, 115 .coherent_dma_mask = DMA_32BIT_MASK,
115 .platform_data = pnx8xxx_ports, 116 .platform_data = pnx8xxx_ports,
116 }, 117 },
117 .num_resources = ARRAY_SIZE(pnx8550_uart_resources), 118 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index b5f6f71b27bc..dd2fbd6645c1 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -27,7 +27,7 @@ static int op_mips_setup(void)
27 model->reg_setup(ctr); 27 model->reg_setup(ctr);
28 28
29 /* Configure the registers on all cpus. */ 29 /* Configure the registers on all cpus. */
30 on_each_cpu(model->cpu_setup, NULL, 0, 1); 30 on_each_cpu(model->cpu_setup, NULL, 1);
31 31
32 return 0; 32 return 0;
33} 33}
@@ -58,7 +58,7 @@ static int op_mips_create_files(struct super_block * sb, struct dentry * root)
58 58
59static int op_mips_start(void) 59static int op_mips_start(void)
60{ 60{
61 on_each_cpu(model->cpu_start, NULL, 0, 1); 61 on_each_cpu(model->cpu_start, NULL, 1);
62 62
63 return 0; 63 return 0;
64} 64}
@@ -66,7 +66,7 @@ static int op_mips_start(void)
66static void op_mips_stop(void) 66static void op_mips_stop(void)
67{ 67{
68 /* Disable performance monitoring for all counters. */ 68 /* Disable performance monitoring for all counters. */
69 on_each_cpu(model->cpu_stop, NULL, 0, 1); 69 on_each_cpu(model->cpu_stop, NULL, 1);
70} 70}
71 71
72int __init oprofile_arch_init(struct oprofile_operations *ops) 72int __init oprofile_arch_init(struct oprofile_operations *ops)
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index b40df7d2cf44..54759f1669d3 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -313,7 +313,7 @@ static int __init mipsxx_init(void)
313 if (!cpu_has_mipsmt_pertccounters) 313 if (!cpu_has_mipsmt_pertccounters)
314 counters = counters_total_to_per_cpu(counters); 314 counters = counters_total_to_per_cpu(counters);
315#endif 315#endif
316 on_each_cpu(reset_counters, (void *)(long)counters, 0, 1); 316 on_each_cpu(reset_counters, (void *)(long)counters, 1);
317 317
318 op_model_mipsxx_ops.num_counters = counters; 318 op_model_mipsxx_ops.num_counters = counters;
319 switch (current_cpu_type()) { 319 switch (current_cpu_type()) {
@@ -382,7 +382,7 @@ static void mipsxx_exit(void)
382 int counters = op_model_mipsxx_ops.num_counters; 382 int counters = op_model_mipsxx_ops.num_counters;
383 383
384 counters = counters_per_cpu_to_total(counters); 384 counters = counters_per_cpu_to_total(counters);
385 on_each_cpu(reset_counters, (void *)(long)counters, 0, 1); 385 on_each_cpu(reset_counters, (void *)(long)counters, 1);
386 386
387 perf_irq = save_perf_irq; 387 perf_irq = save_perf_irq;
388} 388}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index ed0c07622baa..57e34cafa497 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -11,17 +11,16 @@ obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o 11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
12obj-$(CONFIG_MIPS_MSC) += ops-msc.o 12obj-$(CONFIG_MIPS_MSC) += ops-msc.o
13obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o 13obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
14obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o 14obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
15obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o 15obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
16obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
17obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o 16obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
17obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
18 18
19# 19#
20# These are still pretty much in the old state, watch, go blind. 20# These are still pretty much in the old state, watch, go blind.
21# 21#
22obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o 22obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
23obj-$(CONFIG_LASAT) += pci-lasat.o 23obj-$(CONFIG_LASAT) += pci-lasat.o
24obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
25obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o 24obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
26obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 25obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
27obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o 26obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
@@ -42,9 +41,11 @@ obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o
42obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o 41obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
43obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o 42obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
44obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o 43obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
45obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o 44obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o
46obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o 45obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
47obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o 46obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
47obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
48obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o
48obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o 49obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
49obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o 50obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
50obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o 51obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
deleted file mode 100644
index 506e883a8c71..000000000000
--- a/arch/mips/pci/fixup-atlas.c
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
3 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
4 * Author: Maciej W. Rozycki <macro@mips.com>
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
19#include <linux/init.h>
20#include <linux/pci.h>
21
22#include <asm/mips-boards/atlasint.h>
23
24#define PCIA ATLAS_INT_PCIA
25#define PCIB ATLAS_INT_PCIB
26#define PCIC ATLAS_INT_PCIC
27#define PCID ATLAS_INT_PCID
28#define INTA ATLAS_INT_INTA
29#define INTB ATLAS_INT_INTB
30#define ETH ATLAS_INT_ETH
31#define INTC ATLAS_INT_INTC
32#define SCSI ATLAS_INT_SCSI
33#define INTD ATLAS_INT_INTD
34
35static char irq_tab[][5] __initdata = {
36 /* INTA INTB INTC INTD */
37 {0, 0, 0, 0, 0 }, /* 0: Unused */
38 {0, 0, 0, 0, 0 }, /* 1: Unused */
39 {0, 0, 0, 0, 0 }, /* 2: Unused */
40 {0, 0, 0, 0, 0 }, /* 3: Unused */
41 {0, 0, 0, 0, 0 }, /* 4: Unused */
42 {0, 0, 0, 0, 0 }, /* 5: Unused */
43 {0, 0, 0, 0, 0 }, /* 6: Unused */
44 {0, 0, 0, 0, 0 }, /* 7: Unused */
45 {0, 0, 0, 0, 0 }, /* 8: Unused */
46 {0, 0, 0, 0, 0 }, /* 9: Unused */
47 {0, 0, 0, 0, 0 }, /* 10: Unused */
48 {0, 0, 0, 0, 0 }, /* 11: Unused */
49 {0, 0, 0, 0, 0 }, /* 12: Unused */
50 {0, 0, 0, 0, 0 }, /* 13: Unused */
51 {0, 0, 0, 0, 0 }, /* 14: Unused */
52 {0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
53 {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
54 {0, 0, 0, 0, 0 }, /* 17: Core */
55 {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
56 {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
57 {0, 0, 0, 0, 0 }, /* 20: Unused */
58 {0, 0, 0, 0, 0 } /* 21: Unused */
59};
60
61int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
62{
63 return irq_tab[slot][pin];
64}
65
66/* Do platform specific device initialization at pci_enable_device() time */
67int pcibios_plat_dev_init(struct pci_dev *dev)
68{
69 return 0;
70}
71
72#ifdef CONFIG_KGDB
73/*
74 * The PCI scan may have moved the saa9730 I/O address, so reread
75 * the address here.
76 * This does mean that it's not possible to debug the PCI bus configuration
77 * code, but it is better than nothing...
78 */
79
80static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
81{
82 extern void *saa9730_base;
83 if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
84 (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
85 printk("saa9730_base = %x\n", saa9730_base);
86}
87
88DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
89 atlas_saa9730_base_fixup);
90
91#endif
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c
index e974394be7bc..0f1069527cba 100644
--- a/arch/mips/pci/fixup-jmr3927.c
+++ b/arch/mips/pci/fixup-jmr3927.c
@@ -28,36 +28,31 @@
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/types.h> 30#include <linux/types.h>
31#include <linux/pci.h> 31#include <asm/txx9/pci.h>
32#include <linux/init.h> 32#include <asm/txx9/jmr3927.h>
33 33
34#include <asm/jmr3927/jmr3927.h> 34int __init jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
35
36int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
37{ 35{
38 unsigned char irq = pin; 36 unsigned char irq = pin;
39 37
40 /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
41 if (dev->vendor == PCI_VENDOR_ID_EFAR &&
42 dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
43 return irq;
44 /* IRQ rotation (PICMG) */ 38 /* IRQ rotation (PICMG) */
45 irq--; /* 0-3 */ 39 irq--; /* 0-3 */
46 if (dev->bus->parent == NULL && 40 if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
47 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
48 /* PCI CardSlot (IDSEL=A23, DevNu=12) */ 41 /* PCI CardSlot (IDSEL=A23, DevNu=12) */
49 /* PCIA => PCIC (IDSEL=A23) */ 42 /* PCIA => PCIC (IDSEL=A23) */
50 /* NOTE: JMR3927 JP1 must be set to OPEN */ 43 /* NOTE: JMR3927 JP1 must be set to OPEN */
51 irq = (irq + 2) % 4; 44 irq = (irq + 2) % 4;
52 } else if (dev->bus->parent == NULL && 45 } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
53 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
54 /* PCI CardSlot (IDSEL=A22, DevNu=11) */ 46 /* PCI CardSlot (IDSEL=A22, DevNu=11) */
55 /* PCIA => PCIA (IDSEL=A22) */ 47 /* PCIA => PCIA (IDSEL=A22) */
56 /* NOTE: JMR3927 JP1 must be set to OPEN */ 48 /* NOTE: JMR3927 JP1 must be set to OPEN */
57 irq = (irq + 0) % 4; 49 irq = (irq + 0) % 4;
58 } else { 50 } else {
59 /* PCI Backplane */ 51 /* PCI Backplane */
60 irq = (irq + 3 + slot) % 4; 52 if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
53 irq = (irq + 33 - slot) % 4;
54 else
55 irq = (irq + 3 + slot) % 4;
61 } 56 }
62 irq++; /* 1-4 */ 57 irq++; /* 1-4 */
63 58
@@ -66,15 +61,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
66 irq = JMR3927_IRQ_IOC_PCIA; 61 irq = JMR3927_IRQ_IOC_PCIA;
67 break; 62 break;
68 case 2: 63 case 2:
69 // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB; 64 irq = JMR3927_IRQ_IOC_PCIB;
70 irq = JMR3927_IRQ_IOC_PCID;
71 break; 65 break;
72 case 3: 66 case 3:
73 irq = JMR3927_IRQ_IOC_PCIC; 67 irq = JMR3927_IRQ_IOC_PCIC;
74 break; 68 break;
75 case 4: 69 case 4:
76 // wrong for backplane irq = JMR3927_IRQ_IOC_PCID; 70 irq = JMR3927_IRQ_IOC_PCID;
77 irq = JMR3927_IRQ_IOC_PCIB;
78 break; 71 break;
79 } 72 }
80 73
@@ -84,9 +77,3 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
84 irq = JMR3927_IRQ_ETHER0; 77 irq = JMR3927_IRQ_ETHER0;
85 return irq; 78 return irq;
86} 79}
87
88/* Do platform specific device initialization at pci_enable_device() time */
89int pcibios_plat_dev_init(struct pci_dev *dev)
90{
91 return 0;
92}
diff --git a/arch/mips/pci/fixup-rbtx4927.c b/arch/mips/pci/fixup-rbtx4927.c
index 7450c335b387..321db265829c 100644
--- a/arch/mips/pci/fixup-rbtx4927.c
+++ b/arch/mips/pci/fixup-rbtx4927.c
@@ -33,108 +33,41 @@
33 * 675 Mass Ave, Cambridge, MA 02139, USA. 33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */ 34 */
35#include <linux/types.h> 35#include <linux/types.h>
36#include <linux/pci.h> 36#include <asm/txx9/pci.h>
37#include <linux/kernel.h> 37#include <asm/txx9/rbtx4927.h>
38#include <linux/init.h>
39 38
40#include <asm/tx4927/tx4927.h> 39int __init rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
41#include <asm/tx4927/tx4927_pci.h>
42
43#undef DEBUG
44#ifdef DEBUG
45#define DBG(x...) printk(x)
46#else
47#define DBG(x...)
48#endif
49
50/* look up table for backplane pci irq for slots 17-20 by pin # */
51static unsigned char backplane_pci_irq[4][4] = {
52 /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
53 /* PJ6 SLOT: 17, PIN: 2 */
54 TX4927_IRQ_IOC_PCIB,
55 /* PJ6 SLOT: 17, PIN: 3 */
56 TX4927_IRQ_IOC_PCIC,
57 /* PJ6 SLOT: 17, PIN: 4 */
58 TX4927_IRQ_IOC_PCID},
59 /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
60 /* SB SLOT: 18, PIN: 2 */
61 TX4927_IRQ_IOC_PCIC,
62 /* SB SLOT: 18, PIN: 3 */
63 TX4927_IRQ_IOC_PCID,
64 /* SB SLOT: 18, PIN: 4 */
65 TX4927_IRQ_IOC_PCIA},
66 /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
67 /* PJ5 SLOT: 19, PIN: 2 */
68 TX4927_IRQ_IOC_PCID,
69 /* PJ5 SLOT: 19, PIN: 3 */
70 TX4927_IRQ_IOC_PCIA,
71 /* PJ5 SLOT: 19, PIN: 4 */
72 TX4927_IRQ_IOC_PCIB},
73 /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
74 /* PJ4 SLOT: 20, PIN: 2 */
75 TX4927_IRQ_IOC_PCIA,
76 /* PJ4 SLOT: 20, PIN: 3 */
77 TX4927_IRQ_IOC_PCIB,
78 /* PJ4 SLOT: 20, PIN: 4 */
79 TX4927_IRQ_IOC_PCIC}
80};
81
82static int pci_get_irq(const struct pci_dev *dev, int pin)
83{ 40{
84 unsigned char irq = pin; 41 unsigned char irq = pin;
85 42
86 DBG("pci_get_irq: pin is %d\n", pin);
87 /* IRQ rotation */ 43 /* IRQ rotation */
88 irq--; /* 0-3 */ 44 irq--; /* 0-3 */
89 if (dev->bus->parent == NULL && 45 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
90 PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) { 46 /* PCI CardSlot (IDSEL=A23) */
91 printk("Onboard PCI_SLOT(dev->devfn) is %d\n", 47 /* PCIA => PCIA */
92 PCI_SLOT(dev->devfn)); 48 irq = (irq + 0 + slot) % 4;
93 /* IDSEL=A23 is tx4927 onboard pci slot */
94 irq = (irq + PCI_SLOT(dev->devfn)) % 4;
95 irq++; /* 1-4 */
96 DBG("irq is now %d\n", irq);
97
98 switch (irq) {
99 case 1:
100 irq = TX4927_IRQ_IOC_PCIA;
101 break;
102 case 2:
103 irq = TX4927_IRQ_IOC_PCIB;
104 break;
105 case 3:
106 irq = TX4927_IRQ_IOC_PCIC;
107 break;
108 case 4:
109 irq = TX4927_IRQ_IOC_PCID;
110 break;
111 }
112 } else { 49 } else {
113 /* PCI Backplane */ 50 /* PCI Backplane */
114 DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n", 51 if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
115 PCI_SLOT(dev->devfn)); 52 irq = (irq + 33 - slot) % 4;
116 irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq]; 53 else
54 irq = (irq + 3 + slot) % 4;
117 } 55 }
118 DBG("assigned irq %d\n", irq); 56 irq++; /* 1-4 */
119 return irq;
120}
121
122int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
123{
124 unsigned char irq;
125
126 printk("PCI Setup for pin %d \n", pin);
127
128 if (dev->device == 0x9130) /* IDE */
129 irq = 14;
130 else
131 irq = pci_get_irq(dev, pin);
132 57
58 switch (irq) {
59 case 1:
60 irq = RBTX4927_IRQ_IOC_PCIA;
61 break;
62 case 2:
63 irq = RBTX4927_IRQ_IOC_PCIB;
64 break;
65 case 3:
66 irq = RBTX4927_IRQ_IOC_PCIC;
67 break;
68 case 4:
69 irq = RBTX4927_IRQ_IOC_PCID;
70 break;
71 }
133 return irq; 72 return irq;
134} 73}
135
136/* Do platform specific device initialization at pci_enable_device() time */
137int pcibios_plat_dev_init(struct pci_dev *dev)
138{
139 return 0;
140}
diff --git a/arch/mips/pci/fixup-rbtx4938.c b/arch/mips/pci/fixup-rbtx4938.c
new file mode 100644
index 000000000000..a80579af609b
--- /dev/null
+++ b/arch/mips/pci/fixup-rbtx4938.c
@@ -0,0 +1,53 @@
1/*
2 * Toshiba rbtx4938 pci routines
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/types.h>
13#include <asm/txx9/pci.h>
14#include <asm/txx9/rbtx4938.h>
15
16int __init rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
17{
18 int irq = tx4938_pcic1_map_irq(dev, slot);
19
20 if (irq >= 0)
21 return irq;
22 irq = pin;
23 /* IRQ rotation */
24 irq--; /* 0-3 */
25 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
26 /* PCI CardSlot (IDSEL=A23) */
27 /* PCIA => PCIA (IDSEL=A23) */
28 irq = (irq + 0 + slot) % 4;
29 } else {
30 /* PCI Backplane */
31 if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
32 irq = (irq + 33 - slot) % 4;
33 else
34 irq = (irq + 3 + slot) % 4;
35 }
36 irq++; /* 1-4 */
37
38 switch (irq) {
39 case 1:
40 irq = RBTX4938_IRQ_IOC_PCIA;
41 break;
42 case 2:
43 irq = RBTX4938_IRQ_IOC_PCIB;
44 break;
45 case 3:
46 irq = RBTX4938_IRQ_IOC_PCIC;
47 break;
48 case 4:
49 irq = RBTX4938_IRQ_IOC_PCID;
50 break;
51 }
52 return irq;
53}
diff --git a/arch/mips/pci/fixup-tx4938.c b/arch/mips/pci/fixup-tx4938.c
deleted file mode 100644
index f2ba06ee0c10..000000000000
--- a/arch/mips/pci/fixup-tx4938.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * Toshiba rbtx4938 pci routines
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16
17#include <asm/tx4938/rbtx4938.h>
18
19extern struct pci_controller tx4938_pci_controller[];
20
21static int pci_get_irq(const struct pci_dev *dev, int pin)
22{
23 int irq = pin;
24 u8 slot = PCI_SLOT(dev->devfn);
25 struct pci_controller *controller = (struct pci_controller *)dev->sysdata;
26
27 if (controller == &tx4938_pci_controller[1]) {
28 /* TX4938 PCIC1 */
29 switch (slot) {
30 case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):
31 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH0_SEL)
32 return RBTX4938_IRQ_IRC + TX4938_IR_ETH0;
33 break;
34 case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):
35 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH1_SEL)
36 return RBTX4938_IRQ_IRC + TX4938_IR_ETH1;
37 break;
38 }
39 return 0;
40 }
41
42 /* IRQ rotation */
43 irq--; /* 0-3 */
44 if (dev->bus->parent == NULL &&
45 (slot == TX4938_PCIC_IDSEL_AD_TO_SLOT(23))) {
46 /* PCI CardSlot (IDSEL=A23) */
47 /* PCIA => PCIA (IDSEL=A23) */
48 irq = (irq + 0 + slot) % 4;
49 } else {
50 /* PCI Backplane */
51 irq = (irq + 33 - slot) % 4;
52 }
53 irq++; /* 1-4 */
54
55 switch (irq) {
56 case 1:
57 irq = RBTX4938_IRQ_IOC_PCIA;
58 break;
59 case 2:
60 irq = RBTX4938_IRQ_IOC_PCIB;
61 break;
62 case 3:
63 irq = RBTX4938_IRQ_IOC_PCIC;
64 break;
65 case 4:
66 irq = RBTX4938_IRQ_IOC_PCID;
67 break;
68 }
69 return irq;
70}
71
72int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
73{
74 unsigned char irq = 0;
75
76 irq = pci_get_irq(dev, pin);
77
78 printk(KERN_INFO "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
79 dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
80 PCI_FUNC(dev->devfn), irq);
81
82 return irq;
83}
84
85/*
86 * Do platform specific device initialization at pci_enable_device() time
87 */
88int pcibios_plat_dev_init(struct pci_dev *dev)
89{
90 return 0;
91}
92
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
deleted file mode 100644
index de5e5f6bbf4c..000000000000
--- a/arch/mips/pci/fixup-vr4133.c
+++ /dev/null
@@ -1,195 +0,0 @@
1/*
2 * arch/mips/pci/fixup-vr4133.c
3 *
4 * The NEC CMB-VR4133 Board specific PCI fixups.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
8 *
9 * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * Modified for support in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 *
17 */
18#include <linux/init.h>
19#include <linux/pci.h>
20#include <linux/kernel.h>
21
22#include <asm/io.h>
23#include <asm/i8259.h>
24#include <asm/vr41xx/cmbvr4133.h>
25
26extern int vr4133_rockhopper;
27extern void ali_m1535plus_init(struct pci_dev *dev);
28extern void ali_m5229_init(struct pci_dev *dev);
29
30/* Do platform specific device initialization at pci_enable_device() time */
31int pcibios_plat_dev_init(struct pci_dev *dev)
32{
33 /*
34 * We have to reset AMD PCnet adapter on Rockhopper since
35 * PMON leaves it enabled and generating interrupts. This leads
36 * to a lock if some PCI device driver later enables the IRQ line
37 * shared with PCnet and there is no AMD PCnet driver to catch its
38 * interrupts.
39 */
40#ifdef CONFIG_ROCKHOPPER
41 if (dev->vendor == PCI_VENDOR_ID_AMD &&
42 dev->device == PCI_DEVICE_ID_AMD_LANCE) {
43 inl(pci_resource_start(dev, 0) + 0x18);
44 }
45#endif
46
47 /*
48 * we have to open the bridges' windows down to 0 because otherwise
49 * we cannot access ISA south bridge I/O registers that get mapped from
50 * 0. for example, 8259 PIC would be unaccessible without that
51 */
52 if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
53 pci_write_config_byte(dev, PCI_IO_BASE, 0);
54 if(dev->bus->number == 0) {
55 pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
56 } else {
57 pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1);
58 }
59 }
60
61 return 0;
62}
63
64/*
65 * M1535 IRQ mapping
66 * Feel free to change this, although it shouldn't be needed
67 */
68#define M1535_IRQ_INTA 7
69#define M1535_IRQ_INTB 9
70#define M1535_IRQ_INTC 10
71#define M1535_IRQ_INTD 11
72
73#define M1535_IRQ_USB 9
74#define M1535_IRQ_IDE 14
75#define M1535_IRQ_IDE2 15
76#define M1535_IRQ_PS2 12
77#define M1535_IRQ_RTC 8
78#define M1535_IRQ_FDC 6
79#define M1535_IRQ_AUDIO 5
80#define M1535_IRQ_COM1 4
81#define M1535_IRQ_COM2 4
82#define M1535_IRQ_IRDA 3
83#define M1535_IRQ_KBD 1
84#define M1535_IRQ_TMR 0
85
86/* Rockhopper "slots" assignment; this is hard-coded ... */
87#define ROCKHOPPER_M5451_SLOT 1
88#define ROCKHOPPER_M1535_SLOT 2
89#define ROCKHOPPER_M5229_SLOT 11
90#define ROCKHOPPER_M5237_SLOT 15
91#define ROCKHOPPER_PMU_SLOT 12
92/* ... and hard-wired. */
93#define ROCKHOPPER_PCI1_SLOT 3
94#define ROCKHOPPER_PCI2_SLOT 4
95#define ROCKHOPPER_PCI3_SLOT 5
96#define ROCKHOPPER_PCI4_SLOT 6
97#define ROCKHOPPER_PCNET_SLOT 1
98
99#define M1535_IRQ_MASK(n) (1 << (n))
100
101#define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
102 M1535_IRQ_MASK(M1535_IRQ_KBD) | \
103 M1535_IRQ_MASK(M1535_IRQ_COM1) | \
104 M1535_IRQ_MASK(M1535_IRQ_COM2) | \
105 M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
106 M1535_IRQ_MASK(M1535_IRQ_RTC) | \
107 M1535_IRQ_MASK(M1535_IRQ_FDC) | \
108 M1535_IRQ_MASK(M1535_IRQ_PS2))
109
110#define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
111 M1535_IRQ_MASK(M1535_IRQ_USB) | \
112 M1535_IRQ_MASK(M1535_IRQ_INTA) | \
113 M1535_IRQ_MASK(M1535_IRQ_INTB) | \
114 M1535_IRQ_MASK(M1535_IRQ_INTC) | \
115 M1535_IRQ_MASK(M1535_IRQ_INTD))
116
117struct irq_map_entry {
118 u16 bus;
119 u8 slot;
120 u8 irq;
121};
122static struct irq_map_entry int_map[] = {
123 {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */
124 {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */
125 {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
126 {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
127 {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
128 {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
129 ethernet */
130 {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
131 {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
132};
133
134static int pci_intlines[] =
135 { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD };
136
137/* Determine the Rockhopper IRQ line number for the PCI device */
138int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot)
139{
140 struct pci_bus *bus;
141 int i;
142
143 bus = dev->bus;
144 if (bus == NULL)
145 return -1;
146
147 for (i = 0; i < ARRAY_SIZE(int_map); i++) {
148 if (int_map[i].bus == bus->number && int_map[i].slot == slot) {
149 int line;
150 for (line = 0; line < 4; line++)
151 if (pci_intlines[line] == int_map[i].irq)
152 break;
153 if (line < 4)
154 return pci_intlines[(line + (pin - 1)) % 4];
155 else
156 return int_map[i].irq;
157 }
158 }
159 return -1;
160}
161
162#ifdef CONFIG_ROCKHOPPER
163void i8259_init(void)
164{
165 init_i8259_irqs();
166
167 outb(0x00, 0x4d0);
168 outb(0x02, 0x4d1); /* USB IRQ9 is level */
169}
170#endif
171
172int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
173{
174 extern int pci_probe_only;
175 pci_probe_only = 1;
176
177#ifdef CONFIG_ROCKHOPPER
178 if( dev->bus->number == 1 && vr4133_rockhopper ) {
179 if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT)
180 dev->irq = CMBVR41XX_INTA_IRQ;
181 else
182 dev->irq = rockhopper_get_irq(dev, pin, slot);
183 } else
184 dev->irq = CMBVR41XX_INTA_IRQ;
185#else
186 dev->irq = CMBVR41XX_INTA_IRQ;
187#endif
188
189 return dev->irq;
190}
191
192DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init);
193DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init);
194
195
diff --git a/arch/mips/pci/ops-mace.c b/arch/mips/pci/ops-mace.c
index e95881897ec9..1cfb5588699f 100644
--- a/arch/mips/pci/ops-mace.c
+++ b/arch/mips/pci/ops-mace.c
@@ -61,6 +61,13 @@ mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
61 /* ack possible master abort */ 61 /* ack possible master abort */
62 mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT; 62 mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT;
63 mace->pci.control = control; 63 mace->pci.control = control;
64 /*
65 * someone forgot to set the ultra bit for the onboard
66 * scsi chips; we fake it here
67 */
68 if (bus->number == 0 && reg == 0x40 && size == 4 &&
69 (devfn == (1 << 3) || devfn == (2 << 3)))
70 *val |= 0x1000;
64 71
65 DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val); 72 DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
66 73
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c
index aa698bd0d5e3..8a17a39e5bf2 100644
--- a/arch/mips/pci/ops-tx3927.c
+++ b/arch/mips/pci/ops-tx3927.c
@@ -8,7 +8,7 @@
8 * 8 *
9 * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c 9 * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
10 * 10 *
11 * Define the pci_ops for JMR3927. 11 * Define the pci_ops for TX3927.
12 * 12 *
13 * Much of the code is derived from the original DDB5074 port by 13 * Much of the code is derived from the original DDB5074 port by
14 * Geert Uytterhoeven <geert@sonycom.com> 14 * Geert Uytterhoeven <geert@sonycom.com>
@@ -39,7 +39,7 @@
39#include <linux/init.h> 39#include <linux/init.h>
40 40
41#include <asm/addrspace.h> 41#include <asm/addrspace.h>
42#include <asm/jmr3927/jmr3927.h> 42#include <asm/txx9/tx3927.h>
43 43
44static inline int mkaddr(unsigned char bus, unsigned char dev_fn, 44static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
45 unsigned char where) 45 unsigned char where)
@@ -68,7 +68,7 @@ static inline int check_abort(void)
68 return PCIBIOS_SUCCESSFUL; 68 return PCIBIOS_SUCCESSFUL;
69} 69}
70 70
71static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn, 71static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
72 int where, int size, u32 * val) 72 int where, int size, u32 * val)
73{ 73{
74 int ret; 74 int ret;
@@ -94,7 +94,7 @@ static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
94 return check_abort(); 94 return check_abort();
95} 95}
96 96
97static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn, 97static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
98 int where, int size, u32 val) 98 int where, int size, u32 val)
99{ 99{
100 int ret; 100 int ret;
@@ -125,7 +125,80 @@ static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
125 return check_abort(); 125 return check_abort();
126} 126}
127 127
128struct pci_ops jmr3927_pci_ops = { 128static struct pci_ops tx3927_pci_ops = {
129 jmr3927_pci_read_config, 129 .read = tx3927_pci_read_config,
130 jmr3927_pci_write_config, 130 .write = tx3927_pci_write_config,
131}; 131};
132
133void __init tx3927_pcic_setup(struct pci_controller *channel,
134 unsigned long sdram_size, int extarb)
135{
136 unsigned long flags;
137 unsigned long io_base =
138 channel->io_resource->start + mips_io_port_base - IO_BASE;
139 unsigned long io_size =
140 channel->io_resource->end - channel->io_resource->start;
141 unsigned long io_pciaddr =
142 channel->io_resource->start - channel->io_offset;
143 unsigned long mem_base =
144 channel->mem_resource->start;
145 unsigned long mem_size =
146 channel->mem_resource->end - channel->mem_resource->start;
147 unsigned long mem_pciaddr =
148 channel->mem_resource->start - channel->mem_offset;
149
150 printk(KERN_INFO "TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s",
151 tx3927_pcicptr->did, tx3927_pcicptr->vid,
152 tx3927_pcicptr->rid,
153 extarb ? "External" : "Internal");
154 channel->pci_ops = &tx3927_pci_ops;
155
156 local_irq_save(flags);
157 /* Disable External PCI Config. Access */
158 tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
159#ifdef __BIG_ENDIAN
160 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
161 TX3927_PCIC_LBC_TIBSE |
162 TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
163#endif
164 /* LB->PCI mappings */
165 tx3927_pcicptr->iomas = ~(io_size - 1);
166 tx3927_pcicptr->ilbioma = io_base;
167 tx3927_pcicptr->ipbioma = io_pciaddr;
168 tx3927_pcicptr->mmas = ~(mem_size - 1);
169 tx3927_pcicptr->ilbmma = mem_base;
170 tx3927_pcicptr->ipbmma = mem_pciaddr;
171 /* PCI->LB mappings */
172 tx3927_pcicptr->iobas = 0xffffffff;
173 tx3927_pcicptr->ioba = 0;
174 tx3927_pcicptr->tlbioma = 0;
175 tx3927_pcicptr->mbas = ~(sdram_size - 1);
176 tx3927_pcicptr->mba = 0;
177 tx3927_pcicptr->tlbmma = 0;
178 /* Enable Direct mapping Address Space Decoder */
179 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
180
181 /* Clear All Local Bus Status */
182 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
183 /* Enable All Local Bus Interrupts */
184 tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
185 /* Clear All PCI Status Error */
186 tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
187 /* Enable All PCI Status Error Interrupts */
188 tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
189
190 /* PCIC Int => IRC IRQ10 */
191 tx3927_pcicptr->il = TX3927_IR_PCI;
192 /* Target Control (per errata) */
193 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
194
195 /* Enable Bus Arbiter */
196 if (!extarb)
197 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
198
199 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
200 PCI_COMMAND_MEMORY |
201 PCI_COMMAND_IO |
202 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
203 local_irq_restore(flags);
204}
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 150419c8b414..c6b49bccd274 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -1,209 +1,408 @@
1/* 1/*
2 * Copyright 2001 MontaVista Software Inc. 2 * Define the pci_ops for the PCIC on Toshiba TX4927, TX4938, etc.
3 * Author: MontaVista Software, Inc.
4 * ahennessy@mvista.com
5 * 3 *
6 * Copyright (C) 2000-2001 Toshiba Corporation 4 * Based on linux/arch/mips/pci/ops-tx4938.c,
7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 5 * linux/arch/mips/pci/fixup-rbtx4938.c,
8 * 6 * linux/arch/mips/txx9/rbtx4938/setup.c,
9 * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c 7 * and RBTX49xx patch from CELF patch archive.
10 *
11 * Define the pci_ops for the Toshiba rbtx4927
12 *
13 * Much of the code is derived from the original DDB5074 port by
14 * Geert Uytterhoeven <geert@sonycom.com>
15 *
16 * Copyright 2004 MontaVista Software Inc.
17 * Author: Manish Lachwani (mlachwani@mvista.com)
18 *
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
23 * 8 *
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 9 * 2003-2005 (c) MontaVista Software, Inc.
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 10 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 11 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
30 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
31 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 * 12 *
35 * You should have received a copy of the GNU General Public License along 13 * This program is free software; you can redistribute it and/or modify it
36 * with this program; if not, write to the Free Software Foundation, Inc., 14 * under the terms of the GNU General Public License as published by the
37 * 675 Mass Ave, Cambridge, MA 02139, USA. 15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
38 */ 17 */
39#include <linux/types.h>
40#include <linux/pci.h>
41#include <linux/kernel.h> 18#include <linux/kernel.h>
42#include <linux/init.h> 19#include <asm/txx9/tx4927pcic.h>
43
44#include <asm/addrspace.h>
45#include <asm/byteorder.h>
46#include <asm/tx4927/tx4927_pci.h>
47
48/* initialize in setup */
49struct resource pci_io_resource = {
50 .name = "TX4927 PCI IO SPACE",
51 .start = 0x1000,
52 .end = (0x1000 + (TX4927_PCIIO_SIZE)) - 1,
53 .flags = IORESOURCE_IO
54};
55 20
56/* initialize in setup */ 21static struct {
57struct resource pci_mem_resource = { 22 struct pci_controller *channel;
58 .name = "TX4927 PCI MEM SPACE", 23 struct tx4927_pcic_reg __iomem *pcicptr;
59 .start = TX4927_PCIMEM, 24} pcicptrs[2]; /* TX4938 has 2 pcic */
60 .end = TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1, 25
61 .flags = IORESOURCE_MEM 26static void __init set_tx4927_pcicptr(struct pci_controller *channel,
62}; 27 struct tx4927_pcic_reg __iomem *pcicptr)
28{
29 int i;
30
31 for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
32 if (pcicptrs[i].channel == channel) {
33 pcicptrs[i].pcicptr = pcicptr;
34 return;
35 }
36 }
37 for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
38 if (!pcicptrs[i].channel) {
39 pcicptrs[i].channel = channel;
40 pcicptrs[i].pcicptr = pcicptr;
41 return;
42 }
43 }
44 BUG();
45}
63 46
64static int mkaddr(int bus, int dev_fn, int where, int *flagsp) 47struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
48 struct pci_controller *channel)
65{ 49{
66 if (bus > 0) { 50 int i;
67 /* Type 1 configuration */
68 tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
69 ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
70 } else {
71 if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
72 return -1;
73 51
74 /* Type 0 configuration */ 52 for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
75 tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) | 53 if (pcicptrs[i].channel == channel)
76 ((dev_fn & 0xff) << 0x08) | (where & 0xfc); 54 return pcicptrs[i].pcicptr;
77 } 55 }
56 return NULL;
57}
58
59static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where,
60 struct tx4927_pcic_reg __iomem *pcicptr)
61{
62 if (bus->parent == NULL &&
63 devfn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
64 return -1;
65 __raw_writel(((bus->number & 0xff) << 0x10)
66 | ((devfn & 0xff) << 0x08) | (where & 0xfc)
67 | (bus->parent ? 1 : 0),
68 &pcicptr->g2pcfgadrs);
78 /* clear M_ABORT and Disable M_ABORT Int. */ 69 /* clear M_ABORT and Disable M_ABORT Int. */
79 tx4927_pcicptr->pcistatus = 70 __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
80 (tx4927_pcicptr->pcistatus & 0x0000ffff) | 71 | (PCI_STATUS_REC_MASTER_ABORT << 16),
81 (PCI_STATUS_REC_MASTER_ABORT << 16); 72 &pcicptr->pcistatus);
82 tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
83 return 0; 73 return 0;
84} 74}
85 75
86static int check_abort(int flags) 76static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr)
87{ 77{
88 int code = PCIBIOS_SUCCESSFUL; 78 int code = PCIBIOS_SUCCESSFUL;
89 if (tx4927_pcicptr-> 79
90 pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) { 80 /* wait write cycle completion before checking error status */
91 tx4927_pcicptr->pcistatus = 81 while (__raw_readl(&pcicptr->pcicstatus) & TX4927_PCIC_PCICSTATUS_IWB)
92 (tx4927_pcicptr-> 82 ;
93 pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT 83 if (__raw_readl(&pcicptr->pcistatus)
94 << 16); 84 & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
95 tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT; 85 __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
86 | (PCI_STATUS_REC_MASTER_ABORT << 16),
87 &pcicptr->pcistatus);
96 code = PCIBIOS_DEVICE_NOT_FOUND; 88 code = PCIBIOS_DEVICE_NOT_FOUND;
97 } 89 }
98 return code; 90 return code;
99} 91}
100 92
101static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where, 93static u8 icd_readb(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
102 int size, u32 * val) 94{
95#ifdef __BIG_ENDIAN
96 offset ^= 3;
97#endif
98 return __raw_readb((void __iomem *)&pcicptr->g2pcfgdata + offset);
99}
100static u16 icd_readw(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
101{
102#ifdef __BIG_ENDIAN
103 offset ^= 2;
104#endif
105 return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset);
106}
107static u32 icd_readl(struct tx4927_pcic_reg __iomem *pcicptr)
108{
109 return __raw_readl(&pcicptr->g2pcfgdata);
110}
111static void icd_writeb(u8 val, int offset,
112 struct tx4927_pcic_reg __iomem *pcicptr)
113{
114#ifdef __BIG_ENDIAN
115 offset ^= 3;
116#endif
117 __raw_writeb(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
118}
119static void icd_writew(u16 val, int offset,
120 struct tx4927_pcic_reg __iomem *pcicptr)
121{
122#ifdef __BIG_ENDIAN
123 offset ^= 2;
124#endif
125 __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
126}
127static void icd_writel(u32 val, struct tx4927_pcic_reg __iomem *pcicptr)
103{ 128{
104 int flags, retval, dev, busno, func; 129 __raw_writel(val, &pcicptr->g2pcfgdata);
130}
105 131
106 busno = bus->number; 132static struct tx4927_pcic_reg __iomem *pci_bus_to_pcicptr(struct pci_bus *bus)
107 dev = PCI_SLOT(devfn); 133{
108 func = PCI_FUNC(devfn); 134 struct pci_controller *channel = bus->sysdata;
135 return get_tx4927_pcicptr(channel);
136}
109 137
110 /* check if the bus is top-level */ 138static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn,
111 if (bus->parent != NULL) { 139 int where, int size, u32 *val)
112 busno = bus->number; 140{
113 } else { 141 struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
114 busno = 0;
115 }
116 142
117 if (mkaddr(busno, devfn, where, &flags)) 143 if (mkaddr(bus, devfn, where, pcicptr)) {
144 *val = 0xffffffff;
118 return -1; 145 return -1;
119 146 }
120 switch (size) { 147 switch (size) {
121 case 1: 148 case 1:
122 *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr-> 149 *val = icd_readb(where & 3, pcicptr);
123 g2pcfgdata |
124#ifdef __LITTLE_ENDIAN
125 (where & 3));
126#else
127 ((where & 0x3) ^ 0x3));
128#endif
129 break; 150 break;
130 case 2: 151 case 2:
131 *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr-> 152 *val = icd_readw(where & 3, pcicptr);
132 g2pcfgdata |
133#ifdef __LITTLE_ENDIAN
134 (where & 3));
135#else
136 ((where & 0x3) ^ 0x2));
137#endif
138 break;
139 case 4:
140 *val = tx4927_pcicptr->g2pcfgdata;
141 break; 153 break;
154 default:
155 *val = icd_readl(pcicptr);
142 } 156 }
157 return check_abort(pcicptr);
158}
143 159
144 retval = check_abort(flags); 160static int tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn,
145 if (retval == PCIBIOS_DEVICE_NOT_FOUND) 161 int where, int size, u32 val)
146 *val = 0xffffffff; 162{
163 struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
147 164
148 return retval; 165 if (mkaddr(bus, devfn, where, pcicptr))
166 return -1;
167 switch (size) {
168 case 1:
169 icd_writeb(val, where & 3, pcicptr);
170 break;
171 case 2:
172 icd_writew(val, where & 3, pcicptr);
173 break;
174 default:
175 icd_writel(val, pcicptr);
176 }
177 return check_abort(pcicptr);
149} 178}
150 179
151static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where, 180static struct pci_ops tx4927_pci_ops = {
152 int size, u32 val) 181 .read = tx4927_pci_config_read,
182 .write = tx4927_pci_config_write,
183};
184
185static struct {
186 u8 trdyto;
187 u8 retryto;
188 u16 gbwc;
189} tx4927_pci_opts __devinitdata = {
190 .trdyto = 0,
191 .retryto = 0,
192 .gbwc = 0xfe0, /* 4064 GBUSCLK for CCFG.GTOT=0b11 */
193};
194
195void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
196 struct pci_controller *channel, int extarb)
153{ 197{
154 int flags, dev, busno, func; 198 int i;
155 busno = bus->number; 199 unsigned long flags;
156 dev = PCI_SLOT(devfn);
157 func = PCI_FUNC(devfn);
158 200
159 /* check if the bus is top-level */ 201 set_tx4927_pcicptr(channel, pcicptr);
160 if (bus->parent != NULL) {
161 busno = bus->number;
162 } else {
163 busno = 0;
164 }
165 202
166 if (mkaddr(busno, devfn, where, &flags)) 203 if (!channel->pci_ops)
167 return -1; 204 printk(KERN_INFO
205 "PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
206 __raw_readl(&pcicptr->pciid) >> 16,
207 __raw_readl(&pcicptr->pciid) & 0xffff,
208 __raw_readl(&pcicptr->pciccrev) & 0xff,
209 extarb ? "External" : "Internal");
210 channel->pci_ops = &tx4927_pci_ops;
168 211
169 switch (size) { 212 local_irq_save(flags);
170 case 1: 213
171 *(volatile u8 *) ((unsigned long) & tx4927_pcicptr-> 214 /* Disable All Initiator Space */
172 g2pcfgdata | 215 __raw_writel(__raw_readl(&pcicptr->pciccfg)
173#ifdef __LITTLE_ENDIAN 216 & ~(TX4927_PCIC_PCICCFG_G2PMEN(0)
174 (where & 3)) = val; 217 | TX4927_PCIC_PCICCFG_G2PMEN(1)
218 | TX4927_PCIC_PCICCFG_G2PMEN(2)
219 | TX4927_PCIC_PCICCFG_G2PIOEN),
220 &pcicptr->pciccfg);
221
222 /* GB->PCI mappings */
223 __raw_writel((channel->io_resource->end - channel->io_resource->start)
224 >> 4,
225 &pcicptr->g2piomask);
226 ____raw_writeq((channel->io_resource->start +
227 channel->io_map_base - IO_BASE) |
228#ifdef __BIG_ENDIAN
229 TX4927_PCIC_G2PIOGBASE_ECHG
175#else 230#else
176 ((where & 0x3) ^ 0x3)) = val; 231 TX4927_PCIC_G2PIOGBASE_BSDIS
177#endif 232#endif
178 break; 233 , &pcicptr->g2piogbase);
179 234 ____raw_writeq(channel->io_resource->start - channel->io_offset,
180 case 2: 235 &pcicptr->g2piopbase);
181 *(volatile u16 *) ((unsigned long) & tx4927_pcicptr-> 236 for (i = 0; i < 3; i++) {
182 g2pcfgdata | 237 __raw_writel(0, &pcicptr->g2pmmask[i]);
183#ifdef __LITTLE_ENDIAN 238 ____raw_writeq(0, &pcicptr->g2pmgbase[i]);
184 (where & 3)) = val; 239 ____raw_writeq(0, &pcicptr->g2pmpbase[i]);
240 }
241 if (channel->mem_resource->end) {
242 __raw_writel((channel->mem_resource->end
243 - channel->mem_resource->start) >> 4,
244 &pcicptr->g2pmmask[0]);
245 ____raw_writeq(channel->mem_resource->start |
246#ifdef __BIG_ENDIAN
247 TX4927_PCIC_G2PMnGBASE_ECHG
185#else 248#else
186 ((where & 0x3) ^ 0x2)) = val; 249 TX4927_PCIC_G2PMnGBASE_BSDIS
187#endif 250#endif
188 break; 251 , &pcicptr->g2pmgbase[0]);
189 case 4: 252 ____raw_writeq(channel->mem_resource->start -
190 tx4927_pcicptr->g2pcfgdata = val; 253 channel->mem_offset,
191 break; 254 &pcicptr->g2pmpbase[0]);
255 }
256 /* PCI->GB mappings (I/O 256B) */
257 __raw_writel(0, &pcicptr->p2giopbase); /* 256B */
258 ____raw_writeq(0, &pcicptr->p2giogbase);
259 /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
260 __raw_writel(0, &pcicptr->p2gm0plbase);
261 __raw_writel(0, &pcicptr->p2gm0pubase);
262 ____raw_writeq(TX4927_PCIC_P2GMnGBASE_TMEMEN |
263#ifdef __BIG_ENDIAN
264 TX4927_PCIC_P2GMnGBASE_TECHG
265#else
266 TX4927_PCIC_P2GMnGBASE_TBSDIS
267#endif
268 , &pcicptr->p2gmgbase[0]);
269 /* PCI->GB mappings (MEM 16MB) */
270 __raw_writel(0xffffffff, &pcicptr->p2gm1plbase);
271 __raw_writel(0xffffffff, &pcicptr->p2gm1pubase);
272 ____raw_writeq(0, &pcicptr->p2gmgbase[1]);
273 /* PCI->GB mappings (MEM 1MB) */
274 __raw_writel(0xffffffff, &pcicptr->p2gm2pbase); /* 1MB */
275 ____raw_writeq(0, &pcicptr->p2gmgbase[2]);
276
277 /* Clear all (including IRBER) except for GBWC */
278 __raw_writel((tx4927_pci_opts.gbwc << 16)
279 & TX4927_PCIC_PCICCFG_GBWC_MASK,
280 &pcicptr->pciccfg);
281 /* Enable Initiator Memory Space */
282 if (channel->mem_resource->end)
283 __raw_writel(__raw_readl(&pcicptr->pciccfg)
284 | TX4927_PCIC_PCICCFG_G2PMEN(0),
285 &pcicptr->pciccfg);
286 /* Enable Initiator I/O Space */
287 if (channel->io_resource->end)
288 __raw_writel(__raw_readl(&pcicptr->pciccfg)
289 | TX4927_PCIC_PCICCFG_G2PIOEN,
290 &pcicptr->pciccfg);
291 /* Enable Initiator Config */
292 __raw_writel(__raw_readl(&pcicptr->pciccfg)
293 | TX4927_PCIC_PCICCFG_ICAEN | TX4927_PCIC_PCICCFG_TCAR,
294 &pcicptr->pciccfg);
295
296 /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
297 __raw_writel(0, &pcicptr->pcicfg1);
298
299 __raw_writel((__raw_readl(&pcicptr->g2ptocnt) & ~0xffff)
300 | (tx4927_pci_opts.trdyto & 0xff)
301 | ((tx4927_pci_opts.retryto & 0xff) << 8),
302 &pcicptr->g2ptocnt);
303
304 /* Clear All Local Bus Status */
305 __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus);
306 /* Enable All Local Bus Interrupts */
307 __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicmask);
308 /* Clear All Initiator Status */
309 __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus);
310 /* Enable All Initiator Interrupts */
311 __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pmask);
312 /* Clear All PCI Status Error */
313 __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
314 | (TX4927_PCIC_PCISTATUS_ALL << 16),
315 &pcicptr->pcistatus);
316 /* Enable All PCI Status Error Interrupts */
317 __raw_writel(TX4927_PCIC_PCISTATUS_ALL, &pcicptr->pcimask);
318
319 if (!extarb) {
320 /* Reset Bus Arbiter */
321 __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg);
322 __raw_writel(0, &pcicptr->pbabm);
323 /* Enable Bus Arbiter */
324 __raw_writel(TX4927_PCIC_PBACFG_PBAEN, &pcicptr->pbacfg);
192 } 325 }
193 326
194 return check_abort(flags); 327 __raw_writel(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
328 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR,
329 &pcicptr->pcistatus);
330 local_irq_restore(flags);
331
332 printk(KERN_DEBUG
333 "PCI: COMMAND=%04x,PCIMASK=%04x,"
334 "TRDYTO=%02x,RETRYTO=%02x,GBWC=%03x\n",
335 __raw_readl(&pcicptr->pcistatus) & 0xffff,
336 __raw_readl(&pcicptr->pcimask) & 0xffff,
337 __raw_readl(&pcicptr->g2ptocnt) & 0xff,
338 (__raw_readl(&pcicptr->g2ptocnt) & 0xff00) >> 8,
339 (__raw_readl(&pcicptr->pciccfg) >> 16) & 0xfff);
195} 340}
196 341
197struct pci_ops tx4927_pci_ops = { 342static void tx4927_report_pcic_status1(struct tx4927_pcic_reg __iomem *pcicptr)
198 tx4927_pcibios_read_config, 343{
199 tx4927_pcibios_write_config 344 __u16 pcistatus = (__u16)(__raw_readl(&pcicptr->pcistatus) >> 16);
200}; 345 __u32 g2pstatus = __raw_readl(&pcicptr->g2pstatus);
346 __u32 pcicstatus = __raw_readl(&pcicptr->pcicstatus);
347 static struct {
348 __u32 flag;
349 const char *str;
350 } pcistat_tbl[] = {
351 { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
352 { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
353 { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
354 { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
355 { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
356 { PCI_STATUS_PARITY, "MasterParityError" },
357 }, g2pstat_tbl[] = {
358 { TX4927_PCIC_G2PSTATUS_TTOE, "TIOE" },
359 { TX4927_PCIC_G2PSTATUS_RTOE, "RTOE" },
360 }, pcicstat_tbl[] = {
361 { TX4927_PCIC_PCICSTATUS_PME, "PME" },
362 { TX4927_PCIC_PCICSTATUS_TLB, "TLB" },
363 { TX4927_PCIC_PCICSTATUS_NIB, "NIB" },
364 { TX4927_PCIC_PCICSTATUS_ZIB, "ZIB" },
365 { TX4927_PCIC_PCICSTATUS_PERR, "PERR" },
366 { TX4927_PCIC_PCICSTATUS_SERR, "SERR" },
367 { TX4927_PCIC_PCICSTATUS_GBE, "GBE" },
368 { TX4927_PCIC_PCICSTATUS_IWB, "IWB" },
369 };
370 int i, cont;
201 371
202/* 372 printk(KERN_ERR "");
203 * h/w only supports devices 0x00 to 0x14 373 if (pcistatus & TX4927_PCIC_PCISTATUS_ALL) {
204 */ 374 printk(KERN_CONT "pcistat:%04x(", pcistatus);
205struct pci_controller tx4927_controller = { 375 for (i = 0, cont = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
206 .pci_ops = &tx4927_pci_ops, 376 if (pcistatus & pcistat_tbl[i].flag)
207 .io_resource = &pci_io_resource, 377 printk(KERN_CONT "%s%s",
208 .mem_resource = &pci_mem_resource, 378 cont++ ? " " : "", pcistat_tbl[i].str);
209}; 379 printk(KERN_CONT ") ");
380 }
381 if (g2pstatus & TX4927_PCIC_G2PSTATUS_ALL) {
382 printk(KERN_CONT "g2pstatus:%08x(", g2pstatus);
383 for (i = 0, cont = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
384 if (g2pstatus & g2pstat_tbl[i].flag)
385 printk(KERN_CONT "%s%s",
386 cont++ ? " " : "", g2pstat_tbl[i].str);
387 printk(KERN_CONT ") ");
388 }
389 if (pcicstatus & TX4927_PCIC_PCICSTATUS_ALL) {
390 printk(KERN_CONT "pcicstatus:%08x(", pcicstatus);
391 for (i = 0, cont = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
392 if (pcicstatus & pcicstat_tbl[i].flag)
393 printk(KERN_CONT "%s%s",
394 cont++ ? " " : "", pcicstat_tbl[i].str);
395 printk(KERN_CONT ")");
396 }
397 printk(KERN_CONT "\n");
398}
399
400void tx4927_report_pcic_status(void)
401{
402 int i;
403
404 for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
405 if (pcicptrs[i].pcicptr)
406 tx4927_report_pcic_status1(pcicptrs[i].pcicptr);
407 }
408}
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
deleted file mode 100644
index a450c4062031..000000000000
--- a/arch/mips/pci/ops-tx4938.c
+++ /dev/null
@@ -1,214 +0,0 @@
1/*
2 * Define the pci_ops for the Toshiba rbtx4938
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16
17#include <asm/addrspace.h>
18#include <asm/tx4938/rbtx4938.h>
19
20/* initialize in setup */
21struct resource pci_io_resource = {
22 .name = "pci IO space",
23 .start = 0,
24 .end = 0,
25 .flags = IORESOURCE_IO
26};
27
28/* initialize in setup */
29struct resource pci_mem_resource = {
30 .name = "pci memory space",
31 .start = 0,
32 .end = 0,
33 .flags = IORESOURCE_MEM
34};
35
36struct resource tx4938_pcic1_pci_io_resource = {
37 .name = "PCI1 IO",
38 .start = 0,
39 .end = 0,
40 .flags = IORESOURCE_IO
41};
42struct resource tx4938_pcic1_pci_mem_resource = {
43 .name = "PCI1 mem",
44 .start = 0,
45 .end = 0,
46 .flags = IORESOURCE_MEM
47};
48
49static int mkaddr(int bus, int dev_fn, int where,
50 struct tx4938_pcic_reg *pcicptr)
51{
52 if (bus > 0) {
53 /* Type 1 configuration */
54 pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
55 ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
56 } else {
57 if (dev_fn >= PCI_DEVFN(TX4938_PCIC_MAX_DEVNU, 0))
58 return -1;
59
60 /* Type 0 configuration */
61 pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
62 ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
63 }
64 /* clear M_ABORT and Disable M_ABORT Int. */
65 pcicptr->pcistatus =
66 (pcicptr->pcistatus & 0x0000ffff) |
67 (PCI_STATUS_REC_MASTER_ABORT << 16);
68 pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
69
70 return 0;
71}
72
73static int check_abort(struct tx4938_pcic_reg *pcicptr)
74{
75 int code = PCIBIOS_SUCCESSFUL;
76 /* wait write cycle completion before checking error status */
77 while (pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB)
78 ;
79 if (pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
80 pcicptr->pcistatus =
81 (pcicptr->
82 pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
83 << 16);
84 pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
85 code = PCIBIOS_DEVICE_NOT_FOUND;
86 }
87 return code;
88}
89
90extern struct pci_controller tx4938_pci_controller[];
91extern struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch);
92
93static struct tx4938_pcic_reg *pci_bus_to_pcicptr(struct pci_bus *bus)
94{
95 struct pci_controller *channel = bus->sysdata;
96 return get_tx4938_pcicptr(channel - &tx4938_pci_controller[0]);
97}
98
99static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
100 int where, int size, u32 * val)
101{
102 int retval, dev, busno, func;
103 struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus);
104 void __iomem *cfgdata =
105 (void __iomem *)(unsigned long)&pcicptr->g2pcfgdata;
106
107 dev = PCI_SLOT(devfn);
108 func = PCI_FUNC(devfn);
109
110 /* check if the bus is top-level */
111 if (bus->parent != NULL)
112 busno = bus->number;
113 else {
114 busno = 0;
115 }
116
117 if (mkaddr(busno, devfn, where, pcicptr))
118 return -1;
119
120 switch (size) {
121 case 1:
122#ifdef __BIG_ENDIAN
123 cfgdata += (where & 3) ^ 3;
124#else
125 cfgdata += where & 3;
126#endif
127 *val = __raw_readb(cfgdata);
128 break;
129 case 2:
130#ifdef __BIG_ENDIAN
131 cfgdata += (where & 2) ^ 2;
132#else
133 cfgdata += where & 2;
134#endif
135 *val = __raw_readw(cfgdata);
136 break;
137 case 4:
138 *val = __raw_readl(cfgdata);
139 break;
140 }
141
142 retval = check_abort(pcicptr);
143 if (retval == PCIBIOS_DEVICE_NOT_FOUND)
144 *val = 0xffffffff;
145
146 return retval;
147}
148
149static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
150 int size, u32 val)
151{
152 int dev, busno, func;
153 struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus);
154 void __iomem *cfgdata =
155 (void __iomem *)(unsigned long)&pcicptr->g2pcfgdata;
156
157 busno = bus->number;
158 dev = PCI_SLOT(devfn);
159 func = PCI_FUNC(devfn);
160
161 /* check if the bus is top-level */
162 if (bus->parent != NULL) {
163 busno = bus->number;
164 } else {
165 busno = 0;
166 }
167
168 if (mkaddr(busno, devfn, where, pcicptr))
169 return -1;
170
171 switch (size) {
172 case 1:
173#ifdef __BIG_ENDIAN
174 cfgdata += (where & 3) ^ 3;
175#else
176 cfgdata += where & 3;
177#endif
178 __raw_writeb(val, cfgdata);
179 break;
180 case 2:
181#ifdef __BIG_ENDIAN
182 cfgdata += (where & 2) ^ 2;
183#else
184 cfgdata += where & 2;
185#endif
186 __raw_writew(val, cfgdata);
187 break;
188 case 4:
189 __raw_writel(val, cfgdata);
190 break;
191 }
192
193 return check_abort(pcicptr);
194}
195
196struct pci_ops tx4938_pci_ops = {
197 tx4938_pcibios_read_config,
198 tx4938_pcibios_write_config
199};
200
201struct pci_controller tx4938_pci_controller[] = {
202 /* h/w only supports devices 0x00 to 0x14 */
203 {
204 .pci_ops = &tx4938_pci_ops,
205 .io_resource = &pci_io_resource,
206 .mem_resource = &pci_mem_resource,
207 },
208 /* h/w only supports devices 0x00 to 0x14 */
209 {
210 .pci_ops = &tx4938_pci_ops,
211 .io_resource = &tx4938_pcic1_pci_io_resource,
212 .mem_resource = &tx4938_pcic1_pci_mem_resource,
213 }
214};
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 87e2c8f54e2d..a9060c771840 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -202,7 +202,6 @@ static int __init bcm1480_pcibios_init(void)
202{ 202{
203 uint32_t cmdreg; 203 uint32_t cmdreg;
204 uint64_t reg; 204 uint64_t reg;
205 extern int pci_probe_only;
206 205
207 /* CFE will assign PCI resources */ 206 /* CFE will assign PCI resources */
208 pci_probe_only = 1; 207 pci_probe_only = 1;
@@ -254,8 +253,6 @@ static int __init bcm1480_pcibios_init(void)
254 ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536); 253 ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
255 bcm1480_controller.io_map_base -= bcm1480_controller.io_offset; 254 bcm1480_controller.io_map_base -= bcm1480_controller.io_offset;
256 set_io_port_base(bcm1480_controller.io_map_base); 255 set_io_port_base(bcm1480_controller.io_map_base);
257 isa_slot_offset = (unsigned long)
258 ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
259 256
260 register_pci_controller(&bcm1480_controller); 257 register_pci_controller(&bcm1480_controller);
261 258
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index a18516925cdd..ce92f82b16d2 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -47,7 +47,6 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
47 static int num_bridges = 0; 47 static int num_bridges = 0;
48 bridge_t *bridge; 48 bridge_t *bridge;
49 int slot; 49 int slot;
50 extern int pci_probe_only;
51 50
52 pci_probe_only = 1; 51 pci_probe_only = 1;
53 52
diff --git a/arch/mips/pci/pci-jmr3927.c b/arch/mips/pci/pci-jmr3927.c
deleted file mode 100644
index cb84f4e8ccae..000000000000
--- a/arch/mips/pci/pci-jmr3927.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ahennessy@mvista.com
5 *
6 * Copyright (C) 2000-2001 Toshiba Corporation
7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/types.h>
30#include <linux/pci.h>
31#include <linux/kernel.h>
32#include <linux/init.h>
33
34#include <asm/jmr3927/jmr3927.h>
35#include <asm/debug.h>
36
37struct resource pci_io_resource = {
38 .name = "IO MEM",
39 .start = 0x1000, /* reserve regacy I/O space */
40 .end = 0x1000 + JMR3927_PCIIO_SIZE - 1,
41 .flags = IORESOURCE_IO
42};
43
44struct resource pci_mem_resource = {
45 .name = "PCI MEM",
46 .start = JMR3927_PCIMEM,
47 .end = JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
48 .flags = IORESOURCE_MEM
49};
50
51extern struct pci_ops jmr3927_pci_ops;
52
53struct pci_controller jmr3927_controller = {
54 .pci_ops = &jmr3927_pci_ops,
55 .io_resource = &pci_io_resource,
56 .mem_resource = &pci_mem_resource,
57 .mem_offset = JMR3927_PCIMEM
58};
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index e70ae3236e0b..a98e543a514a 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -10,7 +10,7 @@
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/types.h> 11#include <linux/types.h>
12 12
13#include <asm/bootinfo.h> 13#include <asm/lasat/lasat.h>
14 14
15#include <irq.h> 15#include <irq.h>
16 16
@@ -39,16 +39,10 @@ static int __init lasat_pci_setup(void)
39{ 39{
40 printk(KERN_DEBUG "PCI: starting\n"); 40 printk(KERN_DEBUG "PCI: starting\n");
41 41
42 switch (mips_machtype) { 42 if (IS_LASAT_200())
43 case MACH_LASAT_100:
44 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
45 break;
46 case MACH_LASAT_200:
47 lasat_pci_controller.pci_ops = &nile4_pci_ops; 43 lasat_pci_controller.pci_ops = &nile4_pci_ops;
48 break; 44 else
49 default: 45 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
50 panic("pcibios_init: mips_machtype incorrect");
51 }
52 46
53 register_pci_controller(&lasat_pci_controller); 47 register_pci_controller(&lasat_pci_controller);
54 48
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 2a09ad91ec8c..bf639590b8b2 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -210,7 +210,6 @@ static int __init sb1250_pcibios_init(void)
210 void __iomem *io_map_base; 210 void __iomem *io_map_base;
211 uint32_t cmdreg; 211 uint32_t cmdreg;
212 uint64_t reg; 212 uint64_t reg;
213 extern int pci_probe_only;
214 213
215 /* CFE will assign PCI resources */ 214 /* CFE will assign PCI resources */
216 pci_probe_only = 1; 215 pci_probe_only = 1;
@@ -254,9 +253,6 @@ static int __init sb1250_pcibios_init(void)
254 * works correctly with most of Linux's drivers. 253 * works correctly with most of Linux's drivers.
255 * XXX ehs: Should this happen in PCI Device mode? 254 * XXX ehs: Should this happen in PCI Device mode?
256 */ 255 */
257 isa_slot_offset = (unsigned long)
258 ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES_32, 1024 * 1024);
259
260 io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024); 256 io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
261 sb1250_controller.io_map_base = io_map_base; 257 sb1250_controller.io_map_base = io_map_base;
262 set_io_port_base((unsigned long)io_map_base); 258 set_io_port_base((unsigned long)io_map_base);
diff --git a/arch/mips/pci/pci-tx4927.c b/arch/mips/pci/pci-tx4927.c
new file mode 100644
index 000000000000..27e86a09dd41
--- /dev/null
+++ b/arch/mips/pci/pci-tx4927.c
@@ -0,0 +1,83 @@
1/*
2 * linux/arch/mips/pci/pci-tx4927.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
6 *
7 * Copyright 2001, 2003-2005 MontaVista Software Inc.
8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
9 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/pci.h>
17#include <linux/kernel.h>
18#include <asm/txx9/generic.h>
19#include <asm/txx9/tx4927.h>
20
21int __init tx4927_report_pciclk(void)
22{
23 int pciclk = 0;
24
25 printk(KERN_INFO "PCIC --%s PCICLK:",
26 (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
27 " PCI66" : "");
28 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
29 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
30 switch ((unsigned long)ccfg &
31 TX4927_CCFG_PCIDIVMODE_MASK) {
32 case TX4927_CCFG_PCIDIVMODE_2_5:
33 pciclk = txx9_cpu_clock * 2 / 5; break;
34 case TX4927_CCFG_PCIDIVMODE_3:
35 pciclk = txx9_cpu_clock / 3; break;
36 case TX4927_CCFG_PCIDIVMODE_5:
37 pciclk = txx9_cpu_clock / 5; break;
38 case TX4927_CCFG_PCIDIVMODE_6:
39 pciclk = txx9_cpu_clock / 6; break;
40 }
41 printk("Internal(%u.%uMHz)",
42 (pciclk + 50000) / 1000000,
43 ((pciclk + 50000) / 100000) % 10);
44 } else {
45 printk("External");
46 pciclk = -1;
47 }
48 printk("\n");
49 return pciclk;
50}
51
52int __init tx4927_pciclk66_setup(void)
53{
54 int pciclk;
55
56 /* Assert M66EN */
57 tx4927_ccfg_set(TX4927_CCFG_PCI66);
58 /* Double PCICLK (if possible) */
59 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
60 unsigned int pcidivmode = 0;
61 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
62 pcidivmode = (unsigned long)ccfg &
63 TX4927_CCFG_PCIDIVMODE_MASK;
64 switch (pcidivmode) {
65 case TX4927_CCFG_PCIDIVMODE_5:
66 case TX4927_CCFG_PCIDIVMODE_2_5:
67 pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
68 pciclk = txx9_cpu_clock * 2 / 5;
69 break;
70 case TX4927_CCFG_PCIDIVMODE_6:
71 case TX4927_CCFG_PCIDIVMODE_3:
72 default:
73 pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
74 pciclk = txx9_cpu_clock / 3;
75 }
76 tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
77 pcidivmode);
78 printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
79 (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
80 } else
81 pciclk = -1;
82 return pciclk;
83}
diff --git a/arch/mips/pci/pci-tx4938.c b/arch/mips/pci/pci-tx4938.c
new file mode 100644
index 000000000000..e5375511c2b7
--- /dev/null
+++ b/arch/mips/pci/pci-tx4938.c
@@ -0,0 +1,134 @@
1/*
2 * linux/arch/mips/pci/pci-tx4938.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
6 *
7 * Copyright 2001, 2003-2005 MontaVista Software Inc.
8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
9 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/pci.h>
17#include <linux/kernel.h>
18#include <asm/txx9/generic.h>
19#include <asm/txx9/tx4938.h>
20
21int __init tx4938_report_pciclk(void)
22{
23 int pciclk = 0;
24
25 printk(KERN_INFO "PCIC --%s PCICLK:",
26 (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ?
27 " PCI66" : "");
28 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
29 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
30 switch ((unsigned long)ccfg &
31 TX4938_CCFG_PCIDIVMODE_MASK) {
32 case TX4938_CCFG_PCIDIVMODE_4:
33 pciclk = txx9_cpu_clock / 4; break;
34 case TX4938_CCFG_PCIDIVMODE_4_5:
35 pciclk = txx9_cpu_clock * 2 / 9; break;
36 case TX4938_CCFG_PCIDIVMODE_5:
37 pciclk = txx9_cpu_clock / 5; break;
38 case TX4938_CCFG_PCIDIVMODE_5_5:
39 pciclk = txx9_cpu_clock * 2 / 11; break;
40 case TX4938_CCFG_PCIDIVMODE_8:
41 pciclk = txx9_cpu_clock / 8; break;
42 case TX4938_CCFG_PCIDIVMODE_9:
43 pciclk = txx9_cpu_clock / 9; break;
44 case TX4938_CCFG_PCIDIVMODE_10:
45 pciclk = txx9_cpu_clock / 10; break;
46 case TX4938_CCFG_PCIDIVMODE_11:
47 pciclk = txx9_cpu_clock / 11; break;
48 }
49 printk("Internal(%u.%uMHz)",
50 (pciclk + 50000) / 1000000,
51 ((pciclk + 50000) / 100000) % 10);
52 } else {
53 printk("External");
54 pciclk = -1;
55 }
56 printk("\n");
57 return pciclk;
58}
59
60void __init tx4938_report_pci1clk(void)
61{
62 __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
63 unsigned int pciclk =
64 txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2);
65
66 printk(KERN_INFO "PCIC1 -- %sPCICLK:%u.%uMHz\n",
67 (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "",
68 (pciclk + 50000) / 1000000,
69 ((pciclk + 50000) / 100000) % 10);
70}
71
72int __init tx4938_pciclk66_setup(void)
73{
74 int pciclk;
75
76 /* Assert M66EN */
77 tx4938_ccfg_set(TX4938_CCFG_PCI66);
78 /* Double PCICLK (if possible) */
79 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
80 unsigned int pcidivmode = 0;
81 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
82 pcidivmode = (unsigned long)ccfg &
83 TX4938_CCFG_PCIDIVMODE_MASK;
84 switch (pcidivmode) {
85 case TX4938_CCFG_PCIDIVMODE_8:
86 case TX4938_CCFG_PCIDIVMODE_4:
87 pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
88 pciclk = txx9_cpu_clock / 4;
89 break;
90 case TX4938_CCFG_PCIDIVMODE_9:
91 case TX4938_CCFG_PCIDIVMODE_4_5:
92 pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
93 pciclk = txx9_cpu_clock * 2 / 9;
94 break;
95 case TX4938_CCFG_PCIDIVMODE_10:
96 case TX4938_CCFG_PCIDIVMODE_5:
97 pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
98 pciclk = txx9_cpu_clock / 5;
99 break;
100 case TX4938_CCFG_PCIDIVMODE_11:
101 case TX4938_CCFG_PCIDIVMODE_5_5:
102 default:
103 pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
104 pciclk = txx9_cpu_clock * 2 / 11;
105 break;
106 }
107 tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK,
108 pcidivmode);
109 printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
110 (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg));
111 } else
112 pciclk = -1;
113 return pciclk;
114}
115
116int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
117{
118 if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
119 switch (slot) {
120 case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
121 if (__raw_readq(&tx4938_ccfgptr->pcfg) &
122 TX4938_PCFG_ETH0_SEL)
123 return TXX9_IRQ_BASE + TX4938_IR_ETH0;
124 break;
125 case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
126 if (__raw_readq(&tx4938_ccfgptr->pcfg) &
127 TX4938_PCFG_ETH1_SEL)
128 return TXX9_IRQ_BASE + TX4938_IR_ETH1;
129 break;
130 }
131 return 0;
132 }
133 return -1;
134}
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 358ad6210949..d7d6cb063d26 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -29,8 +29,7 @@ unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
29 * The PCI controller list. 29 * The PCI controller list.
30 */ 30 */
31 31
32struct pci_controller *hose_head, **hose_tail = &hose_head; 32static struct pci_controller *hose_head, **hose_tail = &hose_head;
33struct pci_controller *pci_isa_hose;
34 33
35unsigned long PCIBIOS_MIN_IO = 0x0000; 34unsigned long PCIBIOS_MIN_IO = 0x0000;
36unsigned long PCIBIOS_MIN_MEM = 0; 35unsigned long PCIBIOS_MIN_MEM = 0;
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index 35dc435846a6..cf4c868715ac 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -64,7 +64,7 @@ static void prom_exit(void)
64#ifdef CONFIG_SMP 64#ifdef CONFIG_SMP
65 if (smp_processor_id()) 65 if (smp_processor_id())
66 /* CPU 1 */ 66 /* CPU 1 */
67 smp_call_function(prom_cpu0_exit, NULL, 1, 1); 67 smp_call_function(prom_cpu0_exit, NULL, 1);
68#endif 68#endif
69 prom_cpu0_exit(NULL); 69 prom_cpu0_exit(NULL);
70} 70}
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index 3f35d6367bec..5268ac187bbd 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -208,4 +208,30 @@ void __init sgimc_init(void)
208void __init prom_meminit(void) {} 208void __init prom_meminit(void) {}
209void __init prom_free_prom_memory(void) 209void __init prom_free_prom_memory(void)
210{ 210{
211#ifdef CONFIG_SGI_IP28
212 u32 mconfig1;
213 unsigned long flags;
214 spinlock_t lock;
215
216 /*
217 * because ARCS accesses memory uncached we wait until ARCS
218 * isn't needed any longer, before we switch from slow to
219 * normal mode
220 */
221 spin_lock_irqsave(&lock, flags);
222 mconfig1 = sgimc->mconfig1;
223 /* map ECC register */
224 sgimc->mconfig1 = (mconfig1 & 0xffff0000) | 0x2060;
225 iob();
226 /* switch to normal mode */
227 *(unsigned long *)PHYS_TO_XKSEG_UNCACHED(0x60000000) = 0;
228 iob();
229 /* reduce WR_COL */
230 sgimc->cmacc = (sgimc->cmacc & ~0xf) | 4;
231 iob();
232 /* restore old config */
233 sgimc->mconfig1 = mconfig1;
234 iob();
235 spin_unlock_irqrestore(&lock, flags);
236#endif
211} 237}
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c
index 28ffec8e5d1a..fc6df96305ed 100644
--- a/arch/mips/sgi-ip22/ip22-platform.c
+++ b/arch/mips/sgi-ip22/ip22-platform.c
@@ -175,3 +175,21 @@ static int __init sgiseeq_devinit(void)
175} 175}
176 176
177device_initcall(sgiseeq_devinit); 177device_initcall(sgiseeq_devinit);
178
179static int __init sgi_hal2_devinit(void)
180{
181 return IS_ERR(platform_device_register_simple("sgihal2", 0, NULL, 0));
182}
183
184device_initcall(sgi_hal2_devinit);
185
186static int __init sgi_button_devinit(void)
187{
188 if (ip22_is_fullhouse())
189 return 0; /* full house has no volume buttons */
190
191 return IS_ERR(platform_device_register_simple("sgiindybtns",
192 -1, NULL, 0));
193}
194
195device_initcall(sgi_button_devinit);
diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c
index a435b31cf031..4ad5c3393fd3 100644
--- a/arch/mips/sgi-ip22/ip22-reset.c
+++ b/arch/mips/sgi-ip22/ip22-reset.c
@@ -39,7 +39,7 @@
39#define POWERDOWN_FREQ (HZ / 4) 39#define POWERDOWN_FREQ (HZ / 4)
40#define PANIC_FREQ (HZ / 8) 40#define PANIC_FREQ (HZ / 8)
41 41
42static struct timer_list power_timer, blink_timer, debounce_timer, volume_timer; 42static struct timer_list power_timer, blink_timer, debounce_timer;
43 43
44#define MACHINE_PANICED 1 44#define MACHINE_PANICED 1
45#define MACHINE_SHUTTING_DOWN 2 45#define MACHINE_SHUTTING_DOWN 2
@@ -139,36 +139,6 @@ static inline void power_button(void)
139 add_timer(&power_timer); 139 add_timer(&power_timer);
140} 140}
141 141
142void (*indy_volume_button)(int) = NULL;
143
144EXPORT_SYMBOL(indy_volume_button);
145
146static inline void volume_up_button(unsigned long data)
147{
148 del_timer(&volume_timer);
149
150 if (indy_volume_button)
151 indy_volume_button(1);
152
153 if (sgint->istat1 & SGINT_ISTAT1_PWR) {
154 volume_timer.expires = jiffies + (HZ / 100);
155 add_timer(&volume_timer);
156 }
157}
158
159static inline void volume_down_button(unsigned long data)
160{
161 del_timer(&volume_timer);
162
163 if (indy_volume_button)
164 indy_volume_button(-1);
165
166 if (sgint->istat1 & SGINT_ISTAT1_PWR) {
167 volume_timer.expires = jiffies + (HZ / 100);
168 add_timer(&volume_timer);
169 }
170}
171
172static irqreturn_t panel_int(int irq, void *dev_id) 142static irqreturn_t panel_int(int irq, void *dev_id)
173{ 143{
174 unsigned int buttons; 144 unsigned int buttons;
@@ -190,25 +160,8 @@ static irqreturn_t panel_int(int irq, void *dev_id)
190 * House. Only lowest 2 bits are used. Guiness uses upper four bits 160 * House. Only lowest 2 bits are used. Guiness uses upper four bits
191 * for volume control". This is not true, all bits are pulled high 161 * for volume control". This is not true, all bits are pulled high
192 * on fullhouse */ 162 * on fullhouse */
193 if (ip22_is_fullhouse() || !(buttons & SGIOC_PANEL_POWERINTR)) { 163 if (!(buttons & SGIOC_PANEL_POWERINTR))
194 power_button(); 164 power_button();
195 return IRQ_HANDLED;
196 }
197 /* TODO: mute/unmute */
198 /* Volume up button was pressed */
199 if (!(buttons & SGIOC_PANEL_VOLUPINTR)) {
200 init_timer(&volume_timer);
201 volume_timer.function = volume_up_button;
202 volume_timer.expires = jiffies + (HZ / 100);
203 add_timer(&volume_timer);
204 }
205 /* Volume down button was pressed */
206 if (!(buttons & SGIOC_PANEL_VOLDNINTR)) {
207 init_timer(&volume_timer);
208 volume_timer.function = volume_down_button;
209 volume_timer.expires = jiffies + (HZ / 100);
210 add_timer(&volume_timer);
211 }
212 165
213 return IRQ_HANDLED; 166 return IRQ_HANDLED;
214} 167}
diff --git a/arch/mips/sgi-ip22/ip28-berr.c b/arch/mips/sgi-ip22/ip28-berr.c
index 30e12e2ec4b5..fee7a2e0e538 100644
--- a/arch/mips/sgi-ip22/ip28-berr.c
+++ b/arch/mips/sgi-ip22/ip28-berr.c
@@ -412,7 +412,7 @@ static int ip28_be_interrupt(const struct pt_regs *regs)
412 * Now we have an asynchronous bus error, speculatively or DMA caused. 412 * Now we have an asynchronous bus error, speculatively or DMA caused.
413 * Need to search all DMA descriptors for the error address. 413 * Need to search all DMA descriptors for the error address.
414 */ 414 */
415 for (i = 0; i < sizeof(hpc3)/sizeof(struct hpc3_stat); ++i) { 415 for (i = 0; i < ARRAY_SIZE(hpc3); ++i) {
416 struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i; 416 struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
417 if ((cpu_err_stat & CPU_ERRMASK) && 417 if ((cpu_err_stat & CPU_ERRMASK) &&
418 (cpu_err_addr == hp->ndptr || cpu_err_addr == hp->cbp)) 418 (cpu_err_addr == hp->ndptr || cpu_err_addr == hp->cbp))
@@ -421,7 +421,7 @@ static int ip28_be_interrupt(const struct pt_regs *regs)
421 (gio_err_addr == hp->ndptr || gio_err_addr == hp->cbp)) 421 (gio_err_addr == hp->ndptr || gio_err_addr == hp->cbp))
422 break; 422 break;
423 } 423 }
424 if (i < sizeof(hpc3)/sizeof(struct hpc3_stat)) { 424 if (i < ARRAY_SIZE(hpc3)) {
425 struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i; 425 struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
426 printk(KERN_ERR "at DMA addresses: HPC3 @ %08lx:" 426 printk(KERN_ERR "at DMA addresses: HPC3 @ %08lx:"
427 " ctl %08x, ndp %08x, cbp %08x\n", 427 " ctl %08x, ndp %08x, cbp %08x\n",
diff --git a/arch/mips/sgi-ip27/ip27-nmi.c b/arch/mips/sgi-ip27/ip27-nmi.c
index b0a25e1ee8b7..64459e7d891b 100644
--- a/arch/mips/sgi-ip27/ip27-nmi.c
+++ b/arch/mips/sgi-ip27/ip27-nmi.c
@@ -1,4 +1,3 @@
1#include <linux/kallsyms.h>
2#include <linux/kernel.h> 1#include <linux/kernel.h>
3#include <linux/mmzone.h> 2#include <linux/mmzone.h>
4#include <linux/nodemask.h> 3#include <linux/nodemask.h>
@@ -84,13 +83,10 @@ void nmi_cpu_eframe_save(nasid_t nasid, int slice)
84 /* 83 /*
85 * Saved cp0 registers 84 * Saved cp0 registers
86 */ 85 */
87 printk("epc : %016lx ", nr->epc); 86 printk("epc : %016lx %pS\n", nr->epc, (void *) nr->epc);
88 print_symbol("%s ", nr->epc);
89 printk("%s\n", print_tainted()); 87 printk("%s\n", print_tainted());
90 printk("ErrEPC: %016lx ", nr->error_epc); 88 printk("ErrEPC: %016lx %pS\n", nr->error_epc, (void *) nr->error_epc);
91 print_symbol("%s\n", nr->error_epc); 89 printk("ra : %016lx %pS\n", nr->gpr[31], (void *) nr->gpr[31]);
92 printk("ra : %016lx ", nr->gpr[31]);
93 print_symbol("%s\n", nr->gpr[31]);
94 printk("Status: %08lx ", nr->sr); 90 printk("Status: %08lx ", nr->sr);
95 91
96 if (nr->sr & ST0_KX) 92 if (nr->sr & ST0_KX)
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 89a71f49b692..2ee401ba0b25 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -65,6 +65,42 @@ static __init int meth_devinit(void)
65 65
66device_initcall(meth_devinit); 66device_initcall(meth_devinit);
67 67
68static __init int sgio2audio_devinit(void)
69{
70 struct platform_device *pd;
71 int ret;
72
73 pd = platform_device_alloc("sgio2audio", -1);
74 if (!pd)
75 return -ENOMEM;
76
77 ret = platform_device_add(pd);
78 if (ret)
79 platform_device_put(pd);
80
81 return ret;
82}
83
84device_initcall(sgio2audio_devinit);
85
86static __init int sgio2btns_devinit(void)
87{
88 struct platform_device *pd;
89 int ret;
90
91 pd = platform_device_alloc("sgio2btns", -1);
92 if (!pd)
93 return -ENOMEM;
94
95 ret = platform_device_add(pd);
96 if (ret)
97 platform_device_put(pd);
98
99 return ret;
100}
101
102device_initcall(sgio2btns_devinit);
103
68MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>"); 104MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
69MODULE_LICENSE("GPL"); 105MODULE_LICENSE("GPL");
70MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2"); 106MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index 33fce826f8bf..fd9604d5555a 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -74,7 +74,7 @@ static void __noreturn cfe_linux_exit(void *arg)
74 if (!reboot_smp) { 74 if (!reboot_smp) {
75 /* Get CPU 0 to do the cfe_exit */ 75 /* Get CPU 0 to do the cfe_exit */
76 reboot_smp = 1; 76 reboot_smp = 1;
77 smp_call_function(cfe_linux_exit, arg, 1, 0); 77 smp_call_function(cfe_linux_exit, arg, 0);
78 } 78 }
79 } else { 79 } else {
80 printk("Passing control back to CFE...\n"); 80 printk("Passing control back to CFE...\n");
diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c
index cf8f6b3de86c..65b1af66b674 100644
--- a/arch/mips/sibyte/sb1250/prom.c
+++ b/arch/mips/sibyte/sb1250/prom.c
@@ -66,7 +66,7 @@ static void prom_linux_exit(void)
66{ 66{
67#ifdef CONFIG_SMP 67#ifdef CONFIG_SMP
68 if (smp_processor_id()) { 68 if (smp_processor_id()) {
69 smp_call_function(prom_cpu0_exit, NULL, 1, 1); 69 smp_call_function(prom_cpu0_exit, NULL, 1);
70 } 70 }
71#endif 71#endif
72 while(1); 72 while(1);
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 5484e1c62054..a49272ce7ef5 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -116,7 +116,6 @@ void __init plat_mem_setup(void)
116 /* 116 /*
117 * Setup (E)ISA I/O memory access stuff 117 * Setup (E)ISA I/O memory access stuff
118 */ 118 */
119 isa_slot_offset = CKSEG1ADDR(0xb0000000);
120#ifdef CONFIG_EISA 119#ifdef CONFIG_EISA
121 EISA_bus = 1; 120 EISA_bus = 1;
122#endif 121#endif
diff --git a/arch/mips/tx4927/Kconfig b/arch/mips/tx4927/Kconfig
deleted file mode 100644
index 5fbbe12e0fc1..000000000000
--- a/arch/mips/tx4927/Kconfig
+++ /dev/null
@@ -1,3 +0,0 @@
1config TOSHIBA_FPCIB0
2 bool "FPCIB0 Backplane Support"
3 depends on TOSHIBA_RBTX4927
diff --git a/arch/mips/tx4927/common/Makefile b/arch/mips/tx4927/common/Makefile
deleted file mode 100644
index a7fe76a64964..000000000000
--- a/arch/mips/tx4927/common/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Makefile for common code for Toshiba TX4927 based systems
3#
4
5obj-y += tx4927_prom.o tx4927_irq.o
6
7obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
8obj-$(CONFIG_KGDB) += tx4927_dbgio.o
9
10EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/Makefile b/arch/mips/tx4927/toshiba_rbtx4927/Makefile
deleted file mode 100644
index 13f96725d772..000000000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1obj-y += toshiba_rbtx4927_prom.o
2obj-y += toshiba_rbtx4927_setup.o
3obj-y += toshiba_rbtx4927_irq.o
4
5EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
deleted file mode 100644
index 6d31f2a98abf..000000000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ /dev/null
@@ -1,428 +0,0 @@
1/*
2 * linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
3 *
4 * Toshiba RBTX4927 specific interrupt handlers
5 *
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
8 *
9 * Copyright 2001-2002 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
24 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
25 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */
31
32
33/*
34IRQ Device
3500 RBTX4927-ISA/00
3601 RBTX4927-ISA/01 PS2/Keyboard
3702 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
3803 RBTX4927-ISA/03
3904 RBTX4927-ISA/04
4005 RBTX4927-ISA/05
4106 RBTX4927-ISA/06
4207 RBTX4927-ISA/07
4308 RBTX4927-ISA/08
4409 RBTX4927-ISA/09
4510 RBTX4927-ISA/10
4611 RBTX4927-ISA/11
4712 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
4813 RBTX4927-ISA/13
4914 RBTX4927-ISA/14 IDE
5015 RBTX4927-ISA/15
51
5216 TX4927-CP0/00 Software 0
5317 TX4927-CP0/01 Software 1
5418 TX4927-CP0/02 Cascade TX4927-CP0
5519 TX4927-CP0/03 Multiplexed -- do not use
5620 TX4927-CP0/04 Multiplexed -- do not use
5721 TX4927-CP0/05 Multiplexed -- do not use
5822 TX4927-CP0/06 Multiplexed -- do not use
5923 TX4927-CP0/07 CPU TIMER
60
6124 TX4927-PIC/00
6225 TX4927-PIC/01
6326 TX4927-PIC/02
6427 TX4927-PIC/03 Cascade RBTX4927-IOC
6528 TX4927-PIC/04
6629 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
6730 TX4927-PIC/06
6831 TX4927-PIC/07
6932 TX4927-PIC/08 TX4927 SerialIO Channel 0
7033 TX4927-PIC/09 TX4927 SerialIO Channel 1
7134 TX4927-PIC/10
7235 TX4927-PIC/11
7336 TX4927-PIC/12
7437 TX4927-PIC/13
7538 TX4927-PIC/14
7639 TX4927-PIC/15
7740 TX4927-PIC/16 TX4927 PCI PCI-C
7841 TX4927-PIC/17
7942 TX4927-PIC/18
8043 TX4927-PIC/19
8144 TX4927-PIC/20
8245 TX4927-PIC/21
8346 TX4927-PIC/22 TX4927 PCI PCI-ERR
8447 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
8548 TX4927-PIC/24
8649 TX4927-PIC/25
8750 TX4927-PIC/26
8851 TX4927-PIC/27
8952 TX4927-PIC/28
9053 TX4927-PIC/29
9154 TX4927-PIC/30
9255 TX4927-PIC/31
93
9456 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
9557 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
9658 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
9759 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
9860 RBTX4927-IOC/04
9961 RBTX4927-IOC/05
10062 RBTX4927-IOC/06
10163 RBTX4927-IOC/07
102
103NOTES:
104SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
105SouthBridge/ISA/pin=0 no pci irq used by this device
106SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
107SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
108SouthBridge/PMC/pin=0 no pci irq used by this device
109SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
110SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
111JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
112*/
113
114#include <linux/init.h>
115#include <linux/kernel.h>
116#include <linux/types.h>
117#include <linux/mm.h>
118#include <linux/swap.h>
119#include <linux/ioport.h>
120#include <linux/sched.h>
121#include <linux/interrupt.h>
122#include <linux/pci.h>
123#include <linux/timex.h>
124#include <asm/bootinfo.h>
125#include <asm/page.h>
126#include <asm/io.h>
127#include <asm/irq.h>
128#include <asm/pci.h>
129#include <asm/processor.h>
130#include <asm/reboot.h>
131#include <asm/time.h>
132#include <asm/wbflush.h>
133#include <linux/bootmem.h>
134#include <linux/blkdev.h>
135#ifdef CONFIG_TOSHIBA_FPCIB0
136#include <asm/i8259.h>
137#include <asm/tx4927/smsc_fdc37m81x.h>
138#endif
139#include <asm/tx4927/toshiba_rbtx4927.h>
140
141
142#undef TOSHIBA_RBTX4927_IRQ_DEBUG
143
144#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
145#define TOSHIBA_RBTX4927_IRQ_NONE 0x00000000
146
147#define TOSHIBA_RBTX4927_IRQ_INFO ( 1 << 0 )
148#define TOSHIBA_RBTX4927_IRQ_WARN ( 1 << 1 )
149#define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 )
150
151#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 )
152#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 )
153#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 )
154
155#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
156#endif
157
158
159#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
160static const u32 toshiba_rbtx4927_irq_debug_flag =
161 (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
162 TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
163// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
164// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
165// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
166 );
167#endif
168
169
170#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
171#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \
172 if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \
173 { \
174 char tmp[100]; \
175 sprintf( tmp, str ); \
176 printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \
177 }
178#else
179#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
180#endif
181
182
183
184
185#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0
186#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7
187
188#define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */
189#define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */
190
191#define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
192#define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
193
194extern int tx4927_using_backplane;
195
196static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
197static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
198
199#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
200static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
201 .name = TOSHIBA_RBTX4927_IOC_NAME,
202 .ack = toshiba_rbtx4927_irq_ioc_disable,
203 .mask = toshiba_rbtx4927_irq_ioc_disable,
204 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
205 .unmask = toshiba_rbtx4927_irq_ioc_enable,
206};
207#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
208#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
209
210
211u32 bit2num(u32 num)
212{
213 u32 i;
214
215 for (i = 0; i < (sizeof(num) * 8); i++) {
216 if (num & (1 << i)) {
217 return (i);
218 }
219 }
220 return (0);
221}
222
223int toshiba_rbtx4927_irq_nested(int sw_irq)
224{
225 u32 level3;
226
227 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
228 if (level3) {
229 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
230 if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
231 goto RETURN;
232 }
233 }
234#ifdef CONFIG_TOSHIBA_FPCIB0
235 if (tx4927_using_backplane) {
236 int irq = i8259_irq();
237 if (irq >= 0)
238 sw_irq = irq;
239 }
240#endif
241
242 RETURN:
243 return (sw_irq);
244}
245
246static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
247 .handler = no_action,
248 .flags = IRQF_SHARED,
249 .mask = CPU_MASK_NONE,
250 .name = TOSHIBA_RBTX4927_IOC_NAME
251};
252
253
254/**********************************************************************************/
255/* Functions for ioc */
256/**********************************************************************************/
257
258
259static void __init toshiba_rbtx4927_irq_ioc_init(void)
260{
261 int i;
262
263 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
264 "beg=%d end=%d\n",
265 TOSHIBA_RBTX4927_IRQ_IOC_BEG,
266 TOSHIBA_RBTX4927_IRQ_IOC_END);
267
268 for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
269 i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
270 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
271 handle_level_irq);
272
273 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
274 &toshiba_rbtx4927_irq_ioc_action);
275}
276
277static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
278{
279 volatile unsigned char v;
280
281 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
282 "irq=%d\n", irq);
283
284 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
285 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
286 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
287 "bad irq=%d\n", irq);
288 panic("\n");
289 }
290
291 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
292 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
293 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
294}
295
296
297static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
298{
299 volatile unsigned char v;
300
301 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
302 "irq=%d\n", irq);
303
304 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
305 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
306 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
307 "bad irq=%d\n", irq);
308 panic("\n");
309 }
310
311 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
312 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
313 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
314 mmiowb();
315}
316
317
318void __init arch_init_irq(void)
319{
320 extern void tx4927_irq_init(void);
321
322 tx4927_irq_init();
323 toshiba_rbtx4927_irq_ioc_init();
324#ifdef CONFIG_TOSHIBA_FPCIB0
325 if (tx4927_using_backplane)
326 init_i8259_irqs();
327#endif
328 /* Onboard 10M Ether: High Active */
329 set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
330
331 wbflush();
332}
333
334void toshiba_rbtx4927_irq_dump(char *key)
335{
336#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
337 {
338 u32 i, j = 0;
339 for (i = 0; i < NR_IRQS; i++) {
340 if (strcmp(irq_desc[i].chip->name, "none")
341 == 0)
342 continue;
343
344 if ((i >= 1)
345 && (irq_desc[i - 1].chip->name ==
346 irq_desc[i].chip->name)) {
347 j++;
348 } else {
349 j = 0;
350 }
351 TOSHIBA_RBTX4927_IRQ_DPRINTK
352 (TOSHIBA_RBTX4927_IRQ_INFO,
353 "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
354 key, i, i, irq_desc[i].status,
355 (u32) irq_desc[i].chip,
356 (u32) irq_desc[i].action,
357 (u32) (irq_desc[i].action ? irq_desc[i].
358 action->handler : 0),
359 irq_desc[i].depth,
360 irq_desc[i].chip->name, j);
361 }
362 }
363#endif
364}
365
366void toshiba_rbtx4927_irq_dump_pics(char *s)
367{
368 u32 level0_m;
369 u32 level0_s;
370 u32 level1_m;
371 u32 level1_s;
372 u32 level2;
373 u32 level2_p;
374 u32 level2_s;
375 u32 level3_m;
376 u32 level3_s;
377 u32 level4_m;
378 u32 level4_s;
379 u32 level5_m;
380 u32 level5_s;
381
382 if (s == NULL)
383 s = "null";
384
385 level0_m = (read_c0_status() & 0x0000ff00) >> 8;
386 level0_s = (read_c0_cause() & 0x0000ff00) >> 8;
387
388 level1_m = level0_m;
389 level1_s = level0_s & 0x87;
390
391 level2 = __raw_readl((void __iomem *)0xff1ff6a0UL);
392 level2_p = (((level2 & 0x10000)) ? 0 : 1);
393 level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
394
395 level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
396 level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
397
398 level4_m = inb(0x21);
399 outb(0x0A, 0x20);
400 level4_s = inb(0x20);
401
402 level5_m = inb(0xa1);
403 outb(0x0A, 0xa0);
404 level5_s = inb(0xa0);
405
406 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
407 "dump_raw_pic() ");
408 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
409 "cp0:m=0x%02x/s=0x%02x ", level0_m,
410 level0_s);
411 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
412 "cp0:m=0x%02x/s=0x%02x ", level1_m,
413 level1_s);
414 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
415 "pic:e=0x%02x/s=0x%02x ", level2_p,
416 level2_s);
417 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
418 "ioc:m=0x%02x/s=0x%02x ", level3_m,
419 level3_s);
420 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
421 "sbm:m=0x%02x/s=0x%02x ", level4_m,
422 level4_s);
423 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
424 "sbs:m=0x%02x/s=0x%02x ", level5_m,
425 level5_s);
426 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
427 s);
428}
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
deleted file mode 100644
index f3f86857beae..000000000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
+++ /dev/null
@@ -1,94 +0,0 @@
1/*
2 * rbtx4927 specific prom routines
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * Copyright 2001-2002 MontaVista Software Inc.
8 *
9 * Copyright (C) 2004 MontaVista Software Inc.
10 * Author: Manish Lachwani, mlachwani@mvista.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
23 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
26 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32#include <linux/init.h>
33#include <linux/mm.h>
34#include <linux/sched.h>
35#include <linux/bootmem.h>
36
37#include <asm/addrspace.h>
38#include <asm/bootinfo.h>
39#include <asm/cpu.h>
40#include <asm/tx4927/tx4927.h>
41
42void __init prom_init_cmdline(void)
43{
44 int argc = (int) fw_arg0;
45 char **argv = (char **) fw_arg1;
46 int i; /* Always ignore the "-c" at argv[0] */
47
48 /* ignore all built-in args if any f/w args given */
49 if (argc > 1) {
50 *arcs_cmdline = '\0';
51 }
52
53 for (i = 1; i < argc; i++) {
54 if (i != 1) {
55 strcat(arcs_cmdline, " ");
56 }
57 strcat(arcs_cmdline, argv[i]);
58 }
59}
60
61void __init prom_init(void)
62{
63 extern int tx4927_get_mem_size(void);
64 extern char* toshiba_name;
65 int msize;
66
67 prom_init_cmdline();
68
69 if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) {
70 mips_machtype = MACH_TOSHIBA_RBTX4927;
71 toshiba_name = "TX4927";
72 } else {
73 mips_machtype = MACH_TOSHIBA_RBTX4937;
74 toshiba_name = "TX4937";
75 }
76
77 msize = tx4927_get_mem_size();
78 add_memory_region(0, msize << 20, BOOT_MEM_RAM);
79}
80
81void __init prom_free_prom_memory(void)
82{
83}
84
85const char *get_system_type(void)
86{
87 return "Toshiba RBTX4927/RBTX4937";
88}
89
90char * __init prom_getcmdline(void)
91{
92 return &(arcs_cmdline[0]);
93}
94
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
deleted file mode 100644
index 2203c77b2ce2..000000000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ /dev/null
@@ -1,1001 +0,0 @@
1/*
2 * Toshiba rbtx4927 specific setup
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * Copyright 2001-2002 MontaVista Software Inc.
8 *
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
10 * Copyright (C) 2000 RidgeRun, Inc.
11 * Author: RidgeRun, Inc.
12 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
13 *
14 * Copyright 2001 MontaVista Software Inc.
15 * Author: jsun@mvista.com or jsun@junsun.net
16 *
17 * Copyright 2002 MontaVista Software Inc.
18 * Author: Michael Pruznick, michael_pruznick@mvista.com
19 *
20 * Copyright (C) 2000-2001 Toshiba Corporation
21 *
22 * Copyright (C) 2004 MontaVista Software Inc.
23 * Author: Manish Lachwani, mlachwani@mvista.com
24 *
25 * This program is free software; you can redistribute it and/or modify it
26 * under the terms of the GNU General Public License as published by the
27 * Free Software Foundation; either version 2 of the License, or (at your
28 * option) any later version.
29 *
30 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
33 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
36 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
38 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
39 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * You should have received a copy of the GNU General Public License along
42 * with this program; if not, write to the Free Software Foundation, Inc.,
43 * 675 Mass Ave, Cambridge, MA 02139, USA.
44 */
45#include <linux/init.h>
46#include <linux/kernel.h>
47#include <linux/types.h>
48#include <linux/ioport.h>
49#include <linux/interrupt.h>
50#include <linux/pci.h>
51#include <linux/pm.h>
52#include <linux/platform_device.h>
53#include <linux/clk.h>
54
55#include <asm/bootinfo.h>
56#include <asm/io.h>
57#include <asm/processor.h>
58#include <asm/reboot.h>
59#include <asm/time.h>
60#include <asm/txx9tmr.h>
61#ifdef CONFIG_TOSHIBA_FPCIB0
62#include <asm/tx4927/smsc_fdc37m81x.h>
63#endif
64#include <asm/tx4927/toshiba_rbtx4927.h>
65#ifdef CONFIG_PCI
66#include <asm/tx4927/tx4927_pci.h>
67#endif
68#ifdef CONFIG_SERIAL_TXX9
69#include <linux/serial_core.h>
70#endif
71
72#undef TOSHIBA_RBTX4927_SETUP_DEBUG
73
74#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
75#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 )
76#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 )
77#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 )
78#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 )
79
80#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
81#endif
82
83#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
84static const u32 toshiba_rbtx4927_setup_debug_flag =
85 (TOSHIBA_RBTX4927_SETUP_SETUP |
86 | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
87 TOSHIBA_RBTX4927_SETUP_PCI2);
88#endif
89
90#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
91#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...) \
92 if ( (toshiba_rbtx4927_setup_debug_flag) & (flag) ) \
93 { \
94 char tmp[100]; \
95 sprintf( tmp, str ); \
96 printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \
97 }
98#else
99#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag, str...)
100#endif
101
102/* These functions are used for rebooting or halting the machine*/
103extern void toshiba_rbtx4927_restart(char *command);
104extern void toshiba_rbtx4927_halt(void);
105extern void toshiba_rbtx4927_power_off(void);
106
107int tx4927_using_backplane = 0;
108
109extern void toshiba_rbtx4927_irq_setup(void);
110
111char *prom_getcmdline(void);
112
113#ifdef CONFIG_PCI
114#undef TX4927_SUPPORT_COMMAND_IO
115#undef TX4927_SUPPORT_PCI_66
116int tx4927_cpu_clock = 100000000; /* 100MHz */
117unsigned long mips_pci_io_base;
118unsigned long mips_pci_io_size;
119unsigned long mips_pci_mem_base;
120unsigned long mips_pci_mem_size;
121/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
122unsigned long mips_pci_io_pciaddr = 0;
123unsigned long mips_memory_upper;
124static int tx4927_ccfg_toeon = 1;
125static int tx4927_pcic_trdyto = 0; /* default: disabled */
126unsigned long tx4927_ce_base[8];
127void tx4927_reset_pci_pcic(void);
128int tx4927_pci66 = 0; /* 0:auto */
129#endif
130
131char *toshiba_name = "";
132
133#ifdef CONFIG_PCI
134extern struct pci_controller tx4927_controller;
135
136static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
137 int top_bus, int busnr, int devfn)
138{
139 static struct pci_dev dev;
140 static struct pci_bus bus;
141
142 dev.sysdata = (void *)hose;
143 dev.devfn = devfn;
144 bus.number = busnr;
145 bus.ops = hose->pci_ops;
146 bus.parent = NULL;
147 dev.bus = &bus;
148
149 return &dev;
150}
151
152#define EARLY_PCI_OP(rw, size, type) \
153static int early_##rw##_config_##size(struct pci_controller *hose, \
154 int top_bus, int bus, int devfn, int offset, type value) \
155{ \
156 return pci_##rw##_config_##size( \
157 fake_pci_dev(hose, top_bus, bus, devfn), \
158 offset, value); \
159}
160
161EARLY_PCI_OP(read, byte, u8 *)
162EARLY_PCI_OP(read, dword, u32 *)
163EARLY_PCI_OP(write, byte, u8)
164EARLY_PCI_OP(write, dword, u32)
165
166static int __init tx4927_pcibios_init(void)
167{
168 unsigned int id;
169 u32 pci_devfn;
170 int devfn_start = 0;
171 int devfn_stop = 0xff;
172 int busno = 0; /* One bus on the Toshiba */
173 struct pci_controller *hose = &tx4927_controller;
174
175 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
176 "-\n");
177
178 for (pci_devfn = devfn_start; pci_devfn < devfn_stop; pci_devfn++) {
179 early_read_config_dword(hose, busno, busno, pci_devfn,
180 PCI_VENDOR_ID, &id);
181
182 if (id == 0xffffffff) {
183 continue;
184 }
185
186 if (id == 0x94601055) {
187 u8 v08_64;
188 u32 v32_b0;
189 u8 v08_e1;
190#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
191 char *s = " sb/isa --";
192#endif
193
194 TOSHIBA_RBTX4927_SETUP_DPRINTK
195 (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
196 s);
197
198 early_read_config_byte(hose, busno, busno,
199 pci_devfn, 0x64, &v08_64);
200 early_read_config_dword(hose, busno, busno,
201 pci_devfn, 0xb0, &v32_b0);
202 early_read_config_byte(hose, busno, busno,
203 pci_devfn, 0xe1, &v08_e1);
204
205 TOSHIBA_RBTX4927_SETUP_DPRINTK
206 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
207 ":%s beg 0x64 = 0x%02x\n", s, v08_64);
208 TOSHIBA_RBTX4927_SETUP_DPRINTK
209 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
210 ":%s beg 0xb0 = 0x%02x\n", s, v32_b0);
211 TOSHIBA_RBTX4927_SETUP_DPRINTK
212 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
213 ":%s beg 0xe1 = 0x%02x\n", s, v08_e1);
214
215 /* serial irq control */
216 v08_64 = 0xd0;
217
218 /* serial irq pin */
219 v32_b0 |= 0x00010000;
220
221 /* ide irq on isa14 */
222 v08_e1 &= 0xf0;
223 v08_e1 |= 0x0d;
224
225 TOSHIBA_RBTX4927_SETUP_DPRINTK
226 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
227 ":%s mid 0x64 = 0x%02x\n", s, v08_64);
228 TOSHIBA_RBTX4927_SETUP_DPRINTK
229 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
230 ":%s mid 0xb0 = 0x%02x\n", s, v32_b0);
231 TOSHIBA_RBTX4927_SETUP_DPRINTK
232 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
233 ":%s mid 0xe1 = 0x%02x\n", s, v08_e1);
234
235 early_write_config_byte(hose, busno, busno,
236 pci_devfn, 0x64, v08_64);
237 early_write_config_dword(hose, busno, busno,
238 pci_devfn, 0xb0, v32_b0);
239 early_write_config_byte(hose, busno, busno,
240 pci_devfn, 0xe1, v08_e1);
241
242#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
243 {
244 early_read_config_byte(hose, busno, busno,
245 pci_devfn, 0x64,
246 &v08_64);
247 early_read_config_dword(hose, busno, busno,
248 pci_devfn, 0xb0,
249 &v32_b0);
250 early_read_config_byte(hose, busno, busno,
251 pci_devfn, 0xe1,
252 &v08_e1);
253
254 TOSHIBA_RBTX4927_SETUP_DPRINTK
255 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
256 ":%s end 0x64 = 0x%02x\n", s, v08_64);
257 TOSHIBA_RBTX4927_SETUP_DPRINTK
258 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
259 ":%s end 0xb0 = 0x%02x\n", s, v32_b0);
260 TOSHIBA_RBTX4927_SETUP_DPRINTK
261 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
262 ":%s end 0xe1 = 0x%02x\n", s, v08_e1);
263 }
264#endif
265
266 TOSHIBA_RBTX4927_SETUP_DPRINTK
267 (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
268 s);
269 }
270
271 if (id == 0x91301055) {
272 u8 v08_04;
273 u8 v08_09;
274 u8 v08_41;
275 u8 v08_43;
276 u8 v08_5c;
277#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
278 char *s = " sb/ide --";
279#endif
280
281 TOSHIBA_RBTX4927_SETUP_DPRINTK
282 (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
283 s);
284
285 early_read_config_byte(hose, busno, busno,
286 pci_devfn, 0x04, &v08_04);
287 early_read_config_byte(hose, busno, busno,
288 pci_devfn, 0x09, &v08_09);
289 early_read_config_byte(hose, busno, busno,
290 pci_devfn, 0x41, &v08_41);
291 early_read_config_byte(hose, busno, busno,
292 pci_devfn, 0x43, &v08_43);
293 early_read_config_byte(hose, busno, busno,
294 pci_devfn, 0x5c, &v08_5c);
295
296 TOSHIBA_RBTX4927_SETUP_DPRINTK
297 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
298 ":%s beg 0x04 = 0x%02x\n", s, v08_04);
299 TOSHIBA_RBTX4927_SETUP_DPRINTK
300 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
301 ":%s beg 0x09 = 0x%02x\n", s, v08_09);
302 TOSHIBA_RBTX4927_SETUP_DPRINTK
303 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
304 ":%s beg 0x41 = 0x%02x\n", s, v08_41);
305 TOSHIBA_RBTX4927_SETUP_DPRINTK
306 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
307 ":%s beg 0x43 = 0x%02x\n", s, v08_43);
308 TOSHIBA_RBTX4927_SETUP_DPRINTK
309 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
310 ":%s beg 0x5c = 0x%02x\n", s, v08_5c);
311
312 /* enable ide master/io */
313 v08_04 |= (PCI_COMMAND_MASTER | PCI_COMMAND_IO);
314
315 /* enable ide native mode */
316 v08_09 |= 0x05;
317
318 /* enable primary ide */
319 v08_41 |= 0x80;
320
321 /* enable secondary ide */
322 v08_43 |= 0x80;
323
324 /*
325 * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
326 *
327 * This line of code is intended to provide the user with a work
328 * around solution to the anomalies cited in SMSC's anomaly sheet
329 * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
330 *
331 * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
332 */
333 v08_5c |= 0x01;
334
335 TOSHIBA_RBTX4927_SETUP_DPRINTK
336 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
337 ":%s mid 0x04 = 0x%02x\n", s, v08_04);
338 TOSHIBA_RBTX4927_SETUP_DPRINTK
339 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
340 ":%s mid 0x09 = 0x%02x\n", s, v08_09);
341 TOSHIBA_RBTX4927_SETUP_DPRINTK
342 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
343 ":%s mid 0x41 = 0x%02x\n", s, v08_41);
344 TOSHIBA_RBTX4927_SETUP_DPRINTK
345 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
346 ":%s mid 0x43 = 0x%02x\n", s, v08_43);
347 TOSHIBA_RBTX4927_SETUP_DPRINTK
348 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
349 ":%s mid 0x5c = 0x%02x\n", s, v08_5c);
350
351 early_write_config_byte(hose, busno, busno,
352 pci_devfn, 0x5c, v08_5c);
353 early_write_config_byte(hose, busno, busno,
354 pci_devfn, 0x04, v08_04);
355 early_write_config_byte(hose, busno, busno,
356 pci_devfn, 0x09, v08_09);
357 early_write_config_byte(hose, busno, busno,
358 pci_devfn, 0x41, v08_41);
359 early_write_config_byte(hose, busno, busno,
360 pci_devfn, 0x43, v08_43);
361
362#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
363 {
364 early_read_config_byte(hose, busno, busno,
365 pci_devfn, 0x04,
366 &v08_04);
367 early_read_config_byte(hose, busno, busno,
368 pci_devfn, 0x09,
369 &v08_09);
370 early_read_config_byte(hose, busno, busno,
371 pci_devfn, 0x41,
372 &v08_41);
373 early_read_config_byte(hose, busno, busno,
374 pci_devfn, 0x43,
375 &v08_43);
376 early_read_config_byte(hose, busno, busno,
377 pci_devfn, 0x5c,
378 &v08_5c);
379
380 TOSHIBA_RBTX4927_SETUP_DPRINTK
381 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
382 ":%s end 0x04 = 0x%02x\n", s, v08_04);
383 TOSHIBA_RBTX4927_SETUP_DPRINTK
384 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
385 ":%s end 0x09 = 0x%02x\n", s, v08_09);
386 TOSHIBA_RBTX4927_SETUP_DPRINTK
387 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
388 ":%s end 0x41 = 0x%02x\n", s, v08_41);
389 TOSHIBA_RBTX4927_SETUP_DPRINTK
390 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
391 ":%s end 0x43 = 0x%02x\n", s, v08_43);
392 TOSHIBA_RBTX4927_SETUP_DPRINTK
393 (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
394 ":%s end 0x5c = 0x%02x\n", s, v08_5c);
395 }
396#endif
397
398 TOSHIBA_RBTX4927_SETUP_DPRINTK
399 (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
400 s);
401 }
402
403 }
404
405 register_pci_controller(&tx4927_controller);
406 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
407 "+\n");
408
409 return 0;
410}
411
412arch_initcall(tx4927_pcibios_init);
413
414extern struct resource pci_io_resource;
415extern struct resource pci_mem_resource;
416
417void __init tx4927_pci_setup(void)
418{
419 static int called = 0;
420 extern unsigned int tx4927_get_mem_size(void);
421
422 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "-\n");
423
424 mips_memory_upper = tx4927_get_mem_size() << 20;
425 mips_memory_upper += KSEG0;
426 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
427 "0x%08lx=mips_memory_upper\n",
428 mips_memory_upper);
429 mips_pci_io_base = TX4927_PCIIO;
430 mips_pci_io_size = TX4927_PCIIO_SIZE;
431 mips_pci_mem_base = TX4927_PCIMEM;
432 mips_pci_mem_size = TX4927_PCIMEM_SIZE;
433
434 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
435 "0x%08lx=mips_pci_io_base\n",
436 mips_pci_io_base);
437 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
438 "0x%08lx=mips_pci_io_size\n",
439 mips_pci_io_size);
440 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
441 "0x%08lx=mips_pci_mem_base\n",
442 mips_pci_mem_base);
443 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
444 "0x%08lx=mips_pci_mem_size\n",
445 mips_pci_mem_size);
446 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
447 "0x%08lx=pci_io_resource.start\n",
448 pci_io_resource.start);
449 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
450 "0x%08lx=pci_io_resource.end\n",
451 pci_io_resource.end);
452 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
453 "0x%08lx=pci_mem_resource.start\n",
454 pci_mem_resource.start);
455 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
456 "0x%08lx=pci_mem_resource.end\n",
457 pci_mem_resource.end);
458 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
459 "0x%08lx=mips_io_port_base",
460 mips_io_port_base);
461 if (!called) {
462 printk
463 ("%s PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
464 toshiba_name,
465 (unsigned short) (tx4927_pcicptr->pciid >> 16),
466 (unsigned short) (tx4927_pcicptr->pciid & 0xffff),
467 (unsigned short) (tx4927_pcicptr->pciccrev & 0xff),
468 (!(tx4927_ccfgptr->
469 ccfg & TX4927_CCFG_PCIXARB)) ? "External" :
470 "Internal");
471 called = 1;
472 }
473 printk("%s PCIC --%s PCICLK:", toshiba_name,
474 (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
475 if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
476 int pciclk = 0;
477 if (mips_machtype == MACH_TOSHIBA_RBTX4937)
478 switch ((unsigned long) tx4927_ccfgptr->
479 ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
480 case TX4937_CCFG_PCIDIVMODE_4:
481 pciclk = tx4927_cpu_clock / 4;
482 break;
483 case TX4937_CCFG_PCIDIVMODE_4_5:
484 pciclk = tx4927_cpu_clock * 2 / 9;
485 break;
486 case TX4937_CCFG_PCIDIVMODE_5:
487 pciclk = tx4927_cpu_clock / 5;
488 break;
489 case TX4937_CCFG_PCIDIVMODE_5_5:
490 pciclk = tx4927_cpu_clock * 2 / 11;
491 break;
492 case TX4937_CCFG_PCIDIVMODE_8:
493 pciclk = tx4927_cpu_clock / 8;
494 break;
495 case TX4937_CCFG_PCIDIVMODE_9:
496 pciclk = tx4927_cpu_clock / 9;
497 break;
498 case TX4937_CCFG_PCIDIVMODE_10:
499 pciclk = tx4927_cpu_clock / 10;
500 break;
501 case TX4937_CCFG_PCIDIVMODE_11:
502 pciclk = tx4927_cpu_clock / 11;
503 break;
504 }
505
506 else
507 switch ((unsigned long) tx4927_ccfgptr->
508 ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
509 case TX4927_CCFG_PCIDIVMODE_2_5:
510 pciclk = tx4927_cpu_clock * 2 / 5;
511 break;
512 case TX4927_CCFG_PCIDIVMODE_3:
513 pciclk = tx4927_cpu_clock / 3;
514 break;
515 case TX4927_CCFG_PCIDIVMODE_5:
516 pciclk = tx4927_cpu_clock / 5;
517 break;
518 case TX4927_CCFG_PCIDIVMODE_6:
519 pciclk = tx4927_cpu_clock / 6;
520 break;
521 }
522
523 printk("Internal(%dMHz)", pciclk / 1000000);
524 } else {
525 int pciclk = 0;
526 int pciclk_setting = *tx4927_pci_clk_ptr;
527 switch (pciclk_setting & TX4927_PCI_CLK_MASK) {
528 case TX4927_PCI_CLK_33:
529 pciclk = 33333333;
530 break;
531 case TX4927_PCI_CLK_25:
532 pciclk = 25000000;
533 break;
534 case TX4927_PCI_CLK_66:
535 pciclk = 66666666;
536 break;
537 case TX4927_PCI_CLK_50:
538 pciclk = 50000000;
539 break;
540 }
541 printk("External(%dMHz)", pciclk / 1000000);
542 }
543 printk("\n");
544
545
546
547 /* GB->PCI mappings */
548 tx4927_pcicptr->g2piomask = (mips_pci_io_size - 1) >> 4;
549 tx4927_pcicptr->g2piogbase = mips_pci_io_base |
550#ifdef __BIG_ENDIAN
551 TX4927_PCIC_G2PIOGBASE_ECHG
552#else
553 TX4927_PCIC_G2PIOGBASE_BSDIS
554#endif
555 ;
556
557 tx4927_pcicptr->g2piopbase = 0;
558
559 tx4927_pcicptr->g2pmmask[0] = (mips_pci_mem_size - 1) >> 4;
560 tx4927_pcicptr->g2pmgbase[0] = mips_pci_mem_base |
561#ifdef __BIG_ENDIAN
562 TX4927_PCIC_G2PMnGBASE_ECHG
563#else
564 TX4927_PCIC_G2PMnGBASE_BSDIS
565#endif
566 ;
567 tx4927_pcicptr->g2pmpbase[0] = mips_pci_mem_base;
568
569 tx4927_pcicptr->g2pmmask[1] = 0;
570 tx4927_pcicptr->g2pmgbase[1] = 0;
571 tx4927_pcicptr->g2pmpbase[1] = 0;
572 tx4927_pcicptr->g2pmmask[2] = 0;
573 tx4927_pcicptr->g2pmgbase[2] = 0;
574 tx4927_pcicptr->g2pmpbase[2] = 0;
575
576
577 /* PCI->GB mappings (I/O 256B) */
578 tx4927_pcicptr->p2giopbase = 0; /* 256B */
579
580 /* PCI->GB mappings (MEM 512MB) M0 gets all of memory */
581 tx4927_pcicptr->p2gm0plbase = 0;
582 tx4927_pcicptr->p2gm0pubase = 0;
583 tx4927_pcicptr->p2gmgbase[0] = 0 | TX4927_PCIC_P2GMnGBASE_TMEMEN |
584#ifdef __BIG_ENDIAN
585 TX4927_PCIC_P2GMnGBASE_TECHG
586#else
587 TX4927_PCIC_P2GMnGBASE_TBSDIS
588#endif
589 ;
590
591 /* PCI->GB mappings (MEM 16MB) -not used */
592 tx4927_pcicptr->p2gm1plbase = 0xffffffff;
593 tx4927_pcicptr->p2gm1pubase = 0xffffffff;
594 tx4927_pcicptr->p2gmgbase[1] = 0;
595
596 /* PCI->GB mappings (MEM 1MB) -not used */
597 tx4927_pcicptr->p2gm2pbase = 0xffffffff;
598 tx4927_pcicptr->p2gmgbase[2] = 0;
599
600
601 /* Enable Initiator Memory 0 Space, I/O Space, Config */
602 tx4927_pcicptr->pciccfg &= TX4927_PCIC_PCICCFG_LBWC_MASK;
603 tx4927_pcicptr->pciccfg |=
604 TX4927_PCIC_PCICCFG_IMSE0 | TX4927_PCIC_PCICCFG_IISE |
605 TX4927_PCIC_PCICCFG_ICAE | TX4927_PCIC_PCICCFG_ATR;
606
607
608 /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
609 tx4927_pcicptr->pcicfg1 = 0;
610
611 if (tx4927_pcic_trdyto >= 0) {
612 tx4927_pcicptr->g2ptocnt &= ~0xff;
613 tx4927_pcicptr->g2ptocnt |= (tx4927_pcic_trdyto & 0xff);
614 }
615
616 /* Clear All Local Bus Status */
617 tx4927_pcicptr->pcicstatus = TX4927_PCIC_PCICSTATUS_ALL;
618 /* Enable All Local Bus Interrupts */
619 tx4927_pcicptr->pcicmask = TX4927_PCIC_PCICSTATUS_ALL;
620 /* Clear All Initiator Status */
621 tx4927_pcicptr->g2pstatus = TX4927_PCIC_G2PSTATUS_ALL;
622 /* Enable All Initiator Interrupts */
623 tx4927_pcicptr->g2pmask = TX4927_PCIC_G2PSTATUS_ALL;
624 /* Clear All PCI Status Error */
625 tx4927_pcicptr->pcistatus =
626 (tx4927_pcicptr->pcistatus & 0x0000ffff) |
627 (TX4927_PCIC_PCISTATUS_ALL << 16);
628 /* Enable All PCI Status Error Interrupts */
629 tx4927_pcicptr->pcimask = TX4927_PCIC_PCISTATUS_ALL;
630
631 /* PCIC Int => IRC IRQ16 */
632 tx4927_pcicptr->pcicfg2 =
633 (tx4927_pcicptr->pcicfg2 & 0xffffff00) | TX4927_IR_PCIC;
634
635 if (!(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCIXARB)) {
636 /* XXX */
637 } else {
638 /* Reset Bus Arbiter */
639 tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_RPBA;
640 /* Enable Bus Arbiter */
641 tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_PBAEN;
642 }
643
644 tx4927_pcicptr->pcistatus = PCI_COMMAND_MASTER |
645 PCI_COMMAND_MEMORY |
646 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
647
648 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
649 ":pci setup complete:\n");
650 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "+\n");
651}
652
653#endif /* CONFIG_PCI */
654
655static void __noreturn wait_forever(void)
656{
657 while (1)
658 if (cpu_wait)
659 (*cpu_wait)();
660}
661
662void toshiba_rbtx4927_restart(char *command)
663{
664 printk(KERN_NOTICE "System Rebooting...\n");
665
666 /* enable the s/w reset register */
667 writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
668
669 /* wait for enable to be seen */
670 while ((readb(RBTX4927_SW_RESET_ENABLE) &
671 RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
672
673 /* do a s/w reset */
674 writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
675
676 /* do something passive while waiting for reset */
677 local_irq_disable();
678 wait_forever();
679 /* no return */
680}
681
682
683void toshiba_rbtx4927_halt(void)
684{
685 printk(KERN_NOTICE "System Halted\n");
686 local_irq_disable();
687 wait_forever();
688 /* no return */
689}
690
691void toshiba_rbtx4927_power_off(void)
692{
693 toshiba_rbtx4927_halt();
694 /* no return */
695}
696
697void __init plat_mem_setup(void)
698{
699 int i;
700 u32 cp0_config;
701 char *argptr;
702
703 printk("CPU is %s\n", toshiba_name);
704
705 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
706 "-\n");
707
708 /* f/w leaves this on at startup */
709 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
710 ":Clearing STO_ERL.\n");
711 clear_c0_status(ST0_ERL);
712
713 /* enable caches -- HCP5 does this, pmon does not */
714 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
715 ":Enabling TX49_CONF_IC,TX49_CONF_DC.\n");
716 cp0_config = read_c0_config();
717 cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
718 write_c0_config(cp0_config);
719
720 set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET);
721 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
722 ":mips_io_port_base=0x%08lx\n",
723 mips_io_port_base);
724
725 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
726 ":Resource\n");
727 ioport_resource.end = 0xffffffff;
728 iomem_resource.end = 0xffffffff;
729
730 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
731 ":ResetRoutines\n");
732 _machine_restart = toshiba_rbtx4927_restart;
733 _machine_halt = toshiba_rbtx4927_halt;
734 pm_power_off = toshiba_rbtx4927_power_off;
735
736 for (i = 0; i < TX4927_NR_TMR; i++)
737 txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
738
739#ifdef CONFIG_PCI
740
741 /* PCIC */
742 /*
743 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
744 *
745 * For TX4927:
746 * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
747 * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
748 * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
749 * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
750 * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
751 * i.e. S9[3]: ON (83MHz), OFF (100MHz)
752 *
753 * For TX4937:
754 * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
755 * PCIDIVMODE[10] is 0.
756 * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
757 * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
758 * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
759 * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
760 * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
761 * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
762 *
763 */
764 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
765 "ccfg is %lx, PCIDIVMODE is %x\n",
766 (unsigned long) tx4927_ccfgptr->ccfg,
767 (unsigned long) tx4927_ccfgptr->ccfg &
768 (mips_machtype == MACH_TOSHIBA_RBTX4937 ?
769 TX4937_CCFG_PCIDIVMODE_MASK :
770 TX4927_CCFG_PCIDIVMODE_MASK));
771
772 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
773 "PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n",
774 (unsigned long) tx4927_ccfgptr->
775 ccfg & TX4927_CCFG_PCI66,
776 (unsigned long) tx4927_ccfgptr->
777 ccfg & TX4927_CCFG_PCIMIDE,
778 (unsigned long) tx4927_ccfgptr->
779 ccfg & TX4927_CCFG_PCIXARB);
780
781 if (mips_machtype == MACH_TOSHIBA_RBTX4937)
782 switch ((unsigned long)tx4927_ccfgptr->
783 ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
784 case TX4937_CCFG_PCIDIVMODE_8:
785 case TX4937_CCFG_PCIDIVMODE_4:
786 tx4927_cpu_clock = 266666666; /* 266MHz */
787 break;
788 case TX4937_CCFG_PCIDIVMODE_9:
789 case TX4937_CCFG_PCIDIVMODE_4_5:
790 tx4927_cpu_clock = 300000000; /* 300MHz */
791 break;
792 default:
793 tx4927_cpu_clock = 333333333; /* 333MHz */
794 }
795 else
796 switch ((unsigned long)tx4927_ccfgptr->
797 ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
798 case TX4927_CCFG_PCIDIVMODE_2_5:
799 case TX4927_CCFG_PCIDIVMODE_5:
800 tx4927_cpu_clock = 166666666; /* 166MHz */
801 break;
802 default:
803 tx4927_cpu_clock = 200000000; /* 200MHz */
804 }
805
806 /* CCFG */
807 /* do reset on watchdog */
808 tx4927_ccfgptr->ccfg |= TX4927_CCFG_WR;
809 /* enable Timeout BusError */
810 if (tx4927_ccfg_toeon)
811 tx4927_ccfgptr->ccfg |= TX4927_CCFG_TOE;
812
813 tx4927_pci_setup();
814 if (tx4927_using_backplane == 1)
815 printk("backplane board IS installed\n");
816 else
817 printk("No Backplane \n");
818
819 /* this is on ISA bus behind PCI bus, so need PCI up first */
820#ifdef CONFIG_TOSHIBA_FPCIB0
821 {
822 if (tx4927_using_backplane) {
823 TOSHIBA_RBTX4927_SETUP_DPRINTK
824 (TOSHIBA_RBTX4927_SETUP_SETUP,
825 ":fpcibo=yes\n");
826
827 TOSHIBA_RBTX4927_SETUP_DPRINTK
828 (TOSHIBA_RBTX4927_SETUP_SETUP,
829 ":smsc_fdc37m81x_init()\n");
830 smsc_fdc37m81x_init(0x3f0);
831
832 TOSHIBA_RBTX4927_SETUP_DPRINTK
833 (TOSHIBA_RBTX4927_SETUP_SETUP,
834 ":smsc_fdc37m81x_config_beg()\n");
835 smsc_fdc37m81x_config_beg();
836
837 TOSHIBA_RBTX4927_SETUP_DPRINTK
838 (TOSHIBA_RBTX4927_SETUP_SETUP,
839 ":smsc_fdc37m81x_config_set(KBD)\n");
840 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
841 SMSC_FDC37M81X_KBD);
842 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
843 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
844 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
845 1);
846
847 smsc_fdc37m81x_config_end();
848 TOSHIBA_RBTX4927_SETUP_DPRINTK
849 (TOSHIBA_RBTX4927_SETUP_SETUP,
850 ":smsc_fdc37m81x_config_end()\n");
851 } else {
852 TOSHIBA_RBTX4927_SETUP_DPRINTK
853 (TOSHIBA_RBTX4927_SETUP_SETUP,
854 ":fpcibo=not_found\n");
855 }
856 }
857#else
858 {
859 TOSHIBA_RBTX4927_SETUP_DPRINTK
860 (TOSHIBA_RBTX4927_SETUP_SETUP, ":fpcibo=no\n");
861 }
862#endif
863
864#endif /* CONFIG_PCI */
865
866#ifdef CONFIG_SERIAL_TXX9
867 {
868 extern int early_serial_txx9_setup(struct uart_port *port);
869 struct uart_port req;
870 for(i = 0; i < 2; i++) {
871 memset(&req, 0, sizeof(req));
872 req.line = i;
873 req.iotype = UPIO_MEM;
874 req.membase = (char *)(0xff1ff300 + i * 0x100);
875 req.mapbase = 0xff1ff300 + i * 0x100;
876 req.irq = TX4927_IRQ_PIC_BEG + 8 + i;
877 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
878 req.uartclk = 50000000;
879 early_serial_txx9_setup(&req);
880 }
881 }
882#ifdef CONFIG_SERIAL_TXX9_CONSOLE
883 argptr = prom_getcmdline();
884 if (strstr(argptr, "console=") == NULL) {
885 strcat(argptr, " console=ttyS0,38400");
886 }
887#endif
888#endif
889
890#ifdef CONFIG_ROOT_NFS
891 argptr = prom_getcmdline();
892 if (strstr(argptr, "root=") == NULL) {
893 strcat(argptr, " root=/dev/nfs rw");
894 }
895#endif
896
897
898#ifdef CONFIG_IP_PNP
899 argptr = prom_getcmdline();
900 if (strstr(argptr, "ip=") == NULL) {
901 strcat(argptr, " ip=any");
902 }
903#endif
904
905
906 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
907 "+\n");
908}
909
910void __init plat_time_init(void)
911{
912 mips_hpt_frequency = tx4927_cpu_clock / 2;
913 if (tx4927_ccfgptr->ccfg & TX4927_CCFG_TINTDIS)
914 txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
915 TXX9_IRQ_BASE + 17,
916 50000000);
917}
918
919static int __init toshiba_rbtx4927_rtc_init(void)
920{
921 static struct resource __initdata res = {
922 .start = 0x1c010000,
923 .end = 0x1c010000 + 0x800 - 1,
924 .flags = IORESOURCE_MEM,
925 };
926 struct platform_device *dev =
927 platform_device_register_simple("rtc-ds1742", -1, &res, 1);
928 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
929}
930device_initcall(toshiba_rbtx4927_rtc_init);
931
932static int __init rbtx4927_ne_init(void)
933{
934 static struct resource __initdata res[] = {
935 {
936 .start = RBTX4927_RTL_8019_BASE,
937 .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
938 .flags = IORESOURCE_IO,
939 }, {
940 .start = RBTX4927_RTL_8019_IRQ,
941 .flags = IORESOURCE_IRQ,
942 }
943 };
944 struct platform_device *dev =
945 platform_device_register_simple("ne", -1,
946 res, ARRAY_SIZE(res));
947 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
948}
949device_initcall(rbtx4927_ne_init);
950
951/* Watchdog support */
952
953static int __init txx9_wdt_init(unsigned long base)
954{
955 struct resource res = {
956 .start = base,
957 .end = base + 0x100 - 1,
958 .flags = IORESOURCE_MEM,
959 };
960 struct platform_device *dev =
961 platform_device_register_simple("txx9wdt", -1, &res, 1);
962 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
963}
964
965static int __init rbtx4927_wdt_init(void)
966{
967 return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
968}
969device_initcall(rbtx4927_wdt_init);
970
971/* Minimum CLK support */
972
973struct clk *clk_get(struct device *dev, const char *id)
974{
975 if (!strcmp(id, "imbus_clk"))
976 return (struct clk *)50000000;
977 return ERR_PTR(-ENOENT);
978}
979EXPORT_SYMBOL(clk_get);
980
981int clk_enable(struct clk *clk)
982{
983 return 0;
984}
985EXPORT_SYMBOL(clk_enable);
986
987void clk_disable(struct clk *clk)
988{
989}
990EXPORT_SYMBOL(clk_disable);
991
992unsigned long clk_get_rate(struct clk *clk)
993{
994 return (unsigned long)clk;
995}
996EXPORT_SYMBOL(clk_get_rate);
997
998void clk_put(struct clk *clk)
999{
1000}
1001EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4938/Kconfig b/arch/mips/tx4938/Kconfig
deleted file mode 100644
index d90e9cd85138..000000000000
--- a/arch/mips/tx4938/Kconfig
+++ /dev/null
@@ -1,24 +0,0 @@
1if TOSHIBA_RBTX4938
2
3comment "Multiplex Pin Select"
4choice
5 prompt "PIO[58:61]"
6 default TOSHIBA_RBTX4938_MPLEX_PIO58_61
7
8config TOSHIBA_RBTX4938_MPLEX_PIO58_61
9 bool "PIO"
10config TOSHIBA_RBTX4938_MPLEX_NAND
11 bool "NAND"
12config TOSHIBA_RBTX4938_MPLEX_ATA
13 bool "ATA"
14
15endchoice
16
17config TX4938_NAND_BOOT
18 depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
19 bool "NAND Boot Support (EXPERIMENTAL)"
20 help
21 This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
22 Select this option if you need to use NAND boot.
23
24endif
diff --git a/arch/mips/tx4938/common/Makefile b/arch/mips/tx4938/common/Makefile
deleted file mode 100644
index 56aa1ed1ee0c..000000000000
--- a/arch/mips/tx4938/common/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for common code for Toshiba TX4927 based systems
3#
4
5obj-y += prom.o irq.o
6obj-$(CONFIG_KGDB) += dbgio.o
7
8EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
deleted file mode 100644
index c059b899d120..000000000000
--- a/arch/mips/tx4938/common/irq.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/arch/mips/tx4938/common/irq.c
3 *
4 * Common tx4938 irq handler
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <asm/irq_cpu.h>
17#include <asm/mipsregs.h>
18#include <asm/tx4938/rbtx4938.h>
19
20void __init
21tx4938_irq_init(void)
22{
23 mips_cpu_irq_init();
24 txx9_irq_init(TX4938_IRC_REG);
25 set_irq_chained_handler(TX4938_IRQ_NEST_PIC_ON_CP0, handle_simple_irq);
26}
27
28int toshiba_rbtx4938_irq_nested(int irq);
29
30asmlinkage void plat_irq_dispatch(void)
31{
32 unsigned int pending = read_c0_cause() & read_c0_status();
33
34 if (pending & STATUSF_IP7)
35 do_IRQ(TX4938_IRQ_CPU_TIMER);
36 else if (pending & STATUSF_IP2) {
37 int irq = txx9_irq();
38 if (irq == TX4938_IRQ_PIC_BEG + TX4938_IR_INT(0))
39 irq = toshiba_rbtx4938_irq_nested(irq);
40 if (irq >= 0)
41 do_IRQ(irq);
42 else
43 spurious_interrupt();
44 } else if (pending & STATUSF_IP1)
45 do_IRQ(TX4938_IRQ_USER1);
46 else if (pending & STATUSF_IP0)
47 do_IRQ(TX4938_IRQ_USER0);
48}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
deleted file mode 100644
index 1644bffa501a..000000000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/prom.c
3 *
4 * rbtx4938 specific prom routines
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/bootmem.h>
19
20#include <asm/addrspace.h>
21#include <asm/bootinfo.h>
22#include <asm/tx4938/tx4938.h>
23
24void __init prom_init_cmdline(void)
25{
26 int argc = (int) fw_arg0;
27 char **argv = (char **) fw_arg1;
28 int i;
29
30 /* ignore all built-in args if any f/w args given */
31 if (argc > 1) {
32 *arcs_cmdline = '\0';
33 }
34
35 for (i = 1; i < argc; i++) {
36 if (i != 1) {
37 strcat(arcs_cmdline, " ");
38 }
39 strcat(arcs_cmdline, argv[i]);
40 }
41}
42
43void __init prom_init(void)
44{
45 extern int tx4938_get_mem_size(void);
46 int msize;
47#ifndef CONFIG_TX4938_NAND_BOOT
48 prom_init_cmdline();
49#endif
50
51 msize = tx4938_get_mem_size();
52 add_memory_region(0, msize << 20, BOOT_MEM_RAM);
53
54 return;
55}
56
57void __init prom_free_prom_memory(void)
58{
59}
60
61void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
62{
63 return;
64}
65
66const char *get_system_type(void)
67{
68 return "Toshiba RBTX4938";
69}
70
71char * __init prom_getcmdline(void)
72{
73 return &(arcs_cmdline[0]);
74}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
deleted file mode 100644
index 3a3659e8633a..000000000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ /dev/null
@@ -1,1124 +0,0 @@
1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/setup.c
3 *
4 * Setup pointers to hardware-dependent routines.
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#include <linux/init.h>
15#include <linux/types.h>
16#include <linux/ioport.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/console.h>
20#include <linux/pci.h>
21#include <linux/pm.h>
22#include <linux/platform_device.h>
23#include <linux/clk.h>
24#include <linux/gpio.h>
25
26#include <asm/reboot.h>
27#include <asm/time.h>
28#include <asm/txx9tmr.h>
29#include <asm/io.h>
30#include <asm/bootinfo.h>
31#include <asm/tx4938/rbtx4938.h>
32#ifdef CONFIG_SERIAL_TXX9
33#include <linux/serial_core.h>
34#endif
35#include <linux/spi/spi.h>
36#include <asm/tx4938/spi.h>
37#include <asm/txx9pio.h>
38
39extern char * __init prom_getcmdline(void);
40static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr);
41
42/* These functions are used for rebooting or halting the machine*/
43extern void rbtx4938_machine_restart(char *command);
44extern void rbtx4938_machine_halt(void);
45extern void rbtx4938_machine_power_off(void);
46
47/* clocks */
48unsigned int txx9_master_clock;
49unsigned int txx9_cpu_clock;
50unsigned int txx9_gbus_clock;
51
52unsigned long rbtx4938_ce_base[8];
53unsigned long rbtx4938_ce_size[8];
54int txboard_pci66_mode;
55static int tx4938_pcic_trdyto; /* default: disabled */
56static int tx4938_pcic_retryto; /* default: disabled */
57static int tx4938_ccfg_toeon = 1;
58
59struct tx4938_pcic_reg *pcicptrs[4] = {
60 tx4938_pcicptr /* default setting for TX4938 */
61};
62
63static struct {
64 unsigned long base;
65 unsigned long size;
66} phys_regions[16] __initdata;
67static int num_phys_regions __initdata;
68
69#define PHYS_REGION_MINSIZE 0x10000
70
71void rbtx4938_machine_halt(void)
72{
73 printk(KERN_NOTICE "System Halted\n");
74 local_irq_disable();
75
76 while (1)
77 __asm__(".set\tmips3\n\t"
78 "wait\n\t"
79 ".set\tmips0");
80}
81
82void rbtx4938_machine_power_off(void)
83{
84 rbtx4938_machine_halt();
85 /* no return */
86}
87
88void rbtx4938_machine_restart(char *command)
89{
90 local_irq_disable();
91
92 printk("Rebooting...");
93 writeb(1, rbtx4938_softresetlock_addr);
94 writeb(1, rbtx4938_sfvol_addr);
95 writeb(1, rbtx4938_softreset_addr);
96 while(1)
97 ;
98}
99
100void __init
101txboard_add_phys_region(unsigned long base, unsigned long size)
102{
103 if (num_phys_regions >= ARRAY_SIZE(phys_regions)) {
104 printk("phys_region overflow\n");
105 return;
106 }
107 phys_regions[num_phys_regions].base = base;
108 phys_regions[num_phys_regions].size = size;
109 num_phys_regions++;
110}
111unsigned long __init
112txboard_find_free_phys_region(unsigned long begin, unsigned long end,
113 unsigned long size)
114{
115 unsigned long base;
116 int i;
117
118 for (base = begin / size * size; base < end; base += size) {
119 for (i = 0; i < num_phys_regions; i++) {
120 if (phys_regions[i].size &&
121 base <= phys_regions[i].base + (phys_regions[i].size - 1) &&
122 base + (size - 1) >= phys_regions[i].base)
123 break;
124 }
125 if (i == num_phys_regions)
126 return base;
127 }
128 return 0;
129}
130unsigned long __init
131txboard_find_free_phys_region_shrink(unsigned long begin, unsigned long end,
132 unsigned long *size)
133{
134 unsigned long sz, base;
135 for (sz = *size; sz >= PHYS_REGION_MINSIZE; sz /= 2) {
136 base = txboard_find_free_phys_region(begin, end, sz);
137 if (base) {
138 *size = sz;
139 return base;
140 }
141 }
142 return 0;
143}
144unsigned long __init
145txboard_request_phys_region_range(unsigned long begin, unsigned long end,
146 unsigned long size)
147{
148 unsigned long base;
149 base = txboard_find_free_phys_region(begin, end, size);
150 if (base)
151 txboard_add_phys_region(base, size);
152 return base;
153}
154unsigned long __init
155txboard_request_phys_region(unsigned long size)
156{
157 unsigned long base;
158 unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
159 base = txboard_find_free_phys_region(begin, end, size);
160 if (base)
161 txboard_add_phys_region(base, size);
162 return base;
163}
164unsigned long __init
165txboard_request_phys_region_shrink(unsigned long *size)
166{
167 unsigned long base;
168 unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
169 base = txboard_find_free_phys_region_shrink(begin, end, size);
170 if (base)
171 txboard_add_phys_region(base, *size);
172 return base;
173}
174
175#ifdef CONFIG_PCI
176void __init
177tx4938_pcic_setup(struct tx4938_pcic_reg *pcicptr,
178 struct pci_controller *channel,
179 unsigned long pci_io_base,
180 int extarb)
181{
182 int i;
183
184 /* Disable All Initiator Space */
185 pcicptr->pciccfg &= ~(TX4938_PCIC_PCICCFG_G2PMEN(0)|
186 TX4938_PCIC_PCICCFG_G2PMEN(1)|
187 TX4938_PCIC_PCICCFG_G2PMEN(2)|
188 TX4938_PCIC_PCICCFG_G2PIOEN);
189
190 /* GB->PCI mappings */
191 pcicptr->g2piomask = (channel->io_resource->end - channel->io_resource->start) >> 4;
192 pcicptr->g2piogbase = pci_io_base |
193#ifdef __BIG_ENDIAN
194 TX4938_PCIC_G2PIOGBASE_ECHG
195#else
196 TX4938_PCIC_G2PIOGBASE_BSDIS
197#endif
198 ;
199 pcicptr->g2piopbase = 0;
200 for (i = 0; i < 3; i++) {
201 pcicptr->g2pmmask[i] = 0;
202 pcicptr->g2pmgbase[i] = 0;
203 pcicptr->g2pmpbase[i] = 0;
204 }
205 if (channel->mem_resource->end) {
206 pcicptr->g2pmmask[0] = (channel->mem_resource->end - channel->mem_resource->start) >> 4;
207 pcicptr->g2pmgbase[0] = channel->mem_resource->start |
208#ifdef __BIG_ENDIAN
209 TX4938_PCIC_G2PMnGBASE_ECHG
210#else
211 TX4938_PCIC_G2PMnGBASE_BSDIS
212#endif
213 ;
214 pcicptr->g2pmpbase[0] = channel->mem_resource->start;
215 }
216 /* PCI->GB mappings (I/O 256B) */
217 pcicptr->p2giopbase = 0; /* 256B */
218 pcicptr->p2giogbase = 0;
219 /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
220 pcicptr->p2gm0plbase = 0;
221 pcicptr->p2gm0pubase = 0;
222 pcicptr->p2gmgbase[0] = 0 |
223 TX4938_PCIC_P2GMnGBASE_TMEMEN |
224#ifdef __BIG_ENDIAN
225 TX4938_PCIC_P2GMnGBASE_TECHG
226#else
227 TX4938_PCIC_P2GMnGBASE_TBSDIS
228#endif
229 ;
230 /* PCI->GB mappings (MEM 16MB) */
231 pcicptr->p2gm1plbase = 0xffffffff;
232 pcicptr->p2gm1pubase = 0xffffffff;
233 pcicptr->p2gmgbase[1] = 0;
234 /* PCI->GB mappings (MEM 1MB) */
235 pcicptr->p2gm2pbase = 0xffffffff; /* 1MB */
236 pcicptr->p2gmgbase[2] = 0;
237
238 pcicptr->pciccfg &= TX4938_PCIC_PCICCFG_GBWC_MASK;
239 /* Enable Initiator Memory Space */
240 if (channel->mem_resource->end)
241 pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PMEN(0);
242 /* Enable Initiator I/O Space */
243 if (channel->io_resource->end)
244 pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PIOEN;
245 /* Enable Initiator Config */
246 pcicptr->pciccfg |=
247 TX4938_PCIC_PCICCFG_ICAEN |
248 TX4938_PCIC_PCICCFG_TCAR;
249
250 /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
251 pcicptr->pcicfg1 = 0;
252
253 pcicptr->g2ptocnt &= ~0xffff;
254
255 if (tx4938_pcic_trdyto >= 0) {
256 pcicptr->g2ptocnt &= ~0xff;
257 pcicptr->g2ptocnt |= (tx4938_pcic_trdyto & 0xff);
258 }
259
260 if (tx4938_pcic_retryto >= 0) {
261 pcicptr->g2ptocnt &= ~0xff00;
262 pcicptr->g2ptocnt |= ((tx4938_pcic_retryto<<8) & 0xff00);
263 }
264
265 /* Clear All Local Bus Status */
266 pcicptr->pcicstatus = TX4938_PCIC_PCICSTATUS_ALL;
267 /* Enable All Local Bus Interrupts */
268 pcicptr->pcicmask = TX4938_PCIC_PCICSTATUS_ALL;
269 /* Clear All Initiator Status */
270 pcicptr->g2pstatus = TX4938_PCIC_G2PSTATUS_ALL;
271 /* Enable All Initiator Interrupts */
272 pcicptr->g2pmask = TX4938_PCIC_G2PSTATUS_ALL;
273 /* Clear All PCI Status Error */
274 pcicptr->pcistatus =
275 (pcicptr->pcistatus & 0x0000ffff) |
276 (TX4938_PCIC_PCISTATUS_ALL << 16);
277 /* Enable All PCI Status Error Interrupts */
278 pcicptr->pcimask = TX4938_PCIC_PCISTATUS_ALL;
279
280 if (!extarb) {
281 /* Reset Bus Arbiter */
282 pcicptr->pbacfg = TX4938_PCIC_PBACFG_RPBA;
283 pcicptr->pbabm = 0;
284 /* Enable Bus Arbiter */
285 pcicptr->pbacfg = TX4938_PCIC_PBACFG_PBAEN;
286 }
287
288 /* PCIC Int => IRC IRQ16 */
289 pcicptr->pcicfg2 =
290 (pcicptr->pcicfg2 & 0xffffff00) | TX4938_IR_PCIC;
291
292 pcicptr->pcistatus = PCI_COMMAND_MASTER |
293 PCI_COMMAND_MEMORY |
294 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
295}
296
297int __init
298tx4938_report_pciclk(void)
299{
300 unsigned long pcode = TX4938_REV_PCODE();
301 int pciclk = 0;
302 printk("TX%lx PCIC --%s PCICLK:",
303 pcode,
304 (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) ? " PCI66" : "");
305 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
306
307 switch ((unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK) {
308 case TX4938_CCFG_PCIDIVMODE_4:
309 pciclk = txx9_cpu_clock / 4; break;
310 case TX4938_CCFG_PCIDIVMODE_4_5:
311 pciclk = txx9_cpu_clock * 2 / 9; break;
312 case TX4938_CCFG_PCIDIVMODE_5:
313 pciclk = txx9_cpu_clock / 5; break;
314 case TX4938_CCFG_PCIDIVMODE_5_5:
315 pciclk = txx9_cpu_clock * 2 / 11; break;
316 case TX4938_CCFG_PCIDIVMODE_8:
317 pciclk = txx9_cpu_clock / 8; break;
318 case TX4938_CCFG_PCIDIVMODE_9:
319 pciclk = txx9_cpu_clock / 9; break;
320 case TX4938_CCFG_PCIDIVMODE_10:
321 pciclk = txx9_cpu_clock / 10; break;
322 case TX4938_CCFG_PCIDIVMODE_11:
323 pciclk = txx9_cpu_clock / 11; break;
324 }
325 printk("Internal(%dMHz)", pciclk / 1000000);
326 } else {
327 printk("External");
328 pciclk = -1;
329 }
330 printk("\n");
331 return pciclk;
332}
333
334void __init set_tx4938_pcicptr(int ch, struct tx4938_pcic_reg *pcicptr)
335{
336 pcicptrs[ch] = pcicptr;
337}
338
339struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch)
340{
341 return pcicptrs[ch];
342}
343
344static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
345 int top_bus, int busnr, int devfn)
346{
347 static struct pci_dev dev;
348 static struct pci_bus bus;
349
350 dev.sysdata = bus.sysdata = hose;
351 dev.devfn = devfn;
352 bus.number = busnr;
353 bus.ops = hose->pci_ops;
354 bus.parent = NULL;
355 dev.bus = &bus;
356
357 return &dev;
358}
359
360#define EARLY_PCI_OP(rw, size, type) \
361static int early_##rw##_config_##size(struct pci_controller *hose, \
362 int top_bus, int bus, int devfn, int offset, type value) \
363{ \
364 return pci_##rw##_config_##size( \
365 fake_pci_dev(hose, top_bus, bus, devfn), \
366 offset, value); \
367}
368
369EARLY_PCI_OP(read, word, u16 *)
370
371int txboard_pci66_check(struct pci_controller *hose, int top_bus, int current_bus)
372{
373 u32 pci_devfn;
374 unsigned short vid;
375 int devfn_start = 0;
376 int devfn_stop = 0xff;
377 int cap66 = -1;
378 u16 stat;
379
380 printk("PCI: Checking 66MHz capabilities...\n");
381
382 for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
383 if (early_read_config_word(hose, top_bus, current_bus,
384 pci_devfn, PCI_VENDOR_ID,
385 &vid) != PCIBIOS_SUCCESSFUL)
386 continue;
387
388 if (vid == 0xffff) continue;
389
390 /* check 66MHz capability */
391 if (cap66 < 0)
392 cap66 = 1;
393 if (cap66) {
394 early_read_config_word(hose, top_bus, current_bus, pci_devfn,
395 PCI_STATUS, &stat);
396 if (!(stat & PCI_STATUS_66MHZ)) {
397 printk(KERN_DEBUG "PCI: %02x:%02x not 66MHz capable.\n",
398 current_bus, pci_devfn);
399 cap66 = 0;
400 break;
401 }
402 }
403 }
404 return cap66 > 0;
405}
406
407int __init
408tx4938_pciclk66_setup(void)
409{
410 int pciclk;
411
412 /* Assert M66EN */
413 tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI66;
414 /* Double PCICLK (if possible) */
415 if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
416 unsigned int pcidivmode =
417 tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK;
418 switch (pcidivmode) {
419 case TX4938_CCFG_PCIDIVMODE_8:
420 case TX4938_CCFG_PCIDIVMODE_4:
421 pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
422 pciclk = txx9_cpu_clock / 4;
423 break;
424 case TX4938_CCFG_PCIDIVMODE_9:
425 case TX4938_CCFG_PCIDIVMODE_4_5:
426 pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
427 pciclk = txx9_cpu_clock * 2 / 9;
428 break;
429 case TX4938_CCFG_PCIDIVMODE_10:
430 case TX4938_CCFG_PCIDIVMODE_5:
431 pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
432 pciclk = txx9_cpu_clock / 5;
433 break;
434 case TX4938_CCFG_PCIDIVMODE_11:
435 case TX4938_CCFG_PCIDIVMODE_5_5:
436 default:
437 pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
438 pciclk = txx9_cpu_clock * 2 / 11;
439 break;
440 }
441 tx4938_ccfgptr->ccfg =
442 (tx4938_ccfgptr->ccfg & ~TX4938_CCFG_PCIDIVMODE_MASK)
443 | pcidivmode;
444 printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
445 (unsigned long)tx4938_ccfgptr->ccfg);
446 } else {
447 pciclk = -1;
448 }
449 return pciclk;
450}
451
452extern struct pci_controller tx4938_pci_controller[];
453static int __init tx4938_pcibios_init(void)
454{
455 unsigned long mem_base[2];
456 unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0, TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
457 unsigned long io_base[2];
458 unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0, TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
459 /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
460 int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);
461
462 PCIBIOS_MIN_IO = 0x00001000UL;
463
464 mem_base[0] = txboard_request_phys_region_shrink(&mem_size[0]);
465 io_base[0] = txboard_request_phys_region_shrink(&io_size[0]);
466
467 printk("TX4938 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
468 (unsigned short)(tx4938_pcicptr->pciid >> 16),
469 (unsigned short)(tx4938_pcicptr->pciid & 0xffff),
470 (unsigned short)(tx4938_pcicptr->pciccrev & 0xff),
471 extarb ? "External" : "Internal");
472
473 /* setup PCI area */
474 tx4938_pci_controller[0].io_resource->start = io_base[0];
475 tx4938_pci_controller[0].io_resource->end = (io_base[0] + io_size[0]) - 1;
476 tx4938_pci_controller[0].mem_resource->start = mem_base[0];
477 tx4938_pci_controller[0].mem_resource->end = mem_base[0] + mem_size[0] - 1;
478
479 set_tx4938_pcicptr(0, tx4938_pcicptr);
480
481 register_pci_controller(&tx4938_pci_controller[0]);
482
483 if (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) {
484 printk("TX4938_CCFG_PCI66 already configured\n");
485 txboard_pci66_mode = -1; /* already configured */
486 }
487
488 /* Reset PCI Bus */
489 writeb(0, rbtx4938_pcireset_addr);
490 /* Reset PCIC */
491 tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
492 if (txboard_pci66_mode > 0)
493 tx4938_pciclk66_setup();
494 mdelay(10);
495 /* clear PCIC reset */
496 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
497 writeb(1, rbtx4938_pcireset_addr);
498 mmiowb();
499 tx4938_report_pcic_status1(tx4938_pcicptr);
500
501 tx4938_report_pciclk();
502 tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
503 if (txboard_pci66_mode == 0 &&
504 txboard_pci66_check(&tx4938_pci_controller[0], 0, 0)) {
505 /* Reset PCI Bus */
506 writeb(0, rbtx4938_pcireset_addr);
507 /* Reset PCIC */
508 tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
509 tx4938_pciclk66_setup();
510 mdelay(10);
511 /* clear PCIC reset */
512 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
513 writeb(1, rbtx4938_pcireset_addr);
514 mmiowb();
515 /* Reinitialize PCIC */
516 tx4938_report_pciclk();
517 tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
518 }
519
520 mem_base[1] = txboard_request_phys_region_shrink(&mem_size[1]);
521 io_base[1] = txboard_request_phys_region_shrink(&io_size[1]);
522 /* Reset PCIC1 */
523 tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIC1RST;
524 /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
525 if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD))
526 tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI1_66;
527 else
528 tx4938_ccfgptr->ccfg &= ~TX4938_CCFG_PCI1_66;
529 mdelay(10);
530 /* clear PCIC1 reset */
531 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
532 tx4938_report_pcic_status1(tx4938_pcic1ptr);
533
534 printk("TX4938 PCIC1 -- DID:%04x VID:%04x RID:%02x",
535 (unsigned short)(tx4938_pcic1ptr->pciid >> 16),
536 (unsigned short)(tx4938_pcic1ptr->pciid & 0xffff),
537 (unsigned short)(tx4938_pcic1ptr->pciccrev & 0xff));
538 printk("%s PCICLK:%dMHz\n",
539 (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1_66) ? " PCI66" : "",
540 txx9_gbus_clock /
541 ((tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2) /
542 1000000);
543
544 /* assumption: CPHYSADDR(mips_io_port_base) == io_base[0] */
545 tx4938_pci_controller[1].io_resource->start =
546 io_base[1] - io_base[0];
547 tx4938_pci_controller[1].io_resource->end =
548 io_base[1] - io_base[0] + io_size[1] - 1;
549 tx4938_pci_controller[1].mem_resource->start = mem_base[1];
550 tx4938_pci_controller[1].mem_resource->end =
551 mem_base[1] + mem_size[1] - 1;
552 set_tx4938_pcicptr(1, tx4938_pcic1ptr);
553
554 register_pci_controller(&tx4938_pci_controller[1]);
555
556 tx4938_pcic_setup(tx4938_pcic1ptr, &tx4938_pci_controller[1], io_base[1], extarb);
557
558 /* map ioport 0 to PCI I/O space address 0 */
559 set_io_port_base(KSEG1 + io_base[0]);
560
561 return 0;
562}
563
564arch_initcall(tx4938_pcibios_init);
565
566#endif /* CONFIG_PCI */
567
568/* SPI support */
569
570/* chip select for SPI devices */
571#define SEEPROM1_CS 7 /* PIO7 */
572#define SEEPROM2_CS 0 /* IOC */
573#define SEEPROM3_CS 1 /* IOC */
574#define SRTC_CS 2 /* IOC */
575
576#ifdef CONFIG_PCI
577static int __init rbtx4938_ethaddr_init(void)
578{
579 unsigned char dat[17];
580 unsigned char sum;
581 int i;
582
583 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
584 if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
585 printk(KERN_ERR "seeprom: read error.\n");
586 return -ENODEV;
587 } else {
588 if (strcmp(dat, "MAC") != 0)
589 printk(KERN_WARNING "seeprom: bad signature.\n");
590 for (i = 0, sum = 0; i < sizeof(dat); i++)
591 sum += dat[i];
592 if (sum)
593 printk(KERN_WARNING "seeprom: bad checksum.\n");
594 }
595 for (i = 0; i < 2; i++) {
596 unsigned int id =
597 TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0);
598 struct platform_device *pdev;
599 if (!(tx4938_ccfgptr->pcfg &
600 (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL)))
601 continue;
602 pdev = platform_device_alloc("tc35815-mac", id);
603 if (!pdev ||
604 platform_device_add_data(pdev, &dat[4 + 6 * i], 6) ||
605 platform_device_add(pdev))
606 platform_device_put(pdev);
607 }
608 return 0;
609}
610device_initcall(rbtx4938_ethaddr_init);
611#endif /* CONFIG_PCI */
612
613static void __init rbtx4938_spi_setup(void)
614{
615 /* set SPI_SEL */
616 tx4938_ccfgptr->pcfg |= TX4938_PCFG_SPI_SEL;
617}
618
619static struct resource rbtx4938_fpga_resource;
620
621static char pcode_str[8];
622static struct resource tx4938_reg_resource = {
623 .start = TX4938_REG_BASE,
624 .end = TX4938_REG_BASE + TX4938_REG_SIZE,
625 .name = pcode_str,
626 .flags = IORESOURCE_MEM
627};
628
629void __init tx4938_board_setup(void)
630{
631 int i;
632 unsigned long divmode;
633 int cpuclk = 0;
634 unsigned long pcode = TX4938_REV_PCODE();
635
636 ioport_resource.start = 0x1000;
637 ioport_resource.end = 0xffffffff;
638 iomem_resource.start = 0x1000;
639 iomem_resource.end = 0xffffffff; /* expand to 4GB */
640
641 sprintf(pcode_str, "TX%lx", pcode);
642 /* SDRAMC,EBUSC are configured by PROM */
643 for (i = 0; i < 8; i++) {
644 if (!(tx4938_ebuscptr->cr[i] & 0x8))
645 continue; /* disabled */
646 rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i);
647 txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i));
648 }
649
650 /* clocks */
651 if (txx9_master_clock) {
652 /* calculate gbus_clock and cpu_clock_freq from master_clock */
653 divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
654 switch (divmode) {
655 case TX4938_CCFG_DIVMODE_8:
656 case TX4938_CCFG_DIVMODE_10:
657 case TX4938_CCFG_DIVMODE_12:
658 case TX4938_CCFG_DIVMODE_16:
659 case TX4938_CCFG_DIVMODE_18:
660 txx9_gbus_clock = txx9_master_clock * 4; break;
661 default:
662 txx9_gbus_clock = txx9_master_clock;
663 }
664 switch (divmode) {
665 case TX4938_CCFG_DIVMODE_2:
666 case TX4938_CCFG_DIVMODE_8:
667 cpuclk = txx9_gbus_clock * 2; break;
668 case TX4938_CCFG_DIVMODE_2_5:
669 case TX4938_CCFG_DIVMODE_10:
670 cpuclk = txx9_gbus_clock * 5 / 2; break;
671 case TX4938_CCFG_DIVMODE_3:
672 case TX4938_CCFG_DIVMODE_12:
673 cpuclk = txx9_gbus_clock * 3; break;
674 case TX4938_CCFG_DIVMODE_4:
675 case TX4938_CCFG_DIVMODE_16:
676 cpuclk = txx9_gbus_clock * 4; break;
677 case TX4938_CCFG_DIVMODE_4_5:
678 case TX4938_CCFG_DIVMODE_18:
679 cpuclk = txx9_gbus_clock * 9 / 2; break;
680 }
681 txx9_cpu_clock = cpuclk;
682 } else {
683 if (txx9_cpu_clock == 0) {
684 txx9_cpu_clock = 300000000; /* 300MHz */
685 }
686 /* calculate gbus_clock and master_clock from cpu_clock_freq */
687 cpuclk = txx9_cpu_clock;
688 divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
689 switch (divmode) {
690 case TX4938_CCFG_DIVMODE_2:
691 case TX4938_CCFG_DIVMODE_8:
692 txx9_gbus_clock = cpuclk / 2; break;
693 case TX4938_CCFG_DIVMODE_2_5:
694 case TX4938_CCFG_DIVMODE_10:
695 txx9_gbus_clock = cpuclk * 2 / 5; break;
696 case TX4938_CCFG_DIVMODE_3:
697 case TX4938_CCFG_DIVMODE_12:
698 txx9_gbus_clock = cpuclk / 3; break;
699 case TX4938_CCFG_DIVMODE_4:
700 case TX4938_CCFG_DIVMODE_16:
701 txx9_gbus_clock = cpuclk / 4; break;
702 case TX4938_CCFG_DIVMODE_4_5:
703 case TX4938_CCFG_DIVMODE_18:
704 txx9_gbus_clock = cpuclk * 2 / 9; break;
705 }
706 switch (divmode) {
707 case TX4938_CCFG_DIVMODE_8:
708 case TX4938_CCFG_DIVMODE_10:
709 case TX4938_CCFG_DIVMODE_12:
710 case TX4938_CCFG_DIVMODE_16:
711 case TX4938_CCFG_DIVMODE_18:
712 txx9_master_clock = txx9_gbus_clock / 4; break;
713 default:
714 txx9_master_clock = txx9_gbus_clock;
715 }
716 }
717 /* change default value to udelay/mdelay take reasonable time */
718 loops_per_jiffy = txx9_cpu_clock / HZ / 2;
719
720 /* CCFG */
721 /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
722 tx4938_ccfgptr->ccfg |= TX4938_CCFG_WDRST | TX4938_CCFG_BEOW;
723 /* do reset on watchdog */
724 tx4938_ccfgptr->ccfg |= TX4938_CCFG_WR;
725 /* clear PCIC1 reset */
726 if (tx4938_ccfgptr->clkctr & TX4938_CLKCTR_PCIC1RST)
727 tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
728
729 /* enable Timeout BusError */
730 if (tx4938_ccfg_toeon)
731 tx4938_ccfgptr->ccfg |= TX4938_CCFG_TOE;
732
733 /* DMA selection */
734 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_DMASEL_ALL;
735
736 /* Use external clock for external arbiter */
737 if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB))
738 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_PCICLKEN_ALL;
739
740 printk("%s -- %dMHz(M%dMHz) CRIR:%08lx CCFG:%Lx PCFG:%Lx\n",
741 pcode_str,
742 cpuclk / 1000000, txx9_master_clock / 1000000,
743 (unsigned long)tx4938_ccfgptr->crir,
744 tx4938_ccfgptr->ccfg,
745 tx4938_ccfgptr->pcfg);
746
747 printk("%s SDRAMC --", pcode_str);
748 for (i = 0; i < 4; i++) {
749 unsigned long long cr = tx4938_sdramcptr->cr[i];
750 unsigned long ram_base, ram_size;
751 if (!((unsigned long)cr & 0x00000400))
752 continue; /* disabled */
753 ram_base = (unsigned long)(cr >> 49) << 21;
754 ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
755 if (ram_base >= 0x20000000)
756 continue; /* high memory (ignore) */
757 printk(" CR%d:%016Lx", i, cr);
758 txboard_add_phys_region(ram_base, ram_size);
759 }
760 printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
761
762 /* SRAM */
763 if (pcode == 0x4938 && tx4938_sramcptr->cr & 1) {
764 unsigned int size = 0x800;
765 unsigned long base =
766 (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
767 txboard_add_phys_region(base, size);
768 }
769
770 /* TMR */
771 for (i = 0; i < TX4938_NR_TMR; i++)
772 txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
773
774 /* enable DMA */
775 for (i = 0; i < 2; i++)
776 ____raw_writeq(TX4938_DMA_MCR_MSTEN,
777 (void __iomem *)(TX4938_DMA_REG(i) + 0x50));
778
779 /* PIO */
780 __raw_writel(0, &tx4938_pioptr->maskcpu);
781 __raw_writel(0, &tx4938_pioptr->maskext);
782
783 /* TX4938 internal registers */
784 if (request_resource(&iomem_resource, &tx4938_reg_resource))
785 printk("request resource for internal registers failed\n");
786}
787
788#ifdef CONFIG_PCI
789static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr)
790{
791 unsigned short pcistatus = (unsigned short)(pcicptr->pcistatus >> 16);
792 unsigned long g2pstatus = pcicptr->g2pstatus;
793 unsigned long pcicstatus = pcicptr->pcicstatus;
794 static struct {
795 unsigned long flag;
796 const char *str;
797 } pcistat_tbl[] = {
798 { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
799 { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
800 { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
801 { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
802 { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
803 { PCI_STATUS_PARITY, "MasterParityError" },
804 }, g2pstat_tbl[] = {
805 { TX4938_PCIC_G2PSTATUS_TTOE, "TIOE" },
806 { TX4938_PCIC_G2PSTATUS_RTOE, "RTOE" },
807 }, pcicstat_tbl[] = {
808 { TX4938_PCIC_PCICSTATUS_PME, "PME" },
809 { TX4938_PCIC_PCICSTATUS_TLB, "TLB" },
810 { TX4938_PCIC_PCICSTATUS_NIB, "NIB" },
811 { TX4938_PCIC_PCICSTATUS_ZIB, "ZIB" },
812 { TX4938_PCIC_PCICSTATUS_PERR, "PERR" },
813 { TX4938_PCIC_PCICSTATUS_SERR, "SERR" },
814 { TX4938_PCIC_PCICSTATUS_GBE, "GBE" },
815 { TX4938_PCIC_PCICSTATUS_IWB, "IWB" },
816 };
817 int i;
818
819 printk("pcistat:%04x(", pcistatus);
820 for (i = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
821 if (pcistatus & pcistat_tbl[i].flag)
822 printk("%s ", pcistat_tbl[i].str);
823 printk("), g2pstatus:%08lx(", g2pstatus);
824 for (i = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
825 if (g2pstatus & g2pstat_tbl[i].flag)
826 printk("%s ", g2pstat_tbl[i].str);
827 printk("), pcicstatus:%08lx(", pcicstatus);
828 for (i = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
829 if (pcicstatus & pcicstat_tbl[i].flag)
830 printk("%s ", pcicstat_tbl[i].str);
831 printk(")\n");
832}
833
834void tx4938_report_pcic_status(void)
835{
836 int i;
837 struct tx4938_pcic_reg *pcicptr;
838 for (i = 0; (pcicptr = get_tx4938_pcicptr(i)) != NULL; i++)
839 tx4938_report_pcic_status1(pcicptr);
840}
841
842#endif /* CONFIG_PCI */
843
844void __init plat_time_init(void)
845{
846 mips_hpt_frequency = txx9_cpu_clock / 2;
847 if (tx4938_ccfgptr->ccfg & TX4938_CCFG_TINTDIS)
848 txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
849 TXX9_IRQ_BASE + TX4938_IR_TMR(0),
850 txx9_gbus_clock / 2);
851}
852
853void __init plat_mem_setup(void)
854{
855 unsigned long long pcfg;
856 char *argptr;
857
858 iomem_resource.end = 0xffffffff; /* 4GB */
859
860 if (txx9_master_clock == 0)
861 txx9_master_clock = 25000000; /* 25MHz */
862 tx4938_board_setup();
863#ifndef CONFIG_PCI
864 set_io_port_base(RBTX4938_ETHER_BASE);
865#endif
866
867#ifdef CONFIG_SERIAL_TXX9
868 {
869 extern int early_serial_txx9_setup(struct uart_port *port);
870 int i;
871 struct uart_port req;
872 for(i = 0; i < 2; i++) {
873 memset(&req, 0, sizeof(req));
874 req.line = i;
875 req.iotype = UPIO_MEM;
876 req.membase = (char *)(0xff1ff300 + i * 0x100);
877 req.mapbase = 0xff1ff300 + i * 0x100;
878 req.irq = RBTX4938_IRQ_IRC_SIO(i);
879 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
880 req.uartclk = 50000000;
881 early_serial_txx9_setup(&req);
882 }
883 }
884#ifdef CONFIG_SERIAL_TXX9_CONSOLE
885 argptr = prom_getcmdline();
886 if (strstr(argptr, "console=") == NULL) {
887 strcat(argptr, " console=ttyS0,38400");
888 }
889#endif
890#endif
891
892#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
893 printk("PIOSEL: disabling both ata and nand selection\n");
894 local_irq_disable();
895 tx4938_ccfgptr->pcfg &= ~(TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
896#endif
897
898#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
899 printk("PIOSEL: enabling nand selection\n");
900 tx4938_ccfgptr->pcfg |= TX4938_PCFG_NDF_SEL;
901 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_ATA_SEL;
902#endif
903
904#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
905 printk("PIOSEL: enabling ata selection\n");
906 tx4938_ccfgptr->pcfg |= TX4938_PCFG_ATA_SEL;
907 tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_NDF_SEL;
908#endif
909
910#ifdef CONFIG_IP_PNP
911 argptr = prom_getcmdline();
912 if (strstr(argptr, "ip=") == NULL) {
913 strcat(argptr, " ip=any");
914 }
915#endif
916
917
918#ifdef CONFIG_FB
919 {
920 conswitchp = &dummy_con;
921 }
922#endif
923
924 rbtx4938_spi_setup();
925 pcfg = tx4938_ccfgptr->pcfg; /* updated */
926 /* fixup piosel */
927 if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
928 TX4938_PCFG_ATA_SEL)
929 writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
930 rbtx4938_piosel_addr);
931 else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
932 TX4938_PCFG_NDF_SEL)
933 writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
934 rbtx4938_piosel_addr);
935 else
936 writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
937 rbtx4938_piosel_addr);
938
939 rbtx4938_fpga_resource.name = "FPGA Registers";
940 rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
941 rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
942 rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
943 if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
944 printk("request resource for fpga failed\n");
945
946 _machine_restart = rbtx4938_machine_restart;
947 _machine_halt = rbtx4938_machine_halt;
948 pm_power_off = rbtx4938_machine_power_off;
949
950 writeb(0xff, rbtx4938_led_addr);
951 printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
952 readb(rbtx4938_fpga_rev_addr),
953 readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
954}
955
956static int __init rbtx4938_ne_init(void)
957{
958 struct resource res[] = {
959 {
960 .start = RBTX4938_RTL_8019_BASE,
961 .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
962 .flags = IORESOURCE_IO,
963 }, {
964 .start = RBTX4938_RTL_8019_IRQ,
965 .flags = IORESOURCE_IRQ,
966 }
967 };
968 struct platform_device *dev =
969 platform_device_register_simple("ne", -1,
970 res, ARRAY_SIZE(res));
971 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
972}
973device_initcall(rbtx4938_ne_init);
974
975/* GPIO support */
976
977int gpio_to_irq(unsigned gpio)
978{
979 return -EINVAL;
980}
981
982int irq_to_gpio(unsigned irq)
983{
984 return -EINVAL;
985}
986
987static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
988
989static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
990 int value)
991{
992 u8 val;
993 unsigned long flags;
994 spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
995 val = readb(rbtx4938_spics_addr);
996 if (value)
997 val |= 1 << offset;
998 else
999 val &= ~(1 << offset);
1000 writeb(val, rbtx4938_spics_addr);
1001 mmiowb();
1002 spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
1003}
1004
1005static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
1006 unsigned int offset, int value)
1007{
1008 rbtx4938_spi_gpio_set(chip, offset, value);
1009 return 0;
1010}
1011
1012static struct gpio_chip rbtx4938_spi_gpio_chip = {
1013 .set = rbtx4938_spi_gpio_set,
1014 .direction_output = rbtx4938_spi_gpio_dir_out,
1015 .label = "RBTX4938-SPICS",
1016 .base = 16,
1017 .ngpio = 3,
1018};
1019
1020/* SPI support */
1021
1022static void __init txx9_spi_init(unsigned long base, int irq)
1023{
1024 struct resource res[] = {
1025 {
1026 .start = base,
1027 .end = base + 0x20 - 1,
1028 .flags = IORESOURCE_MEM,
1029 }, {
1030 .start = irq,
1031 .flags = IORESOURCE_IRQ,
1032 },
1033 };
1034 platform_device_register_simple("spi_txx9", 0,
1035 res, ARRAY_SIZE(res));
1036}
1037
1038static int __init rbtx4938_spi_init(void)
1039{
1040 struct spi_board_info srtc_info = {
1041 .modalias = "rtc-rs5c348",
1042 .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
1043 .bus_num = 0,
1044 .chip_select = 16 + SRTC_CS,
1045 /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
1046 .mode = SPI_MODE_1 | SPI_CS_HIGH,
1047 };
1048 spi_register_board_info(&srtc_info, 1);
1049 spi_eeprom_register(SEEPROM1_CS);
1050 spi_eeprom_register(16 + SEEPROM2_CS);
1051 spi_eeprom_register(16 + SEEPROM3_CS);
1052 gpio_request(16 + SRTC_CS, "rtc-rs5c348");
1053 gpio_direction_output(16 + SRTC_CS, 0);
1054 gpio_request(SEEPROM1_CS, "seeprom1");
1055 gpio_direction_output(SEEPROM1_CS, 1);
1056 gpio_request(16 + SEEPROM2_CS, "seeprom2");
1057 gpio_direction_output(16 + SEEPROM2_CS, 1);
1058 gpio_request(16 + SEEPROM3_CS, "seeprom3");
1059 gpio_direction_output(16 + SEEPROM3_CS, 1);
1060 txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI);
1061 return 0;
1062}
1063
1064static int __init rbtx4938_arch_init(void)
1065{
1066 txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
1067 gpiochip_add(&rbtx4938_spi_gpio_chip);
1068 return rbtx4938_spi_init();
1069}
1070arch_initcall(rbtx4938_arch_init);
1071
1072/* Watchdog support */
1073
1074static int __init txx9_wdt_init(unsigned long base)
1075{
1076 struct resource res = {
1077 .start = base,
1078 .end = base + 0x100 - 1,
1079 .flags = IORESOURCE_MEM,
1080 };
1081 struct platform_device *dev =
1082 platform_device_register_simple("txx9wdt", -1, &res, 1);
1083 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
1084}
1085
1086static int __init rbtx4938_wdt_init(void)
1087{
1088 return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
1089}
1090device_initcall(rbtx4938_wdt_init);
1091
1092/* Minimum CLK support */
1093
1094struct clk *clk_get(struct device *dev, const char *id)
1095{
1096 if (!strcmp(id, "spi-baseclk"))
1097 return (struct clk *)(txx9_gbus_clock / 2 / 4);
1098 if (!strcmp(id, "imbus_clk"))
1099 return (struct clk *)(txx9_gbus_clock / 2);
1100 return ERR_PTR(-ENOENT);
1101}
1102EXPORT_SYMBOL(clk_get);
1103
1104int clk_enable(struct clk *clk)
1105{
1106 return 0;
1107}
1108EXPORT_SYMBOL(clk_enable);
1109
1110void clk_disable(struct clk *clk)
1111{
1112}
1113EXPORT_SYMBOL(clk_disable);
1114
1115unsigned long clk_get_rate(struct clk *clk)
1116{
1117 return (unsigned long)clk;
1118}
1119EXPORT_SYMBOL(clk_get_rate);
1120
1121void clk_put(struct clk *clk)
1122{
1123}
1124EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
new file mode 100644
index 000000000000..b92a134ef124
--- /dev/null
+++ b/arch/mips/txx9/Kconfig
@@ -0,0 +1,115 @@
1config TOSHIBA_JMR3927
2 bool "Toshiba JMR-TX3927 board"
3 depends on MACH_TX39XX
4 select SOC_TX3927
5
6config TOSHIBA_RBTX4927
7 bool "Toshiba RBTX49[23]7 board"
8 depends on MACH_TX49XX
9 select SOC_TX4927
10 help
11 This Toshiba board is based on the TX4927 processor. Say Y here to
12 support this machine type
13
14config TOSHIBA_RBTX4938
15 bool "Toshiba RBTX4938 board"
16 depends on MACH_TX49XX
17 select SOC_TX4938
18 help
19 This Toshiba board is based on the TX4938 processor. Say Y here to
20 support this machine type
21
22config SOC_TX3927
23 bool
24 select CEVT_TXX9
25 select DMA_NONCOHERENT
26 select HAS_TXX9_SERIAL
27 select HW_HAS_PCI
28 select IRQ_TXX9
29 select SWAP_IO_SPACE
30 select SYS_HAS_CPU_TX39XX
31 select SYS_SUPPORTS_32BIT_KERNEL
32 select SYS_SUPPORTS_LITTLE_ENDIAN
33 select SYS_SUPPORTS_BIG_ENDIAN
34 select GENERIC_HARDIRQS_NO__DO_IRQ
35 select GPIO_TXX9
36
37config SOC_TX4927
38 bool
39 select CEVT_R4K
40 select CSRC_R4K
41 select CEVT_TXX9
42 select DMA_NONCOHERENT
43 select HAS_TXX9_SERIAL
44 select HW_HAS_PCI
45 select IRQ_CPU
46 select IRQ_TXX9
47 select PCI_TX4927
48 select SWAP_IO_SPACE
49 select SYS_HAS_CPU_TX49XX
50 select SYS_SUPPORTS_32BIT_KERNEL
51 select SYS_SUPPORTS_64BIT_KERNEL
52 select SYS_SUPPORTS_LITTLE_ENDIAN
53 select SYS_SUPPORTS_BIG_ENDIAN
54 select SYS_SUPPORTS_KGDB
55 select GENERIC_HARDIRQS_NO__DO_IRQ
56 select GPIO_TXX9
57
58config SOC_TX4938
59 bool
60 select CEVT_R4K
61 select CSRC_R4K
62 select CEVT_TXX9
63 select DMA_NONCOHERENT
64 select HAS_TXX9_SERIAL
65 select HW_HAS_PCI
66 select IRQ_CPU
67 select IRQ_TXX9
68 select PCI_TX4927
69 select SWAP_IO_SPACE
70 select SYS_HAS_CPU_TX49XX
71 select SYS_SUPPORTS_32BIT_KERNEL
72 select SYS_SUPPORTS_64BIT_KERNEL
73 select SYS_SUPPORTS_LITTLE_ENDIAN
74 select SYS_SUPPORTS_BIG_ENDIAN
75 select SYS_SUPPORTS_KGDB
76 select GENERIC_HARDIRQS_NO__DO_IRQ
77 select GPIO_TXX9
78
79config TOSHIBA_FPCIB0
80 bool "FPCIB0 Backplane Support"
81 depends on PCI && (MACH_TX39XX || MACH_TX49XX)
82 select I8259
83
84config PICMG_PCI_BACKPLANE_DEFAULT
85 bool "Support for PICMG PCI Backplane"
86 depends on PCI && (MACH_TX39XX || MACH_TX49XX)
87 default y if !TOSHIBA_FPCIB0
88
89if TOSHIBA_RBTX4938
90
91comment "Multiplex Pin Select"
92choice
93 prompt "PIO[58:61]"
94 default TOSHIBA_RBTX4938_MPLEX_PIO58_61
95
96config TOSHIBA_RBTX4938_MPLEX_PIO58_61
97 bool "PIO"
98config TOSHIBA_RBTX4938_MPLEX_NAND
99 bool "NAND"
100config TOSHIBA_RBTX4938_MPLEX_ATA
101 bool "ATA"
102
103endchoice
104
105config TX4938_NAND_BOOT
106 depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
107 bool "NAND Boot Support (EXPERIMENTAL)"
108 help
109 This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
110 Select this option if you need to use NAND boot.
111
112endif
113
114config PCI_TX4927
115 bool
diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile
new file mode 100644
index 000000000000..668fdaad6448
--- /dev/null
+++ b/arch/mips/txx9/generic/Makefile
@@ -0,0 +1,12 @@
1#
2# Makefile for common code for TXx9 based systems
3#
4
5obj-y += setup.o
6obj-$(CONFIG_PCI) += pci.o
7obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o irq_tx4927.o
8obj-$(CONFIG_SOC_TX4938) += mem_tx4938.o irq_tx4938.o
9obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
10obj-$(CONFIG_KGDB) += dbgio.o
11
12EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4938/common/dbgio.c b/arch/mips/txx9/generic/dbgio.c
index 33b9c672a322..33b9c672a322 100644
--- a/arch/mips/tx4938/common/dbgio.c
+++ b/arch/mips/txx9/generic/dbgio.c
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/txx9/generic/irq_tx4927.c
index 0aabd57fdad2..6377bd8a9050 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/txx9/generic/irq_tx4927.c
@@ -26,40 +26,12 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <asm/irq_cpu.h> 28#include <asm/irq_cpu.h>
29#include <asm/mipsregs.h> 29#include <asm/txx9/tx4927.h>
30#include <asm/tx4927/tx4927.h>
31#ifdef CONFIG_TOSHIBA_RBTX4927
32#include <asm/tx4927/toshiba_rbtx4927.h>
33#endif
34 30
35void __init tx4927_irq_init(void) 31void __init tx4927_irq_init(void)
36{ 32{
37 mips_cpu_irq_init(); 33 mips_cpu_irq_init();
38 txx9_irq_init(TX4927_IRC_REG); 34 txx9_irq_init(TX4927_IRC_REG);
39 set_irq_chained_handler(TX4927_IRQ_NEST_PIC_ON_CP0, handle_simple_irq); 35 set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
40} 36 handle_simple_irq);
41
42asmlinkage void plat_irq_dispatch(void)
43{
44 unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
45
46 if (pending & STATUSF_IP7) /* cpu timer */
47 do_IRQ(TX4927_IRQ_CPU_TIMER);
48 else if (pending & STATUSF_IP2) { /* tx4927 pic */
49 int irq = txx9_irq();
50#ifdef CONFIG_TOSHIBA_RBTX4927
51 if (irq == TX4927_IRQ_NEST_EXT_ON_PIC)
52 irq = toshiba_rbtx4927_irq_nested(irq);
53#endif
54 if (unlikely(irq < 0)) {
55 spurious_interrupt();
56 return;
57 }
58 do_IRQ(irq);
59 } else if (pending & STATUSF_IP0) /* user line 0 */
60 do_IRQ(TX4927_IRQ_USER0);
61 else if (pending & STATUSF_IP1) /* user line 1 */
62 do_IRQ(TX4927_IRQ_USER1);
63 else
64 spurious_interrupt();
65} 37}
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c
new file mode 100644
index 000000000000..5fc86c9c9d2f
--- /dev/null
+++ b/arch/mips/txx9/generic/irq_tx4938.c
@@ -0,0 +1,25 @@
1/*
2 * linux/arch/mips/tx4938/common/irq.c
3 *
4 * Common tx4938 irq handler
5 * Copyright (C) 2000-2001 Toshiba Corporation
6 *
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <asm/irq_cpu.h>
17#include <asm/txx9/tx4938.h>
18
19void __init tx4938_irq_init(void)
20{
21 mips_cpu_irq_init();
22 txx9_irq_init(TX4938_IRC_REG);
23 set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
24 handle_simple_irq);
25}
diff --git a/arch/mips/tx4927/common/tx4927_prom.c b/arch/mips/txx9/generic/mem_tx4927.c
index 6eed53d8f386..12dfc377bf2f 100644
--- a/arch/mips/tx4927/common/tx4927_prom.c
+++ b/arch/mips/txx9/generic/mem_tx4927.c
@@ -30,13 +30,8 @@
30 */ 30 */
31 31
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/mm.h> 33#include <linux/types.h>
34#include <linux/sched.h> 34#include <linux/io.h>
35#include <linux/bootmem.h>
36
37#include <asm/addrspace.h>
38#include <asm/bootinfo.h>
39#include <asm/tx4927/tx4927.h>
40 35
41static unsigned int __init tx4927_process_sdccr(unsigned long addr) 36static unsigned int __init tx4927_process_sdccr(unsigned long addr)
42{ 37{
diff --git a/arch/mips/tx4938/common/prom.c b/arch/mips/txx9/generic/mem_tx4938.c
index 20baeaeba4cd..20baeaeba4cd 100644
--- a/arch/mips/tx4938/common/prom.c
+++ b/arch/mips/txx9/generic/mem_tx4938.c
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
new file mode 100644
index 000000000000..0b92d8c13208
--- /dev/null
+++ b/arch/mips/txx9/generic/pci.c
@@ -0,0 +1,388 @@
1/*
2 * linux/arch/mips/txx9/pci.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4927/setup.c,
5 * linux/arch/mips/txx9/rbtx4938/setup.c,
6 * and RBTX49xx patch from CELF patch archive.
7 *
8 * Copyright 2001-2005 MontaVista Software Inc.
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
10 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 */
16#include <linux/delay.h>
17#include <linux/jiffies.h>
18#include <linux/io.h>
19#include <asm/txx9/generic.h>
20#include <asm/txx9/pci.h>
21#ifdef CONFIG_TOSHIBA_FPCIB0
22#include <linux/interrupt.h>
23#include <asm/i8259.h>
24#include <asm/txx9/smsc_fdc37m81x.h>
25#endif
26
27static int __init
28early_read_config_word(struct pci_controller *hose,
29 int top_bus, int bus, int devfn, int offset, u16 *value)
30{
31 struct pci_dev fake_dev;
32 struct pci_bus fake_bus;
33
34 fake_dev.bus = &fake_bus;
35 fake_dev.sysdata = hose;
36 fake_dev.devfn = devfn;
37 fake_bus.number = bus;
38 fake_bus.sysdata = hose;
39 fake_bus.ops = hose->pci_ops;
40
41 if (bus != top_bus)
42 /* Fake a parent bus structure. */
43 fake_bus.parent = &fake_bus;
44 else
45 fake_bus.parent = NULL;
46
47 return pci_read_config_word(&fake_dev, offset, value);
48}
49
50int __init txx9_pci66_check(struct pci_controller *hose, int top_bus,
51 int current_bus)
52{
53 u32 pci_devfn;
54 unsigned short vid;
55 int cap66 = -1;
56 u16 stat;
57
58 /* It seems SLC90E66 needs some time after PCI reset... */
59 mdelay(80);
60
61 printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
62
63 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
64 if (PCI_FUNC(pci_devfn))
65 continue;
66 if (early_read_config_word(hose, top_bus, current_bus,
67 pci_devfn, PCI_VENDOR_ID, &vid) !=
68 PCIBIOS_SUCCESSFUL)
69 continue;
70 if (vid == 0xffff)
71 continue;
72
73 /* check 66MHz capability */
74 if (cap66 < 0)
75 cap66 = 1;
76 if (cap66) {
77 early_read_config_word(hose, top_bus, current_bus,
78 pci_devfn, PCI_STATUS, &stat);
79 if (!(stat & PCI_STATUS_66MHZ)) {
80 printk(KERN_DEBUG
81 "PCI: %02x:%02x not 66MHz capable.\n",
82 current_bus, pci_devfn);
83 cap66 = 0;
84 break;
85 }
86 }
87 }
88 return cap66 > 0;
89}
90
91static struct resource primary_pci_mem_res[2] = {
92 { .name = "PCI MEM" },
93 { .name = "PCI MMIO" },
94};
95static struct resource primary_pci_io_res = { .name = "PCI IO" };
96struct pci_controller txx9_primary_pcic = {
97 .mem_resource = &primary_pci_mem_res[0],
98 .io_resource = &primary_pci_io_res,
99};
100
101#ifdef CONFIG_64BIT
102int txx9_pci_mem_high __initdata = 1;
103#else
104int txx9_pci_mem_high __initdata;
105#endif
106
107/*
108 * allocate pci_controller and resources.
109 * mem_base, io_base: physical addresss. 0 for auto assignment.
110 * mem_size and io_size means max size on auto assignment.
111 * pcic must be &txx9_primary_pcic or NULL.
112 */
113struct pci_controller *__init
114txx9_alloc_pci_controller(struct pci_controller *pcic,
115 unsigned long mem_base, unsigned long mem_size,
116 unsigned long io_base, unsigned long io_size)
117{
118 struct pcic {
119 struct pci_controller c;
120 struct resource r_mem[2];
121 struct resource r_io;
122 } *new = NULL;
123 int min_size = 0x10000;
124
125 if (!pcic) {
126 new = kzalloc(sizeof(*new), GFP_KERNEL);
127 if (!new)
128 return NULL;
129 new->r_mem[0].name = "PCI mem";
130 new->r_mem[1].name = "PCI mmio";
131 new->r_io.name = "PCI io";
132 new->c.mem_resource = new->r_mem;
133 new->c.io_resource = &new->r_io;
134 pcic = &new->c;
135 } else
136 BUG_ON(pcic != &txx9_primary_pcic);
137 pcic->io_resource->flags = IORESOURCE_IO;
138
139 /*
140 * for auto assignment, first search a (big) region for PCI
141 * MEM, then search a region for PCI IO.
142 */
143 if (mem_base) {
144 pcic->mem_resource[0].start = mem_base;
145 pcic->mem_resource[0].end = mem_base + mem_size - 1;
146 if (request_resource(&iomem_resource, &pcic->mem_resource[0]))
147 goto free_and_exit;
148 } else {
149 unsigned long min = 0, max = 0x20000000; /* low 512MB */
150 if (!mem_size) {
151 /* default size for auto assignment */
152 if (txx9_pci_mem_high)
153 mem_size = 0x20000000; /* mem:512M(max) */
154 else
155 mem_size = 0x08000000; /* mem:128M(max) */
156 }
157 if (txx9_pci_mem_high) {
158 min = 0x20000000;
159 max = 0xe0000000;
160 }
161 /* search free region for PCI MEM */
162 for (; mem_size >= min_size; mem_size /= 2) {
163 if (allocate_resource(&iomem_resource,
164 &pcic->mem_resource[0],
165 mem_size, min, max,
166 mem_size, NULL, NULL) == 0)
167 break;
168 }
169 if (mem_size < min_size)
170 goto free_and_exit;
171 }
172
173 pcic->mem_resource[1].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
174 if (io_base) {
175 pcic->mem_resource[1].start = io_base;
176 pcic->mem_resource[1].end = io_base + io_size - 1;
177 if (request_resource(&iomem_resource, &pcic->mem_resource[1]))
178 goto release_and_exit;
179 } else {
180 if (!io_size)
181 /* default size for auto assignment */
182 io_size = 0x01000000; /* io:16M(max) */
183 /* search free region for PCI IO in low 512MB */
184 for (; io_size >= min_size; io_size /= 2) {
185 if (allocate_resource(&iomem_resource,
186 &pcic->mem_resource[1],
187 io_size, 0, 0x20000000,
188 io_size, NULL, NULL) == 0)
189 break;
190 }
191 if (io_size < min_size)
192 goto release_and_exit;
193 io_base = pcic->mem_resource[1].start;
194 }
195
196 pcic->mem_resource[0].flags = IORESOURCE_MEM;
197 if (pcic == &txx9_primary_pcic &&
198 mips_io_port_base == (unsigned long)-1) {
199 /* map ioport 0 to PCI I/O space address 0 */
200 set_io_port_base(IO_BASE + pcic->mem_resource[1].start);
201 pcic->io_resource->start = 0;
202 pcic->io_offset = 0; /* busaddr == ioaddr */
203 pcic->io_map_base = IO_BASE + pcic->mem_resource[1].start;
204 } else {
205 /* physaddr to ioaddr */
206 pcic->io_resource->start =
207 io_base - (mips_io_port_base - IO_BASE);
208 pcic->io_offset = io_base - (mips_io_port_base - IO_BASE);
209 pcic->io_map_base = mips_io_port_base;
210 }
211 pcic->io_resource->end = pcic->io_resource->start + io_size - 1;
212
213 pcic->mem_offset = 0; /* busaddr == physaddr */
214
215 printk(KERN_INFO "PCI: IO 0x%08llx-0x%08llx MEM 0x%08llx-0x%08llx\n",
216 (unsigned long long)pcic->mem_resource[1].start,
217 (unsigned long long)pcic->mem_resource[1].end,
218 (unsigned long long)pcic->mem_resource[0].start,
219 (unsigned long long)pcic->mem_resource[0].end);
220
221 /* register_pci_controller() will request MEM resource */
222 release_resource(&pcic->mem_resource[0]);
223 return pcic;
224 release_and_exit:
225 release_resource(&pcic->mem_resource[0]);
226 free_and_exit:
227 kfree(new);
228 printk(KERN_ERR "PCI: Failed to allocate resources.\n");
229 return NULL;
230}
231
232static int __init
233txx9_arch_pci_init(void)
234{
235 PCIBIOS_MIN_IO = 0x8000; /* reseve legacy I/O space */
236 return 0;
237}
238arch_initcall(txx9_arch_pci_init);
239
240/* IRQ/IDSEL mapping */
241int txx9_pci_option =
242#ifdef CONFIG_PICMG_PCI_BACKPLANE_DEFAULT
243 TXX9_PCI_OPT_PICMG |
244#endif
245 TXX9_PCI_OPT_CLK_AUTO;
246
247enum txx9_pci_err_action txx9_pci_err_action = TXX9_PCI_ERR_REPORT;
248
249#ifdef CONFIG_TOSHIBA_FPCIB0
250static irqreturn_t i8259_interrupt(int irq, void *dev_id)
251{
252 int isairq;
253
254 isairq = i8259_irq();
255 if (unlikely(isairq <= I8259A_IRQ_BASE))
256 return IRQ_NONE;
257 generic_handle_irq(isairq);
258 return IRQ_HANDLED;
259}
260
261static int __init
262txx9_i8259_irq_setup(int irq)
263{
264 int err;
265
266 init_i8259_irqs();
267 err = request_irq(irq, &i8259_interrupt, IRQF_DISABLED|IRQF_SHARED,
268 "cascade(i8259)", (void *)(long)irq);
269 if (!err)
270 printk(KERN_INFO "PCI-ISA bridge PIC (irq %d)\n", irq);
271 return err;
272}
273
274static void __init quirk_slc90e66_bridge(struct pci_dev *dev)
275{
276 int irq; /* PCI/ISA Bridge interrupt */
277 u8 reg_64;
278 u32 reg_b0;
279 u8 reg_e1;
280 irq = pcibios_map_irq(dev, PCI_SLOT(dev->devfn), 1); /* INTA */
281 if (!irq)
282 return;
283 txx9_i8259_irq_setup(irq);
284 pci_read_config_byte(dev, 0x64, &reg_64);
285 pci_read_config_dword(dev, 0xb0, &reg_b0);
286 pci_read_config_byte(dev, 0xe1, &reg_e1);
287 /* serial irq control */
288 reg_64 = 0xd0;
289 /* serial irq pin */
290 reg_b0 |= 0x00010000;
291 /* ide irq on isa14 */
292 reg_e1 &= 0xf0;
293 reg_e1 |= 0x0d;
294 pci_write_config_byte(dev, 0x64, reg_64);
295 pci_write_config_dword(dev, 0xb0, reg_b0);
296 pci_write_config_byte(dev, 0xe1, reg_e1);
297
298 smsc_fdc37m81x_init(0x3f0);
299 smsc_fdc37m81x_config_beg();
300 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
301 SMSC_FDC37M81X_KBD);
302 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
303 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
304 smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
305 1);
306 smsc_fdc37m81x_config_end();
307}
308
309static void quirk_slc90e66_ide(struct pci_dev *dev)
310{
311 unsigned char dat;
312 int regs[2] = {0x41, 0x43};
313 int i;
314
315 /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
316 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 14);
317 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &dat);
318 printk(KERN_INFO "PCI: %s: IRQ %02x", pci_name(dev), dat);
319 /* enable SMSC SLC90E66 IDE */
320 for (i = 0; i < ARRAY_SIZE(regs); i++) {
321 pci_read_config_byte(dev, regs[i], &dat);
322 pci_write_config_byte(dev, regs[i], dat | 0x80);
323 pci_read_config_byte(dev, regs[i], &dat);
324 printk(KERN_CONT " IDETIM%d %02x", i, dat);
325 }
326 pci_read_config_byte(dev, 0x5c, &dat);
327 /*
328 * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
329 *
330 * This line of code is intended to provide the user with a work
331 * around solution to the anomalies cited in SMSC's anomaly sheet
332 * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
333 *
334 * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
335 */
336 dat |= 0x01;
337 pci_write_config_byte(dev, regs[i], dat);
338 pci_read_config_byte(dev, 0x5c, &dat);
339 printk(KERN_CONT " REG5C %02x", dat);
340 printk(KERN_CONT "\n");
341}
342#endif /* CONFIG_TOSHIBA_FPCIB0 */
343
344static void final_fixup(struct pci_dev *dev)
345{
346 unsigned char bist;
347
348 /* Do build-in self test */
349 if (pci_read_config_byte(dev, PCI_BIST, &bist) == PCIBIOS_SUCCESSFUL &&
350 (bist & PCI_BIST_CAPABLE)) {
351 unsigned long timeout;
352 pci_set_power_state(dev, PCI_D0);
353 printk(KERN_INFO "PCI: %s BIST...", pci_name(dev));
354 pci_write_config_byte(dev, PCI_BIST, PCI_BIST_START);
355 timeout = jiffies + HZ * 2; /* timeout after 2 sec */
356 do {
357 pci_read_config_byte(dev, PCI_BIST, &bist);
358 if (time_after(jiffies, timeout))
359 break;
360 } while (bist & PCI_BIST_START);
361 if (bist & (PCI_BIST_CODE_MASK | PCI_BIST_START))
362 printk(KERN_CONT "failed. (0x%x)\n", bist);
363 else
364 printk(KERN_CONT "OK.\n");
365 }
366}
367
368#ifdef CONFIG_TOSHIBA_FPCIB0
369#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
370DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_0,
371 quirk_slc90e66_bridge);
372DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
373 quirk_slc90e66_ide);
374DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
375 quirk_slc90e66_ide);
376#endif
377DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
378DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
379
380int pcibios_plat_dev_init(struct pci_dev *dev)
381{
382 return 0;
383}
384
385int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
386{
387 return txx9_board_vec->pci_map_irq(dev, slot, pin);
388}
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
new file mode 100644
index 000000000000..5afc5d5cab03
--- /dev/null
+++ b/arch/mips/txx9/generic/setup.c
@@ -0,0 +1,212 @@
1/*
2 * linux/arch/mips/txx9/generic/setup.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
6 *
7 * 2003-2005 (c) MontaVista Software, Inc.
8 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/string.h>
19#include <linux/module.h>
20#include <linux/clk.h>
21#include <linux/err.h>
22#include <asm/bootinfo.h>
23#include <asm/txx9/generic.h>
24#ifdef CONFIG_CPU_TX49XX
25#include <asm/txx9/tx4938.h>
26#endif
27
28/* EBUSC settings of TX4927, etc. */
29struct resource txx9_ce_res[8];
30static char txx9_ce_res_name[8][4]; /* "CEn" */
31
32/* pcode, internal register */
33char txx9_pcode_str[8];
34static struct resource txx9_reg_res = {
35 .name = txx9_pcode_str,
36 .flags = IORESOURCE_MEM,
37};
38void __init
39txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
40{
41 int i;
42
43 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
44 sprintf(txx9_ce_res_name[i], "CE%d", i);
45 txx9_ce_res[i].flags = IORESOURCE_MEM;
46 txx9_ce_res[i].name = txx9_ce_res_name[i];
47 }
48
49 sprintf(txx9_pcode_str, "TX%x", pcode);
50 if (base) {
51 txx9_reg_res.start = base & 0xfffffffffULL;
52 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
53 request_resource(&iomem_resource, &txx9_reg_res);
54 }
55}
56
57/* clocks */
58unsigned int txx9_master_clock;
59unsigned int txx9_cpu_clock;
60unsigned int txx9_gbus_clock;
61
62
63/* Minimum CLK support */
64
65struct clk *clk_get(struct device *dev, const char *id)
66{
67 if (!strcmp(id, "spi-baseclk"))
68 return (struct clk *)(txx9_gbus_clock / 2 / 4);
69 if (!strcmp(id, "imbus_clk"))
70 return (struct clk *)(txx9_gbus_clock / 2);
71 return ERR_PTR(-ENOENT);
72}
73EXPORT_SYMBOL(clk_get);
74
75int clk_enable(struct clk *clk)
76{
77 return 0;
78}
79EXPORT_SYMBOL(clk_enable);
80
81void clk_disable(struct clk *clk)
82{
83}
84EXPORT_SYMBOL(clk_disable);
85
86unsigned long clk_get_rate(struct clk *clk)
87{
88 return (unsigned long)clk;
89}
90EXPORT_SYMBOL(clk_get_rate);
91
92void clk_put(struct clk *clk)
93{
94}
95EXPORT_SYMBOL(clk_put);
96
97extern struct txx9_board_vec jmr3927_vec;
98extern struct txx9_board_vec rbtx4927_vec;
99extern struct txx9_board_vec rbtx4937_vec;
100extern struct txx9_board_vec rbtx4938_vec;
101
102struct txx9_board_vec *txx9_board_vec __initdata;
103static char txx9_system_type[32];
104
105void __init prom_init_cmdline(void)
106{
107 int argc = (int)fw_arg0;
108 char **argv = (char **)fw_arg1;
109 int i; /* Always ignore the "-c" at argv[0] */
110
111 /* ignore all built-in args if any f/w args given */
112 if (argc > 1)
113 *arcs_cmdline = '\0';
114
115 for (i = 1; i < argc; i++) {
116 if (i != 1)
117 strcat(arcs_cmdline, " ");
118 strcat(arcs_cmdline, argv[i]);
119 }
120}
121
122void __init prom_init(void)
123{
124#ifdef CONFIG_CPU_TX39XX
125 txx9_board_vec = &jmr3927_vec;
126#endif
127#ifdef CONFIG_CPU_TX49XX
128 switch (TX4938_REV_PCODE()) {
129 case 0x4927:
130 txx9_board_vec = &rbtx4927_vec;
131 break;
132 case 0x4937:
133 txx9_board_vec = &rbtx4937_vec;
134 break;
135 case 0x4938:
136 txx9_board_vec = &rbtx4938_vec;
137 break;
138 }
139#endif
140
141 strcpy(txx9_system_type, txx9_board_vec->system);
142
143 txx9_board_vec->prom_init();
144}
145
146void __init prom_free_prom_memory(void)
147{
148}
149
150const char *get_system_type(void)
151{
152 return txx9_system_type;
153}
154
155char * __init prom_getcmdline(void)
156{
157 return &(arcs_cmdline[0]);
158}
159
160/* wrappers */
161void __init plat_mem_setup(void)
162{
163 txx9_board_vec->mem_setup();
164}
165
166void __init arch_init_irq(void)
167{
168 txx9_board_vec->irq_setup();
169}
170
171void __init plat_time_init(void)
172{
173 txx9_board_vec->time_init();
174}
175
176static int __init _txx9_arch_init(void)
177{
178 if (txx9_board_vec->arch_init)
179 txx9_board_vec->arch_init();
180 return 0;
181}
182arch_initcall(_txx9_arch_init);
183
184static int __init _txx9_device_init(void)
185{
186 if (txx9_board_vec->device_init)
187 txx9_board_vec->device_init();
188 return 0;
189}
190device_initcall(_txx9_device_init);
191
192int (*txx9_irq_dispatch)(int pending);
193asmlinkage void plat_irq_dispatch(void)
194{
195 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
196 int irq = txx9_irq_dispatch(pending);
197
198 if (likely(irq >= 0))
199 do_IRQ(irq);
200 else
201 spurious_interrupt();
202}
203
204/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
205#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
206static unsigned long __swizzle_addr_none(unsigned long port)
207{
208 return port;
209}
210unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
211EXPORT_SYMBOL(__swizzle_addr_b);
212#endif
diff --git a/arch/mips/tx4927/common/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c
index 33f517bc9a08..69e487467fa5 100644
--- a/arch/mips/tx4927/common/smsc_fdc37m81x.c
+++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c
@@ -13,7 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/types.h> 14#include <linux/types.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/tx4927/smsc_fdc37m81x.h> 16#include <asm/txx9/smsc_fdc37m81x.h>
17 17
18#define DEBUG 18#define DEBUG
19 19
diff --git a/arch/mips/jmr3927/rbhma3100/Makefile b/arch/mips/txx9/jmr3927/Makefile
index d86e30dca8f3..ba292c945669 100644
--- a/arch/mips/jmr3927/rbhma3100/Makefile
+++ b/arch/mips/txx9/jmr3927/Makefile
@@ -2,7 +2,7 @@
2# Makefile for TOSHIBA JMR-TX3927 board 2# Makefile for TOSHIBA JMR-TX3927 board
3# 3#
4 4
5obj-y += init.o irq.o setup.o 5obj-y += prom.o irq.o setup.o
6obj-$(CONFIG_KGDB) += kgdb_io.o 6obj-$(CONFIG_KGDB) += kgdb_io.o
7 7
8EXTRA_CFLAGS += -Werror 8EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/txx9/jmr3927/irq.c
index 3a47e8ce1196..070c9a115e57 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -39,7 +39,8 @@
39#include <asm/system.h> 39#include <asm/system.h>
40 40
41#include <asm/processor.h> 41#include <asm/processor.h>
42#include <asm/jmr3927/jmr3927.h> 42#include <asm/txx9/generic.h>
43#include <asm/txx9/jmr3927.h>
43 44
44#if JMR3927_IRQ_END > NR_IRQS 45#if JMR3927_IRQ_END > NR_IRQS
45#error JMR3927_IRQ_END > NR_IRQS 46#error JMR3927_IRQ_END > NR_IRQS
@@ -77,38 +78,32 @@ static void unmask_irq_ioc(unsigned int irq)
77 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 78 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
78} 79}
79 80
80asmlinkage void plat_irq_dispatch(void) 81static int jmr3927_ioc_irqroute(void)
81{
82 unsigned long cp0_cause = read_c0_cause();
83 int irq;
84
85 if ((cp0_cause & CAUSEF_IP7) == 0)
86 return;
87 irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
88
89 do_IRQ(irq + JMR3927_IRQ_IRC);
90}
91
92static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
93{ 82{
94 unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR); 83 unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR);
95 int i; 84 int i;
96 85
97 for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) { 86 for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) {
98 if (istat & (1 << i)) { 87 if (istat & (1 << i))
99 irq = JMR3927_IRQ_IOC + i; 88 return JMR3927_IRQ_IOC + i;
100 do_IRQ(irq);
101 }
102 } 89 }
103 return IRQ_HANDLED; 90 return -1;
104} 91}
105 92
106static struct irqaction ioc_action = { 93static int jmr3927_irq_dispatch(int pending)
107 .handler = jmr3927_ioc_interrupt, 94{
108 .mask = CPU_MASK_NONE, 95 int irq;
109 .name = "IOC",
110};
111 96
97 if ((pending & CAUSEF_IP7) == 0)
98 return -1;
99 irq = (pending >> CAUSEB_IP2) & 0x0f;
100 irq += JMR3927_IRQ_IRC;
101 if (irq == JMR3927_IRQ_IOCINT)
102 irq = jmr3927_ioc_irqroute();
103 return irq;
104}
105
106#ifdef CONFIG_PCI
112static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) 107static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
113{ 108{
114 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); 109 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
@@ -122,11 +117,13 @@ static struct irqaction pcierr_action = {
122 .mask = CPU_MASK_NONE, 117 .mask = CPU_MASK_NONE,
123 .name = "PCI error", 118 .name = "PCI error",
124}; 119};
120#endif
125 121
126static void __init jmr3927_irq_init(void); 122static void __init jmr3927_irq_init(void);
127 123
128void __init arch_init_irq(void) 124void __init jmr3927_irq_setup(void)
129{ 125{
126 txx9_irq_dispatch = jmr3927_irq_dispatch;
130 /* Now, interrupt control disabled, */ 127 /* Now, interrupt control disabled, */
131 /* all IRC interrupts are masked, */ 128 /* all IRC interrupts are masked, */
132 /* all IRC interrupt mode are Low Active. */ 129 /* all IRC interrupt mode are Low Active. */
@@ -144,7 +141,7 @@ void __init arch_init_irq(void)
144 jmr3927_irq_init(); 141 jmr3927_irq_init();
145 142
146 /* setup IOC interrupt 1 (PCI, MODEM) */ 143 /* setup IOC interrupt 1 (PCI, MODEM) */
147 setup_irq(JMR3927_IRQ_IOCINT, &ioc_action); 144 set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq);
148 145
149#ifdef CONFIG_PCI 146#ifdef CONFIG_PCI
150 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); 147 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
diff --git a/arch/mips/jmr3927/rbhma3100/kgdb_io.c b/arch/mips/txx9/jmr3927/kgdb_io.c
index 342579cfdc01..5bd757e56f79 100644
--- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c
+++ b/arch/mips/txx9/jmr3927/kgdb_io.c
@@ -31,7 +31,7 @@
31 * 675 Mass Ave, Cambridge, MA 02139, USA. 31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */ 32 */
33 33
34#include <asm/jmr3927/jmr3927.h> 34#include <asm/txx9/jmr3927.h>
35 35
36#define TIMEOUT 0xffffff 36#define TIMEOUT 0xffffff
37 37
diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/txx9/jmr3927/prom.c
index 5398813e50e6..2cadb423face 100644
--- a/arch/mips/jmr3927/common/prom.c
+++ b/arch/mips/txx9/jmr3927/prom.c
@@ -35,38 +35,42 @@
35 * with this program; if not, write to the Free Software Foundation, Inc., 35 * with this program; if not, write to the Free Software Foundation, Inc.,
36 * 675 Mass Ave, Cambridge, MA 02139, USA. 36 * 675 Mass Ave, Cambridge, MA 02139, USA.
37 */ 37 */
38#include <linux/kernel.h>
39#include <linux/init.h> 38#include <linux/init.h>
40#include <linux/string.h>
41
42#include <asm/bootinfo.h> 39#include <asm/bootinfo.h>
40#include <asm/txx9/generic.h>
41#include <asm/txx9/jmr3927.h>
43 42
44char * __init prom_getcmdline(void) 43#define TIMEOUT 0xffffff
45{
46 return &(arcs_cmdline[0]);
47}
48 44
49void __init prom_init_cmdline(void) 45void
46prom_putchar(char c)
50{ 47{
51 char *cp; 48 int i = 0;
52 int actr;
53 int prom_argc = fw_arg0;
54 char **prom_argv = (char **) fw_arg1;
55 49
56 actr = 1; /* Always ignore argv[0] */ 50 do {
51 i++;
52 if (i>TIMEOUT)
53 break;
54 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
55 tx3927_sioptr(1)->tfifo = c;
56 return;
57}
57 58
58 cp = &(arcs_cmdline[0]); 59void
59 while(actr < prom_argc) { 60puts(const char *cp)
60 strcpy(cp, prom_argv[actr]); 61{
61 cp += strlen(prom_argv[actr]); 62 while (*cp)
62 *cp++ = ' '; 63 prom_putchar(*cp++);
63 actr++; 64 prom_putchar('\r');
64 } 65 prom_putchar('\n');
65 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
66 --cp;
67 *cp = '\0';
68} 66}
69 67
70void __init prom_free_prom_memory(void) 68void __init jmr3927_prom_init(void)
71{ 69{
70 /* CCFG */
71 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
72 puts("Warning: TX3927 TLB off\n");
73
74 prom_init_cmdline();
75 add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
72} 76}
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/txx9/jmr3927/setup.c
index f39c444e42d4..5e35ef73c5a5 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/txx9/jmr3927/setup.c
@@ -30,21 +30,20 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/pci.h>
34#include <linux/ioport.h> 33#include <linux/ioport.h>
35#include <linux/delay.h> 34#include <linux/delay.h>
36#include <linux/pm.h> 35#include <linux/pm.h>
37#include <linux/platform_device.h> 36#include <linux/platform_device.h>
38#include <linux/clk.h>
39#include <linux/gpio.h> 37#include <linux/gpio.h>
40#ifdef CONFIG_SERIAL_TXX9 38#ifdef CONFIG_SERIAL_TXX9
41#include <linux/serial_core.h> 39#include <linux/serial_core.h>
42#endif 40#endif
43
44#include <asm/txx9tmr.h> 41#include <asm/txx9tmr.h>
45#include <asm/txx9pio.h> 42#include <asm/txx9pio.h>
46#include <asm/reboot.h> 43#include <asm/reboot.h>
47#include <asm/jmr3927/jmr3927.h> 44#include <asm/txx9/generic.h>
45#include <asm/txx9/pci.h>
46#include <asm/txx9/jmr3927.h>
48#include <asm/mipsregs.h> 47#include <asm/mipsregs.h>
49 48
50extern void puts(const char *cp); 49extern void puts(const char *cp);
@@ -83,7 +82,7 @@ static void jmr3927_machine_power_off(void)
83 while (1); 82 while (1);
84} 83}
85 84
86void __init plat_time_init(void) 85static void __init jmr3927_time_init(void)
87{ 86{
88 txx9_clockevent_init(TX3927_TMR_REG(0), 87 txx9_clockevent_init(TX3927_TMR_REG(0),
89 TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0), 88 TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0),
@@ -94,12 +93,9 @@ void __init plat_time_init(void)
94#define DO_WRITE_THROUGH 93#define DO_WRITE_THROUGH
95#define DO_ENABLE_CACHE 94#define DO_ENABLE_CACHE
96 95
97extern char * __init prom_getcmdline(void);
98static void jmr3927_board_init(void); 96static void jmr3927_board_init(void);
99extern struct resource pci_io_resource;
100extern struct resource pci_mem_resource;
101 97
102void __init plat_mem_setup(void) 98static void __init jmr3927_mem_setup(void)
103{ 99{
104 char *argptr; 100 char *argptr;
105 101
@@ -112,8 +108,8 @@ void __init plat_mem_setup(void)
112 /* 108 /*
113 * IO/MEM resources. 109 * IO/MEM resources.
114 */ 110 */
115 ioport_resource.start = pci_io_resource.start; 111 ioport_resource.start = 0;
116 ioport_resource.end = pci_io_resource.end; 112 ioport_resource.end = 0xffffffff;
117 iomem_resource.start = 0; 113 iomem_resource.start = 0;
118 iomem_resource.end = 0xffffffff; 114 iomem_resource.end = 0xffffffff;
119 115
@@ -191,9 +187,33 @@ void __init plat_mem_setup(void)
191 187
192static void tx3927_setup(void); 188static void tx3927_setup(void);
193 189
190static void __init jmr3927_pci_setup(void)
191{
192#ifdef CONFIG_PCI
193 int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
194 struct pci_controller *c;
195
196 c = txx9_alloc_pci_controller(&txx9_primary_pcic,
197 JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
198 JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
199 register_pci_controller(c);
200 if (!extarb) {
201 /* Reset PCI Bus */
202 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
203 udelay(100);
204 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
205 JMR3927_IOC_RESET_ADDR);
206 udelay(100);
207 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
208 }
209 tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
210#endif /* CONFIG_PCI */
211}
212
194static void __init jmr3927_board_init(void) 213static void __init jmr3927_board_init(void)
195{ 214{
196 tx3927_setup(); 215 tx3927_setup();
216 jmr3927_pci_setup();
197 217
198 /* SIO0 DTR on */ 218 /* SIO0 DTR on */
199 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); 219 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
@@ -210,15 +230,9 @@ static void __init jmr3927_board_init(void)
210static void __init tx3927_setup(void) 230static void __init tx3927_setup(void)
211{ 231{
212 int i; 232 int i;
213#ifdef CONFIG_PCI
214 unsigned long mips_pci_io_base = JMR3927_PCIIO;
215 unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
216 unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
217 unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
218 /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
219 unsigned long mips_pci_io_pciaddr = 0;
220#endif
221 233
234 txx9_cpu_clock = JMR3927_CORECLK;
235 txx9_gbus_clock = JMR3927_GBUSCLK;
222 /* SDRAMC are configured by PROM */ 236 /* SDRAMC are configured by PROM */
223 237
224 /* ROMC */ 238 /* ROMC */
@@ -272,74 +286,6 @@ static void __init tx3927_setup(void)
272 tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; 286 tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;
273#endif 287#endif
274 288
275#ifdef CONFIG_PCI
276 /* PCIC */
277 printk("TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:",
278 tx3927_pcicptr->did, tx3927_pcicptr->vid,
279 tx3927_pcicptr->rid);
280 if (!(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB)) {
281 printk("External\n");
282 /* XXX */
283 } else {
284 printk("Internal\n");
285
286 /* Reset PCI Bus */
287 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
288 udelay(100);
289 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
290 JMR3927_IOC_RESET_ADDR);
291 udelay(100);
292 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
293
294
295 /* Disable External PCI Config. Access */
296 tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
297#ifdef __BIG_ENDIAN
298 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
299 TX3927_PCIC_LBC_TIBSE |
300 TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
301#endif
302 /* LB->PCI mappings */
303 tx3927_pcicptr->iomas = ~(mips_pci_io_size - 1);
304 tx3927_pcicptr->ilbioma = mips_pci_io_base;
305 tx3927_pcicptr->ipbioma = mips_pci_io_pciaddr;
306 tx3927_pcicptr->mmas = ~(mips_pci_mem_size - 1);
307 tx3927_pcicptr->ilbmma = mips_pci_mem_base;
308 tx3927_pcicptr->ipbmma = mips_pci_mem_base;
309 /* PCI->LB mappings */
310 tx3927_pcicptr->iobas = 0xffffffff;
311 tx3927_pcicptr->ioba = 0;
312 tx3927_pcicptr->tlbioma = 0;
313 tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
314 tx3927_pcicptr->mba = 0;
315 tx3927_pcicptr->tlbmma = 0;
316 /* Enable Direct mapping Address Space Decoder */
317 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
318
319 /* Clear All Local Bus Status */
320 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
321 /* Enable All Local Bus Interrupts */
322 tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
323 /* Clear All PCI Status Error */
324 tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
325 /* Enable All PCI Status Error Interrupts */
326 tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
327
328 /* PCIC Int => IRC IRQ10 */
329 tx3927_pcicptr->il = TX3927_IR_PCI;
330 /* Target Control (per errata) */
331 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
332
333 /* Enable Bus Arbiter */
334 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
335
336 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
337 PCI_COMMAND_MEMORY |
338 PCI_COMMAND_IO |
339 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
340 }
341#endif /* CONFIG_PCI */
342
343 /* PIO */ 289 /* PIO */
344 /* PIO[15:12] connected to LEDs */ 290 /* PIO[15:12] connected to LEDs */
345 __raw_writel(0x0000f000, &tx3927_pioptr->dir); 291 __raw_writel(0x0000f000, &tx3927_pioptr->dir);
@@ -366,7 +312,7 @@ static void __init tx3927_setup(void)
366} 312}
367 313
368/* This trick makes rtc-ds1742 driver usable as is. */ 314/* This trick makes rtc-ds1742 driver usable as is. */
369unsigned long __swizzle_addr_b(unsigned long port) 315static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
370{ 316{
371 if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR) 317 if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
372 return port; 318 return port;
@@ -377,7 +323,6 @@ unsigned long __swizzle_addr_b(unsigned long port)
377 return port | 1; 323 return port | 1;
378#endif 324#endif
379} 325}
380EXPORT_SYMBOL(__swizzle_addr_b);
381 326
382static int __init jmr3927_rtc_init(void) 327static int __init jmr3927_rtc_init(void)
383{ 328{
@@ -390,7 +335,6 @@ static int __init jmr3927_rtc_init(void)
390 dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1); 335 dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
391 return IS_ERR(dev) ? PTR_ERR(dev) : 0; 336 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
392} 337}
393device_initcall(jmr3927_rtc_init);
394 338
395/* Watchdog support */ 339/* Watchdog support */
396 340
@@ -410,36 +354,22 @@ static int __init jmr3927_wdt_init(void)
410{ 354{
411 return txx9_wdt_init(TX3927_TMR_REG(2)); 355 return txx9_wdt_init(TX3927_TMR_REG(2));
412} 356}
413device_initcall(jmr3927_wdt_init);
414 357
415/* Minimum CLK support */ 358static void __init jmr3927_device_init(void)
416
417struct clk *clk_get(struct device *dev, const char *id)
418{ 359{
419 if (!strcmp(id, "imbus_clk")) 360 __swizzle_addr_b = jmr3927_swizzle_addr_b;
420 return (struct clk *)JMR3927_IMCLK; 361 jmr3927_rtc_init();
421 return ERR_PTR(-ENOENT); 362 jmr3927_wdt_init();
422} 363}
423EXPORT_SYMBOL(clk_get);
424 364
425int clk_enable(struct clk *clk) 365struct txx9_board_vec jmr3927_vec __initdata = {
426{ 366 .system = "Toshiba JMR_TX3927",
427 return 0; 367 .prom_init = jmr3927_prom_init,
428} 368 .mem_setup = jmr3927_mem_setup,
429EXPORT_SYMBOL(clk_enable); 369 .irq_setup = jmr3927_irq_setup,
430 370 .time_init = jmr3927_time_init,
431void clk_disable(struct clk *clk) 371 .device_init = jmr3927_device_init,
432{ 372#ifdef CONFIG_PCI
433} 373 .pci_map_irq = jmr3927_pci_map_irq,
434EXPORT_SYMBOL(clk_disable); 374#endif
435 375};
436unsigned long clk_get_rate(struct clk *clk)
437{
438 return (unsigned long)clk;
439}
440EXPORT_SYMBOL(clk_get_rate);
441
442void clk_put(struct clk *clk)
443{
444}
445EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/txx9/rbtx4927/Makefile b/arch/mips/txx9/rbtx4927/Makefile
new file mode 100644
index 000000000000..f3e1f597b4f1
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/Makefile
@@ -0,0 +1,3 @@
1obj-y += prom.o setup.o irq.o
2
3EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
new file mode 100644
index 000000000000..70f13211bc2a
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -0,0 +1,199 @@
1/*
2 * Toshiba RBTX4927 specific interrupt handlers
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * Copyright 2001-2002 MontaVista Software Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
20 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
21 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
22 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29/*
30IRQ Device
3100 RBTX4927-ISA/00
3201 RBTX4927-ISA/01 PS2/Keyboard
3302 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
3403 RBTX4927-ISA/03
3504 RBTX4927-ISA/04
3605 RBTX4927-ISA/05
3706 RBTX4927-ISA/06
3807 RBTX4927-ISA/07
3908 RBTX4927-ISA/08
4009 RBTX4927-ISA/09
4110 RBTX4927-ISA/10
4211 RBTX4927-ISA/11
4312 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
4413 RBTX4927-ISA/13
4514 RBTX4927-ISA/14 IDE
4615 RBTX4927-ISA/15
47
4816 TX4927-CP0/00 Software 0
4917 TX4927-CP0/01 Software 1
5018 TX4927-CP0/02 Cascade TX4927-CP0
5119 TX4927-CP0/03 Multiplexed -- do not use
5220 TX4927-CP0/04 Multiplexed -- do not use
5321 TX4927-CP0/05 Multiplexed -- do not use
5422 TX4927-CP0/06 Multiplexed -- do not use
5523 TX4927-CP0/07 CPU TIMER
56
5724 TX4927-PIC/00
5825 TX4927-PIC/01
5926 TX4927-PIC/02
6027 TX4927-PIC/03 Cascade RBTX4927-IOC
6128 TX4927-PIC/04
6229 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
6330 TX4927-PIC/06
6431 TX4927-PIC/07
6532 TX4927-PIC/08 TX4927 SerialIO Channel 0
6633 TX4927-PIC/09 TX4927 SerialIO Channel 1
6734 TX4927-PIC/10
6835 TX4927-PIC/11
6936 TX4927-PIC/12
7037 TX4927-PIC/13
7138 TX4927-PIC/14
7239 TX4927-PIC/15
7340 TX4927-PIC/16 TX4927 PCI PCI-C
7441 TX4927-PIC/17
7542 TX4927-PIC/18
7643 TX4927-PIC/19
7744 TX4927-PIC/20
7845 TX4927-PIC/21
7946 TX4927-PIC/22 TX4927 PCI PCI-ERR
8047 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
8148 TX4927-PIC/24
8249 TX4927-PIC/25
8350 TX4927-PIC/26
8451 TX4927-PIC/27
8552 TX4927-PIC/28
8653 TX4927-PIC/29
8754 TX4927-PIC/30
8855 TX4927-PIC/31
89
9056 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
9157 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
9258 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
9359 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
9460 RBTX4927-IOC/04
9561 RBTX4927-IOC/05
9662 RBTX4927-IOC/06
9763 RBTX4927-IOC/07
98
99NOTES:
100SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
101SouthBridge/ISA/pin=0 no pci irq used by this device
102SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
103SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
104SouthBridge/PMC/pin=0 no pci irq used by this device
105SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
106SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
107JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
108*/
109
110#include <linux/init.h>
111#include <linux/types.h>
112#include <linux/interrupt.h>
113#include <asm/io.h>
114#include <asm/mipsregs.h>
115#include <asm/txx9/generic.h>
116#include <asm/txx9/rbtx4927.h>
117
118static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
119static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
120
121#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
122static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
123 .name = TOSHIBA_RBTX4927_IOC_NAME,
124 .ack = toshiba_rbtx4927_irq_ioc_disable,
125 .mask = toshiba_rbtx4927_irq_ioc_disable,
126 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
127 .unmask = toshiba_rbtx4927_irq_ioc_enable,
128};
129#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
130#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
131
132static int toshiba_rbtx4927_irq_nested(int sw_irq)
133{
134 u8 level3;
135
136 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
137 if (level3)
138 sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
139 return (sw_irq);
140}
141
142static void __init toshiba_rbtx4927_irq_ioc_init(void)
143{
144 int i;
145
146 for (i = RBTX4927_IRQ_IOC;
147 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
148 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
149 handle_level_irq);
150 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
151}
152
153static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
154{
155 unsigned char v;
156
157 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
158 v |= (1 << (irq - RBTX4927_IRQ_IOC));
159 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
160}
161
162static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
163{
164 unsigned char v;
165
166 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
167 v &= ~(1 << (irq - RBTX4927_IRQ_IOC));
168 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
169 mmiowb();
170}
171
172
173static int rbtx4927_irq_dispatch(int pending)
174{
175 int irq;
176
177 if (pending & STATUSF_IP7) /* cpu timer */
178 irq = MIPS_CPU_IRQ_BASE + 7;
179 else if (pending & STATUSF_IP2) { /* tx4927 pic */
180 irq = txx9_irq();
181 if (irq == RBTX4927_IRQ_IOCINT)
182 irq = toshiba_rbtx4927_irq_nested(irq);
183 } else if (pending & STATUSF_IP0) /* user line 0 */
184 irq = MIPS_CPU_IRQ_BASE + 0;
185 else if (pending & STATUSF_IP1) /* user line 1 */
186 irq = MIPS_CPU_IRQ_BASE + 1;
187 else
188 irq = -1;
189 return irq;
190}
191
192void __init rbtx4927_irq_setup(void)
193{
194 txx9_irq_dispatch = rbtx4927_irq_dispatch;
195 tx4927_irq_init();
196 toshiba_rbtx4927_irq_ioc_init();
197 /* Onboard 10M Ether: High Active */
198 set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
199}
diff --git a/arch/mips/tx4927/common/tx4927_dbgio.c b/arch/mips/txx9/rbtx4927/prom.c
index d8423e001b2d..942e627d2dc1 100644
--- a/arch/mips/tx4927/common/tx4927_dbgio.c
+++ b/arch/mips/txx9/rbtx4927/prom.c
@@ -1,13 +1,14 @@
1/* 1/*
2 * linux/arch/mips/tx4927/common/tx4927_dbgio.c 2 * rbtx4927 specific prom routines
3 *
4 * kgdb interface for gdb
5 * 3 *
6 * Author: MontaVista Software, Inc. 4 * Author: MontaVista Software, Inc.
7 * source@mvista.com 5 * source@mvista.com
8 * 6 *
9 * Copyright 2001-2002 MontaVista Software Inc. 7 * Copyright 2001-2002 MontaVista Software Inc.
10 * 8 *
9 * Copyright (C) 2004 MontaVista Software Inc.
10 * Author: Manish Lachwani, mlachwani@mvista.com
11 *
11 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your 14 * Free Software Foundation; either version 2 of the License, or (at your
@@ -28,19 +29,17 @@
28 * with this program; if not, write to the Free Software Foundation, Inc., 29 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */ 31 */
32#include <linux/init.h>
33#include <asm/bootinfo.h>
34#include <asm/txx9/generic.h>
35#include <asm/txx9/rbtx4927.h>
31 36
32#include <asm/mipsregs.h> 37void __init rbtx4927_prom_init(void)
33#include <asm/system.h>
34
35u8 getDebugChar(void)
36{ 38{
37 extern u8 txx9_sio_kdbg_rd(void); 39 extern int tx4927_get_mem_size(void);
38 return (txx9_sio_kdbg_rd()); 40 int msize;
39}
40
41 41
42int putDebugChar(u8 byte) 42 prom_init_cmdline();
43{ 43 msize = tx4927_get_mem_size();
44 extern int txx9_sio_kdbg_wr( u8 ch ); 44 add_memory_region(0, msize << 20, BOOT_MEM_RAM);
45 return (txx9_sio_kdbg_wr(byte));
46} 45}
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
new file mode 100644
index 000000000000..1657fd935da8
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/setup.c
@@ -0,0 +1,443 @@
1/*
2 * Toshiba rbtx4927 specific setup
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * Copyright 2001-2002 MontaVista Software Inc.
8 *
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
10 * Copyright (C) 2000 RidgeRun, Inc.
11 * Author: RidgeRun, Inc.
12 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
13 *
14 * Copyright 2001 MontaVista Software Inc.
15 * Author: jsun@mvista.com or jsun@junsun.net
16 *
17 * Copyright 2002 MontaVista Software Inc.
18 * Author: Michael Pruznick, michael_pruznick@mvista.com
19 *
20 * Copyright (C) 2000-2001 Toshiba Corporation
21 *
22 * Copyright (C) 2004 MontaVista Software Inc.
23 * Author: Manish Lachwani, mlachwani@mvista.com
24 *
25 * This program is free software; you can redistribute it and/or modify it
26 * under the terms of the GNU General Public License as published by the
27 * Free Software Foundation; either version 2 of the License, or (at your
28 * option) any later version.
29 *
30 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
33 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
34 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
36 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
38 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
39 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * You should have received a copy of the GNU General Public License along
42 * with this program; if not, write to the Free Software Foundation, Inc.,
43 * 675 Mass Ave, Cambridge, MA 02139, USA.
44 */
45#include <linux/init.h>
46#include <linux/kernel.h>
47#include <linux/types.h>
48#include <linux/ioport.h>
49#include <linux/interrupt.h>
50#include <linux/pm.h>
51#include <linux/platform_device.h>
52#include <linux/delay.h>
53#include <asm/io.h>
54#include <asm/processor.h>
55#include <asm/reboot.h>
56#include <asm/time.h>
57#include <asm/txx9tmr.h>
58#include <asm/txx9/generic.h>
59#include <asm/txx9/pci.h>
60#include <asm/txx9/rbtx4927.h>
61#include <asm/txx9/tx4938.h> /* for TX4937 */
62#ifdef CONFIG_SERIAL_TXX9
63#include <linux/serial_core.h>
64#endif
65
66static int tx4927_ccfg_toeon = 1;
67
68#ifdef CONFIG_PCI
69static void __init tx4927_pci_setup(void)
70{
71 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB);
72 struct pci_controller *c = &txx9_primary_pcic;
73
74 register_pci_controller(c);
75
76 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66)
77 txx9_pci_option =
78 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
79 TXX9_PCI_OPT_CLK_66; /* already configured */
80
81 /* Reset PCI Bus */
82 writeb(1, rbtx4927_pcireset_addr);
83 /* Reset PCIC */
84 txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
85 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
86 TXX9_PCI_OPT_CLK_66)
87 tx4927_pciclk66_setup();
88 mdelay(10);
89 /* clear PCIC reset */
90 txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
91 writeb(0, rbtx4927_pcireset_addr);
92 iob();
93
94 tx4927_report_pciclk();
95 tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
96 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
97 TXX9_PCI_OPT_CLK_AUTO &&
98 txx9_pci66_check(c, 0, 0)) {
99 /* Reset PCI Bus */
100 writeb(1, rbtx4927_pcireset_addr);
101 /* Reset PCIC */
102 txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
103 tx4927_pciclk66_setup();
104 mdelay(10);
105 /* clear PCIC reset */
106 txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
107 writeb(0, rbtx4927_pcireset_addr);
108 iob();
109 /* Reinitialize PCIC */
110 tx4927_report_pciclk();
111 tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
112 }
113}
114
115static void __init tx4937_pci_setup(void)
116{
117 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
118 struct pci_controller *c = &txx9_primary_pcic;
119
120 register_pci_controller(c);
121
122 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
123 txx9_pci_option =
124 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
125 TXX9_PCI_OPT_CLK_66; /* already configured */
126
127 /* Reset PCI Bus */
128 writeb(1, rbtx4927_pcireset_addr);
129 /* Reset PCIC */
130 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
131 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
132 TXX9_PCI_OPT_CLK_66)
133 tx4938_pciclk66_setup();
134 mdelay(10);
135 /* clear PCIC reset */
136 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
137 writeb(0, rbtx4927_pcireset_addr);
138 iob();
139
140 tx4938_report_pciclk();
141 tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
142 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
143 TXX9_PCI_OPT_CLK_AUTO &&
144 txx9_pci66_check(c, 0, 0)) {
145 /* Reset PCI Bus */
146 writeb(1, rbtx4927_pcireset_addr);
147 /* Reset PCIC */
148 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
149 tx4938_pciclk66_setup();
150 mdelay(10);
151 /* clear PCIC reset */
152 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
153 writeb(0, rbtx4927_pcireset_addr);
154 iob();
155 /* Reinitialize PCIC */
156 tx4938_report_pciclk();
157 tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
158 }
159}
160
161static void __init rbtx4927_arch_init(void)
162{
163 tx4927_pci_setup();
164}
165
166static void __init rbtx4937_arch_init(void)
167{
168 tx4937_pci_setup();
169}
170#else
171#define rbtx4927_arch_init NULL
172#define rbtx4937_arch_init NULL
173#endif /* CONFIG_PCI */
174
175static void __noreturn wait_forever(void)
176{
177 while (1)
178 if (cpu_wait)
179 (*cpu_wait)();
180}
181
182static void toshiba_rbtx4927_restart(char *command)
183{
184 printk(KERN_NOTICE "System Rebooting...\n");
185
186 /* enable the s/w reset register */
187 writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
188
189 /* wait for enable to be seen */
190 while ((readb(RBTX4927_SW_RESET_ENABLE) &
191 RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
192
193 /* do a s/w reset */
194 writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
195
196 /* do something passive while waiting for reset */
197 local_irq_disable();
198 wait_forever();
199 /* no return */
200}
201
202static void toshiba_rbtx4927_halt(void)
203{
204 printk(KERN_NOTICE "System Halted\n");
205 local_irq_disable();
206 wait_forever();
207 /* no return */
208}
209
210static void toshiba_rbtx4927_power_off(void)
211{
212 toshiba_rbtx4927_halt();
213 /* no return */
214}
215
216static void __init rbtx4927_mem_setup(void)
217{
218 int i;
219 u32 cp0_config;
220 char *argptr;
221
222 /* f/w leaves this on at startup */
223 clear_c0_status(ST0_ERL);
224
225 /* enable caches -- HCP5 does this, pmon does not */
226 cp0_config = read_c0_config();
227 cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
228 write_c0_config(cp0_config);
229
230 ioport_resource.end = 0xffffffff;
231 iomem_resource.end = 0xffffffff;
232
233 _machine_restart = toshiba_rbtx4927_restart;
234 _machine_halt = toshiba_rbtx4927_halt;
235 pm_power_off = toshiba_rbtx4927_power_off;
236
237 for (i = 0; i < TX4927_NR_TMR; i++)
238 txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
239
240#ifdef CONFIG_PCI
241 txx9_alloc_pci_controller(&txx9_primary_pcic,
242 RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
243 RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
244#else
245 set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
246#endif
247
248 /* CCFG */
249 /* do reset on watchdog */
250 tx4927_ccfg_set(TX4927_CCFG_WR);
251 /* enable Timeout BusError */
252 if (tx4927_ccfg_toeon)
253 tx4927_ccfg_set(TX4927_CCFG_TOE);
254
255#ifdef CONFIG_SERIAL_TXX9
256 {
257 extern int early_serial_txx9_setup(struct uart_port *port);
258 struct uart_port req;
259 for(i = 0; i < 2; i++) {
260 memset(&req, 0, sizeof(req));
261 req.line = i;
262 req.iotype = UPIO_MEM;
263 req.membase = (char *)(0xff1ff300 + i * 0x100);
264 req.mapbase = 0xff1ff300 + i * 0x100;
265 req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i);
266 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
267 req.uartclk = 50000000;
268 early_serial_txx9_setup(&req);
269 }
270 }
271#ifdef CONFIG_SERIAL_TXX9_CONSOLE
272 argptr = prom_getcmdline();
273 if (strstr(argptr, "console=") == NULL) {
274 strcat(argptr, " console=ttyS0,38400");
275 }
276#endif
277#endif
278
279#ifdef CONFIG_ROOT_NFS
280 argptr = prom_getcmdline();
281 if (strstr(argptr, "root=") == NULL) {
282 strcat(argptr, " root=/dev/nfs rw");
283 }
284#endif
285
286#ifdef CONFIG_IP_PNP
287 argptr = prom_getcmdline();
288 if (strstr(argptr, "ip=") == NULL) {
289 strcat(argptr, " ip=any");
290 }
291#endif
292}
293
294static void __init rbtx49x7_common_time_init(void)
295{
296 /* change default value to udelay/mdelay take reasonable time */
297 loops_per_jiffy = txx9_cpu_clock / HZ / 2;
298
299 mips_hpt_frequency = txx9_cpu_clock / 2;
300 if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS)
301 txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
302 TXX9_IRQ_BASE + 17,
303 50000000);
304}
305
306static void __init rbtx4927_time_init(void)
307{
308 /*
309 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
310 *
311 * For TX4927:
312 * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
313 * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
314 * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
315 * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
316 * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
317 * i.e. S9[3]: ON (83MHz), OFF (100MHz)
318 */
319 switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) &
320 TX4927_CCFG_PCIDIVMODE_MASK) {
321 case TX4927_CCFG_PCIDIVMODE_2_5:
322 case TX4927_CCFG_PCIDIVMODE_5:
323 txx9_cpu_clock = 166666666; /* 166MHz */
324 break;
325 default:
326 txx9_cpu_clock = 200000000; /* 200MHz */
327 }
328
329 rbtx49x7_common_time_init();
330}
331
332static void __init rbtx4937_time_init(void)
333{
334 /*
335 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
336 *
337 * For TX4937:
338 * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
339 * PCIDIVMODE[10] is 0.
340 * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
341 * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
342 * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
343 * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
344 * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
345 * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
346 */
347 switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) &
348 TX4938_CCFG_PCIDIVMODE_MASK) {
349 case TX4938_CCFG_PCIDIVMODE_8:
350 case TX4938_CCFG_PCIDIVMODE_4:
351 txx9_cpu_clock = 266666666; /* 266MHz */
352 break;
353 case TX4938_CCFG_PCIDIVMODE_9:
354 case TX4938_CCFG_PCIDIVMODE_4_5:
355 txx9_cpu_clock = 300000000; /* 300MHz */
356 break;
357 default:
358 txx9_cpu_clock = 333333333; /* 333MHz */
359 }
360
361 rbtx49x7_common_time_init();
362}
363
364static int __init toshiba_rbtx4927_rtc_init(void)
365{
366 static struct resource __initdata res = {
367 .start = 0x1c010000,
368 .end = 0x1c010000 + 0x800 - 1,
369 .flags = IORESOURCE_MEM,
370 };
371 struct platform_device *dev =
372 platform_device_register_simple("rtc-ds1742", -1, &res, 1);
373 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
374}
375
376static int __init rbtx4927_ne_init(void)
377{
378 static struct resource __initdata res[] = {
379 {
380 .start = RBTX4927_RTL_8019_BASE,
381 .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
382 .flags = IORESOURCE_IO,
383 }, {
384 .start = RBTX4927_RTL_8019_IRQ,
385 .flags = IORESOURCE_IRQ,
386 }
387 };
388 struct platform_device *dev =
389 platform_device_register_simple("ne", -1,
390 res, ARRAY_SIZE(res));
391 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
392}
393
394/* Watchdog support */
395
396static int __init txx9_wdt_init(unsigned long base)
397{
398 struct resource res = {
399 .start = base,
400 .end = base + 0x100 - 1,
401 .flags = IORESOURCE_MEM,
402 };
403 struct platform_device *dev =
404 platform_device_register_simple("txx9wdt", -1, &res, 1);
405 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
406}
407
408static int __init rbtx4927_wdt_init(void)
409{
410 return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
411}
412
413static void __init rbtx4927_device_init(void)
414{
415 toshiba_rbtx4927_rtc_init();
416 rbtx4927_ne_init();
417 rbtx4927_wdt_init();
418}
419
420struct txx9_board_vec rbtx4927_vec __initdata = {
421 .system = "Toshiba RBTX4927",
422 .prom_init = rbtx4927_prom_init,
423 .mem_setup = rbtx4927_mem_setup,
424 .irq_setup = rbtx4927_irq_setup,
425 .time_init = rbtx4927_time_init,
426 .device_init = rbtx4927_device_init,
427 .arch_init = rbtx4927_arch_init,
428#ifdef CONFIG_PCI
429 .pci_map_irq = rbtx4927_pci_map_irq,
430#endif
431};
432struct txx9_board_vec rbtx4937_vec __initdata = {
433 .system = "Toshiba RBTX4937",
434 .prom_init = rbtx4927_prom_init,
435 .mem_setup = rbtx4927_mem_setup,
436 .irq_setup = rbtx4927_irq_setup,
437 .time_init = rbtx4937_time_init,
438 .device_init = rbtx4927_device_init,
439 .arch_init = rbtx4937_arch_init,
440#ifdef CONFIG_PCI
441 .pci_map_irq = rbtx4927_pci_map_irq,
442#endif
443};
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/Makefile b/arch/mips/txx9/rbtx4938/Makefile
index 2316dd7dd1bd..9dcc52ae5b9d 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/Makefile
+++ b/arch/mips/txx9/rbtx4938/Makefile
@@ -1,7 +1,3 @@
1#
2# Makefile for common code for Toshiba TX4927 based systems
3#
4
5obj-y += prom.o setup.o irq.o spi_eeprom.o 1obj-y += prom.o setup.o irq.o spi_eeprom.o
6 2
7EXTRA_CFLAGS += -Werror 3EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
index 4d6a8dc46c76..3971a061657a 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c
3 *
4 * Toshiba RBTX4938 specific interrupt handlers 2 * Toshiba RBTX4938 specific interrupt handlers
5 * Copyright (C) 2000-2001 Toshiba Corporation 3 * Copyright (C) 2000-2001 Toshiba Corporation
6 * 4 *
@@ -68,7 +66,9 @@ IRQ Device
68*/ 66*/
69#include <linux/init.h> 67#include <linux/init.h>
70#include <linux/interrupt.h> 68#include <linux/interrupt.h>
71#include <asm/tx4938/rbtx4938.h> 69#include <asm/mipsregs.h>
70#include <asm/txx9/generic.h>
71#include <asm/txx9/rbtx4938.h>
72 72
73static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); 73static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
74static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); 74static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
@@ -82,26 +82,17 @@ static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
82 .unmask = toshiba_rbtx4938_irq_ioc_enable, 82 .unmask = toshiba_rbtx4938_irq_ioc_enable,
83}; 83};
84 84
85int 85static int toshiba_rbtx4938_irq_nested(int sw_irq)
86toshiba_rbtx4938_irq_nested(int sw_irq)
87{ 86{
88 u8 level3; 87 u8 level3;
89 88
90 level3 = readb(rbtx4938_imstat_addr); 89 level3 = readb(rbtx4938_imstat_addr);
91 if (level3) 90 if (level3)
92 /* must use fls so onboard ATA has priority */ 91 /* must use fls so onboard ATA has priority */
93 sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1; 92 sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1;
94
95 return sw_irq; 93 return sw_irq;
96} 94}
97 95
98static struct irqaction toshiba_rbtx4938_irq_ioc_action = {
99 .handler = no_action,
100 .flags = 0,
101 .mask = CPU_MASK_NONE,
102 .name = TOSHIBA_RBTX4938_IOC_NAME,
103};
104
105/**********************************************************************************/ 96/**********************************************************************************/
106/* Functions for ioc */ 97/* Functions for ioc */
107/**********************************************************************************/ 98/**********************************************************************************/
@@ -110,13 +101,12 @@ toshiba_rbtx4938_irq_ioc_init(void)
110{ 101{
111 int i; 102 int i;
112 103
113 for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; 104 for (i = RBTX4938_IRQ_IOC;
114 i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) 105 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
115 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, 106 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
116 handle_level_irq); 107 handle_level_irq);
117 108
118 setup_irq(RBTX4938_IRQ_IOCINT, 109 set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
119 &toshiba_rbtx4938_irq_ioc_action);
120} 110}
121 111
122static void 112static void
@@ -125,7 +115,7 @@ toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
125 unsigned char v; 115 unsigned char v;
126 116
127 v = readb(rbtx4938_imask_addr); 117 v = readb(rbtx4938_imask_addr);
128 v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); 118 v |= (1 << (irq - RBTX4938_IRQ_IOC));
129 writeb(v, rbtx4938_imask_addr); 119 writeb(v, rbtx4938_imask_addr);
130 mmiowb(); 120 mmiowb();
131} 121}
@@ -136,15 +126,33 @@ toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
136 unsigned char v; 126 unsigned char v;
137 127
138 v = readb(rbtx4938_imask_addr); 128 v = readb(rbtx4938_imask_addr);
139 v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); 129 v &= ~(1 << (irq - RBTX4938_IRQ_IOC));
140 writeb(v, rbtx4938_imask_addr); 130 writeb(v, rbtx4938_imask_addr);
141 mmiowb(); 131 mmiowb();
142} 132}
143 133
144void __init arch_init_irq(void) 134static int rbtx4938_irq_dispatch(int pending)
145{ 135{
146 extern void tx4938_irq_init(void); 136 int irq;
137
138 if (pending & STATUSF_IP7)
139 irq = MIPS_CPU_IRQ_BASE + 7;
140 else if (pending & STATUSF_IP2) {
141 irq = txx9_irq();
142 if (irq == RBTX4938_IRQ_IOCINT)
143 irq = toshiba_rbtx4938_irq_nested(irq);
144 } else if (pending & STATUSF_IP1)
145 irq = MIPS_CPU_IRQ_BASE + 0;
146 else if (pending & STATUSF_IP0)
147 irq = MIPS_CPU_IRQ_BASE + 1;
148 else
149 irq = -1;
150 return irq;
151}
147 152
153void __init rbtx4938_irq_setup(void)
154{
155 txx9_irq_dispatch = rbtx4938_irq_dispatch;
148 /* Now, interrupt control disabled, */ 156 /* Now, interrupt control disabled, */
149 /* all IRC interrupts are masked, */ 157 /* all IRC interrupts are masked, */
150 /* all IRC interrupt mode are Low Active. */ 158 /* all IRC interrupt mode are Low Active. */
diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c
new file mode 100644
index 000000000000..fbb37458ddb2
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/prom.c
@@ -0,0 +1,29 @@
1/*
2 * rbtx4938 specific prom routines
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12
13#include <linux/init.h>
14#include <linux/bootmem.h>
15#include <asm/bootinfo.h>
16#include <asm/txx9/generic.h>
17#include <asm/txx9/rbtx4938.h>
18
19void __init rbtx4938_prom_init(void)
20{
21 extern int tx4938_get_mem_size(void);
22 int msize;
23#ifndef CONFIG_TX4938_NAND_BOOT
24 prom_init_cmdline();
25#endif
26
27 msize = tx4938_get_mem_size();
28 add_memory_region(0, msize << 20, BOOT_MEM_RAM);
29}
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c
new file mode 100644
index 000000000000..aaa987ae0f83
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/setup.c
@@ -0,0 +1,625 @@
1/*
2 * Setup pointers to hardware-dependent routines.
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/init.h>
13#include <linux/types.h>
14#include <linux/ioport.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/console.h>
18#include <linux/pm.h>
19#include <linux/platform_device.h>
20#include <linux/gpio.h>
21
22#include <asm/reboot.h>
23#include <asm/time.h>
24#include <asm/txx9tmr.h>
25#include <asm/io.h>
26#include <asm/txx9/generic.h>
27#include <asm/txx9/pci.h>
28#include <asm/txx9/rbtx4938.h>
29#ifdef CONFIG_SERIAL_TXX9
30#include <linux/serial_core.h>
31#endif
32#include <linux/spi/spi.h>
33#include <asm/txx9/spi.h>
34#include <asm/txx9pio.h>
35
36static int tx4938_ccfg_toeon = 1;
37
38static void rbtx4938_machine_halt(void)
39{
40 printk(KERN_NOTICE "System Halted\n");
41 local_irq_disable();
42
43 while (1)
44 __asm__(".set\tmips3\n\t"
45 "wait\n\t"
46 ".set\tmips0");
47}
48
49static void rbtx4938_machine_power_off(void)
50{
51 rbtx4938_machine_halt();
52 /* no return */
53}
54
55static void rbtx4938_machine_restart(char *command)
56{
57 local_irq_disable();
58
59 printk("Rebooting...");
60 writeb(1, rbtx4938_softresetlock_addr);
61 writeb(1, rbtx4938_sfvol_addr);
62 writeb(1, rbtx4938_softreset_addr);
63 while(1)
64 ;
65}
66
67static void __init rbtx4938_pci_setup(void)
68{
69#ifdef CONFIG_PCI
70 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
71 struct pci_controller *c = &txx9_primary_pcic;
72
73 register_pci_controller(c);
74
75 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
76 txx9_pci_option =
77 (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
78 TXX9_PCI_OPT_CLK_66; /* already configured */
79
80 /* Reset PCI Bus */
81 writeb(0, rbtx4938_pcireset_addr);
82 /* Reset PCIC */
83 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
84 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
85 TXX9_PCI_OPT_CLK_66)
86 tx4938_pciclk66_setup();
87 mdelay(10);
88 /* clear PCIC reset */
89 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
90 writeb(1, rbtx4938_pcireset_addr);
91 iob();
92
93 tx4938_report_pciclk();
94 tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
95 if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
96 TXX9_PCI_OPT_CLK_AUTO &&
97 txx9_pci66_check(c, 0, 0)) {
98 /* Reset PCI Bus */
99 writeb(0, rbtx4938_pcireset_addr);
100 /* Reset PCIC */
101 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
102 tx4938_pciclk66_setup();
103 mdelay(10);
104 /* clear PCIC reset */
105 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
106 writeb(1, rbtx4938_pcireset_addr);
107 iob();
108 /* Reinitialize PCIC */
109 tx4938_report_pciclk();
110 tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
111 }
112
113 if (__raw_readq(&tx4938_ccfgptr->pcfg) &
114 (TX4938_PCFG_ETH0_SEL|TX4938_PCFG_ETH1_SEL)) {
115 /* Reset PCIC1 */
116 txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
117 /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
118 if (!(__raw_readq(&tx4938_ccfgptr->ccfg)
119 & TX4938_CCFG_PCI1DMD))
120 tx4938_ccfg_set(TX4938_CCFG_PCI1_66);
121 mdelay(10);
122 /* clear PCIC1 reset */
123 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
124 tx4938_report_pci1clk();
125
126 /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
127 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
128 register_pci_controller(c);
129 tx4927_pcic_setup(tx4938_pcic1ptr, c, 0);
130 }
131#endif /* CONFIG_PCI */
132}
133
134/* SPI support */
135
136/* chip select for SPI devices */
137#define SEEPROM1_CS 7 /* PIO7 */
138#define SEEPROM2_CS 0 /* IOC */
139#define SEEPROM3_CS 1 /* IOC */
140#define SRTC_CS 2 /* IOC */
141
142static int __init rbtx4938_ethaddr_init(void)
143{
144#ifdef CONFIG_PCI
145 unsigned char dat[17];
146 unsigned char sum;
147 int i;
148
149 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
150 if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
151 printk(KERN_ERR "seeprom: read error.\n");
152 return -ENODEV;
153 } else {
154 if (strcmp(dat, "MAC") != 0)
155 printk(KERN_WARNING "seeprom: bad signature.\n");
156 for (i = 0, sum = 0; i < sizeof(dat); i++)
157 sum += dat[i];
158 if (sum)
159 printk(KERN_WARNING "seeprom: bad checksum.\n");
160 }
161 for (i = 0; i < 2; i++) {
162 unsigned int id =
163 TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0);
164 struct platform_device *pdev;
165 if (!(__raw_readq(&tx4938_ccfgptr->pcfg) &
166 (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL)))
167 continue;
168 pdev = platform_device_alloc("tc35815-mac", id);
169 if (!pdev ||
170 platform_device_add_data(pdev, &dat[4 + 6 * i], 6) ||
171 platform_device_add(pdev))
172 platform_device_put(pdev);
173 }
174#endif /* CONFIG_PCI */
175 return 0;
176}
177
178static void __init rbtx4938_spi_setup(void)
179{
180 /* set SPI_SEL */
181 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_SPI_SEL);
182}
183
184static struct resource rbtx4938_fpga_resource;
185static struct resource tx4938_sdram_resource[4];
186static struct resource tx4938_sram_resource;
187
188void __init tx4938_board_setup(void)
189{
190 int i;
191 unsigned long divmode;
192 int cpuclk = 0;
193 unsigned long pcode = TX4938_REV_PCODE();
194
195 ioport_resource.start = 0;
196 ioport_resource.end = 0xffffffff;
197 iomem_resource.start = 0;
198 iomem_resource.end = 0xffffffff; /* expand to 4GB */
199
200 txx9_reg_res_init(pcode, TX4938_REG_BASE,
201 TX4938_REG_SIZE);
202 /* SDRAMC,EBUSC are configured by PROM */
203 for (i = 0; i < 8; i++) {
204 if (!(TX4938_EBUSC_CR(i) & 0x8))
205 continue; /* disabled */
206 txx9_ce_res[i].start = (unsigned long)TX4938_EBUSC_BA(i);
207 txx9_ce_res[i].end =
208 txx9_ce_res[i].start + TX4938_EBUSC_SIZE(i) - 1;
209 request_resource(&iomem_resource, &txx9_ce_res[i]);
210 }
211
212 /* clocks */
213 if (txx9_master_clock) {
214 u64 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
215 /* calculate gbus_clock and cpu_clock_freq from master_clock */
216 divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
217 switch (divmode) {
218 case TX4938_CCFG_DIVMODE_8:
219 case TX4938_CCFG_DIVMODE_10:
220 case TX4938_CCFG_DIVMODE_12:
221 case TX4938_CCFG_DIVMODE_16:
222 case TX4938_CCFG_DIVMODE_18:
223 txx9_gbus_clock = txx9_master_clock * 4; break;
224 default:
225 txx9_gbus_clock = txx9_master_clock;
226 }
227 switch (divmode) {
228 case TX4938_CCFG_DIVMODE_2:
229 case TX4938_CCFG_DIVMODE_8:
230 cpuclk = txx9_gbus_clock * 2; break;
231 case TX4938_CCFG_DIVMODE_2_5:
232 case TX4938_CCFG_DIVMODE_10:
233 cpuclk = txx9_gbus_clock * 5 / 2; break;
234 case TX4938_CCFG_DIVMODE_3:
235 case TX4938_CCFG_DIVMODE_12:
236 cpuclk = txx9_gbus_clock * 3; break;
237 case TX4938_CCFG_DIVMODE_4:
238 case TX4938_CCFG_DIVMODE_16:
239 cpuclk = txx9_gbus_clock * 4; break;
240 case TX4938_CCFG_DIVMODE_4_5:
241 case TX4938_CCFG_DIVMODE_18:
242 cpuclk = txx9_gbus_clock * 9 / 2; break;
243 }
244 txx9_cpu_clock = cpuclk;
245 } else {
246 u64 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
247 if (txx9_cpu_clock == 0) {
248 txx9_cpu_clock = 300000000; /* 300MHz */
249 }
250 /* calculate gbus_clock and master_clock from cpu_clock_freq */
251 cpuclk = txx9_cpu_clock;
252 divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
253 switch (divmode) {
254 case TX4938_CCFG_DIVMODE_2:
255 case TX4938_CCFG_DIVMODE_8:
256 txx9_gbus_clock = cpuclk / 2; break;
257 case TX4938_CCFG_DIVMODE_2_5:
258 case TX4938_CCFG_DIVMODE_10:
259 txx9_gbus_clock = cpuclk * 2 / 5; break;
260 case TX4938_CCFG_DIVMODE_3:
261 case TX4938_CCFG_DIVMODE_12:
262 txx9_gbus_clock = cpuclk / 3; break;
263 case TX4938_CCFG_DIVMODE_4:
264 case TX4938_CCFG_DIVMODE_16:
265 txx9_gbus_clock = cpuclk / 4; break;
266 case TX4938_CCFG_DIVMODE_4_5:
267 case TX4938_CCFG_DIVMODE_18:
268 txx9_gbus_clock = cpuclk * 2 / 9; break;
269 }
270 switch (divmode) {
271 case TX4938_CCFG_DIVMODE_8:
272 case TX4938_CCFG_DIVMODE_10:
273 case TX4938_CCFG_DIVMODE_12:
274 case TX4938_CCFG_DIVMODE_16:
275 case TX4938_CCFG_DIVMODE_18:
276 txx9_master_clock = txx9_gbus_clock / 4; break;
277 default:
278 txx9_master_clock = txx9_gbus_clock;
279 }
280 }
281 /* change default value to udelay/mdelay take reasonable time */
282 loops_per_jiffy = txx9_cpu_clock / HZ / 2;
283
284 /* CCFG */
285 /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
286 tx4938_ccfg_set(TX4938_CCFG_WDRST | TX4938_CCFG_BEOW);
287 /* do reset on watchdog */
288 tx4938_ccfg_set(TX4938_CCFG_WR);
289 /* clear PCIC1 reset */
290 txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
291
292 /* enable Timeout BusError */
293 if (tx4938_ccfg_toeon)
294 tx4938_ccfg_set(TX4938_CCFG_TOE);
295
296 /* DMA selection */
297 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_DMASEL_ALL);
298
299 /* Use external clock for external arbiter */
300 if (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB))
301 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_PCICLKEN_ALL);
302
303 printk(KERN_INFO "%s -- %dMHz(M%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
304 txx9_pcode_str,
305 (cpuclk + 500000) / 1000000,
306 (txx9_master_clock + 500000) / 1000000,
307 (__u32)____raw_readq(&tx4938_ccfgptr->crir),
308 (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg),
309 (unsigned long long)____raw_readq(&tx4938_ccfgptr->pcfg));
310
311 printk(KERN_INFO "%s SDRAMC --", txx9_pcode_str);
312 for (i = 0; i < 4; i++) {
313 unsigned long long cr = tx4938_sdramcptr->cr[i];
314 unsigned long ram_base, ram_size;
315 if (!((unsigned long)cr & 0x00000400))
316 continue; /* disabled */
317 ram_base = (unsigned long)(cr >> 49) << 21;
318 ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
319 if (ram_base >= 0x20000000)
320 continue; /* high memory (ignore) */
321 printk(" CR%d:%016Lx", i, cr);
322 tx4938_sdram_resource[i].name = "SDRAM";
323 tx4938_sdram_resource[i].start = ram_base;
324 tx4938_sdram_resource[i].end = ram_base + ram_size - 1;
325 tx4938_sdram_resource[i].flags = IORESOURCE_MEM;
326 request_resource(&iomem_resource, &tx4938_sdram_resource[i]);
327 }
328 printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
329
330 /* SRAM */
331 if (tx4938_sramcptr->cr & 1) {
332 unsigned int size = 0x800;
333 unsigned long base =
334 (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
335 tx4938_sram_resource.name = "SRAM";
336 tx4938_sram_resource.start = base;
337 tx4938_sram_resource.end = base + size - 1;
338 tx4938_sram_resource.flags = IORESOURCE_MEM;
339 request_resource(&iomem_resource, &tx4938_sram_resource);
340 }
341
342 /* TMR */
343 for (i = 0; i < TX4938_NR_TMR; i++)
344 txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
345
346 /* enable DMA */
347 for (i = 0; i < 2; i++)
348 ____raw_writeq(TX4938_DMA_MCR_MSTEN,
349 (void __iomem *)(TX4938_DMA_REG(i) + 0x50));
350
351 /* PIO */
352 __raw_writel(0, &tx4938_pioptr->maskcpu);
353 __raw_writel(0, &tx4938_pioptr->maskext);
354
355#ifdef CONFIG_PCI
356 txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
357#endif
358}
359
360static void __init rbtx4938_time_init(void)
361{
362 mips_hpt_frequency = txx9_cpu_clock / 2;
363 if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS)
364 txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
365 TXX9_IRQ_BASE + TX4938_IR_TMR(0),
366 txx9_gbus_clock / 2);
367}
368
369static void __init rbtx4938_mem_setup(void)
370{
371 unsigned long long pcfg;
372 char *argptr;
373
374 iomem_resource.end = 0xffffffff; /* 4GB */
375
376 if (txx9_master_clock == 0)
377 txx9_master_clock = 25000000; /* 25MHz */
378 tx4938_board_setup();
379#ifndef CONFIG_PCI
380 set_io_port_base(RBTX4938_ETHER_BASE);
381#endif
382
383#ifdef CONFIG_SERIAL_TXX9
384 {
385 extern int early_serial_txx9_setup(struct uart_port *port);
386 int i;
387 struct uart_port req;
388 for(i = 0; i < 2; i++) {
389 memset(&req, 0, sizeof(req));
390 req.line = i;
391 req.iotype = UPIO_MEM;
392 req.membase = (char *)(0xff1ff300 + i * 0x100);
393 req.mapbase = 0xff1ff300 + i * 0x100;
394 req.irq = RBTX4938_IRQ_IRC_SIO(i);
395 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
396 req.uartclk = 50000000;
397 early_serial_txx9_setup(&req);
398 }
399 }
400#ifdef CONFIG_SERIAL_TXX9_CONSOLE
401 argptr = prom_getcmdline();
402 if (strstr(argptr, "console=") == NULL) {
403 strcat(argptr, " console=ttyS0,38400");
404 }
405#endif
406#endif
407
408#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
409 printk("PIOSEL: disabling both ata and nand selection\n");
410 local_irq_disable();
411 txx9_clear64(&tx4938_ccfgptr->pcfg,
412 TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
413#endif
414
415#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
416 printk("PIOSEL: enabling nand selection\n");
417 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
418 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
419#endif
420
421#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
422 printk("PIOSEL: enabling ata selection\n");
423 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
424 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
425#endif
426
427#ifdef CONFIG_IP_PNP
428 argptr = prom_getcmdline();
429 if (strstr(argptr, "ip=") == NULL) {
430 strcat(argptr, " ip=any");
431 }
432#endif
433
434
435#ifdef CONFIG_FB
436 {
437 conswitchp = &dummy_con;
438 }
439#endif
440
441 rbtx4938_spi_setup();
442 pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
443 /* fixup piosel */
444 if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
445 TX4938_PCFG_ATA_SEL)
446 writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
447 rbtx4938_piosel_addr);
448 else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
449 TX4938_PCFG_NDF_SEL)
450 writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
451 rbtx4938_piosel_addr);
452 else
453 writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
454 rbtx4938_piosel_addr);
455
456 rbtx4938_fpga_resource.name = "FPGA Registers";
457 rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
458 rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
459 rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
460 if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
461 printk("request resource for fpga failed\n");
462
463 _machine_restart = rbtx4938_machine_restart;
464 _machine_halt = rbtx4938_machine_halt;
465 pm_power_off = rbtx4938_machine_power_off;
466
467 writeb(0xff, rbtx4938_led_addr);
468 printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
469 readb(rbtx4938_fpga_rev_addr),
470 readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
471}
472
473static int __init rbtx4938_ne_init(void)
474{
475 struct resource res[] = {
476 {
477 .start = RBTX4938_RTL_8019_BASE,
478 .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
479 .flags = IORESOURCE_IO,
480 }, {
481 .start = RBTX4938_RTL_8019_IRQ,
482 .flags = IORESOURCE_IRQ,
483 }
484 };
485 struct platform_device *dev =
486 platform_device_register_simple("ne", -1,
487 res, ARRAY_SIZE(res));
488 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
489}
490
491/* GPIO support */
492
493int gpio_to_irq(unsigned gpio)
494{
495 return -EINVAL;
496}
497
498int irq_to_gpio(unsigned irq)
499{
500 return -EINVAL;
501}
502
503static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
504
505static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
506 int value)
507{
508 u8 val;
509 unsigned long flags;
510 spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
511 val = readb(rbtx4938_spics_addr);
512 if (value)
513 val |= 1 << offset;
514 else
515 val &= ~(1 << offset);
516 writeb(val, rbtx4938_spics_addr);
517 mmiowb();
518 spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
519}
520
521static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
522 unsigned int offset, int value)
523{
524 rbtx4938_spi_gpio_set(chip, offset, value);
525 return 0;
526}
527
528static struct gpio_chip rbtx4938_spi_gpio_chip = {
529 .set = rbtx4938_spi_gpio_set,
530 .direction_output = rbtx4938_spi_gpio_dir_out,
531 .label = "RBTX4938-SPICS",
532 .base = 16,
533 .ngpio = 3,
534};
535
536/* SPI support */
537
538static void __init txx9_spi_init(unsigned long base, int irq)
539{
540 struct resource res[] = {
541 {
542 .start = base,
543 .end = base + 0x20 - 1,
544 .flags = IORESOURCE_MEM,
545 }, {
546 .start = irq,
547 .flags = IORESOURCE_IRQ,
548 },
549 };
550 platform_device_register_simple("spi_txx9", 0,
551 res, ARRAY_SIZE(res));
552}
553
554static int __init rbtx4938_spi_init(void)
555{
556 struct spi_board_info srtc_info = {
557 .modalias = "rtc-rs5c348",
558 .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
559 .bus_num = 0,
560 .chip_select = 16 + SRTC_CS,
561 /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
562 .mode = SPI_MODE_1 | SPI_CS_HIGH,
563 };
564 spi_register_board_info(&srtc_info, 1);
565 spi_eeprom_register(SEEPROM1_CS);
566 spi_eeprom_register(16 + SEEPROM2_CS);
567 spi_eeprom_register(16 + SEEPROM3_CS);
568 gpio_request(16 + SRTC_CS, "rtc-rs5c348");
569 gpio_direction_output(16 + SRTC_CS, 0);
570 gpio_request(SEEPROM1_CS, "seeprom1");
571 gpio_direction_output(SEEPROM1_CS, 1);
572 gpio_request(16 + SEEPROM2_CS, "seeprom2");
573 gpio_direction_output(16 + SEEPROM2_CS, 1);
574 gpio_request(16 + SEEPROM3_CS, "seeprom3");
575 gpio_direction_output(16 + SEEPROM3_CS, 1);
576 txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI);
577 return 0;
578}
579
580static void __init rbtx4938_arch_init(void)
581{
582 txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
583 gpiochip_add(&rbtx4938_spi_gpio_chip);
584 rbtx4938_pci_setup();
585 rbtx4938_spi_init();
586}
587
588/* Watchdog support */
589
590static int __init txx9_wdt_init(unsigned long base)
591{
592 struct resource res = {
593 .start = base,
594 .end = base + 0x100 - 1,
595 .flags = IORESOURCE_MEM,
596 };
597 struct platform_device *dev =
598 platform_device_register_simple("txx9wdt", -1, &res, 1);
599 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
600}
601
602static int __init rbtx4938_wdt_init(void)
603{
604 return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
605}
606
607static void __init rbtx4938_device_init(void)
608{
609 rbtx4938_ethaddr_init();
610 rbtx4938_ne_init();
611 rbtx4938_wdt_init();
612}
613
614struct txx9_board_vec rbtx4938_vec __initdata = {
615 .system = "Toshiba RBTX4938",
616 .prom_init = rbtx4938_prom_init,
617 .mem_setup = rbtx4938_mem_setup,
618 .irq_setup = rbtx4938_irq_setup,
619 .time_init = rbtx4938_time_init,
620 .device_init = rbtx4938_device_init,
621 .arch_init = rbtx4938_arch_init,
622#ifdef CONFIG_PCI
623 .pci_map_irq = rbtx4938_pci_map_irq,
624#endif
625};
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c b/arch/mips/txx9/rbtx4938/spi_eeprom.c
index 4d6b4ade5e8c..a7ea8b041c1d 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
+++ b/arch/mips/txx9/rbtx4938/spi_eeprom.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c 2 * spi_eeprom.c
3 * Copyright (C) 2000-2001 Toshiba Corporation 3 * Copyright (C) 2000-2001 Toshiba Corporation
4 * 4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the 5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
@@ -13,7 +13,7 @@
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/spi/spi.h> 14#include <linux/spi/spi.h>
15#include <linux/spi/eeprom.h> 15#include <linux/spi/eeprom.h>
16#include <asm/tx4938/spi.h> 16#include <asm/txx9/spi.h>
17 17
18#define AT250X0_PAGE_SIZE 8 18#define AT250X0_PAGE_SIZE 8
19 19
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 559acc09c819..c1be6b37fb2a 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -23,16 +23,6 @@ config IBM_WORKPAD
23 select SYS_SUPPORTS_32BIT_KERNEL 23 select SYS_SUPPORTS_32BIT_KERNEL
24 select SYS_SUPPORTS_LITTLE_ENDIAN 24 select SYS_SUPPORTS_LITTLE_ENDIAN
25 25
26config NEC_CMBVR4133
27 bool "NEC CMB-VR4133"
28 select CEVT_R4K
29 select CSRC_R4K
30 select DMA_NONCOHERENT
31 select IRQ_CPU
32 select HW_HAS_PCI
33 select SYS_SUPPORTS_32BIT_KERNEL
34 select SYS_SUPPORTS_LITTLE_ENDIAN
35
36config TANBAC_TB022X 26config TANBAC_TB022X
37 bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM" 27 bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
38 select CEVT_R4K 28 select CEVT_R4K
@@ -73,13 +63,6 @@ config ZAO_CAPCELLA
73 63
74endchoice 64endchoice
75 65
76config ROCKHOPPER
77 bool "Support for Rockhopper base board"
78 depends on NEC_CMBVR4133
79 select PCI_VR41XX
80 select I8259
81 select HAVE_STD_PC_SERIAL_PORT
82
83choice 66choice
84 prompt "Base board type" 67 prompt "Base board type"
85 depends on TANBAC_TB022X 68 depends on TANBAC_TB022X
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/Makefile b/arch/mips/vr41xx/nec-cmbvr4133/Makefile
deleted file mode 100644
index 5835cae54aca..000000000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the NEC-CMBVR4133
3#
4
5obj-y := init.o setup.o
6
7obj-$(CONFIG_PCI) += m1535plus.o
8obj-$(CONFIG_ROCKHOPPER) += irq.o
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
deleted file mode 100644
index 7c5e18ee2231..000000000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * arch/mips/vr41xx/nec-cmbvr4133/init.c
3 *
4 * PROM library initialisation code for NEC CMB-VR4133 board.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Jun Sun <jsun@mvista.com, or source@mvista.com> and
8 * Alex Sapkov <asapkov@ru.mvista.com>
9 *
10 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 *
15 * Support for NEC-CMBVR4133 in 2.6
16 * Manish Lachwani (mlachwani@mvista.com)
17 */
18
19#ifdef CONFIG_ROCKHOPPER
20#include <asm/io.h>
21#include <linux/pci.h>
22
23#define PCICONFDREG 0xaf000c14
24#define PCICONFAREG 0xaf000c18
25
26void disable_pcnet(void)
27{
28 u32 data;
29
30 /*
31 * Workaround for the bug in PMON on VR4133. PMON leaves
32 * AMD PCNet controller (on Rockhopper) initialized and running in
33 * bus master mode. We have do disable it before doing any
34 * further initialization. Or we get problems with PCI bus 2
35 * and random lockups and crashes.
36 */
37
38 writel((2 << 16) |
39 (PCI_DEVFN(1, 0) << 8) |
40 (0 & 0xfc) |
41 1UL,
42 PCICONFAREG);
43
44 data = readl(PCICONFDREG);
45
46 writel((2 << 16) |
47 (PCI_DEVFN(1, 0) << 8) |
48 (4 & 0xfc) |
49 1UL,
50 PCICONFAREG);
51
52 data = readl(PCICONFDREG);
53
54 writel((2 << 16) |
55 (PCI_DEVFN(1, 0) << 8) |
56 (4 & 0xfc) |
57 1UL,
58 PCICONFAREG);
59
60 data &= ~4;
61
62 writel(data, PCICONFDREG);
63}
64#endif
65
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
deleted file mode 100644
index 7d2d076b0f54..000000000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/mips/vr41xx/nec-cmbvr4133/irq.c
3 *
4 * Interrupt routines for the NEC CMB-VR4133 board.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
8 *
9 * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * Support for NEC-CMBVR4133 in 2.6
15 * Manish Lachwani (mlachwani@mvista.com)
16 */
17#include <linux/bitops.h>
18#include <linux/errno.h>
19#include <linux/init.h>
20#include <linux/ioport.h>
21#include <linux/interrupt.h>
22
23#include <asm/io.h>
24#include <asm/i8259.h>
25#include <asm/vr41xx/cmbvr4133.h>
26
27extern int vr4133_rockhopper;
28
29static int i8259_get_irq_number(int irq)
30{
31 return i8259_irq();
32}
33
34void __init rockhopper_init_irq(void)
35{
36 int i;
37
38 if(!vr4133_rockhopper) {
39 printk(KERN_ERR "Not a Rockhopper Board \n");
40 return;
41 }
42
43 vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
44 vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH);
45 vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number);
46}
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
deleted file mode 100644
index 1341f3287d04..000000000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
+++ /dev/null
@@ -1,249 +0,0 @@
1/*
2 * arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
3 *
4 * Initialize for ALi M1535+(included M5229 and M5237).
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
8 *
9 * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * Support for NEC-CMBVR4133 in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 */
17#include <linux/init.h>
18#include <linux/types.h>
19#include <linux/serial.h>
20
21#include <asm/vr41xx/cmbvr4133.h>
22#include <linux/pci.h>
23#include <asm/io.h>
24
25#define CONFIG_PORT(port) ((port) ? 0x3f0 : 0x370)
26#define DATA_PORT(port) ((port) ? 0x3f1 : 0x371)
27#define INDEX_PORT(port) CONFIG_PORT(port)
28
29#define ENTER_CONFIG_MODE(port) \
30 do { \
31 outb_p(0x51, CONFIG_PORT(port)); \
32 outb_p(0x23, CONFIG_PORT(port)); \
33 } while(0)
34
35#define SELECT_LOGICAL_DEVICE(port, dev_no) \
36 do { \
37 outb_p(0x07, INDEX_PORT(port)); \
38 outb_p((dev_no), DATA_PORT(port)); \
39 } while(0)
40
41#define WRITE_CONFIG_DATA(port, index, data) \
42 do { \
43 outb_p((index), INDEX_PORT(port)); \
44 outb_p((data), DATA_PORT(port)); \
45 } while(0)
46
47#define EXIT_CONFIG_MODE(port) outb(0xbb, CONFIG_PORT(port))
48
49#define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18)
50#define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14)
51
52#ifdef CONFIG_BLK_DEV_FD
53
54void __devinit ali_m1535plus_fdc_init(int port)
55{
56 ENTER_CONFIG_MODE(port);
57 SELECT_LOGICAL_DEVICE(port, 0); /* FDC */
58 WRITE_CONFIG_DATA(port, 0x30, 0x01); /* FDC: enable */
59 WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x3f0 */
60 WRITE_CONFIG_DATA(port, 0x61, 0xf0);
61 WRITE_CONFIG_DATA(port, 0x70, 0x06); /* IRQ: 6 */
62 WRITE_CONFIG_DATA(port, 0x74, 0x02); /* DMA: channel 2 */
63 WRITE_CONFIG_DATA(port, 0xf0, 0x08);
64 WRITE_CONFIG_DATA(port, 0xf1, 0x00);
65 WRITE_CONFIG_DATA(port, 0xf2, 0xff);
66 WRITE_CONFIG_DATA(port, 0xf4, 0x00);
67 EXIT_CONFIG_MODE(port);
68}
69
70#endif
71
72void __devinit ali_m1535plus_parport_init(int port)
73{
74 ENTER_CONFIG_MODE(port);
75 SELECT_LOGICAL_DEVICE(port, 3); /* Parallel Port */
76 WRITE_CONFIG_DATA(port, 0x30, 0x01);
77 WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x378 */
78 WRITE_CONFIG_DATA(port, 0x61, 0x78);
79 WRITE_CONFIG_DATA(port, 0x70, 0x07); /* IRQ: 7 */
80 WRITE_CONFIG_DATA(port, 0x74, 0x04); /* DMA: None */
81 WRITE_CONFIG_DATA(port, 0xf0, 0x8c); /* IRQ polarity: Active Low */
82 WRITE_CONFIG_DATA(port, 0xf1, 0xc5);
83 EXIT_CONFIG_MODE(port);
84}
85
86void __devinit ali_m1535plus_keyboard_init(int port)
87{
88 ENTER_CONFIG_MODE(port);
89 SELECT_LOGICAL_DEVICE(port, 7); /* KEYBOARD */
90 WRITE_CONFIG_DATA(port, 0x30, 0x01); /* KEYBOARD: eable */
91 WRITE_CONFIG_DATA(port, 0x70, 0x01); /* IRQ: 1 */
92 WRITE_CONFIG_DATA(port, 0x72, 0x0c); /* PS/2 Mouse IRQ: 12 */
93 WRITE_CONFIG_DATA(port, 0xf0, 0x00);
94 EXIT_CONFIG_MODE(port);
95}
96
97void __devinit ali_m1535plus_hotkey_init(int port)
98{
99 ENTER_CONFIG_MODE(port);
100 SELECT_LOGICAL_DEVICE(port, 0xc); /* HOTKEY */
101 WRITE_CONFIG_DATA(port, 0x30, 0x00);
102 WRITE_CONFIG_DATA(port, 0xf0, 0x35);
103 WRITE_CONFIG_DATA(port, 0xf1, 0x14);
104 WRITE_CONFIG_DATA(port, 0xf2, 0x11);
105 WRITE_CONFIG_DATA(port, 0xf3, 0x71);
106 WRITE_CONFIG_DATA(port, 0xf5, 0x05);
107 EXIT_CONFIG_MODE(port);
108}
109
110void ali_m1535plus_init(struct pci_dev *dev)
111{
112 pci_write_config_byte(dev, 0x40, 0x18); /* PCI Interface Control */
113 pci_write_config_byte(dev, 0x41, 0xc0); /* PS2 keyb & mouse enable */
114 pci_write_config_byte(dev, 0x42, 0x41); /* ISA bus cycle control */
115 pci_write_config_byte(dev, 0x43, 0x00); /* ISA bus cycle control 2 */
116 pci_write_config_byte(dev, 0x44, 0x5d); /* IDE enable & IRQ 14 */
117 pci_write_config_byte(dev, 0x45, 0x0b); /* PCI int polling mode */
118 pci_write_config_byte(dev, 0x47, 0x00); /* BIOS chip select control */
119
120 /* IRQ routing */
121 pci_write_config_byte(dev, 0x48, 0x03); /* INTA IRQ10, INTB disable */
122 pci_write_config_byte(dev, 0x49, 0x00); /* INTC and INTD disable */
123 pci_write_config_byte(dev, 0x4a, 0x00); /* INTE and INTF disable */
124 pci_write_config_byte(dev, 0x4b, 0x90); /* Audio IRQ11, Modem disable */
125
126 pci_write_config_word(dev, 0x50, 0x4000); /* Parity check IDE enable */
127 pci_write_config_word(dev, 0x52, 0x0000); /* USB & RTC disable */
128 pci_write_config_word(dev, 0x54, 0x0002); /* ??? no info */
129 pci_write_config_word(dev, 0x56, 0x0002); /* PCS1J signal disable */
130
131 pci_write_config_byte(dev, 0x59, 0x00); /* PCSDS */
132 pci_write_config_byte(dev, 0x5a, 0x00);
133 pci_write_config_byte(dev, 0x5b, 0x00);
134 pci_write_config_word(dev, 0x5c, 0x0000);
135 pci_write_config_byte(dev, 0x5e, 0x00);
136 pci_write_config_byte(dev, 0x5f, 0x00);
137 pci_write_config_word(dev, 0x60, 0x0000);
138
139 pci_write_config_byte(dev, 0x6c, 0x00);
140 pci_write_config_byte(dev, 0x6d, 0x48); /* ROM address mapping */
141 pci_write_config_byte(dev, 0x6e, 0x00); /* ??? what for? */
142
143 pci_write_config_byte(dev, 0x70, 0x12); /* Serial IRQ control */
144 pci_write_config_byte(dev, 0x71, 0xEF); /* DMA channel select */
145 pci_write_config_byte(dev, 0x72, 0x03); /* USB IDSEL */
146 pci_write_config_byte(dev, 0x73, 0x00); /* ??? no info */
147
148 /*
149 * IRQ setup ALi M5237 USB Host Controller
150 * IRQ: 9
151 */
152 pci_write_config_byte(dev, 0x74, 0x01); /* USB IRQ9 */
153
154 pci_write_config_byte(dev, 0x75, 0x1f); /* IDE2 IRQ 15 */
155 pci_write_config_byte(dev, 0x76, 0x80); /* ACPI disable */
156 pci_write_config_byte(dev, 0x77, 0x40); /* Modem disable */
157 pci_write_config_dword(dev, 0x78, 0x20000000); /* Pin select 2 */
158 pci_write_config_byte(dev, 0x7c, 0x00); /* Pin select 3 */
159 pci_write_config_byte(dev, 0x81, 0x00); /* ID read/write control */
160 pci_write_config_byte(dev, 0x90, 0x00); /* PCI PM block control */
161 pci_write_config_word(dev, 0xa4, 0x0000); /* PMSCR */
162
163#ifdef CONFIG_BLK_DEV_FD
164 ali_m1535plus_fdc_init(1);
165#endif
166
167 ali_m1535plus_keyboard_init(1);
168 ali_m1535plus_hotkey_init(1);
169}
170
171static inline void ali_config_writeb(u8 reg, u8 val, int devfn)
172{
173 u32 data;
174 int shift;
175
176 writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
177 data = readl(PCI_CONFIG_DATA);
178
179 shift = (reg & 3) << 3;
180 data &= ~(0xff << shift);
181 data |= (((u32)val) << shift);
182
183 writel(data, PCI_CONFIG_DATA);
184}
185
186static inline u8 ali_config_readb(u8 reg, int devfn)
187{
188 u32 data;
189
190 writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
191 data = readl(PCI_CONFIG_DATA);
192
193 return (u8)(data >> ((reg & 3) << 3));
194}
195
196static inline u16 ali_config_readw(u8 reg, int devfn)
197{
198 u32 data;
199
200 writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
201 data = readl(PCI_CONFIG_DATA);
202
203 return (u16)(data >> ((reg & 2) << 3));
204}
205
206int vr4133_rockhopper = 0;
207void __init ali_m5229_preinit(void)
208{
209 if (ali_config_readw(PCI_VENDOR_ID, 16) == PCI_VENDOR_ID_AL &&
210 ali_config_readw(PCI_DEVICE_ID, 16) == PCI_DEVICE_ID_AL_M1533) {
211 printk(KERN_INFO "Found an NEC Rockhopper \n");
212 vr4133_rockhopper = 1;
213 /*
214 * Enable ALi M5229 IDE Controller (both channels)
215 * IDSEL: A27
216 */
217 ali_config_writeb(0x58, 0x4c, 16);
218 }
219}
220
221void __init ali_m5229_init(struct pci_dev *dev)
222{
223 /*
224 * Enable Primary/Secondary Channel Cable Detect 40-Pin
225 */
226 pci_write_config_word(dev, 0x4a, 0xc023);
227
228 /*
229 * Set only the 3rd byteis for the master IDE's cycle and
230 * enable Internal IDE Function
231 */
232 pci_write_config_byte(dev, 0x50, 0x23); /* Class code attr register */
233
234 pci_write_config_byte(dev, 0x09, 0xff); /* Set native mode & stuff */
235 pci_write_config_byte(dev, 0x52, 0x00); /* use timing registers */
236 pci_write_config_byte(dev, 0x58, 0x02); /* Primary addr setup timing */
237 pci_write_config_byte(dev, 0x59, 0x22); /* Primary cmd block timing */
238 pci_write_config_byte(dev, 0x5a, 0x22); /* Pr drv 0 R/W timing */
239 pci_write_config_byte(dev, 0x5b, 0x22); /* Pr drv 1 R/W timing */
240 pci_write_config_byte(dev, 0x5c, 0x02); /* Sec addr setup timing */
241 pci_write_config_byte(dev, 0x5d, 0x22); /* Sec cmd block timing */
242 pci_write_config_byte(dev, 0x5e, 0x22); /* Sec drv 0 R/W timing */
243 pci_write_config_byte(dev, 0x5f, 0x22); /* Sec drv 1 R/W timing */
244 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
245 pci_write_config_word(dev, PCI_COMMAND,
246 PCI_COMMAND_PARITY | PCI_COMMAND_MASTER |
247 PCI_COMMAND_IO);
248}
249
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
deleted file mode 100644
index 7723d2011b08..000000000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * arch/mips/vr41xx/nec-cmbvr4133/setup.c
3 *
4 * Setup for the NEC CMB-VR4133.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
8 *
9 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * Support for CMBVR4133 board in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 */
17#include <linux/init.h>
18#include <linux/ide.h>
19#include <linux/ioport.h>
20
21#include <asm/reboot.h>
22#include <asm/time.h>
23#include <asm/vr41xx/cmbvr4133.h>
24#include <asm/bootinfo.h>
25
26#ifdef CONFIG_MTD
27#include <linux/mtd/physmap.h>
28#include <linux/mtd/partitions.h>
29#include <linux/mtd/mtd.h>
30#include <linux/mtd/map.h>
31
32static struct mtd_partition cmbvr4133_mtd_parts[] = {
33 {
34 .name = "User FS",
35 .size = 0x1be0000,
36 .offset = 0,
37 .mask_flags = 0,
38 },
39 {
40 .name = "PMON",
41 .size = 0x140000,
42 .offset = MTDPART_OFS_APPEND,
43 .mask_flags = MTD_WRITEABLE, /* force read-only */
44 },
45 {
46 .name = "User FS2",
47 .size = MTDPART_SIZ_FULL,
48 .offset = MTDPART_OFS_APPEND,
49 .mask_flags = 0,
50 }
51};
52
53#define number_partitions ARRAY_SIZE(cmbvr4133_mtd_parts)
54#endif
55
56extern void i8259_init(void);
57
58static void __init nec_cmbvr4133_setup(void)
59{
60#ifdef CONFIG_ROCKHOPPER
61 extern void disable_pcnet(void);
62
63 disable_pcnet();
64#endif
65 set_io_port_base(KSEG1ADDR(0x16000000));
66
67#ifdef CONFIG_PCI
68#ifdef CONFIG_ROCKHOPPER
69 ali_m5229_preinit();
70#endif
71#endif
72
73#ifdef CONFIG_ROCKHOPPER
74 rockhopper_init_irq();
75#endif
76
77#ifdef CONFIG_MTD
78 /* we use generic physmap mapping driver and we use partitions */
79 physmap_configure(0x1C000000, 0x02000000, 4, NULL);
80 physmap_set_partitions(cmbvr4133_mtd_parts, number_partitions);
81#endif
82
83 /* 128 MB memory support */
84 add_memory_region(0, 0x08000000, BOOT_MEM_RAM);
85
86#ifdef CONFIG_ROCKHOPPER
87 i8259_init();
88#endif
89}
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index bc7a19da6245..a7d4fd353c2b 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -199,6 +199,7 @@ endchoice
199 199
200config SMP 200config SMP
201 bool "Symmetric multi-processing support" 201 bool "Symmetric multi-processing support"
202 select USE_GENERIC_SMP_HELPERS
202 ---help--- 203 ---help---
203 This enables support for systems with more than one CPU. If you have 204 This enables support for systems with more than one CPU. If you have
204 a system with only one CPU, like most personal computers, say N. If 205 a system with only one CPU, like most personal computers, say N. If
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index e10d25d2d9c9..5259d8c20676 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -51,12 +51,12 @@ static struct pdc_btlb_info btlb_info __read_mostly;
51void 51void
52flush_data_cache(void) 52flush_data_cache(void)
53{ 53{
54 on_each_cpu(flush_data_cache_local, NULL, 1, 1); 54 on_each_cpu(flush_data_cache_local, NULL, 1);
55} 55}
56void 56void
57flush_instruction_cache(void) 57flush_instruction_cache(void)
58{ 58{
59 on_each_cpu(flush_instruction_cache_local, NULL, 1, 1); 59 on_each_cpu(flush_instruction_cache_local, NULL, 1);
60} 60}
61#endif 61#endif
62 62
@@ -515,7 +515,7 @@ static void cacheflush_h_tmp_function(void *dummy)
515 515
516void flush_cache_all(void) 516void flush_cache_all(void)
517{ 517{
518 on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1); 518 on_each_cpu(cacheflush_h_tmp_function, NULL, 1);
519} 519}
520 520
521void flush_cache_mm(struct mm_struct *mm) 521void flush_cache_mm(struct mm_struct *mm)
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 85fc7754ec25..d47f3975c9c6 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -84,19 +84,11 @@ EXPORT_SYMBOL(cpu_possible_map);
84 84
85DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED; 85DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;
86 86
87struct smp_call_struct {
88 void (*func) (void *info);
89 void *info;
90 long wait;
91 atomic_t unstarted_count;
92 atomic_t unfinished_count;
93};
94static volatile struct smp_call_struct *smp_call_function_data;
95
96enum ipi_message_type { 87enum ipi_message_type {
97 IPI_NOP=0, 88 IPI_NOP=0,
98 IPI_RESCHEDULE=1, 89 IPI_RESCHEDULE=1,
99 IPI_CALL_FUNC, 90 IPI_CALL_FUNC,
91 IPI_CALL_FUNC_SINGLE,
100 IPI_CPU_START, 92 IPI_CPU_START,
101 IPI_CPU_STOP, 93 IPI_CPU_STOP,
102 IPI_CPU_TEST 94 IPI_CPU_TEST
@@ -187,33 +179,12 @@ ipi_interrupt(int irq, void *dev_id)
187 179
188 case IPI_CALL_FUNC: 180 case IPI_CALL_FUNC:
189 smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu); 181 smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
190 { 182 generic_smp_call_function_interrupt();
191 volatile struct smp_call_struct *data; 183 break;
192 void (*func)(void *info); 184
193 void *info; 185 case IPI_CALL_FUNC_SINGLE:
194 int wait; 186 smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
195 187 generic_smp_call_function_single_interrupt();
196 data = smp_call_function_data;
197 func = data->func;
198 info = data->info;
199 wait = data->wait;
200
201 mb();
202 atomic_dec ((atomic_t *)&data->unstarted_count);
203
204 /* At this point, *data can't
205 * be relied upon.
206 */
207
208 (*func)(info);
209
210 /* Notify the sending CPU that the
211 * task is done.
212 */
213 mb();
214 if (wait)
215 atomic_dec ((atomic_t *)&data->unfinished_count);
216 }
217 break; 188 break;
218 189
219 case IPI_CPU_START: 190 case IPI_CPU_START:
@@ -256,6 +227,14 @@ ipi_send(int cpu, enum ipi_message_type op)
256 spin_unlock_irqrestore(lock, flags); 227 spin_unlock_irqrestore(lock, flags);
257} 228}
258 229
230static void
231send_IPI_mask(cpumask_t mask, enum ipi_message_type op)
232{
233 int cpu;
234
235 for_each_cpu_mask(cpu, mask)
236 ipi_send(cpu, op);
237}
259 238
260static inline void 239static inline void
261send_IPI_single(int dest_cpu, enum ipi_message_type op) 240send_IPI_single(int dest_cpu, enum ipi_message_type op)
@@ -295,86 +274,15 @@ smp_send_all_nop(void)
295 send_IPI_allbutself(IPI_NOP); 274 send_IPI_allbutself(IPI_NOP);
296} 275}
297 276
298 277void arch_send_call_function_ipi(cpumask_t mask)
299/**
300 * Run a function on all other CPUs.
301 * <func> The function to run. This must be fast and non-blocking.
302 * <info> An arbitrary pointer to pass to the function.
303 * <retry> If true, keep retrying until ready.
304 * <wait> If true, wait until function has completed on other CPUs.
305 * [RETURNS] 0 on success, else a negative status code.
306 *
307 * Does not return until remote CPUs are nearly ready to execute <func>
308 * or have executed.
309 */
310
311int
312smp_call_function (void (*func) (void *info), void *info, int retry, int wait)
313{ 278{
314 struct smp_call_struct data; 279 send_IPI_mask(mask, IPI_CALL_FUNC);
315 unsigned long timeout;
316 static DEFINE_SPINLOCK(lock);
317 int retries = 0;
318
319 if (num_online_cpus() < 2)
320 return 0;
321
322 /* Can deadlock when called with interrupts disabled */
323 WARN_ON(irqs_disabled());
324
325 /* can also deadlock if IPIs are disabled */
326 WARN_ON((get_eiem() & (1UL<<(CPU_IRQ_MAX - IPI_IRQ))) == 0);
327
328
329 data.func = func;
330 data.info = info;
331 data.wait = wait;
332 atomic_set(&data.unstarted_count, num_online_cpus() - 1);
333 atomic_set(&data.unfinished_count, num_online_cpus() - 1);
334
335 if (retry) {
336 spin_lock (&lock);
337 while (smp_call_function_data != 0)
338 barrier();
339 }
340 else {
341 spin_lock (&lock);
342 if (smp_call_function_data) {
343 spin_unlock (&lock);
344 return -EBUSY;
345 }
346 }
347
348 smp_call_function_data = &data;
349 spin_unlock (&lock);
350
351 /* Send a message to all other CPUs and wait for them to respond */
352 send_IPI_allbutself(IPI_CALL_FUNC);
353
354 retry:
355 /* Wait for response */
356 timeout = jiffies + HZ;
357 while ( (atomic_read (&data.unstarted_count) > 0) &&
358 time_before (jiffies, timeout) )
359 barrier ();
360
361 if (atomic_read (&data.unstarted_count) > 0) {
362 printk(KERN_CRIT "SMP CALL FUNCTION TIMED OUT! (cpu=%d), try %d\n",
363 smp_processor_id(), ++retries);
364 goto retry;
365 }
366 /* We either got one or timed out. Release the lock */
367
368 mb();
369 smp_call_function_data = NULL;
370
371 while (wait && atomic_read (&data.unfinished_count) > 0)
372 barrier ();
373
374 return 0;
375} 280}
376 281
377EXPORT_SYMBOL(smp_call_function); 282void arch_send_call_function_single_ipi(int cpu)
283{
284 send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
285}
378 286
379/* 287/*
380 * Flush all other CPU's tlb and then mine. Do this with on_each_cpu() 288 * Flush all other CPU's tlb and then mine. Do this with on_each_cpu()
@@ -384,7 +292,7 @@ EXPORT_SYMBOL(smp_call_function);
384void 292void
385smp_flush_tlb_all(void) 293smp_flush_tlb_all(void)
386{ 294{
387 on_each_cpu(flush_tlb_all_local, NULL, 1, 1); 295 on_each_cpu(flush_tlb_all_local, NULL, 1);
388} 296}
389 297
390/* 298/*
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index ce0da689a89d..b4d6c8777ed0 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -1053,7 +1053,7 @@ void flush_tlb_all(void)
1053 do_recycle++; 1053 do_recycle++;
1054 } 1054 }
1055 spin_unlock(&sid_lock); 1055 spin_unlock(&sid_lock);
1056 on_each_cpu(flush_tlb_all_local, NULL, 1, 1); 1056 on_each_cpu(flush_tlb_all_local, NULL, 1);
1057 if (do_recycle) { 1057 if (do_recycle) {
1058 spin_lock(&sid_lock); 1058 spin_lock(&sid_lock);
1059 recycle_sids(recycle_ndirty,recycle_dirty_array); 1059 recycle_sids(recycle_ndirty,recycle_dirty_array);
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a5e9912e2d37..20eacf2a8424 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -111,6 +111,7 @@ config PPC
111 select HAVE_KPROBES 111 select HAVE_KPROBES
112 select HAVE_KRETPROBES 112 select HAVE_KRETPROBES
113 select HAVE_LMB 113 select HAVE_LMB
114 select USE_GENERIC_SMP_HELPERS if SMP
114 select HAVE_OPROFILE 115 select HAVE_OPROFILE
115 116
116config EARLY_PRINTK 117config EARLY_PRINTK
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 704375bda73a..b732b5f8e356 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -172,7 +172,7 @@ static void kexec_prepare_cpus(void)
172{ 172{
173 int my_cpu, i, notified=-1; 173 int my_cpu, i, notified=-1;
174 174
175 smp_call_function(kexec_smp_down, NULL, 0, /* wait */0); 175 smp_call_function(kexec_smp_down, NULL, /* wait */0);
176 my_cpu = get_cpu(); 176 my_cpu = get_cpu();
177 177
178 /* check the others cpus are now down (via paca hw cpu id == -1) */ 178 /* check the others cpus are now down (via paca hw cpu id == -1) */
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 34843c318419..647f3e8677dc 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -747,7 +747,7 @@ static int rtas_ibm_suspend_me(struct rtas_args *args)
747 /* Call function on all CPUs. One of us will make the 747 /* Call function on all CPUs. One of us will make the
748 * rtas call 748 * rtas call
749 */ 749 */
750 if (on_each_cpu(rtas_percpu_suspend_me, &data, 1, 0)) 750 if (on_each_cpu(rtas_percpu_suspend_me, &data, 0))
751 data.error = -EINVAL; 751 data.error = -EINVAL;
752 752
753 wait_for_completion(&done); 753 wait_for_completion(&done);
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 1457aa0a08f1..5191b46a611e 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -72,12 +72,8 @@ struct smp_ops_t *smp_ops;
72 72
73static volatile unsigned int cpu_callin_map[NR_CPUS]; 73static volatile unsigned int cpu_callin_map[NR_CPUS];
74 74
75void smp_call_function_interrupt(void);
76
77int smt_enabled_at_boot = 1; 75int smt_enabled_at_boot = 1;
78 76
79static int ipi_fail_ok;
80
81static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; 77static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
82 78
83#ifdef CONFIG_PPC64 79#ifdef CONFIG_PPC64
@@ -99,12 +95,15 @@ void smp_message_recv(int msg)
99{ 95{
100 switch(msg) { 96 switch(msg) {
101 case PPC_MSG_CALL_FUNCTION: 97 case PPC_MSG_CALL_FUNCTION:
102 smp_call_function_interrupt(); 98 generic_smp_call_function_interrupt();
103 break; 99 break;
104 case PPC_MSG_RESCHEDULE: 100 case PPC_MSG_RESCHEDULE:
105 /* XXX Do we have to do this? */ 101 /* XXX Do we have to do this? */
106 set_need_resched(); 102 set_need_resched();
107 break; 103 break;
104 case PPC_MSG_CALL_FUNC_SINGLE:
105 generic_smp_call_function_single_interrupt();
106 break;
108 case PPC_MSG_DEBUGGER_BREAK: 107 case PPC_MSG_DEBUGGER_BREAK:
109 if (crash_ipi_function_ptr) { 108 if (crash_ipi_function_ptr) {
110 crash_ipi_function_ptr(get_irq_regs()); 109 crash_ipi_function_ptr(get_irq_regs());
@@ -128,6 +127,19 @@ void smp_send_reschedule(int cpu)
128 smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); 127 smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE);
129} 128}
130 129
130void arch_send_call_function_single_ipi(int cpu)
131{
132 smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE);
133}
134
135void arch_send_call_function_ipi(cpumask_t mask)
136{
137 unsigned int cpu;
138
139 for_each_cpu_mask(cpu, mask)
140 smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION);
141}
142
131#ifdef CONFIG_DEBUGGER 143#ifdef CONFIG_DEBUGGER
132void smp_send_debugger_break(int cpu) 144void smp_send_debugger_break(int cpu)
133{ 145{
@@ -154,215 +166,9 @@ static void stop_this_cpu(void *dummy)
154 ; 166 ;
155} 167}
156 168
157/*
158 * Structure and data for smp_call_function(). This is designed to minimise
159 * static memory requirements. It also looks cleaner.
160 * Stolen from the i386 version.
161 */
162static __cacheline_aligned_in_smp DEFINE_SPINLOCK(call_lock);
163
164static struct call_data_struct {
165 void (*func) (void *info);
166 void *info;
167 atomic_t started;
168 atomic_t finished;
169 int wait;
170} *call_data;
171
172/* delay of at least 8 seconds */
173#define SMP_CALL_TIMEOUT 8
174
175/*
176 * These functions send a 'generic call function' IPI to other online
177 * CPUS in the system.
178 *
179 * [SUMMARY] Run a function on other CPUs.
180 * <func> The function to run. This must be fast and non-blocking.
181 * <info> An arbitrary pointer to pass to the function.
182 * <nonatomic> currently unused.
183 * <wait> If true, wait (atomically) until function has completed on other CPUs.
184 * [RETURNS] 0 on success, else a negative status code. Does not return until
185 * remote CPUs are nearly ready to execute <<func>> or are or have executed.
186 * <map> is a cpu map of the cpus to send IPI to.
187 *
188 * You must not call this function with disabled interrupts or from a
189 * hardware interrupt handler or from a bottom half handler.
190 */
191static int __smp_call_function_map(void (*func) (void *info), void *info,
192 int nonatomic, int wait, cpumask_t map)
193{
194 struct call_data_struct data;
195 int ret = -1, num_cpus;
196 int cpu;
197 u64 timeout;
198
199 if (unlikely(smp_ops == NULL))
200 return ret;
201
202 data.func = func;
203 data.info = info;
204 atomic_set(&data.started, 0);
205 data.wait = wait;
206 if (wait)
207 atomic_set(&data.finished, 0);
208
209 /* remove 'self' from the map */
210 if (cpu_isset(smp_processor_id(), map))
211 cpu_clear(smp_processor_id(), map);
212
213 /* sanity check the map, remove any non-online processors. */
214 cpus_and(map, map, cpu_online_map);
215
216 num_cpus = cpus_weight(map);
217 if (!num_cpus)
218 goto done;
219
220 call_data = &data;
221 smp_wmb();
222 /* Send a message to all CPUs in the map */
223 for_each_cpu_mask(cpu, map)
224 smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION);
225
226 timeout = get_tb() + (u64) SMP_CALL_TIMEOUT * tb_ticks_per_sec;
227
228 /* Wait for indication that they have received the message */
229 while (atomic_read(&data.started) != num_cpus) {
230 HMT_low();
231 if (get_tb() >= timeout) {
232 printk("smp_call_function on cpu %d: other cpus not "
233 "responding (%d)\n", smp_processor_id(),
234 atomic_read(&data.started));
235 if (!ipi_fail_ok)
236 debugger(NULL);
237 goto out;
238 }
239 }
240
241 /* optionally wait for the CPUs to complete */
242 if (wait) {
243 while (atomic_read(&data.finished) != num_cpus) {
244 HMT_low();
245 if (get_tb() >= timeout) {
246 printk("smp_call_function on cpu %d: other "
247 "cpus not finishing (%d/%d)\n",
248 smp_processor_id(),
249 atomic_read(&data.finished),
250 atomic_read(&data.started));
251 debugger(NULL);
252 goto out;
253 }
254 }
255 }
256
257 done:
258 ret = 0;
259
260 out:
261 call_data = NULL;
262 HMT_medium();
263 return ret;
264}
265
266static int __smp_call_function(void (*func)(void *info), void *info,
267 int nonatomic, int wait)
268{
269 int ret;
270 spin_lock(&call_lock);
271 ret =__smp_call_function_map(func, info, nonatomic, wait,
272 cpu_online_map);
273 spin_unlock(&call_lock);
274 return ret;
275}
276
277int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
278 int wait)
279{
280 /* Can deadlock when called with interrupts disabled */
281 WARN_ON(irqs_disabled());
282
283 return __smp_call_function(func, info, nonatomic, wait);
284}
285EXPORT_SYMBOL(smp_call_function);
286
287int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
288 int nonatomic, int wait)
289{
290 cpumask_t map = CPU_MASK_NONE;
291 int ret = 0;
292
293 /* Can deadlock when called with interrupts disabled */
294 WARN_ON(irqs_disabled());
295
296 if (!cpu_online(cpu))
297 return -EINVAL;
298
299 cpu_set(cpu, map);
300 if (cpu != get_cpu()) {
301 spin_lock(&call_lock);
302 ret = __smp_call_function_map(func, info, nonatomic, wait, map);
303 spin_unlock(&call_lock);
304 } else {
305 local_irq_disable();
306 func(info);
307 local_irq_enable();
308 }
309 put_cpu();
310 return ret;
311}
312EXPORT_SYMBOL(smp_call_function_single);
313
314void smp_send_stop(void) 169void smp_send_stop(void)
315{ 170{
316 int nolock; 171 smp_call_function(stop_this_cpu, NULL, 0);
317
318 /* It's OK to fail sending the IPI, since the alternative is to
319 * be stuck forever waiting on the other CPU to take the interrupt.
320 *
321 * It's better to at least continue and go through reboot, since this
322 * function is usually called at panic or reboot time in the first
323 * place.
324 */
325 ipi_fail_ok = 1;
326
327 /* Don't deadlock in case we got called through panic */
328 nolock = !spin_trylock(&call_lock);
329 __smp_call_function_map(stop_this_cpu, NULL, 1, 0, cpu_online_map);
330 if (!nolock)
331 spin_unlock(&call_lock);
332}
333
334void smp_call_function_interrupt(void)
335{
336 void (*func) (void *info);
337 void *info;
338 int wait;
339
340 /* call_data will be NULL if the sender timed out while
341 * waiting on us to receive the call.
342 */
343 if (!call_data)
344 return;
345
346 func = call_data->func;
347 info = call_data->info;
348 wait = call_data->wait;
349
350 if (!wait)
351 smp_mb__before_atomic_inc();
352
353 /*
354 * Notify initiating CPU that I've grabbed the data and am
355 * about to execute the function
356 */
357 atomic_inc(&call_data->started);
358 /*
359 * At this point the info structure may be out of scope unless wait==1
360 */
361 (*func)(info);
362 if (wait) {
363 smp_mb__before_atomic_inc();
364 atomic_inc(&call_data->finished);
365 }
366} 172}
367 173
368extern struct gettimeofday_struct do_gtod; 174extern struct gettimeofday_struct do_gtod;
@@ -596,9 +402,9 @@ int __devinit start_secondary(void *unused)
596 402
597 secondary_cpu_time_init(); 403 secondary_cpu_time_init();
598 404
599 spin_lock(&call_lock); 405 ipi_call_lock();
600 cpu_set(cpu, cpu_online_map); 406 cpu_set(cpu, cpu_online_map);
601 spin_unlock(&call_lock); 407 ipi_call_unlock();
602 408
603 local_irq_enable(); 409 local_irq_enable();
604 410
diff --git a/arch/powerpc/kernel/tau_6xx.c b/arch/powerpc/kernel/tau_6xx.c
index 368a4934f7ee..c3a56d65c5a9 100644
--- a/arch/powerpc/kernel/tau_6xx.c
+++ b/arch/powerpc/kernel/tau_6xx.c
@@ -192,7 +192,7 @@ static void tau_timeout_smp(unsigned long unused)
192 192
193 /* schedule ourselves to be run again */ 193 /* schedule ourselves to be run again */
194 mod_timer(&tau_timer, jiffies + shrink_timer) ; 194 mod_timer(&tau_timer, jiffies + shrink_timer) ;
195 on_each_cpu(tau_timeout, NULL, 1, 0); 195 on_each_cpu(tau_timeout, NULL, 0);
196} 196}
197 197
198/* 198/*
@@ -234,7 +234,7 @@ int __init TAU_init(void)
234 tau_timer.expires = jiffies + shrink_timer; 234 tau_timer.expires = jiffies + shrink_timer;
235 add_timer(&tau_timer); 235 add_timer(&tau_timer);
236 236
237 on_each_cpu(TAU_init_smp, NULL, 1, 0); 237 on_each_cpu(TAU_init_smp, NULL, 0);
238 238
239 printk("Thermal assist unit "); 239 printk("Thermal assist unit ");
240#ifdef CONFIG_TAU_INT 240#ifdef CONFIG_TAU_INT
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 73401e83739a..f1a38a6c1e2d 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -322,7 +322,7 @@ void snapshot_timebases(void)
322{ 322{
323 if (!cpu_has_feature(CPU_FTR_PURR)) 323 if (!cpu_has_feature(CPU_FTR_PURR))
324 return; 324 return;
325 on_each_cpu(snapshot_tb_and_purr, NULL, 0, 1); 325 on_each_cpu(snapshot_tb_and_purr, NULL, 1);
326} 326}
327 327
328/* 328/*
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index ad928edafb0a..2bd12d965db1 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -218,7 +218,7 @@ static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psiz
218 mb(); 218 mb();
219 219
220 /* XXX this is sub-optimal but will do for now */ 220 /* XXX this is sub-optimal but will do for now */
221 on_each_cpu(slice_flush_segments, mm, 0, 1); 221 on_each_cpu(slice_flush_segments, mm, 1);
222#ifdef CONFIG_SPU_BASE 222#ifdef CONFIG_SPU_BASE
223 spu_flush_all_slbs(mm); 223 spu_flush_all_slbs(mm);
224#endif 224#endif
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c
index e2d867ce1c7e..69ad829a7fa3 100644
--- a/arch/powerpc/mm/tlb_64.c
+++ b/arch/powerpc/mm/tlb_64.c
@@ -66,7 +66,7 @@ static void pgtable_free_now(pgtable_free_t pgf)
66{ 66{
67 pte_freelist_forced_free++; 67 pte_freelist_forced_free++;
68 68
69 smp_call_function(pte_free_smp_sync, NULL, 0, 1); 69 smp_call_function(pte_free_smp_sync, NULL, 1);
70 70
71 pgtable_free(pgf); 71 pgtable_free(pgf);
72} 72}
diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index 4908dc98f9ca..17807acb05d9 100644
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -65,7 +65,7 @@ static int op_powerpc_setup(void)
65 65
66 /* Configure the registers on all cpus. If an error occurs on one 66 /* Configure the registers on all cpus. If an error occurs on one
67 * of the cpus, op_per_cpu_rc will be set to the error */ 67 * of the cpus, op_per_cpu_rc will be set to the error */
68 on_each_cpu(op_powerpc_cpu_setup, NULL, 0, 1); 68 on_each_cpu(op_powerpc_cpu_setup, NULL, 1);
69 69
70out: if (op_per_cpu_rc) { 70out: if (op_per_cpu_rc) {
71 /* error on setup release the performance counter hardware */ 71 /* error on setup release the performance counter hardware */
@@ -100,7 +100,7 @@ static int op_powerpc_start(void)
100 if (model->global_start) 100 if (model->global_start)
101 return model->global_start(ctr); 101 return model->global_start(ctr);
102 if (model->start) { 102 if (model->start) {
103 on_each_cpu(op_powerpc_cpu_start, NULL, 0, 1); 103 on_each_cpu(op_powerpc_cpu_start, NULL, 1);
104 return op_per_cpu_rc; 104 return op_per_cpu_rc;
105 } 105 }
106 return -EIO; /* No start function is defined for this 106 return -EIO; /* No start function is defined for this
@@ -115,7 +115,7 @@ static inline void op_powerpc_cpu_stop(void *dummy)
115static void op_powerpc_stop(void) 115static void op_powerpc_stop(void)
116{ 116{
117 if (model->stop) 117 if (model->stop)
118 on_each_cpu(op_powerpc_cpu_stop, NULL, 0, 1); 118 on_each_cpu(op_powerpc_cpu_stop, NULL, 1);
119 if (model->global_stop) 119 if (model->global_stop)
120 model->global_stop(); 120 model->global_stop();
121} 121}
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 5bf7df146022..2d5bb22d6c09 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -218,6 +218,7 @@ void iic_request_IPIs(void)
218{ 218{
219 iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call"); 219 iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
220 iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched"); 220 iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
221 iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE, "IPI-call-single");
221#ifdef CONFIG_DEBUGGER 222#ifdef CONFIG_DEBUGGER
222 iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug"); 223 iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
223#endif /* CONFIG_DEBUGGER */ 224#endif /* CONFIG_DEBUGGER */
diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c
index f0b12f212363..a0927a3bacb7 100644
--- a/arch/powerpc/platforms/ps3/smp.c
+++ b/arch/powerpc/platforms/ps3/smp.c
@@ -105,9 +105,10 @@ static void __init ps3_smp_setup_cpu(int cpu)
105 * to index needs to be setup. 105 * to index needs to be setup.
106 */ 106 */
107 107
108 BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION != 0); 108 BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION != 0);
109 BUILD_BUG_ON(PPC_MSG_RESCHEDULE != 1); 109 BUILD_BUG_ON(PPC_MSG_RESCHEDULE != 1);
110 BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK != 3); 110 BUILD_BUG_ON(PPC_MSG_CALL_FUNC_SINGLE != 2);
111 BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK != 3);
111 112
112 for (i = 0; i < MSG_COUNT; i++) { 113 for (i = 0; i < MSG_COUNT; i++) {
113 result = ps3_event_receive_port_setup(cpu, &virqs[i]); 114 result = ps3_event_receive_port_setup(cpu, &virqs[i]);
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index ebebc28fe895..0fc830f576f5 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -383,13 +383,11 @@ static irqreturn_t xics_ipi_dispatch(int cpu)
383 mb(); 383 mb();
384 smp_message_recv(PPC_MSG_RESCHEDULE); 384 smp_message_recv(PPC_MSG_RESCHEDULE);
385 } 385 }
386#if 0 386 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
387 if (test_and_clear_bit(PPC_MSG_MIGRATE_TASK,
388 &xics_ipi_message[cpu].value)) { 387 &xics_ipi_message[cpu].value)) {
389 mb(); 388 mb();
390 smp_message_recv(PPC_MSG_MIGRATE_TASK); 389 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
391 } 390 }
392#endif
393#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 391#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
394 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, 392 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
395 &xics_ipi_message[cpu].value)) { 393 &xics_ipi_message[cpu].value)) {
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7680001676a6..6c90c95b454e 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1494,7 +1494,7 @@ void mpic_request_ipis(void)
1494 static char *ipi_names[] = { 1494 static char *ipi_names[] = {
1495 "IPI0 (call function)", 1495 "IPI0 (call function)",
1496 "IPI1 (reschedule)", 1496 "IPI1 (reschedule)",
1497 "IPI2 (unused)", 1497 "IPI2 (call function single)",
1498 "IPI3 (debugger break)", 1498 "IPI3 (debugger break)",
1499 }; 1499 };
1500 BUG_ON(mpic == NULL); 1500 BUG_ON(mpic == NULL);
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index 055998575cb4..bcab0d210e30 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -152,7 +152,7 @@ static void stop_this_cpu(void *dummy)
152 152
153void smp_send_stop(void) 153void smp_send_stop(void)
154{ 154{
155 smp_call_function(stop_this_cpu, NULL, 1, 0); 155 smp_call_function(stop_this_cpu, NULL, 0);
156} 156}
157 157
158/* 158/*
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 9cb3d92447a3..a7f8979fb925 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -203,7 +203,7 @@ __appldata_vtimer_setup(int cmd)
203 per_cpu(appldata_timer, i).expires = per_cpu_interval; 203 per_cpu(appldata_timer, i).expires = per_cpu_interval;
204 smp_call_function_single(i, add_virt_timer_periodic, 204 smp_call_function_single(i, add_virt_timer_periodic,
205 &per_cpu(appldata_timer, i), 205 &per_cpu(appldata_timer, i),
206 0, 1); 206 1);
207 } 207 }
208 appldata_timer_active = 1; 208 appldata_timer_active = 1;
209 break; 209 break;
@@ -228,7 +228,7 @@ __appldata_vtimer_setup(int cmd)
228 args.timer = &per_cpu(appldata_timer, i); 228 args.timer = &per_cpu(appldata_timer, i);
229 args.expires = per_cpu_interval; 229 args.expires = per_cpu_interval;
230 smp_call_function_single(i, __appldata_mod_vtimer_wrap, 230 smp_call_function_single(i, __appldata_mod_vtimer_wrap,
231 &args, 0, 1); 231 &args, 1);
232 } 232 }
233 } 233 }
234} 234}
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 5d4fa4b1c74c..b6781030cfbd 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -109,7 +109,7 @@ static void do_call_function(void)
109} 109}
110 110
111static void __smp_call_function_map(void (*func) (void *info), void *info, 111static void __smp_call_function_map(void (*func) (void *info), void *info,
112 int nonatomic, int wait, cpumask_t map) 112 int wait, cpumask_t map)
113{ 113{
114 struct call_data_struct data; 114 struct call_data_struct data;
115 int cpu, local = 0; 115 int cpu, local = 0;
@@ -162,7 +162,6 @@ out:
162 * smp_call_function: 162 * smp_call_function:
163 * @func: the function to run; this must be fast and non-blocking 163 * @func: the function to run; this must be fast and non-blocking
164 * @info: an arbitrary pointer to pass to the function 164 * @info: an arbitrary pointer to pass to the function
165 * @nonatomic: unused
166 * @wait: if true, wait (atomically) until function has completed on other CPUs 165 * @wait: if true, wait (atomically) until function has completed on other CPUs
167 * 166 *
168 * Run a function on all other CPUs. 167 * Run a function on all other CPUs.
@@ -170,15 +169,14 @@ out:
170 * You must not call this function with disabled interrupts, from a 169 * You must not call this function with disabled interrupts, from a
171 * hardware interrupt handler or from a bottom half. 170 * hardware interrupt handler or from a bottom half.
172 */ 171 */
173int smp_call_function(void (*func) (void *info), void *info, int nonatomic, 172int smp_call_function(void (*func) (void *info), void *info, int wait)
174 int wait)
175{ 173{
176 cpumask_t map; 174 cpumask_t map;
177 175
178 spin_lock(&call_lock); 176 spin_lock(&call_lock);
179 map = cpu_online_map; 177 map = cpu_online_map;
180 cpu_clear(smp_processor_id(), map); 178 cpu_clear(smp_processor_id(), map);
181 __smp_call_function_map(func, info, nonatomic, wait, map); 179 __smp_call_function_map(func, info, wait, map);
182 spin_unlock(&call_lock); 180 spin_unlock(&call_lock);
183 return 0; 181 return 0;
184} 182}
@@ -189,7 +187,6 @@ EXPORT_SYMBOL(smp_call_function);
189 * @cpu: the CPU where func should run 187 * @cpu: the CPU where func should run
190 * @func: the function to run; this must be fast and non-blocking 188 * @func: the function to run; this must be fast and non-blocking
191 * @info: an arbitrary pointer to pass to the function 189 * @info: an arbitrary pointer to pass to the function
192 * @nonatomic: unused
193 * @wait: if true, wait (atomically) until function has completed on other CPUs 190 * @wait: if true, wait (atomically) until function has completed on other CPUs
194 * 191 *
195 * Run a function on one processor. 192 * Run a function on one processor.
@@ -198,11 +195,10 @@ EXPORT_SYMBOL(smp_call_function);
198 * hardware interrupt handler or from a bottom half. 195 * hardware interrupt handler or from a bottom half.
199 */ 196 */
200int smp_call_function_single(int cpu, void (*func) (void *info), void *info, 197int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
201 int nonatomic, int wait) 198 int wait)
202{ 199{
203 spin_lock(&call_lock); 200 spin_lock(&call_lock);
204 __smp_call_function_map(func, info, nonatomic, wait, 201 __smp_call_function_map(func, info, wait, cpumask_of_cpu(cpu));
205 cpumask_of_cpu(cpu));
206 spin_unlock(&call_lock); 202 spin_unlock(&call_lock);
207 return 0; 203 return 0;
208} 204}
@@ -228,7 +224,7 @@ int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info,
228{ 224{
229 spin_lock(&call_lock); 225 spin_lock(&call_lock);
230 cpu_clear(smp_processor_id(), mask); 226 cpu_clear(smp_processor_id(), mask);
231 __smp_call_function_map(func, info, 0, wait, mask); 227 __smp_call_function_map(func, info, wait, mask);
232 spin_unlock(&call_lock); 228 spin_unlock(&call_lock);
233 return 0; 229 return 0;
234} 230}
@@ -303,7 +299,7 @@ static void smp_ptlb_callback(void *info)
303 299
304void smp_ptlb_all(void) 300void smp_ptlb_all(void)
305{ 301{
306 on_each_cpu(smp_ptlb_callback, NULL, 0, 1); 302 on_each_cpu(smp_ptlb_callback, NULL, 1);
307} 303}
308EXPORT_SYMBOL(smp_ptlb_all); 304EXPORT_SYMBOL(smp_ptlb_all);
309#endif /* ! CONFIG_64BIT */ 305#endif /* ! CONFIG_64BIT */
@@ -351,7 +347,7 @@ void smp_ctl_set_bit(int cr, int bit)
351 memset(&parms.orvals, 0, sizeof(parms.orvals)); 347 memset(&parms.orvals, 0, sizeof(parms.orvals));
352 memset(&parms.andvals, 0xff, sizeof(parms.andvals)); 348 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
353 parms.orvals[cr] = 1 << bit; 349 parms.orvals[cr] = 1 << bit;
354 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); 350 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
355} 351}
356EXPORT_SYMBOL(smp_ctl_set_bit); 352EXPORT_SYMBOL(smp_ctl_set_bit);
357 353
@@ -365,7 +361,7 @@ void smp_ctl_clear_bit(int cr, int bit)
365 memset(&parms.orvals, 0, sizeof(parms.orvals)); 361 memset(&parms.orvals, 0, sizeof(parms.orvals));
366 memset(&parms.andvals, 0xff, sizeof(parms.andvals)); 362 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
367 parms.andvals[cr] = ~(1L << bit); 363 parms.andvals[cr] = ~(1L << bit);
368 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); 364 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
369} 365}
370EXPORT_SYMBOL(smp_ctl_clear_bit); 366EXPORT_SYMBOL(smp_ctl_clear_bit);
371 367
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index 7418bebb547f..f2cede3947b2 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -707,7 +707,7 @@ static int etr_sync_clock(struct etr_aib *aib, int port)
707 */ 707 */
708 memset(&etr_sync, 0, sizeof(etr_sync)); 708 memset(&etr_sync, 0, sizeof(etr_sync));
709 preempt_disable(); 709 preempt_disable();
710 smp_call_function(clock_sync_cpu_start, &etr_sync, 0, 0); 710 smp_call_function(clock_sync_cpu_start, &etr_sync, 0);
711 local_irq_disable(); 711 local_irq_disable();
712 enable_sync_clock(); 712 enable_sync_clock();
713 713
@@ -746,7 +746,7 @@ static int etr_sync_clock(struct etr_aib *aib, int port)
746 rc = -EAGAIN; 746 rc = -EAGAIN;
747 } 747 }
748 local_irq_enable(); 748 local_irq_enable();
749 smp_call_function(clock_sync_cpu_end, NULL, 0, 0); 749 smp_call_function(clock_sync_cpu_end, NULL, 0);
750 preempt_enable(); 750 preempt_enable();
751 return rc; 751 return rc;
752} 752}
@@ -926,7 +926,7 @@ static void etr_work_fn(struct work_struct *work)
926 if (!eacr.ea) { 926 if (!eacr.ea) {
927 /* Both ports offline. Reset everything. */ 927 /* Both ports offline. Reset everything. */
928 eacr.dp = eacr.es = eacr.sl = 0; 928 eacr.dp = eacr.es = eacr.sl = 0;
929 on_each_cpu(disable_sync_clock, NULL, 0, 1); 929 on_each_cpu(disable_sync_clock, NULL, 1);
930 del_timer_sync(&etr_timer); 930 del_timer_sync(&etr_timer);
931 etr_update_eacr(eacr); 931 etr_update_eacr(eacr);
932 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 932 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
@@ -1432,7 +1432,7 @@ static void stp_work_fn(struct work_struct *work)
1432 */ 1432 */
1433 memset(&stp_sync, 0, sizeof(stp_sync)); 1433 memset(&stp_sync, 0, sizeof(stp_sync));
1434 preempt_disable(); 1434 preempt_disable();
1435 smp_call_function(clock_sync_cpu_start, &stp_sync, 0, 0); 1435 smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
1436 local_irq_disable(); 1436 local_irq_disable();
1437 enable_sync_clock(); 1437 enable_sync_clock();
1438 1438
@@ -1465,7 +1465,7 @@ static void stp_work_fn(struct work_struct *work)
1465 stp_sync.in_sync = 1; 1465 stp_sync.in_sync = 1;
1466 1466
1467 local_irq_enable(); 1467 local_irq_enable();
1468 smp_call_function(clock_sync_cpu_end, NULL, 0, 0); 1468 smp_call_function(clock_sync_cpu_end, NULL, 0);
1469 preempt_enable(); 1469 preempt_enable();
1470} 1470}
1471 1471
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 9a854c8e5274..3e7384f4619c 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -688,6 +688,7 @@ config CRASH_DUMP
688config SMP 688config SMP
689 bool "Symmetric multi-processing support" 689 bool "Symmetric multi-processing support"
690 depends on SYS_SUPPORTS_SMP 690 depends on SYS_SUPPORTS_SMP
691 select USE_GENERIC_SMP_HELPERS
691 ---help--- 692 ---help---
692 This enables support for systems with more than one CPU. If you have 693 This enables support for systems with more than one CPU. If you have
693 a system with only one CPU, like most personal computers, say N. If 694 a system with only one CPU, like most personal computers, say N. If
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 5d039d168f57..60c50841143e 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -36,13 +36,6 @@ EXPORT_SYMBOL(cpu_possible_map);
36cpumask_t cpu_online_map; 36cpumask_t cpu_online_map;
37EXPORT_SYMBOL(cpu_online_map); 37EXPORT_SYMBOL(cpu_online_map);
38 38
39static atomic_t cpus_booted = ATOMIC_INIT(0);
40
41/*
42 * Run specified function on a particular processor.
43 */
44void __smp_call_function(unsigned int cpu);
45
46static inline void __init smp_store_cpu_info(unsigned int cpu) 39static inline void __init smp_store_cpu_info(unsigned int cpu)
47{ 40{
48 struct sh_cpuinfo *c = cpu_data + cpu; 41 struct sh_cpuinfo *c = cpu_data + cpu;
@@ -175,45 +168,20 @@ static void stop_this_cpu(void *unused)
175 168
176void smp_send_stop(void) 169void smp_send_stop(void)
177{ 170{
178 smp_call_function(stop_this_cpu, 0, 1, 0); 171 smp_call_function(stop_this_cpu, 0, 0);
179} 172}
180 173
181struct smp_fn_call_struct smp_fn_call = { 174void arch_send_call_function_ipi(cpumask_t mask)
182 .lock = __SPIN_LOCK_UNLOCKED(smp_fn_call.lock),
183 .finished = ATOMIC_INIT(0),
184};
185
186/*
187 * The caller of this wants the passed function to run on every cpu. If wait
188 * is set, wait until all cpus have finished the function before returning.
189 * The lock is here to protect the call structure.
190 * You must not call this function with disabled interrupts or from a
191 * hardware interrupt handler or from a bottom half handler.
192 */
193int smp_call_function(void (*func)(void *info), void *info, int retry, int wait)
194{ 175{
195 unsigned int nr_cpus = atomic_read(&cpus_booted); 176 int cpu;
196 int i;
197
198 /* Can deadlock when called with interrupts disabled */
199 WARN_ON(irqs_disabled());
200
201 spin_lock(&smp_fn_call.lock);
202
203 atomic_set(&smp_fn_call.finished, 0);
204 smp_fn_call.fn = func;
205 smp_fn_call.data = info;
206
207 for (i = 0; i < nr_cpus; i++)
208 if (i != smp_processor_id())
209 plat_send_ipi(i, SMP_MSG_FUNCTION);
210
211 if (wait)
212 while (atomic_read(&smp_fn_call.finished) != (nr_cpus - 1));
213 177
214 spin_unlock(&smp_fn_call.lock); 178 for_each_cpu_mask(cpu, mask)
179 plat_send_ipi(cpu, SMP_MSG_FUNCTION);
180}
215 181
216 return 0; 182void arch_send_call_function_single_ipi(int cpu)
183{
184 plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE);
217} 185}
218 186
219/* Not really SMP stuff ... */ 187/* Not really SMP stuff ... */
@@ -229,7 +197,7 @@ static void flush_tlb_all_ipi(void *info)
229 197
230void flush_tlb_all(void) 198void flush_tlb_all(void)
231{ 199{
232 on_each_cpu(flush_tlb_all_ipi, 0, 1, 1); 200 on_each_cpu(flush_tlb_all_ipi, 0, 1);
233} 201}
234 202
235static void flush_tlb_mm_ipi(void *mm) 203static void flush_tlb_mm_ipi(void *mm)
@@ -255,7 +223,7 @@ void flush_tlb_mm(struct mm_struct *mm)
255 preempt_disable(); 223 preempt_disable();
256 224
257 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { 225 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
258 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1); 226 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1);
259 } else { 227 } else {
260 int i; 228 int i;
261 for (i = 0; i < num_online_cpus(); i++) 229 for (i = 0; i < num_online_cpus(); i++)
@@ -292,7 +260,7 @@ void flush_tlb_range(struct vm_area_struct *vma,
292 fd.vma = vma; 260 fd.vma = vma;
293 fd.addr1 = start; 261 fd.addr1 = start;
294 fd.addr2 = end; 262 fd.addr2 = end;
295 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1); 263 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1);
296 } else { 264 } else {
297 int i; 265 int i;
298 for (i = 0; i < num_online_cpus(); i++) 266 for (i = 0; i < num_online_cpus(); i++)
@@ -316,7 +284,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
316 284
317 fd.addr1 = start; 285 fd.addr1 = start;
318 fd.addr2 = end; 286 fd.addr2 = end;
319 on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1); 287 on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1);
320} 288}
321 289
322static void flush_tlb_page_ipi(void *info) 290static void flush_tlb_page_ipi(void *info)
@@ -335,7 +303,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
335 303
336 fd.vma = vma; 304 fd.vma = vma;
337 fd.addr1 = page; 305 fd.addr1 = page;
338 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1); 306 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1);
339 } else { 307 } else {
340 int i; 308 int i;
341 for (i = 0; i < num_online_cpus(); i++) 309 for (i = 0; i < num_online_cpus(); i++)
@@ -359,6 +327,6 @@ void flush_tlb_one(unsigned long asid, unsigned long vaddr)
359 fd.addr1 = asid; 327 fd.addr1 = asid;
360 fd.addr2 = vaddr; 328 fd.addr2 = vaddr;
361 329
362 smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1, 1); 330 smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1);
363 local_flush_tlb_one(asid, vaddr); 331 local_flush_tlb_one(asid, vaddr);
364} 332}
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index fa63c68a1819..c099d96f1239 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -807,7 +807,6 @@ extern unsigned long xcall_call_function;
807 * smp_call_function(): Run a function on all other CPUs. 807 * smp_call_function(): Run a function on all other CPUs.
808 * @func: The function to run. This must be fast and non-blocking. 808 * @func: The function to run. This must be fast and non-blocking.
809 * @info: An arbitrary pointer to pass to the function. 809 * @info: An arbitrary pointer to pass to the function.
810 * @nonatomic: currently unused.
811 * @wait: If true, wait (atomically) until function has completed on other CPUs. 810 * @wait: If true, wait (atomically) until function has completed on other CPUs.
812 * 811 *
813 * Returns 0 on success, else a negative status code. Does not return until 812 * Returns 0 on success, else a negative status code. Does not return until
@@ -816,8 +815,8 @@ extern unsigned long xcall_call_function;
816 * You must not call this function with disabled interrupts or from a 815 * You must not call this function with disabled interrupts or from a
817 * hardware interrupt handler or from a bottom half handler. 816 * hardware interrupt handler or from a bottom half handler.
818 */ 817 */
819static int smp_call_function_mask(void (*func)(void *info), void *info, 818static int sparc64_smp_call_function_mask(void (*func)(void *info), void *info,
820 int nonatomic, int wait, cpumask_t mask) 819 int wait, cpumask_t mask)
821{ 820{
822 struct call_data_struct data; 821 struct call_data_struct data;
823 int cpus; 822 int cpus;
@@ -852,11 +851,9 @@ out_unlock:
852 return 0; 851 return 0;
853} 852}
854 853
855int smp_call_function(void (*func)(void *info), void *info, 854int smp_call_function(void (*func)(void *info), void *info, int wait)
856 int nonatomic, int wait)
857{ 855{
858 return smp_call_function_mask(func, info, nonatomic, wait, 856 return sparc64_smp_call_function_mask(func, info, wait, cpu_online_map);
859 cpu_online_map);
860} 857}
861 858
862void smp_call_function_client(int irq, struct pt_regs *regs) 859void smp_call_function_client(int irq, struct pt_regs *regs)
@@ -893,7 +890,7 @@ static void tsb_sync(void *info)
893 890
894void smp_tsb_sync(struct mm_struct *mm) 891void smp_tsb_sync(struct mm_struct *mm)
895{ 892{
896 smp_call_function_mask(tsb_sync, mm, 0, 1, mm->cpu_vm_mask); 893 sparc64_smp_call_function_mask(tsb_sync, mm, 1, mm->cpu_vm_mask);
897} 894}
898 895
899extern unsigned long xcall_flush_tlb_mm; 896extern unsigned long xcall_flush_tlb_mm;
diff --git a/arch/sparc64/mm/hugetlbpage.c b/arch/sparc64/mm/hugetlbpage.c
index 6cfab2e4d340..ebefd2a14375 100644
--- a/arch/sparc64/mm/hugetlbpage.c
+++ b/arch/sparc64/mm/hugetlbpage.c
@@ -344,7 +344,7 @@ void hugetlb_prefault_arch_hook(struct mm_struct *mm)
344 * also executing in this address space. 344 * also executing in this address space.
345 */ 345 */
346 mm->context.sparc64_ctx_val = ctx; 346 mm->context.sparc64_ctx_val = ctx;
347 on_each_cpu(context_reload, mm, 0, 0); 347 on_each_cpu(context_reload, mm, 0);
348 } 348 }
349 spin_unlock(&ctx_alloc_lock); 349 spin_unlock(&ctx_alloc_lock);
350 } 350 }
diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c
index e1062ec36d40..be2d50c3aa95 100644
--- a/arch/um/kernel/smp.c
+++ b/arch/um/kernel/smp.c
@@ -214,8 +214,7 @@ void smp_call_function_slave(int cpu)
214 atomic_inc(&scf_finished); 214 atomic_inc(&scf_finished);
215} 215}
216 216
217int smp_call_function(void (*_func)(void *info), void *_info, int nonatomic, 217int smp_call_function(void (*_func)(void *info), void *_info, int wait)
218 int wait)
219{ 218{
220 int cpus = num_online_cpus() - 1; 219 int cpus = num_online_cpus() - 1;
221 int i; 220 int i;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 2642b4bf41b9..96e0c2ebc388 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -170,6 +170,7 @@ config GENERIC_PENDING_IRQ
170config X86_SMP 170config X86_SMP
171 bool 171 bool
172 depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64) 172 depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
173 select USE_GENERIC_SMP_HELPERS
173 default y 174 default y
174 175
175config X86_32_SMP 176config X86_32_SMP
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 3e58b676d23b..a437d027f20b 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1340,6 +1340,10 @@ void __init smp_intr_init(void)
1340 1340
1341 /* IPI for generic function call */ 1341 /* IPI for generic function call */
1342 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); 1342 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
1343
1344 /* IPI for single call function */
1345 set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
1346 call_function_single_interrupt);
1343} 1347}
1344#endif 1348#endif
1345 1349
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 987410745182..c4a7ec31394c 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -364,7 +364,7 @@ static void mcheck_check_cpu(void *info)
364 364
365static void mcheck_timer(struct work_struct *work) 365static void mcheck_timer(struct work_struct *work)
366{ 366{
367 on_each_cpu(mcheck_check_cpu, NULL, 1, 1); 367 on_each_cpu(mcheck_check_cpu, NULL, 1);
368 368
369 /* 369 /*
370 * Alert userspace if needed. If we logged an MCE, reduce the 370 * Alert userspace if needed. If we logged an MCE, reduce the
@@ -621,7 +621,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
621 * Collect entries that were still getting written before the 621 * Collect entries that were still getting written before the
622 * synchronize. 622 * synchronize.
623 */ 623 */
624 on_each_cpu(collect_tscs, cpu_tsc, 1, 1); 624 on_each_cpu(collect_tscs, cpu_tsc, 1);
625 for (i = next; i < MCE_LOG_LEN; i++) { 625 for (i = next; i < MCE_LOG_LEN; i++) {
626 if (mcelog.entry[i].finished && 626 if (mcelog.entry[i].finished &&
627 mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) { 627 mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
@@ -746,7 +746,7 @@ static void mce_restart(void)
746 if (next_interval) 746 if (next_interval)
747 cancel_delayed_work(&mcheck_work); 747 cancel_delayed_work(&mcheck_work);
748 /* Timer race is harmless here */ 748 /* Timer race is harmless here */
749 on_each_cpu(mce_init, NULL, 1, 1); 749 on_each_cpu(mce_init, NULL, 1);
750 next_interval = check_interval * HZ; 750 next_interval = check_interval * HZ;
751 if (next_interval) 751 if (next_interval)
752 schedule_delayed_work(&mcheck_work, 752 schedule_delayed_work(&mcheck_work,
diff --git a/arch/x86/kernel/cpu/mcheck/non-fatal.c b/arch/x86/kernel/cpu/mcheck/non-fatal.c
index 00ccb6c14ec2..cc1fccdd31e0 100644
--- a/arch/x86/kernel/cpu/mcheck/non-fatal.c
+++ b/arch/x86/kernel/cpu/mcheck/non-fatal.c
@@ -59,7 +59,7 @@ static DECLARE_DELAYED_WORK(mce_work, mce_work_fn);
59 59
60static void mce_work_fn(struct work_struct *work) 60static void mce_work_fn(struct work_struct *work)
61{ 61{
62 on_each_cpu(mce_checkregs, NULL, 1, 1); 62 on_each_cpu(mce_checkregs, NULL, 1);
63 schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE)); 63 schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
64} 64}
65 65
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 105afe12beb0..6f23969c8faf 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -223,7 +223,7 @@ static void set_mtrr(unsigned int reg, unsigned long base,
223 atomic_set(&data.gate,0); 223 atomic_set(&data.gate,0);
224 224
225 /* Start the ball rolling on other CPUs */ 225 /* Start the ball rolling on other CPUs */
226 if (smp_call_function(ipi_handler, &data, 1, 0) != 0) 226 if (smp_call_function(ipi_handler, &data, 0) != 0)
227 panic("mtrr: timed out waiting for other CPUs\n"); 227 panic("mtrr: timed out waiting for other CPUs\n");
228 228
229 local_irq_save(flags); 229 local_irq_save(flags);
@@ -1682,7 +1682,7 @@ void mtrr_ap_init(void)
1682 */ 1682 */
1683void mtrr_save_state(void) 1683void mtrr_save_state(void)
1684{ 1684{
1685 smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1, 1); 1685 smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1);
1686} 1686}
1687 1687
1688static int __init mtrr_init_finialize(void) 1688static int __init mtrr_init_finialize(void)
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 2e9bef6e3aa3..6d4bdc02388a 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -189,7 +189,7 @@ void disable_lapic_nmi_watchdog(void)
189 if (atomic_read(&nmi_active) <= 0) 189 if (atomic_read(&nmi_active) <= 0)
190 return; 190 return;
191 191
192 on_each_cpu(stop_apic_nmi_watchdog, NULL, 0, 1); 192 on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
193 193
194 if (wd_ops) 194 if (wd_ops)
195 wd_ops->unreserve(); 195 wd_ops->unreserve();
@@ -213,7 +213,7 @@ void enable_lapic_nmi_watchdog(void)
213 return; 213 return;
214 } 214 }
215 215
216 on_each_cpu(setup_apic_nmi_watchdog, NULL, 0, 1); 216 on_each_cpu(setup_apic_nmi_watchdog, NULL, 1);
217 touch_nmi_watchdog(); 217 touch_nmi_watchdog();
218} 218}
219 219
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 71f1c2654bec..2de5fa2bbf77 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -96,7 +96,7 @@ static ssize_t cpuid_read(struct file *file, char __user *buf,
96 for (; count; count -= 16) { 96 for (; count; count -= 16) {
97 cmd.eax = pos; 97 cmd.eax = pos;
98 cmd.ecx = pos >> 32; 98 cmd.ecx = pos >> 32;
99 smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1, 1); 99 smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1);
100 if (copy_to_user(tmp, &cmd, 16)) 100 if (copy_to_user(tmp, &cmd, 16))
101 return -EFAULT; 101 return -EFAULT;
102 tmp += 16; 102 tmp += 16;
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index ba41bf42748d..ae63e584c340 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -816,6 +816,9 @@ END(invalidate_interrupt\num)
816ENTRY(call_function_interrupt) 816ENTRY(call_function_interrupt)
817 apicinterrupt CALL_FUNCTION_VECTOR,smp_call_function_interrupt 817 apicinterrupt CALL_FUNCTION_VECTOR,smp_call_function_interrupt
818END(call_function_interrupt) 818END(call_function_interrupt)
819ENTRY(call_function_single_interrupt)
820 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR,smp_call_function_single_interrupt
821END(call_function_single_interrupt)
819ENTRY(irq_move_cleanup_interrupt) 822ENTRY(irq_move_cleanup_interrupt)
820 apicinterrupt IRQ_MOVE_CLEANUP_VECTOR,smp_irq_move_cleanup_interrupt 823 apicinterrupt IRQ_MOVE_CLEANUP_VECTOR,smp_irq_move_cleanup_interrupt
821END(irq_move_cleanup_interrupt) 824END(irq_move_cleanup_interrupt)
diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index 603261a5885c..558abf4c796a 100644
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -1569,7 +1569,7 @@ void /*__init*/ print_local_APIC(void *dummy)
1569 1569
1570void print_all_local_APICs(void) 1570void print_all_local_APICs(void)
1571{ 1571{
1572 on_each_cpu(print_local_APIC, NULL, 1, 1); 1572 on_each_cpu(print_local_APIC, NULL, 1);
1573} 1573}
1574 1574
1575void /*__init*/ print_PIC(void) 1575void /*__init*/ print_PIC(void)
diff --git a/arch/x86/kernel/io_apic_64.c b/arch/x86/kernel/io_apic_64.c
index b16ef029cf88..6510cde36b35 100644
--- a/arch/x86/kernel/io_apic_64.c
+++ b/arch/x86/kernel/io_apic_64.c
@@ -1160,7 +1160,7 @@ void __apicdebuginit print_local_APIC(void * dummy)
1160 1160
1161void print_all_local_APICs (void) 1161void print_all_local_APICs (void)
1162{ 1162{
1163 on_each_cpu(print_local_APIC, NULL, 1, 1); 1163 on_each_cpu(print_local_APIC, NULL, 1);
1164} 1164}
1165 1165
1166void __apicdebuginit print_PIC(void) 1166void __apicdebuginit print_PIC(void)
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c
index 31f49e8f46a7..0373e88de95a 100644
--- a/arch/x86/kernel/irqinit_64.c
+++ b/arch/x86/kernel/irqinit_64.c
@@ -199,6 +199,10 @@ void __init native_init_IRQ(void)
199 /* IPI for generic function call */ 199 /* IPI for generic function call */
200 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); 200 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
201 201
202 /* IPI for generic single function call */
203 alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
204 call_function_single_interrupt);
205
202 /* Low priority IPI to cleanup after moving an irq */ 206 /* Low priority IPI to cleanup after moving an irq */
203 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); 207 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
204#endif 208#endif
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index 21f2bae98c15..a8449571858a 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -68,7 +68,7 @@ static int alloc_ldt(mm_context_t *pc, int mincount, int reload)
68 load_LDT(pc); 68 load_LDT(pc);
69 mask = cpumask_of_cpu(smp_processor_id()); 69 mask = cpumask_of_cpu(smp_processor_id());
70 if (!cpus_equal(current->mm->cpu_vm_mask, mask)) 70 if (!cpus_equal(current->mm->cpu_vm_mask, mask))
71 smp_call_function(flush_ldt, current->mm, 1, 1); 71 smp_call_function(flush_ldt, current->mm, 1);
72 preempt_enable(); 72 preempt_enable();
73#else 73#else
74 load_LDT(pc); 74 load_LDT(pc);
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 716b89284be0..ec024b3baad0 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -130,7 +130,7 @@ int __init check_nmi_watchdog(void)
130 130
131#ifdef CONFIG_SMP 131#ifdef CONFIG_SMP
132 if (nmi_watchdog == NMI_LOCAL_APIC) 132 if (nmi_watchdog == NMI_LOCAL_APIC)
133 smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0); 133 smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
134#endif 134#endif
135 135
136 for_each_possible_cpu(cpu) 136 for_each_possible_cpu(cpu)
@@ -272,7 +272,7 @@ static void __acpi_nmi_enable(void *__unused)
272void acpi_nmi_enable(void) 272void acpi_nmi_enable(void)
273{ 273{
274 if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) 274 if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
275 on_each_cpu(__acpi_nmi_enable, NULL, 0, 1); 275 on_each_cpu(__acpi_nmi_enable, NULL, 1);
276} 276}
277 277
278static void __acpi_nmi_disable(void *__unused) 278static void __acpi_nmi_disable(void *__unused)
@@ -286,7 +286,7 @@ static void __acpi_nmi_disable(void *__unused)
286void acpi_nmi_disable(void) 286void acpi_nmi_disable(void)
287{ 287{
288 if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) 288 if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
289 on_each_cpu(__acpi_nmi_disable, NULL, 0, 1); 289 on_each_cpu(__acpi_nmi_disable, NULL, 1);
290} 290}
291 291
292void setup_apic_nmi_watchdog(void *unused) 292void setup_apic_nmi_watchdog(void *unused)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 4061d63aabe7..7dceea947232 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -132,7 +132,7 @@ void cpu_idle_wait(void)
132{ 132{
133 smp_mb(); 133 smp_mb();
134 /* kick all the CPUs so that they exit out of pm_idle */ 134 /* kick all the CPUs so that they exit out of pm_idle */
135 smp_call_function(do_nothing, NULL, 0, 1); 135 smp_call_function(do_nothing, NULL, 1);
136} 136}
137EXPORT_SYMBOL_GPL(cpu_idle_wait); 137EXPORT_SYMBOL_GPL(cpu_idle_wait);
138 138
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 0cb7aadc87cd..361b7a4c640c 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -121,132 +121,23 @@ static void native_smp_send_reschedule(int cpu)
121 send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR); 121 send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR);
122} 122}
123 123
124/* 124void native_send_call_func_single_ipi(int cpu)
125 * Structure and data for smp_call_function(). This is designed to minimise
126 * static memory requirements. It also looks cleaner.
127 */
128static DEFINE_SPINLOCK(call_lock);
129
130struct call_data_struct {
131 void (*func) (void *info);
132 void *info;
133 atomic_t started;
134 atomic_t finished;
135 int wait;
136};
137
138void lock_ipi_call_lock(void)
139{ 125{
140 spin_lock_irq(&call_lock); 126 send_IPI_mask(cpumask_of_cpu(cpu), CALL_FUNCTION_SINGLE_VECTOR);
141}
142
143void unlock_ipi_call_lock(void)
144{
145 spin_unlock_irq(&call_lock);
146}
147
148static struct call_data_struct *call_data;
149
150static void __smp_call_function(void (*func) (void *info), void *info,
151 int nonatomic, int wait)
152{
153 struct call_data_struct data;
154 int cpus = num_online_cpus() - 1;
155
156 if (!cpus)
157 return;
158
159 data.func = func;
160 data.info = info;
161 atomic_set(&data.started, 0);
162 data.wait = wait;
163 if (wait)
164 atomic_set(&data.finished, 0);
165
166 call_data = &data;
167 mb();
168
169 /* Send a message to all other CPUs and wait for them to respond */
170 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
171
172 /* Wait for response */
173 while (atomic_read(&data.started) != cpus)
174 cpu_relax();
175
176 if (wait)
177 while (atomic_read(&data.finished) != cpus)
178 cpu_relax();
179} 127}
180 128
181 129void native_send_call_func_ipi(cpumask_t mask)
182/**
183 * smp_call_function_mask(): Run a function on a set of other CPUs.
184 * @mask: The set of cpus to run on. Must not include the current cpu.
185 * @func: The function to run. This must be fast and non-blocking.
186 * @info: An arbitrary pointer to pass to the function.
187 * @wait: If true, wait (atomically) until function has completed on other CPUs.
188 *
189 * Returns 0 on success, else a negative status code.
190 *
191 * If @wait is true, then returns once @func has returned; otherwise
192 * it returns just before the target cpu calls @func.
193 *
194 * You must not call this function with disabled interrupts or from a
195 * hardware interrupt handler or from a bottom half handler.
196 */
197static int
198native_smp_call_function_mask(cpumask_t mask,
199 void (*func)(void *), void *info,
200 int wait)
201{ 130{
202 struct call_data_struct data;
203 cpumask_t allbutself; 131 cpumask_t allbutself;
204 int cpus;
205
206 /* Can deadlock when called with interrupts disabled */
207 WARN_ON(irqs_disabled());
208
209 /* Holding any lock stops cpus from going down. */
210 spin_lock(&call_lock);
211 132
212 allbutself = cpu_online_map; 133 allbutself = cpu_online_map;
213 cpu_clear(smp_processor_id(), allbutself); 134 cpu_clear(smp_processor_id(), allbutself);
214 135
215 cpus_and(mask, mask, allbutself);
216 cpus = cpus_weight(mask);
217
218 if (!cpus) {
219 spin_unlock(&call_lock);
220 return 0;
221 }
222
223 data.func = func;
224 data.info = info;
225 atomic_set(&data.started, 0);
226 data.wait = wait;
227 if (wait)
228 atomic_set(&data.finished, 0);
229
230 call_data = &data;
231 wmb();
232
233 /* Send a message to other CPUs */
234 if (cpus_equal(mask, allbutself) && 136 if (cpus_equal(mask, allbutself) &&
235 cpus_equal(cpu_online_map, cpu_callout_map)) 137 cpus_equal(cpu_online_map, cpu_callout_map))
236 send_IPI_allbutself(CALL_FUNCTION_VECTOR); 138 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
237 else 139 else
238 send_IPI_mask(mask, CALL_FUNCTION_VECTOR); 140 send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
239
240 /* Wait for response */
241 while (atomic_read(&data.started) != cpus)
242 cpu_relax();
243
244 if (wait)
245 while (atomic_read(&data.finished) != cpus)
246 cpu_relax();
247 spin_unlock(&call_lock);
248
249 return 0;
250} 141}
251 142
252static void stop_this_cpu(void *dummy) 143static void stop_this_cpu(void *dummy)
@@ -268,18 +159,13 @@ static void stop_this_cpu(void *dummy)
268 159
269static void native_smp_send_stop(void) 160static void native_smp_send_stop(void)
270{ 161{
271 int nolock;
272 unsigned long flags; 162 unsigned long flags;
273 163
274 if (reboot_force) 164 if (reboot_force)
275 return; 165 return;
276 166
277 /* Don't deadlock on the call lock in panic */ 167 smp_call_function(stop_this_cpu, NULL, 0);
278 nolock = !spin_trylock(&call_lock);
279 local_irq_save(flags); 168 local_irq_save(flags);
280 __smp_call_function(stop_this_cpu, NULL, 0, 0);
281 if (!nolock)
282 spin_unlock(&call_lock);
283 disable_local_APIC(); 169 disable_local_APIC();
284 local_irq_restore(flags); 170 local_irq_restore(flags);
285} 171}
@@ -301,33 +187,28 @@ void smp_reschedule_interrupt(struct pt_regs *regs)
301 187
302void smp_call_function_interrupt(struct pt_regs *regs) 188void smp_call_function_interrupt(struct pt_regs *regs)
303{ 189{
304 void (*func) (void *info) = call_data->func;
305 void *info = call_data->info;
306 int wait = call_data->wait;
307
308 ack_APIC_irq(); 190 ack_APIC_irq();
309 /*
310 * Notify initiating CPU that I've grabbed the data and am
311 * about to execute the function
312 */
313 mb();
314 atomic_inc(&call_data->started);
315 /*
316 * At this point the info structure may be out of scope unless wait==1
317 */
318 irq_enter(); 191 irq_enter();
319 (*func)(info); 192 generic_smp_call_function_interrupt();
320#ifdef CONFIG_X86_32 193#ifdef CONFIG_X86_32
321 __get_cpu_var(irq_stat).irq_call_count++; 194 __get_cpu_var(irq_stat).irq_call_count++;
322#else 195#else
323 add_pda(irq_call_count, 1); 196 add_pda(irq_call_count, 1);
324#endif 197#endif
325 irq_exit(); 198 irq_exit();
199}
326 200
327 if (wait) { 201void smp_call_function_single_interrupt(struct pt_regs *regs)
328 mb(); 202{
329 atomic_inc(&call_data->finished); 203 ack_APIC_irq();
330 } 204 irq_enter();
205 generic_smp_call_function_single_interrupt();
206#ifdef CONFIG_X86_32
207 __get_cpu_var(irq_stat).irq_call_count++;
208#else
209 add_pda(irq_call_count, 1);
210#endif
211 irq_exit();
331} 212}
332 213
333struct smp_ops smp_ops = { 214struct smp_ops smp_ops = {
@@ -338,7 +219,8 @@ struct smp_ops smp_ops = {
338 219
339 .smp_send_stop = native_smp_send_stop, 220 .smp_send_stop = native_smp_send_stop,
340 .smp_send_reschedule = native_smp_send_reschedule, 221 .smp_send_reschedule = native_smp_send_reschedule,
341 .smp_call_function_mask = native_smp_call_function_mask, 222
223 .send_call_func_ipi = native_send_call_func_ipi,
224 .send_call_func_single_ipi = native_send_call_func_single_ipi,
342}; 225};
343EXPORT_SYMBOL_GPL(smp_ops); 226EXPORT_SYMBOL_GPL(smp_ops);
344
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index f35c2d8016ac..687376ab07e8 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -327,12 +327,12 @@ static void __cpuinit start_secondary(void *unused)
327 * lock helps us to not include this cpu in a currently in progress 327 * lock helps us to not include this cpu in a currently in progress
328 * smp_call_function(). 328 * smp_call_function().
329 */ 329 */
330 lock_ipi_call_lock(); 330 ipi_call_lock_irq();
331#ifdef CONFIG_X86_IO_APIC 331#ifdef CONFIG_X86_IO_APIC
332 setup_vector_irq(smp_processor_id()); 332 setup_vector_irq(smp_processor_id());
333#endif 333#endif
334 cpu_set(smp_processor_id(), cpu_online_map); 334 cpu_set(smp_processor_id(), cpu_online_map);
335 unlock_ipi_call_lock(); 335 ipi_call_unlock_irq();
336 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 336 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
337 337
338 setup_secondary_clock(); 338 setup_secondary_clock();
diff --git a/arch/x86/kernel/smpcommon.c b/arch/x86/kernel/smpcommon.c
index 3449064d141a..99941b37eca0 100644
--- a/arch/x86/kernel/smpcommon.c
+++ b/arch/x86/kernel/smpcommon.c
@@ -25,59 +25,3 @@ __cpuinit void init_gdt(int cpu)
25 per_cpu(cpu_number, cpu) = cpu; 25 per_cpu(cpu_number, cpu) = cpu;
26} 26}
27#endif 27#endif
28
29/**
30 * smp_call_function(): Run a function on all other CPUs.
31 * @func: The function to run. This must be fast and non-blocking.
32 * @info: An arbitrary pointer to pass to the function.
33 * @nonatomic: Unused.
34 * @wait: If true, wait (atomically) until function has completed on other CPUs.
35 *
36 * Returns 0 on success, else a negative status code.
37 *
38 * If @wait is true, then returns once @func has returned; otherwise
39 * it returns just before the target cpu calls @func.
40 *
41 * You must not call this function with disabled interrupts or from a
42 * hardware interrupt handler or from a bottom half handler.
43 */
44int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
45 int wait)
46{
47 return smp_call_function_mask(cpu_online_map, func, info, wait);
48}
49EXPORT_SYMBOL(smp_call_function);
50
51/**
52 * smp_call_function_single - Run a function on a specific CPU
53 * @cpu: The target CPU. Cannot be the calling CPU.
54 * @func: The function to run. This must be fast and non-blocking.
55 * @info: An arbitrary pointer to pass to the function.
56 * @nonatomic: Unused.
57 * @wait: If true, wait until function has completed on other CPUs.
58 *
59 * Returns 0 on success, else a negative status code.
60 *
61 * If @wait is true, then returns once @func has returned; otherwise
62 * it returns just before the target cpu calls @func.
63 */
64int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
65 int nonatomic, int wait)
66{
67 /* prevent preemption and reschedule on another processor */
68 int ret;
69 int me = get_cpu();
70 if (cpu == me) {
71 local_irq_disable();
72 func(info);
73 local_irq_enable();
74 put_cpu();
75 return 0;
76 }
77
78 ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, wait);
79
80 put_cpu();
81 return ret;
82}
83EXPORT_SYMBOL(smp_call_function_single);
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c
index 9bb2363851af..fec1ecedc9b7 100644
--- a/arch/x86/kernel/tlb_32.c
+++ b/arch/x86/kernel/tlb_32.c
@@ -238,6 +238,6 @@ static void do_flush_tlb_all(void *info)
238 238
239void flush_tlb_all(void) 239void flush_tlb_all(void)
240{ 240{
241 on_each_cpu(do_flush_tlb_all, NULL, 1, 1); 241 on_each_cpu(do_flush_tlb_all, NULL, 1);
242} 242}
243 243
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/kernel/tlb_64.c
index 5039d0f097a2..dcbf7a1159ea 100644
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/kernel/tlb_64.c
@@ -275,5 +275,5 @@ static void do_flush_tlb_all(void *info)
275 275
276void flush_tlb_all(void) 276void flush_tlb_all(void)
277{ 277{
278 on_each_cpu(do_flush_tlb_all, NULL, 1, 1); 278 on_each_cpu(do_flush_tlb_all, NULL, 1);
279} 279}
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index e50740d32314..0b8b6690a86d 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -279,7 +279,7 @@ cpu_vsyscall_notifier(struct notifier_block *n, unsigned long action, void *arg)
279{ 279{
280 long cpu = (long)arg; 280 long cpu = (long)arg;
281 if (action == CPU_ONLINE || action == CPU_ONLINE_FROZEN) 281 if (action == CPU_ONLINE || action == CPU_ONLINE_FROZEN)
282 smp_call_function_single(cpu, cpu_vsyscall_init, NULL, 0, 1); 282 smp_call_function_single(cpu, cpu_vsyscall_init, NULL, 1);
283 return NOTIFY_DONE; 283 return NOTIFY_DONE;
284} 284}
285 285
@@ -302,7 +302,7 @@ static int __init vsyscall_init(void)
302#ifdef CONFIG_SYSCTL 302#ifdef CONFIG_SYSCTL
303 register_sysctl_table(kernel_root_table2); 303 register_sysctl_table(kernel_root_table2);
304#endif 304#endif
305 on_each_cpu(cpu_vsyscall_init, NULL, 0, 1); 305 on_each_cpu(cpu_vsyscall_init, NULL, 1);
306 hotcpu_notifier(cpu_vsyscall_notifier, 0); 306 hotcpu_notifier(cpu_vsyscall_notifier, 0);
307 return 0; 307 return 0;
308} 308}
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 540e95179074..10ce6ee4c491 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -335,7 +335,7 @@ static void vcpu_clear(struct vcpu_vmx *vmx)
335{ 335{
336 if (vmx->vcpu.cpu == -1) 336 if (vmx->vcpu.cpu == -1)
337 return; 337 return;
338 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear, vmx, 0, 1); 338 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear, vmx, 1);
339 vmx->launched = 0; 339 vmx->launched = 0;
340} 340}
341 341
@@ -2968,7 +2968,7 @@ static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2968 struct vcpu_vmx *vmx = to_vmx(vcpu); 2968 struct vcpu_vmx *vmx = to_vmx(vcpu);
2969 2969
2970 if (vmx->vmcs) { 2970 if (vmx->vmcs) {
2971 on_each_cpu(__vcpu_clear, vmx, 0, 1); 2971 on_each_cpu(__vcpu_clear, vmx, 1);
2972 free_vmcs(vmx->vmcs); 2972 free_vmcs(vmx->vmcs);
2973 vmx->vmcs = NULL; 2973 vmx->vmcs = NULL;
2974 } 2974 }
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 63a77caa59f1..0faa2546b1cd 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -4044,6 +4044,6 @@ void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4044 * So need not to call smp_call_function_single() in that case. 4044 * So need not to call smp_call_function_single() in that case.
4045 */ 4045 */
4046 if (vcpu->guest_mode && vcpu->cpu != cpu) 4046 if (vcpu->guest_mode && vcpu->cpu != cpu)
4047 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0); 4047 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4048 put_cpu(); 4048 put_cpu();
4049} 4049}
diff --git a/arch/x86/lib/msr-on-cpu.c b/arch/x86/lib/msr-on-cpu.c
index 57d043fa893e..d5a2b39f882b 100644
--- a/arch/x86/lib/msr-on-cpu.c
+++ b/arch/x86/lib/msr-on-cpu.c
@@ -30,10 +30,10 @@ static int _rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h, int safe)
30 30
31 rv.msr_no = msr_no; 31 rv.msr_no = msr_no;
32 if (safe) { 32 if (safe) {
33 smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 0, 1); 33 smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
34 err = rv.err; 34 err = rv.err;
35 } else { 35 } else {
36 smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 0, 1); 36 smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
37 } 37 }
38 *l = rv.l; 38 *l = rv.l;
39 *h = rv.h; 39 *h = rv.h;
@@ -64,10 +64,10 @@ static int _wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h, int safe)
64 rv.l = l; 64 rv.l = l;
65 rv.h = h; 65 rv.h = h;
66 if (safe) { 66 if (safe) {
67 smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 0, 1); 67 smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
68 err = rv.err; 68 err = rv.err;
69 } else { 69 } else {
70 smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 0, 1); 70 smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
71 } 71 }
72 72
73 return err; 73 return err;
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 8dedd01e909f..ee0fba092157 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -950,94 +950,24 @@ static void smp_stop_cpu_function(void *dummy)
950 halt(); 950 halt();
951} 951}
952 952
953static DEFINE_SPINLOCK(call_lock);
954
955struct call_data_struct {
956 void (*func) (void *info);
957 void *info;
958 volatile unsigned long started;
959 volatile unsigned long finished;
960 int wait;
961};
962
963static struct call_data_struct *call_data;
964
965/* execute a thread on a new CPU. The function to be called must be 953/* execute a thread on a new CPU. The function to be called must be
966 * previously set up. This is used to schedule a function for 954 * previously set up. This is used to schedule a function for
967 * execution on all CPUs - set up the function then broadcast a 955 * execution on all CPUs - set up the function then broadcast a
968 * function_interrupt CPI to come here on each CPU */ 956 * function_interrupt CPI to come here on each CPU */
969static void smp_call_function_interrupt(void) 957static void smp_call_function_interrupt(void)
970{ 958{
971 void (*func) (void *info) = call_data->func;
972 void *info = call_data->info;
973 /* must take copy of wait because call_data may be replaced
974 * unless the function is waiting for us to finish */
975 int wait = call_data->wait;
976 __u8 cpu = smp_processor_id();
977
978 /*
979 * Notify initiating CPU that I've grabbed the data and am
980 * about to execute the function
981 */
982 mb();
983 if (!test_and_clear_bit(cpu, &call_data->started)) {
984 /* If the bit wasn't set, this could be a replay */
985 printk(KERN_WARNING "VOYAGER SMP: CPU %d received call funtion"
986 " with no call pending\n", cpu);
987 return;
988 }
989 /*
990 * At this point the info structure may be out of scope unless wait==1
991 */
992 irq_enter(); 959 irq_enter();
993 (*func) (info); 960 generic_smp_call_function_interrupt();
994 __get_cpu_var(irq_stat).irq_call_count++; 961 __get_cpu_var(irq_stat).irq_call_count++;
995 irq_exit(); 962 irq_exit();
996 if (wait) {
997 mb();
998 clear_bit(cpu, &call_data->finished);
999 }
1000} 963}
1001 964
1002static int 965static void smp_call_function_single_interrupt(void)
1003voyager_smp_call_function_mask(cpumask_t cpumask,
1004 void (*func) (void *info), void *info, int wait)
1005{ 966{
1006 struct call_data_struct data; 967 irq_enter();
1007 u32 mask = cpus_addr(cpumask)[0]; 968 generic_smp_call_function_single_interrupt();
1008 969 __get_cpu_var(irq_stat).irq_call_count++;
1009 mask &= ~(1 << smp_processor_id()); 970 irq_exit();
1010
1011 if (!mask)
1012 return 0;
1013
1014 /* Can deadlock when called with interrupts disabled */
1015 WARN_ON(irqs_disabled());
1016
1017 data.func = func;
1018 data.info = info;
1019 data.started = mask;
1020 data.wait = wait;
1021 if (wait)
1022 data.finished = mask;
1023
1024 spin_lock(&call_lock);
1025 call_data = &data;
1026 wmb();
1027 /* Send a message to all other CPUs and wait for them to respond */
1028 send_CPI(mask, VIC_CALL_FUNCTION_CPI);
1029
1030 /* Wait for response */
1031 while (data.started)
1032 barrier();
1033
1034 if (wait)
1035 while (data.finished)
1036 barrier();
1037
1038 spin_unlock(&call_lock);
1039
1040 return 0;
1041} 971}
1042 972
1043/* Sorry about the name. In an APIC based system, the APICs 973/* Sorry about the name. In an APIC based system, the APICs
@@ -1094,6 +1024,12 @@ void smp_qic_call_function_interrupt(struct pt_regs *regs)
1094 smp_call_function_interrupt(); 1024 smp_call_function_interrupt();
1095} 1025}
1096 1026
1027void smp_qic_call_function_single_interrupt(struct pt_regs *regs)
1028{
1029 ack_QIC_CPI(QIC_CALL_FUNCTION_SINGLE_CPI);
1030 smp_call_function_single_interrupt();
1031}
1032
1097void smp_vic_cpi_interrupt(struct pt_regs *regs) 1033void smp_vic_cpi_interrupt(struct pt_regs *regs)
1098{ 1034{
1099 struct pt_regs *old_regs = set_irq_regs(regs); 1035 struct pt_regs *old_regs = set_irq_regs(regs);
@@ -1114,6 +1050,8 @@ void smp_vic_cpi_interrupt(struct pt_regs *regs)
1114 smp_enable_irq_interrupt(); 1050 smp_enable_irq_interrupt();
1115 if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu])) 1051 if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
1116 smp_call_function_interrupt(); 1052 smp_call_function_interrupt();
1053 if (test_and_clear_bit(VIC_CALL_FUNCTION_SINGLE_CPI, &vic_cpi_mailbox[cpu]))
1054 smp_call_function_single_interrupt();
1117 set_irq_regs(old_regs); 1055 set_irq_regs(old_regs);
1118} 1056}
1119 1057
@@ -1129,7 +1067,7 @@ static void do_flush_tlb_all(void *info)
1129/* flush the TLB of every active CPU in the system */ 1067/* flush the TLB of every active CPU in the system */
1130void flush_tlb_all(void) 1068void flush_tlb_all(void)
1131{ 1069{
1132 on_each_cpu(do_flush_tlb_all, 0, 1, 1); 1070 on_each_cpu(do_flush_tlb_all, 0, 1);
1133} 1071}
1134 1072
1135/* send a reschedule CPI to one CPU by physical CPU number*/ 1073/* send a reschedule CPI to one CPU by physical CPU number*/
@@ -1161,7 +1099,7 @@ int safe_smp_processor_id(void)
1161/* broadcast a halt to all other CPUs */ 1099/* broadcast a halt to all other CPUs */
1162static void voyager_smp_send_stop(void) 1100static void voyager_smp_send_stop(void)
1163{ 1101{
1164 smp_call_function(smp_stop_cpu_function, NULL, 1, 1); 1102 smp_call_function(smp_stop_cpu_function, NULL, 1);
1165} 1103}
1166 1104
1167/* this function is triggered in time.c when a clock tick fires 1105/* this function is triggered in time.c when a clock tick fires
@@ -1848,5 +1786,7 @@ struct smp_ops smp_ops = {
1848 1786
1849 .smp_send_stop = voyager_smp_send_stop, 1787 .smp_send_stop = voyager_smp_send_stop,
1850 .smp_send_reschedule = voyager_smp_send_reschedule, 1788 .smp_send_reschedule = voyager_smp_send_reschedule,
1851 .smp_call_function_mask = voyager_smp_call_function_mask, 1789
1790 .send_call_func_ipi = native_send_call_func_ipi,
1791 .send_call_func_single_ipi = native_send_call_func_single_ipi,
1852}; 1792};
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 47f4e2e4a096..65c6e46bf059 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -141,7 +141,7 @@ static void cpa_flush_all(unsigned long cache)
141{ 141{
142 BUG_ON(irqs_disabled()); 142 BUG_ON(irqs_disabled());
143 143
144 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1); 144 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
145} 145}
146 146
147static void __cpa_flush_range(void *arg) 147static void __cpa_flush_range(void *arg)
@@ -162,7 +162,7 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache)
162 BUG_ON(irqs_disabled()); 162 BUG_ON(irqs_disabled());
163 WARN_ON(PAGE_ALIGN(start) != start); 163 WARN_ON(PAGE_ALIGN(start) != start);
164 164
165 on_each_cpu(__cpa_flush_range, NULL, 1, 1); 165 on_each_cpu(__cpa_flush_range, NULL, 1);
166 166
167 if (!cache) 167 if (!cache)
168 return; 168 return;
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 2b6ad5b9f9d5..7f3329b55d2e 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -218,8 +218,8 @@ static int nmi_setup(void)
218 } 218 }
219 219
220 } 220 }
221 on_each_cpu(nmi_save_registers, NULL, 0, 1); 221 on_each_cpu(nmi_save_registers, NULL, 1);
222 on_each_cpu(nmi_cpu_setup, NULL, 0, 1); 222 on_each_cpu(nmi_cpu_setup, NULL, 1);
223 nmi_enabled = 1; 223 nmi_enabled = 1;
224 return 0; 224 return 0;
225} 225}
@@ -271,7 +271,7 @@ static void nmi_shutdown(void)
271{ 271{
272 struct op_msrs *msrs = &get_cpu_var(cpu_msrs); 272 struct op_msrs *msrs = &get_cpu_var(cpu_msrs);
273 nmi_enabled = 0; 273 nmi_enabled = 0;
274 on_each_cpu(nmi_cpu_shutdown, NULL, 0, 1); 274 on_each_cpu(nmi_cpu_shutdown, NULL, 1);
275 unregister_die_notifier(&profile_exceptions_nb); 275 unregister_die_notifier(&profile_exceptions_nb);
276 model->shutdown(msrs); 276 model->shutdown(msrs);
277 free_msrs(); 277 free_msrs();
@@ -286,7 +286,7 @@ static void nmi_cpu_start(void *dummy)
286 286
287static int nmi_start(void) 287static int nmi_start(void)
288{ 288{
289 on_each_cpu(nmi_cpu_start, NULL, 0, 1); 289 on_each_cpu(nmi_cpu_start, NULL, 1);
290 return 0; 290 return 0;
291} 291}
292 292
@@ -298,7 +298,7 @@ static void nmi_cpu_stop(void *dummy)
298 298
299static void nmi_stop(void) 299static void nmi_stop(void)
300{ 300{
301 on_each_cpu(nmi_cpu_stop, NULL, 0, 1); 301 on_each_cpu(nmi_cpu_stop, NULL, 1);
302} 302}
303 303
304struct op_counter_config counter_config[OP_MAX_COUNTER]; 304struct op_counter_config counter_config[OP_MAX_COUNTER];
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index a18141ae3f02..dbf532369711 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -578,7 +578,7 @@ static int __init enable_pci_io_ecs(void)
578 /* assume all cpus from fam10h have IO ECS */ 578 /* assume all cpus from fam10h have IO ECS */
579 if (boot_cpu_data.x86 < 0x10) 579 if (boot_cpu_data.x86 < 0x10)
580 return 0; 580 return 0;
581 on_each_cpu(enable_pci_io_ecs_per_cpu, NULL, 1, 1); 581 on_each_cpu(enable_pci_io_ecs_per_cpu, NULL, 1);
582 pci_probe |= PCI_HAS_IO_ECS; 582 pci_probe |= PCI_HAS_IO_ECS;
583 return 0; 583 return 0;
584} 584}
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index dcd4e51f2f16..bb508456ef52 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1214,7 +1214,9 @@ static const struct smp_ops xen_smp_ops __initdata = {
1214 1214
1215 .smp_send_stop = xen_smp_send_stop, 1215 .smp_send_stop = xen_smp_send_stop,
1216 .smp_send_reschedule = xen_smp_send_reschedule, 1216 .smp_send_reschedule = xen_smp_send_reschedule,
1217 .smp_call_function_mask = xen_smp_call_function_mask, 1217
1218 .send_call_func_ipi = xen_smp_send_call_function_ipi,
1219 .send_call_func_single_ipi = xen_smp_send_call_function_single_ipi,
1218}; 1220};
1219#endif /* CONFIG_SMP */ 1221#endif /* CONFIG_SMP */
1220 1222
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 42b3b9ed641d..ff0aa74afaa1 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -796,7 +796,7 @@ static void drop_mm_ref(struct mm_struct *mm)
796 } 796 }
797 797
798 if (!cpus_empty(mask)) 798 if (!cpus_empty(mask))
799 xen_smp_call_function_mask(mask, drop_other_mm_ref, mm, 1); 799 smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
800} 800}
801#else 801#else
802static void drop_mm_ref(struct mm_struct *mm) 802static void drop_mm_ref(struct mm_struct *mm)
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index d2e3c20127d7..233156f39b7f 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -36,27 +36,14 @@
36#include "mmu.h" 36#include "mmu.h"
37 37
38cpumask_t xen_cpu_initialized_map; 38cpumask_t xen_cpu_initialized_map;
39static DEFINE_PER_CPU(int, resched_irq) = -1;
40static DEFINE_PER_CPU(int, callfunc_irq) = -1;
41static DEFINE_PER_CPU(int, debug_irq) = -1;
42
43/*
44 * Structure and data for smp_call_function(). This is designed to minimise
45 * static memory requirements. It also looks cleaner.
46 */
47static DEFINE_SPINLOCK(call_lock);
48 39
49struct call_data_struct { 40static DEFINE_PER_CPU(int, resched_irq);
50 void (*func) (void *info); 41static DEFINE_PER_CPU(int, callfunc_irq);
51 void *info; 42static DEFINE_PER_CPU(int, callfuncsingle_irq);
52 atomic_t started; 43static DEFINE_PER_CPU(int, debug_irq) = -1;
53 atomic_t finished;
54 int wait;
55};
56 44
57static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id); 45static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id);
58 46static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id);
59static struct call_data_struct *call_data;
60 47
61/* 48/*
62 * Reschedule call back. Nothing to do, 49 * Reschedule call back. Nothing to do,
@@ -128,6 +115,17 @@ static int xen_smp_intr_init(unsigned int cpu)
128 goto fail; 115 goto fail;
129 per_cpu(debug_irq, cpu) = rc; 116 per_cpu(debug_irq, cpu) = rc;
130 117
118 callfunc_name = kasprintf(GFP_KERNEL, "callfuncsingle%d", cpu);
119 rc = bind_ipi_to_irqhandler(XEN_CALL_FUNCTION_SINGLE_VECTOR,
120 cpu,
121 xen_call_function_single_interrupt,
122 IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING,
123 callfunc_name,
124 NULL);
125 if (rc < 0)
126 goto fail;
127 per_cpu(callfuncsingle_irq, cpu) = rc;
128
131 return 0; 129 return 0;
132 130
133 fail: 131 fail:
@@ -137,6 +135,9 @@ static int xen_smp_intr_init(unsigned int cpu)
137 unbind_from_irqhandler(per_cpu(callfunc_irq, cpu), NULL); 135 unbind_from_irqhandler(per_cpu(callfunc_irq, cpu), NULL);
138 if (per_cpu(debug_irq, cpu) >= 0) 136 if (per_cpu(debug_irq, cpu) >= 0)
139 unbind_from_irqhandler(per_cpu(debug_irq, cpu), NULL); 137 unbind_from_irqhandler(per_cpu(debug_irq, cpu), NULL);
138 if (per_cpu(callfuncsingle_irq, cpu) >= 0)
139 unbind_from_irqhandler(per_cpu(callfuncsingle_irq, cpu), NULL);
140
140 return rc; 141 return rc;
141} 142}
142 143
@@ -336,7 +337,7 @@ static void stop_self(void *v)
336 337
337void xen_smp_send_stop(void) 338void xen_smp_send_stop(void)
338{ 339{
339 smp_call_function(stop_self, NULL, 0, 0); 340 smp_call_function(stop_self, NULL, 0);
340} 341}
341 342
342void xen_smp_send_reschedule(int cpu) 343void xen_smp_send_reschedule(int cpu)
@@ -344,7 +345,6 @@ void xen_smp_send_reschedule(int cpu)
344 xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR); 345 xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR);
345} 346}
346 347
347
348static void xen_send_IPI_mask(cpumask_t mask, enum ipi_vector vector) 348static void xen_send_IPI_mask(cpumask_t mask, enum ipi_vector vector)
349{ 349{
350 unsigned cpu; 350 unsigned cpu;
@@ -355,83 +355,42 @@ static void xen_send_IPI_mask(cpumask_t mask, enum ipi_vector vector)
355 xen_send_IPI_one(cpu, vector); 355 xen_send_IPI_one(cpu, vector);
356} 356}
357 357
358void xen_smp_send_call_function_ipi(cpumask_t mask)
359{
360 int cpu;
361
362 xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR);
363
364 /* Make sure other vcpus get a chance to run if they need to. */
365 for_each_cpu_mask(cpu, mask) {
366 if (xen_vcpu_stolen(cpu)) {
367 HYPERVISOR_sched_op(SCHEDOP_yield, 0);
368 break;
369 }
370 }
371}
372
373void xen_smp_send_call_function_single_ipi(int cpu)
374{
375 xen_send_IPI_mask(cpumask_of_cpu(cpu), XEN_CALL_FUNCTION_SINGLE_VECTOR);
376}
377
358static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id) 378static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)
359{ 379{
360 void (*func) (void *info) = call_data->func;
361 void *info = call_data->info;
362 int wait = call_data->wait;
363
364 /*
365 * Notify initiating CPU that I've grabbed the data and am
366 * about to execute the function
367 */
368 mb();
369 atomic_inc(&call_data->started);
370 /*
371 * At this point the info structure may be out of scope unless wait==1
372 */
373 irq_enter(); 380 irq_enter();
374 (*func)(info); 381 generic_smp_call_function_interrupt();
375 __get_cpu_var(irq_stat).irq_call_count++; 382 __get_cpu_var(irq_stat).irq_call_count++;
376 irq_exit(); 383 irq_exit();
377 384
378 if (wait) {
379 mb(); /* commit everything before setting finished */
380 atomic_inc(&call_data->finished);
381 }
382
383 return IRQ_HANDLED; 385 return IRQ_HANDLED;
384} 386}
385 387
386int xen_smp_call_function_mask(cpumask_t mask, void (*func)(void *), 388static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
387 void *info, int wait)
388{ 389{
389 struct call_data_struct data; 390 irq_enter();
390 int cpus, cpu; 391 generic_smp_call_function_single_interrupt();
391 bool yield; 392 __get_cpu_var(irq_stat).irq_call_count++;
392 393 irq_exit();
393 /* Holding any lock stops cpus from going down. */
394 spin_lock(&call_lock);
395
396 cpu_clear(smp_processor_id(), mask);
397
398 cpus = cpus_weight(mask);
399 if (!cpus) {
400 spin_unlock(&call_lock);
401 return 0;
402 }
403
404 /* Can deadlock when called with interrupts disabled */
405 WARN_ON(irqs_disabled());
406
407 data.func = func;
408 data.info = info;
409 atomic_set(&data.started, 0);
410 data.wait = wait;
411 if (wait)
412 atomic_set(&data.finished, 0);
413
414 call_data = &data;
415 mb(); /* write everything before IPI */
416
417 /* Send a message to other CPUs and wait for them to respond */
418 xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR);
419
420 /* Make sure other vcpus get a chance to run if they need to. */
421 yield = false;
422 for_each_cpu_mask(cpu, mask)
423 if (xen_vcpu_stolen(cpu))
424 yield = true;
425
426 if (yield)
427 HYPERVISOR_sched_op(SCHEDOP_yield, 0);
428
429 /* Wait for response */
430 while (atomic_read(&data.started) != cpus ||
431 (wait && atomic_read(&data.finished) != cpus))
432 cpu_relax();
433
434 spin_unlock(&call_lock);
435 394
436 return 0; 395 return IRQ_HANDLED;
437} 396}
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index d852ddbb3448..6f4b1045c1c2 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -55,13 +55,8 @@ void xen_smp_cpus_done(unsigned int max_cpus);
55 55
56void xen_smp_send_stop(void); 56void xen_smp_send_stop(void);
57void xen_smp_send_reschedule(int cpu); 57void xen_smp_send_reschedule(int cpu);
58int xen_smp_call_function (void (*func) (void *info), void *info, int nonatomic, 58void xen_smp_send_call_function_ipi(cpumask_t mask);
59 int wait); 59void xen_smp_send_call_function_single_ipi(int cpu);
60int xen_smp_call_function_single(int cpu, void (*func) (void *info), void *info,
61 int nonatomic, int wait);
62
63int xen_smp_call_function_mask(cpumask_t mask, void (*func)(void *),
64 void *info, int wait);
65 60
66extern cpumask_t xen_cpu_initialized_map; 61extern cpumask_t xen_cpu_initialized_map;
67 62
diff --git a/crypto/async_tx/async_tx.c b/crypto/async_tx/async_tx.c
index c6e772fc5ccd..095c798d3170 100644
--- a/crypto/async_tx/async_tx.c
+++ b/crypto/async_tx/async_tx.c
@@ -23,6 +23,7 @@
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 * 24 *
25 */ 25 */
26#include <linux/rculist.h>
26#include <linux/kernel.h> 27#include <linux/kernel.h>
27#include <linux/async_tx.h> 28#include <linux/async_tx.h>
28 29
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 556ee1585192..4976e5db2b3f 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -1339,7 +1339,7 @@ static void smp_callback(void *v)
1339static int acpi_processor_latency_notify(struct notifier_block *b, 1339static int acpi_processor_latency_notify(struct notifier_block *b,
1340 unsigned long l, void *v) 1340 unsigned long l, void *v)
1341{ 1341{
1342 smp_call_function(smp_callback, NULL, 0, 1); 1342 smp_call_function(smp_callback, NULL, 1);
1343 return NOTIFY_OK; 1343 return NOTIFY_OK;
1344} 1344}
1345 1345
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index 564daaa6c7d0..eaa1a355bb32 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -1249,7 +1249,7 @@ static void ipi_handler(void *null)
1249 1249
1250void global_cache_flush(void) 1250void global_cache_flush(void)
1251{ 1251{
1252 if (on_each_cpu(ipi_handler, NULL, 1, 1) != 0) 1252 if (on_each_cpu(ipi_handler, NULL, 1) != 0)
1253 panic(PFX "timed out waiting for the other CPUs!\n"); 1253 panic(PFX "timed out waiting for the other CPUs!\n");
1254} 1254}
1255EXPORT_SYMBOL(global_cache_flush); 1255EXPORT_SYMBOL(global_cache_flush);
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index dbce1263bdff..8fdfe9c871e3 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -215,7 +215,7 @@ static void showacpu(void *dummy)
215 215
216static void sysrq_showregs_othercpus(struct work_struct *dummy) 216static void sysrq_showregs_othercpus(struct work_struct *dummy)
217{ 217{
218 smp_call_function(showacpu, NULL, 0, 0); 218 smp_call_function(showacpu, NULL, 0);
219} 219}
220 220
221static DECLARE_WORK(sysrq_showallcpus, sysrq_showregs_othercpus); 221static DECLARE_WORK(sysrq_showallcpus, sysrq_showregs_othercpus);
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 23554b676d6e..5405769020a1 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -340,7 +340,7 @@ static void smp_callback(void *v)
340static int cpuidle_latency_notify(struct notifier_block *b, 340static int cpuidle_latency_notify(struct notifier_block *b,
341 unsigned long l, void *v) 341 unsigned long l, void *v)
342{ 342{
343 smp_call_function(smp_callback, NULL, 0, 1); 343 smp_call_function(smp_callback, NULL, 1);
344 return NOTIFY_OK; 344 return NOTIFY_OK;
345} 345}
346 346
diff --git a/drivers/firewire/fw-card.c b/drivers/firewire/fw-card.c
index 5b4c0d9f5173..da873d795aad 100644
--- a/drivers/firewire/fw-card.c
+++ b/drivers/firewire/fw-card.c
@@ -16,12 +16,15 @@
16 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18 18
19#include <linux/module.h> 19#include <linux/completion.h>
20#include <linux/errno.h> 20#include <linux/crc-itu-t.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/device.h> 22#include <linux/device.h>
23#include <linux/errno.h>
24#include <linux/kref.h>
25#include <linux/module.h>
23#include <linux/mutex.h> 26#include <linux/mutex.h>
24#include <linux/crc-itu-t.h> 27
25#include "fw-transaction.h" 28#include "fw-transaction.h"
26#include "fw-topology.h" 29#include "fw-topology.h"
27#include "fw-device.h" 30#include "fw-device.h"
@@ -396,14 +399,16 @@ fw_card_initialize(struct fw_card *card, const struct fw_card_driver *driver,
396{ 399{
397 static atomic_t index = ATOMIC_INIT(-1); 400 static atomic_t index = ATOMIC_INIT(-1);
398 401
399 atomic_set(&card->device_count, 0);
400 card->index = atomic_inc_return(&index); 402 card->index = atomic_inc_return(&index);
401 card->driver = driver; 403 card->driver = driver;
402 card->device = device; 404 card->device = device;
403 card->current_tlabel = 0; 405 card->current_tlabel = 0;
404 card->tlabel_mask = 0; 406 card->tlabel_mask = 0;
405 card->color = 0; 407 card->color = 0;
408 card->broadcast_channel = BROADCAST_CHANNEL_INITIAL;
406 409
410 kref_init(&card->kref);
411 init_completion(&card->done);
407 INIT_LIST_HEAD(&card->transaction_list); 412 INIT_LIST_HEAD(&card->transaction_list);
408 spin_lock_init(&card->lock); 413 spin_lock_init(&card->lock);
409 setup_timer(&card->flush_timer, 414 setup_timer(&card->flush_timer,
@@ -496,7 +501,6 @@ dummy_enable_phys_dma(struct fw_card *card,
496} 501}
497 502
498static struct fw_card_driver dummy_driver = { 503static struct fw_card_driver dummy_driver = {
499 .name = "dummy",
500 .enable = dummy_enable, 504 .enable = dummy_enable,
501 .update_phy_reg = dummy_update_phy_reg, 505 .update_phy_reg = dummy_update_phy_reg,
502 .set_config_rom = dummy_set_config_rom, 506 .set_config_rom = dummy_set_config_rom,
@@ -507,6 +511,14 @@ static struct fw_card_driver dummy_driver = {
507}; 511};
508 512
509void 513void
514fw_card_release(struct kref *kref)
515{
516 struct fw_card *card = container_of(kref, struct fw_card, kref);
517
518 complete(&card->done);
519}
520
521void
510fw_core_remove_card(struct fw_card *card) 522fw_core_remove_card(struct fw_card *card)
511{ 523{
512 card->driver->update_phy_reg(card, 4, 524 card->driver->update_phy_reg(card, 4,
@@ -521,12 +533,10 @@ fw_core_remove_card(struct fw_card *card)
521 card->driver = &dummy_driver; 533 card->driver = &dummy_driver;
522 534
523 fw_destroy_nodes(card); 535 fw_destroy_nodes(card);
524 /* 536
525 * Wait for all device workqueue jobs to finish. Otherwise the 537 /* Wait for all users, especially device workqueue jobs, to finish. */
526 * firewire-core module could be unloaded before the jobs ran. 538 fw_card_put(card);
527 */ 539 wait_for_completion(&card->done);
528 while (atomic_read(&card->device_count) > 0)
529 msleep(100);
530 540
531 cancel_delayed_work_sync(&card->work); 541 cancel_delayed_work_sync(&card->work);
532 fw_flush_transactions(card); 542 fw_flush_transactions(card);
diff --git a/drivers/firewire/fw-device.c b/drivers/firewire/fw-device.c
index d9c8daf7ae7d..0855fb5568e8 100644
--- a/drivers/firewire/fw-device.c
+++ b/drivers/firewire/fw-device.c
@@ -168,7 +168,7 @@ static void fw_device_release(struct device *dev)
168 fw_node_put(device->node); 168 fw_node_put(device->node);
169 kfree(device->config_rom); 169 kfree(device->config_rom);
170 kfree(device); 170 kfree(device);
171 atomic_dec(&card->device_count); 171 fw_card_put(card);
172} 172}
173 173
174int fw_device_enable_phys_dma(struct fw_device *device) 174int fw_device_enable_phys_dma(struct fw_device *device)
@@ -946,8 +946,7 @@ void fw_node_event(struct fw_card *card, struct fw_node *node, int event)
946 */ 946 */
947 device_initialize(&device->device); 947 device_initialize(&device->device);
948 atomic_set(&device->state, FW_DEVICE_INITIALIZING); 948 atomic_set(&device->state, FW_DEVICE_INITIALIZING);
949 atomic_inc(&card->device_count); 949 device->card = fw_card_get(card);
950 device->card = card;
951 device->node = fw_node_get(node); 950 device->node = fw_node_get(node);
952 device->node_id = node->node_id; 951 device->node_id = node->node_id;
953 device->generation = card->generation; 952 device->generation = card->generation;
diff --git a/drivers/firewire/fw-device.h b/drivers/firewire/fw-device.h
index 5f131f5129da..42305bbac72f 100644
--- a/drivers/firewire/fw-device.h
+++ b/drivers/firewire/fw-device.h
@@ -62,7 +62,6 @@ struct fw_device {
62 bool cmc; 62 bool cmc;
63 struct fw_card *card; 63 struct fw_card *card;
64 struct device device; 64 struct device device;
65 struct list_head link;
66 struct list_head client_list; 65 struct list_head client_list;
67 u32 *config_rom; 66 u32 *config_rom;
68 size_t config_rom_length; 67 size_t config_rom_length;
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c
index 0b66306af479..333b12544dd1 100644
--- a/drivers/firewire/fw-ohci.c
+++ b/drivers/firewire/fw-ohci.c
@@ -2292,7 +2292,6 @@ ohci_queue_iso(struct fw_iso_context *base,
2292} 2292}
2293 2293
2294static const struct fw_card_driver ohci_driver = { 2294static const struct fw_card_driver ohci_driver = {
2295 .name = ohci_driver_name,
2296 .enable = ohci_enable, 2295 .enable = ohci_enable,
2297 .update_phy_reg = ohci_update_phy_reg, 2296 .update_phy_reg = ohci_update_phy_reg,
2298 .set_config_rom = ohci_set_config_rom, 2297 .set_config_rom = ohci_set_config_rom,
diff --git a/drivers/firewire/fw-sbp2.c b/drivers/firewire/fw-sbp2.c
index 227d2e036cd8..53fc5a641e6d 100644
--- a/drivers/firewire/fw-sbp2.c
+++ b/drivers/firewire/fw-sbp2.c
@@ -86,6 +86,11 @@ MODULE_PARM_DESC(exclusive_login, "Exclusive login to sbp2 device "
86 * - delay inquiry 86 * - delay inquiry
87 * Wait extra SBP2_INQUIRY_DELAY seconds after login before SCSI inquiry. 87 * Wait extra SBP2_INQUIRY_DELAY seconds after login before SCSI inquiry.
88 * 88 *
89 * - power condition
90 * Set the power condition field in the START STOP UNIT commands sent by
91 * sd_mod on suspend, resume, and shutdown (if manage_start_stop is on).
92 * Some disks need this to spin down or to resume properly.
93 *
89 * - override internal blacklist 94 * - override internal blacklist
90 * Instead of adding to the built-in blacklist, use only the workarounds 95 * Instead of adding to the built-in blacklist, use only the workarounds
91 * specified in the module load parameter. 96 * specified in the module load parameter.
@@ -97,6 +102,7 @@ MODULE_PARM_DESC(exclusive_login, "Exclusive login to sbp2 device "
97#define SBP2_WORKAROUND_FIX_CAPACITY 0x8 102#define SBP2_WORKAROUND_FIX_CAPACITY 0x8
98#define SBP2_WORKAROUND_DELAY_INQUIRY 0x10 103#define SBP2_WORKAROUND_DELAY_INQUIRY 0x10
99#define SBP2_INQUIRY_DELAY 12 104#define SBP2_INQUIRY_DELAY 12
105#define SBP2_WORKAROUND_POWER_CONDITION 0x20
100#define SBP2_WORKAROUND_OVERRIDE 0x100 106#define SBP2_WORKAROUND_OVERRIDE 0x100
101 107
102static int sbp2_param_workarounds; 108static int sbp2_param_workarounds;
@@ -107,6 +113,8 @@ MODULE_PARM_DESC(workarounds, "Work around device bugs (default = 0"
107 ", skip mode page 8 = " __stringify(SBP2_WORKAROUND_MODE_SENSE_8) 113 ", skip mode page 8 = " __stringify(SBP2_WORKAROUND_MODE_SENSE_8)
108 ", fix capacity = " __stringify(SBP2_WORKAROUND_FIX_CAPACITY) 114 ", fix capacity = " __stringify(SBP2_WORKAROUND_FIX_CAPACITY)
109 ", delay inquiry = " __stringify(SBP2_WORKAROUND_DELAY_INQUIRY) 115 ", delay inquiry = " __stringify(SBP2_WORKAROUND_DELAY_INQUIRY)
116 ", set power condition in start stop unit = "
117 __stringify(SBP2_WORKAROUND_POWER_CONDITION)
110 ", override internal blacklist = " __stringify(SBP2_WORKAROUND_OVERRIDE) 118 ", override internal blacklist = " __stringify(SBP2_WORKAROUND_OVERRIDE)
111 ", or a combination)"); 119 ", or a combination)");
112 120
@@ -310,18 +318,25 @@ static const struct {
310 .firmware_revision = 0x002800, 318 .firmware_revision = 0x002800,
311 .model = 0x001010, 319 .model = 0x001010,
312 .workarounds = SBP2_WORKAROUND_INQUIRY_36 | 320 .workarounds = SBP2_WORKAROUND_INQUIRY_36 |
313 SBP2_WORKAROUND_MODE_SENSE_8, 321 SBP2_WORKAROUND_MODE_SENSE_8 |
322 SBP2_WORKAROUND_POWER_CONDITION,
314 }, 323 },
315 /* DViCO Momobay FX-3A with TSB42AA9A bridge */ { 324 /* DViCO Momobay FX-3A with TSB42AA9A bridge */ {
316 .firmware_revision = 0x002800, 325 .firmware_revision = 0x002800,
317 .model = 0x000000, 326 .model = 0x000000,
318 .workarounds = SBP2_WORKAROUND_DELAY_INQUIRY, 327 .workarounds = SBP2_WORKAROUND_DELAY_INQUIRY |
328 SBP2_WORKAROUND_POWER_CONDITION,
319 }, 329 },
320 /* Initio bridges, actually only needed for some older ones */ { 330 /* Initio bridges, actually only needed for some older ones */ {
321 .firmware_revision = 0x000200, 331 .firmware_revision = 0x000200,
322 .model = ~0, 332 .model = ~0,
323 .workarounds = SBP2_WORKAROUND_INQUIRY_36, 333 .workarounds = SBP2_WORKAROUND_INQUIRY_36,
324 }, 334 },
335 /* PL-3507 bridge with Prolific firmware */ {
336 .firmware_revision = 0x012800,
337 .model = ~0,
338 .workarounds = SBP2_WORKAROUND_POWER_CONDITION,
339 },
325 /* Symbios bridge */ { 340 /* Symbios bridge */ {
326 .firmware_revision = 0xa0b800, 341 .firmware_revision = 0xa0b800,
327 .model = ~0, 342 .model = ~0,
@@ -1530,6 +1545,9 @@ static int sbp2_scsi_slave_configure(struct scsi_device *sdev)
1530 1545
1531 sdev->use_10_for_rw = 1; 1546 sdev->use_10_for_rw = 1;
1532 1547
1548 if (sbp2_param_exclusive_login)
1549 sdev->manage_start_stop = 1;
1550
1533 if (sdev->type == TYPE_ROM) 1551 if (sdev->type == TYPE_ROM)
1534 sdev->use_10_for_ms = 1; 1552 sdev->use_10_for_ms = 1;
1535 1553
@@ -1540,6 +1558,9 @@ static int sbp2_scsi_slave_configure(struct scsi_device *sdev)
1540 if (lu->tgt->workarounds & SBP2_WORKAROUND_FIX_CAPACITY) 1558 if (lu->tgt->workarounds & SBP2_WORKAROUND_FIX_CAPACITY)
1541 sdev->fix_capacity = 1; 1559 sdev->fix_capacity = 1;
1542 1560
1561 if (lu->tgt->workarounds & SBP2_WORKAROUND_POWER_CONDITION)
1562 sdev->start_stop_pwr_cond = 1;
1563
1543 if (lu->tgt->workarounds & SBP2_WORKAROUND_128K_MAX_TRANS) 1564 if (lu->tgt->workarounds & SBP2_WORKAROUND_128K_MAX_TRANS)
1544 blk_queue_max_sectors(sdev->request_queue, 128 * 1024 / 512); 1565 blk_queue_max_sectors(sdev->request_queue, 128 * 1024 / 512);
1545 1566
diff --git a/drivers/firewire/fw-transaction.c b/drivers/firewire/fw-transaction.c
index 03ae8a77c479..40db80752272 100644
--- a/drivers/firewire/fw-transaction.c
+++ b/drivers/firewire/fw-transaction.c
@@ -55,6 +55,9 @@
55#define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff) 55#define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff)
56#define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff) 56#define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff)
57 57
58#define HEADER_DESTINATION_IS_BROADCAST(q) \
59 (((q) & HEADER_DESTINATION(0x3f)) == HEADER_DESTINATION(0x3f))
60
58#define PHY_CONFIG_GAP_COUNT(gap_count) (((gap_count) << 16) | (1 << 22)) 61#define PHY_CONFIG_GAP_COUNT(gap_count) (((gap_count) << 16) | (1 << 22))
59#define PHY_CONFIG_ROOT_ID(node_id) ((((node_id) & 0x3f) << 24) | (1 << 23)) 62#define PHY_CONFIG_ROOT_ID(node_id) ((((node_id) & 0x3f) << 24) | (1 << 23))
60#define PHY_IDENTIFIER(id) ((id) << 30) 63#define PHY_IDENTIFIER(id) ((id) << 30)
@@ -624,12 +627,9 @@ allocate_request(struct fw_packet *p)
624void 627void
625fw_send_response(struct fw_card *card, struct fw_request *request, int rcode) 628fw_send_response(struct fw_card *card, struct fw_request *request, int rcode)
626{ 629{
627 /* 630 /* unified transaction or broadcast transaction: don't respond */
628 * Broadcast packets are reported as ACK_COMPLETE, so this 631 if (request->ack != ACK_PENDING ||
629 * check is sufficient to ensure we don't send response to 632 HEADER_DESTINATION_IS_BROADCAST(request->request_header[0])) {
630 * broadcast packets or posted writes.
631 */
632 if (request->ack != ACK_PENDING) {
633 kfree(request); 633 kfree(request);
634 return; 634 return;
635 } 635 }
@@ -817,12 +817,13 @@ handle_registers(struct fw_card *card, struct fw_request *request,
817 int reg = offset & ~CSR_REGISTER_BASE; 817 int reg = offset & ~CSR_REGISTER_BASE;
818 unsigned long long bus_time; 818 unsigned long long bus_time;
819 __be32 *data = payload; 819 __be32 *data = payload;
820 int rcode = RCODE_COMPLETE;
820 821
821 switch (reg) { 822 switch (reg) {
822 case CSR_CYCLE_TIME: 823 case CSR_CYCLE_TIME:
823 case CSR_BUS_TIME: 824 case CSR_BUS_TIME:
824 if (!TCODE_IS_READ_REQUEST(tcode) || length != 4) { 825 if (!TCODE_IS_READ_REQUEST(tcode) || length != 4) {
825 fw_send_response(card, request, RCODE_TYPE_ERROR); 826 rcode = RCODE_TYPE_ERROR;
826 break; 827 break;
827 } 828 }
828 829
@@ -831,7 +832,17 @@ handle_registers(struct fw_card *card, struct fw_request *request,
831 *data = cpu_to_be32(bus_time); 832 *data = cpu_to_be32(bus_time);
832 else 833 else
833 *data = cpu_to_be32(bus_time >> 25); 834 *data = cpu_to_be32(bus_time >> 25);
834 fw_send_response(card, request, RCODE_COMPLETE); 835 break;
836
837 case CSR_BROADCAST_CHANNEL:
838 if (tcode == TCODE_READ_QUADLET_REQUEST)
839 *data = cpu_to_be32(card->broadcast_channel);
840 else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
841 card->broadcast_channel =
842 (be32_to_cpu(*data) & BROADCAST_CHANNEL_VALID) |
843 BROADCAST_CHANNEL_INITIAL;
844 else
845 rcode = RCODE_TYPE_ERROR;
835 break; 846 break;
836 847
837 case CSR_BUS_MANAGER_ID: 848 case CSR_BUS_MANAGER_ID:
@@ -850,10 +861,13 @@ handle_registers(struct fw_card *card, struct fw_request *request,
850 861
851 case CSR_BUSY_TIMEOUT: 862 case CSR_BUSY_TIMEOUT:
852 /* FIXME: Implement this. */ 863 /* FIXME: Implement this. */
864
853 default: 865 default:
854 fw_send_response(card, request, RCODE_ADDRESS_ERROR); 866 rcode = RCODE_ADDRESS_ERROR;
855 break; 867 break;
856 } 868 }
869
870 fw_send_response(card, request, rcode);
857} 871}
858 872
859static struct fw_address_handler registers = { 873static struct fw_address_handler registers = {
diff --git a/drivers/firewire/fw-transaction.h b/drivers/firewire/fw-transaction.h
index 04d3854f6560..2ae1b0d6cb7b 100644
--- a/drivers/firewire/fw-transaction.h
+++ b/drivers/firewire/fw-transaction.h
@@ -19,14 +19,15 @@
19#ifndef __fw_transaction_h 19#ifndef __fw_transaction_h
20#define __fw_transaction_h 20#define __fw_transaction_h
21 21
22#include <linux/completion.h>
22#include <linux/device.h> 23#include <linux/device.h>
23#include <linux/timer.h>
24#include <linux/interrupt.h>
25#include <linux/list.h>
26#include <linux/fs.h>
27#include <linux/dma-mapping.h> 24#include <linux/dma-mapping.h>
28#include <linux/firewire-constants.h> 25#include <linux/firewire-constants.h>
29#include <asm/atomic.h> 26#include <linux/kref.h>
27#include <linux/list.h>
28#include <linux/spinlock_types.h>
29#include <linux/timer.h>
30#include <linux/workqueue.h>
30 31
31#define TCODE_IS_READ_REQUEST(tcode) (((tcode) & ~1) == 4) 32#define TCODE_IS_READ_REQUEST(tcode) (((tcode) & ~1) == 4)
32#define TCODE_IS_BLOCK_PACKET(tcode) (((tcode) & 1) != 0) 33#define TCODE_IS_BLOCK_PACKET(tcode) (((tcode) & 1) != 0)
@@ -80,6 +81,9 @@
80#define CSR_SPEED_MAP 0x2000 81#define CSR_SPEED_MAP 0x2000
81#define CSR_SPEED_MAP_END 0x3000 82#define CSR_SPEED_MAP_END 0x3000
82 83
84#define BROADCAST_CHANNEL_INITIAL (1 << 31 | 31)
85#define BROADCAST_CHANNEL_VALID (1 << 30)
86
83#define fw_notify(s, args...) printk(KERN_NOTICE KBUILD_MODNAME ": " s, ## args) 87#define fw_notify(s, args...) printk(KERN_NOTICE KBUILD_MODNAME ": " s, ## args)
84#define fw_error(s, args...) printk(KERN_ERR KBUILD_MODNAME ": " s, ## args) 88#define fw_error(s, args...) printk(KERN_ERR KBUILD_MODNAME ": " s, ## args)
85 89
@@ -216,7 +220,8 @@ extern struct bus_type fw_bus_type;
216struct fw_card { 220struct fw_card {
217 const struct fw_card_driver *driver; 221 const struct fw_card_driver *driver;
218 struct device *device; 222 struct device *device;
219 atomic_t device_count; 223 struct kref kref;
224 struct completion done;
220 225
221 int node_id; 226 int node_id;
222 int generation; 227 int generation;
@@ -236,6 +241,7 @@ struct fw_card {
236 */ 241 */
237 int self_id_count; 242 int self_id_count;
238 u32 topology_map[252 + 3]; 243 u32 topology_map[252 + 3];
244 u32 broadcast_channel;
239 245
240 spinlock_t lock; /* Take this lock when handling the lists in 246 spinlock_t lock; /* Take this lock when handling the lists in
241 * this struct. */ 247 * this struct. */
@@ -256,6 +262,20 @@ struct fw_card {
256 int bm_generation; 262 int bm_generation;
257}; 263};
258 264
265static inline struct fw_card *fw_card_get(struct fw_card *card)
266{
267 kref_get(&card->kref);
268
269 return card;
270}
271
272void fw_card_release(struct kref *kref);
273
274static inline void fw_card_put(struct fw_card *card)
275{
276 kref_put(&card->kref, fw_card_release);
277}
278
259/* 279/*
260 * The iso packet format allows for an immediate header/payload part 280 * The iso packet format allows for an immediate header/payload part
261 * stored in 'header' immediately after the packet info plus an 281 * stored in 'header' immediately after the packet info plus an
@@ -348,8 +368,6 @@ int
348fw_iso_context_stop(struct fw_iso_context *ctx); 368fw_iso_context_stop(struct fw_iso_context *ctx);
349 369
350struct fw_card_driver { 370struct fw_card_driver {
351 const char *name;
352
353 /* 371 /*
354 * Enable the given card with the given initial config rom. 372 * Enable the given card with the given initial config rom.
355 * This function is expected to activate the card, and either 373 * This function is expected to activate the card, and either
diff --git a/drivers/ieee1394/csr1212.c b/drivers/ieee1394/csr1212.c
index e8122def164d..9f95337139e3 100644
--- a/drivers/ieee1394/csr1212.c
+++ b/drivers/ieee1394/csr1212.c
@@ -1049,6 +1049,24 @@ int csr1212_read(struct csr1212_csr *csr, u32 offset, void *buffer, u32 len)
1049 return -ENOENT; 1049 return -ENOENT;
1050} 1050}
1051 1051
1052/*
1053 * Apparently there are many different wrong implementations of the CRC
1054 * algorithm. We don't fail, we just warn... approximately once per GUID.
1055 */
1056static void
1057csr1212_check_crc(const u32 *buffer, size_t length, u16 crc, __be32 *guid)
1058{
1059 static u64 last_bad_eui64;
1060 u64 eui64 = ((u64)be32_to_cpu(guid[0]) << 32) | be32_to_cpu(guid[1]);
1061
1062 if (csr1212_crc16(buffer, length) == crc ||
1063 csr1212_msft_crc16(buffer, length) == crc ||
1064 eui64 == last_bad_eui64)
1065 return;
1066
1067 printk(KERN_DEBUG "ieee1394: config ROM CRC error\n");
1068 last_bad_eui64 = eui64;
1069}
1052 1070
1053/* Parse a chunk of data as a Config ROM */ 1071/* Parse a chunk of data as a Config ROM */
1054 1072
@@ -1092,11 +1110,8 @@ static int csr1212_parse_bus_info_block(struct csr1212_csr *csr)
1092 return ret; 1110 return ret;
1093 } 1111 }
1094 1112
1095 /* Apparently there are many different wrong implementations of the CRC 1113 csr1212_check_crc(bi->data, bi->crc_length, bi->crc,
1096 * algorithm. We don't fail, we just warn. */ 1114 &csr->bus_info_data[3]);
1097 if ((csr1212_crc16(bi->data, bi->crc_length) != bi->crc) &&
1098 (csr1212_msft_crc16(bi->data, bi->crc_length) != bi->crc))
1099 printk(KERN_DEBUG "IEEE 1394 device has ROM CRC error\n");
1100 1115
1101 cr = CSR1212_MALLOC(sizeof(*cr)); 1116 cr = CSR1212_MALLOC(sizeof(*cr));
1102 if (!cr) 1117 if (!cr)
@@ -1205,11 +1220,8 @@ int csr1212_parse_keyval(struct csr1212_keyval *kv,
1205 &cache->data[bytes_to_quads(kv->offset - cache->offset)]; 1220 &cache->data[bytes_to_quads(kv->offset - cache->offset)];
1206 kvi_len = be16_to_cpu(kvi->length); 1221 kvi_len = be16_to_cpu(kvi->length);
1207 1222
1208 /* Apparently there are many different wrong implementations of the CRC 1223 /* GUID is wrong in here in case of extended ROM. We don't care. */
1209 * algorithm. We don't fail, we just warn. */ 1224 csr1212_check_crc(kvi->data, kvi_len, kvi->crc, &cache->data[3]);
1210 if ((csr1212_crc16(kvi->data, kvi_len) != kvi->crc) &&
1211 (csr1212_msft_crc16(kvi->data, kvi_len) != kvi->crc))
1212 printk(KERN_DEBUG "IEEE 1394 device has ROM CRC error\n");
1213 1225
1214 switch (kv->key.type) { 1226 switch (kv->key.type) {
1215 case CSR1212_KV_TYPE_DIRECTORY: 1227 case CSR1212_KV_TYPE_DIRECTORY:
diff --git a/drivers/ieee1394/dma.c b/drivers/ieee1394/dma.c
index 73685e7dc7e4..1aba8c13fe8f 100644
--- a/drivers/ieee1394/dma.c
+++ b/drivers/ieee1394/dma.c
@@ -274,7 +274,7 @@ int dma_region_mmap(struct dma_region *dma, struct file *file,
274 vma->vm_ops = &dma_region_vm_ops; 274 vma->vm_ops = &dma_region_vm_ops;
275 vma->vm_private_data = dma; 275 vma->vm_private_data = dma;
276 vma->vm_file = file; 276 vma->vm_file = file;
277 vma->vm_flags |= VM_RESERVED; 277 vma->vm_flags |= VM_RESERVED | VM_ALWAYSDUMP;
278 278
279 return 0; 279 return 0;
280} 280}
diff --git a/drivers/ieee1394/highlevel.c b/drivers/ieee1394/highlevel.c
index fa2bfec0fca2..918ffc4fc8ac 100644
--- a/drivers/ieee1394/highlevel.c
+++ b/drivers/ieee1394/highlevel.c
@@ -228,10 +228,8 @@ void hpsb_register_highlevel(struct hpsb_highlevel *hl)
228{ 228{
229 unsigned long flags; 229 unsigned long flags;
230 230
231 hpsb_init_highlevel(hl);
231 INIT_LIST_HEAD(&hl->addr_list); 232 INIT_LIST_HEAD(&hl->addr_list);
232 INIT_LIST_HEAD(&hl->host_info_list);
233
234 rwlock_init(&hl->host_info_lock);
235 233
236 down_write(&hl_drivers_sem); 234 down_write(&hl_drivers_sem);
237 list_add_tail(&hl->hl_list, &hl_drivers); 235 list_add_tail(&hl->hl_list, &hl_drivers);
diff --git a/drivers/ieee1394/highlevel.h b/drivers/ieee1394/highlevel.h
index eb9fe321e09a..bc5d0854c17e 100644
--- a/drivers/ieee1394/highlevel.h
+++ b/drivers/ieee1394/highlevel.h
@@ -2,7 +2,7 @@
2#define IEEE1394_HIGHLEVEL_H 2#define IEEE1394_HIGHLEVEL_H
3 3
4#include <linux/list.h> 4#include <linux/list.h>
5#include <linux/spinlock_types.h> 5#include <linux/spinlock.h>
6#include <linux/types.h> 6#include <linux/types.h>
7 7
8struct module; 8struct module;
@@ -103,6 +103,17 @@ int highlevel_lock64(struct hpsb_host *host, int nodeid, octlet_t *store,
103void highlevel_fcp_request(struct hpsb_host *host, int nodeid, int direction, 103void highlevel_fcp_request(struct hpsb_host *host, int nodeid, int direction,
104 void *data, size_t length); 104 void *data, size_t length);
105 105
106/**
107 * hpsb_init_highlevel - initialize a struct hpsb_highlevel
108 *
109 * This is only necessary if hpsb_get_hostinfo_bykey can be called
110 * before hpsb_register_highlevel.
111 */
112static inline void hpsb_init_highlevel(struct hpsb_highlevel *hl)
113{
114 rwlock_init(&hl->host_info_lock);
115 INIT_LIST_HEAD(&hl->host_info_list);
116}
106void hpsb_register_highlevel(struct hpsb_highlevel *hl); 117void hpsb_register_highlevel(struct hpsb_highlevel *hl);
107void hpsb_unregister_highlevel(struct hpsb_highlevel *hl); 118void hpsb_unregister_highlevel(struct hpsb_highlevel *hl);
108 119
diff --git a/drivers/ieee1394/raw1394.c b/drivers/ieee1394/raw1394.c
index ec2a0adbedb2..96f2847b0405 100644
--- a/drivers/ieee1394/raw1394.c
+++ b/drivers/ieee1394/raw1394.c
@@ -2549,8 +2549,8 @@ static int raw1394_mmap(struct file *file, struct vm_area_struct *vma)
2549} 2549}
2550 2550
2551/* ioctl is only used for rawiso operations */ 2551/* ioctl is only used for rawiso operations */
2552static int raw1394_ioctl(struct inode *inode, struct file *file, 2552static long do_raw1394_ioctl(struct file *file, unsigned int cmd,
2553 unsigned int cmd, unsigned long arg) 2553 unsigned long arg)
2554{ 2554{
2555 struct file_info *fi = file->private_data; 2555 struct file_info *fi = file->private_data;
2556 void __user *argp = (void __user *)arg; 2556 void __user *argp = (void __user *)arg;
@@ -2656,6 +2656,16 @@ static int raw1394_ioctl(struct inode *inode, struct file *file,
2656 return -EINVAL; 2656 return -EINVAL;
2657} 2657}
2658 2658
2659static long raw1394_ioctl(struct file *file, unsigned int cmd,
2660 unsigned long arg)
2661{
2662 long ret;
2663 lock_kernel();
2664 ret = do_raw1394_ioctl(file, cmd, arg);
2665 unlock_kernel();
2666 return ret;
2667}
2668
2659#ifdef CONFIG_COMPAT 2669#ifdef CONFIG_COMPAT
2660struct raw1394_iso_packets32 { 2670struct raw1394_iso_packets32 {
2661 __u32 n_packets; 2671 __u32 n_packets;
@@ -2690,7 +2700,7 @@ static long raw1394_iso_xmit_recv_packets32(struct file *file, unsigned int cmd,
2690 !copy_from_user(&infos32, &arg->infos, sizeof infos32)) { 2700 !copy_from_user(&infos32, &arg->infos, sizeof infos32)) {
2691 infos = compat_ptr(infos32); 2701 infos = compat_ptr(infos32);
2692 if (!copy_to_user(&dst->infos, &infos, sizeof infos)) 2702 if (!copy_to_user(&dst->infos, &infos, sizeof infos))
2693 err = raw1394_ioctl(NULL, file, cmd, (unsigned long)dst); 2703 err = do_raw1394_ioctl(file, cmd, (unsigned long)dst);
2694 } 2704 }
2695 return err; 2705 return err;
2696} 2706}
@@ -2731,7 +2741,7 @@ static long raw1394_compat_ioctl(struct file *file,
2731 case RAW1394_IOC_ISO_GET_STATUS: 2741 case RAW1394_IOC_ISO_GET_STATUS:
2732 case RAW1394_IOC_ISO_SHUTDOWN: 2742 case RAW1394_IOC_ISO_SHUTDOWN:
2733 case RAW1394_IOC_ISO_QUEUE_ACTIVITY: 2743 case RAW1394_IOC_ISO_QUEUE_ACTIVITY:
2734 err = raw1394_ioctl(NULL, file, cmd, arg); 2744 err = do_raw1394_ioctl(file, cmd, arg);
2735 break; 2745 break;
2736 /* These request have different format. */ 2746 /* These request have different format. */
2737 case RAW1394_IOC_ISO_RECV_PACKETS32: 2747 case RAW1394_IOC_ISO_RECV_PACKETS32:
@@ -2984,7 +2994,7 @@ static const struct file_operations raw1394_fops = {
2984 .read = raw1394_read, 2994 .read = raw1394_read,
2985 .write = raw1394_write, 2995 .write = raw1394_write,
2986 .mmap = raw1394_mmap, 2996 .mmap = raw1394_mmap,
2987 .ioctl = raw1394_ioctl, 2997 .unlocked_ioctl = raw1394_ioctl,
2988#ifdef CONFIG_COMPAT 2998#ifdef CONFIG_COMPAT
2989 .compat_ioctl = raw1394_compat_ioctl, 2999 .compat_ioctl = raw1394_compat_ioctl,
2990#endif 3000#endif
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c
index a5ceff287a28..9cbf3154d243 100644
--- a/drivers/ieee1394/sbp2.c
+++ b/drivers/ieee1394/sbp2.c
@@ -186,6 +186,11 @@ MODULE_PARM_DESC(exclusive_login, "Exclusive login to sbp2 device "
186 * - delay inquiry 186 * - delay inquiry
187 * Wait extra SBP2_INQUIRY_DELAY seconds after login before SCSI inquiry. 187 * Wait extra SBP2_INQUIRY_DELAY seconds after login before SCSI inquiry.
188 * 188 *
189 * - power condition
190 * Set the power condition field in the START STOP UNIT commands sent by
191 * sd_mod on suspend, resume, and shutdown (if manage_start_stop is on).
192 * Some disks need this to spin down or to resume properly.
193 *
189 * - override internal blacklist 194 * - override internal blacklist
190 * Instead of adding to the built-in blacklist, use only the workarounds 195 * Instead of adding to the built-in blacklist, use only the workarounds
191 * specified in the module load parameter. 196 * specified in the module load parameter.
@@ -199,6 +204,8 @@ MODULE_PARM_DESC(workarounds, "Work around device bugs (default = 0"
199 ", skip mode page 8 = " __stringify(SBP2_WORKAROUND_MODE_SENSE_8) 204 ", skip mode page 8 = " __stringify(SBP2_WORKAROUND_MODE_SENSE_8)
200 ", fix capacity = " __stringify(SBP2_WORKAROUND_FIX_CAPACITY) 205 ", fix capacity = " __stringify(SBP2_WORKAROUND_FIX_CAPACITY)
201 ", delay inquiry = " __stringify(SBP2_WORKAROUND_DELAY_INQUIRY) 206 ", delay inquiry = " __stringify(SBP2_WORKAROUND_DELAY_INQUIRY)
207 ", set power condition in start stop unit = "
208 __stringify(SBP2_WORKAROUND_POWER_CONDITION)
202 ", override internal blacklist = " __stringify(SBP2_WORKAROUND_OVERRIDE) 209 ", override internal blacklist = " __stringify(SBP2_WORKAROUND_OVERRIDE)
203 ", or a combination)"); 210 ", or a combination)");
204 211
@@ -359,18 +366,25 @@ static const struct {
359 .firmware_revision = 0x002800, 366 .firmware_revision = 0x002800,
360 .model_id = 0x001010, 367 .model_id = 0x001010,
361 .workarounds = SBP2_WORKAROUND_INQUIRY_36 | 368 .workarounds = SBP2_WORKAROUND_INQUIRY_36 |
362 SBP2_WORKAROUND_MODE_SENSE_8, 369 SBP2_WORKAROUND_MODE_SENSE_8 |
370 SBP2_WORKAROUND_POWER_CONDITION,
363 }, 371 },
364 /* DViCO Momobay FX-3A with TSB42AA9A bridge */ { 372 /* DViCO Momobay FX-3A with TSB42AA9A bridge */ {
365 .firmware_revision = 0x002800, 373 .firmware_revision = 0x002800,
366 .model_id = 0x000000, 374 .model_id = 0x000000,
367 .workarounds = SBP2_WORKAROUND_DELAY_INQUIRY, 375 .workarounds = SBP2_WORKAROUND_DELAY_INQUIRY |
376 SBP2_WORKAROUND_POWER_CONDITION,
368 }, 377 },
369 /* Initio bridges, actually only needed for some older ones */ { 378 /* Initio bridges, actually only needed for some older ones */ {
370 .firmware_revision = 0x000200, 379 .firmware_revision = 0x000200,
371 .model_id = SBP2_ROM_VALUE_WILDCARD, 380 .model_id = SBP2_ROM_VALUE_WILDCARD,
372 .workarounds = SBP2_WORKAROUND_INQUIRY_36, 381 .workarounds = SBP2_WORKAROUND_INQUIRY_36,
373 }, 382 },
383 /* PL-3507 bridge with Prolific firmware */ {
384 .firmware_revision = 0x012800,
385 .model_id = SBP2_ROM_VALUE_WILDCARD,
386 .workarounds = SBP2_WORKAROUND_POWER_CONDITION,
387 },
374 /* Symbios bridge */ { 388 /* Symbios bridge */ {
375 .firmware_revision = 0xa0b800, 389 .firmware_revision = 0xa0b800,
376 .model_id = SBP2_ROM_VALUE_WILDCARD, 390 .model_id = SBP2_ROM_VALUE_WILDCARD,
@@ -1995,6 +2009,8 @@ static int sbp2scsi_slave_configure(struct scsi_device *sdev)
1995 2009
1996 sdev->use_10_for_rw = 1; 2010 sdev->use_10_for_rw = 1;
1997 2011
2012 if (sbp2_exclusive_login)
2013 sdev->manage_start_stop = 1;
1998 if (sdev->type == TYPE_ROM) 2014 if (sdev->type == TYPE_ROM)
1999 sdev->use_10_for_ms = 1; 2015 sdev->use_10_for_ms = 1;
2000 if (sdev->type == TYPE_DISK && 2016 if (sdev->type == TYPE_DISK &&
@@ -2002,6 +2018,8 @@ static int sbp2scsi_slave_configure(struct scsi_device *sdev)
2002 sdev->skip_ms_page_8 = 1; 2018 sdev->skip_ms_page_8 = 1;
2003 if (lu->workarounds & SBP2_WORKAROUND_FIX_CAPACITY) 2019 if (lu->workarounds & SBP2_WORKAROUND_FIX_CAPACITY)
2004 sdev->fix_capacity = 1; 2020 sdev->fix_capacity = 1;
2021 if (lu->workarounds & SBP2_WORKAROUND_POWER_CONDITION)
2022 sdev->start_stop_pwr_cond = 1;
2005 if (lu->workarounds & SBP2_WORKAROUND_128K_MAX_TRANS) 2023 if (lu->workarounds & SBP2_WORKAROUND_128K_MAX_TRANS)
2006 blk_queue_max_sectors(sdev->request_queue, 128 * 1024 / 512); 2024 blk_queue_max_sectors(sdev->request_queue, 128 * 1024 / 512);
2007 return 0; 2025 return 0;
diff --git a/drivers/ieee1394/sbp2.h b/drivers/ieee1394/sbp2.h
index 80d8e097b065..875428bc8d29 100644
--- a/drivers/ieee1394/sbp2.h
+++ b/drivers/ieee1394/sbp2.h
@@ -345,6 +345,7 @@ enum sbp2lu_state_types {
345#define SBP2_WORKAROUND_FIX_CAPACITY 0x8 345#define SBP2_WORKAROUND_FIX_CAPACITY 0x8
346#define SBP2_WORKAROUND_DELAY_INQUIRY 0x10 346#define SBP2_WORKAROUND_DELAY_INQUIRY 0x10
347#define SBP2_INQUIRY_DELAY 12 347#define SBP2_INQUIRY_DELAY 12
348#define SBP2_WORKAROUND_POWER_CONDITION 0x20
348#define SBP2_WORKAROUND_OVERRIDE 0x100 349#define SBP2_WORKAROUND_OVERRIDE 0x100
349 350
350#endif /* SBP2_H */ 351#endif /* SBP2_H */
diff --git a/drivers/ieee1394/video1394.c b/drivers/ieee1394/video1394.c
index e24772d336e1..069b9f6bf16d 100644
--- a/drivers/ieee1394/video1394.c
+++ b/drivers/ieee1394/video1394.c
@@ -1503,6 +1503,8 @@ static int __init video1394_init_module (void)
1503{ 1503{
1504 int ret; 1504 int ret;
1505 1505
1506 hpsb_init_highlevel(&video1394_highlevel);
1507
1506 cdev_init(&video1394_cdev, &video1394_fops); 1508 cdev_init(&video1394_cdev, &video1394_fops);
1507 video1394_cdev.owner = THIS_MODULE; 1509 video1394_cdev.owner = THIS_MODULE;
1508 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16); 1510 ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
diff --git a/drivers/infiniband/hw/ipath/ipath_verbs.c b/drivers/infiniband/hw/ipath/ipath_verbs.c
index 9e23ab0b51a1..55c718828826 100644
--- a/drivers/infiniband/hw/ipath/ipath_verbs.c
+++ b/drivers/infiniband/hw/ipath/ipath_verbs.c
@@ -35,6 +35,7 @@
35#include <rdma/ib_user_verbs.h> 35#include <rdma/ib_user_verbs.h>
36#include <linux/io.h> 36#include <linux/io.h>
37#include <linux/utsname.h> 37#include <linux/utsname.h>
38#include <linux/rculist.h>
38 39
39#include "ipath_kernel.h" 40#include "ipath_kernel.h"
40#include "ipath_verbs.h" 41#include "ipath_verbs.h"
diff --git a/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c b/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c
index 9e5abf9c309d..d73e32232879 100644
--- a/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c
+++ b/drivers/infiniband/hw/ipath/ipath_verbs_mcast.c
@@ -31,8 +31,7 @@
31 * SOFTWARE. 31 * SOFTWARE.
32 */ 32 */
33 33
34#include <linux/list.h> 34#include <linux/rculist.h>
35#include <linux/rcupdate.h>
36 35
37#include "ipath_verbs.h" 36#include "ipath_verbs.h"
38 37
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c
index 2e554a4ab337..95dfda52b4f9 100644
--- a/drivers/lguest/x86/core.c
+++ b/drivers/lguest/x86/core.c
@@ -478,7 +478,7 @@ void __init lguest_arch_host_init(void)
478 cpu_had_pge = 1; 478 cpu_had_pge = 1;
479 /* adjust_pge is a helper function which sets or unsets the PGE 479 /* adjust_pge is a helper function which sets or unsets the PGE
480 * bit on its CPU, depending on the argument (0 == unset). */ 480 * bit on its CPU, depending on the argument (0 == unset). */
481 on_each_cpu(adjust_pge, (void *)0, 0, 1); 481 on_each_cpu(adjust_pge, (void *)0, 1);
482 /* Turn off the feature in the global feature set. */ 482 /* Turn off the feature in the global feature set. */
483 clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability); 483 clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
484 } 484 }
@@ -493,7 +493,7 @@ void __exit lguest_arch_host_fini(void)
493 if (cpu_had_pge) { 493 if (cpu_had_pge) {
494 set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability); 494 set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
495 /* adjust_pge's argument "1" means set PGE. */ 495 /* adjust_pge's argument "1" means set PGE. */
496 on_each_cpu(adjust_pge, (void *)1, 0, 1); 496 on_each_cpu(adjust_pge, (void *)1, 1);
497 } 497 }
498 put_online_cpus(); 498 put_online_cpus();
499} 499}
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 17bc87a43ff4..d2fbc2964523 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -258,13 +258,6 @@ config MTD_ALCHEMY
258 help 258 help
259 Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards 259 Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
260 260
261config MTD_MTX1
262 tristate "4G Systems MTX-1 Flash device"
263 depends on MIPS_MTX1 && MTD_CFI
264 help
265 Flash memory access on 4G Systems MTX-1 Board. If you have one of
266 these boards and would like to use the flash chips on it, say 'Y'.
267
268config MTD_DILNETPC 261config MTD_DILNETPC
269 tristate "CFI Flash device mapped on DIL/Net PC" 262 tristate "CFI Flash device mapped on DIL/Net PC"
270 depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT 263 depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 957fb5f70f5e..c6ce8673dab2 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -65,5 +65,4 @@ obj-$(CONFIG_MTD_DMV182) += dmv182.o
65obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o 65obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
66obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o 66obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
67obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o 67obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
68obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
69obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o 68obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
diff --git a/drivers/mtd/maps/mtx-1_flash.c b/drivers/mtd/maps/mtx-1_flash.c
deleted file mode 100644
index 2a8fde9b92f0..000000000000
--- a/drivers/mtd/maps/mtx-1_flash.c
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * Flash memory access on 4G Systems MTX-1 boards
3 *
4 * $Id: mtx-1_flash.c,v 1.2 2005/11/07 11:14:27 gleixner Exp $
5 *
6 * (C) 2005 Bruno Randolf <bruno.randolf@4g-systems.biz>
7 * (C) 2005 Joern Engel <joern@wohnheim.fh-wedel.de>
8 *
9 */
10
11#include <linux/module.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/map.h>
18#include <linux/mtd/partitions.h>
19
20#include <asm/io.h>
21
22static struct map_info mtx1_map = {
23 .name = "MTX-1 flash",
24 .bankwidth = 4,
25 .size = 0x2000000,
26 .phys = 0x1E000000,
27};
28
29static struct mtd_partition mtx1_partitions[] = {
30 {
31 .name = "filesystem",
32 .size = 0x01C00000,
33 .offset = 0,
34 },{
35 .name = "yamon",
36 .size = 0x00100000,
37 .offset = MTDPART_OFS_APPEND,
38 .mask_flags = MTD_WRITEABLE,
39 },{
40 .name = "kernel",
41 .size = 0x002c0000,
42 .offset = MTDPART_OFS_APPEND,
43 },{
44 .name = "yamon env",
45 .size = 0x00040000,
46 .offset = MTDPART_OFS_APPEND,
47 }
48};
49
50static struct mtd_info *mtx1_mtd;
51
52int __init mtx1_mtd_init(void)
53{
54 int ret = -ENXIO;
55
56 simple_map_init(&mtx1_map);
57
58 mtx1_map.virt = ioremap(mtx1_map.phys, mtx1_map.size);
59 if (!mtx1_map.virt)
60 return -EIO;
61
62 mtx1_mtd = do_map_probe("cfi_probe", &mtx1_map);
63 if (!mtx1_mtd)
64 goto err;
65
66 mtx1_mtd->owner = THIS_MODULE;
67
68 ret = add_mtd_partitions(mtx1_mtd, mtx1_partitions,
69 ARRAY_SIZE(mtx1_partitions));
70 if (ret)
71 goto err;
72
73 return 0;
74
75err:
76 iounmap(mtx1_map.virt);
77 return ret;
78}
79
80static void __exit mtx1_mtd_cleanup(void)
81{
82 if (mtx1_mtd) {
83 del_mtd_partitions(mtx1_mtd);
84 map_destroy(mtx1_mtd);
85 }
86 if (mtx1_map.virt)
87 iounmap(mtx1_map.virt);
88}
89
90module_init(mtx1_mtd_init);
91module_exit(mtx1_mtd_cleanup);
92
93MODULE_AUTHOR("Bruno Randolf <bruno.randolf@4g-systems.biz>");
94MODULE_DESCRIPTION("MTX-1 flash map");
95MODULE_LICENSE("GPL");
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index c36a03ae9bfb..860d75d81f82 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -20,7 +20,7 @@
20#include <linux/errno.h> 20#include <linux/errno.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/string.h> 22#include <linux/string.h>
23#include <linux/list.h> 23#include <linux/rculist.h>
24#include <linux/notifier.h> 24#include <linux/notifier.h>
25#include <linux/netdevice.h> 25#include <linux/netdevice.h>
26#include <linux/etherdevice.h> 26#include <linux/etherdevice.h>
diff --git a/drivers/scsi/a100u2w.c b/drivers/scsi/a100u2w.c
index ced3eebe252c..84bb61628372 100644
--- a/drivers/scsi/a100u2w.c
+++ b/drivers/scsi/a100u2w.c
@@ -389,7 +389,7 @@ static u8 orc_load_firmware(struct orc_host * host)
389 389
390 outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Enable SRAM programming */ 390 outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Enable SRAM programming */
391 data32_ptr = (u8 *) & data32; 391 data32_ptr = (u8 *) & data32;
392 data32 = 0; /* Initial FW address to 0 */ 392 data32 = cpu_to_le32(0); /* Initial FW address to 0 */
393 outw(0x0010, host->base + ORC_EBIOSADR0); 393 outw(0x0010, host->base + ORC_EBIOSADR0);
394 *data32_ptr = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 394 *data32_ptr = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
395 outw(0x0011, host->base + ORC_EBIOSADR0); 395 outw(0x0011, host->base + ORC_EBIOSADR0);
@@ -397,18 +397,19 @@ static u8 orc_load_firmware(struct orc_host * host)
397 outw(0x0012, host->base + ORC_EBIOSADR0); 397 outw(0x0012, host->base + ORC_EBIOSADR0);
398 *(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 398 *(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
399 outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2); 399 outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2);
400 outl(data32, host->base + ORC_FWBASEADR); /* Write FW address */ 400 outl(le32_to_cpu(data32), host->base + ORC_FWBASEADR); /* Write FW address */
401 401
402 /* Copy the code from the BIOS to the SRAM */ 402 /* Copy the code from the BIOS to the SRAM */
403 403
404 bios_addr = (u16) data32; /* FW code locate at BIOS address + ? */ 404 udelay(500); /* Required on Sun Ultra 5 ... 350 -> failures */
405 bios_addr = (u16) le32_to_cpu(data32); /* FW code locate at BIOS address + ? */
405 for (i = 0, data32_ptr = (u8 *) & data32; /* Download the code */ 406 for (i = 0, data32_ptr = (u8 *) & data32; /* Download the code */
406 i < 0x1000; /* Firmware code size = 4K */ 407 i < 0x1000; /* Firmware code size = 4K */
407 i++, bios_addr++) { 408 i++, bios_addr++) {
408 outw(bios_addr, host->base + ORC_EBIOSADR0); 409 outw(bios_addr, host->base + ORC_EBIOSADR0);
409 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 410 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
410 if ((i % 4) == 3) { 411 if ((i % 4) == 3) {
411 outl(data32, host->base + ORC_RISCRAM); /* Write every 4 bytes */ 412 outl(le32_to_cpu(data32), host->base + ORC_RISCRAM); /* Write every 4 bytes */
412 data32_ptr = (u8 *) & data32; 413 data32_ptr = (u8 *) & data32;
413 } 414 }
414 } 415 }
@@ -423,7 +424,7 @@ static u8 orc_load_firmware(struct orc_host * host)
423 outw(bios_addr, host->base + ORC_EBIOSADR0); 424 outw(bios_addr, host->base + ORC_EBIOSADR0);
424 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 425 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
425 if ((i % 4) == 3) { 426 if ((i % 4) == 3) {
426 if (inl(host->base + ORC_RISCRAM) != data32) { 427 if (inl(host->base + ORC_RISCRAM) != le32_to_cpu(data32)) {
427 outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */ 428 outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */
428 outb(data, host->base + ORC_GCFG); /*Disable EEPROM programming */ 429 outb(data, host->base + ORC_GCFG); /*Disable EEPROM programming */
429 return 0; 430 return 0;
@@ -459,8 +460,8 @@ static void setup_SCBs(struct orc_host * host)
459 460
460 for (i = 0; i < ORC_MAXQUEUE; i++) { 461 for (i = 0; i < ORC_MAXQUEUE; i++) {
461 escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i)); 462 escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i));
462 scb->sg_addr = (u32) escb_phys; 463 scb->sg_addr = cpu_to_le32((u32) escb_phys);
463 scb->sense_addr = (u32) escb_phys; 464 scb->sense_addr = cpu_to_le32((u32) escb_phys);
464 scb->escb = escb; 465 scb->escb = escb;
465 scb->scbidx = i; 466 scb->scbidx = i;
466 scb++; 467 scb++;
@@ -642,8 +643,8 @@ static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsig
642 scb->link = 0xFF; 643 scb->link = 0xFF;
643 scb->reserved0 = 0; 644 scb->reserved0 = 0;
644 scb->reserved1 = 0; 645 scb->reserved1 = 0;
645 scb->xferlen = 0; 646 scb->xferlen = cpu_to_le32(0);
646 scb->sg_len = 0; 647 scb->sg_len = cpu_to_le32(0);
647 648
648 escb->srb = NULL; 649 escb->srb = NULL;
649 escb->srb = cmd; 650 escb->srb = cmd;
@@ -839,7 +840,7 @@ static irqreturn_t orc_interrupt(struct orc_host * host)
839 * Build a host adapter control block from the SCSI mid layer command 840 * Build a host adapter control block from the SCSI mid layer command
840 */ 841 */
841 842
842static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd) 843static int inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd)
843{ /* Create corresponding SCB */ 844{ /* Create corresponding SCB */
844 struct scatterlist *sg; 845 struct scatterlist *sg;
845 struct orc_sgent *sgent; /* Pointer to SG list */ 846 struct orc_sgent *sgent; /* Pointer to SG list */
@@ -858,28 +859,30 @@ static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, stru
858 scb->lun = cmd->device->lun; 859 scb->lun = cmd->device->lun;
859 scb->reserved0 = 0; 860 scb->reserved0 = 0;
860 scb->reserved1 = 0; 861 scb->reserved1 = 0;
861 scb->sg_len = 0; 862 scb->sg_len = cpu_to_le32(0);
862 863
863 scb->xferlen = (u32) scsi_bufflen(cmd); 864 scb->xferlen = cpu_to_le32((u32) scsi_bufflen(cmd));
864 sgent = (struct orc_sgent *) & escb->sglist[0]; 865 sgent = (struct orc_sgent *) & escb->sglist[0];
865 866
866 count_sg = scsi_dma_map(cmd); 867 count_sg = scsi_dma_map(cmd);
867 BUG_ON(count_sg < 0); 868 if (count_sg < 0)
869 return count_sg;
870 BUG_ON(count_sg > TOTAL_SG_ENTRY);
868 871
869 /* Build the scatter gather lists */ 872 /* Build the scatter gather lists */
870 if (count_sg) { 873 if (count_sg) {
871 scb->sg_len = (u32) (count_sg * 8); 874 scb->sg_len = cpu_to_le32((u32) (count_sg * 8));
872 scsi_for_each_sg(cmd, sg, count_sg, i) { 875 scsi_for_each_sg(cmd, sg, count_sg, i) {
873 sgent->base = (u32) sg_dma_address(sg); 876 sgent->base = cpu_to_le32((u32) sg_dma_address(sg));
874 sgent->length = (u32) sg_dma_len(sg); 877 sgent->length = cpu_to_le32((u32) sg_dma_len(sg));
875 sgent++; 878 sgent++;
876 } 879 }
877 } else { 880 } else {
878 scb->sg_len = 0; 881 scb->sg_len = cpu_to_le32(0);
879 sgent->base = 0; 882 sgent->base = cpu_to_le32(0);
880 sgent->length = 0; 883 sgent->length = cpu_to_le32(0);
881 } 884 }
882 scb->sg_addr = (u32) scb->sense_addr; 885 scb->sg_addr = (u32) scb->sense_addr; /* sense_addr is already little endian */
883 scb->hastat = 0; 886 scb->hastat = 0;
884 scb->tastat = 0; 887 scb->tastat = 0;
885 scb->link = 0xFF; 888 scb->link = 0xFF;
@@ -896,6 +899,7 @@ static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, stru
896 scb->tag_msg = 0; /* No tag support */ 899 scb->tag_msg = 0; /* No tag support */
897 } 900 }
898 memcpy(scb->cdb, cmd->cmnd, scb->cdb_len); 901 memcpy(scb->cdb, cmd->cmnd, scb->cdb_len);
902 return 0;
899} 903}
900 904
901/** 905/**
@@ -919,7 +923,10 @@ static int inia100_queue(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd
919 if ((scb = orc_alloc_scb(host)) == NULL) 923 if ((scb = orc_alloc_scb(host)) == NULL)
920 return SCSI_MLQUEUE_HOST_BUSY; 924 return SCSI_MLQUEUE_HOST_BUSY;
921 925
922 inia100_build_scb(host, scb, cmd); 926 if (inia100_build_scb(host, scb, cmd)) {
927 orc_release_scb(host, scb);
928 return SCSI_MLQUEUE_HOST_BUSY;
929 }
923 orc_exec_scb(host, scb); /* Start execute SCB */ 930 orc_exec_scb(host, scb); /* Start execute SCB */
924 return 0; 931 return 0;
925} 932}
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 01cefbb2d539..d53312c42547 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -1124,6 +1124,8 @@ sd_spinup_disk(struct scsi_disk *sdkp)
1124 cmd[1] = 1; /* Return immediately */ 1124 cmd[1] = 1; /* Return immediately */
1125 memset((void *) &cmd[2], 0, 8); 1125 memset((void *) &cmd[2], 0, 8);
1126 cmd[4] = 1; /* Start spin cycle */ 1126 cmd[4] = 1; /* Start spin cycle */
1127 if (sdkp->device->start_stop_pwr_cond)
1128 cmd[4] |= 1 << 4;
1127 scsi_execute_req(sdkp->device, cmd, DMA_NONE, 1129 scsi_execute_req(sdkp->device, cmd, DMA_NONE,
1128 NULL, 0, &sshdr, 1130 NULL, 0, &sshdr,
1129 SD_TIMEOUT, SD_MAX_RETRIES); 1131 SD_TIMEOUT, SD_MAX_RETRIES);
@@ -1790,6 +1792,9 @@ static int sd_start_stop_device(struct scsi_disk *sdkp, int start)
1790 if (start) 1792 if (start)
1791 cmd[4] |= 1; /* START */ 1793 cmd[4] |= 1; /* START */
1792 1794
1795 if (sdp->start_stop_pwr_cond)
1796 cmd[4] |= start ? 1 << 4 : 3 << 4; /* Active or Standby */
1797
1793 if (!scsi_device_online(sdp)) 1798 if (!scsi_device_online(sdp))
1794 return -ENODEV; 1799 return -ENODEV;
1795 1800
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index c1ba0db48501..770824458d45 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -55,7 +55,7 @@ static void __booke_wdt_ping(void *data)
55 55
56static void booke_wdt_ping(void) 56static void booke_wdt_ping(void)
57{ 57{
58 on_each_cpu(__booke_wdt_ping, NULL, 0, 0); 58 on_each_cpu(__booke_wdt_ping, NULL, 0);
59} 59}
60 60
61static void __booke_wdt_enable(void *data) 61static void __booke_wdt_enable(void *data)
@@ -131,7 +131,7 @@ static int booke_wdt_open(struct inode *inode, struct file *file)
131 spin_lock(&booke_wdt_lock); 131 spin_lock(&booke_wdt_lock);
132 if (booke_wdt_enabled == 0) { 132 if (booke_wdt_enabled == 0) {
133 booke_wdt_enabled = 1; 133 booke_wdt_enabled = 1;
134 on_each_cpu(__booke_wdt_enable, NULL, 0, 0); 134 on_each_cpu(__booke_wdt_enable, NULL, 0);
135 printk(KERN_INFO "PowerPC Book-E Watchdog Timer Enabled " 135 printk(KERN_INFO "PowerPC Book-E Watchdog Timer Enabled "
136 "(wdt_period=%d)\n", booke_wdt_period); 136 "(wdt_period=%d)\n", booke_wdt_period);
137 } 137 }
@@ -177,7 +177,7 @@ static int __init booke_wdt_init(void)
177 if (booke_wdt_enabled == 1) { 177 if (booke_wdt_enabled == 1) {
178 printk(KERN_INFO "PowerPC Book-E Watchdog Timer Enabled " 178 printk(KERN_INFO "PowerPC Book-E Watchdog Timer Enabled "
179 "(wdt_period=%d)\n", booke_wdt_period); 179 "(wdt_period=%d)\n", booke_wdt_period);
180 on_each_cpu(__booke_wdt_enable, NULL, 0, 0); 180 on_each_cpu(__booke_wdt_enable, NULL, 0);
181 } 181 }
182 spin_unlock(&booke_wdt_lock); 182 spin_unlock(&booke_wdt_lock);
183 183
diff --git a/fs/buffer.c b/fs/buffer.c
index 5fa1512cd9a2..d48caee12e2a 100644
--- a/fs/buffer.c
+++ b/fs/buffer.c
@@ -1464,7 +1464,7 @@ static void invalidate_bh_lru(void *arg)
1464 1464
1465void invalidate_bh_lrus(void) 1465void invalidate_bh_lrus(void)
1466{ 1466{
1467 on_each_cpu(invalidate_bh_lru, NULL, 1, 1); 1467 on_each_cpu(invalidate_bh_lru, NULL, 1);
1468} 1468}
1469EXPORT_SYMBOL_GPL(invalidate_bh_lrus); 1469EXPORT_SYMBOL_GPL(invalidate_bh_lrus);
1470 1470
diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h
index 286e1d844f63..544c69af8168 100644
--- a/include/asm-alpha/smp.h
+++ b/include/asm-alpha/smp.h
@@ -47,12 +47,13 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
47extern int smp_num_cpus; 47extern int smp_num_cpus;
48#define cpu_possible_map cpu_present_map 48#define cpu_possible_map cpu_present_map
49 49
50int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu); 50extern void arch_send_call_function_single_ipi(int cpu);
51extern void arch_send_call_function_ipi(cpumask_t mask);
51 52
52#else /* CONFIG_SMP */ 53#else /* CONFIG_SMP */
53 54
54#define hard_smp_processor_id() 0 55#define hard_smp_processor_id() 0
55#define smp_call_function_on_cpu(func,info,retry,wait,cpu) ({ 0; }) 56#define smp_call_function_on_cpu(func,info,wait,cpu) ({ 0; })
56 57
57#endif /* CONFIG_SMP */ 58#endif /* CONFIG_SMP */
58 59
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index af99636db400..7fffa2404b8e 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -101,6 +101,9 @@ extern void platform_cpu_die(unsigned int cpu);
101extern int platform_cpu_kill(unsigned int cpu); 101extern int platform_cpu_kill(unsigned int cpu);
102extern void platform_cpu_enable(unsigned int cpu); 102extern void platform_cpu_enable(unsigned int cpu);
103 103
104extern void arch_send_call_function_single_ipi(int cpu);
105extern void arch_send_call_function_ipi(cpumask_t mask);
106
104/* 107/*
105 * Local timer interrupt handling function (can be IPI'ed). 108 * Local timer interrupt handling function (can be IPI'ed).
106 */ 109 */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 4fce3db2cecc..ef87f889ef62 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -195,7 +195,6 @@ static inline int pmd_none_or_clear_bad(pmd_t *pmd)
195 } 195 }
196 return 0; 196 return 0;
197} 197}
198#endif /* CONFIG_MMU */
199 198
200static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm, 199static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
201 unsigned long addr, 200 unsigned long addr,
@@ -253,6 +252,7 @@ static inline void ptep_modify_prot_commit(struct mm_struct *mm,
253 __ptep_modify_prot_commit(mm, addr, ptep, pte); 252 __ptep_modify_prot_commit(mm, addr, ptep, pte);
254} 253}
255#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 254#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
255#endif /* CONFIG_MMU */
256 256
257/* 257/*
258 * A facility to provide lazy MMU batching. This allows PTE updates and 258 * A facility to provide lazy MMU batching. This allows PTE updates and
diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h
index ec5f355fb7e3..27731e032ee9 100644
--- a/include/asm-ia64/smp.h
+++ b/include/asm-ia64/smp.h
@@ -38,9 +38,6 @@ ia64_get_lid (void)
38 return lid.f.id << 8 | lid.f.eid; 38 return lid.f.id << 8 | lid.f.eid;
39} 39}
40 40
41extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
42 void *info, int wait);
43
44#define hard_smp_processor_id() ia64_get_lid() 41#define hard_smp_processor_id() ia64_get_lid()
45 42
46#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
@@ -124,11 +121,12 @@ extern void __init init_smp_config (void);
124extern void smp_do_timer (struct pt_regs *regs); 121extern void smp_do_timer (struct pt_regs *regs);
125 122
126extern void smp_send_reschedule (int cpu); 123extern void smp_send_reschedule (int cpu);
127extern void lock_ipi_calllock(void);
128extern void unlock_ipi_calllock(void);
129extern void identify_siblings (struct cpuinfo_ia64 *); 124extern void identify_siblings (struct cpuinfo_ia64 *);
130extern int is_multithreading_enabled(void); 125extern int is_multithreading_enabled(void);
131 126
127extern void arch_send_call_function_single_ipi(int cpu);
128extern void arch_send_call_function_ipi(cpumask_t mask);
129
132#else /* CONFIG_SMP */ 130#else /* CONFIG_SMP */
133 131
134#define cpu_logical_id(i) 0 132#define cpu_logical_id(i) 0
diff --git a/include/asm-m32r/smp.h b/include/asm-m32r/smp.h
index 078e1a51a042..c5dd66916692 100644
--- a/include/asm-m32r/smp.h
+++ b/include/asm-m32r/smp.h
@@ -89,6 +89,9 @@ static __inline__ unsigned int num_booting_cpus(void)
89extern void smp_send_timer(void); 89extern void smp_send_timer(void);
90extern unsigned long send_IPI_mask_phys(cpumask_t, int, int); 90extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
91 91
92extern void arch_send_call_function_single_ipi(int cpu);
93extern void arch_send_call_function_ipi(cpumask_t mask);
94
92#endif /* not __ASSEMBLY__ */ 95#endif /* not __ASSEMBLY__ */
93 96
94#define NO_PROC_ID (0xff) /* No processor magic marker */ 97#define NO_PROC_ID (0xff) /* No processor magic marker */
@@ -104,6 +107,7 @@ extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
104#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0) 107#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
105#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0) 108#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
106#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0) 109#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
110#define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
107 111
108#define IPI_SHIFT (0) 112#define IPI_SHIFT (0)
109#define NR_IPIS (8) 113#define NR_IPIS (8)
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h
index 9d8cfbb5e796..8e9ac313ca3b 100644
--- a/include/asm-mips/barrier.h
+++ b/include/asm-mips/barrier.h
@@ -92,11 +92,25 @@
92#define fast_wmb() __sync() 92#define fast_wmb() __sync()
93#define fast_rmb() __sync() 93#define fast_rmb() __sync()
94#define fast_mb() __sync() 94#define fast_mb() __sync()
95#ifdef CONFIG_SGI_IP28
96#define fast_iob() \
97 __asm__ __volatile__( \
98 ".set push\n\t" \
99 ".set noreorder\n\t" \
100 "lw $0,%0\n\t" \
101 "sync\n\t" \
102 "lw $0,%0\n\t" \
103 ".set pop" \
104 : /* no output */ \
105 : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
106 : "memory")
107#else
95#define fast_iob() \ 108#define fast_iob() \
96 do { \ 109 do { \
97 __sync(); \ 110 __sync(); \
98 __fast_iob(); \ 111 __fast_iob(); \
99 } while (0) 112 } while (0)
113#endif
100 114
101#ifdef CONFIG_CPU_HAS_WB 115#ifdef CONFIG_CPU_HAS_WB
102 116
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 642724734eba..9a7274ba6a0b 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
82 "2: b 1b \n" 82 "2: b 1b \n"
83 " .previous \n" 83 " .previous \n"
84 : "=&r" (temp), "=m" (*m) 84 : "=&r" (temp), "=m" (*m)
85 : "ir" (bit), "m" (*m), "r" (~0)); 85 : "i" (bit), "m" (*m), "r" (~0));
86#endif /* CONFIG_CPU_MIPSR2 */ 86#endif /* CONFIG_CPU_MIPSR2 */
87 } else if (cpu_has_llsc) { 87 } else if (cpu_has_llsc) {
88 __asm__ __volatile__( 88 __asm__ __volatile__(
@@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
147 "2: b 1b \n" 147 "2: b 1b \n"
148 " .previous \n" 148 " .previous \n"
149 : "=&r" (temp), "=m" (*m) 149 : "=&r" (temp), "=m" (*m)
150 : "ir" (bit), "m" (*m)); 150 : "i" (bit), "m" (*m));
151#endif /* CONFIG_CPU_MIPSR2 */ 151#endif /* CONFIG_CPU_MIPSR2 */
152 } else if (cpu_has_llsc) { 152 } else if (cpu_has_llsc) {
153 __asm__ __volatile__( 153 __asm__ __volatile__(
@@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr,
428 "2: b 1b \n" 428 "2: b 1b \n"
429 " .previous \n" 429 " .previous \n"
430 : "=&r" (temp), "=m" (*m), "=&r" (res) 430 : "=&r" (temp), "=m" (*m), "=&r" (res)
431 : "ri" (bit), "m" (*m) 431 : "i" (bit), "m" (*m)
432 : "memory"); 432 : "memory");
433#endif 433#endif
434 } else if (cpu_has_llsc) { 434 } else if (cpu_has_llsc) {
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index e031bdff9920..d39e143b4a3c 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -26,13 +26,6 @@
26#define MACH_UNKNOWN 0 /* whatever... */ 26#define MACH_UNKNOWN 0 /* whatever... */
27 27
28/* 28/*
29 * Valid machtype values for group JAZZ
30 */
31#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
32#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
33#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
34
35/*
36 * Valid machtype for group DEC 29 * Valid machtype for group DEC
37 */ 30 */
38#define MACH_DSUNKNOWN 0 31#define MACH_DSUNKNOWN 0
@@ -48,42 +41,6 @@
48#define MACH_DS5900 10 /* DECsystem 5900 */ 41#define MACH_DS5900 10 /* DECsystem 5900 */
49 42
50/* 43/*
51 * Valid machtype for group SNI_RM
52 */
53#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
54
55/*
56 * Valid machtype for group SGI
57 */
58#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
59#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
60#define MACH_SGI_IP28 2 /* Indigo2 Impact */
61#define MACH_SGI_IP32 3 /* O2 */
62#define MACH_SGI_IP30 4 /* Octane, Octane2 */
63
64/*
65 * Valid machtypes for group Toshiba
66 */
67#define MACH_PALLAS 0
68#define MACH_TOPAS 1
69#define MACH_JMR 2
70#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
71#define MACH_TOSHIBA_RBTX4927 4
72#define MACH_TOSHIBA_RBTX4937 5
73#define MACH_TOSHIBA_RBTX4938 6
74
75/*
76 * Valid machtype for group LASAT
77 */
78#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
79#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
80
81/*
82 * Valid machtype for group NEC EMMA2RH
83 */
84#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
85
86/*
87 * Valid machtype for group PMC-MSP 44 * Valid machtype for group PMC-MSP
88 */ 45 */
89#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */ 46#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac6f35b..229a786101d9 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -66,8 +66,10 @@
66#define PRID_IMP_RM7000 0x2700 66#define PRID_IMP_RM7000 0x2700
67#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */ 67#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
68#define PRID_IMP_RM9000 0x3400 68#define PRID_IMP_RM9000 0x3400
69#define PRID_IMP_LOONGSON1 0x4200
69#define PRID_IMP_R5432 0x5400 70#define PRID_IMP_R5432 0x5400
70#define PRID_IMP_R5500 0x5500 71#define PRID_IMP_R5500 0x5500
72#define PRID_IMP_LOONGSON2 0x6300
71 73
72#define PRID_IMP_UNKNOWN 0xff00 74#define PRID_IMP_UNKNOWN 0xff00
73 75
@@ -90,8 +92,6 @@
90#define PRID_IMP_24KE 0x9600 92#define PRID_IMP_24KE 0x9600
91#define PRID_IMP_74K 0x9700 93#define PRID_IMP_74K 0x9700
92#define PRID_IMP_1004K 0x9900 94#define PRID_IMP_1004K 0x9900
93#define PRID_IMP_LOONGSON1 0x4200
94#define PRID_IMP_LOONGSON2 0x6300
95 95
96/* 96/*
97 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE 97 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h
index 15fe8f881e60..56d22dc8803a 100644
--- a/include/asm-mips/dec/kn05.h
+++ b/include/asm-mips/dec/kn05.h
@@ -6,7 +6,7 @@
6 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC 6 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
7 * definitions. 7 * definitions.
8 * 8 *
9 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki 9 * Copyright (C) 2002, 2003, 2005, 2008 Maciej W. Rozycki
10 * 10 *
11 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
@@ -54,11 +54,11 @@
54 */ 54 */
55#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */ 55#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */
56#define KN4K_MB_INT_RTC (1<<1) /* RTC? */ 56#define KN4K_MB_INT_RTC (1<<1) /* RTC? */
57#define KN4K_MB_INT_MT (1<<3) /* ??? */ 57#define KN4K_MB_INT_MT (1<<3) /* I/O ASIC cascade */
58 58
59/* 59/*
60 * Bits for the MB control & status register. 60 * Bits for the MB control & status register.
61 * Set to 0x00bf8001 on my system by the ROM. 61 * Set to 0x00bf8001 for KN05 and to 0x003f8000 for KN04 by the firmware.
62 */ 62 */
63#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */ 63#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */
64#define KN4K_MB_CSR_F (1<<1) /* ??? */ 64#define KN4K_MB_CSR_F (1<<1) /* ??? */
@@ -69,7 +69,8 @@
69#define KN4K_MB_CSR_IM (1<<13) /* ??? */ 69#define KN4K_MB_CSR_IM (1<<13) /* ??? */
70#define KN4K_MB_CSR_NC (1<<14) /* ??? */ 70#define KN4K_MB_CSR_NC (1<<14) /* ??? */
71#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */ 71#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
72#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */ 72#define KN4K_MB_CSR_MSK (0x1f<<16) /* CPU Int[4:0] mask */
73#define KN4K_MB_CSR_FW (1<<21) /* ??? */ 73#define KN4K_MB_CSR_FW (1<<21) /* ??? */
74#define KN4K_MB_CSR_W (1<<31) /* ??? */
74 75
75#endif /* __ASM_MIPS_DEC_KN05_H */ 76#endif /* __ASM_MIPS_DEC_KN05_H */
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
deleted file mode 100644
index cc88aed23f0f..000000000000
--- a/include/asm-mips/inventory.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Miguel de Icaza
3 */
4#ifndef __ASM_INVENTORY_H
5#define __ASM_INVENTORY_H
6
7#include <linux/compiler.h>
8
9typedef struct inventory_s {
10 struct inventory_s *inv_next;
11 int inv_class;
12 int inv_type;
13 int inv_controller;
14 int inv_unit;
15 int inv_state;
16} inventory_t;
17
18extern int inventory_items;
19
20extern void add_to_inventory(int class, int type, int controller, int unit, int state);
21extern int dump_inventory_to_user(void __user *userbuf, int size);
22extern int __init init_inventory(void);
23
24#endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index f18d2816cbec..501a40b9f18d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -161,13 +161,6 @@ static inline void * isa_bus_to_virt(unsigned long address)
161#define bus_to_virt phys_to_virt 161#define bus_to_virt phys_to_virt
162 162
163/* 163/*
164 * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
165 * for the processor. This implies the assumption that there is only
166 * one of these busses.
167 */
168extern unsigned long isa_slot_offset;
169
170/*
171 * Change "struct page" to physical address. 164 * Change "struct page" to physical address.
172 */ 165 */
173#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) 166#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
@@ -528,16 +521,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
528} 521}
529 522
530/* 523/*
531 * ISA space is 'always mapped' on currently supported MIPS systems, no need
532 * to explicitly ioremap() it. The fact that the ISA IO space is mapped
533 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
534 * are physical addresses. The following constant pointer can be
535 * used as the IO-area pointer (it can be iounmapped as well, so the
536 * analogy with PCI is quite large):
537 */
538#define __ISA_IO_base ((char *)(isa_slot_offset))
539
540/*
541 * The caches on some architectures aren't dma-coherent and have need to 524 * The caches on some architectures aren't dma-coherent and have need to
542 * handle this in software. There are three types of operations that 525 * handle this in software. There are three types of operations that
543 * can be applied to dma buffers. 526 * can be applied to dma buffers.
diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h
index ea04d9262edc..caeba1e302a2 100644
--- a/include/asm-mips/lasat/lasat.h
+++ b/include/asm-mips/lasat/lasat.h
@@ -240,6 +240,8 @@ static inline void lasat_ndelay(unsigned int ns)
240 __delay(ns / lasat_ndelay_divider); 240 __delay(ns / lasat_ndelay_divider);
241} 241}
242 242
243#define IS_LASAT_200() (current_cpu_data.cputype == CPU_R5000)
244
243#endif /* !defined (_LANGUAGE_ASSEMBLY) */ 245#endif /* !defined (_LANGUAGE_ASSEMBLY) */
244 246
245#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef 247#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
diff --git a/include/asm-mips/mach-atlas/mc146818rtc.h b/include/asm-mips/mach-atlas/mc146818rtc.h
deleted file mode 100644
index 51d337e1bbd1..000000000000
--- a/include/asm-mips/mach-atlas/mc146818rtc.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * Copyright (C) 1999, 2000, 2005 MIPS Technologies, Inc.
3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
6 * Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
22#define __ASM_MACH_ATLAS_MC146818RTC_H
23
24#include <linux/types.h>
25
26#include <asm/addrspace.h>
27
28#include <asm/mips-boards/atlas.h>
29#include <asm/mips-boards/atlasint.h>
30
31#define ARCH_RTC_LOCATION
32
33#define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8)
34#define RTC_IO_EXTENT 0x100
35#define RTC_IOMAPPED 0
36#define RTC_IRQ ATLAS_INT_RTC
37
38static inline unsigned char CMOS_READ(unsigned long addr)
39{
40 volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
41 volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
42
43 *ireg = addr;
44 return *dreg;
45}
46
47static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
48{
49 volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
50 volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
51
52 *ireg = addr;
53 *dreg = data;
54}
55
56#define RTC_ALWAYS_BCD 0
57
58#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
59
60#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 612ae90dbcb8..1a515b8c870f 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -146,51 +146,6 @@ typedef volatile struct
146 ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) 146 ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
147 147
148/* 148/*
149 * SD controller macros
150 */
151
152/* Detect card. */
153#define mmc_card_inserted(_n_, _res_) \
154 do { \
155 BCSR * const bcsr = (BCSR *)0xAE000000; \
156 unsigned long mmc_wp, board_specific; \
157 if ((_n_)) { \
158 mmc_wp = BCSR_BOARD_SD1_WP; \
159 } else { \
160 mmc_wp = BCSR_BOARD_SD0_WP; \
161 } \
162 board_specific = au_readl((unsigned long)(&bcsr->specific)); \
163 if (!(board_specific & mmc_wp)) {/* low means card present */ \
164 *(int *)(_res_) = 1; \
165 } else { \
166 *(int *)(_res_) = 0; \
167 } \
168 } while (0)
169
170/*
171 * Apply power to card slot(s).
172 */
173#define mmc_power_on(_n_) \
174 do { \
175 BCSR * const bcsr = (BCSR *)0xAE000000; \
176 unsigned long mmc_pwr, mmc_wp, board_specific; \
177 if ((_n_)) { \
178 mmc_pwr = BCSR_BOARD_SD1_PWR; \
179 mmc_wp = BCSR_BOARD_SD1_WP; \
180 } else { \
181 mmc_pwr = BCSR_BOARD_SD0_PWR; \
182 mmc_wp = BCSR_BOARD_SD0_WP; \
183 } \
184 board_specific = au_readl((unsigned long)(&bcsr->specific)); \
185 if (!(board_specific & mmc_wp)) {/* low means card present */ \
186 board_specific |= mmc_pwr; \
187 au_writel(board_specific, (int)(&bcsr->specific)); \
188 au_sync(); \
189 } \
190 } while (0)
191
192
193/*
194 * NAND defines 149 * NAND defines
195 * 150 *
196 * Timing values as described in databook, * ns value stripped of the 151 * Timing values as described in databook, * ns value stripped of the
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-malta/cpu-feature-overrides.h
index 7f3e3f9bd23a..7f3e3f9bd23a 100644
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-malta/cpu-feature-overrides.h
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-malta/irq.h
index 9b9da26683c2..9b9da26683c2 100644
--- a/include/asm-mips/mach-mips/irq.h
+++ b/include/asm-mips/mach-malta/irq.h
diff --git a/include/asm-mips/mach-mips/kernel-entry-init.h b/include/asm-mips/mach-malta/kernel-entry-init.h
index 0b793e7bf67e..0b793e7bf67e 100644
--- a/include/asm-mips/mach-mips/kernel-entry-init.h
+++ b/include/asm-mips/mach-malta/kernel-entry-init.h
diff --git a/include/asm-mips/mach-mips/mach-gt64120.h b/include/asm-mips/mach-malta/mach-gt64120.h
index 0f863148f3b6..0f863148f3b6 100644
--- a/include/asm-mips/mach-mips/mach-gt64120.h
+++ b/include/asm-mips/mach-malta/mach-gt64120.h
diff --git a/include/asm-mips/mach-mips/mc146818rtc.h b/include/asm-mips/mach-malta/mc146818rtc.h
index ea612f37f614..ea612f37f614 100644
--- a/include/asm-mips/mach-mips/mc146818rtc.h
+++ b/include/asm-mips/mach-malta/mc146818rtc.h
diff --git a/include/asm-mips/mach-mips/war.h b/include/asm-mips/mach-malta/war.h
index 7c6931d5f45f..7c6931d5f45f 100644
--- a/include/asm-mips/mach-mips/war.h
+++ b/include/asm-mips/mach-malta/war.h
diff --git a/include/asm-mips/mach-jmr3927/ioremap.h b/include/asm-mips/mach-tx39xx/ioremap.h
index 29989ff10d66..93c6c04ffda3 100644
--- a/include/asm-mips/mach-jmr3927/ioremap.h
+++ b/include/asm-mips/mach-tx39xx/ioremap.h
@@ -1,13 +1,13 @@
1/* 1/*
2 * include/asm-mips/mach-jmr3927/ioremap.h 2 * include/asm-mips/mach-tx39xx/ioremap.h
3 * 3 *
4 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
8 */ 8 */
9#ifndef __ASM_MACH_JMR3927_IOREMAP_H 9#ifndef __ASM_MACH_TX39XX_IOREMAP_H
10#define __ASM_MACH_JMR3927_IOREMAP_H 10#define __ASM_MACH_TX39XX_IOREMAP_H
11 11
12#include <linux/types.h> 12#include <linux/types.h>
13 13
@@ -35,4 +35,4 @@ static inline int plat_iounmap(const volatile void __iomem *addr)
35 return (unsigned long)addr >= TXX9_DIRECTMAP_BASE; 35 return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
36} 36}
37 37
38#endif /* __ASM_MACH_JMR3927_IOREMAP_H */ 38#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-tx39xx/mangle-port.h
index 11bffcd1043b..ef0b502fd8b7 100644
--- a/include/asm-mips/mach-jmr3927/mangle-port.h
+++ b/include/asm-mips/mach-tx39xx/mangle-port.h
@@ -1,7 +1,12 @@
1#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H 1#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
2#define __ASM_MACH_JMR3927_MANGLE_PORT_H 2#define __ASM_MACH_TX39XX_MANGLE_PORT_H
3 3
4extern unsigned long __swizzle_addr_b(unsigned long port); 4#if defined(CONFIG_TOSHIBA_JMR3927)
5extern unsigned long (*__swizzle_addr_b)(unsigned long port);
6#define NEEDS_TXX9_SWIZZLE_ADDR_B
7#else
8#define __swizzle_addr_b(port) (port)
9#endif
5#define __swizzle_addr_w(port) (port) 10#define __swizzle_addr_w(port) (port)
6#define __swizzle_addr_l(port) (port) 11#define __swizzle_addr_l(port) (port)
7#define __swizzle_addr_q(port) (port) 12#define __swizzle_addr_q(port) (port)
@@ -15,4 +20,4 @@ extern unsigned long __swizzle_addr_b(unsigned long port);
15#define ioswabq(a, x) le64_to_cpu(x) 20#define ioswabq(a, x) le64_to_cpu(x)
16#define __mem_ioswabq(a, x) (x) 21#define __mem_ioswabq(a, x) (x)
17 22
18#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */ 23#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-jmr3927/war.h b/include/asm-mips/mach-tx39xx/war.h
index 1ff55fb3fbcb..433814616359 100644
--- a/include/asm-mips/mach-jmr3927/war.h
+++ b/include/asm-mips/mach-tx39xx/war.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */ 7 */
8#ifndef __ASM_MIPS_MACH_JMR3927_WAR_H 8#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
9#define __ASM_MIPS_MACH_JMR3927_WAR_H 9#define __ASM_MIPS_MACH_TX39XX_WAR_H
10 10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0 11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0 12#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -22,4 +22,4 @@
22#define R10000_LLSC_WAR 0 22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0 23#define MIPS34K_MISSED_ITLB_WAR 0
24 24
25#endif /* __ASM_MIPS_MACH_JMR3927_WAR_H */ 25#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
diff --git a/include/asm-mips/mach-vr41xx/irq.h b/include/asm-mips/mach-vr41xx/irq.h
index 848812296052..862058d3f81b 100644
--- a/include/asm-mips/mach-vr41xx/irq.h
+++ b/include/asm-mips/mach-vr41xx/irq.h
@@ -2,9 +2,6 @@
2#define __ASM_MACH_VR41XX_IRQ_H 2#define __ASM_MACH_VR41XX_IRQ_H
3 3
4#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */ 4#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
5#ifdef CONFIG_NEC_CMBVR4133
6#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
7#endif
8 5
9#include_next <irq.h> 6#include_next <irq.h>
10 7
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index 33407bee4e73..7f0b034dd9a5 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -27,12 +27,8 @@
27/* 27/*
28 * Display register base. 28 * Display register base.
29 */ 29 */
30#ifdef CONFIG_MIPS_SEAD
31#define ASCII_DISPLAY_POS_BASE 0x1f0005c0
32#else
33#define ASCII_DISPLAY_WORD_BASE 0x1f000410 30#define ASCII_DISPLAY_WORD_BASE 0x1f000410
34#define ASCII_DISPLAY_POS_BASE 0x1f000418 31#define ASCII_DISPLAY_POS_BASE 0x1f000418
35#endif
36 32
37 33
38/* 34/*
@@ -44,13 +40,8 @@
44/* 40/*
45 * Reset register. 41 * Reset register.
46 */ 42 */
47#ifdef CONFIG_MIPS_SEAD
48#define SOFTRES_REG 0x1e800050
49#define GORESET 0x4d
50#else
51#define SOFTRES_REG 0x1f000500 43#define SOFTRES_REG 0x1f000500
52#define GORESET 0x42 44#define GORESET 0x42
53#endif
54 45
55/* 46/*
56 * Revision register. 47 * Revision register.
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index c94d12d1f868..a6605a752469 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -1,26 +1,11 @@
1#ifndef _ASM_NAMEI_H 1#ifndef _ASM_NAMEI_H
2#define _ASM_NAMEI_H 2#define _ASM_NAMEI_H
3 3
4#include <linux/personality.h> 4/*
5#include <linux/stddef.h> 5 * This dummy routine maybe changed to something useful
6 * for /usr/gnemul/ emulation stuff.
7 */
6 8
7#define IRIX_EMUL "/usr/gnemul/irix/" 9#define __emul_prefix() NULL
8#define RISCOS_EMUL "/usr/gnemul/riscos/"
9
10static inline char *__emul_prefix(void)
11{
12 switch (current->personality) {
13 case PER_IRIX32:
14 case PER_IRIXN32:
15 case PER_IRIX64:
16 return IRIX_EMUL;
17
18 case PER_RISCOS:
19 return RISCOS_EMUL;
20
21 default:
22 return NULL;
23 }
24}
25 10
26#endif /* _ASM_NAMEI_H */ 11#endif /* _ASM_NAMEI_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 301ff2f28012..d3be83436070 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -172,4 +172,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
172 return channel ? 15 : 14; 172 return channel ? 15 : 14;
173} 173}
174 174
175extern int pci_probe_only;
176extern unsigned int pcibios_max_latency;
177
175#endif /* _ASM_PCI_H */ 178#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/prctl.h b/include/asm-mips/prctl.h
deleted file mode 100644
index 8121a9a75bfd..000000000000
--- a/include/asm-mips/prctl.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * IRIX prctl interface
3 *
4 * The IRIX kernel maps a page at PRDA_ADDRESS with the
5 * contents of prda and fills it the bits on prda_sys.
6 */
7
8#ifndef __PRCTL_H__
9#define __PRCTL_H__
10
11#define PRDA_ADDRESS 0x200000L
12#define PRDA ((struct prda *) PRDA_ADDRESS)
13
14struct prda_sys {
15 pid_t t_pid;
16 u32 t_hint;
17 u32 t_dlactseq;
18 u32 t_fpflags;
19 u32 t_prid; /* processor type, $prid CP0 register */
20 u32 t_dlendseq;
21 u64 t_unused1[5];
22 pid_t t_rpid;
23 s32 t_resched;
24 u32 t_unused[8];
25 u32 t_cpu; /* current/last cpu */
26
27 /* FIXME: The signal information, not supported by Linux now */
28 u32 t_flags; /* if true, then the sigprocmask is in userspace */
29 u32 t_sigprocmask [1]; /* the sigprocmask */
30};
31
32struct prda {
33 char fill [0xe00];
34 struct prda_sys prda_sys;
35};
36
37#define t_sys prda_sys
38
39ptrdiff_t prctl(int op, int v1, int v2);
40
41#endif
diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h
index 70009a902639..883f59bfa097 100644
--- a/include/asm-mips/setup.h
+++ b/include/asm-mips/setup.h
@@ -3,4 +3,6 @@
3 3
4#define COMMAND_LINE_SIZE 256 4#define COMMAND_LINE_SIZE 256
5 5
6extern void setup_early_printk(void);
7
6#endif /* __SETUP_H */ 8#endif /* __SETUP_H */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 7a28989f7ee3..bee5153aca48 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -119,9 +119,6 @@ struct sigaction {
119 119
120struct k_sigaction { 120struct k_sigaction {
121 struct sigaction sa; 121 struct sigaction sa;
122#ifdef CONFIG_BINFMT_IRIX
123 void (*sa_restorer)(void);
124#endif
125}; 122};
126 123
127/* IRIX compatible stack_t */ 124/* IRIX compatible stack_t */
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index 84fef1aeec0c..0ff5b523ea77 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -35,16 +35,6 @@ extern int __cpu_logical_map[NR_CPUS];
35 35
36#define NO_PROC_ID (-1) 36#define NO_PROC_ID (-1)
37 37
38struct call_data_struct {
39 void (*func)(void *);
40 void *info;
41 atomic_t started;
42 atomic_t finished;
43 int wait;
44};
45
46extern struct call_data_struct *call_data;
47
48#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ 38#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
49#define SMP_CALL_FUNCTION 0x2 39#define SMP_CALL_FUNCTION 0x2
50 40
@@ -67,4 +57,7 @@ static inline void smp_send_reschedule(int cpu)
67 57
68extern asmlinkage void smp_call_function_interrupt(void); 58extern asmlinkage void smp_call_function_interrupt(void);
69 59
60extern void arch_send_call_function_single_ipi(int cpu);
61extern void arch_send_call_function_ipi(cpumask_t mask);
62
70#endif /* __ASM_SMP_H */ 63#endif /* __ASM_SMP_H */
diff --git a/include/asm-mips/traps.h b/include/asm-mips/traps.h
index e5dbde625ec2..90ff2f497c50 100644
--- a/include/asm-mips/traps.h
+++ b/include/asm-mips/traps.h
@@ -24,6 +24,5 @@ extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
24extern void (*board_nmi_handler_setup)(void); 24extern void (*board_nmi_handler_setup)(void);
25extern void (*board_ejtag_handler_setup)(void); 25extern void (*board_ejtag_handler_setup)(void);
26extern void (*board_bind_eic_interrupt)(int irq, int regset); 26extern void (*board_bind_eic_interrupt)(int irq, int regset);
27extern void (*board_watchpoint_handler)(struct pt_regs *regs);
28 27
29#endif /* _ASM_TRAPS_H */ 28#endif /* _ASM_TRAPS_H */
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
deleted file mode 100644
index 193e80a17c12..000000000000
--- a/include/asm-mips/tx4927/tx4927.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2006 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_TX4927_TX4927_H
28#define __ASM_TX4927_TX4927_H
29
30#include <asm/txx9irq.h>
31
32#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
33#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
34
35#define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE
36#define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
37
38
39#define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0)
40#define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1)
41#define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2)
42#define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7)
43
44#define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3)
45
46#endif /* __ASM_TX4927_TX4927_H */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
deleted file mode 100644
index 0be77df70f2b..000000000000
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ /dev/null
@@ -1,268 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000-2001 Toshiba Corporation
7 */
8#ifndef __ASM_TX4927_TX4927_PCI_H
9#define __ASM_TX4927_TX4927_PCI_H
10
11#define TX4927_CCFG_TOE 0x00004000
12#define TX4927_CCFG_WR 0x00008000
13#define TX4927_CCFG_TINTDIS 0x01000000
14
15#define TX4927_PCIMEM 0x08000000
16#define TX4927_PCIMEM_SIZE 0x08000000
17#define TX4927_PCIIO 0x16000000
18#define TX4927_PCIIO_SIZE 0x01000000
19
20#define TX4927_SDRAMC_REG 0xff1f8000
21#define TX4927_EBUSC_REG 0xff1f9000
22#define TX4927_PCIC_REG 0xff1fd000
23#define TX4927_CCFG_REG 0xff1fe000
24#define TX4927_IRC_REG 0xff1ff600
25#define TX4927_NR_TMR 3
26#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
27#define TX4927_CE3 0x17f00000 /* 1M */
28#define TX4927_PCIRESET_ADDR 0xbc00f006
29#define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020)
30
31#define TX4927_IMSTAT_ADDR(n) (KSEG1 + TX4927_CE3 + 0x0004001a + (n))
32#define tx4927_imstat_ptr(n) \
33 ((volatile unsigned char *)TX4927_IMSTAT_ADDR(n))
34
35/* bits for ISTAT3/IMASK3/IMSTAT3 */
36#define TX4927_INT3B_PCID 0
37#define TX4927_INT3B_PCIC 1
38#define TX4927_INT3B_PCIB 2
39#define TX4927_INT3B_PCIA 3
40#define TX4927_INT3F_PCID (1 << TX4927_INT3B_PCID)
41#define TX4927_INT3F_PCIC (1 << TX4927_INT3B_PCIC)
42#define TX4927_INT3F_PCIB (1 << TX4927_INT3B_PCIB)
43#define TX4927_INT3F_PCIA (1 << TX4927_INT3B_PCIA)
44
45/* bits for PCI_CLK (S6) */
46#define TX4927_PCI_CLK_HOST 0x80
47#define TX4927_PCI_CLK_MASK (0x0f << 3)
48#define TX4927_PCI_CLK_33 (0x01 << 3)
49#define TX4927_PCI_CLK_25 (0x04 << 3)
50#define TX4927_PCI_CLK_66 (0x09 << 3)
51#define TX4927_PCI_CLK_50 (0x0c << 3)
52#define TX4927_PCI_CLK_ACK 0x04
53#define TX4927_PCI_CLK_ACE 0x02
54#define TX4927_PCI_CLK_ENDIAN 0x01
55#define TX4927_NR_IRQ_LOCAL TX4927_IRQ_PIC_BEG
56#define TX4927_NR_IRQ_IRC 32 /* On-Chip IRC */
57
58#define TX4927_IR_PCIC 16
59#define TX4927_IR_PCIERR 22
60#define TX4927_IR_PCIPMA 23
61#define TX4927_IRQ_IRC_PCIC (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIC)
62#define TX4927_IRQ_IRC_PCIERR (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIERR)
63#define TX4927_IRQ_IOC1 (TX4927_NR_IRQ_LOCAL + TX4927_NR_IRQ_IRC)
64#define TX4927_IRQ_IOC_PCID (TX4927_IRQ_IOC1 + TX4927_INT3B_PCID)
65#define TX4927_IRQ_IOC_PCIC (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIC)
66#define TX4927_IRQ_IOC_PCIB (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIB)
67#define TX4927_IRQ_IOC_PCIA (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIA)
68
69#ifdef _LANGUAGE_ASSEMBLY
70#define _CONST64(c) c
71#else
72#define _CONST64(c) c##ull
73
74#include <asm/byteorder.h>
75
76#define tx4927_pcireset_ptr \
77 ((volatile unsigned char *)TX4927_PCIRESET_ADDR)
78#define tx4927_pci_clk_ptr \
79 ((volatile unsigned char *)TX4927_PCI_CLK_ADDR)
80
81struct tx4927_sdramc_reg {
82 volatile unsigned long long cr[4];
83 volatile unsigned long long unused0[4];
84 volatile unsigned long long tr;
85 volatile unsigned long long unused1[2];
86 volatile unsigned long long cmd;
87};
88
89struct tx4927_ebusc_reg {
90 volatile unsigned long long cr[8];
91};
92
93struct tx4927_ccfg_reg {
94 volatile unsigned long long ccfg;
95 volatile unsigned long long crir;
96 volatile unsigned long long pcfg;
97 volatile unsigned long long tear;
98 volatile unsigned long long clkctr;
99 volatile unsigned long long unused0;
100 volatile unsigned long long garbc;
101 volatile unsigned long long unused1;
102 volatile unsigned long long unused2;
103 volatile unsigned long long ramp;
104};
105
106struct tx4927_pcic_reg {
107 volatile unsigned long pciid;
108 volatile unsigned long pcistatus;
109 volatile unsigned long pciccrev;
110 volatile unsigned long pcicfg1;
111 volatile unsigned long p2gm0plbase; /* +10 */
112 volatile unsigned long p2gm0pubase;
113 volatile unsigned long p2gm1plbase;
114 volatile unsigned long p2gm1pubase;
115 volatile unsigned long p2gm2pbase; /* +20 */
116 volatile unsigned long p2giopbase;
117 volatile unsigned long unused0;
118 volatile unsigned long pcisid;
119 volatile unsigned long unused1; /* +30 */
120 volatile unsigned long pcicapptr;
121 volatile unsigned long unused2;
122 volatile unsigned long pcicfg2;
123 volatile unsigned long g2ptocnt; /* +40 */
124 volatile unsigned long unused3[15];
125 volatile unsigned long g2pstatus; /* +80 */
126 volatile unsigned long g2pmask;
127 volatile unsigned long pcisstatus;
128 volatile unsigned long pcimask;
129 volatile unsigned long p2gcfg; /* +90 */
130 volatile unsigned long p2gstatus;
131 volatile unsigned long p2gmask;
132 volatile unsigned long p2gccmd;
133 volatile unsigned long unused4[24]; /* +a0 */
134 volatile unsigned long pbareqport; /* +100 */
135 volatile unsigned long pbacfg;
136 volatile unsigned long pbastatus;
137 volatile unsigned long pbamask;
138 volatile unsigned long pbabm; /* +110 */
139 volatile unsigned long pbacreq;
140 volatile unsigned long pbacgnt;
141 volatile unsigned long pbacstate;
142 volatile unsigned long long g2pmgbase[3]; /* +120 */
143 volatile unsigned long long g2piogbase;
144 volatile unsigned long g2pmmask[3]; /* +140 */
145 volatile unsigned long g2piomask;
146 volatile unsigned long long g2pmpbase[3]; /* +150 */
147 volatile unsigned long long g2piopbase;
148 volatile unsigned long pciccfg; /* +170 */
149 volatile unsigned long pcicstatus;
150 volatile unsigned long pcicmask;
151 volatile unsigned long unused5;
152 volatile unsigned long long p2gmgbase[3]; /* +180 */
153 volatile unsigned long long p2giogbase;
154 volatile unsigned long g2pcfgadrs; /* +1a0 */
155 volatile unsigned long g2pcfgdata;
156 volatile unsigned long unused6[8];
157 volatile unsigned long g2pintack;
158 volatile unsigned long g2pspc;
159 volatile unsigned long unused7[12]; /* +1d0 */
160 volatile unsigned long long pdmca; /* +200 */
161 volatile unsigned long long pdmga;
162 volatile unsigned long long pdmpa;
163 volatile unsigned long long pdmcut;
164 volatile unsigned long long pdmcnt; /* +220 */
165 volatile unsigned long long pdmsts;
166 volatile unsigned long long unused8[2];
167 volatile unsigned long long pdmdb[4]; /* +240 */
168 volatile unsigned long long pdmtdh; /* +260 */
169 volatile unsigned long long pdmdms;
170};
171
172#endif /* _LANGUAGE_ASSEMBLY */
173
174/*
175 * PCIC
176 */
177
178/* bits for G2PSTATUS/G2PMASK */
179#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
180#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
181#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
182
183/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
184#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
185
186/* bits for PBACFG */
187#define TX4927_PCIC_PBACFG_RPBA 0x00000004
188#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
189#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
190
191/* bits for G2PMnGBASE */
192#define TX4927_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
193#define TX4927_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
194
195/* bits for G2PIOGBASE */
196#define TX4927_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
197#define TX4927_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
198
199/* bits for PCICSTATUS/PCICMASK */
200#define TX4927_PCIC_PCICSTATUS_ALL 0x000007dc
201
202/* bits for PCICCFG */
203#define TX4927_PCIC_PCICCFG_LBWC_MASK 0x0fff0000
204#define TX4927_PCIC_PCICCFG_HRST 0x00000800
205#define TX4927_PCIC_PCICCFG_SRST 0x00000400
206#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
207#define TX4927_PCIC_PCICCFG_IMSE0 0x00000100
208#define TX4927_PCIC_PCICCFG_IMSE1 0x00000080
209#define TX4927_PCIC_PCICCFG_IMSE2 0x00000040
210#define TX4927_PCIC_PCICCFG_IISE 0x00000020
211#define TX4927_PCIC_PCICCFG_ATR 0x00000010
212#define TX4927_PCIC_PCICCFG_ICAE 0x00000008
213
214/* bits for P2GMnGBASE */
215#define TX4927_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
216#define TX4927_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
217#define TX4927_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
218
219/* bits for P2GIOGBASE */
220#define TX4927_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
221#define TX4927_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
222#define TX4927_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
223
224#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
225#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
226
227/*
228 * CCFG
229 */
230/* CCFG : Chip Configuration */
231#define TX4927_CCFG_PCI66 0x00800000
232#define TX4927_CCFG_PCIMIDE 0x00400000
233#define TX4927_CCFG_PCIXARB 0x00002000
234#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
235#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
236#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
237#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
238#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
239
240#define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00
241#define TX4937_CCFG_PCIDIVMODE_8 0x00000000
242#define TX4937_CCFG_PCIDIVMODE_4 0x00000400
243#define TX4937_CCFG_PCIDIVMODE_9 0x00000800
244#define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00
245#define TX4937_CCFG_PCIDIVMODE_10 0x00001000
246#define TX4937_CCFG_PCIDIVMODE_5 0x00001400
247#define TX4937_CCFG_PCIDIVMODE_11 0x00001800
248#define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00
249
250/* PCFG : Pin Configuration */
251#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
252#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
253
254/* CLKCTR : Clock Control */
255#define TX4927_CLKCTR_PCICKD 0x00400000
256#define TX4927_CLKCTR_PCIRST 0x00000040
257
258
259#ifndef _LANGUAGE_ASSEMBLY
260
261#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
262#define tx4927_pcicptr ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
263#define tx4927_ccfgptr ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
264#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
265
266#endif /* _LANGUAGE_ASSEMBLY */
267
268#endif /* __ASM_TX4927_TX4927_PCI_H */
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h
new file mode 100644
index 000000000000..d8756660523d
--- /dev/null
+++ b/include/asm-mips/txx9/generic.h
@@ -0,0 +1,41 @@
1/*
2 * linux/include/asm-mips/txx9/generic.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 */
8#ifndef __ASM_TXX9_GENERIC_H
9#define __ASM_TXX9_GENERIC_H
10
11#include <linux/init.h>
12#include <linux/ioport.h> /* for struct resource */
13
14extern struct resource txx9_ce_res[];
15extern char txx9_pcode_str[8];
16void txx9_reg_res_init(unsigned int pcode, unsigned long base,
17 unsigned long size);
18
19extern unsigned int txx9_master_clock;
20extern unsigned int txx9_cpu_clock;
21extern unsigned int txx9_gbus_clock;
22
23struct pci_dev;
24struct txx9_board_vec {
25 const char *system;
26 void (*prom_init)(void);
27 void (*mem_setup)(void);
28 void (*irq_setup)(void);
29 void (*time_init)(void);
30 void (*arch_init)(void);
31 void (*device_init)(void);
32#ifdef CONFIG_PCI
33 int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
34#endif
35};
36extern struct txx9_board_vec *txx9_board_vec;
37extern int (*txx9_irq_dispatch)(int pending);
38void prom_init_cmdline(void);
39char *prom_getcmdline(void);
40
41#endif /* __ASM_TXX9_GENERIC_H */
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/txx9/jmr3927.h
index a162268f17df..d6eb1b6a54eb 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/txx9/jmr3927.h
@@ -7,10 +7,10 @@
7 * 7 *
8 * Copyright (C) 2000-2001 Toshiba Corporation 8 * Copyright (C) 2000-2001 Toshiba Corporation
9 */ 9 */
10#ifndef __ASM_TX3927_JMR3927_H 10#ifndef __ASM_TXX9_JMR3927_H
11#define __ASM_TX3927_JMR3927_H 11#define __ASM_TXX9_JMR3927_H
12 12
13#include <asm/jmr3927/tx3927.h> 13#include <asm/txx9/tx3927.h>
14#include <asm/addrspace.h> 14#include <asm/addrspace.h>
15#include <asm/system.h> 15#include <asm/system.h>
16#include <asm/txx9irq.h> 16#include <asm/txx9irq.h>
@@ -174,4 +174,9 @@
174 * INT[3:0] 174 * INT[3:0]
175 */ 175 */
176 176
177#endif /* __ASM_TX3927_JMR3927_H */ 177void jmr3927_prom_init(void);
178void jmr3927_irq_setup(void);
179struct pci_dev;
180int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
181
182#endif /* __ASM_TXX9_JMR3927_H */
diff --git a/include/asm-mips/txx9/pci.h b/include/asm-mips/txx9/pci.h
new file mode 100644
index 000000000000..d89a45091e24
--- /dev/null
+++ b/include/asm-mips/txx9/pci.h
@@ -0,0 +1,36 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6#ifndef __ASM_TXX9_PCI_H
7#define __ASM_TXX9_PCI_H
8
9#include <linux/pci.h>
10
11extern struct pci_controller txx9_primary_pcic;
12struct pci_controller *
13txx9_alloc_pci_controller(struct pci_controller *pcic,
14 unsigned long mem_base, unsigned long mem_size,
15 unsigned long io_base, unsigned long io_size);
16
17int txx9_pci66_check(struct pci_controller *hose, int top_bus,
18 int current_bus);
19extern int txx9_pci_mem_high __initdata;
20
21extern int txx9_pci_option;
22#define TXX9_PCI_OPT_PICMG 0x0002
23#define TXX9_PCI_OPT_CLK_33 0x0008
24#define TXX9_PCI_OPT_CLK_66 0x0010
25#define TXX9_PCI_OPT_CLK_MASK \
26 (TXX9_PCI_OPT_CLK_33 | TXX9_PCI_OPT_CLK_66)
27#define TXX9_PCI_OPT_CLK_AUTO TXX9_PCI_OPT_CLK_MASK
28
29enum txx9_pci_err_action {
30 TXX9_PCI_ERR_REPORT,
31 TXX9_PCI_ERR_IGNORE,
32 TXX9_PCI_ERR_PANIC,
33};
34extern enum txx9_pci_err_action txx9_pci_err_action;
35
36#endif /* __ASM_TXX9_PCI_H */
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h
index b188a659ce02..bf194589216f 100644
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ b/include/asm-mips/txx9/rbtx4927.h
@@ -24,18 +24,42 @@
24 * with this program; if not, write to the Free Software Foundation, Inc., 24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */ 26 */
27#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H 27#ifndef __ASM_TXX9_RBTX4927_H
28#define __ASM_TX4927_TOSHIBA_RBTX4927_H 28#define __ASM_TXX9_RBTX4927_H
29 29
30#include <asm/tx4927/tx4927.h> 30#include <asm/txx9/tx4927.h>
31#ifdef CONFIG_PCI 31
32#include <asm/tx4927/tx4927_pci.h> 32#define RBTX4927_PCIMEM 0x08000000
33#endif 33#define RBTX4927_PCIMEM_SIZE 0x08000000
34#define RBTX4927_PCIIO 0x16000000
35#define RBTX4927_PCIIO_SIZE 0x01000000
36
37#define rbtx4927_pcireset_addr ((__u8 __iomem *)0xbc00f006UL)
38
39/* bits for ISTAT/IMASK/IMSTAT */
40#define RBTX4927_INTB_PCID 0
41#define RBTX4927_INTB_PCIC 1
42#define RBTX4927_INTB_PCIB 2
43#define RBTX4927_INTB_PCIA 3
44#define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
45#define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
46#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
47#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
48
49#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
50
51#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
52#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
53#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
54#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
55#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
56
57#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
34 58
35#ifdef CONFIG_PCI 59#ifdef CONFIG_PCI
36#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO 60#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
37#else 61#else
38#define TBTX4927_ISA_IO_OFFSET 0 62#define RBTX4927_ISA_IO_OFFSET 0
39#endif 63#endif
40 64
41#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL 65#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
@@ -44,10 +68,12 @@
44#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL 68#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
45#define RBTX4927_SW_RESET_ENABLE_SET 0x01 69#define RBTX4927_SW_RESET_ENABLE_SET 0x01
46 70
71#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
72#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
47 73
48#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET) 74void rbtx4927_prom_init(void);
49#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5) 75void rbtx4927_irq_setup(void);
50 76struct pci_dev;
51int toshiba_rbtx4927_irq_nested(int sw_irq); 77int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
52 78
53#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */ 79#endif /* __ASM_TXX9_RBTX4927_H */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h
index dfed7beb533f..2f5d5e705a41 100644
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ b/include/asm-mips/txx9/rbtx4938.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4938/rbtx4938.h
3 * Definitions for TX4937/TX4938 2 * Definitions for TX4937/TX4938
4 * 3 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the 4 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
@@ -9,12 +8,12 @@
9 * 8 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 9 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */ 10 */
12#ifndef __ASM_TX_BOARDS_RBTX4938_H 11#ifndef __ASM_TXX9_RBTX4938_H
13#define __ASM_TX_BOARDS_RBTX4938_H 12#define __ASM_TXX9_RBTX4938_H
14 13
15#include <asm/addrspace.h> 14#include <asm/addrspace.h>
16#include <asm/tx4938/tx4938.h>
17#include <asm/txx9irq.h> 15#include <asm/txx9irq.h>
16#include <asm/txx9/tx4938.h>
18 17
19/* CS */ 18/* CS */
20#define RBTX4938_CE0 0x1c000000 /* 64M */ 19#define RBTX4938_CE0 0x1c000000 /* 64M */
@@ -102,35 +101,12 @@
102 * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new 101 * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
103 * IRQ hardware is supported. 102 * IRQ hardware is supported.
104 */ 103 */
105#define RBTX4938_NR_IRQ_LOCAL 8
106#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
107#define RBTX4938_NR_IRQ_IOC 8 104#define RBTX4938_NR_IRQ_IOC 8
108 105
109#define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE 106#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
110#define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) 107#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
111
112#define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE
113#define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
114#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
115#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
116#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
117#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1)
118#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7)
119
120#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0
121#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7
122
123#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
124#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
125#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG
126#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
127#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
128#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC) 108#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
129 109
130#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
131#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
132#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
133#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
134#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR) 110#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
135#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) 111#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
136#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) 112#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
@@ -158,11 +134,16 @@
158 134
159 135
160/* IOC (PCI, etc) */ 136/* IOC (PCI, etc) */
161#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC) 137#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
162/* Onboard 10M Ether */ 138/* Onboard 10M Ether */
163#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1) 139#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
164 140
165#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base) 141#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
166#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER) 142#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
167 143
168#endif /* __ASM_TX_BOARDS_RBTX4938_H */ 144void rbtx4938_prom_init(void);
145void rbtx4938_irq_setup(void);
146struct pci_dev;
147int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
148
149#endif /* __ASM_TXX9_RBTX4938_H */
diff --git a/include/asm-mips/tx4927/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h
index 5d93bab51254..9375e4fc2289 100644
--- a/include/asm-mips/tx4927/smsc_fdc37m81x.h
+++ b/include/asm-mips/txx9/smsc_fdc37m81x.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
3 *
4 * Interface for smsc fdc48m81x Super IO chip 2 * Interface for smsc fdc48m81x Super IO chip
5 * 3 *
6 * Author: MontaVista Software, Inc. source@mvista.com 4 * Author: MontaVista Software, Inc. source@mvista.com
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/txx9/spi.h
index 6a60c83e152b..ddfb2a0dc432 100644
--- a/include/asm-mips/tx4938/spi.h
+++ b/include/asm-mips/txx9/spi.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4938/spi.h
3 * Definitions for TX4937/TX4938 SPI 2 * Definitions for TX4937/TX4938 SPI
4 * 3 *
5 * Copyright (C) 2000-2001 Toshiba Corporation 4 * Copyright (C) 2000-2001 Toshiba Corporation
@@ -11,10 +10,10 @@
11 * 10 *
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 11 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
13 */ 12 */
14#ifndef __ASM_TX_BOARDS_TX4938_SPI_H 13#ifndef __ASM_TXX9_SPI_H
15#define __ASM_TX_BOARDS_TX4938_SPI_H 14#define __ASM_TXX9_SPI_H
16 15
17extern int spi_eeprom_register(int chipid); 16extern int spi_eeprom_register(int chipid);
18extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len); 17extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
19 18
20#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */ 19#endif /* __ASM_TXX9_SPI_H */
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/txx9/tx3927.h
index fb580333c102..ca414c7624e1 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/txx9/tx3927.h
@@ -5,10 +5,10 @@
5 * 5 *
6 * Copyright (C) 2000 Toshiba Corporation 6 * Copyright (C) 2000 Toshiba Corporation
7 */ 7 */
8#ifndef __ASM_TX3927_H 8#ifndef __ASM_TXX9_TX3927_H
9#define __ASM_TX3927_H 9#define __ASM_TXX9_TX3927_H
10 10
11#include <asm/jmr3927/txx927.h> 11#include <asm/txx9/txx927.h>
12 12
13#define TX3927_SDRAMC_REG 0xfffe8000 13#define TX3927_SDRAMC_REG 0xfffe8000
14#define TX3927_ROMC_REG 0xfffe9000 14#define TX3927_ROMC_REG 0xfffe9000
@@ -316,4 +316,8 @@ struct tx3927_ccfg_reg {
316#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) 316#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
317#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG) 317#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
318 318
319#endif /* __ASM_TX3927_H */ 319struct pci_controller;
320void __init tx3927_pcic_setup(struct pci_controller *channel,
321 unsigned long sdram_size, int extarb);
322
323#endif /* __ASM_TXX9_TX3927_H */
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
new file mode 100644
index 000000000000..46d60afc038b
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927.h
@@ -0,0 +1,219 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2006 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_TXX9_TX4927_H
28#define __ASM_TXX9_TX4927_H
29
30#include <linux/types.h>
31#include <linux/io.h>
32#include <asm/txx9irq.h>
33#include <asm/txx9/tx4927pcic.h>
34
35#define TX4927_SDRAMC_REG 0xff1f8000
36#define TX4927_EBUSC_REG 0xff1f9000
37#define TX4927_PCIC_REG 0xff1fd000
38#define TX4927_CCFG_REG 0xff1fe000
39#define TX4927_IRC_REG 0xff1ff600
40#define TX4927_NR_TMR 3
41#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
42
43#define TX4927_IR_INT(n) (2 + (n))
44#define TX4927_IR_SIO(n) (8 + (n))
45#define TX4927_IR_PCIC 16
46#define TX4927_IR_PCIERR 22
47#define TX4927_NUM_IR 32
48
49#define TX4927_IRC_INT 2 /* IP[2] in Status register */
50
51struct tx4927_sdramc_reg {
52 volatile unsigned long long cr[4];
53 volatile unsigned long long unused0[4];
54 volatile unsigned long long tr;
55 volatile unsigned long long unused1[2];
56 volatile unsigned long long cmd;
57};
58
59struct tx4927_ebusc_reg {
60 volatile unsigned long long cr[8];
61};
62
63struct tx4927_ccfg_reg {
64 u64 ccfg;
65 u64 crir;
66 u64 pcfg;
67 u64 toea;
68 u64 clkctr;
69 u64 unused0;
70 u64 garbc;
71 u64 unused1;
72 u64 unused2;
73 u64 ramp;
74};
75
76/*
77 * CCFG
78 */
79/* CCFG : Chip Configuration */
80#define TX4927_CCFG_WDRST 0x0000020000000000ULL
81#define TX4927_CCFG_WDREXEN 0x0000010000000000ULL
82#define TX4927_CCFG_BCFG_MASK 0x000000ff00000000ULL
83#define TX4927_CCFG_TINTDIS 0x01000000
84#define TX4927_CCFG_PCI66 0x00800000
85#define TX4927_CCFG_PCIMODE 0x00400000
86#define TX4927_CCFG_DIVMODE_MASK 0x000e0000
87#define TX4927_CCFG_DIVMODE_8 (0x0 << 17)
88#define TX4927_CCFG_DIVMODE_12 (0x1 << 17)
89#define TX4927_CCFG_DIVMODE_16 (0x2 << 17)
90#define TX4927_CCFG_DIVMODE_10 (0x3 << 17)
91#define TX4927_CCFG_DIVMODE_2 (0x4 << 17)
92#define TX4927_CCFG_DIVMODE_3 (0x5 << 17)
93#define TX4927_CCFG_DIVMODE_4 (0x6 << 17)
94#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
95#define TX4927_CCFG_BEOW 0x00010000
96#define TX4927_CCFG_WR 0x00008000
97#define TX4927_CCFG_TOE 0x00004000
98#define TX4927_CCFG_PCIARB 0x00002000
99#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
100#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
101#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
102#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
103#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
104#define TX4927_CCFG_SYSSP_MASK 0x000000c0
105#define TX4927_CCFG_ENDIAN 0x00000004
106#define TX4927_CCFG_HALT 0x00000002
107#define TX4927_CCFG_ACEHOLD 0x00000001
108#define TX4927_CCFG_W1CBITS (TX4927_CCFG_WDRST | TX4927_CCFG_BEOW)
109
110/* PCFG : Pin Configuration */
111#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000
112#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
113#define TX4927_PCFG_SYSCLKEN 0x08000000
114#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
115#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
116#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
117#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
118#define TX4927_PCFG_SEL2 0x00000200
119#define TX4927_PCFG_SEL1 0x00000100
120#define TX4927_PCFG_DMASEL_ALL 0x000000ff
121#define TX4927_PCFG_DMASEL0_MASK 0x00000003
122#define TX4927_PCFG_DMASEL1_MASK 0x0000000c
123#define TX4927_PCFG_DMASEL2_MASK 0x00000030
124#define TX4927_PCFG_DMASEL3_MASK 0x000000c0
125#define TX4927_PCFG_DMASEL0_DRQ0 0x00000000
126#define TX4927_PCFG_DMASEL0_SIO1 0x00000001
127#define TX4927_PCFG_DMASEL0_ACL0 0x00000002
128#define TX4927_PCFG_DMASEL0_ACL2 0x00000003
129#define TX4927_PCFG_DMASEL1_DRQ1 0x00000000
130#define TX4927_PCFG_DMASEL1_SIO1 0x00000004
131#define TX4927_PCFG_DMASEL1_ACL1 0x00000008
132#define TX4927_PCFG_DMASEL1_ACL3 0x0000000c
133#define TX4927_PCFG_DMASEL2_DRQ2 0x00000000 /* SEL2=0 */
134#define TX4927_PCFG_DMASEL2_SIO0 0x00000010 /* SEL2=0 */
135#define TX4927_PCFG_DMASEL2_ACL1 0x00000000 /* SEL2=1 */
136#define TX4927_PCFG_DMASEL2_ACL2 0x00000020 /* SEL2=1 */
137#define TX4927_PCFG_DMASEL2_ACL0 0x00000030 /* SEL2=1 */
138#define TX4927_PCFG_DMASEL3_DRQ3 0x00000000
139#define TX4927_PCFG_DMASEL3_SIO0 0x00000040
140#define TX4927_PCFG_DMASEL3_ACL3 0x00000080
141#define TX4927_PCFG_DMASEL3_ACL1 0x000000c0
142
143/* CLKCTR : Clock Control */
144#define TX4927_CLKCTR_ACLCKD 0x02000000
145#define TX4927_CLKCTR_PIOCKD 0x01000000
146#define TX4927_CLKCTR_DMACKD 0x00800000
147#define TX4927_CLKCTR_PCICKD 0x00400000
148#define TX4927_CLKCTR_TM0CKD 0x00100000
149#define TX4927_CLKCTR_TM1CKD 0x00080000
150#define TX4927_CLKCTR_TM2CKD 0x00040000
151#define TX4927_CLKCTR_SIO0CKD 0x00020000
152#define TX4927_CLKCTR_SIO1CKD 0x00010000
153#define TX4927_CLKCTR_ACLRST 0x00000200
154#define TX4927_CLKCTR_PIORST 0x00000100
155#define TX4927_CLKCTR_DMARST 0x00000080
156#define TX4927_CLKCTR_PCIRST 0x00000040
157#define TX4927_CLKCTR_TM0RST 0x00000010
158#define TX4927_CLKCTR_TM1RST 0x00000008
159#define TX4927_CLKCTR_TM2RST 0x00000004
160#define TX4927_CLKCTR_SIO0RST 0x00000002
161#define TX4927_CLKCTR_SIO1RST 0x00000001
162
163#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
164#define tx4927_pcicptr \
165 ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
166#define tx4927_ccfgptr \
167 ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
168#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
169
170/* utilities */
171static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
172{
173#ifdef CONFIG_32BIT
174 unsigned long flags;
175 local_irq_save(flags);
176#endif
177 ____raw_writeq(____raw_readq(adr) & ~bits, adr);
178#ifdef CONFIG_32BIT
179 local_irq_restore(flags);
180#endif
181}
182static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
183{
184#ifdef CONFIG_32BIT
185 unsigned long flags;
186 local_irq_save(flags);
187#endif
188 ____raw_writeq(____raw_readq(adr) | bits, adr);
189#ifdef CONFIG_32BIT
190 local_irq_restore(flags);
191#endif
192}
193
194/* These functions are not interrupt safe. */
195static inline void tx4927_ccfg_clear(__u64 bits)
196{
197 ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
198 & ~(TX4927_CCFG_W1CBITS | bits),
199 &tx4927_ccfgptr->ccfg);
200}
201static inline void tx4927_ccfg_set(__u64 bits)
202{
203 ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
204 & ~TX4927_CCFG_W1CBITS) | bits,
205 &tx4927_ccfgptr->ccfg);
206}
207static inline void tx4927_ccfg_change(__u64 change, __u64 new)
208{
209 ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
210 & ~(TX4927_CCFG_W1CBITS | change)) |
211 new,
212 &tx4927_ccfgptr->ccfg);
213}
214
215int tx4927_report_pciclk(void);
216int tx4927_pciclk66_setup(void);
217void tx4927_irq_init(void);
218
219#endif /* __ASM_TXX9_TX4927_H */
diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h
new file mode 100644
index 000000000000..d61c3d09c4a2
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927pcic.h
@@ -0,0 +1,199 @@
1/*
2 * include/asm-mips/txx9/tx4927pcic.h
3 * TX4927 PCI controller definitions.
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9#ifndef __ASM_TXX9_TX4927PCIC_H
10#define __ASM_TXX9_TX4927PCIC_H
11
12#include <linux/pci.h>
13
14struct tx4927_pcic_reg {
15 u32 pciid;
16 u32 pcistatus;
17 u32 pciccrev;
18 u32 pcicfg1;
19 u32 p2gm0plbase; /* +10 */
20 u32 p2gm0pubase;
21 u32 p2gm1plbase;
22 u32 p2gm1pubase;
23 u32 p2gm2pbase; /* +20 */
24 u32 p2giopbase;
25 u32 unused0;
26 u32 pcisid;
27 u32 unused1; /* +30 */
28 u32 pcicapptr;
29 u32 unused2;
30 u32 pcicfg2;
31 u32 g2ptocnt; /* +40 */
32 u32 unused3[15];
33 u32 g2pstatus; /* +80 */
34 u32 g2pmask;
35 u32 pcisstatus;
36 u32 pcimask;
37 u32 p2gcfg; /* +90 */
38 u32 p2gstatus;
39 u32 p2gmask;
40 u32 p2gccmd;
41 u32 unused4[24]; /* +a0 */
42 u32 pbareqport; /* +100 */
43 u32 pbacfg;
44 u32 pbastatus;
45 u32 pbamask;
46 u32 pbabm; /* +110 */
47 u32 pbacreq;
48 u32 pbacgnt;
49 u32 pbacstate;
50 u64 g2pmgbase[3]; /* +120 */
51 u64 g2piogbase;
52 u32 g2pmmask[3]; /* +140 */
53 u32 g2piomask;
54 u64 g2pmpbase[3]; /* +150 */
55 u64 g2piopbase;
56 u32 pciccfg; /* +170 */
57 u32 pcicstatus;
58 u32 pcicmask;
59 u32 unused5;
60 u64 p2gmgbase[3]; /* +180 */
61 u64 p2giogbase;
62 u32 g2pcfgadrs; /* +1a0 */
63 u32 g2pcfgdata;
64 u32 unused6[8];
65 u32 g2pintack;
66 u32 g2pspc;
67 u32 unused7[12]; /* +1d0 */
68 u64 pdmca; /* +200 */
69 u64 pdmga;
70 u64 pdmpa;
71 u64 pdmctr;
72 u64 pdmcfg; /* +220 */
73 u64 pdmsts;
74};
75
76/* bits for PCICMD */
77/* see PCI_COMMAND_XXX in linux/pci_regs.h */
78
79/* bits for PCISTAT */
80/* see PCI_STATUS_XXX in linux/pci_regs.h */
81
82/* bits for IOBA/MBA */
83/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
84
85/* bits for G2PSTATUS/G2PMASK */
86#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
87#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
88#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
89
90/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
91#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
92
93/* bits for PBACFG */
94#define TX4927_PCIC_PBACFG_FIXPA 0x00000008
95#define TX4927_PCIC_PBACFG_RPBA 0x00000004
96#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
97#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
98
99/* bits for PBASTATUS/PBAMASK */
100#define TX4927_PCIC_PBASTATUS_ALL 0x00000001
101#define TX4927_PCIC_PBASTATUS_BM 0x00000001
102
103/* bits for G2PMnGBASE */
104#define TX4927_PCIC_G2PMnGBASE_BSDIS 0x0000002000000000ULL
105#define TX4927_PCIC_G2PMnGBASE_ECHG 0x0000001000000000ULL
106
107/* bits for G2PIOGBASE */
108#define TX4927_PCIC_G2PIOGBASE_BSDIS 0x0000002000000000ULL
109#define TX4927_PCIC_G2PIOGBASE_ECHG 0x0000001000000000ULL
110
111/* bits for PCICSTATUS/PCICMASK */
112#define TX4927_PCIC_PCICSTATUS_ALL 0x000007b8
113#define TX4927_PCIC_PCICSTATUS_PME 0x00000400
114#define TX4927_PCIC_PCICSTATUS_TLB 0x00000200
115#define TX4927_PCIC_PCICSTATUS_NIB 0x00000100
116#define TX4927_PCIC_PCICSTATUS_ZIB 0x00000080
117#define TX4927_PCIC_PCICSTATUS_PERR 0x00000020
118#define TX4927_PCIC_PCICSTATUS_SERR 0x00000010
119#define TX4927_PCIC_PCICSTATUS_GBE 0x00000008
120#define TX4927_PCIC_PCICSTATUS_IWB 0x00000002
121#define TX4927_PCIC_PCICSTATUS_E2PDONE 0x00000001
122
123/* bits for PCICCFG */
124#define TX4927_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
125#define TX4927_PCIC_PCICCFG_HRST 0x00000800
126#define TX4927_PCIC_PCICCFG_SRST 0x00000400
127#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
128#define TX4927_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
129#define TX4927_PCIC_PCICCFG_G2PM0EN 0x00000100
130#define TX4927_PCIC_PCICCFG_G2PM1EN 0x00000080
131#define TX4927_PCIC_PCICCFG_G2PM2EN 0x00000040
132#define TX4927_PCIC_PCICCFG_G2PIOEN 0x00000020
133#define TX4927_PCIC_PCICCFG_TCAR 0x00000010
134#define TX4927_PCIC_PCICCFG_ICAEN 0x00000008
135
136/* bits for P2GMnGBASE */
137#define TX4927_PCIC_P2GMnGBASE_TMEMEN 0x0000004000000000ULL
138#define TX4927_PCIC_P2GMnGBASE_TBSDIS 0x0000002000000000ULL
139#define TX4927_PCIC_P2GMnGBASE_TECHG 0x0000001000000000ULL
140
141/* bits for P2GIOGBASE */
142#define TX4927_PCIC_P2GIOGBASE_TIOEN 0x0000004000000000ULL
143#define TX4927_PCIC_P2GIOGBASE_TBSDIS 0x0000002000000000ULL
144#define TX4927_PCIC_P2GIOGBASE_TECHG 0x0000001000000000ULL
145
146#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
147#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
148
149/* bits for PDMCFG */
150#define TX4927_PCIC_PDMCFG_RSTFIFO 0x00200000
151#define TX4927_PCIC_PDMCFG_EXFER 0x00100000
152#define TX4927_PCIC_PDMCFG_REQDLY_MASK 0x00003800
153#define TX4927_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
154#define TX4927_PCIC_PDMCFG_REQDLY_16 (1 << 11)
155#define TX4927_PCIC_PDMCFG_REQDLY_32 (2 << 11)
156#define TX4927_PCIC_PDMCFG_REQDLY_64 (3 << 11)
157#define TX4927_PCIC_PDMCFG_REQDLY_128 (4 << 11)
158#define TX4927_PCIC_PDMCFG_REQDLY_256 (5 << 11)
159#define TX4927_PCIC_PDMCFG_REQDLY_512 (6 << 11)
160#define TX4927_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
161#define TX4927_PCIC_PDMCFG_ERRIE 0x00000400
162#define TX4927_PCIC_PDMCFG_NCCMPIE 0x00000200
163#define TX4927_PCIC_PDMCFG_NTCMPIE 0x00000100
164#define TX4927_PCIC_PDMCFG_CHNEN 0x00000080
165#define TX4927_PCIC_PDMCFG_XFRACT 0x00000040
166#define TX4927_PCIC_PDMCFG_BSWAP 0x00000020
167#define TX4927_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
168#define TX4927_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
169#define TX4927_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
170#define TX4927_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
171#define TX4927_PCIC_PDMCFG_XFRDIRC 0x00000002
172#define TX4927_PCIC_PDMCFG_CHRST 0x00000001
173
174/* bits for PDMSTS */
175#define TX4927_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
176#define TX4927_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
177#define TX4927_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
178#define TX4927_PCIC_PDMSTS_FIFORP_MASK 0x00030000
179#define TX4927_PCIC_PDMSTS_ERRINT 0x00000800
180#define TX4927_PCIC_PDMSTS_DONEINT 0x00000400
181#define TX4927_PCIC_PDMSTS_CHNEN 0x00000200
182#define TX4927_PCIC_PDMSTS_XFRACT 0x00000100
183#define TX4927_PCIC_PDMSTS_ACCMP 0x00000080
184#define TX4927_PCIC_PDMSTS_NCCMP 0x00000040
185#define TX4927_PCIC_PDMSTS_NTCMP 0x00000020
186#define TX4927_PCIC_PDMSTS_CFGERR 0x00000008
187#define TX4927_PCIC_PDMSTS_PCIERR 0x00000004
188#define TX4927_PCIC_PDMSTS_CHNERR 0x00000002
189#define TX4927_PCIC_PDMSTS_DATAERR 0x00000001
190#define TX4927_PCIC_PDMSTS_ALL_CMP 0x000000e0
191#define TX4927_PCIC_PDMSTS_ALL_ERR 0x0000000f
192
193struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
194 struct pci_controller *channel);
195void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
196 struct pci_controller *channel, int extarb);
197void tx4927_report_pcic_status(void);
198
199#endif /* __ASM_TXX9_TX4927PCIC_H */
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/txx9/tx4938.h
index e8807f5c61e9..12de68a4c10a 100644
--- a/include/asm-mips/tx4938/tx4938.h
+++ b/include/asm-mips/txx9/tx4938.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/include/asm-mips/tx4938/tx4938.h
3 * Definitions for TX4937/TX4938 2 * Definitions for TX4937/TX4938
4 * Copyright (C) 2000-2001 Toshiba Corporation 3 * Copyright (C) 2000-2001 Toshiba Corporation
5 * 4 *
@@ -10,17 +9,15 @@
10 * 9 *
11 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) 10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
12 */ 11 */
13#ifndef __ASM_TX_BOARDS_TX4938_H 12#ifndef __ASM_TXX9_TX4938_H
14#define __ASM_TX_BOARDS_TX4938_H 13#define __ASM_TXX9_TX4938_H
14
15/* some controllers are compatible with 4927 */
16#include <asm/txx9/tx4927.h>
15 17
16#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) 18#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
17#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b) 19#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
18 20
19#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
20
21#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
22#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
23
24#define TX4938_PCIIO_0 0x10000000 21#define TX4938_PCIIO_0 0x10000000
25#define TX4938_PCIIO_1 0x01010000 22#define TX4938_PCIIO_1 0x01010000
26#define TX4938_PCIMEM_0 0x08000000 23#define TX4938_PCIMEM_0 0x08000000
@@ -52,9 +49,6 @@
52#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700) 49#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
53#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800) 50#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
54 51
55#ifdef __ASSEMBLY__
56#define _CONST64(c) c
57#else
58#define _CONST64(c) c##ull 52#define _CONST64(c) c##ull
59 53
60#include <asm/byteorder.h> 54#include <asm/byteorder.h>
@@ -114,68 +108,6 @@ struct tx4938_dma_reg {
114 endian_def_l2(unused0, mcr); 108 endian_def_l2(unused0, mcr);
115}; 109};
116 110
117struct tx4938_pcic_reg {
118 volatile unsigned long pciid;
119 volatile unsigned long pcistatus;
120 volatile unsigned long pciccrev;
121 volatile unsigned long pcicfg1;
122 volatile unsigned long p2gm0plbase; /* +10 */
123 volatile unsigned long p2gm0pubase;
124 volatile unsigned long p2gm1plbase;
125 volatile unsigned long p2gm1pubase;
126 volatile unsigned long p2gm2pbase; /* +20 */
127 volatile unsigned long p2giopbase;
128 volatile unsigned long unused0;
129 volatile unsigned long pcisid;
130 volatile unsigned long unused1; /* +30 */
131 volatile unsigned long pcicapptr;
132 volatile unsigned long unused2;
133 volatile unsigned long pcicfg2;
134 volatile unsigned long g2ptocnt; /* +40 */
135 volatile unsigned long unused3[15];
136 volatile unsigned long g2pstatus; /* +80 */
137 volatile unsigned long g2pmask;
138 volatile unsigned long pcisstatus;
139 volatile unsigned long pcimask;
140 volatile unsigned long p2gcfg; /* +90 */
141 volatile unsigned long p2gstatus;
142 volatile unsigned long p2gmask;
143 volatile unsigned long p2gccmd;
144 volatile unsigned long unused4[24]; /* +a0 */
145 volatile unsigned long pbareqport; /* +100 */
146 volatile unsigned long pbacfg;
147 volatile unsigned long pbastatus;
148 volatile unsigned long pbamask;
149 volatile unsigned long pbabm; /* +110 */
150 volatile unsigned long pbacreq;
151 volatile unsigned long pbacgnt;
152 volatile unsigned long pbacstate;
153 volatile unsigned long long g2pmgbase[3]; /* +120 */
154 volatile unsigned long long g2piogbase;
155 volatile unsigned long g2pmmask[3]; /* +140 */
156 volatile unsigned long g2piomask;
157 volatile unsigned long long g2pmpbase[3]; /* +150 */
158 volatile unsigned long long g2piopbase;
159 volatile unsigned long pciccfg; /* +170 */
160 volatile unsigned long pcicstatus;
161 volatile unsigned long pcicmask;
162 volatile unsigned long unused5;
163 volatile unsigned long long p2gmgbase[3]; /* +180 */
164 volatile unsigned long long p2giogbase;
165 volatile unsigned long g2pcfgadrs; /* +1a0 */
166 volatile unsigned long g2pcfgdata;
167 volatile unsigned long unused6[8];
168 volatile unsigned long g2pintack;
169 volatile unsigned long g2pspc;
170 volatile unsigned long unused7[12]; /* +1d0 */
171 volatile unsigned long long pdmca; /* +200 */
172 volatile unsigned long long pdmga;
173 volatile unsigned long long pdmpa;
174 volatile unsigned long long pdmctr;
175 volatile unsigned long long pdmcfg; /* +220 */
176 volatile unsigned long long pdmsts;
177};
178
179struct tx4938_aclc_reg { 111struct tx4938_aclc_reg {
180 volatile unsigned long acctlen; 112 volatile unsigned long acctlen;
181 volatile unsigned long acctldis; 113 volatile unsigned long acctldis;
@@ -263,18 +195,18 @@ struct tx4938_sramc_reg {
263}; 195};
264 196
265struct tx4938_ccfg_reg { 197struct tx4938_ccfg_reg {
266 volatile unsigned long long ccfg; 198 u64 ccfg;
267 volatile unsigned long long crir; 199 u64 crir;
268 volatile unsigned long long pcfg; 200 u64 pcfg;
269 volatile unsigned long long tear; 201 u64 toea;
270 volatile unsigned long long clkctr; 202 u64 clkctr;
271 volatile unsigned long long unused0; 203 u64 unused0;
272 volatile unsigned long long garbc; 204 u64 garbc;
273 volatile unsigned long long unused1; 205 u64 unused1;
274 volatile unsigned long long unused2; 206 u64 unused2;
275 volatile unsigned long long ramp; 207 u64 ramp;
276 volatile unsigned long long unused3; 208 u64 unused3;
277 volatile unsigned long long jmpadr; 209 u64 jmpadr;
278}; 210};
279 211
280#undef endian_def_l2 212#undef endian_def_l2
@@ -283,8 +215,6 @@ struct tx4938_ccfg_reg {
283#undef endian_def_b2s 215#undef endian_def_b2s
284#undef endian_def_b4 216#undef endian_def_b4
285 217
286#endif /* __ASSEMBLY__ */
287
288/* 218/*
289 * NDFMC 219 * NDFMC
290 */ 220 */
@@ -336,6 +266,8 @@ struct tx4938_ccfg_reg {
336#define TX4938_IR_ETH0 TX4938_IR_INT(4) 266#define TX4938_IR_ETH0 TX4938_IR_INT(4)
337#define TX4938_IR_ETH1 TX4938_IR_INT(3) 267#define TX4938_IR_ETH1 TX4938_IR_INT(3)
338 268
269#define TX4938_IRC_INT 2 /* IP[2] in Status register */
270
339/* 271/*
340 * CCFG 272 * CCFG
341 */ 273 */
@@ -361,7 +293,7 @@ struct tx4938_ccfg_reg {
361#define TX4938_CCFG_BEOW 0x00010000 293#define TX4938_CCFG_BEOW 0x00010000
362#define TX4938_CCFG_WR 0x00008000 294#define TX4938_CCFG_WR 0x00008000
363#define TX4938_CCFG_TOE 0x00004000 295#define TX4938_CCFG_TOE 0x00004000
364#define TX4938_CCFG_PCIXARB 0x00002000 296#define TX4938_CCFG_PCIARB 0x00002000
365#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00 297#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
366#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10) 298#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
367#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10) 299#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
@@ -437,110 +369,6 @@ struct tx4938_ccfg_reg {
437#define TX4938_CLKCTR_SIO0RST 0x00000002 369#define TX4938_CLKCTR_SIO0RST 0x00000002
438#define TX4938_CLKCTR_SIO1RST 0x00000001 370#define TX4938_CLKCTR_SIO1RST 0x00000001
439 371
440/* bits for G2PSTATUS/G2PMASK */
441#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
442#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
443#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
444
445/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
446#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
447
448/* bits for PBACFG */
449#define TX4938_PCIC_PBACFG_FIXPA 0x00000008
450#define TX4938_PCIC_PBACFG_RPBA 0x00000004
451#define TX4938_PCIC_PBACFG_PBAEN 0x00000002
452#define TX4938_PCIC_PBACFG_BMCEN 0x00000001
453
454/* bits for G2PMnGBASE */
455#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
456#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
457
458/* bits for G2PIOGBASE */
459#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
460#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
461
462/* bits for PCICSTATUS/PCICMASK */
463#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
464#define TX4938_PCIC_PCICSTATUS_PME 0x00000400
465#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
466#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
467#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
468#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
469#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
470#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
471#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
472#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
473
474/* bits for PCICCFG */
475#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
476#define TX4938_PCIC_PCICCFG_HRST 0x00000800
477#define TX4938_PCIC_PCICCFG_SRST 0x00000400
478#define TX4938_PCIC_PCICCFG_IRBER 0x00000200
479#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
480#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
481#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
482#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
483#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
484#define TX4938_PCIC_PCICCFG_TCAR 0x00000010
485#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
486
487/* bits for P2GMnGBASE */
488#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
489#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
490#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
491
492/* bits for P2GIOGBASE */
493#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
494#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
495#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
496
497#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
498#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
499
500/* bits for PDMCFG */
501#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
502#define TX4938_PCIC_PDMCFG_EXFER 0x00100000
503#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
504#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
505#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
506#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
507#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
508#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
509#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
510#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
511#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
512#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
513#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
514#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
515#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
516#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
517#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
518#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
519#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
520#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
521#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
522#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
523#define TX4938_PCIC_PDMCFG_CHRST 0x00000001
524
525/* bits for PDMSTS */
526#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
527#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
528#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
529#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
530#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
531#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
532#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
533#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
534#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
535#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
536#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
537#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
538#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
539#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
540#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
541#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
542#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
543
544/* 372/*
545 * DMA 373 * DMA
546 */ 374 */
@@ -596,15 +424,15 @@ struct tx4938_ccfg_reg {
596#define TX4938_DMA_CSR_DESERR 0x00000002 424#define TX4938_DMA_CSR_DESERR 0x00000002
597#define TX4938_DMA_CSR_SORERR 0x00000001 425#define TX4938_DMA_CSR_SORERR 0x00000001
598 426
599#ifndef __ASSEMBLY__
600
601#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG) 427#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
602#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG) 428#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
603#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch)) 429#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
604#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG) 430#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
605#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) 431#define tx4938_pcicptr tx4927_pcicptr
606#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) 432#define tx4938_pcic1ptr \
607#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) 433 ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
434#define tx4938_ccfgptr \
435 ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
608#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) 436#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
609#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG) 437#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
610#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) 438#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
@@ -612,17 +440,26 @@ struct tx4938_ccfg_reg {
612#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG) 440#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
613 441
614 442
615#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff) 443#define TX4938_REV_PCODE() \
616#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16) 444 ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
445
446#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
447#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
448#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
617 449
618#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21) 450#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
619#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21) 451#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
620 452
453#define TX4938_EBUSC_CR(ch) __raw_readq(&tx4938_ebuscptr->cr[(ch)])
621#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20) 454#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
622#define TX4938_EBUSC_SIZE(ch) \ 455#define TX4938_EBUSC_SIZE(ch) \
623 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf)) 456 (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
624 457
625 458int tx4938_report_pciclk(void);
626#endif /* !__ASSEMBLY__ */ 459void tx4938_report_pci1clk(void);
460int tx4938_pciclk66_setup(void);
461struct pci_dev;
462int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
463void tx4938_irq_init(void);
627 464
628#endif 465#endif
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/txx9/txx927.h
index 25dcf2feb095..97dd7ad1a890 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/txx9/txx927.h
@@ -7,8 +7,8 @@
7 * 7 *
8 * Copyright (C) 2000 Toshiba Corporation 8 * Copyright (C) 2000 Toshiba Corporation
9 */ 9 */
10#ifndef __ASM_TXX927_H 10#ifndef __ASM_TXX9_TXX927_H
11#define __ASM_TXX927_H 11#define __ASM_TXX9_TXX927_H
12 12
13struct txx927_sio_reg { 13struct txx927_sio_reg {
14 volatile unsigned long lcr; 14 volatile unsigned long lcr;
@@ -118,4 +118,4 @@ struct txx927_sio_reg {
118 * PIO 118 * PIO
119 */ 119 */
120 120
121#endif /* __ASM_TXX927_H */ 121#endif /* __ASM_TXX9_TXX927_H */
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
deleted file mode 100644
index 42300037d593..000000000000
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * include/asm-mips/vr41xx/cmbvr4133.h
3 *
4 * Include file for NEC CMB-VR4133.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Jun Sun <jsun@mvista.com, or source@mvista.com> and
8 * Alex Sapkov <asapkov@ru.mvista.com>
9 *
10 * 2002-2004 (c) MontaVista, Software, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15#ifndef __NEC_CMBVR4133_H
16#define __NEC_CMBVR4133_H
17
18#include <asm/vr41xx/irq.h>
19
20/*
21 * General-Purpose I/O Pin Number
22 */
23#define CMBVR41XX_INTA_PIN 1
24#define CMBVR41XX_INTB_PIN 1
25#define CMBVR41XX_INTC_PIN 3
26#define CMBVR41XX_INTD_PIN 1
27#define CMBVR41XX_INTE_PIN 1
28
29/*
30 * Interrupt Number
31 */
32#define CMBVR41XX_INTA_IRQ GIU_IRQ(CMBVR41XX_INTA_PIN)
33#define CMBVR41XX_INTB_IRQ GIU_IRQ(CMBVR41XX_INTB_PIN)
34#define CMBVR41XX_INTC_IRQ GIU_IRQ(CMBVR41XX_INTC_PIN)
35#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN)
36#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN)
37
38#define I8259A_IRQ_BASE 72
39#define I8259_IRQ(x) (I8259A_IRQ_BASE + (x))
40#define TIMER_IRQ I8259_IRQ(0)
41#define KEYBOARD_IRQ I8259_IRQ(1)
42#define I8259_SLAVE_IRQ I8259_IRQ(2)
43#define UART3_IRQ I8259_IRQ(3)
44#define UART1_IRQ I8259_IRQ(4)
45#define UART2_IRQ I8259_IRQ(5)
46#define FDC_IRQ I8259_IRQ(6)
47#define PARPORT_IRQ I8259_IRQ(7)
48#define RTC_IRQ I8259_IRQ(8)
49#define USB_IRQ I8259_IRQ(9)
50#define I8259_INTA_IRQ I8259_IRQ(10)
51#define AUDIO_IRQ I8259_IRQ(11)
52#define AUX_IRQ I8259_IRQ(12)
53#define IDE_PRIMARY_IRQ I8259_IRQ(14)
54#define IDE_SECONDARY_IRQ I8259_IRQ(15)
55
56#endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 306f4950e32e..398cdbaf4e54 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -30,6 +30,9 @@ extern cpumask_t cpu_online_map;
30extern void smp_send_reschedule(int cpu); 30extern void smp_send_reschedule(int cpu);
31extern void smp_send_all_nop(void); 31extern void smp_send_all_nop(void);
32 32
33extern void arch_send_call_function_single_ipi(int cpu);
34extern void arch_send_call_function_ipi(cpumask_t mask);
35
33#endif /* !ASSEMBLY */ 36#endif /* !ASSEMBLY */
34 37
35/* 38/*
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h
index 505f35bacaa9..c663a1fa77c5 100644
--- a/include/asm-powerpc/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -67,10 +67,7 @@ DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
67 * in /proc/interrupts will be wrong!!! --Troy */ 67 * in /proc/interrupts will be wrong!!! --Troy */
68#define PPC_MSG_CALL_FUNCTION 0 68#define PPC_MSG_CALL_FUNCTION 0
69#define PPC_MSG_RESCHEDULE 1 69#define PPC_MSG_RESCHEDULE 1
70/* This is unused now */ 70#define PPC_MSG_CALL_FUNC_SINGLE 2
71#if 0
72#define PPC_MSG_MIGRATE_TASK 2
73#endif
74#define PPC_MSG_DEBUGGER_BREAK 3 71#define PPC_MSG_DEBUGGER_BREAK 3
75 72
76void smp_init_iSeries(void); 73void smp_init_iSeries(void);
@@ -117,6 +114,9 @@ extern void smp_generic_take_timebase(void);
117 114
118extern struct smp_ops_t *smp_ops; 115extern struct smp_ops_t *smp_ops;
119 116
117extern void arch_send_call_function_single_ipi(int cpu);
118extern void arch_send_call_function_ipi(cpumask_t mask);
119
120#endif /* __ASSEMBLY__ */ 120#endif /* __ASSEMBLY__ */
121 121
122#endif /* __KERNEL__ */ 122#endif /* __KERNEL__ */
diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h
index 9c8d34b07ebf..593343cd26ee 100644
--- a/include/asm-sh/smp.h
+++ b/include/asm-sh/smp.h
@@ -26,18 +26,10 @@ extern int __cpu_logical_map[NR_CPUS];
26 26
27#define NO_PROC_ID (-1) 27#define NO_PROC_ID (-1)
28 28
29struct smp_fn_call_struct {
30 spinlock_t lock;
31 atomic_t finished;
32 void (*fn)(void *);
33 void *data;
34};
35
36extern struct smp_fn_call_struct smp_fn_call;
37
38#define SMP_MSG_FUNCTION 0 29#define SMP_MSG_FUNCTION 0
39#define SMP_MSG_RESCHEDULE 1 30#define SMP_MSG_RESCHEDULE 1
40#define SMP_MSG_NR 2 31#define SMP_MSG_FUNCTION_SINGLE 2
32#define SMP_MSG_NR 3
41 33
42void plat_smp_setup(void); 34void plat_smp_setup(void);
43void plat_prepare_cpus(unsigned int max_cpus); 35void plat_prepare_cpus(unsigned int max_cpus);
@@ -46,6 +38,8 @@ void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
46void plat_send_ipi(unsigned int cpu, unsigned int message); 38void plat_send_ipi(unsigned int cpu, unsigned int message);
47int plat_register_ipi_handler(unsigned int message, 39int plat_register_ipi_handler(unsigned int message,
48 void (*handler)(void *), void *arg); 40 void (*handler)(void *), void *arg);
41extern void arch_send_call_function_single_ipi(int cpu);
42extern void arch_send_call_function_ipi(cpumask_t mask);
49 43
50#else 44#else
51 45
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h
index e6d561599726..b61e74bea06a 100644
--- a/include/asm-sparc/smp.h
+++ b/include/asm-sparc/smp.h
@@ -72,7 +72,7 @@ static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
72 unsigned long arg3, unsigned long arg4, unsigned long arg5) 72 unsigned long arg3, unsigned long arg4, unsigned long arg5)
73{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } 73{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
74 74
75static inline int smp_call_function(void (*func)(void *info), void *info, int nonatomic, int wait) 75static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
76{ 76{
77 xc1((smpfunc_t)func, (unsigned long)info); 77 xc1((smpfunc_t)func, (unsigned long)info);
78 return 0; 78 return 0;
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
index 18f067c310f7..77ba51df5668 100644
--- a/include/asm-x86/hw_irq.h
+++ b/include/asm-x86/hw_irq.h
@@ -48,6 +48,7 @@ extern void irq_move_cleanup_interrupt(void);
48extern void threshold_interrupt(void); 48extern void threshold_interrupt(void);
49 49
50extern void call_function_interrupt(void); 50extern void call_function_interrupt(void);
51extern void call_function_single_interrupt(void);
51 52
52/* PIC specific functions */ 53/* PIC specific functions */
53extern void disable_8259A_irq(unsigned int irq); 54extern void disable_8259A_irq(unsigned int irq);
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
index 0ac864ef3cd4..90b1d1f12f08 100644
--- a/include/asm-x86/irq_vectors.h
+++ b/include/asm-x86/irq_vectors.h
@@ -64,6 +64,7 @@
64# define INVALIDATE_TLB_VECTOR 0xfd 64# define INVALIDATE_TLB_VECTOR 0xfd
65# define RESCHEDULE_VECTOR 0xfc 65# define RESCHEDULE_VECTOR 0xfc
66# define CALL_FUNCTION_VECTOR 0xfb 66# define CALL_FUNCTION_VECTOR 0xfb
67# define CALL_FUNCTION_SINGLE_VECTOR 0xfa
67# define THERMAL_APIC_VECTOR 0xf0 68# define THERMAL_APIC_VECTOR 0xf0
68 69
69#else 70#else
@@ -72,6 +73,7 @@
72#define ERROR_APIC_VECTOR 0xfe 73#define ERROR_APIC_VECTOR 0xfe
73#define RESCHEDULE_VECTOR 0xfd 74#define RESCHEDULE_VECTOR 0xfd
74#define CALL_FUNCTION_VECTOR 0xfc 75#define CALL_FUNCTION_VECTOR 0xfc
76#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
75#define THERMAL_APIC_VECTOR 0xfa 77#define THERMAL_APIC_VECTOR 0xfa
76#define THRESHOLD_APIC_VECTOR 0xf9 78#define THRESHOLD_APIC_VECTOR 0xf9
77#define INVALIDATE_TLB_VECTOR_END 0xf7 79#define INVALIDATE_TLB_VECTOR_END 0xf7
@@ -143,6 +145,7 @@
143#define VIC_RESCHEDULE_CPI 4 145#define VIC_RESCHEDULE_CPI 4
144#define VIC_ENABLE_IRQ_CPI 5 146#define VIC_ENABLE_IRQ_CPI 5
145#define VIC_CALL_FUNCTION_CPI 6 147#define VIC_CALL_FUNCTION_CPI 6
148#define VIC_CALL_FUNCTION_SINGLE_CPI 7
146 149
147/* Now the QIC CPIs: Since we don't need the two initial levels, 150/* Now the QIC CPIs: Since we don't need the two initial levels,
148 * these are 2 less than the VIC CPIs */ 151 * these are 2 less than the VIC CPIs */
@@ -152,9 +155,10 @@
152#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) 155#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
153#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) 156#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
154#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) 157#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
158#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
155 159
156#define VIC_START_FAKE_CPI VIC_TIMER_CPI 160#define VIC_START_FAKE_CPI VIC_TIMER_CPI
157#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI 161#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
158 162
159/* this is the SYS_INT CPI. */ 163/* this is the SYS_INT CPI. */
160#define VIC_SYS_INT 8 164#define VIC_SYS_INT 8
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
index bc861469bdba..9283b60a1dd2 100644
--- a/include/asm-x86/mach-default/entry_arch.h
+++ b/include/asm-x86/mach-default/entry_arch.h
@@ -13,6 +13,7 @@
13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) 13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) 14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) 15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
16#endif 17#endif
17 18
18/* 19/*
diff --git a/include/asm-x86/mach-visws/entry_arch.h b/include/asm-x86/mach-visws/entry_arch.h
index b183fa6d83d9..86be554342d4 100644
--- a/include/asm-x86/mach-visws/entry_arch.h
+++ b/include/asm-x86/mach-visws/entry_arch.h
@@ -1,23 +1,5 @@
1/* 1/*
2 * The following vectors are part of the Linux architecture, there 2 * VISWS uses the standard Linux entry points:
3 * is no hardware IRQ pin equivalent for them, they are triggered
4 * through the ICC by us (IPIs)
5 */ 3 */
6#ifdef CONFIG_X86_SMP
7BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
8BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
9BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
10#endif
11 4
12/* 5#include "../mach-default/entry_arch.h"
13 * every pentium local APIC has two 'local interrupts', with a
14 * soft-definable vector attached to both interrupts, one of
15 * which is a timer interrupt, the other one is error counter
16 * overflow. Linux uses the local APIC timer interrupt to get
17 * a much simpler SMP time architecture:
18 */
19#ifdef CONFIG_X86_LOCAL_APIC
20BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
21BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
22BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
23#endif
diff --git a/include/asm-x86/mach-voyager/entry_arch.h b/include/asm-x86/mach-voyager/entry_arch.h
index 4a1e1e8c10b6..ae52624b5937 100644
--- a/include/asm-x86/mach-voyager/entry_arch.h
+++ b/include/asm-x86/mach-voyager/entry_arch.h
@@ -23,4 +23,4 @@ BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); 23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); 24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); 25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
26 26BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 2e221f1ce0b2..c2784b3e0b77 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -50,9 +50,9 @@ struct smp_ops {
50 50
51 void (*smp_send_stop)(void); 51 void (*smp_send_stop)(void);
52 void (*smp_send_reschedule)(int cpu); 52 void (*smp_send_reschedule)(int cpu);
53 int (*smp_call_function_mask)(cpumask_t mask, 53
54 void (*func)(void *info), void *info, 54 void (*send_call_func_ipi)(cpumask_t mask);
55 int wait); 55 void (*send_call_func_single_ipi)(int cpu);
56}; 56};
57 57
58/* Globals due to paravirt */ 58/* Globals due to paravirt */
@@ -94,17 +94,22 @@ static inline void smp_send_reschedule(int cpu)
94 smp_ops.smp_send_reschedule(cpu); 94 smp_ops.smp_send_reschedule(cpu);
95} 95}
96 96
97static inline int smp_call_function_mask(cpumask_t mask, 97static inline void arch_send_call_function_single_ipi(int cpu)
98 void (*func) (void *info), void *info, 98{
99 int wait) 99 smp_ops.send_call_func_single_ipi(cpu);
100}
101
102static inline void arch_send_call_function_ipi(cpumask_t mask)
100{ 103{
101 return smp_ops.smp_call_function_mask(mask, func, info, wait); 104 smp_ops.send_call_func_ipi(mask);
102} 105}
103 106
104void native_smp_prepare_boot_cpu(void); 107void native_smp_prepare_boot_cpu(void);
105void native_smp_prepare_cpus(unsigned int max_cpus); 108void native_smp_prepare_cpus(unsigned int max_cpus);
106void native_smp_cpus_done(unsigned int max_cpus); 109void native_smp_cpus_done(unsigned int max_cpus);
107int native_cpu_up(unsigned int cpunum); 110int native_cpu_up(unsigned int cpunum);
111void native_send_call_func_ipi(cpumask_t mask);
112void native_send_call_func_single_ipi(int cpu);
108 113
109extern int __cpu_disable(void); 114extern int __cpu_disable(void);
110extern void __cpu_die(unsigned int cpu); 115extern void __cpu_die(unsigned int cpu);
@@ -197,7 +202,5 @@ static inline int hard_smp_processor_id(void)
197extern void cpu_uninit(void); 202extern void cpu_uninit(void);
198#endif 203#endif
199 204
200extern void lock_ipi_call_lock(void);
201extern void unlock_ipi_call_lock(void);
202#endif /* __ASSEMBLY__ */ 205#endif /* __ASSEMBLY__ */
203#endif 206#endif
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
index 596312a7bfc9..f8d57ea1f05f 100644
--- a/include/asm-x86/xen/events.h
+++ b/include/asm-x86/xen/events.h
@@ -4,6 +4,7 @@
4enum ipi_vector { 4enum ipi_vector {
5 XEN_RESCHEDULE_VECTOR, 5 XEN_RESCHEDULE_VECTOR,
6 XEN_CALL_FUNCTION_VECTOR, 6 XEN_CALL_FUNCTION_VECTOR,
7 XEN_CALL_FUNCTION_SINGLE_VECTOR,
7 8
8 XEN_NR_IPIS, 9 XEN_NR_IPIS,
9}; 10};
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index d982eb89c77d..98202c672fde 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -3,6 +3,7 @@
3 3
4#include <asm/atomic.h> 4#include <asm/atomic.h>
5#include <linux/list.h> 5#include <linux/list.h>
6#include <linux/rculist.h>
6#include <linux/spinlock.h> 7#include <linux/spinlock.h>
7#include <linux/cache.h> 8#include <linux/cache.h>
8#include <linux/rcupdate.h> 9#include <linux/rcupdate.h>
diff --git a/include/linux/list.h b/include/linux/list.h
index 08cf4f651889..139ec41d9c2e 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -85,65 +85,6 @@ static inline void list_add_tail(struct list_head *new, struct list_head *head)
85} 85}
86 86
87/* 87/*
88 * Insert a new entry between two known consecutive entries.
89 *
90 * This is only for internal list manipulation where we know
91 * the prev/next entries already!
92 */
93static inline void __list_add_rcu(struct list_head * new,
94 struct list_head * prev, struct list_head * next)
95{
96 new->next = next;
97 new->prev = prev;
98 smp_wmb();
99 next->prev = new;
100 prev->next = new;
101}
102
103/**
104 * list_add_rcu - add a new entry to rcu-protected list
105 * @new: new entry to be added
106 * @head: list head to add it after
107 *
108 * Insert a new entry after the specified head.
109 * This is good for implementing stacks.
110 *
111 * The caller must take whatever precautions are necessary
112 * (such as holding appropriate locks) to avoid racing
113 * with another list-mutation primitive, such as list_add_rcu()
114 * or list_del_rcu(), running on this same list.
115 * However, it is perfectly legal to run concurrently with
116 * the _rcu list-traversal primitives, such as
117 * list_for_each_entry_rcu().
118 */
119static inline void list_add_rcu(struct list_head *new, struct list_head *head)
120{
121 __list_add_rcu(new, head, head->next);
122}
123
124/**
125 * list_add_tail_rcu - add a new entry to rcu-protected list
126 * @new: new entry to be added
127 * @head: list head to add it before
128 *
129 * Insert a new entry before the specified head.
130 * This is useful for implementing queues.
131 *
132 * The caller must take whatever precautions are necessary
133 * (such as holding appropriate locks) to avoid racing
134 * with another list-mutation primitive, such as list_add_tail_rcu()
135 * or list_del_rcu(), running on this same list.
136 * However, it is perfectly legal to run concurrently with
137 * the _rcu list-traversal primitives, such as
138 * list_for_each_entry_rcu().
139 */
140static inline void list_add_tail_rcu(struct list_head *new,
141 struct list_head *head)
142{
143 __list_add_rcu(new, head->prev, head);
144}
145
146/*
147 * Delete a list entry by making the prev/next entries 88 * Delete a list entry by making the prev/next entries
148 * point to each other. 89 * point to each other.
149 * 90 *
@@ -174,36 +115,6 @@ extern void list_del(struct list_head *entry);
174#endif 115#endif
175 116
176/** 117/**
177 * list_del_rcu - deletes entry from list without re-initialization
178 * @entry: the element to delete from the list.
179 *
180 * Note: list_empty() on entry does not return true after this,
181 * the entry is in an undefined state. It is useful for RCU based
182 * lockfree traversal.
183 *
184 * In particular, it means that we can not poison the forward
185 * pointers that may still be used for walking the list.
186 *
187 * The caller must take whatever precautions are necessary
188 * (such as holding appropriate locks) to avoid racing
189 * with another list-mutation primitive, such as list_del_rcu()
190 * or list_add_rcu(), running on this same list.
191 * However, it is perfectly legal to run concurrently with
192 * the _rcu list-traversal primitives, such as
193 * list_for_each_entry_rcu().
194 *
195 * Note that the caller is not permitted to immediately free
196 * the newly deleted entry. Instead, either synchronize_rcu()
197 * or call_rcu() must be used to defer freeing until an RCU
198 * grace period has elapsed.
199 */
200static inline void list_del_rcu(struct list_head *entry)
201{
202 __list_del(entry->prev, entry->next);
203 entry->prev = LIST_POISON2;
204}
205
206/**
207 * list_replace - replace old entry by new one 118 * list_replace - replace old entry by new one
208 * @old : the element to be replaced 119 * @old : the element to be replaced
209 * @new : the new element to insert 120 * @new : the new element to insert
@@ -227,25 +138,6 @@ static inline void list_replace_init(struct list_head *old,
227} 138}
228 139
229/** 140/**
230 * list_replace_rcu - replace old entry by new one
231 * @old : the element to be replaced
232 * @new : the new element to insert
233 *
234 * The @old entry will be replaced with the @new entry atomically.
235 * Note: @old should not be empty.
236 */
237static inline void list_replace_rcu(struct list_head *old,
238 struct list_head *new)
239{
240 new->next = old->next;
241 new->prev = old->prev;
242 smp_wmb();
243 new->next->prev = new;
244 new->prev->next = new;
245 old->prev = LIST_POISON2;
246}
247
248/**
249 * list_del_init - deletes entry from list and reinitialize it. 141 * list_del_init - deletes entry from list and reinitialize it.
250 * @entry: the element to delete from the list. 142 * @entry: the element to delete from the list.
251 */ 143 */
@@ -369,62 +261,6 @@ static inline void list_splice_init(struct list_head *list,
369} 261}
370 262
371/** 263/**
372 * list_splice_init_rcu - splice an RCU-protected list into an existing list.
373 * @list: the RCU-protected list to splice
374 * @head: the place in the list to splice the first list into
375 * @sync: function to sync: synchronize_rcu(), synchronize_sched(), ...
376 *
377 * @head can be RCU-read traversed concurrently with this function.
378 *
379 * Note that this function blocks.
380 *
381 * Important note: the caller must take whatever action is necessary to
382 * prevent any other updates to @head. In principle, it is possible
383 * to modify the list as soon as sync() begins execution.
384 * If this sort of thing becomes necessary, an alternative version
385 * based on call_rcu() could be created. But only if -really-
386 * needed -- there is no shortage of RCU API members.
387 */
388static inline void list_splice_init_rcu(struct list_head *list,
389 struct list_head *head,
390 void (*sync)(void))
391{
392 struct list_head *first = list->next;
393 struct list_head *last = list->prev;
394 struct list_head *at = head->next;
395
396 if (list_empty(head))
397 return;
398
399 /* "first" and "last" tracking list, so initialize it. */
400
401 INIT_LIST_HEAD(list);
402
403 /*
404 * At this point, the list body still points to the source list.
405 * Wait for any readers to finish using the list before splicing
406 * the list body into the new list. Any new readers will see
407 * an empty list.
408 */
409
410 sync();
411
412 /*
413 * Readers are finished with the source list, so perform splice.
414 * The order is important if the new list is global and accessible
415 * to concurrent RCU readers. Note that RCU readers are not
416 * permitted to traverse the prev pointers without excluding
417 * this function.
418 */
419
420 last->next = at;
421 smp_wmb();
422 head->next = first;
423 first->prev = head;
424 at->prev = last;
425}
426
427/**
428 * list_entry - get the struct for this entry 264 * list_entry - get the struct for this entry
429 * @ptr: the &struct list_head pointer. 265 * @ptr: the &struct list_head pointer.
430 * @type: the type of the struct this is embedded in. 266 * @type: the type of the struct this is embedded in.
@@ -629,57 +465,6 @@ static inline void list_splice_init_rcu(struct list_head *list,
629 &pos->member != (head); \ 465 &pos->member != (head); \
630 pos = n, n = list_entry(n->member.prev, typeof(*n), member)) 466 pos = n, n = list_entry(n->member.prev, typeof(*n), member))
631 467
632/**
633 * list_for_each_rcu - iterate over an rcu-protected list
634 * @pos: the &struct list_head to use as a loop cursor.
635 * @head: the head for your list.
636 *
637 * This list-traversal primitive may safely run concurrently with
638 * the _rcu list-mutation primitives such as list_add_rcu()
639 * as long as the traversal is guarded by rcu_read_lock().
640 */
641#define list_for_each_rcu(pos, head) \
642 for (pos = rcu_dereference((head)->next); \
643 prefetch(pos->next), pos != (head); \
644 pos = rcu_dereference(pos->next))
645
646#define __list_for_each_rcu(pos, head) \
647 for (pos = rcu_dereference((head)->next); \
648 pos != (head); \
649 pos = rcu_dereference(pos->next))
650
651/**
652 * list_for_each_entry_rcu - iterate over rcu list of given type
653 * @pos: the type * to use as a loop cursor.
654 * @head: the head for your list.
655 * @member: the name of the list_struct within the struct.
656 *
657 * This list-traversal primitive may safely run concurrently with
658 * the _rcu list-mutation primitives such as list_add_rcu()
659 * as long as the traversal is guarded by rcu_read_lock().
660 */
661#define list_for_each_entry_rcu(pos, head, member) \
662 for (pos = list_entry(rcu_dereference((head)->next), typeof(*pos), member); \
663 prefetch(pos->member.next), &pos->member != (head); \
664 pos = list_entry(rcu_dereference(pos->member.next), typeof(*pos), member))
665
666
667/**
668 * list_for_each_continue_rcu
669 * @pos: the &struct list_head to use as a loop cursor.
670 * @head: the head for your list.
671 *
672 * Iterate over an rcu-protected list, continuing after current point.
673 *
674 * This list-traversal primitive may safely run concurrently with
675 * the _rcu list-mutation primitives such as list_add_rcu()
676 * as long as the traversal is guarded by rcu_read_lock().
677 */
678#define list_for_each_continue_rcu(pos, head) \
679 for ((pos) = rcu_dereference((pos)->next); \
680 prefetch((pos)->next), (pos) != (head); \
681 (pos) = rcu_dereference((pos)->next))
682
683/* 468/*
684 * Double linked lists with a single pointer list head. 469 * Double linked lists with a single pointer list head.
685 * Mostly useful for hash tables where the two pointer list head is 470 * Mostly useful for hash tables where the two pointer list head is
@@ -730,31 +515,6 @@ static inline void hlist_del(struct hlist_node *n)
730 n->pprev = LIST_POISON2; 515 n->pprev = LIST_POISON2;
731} 516}
732 517
733/**
734 * hlist_del_rcu - deletes entry from hash list without re-initialization
735 * @n: the element to delete from the hash list.
736 *
737 * Note: list_unhashed() on entry does not return true after this,
738 * the entry is in an undefined state. It is useful for RCU based
739 * lockfree traversal.
740 *
741 * In particular, it means that we can not poison the forward
742 * pointers that may still be used for walking the hash list.
743 *
744 * The caller must take whatever precautions are necessary
745 * (such as holding appropriate locks) to avoid racing
746 * with another list-mutation primitive, such as hlist_add_head_rcu()
747 * or hlist_del_rcu(), running on this same list.
748 * However, it is perfectly legal to run concurrently with
749 * the _rcu list-traversal primitives, such as
750 * hlist_for_each_entry().
751 */
752static inline void hlist_del_rcu(struct hlist_node *n)
753{
754 __hlist_del(n);
755 n->pprev = LIST_POISON2;
756}
757
758static inline void hlist_del_init(struct hlist_node *n) 518static inline void hlist_del_init(struct hlist_node *n)
759{ 519{
760 if (!hlist_unhashed(n)) { 520 if (!hlist_unhashed(n)) {
@@ -763,27 +523,6 @@ static inline void hlist_del_init(struct hlist_node *n)
763 } 523 }
764} 524}
765 525
766/**
767 * hlist_replace_rcu - replace old entry by new one
768 * @old : the element to be replaced
769 * @new : the new element to insert
770 *
771 * The @old entry will be replaced with the @new entry atomically.
772 */
773static inline void hlist_replace_rcu(struct hlist_node *old,
774 struct hlist_node *new)
775{
776 struct hlist_node *next = old->next;
777
778 new->next = next;
779 new->pprev = old->pprev;
780 smp_wmb();
781 if (next)
782 new->next->pprev = &new->next;
783 *new->pprev = new;
784 old->pprev = LIST_POISON2;
785}
786
787static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) 526static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
788{ 527{
789 struct hlist_node *first = h->first; 528 struct hlist_node *first = h->first;
@@ -794,38 +533,6 @@ static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
794 n->pprev = &h->first; 533 n->pprev = &h->first;
795} 534}
796 535
797
798/**
799 * hlist_add_head_rcu
800 * @n: the element to add to the hash list.
801 * @h: the list to add to.
802 *
803 * Description:
804 * Adds the specified element to the specified hlist,
805 * while permitting racing traversals.
806 *
807 * The caller must take whatever precautions are necessary
808 * (such as holding appropriate locks) to avoid racing
809 * with another list-mutation primitive, such as hlist_add_head_rcu()
810 * or hlist_del_rcu(), running on this same list.
811 * However, it is perfectly legal to run concurrently with
812 * the _rcu list-traversal primitives, such as
813 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
814 * problems on Alpha CPUs. Regardless of the type of CPU, the
815 * list-traversal primitive must be guarded by rcu_read_lock().
816 */
817static inline void hlist_add_head_rcu(struct hlist_node *n,
818 struct hlist_head *h)
819{
820 struct hlist_node *first = h->first;
821 n->next = first;
822 n->pprev = &h->first;
823 smp_wmb();
824 if (first)
825 first->pprev = &n->next;
826 h->first = n;
827}
828
829/* next must be != NULL */ 536/* next must be != NULL */
830static inline void hlist_add_before(struct hlist_node *n, 537static inline void hlist_add_before(struct hlist_node *n,
831 struct hlist_node *next) 538 struct hlist_node *next)
@@ -847,63 +554,6 @@ static inline void hlist_add_after(struct hlist_node *n,
847 next->next->pprev = &next->next; 554 next->next->pprev = &next->next;
848} 555}
849 556
850/**
851 * hlist_add_before_rcu
852 * @n: the new element to add to the hash list.
853 * @next: the existing element to add the new element before.
854 *
855 * Description:
856 * Adds the specified element to the specified hlist
857 * before the specified node while permitting racing traversals.
858 *
859 * The caller must take whatever precautions are necessary
860 * (such as holding appropriate locks) to avoid racing
861 * with another list-mutation primitive, such as hlist_add_head_rcu()
862 * or hlist_del_rcu(), running on this same list.
863 * However, it is perfectly legal to run concurrently with
864 * the _rcu list-traversal primitives, such as
865 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
866 * problems on Alpha CPUs.
867 */
868static inline void hlist_add_before_rcu(struct hlist_node *n,
869 struct hlist_node *next)
870{
871 n->pprev = next->pprev;
872 n->next = next;
873 smp_wmb();
874 next->pprev = &n->next;
875 *(n->pprev) = n;
876}
877
878/**
879 * hlist_add_after_rcu
880 * @prev: the existing element to add the new element after.
881 * @n: the new element to add to the hash list.
882 *
883 * Description:
884 * Adds the specified element to the specified hlist
885 * after the specified node while permitting racing traversals.
886 *
887 * The caller must take whatever precautions are necessary
888 * (such as holding appropriate locks) to avoid racing
889 * with another list-mutation primitive, such as hlist_add_head_rcu()
890 * or hlist_del_rcu(), running on this same list.
891 * However, it is perfectly legal to run concurrently with
892 * the _rcu list-traversal primitives, such as
893 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
894 * problems on Alpha CPUs.
895 */
896static inline void hlist_add_after_rcu(struct hlist_node *prev,
897 struct hlist_node *n)
898{
899 n->next = prev->next;
900 n->pprev = &prev->next;
901 smp_wmb();
902 prev->next = n;
903 if (n->next)
904 n->next->pprev = &n->next;
905}
906
907#define hlist_entry(ptr, type, member) container_of(ptr,type,member) 557#define hlist_entry(ptr, type, member) container_of(ptr,type,member)
908 558
909#define hlist_for_each(pos, head) \ 559#define hlist_for_each(pos, head) \
@@ -964,21 +614,4 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev,
964 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \ 614 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
965 pos = n) 615 pos = n)
966 616
967/**
968 * hlist_for_each_entry_rcu - iterate over rcu list of given type
969 * @tpos: the type * to use as a loop cursor.
970 * @pos: the &struct hlist_node to use as a loop cursor.
971 * @head: the head for your list.
972 * @member: the name of the hlist_node within the struct.
973 *
974 * This list-traversal primitive may safely run concurrently with
975 * the _rcu list-mutation primitives such as hlist_add_head_rcu()
976 * as long as the traversal is guarded by rcu_read_lock().
977 */
978#define hlist_for_each_entry_rcu(tpos, pos, head, member) \
979 for (pos = rcu_dereference((head)->first); \
980 pos && ({ prefetch(pos->next); 1;}) && \
981 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
982 pos = rcu_dereference(pos->next))
983
984#endif 617#endif
diff --git a/include/linux/rcuclassic.h b/include/linux/rcuclassic.h
index b3aa05baab8a..8c774905dcfe 100644
--- a/include/linux/rcuclassic.h
+++ b/include/linux/rcuclassic.h
@@ -151,7 +151,10 @@ extern struct lockdep_map rcu_lock_map;
151 151
152#define __synchronize_sched() synchronize_rcu() 152#define __synchronize_sched() synchronize_rcu()
153 153
154#define call_rcu_sched(head, func) call_rcu(head, func)
155
154extern void __rcu_init(void); 156extern void __rcu_init(void);
157#define rcu_init_sched() do { } while (0)
155extern void rcu_check_callbacks(int cpu, int user); 158extern void rcu_check_callbacks(int cpu, int user);
156extern void rcu_restart_cpu(int cpu); 159extern void rcu_restart_cpu(int cpu);
157 160
diff --git a/include/linux/rculist.h b/include/linux/rculist.h
index bde4586f4382..b0f39be08b6c 100644
--- a/include/linux/rculist.h
+++ b/include/linux/rculist.h
@@ -1,6 +1,373 @@
1#ifndef _LINUX_RCULIST_H 1#ifndef _LINUX_RCULIST_H
2#define _LINUX_RCULIST_H 2#define _LINUX_RCULIST_H
3 3
4#ifdef __KERNEL__
5
6/*
7 * RCU-protected list version
8 */
4#include <linux/list.h> 9#include <linux/list.h>
10#include <linux/rcupdate.h>
11
12/*
13 * Insert a new entry between two known consecutive entries.
14 *
15 * This is only for internal list manipulation where we know
16 * the prev/next entries already!
17 */
18static inline void __list_add_rcu(struct list_head *new,
19 struct list_head *prev, struct list_head *next)
20{
21 new->next = next;
22 new->prev = prev;
23 rcu_assign_pointer(prev->next, new);
24 next->prev = new;
25}
26
27/**
28 * list_add_rcu - add a new entry to rcu-protected list
29 * @new: new entry to be added
30 * @head: list head to add it after
31 *
32 * Insert a new entry after the specified head.
33 * This is good for implementing stacks.
34 *
35 * The caller must take whatever precautions are necessary
36 * (such as holding appropriate locks) to avoid racing
37 * with another list-mutation primitive, such as list_add_rcu()
38 * or list_del_rcu(), running on this same list.
39 * However, it is perfectly legal to run concurrently with
40 * the _rcu list-traversal primitives, such as
41 * list_for_each_entry_rcu().
42 */
43static inline void list_add_rcu(struct list_head *new, struct list_head *head)
44{
45 __list_add_rcu(new, head, head->next);
46}
47
48/**
49 * list_add_tail_rcu - add a new entry to rcu-protected list
50 * @new: new entry to be added
51 * @head: list head to add it before
52 *
53 * Insert a new entry before the specified head.
54 * This is useful for implementing queues.
55 *
56 * The caller must take whatever precautions are necessary
57 * (such as holding appropriate locks) to avoid racing
58 * with another list-mutation primitive, such as list_add_tail_rcu()
59 * or list_del_rcu(), running on this same list.
60 * However, it is perfectly legal to run concurrently with
61 * the _rcu list-traversal primitives, such as
62 * list_for_each_entry_rcu().
63 */
64static inline void list_add_tail_rcu(struct list_head *new,
65 struct list_head *head)
66{
67 __list_add_rcu(new, head->prev, head);
68}
69
70/**
71 * list_del_rcu - deletes entry from list without re-initialization
72 * @entry: the element to delete from the list.
73 *
74 * Note: list_empty() on entry does not return true after this,
75 * the entry is in an undefined state. It is useful for RCU based
76 * lockfree traversal.
77 *
78 * In particular, it means that we can not poison the forward
79 * pointers that may still be used for walking the list.
80 *
81 * The caller must take whatever precautions are necessary
82 * (such as holding appropriate locks) to avoid racing
83 * with another list-mutation primitive, such as list_del_rcu()
84 * or list_add_rcu(), running on this same list.
85 * However, it is perfectly legal to run concurrently with
86 * the _rcu list-traversal primitives, such as
87 * list_for_each_entry_rcu().
88 *
89 * Note that the caller is not permitted to immediately free
90 * the newly deleted entry. Instead, either synchronize_rcu()
91 * or call_rcu() must be used to defer freeing until an RCU
92 * grace period has elapsed.
93 */
94static inline void list_del_rcu(struct list_head *entry)
95{
96 __list_del(entry->prev, entry->next);
97 entry->prev = LIST_POISON2;
98}
99
100/**
101 * list_replace_rcu - replace old entry by new one
102 * @old : the element to be replaced
103 * @new : the new element to insert
104 *
105 * The @old entry will be replaced with the @new entry atomically.
106 * Note: @old should not be empty.
107 */
108static inline void list_replace_rcu(struct list_head *old,
109 struct list_head *new)
110{
111 new->next = old->next;
112 new->prev = old->prev;
113 rcu_assign_pointer(new->prev->next, new);
114 new->next->prev = new;
115 old->prev = LIST_POISON2;
116}
117
118/**
119 * list_splice_init_rcu - splice an RCU-protected list into an existing list.
120 * @list: the RCU-protected list to splice
121 * @head: the place in the list to splice the first list into
122 * @sync: function to sync: synchronize_rcu(), synchronize_sched(), ...
123 *
124 * @head can be RCU-read traversed concurrently with this function.
125 *
126 * Note that this function blocks.
127 *
128 * Important note: the caller must take whatever action is necessary to
129 * prevent any other updates to @head. In principle, it is possible
130 * to modify the list as soon as sync() begins execution.
131 * If this sort of thing becomes necessary, an alternative version
132 * based on call_rcu() could be created. But only if -really-
133 * needed -- there is no shortage of RCU API members.
134 */
135static inline void list_splice_init_rcu(struct list_head *list,
136 struct list_head *head,
137 void (*sync)(void))
138{
139 struct list_head *first = list->next;
140 struct list_head *last = list->prev;
141 struct list_head *at = head->next;
142
143 if (list_empty(head))
144 return;
145
146 /* "first" and "last" tracking list, so initialize it. */
147
148 INIT_LIST_HEAD(list);
149
150 /*
151 * At this point, the list body still points to the source list.
152 * Wait for any readers to finish using the list before splicing
153 * the list body into the new list. Any new readers will see
154 * an empty list.
155 */
156
157 sync();
158
159 /*
160 * Readers are finished with the source list, so perform splice.
161 * The order is important if the new list is global and accessible
162 * to concurrent RCU readers. Note that RCU readers are not
163 * permitted to traverse the prev pointers without excluding
164 * this function.
165 */
166
167 last->next = at;
168 rcu_assign_pointer(head->next, first);
169 first->prev = head;
170 at->prev = last;
171}
172
173/**
174 * list_for_each_rcu - iterate over an rcu-protected list
175 * @pos: the &struct list_head to use as a loop cursor.
176 * @head: the head for your list.
177 *
178 * This list-traversal primitive may safely run concurrently with
179 * the _rcu list-mutation primitives such as list_add_rcu()
180 * as long as the traversal is guarded by rcu_read_lock().
181 */
182#define list_for_each_rcu(pos, head) \
183 for (pos = rcu_dereference((head)->next); \
184 prefetch(pos->next), pos != (head); \
185 pos = rcu_dereference(pos->next))
186
187#define __list_for_each_rcu(pos, head) \
188 for (pos = rcu_dereference((head)->next); \
189 pos != (head); \
190 pos = rcu_dereference(pos->next))
191
192/**
193 * list_for_each_entry_rcu - iterate over rcu list of given type
194 * @pos: the type * to use as a loop cursor.
195 * @head: the head for your list.
196 * @member: the name of the list_struct within the struct.
197 *
198 * This list-traversal primitive may safely run concurrently with
199 * the _rcu list-mutation primitives such as list_add_rcu()
200 * as long as the traversal is guarded by rcu_read_lock().
201 */
202#define list_for_each_entry_rcu(pos, head, member) \
203 for (pos = list_entry(rcu_dereference((head)->next), typeof(*pos), member); \
204 prefetch(pos->member.next), &pos->member != (head); \
205 pos = list_entry(rcu_dereference(pos->member.next), typeof(*pos), member))
206
207
208/**
209 * list_for_each_continue_rcu
210 * @pos: the &struct list_head to use as a loop cursor.
211 * @head: the head for your list.
212 *
213 * Iterate over an rcu-protected list, continuing after current point.
214 *
215 * This list-traversal primitive may safely run concurrently with
216 * the _rcu list-mutation primitives such as list_add_rcu()
217 * as long as the traversal is guarded by rcu_read_lock().
218 */
219#define list_for_each_continue_rcu(pos, head) \
220 for ((pos) = rcu_dereference((pos)->next); \
221 prefetch((pos)->next), (pos) != (head); \
222 (pos) = rcu_dereference((pos)->next))
223
224/**
225 * hlist_del_rcu - deletes entry from hash list without re-initialization
226 * @n: the element to delete from the hash list.
227 *
228 * Note: list_unhashed() on entry does not return true after this,
229 * the entry is in an undefined state. It is useful for RCU based
230 * lockfree traversal.
231 *
232 * In particular, it means that we can not poison the forward
233 * pointers that may still be used for walking the hash list.
234 *
235 * The caller must take whatever precautions are necessary
236 * (such as holding appropriate locks) to avoid racing
237 * with another list-mutation primitive, such as hlist_add_head_rcu()
238 * or hlist_del_rcu(), running on this same list.
239 * However, it is perfectly legal to run concurrently with
240 * the _rcu list-traversal primitives, such as
241 * hlist_for_each_entry().
242 */
243static inline void hlist_del_rcu(struct hlist_node *n)
244{
245 __hlist_del(n);
246 n->pprev = LIST_POISON2;
247}
248
249/**
250 * hlist_replace_rcu - replace old entry by new one
251 * @old : the element to be replaced
252 * @new : the new element to insert
253 *
254 * The @old entry will be replaced with the @new entry atomically.
255 */
256static inline void hlist_replace_rcu(struct hlist_node *old,
257 struct hlist_node *new)
258{
259 struct hlist_node *next = old->next;
260
261 new->next = next;
262 new->pprev = old->pprev;
263 rcu_assign_pointer(*new->pprev, new);
264 if (next)
265 new->next->pprev = &new->next;
266 old->pprev = LIST_POISON2;
267}
268
269/**
270 * hlist_add_head_rcu
271 * @n: the element to add to the hash list.
272 * @h: the list to add to.
273 *
274 * Description:
275 * Adds the specified element to the specified hlist,
276 * while permitting racing traversals.
277 *
278 * The caller must take whatever precautions are necessary
279 * (such as holding appropriate locks) to avoid racing
280 * with another list-mutation primitive, such as hlist_add_head_rcu()
281 * or hlist_del_rcu(), running on this same list.
282 * However, it is perfectly legal to run concurrently with
283 * the _rcu list-traversal primitives, such as
284 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
285 * problems on Alpha CPUs. Regardless of the type of CPU, the
286 * list-traversal primitive must be guarded by rcu_read_lock().
287 */
288static inline void hlist_add_head_rcu(struct hlist_node *n,
289 struct hlist_head *h)
290{
291 struct hlist_node *first = h->first;
292
293 n->next = first;
294 n->pprev = &h->first;
295 rcu_assign_pointer(h->first, n);
296 if (first)
297 first->pprev = &n->next;
298}
299
300/**
301 * hlist_add_before_rcu
302 * @n: the new element to add to the hash list.
303 * @next: the existing element to add the new element before.
304 *
305 * Description:
306 * Adds the specified element to the specified hlist
307 * before the specified node while permitting racing traversals.
308 *
309 * The caller must take whatever precautions are necessary
310 * (such as holding appropriate locks) to avoid racing
311 * with another list-mutation primitive, such as hlist_add_head_rcu()
312 * or hlist_del_rcu(), running on this same list.
313 * However, it is perfectly legal to run concurrently with
314 * the _rcu list-traversal primitives, such as
315 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
316 * problems on Alpha CPUs.
317 */
318static inline void hlist_add_before_rcu(struct hlist_node *n,
319 struct hlist_node *next)
320{
321 n->pprev = next->pprev;
322 n->next = next;
323 rcu_assign_pointer(*(n->pprev), n);
324 next->pprev = &n->next;
325}
326
327/**
328 * hlist_add_after_rcu
329 * @prev: the existing element to add the new element after.
330 * @n: the new element to add to the hash list.
331 *
332 * Description:
333 * Adds the specified element to the specified hlist
334 * after the specified node while permitting racing traversals.
335 *
336 * The caller must take whatever precautions are necessary
337 * (such as holding appropriate locks) to avoid racing
338 * with another list-mutation primitive, such as hlist_add_head_rcu()
339 * or hlist_del_rcu(), running on this same list.
340 * However, it is perfectly legal to run concurrently with
341 * the _rcu list-traversal primitives, such as
342 * hlist_for_each_entry_rcu(), used to prevent memory-consistency
343 * problems on Alpha CPUs.
344 */
345static inline void hlist_add_after_rcu(struct hlist_node *prev,
346 struct hlist_node *n)
347{
348 n->next = prev->next;
349 n->pprev = &prev->next;
350 rcu_assign_pointer(prev->next, n);
351 if (n->next)
352 n->next->pprev = &n->next;
353}
354
355/**
356 * hlist_for_each_entry_rcu - iterate over rcu list of given type
357 * @tpos: the type * to use as a loop cursor.
358 * @pos: the &struct hlist_node to use as a loop cursor.
359 * @head: the head for your list.
360 * @member: the name of the hlist_node within the struct.
361 *
362 * This list-traversal primitive may safely run concurrently with
363 * the _rcu list-mutation primitives such as hlist_add_head_rcu()
364 * as long as the traversal is guarded by rcu_read_lock().
365 */
366#define hlist_for_each_entry_rcu(tpos, pos, head, member) \
367 for (pos = rcu_dereference((head)->first); \
368 pos && ({ prefetch(pos->next); 1; }) && \
369 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
370 pos = rcu_dereference(pos->next))
5 371
6#endif /* _LINUX_RCULIST_H */ 372#endif /* __KERNEL__ */
373#endif
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index d42dbec06083..e8b4039cfb2f 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -40,6 +40,7 @@
40#include <linux/cpumask.h> 40#include <linux/cpumask.h>
41#include <linux/seqlock.h> 41#include <linux/seqlock.h>
42#include <linux/lockdep.h> 42#include <linux/lockdep.h>
43#include <linux/completion.h>
43 44
44/** 45/**
45 * struct rcu_head - callback structure for use with RCU 46 * struct rcu_head - callback structure for use with RCU
@@ -168,6 +169,27 @@ struct rcu_head {
168 (p) = (v); \ 169 (p) = (v); \
169 }) 170 })
170 171
172/* Infrastructure to implement the synchronize_() primitives. */
173
174struct rcu_synchronize {
175 struct rcu_head head;
176 struct completion completion;
177};
178
179extern void wakeme_after_rcu(struct rcu_head *head);
180
181#define synchronize_rcu_xxx(name, func) \
182void name(void) \
183{ \
184 struct rcu_synchronize rcu; \
185 \
186 init_completion(&rcu.completion); \
187 /* Will wake me after RCU finished. */ \
188 func(&rcu.head, wakeme_after_rcu); \
189 /* Wait for it. */ \
190 wait_for_completion(&rcu.completion); \
191}
192
171/** 193/**
172 * synchronize_sched - block until all CPUs have exited any non-preemptive 194 * synchronize_sched - block until all CPUs have exited any non-preemptive
173 * kernel code sequences. 195 * kernel code sequences.
@@ -224,8 +246,8 @@ extern void call_rcu_bh(struct rcu_head *head,
224/* Exported common interfaces */ 246/* Exported common interfaces */
225extern void synchronize_rcu(void); 247extern void synchronize_rcu(void);
226extern void rcu_barrier(void); 248extern void rcu_barrier(void);
227extern long rcu_batches_completed(void); 249extern void rcu_barrier_bh(void);
228extern long rcu_batches_completed_bh(void); 250extern void rcu_barrier_sched(void);
229 251
230/* Internal to kernel */ 252/* Internal to kernel */
231extern void rcu_init(void); 253extern void rcu_init(void);
diff --git a/include/linux/rcupreempt.h b/include/linux/rcupreempt.h
index 8a05c7e20bc4..f04b64eca636 100644
--- a/include/linux/rcupreempt.h
+++ b/include/linux/rcupreempt.h
@@ -40,10 +40,39 @@
40#include <linux/cpumask.h> 40#include <linux/cpumask.h>
41#include <linux/seqlock.h> 41#include <linux/seqlock.h>
42 42
43#define rcu_qsctr_inc(cpu) 43struct rcu_dyntick_sched {
44 int dynticks;
45 int dynticks_snap;
46 int sched_qs;
47 int sched_qs_snap;
48 int sched_dynticks_snap;
49};
50
51DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched);
52
53static inline void rcu_qsctr_inc(int cpu)
54{
55 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
56
57 rdssp->sched_qs++;
58}
44#define rcu_bh_qsctr_inc(cpu) 59#define rcu_bh_qsctr_inc(cpu)
45#define call_rcu_bh(head, rcu) call_rcu(head, rcu) 60#define call_rcu_bh(head, rcu) call_rcu(head, rcu)
46 61
62/**
63 * call_rcu_sched - Queue RCU callback for invocation after sched grace period.
64 * @head: structure to be used for queueing the RCU updates.
65 * @func: actual update function to be invoked after the grace period
66 *
67 * The update function will be invoked some time after a full
68 * synchronize_sched()-style grace period elapses, in other words after
69 * all currently executing preempt-disabled sections of code (including
70 * hardirq handlers, NMI handlers, and local_irq_save() blocks) have
71 * completed.
72 */
73extern void call_rcu_sched(struct rcu_head *head,
74 void (*func)(struct rcu_head *head));
75
47extern void __rcu_read_lock(void) __acquires(RCU); 76extern void __rcu_read_lock(void) __acquires(RCU);
48extern void __rcu_read_unlock(void) __releases(RCU); 77extern void __rcu_read_unlock(void) __releases(RCU);
49extern int rcu_pending(int cpu); 78extern int rcu_pending(int cpu);
@@ -55,6 +84,7 @@ extern int rcu_needs_cpu(int cpu);
55extern void __synchronize_sched(void); 84extern void __synchronize_sched(void);
56 85
57extern void __rcu_init(void); 86extern void __rcu_init(void);
87extern void rcu_init_sched(void);
58extern void rcu_check_callbacks(int cpu, int user); 88extern void rcu_check_callbacks(int cpu, int user);
59extern void rcu_restart_cpu(int cpu); 89extern void rcu_restart_cpu(int cpu);
60extern long rcu_batches_completed(void); 90extern long rcu_batches_completed(void);
@@ -81,20 +111,20 @@ extern struct rcupreempt_trace *rcupreempt_trace_cpu(int cpu);
81struct softirq_action; 111struct softirq_action;
82 112
83#ifdef CONFIG_NO_HZ 113#ifdef CONFIG_NO_HZ
84DECLARE_PER_CPU(long, dynticks_progress_counter); 114DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched);
85 115
86static inline void rcu_enter_nohz(void) 116static inline void rcu_enter_nohz(void)
87{ 117{
88 smp_mb(); /* CPUs seeing ++ must see prior RCU read-side crit sects */ 118 smp_mb(); /* CPUs seeing ++ must see prior RCU read-side crit sects */
89 __get_cpu_var(dynticks_progress_counter)++; 119 __get_cpu_var(rcu_dyntick_sched).dynticks++;
90 WARN_ON(__get_cpu_var(dynticks_progress_counter) & 0x1); 120 WARN_ON(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1);
91} 121}
92 122
93static inline void rcu_exit_nohz(void) 123static inline void rcu_exit_nohz(void)
94{ 124{
95 __get_cpu_var(dynticks_progress_counter)++;
96 smp_mb(); /* CPUs seeing ++ must see later RCU read-side crit sects */ 125 smp_mb(); /* CPUs seeing ++ must see later RCU read-side crit sects */
97 WARN_ON(!(__get_cpu_var(dynticks_progress_counter) & 0x1)); 126 __get_cpu_var(rcu_dyntick_sched).dynticks++;
127 WARN_ON(!(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1));
98} 128}
99 129
100#else /* CONFIG_NO_HZ */ 130#else /* CONFIG_NO_HZ */
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 55232ccf9cfd..48262f86c969 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -7,9 +7,18 @@
7 */ 7 */
8 8
9#include <linux/errno.h> 9#include <linux/errno.h>
10#include <linux/list.h>
11#include <linux/cpumask.h>
10 12
11extern void cpu_idle(void); 13extern void cpu_idle(void);
12 14
15struct call_single_data {
16 struct list_head list;
17 void (*func) (void *info);
18 void *info;
19 unsigned int flags;
20};
21
13#ifdef CONFIG_SMP 22#ifdef CONFIG_SMP
14 23
15#include <linux/preempt.h> 24#include <linux/preempt.h>
@@ -52,15 +61,34 @@ extern void smp_cpus_done(unsigned int max_cpus);
52/* 61/*
53 * Call a function on all other processors 62 * Call a function on all other processors
54 */ 63 */
55int smp_call_function(void(*func)(void *info), void *info, int retry, int wait); 64int smp_call_function(void(*func)(void *info), void *info, int wait);
56 65int smp_call_function_mask(cpumask_t mask, void(*func)(void *info), void *info,
66 int wait);
57int smp_call_function_single(int cpuid, void (*func) (void *info), void *info, 67int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
58 int retry, int wait); 68 int wait);
69void __smp_call_function_single(int cpuid, struct call_single_data *data);
70
71/*
72 * Generic and arch helpers
73 */
74#ifdef CONFIG_USE_GENERIC_SMP_HELPERS
75void generic_smp_call_function_single_interrupt(void);
76void generic_smp_call_function_interrupt(void);
77void init_call_single_data(void);
78void ipi_call_lock(void);
79void ipi_call_unlock(void);
80void ipi_call_lock_irq(void);
81void ipi_call_unlock_irq(void);
82#else
83static inline void init_call_single_data(void)
84{
85}
86#endif
59 87
60/* 88/*
61 * Call a function on all processors 89 * Call a function on all processors
62 */ 90 */
63int on_each_cpu(void (*func) (void *info), void *info, int retry, int wait); 91int on_each_cpu(void (*func) (void *info), void *info, int wait);
64 92
65#define MSG_ALL_BUT_SELF 0x8000 /* Assume <32768 CPU's */ 93#define MSG_ALL_BUT_SELF 0x8000 /* Assume <32768 CPU's */
66#define MSG_ALL 0x8001 94#define MSG_ALL 0x8001
@@ -90,9 +118,9 @@ static inline int up_smp_call_function(void (*func)(void *), void *info)
90{ 118{
91 return 0; 119 return 0;
92} 120}
93#define smp_call_function(func, info, retry, wait) \ 121#define smp_call_function(func, info, wait) \
94 (up_smp_call_function(func, info)) 122 (up_smp_call_function(func, info))
95#define on_each_cpu(func,info,retry,wait) \ 123#define on_each_cpu(func,info,wait) \
96 ({ \ 124 ({ \
97 local_irq_disable(); \ 125 local_irq_disable(); \
98 func(info); \ 126 func(info); \
@@ -102,7 +130,7 @@ static inline int up_smp_call_function(void (*func)(void *), void *info)
102static inline void smp_send_reschedule(int cpu) { } 130static inline void smp_send_reschedule(int cpu) { }
103#define num_booting_cpus() 1 131#define num_booting_cpus() 1
104#define smp_prepare_boot_cpu() do {} while (0) 132#define smp_prepare_boot_cpu() do {} while (0)
105#define smp_call_function_single(cpuid, func, info, retry, wait) \ 133#define smp_call_function_single(cpuid, func, info, wait) \
106({ \ 134({ \
107 WARN_ON(cpuid != 0); \ 135 WARN_ON(cpuid != 0); \
108 local_irq_disable(); \ 136 local_irq_disable(); \
@@ -112,7 +140,9 @@ static inline void smp_send_reschedule(int cpu) { }
112}) 140})
113#define smp_call_function_mask(mask, func, info, wait) \ 141#define smp_call_function_mask(mask, func, info, wait) \
114 (up_smp_call_function(func, info)) 142 (up_smp_call_function(func, info))
115 143static inline void init_call_single_data(void)
144{
145}
116#endif /* !SMP */ 146#endif /* !SMP */
117 147
118/* 148/*
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index f6a9fe0ef09c..00b78763a1bf 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -134,6 +134,7 @@ struct scsi_device {
134 unsigned no_start_on_add:1; /* do not issue start on add */ 134 unsigned no_start_on_add:1; /* do not issue start on add */
135 unsigned allow_restart:1; /* issue START_UNIT in error handler */ 135 unsigned allow_restart:1; /* issue START_UNIT in error handler */
136 unsigned manage_start_stop:1; /* Let HLD (sd) manage start/stop */ 136 unsigned manage_start_stop:1; /* Let HLD (sd) manage start/stop */
137 unsigned start_stop_pwr_cond:1; /* Set power cond. in START_STOP_UNIT */
137 unsigned no_uld_attach:1; /* disable connecting to upper level drivers */ 138 unsigned no_uld_attach:1; /* disable connecting to upper level drivers */
138 unsigned select_no_atn:1; 139 unsigned select_no_atn:1;
139 unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */ 140 unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */
diff --git a/init/main.c b/init/main.c
index f7fb20021d48..edeace036fd9 100644
--- a/init/main.c
+++ b/init/main.c
@@ -31,6 +31,7 @@
31#include <linux/kernel_stat.h> 31#include <linux/kernel_stat.h>
32#include <linux/start_kernel.h> 32#include <linux/start_kernel.h>
33#include <linux/security.h> 33#include <linux/security.h>
34#include <linux/smp.h>
34#include <linux/workqueue.h> 35#include <linux/workqueue.h>
35#include <linux/profile.h> 36#include <linux/profile.h>
36#include <linux/rcupdate.h> 37#include <linux/rcupdate.h>
@@ -758,6 +759,7 @@ static void __init do_initcalls(void)
758 */ 759 */
759static void __init do_basic_setup(void) 760static void __init do_basic_setup(void)
760{ 761{
762 rcu_init_sched(); /* needed by module_init stage. */
761 /* drivers will send hotplug events */ 763 /* drivers will send hotplug events */
762 init_workqueues(); 764 init_workqueues();
763 usermodehelper_init(); 765 usermodehelper_init();
@@ -779,6 +781,7 @@ static void __init do_pre_smp_initcalls(void)
779{ 781{
780 extern int spawn_ksoftirqd(void); 782 extern int spawn_ksoftirqd(void);
781 783
784 init_call_single_data();
782 migration_init(); 785 migration_init();
783 spawn_ksoftirqd(); 786 spawn_ksoftirqd();
784 if (!nosoftlockup) 787 if (!nosoftlockup)
diff --git a/kernel/Makefile b/kernel/Makefile
index f6328e16dfdd..0a7ed838984b 100644
--- a/kernel/Makefile
+++ b/kernel/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_RT_MUTEXES) += rtmutex.o
39obj-$(CONFIG_DEBUG_RT_MUTEXES) += rtmutex-debug.o 39obj-$(CONFIG_DEBUG_RT_MUTEXES) += rtmutex-debug.o
40obj-$(CONFIG_RT_MUTEX_TESTER) += rtmutex-tester.o 40obj-$(CONFIG_RT_MUTEX_TESTER) += rtmutex-tester.o
41obj-$(CONFIG_GENERIC_ISA_DMA) += dma.o 41obj-$(CONFIG_GENERIC_ISA_DMA) += dma.o
42obj-$(CONFIG_USE_GENERIC_SMP_HELPERS) += smp.o
42obj-$(CONFIG_SMP) += spinlock.o 43obj-$(CONFIG_SMP) += spinlock.o
43obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o 44obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o
44obj-$(CONFIG_PROVE_LOCKING) += spinlock.o 45obj-$(CONFIG_PROVE_LOCKING) += spinlock.o
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c
index 2913a8bff612..b8e4dce80a74 100644
--- a/kernel/hrtimer.c
+++ b/kernel/hrtimer.c
@@ -622,7 +622,7 @@ static void retrigger_next_event(void *arg)
622void clock_was_set(void) 622void clock_was_set(void)
623{ 623{
624 /* Retrigger the CPU local events everywhere */ 624 /* Retrigger the CPU local events everywhere */
625 on_each_cpu(retrigger_next_event, NULL, 0, 1); 625 on_each_cpu(retrigger_next_event, NULL, 1);
626} 626}
627 627
628/* 628/*
diff --git a/kernel/pid.c b/kernel/pid.c
index 20d59fa2d493..30bd5d4b2ac7 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/rculist.h>
33#include <linux/bootmem.h> 34#include <linux/bootmem.h>
34#include <linux/hash.h> 35#include <linux/hash.h>
35#include <linux/pid_namespace.h> 36#include <linux/pid_namespace.h>
diff --git a/kernel/profile.c b/kernel/profile.c
index ae7ead82cbc9..58926411eb2a 100644
--- a/kernel/profile.c
+++ b/kernel/profile.c
@@ -252,7 +252,7 @@ static void profile_flip_buffers(void)
252 mutex_lock(&profile_flip_mutex); 252 mutex_lock(&profile_flip_mutex);
253 j = per_cpu(cpu_profile_flip, get_cpu()); 253 j = per_cpu(cpu_profile_flip, get_cpu());
254 put_cpu(); 254 put_cpu();
255 on_each_cpu(__profile_flip_buffers, NULL, 0, 1); 255 on_each_cpu(__profile_flip_buffers, NULL, 1);
256 for_each_online_cpu(cpu) { 256 for_each_online_cpu(cpu) {
257 struct profile_hit *hits = per_cpu(cpu_profile_hits, cpu)[j]; 257 struct profile_hit *hits = per_cpu(cpu_profile_hits, cpu)[j];
258 for (i = 0; i < NR_PROFILE_HIT; ++i) { 258 for (i = 0; i < NR_PROFILE_HIT; ++i) {
@@ -275,7 +275,7 @@ static void profile_discard_flip_buffers(void)
275 mutex_lock(&profile_flip_mutex); 275 mutex_lock(&profile_flip_mutex);
276 i = per_cpu(cpu_profile_flip, get_cpu()); 276 i = per_cpu(cpu_profile_flip, get_cpu());
277 put_cpu(); 277 put_cpu();
278 on_each_cpu(__profile_flip_buffers, NULL, 0, 1); 278 on_each_cpu(__profile_flip_buffers, NULL, 1);
279 for_each_online_cpu(cpu) { 279 for_each_online_cpu(cpu) {
280 struct profile_hit *hits = per_cpu(cpu_profile_hits, cpu)[i]; 280 struct profile_hit *hits = per_cpu(cpu_profile_hits, cpu)[i];
281 memset(hits, 0, NR_PROFILE_HIT*sizeof(struct profile_hit)); 281 memset(hits, 0, NR_PROFILE_HIT*sizeof(struct profile_hit));
@@ -558,7 +558,7 @@ static int __init create_hash_tables(void)
558out_cleanup: 558out_cleanup:
559 prof_on = 0; 559 prof_on = 0;
560 smp_mb(); 560 smp_mb();
561 on_each_cpu(profile_nop, NULL, 0, 1); 561 on_each_cpu(profile_nop, NULL, 1);
562 for_each_online_cpu(cpu) { 562 for_each_online_cpu(cpu) {
563 struct page *page; 563 struct page *page;
564 564
diff --git a/kernel/rcuclassic.c b/kernel/rcuclassic.c
index 65c0906080ef..16eeeaa9d618 100644
--- a/kernel/rcuclassic.c
+++ b/kernel/rcuclassic.c
@@ -387,6 +387,10 @@ static void __rcu_offline_cpu(struct rcu_data *this_rdp,
387 rcu_move_batch(this_rdp, rdp->donelist, rdp->donetail); 387 rcu_move_batch(this_rdp, rdp->donelist, rdp->donetail);
388 rcu_move_batch(this_rdp, rdp->curlist, rdp->curtail); 388 rcu_move_batch(this_rdp, rdp->curlist, rdp->curtail);
389 rcu_move_batch(this_rdp, rdp->nxtlist, rdp->nxttail); 389 rcu_move_batch(this_rdp, rdp->nxtlist, rdp->nxttail);
390
391 local_irq_disable();
392 this_rdp->qlen += rdp->qlen;
393 local_irq_enable();
390} 394}
391 395
392static void rcu_offline_cpu(int cpu) 396static void rcu_offline_cpu(int cpu)
@@ -516,10 +520,38 @@ void rcu_check_callbacks(int cpu, int user)
516 if (user || 520 if (user ||
517 (idle_cpu(cpu) && !in_softirq() && 521 (idle_cpu(cpu) && !in_softirq() &&
518 hardirq_count() <= (1 << HARDIRQ_SHIFT))) { 522 hardirq_count() <= (1 << HARDIRQ_SHIFT))) {
523
524 /*
525 * Get here if this CPU took its interrupt from user
526 * mode or from the idle loop, and if this is not a
527 * nested interrupt. In this case, the CPU is in
528 * a quiescent state, so count it.
529 *
530 * Also do a memory barrier. This is needed to handle
531 * the case where writes from a preempt-disable section
532 * of code get reordered into schedule() by this CPU's
533 * write buffer. The memory barrier makes sure that
534 * the rcu_qsctr_inc() and rcu_bh_qsctr_inc() are see
535 * by other CPUs to happen after any such write.
536 */
537
538 smp_mb(); /* See above block comment. */
519 rcu_qsctr_inc(cpu); 539 rcu_qsctr_inc(cpu);
520 rcu_bh_qsctr_inc(cpu); 540 rcu_bh_qsctr_inc(cpu);
521 } else if (!in_softirq()) 541
542 } else if (!in_softirq()) {
543
544 /*
545 * Get here if this CPU did not take its interrupt from
546 * softirq, in other words, if it is not interrupting
547 * a rcu_bh read-side critical section. This is an _bh
548 * critical section, so count it. The memory barrier
549 * is needed for the same reason as is the above one.
550 */
551
552 smp_mb(); /* See above block comment. */
522 rcu_bh_qsctr_inc(cpu); 553 rcu_bh_qsctr_inc(cpu);
554 }
523 raise_rcu_softirq(); 555 raise_rcu_softirq();
524} 556}
525 557
diff --git a/kernel/rcupdate.c b/kernel/rcupdate.c
index c09605f8d16c..f14f372cf6f5 100644
--- a/kernel/rcupdate.c
+++ b/kernel/rcupdate.c
@@ -39,16 +39,16 @@
39#include <linux/sched.h> 39#include <linux/sched.h>
40#include <asm/atomic.h> 40#include <asm/atomic.h>
41#include <linux/bitops.h> 41#include <linux/bitops.h>
42#include <linux/completion.h>
43#include <linux/percpu.h> 42#include <linux/percpu.h>
44#include <linux/notifier.h> 43#include <linux/notifier.h>
45#include <linux/cpu.h> 44#include <linux/cpu.h>
46#include <linux/mutex.h> 45#include <linux/mutex.h>
47#include <linux/module.h> 46#include <linux/module.h>
48 47
49struct rcu_synchronize { 48enum rcu_barrier {
50 struct rcu_head head; 49 RCU_BARRIER_STD,
51 struct completion completion; 50 RCU_BARRIER_BH,
51 RCU_BARRIER_SCHED,
52}; 52};
53 53
54static DEFINE_PER_CPU(struct rcu_head, rcu_barrier_head) = {NULL}; 54static DEFINE_PER_CPU(struct rcu_head, rcu_barrier_head) = {NULL};
@@ -60,7 +60,7 @@ static struct completion rcu_barrier_completion;
60 * Awaken the corresponding synchronize_rcu() instance now that a 60 * Awaken the corresponding synchronize_rcu() instance now that a
61 * grace period has elapsed. 61 * grace period has elapsed.
62 */ 62 */
63static void wakeme_after_rcu(struct rcu_head *head) 63void wakeme_after_rcu(struct rcu_head *head)
64{ 64{
65 struct rcu_synchronize *rcu; 65 struct rcu_synchronize *rcu;
66 66
@@ -77,17 +77,7 @@ static void wakeme_after_rcu(struct rcu_head *head)
77 * sections are delimited by rcu_read_lock() and rcu_read_unlock(), 77 * sections are delimited by rcu_read_lock() and rcu_read_unlock(),
78 * and may be nested. 78 * and may be nested.
79 */ 79 */
80void synchronize_rcu(void) 80synchronize_rcu_xxx(synchronize_rcu, call_rcu)
81{
82 struct rcu_synchronize rcu;
83
84 init_completion(&rcu.completion);
85 /* Will wake me after RCU finished */
86 call_rcu(&rcu.head, wakeme_after_rcu);
87
88 /* Wait for it */
89 wait_for_completion(&rcu.completion);
90}
91EXPORT_SYMBOL_GPL(synchronize_rcu); 81EXPORT_SYMBOL_GPL(synchronize_rcu);
92 82
93static void rcu_barrier_callback(struct rcu_head *notused) 83static void rcu_barrier_callback(struct rcu_head *notused)
@@ -99,19 +89,30 @@ static void rcu_barrier_callback(struct rcu_head *notused)
99/* 89/*
100 * Called with preemption disabled, and from cross-cpu IRQ context. 90 * Called with preemption disabled, and from cross-cpu IRQ context.
101 */ 91 */
102static void rcu_barrier_func(void *notused) 92static void rcu_barrier_func(void *type)
103{ 93{
104 int cpu = smp_processor_id(); 94 int cpu = smp_processor_id();
105 struct rcu_head *head = &per_cpu(rcu_barrier_head, cpu); 95 struct rcu_head *head = &per_cpu(rcu_barrier_head, cpu);
106 96
107 atomic_inc(&rcu_barrier_cpu_count); 97 atomic_inc(&rcu_barrier_cpu_count);
108 call_rcu(head, rcu_barrier_callback); 98 switch ((enum rcu_barrier)type) {
99 case RCU_BARRIER_STD:
100 call_rcu(head, rcu_barrier_callback);
101 break;
102 case RCU_BARRIER_BH:
103 call_rcu_bh(head, rcu_barrier_callback);
104 break;
105 case RCU_BARRIER_SCHED:
106 call_rcu_sched(head, rcu_barrier_callback);
107 break;
108 }
109} 109}
110 110
111/** 111/*
112 * rcu_barrier - Wait until all the in-flight RCUs are complete. 112 * Orchestrate the specified type of RCU barrier, waiting for all
113 * RCU callbacks of the specified type to complete.
113 */ 114 */
114void rcu_barrier(void) 115static void _rcu_barrier(enum rcu_barrier type)
115{ 116{
116 BUG_ON(in_interrupt()); 117 BUG_ON(in_interrupt());
117 /* Take cpucontrol mutex to protect against CPU hotplug */ 118 /* Take cpucontrol mutex to protect against CPU hotplug */
@@ -127,13 +128,39 @@ void rcu_barrier(void)
127 * until all the callbacks are queued. 128 * until all the callbacks are queued.
128 */ 129 */
129 rcu_read_lock(); 130 rcu_read_lock();
130 on_each_cpu(rcu_barrier_func, NULL, 0, 1); 131 on_each_cpu(rcu_barrier_func, (void *)type, 1);
131 rcu_read_unlock(); 132 rcu_read_unlock();
132 wait_for_completion(&rcu_barrier_completion); 133 wait_for_completion(&rcu_barrier_completion);
133 mutex_unlock(&rcu_barrier_mutex); 134 mutex_unlock(&rcu_barrier_mutex);
134} 135}
136
137/**
138 * rcu_barrier - Wait until all in-flight call_rcu() callbacks complete.
139 */
140void rcu_barrier(void)
141{
142 _rcu_barrier(RCU_BARRIER_STD);
143}
135EXPORT_SYMBOL_GPL(rcu_barrier); 144EXPORT_SYMBOL_GPL(rcu_barrier);
136 145
146/**
147 * rcu_barrier_bh - Wait until all in-flight call_rcu_bh() callbacks complete.
148 */
149void rcu_barrier_bh(void)
150{
151 _rcu_barrier(RCU_BARRIER_BH);
152}
153EXPORT_SYMBOL_GPL(rcu_barrier_bh);
154
155/**
156 * rcu_barrier_sched - Wait for in-flight call_rcu_sched() callbacks.
157 */
158void rcu_barrier_sched(void)
159{
160 _rcu_barrier(RCU_BARRIER_SCHED);
161}
162EXPORT_SYMBOL_GPL(rcu_barrier_sched);
163
137void __init rcu_init(void) 164void __init rcu_init(void)
138{ 165{
139 __rcu_init(); 166 __rcu_init();
diff --git a/kernel/rcupreempt.c b/kernel/rcupreempt.c
index 9bf445664457..6f62b77d93c4 100644
--- a/kernel/rcupreempt.c
+++ b/kernel/rcupreempt.c
@@ -46,11 +46,11 @@
46#include <asm/atomic.h> 46#include <asm/atomic.h>
47#include <linux/bitops.h> 47#include <linux/bitops.h>
48#include <linux/module.h> 48#include <linux/module.h>
49#include <linux/kthread.h>
49#include <linux/completion.h> 50#include <linux/completion.h>
50#include <linux/moduleparam.h> 51#include <linux/moduleparam.h>
51#include <linux/percpu.h> 52#include <linux/percpu.h>
52#include <linux/notifier.h> 53#include <linux/notifier.h>
53#include <linux/rcupdate.h>
54#include <linux/cpu.h> 54#include <linux/cpu.h>
55#include <linux/random.h> 55#include <linux/random.h>
56#include <linux/delay.h> 56#include <linux/delay.h>
@@ -82,14 +82,18 @@ struct rcu_data {
82 spinlock_t lock; /* Protect rcu_data fields. */ 82 spinlock_t lock; /* Protect rcu_data fields. */
83 long completed; /* Number of last completed batch. */ 83 long completed; /* Number of last completed batch. */
84 int waitlistcount; 84 int waitlistcount;
85 struct tasklet_struct rcu_tasklet;
86 struct rcu_head *nextlist; 85 struct rcu_head *nextlist;
87 struct rcu_head **nexttail; 86 struct rcu_head **nexttail;
88 struct rcu_head *waitlist[GP_STAGES]; 87 struct rcu_head *waitlist[GP_STAGES];
89 struct rcu_head **waittail[GP_STAGES]; 88 struct rcu_head **waittail[GP_STAGES];
90 struct rcu_head *donelist; 89 struct rcu_head *donelist; /* from waitlist & waitschedlist */
91 struct rcu_head **donetail; 90 struct rcu_head **donetail;
92 long rcu_flipctr[2]; 91 long rcu_flipctr[2];
92 struct rcu_head *nextschedlist;
93 struct rcu_head **nextschedtail;
94 struct rcu_head *waitschedlist;
95 struct rcu_head **waitschedtail;
96 int rcu_sched_sleeping;
93#ifdef CONFIG_RCU_TRACE 97#ifdef CONFIG_RCU_TRACE
94 struct rcupreempt_trace trace; 98 struct rcupreempt_trace trace;
95#endif /* #ifdef CONFIG_RCU_TRACE */ 99#endif /* #ifdef CONFIG_RCU_TRACE */
@@ -131,11 +135,24 @@ enum rcu_try_flip_states {
131 rcu_try_flip_waitmb_state, 135 rcu_try_flip_waitmb_state,
132}; 136};
133 137
138/*
139 * States for rcu_ctrlblk.rcu_sched_sleep.
140 */
141
142enum rcu_sched_sleep_states {
143 rcu_sched_not_sleeping, /* Not sleeping, callbacks need GP. */
144 rcu_sched_sleep_prep, /* Thinking of sleeping, rechecking. */
145 rcu_sched_sleeping, /* Sleeping, awaken if GP needed. */
146};
147
134struct rcu_ctrlblk { 148struct rcu_ctrlblk {
135 spinlock_t fliplock; /* Protect state-machine transitions. */ 149 spinlock_t fliplock; /* Protect state-machine transitions. */
136 long completed; /* Number of last completed batch. */ 150 long completed; /* Number of last completed batch. */
137 enum rcu_try_flip_states rcu_try_flip_state; /* The current state of 151 enum rcu_try_flip_states rcu_try_flip_state; /* The current state of
138 the rcu state machine */ 152 the rcu state machine */
153 spinlock_t schedlock; /* Protect rcu_sched sleep state. */
154 enum rcu_sched_sleep_states sched_sleep; /* rcu_sched state. */
155 wait_queue_head_t sched_wq; /* Place for rcu_sched to sleep. */
139}; 156};
140 157
141static DEFINE_PER_CPU(struct rcu_data, rcu_data); 158static DEFINE_PER_CPU(struct rcu_data, rcu_data);
@@ -143,8 +160,12 @@ static struct rcu_ctrlblk rcu_ctrlblk = {
143 .fliplock = __SPIN_LOCK_UNLOCKED(rcu_ctrlblk.fliplock), 160 .fliplock = __SPIN_LOCK_UNLOCKED(rcu_ctrlblk.fliplock),
144 .completed = 0, 161 .completed = 0,
145 .rcu_try_flip_state = rcu_try_flip_idle_state, 162 .rcu_try_flip_state = rcu_try_flip_idle_state,
163 .schedlock = __SPIN_LOCK_UNLOCKED(rcu_ctrlblk.schedlock),
164 .sched_sleep = rcu_sched_not_sleeping,
165 .sched_wq = __WAIT_QUEUE_HEAD_INITIALIZER(rcu_ctrlblk.sched_wq),
146}; 166};
147 167
168static struct task_struct *rcu_sched_grace_period_task;
148 169
149#ifdef CONFIG_RCU_TRACE 170#ifdef CONFIG_RCU_TRACE
150static char *rcu_try_flip_state_names[] = 171static char *rcu_try_flip_state_names[] =
@@ -207,6 +228,8 @@ static DEFINE_PER_CPU_SHARED_ALIGNED(enum rcu_mb_flag_values, rcu_mb_flag)
207 */ 228 */
208#define RCU_TRACE_RDP(f, rdp) RCU_TRACE(f, &((rdp)->trace)); 229#define RCU_TRACE_RDP(f, rdp) RCU_TRACE(f, &((rdp)->trace));
209 230
231#define RCU_SCHED_BATCH_TIME (HZ / 50)
232
210/* 233/*
211 * Return the number of RCU batches processed thus far. Useful 234 * Return the number of RCU batches processed thus far. Useful
212 * for debug and statistics. 235 * for debug and statistics.
@@ -411,32 +434,34 @@ static void __rcu_advance_callbacks(struct rcu_data *rdp)
411 } 434 }
412} 435}
413 436
414#ifdef CONFIG_NO_HZ 437DEFINE_PER_CPU_SHARED_ALIGNED(struct rcu_dyntick_sched, rcu_dyntick_sched) = {
438 .dynticks = 1,
439};
415 440
416DEFINE_PER_CPU(long, dynticks_progress_counter) = 1; 441#ifdef CONFIG_NO_HZ
417static DEFINE_PER_CPU(long, rcu_dyntick_snapshot);
418static DEFINE_PER_CPU(int, rcu_update_flag); 442static DEFINE_PER_CPU(int, rcu_update_flag);
419 443
420/** 444/**
421 * rcu_irq_enter - Called from Hard irq handlers and NMI/SMI. 445 * rcu_irq_enter - Called from Hard irq handlers and NMI/SMI.
422 * 446 *
423 * If the CPU was idle with dynamic ticks active, this updates the 447 * If the CPU was idle with dynamic ticks active, this updates the
424 * dynticks_progress_counter to let the RCU handling know that the 448 * rcu_dyntick_sched.dynticks to let the RCU handling know that the
425 * CPU is active. 449 * CPU is active.
426 */ 450 */
427void rcu_irq_enter(void) 451void rcu_irq_enter(void)
428{ 452{
429 int cpu = smp_processor_id(); 453 int cpu = smp_processor_id();
454 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
430 455
431 if (per_cpu(rcu_update_flag, cpu)) 456 if (per_cpu(rcu_update_flag, cpu))
432 per_cpu(rcu_update_flag, cpu)++; 457 per_cpu(rcu_update_flag, cpu)++;
433 458
434 /* 459 /*
435 * Only update if we are coming from a stopped ticks mode 460 * Only update if we are coming from a stopped ticks mode
436 * (dynticks_progress_counter is even). 461 * (rcu_dyntick_sched.dynticks is even).
437 */ 462 */
438 if (!in_interrupt() && 463 if (!in_interrupt() &&
439 (per_cpu(dynticks_progress_counter, cpu) & 0x1) == 0) { 464 (rdssp->dynticks & 0x1) == 0) {
440 /* 465 /*
441 * The following might seem like we could have a race 466 * The following might seem like we could have a race
442 * with NMI/SMIs. But this really isn't a problem. 467 * with NMI/SMIs. But this really isn't a problem.
@@ -459,12 +484,12 @@ void rcu_irq_enter(void)
459 * RCU read-side critical sections on this CPU would 484 * RCU read-side critical sections on this CPU would
460 * have already completed. 485 * have already completed.
461 */ 486 */
462 per_cpu(dynticks_progress_counter, cpu)++; 487 rdssp->dynticks++;
463 /* 488 /*
464 * The following memory barrier ensures that any 489 * The following memory barrier ensures that any
465 * rcu_read_lock() primitives in the irq handler 490 * rcu_read_lock() primitives in the irq handler
466 * are seen by other CPUs to follow the above 491 * are seen by other CPUs to follow the above
467 * increment to dynticks_progress_counter. This is 492 * increment to rcu_dyntick_sched.dynticks. This is
468 * required in order for other CPUs to correctly 493 * required in order for other CPUs to correctly
469 * determine when it is safe to advance the RCU 494 * determine when it is safe to advance the RCU
470 * grace-period state machine. 495 * grace-period state machine.
@@ -472,7 +497,7 @@ void rcu_irq_enter(void)
472 smp_mb(); /* see above block comment. */ 497 smp_mb(); /* see above block comment. */
473 /* 498 /*
474 * Since we can't determine the dynamic tick mode from 499 * Since we can't determine the dynamic tick mode from
475 * the dynticks_progress_counter after this routine, 500 * the rcu_dyntick_sched.dynticks after this routine,
476 * we use a second flag to acknowledge that we came 501 * we use a second flag to acknowledge that we came
477 * from an idle state with ticks stopped. 502 * from an idle state with ticks stopped.
478 */ 503 */
@@ -480,7 +505,7 @@ void rcu_irq_enter(void)
480 /* 505 /*
481 * If we take an NMI/SMI now, they will also increment 506 * If we take an NMI/SMI now, they will also increment
482 * the rcu_update_flag, and will not update the 507 * the rcu_update_flag, and will not update the
483 * dynticks_progress_counter on exit. That is for 508 * rcu_dyntick_sched.dynticks on exit. That is for
484 * this IRQ to do. 509 * this IRQ to do.
485 */ 510 */
486 } 511 }
@@ -490,12 +515,13 @@ void rcu_irq_enter(void)
490 * rcu_irq_exit - Called from exiting Hard irq context. 515 * rcu_irq_exit - Called from exiting Hard irq context.
491 * 516 *
492 * If the CPU was idle with dynamic ticks active, update the 517 * If the CPU was idle with dynamic ticks active, update the
493 * dynticks_progress_counter to put let the RCU handling be 518 * rcu_dyntick_sched.dynticks to put let the RCU handling be
494 * aware that the CPU is going back to idle with no ticks. 519 * aware that the CPU is going back to idle with no ticks.
495 */ 520 */
496void rcu_irq_exit(void) 521void rcu_irq_exit(void)
497{ 522{
498 int cpu = smp_processor_id(); 523 int cpu = smp_processor_id();
524 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
499 525
500 /* 526 /*
501 * rcu_update_flag is set if we interrupted the CPU 527 * rcu_update_flag is set if we interrupted the CPU
@@ -503,7 +529,7 @@ void rcu_irq_exit(void)
503 * Once this occurs, we keep track of interrupt nesting 529 * Once this occurs, we keep track of interrupt nesting
504 * because a NMI/SMI could also come in, and we still 530 * because a NMI/SMI could also come in, and we still
505 * only want the IRQ that started the increment of the 531 * only want the IRQ that started the increment of the
506 * dynticks_progress_counter to be the one that modifies 532 * rcu_dyntick_sched.dynticks to be the one that modifies
507 * it on exit. 533 * it on exit.
508 */ 534 */
509 if (per_cpu(rcu_update_flag, cpu)) { 535 if (per_cpu(rcu_update_flag, cpu)) {
@@ -515,28 +541,29 @@ void rcu_irq_exit(void)
515 541
516 /* 542 /*
517 * If an NMI/SMI happens now we are still 543 * If an NMI/SMI happens now we are still
518 * protected by the dynticks_progress_counter being odd. 544 * protected by the rcu_dyntick_sched.dynticks being odd.
519 */ 545 */
520 546
521 /* 547 /*
522 * The following memory barrier ensures that any 548 * The following memory barrier ensures that any
523 * rcu_read_unlock() primitives in the irq handler 549 * rcu_read_unlock() primitives in the irq handler
524 * are seen by other CPUs to preceed the following 550 * are seen by other CPUs to preceed the following
525 * increment to dynticks_progress_counter. This 551 * increment to rcu_dyntick_sched.dynticks. This
526 * is required in order for other CPUs to determine 552 * is required in order for other CPUs to determine
527 * when it is safe to advance the RCU grace-period 553 * when it is safe to advance the RCU grace-period
528 * state machine. 554 * state machine.
529 */ 555 */
530 smp_mb(); /* see above block comment. */ 556 smp_mb(); /* see above block comment. */
531 per_cpu(dynticks_progress_counter, cpu)++; 557 rdssp->dynticks++;
532 WARN_ON(per_cpu(dynticks_progress_counter, cpu) & 0x1); 558 WARN_ON(rdssp->dynticks & 0x1);
533 } 559 }
534} 560}
535 561
536static void dyntick_save_progress_counter(int cpu) 562static void dyntick_save_progress_counter(int cpu)
537{ 563{
538 per_cpu(rcu_dyntick_snapshot, cpu) = 564 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
539 per_cpu(dynticks_progress_counter, cpu); 565
566 rdssp->dynticks_snap = rdssp->dynticks;
540} 567}
541 568
542static inline int 569static inline int
@@ -544,9 +571,10 @@ rcu_try_flip_waitack_needed(int cpu)
544{ 571{
545 long curr; 572 long curr;
546 long snap; 573 long snap;
574 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
547 575
548 curr = per_cpu(dynticks_progress_counter, cpu); 576 curr = rdssp->dynticks;
549 snap = per_cpu(rcu_dyntick_snapshot, cpu); 577 snap = rdssp->dynticks_snap;
550 smp_mb(); /* force ordering with cpu entering/leaving dynticks. */ 578 smp_mb(); /* force ordering with cpu entering/leaving dynticks. */
551 579
552 /* 580 /*
@@ -567,7 +595,7 @@ rcu_try_flip_waitack_needed(int cpu)
567 * that this CPU already acknowledged the counter. 595 * that this CPU already acknowledged the counter.
568 */ 596 */
569 597
570 if ((curr - snap) > 2 || (snap & 0x1) == 0) 598 if ((curr - snap) > 2 || (curr & 0x1) == 0)
571 return 0; 599 return 0;
572 600
573 /* We need this CPU to explicitly acknowledge the counter flip. */ 601 /* We need this CPU to explicitly acknowledge the counter flip. */
@@ -580,9 +608,10 @@ rcu_try_flip_waitmb_needed(int cpu)
580{ 608{
581 long curr; 609 long curr;
582 long snap; 610 long snap;
611 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
583 612
584 curr = per_cpu(dynticks_progress_counter, cpu); 613 curr = rdssp->dynticks;
585 snap = per_cpu(rcu_dyntick_snapshot, cpu); 614 snap = rdssp->dynticks_snap;
586 smp_mb(); /* force ordering with cpu entering/leaving dynticks. */ 615 smp_mb(); /* force ordering with cpu entering/leaving dynticks. */
587 616
588 /* 617 /*
@@ -609,14 +638,86 @@ rcu_try_flip_waitmb_needed(int cpu)
609 return 1; 638 return 1;
610} 639}
611 640
641static void dyntick_save_progress_counter_sched(int cpu)
642{
643 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
644
645 rdssp->sched_dynticks_snap = rdssp->dynticks;
646}
647
648static int rcu_qsctr_inc_needed_dyntick(int cpu)
649{
650 long curr;
651 long snap;
652 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
653
654 curr = rdssp->dynticks;
655 snap = rdssp->sched_dynticks_snap;
656 smp_mb(); /* force ordering with cpu entering/leaving dynticks. */
657
658 /*
659 * If the CPU remained in dynticks mode for the entire time
660 * and didn't take any interrupts, NMIs, SMIs, or whatever,
661 * then it cannot be in the middle of an rcu_read_lock(), so
662 * the next rcu_read_lock() it executes must use the new value
663 * of the counter. Therefore, this CPU has been in a quiescent
664 * state the entire time, and we don't need to wait for it.
665 */
666
667 if ((curr == snap) && ((curr & 0x1) == 0))
668 return 0;
669
670 /*
671 * If the CPU passed through or entered a dynticks idle phase with
672 * no active irq handlers, then, as above, this CPU has already
673 * passed through a quiescent state.
674 */
675
676 if ((curr - snap) > 2 || (snap & 0x1) == 0)
677 return 0;
678
679 /* We need this CPU to go through a quiescent state. */
680
681 return 1;
682}
683
612#else /* !CONFIG_NO_HZ */ 684#else /* !CONFIG_NO_HZ */
613 685
614# define dyntick_save_progress_counter(cpu) do { } while (0) 686# define dyntick_save_progress_counter(cpu) do { } while (0)
615# define rcu_try_flip_waitack_needed(cpu) (1) 687# define rcu_try_flip_waitack_needed(cpu) (1)
616# define rcu_try_flip_waitmb_needed(cpu) (1) 688# define rcu_try_flip_waitmb_needed(cpu) (1)
689
690# define dyntick_save_progress_counter_sched(cpu) do { } while (0)
691# define rcu_qsctr_inc_needed_dyntick(cpu) (1)
617 692
618#endif /* CONFIG_NO_HZ */ 693#endif /* CONFIG_NO_HZ */
619 694
695static void save_qsctr_sched(int cpu)
696{
697 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
698
699 rdssp->sched_qs_snap = rdssp->sched_qs;
700}
701
702static inline int rcu_qsctr_inc_needed(int cpu)
703{
704 struct rcu_dyntick_sched *rdssp = &per_cpu(rcu_dyntick_sched, cpu);
705
706 /*
707 * If there has been a quiescent state, no more need to wait
708 * on this CPU.
709 */
710
711 if (rdssp->sched_qs != rdssp->sched_qs_snap) {
712 smp_mb(); /* force ordering with cpu entering schedule(). */
713 return 0;
714 }
715
716 /* We need this CPU to go through a quiescent state. */
717
718 return 1;
719}
720
620/* 721/*
621 * Get here when RCU is idle. Decide whether we need to 722 * Get here when RCU is idle. Decide whether we need to
622 * move out of idle state, and return non-zero if so. 723 * move out of idle state, and return non-zero if so.
@@ -819,6 +920,26 @@ void rcu_check_callbacks(int cpu, int user)
819 unsigned long flags; 920 unsigned long flags;
820 struct rcu_data *rdp = RCU_DATA_CPU(cpu); 921 struct rcu_data *rdp = RCU_DATA_CPU(cpu);
821 922
923 /*
924 * If this CPU took its interrupt from user mode or from the
925 * idle loop, and this is not a nested interrupt, then
926 * this CPU has to have exited all prior preept-disable
927 * sections of code. So increment the counter to note this.
928 *
929 * The memory barrier is needed to handle the case where
930 * writes from a preempt-disable section of code get reordered
931 * into schedule() by this CPU's write buffer. So the memory
932 * barrier makes sure that the rcu_qsctr_inc() is seen by other
933 * CPUs to happen after any such write.
934 */
935
936 if (user ||
937 (idle_cpu(cpu) && !in_softirq() &&
938 hardirq_count() <= (1 << HARDIRQ_SHIFT))) {
939 smp_mb(); /* Guard against aggressive schedule(). */
940 rcu_qsctr_inc(cpu);
941 }
942
822 rcu_check_mb(cpu); 943 rcu_check_mb(cpu);
823 if (rcu_ctrlblk.completed == rdp->completed) 944 if (rcu_ctrlblk.completed == rdp->completed)
824 rcu_try_flip(); 945 rcu_try_flip();
@@ -869,6 +990,8 @@ void rcu_offline_cpu(int cpu)
869 struct rcu_head *list = NULL; 990 struct rcu_head *list = NULL;
870 unsigned long flags; 991 unsigned long flags;
871 struct rcu_data *rdp = RCU_DATA_CPU(cpu); 992 struct rcu_data *rdp = RCU_DATA_CPU(cpu);
993 struct rcu_head *schedlist = NULL;
994 struct rcu_head **schedtail = &schedlist;
872 struct rcu_head **tail = &list; 995 struct rcu_head **tail = &list;
873 996
874 /* 997 /*
@@ -882,6 +1005,11 @@ void rcu_offline_cpu(int cpu)
882 rcu_offline_cpu_enqueue(rdp->waitlist[i], rdp->waittail[i], 1005 rcu_offline_cpu_enqueue(rdp->waitlist[i], rdp->waittail[i],
883 list, tail); 1006 list, tail);
884 rcu_offline_cpu_enqueue(rdp->nextlist, rdp->nexttail, list, tail); 1007 rcu_offline_cpu_enqueue(rdp->nextlist, rdp->nexttail, list, tail);
1008 rcu_offline_cpu_enqueue(rdp->waitschedlist, rdp->waitschedtail,
1009 schedlist, schedtail);
1010 rcu_offline_cpu_enqueue(rdp->nextschedlist, rdp->nextschedtail,
1011 schedlist, schedtail);
1012 rdp->rcu_sched_sleeping = 0;
885 spin_unlock_irqrestore(&rdp->lock, flags); 1013 spin_unlock_irqrestore(&rdp->lock, flags);
886 rdp->waitlistcount = 0; 1014 rdp->waitlistcount = 0;
887 1015
@@ -916,12 +1044,15 @@ void rcu_offline_cpu(int cpu)
916 * fix. 1044 * fix.
917 */ 1045 */
918 1046
919 local_irq_save(flags); 1047 local_irq_save(flags); /* disable preempt till we know what lock. */
920 rdp = RCU_DATA_ME(); 1048 rdp = RCU_DATA_ME();
921 spin_lock(&rdp->lock); 1049 spin_lock(&rdp->lock);
922 *rdp->nexttail = list; 1050 *rdp->nexttail = list;
923 if (list) 1051 if (list)
924 rdp->nexttail = tail; 1052 rdp->nexttail = tail;
1053 *rdp->nextschedtail = schedlist;
1054 if (schedlist)
1055 rdp->nextschedtail = schedtail;
925 spin_unlock_irqrestore(&rdp->lock, flags); 1056 spin_unlock_irqrestore(&rdp->lock, flags);
926} 1057}
927 1058
@@ -936,10 +1067,25 @@ void rcu_offline_cpu(int cpu)
936void __cpuinit rcu_online_cpu(int cpu) 1067void __cpuinit rcu_online_cpu(int cpu)
937{ 1068{
938 unsigned long flags; 1069 unsigned long flags;
1070 struct rcu_data *rdp;
939 1071
940 spin_lock_irqsave(&rcu_ctrlblk.fliplock, flags); 1072 spin_lock_irqsave(&rcu_ctrlblk.fliplock, flags);
941 cpu_set(cpu, rcu_cpu_online_map); 1073 cpu_set(cpu, rcu_cpu_online_map);
942 spin_unlock_irqrestore(&rcu_ctrlblk.fliplock, flags); 1074 spin_unlock_irqrestore(&rcu_ctrlblk.fliplock, flags);
1075
1076 /*
1077 * The rcu_sched grace-period processing might have bypassed
1078 * this CPU, given that it was not in the rcu_cpu_online_map
1079 * when the grace-period scan started. This means that the
1080 * grace-period task might sleep. So make sure that if this
1081 * should happen, the first callback posted to this CPU will
1082 * wake up the grace-period task if need be.
1083 */
1084
1085 rdp = RCU_DATA_CPU(cpu);
1086 spin_lock_irqsave(&rdp->lock, flags);
1087 rdp->rcu_sched_sleeping = 1;
1088 spin_unlock_irqrestore(&rdp->lock, flags);
943} 1089}
944 1090
945static void rcu_process_callbacks(struct softirq_action *unused) 1091static void rcu_process_callbacks(struct softirq_action *unused)
@@ -982,31 +1128,196 @@ void call_rcu(struct rcu_head *head, void (*func)(struct rcu_head *rcu))
982 *rdp->nexttail = head; 1128 *rdp->nexttail = head;
983 rdp->nexttail = &head->next; 1129 rdp->nexttail = &head->next;
984 RCU_TRACE_RDP(rcupreempt_trace_next_add, rdp); 1130 RCU_TRACE_RDP(rcupreempt_trace_next_add, rdp);
985 spin_unlock(&rdp->lock); 1131 spin_unlock_irqrestore(&rdp->lock, flags);
986 local_irq_restore(flags);
987} 1132}
988EXPORT_SYMBOL_GPL(call_rcu); 1133EXPORT_SYMBOL_GPL(call_rcu);
989 1134
1135void call_rcu_sched(struct rcu_head *head, void (*func)(struct rcu_head *rcu))
1136{
1137 unsigned long flags;
1138 struct rcu_data *rdp;
1139 int wake_gp = 0;
1140
1141 head->func = func;
1142 head->next = NULL;
1143 local_irq_save(flags);
1144 rdp = RCU_DATA_ME();
1145 spin_lock(&rdp->lock);
1146 *rdp->nextschedtail = head;
1147 rdp->nextschedtail = &head->next;
1148 if (rdp->rcu_sched_sleeping) {
1149
1150 /* Grace-period processing might be sleeping... */
1151
1152 rdp->rcu_sched_sleeping = 0;
1153 wake_gp = 1;
1154 }
1155 spin_unlock_irqrestore(&rdp->lock, flags);
1156 if (wake_gp) {
1157
1158 /* Wake up grace-period processing, unless someone beat us. */
1159
1160 spin_lock_irqsave(&rcu_ctrlblk.schedlock, flags);
1161 if (rcu_ctrlblk.sched_sleep != rcu_sched_sleeping)
1162 wake_gp = 0;
1163 rcu_ctrlblk.sched_sleep = rcu_sched_not_sleeping;
1164 spin_unlock_irqrestore(&rcu_ctrlblk.schedlock, flags);
1165 if (wake_gp)
1166 wake_up_interruptible(&rcu_ctrlblk.sched_wq);
1167 }
1168}
1169EXPORT_SYMBOL_GPL(call_rcu_sched);
1170
990/* 1171/*
991 * Wait until all currently running preempt_disable() code segments 1172 * Wait until all currently running preempt_disable() code segments
992 * (including hardware-irq-disable segments) complete. Note that 1173 * (including hardware-irq-disable segments) complete. Note that
993 * in -rt this does -not- necessarily result in all currently executing 1174 * in -rt this does -not- necessarily result in all currently executing
994 * interrupt -handlers- having completed. 1175 * interrupt -handlers- having completed.
995 */ 1176 */
996void __synchronize_sched(void) 1177synchronize_rcu_xxx(__synchronize_sched, call_rcu_sched)
1178EXPORT_SYMBOL_GPL(__synchronize_sched);
1179
1180/*
1181 * kthread function that manages call_rcu_sched grace periods.
1182 */
1183static int rcu_sched_grace_period(void *arg)
997{ 1184{
998 cpumask_t oldmask; 1185 int couldsleep; /* might sleep after current pass. */
1186 int couldsleepnext = 0; /* might sleep after next pass. */
999 int cpu; 1187 int cpu;
1188 unsigned long flags;
1189 struct rcu_data *rdp;
1190 int ret;
1000 1191
1001 if (sched_getaffinity(0, &oldmask) < 0) 1192 /*
1002 oldmask = cpu_possible_map; 1193 * Each pass through the following loop handles one
1003 for_each_online_cpu(cpu) { 1194 * rcu_sched grace period cycle.
1004 sched_setaffinity(0, &cpumask_of_cpu(cpu)); 1195 */
1005 schedule(); 1196 do {
1006 } 1197 /* Save each CPU's current state. */
1007 sched_setaffinity(0, &oldmask); 1198
1199 for_each_online_cpu(cpu) {
1200 dyntick_save_progress_counter_sched(cpu);
1201 save_qsctr_sched(cpu);
1202 }
1203
1204 /*
1205 * Sleep for about an RCU grace-period's worth to
1206 * allow better batching and to consume less CPU.
1207 */
1208 schedule_timeout_interruptible(RCU_SCHED_BATCH_TIME);
1209
1210 /*
1211 * If there was nothing to do last time, prepare to
1212 * sleep at the end of the current grace period cycle.
1213 */
1214 couldsleep = couldsleepnext;
1215 couldsleepnext = 1;
1216 if (couldsleep) {
1217 spin_lock_irqsave(&rcu_ctrlblk.schedlock, flags);
1218 rcu_ctrlblk.sched_sleep = rcu_sched_sleep_prep;
1219 spin_unlock_irqrestore(&rcu_ctrlblk.schedlock, flags);
1220 }
1221
1222 /*
1223 * Wait on each CPU in turn to have either visited
1224 * a quiescent state or been in dynticks-idle mode.
1225 */
1226 for_each_online_cpu(cpu) {
1227 while (rcu_qsctr_inc_needed(cpu) &&
1228 rcu_qsctr_inc_needed_dyntick(cpu)) {
1229 /* resched_cpu(cpu); @@@ */
1230 schedule_timeout_interruptible(1);
1231 }
1232 }
1233
1234 /* Advance callbacks for each CPU. */
1235
1236 for_each_online_cpu(cpu) {
1237
1238 rdp = RCU_DATA_CPU(cpu);
1239 spin_lock_irqsave(&rdp->lock, flags);
1240
1241 /*
1242 * We are running on this CPU irq-disabled, so no
1243 * CPU can go offline until we re-enable irqs.
1244 * The current CPU might have already gone
1245 * offline (between the for_each_offline_cpu and
1246 * the spin_lock_irqsave), but in that case all its
1247 * callback lists will be empty, so no harm done.
1248 *
1249 * Advance the callbacks! We share normal RCU's
1250 * donelist, since callbacks are invoked the
1251 * same way in either case.
1252 */
1253 if (rdp->waitschedlist != NULL) {
1254 *rdp->donetail = rdp->waitschedlist;
1255 rdp->donetail = rdp->waitschedtail;
1256
1257 /*
1258 * Next rcu_check_callbacks() will
1259 * do the required raise_softirq().
1260 */
1261 }
1262 if (rdp->nextschedlist != NULL) {
1263 rdp->waitschedlist = rdp->nextschedlist;
1264 rdp->waitschedtail = rdp->nextschedtail;
1265 couldsleep = 0;
1266 couldsleepnext = 0;
1267 } else {
1268 rdp->waitschedlist = NULL;
1269 rdp->waitschedtail = &rdp->waitschedlist;
1270 }
1271 rdp->nextschedlist = NULL;
1272 rdp->nextschedtail = &rdp->nextschedlist;
1273
1274 /* Mark sleep intention. */
1275
1276 rdp->rcu_sched_sleeping = couldsleep;
1277
1278 spin_unlock_irqrestore(&rdp->lock, flags);
1279 }
1280
1281 /* If we saw callbacks on the last scan, go deal with them. */
1282
1283 if (!couldsleep)
1284 continue;
1285
1286 /* Attempt to block... */
1287
1288 spin_lock_irqsave(&rcu_ctrlblk.schedlock, flags);
1289 if (rcu_ctrlblk.sched_sleep != rcu_sched_sleep_prep) {
1290
1291 /*
1292 * Someone posted a callback after we scanned.
1293 * Go take care of it.
1294 */
1295 spin_unlock_irqrestore(&rcu_ctrlblk.schedlock, flags);
1296 couldsleepnext = 0;
1297 continue;
1298 }
1299
1300 /* Block until the next person posts a callback. */
1301
1302 rcu_ctrlblk.sched_sleep = rcu_sched_sleeping;
1303 spin_unlock_irqrestore(&rcu_ctrlblk.schedlock, flags);
1304 ret = 0;
1305 __wait_event_interruptible(rcu_ctrlblk.sched_wq,
1306 rcu_ctrlblk.sched_sleep != rcu_sched_sleeping,
1307 ret);
1308
1309 /*
1310 * Signals would prevent us from sleeping, and we cannot
1311 * do much with them in any case. So flush them.
1312 */
1313 if (ret)
1314 flush_signals(current);
1315 couldsleepnext = 0;
1316
1317 } while (!kthread_should_stop());
1318
1319 return (0);
1008} 1320}
1009EXPORT_SYMBOL_GPL(__synchronize_sched);
1010 1321
1011/* 1322/*
1012 * Check to see if any future RCU-related work will need to be done 1323 * Check to see if any future RCU-related work will need to be done
@@ -1023,7 +1334,9 @@ int rcu_needs_cpu(int cpu)
1023 1334
1024 return (rdp->donelist != NULL || 1335 return (rdp->donelist != NULL ||
1025 !!rdp->waitlistcount || 1336 !!rdp->waitlistcount ||
1026 rdp->nextlist != NULL); 1337 rdp->nextlist != NULL ||
1338 rdp->nextschedlist != NULL ||
1339 rdp->waitschedlist != NULL);
1027} 1340}
1028 1341
1029int rcu_pending(int cpu) 1342int rcu_pending(int cpu)
@@ -1034,7 +1347,9 @@ int rcu_pending(int cpu)
1034 1347
1035 if (rdp->donelist != NULL || 1348 if (rdp->donelist != NULL ||
1036 !!rdp->waitlistcount || 1349 !!rdp->waitlistcount ||
1037 rdp->nextlist != NULL) 1350 rdp->nextlist != NULL ||
1351 rdp->nextschedlist != NULL ||
1352 rdp->waitschedlist != NULL)
1038 return 1; 1353 return 1;
1039 1354
1040 /* The RCU core needs an acknowledgement from this CPU. */ 1355 /* The RCU core needs an acknowledgement from this CPU. */
@@ -1101,6 +1416,11 @@ void __init __rcu_init(void)
1101 rdp->donetail = &rdp->donelist; 1416 rdp->donetail = &rdp->donelist;
1102 rdp->rcu_flipctr[0] = 0; 1417 rdp->rcu_flipctr[0] = 0;
1103 rdp->rcu_flipctr[1] = 0; 1418 rdp->rcu_flipctr[1] = 0;
1419 rdp->nextschedlist = NULL;
1420 rdp->nextschedtail = &rdp->nextschedlist;
1421 rdp->waitschedlist = NULL;
1422 rdp->waitschedtail = &rdp->waitschedlist;
1423 rdp->rcu_sched_sleeping = 0;
1104 } 1424 }
1105 register_cpu_notifier(&rcu_nb); 1425 register_cpu_notifier(&rcu_nb);
1106 1426
@@ -1123,11 +1443,15 @@ void __init __rcu_init(void)
1123} 1443}
1124 1444
1125/* 1445/*
1126 * Deprecated, use synchronize_rcu() or synchronize_sched() instead. 1446 * Late-boot-time RCU initialization that must wait until after scheduler
1447 * has been initialized.
1127 */ 1448 */
1128void synchronize_kernel(void) 1449void __init rcu_init_sched(void)
1129{ 1450{
1130 synchronize_rcu(); 1451 rcu_sched_grace_period_task = kthread_run(rcu_sched_grace_period,
1452 NULL,
1453 "rcu_sched_grace_period");
1454 WARN_ON(IS_ERR(rcu_sched_grace_period_task));
1131} 1455}
1132 1456
1133#ifdef CONFIG_RCU_TRACE 1457#ifdef CONFIG_RCU_TRACE
diff --git a/kernel/rcupreempt_trace.c b/kernel/rcupreempt_trace.c
index 49ac4947af24..5edf82c34bbc 100644
--- a/kernel/rcupreempt_trace.c
+++ b/kernel/rcupreempt_trace.c
@@ -38,7 +38,6 @@
38#include <linux/moduleparam.h> 38#include <linux/moduleparam.h>
39#include <linux/percpu.h> 39#include <linux/percpu.h>
40#include <linux/notifier.h> 40#include <linux/notifier.h>
41#include <linux/rcupdate.h>
42#include <linux/cpu.h> 41#include <linux/cpu.h>
43#include <linux/mutex.h> 42#include <linux/mutex.h>
44#include <linux/rcupreempt_trace.h> 43#include <linux/rcupreempt_trace.h>
diff --git a/kernel/rcutorture.c b/kernel/rcutorture.c
index 33acc424667e..90b5b123f7a1 100644
--- a/kernel/rcutorture.c
+++ b/kernel/rcutorture.c
@@ -57,7 +57,9 @@ static int stat_interval; /* Interval between stats, in seconds. */
57 /* Defaults to "only at end of test". */ 57 /* Defaults to "only at end of test". */
58static int verbose; /* Print more debug info. */ 58static int verbose; /* Print more debug info. */
59static int test_no_idle_hz; /* Test RCU's support for tickless idle CPUs. */ 59static int test_no_idle_hz; /* Test RCU's support for tickless idle CPUs. */
60static int shuffle_interval = 5; /* Interval between shuffles (in sec)*/ 60static int shuffle_interval = 3; /* Interval between shuffles (in sec)*/
61static int stutter = 5; /* Start/stop testing interval (in sec) */
62static int irqreader = 1; /* RCU readers from irq (timers). */
61static char *torture_type = "rcu"; /* What RCU implementation to torture. */ 63static char *torture_type = "rcu"; /* What RCU implementation to torture. */
62 64
63module_param(nreaders, int, 0444); 65module_param(nreaders, int, 0444);
@@ -72,6 +74,10 @@ module_param(test_no_idle_hz, bool, 0444);
72MODULE_PARM_DESC(test_no_idle_hz, "Test support for tickless idle CPUs"); 74MODULE_PARM_DESC(test_no_idle_hz, "Test support for tickless idle CPUs");
73module_param(shuffle_interval, int, 0444); 75module_param(shuffle_interval, int, 0444);
74MODULE_PARM_DESC(shuffle_interval, "Number of seconds between shuffles"); 76MODULE_PARM_DESC(shuffle_interval, "Number of seconds between shuffles");
77module_param(stutter, int, 0444);
78MODULE_PARM_DESC(stutter, "Number of seconds to run/halt test");
79module_param(irqreader, int, 0444);
80MODULE_PARM_DESC(irqreader, "Allow RCU readers from irq handlers");
75module_param(torture_type, charp, 0444); 81module_param(torture_type, charp, 0444);
76MODULE_PARM_DESC(torture_type, "Type of RCU to torture (rcu, rcu_bh, srcu)"); 82MODULE_PARM_DESC(torture_type, "Type of RCU to torture (rcu, rcu_bh, srcu)");
77 83
@@ -91,6 +97,7 @@ static struct task_struct **fakewriter_tasks;
91static struct task_struct **reader_tasks; 97static struct task_struct **reader_tasks;
92static struct task_struct *stats_task; 98static struct task_struct *stats_task;
93static struct task_struct *shuffler_task; 99static struct task_struct *shuffler_task;
100static struct task_struct *stutter_task;
94 101
95#define RCU_TORTURE_PIPE_LEN 10 102#define RCU_TORTURE_PIPE_LEN 10
96 103
@@ -117,8 +124,18 @@ static atomic_t n_rcu_torture_alloc_fail;
117static atomic_t n_rcu_torture_free; 124static atomic_t n_rcu_torture_free;
118static atomic_t n_rcu_torture_mberror; 125static atomic_t n_rcu_torture_mberror;
119static atomic_t n_rcu_torture_error; 126static atomic_t n_rcu_torture_error;
127static long n_rcu_torture_timers = 0;
120static struct list_head rcu_torture_removed; 128static struct list_head rcu_torture_removed;
121 129
130static int stutter_pause_test = 0;
131
132#if defined(MODULE) || defined(CONFIG_RCU_TORTURE_TEST_RUNNABLE)
133#define RCUTORTURE_RUNNABLE_INIT 1
134#else
135#define RCUTORTURE_RUNNABLE_INIT 0
136#endif
137int rcutorture_runnable = RCUTORTURE_RUNNABLE_INIT;
138
122/* 139/*
123 * Allocate an element from the rcu_tortures pool. 140 * Allocate an element from the rcu_tortures pool.
124 */ 141 */
@@ -179,6 +196,16 @@ rcu_random(struct rcu_random_state *rrsp)
179 return swahw32(rrsp->rrs_state); 196 return swahw32(rrsp->rrs_state);
180} 197}
181 198
199static void
200rcu_stutter_wait(void)
201{
202 while (stutter_pause_test || !rcutorture_runnable)
203 if (rcutorture_runnable)
204 schedule_timeout_interruptible(1);
205 else
206 schedule_timeout_interruptible(round_jiffies_relative(HZ));
207}
208
182/* 209/*
183 * Operations vector for selecting different types of tests. 210 * Operations vector for selecting different types of tests.
184 */ 211 */
@@ -192,7 +219,9 @@ struct rcu_torture_ops {
192 int (*completed)(void); 219 int (*completed)(void);
193 void (*deferredfree)(struct rcu_torture *p); 220 void (*deferredfree)(struct rcu_torture *p);
194 void (*sync)(void); 221 void (*sync)(void);
222 void (*cb_barrier)(void);
195 int (*stats)(char *page); 223 int (*stats)(char *page);
224 int irqcapable;
196 char *name; 225 char *name;
197}; 226};
198static struct rcu_torture_ops *cur_ops = NULL; 227static struct rcu_torture_ops *cur_ops = NULL;
@@ -265,7 +294,9 @@ static struct rcu_torture_ops rcu_ops = {
265 .completed = rcu_torture_completed, 294 .completed = rcu_torture_completed,
266 .deferredfree = rcu_torture_deferred_free, 295 .deferredfree = rcu_torture_deferred_free,
267 .sync = synchronize_rcu, 296 .sync = synchronize_rcu,
297 .cb_barrier = rcu_barrier,
268 .stats = NULL, 298 .stats = NULL,
299 .irqcapable = 1,
269 .name = "rcu" 300 .name = "rcu"
270}; 301};
271 302
@@ -304,7 +335,9 @@ static struct rcu_torture_ops rcu_sync_ops = {
304 .completed = rcu_torture_completed, 335 .completed = rcu_torture_completed,
305 .deferredfree = rcu_sync_torture_deferred_free, 336 .deferredfree = rcu_sync_torture_deferred_free,
306 .sync = synchronize_rcu, 337 .sync = synchronize_rcu,
338 .cb_barrier = NULL,
307 .stats = NULL, 339 .stats = NULL,
340 .irqcapable = 1,
308 .name = "rcu_sync" 341 .name = "rcu_sync"
309}; 342};
310 343
@@ -364,7 +397,9 @@ static struct rcu_torture_ops rcu_bh_ops = {
364 .completed = rcu_bh_torture_completed, 397 .completed = rcu_bh_torture_completed,
365 .deferredfree = rcu_bh_torture_deferred_free, 398 .deferredfree = rcu_bh_torture_deferred_free,
366 .sync = rcu_bh_torture_synchronize, 399 .sync = rcu_bh_torture_synchronize,
400 .cb_barrier = rcu_barrier_bh,
367 .stats = NULL, 401 .stats = NULL,
402 .irqcapable = 1,
368 .name = "rcu_bh" 403 .name = "rcu_bh"
369}; 404};
370 405
@@ -377,7 +412,9 @@ static struct rcu_torture_ops rcu_bh_sync_ops = {
377 .completed = rcu_bh_torture_completed, 412 .completed = rcu_bh_torture_completed,
378 .deferredfree = rcu_sync_torture_deferred_free, 413 .deferredfree = rcu_sync_torture_deferred_free,
379 .sync = rcu_bh_torture_synchronize, 414 .sync = rcu_bh_torture_synchronize,
415 .cb_barrier = NULL,
380 .stats = NULL, 416 .stats = NULL,
417 .irqcapable = 1,
381 .name = "rcu_bh_sync" 418 .name = "rcu_bh_sync"
382}; 419};
383 420
@@ -458,6 +495,7 @@ static struct rcu_torture_ops srcu_ops = {
458 .completed = srcu_torture_completed, 495 .completed = srcu_torture_completed,
459 .deferredfree = rcu_sync_torture_deferred_free, 496 .deferredfree = rcu_sync_torture_deferred_free,
460 .sync = srcu_torture_synchronize, 497 .sync = srcu_torture_synchronize,
498 .cb_barrier = NULL,
461 .stats = srcu_torture_stats, 499 .stats = srcu_torture_stats,
462 .name = "srcu" 500 .name = "srcu"
463}; 501};
@@ -482,6 +520,11 @@ static int sched_torture_completed(void)
482 return 0; 520 return 0;
483} 521}
484 522
523static void rcu_sched_torture_deferred_free(struct rcu_torture *p)
524{
525 call_rcu_sched(&p->rtort_rcu, rcu_torture_cb);
526}
527
485static void sched_torture_synchronize(void) 528static void sched_torture_synchronize(void)
486{ 529{
487 synchronize_sched(); 530 synchronize_sched();
@@ -494,12 +537,28 @@ static struct rcu_torture_ops sched_ops = {
494 .readdelay = rcu_read_delay, /* just reuse rcu's version. */ 537 .readdelay = rcu_read_delay, /* just reuse rcu's version. */
495 .readunlock = sched_torture_read_unlock, 538 .readunlock = sched_torture_read_unlock,
496 .completed = sched_torture_completed, 539 .completed = sched_torture_completed,
497 .deferredfree = rcu_sync_torture_deferred_free, 540 .deferredfree = rcu_sched_torture_deferred_free,
498 .sync = sched_torture_synchronize, 541 .sync = sched_torture_synchronize,
542 .cb_barrier = rcu_barrier_sched,
499 .stats = NULL, 543 .stats = NULL,
544 .irqcapable = 1,
500 .name = "sched" 545 .name = "sched"
501}; 546};
502 547
548static struct rcu_torture_ops sched_ops_sync = {
549 .init = rcu_sync_torture_init,
550 .cleanup = NULL,
551 .readlock = sched_torture_read_lock,
552 .readdelay = rcu_read_delay, /* just reuse rcu's version. */
553 .readunlock = sched_torture_read_unlock,
554 .completed = sched_torture_completed,
555 .deferredfree = rcu_sync_torture_deferred_free,
556 .sync = sched_torture_synchronize,
557 .cb_barrier = NULL,
558 .stats = NULL,
559 .name = "sched_sync"
560};
561
503/* 562/*
504 * RCU torture writer kthread. Repeatedly substitutes a new structure 563 * RCU torture writer kthread. Repeatedly substitutes a new structure
505 * for that pointed to by rcu_torture_current, freeing the old structure 564 * for that pointed to by rcu_torture_current, freeing the old structure
@@ -537,6 +596,7 @@ rcu_torture_writer(void *arg)
537 } 596 }
538 rcu_torture_current_version++; 597 rcu_torture_current_version++;
539 oldbatch = cur_ops->completed(); 598 oldbatch = cur_ops->completed();
599 rcu_stutter_wait();
540 } while (!kthread_should_stop() && !fullstop); 600 } while (!kthread_should_stop() && !fullstop);
541 VERBOSE_PRINTK_STRING("rcu_torture_writer task stopping"); 601 VERBOSE_PRINTK_STRING("rcu_torture_writer task stopping");
542 while (!kthread_should_stop()) 602 while (!kthread_should_stop())
@@ -560,6 +620,7 @@ rcu_torture_fakewriter(void *arg)
560 schedule_timeout_uninterruptible(1 + rcu_random(&rand)%10); 620 schedule_timeout_uninterruptible(1 + rcu_random(&rand)%10);
561 udelay(rcu_random(&rand) & 0x3ff); 621 udelay(rcu_random(&rand) & 0x3ff);
562 cur_ops->sync(); 622 cur_ops->sync();
623 rcu_stutter_wait();
563 } while (!kthread_should_stop() && !fullstop); 624 } while (!kthread_should_stop() && !fullstop);
564 625
565 VERBOSE_PRINTK_STRING("rcu_torture_fakewriter task stopping"); 626 VERBOSE_PRINTK_STRING("rcu_torture_fakewriter task stopping");
@@ -569,6 +630,52 @@ rcu_torture_fakewriter(void *arg)
569} 630}
570 631
571/* 632/*
633 * RCU torture reader from timer handler. Dereferences rcu_torture_current,
634 * incrementing the corresponding element of the pipeline array. The
635 * counter in the element should never be greater than 1, otherwise, the
636 * RCU implementation is broken.
637 */
638static void rcu_torture_timer(unsigned long unused)
639{
640 int idx;
641 int completed;
642 static DEFINE_RCU_RANDOM(rand);
643 static DEFINE_SPINLOCK(rand_lock);
644 struct rcu_torture *p;
645 int pipe_count;
646
647 idx = cur_ops->readlock();
648 completed = cur_ops->completed();
649 p = rcu_dereference(rcu_torture_current);
650 if (p == NULL) {
651 /* Leave because rcu_torture_writer is not yet underway */
652 cur_ops->readunlock(idx);
653 return;
654 }
655 if (p->rtort_mbtest == 0)
656 atomic_inc(&n_rcu_torture_mberror);
657 spin_lock(&rand_lock);
658 cur_ops->readdelay(&rand);
659 n_rcu_torture_timers++;
660 spin_unlock(&rand_lock);
661 preempt_disable();
662 pipe_count = p->rtort_pipe_count;
663 if (pipe_count > RCU_TORTURE_PIPE_LEN) {
664 /* Should not happen, but... */
665 pipe_count = RCU_TORTURE_PIPE_LEN;
666 }
667 ++__get_cpu_var(rcu_torture_count)[pipe_count];
668 completed = cur_ops->completed() - completed;
669 if (completed > RCU_TORTURE_PIPE_LEN) {
670 /* Should not happen, but... */
671 completed = RCU_TORTURE_PIPE_LEN;
672 }
673 ++__get_cpu_var(rcu_torture_batch)[completed];
674 preempt_enable();
675 cur_ops->readunlock(idx);
676}
677
678/*
572 * RCU torture reader kthread. Repeatedly dereferences rcu_torture_current, 679 * RCU torture reader kthread. Repeatedly dereferences rcu_torture_current,
573 * incrementing the corresponding element of the pipeline array. The 680 * incrementing the corresponding element of the pipeline array. The
574 * counter in the element should never be greater than 1, otherwise, the 681 * counter in the element should never be greater than 1, otherwise, the
@@ -582,11 +689,18 @@ rcu_torture_reader(void *arg)
582 DEFINE_RCU_RANDOM(rand); 689 DEFINE_RCU_RANDOM(rand);
583 struct rcu_torture *p; 690 struct rcu_torture *p;
584 int pipe_count; 691 int pipe_count;
692 struct timer_list t;
585 693
586 VERBOSE_PRINTK_STRING("rcu_torture_reader task started"); 694 VERBOSE_PRINTK_STRING("rcu_torture_reader task started");
587 set_user_nice(current, 19); 695 set_user_nice(current, 19);
696 if (irqreader && cur_ops->irqcapable)
697 setup_timer_on_stack(&t, rcu_torture_timer, 0);
588 698
589 do { 699 do {
700 if (irqreader && cur_ops->irqcapable) {
701 if (!timer_pending(&t))
702 mod_timer(&t, 1);
703 }
590 idx = cur_ops->readlock(); 704 idx = cur_ops->readlock();
591 completed = cur_ops->completed(); 705 completed = cur_ops->completed();
592 p = rcu_dereference(rcu_torture_current); 706 p = rcu_dereference(rcu_torture_current);
@@ -615,8 +729,11 @@ rcu_torture_reader(void *arg)
615 preempt_enable(); 729 preempt_enable();
616 cur_ops->readunlock(idx); 730 cur_ops->readunlock(idx);
617 schedule(); 731 schedule();
732 rcu_stutter_wait();
618 } while (!kthread_should_stop() && !fullstop); 733 } while (!kthread_should_stop() && !fullstop);
619 VERBOSE_PRINTK_STRING("rcu_torture_reader task stopping"); 734 VERBOSE_PRINTK_STRING("rcu_torture_reader task stopping");
735 if (irqreader && cur_ops->irqcapable)
736 del_timer_sync(&t);
620 while (!kthread_should_stop()) 737 while (!kthread_should_stop())
621 schedule_timeout_uninterruptible(1); 738 schedule_timeout_uninterruptible(1);
622 return 0; 739 return 0;
@@ -647,20 +764,22 @@ rcu_torture_printk(char *page)
647 cnt += sprintf(&page[cnt], "%s%s ", torture_type, TORTURE_FLAG); 764 cnt += sprintf(&page[cnt], "%s%s ", torture_type, TORTURE_FLAG);
648 cnt += sprintf(&page[cnt], 765 cnt += sprintf(&page[cnt],
649 "rtc: %p ver: %ld tfle: %d rta: %d rtaf: %d rtf: %d " 766 "rtc: %p ver: %ld tfle: %d rta: %d rtaf: %d rtf: %d "
650 "rtmbe: %d", 767 "rtmbe: %d nt: %ld",
651 rcu_torture_current, 768 rcu_torture_current,
652 rcu_torture_current_version, 769 rcu_torture_current_version,
653 list_empty(&rcu_torture_freelist), 770 list_empty(&rcu_torture_freelist),
654 atomic_read(&n_rcu_torture_alloc), 771 atomic_read(&n_rcu_torture_alloc),
655 atomic_read(&n_rcu_torture_alloc_fail), 772 atomic_read(&n_rcu_torture_alloc_fail),
656 atomic_read(&n_rcu_torture_free), 773 atomic_read(&n_rcu_torture_free),
657 atomic_read(&n_rcu_torture_mberror)); 774 atomic_read(&n_rcu_torture_mberror),
775 n_rcu_torture_timers);
658 if (atomic_read(&n_rcu_torture_mberror) != 0) 776 if (atomic_read(&n_rcu_torture_mberror) != 0)
659 cnt += sprintf(&page[cnt], " !!!"); 777 cnt += sprintf(&page[cnt], " !!!");
660 cnt += sprintf(&page[cnt], "\n%s%s ", torture_type, TORTURE_FLAG); 778 cnt += sprintf(&page[cnt], "\n%s%s ", torture_type, TORTURE_FLAG);
661 if (i > 1) { 779 if (i > 1) {
662 cnt += sprintf(&page[cnt], "!!! "); 780 cnt += sprintf(&page[cnt], "!!! ");
663 atomic_inc(&n_rcu_torture_error); 781 atomic_inc(&n_rcu_torture_error);
782 WARN_ON_ONCE(1);
664 } 783 }
665 cnt += sprintf(&page[cnt], "Reader Pipe: "); 784 cnt += sprintf(&page[cnt], "Reader Pipe: ");
666 for (i = 0; i < RCU_TORTURE_PIPE_LEN + 1; i++) 785 for (i = 0; i < RCU_TORTURE_PIPE_LEN + 1; i++)
@@ -785,15 +904,34 @@ rcu_torture_shuffle(void *arg)
785 return 0; 904 return 0;
786} 905}
787 906
907/* Cause the rcutorture test to "stutter", starting and stopping all
908 * threads periodically.
909 */
910static int
911rcu_torture_stutter(void *arg)
912{
913 VERBOSE_PRINTK_STRING("rcu_torture_stutter task started");
914 do {
915 schedule_timeout_interruptible(stutter * HZ);
916 stutter_pause_test = 1;
917 if (!kthread_should_stop())
918 schedule_timeout_interruptible(stutter * HZ);
919 stutter_pause_test = 0;
920 } while (!kthread_should_stop());
921 VERBOSE_PRINTK_STRING("rcu_torture_stutter task stopping");
922 return 0;
923}
924
788static inline void 925static inline void
789rcu_torture_print_module_parms(char *tag) 926rcu_torture_print_module_parms(char *tag)
790{ 927{
791 printk(KERN_ALERT "%s" TORTURE_FLAG 928 printk(KERN_ALERT "%s" TORTURE_FLAG
792 "--- %s: nreaders=%d nfakewriters=%d " 929 "--- %s: nreaders=%d nfakewriters=%d "
793 "stat_interval=%d verbose=%d test_no_idle_hz=%d " 930 "stat_interval=%d verbose=%d test_no_idle_hz=%d "
794 "shuffle_interval = %d\n", 931 "shuffle_interval=%d stutter=%d irqreader=%d\n",
795 torture_type, tag, nrealreaders, nfakewriters, 932 torture_type, tag, nrealreaders, nfakewriters,
796 stat_interval, verbose, test_no_idle_hz, shuffle_interval); 933 stat_interval, verbose, test_no_idle_hz, shuffle_interval,
934 stutter, irqreader);
797} 935}
798 936
799static void 937static void
@@ -802,6 +940,11 @@ rcu_torture_cleanup(void)
802 int i; 940 int i;
803 941
804 fullstop = 1; 942 fullstop = 1;
943 if (stutter_task) {
944 VERBOSE_PRINTK_STRING("Stopping rcu_torture_stutter task");
945 kthread_stop(stutter_task);
946 }
947 stutter_task = NULL;
805 if (shuffler_task) { 948 if (shuffler_task) {
806 VERBOSE_PRINTK_STRING("Stopping rcu_torture_shuffle task"); 949 VERBOSE_PRINTK_STRING("Stopping rcu_torture_shuffle task");
807 kthread_stop(shuffler_task); 950 kthread_stop(shuffler_task);
@@ -848,7 +991,9 @@ rcu_torture_cleanup(void)
848 stats_task = NULL; 991 stats_task = NULL;
849 992
850 /* Wait for all RCU callbacks to fire. */ 993 /* Wait for all RCU callbacks to fire. */
851 rcu_barrier(); 994
995 if (cur_ops->cb_barrier != NULL)
996 cur_ops->cb_barrier();
852 997
853 rcu_torture_stats_print(); /* -After- the stats thread is stopped! */ 998 rcu_torture_stats_print(); /* -After- the stats thread is stopped! */
854 999
@@ -868,7 +1013,7 @@ rcu_torture_init(void)
868 int firsterr = 0; 1013 int firsterr = 0;
869 static struct rcu_torture_ops *torture_ops[] = 1014 static struct rcu_torture_ops *torture_ops[] =
870 { &rcu_ops, &rcu_sync_ops, &rcu_bh_ops, &rcu_bh_sync_ops, 1015 { &rcu_ops, &rcu_sync_ops, &rcu_bh_ops, &rcu_bh_sync_ops,
871 &srcu_ops, &sched_ops, }; 1016 &srcu_ops, &sched_ops, &sched_ops_sync, };
872 1017
873 /* Process args and tell the world that the torturer is on the job. */ 1018 /* Process args and tell the world that the torturer is on the job. */
874 for (i = 0; i < ARRAY_SIZE(torture_ops); i++) { 1019 for (i = 0; i < ARRAY_SIZE(torture_ops); i++) {
@@ -988,6 +1133,19 @@ rcu_torture_init(void)
988 goto unwind; 1133 goto unwind;
989 } 1134 }
990 } 1135 }
1136 if (stutter < 0)
1137 stutter = 0;
1138 if (stutter) {
1139 /* Create the stutter thread */
1140 stutter_task = kthread_run(rcu_torture_stutter, NULL,
1141 "rcu_torture_stutter");
1142 if (IS_ERR(stutter_task)) {
1143 firsterr = PTR_ERR(stutter_task);
1144 VERBOSE_PRINTK_ERRSTRING("Failed to create stutter");
1145 stutter_task = NULL;
1146 goto unwind;
1147 }
1148 }
991 return 0; 1149 return 0;
992 1150
993unwind: 1151unwind:
diff --git a/kernel/smp.c b/kernel/smp.c
new file mode 100644
index 000000000000..462c785ca1ee
--- /dev/null
+++ b/kernel/smp.c
@@ -0,0 +1,383 @@
1/*
2 * Generic helpers for smp ipi calls
3 *
4 * (C) Jens Axboe <jens.axboe@oracle.com> 2008
5 *
6 */
7#include <linux/init.h>
8#include <linux/module.h>
9#include <linux/percpu.h>
10#include <linux/rcupdate.h>
11#include <linux/rculist.h>
12#include <linux/smp.h>
13
14static DEFINE_PER_CPU(struct call_single_queue, call_single_queue);
15static LIST_HEAD(call_function_queue);
16__cacheline_aligned_in_smp DEFINE_SPINLOCK(call_function_lock);
17
18enum {
19 CSD_FLAG_WAIT = 0x01,
20 CSD_FLAG_ALLOC = 0x02,
21};
22
23struct call_function_data {
24 struct call_single_data csd;
25 spinlock_t lock;
26 unsigned int refs;
27 cpumask_t cpumask;
28 struct rcu_head rcu_head;
29};
30
31struct call_single_queue {
32 struct list_head list;
33 spinlock_t lock;
34};
35
36void __cpuinit init_call_single_data(void)
37{
38 int i;
39
40 for_each_possible_cpu(i) {
41 struct call_single_queue *q = &per_cpu(call_single_queue, i);
42
43 spin_lock_init(&q->lock);
44 INIT_LIST_HEAD(&q->list);
45 }
46}
47
48static void csd_flag_wait(struct call_single_data *data)
49{
50 /* Wait for response */
51 do {
52 /*
53 * We need to see the flags store in the IPI handler
54 */
55 smp_mb();
56 if (!(data->flags & CSD_FLAG_WAIT))
57 break;
58 cpu_relax();
59 } while (1);
60}
61
62/*
63 * Insert a previously allocated call_single_data element for execution
64 * on the given CPU. data must already have ->func, ->info, and ->flags set.
65 */
66static void generic_exec_single(int cpu, struct call_single_data *data)
67{
68 struct call_single_queue *dst = &per_cpu(call_single_queue, cpu);
69 int wait = data->flags & CSD_FLAG_WAIT, ipi;
70 unsigned long flags;
71
72 spin_lock_irqsave(&dst->lock, flags);
73 ipi = list_empty(&dst->list);
74 list_add_tail(&data->list, &dst->list);
75 spin_unlock_irqrestore(&dst->lock, flags);
76
77 if (ipi)
78 arch_send_call_function_single_ipi(cpu);
79
80 if (wait)
81 csd_flag_wait(data);
82}
83
84static void rcu_free_call_data(struct rcu_head *head)
85{
86 struct call_function_data *data;
87
88 data = container_of(head, struct call_function_data, rcu_head);
89
90 kfree(data);
91}
92
93/*
94 * Invoked by arch to handle an IPI for call function. Must be called with
95 * interrupts disabled.
96 */
97void generic_smp_call_function_interrupt(void)
98{
99 struct call_function_data *data;
100 int cpu = get_cpu();
101
102 /*
103 * It's ok to use list_for_each_rcu() here even though we may delete
104 * 'pos', since list_del_rcu() doesn't clear ->next
105 */
106 rcu_read_lock();
107 list_for_each_entry_rcu(data, &call_function_queue, csd.list) {
108 int refs;
109
110 if (!cpu_isset(cpu, data->cpumask))
111 continue;
112
113 data->csd.func(data->csd.info);
114
115 spin_lock(&data->lock);
116 cpu_clear(cpu, data->cpumask);
117 WARN_ON(data->refs == 0);
118 data->refs--;
119 refs = data->refs;
120 spin_unlock(&data->lock);
121
122 if (refs)
123 continue;
124
125 spin_lock(&call_function_lock);
126 list_del_rcu(&data->csd.list);
127 spin_unlock(&call_function_lock);
128
129 if (data->csd.flags & CSD_FLAG_WAIT) {
130 /*
131 * serialize stores to data with the flag clear
132 * and wakeup
133 */
134 smp_wmb();
135 data->csd.flags &= ~CSD_FLAG_WAIT;
136 } else
137 call_rcu(&data->rcu_head, rcu_free_call_data);
138 }
139 rcu_read_unlock();
140
141 put_cpu();
142}
143
144/*
145 * Invoked by arch to handle an IPI for call function single. Must be called
146 * from the arch with interrupts disabled.
147 */
148void generic_smp_call_function_single_interrupt(void)
149{
150 struct call_single_queue *q = &__get_cpu_var(call_single_queue);
151 LIST_HEAD(list);
152
153 /*
154 * Need to see other stores to list head for checking whether
155 * list is empty without holding q->lock
156 */
157 smp_mb();
158 while (!list_empty(&q->list)) {
159 unsigned int data_flags;
160
161 spin_lock(&q->lock);
162 list_replace_init(&q->list, &list);
163 spin_unlock(&q->lock);
164
165 while (!list_empty(&list)) {
166 struct call_single_data *data;
167
168 data = list_entry(list.next, struct call_single_data,
169 list);
170 list_del(&data->list);
171
172 /*
173 * 'data' can be invalid after this call if
174 * flags == 0 (when called through
175 * generic_exec_single(), so save them away before
176 * making the call.
177 */
178 data_flags = data->flags;
179
180 data->func(data->info);
181
182 if (data_flags & CSD_FLAG_WAIT) {
183 smp_wmb();
184 data->flags &= ~CSD_FLAG_WAIT;
185 } else if (data_flags & CSD_FLAG_ALLOC)
186 kfree(data);
187 }
188 /*
189 * See comment on outer loop
190 */
191 smp_mb();
192 }
193}
194
195/*
196 * smp_call_function_single - Run a function on a specific CPU
197 * @func: The function to run. This must be fast and non-blocking.
198 * @info: An arbitrary pointer to pass to the function.
199 * @wait: If true, wait until function has completed on other CPUs.
200 *
201 * Returns 0 on success, else a negative status code. Note that @wait
202 * will be implicitly turned on in case of allocation failures, since
203 * we fall back to on-stack allocation.
204 */
205int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
206 int wait)
207{
208 struct call_single_data d;
209 unsigned long flags;
210 /* prevent preemption and reschedule on another processor */
211 int me = get_cpu();
212
213 /* Can deadlock when called with interrupts disabled */
214 WARN_ON(irqs_disabled());
215
216 if (cpu == me) {
217 local_irq_save(flags);
218 func(info);
219 local_irq_restore(flags);
220 } else {
221 struct call_single_data *data = NULL;
222
223 if (!wait) {
224 data = kmalloc(sizeof(*data), GFP_ATOMIC);
225 if (data)
226 data->flags = CSD_FLAG_ALLOC;
227 }
228 if (!data) {
229 data = &d;
230 data->flags = CSD_FLAG_WAIT;
231 }
232
233 data->func = func;
234 data->info = info;
235 generic_exec_single(cpu, data);
236 }
237
238 put_cpu();
239 return 0;
240}
241EXPORT_SYMBOL(smp_call_function_single);
242
243/**
244 * __smp_call_function_single(): Run a function on another CPU
245 * @cpu: The CPU to run on.
246 * @data: Pre-allocated and setup data structure
247 *
248 * Like smp_call_function_single(), but allow caller to pass in a pre-allocated
249 * data structure. Useful for embedding @data inside other structures, for
250 * instance.
251 *
252 */
253void __smp_call_function_single(int cpu, struct call_single_data *data)
254{
255 /* Can deadlock when called with interrupts disabled */
256 WARN_ON((data->flags & CSD_FLAG_WAIT) && irqs_disabled());
257
258 generic_exec_single(cpu, data);
259}
260
261/**
262 * smp_call_function_mask(): Run a function on a set of other CPUs.
263 * @mask: The set of cpus to run on.
264 * @func: The function to run. This must be fast and non-blocking.
265 * @info: An arbitrary pointer to pass to the function.
266 * @wait: If true, wait (atomically) until function has completed on other CPUs.
267 *
268 * Returns 0 on success, else a negative status code.
269 *
270 * If @wait is true, then returns once @func has returned. Note that @wait
271 * will be implicitly turned on in case of allocation failures, since
272 * we fall back to on-stack allocation.
273 *
274 * You must not call this function with disabled interrupts or from a
275 * hardware interrupt handler or from a bottom half handler. Preemption
276 * must be disabled when calling this function.
277 */
278int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info,
279 int wait)
280{
281 struct call_function_data d;
282 struct call_function_data *data = NULL;
283 cpumask_t allbutself;
284 unsigned long flags;
285 int cpu, num_cpus;
286
287 /* Can deadlock when called with interrupts disabled */
288 WARN_ON(irqs_disabled());
289
290 cpu = smp_processor_id();
291 allbutself = cpu_online_map;
292 cpu_clear(cpu, allbutself);
293 cpus_and(mask, mask, allbutself);
294 num_cpus = cpus_weight(mask);
295
296 /*
297 * If zero CPUs, return. If just a single CPU, turn this request
298 * into a targetted single call instead since it's faster.
299 */
300 if (!num_cpus)
301 return 0;
302 else if (num_cpus == 1) {
303 cpu = first_cpu(mask);
304 return smp_call_function_single(cpu, func, info, wait);
305 }
306
307 if (!wait) {
308 data = kmalloc(sizeof(*data), GFP_ATOMIC);
309 if (data)
310 data->csd.flags = CSD_FLAG_ALLOC;
311 }
312 if (!data) {
313 data = &d;
314 data->csd.flags = CSD_FLAG_WAIT;
315 wait = 1;
316 }
317
318 spin_lock_init(&data->lock);
319 data->csd.func = func;
320 data->csd.info = info;
321 data->refs = num_cpus;
322 data->cpumask = mask;
323
324 spin_lock_irqsave(&call_function_lock, flags);
325 list_add_tail_rcu(&data->csd.list, &call_function_queue);
326 spin_unlock_irqrestore(&call_function_lock, flags);
327
328 /* Send a message to all CPUs in the map */
329 arch_send_call_function_ipi(mask);
330
331 /* optionally wait for the CPUs to complete */
332 if (wait)
333 csd_flag_wait(&data->csd);
334
335 return 0;
336}
337EXPORT_SYMBOL(smp_call_function_mask);
338
339/**
340 * smp_call_function(): Run a function on all other CPUs.
341 * @func: The function to run. This must be fast and non-blocking.
342 * @info: An arbitrary pointer to pass to the function.
343 * @wait: If true, wait (atomically) until function has completed on other CPUs.
344 *
345 * Returns 0 on success, else a negative status code.
346 *
347 * If @wait is true, then returns once @func has returned; otherwise
348 * it returns just before the target cpu calls @func. In case of allocation
349 * failure, @wait will be implicitly turned on.
350 *
351 * You must not call this function with disabled interrupts or from a
352 * hardware interrupt handler or from a bottom half handler.
353 */
354int smp_call_function(void (*func)(void *), void *info, int wait)
355{
356 int ret;
357
358 preempt_disable();
359 ret = smp_call_function_mask(cpu_online_map, func, info, wait);
360 preempt_enable();
361 return ret;
362}
363EXPORT_SYMBOL(smp_call_function);
364
365void ipi_call_lock(void)
366{
367 spin_lock(&call_function_lock);
368}
369
370void ipi_call_unlock(void)
371{
372 spin_unlock(&call_function_lock);
373}
374
375void ipi_call_lock_irq(void)
376{
377 spin_lock_irq(&call_function_lock);
378}
379
380void ipi_call_unlock_irq(void)
381{
382 spin_unlock_irq(&call_function_lock);
383}
diff --git a/kernel/softirq.c b/kernel/softirq.c
index 3e9e896fdc5b..81e2fe0f983a 100644
--- a/kernel/softirq.c
+++ b/kernel/softirq.c
@@ -645,12 +645,12 @@ __init int spawn_ksoftirqd(void)
645/* 645/*
646 * Call a function on all processors 646 * Call a function on all processors
647 */ 647 */
648int on_each_cpu(void (*func) (void *info), void *info, int retry, int wait) 648int on_each_cpu(void (*func) (void *info), void *info, int wait)
649{ 649{
650 int ret = 0; 650 int ret = 0;
651 651
652 preempt_disable(); 652 preempt_disable();
653 ret = smp_call_function(func, info, retry, wait); 653 ret = smp_call_function(func, info, wait);
654 local_irq_disable(); 654 local_irq_disable();
655 func(info); 655 func(info);
656 local_irq_enable(); 656 local_irq_enable();
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index 0d562d6531eb..6b16e16428d8 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -83,6 +83,9 @@ extern int maps_protect;
83extern int sysctl_stat_interval; 83extern int sysctl_stat_interval;
84extern int latencytop_enabled; 84extern int latencytop_enabled;
85extern int sysctl_nr_open_min, sysctl_nr_open_max; 85extern int sysctl_nr_open_min, sysctl_nr_open_max;
86#ifdef CONFIG_RCU_TORTURE_TEST
87extern int rcutorture_runnable;
88#endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
86 89
87/* Constants used for minimum and maximum */ 90/* Constants used for minimum and maximum */
88#if defined(CONFIG_DETECT_SOFTLOCKUP) || defined(CONFIG_HIGHMEM) 91#if defined(CONFIG_DETECT_SOFTLOCKUP) || defined(CONFIG_HIGHMEM)
@@ -820,6 +823,16 @@ static struct ctl_table kern_table[] = {
820 .child = key_sysctls, 823 .child = key_sysctls,
821 }, 824 },
822#endif 825#endif
826#ifdef CONFIG_RCU_TORTURE_TEST
827 {
828 .ctl_name = CTL_UNNUMBERED,
829 .procname = "rcutorture_runnable",
830 .data = &rcutorture_runnable,
831 .maxlen = sizeof(int),
832 .mode = 0644,
833 .proc_handler = &proc_dointvec,
834 },
835#endif
823/* 836/*
824 * NOTE: do not add new entries to this table unless you have read 837 * NOTE: do not add new entries to this table unless you have read
825 * Documentation/sysctl/ctl_unnumbered.txt 838 * Documentation/sysctl/ctl_unnumbered.txt
diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c
index 67f80c261709..f48d0f09d32f 100644
--- a/kernel/time/tick-broadcast.c
+++ b/kernel/time/tick-broadcast.c
@@ -268,7 +268,7 @@ void tick_broadcast_on_off(unsigned long reason, int *oncpu)
268 "offline CPU #%d\n", *oncpu); 268 "offline CPU #%d\n", *oncpu);
269 else 269 else
270 smp_call_function_single(*oncpu, tick_do_broadcast_on_off, 270 smp_call_function_single(*oncpu, tick_do_broadcast_on_off,
271 &reason, 1, 1); 271 &reason, 1);
272} 272}
273 273
274/* 274/*
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index c459e8547bd8..df27132a56f4 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -530,16 +530,34 @@ config BOOT_PRINTK_DELAY
530config RCU_TORTURE_TEST 530config RCU_TORTURE_TEST
531 tristate "torture tests for RCU" 531 tristate "torture tests for RCU"
532 depends on DEBUG_KERNEL 532 depends on DEBUG_KERNEL
533 depends on m
534 default n 533 default n
535 help 534 help
536 This option provides a kernel module that runs torture tests 535 This option provides a kernel module that runs torture tests
537 on the RCU infrastructure. The kernel module may be built 536 on the RCU infrastructure. The kernel module may be built
538 after the fact on the running kernel to be tested, if desired. 537 after the fact on the running kernel to be tested, if desired.
539 538
539 Say Y here if you want RCU torture tests to be built into
540 the kernel.
540 Say M if you want the RCU torture tests to build as a module. 541 Say M if you want the RCU torture tests to build as a module.
541 Say N if you are unsure. 542 Say N if you are unsure.
542 543
544config RCU_TORTURE_TEST_RUNNABLE
545 bool "torture tests for RCU runnable by default"
546 depends on RCU_TORTURE_TEST = y
547 default n
548 help
549 This option provides a way to build the RCU torture tests
550 directly into the kernel without them starting up at boot
551 time. You can use /proc/sys/kernel/rcutorture_runnable
552 to manually override this setting. This /proc file is
553 available only when the RCU torture tests have been built
554 into the kernel.
555
556 Say Y here if you want the RCU torture tests to start during
557 boot (you probably don't).
558 Say N here if you want the RCU torture tests to start only
559 after being manually enabled via /proc.
560
543config KPROBES_SANITY_TEST 561config KPROBES_SANITY_TEST
544 bool "Kprobes sanity tests" 562 bool "Kprobes sanity tests"
545 depends on DEBUG_KERNEL 563 depends on DEBUG_KERNEL
diff --git a/lib/textsearch.c b/lib/textsearch.c
index be8bda3862f5..a3e500ad51d7 100644
--- a/lib/textsearch.c
+++ b/lib/textsearch.c
@@ -97,6 +97,7 @@
97#include <linux/types.h> 97#include <linux/types.h>
98#include <linux/string.h> 98#include <linux/string.h>
99#include <linux/init.h> 99#include <linux/init.h>
100#include <linux/rculist.h>
100#include <linux/rcupdate.h> 101#include <linux/rcupdate.h>
101#include <linux/err.h> 102#include <linux/err.h>
102#include <linux/textsearch.h> 103#include <linux/textsearch.h>
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index f024b9b3a2a6..79ac4afc908c 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -918,7 +918,7 @@ void drain_local_pages(void *arg)
918 */ 918 */
919void drain_all_pages(void) 919void drain_all_pages(void)
920{ 920{
921 on_each_cpu(drain_local_pages, NULL, 0, 1); 921 on_each_cpu(drain_local_pages, NULL, 1);
922} 922}
923 923
924#ifdef CONFIG_HIBERNATION 924#ifdef CONFIG_HIBERNATION
diff --git a/mm/slab.c b/mm/slab.c
index b4aa4c88250e..052e7d64537e 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -2446,7 +2446,7 @@ static void drain_cpu_caches(struct kmem_cache *cachep)
2446 struct kmem_list3 *l3; 2446 struct kmem_list3 *l3;
2447 int node; 2447 int node;
2448 2448
2449 on_each_cpu(do_drain, cachep, 1, 1); 2449 on_each_cpu(do_drain, cachep, 1);
2450 check_irq_on(); 2450 check_irq_on();
2451 for_each_online_node(node) { 2451 for_each_online_node(node) {
2452 l3 = cachep->nodelists[node]; 2452 l3 = cachep->nodelists[node];
@@ -3931,7 +3931,7 @@ static int do_tune_cpucache(struct kmem_cache *cachep, int limit,
3931 } 3931 }
3932 new->cachep = cachep; 3932 new->cachep = cachep;
3933 3933
3934 on_each_cpu(do_ccupdate_local, (void *)new, 1, 1); 3934 on_each_cpu(do_ccupdate_local, (void *)new, 1);
3935 3935
3936 check_irq_on(); 3936 check_irq_on();
3937 cachep->batchcount = batchcount; 3937 cachep->batchcount = batchcount;
diff --git a/mm/slub.c b/mm/slub.c
index 488400d10700..35ab38a94b46 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -1496,7 +1496,7 @@ static void flush_cpu_slab(void *d)
1496static void flush_all(struct kmem_cache *s) 1496static void flush_all(struct kmem_cache *s)
1497{ 1497{
1498#ifdef CONFIG_SMP 1498#ifdef CONFIG_SMP
1499 on_each_cpu(flush_cpu_slab, s, 1, 1); 1499 on_each_cpu(flush_cpu_slab, s, 1);
1500#else 1500#else
1501 unsigned long flags; 1501 unsigned long flags;
1502 1502
diff --git a/net/802/psnap.c b/net/802/psnap.c
index 31128cb92a23..ea4643931446 100644
--- a/net/802/psnap.c
+++ b/net/802/psnap.c
@@ -20,6 +20,7 @@
20#include <linux/mm.h> 20#include <linux/mm.h>
21#include <linux/in.h> 21#include <linux/in.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/rculist.h>
23 24
24static LIST_HEAD(snap_list); 25static LIST_HEAD(snap_list);
25static DEFINE_SPINLOCK(snap_lock); 26static DEFINE_SPINLOCK(snap_lock);
diff --git a/net/8021q/vlan.c b/net/8021q/vlan.c
index ab2225da0ee2..08f14f6c5fd6 100644
--- a/net/8021q/vlan.c
+++ b/net/8021q/vlan.c
@@ -27,6 +27,7 @@
27#include <linux/mm.h> 27#include <linux/mm.h>
28#include <linux/in.h> 28#include <linux/in.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/rculist.h>
30#include <net/p8022.h> 31#include <net/p8022.h>
31#include <net/arp.h> 32#include <net/arp.h>
32#include <linux/rtnetlink.h> 33#include <linux/rtnetlink.h>
diff --git a/net/bridge/br_fdb.c b/net/bridge/br_fdb.c
index 72c5976a5ce3..142060f02054 100644
--- a/net/bridge/br_fdb.c
+++ b/net/bridge/br_fdb.c
@@ -15,6 +15,7 @@
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/rculist.h>
18#include <linux/spinlock.h> 19#include <linux/spinlock.h>
19#include <linux/times.h> 20#include <linux/times.h>
20#include <linux/netdevice.h> 21#include <linux/netdevice.h>
diff --git a/net/bridge/br_stp.c b/net/bridge/br_stp.c
index e38034aa56f5..9e96ffcd29a3 100644
--- a/net/bridge/br_stp.c
+++ b/net/bridge/br_stp.c
@@ -13,6 +13,7 @@
13 * 2 of the License, or (at your option) any later version. 13 * 2 of the License, or (at your option) any later version.
14 */ 14 */
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/rculist.h>
16 17
17#include "br_private.h" 18#include "br_private.h"
18#include "br_private_stp.h" 19#include "br_private_stp.h"
diff --git a/net/core/flow.c b/net/core/flow.c
index 19991175fdeb..5cf81052d044 100644
--- a/net/core/flow.c
+++ b/net/core/flow.c
@@ -298,7 +298,7 @@ void flow_cache_flush(void)
298 init_completion(&info.completion); 298 init_completion(&info.completion);
299 299
300 local_bh_disable(); 300 local_bh_disable();
301 smp_call_function(flow_cache_flush_per_cpu, &info, 1, 0); 301 smp_call_function(flow_cache_flush_per_cpu, &info, 0);
302 flow_cache_flush_tasklet((unsigned long)&info); 302 flow_cache_flush_tasklet((unsigned long)&info);
303 local_bh_enable(); 303 local_bh_enable();
304 304
diff --git a/net/iucv/iucv.c b/net/iucv/iucv.c
index 7f82b7616212..cc34ac769a3c 100644
--- a/net/iucv/iucv.c
+++ b/net/iucv/iucv.c
@@ -480,7 +480,7 @@ static void iucv_setmask_mp(void)
480 if (cpu_isset(cpu, iucv_buffer_cpumask) && 480 if (cpu_isset(cpu, iucv_buffer_cpumask) &&
481 !cpu_isset(cpu, iucv_irq_cpumask)) 481 !cpu_isset(cpu, iucv_irq_cpumask))
482 smp_call_function_single(cpu, iucv_allow_cpu, 482 smp_call_function_single(cpu, iucv_allow_cpu,
483 NULL, 0, 1); 483 NULL, 1);
484 preempt_enable(); 484 preempt_enable();
485} 485}
486 486
@@ -498,7 +498,7 @@ static void iucv_setmask_up(void)
498 cpumask = iucv_irq_cpumask; 498 cpumask = iucv_irq_cpumask;
499 cpu_clear(first_cpu(iucv_irq_cpumask), cpumask); 499 cpu_clear(first_cpu(iucv_irq_cpumask), cpumask);
500 for_each_cpu_mask(cpu, cpumask) 500 for_each_cpu_mask(cpu, cpumask)
501 smp_call_function_single(cpu, iucv_block_cpu, NULL, 0, 1); 501 smp_call_function_single(cpu, iucv_block_cpu, NULL, 1);
502} 502}
503 503
504/** 504/**
@@ -523,7 +523,7 @@ static int iucv_enable(void)
523 rc = -EIO; 523 rc = -EIO;
524 preempt_disable(); 524 preempt_disable();
525 for_each_online_cpu(cpu) 525 for_each_online_cpu(cpu)
526 smp_call_function_single(cpu, iucv_declare_cpu, NULL, 0, 1); 526 smp_call_function_single(cpu, iucv_declare_cpu, NULL, 1);
527 preempt_enable(); 527 preempt_enable();
528 if (cpus_empty(iucv_buffer_cpumask)) 528 if (cpus_empty(iucv_buffer_cpumask))
529 /* No cpu could declare an iucv buffer. */ 529 /* No cpu could declare an iucv buffer. */
@@ -545,7 +545,7 @@ out:
545 */ 545 */
546static void iucv_disable(void) 546static void iucv_disable(void)
547{ 547{
548 on_each_cpu(iucv_retrieve_cpu, NULL, 0, 1); 548 on_each_cpu(iucv_retrieve_cpu, NULL, 1);
549 kfree(iucv_path_table); 549 kfree(iucv_path_table);
550} 550}
551 551
@@ -580,7 +580,7 @@ static int __cpuinit iucv_cpu_notify(struct notifier_block *self,
580 case CPU_ONLINE_FROZEN: 580 case CPU_ONLINE_FROZEN:
581 case CPU_DOWN_FAILED: 581 case CPU_DOWN_FAILED:
582 case CPU_DOWN_FAILED_FROZEN: 582 case CPU_DOWN_FAILED_FROZEN:
583 smp_call_function_single(cpu, iucv_declare_cpu, NULL, 0, 1); 583 smp_call_function_single(cpu, iucv_declare_cpu, NULL, 1);
584 break; 584 break;
585 case CPU_DOWN_PREPARE: 585 case CPU_DOWN_PREPARE:
586 case CPU_DOWN_PREPARE_FROZEN: 586 case CPU_DOWN_PREPARE_FROZEN:
@@ -589,10 +589,10 @@ static int __cpuinit iucv_cpu_notify(struct notifier_block *self,
589 if (cpus_empty(cpumask)) 589 if (cpus_empty(cpumask))
590 /* Can't offline last IUCV enabled cpu. */ 590 /* Can't offline last IUCV enabled cpu. */
591 return NOTIFY_BAD; 591 return NOTIFY_BAD;
592 smp_call_function_single(cpu, iucv_retrieve_cpu, NULL, 0, 1); 592 smp_call_function_single(cpu, iucv_retrieve_cpu, NULL, 1);
593 if (cpus_empty(iucv_irq_cpumask)) 593 if (cpus_empty(iucv_irq_cpumask))
594 smp_call_function_single(first_cpu(iucv_buffer_cpumask), 594 smp_call_function_single(first_cpu(iucv_buffer_cpumask),
595 iucv_allow_cpu, NULL, 0, 1); 595 iucv_allow_cpu, NULL, 1);
596 break; 596 break;
597 } 597 }
598 return NOTIFY_OK; 598 return NOTIFY_OK;
@@ -652,7 +652,7 @@ static void iucv_cleanup_queue(void)
652 * pending interrupts force them to the work queue by calling 652 * pending interrupts force them to the work queue by calling
653 * an empty function on all cpus. 653 * an empty function on all cpus.
654 */ 654 */
655 smp_call_function(__iucv_cleanup_queue, NULL, 0, 1); 655 smp_call_function(__iucv_cleanup_queue, NULL, 1);
656 spin_lock_irq(&iucv_queue_lock); 656 spin_lock_irq(&iucv_queue_lock);
657 list_for_each_entry_safe(p, n, &iucv_task_queue, list) { 657 list_for_each_entry_safe(p, n, &iucv_task_queue, list) {
658 /* Remove stale work items from the task queue. */ 658 /* Remove stale work items from the task queue. */
diff --git a/net/netfilter/nf_conntrack_helper.c b/net/netfilter/nf_conntrack_helper.c
index 7d1b11703741..8e0b4c8f62a8 100644
--- a/net/netfilter/nf_conntrack_helper.c
+++ b/net/netfilter/nf_conntrack_helper.c
@@ -20,6 +20,7 @@
20#include <linux/err.h> 20#include <linux/err.h>
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/netdevice.h> 22#include <linux/netdevice.h>
23#include <linux/rculist.h>
23 24
24#include <net/netfilter/nf_conntrack.h> 25#include <net/netfilter/nf_conntrack.h>
25#include <net/netfilter/nf_conntrack_l3proto.h> 26#include <net/netfilter/nf_conntrack_l3proto.h>
diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c
index 0edefcfc5949..077bcd228799 100644
--- a/net/netfilter/nf_conntrack_netlink.c
+++ b/net/netfilter/nf_conntrack_netlink.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/rculist.h>
21#include <linux/types.h> 22#include <linux/types.h>
22#include <linux/timer.h> 23#include <linux/timer.h>
23#include <linux/skbuff.h> 24#include <linux/skbuff.h>
diff --git a/net/netlabel/netlabel_domainhash.c b/net/netlabel/netlabel_domainhash.c
index 02c2f7c0b255..643c032a3a57 100644
--- a/net/netlabel/netlabel_domainhash.c
+++ b/net/netlabel/netlabel_domainhash.c
@@ -30,8 +30,7 @@
30 */ 30 */
31 31
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/rcupdate.h> 33#include <linux/rculist.h>
34#include <linux/list.h>
35#include <linux/skbuff.h> 34#include <linux/skbuff.h>
36#include <linux/spinlock.h> 35#include <linux/spinlock.h>
37#include <linux/string.h> 36#include <linux/string.h>
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index 2d29e260da3d..d4eae6af0738 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -1266,12 +1266,12 @@ static int kvm_cpu_hotplug(struct notifier_block *notifier, unsigned long val,
1266 case CPU_UP_CANCELED: 1266 case CPU_UP_CANCELED:
1267 printk(KERN_INFO "kvm: disabling virtualization on CPU%d\n", 1267 printk(KERN_INFO "kvm: disabling virtualization on CPU%d\n",
1268 cpu); 1268 cpu);
1269 smp_call_function_single(cpu, hardware_disable, NULL, 0, 1); 1269 smp_call_function_single(cpu, hardware_disable, NULL, 1);
1270 break; 1270 break;
1271 case CPU_ONLINE: 1271 case CPU_ONLINE:
1272 printk(KERN_INFO "kvm: enabling virtualization on CPU%d\n", 1272 printk(KERN_INFO "kvm: enabling virtualization on CPU%d\n",
1273 cpu); 1273 cpu);
1274 smp_call_function_single(cpu, hardware_enable, NULL, 0, 1); 1274 smp_call_function_single(cpu, hardware_enable, NULL, 1);
1275 break; 1275 break;
1276 } 1276 }
1277 return NOTIFY_OK; 1277 return NOTIFY_OK;
@@ -1286,7 +1286,7 @@ static int kvm_reboot(struct notifier_block *notifier, unsigned long val,
1286 * in vmx root mode. 1286 * in vmx root mode.
1287 */ 1287 */
1288 printk(KERN_INFO "kvm: exiting hardware virtualization\n"); 1288 printk(KERN_INFO "kvm: exiting hardware virtualization\n");
1289 on_each_cpu(hardware_disable, NULL, 0, 1); 1289 on_each_cpu(hardware_disable, NULL, 1);
1290 } 1290 }
1291 return NOTIFY_OK; 1291 return NOTIFY_OK;
1292} 1292}
@@ -1474,12 +1474,12 @@ int kvm_init(void *opaque, unsigned int vcpu_size,
1474 for_each_online_cpu(cpu) { 1474 for_each_online_cpu(cpu) {
1475 smp_call_function_single(cpu, 1475 smp_call_function_single(cpu,
1476 kvm_arch_check_processor_compat, 1476 kvm_arch_check_processor_compat,
1477 &r, 0, 1); 1477 &r, 1);
1478 if (r < 0) 1478 if (r < 0)
1479 goto out_free_1; 1479 goto out_free_1;
1480 } 1480 }
1481 1481
1482 on_each_cpu(hardware_enable, NULL, 0, 1); 1482 on_each_cpu(hardware_enable, NULL, 1);
1483 r = register_cpu_notifier(&kvm_cpu_notifier); 1483 r = register_cpu_notifier(&kvm_cpu_notifier);
1484 if (r) 1484 if (r)
1485 goto out_free_2; 1485 goto out_free_2;
@@ -1525,7 +1525,7 @@ out_free_3:
1525 unregister_reboot_notifier(&kvm_reboot_notifier); 1525 unregister_reboot_notifier(&kvm_reboot_notifier);
1526 unregister_cpu_notifier(&kvm_cpu_notifier); 1526 unregister_cpu_notifier(&kvm_cpu_notifier);
1527out_free_2: 1527out_free_2:
1528 on_each_cpu(hardware_disable, NULL, 0, 1); 1528 on_each_cpu(hardware_disable, NULL, 1);
1529out_free_1: 1529out_free_1:
1530 kvm_arch_hardware_unsetup(); 1530 kvm_arch_hardware_unsetup();
1531out_free_0: 1531out_free_0:
@@ -1547,7 +1547,7 @@ void kvm_exit(void)
1547 sysdev_class_unregister(&kvm_sysdev_class); 1547 sysdev_class_unregister(&kvm_sysdev_class);
1548 unregister_reboot_notifier(&kvm_reboot_notifier); 1548 unregister_reboot_notifier(&kvm_reboot_notifier);
1549 unregister_cpu_notifier(&kvm_cpu_notifier); 1549 unregister_cpu_notifier(&kvm_cpu_notifier);
1550 on_each_cpu(hardware_disable, NULL, 0, 1); 1550 on_each_cpu(hardware_disable, NULL, 1);
1551 kvm_arch_hardware_unsetup(); 1551 kvm_arch_hardware_unsetup();
1552 kvm_arch_exit(); 1552 kvm_arch_exit();
1553 kvm_exit_debug(); 1553 kvm_exit_debug();