aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--drivers/net/ethernet/atheros/alx/alx.h3
-rw-r--r--drivers/net/ethernet/atheros/alx/ethtool.c101
-rw-r--r--drivers/net/ethernet/atheros/alx/hw.c58
-rw-r--r--drivers/net/ethernet/atheros/alx/hw.h71
-rw-r--r--drivers/net/ethernet/atheros/alx/main.c50
-rw-r--r--drivers/net/ethernet/atheros/alx/reg.h52
6 files changed, 331 insertions, 4 deletions
diff --git a/drivers/net/ethernet/atheros/alx/alx.h b/drivers/net/ethernet/atheros/alx/alx.h
index d71103dbf2cd..8fc93c5f6abc 100644
--- a/drivers/net/ethernet/atheros/alx/alx.h
+++ b/drivers/net/ethernet/atheros/alx/alx.h
@@ -106,6 +106,9 @@ struct alx_priv {
106 u16 msg_enable; 106 u16 msg_enable;
107 107
108 bool msi; 108 bool msi;
109
110 /* protects hw.stats */
111 spinlock_t stats_lock;
109}; 112};
110 113
111extern const struct ethtool_ops alx_ethtool_ops; 114extern const struct ethtool_ops alx_ethtool_ops;
diff --git a/drivers/net/ethernet/atheros/alx/ethtool.c b/drivers/net/ethernet/atheros/alx/ethtool.c
index 45b36507abc1..08e22df2a300 100644
--- a/drivers/net/ethernet/atheros/alx/ethtool.c
+++ b/drivers/net/ethernet/atheros/alx/ethtool.c
@@ -46,6 +46,66 @@
46#include "reg.h" 46#include "reg.h"
47#include "hw.h" 47#include "hw.h"
48 48
49/* The order of these strings must match the order of the fields in
50 * struct alx_hw_stats
51 * See hw.h
52 */
53static const char alx_gstrings_stats[][ETH_GSTRING_LEN] = {
54 "rx_packets",
55 "rx_bcast_packets",
56 "rx_mcast_packets",
57 "rx_pause_packets",
58 "rx_ctrl_packets",
59 "rx_fcs_errors",
60 "rx_length_errors",
61 "rx_bytes",
62 "rx_runt_packets",
63 "rx_fragments",
64 "rx_64B_or_less_packets",
65 "rx_65B_to_127B_packets",
66 "rx_128B_to_255B_packets",
67 "rx_256B_to_511B_packets",
68 "rx_512B_to_1023B_packets",
69 "rx_1024B_to_1518B_packets",
70 "rx_1519B_to_mtu_packets",
71 "rx_oversize_packets",
72 "rx_rxf_ov_drop_packets",
73 "rx_rrd_ov_drop_packets",
74 "rx_align_errors",
75 "rx_bcast_bytes",
76 "rx_mcast_bytes",
77 "rx_address_errors",
78 "tx_packets",
79 "tx_bcast_packets",
80 "tx_mcast_packets",
81 "tx_pause_packets",
82 "tx_exc_defer_packets",
83 "tx_ctrl_packets",
84 "tx_defer_packets",
85 "tx_bytes",
86 "tx_64B_or_less_packets",
87 "tx_65B_to_127B_packets",
88 "tx_128B_to_255B_packets",
89 "tx_256B_to_511B_packets",
90 "tx_512B_to_1023B_packets",
91 "tx_1024B_to_1518B_packets",
92 "tx_1519B_to_mtu_packets",
93 "tx_single_collision",
94 "tx_multiple_collisions",
95 "tx_late_collision",
96 "tx_abort_collision",
97 "tx_underrun",
98 "tx_trd_eop",
99 "tx_length_errors",
100 "tx_trunc_packets",
101 "tx_bcast_bytes",
102 "tx_mcast_bytes",
103 "tx_update",
104};
105
106#define ALX_NUM_STATS ARRAY_SIZE(alx_gstrings_stats)
107
108
49static u32 alx_get_supported_speeds(struct alx_hw *hw) 109static u32 alx_get_supported_speeds(struct alx_hw *hw)
50{ 110{
51 u32 supported = SUPPORTED_10baseT_Half | 111 u32 supported = SUPPORTED_10baseT_Half |
@@ -201,6 +261,44 @@ static void alx_set_msglevel(struct net_device *netdev, u32 data)
201 alx->msg_enable = data; 261 alx->msg_enable = data;
202} 262}
203 263
264static void alx_get_ethtool_stats(struct net_device *netdev,
265 struct ethtool_stats *estats, u64 *data)
266{
267 struct alx_priv *alx = netdev_priv(netdev);
268 struct alx_hw *hw = &alx->hw;
269
270 spin_lock(&alx->stats_lock);
271
272 alx_update_hw_stats(hw);
273 BUILD_BUG_ON(sizeof(hw->stats) - offsetof(struct alx_hw_stats, rx_ok) <
274 ALX_NUM_STATS * sizeof(u64));
275 memcpy(data, &hw->stats.rx_ok, ALX_NUM_STATS * sizeof(u64));
276
277 spin_unlock(&alx->stats_lock);
278}
279
280static void alx_get_strings(struct net_device *netdev, u32 stringset, u8 *buf)
281{
282 switch (stringset) {
283 case ETH_SS_STATS:
284 memcpy(buf, &alx_gstrings_stats, sizeof(alx_gstrings_stats));
285 break;
286 default:
287 WARN_ON(1);
288 break;
289 }
290}
291
292static int alx_get_sset_count(struct net_device *netdev, int sset)
293{
294 switch (sset) {
295 case ETH_SS_STATS:
296 return ALX_NUM_STATS;
297 default:
298 return -EINVAL;
299 }
300}
301
204const struct ethtool_ops alx_ethtool_ops = { 302const struct ethtool_ops alx_ethtool_ops = {
205 .get_settings = alx_get_settings, 303 .get_settings = alx_get_settings,
206 .set_settings = alx_set_settings, 304 .set_settings = alx_set_settings,
@@ -209,4 +307,7 @@ const struct ethtool_ops alx_ethtool_ops = {
209 .get_msglevel = alx_get_msglevel, 307 .get_msglevel = alx_get_msglevel,
210 .set_msglevel = alx_set_msglevel, 308 .set_msglevel = alx_set_msglevel,
211 .get_link = ethtool_op_get_link, 309 .get_link = ethtool_op_get_link,
310 .get_strings = alx_get_strings,
311 .get_sset_count = alx_get_sset_count,
312 .get_ethtool_stats = alx_get_ethtool_stats,
212}; 313};
diff --git a/drivers/net/ethernet/atheros/alx/hw.c b/drivers/net/ethernet/atheros/alx/hw.c
index 1e8c24a3cb4e..7712f068f6d4 100644
--- a/drivers/net/ethernet/atheros/alx/hw.c
+++ b/drivers/net/ethernet/atheros/alx/hw.c
@@ -1050,3 +1050,61 @@ bool alx_get_phy_info(struct alx_hw *hw)
1050 1050
1051 return true; 1051 return true;
1052} 1052}
1053
1054void alx_update_hw_stats(struct alx_hw *hw)
1055{
1056 /* RX stats */
1057 hw->stats.rx_ok += alx_read_mem32(hw, ALX_MIB_RX_OK);
1058 hw->stats.rx_bcast += alx_read_mem32(hw, ALX_MIB_RX_BCAST);
1059 hw->stats.rx_mcast += alx_read_mem32(hw, ALX_MIB_RX_MCAST);
1060 hw->stats.rx_pause += alx_read_mem32(hw, ALX_MIB_RX_PAUSE);
1061 hw->stats.rx_ctrl += alx_read_mem32(hw, ALX_MIB_RX_CTRL);
1062 hw->stats.rx_fcs_err += alx_read_mem32(hw, ALX_MIB_RX_FCS_ERR);
1063 hw->stats.rx_len_err += alx_read_mem32(hw, ALX_MIB_RX_LEN_ERR);
1064 hw->stats.rx_byte_cnt += alx_read_mem32(hw, ALX_MIB_RX_BYTE_CNT);
1065 hw->stats.rx_runt += alx_read_mem32(hw, ALX_MIB_RX_RUNT);
1066 hw->stats.rx_frag += alx_read_mem32(hw, ALX_MIB_RX_FRAG);
1067 hw->stats.rx_sz_64B += alx_read_mem32(hw, ALX_MIB_RX_SZ_64B);
1068 hw->stats.rx_sz_127B += alx_read_mem32(hw, ALX_MIB_RX_SZ_127B);
1069 hw->stats.rx_sz_255B += alx_read_mem32(hw, ALX_MIB_RX_SZ_255B);
1070 hw->stats.rx_sz_511B += alx_read_mem32(hw, ALX_MIB_RX_SZ_511B);
1071 hw->stats.rx_sz_1023B += alx_read_mem32(hw, ALX_MIB_RX_SZ_1023B);
1072 hw->stats.rx_sz_1518B += alx_read_mem32(hw, ALX_MIB_RX_SZ_1518B);
1073 hw->stats.rx_sz_max += alx_read_mem32(hw, ALX_MIB_RX_SZ_MAX);
1074 hw->stats.rx_ov_sz += alx_read_mem32(hw, ALX_MIB_RX_OV_SZ);
1075 hw->stats.rx_ov_rxf += alx_read_mem32(hw, ALX_MIB_RX_OV_RXF);
1076 hw->stats.rx_ov_rrd += alx_read_mem32(hw, ALX_MIB_RX_OV_RRD);
1077 hw->stats.rx_align_err += alx_read_mem32(hw, ALX_MIB_RX_ALIGN_ERR);
1078 hw->stats.rx_bc_byte_cnt += alx_read_mem32(hw, ALX_MIB_RX_BCCNT);
1079 hw->stats.rx_mc_byte_cnt += alx_read_mem32(hw, ALX_MIB_RX_MCCNT);
1080 hw->stats.rx_err_addr += alx_read_mem32(hw, ALX_MIB_RX_ERRADDR);
1081
1082 /* TX stats */
1083 hw->stats.tx_ok += alx_read_mem32(hw, ALX_MIB_TX_OK);
1084 hw->stats.tx_bcast += alx_read_mem32(hw, ALX_MIB_TX_BCAST);
1085 hw->stats.tx_mcast += alx_read_mem32(hw, ALX_MIB_TX_MCAST);
1086 hw->stats.tx_pause += alx_read_mem32(hw, ALX_MIB_TX_PAUSE);
1087 hw->stats.tx_exc_defer += alx_read_mem32(hw, ALX_MIB_TX_EXC_DEFER);
1088 hw->stats.tx_ctrl += alx_read_mem32(hw, ALX_MIB_TX_CTRL);
1089 hw->stats.tx_defer += alx_read_mem32(hw, ALX_MIB_TX_DEFER);
1090 hw->stats.tx_byte_cnt += alx_read_mem32(hw, ALX_MIB_TX_BYTE_CNT);
1091 hw->stats.tx_sz_64B += alx_read_mem32(hw, ALX_MIB_TX_SZ_64B);
1092 hw->stats.tx_sz_127B += alx_read_mem32(hw, ALX_MIB_TX_SZ_127B);
1093 hw->stats.tx_sz_255B += alx_read_mem32(hw, ALX_MIB_TX_SZ_255B);
1094 hw->stats.tx_sz_511B += alx_read_mem32(hw, ALX_MIB_TX_SZ_511B);
1095 hw->stats.tx_sz_1023B += alx_read_mem32(hw, ALX_MIB_TX_SZ_1023B);
1096 hw->stats.tx_sz_1518B += alx_read_mem32(hw, ALX_MIB_TX_SZ_1518B);
1097 hw->stats.tx_sz_max += alx_read_mem32(hw, ALX_MIB_TX_SZ_MAX);
1098 hw->stats.tx_single_col += alx_read_mem32(hw, ALX_MIB_TX_SINGLE_COL);
1099 hw->stats.tx_multi_col += alx_read_mem32(hw, ALX_MIB_TX_MULTI_COL);
1100 hw->stats.tx_late_col += alx_read_mem32(hw, ALX_MIB_TX_LATE_COL);
1101 hw->stats.tx_abort_col += alx_read_mem32(hw, ALX_MIB_TX_ABORT_COL);
1102 hw->stats.tx_underrun += alx_read_mem32(hw, ALX_MIB_TX_UNDERRUN);
1103 hw->stats.tx_trd_eop += alx_read_mem32(hw, ALX_MIB_TX_TRD_EOP);
1104 hw->stats.tx_len_err += alx_read_mem32(hw, ALX_MIB_TX_LEN_ERR);
1105 hw->stats.tx_trunc += alx_read_mem32(hw, ALX_MIB_TX_TRUNC);
1106 hw->stats.tx_bc_byte_cnt += alx_read_mem32(hw, ALX_MIB_TX_BCCNT);
1107 hw->stats.tx_mc_byte_cnt += alx_read_mem32(hw, ALX_MIB_TX_MCCNT);
1108
1109 hw->stats.update += alx_read_mem32(hw, ALX_MIB_UPDATE);
1110}
diff --git a/drivers/net/ethernet/atheros/alx/hw.h b/drivers/net/ethernet/atheros/alx/hw.h
index 96f3b4381e17..15548802d6f8 100644
--- a/drivers/net/ethernet/atheros/alx/hw.h
+++ b/drivers/net/ethernet/atheros/alx/hw.h
@@ -381,6 +381,73 @@ struct alx_rrd {
381 ALX_ISR_RX_Q6 | \ 381 ALX_ISR_RX_Q6 | \
382 ALX_ISR_RX_Q7) 382 ALX_ISR_RX_Q7)
383 383
384/* Statistics counters collected by the MAC
385 *
386 * The order of the fields must match the strings in alx_gstrings_stats
387 * All stats fields should be u64
388 * See ethtool.c
389 */
390struct alx_hw_stats {
391 /* rx */
392 u64 rx_ok; /* good RX packets */
393 u64 rx_bcast; /* good RX broadcast packets */
394 u64 rx_mcast; /* good RX multicast packets */
395 u64 rx_pause; /* RX pause frames */
396 u64 rx_ctrl; /* RX control packets other than pause frames */
397 u64 rx_fcs_err; /* RX packets with bad FCS */
398 u64 rx_len_err; /* RX packets with length != actual size */
399 u64 rx_byte_cnt; /* good bytes received. FCS is NOT included */
400 u64 rx_runt; /* RX packets < 64 bytes with good FCS */
401 u64 rx_frag; /* RX packets < 64 bytes with bad FCS */
402 u64 rx_sz_64B; /* 64 byte RX packets */
403 u64 rx_sz_127B; /* 65-127 byte RX packets */
404 u64 rx_sz_255B; /* 128-255 byte RX packets */
405 u64 rx_sz_511B; /* 256-511 byte RX packets */
406 u64 rx_sz_1023B; /* 512-1023 byte RX packets */
407 u64 rx_sz_1518B; /* 1024-1518 byte RX packets */
408 u64 rx_sz_max; /* 1519 byte to MTU RX packets */
409 u64 rx_ov_sz; /* truncated RX packets, size > MTU */
410 u64 rx_ov_rxf; /* frames dropped due to RX FIFO overflow */
411 u64 rx_ov_rrd; /* frames dropped due to RRD overflow */
412 u64 rx_align_err; /* alignment errors */
413 u64 rx_bc_byte_cnt; /* RX broadcast bytes, excluding FCS */
414 u64 rx_mc_byte_cnt; /* RX multicast bytes, excluding FCS */
415 u64 rx_err_addr; /* packets dropped due to address filtering */
416
417 /* tx */
418 u64 tx_ok; /* good TX packets */
419 u64 tx_bcast; /* good TX broadcast packets */
420 u64 tx_mcast; /* good TX multicast packets */
421 u64 tx_pause; /* TX pause frames */
422 u64 tx_exc_defer; /* TX packets deferred excessively */
423 u64 tx_ctrl; /* TX control frames, excluding pause frames */
424 u64 tx_defer; /* TX packets deferred */
425 u64 tx_byte_cnt; /* bytes transmitted, FCS is NOT included */
426 u64 tx_sz_64B; /* 64 byte TX packets */
427 u64 tx_sz_127B; /* 65-127 byte TX packets */
428 u64 tx_sz_255B; /* 128-255 byte TX packets */
429 u64 tx_sz_511B; /* 256-511 byte TX packets */
430 u64 tx_sz_1023B; /* 512-1023 byte TX packets */
431 u64 tx_sz_1518B; /* 1024-1518 byte TX packets */
432 u64 tx_sz_max; /* 1519 byte to MTU TX packets */
433 u64 tx_single_col; /* packets TX after a single collision */
434 u64 tx_multi_col; /* packets TX after multiple collisions */
435 u64 tx_late_col; /* TX packets with late collisions */
436 u64 tx_abort_col; /* TX packets aborted w/excessive collisions */
437 u64 tx_underrun; /* TX packets aborted due to TX FIFO underrun
438 * or TRD FIFO underrun
439 */
440 u64 tx_trd_eop; /* reads beyond the EOP into the next frame
441 * when TRD was not written timely
442 */
443 u64 tx_len_err; /* TX packets where length != actual size */
444 u64 tx_trunc; /* TX packets truncated due to size > MTU */
445 u64 tx_bc_byte_cnt; /* broadcast bytes transmitted, excluding FCS */
446 u64 tx_mc_byte_cnt; /* multicast bytes transmitted, excluding FCS */
447 u64 update;
448};
449
450
384/* maximum interrupt vectors for msix */ 451/* maximum interrupt vectors for msix */
385#define ALX_MAX_MSIX_INTRS 16 452#define ALX_MAX_MSIX_INTRS 16
386 453
@@ -424,6 +491,9 @@ struct alx_hw {
424 491
425 /* PHY link patch flag */ 492 /* PHY link patch flag */
426 bool lnk_patch; 493 bool lnk_patch;
494
495 /* cumulated stats from the hardware (registers are cleared on read) */
496 struct alx_hw_stats stats;
427}; 497};
428 498
429static inline int alx_hw_revision(struct alx_hw *hw) 499static inline int alx_hw_revision(struct alx_hw *hw)
@@ -491,6 +561,7 @@ bool alx_phy_configured(struct alx_hw *hw);
491void alx_configure_basic(struct alx_hw *hw); 561void alx_configure_basic(struct alx_hw *hw);
492void alx_disable_rss(struct alx_hw *hw); 562void alx_disable_rss(struct alx_hw *hw);
493bool alx_get_phy_info(struct alx_hw *hw); 563bool alx_get_phy_info(struct alx_hw *hw);
564void alx_update_hw_stats(struct alx_hw *hw);
494 565
495static inline u32 alx_speed_to_ethadv(int speed, u8 duplex) 566static inline u32 alx_speed_to_ethadv(int speed, u8 duplex)
496{ 567{
diff --git a/drivers/net/ethernet/atheros/alx/main.c b/drivers/net/ethernet/atheros/alx/main.c
index c3c4c266b846..e92ffd6e1c15 100644
--- a/drivers/net/ethernet/atheros/alx/main.c
+++ b/drivers/net/ethernet/atheros/alx/main.c
@@ -1166,10 +1166,60 @@ static void alx_poll_controller(struct net_device *netdev)
1166} 1166}
1167#endif 1167#endif
1168 1168
1169static struct rtnl_link_stats64 *alx_get_stats64(struct net_device *dev,
1170 struct rtnl_link_stats64 *net_stats)
1171{
1172 struct alx_priv *alx = netdev_priv(dev);
1173 struct alx_hw_stats *hw_stats = &alx->hw.stats;
1174
1175 spin_lock(&alx->stats_lock);
1176
1177 alx_update_hw_stats(&alx->hw);
1178
1179 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1180 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1181 net_stats->multicast = hw_stats->rx_mcast;
1182 net_stats->collisions = hw_stats->tx_single_col +
1183 hw_stats->tx_multi_col +
1184 hw_stats->tx_late_col +
1185 hw_stats->tx_abort_col;
1186
1187 net_stats->rx_errors = hw_stats->rx_frag +
1188 hw_stats->rx_fcs_err +
1189 hw_stats->rx_len_err +
1190 hw_stats->rx_ov_sz +
1191 hw_stats->rx_ov_rrd +
1192 hw_stats->rx_align_err +
1193 hw_stats->rx_ov_rxf;
1194
1195 net_stats->rx_fifo_errors = hw_stats->rx_ov_rxf;
1196 net_stats->rx_length_errors = hw_stats->rx_len_err;
1197 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1198 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1199 net_stats->rx_dropped = hw_stats->rx_ov_rrd;
1200
1201 net_stats->tx_errors = hw_stats->tx_late_col +
1202 hw_stats->tx_abort_col +
1203 hw_stats->tx_underrun +
1204 hw_stats->tx_trunc;
1205
1206 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1207 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1208 net_stats->tx_window_errors = hw_stats->tx_late_col;
1209
1210 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1211 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1212
1213 spin_unlock(&alx->stats_lock);
1214
1215 return net_stats;
1216}
1217
1169static const struct net_device_ops alx_netdev_ops = { 1218static const struct net_device_ops alx_netdev_ops = {
1170 .ndo_open = alx_open, 1219 .ndo_open = alx_open,
1171 .ndo_stop = alx_stop, 1220 .ndo_stop = alx_stop,
1172 .ndo_start_xmit = alx_start_xmit, 1221 .ndo_start_xmit = alx_start_xmit,
1222 .ndo_get_stats64 = alx_get_stats64,
1173 .ndo_set_rx_mode = alx_set_rx_mode, 1223 .ndo_set_rx_mode = alx_set_rx_mode,
1174 .ndo_validate_addr = eth_validate_addr, 1224 .ndo_validate_addr = eth_validate_addr,
1175 .ndo_set_mac_address = alx_set_mac_address, 1225 .ndo_set_mac_address = alx_set_mac_address,
diff --git a/drivers/net/ethernet/atheros/alx/reg.h b/drivers/net/ethernet/atheros/alx/reg.h
index e4358c98bc4e..af006b44b2a6 100644
--- a/drivers/net/ethernet/atheros/alx/reg.h
+++ b/drivers/net/ethernet/atheros/alx/reg.h
@@ -404,15 +404,59 @@
404 404
405/* MIB */ 405/* MIB */
406#define ALX_MIB_BASE 0x1700 406#define ALX_MIB_BASE 0x1700
407
407#define ALX_MIB_RX_OK (ALX_MIB_BASE + 0) 408#define ALX_MIB_RX_OK (ALX_MIB_BASE + 0)
409#define ALX_MIB_RX_BCAST (ALX_MIB_BASE + 4)
410#define ALX_MIB_RX_MCAST (ALX_MIB_BASE + 8)
411#define ALX_MIB_RX_PAUSE (ALX_MIB_BASE + 12)
412#define ALX_MIB_RX_CTRL (ALX_MIB_BASE + 16)
413#define ALX_MIB_RX_FCS_ERR (ALX_MIB_BASE + 20)
414#define ALX_MIB_RX_LEN_ERR (ALX_MIB_BASE + 24)
415#define ALX_MIB_RX_BYTE_CNT (ALX_MIB_BASE + 28)
416#define ALX_MIB_RX_RUNT (ALX_MIB_BASE + 32)
417#define ALX_MIB_RX_FRAG (ALX_MIB_BASE + 36)
418#define ALX_MIB_RX_SZ_64B (ALX_MIB_BASE + 40)
419#define ALX_MIB_RX_SZ_127B (ALX_MIB_BASE + 44)
420#define ALX_MIB_RX_SZ_255B (ALX_MIB_BASE + 48)
421#define ALX_MIB_RX_SZ_511B (ALX_MIB_BASE + 52)
422#define ALX_MIB_RX_SZ_1023B (ALX_MIB_BASE + 56)
423#define ALX_MIB_RX_SZ_1518B (ALX_MIB_BASE + 60)
424#define ALX_MIB_RX_SZ_MAX (ALX_MIB_BASE + 64)
425#define ALX_MIB_RX_OV_SZ (ALX_MIB_BASE + 68)
426#define ALX_MIB_RX_OV_RXF (ALX_MIB_BASE + 72)
427#define ALX_MIB_RX_OV_RRD (ALX_MIB_BASE + 76)
428#define ALX_MIB_RX_ALIGN_ERR (ALX_MIB_BASE + 80)
429#define ALX_MIB_RX_BCCNT (ALX_MIB_BASE + 84)
430#define ALX_MIB_RX_MCCNT (ALX_MIB_BASE + 88)
408#define ALX_MIB_RX_ERRADDR (ALX_MIB_BASE + 92) 431#define ALX_MIB_RX_ERRADDR (ALX_MIB_BASE + 92)
432
409#define ALX_MIB_TX_OK (ALX_MIB_BASE + 96) 433#define ALX_MIB_TX_OK (ALX_MIB_BASE + 96)
434#define ALX_MIB_TX_BCAST (ALX_MIB_BASE + 100)
435#define ALX_MIB_TX_MCAST (ALX_MIB_BASE + 104)
436#define ALX_MIB_TX_PAUSE (ALX_MIB_BASE + 108)
437#define ALX_MIB_TX_EXC_DEFER (ALX_MIB_BASE + 112)
438#define ALX_MIB_TX_CTRL (ALX_MIB_BASE + 116)
439#define ALX_MIB_TX_DEFER (ALX_MIB_BASE + 120)
440#define ALX_MIB_TX_BYTE_CNT (ALX_MIB_BASE + 124)
441#define ALX_MIB_TX_SZ_64B (ALX_MIB_BASE + 128)
442#define ALX_MIB_TX_SZ_127B (ALX_MIB_BASE + 132)
443#define ALX_MIB_TX_SZ_255B (ALX_MIB_BASE + 136)
444#define ALX_MIB_TX_SZ_511B (ALX_MIB_BASE + 140)
445#define ALX_MIB_TX_SZ_1023B (ALX_MIB_BASE + 144)
446#define ALX_MIB_TX_SZ_1518B (ALX_MIB_BASE + 148)
447#define ALX_MIB_TX_SZ_MAX (ALX_MIB_BASE + 152)
448#define ALX_MIB_TX_SINGLE_COL (ALX_MIB_BASE + 156)
449#define ALX_MIB_TX_MULTI_COL (ALX_MIB_BASE + 160)
450#define ALX_MIB_TX_LATE_COL (ALX_MIB_BASE + 164)
451#define ALX_MIB_TX_ABORT_COL (ALX_MIB_BASE + 168)
452#define ALX_MIB_TX_UNDERRUN (ALX_MIB_BASE + 172)
453#define ALX_MIB_TX_TRD_EOP (ALX_MIB_BASE + 176)
454#define ALX_MIB_TX_LEN_ERR (ALX_MIB_BASE + 180)
455#define ALX_MIB_TX_TRUNC (ALX_MIB_BASE + 184)
456#define ALX_MIB_TX_BCCNT (ALX_MIB_BASE + 188)
410#define ALX_MIB_TX_MCCNT (ALX_MIB_BASE + 192) 457#define ALX_MIB_TX_MCCNT (ALX_MIB_BASE + 192)
458#define ALX_MIB_UPDATE (ALX_MIB_BASE + 196)
411 459
412#define ALX_RX_STATS_BIN ALX_MIB_RX_OK
413#define ALX_RX_STATS_END ALX_MIB_RX_ERRADDR
414#define ALX_TX_STATS_BIN ALX_MIB_TX_OK
415#define ALX_TX_STATS_END ALX_MIB_TX_MCCNT
416 460
417#define ALX_ISR 0x1600 461#define ALX_ISR 0x1600
418#define ALX_ISR_DIS BIT(31) 462#define ALX_ISR_DIS BIT(31)
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-14 18:41:47 -0500