diff options
-rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx28-cfa10056.dts | 119 |
2 files changed, 120 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 641b3c9a7028..da75139f9bf8 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -143,6 +143,7 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ | |||
143 | imx28-cfa10037.dtb \ | 143 | imx28-cfa10037.dtb \ |
144 | imx28-cfa10049.dtb \ | 144 | imx28-cfa10049.dtb \ |
145 | imx28-cfa10055.dtb \ | 145 | imx28-cfa10055.dtb \ |
146 | imx28-cfa10056.dtb \ | ||
146 | imx28-cfa10057.dtb \ | 147 | imx28-cfa10057.dtb \ |
147 | imx28-evk.dtb \ | 148 | imx28-evk.dtb \ |
148 | imx28-m28evk.dtb \ | 149 | imx28-m28evk.dtb \ |
diff --git a/arch/arm/boot/dts/imx28-cfa10056.dts b/arch/arm/boot/dts/imx28-cfa10056.dts new file mode 100644 index 000000000000..b45dd0e4ee57 --- /dev/null +++ b/arch/arm/boot/dts/imx28-cfa10056.dts | |||
@@ -0,0 +1,119 @@ | |||
1 | /* | ||
2 | * Copyright 2013 Free Electrons | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /* | ||
13 | * The CFA-10055 is an expansion board for the CFA-10036 module and | ||
14 | * CFA-10037, thus we need to include the CFA-10037 DTS. | ||
15 | */ | ||
16 | /include/ "imx28-cfa10037.dts" | ||
17 | |||
18 | / { | ||
19 | model = "Crystalfontz CFA-10056 Board"; | ||
20 | compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28"; | ||
21 | |||
22 | apb@80000000 { | ||
23 | apbh@80000000 { | ||
24 | pinctrl@80018000 { | ||
25 | spi2_pins_cfa10056: spi2-cfa10056@0 { | ||
26 | reg = <0>; | ||
27 | fsl,pinmux-ids = < | ||
28 | 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ | ||
29 | 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ | ||
30 | 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ | ||
31 | 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ | ||
32 | >; | ||
33 | fsl,drive-strength = <1>; | ||
34 | fsl,voltage = <1>; | ||
35 | fsl,pull-up = <1>; | ||
36 | }; | ||
37 | |||
38 | lcdif_pins_cfa10056: lcdif-10056@0 { | ||
39 | reg = <0>; | ||
40 | fsl,pinmux-ids = < | ||
41 | 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ | ||
42 | 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ | ||
43 | 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ | ||
44 | 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ | ||
45 | >; | ||
46 | fsl,drive-strength = <0>; | ||
47 | fsl,voltage = <1>; | ||
48 | fsl,pull-up = <0>; | ||
49 | }; | ||
50 | |||
51 | lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 { | ||
52 | reg = <0>; | ||
53 | fsl,pinmux-ids = < | ||
54 | 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ | ||
55 | >; | ||
56 | fsl,drive-strength = <0>; | ||
57 | fsl,voltage = <1>; | ||
58 | fsl,pull-up = <1>; | ||
59 | }; | ||
60 | }; | ||
61 | |||
62 | lcdif@80030000 { | ||
63 | pinctrl-names = "default"; | ||
64 | pinctrl-0 = <&lcdif_24bit_pins_a | ||
65 | &lcdif_pins_cfa10056 | ||
66 | &lcdif_pins_cfa10056_pullup >; | ||
67 | display = <&display>; | ||
68 | status = "okay"; | ||
69 | |||
70 | display: display { | ||
71 | bits-per-pixel = <32>; | ||
72 | bus-width = <24>; | ||
73 | |||
74 | display-timings { | ||
75 | native-mode = <&timing0>; | ||
76 | timing0: timing0 { | ||
77 | clock-frequency = <32000000>; | ||
78 | hactive = <480>; | ||
79 | vactive = <800>; | ||
80 | hback-porch = <2>; | ||
81 | hfront-porch = <2>; | ||
82 | vback-porch = <2>; | ||
83 | vfront-porch = <2>; | ||
84 | hsync-len = <5>; | ||
85 | vsync-len = <5>; | ||
86 | hsync-active = <0>; | ||
87 | vsync-active = <0>; | ||
88 | de-active = <1>; | ||
89 | pixelclk-active = <1>; | ||
90 | }; | ||
91 | }; | ||
92 | }; | ||
93 | }; | ||
94 | }; | ||
95 | }; | ||
96 | |||
97 | spi2 { | ||
98 | compatible = "spi-gpio"; | ||
99 | pinctrl-names = "default"; | ||
100 | pinctrl-0 = <&spi2_pins_cfa10056>; | ||
101 | status = "okay"; | ||
102 | gpio-sck = <&gpio2 16 0>; | ||
103 | gpio-mosi = <&gpio2 17 0>; | ||
104 | gpio-miso = <&gpio2 18 0>; | ||
105 | cs-gpios = <&gpio3 5 0>; | ||
106 | num-chipselects = <1>; | ||
107 | #address-cells = <1>; | ||
108 | #size-cells = <0>; | ||
109 | |||
110 | hx8369: hx8369@0 { | ||
111 | compatible = "himax,hx8369a", "himax,hx8369"; | ||
112 | reg = <0>; | ||
113 | spi-max-frequency = <100000>; | ||
114 | spi-cpol; | ||
115 | spi-cpha; | ||
116 | gpios-reset = <&gpio3 30 0>; | ||
117 | }; | ||
118 | }; | ||
119 | }; | ||