diff options
-rw-r--r-- | drivers/i2c/busses/i2c-davinci.c | 24 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-imx.c | 12 |
2 files changed, 18 insertions, 18 deletions
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index b8feac5f2ef4..5795c8398c7c 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c | |||
@@ -331,21 +331,16 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
331 | INIT_COMPLETION(dev->cmd_complete); | 331 | INIT_COMPLETION(dev->cmd_complete); |
332 | dev->cmd_err = 0; | 332 | dev->cmd_err = 0; |
333 | 333 | ||
334 | /* Take I2C out of reset, configure it as master and set the | 334 | /* Take I2C out of reset and configure it as master */ |
335 | * start bit */ | 335 | flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST; |
336 | flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT; | ||
337 | 336 | ||
338 | /* if the slave address is ten bit address, enable XA bit */ | 337 | /* if the slave address is ten bit address, enable XA bit */ |
339 | if (msg->flags & I2C_M_TEN) | 338 | if (msg->flags & I2C_M_TEN) |
340 | flag |= DAVINCI_I2C_MDR_XA; | 339 | flag |= DAVINCI_I2C_MDR_XA; |
341 | if (!(msg->flags & I2C_M_RD)) | 340 | if (!(msg->flags & I2C_M_RD)) |
342 | flag |= DAVINCI_I2C_MDR_TRX; | 341 | flag |= DAVINCI_I2C_MDR_TRX; |
343 | if (stop) | 342 | if (msg->len == 0) |
344 | flag |= DAVINCI_I2C_MDR_STP; | ||
345 | if (msg->len == 0) { | ||
346 | flag |= DAVINCI_I2C_MDR_RM; | 343 | flag |= DAVINCI_I2C_MDR_RM; |
347 | flag &= ~DAVINCI_I2C_MDR_STP; | ||
348 | } | ||
349 | 344 | ||
350 | /* Enable receive or transmit interrupts */ | 345 | /* Enable receive or transmit interrupts */ |
351 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); | 346 | w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); |
@@ -358,17 +353,28 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) | |||
358 | dev->terminate = 0; | 353 | dev->terminate = 0; |
359 | 354 | ||
360 | /* | 355 | /* |
356 | * Write mode register first as needed for correct behaviour | ||
357 | * on OMAP-L138, but don't set STT yet to avoid a race with XRDY | ||
358 | * occuring before we have loaded DXR | ||
359 | */ | ||
360 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); | ||
361 | |||
362 | /* | ||
361 | * First byte should be set here, not after interrupt, | 363 | * First byte should be set here, not after interrupt, |
362 | * because transmit-data-ready interrupt can come before | 364 | * because transmit-data-ready interrupt can come before |
363 | * NACK-interrupt during sending of previous message and | 365 | * NACK-interrupt during sending of previous message and |
364 | * ICDXR may have wrong data | 366 | * ICDXR may have wrong data |
367 | * It also saves us one interrupt, slightly faster | ||
365 | */ | 368 | */ |
366 | if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) { | 369 | if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) { |
367 | davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++); | 370 | davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++); |
368 | dev->buf_len--; | 371 | dev->buf_len--; |
369 | } | 372 | } |
370 | 373 | ||
371 | /* write the data into mode register; start transmitting */ | 374 | /* Set STT to begin transmit now DXR is loaded */ |
375 | flag |= DAVINCI_I2C_MDR_STT; | ||
376 | if (stop && msg->len != 0) | ||
377 | flag |= DAVINCI_I2C_MDR_STP; | ||
372 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); | 378 | davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); |
373 | 379 | ||
374 | r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, | 380 | r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, |
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index d1ff9408dc1f..4c2a62b75b5c 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c | |||
@@ -159,15 +159,9 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) | |||
159 | 159 | ||
160 | static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) | 160 | static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx) |
161 | { | 161 | { |
162 | int result; | 162 | wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10); |
163 | |||
164 | result = wait_event_interruptible_timeout(i2c_imx->queue, | ||
165 | i2c_imx->i2csr & I2SR_IIF, HZ / 10); | ||
166 | 163 | ||
167 | if (unlikely(result < 0)) { | 164 | if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { |
168 | dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__); | ||
169 | return result; | ||
170 | } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { | ||
171 | dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); | 165 | dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); |
172 | return -ETIMEDOUT; | 166 | return -ETIMEDOUT; |
173 | } | 167 | } |
@@ -295,7 +289,7 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id) | |||
295 | i2c_imx->i2csr = temp; | 289 | i2c_imx->i2csr = temp; |
296 | temp &= ~I2SR_IIF; | 290 | temp &= ~I2SR_IIF; |
297 | writeb(temp, i2c_imx->base + IMX_I2C_I2SR); | 291 | writeb(temp, i2c_imx->base + IMX_I2C_I2SR); |
298 | wake_up_interruptible(&i2c_imx->queue); | 292 | wake_up(&i2c_imx->queue); |
299 | return IRQ_HANDLED; | 293 | return IRQ_HANDLED; |
300 | } | 294 | } |
301 | 295 | ||