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-rw-r--r--drivers/gpu/drm/exynos/Kconfig2
-rw-r--r--drivers/gpu/drm/exynos/exynos7_drm_decon.c4
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_connector.c245
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_connector.h20
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimd.c29
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_plane.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/base.c6
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c43
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c85
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c11
14 files changed, 108 insertions, 357 deletions
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index a5e74612100e..0a6780367d28 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -50,7 +50,7 @@ config DRM_EXYNOS_DSI
50 50
51config DRM_EXYNOS_DP 51config DRM_EXYNOS_DP
52 bool "EXYNOS DRM DP driver support" 52 bool "EXYNOS DRM DP driver support"
53 depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7DECON) && ARCH_EXYNOS && (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS) 53 depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON) && ARCH_EXYNOS && (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS)
54 default DRM_EXYNOS 54 default DRM_EXYNOS
55 select DRM_PANEL 55 select DRM_PANEL
56 help 56 help
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 63f02e2380ae..970046199608 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -888,8 +888,8 @@ static int decon_probe(struct platform_device *pdev)
888 of_node_put(i80_if_timings); 888 of_node_put(i80_if_timings);
889 889
890 ctx->regs = of_iomap(dev->of_node, 0); 890 ctx->regs = of_iomap(dev->of_node, 0);
891 if (IS_ERR(ctx->regs)) { 891 if (!ctx->regs) {
892 ret = PTR_ERR(ctx->regs); 892 ret = -ENOMEM;
893 goto err_del_component; 893 goto err_del_component;
894 } 894 }
895 895
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c
deleted file mode 100644
index ba9b3d5ed672..000000000000
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ /dev/null
@@ -1,245 +0,0 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * Authors:
4 * Inki Dae <inki.dae@samsung.com>
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <drm/drmP.h>
15#include <drm/drm_crtc_helper.h>
16
17#include <drm/exynos_drm.h>
18#include "exynos_drm_drv.h"
19#include "exynos_drm_encoder.h"
20#include "exynos_drm_connector.h"
21
22#define to_exynos_connector(x) container_of(x, struct exynos_drm_connector,\
23 drm_connector)
24
25struct exynos_drm_connector {
26 struct drm_connector drm_connector;
27 uint32_t encoder_id;
28 struct exynos_drm_display *display;
29};
30
31static int exynos_drm_connector_get_modes(struct drm_connector *connector)
32{
33 struct exynos_drm_connector *exynos_connector =
34 to_exynos_connector(connector);
35 struct exynos_drm_display *display = exynos_connector->display;
36 struct edid *edid = NULL;
37 unsigned int count = 0;
38 int ret;
39
40 /*
41 * if get_edid() exists then get_edid() callback of hdmi side
42 * is called to get edid data through i2c interface else
43 * get timing from the FIMD driver(display controller).
44 *
45 * P.S. in case of lcd panel, count is always 1 if success
46 * because lcd panel has only one mode.
47 */
48 if (display->ops->get_edid) {
49 edid = display->ops->get_edid(display, connector);
50 if (IS_ERR_OR_NULL(edid)) {
51 ret = PTR_ERR(edid);
52 edid = NULL;
53 DRM_ERROR("Panel operation get_edid failed %d\n", ret);
54 goto out;
55 }
56
57 count = drm_add_edid_modes(connector, edid);
58 if (!count) {
59 DRM_ERROR("Add edid modes failed %d\n", count);
60 goto out;
61 }
62
63 drm_mode_connector_update_edid_property(connector, edid);
64 } else {
65 struct exynos_drm_panel_info *panel;
66 struct drm_display_mode *mode = drm_mode_create(connector->dev);
67 if (!mode) {
68 DRM_ERROR("failed to create a new display mode.\n");
69 return 0;
70 }
71
72 if (display->ops->get_panel)
73 panel = display->ops->get_panel(display);
74 else {
75 drm_mode_destroy(connector->dev, mode);
76 return 0;
77 }
78
79 drm_display_mode_from_videomode(&panel->vm, mode);
80 mode->width_mm = panel->width_mm;
81 mode->height_mm = panel->height_mm;
82 connector->display_info.width_mm = mode->width_mm;
83 connector->display_info.height_mm = mode->height_mm;
84
85 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
86 drm_mode_set_name(mode);
87 drm_mode_probed_add(connector, mode);
88
89 count = 1;
90 }
91
92out:
93 kfree(edid);
94 return count;
95}
96
97static int exynos_drm_connector_mode_valid(struct drm_connector *connector,
98 struct drm_display_mode *mode)
99{
100 struct exynos_drm_connector *exynos_connector =
101 to_exynos_connector(connector);
102 struct exynos_drm_display *display = exynos_connector->display;
103 int ret = MODE_BAD;
104
105 DRM_DEBUG_KMS("%s\n", __FILE__);
106
107 if (display->ops->check_mode)
108 if (!display->ops->check_mode(display, mode))
109 ret = MODE_OK;
110
111 return ret;
112}
113
114static struct drm_encoder *exynos_drm_best_encoder(
115 struct drm_connector *connector)
116{
117 struct drm_device *dev = connector->dev;
118 struct exynos_drm_connector *exynos_connector =
119 to_exynos_connector(connector);
120 return drm_encoder_find(dev, exynos_connector->encoder_id);
121}
122
123static struct drm_connector_helper_funcs exynos_connector_helper_funcs = {
124 .get_modes = exynos_drm_connector_get_modes,
125 .mode_valid = exynos_drm_connector_mode_valid,
126 .best_encoder = exynos_drm_best_encoder,
127};
128
129static int exynos_drm_connector_fill_modes(struct drm_connector *connector,
130 unsigned int max_width, unsigned int max_height)
131{
132 struct exynos_drm_connector *exynos_connector =
133 to_exynos_connector(connector);
134 struct exynos_drm_display *display = exynos_connector->display;
135 unsigned int width, height;
136
137 width = max_width;
138 height = max_height;
139
140 /*
141 * if specific driver want to find desired_mode using maxmum
142 * resolution then get max width and height from that driver.
143 */
144 if (display->ops->get_max_resol)
145 display->ops->get_max_resol(display, &width, &height);
146
147 return drm_helper_probe_single_connector_modes(connector, width,
148 height);
149}
150
151/* get detection status of display device. */
152static enum drm_connector_status
153exynos_drm_connector_detect(struct drm_connector *connector, bool force)
154{
155 struct exynos_drm_connector *exynos_connector =
156 to_exynos_connector(connector);
157 struct exynos_drm_display *display = exynos_connector->display;
158 enum drm_connector_status status = connector_status_disconnected;
159
160 if (display->ops->is_connected) {
161 if (display->ops->is_connected(display))
162 status = connector_status_connected;
163 else
164 status = connector_status_disconnected;
165 }
166
167 return status;
168}
169
170static void exynos_drm_connector_destroy(struct drm_connector *connector)
171{
172 struct exynos_drm_connector *exynos_connector =
173 to_exynos_connector(connector);
174
175 drm_connector_unregister(connector);
176 drm_connector_cleanup(connector);
177 kfree(exynos_connector);
178}
179
180static struct drm_connector_funcs exynos_connector_funcs = {
181 .dpms = drm_helper_connector_dpms,
182 .fill_modes = exynos_drm_connector_fill_modes,
183 .detect = exynos_drm_connector_detect,
184 .destroy = exynos_drm_connector_destroy,
185};
186
187struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
188 struct drm_encoder *encoder)
189{
190 struct exynos_drm_connector *exynos_connector;
191 struct exynos_drm_display *display = exynos_drm_get_display(encoder);
192 struct drm_connector *connector;
193 int type;
194 int err;
195
196 exynos_connector = kzalloc(sizeof(*exynos_connector), GFP_KERNEL);
197 if (!exynos_connector)
198 return NULL;
199
200 connector = &exynos_connector->drm_connector;
201
202 switch (display->type) {
203 case EXYNOS_DISPLAY_TYPE_HDMI:
204 type = DRM_MODE_CONNECTOR_HDMIA;
205 connector->interlace_allowed = true;
206 connector->polled = DRM_CONNECTOR_POLL_HPD;
207 break;
208 case EXYNOS_DISPLAY_TYPE_VIDI:
209 type = DRM_MODE_CONNECTOR_VIRTUAL;
210 connector->polled = DRM_CONNECTOR_POLL_HPD;
211 break;
212 default:
213 type = DRM_MODE_CONNECTOR_Unknown;
214 break;
215 }
216
217 drm_connector_init(dev, connector, &exynos_connector_funcs, type);
218 drm_connector_helper_add(connector, &exynos_connector_helper_funcs);
219
220 err = drm_connector_register(connector);
221 if (err)
222 goto err_connector;
223
224 exynos_connector->encoder_id = encoder->base.id;
225 exynos_connector->display = display;
226 connector->dpms = DRM_MODE_DPMS_OFF;
227 connector->encoder = encoder;
228
229 err = drm_mode_connector_attach_encoder(connector, encoder);
230 if (err) {
231 DRM_ERROR("failed to attach a connector to a encoder\n");
232 goto err_sysfs;
233 }
234
235 DRM_DEBUG_KMS("connector has been created\n");
236
237 return connector;
238
239err_sysfs:
240 drm_connector_unregister(connector);
241err_connector:
242 drm_connector_cleanup(connector);
243 kfree(exynos_connector);
244 return NULL;
245}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.h b/drivers/gpu/drm/exynos/exynos_drm_connector.h
deleted file mode 100644
index 4eb20d78379a..000000000000
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * Authors:
4 * Inki Dae <inki.dae@samsung.com>
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#ifndef _EXYNOS_DRM_CONNECTOR_H_
15#define _EXYNOS_DRM_CONNECTOR_H_
16
17struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
18 struct drm_encoder *encoder);
19
20#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 925fc69af1a0..c300e22da8ac 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -284,14 +284,9 @@ static void fimd_clear_channel(struct fimd_context *ctx)
284 } 284 }
285} 285}
286 286
287static int fimd_ctx_initialize(struct fimd_context *ctx, 287static int fimd_iommu_attach_devices(struct fimd_context *ctx,
288 struct drm_device *drm_dev) 288 struct drm_device *drm_dev)
289{ 289{
290 struct exynos_drm_private *priv;
291 priv = drm_dev->dev_private;
292
293 ctx->drm_dev = drm_dev;
294 ctx->pipe = priv->pipe++;
295 290
296 /* attach this sub driver to iommu mapping if supported. */ 291 /* attach this sub driver to iommu mapping if supported. */
297 if (is_drm_iommu_supported(ctx->drm_dev)) { 292 if (is_drm_iommu_supported(ctx->drm_dev)) {
@@ -313,7 +308,7 @@ static int fimd_ctx_initialize(struct fimd_context *ctx,
313 return 0; 308 return 0;
314} 309}
315 310
316static void fimd_ctx_remove(struct fimd_context *ctx) 311static void fimd_iommu_detach_devices(struct fimd_context *ctx)
317{ 312{
318 /* detach this sub driver from iommu mapping if supported. */ 313 /* detach this sub driver from iommu mapping if supported. */
319 if (is_drm_iommu_supported(ctx->drm_dev)) 314 if (is_drm_iommu_supported(ctx->drm_dev))
@@ -1056,25 +1051,23 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
1056{ 1051{
1057 struct fimd_context *ctx = dev_get_drvdata(dev); 1052 struct fimd_context *ctx = dev_get_drvdata(dev);
1058 struct drm_device *drm_dev = data; 1053 struct drm_device *drm_dev = data;
1054 struct exynos_drm_private *priv = drm_dev->dev_private;
1059 int ret; 1055 int ret;
1060 1056
1061 ret = fimd_ctx_initialize(ctx, drm_dev); 1057 ctx->drm_dev = drm_dev;
1062 if (ret) { 1058 ctx->pipe = priv->pipe++;
1063 DRM_ERROR("fimd_ctx_initialize failed.\n");
1064 return ret;
1065 }
1066 1059
1067 ctx->crtc = exynos_drm_crtc_create(drm_dev, ctx->pipe, 1060 ctx->crtc = exynos_drm_crtc_create(drm_dev, ctx->pipe,
1068 EXYNOS_DISPLAY_TYPE_LCD, 1061 EXYNOS_DISPLAY_TYPE_LCD,
1069 &fimd_crtc_ops, ctx); 1062 &fimd_crtc_ops, ctx);
1070 if (IS_ERR(ctx->crtc)) {
1071 fimd_ctx_remove(ctx);
1072 return PTR_ERR(ctx->crtc);
1073 }
1074 1063
1075 if (ctx->display) 1064 if (ctx->display)
1076 exynos_drm_create_enc_conn(drm_dev, ctx->display); 1065 exynos_drm_create_enc_conn(drm_dev, ctx->display);
1077 1066
1067 ret = fimd_iommu_attach_devices(ctx, drm_dev);
1068 if (ret)
1069 return ret;
1070
1078 return 0; 1071 return 0;
1079 1072
1080} 1073}
@@ -1086,10 +1079,10 @@ static void fimd_unbind(struct device *dev, struct device *master,
1086 1079
1087 fimd_dpms(ctx->crtc, DRM_MODE_DPMS_OFF); 1080 fimd_dpms(ctx->crtc, DRM_MODE_DPMS_OFF);
1088 1081
1082 fimd_iommu_detach_devices(ctx);
1083
1089 if (ctx->display) 1084 if (ctx->display)
1090 exynos_dpi_remove(ctx->display); 1085 exynos_dpi_remove(ctx->display);
1091
1092 fimd_ctx_remove(ctx);
1093} 1086}
1094 1087
1095static const struct component_ops fimd_component_ops = { 1088static const struct component_ops fimd_component_ops = {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index a5616872eee7..8ad5b7294eb4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -175,7 +175,7 @@ static int exynos_disable_plane(struct drm_plane *plane)
175 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); 175 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
176 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc); 176 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc);
177 177
178 if (exynos_crtc->ops->win_disable) 178 if (exynos_crtc && exynos_crtc->ops->win_disable)
179 exynos_crtc->ops->win_disable(exynos_crtc, 179 exynos_crtc->ops->win_disable(exynos_crtc,
180 exynos_plane->zpos); 180 exynos_plane->zpos);
181 181
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 29bd539af183..6efa8f38ff54 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -340,11 +340,13 @@ nvkm_devobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
340 340
341 /* switch mmio to cpu's native endianness */ 341 /* switch mmio to cpu's native endianness */
342#ifndef __BIG_ENDIAN 342#ifndef __BIG_ENDIAN
343 if (ioread32_native(map + 0x000004) != 0x00000000) 343 if (ioread32_native(map + 0x000004) != 0x00000000) {
344#else 344#else
345 if (ioread32_native(map + 0x000004) == 0x00000000) 345 if (ioread32_native(map + 0x000004) == 0x00000000) {
346#endif 346#endif
347 iowrite32_native(0x01000001, map + 0x000004); 347 iowrite32_native(0x01000001, map + 0x000004);
348 ioread32_native(map);
349 }
348 350
349 /* read boot0 and strapping information */ 351 /* read boot0 and strapping information */
350 boot0 = ioread32_native(map + 0x000000); 352 boot0 = ioread32_native(map + 0x000000);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index 539561ed3281..108d048da764 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -142,6 +142,49 @@ gm100_identify(struct nvkm_device *device)
142 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; 142 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
143#endif 143#endif
144 break; 144 break;
145 case 0x126:
146 device->cname = "GM206";
147 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
148 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
149 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
150 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
151#if 0
152 /* looks to be some non-trivial changes */
153 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
154 /* priv ring says no to 0x10eb14 writes */
155 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
156#endif
157 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
158 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
159 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
160 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
161 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
162 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
163 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
164 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
165 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
166 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
167 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
168 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
169#if 0
170 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
171#endif
172 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
173#if 0
174 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
175 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
176 device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
177#endif
178 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
179#if 0
180 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
181 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
182 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
183 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
184 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
185 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
186#endif
187 break;
145 default: 188 default:
146 nv_fatal(device, "unknown Maxwell chipset\n"); 189 nv_fatal(device, "unknown Maxwell chipset\n");
147 return -EINVAL; 190 return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
index b038b6eb51db..043e4296084c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
@@ -502,72 +502,57 @@ nv04_fifo_intr(struct nvkm_subdev *subdev)
502{ 502{
503 struct nvkm_device *device = nv_device(subdev); 503 struct nvkm_device *device = nv_device(subdev);
504 struct nv04_fifo_priv *priv = (void *)subdev; 504 struct nv04_fifo_priv *priv = (void *)subdev;
505 uint32_t status, reassign; 505 u32 mask = nv_rd32(priv, NV03_PFIFO_INTR_EN_0);
506 int cnt = 0; 506 u32 stat = nv_rd32(priv, NV03_PFIFO_INTR_0) & mask;
507 u32 reassign, chid, get, sem;
507 508
508 reassign = nv_rd32(priv, NV03_PFIFO_CACHES) & 1; 509 reassign = nv_rd32(priv, NV03_PFIFO_CACHES) & 1;
509 while ((status = nv_rd32(priv, NV03_PFIFO_INTR_0)) && (cnt++ < 100)) { 510 nv_wr32(priv, NV03_PFIFO_CACHES, 0);
510 uint32_t chid, get;
511
512 nv_wr32(priv, NV03_PFIFO_CACHES, 0);
513
514 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max;
515 get = nv_rd32(priv, NV03_PFIFO_CACHE1_GET);
516 511
517 if (status & NV_PFIFO_INTR_CACHE_ERROR) { 512 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max;
518 nv04_fifo_cache_error(device, priv, chid, get); 513 get = nv_rd32(priv, NV03_PFIFO_CACHE1_GET);
519 status &= ~NV_PFIFO_INTR_CACHE_ERROR;
520 }
521 514
522 if (status & NV_PFIFO_INTR_DMA_PUSHER) { 515 if (stat & NV_PFIFO_INTR_CACHE_ERROR) {
523 nv04_fifo_dma_pusher(device, priv, chid); 516 nv04_fifo_cache_error(device, priv, chid, get);
524 status &= ~NV_PFIFO_INTR_DMA_PUSHER; 517 stat &= ~NV_PFIFO_INTR_CACHE_ERROR;
525 } 518 }
526 519
527 if (status & NV_PFIFO_INTR_SEMAPHORE) { 520 if (stat & NV_PFIFO_INTR_DMA_PUSHER) {
528 uint32_t sem; 521 nv04_fifo_dma_pusher(device, priv, chid);
522 stat &= ~NV_PFIFO_INTR_DMA_PUSHER;
523 }
529 524
530 status &= ~NV_PFIFO_INTR_SEMAPHORE; 525 if (stat & NV_PFIFO_INTR_SEMAPHORE) {
531 nv_wr32(priv, NV03_PFIFO_INTR_0, 526 stat &= ~NV_PFIFO_INTR_SEMAPHORE;
532 NV_PFIFO_INTR_SEMAPHORE); 527 nv_wr32(priv, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_SEMAPHORE);
533 528
534 sem = nv_rd32(priv, NV10_PFIFO_CACHE1_SEMAPHORE); 529 sem = nv_rd32(priv, NV10_PFIFO_CACHE1_SEMAPHORE);
535 nv_wr32(priv, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1); 530 nv_wr32(priv, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1);
536 531
537 nv_wr32(priv, NV03_PFIFO_CACHE1_GET, get + 4); 532 nv_wr32(priv, NV03_PFIFO_CACHE1_GET, get + 4);
538 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); 533 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1);
539 } 534 }
540 535
541 if (device->card_type == NV_50) { 536 if (device->card_type == NV_50) {
542 if (status & 0x00000010) { 537 if (stat & 0x00000010) {
543 status &= ~0x00000010; 538 stat &= ~0x00000010;
544 nv_wr32(priv, 0x002100, 0x00000010); 539 nv_wr32(priv, 0x002100, 0x00000010);
545 }
546
547 if (status & 0x40000000) {
548 nv_wr32(priv, 0x002100, 0x40000000);
549 nvkm_fifo_uevent(&priv->base);
550 status &= ~0x40000000;
551 }
552 } 540 }
553 541
554 if (status) { 542 if (stat & 0x40000000) {
555 nv_warn(priv, "unknown intr 0x%08x, ch %d\n", 543 nv_wr32(priv, 0x002100, 0x40000000);
556 status, chid); 544 nvkm_fifo_uevent(&priv->base);
557 nv_wr32(priv, NV03_PFIFO_INTR_0, status); 545 stat &= ~0x40000000;
558 status = 0;
559 } 546 }
560
561 nv_wr32(priv, NV03_PFIFO_CACHES, reassign);
562 } 547 }
563 548
564 if (status) { 549 if (stat) {
565 nv_error(priv, "still angry after %d spins, halt\n", cnt); 550 nv_warn(priv, "unknown intr 0x%08x\n", stat);
566 nv_wr32(priv, 0x002140, 0); 551 nv_mask(priv, NV03_PFIFO_INTR_EN_0, stat, 0x00000000);
567 nv_wr32(priv, 0x000140, 0); 552 nv_wr32(priv, NV03_PFIFO_INTR_0, stat);
568 } 553 }
569 554
570 nv_wr32(priv, 0x000100, 0x00000100); 555 nv_wr32(priv, NV03_PFIFO_CACHES, reassign);
571} 556}
572 557
573static int 558static int
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
index 2e7ec389eea7..57e2c5b13123 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
@@ -1032,9 +1032,9 @@ gf100_grctx_generate_bundle(struct gf100_grctx *info)
1032 const int s = 8; 1032 const int s = 8;
1033 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access); 1033 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access);
1034 mmio_refn(info, 0x408004, 0x00000000, s, b); 1034 mmio_refn(info, 0x408004, 0x00000000, s, b);
1035 mmio_refn(info, 0x408008, 0x80000000 | (impl->bundle_size >> s), 0, b); 1035 mmio_wr32(info, 0x408008, 0x80000000 | (impl->bundle_size >> s));
1036 mmio_refn(info, 0x418808, 0x00000000, s, b); 1036 mmio_refn(info, 0x418808, 0x00000000, s, b);
1037 mmio_refn(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s), 0, b); 1037 mmio_wr32(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s));
1038} 1038}
1039 1039
1040void 1040void
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
index b52300d8861a..5e9454ba158f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
@@ -851,9 +851,9 @@ gk104_grctx_generate_bundle(struct gf100_grctx *info)
851 const int s = 8; 851 const int s = 8;
852 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access); 852 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access);
853 mmio_refn(info, 0x408004, 0x00000000, s, b); 853 mmio_refn(info, 0x408004, 0x00000000, s, b);
854 mmio_refn(info, 0x408008, 0x80000000 | (impl->bundle_size >> s), 0, b); 854 mmio_wr32(info, 0x408008, 0x80000000 | (impl->bundle_size >> s));
855 mmio_refn(info, 0x418808, 0x00000000, s, b); 855 mmio_refn(info, 0x418808, 0x00000000, s, b);
856 mmio_refn(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s), 0, b); 856 mmio_wr32(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s));
857 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit); 857 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);
858} 858}
859 859
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
index 956f4dce960c..b2fae6e389e2 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
@@ -871,9 +871,9 @@ gm107_grctx_generate_bundle(struct gf100_grctx *info)
871 const int s = 8; 871 const int s = 8;
872 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access); 872 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access);
873 mmio_refn(info, 0x408004, 0x00000000, s, b); 873 mmio_refn(info, 0x408004, 0x00000000, s, b);
874 mmio_refn(info, 0x408008, 0x80000000 | (impl->bundle_size >> s), 0, b); 874 mmio_wr32(info, 0x408008, 0x80000000 | (impl->bundle_size >> s));
875 mmio_refn(info, 0x418e24, 0x00000000, s, b); 875 mmio_refn(info, 0x418e24, 0x00000000, s, b);
876 mmio_refn(info, 0x418e28, 0x80000000 | (impl->bundle_size >> s), 0, b); 876 mmio_wr32(info, 0x418e28, 0x80000000 | (impl->bundle_size >> s));
877 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit); 877 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);
878} 878}
879 879
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
index d1a89b2bd5c1..c4e1f085ee10 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
@@ -74,7 +74,11 @@ dcb_i2c_parse(struct nvkm_bios *bios, u8 idx, struct dcb_i2c_entry *info)
74 u16 ent = dcb_i2c_entry(bios, idx, &ver, &len); 74 u16 ent = dcb_i2c_entry(bios, idx, &ver, &len);
75 if (ent) { 75 if (ent) {
76 if (ver >= 0x41) { 76 if (ver >= 0x41) {
77 if (!(nv_ro32(bios, ent) & 0x80000000)) 77 u32 ent_value = nv_ro32(bios, ent);
78 u8 i2c_port = (ent_value >> 27) & 0x1f;
79 u8 dpaux_port = (ent_value >> 22) & 0x1f;
80 /* value 0x1f means unused according to DCB 4.x spec */
81 if (i2c_port == 0x1f && dpaux_port == 0x1f)
78 info->type = DCB_I2C_UNUSED; 82 info->type = DCB_I2C_UNUSED;
79 else 83 else
80 info->type = DCB_I2C_PMGR; 84 info->type = DCB_I2C_PMGR;
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 43e09942823e..318165d4855c 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -173,17 +173,6 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
173 else 173 else
174 rbo->placements[i].lpfn = 0; 174 rbo->placements[i].lpfn = 0;
175 } 175 }
176
177 /*
178 * Use two-ended allocation depending on the buffer size to
179 * improve fragmentation quality.
180 * 512kb was measured as the most optimal number.
181 */
182 if (rbo->tbo.mem.size > 512 * 1024) {
183 for (i = 0; i < c; i++) {
184 rbo->placements[i].flags |= TTM_PL_FLAG_TOPDOWN;
185 }
186 }
187} 176}
188 177
189int radeon_bo_create(struct radeon_device *rdev, 178int radeon_bo_create(struct radeon_device *rdev,
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-28 14:44:18 -0500