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-rw-r--r--arch/arm/mach-omap2/board-flash.c1
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h6
-rw-r--r--arch/arm/plat-omap/include/plat/nand.h2
-rw-r--r--drivers/mtd/nand/omap2.c26
4 files changed, 20 insertions, 15 deletions
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 19645095d597..a76819812019 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -148,6 +148,7 @@ __init board_nand_init(struct mtd_partition *nand_parts,
148 board_nand_data.nr_parts = nr_parts; 148 board_nand_data.nr_parts = nr_parts;
149 board_nand_data.devsize = nand_type; 149 board_nand_data.devsize = nand_type;
150 150
151 board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
151 board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs; 152 board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
152 gpmc_nand_init(&board_nand_data); 153 gpmc_nand_init(&board_nand_data);
153} 154}
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index a2434639063d..773351bc25a2 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -86,6 +86,12 @@
86#define PREFETCH_FIFOTHRESHOLD_MAX 0x40 86#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
87#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8) 87#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
88 88
89enum omap_ecc {
90 /* 1-bit ecc: stored at end of spare area */
91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
93};
94
89/* 95/*
90 * Note that all values in this struct are in nanoseconds except sync_clk 96 * Note that all values in this struct are in nanoseconds except sync_clk
91 * (which is in picoseconds), while the register values are in gpmc_fck cycles. 97 * (which is in picoseconds), while the register values are in gpmc_fck cycles.
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index ae5e05383031..d86d1ecf0068 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <plat/gpmc.h>
11#include <linux/mtd/partitions.h> 12#include <linux/mtd/partitions.h>
12 13
13enum nand_io { 14enum nand_io {
@@ -31,6 +32,7 @@ struct omap_nand_platform_data {
31 enum nand_io xfer_type; 32 enum nand_io xfer_type;
32 unsigned long phys_base; 33 unsigned long phys_base;
33 int devsize; 34 int devsize;
35 enum omap_ecc ecc_opt;
34}; 36};
35 37
36/* minimum size for IO mapping */ 38/* minimum size for IO mapping */
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index f1648fd5924a..6d4a42e39380 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -626,8 +626,6 @@ static int omap_verify_buf(struct mtd_info *mtd, const u_char * buf, int len)
626 return 0; 626 return 0;
627} 627}
628 628
629#ifdef CONFIG_MTD_NAND_OMAP_HWECC
630
631/** 629/**
632 * gen_true_ecc - This function will generate true ECC value 630 * gen_true_ecc - This function will generate true ECC value
633 * @ecc_buf: buffer to store ecc code 631 * @ecc_buf: buffer to store ecc code
@@ -847,8 +845,6 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int mode)
847 gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size); 845 gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size);
848} 846}
849 847
850#endif
851
852/** 848/**
853 * omap_wait - wait until the command is done 849 * omap_wait - wait until the command is done
854 * @mtd: MTD device structure 850 * @mtd: MTD device structure
@@ -1038,17 +1034,17 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
1038 1034
1039 info->nand.verify_buf = omap_verify_buf; 1035 info->nand.verify_buf = omap_verify_buf;
1040 1036
1041#ifdef CONFIG_MTD_NAND_OMAP_HWECC 1037 /* selsect the ecc type */
1042 info->nand.ecc.bytes = 3; 1038 if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
1043 info->nand.ecc.size = 512; 1039 info->nand.ecc.mode = NAND_ECC_SOFT;
1044 info->nand.ecc.calculate = omap_calculate_ecc; 1040 else if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) {
1045 info->nand.ecc.hwctl = omap_enable_hwecc; 1041 info->nand.ecc.bytes = 3;
1046 info->nand.ecc.correct = omap_correct_data; 1042 info->nand.ecc.size = 512;
1047 info->nand.ecc.mode = NAND_ECC_HW; 1043 info->nand.ecc.calculate = omap_calculate_ecc;
1048 1044 info->nand.ecc.hwctl = omap_enable_hwecc;
1049#else 1045 info->nand.ecc.correct = omap_correct_data;
1050 info->nand.ecc.mode = NAND_ECC_SOFT; 1046 info->nand.ecc.mode = NAND_ECC_HW;
1051#endif 1047 }
1052 1048
1053 /* DIP switches on some boards change between 8 and 16 bit 1049 /* DIP switches on some boards change between 8 and 16 bit
1054 * bus widths for flash. Try the other width if the first try fails. 1050 * bus widths for flash. Try the other width if the first try fails.