aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio-davinci.h90
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h88
-rw-r--r--drivers/gpio/gpio-tnetv107x.c1
-rw-r--r--include/linux/platform_data/gpio-davinci.h35
5 files changed, 36 insertions, 179 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3f7714d8d2d2..ad3767095422 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -847,7 +847,6 @@ config ARCH_DAVINCI
847 select GENERIC_CLOCKEVENTS 847 select GENERIC_CLOCKEVENTS
848 select GENERIC_IRQ_CHIP 848 select GENERIC_IRQ_CHIP
849 select HAVE_IDE 849 select HAVE_IDE
850 select NEED_MACH_GPIO_H
851 select TI_PRIV_EDMA 850 select TI_PRIV_EDMA
852 select USE_OF 851 select USE_OF
853 select ZONE_DMA 852 select ZONE_DMA
diff --git a/arch/arm/mach-davinci/include/mach/gpio-davinci.h b/arch/arm/mach-davinci/include/mach/gpio-davinci.h
deleted file mode 100644
index 0d63b24cefc9..000000000000
--- a/arch/arm/mach-davinci/include/mach/gpio-davinci.h
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * TI DaVinci GPIO Support
3 *
4 * Copyright (c) 2006 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __DAVINCI_DAVINCI_GPIO_H
14#define __DAVINCI_DAVINCI_GPIO_H
15
16#include <linux/io.h>
17#include <linux/spinlock.h>
18
19#include <asm-generic/gpio.h>
20
21#include <mach/irqs.h>
22#include <mach/common.h>
23
24enum davinci_gpio_type {
25 GPIO_TYPE_DAVINCI = 0,
26 GPIO_TYPE_TNETV107X,
27};
28
29/*
30 * basic gpio routines
31 *
32 * board-specific init should be done by arch/.../.../board-XXX.c (maybe
33 * initializing banks together) rather than boot loaders; kexec() won't
34 * go through boot loaders.
35 *
36 * the gpio clock will be turned on when gpios are used, and you may also
37 * need to pay attention to PINMUX registers to be sure those pins are
38 * used as gpios, not with other peripherals.
39 *
40 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
41 * and maybe for later updates, code may write GPIO(N). These may be
42 * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
43 * may not support all the GPIOs in that range.
44 *
45 * GPIOs can also be on external chips, numbered after the ones built-in
46 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
47 */
48#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
49
50/* Convert GPIO signal to GPIO pin number */
51#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
52
53struct davinci_gpio_controller {
54 struct gpio_chip chip;
55 int irq_base;
56 spinlock_t lock;
57 void __iomem *regs;
58 void __iomem *set_data;
59 void __iomem *clr_data;
60 void __iomem *in_data;
61 unsigned gpio_irq;
62};
63
64/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
65 * with constant parameters; or in outlined code they execute at runtime.
66 *
67 * You'd access the controller directly when reading or writing more than
68 * one gpio value at a time, and to support wired logic where the value
69 * being driven by the cpu need not match the value read back.
70 *
71 * These are NOT part of the cross-platform GPIO interface
72 */
73static inline struct davinci_gpio_controller *
74__gpio_to_controller(unsigned gpio)
75{
76 struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
77 int index = gpio / 32;
78
79 if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
80 return NULL;
81
82 return ctlrs + index;
83}
84
85static inline u32 __gpio_mask(unsigned gpio)
86{
87 return 1 << (gpio % 32);
88}
89
90#endif /* __DAVINCI_DAVINCI_GPIO_H */
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
deleted file mode 100644
index 960e9de47e1e..000000000000
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * TI DaVinci GPIO Support
3 *
4 * Copyright (c) 2006 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __DAVINCI_GPIO_H
14#define __DAVINCI_GPIO_H
15
16#include <asm-generic/gpio.h>
17
18#define __ARM_GPIOLIB_COMPLEX
19
20/* The inline versions use the static inlines in the driver header */
21#include "gpio-davinci.h"
22
23/*
24 * The get/set/clear functions will inline when called with constant
25 * parameters referencing built-in GPIOs, for low-overhead bitbanging.
26 *
27 * gpio_set_value() will inline only on traditional Davinci style controllers
28 * with distinct set/clear registers.
29 *
30 * Otherwise, calls with variable parameters or referencing external
31 * GPIOs (e.g. on GPIO expander chips) use outlined functions.
32 */
33static inline void gpio_set_value(unsigned gpio, int value)
34{
35 if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
36 struct davinci_gpio_controller *ctlr;
37 u32 mask;
38
39 ctlr = __gpio_to_controller(gpio);
40
41 if (ctlr->set_data != ctlr->clr_data) {
42 mask = __gpio_mask(gpio);
43 if (value)
44 __raw_writel(mask, ctlr->set_data);
45 else
46 __raw_writel(mask, ctlr->clr_data);
47 return;
48 }
49 }
50
51 __gpio_set_value(gpio, value);
52}
53
54/* Returns zero or nonzero; works for gpios configured as inputs OR
55 * as outputs, at least for built-in GPIOs.
56 *
57 * NOTE: for built-in GPIOs, changes in reported values are synchronized
58 * to the GPIO clock. This is easily seen after calling gpio_set_value()
59 * and then immediately gpio_get_value(), where the gpio_get_value() will
60 * return the old value until the GPIO clock ticks and the new value gets
61 * latched.
62 */
63static inline int gpio_get_value(unsigned gpio)
64{
65 struct davinci_gpio_controller *ctlr;
66
67 if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
68 return __gpio_get_value(gpio);
69
70 ctlr = __gpio_to_controller(gpio);
71 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
72}
73
74static inline int gpio_cansleep(unsigned gpio)
75{
76 if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
77 return 0;
78 else
79 return __gpio_cansleep(gpio);
80}
81
82static inline int irq_to_gpio(unsigned irq)
83{
84 /* don't support the reverse mapping */
85 return -ENOSYS;
86}
87
88#endif /* __DAVINCI_GPIO_H */
diff --git a/drivers/gpio/gpio-tnetv107x.c b/drivers/gpio/gpio-tnetv107x.c
index 3fa3e2867e19..58445bb69106 100644
--- a/drivers/gpio/gpio-tnetv107x.c
+++ b/drivers/gpio/gpio-tnetv107x.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/platform_data/gpio-davinci.h>
18 19
19#include <mach/common.h> 20#include <mach/common.h>
20#include <mach/tnetv107x.h> 21#include <mach/tnetv107x.h>
diff --git a/include/linux/platform_data/gpio-davinci.h b/include/linux/platform_data/gpio-davinci.h
index 2fcc125af1aa..6efd20264585 100644
--- a/include/linux/platform_data/gpio-davinci.h
+++ b/include/linux/platform_data/gpio-davinci.h
@@ -16,10 +16,45 @@
16#ifndef __DAVINCI_GPIO_PLATFORM_H 16#ifndef __DAVINCI_GPIO_PLATFORM_H
17#define __DAVINCI_GPIO_PLATFORM_H 17#define __DAVINCI_GPIO_PLATFORM_H
18 18
19#include <linux/io.h>
20#include <linux/spinlock.h>
21
22#include <asm-generic/gpio.h>
23
24enum davinci_gpio_type {
25 GPIO_TYPE_TNETV107X = 0,
26};
27
19struct davinci_gpio_platform_data { 28struct davinci_gpio_platform_data {
20 u32 ngpio; 29 u32 ngpio;
21 u32 gpio_unbanked; 30 u32 gpio_unbanked;
22 u32 intc_irq_num; 31 u32 intc_irq_num;
23}; 32};
24 33
34
35struct davinci_gpio_controller {
36 struct gpio_chip chip;
37 int irq_base;
38 /* Serialize access to GPIO registers */
39 spinlock_t lock;
40 void __iomem *regs;
41 void __iomem *set_data;
42 void __iomem *clr_data;
43 void __iomem *in_data;
44 int gpio_unbanked;
45 unsigned gpio_irq;
46};
47
48/*
49 * basic gpio routines
50 */
51#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
52
53/* Convert GPIO signal to GPIO pin number */
54#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
55
56static inline u32 __gpio_mask(unsigned gpio)
57{
58 return 1 << (gpio % 32);
59}
25#endif 60#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 03:29:42 -0500