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-rw-r--r--Documentation/devicetree/bindings/drm/msm/hdmi.txt1
-rw-r--r--drivers/gpu/drm/msm/hdmi/hdmi.c17
2 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/drm/msm/hdmi.txt b/Documentation/devicetree/bindings/drm/msm/hdmi.txt
index aca917fe2ba7..c25d5aa8a32b 100644
--- a/Documentation/devicetree/bindings/drm/msm/hdmi.txt
+++ b/Documentation/devicetree/bindings/drm/msm/hdmi.txt
@@ -2,6 +2,7 @@ Qualcomm adreno/snapdragon hdmi output
2 2
3Required properties: 3Required properties:
4- compatible: one of the following 4- compatible: one of the following
5 * "qcom,hdmi-tx-8084"
5 * "qcom,hdmi-tx-8660" 6 * "qcom,hdmi-tx-8660"
6 * "qcom,hdmi-tx-8960" 7 * "qcom,hdmi-tx-8960"
7- reg: Physical base address and length of the controller's registers 8- reg: Physical base address and length of the controller's registers
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index 99b83a6a6adc..cbda3c544c32 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -329,6 +329,22 @@ static int hdmi_bind(struct device *dev, struct device *master, void *data)
329 config.hpd_clk_cnt = ARRAY_SIZE(hpd_clk_names); 329 config.hpd_clk_cnt = ARRAY_SIZE(hpd_clk_names);
330 config.pwr_clk_names = pwr_clk_names; 330 config.pwr_clk_names = pwr_clk_names;
331 config.pwr_clk_cnt = ARRAY_SIZE(pwr_clk_names); 331 config.pwr_clk_cnt = ARRAY_SIZE(pwr_clk_names);
332 } else if (of_device_is_compatible(of_node, "qcom,hdmi-tx-8084")) {
333 static const char *hpd_reg_names[] = {"hpd-gdsc", "hpd-5v", "hpd-5v-en"};
334 static const char *pwr_reg_names[] = {"core-vdda", "core-vcc"};
335 static const char *hpd_clk_names[] = {"iface_clk", "core_clk", "mdp_core_clk"};
336 static unsigned long hpd_clk_freq[] = {0, 19200000, 0};
337 static const char *pwr_clk_names[] = {"extp_clk", "alt_iface_clk"};
338 config.phy_init = hdmi_phy_8x74_init;
339 config.hpd_reg_names = hpd_reg_names;
340 config.hpd_reg_cnt = ARRAY_SIZE(hpd_reg_names);
341 config.pwr_reg_names = pwr_reg_names;
342 config.pwr_reg_cnt = ARRAY_SIZE(pwr_reg_names);
343 config.hpd_clk_names = hpd_clk_names;
344 config.hpd_freq = hpd_clk_freq;
345 config.hpd_clk_cnt = ARRAY_SIZE(hpd_clk_names);
346 config.pwr_clk_names = pwr_clk_names;
347 config.pwr_clk_cnt = ARRAY_SIZE(pwr_clk_names);
332 } else if (of_device_is_compatible(of_node, "qcom,hdmi-tx-8960")) { 348 } else if (of_device_is_compatible(of_node, "qcom,hdmi-tx-8960")) {
333 static const char *hpd_clk_names[] = {"core_clk", "master_iface_clk", "slave_iface_clk"}; 349 static const char *hpd_clk_names[] = {"core_clk", "master_iface_clk", "slave_iface_clk"};
334 static const char *hpd_reg_names[] = {"core-vdda", "hdmi-mux"}; 350 static const char *hpd_reg_names[] = {"core-vdda", "hdmi-mux"};
@@ -434,6 +450,7 @@ static int hdmi_dev_remove(struct platform_device *pdev)
434} 450}
435 451
436static const struct of_device_id dt_match[] = { 452static const struct of_device_id dt_match[] = {
453 { .compatible = "qcom,hdmi-tx-8084" },
437 { .compatible = "qcom,hdmi-tx-8074" }, 454 { .compatible = "qcom,hdmi-tx-8074" },
438 { .compatible = "qcom,hdmi-tx-8960" }, 455 { .compatible = "qcom,hdmi-tx-8960" },
439 { .compatible = "qcom,hdmi-tx-8660" }, 456 { .compatible = "qcom,hdmi-tx-8660" },