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-rw-r--r--arch/powerpc/kernel/vecemu.c (renamed from arch/ppc/kernel/vecemu.c)0
-rw-r--r--arch/powerpc/oprofile/Kconfig (renamed from arch/ppc/oprofile/Kconfig)0
-rw-r--r--arch/powerpc/oprofile/Makefile (renamed from arch/ppc/oprofile/Makefile)7
-rw-r--r--arch/powerpc/oprofile/common.c (renamed from arch/ppc64/oprofile/common.c)90
-rw-r--r--arch/powerpc/oprofile/op_model_fsl_booke.c (renamed from arch/ppc/oprofile/op_model_fsl_booke.c)5
-rw-r--r--arch/powerpc/oprofile/op_model_power4.c (renamed from arch/ppc64/oprofile/op_model_power4.c)2
-rw-r--r--arch/powerpc/oprofile/op_model_rs64.c (renamed from arch/ppc64/oprofile/op_model_rs64.c)2
-rw-r--r--arch/ppc/Kconfig8
-rw-r--r--arch/ppc/Makefile2
-rw-r--r--arch/ppc/kernel/Makefile2
-rw-r--r--arch/ppc/kernel/head.S6
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S6
-rw-r--r--arch/ppc/kernel/misc.S128
-rw-r--r--arch/ppc/kernel/pci.c10
-rw-r--r--arch/ppc/kernel/perfmon.c10
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c10
-rw-r--r--arch/ppc/kernel/setup.c5
-rw-r--r--arch/ppc/kernel/traps.c2
-rw-r--r--arch/ppc/kernel/vmlinux.lds.S26
-rw-r--r--arch/ppc/mm/init.c12
-rw-r--r--arch/ppc/oprofile/common.c161
-rw-r--r--arch/ppc/oprofile/op_impl.h45
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.h1
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.h1
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.h1
-rw-r--r--arch/ppc/platforms/chrp_pci.c8
-rw-r--r--arch/ppc/platforms/chrp_setup.c16
-rw-r--r--arch/ppc/platforms/chrp_smp.c2
-rw-r--r--arch/ppc/platforms/chrp_time.c8
-rw-r--r--arch/ppc/platforms/pmac_backlight.c16
-rw-r--r--arch/ppc/platforms/pmac_cpufreq.c36
-rw-r--r--arch/ppc/platforms/pmac_feature.c176
-rw-r--r--arch/ppc/platforms/pmac_nvram.c42
-rw-r--r--arch/ppc/platforms/pmac_pci.c22
-rw-r--r--arch/ppc/platforms/pmac_pic.c26
-rw-r--r--arch/ppc/platforms/pmac_setup.c12
-rw-r--r--arch/ppc/platforms/pmac_smp.c10
-rw-r--r--arch/ppc/platforms/pmac_time.c8
-rw-r--r--arch/ppc/platforms/prep_pci.c64
-rw-r--r--arch/ppc/platforms/prep_setup.c44
-rw-r--r--arch/ppc/platforms/residual.c2
-rw-r--r--arch/ppc/syslib/btext.c6
-rw-r--r--arch/ppc/syslib/prep_nvram.c13
-rw-r--r--arch/ppc/syslib/prom.c18
-rw-r--r--arch/ppc64/Kconfig2
-rw-r--r--arch/ppc64/Makefile2
-rw-r--r--arch/ppc64/kernel/Makefile3
-rw-r--r--arch/ppc64/kernel/head.S2
-rw-r--r--arch/ppc64/kernel/iSeries_iommu.c1
-rw-r--r--arch/ppc64/kernel/iSeries_vio.c1
-rw-r--r--arch/ppc64/kernel/misc.S2
-rw-r--r--arch/ppc64/kernel/pSeries_iommu.c26
-rw-r--r--arch/ppc64/kernel/pSeries_lpar.c5
-rw-r--r--arch/ppc64/kernel/pSeries_vio.c1
-rw-r--r--arch/ppc64/kernel/pmac_feature.c60
-rw-r--r--arch/ppc64/kernel/pmac_nvram.c30
-rw-r--r--arch/ppc64/kernel/pmac_pci.c12
-rw-r--r--arch/ppc64/kernel/pmac_setup.c10
-rw-r--r--arch/ppc64/kernel/pmac_smp.c2
-rw-r--r--arch/ppc64/kernel/pmac_time.c4
-rw-r--r--arch/ppc64/kernel/time.c4
-rw-r--r--arch/ppc64/kernel/traps.c4
-rw-r--r--arch/ppc64/kernel/u3_iommu.c47
-rw-r--r--arch/ppc64/kernel/vecemu.c346
-rw-r--r--arch/ppc64/kernel/vmlinux.lds.S16
-rw-r--r--arch/ppc64/mm/hash_native.c13
-rw-r--r--arch/ppc64/mm/hash_utils.c21
-rw-r--r--arch/ppc64/mm/tlb.c25
-rw-r--r--arch/ppc64/oprofile/Kconfig23
-rw-r--r--arch/ppc64/oprofile/Makefile9
-rw-r--r--drivers/ide/ppc/pmac.c80
-rw-r--r--drivers/macintosh/ans-lcd.c10
-rw-r--r--drivers/macintosh/mediabay.c56
-rw-r--r--drivers/macintosh/via-cuda.c1
-rw-r--r--drivers/macintosh/via-pmu.c129
-rw-r--r--drivers/macintosh/via-pmu68k.c15
-rw-r--r--include/asm-powerpc/a.out.h (renamed from include/asm-ppc64/a.out.h)21
-rw-r--r--include/asm-powerpc/atomic.h (renamed from include/asm-ppc/atomic.h)45
-rw-r--r--include/asm-powerpc/auxvec.h (renamed from include/asm-ppc64/auxvec.h)8
-rw-r--r--include/asm-powerpc/bug.h (renamed from include/asm-ppc64/bug.h)38
-rw-r--r--include/asm-powerpc/dma.h (renamed from include/asm-ppc/dma.h)91
-rw-r--r--include/asm-powerpc/elf.h (renamed from include/asm-ppc64/elf.h)100
-rw-r--r--include/asm-powerpc/hardirq.h (renamed from include/asm-ppc/hardirq.h)15
-rw-r--r--include/asm-powerpc/hw_irq.h (renamed from include/asm-ppc64/hw_irq.h)65
-rw-r--r--include/asm-powerpc/kmap_types.h33
-rw-r--r--include/asm-powerpc/oprofile_impl.h (renamed from include/asm-ppc64/oprofile_impl.h)24
-rw-r--r--include/asm-powerpc/posix_types.h (renamed from include/asm-ppc64/posix_types.h)40
-rw-r--r--include/asm-powerpc/ppc_asm.h (renamed from include/asm-ppc/ppc_asm.h)208
-rw-r--r--include/asm-powerpc/rwsem.h (renamed from include/asm-ppc64/rwsem.h)18
-rw-r--r--include/asm-powerpc/seccomp.h (renamed from include/asm-ppc64/seccomp.h)11
-rw-r--r--include/asm-powerpc/sections.h (renamed from include/asm-ppc64/sections.h)21
-rw-r--r--include/asm-powerpc/semaphore.h (renamed from include/asm-ppc64/semaphore.h)6
-rw-r--r--include/asm-powerpc/spinlock_types.h (renamed from include/asm-ppc64/spinlock_types.h)4
-rw-r--r--include/asm-powerpc/statfs.h (renamed from include/asm-ppc64/statfs.h)19
-rw-r--r--include/asm-powerpc/synch.h51
-rw-r--r--include/asm-powerpc/vga.h (renamed from include/asm-ppc64/vga.h)20
-rw-r--r--include/asm-ppc/a.out.h26
-rw-r--r--include/asm-ppc/auxvec.h14
-rw-r--r--include/asm-ppc/bug.h58
-rw-r--r--include/asm-ppc/elf.h151
-rw-r--r--include/asm-ppc/hw_irq.h74
-rw-r--r--include/asm-ppc/io.h11
-rw-r--r--include/asm-ppc/irq.h6
-rw-r--r--include/asm-ppc/kmap_types.h25
-rw-r--r--include/asm-ppc/perfmon.h6
-rw-r--r--include/asm-ppc/posix_types.h111
-rw-r--r--include/asm-ppc/rwsem.h172
-rw-r--r--include/asm-ppc/seccomp.h10
-rw-r--r--include/asm-ppc/sections.h33
-rw-r--r--include/asm-ppc/semaphore.h111
-rw-r--r--include/asm-ppc/spinlock.h8
-rw-r--r--include/asm-ppc/spinlock_types.h20
-rw-r--r--include/asm-ppc/statfs.h8
-rw-r--r--include/asm-ppc/vga.h46
-rw-r--r--include/asm-ppc64/atomic.h197
-rw-r--r--include/asm-ppc64/bitops.h2
-rw-r--r--include/asm-ppc64/cputable.h6
-rw-r--r--include/asm-ppc64/dart.h59
-rw-r--r--include/asm-ppc64/dma.h329
-rw-r--r--include/asm-ppc64/futex.h2
-rw-r--r--include/asm-ppc64/hardirq.h27
-rw-r--r--include/asm-ppc64/io.h2
-rw-r--r--include/asm-ppc64/iommu.h36
-rw-r--r--include/asm-ppc64/kmap_types.h23
-rw-r--r--include/asm-ppc64/machdep.h5
-rw-r--r--include/asm-ppc64/memory.h61
-rw-r--r--include/asm-ppc64/mmu.h3
-rw-r--r--include/asm-ppc64/page.h8
-rw-r--r--include/asm-ppc64/ppc_asm.h242
-rw-r--r--include/asm-ppc64/processor.h8
-rw-r--r--include/asm-ppc64/system.h4
-rw-r--r--include/asm-ppc64/tce.h64
-rw-r--r--include/asm-ppc64/thread_info.h6
-rw-r--r--include/asm-ppc64/tlbflush.h7
134 files changed, 1355 insertions, 3497 deletions
diff --git a/arch/ppc/kernel/vecemu.c b/arch/powerpc/kernel/vecemu.c
index 604d0947cb20..604d0947cb20 100644
--- a/arch/ppc/kernel/vecemu.c
+++ b/arch/powerpc/kernel/vecemu.c
diff --git a/arch/ppc/oprofile/Kconfig b/arch/powerpc/oprofile/Kconfig
index 19d37730b664..19d37730b664 100644
--- a/arch/ppc/oprofile/Kconfig
+++ b/arch/powerpc/oprofile/Kconfig
diff --git a/arch/ppc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index e2218d32a4eb..0782d0cca89c 100644
--- a/arch/ppc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -7,8 +7,5 @@ DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
7 timer_int.o ) 7 timer_int.o )
8 8
9oprofile-y := $(DRIVER_OBJS) common.o 9oprofile-y := $(DRIVER_OBJS) common.o
10 10oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o
11ifeq ($(CONFIG_FSL_BOOKE),y) 11oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
12 oprofile-y += op_model_fsl_booke.o
13endif
14
diff --git a/arch/ppc64/oprofile/common.c b/arch/powerpc/oprofile/common.c
index e5f572710aa0..88b4118fd0c5 100644
--- a/arch/ppc64/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -1,5 +1,9 @@
1/* 1/*
2 * PPC 64 oprofile support:
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM 3 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
4 * PPC 32 oprofile support: (based on PPC 64 support)
5 * Copyright (C) Freescale Semiconductor, Inc 2004
6 * Author: Andy Fleming
3 * 7 *
4 * Based on alpha version. 8 * Based on alpha version.
5 * 9 *
@@ -10,26 +14,37 @@
10 */ 14 */
11 15
12#include <linux/oprofile.h> 16#include <linux/oprofile.h>
17#ifndef __powerpc64__
18#include <linux/slab.h>
19#endif /* ! __powerpc64__ */
13#include <linux/init.h> 20#include <linux/init.h>
14#include <linux/smp.h> 21#include <linux/smp.h>
15#include <linux/errno.h> 22#include <linux/errno.h>
16#include <asm/ptrace.h> 23#include <asm/ptrace.h>
17#include <asm/system.h> 24#include <asm/system.h>
25#ifdef __powerpc64__
18#include <asm/pmc.h> 26#include <asm/pmc.h>
27#else /* __powerpc64__ */
28#include <asm/perfmon.h>
29#endif /* __powerpc64__ */
19#include <asm/cputable.h> 30#include <asm/cputable.h>
20#include <asm/oprofile_impl.h> 31#include <asm/oprofile_impl.h>
21 32
22static struct op_ppc64_model *model; 33static struct op_powerpc_model *model;
23 34
24static struct op_counter_config ctr[OP_MAX_COUNTER]; 35static struct op_counter_config ctr[OP_MAX_COUNTER];
25static struct op_system_config sys; 36static struct op_system_config sys;
26 37
38#ifndef __powerpc64__
39static char *cpu_type;
40#endif /* ! __powerpc64__ */
41
27static void op_handle_interrupt(struct pt_regs *regs) 42static void op_handle_interrupt(struct pt_regs *regs)
28{ 43{
29 model->handle_interrupt(regs, ctr); 44 model->handle_interrupt(regs, ctr);
30} 45}
31 46
32static int op_ppc64_setup(void) 47static int op_powerpc_setup(void)
33{ 48{
34 int err; 49 int err;
35 50
@@ -42,41 +57,49 @@ static int op_ppc64_setup(void)
42 model->reg_setup(ctr, &sys, model->num_counters); 57 model->reg_setup(ctr, &sys, model->num_counters);
43 58
44 /* Configure the registers on all cpus. */ 59 /* Configure the registers on all cpus. */
60#ifdef __powerpc64__
45 on_each_cpu(model->cpu_setup, NULL, 0, 1); 61 on_each_cpu(model->cpu_setup, NULL, 0, 1);
62#else /* __powerpc64__ */
63#if 0
64 /* FIXME: Make multi-cpu work */
65 on_each_cpu(model->reg_setup, NULL, 0, 1);
66#endif
67#endif /* __powerpc64__ */
46 68
47 return 0; 69 return 0;
48} 70}
49 71
50static void op_ppc64_shutdown(void) 72static void op_powerpc_shutdown(void)
51{ 73{
52 release_pmc_hardware(); 74 release_pmc_hardware();
53} 75}
54 76
55static void op_ppc64_cpu_start(void *dummy) 77static void op_powerpc_cpu_start(void *dummy)
56{ 78{
57 model->start(ctr); 79 model->start(ctr);
58} 80}
59 81
60static int op_ppc64_start(void) 82static int op_powerpc_start(void)
61{ 83{
62 on_each_cpu(op_ppc64_cpu_start, NULL, 0, 1); 84 on_each_cpu(op_powerpc_cpu_start, NULL, 0, 1);
63 return 0; 85 return 0;
64} 86}
65 87
66static inline void op_ppc64_cpu_stop(void *dummy) 88static inline void op_powerpc_cpu_stop(void *dummy)
67{ 89{
68 model->stop(); 90 model->stop();
69} 91}
70 92
71static void op_ppc64_stop(void) 93static void op_powerpc_stop(void)
72{ 94{
73 on_each_cpu(op_ppc64_cpu_stop, NULL, 0, 1); 95 on_each_cpu(op_powerpc_cpu_stop, NULL, 0, 1);
74} 96}
75 97
76static int op_ppc64_create_files(struct super_block *sb, struct dentry *root) 98static int op_powerpc_create_files(struct super_block *sb, struct dentry *root)
77{ 99{
78 int i; 100 int i;
79 101
102#ifdef __powerpc64__
80 /* 103 /*
81 * There is one mmcr0, mmcr1 and mmcra for setting the events for 104 * There is one mmcr0, mmcr1 and mmcra for setting the events for
82 * all of the counters. 105 * all of the counters.
@@ -84,6 +107,7 @@ static int op_ppc64_create_files(struct super_block *sb, struct dentry *root)
84 oprofilefs_create_ulong(sb, root, "mmcr0", &sys.mmcr0); 107 oprofilefs_create_ulong(sb, root, "mmcr0", &sys.mmcr0);
85 oprofilefs_create_ulong(sb, root, "mmcr1", &sys.mmcr1); 108 oprofilefs_create_ulong(sb, root, "mmcr1", &sys.mmcr1);
86 oprofilefs_create_ulong(sb, root, "mmcra", &sys.mmcra); 109 oprofilefs_create_ulong(sb, root, "mmcra", &sys.mmcra);
110#endif /* __powerpc64__ */
87 111
88 for (i = 0; i < model->num_counters; ++i) { 112 for (i = 0; i < model->num_counters; ++i) {
89 struct dentry *dir; 113 struct dentry *dir;
@@ -95,44 +119,72 @@ static int op_ppc64_create_files(struct super_block *sb, struct dentry *root)
95 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); 119 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
96 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); 120 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
97 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); 121 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
122#ifdef __powerpc64__
98 /* 123 /*
99 * We dont support per counter user/kernel selection, but 124 * We dont support per counter user/kernel selection, but
100 * we leave the entries because userspace expects them 125 * we leave the entries because userspace expects them
101 */ 126 */
127#endif /* __powerpc64__ */
102 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); 128 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
103 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); 129 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
130
131#ifndef __powerpc64__
132 /* FIXME: Not sure if this is used */
133#endif /* ! __powerpc64__ */
104 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask); 134 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
105 } 135 }
106 136
107 oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel); 137 oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel);
108 oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user); 138 oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user);
139#ifdef __powerpc64__
109 oprofilefs_create_ulong(sb, root, "backtrace_spinlocks", 140 oprofilefs_create_ulong(sb, root, "backtrace_spinlocks",
110 &sys.backtrace_spinlocks); 141 &sys.backtrace_spinlocks);
142#endif /* __powerpc64__ */
111 143
112 /* Default to tracing both kernel and user */ 144 /* Default to tracing both kernel and user */
113 sys.enable_kernel = 1; 145 sys.enable_kernel = 1;
114 sys.enable_user = 1; 146 sys.enable_user = 1;
115 147#ifdef __powerpc64__
116 /* Turn on backtracing through spinlocks by default */ 148 /* Turn on backtracing through spinlocks by default */
117 sys.backtrace_spinlocks = 1; 149 sys.backtrace_spinlocks = 1;
150#endif /* __powerpc64__ */
118 151
119 return 0; 152 return 0;
120} 153}
121 154
122int __init oprofile_arch_init(struct oprofile_operations *ops) 155int __init oprofile_arch_init(struct oprofile_operations *ops)
123{ 156{
157#ifndef __powerpc64__
158 int cpu_id = smp_processor_id();
159
160#ifdef CONFIG_FSL_BOOKE
161 model = &op_model_fsl_booke;
162#else
163 return -ENODEV;
164#endif
165
166 cpu_type = kmalloc(32, GFP_KERNEL);
167 if (NULL == cpu_type)
168 return -ENOMEM;
169
170 sprintf(cpu_type, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name);
171
172 model->num_counters = cur_cpu_spec[cpu_id]->num_pmcs;
173
174 ops->cpu_type = cpu_type;
175#else /* __powerpc64__ */
124 if (!cur_cpu_spec->oprofile_model || !cur_cpu_spec->oprofile_cpu_type) 176 if (!cur_cpu_spec->oprofile_model || !cur_cpu_spec->oprofile_cpu_type)
125 return -ENODEV; 177 return -ENODEV;
126
127 model = cur_cpu_spec->oprofile_model; 178 model = cur_cpu_spec->oprofile_model;
128 model->num_counters = cur_cpu_spec->num_pmcs; 179 model->num_counters = cur_cpu_spec->num_pmcs;
129 180
130 ops->cpu_type = cur_cpu_spec->oprofile_cpu_type; 181 ops->cpu_type = cur_cpu_spec->oprofile_cpu_type;
131 ops->create_files = op_ppc64_create_files; 182#endif /* __powerpc64__ */
132 ops->setup = op_ppc64_setup; 183 ops->create_files = op_powerpc_create_files;
133 ops->shutdown = op_ppc64_shutdown; 184 ops->setup = op_powerpc_setup;
134 ops->start = op_ppc64_start; 185 ops->shutdown = op_powerpc_shutdown;
135 ops->stop = op_ppc64_stop; 186 ops->start = op_powerpc_start;
187 ops->stop = op_powerpc_stop;
136 188
137 printk(KERN_INFO "oprofile: using %s performance monitoring.\n", 189 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
138 ops->cpu_type); 190 ops->cpu_type);
@@ -142,4 +194,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
142 194
143void oprofile_arch_exit(void) 195void oprofile_arch_exit(void)
144{ 196{
197#ifndef __powerpc64__
198 kfree(cpu_type);
199 cpu_type = NULL;
200#endif /* ! __powerpc64__ */
145} 201}
diff --git a/arch/ppc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c
index fc9c859358c6..1917f8df8a8b 100644
--- a/arch/ppc/oprofile/op_model_fsl_booke.c
+++ b/arch/powerpc/oprofile/op_model_fsl_booke.c
@@ -25,8 +25,7 @@
25#include <asm/reg_booke.h> 25#include <asm/reg_booke.h>
26#include <asm/page.h> 26#include <asm/page.h>
27#include <asm/perfmon.h> 27#include <asm/perfmon.h>
28 28#include <asm/oprofile_impl.h>
29#include "op_impl.h"
30 29
31static unsigned long reset_value[OP_MAX_COUNTER]; 30static unsigned long reset_value[OP_MAX_COUNTER];
32 31
@@ -176,7 +175,7 @@ static void fsl_booke_handle_interrupt(struct pt_regs *regs,
176 pmc_start_ctrs(1); 175 pmc_start_ctrs(1);
177} 176}
178 177
179struct op_ppc32_model op_model_fsl_booke = { 178struct op_powerpc_model op_model_fsl_booke = {
180 .reg_setup = fsl_booke_reg_setup, 179 .reg_setup = fsl_booke_reg_setup,
181 .start = fsl_booke_start, 180 .start = fsl_booke_start,
182 .stop = fsl_booke_stop, 181 .stop = fsl_booke_stop,
diff --git a/arch/ppc64/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 32b2bb5625fe..886449315847 100644
--- a/arch/ppc64/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -300,7 +300,7 @@ static void power4_handle_interrupt(struct pt_regs *regs,
300 mtspr(SPRN_MMCR0, mmcr0); 300 mtspr(SPRN_MMCR0, mmcr0);
301} 301}
302 302
303struct op_ppc64_model op_model_power4 = { 303struct op_powerpc_model op_model_power4 = {
304 .reg_setup = power4_reg_setup, 304 .reg_setup = power4_reg_setup,
305 .cpu_setup = power4_cpu_setup, 305 .cpu_setup = power4_cpu_setup,
306 .start = power4_start, 306 .start = power4_start,
diff --git a/arch/ppc64/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c
index 08c5b333f5c4..e010b85996e8 100644
--- a/arch/ppc64/oprofile/op_model_rs64.c
+++ b/arch/powerpc/oprofile/op_model_rs64.c
@@ -209,7 +209,7 @@ static void rs64_handle_interrupt(struct pt_regs *regs,
209 mtspr(SPRN_MMCR0, mmcr0); 209 mtspr(SPRN_MMCR0, mmcr0);
210} 210}
211 211
212struct op_ppc64_model op_model_rs64 = { 212struct op_powerpc_model op_model_rs64 = {
213 .reg_setup = rs64_reg_setup, 213 .reg_setup = rs64_reg_setup,
214 .cpu_setup = rs64_cpu_setup, 214 .cpu_setup = rs64_cpu_setup,
215 .start = rs64_start, 215 .start = rs64_start,
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 776941c75672..ed9c9727d75f 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -747,12 +747,12 @@ config CPM2
747 on it (826x, 827x, 8560). 747 on it (826x, 827x, 8560).
748 748
749config PPC_CHRP 749config PPC_CHRP
750 bool 750 bool " Common Hardware Reference Platform (CHRP) based machines"
751 depends on PPC_MULTIPLATFORM 751 depends on PPC_MULTIPLATFORM
752 default y 752 default y
753 753
754config PPC_PMAC 754config PPC_PMAC
755 bool 755 bool " Apple PowerMac based machines"
756 depends on PPC_MULTIPLATFORM 756 depends on PPC_MULTIPLATFORM
757 default y 757 default y
758 758
@@ -762,7 +762,7 @@ config PPC_PMAC64
762 default y 762 default y
763 763
764config PPC_PREP 764config PPC_PREP
765 bool 765 bool " PowerPC Reference Platform (PReP) based machines"
766 depends on PPC_MULTIPLATFORM 766 depends on PPC_MULTIPLATFORM
767 default y 767 default y
768 768
@@ -1368,7 +1368,7 @@ endmenu
1368 1368
1369source "lib/Kconfig" 1369source "lib/Kconfig"
1370 1370
1371source "arch/ppc/oprofile/Kconfig" 1371source "arch/powerpc/oprofile/Kconfig"
1372 1372
1373source "arch/ppc/Kconfig.debug" 1373source "arch/ppc/Kconfig.debug"
1374 1374
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 16e2675f3270..90c750227ed9 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -71,7 +71,7 @@ drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
71drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/ 71drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/
72drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/ 72drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/
73 73
74drivers-$(CONFIG_OPROFILE) += arch/ppc/oprofile/ 74drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
75 75
76BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm 76BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
77 77
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index b1457a8a9c0f..ce166e3de53b 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -35,3 +35,5 @@ ifndef CONFIG_MATH_EMULATION
35obj-$(CONFIG_8xx) += softemu8xx.o 35obj-$(CONFIG_8xx) += softemu8xx.o
36endif 36endif
37 37
38# These are here while we do the architecture merge
39vecemu-y += ../../powerpc/kernel/vecemu.o
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index 1960fb8c259c..d05509f197d0 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -804,7 +804,7 @@ load_up_altivec:
804 beq 1f 804 beq 1f
805 add r4,r4,r6 805 add r4,r4,r6
806 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ 806 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */
807 SAVE_32VR(0,r10,r4) 807 SAVE_32VRS(0,r10,r4)
808 mfvscr vr0 808 mfvscr vr0
809 li r10,THREAD_VSCR 809 li r10,THREAD_VSCR
810 stvx vr0,r10,r4 810 stvx vr0,r10,r4
@@ -824,7 +824,7 @@ load_up_altivec:
824 stw r4,THREAD_USED_VR(r5) 824 stw r4,THREAD_USED_VR(r5)
825 lvx vr0,r10,r5 825 lvx vr0,r10,r5
826 mtvscr vr0 826 mtvscr vr0
827 REST_32VR(0,r10,r5) 827 REST_32VRS(0,r10,r5)
828#ifndef CONFIG_SMP 828#ifndef CONFIG_SMP
829 subi r4,r5,THREAD 829 subi r4,r5,THREAD
830 sub r4,r4,r6 830 sub r4,r4,r6
@@ -870,7 +870,7 @@ giveup_altivec:
870 addi r3,r3,THREAD /* want THREAD of task */ 870 addi r3,r3,THREAD /* want THREAD of task */
871 lwz r5,PT_REGS(r3) 871 lwz r5,PT_REGS(r3)
872 cmpwi 0,r5,0 872 cmpwi 0,r5,0
873 SAVE_32VR(0, r4, r3) 873 SAVE_32VRS(0, r4, r3)
874 mfvscr vr0 874 mfvscr vr0
875 li r4,THREAD_VSCR 875 li r4,THREAD_VSCR
876 stvx vr0,r4,r3 876 stvx vr0,r4,r3
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index 8e52e8408316..eba5a5f8ff08 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -853,7 +853,7 @@ load_up_spe:
853 cmpi 0,r4,0 853 cmpi 0,r4,0
854 beq 1f 854 beq 1f
855 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */ 855 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
856 SAVE_32EVR(0,r10,r4) 856 SAVE_32EVRS(0,r10,r4)
857 evxor evr10, evr10, evr10 /* clear out evr10 */ 857 evxor evr10, evr10, evr10 /* clear out evr10 */
858 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */ 858 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
859 li r5,THREAD_ACC 859 li r5,THREAD_ACC
@@ -873,7 +873,7 @@ load_up_spe:
873 stw r4,THREAD_USED_SPE(r5) 873 stw r4,THREAD_USED_SPE(r5)
874 evlddx evr4,r10,r5 874 evlddx evr4,r10,r5
875 evmra evr4,evr4 875 evmra evr4,evr4
876 REST_32EVR(0,r10,r5) 876 REST_32EVRS(0,r10,r5)
877#ifndef CONFIG_SMP 877#ifndef CONFIG_SMP
878 subi r4,r5,THREAD 878 subi r4,r5,THREAD
879 stw r4,last_task_used_spe@l(r3) 879 stw r4,last_task_used_spe@l(r3)
@@ -963,7 +963,7 @@ _GLOBAL(giveup_spe)
963 addi r3,r3,THREAD /* want THREAD of task */ 963 addi r3,r3,THREAD /* want THREAD of task */
964 lwz r5,PT_REGS(r3) 964 lwz r5,PT_REGS(r3)
965 cmpi 0,r5,0 965 cmpi 0,r5,0
966 SAVE_32EVR(0, r4, r3) 966 SAVE_32EVRS(0, r4, r3)
967 evxor evr6, evr6, evr6 /* clear out evr6 */ 967 evxor evr6, evr6, evr6 /* clear out evr6 */
968 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */ 968 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
969 li r4,THREAD_ACC 969 li r4,THREAD_ACC
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 90d917d2e856..9d2cb79475c6 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -273,134 +273,6 @@ _GLOBAL(low_choose_7447a_dfs)
273 273
274#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ 274#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
275 275
276/* void local_save_flags_ptr(unsigned long *flags) */
277_GLOBAL(local_save_flags_ptr)
278 mfmsr r4
279 stw r4,0(r3)
280 blr
281 /*
282 * Need these nops here for taking over save/restore to
283 * handle lost intrs
284 * -- Cort
285 */
286 nop
287 nop
288 nop
289 nop
290 nop
291 nop
292 nop
293 nop
294 nop
295 nop
296 nop
297 nop
298 nop
299 nop
300 nop
301 nop
302 nop
303_GLOBAL(local_save_flags_ptr_end)
304
305/* void local_irq_restore(unsigned long flags) */
306_GLOBAL(local_irq_restore)
307/*
308 * Just set/clear the MSR_EE bit through restore/flags but do not
309 * change anything else. This is needed by the RT system and makes
310 * sense anyway.
311 * -- Cort
312 */
313 mfmsr r4
314 /* Copy all except the MSR_EE bit from r4 (current MSR value)
315 to r3. This is the sort of thing the rlwimi instruction is
316 designed for. -- paulus. */
317 rlwimi r3,r4,0,17,15
318 /* Check if things are setup the way we want _already_. */
319 cmpw 0,r3,r4
320 beqlr
3211: SYNC
322 mtmsr r3
323 SYNC
324 blr
325 nop
326 nop
327 nop
328 nop
329 nop
330 nop
331 nop
332 nop
333 nop
334 nop
335 nop
336 nop
337 nop
338 nop
339 nop
340 nop
341 nop
342 nop
343 nop
344_GLOBAL(local_irq_restore_end)
345
346_GLOBAL(local_irq_disable)
347 mfmsr r0 /* Get current interrupt state */
348 rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */
349 rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
350 SYNC /* Some chip revs have problems here... */
351 mtmsr r0 /* Update machine state */
352 blr /* Done */
353 /*
354 * Need these nops here for taking over save/restore to
355 * handle lost intrs
356 * -- Cort
357 */
358 nop
359 nop
360 nop
361 nop
362 nop
363 nop
364 nop
365 nop
366 nop
367 nop
368 nop
369 nop
370 nop
371 nop
372 nop
373_GLOBAL(local_irq_disable_end)
374
375_GLOBAL(local_irq_enable)
376 mfmsr r3 /* Get current state */
377 ori r3,r3,MSR_EE /* Turn on 'EE' bit */
378 SYNC /* Some chip revs have problems here... */
379 mtmsr r3 /* Update machine state */
380 blr
381 /*
382 * Need these nops here for taking over save/restore to
383 * handle lost intrs
384 * -- Cort
385 */
386 nop
387 nop
388 nop
389 nop
390 nop
391 nop
392 nop
393 nop
394 nop
395 nop
396 nop
397 nop
398 nop
399 nop
400 nop
401 nop
402_GLOBAL(local_irq_enable_end)
403
404/* 276/*
405 * complement mask on the msr then "or" some values on. 277 * complement mask on the msr then "or" some values on.
406 * _nmask_and_or_msr(nmask, value_to_or) 278 * _nmask_and_or_msr(nmask, value_to_or)
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 854e45beb387..2d3c557538b5 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -644,7 +644,7 @@ pcibios_alloc_controller(void)
644/* 644/*
645 * Functions below are used on OpenFirmware machines. 645 * Functions below are used on OpenFirmware machines.
646 */ 646 */
647static void __openfirmware 647static void
648make_one_node_map(struct device_node* node, u8 pci_bus) 648make_one_node_map(struct device_node* node, u8 pci_bus)
649{ 649{
650 int *bus_range; 650 int *bus_range;
@@ -678,7 +678,7 @@ make_one_node_map(struct device_node* node, u8 pci_bus)
678 } 678 }
679} 679}
680 680
681void __openfirmware 681void
682pcibios_make_OF_bus_map(void) 682pcibios_make_OF_bus_map(void)
683{ 683{
684 int i; 684 int i;
@@ -720,7 +720,7 @@ pcibios_make_OF_bus_map(void)
720 720
721typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); 721typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
722 722
723static struct device_node* __openfirmware 723static struct device_node*
724scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data) 724scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data)
725{ 725{
726 struct device_node* sub_node; 726 struct device_node* sub_node;
@@ -761,7 +761,7 @@ scan_OF_pci_childs_iterator(struct device_node* node, void* data)
761 return 0; 761 return 0;
762} 762}
763 763
764static struct device_node* __openfirmware 764static struct device_node*
765scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn) 765scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn)
766{ 766{
767 u8 filter_data[2] = {bus, dev_fn}; 767 u8 filter_data[2] = {bus, dev_fn};
@@ -842,7 +842,7 @@ pci_find_hose_for_OF_device(struct device_node* node)
842 return NULL; 842 return NULL;
843} 843}
844 844
845static int __openfirmware 845static int
846find_OF_pci_device_filter(struct device_node* node, void* data) 846find_OF_pci_device_filter(struct device_node* node, void* data)
847{ 847{
848 return ((void *)node == data); 848 return ((void *)node == data);
diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c
index 04c18788e85f..f9b27d939f76 100644
--- a/arch/ppc/kernel/perfmon.c
+++ b/arch/ppc/kernel/perfmon.c
@@ -65,7 +65,7 @@ void (*perf_irq)(struct pt_regs *) = dummy_perf;
65 65
66/* Grab the interrupt, if it's free. 66/* Grab the interrupt, if it's free.
67 * Returns 0 on success, -1 if the interrupt is taken already */ 67 * Returns 0 on success, -1 if the interrupt is taken already */
68int request_perfmon_irq(void (*handler)(struct pt_regs *)) 68int reserve_pmc_hardware(void (*handler)(struct pt_regs *))
69{ 69{
70 int err = 0; 70 int err = 0;
71 71
@@ -75,7 +75,7 @@ int request_perfmon_irq(void (*handler)(struct pt_regs *))
75 perf_irq = handler; 75 perf_irq = handler;
76 else { 76 else {
77 pr_info("perfmon irq already handled by %p\n", perf_irq); 77 pr_info("perfmon irq already handled by %p\n", perf_irq);
78 err = -1; 78 err = -EBUSY;
79 } 79 }
80 80
81 spin_unlock(&perfmon_lock); 81 spin_unlock(&perfmon_lock);
@@ -83,7 +83,7 @@ int request_perfmon_irq(void (*handler)(struct pt_regs *))
83 return err; 83 return err;
84} 84}
85 85
86void free_perfmon_irq(void) 86void release_pmc_hardware(void)
87{ 87{
88 spin_lock(&perfmon_lock); 88 spin_lock(&perfmon_lock);
89 89
@@ -93,5 +93,5 @@ void free_perfmon_irq(void)
93} 93}
94 94
95EXPORT_SYMBOL(perf_irq); 95EXPORT_SYMBOL(perf_irq);
96EXPORT_SYMBOL(request_perfmon_irq); 96EXPORT_SYMBOL(reserve_pmc_hardware);
97EXPORT_SYMBOL(free_perfmon_irq); 97EXPORT_SYMBOL(release_pmc_hardware);
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 88f6bb7b6964..1545621d44d2 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -272,16 +272,6 @@ EXPORT_SYMBOL(screen_info);
272#endif 272#endif
273 273
274EXPORT_SYMBOL(__delay); 274EXPORT_SYMBOL(__delay);
275#ifndef INLINE_IRQS
276EXPORT_SYMBOL(local_irq_enable);
277EXPORT_SYMBOL(local_irq_enable_end);
278EXPORT_SYMBOL(local_irq_disable);
279EXPORT_SYMBOL(local_irq_disable_end);
280EXPORT_SYMBOL(local_save_flags_ptr);
281EXPORT_SYMBOL(local_save_flags_ptr_end);
282EXPORT_SYMBOL(local_irq_restore);
283EXPORT_SYMBOL(local_irq_restore_end);
284#endif
285EXPORT_SYMBOL(timer_interrupt); 275EXPORT_SYMBOL(timer_interrupt);
286EXPORT_SYMBOL(irq_desc); 276EXPORT_SYMBOL(irq_desc);
287EXPORT_SYMBOL(tb_ticks_per_jiffy); 277EXPORT_SYMBOL(tb_ticks_per_jiffy);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 545cfd0fab59..77fecfbabe88 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md;
71unsigned long boot_mem_size; 71unsigned long boot_mem_size;
72 72
73unsigned long ISA_DMA_THRESHOLD; 73unsigned long ISA_DMA_THRESHOLD;
74unsigned long DMA_MODE_READ, DMA_MODE_WRITE; 74unsigned int DMA_MODE_READ;
75unsigned int DMA_MODE_WRITE;
75 76
76#ifdef CONFIG_PPC_MULTIPLATFORM 77#ifdef CONFIG_PPC_MULTIPLATFORM
77int _machine = 0; 78int _machine = 0;
@@ -339,7 +340,7 @@ early_init(int r3, int r4, int r5)
339 * Assume here that all clock rates are the same in a 340 * Assume here that all clock rates are the same in a
340 * smp system. -- Cort 341 * smp system. -- Cort
341 */ 342 */
342int __openfirmware 343int
343of_show_percpuinfo(struct seq_file *m, int i) 344of_show_percpuinfo(struct seq_file *m, int i)
344{ 345{
345 struct device_node *cpu_node; 346 struct device_node *cpu_node;
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 961ede87be72..82e4d70e6dbb 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -575,7 +575,7 @@ extern struct bug_entry __start___bug_table[], __stop___bug_table[];
575#define module_find_bug(x) NULL 575#define module_find_bug(x) NULL
576#endif 576#endif
577 577
578static struct bug_entry *find_bug(unsigned long bugaddr) 578struct bug_entry *find_bug(unsigned long bugaddr)
579{ 579{
580 struct bug_entry *bug; 580 struct bug_entry *bug;
581 581
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S
index 17d2db7e537d..09c6525cfa61 100644
--- a/arch/ppc/kernel/vmlinux.lds.S
+++ b/arch/ppc/kernel/vmlinux.lds.S
@@ -149,32 +149,6 @@ SECTIONS
149 149
150 . = ALIGN(4096); 150 . = ALIGN(4096);
151 _sextratext = .; 151 _sextratext = .;
152 __pmac_begin = .;
153 .pmac.text : { *(.pmac.text) }
154 .pmac.data : { *(.pmac.data) }
155 . = ALIGN(4096);
156 __pmac_end = .;
157
158 . = ALIGN(4096);
159 __prep_begin = .;
160 .prep.text : { *(.prep.text) }
161 .prep.data : { *(.prep.data) }
162 . = ALIGN(4096);
163 __prep_end = .;
164
165 . = ALIGN(4096);
166 __chrp_begin = .;
167 .chrp.text : { *(.chrp.text) }
168 .chrp.data : { *(.chrp.data) }
169 . = ALIGN(4096);
170 __chrp_end = .;
171
172 . = ALIGN(4096);
173 __openfirmware_begin = .;
174 .openfirmware.text : { *(.openfirmware.text) }
175 .openfirmware.data : { *(.openfirmware.data) }
176 . = ALIGN(4096);
177 __openfirmware_end = .;
178 _eextratext = .; 152 _eextratext = .;
179 153
180 __bss_start = .; 154 __bss_start = .;
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index f421a4b337f6..5e9ef23b4671 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -74,10 +74,6 @@ unsigned long agp_special_page;
74extern char _end[]; 74extern char _end[];
75extern char etext[], _stext[]; 75extern char etext[], _stext[];
76extern char __init_begin, __init_end; 76extern char __init_begin, __init_end;
77extern char __prep_begin, __prep_end;
78extern char __chrp_begin, __chrp_end;
79extern char __pmac_begin, __pmac_end;
80extern char __openfirmware_begin, __openfirmware_end;
81 77
82#ifdef CONFIG_HIGHMEM 78#ifdef CONFIG_HIGHMEM
83pte_t *kmap_pte; 79pte_t *kmap_pte;
@@ -167,14 +163,6 @@ void free_initmem(void)
167 163
168 printk ("Freeing unused kernel memory:"); 164 printk ("Freeing unused kernel memory:");
169 FREESEC(init); 165 FREESEC(init);
170 if (_machine != _MACH_Pmac)
171 FREESEC(pmac);
172 if (_machine != _MACH_chrp)
173 FREESEC(chrp);
174 if (_machine != _MACH_prep)
175 FREESEC(prep);
176 if (!have_of)
177 FREESEC(openfirmware);
178 printk("\n"); 166 printk("\n");
179 ppc_md.progress = NULL; 167 ppc_md.progress = NULL;
180#undef FREESEC 168#undef FREESEC
diff --git a/arch/ppc/oprofile/common.c b/arch/ppc/oprofile/common.c
deleted file mode 100644
index 3169c67abea7..000000000000
--- a/arch/ppc/oprofile/common.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/*
2 * PPC 32 oprofile support
3 * Based on PPC64 oprofile support
4 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
5 *
6 * Copyright (C) Freescale Semiconductor, Inc 2004
7 *
8 * Author: Andy Fleming
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/oprofile.h>
17#include <linux/slab.h>
18#include <linux/init.h>
19#include <linux/smp.h>
20#include <linux/errno.h>
21#include <asm/ptrace.h>
22#include <asm/system.h>
23#include <asm/perfmon.h>
24#include <asm/cputable.h>
25
26#include "op_impl.h"
27
28static struct op_ppc32_model *model;
29
30static struct op_counter_config ctr[OP_MAX_COUNTER];
31static struct op_system_config sys;
32
33static void op_handle_interrupt(struct pt_regs *regs)
34{
35 model->handle_interrupt(regs, ctr);
36}
37
38static int op_ppc32_setup(void)
39{
40 /* Install our interrupt handler into the existing hook. */
41 if(request_perfmon_irq(&op_handle_interrupt))
42 return -EBUSY;
43
44 mb();
45
46 /* Pre-compute the values to stuff in the hardware registers. */
47 model->reg_setup(ctr, &sys, model->num_counters);
48
49#if 0
50 /* FIXME: Make multi-cpu work */
51 /* Configure the registers on all cpus. */
52 on_each_cpu(model->reg_setup, NULL, 0, 1);
53#endif
54
55 return 0;
56}
57
58static void op_ppc32_shutdown(void)
59{
60 mb();
61
62 /* Remove our interrupt handler. We may be removing this module. */
63 free_perfmon_irq();
64}
65
66static void op_ppc32_cpu_start(void *dummy)
67{
68 model->start(ctr);
69}
70
71static int op_ppc32_start(void)
72{
73 on_each_cpu(op_ppc32_cpu_start, NULL, 0, 1);
74 return 0;
75}
76
77static inline void op_ppc32_cpu_stop(void *dummy)
78{
79 model->stop();
80}
81
82static void op_ppc32_stop(void)
83{
84 on_each_cpu(op_ppc32_cpu_stop, NULL, 0, 1);
85}
86
87static int op_ppc32_create_files(struct super_block *sb, struct dentry *root)
88{
89 int i;
90
91 for (i = 0; i < model->num_counters; ++i) {
92 struct dentry *dir;
93 char buf[3];
94
95 snprintf(buf, sizeof buf, "%d", i);
96 dir = oprofilefs_mkdir(sb, root, buf);
97
98 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
99 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
100 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
101 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
102 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
103
104 /* FIXME: Not sure if this is used */
105 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
106 }
107
108 oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel);
109 oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user);
110
111 /* Default to tracing both kernel and user */
112 sys.enable_kernel = 1;
113 sys.enable_user = 1;
114
115 return 0;
116}
117
118static struct oprofile_operations oprof_ppc32_ops = {
119 .create_files = op_ppc32_create_files,
120 .setup = op_ppc32_setup,
121 .shutdown = op_ppc32_shutdown,
122 .start = op_ppc32_start,
123 .stop = op_ppc32_stop,
124 .cpu_type = NULL /* To be filled in below. */
125};
126
127int __init oprofile_arch_init(struct oprofile_operations *ops)
128{
129 char *name;
130 int cpu_id = smp_processor_id();
131
132#ifdef CONFIG_FSL_BOOKE
133 model = &op_model_fsl_booke;
134#else
135 return -ENODEV;
136#endif
137
138 name = kmalloc(32, GFP_KERNEL);
139
140 if (NULL == name)
141 return -ENOMEM;
142
143 sprintf(name, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name);
144
145 oprof_ppc32_ops.cpu_type = name;
146
147 model->num_counters = cur_cpu_spec[cpu_id]->num_pmcs;
148
149 *ops = oprof_ppc32_ops;
150
151 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
152 oprof_ppc32_ops.cpu_type);
153
154 return 0;
155}
156
157void oprofile_arch_exit(void)
158{
159 kfree(oprof_ppc32_ops.cpu_type);
160 oprof_ppc32_ops.cpu_type = NULL;
161}
diff --git a/arch/ppc/oprofile/op_impl.h b/arch/ppc/oprofile/op_impl.h
deleted file mode 100644
index bc336dc971e3..000000000000
--- a/arch/ppc/oprofile/op_impl.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
3 *
4 * Based on alpha version.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef OP_IMPL_H
13#define OP_IMPL_H 1
14
15#define OP_MAX_COUNTER 8
16
17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config {
19 unsigned long enabled;
20 unsigned long event;
21 unsigned long count;
22 unsigned long kernel;
23 unsigned long user;
24 unsigned long unit_mask;
25};
26
27/* System-wide configuration as set via oprofilefs. */
28struct op_system_config {
29 unsigned long enable_kernel;
30 unsigned long enable_user;
31};
32
33/* Per-arch configuration */
34struct op_ppc32_model {
35 void (*reg_setup) (struct op_counter_config *,
36 struct op_system_config *,
37 int num_counters);
38 void (*start) (struct op_counter_config *);
39 void (*stop) (void);
40 void (*handle_interrupt) (struct pt_regs *,
41 struct op_counter_config *);
42 int num_counters;
43};
44
45#endif /* OP_IMPL_H */
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index 1584cd77a9ef..58e44c042535 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -19,7 +19,6 @@
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/seq_file.h>
23#include <syslib/ppc83xx_setup.h> 22#include <syslib/ppc83xx_setup.h>
24#include <asm/ppcboot.h> 23#include <asm/ppcboot.h>
25 24
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
index 3875e839cff7..84acf6e8d45e 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
@@ -19,7 +19,6 @@
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/seq_file.h>
23#include <asm/ppcboot.h> 22#include <asm/ppcboot.h>
24 23
25#define BOARD_CCSRBAR ((uint)0xe0000000) 24#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
index 7bcc6c35a417..95fdf4b0680b 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -21,7 +21,6 @@
21 21
22#include <linux/config.h> 22#include <linux/config.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/seq_file.h>
25#include <asm/ppcboot.h> 24#include <asm/ppcboot.h>
26 25
27#define BOARD_CCSRBAR ((uint)0xe0000000) 26#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 7d3fbb5c5db2..f12192cc4d42 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -29,7 +29,7 @@ void __iomem *gg2_pci_config_base;
29 * limit the bus number to 3 bits 29 * limit the bus number to 3 bits
30 */ 30 */
31 31
32int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, 32int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
33 int len, u32 *val) 33 int len, u32 *val)
34{ 34{
35 volatile void __iomem *cfg_data; 35 volatile void __iomem *cfg_data;
@@ -56,7 +56,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
56 return PCIBIOS_SUCCESSFUL; 56 return PCIBIOS_SUCCESSFUL;
57} 57}
58 58
59int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, 59int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
60 int len, u32 val) 60 int len, u32 val)
61{ 61{
62 volatile void __iomem *cfg_data; 62 volatile void __iomem *cfg_data;
@@ -92,7 +92,7 @@ static struct pci_ops gg2_pci_ops =
92/* 92/*
93 * Access functions for PCI config space using RTAS calls. 93 * Access functions for PCI config space using RTAS calls.
94 */ 94 */
95int __chrp 95int
96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
97 int len, u32 *val) 97 int len, u32 *val)
98{ 98{
@@ -108,7 +108,7 @@ rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL; 108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
109} 109}
110 110
111int __chrp 111int
112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
113 int len, u32 val) 113 int len, u32 val)
114{ 114{
diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c
index 57f29ab29bda..47b154c27617 100644
--- a/arch/ppc/platforms/chrp_setup.c
+++ b/arch/ppc/platforms/chrp_setup.c
@@ -105,7 +105,7 @@ static const char *gg2_cachemodes[4] = {
105 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" 105 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
106}; 106};
107 107
108int __chrp 108int
109chrp_show_cpuinfo(struct seq_file *m) 109chrp_show_cpuinfo(struct seq_file *m)
110{ 110{
111 int i, sdramen; 111 int i, sdramen;
@@ -303,7 +303,7 @@ void __init chrp_setup_arch(void)
303 pci_create_OF_bus_map(); 303 pci_create_OF_bus_map();
304} 304}
305 305
306void __chrp 306void
307chrp_event_scan(void) 307chrp_event_scan(void)
308{ 308{
309 unsigned char log[1024]; 309 unsigned char log[1024];
@@ -314,7 +314,7 @@ chrp_event_scan(void)
314 ppc_md.heartbeat_count = ppc_md.heartbeat_reset; 314 ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
315} 315}
316 316
317void __chrp 317void
318chrp_restart(char *cmd) 318chrp_restart(char *cmd)
319{ 319{
320 printk("RTAS system-reboot returned %d\n", 320 printk("RTAS system-reboot returned %d\n",
@@ -322,7 +322,7 @@ chrp_restart(char *cmd)
322 for (;;); 322 for (;;);
323} 323}
324 324
325void __chrp 325void
326chrp_power_off(void) 326chrp_power_off(void)
327{ 327{
328 /* allow power on only with power button press */ 328 /* allow power on only with power button press */
@@ -331,13 +331,13 @@ chrp_power_off(void)
331 for (;;); 331 for (;;);
332} 332}
333 333
334void __chrp 334void
335chrp_halt(void) 335chrp_halt(void)
336{ 336{
337 chrp_power_off(); 337 chrp_power_off();
338} 338}
339 339
340u_int __chrp 340u_int
341chrp_irq_canonicalize(u_int irq) 341chrp_irq_canonicalize(u_int irq)
342{ 342{
343 if (irq == 2) 343 if (irq == 2)
@@ -572,7 +572,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
572 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); 572 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
573} 573}
574 574
575void __chrp 575void
576rtas_display_progress(char *s, unsigned short hex) 576rtas_display_progress(char *s, unsigned short hex)
577{ 577{
578 int width; 578 int width;
@@ -599,7 +599,7 @@ rtas_display_progress(char *s, unsigned short hex)
599 call_rtas( "display-character", 1, 1, NULL, ' ' ); 599 call_rtas( "display-character", 1, 1, NULL, ' ' );
600} 600}
601 601
602void __chrp 602void
603rtas_indicator_progress(char *s, unsigned short hex) 603rtas_indicator_progress(char *s, unsigned short hex)
604{ 604{
605 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex); 605 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c
index 0ea1f7d9e46a..dc62e3209443 100644
--- a/arch/ppc/platforms/chrp_smp.c
+++ b/arch/ppc/platforms/chrp_smp.c
@@ -88,7 +88,7 @@ smp_chrp_take_timebase(void)
88} 88}
89 89
90/* CHRP with openpic */ 90/* CHRP with openpic */
91struct smp_ops_t chrp_smp_ops __chrpdata = { 91struct smp_ops_t chrp_smp_ops = {
92 .message_pass = smp_openpic_message_pass, 92 .message_pass = smp_openpic_message_pass,
93 .probe = smp_chrp_probe, 93 .probe = smp_chrp_probe,
94 .kick_cpu = smp_chrp_kick_cpu, 94 .kick_cpu = smp_chrp_kick_cpu,
diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c
index 6037ce7796f5..29d074c305f0 100644
--- a/arch/ppc/platforms/chrp_time.c
+++ b/arch/ppc/platforms/chrp_time.c
@@ -52,7 +52,7 @@ long __init chrp_time_init(void)
52 return 0; 52 return 0;
53} 53}
54 54
55int __chrp chrp_cmos_clock_read(int addr) 55int chrp_cmos_clock_read(int addr)
56{ 56{
57 if (nvram_as1 != 0) 57 if (nvram_as1 != 0)
58 outb(addr>>8, nvram_as1); 58 outb(addr>>8, nvram_as1);
@@ -60,7 +60,7 @@ int __chrp chrp_cmos_clock_read(int addr)
60 return (inb(nvram_data)); 60 return (inb(nvram_data));
61} 61}
62 62
63void __chrp chrp_cmos_clock_write(unsigned long val, int addr) 63void chrp_cmos_clock_write(unsigned long val, int addr)
64{ 64{
65 if (nvram_as1 != 0) 65 if (nvram_as1 != 0)
66 outb(addr>>8, nvram_as1); 66 outb(addr>>8, nvram_as1);
@@ -72,7 +72,7 @@ void __chrp chrp_cmos_clock_write(unsigned long val, int addr)
72/* 72/*
73 * Set the hardware clock. -- Cort 73 * Set the hardware clock. -- Cort
74 */ 74 */
75int __chrp chrp_set_rtc_time(unsigned long nowtime) 75int chrp_set_rtc_time(unsigned long nowtime)
76{ 76{
77 unsigned char save_control, save_freq_select; 77 unsigned char save_control, save_freq_select;
78 struct rtc_time tm; 78 struct rtc_time tm;
@@ -118,7 +118,7 @@ int __chrp chrp_set_rtc_time(unsigned long nowtime)
118 return 0; 118 return 0;
119} 119}
120 120
121unsigned long __chrp chrp_get_rtc_time(void) 121unsigned long chrp_get_rtc_time(void)
122{ 122{
123 unsigned int year, mon, day, hour, min, sec; 123 unsigned int year, mon, day, hour, min, sec;
124 int uip, i; 124 int uip, i;
diff --git a/arch/ppc/platforms/pmac_backlight.c b/arch/ppc/platforms/pmac_backlight.c
index ed2b1cebc19a..8be2f7d071f0 100644
--- a/arch/ppc/platforms/pmac_backlight.c
+++ b/arch/ppc/platforms/pmac_backlight.c
@@ -37,7 +37,7 @@ static int backlight_req_enable = -1;
37static void backlight_callback(void *); 37static void backlight_callback(void *);
38static DECLARE_WORK(backlight_work, backlight_callback, NULL); 38static DECLARE_WORK(backlight_work, backlight_callback, NULL);
39 39
40void __pmac register_backlight_controller(struct backlight_controller *ctrler, 40void register_backlight_controller(struct backlight_controller *ctrler,
41 void *data, char *type) 41 void *data, char *type)
42{ 42{
43 struct device_node* bk_node; 43 struct device_node* bk_node;
@@ -99,7 +99,7 @@ void __pmac register_backlight_controller(struct backlight_controller *ctrler,
99} 99}
100EXPORT_SYMBOL(register_backlight_controller); 100EXPORT_SYMBOL(register_backlight_controller);
101 101
102void __pmac unregister_backlight_controller(struct backlight_controller 102void unregister_backlight_controller(struct backlight_controller
103 *ctrler, void *data) 103 *ctrler, void *data)
104{ 104{
105 /* We keep the current backlight level (for now) */ 105 /* We keep the current backlight level (for now) */
@@ -108,7 +108,7 @@ void __pmac unregister_backlight_controller(struct backlight_controller
108} 108}
109EXPORT_SYMBOL(unregister_backlight_controller); 109EXPORT_SYMBOL(unregister_backlight_controller);
110 110
111static int __pmac __set_backlight_enable(int enable) 111static int __set_backlight_enable(int enable)
112{ 112{
113 int rc; 113 int rc;
114 114
@@ -122,7 +122,7 @@ static int __pmac __set_backlight_enable(int enable)
122 release_console_sem(); 122 release_console_sem();
123 return rc; 123 return rc;
124} 124}
125int __pmac set_backlight_enable(int enable) 125int set_backlight_enable(int enable)
126{ 126{
127 if (!backlighter) 127 if (!backlighter)
128 return -ENODEV; 128 return -ENODEV;
@@ -133,7 +133,7 @@ int __pmac set_backlight_enable(int enable)
133 133
134EXPORT_SYMBOL(set_backlight_enable); 134EXPORT_SYMBOL(set_backlight_enable);
135 135
136int __pmac get_backlight_enable(void) 136int get_backlight_enable(void)
137{ 137{
138 if (!backlighter) 138 if (!backlighter)
139 return -ENODEV; 139 return -ENODEV;
@@ -141,7 +141,7 @@ int __pmac get_backlight_enable(void)
141} 141}
142EXPORT_SYMBOL(get_backlight_enable); 142EXPORT_SYMBOL(get_backlight_enable);
143 143
144static int __pmac __set_backlight_level(int level) 144static int __set_backlight_level(int level)
145{ 145{
146 int rc = 0; 146 int rc = 0;
147 147
@@ -165,7 +165,7 @@ static int __pmac __set_backlight_level(int level)
165 } 165 }
166 return rc; 166 return rc;
167} 167}
168int __pmac set_backlight_level(int level) 168int set_backlight_level(int level)
169{ 169{
170 if (!backlighter) 170 if (!backlighter)
171 return -ENODEV; 171 return -ENODEV;
@@ -176,7 +176,7 @@ int __pmac set_backlight_level(int level)
176 176
177EXPORT_SYMBOL(set_backlight_level); 177EXPORT_SYMBOL(set_backlight_level);
178 178
179int __pmac get_backlight_level(void) 179int get_backlight_level(void)
180{ 180{
181 if (!backlighter) 181 if (!backlighter)
182 return -ENODEV; 182 return -ENODEV;
diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
index c0605244edda..ebb8be9bf8aa 100644
--- a/arch/ppc/platforms/pmac_cpufreq.c
+++ b/arch/ppc/platforms/pmac_cpufreq.c
@@ -136,7 +136,7 @@ static inline void debug_calc_bogomips(void)
136 136
137/* Switch CPU speed under 750FX CPU control 137/* Switch CPU speed under 750FX CPU control
138 */ 138 */
139static int __pmac cpu_750fx_cpu_speed(int low_speed) 139static int cpu_750fx_cpu_speed(int low_speed)
140{ 140{
141 u32 hid2; 141 u32 hid2;
142 142
@@ -172,7 +172,7 @@ static int __pmac cpu_750fx_cpu_speed(int low_speed)
172 return 0; 172 return 0;
173} 173}
174 174
175static unsigned int __pmac cpu_750fx_get_cpu_speed(void) 175static unsigned int cpu_750fx_get_cpu_speed(void)
176{ 176{
177 if (mfspr(SPRN_HID1) & HID1_PS) 177 if (mfspr(SPRN_HID1) & HID1_PS)
178 return low_freq; 178 return low_freq;
@@ -181,7 +181,7 @@ static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
181} 181}
182 182
183/* Switch CPU speed using DFS */ 183/* Switch CPU speed using DFS */
184static int __pmac dfs_set_cpu_speed(int low_speed) 184static int dfs_set_cpu_speed(int low_speed)
185{ 185{
186 if (low_speed == 0) { 186 if (low_speed == 0) {
187 /* ramping up, set voltage first */ 187 /* ramping up, set voltage first */
@@ -205,7 +205,7 @@ static int __pmac dfs_set_cpu_speed(int low_speed)
205 return 0; 205 return 0;
206} 206}
207 207
208static unsigned int __pmac dfs_get_cpu_speed(void) 208static unsigned int dfs_get_cpu_speed(void)
209{ 209{
210 if (mfspr(SPRN_HID1) & HID1_DFS) 210 if (mfspr(SPRN_HID1) & HID1_DFS)
211 return low_freq; 211 return low_freq;
@@ -216,7 +216,7 @@ static unsigned int __pmac dfs_get_cpu_speed(void)
216 216
217/* Switch CPU speed using slewing GPIOs 217/* Switch CPU speed using slewing GPIOs
218 */ 218 */
219static int __pmac gpios_set_cpu_speed(int low_speed) 219static int gpios_set_cpu_speed(int low_speed)
220{ 220{
221 int gpio, timeout = 0; 221 int gpio, timeout = 0;
222 222
@@ -258,7 +258,7 @@ static int __pmac gpios_set_cpu_speed(int low_speed)
258 258
259/* Switch CPU speed under PMU control 259/* Switch CPU speed under PMU control
260 */ 260 */
261static int __pmac pmu_set_cpu_speed(int low_speed) 261static int pmu_set_cpu_speed(int low_speed)
262{ 262{
263 struct adb_request req; 263 struct adb_request req;
264 unsigned long save_l2cr; 264 unsigned long save_l2cr;
@@ -354,7 +354,7 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
354 return 0; 354 return 0;
355} 355}
356 356
357static int __pmac do_set_cpu_speed(int speed_mode, int notify) 357static int do_set_cpu_speed(int speed_mode, int notify)
358{ 358{
359 struct cpufreq_freqs freqs; 359 struct cpufreq_freqs freqs;
360 unsigned long l3cr; 360 unsigned long l3cr;
@@ -391,17 +391,17 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
391 return 0; 391 return 0;
392} 392}
393 393
394static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu) 394static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
395{ 395{
396 return cur_freq; 396 return cur_freq;
397} 397}
398 398
399static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy) 399static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
400{ 400{
401 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs); 401 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
402} 402}
403 403
404static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy, 404static int pmac_cpufreq_target( struct cpufreq_policy *policy,
405 unsigned int target_freq, 405 unsigned int target_freq,
406 unsigned int relation) 406 unsigned int relation)
407{ 407{
@@ -414,13 +414,13 @@ static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
414 return do_set_cpu_speed(newstate, 1); 414 return do_set_cpu_speed(newstate, 1);
415} 415}
416 416
417unsigned int __pmac pmac_get_one_cpufreq(int i) 417unsigned int pmac_get_one_cpufreq(int i)
418{ 418{
419 /* Supports only one CPU for now */ 419 /* Supports only one CPU for now */
420 return (i == 0) ? cur_freq : 0; 420 return (i == 0) ? cur_freq : 0;
421} 421}
422 422
423static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) 423static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
424{ 424{
425 if (policy->cpu != 0) 425 if (policy->cpu != 0)
426 return -ENODEV; 426 return -ENODEV;
@@ -433,7 +433,7 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs); 433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
434} 434}
435 435
436static u32 __pmac read_gpio(struct device_node *np) 436static u32 read_gpio(struct device_node *np)
437{ 437{
438 u32 *reg = (u32 *)get_property(np, "reg", NULL); 438 u32 *reg = (u32 *)get_property(np, "reg", NULL);
439 u32 offset; 439 u32 offset;
@@ -452,7 +452,7 @@ static u32 __pmac read_gpio(struct device_node *np)
452 return offset; 452 return offset;
453} 453}
454 454
455static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg) 455static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
456{ 456{
457 /* Ok, this could be made a bit smarter, but let's be robust for now. We 457 /* Ok, this could be made a bit smarter, but let's be robust for now. We
458 * always force a speed change to high speed before sleep, to make sure 458 * always force a speed change to high speed before sleep, to make sure
@@ -468,7 +468,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message
468 return 0; 468 return 0;
469} 469}
470 470
471static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy) 471static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
472{ 472{
473 /* If we resume, first check if we have a get() function */ 473 /* If we resume, first check if we have a get() function */
474 if (get_speed_proc) 474 if (get_speed_proc)
@@ -501,7 +501,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
501}; 501};
502 502
503 503
504static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) 504static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
505{ 505{
506 struct device_node *volt_gpio_np = of_find_node_by_name(NULL, 506 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
507 "voltage-gpio"); 507 "voltage-gpio");
@@ -593,7 +593,7 @@ static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
593 return 0; 593 return 0;
594} 594}
595 595
596static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode) 596static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
597{ 597{
598 struct device_node *volt_gpio_np; 598 struct device_node *volt_gpio_np;
599 599
@@ -620,7 +620,7 @@ static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
620 return 0; 620 return 0;
621} 621}
622 622
623static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode) 623static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
624{ 624{
625 struct device_node *volt_gpio_np; 625 struct device_node *volt_gpio_np;
626 u32 pvr, *value; 626 u32 pvr, *value;
diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c
index 867336ad5d36..e8cd0a8b6a76 100644
--- a/arch/ppc/platforms/pmac_feature.c
+++ b/arch/ppc/platforms/pmac_feature.c
@@ -63,7 +63,7 @@ extern struct device_node *k2_skiplist[2];
63 * We use a single global lock to protect accesses. Each driver has 63 * We use a single global lock to protect accesses. Each driver has
64 * to take care of its own locking 64 * to take care of its own locking
65 */ 65 */
66static DEFINE_SPINLOCK(feature_lock __pmacdata); 66static DEFINE_SPINLOCK(feature_lock);
67 67
68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
@@ -72,9 +72,9 @@ static DEFINE_SPINLOCK(feature_lock __pmacdata);
72/* 72/*
73 * Instance of some macio stuffs 73 * Instance of some macio stuffs
74 */ 74 */
75struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata; 75struct macio_chip macio_chips[MAX_MACIO_CHIPS];
76 76
77struct macio_chip* __pmac macio_find(struct device_node* child, int type) 77struct macio_chip* macio_find(struct device_node* child, int type)
78{ 78{
79 while(child) { 79 while(child) {
80 int i; 80 int i;
@@ -89,7 +89,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type)
89} 89}
90EXPORT_SYMBOL_GPL(macio_find); 90EXPORT_SYMBOL_GPL(macio_find);
91 91
92static const char* macio_names[] __pmacdata = 92static const char* macio_names[] =
93{ 93{
94 "Unknown", 94 "Unknown",
95 "Grand Central", 95 "Grand Central",
@@ -116,10 +116,10 @@ static const char* macio_names[] __pmacdata =
116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
118 118
119static struct device_node* uninorth_node __pmacdata; 119static struct device_node* uninorth_node;
120static u32 __iomem * uninorth_base __pmacdata; 120static u32 __iomem * uninorth_base;
121static u32 uninorth_rev __pmacdata; 121static u32 uninorth_rev;
122static int uninorth_u3 __pmacdata; 122static int uninorth_u3;
123static void __iomem *u3_ht; 123static void __iomem *u3_ht;
124 124
125/* 125/*
@@ -142,13 +142,13 @@ struct pmac_mb_def
142 struct feature_table_entry* features; 142 struct feature_table_entry* features;
143 unsigned long board_flags; 143 unsigned long board_flags;
144}; 144};
145static struct pmac_mb_def pmac_mb __pmacdata; 145static struct pmac_mb_def pmac_mb;
146 146
147/* 147/*
148 * Here are the chip specific feature functions 148 * Here are the chip specific feature functions
149 */ 149 */
150 150
151static inline int __pmac 151static inline int
152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value) 152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
153{ 153{
154 struct macio_chip* macio; 154 struct macio_chip* macio;
@@ -170,7 +170,7 @@ simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int
170 170
171#ifndef CONFIG_POWER4 171#ifndef CONFIG_POWER4
172 172
173static long __pmac 173static long
174ohare_htw_scc_enable(struct device_node* node, long param, long value) 174ohare_htw_scc_enable(struct device_node* node, long param, long value)
175{ 175{
176 struct macio_chip* macio; 176 struct macio_chip* macio;
@@ -263,21 +263,21 @@ ohare_htw_scc_enable(struct device_node* node, long param, long value)
263 return 0; 263 return 0;
264} 264}
265 265
266static long __pmac 266static long
267ohare_floppy_enable(struct device_node* node, long param, long value) 267ohare_floppy_enable(struct device_node* node, long param, long value)
268{ 268{
269 return simple_feature_tweak(node, macio_ohare, 269 return simple_feature_tweak(node, macio_ohare,
270 OHARE_FCR, OH_FLOPPY_ENABLE, value); 270 OHARE_FCR, OH_FLOPPY_ENABLE, value);
271} 271}
272 272
273static long __pmac 273static long
274ohare_mesh_enable(struct device_node* node, long param, long value) 274ohare_mesh_enable(struct device_node* node, long param, long value)
275{ 275{
276 return simple_feature_tweak(node, macio_ohare, 276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_MESH_ENABLE, value); 277 OHARE_FCR, OH_MESH_ENABLE, value);
278} 278}
279 279
280static long __pmac 280static long
281ohare_ide_enable(struct device_node* node, long param, long value) 281ohare_ide_enable(struct device_node* node, long param, long value)
282{ 282{
283 switch(param) { 283 switch(param) {
@@ -298,7 +298,7 @@ ohare_ide_enable(struct device_node* node, long param, long value)
298 } 298 }
299} 299}
300 300
301static long __pmac 301static long
302ohare_ide_reset(struct device_node* node, long param, long value) 302ohare_ide_reset(struct device_node* node, long param, long value)
303{ 303{
304 switch(param) { 304 switch(param) {
@@ -313,7 +313,7 @@ ohare_ide_reset(struct device_node* node, long param, long value)
313 } 313 }
314} 314}
315 315
316static long __pmac 316static long
317ohare_sleep_state(struct device_node* node, long param, long value) 317ohare_sleep_state(struct device_node* node, long param, long value)
318{ 318{
319 struct macio_chip* macio = &macio_chips[0]; 319 struct macio_chip* macio = &macio_chips[0];
@@ -329,7 +329,7 @@ ohare_sleep_state(struct device_node* node, long param, long value)
329 return 0; 329 return 0;
330} 330}
331 331
332static long __pmac 332static long
333heathrow_modem_enable(struct device_node* node, long param, long value) 333heathrow_modem_enable(struct device_node* node, long param, long value)
334{ 334{
335 struct macio_chip* macio; 335 struct macio_chip* macio;
@@ -373,7 +373,7 @@ heathrow_modem_enable(struct device_node* node, long param, long value)
373 return 0; 373 return 0;
374} 374}
375 375
376static long __pmac 376static long
377heathrow_floppy_enable(struct device_node* node, long param, long value) 377heathrow_floppy_enable(struct device_node* node, long param, long value)
378{ 378{
379 return simple_feature_tweak(node, macio_unknown, 379 return simple_feature_tweak(node, macio_unknown,
@@ -382,7 +382,7 @@ heathrow_floppy_enable(struct device_node* node, long param, long value)
382 value); 382 value);
383} 383}
384 384
385static long __pmac 385static long
386heathrow_mesh_enable(struct device_node* node, long param, long value) 386heathrow_mesh_enable(struct device_node* node, long param, long value)
387{ 387{
388 struct macio_chip* macio; 388 struct macio_chip* macio;
@@ -411,7 +411,7 @@ heathrow_mesh_enable(struct device_node* node, long param, long value)
411 return 0; 411 return 0;
412} 412}
413 413
414static long __pmac 414static long
415heathrow_ide_enable(struct device_node* node, long param, long value) 415heathrow_ide_enable(struct device_node* node, long param, long value)
416{ 416{
417 switch(param) { 417 switch(param) {
@@ -426,7 +426,7 @@ heathrow_ide_enable(struct device_node* node, long param, long value)
426 } 426 }
427} 427}
428 428
429static long __pmac 429static long
430heathrow_ide_reset(struct device_node* node, long param, long value) 430heathrow_ide_reset(struct device_node* node, long param, long value)
431{ 431{
432 switch(param) { 432 switch(param) {
@@ -441,7 +441,7 @@ heathrow_ide_reset(struct device_node* node, long param, long value)
441 } 441 }
442} 442}
443 443
444static long __pmac 444static long
445heathrow_bmac_enable(struct device_node* node, long param, long value) 445heathrow_bmac_enable(struct device_node* node, long param, long value)
446{ 446{
447 struct macio_chip* macio; 447 struct macio_chip* macio;
@@ -470,7 +470,7 @@ heathrow_bmac_enable(struct device_node* node, long param, long value)
470 return 0; 470 return 0;
471} 471}
472 472
473static long __pmac 473static long
474heathrow_sound_enable(struct device_node* node, long param, long value) 474heathrow_sound_enable(struct device_node* node, long param, long value)
475{ 475{
476 struct macio_chip* macio; 476 struct macio_chip* macio;
@@ -501,16 +501,16 @@ heathrow_sound_enable(struct device_node* node, long param, long value)
501 return 0; 501 return 0;
502} 502}
503 503
504static u32 save_fcr[6] __pmacdata; 504static u32 save_fcr[6];
505static u32 save_mbcr __pmacdata; 505static u32 save_mbcr;
506static u32 save_gpio_levels[2] __pmacdata; 506static u32 save_gpio_levels[2];
507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata; 507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata; 508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
509static u32 save_unin_clock_ctl __pmacdata; 509static u32 save_unin_clock_ctl;
510static struct dbdma_regs save_dbdma[13] __pmacdata; 510static struct dbdma_regs save_dbdma[13];
511static struct dbdma_regs save_alt_dbdma[13] __pmacdata; 511static struct dbdma_regs save_alt_dbdma[13];
512 512
513static void __pmac 513static void
514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) 514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
515{ 515{
516 int i; 516 int i;
@@ -527,7 +527,7 @@ dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
527 } 527 }
528} 528}
529 529
530static void __pmac 530static void
531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) 531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
532{ 532{
533 int i; 533 int i;
@@ -547,7 +547,7 @@ dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
547 } 547 }
548} 548}
549 549
550static void __pmac 550static void
551heathrow_sleep(struct macio_chip* macio, int secondary) 551heathrow_sleep(struct macio_chip* macio, int secondary)
552{ 552{
553 if (secondary) { 553 if (secondary) {
@@ -580,7 +580,7 @@ heathrow_sleep(struct macio_chip* macio, int secondary)
580 (void)MACIO_IN32(HEATHROW_FCR); 580 (void)MACIO_IN32(HEATHROW_FCR);
581} 581}
582 582
583static void __pmac 583static void
584heathrow_wakeup(struct macio_chip* macio, int secondary) 584heathrow_wakeup(struct macio_chip* macio, int secondary)
585{ 585{
586 if (secondary) { 586 if (secondary) {
@@ -605,7 +605,7 @@ heathrow_wakeup(struct macio_chip* macio, int secondary)
605 } 605 }
606} 606}
607 607
608static long __pmac 608static long
609heathrow_sleep_state(struct device_node* node, long param, long value) 609heathrow_sleep_state(struct device_node* node, long param, long value)
610{ 610{
611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
@@ -622,7 +622,7 @@ heathrow_sleep_state(struct device_node* node, long param, long value)
622 return 0; 622 return 0;
623} 623}
624 624
625static long __pmac 625static long
626core99_scc_enable(struct device_node* node, long param, long value) 626core99_scc_enable(struct device_node* node, long param, long value)
627{ 627{
628 struct macio_chip* macio; 628 struct macio_chip* macio;
@@ -723,7 +723,7 @@ core99_scc_enable(struct device_node* node, long param, long value)
723 return 0; 723 return 0;
724} 724}
725 725
726static long __pmac 726static long
727core99_modem_enable(struct device_node* node, long param, long value) 727core99_modem_enable(struct device_node* node, long param, long value)
728{ 728{
729 struct macio_chip* macio; 729 struct macio_chip* macio;
@@ -775,7 +775,7 @@ core99_modem_enable(struct device_node* node, long param, long value)
775 return 0; 775 return 0;
776} 776}
777 777
778static long __pmac 778static long
779pangea_modem_enable(struct device_node* node, long param, long value) 779pangea_modem_enable(struct device_node* node, long param, long value)
780{ 780{
781 struct macio_chip* macio; 781 struct macio_chip* macio;
@@ -830,7 +830,7 @@ pangea_modem_enable(struct device_node* node, long param, long value)
830 return 0; 830 return 0;
831} 831}
832 832
833static long __pmac 833static long
834core99_ata100_enable(struct device_node* node, long value) 834core99_ata100_enable(struct device_node* node, long value)
835{ 835{
836 unsigned long flags; 836 unsigned long flags;
@@ -860,7 +860,7 @@ core99_ata100_enable(struct device_node* node, long value)
860 return 0; 860 return 0;
861} 861}
862 862
863static long __pmac 863static long
864core99_ide_enable(struct device_node* node, long param, long value) 864core99_ide_enable(struct device_node* node, long param, long value)
865{ 865{
866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
@@ -883,7 +883,7 @@ core99_ide_enable(struct device_node* node, long param, long value)
883 } 883 }
884} 884}
885 885
886static long __pmac 886static long
887core99_ide_reset(struct device_node* node, long param, long value) 887core99_ide_reset(struct device_node* node, long param, long value)
888{ 888{
889 switch(param) { 889 switch(param) {
@@ -901,7 +901,7 @@ core99_ide_reset(struct device_node* node, long param, long value)
901 } 901 }
902} 902}
903 903
904static long __pmac 904static long
905core99_gmac_enable(struct device_node* node, long param, long value) 905core99_gmac_enable(struct device_node* node, long param, long value)
906{ 906{
907 unsigned long flags; 907 unsigned long flags;
@@ -918,7 +918,7 @@ core99_gmac_enable(struct device_node* node, long param, long value)
918 return 0; 918 return 0;
919} 919}
920 920
921static long __pmac 921static long
922core99_gmac_phy_reset(struct device_node* node, long param, long value) 922core99_gmac_phy_reset(struct device_node* node, long param, long value)
923{ 923{
924 unsigned long flags; 924 unsigned long flags;
@@ -943,7 +943,7 @@ core99_gmac_phy_reset(struct device_node* node, long param, long value)
943 return 0; 943 return 0;
944} 944}
945 945
946static long __pmac 946static long
947core99_sound_chip_enable(struct device_node* node, long param, long value) 947core99_sound_chip_enable(struct device_node* node, long param, long value)
948{ 948{
949 struct macio_chip* macio; 949 struct macio_chip* macio;
@@ -973,7 +973,7 @@ core99_sound_chip_enable(struct device_node* node, long param, long value)
973 return 0; 973 return 0;
974} 974}
975 975
976static long __pmac 976static long
977core99_airport_enable(struct device_node* node, long param, long value) 977core99_airport_enable(struct device_node* node, long param, long value)
978{ 978{
979 struct macio_chip* macio; 979 struct macio_chip* macio;
@@ -1060,7 +1060,7 @@ core99_airport_enable(struct device_node* node, long param, long value)
1060} 1060}
1061 1061
1062#ifdef CONFIG_SMP 1062#ifdef CONFIG_SMP
1063static long __pmac 1063static long
1064core99_reset_cpu(struct device_node* node, long param, long value) 1064core99_reset_cpu(struct device_node* node, long param, long value)
1065{ 1065{
1066 unsigned int reset_io = 0; 1066 unsigned int reset_io = 0;
@@ -1104,7 +1104,7 @@ core99_reset_cpu(struct device_node* node, long param, long value)
1104} 1104}
1105#endif /* CONFIG_SMP */ 1105#endif /* CONFIG_SMP */
1106 1106
1107static long __pmac 1107static long
1108core99_usb_enable(struct device_node* node, long param, long value) 1108core99_usb_enable(struct device_node* node, long param, long value)
1109{ 1109{
1110 struct macio_chip* macio; 1110 struct macio_chip* macio;
@@ -1257,7 +1257,7 @@ core99_usb_enable(struct device_node* node, long param, long value)
1257 return 0; 1257 return 0;
1258} 1258}
1259 1259
1260static long __pmac 1260static long
1261core99_firewire_enable(struct device_node* node, long param, long value) 1261core99_firewire_enable(struct device_node* node, long param, long value)
1262{ 1262{
1263 unsigned long flags; 1263 unsigned long flags;
@@ -1284,7 +1284,7 @@ core99_firewire_enable(struct device_node* node, long param, long value)
1284 return 0; 1284 return 0;
1285} 1285}
1286 1286
1287static long __pmac 1287static long
1288core99_firewire_cable_power(struct device_node* node, long param, long value) 1288core99_firewire_cable_power(struct device_node* node, long param, long value)
1289{ 1289{
1290 unsigned long flags; 1290 unsigned long flags;
@@ -1315,7 +1315,7 @@ core99_firewire_cable_power(struct device_node* node, long param, long value)
1315 return 0; 1315 return 0;
1316} 1316}
1317 1317
1318static long __pmac 1318static long
1319intrepid_aack_delay_enable(struct device_node* node, long param, long value) 1319intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1320{ 1320{
1321 unsigned long flags; 1321 unsigned long flags;
@@ -1336,7 +1336,7 @@ intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1336 1336
1337#endif /* CONFIG_POWER4 */ 1337#endif /* CONFIG_POWER4 */
1338 1338
1339static long __pmac 1339static long
1340core99_read_gpio(struct device_node* node, long param, long value) 1340core99_read_gpio(struct device_node* node, long param, long value)
1341{ 1341{
1342 struct macio_chip* macio = &macio_chips[0]; 1342 struct macio_chip* macio = &macio_chips[0];
@@ -1345,7 +1345,7 @@ core99_read_gpio(struct device_node* node, long param, long value)
1345} 1345}
1346 1346
1347 1347
1348static long __pmac 1348static long
1349core99_write_gpio(struct device_node* node, long param, long value) 1349core99_write_gpio(struct device_node* node, long param, long value)
1350{ 1350{
1351 struct macio_chip* macio = &macio_chips[0]; 1351 struct macio_chip* macio = &macio_chips[0];
@@ -1356,7 +1356,7 @@ core99_write_gpio(struct device_node* node, long param, long value)
1356 1356
1357#ifdef CONFIG_POWER4 1357#ifdef CONFIG_POWER4
1358 1358
1359static long __pmac 1359static long
1360g5_gmac_enable(struct device_node* node, long param, long value) 1360g5_gmac_enable(struct device_node* node, long param, long value)
1361{ 1361{
1362 struct macio_chip* macio = &macio_chips[0]; 1362 struct macio_chip* macio = &macio_chips[0];
@@ -1380,7 +1380,7 @@ g5_gmac_enable(struct device_node* node, long param, long value)
1380 return 0; 1380 return 0;
1381} 1381}
1382 1382
1383static long __pmac 1383static long
1384g5_fw_enable(struct device_node* node, long param, long value) 1384g5_fw_enable(struct device_node* node, long param, long value)
1385{ 1385{
1386 struct macio_chip* macio = &macio_chips[0]; 1386 struct macio_chip* macio = &macio_chips[0];
@@ -1403,7 +1403,7 @@ g5_fw_enable(struct device_node* node, long param, long value)
1403 return 0; 1403 return 0;
1404} 1404}
1405 1405
1406static long __pmac 1406static long
1407g5_mpic_enable(struct device_node* node, long param, long value) 1407g5_mpic_enable(struct device_node* node, long param, long value)
1408{ 1408{
1409 unsigned long flags; 1409 unsigned long flags;
@@ -1419,7 +1419,7 @@ g5_mpic_enable(struct device_node* node, long param, long value)
1419} 1419}
1420 1420
1421#ifdef CONFIG_SMP 1421#ifdef CONFIG_SMP
1422static long __pmac 1422static long
1423g5_reset_cpu(struct device_node* node, long param, long value) 1423g5_reset_cpu(struct device_node* node, long param, long value)
1424{ 1424{
1425 unsigned int reset_io = 0; 1425 unsigned int reset_io = 0;
@@ -1465,7 +1465,7 @@ g5_reset_cpu(struct device_node* node, long param, long value)
1465 * This takes the second CPU off the bus on dual CPU machines 1465 * This takes the second CPU off the bus on dual CPU machines
1466 * running UP 1466 * running UP
1467 */ 1467 */
1468void __pmac g5_phy_disable_cpu1(void) 1468void g5_phy_disable_cpu1(void)
1469{ 1469{
1470 UN_OUT(U3_API_PHY_CONFIG_1, 0); 1470 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1471} 1471}
@@ -1474,7 +1474,7 @@ void __pmac g5_phy_disable_cpu1(void)
1474 1474
1475#ifndef CONFIG_POWER4 1475#ifndef CONFIG_POWER4
1476 1476
1477static void __pmac 1477static void
1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode) 1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1479{ 1479{
1480 u32 temp; 1480 u32 temp;
@@ -1528,7 +1528,7 @@ keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1529} 1529}
1530 1530
1531static void __pmac 1531static void
1532pangea_shutdown(struct macio_chip* macio, int sleep_mode) 1532pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1533{ 1533{
1534 u32 temp; 1534 u32 temp;
@@ -1562,7 +1562,7 @@ pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1563} 1563}
1564 1564
1565static void __pmac 1565static void
1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode) 1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1567{ 1567{
1568 u32 temp; 1568 u32 temp;
@@ -1591,7 +1591,7 @@ intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1591} 1591}
1592 1592
1593 1593
1594void __pmac pmac_tweak_clock_spreading(int enable) 1594void pmac_tweak_clock_spreading(int enable)
1595{ 1595{
1596 struct macio_chip* macio = &macio_chips[0]; 1596 struct macio_chip* macio = &macio_chips[0];
1597 1597
@@ -1698,7 +1698,7 @@ void __pmac pmac_tweak_clock_spreading(int enable)
1698} 1698}
1699 1699
1700 1700
1701static int __pmac 1701static int
1702core99_sleep(void) 1702core99_sleep(void)
1703{ 1703{
1704 struct macio_chip* macio; 1704 struct macio_chip* macio;
@@ -1791,7 +1791,7 @@ core99_sleep(void)
1791 return 0; 1791 return 0;
1792} 1792}
1793 1793
1794static int __pmac 1794static int
1795core99_wake_up(void) 1795core99_wake_up(void)
1796{ 1796{
1797 struct macio_chip* macio; 1797 struct macio_chip* macio;
@@ -1854,7 +1854,7 @@ core99_wake_up(void)
1854 return 0; 1854 return 0;
1855} 1855}
1856 1856
1857static long __pmac 1857static long
1858core99_sleep_state(struct device_node* node, long param, long value) 1858core99_sleep_state(struct device_node* node, long param, long value)
1859{ 1859{
1860 /* Param == 1 means to enter the "fake sleep" mode that is 1860 /* Param == 1 means to enter the "fake sleep" mode that is
@@ -1884,7 +1884,7 @@ core99_sleep_state(struct device_node* node, long param, long value)
1884 1884
1885#endif /* CONFIG_POWER4 */ 1885#endif /* CONFIG_POWER4 */
1886 1886
1887static long __pmac 1887static long
1888generic_dev_can_wake(struct device_node* node, long param, long value) 1888generic_dev_can_wake(struct device_node* node, long param, long value)
1889{ 1889{
1890 /* Todo: eventually check we are really dealing with on-board 1890 /* Todo: eventually check we are really dealing with on-board
@@ -1896,7 +1896,7 @@ generic_dev_can_wake(struct device_node* node, long param, long value)
1896 return 0; 1896 return 0;
1897} 1897}
1898 1898
1899static long __pmac 1899static long
1900generic_get_mb_info(struct device_node* node, long param, long value) 1900generic_get_mb_info(struct device_node* node, long param, long value)
1901{ 1901{
1902 switch(param) { 1902 switch(param) {
@@ -1919,7 +1919,7 @@ generic_get_mb_info(struct device_node* node, long param, long value)
1919 1919
1920/* Used on any machine 1920/* Used on any machine
1921 */ 1921 */
1922static struct feature_table_entry any_features[] __pmacdata = { 1922static struct feature_table_entry any_features[] = {
1923 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1923 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1924 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, 1924 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1925 { 0, NULL } 1925 { 0, NULL }
@@ -1931,7 +1931,7 @@ static struct feature_table_entry any_features[] __pmacdata = {
1931 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1931 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1932 * to have issues with turning on/off those asic cells 1932 * to have issues with turning on/off those asic cells
1933 */ 1933 */
1934static struct feature_table_entry ohare_features[] __pmacdata = { 1934static struct feature_table_entry ohare_features[] = {
1935 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1935 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1936 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1936 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1937 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1937 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
@@ -1945,7 +1945,7 @@ static struct feature_table_entry ohare_features[] __pmacdata = {
1945 * Separated as some features couldn't be properly tested 1945 * Separated as some features couldn't be properly tested
1946 * and the serial port control bits appear to confuse it. 1946 * and the serial port control bits appear to confuse it.
1947 */ 1947 */
1948static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { 1948static struct feature_table_entry heathrow_desktop_features[] = {
1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
@@ -1957,7 +1957,7 @@ static struct feature_table_entry heathrow_desktop_features[] __pmacdata = {
1957/* Heathrow based laptop, that is the Wallstreet and mainstreet 1957/* Heathrow based laptop, that is the Wallstreet and mainstreet
1958 * powerbooks. 1958 * powerbooks.
1959 */ 1959 */
1960static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { 1960static struct feature_table_entry heathrow_laptop_features[] = {
1961 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1961 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1962 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1962 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1963 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1963 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
@@ -1973,7 +1973,7 @@ static struct feature_table_entry heathrow_laptop_features[] __pmacdata = {
1973/* Paddington based machines 1973/* Paddington based machines
1974 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 1974 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1975 */ 1975 */
1976static struct feature_table_entry paddington_features[] __pmacdata = { 1976static struct feature_table_entry paddington_features[] = {
1977 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1977 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1978 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1978 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1979 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1979 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
@@ -1991,7 +1991,7 @@ static struct feature_table_entry paddington_features[] __pmacdata = {
1991 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 1991 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1992 * used on iBook2 & iMac "flow power". 1992 * used on iBook2 & iMac "flow power".
1993 */ 1993 */
1994static struct feature_table_entry core99_features[] __pmacdata = { 1994static struct feature_table_entry core99_features[] = {
1995 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1995 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1996 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 1996 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2014,7 +2014,7 @@ static struct feature_table_entry core99_features[] __pmacdata = {
2014 2014
2015/* RackMac 2015/* RackMac
2016 */ 2016 */
2017static struct feature_table_entry rackmac_features[] __pmacdata = { 2017static struct feature_table_entry rackmac_features[] = {
2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2019 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2019 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2020 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2020 { PMAC_FTR_IDE_RESET, core99_ide_reset },
@@ -2034,7 +2034,7 @@ static struct feature_table_entry rackmac_features[] __pmacdata = {
2034 2034
2035/* Pangea features 2035/* Pangea features
2036 */ 2036 */
2037static struct feature_table_entry pangea_features[] __pmacdata = { 2037static struct feature_table_entry pangea_features[] = {
2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2054,7 +2054,7 @@ static struct feature_table_entry pangea_features[] __pmacdata = {
2054 2054
2055/* Intrepid features 2055/* Intrepid features
2056 */ 2056 */
2057static struct feature_table_entry intrepid_features[] __pmacdata = { 2057static struct feature_table_entry intrepid_features[] = {
2058 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2058 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2059 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2059 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2060 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2060 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2077,7 +2077,7 @@ static struct feature_table_entry intrepid_features[] __pmacdata = {
2077 2077
2078/* G5 features 2078/* G5 features
2079 */ 2079 */
2080static struct feature_table_entry g5_features[] __pmacdata = { 2080static struct feature_table_entry g5_features[] = {
2081 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 2081 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2082 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 2082 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2083 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 2083 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
@@ -2091,7 +2091,7 @@ static struct feature_table_entry g5_features[] __pmacdata = {
2091 2091
2092#endif /* CONFIG_POWER4 */ 2092#endif /* CONFIG_POWER4 */
2093 2093
2094static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { 2094static struct pmac_mb_def pmac_mb_defs[] = {
2095#ifndef CONFIG_POWER4 2095#ifndef CONFIG_POWER4
2096 /* 2096 /*
2097 * Desktops 2097 * Desktops
@@ -2352,7 +2352,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
2352/* 2352/*
2353 * The toplevel feature_call callback 2353 * The toplevel feature_call callback
2354 */ 2354 */
2355long __pmac 2355long
2356pmac_do_feature_call(unsigned int selector, ...) 2356pmac_do_feature_call(unsigned int selector, ...)
2357{ 2357{
2358 struct device_node* node; 2358 struct device_node* node;
@@ -2935,8 +2935,8 @@ void __init pmac_check_ht_link(void)
2935 * Early video resume hook 2935 * Early video resume hook
2936 */ 2936 */
2937 2937
2938static void (*pmac_early_vresume_proc)(void *data) __pmacdata; 2938static void (*pmac_early_vresume_proc)(void *data);
2939static void *pmac_early_vresume_data __pmacdata; 2939static void *pmac_early_vresume_data;
2940 2940
2941void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 2941void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2942{ 2942{
@@ -2949,7 +2949,7 @@ void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2949} 2949}
2950EXPORT_SYMBOL(pmac_set_early_video_resume); 2950EXPORT_SYMBOL(pmac_set_early_video_resume);
2951 2951
2952void __pmac pmac_call_early_video_resume(void) 2952void pmac_call_early_video_resume(void)
2953{ 2953{
2954 if (pmac_early_vresume_proc) 2954 if (pmac_early_vresume_proc)
2955 pmac_early_vresume_proc(pmac_early_vresume_data); 2955 pmac_early_vresume_proc(pmac_early_vresume_data);
@@ -2959,11 +2959,11 @@ void __pmac pmac_call_early_video_resume(void)
2959 * AGP related suspend/resume code 2959 * AGP related suspend/resume code
2960 */ 2960 */
2961 2961
2962static struct pci_dev *pmac_agp_bridge __pmacdata; 2962static struct pci_dev *pmac_agp_bridge;
2963static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata; 2963static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2964static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata; 2964static int (*pmac_agp_resume)(struct pci_dev *bridge);
2965 2965
2966void __pmac pmac_register_agp_pm(struct pci_dev *bridge, 2966void pmac_register_agp_pm(struct pci_dev *bridge,
2967 int (*suspend)(struct pci_dev *bridge), 2967 int (*suspend)(struct pci_dev *bridge),
2968 int (*resume)(struct pci_dev *bridge)) 2968 int (*resume)(struct pci_dev *bridge))
2969{ 2969{
@@ -2980,7 +2980,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
2980} 2980}
2981EXPORT_SYMBOL(pmac_register_agp_pm); 2981EXPORT_SYMBOL(pmac_register_agp_pm);
2982 2982
2983void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) 2983void pmac_suspend_agp_for_card(struct pci_dev *dev)
2984{ 2984{
2985 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 2985 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
2986 return; 2986 return;
@@ -2990,7 +2990,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
2990} 2990}
2991EXPORT_SYMBOL(pmac_suspend_agp_for_card); 2991EXPORT_SYMBOL(pmac_suspend_agp_for_card);
2992 2992
2993void __pmac pmac_resume_agp_for_card(struct pci_dev *dev) 2993void pmac_resume_agp_for_card(struct pci_dev *dev)
2994{ 2994{
2995 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 2995 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
2996 return; 2996 return;
diff --git a/arch/ppc/platforms/pmac_nvram.c b/arch/ppc/platforms/pmac_nvram.c
index c9de64205996..8c9b008c7226 100644
--- a/arch/ppc/platforms/pmac_nvram.c
+++ b/arch/ppc/platforms/pmac_nvram.c
@@ -88,17 +88,17 @@ extern int system_running;
88static int (*core99_write_bank)(int bank, u8* datas); 88static int (*core99_write_bank)(int bank, u8* datas);
89static int (*core99_erase_bank)(int bank); 89static int (*core99_erase_bank)(int bank);
90 90
91static char *nvram_image __pmacdata; 91static char *nvram_image;
92 92
93 93
94static unsigned char __pmac core99_nvram_read_byte(int addr) 94static unsigned char core99_nvram_read_byte(int addr)
95{ 95{
96 if (nvram_image == NULL) 96 if (nvram_image == NULL)
97 return 0xff; 97 return 0xff;
98 return nvram_image[addr]; 98 return nvram_image[addr];
99} 99}
100 100
101static void __pmac core99_nvram_write_byte(int addr, unsigned char val) 101static void core99_nvram_write_byte(int addr, unsigned char val)
102{ 102{
103 if (nvram_image == NULL) 103 if (nvram_image == NULL)
104 return; 104 return;
@@ -106,18 +106,18 @@ static void __pmac core99_nvram_write_byte(int addr, unsigned char val)
106} 106}
107 107
108 108
109static unsigned char __openfirmware direct_nvram_read_byte(int addr) 109static unsigned char direct_nvram_read_byte(int addr)
110{ 110{
111 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]); 111 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]);
112} 112}
113 113
114static void __openfirmware direct_nvram_write_byte(int addr, unsigned char val) 114static void direct_nvram_write_byte(int addr, unsigned char val)
115{ 115{
116 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val); 116 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val);
117} 117}
118 118
119 119
120static unsigned char __pmac indirect_nvram_read_byte(int addr) 120static unsigned char indirect_nvram_read_byte(int addr)
121{ 121{
122 unsigned char val; 122 unsigned char val;
123 unsigned long flags; 123 unsigned long flags;
@@ -130,7 +130,7 @@ static unsigned char __pmac indirect_nvram_read_byte(int addr)
130 return val; 130 return val;
131} 131}
132 132
133static void __pmac indirect_nvram_write_byte(int addr, unsigned char val) 133static void indirect_nvram_write_byte(int addr, unsigned char val)
134{ 134{
135 unsigned long flags; 135 unsigned long flags;
136 136
@@ -143,13 +143,13 @@ static void __pmac indirect_nvram_write_byte(int addr, unsigned char val)
143 143
144#ifdef CONFIG_ADB_PMU 144#ifdef CONFIG_ADB_PMU
145 145
146static void __pmac pmu_nvram_complete(struct adb_request *req) 146static void pmu_nvram_complete(struct adb_request *req)
147{ 147{
148 if (req->arg) 148 if (req->arg)
149 complete((struct completion *)req->arg); 149 complete((struct completion *)req->arg);
150} 150}
151 151
152static unsigned char __pmac pmu_nvram_read_byte(int addr) 152static unsigned char pmu_nvram_read_byte(int addr)
153{ 153{
154 struct adb_request req; 154 struct adb_request req;
155 DECLARE_COMPLETION(req_complete); 155 DECLARE_COMPLETION(req_complete);
@@ -165,7 +165,7 @@ static unsigned char __pmac pmu_nvram_read_byte(int addr)
165 return req.reply[0]; 165 return req.reply[0];
166} 166}
167 167
168static void __pmac pmu_nvram_write_byte(int addr, unsigned char val) 168static void pmu_nvram_write_byte(int addr, unsigned char val)
169{ 169{
170 struct adb_request req; 170 struct adb_request req;
171 DECLARE_COMPLETION(req_complete); 171 DECLARE_COMPLETION(req_complete);
@@ -183,7 +183,7 @@ static void __pmac pmu_nvram_write_byte(int addr, unsigned char val)
183#endif /* CONFIG_ADB_PMU */ 183#endif /* CONFIG_ADB_PMU */
184 184
185 185
186static u8 __pmac chrp_checksum(struct chrp_header* hdr) 186static u8 chrp_checksum(struct chrp_header* hdr)
187{ 187{
188 u8 *ptr; 188 u8 *ptr;
189 u16 sum = hdr->signature; 189 u16 sum = hdr->signature;
@@ -194,7 +194,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
194 return sum; 194 return sum;
195} 195}
196 196
197static u32 __pmac core99_calc_adler(u8 *buffer) 197static u32 core99_calc_adler(u8 *buffer)
198{ 198{
199 int cnt; 199 int cnt;
200 u32 low, high; 200 u32 low, high;
@@ -216,7 +216,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
216 return (high << 16) | low; 216 return (high << 16) | low;
217} 217}
218 218
219static u32 __pmac core99_check(u8* datas) 219static u32 core99_check(u8* datas)
220{ 220{
221 struct core99_header* hdr99 = (struct core99_header*)datas; 221 struct core99_header* hdr99 = (struct core99_header*)datas;
222 222
@@ -235,7 +235,7 @@ static u32 __pmac core99_check(u8* datas)
235 return hdr99->generation; 235 return hdr99->generation;
236} 236}
237 237
238static int __pmac sm_erase_bank(int bank) 238static int sm_erase_bank(int bank)
239{ 239{
240 int stat, i; 240 int stat, i;
241 unsigned long timeout; 241 unsigned long timeout;
@@ -267,7 +267,7 @@ static int __pmac sm_erase_bank(int bank)
267 return 0; 267 return 0;
268} 268}
269 269
270static int __pmac sm_write_bank(int bank, u8* datas) 270static int sm_write_bank(int bank, u8* datas)
271{ 271{
272 int i, stat = 0; 272 int i, stat = 0;
273 unsigned long timeout; 273 unsigned long timeout;
@@ -302,7 +302,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
302 return 0; 302 return 0;
303} 303}
304 304
305static int __pmac amd_erase_bank(int bank) 305static int amd_erase_bank(int bank)
306{ 306{
307 int i, stat = 0; 307 int i, stat = 0;
308 unsigned long timeout; 308 unsigned long timeout;
@@ -349,7 +349,7 @@ static int __pmac amd_erase_bank(int bank)
349 return 0; 349 return 0;
350} 350}
351 351
352static int __pmac amd_write_bank(int bank, u8* datas) 352static int amd_write_bank(int bank, u8* datas)
353{ 353{
354 int i, stat = 0; 354 int i, stat = 0;
355 unsigned long timeout; 355 unsigned long timeout;
@@ -430,7 +430,7 @@ static void __init lookup_partitions(void)
430 DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]); 430 DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]);
431} 431}
432 432
433static void __pmac core99_nvram_sync(void) 433static void core99_nvram_sync(void)
434{ 434{
435 struct core99_header* hdr99; 435 struct core99_header* hdr99;
436 unsigned long flags; 436 unsigned long flags;
@@ -554,12 +554,12 @@ void __init pmac_nvram_init(void)
554 lookup_partitions(); 554 lookup_partitions();
555} 555}
556 556
557int __pmac pmac_get_partition(int partition) 557int pmac_get_partition(int partition)
558{ 558{
559 return nvram_partitions[partition]; 559 return nvram_partitions[partition];
560} 560}
561 561
562u8 __pmac pmac_xpram_read(int xpaddr) 562u8 pmac_xpram_read(int xpaddr)
563{ 563{
564 int offset = nvram_partitions[pmac_nvram_XPRAM]; 564 int offset = nvram_partitions[pmac_nvram_XPRAM];
565 565
@@ -569,7 +569,7 @@ u8 __pmac pmac_xpram_read(int xpaddr)
569 return ppc_md.nvram_read_val(xpaddr + offset); 569 return ppc_md.nvram_read_val(xpaddr + offset);
570} 570}
571 571
572void __pmac pmac_xpram_write(int xpaddr, u8 data) 572void pmac_xpram_write(int xpaddr, u8 data)
573{ 573{
574 int offset = nvram_partitions[pmac_nvram_XPRAM]; 574 int offset = nvram_partitions[pmac_nvram_XPRAM];
575 575
diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c
index 719fb49fe2bc..1dc638f72239 100644
--- a/arch/ppc/platforms/pmac_pci.c
+++ b/arch/ppc/platforms/pmac_pci.c
@@ -141,7 +141,7 @@ fixup_bus_range(struct device_node *bridge)
141 |(((unsigned long)(off)) & 0xFCUL) \ 141 |(((unsigned long)(off)) & 0xFCUL) \
142 |1UL) 142 |1UL)
143 143
144static void volatile __iomem * __pmac 144static void volatile __iomem *
145macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset) 145macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
146{ 146{
147 unsigned int caddr; 147 unsigned int caddr;
@@ -162,7 +162,7 @@ macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
162 return hose->cfg_data + offset; 162 return hose->cfg_data + offset;
163} 163}
164 164
165static int __pmac 165static int
166macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 166macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
167 int len, u32 *val) 167 int len, u32 *val)
168{ 168{
@@ -190,7 +190,7 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
190 return PCIBIOS_SUCCESSFUL; 190 return PCIBIOS_SUCCESSFUL;
191} 191}
192 192
193static int __pmac 193static int
194macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 194macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
195 int len, u32 val) 195 int len, u32 val)
196{ 196{
@@ -230,7 +230,7 @@ static struct pci_ops macrisc_pci_ops =
230/* 230/*
231 * Verifiy that a specific (bus, dev_fn) exists on chaos 231 * Verifiy that a specific (bus, dev_fn) exists on chaos
232 */ 232 */
233static int __pmac 233static int
234chaos_validate_dev(struct pci_bus *bus, int devfn, int offset) 234chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
235{ 235{
236 struct device_node *np; 236 struct device_node *np;
@@ -252,7 +252,7 @@ chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
252 return PCIBIOS_SUCCESSFUL; 252 return PCIBIOS_SUCCESSFUL;
253} 253}
254 254
255static int __pmac 255static int
256chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 256chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
257 int len, u32 *val) 257 int len, u32 *val)
258{ 258{
@@ -264,7 +264,7 @@ chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
264 return macrisc_read_config(bus, devfn, offset, len, val); 264 return macrisc_read_config(bus, devfn, offset, len, val);
265} 265}
266 266
267static int __pmac 267static int
268chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 268chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
269 int len, u32 val) 269 int len, u32 val)
270{ 270{
@@ -294,7 +294,7 @@ static struct pci_ops chaos_pci_ops =
294 + (((unsigned long)bus) << 16) \ 294 + (((unsigned long)bus) << 16) \
295 + 0x01000000UL) 295 + 0x01000000UL)
296 296
297static void volatile __iomem * __pmac 297static void volatile __iomem *
298u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) 298u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
299{ 299{
300 if (bus == hose->first_busno) { 300 if (bus == hose->first_busno) {
@@ -307,7 +307,7 @@ u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
307 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); 307 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
308} 308}
309 309
310static int __pmac 310static int
311u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 311u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
312 int len, u32 *val) 312 int len, u32 *val)
313{ 313{
@@ -357,7 +357,7 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
357 return PCIBIOS_SUCCESSFUL; 357 return PCIBIOS_SUCCESSFUL;
358} 358}
359 359
360static int __pmac 360static int
361u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 361u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
362 int len, u32 val) 362 int len, u32 val)
363{ 363{
@@ -899,7 +899,7 @@ pmac_pcibios_fixup(void)
899 pcibios_fixup_OF_interrupts(); 899 pcibios_fixup_OF_interrupts();
900} 900}
901 901
902int __pmac 902int
903pmac_pci_enable_device_hook(struct pci_dev *dev, int initial) 903pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
904{ 904{
905 struct device_node* node; 905 struct device_node* node;
@@ -1096,7 +1096,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
1096 * Disable second function on K2-SATA, it's broken 1096 * Disable second function on K2-SATA, it's broken
1097 * and disable IO BARs on first one 1097 * and disable IO BARs on first one
1098 */ 1098 */
1099void __pmac pmac_pci_fixup_k2_sata(struct pci_dev* dev) 1099void pmac_pci_fixup_k2_sata(struct pci_dev* dev)
1100{ 1100{
1101 int i; 1101 int i;
1102 u16 cmd; 1102 u16 cmd;
diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c
index 2ce058895e03..3349cfb624a0 100644
--- a/arch/ppc/platforms/pmac_pic.c
+++ b/arch/ppc/platforms/pmac_pic.c
@@ -53,7 +53,7 @@ struct pmac_irq_hw {
53}; 53};
54 54
55/* Default addresses */ 55/* Default addresses */
56static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = { 56static volatile struct pmac_irq_hw *pmac_irq_hw[4] = {
57 (struct pmac_irq_hw *) 0xf3000020, 57 (struct pmac_irq_hw *) 0xf3000020,
58 (struct pmac_irq_hw *) 0xf3000010, 58 (struct pmac_irq_hw *) 0xf3000010,
59 (struct pmac_irq_hw *) 0xf4000020, 59 (struct pmac_irq_hw *) 0xf4000020,
@@ -64,22 +64,22 @@ static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = {
64#define OHARE_LEVEL_MASK 0x1ff00000 64#define OHARE_LEVEL_MASK 0x1ff00000
65#define HEATHROW_LEVEL_MASK 0x1ff00000 65#define HEATHROW_LEVEL_MASK 0x1ff00000
66 66
67static int max_irqs __pmacdata; 67static int max_irqs;
68static int max_real_irqs __pmacdata; 68static int max_real_irqs;
69static u32 level_mask[4] __pmacdata; 69static u32 level_mask[4];
70 70
71static DEFINE_SPINLOCK(pmac_pic_lock __pmacdata); 71static DEFINE_SPINLOCK(pmac_pic_lock);
72 72
73 73
74#define GATWICK_IRQ_POOL_SIZE 10 74#define GATWICK_IRQ_POOL_SIZE 10
75static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE] __pmacdata; 75static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
76 76
77/* 77/*
78 * Mark an irq as "lost". This is only used on the pmac 78 * Mark an irq as "lost". This is only used on the pmac
79 * since it can lose interrupts (see pmac_set_irq_mask). 79 * since it can lose interrupts (see pmac_set_irq_mask).
80 * -- Cort 80 * -- Cort
81 */ 81 */
82void __pmac 82void
83__set_lost(unsigned long irq_nr, int nokick) 83__set_lost(unsigned long irq_nr, int nokick)
84{ 84{
85 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) { 85 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
@@ -89,7 +89,7 @@ __set_lost(unsigned long irq_nr, int nokick)
89 } 89 }
90} 90}
91 91
92static void __pmac 92static void
93pmac_mask_and_ack_irq(unsigned int irq_nr) 93pmac_mask_and_ack_irq(unsigned int irq_nr)
94{ 94{
95 unsigned long bit = 1UL << (irq_nr & 0x1f); 95 unsigned long bit = 1UL << (irq_nr & 0x1f);
@@ -114,7 +114,7 @@ pmac_mask_and_ack_irq(unsigned int irq_nr)
114 spin_unlock_irqrestore(&pmac_pic_lock, flags); 114 spin_unlock_irqrestore(&pmac_pic_lock, flags);
115} 115}
116 116
117static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) 117static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
118{ 118{
119 unsigned long bit = 1UL << (irq_nr & 0x1f); 119 unsigned long bit = 1UL << (irq_nr & 0x1f);
120 int i = irq_nr >> 5; 120 int i = irq_nr >> 5;
@@ -147,7 +147,7 @@ static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
147/* When an irq gets requested for the first client, if it's an 147/* When an irq gets requested for the first client, if it's an
148 * edge interrupt, we clear any previous one on the controller 148 * edge interrupt, we clear any previous one on the controller
149 */ 149 */
150static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr) 150static unsigned int pmac_startup_irq(unsigned int irq_nr)
151{ 151{
152 unsigned long bit = 1UL << (irq_nr & 0x1f); 152 unsigned long bit = 1UL << (irq_nr & 0x1f);
153 int i = irq_nr >> 5; 153 int i = irq_nr >> 5;
@@ -160,20 +160,20 @@ static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr)
160 return 0; 160 return 0;
161} 161}
162 162
163static void __pmac pmac_mask_irq(unsigned int irq_nr) 163static void pmac_mask_irq(unsigned int irq_nr)
164{ 164{
165 clear_bit(irq_nr, ppc_cached_irq_mask); 165 clear_bit(irq_nr, ppc_cached_irq_mask);
166 pmac_set_irq_mask(irq_nr, 0); 166 pmac_set_irq_mask(irq_nr, 0);
167 mb(); 167 mb();
168} 168}
169 169
170static void __pmac pmac_unmask_irq(unsigned int irq_nr) 170static void pmac_unmask_irq(unsigned int irq_nr)
171{ 171{
172 set_bit(irq_nr, ppc_cached_irq_mask); 172 set_bit(irq_nr, ppc_cached_irq_mask);
173 pmac_set_irq_mask(irq_nr, 0); 173 pmac_set_irq_mask(irq_nr, 0);
174} 174}
175 175
176static void __pmac pmac_end_irq(unsigned int irq_nr) 176static void pmac_end_irq(unsigned int irq_nr)
177{ 177{
178 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) 178 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
179 && irq_desc[irq_nr].action) { 179 && irq_desc[irq_nr].action) {
diff --git a/arch/ppc/platforms/pmac_setup.c b/arch/ppc/platforms/pmac_setup.c
index 4c56a4734aec..1ad779ecc8fc 100644
--- a/arch/ppc/platforms/pmac_setup.c
+++ b/arch/ppc/platforms/pmac_setup.c
@@ -123,7 +123,7 @@ extern struct smp_ops_t psurge_smp_ops;
123extern struct smp_ops_t core99_smp_ops; 123extern struct smp_ops_t core99_smp_ops;
124#endif /* CONFIG_SMP */ 124#endif /* CONFIG_SMP */
125 125
126static int __pmac 126static int
127pmac_show_cpuinfo(struct seq_file *m) 127pmac_show_cpuinfo(struct seq_file *m)
128{ 128{
129 struct device_node *np; 129 struct device_node *np;
@@ -227,7 +227,7 @@ pmac_show_cpuinfo(struct seq_file *m)
227 return 0; 227 return 0;
228} 228}
229 229
230static int __openfirmware 230static int
231pmac_show_percpuinfo(struct seq_file *m, int i) 231pmac_show_percpuinfo(struct seq_file *m, int i)
232{ 232{
233#ifdef CONFIG_CPU_FREQ_PMAC 233#ifdef CONFIG_CPU_FREQ_PMAC
@@ -486,7 +486,7 @@ static int pmac_late_init(void)
486late_initcall(pmac_late_init); 486late_initcall(pmac_late_init);
487 487
488/* can't be __init - can be called whenever a disk is first accessed */ 488/* can't be __init - can be called whenever a disk is first accessed */
489void __pmac 489void
490note_bootable_part(dev_t dev, int part, int goodness) 490note_bootable_part(dev_t dev, int part, int goodness)
491{ 491{
492 static int found_boot = 0; 492 static int found_boot = 0;
@@ -512,7 +512,7 @@ note_bootable_part(dev_t dev, int part, int goodness)
512 } 512 }
513} 513}
514 514
515static void __pmac 515static void
516pmac_restart(char *cmd) 516pmac_restart(char *cmd)
517{ 517{
518#ifdef CONFIG_ADB_CUDA 518#ifdef CONFIG_ADB_CUDA
@@ -537,7 +537,7 @@ pmac_restart(char *cmd)
537 } 537 }
538} 538}
539 539
540static void __pmac 540static void
541pmac_power_off(void) 541pmac_power_off(void)
542{ 542{
543#ifdef CONFIG_ADB_CUDA 543#ifdef CONFIG_ADB_CUDA
@@ -562,7 +562,7 @@ pmac_power_off(void)
562 } 562 }
563} 563}
564 564
565static void __pmac 565static void
566pmac_halt(void) 566pmac_halt(void)
567{ 567{
568 pmac_power_off(); 568 pmac_power_off();
diff --git a/arch/ppc/platforms/pmac_smp.c b/arch/ppc/platforms/pmac_smp.c
index 794a23994b82..e613f0e0d9eb 100644
--- a/arch/ppc/platforms/pmac_smp.c
+++ b/arch/ppc/platforms/pmac_smp.c
@@ -186,7 +186,7 @@ static inline void psurge_clr_ipi(int cpu)
186 */ 186 */
187static unsigned long psurge_smp_message[NR_CPUS]; 187static unsigned long psurge_smp_message[NR_CPUS];
188 188
189void __pmac psurge_smp_message_recv(struct pt_regs *regs) 189void psurge_smp_message_recv(struct pt_regs *regs)
190{ 190{
191 int cpu = smp_processor_id(); 191 int cpu = smp_processor_id();
192 int msg; 192 int msg;
@@ -203,13 +203,13 @@ void __pmac psurge_smp_message_recv(struct pt_regs *regs)
203 smp_message_recv(msg, regs); 203 smp_message_recv(msg, regs);
204} 204}
205 205
206irqreturn_t __pmac psurge_primary_intr(int irq, void *d, struct pt_regs *regs) 206irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
207{ 207{
208 psurge_smp_message_recv(regs); 208 psurge_smp_message_recv(regs);
209 return IRQ_HANDLED; 209 return IRQ_HANDLED;
210} 210}
211 211
212static void __pmac smp_psurge_message_pass(int target, int msg, unsigned long data, 212static void smp_psurge_message_pass(int target, int msg, unsigned long data,
213 int wait) 213 int wait)
214{ 214{
215 int i; 215 int i;
@@ -629,7 +629,7 @@ void smp_core99_give_timebase(void)
629 629
630 630
631/* PowerSurge-style Macs */ 631/* PowerSurge-style Macs */
632struct smp_ops_t psurge_smp_ops __pmacdata = { 632struct smp_ops_t psurge_smp_ops = {
633 .message_pass = smp_psurge_message_pass, 633 .message_pass = smp_psurge_message_pass,
634 .probe = smp_psurge_probe, 634 .probe = smp_psurge_probe,
635 .kick_cpu = smp_psurge_kick_cpu, 635 .kick_cpu = smp_psurge_kick_cpu,
@@ -639,7 +639,7 @@ struct smp_ops_t psurge_smp_ops __pmacdata = {
639}; 639};
640 640
641/* Core99 Macs (dual G4s) */ 641/* Core99 Macs (dual G4s) */
642struct smp_ops_t core99_smp_ops __pmacdata = { 642struct smp_ops_t core99_smp_ops = {
643 .message_pass = smp_openpic_message_pass, 643 .message_pass = smp_openpic_message_pass,
644 .probe = smp_core99_probe, 644 .probe = smp_core99_probe,
645 .kick_cpu = smp_core99_kick_cpu, 645 .kick_cpu = smp_core99_kick_cpu,
diff --git a/arch/ppc/platforms/pmac_time.c b/arch/ppc/platforms/pmac_time.c
index 778ce4fec368..ff6adff36cb8 100644
--- a/arch/ppc/platforms/pmac_time.c
+++ b/arch/ppc/platforms/pmac_time.c
@@ -77,7 +77,7 @@ pmac_time_init(void)
77#endif 77#endif
78} 78}
79 79
80unsigned long __pmac 80unsigned long
81pmac_get_rtc_time(void) 81pmac_get_rtc_time(void)
82{ 82{
83#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) 83#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -118,7 +118,7 @@ pmac_get_rtc_time(void)
118 return 0; 118 return 0;
119} 119}
120 120
121int __pmac 121int
122pmac_set_rtc_time(unsigned long nowtime) 122pmac_set_rtc_time(unsigned long nowtime)
123{ 123{
124#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) 124#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -210,7 +210,7 @@ via_calibrate_decr(void)
210/* 210/*
211 * Reset the time after a sleep. 211 * Reset the time after a sleep.
212 */ 212 */
213static int __pmac 213static int
214time_sleep_notify(struct pmu_sleep_notifier *self, int when) 214time_sleep_notify(struct pmu_sleep_notifier *self, int when)
215{ 215{
216 static unsigned long time_diff; 216 static unsigned long time_diff;
@@ -235,7 +235,7 @@ time_sleep_notify(struct pmu_sleep_notifier *self, int when)
235 return PBOOK_SLEEP_OK; 235 return PBOOK_SLEEP_OK;
236} 236}
237 237
238static struct pmu_sleep_notifier time_sleep_notifier __pmacdata = { 238static struct pmu_sleep_notifier time_sleep_notifier = {
239 time_sleep_notify, SLEEP_LEVEL_MISC, 239 time_sleep_notify, SLEEP_LEVEL_MISC,
240}; 240};
241#endif /* CONFIG_PM */ 241#endif /* CONFIG_PM */
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
index 4760cb64251d..e50b9996848c 100644
--- a/arch/ppc/platforms/prep_pci.c
+++ b/arch/ppc/platforms/prep_pci.c
@@ -43,7 +43,7 @@ static unsigned long *ProcInfo;
43/* Tables for known hardware */ 43/* Tables for known hardware */
44 44
45/* Motorola PowerStackII - Utah */ 45/* Motorola PowerStackII - Utah */
46static char Utah_pci_IRQ_map[23] __prepdata = 46static char Utah_pci_IRQ_map[23] =
47{ 47{
48 0, /* Slot 0 - unused */ 48 0, /* Slot 0 - unused */
49 0, /* Slot 1 - unused */ 49 0, /* Slot 1 - unused */
@@ -72,7 +72,7 @@ static char Utah_pci_IRQ_map[23] __prepdata =
72 0, /* Slot 22 - unused */ 72 0, /* Slot 22 - unused */
73}; 73};
74 74
75static char Utah_pci_IRQ_routes[] __prepdata = 75static char Utah_pci_IRQ_routes[] =
76{ 76{
77 0, /* Line 0 - Unused */ 77 0, /* Line 0 - Unused */
78 9, /* Line 1 */ 78 9, /* Line 1 */
@@ -84,7 +84,7 @@ static char Utah_pci_IRQ_routes[] __prepdata =
84 84
85/* Motorola PowerStackII - Omaha */ 85/* Motorola PowerStackII - Omaha */
86/* no integrated SCSI or ethernet */ 86/* no integrated SCSI or ethernet */
87static char Omaha_pci_IRQ_map[23] __prepdata = 87static char Omaha_pci_IRQ_map[23] =
88{ 88{
89 0, /* Slot 0 - unused */ 89 0, /* Slot 0 - unused */
90 0, /* Slot 1 - unused */ 90 0, /* Slot 1 - unused */
@@ -111,7 +111,7 @@ static char Omaha_pci_IRQ_map[23] __prepdata =
111 0, 111 0,
112}; 112};
113 113
114static char Omaha_pci_IRQ_routes[] __prepdata = 114static char Omaha_pci_IRQ_routes[] =
115{ 115{
116 0, /* Line 0 - Unused */ 116 0, /* Line 0 - Unused */
117 9, /* Line 1 */ 117 9, /* Line 1 */
@@ -121,7 +121,7 @@ static char Omaha_pci_IRQ_routes[] __prepdata =
121}; 121};
122 122
123/* Motorola PowerStack */ 123/* Motorola PowerStack */
124static char Blackhawk_pci_IRQ_map[19] __prepdata = 124static char Blackhawk_pci_IRQ_map[19] =
125{ 125{
126 0, /* Slot 0 - unused */ 126 0, /* Slot 0 - unused */
127 0, /* Slot 1 - unused */ 127 0, /* Slot 1 - unused */
@@ -144,7 +144,7 @@ static char Blackhawk_pci_IRQ_map[19] __prepdata =
144 3, /* Slot P5 */ 144 3, /* Slot P5 */
145}; 145};
146 146
147static char Blackhawk_pci_IRQ_routes[] __prepdata = 147static char Blackhawk_pci_IRQ_routes[] =
148{ 148{
149 0, /* Line 0 - Unused */ 149 0, /* Line 0 - Unused */
150 9, /* Line 1 */ 150 9, /* Line 1 */
@@ -154,7 +154,7 @@ static char Blackhawk_pci_IRQ_routes[] __prepdata =
154}; 154};
155 155
156/* Motorola Mesquite */ 156/* Motorola Mesquite */
157static char Mesquite_pci_IRQ_map[23] __prepdata = 157static char Mesquite_pci_IRQ_map[23] =
158{ 158{
159 0, /* Slot 0 - unused */ 159 0, /* Slot 0 - unused */
160 0, /* Slot 1 - unused */ 160 0, /* Slot 1 - unused */
@@ -182,7 +182,7 @@ static char Mesquite_pci_IRQ_map[23] __prepdata =
182}; 182};
183 183
184/* Motorola Sitka */ 184/* Motorola Sitka */
185static char Sitka_pci_IRQ_map[21] __prepdata = 185static char Sitka_pci_IRQ_map[21] =
186{ 186{
187 0, /* Slot 0 - unused */ 187 0, /* Slot 0 - unused */
188 0, /* Slot 1 - unused */ 188 0, /* Slot 1 - unused */
@@ -208,7 +208,7 @@ static char Sitka_pci_IRQ_map[21] __prepdata =
208}; 208};
209 209
210/* Motorola MTX */ 210/* Motorola MTX */
211static char MTX_pci_IRQ_map[23] __prepdata = 211static char MTX_pci_IRQ_map[23] =
212{ 212{
213 0, /* Slot 0 - unused */ 213 0, /* Slot 0 - unused */
214 0, /* Slot 1 - unused */ 214 0, /* Slot 1 - unused */
@@ -237,7 +237,7 @@ static char MTX_pci_IRQ_map[23] __prepdata =
237 237
238/* Motorola MTX Plus */ 238/* Motorola MTX Plus */
239/* Secondary bus interrupt routing is not supported yet */ 239/* Secondary bus interrupt routing is not supported yet */
240static char MTXplus_pci_IRQ_map[23] __prepdata = 240static char MTXplus_pci_IRQ_map[23] =
241{ 241{
242 0, /* Slot 0 - unused */ 242 0, /* Slot 0 - unused */
243 0, /* Slot 1 - unused */ 243 0, /* Slot 1 - unused */
@@ -264,13 +264,13 @@ static char MTXplus_pci_IRQ_map[23] __prepdata =
264 0, /* Slot 22 - unused */ 264 0, /* Slot 22 - unused */
265}; 265};
266 266
267static char Raven_pci_IRQ_routes[] __prepdata = 267static char Raven_pci_IRQ_routes[] =
268{ 268{
269 0, /* This is a dummy structure */ 269 0, /* This is a dummy structure */
270}; 270};
271 271
272/* Motorola MVME16xx */ 272/* Motorola MVME16xx */
273static char Genesis_pci_IRQ_map[16] __prepdata = 273static char Genesis_pci_IRQ_map[16] =
274{ 274{
275 0, /* Slot 0 - unused */ 275 0, /* Slot 0 - unused */
276 0, /* Slot 1 - unused */ 276 0, /* Slot 1 - unused */
@@ -290,7 +290,7 @@ static char Genesis_pci_IRQ_map[16] __prepdata =
290 0, /* Slot 15 - unused */ 290 0, /* Slot 15 - unused */
291}; 291};
292 292
293static char Genesis_pci_IRQ_routes[] __prepdata = 293static char Genesis_pci_IRQ_routes[] =
294{ 294{
295 0, /* Line 0 - Unused */ 295 0, /* Line 0 - Unused */
296 10, /* Line 1 */ 296 10, /* Line 1 */
@@ -299,7 +299,7 @@ static char Genesis_pci_IRQ_routes[] __prepdata =
299 15 /* Line 4 */ 299 15 /* Line 4 */
300}; 300};
301 301
302static char Genesis2_pci_IRQ_map[23] __prepdata = 302static char Genesis2_pci_IRQ_map[23] =
303{ 303{
304 0, /* Slot 0 - unused */ 304 0, /* Slot 0 - unused */
305 0, /* Slot 1 - unused */ 305 0, /* Slot 1 - unused */
@@ -327,7 +327,7 @@ static char Genesis2_pci_IRQ_map[23] __prepdata =
327}; 327};
328 328
329/* Motorola Series-E */ 329/* Motorola Series-E */
330static char Comet_pci_IRQ_map[23] __prepdata = 330static char Comet_pci_IRQ_map[23] =
331{ 331{
332 0, /* Slot 0 - unused */ 332 0, /* Slot 0 - unused */
333 0, /* Slot 1 - unused */ 333 0, /* Slot 1 - unused */
@@ -354,7 +354,7 @@ static char Comet_pci_IRQ_map[23] __prepdata =
354 0, 354 0,
355}; 355};
356 356
357static char Comet_pci_IRQ_routes[] __prepdata = 357static char Comet_pci_IRQ_routes[] =
358{ 358{
359 0, /* Line 0 - Unused */ 359 0, /* Line 0 - Unused */
360 10, /* Line 1 */ 360 10, /* Line 1 */
@@ -364,7 +364,7 @@ static char Comet_pci_IRQ_routes[] __prepdata =
364}; 364};
365 365
366/* Motorola Series-EX */ 366/* Motorola Series-EX */
367static char Comet2_pci_IRQ_map[23] __prepdata = 367static char Comet2_pci_IRQ_map[23] =
368{ 368{
369 0, /* Slot 0 - unused */ 369 0, /* Slot 0 - unused */
370 0, /* Slot 1 - unused */ 370 0, /* Slot 1 - unused */
@@ -391,7 +391,7 @@ static char Comet2_pci_IRQ_map[23] __prepdata =
391 0, 391 0,
392}; 392};
393 393
394static char Comet2_pci_IRQ_routes[] __prepdata = 394static char Comet2_pci_IRQ_routes[] =
395{ 395{
396 0, /* Line 0 - Unused */ 396 0, /* Line 0 - Unused */
397 10, /* Line 1 */ 397 10, /* Line 1 */
@@ -405,7 +405,7 @@ static char Comet2_pci_IRQ_routes[] __prepdata =
405 * This is actually based on the Carolina motherboard 405 * This is actually based on the Carolina motherboard
406 * -- Cort 406 * -- Cort
407 */ 407 */
408static char ibm8xx_pci_IRQ_map[23] __prepdata = { 408static char ibm8xx_pci_IRQ_map[23] = {
409 0, /* Slot 0 - unused */ 409 0, /* Slot 0 - unused */
410 0, /* Slot 1 - unused */ 410 0, /* Slot 1 - unused */
411 0, /* Slot 2 - unused */ 411 0, /* Slot 2 - unused */
@@ -431,7 +431,7 @@ static char ibm8xx_pci_IRQ_map[23] __prepdata = {
431 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ 431 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
432}; 432};
433 433
434static char ibm8xx_pci_IRQ_routes[] __prepdata = { 434static char ibm8xx_pci_IRQ_routes[] = {
435 0, /* Line 0 - unused */ 435 0, /* Line 0 - unused */
436 15, /* Line 1 */ 436 15, /* Line 1 */
437 15, /* Line 2 */ 437 15, /* Line 2 */
@@ -443,7 +443,7 @@ static char ibm8xx_pci_IRQ_routes[] __prepdata = {
443 * a 6015 ibm board 443 * a 6015 ibm board
444 * -- Cort 444 * -- Cort
445 */ 445 */
446static char ibm6015_pci_IRQ_map[23] __prepdata = { 446static char ibm6015_pci_IRQ_map[23] = {
447 0, /* Slot 0 - unused */ 447 0, /* Slot 0 - unused */
448 0, /* Slot 1 - unused */ 448 0, /* Slot 1 - unused */
449 0, /* Slot 2 - unused */ 449 0, /* Slot 2 - unused */
@@ -469,7 +469,7 @@ static char ibm6015_pci_IRQ_map[23] __prepdata = {
469 2, /* Slot 22 - */ 469 2, /* Slot 22 - */
470}; 470};
471 471
472static char ibm6015_pci_IRQ_routes[] __prepdata = { 472static char ibm6015_pci_IRQ_routes[] = {
473 0, /* Line 0 - unused */ 473 0, /* Line 0 - unused */
474 13, /* Line 1 */ 474 13, /* Line 1 */
475 15, /* Line 2 */ 475 15, /* Line 2 */
@@ -479,7 +479,7 @@ static char ibm6015_pci_IRQ_routes[] __prepdata = {
479 479
480 480
481/* IBM Nobis and Thinkpad 850 */ 481/* IBM Nobis and Thinkpad 850 */
482static char Nobis_pci_IRQ_map[23] __prepdata ={ 482static char Nobis_pci_IRQ_map[23] ={
483 0, /* Slot 0 - unused */ 483 0, /* Slot 0 - unused */
484 0, /* Slot 1 - unused */ 484 0, /* Slot 1 - unused */
485 0, /* Slot 2 - unused */ 485 0, /* Slot 2 - unused */
@@ -498,7 +498,7 @@ static char Nobis_pci_IRQ_map[23] __prepdata ={
498 0, /* Slot 15 - unused */ 498 0, /* Slot 15 - unused */
499}; 499};
500 500
501static char Nobis_pci_IRQ_routes[] __prepdata = { 501static char Nobis_pci_IRQ_routes[] = {
502 0, /* Line 0 - Unused */ 502 0, /* Line 0 - Unused */
503 13, /* Line 1 */ 503 13, /* Line 1 */
504 13, /* Line 2 */ 504 13, /* Line 2 */
@@ -510,7 +510,7 @@ static char Nobis_pci_IRQ_routes[] __prepdata = {
510 * IBM RS/6000 43p/140 -- paulus 510 * IBM RS/6000 43p/140 -- paulus
511 * XXX we should get all this from the residual data 511 * XXX we should get all this from the residual data
512 */ 512 */
513static char ibm43p_pci_IRQ_map[23] __prepdata = { 513static char ibm43p_pci_IRQ_map[23] = {
514 0, /* Slot 0 - unused */ 514 0, /* Slot 0 - unused */
515 0, /* Slot 1 - unused */ 515 0, /* Slot 1 - unused */
516 0, /* Slot 2 - unused */ 516 0, /* Slot 2 - unused */
@@ -536,7 +536,7 @@ static char ibm43p_pci_IRQ_map[23] __prepdata = {
536 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ 536 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
537}; 537};
538 538
539static char ibm43p_pci_IRQ_routes[] __prepdata = { 539static char ibm43p_pci_IRQ_routes[] = {
540 0, /* Line 0 - unused */ 540 0, /* Line 0 - unused */
541 15, /* Line 1 */ 541 15, /* Line 1 */
542 15, /* Line 2 */ 542 15, /* Line 2 */
@@ -559,7 +559,7 @@ struct powerplus_irq_list
559 * are routed to OpenPIC inputs 5-8. These values are offset by 559 * are routed to OpenPIC inputs 5-8. These values are offset by
560 * 16 in the table to reflect the Linux kernel interrupt value. 560 * 16 in the table to reflect the Linux kernel interrupt value.
561 */ 561 */
562struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata = 562struct powerplus_irq_list Powerplus_pci_IRQ_list =
563{ 563{
564 {25, 26, 27, 28}, 564 {25, 26, 27, 28},
565 {21, 22, 23, 24} 565 {21, 22, 23, 24}
@@ -572,7 +572,7 @@ struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata =
572 * are routed to OpenPIC inputs 12-15. These values are offset by 572 * are routed to OpenPIC inputs 12-15. These values are offset by
573 * 16 in the table to reflect the Linux kernel interrupt value. 573 * 16 in the table to reflect the Linux kernel interrupt value.
574 */ 574 */
575struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata = 575struct powerplus_irq_list Mesquite_pci_IRQ_list =
576{ 576{
577 {24, 25, 26, 27}, 577 {24, 25, 26, 27},
578 {28, 29, 30, 31} 578 {28, 29, 30, 31}
@@ -582,7 +582,7 @@ struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata =
582 * This table represents the standard PCI swizzle defined in the 582 * This table represents the standard PCI swizzle defined in the
583 * PCI bus specification. 583 * PCI bus specification.
584 */ 584 */
585static unsigned char prep_pci_intpins[4][4] __prepdata = 585static unsigned char prep_pci_intpins[4][4] =
586{ 586{
587 { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */ 587 { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */
588 { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */ 588 { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */
@@ -622,7 +622,7 @@ static unsigned char prep_pci_intpins[4][4] __prepdata =
622#define MIN_DEVNR 11 622#define MIN_DEVNR 11
623#define MAX_DEVNR 22 623#define MAX_DEVNR 22
624 624
625static int __prep 625static int
626prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 626prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
627 int len, u32 *val) 627 int len, u32 *val)
628{ 628{
@@ -652,7 +652,7 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
652 return PCIBIOS_SUCCESSFUL; 652 return PCIBIOS_SUCCESSFUL;
653} 653}
654 654
655static int __prep 655static int
656prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 656prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
657 int len, u32 val) 657 int len, u32 val)
658{ 658{
@@ -804,7 +804,7 @@ struct mot_info {
804 void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */ 804 void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */
805 struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */ 805 struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */
806 unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */ 806 unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */
807} mot_info[] __prepdata = { 807} mot_info[] = {
808 {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, 808 {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
809 {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, 809 {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
810 {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00}, 810 {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00},
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index bc926be95472..fccafbcd4b58 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -173,7 +173,7 @@ prep_carolina_enable_l2(void)
173} 173}
174 174
175/* cpuinfo code common to all IBM PReP */ 175/* cpuinfo code common to all IBM PReP */
176static void __prep 176static void
177prep_ibm_cpuinfo(struct seq_file *m) 177prep_ibm_cpuinfo(struct seq_file *m)
178{ 178{
179 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 179 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -209,14 +209,14 @@ prep_ibm_cpuinfo(struct seq_file *m)
209 } 209 }
210} 210}
211 211
212static int __prep 212static int
213prep_gen_cpuinfo(struct seq_file *m) 213prep_gen_cpuinfo(struct seq_file *m)
214{ 214{
215 prep_ibm_cpuinfo(m); 215 prep_ibm_cpuinfo(m);
216 return 0; 216 return 0;
217} 217}
218 218
219static int __prep 219static int
220prep_sandalfoot_cpuinfo(struct seq_file *m) 220prep_sandalfoot_cpuinfo(struct seq_file *m)
221{ 221{
222 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 222 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -243,7 +243,7 @@ prep_sandalfoot_cpuinfo(struct seq_file *m)
243 return 0; 243 return 0;
244} 244}
245 245
246static int __prep 246static int
247prep_thinkpad_cpuinfo(struct seq_file *m) 247prep_thinkpad_cpuinfo(struct seq_file *m)
248{ 248{
249 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 249 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -314,7 +314,7 @@ prep_thinkpad_cpuinfo(struct seq_file *m)
314 return 0; 314 return 0;
315} 315}
316 316
317static int __prep 317static int
318prep_carolina_cpuinfo(struct seq_file *m) 318prep_carolina_cpuinfo(struct seq_file *m)
319{ 319{
320 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 320 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -350,7 +350,7 @@ prep_carolina_cpuinfo(struct seq_file *m)
350 return 0; 350 return 0;
351} 351}
352 352
353static int __prep 353static int
354prep_tiger1_cpuinfo(struct seq_file *m) 354prep_tiger1_cpuinfo(struct seq_file *m)
355{ 355{
356 unsigned int l2_reg = inb(PREP_IBM_L2INFO); 356 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
@@ -393,7 +393,7 @@ prep_tiger1_cpuinfo(struct seq_file *m)
393 393
394 394
395/* Used by all Motorola PReP */ 395/* Used by all Motorola PReP */
396static int __prep 396static int
397prep_mot_cpuinfo(struct seq_file *m) 397prep_mot_cpuinfo(struct seq_file *m)
398{ 398{
399 unsigned int cachew = *((unsigned char *)CACHECRBA); 399 unsigned int cachew = *((unsigned char *)CACHECRBA);
@@ -454,7 +454,7 @@ no_l2:
454 return 0; 454 return 0;
455} 455}
456 456
457static void __prep 457static void
458prep_restart(char *cmd) 458prep_restart(char *cmd)
459{ 459{
460#define PREP_SP92 0x92 /* Special Port 92 */ 460#define PREP_SP92 0x92 /* Special Port 92 */
@@ -473,7 +473,7 @@ prep_restart(char *cmd)
473#undef PREP_SP92 473#undef PREP_SP92
474} 474}
475 475
476static void __prep 476static void
477prep_halt(void) 477prep_halt(void)
478{ 478{
479 local_irq_disable(); /* no interrupts */ 479 local_irq_disable(); /* no interrupts */
@@ -488,7 +488,7 @@ prep_halt(void)
488/* Carrera is the power manager in the Thinkpads. Unfortunately not much is 488/* Carrera is the power manager in the Thinkpads. Unfortunately not much is
489 * known about it, so we can't power down. 489 * known about it, so we can't power down.
490 */ 490 */
491static void __prep 491static void
492prep_carrera_poweroff(void) 492prep_carrera_poweroff(void)
493{ 493{
494 prep_halt(); 494 prep_halt();
@@ -501,7 +501,7 @@ prep_carrera_poweroff(void)
501 * somewhat in the IBM Carolina Technical Specification. 501 * somewhat in the IBM Carolina Technical Specification.
502 * -Hollis 502 * -Hollis
503 */ 503 */
504static void __prep 504static void
505utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) 505utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
506{ 506{
507 /* 507 /*
@@ -539,7 +539,7 @@ utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
539 udelay(100); /* important: let controller recover */ 539 udelay(100); /* important: let controller recover */
540} 540}
541 541
542static void __prep 542static void
543prep_sig750_poweroff(void) 543prep_sig750_poweroff(void)
544{ 544{
545 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */ 545 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
@@ -554,7 +554,7 @@ prep_sig750_poweroff(void)
554 /* not reached */ 554 /* not reached */
555} 555}
556 556
557static int __prep 557static int
558prep_show_percpuinfo(struct seq_file *m, int i) 558prep_show_percpuinfo(struct seq_file *m, int i)
559{ 559{
560 /* PREP's without residual data will give incorrect values here */ 560 /* PREP's without residual data will give incorrect values here */
@@ -700,12 +700,12 @@ prep_set_bat(void)
700/* 700/*
701 * IBM 3-digit status LED 701 * IBM 3-digit status LED
702 */ 702 */
703static unsigned int ibm_statusled_base __prepdata; 703static unsigned int ibm_statusled_base;
704 704
705static void __prep 705static void
706ibm_statusled_progress(char *s, unsigned short hex); 706ibm_statusled_progress(char *s, unsigned short hex);
707 707
708static int __prep 708static int
709ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, 709ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
710 void * dummy3) 710 void * dummy3)
711{ 711{
@@ -713,13 +713,13 @@ ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
713 return NOTIFY_DONE; 713 return NOTIFY_DONE;
714} 714}
715 715
716static struct notifier_block ibm_statusled_block __prepdata = { 716static struct notifier_block ibm_statusled_block = {
717 ibm_statusled_panic, 717 ibm_statusled_panic,
718 NULL, 718 NULL,
719 INT_MAX /* try to do it first */ 719 INT_MAX /* try to do it first */
720}; 720};
721 721
722static void __prep 722static void
723ibm_statusled_progress(char *s, unsigned short hex) 723ibm_statusled_progress(char *s, unsigned short hex)
724{ 724{
725 static int notifier_installed; 725 static int notifier_installed;
@@ -945,7 +945,7 @@ prep_calibrate_decr(void)
945 todc_calibrate_decr(); 945 todc_calibrate_decr();
946} 946}
947 947
948static unsigned int __prep 948static unsigned int
949prep_irq_canonicalize(u_int irq) 949prep_irq_canonicalize(u_int irq)
950{ 950{
951 if (irq == 2) 951 if (irq == 2)
@@ -996,7 +996,7 @@ prep_init_IRQ(void)
996/* 996/*
997 * IDE stuff. 997 * IDE stuff.
998 */ 998 */
999static int __prep 999static int
1000prep_ide_default_irq(unsigned long base) 1000prep_ide_default_irq(unsigned long base)
1001{ 1001{
1002 switch (base) { 1002 switch (base) {
@@ -1010,7 +1010,7 @@ prep_ide_default_irq(unsigned long base)
1010 } 1010 }
1011} 1011}
1012 1012
1013static unsigned long __prep 1013static unsigned long
1014prep_ide_default_io_base(int index) 1014prep_ide_default_io_base(int index)
1015{ 1015{
1016 switch (index) { 1016 switch (index) {
@@ -1055,7 +1055,7 @@ smp_prep_setup_cpu(int cpu_nr)
1055 do_openpic_setup_cpu(); 1055 do_openpic_setup_cpu();
1056} 1056}
1057 1057
1058static struct smp_ops_t prep_smp_ops __prepdata = { 1058static struct smp_ops_t prep_smp_ops = {
1059 smp_openpic_message_pass, 1059 smp_openpic_message_pass,
1060 smp_prep_probe, 1060 smp_prep_probe,
1061 smp_prep_kick_cpu, 1061 smp_prep_kick_cpu,
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
index 0f84ca603612..c9911601cfdf 100644
--- a/arch/ppc/platforms/residual.c
+++ b/arch/ppc/platforms/residual.c
@@ -47,7 +47,7 @@
47#include <asm/ide.h> 47#include <asm/ide.h>
48 48
49 49
50unsigned char __res[sizeof(RESIDUAL)] __prepdata = {0,}; 50unsigned char __res[sizeof(RESIDUAL)] = {0,};
51RESIDUAL *res = (RESIDUAL *)&__res; 51RESIDUAL *res = (RESIDUAL *)&__res;
52 52
53char * PnP_BASE_TYPES[] __initdata = { 53char * PnP_BASE_TYPES[] __initdata = {
diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c
index 7734f6836174..12fa83e6774a 100644
--- a/arch/ppc/syslib/btext.c
+++ b/arch/ppc/syslib/btext.c
@@ -53,8 +53,8 @@ extern char *klimit;
53 * chrp only uses it during early boot. 53 * chrp only uses it during early boot.
54 */ 54 */
55#ifdef CONFIG_XMON 55#ifdef CONFIG_XMON
56#define BTEXT __pmac 56#define BTEXT
57#define BTDATA __pmacdata 57#define BTDATA
58#else 58#else
59#define BTEXT __init 59#define BTEXT __init
60#define BTDATA __initdata 60#define BTDATA __initdata
@@ -187,7 +187,7 @@ btext_setup_display(int width, int height, int depth, int pitch,
187 * changes. 187 * changes.
188 */ 188 */
189 189
190void __openfirmware 190void
191map_boot_text(void) 191map_boot_text(void)
192{ 192{
193 unsigned long base, offset, size; 193 unsigned long base, offset, size;
diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c
index 8599850ca772..2c6364d9641f 100644
--- a/arch/ppc/syslib/prep_nvram.c
+++ b/arch/ppc/syslib/prep_nvram.c
@@ -22,14 +22,14 @@
22static char nvramData[MAX_PREP_NVRAM]; 22static char nvramData[MAX_PREP_NVRAM];
23static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0]; 23static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0];
24 24
25unsigned char __prep prep_nvram_read_val(int addr) 25unsigned char prep_nvram_read_val(int addr)
26{ 26{
27 outb(addr, PREP_NVRAM_AS0); 27 outb(addr, PREP_NVRAM_AS0);
28 outb(addr>>8, PREP_NVRAM_AS1); 28 outb(addr>>8, PREP_NVRAM_AS1);
29 return inb(PREP_NVRAM_DATA); 29 return inb(PREP_NVRAM_DATA);
30} 30}
31 31
32void __prep prep_nvram_write_val(int addr, 32void prep_nvram_write_val(int addr,
33 unsigned char val) 33 unsigned char val)
34{ 34{
35 outb(addr, PREP_NVRAM_AS0); 35 outb(addr, PREP_NVRAM_AS0);
@@ -81,8 +81,7 @@ void __init init_prep_nvram(void)
81 } 81 }
82} 82}
83 83
84__prep 84char *prep_nvram_get_var(const char *name)
85char __prep *prep_nvram_get_var(const char *name)
86{ 85{
87 char *cp; 86 char *cp;
88 int namelen; 87 int namelen;
@@ -101,8 +100,7 @@ char __prep *prep_nvram_get_var(const char *name)
101 return NULL; 100 return NULL;
102} 101}
103 102
104__prep 103char *prep_nvram_first_var(void)
105char __prep *prep_nvram_first_var(void)
106{ 104{
107 if (nvram->Header.GELength == 0) { 105 if (nvram->Header.GELength == 0) {
108 return NULL; 106 return NULL;
@@ -112,8 +110,7 @@ char __prep *prep_nvram_first_var(void)
112 } 110 }
113} 111}
114 112
115__prep 113char *prep_nvram_next_var(char *name)
116char __prep *prep_nvram_next_var(char *name)
117{ 114{
118 char *cp; 115 char *cp;
119 116
diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c
index 2c64ed627475..278da6ee62ea 100644
--- a/arch/ppc/syslib/prom.c
+++ b/arch/ppc/syslib/prom.c
@@ -89,7 +89,7 @@ extern char cmd_line[512]; /* XXX */
89extern boot_infos_t *boot_infos; 89extern boot_infos_t *boot_infos;
90unsigned long dev_tree_size; 90unsigned long dev_tree_size;
91 91
92void __openfirmware 92void
93phys_call_rtas(int service, int nargs, int nret, ...) 93phys_call_rtas(int service, int nargs, int nret, ...)
94{ 94{
95 va_list list; 95 va_list list;
@@ -862,7 +862,7 @@ find_type_devices(const char *type)
862/* 862/*
863 * Returns all nodes linked together 863 * Returns all nodes linked together
864 */ 864 */
865struct device_node * __openfirmware 865struct device_node *
866find_all_nodes(void) 866find_all_nodes(void)
867{ 867{
868 struct device_node *head, **prevp, *np; 868 struct device_node *head, **prevp, *np;
@@ -1165,7 +1165,7 @@ get_property(struct device_node *np, const char *name, int *lenp)
1165/* 1165/*
1166 * Add a property to a node 1166 * Add a property to a node
1167 */ 1167 */
1168void __openfirmware 1168void
1169prom_add_property(struct device_node* np, struct property* prop) 1169prom_add_property(struct device_node* np, struct property* prop)
1170{ 1170{
1171 struct property **next = &np->properties; 1171 struct property **next = &np->properties;
@@ -1177,7 +1177,7 @@ prom_add_property(struct device_node* np, struct property* prop)
1177} 1177}
1178 1178
1179/* I quickly hacked that one, check against spec ! */ 1179/* I quickly hacked that one, check against spec ! */
1180static inline unsigned long __openfirmware 1180static inline unsigned long
1181bus_space_to_resource_flags(unsigned int bus_space) 1181bus_space_to_resource_flags(unsigned int bus_space)
1182{ 1182{
1183 u8 space = (bus_space >> 24) & 0xf; 1183 u8 space = (bus_space >> 24) & 0xf;
@@ -1194,7 +1194,7 @@ bus_space_to_resource_flags(unsigned int bus_space)
1194 } 1194 }
1195} 1195}
1196 1196
1197static struct resource* __openfirmware 1197static struct resource*
1198find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range) 1198find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1199{ 1199{
1200 unsigned long mask; 1200 unsigned long mask;
@@ -1224,7 +1224,7 @@ find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1224 * or other nodes attached to the root node. Ultimately, put some 1224 * or other nodes attached to the root node. Ultimately, put some
1225 * link to resources in the OF node. 1225 * link to resources in the OF node.
1226 */ 1226 */
1227struct resource* __openfirmware 1227struct resource*
1228request_OF_resource(struct device_node* node, int index, const char* name_postfix) 1228request_OF_resource(struct device_node* node, int index, const char* name_postfix)
1229{ 1229{
1230 struct pci_dev* pcidev; 1230 struct pci_dev* pcidev;
@@ -1280,7 +1280,7 @@ fail:
1280 return NULL; 1280 return NULL;
1281} 1281}
1282 1282
1283int __openfirmware 1283int
1284release_OF_resource(struct device_node* node, int index) 1284release_OF_resource(struct device_node* node, int index)
1285{ 1285{
1286 struct pci_dev* pcidev; 1286 struct pci_dev* pcidev;
@@ -1346,7 +1346,7 @@ release_OF_resource(struct device_node* node, int index)
1346} 1346}
1347 1347
1348#if 0 1348#if 0
1349void __openfirmware 1349void
1350print_properties(struct device_node *np) 1350print_properties(struct device_node *np)
1351{ 1351{
1352 struct property *pp; 1352 struct property *pp;
@@ -1400,7 +1400,7 @@ print_properties(struct device_node *np)
1400static DEFINE_SPINLOCK(rtas_lock); 1400static DEFINE_SPINLOCK(rtas_lock);
1401 1401
1402/* this can be called after setup -- Cort */ 1402/* this can be called after setup -- Cort */
1403int __openfirmware 1403int
1404call_rtas(const char *service, int nargs, int nret, 1404call_rtas(const char *service, int nargs, int nret,
1405 unsigned long *outputs, ...) 1405 unsigned long *outputs, ...)
1406{ 1406{
diff --git a/arch/ppc64/Kconfig b/arch/ppc64/Kconfig
index c658650af429..32951bfc7f65 100644
--- a/arch/ppc64/Kconfig
+++ b/arch/ppc64/Kconfig
@@ -461,7 +461,7 @@ config VIOPATH
461 depends on VIOCONS || VIODASD || VIOCD || VIOTAPE || VETH 461 depends on VIOCONS || VIODASD || VIOCD || VIOTAPE || VETH
462 default y 462 default y
463 463
464source "arch/ppc64/oprofile/Kconfig" 464source "arch/powerpc/oprofile/Kconfig"
465 465
466source "arch/ppc64/Kconfig.debug" 466source "arch/ppc64/Kconfig.debug"
467 467
diff --git a/arch/ppc64/Makefile b/arch/ppc64/Makefile
index 521c2a5a2862..40675b3f924d 100644
--- a/arch/ppc64/Makefile
+++ b/arch/ppc64/Makefile
@@ -85,7 +85,7 @@ libs-y += arch/ppc64/lib/
85core-y += arch/ppc64/kernel/ 85core-y += arch/ppc64/kernel/
86core-y += arch/ppc64/mm/ 86core-y += arch/ppc64/mm/
87core-$(CONFIG_XMON) += arch/ppc64/xmon/ 87core-$(CONFIG_XMON) += arch/ppc64/xmon/
88drivers-$(CONFIG_OPROFILE) += arch/ppc64/oprofile/ 88drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
89 89
90boot := arch/ppc64/boot 90boot := arch/ppc64/boot
91 91
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index ae60eb1193c6..813718df4f82 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -83,3 +83,6 @@ ifeq ($(CONFIG_PPC_ISERIES),y)
83arch/ppc64/kernel/head.o: arch/ppc64/kernel/lparmap.s 83arch/ppc64/kernel/head.o: arch/ppc64/kernel/lparmap.s
84AFLAGS_head.o += -Iarch/ppc64/kernel 84AFLAGS_head.o += -Iarch/ppc64/kernel
85endif 85endif
86
87# These are here while we do the architecture merge
88vecemu-y += ../../powerpc/kernel/vecemu.o
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 72c61041151a..22a5ee07e1ea 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -1992,7 +1992,7 @@ _GLOBAL(smp_release_cpus)
1992 */ 1992 */
1993 .section ".bss" 1993 .section ".bss"
1994 1994
1995 .align 12 1995 .align PAGE_SHIFT
1996 1996
1997 .globl empty_zero_page 1997 .globl empty_zero_page
1998empty_zero_page: 1998empty_zero_page:
diff --git a/arch/ppc64/kernel/iSeries_iommu.c b/arch/ppc64/kernel/iSeries_iommu.c
index f8ff1bb054dc..287db32d9867 100644
--- a/arch/ppc64/kernel/iSeries_iommu.c
+++ b/arch/ppc64/kernel/iSeries_iommu.c
@@ -30,6 +30,7 @@
30#include <linux/list.h> 30#include <linux/list.h>
31 31
32#include <asm/iommu.h> 32#include <asm/iommu.h>
33#include <asm/tce.h>
33#include <asm/machdep.h> 34#include <asm/machdep.h>
34#include <asm/iSeries/HvCallXm.h> 35#include <asm/iSeries/HvCallXm.h>
35#include <asm/iSeries/iSeries_pci.h> 36#include <asm/iSeries/iSeries_pci.h>
diff --git a/arch/ppc64/kernel/iSeries_vio.c b/arch/ppc64/kernel/iSeries_vio.c
index 6b754b0c8344..c0f7d2e9153f 100644
--- a/arch/ppc64/kernel/iSeries_vio.c
+++ b/arch/ppc64/kernel/iSeries_vio.c
@@ -14,6 +14,7 @@
14 14
15#include <asm/vio.h> 15#include <asm/vio.h>
16#include <asm/iommu.h> 16#include <asm/iommu.h>
17#include <asm/tce.h>
17#include <asm/abs_addr.h> 18#include <asm/abs_addr.h>
18#include <asm/page.h> 19#include <asm/page.h>
19#include <asm/iSeries/vio.h> 20#include <asm/iSeries/vio.h>
diff --git a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S
index e7241ad80a08..a25b59759ddb 100644
--- a/arch/ppc64/kernel/misc.S
+++ b/arch/ppc64/kernel/misc.S
@@ -329,7 +329,7 @@ _GLOBAL(__flush_dcache_icache)
329 329
330/* Flush the dcache */ 330/* Flush the dcache */
331 ld r7,PPC64_CACHES@toc(r2) 331 ld r7,PPC64_CACHES@toc(r2)
332 clrrdi r3,r3,12 /* Page align */ 332 clrrdi r3,r3,PAGE_SHIFT /* Page align */
333 lwz r4,DCACHEL1LINESPERPAGE(r7) /* Get # dcache lines per page */ 333 lwz r4,DCACHEL1LINESPERPAGE(r7) /* Get # dcache lines per page */
334 lwz r5,DCACHEL1LINESIZE(r7) /* Get dcache line size */ 334 lwz r5,DCACHEL1LINESIZE(r7) /* Get dcache line size */
335 mr r6,r3 335 mr r6,r3
diff --git a/arch/ppc64/kernel/pSeries_iommu.c b/arch/ppc64/kernel/pSeries_iommu.c
index d17f0108a032..5914f61a152e 100644
--- a/arch/ppc64/kernel/pSeries_iommu.c
+++ b/arch/ppc64/kernel/pSeries_iommu.c
@@ -46,6 +46,7 @@
46#include <asm/pSeries_reconfig.h> 46#include <asm/pSeries_reconfig.h>
47#include <asm/systemcfg.h> 47#include <asm/systemcfg.h>
48#include <asm/firmware.h> 48#include <asm/firmware.h>
49#include <asm/tce.h>
49#include "pci.h" 50#include "pci.h"
50 51
51#define DBG(fmt...) 52#define DBG(fmt...)
@@ -59,6 +60,9 @@ static void tce_build_pSeries(struct iommu_table *tbl, long index,
59 union tce_entry t; 60 union tce_entry t;
60 union tce_entry *tp; 61 union tce_entry *tp;
61 62
63 index <<= TCE_PAGE_FACTOR;
64 npages <<= TCE_PAGE_FACTOR;
65
62 t.te_word = 0; 66 t.te_word = 0;
63 t.te_rdwr = 1; // Read allowed 67 t.te_rdwr = 1; // Read allowed
64 68
@@ -69,11 +73,11 @@ static void tce_build_pSeries(struct iommu_table *tbl, long index,
69 73
70 while (npages--) { 74 while (npages--) {
71 /* can't move this out since we might cross LMB boundary */ 75 /* can't move this out since we might cross LMB boundary */
72 t.te_rpn = (virt_to_abs(uaddr)) >> PAGE_SHIFT; 76 t.te_rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
73 77
74 tp->te_word = t.te_word; 78 tp->te_word = t.te_word;
75 79
76 uaddr += PAGE_SIZE; 80 uaddr += TCE_PAGE_SIZE;
77 tp++; 81 tp++;
78 } 82 }
79} 83}
@@ -84,6 +88,9 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
84 union tce_entry t; 88 union tce_entry t;
85 union tce_entry *tp; 89 union tce_entry *tp;
86 90
91 npages <<= TCE_PAGE_FACTOR;
92 index <<= TCE_PAGE_FACTOR;
93
87 t.te_word = 0; 94 t.te_word = 0;
88 tp = ((union tce_entry *)tbl->it_base) + index; 95 tp = ((union tce_entry *)tbl->it_base) + index;
89 96
@@ -103,7 +110,7 @@ static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
103 union tce_entry tce; 110 union tce_entry tce;
104 111
105 tce.te_word = 0; 112 tce.te_word = 0;
106 tce.te_rpn = (virt_to_abs(uaddr)) >> PAGE_SHIFT; 113 tce.te_rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
107 tce.te_rdwr = 1; 114 tce.te_rdwr = 1;
108 if (direction != DMA_TO_DEVICE) 115 if (direction != DMA_TO_DEVICE)
109 tce.te_pciwr = 1; 116 tce.te_pciwr = 1;
@@ -136,6 +143,9 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
136 union tce_entry tce, *tcep; 143 union tce_entry tce, *tcep;
137 long l, limit; 144 long l, limit;
138 145
146 tcenum <<= TCE_PAGE_FACTOR;
147 npages <<= TCE_PAGE_FACTOR;
148
139 if (npages == 1) 149 if (npages == 1)
140 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, 150 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
141 direction); 151 direction);
@@ -155,7 +165,7 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
155 } 165 }
156 166
157 tce.te_word = 0; 167 tce.te_word = 0;
158 tce.te_rpn = (virt_to_abs(uaddr)) >> PAGE_SHIFT; 168 tce.te_rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
159 tce.te_rdwr = 1; 169 tce.te_rdwr = 1;
160 if (direction != DMA_TO_DEVICE) 170 if (direction != DMA_TO_DEVICE)
161 tce.te_pciwr = 1; 171 tce.te_pciwr = 1;
@@ -166,7 +176,7 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
166 * Set up the page with TCE data, looping through and setting 176 * Set up the page with TCE data, looping through and setting
167 * the values. 177 * the values.
168 */ 178 */
169 limit = min_t(long, npages, PAGE_SIZE/sizeof(union tce_entry)); 179 limit = min_t(long, npages, 4096/sizeof(union tce_entry));
170 180
171 for (l = 0; l < limit; l++) { 181 for (l = 0; l < limit; l++) {
172 tcep[l] = tce; 182 tcep[l] = tce;
@@ -196,6 +206,9 @@ static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages
196 u64 rc; 206 u64 rc;
197 union tce_entry tce; 207 union tce_entry tce;
198 208
209 tcenum <<= TCE_PAGE_FACTOR;
210 npages <<= TCE_PAGE_FACTOR;
211
199 tce.te_word = 0; 212 tce.te_word = 0;
200 213
201 while (npages--) { 214 while (npages--) {
@@ -221,6 +234,9 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
221 u64 rc; 234 u64 rc;
222 union tce_entry tce; 235 union tce_entry tce;
223 236
237 tcenum <<= TCE_PAGE_FACTOR;
238 npages <<= TCE_PAGE_FACTOR;
239
224 tce.te_word = 0; 240 tce.te_word = 0;
225 241
226 rc = plpar_tce_stuff((u64)tbl->it_index, 242 rc = plpar_tce_stuff((u64)tbl->it_index,
diff --git a/arch/ppc64/kernel/pSeries_lpar.c b/arch/ppc64/kernel/pSeries_lpar.c
index a6de83f2078f..268d8362dde7 100644
--- a/arch/ppc64/kernel/pSeries_lpar.c
+++ b/arch/ppc64/kernel/pSeries_lpar.c
@@ -486,8 +486,7 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
486 * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie 486 * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
487 * lock. 487 * lock.
488 */ 488 */
489void pSeries_lpar_flush_hash_range(unsigned long context, unsigned long number, 489void pSeries_lpar_flush_hash_range(unsigned long number, int local)
490 int local)
491{ 490{
492 int i; 491 int i;
493 unsigned long flags = 0; 492 unsigned long flags = 0;
@@ -498,7 +497,7 @@ void pSeries_lpar_flush_hash_range(unsigned long context, unsigned long number,
498 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags); 497 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
499 498
500 for (i = 0; i < number; i++) 499 for (i = 0; i < number; i++)
501 flush_hash_page(context, batch->addr[i], batch->pte[i], local); 500 flush_hash_page(batch->vaddr[i], batch->pte[i], local);
502 501
503 if (lock_tlbie) 502 if (lock_tlbie)
504 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags); 503 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
diff --git a/arch/ppc64/kernel/pSeries_vio.c b/arch/ppc64/kernel/pSeries_vio.c
index e0ae06f58f86..866379b80c09 100644
--- a/arch/ppc64/kernel/pSeries_vio.c
+++ b/arch/ppc64/kernel/pSeries_vio.c
@@ -22,6 +22,7 @@
22#include <asm/prom.h> 22#include <asm/prom.h>
23#include <asm/vio.h> 23#include <asm/vio.h>
24#include <asm/hvcall.h> 24#include <asm/hvcall.h>
25#include <asm/tce.h>
25 26
26extern struct subsystem devices_subsys; /* needed for vio_find_name() */ 27extern struct subsystem devices_subsys; /* needed for vio_find_name() */
27 28
diff --git a/arch/ppc64/kernel/pmac_feature.c b/arch/ppc64/kernel/pmac_feature.c
index eb4e6c3f694d..26075f11db77 100644
--- a/arch/ppc64/kernel/pmac_feature.c
+++ b/arch/ppc64/kernel/pmac_feature.c
@@ -53,7 +53,7 @@
53 * We use a single global lock to protect accesses. Each driver has 53 * We use a single global lock to protect accesses. Each driver has
54 * to take care of its own locking 54 * to take care of its own locking
55 */ 55 */
56static DEFINE_SPINLOCK(feature_lock __pmacdata); 56static DEFINE_SPINLOCK(feature_lock);
57 57
58#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 58#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
59#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 59#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
@@ -62,9 +62,9 @@ static DEFINE_SPINLOCK(feature_lock __pmacdata);
62/* 62/*
63 * Instance of some macio stuffs 63 * Instance of some macio stuffs
64 */ 64 */
65struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata; 65struct macio_chip macio_chips[MAX_MACIO_CHIPS] ;
66 66
67struct macio_chip* __pmac macio_find(struct device_node* child, int type) 67struct macio_chip* macio_find(struct device_node* child, int type)
68{ 68{
69 while(child) { 69 while(child) {
70 int i; 70 int i;
@@ -79,7 +79,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type)
79} 79}
80EXPORT_SYMBOL_GPL(macio_find); 80EXPORT_SYMBOL_GPL(macio_find);
81 81
82static const char* macio_names[] __pmacdata = 82static const char* macio_names[] =
83{ 83{
84 "Unknown", 84 "Unknown",
85 "Grand Central", 85 "Grand Central",
@@ -106,9 +106,9 @@ static const char* macio_names[] __pmacdata =
106#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 106#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
107#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 107#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
108 108
109static struct device_node* uninorth_node __pmacdata; 109static struct device_node* uninorth_node;
110static u32* uninorth_base __pmacdata; 110static u32* uninorth_base;
111static u32 uninorth_rev __pmacdata; 111static u32 uninorth_rev;
112static void *u3_ht; 112static void *u3_ht;
113 113
114extern struct device_node *k2_skiplist[2]; 114extern struct device_node *k2_skiplist[2];
@@ -133,14 +133,14 @@ struct pmac_mb_def
133 struct feature_table_entry* features; 133 struct feature_table_entry* features;
134 unsigned long board_flags; 134 unsigned long board_flags;
135}; 135};
136static struct pmac_mb_def pmac_mb __pmacdata; 136static struct pmac_mb_def pmac_mb;
137 137
138/* 138/*
139 * Here are the chip specific feature functions 139 * Here are the chip specific feature functions
140 */ 140 */
141 141
142 142
143static long __pmac g5_read_gpio(struct device_node* node, long param, long value) 143static long g5_read_gpio(struct device_node* node, long param, long value)
144{ 144{
145 struct macio_chip* macio = &macio_chips[0]; 145 struct macio_chip* macio = &macio_chips[0];
146 146
@@ -148,7 +148,7 @@ static long __pmac g5_read_gpio(struct device_node* node, long param, long value
148} 148}
149 149
150 150
151static long __pmac g5_write_gpio(struct device_node* node, long param, long value) 151static long g5_write_gpio(struct device_node* node, long param, long value)
152{ 152{
153 struct macio_chip* macio = &macio_chips[0]; 153 struct macio_chip* macio = &macio_chips[0];
154 154
@@ -156,7 +156,7 @@ static long __pmac g5_write_gpio(struct device_node* node, long param, long valu
156 return 0; 156 return 0;
157} 157}
158 158
159static long __pmac g5_gmac_enable(struct device_node* node, long param, long value) 159static long g5_gmac_enable(struct device_node* node, long param, long value)
160{ 160{
161 struct macio_chip* macio = &macio_chips[0]; 161 struct macio_chip* macio = &macio_chips[0];
162 unsigned long flags; 162 unsigned long flags;
@@ -181,7 +181,7 @@ static long __pmac g5_gmac_enable(struct device_node* node, long param, long val
181 return 0; 181 return 0;
182} 182}
183 183
184static long __pmac g5_fw_enable(struct device_node* node, long param, long value) 184static long g5_fw_enable(struct device_node* node, long param, long value)
185{ 185{
186 struct macio_chip* macio = &macio_chips[0]; 186 struct macio_chip* macio = &macio_chips[0];
187 unsigned long flags; 187 unsigned long flags;
@@ -206,7 +206,7 @@ static long __pmac g5_fw_enable(struct device_node* node, long param, long value
206 return 0; 206 return 0;
207} 207}
208 208
209static long __pmac g5_mpic_enable(struct device_node* node, long param, long value) 209static long g5_mpic_enable(struct device_node* node, long param, long value)
210{ 210{
211 unsigned long flags; 211 unsigned long flags;
212 212
@@ -220,7 +220,7 @@ static long __pmac g5_mpic_enable(struct device_node* node, long param, long val
220 return 0; 220 return 0;
221} 221}
222 222
223static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long value) 223static long g5_eth_phy_reset(struct device_node* node, long param, long value)
224{ 224{
225 struct macio_chip* macio = &macio_chips[0]; 225 struct macio_chip* macio = &macio_chips[0];
226 struct device_node *phy; 226 struct device_node *phy;
@@ -250,7 +250,7 @@ static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long v
250 return 0; 250 return 0;
251} 251}
252 252
253static long __pmac g5_i2s_enable(struct device_node *node, long param, long value) 253static long g5_i2s_enable(struct device_node *node, long param, long value)
254{ 254{
255 /* Very crude implementation for now */ 255 /* Very crude implementation for now */
256 struct macio_chip* macio = &macio_chips[0]; 256 struct macio_chip* macio = &macio_chips[0];
@@ -275,7 +275,7 @@ static long __pmac g5_i2s_enable(struct device_node *node, long param, long valu
275 275
276 276
277#ifdef CONFIG_SMP 277#ifdef CONFIG_SMP
278static long __pmac g5_reset_cpu(struct device_node* node, long param, long value) 278static long g5_reset_cpu(struct device_node* node, long param, long value)
279{ 279{
280 unsigned int reset_io = 0; 280 unsigned int reset_io = 0;
281 unsigned long flags; 281 unsigned long flags;
@@ -320,12 +320,12 @@ static long __pmac g5_reset_cpu(struct device_node* node, long param, long value
320 * This takes the second CPU off the bus on dual CPU machines 320 * This takes the second CPU off the bus on dual CPU machines
321 * running UP 321 * running UP
322 */ 322 */
323void __pmac g5_phy_disable_cpu1(void) 323void g5_phy_disable_cpu1(void)
324{ 324{
325 UN_OUT(U3_API_PHY_CONFIG_1, 0); 325 UN_OUT(U3_API_PHY_CONFIG_1, 0);
326} 326}
327 327
328static long __pmac generic_get_mb_info(struct device_node* node, long param, long value) 328static long generic_get_mb_info(struct device_node* node, long param, long value)
329{ 329{
330 switch(param) { 330 switch(param) {
331 case PMAC_MB_INFO_MODEL: 331 case PMAC_MB_INFO_MODEL:
@@ -347,14 +347,14 @@ static long __pmac generic_get_mb_info(struct device_node* node, long param, lon
347 347
348/* Used on any machine 348/* Used on any machine
349 */ 349 */
350static struct feature_table_entry any_features[] __pmacdata = { 350static struct feature_table_entry any_features[] = {
351 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 351 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
352 { 0, NULL } 352 { 0, NULL }
353}; 353};
354 354
355/* G5 features 355/* G5 features
356 */ 356 */
357static struct feature_table_entry g5_features[] __pmacdata = { 357static struct feature_table_entry g5_features[] = {
358 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 358 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
359 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 359 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
360 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 360 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
@@ -368,7 +368,7 @@ static struct feature_table_entry g5_features[] __pmacdata = {
368 { 0, NULL } 368 { 0, NULL }
369}; 369};
370 370
371static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { 371static struct pmac_mb_def pmac_mb_defs[] = {
372 { "PowerMac7,2", "PowerMac G5", 372 { "PowerMac7,2", "PowerMac G5",
373 PMAC_TYPE_POWERMAC_G5, g5_features, 373 PMAC_TYPE_POWERMAC_G5, g5_features,
374 0, 374 0,
@@ -394,7 +394,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
394/* 394/*
395 * The toplevel feature_call callback 395 * The toplevel feature_call callback
396 */ 396 */
397long __pmac pmac_do_feature_call(unsigned int selector, ...) 397long pmac_do_feature_call(unsigned int selector, ...)
398{ 398{
399 struct device_node* node; 399 struct device_node* node;
400 long param, value; 400 long param, value;
@@ -706,8 +706,8 @@ void __init pmac_check_ht_link(void)
706 * Early video resume hook 706 * Early video resume hook
707 */ 707 */
708 708
709static void (*pmac_early_vresume_proc)(void *data) __pmacdata; 709static void (*pmac_early_vresume_proc)(void *data);
710static void *pmac_early_vresume_data __pmacdata; 710static void *pmac_early_vresume_data;
711 711
712void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 712void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
713{ 713{
@@ -725,11 +725,11 @@ EXPORT_SYMBOL(pmac_set_early_video_resume);
725 * AGP related suspend/resume code 725 * AGP related suspend/resume code
726 */ 726 */
727 727
728static struct pci_dev *pmac_agp_bridge __pmacdata; 728static struct pci_dev *pmac_agp_bridge;
729static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata; 729static int (*pmac_agp_suspend)(struct pci_dev *bridge);
730static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata; 730static int (*pmac_agp_resume)(struct pci_dev *bridge);
731 731
732void __pmac pmac_register_agp_pm(struct pci_dev *bridge, 732void pmac_register_agp_pm(struct pci_dev *bridge,
733 int (*suspend)(struct pci_dev *bridge), 733 int (*suspend)(struct pci_dev *bridge),
734 int (*resume)(struct pci_dev *bridge)) 734 int (*resume)(struct pci_dev *bridge))
735{ 735{
@@ -746,7 +746,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
746} 746}
747EXPORT_SYMBOL(pmac_register_agp_pm); 747EXPORT_SYMBOL(pmac_register_agp_pm);
748 748
749void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) 749void pmac_suspend_agp_for_card(struct pci_dev *dev)
750{ 750{
751 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 751 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
752 return; 752 return;
@@ -756,7 +756,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
756} 756}
757EXPORT_SYMBOL(pmac_suspend_agp_for_card); 757EXPORT_SYMBOL(pmac_suspend_agp_for_card);
758 758
759void __pmac pmac_resume_agp_for_card(struct pci_dev *dev) 759void pmac_resume_agp_for_card(struct pci_dev *dev)
760{ 760{
761 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 761 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
762 return; 762 return;
diff --git a/arch/ppc64/kernel/pmac_nvram.c b/arch/ppc64/kernel/pmac_nvram.c
index e32a902236e3..11586d535f81 100644
--- a/arch/ppc64/kernel/pmac_nvram.c
+++ b/arch/ppc64/kernel/pmac_nvram.c
@@ -82,10 +82,10 @@ extern int system_running;
82static int (*core99_write_bank)(int bank, u8* datas); 82static int (*core99_write_bank)(int bank, u8* datas);
83static int (*core99_erase_bank)(int bank); 83static int (*core99_erase_bank)(int bank);
84 84
85static char *nvram_image __pmacdata; 85static char *nvram_image;
86 86
87 87
88static ssize_t __pmac core99_nvram_read(char *buf, size_t count, loff_t *index) 88static ssize_t core99_nvram_read(char *buf, size_t count, loff_t *index)
89{ 89{
90 int i; 90 int i;
91 91
@@ -103,7 +103,7 @@ static ssize_t __pmac core99_nvram_read(char *buf, size_t count, loff_t *index)
103 return count; 103 return count;
104} 104}
105 105
106static ssize_t __pmac core99_nvram_write(char *buf, size_t count, loff_t *index) 106static ssize_t core99_nvram_write(char *buf, size_t count, loff_t *index)
107{ 107{
108 int i; 108 int i;
109 109
@@ -121,14 +121,14 @@ static ssize_t __pmac core99_nvram_write(char *buf, size_t count, loff_t *index)
121 return count; 121 return count;
122} 122}
123 123
124static ssize_t __pmac core99_nvram_size(void) 124static ssize_t core99_nvram_size(void)
125{ 125{
126 if (nvram_image == NULL) 126 if (nvram_image == NULL)
127 return -ENODEV; 127 return -ENODEV;
128 return NVRAM_SIZE; 128 return NVRAM_SIZE;
129} 129}
130 130
131static u8 __pmac chrp_checksum(struct chrp_header* hdr) 131static u8 chrp_checksum(struct chrp_header* hdr)
132{ 132{
133 u8 *ptr; 133 u8 *ptr;
134 u16 sum = hdr->signature; 134 u16 sum = hdr->signature;
@@ -139,7 +139,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
139 return sum; 139 return sum;
140} 140}
141 141
142static u32 __pmac core99_calc_adler(u8 *buffer) 142static u32 core99_calc_adler(u8 *buffer)
143{ 143{
144 int cnt; 144 int cnt;
145 u32 low, high; 145 u32 low, high;
@@ -161,7 +161,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
161 return (high << 16) | low; 161 return (high << 16) | low;
162} 162}
163 163
164static u32 __pmac core99_check(u8* datas) 164static u32 core99_check(u8* datas)
165{ 165{
166 struct core99_header* hdr99 = (struct core99_header*)datas; 166 struct core99_header* hdr99 = (struct core99_header*)datas;
167 167
@@ -180,7 +180,7 @@ static u32 __pmac core99_check(u8* datas)
180 return hdr99->generation; 180 return hdr99->generation;
181} 181}
182 182
183static int __pmac sm_erase_bank(int bank) 183static int sm_erase_bank(int bank)
184{ 184{
185 int stat, i; 185 int stat, i;
186 unsigned long timeout; 186 unsigned long timeout;
@@ -212,7 +212,7 @@ static int __pmac sm_erase_bank(int bank)
212 return 0; 212 return 0;
213} 213}
214 214
215static int __pmac sm_write_bank(int bank, u8* datas) 215static int sm_write_bank(int bank, u8* datas)
216{ 216{
217 int i, stat = 0; 217 int i, stat = 0;
218 unsigned long timeout; 218 unsigned long timeout;
@@ -247,7 +247,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
247 return 0; 247 return 0;
248} 248}
249 249
250static int __pmac amd_erase_bank(int bank) 250static int amd_erase_bank(int bank)
251{ 251{
252 int i, stat = 0; 252 int i, stat = 0;
253 unsigned long timeout; 253 unsigned long timeout;
@@ -294,7 +294,7 @@ static int __pmac amd_erase_bank(int bank)
294 return 0; 294 return 0;
295} 295}
296 296
297static int __pmac amd_write_bank(int bank, u8* datas) 297static int amd_write_bank(int bank, u8* datas)
298{ 298{
299 int i, stat = 0; 299 int i, stat = 0;
300 unsigned long timeout; 300 unsigned long timeout;
@@ -341,7 +341,7 @@ static int __pmac amd_write_bank(int bank, u8* datas)
341} 341}
342 342
343 343
344static int __pmac core99_nvram_sync(void) 344static int core99_nvram_sync(void)
345{ 345{
346 struct core99_header* hdr99; 346 struct core99_header* hdr99;
347 unsigned long flags; 347 unsigned long flags;
@@ -431,7 +431,7 @@ int __init pmac_nvram_init(void)
431 return 0; 431 return 0;
432} 432}
433 433
434int __pmac pmac_get_partition(int partition) 434int pmac_get_partition(int partition)
435{ 435{
436 struct nvram_partition *part; 436 struct nvram_partition *part;
437 const char *name; 437 const char *name;
@@ -459,7 +459,7 @@ int __pmac pmac_get_partition(int partition)
459 return part->index; 459 return part->index;
460} 460}
461 461
462u8 __pmac pmac_xpram_read(int xpaddr) 462u8 pmac_xpram_read(int xpaddr)
463{ 463{
464 int offset = pmac_get_partition(pmac_nvram_XPRAM); 464 int offset = pmac_get_partition(pmac_nvram_XPRAM);
465 loff_t index; 465 loff_t index;
@@ -476,7 +476,7 @@ u8 __pmac pmac_xpram_read(int xpaddr)
476 return buf; 476 return buf;
477} 477}
478 478
479void __pmac pmac_xpram_write(int xpaddr, u8 data) 479void pmac_xpram_write(int xpaddr, u8 data)
480{ 480{
481 int offset = pmac_get_partition(pmac_nvram_XPRAM); 481 int offset = pmac_get_partition(pmac_nvram_XPRAM);
482 loff_t index; 482 loff_t index;
diff --git a/arch/ppc64/kernel/pmac_pci.c b/arch/ppc64/kernel/pmac_pci.c
index dc40a0cad0b4..1f61aa4746ec 100644
--- a/arch/ppc64/kernel/pmac_pci.c
+++ b/arch/ppc64/kernel/pmac_pci.c
@@ -121,7 +121,7 @@ static void __init fixup_bus_range(struct device_node *bridge)
121 |(((unsigned long)(off)) & 0xFCUL) \ 121 |(((unsigned long)(off)) & 0xFCUL) \
122 |1UL) 122 |1UL)
123 123
124static unsigned long __pmac macrisc_cfg_access(struct pci_controller* hose, 124static unsigned long macrisc_cfg_access(struct pci_controller* hose,
125 u8 bus, u8 dev_fn, u8 offset) 125 u8 bus, u8 dev_fn, u8 offset)
126{ 126{
127 unsigned int caddr; 127 unsigned int caddr;
@@ -142,7 +142,7 @@ static unsigned long __pmac macrisc_cfg_access(struct pci_controller* hose,
142 return ((unsigned long)hose->cfg_data) + offset; 142 return ((unsigned long)hose->cfg_data) + offset;
143} 143}
144 144
145static int __pmac macrisc_read_config(struct pci_bus *bus, unsigned int devfn, 145static int macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
146 int offset, int len, u32 *val) 146 int offset, int len, u32 *val)
147{ 147{
148 struct pci_controller *hose; 148 struct pci_controller *hose;
@@ -173,7 +173,7 @@ static int __pmac macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
173 return PCIBIOS_SUCCESSFUL; 173 return PCIBIOS_SUCCESSFUL;
174} 174}
175 175
176static int __pmac macrisc_write_config(struct pci_bus *bus, unsigned int devfn, 176static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
177 int offset, int len, u32 val) 177 int offset, int len, u32 val)
178{ 178{
179 struct pci_controller *hose; 179 struct pci_controller *hose;
@@ -265,7 +265,7 @@ static int u3_ht_skip_device(struct pci_controller *hose,
265 + (((unsigned long)bus) << 16) \ 265 + (((unsigned long)bus) << 16) \
266 + 0x01000000UL) 266 + 0x01000000UL)
267 267
268static unsigned long __pmac u3_ht_cfg_access(struct pci_controller* hose, 268static unsigned long u3_ht_cfg_access(struct pci_controller* hose,
269 u8 bus, u8 devfn, u8 offset) 269 u8 bus, u8 devfn, u8 offset)
270{ 270{
271 if (bus == hose->first_busno) { 271 if (bus == hose->first_busno) {
@@ -277,7 +277,7 @@ static unsigned long __pmac u3_ht_cfg_access(struct pci_controller* hose,
277 return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset); 277 return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset);
278} 278}
279 279
280static int __pmac u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, 280static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
281 int offset, int len, u32 *val) 281 int offset, int len, u32 *val)
282{ 282{
283 struct pci_controller *hose; 283 struct pci_controller *hose;
@@ -327,7 +327,7 @@ static int __pmac u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
327 return PCIBIOS_SUCCESSFUL; 327 return PCIBIOS_SUCCESSFUL;
328} 328}
329 329
330static int __pmac u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, 330static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
331 int offset, int len, u32 val) 331 int offset, int len, u32 val)
332{ 332{
333 struct pci_controller *hose; 333 struct pci_controller *hose;
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
index 25755252067a..bb0c3bfbb7e2 100644
--- a/arch/ppc64/kernel/pmac_setup.c
+++ b/arch/ppc64/kernel/pmac_setup.c
@@ -98,7 +98,7 @@ EXPORT_SYMBOL(smu_cmdbuf_abs);
98 98
99extern void udbg_init_scc(struct device_node *np); 99extern void udbg_init_scc(struct device_node *np);
100 100
101static void __pmac pmac_show_cpuinfo(struct seq_file *m) 101static void pmac_show_cpuinfo(struct seq_file *m)
102{ 102{
103 struct device_node *np; 103 struct device_node *np;
104 char *pp; 104 char *pp;
@@ -210,7 +210,7 @@ static int pmac_late_init(void)
210late_initcall(pmac_late_init); 210late_initcall(pmac_late_init);
211 211
212/* can't be __init - can be called whenever a disk is first accessed */ 212/* can't be __init - can be called whenever a disk is first accessed */
213void __pmac note_bootable_part(dev_t dev, int part, int goodness) 213void note_bootable_part(dev_t dev, int part, int goodness)
214{ 214{
215 extern dev_t boot_dev; 215 extern dev_t boot_dev;
216 char *p; 216 char *p;
@@ -231,7 +231,7 @@ void __pmac note_bootable_part(dev_t dev, int part, int goodness)
231 } 231 }
232} 232}
233 233
234static void __pmac pmac_restart(char *cmd) 234static void pmac_restart(char *cmd)
235{ 235{
236 switch(sys_ctrler) { 236 switch(sys_ctrler) {
237#ifdef CONFIG_ADB_PMU 237#ifdef CONFIG_ADB_PMU
@@ -250,7 +250,7 @@ static void __pmac pmac_restart(char *cmd)
250 } 250 }
251} 251}
252 252
253static void __pmac pmac_power_off(void) 253static void pmac_power_off(void)
254{ 254{
255 switch(sys_ctrler) { 255 switch(sys_ctrler) {
256#ifdef CONFIG_ADB_PMU 256#ifdef CONFIG_ADB_PMU
@@ -268,7 +268,7 @@ static void __pmac pmac_power_off(void)
268 } 268 }
269} 269}
270 270
271static void __pmac pmac_halt(void) 271static void pmac_halt(void)
272{ 272{
273 pmac_power_off(); 273 pmac_power_off();
274} 274}
diff --git a/arch/ppc64/kernel/pmac_smp.c b/arch/ppc64/kernel/pmac_smp.c
index a23de37227bf..9fd23ea55bc9 100644
--- a/arch/ppc64/kernel/pmac_smp.c
+++ b/arch/ppc64/kernel/pmac_smp.c
@@ -310,7 +310,7 @@ static void __init smp_core99_setup_cpu(int cpu_nr)
310 } 310 }
311} 311}
312 312
313struct smp_ops_t core99_smp_ops __pmacdata = { 313struct smp_ops_t core99_smp_ops = {
314 .message_pass = smp_mpic_message_pass, 314 .message_pass = smp_mpic_message_pass,
315 .probe = smp_core99_probe, 315 .probe = smp_core99_probe,
316 .kick_cpu = smp_core99_kick_cpu, 316 .kick_cpu = smp_core99_kick_cpu,
diff --git a/arch/ppc64/kernel/pmac_time.c b/arch/ppc64/kernel/pmac_time.c
index 41bbb8c59697..9d8c97decd32 100644
--- a/arch/ppc64/kernel/pmac_time.c
+++ b/arch/ppc64/kernel/pmac_time.c
@@ -51,7 +51,7 @@
51extern struct timezone sys_tz; 51extern struct timezone sys_tz;
52extern void to_tm(int tim, struct rtc_time * tm); 52extern void to_tm(int tim, struct rtc_time * tm);
53 53
54void __pmac pmac_get_rtc_time(struct rtc_time *tm) 54void pmac_get_rtc_time(struct rtc_time *tm)
55{ 55{
56 switch(sys_ctrler) { 56 switch(sys_ctrler) {
57#ifdef CONFIG_ADB_PMU 57#ifdef CONFIG_ADB_PMU
@@ -92,7 +92,7 @@ void __pmac pmac_get_rtc_time(struct rtc_time *tm)
92 } 92 }
93} 93}
94 94
95int __pmac pmac_set_rtc_time(struct rtc_time *tm) 95int pmac_set_rtc_time(struct rtc_time *tm)
96{ 96{
97 switch(sys_ctrler) { 97 switch(sys_ctrler) {
98#ifdef CONFIG_ADB_PMU 98#ifdef CONFIG_ADB_PMU
diff --git a/arch/ppc64/kernel/time.c b/arch/ppc64/kernel/time.c
index 9939c206afa4..fb4bf0ad8f32 100644
--- a/arch/ppc64/kernel/time.c
+++ b/arch/ppc64/kernel/time.c
@@ -319,7 +319,7 @@ unsigned long tb_last_stamp __cacheline_aligned_in_smp;
319 * timer_interrupt - gets called when the decrementer overflows, 319 * timer_interrupt - gets called when the decrementer overflows,
320 * with interrupts disabled. 320 * with interrupts disabled.
321 */ 321 */
322int timer_interrupt(struct pt_regs * regs) 322void timer_interrupt(struct pt_regs * regs)
323{ 323{
324 int next_dec; 324 int next_dec;
325 unsigned long cur_tb; 325 unsigned long cur_tb;
@@ -377,8 +377,6 @@ int timer_interrupt(struct pt_regs * regs)
377 } 377 }
378 378
379 irq_exit(); 379 irq_exit();
380
381 return 1;
382} 380}
383 381
384/* 382/*
diff --git a/arch/ppc64/kernel/traps.c b/arch/ppc64/kernel/traps.c
index 7467ae508e6e..5c4647b2c5f3 100644
--- a/arch/ppc64/kernel/traps.c
+++ b/arch/ppc64/kernel/traps.c
@@ -390,12 +390,12 @@ check_bug_trap(struct pt_regs *regs)
390 /* this is a WARN_ON rather than BUG/BUG_ON */ 390 /* this is a WARN_ON rather than BUG/BUG_ON */
391 printk(KERN_ERR "Badness in %s at %s:%d\n", 391 printk(KERN_ERR "Badness in %s at %s:%d\n",
392 bug->function, bug->file, 392 bug->function, bug->file,
393 (unsigned int)bug->line & ~BUG_WARNING_TRAP); 393 bug->line & ~BUG_WARNING_TRAP);
394 show_stack(current, (void *)regs->gpr[1]); 394 show_stack(current, (void *)regs->gpr[1]);
395 return 1; 395 return 1;
396 } 396 }
397 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n", 397 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
398 bug->function, bug->file, (unsigned int)bug->line); 398 bug->function, bug->file, bug->line);
399 return 0; 399 return 0;
400} 400}
401 401
diff --git a/arch/ppc64/kernel/u3_iommu.c b/arch/ppc64/kernel/u3_iommu.c
index 41ea09cb9ac7..df9c775f4955 100644
--- a/arch/ppc64/kernel/u3_iommu.c
+++ b/arch/ppc64/kernel/u3_iommu.c
@@ -44,39 +44,12 @@
44#include <asm/abs_addr.h> 44#include <asm/abs_addr.h>
45#include <asm/cacheflush.h> 45#include <asm/cacheflush.h>
46#include <asm/lmb.h> 46#include <asm/lmb.h>
47#include <asm/dart.h>
47 48
48#include "pci.h" 49#include "pci.h"
49 50
50extern int iommu_force_on; 51extern int iommu_force_on;
51 52
52/* physical base of DART registers */
53#define DART_BASE 0xf8033000UL
54
55/* Offset from base to control register */
56#define DARTCNTL 0
57/* Offset from base to exception register */
58#define DARTEXCP 0x10
59/* Offset from base to TLB tag registers */
60#define DARTTAG 0x1000
61
62
63/* Control Register fields */
64
65/* base address of table (pfn) */
66#define DARTCNTL_BASE_MASK 0xfffff
67#define DARTCNTL_BASE_SHIFT 12
68
69#define DARTCNTL_FLUSHTLB 0x400
70#define DARTCNTL_ENABLE 0x200
71
72/* size of table in pages */
73#define DARTCNTL_SIZE_MASK 0x1ff
74#define DARTCNTL_SIZE_SHIFT 0
75
76/* DART table fields */
77#define DARTMAP_VALID 0x80000000
78#define DARTMAP_RPNMASK 0x00ffffff
79
80/* Physical base address and size of the DART table */ 53/* Physical base address and size of the DART table */
81unsigned long dart_tablebase; /* exported to htab_initialize */ 54unsigned long dart_tablebase; /* exported to htab_initialize */
82static unsigned long dart_tablesize; 55static unsigned long dart_tablesize;
@@ -152,18 +125,21 @@ static void dart_build(struct iommu_table *tbl, long index,
152 125
153 DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr); 126 DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr);
154 127
128 index <<= DART_PAGE_FACTOR;
129 npages <<= DART_PAGE_FACTOR;
130
155 dp = ((unsigned int*)tbl->it_base) + index; 131 dp = ((unsigned int*)tbl->it_base) + index;
156 132
157 /* On U3, all memory is contigous, so we can move this 133 /* On U3, all memory is contigous, so we can move this
158 * out of the loop. 134 * out of the loop.
159 */ 135 */
160 while (npages--) { 136 while (npages--) {
161 rpn = virt_to_abs(uaddr) >> PAGE_SHIFT; 137 rpn = virt_to_abs(uaddr) >> DART_PAGE_SHIFT;
162 138
163 *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK); 139 *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK);
164 140
165 rpn++; 141 rpn++;
166 uaddr += PAGE_SIZE; 142 uaddr += DART_PAGE_SIZE;
167 } 143 }
168 144
169 dart_dirty = 1; 145 dart_dirty = 1;
@@ -181,6 +157,9 @@ static void dart_free(struct iommu_table *tbl, long index, long npages)
181 157
182 DBG("dart: free at: %lx, %lx\n", index, npages); 158 DBG("dart: free at: %lx, %lx\n", index, npages);
183 159
160 index <<= DART_PAGE_FACTOR;
161 npages <<= DART_PAGE_FACTOR;
162
184 dp = ((unsigned int *)tbl->it_base) + index; 163 dp = ((unsigned int *)tbl->it_base) + index;
185 164
186 while (npages--) 165 while (npages--)
@@ -209,10 +188,10 @@ static int dart_init(struct device_node *dart_node)
209 * that to work around what looks like a problem with the HT bridge 188 * that to work around what looks like a problem with the HT bridge
210 * prefetching into invalid pages and corrupting data 189 * prefetching into invalid pages and corrupting data
211 */ 190 */
212 tmp = lmb_alloc(PAGE_SIZE, PAGE_SIZE); 191 tmp = lmb_alloc(DART_PAGE_SIZE, DART_PAGE_SIZE);
213 if (!tmp) 192 if (!tmp)
214 panic("U3-DART: Cannot allocate spare page!"); 193 panic("U3-DART: Cannot allocate spare page!");
215 dart_emptyval = DARTMAP_VALID | ((tmp >> PAGE_SHIFT) & DARTMAP_RPNMASK); 194 dart_emptyval = DARTMAP_VALID | ((tmp >> DART_PAGE_SHIFT) & DARTMAP_RPNMASK);
216 195
217 /* Map in DART registers. FIXME: Use device node to get base address */ 196 /* Map in DART registers. FIXME: Use device node to get base address */
218 dart = ioremap(DART_BASE, 0x7000); 197 dart = ioremap(DART_BASE, 0x7000);
@@ -223,8 +202,8 @@ static int dart_init(struct device_node *dart_node)
223 * table size and enable bit 202 * table size and enable bit
224 */ 203 */
225 regword = DARTCNTL_ENABLE | 204 regword = DARTCNTL_ENABLE |
226 ((dart_tablebase >> PAGE_SHIFT) << DARTCNTL_BASE_SHIFT) | 205 ((dart_tablebase >> DART_PAGE_SHIFT) << DARTCNTL_BASE_SHIFT) |
227 (((dart_tablesize >> PAGE_SHIFT) & DARTCNTL_SIZE_MASK) 206 (((dart_tablesize >> DART_PAGE_SHIFT) & DARTCNTL_SIZE_MASK)
228 << DARTCNTL_SIZE_SHIFT); 207 << DARTCNTL_SIZE_SHIFT);
229 dart_vbase = ioremap(virt_to_abs(dart_tablebase), dart_tablesize); 208 dart_vbase = ioremap(virt_to_abs(dart_tablebase), dart_tablesize);
230 209
diff --git a/arch/ppc64/kernel/vecemu.c b/arch/ppc64/kernel/vecemu.c
deleted file mode 100644
index cb207629f21f..000000000000
--- a/arch/ppc64/kernel/vecemu.c
+++ /dev/null
@@ -1,346 +0,0 @@
1/*
2 * Routines to emulate some Altivec/VMX instructions, specifically
3 * those that can trap when given denormalized operands in Java mode.
4 */
5#include <linux/kernel.h>
6#include <linux/errno.h>
7#include <linux/sched.h>
8#include <asm/ptrace.h>
9#include <asm/processor.h>
10#include <asm/uaccess.h>
11
12/* Functions in vector.S */
13extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
14extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b);
15extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
16extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
17extern void vrefp(vector128 *dst, vector128 *src);
18extern void vrsqrtefp(vector128 *dst, vector128 *src);
19extern void vexptep(vector128 *dst, vector128 *src);
20
21static unsigned int exp2s[8] = {
22 0x800000,
23 0x8b95c2,
24 0x9837f0,
25 0xa5fed7,
26 0xb504f3,
27 0xc5672a,
28 0xd744fd,
29 0xeac0c7
30};
31
32/*
33 * Computes an estimate of 2^x. The `s' argument is the 32-bit
34 * single-precision floating-point representation of x.
35 */
36static unsigned int eexp2(unsigned int s)
37{
38 int exp, pwr;
39 unsigned int mant, frac;
40
41 /* extract exponent field from input */
42 exp = ((s >> 23) & 0xff) - 127;
43 if (exp > 7) {
44 /* check for NaN input */
45 if (exp == 128 && (s & 0x7fffff) != 0)
46 return s | 0x400000; /* return QNaN */
47 /* 2^-big = 0, 2^+big = +Inf */
48 return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */
49 }
50 if (exp < -23)
51 return 0x3f800000; /* 1.0 */
52
53 /* convert to fixed point integer in 9.23 representation */
54 pwr = (s & 0x7fffff) | 0x800000;
55 if (exp > 0)
56 pwr <<= exp;
57 else
58 pwr >>= -exp;
59 if (s & 0x80000000)
60 pwr = -pwr;
61
62 /* extract integer part, which becomes exponent part of result */
63 exp = (pwr >> 23) + 126;
64 if (exp >= 254)
65 return 0x7f800000;
66 if (exp < -23)
67 return 0;
68
69 /* table lookup on top 3 bits of fraction to get mantissa */
70 mant = exp2s[(pwr >> 20) & 7];
71
72 /* linear interpolation using remaining 20 bits of fraction */
73 asm("mulhwu %0,%1,%2" : "=r" (frac)
74 : "r" (pwr << 12), "r" (0x172b83ff));
75 asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant));
76 mant += frac;
77
78 if (exp >= 0)
79 return mant + (exp << 23);
80
81 /* denormalized result */
82 exp = -exp;
83 mant += 1 << (exp - 1);
84 return mant >> exp;
85}
86
87/*
88 * Computes an estimate of log_2(x). The `s' argument is the 32-bit
89 * single-precision floating-point representation of x.
90 */
91static unsigned int elog2(unsigned int s)
92{
93 int exp, mant, lz, frac;
94
95 exp = s & 0x7f800000;
96 mant = s & 0x7fffff;
97 if (exp == 0x7f800000) { /* Inf or NaN */
98 if (mant != 0)
99 s |= 0x400000; /* turn NaN into QNaN */
100 return s;
101 }
102 if ((exp | mant) == 0) /* +0 or -0 */
103 return 0xff800000; /* return -Inf */
104
105 if (exp == 0) {
106 /* denormalized */
107 asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant));
108 mant <<= lz - 8;
109 exp = (-118 - lz) << 23;
110 } else {
111 mant |= 0x800000;
112 exp -= 127 << 23;
113 }
114
115 if (mant >= 0xb504f3) { /* 2^0.5 * 2^23 */
116 exp |= 0x400000; /* 0.5 * 2^23 */
117 asm("mulhwu %0,%1,%2" : "=r" (mant)
118 : "r" (mant), "r" (0xb504f334)); /* 2^-0.5 * 2^32 */
119 }
120 if (mant >= 0x9837f0) { /* 2^0.25 * 2^23 */
121 exp |= 0x200000; /* 0.25 * 2^23 */
122 asm("mulhwu %0,%1,%2" : "=r" (mant)
123 : "r" (mant), "r" (0xd744fccb)); /* 2^-0.25 * 2^32 */
124 }
125 if (mant >= 0x8b95c2) { /* 2^0.125 * 2^23 */
126 exp |= 0x100000; /* 0.125 * 2^23 */
127 asm("mulhwu %0,%1,%2" : "=r" (mant)
128 : "r" (mant), "r" (0xeac0c6e8)); /* 2^-0.125 * 2^32 */
129 }
130 if (mant > 0x800000) { /* 1.0 * 2^23 */
131 /* calculate (mant - 1) * 1.381097463 */
132 /* 1.381097463 == 0.125 / (2^0.125 - 1) */
133 asm("mulhwu %0,%1,%2" : "=r" (frac)
134 : "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a));
135 exp += frac;
136 }
137 s = exp & 0x80000000;
138 if (exp != 0) {
139 if (s)
140 exp = -exp;
141 asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp));
142 lz = 8 - lz;
143 if (lz > 0)
144 exp >>= lz;
145 else if (lz < 0)
146 exp <<= -lz;
147 s += ((lz + 126) << 23) + exp;
148 }
149 return s;
150}
151
152#define VSCR_SAT 1
153
154static int ctsxs(unsigned int x, int scale, unsigned int *vscrp)
155{
156 int exp, mant;
157
158 exp = (x >> 23) & 0xff;
159 mant = x & 0x7fffff;
160 if (exp == 255 && mant != 0)
161 return 0; /* NaN -> 0 */
162 exp = exp - 127 + scale;
163 if (exp < 0)
164 return 0; /* round towards zero */
165 if (exp >= 31) {
166 /* saturate, unless the result would be -2^31 */
167 if (x + (scale << 23) != 0xcf000000)
168 *vscrp |= VSCR_SAT;
169 return (x & 0x80000000)? 0x80000000: 0x7fffffff;
170 }
171 mant |= 0x800000;
172 mant = (mant << 7) >> (30 - exp);
173 return (x & 0x80000000)? -mant: mant;
174}
175
176static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp)
177{
178 int exp;
179 unsigned int mant;
180
181 exp = (x >> 23) & 0xff;
182 mant = x & 0x7fffff;
183 if (exp == 255 && mant != 0)
184 return 0; /* NaN -> 0 */
185 exp = exp - 127 + scale;
186 if (exp < 0)
187 return 0; /* round towards zero */
188 if (x & 0x80000000) {
189 /* negative => saturate to 0 */
190 *vscrp |= VSCR_SAT;
191 return 0;
192 }
193 if (exp >= 32) {
194 /* saturate */
195 *vscrp |= VSCR_SAT;
196 return 0xffffffff;
197 }
198 mant |= 0x800000;
199 mant = (mant << 8) >> (31 - exp);
200 return mant;
201}
202
203/* Round to floating integer, towards 0 */
204static unsigned int rfiz(unsigned int x)
205{
206 int exp;
207
208 exp = ((x >> 23) & 0xff) - 127;
209 if (exp == 128 && (x & 0x7fffff) != 0)
210 return x | 0x400000; /* NaN -> make it a QNaN */
211 if (exp >= 23)
212 return x; /* it's an integer already (or Inf) */
213 if (exp < 0)
214 return x & 0x80000000; /* |x| < 1.0 rounds to 0 */
215 return x & ~(0x7fffff >> exp);
216}
217
218/* Round to floating integer, towards +/- Inf */
219static unsigned int rfii(unsigned int x)
220{
221 int exp, mask;
222
223 exp = ((x >> 23) & 0xff) - 127;
224 if (exp == 128 && (x & 0x7fffff) != 0)
225 return x | 0x400000; /* NaN -> make it a QNaN */
226 if (exp >= 23)
227 return x; /* it's an integer already (or Inf) */
228 if ((x & 0x7fffffff) == 0)
229 return x; /* +/-0 -> +/-0 */
230 if (exp < 0)
231 /* 0 < |x| < 1.0 rounds to +/- 1.0 */
232 return (x & 0x80000000) | 0x3f800000;
233 mask = 0x7fffff >> exp;
234 /* mantissa overflows into exponent - that's OK,
235 it can't overflow into the sign bit */
236 return (x + mask) & ~mask;
237}
238
239/* Round to floating integer, to nearest */
240static unsigned int rfin(unsigned int x)
241{
242 int exp, half;
243
244 exp = ((x >> 23) & 0xff) - 127;
245 if (exp == 128 && (x & 0x7fffff) != 0)
246 return x | 0x400000; /* NaN -> make it a QNaN */
247 if (exp >= 23)
248 return x; /* it's an integer already (or Inf) */
249 if (exp < -1)
250 return x & 0x80000000; /* |x| < 0.5 -> +/-0 */
251 if (exp == -1)
252 /* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */
253 return (x & 0x80000000) | 0x3f800000;
254 half = 0x400000 >> exp;
255 /* add 0.5 to the magnitude and chop off the fraction bits */
256 return (x + half) & ~(0x7fffff >> exp);
257}
258
259int
260emulate_altivec(struct pt_regs *regs)
261{
262 unsigned int instr, i;
263 unsigned int va, vb, vc, vd;
264 vector128 *vrs;
265
266 if (get_user(instr, (unsigned int __user *) regs->nip))
267 return -EFAULT;
268 if ((instr >> 26) != 4)
269 return -EINVAL; /* not an altivec instruction */
270 vd = (instr >> 21) & 0x1f;
271 va = (instr >> 16) & 0x1f;
272 vb = (instr >> 11) & 0x1f;
273 vc = (instr >> 6) & 0x1f;
274
275 vrs = current->thread.vr;
276 switch (instr & 0x3f) {
277 case 10:
278 switch (vc) {
279 case 0: /* vaddfp */
280 vaddfp(&vrs[vd], &vrs[va], &vrs[vb]);
281 break;
282 case 1: /* vsubfp */
283 vsubfp(&vrs[vd], &vrs[va], &vrs[vb]);
284 break;
285 case 4: /* vrefp */
286 vrefp(&vrs[vd], &vrs[vb]);
287 break;
288 case 5: /* vrsqrtefp */
289 vrsqrtefp(&vrs[vd], &vrs[vb]);
290 break;
291 case 6: /* vexptefp */
292 for (i = 0; i < 4; ++i)
293 vrs[vd].u[i] = eexp2(vrs[vb].u[i]);
294 break;
295 case 7: /* vlogefp */
296 for (i = 0; i < 4; ++i)
297 vrs[vd].u[i] = elog2(vrs[vb].u[i]);
298 break;
299 case 8: /* vrfin */
300 for (i = 0; i < 4; ++i)
301 vrs[vd].u[i] = rfin(vrs[vb].u[i]);
302 break;
303 case 9: /* vrfiz */
304 for (i = 0; i < 4; ++i)
305 vrs[vd].u[i] = rfiz(vrs[vb].u[i]);
306 break;
307 case 10: /* vrfip */
308 for (i = 0; i < 4; ++i) {
309 u32 x = vrs[vb].u[i];
310 x = (x & 0x80000000)? rfiz(x): rfii(x);
311 vrs[vd].u[i] = x;
312 }
313 break;
314 case 11: /* vrfim */
315 for (i = 0; i < 4; ++i) {
316 u32 x = vrs[vb].u[i];
317 x = (x & 0x80000000)? rfii(x): rfiz(x);
318 vrs[vd].u[i] = x;
319 }
320 break;
321 case 14: /* vctuxs */
322 for (i = 0; i < 4; ++i)
323 vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
324 &current->thread.vscr.u[3]);
325 break;
326 case 15: /* vctsxs */
327 for (i = 0; i < 4; ++i)
328 vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
329 &current->thread.vscr.u[3]);
330 break;
331 default:
332 return -EINVAL;
333 }
334 break;
335 case 46: /* vmaddfp */
336 vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
337 break;
338 case 47: /* vnmsubfp */
339 vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
340 break;
341 default:
342 return -EINVAL;
343 }
344
345 return 0;
346}
diff --git a/arch/ppc64/kernel/vmlinux.lds.S b/arch/ppc64/kernel/vmlinux.lds.S
index 0306510bc4ff..f34d514432ac 100644
--- a/arch/ppc64/kernel/vmlinux.lds.S
+++ b/arch/ppc64/kernel/vmlinux.lds.S
@@ -1,3 +1,4 @@
1#include <asm/page.h>
1#include <asm-generic/vmlinux.lds.h> 2#include <asm-generic/vmlinux.lds.h>
2 3
3OUTPUT_ARCH(powerpc:common64) 4OUTPUT_ARCH(powerpc:common64)
@@ -17,7 +18,7 @@ SECTIONS
17 LOCK_TEXT 18 LOCK_TEXT
18 KPROBES_TEXT 19 KPROBES_TEXT
19 *(.fixup) 20 *(.fixup)
20 . = ALIGN(4096); 21 . = ALIGN(PAGE_SIZE);
21 _etext = .; 22 _etext = .;
22 } 23 }
23 24
@@ -43,7 +44,7 @@ SECTIONS
43 44
44 45
45 /* will be freed after init */ 46 /* will be freed after init */
46 . = ALIGN(4096); 47 . = ALIGN(PAGE_SIZE);
47 __init_begin = .; 48 __init_begin = .;
48 49
49 .init.text : { 50 .init.text : {
@@ -83,7 +84,7 @@ SECTIONS
83 84
84 SECURITY_INIT 85 SECURITY_INIT
85 86
86 . = ALIGN(4096); 87 . = ALIGN(PAGE_SIZE);
87 .init.ramfs : { 88 .init.ramfs : {
88 __initramfs_start = .; 89 __initramfs_start = .;
89 *(.init.ramfs) 90 *(.init.ramfs)
@@ -96,18 +97,21 @@ SECTIONS
96 __per_cpu_end = .; 97 __per_cpu_end = .;
97 } 98 }
98 99
100 . = ALIGN(PAGE_SIZE);
99 . = ALIGN(16384); 101 . = ALIGN(16384);
100 __init_end = .; 102 __init_end = .;
101 /* freed after init ends here */ 103 /* freed after init ends here */
102 104
103 105
104 /* Read/write sections */ 106 /* Read/write sections */
107 . = ALIGN(PAGE_SIZE);
105 . = ALIGN(16384); 108 . = ALIGN(16384);
106 /* The initial task and kernel stack */ 109 /* The initial task and kernel stack */
107 .data.init_task : { 110 .data.init_task : {
108 *(.data.init_task) 111 *(.data.init_task)
109 } 112 }
110 113
114 . = ALIGN(PAGE_SIZE);
111 .data.page_aligned : { 115 .data.page_aligned : {
112 *(.data.page_aligned) 116 *(.data.page_aligned)
113 } 117 }
@@ -129,18 +133,18 @@ SECTIONS
129 __toc_start = .; 133 __toc_start = .;
130 *(.got) 134 *(.got)
131 *(.toc) 135 *(.toc)
132 . = ALIGN(4096); 136 . = ALIGN(PAGE_SIZE);
133 _edata = .; 137 _edata = .;
134 } 138 }
135 139
136 140
137 . = ALIGN(4096); 141 . = ALIGN(PAGE_SIZE);
138 .bss : { 142 .bss : {
139 __bss_start = .; 143 __bss_start = .;
140 *(.bss) 144 *(.bss)
141 __bss_stop = .; 145 __bss_stop = .;
142 } 146 }
143 147
144 . = ALIGN(4096); 148 . = ALIGN(PAGE_SIZE);
145 _end = . ; 149 _end = . ;
146} 150}
diff --git a/arch/ppc64/mm/hash_native.c b/arch/ppc64/mm/hash_native.c
index eb1bbb5b6c16..874cf96938ff 100644
--- a/arch/ppc64/mm/hash_native.c
+++ b/arch/ppc64/mm/hash_native.c
@@ -335,10 +335,9 @@ static void native_hpte_clear(void)
335 local_irq_restore(flags); 335 local_irq_restore(flags);
336} 336}
337 337
338static void native_flush_hash_range(unsigned long context, 338static void native_flush_hash_range(unsigned long number, int local)
339 unsigned long number, int local)
340{ 339{
341 unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn; 340 unsigned long va, vpn, hash, secondary, slot, flags, avpn;
342 int i, j; 341 int i, j;
343 hpte_t *hptep; 342 hpte_t *hptep;
344 unsigned long hpte_v; 343 unsigned long hpte_v;
@@ -349,13 +348,7 @@ static void native_flush_hash_range(unsigned long context,
349 348
350 j = 0; 349 j = 0;
351 for (i = 0; i < number; i++) { 350 for (i = 0; i < number; i++) {
352 if (batch->addr[i] < KERNELBASE) 351 va = batch->vaddr[j];
353 vsid = get_vsid(context, batch->addr[i]);
354 else
355 vsid = get_kernel_vsid(batch->addr[i]);
356
357 va = (vsid << 28) | (batch->addr[i] & 0x0fffffff);
358 batch->vaddr[j] = va;
359 large = pte_huge(batch->pte[i]); 352 large = pte_huge(batch->pte[i]);
360 if (large) 353 if (large)
361 vpn = va >> HPAGE_SHIFT; 354 vpn = va >> HPAGE_SHIFT;
diff --git a/arch/ppc64/mm/hash_utils.c b/arch/ppc64/mm/hash_utils.c
index 09475c8edf7c..36cf474b3d36 100644
--- a/arch/ppc64/mm/hash_utils.c
+++ b/arch/ppc64/mm/hash_utils.c
@@ -355,18 +355,11 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
355 return ret; 355 return ret;
356} 356}
357 357
358void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte, 358void flush_hash_page(unsigned long va, pte_t pte, int local)
359 int local)
360{ 359{
361 unsigned long vsid, vpn, va, hash, secondary, slot; 360 unsigned long vpn, hash, secondary, slot;
362 unsigned long huge = pte_huge(pte); 361 unsigned long huge = pte_huge(pte);
363 362
364 if (ea < KERNELBASE)
365 vsid = get_vsid(context, ea);
366 else
367 vsid = get_kernel_vsid(ea);
368
369 va = (vsid << 28) | (ea & 0x0fffffff);
370 if (huge) 363 if (huge)
371 vpn = va >> HPAGE_SHIFT; 364 vpn = va >> HPAGE_SHIFT;
372 else 365 else
@@ -381,17 +374,17 @@ void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte,
381 ppc_md.hpte_invalidate(slot, va, huge, local); 374 ppc_md.hpte_invalidate(slot, va, huge, local);
382} 375}
383 376
384void flush_hash_range(unsigned long context, unsigned long number, int local) 377void flush_hash_range(unsigned long number, int local)
385{ 378{
386 if (ppc_md.flush_hash_range) { 379 if (ppc_md.flush_hash_range) {
387 ppc_md.flush_hash_range(context, number, local); 380 ppc_md.flush_hash_range(number, local);
388 } else { 381 } else {
389 int i; 382 int i;
390 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 383 struct ppc64_tlb_batch *batch =
384 &__get_cpu_var(ppc64_tlb_batch);
391 385
392 for (i = 0; i < number; i++) 386 for (i = 0; i < number; i++)
393 flush_hash_page(context, batch->addr[i], batch->pte[i], 387 flush_hash_page(batch->vaddr[i], batch->pte[i], local);
394 local);
395 } 388 }
396} 389}
397 390
diff --git a/arch/ppc64/mm/tlb.c b/arch/ppc64/mm/tlb.c
index d8a6593a13f0..31afd95bf870 100644
--- a/arch/ppc64/mm/tlb.c
+++ b/arch/ppc64/mm/tlb.c
@@ -128,12 +128,10 @@ void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
128void hpte_update(struct mm_struct *mm, unsigned long addr, 128void hpte_update(struct mm_struct *mm, unsigned long addr,
129 unsigned long pte, int wrprot) 129 unsigned long pte, int wrprot)
130{ 130{
131 int i;
132 unsigned long context = 0;
133 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 131 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
132 unsigned long vsid;
133 int i;
134 134
135 if (REGION_ID(addr) == USER_REGION_ID)
136 context = mm->context.id;
137 i = batch->index; 135 i = batch->index;
138 136
139 /* 137 /*
@@ -143,17 +141,19 @@ void hpte_update(struct mm_struct *mm, unsigned long addr,
143 * up scanning and resetting referenced bits then our batch context 141 * up scanning and resetting referenced bits then our batch context
144 * will change mid stream. 142 * will change mid stream.
145 */ 143 */
146 if (unlikely(i != 0 && context != batch->context)) { 144 if (unlikely(i != 0 && mm != batch->mm)) {
147 flush_tlb_pending(); 145 flush_tlb_pending();
148 i = 0; 146 i = 0;
149 } 147 }
150 148 if (i == 0)
151 if (i == 0) {
152 batch->context = context;
153 batch->mm = mm; 149 batch->mm = mm;
154 } 150 if (addr < KERNELBASE) {
151 vsid = get_vsid(mm->context.id, addr);
152 WARN_ON(vsid == 0);
153 } else
154 vsid = get_kernel_vsid(addr);
155 batch->vaddr[i] = (vsid << 28 ) | (addr & 0x0fffffff);
155 batch->pte[i] = __pte(pte); 156 batch->pte[i] = __pte(pte);
156 batch->addr[i] = addr;
157 batch->index = ++i; 157 batch->index = ++i;
158 if (i >= PPC64_TLB_BATCH_NR) 158 if (i >= PPC64_TLB_BATCH_NR)
159 flush_tlb_pending(); 159 flush_tlb_pending();
@@ -175,10 +175,9 @@ void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
175 local = 1; 175 local = 1;
176 176
177 if (i == 1) 177 if (i == 1)
178 flush_hash_page(batch->context, batch->addr[0], batch->pte[0], 178 flush_hash_page(batch->vaddr[0], batch->pte[0], local);
179 local);
180 else 179 else
181 flush_hash_range(batch->context, i, local); 180 flush_hash_range(i, local);
182 batch->index = 0; 181 batch->index = 0;
183 put_cpu(); 182 put_cpu();
184} 183}
diff --git a/arch/ppc64/oprofile/Kconfig b/arch/ppc64/oprofile/Kconfig
deleted file mode 100644
index 5ade19801b97..000000000000
--- a/arch/ppc64/oprofile/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
1
2menu "Profiling support"
3 depends on EXPERIMENTAL
4
5config PROFILING
6 bool "Profiling support (EXPERIMENTAL)"
7 help
8 Say Y here to enable the extended profiling support mechanisms used
9 by profilers such as OProfile.
10
11
12config OPROFILE
13 tristate "OProfile system profiling (EXPERIMENTAL)"
14 depends on PROFILING
15 help
16 OProfile is a profiling system capable of profiling the
17 whole system, include the kernel, kernel modules, libraries,
18 and applications.
19
20 If unsure, say N.
21
22endmenu
23
diff --git a/arch/ppc64/oprofile/Makefile b/arch/ppc64/oprofile/Makefile
deleted file mode 100644
index 162dbf06c142..000000000000
--- a/arch/ppc64/oprofile/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1obj-$(CONFIG_OPROFILE) += oprofile.o
2
3DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
4 oprof.o cpu_buffer.o buffer_sync.o \
5 event_buffer.o oprofile_files.o \
6 oprofilefs.o oprofile_stats.o \
7 timer_int.o )
8
9oprofile-y := $(DRIVER_OBJS) common.o op_model_rs64.o op_model_power4.o
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 87d1f8a1f41e..d8c3d8ebad30 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -81,7 +81,7 @@ typedef struct pmac_ide_hwif {
81 81
82} pmac_ide_hwif_t; 82} pmac_ide_hwif_t;
83 83
84static pmac_ide_hwif_t pmac_ide[MAX_HWIFS] __pmacdata; 84static pmac_ide_hwif_t pmac_ide[MAX_HWIFS];
85static int pmac_ide_count; 85static int pmac_ide_count;
86 86
87enum { 87enum {
@@ -242,7 +242,7 @@ struct mdma_timings_t {
242 int cycleTime; 242 int cycleTime;
243}; 243};
244 244
245struct mdma_timings_t mdma_timings_33[] __pmacdata = 245struct mdma_timings_t mdma_timings_33[] =
246{ 246{
247 { 240, 240, 480 }, 247 { 240, 240, 480 },
248 { 180, 180, 360 }, 248 { 180, 180, 360 },
@@ -255,7 +255,7 @@ struct mdma_timings_t mdma_timings_33[] __pmacdata =
255 { 0, 0, 0 } 255 { 0, 0, 0 }
256}; 256};
257 257
258struct mdma_timings_t mdma_timings_33k[] __pmacdata = 258struct mdma_timings_t mdma_timings_33k[] =
259{ 259{
260 { 240, 240, 480 }, 260 { 240, 240, 480 },
261 { 180, 180, 360 }, 261 { 180, 180, 360 },
@@ -268,7 +268,7 @@ struct mdma_timings_t mdma_timings_33k[] __pmacdata =
268 { 0, 0, 0 } 268 { 0, 0, 0 }
269}; 269};
270 270
271struct mdma_timings_t mdma_timings_66[] __pmacdata = 271struct mdma_timings_t mdma_timings_66[] =
272{ 272{
273 { 240, 240, 480 }, 273 { 240, 240, 480 },
274 { 180, 180, 360 }, 274 { 180, 180, 360 },
@@ -286,7 +286,7 @@ struct {
286 int addrSetup; /* ??? */ 286 int addrSetup; /* ??? */
287 int rdy2pause; 287 int rdy2pause;
288 int wrDataSetup; 288 int wrDataSetup;
289} kl66_udma_timings[] __pmacdata = 289} kl66_udma_timings[] =
290{ 290{
291 { 0, 180, 120 }, /* Mode 0 */ 291 { 0, 180, 120 }, /* Mode 0 */
292 { 0, 150, 90 }, /* 1 */ 292 { 0, 150, 90 }, /* 1 */
@@ -301,7 +301,7 @@ struct kauai_timing {
301 u32 timing_reg; 301 u32 timing_reg;
302}; 302};
303 303
304static struct kauai_timing kauai_pio_timings[] __pmacdata = 304static struct kauai_timing kauai_pio_timings[] =
305{ 305{
306 { 930 , 0x08000fff }, 306 { 930 , 0x08000fff },
307 { 600 , 0x08000a92 }, 307 { 600 , 0x08000a92 },
@@ -316,7 +316,7 @@ static struct kauai_timing kauai_pio_timings[] __pmacdata =
316 { 120 , 0x04000148 } 316 { 120 , 0x04000148 }
317}; 317};
318 318
319static struct kauai_timing kauai_mdma_timings[] __pmacdata = 319static struct kauai_timing kauai_mdma_timings[] =
320{ 320{
321 { 1260 , 0x00fff000 }, 321 { 1260 , 0x00fff000 },
322 { 480 , 0x00618000 }, 322 { 480 , 0x00618000 },
@@ -330,7 +330,7 @@ static struct kauai_timing kauai_mdma_timings[] __pmacdata =
330 { 0 , 0 }, 330 { 0 , 0 },
331}; 331};
332 332
333static struct kauai_timing kauai_udma_timings[] __pmacdata = 333static struct kauai_timing kauai_udma_timings[] =
334{ 334{
335 { 120 , 0x000070c0 }, 335 { 120 , 0x000070c0 },
336 { 90 , 0x00005d80 }, 336 { 90 , 0x00005d80 },
@@ -341,7 +341,7 @@ static struct kauai_timing kauai_udma_timings[] __pmacdata =
341 { 0 , 0 }, 341 { 0 , 0 },
342}; 342};
343 343
344static struct kauai_timing shasta_pio_timings[] __pmacdata = 344static struct kauai_timing shasta_pio_timings[] =
345{ 345{
346 { 930 , 0x08000fff }, 346 { 930 , 0x08000fff },
347 { 600 , 0x0A000c97 }, 347 { 600 , 0x0A000c97 },
@@ -356,7 +356,7 @@ static struct kauai_timing shasta_pio_timings[] __pmacdata =
356 { 120 , 0x0400010a } 356 { 120 , 0x0400010a }
357}; 357};
358 358
359static struct kauai_timing shasta_mdma_timings[] __pmacdata = 359static struct kauai_timing shasta_mdma_timings[] =
360{ 360{
361 { 1260 , 0x00fff000 }, 361 { 1260 , 0x00fff000 },
362 { 480 , 0x00820800 }, 362 { 480 , 0x00820800 },
@@ -370,7 +370,7 @@ static struct kauai_timing shasta_mdma_timings[] __pmacdata =
370 { 0 , 0 }, 370 { 0 , 0 },
371}; 371};
372 372
373static struct kauai_timing shasta_udma133_timings[] __pmacdata = 373static struct kauai_timing shasta_udma133_timings[] =
374{ 374{
375 { 120 , 0x00035901, }, 375 { 120 , 0x00035901, },
376 { 90 , 0x000348b1, }, 376 { 90 , 0x000348b1, },
@@ -522,7 +522,7 @@ pmu_hd_blink_init(void)
522 * N.B. this can't be an initfunc, because the media-bay task can 522 * N.B. this can't be an initfunc, because the media-bay task can
523 * call ide_[un]register at any time. 523 * call ide_[un]register at any time.
524 */ 524 */
525void __pmac 525void
526pmac_ide_init_hwif_ports(hw_regs_t *hw, 526pmac_ide_init_hwif_ports(hw_regs_t *hw,
527 unsigned long data_port, unsigned long ctrl_port, 527 unsigned long data_port, unsigned long ctrl_port,
528 int *irq) 528 int *irq)
@@ -559,7 +559,7 @@ pmac_ide_init_hwif_ports(hw_regs_t *hw,
559 * timing register when selecting that unit. This version is for 559 * timing register when selecting that unit. This version is for
560 * ASICs with a single timing register 560 * ASICs with a single timing register
561 */ 561 */
562static void __pmac 562static void
563pmac_ide_selectproc(ide_drive_t *drive) 563pmac_ide_selectproc(ide_drive_t *drive)
564{ 564{
565 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 565 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -579,7 +579,7 @@ pmac_ide_selectproc(ide_drive_t *drive)
579 * timing register when selecting that unit. This version is for 579 * timing register when selecting that unit. This version is for
580 * ASICs with a dual timing register (Kauai) 580 * ASICs with a dual timing register (Kauai)
581 */ 581 */
582static void __pmac 582static void
583pmac_ide_kauai_selectproc(ide_drive_t *drive) 583pmac_ide_kauai_selectproc(ide_drive_t *drive)
584{ 584{
585 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 585 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -600,7 +600,7 @@ pmac_ide_kauai_selectproc(ide_drive_t *drive)
600/* 600/*
601 * Force an update of controller timing values for a given drive 601 * Force an update of controller timing values for a given drive
602 */ 602 */
603static void __pmac 603static void
604pmac_ide_do_update_timings(ide_drive_t *drive) 604pmac_ide_do_update_timings(ide_drive_t *drive)
605{ 605{
606 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 606 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -633,7 +633,7 @@ pmac_outbsync(ide_drive_t *drive, u8 value, unsigned long port)
633 * to sort that out sooner or later and see if I can finally get the 633 * to sort that out sooner or later and see if I can finally get the
634 * common version to work properly in all cases 634 * common version to work properly in all cases
635 */ 635 */
636static int __pmac 636static int
637pmac_ide_do_setfeature(ide_drive_t *drive, u8 command) 637pmac_ide_do_setfeature(ide_drive_t *drive, u8 command)
638{ 638{
639 ide_hwif_t *hwif = HWIF(drive); 639 ide_hwif_t *hwif = HWIF(drive);
@@ -710,7 +710,7 @@ out:
710/* 710/*
711 * Old tuning functions (called on hdparm -p), sets up drive PIO timings 711 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
712 */ 712 */
713static void __pmac 713static void
714pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) 714pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
715{ 715{
716 ide_pio_data_t d; 716 ide_pio_data_t d;
@@ -801,7 +801,7 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
801/* 801/*
802 * Calculate KeyLargo ATA/66 UDMA timings 802 * Calculate KeyLargo ATA/66 UDMA timings
803 */ 803 */
804static int __pmac 804static int
805set_timings_udma_ata4(u32 *timings, u8 speed) 805set_timings_udma_ata4(u32 *timings, u8 speed)
806{ 806{
807 unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks; 807 unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks;
@@ -829,7 +829,7 @@ set_timings_udma_ata4(u32 *timings, u8 speed)
829/* 829/*
830 * Calculate Kauai ATA/100 UDMA timings 830 * Calculate Kauai ATA/100 UDMA timings
831 */ 831 */
832static int __pmac 832static int
833set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed) 833set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
834{ 834{
835 struct ide_timing *t = ide_timing_find_mode(speed); 835 struct ide_timing *t = ide_timing_find_mode(speed);
@@ -849,7 +849,7 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
849/* 849/*
850 * Calculate Shasta ATA/133 UDMA timings 850 * Calculate Shasta ATA/133 UDMA timings
851 */ 851 */
852static int __pmac 852static int
853set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed) 853set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
854{ 854{
855 struct ide_timing *t = ide_timing_find_mode(speed); 855 struct ide_timing *t = ide_timing_find_mode(speed);
@@ -869,7 +869,7 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
869/* 869/*
870 * Calculate MDMA timings for all cells 870 * Calculate MDMA timings for all cells
871 */ 871 */
872static int __pmac 872static int
873set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, 873set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
874 u8 speed, int drive_cycle_time) 874 u8 speed, int drive_cycle_time)
875{ 875{
@@ -1014,7 +1014,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
1014 * our dedicated function is more precise as it uses the drive provided 1014 * our dedicated function is more precise as it uses the drive provided
1015 * cycle time value. We should probably fix this one to deal with that too... 1015 * cycle time value. We should probably fix this one to deal with that too...
1016 */ 1016 */
1017static int __pmac 1017static int
1018pmac_ide_tune_chipset (ide_drive_t *drive, byte speed) 1018pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
1019{ 1019{
1020 int unit = (drive->select.b.unit & 0x01); 1020 int unit = (drive->select.b.unit & 0x01);
@@ -1092,7 +1092,7 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
1092 * Blast some well known "safe" values to the timing registers at init or 1092 * Blast some well known "safe" values to the timing registers at init or
1093 * wakeup from sleep time, before we do real calculation 1093 * wakeup from sleep time, before we do real calculation
1094 */ 1094 */
1095static void __pmac 1095static void
1096sanitize_timings(pmac_ide_hwif_t *pmif) 1096sanitize_timings(pmac_ide_hwif_t *pmif)
1097{ 1097{
1098 unsigned int value, value2 = 0; 1098 unsigned int value, value2 = 0;
@@ -1123,13 +1123,13 @@ sanitize_timings(pmac_ide_hwif_t *pmif)
1123 pmif->timings[2] = pmif->timings[3] = value2; 1123 pmif->timings[2] = pmif->timings[3] = value2;
1124} 1124}
1125 1125
1126unsigned long __pmac 1126unsigned long
1127pmac_ide_get_base(int index) 1127pmac_ide_get_base(int index)
1128{ 1128{
1129 return pmac_ide[index].regbase; 1129 return pmac_ide[index].regbase;
1130} 1130}
1131 1131
1132int __pmac 1132int
1133pmac_ide_check_base(unsigned long base) 1133pmac_ide_check_base(unsigned long base)
1134{ 1134{
1135 int ix; 1135 int ix;
@@ -1140,7 +1140,7 @@ pmac_ide_check_base(unsigned long base)
1140 return -1; 1140 return -1;
1141} 1141}
1142 1142
1143int __pmac 1143int
1144pmac_ide_get_irq(unsigned long base) 1144pmac_ide_get_irq(unsigned long base)
1145{ 1145{
1146 int ix; 1146 int ix;
@@ -1151,7 +1151,7 @@ pmac_ide_get_irq(unsigned long base)
1151 return 0; 1151 return 0;
1152} 1152}
1153 1153
1154static int ide_majors[] __pmacdata = { 3, 22, 33, 34, 56, 57 }; 1154static int ide_majors[] = { 3, 22, 33, 34, 56, 57 };
1155 1155
1156dev_t __init 1156dev_t __init
1157pmac_find_ide_boot(char *bootdevice, int n) 1157pmac_find_ide_boot(char *bootdevice, int n)
@@ -1701,7 +1701,7 @@ pmac_ide_probe(void)
1701 * pmac_ide_build_dmatable builds the DBDMA command list 1701 * pmac_ide_build_dmatable builds the DBDMA command list
1702 * for a transfer and sets the DBDMA channel to point to it. 1702 * for a transfer and sets the DBDMA channel to point to it.
1703 */ 1703 */
1704static int __pmac 1704static int
1705pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq) 1705pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
1706{ 1706{
1707 struct dbdma_cmd *table; 1707 struct dbdma_cmd *table;
@@ -1785,7 +1785,7 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
1785} 1785}
1786 1786
1787/* Teardown mappings after DMA has completed. */ 1787/* Teardown mappings after DMA has completed. */
1788static void __pmac 1788static void
1789pmac_ide_destroy_dmatable (ide_drive_t *drive) 1789pmac_ide_destroy_dmatable (ide_drive_t *drive)
1790{ 1790{
1791 ide_hwif_t *hwif = drive->hwif; 1791 ide_hwif_t *hwif = drive->hwif;
@@ -1802,7 +1802,7 @@ pmac_ide_destroy_dmatable (ide_drive_t *drive)
1802/* 1802/*
1803 * Pick up best MDMA timing for the drive and apply it 1803 * Pick up best MDMA timing for the drive and apply it
1804 */ 1804 */
1805static int __pmac 1805static int
1806pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode) 1806pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode)
1807{ 1807{
1808 ide_hwif_t *hwif = HWIF(drive); 1808 ide_hwif_t *hwif = HWIF(drive);
@@ -1859,7 +1859,7 @@ pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode)
1859/* 1859/*
1860 * Pick up best UDMA timing for the drive and apply it 1860 * Pick up best UDMA timing for the drive and apply it
1861 */ 1861 */
1862static int __pmac 1862static int
1863pmac_ide_udma_enable(ide_drive_t *drive, u16 mode) 1863pmac_ide_udma_enable(ide_drive_t *drive, u16 mode)
1864{ 1864{
1865 ide_hwif_t *hwif = HWIF(drive); 1865 ide_hwif_t *hwif = HWIF(drive);
@@ -1915,7 +1915,7 @@ pmac_ide_udma_enable(ide_drive_t *drive, u16 mode)
1915 * Check what is the best DMA timing setting for the drive and 1915 * Check what is the best DMA timing setting for the drive and
1916 * call appropriate functions to apply it. 1916 * call appropriate functions to apply it.
1917 */ 1917 */
1918static int __pmac 1918static int
1919pmac_ide_dma_check(ide_drive_t *drive) 1919pmac_ide_dma_check(ide_drive_t *drive)
1920{ 1920{
1921 struct hd_driveid *id = drive->id; 1921 struct hd_driveid *id = drive->id;
@@ -1967,7 +1967,7 @@ pmac_ide_dma_check(ide_drive_t *drive)
1967 * Prepare a DMA transfer. We build the DMA table, adjust the timings for 1967 * Prepare a DMA transfer. We build the DMA table, adjust the timings for
1968 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion 1968 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
1969 */ 1969 */
1970static int __pmac 1970static int
1971pmac_ide_dma_setup(ide_drive_t *drive) 1971pmac_ide_dma_setup(ide_drive_t *drive)
1972{ 1972{
1973 ide_hwif_t *hwif = HWIF(drive); 1973 ide_hwif_t *hwif = HWIF(drive);
@@ -1997,7 +1997,7 @@ pmac_ide_dma_setup(ide_drive_t *drive)
1997 return 0; 1997 return 0;
1998} 1998}
1999 1999
2000static void __pmac 2000static void
2001pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command) 2001pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
2002{ 2002{
2003 /* issue cmd to drive */ 2003 /* issue cmd to drive */
@@ -2008,7 +2008,7 @@ pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
2008 * Kick the DMA controller into life after the DMA command has been issued 2008 * Kick the DMA controller into life after the DMA command has been issued
2009 * to the drive. 2009 * to the drive.
2010 */ 2010 */
2011static void __pmac 2011static void
2012pmac_ide_dma_start(ide_drive_t *drive) 2012pmac_ide_dma_start(ide_drive_t *drive)
2013{ 2013{
2014 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2014 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2024,7 +2024,7 @@ pmac_ide_dma_start(ide_drive_t *drive)
2024/* 2024/*
2025 * After a DMA transfer, make sure the controller is stopped 2025 * After a DMA transfer, make sure the controller is stopped
2026 */ 2026 */
2027static int __pmac 2027static int
2028pmac_ide_dma_end (ide_drive_t *drive) 2028pmac_ide_dma_end (ide_drive_t *drive)
2029{ 2029{
2030 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2030 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2052,7 +2052,7 @@ pmac_ide_dma_end (ide_drive_t *drive)
2052 * that's not implemented yet), on the other hand, we don't have shared interrupts 2052 * that's not implemented yet), on the other hand, we don't have shared interrupts
2053 * so it's not really a problem 2053 * so it's not really a problem
2054 */ 2054 */
2055static int __pmac 2055static int
2056pmac_ide_dma_test_irq (ide_drive_t *drive) 2056pmac_ide_dma_test_irq (ide_drive_t *drive)
2057{ 2057{
2058 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2058 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2108,19 +2108,19 @@ pmac_ide_dma_test_irq (ide_drive_t *drive)
2108 return 1; 2108 return 1;
2109} 2109}
2110 2110
2111static int __pmac 2111static int
2112pmac_ide_dma_host_off (ide_drive_t *drive) 2112pmac_ide_dma_host_off (ide_drive_t *drive)
2113{ 2113{
2114 return 0; 2114 return 0;
2115} 2115}
2116 2116
2117static int __pmac 2117static int
2118pmac_ide_dma_host_on (ide_drive_t *drive) 2118pmac_ide_dma_host_on (ide_drive_t *drive)
2119{ 2119{
2120 return 0; 2120 return 0;
2121} 2121}
2122 2122
2123static int __pmac 2123static int
2124pmac_ide_dma_lostirq (ide_drive_t *drive) 2124pmac_ide_dma_lostirq (ide_drive_t *drive)
2125{ 2125{
2126 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 2126 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
diff --git a/drivers/macintosh/ans-lcd.c b/drivers/macintosh/ans-lcd.c
index 5e0811dc6536..2b8a6e821d44 100644
--- a/drivers/macintosh/ans-lcd.c
+++ b/drivers/macintosh/ans-lcd.c
@@ -27,7 +27,7 @@ static volatile unsigned char __iomem *anslcd_ptr;
27 27
28#undef DEBUG 28#undef DEBUG
29 29
30static void __pmac 30static void
31anslcd_write_byte_ctrl ( unsigned char c ) 31anslcd_write_byte_ctrl ( unsigned char c )
32{ 32{
33#ifdef DEBUG 33#ifdef DEBUG
@@ -43,14 +43,14 @@ anslcd_write_byte_ctrl ( unsigned char c )
43 } 43 }
44} 44}
45 45
46static void __pmac 46static void
47anslcd_write_byte_data ( unsigned char c ) 47anslcd_write_byte_data ( unsigned char c )
48{ 48{
49 out_8(anslcd_ptr + ANSLCD_DATA_IX, c); 49 out_8(anslcd_ptr + ANSLCD_DATA_IX, c);
50 udelay(anslcd_short_delay); 50 udelay(anslcd_short_delay);
51} 51}
52 52
53static ssize_t __pmac 53static ssize_t
54anslcd_write( struct file * file, const char __user * buf, 54anslcd_write( struct file * file, const char __user * buf,
55 size_t count, loff_t *ppos ) 55 size_t count, loff_t *ppos )
56{ 56{
@@ -73,7 +73,7 @@ anslcd_write( struct file * file, const char __user * buf,
73 return p - buf; 73 return p - buf;
74} 74}
75 75
76static int __pmac 76static int
77anslcd_ioctl( struct inode * inode, struct file * file, 77anslcd_ioctl( struct inode * inode, struct file * file,
78 unsigned int cmd, unsigned long arg ) 78 unsigned int cmd, unsigned long arg )
79{ 79{
@@ -115,7 +115,7 @@ anslcd_ioctl( struct inode * inode, struct file * file,
115 } 115 }
116} 116}
117 117
118static int __pmac 118static int
119anslcd_open( struct inode * inode, struct file * file ) 119anslcd_open( struct inode * inode, struct file * file )
120{ 120{
121 return 0; 121 return 0;
diff --git a/drivers/macintosh/mediabay.c b/drivers/macintosh/mediabay.c
index c0712a1ea5af..b856bb67169c 100644
--- a/drivers/macintosh/mediabay.c
+++ b/drivers/macintosh/mediabay.c
@@ -167,19 +167,19 @@ enum {
167 * Functions for polling content of media bay 167 * Functions for polling content of media bay
168 */ 168 */
169 169
170static u8 __pmac 170static u8
171ohare_mb_content(struct media_bay_info *bay) 171ohare_mb_content(struct media_bay_info *bay)
172{ 172{
173 return (MB_IN32(bay, OHARE_MBCR) >> 12) & 7; 173 return (MB_IN32(bay, OHARE_MBCR) >> 12) & 7;
174} 174}
175 175
176static u8 __pmac 176static u8
177heathrow_mb_content(struct media_bay_info *bay) 177heathrow_mb_content(struct media_bay_info *bay)
178{ 178{
179 return (MB_IN32(bay, HEATHROW_MBCR) >> 12) & 7; 179 return (MB_IN32(bay, HEATHROW_MBCR) >> 12) & 7;
180} 180}
181 181
182static u8 __pmac 182static u8
183keylargo_mb_content(struct media_bay_info *bay) 183keylargo_mb_content(struct media_bay_info *bay)
184{ 184{
185 int new_gpio; 185 int new_gpio;
@@ -205,7 +205,7 @@ keylargo_mb_content(struct media_bay_info *bay)
205 * into reset state as well 205 * into reset state as well
206 */ 206 */
207 207
208static void __pmac 208static void
209ohare_mb_power(struct media_bay_info* bay, int on_off) 209ohare_mb_power(struct media_bay_info* bay, int on_off)
210{ 210{
211 if (on_off) { 211 if (on_off) {
@@ -224,7 +224,7 @@ ohare_mb_power(struct media_bay_info* bay, int on_off)
224 MB_BIC(bay, OHARE_MBCR, 0x00000F00); 224 MB_BIC(bay, OHARE_MBCR, 0x00000F00);
225} 225}
226 226
227static void __pmac 227static void
228heathrow_mb_power(struct media_bay_info* bay, int on_off) 228heathrow_mb_power(struct media_bay_info* bay, int on_off)
229{ 229{
230 if (on_off) { 230 if (on_off) {
@@ -243,7 +243,7 @@ heathrow_mb_power(struct media_bay_info* bay, int on_off)
243 MB_BIC(bay, HEATHROW_MBCR, 0x00000F00); 243 MB_BIC(bay, HEATHROW_MBCR, 0x00000F00);
244} 244}
245 245
246static void __pmac 246static void
247keylargo_mb_power(struct media_bay_info* bay, int on_off) 247keylargo_mb_power(struct media_bay_info* bay, int on_off)
248{ 248{
249 if (on_off) { 249 if (on_off) {
@@ -267,7 +267,7 @@ keylargo_mb_power(struct media_bay_info* bay, int on_off)
267 * enable the related busses 267 * enable the related busses
268 */ 268 */
269 269
270static int __pmac 270static int
271ohare_mb_setup_bus(struct media_bay_info* bay, u8 device_id) 271ohare_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
272{ 272{
273 switch(device_id) { 273 switch(device_id) {
@@ -287,7 +287,7 @@ ohare_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
287 return -ENODEV; 287 return -ENODEV;
288} 288}
289 289
290static int __pmac 290static int
291heathrow_mb_setup_bus(struct media_bay_info* bay, u8 device_id) 291heathrow_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
292{ 292{
293 switch(device_id) { 293 switch(device_id) {
@@ -307,7 +307,7 @@ heathrow_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
307 return -ENODEV; 307 return -ENODEV;
308} 308}
309 309
310static int __pmac 310static int
311keylargo_mb_setup_bus(struct media_bay_info* bay, u8 device_id) 311keylargo_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
312{ 312{
313 switch(device_id) { 313 switch(device_id) {
@@ -330,43 +330,43 @@ keylargo_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
330 * Functions for tweaking resets 330 * Functions for tweaking resets
331 */ 331 */
332 332
333static void __pmac 333static void
334ohare_mb_un_reset(struct media_bay_info* bay) 334ohare_mb_un_reset(struct media_bay_info* bay)
335{ 335{
336 MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N); 336 MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N);
337} 337}
338 338
339static void __pmac keylargo_mb_init(struct media_bay_info *bay) 339static void keylargo_mb_init(struct media_bay_info *bay)
340{ 340{
341 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE); 341 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE);
342} 342}
343 343
344static void __pmac heathrow_mb_un_reset(struct media_bay_info* bay) 344static void heathrow_mb_un_reset(struct media_bay_info* bay)
345{ 345{
346 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N); 346 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
347} 347}
348 348
349static void __pmac keylargo_mb_un_reset(struct media_bay_info* bay) 349static void keylargo_mb_un_reset(struct media_bay_info* bay)
350{ 350{
351 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET); 351 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
352} 352}
353 353
354static void __pmac ohare_mb_un_reset_ide(struct media_bay_info* bay) 354static void ohare_mb_un_reset_ide(struct media_bay_info* bay)
355{ 355{
356 MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N); 356 MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N);
357} 357}
358 358
359static void __pmac heathrow_mb_un_reset_ide(struct media_bay_info* bay) 359static void heathrow_mb_un_reset_ide(struct media_bay_info* bay)
360{ 360{
361 MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N); 361 MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
362} 362}
363 363
364static void __pmac keylargo_mb_un_reset_ide(struct media_bay_info* bay) 364static void keylargo_mb_un_reset_ide(struct media_bay_info* bay)
365{ 365{
366 MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N); 366 MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
367} 367}
368 368
369static inline void __pmac set_mb_power(struct media_bay_info* bay, int onoff) 369static inline void set_mb_power(struct media_bay_info* bay, int onoff)
370{ 370{
371 /* Power up up and assert the bay reset line */ 371 /* Power up up and assert the bay reset line */
372 if (onoff) { 372 if (onoff) {
@@ -382,7 +382,7 @@ static inline void __pmac set_mb_power(struct media_bay_info* bay, int onoff)
382 bay->timer = msecs_to_jiffies(MB_POWER_DELAY); 382 bay->timer = msecs_to_jiffies(MB_POWER_DELAY);
383} 383}
384 384
385static void __pmac poll_media_bay(struct media_bay_info* bay) 385static void poll_media_bay(struct media_bay_info* bay)
386{ 386{
387 int id = bay->ops->content(bay); 387 int id = bay->ops->content(bay);
388 388
@@ -415,7 +415,7 @@ static void __pmac poll_media_bay(struct media_bay_info* bay)
415 } 415 }
416} 416}
417 417
418int __pmac check_media_bay(struct device_node *which_bay, int what) 418int check_media_bay(struct device_node *which_bay, int what)
419{ 419{
420#ifdef CONFIG_BLK_DEV_IDE 420#ifdef CONFIG_BLK_DEV_IDE
421 int i; 421 int i;
@@ -432,7 +432,7 @@ int __pmac check_media_bay(struct device_node *which_bay, int what)
432} 432}
433EXPORT_SYMBOL(check_media_bay); 433EXPORT_SYMBOL(check_media_bay);
434 434
435int __pmac check_media_bay_by_base(unsigned long base, int what) 435int check_media_bay_by_base(unsigned long base, int what)
436{ 436{
437#ifdef CONFIG_BLK_DEV_IDE 437#ifdef CONFIG_BLK_DEV_IDE
438 int i; 438 int i;
@@ -449,7 +449,7 @@ int __pmac check_media_bay_by_base(unsigned long base, int what)
449 return -ENODEV; 449 return -ENODEV;
450} 450}
451 451
452int __pmac media_bay_set_ide_infos(struct device_node* which_bay, unsigned long base, 452int media_bay_set_ide_infos(struct device_node* which_bay, unsigned long base,
453 int irq, int index) 453 int irq, int index)
454{ 454{
455#ifdef CONFIG_BLK_DEV_IDE 455#ifdef CONFIG_BLK_DEV_IDE
@@ -489,7 +489,7 @@ int __pmac media_bay_set_ide_infos(struct device_node* which_bay, unsigned long
489 return -ENODEV; 489 return -ENODEV;
490} 490}
491 491
492static void __pmac media_bay_step(int i) 492static void media_bay_step(int i)
493{ 493{
494 struct media_bay_info* bay = &media_bays[i]; 494 struct media_bay_info* bay = &media_bays[i];
495 495
@@ -619,7 +619,7 @@ static void __pmac media_bay_step(int i)
619 * with the IDE driver. It needs to be a thread because 619 * with the IDE driver. It needs to be a thread because
620 * ide_register can't be called from interrupt context. 620 * ide_register can't be called from interrupt context.
621 */ 621 */
622static int __pmac media_bay_task(void *x) 622static int media_bay_task(void *x)
623{ 623{
624 int i; 624 int i;
625 625
@@ -704,7 +704,7 @@ static int __devinit media_bay_attach(struct macio_dev *mdev, const struct of_de
704 704
705} 705}
706 706
707static int __pmac media_bay_suspend(struct macio_dev *mdev, pm_message_t state) 707static int media_bay_suspend(struct macio_dev *mdev, pm_message_t state)
708{ 708{
709 struct media_bay_info *bay = macio_get_drvdata(mdev); 709 struct media_bay_info *bay = macio_get_drvdata(mdev);
710 710
@@ -719,7 +719,7 @@ static int __pmac media_bay_suspend(struct macio_dev *mdev, pm_message_t state)
719 return 0; 719 return 0;
720} 720}
721 721
722static int __pmac media_bay_resume(struct macio_dev *mdev) 722static int media_bay_resume(struct macio_dev *mdev)
723{ 723{
724 struct media_bay_info *bay = macio_get_drvdata(mdev); 724 struct media_bay_info *bay = macio_get_drvdata(mdev);
725 725
@@ -760,7 +760,7 @@ static int __pmac media_bay_resume(struct macio_dev *mdev)
760 760
761/* Definitions of "ops" structures. 761/* Definitions of "ops" structures.
762 */ 762 */
763static struct mb_ops ohare_mb_ops __pmacdata = { 763static struct mb_ops ohare_mb_ops = {
764 .name = "Ohare", 764 .name = "Ohare",
765 .content = ohare_mb_content, 765 .content = ohare_mb_content,
766 .power = ohare_mb_power, 766 .power = ohare_mb_power,
@@ -769,7 +769,7 @@ static struct mb_ops ohare_mb_ops __pmacdata = {
769 .un_reset_ide = ohare_mb_un_reset_ide, 769 .un_reset_ide = ohare_mb_un_reset_ide,
770}; 770};
771 771
772static struct mb_ops heathrow_mb_ops __pmacdata = { 772static struct mb_ops heathrow_mb_ops = {
773 .name = "Heathrow", 773 .name = "Heathrow",
774 .content = heathrow_mb_content, 774 .content = heathrow_mb_content,
775 .power = heathrow_mb_power, 775 .power = heathrow_mb_power,
@@ -778,7 +778,7 @@ static struct mb_ops heathrow_mb_ops __pmacdata = {
778 .un_reset_ide = heathrow_mb_un_reset_ide, 778 .un_reset_ide = heathrow_mb_un_reset_ide,
779}; 779};
780 780
781static struct mb_ops keylargo_mb_ops __pmacdata = { 781static struct mb_ops keylargo_mb_ops = {
782 .name = "KeyLargo", 782 .name = "KeyLargo",
783 .init = keylargo_mb_init, 783 .init = keylargo_mb_init,
784 .content = keylargo_mb_content, 784 .content = keylargo_mb_content,
diff --git a/drivers/macintosh/via-cuda.c b/drivers/macintosh/via-cuda.c
index 417deb5de108..d843a6c9c6df 100644
--- a/drivers/macintosh/via-cuda.c
+++ b/drivers/macintosh/via-cuda.c
@@ -37,7 +37,6 @@ static DEFINE_SPINLOCK(cuda_lock);
37 37
38#ifdef CONFIG_MAC 38#ifdef CONFIG_MAC
39#define CUDA_IRQ IRQ_MAC_ADB 39#define CUDA_IRQ IRQ_MAC_ADB
40#define __openfirmware
41#define eieio() 40#define eieio()
42#else 41#else
43#define CUDA_IRQ vias->intrs[0].line 42#define CUDA_IRQ vias->intrs[0].line
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index 645a2e5c70ab..76719451e384 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -244,7 +244,7 @@ int pmu_wink(struct adb_request *req);
244 * - the number of response bytes which the PMU will return, or 244 * - the number of response bytes which the PMU will return, or
245 * -1 if it will send a length byte. 245 * -1 if it will send a length byte.
246 */ 246 */
247static const s8 pmu_data_len[256][2] __openfirmwaredata = { 247static const s8 pmu_data_len[256][2] = {
248/* 0 1 2 3 4 5 6 7 */ 248/* 0 1 2 3 4 5 6 7 */
249/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 249/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
250/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 250/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
@@ -295,7 +295,7 @@ static struct backlight_controller pmu_backlight_controller = {
295}; 295};
296#endif /* CONFIG_PMAC_BACKLIGHT */ 296#endif /* CONFIG_PMAC_BACKLIGHT */
297 297
298int __openfirmware 298int
299find_via_pmu(void) 299find_via_pmu(void)
300{ 300{
301 if (via != 0) 301 if (via != 0)
@@ -374,7 +374,7 @@ find_via_pmu(void)
374} 374}
375 375
376#ifdef CONFIG_ADB 376#ifdef CONFIG_ADB
377static int __openfirmware 377static int
378pmu_probe(void) 378pmu_probe(void)
379{ 379{
380 return vias == NULL? -ENODEV: 0; 380 return vias == NULL? -ENODEV: 0;
@@ -520,7 +520,7 @@ static int __init via_pmu_dev_init(void)
520 520
521device_initcall(via_pmu_dev_init); 521device_initcall(via_pmu_dev_init);
522 522
523static int __openfirmware 523static int
524init_pmu(void) 524init_pmu(void)
525{ 525{
526 int timeout; 526 int timeout;
@@ -625,7 +625,7 @@ static void pmu_set_server_mode(int server_mode)
625/* This new version of the code for 2400/3400/3500 powerbooks 625/* This new version of the code for 2400/3400/3500 powerbooks
626 * is inspired from the implementation in gkrellm-pmu 626 * is inspired from the implementation in gkrellm-pmu
627 */ 627 */
628static void __pmac 628static void
629done_battery_state_ohare(struct adb_request* req) 629done_battery_state_ohare(struct adb_request* req)
630{ 630{
631 /* format: 631 /* format:
@@ -713,7 +713,7 @@ done_battery_state_ohare(struct adb_request* req)
713 clear_bit(0, &async_req_locks); 713 clear_bit(0, &async_req_locks);
714} 714}
715 715
716static void __pmac 716static void
717done_battery_state_smart(struct adb_request* req) 717done_battery_state_smart(struct adb_request* req)
718{ 718{
719 /* format: 719 /* format:
@@ -791,7 +791,7 @@ done_battery_state_smart(struct adb_request* req)
791 clear_bit(0, &async_req_locks); 791 clear_bit(0, &async_req_locks);
792} 792}
793 793
794static void __pmac 794static void
795query_battery_state(void) 795query_battery_state(void)
796{ 796{
797 if (test_and_set_bit(0, &async_req_locks)) 797 if (test_and_set_bit(0, &async_req_locks))
@@ -804,7 +804,7 @@ query_battery_state(void)
804 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); 804 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
805} 805}
806 806
807static int __pmac 807static int
808proc_get_info(char *page, char **start, off_t off, 808proc_get_info(char *page, char **start, off_t off,
809 int count, int *eof, void *data) 809 int count, int *eof, void *data)
810{ 810{
@@ -819,7 +819,7 @@ proc_get_info(char *page, char **start, off_t off,
819 return p - page; 819 return p - page;
820} 820}
821 821
822static int __pmac 822static int
823proc_get_irqstats(char *page, char **start, off_t off, 823proc_get_irqstats(char *page, char **start, off_t off,
824 int count, int *eof, void *data) 824 int count, int *eof, void *data)
825{ 825{
@@ -846,7 +846,7 @@ proc_get_irqstats(char *page, char **start, off_t off,
846 return p - page; 846 return p - page;
847} 847}
848 848
849static int __pmac 849static int
850proc_get_batt(char *page, char **start, off_t off, 850proc_get_batt(char *page, char **start, off_t off,
851 int count, int *eof, void *data) 851 int count, int *eof, void *data)
852{ 852{
@@ -870,7 +870,7 @@ proc_get_batt(char *page, char **start, off_t off,
870 return p - page; 870 return p - page;
871} 871}
872 872
873static int __pmac 873static int
874proc_read_options(char *page, char **start, off_t off, 874proc_read_options(char *page, char **start, off_t off,
875 int count, int *eof, void *data) 875 int count, int *eof, void *data)
876{ 876{
@@ -887,7 +887,7 @@ proc_read_options(char *page, char **start, off_t off,
887 return p - page; 887 return p - page;
888} 888}
889 889
890static int __pmac 890static int
891proc_write_options(struct file *file, const char __user *buffer, 891proc_write_options(struct file *file, const char __user *buffer,
892 unsigned long count, void *data) 892 unsigned long count, void *data)
893{ 893{
@@ -934,7 +934,7 @@ proc_write_options(struct file *file, const char __user *buffer,
934 934
935#ifdef CONFIG_ADB 935#ifdef CONFIG_ADB
936/* Send an ADB command */ 936/* Send an ADB command */
937static int __pmac 937static int
938pmu_send_request(struct adb_request *req, int sync) 938pmu_send_request(struct adb_request *req, int sync)
939{ 939{
940 int i, ret; 940 int i, ret;
@@ -1014,7 +1014,7 @@ pmu_send_request(struct adb_request *req, int sync)
1014} 1014}
1015 1015
1016/* Enable/disable autopolling */ 1016/* Enable/disable autopolling */
1017static int __pmac 1017static int
1018pmu_adb_autopoll(int devs) 1018pmu_adb_autopoll(int devs)
1019{ 1019{
1020 struct adb_request req; 1020 struct adb_request req;
@@ -1037,7 +1037,7 @@ pmu_adb_autopoll(int devs)
1037} 1037}
1038 1038
1039/* Reset the ADB bus */ 1039/* Reset the ADB bus */
1040static int __pmac 1040static int
1041pmu_adb_reset_bus(void) 1041pmu_adb_reset_bus(void)
1042{ 1042{
1043 struct adb_request req; 1043 struct adb_request req;
@@ -1072,7 +1072,7 @@ pmu_adb_reset_bus(void)
1072#endif /* CONFIG_ADB */ 1072#endif /* CONFIG_ADB */
1073 1073
1074/* Construct and send a pmu request */ 1074/* Construct and send a pmu request */
1075int __openfirmware 1075int
1076pmu_request(struct adb_request *req, void (*done)(struct adb_request *), 1076pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1077 int nbytes, ...) 1077 int nbytes, ...)
1078{ 1078{
@@ -1098,7 +1098,7 @@ pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1098 return pmu_queue_request(req); 1098 return pmu_queue_request(req);
1099} 1099}
1100 1100
1101int __pmac 1101int
1102pmu_queue_request(struct adb_request *req) 1102pmu_queue_request(struct adb_request *req)
1103{ 1103{
1104 unsigned long flags; 1104 unsigned long flags;
@@ -1190,7 +1190,7 @@ pmu_done(struct adb_request *req)
1190 (*done)(req); 1190 (*done)(req);
1191} 1191}
1192 1192
1193static void __pmac 1193static void
1194pmu_start(void) 1194pmu_start(void)
1195{ 1195{
1196 struct adb_request *req; 1196 struct adb_request *req;
@@ -1214,7 +1214,7 @@ pmu_start(void)
1214 send_byte(req->data[0]); 1214 send_byte(req->data[0]);
1215} 1215}
1216 1216
1217void __openfirmware 1217void
1218pmu_poll(void) 1218pmu_poll(void)
1219{ 1219{
1220 if (!via) 1220 if (!via)
@@ -1224,7 +1224,7 @@ pmu_poll(void)
1224 via_pmu_interrupt(0, NULL, NULL); 1224 via_pmu_interrupt(0, NULL, NULL);
1225} 1225}
1226 1226
1227void __openfirmware 1227void
1228pmu_poll_adb(void) 1228pmu_poll_adb(void)
1229{ 1229{
1230 if (!via) 1230 if (!via)
@@ -1239,7 +1239,7 @@ pmu_poll_adb(void)
1239 || req_awaiting_reply)); 1239 || req_awaiting_reply));
1240} 1240}
1241 1241
1242void __openfirmware 1242void
1243pmu_wait_complete(struct adb_request *req) 1243pmu_wait_complete(struct adb_request *req)
1244{ 1244{
1245 if (!via) 1245 if (!via)
@@ -1253,7 +1253,7 @@ pmu_wait_complete(struct adb_request *req)
1253 * This is done to avoid spurrious shutdowns when we know we'll have 1253 * This is done to avoid spurrious shutdowns when we know we'll have
1254 * interrupts switched off for a long time 1254 * interrupts switched off for a long time
1255 */ 1255 */
1256void __openfirmware 1256void
1257pmu_suspend(void) 1257pmu_suspend(void)
1258{ 1258{
1259 unsigned long flags; 1259 unsigned long flags;
@@ -1293,7 +1293,7 @@ pmu_suspend(void)
1293 } while (1); 1293 } while (1);
1294} 1294}
1295 1295
1296void __openfirmware 1296void
1297pmu_resume(void) 1297pmu_resume(void)
1298{ 1298{
1299 unsigned long flags; 1299 unsigned long flags;
@@ -1323,7 +1323,7 @@ pmu_resume(void)
1323} 1323}
1324 1324
1325/* Interrupt data could be the result data from an ADB cmd */ 1325/* Interrupt data could be the result data from an ADB cmd */
1326static void __pmac 1326static void
1327pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs) 1327pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
1328{ 1328{
1329 unsigned char ints, pirq; 1329 unsigned char ints, pirq;
@@ -1435,7 +1435,7 @@ next:
1435 goto next; 1435 goto next;
1436} 1436}
1437 1437
1438static struct adb_request* __pmac 1438static struct adb_request*
1439pmu_sr_intr(struct pt_regs *regs) 1439pmu_sr_intr(struct pt_regs *regs)
1440{ 1440{
1441 struct adb_request *req; 1441 struct adb_request *req;
@@ -1541,7 +1541,7 @@ pmu_sr_intr(struct pt_regs *regs)
1541 return NULL; 1541 return NULL;
1542} 1542}
1543 1543
1544static irqreturn_t __pmac 1544static irqreturn_t
1545via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs) 1545via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
1546{ 1546{
1547 unsigned long flags; 1547 unsigned long flags;
@@ -1629,7 +1629,7 @@ no_free_slot:
1629 return IRQ_RETVAL(handled); 1629 return IRQ_RETVAL(handled);
1630} 1630}
1631 1631
1632void __pmac 1632void
1633pmu_unlock(void) 1633pmu_unlock(void)
1634{ 1634{
1635 unsigned long flags; 1635 unsigned long flags;
@@ -1642,7 +1642,7 @@ pmu_unlock(void)
1642} 1642}
1643 1643
1644 1644
1645static irqreturn_t __pmac 1645static irqreturn_t
1646gpio1_interrupt(int irq, void *arg, struct pt_regs *regs) 1646gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
1647{ 1647{
1648 unsigned long flags; 1648 unsigned long flags;
@@ -1663,12 +1663,12 @@ gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
1663} 1663}
1664 1664
1665#ifdef CONFIG_PMAC_BACKLIGHT 1665#ifdef CONFIG_PMAC_BACKLIGHT
1666static int backlight_to_bright[] __pmacdata = { 1666static int backlight_to_bright[] = {
1667 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e, 1667 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e,
1668 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e 1668 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e
1669}; 1669};
1670 1670
1671static int __openfirmware 1671static int
1672pmu_set_backlight_enable(int on, int level, void* data) 1672pmu_set_backlight_enable(int on, int level, void* data)
1673{ 1673{
1674 struct adb_request req; 1674 struct adb_request req;
@@ -1688,7 +1688,7 @@ pmu_set_backlight_enable(int on, int level, void* data)
1688 return 0; 1688 return 0;
1689} 1689}
1690 1690
1691static void __openfirmware 1691static void
1692pmu_bright_complete(struct adb_request *req) 1692pmu_bright_complete(struct adb_request *req)
1693{ 1693{
1694 if (req == &bright_req_1) 1694 if (req == &bright_req_1)
@@ -1697,7 +1697,7 @@ pmu_bright_complete(struct adb_request *req)
1697 clear_bit(2, &async_req_locks); 1697 clear_bit(2, &async_req_locks);
1698} 1698}
1699 1699
1700static int __openfirmware 1700static int
1701pmu_set_backlight_level(int level, void* data) 1701pmu_set_backlight_level(int level, void* data)
1702{ 1702{
1703 if (vias == NULL) 1703 if (vias == NULL)
@@ -1717,7 +1717,7 @@ pmu_set_backlight_level(int level, void* data)
1717} 1717}
1718#endif /* CONFIG_PMAC_BACKLIGHT */ 1718#endif /* CONFIG_PMAC_BACKLIGHT */
1719 1719
1720void __pmac 1720void
1721pmu_enable_irled(int on) 1721pmu_enable_irled(int on)
1722{ 1722{
1723 struct adb_request req; 1723 struct adb_request req;
@@ -1732,7 +1732,7 @@ pmu_enable_irled(int on)
1732 pmu_wait_complete(&req); 1732 pmu_wait_complete(&req);
1733} 1733}
1734 1734
1735void __pmac 1735void
1736pmu_restart(void) 1736pmu_restart(void)
1737{ 1737{
1738 struct adb_request req; 1738 struct adb_request req;
@@ -1757,7 +1757,7 @@ pmu_restart(void)
1757 ; 1757 ;
1758} 1758}
1759 1759
1760void __pmac 1760void
1761pmu_shutdown(void) 1761pmu_shutdown(void)
1762{ 1762{
1763 struct adb_request req; 1763 struct adb_request req;
@@ -2076,7 +2076,7 @@ pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n)
2076} 2076}
2077 2077
2078/* Sleep is broadcast last-to-first */ 2078/* Sleep is broadcast last-to-first */
2079static int __pmac 2079static int
2080broadcast_sleep(int when, int fallback) 2080broadcast_sleep(int when, int fallback)
2081{ 2081{
2082 int ret = PBOOK_SLEEP_OK; 2082 int ret = PBOOK_SLEEP_OK;
@@ -2101,7 +2101,7 @@ broadcast_sleep(int when, int fallback)
2101} 2101}
2102 2102
2103/* Wake is broadcast first-to-last */ 2103/* Wake is broadcast first-to-last */
2104static int __pmac 2104static int
2105broadcast_wake(void) 2105broadcast_wake(void)
2106{ 2106{
2107 int ret = PBOOK_SLEEP_OK; 2107 int ret = PBOOK_SLEEP_OK;
@@ -2132,7 +2132,7 @@ static struct pci_save {
2132} *pbook_pci_saves; 2132} *pbook_pci_saves;
2133static int pbook_npci_saves; 2133static int pbook_npci_saves;
2134 2134
2135static void __pmac 2135static void
2136pbook_alloc_pci_save(void) 2136pbook_alloc_pci_save(void)
2137{ 2137{
2138 int npci; 2138 int npci;
@@ -2149,7 +2149,7 @@ pbook_alloc_pci_save(void)
2149 pbook_npci_saves = npci; 2149 pbook_npci_saves = npci;
2150} 2150}
2151 2151
2152static void __pmac 2152static void
2153pbook_free_pci_save(void) 2153pbook_free_pci_save(void)
2154{ 2154{
2155 if (pbook_pci_saves == NULL) 2155 if (pbook_pci_saves == NULL)
@@ -2159,7 +2159,7 @@ pbook_free_pci_save(void)
2159 pbook_npci_saves = 0; 2159 pbook_npci_saves = 0;
2160} 2160}
2161 2161
2162static void __pmac 2162static void
2163pbook_pci_save(void) 2163pbook_pci_save(void)
2164{ 2164{
2165 struct pci_save *ps = pbook_pci_saves; 2165 struct pci_save *ps = pbook_pci_saves;
@@ -2190,7 +2190,7 @@ pbook_pci_save(void)
2190 * during boot, it will be in the pci dev list. If it's disabled at this point 2190 * during boot, it will be in the pci dev list. If it's disabled at this point
2191 * (and it will probably be), then you can't access it's config space. 2191 * (and it will probably be), then you can't access it's config space.
2192 */ 2192 */
2193static void __pmac 2193static void
2194pbook_pci_restore(void) 2194pbook_pci_restore(void)
2195{ 2195{
2196 u16 cmd; 2196 u16 cmd;
@@ -2238,7 +2238,7 @@ pbook_pci_restore(void)
2238 2238
2239#ifdef DEBUG_SLEEP 2239#ifdef DEBUG_SLEEP
2240/* N.B. This doesn't work on the 3400 */ 2240/* N.B. This doesn't work on the 3400 */
2241void __pmac 2241void
2242pmu_blink(int n) 2242pmu_blink(int n)
2243{ 2243{
2244 struct adb_request req; 2244 struct adb_request req;
@@ -2277,9 +2277,9 @@ pmu_blink(int n)
2277 * Put the powerbook to sleep. 2277 * Put the powerbook to sleep.
2278 */ 2278 */
2279 2279
2280static u32 save_via[8] __pmacdata; 2280static u32 save_via[8];
2281 2281
2282static void __pmac 2282static void
2283save_via_state(void) 2283save_via_state(void)
2284{ 2284{
2285 save_via[0] = in_8(&via[ANH]); 2285 save_via[0] = in_8(&via[ANH]);
@@ -2291,7 +2291,7 @@ save_via_state(void)
2291 save_via[6] = in_8(&via[T1CL]); 2291 save_via[6] = in_8(&via[T1CL]);
2292 save_via[7] = in_8(&via[T1CH]); 2292 save_via[7] = in_8(&via[T1CH]);
2293} 2293}
2294static void __pmac 2294static void
2295restore_via_state(void) 2295restore_via_state(void)
2296{ 2296{
2297 out_8(&via[ANH], save_via[0]); 2297 out_8(&via[ANH], save_via[0]);
@@ -2307,7 +2307,7 @@ restore_via_state(void)
2307 out_8(&via[IER], IER_SET | SR_INT | CB1_INT); 2307 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
2308} 2308}
2309 2309
2310static int __pmac 2310static int
2311pmac_suspend_devices(void) 2311pmac_suspend_devices(void)
2312{ 2312{
2313 int ret; 2313 int ret;
@@ -2397,7 +2397,7 @@ pmac_suspend_devices(void)
2397 return 0; 2397 return 0;
2398} 2398}
2399 2399
2400static int __pmac 2400static int
2401pmac_wakeup_devices(void) 2401pmac_wakeup_devices(void)
2402{ 2402{
2403 mdelay(100); 2403 mdelay(100);
@@ -2436,7 +2436,7 @@ pmac_wakeup_devices(void)
2436#define GRACKLE_NAP (1<<4) 2436#define GRACKLE_NAP (1<<4)
2437#define GRACKLE_SLEEP (1<<3) 2437#define GRACKLE_SLEEP (1<<3)
2438 2438
2439int __pmac 2439int
2440powerbook_sleep_grackle(void) 2440powerbook_sleep_grackle(void)
2441{ 2441{
2442 unsigned long save_l2cr; 2442 unsigned long save_l2cr;
@@ -2520,7 +2520,7 @@ powerbook_sleep_grackle(void)
2520 return 0; 2520 return 0;
2521} 2521}
2522 2522
2523static int __pmac 2523static int
2524powerbook_sleep_Core99(void) 2524powerbook_sleep_Core99(void)
2525{ 2525{
2526 unsigned long save_l2cr; 2526 unsigned long save_l2cr;
@@ -2620,7 +2620,7 @@ powerbook_sleep_Core99(void)
2620#define PB3400_MEM_CTRL 0xf8000000 2620#define PB3400_MEM_CTRL 0xf8000000
2621#define PB3400_MEM_CTRL_SLEEP 0x70 2621#define PB3400_MEM_CTRL_SLEEP 0x70
2622 2622
2623static int __pmac 2623static int
2624powerbook_sleep_3400(void) 2624powerbook_sleep_3400(void)
2625{ 2625{
2626 int ret, i, x; 2626 int ret, i, x;
@@ -2720,9 +2720,9 @@ struct pmu_private {
2720}; 2720};
2721 2721
2722static LIST_HEAD(all_pmu_pvt); 2722static LIST_HEAD(all_pmu_pvt);
2723static DEFINE_SPINLOCK(all_pvt_lock __pmacdata); 2723static DEFINE_SPINLOCK(all_pvt_lock);
2724 2724
2725static void __pmac 2725static void
2726pmu_pass_intr(unsigned char *data, int len) 2726pmu_pass_intr(unsigned char *data, int len)
2727{ 2727{
2728 struct pmu_private *pp; 2728 struct pmu_private *pp;
@@ -2751,7 +2751,7 @@ pmu_pass_intr(unsigned char *data, int len)
2751 spin_unlock_irqrestore(&all_pvt_lock, flags); 2751 spin_unlock_irqrestore(&all_pvt_lock, flags);
2752} 2752}
2753 2753
2754static int __pmac 2754static int
2755pmu_open(struct inode *inode, struct file *file) 2755pmu_open(struct inode *inode, struct file *file)
2756{ 2756{
2757 struct pmu_private *pp; 2757 struct pmu_private *pp;
@@ -2773,7 +2773,7 @@ pmu_open(struct inode *inode, struct file *file)
2773 return 0; 2773 return 0;
2774} 2774}
2775 2775
2776static ssize_t __pmac 2776static ssize_t
2777pmu_read(struct file *file, char __user *buf, 2777pmu_read(struct file *file, char __user *buf,
2778 size_t count, loff_t *ppos) 2778 size_t count, loff_t *ppos)
2779{ 2779{
@@ -2825,14 +2825,14 @@ pmu_read(struct file *file, char __user *buf,
2825 return ret; 2825 return ret;
2826} 2826}
2827 2827
2828static ssize_t __pmac 2828static ssize_t
2829pmu_write(struct file *file, const char __user *buf, 2829pmu_write(struct file *file, const char __user *buf,
2830 size_t count, loff_t *ppos) 2830 size_t count, loff_t *ppos)
2831{ 2831{
2832 return 0; 2832 return 0;
2833} 2833}
2834 2834
2835static unsigned int __pmac 2835static unsigned int
2836pmu_fpoll(struct file *filp, poll_table *wait) 2836pmu_fpoll(struct file *filp, poll_table *wait)
2837{ 2837{
2838 struct pmu_private *pp = filp->private_data; 2838 struct pmu_private *pp = filp->private_data;
@@ -2849,7 +2849,7 @@ pmu_fpoll(struct file *filp, poll_table *wait)
2849 return mask; 2849 return mask;
2850} 2850}
2851 2851
2852static int __pmac 2852static int
2853pmu_release(struct inode *inode, struct file *file) 2853pmu_release(struct inode *inode, struct file *file)
2854{ 2854{
2855 struct pmu_private *pp = file->private_data; 2855 struct pmu_private *pp = file->private_data;
@@ -2874,8 +2874,7 @@ pmu_release(struct inode *inode, struct file *file)
2874 return 0; 2874 return 0;
2875} 2875}
2876 2876
2877/* Note: removed __openfirmware here since it causes link errors */ 2877static int
2878static int __pmac
2879pmu_ioctl(struct inode * inode, struct file *filp, 2878pmu_ioctl(struct inode * inode, struct file *filp,
2880 u_int cmd, u_long arg) 2879 u_int cmd, u_long arg)
2881{ 2880{
@@ -2957,7 +2956,7 @@ pmu_ioctl(struct inode * inode, struct file *filp,
2957 return error; 2956 return error;
2958} 2957}
2959 2958
2960static struct file_operations pmu_device_fops __pmacdata = { 2959static struct file_operations pmu_device_fops = {
2961 .read = pmu_read, 2960 .read = pmu_read,
2962 .write = pmu_write, 2961 .write = pmu_write,
2963 .poll = pmu_fpoll, 2962 .poll = pmu_fpoll,
@@ -2966,7 +2965,7 @@ static struct file_operations pmu_device_fops __pmacdata = {
2966 .release = pmu_release, 2965 .release = pmu_release,
2967}; 2966};
2968 2967
2969static struct miscdevice pmu_device __pmacdata = { 2968static struct miscdevice pmu_device = {
2970 PMU_MINOR, "pmu", &pmu_device_fops 2969 PMU_MINOR, "pmu", &pmu_device_fops
2971}; 2970};
2972 2971
@@ -2982,7 +2981,7 @@ device_initcall(pmu_device_init);
2982 2981
2983 2982
2984#ifdef DEBUG_SLEEP 2983#ifdef DEBUG_SLEEP
2985static inline void __pmac 2984static inline void
2986polled_handshake(volatile unsigned char __iomem *via) 2985polled_handshake(volatile unsigned char __iomem *via)
2987{ 2986{
2988 via[B] &= ~TREQ; eieio(); 2987 via[B] &= ~TREQ; eieio();
@@ -2993,7 +2992,7 @@ polled_handshake(volatile unsigned char __iomem *via)
2993 ; 2992 ;
2994} 2993}
2995 2994
2996static inline void __pmac 2995static inline void
2997polled_send_byte(volatile unsigned char __iomem *via, int x) 2996polled_send_byte(volatile unsigned char __iomem *via, int x)
2998{ 2997{
2999 via[ACR] |= SR_OUT | SR_EXT; eieio(); 2998 via[ACR] |= SR_OUT | SR_EXT; eieio();
@@ -3001,7 +3000,7 @@ polled_send_byte(volatile unsigned char __iomem *via, int x)
3001 polled_handshake(via); 3000 polled_handshake(via);
3002} 3001}
3003 3002
3004static inline int __pmac 3003static inline int
3005polled_recv_byte(volatile unsigned char __iomem *via) 3004polled_recv_byte(volatile unsigned char __iomem *via)
3006{ 3005{
3007 int x; 3006 int x;
@@ -3013,7 +3012,7 @@ polled_recv_byte(volatile unsigned char __iomem *via)
3013 return x; 3012 return x;
3014} 3013}
3015 3014
3016int __pmac 3015int
3017pmu_polled_request(struct adb_request *req) 3016pmu_polled_request(struct adb_request *req)
3018{ 3017{
3019 unsigned long flags; 3018 unsigned long flags;
diff --git a/drivers/macintosh/via-pmu68k.c b/drivers/macintosh/via-pmu68k.c
index 820dc52e30bc..6f80d76ac17c 100644
--- a/drivers/macintosh/via-pmu68k.c
+++ b/drivers/macintosh/via-pmu68k.c
@@ -835,7 +835,7 @@ static struct pci_save {
835} *pbook_pci_saves; 835} *pbook_pci_saves;
836static int n_pbook_pci_saves; 836static int n_pbook_pci_saves;
837 837
838static inline void __openfirmware 838static inline void
839pbook_pci_save(void) 839pbook_pci_save(void)
840{ 840{
841 int npci; 841 int npci;
@@ -863,7 +863,7 @@ pbook_pci_save(void)
863 } 863 }
864} 864}
865 865
866static inline void __openfirmware 866static inline void
867pbook_pci_restore(void) 867pbook_pci_restore(void)
868{ 868{
869 u16 cmd; 869 u16 cmd;
@@ -902,7 +902,7 @@ pbook_pci_restore(void)
902#define IRQ_ENABLE ((unsigned int *)0xf3000024) 902#define IRQ_ENABLE ((unsigned int *)0xf3000024)
903#define MEM_CTRL ((unsigned int *)0xf8000070) 903#define MEM_CTRL ((unsigned int *)0xf8000070)
904 904
905int __openfirmware powerbook_sleep(void) 905int powerbook_sleep(void)
906{ 906{
907 int ret, i, x; 907 int ret, i, x;
908 static int save_backlight; 908 static int save_backlight;
@@ -1001,25 +1001,24 @@ int __openfirmware powerbook_sleep(void)
1001/* 1001/*
1002 * Support for /dev/pmu device 1002 * Support for /dev/pmu device
1003 */ 1003 */
1004static int __openfirmware pmu_open(struct inode *inode, struct file *file) 1004static int pmu_open(struct inode *inode, struct file *file)
1005{ 1005{
1006 return 0; 1006 return 0;
1007} 1007}
1008 1008
1009static ssize_t __openfirmware pmu_read(struct file *file, char *buf, 1009static ssize_t pmu_read(struct file *file, char *buf,
1010 size_t count, loff_t *ppos) 1010 size_t count, loff_t *ppos)
1011{ 1011{
1012 return 0; 1012 return 0;
1013} 1013}
1014 1014
1015static ssize_t __openfirmware pmu_write(struct file *file, const char *buf, 1015static ssize_t pmu_write(struct file *file, const char *buf,
1016 size_t count, loff_t *ppos) 1016 size_t count, loff_t *ppos)
1017{ 1017{
1018 return 0; 1018 return 0;
1019} 1019}
1020 1020
1021/* Note: removed __openfirmware here since it causes link errors */ 1021static int pmu_ioctl(struct inode * inode, struct file *filp,
1022static int /*__openfirmware*/ pmu_ioctl(struct inode * inode, struct file *filp,
1023 u_int cmd, u_long arg) 1022 u_int cmd, u_long arg)
1024{ 1023{
1025 int error; 1024 int error;
diff --git a/include/asm-ppc64/a.out.h b/include/asm-powerpc/a.out.h
index 3871e252a6f1..c7393a977364 100644
--- a/include/asm-ppc64/a.out.h
+++ b/include/asm-powerpc/a.out.h
@@ -1,14 +1,5 @@
1#ifndef __PPC64_A_OUT_H__ 1#ifndef _ASM_POWERPC_A_OUT_H
2#define __PPC64_A_OUT_H__ 2#define _ASM_POWERPC_A_OUT_H
3
4/*
5 * c 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12 3
13struct exec 4struct exec
14{ 5{
@@ -27,6 +18,7 @@ struct exec
27#define N_SYMSIZE(a) ((a).a_syms) 18#define N_SYMSIZE(a) ((a).a_syms)
28 19
29#ifdef __KERNEL__ 20#ifdef __KERNEL__
21#ifdef __powerpc64__
30 22
31#define STACK_TOP_USER64 TASK_SIZE_USER64 23#define STACK_TOP_USER64 TASK_SIZE_USER64
32#define STACK_TOP_USER32 TASK_SIZE_USER32 24#define STACK_TOP_USER32 TASK_SIZE_USER32
@@ -34,6 +26,11 @@ struct exec
34#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ 26#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
35 STACK_TOP_USER32 : STACK_TOP_USER64) 27 STACK_TOP_USER32 : STACK_TOP_USER64)
36 28
29#else /* __powerpc64__ */
30
31#define STACK_TOP TASK_SIZE
32
33#endif /* __powerpc64__ */
37#endif /* __KERNEL__ */ 34#endif /* __KERNEL__ */
38 35
39#endif /* __PPC64_A_OUT_H__ */ 36#endif /* _ASM_POWERPC_A_OUT_H */
diff --git a/include/asm-ppc/atomic.h b/include/asm-powerpc/atomic.h
index eeafd505836e..ed4b345ed75d 100644
--- a/include/asm-ppc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -1,29 +1,20 @@
1#ifndef _ASM_POWERPC_ATOMIC_H_
2#define _ASM_POWERPC_ATOMIC_H_
3
1/* 4/*
2 * PowerPC atomic operations 5 * PowerPC atomic operations
3 */ 6 */
4 7
5#ifndef _ASM_PPC_ATOMIC_H_
6#define _ASM_PPC_ATOMIC_H_
7
8typedef struct { volatile int counter; } atomic_t; 8typedef struct { volatile int counter; } atomic_t;
9 9
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11#include <asm/synch.h>
11 12
12#define ATOMIC_INIT(i) { (i) } 13#define ATOMIC_INIT(i) { (i) }
13 14
14#define atomic_read(v) ((v)->counter) 15#define atomic_read(v) ((v)->counter)
15#define atomic_set(v,i) (((v)->counter) = (i)) 16#define atomic_set(v,i) (((v)->counter) = (i))
16 17
17extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
18
19#ifdef CONFIG_SMP
20#define SMP_SYNC "sync"
21#define SMP_ISYNC "\n\tisync"
22#else
23#define SMP_SYNC ""
24#define SMP_ISYNC
25#endif
26
27/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx. 18/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
28 * The old ATOMIC_SYNC_FIX covered some but not all of this. 19 * The old ATOMIC_SYNC_FIX covered some but not all of this.
29 */ 20 */
@@ -53,12 +44,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
53 int t; 44 int t;
54 45
55 __asm__ __volatile__( 46 __asm__ __volatile__(
47 EIEIO_ON_SMP
56"1: lwarx %0,0,%2 # atomic_add_return\n\ 48"1: lwarx %0,0,%2 # atomic_add_return\n\
57 add %0,%1,%0\n" 49 add %0,%1,%0\n"
58 PPC405_ERR77(0,%2) 50 PPC405_ERR77(0,%2)
59" stwcx. %0,0,%2 \n\ 51" stwcx. %0,0,%2 \n\
60 bne- 1b" 52 bne- 1b"
61 SMP_ISYNC 53 ISYNC_ON_SMP
62 : "=&r" (t) 54 : "=&r" (t)
63 : "r" (a), "r" (&v->counter) 55 : "r" (a), "r" (&v->counter)
64 : "cc", "memory"); 56 : "cc", "memory");
@@ -88,12 +80,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
88 int t; 80 int t;
89 81
90 __asm__ __volatile__( 82 __asm__ __volatile__(
83 EIEIO_ON_SMP
91"1: lwarx %0,0,%2 # atomic_sub_return\n\ 84"1: lwarx %0,0,%2 # atomic_sub_return\n\
92 subf %0,%1,%0\n" 85 subf %0,%1,%0\n"
93 PPC405_ERR77(0,%2) 86 PPC405_ERR77(0,%2)
94" stwcx. %0,0,%2 \n\ 87" stwcx. %0,0,%2 \n\
95 bne- 1b" 88 bne- 1b"
96 SMP_ISYNC 89 ISYNC_ON_SMP
97 : "=&r" (t) 90 : "=&r" (t)
98 : "r" (a), "r" (&v->counter) 91 : "r" (a), "r" (&v->counter)
99 : "cc", "memory"); 92 : "cc", "memory");
@@ -121,12 +114,13 @@ static __inline__ int atomic_inc_return(atomic_t *v)
121 int t; 114 int t;
122 115
123 __asm__ __volatile__( 116 __asm__ __volatile__(
117 EIEIO_ON_SMP
124"1: lwarx %0,0,%1 # atomic_inc_return\n\ 118"1: lwarx %0,0,%1 # atomic_inc_return\n\
125 addic %0,%0,1\n" 119 addic %0,%0,1\n"
126 PPC405_ERR77(0,%1) 120 PPC405_ERR77(0,%1)
127" stwcx. %0,0,%1 \n\ 121" stwcx. %0,0,%1 \n\
128 bne- 1b" 122 bne- 1b"
129 SMP_ISYNC 123 ISYNC_ON_SMP
130 : "=&r" (t) 124 : "=&r" (t)
131 : "r" (&v->counter) 125 : "r" (&v->counter)
132 : "cc", "memory"); 126 : "cc", "memory");
@@ -164,12 +158,13 @@ static __inline__ int atomic_dec_return(atomic_t *v)
164 int t; 158 int t;
165 159
166 __asm__ __volatile__( 160 __asm__ __volatile__(
161 EIEIO_ON_SMP
167"1: lwarx %0,0,%1 # atomic_dec_return\n\ 162"1: lwarx %0,0,%1 # atomic_dec_return\n\
168 addic %0,%0,-1\n" 163 addic %0,%0,-1\n"
169 PPC405_ERR77(0,%1) 164 PPC405_ERR77(0,%1)
170" stwcx. %0,0,%1\n\ 165" stwcx. %0,0,%1\n\
171 bne- 1b" 166 bne- 1b"
172 SMP_ISYNC 167 ISYNC_ON_SMP
173 : "=&r" (t) 168 : "=&r" (t)
174 : "r" (&v->counter) 169 : "r" (&v->counter)
175 : "cc", "memory"); 170 : "cc", "memory");
@@ -189,13 +184,14 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
189 int t; 184 int t;
190 185
191 __asm__ __volatile__( 186 __asm__ __volatile__(
187 EIEIO_ON_SMP
192"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ 188"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
193 addic. %0,%0,-1\n\ 189 addic. %0,%0,-1\n\
194 blt- 2f\n" 190 blt- 2f\n"
195 PPC405_ERR77(0,%1) 191 PPC405_ERR77(0,%1)
196" stwcx. %0,0,%1\n\ 192" stwcx. %0,0,%1\n\
197 bne- 1b" 193 bne- 1b"
198 SMP_ISYNC 194 ISYNC_ON_SMP
199 "\n\ 195 "\n\
2002:" : "=&r" (t) 1962:" : "=&r" (t)
201 : "r" (&v->counter) 197 : "r" (&v->counter)
@@ -204,11 +200,10 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
204 return t; 200 return t;
205} 201}
206 202
207#define __MB __asm__ __volatile__ (SMP_SYNC : : : "memory") 203#define smp_mb__before_atomic_dec() smp_mb()
208#define smp_mb__before_atomic_dec() __MB 204#define smp_mb__after_atomic_dec() smp_mb()
209#define smp_mb__after_atomic_dec() __MB 205#define smp_mb__before_atomic_inc() smp_mb()
210#define smp_mb__before_atomic_inc() __MB 206#define smp_mb__after_atomic_inc() smp_mb()
211#define smp_mb__after_atomic_inc() __MB
212 207
213#endif /* __KERNEL__ */ 208#endif /* __KERNEL__ */
214#endif /* _ASM_PPC_ATOMIC_H_ */ 209#endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/include/asm-ppc64/auxvec.h b/include/asm-powerpc/auxvec.h
index ac6381a106e1..79d8c4732309 100644
--- a/include/asm-ppc64/auxvec.h
+++ b/include/asm-powerpc/auxvec.h
@@ -1,5 +1,5 @@
1#ifndef __PPC64_AUXVEC_H 1#ifndef _ASM_POWERPC_AUXVEC_H
2#define __PPC64_AUXVEC_H 2#define _ASM_POWERPC_AUXVEC_H
3 3
4/* 4/*
5 * We need to put in some extra aux table entries to tell glibc what 5 * We need to put in some extra aux table entries to tell glibc what
@@ -14,6 +14,8 @@
14/* The vDSO location. We have to use the same value as x86 for glibc's 14/* The vDSO location. We have to use the same value as x86 for glibc's
15 * sake :-) 15 * sake :-)
16 */ 16 */
17#ifdef __powerpc64__
17#define AT_SYSINFO_EHDR 33 18#define AT_SYSINFO_EHDR 33
19#endif
18 20
19#endif /* __PPC64_AUXVEC_H */ 21#endif
diff --git a/include/asm-ppc64/bug.h b/include/asm-powerpc/bug.h
index 160178278861..e4d028e87020 100644
--- a/include/asm-ppc64/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_BUG_H 1#ifndef _ASM_POWERPC_BUG_H
2#define _PPC64_BUG_H 2#define _ASM_POWERPC_BUG_H
3 3
4/* 4/*
5 * Define an illegal instr to trap on the bug. 5 * Define an illegal instr to trap on the bug.
@@ -11,9 +11,21 @@
11 11
12#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
13 13
14#ifdef __powerpc64__
15#define BUG_TABLE_ENTRY(label, line, file, func) \
16 ".llong " #label "\n .long " #line "\n .llong " #file ", " #func "\n"
17#define TRAP_OP(ra, rb) "1: tdnei " #ra ", " #rb "\n"
18#define DATA_TYPE long long
19#else
20#define BUG_TABLE_ENTRY(label, line, file, func) \
21 ".long " #label ", " #line ", " #file ", " #func "\n"
22#define TRAP_OP(ra, rb) "1: twnei " #ra ", " #rb "\n"
23#define DATA_TYPE int
24#endif /* __powerpc64__ */
25
14struct bug_entry { 26struct bug_entry {
15 unsigned long bug_addr; 27 unsigned long bug_addr;
16 long line; 28 int line;
17 const char *file; 29 const char *file;
18 const char *function; 30 const char *function;
19}; 31};
@@ -32,28 +44,28 @@ struct bug_entry *find_bug(unsigned long bugaddr);
32 __asm__ __volatile__( \ 44 __asm__ __volatile__( \
33 "1: twi 31,0,0\n" \ 45 "1: twi 31,0,0\n" \
34 ".section __bug_table,\"a\"\n\t" \ 46 ".section __bug_table,\"a\"\n\t" \
35 " .llong 1b,%0,%1,%2\n" \ 47 BUG_TABLE_ENTRY(1b,%0,%1,%2) \
36 ".previous" \ 48 ".previous" \
37 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ 49 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
38} while (0) 50} while (0)
39 51
40#define BUG_ON(x) do { \ 52#define BUG_ON(x) do { \
41 __asm__ __volatile__( \ 53 __asm__ __volatile__( \
42 "1: tdnei %0,0\n" \ 54 TRAP_OP(%0,0) \
43 ".section __bug_table,\"a\"\n\t" \ 55 ".section __bug_table,\"a\"\n\t" \
44 " .llong 1b,%1,%2,%3\n" \ 56 BUG_TABLE_ENTRY(1b,%1,%2,%3) \
45 ".previous" \ 57 ".previous" \
46 : : "r" ((long long)(x)), "i" (__LINE__), \ 58 : : "r" ((DATA_TYPE)(x)), "i" (__LINE__), \
47 "i" (__FILE__), "i" (__FUNCTION__)); \ 59 "i" (__FILE__), "i" (__FUNCTION__)); \
48} while (0) 60} while (0)
49 61
50#define WARN_ON(x) do { \ 62#define WARN_ON(x) do { \
51 __asm__ __volatile__( \ 63 __asm__ __volatile__( \
52 "1: tdnei %0,0\n" \ 64 TRAP_OP(%0,0) \
53 ".section __bug_table,\"a\"\n\t" \ 65 ".section __bug_table,\"a\"\n\t" \
54 " .llong 1b,%1,%2,%3\n" \ 66 BUG_TABLE_ENTRY(1b,%1,%2,%3) \
55 ".previous" \ 67 ".previous" \
56 : : "r" ((long long)(x)), \ 68 : : "r" ((DATA_TYPE)(x)), \
57 "i" (__LINE__ + BUG_WARNING_TRAP), \ 69 "i" (__LINE__ + BUG_WARNING_TRAP), \
58 "i" (__FILE__), "i" (__FUNCTION__)); \ 70 "i" (__FILE__), "i" (__FUNCTION__)); \
59} while (0) 71} while (0)
@@ -61,9 +73,9 @@ struct bug_entry *find_bug(unsigned long bugaddr);
61#define HAVE_ARCH_BUG 73#define HAVE_ARCH_BUG
62#define HAVE_ARCH_BUG_ON 74#define HAVE_ARCH_BUG_ON
63#define HAVE_ARCH_WARN_ON 75#define HAVE_ARCH_WARN_ON
64#endif 76#endif /* CONFIG_BUG */
65#endif 77#endif /* __ASSEMBLY __ */
66 78
67#include <asm-generic/bug.h> 79#include <asm-generic/bug.h>
68 80
69#endif 81#endif /* _ASM_POWERPC_BUG_H */
diff --git a/include/asm-ppc/dma.h b/include/asm-powerpc/dma.h
index cc8e5cd8c9d2..926378d2cd94 100644
--- a/include/asm-ppc/dma.h
+++ b/include/asm-powerpc/dma.h
@@ -1,18 +1,14 @@
1#ifndef _ASM_POWERPC_DMA_H
2#define _ASM_POWERPC_DMA_H
3
1/* 4/*
2 * include/asm-ppc/dma.h: Defines for using and allocating dma channels. 5 * Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992. 6 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen 7 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992. 8 * and John Boyd, Nov. 1992.
6 * Changes for ppc sound by Christoph Nadig 9 * Changes for ppc sound by Christoph Nadig
7 */ 10 */
8 11
9#ifdef __KERNEL__
10
11#include <linux/config.h>
12#include <asm/io.h>
13#include <linux/spinlock.h>
14#include <asm/system.h>
15
16/* 12/*
17 * Note: Adapted for PowerPC by Gary Thomas 13 * Note: Adapted for PowerPC by Gary Thomas
18 * Modified by Cort Dougan <cort@cs.nmt.edu> 14 * Modified by Cort Dougan <cort@cs.nmt.edu>
@@ -25,8 +21,10 @@
25 * with a grain of salt. 21 * with a grain of salt.
26 */ 22 */
27 23
28#ifndef _ASM_DMA_H 24#include <linux/config.h>
29#define _ASM_DMA_H 25#include <asm/io.h>
26#include <linux/spinlock.h>
27#include <asm/system.h>
30 28
31#ifndef MAX_DMA_CHANNELS 29#ifndef MAX_DMA_CHANNELS
32#define MAX_DMA_CHANNELS 8 30#define MAX_DMA_CHANNELS 8
@@ -34,11 +32,9 @@
34 32
35/* The maximum address that we can perform a DMA transfer to on this platform */ 33/* The maximum address that we can perform a DMA transfer to on this platform */
36/* Doesn't really apply... */ 34/* Doesn't really apply... */
37#define MAX_DMA_ADDRESS 0xFFFFFFFF 35#define MAX_DMA_ADDRESS (~0UL)
38 36
39/* in arch/ppc/kernel/setup.c -- Cort */ 37#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
40extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
41extern unsigned long ISA_DMA_THRESHOLD;
42 38
43#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER 39#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
44#define dma_outb outb_p 40#define dma_outb outb_p
@@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2;
171#define DMA1_EXT_REG 0x40B 167#define DMA1_EXT_REG 0x40B
172#define DMA2_EXT_REG 0x4D6 168#define DMA2_EXT_REG 0x4D6
173 169
170#ifndef __powerpc64__
171 /* in arch/ppc/kernel/setup.c -- Cort */
172 extern unsigned int DMA_MODE_WRITE;
173 extern unsigned int DMA_MODE_READ;
174 extern unsigned long ISA_DMA_THRESHOLD;
175#else
176 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
177 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
178#endif
179
174#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ 180#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
181
175#define DMA_AUTOINIT 0x10 182#define DMA_AUTOINIT 0x10
176 183
177extern spinlock_t dma_spin_lock; 184extern spinlock_t dma_spin_lock;
@@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr)
200 if (dmanr <= 3) { 207 if (dmanr <= 3) {
201 dma_outb(dmanr, DMA1_MASK_REG); 208 dma_outb(dmanr, DMA1_MASK_REG);
202 dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ 209 dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */
203 } else 210 } else {
204 dma_outb(dmanr & 3, DMA2_MASK_REG); 211 dma_outb(dmanr & 3, DMA2_MASK_REG);
212 }
205} 213}
206 214
207static __inline__ void disable_dma(unsigned int dmanr) 215static __inline__ void disable_dma(unsigned int dmanr)
@@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
290static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) 298static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
291{ 299{
292 if (dmanr <= 3) { 300 if (dmanr <= 3) {
293 dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); 301 dma_outb(phys & 0xff,
294 dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); 302 ((dmanr & 3) << 1) + IO_DMA1_BASE);
303 dma_outb((phys >> 8) & 0xff,
304 ((dmanr & 3) << 1) + IO_DMA1_BASE);
295 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { 305 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
296 dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 306 dma_outb(phys & 0xff,
297 dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 307 ((dmanr & 3) << 2) + IO_DMA2_BASE);
308 dma_outb((phys >> 8) & 0xff,
309 ((dmanr & 3) << 2) + IO_DMA2_BASE);
298 dma_outb((dmanr & 3), DMA2_EXT_REG); 310 dma_outb((dmanr & 3), DMA2_EXT_REG);
299 } else { 311 } else {
300 dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 312 dma_outb((phys >> 1) & 0xff,
301 dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 313 ((dmanr & 3) << 2) + IO_DMA2_BASE);
314 dma_outb((phys >> 9) & 0xff,
315 ((dmanr & 3) << 2) + IO_DMA2_BASE);
302 } 316 }
303 set_dma_page(dmanr, phys >> 16); 317 set_dma_page(dmanr, phys >> 16);
304} 318}
305 319
320
306/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for 321/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
307 * a specific DMA channel. 322 * a specific DMA channel.
308 * You must ensure the parameters are valid. 323 * You must ensure the parameters are valid.
@@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
315{ 330{
316 count--; 331 count--;
317 if (dmanr <= 3) { 332 if (dmanr <= 3) {
318 dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); 333 dma_outb(count & 0xff,
319 dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 + 334 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
320 IO_DMA1_BASE); 335 dma_outb((count >> 8) & 0xff,
336 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
321 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { 337 } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
322 dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); 338 dma_outb(count & 0xff,
323 dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 + 339 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
324 IO_DMA2_BASE); 340 dma_outb((count >> 8) & 0xff,
341 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
325 } else { 342 } else {
326 dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 + 343 dma_outb((count >> 1) & 0xff,
327 IO_DMA2_BASE); 344 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
328 dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 + 345 dma_outb((count >> 9) & 0xff,
329 IO_DMA2_BASE); 346 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
330 } 347 }
331} 348}
332 349
350
333/* Get DMA residue count. After a DMA transfer, this 351/* Get DMA residue count. After a DMA transfer, this
334 * should return zero. Reading this while a DMA transfer is 352 * should return zero. Reading this while a DMA transfer is
335 * still in progress will return unpredictable results. 353 * still in progress will return unpredictable results.
@@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
340 */ 358 */
341static __inline__ int get_dma_residue(unsigned int dmanr) 359static __inline__ int get_dma_residue(unsigned int dmanr)
342{ 360{
343 unsigned int io_port = (dmanr <= 3) ? 361 unsigned int io_port = (dmanr <= 3)
344 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE 362 ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
345 : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE; 363 : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
346 364
347 /* using short to get 16-bit wrap around */ 365 /* using short to get 16-bit wrap around */
@@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr)
352 370
353 return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2) 371 return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
354 ? count : (count << 1); 372 ? count : (count << 1);
355
356} 373}
357 374
358/* These are in kernel/dma.c: */ 375/* These are in kernel/dma.c: */
@@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy;
367#else 384#else
368#define isa_dma_bridge_buggy (0) 385#define isa_dma_bridge_buggy (0)
369#endif 386#endif
370#endif /* _ASM_DMA_H */ 387
371#endif /* __KERNEL__ */ 388#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
389
390#endif /* _ASM_POWERPC_DMA_H */
diff --git a/include/asm-ppc64/elf.h b/include/asm-powerpc/elf.h
index c919a89343db..36b9d5cec50c 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -1,10 +1,11 @@
1#ifndef __PPC64_ELF_H 1#ifndef _ASM_POWERPC_ELF_H
2#define __PPC64_ELF_H 2#define _ASM_POWERPC_ELF_H
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5#include <asm/ptrace.h> 5#include <asm/ptrace.h>
6#include <asm/cputable.h> 6#include <asm/cputable.h>
7#include <asm/auxvec.h> 7#include <asm/auxvec.h>
8#include <asm/page.h>
8 9
9/* PowerPC relocations defined by the ABIs */ 10/* PowerPC relocations defined by the ABIs */
10#define R_PPC_NONE 0 11#define R_PPC_NONE 0
@@ -75,7 +76,7 @@
75#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ 76#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
76#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ 77#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
77 78
78/* Keep this the last entry. */ 79/* keep this the last entry. */
79#define R_PPC_NUM 95 80#define R_PPC_NUM 95
80 81
81/* 82/*
@@ -90,8 +91,6 @@
90 91
91#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ 92#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
92#define ELF_NFPREG 33 /* includes fpscr */ 93#define ELF_NFPREG 33 /* includes fpscr */
93#define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
94#define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
95 94
96typedef unsigned long elf_greg_t64; 95typedef unsigned long elf_greg_t64;
97typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG]; 96typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
@@ -100,8 +99,21 @@ typedef unsigned int elf_greg_t32;
100typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; 99typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
101 100
102/* 101/*
103 * These are used to set parameters in the core dumps. 102 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
104 */ 103 */
104#ifdef __powerpc64__
105# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
106# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
107# define ELF_GREG_TYPE elf_greg_t64
108#else
109# define ELF_NEVRREG 34 /* includes acc (as 2) */
110# define ELF_NVRREG 33 /* includes vscr */
111# define ELF_GREG_TYPE elf_greg_t32
112# define ELF_ARCH EM_PPC
113# define ELF_CLASS ELFCLASS32
114# define ELF_DATA ELFDATA2MSB
115#endif /* __powerpc64__ */
116
105#ifndef ELF_ARCH 117#ifndef ELF_ARCH
106# define ELF_ARCH EM_PPC64 118# define ELF_ARCH EM_PPC64
107# define ELF_CLASS ELFCLASS64 119# define ELF_CLASS ELFCLASS64
@@ -114,8 +126,9 @@ typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
114 typedef elf_greg_t32 elf_greg_t; 126 typedef elf_greg_t32 elf_greg_t;
115 typedef elf_gregset_t32 elf_gregset_t; 127 typedef elf_gregset_t32 elf_gregset_t;
116# define elf_addr_t u32 128# define elf_addr_t u32
117#endif 129#endif /* ELF_ARCH */
118 130
131/* Floating point registers */
119typedef double elf_fpreg_t; 132typedef double elf_fpreg_t;
120typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 133typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
121 134
@@ -125,7 +138,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
125 * The entry with index 32 contains the vscr as the last word (offset 12) 138 * The entry with index 32 contains the vscr as the last word (offset 12)
126 * within the quadword. This allows the vscr to be stored as either a 139 * within the quadword. This allows the vscr to be stored as either a
127 * quadword (since it must be copied via a vector register to/from storage) 140 * quadword (since it must be copied via a vector register to/from storage)
128 * or as a word. The entry with index 33 contains the vrsave as the first 141 * or as a word.
142 *
143 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
129 * word (offset 0) within the quadword. 144 * word (offset 0) within the quadword.
130 * 145 *
131 * This definition of the VMX state is compatible with the current PPC32 146 * This definition of the VMX state is compatible with the current PPC32
@@ -138,7 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
138 */ 153 */
139typedef __vector128 elf_vrreg_t; 154typedef __vector128 elf_vrreg_t;
140typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; 155typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
156#ifdef __powerpc64__
141typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; 157typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
158#endif
142 159
143/* 160/*
144 * This is used to ensure we don't load something for the wrong architecture. 161 * This is used to ensure we don't load something for the wrong architecture.
@@ -146,7 +163,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
146#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) 163#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
147 164
148#define USE_ELF_CORE_DUMP 165#define USE_ELF_CORE_DUMP
149#define ELF_EXEC_PAGESIZE 4096 166#define ELF_EXEC_PAGESIZE PAGE_SIZE
150 167
151/* This is the location that an ET_DYN program is loaded if exec'ed. Typical 168/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
152 use of this is to invoke "./ld.so someprog" to test out a new version of 169 use of this is to invoke "./ld.so someprog" to test out a new version of
@@ -158,26 +175,30 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
158#ifdef __KERNEL__ 175#ifdef __KERNEL__
159 176
160/* Common routine for both 32-bit and 64-bit processes */ 177/* Common routine for both 32-bit and 64-bit processes */
161static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs, 178static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
162 struct pt_regs *regs) 179 struct pt_regs *regs)
163{ 180{
164 int i; 181 int i;
165 int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64); 182 int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);
166 183
167 if (gprs > ELF_NGREG) 184 if (gprs > ELF_NGREG)
168 gprs = ELF_NGREG; 185 gprs = ELF_NGREG;
169 186
170 for (i=0; i < gprs; i++) 187 for (i=0; i < gprs; i++)
171 elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i]; 188 elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
189
190 memset((char *)(elf_regs) + sizeof(struct pt_regs), 0, \
191 sizeof(elf_gregset_t) - sizeof(struct pt_regs));
192
172} 193}
173#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs); 194#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
174 195
175static inline int dump_task_regs(struct task_struct *tsk, 196static inline int dump_task_regs(struct task_struct *tsk,
176 elf_gregset_t *elf_regs) 197 elf_gregset_t *elf_regs)
177{ 198{
178 struct pt_regs *regs = tsk->thread.regs; 199 struct pt_regs *regs = tsk->thread.regs;
179 if (regs) 200 if (regs)
180 ppc64_elf_core_copy_regs(*elf_regs, regs); 201 ppc_elf_core_copy_regs(*elf_regs, regs);
181 202
182 return 1; 203 return 1;
183} 204}
@@ -186,15 +207,21 @@ static inline int dump_task_regs(struct task_struct *tsk,
186extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 207extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
187#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) 208#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
188 209
189/* XXX Should we define the XFPREGS using altivec ??? */ 210#endif /* __KERNEL__ */
190
191#endif
192 211
193/* This yields a mask that user programs can use to figure out what 212/* ELF_HWCAP yields a mask that user programs can use to figure out what
194 instruction set this cpu supports. This could be done in userspace, 213 instruction set this cpu supports. This could be done in userspace,
195 but it's not easy, and we've already done it here. */ 214 but it's not easy, and we've already done it here. */
196 215#ifdef __powerpc64__
197#define ELF_HWCAP (cur_cpu_spec->cpu_user_features) 216# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
217# define ELF_PLAT_INIT(_r, load_addr) do { \
218 memset(_r->gpr, 0, sizeof(_r->gpr)); \
219 _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
220 _r->gpr[2] = load_addr; \
221} while (0)
222#else
223# define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
224#endif /* __powerpc64__ */
198 225
199/* This yields a string that ld.so will use to load implementation 226/* This yields a string that ld.so will use to load implementation
200 specific libraries for optimization. This is more specific in 227 specific libraries for optimization. This is more specific in
@@ -205,14 +232,10 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
205 232
206#define ELF_PLATFORM (NULL) 233#define ELF_PLATFORM (NULL)
207 234
208#define ELF_PLAT_INIT(_r, load_addr) do { \
209 memset(_r->gpr, 0, sizeof(_r->gpr)); \
210 _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
211 _r->gpr[2] = load_addr; \
212} while (0)
213
214#ifdef __KERNEL__ 235#ifdef __KERNEL__
215#define SET_PERSONALITY(ex, ibcs2) \ 236
237#ifdef __powerpc64__
238# define SET_PERSONALITY(ex, ibcs2) \
216do { \ 239do { \
217 unsigned long new_flags = 0; \ 240 unsigned long new_flags = 0; \
218 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 241 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
@@ -225,7 +248,6 @@ do { \
225 if (personality(current->personality) != PER_LINUX32) \ 248 if (personality(current->personality) != PER_LINUX32) \
226 set_personality(PER_LINUX); \ 249 set_personality(PER_LINUX); \
227} while (0) 250} while (0)
228
229/* 251/*
230 * An executable for which elf_read_implies_exec() returns TRUE will 252 * An executable for which elf_read_implies_exec() returns TRUE will
231 * have the READ_IMPLIES_EXEC personality flag set automatically. This 253 * have the READ_IMPLIES_EXEC personality flag set automatically. This
@@ -233,19 +255,26 @@ do { \
233 * the 64bit ABI has never had these issues dont enable the workaround 255 * the 64bit ABI has never had these issues dont enable the workaround
234 * even if we have an executable stack. 256 * even if we have an executable stack.
235 */ 257 */
236#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ 258# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
237 (exec_stk != EXSTACK_DISABLE_X) : 0) 259 (exec_stk != EXSTACK_DISABLE_X) : 0)
260#else
261# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
262#endif /* __powerpc64__ */
238 263
239#endif 264#endif /* __KERNEL__ */
240 265
241extern int dcache_bsize; 266extern int dcache_bsize;
242extern int icache_bsize; 267extern int icache_bsize;
243extern int ucache_bsize; 268extern int ucache_bsize;
244 269
245/* We do have an arch_setup_additional_pages for vDSO matters */ 270#ifdef __powerpc64__
246#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
247struct linux_binprm; 271struct linux_binprm;
272#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */
248extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack); 273extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
274#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
275#else
276#define VDSO_AUX_ENT(a,b)
277#endif /* __powerpc64__ */
249 278
250/* 279/*
251 * The requirements here are: 280 * The requirements here are:
@@ -265,9 +294,8 @@ do { \
265 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ 294 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
266 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ 295 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
267 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ 296 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
268 /* vDSO base */ \ 297 VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base) \
269 NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \ 298} while (0)
270 } while (0)
271 299
272/* PowerPC64 relocations defined by the ABIs */ 300/* PowerPC64 relocations defined by the ABIs */
273#define R_PPC64_NONE R_PPC_NONE 301#define R_PPC64_NONE R_PPC_NONE
@@ -384,4 +412,4 @@ do { \
384/* Keep this the last entry. */ 412/* Keep this the last entry. */
385#define R_PPC64_NUM 107 413#define R_PPC64_NUM 107
386 414
387#endif /* __PPC64_ELF_H */ 415#endif /* _ASM_POWERPC_ELF_H */
diff --git a/include/asm-ppc/hardirq.h b/include/asm-powerpc/hardirq.h
index 94f1411b1a93..2c0a31b1008d 100644
--- a/include/asm-ppc/hardirq.h
+++ b/include/asm-powerpc/hardirq.h
@@ -1,11 +1,5 @@
1#ifdef __KERNEL__ 1#ifndef _ASM_POWERPC_HARDIRQ_H
2#ifndef __ASM_HARDIRQ_H 2#define _ASM_POWERPC_HARDIRQ_H
3#define __ASM_HARDIRQ_H
4
5#include <linux/config.h>
6#include <linux/cache.h>
7#include <linux/smp_lock.h>
8#include <asm/irq.h>
9 3
10/* The __last_jiffy_stamp field is needed to ensure that no decrementer 4/* The __last_jiffy_stamp field is needed to ensure that no decrementer
11 * interrupt is lost on SMP machines. Since on most CPUs it is in the same 5 * interrupt is lost on SMP machines. Since on most CPUs it is in the same
@@ -13,7 +7,7 @@
13 * for uniformity. 7 * for uniformity.
14 */ 8 */
15typedef struct { 9typedef struct {
16 unsigned long __softirq_pending; /* set_bit is used on this */ 10 unsigned int __softirq_pending; /* set_bit is used on this */
17 unsigned int __last_jiffy_stamp; 11 unsigned int __last_jiffy_stamp;
18} ____cacheline_aligned irq_cpustat_t; 12} ____cacheline_aligned irq_cpustat_t;
19 13
@@ -27,5 +21,4 @@ static inline void ack_bad_irq(int irq)
27 BUG(); 21 BUG();
28} 22}
29 23
30#endif /* __ASM_HARDIRQ_H */ 24#endif /* _ASM_POWERPC_HARDIRQ_H */
31#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/hw_irq.h b/include/asm-powerpc/hw_irq.h
index baea40e695ec..605a65e42063 100644
--- a/include/asm-ppc64/hw_irq.h
+++ b/include/asm-powerpc/hw_irq.h
@@ -1,22 +1,18 @@
1/* 1/*
2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> 2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
3 *
4 * Use inline IRQs where possible - Anton Blanchard <anton@au.ibm.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */ 3 */
4#ifndef _ASM_POWERPC_HW_IRQ_H
5#define _ASM_POWERPC_HW_IRQ_H
6
11#ifdef __KERNEL__ 7#ifdef __KERNEL__
12#ifndef _PPC64_HW_IRQ_H
13#define _PPC64_HW_IRQ_H
14 8
15#include <linux/config.h> 9#include <linux/config.h>
16#include <linux/errno.h> 10#include <linux/errno.h>
11#include <asm/ptrace.h>
12#include <asm/processor.h>
17#include <asm/irq.h> 13#include <asm/irq.h>
18 14
19int timer_interrupt(struct pt_regs *); 15extern void timer_interrupt(struct pt_regs *);
20extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq); 16extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
21 17
22#ifdef CONFIG_PPC_ISERIES 18#ifdef CONFIG_PPC_ISERIES
@@ -33,45 +29,60 @@ extern void local_irq_restore(unsigned long);
33 29
34#else 30#else
35 31
36#define local_save_flags(flags) ((flags) = mfmsr()) 32#if defined(CONFIG_BOOKE)
33#define SET_MSR_EE(x) mtmsr(x)
34#define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
35#elif defined(__powerpc64__)
36#define SET_MSR_EE(x) __mtmsrd(x, 1)
37#define local_irq_restore(flags) do { \ 37#define local_irq_restore(flags) do { \
38 __asm__ __volatile__("": : :"memory"); \ 38 __asm__ __volatile__("": : :"memory"); \
39 __mtmsrd((flags), 1); \ 39 __mtmsrd((flags), 1); \
40} while(0) 40} while(0)
41#else
42#define SET_MSR_EE(x) mtmsr(x)
43#define local_irq_restore(flags) mtmsr(flags)
44#endif
41 45
42static inline void local_irq_disable(void) 46static inline void local_irq_disable(void)
43{ 47{
48#ifdef CONFIG_BOOKE
49 __asm__ __volatile__("wrteei 0": : :"memory");
50#else
44 unsigned long msr; 51 unsigned long msr;
45 msr = mfmsr();
46 __mtmsrd(msr & ~MSR_EE, 1);
47 __asm__ __volatile__("": : :"memory"); 52 __asm__ __volatile__("": : :"memory");
53 msr = mfmsr();
54 SET_MSR_EE(msr & ~MSR_EE);
55#endif
48} 56}
49 57
50static inline void local_irq_enable(void) 58static inline void local_irq_enable(void)
51{ 59{
60#ifdef CONFIG_BOOKE
61 __asm__ __volatile__("wrteei 1": : :"memory");
62#else
52 unsigned long msr; 63 unsigned long msr;
53 __asm__ __volatile__("": : :"memory"); 64 __asm__ __volatile__("": : :"memory");
54 msr = mfmsr(); 65 msr = mfmsr();
55 __mtmsrd(msr | MSR_EE, 1); 66 SET_MSR_EE(msr | MSR_EE);
67#endif
56} 68}
57 69
58static inline void __do_save_and_cli(unsigned long *flags) 70static inline void local_irq_save_ptr(unsigned long *flags)
59{ 71{
60 unsigned long msr; 72 unsigned long msr;
61 msr = mfmsr(); 73 msr = mfmsr();
62 *flags = msr; 74 *flags = msr;
63 __mtmsrd(msr & ~MSR_EE, 1); 75#ifdef CONFIG_BOOKE
76 __asm__ __volatile__("wrteei 0": : :"memory");
77#else
78 SET_MSR_EE(msr & ~MSR_EE);
79#endif
64 __asm__ __volatile__("": : :"memory"); 80 __asm__ __volatile__("": : :"memory");
65} 81}
66 82
67#define local_irq_save(flags) __do_save_and_cli(&flags) 83#define local_save_flags(flags) ((flags) = mfmsr())
68 84#define local_irq_save(flags) local_irq_save_ptr(&flags)
69#define irqs_disabled() \ 85#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
70({ \
71 unsigned long flags; \
72 local_save_flags(flags); \
73 !(flags & MSR_EE); \
74})
75 86
76#endif /* CONFIG_PPC_ISERIES */ 87#endif /* CONFIG_PPC_ISERIES */
77 88
@@ -99,6 +110,6 @@ static inline void __do_save_and_cli(unsigned long *flags)
99 */ 110 */
100struct hw_interrupt_type; 111struct hw_interrupt_type;
101static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} 112static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
102 113
103#endif /* _PPC64_HW_IRQ_H */ 114#endif /* __KERNEL__ */
104#endif /* __KERNEL__ */ 115#endif /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/include/asm-powerpc/kmap_types.h b/include/asm-powerpc/kmap_types.h
new file mode 100644
index 000000000000..b6bac6f61c16
--- /dev/null
+++ b/include/asm-powerpc/kmap_types.h
@@ -0,0 +1,33 @@
1#ifndef _ASM_POWERPC_KMAP_TYPES_H
2#define _ASM_POWERPC_KMAP_TYPES_H
3
4#ifdef __KERNEL__
5
6/*
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13enum km_type {
14 KM_BOUNCE_READ,
15 KM_SKB_SUNRPC_DATA,
16 KM_SKB_DATA_SOFTIRQ,
17 KM_USER0,
18 KM_USER1,
19 KM_BIO_SRC_IRQ,
20 KM_BIO_DST_IRQ,
21 KM_PTE0,
22 KM_PTE1,
23 KM_IRQ0,
24 KM_IRQ1,
25 KM_SOFTIRQ0,
26 KM_SOFTIRQ1,
27 KM_PPC_SYNC_PAGE,
28 KM_PPC_SYNC_ICACHE,
29 KM_TYPE_NR
30};
31
32#endif /* __KERNEL__ */
33#endif /* _ASM_POWERPC_KMAP_TYPES_H */
diff --git a/include/asm-ppc64/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index b04f1dfb1421..8013cd273ced 100644
--- a/include/asm-ppc64/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -9,39 +9,49 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef OP_IMPL_H 12#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13#define OP_IMPL_H 1 13#define _ASM_POWERPC_OPROFILE_IMPL_H
14 14
15#define OP_MAX_COUNTER 8 15#define OP_MAX_COUNTER 8
16 16
17/* Per-counter configuration as set via oprofilefs. */ 17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config { 18struct op_counter_config {
19#ifdef __powerpc64__
19 unsigned long valid; 20 unsigned long valid;
21#endif
20 unsigned long enabled; 22 unsigned long enabled;
21 unsigned long event; 23 unsigned long event;
22 unsigned long count; 24 unsigned long count;
23 unsigned long kernel; 25 unsigned long kernel;
26#ifdef __powerpc64__
24 /* We dont support per counter user/kernel selection */ 27 /* We dont support per counter user/kernel selection */
28#endif
25 unsigned long user; 29 unsigned long user;
26 unsigned long unit_mask; 30 unsigned long unit_mask;
27}; 31};
28 32
29/* System-wide configuration as set via oprofilefs. */ 33/* System-wide configuration as set via oprofilefs. */
30struct op_system_config { 34struct op_system_config {
35#ifdef __powerpc64__
31 unsigned long mmcr0; 36 unsigned long mmcr0;
32 unsigned long mmcr1; 37 unsigned long mmcr1;
33 unsigned long mmcra; 38 unsigned long mmcra;
39#endif
34 unsigned long enable_kernel; 40 unsigned long enable_kernel;
35 unsigned long enable_user; 41 unsigned long enable_user;
42#ifdef __powerpc64__
36 unsigned long backtrace_spinlocks; 43 unsigned long backtrace_spinlocks;
44#endif
37}; 45};
38 46
39/* Per-arch configuration */ 47/* Per-arch configuration */
40struct op_ppc64_model { 48struct op_powerpc_model {
41 void (*reg_setup) (struct op_counter_config *, 49 void (*reg_setup) (struct op_counter_config *,
42 struct op_system_config *, 50 struct op_system_config *,
43 int num_counters); 51 int num_counters);
52#ifdef __powerpc64__
44 void (*cpu_setup) (void *); 53 void (*cpu_setup) (void *);
54#endif
45 void (*start) (struct op_counter_config *); 55 void (*start) (struct op_counter_config *);
46 void (*stop) (void); 56 void (*stop) (void);
47 void (*handle_interrupt) (struct pt_regs *, 57 void (*handle_interrupt) (struct pt_regs *,
@@ -49,8 +59,9 @@ struct op_ppc64_model {
49 int num_counters; 59 int num_counters;
50}; 60};
51 61
52extern struct op_ppc64_model op_model_rs64; 62#ifdef __powerpc64__
53extern struct op_ppc64_model op_model_power4; 63extern struct op_powerpc_model op_model_rs64;
64extern struct op_powerpc_model op_model_power4;
54 65
55static inline unsigned int ctr_read(unsigned int i) 66static inline unsigned int ctr_read(unsigned int i)
56{ 67{
@@ -107,5 +118,6 @@ static inline void ctr_write(unsigned int i, unsigned int val)
107 break; 118 break;
108 } 119 }
109} 120}
121#endif /* __powerpc64__ */
110 122
111#endif 123#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
diff --git a/include/asm-ppc64/posix_types.h b/include/asm-powerpc/posix_types.h
index 516de7201b5d..c6391077224f 100644
--- a/include/asm-ppc64/posix_types.h
+++ b/include/asm-powerpc/posix_types.h
@@ -1,44 +1,54 @@
1#ifndef _PPC64_POSIX_TYPES_H 1#ifndef _ASM_POWERPC_POSIX_TYPES_H
2#define _PPC64_POSIX_TYPES_H 2#define _ASM_POWERPC_POSIX_TYPES_H
3 3
4/* 4/*
5 * This file is generally used by user-level software, so you need to 5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot 6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used. 7 * assume GCC is being used.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */ 8 */
14 9
15typedef unsigned long __kernel_ino_t; 10typedef unsigned long __kernel_ino_t;
16typedef unsigned long __kernel_nlink_t;
17typedef unsigned int __kernel_mode_t; 11typedef unsigned int __kernel_mode_t;
18typedef long __kernel_off_t; 12typedef long __kernel_off_t;
19typedef long long __kernel_loff_t;
20typedef int __kernel_pid_t; 13typedef int __kernel_pid_t;
21typedef int __kernel_ipc_pid_t;
22typedef unsigned int __kernel_uid_t; 14typedef unsigned int __kernel_uid_t;
23typedef unsigned int __kernel_gid_t; 15typedef unsigned int __kernel_gid_t;
24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t; 16typedef long __kernel_ptrdiff_t;
27typedef long __kernel_time_t; 17typedef long __kernel_time_t;
18typedef long __kernel_clock_t;
28typedef int __kernel_timer_t; 19typedef int __kernel_timer_t;
29typedef int __kernel_clockid_t; 20typedef int __kernel_clockid_t;
30typedef long __kernel_suseconds_t; 21typedef long __kernel_suseconds_t;
31typedef long __kernel_clock_t;
32typedef int __kernel_daddr_t; 22typedef int __kernel_daddr_t;
33typedef char * __kernel_caddr_t; 23typedef char * __kernel_caddr_t;
34typedef unsigned short __kernel_uid16_t; 24typedef unsigned short __kernel_uid16_t;
35typedef unsigned short __kernel_gid16_t; 25typedef unsigned short __kernel_gid16_t;
36typedef unsigned int __kernel_uid32_t; 26typedef unsigned int __kernel_uid32_t;
37typedef unsigned int __kernel_gid32_t; 27typedef unsigned int __kernel_gid32_t;
38
39typedef unsigned int __kernel_old_uid_t; 28typedef unsigned int __kernel_old_uid_t;
40typedef unsigned int __kernel_old_gid_t; 29typedef unsigned int __kernel_old_gid_t;
30
31#ifdef __powerpc64__
32typedef unsigned long __kernel_nlink_t;
33typedef int __kernel_ipc_pid_t;
34typedef unsigned long __kernel_size_t;
35typedef long __kernel_ssize_t;
41typedef unsigned long __kernel_old_dev_t; 36typedef unsigned long __kernel_old_dev_t;
37#else
38typedef unsigned short __kernel_nlink_t;
39typedef short __kernel_ipc_pid_t;
40typedef unsigned int __kernel_size_t;
41typedef int __kernel_ssize_t;
42typedef unsigned int __kernel_old_dev_t;
43#endif
44
45#ifdef __powerpc64__
46typedef long long __kernel_loff_t;
47#else
48#ifdef __GNUC__
49typedef long long __kernel_loff_t;
50#endif
51#endif
42 52
43typedef struct { 53typedef struct {
44 int val[2]; 54 int val[2];
@@ -116,4 +126,4 @@ static __inline__ void __FD_ZERO(__kernel_fd_set *p)
116 126
117#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ 127#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
118#endif /* __GNUC__ */ 128#endif /* __GNUC__ */
119#endif /* _PPC64_POSIX_TYPES_H */ 129#endif /* _ASM_POWERPC_POSIX_TYPES_H */
diff --git a/include/asm-ppc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index bb53e2def363..4efa71878fa9 100644
--- a/include/asm-ppc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -1,38 +1,40 @@
1/* 1/*
2 * include/asm-ppc/ppc_asm.h
3 *
4 * Definitions used by various bits of low-level assembly code on PowerPC.
5 *
6 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. 2 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */ 3 */
13 4
14#include <linux/config.h> 5#ifndef _ASM_POWERPC_PPC_ASM_H
6#define _ASM_POWERPC_PPC_ASM_H
7
8#ifdef __ASSEMBLY__
15 9
16/* 10/*
17 * Macros for storing registers into and loading registers from 11 * Macros for storing registers into and loading registers from
18 * exception frames. 12 * exception frames.
19 */ 13 */
14#ifdef __powerpc64__
15#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base)
16#define REST_GPR(n, base) ld n,GPR0+8*(n)(base)
17#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base)
18#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base)
19#else
20#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) 20#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
21#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
22#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
23 SAVE_10GPRS(22, base)
24#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \
25 REST_10GPRS(22, base)
26#endif
27
28
21#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) 29#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
22#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) 30#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
23#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) 31#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
24#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) 32#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
25#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
26#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) 33#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
27#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) 34#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
28#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) 35#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
29#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) 36#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
30 37
31#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
32 SAVE_10GPRS(22, base)
33#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \
34 REST_10GPRS(22, base)
35
36#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base) 38#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
37#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) 39#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
38#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) 40#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
@@ -47,32 +49,83 @@
47#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) 49#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
48 50
49#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base 51#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
50#define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) 52#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
51#define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base) 53#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
52#define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base) 54#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
53#define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base) 55#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
54#define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base) 56#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
55#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base 57#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
56#define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) 58#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
57#define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base) 59#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
58#define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base) 60#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
59#define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base) 61#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
60#define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base) 62#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
61 63
62#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base) 64#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
63#define SAVE_2EVR(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base) 65#define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
64#define SAVE_4EVR(n,s,base) SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base) 66#define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
65#define SAVE_8EVR(n,s,base) SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base) 67#define SAVE_8EVRS(n,s,base) SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base)
66#define SAVE_16EVR(n,s,base) SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base) 68#define SAVE_16EVRS(n,s,base) SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base)
67#define SAVE_32EVR(n,s,base) SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base) 69#define SAVE_32EVRS(n,s,base) SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base)
68
69#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n 70#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
70#define REST_2EVR(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base) 71#define REST_2EVRS(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base)
71#define REST_4EVR(n,s,base) REST_2EVR(n,s,base); REST_2EVR(n+2,s,base) 72#define REST_4EVRS(n,s,base) REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base)
72#define REST_8EVR(n,s,base) REST_4EVR(n,s,base); REST_4EVR(n+4,s,base) 73#define REST_8EVRS(n,s,base) REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base)
73#define REST_16EVR(n,s,base) REST_8EVR(n,s,base); REST_8EVR(n+8,s,base) 74#define REST_16EVRS(n,s,base) REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base)
74#define REST_32EVR(n,s,base) REST_16EVR(n,s,base); REST_16EVR(n+16,s,base) 75#define REST_32EVRS(n,s,base) REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base)
76
77/* Macros to adjust thread priority for Iseries hardware multithreading */
78#define HMT_VERY_LOW or 31,31,31 # very low priority\n"
79#define HMT_LOW or 1,1,1
80#define HMT_MEDIUM_LOW or 6,6,6 # medium low priority\n"
81#define HMT_MEDIUM or 2,2,2
82#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority\n"
83#define HMT_HIGH or 3,3,3
84
85/* handle instructions that older assemblers may not know */
86#define RFCI .long 0x4c000066 /* rfci instruction */
87#define RFDI .long 0x4c00004e /* rfdi instruction */
88#define RFMCI .long 0x4c00004c /* rfmci instruction */
89
90/*
91 * LOADADDR( rn, name )
92 * loads the address of 'name' into 'rn'
93 *
94 * LOADBASE( rn, name )
95 * loads the address (less the low 16 bits) of 'name' into 'rn'
96 * suitable for base+disp addressing
97 */
98#ifdef __powerpc64__
99#define LOADADDR(rn,name) \
100 lis rn,name##@highest; \
101 ori rn,rn,name##@higher; \
102 rldicr rn,rn,32,31; \
103 oris rn,rn,name##@h; \
104 ori rn,rn,name##@l
105
106#define LOADBASE(rn,name) \
107 lis rn,name@highest; \
108 ori rn,rn,name@higher; \
109 rldicr rn,rn,32,31; \
110 oris rn,rn,name@ha
111
112
113#define SET_REG_TO_CONST(reg, value) \
114 lis reg,(((value)>>48)&0xFFFF); \
115 ori reg,reg,(((value)>>32)&0xFFFF); \
116 rldicr reg,reg,32,31; \
117 oris reg,reg,(((value)>>16)&0xFFFF); \
118 ori reg,reg,((value)&0xFFFF);
119
120#define SET_REG_TO_LABEL(reg, label) \
121 lis reg,(label)@highest; \
122 ori reg,reg,(label)@higher; \
123 rldicr reg,reg,32,31; \
124 oris reg,reg,(label)@h; \
125 ori reg,reg,(label)@l;
126#endif
75 127
128/* various errata or part fixups */
76#ifdef CONFIG_PPC601_SYNC_FIX 129#ifdef CONFIG_PPC601_SYNC_FIX
77#define SYNC \ 130#define SYNC \
78BEGIN_FTR_SECTION \ 131BEGIN_FTR_SECTION \
@@ -93,6 +146,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
93#define ISYNC_601 146#define ISYNC_601
94#endif 147#endif
95 148
149
96#ifndef CONFIG_SMP 150#ifndef CONFIG_SMP
97#define TLBSYNC 151#define TLBSYNC
98#else /* CONFIG_SMP */ 152#else /* CONFIG_SMP */
@@ -104,6 +158,7 @@ BEGIN_FTR_SECTION \
104END_FTR_SECTION_IFCLR(CPU_FTR_601) 158END_FTR_SECTION_IFCLR(CPU_FTR_601)
105#endif 159#endif
106 160
161
107/* 162/*
108 * This instruction is not implemented on the PPC 603 or 601; however, on 163 * This instruction is not implemented on the PPC 603 or 601; however, on
109 * the 403GCX and 405GP tlbia IS defined and tlbie is not. 164 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
@@ -121,14 +176,44 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
121 bdnz 0b 176 bdnz 0b
122#endif 177#endif
123 178
124#ifdef CONFIG_BOOKE 179
180#ifdef CONFIG_IBM405_ERR77
181#define PPC405_ERR77(ra,rb) dcbt ra, rb;
182#define PPC405_ERR77_SYNC sync;
183#else
184#define PPC405_ERR77(ra,rb)
185#define PPC405_ERR77_SYNC
186#endif
187
188
189#ifdef CONFIG_IBM440EP_ERR42
190#define PPC440EP_ERR42 isync
191#else
192#define PPC440EP_ERR42
193#endif
194
195
196#if defined(CONFIG_BOOKE)
125#define tophys(rd,rs) \ 197#define tophys(rd,rs) \
126 addis rd,rs,0 198 addis rd,rs,0
127 199
128#define tovirt(rd,rs) \ 200#define tovirt(rd,rs) \
129 addis rd,rs,0 201 addis rd,rs,0
130 202
131#else /* CONFIG_BOOKE */ 203#elif defined(CONFIG_PPC64)
204/* PPPBBB - DRENG If KERNELBASE is always 0xC0...,
205 * Then we can easily do this with one asm insn. -Peter
206 */
207#define tophys(rd,rs) \
208 lis rd,((KERNELBASE>>48)&0xFFFF); \
209 rldicr rd,rd,32,31; \
210 sub rd,rs,rd
211
212#define tovirt(rd,rs) \
213 lis rd,((KERNELBASE>>48)&0xFFFF); \
214 rldicr rd,rd,32,31; \
215 add rd,rs,rd
216#else
132/* 217/*
133 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the 218 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
134 * physical base address of RAM at compile time. 219 * physical base address of RAM at compile time.
@@ -146,14 +231,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
146 .align 1; \ 231 .align 1; \
147 .long 0b; \ 232 .long 0b; \
148 .previous 233 .previous
149#endif /* CONFIG_BOOKE */ 234#endif
150 235
151/* 236/*
152 * On 64-bit cpus, we use the rfid instruction instead of rfi, but 237 * On 64-bit cpus, we use the rfid instruction instead of rfi, but
153 * we then have to make sure we preserve the top 32 bits except for 238 * we then have to make sure we preserve the top 32 bits except for
154 * the 64-bit mode bit, which we clear. 239 * the 64-bit mode bit, which we clear.
155 */ 240 */
156#ifdef CONFIG_PPC64BRIDGE 241#if defined(CONFIG_PPC64BRIDGE)
157#define FIX_SRR1(ra, rb) \ 242#define FIX_SRR1(ra, rb) \
158 mr rb,ra; \ 243 mr rb,ra; \
159 mfmsr ra; \ 244 mfmsr ra; \
@@ -162,6 +247,17 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
162#define RFI .long 0x4c000024 /* rfid instruction */ 247#define RFI .long 0x4c000024 /* rfid instruction */
163#define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */ 248#define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */
164#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */ 249#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
250#elif defined(CONFIG_PPC64)
251/* Insert the high 32 bits of the MSR into what will be the new
252 MSR (via SRR1 and rfid) This preserves the MSR.SF and MSR.ISF
253 bits. */
254
255#define FIX_SRR1(ra, rb) \
256 mr rb,ra; \
257 mfmsr ra; \
258 rldimi ra,rb,0,32
259
260#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
165 261
166#else 262#else
167#define FIX_SRR1(ra, rb) 263#define FIX_SRR1(ra, rb)
@@ -172,24 +268,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
172#endif 268#endif
173#define MTMSRD(r) mtmsr r 269#define MTMSRD(r) mtmsr r
174#define CLR_TOP32(r) 270#define CLR_TOP32(r)
175#endif /* CONFIG_PPC64BRIDGE */
176
177#define RFCI .long 0x4c000066 /* rfci instruction */
178#define RFDI .long 0x4c00004e /* rfdi instruction */
179#define RFMCI .long 0x4c00004c /* rfmci instruction */
180
181#ifdef CONFIG_IBM405_ERR77
182#define PPC405_ERR77(ra,rb) dcbt ra, rb;
183#define PPC405_ERR77_SYNC sync;
184#else
185#define PPC405_ERR77(ra,rb)
186#define PPC405_ERR77_SYNC
187#endif
188
189#ifdef CONFIG_IBM440EP_ERR42
190#define PPC440EP_ERR42 isync
191#else
192#define PPC440EP_ERR42
193#endif 271#endif
194 272
195/* The boring bits... */ 273/* The boring bits... */
@@ -277,6 +355,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
277#define fr30 30 355#define fr30 30
278#define fr31 31 356#define fr31 31
279 357
358/* AltiVec Registers (VPRs) */
359
280#define vr0 0 360#define vr0 0
281#define vr1 1 361#define vr1 1
282#define vr2 2 362#define vr2 2
@@ -310,6 +390,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
310#define vr30 30 390#define vr30 30
311#define vr31 31 391#define vr31 31
312 392
393/* SPE Registers (EVPRs) */
394
313#define evr0 0 395#define evr0 0
314#define evr1 1 396#define evr1 1
315#define evr2 2 397#define evr2 2
@@ -348,3 +430,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
348#define N_RSYM 64 430#define N_RSYM 64
349#define N_SLINE 68 431#define N_SLINE 68
350#define N_SO 100 432#define N_SO 100
433
434#define ASM_CONST(x) x
435#else
436 #define __ASM_CONST(x) x##UL
437 #define ASM_CONST(x) __ASM_CONST(x)
438#endif /* __ASSEMBLY__ */
439
440#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/include/asm-ppc64/rwsem.h b/include/asm-powerpc/rwsem.h
index bd5c2f093575..0a5b83a3c949 100644
--- a/include/asm-ppc64/rwsem.h
+++ b/include/asm-powerpc/rwsem.h
@@ -1,18 +1,14 @@
1#ifndef _ASM_POWERPC_RWSEM_H
2#define _ASM_POWERPC_RWSEM_H
3
4#ifdef __KERNEL__
5
1/* 6/*
2 * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff 7 * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff
3 * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h 8 * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h
4 * by Paul Mackerras <paulus@samba.org>. 9 * by Paul Mackerras <paulus@samba.org>.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef _PPC64_RWSEM_H
13#define _PPC64_RWSEM_H
14
15#ifdef __KERNEL__
16#include <linux/list.h> 12#include <linux/list.h>
17#include <linux/spinlock.h> 13#include <linux/spinlock.h>
18#include <asm/atomic.h> 14#include <asm/atomic.h>
@@ -163,5 +159,5 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
163 return atomic_add_return(delta, (atomic_t *)(&sem->count)); 159 return atomic_add_return(delta, (atomic_t *)(&sem->count));
164} 160}
165 161
166#endif /* __KERNEL__ */ 162#endif /* __KERNEL__ */
167#endif /* _PPC_RWSEM_XADD_H */ 163#endif /* _ASM_POWERPC_RWSEM_H */
diff --git a/include/asm-ppc64/seccomp.h b/include/asm-powerpc/seccomp.h
index c130c334bda1..1e1cfe12882b 100644
--- a/include/asm-ppc64/seccomp.h
+++ b/include/asm-powerpc/seccomp.h
@@ -1,11 +1,6 @@
1#ifndef _ASM_SECCOMP_H 1#ifndef _ASM_POWERPC_SECCOMP_H
2
3#include <linux/thread_info.h> /* already defines TIF_32BIT */
4
5#ifndef TIF_32BIT
6#error "unexpected TIF_32BIT on ppc64"
7#endif
8 2
3#include <linux/thread_info.h>
9#include <linux/unistd.h> 4#include <linux/unistd.h>
10 5
11#define __NR_seccomp_read __NR_read 6#define __NR_seccomp_read __NR_read
@@ -18,4 +13,4 @@
18#define __NR_seccomp_exit_32 __NR_exit 13#define __NR_seccomp_exit_32 __NR_exit
19#define __NR_seccomp_sigreturn_32 __NR_sigreturn 14#define __NR_seccomp_sigreturn_32 __NR_sigreturn
20 15
21#endif /* _ASM_SECCOMP_H */ 16#endif /* _ASM_POWERPC_SECCOMP_H */
diff --git a/include/asm-ppc64/sections.h b/include/asm-powerpc/sections.h
index 308ca6f5ced2..47be2ac2a925 100644
--- a/include/asm-ppc64/sections.h
+++ b/include/asm-powerpc/sections.h
@@ -1,22 +1,11 @@
1#ifndef _PPC64_SECTIONS_H 1#ifndef _ASM_POWERPC_SECTIONS_H
2#define _PPC64_SECTIONS_H 2#define _ASM_POWERPC_SECTIONS_H
3
4extern char _end[];
5 3
6#include <asm-generic/sections.h> 4#include <asm-generic/sections.h>
7 5
8#define __pmac 6#ifdef __powerpc64__
9#define __pmacdata
10
11#define __prep
12#define __prepdata
13
14#define __chrp
15#define __chrpdata
16
17#define __openfirmware
18#define __openfirmwaredata
19 7
8extern char _end[];
20 9
21static inline int in_kernel_text(unsigned long addr) 10static inline int in_kernel_text(unsigned long addr)
22{ 11{
@@ -27,3 +16,5 @@ static inline int in_kernel_text(unsigned long addr)
27} 16}
28 17
29#endif 18#endif
19
20#endif /* _ASM_POWERPC_SECTIONS_H */
diff --git a/include/asm-ppc64/semaphore.h b/include/asm-powerpc/semaphore.h
index aefe7753ea41..fd42fe97158f 100644
--- a/include/asm-ppc64/semaphore.h
+++ b/include/asm-powerpc/semaphore.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_SEMAPHORE_H 1#ifndef _ASM_POWERPC_SEMAPHORE_H
2#define _PPC64_SEMAPHORE_H 2#define _ASM_POWERPC_SEMAPHORE_H
3 3
4/* 4/*
5 * Remove spinlock-based RW semaphores; RW semaphore definitions are 5 * Remove spinlock-based RW semaphores; RW semaphore definitions are
@@ -95,4 +95,4 @@ static inline void up(struct semaphore * sem)
95 95
96#endif /* __KERNEL__ */ 96#endif /* __KERNEL__ */
97 97
98#endif /* !(_PPC64_SEMAPHORE_H) */ 98#endif /* _ASM_POWERPC_SEMAPHORE_H */
diff --git a/include/asm-ppc64/spinlock_types.h b/include/asm-powerpc/spinlock_types.h
index a37c8eabb9f2..74236c9f05b1 100644
--- a/include/asm-ppc64/spinlock_types.h
+++ b/include/asm-powerpc/spinlock_types.h
@@ -1,5 +1,5 @@
1#ifndef __ASM_SPINLOCK_TYPES_H 1#ifndef _ASM_POWERPC_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H 2#define _ASM_POWERPC_SPINLOCK_TYPES_H
3 3
4#ifndef __LINUX_SPINLOCK_TYPES_H 4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly" 5# error "please don't include this file directly"
diff --git a/include/asm-ppc64/statfs.h b/include/asm-powerpc/statfs.h
index 3c985e5246a7..67024026c10d 100644
--- a/include/asm-ppc64/statfs.h
+++ b/include/asm-powerpc/statfs.h
@@ -1,12 +1,11 @@
1#ifndef _PPC64_STATFS_H 1#ifndef _ASM_POWERPC_STATFS_H
2#define _PPC64_STATFS_H 2#define _ASM_POWERPC_STATFS_H
3 3
4/* 4/* For ppc32 we just use the generic definitions, not so simple on ppc64 */
5 * This program is free software; you can redistribute it and/or 5
6 * modify it under the terms of the GNU General Public License 6#ifndef __powerpc64__
7 * as published by the Free Software Foundation; either version 7#include <asm-generic/statfs.h>
8 * 2 of the License, or (at your option) any later version. 8#else
9 */
10 9
11#ifndef __KERNEL_STRICT_NAMES 10#ifndef __KERNEL_STRICT_NAMES
12#include <linux/types.h> 11#include <linux/types.h>
@@ -57,5 +56,5 @@ struct compat_statfs64 {
57 __u32 f_frsize; 56 __u32 f_frsize;
58 __u32 f_spare[5]; 57 __u32 f_spare[5];
59}; 58};
60 59#endif /* ! __powerpc64__ */
61#endif /* _PPC64_STATFS_H */ 60#endif
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
new file mode 100644
index 000000000000..4660c0394a77
--- /dev/null
+++ b/include/asm-powerpc/synch.h
@@ -0,0 +1,51 @@
1#ifndef _ASM_POWERPC_SYNCH_H
2#define _ASM_POWERPC_SYNCH_H
3
4#include <linux/config.h>
5
6#ifdef __powerpc64__
7#define __SUBARCH_HAS_LWSYNC
8#endif
9
10#ifdef __SUBARCH_HAS_LWSYNC
11# define LWSYNC lwsync
12#else
13# define LWSYNC sync
14#endif
15
16
17/*
18 * Arguably the bitops and *xchg operations don't imply any memory barrier
19 * or SMP ordering, but in fact a lot of drivers expect them to imply
20 * both, since they do on x86 cpus.
21 */
22#ifdef CONFIG_SMP
23#define EIEIO_ON_SMP "eieio\n"
24#define ISYNC_ON_SMP "\n\tisync"
25#define SYNC_ON_SMP __stringify(LWSYNC) "\n"
26#else
27#define EIEIO_ON_SMP
28#define ISYNC_ON_SMP
29#define SYNC_ON_SMP
30#endif
31
32static inline void eieio(void)
33{
34 __asm__ __volatile__ ("eieio" : : : "memory");
35}
36
37static inline void isync(void)
38{
39 __asm__ __volatile__ ("isync" : : : "memory");
40}
41
42#ifdef CONFIG_SMP
43#define eieio_on_smp() eieio()
44#define isync_on_smp() isync()
45#else
46#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
47#define isync_on_smp() __asm__ __volatile__("": : :"memory")
48#endif
49
50#endif /* _ASM_POWERPC_SYNCH_H */
51
diff --git a/include/asm-ppc64/vga.h b/include/asm-powerpc/vga.h
index c09849743f45..f8d350aabf1a 100644
--- a/include/asm-ppc64/vga.h
+++ b/include/asm-powerpc/vga.h
@@ -1,16 +1,14 @@
1#ifndef _ASM_POWERPC_VGA_H_
2#define _ASM_POWERPC_VGA_H_
3
4#ifdef __KERNEL__
5
1/* 6/*
2 * Access to VGA videoram 7 * Access to VGA videoram
3 * 8 *
4 * (c) 1998 Martin Mares <mj@ucw.cz> 9 * (c) 1998 Martin Mares <mj@ucw.cz>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef _LINUX_ASM_VGA_H_
13#define _LINUX_ASM_VGA_H_
14 12
15#include <asm/io.h> 13#include <asm/io.h>
16 14
@@ -42,9 +40,15 @@ static inline u16 scr_readw(volatile const u16 *addr)
42#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ 40#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
43 41
44extern unsigned long vgacon_remap_base; 42extern unsigned long vgacon_remap_base;
43
44#ifdef __powerpc64__
45#define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0)) 45#define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0))
46#else
47#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
48#endif
46 49
47#define vga_readb(x) (*(x)) 50#define vga_readb(x) (*(x))
48#define vga_writeb(x,y) (*(y) = (x)) 51#define vga_writeb(x,y) (*(y) = (x))
49 52
50#endif 53#endif /* __KERNEL__ */
54#endif /* _ASM_POWERPC_VGA_H_ */
diff --git a/include/asm-ppc/a.out.h b/include/asm-ppc/a.out.h
deleted file mode 100644
index 8979a94c4a81..000000000000
--- a/include/asm-ppc/a.out.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef __PPC_A_OUT_H__
2#define __PPC_A_OUT_H__
3
4/* grabbed from the intel stuff */
5#define STACK_TOP TASK_SIZE
6
7
8struct exec
9{
10 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
11 unsigned a_text; /* length of text, in bytes */
12 unsigned a_data; /* length of data, in bytes */
13 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
14 unsigned a_syms; /* length of symbol table data in file, in bytes */
15 unsigned a_entry; /* start address */
16 unsigned a_trsize; /* length of relocation info for text, in bytes */
17 unsigned a_drsize; /* length of relocation info for data, in bytes */
18};
19
20
21#define N_TRSIZE(a) ((a).a_trsize)
22#define N_DRSIZE(a) ((a).a_drsize)
23#define N_SYMSIZE(a) ((a).a_syms)
24
25
26#endif
diff --git a/include/asm-ppc/auxvec.h b/include/asm-ppc/auxvec.h
deleted file mode 100644
index 172358df29c8..000000000000
--- a/include/asm-ppc/auxvec.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __PPC_AUXVEC_H
2#define __PPC_AUXVEC_H
3
4/*
5 * We need to put in some extra aux table entries to tell glibc what
6 * the cache block size is, so it can use the dcbz instruction safely.
7 */
8#define AT_DCACHEBSIZE 19
9#define AT_ICACHEBSIZE 20
10#define AT_UCACHEBSIZE 21
11/* A special ignored type value for PPC, for glibc compatibility. */
12#define AT_IGNOREPPC 22
13
14#endif
diff --git a/include/asm-ppc/bug.h b/include/asm-ppc/bug.h
deleted file mode 100644
index 8b34fd682b0d..000000000000
--- a/include/asm-ppc/bug.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _PPC_BUG_H
2#define _PPC_BUG_H
3
4struct bug_entry {
5 unsigned long bug_addr;
6 int line;
7 const char *file;
8 const char *function;
9};
10
11/*
12 * If this bit is set in the line number it means that the trap
13 * is for WARN_ON rather than BUG or BUG_ON.
14 */
15#define BUG_WARNING_TRAP 0x1000000
16
17#ifdef CONFIG_BUG
18#define BUG() do { \
19 __asm__ __volatile__( \
20 "1: twi 31,0,0\n" \
21 ".section __bug_table,\"a\"\n\t" \
22 " .long 1b,%0,%1,%2\n" \
23 ".previous" \
24 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
25} while (0)
26
27#define BUG_ON(x) do { \
28 if (!__builtin_constant_p(x) || (x)) { \
29 __asm__ __volatile__( \
30 "1: twnei %0,0\n" \
31 ".section __bug_table,\"a\"\n\t" \
32 " .long 1b,%1,%2,%3\n" \
33 ".previous" \
34 : : "r" (x), "i" (__LINE__), "i" (__FILE__), \
35 "i" (__FUNCTION__)); \
36 } \
37} while (0)
38
39#define WARN_ON(x) do { \
40 if (!__builtin_constant_p(x) || (x)) { \
41 __asm__ __volatile__( \
42 "1: twnei %0,0\n" \
43 ".section __bug_table,\"a\"\n\t" \
44 " .long 1b,%1,%2,%3\n" \
45 ".previous" \
46 : : "r" (x), "i" (__LINE__ + BUG_WARNING_TRAP), \
47 "i" (__FILE__), "i" (__FUNCTION__)); \
48 } \
49} while (0)
50
51#define HAVE_ARCH_BUG
52#define HAVE_ARCH_BUG_ON
53#define HAVE_ARCH_WARN_ON
54#endif
55
56#include <asm-generic/bug.h>
57
58#endif
diff --git a/include/asm-ppc/elf.h b/include/asm-ppc/elf.h
deleted file mode 100644
index c25cc35e6ab5..000000000000
--- a/include/asm-ppc/elf.h
+++ /dev/null
@@ -1,151 +0,0 @@
1#ifndef __PPC_ELF_H
2#define __PPC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7#include <asm/types.h>
8#include <asm/ptrace.h>
9#include <asm/cputable.h>
10#include <asm/auxvec.h>
11
12/* PowerPC relocations defined by the ABIs */
13#define R_PPC_NONE 0
14#define R_PPC_ADDR32 1 /* 32bit absolute address */
15#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
16#define R_PPC_ADDR16 3 /* 16bit absolute address */
17#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
18#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
19#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
20#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
21#define R_PPC_ADDR14_BRTAKEN 8
22#define R_PPC_ADDR14_BRNTAKEN 9
23#define R_PPC_REL24 10 /* PC relative 26 bit */
24#define R_PPC_REL14 11 /* PC relative 16 bit */
25#define R_PPC_REL14_BRTAKEN 12
26#define R_PPC_REL14_BRNTAKEN 13
27#define R_PPC_GOT16 14
28#define R_PPC_GOT16_LO 15
29#define R_PPC_GOT16_HI 16
30#define R_PPC_GOT16_HA 17
31#define R_PPC_PLTREL24 18
32#define R_PPC_COPY 19
33#define R_PPC_GLOB_DAT 20
34#define R_PPC_JMP_SLOT 21
35#define R_PPC_RELATIVE 22
36#define R_PPC_LOCAL24PC 23
37#define R_PPC_UADDR32 24
38#define R_PPC_UADDR16 25
39#define R_PPC_REL32 26
40#define R_PPC_PLT32 27
41#define R_PPC_PLTREL32 28
42#define R_PPC_PLT16_LO 29
43#define R_PPC_PLT16_HI 30
44#define R_PPC_PLT16_HA 31
45#define R_PPC_SDAREL16 32
46#define R_PPC_SECTOFF 33
47#define R_PPC_SECTOFF_LO 34
48#define R_PPC_SECTOFF_HI 35
49#define R_PPC_SECTOFF_HA 36
50/* Keep this the last entry. */
51#define R_PPC_NUM 37
52
53#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
54#define ELF_NFPREG 33 /* includes fpscr */
55#define ELF_NVRREG 33 /* includes vscr */
56#define ELF_NEVRREG 34 /* includes acc (as 2) */
57
58/*
59 * These are used to set parameters in the core dumps.
60 */
61#define ELF_ARCH EM_PPC
62#define ELF_CLASS ELFCLASS32
63#define ELF_DATA ELFDATA2MSB
64
65/* General registers */
66typedef unsigned long elf_greg_t;
67typedef elf_greg_t elf_gregset_t[ELF_NGREG];
68
69/* Floating point registers */
70typedef double elf_fpreg_t;
71typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
72
73/* Altivec registers */
74typedef __vector128 elf_vrreg_t;
75typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
76
77#ifdef __KERNEL__
78
79struct task_struct;
80
81/*
82 * This is used to ensure we don't load something for the wrong architecture.
83 */
84
85#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
86
87/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
88 use of this is to invoke "./ld.so someprog" to test out a new version of
89 the loader. We need to make sure that it is out of the way of the program
90 that it will "exec", and that there is sufficient room for the brk. */
91
92#define ELF_ET_DYN_BASE (0x08000000)
93
94#define USE_ELF_CORE_DUMP
95#define ELF_EXEC_PAGESIZE 4096
96
97#define ELF_CORE_COPY_REGS(gregs, regs) \
98 memcpy((gregs), (regs), sizeof(struct pt_regs)); \
99 memset((char *)(gregs) + sizeof(struct pt_regs), 0, \
100 sizeof(elf_gregset_t) - sizeof(struct pt_regs));
101
102#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \
103 ((t)->thread.regs? \
104 ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
105
106extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
107#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu))
108
109/* This yields a mask that user programs can use to figure out what
110 instruction set this cpu supports. This could be done in userspace,
111 but it's not easy, and we've already done it here. */
112
113#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
114
115/* This yields a string that ld.so will use to load implementation
116 specific libraries for optimization. This is more specific in
117 intent than poking at uname or /proc/cpuinfo.
118
119 For the moment, we have only optimizations for the Intel generations,
120 but that could change... */
121
122#define ELF_PLATFORM (NULL)
123
124#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
125
126extern int dcache_bsize;
127extern int icache_bsize;
128extern int ucache_bsize;
129
130/*
131 * The requirements here are:
132 * - keep the final alignment of sp (sp & 0xf)
133 * - make sure the 32-bit value at the first 16 byte aligned position of
134 * AUXV is greater than 16 for glibc compatibility.
135 * AT_IGNOREPPC is used for that.
136 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
137 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
138 */
139#define ARCH_DLINFO \
140do { \
141 /* Handle glibc compatibility. */ \
142 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
143 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
144 /* Cache size items */ \
145 NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
146 NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
147 NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
148 } while (0)
149
150#endif /* __KERNEL__ */
151#endif
diff --git a/include/asm-ppc/hw_irq.h b/include/asm-ppc/hw_irq.h
deleted file mode 100644
index 47dc7990fb26..000000000000
--- a/include/asm-ppc/hw_irq.h
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
3 */
4#ifdef __KERNEL__
5#ifndef _PPC_HW_IRQ_H
6#define _PPC_HW_IRQ_H
7
8#include <asm/ptrace.h>
9#include <asm/reg.h>
10
11extern void timer_interrupt(struct pt_regs *);
12
13#define INLINE_IRQS
14
15#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
16
17#ifdef INLINE_IRQS
18
19static inline void local_irq_disable(void)
20{
21 unsigned long msr;
22 msr = mfmsr();
23 mtmsr(msr & ~MSR_EE);
24 __asm__ __volatile__("": : :"memory");
25}
26
27static inline void local_irq_enable(void)
28{
29 unsigned long msr;
30 __asm__ __volatile__("": : :"memory");
31 msr = mfmsr();
32 mtmsr(msr | MSR_EE);
33}
34
35static inline void local_irq_save_ptr(unsigned long *flags)
36{
37 unsigned long msr;
38 msr = mfmsr();
39 *flags = msr;
40 mtmsr(msr & ~MSR_EE);
41 __asm__ __volatile__("": : :"memory");
42}
43
44#define local_save_flags(flags) ((flags) = mfmsr())
45#define local_irq_save(flags) local_irq_save_ptr(&flags)
46#define local_irq_restore(flags) mtmsr(flags)
47
48#else
49
50extern void local_irq_enable(void);
51extern void local_irq_disable(void);
52extern void local_irq_restore(unsigned long);
53extern void local_save_flags_ptr(unsigned long *);
54
55#define local_save_flags(flags) local_save_flags_ptr(&flags)
56#define local_irq_save(flags) ({local_save_flags(flags);local_irq_disable();})
57
58#endif
59
60extern void do_lost_interrupts(unsigned long);
61
62#define mask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->disable) irq_desc[irq].handler->disable(irq);})
63#define unmask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->enable) irq_desc[irq].handler->enable(irq);})
64#define ack_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->ack) irq_desc[irq].handler->ack(irq);})
65
66/* Should we handle this via lost interrupts and IPIs or should we don't care like
67 * we do now ? --BenH.
68 */
69struct hw_interrupt_type;
70static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
71
72
73#endif /* _PPC_HW_IRQ_H */
74#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 7eb7cf6360bd..39caf067a31b 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -8,6 +8,7 @@
8 8
9#include <asm/page.h> 9#include <asm/page.h>
10#include <asm/byteorder.h> 10#include <asm/byteorder.h>
11#include <asm/synch.h>
11#include <asm/mmu.h> 12#include <asm/mmu.h>
12 13
13#define SIO_CONFIG_RA 0x398 14#define SIO_CONFIG_RA 0x398
@@ -440,16 +441,6 @@ extern inline void * phys_to_virt(unsigned long address)
440#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 441#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
441#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET) 442#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET)
442 443
443/*
444 * Enforce In-order Execution of I/O:
445 * Acts as a barrier to ensure all previous I/O accesses have
446 * completed before any further ones are issued.
447 */
448extern inline void eieio(void)
449{
450 __asm__ __volatile__ ("eieio" : : : "memory");
451}
452
453/* Enforce in-order execution of data I/O. 444/* Enforce in-order execution of data I/O.
454 * No distinction between read/write on PPC; use eieio for all three. 445 * No distinction between read/write on PPC; use eieio for all three.
455 */ 446 */
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index bd9674807f05..137ea0cf34d3 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -24,6 +24,12 @@
24 */ 24 */
25#define ARCH_HAS_IRQ_PER_CPU 25#define ARCH_HAS_IRQ_PER_CPU
26 26
27#define get_irq_desc(irq) (&irq_desc[(irq)])
28
29/* Define a way to iterate across irqs. */
30#define for_each_irq(i) \
31 for ((i) = 0; (i) < NR_IRQS; ++(i))
32
27#if defined(CONFIG_40x) 33#if defined(CONFIG_40x)
28#include <asm/ibm4xx.h> 34#include <asm/ibm4xx.h>
29 35
diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
deleted file mode 100644
index 6d6fc78731e5..000000000000
--- a/include/asm-ppc/kmap_types.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 KM_BOUNCE_READ,
7 KM_SKB_SUNRPC_DATA,
8 KM_SKB_DATA_SOFTIRQ,
9 KM_USER0,
10 KM_USER1,
11 KM_BIO_SRC_IRQ,
12 KM_BIO_DST_IRQ,
13 KM_PTE0,
14 KM_PTE1,
15 KM_IRQ0,
16 KM_IRQ1,
17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1,
19 KM_PPC_SYNC_PAGE,
20 KM_PPC_SYNC_ICACHE,
21 KM_TYPE_NR
22};
23
24#endif
25#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/perfmon.h b/include/asm-ppc/perfmon.h
index 5e7a89c47b5b..2ae031594a4e 100644
--- a/include/asm-ppc/perfmon.h
+++ b/include/asm-ppc/perfmon.h
@@ -3,8 +3,8 @@
3 3
4extern void (*perf_irq)(struct pt_regs *); 4extern void (*perf_irq)(struct pt_regs *);
5 5
6int request_perfmon_irq(void (*handler)(struct pt_regs *)); 6int reserve_pmc_hardware(void (*handler)(struct pt_regs *));
7void free_perfmon_irq(void); 7void release_pmc_hardware(void);
8 8
9#ifdef CONFIG_FSL_BOOKE 9#ifdef CONFIG_FSL_BOOKE
10void init_pmc_stop(int ctr); 10void init_pmc_stop(int ctr);
@@ -16,7 +16,7 @@ void pmc_start_ctrs(int enable);
16void pmc_stop_ctrs(void); 16void pmc_stop_ctrs(void);
17void dump_pmcs(void); 17void dump_pmcs(void);
18 18
19extern struct op_ppc32_model op_model_fsl_booke; 19extern struct op_powerpc_model op_model_fsl_booke;
20#endif 20#endif
21 21
22#endif /* __PERFMON_H */ 22#endif /* __PERFMON_H */
diff --git a/include/asm-ppc/posix_types.h b/include/asm-ppc/posix_types.h
deleted file mode 100644
index a14a82abe8d2..000000000000
--- a/include/asm-ppc/posix_types.h
+++ /dev/null
@@ -1,111 +0,0 @@
1#ifndef _PPC_POSIX_TYPES_H
2#define _PPC_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned int __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned int __kernel_uid_t;
16typedef unsigned int __kernel_gid_t;
17typedef unsigned int __kernel_size_t;
18typedef int __kernel_ssize_t;
19typedef long __kernel_ptrdiff_t;
20typedef long __kernel_time_t;
21typedef long __kernel_suseconds_t;
22typedef long __kernel_clock_t;
23typedef int __kernel_timer_t;
24typedef int __kernel_clockid_t;
25typedef int __kernel_daddr_t;
26typedef char * __kernel_caddr_t;
27typedef short __kernel_ipc_pid_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned int __kernel_old_uid_t;
34typedef unsigned int __kernel_old_gid_t;
35typedef unsigned int __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#ifndef __GNUC__
46
47#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
48#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
49#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
50#define __FD_ZERO(set) \
51 ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
52
53#else /* __GNUC__ */
54
55#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \
56 || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
57/* With GNU C, use inline functions instead so args are evaluated only once: */
58
59#undef __FD_SET
60static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
61{
62 unsigned long _tmp = fd / __NFDBITS;
63 unsigned long _rem = fd % __NFDBITS;
64 fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
65}
66
67#undef __FD_CLR
68static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
69{
70 unsigned long _tmp = fd / __NFDBITS;
71 unsigned long _rem = fd % __NFDBITS;
72 fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
73}
74
75#undef __FD_ISSET
76static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)
77{
78 unsigned long _tmp = fd / __NFDBITS;
79 unsigned long _rem = fd % __NFDBITS;
80 return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
81}
82
83/*
84 * This will unroll the loop for the normal constant case (8 ints,
85 * for a 256-bit fd_set)
86 */
87#undef __FD_ZERO
88static __inline__ void __FD_ZERO(__kernel_fd_set *p)
89{
90 unsigned int *tmp = (unsigned int *)p->fds_bits;
91 int i;
92
93 if (__builtin_constant_p(__FDSET_LONGS)) {
94 switch (__FDSET_LONGS) {
95 case 8:
96 tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0;
97 tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0;
98 return;
99 }
100 }
101 i = __FDSET_LONGS;
102 while (i) {
103 i--;
104 *tmp = 0;
105 tmp++;
106 }
107}
108
109#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
110#endif /* __GNUC__ */
111#endif /* _PPC_POSIX_TYPES_H */
diff --git a/include/asm-ppc/rwsem.h b/include/asm-ppc/rwsem.h
deleted file mode 100644
index 3e738f483c11..000000000000
--- a/include/asm-ppc/rwsem.h
+++ /dev/null
@@ -1,172 +0,0 @@
1/*
2 * include/asm-ppc/rwsem.h: R/W semaphores for PPC using the stuff
3 * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h
4 * by Paul Mackerras <paulus@samba.org>.
5 */
6
7#ifndef _PPC_RWSEM_H
8#define _PPC_RWSEM_H
9
10#ifdef __KERNEL__
11#include <linux/list.h>
12#include <linux/spinlock.h>
13#include <asm/atomic.h>
14#include <asm/system.h>
15
16/*
17 * the semaphore definition
18 */
19struct rw_semaphore {
20 /* XXX this should be able to be an atomic_t -- paulus */
21 signed long count;
22#define RWSEM_UNLOCKED_VALUE 0x00000000
23#define RWSEM_ACTIVE_BIAS 0x00000001
24#define RWSEM_ACTIVE_MASK 0x0000ffff
25#define RWSEM_WAITING_BIAS (-0x00010000)
26#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
27#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
28 spinlock_t wait_lock;
29 struct list_head wait_list;
30#if RWSEM_DEBUG
31 int debug;
32#endif
33};
34
35/*
36 * initialisation
37 */
38#if RWSEM_DEBUG
39#define __RWSEM_DEBUG_INIT , 0
40#else
41#define __RWSEM_DEBUG_INIT /* */
42#endif
43
44#define __RWSEM_INITIALIZER(name) \
45 { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
46 LIST_HEAD_INIT((name).wait_list) \
47 __RWSEM_DEBUG_INIT }
48
49#define DECLARE_RWSEM(name) \
50 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
51
52extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
53extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
54extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
55extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
56
57static inline void init_rwsem(struct rw_semaphore *sem)
58{
59 sem->count = RWSEM_UNLOCKED_VALUE;
60 spin_lock_init(&sem->wait_lock);
61 INIT_LIST_HEAD(&sem->wait_list);
62#if RWSEM_DEBUG
63 sem->debug = 0;
64#endif
65}
66
67/*
68 * lock for reading
69 */
70static inline void __down_read(struct rw_semaphore *sem)
71{
72 if (atomic_inc_return((atomic_t *)(&sem->count)) > 0)
73 smp_wmb();
74 else
75 rwsem_down_read_failed(sem);
76}
77
78static inline int __down_read_trylock(struct rw_semaphore *sem)
79{
80 int tmp;
81
82 while ((tmp = sem->count) >= 0) {
83 if (tmp == cmpxchg(&sem->count, tmp,
84 tmp + RWSEM_ACTIVE_READ_BIAS)) {
85 smp_wmb();
86 return 1;
87 }
88 }
89 return 0;
90}
91
92/*
93 * lock for writing
94 */
95static inline void __down_write(struct rw_semaphore *sem)
96{
97 int tmp;
98
99 tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
100 (atomic_t *)(&sem->count));
101 if (tmp == RWSEM_ACTIVE_WRITE_BIAS)
102 smp_wmb();
103 else
104 rwsem_down_write_failed(sem);
105}
106
107static inline int __down_write_trylock(struct rw_semaphore *sem)
108{
109 int tmp;
110
111 tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
112 RWSEM_ACTIVE_WRITE_BIAS);
113 smp_wmb();
114 return tmp == RWSEM_UNLOCKED_VALUE;
115}
116
117/*
118 * unlock after reading
119 */
120static inline void __up_read(struct rw_semaphore *sem)
121{
122 int tmp;
123
124 smp_wmb();
125 tmp = atomic_dec_return((atomic_t *)(&sem->count));
126 if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)
127 rwsem_wake(sem);
128}
129
130/*
131 * unlock after writing
132 */
133static inline void __up_write(struct rw_semaphore *sem)
134{
135 smp_wmb();
136 if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
137 (atomic_t *)(&sem->count)) < 0)
138 rwsem_wake(sem);
139}
140
141/*
142 * implement atomic add functionality
143 */
144static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
145{
146 atomic_add(delta, (atomic_t *)(&sem->count));
147}
148
149/*
150 * downgrade write lock to read lock
151 */
152static inline void __downgrade_write(struct rw_semaphore *sem)
153{
154 int tmp;
155
156 smp_wmb();
157 tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
158 if (tmp < 0)
159 rwsem_downgrade_wake(sem);
160}
161
162/*
163 * implement exchange and add functionality
164 */
165static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
166{
167 smp_mb();
168 return atomic_add_return(delta, (atomic_t *)(&sem->count));
169}
170
171#endif /* __KERNEL__ */
172#endif /* _PPC_RWSEM_XADD_H */
diff --git a/include/asm-ppc/seccomp.h b/include/asm-ppc/seccomp.h
deleted file mode 100644
index 666c4da96d87..000000000000
--- a/include/asm-ppc/seccomp.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_SECCOMP_H
2
3#include <linux/unistd.h>
4
5#define __NR_seccomp_read __NR_read
6#define __NR_seccomp_write __NR_write
7#define __NR_seccomp_exit __NR_exit
8#define __NR_seccomp_sigreturn __NR_rt_sigreturn
9
10#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-ppc/sections.h b/include/asm-ppc/sections.h
deleted file mode 100644
index ba8f43ac9bf3..000000000000
--- a/include/asm-ppc/sections.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_SECTIONS_H
3#define _PPC_SECTIONS_H
4
5#include <asm-generic/sections.h>
6
7#define __pmac __attribute__ ((__section__ (".pmac.text")))
8#define __pmacdata __attribute__ ((__section__ (".pmac.data")))
9#define __pmacfunc(__argpmac) \
10 __argpmac __pmac; \
11 __argpmac
12
13#define __prep __attribute__ ((__section__ (".prep.text")))
14#define __prepdata __attribute__ ((__section__ (".prep.data")))
15#define __prepfunc(__argprep) \
16 __argprep __prep; \
17 __argprep
18
19#define __chrp __attribute__ ((__section__ (".chrp.text")))
20#define __chrpdata __attribute__ ((__section__ (".chrp.data")))
21#define __chrpfunc(__argchrp) \
22 __argchrp __chrp; \
23 __argchrp
24
25/* this is actually just common chrp/pmac code, not OF code -- Cort */
26#define __openfirmware __attribute__ ((__section__ (".openfirmware.text")))
27#define __openfirmwaredata __attribute__ ((__section__ (".openfirmware.data")))
28#define __openfirmwarefunc(__argopenfirmware) \
29 __argopenfirmware __openfirmware; \
30 __argopenfirmware
31
32#endif /* _PPC_SECTIONS_H */
33#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h
deleted file mode 100644
index 89e6e73be08c..000000000000
--- a/include/asm-ppc/semaphore.h
+++ /dev/null
@@ -1,111 +0,0 @@
1#ifndef _PPC_SEMAPHORE_H
2#define _PPC_SEMAPHORE_H
3
4/*
5 * Swiped from asm-sparc/semaphore.h and modified
6 * -- Cort (cort@cs.nmt.edu)
7 *
8 * Stole some rw spinlock-based semaphore stuff from asm-alpha/semaphore.h
9 * -- Ani Joshi (ajoshi@unixbox.com)
10 *
11 * Remove spinlock-based RW semaphores; RW semaphore definitions are
12 * now in rwsem.h and we use the generic lib/rwsem.c implementation.
13 * Rework semaphores to use atomic_dec_if_positive.
14 * -- Paul Mackerras (paulus@samba.org)
15 */
16
17#ifdef __KERNEL__
18
19#include <asm/atomic.h>
20#include <asm/system.h>
21#include <linux/wait.h>
22#include <linux/rwsem.h>
23
24struct semaphore {
25 /*
26 * Note that any negative value of count is equivalent to 0,
27 * but additionally indicates that some process(es) might be
28 * sleeping on `wait'.
29 */
30 atomic_t count;
31 wait_queue_head_t wait;
32};
33
34#define __SEMAPHORE_INITIALIZER(name, n) \
35{ \
36 .count = ATOMIC_INIT(n), \
37 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
38}
39
40#define __MUTEX_INITIALIZER(name) \
41 __SEMAPHORE_INITIALIZER(name, 1)
42
43#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
44 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
45
46#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
47#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0)
48
49static inline void sema_init (struct semaphore *sem, int val)
50{
51 atomic_set(&sem->count, val);
52 init_waitqueue_head(&sem->wait);
53}
54
55static inline void init_MUTEX (struct semaphore *sem)
56{
57 sema_init(sem, 1);
58}
59
60static inline void init_MUTEX_LOCKED (struct semaphore *sem)
61{
62 sema_init(sem, 0);
63}
64
65extern void __down(struct semaphore * sem);
66extern int __down_interruptible(struct semaphore * sem);
67extern void __up(struct semaphore * sem);
68
69extern inline void down(struct semaphore * sem)
70{
71 might_sleep();
72
73 /*
74 * Try to get the semaphore, take the slow path if we fail.
75 */
76 if (atomic_dec_return(&sem->count) < 0)
77 __down(sem);
78 smp_wmb();
79}
80
81extern inline int down_interruptible(struct semaphore * sem)
82{
83 int ret = 0;
84
85 might_sleep();
86
87 if (atomic_dec_return(&sem->count) < 0)
88 ret = __down_interruptible(sem);
89 smp_wmb();
90 return ret;
91}
92
93extern inline int down_trylock(struct semaphore * sem)
94{
95 int ret;
96
97 ret = atomic_dec_if_positive(&sem->count) < 0;
98 smp_wmb();
99 return ret;
100}
101
102extern inline void up(struct semaphore * sem)
103{
104 smp_wmb();
105 if (atomic_inc_return(&sem->count) <= 0)
106 __up(sem);
107}
108
109#endif /* __KERNEL__ */
110
111#endif /* !(_PPC_SEMAPHORE_H) */
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h
index 20edcf2a6e0c..5c64b75f0295 100644
--- a/include/asm-ppc/spinlock.h
+++ b/include/asm-ppc/spinlock.h
@@ -9,7 +9,7 @@
9 * (the type definitions are in asm/raw_spinlock_types.h) 9 * (the type definitions are in asm/raw_spinlock_types.h)
10 */ 10 */
11 11
12#define __raw_spin_is_locked(x) ((x)->lock != 0) 12#define __raw_spin_is_locked(x) ((x)->slock != 0)
13#define __raw_spin_unlock_wait(lock) \ 13#define __raw_spin_unlock_wait(lock) \
14 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) 14 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
15#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) 15#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
@@ -31,17 +31,17 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
31 bne- 2b\n\ 31 bne- 2b\n\
32 isync" 32 isync"
33 : "=&r"(tmp) 33 : "=&r"(tmp)
34 : "r"(&lock->lock), "r"(1) 34 : "r"(&lock->slock), "r"(1)
35 : "cr0", "memory"); 35 : "cr0", "memory");
36} 36}
37 37
38static inline void __raw_spin_unlock(raw_spinlock_t *lock) 38static inline void __raw_spin_unlock(raw_spinlock_t *lock)
39{ 39{
40 __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory"); 40 __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory");
41 lock->lock = 0; 41 lock->slock = 0;
42} 42}
43 43
44#define __raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock)) 44#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock)))
45 45
46/* 46/*
47 * Read-write spinlocks, allowing multiple readers 47 * Read-write spinlocks, allowing multiple readers
diff --git a/include/asm-ppc/spinlock_types.h b/include/asm-ppc/spinlock_types.h
deleted file mode 100644
index 7919ccc75b8a..000000000000
--- a/include/asm-ppc/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile unsigned long lock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
13
14typedef struct {
15 volatile signed int lock;
16} raw_rwlock_t;
17
18#define __RAW_RW_LOCK_UNLOCKED { 0 }
19
20#endif
diff --git a/include/asm-ppc/statfs.h b/include/asm-ppc/statfs.h
deleted file mode 100644
index 807c69954a1b..000000000000
--- a/include/asm-ppc/statfs.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _PPC_STATFS_H
2#define _PPC_STATFS_H
3
4#include <asm-generic/statfs.h>
5#endif
6
7
8
diff --git a/include/asm-ppc/vga.h b/include/asm-ppc/vga.h
deleted file mode 100644
index c5864734e3e1..000000000000
--- a/include/asm-ppc/vga.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Access to VGA videoram
3 *
4 * (c) 1998 Martin Mares <mj@ucw.cz>
5 */
6
7#ifdef __KERNEL__
8#ifndef _LINUX_ASM_VGA_H_
9#define _LINUX_ASM_VGA_H_
10
11#include <asm/io.h>
12
13#include <linux/config.h>
14
15#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE)
16
17#define VT_BUF_HAVE_RW
18/*
19 * These are only needed for supporting VGA or MDA text mode, which use little
20 * endian byte ordering.
21 * In other cases, we can optimize by using native byte ordering and
22 * <linux/vt_buffer.h> has already done the right job for us.
23 */
24
25extern inline void scr_writew(u16 val, volatile u16 *addr)
26{
27 st_le16(addr, val);
28}
29
30extern inline u16 scr_readw(volatile const u16 *addr)
31{
32 return ld_le16(addr);
33}
34
35#define VT_BUF_HAVE_MEMCPYW
36#define scr_memcpyw memcpy
37
38#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
39
40extern unsigned long vgacon_remap_base;
41#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
42#define vga_readb(x) (*(x))
43#define vga_writeb(x,y) (*(y) = (x))
44
45#endif
46#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/atomic.h b/include/asm-ppc64/atomic.h
deleted file mode 100644
index 0e5f25e83bc0..000000000000
--- a/include/asm-ppc64/atomic.h
+++ /dev/null
@@ -1,197 +0,0 @@
1/*
2 * PowerPC64 atomic operations
3 *
4 * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM
5 * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PPC64_ATOMIC_H_
14#define _ASM_PPC64_ATOMIC_H_
15
16#include <asm/memory.h>
17
18typedef struct { volatile int counter; } atomic_t;
19
20#define ATOMIC_INIT(i) { (i) }
21
22#define atomic_read(v) ((v)->counter)
23#define atomic_set(v,i) (((v)->counter) = (i))
24
25static __inline__ void atomic_add(int a, atomic_t *v)
26{
27 int t;
28
29 __asm__ __volatile__(
30"1: lwarx %0,0,%3 # atomic_add\n\
31 add %0,%2,%0\n\
32 stwcx. %0,0,%3\n\
33 bne- 1b"
34 : "=&r" (t), "=m" (v->counter)
35 : "r" (a), "r" (&v->counter), "m" (v->counter)
36 : "cc");
37}
38
39static __inline__ int atomic_add_return(int a, atomic_t *v)
40{
41 int t;
42
43 __asm__ __volatile__(
44 EIEIO_ON_SMP
45"1: lwarx %0,0,%2 # atomic_add_return\n\
46 add %0,%1,%0\n\
47 stwcx. %0,0,%2\n\
48 bne- 1b"
49 ISYNC_ON_SMP
50 : "=&r" (t)
51 : "r" (a), "r" (&v->counter)
52 : "cc", "memory");
53
54 return t;
55}
56
57#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
58
59static __inline__ void atomic_sub(int a, atomic_t *v)
60{
61 int t;
62
63 __asm__ __volatile__(
64"1: lwarx %0,0,%3 # atomic_sub\n\
65 subf %0,%2,%0\n\
66 stwcx. %0,0,%3\n\
67 bne- 1b"
68 : "=&r" (t), "=m" (v->counter)
69 : "r" (a), "r" (&v->counter), "m" (v->counter)
70 : "cc");
71}
72
73static __inline__ int atomic_sub_return(int a, atomic_t *v)
74{
75 int t;
76
77 __asm__ __volatile__(
78 EIEIO_ON_SMP
79"1: lwarx %0,0,%2 # atomic_sub_return\n\
80 subf %0,%1,%0\n\
81 stwcx. %0,0,%2\n\
82 bne- 1b"
83 ISYNC_ON_SMP
84 : "=&r" (t)
85 : "r" (a), "r" (&v->counter)
86 : "cc", "memory");
87
88 return t;
89}
90
91static __inline__ void atomic_inc(atomic_t *v)
92{
93 int t;
94
95 __asm__ __volatile__(
96"1: lwarx %0,0,%2 # atomic_inc\n\
97 addic %0,%0,1\n\
98 stwcx. %0,0,%2\n\
99 bne- 1b"
100 : "=&r" (t), "=m" (v->counter)
101 : "r" (&v->counter), "m" (v->counter)
102 : "cc");
103}
104
105static __inline__ int atomic_inc_return(atomic_t *v)
106{
107 int t;
108
109 __asm__ __volatile__(
110 EIEIO_ON_SMP
111"1: lwarx %0,0,%1 # atomic_inc_return\n\
112 addic %0,%0,1\n\
113 stwcx. %0,0,%1\n\
114 bne- 1b"
115 ISYNC_ON_SMP
116 : "=&r" (t)
117 : "r" (&v->counter)
118 : "cc", "memory");
119
120 return t;
121}
122
123/*
124 * atomic_inc_and_test - increment and test
125 * @v: pointer of type atomic_t
126 *
127 * Atomically increments @v by 1
128 * and returns true if the result is zero, or false for all
129 * other cases.
130 */
131#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
132
133static __inline__ void atomic_dec(atomic_t *v)
134{
135 int t;
136
137 __asm__ __volatile__(
138"1: lwarx %0,0,%2 # atomic_dec\n\
139 addic %0,%0,-1\n\
140 stwcx. %0,0,%2\n\
141 bne- 1b"
142 : "=&r" (t), "=m" (v->counter)
143 : "r" (&v->counter), "m" (v->counter)
144 : "cc");
145}
146
147static __inline__ int atomic_dec_return(atomic_t *v)
148{
149 int t;
150
151 __asm__ __volatile__(
152 EIEIO_ON_SMP
153"1: lwarx %0,0,%1 # atomic_dec_return\n\
154 addic %0,%0,-1\n\
155 stwcx. %0,0,%1\n\
156 bne- 1b"
157 ISYNC_ON_SMP
158 : "=&r" (t)
159 : "r" (&v->counter)
160 : "cc", "memory");
161
162 return t;
163}
164
165#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
166#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
167
168/*
169 * Atomically test *v and decrement if it is greater than 0.
170 * The function returns the old value of *v minus 1.
171 */
172static __inline__ int atomic_dec_if_positive(atomic_t *v)
173{
174 int t;
175
176 __asm__ __volatile__(
177 EIEIO_ON_SMP
178"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
179 addic. %0,%0,-1\n\
180 blt- 2f\n\
181 stwcx. %0,0,%1\n\
182 bne- 1b"
183 ISYNC_ON_SMP
184 "\n\
1852:" : "=&r" (t)
186 : "r" (&v->counter)
187 : "cc", "memory");
188
189 return t;
190}
191
192#define smp_mb__before_atomic_dec() smp_mb()
193#define smp_mb__after_atomic_dec() smp_mb()
194#define smp_mb__before_atomic_inc() smp_mb()
195#define smp_mb__after_atomic_inc() smp_mb()
196
197#endif /* _ASM_PPC64_ATOMIC_H_ */
diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h
index a0f831224f96..dbfa42ef4a99 100644
--- a/include/asm-ppc64/bitops.h
+++ b/include/asm-ppc64/bitops.h
@@ -42,7 +42,7 @@
42 42
43#ifdef __KERNEL__ 43#ifdef __KERNEL__
44 44
45#include <asm/memory.h> 45#include <asm/synch.h>
46 46
47/* 47/*
48 * clear_bit doesn't imply a memory barrier 48 * clear_bit doesn't imply a memory barrier
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h
index acc9b4d6c168..3eef40efd082 100644
--- a/include/asm-ppc64/cputable.h
+++ b/include/asm-ppc64/cputable.h
@@ -16,7 +16,7 @@
16#define __ASM_PPC_CPUTABLE_H 16#define __ASM_PPC_CPUTABLE_H
17 17
18#include <linux/config.h> 18#include <linux/config.h>
19#include <asm/page.h> /* for ASM_CONST */ 19#include <asm/ppc_asm.h> /* for ASM_CONST */
20 20
21/* Exposed to userland CPU features - Must match ppc32 definitions */ 21/* Exposed to userland CPU features - Must match ppc32 definitions */
22#define PPC_FEATURE_32 0x80000000 22#define PPC_FEATURE_32 0x80000000
@@ -36,7 +36,7 @@
36 * via the mkdefs mechanism. 36 * via the mkdefs mechanism.
37 */ 37 */
38struct cpu_spec; 38struct cpu_spec;
39struct op_ppc64_model; 39struct op_powerpc_model;
40 40
41typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); 41typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
42 42
@@ -65,7 +65,7 @@ struct cpu_spec {
65 char *oprofile_cpu_type; 65 char *oprofile_cpu_type;
66 66
67 /* Processor specific oprofile operations */ 67 /* Processor specific oprofile operations */
68 struct op_ppc64_model *oprofile_model; 68 struct op_powerpc_model *oprofile_model;
69}; 69};
70 70
71extern struct cpu_spec cpu_specs[]; 71extern struct cpu_spec cpu_specs[];
diff --git a/include/asm-ppc64/dart.h b/include/asm-ppc64/dart.h
new file mode 100644
index 000000000000..a9000de8a2e3
--- /dev/null
+++ b/include/asm-ppc64/dart.h
@@ -0,0 +1,59 @@
1/*
2 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef _ASM_DART_H
20#define _ASM_DART_H
21
22
23/* physical base of DART registers */
24#define DART_BASE 0xf8033000UL
25
26/* Offset from base to control register */
27#define DARTCNTL 0
28/* Offset from base to exception register */
29#define DARTEXCP 0x10
30/* Offset from base to TLB tag registers */
31#define DARTTAG 0x1000
32
33
34/* Control Register fields */
35
36/* base address of table (pfn) */
37#define DARTCNTL_BASE_MASK 0xfffff
38#define DARTCNTL_BASE_SHIFT 12
39
40#define DARTCNTL_FLUSHTLB 0x400
41#define DARTCNTL_ENABLE 0x200
42
43/* size of table in pages */
44#define DARTCNTL_SIZE_MASK 0x1ff
45#define DARTCNTL_SIZE_SHIFT 0
46
47
48/* DART table fields */
49
50#define DARTMAP_VALID 0x80000000
51#define DARTMAP_RPNMASK 0x00ffffff
52
53
54#define DART_SHIFT 12
55#define DART_PAGE_SIZE (1 << DART_SHIFT)
56#define DART_PAGE_FACTOR (PAGE_SHIFT - DART_SHIFT)
57
58
59#endif
diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h
deleted file mode 100644
index dfd1f69059ba..000000000000
--- a/include/asm-ppc64/dma.h
+++ /dev/null
@@ -1,329 +0,0 @@
1/*
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 * Changes for ppc sound by Christoph Nadig
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#ifndef _ASM_DMA_H
15#define _ASM_DMA_H
16
17#include <linux/config.h>
18#include <asm/io.h>
19#include <linux/spinlock.h>
20#include <asm/system.h>
21
22#ifndef MAX_DMA_CHANNELS
23#define MAX_DMA_CHANNELS 8
24#endif
25
26/* The maximum address that we can perform a DMA transfer to on this platform */
27/* Doesn't really apply... */
28#define MAX_DMA_ADDRESS (~0UL)
29
30#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
31
32#define dma_outb outb
33#define dma_inb inb
34
35/*
36 * NOTES about DMA transfers:
37 *
38 * controller 1: channels 0-3, byte operations, ports 00-1F
39 * controller 2: channels 4-7, word operations, ports C0-DF
40 *
41 * - ALL registers are 8 bits only, regardless of transfer size
42 * - channel 4 is not used - cascades 1 into 2.
43 * - channels 0-3 are byte - addresses/counts are for physical bytes
44 * - channels 5-7 are word - addresses/counts are for physical words
45 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
46 * - transfer count loaded to registers is 1 less than actual count
47 * - controller 2 offsets are all even (2x offsets for controller 1)
48 * - page registers for 5-7 don't use data bit 0, represent 128K pages
49 * - page registers for 0-3 use bit 0, represent 64K pages
50 *
51 * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory.
52 * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing.
53 * Note that addresses loaded into registers must be _physical_ addresses,
54 * not logical addresses (which may differ if paging is active).
55 *
56 * Address mapping for channels 0-3:
57 *
58 * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
59 * | ... | | ... | | ... |
60 * | ... | | ... | | ... |
61 * | ... | | ... | | ... |
62 * P7 ... P0 A7 ... A0 A7 ... A0
63 * | Page | Addr MSB | Addr LSB | (DMA registers)
64 *
65 * Address mapping for channels 5-7:
66 *
67 * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
68 * | ... | \ \ ... \ \ \ ... \ \
69 * | ... | \ \ ... \ \ \ ... \ (not used)
70 * | ... | \ \ ... \ \ \ ... \
71 * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
72 * | Page | Addr MSB | Addr LSB | (DMA registers)
73 *
74 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
75 * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
76 * the hardware level, so odd-byte transfers aren't possible).
77 *
78 * Transfer count (_not # bytes_) is limited to 64K, represented as actual
79 * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
80 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
81 *
82 */
83
84/* 8237 DMA controllers */
85#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
86#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
87
88/* DMA controller registers */
89#define DMA1_CMD_REG 0x08 /* command register (w) */
90#define DMA1_STAT_REG 0x08 /* status register (r) */
91#define DMA1_REQ_REG 0x09 /* request register (w) */
92#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
93#define DMA1_MODE_REG 0x0B /* mode register (w) */
94#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
95#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
96#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
97#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
98#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
99
100#define DMA2_CMD_REG 0xD0 /* command register (w) */
101#define DMA2_STAT_REG 0xD0 /* status register (r) */
102#define DMA2_REQ_REG 0xD2 /* request register (w) */
103#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
104#define DMA2_MODE_REG 0xD6 /* mode register (w) */
105#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
106#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
107#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
108#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
109#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
110
111#define DMA_ADDR_0 0x00 /* DMA address registers */
112#define DMA_ADDR_1 0x02
113#define DMA_ADDR_2 0x04
114#define DMA_ADDR_3 0x06
115#define DMA_ADDR_4 0xC0
116#define DMA_ADDR_5 0xC4
117#define DMA_ADDR_6 0xC8
118#define DMA_ADDR_7 0xCC
119
120#define DMA_CNT_0 0x01 /* DMA count registers */
121#define DMA_CNT_1 0x03
122#define DMA_CNT_2 0x05
123#define DMA_CNT_3 0x07
124#define DMA_CNT_4 0xC2
125#define DMA_CNT_5 0xC6
126#define DMA_CNT_6 0xCA
127#define DMA_CNT_7 0xCE
128
129#define DMA_LO_PAGE_0 0x87 /* DMA page registers */
130#define DMA_LO_PAGE_1 0x83
131#define DMA_LO_PAGE_2 0x81
132#define DMA_LO_PAGE_3 0x82
133#define DMA_LO_PAGE_5 0x8B
134#define DMA_LO_PAGE_6 0x89
135#define DMA_LO_PAGE_7 0x8A
136
137#define DMA_HI_PAGE_0 0x487 /* DMA page registers */
138#define DMA_HI_PAGE_1 0x483
139#define DMA_HI_PAGE_2 0x481
140#define DMA_HI_PAGE_3 0x482
141#define DMA_HI_PAGE_5 0x48B
142#define DMA_HI_PAGE_6 0x489
143#define DMA_HI_PAGE_7 0x48A
144
145#define DMA1_EXT_REG 0x40B
146#define DMA2_EXT_REG 0x4D6
147
148#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
149#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
150#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
151
152#define DMA_AUTOINIT 0x10
153
154extern spinlock_t dma_spin_lock;
155
156static __inline__ unsigned long claim_dma_lock(void)
157{
158 unsigned long flags;
159 spin_lock_irqsave(&dma_spin_lock, flags);
160 return flags;
161}
162
163static __inline__ void release_dma_lock(unsigned long flags)
164{
165 spin_unlock_irqrestore(&dma_spin_lock, flags);
166}
167
168/* enable/disable a specific DMA channel */
169static __inline__ void enable_dma(unsigned int dmanr)
170{
171 unsigned char ucDmaCmd=0x00;
172
173 if (dmanr != 4)
174 {
175 dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */
176 dma_outb(ucDmaCmd, DMA2_CMD_REG); /* Enable group */
177 }
178 if (dmanr<=3)
179 {
180 dma_outb(dmanr, DMA1_MASK_REG);
181 dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */
182 } else
183 {
184 dma_outb(dmanr & 3, DMA2_MASK_REG);
185 }
186}
187
188static __inline__ void disable_dma(unsigned int dmanr)
189{
190 if (dmanr<=3)
191 dma_outb(dmanr | 4, DMA1_MASK_REG);
192 else
193 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
194}
195
196/* Clear the 'DMA Pointer Flip Flop'.
197 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
198 * Use this once to initialize the FF to a known state.
199 * After that, keep track of it. :-)
200 * --- In order to do that, the DMA routines below should ---
201 * --- only be used while interrupts are disabled! ---
202 */
203static __inline__ void clear_dma_ff(unsigned int dmanr)
204{
205 if (dmanr<=3)
206 dma_outb(0, DMA1_CLEAR_FF_REG);
207 else
208 dma_outb(0, DMA2_CLEAR_FF_REG);
209}
210
211/* set mode (above) for a specific DMA channel */
212static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
213{
214 if (dmanr<=3)
215 dma_outb(mode | dmanr, DMA1_MODE_REG);
216 else
217 dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
218}
219
220/* Set only the page register bits of the transfer address.
221 * This is used for successive transfers when we know the contents of
222 * the lower 16 bits of the DMA current address register, but a 64k boundary
223 * may have been crossed.
224 */
225static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
226{
227 switch(dmanr) {
228 case 0:
229 dma_outb(pagenr, DMA_LO_PAGE_0);
230 dma_outb(pagenr>>8, DMA_HI_PAGE_0);
231 break;
232 case 1:
233 dma_outb(pagenr, DMA_LO_PAGE_1);
234 dma_outb(pagenr>>8, DMA_HI_PAGE_1);
235 break;
236 case 2:
237 dma_outb(pagenr, DMA_LO_PAGE_2);
238 dma_outb(pagenr>>8, DMA_HI_PAGE_2);
239 break;
240 case 3:
241 dma_outb(pagenr, DMA_LO_PAGE_3);
242 dma_outb(pagenr>>8, DMA_HI_PAGE_3);
243 break;
244 case 5:
245 dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);
246 dma_outb(pagenr>>8, DMA_HI_PAGE_5);
247 break;
248 case 6:
249 dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);
250 dma_outb(pagenr>>8, DMA_HI_PAGE_6);
251 break;
252 case 7:
253 dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);
254 dma_outb(pagenr>>8, DMA_HI_PAGE_7);
255 break;
256 }
257}
258
259
260/* Set transfer address & page bits for specific DMA channel.
261 * Assumes dma flipflop is clear.
262 */
263static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
264{
265 if (dmanr <= 3) {
266 dma_outb( phys & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
267 dma_outb( (phys>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
268 } else {
269 dma_outb( (phys>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
270 dma_outb( (phys>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
271 }
272 set_dma_page(dmanr, phys>>16);
273}
274
275
276/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
277 * a specific DMA channel.
278 * You must ensure the parameters are valid.
279 * NOTE: from a manual: "the number of transfers is one more
280 * than the initial word count"! This is taken into account.
281 * Assumes dma flip-flop is clear.
282 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
283 */
284static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
285{
286 count--;
287 if (dmanr <= 3) {
288 dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
289 dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
290 } else {
291 dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
292 dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
293 }
294}
295
296
297/* Get DMA residue count. After a DMA transfer, this
298 * should return zero. Reading this while a DMA transfer is
299 * still in progress will return unpredictable results.
300 * If called before the channel has been used, it may return 1.
301 * Otherwise, it returns the number of _bytes_ left to transfer.
302 *
303 * Assumes DMA flip-flop is clear.
304 */
305static __inline__ int get_dma_residue(unsigned int dmanr)
306{
307 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
308 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
309
310 /* using short to get 16-bit wrap around */
311 unsigned short count;
312
313 count = 1 + dma_inb(io_port);
314 count += dma_inb(io_port) << 8;
315
316 return (dmanr <= 3)? count : (count<<1);
317}
318
319/* These are in kernel/dma.c: */
320extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
321extern void free_dma(unsigned int dmanr); /* release it again */
322
323#ifdef CONFIG_PCI
324extern int isa_dma_bridge_buggy;
325#else
326#define isa_dma_bridge_buggy (0)
327#endif
328#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
329#endif /* _ASM_DMA_H */
diff --git a/include/asm-ppc64/futex.h b/include/asm-ppc64/futex.h
index cb2640b3a408..266b460de44e 100644
--- a/include/asm-ppc64/futex.h
+++ b/include/asm-ppc64/futex.h
@@ -5,7 +5,7 @@
5 5
6#include <linux/futex.h> 6#include <linux/futex.h>
7#include <asm/errno.h> 7#include <asm/errno.h>
8#include <asm/memory.h> 8#include <asm/synch.h>
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10 10
11#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 11#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
diff --git a/include/asm-ppc64/hardirq.h b/include/asm-ppc64/hardirq.h
deleted file mode 100644
index 4ee72bb1fd48..000000000000
--- a/include/asm-ppc64/hardirq.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __ASM_HARDIRQ_H
2#define __ASM_HARDIRQ_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12#include <linux/cache.h>
13#include <linux/preempt.h>
14
15typedef struct {
16 unsigned int __softirq_pending;
17} ____cacheline_aligned irq_cpustat_t;
18
19#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
20
21static inline void ack_bad_irq(int irq)
22{
23 printk(KERN_CRIT "illegal vector %d received!\n", irq);
24 BUG();
25}
26
27#endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-ppc64/io.h b/include/asm-ppc64/io.h
index 59c958aea4db..bd7c9532d77b 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-ppc64/io.h
@@ -15,7 +15,7 @@
15#ifdef CONFIG_PPC_ISERIES 15#ifdef CONFIG_PPC_ISERIES
16#include <asm/iSeries/iSeries_io.h> 16#include <asm/iSeries/iSeries_io.h>
17#endif 17#endif
18#include <asm/memory.h> 18#include <asm/synch.h>
19#include <asm/delay.h> 19#include <asm/delay.h>
20 20
21#include <asm-generic/iomap.h> 21#include <asm-generic/iomap.h>
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h
index 72dcf8116b04..a6a173d49506 100644
--- a/include/asm-ppc64/iommu.h
+++ b/include/asm-ppc64/iommu.h
@@ -1,5 +1,4 @@
1/* 1/*
2 * iommu.h
3 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
4 * Rewrite, cleanup: 3 * Rewrite, cleanup:
5 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation 4 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
@@ -29,44 +28,11 @@
29 28
30/* 29/*
31 * IOMAP_MAX_ORDER defines the largest contiguous block 30 * IOMAP_MAX_ORDER defines the largest contiguous block
32 * of dma (tce) space we can get. IOMAP_MAX_ORDER = 13 31 * of dma space we can get. IOMAP_MAX_ORDER = 13
33 * allows up to 2**12 pages (4096 * 4096) = 16 MB 32 * allows up to 2**12 pages (4096 * 4096) = 16 MB
34 */ 33 */
35#define IOMAP_MAX_ORDER 13 34#define IOMAP_MAX_ORDER 13
36 35
37/*
38 * Tces come in two formats, one for the virtual bus and a different
39 * format for PCI
40 */
41#define TCE_VB 0
42#define TCE_PCI 1
43
44/* tce_entry
45 * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
46 * abstracted so layout is irrelevant.
47 */
48union tce_entry {
49 unsigned long te_word;
50 struct {
51 unsigned int tb_cacheBits :6; /* Cache hash bits - not used */
52 unsigned int tb_rsvd :6;
53 unsigned long tb_rpn :40; /* Real page number */
54 unsigned int tb_valid :1; /* Tce is valid (vb only) */
55 unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */
56 unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */
57 unsigned int tb_pciwr :1; /* Write allowed (pci only) */
58 unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */
59 } te_bits;
60#define te_cacheBits te_bits.tb_cacheBits
61#define te_rpn te_bits.tb_rpn
62#define te_valid te_bits.tb_valid
63#define te_allio te_bits.tb_allio
64#define te_lpindex te_bits.tb_lpindex
65#define te_pciwr te_bits.tb_pciwr
66#define te_rdwr te_bits.tb_rdwr
67};
68
69
70struct iommu_table { 36struct iommu_table {
71 unsigned long it_busno; /* Bus number this table belongs to */ 37 unsigned long it_busno; /* Bus number this table belongs to */
72 unsigned long it_size; /* Size of iommu table in entries */ 38 unsigned long it_size; /* Size of iommu table in entries */
diff --git a/include/asm-ppc64/kmap_types.h b/include/asm-ppc64/kmap_types.h
deleted file mode 100644
index fd1574648223..000000000000
--- a/include/asm-ppc64/kmap_types.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 KM_BOUNCE_READ,
7 KM_SKB_SUNRPC_DATA,
8 KM_SKB_DATA_SOFTIRQ,
9 KM_USER0,
10 KM_USER1,
11 KM_BIO_SRC_IRQ,
12 KM_BIO_DST_IRQ,
13 KM_PTE0,
14 KM_PTE1,
15 KM_IRQ0,
16 KM_IRQ1,
17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1,
19 KM_TYPE_NR
20};
21
22#endif
23#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index 8027160ec96d..d35d9d3e44cf 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -56,9 +56,8 @@ struct machdep_calls {
56 unsigned long vflags, 56 unsigned long vflags,
57 unsigned long rflags); 57 unsigned long rflags);
58 long (*hpte_remove)(unsigned long hpte_group); 58 long (*hpte_remove)(unsigned long hpte_group);
59 void (*flush_hash_range)(unsigned long context, 59 void (*flush_hash_range)(unsigned long number, int local);
60 unsigned long number, 60
61 int local);
62 /* special for kexec, to be called in real mode, linar mapping is 61 /* special for kexec, to be called in real mode, linar mapping is
63 * destroyed as well */ 62 * destroyed as well */
64 void (*hpte_clear_all)(void); 63 void (*hpte_clear_all)(void);
diff --git a/include/asm-ppc64/memory.h b/include/asm-ppc64/memory.h
deleted file mode 100644
index af53ffb55726..000000000000
--- a/include/asm-ppc64/memory.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef _ASM_PPC64_MEMORY_H_
2#define _ASM_PPC64_MEMORY_H_
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12
13/*
14 * Arguably the bitops and *xchg operations don't imply any memory barrier
15 * or SMP ordering, but in fact a lot of drivers expect them to imply
16 * both, since they do on x86 cpus.
17 */
18#ifdef CONFIG_SMP
19#define EIEIO_ON_SMP "eieio\n"
20#define ISYNC_ON_SMP "\n\tisync"
21#define SYNC_ON_SMP "lwsync\n\t"
22#else
23#define EIEIO_ON_SMP
24#define ISYNC_ON_SMP
25#define SYNC_ON_SMP
26#endif
27
28static inline void eieio(void)
29{
30 __asm__ __volatile__ ("eieio" : : : "memory");
31}
32
33static inline void isync(void)
34{
35 __asm__ __volatile__ ("isync" : : : "memory");
36}
37
38#ifdef CONFIG_SMP
39#define eieio_on_smp() eieio()
40#define isync_on_smp() isync()
41#else
42#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
43#define isync_on_smp() __asm__ __volatile__("": : :"memory")
44#endif
45
46/* Macros for adjusting thread priority (hardware multi-threading) */
47#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
48#define HMT_low() asm volatile("or 1,1,1 # low priority")
49#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
50#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
51#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
52#define HMT_high() asm volatile("or 3,3,3 # high priority")
53
54#define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n"
55#define HMT_LOW "\tor 1,1,1 # low priority\n"
56#define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n"
57#define HMT_MEDIUM "\tor 2,2,2 # medium priority\n"
58#define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n"
59#define HMT_HIGH "\tor 3,3,3 # high priority\n"
60
61#endif
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h
index 7bc42eb087ad..d2b0b796d35e 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-ppc64/mmu.h
@@ -14,6 +14,7 @@
14#define _PPC64_MMU_H_ 14#define _PPC64_MMU_H_
15 15
16#include <linux/config.h> 16#include <linux/config.h>
17#include <asm/ppc_asm.h> /* for ASM_CONST */
17#include <asm/page.h> 18#include <asm/page.h>
18 19
19/* 20/*
@@ -29,7 +30,7 @@
29 30
30/* Location of cpu0's segment table */ 31/* Location of cpu0's segment table */
31#define STAB0_PAGE 0x6 32#define STAB0_PAGE 0x6
32#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT) 33#define STAB0_PHYS_ADDR (STAB0_PAGE<<12)
33 34
34#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
35extern char initial_stab[]; 36extern char initial_stab[];
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index a15422bcf30d..d404431f0a9a 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -11,13 +11,7 @@
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14 14#include <asm/ppc_asm.h> /* for ASM_CONST */
15#ifdef __ASSEMBLY__
16 #define ASM_CONST(x) x
17#else
18 #define __ASM_CONST(x) x##UL
19 #define ASM_CONST(x) __ASM_CONST(x)
20#endif
21 15
22/* PAGE_SHIFT determines the page size */ 16/* PAGE_SHIFT determines the page size */
23#define PAGE_SHIFT 12 17#define PAGE_SHIFT 12
diff --git a/include/asm-ppc64/ppc_asm.h b/include/asm-ppc64/ppc_asm.h
deleted file mode 100644
index 9031d8a29aca..000000000000
--- a/include/asm-ppc64/ppc_asm.h
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * arch/ppc64/kernel/ppc_asm.h
3 *
4 * Definitions used by various bits of low-level assembly code on PowerPC.
5 *
6 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14#ifndef _PPC64_PPC_ASM_H
15#define _PPC64_PPC_ASM_H
16/*
17 * Macros for storing registers into and loading registers from
18 * exception frames.
19 */
20#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base)
21#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
22#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
23#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
24#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
25#define REST_GPR(n, base) ld n,GPR0+8*(n)(base)
26#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
27#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
28#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
29#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
30
31#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base)
32#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base)
33
34#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
35#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
36#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
37#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
38#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
39#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
40#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
41#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
42#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
43#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
44#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
45#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
46
47#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
48#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
49#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
50#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
51#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
52#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
53#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
54#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
55#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
56#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
57#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
58#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
59
60/* Macros to adjust thread priority for Iseries hardware multithreading */
61#define HMT_LOW or 1,1,1
62#define HMT_MEDIUM or 2,2,2
63#define HMT_HIGH or 3,3,3
64
65/* Insert the high 32 bits of the MSR into what will be the new
66 MSR (via SRR1 and rfid) This preserves the MSR.SF and MSR.ISF
67 bits. */
68
69#define FIX_SRR1(ra, rb) \
70 mr rb,ra; \
71 mfmsr ra; \
72 rldimi ra,rb,0,32
73
74#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
75
76/*
77 * LOADADDR( rn, name )
78 * loads the address of 'name' into 'rn'
79 *
80 * LOADBASE( rn, name )
81 * loads the address (less the low 16 bits) of 'name' into 'rn'
82 * suitable for base+disp addressing
83 */
84#define LOADADDR(rn,name) \
85 lis rn,name##@highest; \
86 ori rn,rn,name##@higher; \
87 rldicr rn,rn,32,31; \
88 oris rn,rn,name##@h; \
89 ori rn,rn,name##@l
90
91#define LOADBASE(rn,name) \
92 lis rn,name@highest; \
93 ori rn,rn,name@higher; \
94 rldicr rn,rn,32,31; \
95 oris rn,rn,name@ha
96
97
98#define SET_REG_TO_CONST(reg, value) \
99 lis reg,(((value)>>48)&0xFFFF); \
100 ori reg,reg,(((value)>>32)&0xFFFF); \
101 rldicr reg,reg,32,31; \
102 oris reg,reg,(((value)>>16)&0xFFFF); \
103 ori reg,reg,((value)&0xFFFF);
104
105#define SET_REG_TO_LABEL(reg, label) \
106 lis reg,(label)@highest; \
107 ori reg,reg,(label)@higher; \
108 rldicr reg,reg,32,31; \
109 oris reg,reg,(label)@h; \
110 ori reg,reg,(label)@l;
111
112
113/* PPPBBB - DRENG If KERNELBASE is always 0xC0...,
114 * Then we can easily do this with one asm insn. -Peter
115 */
116#define tophys(rd,rs) \
117 lis rd,((KERNELBASE>>48)&0xFFFF); \
118 rldicr rd,rd,32,31; \
119 sub rd,rs,rd
120
121#define tovirt(rd,rs) \
122 lis rd,((KERNELBASE>>48)&0xFFFF); \
123 rldicr rd,rd,32,31; \
124 add rd,rs,rd
125
126/* Condition Register Bit Fields */
127
128#define cr0 0
129#define cr1 1
130#define cr2 2
131#define cr3 3
132#define cr4 4
133#define cr5 5
134#define cr6 6
135#define cr7 7
136
137
138/* General Purpose Registers (GPRs) */
139
140#define r0 0
141#define r1 1
142#define r2 2
143#define r3 3
144#define r4 4
145#define r5 5
146#define r6 6
147#define r7 7
148#define r8 8
149#define r9 9
150#define r10 10
151#define r11 11
152#define r12 12
153#define r13 13
154#define r14 14
155#define r15 15
156#define r16 16
157#define r17 17
158#define r18 18
159#define r19 19
160#define r20 20
161#define r21 21
162#define r22 22
163#define r23 23
164#define r24 24
165#define r25 25
166#define r26 26
167#define r27 27
168#define r28 28
169#define r29 29
170#define r30 30
171#define r31 31
172
173
174/* Floating Point Registers (FPRs) */
175
176#define fr0 0
177#define fr1 1
178#define fr2 2
179#define fr3 3
180#define fr4 4
181#define fr5 5
182#define fr6 6
183#define fr7 7
184#define fr8 8
185#define fr9 9
186#define fr10 10
187#define fr11 11
188#define fr12 12
189#define fr13 13
190#define fr14 14
191#define fr15 15
192#define fr16 16
193#define fr17 17
194#define fr18 18
195#define fr19 19
196#define fr20 20
197#define fr21 21
198#define fr22 22
199#define fr23 23
200#define fr24 24
201#define fr25 25
202#define fr26 26
203#define fr27 27
204#define fr28 28
205#define fr29 29
206#define fr30 30
207#define fr31 31
208
209#define vr0 0
210#define vr1 1
211#define vr2 2
212#define vr3 3
213#define vr4 4
214#define vr5 5
215#define vr6 6
216#define vr7 7
217#define vr8 8
218#define vr9 9
219#define vr10 10
220#define vr11 11
221#define vr12 12
222#define vr13 13
223#define vr14 14
224#define vr15 15
225#define vr16 16
226#define vr17 17
227#define vr18 18
228#define vr19 19
229#define vr20 20
230#define vr21 21
231#define vr22 22
232#define vr23 23
233#define vr24 24
234#define vr25 25
235#define vr26 26
236#define vr27 27
237#define vr28 28
238#define vr29 29
239#define vr30 30
240#define vr31 31
241
242#endif /* _PPC64_PPC_ASM_H */
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index 4146189006e3..e5fc18531ec1 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -368,6 +368,14 @@ GLUE(.,name):
368#define mfasr() ({unsigned long rval; \ 368#define mfasr() ({unsigned long rval; \
369 asm volatile("mfasr %0" : "=r" (rval)); rval;}) 369 asm volatile("mfasr %0" : "=r" (rval)); rval;})
370 370
371/* Macros for adjusting thread priority (hardware multi-threading) */
372#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
373#define HMT_low() asm volatile("or 1,1,1 # low priority")
374#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
375#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
376#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
377#define HMT_high() asm volatile("or 3,3,3 # high priority")
378
371static inline void set_tb(unsigned int upper, unsigned int lower) 379static inline void set_tb(unsigned int upper, unsigned int lower)
372{ 380{
373 mttbl(0); 381 mttbl(0);
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
index 375015c62f20..1fbdc9f0590c 100644
--- a/include/asm-ppc64/system.h
+++ b/include/asm-ppc64/system.h
@@ -13,7 +13,7 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/processor.h> 14#include <asm/processor.h>
15#include <asm/hw_irq.h> 15#include <asm/hw_irq.h>
16#include <asm/memory.h> 16#include <asm/synch.h>
17 17
18/* 18/*
19 * Memory barrier. 19 * Memory barrier.
@@ -48,7 +48,7 @@
48#ifdef CONFIG_SMP 48#ifdef CONFIG_SMP
49#define smp_mb() mb() 49#define smp_mb() mb()
50#define smp_rmb() rmb() 50#define smp_rmb() rmb()
51#define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory") 51#define smp_wmb() eieio()
52#define smp_read_barrier_depends() read_barrier_depends() 52#define smp_read_barrier_depends() read_barrier_depends()
53#else 53#else
54#define smp_mb() __asm__ __volatile__("": : :"memory") 54#define smp_mb() __asm__ __volatile__("": : :"memory")
diff --git a/include/asm-ppc64/tce.h b/include/asm-ppc64/tce.h
new file mode 100644
index 000000000000..d40b6b42ab35
--- /dev/null
+++ b/include/asm-ppc64/tce.h
@@ -0,0 +1,64 @@
1/*
2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
3 * Rewrite, cleanup:
4 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef _ASM_TCE_H
22#define _ASM_TCE_H
23
24/*
25 * Tces come in two formats, one for the virtual bus and a different
26 * format for PCI
27 */
28#define TCE_VB 0
29#define TCE_PCI 1
30
31/* TCE page size is 4096 bytes (1 << 12) */
32
33#define TCE_SHIFT 12
34#define TCE_PAGE_SIZE (1 << TCE_SHIFT)
35#define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT)
36
37
38/* tce_entry
39 * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
40 * abstracted so layout is irrelevant.
41 */
42union tce_entry {
43 unsigned long te_word;
44 struct {
45 unsigned int tb_cacheBits :6; /* Cache hash bits - not used */
46 unsigned int tb_rsvd :6;
47 unsigned long tb_rpn :40; /* Real page number */
48 unsigned int tb_valid :1; /* Tce is valid (vb only) */
49 unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */
50 unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */
51 unsigned int tb_pciwr :1; /* Write allowed (pci only) */
52 unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */
53 } te_bits;
54#define te_cacheBits te_bits.tb_cacheBits
55#define te_rpn te_bits.tb_rpn
56#define te_valid te_bits.tb_valid
57#define te_allio te_bits.tb_allio
58#define te_lpindex te_bits.tb_lpindex
59#define te_pciwr te_bits.tb_pciwr
60#define te_rdwr te_bits.tb_rdwr
61};
62
63
64#endif
diff --git a/include/asm-ppc64/thread_info.h b/include/asm-ppc64/thread_info.h
index 0494df6fca74..71244d8a427d 100644
--- a/include/asm-ppc64/thread_info.h
+++ b/include/asm-ppc64/thread_info.h
@@ -54,9 +54,9 @@ struct thread_info {
54 54
55/* thread information allocation */ 55/* thread information allocation */
56 56
57#define THREAD_ORDER 2 57#define THREAD_SHIFT 14
58#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) 58#define THREAD_ORDER (THREAD_SHIFT - PAGE_SHIFT)
59#define THREAD_SHIFT (PAGE_SHIFT + THREAD_ORDER) 59#define THREAD_SIZE (1 << THREAD_SHIFT)
60#ifdef CONFIG_DEBUG_STACK_USAGE 60#ifdef CONFIG_DEBUG_STACK_USAGE
61#define alloc_thread_info(tsk) \ 61#define alloc_thread_info(tsk) \
62 ({ \ 62 ({ \
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h
index 45411a67e082..800bc0010cfb 100644
--- a/include/asm-ppc64/tlbflush.h
+++ b/include/asm-ppc64/tlbflush.h
@@ -20,10 +20,8 @@
20struct mm_struct; 20struct mm_struct;
21struct ppc64_tlb_batch { 21struct ppc64_tlb_batch {
22 unsigned long index; 22 unsigned long index;
23 unsigned long context;
24 struct mm_struct *mm; 23 struct mm_struct *mm;
25 pte_t pte[PPC64_TLB_BATCH_NR]; 24 pte_t pte[PPC64_TLB_BATCH_NR];
26 unsigned long addr[PPC64_TLB_BATCH_NR];
27 unsigned long vaddr[PPC64_TLB_BATCH_NR]; 25 unsigned long vaddr[PPC64_TLB_BATCH_NR];
28}; 26};
29DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); 27DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
@@ -47,8 +45,7 @@ static inline void flush_tlb_pending(void)
47#define flush_tlb_kernel_range(start, end) flush_tlb_pending() 45#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
48#define flush_tlb_pgtables(mm, start, end) do { } while (0) 46#define flush_tlb_pgtables(mm, start, end) do { } while (0)
49 47
50extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte, 48extern void flush_hash_page(unsigned long va, pte_t pte, int local);
51 int local); 49void flush_hash_range(unsigned long number, int local);
52void flush_hash_range(unsigned long context, unsigned long number, int local);
53 50
54#endif /* _PPC64_TLBFLUSH_H */ 51#endif /* _PPC64_TLBFLUSH_H */