4 files changed, 13 insertions, 1 deletions

diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index fe1dbe2e28f4..e253e86a1a39 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -42,6 +42,7 @@ static struct spi_board_info spi0_board_info[] __initdata = {
                 .modalias       = "ltv350qv",
                 .max_speed_hz   = 16000000,
                 .chip_select    = 1,
+                .mode           = SPI_MODE_3,
         },
 };
 
diff --git a/arch/avr32/mm/fault.c b/arch/avr32/mm/fault.c
index e011f1ce1875..4b2495285d94 100644
--- a/arch/avr32/mm/fault.c
+++ b/arch/avr32/mm/fault.c
@@ -158,7 +158,7 @@ bad_area:
         up_read(&mm->mmap_sem);
 
         if (user_mode(regs)) {
-                if (exception_trace)
+                if (exception_trace && printk_ratelimit())
                         printk("%s%s[%d]: segfault at %08lx pc %08lx "
                                "sp %08lx ecr %lu\n",
                                is_init(tsk) ? KERN_EMERG : KERN_INFO,
diff --git a/include/asm-avr32/arch-at32ap/gpio.h b/include/asm-avr32/arch-at32ap/gpio.h
index 80a21aa9ae77..af7f9535bab3 100644
--- a/include/asm-avr32/arch-at32ap/gpio.h
+++ b/include/asm-avr32/arch-at32ap/gpio.h
@@ -14,6 +14,8 @@ int gpio_direction_output(unsigned int gpio, int value);
 int gpio_get_value(unsigned int gpio);
 void gpio_set_value(unsigned int gpio, int value);
 
+#include <asm-generic/gpio.h>           /* cansleep wrappers */
+
 static inline int gpio_to_irq(unsigned int gpio)
 {
         return gpio + GPIO_IRQ_BASE;
diff --git a/include/asm-avr32/cache.h b/include/asm-avr32/cache.h
index dabb955f3c00..d3cf35ab11ab 100644
--- a/include/asm-avr32/cache.h
+++ b/include/asm-avr32/cache.h
@@ -4,6 +4,15 @@
 #define L1_CACHE_SHIFT 5
 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
 
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+
 #ifndef __ASSEMBLER__
 struct cache_info {
         unsigned int ways;