diff options
| -rw-r--r-- | arch/arm/kernel/machine_kexec.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/dma.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-ac97.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-ssp.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/pxa300.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-pxa/pxa320.c | 2 | ||||
| -rw-r--r-- | sound/arm/aaci.c | 6 |
7 files changed, 23 insertions, 16 deletions
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index 440dc62cdc3a..598ca61e7bca 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c | |||
| @@ -13,8 +13,8 @@ | |||
| 13 | #include <asm/cacheflush.h> | 13 | #include <asm/cacheflush.h> |
| 14 | #include <asm/mach-types.h> | 14 | #include <asm/mach-types.h> |
| 15 | 15 | ||
| 16 | const extern unsigned char relocate_new_kernel[]; | 16 | extern const unsigned char relocate_new_kernel[]; |
| 17 | const extern unsigned int relocate_new_kernel_size; | 17 | extern const unsigned int relocate_new_kernel_size; |
| 18 | 18 | ||
| 19 | extern void setup_mm_for_reboot(char mode); | 19 | extern void setup_mm_for_reboot(char mode); |
| 20 | 20 | ||
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c index b1514fb20d3a..7de17fc5d54b 100644 --- a/arch/arm/mach-pxa/dma.c +++ b/arch/arm/mach-pxa/dma.c | |||
| @@ -121,20 +121,22 @@ int __init pxa_init_dma(int num_ch) | |||
| 121 | if (dma_channels == NULL) | 121 | if (dma_channels == NULL) |
| 122 | return -ENOMEM; | 122 | return -ENOMEM; |
| 123 | 123 | ||
| 124 | ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL); | ||
| 125 | if (ret) { | ||
| 126 | printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n"); | ||
| 127 | kfree(dma_channels); | ||
| 128 | return ret; | ||
| 129 | } | ||
| 130 | |||
| 131 | /* dma channel priorities on pxa2xx processors: | 124 | /* dma channel priorities on pxa2xx processors: |
| 132 | * ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH | 125 | * ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH |
| 133 | * ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM | 126 | * ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM |
| 134 | * ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW | 127 | * ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW |
| 135 | */ | 128 | */ |
| 136 | for (i = 0; i < num_ch; i++) | 129 | for (i = 0; i < num_ch; i++) { |
| 130 | DCSR(i) = 0; | ||
| 137 | dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); | 131 | dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); |
| 132 | } | ||
| 133 | |||
| 134 | ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL); | ||
| 135 | if (ret) { | ||
| 136 | printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n"); | ||
| 137 | kfree(dma_channels); | ||
| 138 | return ret; | ||
| 139 | } | ||
| 138 | 140 | ||
| 139 | num_dma_channels = num_ch; | 141 | num_dma_channels = num_ch; |
| 140 | return 0; | 142 | return 0; |
diff --git a/arch/arm/mach-pxa/include/mach/regs-ac97.h b/arch/arm/mach-pxa/include/mach/regs-ac97.h index e41b9d202b8c..b8d14bd9ae59 100644 --- a/arch/arm/mach-pxa/include/mach/regs-ac97.h +++ b/arch/arm/mach-pxa/include/mach/regs-ac97.h | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | #ifndef __ASM_ARCH_REGS_AC97_H | 1 | #ifndef __ASM_ARCH_REGS_AC97_H |
| 2 | #define __ASM_ARCH_REGS_AC97_H | 2 | #define __ASM_ARCH_REGS_AC97_H |
| 3 | 3 | ||
| 4 | #include <mach/hardware.h> | ||
| 5 | |||
| 4 | /* | 6 | /* |
| 5 | * AC97 Controller registers | 7 | * AC97 Controller registers |
| 6 | */ | 8 | */ |
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h index 3c04cde2cf1f..cf31986f6f05 100644 --- a/arch/arm/mach-pxa/include/mach/regs-ssp.h +++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h | |||
| @@ -41,6 +41,9 @@ | |||
| 41 | #elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | 41 | #elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
| 42 | #define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ | 42 | #define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ |
| 43 | #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ | 43 | #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ |
| 44 | #endif | ||
| 45 | |||
| 46 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
| 44 | #define SSCR0_EDSS (1 << 20) /* Extended data size select */ | 47 | #define SSCR0_EDSS (1 << 20) /* Extended data size select */ |
| 45 | #define SSCR0_NCS (1 << 21) /* Network clock select */ | 48 | #define SSCR0_NCS (1 << 21) /* Network clock select */ |
| 46 | #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ | 49 | #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ |
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index f735e58e6669..83fb609b6eb7 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c | |||
| @@ -88,13 +88,13 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { | |||
| 88 | static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0); | 88 | static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0); |
| 89 | 89 | ||
| 90 | static struct clk_lookup common_clkregs[] = { | 90 | static struct clk_lookup common_clkregs[] = { |
| 91 | INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"), | 91 | INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), |
| 92 | }; | 92 | }; |
| 93 | 93 | ||
| 94 | static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); | 94 | static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); |
| 95 | 95 | ||
| 96 | static struct clk_lookup pxa310_clkregs[] = { | 96 | static struct clk_lookup pxa310_clkregs[] = { |
| 97 | INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"), | 97 | INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", NULL), |
| 98 | }; | 98 | }; |
| 99 | 99 | ||
| 100 | static int __init pxa300_init(void) | 100 | static int __init pxa300_init(void) |
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index effe408c186f..36f066196fa2 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c | |||
| @@ -83,7 +83,7 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { | |||
| 83 | static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0); | 83 | static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0); |
| 84 | 84 | ||
| 85 | static struct clk_lookup pxa320_clkregs[] = { | 85 | static struct clk_lookup pxa320_clkregs[] = { |
| 86 | INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"), | 86 | INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), |
| 87 | }; | 87 | }; |
| 88 | 88 | ||
| 89 | static int __init pxa320_init(void) | 89 | static int __init pxa320_init(void) |
diff --git a/sound/arm/aaci.c b/sound/arm/aaci.c index 89096e811a4b..772901e41ecb 100644 --- a/sound/arm/aaci.c +++ b/sound/arm/aaci.c | |||
| @@ -90,7 +90,7 @@ static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, | |||
| 90 | */ | 90 | */ |
| 91 | do { | 91 | do { |
| 92 | v = readl(aaci->base + AACI_SLFR); | 92 | v = readl(aaci->base + AACI_SLFR); |
| 93 | } while ((v & (SLFR_1TXB|SLFR_2TXB)) && timeout--); | 93 | } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout); |
| 94 | 94 | ||
| 95 | if (!timeout) | 95 | if (!timeout) |
| 96 | dev_err(&aaci->dev->dev, | 96 | dev_err(&aaci->dev->dev, |
| @@ -126,7 +126,7 @@ static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | |||
| 126 | */ | 126 | */ |
| 127 | do { | 127 | do { |
| 128 | v = readl(aaci->base + AACI_SLFR); | 128 | v = readl(aaci->base + AACI_SLFR); |
| 129 | } while ((v & SLFR_1TXB) && timeout--); | 129 | } while ((v & SLFR_1TXB) && --timeout); |
| 130 | 130 | ||
| 131 | if (!timeout) { | 131 | if (!timeout) { |
| 132 | dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n"); | 132 | dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n"); |
| @@ -147,7 +147,7 @@ static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | |||
| 147 | do { | 147 | do { |
| 148 | cond_resched(); | 148 | cond_resched(); |
| 149 | v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); | 149 | v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); |
| 150 | } while ((v != (SLFR_1RXV|SLFR_2RXV)) && timeout--); | 150 | } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout); |
| 151 | 151 | ||
| 152 | if (!timeout) { | 152 | if (!timeout) { |
| 153 | dev_err(&aaci->dev->dev, "timeout on RX valid\n"); | 153 | dev_err(&aaci->dev->dev, "timeout on RX valid\n"); |
