diff options
-rw-r--r-- | drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 88f67375e85e..d30fbdd81fca 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | |||
@@ -2454,6 +2454,16 @@ static irqreturn_t ixgbe_msix_other(int irq, void *data) | |||
2454 | * with the write to EICR. | 2454 | * with the write to EICR. |
2455 | */ | 2455 | */ |
2456 | eicr = IXGBE_READ_REG(hw, IXGBE_EICS); | 2456 | eicr = IXGBE_READ_REG(hw, IXGBE_EICS); |
2457 | |||
2458 | /* The lower 16bits of the EICR register are for the queue interrupts | ||
2459 | * which should be masked here in order to not accidently clear them if | ||
2460 | * the bits are high when ixgbe_msix_other is called. There is a race | ||
2461 | * condition otherwise which results in possible performance loss | ||
2462 | * especially if the ixgbe_msix_other interrupt is triggering | ||
2463 | * consistently (as it would when PPS is turned on for the X540 device) | ||
2464 | */ | ||
2465 | eicr &= 0xFFFF0000; | ||
2466 | |||
2457 | IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); | 2467 | IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); |
2458 | 2468 | ||
2459 | if (eicr & IXGBE_EICR_LSC) | 2469 | if (eicr & IXGBE_EICR_LSC) |