39 files changed, 371 insertions, 203 deletions

diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt
index dda7ecdde87b..28d014714ab8 100644
--- a/Documentation/arm/Samsung-S3C24XX/Overview.txt
+++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt
@@ -76,6 +76,15 @@ Machines
     A S3C2410 based PDA from Acer.  There is a Wiki page at
     http://handhelds.org/moin/moin.cgi/AcerN30Documentation .
 
+  AML M5900
+
+    American Microsystems' M5900
+
+  Nex Vision Nexcoder
+  Nex Vision Otom
+
+    Two machines by Nex Vision
+
 
 Adding New Machines
 -------------------
@@ -115,6 +124,10 @@ RTC
 
   Support for the onboard RTC unit, including alarm function.
 
+  This has recently been upgraded to use the new RTC core,
+  and the module has been renamed to rtc-s3c to fit in with
+  the new rtc naming scheme.
+
 
 Watchdog
 --------
@@ -128,7 +141,7 @@ NAND
 
   The current kernels now have support for the s3c2410 NAND
   controller. If there are any problems the latest linux-mtd
-  CVS can be found from http://www.linux-mtd.infradead.org/
+  code can be found from http://www.linux-mtd.infradead.org/
 
 
 Serial
@@ -168,6 +181,21 @@ Suspend to RAM
   See Suspend.txt for more information.
 
 
+SPI
+---
+
+  SPI drivers are available for both the in-built hardware
+  (although there is no DMA support yet) and a generic
+  GPIO based solution.
+
+
+LEDs
+----
+
+  There is support for GPIO based LEDs via a platform driver
+  in the LED subsystem.
+
+
 Platform Data
 -------------
 
diff --git a/MAINTAINERS b/MAINTAINERS
index bf9fa6d7af13..0f6d13bd4688 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1564,10 +1564,9 @@ T:	git kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6.git
 S:      Maintained
 
 IDE/ATAPI CDROM DRIVER
-P:      Jens Axboe
-M:      axboe@kernel.dk
-L:      linux-kernel@vger.kernel.org
-W:      http://www.kernel.dk
+P:      Alan Cox
+M:      alan@lxorguk.ukuu.org.uk
+L:      linux-ide@vger.kernel.org
 S:      Maintained
 
 IDE/ATAPI FLOPPY DRIVERS
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index fbf9f88e46ea..e79a1b62600f 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -21,6 +21,25 @@
 #include <asm/hardware.h>
 #include <asm/io.h>
 
+void * __iomem __iop13xx_io(unsigned long io_addr)
+{
+        void __iomem * io_virt;
+
+        switch (io_addr) {
+        case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
+                io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr);
+                break;
+        case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
+                io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr);
+                break;
+        default:
+                BUG();
+        }
+
+        return io_virt;
+}
+EXPORT_SYMBOL(__iop13xx_io);
+
 void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
         unsigned long flags)
 {
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 6ae605857ca9..9de1278d234f 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -76,7 +76,9 @@ unsigned long long sched_clock(void)
         /*
          * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
          * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
-         * years range which is nice, but with higher computation cost.
+         * years range and truncation to unsigned long long limits it to
+         * sched_clock's max range of ~584 years.  This is nice but with
+         * higher computation cost.
          */
         {
                 union {
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 3775b8f38429..ee2beb400414 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -101,7 +101,7 @@ static struct irqaction pxa_timer_irq = {
         .handler        = pxa_timer_interrupt,
 };
 
-cycle_t pxa_get_cycles(void)
+static cycle_t pxa_get_cycles(void)
 {
         return OSCR;
 }
@@ -134,13 +134,13 @@ static void __init pxa_timer_init(void)
         OSMR0 = OSCR + LATCH;   /* set initial match */
         local_irq_restore(flags);
 
-        /* on PXA OSCR runs continiously and is not written to, so we can use it
-         * as clock source directly.
+        /*
+         * OSCR runs continuously on PXA and is not written to,
+         * so we can use it as clock source directly.
          */
         clocksource_pxa.mult =
                 clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
         clocksource_register(&clocksource_pxa);
-
 }
 
 #ifdef CONFIG_NO_IDLE_HZ
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 717322a0916b..fa860e716b4f 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -1053,11 +1053,11 @@ int s3c2410_dma_config(dmach_t channel,
         if (chan == NULL)
                 return -EINVAL;
 
-        printk("Initial dcon is %08x\n", dcon);
+        pr_debug("%s: Initial dcon is %08x\n", __FUNCTION__, dcon);
 
         dcon |= chan->dcon & dma_sel.dcon_mask;
 
-        printk("New dcon is %08x\n", dcon);
+        pr_debug("%s: New dcon is %08x\n", __FUNCTION__, dcon);
 
         switch (xferunit) {
         case 1:
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 408b05ae6b9b..ded0e96d069d 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -19,6 +19,7 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
 
 #include "mm.h"
 
@@ -69,6 +70,11 @@ mc_copy_user_page(void *from, void *to)
 
 void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
 {
+        struct page *page = virt_to_page(kfrom);
+
+        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+                __flush_dcache_page(page_mapping(page), page);
+
         spin_lock(&minicache_lock);
 
         set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 865777dec161..3adb79257f43 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -53,6 +53,10 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
 {
         unsigned int offset = CACHE_COLOUR(vaddr);
         unsigned long from, to;
+        struct page *page = virt_to_page(kfrom);
+
+        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+                __flush_dcache_page(page_mapping(page), page);
 
         /*
          * Discard data in the kernel mapping for the new page.
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index aea5da723596..2e455f82a4d5 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -19,6 +19,7 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
 
 #include "mm.h"
 
@@ -91,6 +92,11 @@ mc_copy_user_page(void *from, void *to)
 
 void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
 {
+        struct page *page = virt_to_page(kfrom);
+
+        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+                __flush_dcache_page(page_mapping(page), page);
+
         spin_lock(&minicache_lock);
 
         set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index e26cc1f59948..490d9d18a7d1 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -264,6 +264,18 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
                 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
 }
 
+static void vfp_enable(void *unused)
+{
+        u32 access = get_copro_access();
+
+        /*
+         * Enable full access to VFP (cp10 and cp11)
+         */
+        set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
+}
+
+#include <linux/smp.h>
+
 /*
  * VFP support code initialisation.
  */
@@ -288,6 +300,7 @@ static int __init vfp_init(void)
          * we just need to read the VFPSID register.
          */
         vfpsid = fmrx(FPSID);
+        barrier();
 
         printk(KERN_INFO "VFP support v0.3: ");
         if (VFP_arch) {
@@ -301,6 +314,8 @@ static int __init vfp_init(void)
         } else if (vfpsid & FPSID_NODOUBLE) {
                 printk("no double precision support\n");
         } else {
+                smp_call_function(vfp_enable, NULL, 1, 1);
+
                 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;  /* Extract the architecture version */
                 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
                         (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
diff --git a/arch/i386/boot/compressed/head.S b/arch/i386/boot/compressed/head.S
index f395a4bb38bb..3517a32aaf41 100644
--- a/arch/i386/boot/compressed/head.S
+++ b/arch/i386/boot/compressed/head.S
@@ -28,7 +28,7 @@
 #include <asm/page.h>
 #include <asm/boot.h>
 
-.section ".text.head"
+.section ".text.head","ax",@progbits
         .globl startup_32
 
 startup_32:
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
index b735458c6e3a..10baa3501ed3 100644
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -373,8 +373,8 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
         cpumask_t online_policy_cpus;
         struct drv_cmd cmd;
         unsigned int msr;
-        unsigned int next_state = 0;
-        unsigned int next_perf_state = 0;
+        unsigned int next_state = 0; /* Index into freq_table */
+        unsigned int next_perf_state = 0; /* Index into perf table */
         unsigned int i;
         int result = 0;
 
@@ -420,6 +420,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
                 msr =
                     (u32) perf->states[next_perf_state].
                     control & INTEL_MSR_RANGE;
+                cmd.val = get_cur_val(online_policy_cpus);
                 cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr;
                 break;
         case SYSTEM_IO_CAPABLE:
@@ -439,8 +440,8 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
         else
                 cpu_set(policy->cpu, cmd.mask);
 
-        freqs.old = data->freq_table[perf->state].frequency;
-        freqs.new = data->freq_table[next_perf_state].frequency;
+        freqs.old = perf->states[perf->state].core_frequency * 1000;
+        freqs.new = data->freq_table[next_state].frequency;
         for_each_cpu_mask(i, cmd.mask) {
                 freqs.cpu = i;
                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
@@ -677,6 +678,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
                 valid_states++;
         }
         data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
+        perf->state = 0;
 
         result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
         if (result)
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index 6d9c97a690fd..e940e00b96c9 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -52,6 +52,10 @@
 #define CPU_EZRA_T      4
 #define CPU_NEHEMIAH    5
 
+/* Flags */
+#define USE_ACPI_C3             (1 << 1)
+#define USE_NORTHBRIDGE         (1 << 2)
+
 static int cpu_model;
 static unsigned int numscales=16;
 static unsigned int fsb;
@@ -68,7 +72,7 @@ static unsigned int minmult, maxmult;
 static int can_scale_voltage;
 static struct acpi_processor *pr = NULL;
 static struct acpi_processor_cx *cx = NULL;
-static int port22_en;
+static u8 longhaul_flags;
 
 /* Module parameters */
 static int scale_voltage;
@@ -80,7 +84,6 @@ static int ignore_latency;
 /* Clock ratios multiplied by 10 */
 static int clock_ratio[32];
 static int eblcr_table[32];
-static unsigned int highest_speed, lowest_speed; /* kHz */
 static int longhaul_version;
 static struct cpufreq_frequency_table *longhaul_table;
 
@@ -178,7 +181,7 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index)
         safe_halt();
         /* Change frequency on next halt or sleep */
         wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
-        if (port22_en) {
+        if (!cx_address) {
                 ACPI_FLUSH_CPU_CACHE();
                 /* Invoke C1 */
                 halt();
@@ -189,7 +192,6 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index)
                 /* Dummy op - must do something useless after P_LVL3 read */
                 t = inl(acpi_fadt.xpm_tmr_blk.address);
         }
-
         /* Disable bus ratio bit */
         local_irq_disable();
         longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
@@ -243,15 +245,14 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
         outb(0xFF,0xA1);        /* Overkill */
         outb(0xFE,0x21);        /* TMR0 only */
 
-        if (pr->flags.bm_control) {
+        if (longhaul_flags & USE_NORTHBRIDGE) {
+                /* Disable AGP and PCI arbiters */
+                outb(3, 0x22);
+        } else if ((pr != NULL) && pr->flags.bm_control) {
                 /* Disable bus master arbitration */
                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
                                   ACPI_MTX_DO_NOT_LOCK);
-        } else if (port22_en) {
-                /* Disable AGP and PCI arbiters */
-                outb(3, 0x22);
         }
-
         switch (longhaul_version) {
 
         /*
@@ -278,22 +279,25 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
          * to work in practice.
          */
         case TYPE_POWERSAVER:
-                /* Don't allow wakeup */
-                acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
-                                  ACPI_MTX_DO_NOT_LOCK);
-                do_powersaver(cx->address, clock_ratio_index);
+                if (longhaul_flags & USE_ACPI_C3) {
+                        /* Don't allow wakeup */
+                        acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
+                                          ACPI_MTX_DO_NOT_LOCK);
+                        do_powersaver(cx->address, clock_ratio_index);
+                } else {
+                        do_powersaver(0, clock_ratio_index);
+                }
                 break;
         }
 
-        if (pr->flags.bm_control) {
+        if (longhaul_flags & USE_NORTHBRIDGE) {
+                /* Enable arbiters */
+                outb(0, 0x22);
+        } else if ((pr != NULL) && pr->flags.bm_control) {
                 /* Enable bus master arbitration */
                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
                                   ACPI_MTX_DO_NOT_LOCK);
-        } else if (port22_en) {
-                /* Enable arbiters */
-                outb(0, 0x22);
         }
-
         outb(pic2_mask,0xA1);   /* restore mask */
         outb(pic1_mask,0x21);
 
@@ -314,12 +318,12 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
 
 #define ROUNDING        0xf
 
-static int _guess(int guess)
+static int _guess(int guess, int mult)
 {
         int target;
 
-        target = ((maxmult/10)*guess);
-        if (maxmult%10 != 0)
+        target = ((mult/10)*guess);
+        if (mult%10 != 0)
                 target += (guess/2);
         target += ROUNDING/2;
         target &= ~ROUNDING;
@@ -327,17 +331,17 @@ static int _guess(int guess)
 }
 
 
-static int guess_fsb(void)
+static int guess_fsb(int mult)
 {
         int speed = (cpu_khz/1000);
         int i;
-        int speeds[3] = { 66, 100, 133 };
+        int speeds[] = { 66, 100, 133, 200 };
 
         speed += ROUNDING/2;
         speed &= ~ROUNDING;
 
-        for (i=0; i<3; i++) {
-                if (_guess(speeds[i]) == speed)
+        for (i=0; i<4; i++) {
+                if (_guess(speeds[i], mult) == speed)
                         return speeds[i];
         }
         return 0;
@@ -354,9 +358,7 @@ static int __init longhaul_get_ranges(void)
                         130, 150, 160, 140,  -1, 155,  -1, 145 };
         unsigned int j, k = 0;
         union msr_longhaul longhaul;
-        unsigned long lo, hi;
-        unsigned int eblcr_fsb_table_v1[] = { 66, 133, 100, -1 };
-        unsigned int eblcr_fsb_table_v2[] = { 133, 100, -1, 66 };
+        int mult = 0;
 
         switch (longhaul_version) {
         case TYPE_LONGHAUL_V1:
@@ -364,30 +366,18 @@ static int __init longhaul_get_ranges(void)
                 /* Ugh, Longhaul v1 didn't have the min/max MSRs.
                    Assume min=3.0x & max = whatever we booted at. */
                 minmult = 30;
-                maxmult = longhaul_get_cpu_mult();
-                rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
-                invalue = (lo & (1<<18|1<<19)) >>18;
-                if (cpu_model==CPU_SAMUEL || cpu_model==CPU_SAMUEL2)
-                        fsb = eblcr_fsb_table_v1[invalue];
-                else
-                        fsb = guess_fsb();
+                maxmult = mult = longhaul_get_cpu_mult();
                 break;
 
         case TYPE_POWERSAVER:
                 /* Ezra-T */
                 if (cpu_model==CPU_EZRA_T) {
+                        minmult = 30;
                         rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
                         invalue = longhaul.bits.MaxMHzBR;
                         if (longhaul.bits.MaxMHzBR4)
                                 invalue += 16;
-                        maxmult=ezra_t_multipliers[invalue];
-
-                        invalue = longhaul.bits.MinMHzBR;
-                        if (longhaul.bits.MinMHzBR4 == 1)
-                                minmult = 30;
-                        else
-                                minmult = ezra_t_multipliers[invalue];
-                        fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
+                        maxmult = mult = ezra_t_multipliers[invalue];
                         break;
                 }
 
@@ -407,21 +397,16 @@ static int __init longhaul_get_ranges(void)
                          *   But it works, so we don't grumble.
                          */
                         minmult=40;
-                        maxmult=longhaul_get_cpu_mult();
-
-                        /* Starting with the 1.2GHz parts, theres a 200MHz bus. */
-                        if ((cpu_khz/maxmult) > 13400)
-                                fsb = 200;
-                        else
-                                fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
+                        maxmult = mult = longhaul_get_cpu_mult();
                         break;
                 }
         }
+        fsb = guess_fsb(mult);
 
         dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n",
                  minmult/10, minmult%10, maxmult/10, maxmult%10);
 
-        if (fsb == -1) {
+        if (fsb == 0) {
                 printk (KERN_INFO PFX "Invalid (reserved) FSB!\n");
                 return -EINVAL;
         }
@@ -691,27 +676,32 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
         /* Find ACPI data for processor */
         acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX,
                             &longhaul_walk_callback, NULL, (void *)&pr);
-        if (pr == NULL)
-                goto err_acpi;
 
-        if (longhaul_version == TYPE_POWERSAVER) {
-                /* Check ACPI support for C3 state */
+        /* Check ACPI support for C3 state */
+        if ((pr != NULL) && (longhaul_version == TYPE_POWERSAVER)) {
                 cx = &pr->power.states[ACPI_STATE_C3];
                 if (cx->address > 0 &&
                    (cx->latency <= 1000 || ignore_latency != 0) ) {
+                        longhaul_flags |= USE_ACPI_C3;
                         goto print_support_type;
                 }
         }
+        /* Check if northbridge is friendly */
+        if (enable_arbiter_disable()) {
+                longhaul_flags |= USE_NORTHBRIDGE;
+                goto print_support_type;
+        }
+
+        /* No ACPI C3 or we can't use it */
         /* Check ACPI support for bus master arbiter disable */
-        if (!pr->flags.bm_control) {
-                if (enable_arbiter_disable()) {
-                        port22_en = 1;
-                } else {
-                        goto err_acpi;
-                }
+        if ((pr == NULL) || !(pr->flags.bm_control)) {
+                printk(KERN_ERR PFX
+                        "No ACPI support. Unsupported northbridge.\n");
+                return -ENODEV;
         }
+
 print_support_type:
-        if (!port22_en) {
+        if (!(longhaul_flags & USE_NORTHBRIDGE)) {
                 printk (KERN_INFO PFX "Using ACPI support.\n");
         } else {
                 printk (KERN_INFO PFX "Using northbridge support.\n");
@@ -736,10 +726,6 @@ print_support_type:
         cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
 
         return 0;
-
-err_acpi:
-        printk(KERN_ERR PFX "No ACPI support. Unsupported northbridge. Aborting.\n");
-        return -ENODEV;
 }
 
 static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
@@ -774,8 +760,8 @@ static int __init longhaul_init(void)
 
 #ifdef CONFIG_SMP
         if (num_online_cpus() > 1) {
-                return -ENODEV;
                 printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n");
+                return -ENODEV;
         }
 #endif
 #ifdef CONFIG_X86_IO_APIC
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
index 5113e9231634..f43b987f952b 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -533,9 +533,9 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
 
         /* notify BIOS that we exist */
         acpi_processor_notify_smm(THIS_MODULE);
-        printk("speedstep-centrino with X86_SPEEDSTEP_CENTRINO_ACPI"
-                        "config is deprecated.\n "
-                        "Use X86_ACPI_CPUFREQ (acpi-cpufreq instead.\n" );
+        printk("speedstep-centrino with X86_SPEEDSTEP_CENTRINO_ACPI "
+               "config is deprecated.\n "
+               "Use X86_ACPI_CPUFREQ (acpi-cpufreq) instead.\n" );
 
         return 0;
 
diff --git a/arch/x86_64/kernel/cpufreq/Kconfig b/arch/x86_64/kernel/cpufreq/Kconfig
index 3abcfa3e1ed7..45a6a1fd14ac 100644
--- a/arch/x86_64/kernel/cpufreq/Kconfig
+++ b/arch/x86_64/kernel/cpufreq/Kconfig
@@ -49,6 +49,7 @@ config X86_SPEEDSTEP_CENTRINO_ACPI
 
 config X86_ACPI_CPUFREQ
         tristate "ACPI Processor P-States driver"
+        select CPU_FREQ_TABLE
         depends on ACPI_PROCESSOR
         help
           This driver adds a CPUFreq driver which utilizes the ACPI
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c
index 1d9eb6db732a..09d2e8a10a49 100644
--- a/arch/x86_64/kernel/traps.c
+++ b/arch/x86_64/kernel/traps.c
@@ -319,7 +319,7 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
         /*
          * This handles the process stack:
          */
-        tinfo = current_thread_info();
+        tinfo = task_thread_info(tsk);
         HANDLE_STACK (valid_stack_ptr(tinfo, stack));
 #undef HANDLE_STACK
         put_cpu();
diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
index 4b4217d9be78..07b706243772 100644
--- a/block/cfq-iosched.c
+++ b/block/cfq-iosched.c
@@ -577,9 +577,9 @@ static int cfq_allow_merge(request_queue_t *q, struct request *rq,
         pid_t key;
 
         /*
-         * Disallow merge, if bio and rq aren't both sync or async
+         * Disallow merge of a sync bio into an async request.
          */
-        if (!!bio_sync(bio) != !!rq_is_sync(rq))
+        if ((bio_data_dir(bio) == READ || bio_sync(bio)) && !rq_is_sync(rq))
                 return 0;
 
         /*
@@ -592,7 +592,7 @@ static int cfq_allow_merge(request_queue_t *q, struct request *rq,
         if (cfqq == RQ_CFQQ(rq))
                 return 1;
 
-        return 1;
+        return 0;
 }
 
 static inline void
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 10ee22ae5c15..623cec914c9b 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -1027,13 +1027,15 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
 #endif
         }
 
-        rc = pci_request_regions(pdev, DRV_NAME);
-        if (rc) {
-                disable_dev_on_err = 0;
-                goto err_out;
-        }
-
-        if (legacy_mode) {
+        if (!legacy_mode) {
+                rc = pci_request_regions(pdev, DRV_NAME);
+                if (rc) {
+                        disable_dev_on_err = 0;
+                        goto err_out;
+                }
+        } else {
+                /* Deal with combined mode hack. This side of the logic all
+                   goes away once the combined mode hack is killed in 2.6.21 */
                 if (!request_region(ATA_PRIMARY_CMD, 8, "libata")) {
                         struct resource *conflict, res;
                         res.start = ATA_PRIMARY_CMD;
@@ -1071,6 +1073,13 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
                         }
                 } else
                         legacy_mode |= ATA_PORT_SECONDARY;
+
+                if (legacy_mode & ATA_PORT_PRIMARY)
+                        pci_request_region(pdev, 1, DRV_NAME);
+                if (legacy_mode & ATA_PORT_SECONDARY)
+                        pci_request_region(pdev, 3, DRV_NAME);
+                /* If there is a DMA resource, allocate it */
+                pci_request_region(pdev, 4, DRV_NAME);
         }
 
         /* we have legacy mode, but all ports are unavailable */
@@ -1114,11 +1123,20 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
 err_out_ent:
         kfree(probe_ent);
 err_out_regions:
-        if (legacy_mode & ATA_PORT_PRIMARY)
-                release_region(ATA_PRIMARY_CMD, 8);
-        if (legacy_mode & ATA_PORT_SECONDARY)
-                release_region(ATA_SECONDARY_CMD, 8);
-        pci_release_regions(pdev);
+        /* All this conditional stuff is needed for the combined mode hack
+           until 2.6.21 when it can go */
+        if (legacy_mode) {
+                pci_release_region(pdev, 4);
+                if (legacy_mode & ATA_PORT_PRIMARY) {
+                        release_region(ATA_PRIMARY_CMD, 8);
+                        pci_release_region(pdev, 1);
+                }
+                if (legacy_mode & ATA_PORT_SECONDARY) {
+                        release_region(ATA_SECONDARY_CMD, 8);
+                        pci_release_region(pdev, 3);
+                }
+        } else
+                pci_release_regions(pdev);
 err_out:
         if (disable_dev_on_err)
                 pci_disable_device(pdev);
diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
index 66d028d30439..3105dddf59f1 100644
--- a/drivers/cdrom/cdrom.c
+++ b/drivers/cdrom/cdrom.c
@@ -337,6 +337,12 @@ static const char *mrw_address_space[] = { "DMA", "GAA" };
 /* used in the audio ioctls */
 #define CHECKAUDIO if ((ret=check_for_audio_disc(cdi, cdo))) return ret
 
+/*
+ * Another popular OS uses 7 seconds as the hard timeout for default
+ * commands, so it is a good choice for us as well.
+ */
+#define CDROM_DEF_TIMEOUT       (7 * HZ)
+
 /* Not-exported routines. */
 static int open_for_data(struct cdrom_device_info * cdi);
 static int check_for_audio_disc(struct cdrom_device_info * cdi,
@@ -1528,7 +1534,7 @@ void init_cdrom_command(struct packet_command *cgc, void *buf, int len,
         cgc->buffer = (char *) buf;
         cgc->buflen = len;
         cgc->data_direction = type;
-        cgc->timeout = 5*HZ;
+        cgc->timeout = CDROM_DEF_TIMEOUT;
 }
 
 /* DVD handling */
diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index 8b3317fd46c9..1d59e2a5b9aa 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -225,6 +225,10 @@ struct agp_bridge_data {
 #define I810_GMS_DISABLE        0x00000000
 #define I810_PGETBL_CTL         0x2020
 #define I810_PGETBL_ENABLED     0x00000001
+#define I965_PGETBL_SIZE_MASK   0x0000000e
+#define I965_PGETBL_SIZE_512KB  (0 << 1)
+#define I965_PGETBL_SIZE_256KB  (1 << 1)
+#define I965_PGETBL_SIZE_128KB  (2 << 1)
 #define I810_DRAM_CTL           0x3000
 #define I810_DRAM_ROW_0         0x00000001
 #define I810_DRAM_ROW_0_SDRAM   0x00000001
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index 2f2c4efff8a3..979300405c0e 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -650,6 +650,15 @@ static struct pci_device_id agp_amd64_pci_table[] = {
         .subvendor      = PCI_ANY_ID,
         .subdevice      = PCI_ANY_ID,
         },
+        /* VIA K8M890 / K8N890 */
+        {
+        .class          = (PCI_CLASS_BRIDGE_HOST << 8),
+        .class_mask     = ~0,
+        .vendor         = PCI_VENDOR_ID_VIA,
+        .device         = PCI_DEVICE_ID_VIA_K8M890CE,
+        .subvendor      = PCI_ANY_ID,
+        .subdevice      = PCI_ANY_ID,
+        },
         /* VIA K8T890 */
         {
         .class          = (PCI_CLASS_BRIDGE_HOST << 8),
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index 883a36a27833..3491d6f84bc6 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -965,6 +965,9 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
         if (!bridge)
                 return -EINVAL;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = bridge->current_size;
 
         switch (bridge->driver->size_type) {
@@ -1016,8 +1019,8 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
 
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mem->type), bridge->gatt_table+j);
-                readl(bridge->gatt_table+j);    /* PCI Posting. */
         }
+        readl(bridge->gatt_table+j-1);  /* PCI Posting. */
 
         bridge->driver->tlb_flush(mem);
         return 0;
@@ -1034,6 +1037,9 @@ int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
         if (!bridge)
                 return -EINVAL;
 
+        if (mem->page_count == 0)
+                return 0;
+
         if (type != 0 || mem->type != 0) {
                 /* The generic routines know nothing of memory types */
                 return -EINVAL;
@@ -1042,10 +1048,9 @@ int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
         /* AK: bogus, should encode addresses > 4GB */
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(bridge->scratch_page, bridge->gatt_table+i);
-                readl(bridge->gatt_table+i);    /* PCI Posting. */
         }
+        readl(bridge->gatt_table+i-1);  /* PCI Posting. */
 
-        global_cache_flush();
         bridge->driver->tlb_flush(mem);
         return 0;
 }
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 555b3a8ab49c..ab0a9c0ad7c0 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -207,6 +207,9 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
         int i, j, num_entries;
         void *temp;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = agp_bridge->current_size;
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
@@ -221,12 +224,16 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
         if (type != 0 || mem->type != 0) {
                 if ((type == AGP_DCACHE_MEMORY) && (mem->type == AGP_DCACHE_MEMORY)) {
                         /* special insert */
-                        global_cache_flush();
+                        if (!mem->is_flushed) {
+                                global_cache_flush();
+                                mem->is_flushed = TRUE;
+                        }
+
                         for (i = pg_start; i < (pg_start + mem->page_count); i++) {
                                 writel((i*4096)|I810_PTE_LOCAL|I810_PTE_VALID, intel_i810_private.registers+I810_PTE_BASE+(i*4));
-                                readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
                         }
-                        global_cache_flush();
+                        readl(intel_i810_private.registers+I810_PTE_BASE+((i-1)*4));    /* PCI Posting. */
+
                         agp_bridge->driver->tlb_flush(mem);
                         return 0;
                 }
@@ -236,14 +243,17 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
         }
 
 insert:
-        global_cache_flush();
+        if (!mem->is_flushed) {
+                global_cache_flush();
+                mem->is_flushed = TRUE;
+        }
+
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(agp_bridge->driver->mask_memory(agp_bridge,
                         mem->memory[i], mem->type),
                         intel_i810_private.registers+I810_PTE_BASE+(j*4));
-                readl(intel_i810_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
         }
-        global_cache_flush();
+        readl(intel_i810_private.registers+I810_PTE_BASE+((j-1)*4));    /* PCI Posting. */
 
         agp_bridge->driver->tlb_flush(mem);
         return 0;
@@ -254,12 +264,14 @@ static int intel_i810_remove_entries(struct agp_memory *mem, off_t pg_start,
 {
         int i;
 
+        if (mem->page_count == 0)
+                return 0;
+
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(agp_bridge->scratch_page, intel_i810_private.registers+I810_PTE_BASE+(i*4));
-                readl(intel_i810_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
         }
+        readl(intel_i810_private.registers+I810_PTE_BASE+((i-1)*4));
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -370,6 +382,11 @@ static struct _intel_i830_private {
         struct pci_dev *i830_dev;               /* device one */
         volatile u8 __iomem *registers;
         volatile u32 __iomem *gtt;              /* I915G */
+        /* gtt_entries is the number of gtt entries that are already mapped
+         * to stolen memory.  Stolen memory is larger than the memory mapped
+         * through gtt_entries, as it includes some reserved space for the BIOS
+         * popup and for the GTT.
+         */
         int gtt_entries;
 } intel_i830_private;
 
@@ -380,14 +397,41 @@ static void intel_i830_init_gtt_entries(void)
         u8 rdct;
         int local = 0;
         static const int ddt[4] = { 0, 16, 32, 64 };
-        int size;
+        int size; /* reserved space (in kb) at the top of stolen memory */
 
         pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
 
-        /* We obtain the size of the GTT, which is also stored (for some
-         * reason) at the top of stolen memory. Then we add 4KB to that
-         * for the video BIOS popup, which is also stored in there. */
-        size = agp_bridge->driver->fetch_size() + 4;
+        if (IS_I965) {
+                u32 pgetbl_ctl;
+
+                pci_read_config_dword(agp_bridge->dev, I810_PGETBL_CTL,
+                                      &pgetbl_ctl);
+                /* The 965 has a field telling us the size of the GTT,
+                 * which may be larger than what is necessary to map the
+                 * aperture.
+                 */
+                switch (pgetbl_ctl & I965_PGETBL_SIZE_MASK) {
+                case I965_PGETBL_SIZE_128KB:
+                        size = 128;
+                        break;
+                case I965_PGETBL_SIZE_256KB:
+                        size = 256;
+                        break;
+                case I965_PGETBL_SIZE_512KB:
+                        size = 512;
+                        break;
+                default:
+                        printk(KERN_INFO PFX "Unknown page table size, "
+                               "assuming 512KB\n");
+                        size = 512;
+                }
+                size += 4; /* add in BIOS popup space */
+        } else {
+                /* On previous hardware, the GTT size was just what was
+                 * required to map the aperture.
+                 */
+                size = agp_bridge->driver->fetch_size() + 4;
+        }
 
         if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
             agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
@@ -576,6 +620,9 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
         int i,j,num_entries;
         void *temp;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = agp_bridge->current_size;
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
@@ -598,16 +645,18 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
                 return -EINVAL;
 
-        global_cache_flush();   /* FIXME: Necessary ?*/
+        if (!mem->is_flushed) {
+                global_cache_flush();
+                mem->is_flushed = TRUE;
+        }
 
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(agp_bridge->driver->mask_memory(agp_bridge,
                         mem->memory[i], mem->type),
                         intel_i830_private.registers+I810_PTE_BASE+(j*4));
-                readl(intel_i830_private.registers+I810_PTE_BASE+(j*4));        /* PCI Posting. */
         }
+        readl(intel_i830_private.registers+I810_PTE_BASE+((j-1)*4));
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -617,7 +666,8 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 {
         int i;
 
-        global_cache_flush();
+        if (mem->page_count == 0)
+                return 0;
 
         if (pg_start < intel_i830_private.gtt_entries) {
                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
@@ -626,10 +676,9 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
 
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(agp_bridge->scratch_page, intel_i830_private.registers+I810_PTE_BASE+(i*4));
-                readl(intel_i830_private.registers+I810_PTE_BASE+(i*4));        /* PCI Posting. */
         }
+        readl(intel_i830_private.registers+I810_PTE_BASE+((i-1)*4));
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -686,6 +735,9 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
         int i,j,num_entries;
         void *temp;
 
+        if (mem->page_count == 0)
+                return 0;
+
         temp = agp_bridge->current_size;
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
@@ -708,15 +760,17 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
                 (mem->type != 0 && mem->type != AGP_PHYS_MEMORY))
                 return -EINVAL;
 
-        global_cache_flush();
+        if (!mem->is_flushed) {
+                global_cache_flush();
+                mem->is_flushed = TRUE;
+        }
 
         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
                 writel(agp_bridge->driver->mask_memory(agp_bridge,
                         mem->memory[i], mem->type), intel_i830_private.gtt+j);
-                readl(intel_i830_private.gtt+j);        /* PCI Posting. */
         }
+        readl(intel_i830_private.gtt+j-1);
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
@@ -726,7 +780,8 @@ static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 {
         int i;
 
-        global_cache_flush();
+        if (mem->page_count == 0)
+                return 0;
 
         if (pg_start < intel_i830_private.gtt_entries) {
                 printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
@@ -735,30 +790,34 @@ static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
 
         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
                 writel(agp_bridge->scratch_page, intel_i830_private.gtt+i);
-                readl(intel_i830_private.gtt+i);
         }
+        readl(intel_i830_private.gtt+i-1);
 
-        global_cache_flush();
         agp_bridge->driver->tlb_flush(mem);
         return 0;
 }
 
-static int intel_i915_fetch_size(void)
+/* Return the aperture size by just checking the resource length.  The effect
+ * described in the spec of the MSAC registers is just changing of the
+ * resource size.
+ */
+static int intel_i9xx_fetch_size(void)
 {
-        struct aper_size_info_fixed *values;
-        u32 temp, offset;
+        int num_sizes = sizeof(intel_i830_sizes) / sizeof(*intel_i830_sizes);
+        int aper_size; /* size in megabytes */
+        int i;
 
-#define I915_256MB_ADDRESS_MASK (1<<27)
+        aper_size = pci_resource_len(intel_i830_private.i830_dev, 2) / MB(1);
 
-        values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
+        for (i = 0; i < num_sizes; i++) {
+                if (aper_size == intel_i830_sizes[i].size) {
+                        agp_bridge->current_size = intel_i830_sizes + i;
+                        agp_bridge->previous_size = agp_bridge->current_size;
+                        return aper_size;
+                }
+        }
 
-        pci_read_config_dword(intel_i830_private.i830_dev, I915_GMADDR, &temp);
-        if (temp & I915_256MB_ADDRESS_MASK)
-                offset = 0;     /* 128MB aperture */
-        else
-                offset = 2;     /* 256MB aperture */
-        agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
-        return values[offset].size;
+        return 0;
 }
 
 /* The intel i915 automatically initializes the agp aperture during POST.
@@ -821,40 +880,9 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
         return addr | bridge->driver->masks[type].mask;
 }
 
-static int intel_i965_fetch_size(void)
-{
-       struct aper_size_info_fixed *values;
-       u32 offset = 0;
-       u8 temp;
-
-#define I965_512MB_ADDRESS_MASK (3<<1)
-
-       values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
-
-       pci_read_config_byte(intel_i830_private.i830_dev, I965_MSAC, &temp);
-       temp &= I965_512MB_ADDRESS_MASK;
-       switch (temp) {
-       case 0x00:
-               offset = 0; /* 128MB */
-               break;
-       case 0x06:
-               offset = 3; /* 512MB */
-               break;
-       default:
-       case 0x02:
-               offset = 2; /* 256MB */
-               break;
-       }
-
-       agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
-
-        /* The i965 GTT is always sized as if it had a 512kB aperture size */
-        return 512;
-}
-
 /* The intel i965 automatically initializes the agp aperture during POST.
-+ * Use the memory already set aside for in the GTT.
-+ */
+ * Use the memory already set aside for in the GTT.
+ */
 static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
 {
        int page_order;
@@ -1574,7 +1602,7 @@ static struct agp_bridge_driver intel_915_driver = {
         .num_aperture_sizes     = 4,
         .needs_scratch_page     = TRUE,
         .configure              = intel_i915_configure,
-        .fetch_size             = intel_i915_fetch_size,
+        .fetch_size             = intel_i9xx_fetch_size,
         .cleanup                = intel_i915_cleanup,
         .tlb_flush              = intel_i810_tlbflush,
         .mask_memory            = intel_i810_mask_memory,
@@ -1598,7 +1626,7 @@ static struct agp_bridge_driver intel_i965_driver = {
        .num_aperture_sizes     = 4,
        .needs_scratch_page     = TRUE,
        .configure              = intel_i915_configure,
-       .fetch_size             = intel_i965_fetch_size,
+       .fetch_size             = intel_i9xx_fetch_size,
        .cleanup                = intel_i915_cleanup,
        .tlb_flush              = intel_i810_tlbflush,
        .mask_memory            = intel_i965_mask_memory,
diff --git a/drivers/char/agp/sgi-agp.c b/drivers/char/agp/sgi-agp.c
index d73be4c2db8a..902648db7efa 100644
--- a/drivers/char/agp/sgi-agp.c
+++ b/drivers/char/agp/sgi-agp.c
@@ -281,10 +281,11 @@ static int __devinit agp_sgi_init(void)
         else
                 return 0;
 
-        sgi_tioca_agp_bridges =
-            (struct agp_bridge_data **)kmalloc(tioca_gart_found *
-                                               sizeof(struct agp_bridge_data *),
-                                               GFP_KERNEL);
+        sgi_tioca_agp_bridges = kmalloc(tioca_gart_found *
+                                        sizeof(struct agp_bridge_data *),
+                                        GFP_KERNEL);
+        if (!sgi_tioca_agp_bridges)
+                return -ENOMEM;
 
         j = 0;
         list_for_each_entry(info, &tioca_list, ca_list) {
diff --git a/drivers/cpufreq/cpufreq_stats.c b/drivers/cpufreq/cpufreq_stats.c
index 6742b1adf2c8..91ad342a6051 100644
--- a/drivers/cpufreq/cpufreq_stats.c
+++ b/drivers/cpufreq/cpufreq_stats.c
@@ -285,6 +285,7 @@ cpufreq_stat_notifier_trans (struct notifier_block *nb, unsigned long val,
         stat = cpufreq_stats_table[freq->cpu];
         if (!stat)
                 return 0;
+
         old_index = freq_table_get_index(stat, freq->old);
         new_index = freq_table_get_index(stat, freq->new);
 
@@ -292,6 +293,9 @@ cpufreq_stat_notifier_trans (struct notifier_block *nb, unsigned long val,
         if (old_index == new_index)
                 return 0;
 
+        if (old_index == -1 || new_index == -1)
+                return 0;
+
         spin_lock(&cpufreq_stats_lock);
         stat->last_index = new_index;
 #ifdef CONFIG_CPU_FREQ_STAT_DETAILS
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 96d4a0bb2203..ec796ad087df 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -6,13 +6,21 @@ menu "HID Devices"
 
 config HID
         tristate "Generic HID support"
+        depends on INPUT
         default y
         ---help---
-          Say Y here if you want generic HID support to connect keyboards,
-          mice, joysticks, graphic tablets, or any other HID based devices
-          to your computer. You also need to select particular types of
-          HID devices you want to compile support for, in the particular
-          driver menu (USB, Bluetooth)
+          A human interface device (HID) is a type of computer device that
+          interacts directly with and takes input from humans. The term "HID"
+          most commonly used to refer to the USB-HID specification, but other
+          devices (such as, but not strictly limited to, Bluetooth) are
+          designed using HID specification (this involves certain keyboards,
+          mice, tablets, etc). This option compiles into kernel the generic
+          HID layer code (parser, usages, etc.), which can then be used by
+          transport-specific HID implementation (like USB or Bluetooth).
+
+          For docs and specs, see http://www.usb.org/developers/hidpage/
+
+          If unsure, say Y
 
 endmenu
 
diff --git a/drivers/usb/input/Kconfig b/drivers/usb/input/Kconfig
index f877cd4f317a..258a5d09d3dc 100644
--- a/drivers/usb/input/Kconfig
+++ b/drivers/usb/input/Kconfig
@@ -12,10 +12,8 @@ config USB_HID
         ---help---
           Say Y here if you want full HID support to connect USB keyboards,
           mice, joysticks, graphic tablets, or any other HID based devices
-          to your computer via USB. You also need to select HID Input layer
-          support (below) if you want to use keyboards, mice, joysticks and
-          the like ... as well as Uninterruptible Power Supply (UPS) and
-          monitor control devices.
+          to your computer via USB, as well as Uninterruptible Power Supply
+          (UPS) and monitor control devices.
 
           You can't use this driver and the HIDBP (Boot Protocol) keyboard
           and mouse drivers at the same time. More information is available:
diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h
index 9a42f5de9e57..ae532e304bf1 100644
--- a/include/asm-arm/arch-ep93xx/irqs.h
+++ b/include/asm-arm/arch-ep93xx/irqs.h
@@ -22,9 +22,9 @@
 #define IRQ_EP93XX_DMAM2P9              16
 #define IRQ_EP93XX_DMAM2M0              17
 #define IRQ_EP93XX_DMAM2M1              18
-#define IRQ_EP93XX_GPIO0MUX             20
-#define IRQ_EP93XX_GPIO1MUX             21
-#define IRQ_EP93XX_GPIO2MUX             22
+#define IRQ_EP93XX_GPIO0MUX             19
+#define IRQ_EP93XX_GPIO1MUX             20
+#define IRQ_EP93XX_GPIO2MUX             21
 #define IRQ_EP93XX_GPIO3MUX             22
 #define IRQ_EP93XX_UART1RX              23
 #define IRQ_EP93XX_UART1TX              24
diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h
index db6de2480a24..5a7bdb526606 100644
--- a/include/asm-arm/arch-iop13xx/io.h
+++ b/include/asm-arm/arch-iop13xx/io.h
@@ -21,10 +21,11 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)      (a)
+#define __io(a) __iop13xx_io(a)
 #define __mem_pci(a) (a)
 #define __mem_isa(a) (a)
 
+extern void __iomem * __iop13xx_io(unsigned long io_addr);
 extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
 extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
         unsigned long flags);
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 083e03c5639f..e24f6b6c79ae 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1626,7 +1626,7 @@
 #define SSCR0_RIM       (1 << 22)       /* Receive FIFO overrrun interrupt mask */
 #define SSCR0_TUM       (1 << 23)       /* Transmit FIFO underrun interrupt mask */
 #define SSCR0_FRDC      (0x07000000)    /* Frame rate divider control (mask) */
-#define SSCR0_SlotsPerFrm(x) ((x) - 1)  /* Time slots per frame [1..8] */
+#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)  /* Time slots per frame [1..8] */
 #define SSCR0_ADC       (1 << 30)       /* Audio clock select */
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
 #endif
@@ -1655,6 +1655,7 @@
 #define SSCR0_EDSS              (1 << 20)       /* Extended Data Size Select */
 
 /* extra bits in PXA255, PXA26x and PXA27x SSP ports */
+#define SSCR0_TISSP             (1 << 4)        /* TI Sync Serial Protocol */
 #define SSCR0_PSP               (3 << 4)        /* PSP - Programmable Serial Protocol */
 #define SSCR1_TTELP             (1 << 31)       /* TXD Tristate Enable Last Phase */
 #define SSCR1_TTE               (1 << 30)       /* TXD Tristate Enable */
diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h
index 7ac224836971..58ffa7ba3c88 100644
--- a/include/asm-arm/arch-s3c2410/dma.h
+++ b/include/asm-arm/arch-s3c2410/dma.h
@@ -14,7 +14,7 @@
 #define __ASM_ARCH_DMA_H __FILE__
 
 #include <linux/sysdev.h>
-#include "hardware.h"
+#include <asm/hardware.h>
 
 /*
  * This is the maximum DMA address(physical address) that can be DMAd to.
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S
index e09a6b8ec153..1eb4e6b8d249 100644
--- a/include/asm-arm/arch-s3c2410/entry-macro.S
+++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -20,7 +20,7 @@
 #define INTOFFSET       (0x14)
 
 #include <asm/hardware.h>
-#include <asm/arch/irqs.h>
+#include <asm/irq.h>
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h
index 729565e5cdf4..6dadf58ff984 100644
--- a/include/asm-arm/arch-s3c2410/hardware.h
+++ b/include/asm-arm/arch-s3c2410/hardware.h
@@ -13,6 +13,10 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
+#ifndef __ASM_HARDWARE_H
+#error "Do not include this directly, instead #include <asm/hardware.h>"
+#endif
+
 #ifndef __ASSEMBLY__
 
 /* external functions for GPIO support
diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h
index 39a69829d163..4b7cff456c4e 100644
--- a/include/asm-arm/arch-s3c2410/irqs.h
+++ b/include/asm-arm/arch-s3c2410/irqs.h
@@ -12,6 +12,9 @@
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H __FILE__
 
+#ifndef __ASM_ARM_IRQ_H
+#error "Do not include this directly, instead #include <asm/irq.h>"
+#endif
 
 /* we keep the first set of CPU IRQs out of the range of
  * the ISA space, so that the PC104 has them to itself
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 378a3a2ce8d9..d51049522cd0 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
  */
 extern void flush_dcache_page(struct page *);
 
+extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
+
 #define flush_dcache_mmap_lock(mapping) \
         write_lock_irq(&(mapping)->tree_lock)
 #define flush_dcache_mmap_unlock(mapping) \
diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h
index 966946478589..16f5375e57b8 100644
--- a/include/asm-arm/flat.h
+++ b/include/asm-arm/flat.h
@@ -5,7 +5,9 @@
 #ifndef __ARM_FLAT_H__
 #define __ARM_FLAT_H__
 
-#define flat_stack_align(sp)                    /* nothing needed */
+/* An odd number of words will be pushed after this alignment, so
+   deliberately misalign the value.  */
+#define flat_stack_align(sp)    sp = (void *)(((unsigned long)(sp) - 4) | 4)
 #define flat_argvp_envp_on_stack()              1
 #define flat_old_ram_flag(flags)                (flags)
 #define flat_reloc_valid(reloc, size)           ((reloc) <= (size))
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 283af50a16cb..1b882a255e35 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -19,7 +19,6 @@
 #define NO_IRQ  ((unsigned int)(-1))
 #endif
 
-struct irqaction;
 
 /*
  * Migration helpers
@@ -37,6 +36,10 @@ struct irqaction;
 #define IRQT_HIGH       (__IRQT_HIGHLVL)
 #define IRQT_PROBE      IRQ_TYPE_PROBE
 
+#ifndef __ASSEMBLY__
+struct irqaction;
 extern void migrate_irqs(void);
 #endif
 
+#endif
+
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 778e701eff30..f7a416c52edc 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1277,6 +1277,7 @@
 #define PCI_DEVICE_ID_VIA_3296_0        0x0296
 #define PCI_DEVICE_ID_VIA_8363_0        0x0305
 #define PCI_DEVICE_ID_VIA_P4M800CE      0x0314
+#define PCI_DEVICE_ID_VIA_K8M890CE      0x0336
 #define PCI_DEVICE_ID_VIA_8371_0        0x0391
 #define PCI_DEVICE_ID_VIA_8501_0        0x0501
 #define PCI_DEVICE_ID_VIA_82C561        0x0561
diff --git a/security/selinux/ss/services.c b/security/selinux/ss/services.c
index bdb7070dd3dc..ee0581557966 100644
--- a/security/selinux/ss/services.c
+++ b/security/selinux/ss/services.c
@@ -2660,9 +2660,11 @@ int selinux_netlbl_inode_permission(struct inode *inode, int mask)
                 rcu_read_unlock();
                 return 0;
         }
-        lock_sock(sock->sk);
+        local_bh_disable();
+        bh_lock_sock_nested(sock->sk);
         rc = selinux_netlbl_socket_setsid(sock, sksec->sid);
-        release_sock(sock->sk);
+        bh_unlock_sock(sock->sk);
+        local_bh_enable();
         rcu_read_unlock();
 
         return rc;