2 files changed, 64 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index 292ef7ca3058..0dbabe9a6b0a 100644
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -57,6 +57,16 @@ Optional properties:
 - cache-id-part: cache id part number to be used if it is not present
   on hardware
 - wt-override: If present then L2 is forced to Write through mode
+- arm,double-linefill : Override double linefill enable setting. Enable if
+  non-zero, disable if zero.
+- arm,double-linefill-incr : Override double linefill on INCR read. Enable
+  if non-zero, disable if zero.
+- arm,double-linefill-wrap : Override double linefill on WRAP read. Enable
+  if non-zero, disable if zero.
+- arm,prefetch-drop : Override prefetch drop enable setting. Enable if non-zero,
+  disable if zero.
+- arm,prefetch-offset : Override prefetch offset value. Valid values are
+  0-7, 15, 23, and 31.
 
 Example:
 
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 5288153f28b8..01de13809454 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1169,6 +1169,8 @@ static void __init l2c310_of_parse(const struct device_node *np,
         u32 tag[3] = { 0, 0, 0 };
         u32 filter[2] = { 0, 0 };
         u32 assoc;
+        u32 prefetch;
+        u32 val;
         int ret;
 
         of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag));
@@ -1214,6 +1216,58 @@ static void __init l2c310_of_parse(const struct device_node *np,
                        assoc);
                 break;
         }
+
+        prefetch = l2x0_saved_regs.prefetch_ctrl;
+
+        ret = of_property_read_u32(np, "arm,double-linefill", &val);
+        if (ret == 0) {
+                if (val)
+                        prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL;
+                else
+                        prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL;
+        } else if (ret != -EINVAL) {
+                pr_err("L2C-310 OF arm,double-linefill property value is missing\n");
+        }
+
+        ret = of_property_read_u32(np, "arm,double-linefill-incr", &val);
+        if (ret == 0) {
+                if (val)
+                        prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;
+                else
+                        prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;
+        } else if (ret != -EINVAL) {
+                pr_err("L2C-310 OF arm,double-linefill-incr property value is missing\n");
+        }
+
+        ret = of_property_read_u32(np, "arm,double-linefill-wrap", &val);
+        if (ret == 0) {
+                if (!val)
+                        prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP;
+                else
+                        prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP;
+        } else if (ret != -EINVAL) {
+                pr_err("L2C-310 OF arm,double-linefill-wrap property value is missing\n");
+        }
+
+        ret = of_property_read_u32(np, "arm,prefetch-drop", &val);
+        if (ret == 0) {
+                if (val)
+                        prefetch |= L310_PREFETCH_CTRL_PREFETCH_DROP;
+                else
+                        prefetch &= ~L310_PREFETCH_CTRL_PREFETCH_DROP;
+        } else if (ret != -EINVAL) {
+                pr_err("L2C-310 OF arm,prefetch-drop property value is missing\n");
+        }
+
+        ret = of_property_read_u32(np, "arm,prefetch-offset", &val);
+        if (ret == 0) {
+                prefetch &= ~L310_PREFETCH_CTRL_OFFSET_MASK;
+                prefetch |= val & L310_PREFETCH_CTRL_OFFSET_MASK;
+        } else if (ret != -EINVAL) {
+                pr_err("L2C-310 OF arm,prefetch-offset property value is missing\n");
+        }
+
+        l2x0_saved_regs.prefetch_ctrl = prefetch;
 }
 
 static const struct l2c_init_data of_l2c310_data __initconst = {