aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arc/kernel/time.c10
-rw-r--r--arch/arc/mm/tlbex.S4
2 files changed, 9 insertions, 5 deletions
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index f92cfb14ecd3..dbe74f418019 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -144,12 +144,12 @@ static struct clocksource arc_counter = {
144/********** Clock Event Device *********/ 144/********** Clock Event Device *********/
145 145
146/* 146/*
147 * Arm the timer to interrupt after @limit cycles 147 * Arm the timer to interrupt after @cycles
148 * The distinction for oneshot/periodic is done in arc_event_timer_ack() below 148 * The distinction for oneshot/periodic is done in arc_event_timer_ack() below
149 */ 149 */
150static void arc_timer_event_setup(unsigned int limit) 150static void arc_timer_event_setup(unsigned int cycles)
151{ 151{
152 write_aux_reg(ARC_REG_TIMER0_LIMIT, limit); 152 write_aux_reg(ARC_REG_TIMER0_LIMIT, cycles);
153 write_aux_reg(ARC_REG_TIMER0_CNT, 0); /* start from 0 */ 153 write_aux_reg(ARC_REG_TIMER0_CNT, 0); /* start from 0 */
154 154
155 write_aux_reg(ARC_REG_TIMER0_CTRL, TIMER_CTRL_IE | TIMER_CTRL_NH); 155 write_aux_reg(ARC_REG_TIMER0_CTRL, TIMER_CTRL_IE | TIMER_CTRL_NH);
@@ -168,6 +168,10 @@ static void arc_clkevent_set_mode(enum clock_event_mode mode,
168{ 168{
169 switch (mode) { 169 switch (mode) {
170 case CLOCK_EVT_MODE_PERIODIC: 170 case CLOCK_EVT_MODE_PERIODIC:
171 /*
172 * At X Hz, 1 sec = 1000ms -> X cycles;
173 * 10ms -> X / 100 cycles
174 */
171 arc_timer_event_setup(arc_get_core_freq() / HZ); 175 arc_timer_event_setup(arc_get_core_freq() / HZ);
172 break; 176 break;
173 case CLOCK_EVT_MODE_ONESHOT: 177 case CLOCK_EVT_MODE_ONESHOT:
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 79bfc81358c9..d572f1c2c724 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -220,9 +220,9 @@ ex_saved_reg1:
220 220
221.macro CONV_PTE_TO_TLB 221.macro CONV_PTE_TO_TLB
222 and r3, r0, PTE_BITS_RWX ; r w x 222 and r3, r0, PTE_BITS_RWX ; r w x
223 lsl r2, r3, 3 ; r w x 0 0 0 223 lsl r2, r3, 3 ; r w x 0 0 0 (GLOBAL, kernel only)
224 and.f 0, r0, _PAGE_GLOBAL 224 and.f 0, r0, _PAGE_GLOBAL
225 or.z r2, r2, r3 ; r w x r w x 225 or.z r2, r2, r3 ; r w x r w x (!GLOBAL, user page)
226 226
227 and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE 227 and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE
228 or r3, r3, r2 228 or r3, r3, r2