diff options
-rw-r--r-- | drivers/net/wireless/ath5k/hw.c | 37 |
1 files changed, 31 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath5k/hw.c b/drivers/net/wireless/ath5k/hw.c index b275b1f234a5..3c399604f30e 100644 --- a/drivers/net/wireless/ath5k/hw.c +++ b/drivers/net/wireless/ath5k/hw.c | |||
@@ -724,15 +724,26 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
724 | /* | 724 | /* |
725 | * Write some more initial register settings | 725 | * Write some more initial register settings |
726 | */ | 726 | */ |
727 | if (ah->ah_version > AR5K_AR5211){ /* found on 5213+ */ | 727 | if (ah->ah_version == AR5K_AR5212) { |
728 | ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11)); | 728 | ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11)); |
729 | 729 | ||
730 | if (channel->hw_value == CHANNEL_G) | 730 | if (channel->hw_value == CHANNEL_G) |
731 | ath5k_hw_reg_write(ah, 0x00f80d80, AR5K_PHY(83)); /* 0x00fc0ec0 */ | 731 | if (ah->ah_mac_srev < AR5K_SREV_VER_AR2413) |
732 | ath5k_hw_reg_write(ah, 0x00f80d80, | ||
733 | AR5K_PHY(83)); | ||
734 | else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2424) | ||
735 | ath5k_hw_reg_write(ah, 0x00380140, | ||
736 | AR5K_PHY(83)); | ||
737 | else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2425) | ||
738 | ath5k_hw_reg_write(ah, 0x00fc0ec0, | ||
739 | AR5K_PHY(83)); | ||
740 | else /* 2425 */ | ||
741 | ath5k_hw_reg_write(ah, 0x00fc0fc0, | ||
742 | AR5K_PHY(83)); | ||
732 | else | 743 | else |
733 | ath5k_hw_reg_write(ah, 0x00000000, AR5K_PHY(83)); | 744 | ath5k_hw_reg_write(ah, 0x00000000, |
745 | AR5K_PHY(83)); | ||
734 | 746 | ||
735 | ath5k_hw_reg_write(ah, 0x000001b5, 0xa228); /* 0x000009b5 */ | ||
736 | ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); | 747 | ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); |
737 | ath5k_hw_reg_write(ah, 0x0000000f, 0x8060); | 748 | ath5k_hw_reg_write(ah, 0x0000000f, 0x8060); |
738 | ath5k_hw_reg_write(ah, 0x00000000, 0xa254); | 749 | ath5k_hw_reg_write(ah, 0x00000000, 0xa254); |
@@ -1015,6 +1026,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
1015 | 1026 | ||
1016 | /* | 1027 | /* |
1017 | * Set the 32MHz reference clock on 5212 phy clock sleep register | 1028 | * Set the 32MHz reference clock on 5212 phy clock sleep register |
1029 | * | ||
1030 | * TODO: Find out how to switch to external 32Khz clock to save power | ||
1018 | */ | 1031 | */ |
1019 | if (ah->ah_version == AR5K_AR5212) { | 1032 | if (ah->ah_version == AR5K_AR5212) { |
1020 | ath5k_hw_reg_write(ah, AR5K_PHY_SCR_32MHZ, AR5K_PHY_SCR); | 1033 | ath5k_hw_reg_write(ah, AR5K_PHY_SCR_32MHZ, AR5K_PHY_SCR); |
@@ -1025,6 +1038,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
1025 | ath5k_hw_reg_write(ah, ah->ah_phy_spending, AR5K_PHY_SPENDING); | 1038 | ath5k_hw_reg_write(ah, ah->ah_phy_spending, AR5K_PHY_SPENDING); |
1026 | } | 1039 | } |
1027 | 1040 | ||
1041 | if (ah->ah_version == AR5K_AR5212) { | ||
1042 | ath5k_hw_reg_write(ah, 0x000100aa, 0x8118); | ||
1043 | ath5k_hw_reg_write(ah, 0x00003210, 0x811c); | ||
1044 | ath5k_hw_reg_write(ah, 0x00000052, 0x8108); | ||
1045 | if (ah->ah_mac_srev >= AR5K_SREV_VER_AR2413) | ||
1046 | ath5k_hw_reg_write(ah, 0x00000004, 0x8120); | ||
1047 | } | ||
1048 | |||
1028 | /* | 1049 | /* |
1029 | * Disable beacons and reset the register | 1050 | * Disable beacons and reset the register |
1030 | */ | 1051 | */ |
@@ -2269,8 +2290,8 @@ void ath5k_hw_set_associd(struct ath5k_hw *ah, const u8 *bssid, u16 assoc_id) | |||
2269 | * Set simple BSSID mask on 5212 | 2290 | * Set simple BSSID mask on 5212 |
2270 | */ | 2291 | */ |
2271 | if (ah->ah_version == AR5K_AR5212) { | 2292 | if (ah->ah_version == AR5K_AR5212) { |
2272 | ath5k_hw_reg_write(ah, 0xfffffff, AR5K_BSS_IDM0); | 2293 | ath5k_hw_reg_write(ah, 0xffffffff, AR5K_BSS_IDM0); |
2273 | ath5k_hw_reg_write(ah, 0xfffffff, AR5K_BSS_IDM1); | 2294 | ath5k_hw_reg_write(ah, 0xffffffff, AR5K_BSS_IDM1); |
2274 | } | 2295 | } |
2275 | 2296 | ||
2276 | /* | 2297 | /* |
@@ -2415,6 +2436,8 @@ void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah) | |||
2415 | { | 2436 | { |
2416 | ATH5K_TRACE(ah->ah_sc); | 2437 | ATH5K_TRACE(ah->ah_sc); |
2417 | AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); | 2438 | AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); |
2439 | |||
2440 | /* TODO: ANI Support */ | ||
2418 | } | 2441 | } |
2419 | 2442 | ||
2420 | /* | 2443 | /* |
@@ -2424,6 +2447,8 @@ void ath5k_hw_stop_pcu_recv(struct ath5k_hw *ah) | |||
2424 | { | 2447 | { |
2425 | ATH5K_TRACE(ah->ah_sc); | 2448 | ATH5K_TRACE(ah->ah_sc); |
2426 | AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); | 2449 | AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX); |
2450 | |||
2451 | /* TODO: ANI Support */ | ||
2427 | } | 2452 | } |
2428 | 2453 | ||
2429 | /* | 2454 | /* |