diff options
| -rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 24036c440440..ce2ef5bec4f2 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi | |||
| @@ -30,7 +30,6 @@ | |||
| 30 | /* kHz uV */ | 30 | /* kHz uV */ |
| 31 | 666667 1000000 | 31 | 666667 1000000 |
| 32 | 333334 1000000 | 32 | 333334 1000000 |
| 33 | 222223 1000000 | ||
| 34 | >; | 33 | >; |
| 35 | }; | 34 | }; |
| 36 | 35 | ||
| @@ -65,7 +64,7 @@ | |||
| 65 | interrupt-parent = <&intc>; | 64 | interrupt-parent = <&intc>; |
| 66 | ranges; | 65 | ranges; |
| 67 | 66 | ||
| 68 | adc@f8007100 { | 67 | adc: adc@f8007100 { |
| 69 | compatible = "xlnx,zynq-xadc-1.00.a"; | 68 | compatible = "xlnx,zynq-xadc-1.00.a"; |
| 70 | reg = <0xf8007100 0x20>; | 69 | reg = <0xf8007100 0x20>; |
| 71 | interrupts = <0 7 4>; | 70 | interrupts = <0 7 4>; |
| @@ -137,7 +136,7 @@ | |||
| 137 | <0xF8F00100 0x100>; | 136 | <0xF8F00100 0x100>; |
| 138 | }; | 137 | }; |
| 139 | 138 | ||
| 140 | L2: cache-controller { | 139 | L2: cache-controller@f8f02000 { |
| 141 | compatible = "arm,pl310-cache"; | 140 | compatible = "arm,pl310-cache"; |
| 142 | reg = <0xF8F02000 0x1000>; | 141 | reg = <0xF8F02000 0x1000>; |
| 143 | arm,data-latency = <3 2 2>; | 142 | arm,data-latency = <3 2 2>; |
| @@ -146,10 +145,10 @@ | |||
| 146 | cache-level = <2>; | 145 | cache-level = <2>; |
| 147 | }; | 146 | }; |
| 148 | 147 | ||
| 149 | memory-controller@f8006000 { | 148 | mc: memory-controller@f8006000 { |
| 150 | compatible = "xlnx,zynq-ddrc-a05"; | 149 | compatible = "xlnx,zynq-ddrc-a05"; |
| 151 | reg = <0xf8006000 0x1000>; | 150 | reg = <0xf8006000 0x1000>; |
| 152 | } ; | 151 | }; |
| 153 | 152 | ||
| 154 | uart0: serial@e0000000 { | 153 | uart0: serial@e0000000 { |
| 155 | compatible = "xlnx,xuartps", "cdns,uart-r1p8"; | 154 | compatible = "xlnx,xuartps", "cdns,uart-r1p8"; |
| @@ -195,7 +194,7 @@ | |||
| 195 | 194 | ||
| 196 | gem0: ethernet@e000b000 { | 195 | gem0: ethernet@e000b000 { |
| 197 | compatible = "cdns,gem"; | 196 | compatible = "cdns,gem"; |
| 198 | reg = <0xe000b000 0x4000>; | 197 | reg = <0xe000b000 0x1000>; |
| 199 | status = "disabled"; | 198 | status = "disabled"; |
| 200 | interrupts = <0 22 4>; | 199 | interrupts = <0 22 4>; |
| 201 | clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; | 200 | clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; |
| @@ -206,7 +205,7 @@ | |||
| 206 | 205 | ||
| 207 | gem1: ethernet@e000c000 { | 206 | gem1: ethernet@e000c000 { |
| 208 | compatible = "cdns,gem"; | 207 | compatible = "cdns,gem"; |
| 209 | reg = <0xe000c000 0x4000>; | 208 | reg = <0xe000c000 0x1000>; |
| 210 | status = "disabled"; | 209 | status = "disabled"; |
| 211 | interrupts = <0 45 4>; | 210 | interrupts = <0 45 4>; |
| 212 | clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; | 211 | clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; |
| @@ -315,5 +314,16 @@ | |||
| 315 | reg = <0xf8f00600 0x20>; | 314 | reg = <0xf8f00600 0x20>; |
| 316 | clocks = <&clkc 4>; | 315 | clocks = <&clkc 4>; |
| 317 | }; | 316 | }; |
| 317 | |||
| 318 | watchdog0: watchdog@f8005000 { | ||
| 319 | clocks = <&clkc 45>; | ||
| 320 | compatible = "xlnx,zynq-wdt-r1p2"; | ||
| 321 | device_type = "watchdog"; | ||
| 322 | interrupt-parent = <&intc>; | ||
| 323 | interrupts = <0 9 1>; | ||
| 324 | reg = <0xf8005000 0x1000>; | ||
| 325 | reset = <0>; | ||
| 326 | timeout-sec = <10>; | ||
| 327 | }; | ||
| 318 | }; | 328 | }; |
| 319 | }; | 329 | }; |
