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-rw-r--r--arch/sh/Kconfig3
-rw-r--r--arch/sh/boards/Kconfig16
-rw-r--r--arch/sh/boards/Makefile2
-rw-r--r--arch/sh/boards/board-sh2007.c133
-rw-r--r--arch/sh/boards/board-sh7757lcr.c374
-rw-r--r--arch/sh/configs/sh2007_defconfig1357
-rw-r--r--arch/sh/configs/sh7757lcr_defconfig1126
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c2
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c2
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c2
-rw-r--r--arch/sh/include/asm/Kbuild2
-rw-r--r--arch/sh/include/asm/elf.h27
-rw-r--r--arch/sh/include/asm/fixmap.h4
-rw-r--r--arch/sh/include/asm/irq.h2
-rw-r--r--arch/sh/include/asm/kprobes.h1
-rw-r--r--arch/sh/include/asm/processor_32.h3
-rw-r--r--arch/sh/include/asm/processor_64.h3
-rw-r--r--arch/sh/include/asm/ptrace.h169
-rw-r--r--arch/sh/include/asm/ptrace_32.h83
-rw-r--r--arch/sh/include/asm/ptrace_64.h20
-rw-r--r--arch/sh/include/asm/system_32.h13
-rw-r--r--arch/sh/include/asm/tlbflush.h2
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7757.h301
-rw-r--r--arch/sh/include/mach-common/mach/sh2007.h117
-rw-r--r--arch/sh/kernel/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c199
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c1582
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c222
-rw-r--r--arch/sh/kernel/kprobes.c100
-rw-r--r--arch/sh/kernel/ptrace.c33
-rw-r--r--arch/sh/kernel/ptrace_32.c27
-rw-r--r--arch/sh/kernel/ptrace_64.c79
-rw-r--r--arch/sh/kernel/reboot.c4
-rw-r--r--arch/sh/mm/init.c52
-rw-r--r--arch/sh/mm/tlbflush_32.c16
-rw-r--r--arch/sh/mm/tlbflush_64.c5
-rw-r--r--arch/sh/tools/mach-types2
-rw-r--r--drivers/Makefile2
-rw-r--r--drivers/serial/sh-sci.h17
-rw-r--r--drivers/sh/clk.c17
41 files changed, 4951 insertions, 1174 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 82868fee21fd..c91934186896 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -23,6 +23,7 @@ config SUPERH
23 select HAVE_KERNEL_LZMA 23 select HAVE_KERNEL_LZMA
24 select HAVE_KERNEL_LZO 24 select HAVE_KERNEL_LZO
25 select HAVE_SYSCALL_TRACEPOINTS 25 select HAVE_SYSCALL_TRACEPOINTS
26 select HAVE_REGS_AND_STACK_ACCESS_API
26 select RTC_LIB 27 select RTC_LIB
27 select GENERIC_ATOMIC64 28 select GENERIC_ATOMIC64
28 help 29 help
@@ -572,7 +573,7 @@ config SH_CLK_CPG
572config SH_CLK_CPG_LEGACY 573config SH_CLK_CPG_LEGACY
573 depends on SH_CLK_CPG 574 depends on SH_CLK_CPG
574 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 575 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
575 !CPU_SUBTYPE_SH7786 576 !CPU_SUBTYPE_SH7786 && !CPU_SUBTYPE_SH7757
576 577
577config SH_CLK_MD 578config SH_CLK_MD
578 int "CPU Mode Pin Setting" 579 int "CPU Mode Pin Setting"
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 07b35ca2f644..90ed1ec6921d 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -165,6 +165,11 @@ config SH_HIGHLANDER
165 select SYS_SUPPORTS_PCI 165 select SYS_SUPPORTS_PCI
166 select IO_TRAPPED if MMU 166 select IO_TRAPPED if MMU
167 167
168config SH_SH7757LCR
169 bool "SH7757LCR"
170 depends on CPU_SUBTYPE_SH7757
171 select ARCH_REQUIRE_GPIOLIB
172
168config SH_SH7785LCR 173config SH_SH7785LCR
169 bool "SH7785LCR" 174 bool "SH7785LCR"
170 depends on CPU_SUBTYPE_SH7785 175 depends on CPU_SUBTYPE_SH7785
@@ -309,6 +314,17 @@ config SH_POLARIS
309 help 314 help
310 Select if configuring for an SMSC Polaris development board 315 Select if configuring for an SMSC Polaris development board
311 316
317config SH_SH2007
318 bool "SH-2007 board"
319 select NO_IOPORT
320 depends on CPU_SUBTYPE_SH7780
321 help
322 SH-2007 is a single-board computer based around SH7780 chip
323 intended for embedded applications.
324 It has an Ethernet interface (SMC9118), direct connected
325 Compact Flash socket, two serial ports and PC-104 bus.
326 More information at <http://sh2000.sh-linux.org>.
327
312endmenu 328endmenu
313 329
314source "arch/sh/boards/mach-r2d/Kconfig" 330source "arch/sh/boards/mach-r2d/Kconfig"
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 4f90f9b7a922..38ef655cc0f0 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -2,6 +2,7 @@
2# Specific board support, not covered by a mach group. 2# Specific board support, not covered by a mach group.
3# 3#
4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
5obj-$(CONFIG_SH_SH2007) += board-sh2007.o
5obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
6obj-$(CONFIG_SH_URQUELL) += board-urquell.o 7obj-$(CONFIG_SH_URQUELL) += board-urquell.o
7obj-$(CONFIG_SH_SHMIN) += board-shmin.o 8obj-$(CONFIG_SH_SHMIN) += board-shmin.o
@@ -9,3 +10,4 @@ obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
9obj-$(CONFIG_SH_ESPT) += board-espt.o 10obj-$(CONFIG_SH_ESPT) += board-espt.o
10obj-$(CONFIG_SH_POLARIS) += board-polaris.o 11obj-$(CONFIG_SH_POLARIS) += board-polaris.o
11obj-$(CONFIG_SH_TITAN) += board-titan.o 12obj-$(CONFIG_SH_TITAN) += board-titan.o
13obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o
diff --git a/arch/sh/boards/board-sh2007.c b/arch/sh/boards/board-sh2007.c
new file mode 100644
index 000000000000..b90b78f6a829
--- /dev/null
+++ b/arch/sh/boards/board-sh2007.c
@@ -0,0 +1,133 @@
1/*
2 * SH-2007 board support.
3 *
4 * Copyright (C) 2003, 2004 SUGIOKA Toshinobu
5 * Copyright (C) 2010 Hitoshi Mitake <mitake@dcl.info.waseda.ac.jp>
6 */
7#include <linux/init.h>
8#include <linux/irq.h>
9#include <linux/smsc911x.h>
10#include <linux/platform_device.h>
11#include <linux/ata_platform.h>
12#include <linux/io.h>
13#include <asm/machvec.h>
14#include <mach/sh2007.h>
15
16struct smsc911x_platform_config smc911x_info = {
17 .flags = SMSC911X_USE_32BIT,
18 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
19 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
20};
21
22static struct resource smsc9118_0_resources[] = {
23 [0] = {
24 .start = SMC0_BASE,
25 .end = SMC0_BASE + 0xff,
26 .flags = IORESOURCE_MEM,
27 },
28 [1] = {
29 .start = evt2irq(0x240),
30 .end = evt2irq(0x240),
31 .flags = IORESOURCE_IRQ,
32 }
33};
34
35static struct resource smsc9118_1_resources[] = {
36 [0] = {
37 .start = SMC1_BASE,
38 .end = SMC1_BASE + 0xff,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = evt2irq(0x280),
43 .end = evt2irq(0x280),
44 .flags = IORESOURCE_IRQ,
45 }
46};
47
48static struct platform_device smsc9118_0_device = {
49 .name = "smsc911x",
50 .id = 0,
51 .num_resources = ARRAY_SIZE(smsc9118_0_resources),
52 .resource = smsc9118_0_resources,
53 .dev = {
54 .platform_data = &smc911x_info,
55 },
56};
57
58static struct platform_device smsc9118_1_device = {
59 .name = "smsc911x",
60 .id = 1,
61 .num_resources = ARRAY_SIZE(smsc9118_1_resources),
62 .resource = smsc9118_1_resources,
63 .dev = {
64 .platform_data = &smc911x_info,
65 },
66};
67
68static struct resource cf_resources[] = {
69 [0] = {
70 .start = CF_BASE + CF_OFFSET,
71 .end = CF_BASE + CF_OFFSET + 0x0f,
72 .flags = IORESOURCE_MEM,
73 },
74 [1] = {
75 .start = CF_BASE + CF_OFFSET + 0x206,
76 .end = CF_BASE + CF_OFFSET + 0x20f,
77 .flags = IORESOURCE_MEM,
78 },
79 [2] = {
80 .start = evt2irq(0x2c0),
81 .end = evt2irq(0x2c0),
82 .flags = IORESOURCE_IRQ,
83 },
84};
85
86static struct platform_device cf_device = {
87 .name = "pata_platform",
88 .id = 0,
89 .num_resources = ARRAY_SIZE(cf_resources),
90 .resource = cf_resources,
91};
92
93static struct platform_device *sh2007_devices[] __initdata = {
94 &smsc9118_0_device,
95 &smsc9118_1_device,
96 &cf_device,
97};
98
99static int __init sh2007_io_init(void)
100{
101 platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices));
102 return 0;
103}
104subsys_initcall(sh2007_io_init);
105
106static void __init sh2007_init_irq(void)
107{
108 plat_irq_setup_pins(IRQ_MODE_IRQ);
109}
110
111/*
112 * Initialize the board
113 */
114static void __init sh2007_setup(char **cmdline_p)
115{
116 printk(KERN_INFO "SH-2007 Setup...");
117
118 /* setup wait control registers for area 5 */
119 __raw_writel(CS5BCR_D, CS5BCR);
120 __raw_writel(CS5WCR_D, CS5WCR);
121 __raw_writel(CS5PCR_D, CS5PCR);
122
123 printk(KERN_INFO " done.\n");
124}
125
126/*
127 * The Machine Vector
128 */
129struct sh_machine_vector mv_sh2007 __initmv = {
130 .mv_setup = sh2007_setup,
131 .mv_name = "sh2007",
132 .mv_init_irq = sh2007_init_irq,
133};
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
new file mode 100644
index 000000000000..c475f1056ab4
--- /dev/null
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -0,0 +1,374 @@
1/*
2 * Renesas R0P7757LC0012RL Support.
3 *
4 * Copyright (C) 2009 - 2010 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/gpio.h>
14#include <linux/irq.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17#include <linux/io.h>
18#include <cpu/sh7757.h>
19#include <asm/sh_eth.h>
20#include <asm/heartbeat.h>
21
22static struct resource heartbeat_resource = {
23 .start = 0xffec005c, /* PUDR */
24 .end = 0xffec005c,
25 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
26};
27
28static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
29
30static struct heartbeat_data heartbeat_data = {
31 .bit_pos = heartbeat_bit_pos,
32 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
33 .flags = HEARTBEAT_INVERTED,
34};
35
36static struct platform_device heartbeat_device = {
37 .name = "heartbeat",
38 .id = -1,
39 .dev = {
40 .platform_data = &heartbeat_data,
41 },
42 .num_resources = 1,
43 .resource = &heartbeat_resource,
44};
45
46/* Fast Ethernet */
47static struct resource sh_eth0_resources[] = {
48 {
49 .start = 0xfef00000,
50 .end = 0xfef001ff,
51 .flags = IORESOURCE_MEM,
52 }, {
53 .start = 84,
54 .end = 84,
55 .flags = IORESOURCE_IRQ,
56 },
57};
58
59static struct sh_eth_plat_data sh7757_eth0_pdata = {
60 .phy = 1,
61 .edmac_endian = EDMAC_LITTLE_ENDIAN,
62};
63
64static struct platform_device sh7757_eth0_device = {
65 .name = "sh-eth",
66 .resource = sh_eth0_resources,
67 .id = 0,
68 .num_resources = ARRAY_SIZE(sh_eth0_resources),
69 .dev = {
70 .platform_data = &sh7757_eth0_pdata,
71 },
72};
73
74static struct resource sh_eth1_resources[] = {
75 {
76 .start = 0xfef00800,
77 .end = 0xfef009ff,
78 .flags = IORESOURCE_MEM,
79 }, {
80 .start = 84,
81 .end = 84,
82 .flags = IORESOURCE_IRQ,
83 },
84};
85
86static struct sh_eth_plat_data sh7757_eth1_pdata = {
87 .phy = 1,
88 .edmac_endian = EDMAC_LITTLE_ENDIAN,
89};
90
91static struct platform_device sh7757_eth1_device = {
92 .name = "sh-eth",
93 .resource = sh_eth1_resources,
94 .id = 1,
95 .num_resources = ARRAY_SIZE(sh_eth1_resources),
96 .dev = {
97 .platform_data = &sh7757_eth1_pdata,
98 },
99};
100
101static struct platform_device *sh7757lcr_devices[] __initdata = {
102 &heartbeat_device,
103 &sh7757_eth0_device,
104 &sh7757_eth1_device,
105};
106
107static int __init sh7757lcr_devices_setup(void)
108{
109 /* RGMII (PTA) */
110 gpio_request(GPIO_FN_ET0_MDC, NULL);
111 gpio_request(GPIO_FN_ET0_MDIO, NULL);
112 gpio_request(GPIO_FN_ET1_MDC, NULL);
113 gpio_request(GPIO_FN_ET1_MDIO, NULL);
114
115 /* ONFI (PTB, PTZ) */
116 gpio_request(GPIO_FN_ON_NRE, NULL);
117 gpio_request(GPIO_FN_ON_NWE, NULL);
118 gpio_request(GPIO_FN_ON_NWP, NULL);
119 gpio_request(GPIO_FN_ON_NCE0, NULL);
120 gpio_request(GPIO_FN_ON_R_B0, NULL);
121 gpio_request(GPIO_FN_ON_ALE, NULL);
122 gpio_request(GPIO_FN_ON_CLE, NULL);
123
124 gpio_request(GPIO_FN_ON_DQ7, NULL);
125 gpio_request(GPIO_FN_ON_DQ6, NULL);
126 gpio_request(GPIO_FN_ON_DQ5, NULL);
127 gpio_request(GPIO_FN_ON_DQ4, NULL);
128 gpio_request(GPIO_FN_ON_DQ3, NULL);
129 gpio_request(GPIO_FN_ON_DQ2, NULL);
130 gpio_request(GPIO_FN_ON_DQ1, NULL);
131 gpio_request(GPIO_FN_ON_DQ0, NULL);
132
133 /* IRQ8 to 0 (PTB, PTC) */
134 gpio_request(GPIO_FN_IRQ8, NULL);
135 gpio_request(GPIO_FN_IRQ7, NULL);
136 gpio_request(GPIO_FN_IRQ6, NULL);
137 gpio_request(GPIO_FN_IRQ5, NULL);
138 gpio_request(GPIO_FN_IRQ4, NULL);
139 gpio_request(GPIO_FN_IRQ3, NULL);
140 gpio_request(GPIO_FN_IRQ2, NULL);
141 gpio_request(GPIO_FN_IRQ1, NULL);
142 gpio_request(GPIO_FN_IRQ0, NULL);
143
144 /* SPI0 (PTD) */
145 gpio_request(GPIO_FN_SP0_MOSI, NULL);
146 gpio_request(GPIO_FN_SP0_MISO, NULL);
147 gpio_request(GPIO_FN_SP0_SCK, NULL);
148 gpio_request(GPIO_FN_SP0_SCK_FB, NULL);
149 gpio_request(GPIO_FN_SP0_SS0, NULL);
150 gpio_request(GPIO_FN_SP0_SS1, NULL);
151 gpio_request(GPIO_FN_SP0_SS2, NULL);
152 gpio_request(GPIO_FN_SP0_SS3, NULL);
153
154 /* RMII 0/1 (PTE, PTF) */
155 gpio_request(GPIO_FN_RMII0_CRS_DV, NULL);
156 gpio_request(GPIO_FN_RMII0_TXD1, NULL);
157 gpio_request(GPIO_FN_RMII0_TXD0, NULL);
158 gpio_request(GPIO_FN_RMII0_TXEN, NULL);
159 gpio_request(GPIO_FN_RMII0_REFCLK, NULL);
160 gpio_request(GPIO_FN_RMII0_RXD1, NULL);
161 gpio_request(GPIO_FN_RMII0_RXD0, NULL);
162 gpio_request(GPIO_FN_RMII0_RX_ER, NULL);
163 gpio_request(GPIO_FN_RMII1_CRS_DV, NULL);
164 gpio_request(GPIO_FN_RMII1_TXD1, NULL);
165 gpio_request(GPIO_FN_RMII1_TXD0, NULL);
166 gpio_request(GPIO_FN_RMII1_TXEN, NULL);
167 gpio_request(GPIO_FN_RMII1_REFCLK, NULL);
168 gpio_request(GPIO_FN_RMII1_RXD1, NULL);
169 gpio_request(GPIO_FN_RMII1_RXD0, NULL);
170 gpio_request(GPIO_FN_RMII1_RX_ER, NULL);
171
172 /* eMMC (PTG) */
173 gpio_request(GPIO_FN_MMCCLK, NULL);
174 gpio_request(GPIO_FN_MMCCMD, NULL);
175 gpio_request(GPIO_FN_MMCDAT7, NULL);
176 gpio_request(GPIO_FN_MMCDAT6, NULL);
177 gpio_request(GPIO_FN_MMCDAT5, NULL);
178 gpio_request(GPIO_FN_MMCDAT4, NULL);
179 gpio_request(GPIO_FN_MMCDAT3, NULL);
180 gpio_request(GPIO_FN_MMCDAT2, NULL);
181 gpio_request(GPIO_FN_MMCDAT1, NULL);
182 gpio_request(GPIO_FN_MMCDAT0, NULL);
183
184 /* LPC (PTG, PTH, PTQ, PTU) */
185 gpio_request(GPIO_FN_SERIRQ, NULL);
186 gpio_request(GPIO_FN_LPCPD, NULL);
187 gpio_request(GPIO_FN_LDRQ, NULL);
188 gpio_request(GPIO_FN_WP, NULL);
189 gpio_request(GPIO_FN_FMS0, NULL);
190 gpio_request(GPIO_FN_LAD3, NULL);
191 gpio_request(GPIO_FN_LAD2, NULL);
192 gpio_request(GPIO_FN_LAD1, NULL);
193 gpio_request(GPIO_FN_LAD0, NULL);
194 gpio_request(GPIO_FN_LFRAME, NULL);
195 gpio_request(GPIO_FN_LRESET, NULL);
196 gpio_request(GPIO_FN_LCLK, NULL);
197 gpio_request(GPIO_FN_LGPIO7, NULL);
198 gpio_request(GPIO_FN_LGPIO6, NULL);
199 gpio_request(GPIO_FN_LGPIO5, NULL);
200 gpio_request(GPIO_FN_LGPIO4, NULL);
201
202 /* SPI1 (PTH) */
203 gpio_request(GPIO_FN_SP1_MOSI, NULL);
204 gpio_request(GPIO_FN_SP1_MISO, NULL);
205 gpio_request(GPIO_FN_SP1_SCK, NULL);
206 gpio_request(GPIO_FN_SP1_SCK_FB, NULL);
207 gpio_request(GPIO_FN_SP1_SS0, NULL);
208 gpio_request(GPIO_FN_SP1_SS1, NULL);
209
210 /* SDHI (PTI) */
211 gpio_request(GPIO_FN_SD_WP, NULL);
212 gpio_request(GPIO_FN_SD_CD, NULL);
213 gpio_request(GPIO_FN_SD_CLK, NULL);
214 gpio_request(GPIO_FN_SD_CMD, NULL);
215 gpio_request(GPIO_FN_SD_D3, NULL);
216 gpio_request(GPIO_FN_SD_D2, NULL);
217 gpio_request(GPIO_FN_SD_D1, NULL);
218 gpio_request(GPIO_FN_SD_D0, NULL);
219
220 /* SCIF3/4 (PTJ, PTW) */
221 gpio_request(GPIO_FN_RTS3, NULL);
222 gpio_request(GPIO_FN_CTS3, NULL);
223 gpio_request(GPIO_FN_TXD3, NULL);
224 gpio_request(GPIO_FN_RXD3, NULL);
225 gpio_request(GPIO_FN_RTS4, NULL);
226 gpio_request(GPIO_FN_RXD4, NULL);
227 gpio_request(GPIO_FN_TXD4, NULL);
228 gpio_request(GPIO_FN_CTS4, NULL);
229
230 /* SERMUX (PTK, PTL, PTO, PTV) */
231 gpio_request(GPIO_FN_COM2_TXD, NULL);
232 gpio_request(GPIO_FN_COM2_RXD, NULL);
233 gpio_request(GPIO_FN_COM2_RTS, NULL);
234 gpio_request(GPIO_FN_COM2_CTS, NULL);
235 gpio_request(GPIO_FN_COM2_DTR, NULL);
236 gpio_request(GPIO_FN_COM2_DSR, NULL);
237 gpio_request(GPIO_FN_COM2_DCD, NULL);
238 gpio_request(GPIO_FN_COM2_RI, NULL);
239 gpio_request(GPIO_FN_RAC_RXD, NULL);
240 gpio_request(GPIO_FN_RAC_RTS, NULL);
241 gpio_request(GPIO_FN_RAC_CTS, NULL);
242 gpio_request(GPIO_FN_RAC_DTR, NULL);
243 gpio_request(GPIO_FN_RAC_DSR, NULL);
244 gpio_request(GPIO_FN_RAC_DCD, NULL);
245 gpio_request(GPIO_FN_RAC_TXD, NULL);
246 gpio_request(GPIO_FN_COM1_TXD, NULL);
247 gpio_request(GPIO_FN_COM1_RXD, NULL);
248 gpio_request(GPIO_FN_COM1_RTS, NULL);
249 gpio_request(GPIO_FN_COM1_CTS, NULL);
250
251 writeb(0x10, 0xfe470000); /* SMR0: SerMux mode 0 */
252
253 /* IIC (PTM, PTR, PTS) */
254 gpio_request(GPIO_FN_SDA7, NULL);
255 gpio_request(GPIO_FN_SCL7, NULL);
256 gpio_request(GPIO_FN_SDA6, NULL);
257 gpio_request(GPIO_FN_SCL6, NULL);
258 gpio_request(GPIO_FN_SDA5, NULL);
259 gpio_request(GPIO_FN_SCL5, NULL);
260 gpio_request(GPIO_FN_SDA4, NULL);
261 gpio_request(GPIO_FN_SCL4, NULL);
262 gpio_request(GPIO_FN_SDA3, NULL);
263 gpio_request(GPIO_FN_SCL3, NULL);
264 gpio_request(GPIO_FN_SDA2, NULL);
265 gpio_request(GPIO_FN_SCL2, NULL);
266 gpio_request(GPIO_FN_SDA1, NULL);
267 gpio_request(GPIO_FN_SCL1, NULL);
268 gpio_request(GPIO_FN_SDA0, NULL);
269 gpio_request(GPIO_FN_SCL0, NULL);
270
271 /* USB (PTN) */
272 gpio_request(GPIO_FN_VBUS_EN, NULL);
273 gpio_request(GPIO_FN_VBUS_OC, NULL);
274
275 /* SGPIO1/0 (PTN, PTO) */
276 gpio_request(GPIO_FN_SGPIO1_CLK, NULL);
277 gpio_request(GPIO_FN_SGPIO1_LOAD, NULL);
278 gpio_request(GPIO_FN_SGPIO1_DI, NULL);
279 gpio_request(GPIO_FN_SGPIO1_DO, NULL);
280 gpio_request(GPIO_FN_SGPIO0_CLK, NULL);
281 gpio_request(GPIO_FN_SGPIO0_LOAD, NULL);
282 gpio_request(GPIO_FN_SGPIO0_DI, NULL);
283 gpio_request(GPIO_FN_SGPIO0_DO, NULL);
284
285 /* WDT (PTN) */
286 gpio_request(GPIO_FN_SUB_CLKIN, NULL);
287
288 /* System (PTT) */
289 gpio_request(GPIO_FN_STATUS1, NULL);
290 gpio_request(GPIO_FN_STATUS0, NULL);
291
292 /* PWMX (PTT) */
293 gpio_request(GPIO_FN_PWMX1, NULL);
294 gpio_request(GPIO_FN_PWMX0, NULL);
295
296 /* R-SPI (PTV) */
297 gpio_request(GPIO_FN_R_SPI_MOSI, NULL);
298 gpio_request(GPIO_FN_R_SPI_MISO, NULL);
299 gpio_request(GPIO_FN_R_SPI_RSPCK, NULL);
300 gpio_request(GPIO_FN_R_SPI_SSL0, NULL);
301 gpio_request(GPIO_FN_R_SPI_SSL1, NULL);
302
303 /* EVC (PTV, PTW) */
304 gpio_request(GPIO_FN_EVENT7, NULL);
305 gpio_request(GPIO_FN_EVENT6, NULL);
306 gpio_request(GPIO_FN_EVENT5, NULL);
307 gpio_request(GPIO_FN_EVENT4, NULL);
308 gpio_request(GPIO_FN_EVENT3, NULL);
309 gpio_request(GPIO_FN_EVENT2, NULL);
310 gpio_request(GPIO_FN_EVENT1, NULL);
311 gpio_request(GPIO_FN_EVENT0, NULL);
312
313 /* LED for heartbeat */
314 gpio_request(GPIO_PTU3, NULL);
315 gpio_direction_output(GPIO_PTU3, 1);
316 gpio_request(GPIO_PTU2, NULL);
317 gpio_direction_output(GPIO_PTU2, 1);
318 gpio_request(GPIO_PTU1, NULL);
319 gpio_direction_output(GPIO_PTU1, 1);
320 gpio_request(GPIO_PTU0, NULL);
321 gpio_direction_output(GPIO_PTU0, 1);
322
323 /* control for MDIO of Gigabit Ethernet */
324 gpio_request(GPIO_PTT4, NULL);
325 gpio_direction_output(GPIO_PTT4, 1);
326
327 /* control for eMMC */
328 gpio_request(GPIO_PTT7, NULL); /* eMMC_RST# */
329 gpio_direction_output(GPIO_PTT7, 0);
330 gpio_request(GPIO_PTT6, NULL); /* eMMC_INDEX# */
331 gpio_direction_output(GPIO_PTT6, 0);
332 gpio_request(GPIO_PTT5, NULL); /* eMMC_PRST# */
333 gpio_direction_output(GPIO_PTT5, 1);
334
335 /* General platform */
336 return platform_add_devices(sh7757lcr_devices,
337 ARRAY_SIZE(sh7757lcr_devices));
338}
339arch_initcall(sh7757lcr_devices_setup);
340
341/* Initialize IRQ setting */
342void __init init_sh7757lcr_IRQ(void)
343{
344 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
345 plat_irq_setup_pins(IRQ_MODE_IRQ3210);
346}
347
348/* Initialize the board */
349static void __init sh7757lcr_setup(char **cmdline_p)
350{
351 printk(KERN_INFO "Renesas R0P7757LC0012RL support.\n");
352}
353
354static int sh7757lcr_mode_pins(void)
355{
356 int value = 0;
357
358 /* These are the factory default settings of S3 (Low active).
359 * If you change these dip switches then you will need to
360 * adjust the values below as well.
361 */
362 value |= MODE_PIN0; /* Clock Mode: 1 */
363
364 return value;
365}
366
367/* The Machine Vector */
368static struct sh_machine_vector mv_sh7757lcr __initmv = {
369 .mv_name = "SH7757LCR",
370 .mv_setup = sh7757lcr_setup,
371 .mv_init_irq = init_sh7757lcr_IRQ,
372 .mv_mode_pins = sh7757lcr_mode_pins,
373};
374
diff --git a/arch/sh/configs/sh2007_defconfig b/arch/sh/configs/sh2007_defconfig
new file mode 100644
index 000000000000..adf7a6b05814
--- /dev/null
+++ b/arch/sh/configs/sh2007_defconfig
@@ -0,0 +1,1357 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.35-rc2
4# Fri Jun 18 19:46:14 2010
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18# CONFIG_GENERIC_GPIO is not set
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
24CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y
26CONFIG_LOCKDEP_SUPPORT=y
27CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U32 is not set
29# CONFIG_ARCH_HAS_ILOG2_U64 is not set
30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_NO_IOPORT=y
34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
36CONFIG_NEED_SG_DMA_LENGTH=y
37CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
38CONFIG_CONSTRUCTORS=y
39
40#
41# General setup
42#
43CONFIG_EXPERIMENTAL=y
44CONFIG_BROKEN_ON_SMP=y
45CONFIG_INIT_ENV_ARG_LIMIT=32
46CONFIG_CROSS_COMPILE=""
47CONFIG_LOCALVERSION=""
48# CONFIG_LOCALVERSION_AUTO is not set
49CONFIG_HAVE_KERNEL_GZIP=y
50CONFIG_HAVE_KERNEL_BZIP2=y
51CONFIG_HAVE_KERNEL_LZMA=y
52CONFIG_HAVE_KERNEL_LZO=y
53CONFIG_KERNEL_GZIP=y
54# CONFIG_KERNEL_BZIP2 is not set
55# CONFIG_KERNEL_LZMA is not set
56# CONFIG_KERNEL_LZO is not set
57CONFIG_SWAP=y
58CONFIG_SYSVIPC=y
59CONFIG_SYSVIPC_SYSCTL=y
60CONFIG_POSIX_MQUEUE=y
61CONFIG_POSIX_MQUEUE_SYSCTL=y
62CONFIG_BSD_PROCESS_ACCT=y
63# CONFIG_BSD_PROCESS_ACCT_V3 is not set
64# CONFIG_TASKSTATS is not set
65CONFIG_AUDIT=y
66CONFIG_AUDITSYSCALL=y
67CONFIG_AUDIT_TREE=y
68
69#
70# RCU Subsystem
71#
72CONFIG_TREE_RCU=y
73# CONFIG_TREE_PREEMPT_RCU is not set
74# CONFIG_TINY_RCU is not set
75# CONFIG_RCU_TRACE is not set
76CONFIG_RCU_FANOUT=32
77# CONFIG_RCU_FANOUT_EXACT is not set
78# CONFIG_TREE_RCU_TRACE is not set
79CONFIG_IKCONFIG=y
80# CONFIG_IKCONFIG_PROC is not set
81CONFIG_LOG_BUF_SHIFT=14
82# CONFIG_CGROUPS is not set
83CONFIG_SYSFS_DEPRECATED=y
84CONFIG_SYSFS_DEPRECATED_V2=y
85# CONFIG_RELAY is not set
86# CONFIG_NAMESPACES is not set
87# CONFIG_BLK_DEV_INITRD is not set
88# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
89CONFIG_SYSCTL=y
90CONFIG_ANON_INODES=y
91CONFIG_EMBEDDED=y
92CONFIG_UID16=y
93CONFIG_SYSCTL_SYSCALL=y
94CONFIG_KALLSYMS=y
95CONFIG_KALLSYMS_ALL=y
96# CONFIG_KALLSYMS_EXTRA_PASS is not set
97CONFIG_HOTPLUG=y
98CONFIG_PRINTK=y
99CONFIG_BUG=y
100CONFIG_ELF_CORE=y
101CONFIG_BASE_FULL=y
102CONFIG_FUTEX=y
103CONFIG_EPOLL=y
104CONFIG_SIGNALFD=y
105CONFIG_TIMERFD=y
106CONFIG_EVENTFD=y
107CONFIG_SHMEM=y
108CONFIG_AIO=y
109CONFIG_HAVE_PERF_EVENTS=y
110CONFIG_PERF_USE_VMALLOC=y
111
112#
113# Kernel Performance Events And Counters
114#
115CONFIG_PERF_EVENTS=y
116# CONFIG_PERF_COUNTERS is not set
117# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
118CONFIG_VM_EVENT_COUNTERS=y
119CONFIG_COMPAT_BRK=y
120CONFIG_SLAB=y
121# CONFIG_SLUB is not set
122# CONFIG_SLOB is not set
123# CONFIG_PROFILING is not set
124CONFIG_HAVE_OPROFILE=y
125CONFIG_HAVE_IOREMAP_PROT=y
126CONFIG_HAVE_KPROBES=y
127CONFIG_HAVE_KRETPROBES=y
128CONFIG_HAVE_ARCH_TRACEHOOK=y
129CONFIG_HAVE_DMA_ATTRS=y
130CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
131CONFIG_HAVE_CLK=y
132CONFIG_HAVE_DMA_API_DEBUG=y
133CONFIG_HAVE_HW_BREAKPOINT=y
134CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
135
136#
137# GCOV-based kernel profiling
138#
139# CONFIG_GCOV_KERNEL is not set
140# CONFIG_SLOW_WORK is not set
141CONFIG_HAVE_GENERIC_DMA_COHERENT=y
142CONFIG_SLABINFO=y
143CONFIG_RT_MUTEXES=y
144CONFIG_BASE_SMALL=0
145# CONFIG_MODULES is not set
146CONFIG_BLOCK=y
147CONFIG_LBDAF=y
148# CONFIG_BLK_DEV_BSG is not set
149# CONFIG_BLK_DEV_INTEGRITY is not set
150
151#
152# IO Schedulers
153#
154CONFIG_IOSCHED_NOOP=y
155CONFIG_IOSCHED_DEADLINE=y
156CONFIG_IOSCHED_CFQ=y
157# CONFIG_DEFAULT_DEADLINE is not set
158CONFIG_DEFAULT_CFQ=y
159# CONFIG_DEFAULT_NOOP is not set
160CONFIG_DEFAULT_IOSCHED="cfq"
161# CONFIG_INLINE_SPIN_TRYLOCK is not set
162# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
163# CONFIG_INLINE_SPIN_LOCK is not set
164# CONFIG_INLINE_SPIN_LOCK_BH is not set
165# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
166# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
167CONFIG_INLINE_SPIN_UNLOCK=y
168# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
169CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
170# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
171# CONFIG_INLINE_READ_TRYLOCK is not set
172# CONFIG_INLINE_READ_LOCK is not set
173# CONFIG_INLINE_READ_LOCK_BH is not set
174# CONFIG_INLINE_READ_LOCK_IRQ is not set
175# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
176CONFIG_INLINE_READ_UNLOCK=y
177# CONFIG_INLINE_READ_UNLOCK_BH is not set
178CONFIG_INLINE_READ_UNLOCK_IRQ=y
179# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
180# CONFIG_INLINE_WRITE_TRYLOCK is not set
181# CONFIG_INLINE_WRITE_LOCK is not set
182# CONFIG_INLINE_WRITE_LOCK_BH is not set
183# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
184# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
185CONFIG_INLINE_WRITE_UNLOCK=y
186# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
187CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
188# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
189# CONFIG_MUTEX_SPIN_ON_OWNER is not set
190# CONFIG_FREEZER is not set
191
192#
193# System type
194#
195CONFIG_CPU_SH4=y
196CONFIG_CPU_SH4A=y
197# CONFIG_CPU_SUBTYPE_SH7619 is not set
198# CONFIG_CPU_SUBTYPE_SH7201 is not set
199# CONFIG_CPU_SUBTYPE_SH7203 is not set
200# CONFIG_CPU_SUBTYPE_SH7206 is not set
201# CONFIG_CPU_SUBTYPE_SH7263 is not set
202# CONFIG_CPU_SUBTYPE_MXG is not set
203# CONFIG_CPU_SUBTYPE_SH7705 is not set
204# CONFIG_CPU_SUBTYPE_SH7706 is not set
205# CONFIG_CPU_SUBTYPE_SH7707 is not set
206# CONFIG_CPU_SUBTYPE_SH7708 is not set
207# CONFIG_CPU_SUBTYPE_SH7709 is not set
208# CONFIG_CPU_SUBTYPE_SH7710 is not set
209# CONFIG_CPU_SUBTYPE_SH7712 is not set
210# CONFIG_CPU_SUBTYPE_SH7720 is not set
211# CONFIG_CPU_SUBTYPE_SH7721 is not set
212# CONFIG_CPU_SUBTYPE_SH7750 is not set
213# CONFIG_CPU_SUBTYPE_SH7091 is not set
214# CONFIG_CPU_SUBTYPE_SH7750R is not set
215# CONFIG_CPU_SUBTYPE_SH7750S is not set
216# CONFIG_CPU_SUBTYPE_SH7751 is not set
217# CONFIG_CPU_SUBTYPE_SH7751R is not set
218# CONFIG_CPU_SUBTYPE_SH7760 is not set
219# CONFIG_CPU_SUBTYPE_SH4_202 is not set
220# CONFIG_CPU_SUBTYPE_SH7723 is not set
221# CONFIG_CPU_SUBTYPE_SH7724 is not set
222# CONFIG_CPU_SUBTYPE_SH7757 is not set
223# CONFIG_CPU_SUBTYPE_SH7763 is not set
224# CONFIG_CPU_SUBTYPE_SH7770 is not set
225CONFIG_CPU_SUBTYPE_SH7780=y
226# CONFIG_CPU_SUBTYPE_SH7785 is not set
227# CONFIG_CPU_SUBTYPE_SH7786 is not set
228# CONFIG_CPU_SUBTYPE_SHX3 is not set
229# CONFIG_CPU_SUBTYPE_SH7343 is not set
230# CONFIG_CPU_SUBTYPE_SH7722 is not set
231# CONFIG_CPU_SUBTYPE_SH7366 is not set
232
233#
234# Memory management options
235#
236CONFIG_QUICKLIST=y
237CONFIG_MMU=y
238CONFIG_PAGE_OFFSET=0x80000000
239CONFIG_FORCE_MAX_ZONEORDER=11
240CONFIG_MEMORY_START=0x08000000
241CONFIG_MEMORY_SIZE=0x08000000
242CONFIG_29BIT=y
243# CONFIG_PMB is not set
244# CONFIG_VSYSCALL is not set
245CONFIG_ARCH_FLATMEM_ENABLE=y
246CONFIG_ARCH_SPARSEMEM_ENABLE=y
247CONFIG_ARCH_SPARSEMEM_DEFAULT=y
248CONFIG_MAX_ACTIVE_REGIONS=1
249CONFIG_ARCH_POPULATES_NODE_MAP=y
250CONFIG_ARCH_SELECT_MEMORY_MODEL=y
251CONFIG_UNCACHED_MAPPING=y
252CONFIG_PAGE_SIZE_4KB=y
253# CONFIG_PAGE_SIZE_8KB is not set
254# CONFIG_PAGE_SIZE_16KB is not set
255# CONFIG_PAGE_SIZE_64KB is not set
256CONFIG_SELECT_MEMORY_MODEL=y
257CONFIG_FLATMEM_MANUAL=y
258# CONFIG_DISCONTIGMEM_MANUAL is not set
259# CONFIG_SPARSEMEM_MANUAL is not set
260CONFIG_FLATMEM=y
261CONFIG_FLAT_NODE_MEM_MAP=y
262CONFIG_SPARSEMEM_STATIC=y
263CONFIG_PAGEFLAGS_EXTENDED=y
264CONFIG_SPLIT_PTLOCK_CPUS=4
265# CONFIG_PHYS_ADDR_T_64BIT is not set
266CONFIG_ZONE_DMA_FLAG=0
267CONFIG_NR_QUICK=1
268# CONFIG_KSM is not set
269CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
270
271#
272# Cache configuration
273#
274CONFIG_CACHE_WRITEBACK=y
275# CONFIG_CACHE_WRITETHROUGH is not set
276# CONFIG_CACHE_OFF is not set
277
278#
279# Processor features
280#
281CONFIG_CPU_LITTLE_ENDIAN=y
282# CONFIG_CPU_BIG_ENDIAN is not set
283CONFIG_SH_FPU=y
284# CONFIG_SH_STORE_QUEUES is not set
285# CONFIG_SPECULATIVE_EXECUTION is not set
286CONFIG_CPU_HAS_INTEVT=y
287CONFIG_CPU_HAS_SR_RB=y
288CONFIG_CPU_HAS_FPU=y
289
290#
291# Board support
292#
293# CONFIG_SH_7780_SOLUTION_ENGINE is not set
294# CONFIG_SH_SDK7780 is not set
295# CONFIG_SH_HIGHLANDER is not set
296CONFIG_SH_SH2007=y
297
298#
299# Timer and clock configuration
300#
301CONFIG_SH_TIMER_TMU=y
302CONFIG_SH_PCLK_FREQ=50000000
303CONFIG_SH_CLK_CPG=y
304CONFIG_SH_CLK_CPG_LEGACY=y
305CONFIG_TICK_ONESHOT=y
306# CONFIG_NO_HZ is not set
307CONFIG_HIGH_RES_TIMERS=y
308CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
309
310#
311# CPU Frequency scaling
312#
313# CONFIG_CPU_FREQ is not set
314
315#
316# DMA support
317#
318CONFIG_SH_DMA=y
319CONFIG_SH_DMA_IRQ_MULTI=y
320CONFIG_SH_DMA_API=y
321CONFIG_NR_ONCHIP_DMA_CHANNELS=12
322CONFIG_NR_DMA_CHANNELS_BOOL=y
323CONFIG_NR_DMA_CHANNELS=12
324
325#
326# Companion Chips
327#
328
329#
330# Additional SuperH Device Drivers
331#
332# CONFIG_HEARTBEAT is not set
333# CONFIG_PUSH_SWITCH is not set
334
335#
336# Kernel features
337#
338CONFIG_HZ_100=y
339# CONFIG_HZ_250 is not set
340# CONFIG_HZ_300 is not set
341# CONFIG_HZ_1000 is not set
342CONFIG_HZ=100
343CONFIG_SCHED_HRTICK=y
344# CONFIG_KEXEC is not set
345# CONFIG_CRASH_DUMP is not set
346# CONFIG_SECCOMP is not set
347CONFIG_PREEMPT_NONE=y
348# CONFIG_PREEMPT_VOLUNTARY is not set
349# CONFIG_PREEMPT is not set
350CONFIG_GUSA=y
351# CONFIG_INTC_USERIMASK is not set
352
353#
354# Boot options
355#
356CONFIG_ZERO_PAGE_OFFSET=0x00001000
357CONFIG_BOOT_LINK_OFFSET=0x00800000
358CONFIG_ENTRY_OFFSET=0x00001000
359CONFIG_CMDLINE_OVERWRITE=y
360# CONFIG_CMDLINE_EXTEND is not set
361CONFIG_CMDLINE="console=ttySC1,115200 ip=dhcp root=/dev/nfs rw nfsroot=/nfs/rootfs,rsize=1024,wsize=1024 earlyprintk=sh-sci.1"
362
363#
364# Bus options
365#
366# CONFIG_ARCH_SUPPORTS_MSI is not set
367CONFIG_PCCARD=y
368CONFIG_PCMCIA=y
369CONFIG_PCMCIA_LOAD_CIS=y
370
371#
372# PC-card bridges
373#
374
375#
376# Executable file formats
377#
378CONFIG_BINFMT_ELF=y
379# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
380# CONFIG_HAVE_AOUT is not set
381CONFIG_BINFMT_MISC=y
382
383#
384# Power management options (EXPERIMENTAL)
385#
386# CONFIG_PM is not set
387# CONFIG_CPU_IDLE is not set
388CONFIG_NET=y
389
390#
391# Networking options
392#
393CONFIG_PACKET=y
394CONFIG_UNIX=y
395CONFIG_XFRM=y
396CONFIG_XFRM_USER=y
397# CONFIG_XFRM_SUB_POLICY is not set
398CONFIG_XFRM_MIGRATE=y
399# CONFIG_XFRM_STATISTICS is not set
400CONFIG_NET_KEY=y
401CONFIG_NET_KEY_MIGRATE=y
402CONFIG_INET=y
403# CONFIG_IP_MULTICAST is not set
404CONFIG_IP_ADVANCED_ROUTER=y
405CONFIG_ASK_IP_FIB_HASH=y
406# CONFIG_IP_FIB_TRIE is not set
407CONFIG_IP_FIB_HASH=y
408CONFIG_IP_MULTIPLE_TABLES=y
409CONFIG_IP_ROUTE_MULTIPATH=y
410CONFIG_IP_ROUTE_VERBOSE=y
411CONFIG_IP_PNP=y
412CONFIG_IP_PNP_DHCP=y
413# CONFIG_IP_PNP_BOOTP is not set
414# CONFIG_IP_PNP_RARP is not set
415CONFIG_NET_IPIP=y
416# CONFIG_NET_IPGRE is not set
417# CONFIG_ARPD is not set
418# CONFIG_SYN_COOKIES is not set
419# CONFIG_INET_AH is not set
420# CONFIG_INET_ESP is not set
421# CONFIG_INET_IPCOMP is not set
422# CONFIG_INET_XFRM_TUNNEL is not set
423CONFIG_INET_TUNNEL=y
424# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
425# CONFIG_INET_XFRM_MODE_TUNNEL is not set
426# CONFIG_INET_XFRM_MODE_BEET is not set
427# CONFIG_INET_LRO is not set
428CONFIG_INET_DIAG=y
429CONFIG_INET_TCP_DIAG=y
430# CONFIG_TCP_CONG_ADVANCED is not set
431CONFIG_TCP_CONG_CUBIC=y
432CONFIG_DEFAULT_TCP_CONG="cubic"
433# CONFIG_TCP_MD5SIG is not set
434# CONFIG_IPV6 is not set
435CONFIG_NETWORK_SECMARK=y
436# CONFIG_NETFILTER is not set
437# CONFIG_IP_DCCP is not set
438# CONFIG_IP_SCTP is not set
439# CONFIG_RDS is not set
440# CONFIG_TIPC is not set
441# CONFIG_ATM is not set
442# CONFIG_L2TP is not set
443# CONFIG_BRIDGE is not set
444# CONFIG_NET_DSA is not set
445# CONFIG_VLAN_8021Q is not set
446# CONFIG_DECNET is not set
447# CONFIG_LLC2 is not set
448# CONFIG_IPX is not set
449# CONFIG_ATALK is not set
450# CONFIG_X25 is not set
451# CONFIG_LAPB is not set
452# CONFIG_ECONET is not set
453# CONFIG_WAN_ROUTER is not set
454# CONFIG_PHONET is not set
455# CONFIG_IEEE802154 is not set
456# CONFIG_NET_SCHED is not set
457# CONFIG_DCB is not set
458
459#
460# Network testing
461#
462CONFIG_NET_PKTGEN=y
463# CONFIG_HAMRADIO is not set
464# CONFIG_CAN is not set
465# CONFIG_IRDA is not set
466# CONFIG_BT is not set
467# CONFIG_AF_RXRPC is not set
468CONFIG_FIB_RULES=y
469CONFIG_WIRELESS=y
470# CONFIG_CFG80211 is not set
471# CONFIG_LIB80211 is not set
472
473#
474# CFG80211 needs to be enabled for MAC80211
475#
476
477#
478# Some wireless drivers require a rate control algorithm
479#
480# CONFIG_WIMAX is not set
481# CONFIG_RFKILL is not set
482# CONFIG_NET_9P is not set
483# CONFIG_CAIF is not set
484
485#
486# Device Drivers
487#
488
489#
490# Generic Driver Options
491#
492CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
493# CONFIG_DEVTMPFS is not set
494CONFIG_STANDALONE=y
495CONFIG_PREVENT_FIRMWARE_BUILD=y
496CONFIG_FW_LOADER=y
497CONFIG_FIRMWARE_IN_KERNEL=y
498CONFIG_EXTRA_FIRMWARE=""
499# CONFIG_DEBUG_DRIVER is not set
500# CONFIG_DEBUG_DEVRES is not set
501# CONFIG_SYS_HYPERVISOR is not set
502# CONFIG_CONNECTOR is not set
503# CONFIG_MTD is not set
504# CONFIG_PARPORT is not set
505CONFIG_BLK_DEV=y
506# CONFIG_BLK_DEV_COW_COMMON is not set
507CONFIG_BLK_DEV_LOOP=y
508# CONFIG_BLK_DEV_CRYPTOLOOP is not set
509
510#
511# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
512#
513# CONFIG_BLK_DEV_NBD is not set
514# CONFIG_BLK_DEV_UB is not set
515CONFIG_BLK_DEV_RAM=y
516CONFIG_BLK_DEV_RAM_COUNT=16
517CONFIG_BLK_DEV_RAM_SIZE=4096
518# CONFIG_BLK_DEV_XIP is not set
519CONFIG_CDROM_PKTCDVD=y
520CONFIG_CDROM_PKTCDVD_BUFFERS=8
521# CONFIG_CDROM_PKTCDVD_WCACHE is not set
522# CONFIG_ATA_OVER_ETH is not set
523# CONFIG_MISC_DEVICES is not set
524
525#
526# SCSI device support
527#
528CONFIG_SCSI_MOD=y
529CONFIG_RAID_ATTRS=y
530CONFIG_SCSI=y
531CONFIG_SCSI_DMA=y
532CONFIG_SCSI_TGT=y
533CONFIG_SCSI_NETLINK=y
534CONFIG_SCSI_PROC_FS=y
535
536#
537# SCSI support type (disk, tape, CD-ROM)
538#
539CONFIG_BLK_DEV_SD=y
540# CONFIG_CHR_DEV_ST is not set
541# CONFIG_CHR_DEV_OSST is not set
542CONFIG_BLK_DEV_SR=y
543# CONFIG_BLK_DEV_SR_VENDOR is not set
544CONFIG_CHR_DEV_SG=y
545# CONFIG_CHR_DEV_SCH is not set
546CONFIG_SCSI_MULTI_LUN=y
547CONFIG_SCSI_CONSTANTS=y
548CONFIG_SCSI_LOGGING=y
549CONFIG_SCSI_SCAN_ASYNC=y
550
551#
552# SCSI Transports
553#
554CONFIG_SCSI_SPI_ATTRS=y
555CONFIG_SCSI_FC_ATTRS=y
556# CONFIG_SCSI_FC_TGT_ATTRS is not set
557CONFIG_SCSI_ISCSI_ATTRS=y
558# CONFIG_SCSI_SAS_LIBSAS is not set
559CONFIG_SCSI_SRP_ATTRS=y
560# CONFIG_SCSI_SRP_TGT_ATTRS is not set
561# CONFIG_SCSI_LOWLEVEL is not set
562# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
563# CONFIG_SCSI_DH is not set
564# CONFIG_SCSI_OSD_INITIATOR is not set
565# CONFIG_ATA is not set
566# CONFIG_MD is not set
567CONFIG_NETDEVICES=y
568CONFIG_DUMMY=y
569# CONFIG_BONDING is not set
570# CONFIG_MACVLAN is not set
571CONFIG_EQUALIZER=y
572CONFIG_TUN=y
573CONFIG_VETH=y
574CONFIG_PHYLIB=y
575
576#
577# MII PHY device drivers
578#
579# CONFIG_MARVELL_PHY is not set
580# CONFIG_DAVICOM_PHY is not set
581# CONFIG_QSEMI_PHY is not set
582# CONFIG_LXT_PHY is not set
583# CONFIG_CICADA_PHY is not set
584# CONFIG_VITESSE_PHY is not set
585# CONFIG_SMSC_PHY is not set
586# CONFIG_BROADCOM_PHY is not set
587# CONFIG_ICPLUS_PHY is not set
588# CONFIG_REALTEK_PHY is not set
589# CONFIG_NATIONAL_PHY is not set
590# CONFIG_STE10XP is not set
591# CONFIG_LSI_ET1011C_PHY is not set
592# CONFIG_MICREL_PHY is not set
593# CONFIG_FIXED_PHY is not set
594# CONFIG_MDIO_BITBANG is not set
595CONFIG_NET_ETHERNET=y
596CONFIG_MII=y
597# CONFIG_AX88796 is not set
598# CONFIG_STNIC is not set
599# CONFIG_SMC91X is not set
600# CONFIG_ETHOC is not set
601# CONFIG_SMC911X is not set
602CONFIG_SMSC911X=y
603# CONFIG_DNET is not set
604# CONFIG_IBM_NEW_EMAC_ZMII is not set
605# CONFIG_IBM_NEW_EMAC_RGMII is not set
606# CONFIG_IBM_NEW_EMAC_TAH is not set
607# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
608# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
609# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
610# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
611# CONFIG_B44 is not set
612# CONFIG_KS8842 is not set
613# CONFIG_KS8851_MLL is not set
614# CONFIG_NETDEV_1000 is not set
615# CONFIG_NETDEV_10000 is not set
616# CONFIG_WLAN is not set
617
618#
619# Enable WiMAX (Networking options) to see the WiMAX drivers
620#
621
622#
623# USB Network Adapters
624#
625# CONFIG_USB_CATC is not set
626# CONFIG_USB_KAWETH is not set
627# CONFIG_USB_PEGASUS is not set
628# CONFIG_USB_RTL8150 is not set
629# CONFIG_USB_USBNET is not set
630# CONFIG_USB_IPHETH is not set
631# CONFIG_NET_PCMCIA is not set
632# CONFIG_WAN is not set
633# CONFIG_PPP is not set
634# CONFIG_SLIP is not set
635# CONFIG_NETCONSOLE is not set
636# CONFIG_NETPOLL is not set
637# CONFIG_NET_POLL_CONTROLLER is not set
638# CONFIG_ISDN is not set
639# CONFIG_PHONE is not set
640
641#
642# Input device support
643#
644CONFIG_INPUT=y
645CONFIG_INPUT_FF_MEMLESS=y
646# CONFIG_INPUT_POLLDEV is not set
647# CONFIG_INPUT_SPARSEKMAP is not set
648
649#
650# Userland interfaces
651#
652# CONFIG_INPUT_MOUSEDEV is not set
653# CONFIG_INPUT_JOYDEV is not set
654# CONFIG_INPUT_EVDEV is not set
655# CONFIG_INPUT_EVBUG is not set
656
657#
658# Input Device Drivers
659#
660# CONFIG_INPUT_KEYBOARD is not set
661# CONFIG_INPUT_MOUSE is not set
662# CONFIG_INPUT_JOYSTICK is not set
663# CONFIG_INPUT_TABLET is not set
664# CONFIG_INPUT_TOUCHSCREEN is not set
665# CONFIG_INPUT_MISC is not set
666
667#
668# Hardware I/O ports
669#
670# CONFIG_SERIO is not set
671# CONFIG_GAMEPORT is not set
672
673#
674# Character devices
675#
676CONFIG_VT=y
677CONFIG_CONSOLE_TRANSLATIONS=y
678CONFIG_VT_CONSOLE=y
679CONFIG_HW_CONSOLE=y
680CONFIG_VT_HW_CONSOLE_BINDING=y
681# CONFIG_DEVKMEM is not set
682# CONFIG_SERIAL_NONSTANDARD is not set
683# CONFIG_N_GSM is not set
684
685#
686# Serial drivers
687#
688# CONFIG_SERIAL_8250 is not set
689
690#
691# Non-8250 serial port support
692#
693CONFIG_SERIAL_SH_SCI=y
694CONFIG_SERIAL_SH_SCI_NR_UARTS=2
695CONFIG_SERIAL_SH_SCI_CONSOLE=y
696CONFIG_SERIAL_CORE=y
697CONFIG_SERIAL_CORE_CONSOLE=y
698# CONFIG_SERIAL_TIMBERDALE is not set
699# CONFIG_SERIAL_ALTERA_JTAGUART is not set
700# CONFIG_SERIAL_ALTERA_UART is not set
701CONFIG_UNIX98_PTYS=y
702# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
703# CONFIG_LEGACY_PTYS is not set
704# CONFIG_IPMI_HANDLER is not set
705CONFIG_HW_RANDOM=y
706# CONFIG_HW_RANDOM_TIMERIOMEM is not set
707# CONFIG_R3964 is not set
708
709#
710# PCMCIA character devices
711#
712# CONFIG_SYNCLINK_CS is not set
713# CONFIG_CARDMAN_4000 is not set
714# CONFIG_CARDMAN_4040 is not set
715# CONFIG_IPWIRELESS is not set
716# CONFIG_RAW_DRIVER is not set
717# CONFIG_TCG_TPM is not set
718# CONFIG_RAMOOPS is not set
719# CONFIG_I2C is not set
720# CONFIG_SPI is not set
721
722#
723# PPS support
724#
725# CONFIG_PPS is not set
726# CONFIG_W1 is not set
727# CONFIG_POWER_SUPPLY is not set
728# CONFIG_HWMON is not set
729# CONFIG_THERMAL is not set
730CONFIG_WATCHDOG=y
731# CONFIG_WATCHDOG_NOWAYOUT is not set
732
733#
734# Watchdog Device Drivers
735#
736# CONFIG_SOFT_WATCHDOG is not set
737CONFIG_SH_WDT=y
738# CONFIG_SH_WDT_MMAP is not set
739
740#
741# USB-based Watchdog Cards
742#
743# CONFIG_USBPCWATCHDOG is not set
744CONFIG_SSB_POSSIBLE=y
745
746#
747# Sonics Silicon Backplane
748#
749CONFIG_SSB=y
750CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
751# CONFIG_SSB_PCMCIAHOST is not set
752# CONFIG_SSB_SILENT is not set
753# CONFIG_SSB_DEBUG is not set
754CONFIG_MFD_SUPPORT=y
755# CONFIG_MFD_CORE is not set
756# CONFIG_MFD_SM501 is not set
757# CONFIG_MFD_SH_MOBILE_SDHI is not set
758# CONFIG_HTC_PASIC3 is not set
759# CONFIG_MFD_TMIO is not set
760# CONFIG_ABX500_CORE is not set
761# CONFIG_REGULATOR is not set
762# CONFIG_MEDIA_SUPPORT is not set
763
764#
765# Graphics support
766#
767# CONFIG_VGASTATE is not set
768# CONFIG_VIDEO_OUTPUT_CONTROL is not set
769CONFIG_FB=y
770# CONFIG_FIRMWARE_EDID is not set
771# CONFIG_FB_DDC is not set
772# CONFIG_FB_BOOT_VESA_SUPPORT is not set
773# CONFIG_FB_CFB_FILLRECT is not set
774# CONFIG_FB_CFB_COPYAREA is not set
775# CONFIG_FB_CFB_IMAGEBLIT is not set
776# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
777# CONFIG_FB_SYS_FILLRECT is not set
778# CONFIG_FB_SYS_COPYAREA is not set
779# CONFIG_FB_SYS_IMAGEBLIT is not set
780# CONFIG_FB_FOREIGN_ENDIAN is not set
781# CONFIG_FB_SYS_FOPS is not set
782# CONFIG_FB_SVGALIB is not set
783# CONFIG_FB_MACMODES is not set
784# CONFIG_FB_BACKLIGHT is not set
785# CONFIG_FB_MODE_HELPERS is not set
786# CONFIG_FB_TILEBLITTING is not set
787
788#
789# Frame buffer hardware drivers
790#
791# CONFIG_FB_S1D13XXX is not set
792# CONFIG_FB_SH_MOBILE_LCDC is not set
793# CONFIG_FB_VIRTUAL is not set
794# CONFIG_FB_METRONOME is not set
795# CONFIG_FB_MB862XX is not set
796# CONFIG_FB_BROADSHEET is not set
797CONFIG_BACKLIGHT_LCD_SUPPORT=y
798# CONFIG_LCD_CLASS_DEVICE is not set
799CONFIG_BACKLIGHT_CLASS_DEVICE=y
800CONFIG_BACKLIGHT_GENERIC=y
801
802#
803# Display device support
804#
805# CONFIG_DISPLAY_SUPPORT is not set
806
807#
808# Console display driver support
809#
810CONFIG_DUMMY_CONSOLE=y
811CONFIG_FRAMEBUFFER_CONSOLE=y
812CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
813# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
814# CONFIG_FONTS is not set
815CONFIG_FONT_8x8=y
816CONFIG_FONT_8x16=y
817CONFIG_LOGO=y
818CONFIG_LOGO_LINUX_MONO=y
819CONFIG_LOGO_LINUX_VGA16=y
820CONFIG_LOGO_LINUX_CLUT224=y
821CONFIG_LOGO_SUPERH_MONO=y
822CONFIG_LOGO_SUPERH_VGA16=y
823CONFIG_LOGO_SUPERH_CLUT224=y
824# CONFIG_SOUND is not set
825# CONFIG_HID_SUPPORT is not set
826CONFIG_USB_SUPPORT=y
827CONFIG_USB_ARCH_HAS_HCD=y
828# CONFIG_USB_ARCH_HAS_OHCI is not set
829# CONFIG_USB_ARCH_HAS_EHCI is not set
830CONFIG_USB=y
831# CONFIG_USB_DEBUG is not set
832# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
833
834#
835# Miscellaneous USB options
836#
837CONFIG_USB_DEVICEFS=y
838# CONFIG_USB_DEVICE_CLASS is not set
839# CONFIG_USB_DYNAMIC_MINORS is not set
840# CONFIG_USB_OTG_WHITELIST is not set
841# CONFIG_USB_OTG_BLACKLIST_HUB is not set
842CONFIG_USB_MON=y
843# CONFIG_USB_WUSB is not set
844# CONFIG_USB_WUSB_CBAF is not set
845
846#
847# USB Host Controller Drivers
848#
849# CONFIG_USB_C67X00_HCD is not set
850# CONFIG_USB_OXU210HP_HCD is not set
851# CONFIG_USB_ISP116X_HCD is not set
852# CONFIG_USB_ISP1760_HCD is not set
853# CONFIG_USB_ISP1362_HCD is not set
854# CONFIG_USB_SL811_HCD is not set
855# CONFIG_USB_R8A66597_HCD is not set
856# CONFIG_USB_HWA_HCD is not set
857
858#
859# USB Device Class drivers
860#
861# CONFIG_USB_ACM is not set
862# CONFIG_USB_PRINTER is not set
863# CONFIG_USB_WDM is not set
864# CONFIG_USB_TMC is not set
865
866#
867# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
868#
869
870#
871# also be needed; see USB_STORAGE Help for more info
872#
873# CONFIG_USB_STORAGE is not set
874# CONFIG_USB_LIBUSUAL is not set
875
876#
877# USB Imaging devices
878#
879# CONFIG_USB_MDC800 is not set
880# CONFIG_USB_MICROTEK is not set
881
882#
883# USB port drivers
884#
885# CONFIG_USB_SERIAL is not set
886
887#
888# USB Miscellaneous drivers
889#
890# CONFIG_USB_EMI62 is not set
891# CONFIG_USB_EMI26 is not set
892# CONFIG_USB_ADUTUX is not set
893# CONFIG_USB_SEVSEG is not set
894# CONFIG_USB_RIO500 is not set
895# CONFIG_USB_LEGOTOWER is not set
896# CONFIG_USB_LCD is not set
897# CONFIG_USB_LED is not set
898# CONFIG_USB_CYPRESS_CY7C63 is not set
899# CONFIG_USB_CYTHERM is not set
900# CONFIG_USB_IDMOUSE is not set
901# CONFIG_USB_FTDI_ELAN is not set
902# CONFIG_USB_APPLEDISPLAY is not set
903# CONFIG_USB_LD is not set
904# CONFIG_USB_TRANCEVIBRATOR is not set
905# CONFIG_USB_IOWARRIOR is not set
906# CONFIG_USB_TEST is not set
907# CONFIG_USB_ISIGHTFW is not set
908# CONFIG_USB_GADGET is not set
909
910#
911# OTG and related infrastructure
912#
913# CONFIG_NOP_USB_XCEIV is not set
914# CONFIG_MMC is not set
915# CONFIG_MEMSTICK is not set
916CONFIG_NEW_LEDS=y
917CONFIG_LEDS_CLASS=y
918
919#
920# LED drivers
921#
922CONFIG_LEDS_TRIGGERS=y
923
924#
925# LED Triggers
926#
927# CONFIG_LEDS_TRIGGER_TIMER is not set
928# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
929# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
930# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
931
932#
933# iptables trigger is under Netfilter config (LED target)
934#
935# CONFIG_ACCESSIBILITY is not set
936CONFIG_RTC_LIB=y
937CONFIG_RTC_CLASS=y
938CONFIG_RTC_HCTOSYS=y
939CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
940# CONFIG_RTC_DEBUG is not set
941
942#
943# RTC interfaces
944#
945CONFIG_RTC_INTF_SYSFS=y
946CONFIG_RTC_INTF_PROC=y
947CONFIG_RTC_INTF_DEV=y
948CONFIG_RTC_INTF_DEV_UIE_EMUL=y
949# CONFIG_RTC_DRV_TEST is not set
950
951#
952# SPI RTC drivers
953#
954
955#
956# Platform RTC drivers
957#
958# CONFIG_RTC_DRV_DS1286 is not set
959# CONFIG_RTC_DRV_DS1511 is not set
960# CONFIG_RTC_DRV_DS1553 is not set
961# CONFIG_RTC_DRV_DS1742 is not set
962# CONFIG_RTC_DRV_STK17TA8 is not set
963# CONFIG_RTC_DRV_M48T86 is not set
964# CONFIG_RTC_DRV_M48T35 is not set
965# CONFIG_RTC_DRV_M48T59 is not set
966# CONFIG_RTC_DRV_MSM6242 is not set
967# CONFIG_RTC_DRV_BQ4802 is not set
968# CONFIG_RTC_DRV_RP5C01 is not set
969# CONFIG_RTC_DRV_V3020 is not set
970
971#
972# on-CPU RTC drivers
973#
974# CONFIG_RTC_DRV_SH is not set
975# CONFIG_RTC_DRV_GENERIC is not set
976CONFIG_DMADEVICES=y
977# CONFIG_DMADEVICES_DEBUG is not set
978
979#
980# DMA Devices
981#
982CONFIG_TIMB_DMA=y
983CONFIG_DMA_ENGINE=y
984
985#
986# DMA Clients
987#
988# CONFIG_NET_DMA is not set
989# CONFIG_ASYNC_TX_DMA is not set
990# CONFIG_DMATEST is not set
991# CONFIG_AUXDISPLAY is not set
992# CONFIG_UIO is not set
993# CONFIG_STAGING is not set
994
995#
996# File systems
997#
998# CONFIG_EXT2_FS is not set
999CONFIG_EXT3_FS=y
1000# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1001CONFIG_EXT3_FS_XATTR=y
1002# CONFIG_EXT3_FS_POSIX_ACL is not set
1003# CONFIG_EXT3_FS_SECURITY is not set
1004# CONFIG_EXT4_FS is not set
1005CONFIG_JBD=y
1006# CONFIG_JBD_DEBUG is not set
1007CONFIG_FS_MBCACHE=y
1008# CONFIG_REISERFS_FS is not set
1009# CONFIG_JFS_FS is not set
1010CONFIG_FS_POSIX_ACL=y
1011# CONFIG_XFS_FS is not set
1012# CONFIG_GFS2_FS is not set
1013# CONFIG_OCFS2_FS is not set
1014# CONFIG_BTRFS_FS is not set
1015# CONFIG_NILFS2_FS is not set
1016CONFIG_FILE_LOCKING=y
1017CONFIG_FSNOTIFY=y
1018CONFIG_DNOTIFY=y
1019CONFIG_INOTIFY=y
1020CONFIG_INOTIFY_USER=y
1021# CONFIG_QUOTA is not set
1022# CONFIG_AUTOFS_FS is not set
1023# CONFIG_AUTOFS4_FS is not set
1024# CONFIG_FUSE_FS is not set
1025CONFIG_GENERIC_ACL=y
1026
1027#
1028# Caches
1029#
1030# CONFIG_FSCACHE is not set
1031
1032#
1033# CD-ROM/DVD Filesystems
1034#
1035CONFIG_ISO9660_FS=y
1036CONFIG_JOLIET=y
1037CONFIG_ZISOFS=y
1038CONFIG_UDF_FS=y
1039CONFIG_UDF_NLS=y
1040
1041#
1042# DOS/FAT/NT Filesystems
1043#
1044CONFIG_FAT_FS=y
1045CONFIG_MSDOS_FS=y
1046CONFIG_VFAT_FS=y
1047CONFIG_FAT_DEFAULT_CODEPAGE=932
1048CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
1049# CONFIG_NTFS_FS is not set
1050
1051#
1052# Pseudo filesystems
1053#
1054CONFIG_PROC_FS=y
1055CONFIG_PROC_KCORE=y
1056CONFIG_PROC_SYSCTL=y
1057CONFIG_PROC_PAGE_MONITOR=y
1058CONFIG_SYSFS=y
1059CONFIG_TMPFS=y
1060CONFIG_TMPFS_POSIX_ACL=y
1061# CONFIG_HUGETLBFS is not set
1062# CONFIG_HUGETLB_PAGE is not set
1063CONFIG_CONFIGFS_FS=y
1064# CONFIG_MISC_FILESYSTEMS is not set
1065CONFIG_NETWORK_FILESYSTEMS=y
1066CONFIG_NFS_FS=y
1067CONFIG_NFS_V3=y
1068CONFIG_NFS_V3_ACL=y
1069CONFIG_NFS_V4=y
1070# CONFIG_NFS_V4_1 is not set
1071CONFIG_ROOT_NFS=y
1072# CONFIG_NFSD is not set
1073CONFIG_LOCKD=y
1074CONFIG_LOCKD_V4=y
1075CONFIG_NFS_ACL_SUPPORT=y
1076CONFIG_NFS_COMMON=y
1077CONFIG_SUNRPC=y
1078CONFIG_SUNRPC_GSS=y
1079CONFIG_RPCSEC_GSS_KRB5=y
1080# CONFIG_RPCSEC_GSS_SPKM3 is not set
1081# CONFIG_SMB_FS is not set
1082# CONFIG_CEPH_FS is not set
1083# CONFIG_CIFS is not set
1084# CONFIG_NCP_FS is not set
1085# CONFIG_CODA_FS is not set
1086# CONFIG_AFS_FS is not set
1087
1088#
1089# Partition Types
1090#
1091# CONFIG_PARTITION_ADVANCED is not set
1092CONFIG_MSDOS_PARTITION=y
1093CONFIG_NLS=y
1094CONFIG_NLS_DEFAULT="utf8"
1095CONFIG_NLS_CODEPAGE_437=y
1096CONFIG_NLS_CODEPAGE_737=y
1097CONFIG_NLS_CODEPAGE_775=y
1098CONFIG_NLS_CODEPAGE_850=y
1099CONFIG_NLS_CODEPAGE_852=y
1100CONFIG_NLS_CODEPAGE_855=y
1101CONFIG_NLS_CODEPAGE_857=y
1102CONFIG_NLS_CODEPAGE_860=y
1103CONFIG_NLS_CODEPAGE_861=y
1104CONFIG_NLS_CODEPAGE_862=y
1105CONFIG_NLS_CODEPAGE_863=y
1106CONFIG_NLS_CODEPAGE_864=y
1107CONFIG_NLS_CODEPAGE_865=y
1108CONFIG_NLS_CODEPAGE_866=y
1109CONFIG_NLS_CODEPAGE_869=y
1110CONFIG_NLS_CODEPAGE_936=y
1111CONFIG_NLS_CODEPAGE_950=y
1112CONFIG_NLS_CODEPAGE_932=y
1113CONFIG_NLS_CODEPAGE_949=y
1114CONFIG_NLS_CODEPAGE_874=y
1115CONFIG_NLS_ISO8859_8=y
1116CONFIG_NLS_CODEPAGE_1250=y
1117CONFIG_NLS_CODEPAGE_1251=y
1118CONFIG_NLS_ASCII=y
1119CONFIG_NLS_ISO8859_1=y
1120CONFIG_NLS_ISO8859_2=y
1121CONFIG_NLS_ISO8859_3=y
1122CONFIG_NLS_ISO8859_4=y
1123CONFIG_NLS_ISO8859_5=y
1124CONFIG_NLS_ISO8859_6=y
1125CONFIG_NLS_ISO8859_7=y
1126CONFIG_NLS_ISO8859_9=y
1127CONFIG_NLS_ISO8859_13=y
1128CONFIG_NLS_ISO8859_14=y
1129CONFIG_NLS_ISO8859_15=y
1130CONFIG_NLS_KOI8_R=y
1131CONFIG_NLS_KOI8_U=y
1132CONFIG_NLS_UTF8=y
1133# CONFIG_DLM is not set
1134
1135#
1136# Kernel hacking
1137#
1138CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1139# CONFIG_PRINTK_TIME is not set
1140# CONFIG_ENABLE_WARN_DEPRECATED is not set
1141# CONFIG_ENABLE_MUST_CHECK is not set
1142CONFIG_FRAME_WARN=1024
1143# CONFIG_MAGIC_SYSRQ is not set
1144# CONFIG_STRIP_ASM_SYMS is not set
1145# CONFIG_UNUSED_SYMBOLS is not set
1146CONFIG_DEBUG_FS=y
1147# CONFIG_HEADERS_CHECK is not set
1148CONFIG_DEBUG_KERNEL=y
1149# CONFIG_DEBUG_SHIRQ is not set
1150# CONFIG_DETECT_SOFTLOCKUP is not set
1151# CONFIG_DETECT_HUNG_TASK is not set
1152# CONFIG_SCHED_DEBUG is not set
1153# CONFIG_SCHEDSTATS is not set
1154# CONFIG_TIMER_STATS is not set
1155# CONFIG_DEBUG_OBJECTS is not set
1156# CONFIG_DEBUG_SLAB is not set
1157# CONFIG_DEBUG_KMEMLEAK is not set
1158# CONFIG_DEBUG_RT_MUTEXES is not set
1159# CONFIG_RT_MUTEX_TESTER is not set
1160# CONFIG_DEBUG_SPINLOCK is not set
1161# CONFIG_DEBUG_MUTEXES is not set
1162# CONFIG_DEBUG_LOCK_ALLOC is not set
1163# CONFIG_PROVE_LOCKING is not set
1164# CONFIG_LOCK_STAT is not set
1165# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1166# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1167# CONFIG_DEBUG_KOBJECT is not set
1168CONFIG_DEBUG_BUGVERBOSE=y
1169CONFIG_DEBUG_INFO=y
1170# CONFIG_DEBUG_VM is not set
1171# CONFIG_DEBUG_WRITECOUNT is not set
1172# CONFIG_DEBUG_MEMORY_INIT is not set
1173# CONFIG_DEBUG_LIST is not set
1174# CONFIG_DEBUG_SG is not set
1175# CONFIG_DEBUG_NOTIFIERS is not set
1176# CONFIG_DEBUG_CREDENTIALS is not set
1177CONFIG_FRAME_POINTER=y
1178# CONFIG_RCU_TORTURE_TEST is not set
1179# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1180# CONFIG_BACKTRACE_SELF_TEST is not set
1181# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1182# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1183# CONFIG_LKDTM is not set
1184# CONFIG_FAULT_INJECTION is not set
1185# CONFIG_LATENCYTOP is not set
1186# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1187# CONFIG_PAGE_POISONING is not set
1188CONFIG_HAVE_FUNCTION_TRACER=y
1189CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1190CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
1191CONFIG_HAVE_DYNAMIC_FTRACE=y
1192CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1193CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
1194CONFIG_TRACING_SUPPORT=y
1195CONFIG_FTRACE=y
1196# CONFIG_FUNCTION_TRACER is not set
1197# CONFIG_IRQSOFF_TRACER is not set
1198# CONFIG_SCHED_TRACER is not set
1199# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1200# CONFIG_FTRACE_SYSCALLS is not set
1201# CONFIG_BOOT_TRACER is not set
1202CONFIG_BRANCH_PROFILE_NONE=y
1203# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1204# CONFIG_PROFILE_ALL_BRANCHES is not set
1205# CONFIG_KSYM_TRACER is not set
1206# CONFIG_STACK_TRACER is not set
1207# CONFIG_KMEMTRACE is not set
1208# CONFIG_WORKQUEUE_TRACER is not set
1209# CONFIG_BLK_DEV_IO_TRACE is not set
1210# CONFIG_DYNAMIC_DEBUG is not set
1211# CONFIG_DMA_API_DEBUG is not set
1212# CONFIG_ATOMIC64_SELFTEST is not set
1213# CONFIG_SAMPLES is not set
1214CONFIG_HAVE_ARCH_KGDB=y
1215# CONFIG_KGDB is not set
1216CONFIG_SH_STANDARD_BIOS=y
1217# CONFIG_STACK_DEBUG is not set
1218# CONFIG_DEBUG_STACK_USAGE is not set
1219# CONFIG_4KSTACKS is not set
1220CONFIG_DUMP_CODE=y
1221# CONFIG_DWARF_UNWINDER is not set
1222# CONFIG_SH_NO_BSS_INIT is not set
1223
1224#
1225# Security options
1226#
1227# CONFIG_KEYS is not set
1228# CONFIG_SECURITY is not set
1229# CONFIG_SECURITYFS is not set
1230# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1231# CONFIG_DEFAULT_SECURITY_SMACK is not set
1232# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1233CONFIG_DEFAULT_SECURITY_DAC=y
1234CONFIG_DEFAULT_SECURITY=""
1235CONFIG_CRYPTO=y
1236
1237#
1238# Crypto core or helper
1239#
1240CONFIG_CRYPTO_ALGAPI=y
1241CONFIG_CRYPTO_ALGAPI2=y
1242CONFIG_CRYPTO_AEAD=y
1243CONFIG_CRYPTO_AEAD2=y
1244CONFIG_CRYPTO_BLKCIPHER=y
1245CONFIG_CRYPTO_BLKCIPHER2=y
1246CONFIG_CRYPTO_HASH=y
1247CONFIG_CRYPTO_HASH2=y
1248CONFIG_CRYPTO_RNG2=y
1249CONFIG_CRYPTO_PCOMP=y
1250CONFIG_CRYPTO_MANAGER=y
1251CONFIG_CRYPTO_MANAGER2=y
1252CONFIG_CRYPTO_GF128MUL=y
1253CONFIG_CRYPTO_NULL=y
1254CONFIG_CRYPTO_WORKQUEUE=y
1255# CONFIG_CRYPTO_CRYPTD is not set
1256CONFIG_CRYPTO_AUTHENC=y
1257
1258#
1259# Authenticated Encryption with Associated Data
1260#
1261# CONFIG_CRYPTO_CCM is not set
1262# CONFIG_CRYPTO_GCM is not set
1263# CONFIG_CRYPTO_SEQIV is not set
1264
1265#
1266# Block modes
1267#
1268CONFIG_CRYPTO_CBC=y
1269# CONFIG_CRYPTO_CTR is not set
1270# CONFIG_CRYPTO_CTS is not set
1271CONFIG_CRYPTO_ECB=y
1272CONFIG_CRYPTO_LRW=y
1273CONFIG_CRYPTO_PCBC=y
1274CONFIG_CRYPTO_XTS=y
1275
1276#
1277# Hash modes
1278#
1279CONFIG_CRYPTO_HMAC=y
1280CONFIG_CRYPTO_XCBC=y
1281# CONFIG_CRYPTO_VMAC is not set
1282
1283#
1284# Digest
1285#
1286CONFIG_CRYPTO_CRC32C=y
1287# CONFIG_CRYPTO_GHASH is not set
1288CONFIG_CRYPTO_MD4=y
1289CONFIG_CRYPTO_MD5=y
1290CONFIG_CRYPTO_MICHAEL_MIC=y
1291# CONFIG_CRYPTO_RMD128 is not set
1292# CONFIG_CRYPTO_RMD160 is not set
1293# CONFIG_CRYPTO_RMD256 is not set
1294# CONFIG_CRYPTO_RMD320 is not set
1295CONFIG_CRYPTO_SHA1=y
1296CONFIG_CRYPTO_SHA256=y
1297CONFIG_CRYPTO_SHA512=y
1298CONFIG_CRYPTO_TGR192=y
1299CONFIG_CRYPTO_WP512=y
1300
1301#
1302# Ciphers
1303#
1304CONFIG_CRYPTO_AES=y
1305CONFIG_CRYPTO_ANUBIS=y
1306CONFIG_CRYPTO_ARC4=y
1307CONFIG_CRYPTO_BLOWFISH=y
1308CONFIG_CRYPTO_CAMELLIA=y
1309CONFIG_CRYPTO_CAST5=y
1310CONFIG_CRYPTO_CAST6=y
1311CONFIG_CRYPTO_DES=y
1312CONFIG_CRYPTO_FCRYPT=y
1313CONFIG_CRYPTO_KHAZAD=y
1314# CONFIG_CRYPTO_SALSA20 is not set
1315CONFIG_CRYPTO_SEED=y
1316CONFIG_CRYPTO_SERPENT=y
1317CONFIG_CRYPTO_TEA=y
1318CONFIG_CRYPTO_TWOFISH=y
1319CONFIG_CRYPTO_TWOFISH_COMMON=y
1320
1321#
1322# Compression
1323#
1324CONFIG_CRYPTO_DEFLATE=y
1325# CONFIG_CRYPTO_ZLIB is not set
1326CONFIG_CRYPTO_LZO=y
1327
1328#
1329# Random Number Generation
1330#
1331# CONFIG_CRYPTO_ANSI_CPRNG is not set
1332# CONFIG_CRYPTO_HW is not set
1333# CONFIG_VIRTUALIZATION is not set
1334# CONFIG_BINARY_PRINTF is not set
1335
1336#
1337# Library routines
1338#
1339CONFIG_BITREVERSE=y
1340CONFIG_GENERIC_FIND_LAST_BIT=y
1341CONFIG_CRC_CCITT=y
1342CONFIG_CRC16=y
1343# CONFIG_CRC_T10DIF is not set
1344CONFIG_CRC_ITU_T=y
1345CONFIG_CRC32=y
1346# CONFIG_CRC7 is not set
1347CONFIG_LIBCRC32C=y
1348CONFIG_AUDIT_GENERIC=y
1349CONFIG_ZLIB_INFLATE=y
1350CONFIG_ZLIB_DEFLATE=y
1351CONFIG_LZO_COMPRESS=y
1352CONFIG_LZO_DECOMPRESS=y
1353CONFIG_HAS_IOMEM=y
1354CONFIG_HAS_DMA=y
1355CONFIG_HAVE_LMB=y
1356CONFIG_NLATTR=y
1357CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7757lcr_defconfig b/arch/sh/configs/sh7757lcr_defconfig
new file mode 100644
index 000000000000..635933e76e31
--- /dev/null
+++ b/arch/sh/configs/sh7757lcr_defconfig
@@ -0,0 +1,1126 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.35-rc3
4# Mon Jul 5 20:42:01 2010
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_HUGETLBFS=y
24CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y
26CONFIG_LOCKDEP_SUPPORT=y
27CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U32 is not set
29# CONFIG_ARCH_HAS_ILOG2_U64 is not set
30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DMA_NONCOHERENT=y
34CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_NEED_SG_DMA_LENGTH=y
36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
37CONFIG_CONSTRUCTORS=y
38
39#
40# General setup
41#
42CONFIG_EXPERIMENTAL=y
43CONFIG_BROKEN_ON_SMP=y
44CONFIG_INIT_ENV_ARG_LIMIT=32
45CONFIG_CROSS_COMPILE=""
46CONFIG_LOCALVERSION=""
47CONFIG_LOCALVERSION_AUTO=y
48CONFIG_HAVE_KERNEL_GZIP=y
49CONFIG_HAVE_KERNEL_BZIP2=y
50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
52CONFIG_KERNEL_GZIP=y
53# CONFIG_KERNEL_BZIP2 is not set
54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
56# CONFIG_SWAP is not set
57CONFIG_SYSVIPC=y
58CONFIG_SYSVIPC_SYSCTL=y
59CONFIG_POSIX_MQUEUE=y
60CONFIG_POSIX_MQUEUE_SYSCTL=y
61CONFIG_BSD_PROCESS_ACCT=y
62# CONFIG_BSD_PROCESS_ACCT_V3 is not set
63CONFIG_TASKSTATS=y
64CONFIG_TASK_DELAY_ACCT=y
65CONFIG_TASK_XACCT=y
66CONFIG_TASK_IO_ACCOUNTING=y
67# CONFIG_AUDIT is not set
68
69#
70# RCU Subsystem
71#
72CONFIG_TREE_RCU=y
73# CONFIG_TREE_PREEMPT_RCU is not set
74# CONFIG_TINY_RCU is not set
75# CONFIG_RCU_TRACE is not set
76CONFIG_RCU_FANOUT=32
77# CONFIG_RCU_FANOUT_EXACT is not set
78# CONFIG_TREE_RCU_TRACE is not set
79# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=14
81# CONFIG_CGROUPS is not set
82# CONFIG_SYSFS_DEPRECATED_V2 is not set
83# CONFIG_RELAY is not set
84# CONFIG_NAMESPACES is not set
85CONFIG_BLK_DEV_INITRD=y
86CONFIG_INITRAMFS_SOURCE=""
87CONFIG_RD_GZIP=y
88# CONFIG_RD_BZIP2 is not set
89# CONFIG_RD_LZMA is not set
90# CONFIG_RD_LZO is not set
91# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
92CONFIG_SYSCTL=y
93CONFIG_ANON_INODES=y
94CONFIG_EMBEDDED=y
95CONFIG_UID16=y
96# CONFIG_SYSCTL_SYSCALL is not set
97CONFIG_KALLSYMS=y
98CONFIG_KALLSYMS_ALL=y
99# CONFIG_KALLSYMS_EXTRA_PASS is not set
100CONFIG_HOTPLUG=y
101CONFIG_PRINTK=y
102CONFIG_BUG=y
103CONFIG_ELF_CORE=y
104CONFIG_BASE_FULL=y
105CONFIG_FUTEX=y
106CONFIG_EPOLL=y
107CONFIG_SIGNALFD=y
108CONFIG_TIMERFD=y
109CONFIG_EVENTFD=y
110CONFIG_SHMEM=y
111CONFIG_AIO=y
112CONFIG_HAVE_PERF_EVENTS=y
113CONFIG_PERF_USE_VMALLOC=y
114
115#
116# Kernel Performance Events And Counters
117#
118CONFIG_PERF_EVENTS=y
119# CONFIG_PERF_COUNTERS is not set
120# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
121CONFIG_VM_EVENT_COUNTERS=y
122CONFIG_COMPAT_BRK=y
123CONFIG_SLAB=y
124# CONFIG_SLUB is not set
125# CONFIG_SLOB is not set
126# CONFIG_PROFILING is not set
127CONFIG_HAVE_OPROFILE=y
128# CONFIG_KPROBES is not set
129CONFIG_HAVE_KPROBES=y
130CONFIG_HAVE_KRETPROBES=y
131CONFIG_HAVE_ARCH_TRACEHOOK=y
132CONFIG_HAVE_DMA_ATTRS=y
133CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
134CONFIG_HAVE_CLK=y
135CONFIG_HAVE_DMA_API_DEBUG=y
136CONFIG_HAVE_HW_BREAKPOINT=y
137CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
138
139#
140# GCOV-based kernel profiling
141#
142# CONFIG_SLOW_WORK is not set
143CONFIG_HAVE_GENERIC_DMA_COHERENT=y
144CONFIG_SLABINFO=y
145CONFIG_RT_MUTEXES=y
146CONFIG_BASE_SMALL=0
147CONFIG_MODULES=y
148# CONFIG_MODULE_FORCE_LOAD is not set
149CONFIG_MODULE_UNLOAD=y
150# CONFIG_MODULE_FORCE_UNLOAD is not set
151# CONFIG_MODVERSIONS is not set
152# CONFIG_MODULE_SRCVERSION_ALL is not set
153CONFIG_BLOCK=y
154CONFIG_LBDAF=y
155# CONFIG_BLK_DEV_BSG is not set
156# CONFIG_BLK_DEV_INTEGRITY is not set
157
158#
159# IO Schedulers
160#
161CONFIG_IOSCHED_NOOP=y
162CONFIG_IOSCHED_DEADLINE=y
163CONFIG_IOSCHED_CFQ=y
164# CONFIG_DEFAULT_DEADLINE is not set
165CONFIG_DEFAULT_CFQ=y
166# CONFIG_DEFAULT_NOOP is not set
167CONFIG_DEFAULT_IOSCHED="cfq"
168# CONFIG_INLINE_SPIN_TRYLOCK is not set
169# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
170# CONFIG_INLINE_SPIN_LOCK is not set
171# CONFIG_INLINE_SPIN_LOCK_BH is not set
172# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
173# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
174CONFIG_INLINE_SPIN_UNLOCK=y
175# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
176CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
177# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
178# CONFIG_INLINE_READ_TRYLOCK is not set
179# CONFIG_INLINE_READ_LOCK is not set
180# CONFIG_INLINE_READ_LOCK_BH is not set
181# CONFIG_INLINE_READ_LOCK_IRQ is not set
182# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
183CONFIG_INLINE_READ_UNLOCK=y
184# CONFIG_INLINE_READ_UNLOCK_BH is not set
185CONFIG_INLINE_READ_UNLOCK_IRQ=y
186# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
187# CONFIG_INLINE_WRITE_TRYLOCK is not set
188# CONFIG_INLINE_WRITE_LOCK is not set
189# CONFIG_INLINE_WRITE_LOCK_BH is not set
190# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
191# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
192CONFIG_INLINE_WRITE_UNLOCK=y
193# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
194CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
195# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
196# CONFIG_MUTEX_SPIN_ON_OWNER is not set
197# CONFIG_FREEZER is not set
198
199#
200# System type
201#
202CONFIG_CPU_SH4=y
203CONFIG_CPU_SH4A=y
204CONFIG_CPU_SHX2=y
205# CONFIG_CPU_SUBTYPE_SH7619 is not set
206# CONFIG_CPU_SUBTYPE_SH7201 is not set
207# CONFIG_CPU_SUBTYPE_SH7203 is not set
208# CONFIG_CPU_SUBTYPE_SH7206 is not set
209# CONFIG_CPU_SUBTYPE_SH7263 is not set
210# CONFIG_CPU_SUBTYPE_MXG is not set
211# CONFIG_CPU_SUBTYPE_SH7705 is not set
212# CONFIG_CPU_SUBTYPE_SH7706 is not set
213# CONFIG_CPU_SUBTYPE_SH7707 is not set
214# CONFIG_CPU_SUBTYPE_SH7708 is not set
215# CONFIG_CPU_SUBTYPE_SH7709 is not set
216# CONFIG_CPU_SUBTYPE_SH7710 is not set
217# CONFIG_CPU_SUBTYPE_SH7712 is not set
218# CONFIG_CPU_SUBTYPE_SH7720 is not set
219# CONFIG_CPU_SUBTYPE_SH7721 is not set
220# CONFIG_CPU_SUBTYPE_SH7750 is not set
221# CONFIG_CPU_SUBTYPE_SH7091 is not set
222# CONFIG_CPU_SUBTYPE_SH7750R is not set
223# CONFIG_CPU_SUBTYPE_SH7750S is not set
224# CONFIG_CPU_SUBTYPE_SH7751 is not set
225# CONFIG_CPU_SUBTYPE_SH7751R is not set
226# CONFIG_CPU_SUBTYPE_SH7760 is not set
227# CONFIG_CPU_SUBTYPE_SH4_202 is not set
228# CONFIG_CPU_SUBTYPE_SH7723 is not set
229# CONFIG_CPU_SUBTYPE_SH7724 is not set
230CONFIG_CPU_SUBTYPE_SH7757=y
231# CONFIG_CPU_SUBTYPE_SH7763 is not set
232# CONFIG_CPU_SUBTYPE_SH7770 is not set
233# CONFIG_CPU_SUBTYPE_SH7780 is not set
234# CONFIG_CPU_SUBTYPE_SH7785 is not set
235# CONFIG_CPU_SUBTYPE_SH7786 is not set
236# CONFIG_CPU_SUBTYPE_SHX3 is not set
237# CONFIG_CPU_SUBTYPE_SH7343 is not set
238# CONFIG_CPU_SUBTYPE_SH7722 is not set
239# CONFIG_CPU_SUBTYPE_SH7366 is not set
240
241#
242# Memory management options
243#
244CONFIG_QUICKLIST=y
245CONFIG_MMU=y
246CONFIG_PAGE_OFFSET=0x80000000
247CONFIG_FORCE_MAX_ZONEORDER=11
248CONFIG_MEMORY_START=0x40000000
249CONFIG_MEMORY_SIZE=0x0f000000
250# CONFIG_29BIT is not set
251CONFIG_32BIT=y
252CONFIG_PMB=y
253CONFIG_X2TLB=y
254CONFIG_VSYSCALL=y
255CONFIG_ARCH_FLATMEM_ENABLE=y
256CONFIG_ARCH_SPARSEMEM_ENABLE=y
257CONFIG_ARCH_SPARSEMEM_DEFAULT=y
258CONFIG_MAX_ACTIVE_REGIONS=1
259CONFIG_ARCH_POPULATES_NODE_MAP=y
260CONFIG_ARCH_SELECT_MEMORY_MODEL=y
261CONFIG_IOREMAP_FIXED=y
262CONFIG_UNCACHED_MAPPING=y
263CONFIG_PAGE_SIZE_4KB=y
264# CONFIG_PAGE_SIZE_8KB is not set
265# CONFIG_PAGE_SIZE_16KB is not set
266# CONFIG_PAGE_SIZE_64KB is not set
267CONFIG_SELECT_MEMORY_MODEL=y
268CONFIG_FLATMEM_MANUAL=y
269# CONFIG_DISCONTIGMEM_MANUAL is not set
270# CONFIG_SPARSEMEM_MANUAL is not set
271CONFIG_FLATMEM=y
272CONFIG_FLAT_NODE_MEM_MAP=y
273CONFIG_SPARSEMEM_STATIC=y
274CONFIG_PAGEFLAGS_EXTENDED=y
275CONFIG_SPLIT_PTLOCK_CPUS=4
276# CONFIG_PHYS_ADDR_T_64BIT is not set
277CONFIG_ZONE_DMA_FLAG=0
278CONFIG_NR_QUICK=1
279# CONFIG_KSM is not set
280CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
281
282#
283# Cache configuration
284#
285CONFIG_CACHE_WRITEBACK=y
286# CONFIG_CACHE_WRITETHROUGH is not set
287# CONFIG_CACHE_OFF is not set
288
289#
290# Processor features
291#
292CONFIG_CPU_LITTLE_ENDIAN=y
293# CONFIG_CPU_BIG_ENDIAN is not set
294CONFIG_SH_FPU=y
295# CONFIG_SH_STORE_QUEUES is not set
296CONFIG_CPU_HAS_INTEVT=y
297CONFIG_CPU_HAS_SR_RB=y
298CONFIG_CPU_HAS_FPU=y
299
300#
301# Board support
302#
303CONFIG_SH_SH7757LCR=y
304
305#
306# Timer and clock configuration
307#
308CONFIG_SH_TIMER_TMU=y
309CONFIG_SH_CLK_CPG=y
310# CONFIG_NO_HZ is not set
311# CONFIG_HIGH_RES_TIMERS is not set
312CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
313
314#
315# CPU Frequency scaling
316#
317# CONFIG_CPU_FREQ is not set
318
319#
320# DMA support
321#
322# CONFIG_SH_DMA is not set
323
324#
325# Companion Chips
326#
327
328#
329# Additional SuperH Device Drivers
330#
331CONFIG_HEARTBEAT=y
332# CONFIG_PUSH_SWITCH is not set
333
334#
335# Kernel features
336#
337# CONFIG_HZ_100 is not set
338CONFIG_HZ_250=y
339# CONFIG_HZ_300 is not set
340# CONFIG_HZ_1000 is not set
341CONFIG_HZ=250
342# CONFIG_SCHED_HRTICK is not set
343# CONFIG_KEXEC is not set
344# CONFIG_CRASH_DUMP is not set
345CONFIG_SECCOMP=y
346CONFIG_PREEMPT_NONE=y
347# CONFIG_PREEMPT_VOLUNTARY is not set
348# CONFIG_PREEMPT is not set
349CONFIG_GUSA=y
350# CONFIG_INTC_USERIMASK is not set
351
352#
353# Boot options
354#
355CONFIG_ZERO_PAGE_OFFSET=0x00001000
356CONFIG_BOOT_LINK_OFFSET=0x00800000
357CONFIG_ENTRY_OFFSET=0x00001000
358CONFIG_CMDLINE_OVERWRITE=y
359# CONFIG_CMDLINE_EXTEND is not set
360CONFIG_CMDLINE="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
361
362#
363# Bus options
364#
365# CONFIG_ARCH_SUPPORTS_MSI is not set
366# CONFIG_PCCARD is not set
367
368#
369# Executable file formats
370#
371CONFIG_BINFMT_ELF=y
372# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
373# CONFIG_HAVE_AOUT is not set
374# CONFIG_BINFMT_MISC is not set
375
376#
377# Power management options (EXPERIMENTAL)
378#
379# CONFIG_PM is not set
380# CONFIG_CPU_IDLE is not set
381CONFIG_NET=y
382
383#
384# Networking options
385#
386CONFIG_PACKET=y
387CONFIG_UNIX=y
388CONFIG_XFRM=y
389# CONFIG_XFRM_USER is not set
390# CONFIG_XFRM_SUB_POLICY is not set
391# CONFIG_XFRM_MIGRATE is not set
392# CONFIG_XFRM_STATISTICS is not set
393# CONFIG_NET_KEY is not set
394CONFIG_INET=y
395CONFIG_IP_MULTICAST=y
396# CONFIG_IP_ADVANCED_ROUTER is not set
397CONFIG_IP_FIB_HASH=y
398CONFIG_IP_PNP=y
399CONFIG_IP_PNP_DHCP=y
400# CONFIG_IP_PNP_BOOTP is not set
401# CONFIG_IP_PNP_RARP is not set
402# CONFIG_NET_IPIP is not set
403# CONFIG_NET_IPGRE is not set
404# CONFIG_IP_MROUTE is not set
405# CONFIG_ARPD is not set
406# CONFIG_SYN_COOKIES is not set
407# CONFIG_INET_AH is not set
408# CONFIG_INET_ESP is not set
409# CONFIG_INET_IPCOMP is not set
410# CONFIG_INET_XFRM_TUNNEL is not set
411CONFIG_INET_TUNNEL=y
412CONFIG_INET_XFRM_MODE_TRANSPORT=y
413CONFIG_INET_XFRM_MODE_TUNNEL=y
414CONFIG_INET_XFRM_MODE_BEET=y
415# CONFIG_INET_LRO is not set
416CONFIG_INET_DIAG=y
417CONFIG_INET_TCP_DIAG=y
418# CONFIG_TCP_CONG_ADVANCED is not set
419CONFIG_TCP_CONG_CUBIC=y
420CONFIG_DEFAULT_TCP_CONG="cubic"
421# CONFIG_TCP_MD5SIG is not set
422CONFIG_IPV6=y
423# CONFIG_IPV6_PRIVACY is not set
424# CONFIG_IPV6_ROUTER_PREF is not set
425# CONFIG_IPV6_OPTIMISTIC_DAD is not set
426# CONFIG_INET6_AH is not set
427# CONFIG_INET6_ESP is not set
428# CONFIG_INET6_IPCOMP is not set
429# CONFIG_IPV6_MIP6 is not set
430# CONFIG_INET6_XFRM_TUNNEL is not set
431# CONFIG_INET6_TUNNEL is not set
432CONFIG_INET6_XFRM_MODE_TRANSPORT=y
433CONFIG_INET6_XFRM_MODE_TUNNEL=y
434CONFIG_INET6_XFRM_MODE_BEET=y
435# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
436CONFIG_IPV6_SIT=y
437# CONFIG_IPV6_SIT_6RD is not set
438CONFIG_IPV6_NDISC_NODETYPE=y
439# CONFIG_IPV6_TUNNEL is not set
440# CONFIG_IPV6_MULTIPLE_TABLES is not set
441# CONFIG_IPV6_MROUTE is not set
442# CONFIG_NETWORK_SECMARK is not set
443# CONFIG_NETFILTER is not set
444# CONFIG_IP_DCCP is not set
445# CONFIG_IP_SCTP is not set
446# CONFIG_RDS is not set
447# CONFIG_TIPC is not set
448# CONFIG_ATM is not set
449# CONFIG_L2TP is not set
450# CONFIG_BRIDGE is not set
451# CONFIG_NET_DSA is not set
452# CONFIG_VLAN_8021Q is not set
453# CONFIG_DECNET is not set
454# CONFIG_LLC2 is not set
455# CONFIG_IPX is not set
456# CONFIG_ATALK is not set
457# CONFIG_X25 is not set
458# CONFIG_LAPB is not set
459# CONFIG_ECONET is not set
460# CONFIG_WAN_ROUTER is not set
461# CONFIG_PHONET is not set
462# CONFIG_IEEE802154 is not set
463# CONFIG_NET_SCHED is not set
464# CONFIG_DCB is not set
465
466#
467# Network testing
468#
469# CONFIG_NET_PKTGEN is not set
470# CONFIG_HAMRADIO is not set
471# CONFIG_CAN is not set
472# CONFIG_IRDA is not set
473# CONFIG_BT is not set
474# CONFIG_AF_RXRPC is not set
475# CONFIG_WIRELESS is not set
476# CONFIG_WIMAX is not set
477# CONFIG_RFKILL is not set
478# CONFIG_NET_9P is not set
479# CONFIG_CAIF is not set
480
481#
482# Device Drivers
483#
484
485#
486# Generic Driver Options
487#
488CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
489# CONFIG_DEVTMPFS is not set
490CONFIG_STANDALONE=y
491CONFIG_PREVENT_FIRMWARE_BUILD=y
492# CONFIG_FW_LOADER is not set
493# CONFIG_DEBUG_DRIVER is not set
494# CONFIG_DEBUG_DEVRES is not set
495# CONFIG_SYS_HYPERVISOR is not set
496# CONFIG_CONNECTOR is not set
497# CONFIG_MTD is not set
498# CONFIG_PARPORT is not set
499CONFIG_BLK_DEV=y
500# CONFIG_BLK_DEV_COW_COMMON is not set
501# CONFIG_BLK_DEV_LOOP is not set
502
503#
504# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
505#
506# CONFIG_BLK_DEV_NBD is not set
507CONFIG_BLK_DEV_RAM=y
508CONFIG_BLK_DEV_RAM_COUNT=16
509CONFIG_BLK_DEV_RAM_SIZE=4096
510# CONFIG_BLK_DEV_XIP is not set
511# CONFIG_CDROM_PKTCDVD is not set
512# CONFIG_ATA_OVER_ETH is not set
513# CONFIG_BLK_DEV_HD is not set
514# CONFIG_MISC_DEVICES is not set
515CONFIG_HAVE_IDE=y
516# CONFIG_IDE is not set
517
518#
519# SCSI device support
520#
521CONFIG_SCSI_MOD=y
522# CONFIG_RAID_ATTRS is not set
523# CONFIG_SCSI is not set
524# CONFIG_SCSI_DMA is not set
525# CONFIG_SCSI_NETLINK is not set
526# CONFIG_ATA is not set
527# CONFIG_MD is not set
528CONFIG_NETDEVICES=y
529# CONFIG_DUMMY is not set
530# CONFIG_BONDING is not set
531# CONFIG_MACVLAN is not set
532# CONFIG_EQUALIZER is not set
533# CONFIG_TUN is not set
534# CONFIG_VETH is not set
535CONFIG_PHYLIB=y
536
537#
538# MII PHY device drivers
539#
540# CONFIG_MARVELL_PHY is not set
541# CONFIG_DAVICOM_PHY is not set
542# CONFIG_QSEMI_PHY is not set
543# CONFIG_LXT_PHY is not set
544# CONFIG_CICADA_PHY is not set
545CONFIG_VITESSE_PHY=y
546# CONFIG_SMSC_PHY is not set
547# CONFIG_BROADCOM_PHY is not set
548# CONFIG_ICPLUS_PHY is not set
549# CONFIG_REALTEK_PHY is not set
550# CONFIG_NATIONAL_PHY is not set
551# CONFIG_STE10XP is not set
552# CONFIG_LSI_ET1011C_PHY is not set
553# CONFIG_MICREL_PHY is not set
554# CONFIG_FIXED_PHY is not set
555CONFIG_MDIO_BITBANG=y
556# CONFIG_MDIO_GPIO is not set
557CONFIG_NET_ETHERNET=y
558CONFIG_MII=y
559# CONFIG_AX88796 is not set
560# CONFIG_STNIC is not set
561CONFIG_SH_ETH=y
562# CONFIG_SMC91X is not set
563# CONFIG_ETHOC is not set
564# CONFIG_SMC911X is not set
565# CONFIG_SMSC911X is not set
566# CONFIG_DNET is not set
567# CONFIG_IBM_NEW_EMAC_ZMII is not set
568# CONFIG_IBM_NEW_EMAC_RGMII is not set
569# CONFIG_IBM_NEW_EMAC_TAH is not set
570# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
571# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
572# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
573# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
574# CONFIG_B44 is not set
575# CONFIG_KS8842 is not set
576# CONFIG_KS8851_MLL is not set
577CONFIG_NETDEV_1000=y
578# CONFIG_NETDEV_10000 is not set
579# CONFIG_WLAN is not set
580
581#
582# Enable WiMAX (Networking options) to see the WiMAX drivers
583#
584# CONFIG_WAN is not set
585# CONFIG_PPP is not set
586# CONFIG_SLIP is not set
587# CONFIG_NETCONSOLE is not set
588# CONFIG_NETPOLL is not set
589# CONFIG_NET_POLL_CONTROLLER is not set
590# CONFIG_ISDN is not set
591# CONFIG_PHONE is not set
592
593#
594# Input device support
595#
596CONFIG_INPUT=y
597# CONFIG_INPUT_FF_MEMLESS is not set
598# CONFIG_INPUT_POLLDEV is not set
599# CONFIG_INPUT_SPARSEKMAP is not set
600
601#
602# Userland interfaces
603#
604CONFIG_INPUT_MOUSEDEV=y
605CONFIG_INPUT_MOUSEDEV_PSAUX=y
606CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
607CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
608# CONFIG_INPUT_JOYDEV is not set
609# CONFIG_INPUT_EVDEV is not set
610# CONFIG_INPUT_EVBUG is not set
611
612#
613# Input Device Drivers
614#
615CONFIG_INPUT_KEYBOARD=y
616# CONFIG_KEYBOARD_ATKBD is not set
617# CONFIG_KEYBOARD_LKKBD is not set
618# CONFIG_KEYBOARD_GPIO is not set
619# CONFIG_KEYBOARD_MATRIX is not set
620# CONFIG_KEYBOARD_NEWTON is not set
621# CONFIG_KEYBOARD_OPENCORES is not set
622# CONFIG_KEYBOARD_STOWAWAY is not set
623# CONFIG_KEYBOARD_SUNKBD is not set
624# CONFIG_KEYBOARD_SH_KEYSC is not set
625# CONFIG_KEYBOARD_XTKBD is not set
626CONFIG_INPUT_MOUSE=y
627# CONFIG_MOUSE_PS2 is not set
628# CONFIG_MOUSE_SERIAL is not set
629# CONFIG_MOUSE_VSXXXAA is not set
630# CONFIG_MOUSE_GPIO is not set
631# CONFIG_INPUT_JOYSTICK is not set
632# CONFIG_INPUT_TABLET is not set
633# CONFIG_INPUT_TOUCHSCREEN is not set
634# CONFIG_INPUT_MISC is not set
635
636#
637# Hardware I/O ports
638#
639# CONFIG_SERIO is not set
640# CONFIG_GAMEPORT is not set
641
642#
643# Character devices
644#
645CONFIG_VT=y
646CONFIG_CONSOLE_TRANSLATIONS=y
647CONFIG_VT_CONSOLE=y
648CONFIG_HW_CONSOLE=y
649# CONFIG_VT_HW_CONSOLE_BINDING is not set
650CONFIG_DEVKMEM=y
651# CONFIG_SERIAL_NONSTANDARD is not set
652# CONFIG_N_GSM is not set
653
654#
655# Serial drivers
656#
657CONFIG_SERIAL_8250=y
658CONFIG_SERIAL_8250_CONSOLE=y
659CONFIG_SERIAL_8250_NR_UARTS=2
660CONFIG_SERIAL_8250_RUNTIME_UARTS=2
661# CONFIG_SERIAL_8250_EXTENDED is not set
662
663#
664# Non-8250 serial port support
665#
666CONFIG_SERIAL_SH_SCI=y
667CONFIG_SERIAL_SH_SCI_NR_UARTS=3
668CONFIG_SERIAL_SH_SCI_CONSOLE=y
669CONFIG_SERIAL_CORE=y
670CONFIG_SERIAL_CORE_CONSOLE=y
671# CONFIG_SERIAL_TIMBERDALE is not set
672# CONFIG_SERIAL_ALTERA_JTAGUART is not set
673# CONFIG_SERIAL_ALTERA_UART is not set
674CONFIG_UNIX98_PTYS=y
675# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
676# CONFIG_LEGACY_PTYS is not set
677# CONFIG_IPMI_HANDLER is not set
678# CONFIG_HW_RANDOM is not set
679# CONFIG_R3964 is not set
680# CONFIG_RAW_DRIVER is not set
681# CONFIG_TCG_TPM is not set
682# CONFIG_RAMOOPS is not set
683# CONFIG_I2C is not set
684# CONFIG_SPI is not set
685
686#
687# PPS support
688#
689# CONFIG_PPS is not set
690CONFIG_ARCH_REQUIRE_GPIOLIB=y
691CONFIG_GPIOLIB=y
692# CONFIG_DEBUG_GPIO is not set
693# CONFIG_GPIO_SYSFS is not set
694
695#
696# Memory mapped GPIO expanders:
697#
698# CONFIG_GPIO_IT8761E is not set
699
700#
701# I2C GPIO expanders:
702#
703
704#
705# PCI GPIO expanders:
706#
707
708#
709# SPI GPIO expanders:
710#
711
712#
713# AC97 GPIO expanders:
714#
715
716#
717# MODULbus GPIO expanders:
718#
719# CONFIG_W1 is not set
720# CONFIG_POWER_SUPPLY is not set
721# CONFIG_HWMON is not set
722# CONFIG_THERMAL is not set
723# CONFIG_WATCHDOG is not set
724CONFIG_SSB_POSSIBLE=y
725
726#
727# Sonics Silicon Backplane
728#
729# CONFIG_SSB is not set
730CONFIG_MFD_SUPPORT=y
731# CONFIG_MFD_CORE is not set
732# CONFIG_MFD_SM501 is not set
733# CONFIG_MFD_SH_MOBILE_SDHI is not set
734# CONFIG_HTC_PASIC3 is not set
735# CONFIG_MFD_TMIO is not set
736# CONFIG_ABX500_CORE is not set
737# CONFIG_REGULATOR is not set
738# CONFIG_MEDIA_SUPPORT is not set
739
740#
741# Graphics support
742#
743# CONFIG_VGASTATE is not set
744# CONFIG_VIDEO_OUTPUT_CONTROL is not set
745# CONFIG_FB is not set
746# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
747
748#
749# Display device support
750#
751# CONFIG_DISPLAY_SUPPORT is not set
752
753#
754# Console display driver support
755#
756CONFIG_DUMMY_CONSOLE=y
757# CONFIG_SOUND is not set
758CONFIG_HID_SUPPORT=y
759CONFIG_HID=y
760# CONFIG_HIDRAW is not set
761# CONFIG_HID_PID is not set
762
763#
764# Special HID drivers
765#
766# CONFIG_USB_SUPPORT is not set
767# CONFIG_MMC is not set
768# CONFIG_MEMSTICK is not set
769# CONFIG_NEW_LEDS is not set
770# CONFIG_ACCESSIBILITY is not set
771CONFIG_RTC_LIB=y
772# CONFIG_RTC_CLASS is not set
773# CONFIG_DMADEVICES is not set
774# CONFIG_AUXDISPLAY is not set
775# CONFIG_UIO is not set
776# CONFIG_STAGING is not set
777
778#
779# File systems
780#
781CONFIG_EXT2_FS=y
782# CONFIG_EXT2_FS_XATTR is not set
783# CONFIG_EXT2_FS_XIP is not set
784CONFIG_EXT3_FS=y
785# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
786CONFIG_EXT3_FS_XATTR=y
787# CONFIG_EXT3_FS_POSIX_ACL is not set
788# CONFIG_EXT3_FS_SECURITY is not set
789# CONFIG_EXT4_FS is not set
790CONFIG_JBD=y
791CONFIG_FS_MBCACHE=y
792# CONFIG_REISERFS_FS is not set
793# CONFIG_JFS_FS is not set
794# CONFIG_FS_POSIX_ACL is not set
795# CONFIG_XFS_FS is not set
796# CONFIG_GFS2_FS is not set
797# CONFIG_OCFS2_FS is not set
798# CONFIG_BTRFS_FS is not set
799# CONFIG_NILFS2_FS is not set
800CONFIG_FILE_LOCKING=y
801CONFIG_FSNOTIFY=y
802CONFIG_DNOTIFY=y
803CONFIG_INOTIFY=y
804CONFIG_INOTIFY_USER=y
805# CONFIG_QUOTA is not set
806# CONFIG_AUTOFS_FS is not set
807# CONFIG_AUTOFS4_FS is not set
808# CONFIG_FUSE_FS is not set
809
810#
811# Caches
812#
813# CONFIG_FSCACHE is not set
814
815#
816# CD-ROM/DVD Filesystems
817#
818CONFIG_ISO9660_FS=y
819# CONFIG_JOLIET is not set
820# CONFIG_ZISOFS is not set
821# CONFIG_UDF_FS is not set
822
823#
824# DOS/FAT/NT Filesystems
825#
826CONFIG_FAT_FS=y
827# CONFIG_MSDOS_FS is not set
828CONFIG_VFAT_FS=y
829CONFIG_FAT_DEFAULT_CODEPAGE=437
830CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
831# CONFIG_NTFS_FS is not set
832
833#
834# Pseudo filesystems
835#
836CONFIG_PROC_FS=y
837CONFIG_PROC_KCORE=y
838CONFIG_PROC_SYSCTL=y
839CONFIG_PROC_PAGE_MONITOR=y
840CONFIG_SYSFS=y
841CONFIG_TMPFS=y
842# CONFIG_TMPFS_POSIX_ACL is not set
843# CONFIG_HUGETLBFS is not set
844# CONFIG_HUGETLB_PAGE is not set
845# CONFIG_CONFIGFS_FS is not set
846CONFIG_MISC_FILESYSTEMS=y
847# CONFIG_ADFS_FS is not set
848# CONFIG_AFFS_FS is not set
849# CONFIG_HFS_FS is not set
850# CONFIG_HFSPLUS_FS is not set
851# CONFIG_BEFS_FS is not set
852# CONFIG_BFS_FS is not set
853# CONFIG_EFS_FS is not set
854# CONFIG_LOGFS is not set
855# CONFIG_CRAMFS is not set
856CONFIG_SQUASHFS=y
857# CONFIG_SQUASHFS_XATTRS is not set
858# CONFIG_SQUASHFS_EMBEDDED is not set
859CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
860# CONFIG_VXFS_FS is not set
861CONFIG_MINIX_FS=y
862# CONFIG_OMFS_FS is not set
863# CONFIG_HPFS_FS is not set
864# CONFIG_QNX4FS_FS is not set
865# CONFIG_ROMFS_FS is not set
866# CONFIG_SYSV_FS is not set
867# CONFIG_UFS_FS is not set
868CONFIG_NETWORK_FILESYSTEMS=y
869CONFIG_NFS_FS=y
870# CONFIG_NFS_V3 is not set
871# CONFIG_NFS_V4 is not set
872CONFIG_ROOT_NFS=y
873# CONFIG_NFSD is not set
874CONFIG_LOCKD=y
875CONFIG_NFS_COMMON=y
876CONFIG_SUNRPC=y
877# CONFIG_RPCSEC_GSS_KRB5 is not set
878# CONFIG_RPCSEC_GSS_SPKM3 is not set
879# CONFIG_SMB_FS is not set
880# CONFIG_CEPH_FS is not set
881# CONFIG_CIFS is not set
882# CONFIG_NCP_FS is not set
883# CONFIG_CODA_FS is not set
884# CONFIG_AFS_FS is not set
885
886#
887# Partition Types
888#
889# CONFIG_PARTITION_ADVANCED is not set
890CONFIG_MSDOS_PARTITION=y
891CONFIG_NLS=y
892CONFIG_NLS_DEFAULT="iso8859-1"
893CONFIG_NLS_CODEPAGE_437=y
894# CONFIG_NLS_CODEPAGE_737 is not set
895# CONFIG_NLS_CODEPAGE_775 is not set
896# CONFIG_NLS_CODEPAGE_850 is not set
897# CONFIG_NLS_CODEPAGE_852 is not set
898# CONFIG_NLS_CODEPAGE_855 is not set
899# CONFIG_NLS_CODEPAGE_857 is not set
900# CONFIG_NLS_CODEPAGE_860 is not set
901# CONFIG_NLS_CODEPAGE_861 is not set
902# CONFIG_NLS_CODEPAGE_862 is not set
903# CONFIG_NLS_CODEPAGE_863 is not set
904# CONFIG_NLS_CODEPAGE_864 is not set
905# CONFIG_NLS_CODEPAGE_865 is not set
906# CONFIG_NLS_CODEPAGE_866 is not set
907# CONFIG_NLS_CODEPAGE_869 is not set
908# CONFIG_NLS_CODEPAGE_936 is not set
909# CONFIG_NLS_CODEPAGE_950 is not set
910CONFIG_NLS_CODEPAGE_932=y
911# CONFIG_NLS_CODEPAGE_949 is not set
912# CONFIG_NLS_CODEPAGE_874 is not set
913# CONFIG_NLS_ISO8859_8 is not set
914# CONFIG_NLS_CODEPAGE_1250 is not set
915# CONFIG_NLS_CODEPAGE_1251 is not set
916# CONFIG_NLS_ASCII is not set
917CONFIG_NLS_ISO8859_1=y
918# CONFIG_NLS_ISO8859_2 is not set
919# CONFIG_NLS_ISO8859_3 is not set
920# CONFIG_NLS_ISO8859_4 is not set
921# CONFIG_NLS_ISO8859_5 is not set
922# CONFIG_NLS_ISO8859_6 is not set
923# CONFIG_NLS_ISO8859_7 is not set
924# CONFIG_NLS_ISO8859_9 is not set
925# CONFIG_NLS_ISO8859_13 is not set
926# CONFIG_NLS_ISO8859_14 is not set
927# CONFIG_NLS_ISO8859_15 is not set
928# CONFIG_NLS_KOI8_R is not set
929# CONFIG_NLS_KOI8_U is not set
930# CONFIG_NLS_UTF8 is not set
931# CONFIG_DLM is not set
932
933#
934# Kernel hacking
935#
936CONFIG_TRACE_IRQFLAGS_SUPPORT=y
937# CONFIG_PRINTK_TIME is not set
938CONFIG_ENABLE_WARN_DEPRECATED=y
939CONFIG_ENABLE_MUST_CHECK=y
940CONFIG_FRAME_WARN=1024
941# CONFIG_MAGIC_SYSRQ is not set
942# CONFIG_STRIP_ASM_SYMS is not set
943# CONFIG_UNUSED_SYMBOLS is not set
944# CONFIG_DEBUG_FS is not set
945# CONFIG_HEADERS_CHECK is not set
946CONFIG_DEBUG_KERNEL=y
947# CONFIG_DEBUG_SHIRQ is not set
948# CONFIG_DETECT_SOFTLOCKUP is not set
949# CONFIG_DETECT_HUNG_TASK is not set
950# CONFIG_SCHED_DEBUG is not set
951# CONFIG_SCHEDSTATS is not set
952# CONFIG_TIMER_STATS is not set
953# CONFIG_DEBUG_OBJECTS is not set
954# CONFIG_DEBUG_SLAB is not set
955# CONFIG_DEBUG_KMEMLEAK is not set
956# CONFIG_DEBUG_RT_MUTEXES is not set
957# CONFIG_RT_MUTEX_TESTER is not set
958# CONFIG_DEBUG_SPINLOCK is not set
959# CONFIG_DEBUG_MUTEXES is not set
960# CONFIG_DEBUG_LOCK_ALLOC is not set
961# CONFIG_PROVE_LOCKING is not set
962# CONFIG_LOCK_STAT is not set
963# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
964# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
965# CONFIG_DEBUG_KOBJECT is not set
966# CONFIG_DEBUG_BUGVERBOSE is not set
967CONFIG_DEBUG_INFO=y
968# CONFIG_DEBUG_VM is not set
969# CONFIG_DEBUG_WRITECOUNT is not set
970# CONFIG_DEBUG_MEMORY_INIT is not set
971# CONFIG_DEBUG_LIST is not set
972# CONFIG_DEBUG_SG is not set
973# CONFIG_DEBUG_NOTIFIERS is not set
974# CONFIG_DEBUG_CREDENTIALS is not set
975# CONFIG_FRAME_POINTER is not set
976# CONFIG_RCU_TORTURE_TEST is not set
977# CONFIG_RCU_CPU_STALL_DETECTOR is not set
978# CONFIG_BACKTRACE_SELF_TEST is not set
979# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
980# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
981# CONFIG_FAULT_INJECTION is not set
982# CONFIG_LATENCYTOP is not set
983# CONFIG_SYSCTL_SYSCALL_CHECK is not set
984# CONFIG_PAGE_POISONING is not set
985CONFIG_HAVE_FUNCTION_TRACER=y
986CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
987CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
988CONFIG_HAVE_DYNAMIC_FTRACE=y
989CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
990CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
991CONFIG_TRACING_SUPPORT=y
992# CONFIG_FTRACE is not set
993# CONFIG_DMA_API_DEBUG is not set
994# CONFIG_ATOMIC64_SELFTEST is not set
995# CONFIG_SAMPLES is not set
996CONFIG_HAVE_ARCH_KGDB=y
997# CONFIG_KGDB is not set
998# CONFIG_SH_STANDARD_BIOS is not set
999# CONFIG_STACK_DEBUG is not set
1000# CONFIG_DEBUG_STACK_USAGE is not set
1001# CONFIG_4KSTACKS is not set
1002# CONFIG_DUMP_CODE is not set
1003# CONFIG_DWARF_UNWINDER is not set
1004# CONFIG_SH_NO_BSS_INIT is not set
1005
1006#
1007# Security options
1008#
1009# CONFIG_KEYS is not set
1010# CONFIG_SECURITY is not set
1011# CONFIG_SECURITYFS is not set
1012# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1013# CONFIG_DEFAULT_SECURITY_SMACK is not set
1014# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1015CONFIG_DEFAULT_SECURITY_DAC=y
1016CONFIG_DEFAULT_SECURITY=""
1017CONFIG_CRYPTO=y
1018
1019#
1020# Crypto core or helper
1021#
1022# CONFIG_CRYPTO_MANAGER is not set
1023# CONFIG_CRYPTO_MANAGER2 is not set
1024# CONFIG_CRYPTO_GF128MUL is not set
1025# CONFIG_CRYPTO_NULL is not set
1026# CONFIG_CRYPTO_CRYPTD is not set
1027# CONFIG_CRYPTO_AUTHENC is not set
1028# CONFIG_CRYPTO_TEST is not set
1029
1030#
1031# Authenticated Encryption with Associated Data
1032#
1033# CONFIG_CRYPTO_CCM is not set
1034# CONFIG_CRYPTO_GCM is not set
1035# CONFIG_CRYPTO_SEQIV is not set
1036
1037#
1038# Block modes
1039#
1040# CONFIG_CRYPTO_CBC is not set
1041# CONFIG_CRYPTO_CTR is not set
1042# CONFIG_CRYPTO_CTS is not set
1043# CONFIG_CRYPTO_ECB is not set
1044# CONFIG_CRYPTO_LRW is not set
1045# CONFIG_CRYPTO_PCBC is not set
1046# CONFIG_CRYPTO_XTS is not set
1047
1048#
1049# Hash modes
1050#
1051# CONFIG_CRYPTO_HMAC is not set
1052# CONFIG_CRYPTO_XCBC is not set
1053# CONFIG_CRYPTO_VMAC is not set
1054
1055#
1056# Digest
1057#
1058# CONFIG_CRYPTO_CRC32C is not set
1059# CONFIG_CRYPTO_GHASH is not set
1060# CONFIG_CRYPTO_MD4 is not set
1061# CONFIG_CRYPTO_MD5 is not set
1062# CONFIG_CRYPTO_MICHAEL_MIC is not set
1063# CONFIG_CRYPTO_RMD128 is not set
1064# CONFIG_CRYPTO_RMD160 is not set
1065# CONFIG_CRYPTO_RMD256 is not set
1066# CONFIG_CRYPTO_RMD320 is not set
1067# CONFIG_CRYPTO_SHA1 is not set
1068# CONFIG_CRYPTO_SHA256 is not set
1069# CONFIG_CRYPTO_SHA512 is not set
1070# CONFIG_CRYPTO_TGR192 is not set
1071# CONFIG_CRYPTO_WP512 is not set
1072
1073#
1074# Ciphers
1075#
1076# CONFIG_CRYPTO_AES is not set
1077# CONFIG_CRYPTO_ANUBIS is not set
1078# CONFIG_CRYPTO_ARC4 is not set
1079# CONFIG_CRYPTO_BLOWFISH is not set
1080# CONFIG_CRYPTO_CAMELLIA is not set
1081# CONFIG_CRYPTO_CAST5 is not set
1082# CONFIG_CRYPTO_CAST6 is not set
1083# CONFIG_CRYPTO_DES is not set
1084# CONFIG_CRYPTO_FCRYPT is not set
1085# CONFIG_CRYPTO_KHAZAD is not set
1086# CONFIG_CRYPTO_SALSA20 is not set
1087# CONFIG_CRYPTO_SEED is not set
1088# CONFIG_CRYPTO_SERPENT is not set
1089# CONFIG_CRYPTO_TEA is not set
1090# CONFIG_CRYPTO_TWOFISH is not set
1091
1092#
1093# Compression
1094#
1095# CONFIG_CRYPTO_DEFLATE is not set
1096# CONFIG_CRYPTO_ZLIB is not set
1097# CONFIG_CRYPTO_LZO is not set
1098
1099#
1100# Random Number Generation
1101#
1102# CONFIG_CRYPTO_ANSI_CPRNG is not set
1103CONFIG_CRYPTO_HW=y
1104# CONFIG_VIRTUALIZATION is not set
1105# CONFIG_BINARY_PRINTF is not set
1106
1107#
1108# Library routines
1109#
1110CONFIG_BITREVERSE=y
1111CONFIG_GENERIC_FIND_LAST_BIT=y
1112# CONFIG_CRC_CCITT is not set
1113# CONFIG_CRC16 is not set
1114# CONFIG_CRC_T10DIF is not set
1115# CONFIG_CRC_ITU_T is not set
1116CONFIG_CRC32=y
1117# CONFIG_CRC7 is not set
1118# CONFIG_LIBCRC32C is not set
1119CONFIG_ZLIB_INFLATE=y
1120CONFIG_DECOMPRESS_GZIP=y
1121CONFIG_HAS_IOMEM=y
1122CONFIG_HAS_IOPORT=y
1123CONFIG_HAS_DMA=y
1124CONFIG_HAVE_LMB=y
1125CONFIG_NLATTR=y
1126CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index f98141b3b7d7..86adb1e235cd 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -81,7 +81,7 @@ static int __init sh7751_pci_init(void)
81 unsigned int id; 81 unsigned int id;
82 u32 word, reg; 82 u32 word, reg;
83 83
84 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 84 printk(KERN_NOTICE "PCI: Starting initialization.\n");
85 85
86 chan->reg_base = 0xfe200000; 86 chan->reg_base = 0xfe200000;
87 87
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index ffdcbf10b95e..edb7cca14882 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -246,7 +246,7 @@ static int __init sh7780_pci_init(void)
246 const char *type; 246 const char *type;
247 int ret, i; 247 int ret, i;
248 248
249 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 249 printk(KERN_NOTICE "PCI: Starting initialization.\n");
250 250
251 chan->reg_base = 0xfe040000; 251 chan->reg_base = 0xfe040000;
252 252
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index 68cb9b0ac9d2..78f378731858 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -392,7 +392,7 @@ static int __init sh7786_pcie_init(void)
392{ 392{
393 int ret = 0, i; 393 int ret = 0, i;
394 394
395 printk(KERN_NOTICE "PCI: Starting intialization.\n"); 395 printk(KERN_NOTICE "PCI: Starting initialization.\n");
396 396
397 sh7786_pcie_hwops = &sh7786_65nm_pcie_hwops; 397 sh7786_pcie_hwops = &sh7786_65nm_pcie_hwops;
398 398
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 46cb93477bcb..b4d3462f1dc3 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -8,3 +8,5 @@ unifdef-y += unistd_32.h
8unifdef-y += unistd_64.h 8unifdef-y += unistd_64.h
9unifdef-y += posix_types_32.h 9unifdef-y += posix_types_32.h
10unifdef-y += posix_types_64.h 10unifdef-y += posix_types_64.h
11unifdef-y += ptrace_32.h
12unifdef-y += ptrace_64.h
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index ce830faeebbf..f38112be67d2 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -50,25 +50,14 @@
50#define R_SH_GOTPC 167 50#define R_SH_GOTPC 167
51 51
52/* FDPIC relocs */ 52/* FDPIC relocs */
53#define R_SH_GOT20 70 53#define R_SH_GOT20 201
54#define R_SH_GOTOFF20 71 54#define R_SH_GOTOFF20 202
55#define R_SH_GOTFUNCDESC 72 55#define R_SH_GOTFUNCDESC 203
56#define R_SH_GOTFUNCDESC20 73 56#define R_SH_GOTFUNCDESC20 204
57#define R_SH_GOTOFFFUNCDESC 74 57#define R_SH_GOTOFFFUNCDESC 205
58#define R_SH_GOTOFFFUNCDESC20 75 58#define R_SH_GOTOFFFUNCDESC20 206
59#define R_SH_FUNCDESC 76 59#define R_SH_FUNCDESC 207
60#define R_SH_FUNCDESC_VALUE 77 60#define R_SH_FUNCDESC_VALUE 208
61
62#if 0 /* XXX - later .. */
63#define R_SH_GOT20 198
64#define R_SH_GOTOFF20 199
65#define R_SH_GOTFUNCDESC 200
66#define R_SH_GOTFUNCDESC20 201
67#define R_SH_GOTOFFFUNCDESC 202
68#define R_SH_GOTOFFFUNCDESC20 203
69#define R_SH_FUNCDESC 204
70#define R_SH_FUNCDESC_VALUE 205
71#endif
72 61
73/* SHmedia relocs */ 62/* SHmedia relocs */
74#define R_SH_IMM_LOW16 246 63#define R_SH_IMM_LOW16 246
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index 6e7cea453895..bd7e79a12653 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -58,7 +58,7 @@ enum fixed_addresses {
58 58
59#ifdef CONFIG_HIGHMEM 59#ifdef CONFIG_HIGHMEM
60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 61 FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1,
62#endif 62#endif
63 63
64#ifdef CONFIG_IOREMAP_FIXED 64#ifdef CONFIG_IOREMAP_FIXED
@@ -69,7 +69,7 @@ enum fixed_addresses {
69 */ 69 */
70#define FIX_N_IOREMAPS 32 70#define FIX_N_IOREMAPS 32
71 FIX_IOREMAP_BEGIN, 71 FIX_IOREMAP_BEGIN,
72 FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS, 72 FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS - 1,
73#endif 73#endif
74 74
75 __end_of_fixed_addresses 75 __end_of_fixed_addresses
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 02c2f0102cfa..45d08b6a5ef7 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -9,7 +9,7 @@
9 * advised to cap this at the hard limit that they're interested in 9 * advised to cap this at the hard limit that they're interested in
10 * through the machvec. 10 * through the machvec.
11 */ 11 */
12#define NR_IRQS 256 12#define NR_IRQS 512
13#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */ 13#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
14 14
15/* 15/*
diff --git a/arch/sh/include/asm/kprobes.h b/arch/sh/include/asm/kprobes.h
index 036c3311233c..134f3980e44a 100644
--- a/arch/sh/include/asm/kprobes.h
+++ b/arch/sh/include/asm/kprobes.h
@@ -16,7 +16,6 @@ typedef insn_size_t kprobe_opcode_t;
16 ? (MAX_STACK_SIZE) \ 16 ? (MAX_STACK_SIZE) \
17 : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) 17 : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR)))
18 18
19#define regs_return_value(_regs) ((_regs)->regs[0])
20#define flush_insn_slot(p) do { } while (0) 19#define flush_insn_slot(p) do { } while (0)
21#define kretprobe_blacklist_size 0 20#define kretprobe_blacklist_size 0
22 21
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 61a445d2d02a..46d5179c9f49 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -13,7 +13,6 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/types.h> 15#include <asm/types.h>
16#include <asm/ptrace.h>
17#include <asm/hw_breakpoint.h> 16#include <asm/hw_breakpoint.h>
18 17
19/* 18/*
@@ -194,8 +193,6 @@ extern unsigned long get_wchan(struct task_struct *p);
194#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) 193#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
195#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) 194#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
196 195
197#define user_stack_pointer(_regs) ((_regs)->regs[15])
198
199#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) 196#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
200#define PREFETCH_STRIDE L1_CACHE_BYTES 197#define PREFETCH_STRIDE L1_CACHE_BYTES
201#define ARCH_HAS_PREFETCH 198#define ARCH_HAS_PREFETCH
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 621bc4618c6b..2a541ddb5a1b 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -17,7 +17,6 @@
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/types.h> 19#include <asm/types.h>
20#include <asm/ptrace.h>
21#include <cpu/registers.h> 20#include <cpu/registers.h>
22 21
23/* 22/*
@@ -231,7 +230,5 @@ extern unsigned long get_wchan(struct task_struct *p);
231#define KSTK_EIP(tsk) ((tsk)->thread.pc) 230#define KSTK_EIP(tsk) ((tsk)->thread.pc)
232#define KSTK_ESP(tsk) ((tsk)->thread.sp) 231#define KSTK_ESP(tsk) ((tsk)->thread.sp)
233 232
234#define user_stack_pointer(_regs) ((_regs)->regs[15])
235
236#endif /* __ASSEMBLY__ */ 233#endif /* __ASSEMBLY__ */
237#endif /* __ASM_SH_PROCESSOR_64_H */ 234#endif /* __ASM_SH_PROCESSOR_64_H */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 2168fde25611..f6edc10aa0d3 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -3,90 +3,7 @@
3 3
4/* 4/*
5 * Copyright (C) 1999, 2000 Niibe Yutaka 5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 *
7 */
8#if defined(__SH5__)
9struct pt_regs {
10 unsigned long long pc;
11 unsigned long long sr;
12 long long syscall_nr;
13 unsigned long long regs[63];
14 unsigned long long tregs[8];
15 unsigned long long pad[2];
16};
17#else
18/*
19 * GCC defines register number like this:
20 * -----------------------------
21 * 0 - 15 are integer registers
22 * 17 - 22 are control/special registers
23 * 24 - 39 fp registers
24 * 40 - 47 xd registers
25 * 48 - fpscr register
26 * -----------------------------
27 *
28 * We follows above, except:
29 * 16 --- program counter (PC)
30 * 22 --- syscall #
31 * 23 --- floating point communication register
32 */ 6 */
33#define REG_REG0 0
34#define REG_REG15 15
35
36#define REG_PC 16
37
38#define REG_PR 17
39#define REG_SR 18
40#define REG_GBR 19
41#define REG_MACH 20
42#define REG_MACL 21
43
44#define REG_SYSCALL 22
45
46#define REG_FPREG0 23
47#define REG_FPREG15 38
48#define REG_XFREG0 39
49#define REG_XFREG15 54
50
51#define REG_FPSCR 55
52#define REG_FPUL 56
53
54/*
55 * This struct defines the way the registers are stored on the
56 * kernel stack during a system call or other kernel entry.
57 */
58struct pt_regs {
59 unsigned long regs[16];
60 unsigned long pc;
61 unsigned long pr;
62 unsigned long sr;
63 unsigned long gbr;
64 unsigned long mach;
65 unsigned long macl;
66 long tra;
67};
68
69/*
70 * This struct defines the way the DSP registers are stored on the
71 * kernel stack during a system call or other kernel entry.
72 */
73struct pt_dspregs {
74 unsigned long a1;
75 unsigned long a0g;
76 unsigned long a1g;
77 unsigned long m0;
78 unsigned long m1;
79 unsigned long a0;
80 unsigned long x0;
81 unsigned long x1;
82 unsigned long y0;
83 unsigned long y1;
84 unsigned long dsr;
85 unsigned long rs;
86 unsigned long re;
87 unsigned long mod;
88};
89#endif
90 7
91#define PTRACE_GETREGS 12 /* General registers */ 8#define PTRACE_GETREGS 12 /* General registers */
92#define PTRACE_SETREGS 13 9#define PTRACE_SETREGS 13
@@ -107,22 +24,102 @@ struct pt_dspregs {
107#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ 24#define PT_DATA_ADDR 248 /* &(struct user)->start_data */
108#define PT_TEXT_LEN 252 25#define PT_TEXT_LEN 252
109 26
27#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
28#include "ptrace_64.h"
29#else
30#include "ptrace_32.h"
31#endif
32
110#ifdef __KERNEL__ 33#ifdef __KERNEL__
34
35#include <linux/stringify.h>
36#include <linux/stddef.h>
37#include <linux/thread_info.h>
111#include <asm/addrspace.h> 38#include <asm/addrspace.h>
112#include <asm/page.h> 39#include <asm/page.h>
113#include <asm/system.h> 40#include <asm/system.h>
114 41
115#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 42#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
43#define user_stack_pointer(regs) ((unsigned long)(regs)->regs[15])
44#define kernel_stack_pointer(regs) ((unsigned long)(regs)->regs[15])
116#define instruction_pointer(regs) ((unsigned long)(regs)->pc) 45#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
117 46
118extern void show_regs(struct pt_regs *); 47extern void show_regs(struct pt_regs *);
119 48
49#define arch_has_single_step() (1)
50
120/* 51/*
121 * These are defined as per linux/ptrace.h. 52 * kprobe-based event tracer support
122 */ 53 */
123struct task_struct; 54struct pt_regs_offset {
55 const char *name;
56 int offset;
57};
124 58
125#define arch_has_single_step() (1) 59#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
60#define REGS_OFFSET_NAME(num) \
61 {.name = __stringify(r##num), .offset = offsetof(struct pt_regs, regs[num])}
62#define TREGS_OFFSET_NAME(num) \
63 {.name = __stringify(tr##num), .offset = offsetof(struct pt_regs, tregs[num])}
64#define REG_OFFSET_END {.name = NULL, .offset = 0}
65
66/* Query offset/name of register from its name/offset */
67extern int regs_query_register_offset(const char *name);
68extern const char *regs_query_register_name(unsigned int offset);
69
70extern const struct pt_regs_offset regoffset_table[];
71
72/**
73 * regs_get_register() - get register value from its offset
74 * @regs: pt_regs from which register value is gotten.
75 * @offset: offset number of the register.
76 *
77 * regs_get_register returns the value of a register. The @offset is the
78 * offset of the register in struct pt_regs address which specified by @regs.
79 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
80 */
81static inline unsigned long regs_get_register(struct pt_regs *regs,
82 unsigned int offset)
83{
84 if (unlikely(offset > MAX_REG_OFFSET))
85 return 0;
86 return *(unsigned long *)((unsigned long)regs + offset);
87}
88
89/**
90 * regs_within_kernel_stack() - check the address in the stack
91 * @regs: pt_regs which contains kernel stack pointer.
92 * @addr: address which is checked.
93 *
94 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
95 * If @addr is within the kernel stack, it returns true. If not, returns false.
96 */
97static inline int regs_within_kernel_stack(struct pt_regs *regs,
98 unsigned long addr)
99{
100 return ((addr & ~(THREAD_SIZE - 1)) ==
101 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
102}
103
104/**
105 * regs_get_kernel_stack_nth() - get Nth entry of the stack
106 * @regs: pt_regs which contains kernel stack pointer.
107 * @n: stack entry number.
108 *
109 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
110 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
111 * this returns 0.
112 */
113static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
114 unsigned int n)
115{
116 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
117 addr += n;
118 if (regs_within_kernel_stack(regs, (unsigned long)addr))
119 return *addr;
120 else
121 return 0;
122}
126 123
127struct perf_event; 124struct perf_event;
128struct perf_sample_data; 125struct perf_sample_data;
diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h
new file mode 100644
index 000000000000..35d9e257558c
--- /dev/null
+++ b/arch/sh/include/asm/ptrace_32.h
@@ -0,0 +1,83 @@
1#ifndef __ASM_SH_PTRACE_32_H
2#define __ASM_SH_PTRACE_32_H
3
4/*
5 * GCC defines register number like this:
6 * -----------------------------
7 * 0 - 15 are integer registers
8 * 17 - 22 are control/special registers
9 * 24 - 39 fp registers
10 * 40 - 47 xd registers
11 * 48 - fpscr register
12 * -----------------------------
13 *
14 * We follows above, except:
15 * 16 --- program counter (PC)
16 * 22 --- syscall #
17 * 23 --- floating point communication register
18 */
19#define REG_REG0 0
20#define REG_REG15 15
21
22#define REG_PC 16
23
24#define REG_PR 17
25#define REG_SR 18
26#define REG_GBR 19
27#define REG_MACH 20
28#define REG_MACL 21
29
30#define REG_SYSCALL 22
31
32#define REG_FPREG0 23
33#define REG_FPREG15 38
34#define REG_XFREG0 39
35#define REG_XFREG15 54
36
37#define REG_FPSCR 55
38#define REG_FPUL 56
39
40/*
41 * This struct defines the way the registers are stored on the
42 * kernel stack during a system call or other kernel entry.
43 */
44struct pt_regs {
45 unsigned long regs[16];
46 unsigned long pc;
47 unsigned long pr;
48 unsigned long sr;
49 unsigned long gbr;
50 unsigned long mach;
51 unsigned long macl;
52 long tra;
53};
54
55/*
56 * This struct defines the way the DSP registers are stored on the
57 * kernel stack during a system call or other kernel entry.
58 */
59struct pt_dspregs {
60 unsigned long a1;
61 unsigned long a0g;
62 unsigned long a1g;
63 unsigned long m0;
64 unsigned long m1;
65 unsigned long a0;
66 unsigned long x0;
67 unsigned long x1;
68 unsigned long y0;
69 unsigned long y1;
70 unsigned long dsr;
71 unsigned long rs;
72 unsigned long re;
73 unsigned long mod;
74};
75
76#ifdef __KERNEL__
77
78#define MAX_REG_OFFSET offsetof(struct pt_regs, tra)
79#define regs_return_value(regs) ((regs)->regs[0])
80
81#endif /* __KERNEL__ */
82
83#endif /* __ASM_SH_PTRACE_32_H */
diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h
new file mode 100644
index 000000000000..d43c1cb0bbe7
--- /dev/null
+++ b/arch/sh/include/asm/ptrace_64.h
@@ -0,0 +1,20 @@
1#ifndef __ASM_SH_PTRACE_64_H
2#define __ASM_SH_PTRACE_64_H
3
4struct pt_regs {
5 unsigned long long pc;
6 unsigned long long sr;
7 long long syscall_nr;
8 unsigned long long regs[63];
9 unsigned long long tregs[8];
10 unsigned long long pad[2];
11};
12
13#ifdef __KERNEL__
14
15#define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7])
16#define regs_return_value(regs) ((regs)->regs[3])
17
18#endif /* __KERNEL__ */
19
20#endif /* __ASM_SH_PTRACE_64_H */
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 51296b36770e..9bd2684f908e 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -216,13 +216,12 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
216 216
217static inline void trigger_address_error(void) 217static inline void trigger_address_error(void)
218{ 218{
219 if (__in_29bit_mode()) 219 __asm__ __volatile__ (
220 __asm__ __volatile__ ( 220 "ldc %0, sr\n\t"
221 "ldc %0, sr\n\t" 221 "mov.l @%1, %0"
222 "mov.l @%1, %0" 222 :
223 : 223 : "r" (0x10000000), "r" (0x80000001)
224 : "r" (0x10000000), "r" (0x80000001) 224 );
225 );
226} 225}
227 226
228asmlinkage void do_address_error(struct pt_regs *regs, 227asmlinkage void do_address_error(struct pt_regs *regs,
diff --git a/arch/sh/include/asm/tlbflush.h b/arch/sh/include/asm/tlbflush.h
index e0ac97221ae6..0df66f0c7284 100644
--- a/arch/sh/include/asm/tlbflush.h
+++ b/arch/sh/include/asm/tlbflush.h
@@ -21,6 +21,8 @@ extern void local_flush_tlb_kernel_range(unsigned long start,
21 unsigned long end); 21 unsigned long end);
22extern void local_flush_tlb_one(unsigned long asid, unsigned long page); 22extern void local_flush_tlb_one(unsigned long asid, unsigned long page);
23 23
24extern void __flush_tlb_global(void);
25
24#ifdef CONFIG_SMP 26#ifdef CONFIG_SMP
25 27
26extern void flush_tlb_all(void); 28extern void flush_tlb_all(void);
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h
index f4d267efad71..15f3de11c55a 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7757.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h
@@ -3,241 +3,252 @@
3 3
4enum { 4enum {
5 /* PTA */ 5 /* PTA */
6 GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4, 6 GPIO_PTA0, GPIO_PTA1, GPIO_PTA2, GPIO_PTA3,
7 GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0, 7 GPIO_PTA4, GPIO_PTA5, GPIO_PTA6, GPIO_PTA7,
8 8
9 /* PTB */ 9 /* PTB */
10 GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4, 10 GPIO_PTB0, GPIO_PTB1, GPIO_PTB2, GPIO_PTB3,
11 GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0, 11 GPIO_PTB4, GPIO_PTB5, GPIO_PTB6, GPIO_PTB7,
12 12
13 /* PTC */ 13 /* PTC */
14 GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4, 14 GPIO_PTC0, GPIO_PTC1, GPIO_PTC2, GPIO_PTC3,
15 GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0, 15 GPIO_PTC4, GPIO_PTC5, GPIO_PTC6, GPIO_PTC7,
16 16
17 /* PTD */ 17 /* PTD */
18 GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4, 18 GPIO_PTD0, GPIO_PTD1, GPIO_PTD2, GPIO_PTD3,
19 GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0, 19 GPIO_PTD4, GPIO_PTD5, GPIO_PTD6, GPIO_PTD7,
20 20
21 /* PTE */ 21 /* PTE */
22 GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4, 22 GPIO_PTE0, GPIO_PTE1, GPIO_PTE2, GPIO_PTE3,
23 GPIO_PTE3, GPIO_PTE2, GPIO_PTE1, GPIO_PTE0, 23 GPIO_PTE4, GPIO_PTE5, GPIO_PTE6, GPIO_PTE7,
24 24
25 /* PTF */ 25 /* PTF */
26 GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4, 26 GPIO_PTF0, GPIO_PTF1, GPIO_PTF2, GPIO_PTF3,
27 GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0, 27 GPIO_PTF4, GPIO_PTF5, GPIO_PTF6, GPIO_PTF7,
28 28
29 /* PTG */ 29 /* PTG */
30 GPIO_PTG7, GPIO_PTG6, GPIO_PTG5, GPIO_PTG4, 30 GPIO_PTG0, GPIO_PTG1, GPIO_PTG2, GPIO_PTG3,
31 GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0, 31 GPIO_PTG4, GPIO_PTG5, GPIO_PTG6, GPIO_PTG7,
32 32
33 /* PTH */ 33 /* PTH */
34 GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4, 34 GPIO_PTH0, GPIO_PTH1, GPIO_PTH2, GPIO_PTH3,
35 GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0, 35 GPIO_PTH4, GPIO_PTH5, GPIO_PTH6, GPIO_PTH7,
36 36
37 /* PTI */ 37 /* PTI */
38 GPIO_PTI7, GPIO_PTI6, GPIO_PTI5, GPIO_PTI4, 38 GPIO_PTI0, GPIO_PTI1, GPIO_PTI2, GPIO_PTI3,
39 GPIO_PTI3, GPIO_PTI2, GPIO_PTI1, GPIO_PTI0, 39 GPIO_PTI4, GPIO_PTI5, GPIO_PTI6, GPIO_PTI7,
40 40
41 /* PTJ */ 41 /* PTJ */
42 GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ4, 42 GPIO_PTJ0, GPIO_PTJ1, GPIO_PTJ2, GPIO_PTJ3,
43 GPIO_PTJ3, GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0, 43 GPIO_PTJ4, GPIO_PTJ5, GPIO_PTJ6, GPIO_PTJ7_RESV,
44 44
45 /* PTK */ 45 /* PTK */
46 GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4, 46 GPIO_PTK0, GPIO_PTK1, GPIO_PTK2, GPIO_PTK3,
47 GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0, 47 GPIO_PTK4, GPIO_PTK5, GPIO_PTK6, GPIO_PTK7,
48 48
49 /* PTL */ 49 /* PTL */
50 GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4, 50 GPIO_PTL0, GPIO_PTL1, GPIO_PTL2, GPIO_PTL3,
51 GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0, 51 GPIO_PTL4, GPIO_PTL5, GPIO_PTL6, GPIO_PTL7_RESV,
52 52
53 /* PTM */ 53 /* PTM */
54 GPIO_PTM6, GPIO_PTM5, GPIO_PTM4, 54 GPIO_PTM0, GPIO_PTM1, GPIO_PTM2, GPIO_PTM3,
55 GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0, 55 GPIO_PTM4, GPIO_PTM5, GPIO_PTM6, GPIO_PTM7,
56 56
57 /* PTN */ 57 /* PTN */
58 GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4, 58 GPIO_PTN0, GPIO_PTN1, GPIO_PTN2, GPIO_PTN3,
59 GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0, 59 GPIO_PTN4, GPIO_PTN5, GPIO_PTN6, GPIO_PTN7_RESV,
60 60
61 /* PTO */ 61 /* PTO */
62 GPIO_PTO7, GPIO_PTO6, GPIO_PTO5, GPIO_PTO4, 62 GPIO_PTO0, GPIO_PTO1, GPIO_PTO2, GPIO_PTO3,
63 GPIO_PTO3, GPIO_PTO2, GPIO_PTO1, GPIO_PTO0, 63 GPIO_PTO4, GPIO_PTO5, GPIO_PTO6, GPIO_PTO7,
64 64
65 /* PTP */ 65 /* PTP */
66 GPIO_PTP6, GPIO_PTP5, GPIO_PTP4, 66 GPIO_PTP0, GPIO_PTP1, GPIO_PTP2, GPIO_PTP3,
67 GPIO_PTP3, GPIO_PTP2, GPIO_PTP1, GPIO_PTP0, 67 GPIO_PTP4, GPIO_PTP5, GPIO_PTP6, GPIO_PTP7,
68 68
69 /* PTQ */ 69 /* PTQ */
70 GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4, 70 GPIO_PTQ0, GPIO_PTQ1, GPIO_PTQ2, GPIO_PTQ3,
71 GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0, 71 GPIO_PTQ4, GPIO_PTQ5, GPIO_PTQ6, GPIO_PTQ7_RESV,
72 72
73 /* PTR */ 73 /* PTR */
74 GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4, 74 GPIO_PTR0, GPIO_PTR1, GPIO_PTR2, GPIO_PTR3,
75 GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0, 75 GPIO_PTR4, GPIO_PTR5, GPIO_PTR6, GPIO_PTR7,
76 76
77 /* PTS */ 77 /* PTS */
78 GPIO_PTS7, GPIO_PTS6, GPIO_PTS5, GPIO_PTS4, 78 GPIO_PTS0, GPIO_PTS1, GPIO_PTS2, GPIO_PTS3,
79 GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0, 79 GPIO_PTS4, GPIO_PTS5, GPIO_PTS6, GPIO_PTS7,
80 80
81 /* PTT */ 81 /* PTT */
82 GPIO_PTT5, GPIO_PTT4, 82 GPIO_PTT0, GPIO_PTT1, GPIO_PTT2, GPIO_PTT3,
83 GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0, 83 GPIO_PTT4, GPIO_PTT5, GPIO_PTT6, GPIO_PTT7,
84 84
85 /* PTU */ 85 /* PTU */
86 GPIO_PTU7, GPIO_PTU6, GPIO_PTU5, GPIO_PTU4, 86 GPIO_PTU0, GPIO_PTU1, GPIO_PTU2, GPIO_PTU3,
87 GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0, 87 GPIO_PTU4, GPIO_PTU5, GPIO_PTU6, GPIO_PTU7,
88 88
89 /* PTV */ 89 /* PTV */
90 GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4, 90 GPIO_PTV0, GPIO_PTV1, GPIO_PTV2, GPIO_PTV3,
91 GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0, 91 GPIO_PTV4, GPIO_PTV5, GPIO_PTV6, GPIO_PTV7,
92 92
93 /* PTW */ 93 /* PTW */
94 GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4, 94 GPIO_PTW0, GPIO_PTW1, GPIO_PTW2, GPIO_PTW3,
95 GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0, 95 GPIO_PTW4, GPIO_PTW5, GPIO_PTW6, GPIO_PTW7,
96 96
97 /* PTX */ 97 /* PTX */
98 GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4, 98 GPIO_PTX0, GPIO_PTX1, GPIO_PTX2, GPIO_PTX3,
99 GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0, 99 GPIO_PTX4, GPIO_PTX5, GPIO_PTX6, GPIO_PTX7,
100 100
101 /* PTY */ 101 /* PTY */
102 GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4, 102 GPIO_PTY0, GPIO_PTY1, GPIO_PTY2, GPIO_PTY3,
103 GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0, 103 GPIO_PTY4, GPIO_PTY5, GPIO_PTY6, GPIO_PTY7,
104 104
105 /* PTZ */ 105 /* PTZ */
106 GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4, 106 GPIO_PTZ0, GPIO_PTZ1, GPIO_PTZ2, GPIO_PTZ3,
107 GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0, 107 GPIO_PTZ4, GPIO_PTZ5, GPIO_PTZ6, GPIO_PTZ7,
108 108
109 109
110 /* PTA (mobule: LBSC, CPG, LPC) */ 110 /* PTA (mobule: LBSC, RGMII) */
111 GPIO_FN_BS, GPIO_FN_RDWR, GPIO_FN_WE1, GPIO_FN_RDY, 111 GPIO_FN_BS, GPIO_FN_RDWR, GPIO_FN_WE1, GPIO_FN_RDY,
112 GPIO_FN_MD10, GPIO_FN_MD9, GPIO_FN_MD8, 112 GPIO_FN_ET0_MDC, GPIO_FN_ET0_MDIO,
113 GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4, 113 GPIO_FN_ET1_MDC, GPIO_FN_ET1_MDIO,
114 GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0,
115
116 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
117 GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,
118 GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,
119 GPIO_FN_ET0_MDC, GPIO_FN_ET0_MDIO,
120 GPIO_FN_ET1_MDC, GPIO_FN_ET1_MDIO,
121 GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST,
122 GPIO_FN_WPSZ1, GPIO_FN_WPSZ0, GPIO_FN_FWID, GPIO_FN_FLSHSZ,
123 GPIO_FN_LPC_SPIEN, GPIO_FN_BASEL,
124 114
125 /* PTC (mobule: SD) */ 115 /* PTB (mobule: INTC, ONFI, TMU) */
126 GPIO_FN_SD_WP, GPIO_FN_SD_CD, GPIO_FN_SD_CLK, GPIO_FN_SD_CMD, 116 GPIO_FN_IRQ15, GPIO_FN_IRQ14, GPIO_FN_IRQ13, GPIO_FN_IRQ12,
127 GPIO_FN_SD_D3, GPIO_FN_SD_D2, GPIO_FN_SD_D1, GPIO_FN_SD_D0, 117 GPIO_FN_IRQ11, GPIO_FN_IRQ10, GPIO_FN_IRQ9, GPIO_FN_IRQ8,
118 GPIO_FN_ON_NRE, GPIO_FN_ON_NWE, GPIO_FN_ON_NWP, GPIO_FN_ON_NCE0,
119 GPIO_FN_ON_R_B0, GPIO_FN_ON_ALE, GPIO_FN_ON_CLE,
120 GPIO_FN_TCLK,
128 121
129 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ 122 /* PTC (mobule: IRQ, PWMU) */
130 GPIO_FN_IRQ7, GPIO_FN_IRQ6, GPIO_FN_IRQ5, GPIO_FN_IRQ4, 123 GPIO_FN_IRQ7, GPIO_FN_IRQ6, GPIO_FN_IRQ5, GPIO_FN_IRQ4,
131 GPIO_FN_IRQ3, GPIO_FN_IRQ2, GPIO_FN_IRQ1, GPIO_FN_IRQ0, 124 GPIO_FN_IRQ3, GPIO_FN_IRQ2, GPIO_FN_IRQ1, GPIO_FN_IRQ0,
132 GPIO_FN_MD6, GPIO_FN_MD5, GPIO_FN_MD3, GPIO_FN_MD2, 125 GPIO_FN_PWMU0, GPIO_FN_PWMU1, GPIO_FN_PWMU2, GPIO_FN_PWMU3,
133 GPIO_FN_MD1, GPIO_FN_MD0, GPIO_FN_ADTRG1, GPIO_FN_ADTRG0, 126 GPIO_FN_PWMU4, GPIO_FN_PWMU5,
134 127
135 /* PTE (mobule: EtherC) */ 128 /* PTD (mobule: SPI0, DMAC) */
136 GPIO_FN_ET0_CRS_DV, GPIO_FN_ET0_TXD1, 129 GPIO_FN_SP0_MOSI, GPIO_FN_SP0_MISO, GPIO_FN_SP0_SCK,
137 GPIO_FN_ET0_TXD0, GPIO_FN_ET0_TX_EN, 130 GPIO_FN_SP0_SCK_FB, GPIO_FN_SP0_SS0, GPIO_FN_SP0_SS1,
138 GPIO_FN_ET0_REF_CLK, GPIO_FN_ET0_RXD1, 131 GPIO_FN_SP0_SS2, GPIO_FN_SP0_SS3, GPIO_FN_DREQ0,
139 GPIO_FN_ET0_RXD0, GPIO_FN_ET0_RX_ER, 132 GPIO_FN_DACK0, GPIO_FN_TEND0,
140 133
141 /* PTF (mobule: EtherC) */ 134 /* PTE (mobule: RMII) */
142 GPIO_FN_ET1_CRS_DV, GPIO_FN_ET1_TXD1, 135 GPIO_FN_RMII0_CRS_DV, GPIO_FN_RMII0_TXD1, GPIO_FN_RMII0_TXD0,
143 GPIO_FN_ET1_TXD0, GPIO_FN_ET1_TX_EN, 136 GPIO_FN_RMII0_TXEN, GPIO_FN_RMII0_REFCLK, GPIO_FN_RMII0_RXD1,
144 GPIO_FN_ET1_REF_CLK, GPIO_FN_ET1_RXD1, 137 GPIO_FN_RMII0_RXD0, GPIO_FN_RMII0_RX_ER,
145 GPIO_FN_ET1_RXD0, GPIO_FN_ET1_RX_ER, 138
146 139 /* PTF (mobule: RMII, SerMux) */
147 /* PTG (mobule: SYSTEM, PWMX, LPC) */ 140 GPIO_FN_RMII1_CRS_DV, GPIO_FN_RMII1_TXD1, GPIO_FN_RMII1_TXD0,
148 GPIO_FN_STATUS0, GPIO_FN_STATUS1, 141 GPIO_FN_RMII1_TXEN, GPIO_FN_RMII1_REFCLK, GPIO_FN_RMII1_RXD1,
149 GPIO_FN_PWX0, GPIO_FN_PWX1, GPIO_FN_PWX2, GPIO_FN_PWX3, 142 GPIO_FN_RMII1_RXD0, GPIO_FN_RMII1_RX_ER, GPIO_FN_RAC_RI,
150 GPIO_FN_SERIRQ, GPIO_FN_CLKRUN, GPIO_FN_LPCPD, GPIO_FN_LDRQ, 143
151 144 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
152 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ 145 GPIO_FN_BOOTFMS, GPIO_FN_BOOTWP,
153 GPIO_FN_TCLK, GPIO_FN_RXD4, GPIO_FN_TXD4, 146 GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_SERIRQ, GPIO_FN_WDTOVF,
147 GPIO_FN_LPCPD, GPIO_FN_LDRQ, GPIO_FN_MMCCLK, GPIO_FN_MMCCMD,
148
149 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
154 GPIO_FN_SP1_MOSI, GPIO_FN_SP1_MISO, 150 GPIO_FN_SP1_MOSI, GPIO_FN_SP1_MISO,
155 GPIO_FN_SP1_SCK, GPIO_FN_SP1_SCK_FB, 151 GPIO_FN_SP1_SCK, GPIO_FN_SP1_SCK_FB,
156 GPIO_FN_SP1_SS0, GPIO_FN_SP1_SS1, 152 GPIO_FN_SP1_SS0, GPIO_FN_SP1_SS1,
157 GPIO_FN_SP0_SS1, 153 GPIO_FN_WP, GPIO_FN_FMS0, GPIO_FN_TEND1, GPIO_FN_DREQ1,
158 154 GPIO_FN_DACK1, GPIO_FN_ADTRG1, GPIO_FN_ADTRG0,
159 /* PTI (mobule: INTC) */
160 GPIO_FN_IRQ15, GPIO_FN_IRQ14, GPIO_FN_IRQ13, GPIO_FN_IRQ12,
161 GPIO_FN_IRQ11, GPIO_FN_IRQ10, GPIO_FN_IRQ9, GPIO_FN_IRQ8,
162
163 /* PTJ (mobule: SCIF234, SERMUX) */
164 GPIO_FN_RXD3, GPIO_FN_TXD3, GPIO_FN_RXD2, GPIO_FN_TXD2,
165 GPIO_FN_COM1_TXD, GPIO_FN_COM1_RXD,
166 GPIO_FN_COM1_RTS, GPIO_FN_COM1_CTS,
167
168 /* PTK (mobule: SERMUX) */
169 GPIO_FN_COM2_TXD, GPIO_FN_COM2_RXD,
170 GPIO_FN_COM2_RTS, GPIO_FN_COM2_CTS,
171 GPIO_FN_COM2_DTR, GPIO_FN_COM2_DSR,
172 GPIO_FN_COM2_DCD, GPIO_FN_COM2_RI,
173 155
174 /* PTL (mobule: SERMUX) */ 156 /* PTI (mobule: LBSC, SDHI) */
175 GPIO_FN_RAC_TXD, GPIO_FN_RAC_RXD, 157 GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,
176 GPIO_FN_RAC_RTS, GPIO_FN_RAC_CTS, 158 GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,
177 GPIO_FN_RAC_DTR, GPIO_FN_RAC_DSR, 159 GPIO_FN_SD_WP, GPIO_FN_SD_CD, GPIO_FN_SD_CLK, GPIO_FN_SD_CMD,
178 GPIO_FN_RAC_DCD, GPIO_FN_RAC_RI, 160 GPIO_FN_SD_D3, GPIO_FN_SD_D2, GPIO_FN_SD_D1, GPIO_FN_SD_D0,
179 161
180 /* PTM (mobule: IIC, LPC) */ 162 /* PTJ (mobule: SCIF234) */
163 GPIO_FN_RTS3, GPIO_FN_CTS3, GPIO_FN_TXD3, GPIO_FN_RXD3,
164 GPIO_FN_RTS4, GPIO_FN_RXD4, GPIO_FN_TXD4,
165
166 /* PTK (mobule: SERMUX, LBSC, SCIF) */
167 GPIO_FN_COM2_TXD, GPIO_FN_COM2_RXD, GPIO_FN_COM2_RTS,
168 GPIO_FN_COM2_CTS, GPIO_FN_COM2_DTR, GPIO_FN_COM2_DSR,
169 GPIO_FN_COM2_DCD, GPIO_FN_CLKOUT,
170 GPIO_FN_SCK2, GPIO_FN_SCK4, GPIO_FN_SCK3,
171
172 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
173 GPIO_FN_RAC_RXD, GPIO_FN_RAC_RTS, GPIO_FN_RAC_CTS,
174 GPIO_FN_RAC_DTR, GPIO_FN_RAC_DSR, GPIO_FN_RAC_DCD,
175 GPIO_FN_RAC_TXD, GPIO_FN_RXD2, GPIO_FN_CS5,
176 GPIO_FN_CS6, GPIO_FN_AUDSYNC, GPIO_FN_AUDCK,
177 GPIO_FN_TXD2,
178
179 /* PTM (mobule: LBSC, IIC) */
180 GPIO_FN_CS4, GPIO_FN_RD, GPIO_FN_WE0, GPIO_FN_CS0,
181 GPIO_FN_SDA6, GPIO_FN_SCL6, GPIO_FN_SDA7, GPIO_FN_SCL7, 181 GPIO_FN_SDA6, GPIO_FN_SCL6, GPIO_FN_SDA7, GPIO_FN_SCL7,
182 GPIO_FN_WP, GPIO_FN_FMS0, GPIO_FN_FMS1,
183
184 /* PTN (mobule: SCIF234, EVC) */
185 GPIO_FN_SCK2, GPIO_FN_RTS4, GPIO_FN_RTS3, GPIO_FN_RTS2,
186 GPIO_FN_CTS4, GPIO_FN_CTS3, GPIO_FN_CTS2,
187 GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_EVENT5, GPIO_FN_EVENT4,
188 GPIO_FN_EVENT3, GPIO_FN_EVENT2, GPIO_FN_EVENT1, GPIO_FN_EVENT0,
189 182
190 /* PTO (mobule: SGPIO) */ 183 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
191 GPIO_FN_SGPIO0_CLK, GPIO_FN_SGPIO0_LOAD, 184 GPIO_FN_VBUS_EN, GPIO_FN_VBUS_OC, GPIO_FN_JMCTCK,
192 GPIO_FN_SGPIO0_DI, GPIO_FN_SGPIO0_DO, 185 GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI,
193 GPIO_FN_SGPIO1_CLK, GPIO_FN_SGPIO1_LOAD, 186 GPIO_FN_JMCTRST,
194 GPIO_FN_SGPIO1_DI, GPIO_FN_SGPIO1_DO, 187 GPIO_FN_SGPIO1_CLK, GPIO_FN_SGPIO1_LOAD, GPIO_FN_SGPIO1_DI,
188 GPIO_FN_SGPIO1_DO, GPIO_FN_SUB_CLKIN,
195 189
196 /* PTP (mobule: JMC, SCIF234) */ 190 /* PTO (mobule: SGPIO, SerMux) */
197 GPIO_FN_JMCTCK, GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI, 191 GPIO_FN_SGPIO0_CLK, GPIO_FN_SGPIO0_LOAD, GPIO_FN_SGPIO0_DI,
198 GPIO_FN_JMCRST, GPIO_FN_SCK4, GPIO_FN_SCK3, 192 GPIO_FN_SGPIO0_DO, GPIO_FN_SGPIO2_CLK, GPIO_FN_SGPIO2_LOAD,
193 GPIO_FN_SGPIO2_DI, GPIO_FN_SGPIO2_DO, GPIO_FN_COM1_TXD,
194 GPIO_FN_COM1_RXD, GPIO_FN_COM1_RTS, GPIO_FN_COM1_CTS,
199 195
200 /* PTQ (mobule: LPC) */ 196 /* PTQ (mobule: LPC) */
201 GPIO_FN_LAD3, GPIO_FN_LAD2, GPIO_FN_LAD1, GPIO_FN_LAD0, 197 GPIO_FN_LAD3, GPIO_FN_LAD2, GPIO_FN_LAD1, GPIO_FN_LAD0,
202 GPIO_FN_LFRAME, GPIO_FN_LRESET, GPIO_FN_LCLK, 198 GPIO_FN_LFRAME, GPIO_FN_LRESET, GPIO_FN_LCLK,
203 199
204 /* PTR (mobule: GRA, IIC) */ 200 /* PTR (mobule: GRA, IIC) */
205 GPIO_FN_DDC3, GPIO_FN_DDC2, 201 GPIO_FN_DDC3, GPIO_FN_DDC2, GPIO_FN_SDA2, GPIO_FN_SCL2,
206 GPIO_FN_SDA8, GPIO_FN_SCL8, GPIO_FN_SDA2, GPIO_FN_SCL2,
207 GPIO_FN_SDA1, GPIO_FN_SCL1, GPIO_FN_SDA0, GPIO_FN_SCL0, 202 GPIO_FN_SDA1, GPIO_FN_SCL1, GPIO_FN_SDA0, GPIO_FN_SCL0,
203 GPIO_FN_SDA8, GPIO_FN_SCL8,
208 204
209 /* PTS (mobule: GRA, IIC) */ 205 /* PTS (mobule: GRA, IIC) */
210 GPIO_FN_DDC1, GPIO_FN_DDC0, 206 GPIO_FN_DDC1, GPIO_FN_DDC0, GPIO_FN_SDA5, GPIO_FN_SCL5,
211 GPIO_FN_SDA9, GPIO_FN_SCL9, GPIO_FN_SDA5, GPIO_FN_SCL5,
212 GPIO_FN_SDA4, GPIO_FN_SCL4, GPIO_FN_SDA3, GPIO_FN_SCL3, 207 GPIO_FN_SDA4, GPIO_FN_SCL4, GPIO_FN_SDA3, GPIO_FN_SCL3,
208 GPIO_FN_SDA9, GPIO_FN_SCL9,
213 209
214 /* PTT (mobule: SYSTEM, PWMX) */ 210 /* PTT (mobule: PWMX, AUD) */
215 GPIO_FN_AUDSYNC, GPIO_FN_AUDCK, 211 GPIO_FN_PWMX7, GPIO_FN_PWMX6, GPIO_FN_PWMX5, GPIO_FN_PWMX4,
216 GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, 212 GPIO_FN_PWMX3, GPIO_FN_PWMX2, GPIO_FN_PWMX1, GPIO_FN_PWMX0,
217 GPIO_FN_AUDATA1, GPIO_FN_AUDATA0, 213 GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, GPIO_FN_AUDATA1,
218 GPIO_FN_PWX7, GPIO_FN_PWX6, GPIO_FN_PWX5, GPIO_FN_PWX4, 214 GPIO_FN_AUDATA0, GPIO_FN_STATUS1, GPIO_FN_STATUS0,
219 215
220 /* PTU (mobule: LBSC, DMAC) */ 216 /* PTU (mobule: LPC, APM) */
221 GPIO_FN_CS6, GPIO_FN_CS5, GPIO_FN_CS4, GPIO_FN_CS0, 217 GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4,
222 GPIO_FN_RD, GPIO_FN_WE0, GPIO_FN_A25, GPIO_FN_A24, 218 GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0,
223 GPIO_FN_DREQ0, GPIO_FN_DACK0, 219 GPIO_FN_APMONCTL_O, GPIO_FN_APMPWBTOUT_O, GPIO_FN_APMSCI_O,
220 GPIO_FN_APMVDDON, GPIO_FN_APMSLPBTN, GPIO_FN_APMPWRBTN,
221 GPIO_FN_APMS5N, GPIO_FN_APMS3N,
224 222
225 /* PTV (mobule: LBSC, DMAC) */ 223 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
226 GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, 224 GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20,
227 GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, 225 GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16,
228 GPIO_FN_TEND0, GPIO_FN_DREQ1, GPIO_FN_DACK1, GPIO_FN_TEND1, 226 GPIO_FN_COM2_RI, GPIO_FN_R_SPI_MOSI, GPIO_FN_R_SPI_MISO,
227 GPIO_FN_R_SPI_RSPCK, GPIO_FN_R_SPI_SSL0, GPIO_FN_R_SPI_SSL1,
228 GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_VBIOS_DI,
229 GPIO_FN_VBIOS_DO, GPIO_FN_VBIOS_CLK, GPIO_FN_VBIOS_CS,
229 230
230 /* PTW (mobule: LBSC) */ 231 /* PTW (mobule: LBSC, EVC, SCIF) */
231 GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, 232 GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12,
232 GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, 233 GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8,
234 GPIO_FN_EVENT5, GPIO_FN_EVENT4, GPIO_FN_EVENT3, GPIO_FN_EVENT2,
235 GPIO_FN_EVENT1, GPIO_FN_EVENT0, GPIO_FN_CTS4, GPIO_FN_CTS2,
233 236
234 /* PTX (mobule: LBSC) */ 237 /* PTX (mobule: LBSC, SCIF, SIM) */
235 GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, 238 GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4,
236 GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, 239 GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0,
240 GPIO_FN_RTS2, GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST,
237 241
238 /* PTY (mobule: LBSC) */ 242 /* PTY (mobule: LBSC) */
239 GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, 243 GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4,
240 GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, 244 GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0,
245
246 /* PTZ (mobule: eMMC, ONFI) */
247 GPIO_FN_MMCDAT7, GPIO_FN_MMCDAT6, GPIO_FN_MMCDAT5,
248 GPIO_FN_MMCDAT4, GPIO_FN_MMCDAT3, GPIO_FN_MMCDAT2,
249 GPIO_FN_MMCDAT1, GPIO_FN_MMCDAT0,
250 GPIO_FN_ON_DQ7, GPIO_FN_ON_DQ6, GPIO_FN_ON_DQ5, GPIO_FN_ON_DQ4,
251 GPIO_FN_ON_DQ3, GPIO_FN_ON_DQ2, GPIO_FN_ON_DQ1, GPIO_FN_ON_DQ0,
241}; 252};
242 253
243#endif /* __ASM_SH7757_H__ */ 254#endif /* __ASM_SH7757_H__ */
diff --git a/arch/sh/include/mach-common/mach/sh2007.h b/arch/sh/include/mach-common/mach/sh2007.h
new file mode 100644
index 000000000000..48180b9aa03d
--- /dev/null
+++ b/arch/sh/include/mach-common/mach/sh2007.h
@@ -0,0 +1,117 @@
1#ifndef __MACH_SH2007_H
2#define __MACH_SH2007_H
3
4#define CS5BCR 0xff802050
5#define CS5WCR 0xff802058
6#define CS5PCR 0xff802070
7
8#define BUS_SZ8 1
9#define BUS_SZ16 2
10#define BUS_SZ32 3
11
12#define PCMCIA_IODYN 1
13#define PCMCIA_ATA 0
14#define PCMCIA_IO8 2
15#define PCMCIA_IO16 3
16#define PCMCIA_COMM8 4
17#define PCMCIA_COMM16 5
18#define PCMCIA_ATTR8 6
19#define PCMCIA_ATTR16 7
20
21#define TYPE_SRAM 0
22#define TYPE_PCMCIA 4
23
24/* write-read/write-write delay (0-7:0,1,2,3,4,5,6,7) */
25#define IWW5 0
26#define IWW6 3
27/* different area, read-write delay (0-7:0,1,2,3,4,5,6,7) */
28#define IWRWD5 2
29#define IWRWD6 2
30/* same area, read-write delay (0-7:0,1,2,3,4,5,6,7) */
31#define IWRWS5 2
32#define IWRWS6 2
33/* different area, read-read delay (0-7:0,1,2,3,4,5,6,7) */
34#define IWRRD5 2
35#define IWRRD6 2
36/* same area, read-read delay (0-7:0,1,2,3,4,5,6,7) */
37#define IWRRS5 0
38#define IWRRS6 2
39/* burst count (0-3:4,8,16,32) */
40#define BST5 0
41#define BST6 0
42/* bus size */
43#define SZ5 BUS_SZ16
44#define SZ6 BUS_SZ16
45/* RD hold for SRAM (0-1:0,1) */
46#define RDSPL5 0
47#define RDSPL6 0
48/* Burst pitch (0-7:0,1,2,3,4,5,6,7) */
49#define BW5 0
50#define BW6 0
51/* Multiplex (0-1:0,1) */
52#define MPX5 0
53#define MPX6 0
54/* device type */
55#define TYPE5 TYPE_PCMCIA
56#define TYPE6 TYPE_PCMCIA
57/* address setup before assert CSn for SRAM (0-7:0,1,2,3,4,5,6,7) */
58#define ADS5 0
59#define ADS6 0
60/* address hold after negate CSn for SRAM (0-7:0,1,2,3,4,5,6,7) */
61#define ADH5 0
62#define ADH6 0
63/* CSn assert to RD assert delay for SRAM (0-7:0,1,2,3,4,5,6,7) */
64#define RDS5 0
65#define RDS6 0
66/* RD negate to CSn negate delay for SRAM (0-7:0,1,2,3,4,5,6,7) */
67#define RDH5 0
68#define RDH6 0
69/* CSn assert to WE assert delay for SRAM (0-7:0,1,2,3,4,5,6,7) */
70#define WTS5 0
71#define WTS6 0
72/* WE negate to CSn negate delay for SRAM (0-7:0,1,2,3,4,5,6,7) */
73#define WTH5 0
74#define WTH6 0
75/* BS hold (0-1:1,2) */
76#define BSH5 0
77#define BSH6 0
78/* wait cycle (0-15:0,1,2,3,4,5,6,7,8,9,11,13,15,17,21,25) */
79#define IW5 6 /* 60ns PIO mode 4 */
80#define IW6 15 /* 250ns */
81
82#define SAA5 PCMCIA_IODYN /* IDE area b4000000-b5ffffff */
83#define SAB5 PCMCIA_IODYN /* CF area b6000000-b7ffffff */
84#define PCWA5 0 /* additional wait A (0-3:0,15,30,50) */
85#define PCWB5 0 /* additional wait B (0-3:0,15,30,50) */
86/* wait B (0-15:0,1,2,3,4,5,6,7,8,9,11,13,15,17,21,25) */
87#define PCIW5 12
88/* Address->OE/WE assert delay A (0-7:0,1,2,3,6,9,12,15) */
89#define TEDA5 2
90/* Address->OE/WE assert delay B (0-7:0,1,2,3,6,9,12,15) */
91#define TEDB5 4
92/* OE/WE negate->Address delay A (0-7:0,1,2,3,6,9,12,15) */
93#define TEHA5 2
94/* OE/WE negate->Address delay B (0-7:0,1,2,3,6,9,12,15) */
95#define TEHB5 3
96
97#define CS5BCR_D ((IWW5<<28)|(IWRWD5<<24)|(IWRWS5<<20)| \
98 (IWRRD5<<16)|(IWRRS5<<12)|(BST5<<10)| \
99 (SZ5<<8)|(RDSPL5<<7)|(BW5<<4)|(MPX5<<3)|TYPE5)
100#define CS5WCR_D ((ADS5<<28)|(ADH5<<24)|(RDS5<<20)| \
101 (RDH5<<16)|(WTS5<<12)|(WTH5<<8)|(BSH5<<4)|IW5)
102#define CS5PCR_D ((SAA5<<28)|(SAB5<<24)|(PCWA5<<22)| \
103 (PCWB5<<20)|(PCIW5<<16)|(TEDA5<<12)| \
104 (TEDB5<<8)|(TEHA5<<4)|TEHB5)
105
106#define SMC0_BASE 0xb0800000 /* eth0 */
107#define SMC1_BASE 0xb0900000 /* eth1 */
108#define CF_BASE 0xb6100000 /* Compact Flash (I/O area) */
109#define IDE_BASE 0xb4000000 /* IDE */
110#define PC104_IO_BASE 0xb8000000
111#define PC104_MEM_BASE 0xba000000
112#define SMC_IO_SIZE 0x100
113
114#define CF_OFFSET 0x1f0
115#define IDE_OFFSET 0x170
116
117#endif /* __MACH_SH2007_H */
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index e25f3c69525d..1086ba1abdab 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -14,7 +14,7 @@ CFLAGS_REMOVE_return_address.o = -pg
14obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ 14obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o irq.o \ 15 idle.o io.o irq.o \
16 irq_$(BITS).o machvec.o nmi_debug.o process.o \ 16 irq_$(BITS).o machvec.o nmi_debug.o process.o \
17 process_$(BITS).o ptrace_$(BITS).o \ 17 process_$(BITS).o ptrace.o ptrace_$(BITS).o \
18 reboot.o return_address.o \ 18 reboot.o return_address.o \
19 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ 19 setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \
20 syscalls_$(BITS).o time.o topology.o traps.o \ 20 syscalls_$(BITS).o time.o topology.o traps.o \
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index d180f16281ed..b93458f33b74 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -150,7 +150,7 @@ void __cpuinit cpu_probe(void)
150 boot_cpu_data.type = CPU_SH7724; 150 boot_cpu_data.type = CPU_SH7724;
151 boot_cpu_data.flags |= CPU_HAS_L2_CACHE; 151 boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
152 break; 152 break;
153 case 0x50: 153 case 0x10:
154 boot_cpu_data.type = CPU_SH7757; 154 boot_cpu_data.type = CPU_SH7757;
155 break; 155 break;
156 } 156 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 0a752bd324ac..ce39a2ae8c6c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * SH7757 support for the clock framework 4 * SH7757 support for the clock framework
5 * 5 *
6 * Copyright (C) 2009 Renesas Solutions Corp. 6 * Copyright (C) 2009-2010 Renesas Solutions Corp.
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -16,124 +16,147 @@
16#include <asm/clock.h> 16#include <asm/clock.h>
17#include <asm/freq.h> 17#include <asm/freq.h>
18 18
19static int ifc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, 19/*
20 16, 1, 1, 32, 1, 1, 1, 1 }; 20 * Default rate for the root input clock, reset this with clk_set_rate()
21static int sfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, 21 * from the platform code.
22 16, 1, 1, 32, 1, 1, 1, 1 }; 22 */
23static int bfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, 23static struct clk extal_clk = {
24 16, 1, 1, 32, 1, 1, 1, 1 }; 24 .rate = 48000000,
25static int p1fc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, 25};
26 16, 1, 1, 32, 1, 1, 1, 1 };
27 26
28static void master_clk_init(struct clk *clk) 27static unsigned long pll_recalc(struct clk *clk)
29{ 28{
30 clk->rate = CONFIG_SH_PCLK_FREQ * 16; 29 int multiplier;
31}
32 30
33static struct clk_ops sh7757_master_clk_ops = { 31 multiplier = test_mode_pin(MODE_PIN0) ? 24 : 16;
34 .init = master_clk_init,
35};
36 32
37static void module_clk_recalc(struct clk *clk) 33 return clk->parent->rate * multiplier;
38{
39 int idx = __raw_readl(FRQCR) & 0x0000000f;
40 clk->rate = clk->parent->rate / p1fc_divisors[idx];
41} 34}
42 35
43static struct clk_ops sh7757_module_clk_ops = { 36static struct clk_ops pll_clk_ops = {
44 .recalc = module_clk_recalc, 37 .recalc = pll_recalc,
45}; 38};
46 39
47static void bus_clk_recalc(struct clk *clk) 40static struct clk pll_clk = {
48{ 41 .ops = &pll_clk_ops,
49 int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f; 42 .parent = &extal_clk,
50 clk->rate = clk->parent->rate / bfc_divisors[idx]; 43 .flags = CLK_ENABLE_ON_INIT,
51} 44};
52 45
53static struct clk_ops sh7757_bus_clk_ops = { 46static struct clk *clks[] = {
54 .recalc = bus_clk_recalc, 47 &extal_clk,
48 &pll_clk,
55}; 49};
56 50
57static void cpu_clk_recalc(struct clk *clk) 51static unsigned int div2[] = { 1, 1, 2, 1, 1, 4, 1, 6,
58{ 52 1, 1, 1, 16, 1, 24, 1, 1 };
59 int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
60 clk->rate = clk->parent->rate / ifc_divisors[idx];
61}
62 53
63static struct clk_ops sh7757_cpu_clk_ops = { 54static struct clk_div_mult_table div4_div_mult_table = {
64 .recalc = cpu_clk_recalc, 55 .divisors = div2,
56 .nr_divisors = ARRAY_SIZE(div2),
65}; 57};
66 58
67static struct clk_ops *sh7757_clk_ops[] = { 59static struct clk_div4_table div4_table = {
68 &sh7757_master_clk_ops, 60 .div_mult_table = &div4_div_mult_table,
69 &sh7757_module_clk_ops,
70 &sh7757_bus_clk_ops,
71 &sh7757_cpu_clk_ops,
72}; 61};
73 62
74void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 63enum { DIV4_I, DIV4_SH, DIV4_P, DIV4_NR };
75{
76 if (idx < ARRAY_SIZE(sh7757_clk_ops))
77 *ops = sh7757_clk_ops[idx];
78}
79 64
80static void shyway_clk_recalc(struct clk *clk) 65#define DIV4(_bit, _mask, _flags) \
81{ 66 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
82 int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
83 clk->rate = clk->parent->rate / sfc_divisors[idx];
84}
85
86static struct clk_ops sh7757_shyway_clk_ops = {
87 .recalc = shyway_clk_recalc,
88};
89 67
90static struct clk sh7757_shyway_clk = { 68struct clk div4_clks[DIV4_NR] = {
91 .flags = CLK_ENABLE_ON_INIT, 69 /*
92 .ops = &sh7757_shyway_clk_ops, 70 * P clock is always enable, because some P clock modules is used
71 * by Host PC.
72 */
73 [DIV4_P] = DIV4(0, 0x2800, CLK_ENABLE_ON_INIT),
74 [DIV4_SH] = DIV4(12, 0x00a0, CLK_ENABLE_ON_INIT),
75 [DIV4_I] = DIV4(20, 0x0004, CLK_ENABLE_ON_INIT),
93}; 76};
94 77
95/* 78#define MSTPCR0 0xffc80030
96 * Additional sh7757-specific on-chip clocks that aren't already part of the 79#define MSTPCR1 0xffc80034
97 * clock framework 80
98 */ 81enum { MSTP004, MSTP000, MSTP114, MSTP113, MSTP112,
99static struct clk *sh7757_onchip_clocks[] = { 82 MSTP111, MSTP110, MSTP103, MSTP102,
100 &sh7757_shyway_clk, 83 MSTP_NR };
84
85static struct clk mstp_clks[MSTP_NR] = {
86 /* MSTPCR0 */
87 [MSTP004] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 4, 0),
88 [MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),
89
90 /* MSTPCR1 */
91 [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
92 [MSTP113] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 13, 0),
93 [MSTP112] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 12, 0),
94 [MSTP111] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 11, 0),
95 [MSTP110] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 10, 0),
96 [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0),
97 [MSTP102] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 2, 0),
101}; 98};
102 99
103#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } 100#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
104 101
105static struct clk_lookup lookups[] = { 102static struct clk_lookup lookups[] = {
106 /* main clocks */ 103 /* main clocks */
107 CLKDEV_CON_ID("shyway_clk", &sh7757_shyway_clk), 104 CLKDEV_CON_ID("extal", &extal_clk),
105 CLKDEV_CON_ID("pll_clk", &pll_clk),
106
107 /* DIV4 clocks */
108 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
109 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
110 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
111
112 /* MSTP32 clocks */
113 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]),
114 CLKDEV_CON_ID("riic", &mstp_clks[MSTP000]),
115 {
116 /* TMU0 */
117 .dev_id = "sh_tmu.0",
118 .con_id = "tmu_fck",
119 .clk = &mstp_clks[MSTP113],
120 }, {
121 /* TMU1 */
122 .dev_id = "sh_tmu.1",
123 .con_id = "tmu_fck",
124 .clk = &mstp_clks[MSTP114],
125 },
126 {
127 /* SCIF4 (But, ID is 2) */
128 .dev_id = "sh-sci.2",
129 .con_id = "sci_fck",
130 .clk = &mstp_clks[MSTP112],
131 }, {
132 /* SCIF3 */
133 .dev_id = "sh-sci.1",
134 .con_id = "sci_fck",
135 .clk = &mstp_clks[MSTP111],
136 }, {
137 /* SCIF2 */
138 .dev_id = "sh-sci.0",
139 .con_id = "sci_fck",
140 .clk = &mstp_clks[MSTP110],
141 },
142 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]),
108}; 143};
109 144
110static int __init sh7757_clk_init(void) 145int __init arch_clk_init(void)
111{ 146{
112 struct clk *clk = clk_get(NULL, "master_clk"); 147 int i, ret = 0;
113 int i;
114
115 for (i = 0; i < ARRAY_SIZE(sh7757_onchip_clocks); i++) {
116 struct clk *clkp = sh7757_onchip_clocks[i];
117 148
118 clkp->parent = clk; 149 for (i = 0; i < ARRAY_SIZE(clks); i++)
119 clk_register(clkp); 150 ret |= clk_register(clks[i]);
120 clk_enable(clkp); 151 for (i = 0; i < ARRAY_SIZE(lookups); i++)
121 } 152 clkdev_add(&lookups[i]);
122 153
123 /* 154 if (!ret)
124 * Now that we have the rest of the clocks registered, we need to 155 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
125 * force the parent clock to propagate so that these clocks will 156 &div4_table);
126 * automatically figure out their rate. We cheat by handing the 157 if (!ret)
127 * parent clock its current rate and forcing child propagation. 158 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
128 */
129 clk_set_rate(clk, clk_get_rate(clk));
130 159
131 clk_put(clk); 160 return ret;
132
133 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
134
135 return 0;
136} 161}
137 162
138arch_initcall(sh7757_clk_init);
139
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
index ed23b155c097..4c74bd04bba4 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
@@ -1,11 +1,11 @@
1/* 1/*
2 * SH7757 (A0 step) Pinmux 2 * SH7757 (B0 step) Pinmux
3 * 3 *
4 * Copyright (C) 2009 Renesas Solutions Corp. 4 * Copyright (C) 2009-2010 Renesas Solutions Corp.
5 * 5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> 6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 * 7 *
8 * Based on SH7757 Pinmux 8 * Based on SH7723 Pinmux
9 * Copyright (C) 2008 Magnus Damm 9 * Copyright (C) 2008 Magnus Damm
10 * 10 *
11 * This file is subject to the terms and conditions of the GNU General Public 11 * This file is subject to the terms and conditions of the GNU General Public
@@ -40,27 +40,27 @@ enum {
40 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, 40 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
41 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA, 41 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
42 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA, 42 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA,
43 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, 43 PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
44 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, 44 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
45 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, 45 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
46 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, 46 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
47 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, 47 PTL6_DATA, PTL5_DATA, PTL4_DATA,
48 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA, 48 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
49 PTM6_DATA, PTM5_DATA, PTM4_DATA, 49 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
50 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, 50 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
51 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, 51 PTN6_DATA, PTN5_DATA, PTN4_DATA,
52 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA, 52 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
53 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA, 53 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
54 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA, 54 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA,
55 PTP6_DATA, PTP5_DATA, PTP4_DATA, 55 PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
56 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA, 56 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
57 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, 57 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
58 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA, 58 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
59 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, 59 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
60 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, 60 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
61 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA, 61 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
62 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, 62 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
63 PTT5_DATA, PTT4_DATA, 63 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
64 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, 64 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
65 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, 65 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
66 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, 66 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
@@ -95,27 +95,27 @@ enum {
95 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, 95 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
96 PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN, 96 PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN,
97 PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN, 97 PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN,
98 PTJ7_IN, PTJ6_IN, PTJ5_IN, PTJ4_IN, 98 PTJ6_IN, PTJ5_IN, PTJ4_IN,
99 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, 99 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
100 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN, 100 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
101 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, 101 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
102 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, 102 PTL6_IN, PTL5_IN, PTL4_IN,
103 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN, 103 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
104 PTM6_IN, PTM5_IN, PTM4_IN, 104 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
105 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, 105 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
106 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN, 106 PTN6_IN, PTN5_IN, PTN4_IN,
107 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN, 107 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
108 PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN, 108 PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN,
109 PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN, 109 PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN,
110 PTP6_IN, PTP5_IN, PTP4_IN, 110 PTP7_IN, PTP6_IN, PTP5_IN, PTP4_IN,
111 PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN, 111 PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
112 PTQ6_IN, PTQ5_IN, PTQ4_IN, 112 PTQ6_IN, PTQ5_IN, PTQ4_IN,
113 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN, 113 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
114 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, 114 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
115 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, 115 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
116 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN, 116 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
117 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, 117 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
118 PTT5_IN, PTT4_IN, 118 PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN,
119 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, 119 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
120 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN, 120 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
121 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, 121 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
@@ -132,16 +132,43 @@ enum {
132 PINMUX_INPUT_END, 132 PINMUX_INPUT_END,
133 133
134 PINMUX_INPUT_PULLUP_BEGIN, 134 PINMUX_INPUT_PULLUP_BEGIN,
135 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
136 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
137 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
138 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
139 PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
140 PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
141 PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
142 PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
143 PTG7_IN_PU, PTG6_IN_PU, PTG4_IN_PU,
144 PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
145 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
146 PTI7_IN_PU, PTI6_IN_PU, PTI4_IN_PU,
147 PTI3_IN_PU, PTI2_IN_PU, PTI1_IN_PU, PTI0_IN_PU,
148 PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
149 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
150 PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
151 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
152 PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
153 PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
154 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
155 PTN4_IN_PU,
156 PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
157 PTO7_IN_PU, PTO6_IN_PU, PTO5_IN_PU, PTO4_IN_PU,
158 PTO3_IN_PU, PTO2_IN_PU, PTO1_IN_PU, PTO0_IN_PU,
159 PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
160 PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
135 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU, 161 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
136 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU, 162 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
137 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU, 163 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
138 PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU, 164 PTV3_IN_PU, PTV2_IN_PU,
139 PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU, 165 PTW1_IN_PU, PTW0_IN_PU,
140 PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
141 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU, 166 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
142 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU, 167 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
143 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU, 168 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
144 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU, 169 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
170 PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
171 PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
145 PINMUX_INPUT_PULLUP_END, 172 PINMUX_INPUT_PULLUP_END,
146 173
147 PINMUX_OUTPUT_BEGIN, 174 PINMUX_OUTPUT_BEGIN,
@@ -163,27 +190,27 @@ enum {
163 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, 190 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
164 PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT, 191 PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT,
165 PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT, 192 PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT,
166 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ4_OUT, 193 PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
167 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, 194 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
168 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT, 195 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
169 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, 196 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
170 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, 197 PTL6_OUT, PTL5_OUT, PTL4_OUT,
171 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT, 198 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
172 PTM6_OUT, PTM5_OUT, PTM4_OUT, 199 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
173 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, 200 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
174 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT, 201 PTN6_OUT, PTN5_OUT, PTN4_OUT,
175 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, 202 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
176 PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT, 203 PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT,
177 PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT, 204 PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT,
178 PTP6_OUT, PTP5_OUT, PTP4_OUT, 205 PTP7_OUT, PTP6_OUT, PTP5_OUT, PTP4_OUT,
179 PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT, 206 PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
180 PTQ6_OUT, PTQ5_OUT, PTQ4_OUT, 207 PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
181 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT, 208 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
182 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, 209 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
183 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT, 210 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
184 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT, 211 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
185 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, 212 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
186 PTT5_OUT, PTT4_OUT, 213 PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT,
187 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, 214 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
188 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT, 215 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
189 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, 216 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
@@ -218,27 +245,27 @@ enum {
218 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, 245 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
219 PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN, 246 PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN,
220 PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN, 247 PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN,
221 PTJ7_FN, PTJ6_FN, PTJ5_FN, PTJ4_FN, 248 PTJ6_FN, PTJ5_FN, PTJ4_FN,
222 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, 249 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
223 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN, 250 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
224 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, 251 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
225 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, 252 PTL6_FN, PTL5_FN, PTL4_FN,
226 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN, 253 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
227 PTM6_FN, PTM5_FN, PTM4_FN, 254 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
228 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, 255 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
229 PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN, 256 PTN6_FN, PTN5_FN, PTN4_FN,
230 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN, 257 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
231 PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN, 258 PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN,
232 PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN, 259 PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN,
233 PTP6_FN, PTP5_FN, PTP4_FN, 260 PTP7_FN, PTP6_FN, PTP5_FN, PTP4_FN,
234 PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN, 261 PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
235 PTQ6_FN, PTQ5_FN, PTQ4_FN, 262 PTQ6_FN, PTQ5_FN, PTQ4_FN,
236 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN, 263 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
237 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, 264 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
238 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, 265 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
239 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN, 266 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
240 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, 267 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
241 PTT5_FN, PTT4_FN, 268 PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN,
242 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, 269 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
243 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN, 270 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
244 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, 271 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
@@ -253,181 +280,248 @@ enum {
253 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN, 280 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
254 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN, 281 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
255 282
256 PS0_15_FN1, PS0_15_FN3, 283 PS0_15_FN1, PS0_15_FN2,
257 PS0_14_FN1, PS0_14_FN3, 284 PS0_14_FN1, PS0_14_FN2,
258 PS0_13_FN1, PS0_13_FN3, 285 PS0_13_FN1, PS0_13_FN2,
259 PS0_12_FN1, PS0_12_FN3, 286 PS0_12_FN1, PS0_12_FN2,
287 PS0_11_FN1, PS0_11_FN2,
288 PS0_10_FN1, PS0_10_FN2,
289 PS0_9_FN1, PS0_9_FN2,
290 PS0_8_FN1, PS0_8_FN2,
260 PS0_7_FN1, PS0_7_FN2, 291 PS0_7_FN1, PS0_7_FN2,
261 PS0_6_FN1, PS0_6_FN2, 292 PS0_6_FN1, PS0_6_FN2,
262 PS0_5_FN1, PS0_5_FN2, 293 PS0_5_FN1, PS0_5_FN2,
263 PS0_4_FN1, PS0_4_FN2, 294 PS0_4_FN1, PS0_4_FN2,
264 PS0_3_FN1, PS0_3_FN2, 295 PS0_3_FN1, PS0_3_FN2,
265 PS0_2_FN1, PS0_2_FN2, 296 PS0_2_FN1, PS0_2_FN2,
266 PS0_1_FN1, PS0_1_FN2,
267 297
268 PS1_7_FN1, PS1_7_FN3, 298 PS1_10_FN1, PS1_10_FN2,
269 PS1_6_FN1, PS1_6_FN3, 299 PS1_9_FN1, PS1_9_FN2,
300 PS1_8_FN1, PS1_8_FN2,
301 PS1_2_FN1, PS1_2_FN2,
302
303 PS2_13_FN1, PS2_13_FN2,
304 PS2_12_FN1, PS2_12_FN2,
305 PS2_7_FN1, PS2_7_FN2,
306 PS2_6_FN1, PS2_6_FN2,
307 PS2_5_FN1, PS2_5_FN2,
308 PS2_4_FN1, PS2_4_FN2,
309 PS2_2_FN1, PS2_2_FN2,
310
311 PS3_15_FN1, PS3_15_FN2,
312 PS3_14_FN1, PS3_14_FN2,
313 PS3_13_FN1, PS3_13_FN2,
314 PS3_12_FN1, PS3_12_FN2,
315 PS3_11_FN1, PS3_11_FN2,
316 PS3_10_FN1, PS3_10_FN2,
317 PS3_9_FN1, PS3_9_FN2,
318 PS3_8_FN1, PS3_8_FN2,
319 PS3_7_FN1, PS3_7_FN2,
320 PS3_2_FN1, PS3_2_FN2,
321 PS3_1_FN1, PS3_1_FN2,
270 322
271 PS2_13_FN1, PS2_13_FN3,
272 PS2_12_FN1, PS2_12_FN3,
273 PS2_1_FN1, PS2_1_FN2,
274 PS2_0_FN1, PS2_0_FN2,
275
276 PS4_15_FN1, PS4_15_FN2,
277 PS4_14_FN1, PS4_14_FN2, 323 PS4_14_FN1, PS4_14_FN2,
278 PS4_13_FN1, PS4_13_FN2, 324 PS4_13_FN1, PS4_13_FN2,
279 PS4_12_FN1, PS4_12_FN2, 325 PS4_12_FN1, PS4_12_FN2,
280 PS4_11_FN1, PS4_11_FN2,
281 PS4_10_FN1, PS4_10_FN2, 326 PS4_10_FN1, PS4_10_FN2,
282 PS4_9_FN1, PS4_9_FN2, 327 PS4_9_FN1, PS4_9_FN2,
328 PS4_8_FN1, PS4_8_FN2,
329 PS4_4_FN1, PS4_4_FN2,
283 PS4_3_FN1, PS4_3_FN2, 330 PS4_3_FN1, PS4_3_FN2,
284 PS4_2_FN1, PS4_2_FN2, 331 PS4_2_FN1, PS4_2_FN2,
285 PS4_1_FN1, PS4_1_FN2, 332 PS4_1_FN1, PS4_1_FN2,
286 PS4_0_FN1, PS4_0_FN2, 333 PS4_0_FN1, PS4_0_FN2,
287 334
335 PS5_11_FN1, PS5_11_FN2,
336 PS5_10_FN1, PS5_10_FN2,
288 PS5_9_FN1, PS5_9_FN2, 337 PS5_9_FN1, PS5_9_FN2,
289 PS5_8_FN1, PS5_8_FN2, 338 PS5_8_FN1, PS5_8_FN2,
290 PS5_7_FN1, PS5_7_FN2, 339 PS5_7_FN1, PS5_7_FN2,
291 PS5_6_FN1, PS5_6_FN2, 340 PS5_6_FN1, PS5_6_FN2,
292 PS5_5_FN1, PS5_5_FN2, 341 PS5_5_FN1, PS5_5_FN2,
293 PS5_4_FN1, PS5_4_FN2, 342 PS5_4_FN1, PS5_4_FN2,
294 343 PS5_3_FN1, PS5_3_FN2,
295 /* AN15 to 8 : EVENT15 to 8 */ 344 PS5_2_FN1, PS5_2_FN2,
296 PS6_7_FN_AN, PS6_7_FN_EV, 345
297 PS6_6_FN_AN, PS6_6_FN_EV, 346 PS6_15_FN1, PS6_15_FN2,
298 PS6_5_FN_AN, PS6_5_FN_EV, 347 PS6_14_FN1, PS6_14_FN2,
299 PS6_4_FN_AN, PS6_4_FN_EV, 348 PS6_13_FN1, PS6_13_FN2,
300 PS6_3_FN_AN, PS6_3_FN_EV, 349 PS6_12_FN1, PS6_12_FN2,
301 PS6_2_FN_AN, PS6_2_FN_EV, 350 PS6_11_FN1, PS6_11_FN2,
302 PS6_1_FN_AN, PS6_1_FN_EV, 351 PS6_10_FN1, PS6_10_FN2,
303 PS6_0_FN_AN, PS6_0_FN_EV, 352 PS6_9_FN1, PS6_9_FN2,
304 353 PS6_8_FN1, PS6_8_FN2,
354 PS6_7_FN1, PS6_7_FN2,
355 PS6_6_FN1, PS6_6_FN2,
356 PS6_5_FN1, PS6_5_FN2,
357 PS6_4_FN1, PS6_4_FN2,
358 PS6_3_FN1, PS6_3_FN2,
359 PS6_2_FN1, PS6_2_FN2,
360 PS6_1_FN1, PS6_1_FN2,
361 PS6_0_FN1, PS6_0_FN2,
362
363 PS7_15_FN1, PS7_15_FN2,
364 PS7_14_FN1, PS7_14_FN2,
365 PS7_13_FN1, PS7_13_FN2,
366 PS7_12_FN1, PS7_12_FN2,
367 PS7_11_FN1, PS7_11_FN2,
368 PS7_10_FN1, PS7_10_FN2,
369 PS7_9_FN1, PS7_9_FN2,
370 PS7_8_FN1, PS7_8_FN2,
371 PS7_7_FN1, PS7_7_FN2,
372 PS7_6_FN1, PS7_6_FN2,
373 PS7_5_FN1, PS7_5_FN2,
374 PS7_4_FN1, PS7_4_FN2,
375
376 PS8_15_FN1, PS8_15_FN2,
377 PS8_14_FN1, PS8_14_FN2,
378 PS8_13_FN1, PS8_13_FN2,
379 PS8_12_FN1, PS8_12_FN2,
380 PS8_11_FN1, PS8_11_FN2,
381 PS8_10_FN1, PS8_10_FN2,
382 PS8_9_FN1, PS8_9_FN2,
383 PS8_8_FN1, PS8_8_FN2,
305 PINMUX_FUNCTION_END, 384 PINMUX_FUNCTION_END,
306 385
307 PINMUX_MARK_BEGIN, 386 PINMUX_MARK_BEGIN,
308 /* PTA (mobule: LBSC, CPG, LPC) */ 387 /* PTA (mobule: LBSC, RGMII) */
309 BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK, 388 BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK,
310 MD10_MARK, MD9_MARK, MD8_MARK,
311 LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
312 LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
313
314 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
315 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
316 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
317 ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK, 389 ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK,
318 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
319 WPSZ1_MARK, WPSZ0_MARK, FWID_MARK, FLSHSZ_MARK,
320 LPC_SPIEN_MARK, BASEL_MARK,
321 390
322 /* PTC (mobule: SD) */ 391 /* PTB (mobule: INTC, ONFI, TMU) */
323 SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK, 392 IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK,
324 SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK, 393 IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK,
394 ON_NRE_MARK, ON_NWE_MARK, ON_NWP_MARK, ON_NCE0_MARK,
395 ON_R_B0_MARK, ON_ALE_MARK, ON_CLE_MARK, TCLK_MARK,
325 396
326 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ 397 /* PTC (mobule: IRQ, PWMU) */
327 IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK, 398 IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK,
328 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK, 399 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
329 MD6_MARK, MD5_MARK, MD3_MARK, MD2_MARK, 400 PWMU0_MARK, PWMU1_MARK, PWMU2_MARK, PWMU3_MARK,
330 MD1_MARK, MD0_MARK, ADTRG1_MARK, ADTRG0_MARK, 401 PWMU4_MARK, PWMU5_MARK,
331 402
332 /* PTE (mobule: EtherC) */ 403 /* PTD (mobule: SPI0, DMAC) */
333 ET0_CRS_DV_MARK, ET0_TXD1_MARK, 404 SP0_MOSI_MARK, SP0_MISO_MARK, SP0_SCK_MARK, SP0_SCK_FB_MARK,
334 ET0_TXD0_MARK, ET0_TX_EN_MARK, 405 SP0_SS0_MARK, SP0_SS1_MARK, SP0_SS2_MARK, SP0_SS3_MARK,
335 ET0_REF_CLK_MARK, ET0_RXD1_MARK, 406 DREQ0_MARK, DACK0_MARK, TEND0_MARK,
336 ET0_RXD0_MARK, ET0_RX_ER_MARK, 407
337 408 /* PTE (mobule: RMII) */
338 /* PTF (mobule: EtherC) */ 409 RMII0_CRS_DV_MARK, RMII0_TXD1_MARK,
339 ET1_CRS_DV_MARK, ET1_TXD1_MARK, 410 RMII0_TXD0_MARK, RMII0_TXEN_MARK,
340 ET1_TXD0_MARK, ET1_TX_EN_MARK, 411 RMII0_REFCLK_MARK, RMII0_RXD1_MARK,
341 ET1_REF_CLK_MARK, ET1_RXD1_MARK, 412 RMII0_RXD0_MARK, RMII0_RX_ER_MARK,
342 ET1_RXD0_MARK, ET1_RX_ER_MARK, 413
343 414 /* PTF (mobule: RMII, SerMux) */
344 /* PTG (mobule: SYSTEM, PWMX, LPC) */ 415 RMII1_CRS_DV_MARK, RMII1_TXD1_MARK,
345 STATUS0_MARK, STATUS1_MARK, 416 RMII1_TXD0_MARK, RMII1_TXEN_MARK,
346 PWX0_MARK, PWX1_MARK, PWX2_MARK, PWX3_MARK, 417 RMII1_REFCLK_MARK, RMII1_RXD1_MARK,
347 SERIRQ_MARK, CLKRUN_MARK, LPCPD_MARK, LDRQ_MARK, 418 RMII1_RXD0_MARK, RMII1_RX_ER_MARK,
348 419 RAC_RI_MARK,
349 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ 420
350 TCLK_MARK, RXD4_MARK, TXD4_MARK, 421 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
422 BOOTFMS_MARK, BOOTWP_MARK, A25_MARK, A24_MARK,
423 SERIRQ_MARK, WDTOVF_MARK, LPCPD_MARK, LDRQ_MARK,
424 MMCCLK_MARK, MMCCMD_MARK,
425
426 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
351 SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK, 427 SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK,
352 SP1_SS0_MARK, SP1_SS1_MARK, SP0_SS1_MARK, 428 SP1_SS0_MARK, SP1_SS1_MARK, WP_MARK, FMS0_MARK,
429 TEND1_MARK, DREQ1_MARK, DACK1_MARK, ADTRG1_MARK,
430 ADTRG0_MARK,
353 431
354 /* PTI (mobule: INTC) */ 432 /* PTI (mobule: LBSC, SDHI) */
355 IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK, 433 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
356 IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK, 434 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
435 SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK,
436 SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK,
357 437
358 /* PTJ (mobule: SCIF234, SERMUX) */ 438 /* PTJ (mobule: SCIF234) */
359 RXD3_MARK, TXD3_MARK, RXD2_MARK, TXD2_MARK, 439 RTS3_MARK, CTS3_MARK, TXD3_MARK, RXD3_MARK,
360 COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK, 440 RTS4_MARK, RXD4_MARK, TXD4_MARK,
361 441
362 /* PTK (mobule: SERMUX) */ 442 /* PTK (mobule: SERMUX, LBSC, SCIF) */
363 COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK, 443 COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK,
364 COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, COM2_RI_MARK, 444 COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, CLKOUT_MARK,
445 SCK2_MARK, SCK4_MARK, SCK3_MARK,
365 446
366 /* PTL (mobule: SERMUX) */ 447 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
367 RAC_TXD_MARK, RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, 448 RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, RAC_DTR_MARK,
368 RAC_DTR_MARK, RAC_DSR_MARK, RAC_DCD_MARK, RAC_RI_MARK, 449 RAC_DSR_MARK, RAC_DCD_MARK, RAC_TXD_MARK, RXD2_MARK,
450 CS5_MARK, CS6_MARK, AUDSYNC_MARK, AUDCK_MARK,
451 TXD2_MARK,
369 452
370 /* PTM (mobule: IIC, LPC) */ 453 /* PTM (mobule: LBSC, IIC) */
454 CS4_MARK, RD_MARK, WE0_MARK, CS0_MARK,
371 SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK, 455 SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK,
372 WP_MARK, FMS0_MARK, FMS1_MARK,
373 456
374 /* PTN (mobule: SCIF234, EVC) */ 457 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
375 SCK2_MARK, RTS4_MARK, RTS3_MARK, RTS2_MARK, 458 VBUS_EN_MARK, VBUS_OC_MARK, JMCTCK_MARK, JMCTMS_MARK,
376 CTS4_MARK, CTS3_MARK, CTS2_MARK, 459 JMCTDO_MARK, JMCTDI_MARK, JMCTRST_MARK,
377 EVENT7_MARK, EVENT6_MARK, EVENT5_MARK, EVENT4_MARK, 460 SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, SGPIO1_DI_MARK,
378 EVENT3_MARK, EVENT2_MARK, EVENT1_MARK, EVENT0_MARK, 461 SGPIO1_DO_MARK, SUB_CLKIN_MARK,
379 462
380 /* PTO (mobule: SGPIO) */ 463 /* PTO (mobule: SGPIO, SerMux) */
381 SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, 464 SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, SGPIO0_DI_MARK,
382 SGPIO0_DI_MARK, SGPIO0_DO_MARK, 465 SGPIO0_DO_MARK, SGPIO2_CLK_MARK, SGPIO2_LOAD_MARK,
383 SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, 466 SGPIO2_DI_MARK, SGPIO2_DO_MARK,
384 SGPIO1_DI_MARK, SGPIO1_DO_MARK, 467 COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK,
385
386 /* PTP (mobule: JMC, SCIF234) */
387 JMCTCK_MARK, JMCTMS_MARK, JMCTDO_MARK, JMCTDI_MARK,
388 JMCRST_MARK, SCK4_MARK, SCK3_MARK,
389 468
390 /* PTQ (mobule: LPC) */ 469 /* PTQ (mobule: LPC) */
391 LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK, 470 LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK,
392 LFRAME_MARK, LRESET_MARK, LCLK_MARK, 471 LFRAME_MARK, LRESET_MARK, LCLK_MARK,
393 472
394 /* PTR (mobule: GRA, IIC) */ 473 /* PTR (mobule: GRA, IIC) */
395 DDC3_MARK, DDC2_MARK, 474 DDC3_MARK, DDC2_MARK, SDA2_MARK, SCL2_MARK,
396 SDA8_MARK, SCL8_MARK, SDA2_MARK, SCL2_MARK,
397 SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK, 475 SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK,
476 SDA8_MARK, SCL8_MARK,
398 477
399 /* PTS (mobule: GRA, IIC) */ 478 /* PTS (mobule: GRA, IIC) */
400 DDC1_MARK, DDC0_MARK, 479 DDC1_MARK, DDC0_MARK, SDA5_MARK, SCL5_MARK,
401 SDA9_MARK, SCL9_MARK, SDA5_MARK, SCL5_MARK,
402 SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK, 480 SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK,
481 SDA9_MARK, SCL9_MARK,
403 482
404 /* PTT (mobule: SYSTEM, PWMX) */ 483 /* PTT (mobule: PWMX, AUD) */
405 AUDSYNC_MARK, AUDCK_MARK, 484 PWMX7_MARK, PWMX6_MARK, PWMX5_MARK, PWMX4_MARK,
406 AUDATA3_MARK, AUDATA2_MARK, 485 PWMX3_MARK, PWMX2_MARK, PWMX1_MARK, PWMX0_MARK,
407 AUDATA1_MARK, AUDATA0_MARK, 486 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
408 PWX7_MARK, PWX6_MARK, PWX5_MARK, PWX4_MARK, 487 STATUS1_MARK, STATUS0_MARK,
409 488
410 /* PTU (mobule: LBSC, DMAC) */ 489 /* PTU (mobule: LPC, APM) */
411 CS6_MARK, CS5_MARK, CS4_MARK, CS0_MARK, 490 LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
412 RD_MARK, WE0_MARK, A25_MARK, A24_MARK, 491 LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
413 DREQ0_MARK, DACK0_MARK, 492 APMONCTL_O_MARK, APMPWBTOUT_O_MARK, APMSCI_O_MARK,
493 APMVDDON_MARK, APMSLPBTN_MARK, APMPWRBTN_MARK, APMS5N_MARK,
494 APMS3N_MARK,
414 495
415 /* PTV (mobule: LBSC, DMAC) */ 496 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
416 A23_MARK, A22_MARK, A21_MARK, A20_MARK, 497 A23_MARK, A22_MARK, A21_MARK, A20_MARK,
417 A19_MARK, A18_MARK, A17_MARK, A16_MARK, 498 A19_MARK, A18_MARK, A17_MARK, A16_MARK,
418 TEND0_MARK, DREQ1_MARK, DACK1_MARK, TEND1_MARK, 499 COM2_RI_MARK, R_SPI_MOSI_MARK, R_SPI_MISO_MARK,
500 R_SPI_RSPCK_MARK, R_SPI_SSL0_MARK, R_SPI_SSL1_MARK,
501 EVENT7_MARK, EVENT6_MARK, VBIOS_DI_MARK, VBIOS_DO_MARK,
502 VBIOS_CLK_MARK, VBIOS_CS_MARK,
419 503
420 /* PTW (mobule: LBSC) */ 504 /* PTW (mobule: LBSC, EVC, SCIF) */
421 A15_MARK, A14_MARK, A13_MARK, A12_MARK, 505 A15_MARK, A14_MARK, A13_MARK, A12_MARK,
422 A11_MARK, A10_MARK, A9_MARK, A8_MARK, 506 A11_MARK, A10_MARK, A9_MARK, A8_MARK,
507 EVENT5_MARK, EVENT4_MARK, EVENT3_MARK, EVENT2_MARK,
508 EVENT1_MARK, EVENT0_MARK, CTS4_MARK, CTS2_MARK,
423 509
424 /* PTX (mobule: LBSC) */ 510 /* PTX (mobule: LBSC, SCIF, SIM) */
425 A7_MARK, A6_MARK, A5_MARK, A4_MARK, 511 A7_MARK, A6_MARK, A5_MARK, A4_MARK,
426 A3_MARK, A2_MARK, A1_MARK, A0_MARK, 512 A3_MARK, A2_MARK, A1_MARK, A0_MARK,
513 RTS2_MARK, SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
427 514
428 /* PTY (mobule: LBSC) */ 515 /* PTY (mobule: LBSC) */
429 D7_MARK, D6_MARK, D5_MARK, D4_MARK, 516 D7_MARK, D6_MARK, D5_MARK, D4_MARK,
430 D3_MARK, D2_MARK, D1_MARK, D0_MARK, 517 D3_MARK, D2_MARK, D1_MARK, D0_MARK,
518
519 /* PTZ (mobule: eMMC, ONFI) */
520 MMCDAT7_MARK, MMCDAT6_MARK, MMCDAT5_MARK, MMCDAT4_MARK,
521 MMCDAT3_MARK, MMCDAT2_MARK, MMCDAT1_MARK, MMCDAT0_MARK,
522 ON_DQ7_MARK, ON_DQ6_MARK, ON_DQ5_MARK, ON_DQ4_MARK,
523 ON_DQ3_MARK, ON_DQ2_MARK, ON_DQ1_MARK, ON_DQ0_MARK,
524
431 PINMUX_MARK_END, 525 PINMUX_MARK_END,
432}; 526};
433 527
@@ -473,6 +567,8 @@ static pinmux_enum_t pinmux_data[] = {
473 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), 567 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
474 568
475 /* PTE GPIO */ 569 /* PTE GPIO */
570 PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT),
571 PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT),
476 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT), 572 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
477 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), 573 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
478 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), 574 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
@@ -521,7 +617,6 @@ static pinmux_enum_t pinmux_data[] = {
521 PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT), 617 PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT),
522 618
523 /* PTJ GPIO */ 619 /* PTJ GPIO */
524 PINMUX_DATA(PTJ7_DATA, PTJ7_IN, PTJ7_OUT),
525 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT), 620 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
526 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT), 621 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
527 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT), 622 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
@@ -541,7 +636,6 @@ static pinmux_enum_t pinmux_data[] = {
541 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), 636 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
542 637
543 /* PTL GPIO */ 638 /* PTL GPIO */
544 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
545 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), 639 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
546 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), 640 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
547 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), 641 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
@@ -560,7 +654,6 @@ static pinmux_enum_t pinmux_data[] = {
560 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), 654 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
561 655
562 /* PTN GPIO */ 656 /* PTN GPIO */
563 PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
564 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT), 657 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
565 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT), 658 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
566 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT), 659 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
@@ -609,6 +702,8 @@ static pinmux_enum_t pinmux_data[] = {
609 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), 702 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
610 703
611 /* PTT GPIO */ 704 /* PTT GPIO */
705 PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT),
706 PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT),
612 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT), 707 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
613 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), 708 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
614 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), 709 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
@@ -677,186 +772,204 @@ static pinmux_enum_t pinmux_data[] = {
677 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT), 772 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
678 773
679 /* PTA FN */ 774 /* PTA FN */
680 PINMUX_DATA(BS_MARK, PS0_15_FN1, PTA7_FN), 775 PINMUX_DATA(BS_MARK, PTA7_FN),
681 PINMUX_DATA(LGPIO7_MARK, PS0_15_FN3, PTA7_FN), 776 PINMUX_DATA(RDWR_MARK, PTA6_FN),
682 PINMUX_DATA(RDWR_MARK, PS0_14_FN1, PTA6_FN), 777 PINMUX_DATA(WE1_MARK, PTA5_FN),
683 PINMUX_DATA(LGPIO6_MARK, PS0_14_FN3, PTA6_FN), 778 PINMUX_DATA(RDY_MARK, PTA4_FN),
684 PINMUX_DATA(WE1_MARK, PS0_13_FN1, PTA5_FN), 779 PINMUX_DATA(ET0_MDC_MARK, PTA3_FN),
685 PINMUX_DATA(LGPIO5_MARK, PS0_13_FN3, PTA5_FN), 780 PINMUX_DATA(ET0_MDIO_MARK, PTA2_FN),
686 PINMUX_DATA(RDY_MARK, PS0_12_FN1, PTA4_FN), 781 PINMUX_DATA(ET1_MDC_MARK, PTA1_FN),
687 PINMUX_DATA(LGPIO4_MARK, PS0_12_FN3, PTA4_FN), 782 PINMUX_DATA(ET1_MDIO_MARK, PTA0_FN),
688 PINMUX_DATA(LGPIO3_MARK, PTA3_FN),
689 PINMUX_DATA(LGPIO2_MARK, PTA2_FN),
690 PINMUX_DATA(LGPIO1_MARK, PTA1_FN),
691 PINMUX_DATA(LGPIO0_MARK, PTA0_FN),
692 783
693 /* PTB FN */ 784 /* PTB FN */
694 PINMUX_DATA(D15_MARK, PS0_7_FN1, PTB7_FN), 785 PINMUX_DATA(IRQ15_MARK, PS0_15_FN1, PTB7_FN),
695 PINMUX_DATA(ET0_MDC_MARK, PS0_7_FN2, PTB7_FN), 786 PINMUX_DATA(ON_NRE_MARK, PS0_15_FN2, PTB7_FN),
696 PINMUX_DATA(D14_MARK, PS0_6_FN1, PTB6_FN), 787 PINMUX_DATA(IRQ14_MARK, PS0_14_FN1, PTB6_FN),
697 PINMUX_DATA(ET0_MDIO_MARK, PS0_6_FN2, PTB6_FN), 788 PINMUX_DATA(ON_NWE_MARK, PS0_14_FN2, PTB6_FN),
698 PINMUX_DATA(D13_MARK, PS0_5_FN1, PTB5_FN), 789 PINMUX_DATA(IRQ13_MARK, PS0_13_FN1, PTB5_FN),
699 PINMUX_DATA(ET1_MDC_MARK, PS0_5_FN2, PTB5_FN), 790 PINMUX_DATA(ON_NWP_MARK, PS0_13_FN2, PTB5_FN),
700 PINMUX_DATA(D12_MARK, PS0_4_FN1, PTB4_FN), 791 PINMUX_DATA(IRQ12_MARK, PS0_12_FN1, PTB4_FN),
701 PINMUX_DATA(ET1_MDIO_MARK, PS0_4_FN2, PTB4_FN), 792 PINMUX_DATA(ON_NCE0_MARK, PS0_12_FN2, PTB4_FN),
702 PINMUX_DATA(D11_MARK, PS0_3_FN1, PTB3_FN), 793 PINMUX_DATA(IRQ11_MARK, PS0_11_FN1, PTB3_FN),
703 PINMUX_DATA(SIM_D_MARK, PS0_3_FN2, PTB3_FN), 794 PINMUX_DATA(ON_R_B0_MARK, PS0_11_FN2, PTB3_FN),
704 PINMUX_DATA(D10_MARK, PS0_2_FN1, PTB2_FN), 795 PINMUX_DATA(IRQ10_MARK, PS0_10_FN1, PTB2_FN),
705 PINMUX_DATA(SIM_CLK_MARK, PS0_2_FN2, PTB2_FN), 796 PINMUX_DATA(ON_ALE_MARK, PS0_10_FN2, PTB2_FN),
706 PINMUX_DATA(D9_MARK, PS0_1_FN1, PTB1_FN), 797 PINMUX_DATA(IRQ9_MARK, PS0_9_FN1, PTB1_FN),
707 PINMUX_DATA(SIM_RST_MARK, PS0_1_FN2, PTB1_FN), 798 PINMUX_DATA(ON_CLE_MARK, PS0_9_FN2, PTB1_FN),
708 PINMUX_DATA(D8_MARK, PTB0_FN), 799 PINMUX_DATA(IRQ8_MARK, PS0_8_FN1, PTB0_FN),
800 PINMUX_DATA(TCLK_MARK, PS0_8_FN2, PTB0_FN),
709 801
710 /* PTC FN */ 802 /* PTC FN */
711 PINMUX_DATA(SD_WP_MARK, PTC7_FN), 803 PINMUX_DATA(IRQ7_MARK, PS0_7_FN1, PTC7_FN),
712 PINMUX_DATA(SD_CD_MARK, PTC6_FN), 804 PINMUX_DATA(PWMU0_MARK, PS0_7_FN2, PTC7_FN),
713 PINMUX_DATA(SD_CLK_MARK, PTC5_FN), 805 PINMUX_DATA(IRQ6_MARK, PS0_6_FN1, PTC6_FN),
714 PINMUX_DATA(SD_CMD_MARK, PTC4_FN), 806 PINMUX_DATA(PWMU1_MARK, PS0_6_FN2, PTC6_FN),
715 PINMUX_DATA(SD_D3_MARK, PTC3_FN), 807 PINMUX_DATA(IRQ5_MARK, PS0_5_FN1, PTC5_FN),
716 PINMUX_DATA(SD_D2_MARK, PTC2_FN), 808 PINMUX_DATA(PWMU2_MARK, PS0_5_FN2, PTC5_FN),
717 PINMUX_DATA(SD_D1_MARK, PTC1_FN), 809 PINMUX_DATA(IRQ4_MARK, PS0_4_FN1, PTC5_FN),
718 PINMUX_DATA(SD_D0_MARK, PTC0_FN), 810 PINMUX_DATA(PWMU3_MARK, PS0_4_FN2, PTC4_FN),
811 PINMUX_DATA(IRQ3_MARK, PS0_3_FN1, PTC3_FN),
812 PINMUX_DATA(PWMU4_MARK, PS0_3_FN2, PTC3_FN),
813 PINMUX_DATA(IRQ2_MARK, PS0_2_FN1, PTC2_FN),
814 PINMUX_DATA(PWMU5_MARK, PS0_2_FN2, PTC2_FN),
815 PINMUX_DATA(IRQ1_MARK, PTC1_FN),
816 PINMUX_DATA(IRQ0_MARK, PTC0_FN),
719 817
720 /* PTD FN */ 818 /* PTD FN */
721 PINMUX_DATA(IRQ7_MARK, PS1_7_FN1, PTD7_FN), 819 PINMUX_DATA(SP0_MOSI_MARK, PTD7_FN),
722 PINMUX_DATA(ADTRG1_MARK, PS1_7_FN3, PTD7_FN), 820 PINMUX_DATA(SP0_MISO_MARK, PTD6_FN),
723 PINMUX_DATA(IRQ6_MARK, PS1_6_FN1, PTD6_FN), 821 PINMUX_DATA(SP0_SCK_MARK, PTD5_FN),
724 PINMUX_DATA(ADTRG0_MARK, PS1_6_FN3, PTD6_FN), 822 PINMUX_DATA(SP0_SCK_FB_MARK, PTD4_FN),
725 PINMUX_DATA(IRQ5_MARK, PTD5_FN), 823 PINMUX_DATA(SP0_SS0_MARK, PTD3_FN),
726 PINMUX_DATA(IRQ4_MARK, PTD4_FN), 824 PINMUX_DATA(SP0_SS1_MARK, PS1_10_FN1, PTD2_FN),
727 PINMUX_DATA(IRQ3_MARK, PTD3_FN), 825 PINMUX_DATA(DREQ0_MARK, PS1_10_FN2, PTD2_FN),
728 PINMUX_DATA(IRQ2_MARK, PTD2_FN), 826 PINMUX_DATA(SP0_SS2_MARK, PS1_9_FN1, PTD1_FN),
729 PINMUX_DATA(IRQ1_MARK, PTD1_FN), 827 PINMUX_DATA(DACK0_MARK, PS1_9_FN2, PTD1_FN),
730 PINMUX_DATA(IRQ0_MARK, PTD0_FN), 828 PINMUX_DATA(SP0_SS3_MARK, PS1_8_FN1, PTD0_FN),
829 PINMUX_DATA(TEND0_MARK, PS1_8_FN2, PTD0_FN),
731 830
732 /* PTE FN */ 831 /* PTE FN */
733 PINMUX_DATA(ET0_CRS_DV_MARK, PTE7_FN), 832 PINMUX_DATA(RMII0_CRS_DV_MARK, PTE7_FN),
734 PINMUX_DATA(ET0_TXD1_MARK, PTE6_FN), 833 PINMUX_DATA(RMII0_TXD1_MARK, PTE6_FN),
735 PINMUX_DATA(ET0_TXD0_MARK, PTE5_FN), 834 PINMUX_DATA(RMII0_TXD0_MARK, PTE5_FN),
736 PINMUX_DATA(ET0_TX_EN_MARK, PTE4_FN), 835 PINMUX_DATA(RMII0_TXEN_MARK, PTE4_FN),
737 PINMUX_DATA(ET0_REF_CLK_MARK, PTE3_FN), 836 PINMUX_DATA(RMII0_REFCLK_MARK, PTE3_FN),
738 PINMUX_DATA(ET0_RXD1_MARK, PTE2_FN), 837 PINMUX_DATA(RMII0_RXD1_MARK, PTE2_FN),
739 PINMUX_DATA(ET0_RXD0_MARK, PTE1_FN), 838 PINMUX_DATA(RMII0_RXD0_MARK, PTE1_FN),
740 PINMUX_DATA(ET0_RX_ER_MARK, PTE0_FN), 839 PINMUX_DATA(RMII0_RX_ER_MARK, PTE0_FN),
741 840
742 /* PTF FN */ 841 /* PTF FN */
743 PINMUX_DATA(ET1_CRS_DV_MARK, PTF7_FN), 842 PINMUX_DATA(RMII1_CRS_DV_MARK, PTF7_FN),
744 PINMUX_DATA(ET1_TXD1_MARK, PTF6_FN), 843 PINMUX_DATA(RMII1_TXD1_MARK, PTF6_FN),
745 PINMUX_DATA(ET1_TXD0_MARK, PTF5_FN), 844 PINMUX_DATA(RMII1_TXD0_MARK, PTF5_FN),
746 PINMUX_DATA(ET1_TX_EN_MARK, PTF4_FN), 845 PINMUX_DATA(RMII1_TXEN_MARK, PTF4_FN),
747 PINMUX_DATA(ET1_REF_CLK_MARK, PTF3_FN), 846 PINMUX_DATA(RMII1_REFCLK_MARK, PTF3_FN),
748 PINMUX_DATA(ET1_RXD1_MARK, PTF2_FN), 847 PINMUX_DATA(RMII1_RXD1_MARK, PS1_2_FN1, PTF2_FN),
749 PINMUX_DATA(ET1_RXD0_MARK, PTF1_FN), 848 PINMUX_DATA(RAC_RI_MARK, PS1_2_FN2, PTF2_FN),
750 PINMUX_DATA(ET1_RX_ER_MARK, PTF0_FN), 849 PINMUX_DATA(RMII1_RXD0_MARK, PTF1_FN),
850 PINMUX_DATA(RMII1_RX_ER_MARK, PTF0_FN),
751 851
752 /* PTG FN */ 852 /* PTG FN */
753 PINMUX_DATA(PWX0_MARK, PTG7_FN), 853 PINMUX_DATA(BOOTFMS_MARK, PTG7_FN),
754 PINMUX_DATA(PWX1_MARK, PTG6_FN), 854 PINMUX_DATA(BOOTWP_MARK, PTG6_FN),
755 PINMUX_DATA(STATUS0_MARK, PS2_13_FN1, PTG5_FN), 855 PINMUX_DATA(A25_MARK, PS2_13_FN1, PTG5_FN),
756 PINMUX_DATA(PWX2_MARK, PS2_13_FN3, PTG5_FN), 856 PINMUX_DATA(MMCCLK_MARK, PS2_13_FN2, PTG5_FN),
757 PINMUX_DATA(STATUS1_MARK, PS2_12_FN1, PTG4_FN), 857 PINMUX_DATA(A24_MARK, PS2_12_FN1, PTG4_FN),
758 PINMUX_DATA(PWX3_MARK, PS2_12_FN3, PTG4_FN), 858 PINMUX_DATA(MMCCMD_MARK, PS2_12_FN2, PTG4_FN),
759 PINMUX_DATA(SERIRQ_MARK, PTG3_FN), 859 PINMUX_DATA(SERIRQ_MARK, PTG3_FN),
760 PINMUX_DATA(CLKRUN_MARK, PTG2_FN), 860 PINMUX_DATA(WDTOVF_MARK, PTG2_FN),
761 PINMUX_DATA(LPCPD_MARK, PTG1_FN), 861 PINMUX_DATA(LPCPD_MARK, PTG1_FN),
762 PINMUX_DATA(LDRQ_MARK, PTG0_FN), 862 PINMUX_DATA(LDRQ_MARK, PTG0_FN),
763 863
764 /* PTH FN */ 864 /* PTH FN */
765 PINMUX_DATA(SP1_MOSI_MARK, PTH7_FN), 865 PINMUX_DATA(SP1_MOSI_MARK, PS2_7_FN1, PTH7_FN),
766 PINMUX_DATA(SP1_MISO_MARK, PTH6_FN), 866 PINMUX_DATA(TEND1_MARK, PS2_7_FN2, PTH7_FN),
767 PINMUX_DATA(SP1_SCK_MARK, PTH5_FN), 867 PINMUX_DATA(SP1_MISO_MARK, PS2_6_FN1, PTH6_FN),
768 PINMUX_DATA(SP1_SCK_FB_MARK, PTH4_FN), 868 PINMUX_DATA(DREQ1_MARK, PS2_6_FN2, PTH6_FN),
869 PINMUX_DATA(SP1_SCK_MARK, PS2_5_FN1, PTH5_FN),
870 PINMUX_DATA(DACK1_MARK, PS2_5_FN2, PTH5_FN),
871 PINMUX_DATA(SP1_SCK_FB_MARK, PS2_4_FN1, PTH4_FN),
872 PINMUX_DATA(ADTRG1_MARK, PS2_4_FN2, PTH4_FN),
769 PINMUX_DATA(SP1_SS0_MARK, PTH3_FN), 873 PINMUX_DATA(SP1_SS0_MARK, PTH3_FN),
770 PINMUX_DATA(TCLK_MARK, PTH2_FN), 874 PINMUX_DATA(SP1_SS1_MARK, PS2_2_FN1, PTH2_FN),
771 PINMUX_DATA(RXD4_MARK, PS2_1_FN1, PTH1_FN), 875 PINMUX_DATA(ADTRG0_MARK, PS2_2_FN2, PTH2_FN),
772 PINMUX_DATA(SP1_SS1_MARK, PS2_1_FN2, PTH1_FN), 876 PINMUX_DATA(WP_MARK, PTH1_FN),
773 PINMUX_DATA(TXD4_MARK, PS2_0_FN1, PTH0_FN), 877 PINMUX_DATA(FMS0_MARK, PTH0_FN),
774 PINMUX_DATA(SP0_SS1_MARK, PS2_0_FN2, PTH0_FN),
775 878
776 /* PTI FN */ 879 /* PTI FN */
777 PINMUX_DATA(IRQ15_MARK, PTI7_FN), 880 PINMUX_DATA(D15_MARK, PS3_15_FN1, PTI7_FN),
778 PINMUX_DATA(IRQ14_MARK, PTI6_FN), 881 PINMUX_DATA(SD_WP_MARK, PS3_15_FN2, PTI7_FN),
779 PINMUX_DATA(IRQ13_MARK, PTI5_FN), 882 PINMUX_DATA(D14_MARK, PS3_14_FN1, PTI6_FN),
780 PINMUX_DATA(IRQ12_MARK, PTI4_FN), 883 PINMUX_DATA(SD_CD_MARK, PS3_14_FN2, PTI6_FN),
781 PINMUX_DATA(IRQ11_MARK, PTI3_FN), 884 PINMUX_DATA(D13_MARK, PS3_13_FN1, PTI5_FN),
782 PINMUX_DATA(IRQ10_MARK, PTI2_FN), 885 PINMUX_DATA(SD_CLK_MARK, PS3_13_FN2, PTI5_FN),
783 PINMUX_DATA(IRQ9_MARK, PTI1_FN), 886 PINMUX_DATA(D12_MARK, PS3_12_FN1, PTI4_FN),
784 PINMUX_DATA(IRQ8_MARK, PTI0_FN), 887 PINMUX_DATA(SD_CMD_MARK, PS3_12_FN2, PTI4_FN),
888 PINMUX_DATA(D11_MARK, PS3_11_FN1, PTI3_FN),
889 PINMUX_DATA(SD_D3_MARK, PS3_11_FN2, PTI3_FN),
890 PINMUX_DATA(D10_MARK, PS3_10_FN1, PTI2_FN),
891 PINMUX_DATA(SD_D2_MARK, PS3_10_FN2, PTI2_FN),
892 PINMUX_DATA(D9_MARK, PS3_9_FN1, PTI1_FN),
893 PINMUX_DATA(SD_D1_MARK, PS3_9_FN2, PTI1_FN),
894 PINMUX_DATA(D8_MARK, PS3_8_FN1, PTI0_FN),
895 PINMUX_DATA(SD_D0_MARK, PS3_8_FN2, PTI0_FN),
785 896
786 /* PTJ FN */ 897 /* PTJ FN */
787 PINMUX_DATA(RXD3_MARK, PTJ7_FN), 898 PINMUX_DATA(RTS3_MARK, PTJ6_FN),
788 PINMUX_DATA(TXD3_MARK, PTJ6_FN), 899 PINMUX_DATA(CTS3_MARK, PTJ5_FN),
789 PINMUX_DATA(RXD2_MARK, PTJ5_FN), 900 PINMUX_DATA(TXD3_MARK, PTJ4_FN),
790 PINMUX_DATA(TXD2_MARK, PTJ4_FN), 901 PINMUX_DATA(RXD3_MARK, PTJ3_FN),
791 PINMUX_DATA(COM1_TXD_MARK, PTJ3_FN), 902 PINMUX_DATA(RTS4_MARK, PTJ2_FN),
792 PINMUX_DATA(COM1_RXD_MARK, PTJ2_FN), 903 PINMUX_DATA(RXD4_MARK, PTJ1_FN),
793 PINMUX_DATA(COM1_RTS_MARK, PTJ1_FN), 904 PINMUX_DATA(TXD4_MARK, PTJ0_FN),
794 PINMUX_DATA(COM1_CTS_MARK, PTJ0_FN),
795 905
796 /* PTK FN */ 906 /* PTK FN */
797 PINMUX_DATA(COM2_TXD_MARK, PTK7_FN), 907 PINMUX_DATA(COM2_TXD_MARK, PS3_7_FN1, PTK7_FN),
908 PINMUX_DATA(SCK2_MARK, PS3_7_FN2, PTK7_FN),
798 PINMUX_DATA(COM2_RXD_MARK, PTK6_FN), 909 PINMUX_DATA(COM2_RXD_MARK, PTK6_FN),
799 PINMUX_DATA(COM2_RTS_MARK, PTK5_FN), 910 PINMUX_DATA(COM2_RTS_MARK, PTK5_FN),
800 PINMUX_DATA(COM2_CTS_MARK, PTK4_FN), 911 PINMUX_DATA(COM2_CTS_MARK, PTK4_FN),
801 PINMUX_DATA(COM2_DTR_MARK, PTK3_FN), 912 PINMUX_DATA(COM2_DTR_MARK, PTK3_FN),
802 PINMUX_DATA(COM2_DSR_MARK, PTK2_FN), 913 PINMUX_DATA(COM2_DSR_MARK, PS3_2_FN1, PTK2_FN),
803 PINMUX_DATA(COM2_DCD_MARK, PTK1_FN), 914 PINMUX_DATA(SCK4_MARK, PS3_2_FN2, PTK2_FN),
804 PINMUX_DATA(COM2_RI_MARK, PTK0_FN), 915 PINMUX_DATA(COM2_DCD_MARK, PS3_1_FN1, PTK1_FN),
916 PINMUX_DATA(SCK3_MARK, PS3_1_FN2, PTK1_FN),
917 PINMUX_DATA(CLKOUT_MARK, PTK0_FN),
805 918
806 /* PTL FN */ 919 /* PTL FN */
807 PINMUX_DATA(RAC_TXD_MARK, PTL7_FN), 920 PINMUX_DATA(RAC_RXD_MARK, PS4_14_FN1, PTL6_FN),
808 PINMUX_DATA(RAC_RXD_MARK, PTL6_FN), 921 PINMUX_DATA(RXD2_MARK, PS4_14_FN2, PTL6_FN),
809 PINMUX_DATA(RAC_RTS_MARK, PTL5_FN), 922 PINMUX_DATA(RAC_RTS_MARK, PS4_13_FN1, PTL5_FN),
810 PINMUX_DATA(RAC_CTS_MARK, PTL4_FN), 923 PINMUX_DATA(CS5_MARK, PS4_13_FN2, PTL5_FN),
924 PINMUX_DATA(RAC_CTS_MARK, PS4_12_FN1, PTL4_FN),
925 PINMUX_DATA(CS6_MARK, PS4_12_FN2, PTL4_FN),
811 PINMUX_DATA(RAC_DTR_MARK, PTL3_FN), 926 PINMUX_DATA(RAC_DTR_MARK, PTL3_FN),
812 PINMUX_DATA(RAC_DSR_MARK, PTL2_FN), 927 PINMUX_DATA(RAC_DSR_MARK, PS4_10_FN1, PTL2_FN),
813 PINMUX_DATA(RAC_DCD_MARK, PTL1_FN), 928 PINMUX_DATA(AUDSYNC_MARK, PS4_10_FN2, PTL2_FN),
814 PINMUX_DATA(RAC_RI_MARK, PTL0_FN), 929 PINMUX_DATA(RAC_DCD_MARK, PS4_9_FN1, PTL1_FN),
930 PINMUX_DATA(AUDCK_MARK, PS4_9_FN2, PTL1_FN),
931 PINMUX_DATA(RAC_TXD_MARK, PS4_8_FN1, PTL0_FN),
932 PINMUX_DATA(TXD2_MARK, PS4_8_FN1, PTL0_FN),
815 933
816 /* PTM FN */ 934 /* PTM FN */
817 PINMUX_DATA(WP_MARK, PTM6_FN), 935 PINMUX_DATA(CS4_MARK, PTM7_FN),
818 PINMUX_DATA(FMS0_MARK, PTM5_FN), 936 PINMUX_DATA(RD_MARK, PTM6_FN),
819 PINMUX_DATA(FMS1_MARK, PTM4_FN), 937 PINMUX_DATA(WE0_MARK, PTM7_FN),
938 PINMUX_DATA(CS0_MARK, PTM4_FN),
820 PINMUX_DATA(SDA6_MARK, PTM3_FN), 939 PINMUX_DATA(SDA6_MARK, PTM3_FN),
821 PINMUX_DATA(SCL6_MARK, PTM2_FN), 940 PINMUX_DATA(SCL6_MARK, PTM2_FN),
822 PINMUX_DATA(SDA7_MARK, PTM1_FN), 941 PINMUX_DATA(SDA7_MARK, PTM1_FN),
823 PINMUX_DATA(SCL7_MARK, PTM0_FN), 942 PINMUX_DATA(SCL7_MARK, PTM0_FN),
824 943
825 /* PTN FN */ 944 /* PTN FN */
826 PINMUX_DATA(SCK2_MARK, PS4_15_FN1, PTN7_FN), 945 PINMUX_DATA(VBUS_EN_MARK, PTN6_FN),
827 PINMUX_DATA(EVENT7_MARK, PS4_15_FN2, PTN7_FN), 946 PINMUX_DATA(VBUS_OC_MARK, PTN5_FN),
828 PINMUX_DATA(RTS4_MARK, PS4_14_FN1, PTN6_FN), 947 PINMUX_DATA(JMCTCK_MARK, PS4_4_FN1, PTN4_FN),
829 PINMUX_DATA(EVENT6_MARK, PS4_14_FN2, PTN6_FN), 948 PINMUX_DATA(SGPIO1_CLK_MARK, PS4_4_FN2, PTN4_FN),
830 PINMUX_DATA(RTS3_MARK, PS4_13_FN1, PTN5_FN), 949 PINMUX_DATA(JMCTMS_MARK, PS4_3_FN1, PTN5_FN),
831 PINMUX_DATA(EVENT5_MARK, PS4_13_FN2, PTN5_FN), 950 PINMUX_DATA(SGPIO1_LOAD_MARK, PS4_3_FN2, PTN5_FN),
832 PINMUX_DATA(RTS2_MARK, PS4_12_FN1, PTN4_FN), 951 PINMUX_DATA(JMCTDO_MARK, PS4_2_FN1, PTN2_FN),
833 PINMUX_DATA(EVENT4_MARK, PS4_12_FN2, PTN4_FN), 952 PINMUX_DATA(SGPIO1_DO_MARK, PS4_2_FN2, PTN2_FN),
834 PINMUX_DATA(CTS4_MARK, PS4_11_FN1, PTN3_FN), 953 PINMUX_DATA(JMCTDI_MARK, PS4_1_FN1, PTN1_FN),
835 PINMUX_DATA(EVENT3_MARK, PS4_11_FN2, PTN3_FN), 954 PINMUX_DATA(SGPIO1_DI_MARK, PS4_1_FN2, PTN1_FN),
836 PINMUX_DATA(CTS3_MARK, PS4_10_FN1, PTN2_FN), 955 PINMUX_DATA(JMCTRST_MARK, PS4_0_FN1, PTN0_FN),
837 PINMUX_DATA(EVENT2_MARK, PS4_10_FN2, PTN2_FN), 956 PINMUX_DATA(SUB_CLKIN_MARK, PS4_0_FN2, PTN0_FN),
838 PINMUX_DATA(CTS2_MARK, PS4_9_FN1, PTN1_FN),
839 PINMUX_DATA(EVENT1_MARK, PS4_9_FN2, PTN1_FN),
840 PINMUX_DATA(EVENT0_MARK, PTN0_FN),
841 957
842 /* PTO FN */ 958 /* PTO FN */
843 PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN), 959 PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN),
844 PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN), 960 PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN),
845 PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN), 961 PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN),
846 PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN), 962 PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN),
847 PINMUX_DATA(SGPIO1_CLK_MARK, PTO3_FN), 963 PINMUX_DATA(SGPIO2_CLK_MARK, PS5_11_FN1, PTO3_FN),
848 PINMUX_DATA(SGPIO1_LOAD_MARK, PTO2_FN), 964 PINMUX_DATA(COM1_TXD_MARK, PS5_11_FN2, PTO3_FN),
849 PINMUX_DATA(SGPIO1_DI_MARK, PTO1_FN), 965 PINMUX_DATA(SGPIO2_LOAD_MARK, PS5_10_FN1, PTO2_FN),
850 PINMUX_DATA(SGPIO1_DO_MARK, PTO0_FN), 966 PINMUX_DATA(COM1_RXD_MARK, PS5_10_FN2, PTO2_FN),
967 PINMUX_DATA(SGPIO2_DI_MARK, PS5_9_FN1, PTO1_FN),
968 PINMUX_DATA(COM1_RTS_MARK, PS5_9_FN2, PTO1_FN),
969 PINMUX_DATA(SGPIO2_DO_MARK, PS5_8_FN1, PTO0_FN),
970 PINMUX_DATA(COM1_CTS_MARK, PS5_8_FN2, PTO0_FN),
851 971
852 /* PTP FN */ 972 /* PTP FN */
853 PINMUX_DATA(JMCTCK_MARK, PTP6_FN),
854 PINMUX_DATA(JMCTMS_MARK, PTP5_FN),
855 PINMUX_DATA(JMCTDO_MARK, PTP4_FN),
856 PINMUX_DATA(JMCTDI_MARK, PTP3_FN),
857 PINMUX_DATA(JMCRST_MARK, PTP2_FN),
858 PINMUX_DATA(SCK4_MARK, PTP1_FN),
859 PINMUX_DATA(SCK3_MARK, PTP0_FN),
860 973
861 /* PTQ FN */ 974 /* PTQ FN */
862 PINMUX_DATA(LAD3_MARK, PTQ6_FN), 975 PINMUX_DATA(LAD3_MARK, PTQ6_FN),
@@ -864,8 +977,8 @@ static pinmux_enum_t pinmux_data[] = {
864 PINMUX_DATA(LAD1_MARK, PTQ4_FN), 977 PINMUX_DATA(LAD1_MARK, PTQ4_FN),
865 PINMUX_DATA(LAD0_MARK, PTQ3_FN), 978 PINMUX_DATA(LAD0_MARK, PTQ3_FN),
866 PINMUX_DATA(LFRAME_MARK, PTQ2_FN), 979 PINMUX_DATA(LFRAME_MARK, PTQ2_FN),
867 PINMUX_DATA(SCK4_MARK, PTQ1_FN), 980 PINMUX_DATA(LRESET_MARK, PTQ1_FN),
868 PINMUX_DATA(SCK3_MARK, PTQ0_FN), 981 PINMUX_DATA(LCLK_MARK, PTQ0_FN),
869 982
870 /* PTR FN */ 983 /* PTR FN */
871 PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */ 984 PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */
@@ -888,58 +1001,84 @@ static pinmux_enum_t pinmux_data[] = {
888 PINMUX_DATA(SCL3_MARK, PTS0_FN), 1001 PINMUX_DATA(SCL3_MARK, PTS0_FN),
889 1002
890 /* PTT FN */ 1003 /* PTT FN */
891 PINMUX_DATA(AUDSYNC_MARK, PTS5_FN), 1004 PINMUX_DATA(PWMX7_MARK, PS5_7_FN1, PTT7_FN),
892 PINMUX_DATA(AUDCK_MARK, PTS4_FN), 1005 PINMUX_DATA(AUDATA3_MARK, PS5_7_FN2, PTT7_FN),
893 PINMUX_DATA(AUDATA3_MARK, PS4_3_FN1, PTS3_FN), 1006 PINMUX_DATA(PWMX6_MARK, PS5_6_FN1, PTT6_FN),
894 PINMUX_DATA(PWX7_MARK, PS4_3_FN2, PTS3_FN), 1007 PINMUX_DATA(AUDATA2_MARK, PS5_6_FN2, PTT6_FN),
895 PINMUX_DATA(AUDATA2_MARK, PS4_2_FN1, PTS2_FN), 1008 PINMUX_DATA(PWMX5_MARK, PS5_5_FN1, PTT5_FN),
896 PINMUX_DATA(PWX6_MARK, PS4_2_FN2, PTS2_FN), 1009 PINMUX_DATA(AUDATA1_MARK, PS5_5_FN2, PTT5_FN),
897 PINMUX_DATA(AUDATA1_MARK, PS4_1_FN1, PTS1_FN), 1010 PINMUX_DATA(PWMX4_MARK, PS5_4_FN1, PTT4_FN),
898 PINMUX_DATA(PWX5_MARK, PS4_1_FN2, PTS1_FN), 1011 PINMUX_DATA(AUDATA0_MARK, PS5_4_FN2, PTT4_FN),
899 PINMUX_DATA(AUDATA0_MARK, PS4_0_FN1, PTS0_FN), 1012 PINMUX_DATA(PWMX3_MARK, PS5_3_FN1, PTT3_FN),
900 PINMUX_DATA(PWX4_MARK, PS4_0_FN2, PTS0_FN), 1013 PINMUX_DATA(STATUS1_MARK, PS5_3_FN2, PTT3_FN),
1014 PINMUX_DATA(PWMX2_MARK, PS5_2_FN1, PTT2_FN),
1015 PINMUX_DATA(STATUS0_MARK, PS5_2_FN2, PTT2_FN),
1016 PINMUX_DATA(PWMX1_MARK, PTT1_FN),
1017 PINMUX_DATA(PWMX0_MARK, PTT0_FN),
901 1018
902 /* PTU FN */ 1019 /* PTU FN */
903 PINMUX_DATA(CS6_MARK, PTU7_FN), 1020 PINMUX_DATA(LGPIO7_MARK, PS6_15_FN1, PTU7_FN),
904 PINMUX_DATA(CS5_MARK, PTU6_FN), 1021 PINMUX_DATA(APMONCTL_O_MARK, PS6_15_FN2, PTU7_FN),
905 PINMUX_DATA(CS4_MARK, PTU5_FN), 1022 PINMUX_DATA(LGPIO6_MARK, PS6_14_FN1, PTU6_FN),
906 PINMUX_DATA(CS0_MARK, PTU4_FN), 1023 PINMUX_DATA(APMPWBTOUT_O_MARK, PS6_14_FN2, PTU6_FN),
907 PINMUX_DATA(RD_MARK, PTU3_FN), 1024 PINMUX_DATA(LGPIO5_MARK, PS6_13_FN1, PTU5_FN),
908 PINMUX_DATA(WE0_MARK, PTU2_FN), 1025 PINMUX_DATA(APMSCI_O_MARK, PS6_13_FN2, PTU5_FN),
909 PINMUX_DATA(A25_MARK, PS5_9_FN1, PTU1_FN), 1026 PINMUX_DATA(LGPIO4_MARK, PS6_12_FN1, PTU4_FN),
910 PINMUX_DATA(DREQ0_MARK, PS5_9_FN2, PTU1_FN), 1027 PINMUX_DATA(APMVDDON_MARK, PS6_12_FN2, PTU4_FN),
911 PINMUX_DATA(A24_MARK, PS5_8_FN1, PTU0_FN), 1028 PINMUX_DATA(LGPIO3_MARK, PS6_11_FN1, PTU3_FN),
912 PINMUX_DATA(DACK0_MARK, PS5_8_FN2, PTU0_FN), 1029 PINMUX_DATA(APMSLPBTN_MARK, PS6_11_FN2, PTU3_FN),
1030 PINMUX_DATA(LGPIO2_MARK, PS6_10_FN1, PTU2_FN),
1031 PINMUX_DATA(APMPWRBTN_MARK, PS6_10_FN2, PTU2_FN),
1032 PINMUX_DATA(LGPIO1_MARK, PS6_9_FN1, PTU1_FN),
1033 PINMUX_DATA(APMS5N_MARK, PS6_9_FN2, PTU1_FN),
1034 PINMUX_DATA(LGPIO0_MARK, PS6_8_FN1, PTU0_FN),
1035 PINMUX_DATA(APMS3N_MARK, PS6_8_FN2, PTU0_FN),
913 1036
914 /* PTV FN */ 1037 /* PTV FN */
915 PINMUX_DATA(A23_MARK, PS5_7_FN1, PTV7_FN), 1038 PINMUX_DATA(A23_MARK, PS6_7_FN1, PTV7_FN),
916 PINMUX_DATA(TEND0_MARK, PS5_7_FN2, PTV7_FN), 1039 PINMUX_DATA(COM2_RI_MARK, PS6_7_FN2, PTV7_FN),
917 PINMUX_DATA(A22_MARK, PS5_6_FN1, PTV6_FN), 1040 PINMUX_DATA(A22_MARK, PS6_6_FN1, PTV6_FN),
918 PINMUX_DATA(DREQ1_MARK, PS5_6_FN2, PTV6_FN), 1041 PINMUX_DATA(R_SPI_MOSI_MARK, PS6_6_FN2, PTV6_FN),
919 PINMUX_DATA(A21_MARK, PS5_5_FN1, PTV5_FN), 1042 PINMUX_DATA(A21_MARK, PS6_5_FN1, PTV5_FN),
920 PINMUX_DATA(DACK1_MARK, PS5_5_FN2, PTV5_FN), 1043 PINMUX_DATA(R_SPI_MISO_MARK, PS6_5_FN2, PTV5_FN),
921 PINMUX_DATA(A20_MARK, PS5_4_FN1, PTV4_FN), 1044 PINMUX_DATA(A20_MARK, PS6_4_FN1, PTV4_FN),
922 PINMUX_DATA(TEND1_MARK, PS5_4_FN2, PTV4_FN), 1045 PINMUX_DATA(R_SPI_RSPCK_MARK, PS6_4_FN2, PTV4_FN),
923 PINMUX_DATA(A19_MARK, PTV3_FN), 1046 PINMUX_DATA(A19_MARK, PS6_3_FN1, PTV3_FN),
924 PINMUX_DATA(A18_MARK, PTV2_FN), 1047 PINMUX_DATA(R_SPI_SSL0_MARK, PS6_3_FN2, PTV3_FN),
925 PINMUX_DATA(A17_MARK, PTV1_FN), 1048 PINMUX_DATA(A18_MARK, PS6_2_FN1, PTV2_FN),
926 PINMUX_DATA(A16_MARK, PTV0_FN), 1049 PINMUX_DATA(R_SPI_SSL1_MARK, PS6_2_FN2, PTV2_FN),
1050 PINMUX_DATA(A17_MARK, PS6_1_FN1, PTV1_FN),
1051 PINMUX_DATA(EVENT7_MARK, PS6_1_FN2, PTV1_FN),
1052 PINMUX_DATA(A16_MARK, PS6_0_FN1, PTV0_FN),
1053 PINMUX_DATA(EVENT6_MARK, PS6_0_FN1, PTV0_FN),
927 1054
928 /* PTW FN */ 1055 /* PTW FN */
929 PINMUX_DATA(A15_MARK, PTW7_FN), 1056 PINMUX_DATA(A15_MARK, PS7_15_FN1, PTW7_FN),
930 PINMUX_DATA(A14_MARK, PTW6_FN), 1057 PINMUX_DATA(EVENT5_MARK, PS7_15_FN2, PTW7_FN),
931 PINMUX_DATA(A13_MARK, PTW5_FN), 1058 PINMUX_DATA(A14_MARK, PS7_14_FN1, PTW6_FN),
932 PINMUX_DATA(A12_MARK, PTW4_FN), 1059 PINMUX_DATA(EVENT4_MARK, PS7_14_FN2, PTW6_FN),
933 PINMUX_DATA(A11_MARK, PTW3_FN), 1060 PINMUX_DATA(A13_MARK, PS7_13_FN1, PTW5_FN),
934 PINMUX_DATA(A10_MARK, PTW2_FN), 1061 PINMUX_DATA(EVENT3_MARK, PS7_13_FN2, PTW5_FN),
935 PINMUX_DATA(A9_MARK, PTW1_FN), 1062 PINMUX_DATA(A12_MARK, PS7_12_FN1, PTW4_FN),
936 PINMUX_DATA(A8_MARK, PTW0_FN), 1063 PINMUX_DATA(EVENT2_MARK, PS7_12_FN2, PTW4_FN),
1064 PINMUX_DATA(A11_MARK, PS7_11_FN1, PTW3_FN),
1065 PINMUX_DATA(EVENT1_MARK, PS7_11_FN2, PTW3_FN),
1066 PINMUX_DATA(A10_MARK, PS7_10_FN1, PTW2_FN),
1067 PINMUX_DATA(EVENT0_MARK, PS7_10_FN2, PTW2_FN),
1068 PINMUX_DATA(A9_MARK, PS7_9_FN1, PTW1_FN),
1069 PINMUX_DATA(CTS4_MARK, PS7_9_FN2, PTW1_FN),
1070 PINMUX_DATA(A8_MARK, PS7_8_FN1, PTW0_FN),
1071 PINMUX_DATA(CTS2_MARK, PS7_8_FN2, PTW0_FN),
937 1072
938 /* PTX FN */ 1073 /* PTX FN */
939 PINMUX_DATA(A7_MARK, PTX7_FN), 1074 PINMUX_DATA(A7_MARK, PS7_7_FN1, PTX7_FN),
940 PINMUX_DATA(A6_MARK, PTX6_FN), 1075 PINMUX_DATA(RTS2_MARK, PS7_7_FN2, PTX7_FN),
941 PINMUX_DATA(A5_MARK, PTX5_FN), 1076 PINMUX_DATA(A6_MARK, PS7_6_FN1, PTX6_FN),
942 PINMUX_DATA(A4_MARK, PTX4_FN), 1077 PINMUX_DATA(SIM_D_MARK, PS7_6_FN2, PTX6_FN),
1078 PINMUX_DATA(A5_MARK, PS7_5_FN1, PTX5_FN),
1079 PINMUX_DATA(SIM_CLK_MARK, PS7_5_FN2, PTX5_FN),
1080 PINMUX_DATA(A4_MARK, PS7_4_FN1, PTX4_FN),
1081 PINMUX_DATA(SIM_RST_MARK, PS7_4_FN2, PTX4_FN),
943 PINMUX_DATA(A3_MARK, PTX3_FN), 1082 PINMUX_DATA(A3_MARK, PTX3_FN),
944 PINMUX_DATA(A2_MARK, PTX2_FN), 1083 PINMUX_DATA(A2_MARK, PTX2_FN),
945 PINMUX_DATA(A1_MARK, PTX1_FN), 1084 PINMUX_DATA(A1_MARK, PTX1_FN),
@@ -954,6 +1093,24 @@ static pinmux_enum_t pinmux_data[] = {
954 PINMUX_DATA(D2_MARK, PTY2_FN), 1093 PINMUX_DATA(D2_MARK, PTY2_FN),
955 PINMUX_DATA(D1_MARK, PTY1_FN), 1094 PINMUX_DATA(D1_MARK, PTY1_FN),
956 PINMUX_DATA(D0_MARK, PTY0_FN), 1095 PINMUX_DATA(D0_MARK, PTY0_FN),
1096
1097 /* PTZ FN */
1098 PINMUX_DATA(MMCDAT7_MARK, PS8_15_FN1, PTZ7_FN),
1099 PINMUX_DATA(ON_DQ7_MARK, PS8_15_FN2, PTZ7_FN),
1100 PINMUX_DATA(MMCDAT6_MARK, PS8_14_FN1, PTZ6_FN),
1101 PINMUX_DATA(ON_DQ6_MARK, PS8_14_FN2, PTZ6_FN),
1102 PINMUX_DATA(MMCDAT5_MARK, PS8_13_FN1, PTZ5_FN),
1103 PINMUX_DATA(ON_DQ5_MARK, PS8_13_FN2, PTZ5_FN),
1104 PINMUX_DATA(MMCDAT4_MARK, PS8_12_FN1, PTZ4_FN),
1105 PINMUX_DATA(ON_DQ4_MARK, PS8_12_FN2, PTZ4_FN),
1106 PINMUX_DATA(MMCDAT3_MARK, PS8_11_FN1, PTZ3_FN),
1107 PINMUX_DATA(ON_DQ3_MARK, PS8_11_FN2, PTZ3_FN),
1108 PINMUX_DATA(MMCDAT2_MARK, PS8_10_FN1, PTZ2_FN),
1109 PINMUX_DATA(ON_DQ2_MARK, PS8_10_FN2, PTZ2_FN),
1110 PINMUX_DATA(MMCDAT1_MARK, PS8_9_FN1, PTZ1_FN),
1111 PINMUX_DATA(ON_DQ1_MARK, PS8_9_FN2, PTZ1_FN),
1112 PINMUX_DATA(MMCDAT0_MARK, PS8_8_FN1, PTZ0_FN),
1113 PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN),
957}; 1114};
958 1115
959static struct pinmux_gpio pinmux_gpios[] = { 1116static struct pinmux_gpio pinmux_gpios[] = {
@@ -1048,7 +1205,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1048 PINMUX_GPIO(GPIO_PTI0, PTI0_DATA), 1205 PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
1049 1206
1050 /* PTJ */ 1207 /* PTJ */
1051 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
1052 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA), 1208 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
1053 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA), 1209 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1054 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA), 1210 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
@@ -1068,7 +1224,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1068 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA), 1224 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1069 1225
1070 /* PTL */ 1226 /* PTL */
1071 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
1072 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA), 1227 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1073 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA), 1228 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1074 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA), 1229 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
@@ -1078,6 +1233,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
1078 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA), 1233 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1079 1234
1080 /* PTM */ 1235 /* PTM */
1236 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
1081 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA), 1237 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1082 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA), 1238 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1083 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA), 1239 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
@@ -1087,7 +1243,6 @@ static struct pinmux_gpio pinmux_gpios[] = {
1087 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA), 1243 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1088 1244
1089 /* PTN */ 1245 /* PTN */
1090 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
1091 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA), 1246 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1092 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA), 1247 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1093 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA), 1248 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
@@ -1107,6 +1262,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
1107 PINMUX_GPIO(GPIO_PTO0, PTO0_DATA), 1262 PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
1108 1263
1109 /* PTP */ 1264 /* PTP */
1265 PINMUX_GPIO(GPIO_PTP7, PTP7_DATA),
1110 PINMUX_GPIO(GPIO_PTP6, PTP6_DATA), 1266 PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
1111 PINMUX_GPIO(GPIO_PTP5, PTP5_DATA), 1267 PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
1112 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA), 1268 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
@@ -1145,6 +1301,8 @@ static struct pinmux_gpio pinmux_gpios[] = {
1145 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA), 1301 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1146 1302
1147 /* PTT */ 1303 /* PTT */
1304 PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
1305 PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
1148 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA), 1306 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1149 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA), 1307 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1150 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA), 1308 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
@@ -1212,54 +1370,35 @@ static struct pinmux_gpio pinmux_gpios[] = {
1212 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), 1370 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1213 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA), 1371 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1214 1372
1215 /* PTA (mobule: LBSC, CPG, LPC) */ 1373 /* PTA (mobule: LBSC, RGMII) */
1216 PINMUX_GPIO(GPIO_FN_BS, BS_MARK), 1374 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1217 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), 1375 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
1218 PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK), 1376 PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK),
1219 PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK), 1377 PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK),
1220 PINMUX_GPIO(GPIO_FN_MD10, MD10_MARK),
1221 PINMUX_GPIO(GPIO_FN_MD9, MD9_MARK),
1222 PINMUX_GPIO(GPIO_FN_MD8, MD8_MARK),
1223 PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
1224 PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
1225 PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
1226 PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
1227 PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
1228 PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
1229 PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
1230 PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
1231
1232 /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
1233 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1234 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1235 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1236 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1237 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1238 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1239 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1240 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1241 PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK), 1378 PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK),
1242 PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK), 1379 PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDC_MARK),
1243 PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK), 1380 PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK),
1244 PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK), 1381 PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDC_MARK),
1245 PINMUX_GPIO(GPIO_FN_WPSZ1, WPSZ1_MARK),
1246 PINMUX_GPIO(GPIO_FN_WPSZ0, WPSZ0_MARK),
1247 PINMUX_GPIO(GPIO_FN_FWID, FWID_MARK),
1248 PINMUX_GPIO(GPIO_FN_FLSHSZ, FLSHSZ_MARK),
1249 PINMUX_GPIO(GPIO_FN_LPC_SPIEN, LPC_SPIEN_MARK),
1250 PINMUX_GPIO(GPIO_FN_BASEL, BASEL_MARK),
1251
1252 /* PTC (mobule: SD) */
1253 PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
1254 PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
1255 PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
1256 PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
1257 PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
1258 PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
1259 PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
1260 PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
1261 1382
1262 /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ 1383 /* PTB (mobule: INTC, ONFI, TMU) */
1384 PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK),
1385 PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK),
1386 PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK),
1387 PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK),
1388 PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK),
1389 PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK),
1390 PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK),
1391 PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK),
1392 PINMUX_GPIO(GPIO_FN_ON_NRE, ON_NRE_MARK),
1393 PINMUX_GPIO(GPIO_FN_ON_NWE, ON_NWE_MARK),
1394 PINMUX_GPIO(GPIO_FN_ON_NWP, ON_NWP_MARK),
1395 PINMUX_GPIO(GPIO_FN_ON_NCE0, ON_NCE0_MARK),
1396 PINMUX_GPIO(GPIO_FN_ON_R_B0, ON_R_B0_MARK),
1397 PINMUX_GPIO(GPIO_FN_ON_ALE, ON_ALE_MARK),
1398 PINMUX_GPIO(GPIO_FN_ON_CLE, ON_CLE_MARK),
1399 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
1400
1401 /* PTC (mobule: IRQ, PWMU) */
1263 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK), 1402 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1264 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK), 1403 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1265 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), 1404 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
@@ -1268,80 +1407,102 @@ static struct pinmux_gpio pinmux_gpios[] = {
1268 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), 1407 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1269 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), 1408 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1270 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), 1409 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1271 PINMUX_GPIO(GPIO_FN_MD6, MD6_MARK), 1410 PINMUX_GPIO(GPIO_FN_PWMU0, PWMU0_MARK),
1272 PINMUX_GPIO(GPIO_FN_MD5, MD5_MARK), 1411 PINMUX_GPIO(GPIO_FN_PWMU1, PWMU1_MARK),
1273 PINMUX_GPIO(GPIO_FN_MD3, MD3_MARK), 1412 PINMUX_GPIO(GPIO_FN_PWMU2, PWMU2_MARK),
1274 PINMUX_GPIO(GPIO_FN_MD2, MD2_MARK), 1413 PINMUX_GPIO(GPIO_FN_PWMU3, PWMU3_MARK),
1275 PINMUX_GPIO(GPIO_FN_MD1, MD1_MARK), 1414 PINMUX_GPIO(GPIO_FN_PWMU4, PWMU4_MARK),
1276 PINMUX_GPIO(GPIO_FN_MD0, MD0_MARK), 1415 PINMUX_GPIO(GPIO_FN_PWMU5, PWMU5_MARK),
1277 PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK), 1416
1278 PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK), 1417 /* PTD (mobule: SPI0, DMAC) */
1418 PINMUX_GPIO(GPIO_FN_SP0_MOSI, SP0_MOSI_MARK),
1419 PINMUX_GPIO(GPIO_FN_SP0_MISO, SP0_MISO_MARK),
1420 PINMUX_GPIO(GPIO_FN_SP0_SCK, SP0_SCK_MARK),
1421 PINMUX_GPIO(GPIO_FN_SP0_SCK_FB, SP0_SCK_FB_MARK),
1422 PINMUX_GPIO(GPIO_FN_SP0_SS0, SP0_SS0_MARK),
1423 PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK),
1424 PINMUX_GPIO(GPIO_FN_SP0_SS2, SP0_SS2_MARK),
1425 PINMUX_GPIO(GPIO_FN_SP0_SS3, SP0_SS3_MARK),
1426 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1427 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1428 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
1279 1429
1280 /* PTE (mobule: EtherC) */ 1430 /* PTE (mobule: RMII) */
1281 PINMUX_GPIO(GPIO_FN_ET0_CRS_DV, ET0_CRS_DV_MARK), 1431 PINMUX_GPIO(GPIO_FN_RMII0_CRS_DV, RMII0_CRS_DV_MARK),
1282 PINMUX_GPIO(GPIO_FN_ET0_TXD1, ET0_TXD1_MARK), 1432 PINMUX_GPIO(GPIO_FN_RMII0_TXD1, RMII0_TXD1_MARK),
1283 PINMUX_GPIO(GPIO_FN_ET0_TXD0, ET0_TXD0_MARK), 1433 PINMUX_GPIO(GPIO_FN_RMII0_TXD0, RMII0_TXD0_MARK),
1284 PINMUX_GPIO(GPIO_FN_ET0_TX_EN, ET0_TX_EN_MARK), 1434 PINMUX_GPIO(GPIO_FN_RMII0_TXEN, RMII0_TXEN_MARK),
1285 PINMUX_GPIO(GPIO_FN_ET0_REF_CLK, ET0_REF_CLK_MARK), 1435 PINMUX_GPIO(GPIO_FN_RMII0_REFCLK, RMII0_REFCLK_MARK),
1286 PINMUX_GPIO(GPIO_FN_ET0_RXD1, ET0_RXD1_MARK), 1436 PINMUX_GPIO(GPIO_FN_RMII0_RXD1, RMII0_RXD1_MARK),
1287 PINMUX_GPIO(GPIO_FN_ET0_RXD0, ET0_RXD0_MARK), 1437 PINMUX_GPIO(GPIO_FN_RMII0_RXD0, RMII0_RXD0_MARK),
1288 PINMUX_GPIO(GPIO_FN_ET0_RX_ER, ET0_RX_ER_MARK), 1438 PINMUX_GPIO(GPIO_FN_RMII0_RX_ER, RMII0_RX_ER_MARK),
1289 1439
1290 /* PTF (mobule: EtherC) */ 1440 /* PTF (mobule: RMII, SerMux) */
1291 PINMUX_GPIO(GPIO_FN_ET1_CRS_DV, ET1_CRS_DV_MARK), 1441 PINMUX_GPIO(GPIO_FN_RMII1_CRS_DV, RMII1_CRS_DV_MARK),
1292 PINMUX_GPIO(GPIO_FN_ET1_TXD1, ET1_TXD1_MARK), 1442 PINMUX_GPIO(GPIO_FN_RMII1_TXD1, RMII1_TXD1_MARK),
1293 PINMUX_GPIO(GPIO_FN_ET1_TXD0, ET1_TXD0_MARK), 1443 PINMUX_GPIO(GPIO_FN_RMII1_TXD0, RMII1_TXD0_MARK),
1294 PINMUX_GPIO(GPIO_FN_ET1_TX_EN, ET1_TX_EN_MARK), 1444 PINMUX_GPIO(GPIO_FN_RMII1_TXEN, RMII1_TXEN_MARK),
1295 PINMUX_GPIO(GPIO_FN_ET1_REF_CLK, ET1_REF_CLK_MARK), 1445 PINMUX_GPIO(GPIO_FN_RMII1_REFCLK, RMII1_REFCLK_MARK),
1296 PINMUX_GPIO(GPIO_FN_ET1_RXD1, ET1_RXD1_MARK), 1446 PINMUX_GPIO(GPIO_FN_RMII1_RXD1, RMII1_RXD1_MARK),
1297 PINMUX_GPIO(GPIO_FN_ET1_RXD0, ET1_RXD0_MARK), 1447 PINMUX_GPIO(GPIO_FN_RMII1_RXD0, RMII1_RXD0_MARK),
1298 PINMUX_GPIO(GPIO_FN_ET1_RX_ER, ET1_RX_ER_MARK), 1448 PINMUX_GPIO(GPIO_FN_RMII1_RX_ER, RMII1_RX_ER_MARK),
1299 1449 PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK),
1300 /* PTG (mobule: SYSTEM, PWMX, LPC) */ 1450
1301 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), 1451 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
1302 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), 1452 PINMUX_GPIO(GPIO_FN_BOOTFMS, BOOTFMS_MARK),
1303 PINMUX_GPIO(GPIO_FN_PWX0, PWX0_MARK), 1453 PINMUX_GPIO(GPIO_FN_BOOTWP, BOOTWP_MARK),
1304 PINMUX_GPIO(GPIO_FN_PWX1, PWX1_MARK), 1454 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1305 PINMUX_GPIO(GPIO_FN_PWX2, PWX2_MARK), 1455 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1306 PINMUX_GPIO(GPIO_FN_PWX3, PWX3_MARK),
1307 PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK), 1456 PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK),
1308 PINMUX_GPIO(GPIO_FN_CLKRUN, CLKRUN_MARK), 1457 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
1309 PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK), 1458 PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK),
1310 PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK), 1459 PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK),
1460 PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
1461 PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
1311 1462
1312 /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ 1463 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
1313 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
1314 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1315 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1316 PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK), 1464 PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK),
1317 PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK), 1465 PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK),
1318 PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK), 1466 PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK),
1319 PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK), 1467 PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK),
1320 PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK), 1468 PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK),
1321 PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK), 1469 PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK),
1322 PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK), 1470 PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
1471 PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
1472 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
1473 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1474 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1475 PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK),
1476 PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK),
1323 1477
1324 /* PTI (mobule: INTC) */ 1478 /* PTI (mobule: LBSC, SDHI) */
1325 PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK), 1479 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1326 PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK), 1480 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1327 PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK), 1481 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1328 PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK), 1482 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1329 PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK), 1483 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1330 PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK), 1484 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1331 PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK), 1485 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1332 PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK), 1486 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1487 PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
1488 PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
1489 PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
1490 PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
1491 PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
1492 PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
1493 PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
1494 PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
1333 1495
1334 /* PTJ (mobule: SCIF234, SERMUX) */ 1496 /* PTJ (mobule: SCIF234, SERMUX) */
1335 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), 1497 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1498 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1336 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), 1499 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1337 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), 1500 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1338 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), 1501 PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK),
1339 PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK), 1502 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1340 PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK), 1503 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1341 PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
1342 PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
1343 1504
1344 /* PTK (mobule: SERMUX) */ 1505 /* PTK (mobule: SERMUX, LBSC, SCIF) */
1345 PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK), 1506 PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK),
1346 PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK), 1507 PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK),
1347 PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK), 1508 PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK),
@@ -1349,62 +1510,65 @@ static struct pinmux_gpio pinmux_gpios[] = {
1349 PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK), 1510 PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK),
1350 PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK), 1511 PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK),
1351 PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK), 1512 PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK),
1352 PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK), 1513 PINMUX_GPIO(GPIO_FN_CLKOUT, CLKOUT_MARK),
1514 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1515 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1516 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1353 1517
1354 /* PTL (mobule: SERMUX) */ 1518 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
1355 PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
1356 PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK), 1519 PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK),
1357 PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK), 1520 PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK),
1358 PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK), 1521 PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK),
1359 PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK), 1522 PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK),
1360 PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK), 1523 PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK),
1361 PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK), 1524 PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK),
1362 PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK), 1525 PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
1526 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1527 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
1528 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
1529 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1530 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1531 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1363 1532
1364 /* PTM (mobule: IIC, LPC) */ 1533 /* PTM (mobule: LBSC, IIC) */
1534 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1535 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1536 PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
1537 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1365 PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK), 1538 PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK),
1366 PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK), 1539 PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK),
1367 PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK), 1540 PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK),
1368 PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK), 1541 PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK),
1369 PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
1370 PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
1371 PINMUX_GPIO(GPIO_FN_FMS1, FMS1_MARK),
1372 1542
1373 /* PTN (mobule: SCIF234, EVC) */ 1543 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
1374 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), 1544 PINMUX_GPIO(GPIO_FN_VBUS_EN, VBUS_EN_MARK),
1375 PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK), 1545 PINMUX_GPIO(GPIO_FN_VBUS_OC, VBUS_OC_MARK),
1376 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), 1546 PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
1377 PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK), 1547 PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
1378 PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK), 1548 PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
1379 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), 1549 PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
1380 PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK), 1550 PINMUX_GPIO(GPIO_FN_JMCTRST, JMCTRST_MARK),
1381 PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK), 1551 PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK),
1382 PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK), 1552 PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK),
1383 PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK), 1553 PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK),
1384 PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK), 1554 PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK),
1385 PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK), 1555 PINMUX_GPIO(GPIO_FN_SUB_CLKIN, SUB_CLKIN_MARK),
1386 PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
1387 PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
1388 PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
1389 1556
1390 /* PTO (mobule: SGPIO) */ 1557 /* PTO (mobule: SGPIO, SerMux) */
1391 PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK), 1558 PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK),
1392 PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK), 1559 PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK),
1393 PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK), 1560 PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK),
1394 PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK), 1561 PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK),
1395 PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK), 1562 PINMUX_GPIO(GPIO_FN_SGPIO2_CLK, SGPIO2_CLK_MARK),
1396 PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK), 1563 PINMUX_GPIO(GPIO_FN_SGPIO2_LOAD, SGPIO2_LOAD_MARK),
1397 PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK), 1564 PINMUX_GPIO(GPIO_FN_SGPIO2_DI, SGPIO2_DI_MARK),
1398 PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK), 1565 PINMUX_GPIO(GPIO_FN_SGPIO2_DO, SGPIO2_DO_MARK),
1566 PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK),
1567 PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK),
1568 PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
1569 PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
1399 1570
1400 /* PTP (mobule: JMC, SCIF234) */ 1571 /* PTP (mobule: EVC, ADC) */
1401 PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
1402 PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
1403 PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
1404 PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
1405 PINMUX_GPIO(GPIO_FN_JMCRST, JMCRST_MARK),
1406 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1407 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1408 1572
1409 /* PTQ (mobule: LPC) */ 1573 /* PTQ (mobule: LPC) */
1410 PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK), 1574 PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK),
@@ -1439,31 +1603,41 @@ static struct pinmux_gpio pinmux_gpios[] = {
1439 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK), 1603 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
1440 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK), 1604 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
1441 1605
1442 /* PTT (mobule: SYSTEM, PWMX) */ 1606 /* PTT (mobule: PWMX, AUD) */
1443 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), 1607 PINMUX_GPIO(GPIO_FN_PWMX7, PWMX7_MARK),
1444 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), 1608 PINMUX_GPIO(GPIO_FN_PWMX6, PWMX6_MARK),
1609 PINMUX_GPIO(GPIO_FN_PWMX5, PWMX5_MARK),
1610 PINMUX_GPIO(GPIO_FN_PWMX4, PWMX4_MARK),
1611 PINMUX_GPIO(GPIO_FN_PWMX3, PWMX3_MARK),
1612 PINMUX_GPIO(GPIO_FN_PWMX2, PWMX2_MARK),
1613 PINMUX_GPIO(GPIO_FN_PWMX1, PWMX1_MARK),
1614 PINMUX_GPIO(GPIO_FN_PWMX0, PWMX0_MARK),
1445 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), 1615 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1446 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), 1616 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1447 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), 1617 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1448 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), 1618 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1449 PINMUX_GPIO(GPIO_FN_PWX7, PWX7_MARK), 1619 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
1450 PINMUX_GPIO(GPIO_FN_PWX6, PWX6_MARK), 1620 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1451 PINMUX_GPIO(GPIO_FN_PWX5, PWX5_MARK),
1452 PINMUX_GPIO(GPIO_FN_PWX4, PWX4_MARK),
1453
1454 /* PTU (mobule: LBSC, DMAC) */
1455 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
1456 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
1457 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1458 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1459 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1460 PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
1461 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1462 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1463 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1464 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1465 1621
1466 /* PTV (mobule: LBSC, DMAC) */ 1622 /* PTU (mobule: LPC, APM) */
1623 PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
1624 PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
1625 PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
1626 PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
1627 PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
1628 PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
1629 PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
1630 PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
1631 PINMUX_GPIO(GPIO_FN_APMONCTL_O, APMONCTL_O_MARK),
1632 PINMUX_GPIO(GPIO_FN_APMPWBTOUT_O, APMPWBTOUT_O_MARK),
1633 PINMUX_GPIO(GPIO_FN_APMSCI_O, APMSCI_O_MARK),
1634 PINMUX_GPIO(GPIO_FN_APMVDDON, APMVDDON_MARK),
1635 PINMUX_GPIO(GPIO_FN_APMSLPBTN, APMSLPBTN_MARK),
1636 PINMUX_GPIO(GPIO_FN_APMPWRBTN, APMPWRBTN_MARK),
1637 PINMUX_GPIO(GPIO_FN_APMS5N, APMS5N_MARK),
1638 PINMUX_GPIO(GPIO_FN_APMS3N, APMS3N_MARK),
1639
1640 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
1467 PINMUX_GPIO(GPIO_FN_A23, A23_MARK), 1641 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1468 PINMUX_GPIO(GPIO_FN_A22, A22_MARK), 1642 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1469 PINMUX_GPIO(GPIO_FN_A21, A21_MARK), 1643 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
@@ -1472,12 +1646,20 @@ static struct pinmux_gpio pinmux_gpios[] = {
1472 PINMUX_GPIO(GPIO_FN_A18, A18_MARK), 1646 PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
1473 PINMUX_GPIO(GPIO_FN_A17, A17_MARK), 1647 PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
1474 PINMUX_GPIO(GPIO_FN_A16, A16_MARK), 1648 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1475 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), 1649 PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK),
1476 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), 1650 PINMUX_GPIO(GPIO_FN_R_SPI_MOSI, R_SPI_MOSI_MARK),
1477 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), 1651 PINMUX_GPIO(GPIO_FN_R_SPI_MISO, R_SPI_MISO_MARK),
1478 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), 1652 PINMUX_GPIO(GPIO_FN_R_SPI_RSPCK, R_SPI_RSPCK_MARK),
1653 PINMUX_GPIO(GPIO_FN_R_SPI_SSL0, R_SPI_SSL0_MARK),
1654 PINMUX_GPIO(GPIO_FN_R_SPI_SSL1, R_SPI_SSL1_MARK),
1655 PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK),
1656 PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK),
1657 PINMUX_GPIO(GPIO_FN_VBIOS_DI, VBIOS_DI_MARK),
1658 PINMUX_GPIO(GPIO_FN_VBIOS_DO, VBIOS_DO_MARK),
1659 PINMUX_GPIO(GPIO_FN_VBIOS_CLK, VBIOS_CLK_MARK),
1660 PINMUX_GPIO(GPIO_FN_VBIOS_CS, VBIOS_CS_MARK),
1479 1661
1480 /* PTW (mobule: LBSC) */ 1662 /* PTW (mobule: LBSC, EVC, SCIF) */
1481 PINMUX_GPIO(GPIO_FN_A16, A16_MARK), 1663 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1482 PINMUX_GPIO(GPIO_FN_A15, A15_MARK), 1664 PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
1483 PINMUX_GPIO(GPIO_FN_A14, A14_MARK), 1665 PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
@@ -1487,6 +1669,14 @@ static struct pinmux_gpio pinmux_gpios[] = {
1487 PINMUX_GPIO(GPIO_FN_A10, A10_MARK), 1669 PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
1488 PINMUX_GPIO(GPIO_FN_A9, A9_MARK), 1670 PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
1489 PINMUX_GPIO(GPIO_FN_A8, A8_MARK), 1671 PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
1672 PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK),
1673 PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK),
1674 PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK),
1675 PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
1676 PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
1677 PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
1678 PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK),
1679 PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK),
1490 1680
1491 /* PTX (mobule: LBSC) */ 1681 /* PTX (mobule: LBSC) */
1492 PINMUX_GPIO(GPIO_FN_A7, A7_MARK), 1682 PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
@@ -1497,6 +1687,10 @@ static struct pinmux_gpio pinmux_gpios[] = {
1497 PINMUX_GPIO(GPIO_FN_A2, A2_MARK), 1687 PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
1498 PINMUX_GPIO(GPIO_FN_A1, A1_MARK), 1688 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
1499 PINMUX_GPIO(GPIO_FN_A0, A0_MARK), 1689 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
1690 PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK),
1691 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
1692 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
1693 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
1500 1694
1501 /* PTY (mobule: LBSC) */ 1695 /* PTY (mobule: LBSC) */
1502 PINMUX_GPIO(GPIO_FN_D7, D7_MARK), 1696 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
@@ -1507,18 +1701,36 @@ static struct pinmux_gpio pinmux_gpios[] = {
1507 PINMUX_GPIO(GPIO_FN_D2, D2_MARK), 1701 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1508 PINMUX_GPIO(GPIO_FN_D1, D1_MARK), 1702 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1509 PINMUX_GPIO(GPIO_FN_D0, D0_MARK), 1703 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1704
1705 /* PTZ (mobule: eMMC, ONFI) */
1706 PINMUX_GPIO(GPIO_FN_MMCDAT7, MMCDAT7_MARK),
1707 PINMUX_GPIO(GPIO_FN_MMCDAT6, MMCDAT6_MARK),
1708 PINMUX_GPIO(GPIO_FN_MMCDAT5, MMCDAT5_MARK),
1709 PINMUX_GPIO(GPIO_FN_MMCDAT4, MMCDAT4_MARK),
1710 PINMUX_GPIO(GPIO_FN_MMCDAT3, MMCDAT3_MARK),
1711 PINMUX_GPIO(GPIO_FN_MMCDAT2, MMCDAT2_MARK),
1712 PINMUX_GPIO(GPIO_FN_MMCDAT1, MMCDAT1_MARK),
1713 PINMUX_GPIO(GPIO_FN_MMCDAT0, MMCDAT0_MARK),
1714 PINMUX_GPIO(GPIO_FN_ON_DQ7, ON_DQ7_MARK),
1715 PINMUX_GPIO(GPIO_FN_ON_DQ6, ON_DQ6_MARK),
1716 PINMUX_GPIO(GPIO_FN_ON_DQ5, ON_DQ5_MARK),
1717 PINMUX_GPIO(GPIO_FN_ON_DQ4, ON_DQ4_MARK),
1718 PINMUX_GPIO(GPIO_FN_ON_DQ3, ON_DQ3_MARK),
1719 PINMUX_GPIO(GPIO_FN_ON_DQ2, ON_DQ2_MARK),
1720 PINMUX_GPIO(GPIO_FN_ON_DQ1, ON_DQ1_MARK),
1721 PINMUX_GPIO(GPIO_FN_ON_DQ0, ON_DQ0_MARK),
1510 }; 1722 };
1511 1723
1512static struct pinmux_cfg_reg pinmux_config_regs[] = { 1724static struct pinmux_cfg_reg pinmux_config_regs[] = {
1513 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) { 1725 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
1514 PTA7_FN, PTA7_OUT, PTA7_IN, 0, 1726 PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
1515 PTA6_FN, PTA6_OUT, PTA6_IN, 0, 1727 PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
1516 PTA5_FN, PTA5_OUT, PTA5_IN, 0, 1728 PTA5_FN, PTA5_OUT, PTA5_IN, PTA5_IN_PU,
1517 PTA4_FN, PTA4_OUT, PTA4_IN, 0, 1729 PTA4_FN, PTA4_OUT, PTA4_IN, PTA4_IN_PU,
1518 PTA3_FN, PTA3_OUT, PTA3_IN, 0, 1730 PTA3_FN, PTA3_OUT, PTA3_IN, PTA3_IN_PU,
1519 PTA2_FN, PTA2_OUT, PTA2_IN, 0, 1731 PTA2_FN, PTA2_OUT, PTA2_IN, PTA2_IN_PU,
1520 PTA1_FN, PTA1_OUT, PTA1_IN, 0, 1732 PTA1_FN, PTA1_OUT, PTA1_IN, PTA1_IN_PU,
1521 PTA0_FN, PTA0_OUT, PTA0_IN, 0 } 1733 PTA0_FN, PTA0_OUT, PTA0_IN, PTA0_IN_PU }
1522 }, 1734 },
1523 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) { 1735 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
1524 PTB7_FN, PTB7_OUT, PTB7_IN, 0, 1736 PTB7_FN, PTB7_OUT, PTB7_IN, 0,
@@ -1541,125 +1753,126 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1541 PTC0_FN, PTC0_OUT, PTC0_IN, 0 } 1753 PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
1542 }, 1754 },
1543 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) { 1755 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
1544 PTD7_FN, PTD7_OUT, PTD7_IN, 0, 1756 PTD7_FN, PTD7_OUT, PTD7_IN, PTD7_IN_PU,
1545 PTD6_FN, PTD6_OUT, PTD6_IN, 0, 1757 PTD6_FN, PTD6_OUT, PTD6_IN, PTD6_IN_PU,
1546 PTD5_FN, PTD5_OUT, PTD5_IN, 0, 1758 PTD5_FN, PTD5_OUT, PTD5_IN, PTD5_IN_PU,
1547 PTD4_FN, PTD4_OUT, PTD4_IN, 0, 1759 PTD4_FN, PTD4_OUT, PTD4_IN, PTD4_IN_PU,
1548 PTD3_FN, PTD3_OUT, PTD3_IN, 0, 1760 PTD3_FN, PTD3_OUT, PTD3_IN, PTD3_IN_PU,
1549 PTD2_FN, PTD2_OUT, PTD2_IN, 0, 1761 PTD2_FN, PTD2_OUT, PTD2_IN, PTD2_IN_PU,
1550 PTD1_FN, PTD1_OUT, PTD1_IN, 0, 1762 PTD1_FN, PTD1_OUT, PTD1_IN, PTD1_IN_PU,
1551 PTD0_FN, PTD0_OUT, PTD0_IN, 0 } 1763 PTD0_FN, PTD0_OUT, PTD0_IN, PTD0_IN_PU }
1552 }, 1764 },
1553 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) { 1765 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
1554 PTE7_FN, PTE7_OUT, PTE7_IN, 0, 1766 PTE7_FN, PTE7_OUT, PTE7_IN, PTE7_IN_PU,
1555 PTE6_FN, PTE6_OUT, PTE6_IN, 0, 1767 PTE6_FN, PTE6_OUT, PTE6_IN, PTE6_IN_PU,
1556 PTE5_FN, PTE5_OUT, PTE5_IN, 0, 1768 PTE5_FN, PTE5_OUT, PTE5_IN, PTE5_IN_PU,
1557 PTE4_FN, PTE4_OUT, PTE4_IN, 0, 1769 PTE4_FN, PTE4_OUT, PTE4_IN, PTE4_IN_PU,
1558 PTE3_FN, PTE3_OUT, PTE3_IN, 0, 1770 PTE3_FN, PTE3_OUT, PTE3_IN, PTE3_IN_PU,
1559 PTE2_FN, PTE2_OUT, PTE2_IN, 0, 1771 PTE2_FN, PTE2_OUT, PTE2_IN, PTE2_IN_PU,
1560 PTE1_FN, PTE1_OUT, PTE1_IN, 0, 1772 PTE1_FN, PTE1_OUT, PTE1_IN, PTE1_IN_PU,
1561 PTE0_FN, PTE0_OUT, PTE0_IN, 0 } 1773 PTE0_FN, PTE0_OUT, PTE0_IN, PTE0_IN_PU }
1562 }, 1774 },
1563 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) { 1775 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
1564 PTF7_FN, PTF7_OUT, PTF7_IN, 0, 1776 PTF7_FN, PTF7_OUT, PTF7_IN, PTF7_IN_PU,
1565 PTF6_FN, PTF6_OUT, PTF6_IN, 0, 1777 PTF6_FN, PTF6_OUT, PTF6_IN, PTF6_IN_PU,
1566 PTF5_FN, PTF5_OUT, PTF5_IN, 0, 1778 PTF5_FN, PTF5_OUT, PTF5_IN, PTF5_IN_PU,
1567 PTF4_FN, PTF4_OUT, PTF4_IN, 0, 1779 PTF4_FN, PTF4_OUT, PTF4_IN, PTF4_IN_PU,
1568 PTF3_FN, PTF3_OUT, PTF3_IN, 0, 1780 PTF3_FN, PTF3_OUT, PTF3_IN, PTF3_IN_PU,
1569 PTF2_FN, PTF2_OUT, PTF2_IN, 0, 1781 PTF2_FN, PTF2_OUT, PTF2_IN, PTF2_IN_PU,
1570 PTF1_FN, PTF1_OUT, PTF1_IN, 0, 1782 PTF1_FN, PTF1_OUT, PTF1_IN, PTF1_IN_PU,
1571 PTF0_FN, PTF0_OUT, PTF0_IN, 0 } 1783 PTF0_FN, PTF0_OUT, PTF0_IN, PTF0_IN_PU }
1572 }, 1784 },
1573 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) { 1785 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
1574 PTG7_FN, PTG7_OUT, PTG7_IN, 0, 1786 PTG7_FN, PTG7_OUT, PTG7_IN, PTG7_IN_PU ,
1575 PTG6_FN, PTG6_OUT, PTG6_IN, 0, 1787 PTG6_FN, PTG6_OUT, PTG6_IN, PTG6_IN_PU ,
1576 PTG5_FN, PTG5_OUT, PTG5_IN, 0, 1788 PTG5_FN, PTG5_OUT, PTG5_IN, 0,
1577 PTG4_FN, PTG4_OUT, PTG4_IN, 0, 1789 PTG4_FN, PTG4_OUT, PTG4_IN, PTG4_IN_PU ,
1578 PTG3_FN, PTG3_OUT, PTG3_IN, 0, 1790 PTG3_FN, PTG3_OUT, PTG3_IN, 0,
1579 PTG2_FN, PTG2_OUT, PTG2_IN, 0, 1791 PTG2_FN, PTG2_OUT, PTG2_IN, 0,
1580 PTG1_FN, PTG1_OUT, PTG1_IN, 0, 1792 PTG1_FN, PTG1_OUT, PTG1_IN, 0,
1581 PTG0_FN, PTG0_OUT, PTG0_IN, 0 } 1793 PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
1582 }, 1794 },
1583 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) { 1795 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
1584 PTH7_FN, PTH7_OUT, PTH7_IN, 0, 1796 PTH7_FN, PTH7_OUT, PTH7_IN, PTH7_IN_PU,
1585 PTH6_FN, PTH6_OUT, PTH6_IN, 0, 1797 PTH6_FN, PTH6_OUT, PTH6_IN, PTH6_IN_PU,
1586 PTH5_FN, PTH5_OUT, PTH5_IN, 0, 1798 PTH5_FN, PTH5_OUT, PTH5_IN, PTH5_IN_PU,
1587 PTH4_FN, PTH4_OUT, PTH4_IN, 0, 1799 PTH4_FN, PTH4_OUT, PTH4_IN, PTH4_IN_PU,
1588 PTH3_FN, PTH3_OUT, PTH3_IN, 0, 1800 PTH3_FN, PTH3_OUT, PTH3_IN, PTH3_IN_PU,
1589 PTH2_FN, PTH2_OUT, PTH2_IN, 0, 1801 PTH2_FN, PTH2_OUT, PTH2_IN, PTH2_IN_PU,
1590 PTH1_FN, PTH1_OUT, PTH1_IN, 0, 1802 PTH1_FN, PTH1_OUT, PTH1_IN, PTH1_IN_PU,
1591 PTH0_FN, PTH0_OUT, PTH0_IN, 0 } 1803 PTH0_FN, PTH0_OUT, PTH0_IN, PTH0_IN_PU }
1592 }, 1804 },
1593 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) { 1805 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
1594 PTI7_FN, PTI7_OUT, PTI7_IN, 0, 1806 PTI7_FN, PTI7_OUT, PTI7_IN, PTI7_IN_PU,
1595 PTI6_FN, PTI6_OUT, PTI6_IN, 0, 1807 PTI6_FN, PTI6_OUT, PTI6_IN, PTI6_IN_PU,
1596 PTI5_FN, PTI5_OUT, PTI5_IN, 0, 1808 PTI5_FN, PTI5_OUT, PTI5_IN, 0,
1597 PTI4_FN, PTI4_OUT, PTI4_IN, 0, 1809 PTI4_FN, PTI4_OUT, PTI4_IN, PTI4_IN_PU,
1598 PTI3_FN, PTI3_OUT, PTI3_IN, 0, 1810 PTI3_FN, PTI3_OUT, PTI3_IN, PTI3_IN_PU,
1599 PTI2_FN, PTI2_OUT, PTI2_IN, 0, 1811 PTI2_FN, PTI2_OUT, PTI2_IN, PTI2_IN_PU,
1600 PTI1_FN, PTI1_OUT, PTI1_IN, 0, 1812 PTI1_FN, PTI1_OUT, PTI1_IN, PTI1_IN_PU,
1601 PTI0_FN, PTI0_OUT, PTI0_IN, 0 } 1813 PTI0_FN, PTI0_OUT, PTI0_IN, PTI0_IN_PU }
1602 }, 1814 },
1603 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) { 1815 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
1604 PTJ7_FN, PTJ7_OUT, PTJ7_IN, 0, 1816 0, 0, 0, 0, /* reserved: always set 1 */
1605 PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0, 1817 PTJ6_FN, PTJ6_OUT, PTJ6_IN, PTJ6_IN_PU,
1606 PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0, 1818 PTJ5_FN, PTJ5_OUT, PTJ5_IN, PTJ5_IN_PU,
1607 PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0, 1819 PTJ4_FN, PTJ4_OUT, PTJ4_IN, PTJ4_IN_PU,
1608 PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0, 1820 PTJ3_FN, PTJ3_OUT, PTJ3_IN, PTJ3_IN_PU,
1609 PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0, 1821 PTJ2_FN, PTJ2_OUT, PTJ2_IN, PTJ2_IN_PU,
1610 PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0, 1822 PTJ1_FN, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU,
1611 PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 } 1823 PTJ0_FN, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU }
1612 }, 1824 },
1613 { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) { 1825 { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
1614 PTK7_FN, PTK7_OUT, PTK7_IN, 0, 1826 PTK7_FN, PTK7_OUT, PTK7_IN, PTK7_IN_PU,
1615 PTK6_FN, PTK6_OUT, PTK6_IN, 0, 1827 PTK6_FN, PTK6_OUT, PTK6_IN, PTK6_IN_PU,
1616 PTK5_FN, PTK5_OUT, PTK5_IN, 0, 1828 PTK5_FN, PTK5_OUT, PTK5_IN, PTK5_IN_PU,
1617 PTK4_FN, PTK4_OUT, PTK4_IN, 0, 1829 PTK4_FN, PTK4_OUT, PTK4_IN, PTK4_IN_PU,
1618 PTK3_FN, PTK3_OUT, PTK3_IN, 0, 1830 PTK3_FN, PTK3_OUT, PTK3_IN, PTK3_IN_PU,
1619 PTK2_FN, PTK2_OUT, PTK2_IN, 0, 1831 PTK2_FN, PTK2_OUT, PTK2_IN, PTK2_IN_PU,
1620 PTK1_FN, PTK1_OUT, PTK1_IN, 0, 1832 PTK1_FN, PTK1_OUT, PTK1_IN, PTK1_IN_PU,
1621 PTK0_FN, PTK0_OUT, PTK0_IN, 0 } 1833 PTK0_FN, PTK0_OUT, PTK0_IN, PTK0_IN_PU }
1622 }, 1834 },
1623 { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) { 1835 { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
1624 PTL7_FN, PTL7_OUT, PTL7_IN, 0, 1836 0, 0, 0, 0, /* reserved: always set 1 */
1625 PTL6_FN, PTL6_OUT, PTL6_IN, 0, 1837 PTL6_FN, PTL6_OUT, PTL6_IN, PTL6_IN_PU,
1626 PTL5_FN, PTL5_OUT, PTL5_IN, 0, 1838 PTL5_FN, PTL5_OUT, PTL5_IN, PTL5_IN_PU,
1627 PTL4_FN, PTL4_OUT, PTL4_IN, 0, 1839 PTL4_FN, PTL4_OUT, PTL4_IN, PTL4_IN_PU,
1628 PTL3_FN, PTL3_OUT, PTL3_IN, 0, 1840 PTL3_FN, PTL3_OUT, PTL3_IN, PTL3_IN_PU,
1629 PTL2_FN, PTL2_OUT, PTL2_IN, 0, 1841 PTL2_FN, PTL2_OUT, PTL2_IN, PTL2_IN_PU,
1630 PTL1_FN, PTL1_OUT, PTL1_IN, 0, 1842 PTL1_FN, PTL1_OUT, PTL1_IN, PTL1_IN_PU,
1631 PTL0_FN, PTL0_OUT, PTL0_IN, 0 } 1843 PTL0_FN, PTL0_OUT, PTL0_IN, PTL0_IN_PU }
1632 }, 1844 },
1633 { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) { 1845 { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
1634 0, 0, 0, 0, /* reserved: always set 1 */ 1846 PTM7_FN, PTM7_OUT, PTM7_IN, PTM7_IN_PU,
1635 PTM6_FN, PTM6_OUT, PTM6_IN, 0, 1847 PTM6_FN, PTM6_OUT, PTM6_IN, PTM6_IN_PU,
1636 PTM5_FN, PTM5_OUT, PTM5_IN, 0, 1848 PTM5_FN, PTM5_OUT, PTM5_IN, PTM5_IN_PU,
1637 PTM4_FN, PTM4_OUT, PTM4_IN, 0, 1849 PTM4_FN, PTM4_OUT, PTM4_IN, PTM4_IN_PU,
1638 PTM3_FN, PTM3_OUT, PTM3_IN, 0, 1850 PTM3_FN, PTM3_OUT, PTM3_IN, 0,
1639 PTM2_FN, PTM2_OUT, PTM2_IN, 0, 1851 PTM2_FN, PTM2_OUT, PTM2_IN, 0,
1640 PTM1_FN, PTM1_OUT, PTM1_IN, 0, 1852 PTM1_FN, PTM1_OUT, PTM1_IN, 0,
1641 PTM0_FN, PTM0_OUT, PTM0_IN, 0 } 1853 PTM0_FN, PTM0_OUT, PTM0_IN, 0 }
1642 }, 1854 },
1643 { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) { 1855 { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) {
1644 PTN7_FN, PTN7_OUT, PTN7_IN, 0, 1856 0, 0, 0, 0, /* reserved: always set 1 */
1645 PTN6_FN, PTN6_OUT, PTN6_IN, 0, 1857 PTN6_FN, PTN6_OUT, PTN6_IN, 0,
1646 PTN5_FN, PTN5_OUT, PTN5_IN, 0, 1858 PTN5_FN, PTN5_OUT, PTN5_IN, 0,
1647 PTN4_FN, PTN4_OUT, PTN4_IN, 0, 1859 PTN4_FN, PTN4_OUT, PTN4_IN, PTN4_IN_PU,
1648 PTN3_FN, PTN3_OUT, PTN3_IN, 0, 1860 PTN3_FN, PTN3_OUT, PTN3_IN, PTN3_IN_PU,
1649 PTN2_FN, PTN2_OUT, PTN2_IN, 0, 1861 PTN2_FN, PTN2_OUT, PTN2_IN, PTN2_IN_PU,
1650 PTN1_FN, PTN1_OUT, PTN1_IN, 0, 1862 PTN1_FN, PTN1_OUT, PTN1_IN, PTN1_IN_PU,
1651 PTN0_FN, PTN0_OUT, PTN0_IN, 0 } 1863 PTN0_FN, PTN0_OUT, PTN0_IN, PTN0_IN_PU }
1652 }, 1864 },
1653 { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) { 1865 { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
1654 PTO7_FN, PTO7_OUT, PTO7_IN, 0, 1866 PTO7_FN, PTO7_OUT, PTO7_IN, PTO7_IN_PU,
1655 PTO6_FN, PTO6_OUT, PTO6_IN, 0, 1867 PTO6_FN, PTO6_OUT, PTO6_IN, PTO6_IN_PU,
1656 PTO5_FN, PTO5_OUT, PTO5_IN, 0, 1868 PTO5_FN, PTO5_OUT, PTO5_IN, PTO5_IN_PU,
1657 PTO4_FN, PTO4_OUT, PTO4_IN, 0, 1869 PTO4_FN, PTO4_OUT, PTO4_IN, PTO4_IN_PU,
1658 PTO3_FN, PTO3_OUT, PTO3_IN, 0, 1870 PTO3_FN, PTO3_OUT, PTO3_IN, PTO3_IN_PU,
1659 PTO2_FN, PTO2_OUT, PTO2_IN, 0, 1871 PTO2_FN, PTO2_OUT, PTO2_IN, PTO2_IN_PU,
1660 PTO1_FN, PTO1_OUT, PTO1_IN, 0, 1872 PTO1_FN, PTO1_OUT, PTO1_IN, PTO1_IN_PU,
1661 PTO0_FN, PTO0_OUT, PTO0_IN, 0 } 1873 PTO0_FN, PTO0_OUT, PTO0_IN, PTO0_IN_PU }
1662 }, 1874 },
1875#if 0 /* FIXME: Remove it? */
1663 { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) { 1876 { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
1664 0, 0, 0, 0, /* reserved: always set 1 */ 1877 0, 0, 0, 0, /* reserved: always set 1 */
1665 PTP6_FN, PTP6_OUT, PTP6_IN, 0, 1878 PTP6_FN, PTP6_OUT, PTP6_IN, 0,
@@ -1670,6 +1883,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1670 PTP1_FN, PTP1_OUT, PTP1_IN, 0, 1883 PTP1_FN, PTP1_OUT, PTP1_IN, 0,
1671 PTP0_FN, PTP0_OUT, PTP0_IN, 0 } 1884 PTP0_FN, PTP0_OUT, PTP0_IN, 0 }
1672 }, 1885 },
1886#endif
1673 { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) { 1887 { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) {
1674 0, 0, 0, 0, /* reserved: always set 1 */ 1888 0, 0, 0, 0, /* reserved: always set 1 */
1675 PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0, 1889 PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0,
@@ -1701,14 +1915,14 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1701 PTS0_FN, PTS0_OUT, PTS0_IN, 0 } 1915 PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
1702 }, 1916 },
1703 { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) { 1917 { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
1704 0, 0, 0, 0, /* reserved: always set 1 */ 1918 PTT7_FN, PTT7_OUT, PTT7_IN, PTO7_IN_PU,
1705 0, 0, 0, 0, /* reserved: always set 1 */ 1919 PTT6_FN, PTT6_OUT, PTT6_IN, PTO6_IN_PU,
1706 PTT5_FN, PTT5_OUT, PTT5_IN, 0, 1920 PTT5_FN, PTT5_OUT, PTT5_IN, PTO5_IN_PU,
1707 PTT4_FN, PTT4_OUT, PTT4_IN, 0, 1921 PTT4_FN, PTT4_OUT, PTT4_IN, PTO4_IN_PU,
1708 PTT3_FN, PTT3_OUT, PTT3_IN, 0, 1922 PTT3_FN, PTT3_OUT, PTT3_IN, PTO3_IN_PU,
1709 PTT2_FN, PTT2_OUT, PTT2_IN, 0, 1923 PTT2_FN, PTT2_OUT, PTT2_IN, PTO2_IN_PU,
1710 PTT1_FN, PTT1_OUT, PTT1_IN, 0, 1924 PTT1_FN, PTT1_OUT, PTT1_IN, PTO1_IN_PU,
1711 PTT0_FN, PTT0_OUT, PTT0_IN, 0 } 1925 PTT0_FN, PTT0_OUT, PTT0_IN, PTO0_IN_PU }
1712 }, 1926 },
1713 { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) { 1927 { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
1714 PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU, 1928 PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
@@ -1727,16 +1941,16 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1727 PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU, 1941 PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
1728 PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU, 1942 PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
1729 PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU, 1943 PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
1730 PTV1_FN, PTV1_OUT, PTV1_IN, PTV1_IN_PU, 1944 PTV1_FN, PTV1_OUT, PTV1_IN, 0,
1731 PTV0_FN, PTV0_OUT, PTV0_IN, PTV0_IN_PU } 1945 PTV0_FN, PTV0_OUT, PTV0_IN, 0 }
1732 }, 1946 },
1733 { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) { 1947 { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) {
1734 PTW7_FN, PTW7_OUT, PTW7_IN, PTW7_IN_PU, 1948 PTW7_FN, PTW7_OUT, PTW7_IN, 0,
1735 PTW6_FN, PTW6_OUT, PTW6_IN, PTW6_IN_PU, 1949 PTW6_FN, PTW6_OUT, PTW6_IN, 0,
1736 PTW5_FN, PTW5_OUT, PTW5_IN, PTW5_IN_PU, 1950 PTW5_FN, PTW5_OUT, PTW5_IN, 0,
1737 PTW4_FN, PTW4_OUT, PTW4_IN, PTW4_IN_PU, 1951 PTW4_FN, PTW4_OUT, PTW4_IN, 0,
1738 PTW3_FN, PTW3_OUT, PTW3_IN, PTW3_IN_PU, 1952 PTW3_FN, PTW3_OUT, PTW3_IN, 0,
1739 PTW2_FN, PTW2_OUT, PTW2_IN, PTW2_IN_PU, 1953 PTW2_FN, PTW2_OUT, PTW2_IN, 0,
1740 PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU, 1954 PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
1741 PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU } 1955 PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
1742 }, 1956 },
@@ -1761,32 +1975,32 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1761 PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU } 1975 PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
1762 }, 1976 },
1763 { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) { 1977 { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
1764 0, PTZ7_OUT, PTZ7_IN, 0, 1978 PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0,
1765 0, PTZ6_OUT, PTZ6_IN, 0, 1979 PTZ6_FN, PTZ6_OUT, PTZ6_IN, 0,
1766 0, PTZ5_OUT, PTZ5_IN, 0, 1980 PTZ5_FN, PTZ5_OUT, PTZ5_IN, 0,
1767 0, PTZ4_OUT, PTZ4_IN, 0, 1981 PTZ4_FN, PTZ4_OUT, PTZ4_IN, 0,
1768 0, PTZ3_OUT, PTZ3_IN, 0, 1982 PTZ3_FN, PTZ3_OUT, PTZ3_IN, 0,
1769 0, PTZ2_OUT, PTZ2_IN, 0, 1983 PTZ2_FN, PTZ2_OUT, PTZ2_IN, 0,
1770 0, PTZ1_OUT, PTZ1_IN, 0, 1984 PTZ1_FN, PTZ1_OUT, PTZ1_IN, 0,
1771 0, PTZ0_OUT, PTZ0_IN, 0 } 1985 PTZ0_FN, PTZ0_OUT, PTZ0_IN, 0 }
1772 }, 1986 },
1773 1987
1774 { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) { 1988 { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) {
1775 PS0_15_FN3, PS0_15_FN1, 1989 PS0_15_FN1, PS0_15_FN2,
1776 PS0_14_FN3, PS0_14_FN1, 1990 PS0_14_FN1, PS0_14_FN2,
1777 PS0_13_FN3, PS0_13_FN1, 1991 PS0_13_FN1, PS0_13_FN2,
1778 PS0_12_FN3, PS0_12_FN1, 1992 PS0_12_FN1, PS0_12_FN2,
1779 0, 0, 1993 PS0_11_FN1, PS0_11_FN2,
1780 0, 0, 1994 PS0_10_FN1, PS0_10_FN2,
1995 PS0_9_FN1, PS0_9_FN2,
1996 PS0_8_FN1, PS0_8_FN2,
1997 PS0_7_FN1, PS0_7_FN2,
1998 PS0_6_FN1, PS0_6_FN2,
1999 PS0_5_FN1, PS0_5_FN2,
2000 PS0_4_FN1, PS0_4_FN2,
2001 PS0_3_FN1, PS0_3_FN2,
2002 PS0_2_FN1, PS0_2_FN2,
1781 0, 0, 2003 0, 0,
1782 0, 0,
1783 PS0_7_FN2, PS0_7_FN1,
1784 PS0_6_FN2, PS0_6_FN1,
1785 PS0_5_FN2, PS0_5_FN1,
1786 PS0_4_FN2, PS0_4_FN1,
1787 PS0_3_FN2, PS0_3_FN1,
1788 PS0_2_FN2, PS0_2_FN1,
1789 PS0_1_FN2, PS0_1_FN1,
1790 0, 0, } 2004 0, 0, }
1791 }, 2005 },
1792 { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) { 2006 { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) {
@@ -1795,73 +2009,136 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1795 0, 0, 2009 0, 0,
1796 0, 0, 2010 0, 0,
1797 0, 0, 2011 0, 0,
2012 PS1_10_FN1, PS1_10_FN2,
2013 PS1_9_FN1, PS1_9_FN2,
2014 PS1_8_FN1, PS1_8_FN2,
1798 0, 0, 2015 0, 0,
1799 0, 0, 2016 0, 0,
1800 0, 0, 2017 0, 0,
1801 PS1_7_FN1, PS1_7_FN3,
1802 PS1_6_FN1, PS1_6_FN3,
1803 0, 0,
1804 0, 0,
1805 0, 0, 2018 0, 0,
1806 0, 0, 2019 0, 0,
2020 PS1_2_FN1, PS1_2_FN2,
1807 0, 0, 2021 0, 0,
1808 0, 0, } 2022 0, 0, }
1809 }, 2023 },
1810 { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) { 2024 { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) {
1811 0, 0, 2025 0, 0,
1812 0, 0, 2026 0, 0,
1813 PS2_13_FN3, PS2_13_FN1, 2027 PS2_13_FN1, PS2_13_FN2,
1814 PS2_12_FN3, PS2_12_FN1, 2028 PS2_12_FN1, PS2_12_FN2,
1815 0, 0, 2029 0, 0,
1816 0, 0, 2030 0, 0,
1817 0, 0, 2031 0, 0,
1818 0, 0, 2032 0, 0,
2033 PS2_7_FN1, PS2_7_FN2,
2034 PS2_6_FN1, PS2_6_FN2,
2035 PS2_5_FN1, PS2_5_FN2,
2036 PS2_4_FN1, PS2_4_FN2,
1819 0, 0, 2037 0, 0,
2038 PS2_2_FN1, PS2_2_FN2,
1820 0, 0, 2039 0, 0,
2040 0, 0, }
2041 },
2042 { PINMUX_CFG_REG("PSEL3", 0xffec0076, 16, 1) {
2043 PS3_15_FN1, PS3_15_FN2,
2044 PS3_14_FN1, PS3_14_FN2,
2045 PS3_13_FN1, PS3_13_FN2,
2046 PS3_12_FN1, PS3_12_FN2,
2047 PS3_11_FN1, PS3_11_FN2,
2048 PS3_10_FN1, PS3_10_FN2,
2049 PS3_9_FN1, PS3_9_FN2,
2050 PS3_8_FN1, PS3_8_FN2,
2051 PS3_7_FN1, PS3_7_FN2,
1821 0, 0, 2052 0, 0,
1822 0, 0, 2053 0, 0,
1823 0, 0, 2054 0, 0,
1824 0, 0, 2055 0, 0,
1825 PS2_1_FN1, PS2_1_FN2, 2056 PS3_2_FN1, PS3_2_FN2,
1826 PS2_0_FN1, PS2_0_FN2, } 2057 PS3_1_FN1, PS3_1_FN2,
2058 0, 0, }
1827 }, 2059 },
2060
1828 { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) { 2061 { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) {
1829 PS4_15_FN2, PS4_15_FN1,
1830 PS4_14_FN2, PS4_14_FN1,
1831 PS4_13_FN2, PS4_13_FN1,
1832 PS4_12_FN2, PS4_12_FN1,
1833 PS4_11_FN2, PS4_11_FN1,
1834 PS4_10_FN2, PS4_10_FN1,
1835 PS4_9_FN2, PS4_9_FN1,
1836 0, 0, 2062 0, 0,
2063 PS4_14_FN1, PS4_14_FN2,
2064 PS4_13_FN1, PS4_13_FN2,
2065 PS4_12_FN1, PS4_12_FN2,
1837 0, 0, 2066 0, 0,
2067 PS4_10_FN1, PS4_10_FN2,
2068 PS4_9_FN1, PS4_9_FN2,
2069 PS4_8_FN1, PS4_8_FN2,
1838 0, 0, 2070 0, 0,
1839 0, 0, 2071 0, 0,
1840 0, 0, 2072 0, 0,
1841 PS4_3_FN2, PS4_3_FN1, 2073 PS4_4_FN1, PS4_4_FN2,
1842 PS4_2_FN2, PS4_2_FN1, 2074 PS4_3_FN1, PS4_3_FN2,
1843 PS4_1_FN2, PS4_1_FN1, 2075 PS4_2_FN1, PS4_2_FN2,
1844 PS4_0_FN2, PS4_0_FN1, } 2076 PS4_1_FN1, PS4_1_FN2,
2077 PS4_0_FN1, PS4_0_FN2, }
1845 }, 2078 },
1846 { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) { 2079 { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) {
1847 0, 0, 2080 0, 0,
1848 0, 0, 2081 0, 0,
1849 0, 0, 2082 0, 0,
1850 0, 0, 2083 0, 0,
1851 0, 0, 2084 PS5_11_FN1, PS5_11_FN2,
1852 0, 0, 2085 PS5_10_FN1, PS5_10_FN2,
1853 PS5_9_FN1, PS5_9_FN2, 2086 PS5_9_FN1, PS5_9_FN2,
1854 PS5_8_FN1, PS5_8_FN2, 2087 PS5_8_FN1, PS5_8_FN2,
1855 PS5_7_FN1, PS5_7_FN2, 2088 PS5_7_FN1, PS5_7_FN2,
1856 PS5_6_FN1, PS5_6_FN2, 2089 PS5_6_FN1, PS5_6_FN2,
1857 PS5_5_FN1, PS5_5_FN2, 2090 PS5_5_FN1, PS5_5_FN2,
2091 PS5_4_FN1, PS5_4_FN2,
2092 PS5_3_FN1, PS5_3_FN2,
2093 PS5_2_FN1, PS5_2_FN2,
2094 0, 0,
2095 0, 0, }
2096 },
2097 { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) {
2098 PS6_15_FN1, PS6_15_FN2,
2099 PS6_14_FN1, PS6_14_FN2,
2100 PS6_13_FN1, PS6_13_FN2,
2101 PS6_12_FN1, PS6_12_FN2,
2102 PS6_11_FN1, PS6_11_FN2,
2103 PS6_10_FN1, PS6_10_FN2,
2104 PS6_9_FN1, PS6_9_FN2,
2105 PS6_8_FN1, PS6_8_FN2,
2106 PS6_7_FN1, PS6_7_FN2,
2107 PS6_6_FN1, PS6_6_FN2,
2108 PS6_5_FN1, PS6_5_FN2,
2109 PS6_4_FN1, PS6_4_FN2,
2110 PS6_3_FN1, PS6_3_FN2,
2111 PS6_2_FN1, PS6_2_FN2,
2112 PS6_1_FN1, PS6_1_FN2,
2113 PS6_0_FN1, PS6_0_FN2, }
2114 },
2115 { PINMUX_CFG_REG("PSEL7", 0xffec0082, 16, 1) {
2116 PS7_15_FN1, PS7_15_FN2,
2117 PS7_14_FN1, PS7_14_FN2,
2118 PS7_13_FN1, PS7_13_FN2,
2119 PS7_12_FN1, PS7_12_FN2,
2120 PS7_11_FN1, PS7_11_FN2,
2121 PS7_10_FN1, PS7_10_FN2,
2122 PS7_9_FN1, PS7_9_FN2,
2123 PS7_8_FN1, PS7_8_FN2,
2124 PS7_7_FN1, PS7_7_FN2,
2125 PS7_6_FN1, PS7_6_FN2,
2126 PS7_5_FN1, PS7_5_FN2,
1858 0, 0, 2127 0, 0,
1859 0, 0, 2128 0, 0,
1860 0, 0, 2129 0, 0,
1861 0, 0, 2130 0, 0,
1862 0, 0, } 2131 0, 0, }
1863 }, 2132 },
1864 { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) { 2133 { PINMUX_CFG_REG("PSEL8", 0xffec0084, 16, 1) {
2134 PS8_15_FN1, PS8_15_FN2,
2135 PS8_14_FN1, PS8_14_FN2,
2136 PS8_13_FN1, PS8_13_FN2,
2137 PS8_12_FN1, PS8_12_FN2,
2138 PS8_11_FN1, PS8_11_FN2,
2139 PS8_10_FN1, PS8_10_FN2,
2140 PS8_9_FN1, PS8_9_FN2,
2141 PS8_8_FN1, PS8_8_FN2,
1865 0, 0, 2142 0, 0,
1866 0, 0, 2143 0, 0,
1867 0, 0, 2144 0, 0,
@@ -1869,15 +2146,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1869 0, 0, 2146 0, 0,
1870 0, 0, 2147 0, 0,
1871 0, 0, 2148 0, 0,
1872 0, 0, 2149 0, 0, }
1873 PS6_7_FN_AN, PS6_7_FN_EV,
1874 PS6_6_FN_AN, PS6_6_FN_EV,
1875 PS6_5_FN_AN, PS6_5_FN_EV,
1876 PS6_4_FN_AN, PS6_4_FN_EV,
1877 PS6_3_FN_AN, PS6_3_FN_EV,
1878 PS6_2_FN_AN, PS6_2_FN_EV,
1879 PS6_1_FN_AN, PS6_1_FN_EV,
1880 PS6_0_FN_AN, PS6_0_FN_EV, }
1881 }, 2150 },
1882 {} 2151 {}
1883}; 2152};
@@ -1920,7 +2189,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1920 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA } 2189 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
1921 }, 2190 },
1922 { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) { 2191 { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
1923 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, 2192 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
1924 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } 2193 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1925 }, 2194 },
1926 { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) { 2195 { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
@@ -1928,15 +2197,15 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1928 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } 2197 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1929 }, 2198 },
1930 { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) { 2199 { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
1931 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, 2200 0, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1932 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA } 2201 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1933 }, 2202 },
1934 { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) { 2203 { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
1935 0, PTM6_DATA, PTM5_DATA, PTM4_DATA, 2204 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1936 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } 2205 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1937 }, 2206 },
1938 { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) { 2207 { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
1939 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, 2208 0, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1940 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA } 2209 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1941 }, 2210 },
1942 { PINMUX_DATA_REG("PODR", 0xffec0050, 8) { 2211 { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
@@ -1944,7 +2213,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1944 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA } 2213 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
1945 }, 2214 },
1946 { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) { 2215 { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
1947 0, PTP6_DATA, PTP5_DATA, PTP4_DATA, 2216 PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
1948 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA } 2217 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
1949 }, 2218 },
1950 { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) { 2219 { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
@@ -1960,7 +2229,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = {
1960 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } 2229 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1961 }, 2230 },
1962 { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) { 2231 { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
1963 0, 0, PTT5_DATA, PTT4_DATA, 2232 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
1964 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } 2233 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1965 }, 2234 },
1966 { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) { 2235 { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
@@ -2000,8 +2269,8 @@ static struct pinmux_info sh7757_pinmux_info = {
2000 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, 2269 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2001 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 2270 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2002 2271
2003 .first_gpio = GPIO_PTA7, 2272 .first_gpio = GPIO_PTA0,
2004 .last_gpio = GPIO_FN_D0, 2273 .last_gpio = GPIO_FN_ON_DQ0,
2005 2274
2006 .gpios = pinmux_gpios, 2275 .gpios = pinmux_gpios,
2007 .cfg_regs = pinmux_config_regs, 2276 .cfg_regs = pinmux_config_regs,
@@ -2015,5 +2284,4 @@ static int __init plat_pinmux_setup(void)
2015{ 2284{
2016 return register_pinmux(&sh7757_pinmux_info); 2285 return register_pinmux(&sh7757_pinmux_info);
2017} 2286}
2018
2019arch_initcall(plat_pinmux_setup); 2287arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 444aca95b20d..749c6388d5a5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -26,7 +26,7 @@ static struct plat_sci_port scif2_platform_data = {
26 26
27static struct platform_device scif2_device = { 27static struct platform_device scif2_device = {
28 .name = "sh-sci", 28 .name = "sh-sci",
29 .id = 2, 29 .id = 0,
30 .dev = { 30 .dev = {
31 .platform_data = &scif2_platform_data, 31 .platform_data = &scif2_platform_data,
32 }, 32 },
@@ -41,7 +41,7 @@ static struct plat_sci_port scif3_platform_data = {
41 41
42static struct platform_device scif3_device = { 42static struct platform_device scif3_device = {
43 .name = "sh-sci", 43 .name = "sh-sci",
44 .id = 3, 44 .id = 1,
45 .dev = { 45 .dev = {
46 .platform_data = &scif3_platform_data, 46 .platform_data = &scif3_platform_data,
47 }, 47 },
@@ -56,7 +56,7 @@ static struct plat_sci_port scif4_platform_data = {
56 56
57static struct platform_device scif4_device = { 57static struct platform_device scif4_device = {
58 .name = "sh-sci", 58 .name = "sh-sci",
59 .id = 4, 59 .id = 2,
60 .dev = { 60 .dev = {
61 .platform_data = &scif4_platform_data, 61 .platform_data = &scif4_platform_data,
62 }, 62 },
@@ -163,39 +163,23 @@ enum {
163 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 163 IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
164 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 164 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
165 165
166 SDHI, 166 SDHI, DVC,
167 DVC, 167 IRQ8, IRQ9, IRQ11, IRQ10, IRQ12, IRQ13, IRQ14, IRQ15,
168 IRQ8, IRQ9, IRQ10, 168 TMU0, TMU1, TMU2, TMU2_TICPI, TMU3, TMU4, TMU5,
169 WDT0,
170 TMU0, TMU1, TMU2, TMU2_TICPI,
171 HUDI, 169 HUDI,
172
173 ARC4, 170 ARC4,
174 DMAC0, 171 DMAC0_5, DMAC6_7, DMAC8_11,
175 IRQ11, 172 SCIF0, SCIF1, SCIF2, SCIF3, SCIF4,
176 SCIF2, 173 USB0, USB1,
177 DMAC1_6,
178 USB0,
179 IRQ12,
180 JMC, 174 JMC,
181 SPI1, 175 SPI0, SPI1,
182 IRQ13, IRQ14,
183 USB1,
184 TMR01, TMR23, TMR45, 176 TMR01, TMR23, TMR45,
185 WDT1,
186 FRT, 177 FRT,
187 LPC, 178 LPC, LPC5, LPC6, LPC7, LPC8,
188 SCIF0, SCIF1, SCIF3, 179 PECI0, PECI1, PECI2, PECI3, PECI4, PECI5,
189 PECI0I, PECI1I, PECI2I,
190 IRQ15,
191 ETHERC, 180 ETHERC,
192 SPI0, 181 ADC0, ADC1,
193 ADC1,
194 DMAC1_8,
195 SIM, 182 SIM,
196 TMU3, TMU4, TMU5,
197 ADC0,
198 SCIF4,
199 IIC0_0, IIC0_1, IIC0_2, IIC0_3, 183 IIC0_0, IIC0_1, IIC0_2, IIC0_3,
200 IIC1_0, IIC1_1, IIC1_2, IIC1_3, 184 IIC1_0, IIC1_1, IIC1_2, IIC1_3,
201 IIC2_0, IIC2_1, IIC2_2, IIC2_3, 185 IIC2_0, IIC2_1, IIC2_2, IIC2_3,
@@ -206,9 +190,23 @@ enum {
206 IIC7_0, IIC7_1, IIC7_2, IIC7_3, 190 IIC7_0, IIC7_1, IIC7_2, IIC7_3,
207 IIC8_0, IIC8_1, IIC8_2, IIC8_3, 191 IIC8_0, IIC8_1, IIC8_2, IIC8_3,
208 IIC9_0, IIC9_1, IIC9_2, IIC9_3, 192 IIC9_0, IIC9_1, IIC9_2, IIC9_3,
209 PCIINTA, 193 ONFICTL,
210 PCIE, 194 MMC1, MMC2,
195 ECCU,
196 PCIC,
197 G200,
198 RSPI,
211 SGPIO, 199 SGPIO,
200 DMINT12, DMINT13, DMINT14, DMINT15, DMINT16, DMINT17, DMINT18, DMINT19,
201 DMINT20, DMINT21, DMINT22, DMINT23,
202 DDRECC,
203 TSIP,
204 PCIE_BRIDGE,
205 WDT0B, WDT1B, WDT2B, WDT3B, WDT4B, WDT5B, WDT6B, WDT7B, WDT8B,
206 GETHER0, GETHER1, GETHER2,
207 PBIA, PBIB, PBIC,
208 DMAE2, DMAE3,
209 SERMUX2, SERMUX3,
212 210
213 /* interrupt groups */ 211 /* interrupt groups */
214 212
@@ -221,19 +219,18 @@ static struct intc_vect vectors[] __initdata = {
221 INTC_VECT(DVC, 0x4e0), 219 INTC_VECT(DVC, 0x4e0),
222 INTC_VECT(IRQ8, 0x500), INTC_VECT(IRQ9, 0x520), 220 INTC_VECT(IRQ8, 0x500), INTC_VECT(IRQ9, 0x520),
223 INTC_VECT(IRQ10, 0x540), 221 INTC_VECT(IRQ10, 0x540),
224 INTC_VECT(WDT0, 0x560),
225 INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0), 222 INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
226 INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0), 223 INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
227 INTC_VECT(HUDI, 0x600), 224 INTC_VECT(HUDI, 0x600),
228 INTC_VECT(ARC4, 0x620), 225 INTC_VECT(ARC4, 0x620),
229 INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660), 226 INTC_VECT(DMAC0_5, 0x640), INTC_VECT(DMAC0_5, 0x660),
230 INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0), 227 INTC_VECT(DMAC0_5, 0x680), INTC_VECT(DMAC0_5, 0x6a0),
231 INTC_VECT(DMAC0, 0x6c0), 228 INTC_VECT(DMAC0_5, 0x6c0),
232 INTC_VECT(IRQ11, 0x6e0), 229 INTC_VECT(IRQ11, 0x6e0),
233 INTC_VECT(SCIF2, 0x700), INTC_VECT(SCIF2, 0x720), 230 INTC_VECT(SCIF2, 0x700), INTC_VECT(SCIF2, 0x720),
234 INTC_VECT(SCIF2, 0x740), INTC_VECT(SCIF2, 0x760), 231 INTC_VECT(SCIF2, 0x740), INTC_VECT(SCIF2, 0x760),
235 INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0), 232 INTC_VECT(DMAC0_5, 0x780), INTC_VECT(DMAC0_5, 0x7a0),
236 INTC_VECT(DMAC1_6, 0x7c0), INTC_VECT(DMAC1_6, 0x7e0), 233 INTC_VECT(DMAC6_7, 0x7c0), INTC_VECT(DMAC6_7, 0x7e0),
237 INTC_VECT(USB0, 0x840), 234 INTC_VECT(USB0, 0x840),
238 INTC_VECT(IRQ12, 0x880), 235 INTC_VECT(IRQ12, 0x880),
239 INTC_VECT(JMC, 0x8a0), 236 INTC_VECT(JMC, 0x8a0),
@@ -242,7 +239,6 @@ static struct intc_vect vectors[] __initdata = {
242 INTC_VECT(USB1, 0x920), 239 INTC_VECT(USB1, 0x920),
243 INTC_VECT(TMR01, 0xa00), INTC_VECT(TMR23, 0xa20), 240 INTC_VECT(TMR01, 0xa00), INTC_VECT(TMR23, 0xa20),
244 INTC_VECT(TMR45, 0xa40), 241 INTC_VECT(TMR45, 0xa40),
245 INTC_VECT(WDT1, 0xa60),
246 INTC_VECT(FRT, 0xa80), 242 INTC_VECT(FRT, 0xa80),
247 INTC_VECT(LPC, 0xaa0), INTC_VECT(LPC, 0xac0), 243 INTC_VECT(LPC, 0xaa0), INTC_VECT(LPC, 0xac0),
248 INTC_VECT(LPC, 0xae0), INTC_VECT(LPC, 0xb00), 244 INTC_VECT(LPC, 0xae0), INTC_VECT(LPC, 0xb00),
@@ -250,14 +246,14 @@ static struct intc_vect vectors[] __initdata = {
250 INTC_VECT(SCIF0, 0xb40), INTC_VECT(SCIF1, 0xb60), 246 INTC_VECT(SCIF0, 0xb40), INTC_VECT(SCIF1, 0xb60),
251 INTC_VECT(SCIF3, 0xb80), INTC_VECT(SCIF3, 0xba0), 247 INTC_VECT(SCIF3, 0xb80), INTC_VECT(SCIF3, 0xba0),
252 INTC_VECT(SCIF3, 0xbc0), INTC_VECT(SCIF3, 0xbe0), 248 INTC_VECT(SCIF3, 0xbc0), INTC_VECT(SCIF3, 0xbe0),
253 INTC_VECT(PECI0I, 0xc00), INTC_VECT(PECI1I, 0xc20), 249 INTC_VECT(PECI0, 0xc00), INTC_VECT(PECI1, 0xc20),
254 INTC_VECT(PECI2I, 0xc40), 250 INTC_VECT(PECI2, 0xc40),
255 INTC_VECT(IRQ15, 0xc60), 251 INTC_VECT(IRQ15, 0xc60),
256 INTC_VECT(ETHERC, 0xc80), INTC_VECT(ETHERC, 0xca0), 252 INTC_VECT(ETHERC, 0xc80), INTC_VECT(ETHERC, 0xca0),
257 INTC_VECT(SPI0, 0xcc0), 253 INTC_VECT(SPI0, 0xcc0),
258 INTC_VECT(ADC1, 0xce0), 254 INTC_VECT(ADC1, 0xce0),
259 INTC_VECT(DMAC1_8, 0xd00), INTC_VECT(DMAC1_8, 0xd20), 255 INTC_VECT(DMAC8_11, 0xd00), INTC_VECT(DMAC8_11, 0xd20),
260 INTC_VECT(DMAC1_8, 0xd40), INTC_VECT(DMAC1_8, 0xd60), 256 INTC_VECT(DMAC8_11, 0xd40), INTC_VECT(DMAC8_11, 0xd60),
261 INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0), 257 INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
262 INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0), 258 INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
263 INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), 259 INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
@@ -278,17 +274,47 @@ static struct intc_vect vectors[] __initdata = {
278 INTC_VECT(IIC5_0, 0x1860), INTC_VECT(IIC5_1, 0x1880), 274 INTC_VECT(IIC5_0, 0x1860), INTC_VECT(IIC5_1, 0x1880),
279 INTC_VECT(IIC5_2, 0x18a0), INTC_VECT(IIC5_3, 0x18c0), 275 INTC_VECT(IIC5_2, 0x18a0), INTC_VECT(IIC5_3, 0x18c0),
280 INTC_VECT(IIC6_0, 0x18e0), INTC_VECT(IIC6_1, 0x1900), 276 INTC_VECT(IIC6_0, 0x18e0), INTC_VECT(IIC6_1, 0x1900),
281 INTC_VECT(IIC6_2, 0x1920), INTC_VECT(IIC6_3, 0x1980), 277 INTC_VECT(IIC6_2, 0x1920),
278 INTC_VECT(ONFICTL, 0x1960),
279 INTC_VECT(IIC6_3, 0x1980),
282 INTC_VECT(IIC7_0, 0x19a0), INTC_VECT(IIC7_1, 0x1a00), 280 INTC_VECT(IIC7_0, 0x19a0), INTC_VECT(IIC7_1, 0x1a00),
283 INTC_VECT(IIC7_2, 0x1a20), INTC_VECT(IIC7_3, 0x1a40), 281 INTC_VECT(IIC7_2, 0x1a20), INTC_VECT(IIC7_3, 0x1a40),
284 INTC_VECT(IIC8_0, 0x1a60), INTC_VECT(IIC8_1, 0x1a80), 282 INTC_VECT(IIC8_0, 0x1a60), INTC_VECT(IIC8_1, 0x1a80),
285 INTC_VECT(IIC8_2, 0x1aa0), INTC_VECT(IIC8_3, 0x1b40), 283 INTC_VECT(IIC8_2, 0x1aa0), INTC_VECT(IIC8_3, 0x1b40),
286 INTC_VECT(IIC9_0, 0x1b60), INTC_VECT(IIC9_1, 0x1b80), 284 INTC_VECT(IIC9_0, 0x1b60), INTC_VECT(IIC9_1, 0x1b80),
287 INTC_VECT(IIC9_2, 0x1c00), INTC_VECT(IIC9_3, 0x1c20), 285 INTC_VECT(IIC9_2, 0x1c00), INTC_VECT(IIC9_3, 0x1c20),
288 INTC_VECT(PCIINTA, 0x1ce0), 286 INTC_VECT(MMC1, 0x1c60), INTC_VECT(MMC2, 0x1c80),
289 INTC_VECT(PCIE, 0x1e00), 287 INTC_VECT(ECCU, 0x1cc0),
290 INTC_VECT(SGPIO, 0x1f80), 288 INTC_VECT(PCIC, 0x1ce0),
291 INTC_VECT(SGPIO, 0x1fa0), 289 INTC_VECT(G200, 0x1d00),
290 INTC_VECT(RSPI, 0x1d80), INTC_VECT(RSPI, 0x1da0),
291 INTC_VECT(RSPI, 0x1dc0), INTC_VECT(RSPI, 0x1de0),
292 INTC_VECT(PECI3, 0x1ec0), INTC_VECT(PECI4, 0x1ee0),
293 INTC_VECT(PECI5, 0x1f00),
294 INTC_VECT(SGPIO, 0x1f80), INTC_VECT(SGPIO, 0x1fa0),
295 INTC_VECT(SGPIO, 0x1fc0),
296 INTC_VECT(DMINT12, 0x2400), INTC_VECT(DMINT13, 0x2420),
297 INTC_VECT(DMINT14, 0x2440), INTC_VECT(DMINT15, 0x2460),
298 INTC_VECT(DMINT16, 0x2480), INTC_VECT(DMINT17, 0x24e0),
299 INTC_VECT(DMINT18, 0x2500), INTC_VECT(DMINT19, 0x2520),
300 INTC_VECT(DMINT20, 0x2540), INTC_VECT(DMINT21, 0x2560),
301 INTC_VECT(DMINT22, 0x2580), INTC_VECT(DMINT23, 0x2600),
302 INTC_VECT(DDRECC, 0x2620),
303 INTC_VECT(TSIP, 0x2640),
304 INTC_VECT(PCIE_BRIDGE, 0x27c0),
305 INTC_VECT(WDT0B, 0x2800), INTC_VECT(WDT1B, 0x2820),
306 INTC_VECT(WDT2B, 0x2840), INTC_VECT(WDT3B, 0x2860),
307 INTC_VECT(WDT4B, 0x2880), INTC_VECT(WDT5B, 0x28a0),
308 INTC_VECT(WDT6B, 0x28c0), INTC_VECT(WDT7B, 0x28e0),
309 INTC_VECT(WDT8B, 0x2900),
310 INTC_VECT(GETHER0, 0x2960), INTC_VECT(GETHER1, 0x2980),
311 INTC_VECT(GETHER2, 0x29a0),
312 INTC_VECT(PBIA, 0x2a00), INTC_VECT(PBIB, 0x2a20),
313 INTC_VECT(PBIC, 0x2a40),
314 INTC_VECT(DMAE2, 0x2a60), INTC_VECT(DMAE3, 0x2a80),
315 INTC_VECT(SERMUX2, 0x2aa0), INTC_VECT(SERMUX3, 0x2b40),
316 INTC_VECT(LPC5, 0x2b60), INTC_VECT(LPC6, 0x2b80),
317 INTC_VECT(LPC7, 0x2c00), INTC_VECT(LPC8, 0x2c20),
292}; 318};
293 319
294static struct intc_group groups[] __initdata = { 320static struct intc_group groups[] __initdata = {
@@ -312,31 +338,45 @@ static struct intc_mask_reg mask_registers[] __initdata = {
312 338
313 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ 339 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
314 { 0, 0, 0, 0, 0, 0, 0, 0, 340 { 0, 0, 0, 0, 0, 0, 0, 0,
315 0, DMAC1_8, 0, PECI0I, LPC, FRT, WDT1, TMR45, 341 0, DMAC8_11, 0, PECI0, LPC, FRT, 0, TMR45,
316 TMR23, TMR01, 0, 0, 0, 0, 0, DMAC0, 342 TMR23, TMR01, 0, 0, 0, 0, 0, DMAC0_5,
317 HUDI, 0, WDT0, SCIF3, SCIF2, SDHI, TMU345, TMU012 343 HUDI, 0, 0, SCIF3, SCIF2, SDHI, TMU345, TMU012
318 } }, 344 } },
319 345
320 { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */ 346 { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */
321 { IRQ15, IRQ14, IRQ13, IRQ12, IRQ11, IRQ10, SCIF4, ETHERC, 347 { IRQ15, IRQ14, IRQ13, IRQ12, IRQ11, IRQ10, SCIF4, ETHERC,
322 IRQ9, IRQ8, SCIF1, SCIF0, USB0, 0, 0, USB1, 348 IRQ9, IRQ8, SCIF1, SCIF0, USB0, 0, 0, USB1,
323 ADC1, 0, DMAC1_6, ADC0, SPI0, SIM, PECI2I, PECI1I, 349 ADC1, 0, DMAC6_7, ADC0, SPI0, SIM, PECI2, PECI1,
324 ARC4, 0, SPI1, JMC, 0, 0, 0, DVC 350 ARC4, 0, SPI1, JMC, 0, 0, 0, DVC
325 } }, 351 } },
326 352
327 { 0xffd10038, 0xffd1003c, 32, /* INT2MSKR2 / INT2MSKCR2 */ 353 { 0xffd10038, 0xffd1003c, 32, /* INT2MSKR2 / INT2MSKCR2 */
328 { IIC4_1, IIC4_2, IIC5_0, 0, 0, 0, SGPIO, 0, 354 { IIC4_1, IIC4_2, IIC5_0, ONFICTL, 0, 0, SGPIO, 0,
329 0, 0, 0, IIC9_2, IIC8_2, IIC8_1, IIC8_0, IIC7_3, 355 0, G200, 0, IIC9_2, IIC8_2, IIC8_1, IIC8_0, IIC7_3,
330 IIC7_2, IIC7_1, IIC6_3, IIC0_0, IIC0_1, IIC0_2, IIC0_3, IIC3_1, 356 IIC7_2, IIC7_1, IIC6_3, IIC0_0, IIC0_1, IIC0_2, IIC0_3, IIC3_1,
331 IIC2_3, 0, IIC2_1, IIC9_1, IIC3_3, IIC1_0, PCIE, IIC2_2 357 IIC2_3, 0, IIC2_1, IIC9_1, IIC3_3, IIC1_0, 0, IIC2_2
332 } }, 358 } },
333 359
334 { 0xffd100d0, 0xff1400d4, 32, /* INT2MSKR3 / INT2MSKCR4 */ 360 { 0xffd100d0, 0xffd100d4, 32, /* INT2MSKR3 / INT2MSKCR3 */
335 { 0, IIC6_1, IIC6_0, IIC5_1, IIC3_2, IIC2_0, 0, 0, 361 { MMC1, IIC6_1, IIC6_0, IIC5_1, IIC3_2, IIC2_0, PECI5, MMC2,
336 IIC1_3, IIC1_2, IIC9_0, IIC8_3, IIC4_3, IIC7_0, 0, IIC6_2, 362 IIC1_3, IIC1_2, IIC9_0, IIC8_3, IIC4_3, IIC7_0, 0, IIC6_2,
337 PCIINTA, 0, IIC4_0, 0, 0, 0, 0, IIC9_3, 363 PCIC, 0, IIC4_0, 0, ECCU, RSPI, 0, IIC9_3,
338 IIC3_0, 0, IIC5_3, IIC5_2, 0, 0, 0, IIC1_1 364 IIC3_0, 0, IIC5_3, IIC5_2, 0, 0, 0, IIC1_1
339 } }, 365 } },
366
367 { 0xffd20038, 0xffd2003c, 32, /* INT2MSKR4 / INT2MSKCR4 */
368 { WDT0B, WDT1B, WDT3B, GETHER0, 0, 0, 0, 0,
369 0, 0, 0, LPC7, SERMUX2, DMAE3, DMAE2, PBIC,
370 PBIB, PBIA, GETHER1, DMINT12, DMINT13, DMINT14, DMINT15, TSIP,
371 DMINT23, 0, DMINT21, LPC6, 0, DMINT16, 0, DMINT22
372 } },
373
374 { 0xffd200d0, 0xffd200d4, 32, /* INT2MSKR5 / INT2MSKCR5 */
375 { 0, WDT8B, WDT7B, WDT4B, 0, DMINT20, 0, 0,
376 DMINT19, DMINT18, LPC5, SERMUX3, WDT2B, GETHER2, 0, 0,
377 0, 0, PCIE_BRIDGE, 0, 0, 0, 0, LPC8,
378 DDRECC, 0, WDT6B, WDT5B, 0, 0, 0, DMINT17
379 } },
340}; 380};
341 381
342#define INTPRI 0xffd00010 382#define INTPRI 0xffd00010
@@ -372,6 +412,22 @@ static struct intc_mask_reg mask_registers[] __initdata = {
372#define INT2PRI29 0xffd100b4 412#define INT2PRI29 0xffd100b4
373#define INT2PRI30 0xffd100b8 413#define INT2PRI30 0xffd100b8
374#define INT2PRI31 0xffd100bc 414#define INT2PRI31 0xffd100bc
415#define INT2PRI32 0xffd20000
416#define INT2PRI33 0xffd20004
417#define INT2PRI34 0xffd20008
418#define INT2PRI35 0xffd2000c
419#define INT2PRI36 0xffd20010
420#define INT2PRI37 0xffd20014
421#define INT2PRI38 0xffd20018
422#define INT2PRI39 0xffd2001c
423#define INT2PRI40 0xffd200a0
424#define INT2PRI41 0xffd200a4
425#define INT2PRI42 0xffd200a8
426#define INT2PRI43 0xffd200ac
427#define INT2PRI44 0xffd200b0
428#define INT2PRI45 0xffd200b4
429#define INT2PRI46 0xffd200b8
430#define INT2PRI47 0xffd200bc
375 431
376static struct intc_prio_reg prio_registers[] __initdata = { 432static struct intc_prio_reg prio_registers[] __initdata = {
377 { INTPRI, 0, 32, 4, { IRQ0, IRQ1, IRQ2, IRQ3, 433 { INTPRI, 0, 32, 4, { IRQ0, IRQ1, IRQ2, IRQ3,
@@ -379,39 +435,61 @@ static struct intc_prio_reg prio_registers[] __initdata = {
379 435
380 { INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } }, 436 { INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } },
381 { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } }, 437 { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },
382 { INT2PRI2, 0, 32, 8, { SCIF2, SCIF3, WDT0, IRQ8 } }, 438 { INT2PRI2, 0, 32, 8, { SCIF2, SCIF3, 0, IRQ8 } },
383 { INT2PRI3, 0, 32, 8, { HUDI, DMAC0, ADC0, IRQ9 } }, 439 { INT2PRI3, 0, 32, 8, { HUDI, DMAC0_5, ADC0, IRQ9 } },
384 { INT2PRI4, 0, 32, 8, { IRQ10, 0, TMR01, TMR23 } }, 440 { INT2PRI4, 0, 32, 8, { IRQ10, 0, TMR01, TMR23 } },
385 { INT2PRI5, 0, 32, 8, { TMR45, WDT1, FRT, LPC } }, 441 { INT2PRI5, 0, 32, 8, { TMR45, 0, FRT, LPC } },
386 { INT2PRI6, 0, 32, 8, { PECI0I, ETHERC, DMAC1_8, 0 } }, 442 { INT2PRI6, 0, 32, 8, { PECI0, ETHERC, DMAC8_11, 0 } },
387 { INT2PRI7, 0, 32, 8, { SCIF4, 0, IRQ11, IRQ12 } }, 443 { INT2PRI7, 0, 32, 8, { SCIF4, 0, IRQ11, IRQ12 } },
388 { INT2PRI8, 0, 32, 8, { 0, 0, 0, DVC } }, 444 { INT2PRI8, 0, 32, 8, { 0, 0, 0, DVC } },
389 { INT2PRI9, 0, 32, 8, { ARC4, 0, SPI1, JMC } }, 445 { INT2PRI9, 0, 32, 8, { ARC4, 0, SPI1, JMC } },
390 { INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2I, PECI1I } }, 446 { INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2, PECI1 } },
391 { INT2PRI11, 0, 32, 8, { ADC1, IRQ13, DMAC1_6, IRQ14 } }, 447 { INT2PRI11, 0, 32, 8, { ADC1, IRQ13, DMAC6_7, IRQ14 } },
392 { INT2PRI12, 0, 32, 8, { USB0, 0, IRQ15, USB1 } }, 448 { INT2PRI12, 0, 32, 8, { USB0, 0, IRQ15, USB1 } },
393 { INT2PRI13, 0, 32, 8, { 0, 0, SCIF1, SCIF0 } }, 449 { INT2PRI13, 0, 32, 8, { 0, 0, SCIF1, SCIF0 } },
394 450
395 { INT2PRI16, 0, 32, 8, { IIC2_2, 0, 0, 0 } }, 451 { INT2PRI16, 0, 32, 8, { IIC2_2, 0, 0, 0 } },
396 { INT2PRI17, 0, 32, 8, { PCIE, 0, 0, IIC1_0 } }, 452 { INT2PRI17, 0, 32, 8, { 0, 0, 0, IIC1_0 } },
397 { INT2PRI18, 0, 32, 8, { IIC3_3, IIC9_1, IIC2_1, IIC1_2 } }, 453 { INT2PRI18, 0, 32, 8, { IIC3_3, IIC9_1, IIC2_1, IIC1_2 } },
398 { INT2PRI19, 0, 32, 8, { IIC2_3, IIC3_1, 0, IIC1_3 } }, 454 { INT2PRI19, 0, 32, 8, { IIC2_3, IIC3_1, 0, IIC1_3 } },
399 { INT2PRI20, 0, 32, 8, { IIC2_0, IIC6_3, IIC7_1, IIC7_2 } }, 455 { INT2PRI20, 0, 32, 8, { IIC2_0, IIC6_3, IIC7_1, IIC7_2 } },
400 { INT2PRI21, 0, 32, 8, { IIC7_3, IIC8_0, IIC8_1, IIC8_2 } }, 456 { INT2PRI21, 0, 32, 8, { IIC7_3, IIC8_0, IIC8_1, IIC8_2 } },
401 { INT2PRI22, 0, 32, 8, { IIC9_2, 0, 0, 0 } }, 457 { INT2PRI22, 0, 32, 8, { IIC9_2, MMC2, G200, 0 } },
402 { INT2PRI23, 0, 32, 8, { 0, SGPIO, IIC3_2, IIC5_1 } }, 458 { INT2PRI23, 0, 32, 8, { PECI5, SGPIO, IIC3_2, IIC5_1 } },
403 { INT2PRI24, 0, 32, 8, { 0, 0, 0, IIC1_1 } }, 459 { INT2PRI24, 0, 32, 8, { PECI4, PECI3, 0, IIC1_1 } },
404 { INT2PRI25, 0, 32, 8, { IIC3_0, 0, IIC5_3, IIC5_2 } }, 460 { INT2PRI25, 0, 32, 8, { IIC3_0, 0, IIC5_3, IIC5_2 } },
405 { INT2PRI26, 0, 32, 8, { 0, 0, 0, IIC9_3 } }, 461 { INT2PRI26, 0, 32, 8, { ECCU, RSPI, 0, IIC9_3 } },
406 { INT2PRI27, 0, 32, 8, { PCIINTA, IIC6_0, IIC4_0, IIC6_1 } }, 462 { INT2PRI27, 0, 32, 8, { PCIC, IIC6_0, IIC4_0, IIC6_1 } },
407 { INT2PRI28, 0, 32, 8, { IIC4_3, IIC7_0, 0, IIC6_2 } }, 463 { INT2PRI28, 0, 32, 8, { IIC4_3, IIC7_0, MMC1, IIC6_2 } },
408 { INT2PRI29, 0, 32, 8, { 0, 0, IIC9_0, IIC8_3 } }, 464 { INT2PRI29, 0, 32, 8, { 0, 0, IIC9_0, IIC8_3 } },
409 { INT2PRI30, 0, 32, 8, { IIC4_1, IIC4_2, IIC5_0, 0 } }, 465 { INT2PRI30, 0, 32, 8, { IIC4_1, IIC4_2, IIC5_0, ONFICTL } },
410 { INT2PRI31, 0, 32, 8, { IIC0_0, IIC0_1, IIC0_2, IIC0_3 } }, 466 { INT2PRI31, 0, 32, 8, { IIC0_0, IIC0_1, IIC0_2, IIC0_3 } },
467 { INT2PRI32, 0, 32, 8, { DMINT22, 0, 0, 0 } },
468 { INT2PRI33, 0, 32, 8, { 0, 0, 0, DMINT16 } },
469 { INT2PRI34, 0, 32, 8, { 0, LPC6, DMINT21, DMINT18 } },
470 { INT2PRI35, 0, 32, 8, { DMINT23, TSIP, 0, DMINT19 } },
471 { INT2PRI36, 0, 32, 8, { DMINT20, GETHER1, PBIA, PBIB } },
472 { INT2PRI37, 0, 32, 8, { PBIC, DMAE2, DMAE3, SERMUX2 } },
473 { INT2PRI38, 0, 32, 8, { LPC7, 0, 0, 0 } },
474 { INT2PRI39, 0, 32, 8, { 0, 0, 0, WDT4B } },
475 { INT2PRI40, 0, 32, 8, { 0, 0, 0, DMINT17 } },
476 { INT2PRI41, 0, 32, 8, { DDRECC, 0, WDT6B, WDT5B } },
477 { INT2PRI42, 0, 32, 8, { 0, 0, 0, LPC8 } },
478 { INT2PRI43, 0, 32, 8, { 0, WDT7B, PCIE_BRIDGE, WDT8B } },
479 { INT2PRI44, 0, 32, 8, { WDT2B, GETHER2, 0, 0 } },
480 { INT2PRI45, 0, 32, 8, { 0, 0, LPC5, SERMUX3 } },
481 { INT2PRI46, 0, 32, 8, { WDT0B, WDT1B, WDT3B, GETHER0 } },
482 { INT2PRI47, 0, 32, 8, { DMINT12, DMINT13, DMINT14, DMINT15 } },
483};
484
485static struct intc_sense_reg sense_registers_irq8to15[] __initdata = {
486 { 0xffd100f8, 32, 2, /* ICR2 */ { IRQ15, IRQ14, IRQ13, IRQ12,
487 IRQ11, IRQ10, IRQ9, IRQ8 } },
411}; 488};
412 489
413static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups, 490static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
414 mask_registers, prio_registers, NULL); 491 mask_registers, prio_registers,
492 sense_registers_irq8to15);
415 493
416/* Support for external interrupt pins in IRQ mode */ 494/* Support for external interrupt pins in IRQ mode */
417static struct intc_vect vectors_irq0123[] __initdata = { 495static struct intc_vect vectors_irq0123[] __initdata = {
diff --git a/arch/sh/kernel/kprobes.c b/arch/sh/kernel/kprobes.c
index 4049d99f76e1..1208b09e95c3 100644
--- a/arch/sh/kernel/kprobes.c
+++ b/arch/sh/kernel/kprobes.c
@@ -20,9 +20,9 @@
20DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; 20DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
21DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); 21DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
22 22
23static struct kprobe saved_current_opcode; 23static DEFINE_PER_CPU(struct kprobe, saved_current_opcode);
24static struct kprobe saved_next_opcode; 24static DEFINE_PER_CPU(struct kprobe, saved_next_opcode);
25static struct kprobe saved_next_opcode2; 25static DEFINE_PER_CPU(struct kprobe, saved_next_opcode2);
26 26
27#define OPCODE_JMP(x) (((x) & 0xF0FF) == 0x402b) 27#define OPCODE_JMP(x) (((x) & 0xF0FF) == 0x402b)
28#define OPCODE_JSR(x) (((x) & 0xF0FF) == 0x400b) 28#define OPCODE_JSR(x) (((x) & 0xF0FF) == 0x400b)
@@ -102,16 +102,21 @@ int __kprobes kprobe_handle_illslot(unsigned long pc)
102 102
103void __kprobes arch_remove_kprobe(struct kprobe *p) 103void __kprobes arch_remove_kprobe(struct kprobe *p)
104{ 104{
105 if (saved_next_opcode.addr != 0x0) { 105 struct kprobe *saved = &__get_cpu_var(saved_next_opcode);
106
107 if (saved->addr) {
106 arch_disarm_kprobe(p); 108 arch_disarm_kprobe(p);
107 arch_disarm_kprobe(&saved_next_opcode); 109 arch_disarm_kprobe(saved);
108 saved_next_opcode.addr = 0x0; 110
109 saved_next_opcode.opcode = 0x0; 111 saved->addr = NULL;
110 112 saved->opcode = 0;
111 if (saved_next_opcode2.addr != 0x0) { 113
112 arch_disarm_kprobe(&saved_next_opcode2); 114 saved = &__get_cpu_var(saved_next_opcode2);
113 saved_next_opcode2.addr = 0x0; 115 if (saved->addr) {
114 saved_next_opcode2.opcode = 0x0; 116 arch_disarm_kprobe(saved);
117
118 saved->addr = NULL;
119 saved->opcode = 0;
115 } 120 }
116 } 121 }
117} 122}
@@ -141,57 +146,59 @@ static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
141 */ 146 */
142static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) 147static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
143{ 148{
144 kprobe_opcode_t *addr = NULL; 149 __get_cpu_var(saved_current_opcode).addr = (kprobe_opcode_t *)regs->pc;
145 saved_current_opcode.addr = (kprobe_opcode_t *) (regs->pc);
146 addr = saved_current_opcode.addr;
147 150
148 if (p != NULL) { 151 if (p != NULL) {
152 struct kprobe *op1, *op2;
153
149 arch_disarm_kprobe(p); 154 arch_disarm_kprobe(p);
150 155
156 op1 = &__get_cpu_var(saved_next_opcode);
157 op2 = &__get_cpu_var(saved_next_opcode2);
158
151 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) { 159 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) {
152 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); 160 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F);
153 saved_next_opcode.addr = 161 op1->addr = (kprobe_opcode_t *) regs->regs[reg_nr];
154 (kprobe_opcode_t *) regs->regs[reg_nr];
155 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) { 162 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) {
156 unsigned long disp = (p->opcode & 0x0FFF); 163 unsigned long disp = (p->opcode & 0x0FFF);
157 saved_next_opcode.addr = 164 op1->addr =
158 (kprobe_opcode_t *) (regs->pc + 4 + disp * 2); 165 (kprobe_opcode_t *) (regs->pc + 4 + disp * 2);
159 166
160 } else if (OPCODE_BRAF(p->opcode) || OPCODE_BSRF(p->opcode)) { 167 } else if (OPCODE_BRAF(p->opcode) || OPCODE_BSRF(p->opcode)) {
161 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); 168 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F);
162 saved_next_opcode.addr = 169 op1->addr =
163 (kprobe_opcode_t *) (regs->pc + 4 + 170 (kprobe_opcode_t *) (regs->pc + 4 +
164 regs->regs[reg_nr]); 171 regs->regs[reg_nr]);
165 172
166 } else if (OPCODE_RTS(p->opcode)) { 173 } else if (OPCODE_RTS(p->opcode)) {
167 saved_next_opcode.addr = (kprobe_opcode_t *) regs->pr; 174 op1->addr = (kprobe_opcode_t *) regs->pr;
168 175
169 } else if (OPCODE_BF(p->opcode) || OPCODE_BT(p->opcode)) { 176 } else if (OPCODE_BF(p->opcode) || OPCODE_BT(p->opcode)) {
170 unsigned long disp = (p->opcode & 0x00FF); 177 unsigned long disp = (p->opcode & 0x00FF);
171 /* case 1 */ 178 /* case 1 */
172 saved_next_opcode.addr = p->addr + 1; 179 op1->addr = p->addr + 1;
173 /* case 2 */ 180 /* case 2 */
174 saved_next_opcode2.addr = 181 op2->addr =
175 (kprobe_opcode_t *) (regs->pc + 4 + disp * 2); 182 (kprobe_opcode_t *) (regs->pc + 4 + disp * 2);
176 saved_next_opcode2.opcode = *(saved_next_opcode2.addr); 183 op2->opcode = *(op2->addr);
177 arch_arm_kprobe(&saved_next_opcode2); 184 arch_arm_kprobe(op2);
178 185
179 } else if (OPCODE_BF_S(p->opcode) || OPCODE_BT_S(p->opcode)) { 186 } else if (OPCODE_BF_S(p->opcode) || OPCODE_BT_S(p->opcode)) {
180 unsigned long disp = (p->opcode & 0x00FF); 187 unsigned long disp = (p->opcode & 0x00FF);
181 /* case 1 */ 188 /* case 1 */
182 saved_next_opcode.addr = p->addr + 2; 189 op1->addr = p->addr + 2;
183 /* case 2 */ 190 /* case 2 */
184 saved_next_opcode2.addr = 191 op2->addr =
185 (kprobe_opcode_t *) (regs->pc + 4 + disp * 2); 192 (kprobe_opcode_t *) (regs->pc + 4 + disp * 2);
186 saved_next_opcode2.opcode = *(saved_next_opcode2.addr); 193 op2->opcode = *(op2->addr);
187 arch_arm_kprobe(&saved_next_opcode2); 194 arch_arm_kprobe(op2);
188 195
189 } else { 196 } else {
190 saved_next_opcode.addr = p->addr + 1; 197 op1->addr = p->addr + 1;
191 } 198 }
192 199
193 saved_next_opcode.opcode = *(saved_next_opcode.addr); 200 op1->opcode = *(op1->addr);
194 arch_arm_kprobe(&saved_next_opcode); 201 arch_arm_kprobe(op1);
195 } 202 }
196} 203}
197 204
@@ -376,21 +383,23 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs)
376 cur->post_handler(cur, regs, 0); 383 cur->post_handler(cur, regs, 0);
377 } 384 }
378 385
379 if (saved_next_opcode.addr != 0x0) { 386 p = &__get_cpu_var(saved_next_opcode);
380 arch_disarm_kprobe(&saved_next_opcode); 387 if (p->addr) {
381 saved_next_opcode.addr = 0x0; 388 arch_disarm_kprobe(p);
382 saved_next_opcode.opcode = 0x0; 389 p->addr = NULL;
390 p->opcode = 0;
383 391
384 addr = saved_current_opcode.addr; 392 addr = __get_cpu_var(saved_current_opcode).addr;
385 saved_current_opcode.addr = 0x0; 393 __get_cpu_var(saved_current_opcode).addr = NULL;
386 394
387 p = get_kprobe(addr); 395 p = get_kprobe(addr);
388 arch_arm_kprobe(p); 396 arch_arm_kprobe(p);
389 397
390 if (saved_next_opcode2.addr != 0x0) { 398 p = &__get_cpu_var(saved_next_opcode2);
391 arch_disarm_kprobe(&saved_next_opcode2); 399 if (p->addr) {
392 saved_next_opcode2.addr = 0x0; 400 arch_disarm_kprobe(p);
393 saved_next_opcode2.opcode = 0x0; 401 p->addr = NULL;
402 p->opcode = 0;
394 } 403 }
395 } 404 }
396 405
@@ -572,14 +581,5 @@ static struct kprobe trampoline_p = {
572 581
573int __init arch_init_kprobes(void) 582int __init arch_init_kprobes(void)
574{ 583{
575 saved_next_opcode.addr = 0x0;
576 saved_next_opcode.opcode = 0x0;
577
578 saved_current_opcode.addr = 0x0;
579 saved_current_opcode.opcode = 0x0;
580
581 saved_next_opcode2.addr = 0x0;
582 saved_next_opcode2.opcode = 0x0;
583
584 return register_kprobe(&trampoline_p); 584 return register_kprobe(&trampoline_p);
585} 585}
diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c
new file mode 100644
index 000000000000..0a05983633ca
--- /dev/null
+++ b/arch/sh/kernel/ptrace.c
@@ -0,0 +1,33 @@
1#include <linux/ptrace.h>
2
3/**
4 * regs_query_register_offset() - query register offset from its name
5 * @name: the name of a register
6 *
7 * regs_query_register_offset() returns the offset of a register in struct
8 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
9 */
10int regs_query_register_offset(const char *name)
11{
12 const struct pt_regs_offset *roff;
13 for (roff = regoffset_table; roff->name != NULL; roff++)
14 if (!strcmp(roff->name, name))
15 return roff->offset;
16 return -EINVAL;
17}
18
19/**
20 * regs_query_register_name() - query register name from its offset
21 * @offset: the offset of a register in struct pt_regs.
22 *
23 * regs_query_register_name() returns the name of a register from its
24 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
25 */
26const char *regs_query_register_name(unsigned int offset)
27{
28 const struct pt_regs_offset *roff;
29 for (roff = regoffset_table; roff->name != NULL; roff++)
30 if (roff->offset == offset)
31 return roff->name;
32 return NULL;
33}
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 6c4bbba2a675..2cd42b58cb20 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -274,6 +274,33 @@ static int dspregs_active(struct task_struct *target,
274} 274}
275#endif 275#endif
276 276
277const struct pt_regs_offset regoffset_table[] = {
278 REGS_OFFSET_NAME(0),
279 REGS_OFFSET_NAME(1),
280 REGS_OFFSET_NAME(2),
281 REGS_OFFSET_NAME(3),
282 REGS_OFFSET_NAME(4),
283 REGS_OFFSET_NAME(5),
284 REGS_OFFSET_NAME(6),
285 REGS_OFFSET_NAME(7),
286 REGS_OFFSET_NAME(8),
287 REGS_OFFSET_NAME(9),
288 REGS_OFFSET_NAME(10),
289 REGS_OFFSET_NAME(11),
290 REGS_OFFSET_NAME(12),
291 REGS_OFFSET_NAME(13),
292 REGS_OFFSET_NAME(14),
293 REGS_OFFSET_NAME(15),
294 REG_OFFSET_NAME(pc),
295 REG_OFFSET_NAME(pr),
296 REG_OFFSET_NAME(sr),
297 REG_OFFSET_NAME(gbr),
298 REG_OFFSET_NAME(mach),
299 REG_OFFSET_NAME(macl),
300 REG_OFFSET_NAME(tra),
301 REG_OFFSET_END,
302};
303
277/* 304/*
278 * These are our native regset flavours. 305 * These are our native regset flavours.
279 */ 306 */
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 5fd644da7f02..b97817016b6a 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -252,6 +252,85 @@ static int fpregs_active(struct task_struct *target,
252} 252}
253#endif 253#endif
254 254
255const struct pt_regs_offset regoffset_table[] = {
256 REG_OFFSET_NAME(pc),
257 REG_OFFSET_NAME(sr),
258 REG_OFFSET_NAME(syscall_nr),
259 REGS_OFFSET_NAME(0),
260 REGS_OFFSET_NAME(1),
261 REGS_OFFSET_NAME(2),
262 REGS_OFFSET_NAME(3),
263 REGS_OFFSET_NAME(4),
264 REGS_OFFSET_NAME(5),
265 REGS_OFFSET_NAME(6),
266 REGS_OFFSET_NAME(7),
267 REGS_OFFSET_NAME(8),
268 REGS_OFFSET_NAME(9),
269 REGS_OFFSET_NAME(10),
270 REGS_OFFSET_NAME(11),
271 REGS_OFFSET_NAME(12),
272 REGS_OFFSET_NAME(13),
273 REGS_OFFSET_NAME(14),
274 REGS_OFFSET_NAME(15),
275 REGS_OFFSET_NAME(16),
276 REGS_OFFSET_NAME(17),
277 REGS_OFFSET_NAME(18),
278 REGS_OFFSET_NAME(19),
279 REGS_OFFSET_NAME(20),
280 REGS_OFFSET_NAME(21),
281 REGS_OFFSET_NAME(22),
282 REGS_OFFSET_NAME(23),
283 REGS_OFFSET_NAME(24),
284 REGS_OFFSET_NAME(25),
285 REGS_OFFSET_NAME(26),
286 REGS_OFFSET_NAME(27),
287 REGS_OFFSET_NAME(28),
288 REGS_OFFSET_NAME(29),
289 REGS_OFFSET_NAME(30),
290 REGS_OFFSET_NAME(31),
291 REGS_OFFSET_NAME(32),
292 REGS_OFFSET_NAME(33),
293 REGS_OFFSET_NAME(34),
294 REGS_OFFSET_NAME(35),
295 REGS_OFFSET_NAME(36),
296 REGS_OFFSET_NAME(37),
297 REGS_OFFSET_NAME(38),
298 REGS_OFFSET_NAME(39),
299 REGS_OFFSET_NAME(40),
300 REGS_OFFSET_NAME(41),
301 REGS_OFFSET_NAME(42),
302 REGS_OFFSET_NAME(43),
303 REGS_OFFSET_NAME(44),
304 REGS_OFFSET_NAME(45),
305 REGS_OFFSET_NAME(46),
306 REGS_OFFSET_NAME(47),
307 REGS_OFFSET_NAME(48),
308 REGS_OFFSET_NAME(49),
309 REGS_OFFSET_NAME(50),
310 REGS_OFFSET_NAME(51),
311 REGS_OFFSET_NAME(52),
312 REGS_OFFSET_NAME(53),
313 REGS_OFFSET_NAME(54),
314 REGS_OFFSET_NAME(55),
315 REGS_OFFSET_NAME(56),
316 REGS_OFFSET_NAME(57),
317 REGS_OFFSET_NAME(58),
318 REGS_OFFSET_NAME(59),
319 REGS_OFFSET_NAME(60),
320 REGS_OFFSET_NAME(61),
321 REGS_OFFSET_NAME(62),
322 REGS_OFFSET_NAME(63),
323 TREGS_OFFSET_NAME(0),
324 TREGS_OFFSET_NAME(1),
325 TREGS_OFFSET_NAME(2),
326 TREGS_OFFSET_NAME(3),
327 TREGS_OFFSET_NAME(4),
328 TREGS_OFFSET_NAME(5),
329 TREGS_OFFSET_NAME(6),
330 TREGS_OFFSET_NAME(7),
331 REG_OFFSET_END,
332};
333
255/* 334/*
256 * These are our native regset flavours. 335 * These are our native regset flavours.
257 */ 336 */
diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c
index b1fca66bb92e..ca6a5ca64015 100644
--- a/arch/sh/kernel/reboot.c
+++ b/arch/sh/kernel/reboot.c
@@ -9,6 +9,7 @@
9#include <asm/addrspace.h> 9#include <asm/addrspace.h>
10#include <asm/reboot.h> 10#include <asm/reboot.h>
11#include <asm/system.h> 11#include <asm/system.h>
12#include <asm/tlbflush.h>
12 13
13void (*pm_power_off)(void); 14void (*pm_power_off)(void);
14EXPORT_SYMBOL(pm_power_off); 15EXPORT_SYMBOL(pm_power_off);
@@ -25,6 +26,9 @@ static void native_machine_restart(char * __unused)
25{ 26{
26 local_irq_disable(); 27 local_irq_disable();
27 28
29 /* Destroy all of the TLBs in preparation for reset by MMU */
30 __flush_tlb_global();
31
28 /* Address error with SR.BL=1 first. */ 32 /* Address error with SR.BL=1 first. */
29 trigger_address_error(); 33 trigger_address_error();
30 34
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index d0e249100e98..105f559d946d 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -47,7 +47,6 @@ static pte_t *__get_pte_phys(unsigned long addr)
47 pgd_t *pgd; 47 pgd_t *pgd;
48 pud_t *pud; 48 pud_t *pud;
49 pmd_t *pmd; 49 pmd_t *pmd;
50 pte_t *pte;
51 50
52 pgd = pgd_offset_k(addr); 51 pgd = pgd_offset_k(addr);
53 if (pgd_none(*pgd)) { 52 if (pgd_none(*pgd)) {
@@ -67,8 +66,7 @@ static pte_t *__get_pte_phys(unsigned long addr)
67 return NULL; 66 return NULL;
68 } 67 }
69 68
70 pte = pte_offset_kernel(pmd, addr); 69 return pte_offset_kernel(pmd, addr);
71 return pte;
72} 70}
73 71
74static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) 72static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
@@ -125,13 +123,45 @@ void __clear_fixmap(enum fixed_addresses idx, pgprot_t prot)
125 clear_pte_phys(address, prot); 123 clear_pte_phys(address, prot);
126} 124}
127 125
126static pmd_t * __init one_md_table_init(pud_t *pud)
127{
128 if (pud_none(*pud)) {
129 pmd_t *pmd;
130
131 pmd = alloc_bootmem_pages(PAGE_SIZE);
132 pud_populate(&init_mm, pud, pmd);
133 BUG_ON(pmd != pmd_offset(pud, 0));
134 }
135
136 return pmd_offset(pud, 0);
137}
138
139static pte_t * __init one_page_table_init(pmd_t *pmd)
140{
141 if (pmd_none(*pmd)) {
142 pte_t *pte;
143
144 pte = alloc_bootmem_pages(PAGE_SIZE);
145 pmd_populate_kernel(&init_mm, pmd, pte);
146 BUG_ON(pte != pte_offset_kernel(pmd, 0));
147 }
148
149 return pte_offset_kernel(pmd, 0);
150}
151
152static pte_t * __init page_table_kmap_check(pte_t *pte, pmd_t *pmd,
153 unsigned long vaddr, pte_t *lastpte)
154{
155 return pte;
156}
157
128void __init page_table_range_init(unsigned long start, unsigned long end, 158void __init page_table_range_init(unsigned long start, unsigned long end,
129 pgd_t *pgd_base) 159 pgd_t *pgd_base)
130{ 160{
131 pgd_t *pgd; 161 pgd_t *pgd;
132 pud_t *pud; 162 pud_t *pud;
133 pmd_t *pmd; 163 pmd_t *pmd;
134 pte_t *pte; 164 pte_t *pte = NULL;
135 int i, j, k; 165 int i, j, k;
136 unsigned long vaddr; 166 unsigned long vaddr;
137 167
@@ -144,19 +174,13 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
144 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 174 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
145 pud = (pud_t *)pgd; 175 pud = (pud_t *)pgd;
146 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { 176 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
147#ifdef __PAGETABLE_PMD_FOLDED 177 pmd = one_md_table_init(pud);
148 pmd = (pmd_t *)pud; 178#ifndef __PAGETABLE_PMD_FOLDED
149#else
150 pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
151 pud_populate(&init_mm, pud, pmd);
152 pmd += k; 179 pmd += k;
153#endif 180#endif
154 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { 181 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
155 if (pmd_none(*pmd)) { 182 pte = page_table_kmap_check(one_page_table_init(pmd),
156 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 183 pmd, vaddr, pte);
157 pmd_populate_kernel(&init_mm, pmd, pte);
158 BUG_ON(pte != pte_offset_kernel(pmd, 0));
159 }
160 vaddr += PMD_SIZE; 184 vaddr += PMD_SIZE;
161 } 185 }
162 k = 0; 186 k = 0;
diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c
index 3fbe03ce8fe3..a6a20d6de4c0 100644
--- a/arch/sh/mm/tlbflush_32.c
+++ b/arch/sh/mm/tlbflush_32.c
@@ -119,3 +119,19 @@ void local_flush_tlb_mm(struct mm_struct *mm)
119 local_irq_restore(flags); 119 local_irq_restore(flags);
120 } 120 }
121} 121}
122
123void __flush_tlb_global(void)
124{
125 unsigned long flags;
126
127 local_irq_save(flags);
128
129 /*
130 * This is the most destructive of the TLB flushing options,
131 * and will tear down all of the UTLB/ITLB mappings, including
132 * wired entries.
133 */
134 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
135
136 local_irq_restore(flags);
137}
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c
index 03db41cc1268..7f5810f5dfdc 100644
--- a/arch/sh/mm/tlbflush_64.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -455,6 +455,11 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
455 flush_tlb_all(); 455 flush_tlb_all();
456} 456}
457 457
458void __flush_tlb_global(void)
459{
460 flush_tlb_all();
461}
462
458void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) 463void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
459{ 464{
460} 465}
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index b25aa554ee5e..9f56eb978024 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -52,6 +52,8 @@ MIGOR SH_MIGOR
52RSK7201 SH_RSK7201 52RSK7201 SH_RSK7201
53RSK7203 SH_RSK7203 53RSK7203 SH_RSK7203
54AP325RXA SH_AP325RXA 54AP325RXA SH_AP325RXA
55SH2007 SH_SH2007
56SH7757LCR SH_SH7757LCR
55SH7763RDP SH_SH7763RDP 57SH7763RDP SH_SH7763RDP
56SH7785LCR SH_SH7785LCR 58SH7785LCR SH_SH7785LCR
57SH7785LCR_PT SH_SH7785LCR_PT 59SH7785LCR_PT SH_SH7785LCR_PT
diff --git a/drivers/Makefile b/drivers/Makefile
index 91874e048552..b713e75cee71 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_EISA) += eisa/
92obj-y += lguest/ 92obj-y += lguest/
93obj-$(CONFIG_CPU_FREQ) += cpufreq/ 93obj-$(CONFIG_CPU_FREQ) += cpufreq/
94obj-$(CONFIG_CPU_IDLE) += cpuidle/ 94obj-$(CONFIG_CPU_IDLE) += cpuidle/
95obj-$(CONFIG_DMA_ENGINE) += dma/
95obj-$(CONFIG_MMC) += mmc/ 96obj-$(CONFIG_MMC) += mmc/
96obj-$(CONFIG_MEMSTICK) += memstick/ 97obj-$(CONFIG_MEMSTICK) += memstick/
97obj-$(CONFIG_NEW_LEDS) += leds/ 98obj-$(CONFIG_NEW_LEDS) += leds/
@@ -102,7 +103,6 @@ obj-$(CONFIG_CRYPTO) += crypto/
102obj-$(CONFIG_SUPERH) += sh/ 103obj-$(CONFIG_SUPERH) += sh/
103obj-$(CONFIG_ARCH_SHMOBILE) += sh/ 104obj-$(CONFIG_ARCH_SHMOBILE) += sh/
104obj-$(CONFIG_GENERIC_TIME) += clocksource/ 105obj-$(CONFIG_GENERIC_TIME) += clocksource/
105obj-$(CONFIG_DMA_ENGINE) += dma/
106obj-$(CONFIG_DCA) += dca/ 106obj-$(CONFIG_DCA) += dca/
107obj-$(CONFIG_HID) += hid/ 107obj-$(CONFIG_HID) += hid/
108obj-$(CONFIG_PPC_PS3) += ps3/ 108obj-$(CONFIG_PPC_PS3) += ps3/
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index f70c49f915fa..eb7ef4951e07 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -140,7 +140,15 @@
140# define SCSPTR0 0xffe00024 /* 16 bit SCIF */ 140# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
141# define SCSPTR1 0xffe10024 /* 16 bit SCIF */ 141# define SCSPTR1 0xffe10024 /* 16 bit SCIF */
142# define SCIF_ORER 0x0001 /* Overrun error bit */ 142# define SCIF_ORER 0x0001 /* Overrun error bit */
143# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 143
144#if defined(CONFIG_SH_SH2007)
145/* TIE=0,RIE=0,TE=1,RE=1,REIE=1,CKE1=0 */
146# define SCSCR_INIT(port) 0x38
147#else
148/* TIE=0,RIE=0,TE=1,RE=1,REIE=1,CKE1=1 */
149# define SCSCR_INIT(port) 0x3a
150#endif
151
144#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 152#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \
145 defined(CONFIG_CPU_SUBTYPE_SH7786) 153 defined(CONFIG_CPU_SUBTYPE_SH7786)
146# define SCSPTR0 0xffea0024 /* 16 bit SCIF */ 154# define SCSPTR0 0xffea0024 /* 16 bit SCIF */
@@ -599,9 +607,10 @@ static inline int sci_rxd_in(struct uart_port *port)
599 * -- Mitch Davis - 15 Jul 2000 607 * -- Mitch Davis - 15 Jul 2000
600 */ 608 */
601 609
602#if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 610#if (defined(CONFIG_CPU_SUBTYPE_SH7780) || \
603 defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 611 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
604 defined(CONFIG_CPU_SUBTYPE_SH7786) 612 defined(CONFIG_CPU_SUBTYPE_SH7786)) && \
613 !defined(CONFIG_SH_SH2007)
605#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) 614#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
606#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 615#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
607 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 616 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
diff --git a/drivers/sh/clk.c b/drivers/sh/clk.c
index 5d84adac9ec4..cede14e34507 100644
--- a/drivers/sh/clk.c
+++ b/drivers/sh/clk.c
@@ -73,22 +73,14 @@ long clk_rate_table_round(struct clk *clk,
73{ 73{
74 unsigned long rate_error, rate_error_prev = ~0UL; 74 unsigned long rate_error, rate_error_prev = ~0UL;
75 unsigned long rate_best_fit = rate; 75 unsigned long rate_best_fit = rate;
76 unsigned long highest, lowest;
77 int i; 76 int i;
78 77
79 highest = lowest = 0;
80
81 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { 78 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
82 unsigned long freq = freq_table[i].frequency; 79 unsigned long freq = freq_table[i].frequency;
83 80
84 if (freq == CPUFREQ_ENTRY_INVALID) 81 if (freq == CPUFREQ_ENTRY_INVALID)
85 continue; 82 continue;
86 83
87 if (freq > highest)
88 highest = freq;
89 if (freq < lowest)
90 lowest = freq;
91
92 rate_error = abs(freq - rate); 84 rate_error = abs(freq - rate);
93 if (rate_error < rate_error_prev) { 85 if (rate_error < rate_error_prev) {
94 rate_best_fit = freq; 86 rate_best_fit = freq;
@@ -99,11 +91,6 @@ long clk_rate_table_round(struct clk *clk,
99 break; 91 break;
100 } 92 }
101 93
102 if (rate >= highest)
103 rate_best_fit = highest;
104 if (rate <= lowest)
105 rate_best_fit = lowest;
106
107 return rate_best_fit; 94 return rate_best_fit;
108} 95}
109 96
@@ -354,10 +341,10 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
354 ret = clk_reparent(clk, parent); 341 ret = clk_reparent(clk, parent);
355 342
356 if (ret == 0) { 343 if (ret == 0) {
357 pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
358 clk->name, clk->parent->name, clk->rate);
359 if (clk->ops->recalc) 344 if (clk->ops->recalc)
360 clk->rate = clk->ops->recalc(clk); 345 clk->rate = clk->ops->recalc(clk);
346 pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
347 clk->name, clk->parent->name, clk->rate);
361 propagate_rate(clk); 348 propagate_rate(clk);
362 } 349 }
363 } else 350 } else
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 08:34:24 -0400