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-rw-r--r--Documentation/ABI/testing/sysfs-class-cxl2
-rw-r--r--Documentation/devicetree/bindings/arm/exynos/power_domain.txt2
-rw-r--r--Documentation/devicetree/bindings/arm/sti.txt4
-rw-r--r--Documentation/devicetree/bindings/net/apm-xgene-enet.txt5
-rw-r--r--Documentation/devicetree/bindings/power/power_domain.txt29
-rw-r--r--Documentation/devicetree/bindings/serial/8250.txt (renamed from Documentation/devicetree/bindings/serial/of-serial.txt)0
-rw-r--r--Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt19
-rw-r--r--Documentation/devicetree/bindings/submitting-patches.txt3
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt2
-rw-r--r--Documentation/devicetree/bindings/watchdog/atmel-wdt.txt5
-rw-r--r--Documentation/powerpc/transactional_memory.txt36
-rw-r--r--MAINTAINERS17
-rw-r--r--Makefile2
-rw-r--r--arch/Kconfig2
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi8
-rw-r--r--arch/arm/boot/dts/am335x-bone.dts8
-rw-r--r--arch/arm/boot/dts/am335x-lxm.dts4
-rw-r--r--arch/arm/boot/dts/am33xx-clocks.dtsi6
-rw-r--r--arch/arm/boot/dts/am43xx-clocks.dtsi12
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi9
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi5
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts10
-rw-r--r--arch/arm/boot/dts/dra72-evm.dts10
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi90
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos4-cpu-thermal.dtsi52
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi45
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts19
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts57
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi38
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi64
-rw-r--r--arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi12
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi44
-rw-r--r--arch/arm/boot/dts/exynos5420-trip-points.dtsi35
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi33
-rw-r--r--arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos5440-trip-points.dtsi25
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi18
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts2
-rw-r--r--arch/arm/boot/dts/omap5-core-thermal.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5-gpu-thermal.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5.dtsi4
-rw-r--r--arch/arm/boot/dts/omap54xx-clocks.dtsi41
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi3
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi9
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi6
-rw-r--r--arch/arm/configs/at91_dt_defconfig1
-rw-r--r--arch/arm/configs/multi_v7_defconfig2
-rw-r--r--arch/arm/configs/omap2plus_defconfig1
-rw-r--r--arch/arm/configs/sama5_defconfig2
-rw-r--r--arch/arm/configs/sunxi_defconfig1
-rw-r--r--arch/arm/configs/vexpress_defconfig2
-rw-r--r--arch/arm/include/debug/at91.S5
-rw-r--r--arch/arm/mach-at91/pm.c22
-rw-r--r--arch/arm/mach-at91/pm.h2
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S80
-rw-r--r--arch/arm/mach-exynos/platsmp.c3
-rw-r--r--arch/arm/mach-exynos/pm_domains.c28
-rw-r--r--arch/arm/mach-exynos/suspend.c4
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c5
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.h1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c103
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c1
-rw-r--r--arch/arm/mach-omap2/prm44xx.c4
-rw-r--r--arch/arm/mach-pxa/idp.c1
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-sa1100/neponset.c4
-rw-r--r--arch/arm/mach-sa1100/pleb.c2
-rw-r--r--arch/arm/mach-socfpga/core.h2
-rw-r--r--arch/arm/mach-socfpga/socfpga.c5
-rw-r--r--arch/arm/mach-sti/board-dt.c1
-rw-r--r--arch/arm64/boot/dts/apm/apm-storm.dtsi4
-rw-r--r--arch/arm64/include/asm/tlb.h3
-rw-r--r--arch/arm64/include/asm/tlbflush.h13
-rw-r--r--arch/arm64/kernel/efi.c9
-rw-r--r--arch/arm64/kernel/head.S2
-rw-r--r--arch/arm64/kernel/process.c8
-rw-r--r--arch/c6x/include/asm/pgtable.h5
-rw-r--r--arch/microblaze/kernel/entry.S7
-rw-r--r--arch/nios2/include/asm/ptrace.h47
-rw-r--r--arch/nios2/include/asm/ucontext.h32
-rw-r--r--arch/nios2/include/uapi/asm/Kbuild2
-rw-r--r--arch/nios2/include/uapi/asm/elf.h4
-rw-r--r--arch/nios2/include/uapi/asm/ptrace.h50
-rw-r--r--arch/nios2/include/uapi/asm/sigcontext.h12
-rw-r--r--arch/nios2/kernel/signal.c4
-rw-r--r--arch/powerpc/Kconfig4
-rw-r--r--arch/powerpc/Kconfig.debug9
-rw-r--r--arch/powerpc/Makefile4
-rw-r--r--arch/powerpc/boot/Makefile4
-rw-r--r--arch/powerpc/boot/crt0.S26
-rw-r--r--arch/powerpc/boot/dts/b4860emu.dts223
-rw-r--r--arch/powerpc/boot/dts/b4qds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-post.dtsi60
-rw-r--r--arch/powerpc/boot/dts/fsl/b4si-post.dtsi89
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi37
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/t1040si-post.dtsi65
-rw-r--r--arch/powerpc/boot/dts/fsl/t2081si-post.dtsi105
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi265
-rw-r--r--arch/powerpc/boot/dts/kmcoge4.dts15
-rw-r--r--arch/powerpc/boot/dts/oca4080.dts15
-rw-r--r--arch/powerpc/boot/dts/p1023rdb.dts18
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts17
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts17
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts17
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts17
-rw-r--r--arch/powerpc/boot/dts/p5040ds.dts17
-rw-r--r--arch/powerpc/boot/dts/t104xqds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/t104xrdb.dtsi14
-rw-r--r--arch/powerpc/boot/dts/t208xqds.dtsi19
-rw-r--r--arch/powerpc/boot/dts/t208xrdb.dtsi15
-rw-r--r--arch/powerpc/boot/dts/t4240qds.dts17
-rw-r--r--arch/powerpc/boot/dts/t4240rdb.dts15
-rw-r--r--arch/powerpc/boot/libfdt-wrapper.c6
-rw-r--r--arch/powerpc/boot/libfdt_env.h14
-rw-r--r--arch/powerpc/boot/of.h8
-rw-r--r--arch/powerpc/boot/planetcore.c33
-rw-r--r--arch/powerpc/boot/planetcore.h3
-rwxr-xr-xarch/powerpc/boot/wrapper2
-rw-r--r--arch/powerpc/configs/cell_defconfig3
-rw-r--r--arch/powerpc/configs/celleb_defconfig152
-rw-r--r--arch/powerpc/configs/corenet32_smp_defconfig7
-rw-r--r--arch/powerpc/configs/corenet64_smp_defconfig15
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig3
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig2
-rw-r--r--arch/powerpc/configs/ppc64_defconfig3
-rw-r--r--arch/powerpc/include/asm/Kbuild4
-rw-r--r--arch/powerpc/include/asm/cache.h3
-rw-r--r--arch/powerpc/include/asm/cputable.h8
-rw-r--r--arch/powerpc/include/asm/dbdma.h12
-rw-r--r--arch/powerpc/include/asm/dcr-native.h2
-rw-r--r--arch/powerpc/include/asm/div64.h1
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h4
-rw-r--r--arch/powerpc/include/asm/firmware.h10
-rw-r--r--arch/powerpc/include/asm/iommu.h3
-rw-r--r--arch/powerpc/include/asm/irq_regs.h2
-rw-r--r--arch/powerpc/include/asm/kvm_book3s_64.h16
-rw-r--r--arch/powerpc/include/asm/kvm_host.h2
-rw-r--r--arch/powerpc/include/asm/local64.h1
-rw-r--r--arch/powerpc/include/asm/machdep.h14
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h1
-rw-r--r--arch/powerpc/include/asm/mpc85xx.h1
-rw-r--r--arch/powerpc/include/asm/mpic.h17
-rw-r--r--arch/powerpc/include/asm/nmi.h4
-rw-r--r--arch/powerpc/include/asm/nvram.h50
-rw-r--r--arch/powerpc/include/asm/opal-api.h735
-rw-r--r--arch/powerpc/include/asm/opal.h770
-rw-r--r--arch/powerpc/include/asm/paca.h4
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h19
-rw-r--r--arch/powerpc/include/asm/pci.h2
-rw-r--r--arch/powerpc/include/asm/ppc-pci.h3
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h192
-rw-r--r--arch/powerpc/include/asm/rtas.h33
-rw-r--r--arch/powerpc/include/asm/setup.h1
-rw-r--r--arch/powerpc/include/asm/smp.h5
-rw-r--r--arch/powerpc/include/asm/swab.h26
-rw-r--r--arch/powerpc/include/asm/systbl.h1
-rw-r--r--arch/powerpc/include/asm/ucc_slow.h13
-rw-r--r--arch/powerpc/include/asm/unistd.h2
-rw-r--r--arch/powerpc/include/asm/vga.h4
-rw-r--r--arch/powerpc/include/asm/xics.h2
-rw-r--r--arch/powerpc/include/uapi/asm/ptrace.h2
-rw-r--r--arch/powerpc/include/uapi/asm/tm.h2
-rw-r--r--arch/powerpc/include/uapi/asm/unistd.h1
-rw-r--r--arch/powerpc/kernel/Makefile4
-rw-r--r--arch/powerpc/kernel/cacheinfo.c44
-rw-r--r--arch/powerpc/kernel/cpu_setup_power.S10
-rw-r--r--arch/powerpc/kernel/cputable.c4
-rw-r--r--arch/powerpc/kernel/dma-swiotlb.c11
-rw-r--r--arch/powerpc/kernel/entry_64.S24
-rw-r--r--arch/powerpc/kernel/idle_power7.S1
-rw-r--r--arch/powerpc/kernel/mce_power.c53
-rw-r--r--arch/powerpc/kernel/nvram_64.c677
-rw-r--r--arch/powerpc/kernel/pci-common.c37
-rw-r--r--arch/powerpc/kernel/pci-hotplug.c7
-rw-r--r--arch/powerpc/kernel/pci_of_scan.c7
-rw-r--r--arch/powerpc/kernel/process.c9
-rw-r--r--arch/powerpc/kernel/prom_init.c4
-rw-r--r--arch/powerpc/kernel/rtas.c30
-rw-r--r--arch/powerpc/kernel/rtas_pci.c47
-rw-r--r--arch/powerpc/kernel/setup_64.c20
-rw-r--r--arch/powerpc/kernel/syscalls.c17
-rw-r--r--arch/powerpc/kernel/systbl.S2
-rw-r--r--arch/powerpc/kernel/systbl_chk.c2
-rw-r--r--arch/powerpc/kernel/tm.S8
-rw-r--r--arch/powerpc/kernel/udbg.c2
-rw-r--r--arch/powerpc/kernel/vector.S24
-rw-r--r--arch/powerpc/kvm/book3s_hv_ras.c4
-rw-r--r--arch/powerpc/kvm/powerpc.c38
-rw-r--r--arch/powerpc/lib/alloc.c2
-rw-r--r--arch/powerpc/lib/copy_32.S127
-rw-r--r--arch/powerpc/lib/copypage_power7.S32
-rw-r--r--arch/powerpc/lib/copyuser_power7.S226
-rw-r--r--arch/powerpc/lib/crtsavres.S96
-rw-r--r--arch/powerpc/lib/ldstfp.S32
-rw-r--r--arch/powerpc/lib/locks.c1
-rw-r--r--arch/powerpc/lib/memcpy_power7.S226
-rw-r--r--arch/powerpc/lib/ppc_ksyms.c4
-rw-r--r--arch/powerpc/lib/rheap.c2
-rw-r--r--arch/powerpc/mm/Makefile1
-rw-r--r--arch/powerpc/mm/dma-noncoherent.c2
-rw-r--r--arch/powerpc/mm/fsl_booke_mmu.c2
-rw-r--r--arch/powerpc/mm/hugepage-hash64.c2
-rw-r--r--arch/powerpc/mm/hugetlbpage.c4
-rw-r--r--arch/powerpc/mm/init_64.c1
-rw-r--r--arch/powerpc/mm/mem.c3
-rw-r--r--arch/powerpc/mm/mmu_decl.h2
-rw-r--r--arch/powerpc/mm/numa.c62
-rw-r--r--arch/powerpc/mm/pgtable_32.c18
-rw-r--r--arch/powerpc/mm/pgtable_64.c6
-rw-r--r--arch/powerpc/mm/ppc_mmu_32.c5
-rw-r--r--arch/powerpc/mm/tlb_hash64.c2
-rw-r--r--arch/powerpc/mm/vphn.c70
-rw-r--r--arch/powerpc/mm/vphn.h16
-rw-r--r--arch/powerpc/perf/core-book3s.c4
-rw-r--r--arch/powerpc/perf/hv-24x7.c214
-rw-r--r--arch/powerpc/perf/hv-24x7.h8
-rw-r--r--arch/powerpc/platforms/85xx/common.c1
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c12
-rw-r--r--arch/powerpc/platforms/85xx/smp.c4
-rw-r--r--arch/powerpc/platforms/Kconfig5
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype3
-rw-r--r--arch/powerpc/platforms/cell/Kconfig11
-rw-r--r--arch/powerpc/platforms/cell/Makefile15
-rw-r--r--arch/powerpc/platforms/cell/beat.c264
-rw-r--r--arch/powerpc/platforms/cell/beat.h39
-rw-r--r--arch/powerpc/platforms/cell/beat_htab.c445
-rw-r--r--arch/powerpc/platforms/cell/beat_hvCall.S285
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c253
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.h30
-rw-r--r--arch/powerpc/platforms/cell/beat_iommu.c115
-rw-r--r--arch/powerpc/platforms/cell/beat_spu_priv1.c205
-rw-r--r--arch/powerpc/platforms/cell/beat_syscall.h164
-rw-r--r--arch/powerpc/platforms/cell/beat_udbg.c98
-rw-r--r--arch/powerpc/platforms/cell/beat_wrapper.h290
-rw-r--r--arch/powerpc/platforms/cell/cell.h24
-rw-r--r--arch/powerpc/platforms/cell/celleb_pci.c500
-rw-r--r--arch/powerpc/platforms/cell/celleb_pci.h46
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc.h232
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_epci.c428
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_pciex.c538
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_sio.c99
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_uhc.c95
-rw-r--r--arch/powerpc/platforms/cell/celleb_setup.c243
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c2
-rw-r--r--arch/powerpc/platforms/cell/iommu.c11
-rw-r--r--arch/powerpc/platforms/cell/setup.c5
-rw-r--r--arch/powerpc/platforms/cell/smp.c9
-rw-r--r--arch/powerpc/platforms/cell/spu_callbacks.c1
-rw-r--r--arch/powerpc/platforms/chrp/setup.c2
-rw-r--r--arch/powerpc/platforms/maple/maple.h2
-rw-r--r--arch/powerpc/platforms/maple/pci.c4
-rw-r--r--arch/powerpc/platforms/maple/setup.c2
-rw-r--r--arch/powerpc/platforms/pasemi/iommu.c6
-rw-r--r--arch/powerpc/platforms/pasemi/pasemi.h1
-rw-r--r--arch/powerpc/platforms/pasemi/pci.c5
-rw-r--r--arch/powerpc/platforms/powermac/bootx_init.c2
-rw-r--r--arch/powerpc/platforms/powermac/pci.c38
-rw-r--r--arch/powerpc/platforms/powermac/pic.c3
-rw-r--r--arch/powerpc/platforms/powermac/pmac.h3
-rw-r--r--arch/powerpc/platforms/powermac/setup.c22
-rw-r--r--arch/powerpc/platforms/powermac/smp.c8
-rw-r--r--arch/powerpc/platforms/powernv/Kconfig7
-rw-r--r--arch/powerpc/platforms/powernv/opal-dump.c3
-rw-r--r--arch/powerpc/platforms/powernv/opal-elog.c3
-rw-r--r--arch/powerpc/platforms/powernv/opal-flash.c8
-rw-r--r--arch/powerpc/platforms/powernv/opal-nvram.c10
-rw-r--r--arch/powerpc/platforms/powernv/opal-sensor.c30
-rw-r--r--arch/powerpc/platforms/powernv/opal-wrappers.S5
-rw-r--r--arch/powerpc/platforms/powernv/opal.c92
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c19
-rw-r--r--arch/powerpc/platforms/powernv/pci-p5ioc2.c1
-rw-r--r--arch/powerpc/platforms/powernv/pci.c103
-rw-r--r--arch/powerpc/platforms/powernv/powernv.h2
-rw-r--r--arch/powerpc/platforms/powernv/setup.c54
-rw-r--r--arch/powerpc/platforms/powernv/smp.c13
-rw-r--r--arch/powerpc/platforms/ps3/smp.c4
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig1
-rw-r--r--arch/powerpc/platforms/pseries/dlpar.c118
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-memory.c476
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c9
-rw-r--r--arch/powerpc/platforms/pseries/mobility.c26
-rw-r--r--arch/powerpc/platforms/pseries/nvram.c674
-rw-r--r--arch/powerpc/platforms/pseries/pci_dlpar.c3
-rw-r--r--arch/powerpc/platforms/pseries/pseries.h14
-rw-r--r--arch/powerpc/platforms/pseries/setup.c53
-rw-r--r--arch/powerpc/platforms/pseries/smp.c6
-rwxr-xr-xarch/powerpc/relocs_check.pl66
-rwxr-xr-xarch/powerpc/relocs_check.sh59
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c10
-rw-r--r--arch/powerpc/sysdev/dcr.c2
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c29
-rw-r--r--arch/powerpc/sysdev/fsl_msi.h2
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c15
-rw-r--r--arch/powerpc/sysdev/mpic.c30
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_io.c25
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc_slow.c5
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c4
-rw-r--r--arch/s390/include/asm/kvm_host.h12
-rw-r--r--arch/s390/include/asm/mmu_context.h2
-rw-r--r--arch/s390/include/asm/page.h11
-rw-r--r--arch/s390/kernel/jump_label.c12
-rw-r--r--arch/s390/kernel/module.c1
-rw-r--r--arch/s390/kernel/processor.c2
-rw-r--r--arch/s390/kvm/kvm-s390.c68
-rw-r--r--arch/s390/kvm/kvm-s390.h3
-rw-r--r--arch/s390/kvm/priv.c2
-rw-r--r--arch/s390/pci/pci.c28
-rw-r--r--arch/s390/pci/pci_mmio.c17
-rw-r--r--arch/x86/xen/p2m.c2
-rw-r--r--drivers/acpi/acpi_lpss.c5
-rw-r--r--drivers/ata/pata_macio.c10
-rw-r--r--drivers/ata/sata_fsl.c2
-rw-r--r--drivers/ata/sata_svw.c11
-rw-r--r--drivers/block/swim3.c12
-rw-r--r--drivers/char/tpm/tpm-chip.c34
-rw-r--r--drivers/char/tpm/tpm_ibmvtpm.c10
-rw-r--r--drivers/char/tpm/tpm_ibmvtpm.h6
-rw-r--r--drivers/clk/clk-divider.c29
-rw-r--r--drivers/clk/clk.c27
-rw-r--r--drivers/clk/qcom/gcc-msm8960.c13
-rw-r--r--drivers/clk/qcom/lcc-ipq806x.c1
-rw-r--r--drivers/clk/qcom/lcc-msm8960.c7
-rw-r--r--drivers/clk/ti/fapll.c6
-rw-r--r--drivers/gpu/drm/drm_crtc.c35
-rw-r--r--drivers/gpu/drm/drm_dp_mst_topology.c11
-rw-r--r--drivers/gpu/drm/drm_mm.c2
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c25
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_fence.c68
-rw-r--r--drivers/gpu/drm/radeon/si.c6
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.c78
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c18
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.c14
-rw-r--r--drivers/i2c/i2c-core.c3
-rw-r--r--drivers/ide/pmac.c10
-rw-r--r--drivers/input/keyboard/tc3589x-keypad.c6
-rw-r--r--drivers/input/misc/mma8450.c1
-rw-r--r--drivers/input/mouse/alps.c4
-rw-r--r--drivers/input/mouse/cyapa_gen3.c2
-rw-r--r--drivers/input/mouse/cyapa_gen5.c4
-rw-r--r--drivers/input/mouse/focaltech.c50
-rw-r--r--drivers/input/mouse/psmouse-base.c14
-rw-r--r--drivers/input/mouse/psmouse.h6
-rw-r--r--drivers/input/touchscreen/Kconfig1
-rw-r--r--drivers/iommu/Kconfig2
-rw-r--r--drivers/iommu/exynos-iommu.c7
-rw-r--r--drivers/iommu/io-pgtable-arm.c5
-rw-r--r--drivers/iommu/omap-iommu.c7
-rw-r--r--drivers/iommu/rockchip-iommu.c7
-rw-r--r--drivers/irqchip/irq-armada-370-xp.c21
-rw-r--r--drivers/irqchip/irq-gic-v3-its.c157
-rw-r--r--drivers/irqchip/irq-gic-v3.c2
-rw-r--r--drivers/irqchip/irq-gic.c20
-rw-r--r--drivers/macintosh/rack-meter.c30
-rw-r--r--drivers/macintosh/smu.c3
-rw-r--r--drivers/macintosh/via-pmu.c25
-rw-r--r--drivers/media/pci/bt8xx/bt878.c12
-rw-r--r--drivers/media/pci/bt8xx/bt878.h11
-rw-r--r--drivers/mmc/host/mxcmmc.c2
-rw-r--r--drivers/mtd/nand/Kconfig1
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c50
-rw-r--r--drivers/net/can/dev.c8
-rw-r--r--drivers/net/can/usb/kvaser_usb.c48
-rw-r--r--drivers/net/can/usb/peak_usb/pcan_usb_fd.c4
-rw-r--r--drivers/net/ethernet/apm/xgene/xgene_enet_hw.c2
-rw-r--r--drivers/net/ethernet/apm/xgene/xgene_enet_main.c4
-rw-r--r--drivers/net/ethernet/apple/bmac.c30
-rw-r--r--drivers/net/ethernet/apple/mace.c44
-rw-r--r--drivers/net/ethernet/broadcom/bcm63xx_enet.c8
-rw-r--r--drivers/net/ethernet/broadcom/bgmac.c7
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c3
-rw-r--r--drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c6
-rw-r--r--drivers/net/ethernet/cadence/macb.c8
-rw-r--r--drivers/net/ethernet/cadence/macb.h2
-rw-r--r--drivers/net/ethernet/freescale/fec_main.c3
-rw-r--r--drivers/net/ethernet/freescale/gianfar.c19
-rw-r--r--drivers/net/ethernet/ibm/emac/core.c12
-rw-r--r--drivers/net/ethernet/smsc/smc91x.c1
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c65
-rw-r--r--drivers/net/team/team.c6
-rw-r--r--drivers/net/xen-netback/interface.c3
-rw-r--r--drivers/net/xen-netback/netback.c22
-rw-r--r--drivers/of/Kconfig3
-rw-r--r--drivers/of/base.c27
-rw-r--r--drivers/of/overlay.c3
-rw-r--r--drivers/of/unittest.c28
-rw-r--r--drivers/pci/host/pci-xgene.c4
-rw-r--r--drivers/pci/pci-sysfs.c5
-rw-r--r--drivers/ps3/ps3-lpm.c4
-rw-r--r--drivers/regulator/core.c7
-rw-r--r--drivers/regulator/da9210-regulator.c9
-rw-r--r--drivers/regulator/rk808-regulator.c8
-rw-r--r--drivers/rtc/rtc-s3c.c1
-rw-r--r--drivers/s390/block/dcssblk.c2
-rw-r--r--drivers/s390/block/scm_blk_cluster.c2
-rw-r--r--drivers/scsi/libsas/sas_discover.c6
-rw-r--r--drivers/scsi/mac53c94.c10
-rw-r--r--drivers/scsi/mesh.c14
-rw-r--r--drivers/spi/spi-atmel.c12
-rw-r--r--drivers/spi/spi-dw-mid.c6
-rw-r--r--drivers/spi/spi-dw-pci.c4
-rw-r--r--drivers/spi/spi-dw.c4
-rw-r--r--drivers/spi/spi-img-spfi.c7
-rw-r--r--drivers/spi/spi-pl022.c2
-rw-r--r--drivers/spi/spi-ti-qspi.c22
-rw-r--r--drivers/usb/gadget/function/f_fs.c204
-rw-r--r--drivers/usb/gadget/legacy/inode.c466
-rw-r--r--drivers/vfio/pci/vfio_pci_intrs.c2
-rw-r--r--drivers/video/fbdev/Kconfig4
-rw-r--r--drivers/video/fbdev/amba-clcd.c3
-rw-r--r--drivers/video/fbdev/aty/aty128fb.c4
-rw-r--r--drivers/video/fbdev/aty/radeon_base.c24
-rw-r--r--drivers/video/fbdev/aty/radeon_monitor.c20
-rw-r--r--drivers/video/fbdev/aty/radeon_pm.c16
-rw-r--r--drivers/video/fbdev/aty/radeonfb.h4
-rw-r--r--drivers/video/fbdev/controlfb.c2
-rw-r--r--drivers/video/fbdev/core/fbmon.c10
-rw-r--r--drivers/video/fbdev/imsttfb.c6
-rw-r--r--drivers/video/fbdev/nvidia/Makefile3
-rw-r--r--drivers/video/fbdev/nvidia/nv_of.c3
-rw-r--r--drivers/video/fbdev/nvidia/nv_proto.h8
-rw-r--r--drivers/video/fbdev/nvidia/nvidia.c4
-rw-r--r--drivers/video/fbdev/omap2/dss/display-sysfs.c179
-rw-r--r--drivers/video/fbdev/platinumfb.c2
-rw-r--r--drivers/video/fbdev/riva/fbdev.c17
-rw-r--r--drivers/xen/events/events_base.c18
-rw-r--r--drivers/xen/xen-pciback/conf_space.c2
-rw-r--r--drivers/xen/xen-pciback/conf_space.h2
-rw-r--r--drivers/xen/xen-pciback/conf_space_header.c61
-rw-r--r--fs/locks.c2
-rw-r--r--fs/nilfs2/segment.c7
-rw-r--r--fs/notify/fanotify/fanotify.c3
-rw-r--r--fs/ocfs2/ocfs2.h2
-rw-r--r--fs/ocfs2/ocfs2_fs.h15
-rw-r--r--fs/pstore/inode.c3
-rw-r--r--include/dt-bindings/pinctrl/am33xx.h3
-rw-r--r--include/dt-bindings/pinctrl/am43xx.h3
-rw-r--r--include/linux/clk.h18
-rw-r--r--include/linux/irqchip/arm-gic-v3.h5
-rw-r--r--include/linux/kasan.h9
-rw-r--r--include/linux/moduleloader.h8
-rw-r--r--include/linux/of_platform.h2
-rw-r--r--include/linux/pstore.h1
-rw-r--r--include/linux/spi/spi.h2
-rw-r--r--include/linux/uio.h2
-rw-r--r--include/linux/vmalloc.h1
-rw-r--r--include/linux/workqueue.h3
-rw-r--r--include/net/netfilter/nf_tables.h22
-rw-r--r--include/soc/at91/at91sam9_ddrsdr.h2
-rw-r--r--include/video/omapdss.h1
-rw-r--r--include/xen/xenbus.h4
-rw-r--r--kernel/cpuset.c9
-rw-r--r--kernel/module.c2
-rw-r--r--kernel/trace/ftrace.c40
-rw-r--r--kernel/workqueue.c56
-rw-r--r--lib/Makefile2
-rw-r--r--lib/iov_iter.c (renamed from mm/iov_iter.c)15
-rw-r--r--lib/seq_buf.c4
-rw-r--r--mm/Makefile2
-rw-r--r--mm/cma.c12
-rw-r--r--mm/huge_memory.c11
-rw-r--r--mm/hugetlb.c4
-rw-r--r--mm/kasan/kasan.c14
-rw-r--r--mm/memcontrol.c4
-rw-r--r--mm/memory.c7
-rw-r--r--mm/mlock.c4
-rw-r--r--mm/nommu.c1
-rw-r--r--mm/page_alloc.c3
-rw-r--r--mm/vmalloc.c1
-rw-r--r--net/can/af_can.c3
-rw-r--r--net/ipv4/ip_fragment.c11
-rw-r--r--net/ipv4/ip_sockglue.c33
-rw-r--r--net/ipv4/ping.c12
-rw-r--r--net/ipv4/tcp.c10
-rw-r--r--net/ipv6/datagram.c39
-rw-r--r--net/ipv6/ping.c5
-rw-r--r--net/netfilter/ipvs/ip_vs_sync.c3
-rw-r--r--net/netfilter/nf_tables_api.c61
-rw-r--r--net/netfilter/nft_compat.c14
-rw-r--r--net/packet/af_packet.c22
-rw-r--r--net/rxrpc/ar-error.c4
-rw-r--r--net/tipc/link.c7
-rw-r--r--sound/core/control.c4
-rw-r--r--sound/firewire/dice/dice-interface.h18
-rw-r--r--sound/firewire/dice/dice-proc.c4
-rw-r--r--sound/firewire/iso-resources.c3
-rw-r--r--sound/pci/hda/hda_controller.c2
-rw-r--r--sound/pci/hda/hda_generic.c30
-rw-r--r--sound/pci/hda/patch_cirrus.c2
-rw-r--r--sound/pci/hda/patch_conexant.c11
-rw-r--r--sound/ppc/pmac.c58
-rw-r--r--sound/soc/fsl/fsl_spdif.c4
-rw-r--r--sound/soc/kirkwood/kirkwood-i2s.c2
-rw-r--r--sound/usb/quirks-table.h30
-rw-r--r--tools/power/cpupower/Makefile2
-rw-r--r--tools/testing/selftests/exec/execveat.c10
-rw-r--r--tools/testing/selftests/powerpc/Makefile12
-rw-r--r--tools/testing/selftests/powerpc/copyloops/Makefile1
-rw-r--r--tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h33
-rw-r--r--tools/testing/selftests/powerpc/harness.c47
-rw-r--r--tools/testing/selftests/powerpc/pmu/lib.c47
-rw-r--r--tools/testing/selftests/powerpc/pmu/lib.h1
-rw-r--r--tools/testing/selftests/powerpc/switch_endian/.gitignore2
-rw-r--r--tools/testing/selftests/powerpc/switch_endian/Makefile24
-rw-r--r--tools/testing/selftests/powerpc/switch_endian/check.S100
-rw-r--r--tools/testing/selftests/powerpc/switch_endian/common.h6
-rw-r--r--tools/testing/selftests/powerpc/switch_endian/switch_endian_test.S81
-rw-r--r--tools/testing/selftests/powerpc/tm/.gitignore1
-rw-r--r--tools/testing/selftests/powerpc/tm/Makefile5
-rw-r--r--tools/testing/selftests/powerpc/tm/tm-syscall-asm.S27
-rw-r--r--tools/testing/selftests/powerpc/tm/tm-syscall.c121
-rw-r--r--tools/testing/selftests/powerpc/utils.h3
-rw-r--r--tools/testing/selftests/powerpc/vphn/.gitignore1
-rw-r--r--tools/testing/selftests/powerpc/vphn/Makefile15
-rw-r--r--tools/testing/selftests/powerpc/vphn/test-vphn.c410
l---------tools/testing/selftests/powerpc/vphn/vphn.c1
l---------tools/testing/selftests/powerpc/vphn/vphn.h1
535 files changed, 8417 insertions, 9471 deletions
diff --git a/Documentation/ABI/testing/sysfs-class-cxl b/Documentation/ABI/testing/sysfs-class-cxl
index 3680364b4048..d46bba801aac 100644
--- a/Documentation/ABI/testing/sysfs-class-cxl
+++ b/Documentation/ABI/testing/sysfs-class-cxl
@@ -100,7 +100,7 @@ Description: read only
100 Hexadecimal value of the device ID found in this AFU 100 Hexadecimal value of the device ID found in this AFU
101 configuration record. 101 configuration record.
102 102
103What: /sys/class/cxl/<afu>/cr<config num>/vendor 103What: /sys/class/cxl/<afu>/cr<config num>/class
104Date: February 2015 104Date: February 2015
105Contact: linuxppc-dev@lists.ozlabs.org 105Contact: linuxppc-dev@lists.ozlabs.org
106Description: read only 106Description: read only
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index f4445e5a2bbb..1e097037349c 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,8 @@ Optional Properties:
22 - pclkN, clkN: Pairs of parent of input clock and input clock to the 22 - pclkN, clkN: Pairs of parent of input clock and input clock to the
23 devices in this power domain. Maximum of 4 pairs (N = 0 to 3) 23 devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
24 are supported currently. 24 are supported currently.
25- power-domains: phandle pointing to the parent power domain, for more details
26 see Documentation/devicetree/bindings/power/power_domain.txt
25 27
26Node of a device using power domains must have a power-domains property 28Node of a device using power domains must have a power-domains property
27defined with a phandle to respective power domain. 29defined with a phandle to respective power domain.
diff --git a/Documentation/devicetree/bindings/arm/sti.txt b/Documentation/devicetree/bindings/arm/sti.txt
index d70ec358736c..8d27f6b084c7 100644
--- a/Documentation/devicetree/bindings/arm/sti.txt
+++ b/Documentation/devicetree/bindings/arm/sti.txt
@@ -13,6 +13,10 @@ Boards with the ST STiH407 SoC shall have the following properties:
13Required root node property: 13Required root node property:
14compatible = "st,stih407"; 14compatible = "st,stih407";
15 15
16Boards with the ST STiH410 SoC shall have the following properties:
17Required root node property:
18compatible = "st,stih410";
19
16Boards with the ST STiH418 SoC shall have the following properties: 20Boards with the ST STiH418 SoC shall have the following properties:
17Required root node property: 21Required root node property:
18compatible = "st,stih418"; 22compatible = "st,stih418";
diff --git a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt b/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
index cfcc52705ed8..6151999c5dca 100644
--- a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
+++ b/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
@@ -4,7 +4,10 @@ Ethernet nodes are defined to describe on-chip ethernet interfaces in
4APM X-Gene SoC. 4APM X-Gene SoC.
5 5
6Required properties for all the ethernet interfaces: 6Required properties for all the ethernet interfaces:
7- compatible: Should be "apm,xgene-enet" 7- compatible: Should state binding information from the following list,
8 - "apm,xgene-enet": RGMII based 1G interface
9 - "apm,xgene1-sgenet": SGMII based 1G interface
10 - "apm,xgene1-xgenet": XFI based 10G interface
8- reg: Address and length of the register set for the device. It contains the 11- reg: Address and length of the register set for the device. It contains the
9 information of registers in the same order as described by reg-names 12 information of registers in the same order as described by reg-names
10- reg-names: Should contain the register set names 13- reg-names: Should contain the register set names
diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt
index 98c16672ab5f..0f8ed3710c66 100644
--- a/Documentation/devicetree/bindings/power/power_domain.txt
+++ b/Documentation/devicetree/bindings/power/power_domain.txt
@@ -19,6 +19,16 @@ Required properties:
19 providing multiple PM domains (e.g. power controllers), but can be any value 19 providing multiple PM domains (e.g. power controllers), but can be any value
20 as specified by device tree binding documentation of particular provider. 20 as specified by device tree binding documentation of particular provider.
21 21
22Optional properties:
23 - power-domains : A phandle and PM domain specifier as defined by bindings of
24 the power controller specified by phandle.
25 Some power domains might be powered from another power domain (or have
26 other hardware specific dependencies). For representing such dependency
27 a standard PM domain consumer binding is used. When provided, all domains
28 created by the given provider should be subdomains of the domain
29 specified by this binding. More details about power domain specifier are
30 available in the next section.
31
22Example: 32Example:
23 33
24 power: power-controller@12340000 { 34 power: power-controller@12340000 {
@@ -30,6 +40,25 @@ Example:
30The node above defines a power controller that is a PM domain provider and 40The node above defines a power controller that is a PM domain provider and
31expects one cell as its phandle argument. 41expects one cell as its phandle argument.
32 42
43Example 2:
44
45 parent: power-controller@12340000 {
46 compatible = "foo,power-controller";
47 reg = <0x12340000 0x1000>;
48 #power-domain-cells = <1>;
49 };
50
51 child: power-controller@12340000 {
52 compatible = "foo,power-controller";
53 reg = <0x12341000 0x1000>;
54 power-domains = <&parent 0>;
55 #power-domain-cells = <1>;
56 };
57
58The nodes above define two power controllers: 'parent' and 'child'.
59Domains created by the 'child' power controller are subdomains of '0' power
60domain provided by the 'parent' power controller.
61
33==PM domain consumers== 62==PM domain consumers==
34 63
35Required properties: 64Required properties:
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/8250.txt
index 91d5ab0e60fc..91d5ab0e60fc 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/8250.txt
diff --git a/Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt b/Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt
new file mode 100644
index 000000000000..ebcbb62c0a76
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt
@@ -0,0 +1,19 @@
1ETRAX FS UART
2
3Required properties:
4- compatible : "axis,etraxfs-uart"
5- reg: offset and length of the register set for the device.
6- interrupts: device interrupt
7
8Optional properties:
9- {dtr,dsr,ri,cd}-gpios: specify a GPIO for DTR/DSR/RI/CD
10 line respectively.
11
12Example:
13
14serial@b00260000 {
15 compatible = "axis,etraxfs-uart";
16 reg = <0xb0026000 0x1000>;
17 interrupts = <68>;
18 status = "disabled";
19};
diff --git a/Documentation/devicetree/bindings/submitting-patches.txt b/Documentation/devicetree/bindings/submitting-patches.txt
index 56742bc70218..7d44eae7ab0b 100644
--- a/Documentation/devicetree/bindings/submitting-patches.txt
+++ b/Documentation/devicetree/bindings/submitting-patches.txt
@@ -12,6 +12,9 @@ I. For patch submitters
12 12
13 devicetree@vger.kernel.org 13 devicetree@vger.kernel.org
14 14
15 and Cc: the DT maintainers. Use scripts/get_maintainer.pl to identify
16 all of the DT maintainers.
17
15 3) The Documentation/ portion of the patch should come in the series before 18 3) The Documentation/ portion of the patch should come in the series before
16 the code implementing the binding. 19 the code implementing the binding.
17 20
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 389ca1347a77..fae26d014aaf 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -20,6 +20,7 @@ amlogic Amlogic, Inc.
20ams AMS AG 20ams AMS AG
21amstaos AMS-Taos Inc. 21amstaos AMS-Taos Inc.
22apm Applied Micro Circuits Corporation (APM) 22apm Applied Micro Circuits Corporation (APM)
23arasan Arasan Chip Systems
23arm ARM Ltd. 24arm ARM Ltd.
24armadeus ARMadeus Systems SARL 25armadeus ARMadeus Systems SARL
25asahi-kasei Asahi Kasei Corp. 26asahi-kasei Asahi Kasei Corp.
@@ -27,6 +28,7 @@ atmel Atmel Corporation
27auo AU Optronics Corporation 28auo AU Optronics Corporation
28avago Avago Technologies 29avago Avago Technologies
29avic Shanghai AVIC Optoelectronics Co., Ltd. 30avic Shanghai AVIC Optoelectronics Co., Ltd.
31axis Axis Communications AB
30bosch Bosch Sensortec GmbH 32bosch Bosch Sensortec GmbH
31brcm Broadcom Corporation 33brcm Broadcom Corporation
32buffalo Buffalo, Inc. 34buffalo Buffalo, Inc.
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index f90e294d7631..a4d869744f59 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -26,6 +26,11 @@ Optional properties:
26- atmel,disable : Should be present if you want to disable the watchdog. 26- atmel,disable : Should be present if you want to disable the watchdog.
27- atmel,idle-halt : Should be present if you want to stop the watchdog when 27- atmel,idle-halt : Should be present if you want to stop the watchdog when
28 entering idle state. 28 entering idle state.
29 CAUTION: This property should be used with care, it actually makes the
30 watchdog not counting when the CPU is in idle state, therefore the
31 watchdog reset time depends on mean CPU usage and will not reset at all
32 if the CPU stop working while it is in idle state, which is probably
33 not what you want.
29- atmel,dbg-halt : Should be present if you want to stop the watchdog when 34- atmel,dbg-halt : Should be present if you want to stop the watchdog when
30 entering debug state. 35 entering debug state.
31 36
diff --git a/Documentation/powerpc/transactional_memory.txt b/Documentation/powerpc/transactional_memory.txt
index 9791e98ab49c..ba0a2a4a54ba 100644
--- a/Documentation/powerpc/transactional_memory.txt
+++ b/Documentation/powerpc/transactional_memory.txt
@@ -74,22 +74,23 @@ Causes of transaction aborts
74Syscalls 74Syscalls
75======== 75========
76 76
77Performing syscalls from within transaction is not recommended, and can lead 77Syscalls made from within an active transaction will not be performed and the
78to unpredictable results. 78transaction will be doomed by the kernel with the failure code TM_CAUSE_SYSCALL
79| TM_CAUSE_PERSISTENT.
79 80
80Syscalls do not by design abort transactions, but beware: The kernel code will 81Syscalls made from within a suspended transaction are performed as normal and
81not be running in transactional state. The effect of syscalls will always 82the transaction is not explicitly doomed by the kernel. However, what the
82remain visible, but depending on the call they may abort your transaction as a 83kernel does to perform the syscall may result in the transaction being doomed
83side-effect, read soon-to-be-aborted transactional data that should not remain 84by the hardware. The syscall is performed in suspended mode so any side
84invisible, etc. If you constantly retry a transaction that constantly aborts 85effects will be persistent, independent of transaction success or failure. No
85itself by calling a syscall, you'll have a livelock & make no progress. 86guarantees are provided by the kernel about which syscalls will affect
87transaction success.
86 88
87Simple syscalls (e.g. sigprocmask()) "could" be OK. Even things like write() 89Care must be taken when relying on syscalls to abort during active transactions
88from, say, printf() should be OK as long as the kernel does not access any 90if the calls are made via a library. Libraries may cache values (which may
89memory that was accessed transactionally. 91give the appearance of success) or perform operations that cause transaction
90 92failure before entering the kernel (which may produce different failure codes).
91Consider any syscalls that happen to work as debug-only -- not recommended for 93Examples are glibc's getpid() and lazy symbol resolution.
92production use. Best to queue them up till after the transaction is over.
93 94
94 95
95Signals 96Signals
@@ -174,10 +175,9 @@ These are defined in <asm/reg.h>, and distinguish different reasons why the
174kernel aborted a transaction: 175kernel aborted a transaction:
175 176
176 TM_CAUSE_RESCHED Thread was rescheduled. 177 TM_CAUSE_RESCHED Thread was rescheduled.
177 TM_CAUSE_TLBI Software TLB invalide. 178 TM_CAUSE_TLBI Software TLB invalid.
178 TM_CAUSE_FAC_UNAV FP/VEC/VSX unavailable trap. 179 TM_CAUSE_FAC_UNAV FP/VEC/VSX unavailable trap.
179 TM_CAUSE_SYSCALL Currently unused; future syscalls that must abort 180 TM_CAUSE_SYSCALL Syscall from active transaction.
180 transactions for consistency will use this.
181 TM_CAUSE_SIGNAL Signal delivered. 181 TM_CAUSE_SIGNAL Signal delivered.
182 TM_CAUSE_MISC Currently unused. 182 TM_CAUSE_MISC Currently unused.
183 TM_CAUSE_ALIGNMENT Alignment fault. 183 TM_CAUSE_ALIGNMENT Alignment fault.
@@ -185,7 +185,7 @@ kernel aborted a transaction:
185 185
186These can be checked by the user program's abort handler as TEXASR[0:7]. If 186These can be checked by the user program's abort handler as TEXASR[0:7]. If
187bit 7 is set, it indicates that the error is consider persistent. For example 187bit 7 is set, it indicates that the error is consider persistent. For example
188a TM_CAUSE_ALIGNMENT will be persistent while a TM_CAUSE_RESCHED will not.q 188a TM_CAUSE_ALIGNMENT will be persistent while a TM_CAUSE_RESCHED will not.
189 189
190GDB 190GDB
191=== 191===
diff --git a/MAINTAINERS b/MAINTAINERS
index 6239a305dff0..0e1abe8cc684 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1030,6 +1030,16 @@ F: arch/arm/mach-mxs/
1030F: arch/arm/boot/dts/imx* 1030F: arch/arm/boot/dts/imx*
1031F: arch/arm/configs/imx*_defconfig 1031F: arch/arm/configs/imx*_defconfig
1032 1032
1033ARM/FREESCALE VYBRID ARM ARCHITECTURE
1034M: Shawn Guo <shawn.guo@linaro.org>
1035M: Sascha Hauer <kernel@pengutronix.de>
1036R: Stefan Agner <stefan@agner.ch>
1037L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1038S: Maintained
1039T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
1040F: arch/arm/mach-imx/*vf610*
1041F: arch/arm/boot/dts/vf*
1042
1033ARM/GLOMATION GESBC9312SX MACHINE SUPPORT 1043ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
1034M: Lennert Buytenhek <kernel@wantstofly.org> 1044M: Lennert Buytenhek <kernel@wantstofly.org>
1035L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1045L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1188,6 +1198,7 @@ ARM/Marvell Dove/MV78xx0/Orion SOC support
1188M: Jason Cooper <jason@lakedaemon.net> 1198M: Jason Cooper <jason@lakedaemon.net>
1189M: Andrew Lunn <andrew@lunn.ch> 1199M: Andrew Lunn <andrew@lunn.ch>
1190M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 1200M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
1201M: Gregory Clement <gregory.clement@free-electrons.com>
1191L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1202L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1192S: Maintained 1203S: Maintained
1193F: arch/arm/mach-dove/ 1204F: arch/arm/mach-dove/
@@ -2107,7 +2118,6 @@ F: drivers/net/ethernet/broadcom/bnx2x/
2107 2118
2108BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE 2119BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE
2109M: Christian Daudt <bcm@fixthebug.org> 2120M: Christian Daudt <bcm@fixthebug.org>
2110M: Matt Porter <mporter@linaro.org>
2111M: Florian Fainelli <f.fainelli@gmail.com> 2121M: Florian Fainelli <f.fainelli@gmail.com>
2112L: bcm-kernel-feedback-list@broadcom.com 2122L: bcm-kernel-feedback-list@broadcom.com
2113T: git git://github.com/broadcom/mach-bcm 2123T: git git://github.com/broadcom/mach-bcm
@@ -2369,8 +2379,9 @@ F: arch/x86/include/asm/tce.h
2369 2379
2370CAN NETWORK LAYER 2380CAN NETWORK LAYER
2371M: Oliver Hartkopp <socketcan@hartkopp.net> 2381M: Oliver Hartkopp <socketcan@hartkopp.net>
2382M: Marc Kleine-Budde <mkl@pengutronix.de>
2372L: linux-can@vger.kernel.org 2383L: linux-can@vger.kernel.org
2373W: http://gitorious.org/linux-can 2384W: https://github.com/linux-can
2374T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git 2385T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
2375T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git 2386T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
2376S: Maintained 2387S: Maintained
@@ -2386,7 +2397,7 @@ CAN NETWORK DRIVERS
2386M: Wolfgang Grandegger <wg@grandegger.com> 2397M: Wolfgang Grandegger <wg@grandegger.com>
2387M: Marc Kleine-Budde <mkl@pengutronix.de> 2398M: Marc Kleine-Budde <mkl@pengutronix.de>
2388L: linux-can@vger.kernel.org 2399L: linux-can@vger.kernel.org
2389W: http://gitorious.org/linux-can 2400W: https://github.com/linux-can
2390T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git 2401T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
2391T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git 2402T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
2392S: Maintained 2403S: Maintained
diff --git a/Makefile b/Makefile
index 1100ff3c77e3..e734965b1604 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
1VERSION = 4 1VERSION = 4
2PATCHLEVEL = 0 2PATCHLEVEL = 0
3SUBLEVEL = 0 3SUBLEVEL = 0
4EXTRAVERSION = -rc3 4EXTRAVERSION = -rc4
5NAME = Hurr durr I'ma sheep 5NAME = Hurr durr I'ma sheep
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
diff --git a/arch/Kconfig b/arch/Kconfig
index 05d7a8a458d5..0cc605daa449 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -32,7 +32,7 @@ config HAVE_OPROFILE
32 32
33config OPROFILE_NMI_TIMER 33config OPROFILE_NMI_TIMER
34 def_bool y 34 def_bool y
35 depends on PERF_EVENTS && HAVE_PERF_EVENTS_NMI 35 depends on PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !PPC64
36 36
37config KPROBES 37config KPROBES
38 bool "Kprobes" 38 bool "Kprobes"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 7f99cd652203..eb7bb511f853 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -150,6 +150,7 @@ machine-$(CONFIG_ARCH_BERLIN) += berlin
150machine-$(CONFIG_ARCH_CLPS711X) += clps711x 150machine-$(CONFIG_ARCH_CLPS711X) += clps711x
151machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx 151machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
152machine-$(CONFIG_ARCH_DAVINCI) += davinci 152machine-$(CONFIG_ARCH_DAVINCI) += davinci
153machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
153machine-$(CONFIG_ARCH_DOVE) += dove 154machine-$(CONFIG_ARCH_DOVE) += dove
154machine-$(CONFIG_ARCH_EBSA110) += ebsa110 155machine-$(CONFIG_ARCH_EBSA110) += ebsa110
155machine-$(CONFIG_ARCH_EFM32) += efm32 156machine-$(CONFIG_ARCH_EFM32) += efm32
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 2c6248d9a9ef..c3255e0c90aa 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -301,3 +301,11 @@
301 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 301 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
302 cd-inverted; 302 cd-inverted;
303}; 303};
304
305&aes {
306 status = "okay";
307};
308
309&sham {
310 status = "okay";
311};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 83d40f7655e5..6b8493720424 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -24,11 +24,3 @@
24&mmc1 { 24&mmc1 {
25 vmmc-supply = <&ldo3_reg>; 25 vmmc-supply = <&ldo3_reg>;
26}; 26};
27
28&sham {
29 status = "okay";
30};
31
32&aes {
33 status = "okay";
34};
diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts
index 7266a00aab2e..5c5667a3624d 100644
--- a/arch/arm/boot/dts/am335x-lxm.dts
+++ b/arch/arm/boot/dts/am335x-lxm.dts
@@ -328,6 +328,10 @@
328 dual_emac_res_vlan = <3>; 328 dual_emac_res_vlan = <3>;
329}; 329};
330 330
331&phy_sel {
332 rmii-clock-ext;
333};
334
331&mac { 335&mac {
332 pinctrl-names = "default", "sleep"; 336 pinctrl-names = "default", "sleep";
333 pinctrl-0 = <&cpsw_default>; 337 pinctrl-0 = <&cpsw_default>;
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 712edce7d6fb..071b56aa0c7e 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -99,7 +99,7 @@
99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 { 99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
100 #clock-cells = <0>; 100 #clock-cells = <0>;
101 compatible = "ti,gate-clock"; 101 compatible = "ti,gate-clock";
102 clocks = <&dpll_per_m2_ck>; 102 clocks = <&l4ls_gclk>;
103 ti,bit-shift = <0>; 103 ti,bit-shift = <0>;
104 reg = <0x0664>; 104 reg = <0x0664>;
105 }; 105 };
@@ -107,7 +107,7 @@
107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 { 107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
108 #clock-cells = <0>; 108 #clock-cells = <0>;
109 compatible = "ti,gate-clock"; 109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>; 110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <1>; 111 ti,bit-shift = <1>;
112 reg = <0x0664>; 112 reg = <0x0664>;
113 }; 113 };
@@ -115,7 +115,7 @@
115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 { 115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
116 #clock-cells = <0>; 116 #clock-cells = <0>;
117 compatible = "ti,gate-clock"; 117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>; 118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <2>; 119 ti,bit-shift = <2>;
120 reg = <0x0664>; 120 reg = <0x0664>;
121 }; 121 };
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index c7dc9dab93a4..cfb49686ab6a 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -107,7 +107,7 @@
107 ehrpwm0_tbclk: ehrpwm0_tbclk { 107 ehrpwm0_tbclk: ehrpwm0_tbclk {
108 #clock-cells = <0>; 108 #clock-cells = <0>;
109 compatible = "ti,gate-clock"; 109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>; 110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <0>; 111 ti,bit-shift = <0>;
112 reg = <0x0664>; 112 reg = <0x0664>;
113 }; 113 };
@@ -115,7 +115,7 @@
115 ehrpwm1_tbclk: ehrpwm1_tbclk { 115 ehrpwm1_tbclk: ehrpwm1_tbclk {
116 #clock-cells = <0>; 116 #clock-cells = <0>;
117 compatible = "ti,gate-clock"; 117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>; 118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <1>; 119 ti,bit-shift = <1>;
120 reg = <0x0664>; 120 reg = <0x0664>;
121 }; 121 };
@@ -123,7 +123,7 @@
123 ehrpwm2_tbclk: ehrpwm2_tbclk { 123 ehrpwm2_tbclk: ehrpwm2_tbclk {
124 #clock-cells = <0>; 124 #clock-cells = <0>;
125 compatible = "ti,gate-clock"; 125 compatible = "ti,gate-clock";
126 clocks = <&dpll_per_m2_ck>; 126 clocks = <&l4ls_gclk>;
127 ti,bit-shift = <2>; 127 ti,bit-shift = <2>;
128 reg = <0x0664>; 128 reg = <0x0664>;
129 }; 129 };
@@ -131,7 +131,7 @@
131 ehrpwm3_tbclk: ehrpwm3_tbclk { 131 ehrpwm3_tbclk: ehrpwm3_tbclk {
132 #clock-cells = <0>; 132 #clock-cells = <0>;
133 compatible = "ti,gate-clock"; 133 compatible = "ti,gate-clock";
134 clocks = <&dpll_per_m2_ck>; 134 clocks = <&l4ls_gclk>;
135 ti,bit-shift = <4>; 135 ti,bit-shift = <4>;
136 reg = <0x0664>; 136 reg = <0x0664>;
137 }; 137 };
@@ -139,7 +139,7 @@
139 ehrpwm4_tbclk: ehrpwm4_tbclk { 139 ehrpwm4_tbclk: ehrpwm4_tbclk {
140 #clock-cells = <0>; 140 #clock-cells = <0>;
141 compatible = "ti,gate-clock"; 141 compatible = "ti,gate-clock";
142 clocks = <&dpll_per_m2_ck>; 142 clocks = <&l4ls_gclk>;
143 ti,bit-shift = <5>; 143 ti,bit-shift = <5>;
144 reg = <0x0664>; 144 reg = <0x0664>;
145 }; 145 };
@@ -147,7 +147,7 @@
147 ehrpwm5_tbclk: ehrpwm5_tbclk { 147 ehrpwm5_tbclk: ehrpwm5_tbclk {
148 #clock-cells = <0>; 148 #clock-cells = <0>;
149 compatible = "ti,gate-clock"; 149 compatible = "ti,gate-clock";
150 clocks = <&dpll_per_m2_ck>; 150 clocks = <&l4ls_gclk>;
151 ti,bit-shift = <6>; 151 ti,bit-shift = <6>;
152 reg = <0x0664>; 152 reg = <0x0664>;
153 }; 153 };
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index fff0ee69aab4..e7f0a4ae271c 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -494,12 +494,12 @@
494 494
495 pinctrl_usart3_rts: usart3_rts-0 { 495 pinctrl_usart3_rts: usart3_rts-0 {
496 atmel,pins = 496 atmel,pins =
497 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ 497 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
498 }; 498 };
499 499
500 pinctrl_usart3_cts: usart3_cts-0 { 500 pinctrl_usart3_cts: usart3_cts-0 {
501 atmel,pins = 501 atmel,pins =
502 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ 502 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 }; 503 };
504 }; 504 };
505 505
@@ -853,7 +853,7 @@
853 }; 853 };
854 854
855 usb1: gadget@fffa4000 { 855 usb1: gadget@fffa4000 {
856 compatible = "atmel,at91rm9200-udc"; 856 compatible = "atmel,at91sam9260-udc";
857 reg = <0xfffa4000 0x4000>; 857 reg = <0xfffa4000 0x4000>;
858 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 858 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
859 clocks = <&udc_clk>, <&udpck>; 859 clocks = <&udc_clk>, <&udpck>;
@@ -976,7 +976,6 @@
976 atmel,watchdog-type = "hardware"; 976 atmel,watchdog-type = "hardware";
977 atmel,reset-type = "all"; 977 atmel,reset-type = "all";
978 atmel,dbg-halt; 978 atmel,dbg-halt;
979 atmel,idle-halt;
980 status = "disabled"; 979 status = "disabled";
981 }; 980 };
982 981
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e247b0b5fdab..d55fdf2487ef 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -124,11 +124,12 @@
124 }; 124 };
125 125
126 usb1: gadget@fffa4000 { 126 usb1: gadget@fffa4000 {
127 compatible = "atmel,at91rm9200-udc"; 127 compatible = "atmel,at91sam9261-udc";
128 reg = <0xfffa4000 0x4000>; 128 reg = <0xfffa4000 0x4000>;
129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
130 clocks = <&usb>, <&udc_clk>, <&udpck>; 130 clocks = <&udc_clk>, <&udpck>;
131 clock-names = "usb_clk", "udc_clk", "udpck"; 131 clock-names = "pclk", "hclk";
132 atmel,matrix = <&matrix>;
132 status = "disabled"; 133 status = "disabled";
133 }; 134 };
134 135
@@ -262,7 +263,7 @@
262 }; 263 };
263 264
264 matrix: matrix@ffffee00 { 265 matrix: matrix@ffffee00 {
265 compatible = "atmel,at91sam9260-bus-matrix"; 266 compatible = "atmel,at91sam9260-bus-matrix", "syscon";
266 reg = <0xffffee00 0x200>; 267 reg = <0xffffee00 0x200>;
267 }; 268 };
268 269
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1f67bb4c144e..fce301c4e9d6 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -69,7 +69,7 @@
69 69
70 sram1: sram@00500000 { 70 sram1: sram@00500000 {
71 compatible = "mmio-sram"; 71 compatible = "mmio-sram";
72 reg = <0x00300000 0x4000>; 72 reg = <0x00500000 0x4000>;
73 }; 73 };
74 74
75 ahb { 75 ahb {
@@ -856,7 +856,7 @@
856 }; 856 };
857 857
858 usb1: gadget@fff78000 { 858 usb1: gadget@fff78000 {
859 compatible = "atmel,at91rm9200-udc"; 859 compatible = "atmel,at91sam9263-udc";
860 reg = <0xfff78000 0x4000>; 860 reg = <0xfff78000 0x4000>;
861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
862 clocks = <&udc_clk>, <&udpck>; 862 clocks = <&udc_clk>, <&udpck>;
@@ -905,7 +905,6 @@
905 atmel,watchdog-type = "hardware"; 905 atmel,watchdog-type = "hardware";
906 atmel,reset-type = "all"; 906 atmel,reset-type = "all";
907 atmel,dbg-halt; 907 atmel,dbg-halt;
908 atmel,idle-halt;
909 status = "disabled"; 908 status = "disabled";
910 }; 909 };
911 910
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ee80aa9c0759..488af63d5174 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -1116,7 +1116,6 @@
1116 atmel,watchdog-type = "hardware"; 1116 atmel,watchdog-type = "hardware";
1117 atmel,reset-type = "all"; 1117 atmel,reset-type = "all";
1118 atmel,dbg-halt; 1118 atmel,dbg-halt;
1119 atmel,idle-halt;
1120 status = "disabled"; 1119 status = "disabled";
1121 }; 1120 };
1122 1121
@@ -1301,7 +1300,7 @@
1301 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1300 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1302 reg = <0x00800000 0x100000>; 1301 reg = <0x00800000 0x100000>;
1303 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1302 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1304 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1303 clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1305 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck"; 1304 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1306 status = "disabled"; 1305 status = "disabled";
1307 }; 1306 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7cb5b1..0c53a375ba99 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -894,7 +894,6 @@
894 atmel,watchdog-type = "hardware"; 894 atmel,watchdog-type = "hardware";
895 atmel,reset-type = "all"; 895 atmel,reset-type = "all";
896 atmel,dbg-halt; 896 atmel,dbg-halt;
897 atmel,idle-halt;
898 status = "disabled"; 897 status = "disabled";
899 }; 898 };
900 899
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 818dabdd8c0e..d221179d0f1a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -1066,7 +1066,7 @@
1066 reg = <0x00500000 0x80000 1066 reg = <0x00500000 0x80000
1067 0xf803c000 0x400>; 1067 0xf803c000 0x400>;
1068 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; 1068 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1069 clocks = <&usb>, <&udphs_clk>; 1069 clocks = <&utmi>, <&udphs_clk>;
1070 clock-names = "hclk", "pclk"; 1070 clock-names = "hclk", "pclk";
1071 status = "disabled"; 1071 status = "disabled";
1072 1072
@@ -1130,7 +1130,6 @@
1130 atmel,watchdog-type = "hardware"; 1130 atmel,watchdog-type = "hardware";
1131 atmel,reset-type = "all"; 1131 atmel,reset-type = "all";
1132 atmel,dbg-halt; 1132 atmel,dbg-halt;
1133 atmel,idle-halt;
1134 status = "disabled"; 1133 status = "disabled";
1135 }; 1134 };
1136 1135
@@ -1186,7 +1185,7 @@
1186 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1185 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1187 reg = <0x00700000 0x100000>; 1186 reg = <0x00700000 0x100000>;
1188 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1187 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1189 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 1188 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1190 clock-names = "usb_clk", "ehci_clk", "uhpck"; 1189 clock-names = "usb_clk", "ehci_clk", "uhpck";
1191 status = "disabled"; 1190 status = "disabled";
1192 }; 1191 };
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 3290a96ba586..7563d7ce01bb 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -263,17 +263,15 @@
263 263
264 dcan1_pins_default: dcan1_pins_default { 264 dcan1_pins_default: dcan1_pins_default {
265 pinctrl-single,pins = < 265 pinctrl-single,pins = <
266 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ 266 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
267 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 267 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
268 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
269 >; 268 >;
270 }; 269 };
271 270
272 dcan1_pins_sleep: dcan1_pins_sleep { 271 dcan1_pins_sleep: dcan1_pins_sleep {
273 pinctrl-single,pins = < 272 pinctrl-single,pins = <
274 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ 273 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
275 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 274 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
276 0x418 (MUX_MODE15) /* wakeup0.off */
277 >; 275 >;
278 }; 276 };
279}; 277};
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index e0264d0bf7b9..40ed539ce474 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -119,17 +119,15 @@
119 119
120 dcan1_pins_default: dcan1_pins_default { 120 dcan1_pins_default: dcan1_pins_default {
121 pinctrl-single,pins = < 121 pinctrl-single,pins = <
122 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ 122 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
123 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 123 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
124 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
125 >; 124 >;
126 }; 125 };
127 126
128 dcan1_pins_sleep: dcan1_pins_sleep { 127 dcan1_pins_sleep: dcan1_pins_sleep {
129 pinctrl-single,pins = < 128 pinctrl-single,pins = <
130 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ 129 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
131 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 130 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
132 0x418 (MUX_MODE15) /* wakeup0.off */
133 >; 131 >;
134 }; 132 };
135 133
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 4bdcbd61ce47..99b09a44e269 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -243,10 +243,18 @@
243 ti,invert-autoidle-bit; 243 ti,invert-autoidle-bit;
244 }; 244 };
245 245
246 dpll_core_byp_mux: dpll_core_byp_mux {
247 #clock-cells = <0>;
248 compatible = "ti,mux-clock";
249 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
250 ti,bit-shift = <23>;
251 reg = <0x012c>;
252 };
253
246 dpll_core_ck: dpll_core_ck { 254 dpll_core_ck: dpll_core_ck {
247 #clock-cells = <0>; 255 #clock-cells = <0>;
248 compatible = "ti,omap4-dpll-core-clock"; 256 compatible = "ti,omap4-dpll-core-clock";
249 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 257 clocks = <&sys_clkin1>, <&dpll_core_byp_mux>;
250 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 258 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
251 }; 259 };
252 260
@@ -309,10 +317,18 @@
309 clock-div = <1>; 317 clock-div = <1>;
310 }; 318 };
311 319
320 dpll_dsp_byp_mux: dpll_dsp_byp_mux {
321 #clock-cells = <0>;
322 compatible = "ti,mux-clock";
323 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
324 ti,bit-shift = <23>;
325 reg = <0x0240>;
326 };
327
312 dpll_dsp_ck: dpll_dsp_ck { 328 dpll_dsp_ck: dpll_dsp_ck {
313 #clock-cells = <0>; 329 #clock-cells = <0>;
314 compatible = "ti,omap4-dpll-clock"; 330 compatible = "ti,omap4-dpll-clock";
315 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>; 331 clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
316 reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>; 332 reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
317 }; 333 };
318 334
@@ -335,10 +351,18 @@
335 clock-div = <1>; 351 clock-div = <1>;
336 }; 352 };
337 353
354 dpll_iva_byp_mux: dpll_iva_byp_mux {
355 #clock-cells = <0>;
356 compatible = "ti,mux-clock";
357 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
358 ti,bit-shift = <23>;
359 reg = <0x01ac>;
360 };
361
338 dpll_iva_ck: dpll_iva_ck { 362 dpll_iva_ck: dpll_iva_ck {
339 #clock-cells = <0>; 363 #clock-cells = <0>;
340 compatible = "ti,omap4-dpll-clock"; 364 compatible = "ti,omap4-dpll-clock";
341 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>; 365 clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
342 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 366 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
343 }; 367 };
344 368
@@ -361,10 +385,18 @@
361 clock-div = <1>; 385 clock-div = <1>;
362 }; 386 };
363 387
388 dpll_gpu_byp_mux: dpll_gpu_byp_mux {
389 #clock-cells = <0>;
390 compatible = "ti,mux-clock";
391 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
392 ti,bit-shift = <23>;
393 reg = <0x02e4>;
394 };
395
364 dpll_gpu_ck: dpll_gpu_ck { 396 dpll_gpu_ck: dpll_gpu_ck {
365 #clock-cells = <0>; 397 #clock-cells = <0>;
366 compatible = "ti,omap4-dpll-clock"; 398 compatible = "ti,omap4-dpll-clock";
367 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 399 clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
368 reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>; 400 reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;
369 }; 401 };
370 402
@@ -398,10 +430,18 @@
398 clock-div = <1>; 430 clock-div = <1>;
399 }; 431 };
400 432
433 dpll_ddr_byp_mux: dpll_ddr_byp_mux {
434 #clock-cells = <0>;
435 compatible = "ti,mux-clock";
436 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
437 ti,bit-shift = <23>;
438 reg = <0x021c>;
439 };
440
401 dpll_ddr_ck: dpll_ddr_ck { 441 dpll_ddr_ck: dpll_ddr_ck {
402 #clock-cells = <0>; 442 #clock-cells = <0>;
403 compatible = "ti,omap4-dpll-clock"; 443 compatible = "ti,omap4-dpll-clock";
404 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 444 clocks = <&sys_clkin1>, <&dpll_ddr_byp_mux>;
405 reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>; 445 reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>;
406 }; 446 };
407 447
@@ -416,10 +456,18 @@
416 ti,invert-autoidle-bit; 456 ti,invert-autoidle-bit;
417 }; 457 };
418 458
459 dpll_gmac_byp_mux: dpll_gmac_byp_mux {
460 #clock-cells = <0>;
461 compatible = "ti,mux-clock";
462 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
463 ti,bit-shift = <23>;
464 reg = <0x02b4>;
465 };
466
419 dpll_gmac_ck: dpll_gmac_ck { 467 dpll_gmac_ck: dpll_gmac_ck {
420 #clock-cells = <0>; 468 #clock-cells = <0>;
421 compatible = "ti,omap4-dpll-clock"; 469 compatible = "ti,omap4-dpll-clock";
422 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 470 clocks = <&sys_clkin1>, <&dpll_gmac_byp_mux>;
423 reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>; 471 reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>;
424 }; 472 };
425 473
@@ -482,10 +530,18 @@
482 clock-div = <1>; 530 clock-div = <1>;
483 }; 531 };
484 532
533 dpll_eve_byp_mux: dpll_eve_byp_mux {
534 #clock-cells = <0>;
535 compatible = "ti,mux-clock";
536 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
537 ti,bit-shift = <23>;
538 reg = <0x0290>;
539 };
540
485 dpll_eve_ck: dpll_eve_ck { 541 dpll_eve_ck: dpll_eve_ck {
486 #clock-cells = <0>; 542 #clock-cells = <0>;
487 compatible = "ti,omap4-dpll-clock"; 543 compatible = "ti,omap4-dpll-clock";
488 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>; 544 clocks = <&sys_clkin1>, <&dpll_eve_byp_mux>;
489 reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>; 545 reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>;
490 }; 546 };
491 547
@@ -1249,10 +1305,18 @@
1249 clock-div = <1>; 1305 clock-div = <1>;
1250 }; 1306 };
1251 1307
1308 dpll_per_byp_mux: dpll_per_byp_mux {
1309 #clock-cells = <0>;
1310 compatible = "ti,mux-clock";
1311 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
1312 ti,bit-shift = <23>;
1313 reg = <0x014c>;
1314 };
1315
1252 dpll_per_ck: dpll_per_ck { 1316 dpll_per_ck: dpll_per_ck {
1253 #clock-cells = <0>; 1317 #clock-cells = <0>;
1254 compatible = "ti,omap4-dpll-clock"; 1318 compatible = "ti,omap4-dpll-clock";
1255 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>; 1319 clocks = <&sys_clkin1>, <&dpll_per_byp_mux>;
1256 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 1320 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
1257 }; 1321 };
1258 1322
@@ -1275,10 +1339,18 @@
1275 clock-div = <1>; 1339 clock-div = <1>;
1276 }; 1340 };
1277 1341
1342 dpll_usb_byp_mux: dpll_usb_byp_mux {
1343 #clock-cells = <0>;
1344 compatible = "ti,mux-clock";
1345 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
1346 ti,bit-shift = <23>;
1347 reg = <0x018c>;
1348 };
1349
1278 dpll_usb_ck: dpll_usb_ck { 1350 dpll_usb_ck: dpll_usb_ck {
1279 #clock-cells = <0>; 1351 #clock-cells = <0>;
1280 compatible = "ti,omap4-dpll-j-type-clock"; 1352 compatible = "ti,omap4-dpll-j-type-clock";
1281 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>; 1353 clocks = <&sys_clkin1>, <&dpll_usb_byp_mux>;
1282 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 1354 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
1283 }; 1355 };
1284 1356
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 277b48b0b6f9..ac6b0ae42caf 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include "skeleton.dtsi" 20#include "skeleton.dtsi"
21#include "exynos4-cpu-thermal.dtsi"
21#include <dt-bindings/clock/exynos3250.h> 22#include <dt-bindings/clock/exynos3250.h>
22 23
23/ { 24/ {
@@ -193,6 +194,7 @@
193 interrupts = <0 216 0>; 194 interrupts = <0 216 0>;
194 clocks = <&cmu CLK_TMU_APBIF>; 195 clocks = <&cmu CLK_TMU_APBIF>;
195 clock-names = "tmu_apbif"; 196 clock-names = "tmu_apbif";
197 #include "exynos4412-tmu-sensor-conf.dtsi"
196 status = "disabled"; 198 status = "disabled";
197 }; 199 };
198 200
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000000000000..735cb2f10817
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
1/*
2 * Device tree sources for Exynos4 thermal zone
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal.h>
13
14/ {
15thermal-zones {
16 cpu_thermal: cpu-thermal {
17 thermal-sensors = <&tmu 0>;
18 polling-delay-passive = <0>;
19 polling-delay = <0>;
20 trips {
21 cpu_alert0: cpu-alert-0 {
22 temperature = <70000>; /* millicelsius */
23 hysteresis = <10000>; /* millicelsius */
24 type = "active";
25 };
26 cpu_alert1: cpu-alert-1 {
27 temperature = <95000>; /* millicelsius */
28 hysteresis = <10000>; /* millicelsius */
29 type = "active";
30 };
31 cpu_alert2: cpu-alert-2 {
32 temperature = <110000>; /* millicelsius */
33 hysteresis = <10000>; /* millicelsius */
34 type = "active";
35 };
36 cpu_crit0: cpu-crit-0 {
37 temperature = <120000>; /* millicelsius */
38 hysteresis = <0>; /* millicelsius */
39 type = "critical";
40 };
41 };
42 cooling-maps {
43 map0 {
44 trip = <&cpu_alert0>;
45 };
46 map1 {
47 trip = <&cpu_alert1>;
48 };
49 };
50 };
51};
52};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 76173cacd450..77ea547768f4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -38,6 +38,7 @@
38 i2c5 = &i2c_5; 38 i2c5 = &i2c_5;
39 i2c6 = &i2c_6; 39 i2c6 = &i2c_6;
40 i2c7 = &i2c_7; 40 i2c7 = &i2c_7;
41 i2c8 = &i2c_8;
41 csis0 = &csis_0; 42 csis0 = &csis_0;
42 csis1 = &csis_1; 43 csis1 = &csis_1;
43 fimc0 = &fimc_0; 44 fimc0 = &fimc_0;
@@ -104,6 +105,7 @@
104 compatible = "samsung,exynos4210-pd"; 105 compatible = "samsung,exynos4210-pd";
105 reg = <0x10023C20 0x20>; 106 reg = <0x10023C20 0x20>;
106 #power-domain-cells = <0>; 107 #power-domain-cells = <0>;
108 power-domains = <&pd_lcd0>;
107 }; 109 };
108 110
109 pd_cam: cam-power-domain@10023C00 { 111 pd_cam: cam-power-domain@10023C00 {
@@ -554,6 +556,22 @@
554 status = "disabled"; 556 status = "disabled";
555 }; 557 };
556 558
559 i2c_8: i2c@138E0000 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "samsung,s3c2440-hdmiphy-i2c";
563 reg = <0x138E0000 0x100>;
564 interrupts = <0 93 0>;
565 clocks = <&clock CLK_I2C_HDMI>;
566 clock-names = "i2c";
567 status = "disabled";
568
569 hdmi_i2c_phy: hdmiphy@38 {
570 compatible = "exynos4210-hdmiphy";
571 reg = <0x38>;
572 };
573 };
574
557 spi_0: spi@13920000 { 575 spi_0: spi@13920000 {
558 compatible = "samsung,exynos4210-spi"; 576 compatible = "samsung,exynos4210-spi";
559 reg = <0x13920000 0x100>; 577 reg = <0x13920000 0x100>;
@@ -663,6 +681,33 @@
663 status = "disabled"; 681 status = "disabled";
664 }; 682 };
665 683
684 tmu: tmu@100C0000 {
685 #include "exynos4412-tmu-sensor-conf.dtsi"
686 };
687
688 hdmi: hdmi@12D00000 {
689 compatible = "samsung,exynos4210-hdmi";
690 reg = <0x12D00000 0x70000>;
691 interrupts = <0 92 0>;
692 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
693 "mout_hdmi";
694 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
695 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
696 <&clock CLK_MOUT_HDMI>;
697 phy = <&hdmi_i2c_phy>;
698 power-domains = <&pd_tv>;
699 samsung,syscon-phandle = <&pmu_system_controller>;
700 status = "disabled";
701 };
702
703 mixer: mixer@12C10000 {
704 compatible = "samsung,exynos4210-mixer";
705 interrupts = <0 91 0>;
706 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
707 power-domains = <&pd_tv>;
708 status = "disabled";
709 };
710
666 ppmu_dmc0: ppmu_dmc0@106a0000 { 711 ppmu_dmc0: ppmu_dmc0@106a0000 {
667 compatible = "samsung,exynos-ppmu"; 712 compatible = "samsung,exynos-ppmu";
668 reg = <0x106a0000 0x2000>; 713 reg = <0x106a0000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 3d6652a4b6cb..32c5fd8f6269 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -426,6 +426,25 @@
426 status = "okay"; 426 status = "okay";
427 }; 427 };
428 428
429 tmu@100C0000 {
430 status = "okay";
431 };
432
433 thermal-zones {
434 cpu_thermal: cpu-thermal {
435 cooling-maps {
436 map0 {
437 /* Corresponds to 800MHz at freq_table */
438 cooling-device = <&cpu0 2 2>;
439 };
440 map1 {
441 /* Corresponds to 200MHz at freq_table */
442 cooling-device = <&cpu0 4 4>;
443 };
444 };
445 };
446 };
447
429 camera { 448 camera {
430 pinctrl-names = "default"; 449 pinctrl-names = "default";
431 pinctrl-0 = <>; 450 pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index b57e6b82ea20..d4f2b11319dd 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -505,6 +505,63 @@
505 assigned-clock-rates = <0>, <160000000>; 505 assigned-clock-rates = <0>, <160000000>;
506 }; 506 };
507 }; 507 };
508
509 hdmi_en: voltage-regulator-hdmi-5v {
510 compatible = "regulator-fixed";
511 regulator-name = "HDMI_5V";
512 regulator-min-microvolt = <5000000>;
513 regulator-max-microvolt = <5000000>;
514 gpio = <&gpe0 1 0>;
515 enable-active-high;
516 };
517
518 hdmi_ddc: i2c-ddc {
519 compatible = "i2c-gpio";
520 gpios = <&gpe4 2 0 &gpe4 3 0>;
521 i2c-gpio,delay-us = <100>;
522 #address-cells = <1>;
523 #size-cells = <0>;
524
525 pinctrl-0 = <&i2c_ddc_bus>;
526 pinctrl-names = "default";
527 status = "okay";
528 };
529
530 mixer@12C10000 {
531 status = "okay";
532 };
533
534 hdmi@12D00000 {
535 hpd-gpio = <&gpx3 7 0>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&hdmi_hpd>;
538 hdmi-en-supply = <&hdmi_en>;
539 vdd-supply = <&ldo3_reg>;
540 vdd_osc-supply = <&ldo4_reg>;
541 vdd_pll-supply = <&ldo3_reg>;
542 ddc = <&hdmi_ddc>;
543 status = "okay";
544 };
545
546 i2c@138E0000 {
547 status = "okay";
548 };
549};
550
551&pinctrl_1 {
552 hdmi_hpd: hdmi-hpd {
553 samsung,pins = "gpx3-7";
554 samsung,pin-pud = <0>;
555 };
556};
557
558&pinctrl_0 {
559 i2c_ddc_bus: i2c-ddc-bus {
560 samsung,pins = "gpe4-2", "gpe4-3";
561 samsung,pin-function = <2>;
562 samsung,pin-pud = <3>;
563 samsung,pin-drv = <0>;
564 };
508}; 565};
509 566
510&mdma1 { 567&mdma1 {
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 67c832c9dcf1..be89f83f70e7 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
21 21
22#include "exynos4.dtsi" 22#include "exynos4.dtsi"
23#include "exynos4210-pinctrl.dtsi" 23#include "exynos4210-pinctrl.dtsi"
24#include "exynos4-cpu-thermal.dtsi"
24 25
25/ { 26/ {
26 compatible = "samsung,exynos4210", "samsung,exynos4"; 27 compatible = "samsung,exynos4210", "samsung,exynos4";
@@ -35,10 +36,13 @@
35 #address-cells = <1>; 36 #address-cells = <1>;
36 #size-cells = <0>; 37 #size-cells = <0>;
37 38
38 cpu@900 { 39 cpu0: cpu@900 {
39 device_type = "cpu"; 40 device_type = "cpu";
40 compatible = "arm,cortex-a9"; 41 compatible = "arm,cortex-a9";
41 reg = <0x900>; 42 reg = <0x900>;
43 cooling-min-level = <4>;
44 cooling-max-level = <2>;
45 #cooling-cells = <2>; /* min followed by max */
42 }; 46 };
43 47
44 cpu@901 { 48 cpu@901 {
@@ -153,16 +157,38 @@
153 reg = <0x03860000 0x1000>; 157 reg = <0x03860000 0x1000>;
154 }; 158 };
155 159
156 tmu@100C0000 { 160 tmu: tmu@100C0000 {
157 compatible = "samsung,exynos4210-tmu"; 161 compatible = "samsung,exynos4210-tmu";
158 interrupt-parent = <&combiner>; 162 interrupt-parent = <&combiner>;
159 reg = <0x100C0000 0x100>; 163 reg = <0x100C0000 0x100>;
160 interrupts = <2 4>; 164 interrupts = <2 4>;
161 clocks = <&clock CLK_TMU_APBIF>; 165 clocks = <&clock CLK_TMU_APBIF>;
162 clock-names = "tmu_apbif"; 166 clock-names = "tmu_apbif";
167 samsung,tmu_gain = <15>;
168 samsung,tmu_reference_voltage = <7>;
163 status = "disabled"; 169 status = "disabled";
164 }; 170 };
165 171
172 thermal-zones {
173 cpu_thermal: cpu-thermal {
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&tmu 0>;
177
178 trips {
179 cpu_alert0: cpu-alert-0 {
180 temperature = <85000>; /* millicelsius */
181 };
182 cpu_alert1: cpu-alert-1 {
183 temperature = <100000>; /* millicelsius */
184 };
185 cpu_alert2: cpu-alert-2 {
186 temperature = <110000>; /* millicelsius */
187 };
188 };
189 };
190 };
191
166 g2d@12800000 { 192 g2d@12800000 {
167 compatible = "samsung,s5pv210-g2d"; 193 compatible = "samsung,s5pv210-g2d";
168 reg = <0x12800000 0x1000>; 194 reg = <0x12800000 0x1000>;
@@ -203,6 +229,14 @@
203 }; 229 };
204 }; 230 };
205 231
232 mixer: mixer@12C10000 {
233 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
234 "sclk_mixer";
235 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
236 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
237 <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
238 };
239
206 ppmu_lcd1: ppmu_lcd1@12240000 { 240 ppmu_lcd1: ppmu_lcd1@12240000 {
207 compatible = "samsung,exynos-ppmu"; 241 compatible = "samsung,exynos-ppmu";
208 reg = <0x12240000 0x2000>; 242 reg = <0x12240000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43ec56da..5be03288f1ee 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index de80b5bba204..adb4f6a97a1d 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -249,6 +249,20 @@
249 regulator-always-on; 249 regulator-always-on;
250 }; 250 };
251 251
252 ldo8_reg: ldo@8 {
253 regulator-compatible = "LDO8";
254 regulator-name = "VDD10_HDMI_1.0V";
255 regulator-min-microvolt = <1000000>;
256 regulator-max-microvolt = <1000000>;
257 };
258
259 ldo10_reg: ldo@10 {
260 regulator-compatible = "LDO10";
261 regulator-name = "VDDQ_MIPIHSI_1.8V";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 };
265
252 ldo11_reg: LDO11 { 266 ldo11_reg: LDO11 {
253 regulator-name = "VDD18_ABB1_1.8V"; 267 regulator-name = "VDD18_ABB1_1.8V";
254 regulator-min-microvolt = <1800000>; 268 regulator-min-microvolt = <1800000>;
@@ -411,6 +425,51 @@
411 ehci: ehci@12580000 { 425 ehci: ehci@12580000 {
412 status = "okay"; 426 status = "okay";
413 }; 427 };
428
429 tmu@100C0000 {
430 vtmu-supply = <&ldo10_reg>;
431 status = "okay";
432 };
433
434 thermal-zones {
435 cpu_thermal: cpu-thermal {
436 cooling-maps {
437 map0 {
438 /* Corresponds to 800MHz at freq_table */
439 cooling-device = <&cpu0 7 7>;
440 };
441 map1 {
442 /* Corresponds to 200MHz at freq_table */
443 cooling-device = <&cpu0 13 13>;
444 };
445 };
446 };
447 };
448
449 mixer: mixer@12C10000 {
450 status = "okay";
451 };
452
453 hdmi@12D00000 {
454 hpd-gpio = <&gpx3 7 0>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&hdmi_hpd>;
457 vdd-supply = <&ldo8_reg>;
458 vdd_osc-supply = <&ldo10_reg>;
459 vdd_pll-supply = <&ldo8_reg>;
460 ddc = <&hdmi_ddc>;
461 status = "okay";
462 };
463
464 hdmi_ddc: i2c@13880000 {
465 status = "okay";
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2c2_bus>;
468 };
469
470 i2c@138E0000 {
471 status = "okay";
472 };
414}; 473};
415 474
416&pinctrl_1 { 475&pinctrl_1 {
@@ -425,4 +484,9 @@
425 samsung,pin-pud = <0>; 484 samsung,pin-pud = <0>;
426 samsung,pin-drv = <0>; 485 samsung,pin-drv = <0>;
427 }; 486 };
487
488 hdmi_hpd: hdmi-hpd {
489 samsung,pins = "gpx3-7";
490 samsung,pin-pud = <1>;
491 };
428}; 492};
diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..e3f7934d19d0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos4412 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <8>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <55>;
19samsung,tmu_min_efuse_value = <40>;
20samsung,tmu_max_efuse_value = <100>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <85>;
23samsung,tmu_default_temp_offset = <50>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 21f748083586..173ffa479ad3 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -927,6 +927,21 @@
927 pulldown-ohm = <100000>; /* 100K */ 927 pulldown-ohm = <100000>; /* 100K */
928 io-channels = <&adc 2>; /* Battery temperature */ 928 io-channels = <&adc 2>; /* Battery temperature */
929 }; 929 };
930
931 thermal-zones {
932 cpu_thermal: cpu-thermal {
933 cooling-maps {
934 map0 {
935 /* Corresponds to 800MHz at freq_table */
936 cooling-device = <&cpu0 7 7>;
937 };
938 map1 {
939 /* Corresponds to 200MHz at freq_table */
940 cooling-device = <&cpu0 13 13>;
941 };
942 };
943 };
944 };
930}; 945};
931 946
932&pmu_system_controller { 947&pmu_system_controller {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 0f6ec93bb1d8..68ad43b391ae 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index f5e0ae780d6c..6a6abe14fd9b 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
19 19
20#include "exynos4.dtsi" 20#include "exynos4.dtsi"
21#include "exynos4x12-pinctrl.dtsi" 21#include "exynos4x12-pinctrl.dtsi"
22#include "exynos4-cpu-thermal.dtsi"
22 23
23/ { 24/ {
24 aliases { 25 aliases {
@@ -297,4 +298,15 @@
297 clock-names = "tmu_apbif"; 298 clock-names = "tmu_apbif";
298 status = "disabled"; 299 status = "disabled";
299 }; 300 };
301
302 hdmi: hdmi@12D00000 {
303 compatible = "samsung,exynos4212-hdmi";
304 };
305
306 mixer: mixer@12C10000 {
307 compatible = "samsung,exynos4212-mixer";
308 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
309 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
310 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
311 };
300}; 312};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f5..adbde1adad95 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
20#include <dt-bindings/clock/exynos5250.h> 20#include <dt-bindings/clock/exynos5250.h>
21#include "exynos5.dtsi" 21#include "exynos5.dtsi"
22#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
23 23#include "exynos4-cpu-thermal.dtsi"
24#include <dt-bindings/clock/exynos-audss-clk.h> 24#include <dt-bindings/clock/exynos-audss-clk.h>
25 25
26/ { 26/ {
@@ -58,11 +58,14 @@
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <0>; 59 #size-cells = <0>;
60 60
61 cpu@0 { 61 cpu0: cpu@0 {
62 device_type = "cpu"; 62 device_type = "cpu";
63 compatible = "arm,cortex-a15"; 63 compatible = "arm,cortex-a15";
64 reg = <0>; 64 reg = <0>;
65 clock-frequency = <1700000000>; 65 clock-frequency = <1700000000>;
66 cooling-min-level = <15>;
67 cooling-max-level = <9>;
68 #cooling-cells = <2>; /* min followed by max */
66 }; 69 };
67 cpu@1 { 70 cpu@1 {
68 device_type = "cpu"; 71 device_type = "cpu";
@@ -102,6 +105,12 @@
102 #power-domain-cells = <0>; 105 #power-domain-cells = <0>;
103 }; 106 };
104 107
108 pd_disp1: disp1-power-domain@100440A0 {
109 compatible = "samsung,exynos4210-pd";
110 reg = <0x100440A0 0x20>;
111 #power-domain-cells = <0>;
112 };
113
105 clock: clock-controller@10010000 { 114 clock: clock-controller@10010000 {
106 compatible = "samsung,exynos5250-clock"; 115 compatible = "samsung,exynos5250-clock";
107 reg = <0x10010000 0x30000>; 116 reg = <0x10010000 0x30000>;
@@ -235,12 +244,32 @@
235 status = "disabled"; 244 status = "disabled";
236 }; 245 };
237 246
238 tmu@10060000 { 247 tmu: tmu@10060000 {
239 compatible = "samsung,exynos5250-tmu"; 248 compatible = "samsung,exynos5250-tmu";
240 reg = <0x10060000 0x100>; 249 reg = <0x10060000 0x100>;
241 interrupts = <0 65 0>; 250 interrupts = <0 65 0>;
242 clocks = <&clock CLK_TMU>; 251 clocks = <&clock CLK_TMU>;
243 clock-names = "tmu_apbif"; 252 clock-names = "tmu_apbif";
253 #include "exynos4412-tmu-sensor-conf.dtsi"
254 };
255
256 thermal-zones {
257 cpu_thermal: cpu-thermal {
258 polling-delay-passive = <0>;
259 polling-delay = <0>;
260 thermal-sensors = <&tmu 0>;
261
262 cooling-maps {
263 map0 {
264 /* Corresponds to 800MHz at freq_table */
265 cooling-device = <&cpu0 9 9>;
266 };
267 map1 {
268 /* Corresponds to 200MHz at freq_table */
269 cooling-device = <&cpu0 15 15>;
270 };
271 };
272 };
244 }; 273 };
245 274
246 serial@12C00000 { 275 serial@12C00000 {
@@ -719,6 +748,7 @@
719 hdmi: hdmi { 748 hdmi: hdmi {
720 compatible = "samsung,exynos4212-hdmi"; 749 compatible = "samsung,exynos4212-hdmi";
721 reg = <0x14530000 0x70000>; 750 reg = <0x14530000 0x70000>;
751 power-domains = <&pd_disp1>;
722 interrupts = <0 95 0>; 752 interrupts = <0 95 0>;
723 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 753 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
724 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, 754 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@@ -731,9 +761,11 @@
731 mixer { 761 mixer {
732 compatible = "samsung,exynos5250-mixer"; 762 compatible = "samsung,exynos5250-mixer";
733 reg = <0x14450000 0x10000>; 763 reg = <0x14450000 0x10000>;
764 power-domains = <&pd_disp1>;
734 interrupts = <0 94 0>; 765 interrupts = <0 94 0>;
735 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 766 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
736 clock-names = "mixer", "sclk_hdmi"; 767 <&clock CLK_SCLK_HDMI>;
768 clock-names = "mixer", "hdmi", "sclk_hdmi";
737 }; 769 };
738 770
739 dp_phy: video-phy@10040720 { 771 dp_phy: video-phy@10040720 {
@@ -743,6 +775,7 @@
743 }; 775 };
744 776
745 dp: dp-controller@145B0000 { 777 dp: dp-controller@145B0000 {
778 power-domains = <&pd_disp1>;
746 clocks = <&clock CLK_DP>; 779 clocks = <&clock CLK_DP>;
747 clock-names = "dp"; 780 clock-names = "dp";
748 phys = <&dp_phy>; 781 phys = <&dp_phy>;
@@ -750,6 +783,7 @@
750 }; 783 };
751 784
752 fimd: fimd@14400000 { 785 fimd: fimd@14400000 {
786 power-domains = <&pd_disp1>;
753 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; 787 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
754 clock-names = "sclk_fimd", "fimd"; 788 clock-names = "sclk_fimd", "fimd";
755 }; 789 };
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000000000000..5d31fc140823
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
1/*
2 * Device tree sources for default Exynos5420 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <85000>; /* millicelsius */
17 hysteresis = <10000>; /* millicelsius */
18 type = "active";
19 };
20 cpu-alert-1 {
21 temperature = <103000>; /* millicelsius */
22 hysteresis = <10000>; /* millicelsius */
23 type = "active";
24 };
25 cpu-alert-2 {
26 temperature = <110000>; /* millicelsius */
27 hysteresis = <10000>; /* millicelsius */
28 type = "active";
29 };
30 cpu-crit-0 {
31 temperature = <1200000>; /* millicelsius */
32 hysteresis = <0>; /* millicelsius */
33 type = "critical";
34 };
35};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9dc2e9773b30..c0e98cf3514f 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -740,8 +740,9 @@
740 compatible = "samsung,exynos5420-mixer"; 740 compatible = "samsung,exynos5420-mixer";
741 reg = <0x14450000 0x10000>; 741 reg = <0x14450000 0x10000>;
742 interrupts = <0 94 0>; 742 interrupts = <0 94 0>;
743 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 743 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
744 clock-names = "mixer", "sclk_hdmi"; 744 <&clock CLK_SCLK_HDMI>;
745 clock-names = "mixer", "hdmi", "sclk_hdmi";
745 power-domains = <&disp_pd>; 746 power-domains = <&disp_pd>;
746 }; 747 };
747 748
@@ -782,6 +783,7 @@
782 interrupts = <0 65 0>; 783 interrupts = <0 65 0>;
783 clocks = <&clock CLK_TMU>; 784 clocks = <&clock CLK_TMU>;
784 clock-names = "tmu_apbif"; 785 clock-names = "tmu_apbif";
786 #include "exynos4412-tmu-sensor-conf.dtsi"
785 }; 787 };
786 788
787 tmu_cpu1: tmu@10064000 { 789 tmu_cpu1: tmu@10064000 {
@@ -790,6 +792,7 @@
790 interrupts = <0 183 0>; 792 interrupts = <0 183 0>;
791 clocks = <&clock CLK_TMU>; 793 clocks = <&clock CLK_TMU>;
792 clock-names = "tmu_apbif"; 794 clock-names = "tmu_apbif";
795 #include "exynos4412-tmu-sensor-conf.dtsi"
793 }; 796 };
794 797
795 tmu_cpu2: tmu@10068000 { 798 tmu_cpu2: tmu@10068000 {
@@ -798,6 +801,7 @@
798 interrupts = <0 184 0>; 801 interrupts = <0 184 0>;
799 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; 802 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
800 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 803 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
804 #include "exynos4412-tmu-sensor-conf.dtsi"
801 }; 805 };
802 806
803 tmu_cpu3: tmu@1006c000 { 807 tmu_cpu3: tmu@1006c000 {
@@ -806,6 +810,7 @@
806 interrupts = <0 185 0>; 810 interrupts = <0 185 0>;
807 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; 811 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
808 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 812 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
813 #include "exynos4412-tmu-sensor-conf.dtsi"
809 }; 814 };
810 815
811 tmu_gpu: tmu@100a0000 { 816 tmu_gpu: tmu@100a0000 {
@@ -814,6 +819,30 @@
814 interrupts = <0 215 0>; 819 interrupts = <0 215 0>;
815 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; 820 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
816 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 821 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
822 #include "exynos4412-tmu-sensor-conf.dtsi"
823 };
824
825 thermal-zones {
826 cpu0_thermal: cpu0-thermal {
827 thermal-sensors = <&tmu_cpu0>;
828 #include "exynos5420-trip-points.dtsi"
829 };
830 cpu1_thermal: cpu1-thermal {
831 thermal-sensors = <&tmu_cpu1>;
832 #include "exynos5420-trip-points.dtsi"
833 };
834 cpu2_thermal: cpu2-thermal {
835 thermal-sensors = <&tmu_cpu2>;
836 #include "exynos5420-trip-points.dtsi"
837 };
838 cpu3_thermal: cpu3-thermal {
839 thermal-sensors = <&tmu_cpu3>;
840 #include "exynos5420-trip-points.dtsi"
841 };
842 gpu_thermal: gpu-thermal {
843 thermal-sensors = <&tmu_gpu>;
844 #include "exynos5420-trip-points.dtsi"
845 };
817 }; 846 };
818 847
819 watchdog: watchdog@101D0000 { 848 watchdog: watchdog@101D0000 {
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..7b2fba0ae92b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos5440 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <5>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <0x5d2d>;
19samsung,tmu_min_efuse_value = <16>;
20samsung,tmu_max_efuse_value = <76>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <70>;
23samsung,tmu_default_temp_offset = <25>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000000000000..48adfa8f4300
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
1/*
2 * Device tree sources for default Exynos5440 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <100000>; /* millicelsius */
17 hysteresis = <0>; /* millicelsius */
18 type = "active";
19 };
20 cpu-crit-0 {
21 temperature = <1050000>; /* millicelsius */
22 hysteresis = <0>; /* millicelsius */
23 type = "critical";
24 };
25};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8f3373cd7b87..59d9416b3b03 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -219,6 +219,7 @@
219 interrupts = <0 58 0>; 219 interrupts = <0 58 0>;
220 clocks = <&clock CLK_B_125>; 220 clocks = <&clock CLK_B_125>;
221 clock-names = "tmu_apbif"; 221 clock-names = "tmu_apbif";
222 #include "exynos5440-tmu-sensor-conf.dtsi"
222 }; 223 };
223 224
224 tmuctrl_1: tmuctrl@16011C { 225 tmuctrl_1: tmuctrl@16011C {
@@ -227,6 +228,7 @@
227 interrupts = <0 58 0>; 228 interrupts = <0 58 0>;
228 clocks = <&clock CLK_B_125>; 229 clocks = <&clock CLK_B_125>;
229 clock-names = "tmu_apbif"; 230 clock-names = "tmu_apbif";
231 #include "exynos5440-tmu-sensor-conf.dtsi"
230 }; 232 };
231 233
232 tmuctrl_2: tmuctrl@160120 { 234 tmuctrl_2: tmuctrl@160120 {
@@ -235,6 +237,22 @@
235 interrupts = <0 58 0>; 237 interrupts = <0 58 0>;
236 clocks = <&clock CLK_B_125>; 238 clocks = <&clock CLK_B_125>;
237 clock-names = "tmu_apbif"; 239 clock-names = "tmu_apbif";
240 #include "exynos5440-tmu-sensor-conf.dtsi"
241 };
242
243 thermal-zones {
244 cpu0_thermal: cpu0-thermal {
245 thermal-sensors = <&tmuctrl_0>;
246 #include "exynos5440-trip-points.dtsi"
247 };
248 cpu1_thermal: cpu1-thermal {
249 thermal-sensors = <&tmuctrl_1>;
250 #include "exynos5440-trip-points.dtsi"
251 };
252 cpu2_thermal: cpu2-thermal {
253 thermal-sensors = <&tmuctrl_2>;
254 #include "exynos5440-trip-points.dtsi"
255 };
238 }; 256 };
239 257
240 sata@210000 { 258 sata@210000 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index f1cd2147421d..a626e6dd8022 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -35,6 +35,7 @@
35 regulator-max-microvolt = <5000000>; 35 regulator-max-microvolt = <5000000>;
36 gpio = <&gpio3 22 0>; 36 gpio = <&gpio3 22 0>;
37 enable-active-high; 37 enable-active-high;
38 vin-supply = <&swbst_reg>;
38 }; 39 };
39 40
40 reg_usb_h1_vbus: regulator@1 { 41 reg_usb_h1_vbus: regulator@1 {
@@ -45,6 +46,7 @@
45 regulator-max-microvolt = <5000000>; 46 regulator-max-microvolt = <5000000>;
46 gpio = <&gpio1 29 0>; 47 gpio = <&gpio1 29 0>;
47 enable-active-high; 48 enable-active-high;
49 vin-supply = <&swbst_reg>;
48 }; 50 };
49 51
50 reg_audio: regulator@2 { 52 reg_audio: regulator@2 {
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index fda4932faefd..945887d3fdb3 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -52,6 +52,7 @@
52 regulator-max-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>;
53 gpio = <&gpio4 0 0>; 53 gpio = <&gpio4 0 0>;
54 enable-active-high; 54 enable-active-high;
55 vin-supply = <&swbst_reg>;
55 }; 56 };
56 57
57 reg_usb_otg2_vbus: regulator@1 { 58 reg_usb_otg2_vbus: regulator@1 {
@@ -62,6 +63,7 @@
62 regulator-max-microvolt = <5000000>; 63 regulator-max-microvolt = <5000000>;
63 gpio = <&gpio4 2 0>; 64 gpio = <&gpio4 2 0>;
64 enable-active-high; 65 enable-active-high;
66 vin-supply = <&swbst_reg>;
65 }; 67 };
66 68
67 reg_aud3v: regulator@2 { 69 reg_aud3v: regulator@2 {
diff --git a/arch/arm/boot/dts/omap5-core-thermal.dtsi b/arch/arm/boot/dts/omap5-core-thermal.dtsi
index 19212ac6eef0..de8a3d456cf7 100644
--- a/arch/arm/boot/dts/omap5-core-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-core-thermal.dtsi
@@ -13,7 +13,7 @@
13 13
14core_thermal: core_thermal { 14core_thermal: core_thermal {
15 polling-delay-passive = <250>; /* milliseconds */ 15 polling-delay-passive = <250>; /* milliseconds */
16 polling-delay = <1000>; /* milliseconds */ 16 polling-delay = <500>; /* milliseconds */
17 17
18 /* sensor ID */ 18 /* sensor ID */
19 thermal-sensors = <&bandgap 2>; 19 thermal-sensors = <&bandgap 2>;
diff --git a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
index 1b87aca88b77..bc3090f2e84b 100644
--- a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
@@ -13,7 +13,7 @@
13 13
14gpu_thermal: gpu_thermal { 14gpu_thermal: gpu_thermal {
15 polling-delay-passive = <250>; /* milliseconds */ 15 polling-delay-passive = <250>; /* milliseconds */
16 polling-delay = <1000>; /* milliseconds */ 16 polling-delay = <500>; /* milliseconds */
17 17
18 /* sensor ID */ 18 /* sensor ID */
19 thermal-sensors = <&bandgap 1>; 19 thermal-sensors = <&bandgap 1>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index ddff674bd05e..4a485b63a141 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -1079,4 +1079,8 @@
1079 }; 1079 };
1080}; 1080};
1081 1081
1082&cpu_thermal {
1083 polling-delay = <500>; /* milliseconds */
1084};
1085
1082/include/ "omap54xx-clocks.dtsi" 1086/include/ "omap54xx-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 58c27466f012..83b425fb3ac2 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -167,10 +167,18 @@
167 ti,index-starts-at-one; 167 ti,index-starts-at-one;
168 }; 168 };
169 169
170 dpll_core_byp_mux: dpll_core_byp_mux {
171 #clock-cells = <0>;
172 compatible = "ti,mux-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
174 ti,bit-shift = <23>;
175 reg = <0x012c>;
176 };
177
170 dpll_core_ck: dpll_core_ck { 178 dpll_core_ck: dpll_core_ck {
171 #clock-cells = <0>; 179 #clock-cells = <0>;
172 compatible = "ti,omap4-dpll-core-clock"; 180 compatible = "ti,omap4-dpll-core-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>; 181 clocks = <&sys_clkin>, <&dpll_core_byp_mux>;
174 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 182 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
175 }; 183 };
176 184
@@ -294,10 +302,18 @@
294 clock-div = <1>; 302 clock-div = <1>;
295 }; 303 };
296 304
305 dpll_iva_byp_mux: dpll_iva_byp_mux {
306 #clock-cells = <0>;
307 compatible = "ti,mux-clock";
308 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
309 ti,bit-shift = <23>;
310 reg = <0x01ac>;
311 };
312
297 dpll_iva_ck: dpll_iva_ck { 313 dpll_iva_ck: dpll_iva_ck {
298 #clock-cells = <0>; 314 #clock-cells = <0>;
299 compatible = "ti,omap4-dpll-clock"; 315 compatible = "ti,omap4-dpll-clock";
300 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>; 316 clocks = <&sys_clkin>, <&dpll_iva_byp_mux>;
301 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 317 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
302 }; 318 };
303 319
@@ -599,10 +615,19 @@
599 }; 615 };
600}; 616};
601&cm_core_clocks { 617&cm_core_clocks {
618
619 dpll_per_byp_mux: dpll_per_byp_mux {
620 #clock-cells = <0>;
621 compatible = "ti,mux-clock";
622 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
623 ti,bit-shift = <23>;
624 reg = <0x014c>;
625 };
626
602 dpll_per_ck: dpll_per_ck { 627 dpll_per_ck: dpll_per_ck {
603 #clock-cells = <0>; 628 #clock-cells = <0>;
604 compatible = "ti,omap4-dpll-clock"; 629 compatible = "ti,omap4-dpll-clock";
605 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>; 630 clocks = <&sys_clkin>, <&dpll_per_byp_mux>;
606 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 631 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
607 }; 632 };
608 633
@@ -714,10 +739,18 @@
714 ti,index-starts-at-one; 739 ti,index-starts-at-one;
715 }; 740 };
716 741
742 dpll_usb_byp_mux: dpll_usb_byp_mux {
743 #clock-cells = <0>;
744 compatible = "ti,mux-clock";
745 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
746 ti,bit-shift = <23>;
747 reg = <0x018c>;
748 };
749
717 dpll_usb_ck: dpll_usb_ck { 750 dpll_usb_ck: dpll_usb_ck {
718 #clock-cells = <0>; 751 #clock-cells = <0>;
719 compatible = "ti,omap4-dpll-j-type-clock"; 752 compatible = "ti,omap4-dpll-j-type-clock";
720 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>; 753 clocks = <&sys_clkin>, <&dpll_usb_byp_mux>;
721 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 754 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
722 }; 755 };
723 756
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 261311bdf65b..367af53c1b84 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1248,7 +1248,6 @@
1248 atmel,watchdog-type = "hardware"; 1248 atmel,watchdog-type = "hardware";
1249 atmel,reset-type = "all"; 1249 atmel,reset-type = "all";
1250 atmel,dbg-halt; 1250 atmel,dbg-halt;
1251 atmel,idle-halt;
1252 status = "disabled"; 1251 status = "disabled";
1253 }; 1252 };
1254 1253
@@ -1416,7 +1415,7 @@
1416 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1415 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1417 reg = <0x00700000 0x100000>; 1416 reg = <0x00700000 0x100000>;
1418 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1417 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1419 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 1418 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1420 clock-names = "usb_clk", "ehci_clk", "uhpck"; 1419 clock-names = "usb_clk", "ehci_clk", "uhpck";
1421 status = "disabled"; 1420 status = "disabled";
1422 }; 1421 };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index d986b41b9654..4303874889c6 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -66,6 +66,7 @@
66 gpio4 = &pioE; 66 gpio4 = &pioE;
67 tcb0 = &tcb0; 67 tcb0 = &tcb0;
68 tcb1 = &tcb1; 68 tcb1 = &tcb1;
69 i2c0 = &i2c0;
69 i2c2 = &i2c2; 70 i2c2 = &i2c2;
70 }; 71 };
71 cpus { 72 cpus {
@@ -259,7 +260,7 @@
259 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 260 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
260 reg = <0x00600000 0x100000>; 261 reg = <0x00600000 0x100000>;
261 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 262 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
262 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 263 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
263 clock-names = "usb_clk", "ehci_clk", "uhpck"; 264 clock-names = "usb_clk", "ehci_clk", "uhpck";
264 status = "disabled"; 265 status = "disabled";
265 }; 266 };
@@ -461,8 +462,8 @@
461 462
462 lcdck: lcdck { 463 lcdck: lcdck {
463 #clock-cells = <0>; 464 #clock-cells = <0>;
464 reg = <4>; 465 reg = <3>;
465 clocks = <&smd>; 466 clocks = <&mck>;
466 }; 467 };
467 468
468 smdck: smdck { 469 smdck: smdck {
@@ -770,7 +771,7 @@
770 reg = <50>; 771 reg = <50>;
771 }; 772 };
772 773
773 lcd_clk: lcd_clk { 774 lcdc_clk: lcdc_clk {
774 #clock-cells = <0>; 775 #clock-cells = <0>;
775 reg = <51>; 776 reg = <51>;
776 }; 777 };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 252c3d1bda50..9d8760956752 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -713,6 +713,9 @@
713 reg-shift = <2>; 713 reg-shift = <2>;
714 reg-io-width = <4>; 714 reg-io-width = <4>;
715 clocks = <&l4_sp_clk>; 715 clocks = <&l4_sp_clk>;
716 dmas = <&pdma 28>,
717 <&pdma 29>;
718 dma-names = "tx", "rx";
716 }; 719 };
717 720
718 uart1: serial1@ffc03000 { 721 uart1: serial1@ffc03000 {
@@ -722,6 +725,9 @@
722 reg-shift = <2>; 725 reg-shift = <2>;
723 reg-io-width = <4>; 726 reg-io-width = <4>;
724 clocks = <&l4_sp_clk>; 727 clocks = <&l4_sp_clk>;
728 dmas = <&pdma 30>,
729 <&pdma 31>;
730 dma-names = "tx", "rx";
725 }; 731 };
726 732
727 rst: rstmgr@ffd05000 { 733 rst: rstmgr@ffd05000 {
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index f2670f638e97..811e72bbe642 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -70,6 +70,7 @@ CONFIG_SCSI=y
70CONFIG_BLK_DEV_SD=y 70CONFIG_BLK_DEV_SD=y
71# CONFIG_SCSI_LOWLEVEL is not set 71# CONFIG_SCSI_LOWLEVEL is not set
72CONFIG_NETDEVICES=y 72CONFIG_NETDEVICES=y
73CONFIG_ARM_AT91_ETHER=y
73CONFIG_MACB=y 74CONFIG_MACB=y
74# CONFIG_NET_VENDOR_BROADCOM is not set 75# CONFIG_NET_VENDOR_BROADCOM is not set
75CONFIG_DM9000=y 76CONFIG_DM9000=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index b7e6b6fba5e0..06075b6d2463 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -99,7 +99,7 @@ CONFIG_PCI_RCAR_GEN2=y
99CONFIG_PCI_RCAR_GEN2_PCIE=y 99CONFIG_PCI_RCAR_GEN2_PCIE=y
100CONFIG_PCIEPORTBUS=y 100CONFIG_PCIEPORTBUS=y
101CONFIG_SMP=y 101CONFIG_SMP=y
102CONFIG_NR_CPUS=8 102CONFIG_NR_CPUS=16
103CONFIG_HIGHPTE=y 103CONFIG_HIGHPTE=y
104CONFIG_CMA=y 104CONFIG_CMA=y
105CONFIG_ARM_APPENDED_DTB=y 105CONFIG_ARM_APPENDED_DTB=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index a097cffa1231..8e108599e1af 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -377,6 +377,7 @@ CONFIG_PWM_TWL=m
377CONFIG_PWM_TWL_LED=m 377CONFIG_PWM_TWL_LED=m
378CONFIG_OMAP_USB2=m 378CONFIG_OMAP_USB2=m
379CONFIG_TI_PIPE3=y 379CONFIG_TI_PIPE3=y
380CONFIG_TWL4030_USB=m
380CONFIG_EXT2_FS=y 381CONFIG_EXT2_FS=y
381CONFIG_EXT3_FS=y 382CONFIG_EXT3_FS=y
382# CONFIG_EXT3_FS_XATTR is not set 383# CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 41d856effe6c..510c747c65b4 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -3,8 +3,6 @@
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_IRQ_DOMAIN_DEBUG=y 4CONFIG_IRQ_DOMAIN_DEBUG=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SYSFS_DEPRECATED=y
7CONFIG_SYSFS_DEPRECATED_V2=y
8CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
9CONFIG_EMBEDDED=y 7CONFIG_EMBEDDED=y
10CONFIG_SLAB=y 8CONFIG_SLAB=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 38840a812924..8f6a5702b696 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y
4CONFIG_PERF_EVENTS=y 4CONFIG_PERF_EVENTS=y
5CONFIG_ARCH_SUNXI=y 5CONFIG_ARCH_SUNXI=y
6CONFIG_SMP=y 6CONFIG_SMP=y
7CONFIG_NR_CPUS=8
7CONFIG_AEABI=y 8CONFIG_AEABI=y
8CONFIG_HIGHMEM=y 9CONFIG_HIGHMEM=y
9CONFIG_HIGHPTE=y 10CONFIG_HIGHPTE=y
diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig
index f489fdaa19b8..37fe607a4ede 100644
--- a/arch/arm/configs/vexpress_defconfig
+++ b/arch/arm/configs/vexpress_defconfig
@@ -118,8 +118,8 @@ CONFIG_HID_ZEROPLUS=y
118CONFIG_USB=y 118CONFIG_USB=y
119CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 119CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
120CONFIG_USB_MON=y 120CONFIG_USB_MON=y
121CONFIG_USB_ISP1760_HCD=y
122CONFIG_USB_STORAGE=y 121CONFIG_USB_STORAGE=y
122CONFIG_USB_ISP1760=y
123CONFIG_MMC=y 123CONFIG_MMC=y
124CONFIG_MMC_ARMMMCI=y 124CONFIG_MMC_ARMMMCI=y
125CONFIG_NEW_LEDS=y 125CONFIG_NEW_LEDS=y
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 80a6501b4d50..c3c45e628e33 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -18,8 +18,11 @@
18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ 18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19#endif 19#endif
20 20
21/* Keep in sync with mach-at91/include/mach/hardware.h */ 21#ifdef CONFIG_MMU
22#define AT91_IO_P2V(x) ((x) - 0x01000000) 22#define AT91_IO_P2V(x) ((x) - 0x01000000)
23#else
24#define AT91_IO_P2V(x) (x)
25#endif
23 26
24#define AT91_DBGU_SR (0x14) /* Status Register */ 27#define AT91_DBGU_SR (0x14) /* Status Register */
25#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ 28#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5e34fb143309..aa4116e9452f 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -270,37 +270,35 @@ static void __init at91_pm_sram_init(void)
270 phys_addr_t sram_pbase; 270 phys_addr_t sram_pbase;
271 unsigned long sram_base; 271 unsigned long sram_base;
272 struct device_node *node; 272 struct device_node *node;
273 struct platform_device *pdev; 273 struct platform_device *pdev = NULL;
274 274
275 node = of_find_compatible_node(NULL, NULL, "mmio-sram"); 275 for_each_compatible_node(node, NULL, "mmio-sram") {
276 if (!node) { 276 pdev = of_find_device_by_node(node);
277 pr_warn("%s: failed to find sram node!\n", __func__); 277 if (pdev) {
278 return; 278 of_node_put(node);
279 break;
280 }
279 } 281 }
280 282
281 pdev = of_find_device_by_node(node);
282 if (!pdev) { 283 if (!pdev) {
283 pr_warn("%s: failed to find sram device!\n", __func__); 284 pr_warn("%s: failed to find sram device!\n", __func__);
284 goto put_node; 285 return;
285 } 286 }
286 287
287 sram_pool = dev_get_gen_pool(&pdev->dev); 288 sram_pool = dev_get_gen_pool(&pdev->dev);
288 if (!sram_pool) { 289 if (!sram_pool) {
289 pr_warn("%s: sram pool unavailable!\n", __func__); 290 pr_warn("%s: sram pool unavailable!\n", __func__);
290 goto put_node; 291 return;
291 } 292 }
292 293
293 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz); 294 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz);
294 if (!sram_base) { 295 if (!sram_base) {
295 pr_warn("%s: unable to alloc ocram!\n", __func__); 296 pr_warn("%s: unable to alloc ocram!\n", __func__);
296 goto put_node; 297 return;
297 } 298 }
298 299
299 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); 300 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
300 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); 301 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false);
301
302put_node:
303 of_node_put(node);
304} 302}
305#endif 303#endif
306 304
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index d2c89963af2d..86c0aa819d25 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -44,7 +44,7 @@ static inline void at91rm9200_standby(void)
44 " mcr p15, 0, %0, c7, c0, 4\n\t" 44 " mcr p15, 0, %0, c7, c0, 4\n\t"
45 " str %5, [%1, %2]" 45 " str %5, [%1, %2]"
46 : 46 :
47 : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), 47 : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
48 "r" (1), "r" (AT91RM9200_SDRAMC_SRR), 48 "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
49 "r" (lpr)); 49 "r" (lpr));
50} 50}
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 556151e85ec4..931f0e302c03 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -25,11 +25,6 @@
25 */ 25 */
26#undef SLOWDOWN_MASTER_CLOCK 26#undef SLOWDOWN_MASTER_CLOCK
27 27
28#define MCKRDY_TIMEOUT 1000
29#define MOSCRDY_TIMEOUT 1000
30#define PLLALOCK_TIMEOUT 1000
31#define PLLBLOCK_TIMEOUT 1000
32
33pmc .req r0 28pmc .req r0
34sdramc .req r1 29sdramc .req r1
35ramc1 .req r2 30ramc1 .req r2
@@ -41,60 +36,42 @@ tmp2 .req r5
41 * Wait until master clock is ready (after switching master clock source) 36 * Wait until master clock is ready (after switching master clock source)
42 */ 37 */
43 .macro wait_mckrdy 38 .macro wait_mckrdy
44 mov tmp2, #MCKRDY_TIMEOUT 391: ldr tmp1, [pmc, #AT91_PMC_SR]
451: sub tmp2, tmp2, #1
46 cmp tmp2, #0
47 beq 2f
48 ldr tmp1, [pmc, #AT91_PMC_SR]
49 tst tmp1, #AT91_PMC_MCKRDY 40 tst tmp1, #AT91_PMC_MCKRDY
50 beq 1b 41 beq 1b
512:
52 .endm 42 .endm
53 43
54/* 44/*
55 * Wait until master oscillator has stabilized. 45 * Wait until master oscillator has stabilized.
56 */ 46 */
57 .macro wait_moscrdy 47 .macro wait_moscrdy
58 mov tmp2, #MOSCRDY_TIMEOUT 481: ldr tmp1, [pmc, #AT91_PMC_SR]
591: sub tmp2, tmp2, #1
60 cmp tmp2, #0
61 beq 2f
62 ldr tmp1, [pmc, #AT91_PMC_SR]
63 tst tmp1, #AT91_PMC_MOSCS 49 tst tmp1, #AT91_PMC_MOSCS
64 beq 1b 50 beq 1b
652:
66 .endm 51 .endm
67 52
68/* 53/*
69 * Wait until PLLA has locked. 54 * Wait until PLLA has locked.
70 */ 55 */
71 .macro wait_pllalock 56 .macro wait_pllalock
72 mov tmp2, #PLLALOCK_TIMEOUT 571: ldr tmp1, [pmc, #AT91_PMC_SR]
731: sub tmp2, tmp2, #1
74 cmp tmp2, #0
75 beq 2f
76 ldr tmp1, [pmc, #AT91_PMC_SR]
77 tst tmp1, #AT91_PMC_LOCKA 58 tst tmp1, #AT91_PMC_LOCKA
78 beq 1b 59 beq 1b
792:
80 .endm 60 .endm
81 61
82/* 62/*
83 * Wait until PLLB has locked. 63 * Wait until PLLB has locked.
84 */ 64 */
85 .macro wait_pllblock 65 .macro wait_pllblock
86 mov tmp2, #PLLBLOCK_TIMEOUT 661: ldr tmp1, [pmc, #AT91_PMC_SR]
871: sub tmp2, tmp2, #1
88 cmp tmp2, #0
89 beq 2f
90 ldr tmp1, [pmc, #AT91_PMC_SR]
91 tst tmp1, #AT91_PMC_LOCKB 67 tst tmp1, #AT91_PMC_LOCKB
92 beq 1b 68 beq 1b
932:
94 .endm 69 .endm
95 70
96 .text 71 .text
97 72
73 .arm
74
98/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, 75/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
99 * void __iomem *ramc1, int memctrl) 76 * void __iomem *ramc1, int memctrl)
100 */ 77 */
@@ -134,6 +111,16 @@ ddr_sr_enable:
134 cmp memctrl, #AT91_MEMCTRL_DDRSDR 111 cmp memctrl, #AT91_MEMCTRL_DDRSDR
135 bne sdr_sr_enable 112 bne sdr_sr_enable
136 113
114 /* LPDDR1 --> force DDR2 mode during self-refresh */
115 ldr tmp1, [sdramc, #AT91_DDRSDRC_MDR]
116 str tmp1, .saved_sam9_mdr
117 bic tmp1, tmp1, #~AT91_DDRSDRC_MD
118 cmp tmp1, #AT91_DDRSDRC_MD_LOW_POWER_DDR
119 ldreq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
120 biceq tmp1, tmp1, #AT91_DDRSDRC_MD
121 orreq tmp1, tmp1, #AT91_DDRSDRC_MD_DDR2
122 streq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
123
137 /* prepare for DDRAM self-refresh mode */ 124 /* prepare for DDRAM self-refresh mode */
138 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR] 125 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
139 str tmp1, .saved_sam9_lpr 126 str tmp1, .saved_sam9_lpr
@@ -142,14 +129,26 @@ ddr_sr_enable:
142 129
143 /* figure out if we use the second ram controller */ 130 /* figure out if we use the second ram controller */
144 cmp ramc1, #0 131 cmp ramc1, #0
145 ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 132 beq ddr_no_2nd_ctrl
146 strne tmp2, .saved_sam9_lpr1 133
147 bicne tmp2, #AT91_DDRSDRC_LPCB 134 ldr tmp2, [ramc1, #AT91_DDRSDRC_MDR]
148 orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH 135 str tmp2, .saved_sam9_mdr1
136 bic tmp2, tmp2, #~AT91_DDRSDRC_MD
137 cmp tmp2, #AT91_DDRSDRC_MD_LOW_POWER_DDR
138 ldreq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
139 biceq tmp2, tmp2, #AT91_DDRSDRC_MD
140 orreq tmp2, tmp2, #AT91_DDRSDRC_MD_DDR2
141 streq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
142
143 ldr tmp2, [ramc1, #AT91_DDRSDRC_LPR]
144 str tmp2, .saved_sam9_lpr1
145 bic tmp2, #AT91_DDRSDRC_LPCB
146 orr tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
149 147
150 /* Enable DDRAM self-refresh mode */ 148 /* Enable DDRAM self-refresh mode */
149 str tmp2, [ramc1, #AT91_DDRSDRC_LPR]
150ddr_no_2nd_ctrl:
151 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 151 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
152 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
153 152
154 b sdr_sr_done 153 b sdr_sr_done
155 154
@@ -208,6 +207,7 @@ sdr_sr_done:
208 /* Turn off the main oscillator */ 207 /* Turn off the main oscillator */
209 ldr tmp1, [pmc, #AT91_CKGR_MOR] 208 ldr tmp1, [pmc, #AT91_CKGR_MOR]
210 bic tmp1, tmp1, #AT91_PMC_MOSCEN 209 bic tmp1, tmp1, #AT91_PMC_MOSCEN
210 orr tmp1, tmp1, #AT91_PMC_KEY
211 str tmp1, [pmc, #AT91_CKGR_MOR] 211 str tmp1, [pmc, #AT91_CKGR_MOR]
212 212
213 /* Wait for interrupt */ 213 /* Wait for interrupt */
@@ -216,6 +216,7 @@ sdr_sr_done:
216 /* Turn on the main oscillator */ 216 /* Turn on the main oscillator */
217 ldr tmp1, [pmc, #AT91_CKGR_MOR] 217 ldr tmp1, [pmc, #AT91_CKGR_MOR]
218 orr tmp1, tmp1, #AT91_PMC_MOSCEN 218 orr tmp1, tmp1, #AT91_PMC_MOSCEN
219 orr tmp1, tmp1, #AT91_PMC_KEY
219 str tmp1, [pmc, #AT91_CKGR_MOR] 220 str tmp1, [pmc, #AT91_CKGR_MOR]
220 221
221 wait_moscrdy 222 wait_moscrdy
@@ -280,12 +281,17 @@ sdr_sr_done:
280 */ 281 */
281 cmp memctrl, #AT91_MEMCTRL_DDRSDR 282 cmp memctrl, #AT91_MEMCTRL_DDRSDR
282 bne sdr_en_restore 283 bne sdr_en_restore
284 /* Restore MDR in case of LPDDR1 */
285 ldr tmp1, .saved_sam9_mdr
286 str tmp1, [sdramc, #AT91_DDRSDRC_MDR]
283 /* Restore LPR on AT91 with DDRAM */ 287 /* Restore LPR on AT91 with DDRAM */
284 ldr tmp1, .saved_sam9_lpr 288 ldr tmp1, .saved_sam9_lpr
285 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 289 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
286 290
287 /* if we use the second ram controller */ 291 /* if we use the second ram controller */
288 cmp ramc1, #0 292 cmp ramc1, #0
293 ldrne tmp2, .saved_sam9_mdr1
294 strne tmp2, [ramc1, #AT91_DDRSDRC_MDR]
289 ldrne tmp2, .saved_sam9_lpr1 295 ldrne tmp2, .saved_sam9_lpr1
290 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 296 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
291 297
@@ -319,5 +325,11 @@ ram_restored:
319.saved_sam9_lpr1: 325.saved_sam9_lpr1:
320 .word 0 326 .word 0
321 327
328.saved_sam9_mdr:
329 .word 0
330
331.saved_sam9_mdr1:
332 .word 0
333
322ENTRY(at91_slow_clock_sz) 334ENTRY(at91_slow_clock_sz)
323 .word .-at91_slow_clock 335 .word .-at91_slow_clock
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3f32c47a6d74..d2e9f12d12f1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
126 */ 126 */
127void exynos_cpu_power_down(int cpu) 127void exynos_cpu_power_down(int cpu)
128{ 128{
129 if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") || 129 if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
130 of_machine_is_compatible("samsung,exynos5800"))) {
131 /* 130 /*
132 * Bypass power down for CPU0 during suspend. Check for 131 * Bypass power down for CPU0 during suspend. Check for
133 * the SYS_PWR_REG value to decide if we are suspending 132 * the SYS_PWR_REG value to decide if we are suspending
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 20f267121b3e..37266a826437 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -161,6 +161,34 @@ no_clk:
161 of_genpd_add_provider_simple(np, &pd->pd); 161 of_genpd_add_provider_simple(np, &pd->pd);
162 } 162 }
163 163
164 /* Assign the child power domains to their parents */
165 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
166 struct generic_pm_domain *child_domain, *parent_domain;
167 struct of_phandle_args args;
168
169 args.np = np;
170 args.args_count = 0;
171 child_domain = of_genpd_get_from_provider(&args);
172 if (!child_domain)
173 continue;
174
175 if (of_parse_phandle_with_args(np, "power-domains",
176 "#power-domain-cells", 0, &args) != 0)
177 continue;
178
179 parent_domain = of_genpd_get_from_provider(&args);
180 if (!parent_domain)
181 continue;
182
183 if (pm_genpd_add_subdomain(parent_domain, child_domain))
184 pr_warn("%s failed to add subdomain: %s\n",
185 parent_domain->name, child_domain->name);
186 else
187 pr_info("%s has as child subdomain: %s.\n",
188 parent_domain->name, child_domain->name);
189 of_node_put(np);
190 }
191
164 return 0; 192 return 0;
165} 193}
166arch_initcall(exynos4_pm_init_power_domain); 194arch_initcall(exynos4_pm_init_power_domain);
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 52e2b1a2fddb..318d127df147 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -87,8 +87,8 @@ static unsigned int exynos_pmu_spare3;
87static u32 exynos_irqwake_intmask = 0xffffffff; 87static u32 exynos_irqwake_intmask = 0xffffffff;
88 88
89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = { 89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
90 { 73, BIT(1) }, /* RTC alarm */ 90 { 105, BIT(1) }, /* RTC alarm */
91 { 74, BIT(2) }, /* RTC tick */ 91 { 106, BIT(2) }, /* RTC tick */
92 { /* sentinel */ }, 92 { /* sentinel */ },
93}; 93};
94 94
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4ad6e473cf83..9de3412af406 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -211,8 +211,9 @@ static void __init imx6q_1588_init(void)
211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad 211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad
212 * (external OSC), and we need to clear the bit. 212 * (external OSC), and we need to clear the bit.
213 */ 213 */
214 clksel = ptp_clk == enet_ref ? IMX6Q_GPR1_ENET_CLK_SEL_ANATOP : 214 clksel = clk_is_match(ptp_clk, enet_ref) ?
215 IMX6Q_GPR1_ENET_CLK_SEL_PAD; 215 IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
216 IMX6Q_GPR1_ENET_CLK_SEL_PAD;
216 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); 217 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
217 if (!IS_ERR(gpr)) 218 if (!IS_ERR(gpr))
218 regmap_update_bits(gpr, IOMUXC_GPR1, 219 regmap_update_bits(gpr, IOMUXC_GPR1,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 92afb723dcfc..355b08936871 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1692,16 +1692,15 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1692 if (ret == -EBUSY) 1692 if (ret == -EBUSY)
1693 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); 1693 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1694 1694
1695 if (!ret) { 1695 if (oh->clkdm) {
1696 /* 1696 /*
1697 * Set the clockdomain to HW_AUTO, assuming that the 1697 * Set the clockdomain to HW_AUTO, assuming that the
1698 * previous state was HW_AUTO. 1698 * previous state was HW_AUTO.
1699 */ 1699 */
1700 if (oh->clkdm && hwsup) 1700 if (hwsup)
1701 clkdm_allow_idle(oh->clkdm); 1701 clkdm_allow_idle(oh->clkdm);
1702 } else { 1702
1703 if (oh->clkdm) 1703 clkdm_hwmod_disable(oh->clkdm, oh);
1704 clkdm_hwmod_disable(oh->clkdm, oh);
1705 } 1704 }
1706 1705
1707 return ret; 1706 return ret;
@@ -2698,6 +2697,7 @@ static int __init _register(struct omap_hwmod *oh)
2698 INIT_LIST_HEAD(&oh->master_ports); 2697 INIT_LIST_HEAD(&oh->master_ports);
2699 INIT_LIST_HEAD(&oh->slave_ports); 2698 INIT_LIST_HEAD(&oh->slave_ports);
2700 spin_lock_init(&oh->_lock); 2699 spin_lock_init(&oh->_lock);
2700 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2701 2701
2702 oh->_state = _HWMOD_STATE_REGISTERED; 2702 oh->_state = _HWMOD_STATE_REGISTERED;
2703 2703
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 9d4bec6ee742..9611c91d9b82 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -674,6 +674,7 @@ struct omap_hwmod {
674 u32 _sysc_cache; 674 u32 _sysc_cache;
675 void __iomem *_mpu_rt_va; 675 void __iomem *_mpu_rt_va;
676 spinlock_t _lock; 676 spinlock_t _lock;
677 struct lock_class_key hwmod_key; /* unique lock class */
677 struct list_head node; 678 struct list_head node;
678 struct omap_hwmod_ocp_if *_mpu_port; 679 struct omap_hwmod_ocp_if *_mpu_port;
679 unsigned int (*xlate_irq)(unsigned int); 680 unsigned int (*xlate_irq)(unsigned int);
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8692e7675b8..16fe7a1b7a35 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1466,55 +1466,18 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
1466 * 1466 *
1467 */ 1467 */
1468 1468
1469static struct omap_hwmod_class dra7xx_pcie_hwmod_class = { 1469static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
1470 .name = "pcie", 1470 .name = "pcie",
1471}; 1471};
1472 1472
1473/* pcie1 */ 1473/* pcie1 */
1474static struct omap_hwmod dra7xx_pcie1_hwmod = { 1474static struct omap_hwmod dra7xx_pciess1_hwmod = {
1475 .name = "pcie1", 1475 .name = "pcie1",
1476 .class = &dra7xx_pcie_hwmod_class, 1476 .class = &dra7xx_pciess_hwmod_class,
1477 .clkdm_name = "pcie_clkdm", 1477 .clkdm_name = "pcie_clkdm",
1478 .main_clk = "l4_root_clk_div", 1478 .main_clk = "l4_root_clk_div",
1479 .prcm = { 1479 .prcm = {
1480 .omap4 = { 1480 .omap4 = {
1481 .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
1482 .modulemode = MODULEMODE_SWCTRL,
1483 },
1484 },
1485};
1486
1487/* pcie2 */
1488static struct omap_hwmod dra7xx_pcie2_hwmod = {
1489 .name = "pcie2",
1490 .class = &dra7xx_pcie_hwmod_class,
1491 .clkdm_name = "pcie_clkdm",
1492 .main_clk = "l4_root_clk_div",
1493 .prcm = {
1494 .omap4 = {
1495 .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
1496 .modulemode = MODULEMODE_SWCTRL,
1497 },
1498 },
1499};
1500
1501/*
1502 * 'PCIE PHY' class
1503 *
1504 */
1505
1506static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
1507 .name = "pcie-phy",
1508};
1509
1510/* pcie1 phy */
1511static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
1512 .name = "pcie1-phy",
1513 .class = &dra7xx_pcie_phy_hwmod_class,
1514 .clkdm_name = "l3init_clkdm",
1515 .main_clk = "l4_root_clk_div",
1516 .prcm = {
1517 .omap4 = {
1518 .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET, 1481 .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
1519 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET, 1482 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
1520 .modulemode = MODULEMODE_SWCTRL, 1483 .modulemode = MODULEMODE_SWCTRL,
@@ -1522,11 +1485,11 @@ static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
1522 }, 1485 },
1523}; 1486};
1524 1487
1525/* pcie2 phy */ 1488/* pcie2 */
1526static struct omap_hwmod dra7xx_pcie2_phy_hwmod = { 1489static struct omap_hwmod dra7xx_pciess2_hwmod = {
1527 .name = "pcie2-phy", 1490 .name = "pcie2",
1528 .class = &dra7xx_pcie_phy_hwmod_class, 1491 .class = &dra7xx_pciess_hwmod_class,
1529 .clkdm_name = "l3init_clkdm", 1492 .clkdm_name = "pcie_clkdm",
1530 .main_clk = "l4_root_clk_div", 1493 .main_clk = "l4_root_clk_div",
1531 .prcm = { 1494 .prcm = {
1532 .omap4 = { 1495 .omap4 = {
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
2877 .user = OCP_USER_MPU | OCP_USER_SDMA, 2840 .user = OCP_USER_MPU | OCP_USER_SDMA,
2878}; 2841};
2879 2842
2880/* l3_main_1 -> pcie1 */ 2843/* l3_main_1 -> pciess1 */
2881static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = { 2844static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {
2882 .master = &dra7xx_l3_main_1_hwmod, 2845 .master = &dra7xx_l3_main_1_hwmod,
2883 .slave = &dra7xx_pcie1_hwmod, 2846 .slave = &dra7xx_pciess1_hwmod,
2884 .clk = "l3_iclk_div", 2847 .clk = "l3_iclk_div",
2885 .user = OCP_USER_MPU | OCP_USER_SDMA, 2848 .user = OCP_USER_MPU | OCP_USER_SDMA,
2886}; 2849};
2887 2850
2888/* l4_cfg -> pcie1 */ 2851/* l4_cfg -> pciess1 */
2889static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = { 2852static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {
2890 .master = &dra7xx_l4_cfg_hwmod, 2853 .master = &dra7xx_l4_cfg_hwmod,
2891 .slave = &dra7xx_pcie1_hwmod, 2854 .slave = &dra7xx_pciess1_hwmod,
2892 .clk = "l4_root_clk_div", 2855 .clk = "l4_root_clk_div",
2893 .user = OCP_USER_MPU | OCP_USER_SDMA, 2856 .user = OCP_USER_MPU | OCP_USER_SDMA,
2894}; 2857};
2895 2858
2896/* l3_main_1 -> pcie2 */ 2859/* l3_main_1 -> pciess2 */
2897static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = { 2860static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {
2898 .master = &dra7xx_l3_main_1_hwmod, 2861 .master = &dra7xx_l3_main_1_hwmod,
2899 .slave = &dra7xx_pcie2_hwmod, 2862 .slave = &dra7xx_pciess2_hwmod,
2900 .clk = "l3_iclk_div", 2863 .clk = "l3_iclk_div",
2901 .user = OCP_USER_MPU | OCP_USER_SDMA, 2864 .user = OCP_USER_MPU | OCP_USER_SDMA,
2902}; 2865};
2903 2866
2904/* l4_cfg -> pcie2 */ 2867/* l4_cfg -> pciess2 */
2905static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = { 2868static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
2906 .master = &dra7xx_l4_cfg_hwmod,
2907 .slave = &dra7xx_pcie2_hwmod,
2908 .clk = "l4_root_clk_div",
2909 .user = OCP_USER_MPU | OCP_USER_SDMA,
2910};
2911
2912/* l4_cfg -> pcie1 phy */
2913static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
2914 .master = &dra7xx_l4_cfg_hwmod,
2915 .slave = &dra7xx_pcie1_phy_hwmod,
2916 .clk = "l4_root_clk_div",
2917 .user = OCP_USER_MPU | OCP_USER_SDMA,
2918};
2919
2920/* l4_cfg -> pcie2 phy */
2921static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
2922 .master = &dra7xx_l4_cfg_hwmod, 2869 .master = &dra7xx_l4_cfg_hwmod,
2923 .slave = &dra7xx_pcie2_phy_hwmod, 2870 .slave = &dra7xx_pciess2_hwmod,
2924 .clk = "l4_root_clk_div", 2871 .clk = "l4_root_clk_div",
2925 .user = OCP_USER_MPU | OCP_USER_SDMA, 2872 .user = OCP_USER_MPU | OCP_USER_SDMA,
2926}; 2873};
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3327 &dra7xx_l4_cfg__mpu, 3274 &dra7xx_l4_cfg__mpu,
3328 &dra7xx_l4_cfg__ocp2scp1, 3275 &dra7xx_l4_cfg__ocp2scp1,
3329 &dra7xx_l4_cfg__ocp2scp3, 3276 &dra7xx_l4_cfg__ocp2scp3,
3330 &dra7xx_l3_main_1__pcie1, 3277 &dra7xx_l3_main_1__pciess1,
3331 &dra7xx_l4_cfg__pcie1, 3278 &dra7xx_l4_cfg__pciess1,
3332 &dra7xx_l3_main_1__pcie2, 3279 &dra7xx_l3_main_1__pciess2,
3333 &dra7xx_l4_cfg__pcie2, 3280 &dra7xx_l4_cfg__pciess2,
3334 &dra7xx_l4_cfg__pcie1_phy,
3335 &dra7xx_l4_cfg__pcie2_phy,
3336 &dra7xx_l3_main_1__qspi, 3281 &dra7xx_l3_main_1__qspi,
3337 &dra7xx_l4_per3__rtcss, 3282 &dra7xx_l4_per3__rtcss,
3338 &dra7xx_l4_cfg__sata, 3283 &dra7xx_l4_cfg__sata,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 190fa43e7479..e642b079e9f3 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -173,6 +173,7 @@ static void __init omap3_igep0030_rev_g_legacy_init(void)
173 173
174static void __init omap3_evm_legacy_init(void) 174static void __init omap3_evm_legacy_init(void)
175{ 175{
176 hsmmc2_internal_input_clk();
176 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149); 177 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
177} 178}
178 179
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a08a617a6c11..d6d6bc39e05c 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -252,10 +252,10 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
252{ 252{
253 saved_mask[0] = 253 saved_mask[0] =
254 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 254 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
255 OMAP4_PRM_IRQSTATUS_MPU_OFFSET); 255 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
256 saved_mask[1] = 256 saved_mask[1] =
257 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 257 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
258 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); 258 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
259 259
260 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, 260 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
261 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 261 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 7d8eab857a93..f6d02e4cbcda 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -36,6 +36,7 @@
36#include <linux/platform_data/video-pxafb.h> 36#include <linux/platform_data/video-pxafb.h>
37#include <mach/bitfield.h> 37#include <mach/bitfield.h>
38#include <linux/platform_data/mmc-pxamci.h> 38#include <linux/platform_data/mmc-pxamci.h>
39#include <linux/smc91x.h>
39 40
40#include "generic.h" 41#include "generic.h"
41#include "devices.h" 42#include "devices.h"
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 28da319d389f..eaee2c20b189 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -195,7 +195,7 @@ static struct resource smc91x_resources[] = {
195}; 195};
196 196
197struct smc91x_platdata smc91x_platdata = { 197struct smc91x_platdata smc91x_platdata = {
198 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT; 198 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
199}; 199};
200 200
201static struct platform_device smc91x_device = { 201static struct platform_device smc91x_device = {
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 7b0cd3172354..af868d258e66 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -268,8 +268,8 @@ static int neponset_probe(struct platform_device *dev)
268 .id = 0, 268 .id = 0,
269 .res = smc91x_resources, 269 .res = smc91x_resources,
270 .num_res = ARRAY_SIZE(smc91x_resources), 270 .num_res = ARRAY_SIZE(smc91x_resources),
271 .data = &smc91c_platdata, 271 .data = &smc91x_platdata,
272 .size_data = sizeof(smc91c_platdata), 272 .size_data = sizeof(smc91x_platdata),
273 }; 273 };
274 int ret, irq; 274 int ret, irq;
275 275
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 696fd0fe4806..1525d7b5f1b7 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -54,7 +54,7 @@ static struct platform_device smc91x_device = {
54 .num_resources = ARRAY_SIZE(smc91x_resources), 54 .num_resources = ARRAY_SIZE(smc91x_resources),
55 .resource = smc91x_resources, 55 .resource = smc91x_resources,
56 .dev = { 56 .dev = {
57 .platform_data = &smc91c_platdata, 57 .platform_data = &smc91x_platdata,
58 }, 58 },
59}; 59};
60 60
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 483cb467bf65..a0f3b1cd497c 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -45,6 +45,6 @@ extern char secondary_trampoline, secondary_trampoline_end;
45 45
46extern unsigned long socfpga_cpu1start_addr; 46extern unsigned long socfpga_cpu1start_addr;
47 47
48#define SOCFPGA_SCU_VIRT_BASE 0xfffec000 48#define SOCFPGA_SCU_VIRT_BASE 0xfee00000
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 383d61e138af..f5e597c207b9 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/cacheflush.h>
26 27
27#include "core.h" 28#include "core.h"
28 29
@@ -73,6 +74,10 @@ void __init socfpga_sysmgr_init(void)
73 (u32 *) &socfpga_cpu1start_addr)) 74 (u32 *) &socfpga_cpu1start_addr))
74 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); 75 pr_err("SMP: Need cpu1-start-addr in device tree.\n");
75 76
77 /* Ensure that socfpga_cpu1start_addr is visible to other CPUs */
78 smp_wmb();
79 sync_cache_w(&socfpga_cpu1start_addr);
80
76 sys_manager_base_addr = of_iomap(np, 0); 81 sys_manager_base_addr = of_iomap(np, 0);
77 82
78 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); 83 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index b067390cef4e..b373acade338 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -18,6 +18,7 @@ static const char *stih41x_dt_match[] __initdata = {
18 "st,stih415", 18 "st,stih415",
19 "st,stih416", 19 "st,stih416",
20 "st,stih407", 20 "st,stih407",
21 "st,stih410",
21 "st,stih418", 22 "st,stih418",
22 NULL 23 NULL
23}; 24};
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index f1ad9c2ab2e9..a857794432d6 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -622,7 +622,7 @@
622 }; 622 };
623 623
624 sgenet0: ethernet@1f210000 { 624 sgenet0: ethernet@1f210000 {
625 compatible = "apm,xgene-enet"; 625 compatible = "apm,xgene1-sgenet";
626 status = "disabled"; 626 status = "disabled";
627 reg = <0x0 0x1f210000 0x0 0xd100>, 627 reg = <0x0 0x1f210000 0x0 0xd100>,
628 <0x0 0x1f200000 0x0 0Xc300>, 628 <0x0 0x1f200000 0x0 0Xc300>,
@@ -636,7 +636,7 @@
636 }; 636 };
637 637
638 xgenet: ethernet@1f610000 { 638 xgenet: ethernet@1f610000 {
639 compatible = "apm,xgene-enet"; 639 compatible = "apm,xgene1-xgenet";
640 status = "disabled"; 640 status = "disabled";
641 reg = <0x0 0x1f610000 0x0 0xd100>, 641 reg = <0x0 0x1f610000 0x0 0xd100>,
642 <0x0 0x1f600000 0x0 0Xc300>, 642 <0x0 0x1f600000 0x0 0Xc300>,
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
index c028fe37456f..53d9c354219f 100644
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -48,6 +48,7 @@ static inline void tlb_flush(struct mmu_gather *tlb)
48static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, 48static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
49 unsigned long addr) 49 unsigned long addr)
50{ 50{
51 __flush_tlb_pgtable(tlb->mm, addr);
51 pgtable_page_dtor(pte); 52 pgtable_page_dtor(pte);
52 tlb_remove_entry(tlb, pte); 53 tlb_remove_entry(tlb, pte);
53} 54}
@@ -56,6 +57,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
56static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, 57static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
57 unsigned long addr) 58 unsigned long addr)
58{ 59{
60 __flush_tlb_pgtable(tlb->mm, addr);
59 tlb_remove_entry(tlb, virt_to_page(pmdp)); 61 tlb_remove_entry(tlb, virt_to_page(pmdp));
60} 62}
61#endif 63#endif
@@ -64,6 +66,7 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
64static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp, 66static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
65 unsigned long addr) 67 unsigned long addr)
66{ 68{
69 __flush_tlb_pgtable(tlb->mm, addr);
67 tlb_remove_entry(tlb, virt_to_page(pudp)); 70 tlb_remove_entry(tlb, virt_to_page(pudp));
68} 71}
69#endif 72#endif
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 4abe9b945f77..c3bb05b98616 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -144,6 +144,19 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end
144} 144}
145 145
146/* 146/*
147 * Used to invalidate the TLB (walk caches) corresponding to intermediate page
148 * table levels (pgd/pud/pmd).
149 */
150static inline void __flush_tlb_pgtable(struct mm_struct *mm,
151 unsigned long uaddr)
152{
153 unsigned long addr = uaddr >> 12 | ((unsigned long)ASID(mm) << 48);
154
155 dsb(ishst);
156 asm("tlbi vae1is, %0" : : "r" (addr));
157 dsb(ish);
158}
159/*
147 * On AArch64, the cache coherency is handled via the set_pte_at() function. 160 * On AArch64, the cache coherency is handled via the set_pte_at() function.
148 */ 161 */
149static inline void update_mmu_cache(struct vm_area_struct *vma, 162static inline void update_mmu_cache(struct vm_area_struct *vma,
diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
index b42c7b480e1e..2b8d70164428 100644
--- a/arch/arm64/kernel/efi.c
+++ b/arch/arm64/kernel/efi.c
@@ -354,3 +354,12 @@ void efi_virtmap_unload(void)
354 efi_set_pgd(current->active_mm); 354 efi_set_pgd(current->active_mm);
355 preempt_enable(); 355 preempt_enable();
356} 356}
357
358/*
359 * UpdateCapsule() depends on the system being shutdown via
360 * ResetSystem().
361 */
362bool efi_poweroff_required(void)
363{
364 return efi_enabled(EFI_RUNTIME_SERVICES);
365}
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 8ce88e08c030..07f930540f4a 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -585,8 +585,8 @@ ENDPROC(set_cpu_boot_mode_flag)
585 * zeroing of .bss would clobber it. 585 * zeroing of .bss would clobber it.
586 */ 586 */
587 .pushsection .data..cacheline_aligned 587 .pushsection .data..cacheline_aligned
588ENTRY(__boot_cpu_mode)
589 .align L1_CACHE_SHIFT 588 .align L1_CACHE_SHIFT
589ENTRY(__boot_cpu_mode)
590 .long BOOT_CPU_MODE_EL2 590 .long BOOT_CPU_MODE_EL2
591 .long 0 591 .long 0
592 .popsection 592 .popsection
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index fde9923af859..c6b1f3b96f45 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -21,6 +21,7 @@
21#include <stdarg.h> 21#include <stdarg.h>
22 22
23#include <linux/compat.h> 23#include <linux/compat.h>
24#include <linux/efi.h>
24#include <linux/export.h> 25#include <linux/export.h>
25#include <linux/sched.h> 26#include <linux/sched.h>
26#include <linux/kernel.h> 27#include <linux/kernel.h>
@@ -150,6 +151,13 @@ void machine_restart(char *cmd)
150 local_irq_disable(); 151 local_irq_disable();
151 smp_send_stop(); 152 smp_send_stop();
152 153
154 /*
155 * UpdateCapsule() depends on the system being reset via
156 * ResetSystem().
157 */
158 if (efi_enabled(EFI_RUNTIME_SERVICES))
159 efi_reboot(reboot_mode, NULL);
160
153 /* Now call the architecture specific reboot code. */ 161 /* Now call the architecture specific reboot code. */
154 if (arm_pm_restart) 162 if (arm_pm_restart)
155 arm_pm_restart(reboot_mode, cmd); 163 arm_pm_restart(reboot_mode, cmd);
diff --git a/arch/c6x/include/asm/pgtable.h b/arch/c6x/include/asm/pgtable.h
index 78d4483ba40c..ec4db6df5e0d 100644
--- a/arch/c6x/include/asm/pgtable.h
+++ b/arch/c6x/include/asm/pgtable.h
@@ -67,6 +67,11 @@ extern unsigned long empty_zero_page;
67 */ 67 */
68#define pgtable_cache_init() do { } while (0) 68#define pgtable_cache_init() do { } while (0)
69 69
70/*
71 * c6x is !MMU, so define the simpliest implementation
72 */
73#define pgprot_writecombine pgprot_noncached
74
70#include <asm-generic/pgtable.h> 75#include <asm-generic/pgtable.h>
71 76
72#endif /* _ASM_C6X_PGTABLE_H */ 77#endif /* _ASM_C6X_PGTABLE_H */
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index 0536bc021cc6..ef548510b951 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -348,8 +348,9 @@ C_ENTRY(_user_exception):
348 * The LP register should point to the location where the called function 348 * The LP register should point to the location where the called function
349 * should return. [note that MAKE_SYS_CALL uses label 1] */ 349 * should return. [note that MAKE_SYS_CALL uses label 1] */
350 /* See if the system call number is valid */ 350 /* See if the system call number is valid */
351 blti r12, 5f
351 addi r11, r12, -__NR_syscalls; 352 addi r11, r12, -__NR_syscalls;
352 bgei r11,5f; 353 bgei r11, 5f;
353 /* Figure out which function to use for this system call. */ 354 /* Figure out which function to use for this system call. */
354 /* Note Microblaze barrel shift is optional, so don't rely on it */ 355 /* Note Microblaze barrel shift is optional, so don't rely on it */
355 add r12, r12, r12; /* convert num -> ptr */ 356 add r12, r12, r12; /* convert num -> ptr */
@@ -375,7 +376,7 @@ C_ENTRY(_user_exception):
375 376
376 /* The syscall number is invalid, return an error. */ 377 /* The syscall number is invalid, return an error. */
3775: 3785:
378 rtsd r15, 8; /* looks like a normal subroutine return */ 379 braid ret_from_trap
379 addi r3, r0, -ENOSYS; 380 addi r3, r0, -ENOSYS;
380 381
381/* Entry point used to return from a syscall/trap */ 382/* Entry point used to return from a syscall/trap */
@@ -411,7 +412,7 @@ C_ENTRY(ret_from_trap):
411 bri 1b 412 bri 1b
412 413
413 /* Maybe handle a signal */ 414 /* Maybe handle a signal */
4145: 4155:
415 andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; 416 andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
416 beqi r11, 4f; /* Signals to handle, handle them */ 417 beqi r11, 4f; /* Signals to handle, handle them */
417 418
diff --git a/arch/nios2/include/asm/ptrace.h b/arch/nios2/include/asm/ptrace.h
index 20fb1cf2dab6..642462144872 100644
--- a/arch/nios2/include/asm/ptrace.h
+++ b/arch/nios2/include/asm/ptrace.h
@@ -15,7 +15,54 @@
15 15
16#include <uapi/asm/ptrace.h> 16#include <uapi/asm/ptrace.h>
17 17
18/* This struct defines the way the registers are stored on the
19 stack during a system call. */
20
18#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
22struct pt_regs {
23 unsigned long r8; /* r8-r15 Caller-saved GP registers */
24 unsigned long r9;
25 unsigned long r10;
26 unsigned long r11;
27 unsigned long r12;
28 unsigned long r13;
29 unsigned long r14;
30 unsigned long r15;
31 unsigned long r1; /* Assembler temporary */
32 unsigned long r2; /* Retval LS 32bits */
33 unsigned long r3; /* Retval MS 32bits */
34 unsigned long r4; /* r4-r7 Register arguments */
35 unsigned long r5;
36 unsigned long r6;
37 unsigned long r7;
38 unsigned long orig_r2; /* Copy of r2 ?? */
39 unsigned long ra; /* Return address */
40 unsigned long fp; /* Frame pointer */
41 unsigned long sp; /* Stack pointer */
42 unsigned long gp; /* Global pointer */
43 unsigned long estatus;
44 unsigned long ea; /* Exception return address (pc) */
45 unsigned long orig_r7;
46};
47
48/*
49 * This is the extended stack used by signal handlers and the context
50 * switcher: it's pushed after the normal "struct pt_regs".
51 */
52struct switch_stack {
53 unsigned long r16; /* r16-r23 Callee-saved GP registers */
54 unsigned long r17;
55 unsigned long r18;
56 unsigned long r19;
57 unsigned long r20;
58 unsigned long r21;
59 unsigned long r22;
60 unsigned long r23;
61 unsigned long fp;
62 unsigned long gp;
63 unsigned long ra;
64};
65
19#define user_mode(regs) (((regs)->estatus & ESTATUS_EU)) 66#define user_mode(regs) (((regs)->estatus & ESTATUS_EU))
20 67
21#define instruction_pointer(regs) ((regs)->ra) 68#define instruction_pointer(regs) ((regs)->ra)
diff --git a/arch/nios2/include/asm/ucontext.h b/arch/nios2/include/asm/ucontext.h
deleted file mode 100644
index 2c87614b0f6e..000000000000
--- a/arch/nios2/include/asm/ucontext.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
3 * Copyright (C) 2004 Microtronix Datacom Ltd
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_NIOS2_UCONTEXT_H
11#define _ASM_NIOS2_UCONTEXT_H
12
13typedef int greg_t;
14#define NGREG 32
15typedef greg_t gregset_t[NGREG];
16
17struct mcontext {
18 int version;
19 gregset_t gregs;
20};
21
22#define MCONTEXT_VERSION 2
23
24struct ucontext {
25 unsigned long uc_flags;
26 struct ucontext *uc_link;
27 stack_t uc_stack;
28 struct mcontext uc_mcontext;
29 sigset_t uc_sigmask; /* mask last for extensibility */
30};
31
32#endif
diff --git a/arch/nios2/include/uapi/asm/Kbuild b/arch/nios2/include/uapi/asm/Kbuild
index 4f07ca3f8d10..376131194cc3 100644
--- a/arch/nios2/include/uapi/asm/Kbuild
+++ b/arch/nios2/include/uapi/asm/Kbuild
@@ -2,3 +2,5 @@ include include/uapi/asm-generic/Kbuild.asm
2 2
3header-y += elf.h 3header-y += elf.h
4header-y += ucontext.h 4header-y += ucontext.h
5
6generic-y += ucontext.h
diff --git a/arch/nios2/include/uapi/asm/elf.h b/arch/nios2/include/uapi/asm/elf.h
index a5b91ae5cf56..6f06d3b2949e 100644
--- a/arch/nios2/include/uapi/asm/elf.h
+++ b/arch/nios2/include/uapi/asm/elf.h
@@ -50,9 +50,7 @@
50 50
51typedef unsigned long elf_greg_t; 51typedef unsigned long elf_greg_t;
52 52
53#define ELF_NGREG \ 53#define ELF_NGREG 49
54 ((sizeof(struct pt_regs) + sizeof(struct switch_stack)) / \
55 sizeof(elf_greg_t))
56typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 54typedef elf_greg_t elf_gregset_t[ELF_NGREG];
57 55
58typedef unsigned long elf_fpregset_t; 56typedef unsigned long elf_fpregset_t;
diff --git a/arch/nios2/include/uapi/asm/ptrace.h b/arch/nios2/include/uapi/asm/ptrace.h
index e83a7c9d1c36..71a330597adf 100644
--- a/arch/nios2/include/uapi/asm/ptrace.h
+++ b/arch/nios2/include/uapi/asm/ptrace.h
@@ -67,53 +67,9 @@
67 67
68#define NUM_PTRACE_REG (PTR_TLBMISC + 1) 68#define NUM_PTRACE_REG (PTR_TLBMISC + 1)
69 69
70/* this struct defines the way the registers are stored on the 70/* User structures for general purpose registers. */
71 stack during a system call. 71struct user_pt_regs {
72 72 __u32 regs[49];
73 There is a fake_regs in setup.c that has to match pt_regs.*/
74
75struct pt_regs {
76 unsigned long r8; /* r8-r15 Caller-saved GP registers */
77 unsigned long r9;
78 unsigned long r10;
79 unsigned long r11;
80 unsigned long r12;
81 unsigned long r13;
82 unsigned long r14;
83 unsigned long r15;
84 unsigned long r1; /* Assembler temporary */
85 unsigned long r2; /* Retval LS 32bits */
86 unsigned long r3; /* Retval MS 32bits */
87 unsigned long r4; /* r4-r7 Register arguments */
88 unsigned long r5;
89 unsigned long r6;
90 unsigned long r7;
91 unsigned long orig_r2; /* Copy of r2 ?? */
92 unsigned long ra; /* Return address */
93 unsigned long fp; /* Frame pointer */
94 unsigned long sp; /* Stack pointer */
95 unsigned long gp; /* Global pointer */
96 unsigned long estatus;
97 unsigned long ea; /* Exception return address (pc) */
98 unsigned long orig_r7;
99};
100
101/*
102 * This is the extended stack used by signal handlers and the context
103 * switcher: it's pushed after the normal "struct pt_regs".
104 */
105struct switch_stack {
106 unsigned long r16; /* r16-r23 Callee-saved GP registers */
107 unsigned long r17;
108 unsigned long r18;
109 unsigned long r19;
110 unsigned long r20;
111 unsigned long r21;
112 unsigned long r22;
113 unsigned long r23;
114 unsigned long fp;
115 unsigned long gp;
116 unsigned long ra;
117}; 73};
118 74
119#endif /* __ASSEMBLY__ */ 75#endif /* __ASSEMBLY__ */
diff --git a/arch/nios2/include/uapi/asm/sigcontext.h b/arch/nios2/include/uapi/asm/sigcontext.h
index 7b8bb41867d4..b67944a50927 100644
--- a/arch/nios2/include/uapi/asm/sigcontext.h
+++ b/arch/nios2/include/uapi/asm/sigcontext.h
@@ -15,14 +15,16 @@
15 * details. 15 * details.
16 */ 16 */
17 17
18#ifndef _ASM_NIOS2_SIGCONTEXT_H 18#ifndef _UAPI__ASM_SIGCONTEXT_H
19#define _ASM_NIOS2_SIGCONTEXT_H 19#define _UAPI__ASM_SIGCONTEXT_H
20 20
21#include <asm/ptrace.h> 21#include <linux/types.h>
22
23#define MCONTEXT_VERSION 2
22 24
23struct sigcontext { 25struct sigcontext {
24 struct pt_regs regs; 26 int version;
25 unsigned long sc_mask; /* old sigmask */ 27 unsigned long gregs[32];
26}; 28};
27 29
28#endif 30#endif
diff --git a/arch/nios2/kernel/signal.c b/arch/nios2/kernel/signal.c
index 2d0ea25be171..dda41e4fe707 100644
--- a/arch/nios2/kernel/signal.c
+++ b/arch/nios2/kernel/signal.c
@@ -39,7 +39,7 @@ static inline int rt_restore_ucontext(struct pt_regs *regs,
39 struct ucontext *uc, int *pr2) 39 struct ucontext *uc, int *pr2)
40{ 40{
41 int temp; 41 int temp;
42 greg_t *gregs = uc->uc_mcontext.gregs; 42 unsigned long *gregs = uc->uc_mcontext.gregs;
43 int err; 43 int err;
44 44
45 /* Always make any pending restarted system calls return -EINTR */ 45 /* Always make any pending restarted system calls return -EINTR */
@@ -127,7 +127,7 @@ badframe:
127static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs) 127static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs)
128{ 128{
129 struct switch_stack *sw = (struct switch_stack *)regs - 1; 129 struct switch_stack *sw = (struct switch_stack *)regs - 1;
130 greg_t *gregs = uc->uc_mcontext.gregs; 130 unsigned long *gregs = uc->uc_mcontext.gregs;
131 int err = 0; 131 int err = 0;
132 132
133 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version); 133 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 22b0940494bb..716c9e6a3160 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -152,6 +152,7 @@ config PPC
152 select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN 152 select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
153 select NO_BOOTMEM 153 select NO_BOOTMEM
154 select HAVE_GENERIC_RCU_GUP 154 select HAVE_GENERIC_RCU_GUP
155 select HAVE_PERF_EVENTS_NMI if PPC64
155 156
156config GENERIC_CSUM 157config GENERIC_CSUM
157 def_bool CPU_LITTLE_ENDIAN 158 def_bool CPU_LITTLE_ENDIAN
@@ -189,9 +190,6 @@ config ARCH_MAY_HAVE_PC_FDC
189 bool 190 bool
190 default PCI 191 default PCI
191 192
192config PPC_OF
193 def_bool y
194
195config PPC_UDBG_16550 193config PPC_UDBG_16550
196 bool 194 bool
197 default n 195 default n
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index ec2e40f2cc11..0efa8f90a8f1 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -117,7 +117,7 @@ config BDI_SWITCH
117 117
118config BOOTX_TEXT 118config BOOTX_TEXT
119 bool "Support for early boot text console (BootX or OpenFirmware only)" 119 bool "Support for early boot text console (BootX or OpenFirmware only)"
120 depends on PPC_OF && PPC_BOOK3S 120 depends on PPC_BOOK3S
121 help 121 help
122 Say Y here to see progress messages from the boot firmware in text 122 Say Y here to see progress messages from the boot firmware in text
123 mode. Requires either BootX or Open Firmware. 123 mode. Requires either BootX or Open Firmware.
@@ -193,13 +193,6 @@ config PPC_EARLY_DEBUG_PAS_REALMODE
193 Select this to enable early debugging for PA Semi. 193 Select this to enable early debugging for PA Semi.
194 Output will be on UART0. 194 Output will be on UART0.
195 195
196config PPC_EARLY_DEBUG_BEAT
197 bool "Beat HV Console"
198 depends on PPC_CELLEB
199 select PPC_UDBG_BEAT
200 help
201 Select this to enable early debugging for Celleb with Beat.
202
203config PPC_EARLY_DEBUG_44x 196config PPC_EARLY_DEBUG_44x
204 bool "Early serial debugging for IBM/AMCC 44x CPUs" 197 bool "Early serial debugging for IBM/AMCC 44x CPUs"
205 depends on 44x 198 depends on 44x
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index fc502e042438..07a480861f78 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -248,10 +248,10 @@ boot := arch/$(ARCH)/boot
248 248
249ifeq ($(CONFIG_RELOCATABLE),y) 249ifeq ($(CONFIG_RELOCATABLE),y)
250quiet_cmd_relocs_check = CALL $< 250quiet_cmd_relocs_check = CALL $<
251 cmd_relocs_check = perl $< "$(OBJDUMP)" "$(obj)/vmlinux" 251 cmd_relocs_check = $(CONFIG_SHELL) $< "$(OBJDUMP)" "$(obj)/vmlinux"
252 252
253PHONY += relocs_check 253PHONY += relocs_check
254relocs_check: arch/powerpc/relocs_check.pl vmlinux 254relocs_check: arch/powerpc/relocs_check.sh vmlinux
255 $(call cmd,relocs_check) 255 $(call cmd,relocs_check)
256 256
257zImage: relocs_check 257zImage: relocs_check
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 8a5bc1cfc6aa..73eddda53b8e 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -110,7 +110,6 @@ src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
110src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S 110src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S
111src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S 111src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
112src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S 112src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
113src-plat-$(CONFIG_PPC_CELLEB) += pseries-head.S
114src-plat-$(CONFIG_PPC_CELL_QPACE) += pseries-head.S 113src-plat-$(CONFIG_PPC_CELL_QPACE) += pseries-head.S
115 114
116src-wlib := $(sort $(src-wlib-y)) 115src-wlib := $(sort $(src-wlib-y))
@@ -215,7 +214,6 @@ image-$(CONFIG_PPC_POWERNV) += zImage.pseries
215image-$(CONFIG_PPC_MAPLE) += zImage.maple 214image-$(CONFIG_PPC_MAPLE) += zImage.maple
216image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries 215image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries
217image-$(CONFIG_PPC_PS3) += dtbImage.ps3 216image-$(CONFIG_PPC_PS3) += dtbImage.ps3
218image-$(CONFIG_PPC_CELLEB) += zImage.pseries
219image-$(CONFIG_PPC_CELL_QPACE) += zImage.pseries 217image-$(CONFIG_PPC_CELL_QPACE) += zImage.pseries
220image-$(CONFIG_PPC_CHRP) += zImage.chrp 218image-$(CONFIG_PPC_CHRP) += zImage.chrp
221image-$(CONFIG_PPC_EFIKA) += zImage.chrp 219image-$(CONFIG_PPC_EFIKA) += zImage.chrp
@@ -317,7 +315,7 @@ endif
317# Allow extra targets to be added to the defconfig 315# Allow extra targets to be added to the defconfig
318image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS)) 316image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS))
319 317
320initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-)) 318initrd- := $(patsubst zImage%, zImage.initrd%, $(image-))
321initrd-y := $(patsubst zImage%, zImage.initrd%, \ 319initrd-y := $(patsubst zImage%, zImage.initrd%, \
322 $(patsubst dtbImage%, dtbImage.initrd%, \ 320 $(patsubst dtbImage%, dtbImage.initrd%, \
323 $(patsubst simpleImage%, simpleImage.initrd%, \ 321 $(patsubst simpleImage%, simpleImage.initrd%, \
diff --git a/arch/powerpc/boot/crt0.S b/arch/powerpc/boot/crt0.S
index 14de4f8778a7..12866ccb5694 100644
--- a/arch/powerpc/boot/crt0.S
+++ b/arch/powerpc/boot/crt0.S
@@ -155,29 +155,29 @@ p_base: mflr r10 /* r10 now points to runtime addr of p_base */
155 ld r9,(p_rela-p_base)(r10) 155 ld r9,(p_rela-p_base)(r10)
156 add r9,r9,r10 156 add r9,r9,r10
157 157
158 li r7,0 158 li r13,0
159 li r8,0 159 li r8,0
1609: ld r6,0(r11) /* get tag */ 1609: ld r12,0(r11) /* get tag */
161 cmpdi r6,0 161 cmpdi r12,0
162 beq 12f /* end of list */ 162 beq 12f /* end of list */
163 cmpdi r6,RELA 163 cmpdi r12,RELA
164 bne 10f 164 bne 10f
165 ld r7,8(r11) /* get RELA pointer in r7 */ 165 ld r13,8(r11) /* get RELA pointer in r13 */
166 b 11f 166 b 11f
16710: addis r6,r6,(-RELACOUNT)@ha 16710: addis r12,r12,(-RELACOUNT)@ha
168 cmpdi r6,RELACOUNT@l 168 cmpdi r12,RELACOUNT@l
169 bne 11f 169 bne 11f
170 ld r8,8(r11) /* get RELACOUNT value in r8 */ 170 ld r8,8(r11) /* get RELACOUNT value in r8 */
17111: addi r11,r11,16 17111: addi r11,r11,16
172 b 9b 172 b 9b
17312: 17312:
174 cmpdi r7,0 /* check we have both RELA and RELACOUNT */ 174 cmpdi r13,0 /* check we have both RELA and RELACOUNT */
175 cmpdi cr1,r8,0 175 cmpdi cr1,r8,0
176 beq 3f 176 beq 3f
177 beq cr1,3f 177 beq cr1,3f
178 178
179 /* Calcuate the runtime offset. */ 179 /* Calcuate the runtime offset. */
180 subf r7,r7,r9 180 subf r13,r13,r9
181 181
182 /* Run through the list of relocations and process the 182 /* Run through the list of relocations and process the
183 * R_PPC64_RELATIVE ones. */ 183 * R_PPC64_RELATIVE ones. */
@@ -185,10 +185,10 @@ p_base: mflr r10 /* r10 now points to runtime addr of p_base */
18513: ld r0,8(r9) /* ELF64_R_TYPE(reloc->r_info) */ 18513: ld r0,8(r9) /* ELF64_R_TYPE(reloc->r_info) */
186 cmpdi r0,22 /* R_PPC64_RELATIVE */ 186 cmpdi r0,22 /* R_PPC64_RELATIVE */
187 bne 3f 187 bne 3f
188 ld r6,0(r9) /* reloc->r_offset */ 188 ld r12,0(r9) /* reloc->r_offset */
189 ld r0,16(r9) /* reloc->r_addend */ 189 ld r0,16(r9) /* reloc->r_addend */
190 add r0,r0,r7 190 add r0,r0,r13
191 stdx r0,r7,r6 191 stdx r0,r13,r12
192 addi r9,r9,24 192 addi r9,r9,24
193 bdnz 13b 193 bdnz 13b
194 194
@@ -218,7 +218,7 @@ p_base: mflr r10 /* r10 now points to runtime addr of p_base */
218 beq 6f 218 beq 6f
219 ld r1,0(r8) 219 ld r1,0(r8)
220 li r0,0 220 li r0,0
221 stdu r0,-16(r1) /* establish a stack frame */ 221 stdu r0,-112(r1) /* establish a stack frame */
2226: 2226:
223#endif /* __powerpc64__ */ 223#endif /* __powerpc64__ */
224 /* Call platform_init() */ 224 /* Call platform_init() */
diff --git a/arch/powerpc/boot/dts/b4860emu.dts b/arch/powerpc/boot/dts/b4860emu.dts
deleted file mode 100644
index 2aa5cd318ce8..000000000000
--- a/arch/powerpc/boot/dts/b4860emu.dts
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * B4860 emulator Device Tree Source
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/dts-v1/;
36
37/include/ "fsl/e6500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,B4860";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47
48 serial0 = &serial0;
49 serial1 = &serial1;
50 serial2 = &serial2;
51 serial3 = &serial3;
52 dma0 = &dma0;
53 dma1 = &dma1;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 cpu0: PowerPC,e6500@0 {
61 device_type = "cpu";
62 reg = <0 1>;
63 next-level-cache = <&L2>;
64 fsl,portid-mapping = <0x80000000>;
65 };
66 cpu1: PowerPC,e6500@2 {
67 device_type = "cpu";
68 reg = <2 3>;
69 next-level-cache = <&L2>;
70 fsl,portid-mapping = <0x80000000>;
71 };
72 cpu2: PowerPC,e6500@4 {
73 device_type = "cpu";
74 reg = <4 5>;
75 next-level-cache = <&L2>;
76 fsl,portid-mapping = <0x80000000>;
77 };
78 cpu3: PowerPC,e6500@6 {
79 device_type = "cpu";
80 reg = <6 7>;
81 next-level-cache = <&L2>;
82 fsl,portid-mapping = <0x80000000>;
83 };
84 };
85};
86
87/ {
88 model = "fsl,B4860QDS";
89 compatible = "fsl,B4860EMU", "fsl,B4860QDS";
90 #address-cells = <2>;
91 #size-cells = <2>;
92 interrupt-parent = <&mpic>;
93
94 ifc: localbus@ffe124000 {
95 reg = <0xf 0xfe124000 0 0x2000>;
96 ranges = <0 0 0xf 0xe8000000 0x08000000
97 2 0 0xf 0xff800000 0x00010000
98 3 0 0xf 0xffdf0000 0x00008000>;
99
100 nor@0,0 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 compatible = "cfi-flash";
104 reg = <0x0 0x0 0x8000000>;
105 bank-width = <2>;
106 device-width = <1>;
107 };
108 };
109
110 memory {
111 device_type = "memory";
112 };
113
114 soc: soc@ffe000000 {
115 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
116 reg = <0xf 0xfe000000 0 0x00001000>;
117 };
118};
119
120&ifc {
121 #address-cells = <2>;
122 #size-cells = <1>;
123 compatible = "fsl,ifc", "simple-bus";
124 interrupts = <25 2 0 0>;
125};
126
127&soc {
128 #address-cells = <1>;
129 #size-cells = <1>;
130 device_type = "soc";
131 compatible = "simple-bus";
132
133 soc-sram-error {
134 compatible = "fsl,soc-sram-error";
135 interrupts = <16 2 1 2>;
136 };
137
138 corenet-law@0 {
139 compatible = "fsl,corenet-law";
140 reg = <0x0 0x1000>;
141 fsl,num-laws = <32>;
142 };
143
144 ddr1: memory-controller@8000 {
145 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
146 reg = <0x8000 0x1000>;
147 interrupts = <16 2 1 8>;
148 };
149
150 ddr2: memory-controller@9000 {
151 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
152 reg = <0x9000 0x1000>;
153 interrupts = <16 2 1 9>;
154 };
155
156 cpc: l3-cache-controller@10000 {
157 compatible = "fsl,b4-l3-cache-controller", "cache";
158 reg = <0x10000 0x1000
159 0x11000 0x1000>;
160 interrupts = <16 2 1 4>;
161 };
162
163 corenet-cf@18000 {
164 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
165 reg = <0x18000 0x1000>;
166 interrupts = <16 2 1 0>;
167 fsl,ccf-num-csdids = <32>;
168 fsl,ccf-num-snoopids = <32>;
169 };
170
171 iommu@20000 {
172 compatible = "fsl,pamu-v1.0", "fsl,pamu";
173 reg = <0x20000 0x4000>;
174 fsl,portid-mapping = <0x8000>;
175 #address-cells = <1>;
176 #size-cells = <1>;
177 interrupts = <
178 24 2 0 0
179 16 2 1 1>;
180 pamu0: pamu@0 {
181 reg = <0 0x1000>;
182 fsl,primary-cache-geometry = <8 1>;
183 fsl,secondary-cache-geometry = <32 2>;
184 };
185 };
186
187/include/ "fsl/qoriq-mpic.dtsi"
188
189 guts: global-utilities@e0000 {
190 compatible = "fsl,b4-device-config";
191 reg = <0xe0000 0xe00>;
192 fsl,has-rstcr;
193 fsl,liodn-bits = <12>;
194 };
195
196/include/ "fsl/qoriq-clockgen2.dtsi"
197 global-utilities@e1000 {
198 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
199 };
200
201/include/ "fsl/qoriq-dma-0.dtsi"
202 dma@100300 {
203 fsl,iommu-parent = <&pamu0>;
204 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
205 };
206
207/include/ "fsl/qoriq-dma-1.dtsi"
208 dma@101300 {
209 fsl,iommu-parent = <&pamu0>;
210 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
211 };
212
213/include/ "fsl/qoriq-i2c-0.dtsi"
214/include/ "fsl/qoriq-i2c-1.dtsi"
215/include/ "fsl/qoriq-duart-0.dtsi"
216/include/ "fsl/qoriq-duart-1.dtsi"
217
218 L2: l2-cache-controller@c20000 {
219 compatible = "fsl,b4-l2-cache-controller";
220 reg = <0xc20000 0x1000>;
221 next-level-cache = <&cpc>;
222 };
223};
diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
index e5bde0b85135..24ed80dc2120 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * B4420DS Device Tree Source 2 * B4420DS Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor, Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor, Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -97,10 +97,25 @@
97 device_type = "memory"; 97 device_type = "memory";
98 }; 98 };
99 99
100 reserved-memory {
101 #address-cells = <2>;
102 #size-cells = <2>;
103 ranges;
104
105 bman_fbpr: bman-fbpr {
106 size = <0 0x1000000>;
107 alignment = <0 0x1000000>;
108 };
109 };
110
100 dcsr: dcsr@f00000000 { 111 dcsr: dcsr@f00000000 {
101 ranges = <0x00000000 0xf 0x00000000 0x01052000>; 112 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
102 }; 113 };
103 114
115 bportals: bman-portals@ff4000000 {
116 ranges = <0x0 0xf 0xf4000000 0x2000000>;
117 };
118
104 soc: soc@ffe000000 { 119 soc: soc@ffe000000 {
105 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 120 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
106 reg = <0xf 0xfe000000 0 0x00001000>; 121 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 65100b9636b7..f35e9e0a5445 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * B4860 Silicon/SoC Device Tree Source (post include) 2 * B4860 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -109,6 +109,64 @@
109 }; 109 };
110}; 110};
111 111
112&bportals {
113 bman-portal@38000 {
114 compatible = "fsl,bman-portal";
115 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
116 interrupts = <133 2 0 0>;
117 };
118 bman-portal@3c000 {
119 compatible = "fsl,bman-portal";
120 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
121 interrupts = <135 2 0 0>;
122 };
123 bman-portal@40000 {
124 compatible = "fsl,bman-portal";
125 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
126 interrupts = <137 2 0 0>;
127 };
128 bman-portal@44000 {
129 compatible = "fsl,bman-portal";
130 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
131 interrupts = <139 2 0 0>;
132 };
133 bman-portal@48000 {
134 compatible = "fsl,bman-portal";
135 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
136 interrupts = <141 2 0 0>;
137 };
138 bman-portal@4c000 {
139 compatible = "fsl,bman-portal";
140 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
141 interrupts = <143 2 0 0>;
142 };
143 bman-portal@50000 {
144 compatible = "fsl,bman-portal";
145 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
146 interrupts = <145 2 0 0>;
147 };
148 bman-portal@54000 {
149 compatible = "fsl,bman-portal";
150 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
151 interrupts = <147 2 0 0>;
152 };
153 bman-portal@58000 {
154 compatible = "fsl,bman-portal";
155 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
156 interrupts = <149 2 0 0>;
157 };
158 bman-portal@5c000 {
159 compatible = "fsl,bman-portal";
160 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
161 interrupts = <151 2 0 0>;
162 };
163 bman-portal@60000 {
164 compatible = "fsl,bman-portal";
165 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
166 interrupts = <153 2 0 0>;
167 };
168};
169
112&soc { 170&soc {
113 ddr2: memory-controller@9000 { 171 ddr2: memory-controller@9000 {
114 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 172 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 1a54ba71f685..73136c0029d2 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * B4420 Silicon/SoC Device Tree Source (post include) 2 * B4420 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor, Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor, Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * this software, even if advised of the possibility of such damage. 32 * this software, even if advised of the possibility of such damage.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -128,6 +133,83 @@
128 }; 133 };
129}; 134};
130 135
136&bportals {
137 #address-cells = <0x1>;
138 #size-cells = <0x1>;
139 compatible = "simple-bus";
140
141 bman-portal@0 {
142 compatible = "fsl,bman-portal";
143 reg = <0x0 0x4000>, <0x1000000 0x1000>;
144 interrupts = <105 2 0 0>;
145 };
146 bman-portal@4000 {
147 compatible = "fsl,bman-portal";
148 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
149 interrupts = <107 2 0 0>;
150 };
151 bman-portal@8000 {
152 compatible = "fsl,bman-portal";
153 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
154 interrupts = <109 2 0 0>;
155 };
156 bman-portal@c000 {
157 compatible = "fsl,bman-portal";
158 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
159 interrupts = <111 2 0 0>;
160 };
161 bman-portal@10000 {
162 compatible = "fsl,bman-portal";
163 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
164 interrupts = <113 2 0 0>;
165 };
166 bman-portal@14000 {
167 compatible = "fsl,bman-portal";
168 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
169 interrupts = <115 2 0 0>;
170 };
171 bman-portal@18000 {
172 compatible = "fsl,bman-portal";
173 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
174 interrupts = <117 2 0 0>;
175 };
176 bman-portal@1c000 {
177 compatible = "fsl,bman-portal";
178 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
179 interrupts = <119 2 0 0>;
180 };
181 bman-portal@20000 {
182 compatible = "fsl,bman-portal";
183 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
184 interrupts = <121 2 0 0>;
185 };
186 bman-portal@24000 {
187 compatible = "fsl,bman-portal";
188 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
189 interrupts = <123 2 0 0>;
190 };
191 bman-portal@28000 {
192 compatible = "fsl,bman-portal";
193 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
194 interrupts = <125 2 0 0>;
195 };
196 bman-portal@2c000 {
197 compatible = "fsl,bman-portal";
198 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
199 interrupts = <127 2 0 0>;
200 };
201 bman-portal@30000 {
202 compatible = "fsl,bman-portal";
203 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
204 interrupts = <129 2 0 0>;
205 };
206 bman-portal@34000 {
207 compatible = "fsl,bman-portal";
208 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
209 interrupts = <131 2 0 0>;
210 };
211};
212
131&soc { 213&soc {
132 #address-cells = <1>; 214 #address-cells = <1>;
133 #size-cells = <1>; 215 #size-cells = <1>;
@@ -261,6 +343,11 @@
261/include/ "qoriq-duart-1.dtsi" 343/include/ "qoriq-duart-1.dtsi"
262/include/ "qoriq-sec5.3-0.dtsi" 344/include/ "qoriq-sec5.3-0.dtsi"
263 345
346/include/ "qoriq-bman1.dtsi"
347 bman: bman@31a000 {
348 interrupts = <16 2 1 29>;
349 };
350
264 L2: l2-cache-controller@c20000 { 351 L2: l2-cache-controller@c20000 {
265 compatible = "fsl,b4-l2-cache-controller"; 352 compatible = "fsl,b4-l2-cache-controller";
266 reg = <0xc20000 0x1000>; 353 reg = <0xc20000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index 81437fdf1db4..7780f21430cb 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1023/P1017 Silicon/SoC Device Tree Source (post include) 2 * P1023/P1017 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -97,6 +102,28 @@
97 }; 102 };
98}; 103};
99 104
105&bportals {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 compatible = "simple-bus";
109
110 bman-portal@0 {
111 compatible = "fsl,bman-portal";
112 reg = <0x0 0x4000>, <0x100000 0x1000>;
113 interrupts = <30 2 0 0>;
114 };
115 bman-portal@4000 {
116 compatible = "fsl,bman-portal";
117 reg = <0x4000 0x4000>, <0x101000 0x1000>;
118 interrupts = <32 2 0 0>;
119 };
120 bman-portal@8000 {
121 compatible = "fsl,bman-portal";
122 reg = <0x8000 0x4000>, <0x102000 0x1000>;
123 interrupts = <34 2 0 0>;
124 };
125};
126
100&soc { 127&soc {
101 #address-cells = <1>; 128 #address-cells = <1>;
102 #size-cells = <1>; 129 #size-cells = <1>;
@@ -221,6 +248,14 @@
221/include/ "pq3-mpic.dtsi" 248/include/ "pq3-mpic.dtsi"
222/include/ "pq3-mpic-timer-B.dtsi" 249/include/ "pq3-mpic-timer-B.dtsi"
223 250
251 bman: bman@8a000 {
252 compatible = "fsl,bman";
253 reg = <0x8a000 0x1000>;
254 interrupts = <16 2 0 0>;
255 fsl,bman-portals = <&bportals>;
256 memory-region = <&bman_fbpr>;
257 };
258
224 global-utilities@e0000 { 259 global-utilities@e0000 {
225 compatible = "fsl,p1023-guts"; 260 compatible = "fsl,p1023-guts";
226 reg = <0xe0000 0x1000>; 261 reg = <0xe0000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index efd74db4f9b0..f2feacfd9a25 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P2041/P2040 Silicon/SoC Device Tree Source (post include) 2 * P2041/P2040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -216,6 +221,8 @@
216 }; 221 };
217}; 222};
218 223
224/include/ "qoriq-bman1-portals.dtsi"
225
219&soc { 226&soc {
220 #address-cells = <1>; 227 #address-cells = <1>;
221 #size-cells = <1>; 228 #size-cells = <1>;
@@ -407,4 +414,6 @@
407crypto: crypto@300000 { 414crypto: crypto@300000 {
408 fsl,iommu-parent = <&pamu1>; 415 fsl,iommu-parent = <&pamu1>;
409 }; 416 };
417
418/include/ "qoriq-bman1.dtsi"
410}; 419};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index d7425ef1ae41..d6fea37395ad 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P3041 Silicon/SoC Device Tree Source (post include) 2 * P3041 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -243,6 +248,8 @@
243 }; 248 };
244}; 249};
245 250
251/include/ "qoriq-bman1-portals.dtsi"
252
246&soc { 253&soc {
247 #address-cells = <1>; 254 #address-cells = <1>;
248 #size-cells = <1>; 255 #size-cells = <1>;
@@ -434,4 +441,6 @@
434crypto: crypto@300000 { 441crypto: crypto@300000 {
435 fsl,iommu-parent = <&pamu1>; 442 fsl,iommu-parent = <&pamu1>;
436 }; 443 };
444
445/include/ "qoriq-bman1.dtsi"
437}; 446};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 7005a4a4cef0..89482c9b2301 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (post include) 2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -243,6 +248,8 @@
243 248
244}; 249};
245 250
251/include/ "qoriq-bman1-portals.dtsi"
252
246&soc { 253&soc {
247 #address-cells = <1>; 254 #address-cells = <1>;
248 #size-cells = <1>; 255 #size-cells = <1>;
@@ -490,4 +497,6 @@
490crypto: crypto@300000 { 497crypto: crypto@300000 {
491 fsl,iommu-parent = <&pamu1>; 498 fsl,iommu-parent = <&pamu1>;
492 }; 499 };
500
501/include/ "qoriq-bman1.dtsi"
493}; 502};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 55834211bd28..6e04851e2fc9 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5020/5010 Silicon/SoC Device Tree Source (post include) 2 * P5020/5010 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -240,6 +245,8 @@
240 }; 245 };
241}; 246};
242 247
248/include/ "qoriq-bman1-portals.dtsi"
249
243&soc { 250&soc {
244 #address-cells = <1>; 251 #address-cells = <1>;
245 #size-cells = <1>; 252 #size-cells = <1>;
@@ -421,6 +428,8 @@
421 fsl,iommu-parent = <&pamu1>; 428 fsl,iommu-parent = <&pamu1>;
422 }; 429 };
423 430
431/include/ "qoriq-bman1.dtsi"
432
424/include/ "qoriq-raid1.0-0.dtsi" 433/include/ "qoriq-raid1.0-0.dtsi"
425 raideng@320000 { 434 raideng@320000 {
426 fsl,iommu-parent = <&pamu1>; 435 fsl,iommu-parent = <&pamu1>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 6e4cd6ce363c..5e44dfa1e1a5 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5040 Silicon/SoC Device Tree Source (post include) 2 * P5040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * software, even if advised of the possibility of such damage. 32 * software, even if advised of the possibility of such damage.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -195,6 +200,8 @@
195 }; 200 };
196}; 201};
197 202
203/include/ "qoriq-bman1-portals.dtsi"
204
198&soc { 205&soc {
199 #address-cells = <1>; 206 #address-cells = <1>;
200 #size-cells = <1>; 207 #size-cells = <1>;
@@ -399,4 +406,6 @@
399 crypto@300000 { 406 crypto@300000 {
400 fsl,iommu-parent = <&pamu4>; 407 fsl,iommu-parent = <&pamu4>;
401 }; 408 };
409
410/include/ "qoriq-bman1.dtsi"
402}; 411};
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 15ae462e758f..5cc01be5b152 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T1040 Silicon/SoC Device Tree Source (post include) 2 * T1040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -218,6 +223,63 @@
218 }; 223 };
219}; 224};
220 225
226&bportals {
227 #address-cells = <0x1>;
228 #size-cells = <0x1>;
229 compatible = "simple-bus";
230
231 bman-portal@0 {
232 compatible = "fsl,bman-portal";
233 reg = <0x0 0x4000>, <0x1000000 0x1000>;
234 interrupts = <105 2 0 0>;
235 };
236 bman-portal@4000 {
237 compatible = "fsl,bman-portal";
238 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
239 interrupts = <107 2 0 0>;
240 };
241 bman-portal@8000 {
242 compatible = "fsl,bman-portal";
243 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
244 interrupts = <109 2 0 0>;
245 };
246 bman-portal@c000 {
247 compatible = "fsl,bman-portal";
248 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
249 interrupts = <111 2 0 0>;
250 };
251 bman-portal@10000 {
252 compatible = "fsl,bman-portal";
253 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
254 interrupts = <113 2 0 0>;
255 };
256 bman-portal@14000 {
257 compatible = "fsl,bman-portal";
258 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
259 interrupts = <115 2 0 0>;
260 };
261 bman-portal@18000 {
262 compatible = "fsl,bman-portal";
263 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
264 interrupts = <117 2 0 0>;
265 };
266 bman-portal@1c000 {
267 compatible = "fsl,bman-portal";
268 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
269 interrupts = <119 2 0 0>;
270 };
271 bman-portal@20000 {
272 compatible = "fsl,bman-portal";
273 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
274 interrupts = <121 2 0 0>;
275 };
276 bman-portal@24000 {
277 compatible = "fsl,bman-portal";
278 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
279 interrupts = <123 2 0 0>;
280 };
281};
282
221&soc { 283&soc {
222 #address-cells = <1>; 284 #address-cells = <1>;
223 #size-cells = <1>; 285 #size-cells = <1>;
@@ -401,4 +463,5 @@
401 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */ 463 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
402 }; 464 };
403/include/ "qoriq-sec5.0-0.dtsi" 465/include/ "qoriq-sec5.0-0.dtsi"
466/include/ "qoriq-bman1.dtsi"
404}; 467};
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index 1ce91e3485a9..86bdaf6cbd14 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T2081 Silicon/SoC Device Tree Source (post include) 2 * T2081 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -224,6 +229,103 @@
224 }; 229 };
225}; 230};
226 231
232&bportals {
233 #address-cells = <0x1>;
234 #size-cells = <0x1>;
235 compatible = "simple-bus";
236
237 bman-portal@0 {
238 compatible = "fsl,bman-portal";
239 reg = <0x0 0x4000>, <0x1000000 0x1000>;
240 interrupts = <105 2 0 0>;
241 };
242 bman-portal@4000 {
243 compatible = "fsl,bman-portal";
244 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
245 interrupts = <107 2 0 0>;
246 };
247 bman-portal@8000 {
248 compatible = "fsl,bman-portal";
249 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
250 interrupts = <109 2 0 0>;
251 };
252 bman-portal@c000 {
253 compatible = "fsl,bman-portal";
254 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
255 interrupts = <111 2 0 0>;
256 };
257 bman-portal@10000 {
258 compatible = "fsl,bman-portal";
259 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
260 interrupts = <113 2 0 0>;
261 };
262 bman-portal@14000 {
263 compatible = "fsl,bman-portal";
264 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
265 interrupts = <115 2 0 0>;
266 };
267 bman-portal@18000 {
268 compatible = "fsl,bman-portal";
269 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
270 interrupts = <117 2 0 0>;
271 };
272 bman-portal@1c000 {
273 compatible = "fsl,bman-portal";
274 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
275 interrupts = <119 2 0 0>;
276 };
277 bman-portal@20000 {
278 compatible = "fsl,bman-portal";
279 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
280 interrupts = <121 2 0 0>;
281 };
282 bman-portal@24000 {
283 compatible = "fsl,bman-portal";
284 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
285 interrupts = <123 2 0 0>;
286 };
287 bman-portal@28000 {
288 compatible = "fsl,bman-portal";
289 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
290 interrupts = <125 2 0 0>;
291 };
292 bman-portal@2c000 {
293 compatible = "fsl,bman-portal";
294 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
295 interrupts = <127 2 0 0>;
296 };
297 bman-portal@30000 {
298 compatible = "fsl,bman-portal";
299 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
300 interrupts = <129 2 0 0>;
301 };
302 bman-portal@34000 {
303 compatible = "fsl,bman-portal";
304 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
305 interrupts = <131 2 0 0>;
306 };
307 bman-portal@38000 {
308 compatible = "fsl,bman-portal";
309 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
310 interrupts = <133 2 0 0>;
311 };
312 bman-portal@3c000 {
313 compatible = "fsl,bman-portal";
314 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
315 interrupts = <135 2 0 0>;
316 };
317 bman-portal@40000 {
318 compatible = "fsl,bman-portal";
319 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
320 interrupts = <137 2 0 0>;
321 };
322 bman-portal@44000 {
323 compatible = "fsl,bman-portal";
324 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
325 interrupts = <139 2 0 0>;
326 };
327};
328
227&soc { 329&soc {
228 #address-cells = <1>; 330 #address-cells = <1>;
229 #size-cells = <1>; 331 #size-cells = <1>;
@@ -400,6 +502,7 @@
400 phy_type = "utmi"; 502 phy_type = "utmi";
401 }; 503 };
402/include/ "qoriq-sec5.2-0.dtsi" 504/include/ "qoriq-sec5.2-0.dtsi"
505/include/ "qoriq-bman1.dtsi"
403 506
404 L2_1: l2-cache-controller@c20000 { 507 L2_1: l2-cache-controller@c20000 {
405 /* Cluster 0 L2 cache */ 508 /* Cluster 0 L2 cache */
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 0e96fcabe812..4d4f25895d8c 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T4240 Silicon/SoC Device Tree Source (post include) 2 * T4240 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -294,6 +299,263 @@
294 }; 299 };
295}; 300};
296 301
302&bportals {
303 #address-cells = <0x1>;
304 #size-cells = <0x1>;
305 compatible = "simple-bus";
306
307 bman-portal@0 {
308 compatible = "fsl,bman-portal";
309 reg = <0x0 0x4000>, <0x1000000 0x1000>;
310 interrupts = <105 2 0 0>;
311 };
312 bman-portal@4000 {
313 compatible = "fsl,bman-portal";
314 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
315 interrupts = <107 2 0 0>;
316 };
317 bman-portal@8000 {
318 compatible = "fsl,bman-portal";
319 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
320 interrupts = <109 2 0 0>;
321 };
322 bman-portal@c000 {
323 compatible = "fsl,bman-portal";
324 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
325 interrupts = <111 2 0 0>;
326 };
327 bman-portal@10000 {
328 compatible = "fsl,bman-portal";
329 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
330 interrupts = <113 2 0 0>;
331 };
332 bman-portal@14000 {
333 compatible = "fsl,bman-portal";
334 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
335 interrupts = <115 2 0 0>;
336 };
337 bman-portal@18000 {
338 compatible = "fsl,bman-portal";
339 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
340 interrupts = <117 2 0 0>;
341 };
342 bman-portal@1c000 {
343 compatible = "fsl,bman-portal";
344 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
345 interrupts = <119 2 0 0>;
346 };
347 bman-portal@20000 {
348 compatible = "fsl,bman-portal";
349 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
350 interrupts = <121 2 0 0>;
351 };
352 bman-portal@24000 {
353 compatible = "fsl,bman-portal";
354 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
355 interrupts = <123 2 0 0>;
356 };
357 bman-portal@28000 {
358 compatible = "fsl,bman-portal";
359 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
360 interrupts = <125 2 0 0>;
361 };
362 bman-portal@2c000 {
363 compatible = "fsl,bman-portal";
364 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
365 interrupts = <127 2 0 0>;
366 };
367 bman-portal@30000 {
368 compatible = "fsl,bman-portal";
369 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
370 interrupts = <129 2 0 0>;
371 };
372 bman-portal@34000 {
373 compatible = "fsl,bman-portal";
374 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
375 interrupts = <131 2 0 0>;
376 };
377 bman-portal@38000 {
378 compatible = "fsl,bman-portal";
379 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
380 interrupts = <133 2 0 0>;
381 };
382 bman-portal@3c000 {
383 compatible = "fsl,bman-portal";
384 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
385 interrupts = <135 2 0 0>;
386 };
387 bman-portal@40000 {
388 compatible = "fsl,bman-portal";
389 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
390 interrupts = <137 2 0 0>;
391 };
392 bman-portal@44000 {
393 compatible = "fsl,bman-portal";
394 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
395 interrupts = <139 2 0 0>;
396 };
397 bman-portal@48000 {
398 compatible = "fsl,bman-portal";
399 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
400 interrupts = <141 2 0 0>;
401 };
402 bman-portal@4c000 {
403 compatible = "fsl,bman-portal";
404 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
405 interrupts = <143 2 0 0>;
406 };
407 bman-portal@50000 {
408 compatible = "fsl,bman-portal";
409 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
410 interrupts = <145 2 0 0>;
411 };
412 bman-portal@54000 {
413 compatible = "fsl,bman-portal";
414 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
415 interrupts = <147 2 0 0>;
416 };
417 bman-portal@58000 {
418 compatible = "fsl,bman-portal";
419 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
420 interrupts = <149 2 0 0>;
421 };
422 bman-portal@5c000 {
423 compatible = "fsl,bman-portal";
424 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
425 interrupts = <151 2 0 0>;
426 };
427 bman-portal@60000 {
428 compatible = "fsl,bman-portal";
429 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
430 interrupts = <153 2 0 0>;
431 };
432 bman-portal@64000 {
433 compatible = "fsl,bman-portal";
434 reg = <0x64000 0x4000>, <0x1019000 0x1000>;
435 interrupts = <155 2 0 0>;
436 };
437 bman-portal@68000 {
438 compatible = "fsl,bman-portal";
439 reg = <0x68000 0x4000>, <0x101a000 0x1000>;
440 interrupts = <157 2 0 0>;
441 };
442 bman-portal@6c000 {
443 compatible = "fsl,bman-portal";
444 reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
445 interrupts = <159 2 0 0>;
446 };
447 bman-portal@70000 {
448 compatible = "fsl,bman-portal";
449 reg = <0x70000 0x4000>, <0x101c000 0x1000>;
450 interrupts = <161 2 0 0>;
451 };
452 bman-portal@74000 {
453 compatible = "fsl,bman-portal";
454 reg = <0x74000 0x4000>, <0x101d000 0x1000>;
455 interrupts = <163 2 0 0>;
456 };
457 bman-portal@78000 {
458 compatible = "fsl,bman-portal";
459 reg = <0x78000 0x4000>, <0x101e000 0x1000>;
460 interrupts = <165 2 0 0>;
461 };
462 bman-portal@7c000 {
463 compatible = "fsl,bman-portal";
464 reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
465 interrupts = <167 2 0 0>;
466 };
467 bman-portal@80000 {
468 compatible = "fsl,bman-portal";
469 reg = <0x80000 0x4000>, <0x1020000 0x1000>;
470 interrupts = <169 2 0 0>;
471 };
472 bman-portal@84000 {
473 compatible = "fsl,bman-portal";
474 reg = <0x84000 0x4000>, <0x1021000 0x1000>;
475 interrupts = <171 2 0 0>;
476 };
477 bman-portal@88000 {
478 compatible = "fsl,bman-portal";
479 reg = <0x88000 0x4000>, <0x1022000 0x1000>;
480 interrupts = <173 2 0 0>;
481 };
482 bman-portal@8c000 {
483 compatible = "fsl,bman-portal";
484 reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
485 interrupts = <175 2 0 0>;
486 };
487 bman-portal@90000 {
488 compatible = "fsl,bman-portal";
489 reg = <0x90000 0x4000>, <0x1024000 0x1000>;
490 interrupts = <385 2 0 0>;
491 };
492 bman-portal@94000 {
493 compatible = "fsl,bman-portal";
494 reg = <0x94000 0x4000>, <0x1025000 0x1000>;
495 interrupts = <387 2 0 0>;
496 };
497 bman-portal@98000 {
498 compatible = "fsl,bman-portal";
499 reg = <0x98000 0x4000>, <0x1026000 0x1000>;
500 interrupts = <389 2 0 0>;
501 };
502 bman-portal@9c000 {
503 compatible = "fsl,bman-portal";
504 reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
505 interrupts = <391 2 0 0>;
506 };
507 bman-portal@a0000 {
508 compatible = "fsl,bman-portal";
509 reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
510 interrupts = <393 2 0 0>;
511 };
512 bman-portal@a4000 {
513 compatible = "fsl,bman-portal";
514 reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
515 interrupts = <395 2 0 0>;
516 };
517 bman-portal@a8000 {
518 compatible = "fsl,bman-portal";
519 reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
520 interrupts = <397 2 0 0>;
521 };
522 bman-portal@ac000 {
523 compatible = "fsl,bman-portal";
524 reg = <0xac000 0x4000>, <0x102b000 0x1000>;
525 interrupts = <399 2 0 0>;
526 };
527 bman-portal@b0000 {
528 compatible = "fsl,bman-portal";
529 reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
530 interrupts = <401 2 0 0>;
531 };
532 bman-portal@b4000 {
533 compatible = "fsl,bman-portal";
534 reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
535 interrupts = <403 2 0 0>;
536 };
537 bman-portal@b8000 {
538 compatible = "fsl,bman-portal";
539 reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
540 interrupts = <405 2 0 0>;
541 };
542 bman-portal@bc000 {
543 compatible = "fsl,bman-portal";
544 reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
545 interrupts = <407 2 0 0>;
546 };
547 bman-portal@c0000 {
548 compatible = "fsl,bman-portal";
549 reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
550 interrupts = <409 2 0 0>;
551 };
552 bman-portal@c4000 {
553 compatible = "fsl,bman-portal";
554 reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
555 interrupts = <411 2 0 0>;
556 };
557};
558
297&soc { 559&soc {
298 #address-cells = <1>; 560 #address-cells = <1>;
299 #size-cells = <1>; 561 #size-cells = <1>;
@@ -486,6 +748,7 @@
486/include/ "qoriq-sata2-0.dtsi" 748/include/ "qoriq-sata2-0.dtsi"
487/include/ "qoriq-sata2-1.dtsi" 749/include/ "qoriq-sata2-1.dtsi"
488/include/ "qoriq-sec5.0-0.dtsi" 750/include/ "qoriq-sec5.0-0.dtsi"
751/include/ "qoriq-bman1.dtsi"
489 752
490 L2_1: l2-cache-controller@c20000 { 753 L2_1: l2-cache-controller@c20000 {
491 compatible = "fsl,t4240-l2-cache-controller"; 754 compatible = "fsl,t4240-l2-cache-controller";
diff --git a/arch/powerpc/boot/dts/kmcoge4.dts b/arch/powerpc/boot/dts/kmcoge4.dts
index 89b4119f3b19..97e6d11d1e6d 100644
--- a/arch/powerpc/boot/dts/kmcoge4.dts
+++ b/arch/powerpc/boot/dts/kmcoge4.dts
@@ -25,10 +25,25 @@
25 device_type = "memory"; 25 device_type = "memory";
26 }; 26 };
27 27
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
31 ranges;
32
33 bman_fbpr: bman-fbpr {
34 size = <0 0x1000000>;
35 alignment = <0 0x1000000>;
36 };
37 };
38
28 dcsr: dcsr@f00000000 { 39 dcsr: dcsr@f00000000 {
29 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 40 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
30 }; 41 };
31 42
43 bportals: bman-portals@ff4000000 {
44 ranges = <0x0 0xf 0xf4000000 0x200000>;
45 };
46
32 soc: soc@ffe000000 { 47 soc: soc@ffe000000 {
33 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 48 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
34 reg = <0xf 0xfe000000 0 0x00001000>; 49 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/oca4080.dts b/arch/powerpc/boot/dts/oca4080.dts
index 3d4c751d1608..eb76caae11d9 100644
--- a/arch/powerpc/boot/dts/oca4080.dts
+++ b/arch/powerpc/boot/dts/oca4080.dts
@@ -49,10 +49,25 @@
49 device_type = "memory"; 49 device_type = "memory";
50 }; 50 };
51 51
52 reserved-memory {
53 #address-cells = <2>;
54 #size-cells = <2>;
55 ranges;
56
57 bman_fbpr: bman-fbpr {
58 size = <0 0x1000000>;
59 alignment = <0 0x1000000>;
60 };
61 };
62
52 dcsr: dcsr@f00000000 { 63 dcsr: dcsr@f00000000 {
53 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 64 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
54 }; 65 };
55 66
67 bportals: bman-portals@ff4000000 {
68 ranges = <0x0 0xf 0xf4000000 0x200000>;
69 };
70
56 soc: soc@ffe000000 { 71 soc: soc@ffe000000 {
57 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 72 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
58 reg = <0xf 0xfe000000 0 0x00001000>; 73 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p1023rdb.dts b/arch/powerpc/boot/dts/p1023rdb.dts
index 0a06a88ddbd5..9236e3742a23 100644
--- a/arch/powerpc/boot/dts/p1023rdb.dts
+++ b/arch/powerpc/boot/dts/p1023rdb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1023 RDB Device Tree Source 2 * P1023 RDB Device Tree Source
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com> 6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
7 * 7 *
@@ -47,6 +47,21 @@
47 device_type = "memory"; 47 device_type = "memory";
48 }; 48 };
49 49
50 reserved-memory {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 ranges;
54
55 bman_fbpr: bman-fbpr {
56 size = <0 0x1000000>;
57 alignment = <0 0x1000000>;
58 };
59 };
60
61 bportals: bman-portals@ff200000 {
62 ranges = <0x0 0xf 0xff200000 0x200000>;
63 };
64
50 soc: soc@ff600000 { 65 soc: soc@ff600000 {
51 ranges = <0x0 0x0 0xff600000 0x200000>; 66 ranges = <0x0 0x0 0xff600000 0x200000>;
52 67
@@ -228,7 +243,6 @@
228 0x0 0x100000>; 243 0x0 0x100000>;
229 }; 244 };
230 }; 245 };
231
232}; 246};
233 247
234/include/ "fsl/p1023si-post.dtsi" 248/include/ "fsl/p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index d97ad74c7279..c1e69dc7188e 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P2041RDB Device Tree Source 2 * P2041RDB Device Tree Source
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 394ea9c943c9..2192fe94866d 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P3041DS Device Tree Source 2 * P3041DS Device Tree Source
3 * 3 *
4 * Copyright 2010-2011 Freescale Semiconductor Inc. 4 * Copyright 2010 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 1cf6148b8b05..fad441654642 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P4080DS Device Tree Source 2 * P4080DS Device Tree Source
3 * 3 *
4 * Copyright 2009-2011 Freescale Semiconductor Inc. 4 * Copyright 2009 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index b7f3057cd894..7382636dc560 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5020DS Device Tree Source 2 * P5020DS Device Tree Source
3 * 3 *
4 * Copyright 2010-2011 Freescale Semiconductor Inc. 4 * Copyright 2010 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts
index 7e04bf487c04..35dabf5b6098 100644
--- a/arch/powerpc/boot/dts/p5040ds.dts
+++ b/arch/powerpc/boot/dts/p5040ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5040DS Device Tree Source 2 * P5040DS Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t104xqds.dtsi b/arch/powerpc/boot/dts/t104xqds.dtsi
index 234f4b596c5b..f7e9bfbeefc7 100644
--- a/arch/powerpc/boot/dts/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/t104xqds.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T104xQDS Device Tree Source 2 * T104xQDS Device Tree Source
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -38,6 +38,17 @@
38 #size-cells = <2>; 38 #size-cells = <2>;
39 interrupt-parent = <&mpic>; 39 interrupt-parent = <&mpic>;
40 40
41 reserved-memory {
42 #address-cells = <2>;
43 #size-cells = <2>;
44 ranges;
45
46 bman_fbpr: bman-fbpr {
47 size = <0 0x1000000>;
48 alignment = <0 0x1000000>;
49 };
50 };
51
41 ifc: localbus@ffe124000 { 52 ifc: localbus@ffe124000 {
42 reg = <0xf 0xfe124000 0 0x2000>; 53 reg = <0xf 0xfe124000 0 0x2000>;
43 ranges = <0 0 0xf 0xe8000000 0x08000000 54 ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -77,6 +88,10 @@
77 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 88 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
78 }; 89 };
79 90
91 bportals: bman-portals@ff4000000 {
92 ranges = <0x0 0xf 0xf4000000 0x2000000>;
93 };
94
80 soc: soc@ffe000000 { 95 soc: soc@ffe000000 {
81 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 96 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
82 reg = <0xf 0xfe000000 0 0x00001000>; 97 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t104xrdb.dtsi b/arch/powerpc/boot/dts/t104xrdb.dtsi
index 187add885cae..76e07a3f2ca8 100644
--- a/arch/powerpc/boot/dts/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/t104xrdb.dtsi
@@ -33,6 +33,16 @@
33 */ 33 */
34 34
35/ { 35/ {
36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
39 ranges;
40
41 bman_fbpr: bman-fbpr {
42 size = <0 0x1000000>;
43 alignment = <0 0x1000000>;
44 };
45 };
36 46
37 ifc: localbus@ffe124000 { 47 ifc: localbus@ffe124000 {
38 reg = <0xf 0xfe124000 0 0x2000>; 48 reg = <0xf 0xfe124000 0 0x2000>;
@@ -69,6 +79,10 @@
69 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 79 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
70 }; 80 };
71 81
82 bportals: bman-portals@ff4000000 {
83 ranges = <0x0 0xf 0xf4000000 0x2000000>;
84 };
85
72 soc: soc@ffe000000 { 86 soc: soc@ffe000000 {
73 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 87 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
74 reg = <0xf 0xfe000000 0 0x00001000>; 88 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t208xqds.dtsi b/arch/powerpc/boot/dts/t208xqds.dtsi
index 59061834d54e..c42e07f4f648 100644
--- a/arch/powerpc/boot/dts/t208xqds.dtsi
+++ b/arch/powerpc/boot/dts/t208xqds.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T2080/T2081 QDS Device Tree Source 2 * T2080/T2081 QDS Device Tree Source
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -39,6 +39,17 @@
39 #size-cells = <2>; 39 #size-cells = <2>;
40 interrupt-parent = <&mpic>; 40 interrupt-parent = <&mpic>;
41 41
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
45 ranges;
46
47 bman_fbpr: bman-fbpr {
48 size = <0 0x1000000>;
49 alignment = <0 0x1000000>;
50 };
51 };
52
42 ifc: localbus@ffe124000 { 53 ifc: localbus@ffe124000 {
43 reg = <0xf 0xfe124000 0 0x2000>; 54 reg = <0xf 0xfe124000 0 0x2000>;
44 ranges = <0 0 0xf 0xe8000000 0x08000000 55 ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -78,6 +89,10 @@
78 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 89 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
79 }; 90 };
80 91
92 bportals: bman-portals@ff4000000 {
93 ranges = <0x0 0xf 0xf4000000 0x2000000>;
94 };
95
81 soc: soc@ffe000000 { 96 soc: soc@ffe000000 {
82 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 97 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
83 reg = <0xf 0xfe000000 0 0x00001000>; 98 reg = <0xf 0xfe000000 0 0x00001000>;
@@ -137,7 +152,7 @@
137 rtc@68 { 152 rtc@68 {
138 compatible = "dallas,ds3232"; 153 compatible = "dallas,ds3232";
139 reg = <0x68>; 154 reg = <0x68>;
140 interrupts = <0x1 0x1 0 0>; 155 interrupts = <0xb 0x1 0 0>;
141 }; 156 };
142 }; 157 };
143 158
diff --git a/arch/powerpc/boot/dts/t208xrdb.dtsi b/arch/powerpc/boot/dts/t208xrdb.dtsi
index 1481e192e783..e1463b165d0e 100644
--- a/arch/powerpc/boot/dts/t208xrdb.dtsi
+++ b/arch/powerpc/boot/dts/t208xrdb.dtsi
@@ -39,6 +39,17 @@
39 #size-cells = <2>; 39 #size-cells = <2>;
40 interrupt-parent = <&mpic>; 40 interrupt-parent = <&mpic>;
41 41
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
45 ranges;
46
47 bman_fbpr: bman-fbpr {
48 size = <0 0x1000000>;
49 alignment = <0 0x1000000>;
50 };
51 };
52
42 ifc: localbus@ffe124000 { 53 ifc: localbus@ffe124000 {
43 reg = <0xf 0xfe124000 0 0x2000>; 54 reg = <0xf 0xfe124000 0 0x2000>;
44 ranges = <0 0 0xf 0xe8000000 0x08000000 55 ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -79,6 +90,10 @@
79 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 90 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
80 }; 91 };
81 92
93 bportals: bman-portals@ff4000000 {
94 ranges = <0x0 0xf 0xf4000000 0x2000000>;
95 };
96
82 soc: soc@ffe000000 { 97 soc: soc@ffe000000 {
83 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 98 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
84 reg = <0xf 0xfe000000 0 0x00001000>; 99 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
index 97683f6a2936..6df77766410b 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * T4240QDS Device Tree Source 2 * T4240QDS Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -100,10 +100,25 @@
100 device_type = "memory"; 100 device_type = "memory";
101 }; 101 };
102 102
103 reserved-memory {
104 #address-cells = <2>;
105 #size-cells = <2>;
106 ranges;
107
108 bman_fbpr: bman-fbpr {
109 size = <0 0x1000000>;
110 alignment = <0 0x1000000>;
111 };
112 };
113
103 dcsr: dcsr@f00000000 { 114 dcsr: dcsr@f00000000 {
104 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 115 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
105 }; 116 };
106 117
118 bportals: bman-portals@ff4000000 {
119 ranges = <0x0 0xf 0xf4000000 0x2000000>;
120 };
121
107 soc: soc@ffe000000 { 122 soc: soc@ffe000000 {
108 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 123 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
109 reg = <0xf 0xfe000000 0 0x00001000>; 124 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts
index 53761d4e8c51..46049cf37f02 100644
--- a/arch/powerpc/boot/dts/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/t4240rdb.dts
@@ -69,10 +69,25 @@
69 device_type = "memory"; 69 device_type = "memory";
70 }; 70 };
71 71
72 reserved-memory {
73 #address-cells = <2>;
74 #size-cells = <2>;
75 ranges;
76
77 bman_fbpr: bman-fbpr {
78 size = <0 0x1000000>;
79 alignment = <0 0x1000000>;
80 };
81 };
82
72 dcsr: dcsr@f00000000 { 83 dcsr: dcsr@f00000000 {
73 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 84 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
74 }; 85 };
75 86
87 bportals: bman-portals@ff4000000 {
88 ranges = <0x0 0xf 0xf4000000 0x2000000>;
89 };
90
76 soc: soc@ffe000000 { 91 soc: soc@ffe000000 {
77 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 92 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
78 reg = <0xf 0xfe000000 0 0x00001000>; 93 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c
index bb8b9b3505ee..535e8fd8900d 100644
--- a/arch/powerpc/boot/libfdt-wrapper.c
+++ b/arch/powerpc/boot/libfdt-wrapper.c
@@ -44,12 +44,12 @@
44 44
45#define offset_devp(off) \ 45#define offset_devp(off) \
46 ({ \ 46 ({ \
47 int _offset = (off); \ 47 unsigned long _offset = (off); \
48 check_err(_offset) ? NULL : (void *)(_offset+1); \ 48 check_err(_offset) ? NULL : (void *)(_offset+1); \
49 }) 49 })
50 50
51#define devp_offset_find(devp) (((int)(devp))-1) 51#define devp_offset_find(devp) (((unsigned long)(devp))-1)
52#define devp_offset(devp) (devp ? ((int)(devp))-1 : 0) 52#define devp_offset(devp) (devp ? ((unsigned long)(devp))-1 : 0)
53 53
54static void *fdt; 54static void *fdt;
55static void *buf; /* = NULL */ 55static void *buf; /* = NULL */
diff --git a/arch/powerpc/boot/libfdt_env.h b/arch/powerpc/boot/libfdt_env.h
index c89fdb1b80e1..8dcd744e5728 100644
--- a/arch/powerpc/boot/libfdt_env.h
+++ b/arch/powerpc/boot/libfdt_env.h
@@ -4,15 +4,17 @@
4#include <types.h> 4#include <types.h>
5#include <string.h> 5#include <string.h>
6 6
7#include "of.h"
8
7typedef u32 uint32_t; 9typedef u32 uint32_t;
8typedef u64 uint64_t; 10typedef u64 uint64_t;
9typedef unsigned long uintptr_t; 11typedef unsigned long uintptr_t;
10 12
11#define fdt16_to_cpu(x) (x) 13#define fdt16_to_cpu(x) be16_to_cpu(x)
12#define cpu_to_fdt16(x) (x) 14#define cpu_to_fdt16(x) cpu_to_be16(x)
13#define fdt32_to_cpu(x) (x) 15#define fdt32_to_cpu(x) be32_to_cpu(x)
14#define cpu_to_fdt32(x) (x) 16#define cpu_to_fdt32(x) cpu_to_be32(x)
15#define fdt64_to_cpu(x) (x) 17#define fdt64_to_cpu(x) be64_to_cpu(x)
16#define cpu_to_fdt64(x) (x) 18#define cpu_to_fdt64(x) cpu_to_be64(x)
17 19
18#endif /* _ARCH_POWERPC_BOOT_LIBFDT_ENV_H */ 20#endif /* _ARCH_POWERPC_BOOT_LIBFDT_ENV_H */
diff --git a/arch/powerpc/boot/of.h b/arch/powerpc/boot/of.h
index c8c1750aba0c..5603320dce07 100644
--- a/arch/powerpc/boot/of.h
+++ b/arch/powerpc/boot/of.h
@@ -24,11 +24,19 @@ void of_console_init(void);
24typedef u32 __be32; 24typedef u32 __be32;
25 25
26#ifdef __LITTLE_ENDIAN__ 26#ifdef __LITTLE_ENDIAN__
27#define cpu_to_be16(x) swab16(x)
28#define be16_to_cpu(x) swab16(x)
27#define cpu_to_be32(x) swab32(x) 29#define cpu_to_be32(x) swab32(x)
28#define be32_to_cpu(x) swab32(x) 30#define be32_to_cpu(x) swab32(x)
31#define cpu_to_be64(x) swab64(x)
32#define be64_to_cpu(x) swab64(x)
29#else 33#else
34#define cpu_to_be16(x) (x)
35#define be16_to_cpu(x) (x)
30#define cpu_to_be32(x) (x) 36#define cpu_to_be32(x) (x)
31#define be32_to_cpu(x) (x) 37#define be32_to_cpu(x) (x)
38#define cpu_to_be64(x) (x)
39#define be64_to_cpu(x) (x)
32#endif 40#endif
33 41
34#define PROM_ERROR (-1u) 42#define PROM_ERROR (-1u)
diff --git a/arch/powerpc/boot/planetcore.c b/arch/powerpc/boot/planetcore.c
index 0d8558a475bb..75117e63e6db 100644
--- a/arch/powerpc/boot/planetcore.c
+++ b/arch/powerpc/boot/planetcore.c
@@ -131,36 +131,3 @@ void planetcore_set_stdout_path(const char *table)
131 131
132 setprop_str(chosen, "linux,stdout-path", path); 132 setprop_str(chosen, "linux,stdout-path", path);
133} 133}
134
135void planetcore_set_serial_speed(const char *table)
136{
137 void *chosen, *stdout;
138 u64 baud;
139 u32 baud32;
140 int len;
141
142 chosen = finddevice("/chosen");
143 if (!chosen)
144 return;
145
146 len = getprop(chosen, "linux,stdout-path", prop_buf, MAX_PROP_LEN);
147 if (len <= 0)
148 return;
149
150 stdout = finddevice(prop_buf);
151 if (!stdout) {
152 printf("planetcore_set_serial_speed: "
153 "Bad /chosen/linux,stdout-path.\r\n");
154
155 return;
156 }
157
158 if (!planetcore_get_decimal(table, PLANETCORE_KEY_SERIAL_BAUD,
159 &baud)) {
160 printf("planetcore_set_serial_speed: No SB tag.\r\n");
161 return;
162 }
163
164 baud32 = baud;
165 setprop(stdout, "current-speed", &baud32, 4);
166}
diff --git a/arch/powerpc/boot/planetcore.h b/arch/powerpc/boot/planetcore.h
index 0d4094f1771c..d53c733cc463 100644
--- a/arch/powerpc/boot/planetcore.h
+++ b/arch/powerpc/boot/planetcore.h
@@ -43,7 +43,4 @@ void planetcore_set_mac_addrs(const char *table);
43 */ 43 */
44void planetcore_set_stdout_path(const char *table); 44void planetcore_set_stdout_path(const char *table);
45 45
46/* Sets the current-speed property in the serial node. */
47void planetcore_set_serial_speed(const char *table);
48
49#endif 46#endif
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index ae0f88ec4a32..3f50c27ed8f8 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -277,7 +277,7 @@ treeboot-iss4xx-mpic)
277 platformo="$object/treeboot-iss4xx.o" 277 platformo="$object/treeboot-iss4xx.o"
278 ;; 278 ;;
279epapr) 279epapr)
280 platformo="$object/epapr.o $object/epapr-wrapper.o" 280 platformo="$object/pseries-head.o $object/epapr.o $object/epapr-wrapper.o"
281 link_address='0x20000000' 281 link_address='0x20000000'
282 pie=-pie 282 pie=-pie
283 ;; 283 ;;
diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig
index 9788b3c2d563..9227b517560a 100644
--- a/arch/powerpc/configs/cell_defconfig
+++ b/arch/powerpc/configs/cell_defconfig
@@ -28,7 +28,6 @@ CONFIG_PS3_ROM=m
28CONFIG_PS3_FLASH=m 28CONFIG_PS3_FLASH=m
29CONFIG_PS3_LPM=m 29CONFIG_PS3_LPM=m
30CONFIG_PPC_IBM_CELL_BLADE=y 30CONFIG_PPC_IBM_CELL_BLADE=y
31CONFIG_PPC_CELLEB=y
32CONFIG_RTAS_FLASH=y 31CONFIG_RTAS_FLASH=y
33CONFIG_CPU_FREQ=y 32CONFIG_CPU_FREQ=y
34CONFIG_CPU_FREQ_GOV_POWERSAVE=y 33CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@@ -113,7 +112,6 @@ CONFIG_IDE=y
113CONFIG_BLK_DEV_GENERIC=y 112CONFIG_BLK_DEV_GENERIC=y
114CONFIG_BLK_DEV_AEC62XX=y 113CONFIG_BLK_DEV_AEC62XX=y
115CONFIG_BLK_DEV_SIIMAGE=y 114CONFIG_BLK_DEV_SIIMAGE=y
116CONFIG_BLK_DEV_CELLEB=y
117CONFIG_BLK_DEV_SD=y 115CONFIG_BLK_DEV_SD=y
118CONFIG_BLK_DEV_SR=m 116CONFIG_BLK_DEV_SR=m
119CONFIG_CHR_DEV_SG=y 117CONFIG_CHR_DEV_SG=y
@@ -156,7 +154,6 @@ CONFIG_SERIAL_TXX9_NR_UARTS=2
156CONFIG_SERIAL_TXX9_CONSOLE=y 154CONFIG_SERIAL_TXX9_CONSOLE=y
157CONFIG_SERIAL_OF_PLATFORM=y 155CONFIG_SERIAL_OF_PLATFORM=y
158CONFIG_HVC_RTAS=y 156CONFIG_HVC_RTAS=y
159CONFIG_HVC_BEAT=y
160CONFIG_IPMI_HANDLER=m 157CONFIG_IPMI_HANDLER=m
161CONFIG_IPMI_DEVICE_INTERFACE=m 158CONFIG_IPMI_DEVICE_INTERFACE=m
162CONFIG_IPMI_SI=m 159CONFIG_IPMI_SI=m
diff --git a/arch/powerpc/configs/celleb_defconfig b/arch/powerpc/configs/celleb_defconfig
deleted file mode 100644
index ff454dcd2dd3..000000000000
--- a/arch/powerpc/configs/celleb_defconfig
+++ /dev/null
@@ -1,152 +0,0 @@
1CONFIG_PPC64=y
2CONFIG_TUNE_CELL=y
3CONFIG_ALTIVEC=y
4CONFIG_SMP=y
5CONFIG_NR_CPUS=4
6CONFIG_SYSVIPC=y
7CONFIG_FHANDLE=y
8CONFIG_NO_HZ=y
9CONFIG_HIGH_RES_TIMERS=y
10CONFIG_IKCONFIG=y
11CONFIG_IKCONFIG_PROC=y
12CONFIG_LOG_BUF_SHIFT=15
13CONFIG_BLK_DEV_INITRD=y
14# CONFIG_COMPAT_BRK is not set
15CONFIG_MODULES=y
16CONFIG_MODULE_UNLOAD=y
17CONFIG_MODVERSIONS=y
18CONFIG_MODULE_SRCVERSION_ALL=y
19CONFIG_PARTITION_ADVANCED=y
20# CONFIG_PPC_POWERNV is not set
21# CONFIG_PPC_PSERIES is not set
22# CONFIG_PPC_PMAC is not set
23CONFIG_PPC_CELLEB=y
24CONFIG_SPU_FS=y
25# CONFIG_CBE_THERM is not set
26CONFIG_UDBG_RTAS_CONSOLE=y
27# CONFIG_RTAS_PROC is not set
28CONFIG_BINFMT_MISC=m
29CONFIG_KEXEC=y
30CONFIG_NUMA=y
31CONFIG_NET=y
32CONFIG_PACKET=y
33CONFIG_UNIX=y
34CONFIG_INET=y
35CONFIG_IP_MULTICAST=y
36CONFIG_SYN_COOKIES=y
37CONFIG_IPV6=y
38CONFIG_INET6_AH=m
39CONFIG_INET6_ESP=m
40CONFIG_INET6_IPCOMP=m
41CONFIG_IPV6_TUNNEL=m
42CONFIG_NETFILTER=y
43CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
44CONFIG_BLK_DEV_LOOP=y
45CONFIG_BLK_DEV_RAM=y
46CONFIG_BLK_DEV_RAM_SIZE=131072
47CONFIG_IDE=y
48CONFIG_BLK_DEV_IDECD=m
49CONFIG_BLK_DEV_GENERIC=y
50CONFIG_BLK_DEV_CELLEB=y
51CONFIG_SCSI=m
52# CONFIG_SCSI_PROC_FS is not set
53CONFIG_BLK_DEV_SD=m
54CONFIG_BLK_DEV_SR=m
55CONFIG_CHR_DEV_SG=m
56CONFIG_MD=y
57CONFIG_BLK_DEV_MD=m
58CONFIG_MD_LINEAR=m
59CONFIG_MD_RAID0=m
60CONFIG_MD_RAID1=m
61CONFIG_BLK_DEV_DM=m
62CONFIG_DM_CRYPT=m
63CONFIG_DM_SNAPSHOT=m
64CONFIG_DM_MIRROR=m
65CONFIG_DM_ZERO=m
66CONFIG_DM_MULTIPATH=m
67CONFIG_NETDEVICES=y
68CONFIG_SPIDER_NET=y
69# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
70# CONFIG_INPUT_KEYBOARD is not set
71# CONFIG_INPUT_MOUSE is not set
72# CONFIG_SERIO_I8042 is not set
73# CONFIG_LEGACY_PTYS is not set
74CONFIG_SERIAL_NONSTANDARD=y
75CONFIG_SERIAL_TXX9_NR_UARTS=3
76CONFIG_SERIAL_TXX9_CONSOLE=y
77CONFIG_HVC_RTAS=y
78CONFIG_HVC_BEAT=y
79# CONFIG_HW_RANDOM is not set
80CONFIG_GEN_RTC=y
81CONFIG_I2C=y
82# CONFIG_HWMON is not set
83CONFIG_WATCHDOG=y
84# CONFIG_VGA_CONSOLE is not set
85CONFIG_USB_HIDDEV=y
86CONFIG_USB=y
87CONFIG_USB_MON=y
88CONFIG_USB_EHCI_HCD=m
89# CONFIG_USB_EHCI_HCD_PPC_OF is not set
90CONFIG_USB_OHCI_HCD=m
91CONFIG_USB_STORAGE=m
92CONFIG_EXT2_FS=y
93CONFIG_EXT2_FS_XATTR=y
94CONFIG_EXT2_FS_POSIX_ACL=y
95CONFIG_EXT2_FS_SECURITY=y
96CONFIG_EXT2_FS_XIP=y
97CONFIG_EXT3_FS=y
98CONFIG_EXT3_FS_POSIX_ACL=y
99CONFIG_EXT3_FS_SECURITY=y
100CONFIG_ISO9660_FS=m
101CONFIG_JOLIET=y
102CONFIG_UDF_FS=m
103CONFIG_MSDOS_FS=m
104CONFIG_VFAT_FS=m
105CONFIG_PROC_KCORE=y
106CONFIG_TMPFS=y
107CONFIG_HUGETLBFS=y
108CONFIG_NFS_FS=m
109CONFIG_NFS_V3_ACL=y
110CONFIG_NFSD=m
111CONFIG_NFSD_V3=y
112CONFIG_NFSD_V3_ACL=y
113CONFIG_NLS_ISO8859_1=m
114CONFIG_NLS_ISO8859_2=m
115CONFIG_NLS_ISO8859_3=m
116CONFIG_NLS_ISO8859_4=m
117CONFIG_NLS_ISO8859_5=m
118CONFIG_NLS_ISO8859_6=m
119CONFIG_NLS_ISO8859_7=m
120CONFIG_NLS_ISO8859_9=m
121CONFIG_NLS_ISO8859_13=m
122CONFIG_NLS_ISO8859_14=m
123CONFIG_NLS_ISO8859_15=m
124CONFIG_LIBCRC32C=m
125CONFIG_DEBUG_FS=y
126CONFIG_MAGIC_SYSRQ=y
127CONFIG_DEBUG_KERNEL=y
128CONFIG_DEBUG_MUTEXES=y
129CONFIG_XMON=y
130CONFIG_XMON_DEFAULT=y
131CONFIG_CRYPTO_NULL=m
132CONFIG_CRYPTO_TEST=m
133CONFIG_CRYPTO_ECB=m
134CONFIG_CRYPTO_PCBC=m
135CONFIG_CRYPTO_HMAC=y
136CONFIG_CRYPTO_MD4=m
137CONFIG_CRYPTO_MD5=y
138CONFIG_CRYPTO_MICHAEL_MIC=m
139CONFIG_CRYPTO_SHA256=m
140CONFIG_CRYPTO_SHA512=m
141CONFIG_CRYPTO_TGR192=m
142CONFIG_CRYPTO_WP512=m
143CONFIG_CRYPTO_ANUBIS=m
144CONFIG_CRYPTO_ARC4=m
145CONFIG_CRYPTO_BLOWFISH=m
146CONFIG_CRYPTO_CAST5=m
147CONFIG_CRYPTO_CAST6=m
148CONFIG_CRYPTO_KHAZAD=m
149CONFIG_CRYPTO_SERPENT=m
150CONFIG_CRYPTO_TEA=m
151CONFIG_CRYPTO_TWOFISH=m
152# CONFIG_CRYPTO_HW is not set
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index ca7957b09a3c..37659937bd12 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -99,6 +99,8 @@ CONFIG_E1000E=y
99CONFIG_AT803X_PHY=y 99CONFIG_AT803X_PHY=y
100CONFIG_VITESSE_PHY=y 100CONFIG_VITESSE_PHY=y
101CONFIG_FIXED_PHY=y 101CONFIG_FIXED_PHY=y
102CONFIG_MDIO_BUS_MUX_GPIO=y
103CONFIG_MDIO_BUS_MUX_MMIOREG=y
102# CONFIG_INPUT_MOUSEDEV is not set 104# CONFIG_INPUT_MOUSEDEV is not set
103# CONFIG_INPUT_KEYBOARD is not set 105# CONFIG_INPUT_KEYBOARD is not set
104# CONFIG_INPUT_MOUSE is not set 106# CONFIG_INPUT_MOUSE is not set
@@ -114,11 +116,14 @@ CONFIG_NVRAM=y
114CONFIG_I2C=y 116CONFIG_I2C=y
115CONFIG_I2C_CHARDEV=y 117CONFIG_I2C_CHARDEV=y
116CONFIG_I2C_MPC=y 118CONFIG_I2C_MPC=y
119CONFIG_I2C_MUX=y
120CONFIG_I2C_MUX_PCA954x=y
117CONFIG_SPI=y 121CONFIG_SPI=y
118CONFIG_SPI_GPIO=y 122CONFIG_SPI_GPIO=y
119CONFIG_SPI_FSL_SPI=y 123CONFIG_SPI_FSL_SPI=y
120CONFIG_SPI_FSL_ESPI=y 124CONFIG_SPI_FSL_ESPI=y
121# CONFIG_HWMON is not set 125CONFIG_SENSORS_LM90=y
126CONFIG_SENSORS_INA2XX=y
122CONFIG_USB_HID=m 127CONFIG_USB_HID=m
123CONFIG_USB=y 128CONFIG_USB=y
124CONFIG_USB_MON=y 129CONFIG_USB_MON=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 04737aaa8b6b..33cd1df818ad 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -12,6 +12,10 @@ CONFIG_BSD_PROCESS_ACCT=y
12CONFIG_IKCONFIG=y 12CONFIG_IKCONFIG=y
13CONFIG_IKCONFIG_PROC=y 13CONFIG_IKCONFIG_PROC=y
14CONFIG_LOG_BUF_SHIFT=14 14CONFIG_LOG_BUF_SHIFT=14
15CONFIG_CGROUPS=y
16CONFIG_CPUSETS=y
17CONFIG_CGROUP_CPUACCT=y
18CONFIG_CGROUP_SCHED=y
15CONFIG_BLK_DEV_INITRD=y 19CONFIG_BLK_DEV_INITRD=y
16CONFIG_EXPERT=y 20CONFIG_EXPERT=y
17CONFIG_KALLSYMS_ALL=y 21CONFIG_KALLSYMS_ALL=y
@@ -75,6 +79,10 @@ CONFIG_BLK_DEV_LOOP=y
75CONFIG_BLK_DEV_RAM=y 79CONFIG_BLK_DEV_RAM=y
76CONFIG_BLK_DEV_RAM_SIZE=131072 80CONFIG_BLK_DEV_RAM_SIZE=131072
77CONFIG_EEPROM_LEGACY=y 81CONFIG_EEPROM_LEGACY=y
82CONFIG_BLK_DEV_SD=y
83CONFIG_BLK_DEV_SR=y
84CONFIG_BLK_DEV_SR_VENDOR=y
85CONFIG_CHR_DEV_SG=y
78CONFIG_ATA=y 86CONFIG_ATA=y
79CONFIG_SATA_FSL=y 87CONFIG_SATA_FSL=y
80CONFIG_SATA_SIL24=y 88CONFIG_SATA_SIL24=y
@@ -85,6 +93,8 @@ CONFIG_FSL_XGMAC_MDIO=y
85CONFIG_E1000E=y 93CONFIG_E1000E=y
86CONFIG_VITESSE_PHY=y 94CONFIG_VITESSE_PHY=y
87CONFIG_FIXED_PHY=y 95CONFIG_FIXED_PHY=y
96CONFIG_MDIO_BUS_MUX_GPIO=y
97CONFIG_MDIO_BUS_MUX_MMIOREG=y
88CONFIG_INPUT_FF_MEMLESS=m 98CONFIG_INPUT_FF_MEMLESS=m
89# CONFIG_INPUT_MOUSEDEV is not set 99# CONFIG_INPUT_MOUSEDEV is not set
90# CONFIG_INPUT_KEYBOARD is not set 100# CONFIG_INPUT_KEYBOARD is not set
@@ -99,11 +109,14 @@ CONFIG_SERIAL_8250_RSA=y
99CONFIG_I2C=y 109CONFIG_I2C=y
100CONFIG_I2C_CHARDEV=y 110CONFIG_I2C_CHARDEV=y
101CONFIG_I2C_MPC=y 111CONFIG_I2C_MPC=y
112CONFIG_I2C_MUX=y
113CONFIG_I2C_MUX_PCA954x=y
102CONFIG_SPI=y 114CONFIG_SPI=y
103CONFIG_SPI_GPIO=y 115CONFIG_SPI_GPIO=y
104CONFIG_SPI_FSL_SPI=y 116CONFIG_SPI_FSL_SPI=y
105CONFIG_SPI_FSL_ESPI=y 117CONFIG_SPI_FSL_ESPI=y
106# CONFIG_HWMON is not set 118CONFIG_SENSORS_LM90=y
119CONFIG_SENSORS_INA2XX=y
107CONFIG_USB_HID=m 120CONFIG_USB_HID=m
108CONFIG_USB=y 121CONFIG_USB=y
109CONFIG_USB_MON=y 122CONFIG_USB_MON=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 8535c343dd57..6ecf7bdbc2f9 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -150,8 +150,7 @@ CONFIG_SPI=y
150CONFIG_SPI_FSL_SPI=y 150CONFIG_SPI_FSL_SPI=y
151CONFIG_SPI_FSL_ESPI=y 151CONFIG_SPI_FSL_ESPI=y
152CONFIG_GPIO_MPC8XXX=y 152CONFIG_GPIO_MPC8XXX=y
153CONFIG_HWMON=m 153CONFIG_SENSORS_LM90=y
154CONFIG_SENSORS_LM90=m
155CONFIG_FB=y 154CONFIG_FB=y
156CONFIG_FB_FSL_DIU=y 155CONFIG_FB_FSL_DIU=y
157# CONFIG_VGA_CONSOLE is not set 156# CONFIG_VGA_CONSOLE is not set
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index c45ad2e01b0c..b6c7111ea913 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -143,7 +143,7 @@ CONFIG_SPI=y
143CONFIG_SPI_FSL_SPI=y 143CONFIG_SPI_FSL_SPI=y
144CONFIG_SPI_FSL_ESPI=y 144CONFIG_SPI_FSL_ESPI=y
145CONFIG_GPIO_MPC8XXX=y 145CONFIG_GPIO_MPC8XXX=y
146# CONFIG_HWMON is not set 146CONFIG_SENSORS_LM90=y
147CONFIG_FB=y 147CONFIG_FB=y
148CONFIG_FB_FSL_DIU=y 148CONFIG_FB_FSL_DIU=y
149# CONFIG_VGA_CONSOLE is not set 149# CONFIG_VGA_CONSOLE is not set
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 3315c9f0828a..aad501ae3834 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -36,7 +36,6 @@ CONFIG_PS3_ROM=m
36CONFIG_PS3_FLASH=m 36CONFIG_PS3_FLASH=m
37CONFIG_PS3_LPM=m 37CONFIG_PS3_LPM=m
38CONFIG_PPC_IBM_CELL_BLADE=y 38CONFIG_PPC_IBM_CELL_BLADE=y
39CONFIG_PPC_CELLEB=y
40CONFIG_PPC_CELL_QPACE=y 39CONFIG_PPC_CELL_QPACE=y
41CONFIG_RTAS_FLASH=m 40CONFIG_RTAS_FLASH=m
42CONFIG_IBMEBUS=y 41CONFIG_IBMEBUS=y
@@ -89,7 +88,6 @@ CONFIG_IDE=y
89CONFIG_BLK_DEV_IDECD=y 88CONFIG_BLK_DEV_IDECD=y
90CONFIG_BLK_DEV_GENERIC=y 89CONFIG_BLK_DEV_GENERIC=y
91CONFIG_BLK_DEV_AMD74XX=y 90CONFIG_BLK_DEV_AMD74XX=y
92CONFIG_BLK_DEV_CELLEB=y
93CONFIG_BLK_DEV_IDE_PMAC=y 91CONFIG_BLK_DEV_IDE_PMAC=y
94CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y 92CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
95CONFIG_BLK_DEV_SD=y 93CONFIG_BLK_DEV_SD=y
@@ -196,7 +194,6 @@ CONFIG_SERIAL_TXX9_CONSOLE=y
196CONFIG_SERIAL_JSM=m 194CONFIG_SERIAL_JSM=m
197CONFIG_HVC_CONSOLE=y 195CONFIG_HVC_CONSOLE=y
198CONFIG_HVC_RTAS=y 196CONFIG_HVC_RTAS=y
199CONFIG_HVC_BEAT=y
200CONFIG_HVCS=m 197CONFIG_HVCS=m
201CONFIG_VIRTIO_CONSOLE=m 198CONFIG_VIRTIO_CONSOLE=m
202CONFIG_IBM_BSR=m 199CONFIG_IBM_BSR=m
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index 382b28e364dc..4b87205c230c 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -1,6 +1,8 @@
1
2generic-y += clkdev.h 1generic-y += clkdev.h
2generic-y += div64.h
3generic-y += irq_regs.h
3generic-y += irq_work.h 4generic-y += irq_work.h
5generic-y += local64.h
4generic-y += mcs_spinlock.h 6generic-y += mcs_spinlock.h
5generic-y += preempt.h 7generic-y += preempt.h
6generic-y += rwsem.h 8generic-y += rwsem.h
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 34a05a1a990b..0dc42c5082b7 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -76,9 +76,6 @@ extern void _set_L3CR(unsigned long);
76#define _set_L3CR(val) do { } while(0) 76#define _set_L3CR(val) do { } while(0)
77#endif 77#endif
78 78
79extern void cacheable_memzero(void *p, unsigned int nb);
80extern void *cacheable_memcpy(void *, const void *, unsigned int);
81
82#endif /* !__ASSEMBLY__ */ 79#endif /* !__ASSEMBLY__ */
83#endif /* __KERNEL__ */ 80#endif /* __KERNEL__ */
84#endif /* _ASM_POWERPC_CACHE_H */ 81#endif /* _ASM_POWERPC_CACHE_H */
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 5cf5a6d10685..6367b8347dad 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -100,7 +100,7 @@ struct cpu_spec {
100 /* 100 /*
101 * Processor specific routine to flush tlbs. 101 * Processor specific routine to flush tlbs.
102 */ 102 */
103 void (*flush_tlb)(unsigned long inval_selector); 103 void (*flush_tlb)(unsigned int action);
104 104
105}; 105};
106 106
@@ -114,6 +114,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
114 114
115extern const char *powerpc_base_platform; 115extern const char *powerpc_base_platform;
116 116
117/* TLB flush actions. Used as argument to cpu_spec.flush_tlb() hook */
118enum {
119 TLB_INVAL_SCOPE_GLOBAL = 0, /* invalidate all TLBs */
120 TLB_INVAL_SCOPE_LPID = 1, /* invalidate TLBs for current LPID */
121};
122
117#endif /* __ASSEMBLY__ */ 123#endif /* __ASSEMBLY__ */
118 124
119/* CPU kernel features */ 125/* CPU kernel features */
diff --git a/arch/powerpc/include/asm/dbdma.h b/arch/powerpc/include/asm/dbdma.h
index e23f07e73cb3..6c69836b4ec2 100644
--- a/arch/powerpc/include/asm/dbdma.h
+++ b/arch/powerpc/include/asm/dbdma.h
@@ -42,12 +42,12 @@ struct dbdma_regs {
42 * DBDMA command structure. These fields are all little-endian! 42 * DBDMA command structure. These fields are all little-endian!
43 */ 43 */
44struct dbdma_cmd { 44struct dbdma_cmd {
45 unsigned short req_count; /* requested byte transfer count */ 45 __le16 req_count; /* requested byte transfer count */
46 unsigned short command; /* command word (has bit-fields) */ 46 __le16 command; /* command word (has bit-fields) */
47 unsigned int phy_addr; /* physical data address */ 47 __le32 phy_addr; /* physical data address */
48 unsigned int cmd_dep; /* command-dependent field */ 48 __le32 cmd_dep; /* command-dependent field */
49 unsigned short res_count; /* residual count after completion */ 49 __le16 res_count; /* residual count after completion */
50 unsigned short xfer_status; /* transfer status */ 50 __le16 xfer_status; /* transfer status */
51}; 51};
52 52
53/* DBDMA command values in command field */ 53/* DBDMA command values in command field */
diff --git a/arch/powerpc/include/asm/dcr-native.h b/arch/powerpc/include/asm/dcr-native.h
index 7d2e6235726d..4efc11dacb98 100644
--- a/arch/powerpc/include/asm/dcr-native.h
+++ b/arch/powerpc/include/asm/dcr-native.h
@@ -31,7 +31,7 @@ typedef struct {
31 31
32static inline bool dcr_map_ok_native(dcr_host_native_t host) 32static inline bool dcr_map_ok_native(dcr_host_native_t host)
33{ 33{
34 return 1; 34 return true;
35} 35}
36 36
37#define dcr_map_native(dev, dcr_n, dcr_c) \ 37#define dcr_map_native(dev, dcr_n, dcr_c) \
diff --git a/arch/powerpc/include/asm/div64.h b/arch/powerpc/include/asm/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/arch/powerpc/include/asm/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 894d538f3567..9103687b0436 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -191,11 +191,11 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
191 struct dev_archdata *sd = &dev->archdata; 191 struct dev_archdata *sd = &dev->archdata;
192 192
193 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr) 193 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
194 return 0; 194 return false;
195#endif 195#endif
196 196
197 if (!dev->dma_mask) 197 if (!dev->dma_mask)
198 return 0; 198 return false;
199 199
200 return addr + size - 1 <= *dev->dma_mask; 200 return addr + size - 1 <= *dev->dma_mask;
201} 201}
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 681bc0314b6b..e05808a328db 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -42,7 +42,7 @@
42#define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000) 42#define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000)
43#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) 43#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000)
44#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) 44#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000)
45#define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000) 45/* Free ASM_CONST(0x0000000001000000) */
46#define FW_FEATURE_CMO ASM_CONST(0x0000000002000000) 46#define FW_FEATURE_CMO ASM_CONST(0x0000000002000000)
47#define FW_FEATURE_VPHN ASM_CONST(0x0000000004000000) 47#define FW_FEATURE_VPHN ASM_CONST(0x0000000004000000)
48#define FW_FEATURE_XCMO ASM_CONST(0x0000000008000000) 48#define FW_FEATURE_XCMO ASM_CONST(0x0000000008000000)
@@ -75,8 +75,6 @@ enum {
75 FW_FEATURE_POWERNV_ALWAYS = 0, 75 FW_FEATURE_POWERNV_ALWAYS = 0,
76 FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, 76 FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
77 FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, 77 FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
78 FW_FEATURE_CELLEB_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_BEAT,
79 FW_FEATURE_CELLEB_ALWAYS = 0,
80 FW_FEATURE_NATIVE_POSSIBLE = 0, 78 FW_FEATURE_NATIVE_POSSIBLE = 0,
81 FW_FEATURE_NATIVE_ALWAYS = 0, 79 FW_FEATURE_NATIVE_ALWAYS = 0,
82 FW_FEATURE_POSSIBLE = 80 FW_FEATURE_POSSIBLE =
@@ -89,9 +87,6 @@ enum {
89#ifdef CONFIG_PPC_PS3 87#ifdef CONFIG_PPC_PS3
90 FW_FEATURE_PS3_POSSIBLE | 88 FW_FEATURE_PS3_POSSIBLE |
91#endif 89#endif
92#ifdef CONFIG_PPC_CELLEB
93 FW_FEATURE_CELLEB_POSSIBLE |
94#endif
95#ifdef CONFIG_PPC_NATIVE 90#ifdef CONFIG_PPC_NATIVE
96 FW_FEATURE_NATIVE_ALWAYS | 91 FW_FEATURE_NATIVE_ALWAYS |
97#endif 92#endif
@@ -106,9 +101,6 @@ enum {
106#ifdef CONFIG_PPC_PS3 101#ifdef CONFIG_PPC_PS3
107 FW_FEATURE_PS3_ALWAYS & 102 FW_FEATURE_PS3_ALWAYS &
108#endif 103#endif
109#ifdef CONFIG_PPC_CELLEB
110 FW_FEATURE_CELLEB_ALWAYS &
111#endif
112#ifdef CONFIG_PPC_NATIVE 104#ifdef CONFIG_PPC_NATIVE
113 FW_FEATURE_NATIVE_ALWAYS & 105 FW_FEATURE_NATIVE_ALWAYS &
114#endif 106#endif
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index e2abbe8a1f4d..1e27d6338565 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -29,6 +29,7 @@
29#include <linux/bitops.h> 29#include <linux/bitops.h>
30#include <asm/machdep.h> 30#include <asm/machdep.h>
31#include <asm/types.h> 31#include <asm/types.h>
32#include <asm/pci-bridge.h>
32 33
33#define IOMMU_PAGE_SHIFT_4K 12 34#define IOMMU_PAGE_SHIFT_4K 12
34#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K) 35#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
@@ -172,7 +173,7 @@ extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
172 struct dma_attrs *attrs); 173 struct dma_attrs *attrs);
173 174
174extern void iommu_init_early_pSeries(void); 175extern void iommu_init_early_pSeries(void);
175extern void iommu_init_early_dart(void); 176extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops);
176extern void iommu_init_early_pasemi(void); 177extern void iommu_init_early_pasemi(void);
177 178
178extern void alloc_dart_table(void); 179extern void alloc_dart_table(void);
diff --git a/arch/powerpc/include/asm/irq_regs.h b/arch/powerpc/include/asm/irq_regs.h
deleted file mode 100644
index ba94b51a0a70..000000000000
--- a/arch/powerpc/include/asm/irq_regs.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#include <asm-generic/irq_regs.h>
2
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index 2d81e202bdcc..14619a59ec09 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -290,11 +290,11 @@ static inline pte_t kvmppc_read_update_linux_pte(pte_t *ptep, int writing,
290 pte_t old_pte, new_pte = __pte(0); 290 pte_t old_pte, new_pte = __pte(0);
291 291
292 while (1) { 292 while (1) {
293 old_pte = pte_val(*ptep); 293 old_pte = *ptep;
294 /* 294 /*
295 * wait until _PAGE_BUSY is clear then set it atomically 295 * wait until _PAGE_BUSY is clear then set it atomically
296 */ 296 */
297 if (unlikely(old_pte & _PAGE_BUSY)) { 297 if (unlikely(pte_val(old_pte) & _PAGE_BUSY)) {
298 cpu_relax(); 298 cpu_relax();
299 continue; 299 continue;
300 } 300 }
@@ -305,16 +305,18 @@ static inline pte_t kvmppc_read_update_linux_pte(pte_t *ptep, int writing,
305 return __pte(0); 305 return __pte(0);
306#endif 306#endif
307 /* If pte is not present return None */ 307 /* If pte is not present return None */
308 if (unlikely(!(old_pte & _PAGE_PRESENT))) 308 if (unlikely(!(pte_val(old_pte) & _PAGE_PRESENT)))
309 return __pte(0); 309 return __pte(0);
310 310
311 new_pte = pte_mkyoung(old_pte); 311 new_pte = pte_mkyoung(old_pte);
312 if (writing && pte_write(old_pte)) 312 if (writing && pte_write(old_pte))
313 new_pte = pte_mkdirty(new_pte); 313 new_pte = pte_mkdirty(new_pte);
314 314
315 if (old_pte == __cmpxchg_u64((unsigned long *)ptep, old_pte, 315 if (pte_val(old_pte) == __cmpxchg_u64((unsigned long *)ptep,
316 new_pte)) 316 pte_val(old_pte),
317 pte_val(new_pte))) {
317 break; 318 break;
319 }
318 } 320 }
319 return new_pte; 321 return new_pte;
320} 322}
@@ -335,7 +337,7 @@ static inline bool hpte_read_permission(unsigned long pp, unsigned long key)
335{ 337{
336 if (key) 338 if (key)
337 return PP_RWRX <= pp && pp <= PP_RXRX; 339 return PP_RWRX <= pp && pp <= PP_RXRX;
338 return 1; 340 return true;
339} 341}
340 342
341static inline bool hpte_write_permission(unsigned long pp, unsigned long key) 343static inline bool hpte_write_permission(unsigned long pp, unsigned long key)
@@ -373,7 +375,7 @@ static inline bool slot_is_aligned(struct kvm_memory_slot *memslot,
373 unsigned long mask = (pagesize >> PAGE_SHIFT) - 1; 375 unsigned long mask = (pagesize >> PAGE_SHIFT) - 1;
374 376
375 if (pagesize <= PAGE_SIZE) 377 if (pagesize <= PAGE_SIZE)
376 return 1; 378 return true;
377 return !(memslot->base_gfn & mask) && !(memslot->npages & mask); 379 return !(memslot->base_gfn & mask) && !(memslot->npages & mask);
378} 380}
379 381
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 8ef05121d3cd..c610961720c7 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -585,7 +585,7 @@ struct kvm_vcpu_arch {
585 pgd_t *pgdir; 585 pgd_t *pgdir;
586 586
587 u8 io_gpr; /* GPR used as IO source/target */ 587 u8 io_gpr; /* GPR used as IO source/target */
588 u8 mmio_is_bigendian; 588 u8 mmio_host_swabbed;
589 u8 mmio_sign_extend; 589 u8 mmio_sign_extend;
590 u8 osi_needed; 590 u8 osi_needed;
591 u8 osi_enabled; 591 u8 osi_enabled;
diff --git a/arch/powerpc/include/asm/local64.h b/arch/powerpc/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/powerpc/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local64.h>
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 1b268044f290..ef8899432ae7 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -103,9 +103,6 @@ struct machdep_calls {
103#endif 103#endif
104#endif /* CONFIG_PPC64 */ 104#endif /* CONFIG_PPC64 */
105 105
106 void (*pci_dma_dev_setup)(struct pci_dev *dev);
107 void (*pci_dma_bus_setup)(struct pci_bus *bus);
108
109 /* Platform set_dma_mask and dma_get_required_mask overrides */ 106 /* Platform set_dma_mask and dma_get_required_mask overrides */
110 int (*dma_set_mask)(struct device *dev, u64 dma_mask); 107 int (*dma_set_mask)(struct device *dev, u64 dma_mask);
111 u64 (*dma_get_required_mask)(struct device *dev); 108 u64 (*dma_get_required_mask)(struct device *dev);
@@ -127,7 +124,6 @@ struct machdep_calls {
127 /* PCI stuff */ 124 /* PCI stuff */
128 /* Called after allocating resources */ 125 /* Called after allocating resources */
129 void (*pcibios_fixup)(void); 126 void (*pcibios_fixup)(void);
130 int (*pci_probe_mode)(struct pci_bus *);
131 void (*pci_irq_fixup)(struct pci_dev *dev); 127 void (*pci_irq_fixup)(struct pci_dev *dev);
132 int (*pcibios_root_bridge_prepare)(struct pci_host_bridge 128 int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
133 *bridge); 129 *bridge);
@@ -237,19 +233,9 @@ struct machdep_calls {
237 /* Called for each PCI bus in the system when it's probed */ 233 /* Called for each PCI bus in the system when it's probed */
238 void (*pcibios_fixup_bus)(struct pci_bus *); 234 void (*pcibios_fixup_bus)(struct pci_bus *);
239 235
240 /* Called when pci_enable_device() is called. Returns 0 to
241 * allow assignment/enabling of the device. */
242 int (*pcibios_enable_device_hook)(struct pci_dev *);
243
244 /* Called after scan and before resource survey */ 236 /* Called after scan and before resource survey */
245 void (*pcibios_fixup_phb)(struct pci_controller *hose); 237 void (*pcibios_fixup_phb)(struct pci_controller *hose);
246 238
247 /* Called during PCI resource reassignment */
248 resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);
249
250 /* Reset the secondary bus of bridge */
251 void (*pcibios_reset_secondary_bus)(struct pci_dev *dev);
252
253#ifdef CONFIG_PCI_IOV 239#ifdef CONFIG_PCI_IOV
254 void (*pcibios_fixup_sriov)(struct pci_dev *pdev); 240 void (*pcibios_fixup_sriov)(struct pci_dev *pdev);
255 resource_size_t (*pcibios_iov_resource_alignment)(struct pci_dev *, int resno); 241 resource_size_t (*pcibios_iov_resource_alignment)(struct pci_dev *, int resno);
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index 4f13c3ed7acf..1da6a81ce541 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -112,6 +112,7 @@
112#define TLBIEL_INVAL_SET_SHIFT 12 112#define TLBIEL_INVAL_SET_SHIFT 12
113 113
114#define POWER7_TLB_SETS 128 /* # sets in POWER7 TLB */ 114#define POWER7_TLB_SETS 128 /* # sets in POWER7 TLB */
115#define POWER8_TLB_SETS 512 /* # sets in POWER8 TLB */
115 116
116#ifndef __ASSEMBLY__ 117#ifndef __ASSEMBLY__
117 118
diff --git a/arch/powerpc/include/asm/mpc85xx.h b/arch/powerpc/include/asm/mpc85xx.h
index 3bef74a9914b..213f3a81593d 100644
--- a/arch/powerpc/include/asm/mpc85xx.h
+++ b/arch/powerpc/include/asm/mpc85xx.h
@@ -61,6 +61,7 @@
61#define SVR_T4240 0x824000 61#define SVR_T4240 0x824000
62#define SVR_T4120 0x824001 62#define SVR_T4120 0x824001
63#define SVR_T4160 0x824100 63#define SVR_T4160 0x824100
64#define SVR_T4080 0x824102
64#define SVR_C291 0x850000 65#define SVR_C291 0x850000
65#define SVR_C292 0x850020 66#define SVR_C292 0x850020
66#define SVR_C293 0x850030 67#define SVR_C293 0x850030
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 754f93d208fa..98697611e7b3 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -34,10 +34,6 @@
34#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff 34#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
35#define MPIC_GREG_GCONF_MCK 0x08000000 35#define MPIC_GREG_GCONF_MCK 0x08000000
36#define MPIC_GREG_GLOBAL_CONF_1 0x00030 36#define MPIC_GREG_GLOBAL_CONF_1 0x00030
37#define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000
38#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000
39#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r) \
40 (((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK)
41#define MPIC_GREG_VENDOR_0 0x00040 37#define MPIC_GREG_VENDOR_0 0x00040
42#define MPIC_GREG_VENDOR_1 0x00050 38#define MPIC_GREG_VENDOR_1 0x00050
43#define MPIC_GREG_VENDOR_2 0x00060 39#define MPIC_GREG_VENDOR_2 0x00060
@@ -396,14 +392,7 @@ extern struct bus_type mpic_subsys;
396#define MPIC_REGSET_TSI108 MPIC_REGSET(1) /* Tsi108/109 PIC */ 392#define MPIC_REGSET_TSI108 MPIC_REGSET(1) /* Tsi108/109 PIC */
397 393
398/* Get the version of primary MPIC */ 394/* Get the version of primary MPIC */
399#ifdef CONFIG_MPIC
400extern u32 fsl_mpic_primary_get_version(void); 395extern u32 fsl_mpic_primary_get_version(void);
401#else
402static inline u32 fsl_mpic_primary_get_version(void)
403{
404 return 0;
405}
406#endif
407 396
408/* Allocate the controller structure and setup the linux irq descs 397/* Allocate the controller structure and setup the linux irq descs
409 * for the range if interrupts passed in. No HW initialization is 398 * for the range if interrupts passed in. No HW initialization is
@@ -496,11 +485,5 @@ extern unsigned int mpic_get_coreint_irq(void);
496/* Fetch Machine Check interrupt from primary mpic */ 485/* Fetch Machine Check interrupt from primary mpic */
497extern unsigned int mpic_get_mcirq(void); 486extern unsigned int mpic_get_mcirq(void);
498 487
499/* Set the EPIC clock ratio */
500void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
501
502/* Enable/Disable EPIC serial interrupt mode */
503void mpic_set_serial_int(struct mpic *mpic, int enable);
504
505#endif /* __KERNEL__ */ 488#endif /* __KERNEL__ */
506#endif /* _ASM_POWERPC_MPIC_H */ 489#endif /* _ASM_POWERPC_MPIC_H */
diff --git a/arch/powerpc/include/asm/nmi.h b/arch/powerpc/include/asm/nmi.h
new file mode 100644
index 000000000000..ff1ccb375e60
--- /dev/null
+++ b/arch/powerpc/include/asm/nmi.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_NMI_H
2#define _ASM_NMI_H
3
4#endif /* _ASM_NMI_H */
diff --git a/arch/powerpc/include/asm/nvram.h b/arch/powerpc/include/asm/nvram.h
index b0fe0fe4e626..09a518bb7c03 100644
--- a/arch/powerpc/include/asm/nvram.h
+++ b/arch/powerpc/include/asm/nvram.h
@@ -9,12 +9,43 @@
9#ifndef _ASM_POWERPC_NVRAM_H 9#ifndef _ASM_POWERPC_NVRAM_H
10#define _ASM_POWERPC_NVRAM_H 10#define _ASM_POWERPC_NVRAM_H
11 11
12 12#include <linux/types.h>
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <uapi/asm/nvram.h> 15#include <uapi/asm/nvram.h>
16 16
17/*
18 * Set oops header version to distinguish between old and new format header.
19 * lnx,oops-log partition max size is 4000, header version > 4000 will
20 * help in identifying new header.
21 */
22#define OOPS_HDR_VERSION 5000
23
24struct err_log_info {
25 __be32 error_type;
26 __be32 seq_num;
27};
28
29struct nvram_os_partition {
30 const char *name;
31 int req_size; /* desired size, in bytes */
32 int min_size; /* minimum acceptable size (0 means req_size) */
33 long size; /* size of data portion (excluding err_log_info) */
34 long index; /* offset of data portion of partition */
35 bool os_partition; /* partition initialized by OS, not FW */
36};
37
38struct oops_log_info {
39 __be16 version;
40 __be16 report_length;
41 __be64 timestamp;
42} __attribute__((packed));
43
44extern struct nvram_os_partition oops_log_partition;
45
17#ifdef CONFIG_PPC_PSERIES 46#ifdef CONFIG_PPC_PSERIES
47extern struct nvram_os_partition rtas_log_partition;
48
18extern int nvram_write_error_log(char * buff, int length, 49extern int nvram_write_error_log(char * buff, int length,
19 unsigned int err_type, unsigned int err_seq); 50 unsigned int err_type, unsigned int err_seq);
20extern int nvram_read_error_log(char * buff, int length, 51extern int nvram_read_error_log(char * buff, int length,
@@ -50,6 +81,23 @@ extern void pmac_xpram_write(int xpaddr, u8 data);
50/* Synchronize NVRAM */ 81/* Synchronize NVRAM */
51extern void nvram_sync(void); 82extern void nvram_sync(void);
52 83
84/* Initialize NVRAM OS partition */
85extern int __init nvram_init_os_partition(struct nvram_os_partition *part);
86
87/* Initialize NVRAM oops partition */
88extern void __init nvram_init_oops_partition(int rtas_partition_exists);
89
90/* Read a NVRAM partition */
91extern int nvram_read_partition(struct nvram_os_partition *part, char *buff,
92 int length, unsigned int *err_type,
93 unsigned int *error_log_cnt);
94
95/* Write to NVRAM OS partition */
96extern int nvram_write_os_partition(struct nvram_os_partition *part,
97 char *buff, int length,
98 unsigned int err_type,
99 unsigned int error_log_cnt);
100
53/* Determine NVRAM size */ 101/* Determine NVRAM size */
54extern ssize_t nvram_get_size(void); 102extern ssize_t nvram_get_size(void);
55 103
diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h
new file mode 100644
index 000000000000..0321a909e663
--- /dev/null
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -0,0 +1,735 @@
1/*
2 * OPAL API definitions.
3 *
4 * Copyright 2011-2015 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __OPAL_API_H
13#define __OPAL_API_H
14
15/****** OPAL APIs ******/
16
17/* Return codes */
18#define OPAL_SUCCESS 0
19#define OPAL_PARAMETER -1
20#define OPAL_BUSY -2
21#define OPAL_PARTIAL -3
22#define OPAL_CONSTRAINED -4
23#define OPAL_CLOSED -5
24#define OPAL_HARDWARE -6
25#define OPAL_UNSUPPORTED -7
26#define OPAL_PERMISSION -8
27#define OPAL_NO_MEM -9
28#define OPAL_RESOURCE -10
29#define OPAL_INTERNAL_ERROR -11
30#define OPAL_BUSY_EVENT -12
31#define OPAL_HARDWARE_FROZEN -13
32#define OPAL_WRONG_STATE -14
33#define OPAL_ASYNC_COMPLETION -15
34#define OPAL_EMPTY -16
35#define OPAL_I2C_TIMEOUT -17
36#define OPAL_I2C_INVALID_CMD -18
37#define OPAL_I2C_LBUS_PARITY -19
38#define OPAL_I2C_BKEND_OVERRUN -20
39#define OPAL_I2C_BKEND_ACCESS -21
40#define OPAL_I2C_ARBT_LOST -22
41#define OPAL_I2C_NACK_RCVD -23
42#define OPAL_I2C_STOP_ERR -24
43
44/* API Tokens (in r0) */
45#define OPAL_INVALID_CALL -1
46#define OPAL_TEST 0
47#define OPAL_CONSOLE_WRITE 1
48#define OPAL_CONSOLE_READ 2
49#define OPAL_RTC_READ 3
50#define OPAL_RTC_WRITE 4
51#define OPAL_CEC_POWER_DOWN 5
52#define OPAL_CEC_REBOOT 6
53#define OPAL_READ_NVRAM 7
54#define OPAL_WRITE_NVRAM 8
55#define OPAL_HANDLE_INTERRUPT 9
56#define OPAL_POLL_EVENTS 10
57#define OPAL_PCI_SET_HUB_TCE_MEMORY 11
58#define OPAL_PCI_SET_PHB_TCE_MEMORY 12
59#define OPAL_PCI_CONFIG_READ_BYTE 13
60#define OPAL_PCI_CONFIG_READ_HALF_WORD 14
61#define OPAL_PCI_CONFIG_READ_WORD 15
62#define OPAL_PCI_CONFIG_WRITE_BYTE 16
63#define OPAL_PCI_CONFIG_WRITE_HALF_WORD 17
64#define OPAL_PCI_CONFIG_WRITE_WORD 18
65#define OPAL_SET_XIVE 19
66#define OPAL_GET_XIVE 20
67#define OPAL_GET_COMPLETION_TOKEN_STATUS 21 /* obsolete */
68#define OPAL_REGISTER_OPAL_EXCEPTION_HANDLER 22
69#define OPAL_PCI_EEH_FREEZE_STATUS 23
70#define OPAL_PCI_SHPC 24
71#define OPAL_CONSOLE_WRITE_BUFFER_SPACE 25
72#define OPAL_PCI_EEH_FREEZE_CLEAR 26
73#define OPAL_PCI_PHB_MMIO_ENABLE 27
74#define OPAL_PCI_SET_PHB_MEM_WINDOW 28
75#define OPAL_PCI_MAP_PE_MMIO_WINDOW 29
76#define OPAL_PCI_SET_PHB_TABLE_MEMORY 30
77#define OPAL_PCI_SET_PE 31
78#define OPAL_PCI_SET_PELTV 32
79#define OPAL_PCI_SET_MVE 33
80#define OPAL_PCI_SET_MVE_ENABLE 34
81#define OPAL_PCI_GET_XIVE_REISSUE 35
82#define OPAL_PCI_SET_XIVE_REISSUE 36
83#define OPAL_PCI_SET_XIVE_PE 37
84#define OPAL_GET_XIVE_SOURCE 38
85#define OPAL_GET_MSI_32 39
86#define OPAL_GET_MSI_64 40
87#define OPAL_START_CPU 41
88#define OPAL_QUERY_CPU_STATUS 42
89#define OPAL_WRITE_OPPANEL 43 /* unimplemented */
90#define OPAL_PCI_MAP_PE_DMA_WINDOW 44
91#define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL 45
92#define OPAL_PCI_RESET 49
93#define OPAL_PCI_GET_HUB_DIAG_DATA 50
94#define OPAL_PCI_GET_PHB_DIAG_DATA 51
95#define OPAL_PCI_FENCE_PHB 52
96#define OPAL_PCI_REINIT 53
97#define OPAL_PCI_MASK_PE_ERROR 54
98#define OPAL_SET_SLOT_LED_STATUS 55
99#define OPAL_GET_EPOW_STATUS 56
100#define OPAL_SET_SYSTEM_ATTENTION_LED 57
101#define OPAL_RESERVED1 58
102#define OPAL_RESERVED2 59
103#define OPAL_PCI_NEXT_ERROR 60
104#define OPAL_PCI_EEH_FREEZE_STATUS2 61
105#define OPAL_PCI_POLL 62
106#define OPAL_PCI_MSI_EOI 63
107#define OPAL_PCI_GET_PHB_DIAG_DATA2 64
108#define OPAL_XSCOM_READ 65
109#define OPAL_XSCOM_WRITE 66
110#define OPAL_LPC_READ 67
111#define OPAL_LPC_WRITE 68
112#define OPAL_RETURN_CPU 69
113#define OPAL_REINIT_CPUS 70
114#define OPAL_ELOG_READ 71
115#define OPAL_ELOG_WRITE 72
116#define OPAL_ELOG_ACK 73
117#define OPAL_ELOG_RESEND 74
118#define OPAL_ELOG_SIZE 75
119#define OPAL_FLASH_VALIDATE 76
120#define OPAL_FLASH_MANAGE 77
121#define OPAL_FLASH_UPDATE 78
122#define OPAL_RESYNC_TIMEBASE 79
123#define OPAL_CHECK_TOKEN 80
124#define OPAL_DUMP_INIT 81
125#define OPAL_DUMP_INFO 82
126#define OPAL_DUMP_READ 83
127#define OPAL_DUMP_ACK 84
128#define OPAL_GET_MSG 85
129#define OPAL_CHECK_ASYNC_COMPLETION 86
130#define OPAL_SYNC_HOST_REBOOT 87
131#define OPAL_SENSOR_READ 88
132#define OPAL_GET_PARAM 89
133#define OPAL_SET_PARAM 90
134#define OPAL_DUMP_RESEND 91
135#define OPAL_ELOG_SEND 92 /* Deprecated */
136#define OPAL_PCI_SET_PHB_CAPI_MODE 93
137#define OPAL_DUMP_INFO2 94
138#define OPAL_WRITE_OPPANEL_ASYNC 95
139#define OPAL_PCI_ERR_INJECT 96
140#define OPAL_PCI_EEH_FREEZE_SET 97
141#define OPAL_HANDLE_HMI 98
142#define OPAL_CONFIG_CPU_IDLE_STATE 99
143#define OPAL_SLW_SET_REG 100
144#define OPAL_REGISTER_DUMP_REGION 101
145#define OPAL_UNREGISTER_DUMP_REGION 102
146#define OPAL_WRITE_TPO 103
147#define OPAL_READ_TPO 104
148#define OPAL_GET_DPO_STATUS 105
149#define OPAL_OLD_I2C_REQUEST 106 /* Deprecated */
150#define OPAL_IPMI_SEND 107
151#define OPAL_IPMI_RECV 108
152#define OPAL_I2C_REQUEST 109
153#define OPAL_FLASH_READ 110
154#define OPAL_FLASH_WRITE 111
155#define OPAL_FLASH_ERASE 112
156#define OPAL_LAST 112
157
158/* Device tree flags */
159
160/* Flags set in power-mgmt nodes in device tree if
161 * respective idle states are supported in the platform.
162 */
163#define OPAL_PM_NAP_ENABLED 0x00010000
164#define OPAL_PM_SLEEP_ENABLED 0x00020000
165#define OPAL_PM_WINKLE_ENABLED 0x00040000
166#define OPAL_PM_SLEEP_ENABLED_ER1 0x00080000 /* with workaround */
167
168#ifndef __ASSEMBLY__
169
170/* Other enums */
171enum OpalFreezeState {
172 OPAL_EEH_STOPPED_NOT_FROZEN = 0,
173 OPAL_EEH_STOPPED_MMIO_FREEZE = 1,
174 OPAL_EEH_STOPPED_DMA_FREEZE = 2,
175 OPAL_EEH_STOPPED_MMIO_DMA_FREEZE = 3,
176 OPAL_EEH_STOPPED_RESET = 4,
177 OPAL_EEH_STOPPED_TEMP_UNAVAIL = 5,
178 OPAL_EEH_STOPPED_PERM_UNAVAIL = 6
179};
180
181enum OpalEehFreezeActionToken {
182 OPAL_EEH_ACTION_CLEAR_FREEZE_MMIO = 1,
183 OPAL_EEH_ACTION_CLEAR_FREEZE_DMA = 2,
184 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL = 3,
185
186 OPAL_EEH_ACTION_SET_FREEZE_MMIO = 1,
187 OPAL_EEH_ACTION_SET_FREEZE_DMA = 2,
188 OPAL_EEH_ACTION_SET_FREEZE_ALL = 3
189};
190
191enum OpalPciStatusToken {
192 OPAL_EEH_NO_ERROR = 0,
193 OPAL_EEH_IOC_ERROR = 1,
194 OPAL_EEH_PHB_ERROR = 2,
195 OPAL_EEH_PE_ERROR = 3,
196 OPAL_EEH_PE_MMIO_ERROR = 4,
197 OPAL_EEH_PE_DMA_ERROR = 5
198};
199
200enum OpalPciErrorSeverity {
201 OPAL_EEH_SEV_NO_ERROR = 0,
202 OPAL_EEH_SEV_IOC_DEAD = 1,
203 OPAL_EEH_SEV_PHB_DEAD = 2,
204 OPAL_EEH_SEV_PHB_FENCED = 3,
205 OPAL_EEH_SEV_PE_ER = 4,
206 OPAL_EEH_SEV_INF = 5
207};
208
209enum OpalErrinjectType {
210 OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR = 0,
211 OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64 = 1,
212};
213
214enum OpalErrinjectFunc {
215 /* IOA bus specific errors */
216 OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_ADDR = 0,
217 OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_DATA = 1,
218 OPAL_ERR_INJECT_FUNC_IOA_LD_IO_ADDR = 2,
219 OPAL_ERR_INJECT_FUNC_IOA_LD_IO_DATA = 3,
220 OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_ADDR = 4,
221 OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_DATA = 5,
222 OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_ADDR = 6,
223 OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_DATA = 7,
224 OPAL_ERR_INJECT_FUNC_IOA_ST_IO_ADDR = 8,
225 OPAL_ERR_INJECT_FUNC_IOA_ST_IO_DATA = 9,
226 OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_ADDR = 10,
227 OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_DATA = 11,
228 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_ADDR = 12,
229 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_DATA = 13,
230 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_MASTER = 14,
231 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_TARGET = 15,
232 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_ADDR = 16,
233 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_DATA = 17,
234 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_MASTER = 18,
235 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_TARGET = 19,
236};
237
238enum OpalMmioWindowType {
239 OPAL_M32_WINDOW_TYPE = 1,
240 OPAL_M64_WINDOW_TYPE = 2,
241 OPAL_IO_WINDOW_TYPE = 3
242};
243
244enum OpalExceptionHandler {
245 OPAL_MACHINE_CHECK_HANDLER = 1,
246 OPAL_HYPERVISOR_MAINTENANCE_HANDLER = 2,
247 OPAL_SOFTPATCH_HANDLER = 3
248};
249
250enum OpalPendingState {
251 OPAL_EVENT_OPAL_INTERNAL = 0x1,
252 OPAL_EVENT_NVRAM = 0x2,
253 OPAL_EVENT_RTC = 0x4,
254 OPAL_EVENT_CONSOLE_OUTPUT = 0x8,
255 OPAL_EVENT_CONSOLE_INPUT = 0x10,
256 OPAL_EVENT_ERROR_LOG_AVAIL = 0x20,
257 OPAL_EVENT_ERROR_LOG = 0x40,
258 OPAL_EVENT_EPOW = 0x80,
259 OPAL_EVENT_LED_STATUS = 0x100,
260 OPAL_EVENT_PCI_ERROR = 0x200,
261 OPAL_EVENT_DUMP_AVAIL = 0x400,
262 OPAL_EVENT_MSG_PENDING = 0x800,
263};
264
265enum OpalThreadStatus {
266 OPAL_THREAD_INACTIVE = 0x0,
267 OPAL_THREAD_STARTED = 0x1,
268 OPAL_THREAD_UNAVAILABLE = 0x2 /* opal-v3 */
269};
270
271enum OpalPciBusCompare {
272 OpalPciBusAny = 0, /* Any bus number match */
273 OpalPciBus3Bits = 2, /* Match top 3 bits of bus number */
274 OpalPciBus4Bits = 3, /* Match top 4 bits of bus number */
275 OpalPciBus5Bits = 4, /* Match top 5 bits of bus number */
276 OpalPciBus6Bits = 5, /* Match top 6 bits of bus number */
277 OpalPciBus7Bits = 6, /* Match top 7 bits of bus number */
278 OpalPciBusAll = 7, /* Match bus number exactly */
279};
280
281enum OpalDeviceCompare {
282 OPAL_IGNORE_RID_DEVICE_NUMBER = 0,
283 OPAL_COMPARE_RID_DEVICE_NUMBER = 1
284};
285
286enum OpalFuncCompare {
287 OPAL_IGNORE_RID_FUNCTION_NUMBER = 0,
288 OPAL_COMPARE_RID_FUNCTION_NUMBER = 1
289};
290
291enum OpalPeAction {
292 OPAL_UNMAP_PE = 0,
293 OPAL_MAP_PE = 1
294};
295
296enum OpalPeltvAction {
297 OPAL_REMOVE_PE_FROM_DOMAIN = 0,
298 OPAL_ADD_PE_TO_DOMAIN = 1
299};
300
301enum OpalMveEnableAction {
302 OPAL_DISABLE_MVE = 0,
303 OPAL_ENABLE_MVE = 1
304};
305
306enum OpalM64Action {
307 OPAL_DISABLE_M64 = 0,
308 OPAL_ENABLE_M64_SPLIT = 1,
309 OPAL_ENABLE_M64_NON_SPLIT = 2
310};
311
312enum OpalPciResetScope {
313 OPAL_RESET_PHB_COMPLETE = 1,
314 OPAL_RESET_PCI_LINK = 2,
315 OPAL_RESET_PHB_ERROR = 3,
316 OPAL_RESET_PCI_HOT = 4,
317 OPAL_RESET_PCI_FUNDAMENTAL = 5,
318 OPAL_RESET_PCI_IODA_TABLE = 6
319};
320
321enum OpalPciReinitScope {
322 /*
323 * Note: we chose values that do not overlap
324 * OpalPciResetScope as OPAL v2 used the same
325 * enum for both
326 */
327 OPAL_REINIT_PCI_DEV = 1000
328};
329
330enum OpalPciResetState {
331 OPAL_DEASSERT_RESET = 0,
332 OPAL_ASSERT_RESET = 1
333};
334
335/*
336 * Address cycle types for LPC accesses. These also correspond
337 * to the content of the first cell of the "reg" property for
338 * device nodes on the LPC bus
339 */
340enum OpalLPCAddressType {
341 OPAL_LPC_MEM = 0,
342 OPAL_LPC_IO = 1,
343 OPAL_LPC_FW = 2,
344};
345
346enum opal_msg_type {
347 OPAL_MSG_ASYNC_COMP = 0, /* params[0] = token, params[1] = rc,
348 * additional params function-specific
349 */
350 OPAL_MSG_MEM_ERR,
351 OPAL_MSG_EPOW,
352 OPAL_MSG_SHUTDOWN, /* params[0] = 1 reboot, 0 shutdown */
353 OPAL_MSG_HMI_EVT,
354 OPAL_MSG_DPO,
355 OPAL_MSG_TYPE_MAX,
356};
357
358struct opal_msg {
359 __be32 msg_type;
360 __be32 reserved;
361 __be64 params[8];
362};
363
364/* System parameter permission */
365enum OpalSysparamPerm {
366 OPAL_SYSPARAM_READ = 0x1,
367 OPAL_SYSPARAM_WRITE = 0x2,
368 OPAL_SYSPARAM_RW = (OPAL_SYSPARAM_READ | OPAL_SYSPARAM_WRITE),
369};
370
371enum {
372 OPAL_IPMI_MSG_FORMAT_VERSION_1 = 1,
373};
374
375struct opal_ipmi_msg {
376 uint8_t version;
377 uint8_t netfn;
378 uint8_t cmd;
379 uint8_t data[];
380};
381
382/* FSP memory errors handling */
383enum OpalMemErr_Version {
384 OpalMemErr_V1 = 1,
385};
386
387enum OpalMemErrType {
388 OPAL_MEM_ERR_TYPE_RESILIENCE = 0,
389 OPAL_MEM_ERR_TYPE_DYN_DALLOC,
390};
391
392/* Memory Reilience error type */
393enum OpalMemErr_ResilErrType {
394 OPAL_MEM_RESILIENCE_CE = 0,
395 OPAL_MEM_RESILIENCE_UE,
396 OPAL_MEM_RESILIENCE_UE_SCRUB,
397};
398
399/* Dynamic Memory Deallocation type */
400enum OpalMemErr_DynErrType {
401 OPAL_MEM_DYNAMIC_DEALLOC = 0,
402};
403
404struct OpalMemoryErrorData {
405 enum OpalMemErr_Version version:8; /* 0x00 */
406 enum OpalMemErrType type:8; /* 0x01 */
407 __be16 flags; /* 0x02 */
408 uint8_t reserved_1[4]; /* 0x04 */
409
410 union {
411 /* Memory Resilience corrected/uncorrected error info */
412 struct {
413 enum OpalMemErr_ResilErrType resil_err_type:8;
414 uint8_t reserved_1[7];
415 __be64 physical_address_start;
416 __be64 physical_address_end;
417 } resilience;
418 /* Dynamic memory deallocation error info */
419 struct {
420 enum OpalMemErr_DynErrType dyn_err_type:8;
421 uint8_t reserved_1[7];
422 __be64 physical_address_start;
423 __be64 physical_address_end;
424 } dyn_dealloc;
425 } u;
426};
427
428/* HMI interrupt event */
429enum OpalHMI_Version {
430 OpalHMIEvt_V1 = 1,
431};
432
433enum OpalHMI_Severity {
434 OpalHMI_SEV_NO_ERROR = 0,
435 OpalHMI_SEV_WARNING = 1,
436 OpalHMI_SEV_ERROR_SYNC = 2,
437 OpalHMI_SEV_FATAL = 3,
438};
439
440enum OpalHMI_Disposition {
441 OpalHMI_DISPOSITION_RECOVERED = 0,
442 OpalHMI_DISPOSITION_NOT_RECOVERED = 1,
443};
444
445enum OpalHMI_ErrType {
446 OpalHMI_ERROR_MALFUNC_ALERT = 0,
447 OpalHMI_ERROR_PROC_RECOV_DONE,
448 OpalHMI_ERROR_PROC_RECOV_DONE_AGAIN,
449 OpalHMI_ERROR_PROC_RECOV_MASKED,
450 OpalHMI_ERROR_TFAC,
451 OpalHMI_ERROR_TFMR_PARITY,
452 OpalHMI_ERROR_HA_OVERFLOW_WARN,
453 OpalHMI_ERROR_XSCOM_FAIL,
454 OpalHMI_ERROR_XSCOM_DONE,
455 OpalHMI_ERROR_SCOM_FIR,
456 OpalHMI_ERROR_DEBUG_TRIG_FIR,
457 OpalHMI_ERROR_HYP_RESOURCE,
458 OpalHMI_ERROR_CAPP_RECOVERY,
459};
460
461struct OpalHMIEvent {
462 uint8_t version; /* 0x00 */
463 uint8_t severity; /* 0x01 */
464 uint8_t type; /* 0x02 */
465 uint8_t disposition; /* 0x03 */
466 uint8_t reserved_1[4]; /* 0x04 */
467
468 __be64 hmer;
469 /* TFMR register. Valid only for TFAC and TFMR_PARITY error type. */
470 __be64 tfmr;
471};
472
473enum {
474 OPAL_P7IOC_DIAG_TYPE_NONE = 0,
475 OPAL_P7IOC_DIAG_TYPE_RGC = 1,
476 OPAL_P7IOC_DIAG_TYPE_BI = 2,
477 OPAL_P7IOC_DIAG_TYPE_CI = 3,
478 OPAL_P7IOC_DIAG_TYPE_MISC = 4,
479 OPAL_P7IOC_DIAG_TYPE_I2C = 5,
480 OPAL_P7IOC_DIAG_TYPE_LAST = 6
481};
482
483struct OpalIoP7IOCErrorData {
484 __be16 type;
485
486 /* GEM */
487 __be64 gemXfir;
488 __be64 gemRfir;
489 __be64 gemRirqfir;
490 __be64 gemMask;
491 __be64 gemRwof;
492
493 /* LEM */
494 __be64 lemFir;
495 __be64 lemErrMask;
496 __be64 lemAction0;
497 __be64 lemAction1;
498 __be64 lemWof;
499
500 union {
501 struct OpalIoP7IOCRgcErrorData {
502 __be64 rgcStatus; /* 3E1C10 */
503 __be64 rgcLdcp; /* 3E1C18 */
504 }rgc;
505 struct OpalIoP7IOCBiErrorData {
506 __be64 biLdcp0; /* 3C0100, 3C0118 */
507 __be64 biLdcp1; /* 3C0108, 3C0120 */
508 __be64 biLdcp2; /* 3C0110, 3C0128 */
509 __be64 biFenceStatus; /* 3C0130, 3C0130 */
510
511 uint8_t biDownbound; /* BI Downbound or Upbound */
512 }bi;
513 struct OpalIoP7IOCCiErrorData {
514 __be64 ciPortStatus; /* 3Dn008 */
515 __be64 ciPortLdcp; /* 3Dn010 */
516
517 uint8_t ciPort; /* Index of CI port: 0/1 */
518 }ci;
519 };
520};
521
522/**
523 * This structure defines the overlay which will be used to store PHB error
524 * data upon request.
525 */
526enum {
527 OPAL_PHB_ERROR_DATA_VERSION_1 = 1,
528};
529
530enum {
531 OPAL_PHB_ERROR_DATA_TYPE_P7IOC = 1,
532 OPAL_PHB_ERROR_DATA_TYPE_PHB3 = 2
533};
534
535enum {
536 OPAL_P7IOC_NUM_PEST_REGS = 128,
537 OPAL_PHB3_NUM_PEST_REGS = 256
538};
539
540struct OpalIoPhbErrorCommon {
541 __be32 version;
542 __be32 ioType;
543 __be32 len;
544};
545
546struct OpalIoP7IOCPhbErrorData {
547 struct OpalIoPhbErrorCommon common;
548
549 __be32 brdgCtl;
550
551 // P7IOC utl regs
552 __be32 portStatusReg;
553 __be32 rootCmplxStatus;
554 __be32 busAgentStatus;
555
556 // P7IOC cfg regs
557 __be32 deviceStatus;
558 __be32 slotStatus;
559 __be32 linkStatus;
560 __be32 devCmdStatus;
561 __be32 devSecStatus;
562
563 // cfg AER regs
564 __be32 rootErrorStatus;
565 __be32 uncorrErrorStatus;
566 __be32 corrErrorStatus;
567 __be32 tlpHdr1;
568 __be32 tlpHdr2;
569 __be32 tlpHdr3;
570 __be32 tlpHdr4;
571 __be32 sourceId;
572
573 __be32 rsv3;
574
575 // Record data about the call to allocate a buffer.
576 __be64 errorClass;
577 __be64 correlator;
578
579 //P7IOC MMIO Error Regs
580 __be64 p7iocPlssr; // n120
581 __be64 p7iocCsr; // n110
582 __be64 lemFir; // nC00
583 __be64 lemErrorMask; // nC18
584 __be64 lemWOF; // nC40
585 __be64 phbErrorStatus; // nC80
586 __be64 phbFirstErrorStatus; // nC88
587 __be64 phbErrorLog0; // nCC0
588 __be64 phbErrorLog1; // nCC8
589 __be64 mmioErrorStatus; // nD00
590 __be64 mmioFirstErrorStatus; // nD08
591 __be64 mmioErrorLog0; // nD40
592 __be64 mmioErrorLog1; // nD48
593 __be64 dma0ErrorStatus; // nD80
594 __be64 dma0FirstErrorStatus; // nD88
595 __be64 dma0ErrorLog0; // nDC0
596 __be64 dma0ErrorLog1; // nDC8
597 __be64 dma1ErrorStatus; // nE00
598 __be64 dma1FirstErrorStatus; // nE08
599 __be64 dma1ErrorLog0; // nE40
600 __be64 dma1ErrorLog1; // nE48
601 __be64 pestA[OPAL_P7IOC_NUM_PEST_REGS];
602 __be64 pestB[OPAL_P7IOC_NUM_PEST_REGS];
603};
604
605struct OpalIoPhb3ErrorData {
606 struct OpalIoPhbErrorCommon common;
607
608 __be32 brdgCtl;
609
610 /* PHB3 UTL regs */
611 __be32 portStatusReg;
612 __be32 rootCmplxStatus;
613 __be32 busAgentStatus;
614
615 /* PHB3 cfg regs */
616 __be32 deviceStatus;
617 __be32 slotStatus;
618 __be32 linkStatus;
619 __be32 devCmdStatus;
620 __be32 devSecStatus;
621
622 /* cfg AER regs */
623 __be32 rootErrorStatus;
624 __be32 uncorrErrorStatus;
625 __be32 corrErrorStatus;
626 __be32 tlpHdr1;
627 __be32 tlpHdr2;
628 __be32 tlpHdr3;
629 __be32 tlpHdr4;
630 __be32 sourceId;
631
632 __be32 rsv3;
633
634 /* Record data about the call to allocate a buffer */
635 __be64 errorClass;
636 __be64 correlator;
637
638 /* PHB3 MMIO Error Regs */
639 __be64 nFir; /* 000 */
640 __be64 nFirMask; /* 003 */
641 __be64 nFirWOF; /* 008 */
642 __be64 phbPlssr; /* 120 */
643 __be64 phbCsr; /* 110 */
644 __be64 lemFir; /* C00 */
645 __be64 lemErrorMask; /* C18 */
646 __be64 lemWOF; /* C40 */
647 __be64 phbErrorStatus; /* C80 */
648 __be64 phbFirstErrorStatus; /* C88 */
649 __be64 phbErrorLog0; /* CC0 */
650 __be64 phbErrorLog1; /* CC8 */
651 __be64 mmioErrorStatus; /* D00 */
652 __be64 mmioFirstErrorStatus; /* D08 */
653 __be64 mmioErrorLog0; /* D40 */
654 __be64 mmioErrorLog1; /* D48 */
655 __be64 dma0ErrorStatus; /* D80 */
656 __be64 dma0FirstErrorStatus; /* D88 */
657 __be64 dma0ErrorLog0; /* DC0 */
658 __be64 dma0ErrorLog1; /* DC8 */
659 __be64 dma1ErrorStatus; /* E00 */
660 __be64 dma1FirstErrorStatus; /* E08 */
661 __be64 dma1ErrorLog0; /* E40 */
662 __be64 dma1ErrorLog1; /* E48 */
663 __be64 pestA[OPAL_PHB3_NUM_PEST_REGS];
664 __be64 pestB[OPAL_PHB3_NUM_PEST_REGS];
665};
666
667enum {
668 OPAL_REINIT_CPUS_HILE_BE = (1 << 0),
669 OPAL_REINIT_CPUS_HILE_LE = (1 << 1),
670};
671
672typedef struct oppanel_line {
673 __be64 line;
674 __be64 line_len;
675} oppanel_line_t;
676
677/*
678 * SG entries
679 *
680 * WARNING: The current implementation requires each entry
681 * to represent a block that is 4k aligned *and* each block
682 * size except the last one in the list to be as well.
683 */
684struct opal_sg_entry {
685 __be64 data;
686 __be64 length;
687};
688
689/*
690 * Candiate image SG list.
691 *
692 * length = VER | length
693 */
694struct opal_sg_list {
695 __be64 length;
696 __be64 next;
697 struct opal_sg_entry entry[];
698};
699
700/*
701 * Dump region ID range usable by the OS
702 */
703#define OPAL_DUMP_REGION_HOST_START 0x80
704#define OPAL_DUMP_REGION_LOG_BUF 0x80
705#define OPAL_DUMP_REGION_HOST_END 0xFF
706
707/* CAPI modes for PHB */
708enum {
709 OPAL_PHB_CAPI_MODE_PCIE = 0,
710 OPAL_PHB_CAPI_MODE_CAPI = 1,
711 OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2,
712 OPAL_PHB_CAPI_MODE_SNOOP_ON = 3,
713};
714
715/* OPAL I2C request */
716struct opal_i2c_request {
717 uint8_t type;
718#define OPAL_I2C_RAW_READ 0
719#define OPAL_I2C_RAW_WRITE 1
720#define OPAL_I2C_SM_READ 2
721#define OPAL_I2C_SM_WRITE 3
722 uint8_t flags;
723#define OPAL_I2C_ADDR_10 0x01 /* Not supported yet */
724 uint8_t subaddr_sz; /* Max 4 */
725 uint8_t reserved;
726 __be16 addr; /* 7 or 10 bit address */
727 __be16 reserved2;
728 __be32 subaddr; /* Sub-address if any */
729 __be32 size; /* Data size */
730 __be64 buffer_ra; /* Buffer real address */
731};
732
733#endif /* __ASSEMBLY__ */
734
735#endif /* __OPAL_API_H */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 9ee0a30a02ce..042af1abfc4d 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -9,755 +9,17 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#ifndef __OPAL_H 12#ifndef _ASM_POWERPC_OPAL_H
13#define __OPAL_H 13#define _ASM_POWERPC_OPAL_H
14 14
15#ifndef __ASSEMBLY__ 15#include <asm/opal-api.h>
16/*
17 * SG entry
18 *
19 * WARNING: The current implementation requires each entry
20 * to represent a block that is 4k aligned *and* each block
21 * size except the last one in the list to be as well.
22 */
23struct opal_sg_entry {
24 __be64 data;
25 __be64 length;
26};
27
28/* SG list */
29struct opal_sg_list {
30 __be64 length;
31 __be64 next;
32 struct opal_sg_entry entry[];
33};
34
35/* We calculate number of sg entries based on PAGE_SIZE */
36#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
37
38#endif /* __ASSEMBLY__ */
39
40/****** OPAL APIs ******/
41
42/* Return codes */
43#define OPAL_SUCCESS 0
44#define OPAL_PARAMETER -1
45#define OPAL_BUSY -2
46#define OPAL_PARTIAL -3
47#define OPAL_CONSTRAINED -4
48#define OPAL_CLOSED -5
49#define OPAL_HARDWARE -6
50#define OPAL_UNSUPPORTED -7
51#define OPAL_PERMISSION -8
52#define OPAL_NO_MEM -9
53#define OPAL_RESOURCE -10
54#define OPAL_INTERNAL_ERROR -11
55#define OPAL_BUSY_EVENT -12
56#define OPAL_HARDWARE_FROZEN -13
57#define OPAL_WRONG_STATE -14
58#define OPAL_ASYNC_COMPLETION -15
59#define OPAL_I2C_TIMEOUT -17
60#define OPAL_I2C_INVALID_CMD -18
61#define OPAL_I2C_LBUS_PARITY -19
62#define OPAL_I2C_BKEND_OVERRUN -20
63#define OPAL_I2C_BKEND_ACCESS -21
64#define OPAL_I2C_ARBT_LOST -22
65#define OPAL_I2C_NACK_RCVD -23
66#define OPAL_I2C_STOP_ERR -24
67
68/* API Tokens (in r0) */
69#define OPAL_INVALID_CALL -1
70#define OPAL_CONSOLE_WRITE 1
71#define OPAL_CONSOLE_READ 2
72#define OPAL_RTC_READ 3
73#define OPAL_RTC_WRITE 4
74#define OPAL_CEC_POWER_DOWN 5
75#define OPAL_CEC_REBOOT 6
76#define OPAL_READ_NVRAM 7
77#define OPAL_WRITE_NVRAM 8
78#define OPAL_HANDLE_INTERRUPT 9
79#define OPAL_POLL_EVENTS 10
80#define OPAL_PCI_SET_HUB_TCE_MEMORY 11
81#define OPAL_PCI_SET_PHB_TCE_MEMORY 12
82#define OPAL_PCI_CONFIG_READ_BYTE 13
83#define OPAL_PCI_CONFIG_READ_HALF_WORD 14
84#define OPAL_PCI_CONFIG_READ_WORD 15
85#define OPAL_PCI_CONFIG_WRITE_BYTE 16
86#define OPAL_PCI_CONFIG_WRITE_HALF_WORD 17
87#define OPAL_PCI_CONFIG_WRITE_WORD 18
88#define OPAL_SET_XIVE 19
89#define OPAL_GET_XIVE 20
90#define OPAL_GET_COMPLETION_TOKEN_STATUS 21 /* obsolete */
91#define OPAL_REGISTER_OPAL_EXCEPTION_HANDLER 22
92#define OPAL_PCI_EEH_FREEZE_STATUS 23
93#define OPAL_PCI_SHPC 24
94#define OPAL_CONSOLE_WRITE_BUFFER_SPACE 25
95#define OPAL_PCI_EEH_FREEZE_CLEAR 26
96#define OPAL_PCI_PHB_MMIO_ENABLE 27
97#define OPAL_PCI_SET_PHB_MEM_WINDOW 28
98#define OPAL_PCI_MAP_PE_MMIO_WINDOW 29
99#define OPAL_PCI_SET_PHB_TABLE_MEMORY 30
100#define OPAL_PCI_SET_PE 31
101#define OPAL_PCI_SET_PELTV 32
102#define OPAL_PCI_SET_MVE 33
103#define OPAL_PCI_SET_MVE_ENABLE 34
104#define OPAL_PCI_GET_XIVE_REISSUE 35
105#define OPAL_PCI_SET_XIVE_REISSUE 36
106#define OPAL_PCI_SET_XIVE_PE 37
107#define OPAL_GET_XIVE_SOURCE 38
108#define OPAL_GET_MSI_32 39
109#define OPAL_GET_MSI_64 40
110#define OPAL_START_CPU 41
111#define OPAL_QUERY_CPU_STATUS 42
112#define OPAL_WRITE_OPPANEL 43
113#define OPAL_PCI_MAP_PE_DMA_WINDOW 44
114#define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL 45
115#define OPAL_PCI_RESET 49
116#define OPAL_PCI_GET_HUB_DIAG_DATA 50
117#define OPAL_PCI_GET_PHB_DIAG_DATA 51
118#define OPAL_PCI_FENCE_PHB 52
119#define OPAL_PCI_REINIT 53
120#define OPAL_PCI_MASK_PE_ERROR 54
121#define OPAL_SET_SLOT_LED_STATUS 55
122#define OPAL_GET_EPOW_STATUS 56
123#define OPAL_SET_SYSTEM_ATTENTION_LED 57
124#define OPAL_RESERVED1 58
125#define OPAL_RESERVED2 59
126#define OPAL_PCI_NEXT_ERROR 60
127#define OPAL_PCI_EEH_FREEZE_STATUS2 61
128#define OPAL_PCI_POLL 62
129#define OPAL_PCI_MSI_EOI 63
130#define OPAL_PCI_GET_PHB_DIAG_DATA2 64
131#define OPAL_XSCOM_READ 65
132#define OPAL_XSCOM_WRITE 66
133#define OPAL_LPC_READ 67
134#define OPAL_LPC_WRITE 68
135#define OPAL_RETURN_CPU 69
136#define OPAL_REINIT_CPUS 70
137#define OPAL_ELOG_READ 71
138#define OPAL_ELOG_WRITE 72
139#define OPAL_ELOG_ACK 73
140#define OPAL_ELOG_RESEND 74
141#define OPAL_ELOG_SIZE 75
142#define OPAL_FLASH_VALIDATE 76
143#define OPAL_FLASH_MANAGE 77
144#define OPAL_FLASH_UPDATE 78
145#define OPAL_RESYNC_TIMEBASE 79
146#define OPAL_CHECK_TOKEN 80
147#define OPAL_DUMP_INIT 81
148#define OPAL_DUMP_INFO 82
149#define OPAL_DUMP_READ 83
150#define OPAL_DUMP_ACK 84
151#define OPAL_GET_MSG 85
152#define OPAL_CHECK_ASYNC_COMPLETION 86
153#define OPAL_SYNC_HOST_REBOOT 87
154#define OPAL_SENSOR_READ 88
155#define OPAL_GET_PARAM 89
156#define OPAL_SET_PARAM 90
157#define OPAL_DUMP_RESEND 91
158#define OPAL_PCI_SET_PHB_CXL_MODE 93
159#define OPAL_DUMP_INFO2 94
160#define OPAL_PCI_ERR_INJECT 96
161#define OPAL_PCI_EEH_FREEZE_SET 97
162#define OPAL_HANDLE_HMI 98
163#define OPAL_CONFIG_CPU_IDLE_STATE 99
164#define OPAL_SLW_SET_REG 100
165#define OPAL_REGISTER_DUMP_REGION 101
166#define OPAL_UNREGISTER_DUMP_REGION 102
167#define OPAL_WRITE_TPO 103
168#define OPAL_READ_TPO 104
169#define OPAL_IPMI_SEND 107
170#define OPAL_IPMI_RECV 108
171#define OPAL_I2C_REQUEST 109
172
173/* Device tree flags */
174
175/* Flags set in power-mgmt nodes in device tree if
176 * respective idle states are supported in the platform.
177 */
178#define OPAL_PM_NAP_ENABLED 0x00010000
179#define OPAL_PM_SLEEP_ENABLED 0x00020000
180#define OPAL_PM_WINKLE_ENABLED 0x00040000
181#define OPAL_PM_SLEEP_ENABLED_ER1 0x00080000
182 16
183#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
184 18
185#include <linux/notifier.h> 19#include <linux/notifier.h>
186 20
187/* Other enums */ 21/* We calculate number of sg entries based on PAGE_SIZE */
188enum OpalVendorApiTokens { 22#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
189 OPAL_START_VENDOR_API_RANGE = 1000, OPAL_END_VENDOR_API_RANGE = 1999
190};
191
192enum OpalFreezeState {
193 OPAL_EEH_STOPPED_NOT_FROZEN = 0,
194 OPAL_EEH_STOPPED_MMIO_FREEZE = 1,
195 OPAL_EEH_STOPPED_DMA_FREEZE = 2,
196 OPAL_EEH_STOPPED_MMIO_DMA_FREEZE = 3,
197 OPAL_EEH_STOPPED_RESET = 4,
198 OPAL_EEH_STOPPED_TEMP_UNAVAIL = 5,
199 OPAL_EEH_STOPPED_PERM_UNAVAIL = 6
200};
201
202enum OpalEehFreezeActionToken {
203 OPAL_EEH_ACTION_CLEAR_FREEZE_MMIO = 1,
204 OPAL_EEH_ACTION_CLEAR_FREEZE_DMA = 2,
205 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL = 3,
206
207 OPAL_EEH_ACTION_SET_FREEZE_MMIO = 1,
208 OPAL_EEH_ACTION_SET_FREEZE_DMA = 2,
209 OPAL_EEH_ACTION_SET_FREEZE_ALL = 3
210};
211
212enum OpalPciStatusToken {
213 OPAL_EEH_NO_ERROR = 0,
214 OPAL_EEH_IOC_ERROR = 1,
215 OPAL_EEH_PHB_ERROR = 2,
216 OPAL_EEH_PE_ERROR = 3,
217 OPAL_EEH_PE_MMIO_ERROR = 4,
218 OPAL_EEH_PE_DMA_ERROR = 5
219};
220
221enum OpalPciErrorSeverity {
222 OPAL_EEH_SEV_NO_ERROR = 0,
223 OPAL_EEH_SEV_IOC_DEAD = 1,
224 OPAL_EEH_SEV_PHB_DEAD = 2,
225 OPAL_EEH_SEV_PHB_FENCED = 3,
226 OPAL_EEH_SEV_PE_ER = 4,
227 OPAL_EEH_SEV_INF = 5
228};
229
230enum OpalErrinjectType {
231 OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR = 0,
232 OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64 = 1,
233};
234
235enum OpalErrinjectFunc {
236 /* IOA bus specific errors */
237 OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_ADDR = 0,
238 OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_DATA = 1,
239 OPAL_ERR_INJECT_FUNC_IOA_LD_IO_ADDR = 2,
240 OPAL_ERR_INJECT_FUNC_IOA_LD_IO_DATA = 3,
241 OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_ADDR = 4,
242 OPAL_ERR_INJECT_FUNC_IOA_LD_CFG_DATA = 5,
243 OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_ADDR = 6,
244 OPAL_ERR_INJECT_FUNC_IOA_ST_MEM_DATA = 7,
245 OPAL_ERR_INJECT_FUNC_IOA_ST_IO_ADDR = 8,
246 OPAL_ERR_INJECT_FUNC_IOA_ST_IO_DATA = 9,
247 OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_ADDR = 10,
248 OPAL_ERR_INJECT_FUNC_IOA_ST_CFG_DATA = 11,
249 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_ADDR = 12,
250 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_DATA = 13,
251 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_MASTER = 14,
252 OPAL_ERR_INJECT_FUNC_IOA_DMA_RD_TARGET = 15,
253 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_ADDR = 16,
254 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_DATA = 17,
255 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_MASTER = 18,
256 OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_TARGET = 19,
257};
258
259enum OpalShpcAction {
260 OPAL_SHPC_GET_LINK_STATE = 0,
261 OPAL_SHPC_GET_SLOT_STATE = 1
262};
263
264enum OpalShpcLinkState {
265 OPAL_SHPC_LINK_DOWN = 0,
266 OPAL_SHPC_LINK_UP = 1
267};
268
269enum OpalMmioWindowType {
270 OPAL_M32_WINDOW_TYPE = 1,
271 OPAL_M64_WINDOW_TYPE = 2,
272 OPAL_IO_WINDOW_TYPE = 3
273};
274
275enum OpalShpcSlotState {
276 OPAL_SHPC_DEV_NOT_PRESENT = 0,
277 OPAL_SHPC_DEV_PRESENT = 1
278};
279
280enum OpalExceptionHandler {
281 OPAL_MACHINE_CHECK_HANDLER = 1,
282 OPAL_HYPERVISOR_MAINTENANCE_HANDLER = 2,
283 OPAL_SOFTPATCH_HANDLER = 3
284};
285
286enum OpalPendingState {
287 OPAL_EVENT_OPAL_INTERNAL = 0x1,
288 OPAL_EVENT_NVRAM = 0x2,
289 OPAL_EVENT_RTC = 0x4,
290 OPAL_EVENT_CONSOLE_OUTPUT = 0x8,
291 OPAL_EVENT_CONSOLE_INPUT = 0x10,
292 OPAL_EVENT_ERROR_LOG_AVAIL = 0x20,
293 OPAL_EVENT_ERROR_LOG = 0x40,
294 OPAL_EVENT_EPOW = 0x80,
295 OPAL_EVENT_LED_STATUS = 0x100,
296 OPAL_EVENT_PCI_ERROR = 0x200,
297 OPAL_EVENT_DUMP_AVAIL = 0x400,
298 OPAL_EVENT_MSG_PENDING = 0x800,
299};
300
301enum OpalMessageType {
302 OPAL_MSG_ASYNC_COMP = 0, /* params[0] = token, params[1] = rc,
303 * additional params function-specific
304 */
305 OPAL_MSG_MEM_ERR,
306 OPAL_MSG_EPOW,
307 OPAL_MSG_SHUTDOWN, /* params[0] = 1 reboot, 0 shutdown */
308 OPAL_MSG_HMI_EVT,
309 OPAL_MSG_TYPE_MAX,
310};
311
312enum OpalThreadStatus {
313 OPAL_THREAD_INACTIVE = 0x0,
314 OPAL_THREAD_STARTED = 0x1,
315 OPAL_THREAD_UNAVAILABLE = 0x2 /* opal-v3 */
316};
317
318enum OpalPciBusCompare {
319 OpalPciBusAny = 0, /* Any bus number match */
320 OpalPciBus3Bits = 2, /* Match top 3 bits of bus number */
321 OpalPciBus4Bits = 3, /* Match top 4 bits of bus number */
322 OpalPciBus5Bits = 4, /* Match top 5 bits of bus number */
323 OpalPciBus6Bits = 5, /* Match top 6 bits of bus number */
324 OpalPciBus7Bits = 6, /* Match top 7 bits of bus number */
325 OpalPciBusAll = 7, /* Match bus number exactly */
326};
327
328enum OpalDeviceCompare {
329 OPAL_IGNORE_RID_DEVICE_NUMBER = 0,
330 OPAL_COMPARE_RID_DEVICE_NUMBER = 1
331};
332
333enum OpalFuncCompare {
334 OPAL_IGNORE_RID_FUNCTION_NUMBER = 0,
335 OPAL_COMPARE_RID_FUNCTION_NUMBER = 1
336};
337
338enum OpalPeAction {
339 OPAL_UNMAP_PE = 0,
340 OPAL_MAP_PE = 1
341};
342
343enum OpalPeltvAction {
344 OPAL_REMOVE_PE_FROM_DOMAIN = 0,
345 OPAL_ADD_PE_TO_DOMAIN = 1
346};
347
348enum OpalMveEnableAction {
349 OPAL_DISABLE_MVE = 0,
350 OPAL_ENABLE_MVE = 1
351};
352
353enum OpalM64EnableAction {
354 OPAL_DISABLE_M64 = 0,
355 OPAL_ENABLE_M64_SPLIT = 1,
356 OPAL_ENABLE_M64_NON_SPLIT = 2
357};
358
359enum OpalPciResetScope {
360 OPAL_RESET_PHB_COMPLETE = 1,
361 OPAL_RESET_PCI_LINK = 2,
362 OPAL_RESET_PHB_ERROR = 3,
363 OPAL_RESET_PCI_HOT = 4,
364 OPAL_RESET_PCI_FUNDAMENTAL = 5,
365 OPAL_RESET_PCI_IODA_TABLE = 6
366};
367
368enum OpalPciReinitScope {
369 OPAL_REINIT_PCI_DEV = 1000
370};
371
372enum OpalPciResetState {
373 OPAL_DEASSERT_RESET = 0,
374 OPAL_ASSERT_RESET = 1
375};
376
377enum OpalPciMaskAction {
378 OPAL_UNMASK_ERROR_TYPE = 0,
379 OPAL_MASK_ERROR_TYPE = 1
380};
381
382enum OpalSlotLedType {
383 OPAL_SLOT_LED_ID_TYPE = 0,
384 OPAL_SLOT_LED_FAULT_TYPE = 1
385};
386
387enum OpalLedAction {
388 OPAL_TURN_OFF_LED = 0,
389 OPAL_TURN_ON_LED = 1,
390 OPAL_QUERY_LED_STATE_AFTER_BUSY = 2
391};
392
393enum OpalEpowStatus {
394 OPAL_EPOW_NONE = 0,
395 OPAL_EPOW_UPS = 1,
396 OPAL_EPOW_OVER_AMBIENT_TEMP = 2,
397 OPAL_EPOW_OVER_INTERNAL_TEMP = 3
398};
399
400/*
401 * Address cycle types for LPC accesses. These also correspond
402 * to the content of the first cell of the "reg" property for
403 * device nodes on the LPC bus
404 */
405enum OpalLPCAddressType {
406 OPAL_LPC_MEM = 0,
407 OPAL_LPC_IO = 1,
408 OPAL_LPC_FW = 2,
409};
410
411/* System parameter permission */
412enum OpalSysparamPerm {
413 OPAL_SYSPARAM_READ = 0x1,
414 OPAL_SYSPARAM_WRITE = 0x2,
415 OPAL_SYSPARAM_RW = (OPAL_SYSPARAM_READ | OPAL_SYSPARAM_WRITE),
416};
417
418struct opal_msg {
419 __be32 msg_type;
420 __be32 reserved;
421 __be64 params[8];
422};
423
424enum {
425 OPAL_IPMI_MSG_FORMAT_VERSION_1 = 1,
426};
427
428struct opal_ipmi_msg {
429 uint8_t version;
430 uint8_t netfn;
431 uint8_t cmd;
432 uint8_t data[];
433};
434
435/* FSP memory errors handling */
436enum OpalMemErr_Version {
437 OpalMemErr_V1 = 1,
438};
439
440enum OpalMemErrType {
441 OPAL_MEM_ERR_TYPE_RESILIENCE = 0,
442 OPAL_MEM_ERR_TYPE_DYN_DALLOC,
443 OPAL_MEM_ERR_TYPE_SCRUB,
444};
445
446/* Memory Reilience error type */
447enum OpalMemErr_ResilErrType {
448 OPAL_MEM_RESILIENCE_CE = 0,
449 OPAL_MEM_RESILIENCE_UE,
450 OPAL_MEM_RESILIENCE_UE_SCRUB,
451};
452
453/* Dynamic Memory Deallocation type */
454enum OpalMemErr_DynErrType {
455 OPAL_MEM_DYNAMIC_DEALLOC = 0,
456};
457
458/* OpalMemoryErrorData->flags */
459#define OPAL_MEM_CORRECTED_ERROR 0x0001
460#define OPAL_MEM_THRESHOLD_EXCEEDED 0x0002
461#define OPAL_MEM_ACK_REQUIRED 0x8000
462
463struct OpalMemoryErrorData {
464 enum OpalMemErr_Version version:8; /* 0x00 */
465 enum OpalMemErrType type:8; /* 0x01 */
466 __be16 flags; /* 0x02 */
467 uint8_t reserved_1[4]; /* 0x04 */
468
469 union {
470 /* Memory Resilience corrected/uncorrected error info */
471 struct {
472 enum OpalMemErr_ResilErrType resil_err_type:8;
473 uint8_t reserved_1[7];
474 __be64 physical_address_start;
475 __be64 physical_address_end;
476 } resilience;
477 /* Dynamic memory deallocation error info */
478 struct {
479 enum OpalMemErr_DynErrType dyn_err_type:8;
480 uint8_t reserved_1[7];
481 __be64 physical_address_start;
482 __be64 physical_address_end;
483 } dyn_dealloc;
484 } u;
485};
486
487/* HMI interrupt event */
488enum OpalHMI_Version {
489 OpalHMIEvt_V1 = 1,
490};
491
492enum OpalHMI_Severity {
493 OpalHMI_SEV_NO_ERROR = 0,
494 OpalHMI_SEV_WARNING = 1,
495 OpalHMI_SEV_ERROR_SYNC = 2,
496 OpalHMI_SEV_FATAL = 3,
497};
498
499enum OpalHMI_Disposition {
500 OpalHMI_DISPOSITION_RECOVERED = 0,
501 OpalHMI_DISPOSITION_NOT_RECOVERED = 1,
502};
503
504enum OpalHMI_ErrType {
505 OpalHMI_ERROR_MALFUNC_ALERT = 0,
506 OpalHMI_ERROR_PROC_RECOV_DONE,
507 OpalHMI_ERROR_PROC_RECOV_DONE_AGAIN,
508 OpalHMI_ERROR_PROC_RECOV_MASKED,
509 OpalHMI_ERROR_TFAC,
510 OpalHMI_ERROR_TFMR_PARITY,
511 OpalHMI_ERROR_HA_OVERFLOW_WARN,
512 OpalHMI_ERROR_XSCOM_FAIL,
513 OpalHMI_ERROR_XSCOM_DONE,
514 OpalHMI_ERROR_SCOM_FIR,
515 OpalHMI_ERROR_DEBUG_TRIG_FIR,
516 OpalHMI_ERROR_HYP_RESOURCE,
517};
518
519struct OpalHMIEvent {
520 uint8_t version; /* 0x00 */
521 uint8_t severity; /* 0x01 */
522 uint8_t type; /* 0x02 */
523 uint8_t disposition; /* 0x03 */
524 uint8_t reserved_1[4]; /* 0x04 */
525
526 __be64 hmer;
527 /* TFMR register. Valid only for TFAC and TFMR_PARITY error type. */
528 __be64 tfmr;
529};
530
531enum {
532 OPAL_P7IOC_DIAG_TYPE_NONE = 0,
533 OPAL_P7IOC_DIAG_TYPE_RGC = 1,
534 OPAL_P7IOC_DIAG_TYPE_BI = 2,
535 OPAL_P7IOC_DIAG_TYPE_CI = 3,
536 OPAL_P7IOC_DIAG_TYPE_MISC = 4,
537 OPAL_P7IOC_DIAG_TYPE_I2C = 5,
538 OPAL_P7IOC_DIAG_TYPE_LAST = 6
539};
540
541struct OpalIoP7IOCErrorData {
542 __be16 type;
543
544 /* GEM */
545 __be64 gemXfir;
546 __be64 gemRfir;
547 __be64 gemRirqfir;
548 __be64 gemMask;
549 __be64 gemRwof;
550
551 /* LEM */
552 __be64 lemFir;
553 __be64 lemErrMask;
554 __be64 lemAction0;
555 __be64 lemAction1;
556 __be64 lemWof;
557
558 union {
559 struct OpalIoP7IOCRgcErrorData {
560 __be64 rgcStatus; /* 3E1C10 */
561 __be64 rgcLdcp; /* 3E1C18 */
562 }rgc;
563 struct OpalIoP7IOCBiErrorData {
564 __be64 biLdcp0; /* 3C0100, 3C0118 */
565 __be64 biLdcp1; /* 3C0108, 3C0120 */
566 __be64 biLdcp2; /* 3C0110, 3C0128 */
567 __be64 biFenceStatus; /* 3C0130, 3C0130 */
568
569 u8 biDownbound; /* BI Downbound or Upbound */
570 }bi;
571 struct OpalIoP7IOCCiErrorData {
572 __be64 ciPortStatus; /* 3Dn008 */
573 __be64 ciPortLdcp; /* 3Dn010 */
574
575 u8 ciPort; /* Index of CI port: 0/1 */
576 }ci;
577 };
578};
579
580/**
581 * This structure defines the overlay which will be used to store PHB error
582 * data upon request.
583 */
584enum {
585 OPAL_PHB_ERROR_DATA_VERSION_1 = 1,
586};
587
588enum {
589 OPAL_PHB_ERROR_DATA_TYPE_P7IOC = 1,
590 OPAL_PHB_ERROR_DATA_TYPE_PHB3 = 2
591};
592
593enum {
594 OPAL_P7IOC_NUM_PEST_REGS = 128,
595 OPAL_PHB3_NUM_PEST_REGS = 256
596};
597
598/* CAPI modes for PHB */
599enum {
600 OPAL_PHB_CAPI_MODE_PCIE = 0,
601 OPAL_PHB_CAPI_MODE_CAPI = 1,
602 OPAL_PHB_CAPI_MODE_SNOOP_OFF = 2,
603 OPAL_PHB_CAPI_MODE_SNOOP_ON = 3,
604};
605
606struct OpalIoPhbErrorCommon {
607 __be32 version;
608 __be32 ioType;
609 __be32 len;
610};
611
612struct OpalIoP7IOCPhbErrorData {
613 struct OpalIoPhbErrorCommon common;
614
615 __be32 brdgCtl;
616
617 // P7IOC utl regs
618 __be32 portStatusReg;
619 __be32 rootCmplxStatus;
620 __be32 busAgentStatus;
621
622 // P7IOC cfg regs
623 __be32 deviceStatus;
624 __be32 slotStatus;
625 __be32 linkStatus;
626 __be32 devCmdStatus;
627 __be32 devSecStatus;
628
629 // cfg AER regs
630 __be32 rootErrorStatus;
631 __be32 uncorrErrorStatus;
632 __be32 corrErrorStatus;
633 __be32 tlpHdr1;
634 __be32 tlpHdr2;
635 __be32 tlpHdr3;
636 __be32 tlpHdr4;
637 __be32 sourceId;
638
639 __be32 rsv3;
640
641 // Record data about the call to allocate a buffer.
642 __be64 errorClass;
643 __be64 correlator;
644
645 //P7IOC MMIO Error Regs
646 __be64 p7iocPlssr; // n120
647 __be64 p7iocCsr; // n110
648 __be64 lemFir; // nC00
649 __be64 lemErrorMask; // nC18
650 __be64 lemWOF; // nC40
651 __be64 phbErrorStatus; // nC80
652 __be64 phbFirstErrorStatus; // nC88
653 __be64 phbErrorLog0; // nCC0
654 __be64 phbErrorLog1; // nCC8
655 __be64 mmioErrorStatus; // nD00
656 __be64 mmioFirstErrorStatus; // nD08
657 __be64 mmioErrorLog0; // nD40
658 __be64 mmioErrorLog1; // nD48
659 __be64 dma0ErrorStatus; // nD80
660 __be64 dma0FirstErrorStatus; // nD88
661 __be64 dma0ErrorLog0; // nDC0
662 __be64 dma0ErrorLog1; // nDC8
663 __be64 dma1ErrorStatus; // nE00
664 __be64 dma1FirstErrorStatus; // nE08
665 __be64 dma1ErrorLog0; // nE40
666 __be64 dma1ErrorLog1; // nE48
667 __be64 pestA[OPAL_P7IOC_NUM_PEST_REGS];
668 __be64 pestB[OPAL_P7IOC_NUM_PEST_REGS];
669};
670
671struct OpalIoPhb3ErrorData {
672 struct OpalIoPhbErrorCommon common;
673
674 __be32 brdgCtl;
675
676 /* PHB3 UTL regs */
677 __be32 portStatusReg;
678 __be32 rootCmplxStatus;
679 __be32 busAgentStatus;
680
681 /* PHB3 cfg regs */
682 __be32 deviceStatus;
683 __be32 slotStatus;
684 __be32 linkStatus;
685 __be32 devCmdStatus;
686 __be32 devSecStatus;
687
688 /* cfg AER regs */
689 __be32 rootErrorStatus;
690 __be32 uncorrErrorStatus;
691 __be32 corrErrorStatus;
692 __be32 tlpHdr1;
693 __be32 tlpHdr2;
694 __be32 tlpHdr3;
695 __be32 tlpHdr4;
696 __be32 sourceId;
697
698 __be32 rsv3;
699
700 /* Record data about the call to allocate a buffer */
701 __be64 errorClass;
702 __be64 correlator;
703
704 __be64 nFir; /* 000 */
705 __be64 nFirMask; /* 003 */
706 __be64 nFirWOF; /* 008 */
707
708 /* PHB3 MMIO Error Regs */
709 __be64 phbPlssr; /* 120 */
710 __be64 phbCsr; /* 110 */
711 __be64 lemFir; /* C00 */
712 __be64 lemErrorMask; /* C18 */
713 __be64 lemWOF; /* C40 */
714 __be64 phbErrorStatus; /* C80 */
715 __be64 phbFirstErrorStatus; /* C88 */
716 __be64 phbErrorLog0; /* CC0 */
717 __be64 phbErrorLog1; /* CC8 */
718 __be64 mmioErrorStatus; /* D00 */
719 __be64 mmioFirstErrorStatus; /* D08 */
720 __be64 mmioErrorLog0; /* D40 */
721 __be64 mmioErrorLog1; /* D48 */
722 __be64 dma0ErrorStatus; /* D80 */
723 __be64 dma0FirstErrorStatus; /* D88 */
724 __be64 dma0ErrorLog0; /* DC0 */
725 __be64 dma0ErrorLog1; /* DC8 */
726 __be64 dma1ErrorStatus; /* E00 */
727 __be64 dma1FirstErrorStatus; /* E08 */
728 __be64 dma1ErrorLog0; /* E40 */
729 __be64 dma1ErrorLog1; /* E48 */
730 __be64 pestA[OPAL_PHB3_NUM_PEST_REGS];
731 __be64 pestB[OPAL_PHB3_NUM_PEST_REGS];
732};
733
734enum {
735 OPAL_REINIT_CPUS_HILE_BE = (1 << 0),
736 OPAL_REINIT_CPUS_HILE_LE = (1 << 1),
737};
738
739typedef struct oppanel_line {
740 const char * line;
741 uint64_t line_len;
742} oppanel_line_t;
743
744/* OPAL I2C request */
745struct opal_i2c_request {
746 uint8_t type;
747#define OPAL_I2C_RAW_READ 0
748#define OPAL_I2C_RAW_WRITE 1
749#define OPAL_I2C_SM_READ 2
750#define OPAL_I2C_SM_WRITE 3
751 uint8_t flags;
752#define OPAL_I2C_ADDR_10 0x01 /* Not supported yet */
753 uint8_t subaddr_sz; /* Max 4 */
754 uint8_t reserved;
755 __be16 addr; /* 7 or 10 bit address */
756 __be16 reserved2;
757 __be32 subaddr; /* Sub-address if any */
758 __be32 size; /* Data size */
759 __be64 buffer_ra; /* Buffer real address */
760};
761 23
762/* /sys/firmware/opal */ 24/* /sys/firmware/opal */
763extern struct kobject *opal_kobj; 25extern struct kobject *opal_kobj;
@@ -932,6 +194,13 @@ int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
932int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id, 194int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
933 struct opal_i2c_request *oreq); 195 struct opal_i2c_request *oreq);
934 196
197int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
198 uint64_t size, uint64_t token);
199int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
200 uint64_t size, uint64_t token);
201int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
202 uint64_t token);
203
935/* Internal functions */ 204/* Internal functions */
936extern int early_init_dt_scan_opal(unsigned long node, const char *uname, 205extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
937 int depth, void *data); 206 int depth, void *data);
@@ -946,8 +215,10 @@ extern void hvc_opal_init_early(void);
946extern int opal_notifier_register(struct notifier_block *nb); 215extern int opal_notifier_register(struct notifier_block *nb);
947extern int opal_notifier_unregister(struct notifier_block *nb); 216extern int opal_notifier_unregister(struct notifier_block *nb);
948 217
949extern int opal_message_notifier_register(enum OpalMessageType msg_type, 218extern int opal_message_notifier_register(enum opal_msg_type msg_type,
950 struct notifier_block *nb); 219 struct notifier_block *nb);
220extern int opal_message_notifier_unregister(enum opal_msg_type msg_type,
221 struct notifier_block *nb);
951extern void opal_notifier_enable(void); 222extern void opal_notifier_enable(void);
952extern void opal_notifier_disable(void); 223extern void opal_notifier_disable(void);
953extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val); 224extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
@@ -962,7 +233,7 @@ extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
962struct rtc_time; 233struct rtc_time;
963extern unsigned long opal_get_boot_time(void); 234extern unsigned long opal_get_boot_time(void);
964extern void opal_nvram_init(void); 235extern void opal_nvram_init(void);
965extern void opal_flash_init(void); 236extern void opal_flash_update_init(void);
966extern void opal_flash_term_callback(void); 237extern void opal_flash_term_callback(void);
967extern int opal_elog_init(void); 238extern int opal_elog_init(void);
968extern void opal_platform_dump_init(void); 239extern void opal_platform_dump_init(void);
@@ -983,13 +254,8 @@ struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
983 unsigned long vmalloc_size); 254 unsigned long vmalloc_size);
984void opal_free_sg_list(struct opal_sg_list *sg); 255void opal_free_sg_list(struct opal_sg_list *sg);
985 256
986/* 257extern int opal_error_code(int rc);
987 * Dump region ID range usable by the OS
988 */
989#define OPAL_DUMP_REGION_HOST_START 0x80
990#define OPAL_DUMP_REGION_LOG_BUF 0x80
991#define OPAL_DUMP_REGION_HOST_END 0xFF
992 258
993#endif /* __ASSEMBLY__ */ 259#endif /* __ASSEMBLY__ */
994 260
995#endif /* __OPAL_H */ 261#endif /* _ASM_POWERPC_OPAL_H */
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index e5f22c6c4bf9..70bd4381f8e6 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -106,9 +106,9 @@ struct paca_struct {
106#endif /* CONFIG_PPC_STD_MMU_64 */ 106#endif /* CONFIG_PPC_STD_MMU_64 */
107 107
108#ifdef CONFIG_PPC_BOOK3E 108#ifdef CONFIG_PPC_BOOK3E
109 u64 exgen[8] __attribute__((aligned(0x80))); 109 u64 exgen[8] __aligned(0x40);
110 /* Keep pgd in the same cacheline as the start of extlb */ 110 /* Keep pgd in the same cacheline as the start of extlb */
111 pgd_t *pgd __attribute__((aligned(0x80))); /* Current PGD */ 111 pgd_t *pgd __aligned(0x40); /* Current PGD */
112 pgd_t *kernel_pgd; /* Kernel PGD */ 112 pgd_t *kernel_pgd; /* Kernel PGD */
113 113
114 /* Shared by all threads of a core -- points to tcd of first thread */ 114 /* Shared by all threads of a core -- points to tcd of first thread */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index a39270e85beb..1811c44bf34b 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -15,6 +15,24 @@
15struct device_node; 15struct device_node;
16 16
17/* 17/*
18 * PCI controller operations
19 */
20struct pci_controller_ops {
21 void (*dma_dev_setup)(struct pci_dev *dev);
22 void (*dma_bus_setup)(struct pci_bus *bus);
23
24 int (*probe_mode)(struct pci_bus *);
25
26 /* Called when pci_enable_device() is called. Returns true to
27 * allow assignment/enabling of the device. */
28 bool (*enable_device_hook)(struct pci_dev *);
29
30 /* Called during PCI resource reassignment */
31 resource_size_t (*window_alignment)(struct pci_bus *, unsigned long type);
32 void (*reset_secondary_bus)(struct pci_dev *dev);
33};
34
35/*
18 * Structure of a PCI controller (host bridge) 36 * Structure of a PCI controller (host bridge)
19 */ 37 */
20struct pci_controller { 38struct pci_controller {
@@ -46,6 +64,7 @@ struct pci_controller {
46 resource_size_t isa_mem_phys; 64 resource_size_t isa_mem_phys;
47 resource_size_t isa_mem_size; 65 resource_size_t isa_mem_size;
48 66
67 struct pci_controller_ops controller_ops;
49 struct pci_ops *ops; 68 struct pci_ops *ops;
50 unsigned int __iomem *cfg_addr; 69 unsigned int __iomem *cfg_addr;
51 void __iomem *cfg_data; 70 void __iomem *cfg_data;
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 1b0739bc14b5..4aef8d660999 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -22,7 +22,7 @@
22 22
23#include <asm-generic/pci-dma-compat.h> 23#include <asm-generic/pci-dma-compat.h>
24 24
25/* Return values for ppc_md.pci_probe_mode function */ 25/* Return values for pci_controller_ops.probe_mode function */
26#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ 26#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
27#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ 27#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
28#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ 28#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index ade75238ceb5..4122a86d6858 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -23,8 +23,6 @@ extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
23 23
24extern struct list_head hose_list; 24extern struct list_head hose_list;
25 25
26extern void find_and_init_phbs(void);
27
28extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */ 26extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */
29 27
30/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ 28/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
@@ -81,7 +79,6 @@ static inline const char *eeh_driver_name(struct pci_dev *pdev)
81#endif /* CONFIG_EEH */ 79#endif /* CONFIG_EEH */
82 80
83#else /* CONFIG_PCI */ 81#else /* CONFIG_PCI */
84static inline void find_and_init_phbs(void) { }
85static inline void init_pci_config_tokens(void) { } 82static inline void init_pci_config_tokens(void) { }
86#endif /* !CONFIG_PCI */ 83#endif /* !CONFIG_PCI */
87 84
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 7e4612528546..dd0fc18d8103 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -637,105 +637,105 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945)
637 637
638/* AltiVec Registers (VPRs) */ 638/* AltiVec Registers (VPRs) */
639 639
640#define vr0 0 640#define v0 0
641#define vr1 1 641#define v1 1
642#define vr2 2 642#define v2 2
643#define vr3 3 643#define v3 3
644#define vr4 4 644#define v4 4
645#define vr5 5 645#define v5 5
646#define vr6 6 646#define v6 6
647#define vr7 7 647#define v7 7
648#define vr8 8 648#define v8 8
649#define vr9 9 649#define v9 9
650#define vr10 10 650#define v10 10
651#define vr11 11 651#define v11 11
652#define vr12 12 652#define v12 12
653#define vr13 13 653#define v13 13
654#define vr14 14 654#define v14 14
655#define vr15 15 655#define v15 15
656#define vr16 16 656#define v16 16
657#define vr17 17 657#define v17 17
658#define vr18 18 658#define v18 18
659#define vr19 19 659#define v19 19
660#define vr20 20 660#define v20 20
661#define vr21 21 661#define v21 21
662#define vr22 22 662#define v22 22
663#define vr23 23 663#define v23 23
664#define vr24 24 664#define v24 24
665#define vr25 25 665#define v25 25
666#define vr26 26 666#define v26 26
667#define vr27 27 667#define v27 27
668#define vr28 28 668#define v28 28
669#define vr29 29 669#define v29 29
670#define vr30 30 670#define v30 30
671#define vr31 31 671#define v31 31
672 672
673/* VSX Registers (VSRs) */ 673/* VSX Registers (VSRs) */
674 674
675#define vsr0 0 675#define vs0 0
676#define vsr1 1 676#define vs1 1
677#define vsr2 2 677#define vs2 2
678#define vsr3 3 678#define vs3 3
679#define vsr4 4 679#define vs4 4
680#define vsr5 5 680#define vs5 5
681#define vsr6 6 681#define vs6 6
682#define vsr7 7 682#define vs7 7
683#define vsr8 8 683#define vs8 8
684#define vsr9 9 684#define vs9 9
685#define vsr10 10 685#define vs10 10
686#define vsr11 11 686#define vs11 11
687#define vsr12 12 687#define vs12 12
688#define vsr13 13 688#define vs13 13
689#define vsr14 14 689#define vs14 14
690#define vsr15 15 690#define vs15 15
691#define vsr16 16 691#define vs16 16
692#define vsr17 17 692#define vs17 17
693#define vsr18 18 693#define vs18 18
694#define vsr19 19 694#define vs19 19
695#define vsr20 20 695#define vs20 20
696#define vsr21 21 696#define vs21 21
697#define vsr22 22 697#define vs22 22
698#define vsr23 23 698#define vs23 23
699#define vsr24 24 699#define vs24 24
700#define vsr25 25 700#define vs25 25
701#define vsr26 26 701#define vs26 26
702#define vsr27 27 702#define vs27 27
703#define vsr28 28 703#define vs28 28
704#define vsr29 29 704#define vs29 29
705#define vsr30 30 705#define vs30 30
706#define vsr31 31 706#define vs31 31
707#define vsr32 32 707#define vs32 32
708#define vsr33 33 708#define vs33 33
709#define vsr34 34 709#define vs34 34
710#define vsr35 35 710#define vs35 35
711#define vsr36 36 711#define vs36 36
712#define vsr37 37 712#define vs37 37
713#define vsr38 38 713#define vs38 38
714#define vsr39 39 714#define vs39 39
715#define vsr40 40 715#define vs40 40
716#define vsr41 41 716#define vs41 41
717#define vsr42 42 717#define vs42 42
718#define vsr43 43 718#define vs43 43
719#define vsr44 44 719#define vs44 44
720#define vsr45 45 720#define vs45 45
721#define vsr46 46 721#define vs46 46
722#define vsr47 47 722#define vs47 47
723#define vsr48 48 723#define vs48 48
724#define vsr49 49 724#define vs49 49
725#define vsr50 50 725#define vs50 50
726#define vsr51 51 726#define vs51 51
727#define vsr52 52 727#define vs52 52
728#define vsr53 53 728#define vs53 53
729#define vsr54 54 729#define vs54 54
730#define vsr55 55 730#define vs55 55
731#define vsr56 56 731#define vs56 56
732#define vsr57 57 732#define vs57 57
733#define vsr58 58 733#define vs58 58
734#define vsr59 59 734#define vs59 59
735#define vsr60 60 735#define vs60 60
736#define vsr61 61 736#define vs61 61
737#define vsr62 62 737#define vs62 62
738#define vsr63 63 738#define vs63 63
739 739
740/* SPE Registers (EVPRs) */ 740/* SPE Registers (EVPRs) */
741 741
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 2e23e92a4372..7a4ede16b283 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -4,6 +4,7 @@
4 4
5#include <linux/spinlock.h> 5#include <linux/spinlock.h>
6#include <asm/page.h> 6#include <asm/page.h>
7#include <linux/time.h>
7 8
8/* 9/*
9 * Definitions for talking to the RTAS on CHRP machines. 10 * Definitions for talking to the RTAS on CHRP machines.
@@ -273,6 +274,7 @@ inline uint32_t rtas_ext_event_company_id(struct rtas_ext_event_log_v6 *ext_log)
273#define PSERIES_ELOG_SECT_ID_MANUFACT_INFO (('M' << 8) | 'I') 274#define PSERIES_ELOG_SECT_ID_MANUFACT_INFO (('M' << 8) | 'I')
274#define PSERIES_ELOG_SECT_ID_CALL_HOME (('C' << 8) | 'H') 275#define PSERIES_ELOG_SECT_ID_CALL_HOME (('C' << 8) | 'H')
275#define PSERIES_ELOG_SECT_ID_USER_DEF (('U' << 8) | 'D') 276#define PSERIES_ELOG_SECT_ID_USER_DEF (('U' << 8) | 'D')
277#define PSERIES_ELOG_SECT_ID_HOTPLUG (('H' << 8) | 'P')
276 278
277/* Vendor specific Platform Event Log Format, Version 6, section header */ 279/* Vendor specific Platform Event Log Format, Version 6, section header */
278struct pseries_errorlog { 280struct pseries_errorlog {
@@ -296,6 +298,31 @@ inline uint16_t pseries_errorlog_length(struct pseries_errorlog *sect)
296 return be16_to_cpu(sect->length); 298 return be16_to_cpu(sect->length);
297} 299}
298 300
301/* RTAS pseries hotplug errorlog section */
302struct pseries_hp_errorlog {
303 u8 resource;
304 u8 action;
305 u8 id_type;
306 u8 reserved;
307 union {
308 __be32 drc_index;
309 __be32 drc_count;
310 char drc_name[1];
311 } _drc_u;
312};
313
314#define PSERIES_HP_ELOG_RESOURCE_CPU 1
315#define PSERIES_HP_ELOG_RESOURCE_MEM 2
316#define PSERIES_HP_ELOG_RESOURCE_SLOT 3
317#define PSERIES_HP_ELOG_RESOURCE_PHB 4
318
319#define PSERIES_HP_ELOG_ACTION_ADD 1
320#define PSERIES_HP_ELOG_ACTION_REMOVE 2
321
322#define PSERIES_HP_ELOG_ID_DRC_NAME 1
323#define PSERIES_HP_ELOG_ID_DRC_INDEX 2
324#define PSERIES_HP_ELOG_ID_DRC_COUNT 3
325
299struct pseries_errorlog *get_pseries_errorlog(struct rtas_error_log *log, 326struct pseries_errorlog *get_pseries_errorlog(struct rtas_error_log *log,
300 uint16_t section_id); 327 uint16_t section_id);
301 328
@@ -327,7 +354,7 @@ extern int rtas_suspend_cpu(struct rtas_suspend_me_data *data);
327extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data); 354extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data);
328extern int rtas_online_cpus_mask(cpumask_var_t cpus); 355extern int rtas_online_cpus_mask(cpumask_var_t cpus);
329extern int rtas_offline_cpus_mask(cpumask_var_t cpus); 356extern int rtas_offline_cpus_mask(cpumask_var_t cpus);
330extern int rtas_ibm_suspend_me(u64 handle, int *vasi_return); 357extern int rtas_ibm_suspend_me(u64 handle);
331 358
332struct rtc_time; 359struct rtc_time;
333extern unsigned long rtas_get_boot_time(void); 360extern unsigned long rtas_get_boot_time(void);
@@ -343,8 +370,12 @@ extern int early_init_dt_scan_rtas(unsigned long node,
343extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal); 370extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
344 371
345#ifdef CONFIG_PPC_PSERIES 372#ifdef CONFIG_PPC_PSERIES
373extern time64_t last_rtas_event;
374extern int clobbering_unread_rtas_event(void);
346extern int pseries_devicetree_update(s32 scope); 375extern int pseries_devicetree_update(s32 scope);
347extern void post_mobility_fixup(void); 376extern void post_mobility_fixup(void);
377#else
378static inline int clobbering_unread_rtas_event(void) { return 0; }
348#endif 379#endif
349 380
350#ifdef CONFIG_PPC_RTAS_DAEMON 381#ifdef CONFIG_PPC_RTAS_DAEMON
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index fbdf18cf954c..e9d384cbd021 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -7,7 +7,6 @@
7extern void ppc_printk_progress(char *s, unsigned short hex); 7extern void ppc_printk_progress(char *s, unsigned short hex);
8 8
9extern unsigned int rtas_data; 9extern unsigned int rtas_data;
10extern int mem_init_done; /* set on boot once kmalloc can be called */
11extern unsigned long long memory_limit; 10extern unsigned long long memory_limit;
12extern unsigned long klimit; 11extern unsigned long klimit;
13extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask); 12extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index d607df5081a7..825663c30945 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -42,7 +42,7 @@ struct smp_ops_t {
42#ifdef CONFIG_PPC_SMP_MUXED_IPI 42#ifdef CONFIG_PPC_SMP_MUXED_IPI
43 void (*cause_ipi)(int cpu, unsigned long data); 43 void (*cause_ipi)(int cpu, unsigned long data);
44#endif 44#endif
45 int (*probe)(void); 45 void (*probe)(void);
46 int (*kick_cpu)(int nr); 46 int (*kick_cpu)(int nr);
47 void (*setup_cpu)(int nr); 47 void (*setup_cpu)(int nr);
48 void (*bringup_done)(void); 48 void (*bringup_done)(void);
@@ -125,7 +125,6 @@ extern irqreturn_t smp_ipi_demux(void);
125 125
126void smp_init_pSeries(void); 126void smp_init_pSeries(void);
127void smp_init_cell(void); 127void smp_init_cell(void);
128void smp_init_celleb(void);
129void smp_setup_cpu_maps(void); 128void smp_setup_cpu_maps(void);
130 129
131extern int __cpu_disable(void); 130extern int __cpu_disable(void);
@@ -175,7 +174,7 @@ static inline void set_hard_smp_processor_id(int cpu, int phys)
175 174
176extern int smt_enabled_at_boot; 175extern int smt_enabled_at_boot;
177 176
178extern int smp_mpic_probe(void); 177extern void smp_mpic_probe(void);
179extern void smp_mpic_setup_cpu(int cpu); 178extern void smp_mpic_setup_cpu(int cpu);
180extern int smp_generic_kick_cpu(int nr); 179extern int smp_generic_kick_cpu(int nr);
181extern int smp_generic_cpu_bootable(unsigned int nr); 180extern int smp_generic_cpu_bootable(unsigned int nr);
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
index 96f59de61855..487e09077a3e 100644
--- a/arch/powerpc/include/asm/swab.h
+++ b/arch/powerpc/include/asm/swab.h
@@ -9,30 +9,4 @@
9 9
10#include <uapi/asm/swab.h> 10#include <uapi/asm/swab.h>
11 11
12static __inline__ __u16 ld_le16(const volatile __u16 *addr)
13{
14 __u16 val;
15
16 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
17 return val;
18}
19
20static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
21{
22 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
23}
24
25static __inline__ __u32 ld_le32(const volatile __u32 *addr)
26{
27 __u32 val;
28
29 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
30 return val;
31}
32
33static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
34{
35 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
36}
37
38#endif /* _ASM_POWERPC_SWAB_H */ 12#endif /* _ASM_POWERPC_SWAB_H */
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 91062eef582f..f1863a138b4a 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -367,3 +367,4 @@ SYSCALL_SPU(getrandom)
367SYSCALL_SPU(memfd_create) 367SYSCALL_SPU(memfd_create)
368SYSCALL_SPU(bpf) 368SYSCALL_SPU(bpf)
369COMPAT_SYS(execveat) 369COMPAT_SYS(execveat)
370PPC64ONLY(switch_endian)
diff --git a/arch/powerpc/include/asm/ucc_slow.h b/arch/powerpc/include/asm/ucc_slow.h
index c44131e68e11..233ef5fe5fde 100644
--- a/arch/powerpc/include/asm/ucc_slow.h
+++ b/arch/powerpc/include/asm/ucc_slow.h
@@ -251,19 +251,6 @@ void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode);
251 */ 251 */
252void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode); 252void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode);
253 253
254/* ucc_slow_poll_transmitter_now
255 * Immediately forces a poll of the transmitter for data to be sent.
256 * Typically, the hardware performs a periodic poll for data that the
257 * transmit routine has set up to be transmitted. In cases where
258 * this polling cycle is not soon enough, this optional routine can
259 * be invoked to force a poll right away, instead. Proper use for
260 * each transmission for which this functionality is desired is to
261 * call the transmit routine and then this routine right after.
262 *
263 * uccs - (In) pointer to the slow UCC structure.
264 */
265void ucc_slow_poll_transmitter_now(struct ucc_slow_private * uccs);
266
267/* ucc_slow_graceful_stop_tx 254/* ucc_slow_graceful_stop_tx
268 * Smoothly stops transmission on a specified slow UCC. 255 * Smoothly stops transmission on a specified slow UCC.
269 * 256 *
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 36b79c31eedd..f4f8b667d75b 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -12,7 +12,7 @@
12#include <uapi/asm/unistd.h> 12#include <uapi/asm/unistd.h>
13 13
14 14
15#define __NR_syscalls 363 15#define __NR_syscalls 364
16 16
17#define __NR__exit __NR_exit 17#define __NR__exit __NR_exit
18#define NR_syscalls __NR_syscalls 18#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/include/asm/vga.h b/arch/powerpc/include/asm/vga.h
index e5f8dd366212..ab3acd2f2786 100644
--- a/arch/powerpc/include/asm/vga.h
+++ b/arch/powerpc/include/asm/vga.h
@@ -25,12 +25,12 @@
25 25
26static inline void scr_writew(u16 val, volatile u16 *addr) 26static inline void scr_writew(u16 val, volatile u16 *addr)
27{ 27{
28 st_le16(addr, val); 28 *addr = cpu_to_le16(val);
29} 29}
30 30
31static inline u16 scr_readw(volatile const u16 *addr) 31static inline u16 scr_readw(volatile const u16 *addr)
32{ 32{
33 return ld_le16(addr); 33 return le16_to_cpu(*addr);
34} 34}
35 35
36#define VT_BUF_HAVE_MEMCPYW 36#define VT_BUF_HAVE_MEMCPYW
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 6997f4a271df..0e25bdb190bb 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -146,7 +146,7 @@ extern void xics_update_irq_servers(void);
146extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join); 146extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
147extern void xics_mask_unknown_vec(unsigned int vec); 147extern void xics_mask_unknown_vec(unsigned int vec);
148extern irqreturn_t xics_ipi_dispatch(int cpu); 148extern irqreturn_t xics_ipi_dispatch(int cpu);
149extern int xics_smp_probe(void); 149extern void xics_smp_probe(void);
150extern void xics_register_ics(struct ics *ics); 150extern void xics_register_ics(struct ics *ics);
151extern void xics_teardown_cpu(void); 151extern void xics_teardown_cpu(void);
152extern void xics_kexec_teardown_cpu(int secondary); 152extern void xics_kexec_teardown_cpu(int secondary);
diff --git a/arch/powerpc/include/uapi/asm/ptrace.h b/arch/powerpc/include/uapi/asm/ptrace.h
index 77d2ed35b111..8036b385417d 100644
--- a/arch/powerpc/include/uapi/asm/ptrace.h
+++ b/arch/powerpc/include/uapi/asm/ptrace.h
@@ -136,7 +136,7 @@ struct pt_regs {
136#endif /* __powerpc64__ */ 136#endif /* __powerpc64__ */
137 137
138/* 138/*
139 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 139 * Get/set all the altivec registers v0..v31, vscr, vrsave, in one go.
140 * The transfer totals 34 quadword. Quadwords 0-31 contain the 140 * The transfer totals 34 quadword. Quadwords 0-31 contain the
141 * corresponding vector registers. Quadword 32 contains the vscr as the 141 * corresponding vector registers. Quadword 32 contains the vscr as the
142 * last word (offset 12) within that quadword. Quadword 33 contains the 142 * last word (offset 12) within that quadword. Quadword 33 contains the
diff --git a/arch/powerpc/include/uapi/asm/tm.h b/arch/powerpc/include/uapi/asm/tm.h
index 5d836b7c1176..5047659815a5 100644
--- a/arch/powerpc/include/uapi/asm/tm.h
+++ b/arch/powerpc/include/uapi/asm/tm.h
@@ -11,7 +11,7 @@
11#define TM_CAUSE_RESCHED 0xde 11#define TM_CAUSE_RESCHED 0xde
12#define TM_CAUSE_TLBI 0xdc 12#define TM_CAUSE_TLBI 0xdc
13#define TM_CAUSE_FAC_UNAV 0xda 13#define TM_CAUSE_FAC_UNAV 0xda
14#define TM_CAUSE_SYSCALL 0xd8 /* future use */ 14#define TM_CAUSE_SYSCALL 0xd8
15#define TM_CAUSE_MISC 0xd6 /* future use */ 15#define TM_CAUSE_MISC 0xd6 /* future use */
16#define TM_CAUSE_SIGNAL 0xd4 16#define TM_CAUSE_SIGNAL 0xd4
17#define TM_CAUSE_ALIGNMENT 0xd2 17#define TM_CAUSE_ALIGNMENT 0xd2
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
index ef5b5b1f3123..e4aa173dae62 100644
--- a/arch/powerpc/include/uapi/asm/unistd.h
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -385,5 +385,6 @@
385#define __NR_memfd_create 360 385#define __NR_memfd_create 360
386#define __NR_bpf 361 386#define __NR_bpf 361
387#define __NR_execveat 362 387#define __NR_execveat 362
388#define __NR_switch_endian 363
388 389
389#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */ 390#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 502cf69b6c89..c1ebbdaac28f 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -33,7 +33,8 @@ obj-y := cputable.o ptrace.o syscalls.o \
33 signal.o sysfs.o cacheinfo.o time.o \ 33 signal.o sysfs.o cacheinfo.o time.o \
34 prom.o traps.o setup-common.o \ 34 prom.o traps.o setup-common.o \
35 udbg.o misc.o io.o dma.o \ 35 udbg.o misc.o io.o dma.o \
36 misc_$(CONFIG_WORD_SIZE).o vdso32/ 36 misc_$(CONFIG_WORD_SIZE).o vdso32/ \
37 of_platform.o prom_parse.o
37obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \ 38obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
38 signal_64.o ptrace32.o \ 39 signal_64.o ptrace32.o \
39 paca.o nvram_64.o firmware.o 40 paca.o nvram_64.o firmware.o
@@ -47,7 +48,6 @@ obj-$(CONFIG_PPC64) += vdso64/
47obj-$(CONFIG_ALTIVEC) += vecemu.o 48obj-$(CONFIG_ALTIVEC) += vecemu.o
48obj-$(CONFIG_PPC_970_NAP) += idle_power4.o 49obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
49obj-$(CONFIG_PPC_P7_NAP) += idle_power7.o 50obj-$(CONFIG_PPC_P7_NAP) += idle_power7.o
50obj-$(CONFIG_PPC_OF) += of_platform.o prom_parse.o
51procfs-y := proc_powerpc.o 51procfs-y := proc_powerpc.o
52obj-$(CONFIG_PROC_FS) += $(procfs-y) 52obj-$(CONFIG_PROC_FS) += $(procfs-y)
53rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o 53rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index ae77b7e59889..c641983bbdd6 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -61,12 +61,22 @@ struct cache_type_info {
61}; 61};
62 62
63/* These are used to index the cache_type_info array. */ 63/* These are used to index the cache_type_info array. */
64#define CACHE_TYPE_UNIFIED 0 64#define CACHE_TYPE_UNIFIED 0 /* cache-size, cache-block-size, etc. */
65#define CACHE_TYPE_INSTRUCTION 1 65#define CACHE_TYPE_UNIFIED_D 1 /* d-cache-size, d-cache-block-size, etc */
66#define CACHE_TYPE_DATA 2 66#define CACHE_TYPE_INSTRUCTION 2
67#define CACHE_TYPE_DATA 3
67 68
68static const struct cache_type_info cache_type_info[] = { 69static const struct cache_type_info cache_type_info[] = {
69 { 70 {
71 /* Embedded systems that use cache-size, cache-block-size,
72 * etc. for the Unified (typically L2) cache. */
73 .name = "Unified",
74 .size_prop = "cache-size",
75 .line_size_props = { "cache-line-size",
76 "cache-block-size", },
77 .nr_sets_prop = "cache-sets",
78 },
79 {
70 /* PowerPC Processor binding says the [di]-cache-* 80 /* PowerPC Processor binding says the [di]-cache-*
71 * must be equal on unified caches, so just use 81 * must be equal on unified caches, so just use
72 * d-cache properties. */ 82 * d-cache properties. */
@@ -293,7 +303,8 @@ static struct cache *cache_find_first_sibling(struct cache *cache)
293{ 303{
294 struct cache *iter; 304 struct cache *iter;
295 305
296 if (cache->type == CACHE_TYPE_UNIFIED) 306 if (cache->type == CACHE_TYPE_UNIFIED ||
307 cache->type == CACHE_TYPE_UNIFIED_D)
297 return cache; 308 return cache;
298 309
299 list_for_each_entry(iter, &cache_list, list) 310 list_for_each_entry(iter, &cache_list, list)
@@ -324,16 +335,29 @@ static bool cache_node_is_unified(const struct device_node *np)
324 return of_get_property(np, "cache-unified", NULL); 335 return of_get_property(np, "cache-unified", NULL);
325} 336}
326 337
327static struct cache *cache_do_one_devnode_unified(struct device_node *node, 338/*
328 int level) 339 * Unified caches can have two different sets of tags. Most embedded
340 * use cache-size, etc. for the unified cache size, but open firmware systems
341 * use d-cache-size, etc. Check on initialization for which type we have, and
342 * return the appropriate structure type. Assume it's embedded if it isn't
343 * open firmware. If it's yet a 3rd type, then there will be missing entries
344 * in /sys/devices/system/cpu/cpu0/cache/index2/, and this code will need
345 * to be extended further.
346 */
347static int cache_is_unified_d(const struct device_node *np)
329{ 348{
330 struct cache *cache; 349 return of_get_property(np,
350 cache_type_info[CACHE_TYPE_UNIFIED_D].size_prop, NULL) ?
351 CACHE_TYPE_UNIFIED_D : CACHE_TYPE_UNIFIED;
352}
331 353
354/*
355 */
356static struct cache *cache_do_one_devnode_unified(struct device_node *node, int level)
357{
332 pr_debug("creating L%d ucache for %s\n", level, node->full_name); 358 pr_debug("creating L%d ucache for %s\n", level, node->full_name);
333 359
334 cache = new_cache(CACHE_TYPE_UNIFIED, level, node); 360 return new_cache(cache_is_unified_d(node), level, node);
335
336 return cache;
337} 361}
338 362
339static struct cache *cache_do_one_devnode_split(struct device_node *node, 363static struct cache *cache_do_one_devnode_split(struct device_node *node,
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 46733535cc0b..9c9b7411b28b 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -137,15 +137,11 @@ __init_HFSCR:
137/* 137/*
138 * Clear the TLB using the specified IS form of tlbiel instruction 138 * Clear the TLB using the specified IS form of tlbiel instruction
139 * (invalidate by congruence class). P7 has 128 CCs., P8 has 512. 139 * (invalidate by congruence class). P7 has 128 CCs., P8 has 512.
140 *
141 * r3 = IS field
142 */ 140 */
143__init_tlb_power7: 141__init_tlb_power7:
144 li r3,0xc00 /* IS field = 0b11 */
145_GLOBAL(__flush_tlb_power7)
146 li r6,128 142 li r6,128
147 mtctr r6 143 mtctr r6
148 mr r7,r3 /* IS field */ 144 li r7,0xc00 /* IS field = 0b11 */
149 ptesync 145 ptesync
1502: tlbiel r7 1462: tlbiel r7
151 addi r7,r7,0x1000 147 addi r7,r7,0x1000
@@ -154,11 +150,9 @@ _GLOBAL(__flush_tlb_power7)
1541: blr 1501: blr
155 151
156__init_tlb_power8: 152__init_tlb_power8:
157 li r3,0xc00 /* IS field = 0b11 */
158_GLOBAL(__flush_tlb_power8)
159 li r6,512 153 li r6,512
160 mtctr r6 154 mtctr r6
161 mr r7,r3 /* IS field */ 155 li r7,0xc00 /* IS field = 0b11 */
162 ptesync 156 ptesync
1632: tlbiel r7 1572: tlbiel r7
164 addi r7,r7,0x1000 158 addi r7,r7,0x1000
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index f337666768a7..7ed126bc9b18 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -71,8 +71,8 @@ extern void __restore_cpu_power7(void);
71extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 71extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72extern void __restore_cpu_power8(void); 72extern void __restore_cpu_power8(void);
73extern void __restore_cpu_a2(void); 73extern void __restore_cpu_a2(void);
74extern void __flush_tlb_power7(unsigned long inval_selector); 74extern void __flush_tlb_power7(unsigned int action);
75extern void __flush_tlb_power8(unsigned long inval_selector); 75extern void __flush_tlb_power8(unsigned int action);
76extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 76extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
77extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 77extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
78#endif /* CONFIG_PPC64 */ 78#endif /* CONFIG_PPC64 */
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 735979764cd4..6e8d764ce47b 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -116,16 +116,13 @@ void __init swiotlb_detect_4g(void)
116 } 116 }
117} 117}
118 118
119static int __init swiotlb_late_init(void) 119static int __init check_swiotlb_enabled(void)
120{ 120{
121 if (ppc_swiotlb_enable) { 121 if (ppc_swiotlb_enable)
122 swiotlb_print_info(); 122 swiotlb_print_info();
123 set_pci_dma_ops(&swiotlb_dma_ops); 123 else
124 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
125 } else {
126 swiotlb_free(); 124 swiotlb_free();
127 }
128 125
129 return 0; 126 return 0;
130} 127}
131subsys_initcall(swiotlb_late_init); 128subsys_initcall(check_swiotlb_enabled);
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index d180caf2d6de..8ca9434c40e6 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -34,6 +34,7 @@
34#include <asm/ftrace.h> 34#include <asm/ftrace.h>
35#include <asm/hw_irq.h> 35#include <asm/hw_irq.h>
36#include <asm/context_tracking.h> 36#include <asm/context_tracking.h>
37#include <asm/tm.h>
37 38
38/* 39/*
39 * System calls. 40 * System calls.
@@ -145,6 +146,24 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
145 andi. r11,r10,_TIF_SYSCALL_DOTRACE 146 andi. r11,r10,_TIF_SYSCALL_DOTRACE
146 bne syscall_dotrace 147 bne syscall_dotrace
147.Lsyscall_dotrace_cont: 148.Lsyscall_dotrace_cont:
149#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
150BEGIN_FTR_SECTION
151 b 1f
152END_FTR_SECTION_IFCLR(CPU_FTR_TM)
153 extrdi. r11, r12, 1, (63-MSR_TS_T_LG) /* transaction active? */
154 beq+ 1f
155
156 /* Doom the transaction and don't perform the syscall: */
157 mfmsr r11
158 li r12, 1
159 rldimi r11, r12, MSR_TM_LG, 63-MSR_TM_LG
160 mtmsrd r11, 0
161 li r11, (TM_CAUSE_SYSCALL|TM_CAUSE_PERSISTENT)
162 TABORT(R11)
163
164 b .Lsyscall_exit
1651:
166#endif
148 cmpldi 0,r0,NR_syscalls 167 cmpldi 0,r0,NR_syscalls
149 bge- syscall_enosys 168 bge- syscall_enosys
150 169
@@ -356,6 +375,11 @@ _GLOBAL(ppc64_swapcontext)
356 bl sys_swapcontext 375 bl sys_swapcontext
357 b .Lsyscall_exit 376 b .Lsyscall_exit
358 377
378_GLOBAL(ppc_switch_endian)
379 bl save_nvgprs
380 bl sys_switch_endian
381 b .Lsyscall_exit
382
359_GLOBAL(ret_from_fork) 383_GLOBAL(ret_from_fork)
360 bl schedule_tail 384 bl schedule_tail
361 REST_NVGPRS(r1) 385 REST_NVGPRS(r1)
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index 05adc8bbdef8..eeaa0d5f69d5 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -94,6 +94,7 @@ _GLOBAL(power7_powersave_common)
94 beq 1f 94 beq 1f
95 addi r1,r1,INT_FRAME_SIZE 95 addi r1,r1,INT_FRAME_SIZE
96 ld r0,16(r1) 96 ld r0,16(r1)
97 li r3,0 /* Return 0 (no nap) */
97 mtlr r0 98 mtlr r0
98 blr 99 blr
99 100
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index b6f123ab90ed..2c647b1e62e4 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -28,6 +28,55 @@
28#include <asm/mce.h> 28#include <asm/mce.h>
29#include <asm/machdep.h> 29#include <asm/machdep.h>
30 30
31static void flush_tlb_206(unsigned int num_sets, unsigned int action)
32{
33 unsigned long rb;
34 unsigned int i;
35
36 switch (action) {
37 case TLB_INVAL_SCOPE_GLOBAL:
38 rb = TLBIEL_INVAL_SET;
39 break;
40 case TLB_INVAL_SCOPE_LPID:
41 rb = TLBIEL_INVAL_SET_LPID;
42 break;
43 default:
44 BUG();
45 break;
46 }
47
48 asm volatile("ptesync" : : : "memory");
49 for (i = 0; i < num_sets; i++) {
50 asm volatile("tlbiel %0" : : "r" (rb));
51 rb += 1 << TLBIEL_INVAL_SET_SHIFT;
52 }
53 asm volatile("ptesync" : : : "memory");
54}
55
56/*
57 * Generic routine to flush TLB on power7. This routine is used as
58 * flush_tlb hook in cpu_spec for Power7 processor.
59 *
60 * action => TLB_INVAL_SCOPE_GLOBAL: Invalidate all TLBs.
61 * TLB_INVAL_SCOPE_LPID: Invalidate TLB for current LPID.
62 */
63void __flush_tlb_power7(unsigned int action)
64{
65 flush_tlb_206(POWER7_TLB_SETS, action);
66}
67
68/*
69 * Generic routine to flush TLB on power8. This routine is used as
70 * flush_tlb hook in cpu_spec for power8 processor.
71 *
72 * action => TLB_INVAL_SCOPE_GLOBAL: Invalidate all TLBs.
73 * TLB_INVAL_SCOPE_LPID: Invalidate TLB for current LPID.
74 */
75void __flush_tlb_power8(unsigned int action)
76{
77 flush_tlb_206(POWER8_TLB_SETS, action);
78}
79
31/* flush SLBs and reload */ 80/* flush SLBs and reload */
32static void flush_and_reload_slb(void) 81static void flush_and_reload_slb(void)
33{ 82{
@@ -79,7 +128,7 @@ static long mce_handle_derror(uint64_t dsisr, uint64_t slb_error_bits)
79 } 128 }
80 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) { 129 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) {
81 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) 130 if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
82 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET); 131 cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_GLOBAL);
83 /* reset error bits */ 132 /* reset error bits */
84 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB; 133 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB;
85 } 134 }
@@ -110,7 +159,7 @@ static long mce_handle_common_ierror(uint64_t srr1)
110 break; 159 break;
111 case P7_SRR1_MC_IFETCH_TLB_MULTIHIT: 160 case P7_SRR1_MC_IFETCH_TLB_MULTIHIT:
112 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) { 161 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) {
113 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET); 162 cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_GLOBAL);
114 handled = 1; 163 handled = 1;
115 } 164 }
116 break; 165 break;
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index 34f7c9b7cd96..1e703f8ebad4 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -26,6 +26,9 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29#include <linux/kmsg_dump.h>
30#include <linux/pstore.h>
31#include <linux/zlib.h>
29#include <asm/uaccess.h> 32#include <asm/uaccess.h>
30#include <asm/nvram.h> 33#include <asm/nvram.h>
31#include <asm/rtas.h> 34#include <asm/rtas.h>
@@ -54,6 +57,680 @@ struct nvram_partition {
54 57
55static LIST_HEAD(nvram_partitions); 58static LIST_HEAD(nvram_partitions);
56 59
60#ifdef CONFIG_PPC_PSERIES
61struct nvram_os_partition rtas_log_partition = {
62 .name = "ibm,rtas-log",
63 .req_size = 2079,
64 .min_size = 1055,
65 .index = -1,
66 .os_partition = true
67};
68#endif
69
70struct nvram_os_partition oops_log_partition = {
71 .name = "lnx,oops-log",
72 .req_size = 4000,
73 .min_size = 2000,
74 .index = -1,
75 .os_partition = true
76};
77
78static const char *nvram_os_partitions[] = {
79#ifdef CONFIG_PPC_PSERIES
80 "ibm,rtas-log",
81#endif
82 "lnx,oops-log",
83 NULL
84};
85
86static void oops_to_nvram(struct kmsg_dumper *dumper,
87 enum kmsg_dump_reason reason);
88
89static struct kmsg_dumper nvram_kmsg_dumper = {
90 .dump = oops_to_nvram
91};
92
93/*
94 * For capturing and compressing an oops or panic report...
95
96 * big_oops_buf[] holds the uncompressed text we're capturing.
97 *
98 * oops_buf[] holds the compressed text, preceded by a oops header.
99 * oops header has u16 holding the version of oops header (to differentiate
100 * between old and new format header) followed by u16 holding the length of
101 * the compressed* text (*Or uncompressed, if compression fails.) and u64
102 * holding the timestamp. oops_buf[] gets written to NVRAM.
103 *
104 * oops_log_info points to the header. oops_data points to the compressed text.
105 *
106 * +- oops_buf
107 * | +- oops_data
108 * v v
109 * +-----------+-----------+-----------+------------------------+
110 * | version | length | timestamp | text |
111 * | (2 bytes) | (2 bytes) | (8 bytes) | (oops_data_sz bytes) |
112 * +-----------+-----------+-----------+------------------------+
113 * ^
114 * +- oops_log_info
115 *
116 * We preallocate these buffers during init to avoid kmalloc during oops/panic.
117 */
118static size_t big_oops_buf_sz;
119static char *big_oops_buf, *oops_buf;
120static char *oops_data;
121static size_t oops_data_sz;
122
123/* Compression parameters */
124#define COMPR_LEVEL 6
125#define WINDOW_BITS 12
126#define MEM_LEVEL 4
127static struct z_stream_s stream;
128
129#ifdef CONFIG_PSTORE
130#ifdef CONFIG_PPC_POWERNV
131static struct nvram_os_partition skiboot_partition = {
132 .name = "ibm,skiboot",
133 .index = -1,
134 .os_partition = false
135};
136#endif
137
138#ifdef CONFIG_PPC_PSERIES
139static struct nvram_os_partition of_config_partition = {
140 .name = "of-config",
141 .index = -1,
142 .os_partition = false
143};
144#endif
145
146static struct nvram_os_partition common_partition = {
147 .name = "common",
148 .index = -1,
149 .os_partition = false
150};
151
152static enum pstore_type_id nvram_type_ids[] = {
153 PSTORE_TYPE_DMESG,
154 PSTORE_TYPE_PPC_COMMON,
155 -1,
156 -1,
157 -1
158};
159static int read_type;
160#endif
161
162/* nvram_write_os_partition
163 *
164 * We need to buffer the error logs into nvram to ensure that we have
165 * the failure information to decode. If we have a severe error there
166 * is no way to guarantee that the OS or the machine is in a state to
167 * get back to user land and write the error to disk. For example if
168 * the SCSI device driver causes a Machine Check by writing to a bad
169 * IO address, there is no way of guaranteeing that the device driver
170 * is in any state that is would also be able to write the error data
171 * captured to disk, thus we buffer it in NVRAM for analysis on the
172 * next boot.
173 *
174 * In NVRAM the partition containing the error log buffer will looks like:
175 * Header (in bytes):
176 * +-----------+----------+--------+------------+------------------+
177 * | signature | checksum | length | name | data |
178 * |0 |1 |2 3|4 15|16 length-1|
179 * +-----------+----------+--------+------------+------------------+
180 *
181 * The 'data' section would look like (in bytes):
182 * +--------------+------------+-----------------------------------+
183 * | event_logged | sequence # | error log |
184 * |0 3|4 7|8 error_log_size-1|
185 * +--------------+------------+-----------------------------------+
186 *
187 * event_logged: 0 if event has not been logged to syslog, 1 if it has
188 * sequence #: The unique sequence # for each event. (until it wraps)
189 * error log: The error log from event_scan
190 */
191int nvram_write_os_partition(struct nvram_os_partition *part,
192 char *buff, int length,
193 unsigned int err_type,
194 unsigned int error_log_cnt)
195{
196 int rc;
197 loff_t tmp_index;
198 struct err_log_info info;
199
200 if (part->index == -1)
201 return -ESPIPE;
202
203 if (length > part->size)
204 length = part->size;
205
206 info.error_type = cpu_to_be32(err_type);
207 info.seq_num = cpu_to_be32(error_log_cnt);
208
209 tmp_index = part->index;
210
211 rc = ppc_md.nvram_write((char *)&info, sizeof(struct err_log_info),
212 &tmp_index);
213 if (rc <= 0) {
214 pr_err("%s: Failed nvram_write (%d)\n", __func__, rc);
215 return rc;
216 }
217
218 rc = ppc_md.nvram_write(buff, length, &tmp_index);
219 if (rc <= 0) {
220 pr_err("%s: Failed nvram_write (%d)\n", __func__, rc);
221 return rc;
222 }
223
224 return 0;
225}
226
227/* nvram_read_partition
228 *
229 * Reads nvram partition for at most 'length'
230 */
231int nvram_read_partition(struct nvram_os_partition *part, char *buff,
232 int length, unsigned int *err_type,
233 unsigned int *error_log_cnt)
234{
235 int rc;
236 loff_t tmp_index;
237 struct err_log_info info;
238
239 if (part->index == -1)
240 return -1;
241
242 if (length > part->size)
243 length = part->size;
244
245 tmp_index = part->index;
246
247 if (part->os_partition) {
248 rc = ppc_md.nvram_read((char *)&info,
249 sizeof(struct err_log_info),
250 &tmp_index);
251 if (rc <= 0) {
252 pr_err("%s: Failed nvram_read (%d)\n", __func__, rc);
253 return rc;
254 }
255 }
256
257 rc = ppc_md.nvram_read(buff, length, &tmp_index);
258 if (rc <= 0) {
259 pr_err("%s: Failed nvram_read (%d)\n", __func__, rc);
260 return rc;
261 }
262
263 if (part->os_partition) {
264 *error_log_cnt = be32_to_cpu(info.seq_num);
265 *err_type = be32_to_cpu(info.error_type);
266 }
267
268 return 0;
269}
270
271/* nvram_init_os_partition
272 *
273 * This sets up a partition with an "OS" signature.
274 *
275 * The general strategy is the following:
276 * 1.) If a partition with the indicated name already exists...
277 * - If it's large enough, use it.
278 * - Otherwise, recycle it and keep going.
279 * 2.) Search for a free partition that is large enough.
280 * 3.) If there's not a free partition large enough, recycle any obsolete
281 * OS partitions and try again.
282 * 4.) Will first try getting a chunk that will satisfy the requested size.
283 * 5.) If a chunk of the requested size cannot be allocated, then try finding
284 * a chunk that will satisfy the minum needed.
285 *
286 * Returns 0 on success, else -1.
287 */
288int __init nvram_init_os_partition(struct nvram_os_partition *part)
289{
290 loff_t p;
291 int size;
292
293 /* Look for ours */
294 p = nvram_find_partition(part->name, NVRAM_SIG_OS, &size);
295
296 /* Found one but too small, remove it */
297 if (p && size < part->min_size) {
298 pr_info("nvram: Found too small %s partition,"
299 " removing it...\n", part->name);
300 nvram_remove_partition(part->name, NVRAM_SIG_OS, NULL);
301 p = 0;
302 }
303
304 /* Create one if we didn't find */
305 if (!p) {
306 p = nvram_create_partition(part->name, NVRAM_SIG_OS,
307 part->req_size, part->min_size);
308 if (p == -ENOSPC) {
309 pr_info("nvram: No room to create %s partition, "
310 "deleting any obsolete OS partitions...\n",
311 part->name);
312 nvram_remove_partition(NULL, NVRAM_SIG_OS,
313 nvram_os_partitions);
314 p = nvram_create_partition(part->name, NVRAM_SIG_OS,
315 part->req_size, part->min_size);
316 }
317 }
318
319 if (p <= 0) {
320 pr_err("nvram: Failed to find or create %s"
321 " partition, err %d\n", part->name, (int)p);
322 return -1;
323 }
324
325 part->index = p;
326 part->size = nvram_get_partition_size(p) - sizeof(struct err_log_info);
327
328 return 0;
329}
330
331/* Derived from logfs_compress() */
332static int nvram_compress(const void *in, void *out, size_t inlen,
333 size_t outlen)
334{
335 int err, ret;
336
337 ret = -EIO;
338 err = zlib_deflateInit2(&stream, COMPR_LEVEL, Z_DEFLATED, WINDOW_BITS,
339 MEM_LEVEL, Z_DEFAULT_STRATEGY);
340 if (err != Z_OK)
341 goto error;
342
343 stream.next_in = in;
344 stream.avail_in = inlen;
345 stream.total_in = 0;
346 stream.next_out = out;
347 stream.avail_out = outlen;
348 stream.total_out = 0;
349
350 err = zlib_deflate(&stream, Z_FINISH);
351 if (err != Z_STREAM_END)
352 goto error;
353
354 err = zlib_deflateEnd(&stream);
355 if (err != Z_OK)
356 goto error;
357
358 if (stream.total_out >= stream.total_in)
359 goto error;
360
361 ret = stream.total_out;
362error:
363 return ret;
364}
365
366/* Compress the text from big_oops_buf into oops_buf. */
367static int zip_oops(size_t text_len)
368{
369 struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
370 int zipped_len = nvram_compress(big_oops_buf, oops_data, text_len,
371 oops_data_sz);
372 if (zipped_len < 0) {
373 pr_err("nvram: compression failed; returned %d\n", zipped_len);
374 pr_err("nvram: logging uncompressed oops/panic report\n");
375 return -1;
376 }
377 oops_hdr->version = cpu_to_be16(OOPS_HDR_VERSION);
378 oops_hdr->report_length = cpu_to_be16(zipped_len);
379 oops_hdr->timestamp = cpu_to_be64(ktime_get_real_seconds());
380 return 0;
381}
382
383#ifdef CONFIG_PSTORE
384static int nvram_pstore_open(struct pstore_info *psi)
385{
386 /* Reset the iterator to start reading partitions again */
387 read_type = -1;
388 return 0;
389}
390
391/**
392 * nvram_pstore_write - pstore write callback for nvram
393 * @type: Type of message logged
394 * @reason: reason behind dump (oops/panic)
395 * @id: identifier to indicate the write performed
396 * @part: pstore writes data to registered buffer in parts,
397 * part number will indicate the same.
398 * @count: Indicates oops count
399 * @compressed: Flag to indicate the log is compressed
400 * @size: number of bytes written to the registered buffer
401 * @psi: registered pstore_info structure
402 *
403 * Called by pstore_dump() when an oops or panic report is logged in the
404 * printk buffer.
405 * Returns 0 on successful write.
406 */
407static int nvram_pstore_write(enum pstore_type_id type,
408 enum kmsg_dump_reason reason,
409 u64 *id, unsigned int part, int count,
410 bool compressed, size_t size,
411 struct pstore_info *psi)
412{
413 int rc;
414 unsigned int err_type = ERR_TYPE_KERNEL_PANIC;
415 struct oops_log_info *oops_hdr = (struct oops_log_info *) oops_buf;
416
417 /* part 1 has the recent messages from printk buffer */
418 if (part > 1 || (type != PSTORE_TYPE_DMESG))
419 return -1;
420
421 if (clobbering_unread_rtas_event())
422 return -1;
423
424 oops_hdr->version = cpu_to_be16(OOPS_HDR_VERSION);
425 oops_hdr->report_length = cpu_to_be16(size);
426 oops_hdr->timestamp = cpu_to_be64(ktime_get_real_seconds());
427
428 if (compressed)
429 err_type = ERR_TYPE_KERNEL_PANIC_GZ;
430
431 rc = nvram_write_os_partition(&oops_log_partition, oops_buf,
432 (int) (sizeof(*oops_hdr) + size), err_type, count);
433
434 if (rc != 0)
435 return rc;
436
437 *id = part;
438 return 0;
439}
440
441/*
442 * Reads the oops/panic report, rtas, of-config and common partition.
443 * Returns the length of the data we read from each partition.
444 * Returns 0 if we've been called before.
445 */
446static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
447 int *count, struct timespec *time, char **buf,
448 bool *compressed, struct pstore_info *psi)
449{
450 struct oops_log_info *oops_hdr;
451 unsigned int err_type, id_no, size = 0;
452 struct nvram_os_partition *part = NULL;
453 char *buff = NULL;
454 int sig = 0;
455 loff_t p;
456
457 read_type++;
458
459 switch (nvram_type_ids[read_type]) {
460 case PSTORE_TYPE_DMESG:
461 part = &oops_log_partition;
462 *type = PSTORE_TYPE_DMESG;
463 break;
464 case PSTORE_TYPE_PPC_COMMON:
465 sig = NVRAM_SIG_SYS;
466 part = &common_partition;
467 *type = PSTORE_TYPE_PPC_COMMON;
468 *id = PSTORE_TYPE_PPC_COMMON;
469 time->tv_sec = 0;
470 time->tv_nsec = 0;
471 break;
472#ifdef CONFIG_PPC_PSERIES
473 case PSTORE_TYPE_PPC_RTAS:
474 part = &rtas_log_partition;
475 *type = PSTORE_TYPE_PPC_RTAS;
476 time->tv_sec = last_rtas_event;
477 time->tv_nsec = 0;
478 break;
479 case PSTORE_TYPE_PPC_OF:
480 sig = NVRAM_SIG_OF;
481 part = &of_config_partition;
482 *type = PSTORE_TYPE_PPC_OF;
483 *id = PSTORE_TYPE_PPC_OF;
484 time->tv_sec = 0;
485 time->tv_nsec = 0;
486 break;
487#endif
488#ifdef CONFIG_PPC_POWERNV
489 case PSTORE_TYPE_PPC_OPAL:
490 sig = NVRAM_SIG_FW;
491 part = &skiboot_partition;
492 *type = PSTORE_TYPE_PPC_OPAL;
493 *id = PSTORE_TYPE_PPC_OPAL;
494 time->tv_sec = 0;
495 time->tv_nsec = 0;
496 break;
497#endif
498 default:
499 return 0;
500 }
501
502 if (!part->os_partition) {
503 p = nvram_find_partition(part->name, sig, &size);
504 if (p <= 0) {
505 pr_err("nvram: Failed to find partition %s, "
506 "err %d\n", part->name, (int)p);
507 return 0;
508 }
509 part->index = p;
510 part->size = size;
511 }
512
513 buff = kmalloc(part->size, GFP_KERNEL);
514
515 if (!buff)
516 return -ENOMEM;
517
518 if (nvram_read_partition(part, buff, part->size, &err_type, &id_no)) {
519 kfree(buff);
520 return 0;
521 }
522
523 *count = 0;
524
525 if (part->os_partition)
526 *id = id_no;
527
528 if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
529 size_t length, hdr_size;
530
531 oops_hdr = (struct oops_log_info *)buff;
532 if (be16_to_cpu(oops_hdr->version) < OOPS_HDR_VERSION) {
533 /* Old format oops header had 2-byte record size */
534 hdr_size = sizeof(u16);
535 length = be16_to_cpu(oops_hdr->version);
536 time->tv_sec = 0;
537 time->tv_nsec = 0;
538 } else {
539 hdr_size = sizeof(*oops_hdr);
540 length = be16_to_cpu(oops_hdr->report_length);
541 time->tv_sec = be64_to_cpu(oops_hdr->timestamp);
542 time->tv_nsec = 0;
543 }
544 *buf = kmalloc(length, GFP_KERNEL);
545 if (*buf == NULL)
546 return -ENOMEM;
547 memcpy(*buf, buff + hdr_size, length);
548 kfree(buff);
549
550 if (err_type == ERR_TYPE_KERNEL_PANIC_GZ)
551 *compressed = true;
552 else
553 *compressed = false;
554 return length;
555 }
556
557 *buf = buff;
558 return part->size;
559}
560
561static struct pstore_info nvram_pstore_info = {
562 .owner = THIS_MODULE,
563 .name = "nvram",
564 .open = nvram_pstore_open,
565 .read = nvram_pstore_read,
566 .write = nvram_pstore_write,
567};
568
569static int nvram_pstore_init(void)
570{
571 int rc = 0;
572
573 if (machine_is(pseries)) {
574 nvram_type_ids[2] = PSTORE_TYPE_PPC_RTAS;
575 nvram_type_ids[3] = PSTORE_TYPE_PPC_OF;
576 } else
577 nvram_type_ids[2] = PSTORE_TYPE_PPC_OPAL;
578
579 nvram_pstore_info.buf = oops_data;
580 nvram_pstore_info.bufsize = oops_data_sz;
581
582 spin_lock_init(&nvram_pstore_info.buf_lock);
583
584 rc = pstore_register(&nvram_pstore_info);
585 if (rc != 0)
586 pr_err("nvram: pstore_register() failed, defaults to "
587 "kmsg_dump; returned %d\n", rc);
588
589 return rc;
590}
591#else
592static int nvram_pstore_init(void)
593{
594 return -1;
595}
596#endif
597
598void __init nvram_init_oops_partition(int rtas_partition_exists)
599{
600 int rc;
601
602 rc = nvram_init_os_partition(&oops_log_partition);
603 if (rc != 0) {
604#ifdef CONFIG_PPC_PSERIES
605 if (!rtas_partition_exists) {
606 pr_err("nvram: Failed to initialize oops partition!");
607 return;
608 }
609 pr_notice("nvram: Using %s partition to log both"
610 " RTAS errors and oops/panic reports\n",
611 rtas_log_partition.name);
612 memcpy(&oops_log_partition, &rtas_log_partition,
613 sizeof(rtas_log_partition));
614#else
615 pr_err("nvram: Failed to initialize oops partition!");
616 return;
617#endif
618 }
619 oops_buf = kmalloc(oops_log_partition.size, GFP_KERNEL);
620 if (!oops_buf) {
621 pr_err("nvram: No memory for %s partition\n",
622 oops_log_partition.name);
623 return;
624 }
625 oops_data = oops_buf + sizeof(struct oops_log_info);
626 oops_data_sz = oops_log_partition.size - sizeof(struct oops_log_info);
627
628 rc = nvram_pstore_init();
629
630 if (!rc)
631 return;
632
633 /*
634 * Figure compression (preceded by elimination of each line's <n>
635 * severity prefix) will reduce the oops/panic report to at most
636 * 45% of its original size.
637 */
638 big_oops_buf_sz = (oops_data_sz * 100) / 45;
639 big_oops_buf = kmalloc(big_oops_buf_sz, GFP_KERNEL);
640 if (big_oops_buf) {
641 stream.workspace = kmalloc(zlib_deflate_workspacesize(
642 WINDOW_BITS, MEM_LEVEL), GFP_KERNEL);
643 if (!stream.workspace) {
644 pr_err("nvram: No memory for compression workspace; "
645 "skipping compression of %s partition data\n",
646 oops_log_partition.name);
647 kfree(big_oops_buf);
648 big_oops_buf = NULL;
649 }
650 } else {
651 pr_err("No memory for uncompressed %s data; "
652 "skipping compression\n", oops_log_partition.name);
653 stream.workspace = NULL;
654 }
655
656 rc = kmsg_dump_register(&nvram_kmsg_dumper);
657 if (rc != 0) {
658 pr_err("nvram: kmsg_dump_register() failed; returned %d\n", rc);
659 kfree(oops_buf);
660 kfree(big_oops_buf);
661 kfree(stream.workspace);
662 }
663}
664
665/*
666 * This is our kmsg_dump callback, called after an oops or panic report
667 * has been written to the printk buffer. We want to capture as much
668 * of the printk buffer as possible. First, capture as much as we can
669 * that we think will compress sufficiently to fit in the lnx,oops-log
670 * partition. If that's too much, go back and capture uncompressed text.
671 */
672static void oops_to_nvram(struct kmsg_dumper *dumper,
673 enum kmsg_dump_reason reason)
674{
675 struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
676 static unsigned int oops_count = 0;
677 static bool panicking = false;
678 static DEFINE_SPINLOCK(lock);
679 unsigned long flags;
680 size_t text_len;
681 unsigned int err_type = ERR_TYPE_KERNEL_PANIC_GZ;
682 int rc = -1;
683
684 switch (reason) {
685 case KMSG_DUMP_RESTART:
686 case KMSG_DUMP_HALT:
687 case KMSG_DUMP_POWEROFF:
688 /* These are almost always orderly shutdowns. */
689 return;
690 case KMSG_DUMP_OOPS:
691 break;
692 case KMSG_DUMP_PANIC:
693 panicking = true;
694 break;
695 case KMSG_DUMP_EMERG:
696 if (panicking)
697 /* Panic report already captured. */
698 return;
699 break;
700 default:
701 pr_err("%s: ignoring unrecognized KMSG_DUMP_* reason %d\n",
702 __func__, (int) reason);
703 return;
704 }
705
706 if (clobbering_unread_rtas_event())
707 return;
708
709 if (!spin_trylock_irqsave(&lock, flags))
710 return;
711
712 if (big_oops_buf) {
713 kmsg_dump_get_buffer(dumper, false,
714 big_oops_buf, big_oops_buf_sz, &text_len);
715 rc = zip_oops(text_len);
716 }
717 if (rc != 0) {
718 kmsg_dump_rewind(dumper);
719 kmsg_dump_get_buffer(dumper, false,
720 oops_data, oops_data_sz, &text_len);
721 err_type = ERR_TYPE_KERNEL_PANIC;
722 oops_hdr->version = cpu_to_be16(OOPS_HDR_VERSION);
723 oops_hdr->report_length = cpu_to_be16(text_len);
724 oops_hdr->timestamp = cpu_to_be64(ktime_get_real_seconds());
725 }
726
727 (void) nvram_write_os_partition(&oops_log_partition, oops_buf,
728 (int) (sizeof(*oops_hdr) + text_len), err_type,
729 ++oops_count);
730
731 spin_unlock_irqrestore(&lock, flags);
732}
733
57static loff_t dev_nvram_llseek(struct file *file, loff_t offset, int origin) 734static loff_t dev_nvram_llseek(struct file *file, loff_t offset, int origin)
58{ 735{
59 int size; 736 int size;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 9a306ff304ae..0d054068a21d 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -76,7 +76,7 @@ struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
76 list_add_tail(&phb->list_node, &hose_list); 76 list_add_tail(&phb->list_node, &hose_list);
77 spin_unlock(&hose_spinlock); 77 spin_unlock(&hose_spinlock);
78 phb->dn = dev; 78 phb->dn = dev;
79 phb->is_dynamic = mem_init_done; 79 phb->is_dynamic = slab_is_available();
80#ifdef CONFIG_PPC64 80#ifdef CONFIG_PPC64
81 if (dev) { 81 if (dev) {
82 int nid = of_node_to_nid(dev); 82 int nid = of_node_to_nid(dev);
@@ -109,8 +109,10 @@ void pcibios_free_controller(struct pci_controller *phb)
109resource_size_t pcibios_window_alignment(struct pci_bus *bus, 109resource_size_t pcibios_window_alignment(struct pci_bus *bus,
110 unsigned long type) 110 unsigned long type)
111{ 111{
112 if (ppc_md.pcibios_window_alignment) 112 struct pci_controller *phb = pci_bus_to_host(bus);
113 return ppc_md.pcibios_window_alignment(bus, type); 113
114 if (phb->controller_ops.window_alignment)
115 return phb->controller_ops.window_alignment(bus, type);
114 116
115 /* 117 /*
116 * PCI core will figure out the default 118 * PCI core will figure out the default
@@ -122,8 +124,10 @@ resource_size_t pcibios_window_alignment(struct pci_bus *bus,
122 124
123void pcibios_reset_secondary_bus(struct pci_dev *dev) 125void pcibios_reset_secondary_bus(struct pci_dev *dev)
124{ 126{
125 if (ppc_md.pcibios_reset_secondary_bus) { 127 struct pci_controller *phb = pci_bus_to_host(dev->bus);
126 ppc_md.pcibios_reset_secondary_bus(dev); 128
129 if (phb->controller_ops.reset_secondary_bus) {
130 phb->controller_ops.reset_secondary_bus(dev);
127 return; 131 return;
128 } 132 }
129 133
@@ -956,6 +960,8 @@ static void pcibios_fixup_bridge(struct pci_bus *bus)
956 960
957void pcibios_setup_bus_self(struct pci_bus *bus) 961void pcibios_setup_bus_self(struct pci_bus *bus)
958{ 962{
963 struct pci_controller *phb;
964
959 /* Fix up the bus resources for P2P bridges */ 965 /* Fix up the bus resources for P2P bridges */
960 if (bus->self != NULL) 966 if (bus->self != NULL)
961 pcibios_fixup_bridge(bus); 967 pcibios_fixup_bridge(bus);
@@ -967,12 +973,14 @@ void pcibios_setup_bus_self(struct pci_bus *bus)
967 ppc_md.pcibios_fixup_bus(bus); 973 ppc_md.pcibios_fixup_bus(bus);
968 974
969 /* Setup bus DMA mappings */ 975 /* Setup bus DMA mappings */
970 if (ppc_md.pci_dma_bus_setup) 976 phb = pci_bus_to_host(bus);
971 ppc_md.pci_dma_bus_setup(bus); 977 if (phb->controller_ops.dma_bus_setup)
978 phb->controller_ops.dma_bus_setup(bus);
972} 979}
973 980
974static void pcibios_setup_device(struct pci_dev *dev) 981static void pcibios_setup_device(struct pci_dev *dev)
975{ 982{
983 struct pci_controller *phb;
976 /* Fixup NUMA node as it may not be setup yet by the generic 984 /* Fixup NUMA node as it may not be setup yet by the generic
977 * code and is needed by the DMA init 985 * code and is needed by the DMA init
978 */ 986 */
@@ -983,8 +991,9 @@ static void pcibios_setup_device(struct pci_dev *dev)
983 set_dma_offset(&dev->dev, PCI_DRAM_OFFSET); 991 set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
984 992
985 /* Additional platform DMA/iommu setup */ 993 /* Additional platform DMA/iommu setup */
986 if (ppc_md.pci_dma_dev_setup) 994 phb = pci_bus_to_host(dev->bus);
987 ppc_md.pci_dma_dev_setup(dev); 995 if (phb->controller_ops.dma_dev_setup)
996 phb->controller_ops.dma_dev_setup(dev);
988 997
989 /* Read default IRQs and fixup if necessary */ 998 /* Read default IRQs and fixup if necessary */
990 pci_read_irq_line(dev); 999 pci_read_irq_line(dev);
@@ -1470,8 +1479,10 @@ EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus);
1470 1479
1471int pcibios_enable_device(struct pci_dev *dev, int mask) 1480int pcibios_enable_device(struct pci_dev *dev, int mask)
1472{ 1481{
1473 if (ppc_md.pcibios_enable_device_hook) 1482 struct pci_controller *phb = pci_bus_to_host(dev->bus);
1474 if (ppc_md.pcibios_enable_device_hook(dev)) 1483
1484 if (phb->controller_ops.enable_device_hook)
1485 if (!phb->controller_ops.enable_device_hook(dev))
1475 return -EINVAL; 1486 return -EINVAL;
1476 1487
1477 return pci_enable_resources(dev, mask); 1488 return pci_enable_resources(dev, mask);
@@ -1644,8 +1655,8 @@ void pcibios_scan_phb(struct pci_controller *hose)
1644 1655
1645 /* Get probe mode and perform scan */ 1656 /* Get probe mode and perform scan */
1646 mode = PCI_PROBE_NORMAL; 1657 mode = PCI_PROBE_NORMAL;
1647 if (node && ppc_md.pci_probe_mode) 1658 if (node && hose->controller_ops.probe_mode)
1648 mode = ppc_md.pci_probe_mode(bus); 1659 mode = hose->controller_ops.probe_mode(bus);
1649 pr_debug(" probe mode: %d\n", mode); 1660 pr_debug(" probe mode: %d\n", mode);
1650 if (mode == PCI_PROBE_DEVTREE) 1661 if (mode == PCI_PROBE_DEVTREE)
1651 of_scan_bus(node, bus); 1662 of_scan_bus(node, bus);
diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c
index 18d9575729a3..7ed85a69a9c2 100644
--- a/arch/powerpc/kernel/pci-hotplug.c
+++ b/arch/powerpc/kernel/pci-hotplug.c
@@ -73,13 +73,16 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
73{ 73{
74 int slotno, mode, pass, max; 74 int slotno, mode, pass, max;
75 struct pci_dev *dev; 75 struct pci_dev *dev;
76 struct pci_controller *phb;
76 struct device_node *dn = pci_bus_to_OF_node(bus); 77 struct device_node *dn = pci_bus_to_OF_node(bus);
77 78
78 eeh_add_device_tree_early(PCI_DN(dn)); 79 eeh_add_device_tree_early(PCI_DN(dn));
79 80
81 phb = pci_bus_to_host(bus);
82
80 mode = PCI_PROBE_NORMAL; 83 mode = PCI_PROBE_NORMAL;
81 if (ppc_md.pci_probe_mode) 84 if (phb->controller_ops.probe_mode)
82 mode = ppc_md.pci_probe_mode(bus); 85 mode = phb->controller_ops.probe_mode(bus);
83 86
84 if (mode == PCI_PROBE_DEVTREE) { 87 if (mode == PCI_PROBE_DEVTREE) {
85 /* use ofdt-based probe */ 88 /* use ofdt-based probe */
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 7122dfece393..42e02a2d570b 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -207,6 +207,7 @@ void of_scan_pci_bridge(struct pci_dev *dev)
207{ 207{
208 struct device_node *node = dev->dev.of_node; 208 struct device_node *node = dev->dev.of_node;
209 struct pci_bus *bus; 209 struct pci_bus *bus;
210 struct pci_controller *phb;
210 const __be32 *busrange, *ranges; 211 const __be32 *busrange, *ranges;
211 int len, i, mode; 212 int len, i, mode;
212 struct pci_bus_region region; 213 struct pci_bus_region region;
@@ -286,9 +287,11 @@ void of_scan_pci_bridge(struct pci_dev *dev)
286 bus->number); 287 bus->number);
287 pr_debug(" bus name: %s\n", bus->name); 288 pr_debug(" bus name: %s\n", bus->name);
288 289
290 phb = pci_bus_to_host(bus);
291
289 mode = PCI_PROBE_NORMAL; 292 mode = PCI_PROBE_NORMAL;
290 if (ppc_md.pci_probe_mode) 293 if (phb->controller_ops.probe_mode)
291 mode = ppc_md.pci_probe_mode(bus); 294 mode = phb->controller_ops.probe_mode(bus);
292 pr_debug(" probe mode: %d\n", mode); 295 pr_debug(" probe mode: %d\n", mode);
293 296
294 if (mode == PCI_PROBE_DEVTREE) 297 if (mode == PCI_PROBE_DEVTREE)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index b4cc7bef6b16..febb50dd5328 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1114,8 +1114,11 @@ static void setup_ksp_vsid(struct task_struct *p, unsigned long sp)
1114 */ 1114 */
1115extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */ 1115extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
1116 1116
1117/*
1118 * Copy architecture-specific thread state
1119 */
1117int copy_thread(unsigned long clone_flags, unsigned long usp, 1120int copy_thread(unsigned long clone_flags, unsigned long usp,
1118 unsigned long arg, struct task_struct *p) 1121 unsigned long kthread_arg, struct task_struct *p)
1119{ 1122{
1120 struct pt_regs *childregs, *kregs; 1123 struct pt_regs *childregs, *kregs;
1121 extern void ret_from_fork(void); 1124 extern void ret_from_fork(void);
@@ -1127,6 +1130,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
1127 sp -= sizeof(struct pt_regs); 1130 sp -= sizeof(struct pt_regs);
1128 childregs = (struct pt_regs *) sp; 1131 childregs = (struct pt_regs *) sp;
1129 if (unlikely(p->flags & PF_KTHREAD)) { 1132 if (unlikely(p->flags & PF_KTHREAD)) {
1133 /* kernel thread */
1130 struct thread_info *ti = (void *)task_stack_page(p); 1134 struct thread_info *ti = (void *)task_stack_page(p);
1131 memset(childregs, 0, sizeof(struct pt_regs)); 1135 memset(childregs, 0, sizeof(struct pt_regs));
1132 childregs->gpr[1] = sp + sizeof(struct pt_regs); 1136 childregs->gpr[1] = sp + sizeof(struct pt_regs);
@@ -1137,11 +1141,12 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
1137 clear_tsk_thread_flag(p, TIF_32BIT); 1141 clear_tsk_thread_flag(p, TIF_32BIT);
1138 childregs->softe = 1; 1142 childregs->softe = 1;
1139#endif 1143#endif
1140 childregs->gpr[15] = arg; 1144 childregs->gpr[15] = kthread_arg;
1141 p->thread.regs = NULL; /* no user register state */ 1145 p->thread.regs = NULL; /* no user register state */
1142 ti->flags |= _TIF_RESTOREALL; 1146 ti->flags |= _TIF_RESTOREALL;
1143 f = ret_from_kernel_thread; 1147 f = ret_from_kernel_thread;
1144 } else { 1148 } else {
1149 /* user thread */
1145 struct pt_regs *regs = current_pt_regs(); 1150 struct pt_regs *regs = current_pt_regs();
1146 CHECK_FULL_REGS(regs); 1151 CHECK_FULL_REGS(regs);
1147 *childregs = *regs; 1152 *childregs = *regs;
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 1a85d8f96739..fd1fe4c37599 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2898,7 +2898,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2898 * Call OF "quiesce" method to shut down pending DMA's from 2898 * Call OF "quiesce" method to shut down pending DMA's from
2899 * devices etc... 2899 * devices etc...
2900 */ 2900 */
2901 prom_printf("Calling quiesce...\n"); 2901 prom_printf("Quiescing Open Firmware ...\n");
2902 call_prom("quiesce", 0, 0); 2902 call_prom("quiesce", 0, 0);
2903 2903
2904 /* 2904 /*
@@ -2910,7 +2910,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2910 2910
2911 /* Don't print anything after quiesce under OPAL, it crashes OFW */ 2911 /* Don't print anything after quiesce under OPAL, it crashes OFW */
2912 if (of_platform != PLATFORM_OPAL) { 2912 if (of_platform != PLATFORM_OPAL) {
2913 prom_printf("returning from prom_init\n"); 2913 prom_printf("Booting Linux via __start() ...\n");
2914 prom_debug("->dt_header_start=0x%x\n", hdr); 2914 prom_debug("->dt_header_start=0x%x\n", hdr);
2915 } 2915 }
2916 2916
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 21c45a2d0706..7a488c108410 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -401,7 +401,7 @@ static char *__fetch_rtas_last_error(char *altbuf)
401 buf = altbuf; 401 buf = altbuf;
402 } else { 402 } else {
403 buf = rtas_err_buf; 403 buf = rtas_err_buf;
404 if (mem_init_done) 404 if (slab_is_available())
405 buf = kmalloc(RTAS_ERROR_LOG_MAX, GFP_ATOMIC); 405 buf = kmalloc(RTAS_ERROR_LOG_MAX, GFP_ATOMIC);
406 } 406 }
407 if (buf) 407 if (buf)
@@ -461,7 +461,7 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...)
461 461
462 if (buff_copy) { 462 if (buff_copy) {
463 log_error(buff_copy, ERR_TYPE_RTAS_LOG, 0); 463 log_error(buff_copy, ERR_TYPE_RTAS_LOG, 0);
464 if (mem_init_done) 464 if (slab_is_available())
465 kfree(buff_copy); 465 kfree(buff_copy);
466 } 466 }
467 return ret; 467 return ret;
@@ -897,7 +897,7 @@ int rtas_offline_cpus_mask(cpumask_var_t cpus)
897} 897}
898EXPORT_SYMBOL(rtas_offline_cpus_mask); 898EXPORT_SYMBOL(rtas_offline_cpus_mask);
899 899
900int rtas_ibm_suspend_me(u64 handle, int *vasi_return) 900int rtas_ibm_suspend_me(u64 handle)
901{ 901{
902 long state; 902 long state;
903 long rc; 903 long rc;
@@ -919,13 +919,11 @@ int rtas_ibm_suspend_me(u64 handle, int *vasi_return)
919 printk(KERN_ERR "rtas_ibm_suspend_me: vasi_state returned %ld\n",rc); 919 printk(KERN_ERR "rtas_ibm_suspend_me: vasi_state returned %ld\n",rc);
920 return rc; 920 return rc;
921 } else if (state == H_VASI_ENABLED) { 921 } else if (state == H_VASI_ENABLED) {
922 *vasi_return = RTAS_NOT_SUSPENDABLE; 922 return -EAGAIN;
923 return 0;
924 } else if (state != H_VASI_SUSPENDING) { 923 } else if (state != H_VASI_SUSPENDING) {
925 printk(KERN_ERR "rtas_ibm_suspend_me: vasi_state returned state %ld\n", 924 printk(KERN_ERR "rtas_ibm_suspend_me: vasi_state returned state %ld\n",
926 state); 925 state);
927 *vasi_return = -1; 926 return -EIO;
928 return 0;
929 } 927 }
930 928
931 if (!alloc_cpumask_var(&offline_mask, GFP_TEMPORARY)) 929 if (!alloc_cpumask_var(&offline_mask, GFP_TEMPORARY))
@@ -972,7 +970,7 @@ out:
972 return atomic_read(&data.error); 970 return atomic_read(&data.error);
973} 971}
974#else /* CONFIG_PPC_PSERIES */ 972#else /* CONFIG_PPC_PSERIES */
975int rtas_ibm_suspend_me(u64 handle, int *vasi_return) 973int rtas_ibm_suspend_me(u64 handle)
976{ 974{
977 return -ENOSYS; 975 return -ENOSYS;
978} 976}
@@ -1022,7 +1020,6 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
1022 unsigned long flags; 1020 unsigned long flags;
1023 char *buff_copy, *errbuf = NULL; 1021 char *buff_copy, *errbuf = NULL;
1024 int nargs, nret, token; 1022 int nargs, nret, token;
1025 int rc;
1026 1023
1027 if (!capable(CAP_SYS_ADMIN)) 1024 if (!capable(CAP_SYS_ADMIN))
1028 return -EPERM; 1025 return -EPERM;
@@ -1054,15 +1051,18 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
1054 if (token == ibm_suspend_me_token) { 1051 if (token == ibm_suspend_me_token) {
1055 1052
1056 /* 1053 /*
1057 * rtas_ibm_suspend_me assumes args are in cpu endian, or at least the 1054 * rtas_ibm_suspend_me assumes the streamid handle is in cpu
1058 * hcall within it requires it. 1055 * endian, or at least the hcall within it requires it.
1059 */ 1056 */
1060 int vasi_rc = 0; 1057 int rc = 0;
1061 u64 handle = ((u64)be32_to_cpu(args.args[0]) << 32) 1058 u64 handle = ((u64)be32_to_cpu(args.args[0]) << 32)
1062 | be32_to_cpu(args.args[1]); 1059 | be32_to_cpu(args.args[1]);
1063 rc = rtas_ibm_suspend_me(handle, &vasi_rc); 1060 rc = rtas_ibm_suspend_me(handle);
1064 args.rets[0] = cpu_to_be32(vasi_rc); 1061 if (rc == -EAGAIN)
1065 if (rc) 1062 args.rets[0] = cpu_to_be32(RTAS_NOT_SUSPENDABLE);
1063 else if (rc == -EIO)
1064 args.rets[0] = cpu_to_be32(-1);
1065 else if (rc)
1066 return rc; 1066 return rc;
1067 goto copy_return; 1067 goto copy_return;
1068 } 1068 }
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index af29df2517f7..73f1934582c2 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -277,50 +277,3 @@ int rtas_setup_phb(struct pci_controller *phb)
277 277
278 return 0; 278 return 0;
279} 279}
280
281void __init find_and_init_phbs(void)
282{
283 struct device_node *node;
284 struct pci_controller *phb;
285 struct device_node *root = of_find_node_by_path("/");
286
287 for_each_child_of_node(root, node) {
288 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
289 strcmp(node->type, "pciex") != 0))
290 continue;
291
292 phb = pcibios_alloc_controller(node);
293 if (!phb)
294 continue;
295 rtas_setup_phb(phb);
296 pci_process_bridge_OF_ranges(phb, node, 0);
297 isa_bridge_find_early(phb);
298 }
299
300 of_node_put(root);
301 pci_devs_phb_init();
302
303 /*
304 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
305 * in chosen.
306 */
307 if (of_chosen) {
308 const int *prop;
309
310 prop = of_get_property(of_chosen,
311 "linux,pci-probe-only", NULL);
312 if (prop) {
313 if (*prop)
314 pci_add_flags(PCI_PROBE_ONLY);
315 else
316 pci_clear_flags(PCI_PROBE_ONLY);
317 }
318
319#ifdef CONFIG_PPC32 /* Will be made generic soon */
320 prop = of_get_property(of_chosen,
321 "linux,pci-assign-all-buses", NULL);
322 if (prop && *prop)
323 pci_add_flags(PCI_REASSIGN_ALL_BUS);
324#endif /* CONFIG_PPC32 */
325 }
326}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 49f553bbb360..7551e5692597 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -37,6 +37,7 @@
37#include <linux/memblock.h> 37#include <linux/memblock.h>
38#include <linux/hugetlb.h> 38#include <linux/hugetlb.h>
39#include <linux/memory.h> 39#include <linux/memory.h>
40#include <linux/nmi.h>
40 41
41#include <asm/io.h> 42#include <asm/io.h>
42#include <asm/kdump.h> 43#include <asm/kdump.h>
@@ -779,3 +780,22 @@ unsigned long memory_block_size_bytes(void)
779struct ppc_pci_io ppc_pci_io; 780struct ppc_pci_io ppc_pci_io;
780EXPORT_SYMBOL(ppc_pci_io); 781EXPORT_SYMBOL(ppc_pci_io);
781#endif 782#endif
783
784#ifdef CONFIG_HARDLOCKUP_DETECTOR
785u64 hw_nmi_get_sample_period(int watchdog_thresh)
786{
787 return ppc_proc_freq * watchdog_thresh;
788}
789
790/*
791 * The hardlockup detector breaks PMU event based branches and is likely
792 * to get false positives in KVM guests, so disable it by default.
793 */
794static int __init disable_hardlockup_detector(void)
795{
796 watchdog_enable_hardlockup_detector(false);
797
798 return 0;
799}
800early_initcall(disable_hardlockup_detector);
801#endif
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index b2702e87db0d..5fa92706444b 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -121,3 +121,20 @@ long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low,
121 return sys_fadvise64(fd, (u64)offset_high << 32 | offset_low, 121 return sys_fadvise64(fd, (u64)offset_high << 32 | offset_low,
122 (u64)len_high << 32 | len_low, advice); 122 (u64)len_high << 32 | len_low, advice);
123} 123}
124
125long sys_switch_endian(void)
126{
127 struct thread_info *ti;
128
129 current->thread.regs->msr ^= MSR_LE;
130
131 /*
132 * Set TIF_RESTOREALL so that r3 isn't clobbered on return to
133 * userspace. That also has the effect of restoring the non-volatile
134 * GPRs, so we saved them on the way in here.
135 */
136 ti = current_thread_info();
137 ti->flags |= _TIF_RESTOREALL;
138
139 return 0;
140}
diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S
index 7ab5d434e2ee..4d6b1d3a747f 100644
--- a/arch/powerpc/kernel/systbl.S
+++ b/arch/powerpc/kernel/systbl.S
@@ -22,6 +22,7 @@
22#define PPC_SYS(func) .llong DOTSYM(ppc_##func),DOTSYM(ppc_##func) 22#define PPC_SYS(func) .llong DOTSYM(ppc_##func),DOTSYM(ppc_##func)
23#define OLDSYS(func) .llong DOTSYM(sys_ni_syscall),DOTSYM(sys_ni_syscall) 23#define OLDSYS(func) .llong DOTSYM(sys_ni_syscall),DOTSYM(sys_ni_syscall)
24#define SYS32ONLY(func) .llong DOTSYM(sys_ni_syscall),DOTSYM(compat_sys_##func) 24#define SYS32ONLY(func) .llong DOTSYM(sys_ni_syscall),DOTSYM(compat_sys_##func)
25#define PPC64ONLY(func) .llong DOTSYM(ppc_##func),DOTSYM(sys_ni_syscall)
25#define SYSX(f, f3264, f32) .llong DOTSYM(f),DOTSYM(f3264) 26#define SYSX(f, f3264, f32) .llong DOTSYM(f),DOTSYM(f3264)
26#else 27#else
27#define SYSCALL(func) .long sys_##func 28#define SYSCALL(func) .long sys_##func
@@ -29,6 +30,7 @@
29#define PPC_SYS(func) .long ppc_##func 30#define PPC_SYS(func) .long ppc_##func
30#define OLDSYS(func) .long sys_##func 31#define OLDSYS(func) .long sys_##func
31#define SYS32ONLY(func) .long sys_##func 32#define SYS32ONLY(func) .long sys_##func
33#define PPC64ONLY(func) .long sys_ni_syscall
32#define SYSX(f, f3264, f32) .long f32 34#define SYSX(f, f3264, f32) .long f32
33#endif 35#endif
34#define SYSCALL_SPU(func) SYSCALL(func) 36#define SYSCALL_SPU(func) SYSCALL(func)
diff --git a/arch/powerpc/kernel/systbl_chk.c b/arch/powerpc/kernel/systbl_chk.c
index 238aa63ced8f..2384129f5893 100644
--- a/arch/powerpc/kernel/systbl_chk.c
+++ b/arch/powerpc/kernel/systbl_chk.c
@@ -21,9 +21,11 @@
21#ifdef CONFIG_PPC64 21#ifdef CONFIG_PPC64
22#define OLDSYS(func) -1 22#define OLDSYS(func) -1
23#define SYS32ONLY(func) -1 23#define SYS32ONLY(func) -1
24#define PPC64ONLY(func) __NR_##func
24#else 25#else
25#define OLDSYS(func) __NR_old##func 26#define OLDSYS(func) __NR_old##func
26#define SYS32ONLY(func) __NR_##func 27#define SYS32ONLY(func) __NR_##func
28#define PPC64ONLY(func) -1
27#endif 29#endif
28#define SYSX(f, f3264, f32) -1 30#define SYSX(f, f3264, f32) -1
29 31
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 2a324f4cb1b9..5754b226da7e 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -152,9 +152,9 @@ _GLOBAL(tm_reclaim)
152 152
153 addi r7, r3, THREAD_TRANSACT_VRSTATE 153 addi r7, r3, THREAD_TRANSACT_VRSTATE
154 SAVE_32VRS(0, r6, r7) /* r6 scratch, r7 transact vr state */ 154 SAVE_32VRS(0, r6, r7) /* r6 scratch, r7 transact vr state */
155 mfvscr vr0 155 mfvscr v0
156 li r6, VRSTATE_VSCR 156 li r6, VRSTATE_VSCR
157 stvx vr0, r7, r6 157 stvx v0, r7, r6
158dont_backup_vec: 158dont_backup_vec:
159 mfspr r0, SPRN_VRSAVE 159 mfspr r0, SPRN_VRSAVE
160 std r0, THREAD_TRANSACT_VRSAVE(r3) 160 std r0, THREAD_TRANSACT_VRSAVE(r3)
@@ -359,8 +359,8 @@ _GLOBAL(__tm_recheckpoint)
359 359
360 addi r8, r3, THREAD_VRSTATE 360 addi r8, r3, THREAD_VRSTATE
361 li r5, VRSTATE_VSCR 361 li r5, VRSTATE_VSCR
362 lvx vr0, r8, r5 362 lvx v0, r8, r5
363 mtvscr vr0 363 mtvscr v0
364 REST_32VRS(0, r5, r8) /* r5 scratch, r8 ptr */ 364 REST_32VRS(0, r5, r8) /* r5 scratch, r8 ptr */
365dont_restore_vec: 365dont_restore_vec:
366 ld r5, THREAD_VRSAVE(r3) 366 ld r5, THREAD_VRSAVE(r3)
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b7aa07279a63..7cc38b5b58bc 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -46,8 +46,6 @@ void __init udbg_early_init(void)
46#elif defined(CONFIG_PPC_EARLY_DEBUG_MAPLE) 46#elif defined(CONFIG_PPC_EARLY_DEBUG_MAPLE)
47 /* Maple real mode debug */ 47 /* Maple real mode debug */
48 udbg_init_maple_realmode(); 48 udbg_init_maple_realmode();
49#elif defined(CONFIG_PPC_EARLY_DEBUG_BEAT)
50 udbg_init_debug_beat();
51#elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE) 49#elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE)
52 udbg_init_pas_realmode(); 50 udbg_init_pas_realmode();
53#elif defined(CONFIG_PPC_EARLY_DEBUG_BOOTX) 51#elif defined(CONFIG_PPC_EARLY_DEBUG_BOOTX)
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 74f8050518d6..f5c80d567d8d 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -24,8 +24,8 @@ _GLOBAL(do_load_up_transact_altivec)
24 stw r4,THREAD_USED_VR(r3) 24 stw r4,THREAD_USED_VR(r3)
25 25
26 li r10,THREAD_TRANSACT_VRSTATE+VRSTATE_VSCR 26 li r10,THREAD_TRANSACT_VRSTATE+VRSTATE_VSCR
27 lvx vr0,r10,r3 27 lvx v0,r10,r3
28 mtvscr vr0 28 mtvscr v0
29 addi r10,r3,THREAD_TRANSACT_VRSTATE 29 addi r10,r3,THREAD_TRANSACT_VRSTATE
30 REST_32VRS(0,r4,r10) 30 REST_32VRS(0,r4,r10)
31 31
@@ -52,8 +52,8 @@ _GLOBAL(vec_enable)
52 */ 52 */
53_GLOBAL(load_vr_state) 53_GLOBAL(load_vr_state)
54 li r4,VRSTATE_VSCR 54 li r4,VRSTATE_VSCR
55 lvx vr0,r4,r3 55 lvx v0,r4,r3
56 mtvscr vr0 56 mtvscr v0
57 REST_32VRS(0,r4,r3) 57 REST_32VRS(0,r4,r3)
58 blr 58 blr
59 59
@@ -63,9 +63,9 @@ _GLOBAL(load_vr_state)
63 */ 63 */
64_GLOBAL(store_vr_state) 64_GLOBAL(store_vr_state)
65 SAVE_32VRS(0, r4, r3) 65 SAVE_32VRS(0, r4, r3)
66 mfvscr vr0 66 mfvscr v0
67 li r4, VRSTATE_VSCR 67 li r4, VRSTATE_VSCR
68 stvx vr0, r4, r3 68 stvx v0, r4, r3
69 blr 69 blr
70 70
71/* 71/*
@@ -104,9 +104,9 @@ _GLOBAL(load_up_altivec)
104 addi r4,r4,THREAD 104 addi r4,r4,THREAD
105 addi r6,r4,THREAD_VRSTATE 105 addi r6,r4,THREAD_VRSTATE
106 SAVE_32VRS(0,r5,r6) 106 SAVE_32VRS(0,r5,r6)
107 mfvscr vr0 107 mfvscr v0
108 li r10,VRSTATE_VSCR 108 li r10,VRSTATE_VSCR
109 stvx vr0,r10,r6 109 stvx v0,r10,r6
110 /* Disable VMX for last_task_used_altivec */ 110 /* Disable VMX for last_task_used_altivec */
111 PPC_LL r5,PT_REGS(r4) 111 PPC_LL r5,PT_REGS(r4)
112 toreal(r5) 112 toreal(r5)
@@ -142,8 +142,8 @@ _GLOBAL(load_up_altivec)
142 li r4,1 142 li r4,1
143 li r10,VRSTATE_VSCR 143 li r10,VRSTATE_VSCR
144 stw r4,THREAD_USED_VR(r5) 144 stw r4,THREAD_USED_VR(r5)
145 lvx vr0,r10,r6 145 lvx v0,r10,r6
146 mtvscr vr0 146 mtvscr v0
147 REST_32VRS(0,r4,r6) 147 REST_32VRS(0,r4,r6)
148#ifndef CONFIG_SMP 148#ifndef CONFIG_SMP
149 /* Update last_task_used_altivec to 'current' */ 149 /* Update last_task_used_altivec to 'current' */
@@ -186,9 +186,9 @@ _GLOBAL(giveup_altivec)
186 addi r7,r3,THREAD_VRSTATE 186 addi r7,r3,THREAD_VRSTATE
1872: PPC_LCMPI 0,r5,0 1872: PPC_LCMPI 0,r5,0
188 SAVE_32VRS(0,r4,r7) 188 SAVE_32VRS(0,r4,r7)
189 mfvscr vr0 189 mfvscr v0
190 li r4,VRSTATE_VSCR 190 li r4,VRSTATE_VSCR
191 stvx vr0,r4,r7 191 stvx v0,r4,r7
192 beq 1f 192 beq 1f
193 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 193 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
194#ifdef CONFIG_VSX 194#ifdef CONFIG_VSX
diff --git a/arch/powerpc/kvm/book3s_hv_ras.c b/arch/powerpc/kvm/book3s_hv_ras.c
index 60081bd75847..93b5f5c9b445 100644
--- a/arch/powerpc/kvm/book3s_hv_ras.c
+++ b/arch/powerpc/kvm/book3s_hv_ras.c
@@ -84,7 +84,7 @@ static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
84 } 84 }
85 if (dsisr & DSISR_MC_TLB_MULTI) { 85 if (dsisr & DSISR_MC_TLB_MULTI) {
86 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) 86 if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
87 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET_LPID); 87 cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_LPID);
88 dsisr &= ~DSISR_MC_TLB_MULTI; 88 dsisr &= ~DSISR_MC_TLB_MULTI;
89 } 89 }
90 /* Any other errors we don't understand? */ 90 /* Any other errors we don't understand? */
@@ -102,7 +102,7 @@ static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
102 break; 102 break;
103 case SRR1_MC_IFETCH_TLBMULTI: 103 case SRR1_MC_IFETCH_TLBMULTI:
104 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) 104 if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
105 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET_LPID); 105 cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_LPID);
106 break; 106 break;
107 default: 107 default:
108 handled = 0; 108 handled = 0;
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 27c0face86f4..41c5f8f8a20d 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -720,7 +720,7 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
720 return; 720 return;
721 } 721 }
722 722
723 if (vcpu->arch.mmio_is_bigendian) { 723 if (!vcpu->arch.mmio_host_swabbed) {
724 switch (run->mmio.len) { 724 switch (run->mmio.len) {
725 case 8: gpr = *(u64 *)run->mmio.data; break; 725 case 8: gpr = *(u64 *)run->mmio.data; break;
726 case 4: gpr = *(u32 *)run->mmio.data; break; 726 case 4: gpr = *(u32 *)run->mmio.data; break;
@@ -728,10 +728,10 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
728 case 1: gpr = *(u8 *)run->mmio.data; break; 728 case 1: gpr = *(u8 *)run->mmio.data; break;
729 } 729 }
730 } else { 730 } else {
731 /* Convert BE data from userland back to LE. */
732 switch (run->mmio.len) { 731 switch (run->mmio.len) {
733 case 4: gpr = ld_le32((u32 *)run->mmio.data); break; 732 case 8: gpr = swab64(*(u64 *)run->mmio.data); break;
734 case 2: gpr = ld_le16((u16 *)run->mmio.data); break; 733 case 4: gpr = swab32(*(u32 *)run->mmio.data); break;
734 case 2: gpr = swab16(*(u16 *)run->mmio.data); break;
735 case 1: gpr = *(u8 *)run->mmio.data; break; 735 case 1: gpr = *(u8 *)run->mmio.data; break;
736 } 736 }
737 } 737 }
@@ -780,14 +780,13 @@ int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
780 int is_default_endian) 780 int is_default_endian)
781{ 781{
782 int idx, ret; 782 int idx, ret;
783 int is_bigendian; 783 bool host_swabbed;
784 784
785 /* Pity C doesn't have a logical XOR operator */
785 if (kvmppc_need_byteswap(vcpu)) { 786 if (kvmppc_need_byteswap(vcpu)) {
786 /* Default endianness is "little endian". */ 787 host_swabbed = is_default_endian;
787 is_bigendian = !is_default_endian;
788 } else { 788 } else {
789 /* Default endianness is "big endian". */ 789 host_swabbed = !is_default_endian;
790 is_bigendian = is_default_endian;
791 } 790 }
792 791
793 if (bytes > sizeof(run->mmio.data)) { 792 if (bytes > sizeof(run->mmio.data)) {
@@ -800,7 +799,7 @@ int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
800 run->mmio.is_write = 0; 799 run->mmio.is_write = 0;
801 800
802 vcpu->arch.io_gpr = rt; 801 vcpu->arch.io_gpr = rt;
803 vcpu->arch.mmio_is_bigendian = is_bigendian; 802 vcpu->arch.mmio_host_swabbed = host_swabbed;
804 vcpu->mmio_needed = 1; 803 vcpu->mmio_needed = 1;
805 vcpu->mmio_is_write = 0; 804 vcpu->mmio_is_write = 0;
806 vcpu->arch.mmio_sign_extend = 0; 805 vcpu->arch.mmio_sign_extend = 0;
@@ -840,14 +839,13 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
840{ 839{
841 void *data = run->mmio.data; 840 void *data = run->mmio.data;
842 int idx, ret; 841 int idx, ret;
843 int is_bigendian; 842 bool host_swabbed;
844 843
844 /* Pity C doesn't have a logical XOR operator */
845 if (kvmppc_need_byteswap(vcpu)) { 845 if (kvmppc_need_byteswap(vcpu)) {
846 /* Default endianness is "little endian". */ 846 host_swabbed = is_default_endian;
847 is_bigendian = !is_default_endian;
848 } else { 847 } else {
849 /* Default endianness is "big endian". */ 848 host_swabbed = !is_default_endian;
850 is_bigendian = is_default_endian;
851 } 849 }
852 850
853 if (bytes > sizeof(run->mmio.data)) { 851 if (bytes > sizeof(run->mmio.data)) {
@@ -862,7 +860,7 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
862 vcpu->mmio_is_write = 1; 860 vcpu->mmio_is_write = 1;
863 861
864 /* Store the value at the lowest bytes in 'data'. */ 862 /* Store the value at the lowest bytes in 'data'. */
865 if (is_bigendian) { 863 if (!host_swabbed) {
866 switch (bytes) { 864 switch (bytes) {
867 case 8: *(u64 *)data = val; break; 865 case 8: *(u64 *)data = val; break;
868 case 4: *(u32 *)data = val; break; 866 case 4: *(u32 *)data = val; break;
@@ -870,11 +868,11 @@ int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
870 case 1: *(u8 *)data = val; break; 868 case 1: *(u8 *)data = val; break;
871 } 869 }
872 } else { 870 } else {
873 /* Store LE value into 'data'. */
874 switch (bytes) { 871 switch (bytes) {
875 case 4: st_le32(data, val); break; 872 case 8: *(u64 *)data = swab64(val); break;
876 case 2: st_le16(data, val); break; 873 case 4: *(u32 *)data = swab32(val); break;
877 case 1: *(u8 *)data = val; break; 874 case 2: *(u16 *)data = swab16(val); break;
875 case 1: *(u8 *)data = val; break;
878 } 876 }
879 } 877 }
880 878
diff --git a/arch/powerpc/lib/alloc.c b/arch/powerpc/lib/alloc.c
index 4a6c2cf890d9..60b0b3fc8fc1 100644
--- a/arch/powerpc/lib/alloc.c
+++ b/arch/powerpc/lib/alloc.c
@@ -10,7 +10,7 @@ void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
10{ 10{
11 void *p; 11 void *p;
12 12
13 if (mem_init_done) 13 if (slab_is_available())
14 p = kzalloc(size, mask); 14 p = kzalloc(size, mask);
15 else { 15 else {
16 p = memblock_virt_alloc(size, 0); 16 p = memblock_virt_alloc(size, 0);
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S
index 55f19f9fd708..6813f80d1eec 100644
--- a/arch/powerpc/lib/copy_32.S
+++ b/arch/powerpc/lib/copy_32.S
@@ -69,54 +69,6 @@ CACHELINE_BYTES = L1_CACHE_BYTES
69LG_CACHELINE_BYTES = L1_CACHE_SHIFT 69LG_CACHELINE_BYTES = L1_CACHE_SHIFT
70CACHELINE_MASK = (L1_CACHE_BYTES-1) 70CACHELINE_MASK = (L1_CACHE_BYTES-1)
71 71
72/*
73 * Use dcbz on the complete cache lines in the destination
74 * to set them to zero. This requires that the destination
75 * area is cacheable. -- paulus
76 */
77_GLOBAL(cacheable_memzero)
78 mr r5,r4
79 li r4,0
80 addi r6,r3,-4
81 cmplwi 0,r5,4
82 blt 7f
83 stwu r4,4(r6)
84 beqlr
85 andi. r0,r6,3
86 add r5,r0,r5
87 subf r6,r0,r6
88 clrlwi r7,r6,32-LG_CACHELINE_BYTES
89 add r8,r7,r5
90 srwi r9,r8,LG_CACHELINE_BYTES
91 addic. r9,r9,-1 /* total number of complete cachelines */
92 ble 2f
93 xori r0,r7,CACHELINE_MASK & ~3
94 srwi. r0,r0,2
95 beq 3f
96 mtctr r0
974: stwu r4,4(r6)
98 bdnz 4b
993: mtctr r9
100 li r7,4
10110: dcbz r7,r6
102 addi r6,r6,CACHELINE_BYTES
103 bdnz 10b
104 clrlwi r5,r8,32-LG_CACHELINE_BYTES
105 addi r5,r5,4
1062: srwi r0,r5,2
107 mtctr r0
108 bdz 6f
1091: stwu r4,4(r6)
110 bdnz 1b
1116: andi. r5,r5,3
1127: cmpwi 0,r5,0
113 beqlr
114 mtctr r5
115 addi r6,r6,3
1168: stbu r4,1(r6)
117 bdnz 8b
118 blr
119
120_GLOBAL(memset) 72_GLOBAL(memset)
121 rlwimi r4,r4,8,16,23 73 rlwimi r4,r4,8,16,23
122 rlwimi r4,r4,16,0,15 74 rlwimi r4,r4,16,0,15
@@ -142,85 +94,6 @@ _GLOBAL(memset)
142 bdnz 8b 94 bdnz 8b
143 blr 95 blr
144 96
145/*
146 * This version uses dcbz on the complete cache lines in the
147 * destination area to reduce memory traffic. This requires that
148 * the destination area is cacheable.
149 * We only use this version if the source and dest don't overlap.
150 * -- paulus.
151 */
152_GLOBAL(cacheable_memcpy)
153 add r7,r3,r5 /* test if the src & dst overlap */
154 add r8,r4,r5
155 cmplw 0,r4,r7
156 cmplw 1,r3,r8
157 crand 0,0,4 /* cr0.lt &= cr1.lt */
158 blt memcpy /* if regions overlap */
159
160 addi r4,r4,-4
161 addi r6,r3,-4
162 neg r0,r3
163 andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
164 beq 58f
165
166 cmplw 0,r5,r0 /* is this more than total to do? */
167 blt 63f /* if not much to do */
168 andi. r8,r0,3 /* get it word-aligned first */
169 subf r5,r0,r5
170 mtctr r8
171 beq+ 61f
17270: lbz r9,4(r4) /* do some bytes */
173 stb r9,4(r6)
174 addi r4,r4,1
175 addi r6,r6,1
176 bdnz 70b
17761: srwi. r0,r0,2
178 mtctr r0
179 beq 58f
18072: lwzu r9,4(r4) /* do some words */
181 stwu r9,4(r6)
182 bdnz 72b
183
18458: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
185 clrlwi r5,r5,32-LG_CACHELINE_BYTES
186 li r11,4
187 mtctr r0
188 beq 63f
18953:
190 dcbz r11,r6
191 COPY_16_BYTES
192#if L1_CACHE_BYTES >= 32
193 COPY_16_BYTES
194#if L1_CACHE_BYTES >= 64
195 COPY_16_BYTES
196 COPY_16_BYTES
197#if L1_CACHE_BYTES >= 128
198 COPY_16_BYTES
199 COPY_16_BYTES
200 COPY_16_BYTES
201 COPY_16_BYTES
202#endif
203#endif
204#endif
205 bdnz 53b
206
20763: srwi. r0,r5,2
208 mtctr r0
209 beq 64f
21030: lwzu r0,4(r4)
211 stwu r0,4(r6)
212 bdnz 30b
213
21464: andi. r0,r5,3
215 mtctr r0
216 beq+ 65f
21740: lbz r0,4(r4)
218 stb r0,4(r6)
219 addi r4,r4,1
220 addi r6,r6,1
221 bdnz 40b
22265: blr
223
224_GLOBAL(memmove) 97_GLOBAL(memmove)
225 cmplw 0,r3,r4 98 cmplw 0,r3,r4
226 bgt backwards_memcpy 99 bgt backwards_memcpy
diff --git a/arch/powerpc/lib/copypage_power7.S b/arch/powerpc/lib/copypage_power7.S
index d7dafb3777ac..a84d333ecb09 100644
--- a/arch/powerpc/lib/copypage_power7.S
+++ b/arch/powerpc/lib/copypage_power7.S
@@ -83,23 +83,23 @@ _GLOBAL(copypage_power7)
83 li r12,112 83 li r12,112
84 84
85 .align 5 85 .align 5
861: lvx vr7,r0,r4 861: lvx v7,r0,r4
87 lvx vr6,r4,r6 87 lvx v6,r4,r6
88 lvx vr5,r4,r7 88 lvx v5,r4,r7
89 lvx vr4,r4,r8 89 lvx v4,r4,r8
90 lvx vr3,r4,r9 90 lvx v3,r4,r9
91 lvx vr2,r4,r10 91 lvx v2,r4,r10
92 lvx vr1,r4,r11 92 lvx v1,r4,r11
93 lvx vr0,r4,r12 93 lvx v0,r4,r12
94 addi r4,r4,128 94 addi r4,r4,128
95 stvx vr7,r0,r3 95 stvx v7,r0,r3
96 stvx vr6,r3,r6 96 stvx v6,r3,r6
97 stvx vr5,r3,r7 97 stvx v5,r3,r7
98 stvx vr4,r3,r8 98 stvx v4,r3,r8
99 stvx vr3,r3,r9 99 stvx v3,r3,r9
100 stvx vr2,r3,r10 100 stvx v2,r3,r10
101 stvx vr1,r3,r11 101 stvx v1,r3,r11
102 stvx vr0,r3,r12 102 stvx v0,r3,r12
103 addi r3,r3,128 103 addi r3,r3,128
104 bdnz 1b 104 bdnz 1b
105 105
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index 92ee840529bc..da0c568d18c4 100644
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -388,29 +388,29 @@ err3; std r0,0(r3)
388 li r11,48 388 li r11,48
389 389
390 bf cr7*4+3,5f 390 bf cr7*4+3,5f
391err3; lvx vr1,r0,r4 391err3; lvx v1,r0,r4
392 addi r4,r4,16 392 addi r4,r4,16
393err3; stvx vr1,r0,r3 393err3; stvx v1,r0,r3
394 addi r3,r3,16 394 addi r3,r3,16
395 395
3965: bf cr7*4+2,6f 3965: bf cr7*4+2,6f
397err3; lvx vr1,r0,r4 397err3; lvx v1,r0,r4
398err3; lvx vr0,r4,r9 398err3; lvx v0,r4,r9
399 addi r4,r4,32 399 addi r4,r4,32
400err3; stvx vr1,r0,r3 400err3; stvx v1,r0,r3
401err3; stvx vr0,r3,r9 401err3; stvx v0,r3,r9
402 addi r3,r3,32 402 addi r3,r3,32
403 403
4046: bf cr7*4+1,7f 4046: bf cr7*4+1,7f
405err3; lvx vr3,r0,r4 405err3; lvx v3,r0,r4
406err3; lvx vr2,r4,r9 406err3; lvx v2,r4,r9
407err3; lvx vr1,r4,r10 407err3; lvx v1,r4,r10
408err3; lvx vr0,r4,r11 408err3; lvx v0,r4,r11
409 addi r4,r4,64 409 addi r4,r4,64
410err3; stvx vr3,r0,r3 410err3; stvx v3,r0,r3
411err3; stvx vr2,r3,r9 411err3; stvx v2,r3,r9
412err3; stvx vr1,r3,r10 412err3; stvx v1,r3,r10
413err3; stvx vr0,r3,r11 413err3; stvx v0,r3,r11
414 addi r3,r3,64 414 addi r3,r3,64
415 415
4167: sub r5,r5,r6 4167: sub r5,r5,r6
@@ -433,23 +433,23 @@ err3; stvx vr0,r3,r11
433 */ 433 */
434 .align 5 434 .align 5
4358: 4358:
436err4; lvx vr7,r0,r4 436err4; lvx v7,r0,r4
437err4; lvx vr6,r4,r9 437err4; lvx v6,r4,r9
438err4; lvx vr5,r4,r10 438err4; lvx v5,r4,r10
439err4; lvx vr4,r4,r11 439err4; lvx v4,r4,r11
440err4; lvx vr3,r4,r12 440err4; lvx v3,r4,r12
441err4; lvx vr2,r4,r14 441err4; lvx v2,r4,r14
442err4; lvx vr1,r4,r15 442err4; lvx v1,r4,r15
443err4; lvx vr0,r4,r16 443err4; lvx v0,r4,r16
444 addi r4,r4,128 444 addi r4,r4,128
445err4; stvx vr7,r0,r3 445err4; stvx v7,r0,r3
446err4; stvx vr6,r3,r9 446err4; stvx v6,r3,r9
447err4; stvx vr5,r3,r10 447err4; stvx v5,r3,r10
448err4; stvx vr4,r3,r11 448err4; stvx v4,r3,r11
449err4; stvx vr3,r3,r12 449err4; stvx v3,r3,r12
450err4; stvx vr2,r3,r14 450err4; stvx v2,r3,r14
451err4; stvx vr1,r3,r15 451err4; stvx v1,r3,r15
452err4; stvx vr0,r3,r16 452err4; stvx v0,r3,r16
453 addi r3,r3,128 453 addi r3,r3,128
454 bdnz 8b 454 bdnz 8b
455 455
@@ -463,29 +463,29 @@ err4; stvx vr0,r3,r16
463 mtocrf 0x01,r6 463 mtocrf 0x01,r6
464 464
465 bf cr7*4+1,9f 465 bf cr7*4+1,9f
466err3; lvx vr3,r0,r4 466err3; lvx v3,r0,r4
467err3; lvx vr2,r4,r9 467err3; lvx v2,r4,r9
468err3; lvx vr1,r4,r10 468err3; lvx v1,r4,r10
469err3; lvx vr0,r4,r11 469err3; lvx v0,r4,r11
470 addi r4,r4,64 470 addi r4,r4,64
471err3; stvx vr3,r0,r3 471err3; stvx v3,r0,r3
472err3; stvx vr2,r3,r9 472err3; stvx v2,r3,r9
473err3; stvx vr1,r3,r10 473err3; stvx v1,r3,r10
474err3; stvx vr0,r3,r11 474err3; stvx v0,r3,r11
475 addi r3,r3,64 475 addi r3,r3,64
476 476
4779: bf cr7*4+2,10f 4779: bf cr7*4+2,10f
478err3; lvx vr1,r0,r4 478err3; lvx v1,r0,r4
479err3; lvx vr0,r4,r9 479err3; lvx v0,r4,r9
480 addi r4,r4,32 480 addi r4,r4,32
481err3; stvx vr1,r0,r3 481err3; stvx v1,r0,r3
482err3; stvx vr0,r3,r9 482err3; stvx v0,r3,r9
483 addi r3,r3,32 483 addi r3,r3,32
484 484
48510: bf cr7*4+3,11f 48510: bf cr7*4+3,11f
486err3; lvx vr1,r0,r4 486err3; lvx v1,r0,r4
487 addi r4,r4,16 487 addi r4,r4,16
488err3; stvx vr1,r0,r3 488err3; stvx v1,r0,r3
489 addi r3,r3,16 489 addi r3,r3,16
490 490
491 /* Up to 15B to go */ 491 /* Up to 15B to go */
@@ -560,42 +560,42 @@ err3; stw r7,4(r3)
560 li r10,32 560 li r10,32
561 li r11,48 561 li r11,48
562 562
563 LVS(vr16,0,r4) /* Setup permute control vector */ 563 LVS(v16,0,r4) /* Setup permute control vector */
564err3; lvx vr0,0,r4 564err3; lvx v0,0,r4
565 addi r4,r4,16 565 addi r4,r4,16
566 566
567 bf cr7*4+3,5f 567 bf cr7*4+3,5f
568err3; lvx vr1,r0,r4 568err3; lvx v1,r0,r4
569 VPERM(vr8,vr0,vr1,vr16) 569 VPERM(v8,v0,v1,v16)
570 addi r4,r4,16 570 addi r4,r4,16
571err3; stvx vr8,r0,r3 571err3; stvx v8,r0,r3
572 addi r3,r3,16 572 addi r3,r3,16
573 vor vr0,vr1,vr1 573 vor v0,v1,v1
574 574
5755: bf cr7*4+2,6f 5755: bf cr7*4+2,6f
576err3; lvx vr1,r0,r4 576err3; lvx v1,r0,r4
577 VPERM(vr8,vr0,vr1,vr16) 577 VPERM(v8,v0,v1,v16)
578err3; lvx vr0,r4,r9 578err3; lvx v0,r4,r9
579 VPERM(vr9,vr1,vr0,vr16) 579 VPERM(v9,v1,v0,v16)
580 addi r4,r4,32 580 addi r4,r4,32
581err3; stvx vr8,r0,r3 581err3; stvx v8,r0,r3
582err3; stvx vr9,r3,r9 582err3; stvx v9,r3,r9
583 addi r3,r3,32 583 addi r3,r3,32
584 584
5856: bf cr7*4+1,7f 5856: bf cr7*4+1,7f
586err3; lvx vr3,r0,r4 586err3; lvx v3,r0,r4
587 VPERM(vr8,vr0,vr3,vr16) 587 VPERM(v8,v0,v3,v16)
588err3; lvx vr2,r4,r9 588err3; lvx v2,r4,r9
589 VPERM(vr9,vr3,vr2,vr16) 589 VPERM(v9,v3,v2,v16)
590err3; lvx vr1,r4,r10 590err3; lvx v1,r4,r10
591 VPERM(vr10,vr2,vr1,vr16) 591 VPERM(v10,v2,v1,v16)
592err3; lvx vr0,r4,r11 592err3; lvx v0,r4,r11
593 VPERM(vr11,vr1,vr0,vr16) 593 VPERM(v11,v1,v0,v16)
594 addi r4,r4,64 594 addi r4,r4,64
595err3; stvx vr8,r0,r3 595err3; stvx v8,r0,r3
596err3; stvx vr9,r3,r9 596err3; stvx v9,r3,r9
597err3; stvx vr10,r3,r10 597err3; stvx v10,r3,r10
598err3; stvx vr11,r3,r11 598err3; stvx v11,r3,r11
599 addi r3,r3,64 599 addi r3,r3,64
600 600
6017: sub r5,r5,r6 6017: sub r5,r5,r6
@@ -618,31 +618,31 @@ err3; stvx vr11,r3,r11
618 */ 618 */
619 .align 5 619 .align 5
6208: 6208:
621err4; lvx vr7,r0,r4 621err4; lvx v7,r0,r4
622 VPERM(vr8,vr0,vr7,vr16) 622 VPERM(v8,v0,v7,v16)
623err4; lvx vr6,r4,r9 623err4; lvx v6,r4,r9
624 VPERM(vr9,vr7,vr6,vr16) 624 VPERM(v9,v7,v6,v16)
625err4; lvx vr5,r4,r10 625err4; lvx v5,r4,r10
626 VPERM(vr10,vr6,vr5,vr16) 626 VPERM(v10,v6,v5,v16)
627err4; lvx vr4,r4,r11 627err4; lvx v4,r4,r11
628 VPERM(vr11,vr5,vr4,vr16) 628 VPERM(v11,v5,v4,v16)
629err4; lvx vr3,r4,r12 629err4; lvx v3,r4,r12
630 VPERM(vr12,vr4,vr3,vr16) 630 VPERM(v12,v4,v3,v16)
631err4; lvx vr2,r4,r14 631err4; lvx v2,r4,r14
632 VPERM(vr13,vr3,vr2,vr16) 632 VPERM(v13,v3,v2,v16)
633err4; lvx vr1,r4,r15 633err4; lvx v1,r4,r15
634 VPERM(vr14,vr2,vr1,vr16) 634 VPERM(v14,v2,v1,v16)
635err4; lvx vr0,r4,r16 635err4; lvx v0,r4,r16
636 VPERM(vr15,vr1,vr0,vr16) 636 VPERM(v15,v1,v0,v16)
637 addi r4,r4,128 637 addi r4,r4,128
638err4; stvx vr8,r0,r3 638err4; stvx v8,r0,r3
639err4; stvx vr9,r3,r9 639err4; stvx v9,r3,r9
640err4; stvx vr10,r3,r10 640err4; stvx v10,r3,r10
641err4; stvx vr11,r3,r11 641err4; stvx v11,r3,r11
642err4; stvx vr12,r3,r12 642err4; stvx v12,r3,r12
643err4; stvx vr13,r3,r14 643err4; stvx v13,r3,r14
644err4; stvx vr14,r3,r15 644err4; stvx v14,r3,r15
645err4; stvx vr15,r3,r16 645err4; stvx v15,r3,r16
646 addi r3,r3,128 646 addi r3,r3,128
647 bdnz 8b 647 bdnz 8b
648 648
@@ -656,36 +656,36 @@ err4; stvx vr15,r3,r16
656 mtocrf 0x01,r6 656 mtocrf 0x01,r6
657 657
658 bf cr7*4+1,9f 658 bf cr7*4+1,9f
659err3; lvx vr3,r0,r4 659err3; lvx v3,r0,r4
660 VPERM(vr8,vr0,vr3,vr16) 660 VPERM(v8,v0,v3,v16)
661err3; lvx vr2,r4,r9 661err3; lvx v2,r4,r9
662 VPERM(vr9,vr3,vr2,vr16) 662 VPERM(v9,v3,v2,v16)
663err3; lvx vr1,r4,r10 663err3; lvx v1,r4,r10
664 VPERM(vr10,vr2,vr1,vr16) 664 VPERM(v10,v2,v1,v16)
665err3; lvx vr0,r4,r11 665err3; lvx v0,r4,r11
666 VPERM(vr11,vr1,vr0,vr16) 666 VPERM(v11,v1,v0,v16)
667 addi r4,r4,64 667 addi r4,r4,64
668err3; stvx vr8,r0,r3 668err3; stvx v8,r0,r3
669err3; stvx vr9,r3,r9 669err3; stvx v9,r3,r9
670err3; stvx vr10,r3,r10 670err3; stvx v10,r3,r10
671err3; stvx vr11,r3,r11 671err3; stvx v11,r3,r11
672 addi r3,r3,64 672 addi r3,r3,64
673 673
6749: bf cr7*4+2,10f 6749: bf cr7*4+2,10f
675err3; lvx vr1,r0,r4 675err3; lvx v1,r0,r4
676 VPERM(vr8,vr0,vr1,vr16) 676 VPERM(v8,v0,v1,v16)
677err3; lvx vr0,r4,r9 677err3; lvx v0,r4,r9
678 VPERM(vr9,vr1,vr0,vr16) 678 VPERM(v9,v1,v0,v16)
679 addi r4,r4,32 679 addi r4,r4,32
680err3; stvx vr8,r0,r3 680err3; stvx v8,r0,r3
681err3; stvx vr9,r3,r9 681err3; stvx v9,r3,r9
682 addi r3,r3,32 682 addi r3,r3,32
683 683
68410: bf cr7*4+3,11f 68410: bf cr7*4+3,11f
685err3; lvx vr1,r0,r4 685err3; lvx v1,r0,r4
686 VPERM(vr8,vr0,vr1,vr16) 686 VPERM(v8,v0,v1,v16)
687 addi r4,r4,16 687 addi r4,r4,16
688err3; stvx vr8,r0,r3 688err3; stvx v8,r0,r3
689 addi r3,r3,16 689 addi r3,r3,16
690 690
691 /* Up to 15B to go */ 691 /* Up to 15B to go */
diff --git a/arch/powerpc/lib/crtsavres.S b/arch/powerpc/lib/crtsavres.S
index a5b30c71a8d3..18af0b3d3eb2 100644
--- a/arch/powerpc/lib/crtsavres.S
+++ b/arch/powerpc/lib/crtsavres.S
@@ -236,78 +236,78 @@ _GLOBAL(_rest32gpr_31_x)
236 236
237_GLOBAL(_savevr_20) 237_GLOBAL(_savevr_20)
238 li r11,-192 238 li r11,-192
239 stvx vr20,r11,r0 239 stvx v20,r11,r0
240_GLOBAL(_savevr_21) 240_GLOBAL(_savevr_21)
241 li r11,-176 241 li r11,-176
242 stvx vr21,r11,r0 242 stvx v21,r11,r0
243_GLOBAL(_savevr_22) 243_GLOBAL(_savevr_22)
244 li r11,-160 244 li r11,-160
245 stvx vr22,r11,r0 245 stvx v22,r11,r0
246_GLOBAL(_savevr_23) 246_GLOBAL(_savevr_23)
247 li r11,-144 247 li r11,-144
248 stvx vr23,r11,r0 248 stvx v23,r11,r0
249_GLOBAL(_savevr_24) 249_GLOBAL(_savevr_24)
250 li r11,-128 250 li r11,-128
251 stvx vr24,r11,r0 251 stvx v24,r11,r0
252_GLOBAL(_savevr_25) 252_GLOBAL(_savevr_25)
253 li r11,-112 253 li r11,-112
254 stvx vr25,r11,r0 254 stvx v25,r11,r0
255_GLOBAL(_savevr_26) 255_GLOBAL(_savevr_26)
256 li r11,-96 256 li r11,-96
257 stvx vr26,r11,r0 257 stvx v26,r11,r0
258_GLOBAL(_savevr_27) 258_GLOBAL(_savevr_27)
259 li r11,-80 259 li r11,-80
260 stvx vr27,r11,r0 260 stvx v27,r11,r0
261_GLOBAL(_savevr_28) 261_GLOBAL(_savevr_28)
262 li r11,-64 262 li r11,-64
263 stvx vr28,r11,r0 263 stvx v28,r11,r0
264_GLOBAL(_savevr_29) 264_GLOBAL(_savevr_29)
265 li r11,-48 265 li r11,-48
266 stvx vr29,r11,r0 266 stvx v29,r11,r0
267_GLOBAL(_savevr_30) 267_GLOBAL(_savevr_30)
268 li r11,-32 268 li r11,-32
269 stvx vr30,r11,r0 269 stvx v30,r11,r0
270_GLOBAL(_savevr_31) 270_GLOBAL(_savevr_31)
271 li r11,-16 271 li r11,-16
272 stvx vr31,r11,r0 272 stvx v31,r11,r0
273 blr 273 blr
274 274
275_GLOBAL(_restvr_20) 275_GLOBAL(_restvr_20)
276 li r11,-192 276 li r11,-192
277 lvx vr20,r11,r0 277 lvx v20,r11,r0
278_GLOBAL(_restvr_21) 278_GLOBAL(_restvr_21)
279 li r11,-176 279 li r11,-176
280 lvx vr21,r11,r0 280 lvx v21,r11,r0
281_GLOBAL(_restvr_22) 281_GLOBAL(_restvr_22)
282 li r11,-160 282 li r11,-160
283 lvx vr22,r11,r0 283 lvx v22,r11,r0
284_GLOBAL(_restvr_23) 284_GLOBAL(_restvr_23)
285 li r11,-144 285 li r11,-144
286 lvx vr23,r11,r0 286 lvx v23,r11,r0
287_GLOBAL(_restvr_24) 287_GLOBAL(_restvr_24)
288 li r11,-128 288 li r11,-128
289 lvx vr24,r11,r0 289 lvx v24,r11,r0
290_GLOBAL(_restvr_25) 290_GLOBAL(_restvr_25)
291 li r11,-112 291 li r11,-112
292 lvx vr25,r11,r0 292 lvx v25,r11,r0
293_GLOBAL(_restvr_26) 293_GLOBAL(_restvr_26)
294 li r11,-96 294 li r11,-96
295 lvx vr26,r11,r0 295 lvx v26,r11,r0
296_GLOBAL(_restvr_27) 296_GLOBAL(_restvr_27)
297 li r11,-80 297 li r11,-80
298 lvx vr27,r11,r0 298 lvx v27,r11,r0
299_GLOBAL(_restvr_28) 299_GLOBAL(_restvr_28)
300 li r11,-64 300 li r11,-64
301 lvx vr28,r11,r0 301 lvx v28,r11,r0
302_GLOBAL(_restvr_29) 302_GLOBAL(_restvr_29)
303 li r11,-48 303 li r11,-48
304 lvx vr29,r11,r0 304 lvx v29,r11,r0
305_GLOBAL(_restvr_30) 305_GLOBAL(_restvr_30)
306 li r11,-32 306 li r11,-32
307 lvx vr30,r11,r0 307 lvx v30,r11,r0
308_GLOBAL(_restvr_31) 308_GLOBAL(_restvr_31)
309 li r11,-16 309 li r11,-16
310 lvx vr31,r11,r0 310 lvx v31,r11,r0
311 blr 311 blr
312 312
313#endif /* CONFIG_ALTIVEC */ 313#endif /* CONFIG_ALTIVEC */
@@ -443,101 +443,101 @@ _restgpr0_31:
443.globl _savevr_20 443.globl _savevr_20
444_savevr_20: 444_savevr_20:
445 li r12,-192 445 li r12,-192
446 stvx vr20,r12,r0 446 stvx v20,r12,r0
447.globl _savevr_21 447.globl _savevr_21
448_savevr_21: 448_savevr_21:
449 li r12,-176 449 li r12,-176
450 stvx vr21,r12,r0 450 stvx v21,r12,r0
451.globl _savevr_22 451.globl _savevr_22
452_savevr_22: 452_savevr_22:
453 li r12,-160 453 li r12,-160
454 stvx vr22,r12,r0 454 stvx v22,r12,r0
455.globl _savevr_23 455.globl _savevr_23
456_savevr_23: 456_savevr_23:
457 li r12,-144 457 li r12,-144
458 stvx vr23,r12,r0 458 stvx v23,r12,r0
459.globl _savevr_24 459.globl _savevr_24
460_savevr_24: 460_savevr_24:
461 li r12,-128 461 li r12,-128
462 stvx vr24,r12,r0 462 stvx v24,r12,r0
463.globl _savevr_25 463.globl _savevr_25
464_savevr_25: 464_savevr_25:
465 li r12,-112 465 li r12,-112
466 stvx vr25,r12,r0 466 stvx v25,r12,r0
467.globl _savevr_26 467.globl _savevr_26
468_savevr_26: 468_savevr_26:
469 li r12,-96 469 li r12,-96
470 stvx vr26,r12,r0 470 stvx v26,r12,r0
471.globl _savevr_27 471.globl _savevr_27
472_savevr_27: 472_savevr_27:
473 li r12,-80 473 li r12,-80
474 stvx vr27,r12,r0 474 stvx v27,r12,r0
475.globl _savevr_28 475.globl _savevr_28
476_savevr_28: 476_savevr_28:
477 li r12,-64 477 li r12,-64
478 stvx vr28,r12,r0 478 stvx v28,r12,r0
479.globl _savevr_29 479.globl _savevr_29
480_savevr_29: 480_savevr_29:
481 li r12,-48 481 li r12,-48
482 stvx vr29,r12,r0 482 stvx v29,r12,r0
483.globl _savevr_30 483.globl _savevr_30
484_savevr_30: 484_savevr_30:
485 li r12,-32 485 li r12,-32
486 stvx vr30,r12,r0 486 stvx v30,r12,r0
487.globl _savevr_31 487.globl _savevr_31
488_savevr_31: 488_savevr_31:
489 li r12,-16 489 li r12,-16
490 stvx vr31,r12,r0 490 stvx v31,r12,r0
491 blr 491 blr
492 492
493.globl _restvr_20 493.globl _restvr_20
494_restvr_20: 494_restvr_20:
495 li r12,-192 495 li r12,-192
496 lvx vr20,r12,r0 496 lvx v20,r12,r0
497.globl _restvr_21 497.globl _restvr_21
498_restvr_21: 498_restvr_21:
499 li r12,-176 499 li r12,-176
500 lvx vr21,r12,r0 500 lvx v21,r12,r0
501.globl _restvr_22 501.globl _restvr_22
502_restvr_22: 502_restvr_22:
503 li r12,-160 503 li r12,-160
504 lvx vr22,r12,r0 504 lvx v22,r12,r0
505.globl _restvr_23 505.globl _restvr_23
506_restvr_23: 506_restvr_23:
507 li r12,-144 507 li r12,-144
508 lvx vr23,r12,r0 508 lvx v23,r12,r0
509.globl _restvr_24 509.globl _restvr_24
510_restvr_24: 510_restvr_24:
511 li r12,-128 511 li r12,-128
512 lvx vr24,r12,r0 512 lvx v24,r12,r0
513.globl _restvr_25 513.globl _restvr_25
514_restvr_25: 514_restvr_25:
515 li r12,-112 515 li r12,-112
516 lvx vr25,r12,r0 516 lvx v25,r12,r0
517.globl _restvr_26 517.globl _restvr_26
518_restvr_26: 518_restvr_26:
519 li r12,-96 519 li r12,-96
520 lvx vr26,r12,r0 520 lvx v26,r12,r0
521.globl _restvr_27 521.globl _restvr_27
522_restvr_27: 522_restvr_27:
523 li r12,-80 523 li r12,-80
524 lvx vr27,r12,r0 524 lvx v27,r12,r0
525.globl _restvr_28 525.globl _restvr_28
526_restvr_28: 526_restvr_28:
527 li r12,-64 527 li r12,-64
528 lvx vr28,r12,r0 528 lvx v28,r12,r0
529.globl _restvr_29 529.globl _restvr_29
530_restvr_29: 530_restvr_29:
531 li r12,-48 531 li r12,-48
532 lvx vr29,r12,r0 532 lvx v29,r12,r0
533.globl _restvr_30 533.globl _restvr_30
534_restvr_30: 534_restvr_30:
535 li r12,-32 535 li r12,-32
536 lvx vr30,r12,r0 536 lvx v30,r12,r0
537.globl _restvr_31 537.globl _restvr_31
538_restvr_31: 538_restvr_31:
539 li r12,-16 539 li r12,-16
540 lvx vr31,r12,r0 540 lvx v31,r12,r0
541 blr 541 blr
542 542
543#endif /* CONFIG_ALTIVEC */ 543#endif /* CONFIG_ALTIVEC */
diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S
index 85aec08ab234..5d0cdbfbe3f2 100644
--- a/arch/powerpc/lib/ldstfp.S
+++ b/arch/powerpc/lib/ldstfp.S
@@ -184,16 +184,16 @@ _GLOBAL(do_stfd)
184 extab 2b,3b 184 extab 2b,3b
185 185
186#ifdef CONFIG_ALTIVEC 186#ifdef CONFIG_ALTIVEC
187/* Get the contents of vrN into vr0; N is in r3. */ 187/* Get the contents of vrN into v0; N is in r3. */
188_GLOBAL(get_vr) 188_GLOBAL(get_vr)
189 mflr r0 189 mflr r0
190 rlwinm r3,r3,3,0xf8 190 rlwinm r3,r3,3,0xf8
191 bcl 20,31,1f 191 bcl 20,31,1f
192 blr /* vr0 is already in vr0 */ 192 blr /* v0 is already in v0 */
193 nop 193 nop
194reg = 1 194reg = 1
195 .rept 31 195 .rept 31
196 vor vr0,reg,reg /* assembler doesn't know vmr? */ 196 vor v0,reg,reg /* assembler doesn't know vmr? */
197 blr 197 blr
198reg = reg + 1 198reg = reg + 1
199 .endr 199 .endr
@@ -203,16 +203,16 @@ reg = reg + 1
203 mtlr r0 203 mtlr r0
204 bctr 204 bctr
205 205
206/* Put the contents of vr0 into vrN; N is in r3. */ 206/* Put the contents of v0 into vrN; N is in r3. */
207_GLOBAL(put_vr) 207_GLOBAL(put_vr)
208 mflr r0 208 mflr r0
209 rlwinm r3,r3,3,0xf8 209 rlwinm r3,r3,3,0xf8
210 bcl 20,31,1f 210 bcl 20,31,1f
211 blr /* vr0 is already in vr0 */ 211 blr /* v0 is already in v0 */
212 nop 212 nop
213reg = 1 213reg = 1
214 .rept 31 214 .rept 31
215 vor reg,vr0,vr0 215 vor reg,v0,v0
216 blr 216 blr
217reg = reg + 1 217reg = reg + 1
218 .endr 218 .endr
@@ -234,13 +234,13 @@ _GLOBAL(do_lvx)
234 MTMSRD(r7) 234 MTMSRD(r7)
235 isync 235 isync
236 beq cr7,1f 236 beq cr7,1f
237 stvx vr0,r1,r8 237 stvx v0,r1,r8
2381: li r9,-EFAULT 2381: li r9,-EFAULT
2392: lvx vr0,0,r4 2392: lvx v0,0,r4
240 li r9,0 240 li r9,0
2413: beq cr7,4f 2413: beq cr7,4f
242 bl put_vr 242 bl put_vr
243 lvx vr0,r1,r8 243 lvx v0,r1,r8
2444: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) 2444: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
245 mtlr r0 245 mtlr r0
246 MTMSRD(r6) 246 MTMSRD(r6)
@@ -262,13 +262,13 @@ _GLOBAL(do_stvx)
262 MTMSRD(r7) 262 MTMSRD(r7)
263 isync 263 isync
264 beq cr7,1f 264 beq cr7,1f
265 stvx vr0,r1,r8 265 stvx v0,r1,r8
266 bl get_vr 266 bl get_vr
2671: li r9,-EFAULT 2671: li r9,-EFAULT
2682: stvx vr0,0,r4 2682: stvx v0,0,r4
269 li r9,0 269 li r9,0
2703: beq cr7,4f 2703: beq cr7,4f
271 lvx vr0,r1,r8 271 lvx v0,r1,r8
2724: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1) 2724: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
273 mtlr r0 273 mtlr r0
274 MTMSRD(r6) 274 MTMSRD(r6)
@@ -280,12 +280,12 @@ _GLOBAL(do_stvx)
280#endif /* CONFIG_ALTIVEC */ 280#endif /* CONFIG_ALTIVEC */
281 281
282#ifdef CONFIG_VSX 282#ifdef CONFIG_VSX
283/* Get the contents of vsrN into vsr0; N is in r3. */ 283/* Get the contents of vsN into vs0; N is in r3. */
284_GLOBAL(get_vsr) 284_GLOBAL(get_vsr)
285 mflr r0 285 mflr r0
286 rlwinm r3,r3,3,0x1f8 286 rlwinm r3,r3,3,0x1f8
287 bcl 20,31,1f 287 bcl 20,31,1f
288 blr /* vsr0 is already in vsr0 */ 288 blr /* vs0 is already in vs0 */
289 nop 289 nop
290reg = 1 290reg = 1
291 .rept 63 291 .rept 63
@@ -299,12 +299,12 @@ reg = reg + 1
299 mtlr r0 299 mtlr r0
300 bctr 300 bctr
301 301
302/* Put the contents of vsr0 into vsrN; N is in r3. */ 302/* Put the contents of vs0 into vsN; N is in r3. */
303_GLOBAL(put_vsr) 303_GLOBAL(put_vsr)
304 mflr r0 304 mflr r0
305 rlwinm r3,r3,3,0x1f8 305 rlwinm r3,r3,3,0x1f8
306 bcl 20,31,1f 306 bcl 20,31,1f
307 blr /* vr0 is already in vr0 */ 307 blr /* v0 is already in v0 */
308 nop 308 nop
309reg = 1 309reg = 1
310 .rept 63 310 .rept 63
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index 170a0346f756..f7deebdf3365 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -41,6 +41,7 @@ void __spin_yield(arch_spinlock_t *lock)
41 plpar_hcall_norets(H_CONFER, 41 plpar_hcall_norets(H_CONFER,
42 get_hard_smp_processor_id(holder_cpu), yield_count); 42 get_hard_smp_processor_id(holder_cpu), yield_count);
43} 43}
44EXPORT_SYMBOL_GPL(__spin_yield);
44 45
45/* 46/*
46 * Waiting for a read lock or a write lock on a rwlock... 47 * Waiting for a read lock or a write lock on a rwlock...
diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
index 0830587df16e..786234fd4e91 100644
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -321,29 +321,29 @@ _GLOBAL(memcpy_power7)
321 li r11,48 321 li r11,48
322 322
323 bf cr7*4+3,5f 323 bf cr7*4+3,5f
324 lvx vr1,r0,r4 324 lvx v1,r0,r4
325 addi r4,r4,16 325 addi r4,r4,16
326 stvx vr1,r0,r3 326 stvx v1,r0,r3
327 addi r3,r3,16 327 addi r3,r3,16
328 328
3295: bf cr7*4+2,6f 3295: bf cr7*4+2,6f
330 lvx vr1,r0,r4 330 lvx v1,r0,r4
331 lvx vr0,r4,r9 331 lvx v0,r4,r9
332 addi r4,r4,32 332 addi r4,r4,32
333 stvx vr1,r0,r3 333 stvx v1,r0,r3
334 stvx vr0,r3,r9 334 stvx v0,r3,r9
335 addi r3,r3,32 335 addi r3,r3,32
336 336
3376: bf cr7*4+1,7f 3376: bf cr7*4+1,7f
338 lvx vr3,r0,r4 338 lvx v3,r0,r4
339 lvx vr2,r4,r9 339 lvx v2,r4,r9
340 lvx vr1,r4,r10 340 lvx v1,r4,r10
341 lvx vr0,r4,r11 341 lvx v0,r4,r11
342 addi r4,r4,64 342 addi r4,r4,64
343 stvx vr3,r0,r3 343 stvx v3,r0,r3
344 stvx vr2,r3,r9 344 stvx v2,r3,r9
345 stvx vr1,r3,r10 345 stvx v1,r3,r10
346 stvx vr0,r3,r11 346 stvx v0,r3,r11
347 addi r3,r3,64 347 addi r3,r3,64
348 348
3497: sub r5,r5,r6 3497: sub r5,r5,r6
@@ -366,23 +366,23 @@ _GLOBAL(memcpy_power7)
366 */ 366 */
367 .align 5 367 .align 5
3688: 3688:
369 lvx vr7,r0,r4 369 lvx v7,r0,r4
370 lvx vr6,r4,r9 370 lvx v6,r4,r9
371 lvx vr5,r4,r10 371 lvx v5,r4,r10
372 lvx vr4,r4,r11 372 lvx v4,r4,r11
373 lvx vr3,r4,r12 373 lvx v3,r4,r12
374 lvx vr2,r4,r14 374 lvx v2,r4,r14
375 lvx vr1,r4,r15 375 lvx v1,r4,r15
376 lvx vr0,r4,r16 376 lvx v0,r4,r16
377 addi r4,r4,128 377 addi r4,r4,128
378 stvx vr7,r0,r3 378 stvx v7,r0,r3
379 stvx vr6,r3,r9 379 stvx v6,r3,r9
380 stvx vr5,r3,r10 380 stvx v5,r3,r10
381 stvx vr4,r3,r11 381 stvx v4,r3,r11
382 stvx vr3,r3,r12 382 stvx v3,r3,r12
383 stvx vr2,r3,r14 383 stvx v2,r3,r14
384 stvx vr1,r3,r15 384 stvx v1,r3,r15
385 stvx vr0,r3,r16 385 stvx v0,r3,r16
386 addi r3,r3,128 386 addi r3,r3,128
387 bdnz 8b 387 bdnz 8b
388 388
@@ -396,29 +396,29 @@ _GLOBAL(memcpy_power7)
396 mtocrf 0x01,r6 396 mtocrf 0x01,r6
397 397
398 bf cr7*4+1,9f 398 bf cr7*4+1,9f
399 lvx vr3,r0,r4 399 lvx v3,r0,r4
400 lvx vr2,r4,r9 400 lvx v2,r4,r9
401 lvx vr1,r4,r10 401 lvx v1,r4,r10
402 lvx vr0,r4,r11 402 lvx v0,r4,r11
403 addi r4,r4,64 403 addi r4,r4,64
404 stvx vr3,r0,r3 404 stvx v3,r0,r3
405 stvx vr2,r3,r9 405 stvx v2,r3,r9
406 stvx vr1,r3,r10 406 stvx v1,r3,r10
407 stvx vr0,r3,r11 407 stvx v0,r3,r11
408 addi r3,r3,64 408 addi r3,r3,64
409 409
4109: bf cr7*4+2,10f 4109: bf cr7*4+2,10f
411 lvx vr1,r0,r4 411 lvx v1,r0,r4
412 lvx vr0,r4,r9 412 lvx v0,r4,r9
413 addi r4,r4,32 413 addi r4,r4,32
414 stvx vr1,r0,r3 414 stvx v1,r0,r3
415 stvx vr0,r3,r9 415 stvx v0,r3,r9
416 addi r3,r3,32 416 addi r3,r3,32
417 417
41810: bf cr7*4+3,11f 41810: bf cr7*4+3,11f
419 lvx vr1,r0,r4 419 lvx v1,r0,r4
420 addi r4,r4,16 420 addi r4,r4,16
421 stvx vr1,r0,r3 421 stvx v1,r0,r3
422 addi r3,r3,16 422 addi r3,r3,16
423 423
424 /* Up to 15B to go */ 424 /* Up to 15B to go */
@@ -494,42 +494,42 @@ _GLOBAL(memcpy_power7)
494 li r10,32 494 li r10,32
495 li r11,48 495 li r11,48
496 496
497 LVS(vr16,0,r4) /* Setup permute control vector */ 497 LVS(v16,0,r4) /* Setup permute control vector */
498 lvx vr0,0,r4 498 lvx v0,0,r4
499 addi r4,r4,16 499 addi r4,r4,16
500 500
501 bf cr7*4+3,5f 501 bf cr7*4+3,5f
502 lvx vr1,r0,r4 502 lvx v1,r0,r4
503 VPERM(vr8,vr0,vr1,vr16) 503 VPERM(v8,v0,v1,v16)
504 addi r4,r4,16 504 addi r4,r4,16
505 stvx vr8,r0,r3 505 stvx v8,r0,r3
506 addi r3,r3,16 506 addi r3,r3,16
507 vor vr0,vr1,vr1 507 vor v0,v1,v1
508 508
5095: bf cr7*4+2,6f 5095: bf cr7*4+2,6f
510 lvx vr1,r0,r4 510 lvx v1,r0,r4
511 VPERM(vr8,vr0,vr1,vr16) 511 VPERM(v8,v0,v1,v16)
512 lvx vr0,r4,r9 512 lvx v0,r4,r9
513 VPERM(vr9,vr1,vr0,vr16) 513 VPERM(v9,v1,v0,v16)
514 addi r4,r4,32 514 addi r4,r4,32
515 stvx vr8,r0,r3 515 stvx v8,r0,r3
516 stvx vr9,r3,r9 516 stvx v9,r3,r9
517 addi r3,r3,32 517 addi r3,r3,32
518 518
5196: bf cr7*4+1,7f 5196: bf cr7*4+1,7f
520 lvx vr3,r0,r4 520 lvx v3,r0,r4
521 VPERM(vr8,vr0,vr3,vr16) 521 VPERM(v8,v0,v3,v16)
522 lvx vr2,r4,r9 522 lvx v2,r4,r9
523 VPERM(vr9,vr3,vr2,vr16) 523 VPERM(v9,v3,v2,v16)
524 lvx vr1,r4,r10 524 lvx v1,r4,r10
525 VPERM(vr10,vr2,vr1,vr16) 525 VPERM(v10,v2,v1,v16)
526 lvx vr0,r4,r11 526 lvx v0,r4,r11
527 VPERM(vr11,vr1,vr0,vr16) 527 VPERM(v11,v1,v0,v16)
528 addi r4,r4,64 528 addi r4,r4,64
529 stvx vr8,r0,r3 529 stvx v8,r0,r3
530 stvx vr9,r3,r9 530 stvx v9,r3,r9
531 stvx vr10,r3,r10 531 stvx v10,r3,r10
532 stvx vr11,r3,r11 532 stvx v11,r3,r11
533 addi r3,r3,64 533 addi r3,r3,64
534 534
5357: sub r5,r5,r6 5357: sub r5,r5,r6
@@ -552,31 +552,31 @@ _GLOBAL(memcpy_power7)
552 */ 552 */
553 .align 5 553 .align 5
5548: 5548:
555 lvx vr7,r0,r4 555 lvx v7,r0,r4
556 VPERM(vr8,vr0,vr7,vr16) 556 VPERM(v8,v0,v7,v16)
557 lvx vr6,r4,r9 557 lvx v6,r4,r9
558 VPERM(vr9,vr7,vr6,vr16) 558 VPERM(v9,v7,v6,v16)
559 lvx vr5,r4,r10 559 lvx v5,r4,r10
560 VPERM(vr10,vr6,vr5,vr16) 560 VPERM(v10,v6,v5,v16)
561 lvx vr4,r4,r11 561 lvx v4,r4,r11
562 VPERM(vr11,vr5,vr4,vr16) 562 VPERM(v11,v5,v4,v16)
563 lvx vr3,r4,r12 563 lvx v3,r4,r12
564 VPERM(vr12,vr4,vr3,vr16) 564 VPERM(v12,v4,v3,v16)
565 lvx vr2,r4,r14 565 lvx v2,r4,r14
566 VPERM(vr13,vr3,vr2,vr16) 566 VPERM(v13,v3,v2,v16)
567 lvx vr1,r4,r15 567 lvx v1,r4,r15
568 VPERM(vr14,vr2,vr1,vr16) 568 VPERM(v14,v2,v1,v16)
569 lvx vr0,r4,r16 569 lvx v0,r4,r16
570 VPERM(vr15,vr1,vr0,vr16) 570 VPERM(v15,v1,v0,v16)
571 addi r4,r4,128 571 addi r4,r4,128
572 stvx vr8,r0,r3 572 stvx v8,r0,r3
573 stvx vr9,r3,r9 573 stvx v9,r3,r9
574 stvx vr10,r3,r10 574 stvx v10,r3,r10
575 stvx vr11,r3,r11 575 stvx v11,r3,r11
576 stvx vr12,r3,r12 576 stvx v12,r3,r12
577 stvx vr13,r3,r14 577 stvx v13,r3,r14
578 stvx vr14,r3,r15 578 stvx v14,r3,r15
579 stvx vr15,r3,r16 579 stvx v15,r3,r16
580 addi r3,r3,128 580 addi r3,r3,128
581 bdnz 8b 581 bdnz 8b
582 582
@@ -590,36 +590,36 @@ _GLOBAL(memcpy_power7)
590 mtocrf 0x01,r6 590 mtocrf 0x01,r6
591 591
592 bf cr7*4+1,9f 592 bf cr7*4+1,9f
593 lvx vr3,r0,r4 593 lvx v3,r0,r4
594 VPERM(vr8,vr0,vr3,vr16) 594 VPERM(v8,v0,v3,v16)
595 lvx vr2,r4,r9 595 lvx v2,r4,r9
596 VPERM(vr9,vr3,vr2,vr16) 596 VPERM(v9,v3,v2,v16)
597 lvx vr1,r4,r10 597 lvx v1,r4,r10
598 VPERM(vr10,vr2,vr1,vr16) 598 VPERM(v10,v2,v1,v16)
599 lvx vr0,r4,r11 599 lvx v0,r4,r11
600 VPERM(vr11,vr1,vr0,vr16) 600 VPERM(v11,v1,v0,v16)
601 addi r4,r4,64 601 addi r4,r4,64
602 stvx vr8,r0,r3 602 stvx v8,r0,r3
603 stvx vr9,r3,r9 603 stvx v9,r3,r9
604 stvx vr10,r3,r10 604 stvx v10,r3,r10
605 stvx vr11,r3,r11 605 stvx v11,r3,r11
606 addi r3,r3,64 606 addi r3,r3,64
607 607
6089: bf cr7*4+2,10f 6089: bf cr7*4+2,10f
609 lvx vr1,r0,r4 609 lvx v1,r0,r4
610 VPERM(vr8,vr0,vr1,vr16) 610 VPERM(v8,v0,v1,v16)
611 lvx vr0,r4,r9 611 lvx v0,r4,r9
612 VPERM(vr9,vr1,vr0,vr16) 612 VPERM(v9,v1,v0,v16)
613 addi r4,r4,32 613 addi r4,r4,32
614 stvx vr8,r0,r3 614 stvx v8,r0,r3
615 stvx vr9,r3,r9 615 stvx v9,r3,r9
616 addi r3,r3,32 616 addi r3,r3,32
617 617
61810: bf cr7*4+3,11f 61810: bf cr7*4+3,11f
619 lvx vr1,r0,r4 619 lvx v1,r0,r4
620 VPERM(vr8,vr0,vr1,vr16) 620 VPERM(v8,v0,v1,v16)
621 addi r4,r4,16 621 addi r4,r4,16
622 stvx vr8,r0,r3 622 stvx v8,r0,r3
623 addi r3,r3,16 623 addi r3,r3,16
624 624
625 /* Up to 15B to go */ 625 /* Up to 15B to go */
diff --git a/arch/powerpc/lib/ppc_ksyms.c b/arch/powerpc/lib/ppc_ksyms.c
index f993959647b5..c7f8e9586316 100644
--- a/arch/powerpc/lib/ppc_ksyms.c
+++ b/arch/powerpc/lib/ppc_ksyms.c
@@ -8,10 +8,6 @@ EXPORT_SYMBOL(memset);
8EXPORT_SYMBOL(memmove); 8EXPORT_SYMBOL(memmove);
9EXPORT_SYMBOL(memcmp); 9EXPORT_SYMBOL(memcmp);
10EXPORT_SYMBOL(memchr); 10EXPORT_SYMBOL(memchr);
11#ifdef CONFIG_PPC32
12EXPORT_SYMBOL(cacheable_memcpy);
13EXPORT_SYMBOL(cacheable_memzero);
14#endif
15 11
16EXPORT_SYMBOL(strcpy); 12EXPORT_SYMBOL(strcpy);
17EXPORT_SYMBOL(strncpy); 13EXPORT_SYMBOL(strncpy);
diff --git a/arch/powerpc/lib/rheap.c b/arch/powerpc/lib/rheap.c
index a1060a868e69..69abf844c2c3 100644
--- a/arch/powerpc/lib/rheap.c
+++ b/arch/powerpc/lib/rheap.c
@@ -284,7 +284,7 @@ EXPORT_SYMBOL_GPL(rh_create);
284 */ 284 */
285void rh_destroy(rh_info_t * info) 285void rh_destroy(rh_info_t * info)
286{ 286{
287 if ((info->flags & RHIF_STATIC_BLOCK) == 0 && info->block != NULL) 287 if ((info->flags & RHIF_STATIC_BLOCK) == 0)
288 kfree(info->block); 288 kfree(info->block);
289 289
290 if ((info->flags & RHIF_STATIC_INFO) == 0) 290 if ((info->flags & RHIF_STATIC_INFO) == 0)
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 438dcd3fd0d1..9c8770b5f96f 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_40x) += 40x_mmu.o
24obj-$(CONFIG_44x) += 44x_mmu.o 24obj-$(CONFIG_44x) += 44x_mmu.o
25obj-$(CONFIG_PPC_FSL_BOOK3E) += fsl_booke_mmu.o 25obj-$(CONFIG_PPC_FSL_BOOK3E) += fsl_booke_mmu.o
26obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o 26obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o
27obj-$(CONFIG_PPC_SPLPAR) += vphn.o
27obj-$(CONFIG_PPC_MM_SLICES) += slice.o 28obj-$(CONFIG_PPC_MM_SLICES) += slice.o
28obj-y += hugetlbpage.o 29obj-y += hugetlbpage.o
29ifeq ($(CONFIG_HUGETLB_PAGE),y) 30ifeq ($(CONFIG_HUGETLB_PAGE),y)
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index d85e86aac7fb..169aba446a74 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -228,7 +228,7 @@ __dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t
228 do { 228 do {
229 SetPageReserved(page); 229 SetPageReserved(page);
230 map_page(vaddr, page_to_phys(page), 230 map_page(vaddr, page_to_phys(page),
231 pgprot_noncached(PAGE_KERNEL)); 231 pgprot_val(pgprot_noncached(PAGE_KERNEL)));
232 page++; 232 page++;
233 vaddr += PAGE_SIZE; 233 vaddr += PAGE_SIZE;
234 } while (size -= PAGE_SIZE); 234 } while (size -= PAGE_SIZE);
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index b46912fee7cd..9c90e66cffb6 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -181,7 +181,7 @@ static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
181 unsigned long cam_sz; 181 unsigned long cam_sz;
182 182
183 cam_sz = calc_cam_sz(ram, virt, phys); 183 cam_sz = calc_cam_sz(ram, virt, phys);
184 settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0); 184 settlbcam(i, virt, phys, cam_sz, pgprot_val(PAGE_KERNEL_X), 0);
185 185
186 ram -= cam_sz; 186 ram -= cam_sz;
187 amount_mapped += cam_sz; 187 amount_mapped += cam_sz;
diff --git a/arch/powerpc/mm/hugepage-hash64.c b/arch/powerpc/mm/hugepage-hash64.c
index 86686514ae13..43dafb9d6a46 100644
--- a/arch/powerpc/mm/hugepage-hash64.c
+++ b/arch/powerpc/mm/hugepage-hash64.c
@@ -33,7 +33,7 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
33 * atomically mark the linux large page PMD busy and dirty 33 * atomically mark the linux large page PMD busy and dirty
34 */ 34 */
35 do { 35 do {
36 pmd_t pmd = ACCESS_ONCE(*pmdp); 36 pmd_t pmd = READ_ONCE(*pmdp);
37 37
38 old_pmd = pmd_val(pmd); 38 old_pmd = pmd_val(pmd);
39 /* If PMD busy, retry the access */ 39 /* If PMD busy, retry the access */
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 7e408bfc7948..fa9d5c238d22 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -964,7 +964,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
964 *shift = 0; 964 *shift = 0;
965 965
966 pgdp = pgdir + pgd_index(ea); 966 pgdp = pgdir + pgd_index(ea);
967 pgd = ACCESS_ONCE(*pgdp); 967 pgd = READ_ONCE(*pgdp);
968 /* 968 /*
969 * Always operate on the local stack value. This make sure the 969 * Always operate on the local stack value. This make sure the
970 * value don't get updated by a parallel THP split/collapse, 970 * value don't get updated by a parallel THP split/collapse,
@@ -1045,7 +1045,7 @@ int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
1045 if (pte_end < end) 1045 if (pte_end < end)
1046 end = pte_end; 1046 end = pte_end;
1047 1047
1048 pte = ACCESS_ONCE(*ptep); 1048 pte = READ_ONCE(*ptep);
1049 mask = _PAGE_PRESENT | _PAGE_USER; 1049 mask = _PAGE_PRESENT | _PAGE_USER;
1050 if (write) 1050 if (write)
1051 mask |= _PAGE_RW; 1051 mask |= _PAGE_RW;
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 10471f9bb63f..d747dd7bc90b 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -132,6 +132,7 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
132 align = max_t(unsigned long, align, minalign); 132 align = max_t(unsigned long, align, minalign);
133 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift); 133 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
134 new = kmem_cache_create(name, table_size, align, 0, ctor); 134 new = kmem_cache_create(name, table_size, align, 0, ctor);
135 kfree(name);
135 pgtable_cache[shift - 1] = new; 136 pgtable_cache[shift - 1] = new;
136 pr_debug("Allocated pgtable cache for order %d\n", shift); 137 pr_debug("Allocated pgtable cache for order %d\n", shift);
137} 138}
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index b7285a5870f8..45fda71feb27 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -61,7 +61,6 @@
61#define CPU_FTR_NOEXECUTE 0 61#define CPU_FTR_NOEXECUTE 0
62#endif 62#endif
63 63
64int mem_init_done;
65unsigned long long memory_limit; 64unsigned long long memory_limit;
66 65
67#ifdef CONFIG_HIGHMEM 66#ifdef CONFIG_HIGHMEM
@@ -377,8 +376,6 @@ void __init mem_init(void)
377 pr_info(" * 0x%08lx..0x%08lx : vmalloc & ioremap\n", 376 pr_info(" * 0x%08lx..0x%08lx : vmalloc & ioremap\n",
378 VMALLOC_START, VMALLOC_END); 377 VMALLOC_START, VMALLOC_END);
379#endif /* CONFIG_PPC32 */ 378#endif /* CONFIG_PPC32 */
380
381 mem_init_done = 1;
382} 379}
383 380
384void free_initmem(void) 381void free_initmem(void)
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 78c45f392f5b..085b66b10891 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -96,7 +96,7 @@ extern void _tlbia(void);
96extern void mapin_ram(void); 96extern void mapin_ram(void);
97extern int map_page(unsigned long va, phys_addr_t pa, int flags); 97extern int map_page(unsigned long va, phys_addr_t pa, int flags);
98extern void setbat(int index, unsigned long virt, phys_addr_t phys, 98extern void setbat(int index, unsigned long virt, phys_addr_t phys,
99 unsigned int size, int flags); 99 unsigned int size, pgprot_t prot);
100 100
101extern int __map_without_bats; 101extern int __map_without_bats;
102extern int __allow_ioremap_reserved; 102extern int __allow_ioremap_reserved;
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 0257a7d659ef..5e80621d9324 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -958,6 +958,13 @@ void __init initmem_init(void)
958 958
959 memblock_dump_all(); 959 memblock_dump_all();
960 960
961 /*
962 * Reduce the possible NUMA nodes to the online NUMA nodes,
963 * since we do not support node hotplug. This ensures that we
964 * lower the maximum NUMA node ID to what is actually present.
965 */
966 nodes_and(node_possible_map, node_possible_map, node_online_map);
967
961 for_each_online_node(nid) { 968 for_each_online_node(nid) {
962 unsigned long start_pfn, end_pfn; 969 unsigned long start_pfn, end_pfn;
963 970
@@ -1177,6 +1184,9 @@ u64 memory_hotplug_max(void)
1177 1184
1178/* Virtual Processor Home Node (VPHN) support */ 1185/* Virtual Processor Home Node (VPHN) support */
1179#ifdef CONFIG_PPC_SPLPAR 1186#ifdef CONFIG_PPC_SPLPAR
1187
1188#include "vphn.h"
1189
1180struct topology_update_data { 1190struct topology_update_data {
1181 struct topology_update_data *next; 1191 struct topology_update_data *next;
1182 unsigned int cpu; 1192 unsigned int cpu;
@@ -1248,55 +1258,6 @@ static int update_cpu_associativity_changes_mask(void)
1248} 1258}
1249 1259
1250/* 1260/*
1251 * 6 64-bit registers unpacked into 12 32-bit associativity values. To form
1252 * the complete property we have to add the length in the first cell.
1253 */
1254#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32) + 1)
1255
1256/*
1257 * Convert the associativity domain numbers returned from the hypervisor
1258 * to the sequence they would appear in the ibm,associativity property.
1259 */
1260static int vphn_unpack_associativity(const long *packed, __be32 *unpacked)
1261{
1262 int i, nr_assoc_doms = 0;
1263 const __be16 *field = (const __be16 *) packed;
1264
1265#define VPHN_FIELD_UNUSED (0xffff)
1266#define VPHN_FIELD_MSB (0x8000)
1267#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB)
1268
1269 for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
1270 if (be16_to_cpup(field) == VPHN_FIELD_UNUSED) {
1271 /* All significant fields processed, and remaining
1272 * fields contain the reserved value of all 1's.
1273 * Just store them.
1274 */
1275 unpacked[i] = *((__be32 *)field);
1276 field += 2;
1277 } else if (be16_to_cpup(field) & VPHN_FIELD_MSB) {
1278 /* Data is in the lower 15 bits of this field */
1279 unpacked[i] = cpu_to_be32(
1280 be16_to_cpup(field) & VPHN_FIELD_MASK);
1281 field++;
1282 nr_assoc_doms++;
1283 } else {
1284 /* Data is in the lower 15 bits of this field
1285 * concatenated with the next 16 bit field
1286 */
1287 unpacked[i] = *((__be32 *)field);
1288 field += 2;
1289 nr_assoc_doms++;
1290 }
1291 }
1292
1293 /* The first cell contains the length of the property */
1294 unpacked[0] = cpu_to_be32(nr_assoc_doms);
1295
1296 return nr_assoc_doms;
1297}
1298
1299/*
1300 * Retrieve the new associativity information for a virtual processor's 1261 * Retrieve the new associativity information for a virtual processor's
1301 * home node. 1262 * home node.
1302 */ 1263 */
@@ -1306,11 +1267,8 @@ static long hcall_vphn(unsigned long cpu, __be32 *associativity)
1306 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0}; 1267 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
1307 u64 flags = 1; 1268 u64 flags = 1;
1308 int hwcpu = get_hard_smp_processor_id(cpu); 1269 int hwcpu = get_hard_smp_processor_id(cpu);
1309 int i;
1310 1270
1311 rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu); 1271 rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu);
1312 for (i = 0; i < 6; i++)
1313 retbuf[i] = cpu_to_be64(retbuf[i]);
1314 vphn_unpack_associativity(retbuf, associativity); 1272 vphn_unpack_associativity(retbuf, associativity);
1315 1273
1316 return rc; 1274 return rc;
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 03b1a3b0fbd5..7692d1bb1bc6 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -54,9 +54,6 @@ extern char etext[], _stext[];
54#ifdef HAVE_BATS 54#ifdef HAVE_BATS
55extern phys_addr_t v_mapped_by_bats(unsigned long va); 55extern phys_addr_t v_mapped_by_bats(unsigned long va);
56extern unsigned long p_mapped_by_bats(phys_addr_t pa); 56extern unsigned long p_mapped_by_bats(phys_addr_t pa);
57void setbat(int index, unsigned long virt, phys_addr_t phys,
58 unsigned int size, int flags);
59
60#else /* !HAVE_BATS */ 57#else /* !HAVE_BATS */
61#define v_mapped_by_bats(x) (0UL) 58#define v_mapped_by_bats(x) (0UL)
62#define p_mapped_by_bats(x) (0UL) 59#define p_mapped_by_bats(x) (0UL)
@@ -110,9 +107,8 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd)
110__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) 107__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
111{ 108{
112 pte_t *pte; 109 pte_t *pte;
113 extern int mem_init_done;
114 110
115 if (mem_init_done) { 111 if (slab_is_available()) {
116 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); 112 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
117 } else { 113 } else {
118 pte = __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE)); 114 pte = __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
@@ -192,7 +188,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
192 188
193 /* Make sure we have the base flags */ 189 /* Make sure we have the base flags */
194 if ((flags & _PAGE_PRESENT) == 0) 190 if ((flags & _PAGE_PRESENT) == 0)
195 flags |= PAGE_KERNEL; 191 flags |= pgprot_val(PAGE_KERNEL);
196 192
197 /* Non-cacheable page cannot be coherent */ 193 /* Non-cacheable page cannot be coherent */
198 if (flags & _PAGE_NO_CACHE) 194 if (flags & _PAGE_NO_CACHE)
@@ -219,9 +215,9 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
219 * Don't allow anybody to remap normal RAM that we're using. 215 * Don't allow anybody to remap normal RAM that we're using.
220 * mem_init() sets high_memory so only do the check after that. 216 * mem_init() sets high_memory so only do the check after that.
221 */ 217 */
222 if (mem_init_done && (p < virt_to_phys(high_memory)) && 218 if (slab_is_available() && (p < virt_to_phys(high_memory)) &&
223 !(__allow_ioremap_reserved && memblock_is_region_reserved(p, size))) { 219 !(__allow_ioremap_reserved && memblock_is_region_reserved(p, size))) {
224 printk("__ioremap(): phys addr 0x%llx is RAM lr %pf\n", 220 printk("__ioremap(): phys addr 0x%llx is RAM lr %ps\n",
225 (unsigned long long)p, __builtin_return_address(0)); 221 (unsigned long long)p, __builtin_return_address(0));
226 return NULL; 222 return NULL;
227 } 223 }
@@ -247,7 +243,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
247 if ((v = p_mapped_by_tlbcam(p))) 243 if ((v = p_mapped_by_tlbcam(p)))
248 goto out; 244 goto out;
249 245
250 if (mem_init_done) { 246 if (slab_is_available()) {
251 struct vm_struct *area; 247 struct vm_struct *area;
252 area = get_vm_area_caller(size, VM_IOREMAP, caller); 248 area = get_vm_area_caller(size, VM_IOREMAP, caller);
253 if (area == 0) 249 if (area == 0)
@@ -266,7 +262,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
266 for (i = 0; i < size && err == 0; i += PAGE_SIZE) 262 for (i = 0; i < size && err == 0; i += PAGE_SIZE)
267 err = map_page(v+i, p+i, flags); 263 err = map_page(v+i, p+i, flags);
268 if (err) { 264 if (err) {
269 if (mem_init_done) 265 if (slab_is_available())
270 vunmap((void *)v); 266 vunmap((void *)v);
271 return NULL; 267 return NULL;
272 } 268 }
@@ -327,7 +323,7 @@ void __init __mapin_ram_chunk(unsigned long offset, unsigned long top)
327 p = memstart_addr + s; 323 p = memstart_addr + s;
328 for (; s < top; s += PAGE_SIZE) { 324 for (; s < top; s += PAGE_SIZE) {
329 ktext = ((char *) v >= _stext && (char *) v < etext); 325 ktext = ((char *) v >= _stext && (char *) v < etext);
330 f = ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL; 326 f = ktext ? pgprot_val(PAGE_KERNEL_TEXT) : pgprot_val(PAGE_KERNEL);
331 map_page(v, p, f); 327 map_page(v, p, f);
332#ifdef CONFIG_PPC_STD_MMU_32 328#ifdef CONFIG_PPC_STD_MMU_32
333 if (ktext) 329 if (ktext)
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 6957cc1ca0a7..59daa5eeec25 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -231,7 +231,7 @@ void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
231 if ((size == 0) || (paligned == 0)) 231 if ((size == 0) || (paligned == 0))
232 return NULL; 232 return NULL;
233 233
234 if (mem_init_done) { 234 if (slab_is_available()) {
235 struct vm_struct *area; 235 struct vm_struct *area;
236 236
237 area = __get_vm_area_caller(size, VM_IOREMAP, 237 area = __get_vm_area_caller(size, VM_IOREMAP,
@@ -315,7 +315,7 @@ void __iounmap(volatile void __iomem *token)
315{ 315{
316 void *addr; 316 void *addr;
317 317
318 if (!mem_init_done) 318 if (!slab_is_available())
319 return; 319 return;
320 320
321 addr = (void *) ((unsigned long __force) 321 addr = (void *) ((unsigned long __force)
@@ -723,7 +723,7 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
723 assert_spin_locked(&mm->page_table_lock); 723 assert_spin_locked(&mm->page_table_lock);
724 WARN_ON(!pmd_trans_huge(pmd)); 724 WARN_ON(!pmd_trans_huge(pmd));
725#endif 725#endif
726 trace_hugepage_set_pmd(addr, pmd); 726 trace_hugepage_set_pmd(addr, pmd_val(pmd));
727 return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd)); 727 return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
728} 728}
729 729
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 5029dc19b517..6b2f3e457171 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -113,11 +113,12 @@ unsigned long __init mmu_mapin_ram(unsigned long top)
113 * of 2 between 128k and 256M. 113 * of 2 between 128k and 256M.
114 */ 114 */
115void __init setbat(int index, unsigned long virt, phys_addr_t phys, 115void __init setbat(int index, unsigned long virt, phys_addr_t phys,
116 unsigned int size, int flags) 116 unsigned int size, pgprot_t prot)
117{ 117{
118 unsigned int bl; 118 unsigned int bl;
119 int wimgxpp; 119 int wimgxpp;
120 struct ppc_bat *bat = BATS[index]; 120 struct ppc_bat *bat = BATS[index];
121 unsigned long flags = pgprot_val(prot);
121 122
122 if ((flags & _PAGE_NO_CACHE) || 123 if ((flags & _PAGE_NO_CACHE) ||
123 (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0)) 124 (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0))
@@ -224,7 +225,7 @@ void __init MMU_init_hw(void)
224 */ 225 */
225 if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322); 226 if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322);
226 Hash = __va(memblock_alloc(Hash_size, Hash_size)); 227 Hash = __va(memblock_alloc(Hash_size, Hash_size));
227 cacheable_memzero(Hash, Hash_size); 228 memset(Hash, 0, Hash_size);
228 _SDR1 = __pa(Hash) | SDR1_LOW_BITS; 229 _SDR1 = __pa(Hash) | SDR1_LOW_BITS;
229 230
230 Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size); 231 Hash_end = (struct hash_pte *) ((unsigned long)Hash + Hash_size);
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index d2a94b85dbc2..c522969f012d 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -216,7 +216,7 @@ void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
216 continue; 216 continue;
217 pte = pte_val(*ptep); 217 pte = pte_val(*ptep);
218 if (hugepage_shift) 218 if (hugepage_shift)
219 trace_hugepage_invalidate(start, pte_val(pte)); 219 trace_hugepage_invalidate(start, pte);
220 if (!(pte & _PAGE_HASHPTE)) 220 if (!(pte & _PAGE_HASHPTE))
221 continue; 221 continue;
222 if (unlikely(hugepage_shift && pmd_trans_huge(*(pmd_t *)pte))) 222 if (unlikely(hugepage_shift && pmd_trans_huge(*(pmd_t *)pte)))
diff --git a/arch/powerpc/mm/vphn.c b/arch/powerpc/mm/vphn.c
new file mode 100644
index 000000000000..5f8ef50e5c66
--- /dev/null
+++ b/arch/powerpc/mm/vphn.c
@@ -0,0 +1,70 @@
1#include <asm/byteorder.h>
2#include "vphn.h"
3
4/*
5 * The associativity domain numbers are returned from the hypervisor as a
6 * stream of mixed 16-bit and 32-bit fields. The stream is terminated by the
7 * special value of "all ones" (aka. 0xffff) and its size may not exceed 48
8 * bytes.
9 *
10 * --- 16-bit fields -->
11 * _________________________
12 * | 0 | 1 | 2 | 3 | be_packed[0]
13 * ------+-----+-----+------
14 * _________________________
15 * | 4 | 5 | 6 | 7 | be_packed[1]
16 * -------------------------
17 * ...
18 * _________________________
19 * | 20 | 21 | 22 | 23 | be_packed[5]
20 * -------------------------
21 *
22 * Convert to the sequence they would appear in the ibm,associativity property.
23 */
24int vphn_unpack_associativity(const long *packed, __be32 *unpacked)
25{
26 __be64 be_packed[VPHN_REGISTER_COUNT];
27 int i, nr_assoc_doms = 0;
28 const __be16 *field = (const __be16 *) be_packed;
29 u16 last = 0;
30 bool is_32bit = false;
31
32#define VPHN_FIELD_UNUSED (0xffff)
33#define VPHN_FIELD_MSB (0x8000)
34#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB)
35
36 /* Let's fix the values returned by plpar_hcall9() */
37 for (i = 0; i < VPHN_REGISTER_COUNT; i++)
38 be_packed[i] = cpu_to_be64(packed[i]);
39
40 for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
41 u16 new = be16_to_cpup(field++);
42
43 if (is_32bit) {
44 /* Let's concatenate the 16 bits of this field to the
45 * 15 lower bits of the previous field
46 */
47 unpacked[++nr_assoc_doms] =
48 cpu_to_be32(last << 16 | new);
49 is_32bit = false;
50 } else if (new == VPHN_FIELD_UNUSED)
51 /* This is the list terminator */
52 break;
53 else if (new & VPHN_FIELD_MSB) {
54 /* Data is in the lower 15 bits of this field */
55 unpacked[++nr_assoc_doms] =
56 cpu_to_be32(new & VPHN_FIELD_MASK);
57 } else {
58 /* Data is in the lower 15 bits of this field
59 * concatenated with the next 16 bit field
60 */
61 last = new;
62 is_32bit = true;
63 }
64 }
65
66 /* The first cell contains the length of the property */
67 unpacked[0] = cpu_to_be32(nr_assoc_doms);
68
69 return nr_assoc_doms;
70}
diff --git a/arch/powerpc/mm/vphn.h b/arch/powerpc/mm/vphn.h
new file mode 100644
index 000000000000..fe8b7805b78f
--- /dev/null
+++ b/arch/powerpc/mm/vphn.h
@@ -0,0 +1,16 @@
1#ifndef _ARCH_POWERPC_MM_VPHN_H_
2#define _ARCH_POWERPC_MM_VPHN_H_
3
4/* The H_HOME_NODE_ASSOCIATIVITY h_call returns 6 64-bit registers.
5 */
6#define VPHN_REGISTER_COUNT 6
7
8/*
9 * 6 64-bit registers unpacked into up to 24 be32 associativity values. To
10 * form the complete property we have to add the length in the first cell.
11 */
12#define VPHN_ASSOC_BUFSIZE (VPHN_REGISTER_COUNT*sizeof(u64)/sizeof(u16) + 1)
13
14extern int vphn_unpack_associativity(const long *packed, __be32 *unpacked);
15
16#endif
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 7c4f6690533a..b101c0b6dacc 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1832,8 +1832,10 @@ static int power_pmu_event_init(struct perf_event *event)
1832 cpuhw->bhrb_filter = ppmu->bhrb_filter_map( 1832 cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
1833 event->attr.branch_sample_type); 1833 event->attr.branch_sample_type);
1834 1834
1835 if(cpuhw->bhrb_filter == -1) 1835 if (cpuhw->bhrb_filter == -1) {
1836 put_cpu_var(cpu_hw_events);
1836 return -EOPNOTSUPP; 1837 return -EOPNOTSUPP;
1838 }
1837 } 1839 }
1838 1840
1839 put_cpu_var(cpu_hw_events); 1841 put_cpu_var(cpu_hw_events);
diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c
index 9445a824819e..ead8878ca62b 100644
--- a/arch/powerpc/perf/hv-24x7.c
+++ b/arch/powerpc/perf/hv-24x7.c
@@ -142,6 +142,15 @@ static struct attribute_group event_long_desc_group = {
142 142
143static struct kmem_cache *hv_page_cache; 143static struct kmem_cache *hv_page_cache;
144 144
145/*
146 * request_buffer and result_buffer are not required to be 4k aligned,
147 * but are not allowed to cross any 4k boundary. Aligning them to 4k is
148 * the simplest way to ensure that.
149 */
150#define H24x7_DATA_BUFFER_SIZE 4096
151DEFINE_PER_CPU(char, hv_24x7_reqb[H24x7_DATA_BUFFER_SIZE]) __aligned(4096);
152DEFINE_PER_CPU(char, hv_24x7_resb[H24x7_DATA_BUFFER_SIZE]) __aligned(4096);
153
145static char *event_name(struct hv_24x7_event_data *ev, int *len) 154static char *event_name(struct hv_24x7_event_data *ev, int *len)
146{ 155{
147 *len = be16_to_cpu(ev->event_name_len) - 2; 156 *len = be16_to_cpu(ev->event_name_len) - 2;
@@ -152,6 +161,7 @@ static char *event_desc(struct hv_24x7_event_data *ev, int *len)
152{ 161{
153 unsigned nl = be16_to_cpu(ev->event_name_len); 162 unsigned nl = be16_to_cpu(ev->event_name_len);
154 __be16 *desc_len = (__be16 *)(ev->remainder + nl - 2); 163 __be16 *desc_len = (__be16 *)(ev->remainder + nl - 2);
164
155 *len = be16_to_cpu(*desc_len) - 2; 165 *len = be16_to_cpu(*desc_len) - 2;
156 return (char *)ev->remainder + nl; 166 return (char *)ev->remainder + nl;
157} 167}
@@ -162,6 +172,7 @@ static char *event_long_desc(struct hv_24x7_event_data *ev, int *len)
162 __be16 *desc_len_ = (__be16 *)(ev->remainder + nl - 2); 172 __be16 *desc_len_ = (__be16 *)(ev->remainder + nl - 2);
163 unsigned desc_len = be16_to_cpu(*desc_len_); 173 unsigned desc_len = be16_to_cpu(*desc_len_);
164 __be16 *long_desc_len = (__be16 *)(ev->remainder + nl + desc_len - 2); 174 __be16 *long_desc_len = (__be16 *)(ev->remainder + nl + desc_len - 2);
175
165 *len = be16_to_cpu(*long_desc_len) - 2; 176 *len = be16_to_cpu(*long_desc_len) - 2;
166 return (char *)ev->remainder + nl + desc_len; 177 return (char *)ev->remainder + nl + desc_len;
167} 178}
@@ -239,14 +250,12 @@ static unsigned long h_get_24x7_catalog_page_(unsigned long phys_4096,
239 unsigned long index) 250 unsigned long index)
240{ 251{
241 pr_devel("h_get_24x7_catalog_page(0x%lx, %lu, %lu)", 252 pr_devel("h_get_24x7_catalog_page(0x%lx, %lu, %lu)",
242 phys_4096, 253 phys_4096, version, index);
243 version, 254
244 index);
245 WARN_ON(!IS_ALIGNED(phys_4096, 4096)); 255 WARN_ON(!IS_ALIGNED(phys_4096, 4096));
256
246 return plpar_hcall_norets(H_GET_24X7_CATALOG_PAGE, 257 return plpar_hcall_norets(H_GET_24X7_CATALOG_PAGE,
247 phys_4096, 258 phys_4096, version, index);
248 version,
249 index);
250} 259}
251 260
252static unsigned long h_get_24x7_catalog_page(char page[], 261static unsigned long h_get_24x7_catalog_page(char page[],
@@ -300,6 +309,7 @@ static ssize_t device_show_string(struct device *dev,
300 struct dev_ext_attribute *d; 309 struct dev_ext_attribute *d;
301 310
302 d = container_of(attr, struct dev_ext_attribute, attr); 311 d = container_of(attr, struct dev_ext_attribute, attr);
312
303 return sprintf(buf, "%s\n", (char *)d->var); 313 return sprintf(buf, "%s\n", (char *)d->var);
304} 314}
305 315
@@ -314,6 +324,7 @@ static struct attribute *device_str_attr_create_(char *name, char *str)
314 attr->attr.attr.name = name; 324 attr->attr.attr.name = name;
315 attr->attr.attr.mode = 0444; 325 attr->attr.attr.mode = 0444;
316 attr->attr.show = device_show_string; 326 attr->attr.show = device_show_string;
327
317 return &attr->attr.attr; 328 return &attr->attr.attr;
318} 329}
319 330
@@ -387,7 +398,6 @@ static struct attribute *event_to_attr(unsigned ix,
387 a_ev_name = kasprintf(GFP_KERNEL, "%.*s%s__%d", 398 a_ev_name = kasprintf(GFP_KERNEL, "%.*s%s__%d",
388 (int)event_name_len, ev_name, ev_suffix, nonce); 399 (int)event_name_len, ev_name, ev_suffix, nonce);
389 400
390
391 if (!a_ev_name) 401 if (!a_ev_name)
392 goto out_val; 402 goto out_val;
393 403
@@ -872,6 +882,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj,
872 uint64_t catalog_version_num = 0; 882 uint64_t catalog_version_num = 0;
873 void *page = kmem_cache_alloc(hv_page_cache, GFP_USER); 883 void *page = kmem_cache_alloc(hv_page_cache, GFP_USER);
874 struct hv_24x7_catalog_page_0 *page_0 = page; 884 struct hv_24x7_catalog_page_0 *page_0 = page;
885
875 if (!page) 886 if (!page)
876 return -ENOMEM; 887 return -ENOMEM;
877 888
@@ -976,31 +987,104 @@ static const struct attribute_group *attr_groups[] = {
976 NULL, 987 NULL,
977}; 988};
978 989
979DEFINE_PER_CPU(char, hv_24x7_reqb[4096]) __aligned(4096); 990static void log_24x7_hcall(struct hv_24x7_request_buffer *request_buffer,
980DEFINE_PER_CPU(char, hv_24x7_resb[4096]) __aligned(4096); 991 struct hv_24x7_data_result_buffer *result_buffer,
992 unsigned long ret)
993{
994 struct hv_24x7_request *req;
995
996 req = &request_buffer->requests[0];
997 pr_notice_ratelimited("hcall failed: [%d %#x %#x %d] => "
998 "ret 0x%lx (%ld) detail=0x%x failing ix=%x\n",
999 req->performance_domain, req->data_offset,
1000 req->starting_ix, req->starting_lpar_ix, ret, ret,
1001 result_buffer->detailed_rc,
1002 result_buffer->failing_request_ix);
1003}
1004
1005/*
1006 * Start the process for a new H_GET_24x7_DATA hcall.
1007 */
1008static void init_24x7_request(struct hv_24x7_request_buffer *request_buffer,
1009 struct hv_24x7_data_result_buffer *result_buffer)
1010{
1011
1012 memset(request_buffer, 0, 4096);
1013 memset(result_buffer, 0, 4096);
1014
1015 request_buffer->interface_version = HV_24X7_IF_VERSION_CURRENT;
1016 /* memset above set request_buffer->num_requests to 0 */
1017}
981 1018
982static unsigned long single_24x7_request(u8 domain, u32 offset, u16 ix, 1019/*
983 u16 lpar, u64 *res, 1020 * Commit (i.e perform) the H_GET_24x7_DATA hcall using the data collected
984 bool success_expected) 1021 * by 'init_24x7_request()' and 'add_event_to_24x7_request()'.
1022 */
1023static int make_24x7_request(struct hv_24x7_request_buffer *request_buffer,
1024 struct hv_24x7_data_result_buffer *result_buffer)
985{ 1025{
986 unsigned long ret; 1026 unsigned long ret;
987 1027
988 /* 1028 /*
989 * request_buffer and result_buffer are not required to be 4k aligned, 1029 * NOTE: Due to variable number of array elements in request and
990 * but are not allowed to cross any 4k boundary. Aligning them to 4k is 1030 * result buffer(s), sizeof() is not reliable. Use the actual
991 * the simplest way to ensure that. 1031 * allocated buffer size, H24x7_DATA_BUFFER_SIZE.
992 */ 1032 */
993 struct reqb { 1033 ret = plpar_hcall_norets(H_GET_24X7_DATA,
994 struct hv_24x7_request_buffer buf; 1034 virt_to_phys(request_buffer), H24x7_DATA_BUFFER_SIZE,
995 struct hv_24x7_request req; 1035 virt_to_phys(result_buffer), H24x7_DATA_BUFFER_SIZE);
996 } __packed *request_buffer; 1036
997 1037 if (ret)
998 struct { 1038 log_24x7_hcall(request_buffer, result_buffer, ret);
999 struct hv_24x7_data_result_buffer buf; 1039
1000 struct hv_24x7_result res; 1040 return ret;
1001 struct hv_24x7_result_element elem; 1041}
1002 __be64 result; 1042
1003 } __packed *result_buffer; 1043/*
1044 * Add the given @event to the next slot in the 24x7 request_buffer.
1045 *
1046 * Note that H_GET_24X7_DATA hcall allows reading several counters'
1047 * values in a single HCALL. We expect the caller to add events to the
1048 * request buffer one by one, make the HCALL and process the results.
1049 */
1050static int add_event_to_24x7_request(struct perf_event *event,
1051 struct hv_24x7_request_buffer *request_buffer)
1052{
1053 u16 idx;
1054 int i;
1055 struct hv_24x7_request *req;
1056
1057 if (request_buffer->num_requests > 254) {
1058 pr_devel("Too many requests for 24x7 HCALL %d\n",
1059 request_buffer->num_requests);
1060 return -EINVAL;
1061 }
1062
1063 if (is_physical_domain(event_get_domain(event)))
1064 idx = event_get_core(event);
1065 else
1066 idx = event_get_vcpu(event);
1067
1068 i = request_buffer->num_requests++;
1069 req = &request_buffer->requests[i];
1070
1071 req->performance_domain = event_get_domain(event);
1072 req->data_size = cpu_to_be16(8);
1073 req->data_offset = cpu_to_be32(event_get_offset(event));
1074 req->starting_lpar_ix = cpu_to_be16(event_get_lpar(event)),
1075 req->max_num_lpars = cpu_to_be16(1);
1076 req->starting_ix = cpu_to_be16(idx);
1077 req->max_ix = cpu_to_be16(1);
1078
1079 return 0;
1080}
1081
1082static unsigned long single_24x7_request(struct perf_event *event, u64 *count)
1083{
1084 unsigned long ret;
1085 struct hv_24x7_request_buffer *request_buffer;
1086 struct hv_24x7_data_result_buffer *result_buffer;
1087 struct hv_24x7_result *resb;
1004 1088
1005 BUILD_BUG_ON(sizeof(*request_buffer) > 4096); 1089 BUILD_BUG_ON(sizeof(*request_buffer) > 4096);
1006 BUILD_BUG_ON(sizeof(*result_buffer) > 4096); 1090 BUILD_BUG_ON(sizeof(*result_buffer) > 4096);
@@ -1008,63 +1092,28 @@ static unsigned long single_24x7_request(u8 domain, u32 offset, u16 ix,
1008 request_buffer = (void *)get_cpu_var(hv_24x7_reqb); 1092 request_buffer = (void *)get_cpu_var(hv_24x7_reqb);
1009 result_buffer = (void *)get_cpu_var(hv_24x7_resb); 1093 result_buffer = (void *)get_cpu_var(hv_24x7_resb);
1010 1094
1011 memset(request_buffer, 0, 4096); 1095 init_24x7_request(request_buffer, result_buffer);
1012 memset(result_buffer, 0, 4096);
1013 1096
1014 *request_buffer = (struct reqb) { 1097 ret = add_event_to_24x7_request(event, request_buffer);
1015 .buf = { 1098 if (ret)
1016 .interface_version = HV_24X7_IF_VERSION_CURRENT, 1099 goto out;
1017 .num_requests = 1,
1018 },
1019 .req = {
1020 .performance_domain = domain,
1021 .data_size = cpu_to_be16(8),
1022 .data_offset = cpu_to_be32(offset),
1023 .starting_lpar_ix = cpu_to_be16(lpar),
1024 .max_num_lpars = cpu_to_be16(1),
1025 .starting_ix = cpu_to_be16(ix),
1026 .max_ix = cpu_to_be16(1),
1027 }
1028 };
1029
1030 ret = plpar_hcall_norets(H_GET_24X7_DATA,
1031 virt_to_phys(request_buffer), sizeof(*request_buffer),
1032 virt_to_phys(result_buffer), sizeof(*result_buffer));
1033 1100
1101 ret = make_24x7_request(request_buffer, result_buffer);
1034 if (ret) { 1102 if (ret) {
1035 if (success_expected) 1103 log_24x7_hcall(request_buffer, result_buffer, ret);
1036 pr_err_ratelimited("hcall failed: %d %#x %#x %d => "
1037 "0x%lx (%ld) detail=0x%x failing ix=%x\n",
1038 domain, offset, ix, lpar, ret, ret,
1039 result_buffer->buf.detailed_rc,
1040 result_buffer->buf.failing_request_ix);
1041 goto out; 1104 goto out;
1042 } 1105 }
1043 1106
1044 *res = be64_to_cpu(result_buffer->result); 1107 /* process result from hcall */
1108 resb = &result_buffer->results[0];
1109 *count = be64_to_cpu(resb->elements[0].element_data[0]);
1045 1110
1046out: 1111out:
1112 put_cpu_var(hv_24x7_reqb);
1113 put_cpu_var(hv_24x7_resb);
1047 return ret; 1114 return ret;
1048} 1115}
1049 1116
1050static unsigned long event_24x7_request(struct perf_event *event, u64 *res,
1051 bool success_expected)
1052{
1053 u16 idx;
1054 unsigned domain = event_get_domain(event);
1055
1056 if (is_physical_domain(domain))
1057 idx = event_get_core(event);
1058 else
1059 idx = event_get_vcpu(event);
1060
1061 return single_24x7_request(event_get_domain(event),
1062 event_get_offset(event),
1063 idx,
1064 event_get_lpar(event),
1065 res,
1066 success_expected);
1067}
1068 1117
1069static int h_24x7_event_init(struct perf_event *event) 1118static int h_24x7_event_init(struct perf_event *event)
1070{ 1119{
@@ -1133,7 +1182,7 @@ static int h_24x7_event_init(struct perf_event *event)
1133 } 1182 }
1134 1183
1135 /* see if the event complains */ 1184 /* see if the event complains */
1136 if (event_24x7_request(event, &ct, false)) { 1185 if (single_24x7_request(event, &ct)) {
1137 pr_devel("test hcall failed\n"); 1186 pr_devel("test hcall failed\n");
1138 return -EIO; 1187 return -EIO;
1139 } 1188 }
@@ -1145,7 +1194,7 @@ static u64 h_24x7_get_value(struct perf_event *event)
1145{ 1194{
1146 unsigned long ret; 1195 unsigned long ret;
1147 u64 ct; 1196 u64 ct;
1148 ret = event_24x7_request(event, &ct, true); 1197 ret = single_24x7_request(event, &ct);
1149 if (ret) 1198 if (ret)
1150 /* We checked this in event init, shouldn't fail here... */ 1199 /* We checked this in event init, shouldn't fail here... */
1151 return 0; 1200 return 0;
@@ -1153,15 +1202,22 @@ static u64 h_24x7_get_value(struct perf_event *event)
1153 return ct; 1202 return ct;
1154} 1203}
1155 1204
1156static void h_24x7_event_update(struct perf_event *event) 1205static void update_event_count(struct perf_event *event, u64 now)
1157{ 1206{
1158 s64 prev; 1207 s64 prev;
1159 u64 now; 1208
1160 now = h_24x7_get_value(event);
1161 prev = local64_xchg(&event->hw.prev_count, now); 1209 prev = local64_xchg(&event->hw.prev_count, now);
1162 local64_add(now - prev, &event->count); 1210 local64_add(now - prev, &event->count);
1163} 1211}
1164 1212
1213static void h_24x7_event_read(struct perf_event *event)
1214{
1215 u64 now;
1216
1217 now = h_24x7_get_value(event);
1218 update_event_count(event, now);
1219}
1220
1165static void h_24x7_event_start(struct perf_event *event, int flags) 1221static void h_24x7_event_start(struct perf_event *event, int flags)
1166{ 1222{
1167 if (flags & PERF_EF_RELOAD) 1223 if (flags & PERF_EF_RELOAD)
@@ -1170,7 +1226,7 @@ static void h_24x7_event_start(struct perf_event *event, int flags)
1170 1226
1171static void h_24x7_event_stop(struct perf_event *event, int flags) 1227static void h_24x7_event_stop(struct perf_event *event, int flags)
1172{ 1228{
1173 h_24x7_event_update(event); 1229 h_24x7_event_read(event);
1174} 1230}
1175 1231
1176static int h_24x7_event_add(struct perf_event *event, int flags) 1232static int h_24x7_event_add(struct perf_event *event, int flags)
@@ -1191,7 +1247,7 @@ static struct pmu h_24x7_pmu = {
1191 .del = h_24x7_event_stop, 1247 .del = h_24x7_event_stop,
1192 .start = h_24x7_event_start, 1248 .start = h_24x7_event_start,
1193 .stop = h_24x7_event_stop, 1249 .stop = h_24x7_event_stop,
1194 .read = h_24x7_event_update, 1250 .read = h_24x7_event_read,
1195}; 1251};
1196 1252
1197static int hv_24x7_init(void) 1253static int hv_24x7_init(void)
diff --git a/arch/powerpc/perf/hv-24x7.h b/arch/powerpc/perf/hv-24x7.h
index 69cd4e690f58..0f9fa21a29f2 100644
--- a/arch/powerpc/perf/hv-24x7.h
+++ b/arch/powerpc/perf/hv-24x7.h
@@ -50,7 +50,7 @@ struct hv_24x7_request_buffer {
50 __u8 interface_version; 50 __u8 interface_version;
51 __u8 num_requests; 51 __u8 num_requests;
52 __u8 reserved[0xE]; 52 __u8 reserved[0xE];
53 struct hv_24x7_request requests[]; 53 struct hv_24x7_request requests[1];
54} __packed; 54} __packed;
55 55
56struct hv_24x7_result_element { 56struct hv_24x7_result_element {
@@ -66,7 +66,7 @@ struct hv_24x7_result_element {
66 __be32 lpar_cfg_instance_id; 66 __be32 lpar_cfg_instance_id;
67 67
68 /* size = @result_element_data_size of cointaining result. */ 68 /* size = @result_element_data_size of cointaining result. */
69 __u8 element_data[]; 69 __u64 element_data[1];
70} __packed; 70} __packed;
71 71
72struct hv_24x7_result { 72struct hv_24x7_result {
@@ -87,7 +87,7 @@ struct hv_24x7_result {
87 /* WARNING: only valid for first result element due to variable sizes 87 /* WARNING: only valid for first result element due to variable sizes
88 * of result elements */ 88 * of result elements */
89 /* struct hv_24x7_result_element[@num_elements_returned] */ 89 /* struct hv_24x7_result_element[@num_elements_returned] */
90 struct hv_24x7_result_element elements[]; 90 struct hv_24x7_result_element elements[1];
91} __packed; 91} __packed;
92 92
93struct hv_24x7_data_result_buffer { 93struct hv_24x7_data_result_buffer {
@@ -103,7 +103,7 @@ struct hv_24x7_data_result_buffer {
103 __u8 reserved2[0x8]; 103 __u8 reserved2[0x8];
104 /* WARNING: only valid for the first result due to variable sizes of 104 /* WARNING: only valid for the first result due to variable sizes of
105 * results */ 105 * results */
106 struct hv_24x7_result results[]; /* [@num_results] */ 106 struct hv_24x7_result results[1]; /* [@num_results] */
107} __packed; 107} __packed;
108 108
109#endif 109#endif
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index 4a9ad871a168..7bfb9b184dd4 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -40,6 +40,7 @@ static const struct of_device_id mpc85xx_common_ids[] __initconst = {
40 { .compatible = "fsl,qoriq-pcie-v2.4", }, 40 { .compatible = "fsl,qoriq-pcie-v2.4", },
41 { .compatible = "fsl,qoriq-pcie-v2.3", }, 41 { .compatible = "fsl,qoriq-pcie-v2.3", },
42 { .compatible = "fsl,qoriq-pcie-v2.2", }, 42 { .compatible = "fsl,qoriq-pcie-v2.2", },
43 { .compatible = "fsl,fman", },
43 {}, 44 {},
44}; 45};
45 46
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 1f309ccb096e..9824d2cf79bd 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -88,6 +88,15 @@ static const struct of_device_id of_device_ids[] = {
88 .compatible = "simple-bus" 88 .compatible = "simple-bus"
89 }, 89 },
90 { 90 {
91 .compatible = "mdio-mux-gpio"
92 },
93 {
94 .compatible = "fsl,fpga-ngpixis"
95 },
96 {
97 .compatible = "fsl,fpga-qixis"
98 },
99 {
91 .compatible = "fsl,srio", 100 .compatible = "fsl,srio",
92 }, 101 },
93 { 102 {
@@ -108,6 +117,9 @@ static const struct of_device_id of_device_ids[] = {
108 { 117 {
109 .compatible = "fsl,qe", 118 .compatible = "fsl,qe",
110 }, 119 },
120 {
121 .compatible = "fsl,fman",
122 },
111 /* The following two are for the Freescale hypervisor */ 123 /* The following two are for the Freescale hypervisor */
112 { 124 {
113 .name = "hypervisor", 125 .name = "hypervisor",
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index d7c1e69f3070..8631ac5f0e57 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -360,10 +360,10 @@ static void mpc85xx_smp_kexec_down(void *arg)
360static void map_and_flush(unsigned long paddr) 360static void map_and_flush(unsigned long paddr)
361{ 361{
362 struct page *page = pfn_to_page(paddr >> PAGE_SHIFT); 362 struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
363 unsigned long kaddr = (unsigned long)kmap(page); 363 unsigned long kaddr = (unsigned long)kmap_atomic(page);
364 364
365 flush_dcache_range(kaddr, kaddr + PAGE_SIZE); 365 flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
366 kunmap(page); 366 kunmap_atomic((void *)kaddr);
367} 367}
368 368
369/** 369/**
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 391b3f6b54a3..b7f9c408bf24 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -72,11 +72,6 @@ config PPC_SMP_MUXED_IPI
72 cpu. This will enable the generic code to multiplex the 4 72 cpu. This will enable the generic code to multiplex the 4
73 messages on to one ipi. 73 messages on to one ipi.
74 74
75config PPC_UDBG_BEAT
76 bool "BEAT based debug console"
77 depends on PPC_CELLEB
78 default n
79
80config IPIC 75config IPIC
81 bool 76 bool
82 default n 77 default n
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 76483e3acd60..7264e91190be 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -2,6 +2,7 @@ config PPC64
2 bool "64-bit kernel" 2 bool "64-bit kernel"
3 default n 3 default n
4 select HAVE_VIRT_CPU_ACCOUNTING 4 select HAVE_VIRT_CPU_ACCOUNTING
5 select ZLIB_DEFLATE
5 help 6 help
6 This option selects whether a 32-bit or a 64-bit kernel 7 This option selects whether a 32-bit or a 64-bit kernel
7 will be built. 8 will be built.
@@ -15,7 +16,7 @@ choice
15 The most common ones are the desktop and server CPUs (601, 603, 16 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their 17 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
17 embedded 512x/52xx/82xx/83xx/86xx counterparts. 18 embedded 512x/52xx/82xx/83xx/86xx counterparts.
18 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 19 The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible 20 (85xx) each form a family of their own that is not compatible
20 with the others. 21 with the others.
21 22
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 870b6dbd4d18..2f23133ab3d1 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -33,17 +33,6 @@ config PPC_IBM_CELL_BLADE
33 select PPC_UDBG_16550 33 select PPC_UDBG_16550
34 select UDBG_RTAS_CONSOLE 34 select UDBG_RTAS_CONSOLE
35 35
36config PPC_CELLEB
37 bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
38 depends on PPC64 && PPC_BOOK3S
39 select PPC_CELL_NATIVE
40 select PPC_OF_PLATFORM_PCI
41 select PCI
42 select HAS_TXX9_SERIAL
43 select PPC_UDBG_BEAT
44 select USB_OHCI_BIG_ENDIAN_MMIO
45 select USB_EHCI_BIG_ENDIAN_MMIO
46
47config PPC_CELL_QPACE 36config PPC_CELL_QPACE
48 bool "IBM Cell - QPACE" 37 bool "IBM Cell - QPACE"
49 depends on PPC64 && PPC_BOOK3S 38 depends on PPC64 && PPC_BOOK3S
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 2d16884f67b9..34699bddfddd 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -29,18 +29,3 @@ obj-$(CONFIG_AXON_MSI) += axon_msi.o
29 29
30# qpace setup 30# qpace setup
31obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o 31obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o
32
33# celleb stuff
34ifeq ($(CONFIG_PPC_CELLEB),y)
35obj-y += celleb_setup.o \
36 celleb_pci.o celleb_scc_epci.o \
37 celleb_scc_pciex.o \
38 celleb_scc_uhc.o \
39 spider-pci.o beat.o beat_htab.o \
40 beat_hvCall.o beat_interrupt.o \
41 beat_iommu.o
42
43obj-$(CONFIG_PPC_UDBG_BEAT) += beat_udbg.o
44obj-$(CONFIG_SERIAL_TXX9) += celleb_scc_sio.o
45obj-$(CONFIG_SPU_BASE) += beat_spu_priv1.o
46endif
diff --git a/arch/powerpc/platforms/cell/beat.c b/arch/powerpc/platforms/cell/beat.c
deleted file mode 100644
index affcf566d460..000000000000
--- a/arch/powerpc/platforms/cell/beat.c
+++ /dev/null
@@ -1,264 +0,0 @@
1/*
2 * Simple routines for Celleb/Beat
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/export.h>
22#include <linux/init.h>
23#include <linux/err.h>
24#include <linux/rtc.h>
25#include <linux/interrupt.h>
26#include <linux/irqreturn.h>
27#include <linux/reboot.h>
28
29#include <asm/hvconsole.h>
30#include <asm/time.h>
31#include <asm/machdep.h>
32#include <asm/firmware.h>
33
34#include "beat_wrapper.h"
35#include "beat.h"
36#include "beat_interrupt.h"
37
38static int beat_pm_poweroff_flag;
39
40void beat_restart(char *cmd)
41{
42 beat_shutdown_logical_partition(!beat_pm_poweroff_flag);
43}
44
45void beat_power_off(void)
46{
47 beat_shutdown_logical_partition(0);
48}
49
50u64 beat_halt_code = 0x1000000000000000UL;
51EXPORT_SYMBOL(beat_halt_code);
52
53void beat_halt(void)
54{
55 beat_shutdown_logical_partition(beat_halt_code);
56}
57
58int beat_set_rtc_time(struct rtc_time *rtc_time)
59{
60 u64 tim;
61 tim = mktime(rtc_time->tm_year+1900,
62 rtc_time->tm_mon+1, rtc_time->tm_mday,
63 rtc_time->tm_hour, rtc_time->tm_min, rtc_time->tm_sec);
64 if (beat_rtc_write(tim))
65 return -1;
66 return 0;
67}
68
69void beat_get_rtc_time(struct rtc_time *rtc_time)
70{
71 u64 tim;
72
73 if (beat_rtc_read(&tim))
74 tim = 0;
75 to_tm(tim, rtc_time);
76 rtc_time->tm_year -= 1900;
77 rtc_time->tm_mon -= 1;
78}
79
80#define BEAT_NVRAM_SIZE 4096
81
82ssize_t beat_nvram_read(char *buf, size_t count, loff_t *index)
83{
84 unsigned int i;
85 unsigned long len;
86 char *p = buf;
87
88 if (*index >= BEAT_NVRAM_SIZE)
89 return -ENODEV;
90 i = *index;
91 if (i + count > BEAT_NVRAM_SIZE)
92 count = BEAT_NVRAM_SIZE - i;
93
94 for (; count != 0; count -= len) {
95 len = count;
96 if (len > BEAT_NVRW_CNT)
97 len = BEAT_NVRW_CNT;
98 if (beat_eeprom_read(i, len, p))
99 return -EIO;
100
101 p += len;
102 i += len;
103 }
104 *index = i;
105 return p - buf;
106}
107
108ssize_t beat_nvram_write(char *buf, size_t count, loff_t *index)
109{
110 unsigned int i;
111 unsigned long len;
112 char *p = buf;
113
114 if (*index >= BEAT_NVRAM_SIZE)
115 return -ENODEV;
116 i = *index;
117 if (i + count > BEAT_NVRAM_SIZE)
118 count = BEAT_NVRAM_SIZE - i;
119
120 for (; count != 0; count -= len) {
121 len = count;
122 if (len > BEAT_NVRW_CNT)
123 len = BEAT_NVRW_CNT;
124 if (beat_eeprom_write(i, len, p))
125 return -EIO;
126
127 p += len;
128 i += len;
129 }
130 *index = i;
131 return p - buf;
132}
133
134ssize_t beat_nvram_get_size(void)
135{
136 return BEAT_NVRAM_SIZE;
137}
138
139int beat_set_xdabr(unsigned long dabr, unsigned long dabrx)
140{
141 if (beat_set_dabr(dabr, dabrx))
142 return -1;
143 return 0;
144}
145
146int64_t beat_get_term_char(u64 vterm, u64 *len, u64 *t1, u64 *t2)
147{
148 u64 db[2];
149 s64 ret;
150
151 ret = beat_get_characters_from_console(vterm, len, (u8 *)db);
152 if (ret == 0) {
153 *t1 = db[0];
154 *t2 = db[1];
155 }
156 return ret;
157}
158EXPORT_SYMBOL(beat_get_term_char);
159
160int64_t beat_put_term_char(u64 vterm, u64 len, u64 t1, u64 t2)
161{
162 u64 db[2];
163
164 db[0] = t1;
165 db[1] = t2;
166 return beat_put_characters_to_console(vterm, len, (u8 *)db);
167}
168EXPORT_SYMBOL(beat_put_term_char);
169
170void beat_power_save(void)
171{
172 beat_pause(0);
173}
174
175#ifdef CONFIG_KEXEC
176void beat_kexec_cpu_down(int crash, int secondary)
177{
178 beatic_deinit_IRQ();
179}
180#endif
181
182static irqreturn_t beat_power_event(int virq, void *arg)
183{
184 printk(KERN_DEBUG "Beat: power button pressed\n");
185 beat_pm_poweroff_flag = 1;
186 ctrl_alt_del();
187 return IRQ_HANDLED;
188}
189
190static irqreturn_t beat_reset_event(int virq, void *arg)
191{
192 printk(KERN_DEBUG "Beat: reset button pressed\n");
193 beat_pm_poweroff_flag = 0;
194 ctrl_alt_del();
195 return IRQ_HANDLED;
196}
197
198static struct beat_event_list {
199 const char *typecode;
200 irq_handler_t handler;
201 unsigned int virq;
202} beat_event_list[] = {
203 { "power", beat_power_event, 0 },
204 { "reset", beat_reset_event, 0 },
205};
206
207static int __init beat_register_event(void)
208{
209 u64 path[4], data[2];
210 int rc, i;
211 unsigned int virq;
212
213 for (i = 0; i < ARRAY_SIZE(beat_event_list); i++) {
214 struct beat_event_list *ev = &beat_event_list[i];
215
216 if (beat_construct_event_receive_port(data) != 0) {
217 printk(KERN_ERR "Beat: "
218 "cannot construct event receive port for %s\n",
219 ev->typecode);
220 return -EINVAL;
221 }
222
223 virq = irq_create_mapping(NULL, data[0]);
224 if (virq == NO_IRQ) {
225 printk(KERN_ERR "Beat: failed to get virtual IRQ"
226 " for event receive port for %s\n",
227 ev->typecode);
228 beat_destruct_event_receive_port(data[0]);
229 return -EIO;
230 }
231 ev->virq = virq;
232
233 rc = request_irq(virq, ev->handler, 0,
234 ev->typecode, NULL);
235 if (rc != 0) {
236 printk(KERN_ERR "Beat: failed to request virtual IRQ"
237 " for event receive port for %s\n",
238 ev->typecode);
239 beat_destruct_event_receive_port(data[0]);
240 return rc;
241 }
242
243 path[0] = 0x1000000065780000ul; /* 1,ex */
244 path[1] = 0x627574746f6e0000ul; /* button */
245 path[2] = 0;
246 strncpy((char *)&path[2], ev->typecode, 8);
247 path[3] = 0;
248 data[1] = 0;
249
250 beat_create_repository_node(path, data);
251 }
252 return 0;
253}
254
255static int __init beat_event_init(void)
256{
257 if (!firmware_has_feature(FW_FEATURE_BEAT))
258 return -EINVAL;
259
260 beat_pm_poweroff_flag = 0;
261 return beat_register_event();
262}
263
264device_initcall(beat_event_init);
diff --git a/arch/powerpc/platforms/cell/beat.h b/arch/powerpc/platforms/cell/beat.h
deleted file mode 100644
index bfcb8e351ae5..000000000000
--- a/arch/powerpc/platforms/cell/beat.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * Guest OS Interfaces.
3 *
4 * (C) Copyright 2006 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef _CELLEB_BEAT_H
22#define _CELLEB_BEAT_H
23
24int64_t beat_get_term_char(uint64_t, uint64_t *, uint64_t *, uint64_t *);
25int64_t beat_put_term_char(uint64_t, uint64_t, uint64_t, uint64_t);
26int64_t beat_repository_encode(int, const char *, uint64_t[4]);
27void beat_restart(char *);
28void beat_power_off(void);
29void beat_halt(void);
30int beat_set_rtc_time(struct rtc_time *);
31void beat_get_rtc_time(struct rtc_time *);
32ssize_t beat_nvram_get_size(void);
33ssize_t beat_nvram_read(char *, size_t, loff_t *);
34ssize_t beat_nvram_write(char *, size_t, loff_t *);
35int beat_set_xdabr(unsigned long, unsigned long);
36void beat_power_save(void);
37void beat_kexec_cpu_down(int, int);
38
39#endif /* _CELLEB_BEAT_H */
diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c
deleted file mode 100644
index bee9232fe619..000000000000
--- a/arch/powerpc/platforms/cell/beat_htab.c
+++ /dev/null
@@ -1,445 +0,0 @@
1/*
2 * "Cell Reference Set" HTAB support.
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/pseries/lpar.c:
7 * Copyright (C) 2001 Todd Inglett, IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 */
23
24#undef DEBUG_LOW
25
26#include <linux/kernel.h>
27#include <linux/spinlock.h>
28
29#include <asm/mmu.h>
30#include <asm/page.h>
31#include <asm/pgtable.h>
32#include <asm/machdep.h>
33#include <asm/udbg.h>
34
35#include "beat_wrapper.h"
36
37#ifdef DEBUG_LOW
38#define DBG_LOW(fmt...) do { udbg_printf(fmt); } while (0)
39#else
40#define DBG_LOW(fmt...) do { } while (0)
41#endif
42
43static DEFINE_RAW_SPINLOCK(beat_htab_lock);
44
45static inline unsigned int beat_read_mask(unsigned hpte_group)
46{
47 unsigned long rmask = 0;
48 u64 hpte_v[5];
49
50 beat_read_htab_entries(0, hpte_group + 0, hpte_v);
51 if (!(hpte_v[0] & HPTE_V_BOLTED))
52 rmask |= 0x8000;
53 if (!(hpte_v[1] & HPTE_V_BOLTED))
54 rmask |= 0x4000;
55 if (!(hpte_v[2] & HPTE_V_BOLTED))
56 rmask |= 0x2000;
57 if (!(hpte_v[3] & HPTE_V_BOLTED))
58 rmask |= 0x1000;
59 beat_read_htab_entries(0, hpte_group + 4, hpte_v);
60 if (!(hpte_v[0] & HPTE_V_BOLTED))
61 rmask |= 0x0800;
62 if (!(hpte_v[1] & HPTE_V_BOLTED))
63 rmask |= 0x0400;
64 if (!(hpte_v[2] & HPTE_V_BOLTED))
65 rmask |= 0x0200;
66 if (!(hpte_v[3] & HPTE_V_BOLTED))
67 rmask |= 0x0100;
68 hpte_group = ~hpte_group & (htab_hash_mask * HPTES_PER_GROUP);
69 beat_read_htab_entries(0, hpte_group + 0, hpte_v);
70 if (!(hpte_v[0] & HPTE_V_BOLTED))
71 rmask |= 0x80;
72 if (!(hpte_v[1] & HPTE_V_BOLTED))
73 rmask |= 0x40;
74 if (!(hpte_v[2] & HPTE_V_BOLTED))
75 rmask |= 0x20;
76 if (!(hpte_v[3] & HPTE_V_BOLTED))
77 rmask |= 0x10;
78 beat_read_htab_entries(0, hpte_group + 4, hpte_v);
79 if (!(hpte_v[0] & HPTE_V_BOLTED))
80 rmask |= 0x08;
81 if (!(hpte_v[1] & HPTE_V_BOLTED))
82 rmask |= 0x04;
83 if (!(hpte_v[2] & HPTE_V_BOLTED))
84 rmask |= 0x02;
85 if (!(hpte_v[3] & HPTE_V_BOLTED))
86 rmask |= 0x01;
87 return rmask;
88}
89
90static long beat_lpar_hpte_insert(unsigned long hpte_group,
91 unsigned long vpn, unsigned long pa,
92 unsigned long rflags, unsigned long vflags,
93 int psize, int apsize, int ssize)
94{
95 unsigned long lpar_rc;
96 u64 hpte_v, hpte_r, slot;
97
98 if (vflags & HPTE_V_SECONDARY)
99 return -1;
100
101 if (!(vflags & HPTE_V_BOLTED))
102 DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
103 "rflags=%lx, vflags=%lx, psize=%d)\n",
104 hpte_group, va, pa, rflags, vflags, psize);
105
106 hpte_v = hpte_encode_v(vpn, psize, apsize, MMU_SEGSIZE_256M) |
107 vflags | HPTE_V_VALID;
108 hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
109
110 if (!(vflags & HPTE_V_BOLTED))
111 DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
112
113 if (rflags & _PAGE_NO_CACHE)
114 hpte_r &= ~HPTE_R_M;
115
116 raw_spin_lock(&beat_htab_lock);
117 lpar_rc = beat_read_mask(hpte_group);
118 if (lpar_rc == 0) {
119 if (!(vflags & HPTE_V_BOLTED))
120 DBG_LOW(" full\n");
121 raw_spin_unlock(&beat_htab_lock);
122 return -1;
123 }
124
125 lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
126 hpte_v, hpte_r, &slot);
127 raw_spin_unlock(&beat_htab_lock);
128
129 /*
130 * Since we try and ioremap PHBs we don't own, the pte insert
131 * will fail. However we must catch the failure in hash_page
132 * or we will loop forever, so return -2 in this case.
133 */
134 if (unlikely(lpar_rc != 0)) {
135 if (!(vflags & HPTE_V_BOLTED))
136 DBG_LOW(" lpar err %lx\n", lpar_rc);
137 return -2;
138 }
139 if (!(vflags & HPTE_V_BOLTED))
140 DBG_LOW(" -> slot: %lx\n", slot);
141
142 /* We have to pass down the secondary bucket bit here as well */
143 return (slot ^ hpte_group) & 15;
144}
145
146static long beat_lpar_hpte_remove(unsigned long hpte_group)
147{
148 DBG_LOW("hpte_remove(group=%lx)\n", hpte_group);
149 return -1;
150}
151
152static unsigned long beat_lpar_hpte_getword0(unsigned long slot)
153{
154 unsigned long dword0;
155 unsigned long lpar_rc;
156 u64 dword[5];
157
158 lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword);
159
160 dword0 = dword[slot&3];
161
162 BUG_ON(lpar_rc != 0);
163
164 return dword0;
165}
166
167static void beat_lpar_hptab_clear(void)
168{
169 unsigned long size_bytes = 1UL << ppc64_pft_size;
170 unsigned long hpte_count = size_bytes >> 4;
171 int i;
172 u64 dummy0, dummy1;
173
174 /* TODO: Use bulk call */
175 for (i = 0; i < hpte_count; i++)
176 beat_write_htab_entry(0, i, 0, 0, -1UL, -1UL, &dummy0, &dummy1);
177}
178
179/*
180 * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
181 * the low 3 bits of flags happen to line up. So no transform is needed.
182 * We can probably optimize here and assume the high bits of newpp are
183 * already zero. For now I am paranoid.
184 */
185static long beat_lpar_hpte_updatepp(unsigned long slot,
186 unsigned long newpp,
187 unsigned long vpn,
188 int psize, int apsize,
189 int ssize, unsigned long flags)
190{
191 unsigned long lpar_rc;
192 u64 dummy0, dummy1;
193 unsigned long want_v;
194
195 want_v = hpte_encode_avpn(vpn, psize, MMU_SEGSIZE_256M);
196
197 DBG_LOW(" update: "
198 "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
199 want_v & HPTE_V_AVPN, slot, psize, newpp);
200
201 raw_spin_lock(&beat_htab_lock);
202 dummy0 = beat_lpar_hpte_getword0(slot);
203 if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
204 DBG_LOW("not found !\n");
205 raw_spin_unlock(&beat_htab_lock);
206 return -1;
207 }
208
209 lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
210 &dummy1);
211 raw_spin_unlock(&beat_htab_lock);
212 if (lpar_rc != 0 || dummy0 == 0) {
213 DBG_LOW("not found !\n");
214 return -1;
215 }
216
217 DBG_LOW("ok %lx %lx\n", dummy0, dummy1);
218
219 BUG_ON(lpar_rc != 0);
220
221 return 0;
222}
223
224static long beat_lpar_hpte_find(unsigned long vpn, int psize)
225{
226 unsigned long hash;
227 unsigned long i, j;
228 long slot;
229 unsigned long want_v, hpte_v;
230
231 hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, MMU_SEGSIZE_256M);
232 want_v = hpte_encode_avpn(vpn, psize, MMU_SEGSIZE_256M);
233
234 for (j = 0; j < 2; j++) {
235 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
236 for (i = 0; i < HPTES_PER_GROUP; i++) {
237 hpte_v = beat_lpar_hpte_getword0(slot);
238
239 if (HPTE_V_COMPARE(hpte_v, want_v)
240 && (hpte_v & HPTE_V_VALID)
241 && (!!(hpte_v & HPTE_V_SECONDARY) == j)) {
242 /* HPTE matches */
243 if (j)
244 slot = -slot;
245 return slot;
246 }
247 ++slot;
248 }
249 hash = ~hash;
250 }
251
252 return -1;
253}
254
255static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
256 unsigned long ea,
257 int psize, int ssize)
258{
259 unsigned long vpn;
260 unsigned long lpar_rc, slot, vsid;
261 u64 dummy0, dummy1;
262
263 vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
264 vpn = hpt_vpn(ea, vsid, MMU_SEGSIZE_256M);
265
266 raw_spin_lock(&beat_htab_lock);
267 slot = beat_lpar_hpte_find(vpn, psize);
268 BUG_ON(slot == -1);
269
270 lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
271 &dummy0, &dummy1);
272 raw_spin_unlock(&beat_htab_lock);
273
274 BUG_ON(lpar_rc != 0);
275}
276
277static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
278 int psize, int apsize,
279 int ssize, int local)
280{
281 unsigned long want_v;
282 unsigned long lpar_rc;
283 u64 dummy1, dummy2;
284 unsigned long flags;
285
286 DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
287 slot, va, psize, local);
288 want_v = hpte_encode_avpn(vpn, psize, MMU_SEGSIZE_256M);
289
290 raw_spin_lock_irqsave(&beat_htab_lock, flags);
291 dummy1 = beat_lpar_hpte_getword0(slot);
292
293 if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) {
294 DBG_LOW("not found !\n");
295 raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
296 return;
297 }
298
299 lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0,
300 &dummy1, &dummy2);
301 raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
302
303 BUG_ON(lpar_rc != 0);
304}
305
306void __init hpte_init_beat(void)
307{
308 ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
309 ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
310 ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
311 ppc_md.hpte_insert = beat_lpar_hpte_insert;
312 ppc_md.hpte_remove = beat_lpar_hpte_remove;
313 ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
314}
315
316static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
317 unsigned long vpn, unsigned long pa,
318 unsigned long rflags, unsigned long vflags,
319 int psize, int apsize, int ssize)
320{
321 unsigned long lpar_rc;
322 u64 hpte_v, hpte_r, slot;
323
324 if (vflags & HPTE_V_SECONDARY)
325 return -1;
326
327 if (!(vflags & HPTE_V_BOLTED))
328 DBG_LOW("hpte_insert(group=%lx, vpn=%016lx, pa=%016lx, "
329 "rflags=%lx, vflags=%lx, psize=%d)\n",
330 hpte_group, vpn, pa, rflags, vflags, psize);
331
332 hpte_v = hpte_encode_v(vpn, psize, apsize, MMU_SEGSIZE_256M) |
333 vflags | HPTE_V_VALID;
334 hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
335
336 if (!(vflags & HPTE_V_BOLTED))
337 DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
338
339 if (rflags & _PAGE_NO_CACHE)
340 hpte_r &= ~HPTE_R_M;
341
342 /* insert into not-volted entry */
343 lpar_rc = beat_insert_htab_entry3(0, hpte_group, hpte_v, hpte_r,
344 HPTE_V_BOLTED, 0, &slot);
345 /*
346 * Since we try and ioremap PHBs we don't own, the pte insert
347 * will fail. However we must catch the failure in hash_page
348 * or we will loop forever, so return -2 in this case.
349 */
350 if (unlikely(lpar_rc != 0)) {
351 if (!(vflags & HPTE_V_BOLTED))
352 DBG_LOW(" lpar err %lx\n", lpar_rc);
353 return -2;
354 }
355 if (!(vflags & HPTE_V_BOLTED))
356 DBG_LOW(" -> slot: %lx\n", slot);
357
358 /* We have to pass down the secondary bucket bit here as well */
359 return (slot ^ hpte_group) & 15;
360}
361
362/*
363 * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
364 * the low 3 bits of flags happen to line up. So no transform is needed.
365 * We can probably optimize here and assume the high bits of newpp are
366 * already zero. For now I am paranoid.
367 */
368static long beat_lpar_hpte_updatepp_v3(unsigned long slot,
369 unsigned long newpp,
370 unsigned long vpn,
371 int psize, int apsize,
372 int ssize, unsigned long flags)
373{
374 unsigned long lpar_rc;
375 unsigned long want_v;
376 unsigned long pss;
377
378 want_v = hpte_encode_avpn(vpn, psize, MMU_SEGSIZE_256M);
379 pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc[psize];
380
381 DBG_LOW(" update: "
382 "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
383 want_v & HPTE_V_AVPN, slot, psize, newpp);
384
385 lpar_rc = beat_update_htab_permission3(0, slot, want_v, pss, 7, newpp);
386
387 if (lpar_rc == 0xfffffff7) {
388 DBG_LOW("not found !\n");
389 return -1;
390 }
391
392 DBG_LOW("ok\n");
393
394 BUG_ON(lpar_rc != 0);
395
396 return 0;
397}
398
399static void beat_lpar_hpte_invalidate_v3(unsigned long slot, unsigned long vpn,
400 int psize, int apsize,
401 int ssize, int local)
402{
403 unsigned long want_v;
404 unsigned long lpar_rc;
405 unsigned long pss;
406
407 DBG_LOW(" inval : slot=%lx, vpn=%016lx, psize: %d, local: %d\n",
408 slot, vpn, psize, local);
409 want_v = hpte_encode_avpn(vpn, psize, MMU_SEGSIZE_256M);
410 pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc[psize];
411
412 lpar_rc = beat_invalidate_htab_entry3(0, slot, want_v, pss);
413
414 /* E_busy can be valid output: page may be already replaced */
415 BUG_ON(lpar_rc != 0 && lpar_rc != 0xfffffff7);
416}
417
418static int64_t _beat_lpar_hptab_clear_v3(void)
419{
420 return beat_clear_htab3(0);
421}
422
423static void beat_lpar_hptab_clear_v3(void)
424{
425 _beat_lpar_hptab_clear_v3();
426}
427
428void __init hpte_init_beat_v3(void)
429{
430 if (_beat_lpar_hptab_clear_v3() == 0) {
431 ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate_v3;
432 ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp_v3;
433 ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
434 ppc_md.hpte_insert = beat_lpar_hpte_insert_v3;
435 ppc_md.hpte_remove = beat_lpar_hpte_remove;
436 ppc_md.hpte_clear_all = beat_lpar_hptab_clear_v3;
437 } else {
438 ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
439 ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
440 ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
441 ppc_md.hpte_insert = beat_lpar_hpte_insert;
442 ppc_md.hpte_remove = beat_lpar_hpte_remove;
443 ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
444 }
445}
diff --git a/arch/powerpc/platforms/cell/beat_hvCall.S b/arch/powerpc/platforms/cell/beat_hvCall.S
deleted file mode 100644
index 96c801907126..000000000000
--- a/arch/powerpc/platforms/cell/beat_hvCall.S
+++ /dev/null
@@ -1,285 +0,0 @@
1/*
2 * Beat hypervisor call I/F
3 *
4 * (C) Copyright 2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/pseries/hvCall.S.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 */
22
23#include <asm/ppc_asm.h>
24
25/* Not implemented on Beat, now */
26#define HCALL_INST_PRECALL
27#define HCALL_INST_POSTCALL
28
29 .text
30
31#define HVSC .long 0x44000022
32
33/* Note: takes only 7 input parameters at maximum */
34_GLOBAL(beat_hcall_norets)
35 HMT_MEDIUM
36
37 mfcr r0
38 stw r0,8(r1)
39
40 HCALL_INST_PRECALL
41
42 mr r11,r3
43 mr r3,r4
44 mr r4,r5
45 mr r5,r6
46 mr r6,r7
47 mr r7,r8
48 mr r8,r9
49
50 HVSC /* invoke the hypervisor */
51
52 HCALL_INST_POSTCALL
53
54 lwz r0,8(r1)
55 mtcrf 0xff,r0
56
57 blr /* return r3 = status */
58
59/* Note: takes 8 input parameters at maximum */
60_GLOBAL(beat_hcall_norets8)
61 HMT_MEDIUM
62
63 mfcr r0
64 stw r0,8(r1)
65
66 HCALL_INST_PRECALL
67
68 mr r11,r3
69 mr r3,r4
70 mr r4,r5
71 mr r5,r6
72 mr r6,r7
73 mr r7,r8
74 mr r8,r9
75 ld r10,STK_PARAM(R10)(r1)
76
77 HVSC /* invoke the hypervisor */
78
79 HCALL_INST_POSTCALL
80
81 lwz r0,8(r1)
82 mtcrf 0xff,r0
83
84 blr /* return r3 = status */
85
86/* Note: takes only 6 input parameters, 1 output parameters at maximum */
87_GLOBAL(beat_hcall1)
88 HMT_MEDIUM
89
90 mfcr r0
91 stw r0,8(r1)
92
93 HCALL_INST_PRECALL
94
95 std r4,STK_PARAM(R4)(r1) /* save ret buffer */
96
97 mr r11,r3
98 mr r3,r5
99 mr r4,r6
100 mr r5,r7
101 mr r6,r8
102 mr r7,r9
103 mr r8,r10
104
105 HVSC /* invoke the hypervisor */
106
107 HCALL_INST_POSTCALL
108
109 ld r12,STK_PARAM(R4)(r1)
110 std r4, 0(r12)
111
112 lwz r0,8(r1)
113 mtcrf 0xff,r0
114
115 blr /* return r3 = status */
116
117/* Note: takes only 6 input parameters, 2 output parameters at maximum */
118_GLOBAL(beat_hcall2)
119 HMT_MEDIUM
120
121 mfcr r0
122 stw r0,8(r1)
123
124 HCALL_INST_PRECALL
125
126 std r4,STK_PARAM(R4)(r1) /* save ret buffer */
127
128 mr r11,r3
129 mr r3,r5
130 mr r4,r6
131 mr r5,r7
132 mr r6,r8
133 mr r7,r9
134 mr r8,r10
135
136 HVSC /* invoke the hypervisor */
137
138 HCALL_INST_POSTCALL
139
140 ld r12,STK_PARAM(R4)(r1)
141 std r4, 0(r12)
142 std r5, 8(r12)
143
144 lwz r0,8(r1)
145 mtcrf 0xff,r0
146
147 blr /* return r3 = status */
148
149/* Note: takes only 6 input parameters, 3 output parameters at maximum */
150_GLOBAL(beat_hcall3)
151 HMT_MEDIUM
152
153 mfcr r0
154 stw r0,8(r1)
155
156 HCALL_INST_PRECALL
157
158 std r4,STK_PARAM(R4)(r1) /* save ret buffer */
159
160 mr r11,r3
161 mr r3,r5
162 mr r4,r6
163 mr r5,r7
164 mr r6,r8
165 mr r7,r9
166 mr r8,r10
167
168 HVSC /* invoke the hypervisor */
169
170 HCALL_INST_POSTCALL
171
172 ld r12,STK_PARAM(R4)(r1)
173 std r4, 0(r12)
174 std r5, 8(r12)
175 std r6, 16(r12)
176
177 lwz r0,8(r1)
178 mtcrf 0xff,r0
179
180 blr /* return r3 = status */
181
182/* Note: takes only 6 input parameters, 4 output parameters at maximum */
183_GLOBAL(beat_hcall4)
184 HMT_MEDIUM
185
186 mfcr r0
187 stw r0,8(r1)
188
189 HCALL_INST_PRECALL
190
191 std r4,STK_PARAM(R4)(r1) /* save ret buffer */
192
193 mr r11,r3
194 mr r3,r5
195 mr r4,r6
196 mr r5,r7
197 mr r6,r8
198 mr r7,r9
199 mr r8,r10
200
201 HVSC /* invoke the hypervisor */
202
203 HCALL_INST_POSTCALL
204
205 ld r12,STK_PARAM(R4)(r1)
206 std r4, 0(r12)
207 std r5, 8(r12)
208 std r6, 16(r12)
209 std r7, 24(r12)
210
211 lwz r0,8(r1)
212 mtcrf 0xff,r0
213
214 blr /* return r3 = status */
215
216/* Note: takes only 6 input parameters, 5 output parameters at maximum */
217_GLOBAL(beat_hcall5)
218 HMT_MEDIUM
219
220 mfcr r0
221 stw r0,8(r1)
222
223 HCALL_INST_PRECALL
224
225 std r4,STK_PARAM(R4)(r1) /* save ret buffer */
226
227 mr r11,r3
228 mr r3,r5
229 mr r4,r6
230 mr r5,r7
231 mr r6,r8
232 mr r7,r9
233 mr r8,r10
234
235 HVSC /* invoke the hypervisor */
236
237 HCALL_INST_POSTCALL
238
239 ld r12,STK_PARAM(R4)(r1)
240 std r4, 0(r12)
241 std r5, 8(r12)
242 std r6, 16(r12)
243 std r7, 24(r12)
244 std r8, 32(r12)
245
246 lwz r0,8(r1)
247 mtcrf 0xff,r0
248
249 blr /* return r3 = status */
250
251/* Note: takes only 6 input parameters, 6 output parameters at maximum */
252_GLOBAL(beat_hcall6)
253 HMT_MEDIUM
254
255 mfcr r0
256 stw r0,8(r1)
257
258 HCALL_INST_PRECALL
259
260 std r4,STK_PARAM(R4)(r1) /* save ret buffer */
261
262 mr r11,r3
263 mr r3,r5
264 mr r4,r6
265 mr r5,r7
266 mr r6,r8
267 mr r7,r9
268 mr r8,r10
269
270 HVSC /* invoke the hypervisor */
271
272 HCALL_INST_POSTCALL
273
274 ld r12,STK_PARAM(R4)(r1)
275 std r4, 0(r12)
276 std r5, 8(r12)
277 std r6, 16(r12)
278 std r7, 24(r12)
279 std r8, 32(r12)
280 std r9, 40(r12)
281
282 lwz r0,8(r1)
283 mtcrf 0xff,r0
284
285 blr /* return r3 = status */
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
deleted file mode 100644
index 9e5dfbcc00af..000000000000
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ /dev/null
@@ -1,253 +0,0 @@
1/*
2 * Celleb/Beat Interrupt controller
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/percpu.h>
25#include <linux/types.h>
26
27#include <asm/machdep.h>
28
29#include "beat_interrupt.h"
30#include "beat_wrapper.h"
31
32#define MAX_IRQS NR_IRQS
33static DEFINE_RAW_SPINLOCK(beatic_irq_mask_lock);
34static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64];
35static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64];
36
37static struct irq_domain *beatic_host;
38
39/*
40 * In this implementation, "virq" == "IRQ plug number",
41 * "(irq_hw_number_t)hwirq" == "IRQ outlet number".
42 */
43
44/* assumption: locked */
45static inline void beatic_update_irq_mask(unsigned int irq_plug)
46{
47 int off;
48 unsigned long masks[4];
49
50 off = (irq_plug / 256) * 4;
51 masks[0] = beatic_irq_mask_enable[off + 0]
52 & beatic_irq_mask_ack[off + 0];
53 masks[1] = beatic_irq_mask_enable[off + 1]
54 & beatic_irq_mask_ack[off + 1];
55 masks[2] = beatic_irq_mask_enable[off + 2]
56 & beatic_irq_mask_ack[off + 2];
57 masks[3] = beatic_irq_mask_enable[off + 3]
58 & beatic_irq_mask_ack[off + 3];
59 if (beat_set_interrupt_mask(irq_plug&~255UL,
60 masks[0], masks[1], masks[2], masks[3]) != 0)
61 panic("Failed to set mask IRQ!");
62}
63
64static void beatic_mask_irq(struct irq_data *d)
65{
66 unsigned long flags;
67
68 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
69 beatic_irq_mask_enable[d->irq/64] &= ~(1UL << (63 - (d->irq%64)));
70 beatic_update_irq_mask(d->irq);
71 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
72}
73
74static void beatic_unmask_irq(struct irq_data *d)
75{
76 unsigned long flags;
77
78 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
79 beatic_irq_mask_enable[d->irq/64] |= 1UL << (63 - (d->irq%64));
80 beatic_update_irq_mask(d->irq);
81 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
82}
83
84static void beatic_ack_irq(struct irq_data *d)
85{
86 unsigned long flags;
87
88 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
89 beatic_irq_mask_ack[d->irq/64] &= ~(1UL << (63 - (d->irq%64)));
90 beatic_update_irq_mask(d->irq);
91 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
92}
93
94static void beatic_end_irq(struct irq_data *d)
95{
96 s64 err;
97 unsigned long flags;
98
99 err = beat_downcount_of_interrupt(d->irq);
100 if (err != 0) {
101 if ((err & 0xFFFFFFFF) != 0xFFFFFFF5) /* -11: wrong state */
102 panic("Failed to downcount IRQ! Error = %16llx", err);
103
104 printk(KERN_ERR "IRQ over-downcounted, plug %d\n", d->irq);
105 }
106 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
107 beatic_irq_mask_ack[d->irq/64] |= 1UL << (63 - (d->irq%64));
108 beatic_update_irq_mask(d->irq);
109 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
110}
111
112static struct irq_chip beatic_pic = {
113 .name = "CELL-BEAT",
114 .irq_unmask = beatic_unmask_irq,
115 .irq_mask = beatic_mask_irq,
116 .irq_eoi = beatic_end_irq,
117};
118
119/*
120 * Dispose binding hardware IRQ number (hw) and Virtuql IRQ number (virq),
121 * update flags.
122 *
123 * Note that the number (virq) is already assigned at upper layer.
124 */
125static void beatic_pic_host_unmap(struct irq_domain *h, unsigned int virq)
126{
127 beat_destruct_irq_plug(virq);
128}
129
130/*
131 * Create or update binding hardware IRQ number (hw) and Virtuql
132 * IRQ number (virq). This is called only once for a given mapping.
133 *
134 * Note that the number (virq) is already assigned at upper layer.
135 */
136static int beatic_pic_host_map(struct irq_domain *h, unsigned int virq,
137 irq_hw_number_t hw)
138{
139 int64_t err;
140
141 err = beat_construct_and_connect_irq_plug(virq, hw);
142 if (err < 0)
143 return -EIO;
144
145 irq_set_status_flags(virq, IRQ_LEVEL);
146 irq_set_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
147 return 0;
148}
149
150/*
151 * Translate device-tree interrupt spec to irq_hw_number_t style (ulong),
152 * to pass away to irq_create_mapping().
153 *
154 * Called from irq_create_of_mapping() only.
155 * Note: We have only 1 entry to translate.
156 */
157static int beatic_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
158 const u32 *intspec, unsigned int intsize,
159 irq_hw_number_t *out_hwirq,
160 unsigned int *out_flags)
161{
162 const u64 *intspec2 = (const u64 *)intspec;
163
164 *out_hwirq = *intspec2;
165 *out_flags |= IRQ_TYPE_LEVEL_LOW;
166 return 0;
167}
168
169static int beatic_pic_host_match(struct irq_domain *h, struct device_node *np)
170{
171 /* Match all */
172 return 1;
173}
174
175static const struct irq_domain_ops beatic_pic_host_ops = {
176 .map = beatic_pic_host_map,
177 .unmap = beatic_pic_host_unmap,
178 .xlate = beatic_pic_host_xlate,
179 .match = beatic_pic_host_match,
180};
181
182/*
183 * Get an IRQ number
184 * Note: returns VIRQ
185 */
186static inline unsigned int beatic_get_irq_plug(void)
187{
188 int i;
189 uint64_t pending[4], ub;
190
191 for (i = 0; i < MAX_IRQS; i += 256) {
192 beat_detect_pending_interrupts(i, pending);
193 __asm__ ("cntlzd %0,%1":"=r"(ub):
194 "r"(pending[0] & beatic_irq_mask_enable[i/64+0]
195 & beatic_irq_mask_ack[i/64+0]));
196 if (ub != 64)
197 return i + ub + 0;
198 __asm__ ("cntlzd %0,%1":"=r"(ub):
199 "r"(pending[1] & beatic_irq_mask_enable[i/64+1]
200 & beatic_irq_mask_ack[i/64+1]));
201 if (ub != 64)
202 return i + ub + 64;
203 __asm__ ("cntlzd %0,%1":"=r"(ub):
204 "r"(pending[2] & beatic_irq_mask_enable[i/64+2]
205 & beatic_irq_mask_ack[i/64+2]));
206 if (ub != 64)
207 return i + ub + 128;
208 __asm__ ("cntlzd %0,%1":"=r"(ub):
209 "r"(pending[3] & beatic_irq_mask_enable[i/64+3]
210 & beatic_irq_mask_ack[i/64+3]));
211 if (ub != 64)
212 return i + ub + 192;
213 }
214
215 return NO_IRQ;
216}
217unsigned int beatic_get_irq(void)
218{
219 unsigned int ret;
220
221 ret = beatic_get_irq_plug();
222 if (ret != NO_IRQ)
223 beatic_ack_irq(irq_get_irq_data(ret));
224 return ret;
225}
226
227/*
228 */
229void __init beatic_init_IRQ(void)
230{
231 int i;
232
233 memset(beatic_irq_mask_enable, 0, sizeof(beatic_irq_mask_enable));
234 memset(beatic_irq_mask_ack, 255, sizeof(beatic_irq_mask_ack));
235 for (i = 0; i < MAX_IRQS; i += 256)
236 beat_set_interrupt_mask(i, 0L, 0L, 0L, 0L);
237
238 /* Set out get_irq function */
239 ppc_md.get_irq = beatic_get_irq;
240
241 /* Allocate an irq host */
242 beatic_host = irq_domain_add_nomap(NULL, ~0, &beatic_pic_host_ops, NULL);
243 BUG_ON(beatic_host == NULL);
244 irq_set_default_host(beatic_host);
245}
246
247void beatic_deinit_IRQ(void)
248{
249 int i;
250
251 for (i = 1; i < nr_irqs; i++)
252 beat_destruct_irq_plug(i);
253}
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.h b/arch/powerpc/platforms/cell/beat_interrupt.h
deleted file mode 100644
index a7e52f91a078..000000000000
--- a/arch/powerpc/platforms/cell/beat_interrupt.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * Celleb/Beat Interrupt controller
3 *
4 * (C) Copyright 2006 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef ASM_BEAT_PIC_H
22#define ASM_BEAT_PIC_H
23#ifdef __KERNEL__
24
25extern void beatic_init_IRQ(void);
26extern unsigned int beatic_get_irq(void);
27extern void beatic_deinit_IRQ(void);
28
29#endif
30#endif /* ASM_BEAT_PIC_H */
diff --git a/arch/powerpc/platforms/cell/beat_iommu.c b/arch/powerpc/platforms/cell/beat_iommu.c
deleted file mode 100644
index 3ce685568935..000000000000
--- a/arch/powerpc/platforms/cell/beat_iommu.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * Support for IOMMU on Celleb platform.
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/dma-mapping.h>
24#include <linux/pci.h>
25#include <linux/of_platform.h>
26
27#include <asm/machdep.h>
28
29#include "beat_wrapper.h"
30
31#define DMA_FLAGS 0xf800000000000000UL /* r/w permitted, coherency required,
32 strongest order */
33
34static int __init find_dma_window(u64 *io_space_id, u64 *ioid,
35 u64 *base, u64 *size, u64 *io_page_size)
36{
37 struct device_node *dn;
38 const unsigned long *dma_window;
39
40 for_each_node_by_type(dn, "ioif") {
41 dma_window = of_get_property(dn, "toshiba,dma-window", NULL);
42 if (dma_window) {
43 *io_space_id = (dma_window[0] >> 32) & 0xffffffffUL;
44 *ioid = dma_window[0] & 0x7ffUL;
45 *base = dma_window[1];
46 *size = dma_window[2];
47 *io_page_size = 1 << dma_window[3];
48 of_node_put(dn);
49 return 1;
50 }
51 }
52 return 0;
53}
54
55static unsigned long celleb_dma_direct_offset;
56
57static void __init celleb_init_direct_mapping(void)
58{
59 u64 lpar_addr, io_addr;
60 u64 io_space_id, ioid, dma_base, dma_size, io_page_size;
61
62 if (!find_dma_window(&io_space_id, &ioid, &dma_base, &dma_size,
63 &io_page_size)) {
64 pr_info("No dma window found !\n");
65 return;
66 }
67
68 for (lpar_addr = 0; lpar_addr < dma_size; lpar_addr += io_page_size) {
69 io_addr = lpar_addr + dma_base;
70 (void)beat_put_iopte(io_space_id, io_addr, lpar_addr,
71 ioid, DMA_FLAGS);
72 }
73
74 celleb_dma_direct_offset = dma_base;
75}
76
77static void celleb_dma_dev_setup(struct device *dev)
78{
79 set_dma_ops(dev, &dma_direct_ops);
80 set_dma_offset(dev, celleb_dma_direct_offset);
81}
82
83static void celleb_pci_dma_dev_setup(struct pci_dev *pdev)
84{
85 celleb_dma_dev_setup(&pdev->dev);
86}
87
88static int celleb_of_bus_notify(struct notifier_block *nb,
89 unsigned long action, void *data)
90{
91 struct device *dev = data;
92
93 /* We are only intereted in device addition */
94 if (action != BUS_NOTIFY_ADD_DEVICE)
95 return 0;
96
97 celleb_dma_dev_setup(dev);
98
99 return 0;
100}
101
102static struct notifier_block celleb_of_bus_notifier = {
103 .notifier_call = celleb_of_bus_notify
104};
105
106static int __init celleb_init_iommu(void)
107{
108 celleb_init_direct_mapping();
109 ppc_md.pci_dma_dev_setup = celleb_pci_dma_dev_setup;
110 bus_register_notifier(&platform_bus_type, &celleb_of_bus_notifier);
111
112 return 0;
113}
114
115machine_arch_initcall(celleb_beat, celleb_init_iommu);
diff --git a/arch/powerpc/platforms/cell/beat_spu_priv1.c b/arch/powerpc/platforms/cell/beat_spu_priv1.c
deleted file mode 100644
index 13f52589d3a9..000000000000
--- a/arch/powerpc/platforms/cell/beat_spu_priv1.c
+++ /dev/null
@@ -1,205 +0,0 @@
1/*
2 * spu hypervisor abstraction for Beat
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <asm/types.h>
22#include <asm/spu.h>
23#include <asm/spu_priv1.h>
24
25#include "beat_wrapper.h"
26
27static inline void _int_mask_set(struct spu *spu, int class, u64 mask)
28{
29 spu->shadow_int_mask_RW[class] = mask;
30 beat_set_irq_mask_for_spe(spu->spe_id, class, mask);
31}
32
33static inline u64 _int_mask_get(struct spu *spu, int class)
34{
35 return spu->shadow_int_mask_RW[class];
36}
37
38static void int_mask_set(struct spu *spu, int class, u64 mask)
39{
40 _int_mask_set(spu, class, mask);
41}
42
43static u64 int_mask_get(struct spu *spu, int class)
44{
45 return _int_mask_get(spu, class);
46}
47
48static void int_mask_and(struct spu *spu, int class, u64 mask)
49{
50 u64 old_mask;
51 old_mask = _int_mask_get(spu, class);
52 _int_mask_set(spu, class, old_mask & mask);
53}
54
55static void int_mask_or(struct spu *spu, int class, u64 mask)
56{
57 u64 old_mask;
58 old_mask = _int_mask_get(spu, class);
59 _int_mask_set(spu, class, old_mask | mask);
60}
61
62static void int_stat_clear(struct spu *spu, int class, u64 stat)
63{
64 beat_clear_interrupt_status_of_spe(spu->spe_id, class, stat);
65}
66
67static u64 int_stat_get(struct spu *spu, int class)
68{
69 u64 int_stat;
70 beat_get_interrupt_status_of_spe(spu->spe_id, class, &int_stat);
71 return int_stat;
72}
73
74static void cpu_affinity_set(struct spu *spu, int cpu)
75{
76 return;
77}
78
79static u64 mfc_dar_get(struct spu *spu)
80{
81 u64 dar;
82 beat_get_spe_privileged_state_1_registers(
83 spu->spe_id,
84 offsetof(struct spu_priv1, mfc_dar_RW), &dar);
85 return dar;
86}
87
88static u64 mfc_dsisr_get(struct spu *spu)
89{
90 u64 dsisr;
91 beat_get_spe_privileged_state_1_registers(
92 spu->spe_id,
93 offsetof(struct spu_priv1, mfc_dsisr_RW), &dsisr);
94 return dsisr;
95}
96
97static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
98{
99 beat_set_spe_privileged_state_1_registers(
100 spu->spe_id,
101 offsetof(struct spu_priv1, mfc_dsisr_RW), dsisr);
102}
103
104static void mfc_sdr_setup(struct spu *spu)
105{
106 return;
107}
108
109static void mfc_sr1_set(struct spu *spu, u64 sr1)
110{
111 beat_set_spe_privileged_state_1_registers(
112 spu->spe_id,
113 offsetof(struct spu_priv1, mfc_sr1_RW), sr1);
114}
115
116static u64 mfc_sr1_get(struct spu *spu)
117{
118 u64 sr1;
119 beat_get_spe_privileged_state_1_registers(
120 spu->spe_id,
121 offsetof(struct spu_priv1, mfc_sr1_RW), &sr1);
122 return sr1;
123}
124
125static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
126{
127 beat_set_spe_privileged_state_1_registers(
128 spu->spe_id,
129 offsetof(struct spu_priv1, mfc_tclass_id_RW), tclass_id);
130}
131
132static u64 mfc_tclass_id_get(struct spu *spu)
133{
134 u64 tclass_id;
135 beat_get_spe_privileged_state_1_registers(
136 spu->spe_id,
137 offsetof(struct spu_priv1, mfc_tclass_id_RW), &tclass_id);
138 return tclass_id;
139}
140
141static void tlb_invalidate(struct spu *spu)
142{
143 beat_set_spe_privileged_state_1_registers(
144 spu->spe_id,
145 offsetof(struct spu_priv1, tlb_invalidate_entry_W), 0ul);
146}
147
148static void resource_allocation_groupID_set(struct spu *spu, u64 id)
149{
150 beat_set_spe_privileged_state_1_registers(
151 spu->spe_id,
152 offsetof(struct spu_priv1, resource_allocation_groupID_RW),
153 id);
154}
155
156static u64 resource_allocation_groupID_get(struct spu *spu)
157{
158 u64 id;
159 beat_get_spe_privileged_state_1_registers(
160 spu->spe_id,
161 offsetof(struct spu_priv1, resource_allocation_groupID_RW),
162 &id);
163 return id;
164}
165
166static void resource_allocation_enable_set(struct spu *spu, u64 enable)
167{
168 beat_set_spe_privileged_state_1_registers(
169 spu->spe_id,
170 offsetof(struct spu_priv1, resource_allocation_enable_RW),
171 enable);
172}
173
174static u64 resource_allocation_enable_get(struct spu *spu)
175{
176 u64 enable;
177 beat_get_spe_privileged_state_1_registers(
178 spu->spe_id,
179 offsetof(struct spu_priv1, resource_allocation_enable_RW),
180 &enable);
181 return enable;
182}
183
184const struct spu_priv1_ops spu_priv1_beat_ops = {
185 .int_mask_and = int_mask_and,
186 .int_mask_or = int_mask_or,
187 .int_mask_set = int_mask_set,
188 .int_mask_get = int_mask_get,
189 .int_stat_clear = int_stat_clear,
190 .int_stat_get = int_stat_get,
191 .cpu_affinity_set = cpu_affinity_set,
192 .mfc_dar_get = mfc_dar_get,
193 .mfc_dsisr_get = mfc_dsisr_get,
194 .mfc_dsisr_set = mfc_dsisr_set,
195 .mfc_sdr_setup = mfc_sdr_setup,
196 .mfc_sr1_set = mfc_sr1_set,
197 .mfc_sr1_get = mfc_sr1_get,
198 .mfc_tclass_id_set = mfc_tclass_id_set,
199 .mfc_tclass_id_get = mfc_tclass_id_get,
200 .tlb_invalidate = tlb_invalidate,
201 .resource_allocation_groupID_set = resource_allocation_groupID_set,
202 .resource_allocation_groupID_get = resource_allocation_groupID_get,
203 .resource_allocation_enable_set = resource_allocation_enable_set,
204 .resource_allocation_enable_get = resource_allocation_enable_get,
205};
diff --git a/arch/powerpc/platforms/cell/beat_syscall.h b/arch/powerpc/platforms/cell/beat_syscall.h
deleted file mode 100644
index 8580dc7e1798..000000000000
--- a/arch/powerpc/platforms/cell/beat_syscall.h
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 * Beat hypervisor call numbers
3 *
4 * (C) Copyright 2004-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef BEAT_BEAT_syscall_H
22#define BEAT_BEAT_syscall_H
23
24#ifdef __ASSEMBLY__
25#define __BEAT_ADD_VENDOR_ID(__x, __v) ((__v)<<60|(__x))
26#else
27#define __BEAT_ADD_VENDOR_ID(__x, __v) ((u64)(__v)<<60|(__x))
28#endif
29#define HV_allocate_memory __BEAT_ADD_VENDOR_ID(0, 0)
30#define HV_construct_virtual_address_space __BEAT_ADD_VENDOR_ID(2, 0)
31#define HV_destruct_virtual_address_space __BEAT_ADD_VENDOR_ID(10, 0)
32#define HV_get_virtual_address_space_id_of_ppe __BEAT_ADD_VENDOR_ID(4, 0)
33#define HV_query_logical_partition_address_region_info \
34 __BEAT_ADD_VENDOR_ID(6, 0)
35#define HV_release_memory __BEAT_ADD_VENDOR_ID(13, 0)
36#define HV_select_virtual_address_space __BEAT_ADD_VENDOR_ID(7, 0)
37#define HV_load_range_registers __BEAT_ADD_VENDOR_ID(68, 0)
38#define HV_set_ppe_l2cache_rmt_entry __BEAT_ADD_VENDOR_ID(70, 0)
39#define HV_set_ppe_tlb_rmt_entry __BEAT_ADD_VENDOR_ID(71, 0)
40#define HV_set_spe_tlb_rmt_entry __BEAT_ADD_VENDOR_ID(72, 0)
41#define HV_get_io_address_translation_fault_info __BEAT_ADD_VENDOR_ID(14, 0)
42#define HV_get_iopte __BEAT_ADD_VENDOR_ID(16, 0)
43#define HV_preload_iopt_cache __BEAT_ADD_VENDOR_ID(17, 0)
44#define HV_put_iopte __BEAT_ADD_VENDOR_ID(15, 0)
45#define HV_connect_event_ports __BEAT_ADD_VENDOR_ID(21, 0)
46#define HV_construct_event_receive_port __BEAT_ADD_VENDOR_ID(18, 0)
47#define HV_destruct_event_receive_port __BEAT_ADD_VENDOR_ID(19, 0)
48#define HV_destruct_event_send_port __BEAT_ADD_VENDOR_ID(22, 0)
49#define HV_get_state_of_event_send_port __BEAT_ADD_VENDOR_ID(25, 0)
50#define HV_request_to_connect_event_ports __BEAT_ADD_VENDOR_ID(20, 0)
51#define HV_send_event_externally __BEAT_ADD_VENDOR_ID(23, 0)
52#define HV_send_event_locally __BEAT_ADD_VENDOR_ID(24, 0)
53#define HV_construct_and_connect_irq_plug __BEAT_ADD_VENDOR_ID(28, 0)
54#define HV_destruct_irq_plug __BEAT_ADD_VENDOR_ID(29, 0)
55#define HV_detect_pending_interrupts __BEAT_ADD_VENDOR_ID(26, 0)
56#define HV_end_of_interrupt __BEAT_ADD_VENDOR_ID(27, 0)
57#define HV_assign_control_signal_notification_port __BEAT_ADD_VENDOR_ID(45, 0)
58#define HV_end_of_control_signal_processing __BEAT_ADD_VENDOR_ID(48, 0)
59#define HV_get_control_signal __BEAT_ADD_VENDOR_ID(46, 0)
60#define HV_set_irq_mask_for_spe __BEAT_ADD_VENDOR_ID(61, 0)
61#define HV_shutdown_logical_partition __BEAT_ADD_VENDOR_ID(44, 0)
62#define HV_connect_message_ports __BEAT_ADD_VENDOR_ID(35, 0)
63#define HV_destruct_message_port __BEAT_ADD_VENDOR_ID(36, 0)
64#define HV_receive_message __BEAT_ADD_VENDOR_ID(37, 0)
65#define HV_get_message_port_info __BEAT_ADD_VENDOR_ID(34, 0)
66#define HV_request_to_connect_message_ports __BEAT_ADD_VENDOR_ID(33, 0)
67#define HV_send_message __BEAT_ADD_VENDOR_ID(32, 0)
68#define HV_get_logical_ppe_id __BEAT_ADD_VENDOR_ID(69, 0)
69#define HV_pause __BEAT_ADD_VENDOR_ID(9, 0)
70#define HV_destruct_shared_memory_handle __BEAT_ADD_VENDOR_ID(51, 0)
71#define HV_get_shared_memory_info __BEAT_ADD_VENDOR_ID(52, 0)
72#define HV_permit_sharing_memory __BEAT_ADD_VENDOR_ID(50, 0)
73#define HV_request_to_attach_shared_memory __BEAT_ADD_VENDOR_ID(49, 0)
74#define HV_enable_logical_spe_execution __BEAT_ADD_VENDOR_ID(55, 0)
75#define HV_construct_logical_spe __BEAT_ADD_VENDOR_ID(53, 0)
76#define HV_disable_logical_spe_execution __BEAT_ADD_VENDOR_ID(56, 0)
77#define HV_destruct_logical_spe __BEAT_ADD_VENDOR_ID(54, 0)
78#define HV_sense_spe_execution_status __BEAT_ADD_VENDOR_ID(58, 0)
79#define HV_insert_htab_entry __BEAT_ADD_VENDOR_ID(101, 0)
80#define HV_read_htab_entries __BEAT_ADD_VENDOR_ID(95, 0)
81#define HV_write_htab_entry __BEAT_ADD_VENDOR_ID(94, 0)
82#define HV_assign_io_address_translation_fault_port \
83 __BEAT_ADD_VENDOR_ID(100, 0)
84#define HV_set_interrupt_mask __BEAT_ADD_VENDOR_ID(73, 0)
85#define HV_get_logical_partition_id __BEAT_ADD_VENDOR_ID(74, 0)
86#define HV_create_repository_node2 __BEAT_ADD_VENDOR_ID(90, 0)
87#define HV_create_repository_node __BEAT_ADD_VENDOR_ID(90, 0) /* alias */
88#define HV_get_repository_node_value2 __BEAT_ADD_VENDOR_ID(91, 0)
89#define HV_get_repository_node_value __BEAT_ADD_VENDOR_ID(91, 0) /* alias */
90#define HV_modify_repository_node_value2 __BEAT_ADD_VENDOR_ID(92, 0)
91#define HV_modify_repository_node_value __BEAT_ADD_VENDOR_ID(92, 0) /* alias */
92#define HV_remove_repository_node2 __BEAT_ADD_VENDOR_ID(93, 0)
93#define HV_remove_repository_node __BEAT_ADD_VENDOR_ID(93, 0) /* alias */
94#define HV_cancel_shared_memory __BEAT_ADD_VENDOR_ID(104, 0)
95#define HV_clear_interrupt_status_of_spe __BEAT_ADD_VENDOR_ID(206, 0)
96#define HV_construct_spe_irq_outlet __BEAT_ADD_VENDOR_ID(80, 0)
97#define HV_destruct_spe_irq_outlet __BEAT_ADD_VENDOR_ID(81, 0)
98#define HV_disconnect_ipspc_service __BEAT_ADD_VENDOR_ID(88, 0)
99#define HV_execute_ipspc_command __BEAT_ADD_VENDOR_ID(86, 0)
100#define HV_get_interrupt_status_of_spe __BEAT_ADD_VENDOR_ID(205, 0)
101#define HV_get_spe_privileged_state_1_registers __BEAT_ADD_VENDOR_ID(208, 0)
102#define HV_permit_use_of_ipspc_service __BEAT_ADD_VENDOR_ID(85, 0)
103#define HV_reinitialize_logical_spe __BEAT_ADD_VENDOR_ID(82, 0)
104#define HV_request_ipspc_service __BEAT_ADD_VENDOR_ID(84, 0)
105#define HV_stop_ipspc_command __BEAT_ADD_VENDOR_ID(87, 0)
106#define HV_set_spe_privileged_state_1_registers __BEAT_ADD_VENDOR_ID(204, 0)
107#define HV_get_status_of_ipspc_service __BEAT_ADD_VENDOR_ID(203, 0)
108#define HV_put_characters_to_console __BEAT_ADD_VENDOR_ID(0x101, 1)
109#define HV_get_characters_from_console __BEAT_ADD_VENDOR_ID(0x102, 1)
110#define HV_get_base_clock __BEAT_ADD_VENDOR_ID(0x111, 1)
111#define HV_set_base_clock __BEAT_ADD_VENDOR_ID(0x112, 1)
112#define HV_get_frame_cycle __BEAT_ADD_VENDOR_ID(0x114, 1)
113#define HV_disable_console __BEAT_ADD_VENDOR_ID(0x115, 1)
114#define HV_disable_all_console __BEAT_ADD_VENDOR_ID(0x116, 1)
115#define HV_oneshot_timer __BEAT_ADD_VENDOR_ID(0x117, 1)
116#define HV_set_dabr __BEAT_ADD_VENDOR_ID(0x118, 1)
117#define HV_get_dabr __BEAT_ADD_VENDOR_ID(0x119, 1)
118#define HV_start_hv_stats __BEAT_ADD_VENDOR_ID(0x21c, 1)
119#define HV_stop_hv_stats __BEAT_ADD_VENDOR_ID(0x21d, 1)
120#define HV_get_hv_stats __BEAT_ADD_VENDOR_ID(0x21e, 1)
121#define HV_get_hv_error_stats __BEAT_ADD_VENDOR_ID(0x221, 1)
122#define HV_get_stats __BEAT_ADD_VENDOR_ID(0x224, 1)
123#define HV_get_heap_stats __BEAT_ADD_VENDOR_ID(0x225, 1)
124#define HV_get_memory_stats __BEAT_ADD_VENDOR_ID(0x227, 1)
125#define HV_get_memory_detail __BEAT_ADD_VENDOR_ID(0x228, 1)
126#define HV_set_priority_of_irq_outlet __BEAT_ADD_VENDOR_ID(0x122, 1)
127#define HV_get_physical_spe_by_reservation_id __BEAT_ADD_VENDOR_ID(0x128, 1)
128#define HV_get_spe_context __BEAT_ADD_VENDOR_ID(0x129, 1)
129#define HV_set_spe_context __BEAT_ADD_VENDOR_ID(0x12a, 1)
130#define HV_downcount_of_interrupt __BEAT_ADD_VENDOR_ID(0x12e, 1)
131#define HV_peek_spe_context __BEAT_ADD_VENDOR_ID(0x12f, 1)
132#define HV_read_bpa_register __BEAT_ADD_VENDOR_ID(0x131, 1)
133#define HV_write_bpa_register __BEAT_ADD_VENDOR_ID(0x132, 1)
134#define HV_map_context_table_of_spe __BEAT_ADD_VENDOR_ID(0x137, 1)
135#define HV_get_slb_for_logical_spe __BEAT_ADD_VENDOR_ID(0x138, 1)
136#define HV_set_slb_for_logical_spe __BEAT_ADD_VENDOR_ID(0x139, 1)
137#define HV_init_pm __BEAT_ADD_VENDOR_ID(0x150, 1)
138#define HV_set_pm_signal __BEAT_ADD_VENDOR_ID(0x151, 1)
139#define HV_get_pm_signal __BEAT_ADD_VENDOR_ID(0x152, 1)
140#define HV_set_pm_config __BEAT_ADD_VENDOR_ID(0x153, 1)
141#define HV_get_pm_config __BEAT_ADD_VENDOR_ID(0x154, 1)
142#define HV_get_inner_trace_data __BEAT_ADD_VENDOR_ID(0x155, 1)
143#define HV_set_ext_trace_buffer __BEAT_ADD_VENDOR_ID(0x156, 1)
144#define HV_get_ext_trace_buffer __BEAT_ADD_VENDOR_ID(0x157, 1)
145#define HV_set_pm_interrupt __BEAT_ADD_VENDOR_ID(0x158, 1)
146#define HV_get_pm_interrupt __BEAT_ADD_VENDOR_ID(0x159, 1)
147#define HV_kick_pm __BEAT_ADD_VENDOR_ID(0x160, 1)
148#define HV_construct_pm_context __BEAT_ADD_VENDOR_ID(0x164, 1)
149#define HV_destruct_pm_context __BEAT_ADD_VENDOR_ID(0x165, 1)
150#define HV_be_slow __BEAT_ADD_VENDOR_ID(0x170, 1)
151#define HV_assign_ipspc_server_connection_status_notification_port \
152 __BEAT_ADD_VENDOR_ID(0x173, 1)
153#define HV_get_raid_of_physical_spe __BEAT_ADD_VENDOR_ID(0x174, 1)
154#define HV_set_physical_spe_to_rag __BEAT_ADD_VENDOR_ID(0x175, 1)
155#define HV_release_physical_spe_from_rag __BEAT_ADD_VENDOR_ID(0x176, 1)
156#define HV_rtc_read __BEAT_ADD_VENDOR_ID(0x190, 1)
157#define HV_rtc_write __BEAT_ADD_VENDOR_ID(0x191, 1)
158#define HV_eeprom_read __BEAT_ADD_VENDOR_ID(0x192, 1)
159#define HV_eeprom_write __BEAT_ADD_VENDOR_ID(0x193, 1)
160#define HV_insert_htab_entry3 __BEAT_ADD_VENDOR_ID(0x104, 1)
161#define HV_invalidate_htab_entry3 __BEAT_ADD_VENDOR_ID(0x105, 1)
162#define HV_update_htab_permission3 __BEAT_ADD_VENDOR_ID(0x106, 1)
163#define HV_clear_htab3 __BEAT_ADD_VENDOR_ID(0x107, 1)
164#endif
diff --git a/arch/powerpc/platforms/cell/beat_udbg.c b/arch/powerpc/platforms/cell/beat_udbg.c
deleted file mode 100644
index 350735bc8888..000000000000
--- a/arch/powerpc/platforms/cell/beat_udbg.c
+++ /dev/null
@@ -1,98 +0,0 @@
1/*
2 * udbg function for Beat
3 *
4 * (C) Copyright 2006 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/console.h>
23
24#include <asm/machdep.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27
28#include "beat.h"
29
30#define celleb_vtermno 0
31
32static void udbg_putc_beat(char c)
33{
34 unsigned long rc;
35
36 if (c == '\n')
37 udbg_putc_beat('\r');
38
39 rc = beat_put_term_char(celleb_vtermno, 1, (uint64_t)c << 56, 0);
40}
41
42/* Buffered chars getc */
43static u64 inbuflen;
44static u64 inbuf[2]; /* must be 2 u64s */
45
46static int udbg_getc_poll_beat(void)
47{
48 /* The interface is tricky because it may return up to 16 chars.
49 * We save them statically for future calls to udbg_getc().
50 */
51 char ch, *buf = (char *)inbuf;
52 int i;
53 long rc;
54 if (inbuflen == 0) {
55 /* get some more chars. */
56 inbuflen = 0;
57 rc = beat_get_term_char(celleb_vtermno, &inbuflen,
58 inbuf+0, inbuf+1);
59 if (rc != 0)
60 inbuflen = 0; /* otherwise inbuflen is garbage */
61 }
62 if (inbuflen <= 0 || inbuflen > 16) {
63 /* Catch error case as well as other oddities (corruption) */
64 inbuflen = 0;
65 return -1;
66 }
67 ch = buf[0];
68 for (i = 1; i < inbuflen; i++) /* shuffle them down. */
69 buf[i-1] = buf[i];
70 inbuflen--;
71 return ch;
72}
73
74static int udbg_getc_beat(void)
75{
76 int ch;
77 for (;;) {
78 ch = udbg_getc_poll_beat();
79 if (ch == -1) {
80 /* This shouldn't be needed...but... */
81 volatile unsigned long delay;
82 for (delay = 0; delay < 2000000; delay++)
83 ;
84 } else {
85 return ch;
86 }
87 }
88}
89
90/* call this from early_init() for a working debug console on
91 * vterm capable LPAR machines
92 */
93void __init udbg_init_debug_beat(void)
94{
95 udbg_putc = udbg_putc_beat;
96 udbg_getc = udbg_getc_beat;
97 udbg_getc_poll = udbg_getc_poll_beat;
98}
diff --git a/arch/powerpc/platforms/cell/beat_wrapper.h b/arch/powerpc/platforms/cell/beat_wrapper.h
deleted file mode 100644
index c1109969f242..000000000000
--- a/arch/powerpc/platforms/cell/beat_wrapper.h
+++ /dev/null
@@ -1,290 +0,0 @@
1/*
2 * Beat hypervisor call I/F
3 *
4 * (C) Copyright 2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/pseries/plpar_wrapper.h.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 */
22#ifndef BEAT_HCALL
23#include <linux/string.h>
24#include "beat_syscall.h"
25
26/* defined in hvCall.S */
27extern s64 beat_hcall_norets(u64 opcode, ...);
28extern s64 beat_hcall_norets8(u64 opcode, u64 arg1, u64 arg2, u64 arg3,
29 u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8);
30extern s64 beat_hcall1(u64 opcode, u64 retbuf[1], ...);
31extern s64 beat_hcall2(u64 opcode, u64 retbuf[2], ...);
32extern s64 beat_hcall3(u64 opcode, u64 retbuf[3], ...);
33extern s64 beat_hcall4(u64 opcode, u64 retbuf[4], ...);
34extern s64 beat_hcall5(u64 opcode, u64 retbuf[5], ...);
35extern s64 beat_hcall6(u64 opcode, u64 retbuf[6], ...);
36
37static inline s64 beat_downcount_of_interrupt(u64 plug_id)
38{
39 return beat_hcall_norets(HV_downcount_of_interrupt, plug_id);
40}
41
42static inline s64 beat_set_interrupt_mask(u64 index,
43 u64 val0, u64 val1, u64 val2, u64 val3)
44{
45 return beat_hcall_norets(HV_set_interrupt_mask, index,
46 val0, val1, val2, val3);
47}
48
49static inline s64 beat_destruct_irq_plug(u64 plug_id)
50{
51 return beat_hcall_norets(HV_destruct_irq_plug, plug_id);
52}
53
54static inline s64 beat_construct_and_connect_irq_plug(u64 plug_id,
55 u64 outlet_id)
56{
57 return beat_hcall_norets(HV_construct_and_connect_irq_plug, plug_id,
58 outlet_id);
59}
60
61static inline s64 beat_detect_pending_interrupts(u64 index, u64 *retbuf)
62{
63 return beat_hcall4(HV_detect_pending_interrupts, retbuf, index);
64}
65
66static inline s64 beat_pause(u64 style)
67{
68 return beat_hcall_norets(HV_pause, style);
69}
70
71static inline s64 beat_read_htab_entries(u64 htab_id, u64 index, u64 *retbuf)
72{
73 return beat_hcall5(HV_read_htab_entries, retbuf, htab_id, index);
74}
75
76static inline s64 beat_insert_htab_entry(u64 htab_id, u64 group,
77 u64 bitmask, u64 hpte_v, u64 hpte_r, u64 *slot)
78{
79 u64 dummy[3];
80 s64 ret;
81
82 ret = beat_hcall3(HV_insert_htab_entry, dummy, htab_id, group,
83 bitmask, hpte_v, hpte_r);
84 *slot = dummy[0];
85 return ret;
86}
87
88static inline s64 beat_write_htab_entry(u64 htab_id, u64 slot,
89 u64 hpte_v, u64 hpte_r, u64 mask_v, u64 mask_r,
90 u64 *ret_v, u64 *ret_r)
91{
92 u64 dummy[2];
93 s64 ret;
94
95 ret = beat_hcall2(HV_write_htab_entry, dummy, htab_id, slot,
96 hpte_v, hpte_r, mask_v, mask_r);
97 *ret_v = dummy[0];
98 *ret_r = dummy[1];
99 return ret;
100}
101
102static inline s64 beat_insert_htab_entry3(u64 htab_id, u64 group,
103 u64 hpte_v, u64 hpte_r, u64 mask_v, u64 value_v, u64 *slot)
104{
105 u64 dummy[1];
106 s64 ret;
107
108 ret = beat_hcall1(HV_insert_htab_entry3, dummy, htab_id, group,
109 hpte_v, hpte_r, mask_v, value_v);
110 *slot = dummy[0];
111 return ret;
112}
113
114static inline s64 beat_invalidate_htab_entry3(u64 htab_id, u64 group,
115 u64 va, u64 pss)
116{
117 return beat_hcall_norets(HV_invalidate_htab_entry3,
118 htab_id, group, va, pss);
119}
120
121static inline s64 beat_update_htab_permission3(u64 htab_id, u64 group,
122 u64 va, u64 pss, u64 ptel_mask, u64 ptel_value)
123{
124 return beat_hcall_norets(HV_update_htab_permission3,
125 htab_id, group, va, pss, ptel_mask, ptel_value);
126}
127
128static inline s64 beat_clear_htab3(u64 htab_id)
129{
130 return beat_hcall_norets(HV_clear_htab3, htab_id);
131}
132
133static inline void beat_shutdown_logical_partition(u64 code)
134{
135 (void)beat_hcall_norets(HV_shutdown_logical_partition, code);
136}
137
138static inline s64 beat_rtc_write(u64 time_from_epoch)
139{
140 return beat_hcall_norets(HV_rtc_write, time_from_epoch);
141}
142
143static inline s64 beat_rtc_read(u64 *time_from_epoch)
144{
145 u64 dummy[1];
146 s64 ret;
147
148 ret = beat_hcall1(HV_rtc_read, dummy);
149 *time_from_epoch = dummy[0];
150 return ret;
151}
152
153#define BEAT_NVRW_CNT (sizeof(u64) * 6)
154
155static inline s64 beat_eeprom_write(u64 index, u64 length, u8 *buffer)
156{
157 u64 b[6];
158
159 if (length > BEAT_NVRW_CNT)
160 return -1;
161 memcpy(b, buffer, sizeof(b));
162 return beat_hcall_norets8(HV_eeprom_write, index, length,
163 b[0], b[1], b[2], b[3], b[4], b[5]);
164}
165
166static inline s64 beat_eeprom_read(u64 index, u64 length, u8 *buffer)
167{
168 u64 b[6];
169 s64 ret;
170
171 if (length > BEAT_NVRW_CNT)
172 return -1;
173 ret = beat_hcall6(HV_eeprom_read, b, index, length);
174 memcpy(buffer, b, length);
175 return ret;
176}
177
178static inline s64 beat_set_dabr(u64 value, u64 style)
179{
180 return beat_hcall_norets(HV_set_dabr, value, style);
181}
182
183static inline s64 beat_get_characters_from_console(u64 termno, u64 *len,
184 u8 *buffer)
185{
186 u64 dummy[3];
187 s64 ret;
188
189 ret = beat_hcall3(HV_get_characters_from_console, dummy, termno, len);
190 *len = dummy[0];
191 memcpy(buffer, dummy + 1, *len);
192 return ret;
193}
194
195static inline s64 beat_put_characters_to_console(u64 termno, u64 len,
196 u8 *buffer)
197{
198 u64 b[2];
199
200 memcpy(b, buffer, len);
201 return beat_hcall_norets(HV_put_characters_to_console, termno, len,
202 b[0], b[1]);
203}
204
205static inline s64 beat_get_spe_privileged_state_1_registers(
206 u64 id, u64 offsetof, u64 *value)
207{
208 u64 dummy[1];
209 s64 ret;
210
211 ret = beat_hcall1(HV_get_spe_privileged_state_1_registers, dummy, id,
212 offsetof);
213 *value = dummy[0];
214 return ret;
215}
216
217static inline s64 beat_set_irq_mask_for_spe(u64 id, u64 class, u64 mask)
218{
219 return beat_hcall_norets(HV_set_irq_mask_for_spe, id, class, mask);
220}
221
222static inline s64 beat_clear_interrupt_status_of_spe(u64 id, u64 class,
223 u64 mask)
224{
225 return beat_hcall_norets(HV_clear_interrupt_status_of_spe,
226 id, class, mask);
227}
228
229static inline s64 beat_set_spe_privileged_state_1_registers(
230 u64 id, u64 offsetof, u64 value)
231{
232 return beat_hcall_norets(HV_set_spe_privileged_state_1_registers,
233 id, offsetof, value);
234}
235
236static inline s64 beat_get_interrupt_status_of_spe(u64 id, u64 class, u64 *val)
237{
238 u64 dummy[1];
239 s64 ret;
240
241 ret = beat_hcall1(HV_get_interrupt_status_of_spe, dummy, id, class);
242 *val = dummy[0];
243 return ret;
244}
245
246static inline s64 beat_put_iopte(u64 ioas_id, u64 io_addr, u64 real_addr,
247 u64 ioid, u64 flags)
248{
249 return beat_hcall_norets(HV_put_iopte, ioas_id, io_addr, real_addr,
250 ioid, flags);
251}
252
253static inline s64 beat_construct_event_receive_port(u64 *port)
254{
255 u64 dummy[1];
256 s64 ret;
257
258 ret = beat_hcall1(HV_construct_event_receive_port, dummy);
259 *port = dummy[0];
260 return ret;
261}
262
263static inline s64 beat_destruct_event_receive_port(u64 port)
264{
265 s64 ret;
266
267 ret = beat_hcall_norets(HV_destruct_event_receive_port, port);
268 return ret;
269}
270
271static inline s64 beat_create_repository_node(u64 path[4], u64 data[2])
272{
273 s64 ret;
274
275 ret = beat_hcall_norets(HV_create_repository_node2,
276 path[0], path[1], path[2], path[3], data[0], data[1]);
277 return ret;
278}
279
280static inline s64 beat_get_repository_node_value(u64 lpid, u64 path[4],
281 u64 data[2])
282{
283 s64 ret;
284
285 ret = beat_hcall2(HV_get_repository_node_value2, data,
286 lpid, path[0], path[1], path[2], path[3]);
287 return ret;
288}
289
290#endif
diff --git a/arch/powerpc/platforms/cell/cell.h b/arch/powerpc/platforms/cell/cell.h
new file mode 100644
index 000000000000..ef143dfee068
--- /dev/null
+++ b/arch/powerpc/platforms/cell/cell.h
@@ -0,0 +1,24 @@
1/*
2 * Cell Platform common data structures
3 *
4 * Copyright 2015, Daniel Axtens, IBM Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef CELL_H
18#define CELL_H
19
20#include <asm/pci-bridge.h>
21
22extern struct pci_controller_ops cell_pci_controller_ops;
23
24#endif
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c
deleted file mode 100644
index 3ce70ded2d6a..000000000000
--- a/arch/powerpc/platforms/cell/celleb_pci.c
+++ /dev/null
@@ -1,500 +0,0 @@
1/*
2 * Support for PCI on Celleb platform.
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/kernel/rtas_pci.c:
7 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 */
24
25#undef DEBUG
26
27#include <linux/kernel.h>
28#include <linux/threads.h>
29#include <linux/pci.h>
30#include <linux/string.h>
31#include <linux/init.h>
32#include <linux/memblock.h>
33#include <linux/pci_regs.h>
34#include <linux/of.h>
35#include <linux/of_device.h>
36#include <linux/slab.h>
37
38#include <asm/io.h>
39#include <asm/irq.h>
40#include <asm/prom.h>
41#include <asm/pci-bridge.h>
42#include <asm/ppc-pci.h>
43
44#include "celleb_pci.h"
45
46#define MAX_PCI_DEVICES 32
47#define MAX_PCI_FUNCTIONS 8
48#define MAX_PCI_BASE_ADDRS 3 /* use 64 bit address */
49
50/* definition for fake pci configuration area for GbE, .... ,and etc. */
51
52struct celleb_pci_resource {
53 struct resource r[MAX_PCI_BASE_ADDRS];
54};
55
56struct celleb_pci_private {
57 unsigned char *fake_config[MAX_PCI_DEVICES][MAX_PCI_FUNCTIONS];
58 struct celleb_pci_resource *res[MAX_PCI_DEVICES][MAX_PCI_FUNCTIONS];
59};
60
61static inline u8 celleb_fake_config_readb(void *addr)
62{
63 u8 *p = addr;
64 return *p;
65}
66
67static inline u16 celleb_fake_config_readw(void *addr)
68{
69 __le16 *p = addr;
70 return le16_to_cpu(*p);
71}
72
73static inline u32 celleb_fake_config_readl(void *addr)
74{
75 __le32 *p = addr;
76 return le32_to_cpu(*p);
77}
78
79static inline void celleb_fake_config_writeb(u32 val, void *addr)
80{
81 u8 *p = addr;
82 *p = val;
83}
84
85static inline void celleb_fake_config_writew(u32 val, void *addr)
86{
87 __le16 val16;
88 __le16 *p = addr;
89 val16 = cpu_to_le16(val);
90 *p = val16;
91}
92
93static inline void celleb_fake_config_writel(u32 val, void *addr)
94{
95 __le32 val32;
96 __le32 *p = addr;
97 val32 = cpu_to_le32(val);
98 *p = val32;
99}
100
101static unsigned char *get_fake_config_start(struct pci_controller *hose,
102 int devno, int fn)
103{
104 struct celleb_pci_private *private = hose->private_data;
105
106 if (private == NULL)
107 return NULL;
108
109 return private->fake_config[devno][fn];
110}
111
112static struct celleb_pci_resource *get_resource_start(
113 struct pci_controller *hose,
114 int devno, int fn)
115{
116 struct celleb_pci_private *private = hose->private_data;
117
118 if (private == NULL)
119 return NULL;
120
121 return private->res[devno][fn];
122}
123
124
125static void celleb_config_read_fake(unsigned char *config, int where,
126 int size, u32 *val)
127{
128 char *p = config + where;
129
130 switch (size) {
131 case 1:
132 *val = celleb_fake_config_readb(p);
133 break;
134 case 2:
135 *val = celleb_fake_config_readw(p);
136 break;
137 case 4:
138 *val = celleb_fake_config_readl(p);
139 break;
140 }
141}
142
143static void celleb_config_write_fake(unsigned char *config, int where,
144 int size, u32 val)
145{
146 char *p = config + where;
147
148 switch (size) {
149 case 1:
150 celleb_fake_config_writeb(val, p);
151 break;
152 case 2:
153 celleb_fake_config_writew(val, p);
154 break;
155 case 4:
156 celleb_fake_config_writel(val, p);
157 break;
158 }
159}
160
161static int celleb_fake_pci_read_config(struct pci_bus *bus,
162 unsigned int devfn, int where, int size, u32 *val)
163{
164 char *config;
165 struct pci_controller *hose = pci_bus_to_host(bus);
166 unsigned int devno = devfn >> 3;
167 unsigned int fn = devfn & 0x7;
168
169 /* allignment check */
170 BUG_ON(where % size);
171
172 pr_debug(" fake read: bus=0x%x, ", bus->number);
173 config = get_fake_config_start(hose, devno, fn);
174
175 pr_debug("devno=0x%x, where=0x%x, size=0x%x, ", devno, where, size);
176 if (!config) {
177 pr_debug("failed\n");
178 return PCIBIOS_DEVICE_NOT_FOUND;
179 }
180
181 celleb_config_read_fake(config, where, size, val);
182 pr_debug("val=0x%x\n", *val);
183
184 return PCIBIOS_SUCCESSFUL;
185}
186
187
188static int celleb_fake_pci_write_config(struct pci_bus *bus,
189 unsigned int devfn, int where, int size, u32 val)
190{
191 char *config;
192 struct pci_controller *hose = pci_bus_to_host(bus);
193 struct celleb_pci_resource *res;
194 unsigned int devno = devfn >> 3;
195 unsigned int fn = devfn & 0x7;
196
197 /* allignment check */
198 BUG_ON(where % size);
199
200 config = get_fake_config_start(hose, devno, fn);
201
202 if (!config)
203 return PCIBIOS_DEVICE_NOT_FOUND;
204
205 if (val == ~0) {
206 int i = (where - PCI_BASE_ADDRESS_0) >> 3;
207
208 switch (where) {
209 case PCI_BASE_ADDRESS_0:
210 case PCI_BASE_ADDRESS_2:
211 if (size != 4)
212 return PCIBIOS_DEVICE_NOT_FOUND;
213 res = get_resource_start(hose, devno, fn);
214 if (!res)
215 return PCIBIOS_DEVICE_NOT_FOUND;
216 celleb_config_write_fake(config, where, size,
217 (res->r[i].end - res->r[i].start));
218 return PCIBIOS_SUCCESSFUL;
219 case PCI_BASE_ADDRESS_1:
220 case PCI_BASE_ADDRESS_3:
221 case PCI_BASE_ADDRESS_4:
222 case PCI_BASE_ADDRESS_5:
223 break;
224 default:
225 break;
226 }
227 }
228
229 celleb_config_write_fake(config, where, size, val);
230 pr_debug(" fake write: where=%x, size=%d, val=%x\n",
231 where, size, val);
232
233 return PCIBIOS_SUCCESSFUL;
234}
235
236static struct pci_ops celleb_fake_pci_ops = {
237 .read = celleb_fake_pci_read_config,
238 .write = celleb_fake_pci_write_config,
239};
240
241static inline void celleb_setup_pci_base_addrs(struct pci_controller *hose,
242 unsigned int devno, unsigned int fn,
243 unsigned int num_base_addr)
244{
245 u32 val;
246 unsigned char *config;
247 struct celleb_pci_resource *res;
248
249 config = get_fake_config_start(hose, devno, fn);
250 res = get_resource_start(hose, devno, fn);
251
252 if (!config || !res)
253 return;
254
255 switch (num_base_addr) {
256 case 3:
257 val = (res->r[2].start & 0xfffffff0)
258 | PCI_BASE_ADDRESS_MEM_TYPE_64;
259 celleb_config_write_fake(config, PCI_BASE_ADDRESS_4, 4, val);
260 val = res->r[2].start >> 32;
261 celleb_config_write_fake(config, PCI_BASE_ADDRESS_5, 4, val);
262 /* FALLTHROUGH */
263 case 2:
264 val = (res->r[1].start & 0xfffffff0)
265 | PCI_BASE_ADDRESS_MEM_TYPE_64;
266 celleb_config_write_fake(config, PCI_BASE_ADDRESS_2, 4, val);
267 val = res->r[1].start >> 32;
268 celleb_config_write_fake(config, PCI_BASE_ADDRESS_3, 4, val);
269 /* FALLTHROUGH */
270 case 1:
271 val = (res->r[0].start & 0xfffffff0)
272 | PCI_BASE_ADDRESS_MEM_TYPE_64;
273 celleb_config_write_fake(config, PCI_BASE_ADDRESS_0, 4, val);
274 val = res->r[0].start >> 32;
275 celleb_config_write_fake(config, PCI_BASE_ADDRESS_1, 4, val);
276 break;
277 }
278
279 val = PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
280 celleb_config_write_fake(config, PCI_COMMAND, 2, val);
281}
282
283static int __init celleb_setup_fake_pci_device(struct device_node *node,
284 struct pci_controller *hose)
285{
286 unsigned int rlen;
287 int num_base_addr = 0;
288 u32 val;
289 const u32 *wi0, *wi1, *wi2, *wi3, *wi4;
290 unsigned int devno, fn;
291 struct celleb_pci_private *private = hose->private_data;
292 unsigned char **config = NULL;
293 struct celleb_pci_resource **res = NULL;
294 const char *name;
295 const unsigned long *li;
296 int size, result;
297
298 if (private == NULL) {
299 printk(KERN_ERR "PCI: "
300 "memory space for pci controller is not assigned\n");
301 goto error;
302 }
303
304 name = of_get_property(node, "model", &rlen);
305 if (!name) {
306 printk(KERN_ERR "PCI: model property not found.\n");
307 goto error;
308 }
309
310 wi4 = of_get_property(node, "reg", &rlen);
311 if (wi4 == NULL)
312 goto error;
313
314 devno = ((wi4[0] >> 8) & 0xff) >> 3;
315 fn = (wi4[0] >> 8) & 0x7;
316
317 pr_debug("PCI: celleb_setup_fake_pci() %s devno=%x fn=%x\n", name,
318 devno, fn);
319
320 size = 256;
321 config = &private->fake_config[devno][fn];
322 *config = zalloc_maybe_bootmem(size, GFP_KERNEL);
323 if (*config == NULL) {
324 printk(KERN_ERR "PCI: "
325 "not enough memory for fake configuration space\n");
326 goto error;
327 }
328 pr_debug("PCI: fake config area assigned 0x%016lx\n",
329 (unsigned long)*config);
330
331 size = sizeof(struct celleb_pci_resource);
332 res = &private->res[devno][fn];
333 *res = zalloc_maybe_bootmem(size, GFP_KERNEL);
334 if (*res == NULL) {
335 printk(KERN_ERR
336 "PCI: not enough memory for resource data space\n");
337 goto error;
338 }
339 pr_debug("PCI: res assigned 0x%016lx\n", (unsigned long)*res);
340
341 wi0 = of_get_property(node, "device-id", NULL);
342 wi1 = of_get_property(node, "vendor-id", NULL);
343 wi2 = of_get_property(node, "class-code", NULL);
344 wi3 = of_get_property(node, "revision-id", NULL);
345 if (!wi0 || !wi1 || !wi2 || !wi3) {
346 printk(KERN_ERR "PCI: Missing device tree properties.\n");
347 goto error;
348 }
349
350 celleb_config_write_fake(*config, PCI_DEVICE_ID, 2, wi0[0] & 0xffff);
351 celleb_config_write_fake(*config, PCI_VENDOR_ID, 2, wi1[0] & 0xffff);
352 pr_debug("class-code = 0x%08x\n", wi2[0]);
353
354 celleb_config_write_fake(*config, PCI_CLASS_PROG, 1, wi2[0] & 0xff);
355 celleb_config_write_fake(*config, PCI_CLASS_DEVICE, 2,
356 (wi2[0] >> 8) & 0xffff);
357 celleb_config_write_fake(*config, PCI_REVISION_ID, 1, wi3[0]);
358
359 while (num_base_addr < MAX_PCI_BASE_ADDRS) {
360 result = of_address_to_resource(node,
361 num_base_addr, &(*res)->r[num_base_addr]);
362 if (result)
363 break;
364 num_base_addr++;
365 }
366
367 celleb_setup_pci_base_addrs(hose, devno, fn, num_base_addr);
368
369 li = of_get_property(node, "interrupts", &rlen);
370 if (!li) {
371 printk(KERN_ERR "PCI: interrupts not found.\n");
372 goto error;
373 }
374 val = li[0];
375 celleb_config_write_fake(*config, PCI_INTERRUPT_PIN, 1, 1);
376 celleb_config_write_fake(*config, PCI_INTERRUPT_LINE, 1, val);
377
378#ifdef DEBUG
379 pr_debug("PCI: %s irq=%ld\n", name, li[0]);
380 for (i = 0; i < 6; i++) {
381 celleb_config_read_fake(*config,
382 PCI_BASE_ADDRESS_0 + 0x4 * i, 4,
383 &val);
384 pr_debug("PCI: %s fn=%d base_address_%d=0x%x\n",
385 name, fn, i, val);
386 }
387#endif
388
389 celleb_config_write_fake(*config, PCI_HEADER_TYPE, 1,
390 PCI_HEADER_TYPE_NORMAL);
391
392 return 0;
393
394error:
395 if (mem_init_done) {
396 if (config && *config)
397 kfree(*config);
398 if (res && *res)
399 kfree(*res);
400
401 } else {
402 if (config && *config) {
403 size = 256;
404 memblock_free(__pa(*config), size);
405 }
406 if (res && *res) {
407 size = sizeof(struct celleb_pci_resource);
408 memblock_free(__pa(*res), size);
409 }
410 }
411
412 return 1;
413}
414
415static int __init phb_set_bus_ranges(struct device_node *dev,
416 struct pci_controller *phb)
417{
418 const int *bus_range;
419 unsigned int len;
420
421 bus_range = of_get_property(dev, "bus-range", &len);
422 if (bus_range == NULL || len < 2 * sizeof(int))
423 return 1;
424
425 phb->first_busno = bus_range[0];
426 phb->last_busno = bus_range[1];
427
428 return 0;
429}
430
431static void __init celleb_alloc_private_mem(struct pci_controller *hose)
432{
433 hose->private_data =
434 zalloc_maybe_bootmem(sizeof(struct celleb_pci_private),
435 GFP_KERNEL);
436}
437
438static int __init celleb_setup_fake_pci(struct device_node *dev,
439 struct pci_controller *phb)
440{
441 struct device_node *node;
442
443 phb->ops = &celleb_fake_pci_ops;
444 celleb_alloc_private_mem(phb);
445
446 for (node = of_get_next_child(dev, NULL);
447 node != NULL; node = of_get_next_child(dev, node))
448 celleb_setup_fake_pci_device(node, phb);
449
450 return 0;
451}
452
453static struct celleb_phb_spec celleb_fake_pci_spec __initdata = {
454 .setup = celleb_setup_fake_pci,
455};
456
457static const struct of_device_id celleb_phb_match[] __initconst = {
458 {
459 .name = "pci-pseudo",
460 .data = &celleb_fake_pci_spec,
461 }, {
462 .name = "epci",
463 .data = &celleb_epci_spec,
464 }, {
465 .name = "pcie",
466 .data = &celleb_pciex_spec,
467 }, {
468 },
469};
470
471int __init celleb_setup_phb(struct pci_controller *phb)
472{
473 struct device_node *dev = phb->dn;
474 const struct of_device_id *match;
475 const struct celleb_phb_spec *phb_spec;
476 int rc;
477
478 match = of_match_node(celleb_phb_match, dev);
479 if (!match)
480 return 1;
481
482 phb_set_bus_ranges(dev, phb);
483 phb->buid = 1;
484
485 phb_spec = match->data;
486 rc = (*phb_spec->setup)(dev, phb);
487 if (rc)
488 return 1;
489
490 if (phb_spec->ops)
491 iowa_register_bus(phb, phb_spec->ops,
492 phb_spec->iowa_init,
493 phb_spec->iowa_data);
494 return 0;
495}
496
497int celleb_pci_probe_mode(struct pci_bus *bus)
498{
499 return PCI_PROBE_DEVTREE;
500}
diff --git a/arch/powerpc/platforms/cell/celleb_pci.h b/arch/powerpc/platforms/cell/celleb_pci.h
deleted file mode 100644
index a801fcc5f389..000000000000
--- a/arch/powerpc/platforms/cell/celleb_pci.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * pci prototypes for Celleb platform
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef _CELLEB_PCI_H
22#define _CELLEB_PCI_H
23
24#include <linux/pci.h>
25
26#include <asm/pci-bridge.h>
27#include <asm/prom.h>
28#include <asm/ppc-pci.h>
29#include <asm/io-workarounds.h>
30
31struct iowa_bus;
32
33struct celleb_phb_spec {
34 int (*setup)(struct device_node *, struct pci_controller *);
35 struct ppc_pci_io *ops;
36 int (*iowa_init)(struct iowa_bus *, void *);
37 void *iowa_data;
38};
39
40extern int celleb_setup_phb(struct pci_controller *);
41extern int celleb_pci_probe_mode(struct pci_bus *);
42
43extern struct celleb_phb_spec celleb_epci_spec;
44extern struct celleb_phb_spec celleb_pciex_spec;
45
46#endif /* _CELLEB_PCI_H */
diff --git a/arch/powerpc/platforms/cell/celleb_scc.h b/arch/powerpc/platforms/cell/celleb_scc.h
deleted file mode 100644
index b596a711c348..000000000000
--- a/arch/powerpc/platforms/cell/celleb_scc.h
+++ /dev/null
@@ -1,232 +0,0 @@
1/*
2 * SCC (Super Companion Chip) definitions
3 *
4 * (C) Copyright 2004-2006 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#ifndef _CELLEB_SCC_H
22#define _CELLEB_SCC_H
23
24#define PCI_VENDOR_ID_TOSHIBA_2 0x102f
25#define PCI_DEVICE_ID_TOSHIBA_SCC_PCIEXC_BRIDGE 0x01b0
26#define PCI_DEVICE_ID_TOSHIBA_SCC_EPCI_BRIDGE 0x01b1
27#define PCI_DEVICE_ID_TOSHIBA_SCC_BRIDGE 0x01b2
28#define PCI_DEVICE_ID_TOSHIBA_SCC_GBE 0x01b3
29#define PCI_DEVICE_ID_TOSHIBA_SCC_ATA 0x01b4
30#define PCI_DEVICE_ID_TOSHIBA_SCC_USB2 0x01b5
31#define PCI_DEVICE_ID_TOSHIBA_SCC_USB 0x01b6
32#define PCI_DEVICE_ID_TOSHIBA_SCC_ENCDEC 0x01b7
33
34#define SCC_EPCI_REG 0x0000d000
35
36/* EPCI registers */
37#define SCC_EPCI_CNF10_REG 0x010
38#define SCC_EPCI_CNF14_REG 0x014
39#define SCC_EPCI_CNF18_REG 0x018
40#define SCC_EPCI_PVBAT 0x100
41#define SCC_EPCI_VPMBAT 0x104
42#define SCC_EPCI_VPIBAT 0x108
43#define SCC_EPCI_VCSR 0x110
44#define SCC_EPCI_VIENAB 0x114
45#define SCC_EPCI_VISTAT 0x118
46#define SCC_EPCI_VRDCOUNT 0x124
47#define SCC_EPCI_BAM0 0x12c
48#define SCC_EPCI_BAM1 0x134
49#define SCC_EPCI_BAM2 0x13c
50#define SCC_EPCI_IADR 0x164
51#define SCC_EPCI_CLKRST 0x800
52#define SCC_EPCI_INTSET 0x804
53#define SCC_EPCI_STATUS 0x808
54#define SCC_EPCI_ABTSET 0x80c
55#define SCC_EPCI_WATRP 0x810
56#define SCC_EPCI_DUMYRADR 0x814
57#define SCC_EPCI_SWRESP 0x818
58#define SCC_EPCI_CNTOPT 0x81c
59#define SCC_EPCI_ECMODE 0xf00
60#define SCC_EPCI_IOM_AC_NUM 5
61#define SCC_EPCI_IOM_ACTE(n) (0xf10 + (n) * 4)
62#define SCC_EPCI_IOT_AC_NUM 4
63#define SCC_EPCI_IOT_ACTE(n) (0xf30 + (n) * 4)
64#define SCC_EPCI_MAEA 0xf50
65#define SCC_EPCI_MAEC 0xf54
66#define SCC_EPCI_CKCTRL 0xff0
67
68/* bits for SCC_EPCI_VCSR */
69#define SCC_EPCI_VCSR_FRE 0x00020000
70#define SCC_EPCI_VCSR_FWE 0x00010000
71#define SCC_EPCI_VCSR_DR 0x00000400
72#define SCC_EPCI_VCSR_SR 0x00000008
73#define SCC_EPCI_VCSR_AT 0x00000004
74
75/* bits for SCC_EPCI_VIENAB/SCC_EPCI_VISTAT */
76#define SCC_EPCI_VISTAT_PMPE 0x00000008
77#define SCC_EPCI_VISTAT_PMFE 0x00000004
78#define SCC_EPCI_VISTAT_PRA 0x00000002
79#define SCC_EPCI_VISTAT_PRD 0x00000001
80#define SCC_EPCI_VISTAT_ALL 0x0000000f
81
82#define SCC_EPCI_VIENAB_PMPEE 0x00000008
83#define SCC_EPCI_VIENAB_PMFEE 0x00000004
84#define SCC_EPCI_VIENAB_PRA 0x00000002
85#define SCC_EPCI_VIENAB_PRD 0x00000001
86#define SCC_EPCI_VIENAB_ALL 0x0000000f
87
88/* bits for SCC_EPCI_CLKRST */
89#define SCC_EPCI_CLKRST_CKS_MASK 0x00030000
90#define SCC_EPCI_CLKRST_CKS_2 0x00000000
91#define SCC_EPCI_CLKRST_CKS_4 0x00010000
92#define SCC_EPCI_CLKRST_CKS_8 0x00020000
93#define SCC_EPCI_CLKRST_PCICRST 0x00000400
94#define SCC_EPCI_CLKRST_BC 0x00000200
95#define SCC_EPCI_CLKRST_PCIRST 0x00000100
96#define SCC_EPCI_CLKRST_PCKEN 0x00000001
97
98/* bits for SCC_EPCI_INTSET/SCC_EPCI_STATUS */
99#define SCC_EPCI_INT_2M 0x01000000
100#define SCC_EPCI_INT_RERR 0x00200000
101#define SCC_EPCI_INT_SERR 0x00100000
102#define SCC_EPCI_INT_PRTER 0x00080000
103#define SCC_EPCI_INT_SER 0x00040000
104#define SCC_EPCI_INT_PER 0x00020000
105#define SCC_EPCI_INT_PAI 0x00010000
106#define SCC_EPCI_INT_1M 0x00000100
107#define SCC_EPCI_INT_PME 0x00000010
108#define SCC_EPCI_INT_INTD 0x00000008
109#define SCC_EPCI_INT_INTC 0x00000004
110#define SCC_EPCI_INT_INTB 0x00000002
111#define SCC_EPCI_INT_INTA 0x00000001
112#define SCC_EPCI_INT_DEVINT 0x0000000f
113#define SCC_EPCI_INT_ALL 0x003f001f
114#define SCC_EPCI_INT_ALLERR 0x003f0000
115
116/* bits for SCC_EPCI_CKCTRL */
117#define SCC_EPCI_CKCTRL_CRST0 0x00010000
118#define SCC_EPCI_CKCTRL_CRST1 0x00020000
119#define SCC_EPCI_CKCTRL_OCLKEN 0x00000100
120#define SCC_EPCI_CKCTRL_LCLKEN 0x00000001
121
122#define SCC_EPCI_IDSEL_AD_TO_SLOT(ad) ((ad) - 10)
123#define SCC_EPCI_MAX_DEVNU SCC_EPCI_IDSEL_AD_TO_SLOT(32)
124
125/* bits for SCC_EPCI_CNTOPT */
126#define SCC_EPCI_CNTOPT_O2PMB 0x00000002
127
128/* SCC PCIEXC SMMIO registers */
129#define PEXCADRS 0x000
130#define PEXCWDATA 0x004
131#define PEXCRDATA 0x008
132#define PEXDADRS 0x010
133#define PEXDCMND 0x014
134#define PEXDWDATA 0x018
135#define PEXDRDATA 0x01c
136#define PEXREQID 0x020
137#define PEXTIDMAP 0x024
138#define PEXINTMASK 0x028
139#define PEXINTSTS 0x02c
140#define PEXAERRMASK 0x030
141#define PEXAERRSTS 0x034
142#define PEXPRERRMASK 0x040
143#define PEXPRERRSTS 0x044
144#define PEXPRERRID01 0x048
145#define PEXPRERRID23 0x04c
146#define PEXVDMASK 0x050
147#define PEXVDSTS 0x054
148#define PEXRCVCPLIDA 0x060
149#define PEXLENERRIDA 0x068
150#define PEXPHYPLLST 0x070
151#define PEXDMRDEN0 0x100
152#define PEXDMRDADR0 0x104
153#define PEXDMRDENX 0x110
154#define PEXDMRDADRX 0x114
155#define PEXECMODE 0xf00
156#define PEXMAEA(n) (0xf50 + (8 * n))
157#define PEXMAEC(n) (0xf54 + (8 * n))
158#define PEXCCRCTRL 0xff0
159
160/* SCC PCIEXC bits and shifts for PEXCADRS */
161#define PEXCADRS_BYTE_EN_SHIFT 20
162#define PEXCADRS_CMD_SHIFT 16
163#define PEXCADRS_CMD_READ (0xa << PEXCADRS_CMD_SHIFT)
164#define PEXCADRS_CMD_WRITE (0xb << PEXCADRS_CMD_SHIFT)
165
166/* SCC PCIEXC shifts for PEXDADRS */
167#define PEXDADRS_BUSNO_SHIFT 20
168#define PEXDADRS_DEVNO_SHIFT 15
169#define PEXDADRS_FUNCNO_SHIFT 12
170
171/* SCC PCIEXC bits and shifts for PEXDCMND */
172#define PEXDCMND_BYTE_EN_SHIFT 4
173#define PEXDCMND_IO_READ 0x2
174#define PEXDCMND_IO_WRITE 0x3
175#define PEXDCMND_CONFIG_READ 0xa
176#define PEXDCMND_CONFIG_WRITE 0xb
177
178/* SCC PCIEXC bits for PEXPHYPLLST */
179#define PEXPHYPLLST_PEXPHYAPLLST 0x00000001
180
181/* SCC PCIEXC bits for PEXECMODE */
182#define PEXECMODE_ALL_THROUGH 0x00000000
183#define PEXECMODE_ALL_8BIT 0x00550155
184#define PEXECMODE_ALL_16BIT 0x00aa02aa
185
186/* SCC PCIEXC bits for PEXCCRCTRL */
187#define PEXCCRCTRL_PEXIPCOREEN 0x00040000
188#define PEXCCRCTRL_PEXIPCONTEN 0x00020000
189#define PEXCCRCTRL_PEXPHYPLLEN 0x00010000
190#define PEXCCRCTRL_PCIEXCAOCKEN 0x00000100
191
192/* SCC PCIEXC port configuration registers */
193#define PEXTCERRCHK 0x21c
194#define PEXTAMAPB0 0x220
195#define PEXTAMAPL0 0x224
196#define PEXTAMAPB(n) (PEXTAMAPB0 + 8 * (n))
197#define PEXTAMAPL(n) (PEXTAMAPL0 + 8 * (n))
198#define PEXCHVC0P 0x500
199#define PEXCHVC0NP 0x504
200#define PEXCHVC0C 0x508
201#define PEXCDVC0P 0x50c
202#define PEXCDVC0NP 0x510
203#define PEXCDVC0C 0x514
204#define PEXCHVCXP 0x518
205#define PEXCHVCXNP 0x51c
206#define PEXCHVCXC 0x520
207#define PEXCDVCXP 0x524
208#define PEXCDVCXNP 0x528
209#define PEXCDVCXC 0x52c
210#define PEXCTTRG 0x530
211#define PEXTSCTRL 0x700
212#define PEXTSSTS 0x704
213#define PEXSKPCTRL 0x708
214
215/* UHC registers */
216#define SCC_UHC_CKRCTRL 0xff0
217#define SCC_UHC_ECMODE 0xf00
218
219/* bits for SCC_UHC_CKRCTRL */
220#define SCC_UHC_F48MCKLEN 0x00000001
221#define SCC_UHC_P_SUSPEND 0x00000002
222#define SCC_UHC_PHY_SUSPEND_SEL 0x00000004
223#define SCC_UHC_HCLKEN 0x00000100
224#define SCC_UHC_USBEN 0x00010000
225#define SCC_UHC_USBCEN 0x00020000
226#define SCC_UHC_PHYEN 0x00040000
227
228/* bits for SCC_UHC_ECMODE */
229#define SCC_UHC_ECMODE_BY_BYTE 0x00000555
230#define SCC_UHC_ECMODE_BY_WORD 0x00000aaa
231
232#endif /* _CELLEB_SCC_H */
diff --git a/arch/powerpc/platforms/cell/celleb_scc_epci.c b/arch/powerpc/platforms/cell/celleb_scc_epci.c
deleted file mode 100644
index 9438bbed402f..000000000000
--- a/arch/powerpc/platforms/cell/celleb_scc_epci.c
+++ /dev/null
@@ -1,428 +0,0 @@
1/*
2 * Support for SCC external PCI
3 *
4 * (C) Copyright 2004-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#undef DEBUG
22
23#include <linux/kernel.h>
24#include <linux/threads.h>
25#include <linux/pci.h>
26#include <linux/init.h>
27#include <linux/pci_regs.h>
28
29#include <asm/io.h>
30#include <asm/irq.h>
31#include <asm/prom.h>
32#include <asm/pci-bridge.h>
33#include <asm/ppc-pci.h>
34
35#include "celleb_scc.h"
36#include "celleb_pci.h"
37
38#define MAX_PCI_DEVICES 32
39#define MAX_PCI_FUNCTIONS 8
40
41#define iob() __asm__ __volatile__("eieio; sync":::"memory")
42
43static inline PCI_IO_ADDR celleb_epci_get_epci_base(
44 struct pci_controller *hose)
45{
46 /*
47 * Note:
48 * Celleb epci uses cfg_addr as a base address for
49 * epci control registers.
50 */
51
52 return hose->cfg_addr;
53}
54
55static inline PCI_IO_ADDR celleb_epci_get_epci_cfg(
56 struct pci_controller *hose)
57{
58 /*
59 * Note:
60 * Celleb epci uses cfg_data as a base address for
61 * configuration area for epci devices.
62 */
63
64 return hose->cfg_data;
65}
66
67static inline void clear_and_disable_master_abort_interrupt(
68 struct pci_controller *hose)
69{
70 PCI_IO_ADDR epci_base;
71 PCI_IO_ADDR reg;
72 epci_base = celleb_epci_get_epci_base(hose);
73 reg = epci_base + PCI_COMMAND;
74 out_be32(reg, in_be32(reg) | (PCI_STATUS_REC_MASTER_ABORT << 16));
75}
76
77static int celleb_epci_check_abort(struct pci_controller *hose,
78 PCI_IO_ADDR addr)
79{
80 PCI_IO_ADDR reg;
81 PCI_IO_ADDR epci_base;
82 u32 val;
83
84 iob();
85 epci_base = celleb_epci_get_epci_base(hose);
86
87 reg = epci_base + PCI_COMMAND;
88 val = in_be32(reg);
89
90 if (val & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
91 out_be32(reg,
92 (val & 0xffff) | (PCI_STATUS_REC_MASTER_ABORT << 16));
93
94 /* clear PCI Controller error, FRE, PMFE */
95 reg = epci_base + SCC_EPCI_STATUS;
96 out_be32(reg, SCC_EPCI_INT_PAI);
97
98 reg = epci_base + SCC_EPCI_VCSR;
99 val = in_be32(reg) & 0xffff;
100 val |= SCC_EPCI_VCSR_FRE;
101 out_be32(reg, val);
102
103 reg = epci_base + SCC_EPCI_VISTAT;
104 out_be32(reg, SCC_EPCI_VISTAT_PMFE);
105 return PCIBIOS_DEVICE_NOT_FOUND;
106 }
107
108 return PCIBIOS_SUCCESSFUL;
109}
110
111static PCI_IO_ADDR celleb_epci_make_config_addr(struct pci_bus *bus,
112 struct pci_controller *hose, unsigned int devfn, int where)
113{
114 PCI_IO_ADDR addr;
115
116 if (bus != hose->bus)
117 addr = celleb_epci_get_epci_cfg(hose) +
118 (((bus->number & 0xff) << 16)
119 | ((devfn & 0xff) << 8)
120 | (where & 0xff)
121 | 0x01000000);
122 else
123 addr = celleb_epci_get_epci_cfg(hose) +
124 (((devfn & 0xff) << 8) | (where & 0xff));
125
126 pr_debug("EPCI: config_addr = 0x%p\n", addr);
127
128 return addr;
129}
130
131static int celleb_epci_read_config(struct pci_bus *bus,
132 unsigned int devfn, int where, int size, u32 *val)
133{
134 PCI_IO_ADDR epci_base;
135 PCI_IO_ADDR addr;
136 struct pci_controller *hose = pci_bus_to_host(bus);
137
138 /* allignment check */
139 BUG_ON(where % size);
140
141 if (!celleb_epci_get_epci_cfg(hose))
142 return PCIBIOS_DEVICE_NOT_FOUND;
143
144 if (bus->number == hose->first_busno && devfn == 0) {
145 /* EPCI controller self */
146
147 epci_base = celleb_epci_get_epci_base(hose);
148 addr = epci_base + where;
149
150 switch (size) {
151 case 1:
152 *val = in_8(addr);
153 break;
154 case 2:
155 *val = in_be16(addr);
156 break;
157 case 4:
158 *val = in_be32(addr);
159 break;
160 default:
161 return PCIBIOS_DEVICE_NOT_FOUND;
162 }
163
164 } else {
165
166 clear_and_disable_master_abort_interrupt(hose);
167 addr = celleb_epci_make_config_addr(bus, hose, devfn, where);
168
169 switch (size) {
170 case 1:
171 *val = in_8(addr);
172 break;
173 case 2:
174 *val = in_le16(addr);
175 break;
176 case 4:
177 *val = in_le32(addr);
178 break;
179 default:
180 return PCIBIOS_DEVICE_NOT_FOUND;
181 }
182 }
183
184 pr_debug("EPCI: "
185 "addr=0x%p, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n",
186 addr, devfn, where, size, *val);
187
188 return celleb_epci_check_abort(hose, NULL);
189}
190
191static int celleb_epci_write_config(struct pci_bus *bus,
192 unsigned int devfn, int where, int size, u32 val)
193{
194 PCI_IO_ADDR epci_base;
195 PCI_IO_ADDR addr;
196 struct pci_controller *hose = pci_bus_to_host(bus);
197
198 /* allignment check */
199 BUG_ON(where % size);
200
201 if (!celleb_epci_get_epci_cfg(hose))
202 return PCIBIOS_DEVICE_NOT_FOUND;
203
204 if (bus->number == hose->first_busno && devfn == 0) {
205 /* EPCI controller self */
206
207 epci_base = celleb_epci_get_epci_base(hose);
208 addr = epci_base + where;
209
210 switch (size) {
211 case 1:
212 out_8(addr, val);
213 break;
214 case 2:
215 out_be16(addr, val);
216 break;
217 case 4:
218 out_be32(addr, val);
219 break;
220 default:
221 return PCIBIOS_DEVICE_NOT_FOUND;
222 }
223
224 } else {
225
226 clear_and_disable_master_abort_interrupt(hose);
227 addr = celleb_epci_make_config_addr(bus, hose, devfn, where);
228
229 switch (size) {
230 case 1:
231 out_8(addr, val);
232 break;
233 case 2:
234 out_le16(addr, val);
235 break;
236 case 4:
237 out_le32(addr, val);
238 break;
239 default:
240 return PCIBIOS_DEVICE_NOT_FOUND;
241 }
242 }
243
244 return celleb_epci_check_abort(hose, addr);
245}
246
247struct pci_ops celleb_epci_ops = {
248 .read = celleb_epci_read_config,
249 .write = celleb_epci_write_config,
250};
251
252/* to be moved in FW */
253static int __init celleb_epci_init(struct pci_controller *hose)
254{
255 u32 val;
256 PCI_IO_ADDR reg;
257 PCI_IO_ADDR epci_base;
258 int hwres = 0;
259
260 epci_base = celleb_epci_get_epci_base(hose);
261
262 /* PCI core reset(Internal bus and PCI clock) */
263 reg = epci_base + SCC_EPCI_CKCTRL;
264 val = in_be32(reg);
265 if (val == 0x00030101)
266 hwres = 1;
267 else {
268 val &= ~(SCC_EPCI_CKCTRL_CRST0 | SCC_EPCI_CKCTRL_CRST1);
269 out_be32(reg, val);
270
271 /* set PCI core clock */
272 val = in_be32(reg);
273 val |= (SCC_EPCI_CKCTRL_OCLKEN | SCC_EPCI_CKCTRL_LCLKEN);
274 out_be32(reg, val);
275
276 /* release PCI core reset (internal bus) */
277 val = in_be32(reg);
278 val |= SCC_EPCI_CKCTRL_CRST0;
279 out_be32(reg, val);
280
281 /* set PCI clock select */
282 reg = epci_base + SCC_EPCI_CLKRST;
283 val = in_be32(reg);
284 val &= ~SCC_EPCI_CLKRST_CKS_MASK;
285 val |= SCC_EPCI_CLKRST_CKS_2;
286 out_be32(reg, val);
287
288 /* set arbiter */
289 reg = epci_base + SCC_EPCI_ABTSET;
290 out_be32(reg, 0x0f1f001f); /* temporary value */
291
292 /* buffer on */
293 reg = epci_base + SCC_EPCI_CLKRST;
294 val = in_be32(reg);
295 val |= SCC_EPCI_CLKRST_BC;
296 out_be32(reg, val);
297
298 /* PCI clock enable */
299 val = in_be32(reg);
300 val |= SCC_EPCI_CLKRST_PCKEN;
301 out_be32(reg, val);
302
303 /* release PCI core reset (all) */
304 reg = epci_base + SCC_EPCI_CKCTRL;
305 val = in_be32(reg);
306 val |= (SCC_EPCI_CKCTRL_CRST0 | SCC_EPCI_CKCTRL_CRST1);
307 out_be32(reg, val);
308
309 /* set base translation registers. (already set by Beat) */
310
311 /* set base address masks. (already set by Beat) */
312 }
313
314 /* release interrupt masks and clear all interrupts */
315 reg = epci_base + SCC_EPCI_INTSET;
316 out_be32(reg, 0x013f011f); /* all interrupts enable */
317 reg = epci_base + SCC_EPCI_VIENAB;
318 val = SCC_EPCI_VIENAB_PMPEE | SCC_EPCI_VIENAB_PMFEE;
319 out_be32(reg, val);
320 reg = epci_base + SCC_EPCI_STATUS;
321 out_be32(reg, 0xffffffff);
322 reg = epci_base + SCC_EPCI_VISTAT;
323 out_be32(reg, 0xffffffff);
324
325 /* disable PCI->IB address translation */
326 reg = epci_base + SCC_EPCI_VCSR;
327 val = in_be32(reg);
328 val &= ~(SCC_EPCI_VCSR_DR | SCC_EPCI_VCSR_AT);
329 out_be32(reg, val);
330
331 /* set base addresses. (no need to set?) */
332
333 /* memory space, bus master enable */
334 reg = epci_base + PCI_COMMAND;
335 val = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
336 out_be32(reg, val);
337
338 /* endian mode setup */
339 reg = epci_base + SCC_EPCI_ECMODE;
340 val = 0x00550155;
341 out_be32(reg, val);
342
343 /* set control option */
344 reg = epci_base + SCC_EPCI_CNTOPT;
345 val = in_be32(reg);
346 val |= SCC_EPCI_CNTOPT_O2PMB;
347 out_be32(reg, val);
348
349 /* XXX: temporay: set registers for address conversion setup */
350 reg = epci_base + SCC_EPCI_CNF10_REG;
351 out_be32(reg, 0x80000008);
352 reg = epci_base + SCC_EPCI_CNF14_REG;
353 out_be32(reg, 0x40000008);
354
355 reg = epci_base + SCC_EPCI_BAM0;
356 out_be32(reg, 0x80000000);
357 reg = epci_base + SCC_EPCI_BAM1;
358 out_be32(reg, 0xe0000000);
359
360 reg = epci_base + SCC_EPCI_PVBAT;
361 out_be32(reg, 0x80000000);
362
363 if (!hwres) {
364 /* release external PCI reset */
365 reg = epci_base + SCC_EPCI_CLKRST;
366 val = in_be32(reg);
367 val |= SCC_EPCI_CLKRST_PCIRST;
368 out_be32(reg, val);
369 }
370
371 return 0;
372}
373
374static int __init celleb_setup_epci(struct device_node *node,
375 struct pci_controller *hose)
376{
377 struct resource r;
378
379 pr_debug("PCI: celleb_setup_epci()\n");
380
381 /*
382 * Note:
383 * Celleb epci uses cfg_addr and cfg_data member of
384 * pci_controller structure in irregular way.
385 *
386 * cfg_addr is used to map for control registers of
387 * celleb epci.
388 *
389 * cfg_data is used for configuration area of devices
390 * on Celleb epci buses.
391 */
392
393 if (of_address_to_resource(node, 0, &r))
394 goto error;
395 hose->cfg_addr = ioremap(r.start, resource_size(&r));
396 if (!hose->cfg_addr)
397 goto error;
398 pr_debug("EPCI: cfg_addr map 0x%016llx->0x%016lx + 0x%016llx\n",
399 r.start, (unsigned long)hose->cfg_addr, resource_size(&r));
400
401 if (of_address_to_resource(node, 2, &r))
402 goto error;
403 hose->cfg_data = ioremap(r.start, resource_size(&r));
404 if (!hose->cfg_data)
405 goto error;
406 pr_debug("EPCI: cfg_data map 0x%016llx->0x%016lx + 0x%016llx\n",
407 r.start, (unsigned long)hose->cfg_data, resource_size(&r));
408
409 hose->ops = &celleb_epci_ops;
410 celleb_epci_init(hose);
411
412 return 0;
413
414error:
415 if (hose->cfg_addr)
416 iounmap(hose->cfg_addr);
417
418 if (hose->cfg_data)
419 iounmap(hose->cfg_data);
420 return 1;
421}
422
423struct celleb_phb_spec celleb_epci_spec __initdata = {
424 .setup = celleb_setup_epci,
425 .ops = &spiderpci_ops,
426 .iowa_init = &spiderpci_iowa_init,
427 .iowa_data = (void *)0,
428};
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
deleted file mode 100644
index 94170e4f2ce7..000000000000
--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+++ /dev/null
@@ -1,538 +0,0 @@
1/*
2 * Support for Celleb PCI-Express.
3 *
4 * (C) Copyright 2007-2008 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#undef DEBUG
22
23#include <linux/kernel.h>
24#include <linux/pci.h>
25#include <linux/string.h>
26#include <linux/slab.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h>
30
31#include <asm/io.h>
32#include <asm/irq.h>
33#include <asm/iommu.h>
34#include <asm/byteorder.h>
35
36#include "celleb_scc.h"
37#include "celleb_pci.h"
38
39#define PEX_IN(base, off) in_be32((void __iomem *)(base) + (off))
40#define PEX_OUT(base, off, data) out_be32((void __iomem *)(base) + (off), (data))
41
42static void scc_pciex_io_flush(struct iowa_bus *bus)
43{
44 (void)PEX_IN(bus->phb->cfg_addr, PEXDMRDEN0);
45}
46
47/*
48 * Memory space access to device on PCIEX
49 */
50#define PCIEX_MMIO_READ(name, ret) \
51static ret scc_pciex_##name(const PCI_IO_ADDR addr) \
52{ \
53 ret val = __do_##name(addr); \
54 scc_pciex_io_flush(iowa_mem_find_bus(addr)); \
55 return val; \
56}
57
58#define PCIEX_MMIO_READ_STR(name) \
59static void scc_pciex_##name(const PCI_IO_ADDR addr, void *buf, \
60 unsigned long count) \
61{ \
62 __do_##name(addr, buf, count); \
63 scc_pciex_io_flush(iowa_mem_find_bus(addr)); \
64}
65
66PCIEX_MMIO_READ(readb, u8)
67PCIEX_MMIO_READ(readw, u16)
68PCIEX_MMIO_READ(readl, u32)
69PCIEX_MMIO_READ(readq, u64)
70PCIEX_MMIO_READ(readw_be, u16)
71PCIEX_MMIO_READ(readl_be, u32)
72PCIEX_MMIO_READ(readq_be, u64)
73PCIEX_MMIO_READ_STR(readsb)
74PCIEX_MMIO_READ_STR(readsw)
75PCIEX_MMIO_READ_STR(readsl)
76
77static void scc_pciex_memcpy_fromio(void *dest, const PCI_IO_ADDR src,
78 unsigned long n)
79{
80 __do_memcpy_fromio(dest, src, n);
81 scc_pciex_io_flush(iowa_mem_find_bus(src));
82}
83
84/*
85 * I/O port access to devices on PCIEX.
86 */
87
88static inline unsigned long get_bus_address(struct pci_controller *phb,
89 unsigned long port)
90{
91 return port - ((unsigned long)(phb->io_base_virt) - _IO_BASE);
92}
93
94static u32 scc_pciex_read_port(struct pci_controller *phb,
95 unsigned long port, int size)
96{
97 unsigned int byte_enable;
98 unsigned int cmd, shift;
99 unsigned long addr;
100 u32 data, ret;
101
102 BUG_ON(((port & 0x3ul) + size) > 4);
103
104 addr = get_bus_address(phb, port);
105 shift = addr & 0x3ul;
106 byte_enable = ((1 << size) - 1) << shift;
107 cmd = PEXDCMND_IO_READ | (byte_enable << PEXDCMND_BYTE_EN_SHIFT);
108 PEX_OUT(phb->cfg_addr, PEXDADRS, (addr & ~0x3ul));
109 PEX_OUT(phb->cfg_addr, PEXDCMND, cmd);
110 data = PEX_IN(phb->cfg_addr, PEXDRDATA);
111 ret = (data >> (shift * 8)) & (0xFFFFFFFF >> ((4 - size) * 8));
112
113 pr_debug("PCIEX:PIO READ:port=0x%lx, addr=0x%lx, size=%d, be=%x,"
114 " cmd=%x, data=%x, ret=%x\n", port, addr, size, byte_enable,
115 cmd, data, ret);
116
117 return ret;
118}
119
120static void scc_pciex_write_port(struct pci_controller *phb,
121 unsigned long port, int size, u32 val)
122{
123 unsigned int byte_enable;
124 unsigned int cmd, shift;
125 unsigned long addr;
126 u32 data;
127
128 BUG_ON(((port & 0x3ul) + size) > 4);
129
130 addr = get_bus_address(phb, port);
131 shift = addr & 0x3ul;
132 byte_enable = ((1 << size) - 1) << shift;
133 cmd = PEXDCMND_IO_WRITE | (byte_enable << PEXDCMND_BYTE_EN_SHIFT);
134 data = (val & (0xFFFFFFFF >> (4 - size) * 8)) << (shift * 8);
135 PEX_OUT(phb->cfg_addr, PEXDADRS, (addr & ~0x3ul));
136 PEX_OUT(phb->cfg_addr, PEXDCMND, cmd);
137 PEX_OUT(phb->cfg_addr, PEXDWDATA, data);
138
139 pr_debug("PCIEX:PIO WRITE:port=0x%lx, addr=%lx, size=%d, val=%x,"
140 " be=%x, cmd=%x, data=%x\n", port, addr, size, val,
141 byte_enable, cmd, data);
142}
143
144static u8 __scc_pciex_inb(struct pci_controller *phb, unsigned long port)
145{
146 return (u8)scc_pciex_read_port(phb, port, 1);
147}
148
149static u16 __scc_pciex_inw(struct pci_controller *phb, unsigned long port)
150{
151 u32 data;
152 if ((port & 0x3ul) < 3)
153 data = scc_pciex_read_port(phb, port, 2);
154 else {
155 u32 d1 = scc_pciex_read_port(phb, port, 1);
156 u32 d2 = scc_pciex_read_port(phb, port + 1, 1);
157 data = d1 | (d2 << 8);
158 }
159 return (u16)data;
160}
161
162static u32 __scc_pciex_inl(struct pci_controller *phb, unsigned long port)
163{
164 unsigned int mod = port & 0x3ul;
165 u32 data;
166 if (mod == 0)
167 data = scc_pciex_read_port(phb, port, 4);
168 else {
169 u32 d1 = scc_pciex_read_port(phb, port, 4 - mod);
170 u32 d2 = scc_pciex_read_port(phb, port + 1, mod);
171 data = d1 | (d2 << (mod * 8));
172 }
173 return data;
174}
175
176static void __scc_pciex_outb(struct pci_controller *phb,
177 u8 val, unsigned long port)
178{
179 scc_pciex_write_port(phb, port, 1, (u32)val);
180}
181
182static void __scc_pciex_outw(struct pci_controller *phb,
183 u16 val, unsigned long port)
184{
185 if ((port & 0x3ul) < 3)
186 scc_pciex_write_port(phb, port, 2, (u32)val);
187 else {
188 u32 d1 = val & 0x000000FF;
189 u32 d2 = (val & 0x0000FF00) >> 8;
190 scc_pciex_write_port(phb, port, 1, d1);
191 scc_pciex_write_port(phb, port + 1, 1, d2);
192 }
193}
194
195static void __scc_pciex_outl(struct pci_controller *phb,
196 u32 val, unsigned long port)
197{
198 unsigned int mod = port & 0x3ul;
199 if (mod == 0)
200 scc_pciex_write_port(phb, port, 4, val);
201 else {
202 u32 d1 = val & (0xFFFFFFFFul >> (mod * 8));
203 u32 d2 = val >> ((4 - mod) * 8);
204 scc_pciex_write_port(phb, port, 4 - mod, d1);
205 scc_pciex_write_port(phb, port + 1, mod, d2);
206 }
207}
208
209#define PCIEX_PIO_FUNC(size, name) \
210static u##size scc_pciex_in##name(unsigned long port) \
211{ \
212 struct iowa_bus *bus = iowa_pio_find_bus(port); \
213 u##size data = __scc_pciex_in##name(bus->phb, port); \
214 scc_pciex_io_flush(bus); \
215 return data; \
216} \
217static void scc_pciex_ins##name(unsigned long p, void *b, unsigned long c) \
218{ \
219 struct iowa_bus *bus = iowa_pio_find_bus(p); \
220 __le##size *dst = b; \
221 for (; c != 0; c--, dst++) \
222 *dst = cpu_to_le##size(__scc_pciex_in##name(bus->phb, p)); \
223 scc_pciex_io_flush(bus); \
224} \
225static void scc_pciex_out##name(u##size val, unsigned long port) \
226{ \
227 struct iowa_bus *bus = iowa_pio_find_bus(port); \
228 __scc_pciex_out##name(bus->phb, val, port); \
229} \
230static void scc_pciex_outs##name(unsigned long p, const void *b, \
231 unsigned long c) \
232{ \
233 struct iowa_bus *bus = iowa_pio_find_bus(p); \
234 const __le##size *src = b; \
235 for (; c != 0; c--, src++) \
236 __scc_pciex_out##name(bus->phb, le##size##_to_cpu(*src), p); \
237}
238#define __le8 u8
239#define cpu_to_le8(x) (x)
240#define le8_to_cpu(x) (x)
241PCIEX_PIO_FUNC(8, b)
242PCIEX_PIO_FUNC(16, w)
243PCIEX_PIO_FUNC(32, l)
244
245static struct ppc_pci_io scc_pciex_ops = {
246 .readb = scc_pciex_readb,
247 .readw = scc_pciex_readw,
248 .readl = scc_pciex_readl,
249 .readq = scc_pciex_readq,
250 .readw_be = scc_pciex_readw_be,
251 .readl_be = scc_pciex_readl_be,
252 .readq_be = scc_pciex_readq_be,
253 .readsb = scc_pciex_readsb,
254 .readsw = scc_pciex_readsw,
255 .readsl = scc_pciex_readsl,
256 .memcpy_fromio = scc_pciex_memcpy_fromio,
257 .inb = scc_pciex_inb,
258 .inw = scc_pciex_inw,
259 .inl = scc_pciex_inl,
260 .outb = scc_pciex_outb,
261 .outw = scc_pciex_outw,
262 .outl = scc_pciex_outl,
263 .insb = scc_pciex_insb,
264 .insw = scc_pciex_insw,
265 .insl = scc_pciex_insl,
266 .outsb = scc_pciex_outsb,
267 .outsw = scc_pciex_outsw,
268 .outsl = scc_pciex_outsl,
269};
270
271static int __init scc_pciex_iowa_init(struct iowa_bus *bus, void *data)
272{
273 dma_addr_t dummy_page_da;
274 void *dummy_page_va;
275
276 dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
277 if (!dummy_page_va) {
278 pr_err("PCIEX:Alloc dummy_page_va failed\n");
279 return -1;
280 }
281
282 dummy_page_da = dma_map_single(bus->phb->parent, dummy_page_va,
283 PAGE_SIZE, DMA_FROM_DEVICE);
284 if (dma_mapping_error(bus->phb->parent, dummy_page_da)) {
285 pr_err("PCIEX:Map dummy page failed.\n");
286 kfree(dummy_page_va);
287 return -1;
288 }
289
290 PEX_OUT(bus->phb->cfg_addr, PEXDMRDADR0, dummy_page_da);
291
292 return 0;
293}
294
295/*
296 * config space access
297 */
298#define MK_PEXDADRS(bus_no, dev_no, func_no, addr) \
299 ((uint32_t)(((addr) & ~0x3UL) | \
300 ((bus_no) << PEXDADRS_BUSNO_SHIFT) | \
301 ((dev_no) << PEXDADRS_DEVNO_SHIFT) | \
302 ((func_no) << PEXDADRS_FUNCNO_SHIFT)))
303
304#define MK_PEXDCMND_BYTE_EN(addr, size) \
305 ((((0x1 << (size))-1) << ((addr) & 0x3)) << PEXDCMND_BYTE_EN_SHIFT)
306#define MK_PEXDCMND(cmd, addr, size) ((cmd) | MK_PEXDCMND_BYTE_EN(addr, size))
307
308static uint32_t config_read_pciex_dev(unsigned int __iomem *base,
309 uint64_t bus_no, uint64_t dev_no, uint64_t func_no,
310 uint64_t off, uint64_t size)
311{
312 uint32_t ret;
313 uint32_t addr, cmd;
314
315 addr = MK_PEXDADRS(bus_no, dev_no, func_no, off);
316 cmd = MK_PEXDCMND(PEXDCMND_CONFIG_READ, off, size);
317 PEX_OUT(base, PEXDADRS, addr);
318 PEX_OUT(base, PEXDCMND, cmd);
319 ret = (PEX_IN(base, PEXDRDATA)
320 >> ((off & (4-size)) * 8)) & ((0x1 << (size * 8)) - 1);
321 return ret;
322}
323
324static void config_write_pciex_dev(unsigned int __iomem *base, uint64_t bus_no,
325 uint64_t dev_no, uint64_t func_no, uint64_t off, uint64_t size,
326 uint32_t data)
327{
328 uint32_t addr, cmd;
329
330 addr = MK_PEXDADRS(bus_no, dev_no, func_no, off);
331 cmd = MK_PEXDCMND(PEXDCMND_CONFIG_WRITE, off, size);
332 PEX_OUT(base, PEXDADRS, addr);
333 PEX_OUT(base, PEXDCMND, cmd);
334 PEX_OUT(base, PEXDWDATA,
335 (data & ((0x1 << (size * 8)) - 1)) << ((off & (4-size)) * 8));
336}
337
338#define MK_PEXCADRS_BYTE_EN(off, len) \
339 ((((0x1 << (len)) - 1) << ((off) & 0x3)) << PEXCADRS_BYTE_EN_SHIFT)
340#define MK_PEXCADRS(cmd, addr, size) \
341 ((cmd) | MK_PEXCADRS_BYTE_EN(addr, size) | ((addr) & ~0x3))
342static uint32_t config_read_pciex_rc(unsigned int __iomem *base,
343 uint32_t where, uint32_t size)
344{
345 PEX_OUT(base, PEXCADRS, MK_PEXCADRS(PEXCADRS_CMD_READ, where, size));
346 return (PEX_IN(base, PEXCRDATA)
347 >> ((where & (4 - size)) * 8)) & ((0x1 << (size * 8)) - 1);
348}
349
350static void config_write_pciex_rc(unsigned int __iomem *base, uint32_t where,
351 uint32_t size, uint32_t val)
352{
353 uint32_t data;
354
355 data = (val & ((0x1 << (size * 8)) - 1)) << ((where & (4 - size)) * 8);
356 PEX_OUT(base, PEXCADRS, MK_PEXCADRS(PEXCADRS_CMD_WRITE, where, size));
357 PEX_OUT(base, PEXCWDATA, data);
358}
359
360/* Interfaces */
361/* Note: Work-around
362 * On SCC PCIEXC, one device is seen on all 32 dev_no.
363 * As SCC PCIEXC can have only one device on the bus, we look only one dev_no.
364 * (dev_no = 1)
365 */
366static int scc_pciex_read_config(struct pci_bus *bus, unsigned int devfn,
367 int where, int size, unsigned int *val)
368{
369 struct pci_controller *phb = pci_bus_to_host(bus);
370
371 if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1) {
372 *val = ~0;
373 return PCIBIOS_DEVICE_NOT_FOUND;
374 }
375
376 if (bus->number == 0 && PCI_SLOT(devfn) == 0)
377 *val = config_read_pciex_rc(phb->cfg_addr, where, size);
378 else
379 *val = config_read_pciex_dev(phb->cfg_addr, bus->number,
380 PCI_SLOT(devfn), PCI_FUNC(devfn), where, size);
381
382 return PCIBIOS_SUCCESSFUL;
383}
384
385static int scc_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
386 int where, int size, unsigned int val)
387{
388 struct pci_controller *phb = pci_bus_to_host(bus);
389
390 if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1)
391 return PCIBIOS_DEVICE_NOT_FOUND;
392
393 if (bus->number == 0 && PCI_SLOT(devfn) == 0)
394 config_write_pciex_rc(phb->cfg_addr, where, size, val);
395 else
396 config_write_pciex_dev(phb->cfg_addr, bus->number,
397 PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val);
398 return PCIBIOS_SUCCESSFUL;
399}
400
401static struct pci_ops scc_pciex_pci_ops = {
402 .read = scc_pciex_read_config,
403 .write = scc_pciex_write_config,
404};
405
406static void pciex_clear_intr_all(unsigned int __iomem *base)
407{
408 PEX_OUT(base, PEXAERRSTS, 0xffffffff);
409 PEX_OUT(base, PEXPRERRSTS, 0xffffffff);
410 PEX_OUT(base, PEXINTSTS, 0xffffffff);
411}
412
413#if 0
414static void pciex_disable_intr_all(unsigned int *base)
415{
416 PEX_OUT(base, PEXINTMASK, 0x0);
417 PEX_OUT(base, PEXAERRMASK, 0x0);
418 PEX_OUT(base, PEXPRERRMASK, 0x0);
419 PEX_OUT(base, PEXVDMASK, 0x0);
420}
421#endif
422
423static void pciex_enable_intr_all(unsigned int __iomem *base)
424{
425 PEX_OUT(base, PEXINTMASK, 0x0000e7f1);
426 PEX_OUT(base, PEXAERRMASK, 0x03ff01ff);
427 PEX_OUT(base, PEXPRERRMASK, 0x0001010f);
428 PEX_OUT(base, PEXVDMASK, 0x00000001);
429}
430
431static void pciex_check_status(unsigned int __iomem *base)
432{
433 uint32_t err = 0;
434 uint32_t intsts, aerr, prerr, rcvcp, lenerr;
435 uint32_t maea, maec;
436
437 intsts = PEX_IN(base, PEXINTSTS);
438 aerr = PEX_IN(base, PEXAERRSTS);
439 prerr = PEX_IN(base, PEXPRERRSTS);
440 rcvcp = PEX_IN(base, PEXRCVCPLIDA);
441 lenerr = PEX_IN(base, PEXLENERRIDA);
442
443 if (intsts || aerr || prerr || rcvcp || lenerr)
444 err = 1;
445
446 pr_info("PCEXC interrupt!!\n");
447 pr_info("PEXINTSTS :0x%08x\n", intsts);
448 pr_info("PEXAERRSTS :0x%08x\n", aerr);
449 pr_info("PEXPRERRSTS :0x%08x\n", prerr);
450 pr_info("PEXRCVCPLIDA :0x%08x\n", rcvcp);
451 pr_info("PEXLENERRIDA :0x%08x\n", lenerr);
452
453 /* print detail of Protection Error */
454 if (intsts & 0x00004000) {
455 uint32_t i, n;
456 for (i = 0; i < 4; i++) {
457 n = 1 << i;
458 if (prerr & n) {
459 maea = PEX_IN(base, PEXMAEA(i));
460 maec = PEX_IN(base, PEXMAEC(i));
461 pr_info("PEXMAEC%d :0x%08x\n", i, maec);
462 pr_info("PEXMAEA%d :0x%08x\n", i, maea);
463 }
464 }
465 }
466
467 if (err)
468 pciex_clear_intr_all(base);
469}
470
471static irqreturn_t pciex_handle_internal_irq(int irq, void *dev_id)
472{
473 struct pci_controller *phb = dev_id;
474
475 pr_debug("PCIEX:pciex_handle_internal_irq(irq=%d)\n", irq);
476
477 BUG_ON(phb->cfg_addr == NULL);
478
479 pciex_check_status(phb->cfg_addr);
480
481 return IRQ_HANDLED;
482}
483
484static __init int celleb_setup_pciex(struct device_node *node,
485 struct pci_controller *phb)
486{
487 struct resource r;
488 int virq;
489
490 /* SMMIO registers; used inside this file */
491 if (of_address_to_resource(node, 0, &r)) {
492 pr_err("PCIEXC:Failed to get config resource.\n");
493 return 1;
494 }
495 phb->cfg_addr = ioremap(r.start, resource_size(&r));
496 if (!phb->cfg_addr) {
497 pr_err("PCIEXC:Failed to remap SMMIO region.\n");
498 return 1;
499 }
500
501 /* Not use cfg_data, cmd and data regs are near address reg */
502 phb->cfg_data = NULL;
503
504 /* set pci_ops */
505 phb->ops = &scc_pciex_pci_ops;
506
507 /* internal interrupt handler */
508 virq = irq_of_parse_and_map(node, 1);
509 if (!virq) {
510 pr_err("PCIEXC:Failed to map irq\n");
511 goto error;
512 }
513 if (request_irq(virq, pciex_handle_internal_irq,
514 0, "pciex", (void *)phb)) {
515 pr_err("PCIEXC:Failed to request irq\n");
516 goto error;
517 }
518
519 /* enable all interrupts */
520 pciex_clear_intr_all(phb->cfg_addr);
521 pciex_enable_intr_all(phb->cfg_addr);
522 /* MSI: TBD */
523
524 return 0;
525
526error:
527 phb->cfg_data = NULL;
528 if (phb->cfg_addr)
529 iounmap(phb->cfg_addr);
530 phb->cfg_addr = NULL;
531 return 1;
532}
533
534struct celleb_phb_spec celleb_pciex_spec __initdata = {
535 .setup = celleb_setup_pciex,
536 .ops = &scc_pciex_ops,
537 .iowa_init = &scc_pciex_iowa_init,
538};
diff --git a/arch/powerpc/platforms/cell/celleb_scc_sio.c b/arch/powerpc/platforms/cell/celleb_scc_sio.c
deleted file mode 100644
index c8eb57193826..000000000000
--- a/arch/powerpc/platforms/cell/celleb_scc_sio.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * setup serial port in SCC
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/tty.h>
22#include <linux/serial.h>
23#include <linux/serial_core.h>
24#include <linux/console.h>
25
26#include <asm/io.h>
27#include <asm/prom.h>
28
29/* sio irq0=0xb00010022 irq0=0xb00010023 irq2=0xb00010024
30 mmio=0xfff000-0x1000,0xff2000-0x1000 */
31static int txx9_serial_bitmap __initdata;
32
33static struct {
34 uint32_t offset;
35 uint32_t index;
36} txx9_scc_tab[3] __initdata = {
37 { 0x300, 0 }, /* 0xFFF300 */
38 { 0x400, 0 }, /* 0xFFF400 */
39 { 0x800, 1 } /* 0xFF2800 */
40};
41
42static int __init txx9_serial_init(void)
43{
44 extern int early_serial_txx9_setup(struct uart_port *port);
45 struct device_node *node;
46 int i;
47 struct uart_port req;
48 struct of_phandle_args irq;
49 struct resource res;
50
51 for_each_compatible_node(node, "serial", "toshiba,sio-scc") {
52 for (i = 0; i < ARRAY_SIZE(txx9_scc_tab); i++) {
53 if (!(txx9_serial_bitmap & (1<<i)))
54 continue;
55
56 if (of_irq_parse_one(node, i, &irq))
57 continue;
58 if (of_address_to_resource(node,
59 txx9_scc_tab[i].index, &res))
60 continue;
61
62 memset(&req, 0, sizeof(req));
63 req.line = i;
64 req.iotype = UPIO_MEM;
65 req.mapbase = res.start + txx9_scc_tab[i].offset;
66#ifdef CONFIG_SERIAL_TXX9_CONSOLE
67 req.membase = ioremap(req.mapbase, 0x24);
68#endif
69 req.irq = irq_create_of_mapping(&irq);
70 req.flags |= UPF_IOREMAP | UPF_BUGGY_UART
71 /*HAVE_CTS_LINE*/;
72 req.uartclk = 83300000;
73 early_serial_txx9_setup(&req);
74 }
75 }
76
77 return 0;
78}
79
80static int __init txx9_serial_config(char *ptr)
81{
82 int i;
83
84 for (;;) {
85 switch (get_option(&ptr, &i)) {
86 default:
87 return 0;
88 case 2:
89 txx9_serial_bitmap |= 1 << i;
90 break;
91 case 1:
92 txx9_serial_bitmap |= 1 << i;
93 return 0;
94 }
95 }
96}
97__setup("txx9_serial=", txx9_serial_config);
98
99console_initcall(txx9_serial_init);
diff --git a/arch/powerpc/platforms/cell/celleb_scc_uhc.c b/arch/powerpc/platforms/cell/celleb_scc_uhc.c
deleted file mode 100644
index d63b720bfe3a..000000000000
--- a/arch/powerpc/platforms/cell/celleb_scc_uhc.c
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * SCC (Super Companion Chip) UHC setup
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/pci.h>
23
24#include <asm/delay.h>
25#include <asm/io.h>
26#include <asm/machdep.h>
27
28#include "celleb_scc.h"
29
30#define UHC_RESET_WAIT_MAX 10000
31
32static inline int uhc_clkctrl_ready(u32 val)
33{
34 const u32 mask = SCC_UHC_USBCEN | SCC_UHC_USBCEN;
35 return((val & mask) == mask);
36}
37
38/*
39 * UHC(usb host controller) enable function.
40 * affect to both of OHCI and EHCI core module.
41 */
42static void enable_scc_uhc(struct pci_dev *dev)
43{
44 void __iomem *uhc_base;
45 u32 __iomem *uhc_clkctrl;
46 u32 __iomem *uhc_ecmode;
47 u32 val = 0;
48 int i;
49
50 if (!machine_is(celleb_beat) &&
51 !machine_is(celleb_native))
52 return;
53
54 uhc_base = ioremap(pci_resource_start(dev, 0),
55 pci_resource_len(dev, 0));
56 if (!uhc_base) {
57 printk(KERN_ERR "failed to map UHC register base.\n");
58 return;
59 }
60 uhc_clkctrl = uhc_base + SCC_UHC_CKRCTRL;
61 uhc_ecmode = uhc_base + SCC_UHC_ECMODE;
62
63 /* setup for normal mode */
64 val |= SCC_UHC_F48MCKLEN;
65 out_be32(uhc_clkctrl, val);
66 val |= SCC_UHC_PHY_SUSPEND_SEL;
67 out_be32(uhc_clkctrl, val);
68 udelay(10);
69 val |= SCC_UHC_PHYEN;
70 out_be32(uhc_clkctrl, val);
71 udelay(50);
72
73 /* disable reset */
74 val |= SCC_UHC_HCLKEN;
75 out_be32(uhc_clkctrl, val);
76 val |= (SCC_UHC_USBCEN | SCC_UHC_USBEN);
77 out_be32(uhc_clkctrl, val);
78 i = 0;
79 while (!uhc_clkctrl_ready(in_be32(uhc_clkctrl))) {
80 udelay(10);
81 if (i++ > UHC_RESET_WAIT_MAX) {
82 printk(KERN_ERR "Failed to disable UHC reset %x\n",
83 in_be32(uhc_clkctrl));
84 break;
85 }
86 }
87
88 /* Endian Conversion Mode for Master ALL area */
89 out_be32(uhc_ecmode, SCC_UHC_ECMODE_BY_BYTE);
90
91 iounmap(uhc_base);
92}
93
94DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA_2,
95 PCI_DEVICE_ID_TOSHIBA_SCC_USB, enable_scc_uhc);
diff --git a/arch/powerpc/platforms/cell/celleb_setup.c b/arch/powerpc/platforms/cell/celleb_setup.c
deleted file mode 100644
index 90be8ec51686..000000000000
--- a/arch/powerpc/platforms/cell/celleb_setup.c
+++ /dev/null
@@ -1,243 +0,0 @@
1/*
2 * Celleb setup code
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/cell/setup.c:
7 * Copyright (C) 1995 Linus Torvalds
8 * Adapted from 'alpha' version by Gary Thomas
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * Modified by PPC64 Team, IBM Corp
11 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26 */
27
28#undef DEBUG
29
30#include <linux/cpu.h>
31#include <linux/sched.h>
32#include <linux/kernel.h>
33#include <linux/export.h>
34#include <linux/mm.h>
35#include <linux/stddef.h>
36#include <linux/unistd.h>
37#include <linux/reboot.h>
38#include <linux/init.h>
39#include <linux/delay.h>
40#include <linux/irq.h>
41#include <linux/seq_file.h>
42#include <linux/root_dev.h>
43#include <linux/console.h>
44#include <linux/of_platform.h>
45
46#include <asm/mmu.h>
47#include <asm/processor.h>
48#include <asm/io.h>
49#include <asm/prom.h>
50#include <asm/machdep.h>
51#include <asm/cputable.h>
52#include <asm/irq.h>
53#include <asm/time.h>
54#include <asm/spu_priv1.h>
55#include <asm/firmware.h>
56#include <asm/rtas.h>
57#include <asm/cell-regs.h>
58
59#include "beat_interrupt.h"
60#include "beat_wrapper.h"
61#include "beat.h"
62#include "celleb_pci.h"
63#include "interrupt.h"
64#include "pervasive.h"
65#include "ras.h"
66
67static char celleb_machine_type[128] = "Celleb";
68
69static void celleb_show_cpuinfo(struct seq_file *m)
70{
71 struct device_node *root;
72 const char *model = "";
73
74 root = of_find_node_by_path("/");
75 if (root)
76 model = of_get_property(root, "model", NULL);
77 /* using "CHRP" is to trick anaconda into installing FCx into Celleb */
78 seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model);
79 of_node_put(root);
80}
81
82static int __init celleb_machine_type_hack(char *ptr)
83{
84 strlcpy(celleb_machine_type, ptr, sizeof(celleb_machine_type));
85 return 0;
86}
87
88__setup("celleb_machine_type_hack=", celleb_machine_type_hack);
89
90static void celleb_progress(char *s, unsigned short hex)
91{
92 printk("*** %04x : %s\n", hex, s ? s : "");
93}
94
95static void __init celleb_setup_arch_common(void)
96{
97 /* init to some ~sane value until calibrate_delay() runs */
98 loops_per_jiffy = 50000000;
99
100#ifdef CONFIG_DUMMY_CONSOLE
101 conswitchp = &dummy_con;
102#endif
103}
104
105static const struct of_device_id celleb_bus_ids[] __initconst = {
106 { .type = "scc", },
107 { .type = "ioif", }, /* old style */
108 {},
109};
110
111static int __init celleb_publish_devices(void)
112{
113 /* Publish OF platform devices for southbridge IOs */
114 of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
115
116 return 0;
117}
118machine_device_initcall(celleb_beat, celleb_publish_devices);
119machine_device_initcall(celleb_native, celleb_publish_devices);
120
121
122/*
123 * functions for Celleb-Beat
124 */
125static void __init celleb_setup_arch_beat(void)
126{
127#ifdef CONFIG_SPU_BASE
128 spu_priv1_ops = &spu_priv1_beat_ops;
129 spu_management_ops = &spu_management_of_ops;
130#endif
131
132 celleb_setup_arch_common();
133}
134
135static int __init celleb_probe_beat(void)
136{
137 unsigned long root = of_get_flat_dt_root();
138
139 if (!of_flat_dt_is_compatible(root, "Beat"))
140 return 0;
141
142 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS
143 | FW_FEATURE_BEAT | FW_FEATURE_LPAR;
144 hpte_init_beat_v3();
145 pm_power_off = beat_power_off;
146
147 return 1;
148}
149
150
151/*
152 * functions for Celleb-native
153 */
154static void __init celleb_init_IRQ_native(void)
155{
156 iic_init_IRQ();
157 spider_init_IRQ();
158}
159
160static void __init celleb_setup_arch_native(void)
161{
162#ifdef CONFIG_SPU_BASE
163 spu_priv1_ops = &spu_priv1_mmio_ops;
164 spu_management_ops = &spu_management_of_ops;
165#endif
166
167 cbe_regs_init();
168
169#ifdef CONFIG_CBE_RAS
170 cbe_ras_init();
171#endif
172
173#ifdef CONFIG_SMP
174 smp_init_cell();
175#endif
176
177 cbe_pervasive_init();
178
179 /* XXX: nvram initialization should be added */
180
181 celleb_setup_arch_common();
182}
183
184static int __init celleb_probe_native(void)
185{
186 unsigned long root = of_get_flat_dt_root();
187
188 if (of_flat_dt_is_compatible(root, "Beat") ||
189 !of_flat_dt_is_compatible(root, "TOSHIBA,Celleb"))
190 return 0;
191
192 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS;
193 hpte_init_native();
194 pm_power_off = rtas_power_off;
195
196 return 1;
197}
198
199
200/*
201 * machine definitions
202 */
203define_machine(celleb_beat) {
204 .name = "Cell Reference Set (Beat)",
205 .probe = celleb_probe_beat,
206 .setup_arch = celleb_setup_arch_beat,
207 .show_cpuinfo = celleb_show_cpuinfo,
208 .restart = beat_restart,
209 .halt = beat_halt,
210 .get_rtc_time = beat_get_rtc_time,
211 .set_rtc_time = beat_set_rtc_time,
212 .calibrate_decr = generic_calibrate_decr,
213 .progress = celleb_progress,
214 .power_save = beat_power_save,
215 .nvram_size = beat_nvram_get_size,
216 .nvram_read = beat_nvram_read,
217 .nvram_write = beat_nvram_write,
218 .set_dabr = beat_set_xdabr,
219 .init_IRQ = beatic_init_IRQ,
220 .get_irq = beatic_get_irq,
221 .pci_probe_mode = celleb_pci_probe_mode,
222 .pci_setup_phb = celleb_setup_phb,
223#ifdef CONFIG_KEXEC
224 .kexec_cpu_down = beat_kexec_cpu_down,
225#endif
226};
227
228define_machine(celleb_native) {
229 .name = "Cell Reference Set (native)",
230 .probe = celleb_probe_native,
231 .setup_arch = celleb_setup_arch_native,
232 .show_cpuinfo = celleb_show_cpuinfo,
233 .restart = rtas_restart,
234 .halt = rtas_halt,
235 .get_boot_time = rtas_get_boot_time,
236 .get_rtc_time = rtas_get_rtc_time,
237 .set_rtc_time = rtas_set_rtc_time,
238 .calibrate_decr = generic_calibrate_decr,
239 .progress = celleb_progress,
240 .pci_probe_mode = celleb_pci_probe_mode,
241 .pci_setup_phb = celleb_setup_phb,
242 .init_IRQ = celleb_init_IRQ_native,
243};
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 4c11421847be..3af8324c122e 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -163,7 +163,7 @@ static unsigned int iic_get_irq(void)
163 163
164void iic_setup_cpu(void) 164void iic_setup_cpu(void)
165{ 165{
166 out_be64(this_cpu_ptr(&cpu_iic.regs->prio), 0xff); 166 out_be64(&this_cpu_ptr(&cpu_iic)->regs->prio, 0xff);
167} 167}
168 168
169u8 iic_get_target_id(int cpu) 169u8 iic_get_target_id(int cpu)
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index c7c8720aa39f..21b502398bf3 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -39,6 +39,7 @@
39#include <asm/firmware.h> 39#include <asm/firmware.h>
40#include <asm/cell-regs.h> 40#include <asm/cell-regs.h>
41 41
42#include "cell.h"
42#include "interrupt.h" 43#include "interrupt.h"
43 44
44/* Define CELL_IOMMU_REAL_UNMAP to actually unmap non-used pages 45/* Define CELL_IOMMU_REAL_UNMAP to actually unmap non-used pages
@@ -197,7 +198,7 @@ static int tce_build_cell(struct iommu_table *tbl, long index, long npages,
197 198
198 io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset); 199 io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset);
199 200
200 for (i = 0; i < npages; i++, uaddr += tbl->it_page_shift) 201 for (i = 0; i < npages; i++, uaddr += (1 << tbl->it_page_shift))
201 io_pte[i] = base_pte | (__pa(uaddr) & CBE_IOPTE_RPN_Mask); 202 io_pte[i] = base_pte | (__pa(uaddr) & CBE_IOPTE_RPN_Mask);
202 203
203 mb(); 204 mb();
@@ -857,7 +858,7 @@ static int __init cell_iommu_init_disabled(void)
857 cell_dma_direct_offset += base; 858 cell_dma_direct_offset += base;
858 859
859 if (cell_dma_direct_offset != 0) 860 if (cell_dma_direct_offset != 0)
860 ppc_md.pci_dma_dev_setup = cell_pci_dma_dev_setup; 861 cell_pci_controller_ops.dma_dev_setup = cell_pci_dma_dev_setup;
861 862
862 printk("iommu: disabled, direct DMA offset is 0x%lx\n", 863 printk("iommu: disabled, direct DMA offset is 0x%lx\n",
863 cell_dma_direct_offset); 864 cell_dma_direct_offset);
@@ -1197,8 +1198,8 @@ static int __init cell_iommu_init(void)
1197 if (cell_iommu_init_disabled() == 0) 1198 if (cell_iommu_init_disabled() == 0)
1198 goto bail; 1199 goto bail;
1199 1200
1200 /* Setup various ppc_md. callbacks */ 1201 /* Setup various callbacks */
1201 ppc_md.pci_dma_dev_setup = cell_pci_dma_dev_setup; 1202 cell_pci_controller_ops.dma_dev_setup = cell_pci_dma_dev_setup;
1202 ppc_md.dma_get_required_mask = cell_dma_get_required_mask; 1203 ppc_md.dma_get_required_mask = cell_dma_get_required_mask;
1203 ppc_md.tce_build = tce_build_cell; 1204 ppc_md.tce_build = tce_build_cell;
1204 ppc_md.tce_free = tce_free_cell; 1205 ppc_md.tce_free = tce_free_cell;
@@ -1234,5 +1235,3 @@ static int __init cell_iommu_init(void)
1234 return 0; 1235 return 0;
1235} 1236}
1236machine_arch_initcall(cell, cell_iommu_init); 1237machine_arch_initcall(cell, cell_iommu_init);
1237machine_arch_initcall(celleb_native, cell_iommu_init);
1238
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index d62aa982d530..d1be268b1e6e 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -54,6 +54,7 @@
54#include <asm/cell-regs.h> 54#include <asm/cell-regs.h>
55#include <asm/io-workarounds.h> 55#include <asm/io-workarounds.h>
56 56
57#include "cell.h"
57#include "interrupt.h" 58#include "interrupt.h"
58#include "pervasive.h" 59#include "pervasive.h"
59#include "ras.h" 60#include "ras.h"
@@ -131,6 +132,8 @@ static int cell_setup_phb(struct pci_controller *phb)
131 if (model == NULL || strcmp(np->name, "pci")) 132 if (model == NULL || strcmp(np->name, "pci"))
132 return 0; 133 return 0;
133 134
135 phb->controller_ops = cell_pci_controller_ops;
136
134 /* Setup workarounds for spider */ 137 /* Setup workarounds for spider */
135 if (strcmp(model, "Spider")) 138 if (strcmp(model, "Spider"))
136 return 0; 139 return 0;
@@ -279,3 +282,5 @@ define_machine(cell) {
279 .init_IRQ = cell_init_irq, 282 .init_IRQ = cell_init_irq,
280 .pci_setup_phb = cell_setup_phb, 283 .pci_setup_phb = cell_setup_phb,
281}; 284};
285
286struct pci_controller_ops cell_pci_controller_ops;
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index b64e7ead752f..895560f4be69 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -102,13 +102,6 @@ static inline int smp_startup_cpu(unsigned int lcpu)
102 return 1; 102 return 1;
103} 103}
104 104
105static int __init smp_iic_probe(void)
106{
107 iic_request_IPIs();
108
109 return num_possible_cpus();
110}
111
112static void smp_cell_setup_cpu(int cpu) 105static void smp_cell_setup_cpu(int cpu)
113{ 106{
114 if (cpu != boot_cpuid) 107 if (cpu != boot_cpuid)
@@ -139,7 +132,7 @@ static int smp_cell_kick_cpu(int nr)
139 132
140static struct smp_ops_t bpa_iic_smp_ops = { 133static struct smp_ops_t bpa_iic_smp_ops = {
141 .message_pass = iic_message_pass, 134 .message_pass = iic_message_pass,
142 .probe = smp_iic_probe, 135 .probe = iic_request_IPIs,
143 .kick_cpu = smp_cell_kick_cpu, 136 .kick_cpu = smp_cell_kick_cpu,
144 .setup_cpu = smp_cell_setup_cpu, 137 .setup_cpu = smp_cell_setup_cpu,
145 .cpu_bootable = smp_generic_cpu_bootable, 138 .cpu_bootable = smp_generic_cpu_bootable,
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index b0ec78e8ad68..a494028b2cdf 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -39,6 +39,7 @@ static void *spu_syscall_table[] = {
39#define PPC_SYS(func) sys_ni_syscall, 39#define PPC_SYS(func) sys_ni_syscall,
40#define OLDSYS(func) sys_ni_syscall, 40#define OLDSYS(func) sys_ni_syscall,
41#define SYS32ONLY(func) sys_ni_syscall, 41#define SYS32ONLY(func) sys_ni_syscall,
42#define PPC64ONLY(func) sys_ni_syscall,
42#define SYSX(f, f3264, f32) sys_ni_syscall, 43#define SYSX(f, f3264, f32) sys_ni_syscall,
43 44
44#define SYSCALL_SPU(func) sys_##func, 45#define SYSCALL_SPU(func) sys_##func,
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 860a59eb8ea2..15ebc4e8a151 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -253,7 +253,7 @@ static void briq_restart(char *cmd)
253 * But unfortunately, the firmware does not connect /chosen/{stdin,stdout} 253 * But unfortunately, the firmware does not connect /chosen/{stdin,stdout}
254 * the the built-in serial node. Instead, a /failsafe node is created. 254 * the the built-in serial node. Instead, a /failsafe node is created.
255 */ 255 */
256static void chrp_init_early(void) 256static __init void chrp_init_early(void)
257{ 257{
258 struct device_node *node; 258 struct device_node *node;
259 const char *property; 259 const char *property;
diff --git a/arch/powerpc/platforms/maple/maple.h b/arch/powerpc/platforms/maple/maple.h
index c6911ddc479f..eecfa182b06e 100644
--- a/arch/powerpc/platforms/maple/maple.h
+++ b/arch/powerpc/platforms/maple/maple.h
@@ -10,3 +10,5 @@ extern void maple_calibrate_decr(void);
10extern void maple_pci_init(void); 10extern void maple_pci_init(void);
11extern void maple_pci_irq_fixup(struct pci_dev *dev); 11extern void maple_pci_irq_fixup(struct pci_dev *dev);
12extern int maple_pci_get_legacy_ide_irq(struct pci_dev *dev, int channel); 12extern int maple_pci_get_legacy_ide_irq(struct pci_dev *dev, int channel);
13
14extern struct pci_controller_ops maple_pci_controller_ops;
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index d3a13067ec42..a923230e575b 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -510,6 +510,7 @@ static int __init maple_add_bridge(struct device_node *dev)
510 return -ENOMEM; 510 return -ENOMEM;
511 hose->first_busno = bus_range ? bus_range[0] : 0; 511 hose->first_busno = bus_range ? bus_range[0] : 0;
512 hose->last_busno = bus_range ? bus_range[1] : 0xff; 512 hose->last_busno = bus_range ? bus_range[1] : 0xff;
513 hose->controller_ops = maple_pci_controller_ops;
513 514
514 disp_name = NULL; 515 disp_name = NULL;
515 if (of_device_is_compatible(dev, "u3-agp")) { 516 if (of_device_is_compatible(dev, "u3-agp")) {
@@ -660,3 +661,6 @@ static void quirk_ipr_msi(struct pci_dev *dev)
660} 661}
661DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, 662DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
662 quirk_ipr_msi); 663 quirk_ipr_msi);
664
665struct pci_controller_ops maple_pci_controller_ops = {
666};
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 56b85cd61aaf..a837188544c8 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -203,7 +203,7 @@ static void __init maple_init_early(void)
203{ 203{
204 DBG(" -> maple_init_early\n"); 204 DBG(" -> maple_init_early\n");
205 205
206 iommu_init_early_dart(); 206 iommu_init_early_dart(&maple_pci_controller_ops);
207 207
208 DBG(" <- maple_init_early\n"); 208 DBG(" <- maple_init_early\n");
209} 209}
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c
index 2e576f2ae442..b8f567b2ea19 100644
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -27,6 +27,8 @@
27#include <asm/machdep.h> 27#include <asm/machdep.h>
28#include <asm/firmware.h> 28#include <asm/firmware.h>
29 29
30#include "pasemi.h"
31
30#define IOBMAP_PAGE_SHIFT 12 32#define IOBMAP_PAGE_SHIFT 12
31#define IOBMAP_PAGE_SIZE (1 << IOBMAP_PAGE_SHIFT) 33#define IOBMAP_PAGE_SIZE (1 << IOBMAP_PAGE_SHIFT)
32#define IOBMAP_PAGE_MASK (IOBMAP_PAGE_SIZE - 1) 34#define IOBMAP_PAGE_MASK (IOBMAP_PAGE_SIZE - 1)
@@ -248,8 +250,8 @@ void __init iommu_init_early_pasemi(void)
248 250
249 iob_init(NULL); 251 iob_init(NULL);
250 252
251 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_pasemi; 253 pasemi_pci_controller_ops.dma_dev_setup = pci_dma_dev_setup_pasemi;
252 ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_pasemi; 254 pasemi_pci_controller_ops.dma_bus_setup = pci_dma_bus_setup_pasemi;
253 ppc_md.tce_build = iobmap_build; 255 ppc_md.tce_build = iobmap_build;
254 ppc_md.tce_free = iobmap_free; 256 ppc_md.tce_free = iobmap_free;
255 set_pci_dma_ops(&dma_iommu_ops); 257 set_pci_dma_ops(&dma_iommu_ops);
diff --git a/arch/powerpc/platforms/pasemi/pasemi.h b/arch/powerpc/platforms/pasemi/pasemi.h
index ea65bf0eb897..11f230a48227 100644
--- a/arch/powerpc/platforms/pasemi/pasemi.h
+++ b/arch/powerpc/platforms/pasemi/pasemi.h
@@ -30,5 +30,6 @@ static inline void restore_astate(int cpu)
30} 30}
31#endif 31#endif
32 32
33extern struct pci_controller_ops pasemi_pci_controller_ops;
33 34
34#endif /* _PASEMI_PASEMI_H */ 35#endif /* _PASEMI_PASEMI_H */
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c
index aa862713258c..f3a68a0fef23 100644
--- a/arch/powerpc/platforms/pasemi/pci.c
+++ b/arch/powerpc/platforms/pasemi/pci.c
@@ -31,6 +31,8 @@
31 31
32#include <asm/ppc-pci.h> 32#include <asm/ppc-pci.h>
33 33
34#include "pasemi.h"
35
34#define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off)) 36#define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
35 37
36static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset) 38static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset)
@@ -199,6 +201,7 @@ static int __init pas_add_bridge(struct device_node *dev)
199 201
200 hose->first_busno = 0; 202 hose->first_busno = 0;
201 hose->last_busno = 0xff; 203 hose->last_busno = 0xff;
204 hose->controller_ops = pasemi_pci_controller_ops;
202 205
203 setup_pa_pxp(hose); 206 setup_pa_pxp(hose);
204 207
@@ -239,3 +242,5 @@ void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
239 242
240 return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset); 243 return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset);
241} 244}
245
246struct pci_controller_ops pasemi_pci_controller_ops;
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index 3e91ef538114..76f5013c35e5 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -246,7 +246,7 @@ static void __init bootx_scan_dt_build_strings(unsigned long base,
246 DBG(" detected display ! adding properties names !\n"); 246 DBG(" detected display ! adding properties names !\n");
247 bootx_dt_add_string("linux,boot-display", mem_end); 247 bootx_dt_add_string("linux,boot-display", mem_end);
248 bootx_dt_add_string("linux,opened", mem_end); 248 bootx_dt_add_string("linux,opened", mem_end);
249 strncpy(bootx_disp_path, namep, 255); 249 strlcpy(bootx_disp_path, namep, sizeof(bootx_disp_path));
250 } 250 }
251 251
252 /* get and store all property names */ 252 /* get and store all property names */
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index f4071a67ad00..59ab16fa600f 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -27,6 +27,8 @@
27#include <asm/grackle.h> 27#include <asm/grackle.h>
28#include <asm/ppc-pci.h> 28#include <asm/ppc-pci.h>
29 29
30#include "pmac.h"
31
30#undef DEBUG 32#undef DEBUG
31 33
32#ifdef DEBUG 34#ifdef DEBUG
@@ -798,6 +800,7 @@ static int __init pmac_add_bridge(struct device_node *dev)
798 return -ENOMEM; 800 return -ENOMEM;
799 hose->first_busno = bus_range ? bus_range[0] : 0; 801 hose->first_busno = bus_range ? bus_range[0] : 0;
800 hose->last_busno = bus_range ? bus_range[1] : 0xff; 802 hose->last_busno = bus_range ? bus_range[1] : 0xff;
803 hose->controller_ops = pmac_pci_controller_ops;
801 804
802 disp_name = NULL; 805 disp_name = NULL;
803 806
@@ -942,7 +945,7 @@ void __init pmac_pci_init(void)
942} 945}
943 946
944#ifdef CONFIG_PPC32 947#ifdef CONFIG_PPC32
945int pmac_pci_enable_device_hook(struct pci_dev *dev) 948static bool pmac_pci_enable_device_hook(struct pci_dev *dev)
946{ 949{
947 struct device_node* node; 950 struct device_node* node;
948 int updatecfg = 0; 951 int updatecfg = 0;
@@ -958,11 +961,11 @@ int pmac_pci_enable_device_hook(struct pci_dev *dev)
958 && !node) { 961 && !node) {
959 printk(KERN_INFO "Apple USB OHCI %s disabled by firmware\n", 962 printk(KERN_INFO "Apple USB OHCI %s disabled by firmware\n",
960 pci_name(dev)); 963 pci_name(dev));
961 return -EINVAL; 964 return false;
962 } 965 }
963 966
964 if (!node) 967 if (!node)
965 return 0; 968 return true;
966 969
967 uninorth_child = node->parent && 970 uninorth_child = node->parent &&
968 of_device_is_compatible(node->parent, "uni-north"); 971 of_device_is_compatible(node->parent, "uni-north");
@@ -1003,7 +1006,7 @@ int pmac_pci_enable_device_hook(struct pci_dev *dev)
1003 L1_CACHE_BYTES >> 2); 1006 L1_CACHE_BYTES >> 2);
1004 } 1007 }
1005 1008
1006 return 0; 1009 return true;
1007} 1010}
1008 1011
1009void pmac_pci_fixup_ohci(struct pci_dev *dev) 1012void pmac_pci_fixup_ohci(struct pci_dev *dev)
@@ -1223,3 +1226,30 @@ static void fixup_u4_pcie(struct pci_dev* dev)
1223 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0); 1226 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0);
1224} 1227}
1225DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_U4_PCIE, fixup_u4_pcie); 1228DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_U4_PCIE, fixup_u4_pcie);
1229
1230#ifdef CONFIG_PPC64
1231static int pmac_pci_probe_mode(struct pci_bus *bus)
1232{
1233 struct device_node *node = pci_bus_to_OF_node(bus);
1234
1235 /* We need to use normal PCI probing for the AGP bus,
1236 * since the device for the AGP bridge isn't in the tree.
1237 * Same for the PCIe host on U4 and the HT host bridge.
1238 */
1239 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
1240 of_device_is_compatible(node, "u4-pcie") ||
1241 of_device_is_compatible(node, "u3-ht")))
1242 return PCI_PROBE_NORMAL;
1243 return PCI_PROBE_DEVTREE;
1244}
1245#endif /* CONFIG_PPC64 */
1246
1247struct pci_controller_ops pmac_pci_controller_ops = {
1248#ifdef CONFIG_PPC64
1249 .probe_mode = pmac_pci_probe_mode,
1250#endif
1251#ifdef CONFIG_PPC32
1252 .enable_device_hook = pmac_pci_enable_device_hook,
1253#endif
1254};
1255
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 4c24bf60d39d..59cfc9d63c2d 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -321,6 +321,9 @@ static void __init pmac_pic_probe_oldstyle(void)
321 max_irqs = max_real_irqs = 64; 321 max_irqs = max_real_irqs = 64;
322 322
323 /* We might have a second cascaded heathrow */ 323 /* We might have a second cascaded heathrow */
324
325 /* Compensate for of_node_put() in of_find_node_by_name() */
326 of_node_get(master);
324 slave = of_find_node_by_name(master, "mac-io"); 327 slave = of_find_node_by_name(master, "mac-io");
325 328
326 /* Check ordering of master & slave */ 329 /* Check ordering of master & slave */
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h
index 8327cce2bdb0..e7f8163d6769 100644
--- a/arch/powerpc/platforms/powermac/pmac.h
+++ b/arch/powerpc/platforms/powermac/pmac.h
@@ -25,7 +25,6 @@ extern void pmac_pci_init(void);
25extern void pmac_nvram_update(void); 25extern void pmac_nvram_update(void);
26extern unsigned char pmac_nvram_read_byte(int addr); 26extern unsigned char pmac_nvram_read_byte(int addr);
27extern void pmac_nvram_write_byte(int addr, unsigned char val); 27extern void pmac_nvram_write_byte(int addr, unsigned char val);
28extern int pmac_pci_enable_device_hook(struct pci_dev *dev);
29extern void pmac_pcibios_after_init(void); 28extern void pmac_pcibios_after_init(void);
30extern int of_show_percpuinfo(struct seq_file *m, int i); 29extern int of_show_percpuinfo(struct seq_file *m, int i);
31 30
@@ -39,4 +38,6 @@ extern void low_cpu_die(void) __attribute__((noreturn));
39extern int pmac_nvram_init(void); 38extern int pmac_nvram_init(void);
40extern void pmac_pic_init(void); 39extern void pmac_pic_init(void);
41 40
41extern struct pci_controller_ops pmac_pci_controller_ops;
42
42#endif /* __PMAC_H__ */ 43#endif /* __PMAC_H__ */
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 713d36d45d1d..8dd78f4e1af4 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -473,7 +473,7 @@ static void __init pmac_init_early(void)
473 udbg_adb_init(!!strstr(boot_command_line, "btextdbg")); 473 udbg_adb_init(!!strstr(boot_command_line, "btextdbg"));
474 474
475#ifdef CONFIG_PPC64 475#ifdef CONFIG_PPC64
476 iommu_init_early_dart(); 476 iommu_init_early_dart(&pmac_pci_controller_ops);
477#endif 477#endif
478 478
479 /* SMP Init has to be done early as we need to patch up 479 /* SMP Init has to be done early as we need to patch up
@@ -637,24 +637,6 @@ static int __init pmac_probe(void)
637 return 1; 637 return 1;
638} 638}
639 639
640#ifdef CONFIG_PPC64
641/* Move that to pci.c */
642static int pmac_pci_probe_mode(struct pci_bus *bus)
643{
644 struct device_node *node = pci_bus_to_OF_node(bus);
645
646 /* We need to use normal PCI probing for the AGP bus,
647 * since the device for the AGP bridge isn't in the tree.
648 * Same for the PCIe host on U4 and the HT host bridge.
649 */
650 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
651 of_device_is_compatible(node, "u4-pcie") ||
652 of_device_is_compatible(node, "u3-ht")))
653 return PCI_PROBE_NORMAL;
654 return PCI_PROBE_DEVTREE;
655}
656#endif /* CONFIG_PPC64 */
657
658define_machine(powermac) { 640define_machine(powermac) {
659 .name = "PowerMac", 641 .name = "PowerMac",
660 .probe = pmac_probe, 642 .probe = pmac_probe,
@@ -674,12 +656,10 @@ define_machine(powermac) {
674 .feature_call = pmac_do_feature_call, 656 .feature_call = pmac_do_feature_call,
675 .progress = udbg_progress, 657 .progress = udbg_progress,
676#ifdef CONFIG_PPC64 658#ifdef CONFIG_PPC64
677 .pci_probe_mode = pmac_pci_probe_mode,
678 .power_save = power4_idle, 659 .power_save = power4_idle,
679 .enable_pmcs = power4_enable_pmcs, 660 .enable_pmcs = power4_enable_pmcs,
680#endif /* CONFIG_PPC64 */ 661#endif /* CONFIG_PPC64 */
681#ifdef CONFIG_PPC32 662#ifdef CONFIG_PPC32
682 .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
683 .pcibios_after_init = pmac_pcibios_after_init, 663 .pcibios_after_init = pmac_pcibios_after_init,
684 .phys_mem_access_prot = pci_phys_mem_access_prot, 664 .phys_mem_access_prot = pci_phys_mem_access_prot,
685#endif 665#endif
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index af094ae03dbb..f84ac7ee1107 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -268,7 +268,7 @@ static void __init psurge_quad_init(void)
268 mdelay(33); 268 mdelay(33);
269} 269}
270 270
271static int __init smp_psurge_probe(void) 271static void __init smp_psurge_probe(void)
272{ 272{
273 int i, ncpus; 273 int i, ncpus;
274 struct device_node *dn; 274 struct device_node *dn;
@@ -766,7 +766,7 @@ static void __init smp_core99_setup(int ncpus)
766 powersave_nap = 0; 766 powersave_nap = 0;
767} 767}
768 768
769static int __init smp_core99_probe(void) 769static void __init smp_core99_probe(void)
770{ 770{
771 struct device_node *cpus; 771 struct device_node *cpus;
772 int ncpus = 0; 772 int ncpus = 0;
@@ -781,7 +781,7 @@ static int __init smp_core99_probe(void)
781 781
782 /* Nothing more to do if less than 2 of them */ 782 /* Nothing more to do if less than 2 of them */
783 if (ncpus <= 1) 783 if (ncpus <= 1)
784 return 1; 784 return;
785 785
786 /* We need to perform some early initialisations before we can start 786 /* We need to perform some early initialisations before we can start
787 * setting up SMP as we are running before initcalls 787 * setting up SMP as we are running before initcalls
@@ -797,8 +797,6 @@ static int __init smp_core99_probe(void)
797 797
798 /* Collect l2cr and l3cr values from CPU 0 */ 798 /* Collect l2cr and l3cr values from CPU 0 */
799 core99_init_caches(0); 799 core99_init_caches(0);
800
801 return ncpus;
802} 800}
803 801
804static int smp_core99_kick_cpu(int nr) 802static int smp_core99_kick_cpu(int nr)
diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig
index 45a8ed0585cd..4b044d8cb49a 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -19,10 +19,3 @@ config PPC_POWERNV
19 select CPU_FREQ_GOV_CONSERVATIVE 19 select CPU_FREQ_GOV_CONSERVATIVE
20 select PPC_DOORBELL 20 select PPC_DOORBELL
21 default y 21 default y
22
23config PPC_POWERNV_RTAS
24 depends on PPC_POWERNV
25 bool "Support for RTAS based PowerNV platforms such as BML"
26 default y
27 select PPC_ICS_RTAS
28 select PPC_RTAS
diff --git a/arch/powerpc/platforms/powernv/opal-dump.c b/arch/powerpc/platforms/powernv/opal-dump.c
index 23260f7dfa7a..5aa9c1ce4de3 100644
--- a/arch/powerpc/platforms/powernv/opal-dump.c
+++ b/arch/powerpc/platforms/powernv/opal-dump.c
@@ -452,5 +452,6 @@ void __init opal_platform_dump_init(void)
452 return; 452 return;
453 } 453 }
454 454
455 opal_dump_resend_notification(); 455 if (opal_check_token(OPAL_DUMP_RESEND))
456 opal_dump_resend_notification();
456} 457}
diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c
index 518fe95dbf24..38ce757e5e2a 100644
--- a/arch/powerpc/platforms/powernv/opal-elog.c
+++ b/arch/powerpc/platforms/powernv/opal-elog.c
@@ -313,7 +313,8 @@ int __init opal_elog_init(void)
313 } 313 }
314 314
315 /* We are now ready to pull error logs from opal. */ 315 /* We are now ready to pull error logs from opal. */
316 opal_resend_pending_logs(); 316 if (opal_check_token(OPAL_ELOG_RESEND))
317 opal_resend_pending_logs();
317 318
318 return 0; 319 return 0;
319} 320}
diff --git a/arch/powerpc/platforms/powernv/opal-flash.c b/arch/powerpc/platforms/powernv/opal-flash.c
index 5c21d9c07f45..4ec6219287fc 100644
--- a/arch/powerpc/platforms/powernv/opal-flash.c
+++ b/arch/powerpc/platforms/powernv/opal-flash.c
@@ -120,7 +120,11 @@ static struct image_header_t image_header;
120static struct image_data_t image_data; 120static struct image_data_t image_data;
121static struct validate_flash_t validate_flash_data; 121static struct validate_flash_t validate_flash_data;
122static struct manage_flash_t manage_flash_data; 122static struct manage_flash_t manage_flash_data;
123static struct update_flash_t update_flash_data; 123
124/* Initialize update_flash_data status to No Operation */
125static struct update_flash_t update_flash_data = {
126 .status = FLASH_NO_OP,
127};
124 128
125static DEFINE_MUTEX(image_data_mutex); 129static DEFINE_MUTEX(image_data_mutex);
126 130
@@ -542,7 +546,7 @@ static struct attribute_group image_op_attr_group = {
542 .attrs = image_op_attrs, 546 .attrs = image_op_attrs,
543}; 547};
544 548
545void __init opal_flash_init(void) 549void __init opal_flash_update_init(void)
546{ 550{
547 int ret; 551 int ret;
548 552
diff --git a/arch/powerpc/platforms/powernv/opal-nvram.c b/arch/powerpc/platforms/powernv/opal-nvram.c
index f9896fd5d04a..9db4398ded5d 100644
--- a/arch/powerpc/platforms/powernv/opal-nvram.c
+++ b/arch/powerpc/platforms/powernv/opal-nvram.c
@@ -16,6 +16,7 @@
16#include <linux/of.h> 16#include <linux/of.h>
17 17
18#include <asm/opal.h> 18#include <asm/opal.h>
19#include <asm/nvram.h>
19#include <asm/machdep.h> 20#include <asm/machdep.h>
20 21
21static unsigned int nvram_size; 22static unsigned int nvram_size;
@@ -62,6 +63,15 @@ static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
62 return count; 63 return count;
63} 64}
64 65
66static int __init opal_nvram_init_log_partitions(void)
67{
68 /* Scan nvram for partitions */
69 nvram_scan_partitions();
70 nvram_init_oops_partition(0);
71 return 0;
72}
73machine_arch_initcall(powernv, opal_nvram_init_log_partitions);
74
65void __init opal_nvram_init(void) 75void __init opal_nvram_init(void)
66{ 76{
67 struct device_node *np; 77 struct device_node *np;
diff --git a/arch/powerpc/platforms/powernv/opal-sensor.c b/arch/powerpc/platforms/powernv/opal-sensor.c
index 4ab67ef7abc9..655250499d18 100644
--- a/arch/powerpc/platforms/powernv/opal-sensor.c
+++ b/arch/powerpc/platforms/powernv/opal-sensor.c
@@ -46,18 +46,28 @@ int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data)
46 46
47 mutex_lock(&opal_sensor_mutex); 47 mutex_lock(&opal_sensor_mutex);
48 ret = opal_sensor_read(sensor_hndl, token, &data); 48 ret = opal_sensor_read(sensor_hndl, token, &data);
49 if (ret != OPAL_ASYNC_COMPLETION) 49 switch (ret) {
50 goto out_token; 50 case OPAL_ASYNC_COMPLETION:
51 ret = opal_async_wait_response(token, &msg);
52 if (ret) {
53 pr_err("%s: Failed to wait for the async response, %d\n",
54 __func__, ret);
55 goto out_token;
56 }
51 57
52 ret = opal_async_wait_response(token, &msg); 58 ret = opal_error_code(be64_to_cpu(msg.params[1]));
53 if (ret) { 59 *sensor_data = be32_to_cpu(data);
54 pr_err("%s: Failed to wait for the async response, %d\n", 60 break;
55 __func__, ret); 61
56 goto out_token; 62 case OPAL_SUCCESS:
57 } 63 ret = 0;
64 *sensor_data = be32_to_cpu(data);
65 break;
58 66
59 *sensor_data = be32_to_cpu(data); 67 default:
60 ret = be64_to_cpu(msg.params[1]); 68 ret = opal_error_code(ret);
69 break;
70 }
61 71
62out_token: 72out_token:
63 mutex_unlock(&opal_sensor_mutex); 73 mutex_unlock(&opal_sensor_mutex);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 0509bca5e830..4e740375772c 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -286,9 +286,12 @@ OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
286OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG); 286OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG);
287OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION); 287OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
288OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION); 288OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);
289OPAL_CALL(opal_pci_set_phb_cxl_mode, OPAL_PCI_SET_PHB_CXL_MODE); 289OPAL_CALL(opal_pci_set_phb_cxl_mode, OPAL_PCI_SET_PHB_CAPI_MODE);
290OPAL_CALL(opal_tpo_write, OPAL_WRITE_TPO); 290OPAL_CALL(opal_tpo_write, OPAL_WRITE_TPO);
291OPAL_CALL(opal_tpo_read, OPAL_READ_TPO); 291OPAL_CALL(opal_tpo_read, OPAL_READ_TPO);
292OPAL_CALL(opal_ipmi_send, OPAL_IPMI_SEND); 292OPAL_CALL(opal_ipmi_send, OPAL_IPMI_SEND);
293OPAL_CALL(opal_ipmi_recv, OPAL_IPMI_RECV); 293OPAL_CALL(opal_ipmi_recv, OPAL_IPMI_RECV);
294OPAL_CALL(opal_i2c_request, OPAL_I2C_REQUEST); 294OPAL_CALL(opal_i2c_request, OPAL_I2C_REQUEST);
295OPAL_CALL(opal_flash_read, OPAL_FLASH_READ);
296OPAL_CALL(opal_flash_write, OPAL_FLASH_WRITE);
297OPAL_CALL(opal_flash_erase, OPAL_FLASH_ERASE);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index 18fd4e71c9c1..2241565b0739 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -23,6 +23,8 @@
23#include <linux/kobject.h> 23#include <linux/kobject.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/memblock.h> 25#include <linux/memblock.h>
26#include <linux/kthread.h>
27#include <linux/freezer.h>
26 28
27#include <asm/machdep.h> 29#include <asm/machdep.h>
28#include <asm/opal.h> 30#include <asm/opal.h>
@@ -58,6 +60,7 @@ static struct atomic_notifier_head opal_msg_notifier_head[OPAL_MSG_TYPE_MAX];
58static DEFINE_SPINLOCK(opal_notifier_lock); 60static DEFINE_SPINLOCK(opal_notifier_lock);
59static uint64_t last_notified_mask = 0x0ul; 61static uint64_t last_notified_mask = 0x0ul;
60static atomic_t opal_notifier_hold = ATOMIC_INIT(0); 62static atomic_t opal_notifier_hold = ATOMIC_INIT(0);
63static uint32_t opal_heartbeat;
61 64
62static void opal_reinit_cores(void) 65static void opal_reinit_cores(void)
63{ 66{
@@ -302,23 +305,26 @@ void opal_notifier_disable(void)
302 * Opal message notifier based on message type. Allow subscribers to get 305 * Opal message notifier based on message type. Allow subscribers to get
303 * notified for specific messgae type. 306 * notified for specific messgae type.
304 */ 307 */
305int opal_message_notifier_register(enum OpalMessageType msg_type, 308int opal_message_notifier_register(enum opal_msg_type msg_type,
306 struct notifier_block *nb) 309 struct notifier_block *nb)
307{ 310{
308 if (!nb) { 311 if (!nb || msg_type >= OPAL_MSG_TYPE_MAX) {
309 pr_warning("%s: Invalid argument (%p)\n", 312 pr_warning("%s: Invalid arguments, msg_type:%d\n",
310 __func__, nb);
311 return -EINVAL;
312 }
313 if (msg_type > OPAL_MSG_TYPE_MAX) {
314 pr_warning("%s: Invalid message type argument (%d)\n",
315 __func__, msg_type); 313 __func__, msg_type);
316 return -EINVAL; 314 return -EINVAL;
317 } 315 }
316
318 return atomic_notifier_chain_register( 317 return atomic_notifier_chain_register(
319 &opal_msg_notifier_head[msg_type], nb); 318 &opal_msg_notifier_head[msg_type], nb);
320} 319}
321 320
321int opal_message_notifier_unregister(enum opal_msg_type msg_type,
322 struct notifier_block *nb)
323{
324 return atomic_notifier_chain_unregister(
325 &opal_msg_notifier_head[msg_type], nb);
326}
327
322static void opal_message_do_notify(uint32_t msg_type, void *msg) 328static void opal_message_do_notify(uint32_t msg_type, void *msg)
323{ 329{
324 /* notify subscribers */ 330 /* notify subscribers */
@@ -351,7 +357,7 @@ static void opal_handle_message(void)
351 type = be32_to_cpu(msg.msg_type); 357 type = be32_to_cpu(msg.msg_type);
352 358
353 /* Sanity check */ 359 /* Sanity check */
354 if (type > OPAL_MSG_TYPE_MAX) { 360 if (type >= OPAL_MSG_TYPE_MAX) {
355 pr_warning("%s: Unknown message type: %u\n", __func__, type); 361 pr_warning("%s: Unknown message type: %u\n", __func__, type);
356 return; 362 return;
357 } 363 }
@@ -665,6 +671,9 @@ static void __init opal_dump_region_init(void)
665 uint64_t size; 671 uint64_t size;
666 int rc; 672 int rc;
667 673
674 if (!opal_check_token(OPAL_REGISTER_DUMP_REGION))
675 return;
676
668 /* Register kernel log buffer */ 677 /* Register kernel log buffer */
669 addr = log_buf_addr_get(); 678 addr = log_buf_addr_get();
670 if (addr == NULL) 679 if (addr == NULL)
@@ -684,6 +693,15 @@ static void __init opal_dump_region_init(void)
684 "rc = %d\n", rc); 693 "rc = %d\n", rc);
685} 694}
686 695
696static void opal_flash_init(struct device_node *opal_node)
697{
698 struct device_node *np;
699
700 for_each_child_of_node(opal_node, np)
701 if (of_device_is_compatible(np, "ibm,opal-flash"))
702 of_platform_device_create(np, NULL, NULL);
703}
704
687static void opal_ipmi_init(struct device_node *opal_node) 705static void opal_ipmi_init(struct device_node *opal_node)
688{ 706{
689 struct device_node *np; 707 struct device_node *np;
@@ -741,6 +759,29 @@ static void __init opal_irq_init(struct device_node *dn)
741 } 759 }
742} 760}
743 761
762static int kopald(void *unused)
763{
764 set_freezable();
765 do {
766 try_to_freeze();
767 opal_poll_events(NULL);
768 msleep_interruptible(opal_heartbeat);
769 } while (!kthread_should_stop());
770
771 return 0;
772}
773
774static void opal_init_heartbeat(void)
775{
776 /* Old firwmware, we assume the HVC heartbeat is sufficient */
777 if (of_property_read_u32(opal_node, "ibm,heartbeat-ms",
778 &opal_heartbeat) != 0)
779 opal_heartbeat = 0;
780
781 if (opal_heartbeat)
782 kthread_run(kopald, NULL, "kopald");
783}
784
744static int __init opal_init(void) 785static int __init opal_init(void)
745{ 786{
746 struct device_node *np, *consoles; 787 struct device_node *np, *consoles;
@@ -769,6 +810,9 @@ static int __init opal_init(void)
769 /* Create i2c platform devices */ 810 /* Create i2c platform devices */
770 opal_i2c_create_devs(); 811 opal_i2c_create_devs();
771 812
813 /* Setup a heatbeat thread if requested by OPAL */
814 opal_init_heartbeat();
815
772 /* Find all OPAL interrupts and request them */ 816 /* Find all OPAL interrupts and request them */
773 opal_irq_init(opal_node); 817 opal_irq_init(opal_node);
774 818
@@ -782,7 +826,7 @@ static int __init opal_init(void)
782 /* Setup error log interface */ 826 /* Setup error log interface */
783 rc = opal_elog_init(); 827 rc = opal_elog_init();
784 /* Setup code update interface */ 828 /* Setup code update interface */
785 opal_flash_init(); 829 opal_flash_update_init();
786 /* Setup platform dump extract interface */ 830 /* Setup platform dump extract interface */
787 opal_platform_dump_init(); 831 opal_platform_dump_init();
788 /* Setup system parameters interface */ 832 /* Setup system parameters interface */
@@ -791,8 +835,11 @@ static int __init opal_init(void)
791 opal_msglog_init(); 835 opal_msglog_init();
792 } 836 }
793 837
838 /* Initialize OPAL IPMI backend */
794 opal_ipmi_init(opal_node); 839 opal_ipmi_init(opal_node);
795 840
841 opal_flash_init(opal_node);
842
796 return 0; 843 return 0;
797} 844}
798machine_subsys_initcall(powernv, opal_init); 845machine_subsys_initcall(powernv, opal_init);
@@ -823,13 +870,17 @@ void opal_shutdown(void)
823 } 870 }
824 871
825 /* Unregister memory dump region */ 872 /* Unregister memory dump region */
826 opal_unregister_dump_region(OPAL_DUMP_REGION_LOG_BUF); 873 if (opal_check_token(OPAL_UNREGISTER_DUMP_REGION))
874 opal_unregister_dump_region(OPAL_DUMP_REGION_LOG_BUF);
827} 875}
828 876
829/* Export this so that test modules can use it */ 877/* Export this so that test modules can use it */
830EXPORT_SYMBOL_GPL(opal_invalid_call); 878EXPORT_SYMBOL_GPL(opal_invalid_call);
831EXPORT_SYMBOL_GPL(opal_ipmi_send); 879EXPORT_SYMBOL_GPL(opal_ipmi_send);
832EXPORT_SYMBOL_GPL(opal_ipmi_recv); 880EXPORT_SYMBOL_GPL(opal_ipmi_recv);
881EXPORT_SYMBOL_GPL(opal_flash_read);
882EXPORT_SYMBOL_GPL(opal_flash_write);
883EXPORT_SYMBOL_GPL(opal_flash_erase);
833 884
834/* Convert a region of vmalloc memory to an opal sg list */ 885/* Convert a region of vmalloc memory to an opal sg list */
835struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr, 886struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
@@ -894,6 +945,25 @@ void opal_free_sg_list(struct opal_sg_list *sg)
894 } 945 }
895} 946}
896 947
948int opal_error_code(int rc)
949{
950 switch (rc) {
951 case OPAL_SUCCESS: return 0;
952
953 case OPAL_PARAMETER: return -EINVAL;
954 case OPAL_ASYNC_COMPLETION: return -EINPROGRESS;
955 case OPAL_BUSY_EVENT: return -EBUSY;
956 case OPAL_NO_MEM: return -ENOMEM;
957
958 case OPAL_UNSUPPORTED: return -EIO;
959 case OPAL_HARDWARE: return -EIO;
960 case OPAL_INTERNAL_ERROR: return -EIO;
961 default:
962 pr_err("%s: unexpected OPAL error %d\n", __func__, rc);
963 return -EIO;
964 }
965}
966
897EXPORT_SYMBOL_GPL(opal_poll_events); 967EXPORT_SYMBOL_GPL(opal_poll_events);
898EXPORT_SYMBOL_GPL(opal_rtc_read); 968EXPORT_SYMBOL_GPL(opal_rtc_read);
899EXPORT_SYMBOL_GPL(opal_rtc_write); 969EXPORT_SYMBOL_GPL(opal_rtc_write);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 5ac7c60a8801..920c252d1f49 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2615,7 +2615,7 @@ static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev,
2615/* Prevent enabling devices for which we couldn't properly 2615/* Prevent enabling devices for which we couldn't properly
2616 * assign a PE 2616 * assign a PE
2617 */ 2617 */
2618static int pnv_pci_enable_device_hook(struct pci_dev *dev) 2618static bool pnv_pci_enable_device_hook(struct pci_dev *dev)
2619{ 2619{
2620 struct pci_controller *hose = pci_bus_to_host(dev->bus); 2620 struct pci_controller *hose = pci_bus_to_host(dev->bus);
2621 struct pnv_phb *phb = hose->private_data; 2621 struct pnv_phb *phb = hose->private_data;
@@ -2627,13 +2627,13 @@ static int pnv_pci_enable_device_hook(struct pci_dev *dev)
2627 * PEs isn't ready. 2627 * PEs isn't ready.
2628 */ 2628 */
2629 if (!phb->initialized) 2629 if (!phb->initialized)
2630 return 0; 2630 return true;
2631 2631
2632 pdn = pci_get_pdn(dev); 2632 pdn = pci_get_pdn(dev);
2633 if (!pdn || pdn->pe_number == IODA_INVALID_PE) 2633 if (!pdn || pdn->pe_number == IODA_INVALID_PE)
2634 return -EINVAL; 2634 return false;
2635 2635
2636 return 0; 2636 return true;
2637} 2637}
2638 2638
2639static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus, 2639static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus,
@@ -2693,6 +2693,7 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
2693 hose->last_busno = 0xff; 2693 hose->last_busno = 0xff;
2694 } 2694 }
2695 hose->private_data = phb; 2695 hose->private_data = phb;
2696 hose->controller_ops = pnv_pci_controller_ops;
2696 phb->hub_id = hub_id; 2697 phb->hub_id = hub_id;
2697 phb->opal_id = phb_id; 2698 phb->opal_id = phb_id;
2698 phb->type = ioda_type; 2699 phb->type = ioda_type;
@@ -2808,13 +2809,15 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
2808 * the child P2P bridges) can form individual PE. 2809 * the child P2P bridges) can form individual PE.
2809 */ 2810 */
2810 ppc_md.pcibios_fixup = pnv_pci_ioda_fixup; 2811 ppc_md.pcibios_fixup = pnv_pci_ioda_fixup;
2811 ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook; 2812 pnv_pci_controller_ops.enable_device_hook = pnv_pci_enable_device_hook;
2812 ppc_md.pcibios_window_alignment = pnv_pci_window_alignment; 2813 pnv_pci_controller_ops.window_alignment = pnv_pci_window_alignment;
2813 ppc_md.pcibios_reset_secondary_bus = pnv_pci_reset_secondary_bus; 2814 pnv_pci_controller_ops.reset_secondary_bus = pnv_pci_reset_secondary_bus;
2815
2814#ifdef CONFIG_PCI_IOV 2816#ifdef CONFIG_PCI_IOV
2815 ppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_iov_resources; 2817 ppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_iov_resources;
2816 ppc_md.pcibios_iov_resource_alignment = pnv_pci_iov_resource_alignment; 2818 ppc_md.pcibios_iov_resource_alignment = pnv_pci_iov_resource_alignment;
2817#endif /* CONFIG_PCI_IOV */ 2819#endif
2820
2818 pci_add_flags(PCI_REASSIGN_ALL_RSRC); 2821 pci_add_flags(PCI_REASSIGN_ALL_RSRC);
2819 2822
2820 /* Reset IODA tables to a clean state */ 2823 /* Reset IODA tables to a clean state */
diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index 6ef6d4d8e7e2..4729ca793813 100644
--- a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -133,6 +133,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
133 phb->hose->first_busno = 0; 133 phb->hose->first_busno = 0;
134 phb->hose->last_busno = 0xff; 134 phb->hose->last_busno = 0xff;
135 phb->hose->private_data = phb; 135 phb->hose->private_data = phb;
136 phb->hose->controller_ops = pnv_pci_controller_ops;
136 phb->hub_id = hub_id; 137 phb->hub_id = hub_id;
137 phb->opal_id = phb_id; 138 phb->opal_id = phb_id;
138 phb->type = PNV_PHB_P5IOC2; 139 phb->type = PNV_PHB_P5IOC2;
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 02badcef5cea..bca2aeb6e4b6 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -662,54 +662,6 @@ void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
662 tbl->it_type = TCE_PCI; 662 tbl->it_type = TCE_PCI;
663} 663}
664 664
665static struct iommu_table *pnv_pci_setup_bml_iommu(struct pci_controller *hose)
666{
667 struct iommu_table *tbl;
668 const __be64 *basep, *swinvp;
669 const __be32 *sizep;
670
671 basep = of_get_property(hose->dn, "linux,tce-base", NULL);
672 sizep = of_get_property(hose->dn, "linux,tce-size", NULL);
673 if (basep == NULL || sizep == NULL) {
674 pr_err("PCI: %s has missing tce entries !\n",
675 hose->dn->full_name);
676 return NULL;
677 }
678 tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL, hose->node);
679 if (WARN_ON(!tbl))
680 return NULL;
681 pnv_pci_setup_iommu_table(tbl, __va(be64_to_cpup(basep)),
682 be32_to_cpup(sizep), 0, IOMMU_PAGE_SHIFT_4K);
683 iommu_init_table(tbl, hose->node);
684 iommu_register_group(tbl, pci_domain_nr(hose->bus), 0);
685
686 /* Deal with SW invalidated TCEs when needed (BML way) */
687 swinvp = of_get_property(hose->dn, "linux,tce-sw-invalidate-info",
688 NULL);
689 if (swinvp) {
690 tbl->it_busno = be64_to_cpu(swinvp[1]);
691 tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
692 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
693 }
694 return tbl;
695}
696
697static void pnv_pci_dma_fallback_setup(struct pci_controller *hose,
698 struct pci_dev *pdev)
699{
700 struct device_node *np = pci_bus_to_OF_node(hose->bus);
701 struct pci_dn *pdn;
702
703 if (np == NULL)
704 return;
705 pdn = PCI_DN(np);
706 if (!pdn->iommu_table)
707 pdn->iommu_table = pnv_pci_setup_bml_iommu(hose);
708 if (!pdn->iommu_table)
709 return;
710 set_iommu_table_base_and_group(&pdev->dev, pdn->iommu_table);
711}
712
713static void pnv_pci_dma_dev_setup(struct pci_dev *pdev) 665static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
714{ 666{
715 struct pci_controller *hose = pci_bus_to_host(pdev->bus); 667 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
@@ -733,13 +685,8 @@ static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
733 } 685 }
734#endif /* CONFIG_PCI_IOV */ 686#endif /* CONFIG_PCI_IOV */
735 687
736 /* If we have no phb structure, try to setup a fallback based on
737 * the device-tree (RTAS PCI for example)
738 */
739 if (phb && phb->dma_dev_setup) 688 if (phb && phb->dma_dev_setup)
740 phb->dma_dev_setup(phb, pdev); 689 phb->dma_dev_setup(phb, pdev);
741 else
742 pnv_pci_dma_fallback_setup(hose, pdev);
743} 690}
744 691
745int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask) 692int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
@@ -785,44 +732,36 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IBM, 0x3b9, pnv_p7ioc_rc_quirk);
785void __init pnv_pci_init(void) 732void __init pnv_pci_init(void)
786{ 733{
787 struct device_node *np; 734 struct device_node *np;
735 bool found_ioda = false;
788 736
789 pci_add_flags(PCI_CAN_SKIP_ISA_ALIGN); 737 pci_add_flags(PCI_CAN_SKIP_ISA_ALIGN);
790 738
791 /* OPAL absent, try POPAL first then RTAS detection of PHBs */ 739 /* If we don't have OPAL, eg. in sim, just skip PCI probe */
792 if (!firmware_has_feature(FW_FEATURE_OPAL)) { 740 if (!firmware_has_feature(FW_FEATURE_OPAL))
793#ifdef CONFIG_PPC_POWERNV_RTAS 741 return;
794 init_pci_config_tokens();
795 find_and_init_phbs();
796#endif /* CONFIG_PPC_POWERNV_RTAS */
797 }
798 /* OPAL is here, do our normal stuff */
799 else {
800 int found_ioda = 0;
801 742
802 /* Look for IODA IO-Hubs. We don't support mixing IODA 743 /* Look for IODA IO-Hubs. We don't support mixing IODA
803 * and p5ioc2 due to the need to change some global 744 * and p5ioc2 due to the need to change some global
804 * probing flags 745 * probing flags
805 */ 746 */
806 for_each_compatible_node(np, NULL, "ibm,ioda-hub") { 747 for_each_compatible_node(np, NULL, "ibm,ioda-hub") {
807 pnv_pci_init_ioda_hub(np); 748 pnv_pci_init_ioda_hub(np);
808 found_ioda = 1; 749 found_ioda = true;
809 } 750 }
810 751
811 /* Look for p5ioc2 IO-Hubs */ 752 /* Look for p5ioc2 IO-Hubs */
812 if (!found_ioda) 753 if (!found_ioda)
813 for_each_compatible_node(np, NULL, "ibm,p5ioc2") 754 for_each_compatible_node(np, NULL, "ibm,p5ioc2")
814 pnv_pci_init_p5ioc2_hub(np); 755 pnv_pci_init_p5ioc2_hub(np);
815 756
816 /* Look for ioda2 built-in PHB3's */ 757 /* Look for ioda2 built-in PHB3's */
817 for_each_compatible_node(np, NULL, "ibm,ioda2-phb") 758 for_each_compatible_node(np, NULL, "ibm,ioda2-phb")
818 pnv_pci_init_ioda2_phb(np); 759 pnv_pci_init_ioda2_phb(np);
819 }
820 760
821 /* Setup the linkage between OF nodes and PHBs */ 761 /* Setup the linkage between OF nodes and PHBs */
822 pci_devs_phb_init(); 762 pci_devs_phb_init();
823 763
824 /* Configure IOMMU DMA hooks */ 764 /* Configure IOMMU DMA hooks */
825 ppc_md.pci_dma_dev_setup = pnv_pci_dma_dev_setup;
826 ppc_md.tce_build = pnv_tce_build_vm; 765 ppc_md.tce_build = pnv_tce_build_vm;
827 ppc_md.tce_free = pnv_tce_free_vm; 766 ppc_md.tce_free = pnv_tce_free_vm;
828 ppc_md.tce_build_rm = pnv_tce_build_rm; 767 ppc_md.tce_build_rm = pnv_tce_build_rm;
@@ -838,3 +777,7 @@ void __init pnv_pci_init(void)
838} 777}
839 778
840machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init); 779machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init);
780
781struct pci_controller_ops pnv_pci_controller_ops = {
782 .dma_dev_setup = pnv_pci_dma_dev_setup,
783};
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h
index 604c48e7879a..826d2c9bea56 100644
--- a/arch/powerpc/platforms/powernv/powernv.h
+++ b/arch/powerpc/platforms/powernv/powernv.h
@@ -29,6 +29,8 @@ static inline u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)
29} 29}
30#endif 30#endif
31 31
32extern struct pci_controller_ops pnv_pci_controller_ops;
33
32extern u32 pnv_get_supported_cpuidle_states(void); 34extern u32 pnv_get_supported_cpuidle_states(void);
33 35
34extern void pnv_lpc_init(void); 36extern void pnv_lpc_init(void);
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index d2de7d5d7574..16fdcb23f4c3 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -32,7 +32,6 @@
32#include <asm/machdep.h> 32#include <asm/machdep.h>
33#include <asm/firmware.h> 33#include <asm/firmware.h>
34#include <asm/xics.h> 34#include <asm/xics.h>
35#include <asm/rtas.h>
36#include <asm/opal.h> 35#include <asm/opal.h>
37#include <asm/kexec.h> 36#include <asm/kexec.h>
38#include <asm/smp.h> 37#include <asm/smp.h>
@@ -278,20 +277,6 @@ static void __init pnv_setup_machdep_opal(void)
278 ppc_md.handle_hmi_exception = opal_handle_hmi_exception; 277 ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
279} 278}
280 279
281#ifdef CONFIG_PPC_POWERNV_RTAS
282static void __init pnv_setup_machdep_rtas(void)
283{
284 if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
285 ppc_md.get_boot_time = rtas_get_boot_time;
286 ppc_md.get_rtc_time = rtas_get_rtc_time;
287 ppc_md.set_rtc_time = rtas_set_rtc_time;
288 }
289 ppc_md.restart = rtas_restart;
290 pm_power_off = rtas_power_off;
291 ppc_md.halt = rtas_halt;
292}
293#endif /* CONFIG_PPC_POWERNV_RTAS */
294
295static u32 supported_cpuidle_states; 280static u32 supported_cpuidle_states;
296 281
297int pnv_save_sprs_for_winkle(void) 282int pnv_save_sprs_for_winkle(void)
@@ -409,37 +394,39 @@ static int __init pnv_init_idle_states(void)
409{ 394{
410 struct device_node *power_mgt; 395 struct device_node *power_mgt;
411 int dt_idle_states; 396 int dt_idle_states;
412 const __be32 *idle_state_flags; 397 u32 *flags;
413 u32 len_flags, flags;
414 int i; 398 int i;
415 399
416 supported_cpuidle_states = 0; 400 supported_cpuidle_states = 0;
417 401
418 if (cpuidle_disable != IDLE_NO_OVERRIDE) 402 if (cpuidle_disable != IDLE_NO_OVERRIDE)
419 return 0; 403 goto out;
420 404
421 if (!firmware_has_feature(FW_FEATURE_OPALv3)) 405 if (!firmware_has_feature(FW_FEATURE_OPALv3))
422 return 0; 406 goto out;
423 407
424 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 408 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
425 if (!power_mgt) { 409 if (!power_mgt) {
426 pr_warn("opal: PowerMgmt Node not found\n"); 410 pr_warn("opal: PowerMgmt Node not found\n");
427 return 0; 411 goto out;
412 }
413 dt_idle_states = of_property_count_u32_elems(power_mgt,
414 "ibm,cpu-idle-state-flags");
415 if (dt_idle_states < 0) {
416 pr_warn("cpuidle-powernv: no idle states found in the DT\n");
417 goto out;
428 } 418 }
429 419
430 idle_state_flags = of_get_property(power_mgt, 420 flags = kzalloc(sizeof(*flags) * dt_idle_states, GFP_KERNEL);
431 "ibm,cpu-idle-state-flags", &len_flags); 421 if (of_property_read_u32_array(power_mgt,
432 if (!idle_state_flags) { 422 "ibm,cpu-idle-state-flags", flags, dt_idle_states)) {
433 pr_warn("DT-PowerMgmt: missing ibm,cpu-idle-state-flags\n"); 423 pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-flags in DT\n");
434 return 0; 424 goto out_free;
435 } 425 }
436 426
437 dt_idle_states = len_flags / sizeof(u32); 427 for (i = 0; i < dt_idle_states; i++)
428 supported_cpuidle_states |= flags[i];
438 429
439 for (i = 0; i < dt_idle_states; i++) {
440 flags = be32_to_cpu(idle_state_flags[i]);
441 supported_cpuidle_states |= flags;
442 }
443 if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { 430 if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) {
444 patch_instruction( 431 patch_instruction(
445 (unsigned int *)pnv_fastsleep_workaround_at_entry, 432 (unsigned int *)pnv_fastsleep_workaround_at_entry,
@@ -449,6 +436,9 @@ static int __init pnv_init_idle_states(void)
449 PPC_INST_NOP); 436 PPC_INST_NOP);
450 } 437 }
451 pnv_alloc_idle_core_states(); 438 pnv_alloc_idle_core_states();
439out_free:
440 kfree(flags);
441out:
452 return 0; 442 return 0;
453} 443}
454 444
@@ -465,10 +455,6 @@ static int __init pnv_probe(void)
465 455
466 if (firmware_has_feature(FW_FEATURE_OPAL)) 456 if (firmware_has_feature(FW_FEATURE_OPAL))
467 pnv_setup_machdep_opal(); 457 pnv_setup_machdep_opal();
468#ifdef CONFIG_PPC_POWERNV_RTAS
469 else if (rtas.base)
470 pnv_setup_machdep_rtas();
471#endif /* CONFIG_PPC_POWERNV_RTAS */
472 458
473 pr_debug("PowerNV detected !\n"); 459 pr_debug("PowerNV detected !\n");
474 460
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index fc34025ef822..273d7b46f72a 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -25,7 +25,6 @@
25#include <asm/machdep.h> 25#include <asm/machdep.h>
26#include <asm/cputable.h> 26#include <asm/cputable.h>
27#include <asm/firmware.h> 27#include <asm/firmware.h>
28#include <asm/rtas.h>
29#include <asm/vdso_datapage.h> 28#include <asm/vdso_datapage.h>
30#include <asm/cputhreads.h> 29#include <asm/cputhreads.h>
31#include <asm/xics.h> 30#include <asm/xics.h>
@@ -241,18 +240,6 @@ void __init pnv_smp_init(void)
241{ 240{
242 smp_ops = &pnv_smp_ops; 241 smp_ops = &pnv_smp_ops;
243 242
244 /* XXX We don't yet have a proper entry point from HAL, for
245 * now we rely on kexec-style entry from BML
246 */
247
248#ifdef CONFIG_PPC_RTAS
249 /* Non-lpar has additional take/give timebase */
250 if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
251 smp_ops->give_timebase = rtas_give_timebase;
252 smp_ops->take_timebase = rtas_take_timebase;
253 }
254#endif /* CONFIG_PPC_RTAS */
255
256#ifdef CONFIG_HOTPLUG_CPU 243#ifdef CONFIG_HOTPLUG_CPU
257 ppc_md.cpu_die = pnv_smp_cpu_kill_self; 244 ppc_md.cpu_die = pnv_smp_cpu_kill_self;
258#endif 245#endif
diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c
index b358bec6c8cb..3c7707af3384 100644
--- a/arch/powerpc/platforms/ps3/smp.c
+++ b/arch/powerpc/platforms/ps3/smp.c
@@ -57,7 +57,7 @@ static void ps3_smp_message_pass(int cpu, int msg)
57 " (%d)\n", __func__, __LINE__, cpu, msg, result); 57 " (%d)\n", __func__, __LINE__, cpu, msg, result);
58} 58}
59 59
60static int __init ps3_smp_probe(void) 60static void __init ps3_smp_probe(void)
61{ 61{
62 int cpu; 62 int cpu;
63 63
@@ -100,8 +100,6 @@ static int __init ps3_smp_probe(void)
100 100
101 DBG(" <- %s:%d: (%d)\n", __func__, __LINE__, cpu); 101 DBG(" <- %s:%d: (%d)\n", __func__, __LINE__, cpu);
102 } 102 }
103
104 return 2;
105} 103}
106 104
107void ps3_smp_cleanup_cpu(int cpu) 105void ps3_smp_cleanup_cpu(int cpu)
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index a758a9c3bbba..54c87d5d349d 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -16,7 +16,6 @@ config PPC_PSERIES
16 select PPC_UDBG_16550 16 select PPC_UDBG_16550
17 select PPC_NATIVE 17 select PPC_NATIVE
18 select PPC_PCI_CHOICE if EXPERT 18 select PPC_PCI_CHOICE if EXPERT
19 select ZLIB_DEFLATE
20 select PPC_DOORBELL 19 select PPC_DOORBELL
21 select HAVE_CONTEXT_TRACKING 20 select HAVE_CONTEXT_TRACKING
22 select HOTPLUG_CPU if SMP 21 select HOTPLUG_CPU if SMP
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index c22bb1b4beb8..b4b11096ea8b 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -10,6 +10,8 @@
10 * 2 as published by the Free Software Foundation. 10 * 2 as published by the Free Software Foundation.
11 */ 11 */
12 12
13#define pr_fmt(fmt) "dlpar: " fmt
14
13#include <linux/kernel.h> 15#include <linux/kernel.h>
14#include <linux/notifier.h> 16#include <linux/notifier.h>
15#include <linux/spinlock.h> 17#include <linux/spinlock.h>
@@ -535,13 +537,125 @@ static ssize_t dlpar_cpu_release(const char *buf, size_t count)
535 return count; 537 return count;
536} 538}
537 539
540#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
541
542static int handle_dlpar_errorlog(struct pseries_hp_errorlog *hp_elog)
543{
544 int rc;
545
546 /* pseries error logs are in BE format, convert to cpu type */
547 switch (hp_elog->id_type) {
548 case PSERIES_HP_ELOG_ID_DRC_COUNT:
549 hp_elog->_drc_u.drc_count =
550 be32_to_cpu(hp_elog->_drc_u.drc_count);
551 break;
552 case PSERIES_HP_ELOG_ID_DRC_INDEX:
553 hp_elog->_drc_u.drc_index =
554 be32_to_cpu(hp_elog->_drc_u.drc_index);
555 }
556
557 switch (hp_elog->resource) {
558 case PSERIES_HP_ELOG_RESOURCE_MEM:
559 rc = dlpar_memory(hp_elog);
560 break;
561 default:
562 pr_warn_ratelimited("Invalid resource (%d) specified\n",
563 hp_elog->resource);
564 rc = -EINVAL;
565 }
566
567 return rc;
568}
569
570static ssize_t dlpar_store(struct class *class, struct class_attribute *attr,
571 const char *buf, size_t count)
572{
573 struct pseries_hp_errorlog *hp_elog;
574 const char *arg;
575 int rc;
576
577 hp_elog = kzalloc(sizeof(*hp_elog), GFP_KERNEL);
578 if (!hp_elog) {
579 rc = -ENOMEM;
580 goto dlpar_store_out;
581 }
582
583 /* Parse out the request from the user, this will be in the form
584 * <resource> <action> <id_type> <id>
585 */
586 arg = buf;
587 if (!strncmp(arg, "memory", 6)) {
588 hp_elog->resource = PSERIES_HP_ELOG_RESOURCE_MEM;
589 arg += strlen("memory ");
590 } else {
591 pr_err("Invalid resource specified: \"%s\"\n", buf);
592 rc = -EINVAL;
593 goto dlpar_store_out;
594 }
595
596 if (!strncmp(arg, "add", 3)) {
597 hp_elog->action = PSERIES_HP_ELOG_ACTION_ADD;
598 arg += strlen("add ");
599 } else if (!strncmp(arg, "remove", 6)) {
600 hp_elog->action = PSERIES_HP_ELOG_ACTION_REMOVE;
601 arg += strlen("remove ");
602 } else {
603 pr_err("Invalid action specified: \"%s\"\n", buf);
604 rc = -EINVAL;
605 goto dlpar_store_out;
606 }
607
608 if (!strncmp(arg, "index", 5)) {
609 u32 index;
610
611 hp_elog->id_type = PSERIES_HP_ELOG_ID_DRC_INDEX;
612 arg += strlen("index ");
613 if (kstrtou32(arg, 0, &index)) {
614 rc = -EINVAL;
615 pr_err("Invalid drc_index specified: \"%s\"\n", buf);
616 goto dlpar_store_out;
617 }
618
619 hp_elog->_drc_u.drc_index = cpu_to_be32(index);
620 } else if (!strncmp(arg, "count", 5)) {
621 u32 count;
622
623 hp_elog->id_type = PSERIES_HP_ELOG_ID_DRC_COUNT;
624 arg += strlen("count ");
625 if (kstrtou32(arg, 0, &count)) {
626 rc = -EINVAL;
627 pr_err("Invalid count specified: \"%s\"\n", buf);
628 goto dlpar_store_out;
629 }
630
631 hp_elog->_drc_u.drc_count = cpu_to_be32(count);
632 } else {
633 pr_err("Invalid id_type specified: \"%s\"\n", buf);
634 rc = -EINVAL;
635 goto dlpar_store_out;
636 }
637
638 rc = handle_dlpar_errorlog(hp_elog);
639
640dlpar_store_out:
641 kfree(hp_elog);
642 return rc ? rc : count;
643}
644
645static CLASS_ATTR(dlpar, S_IWUSR, NULL, dlpar_store);
646
538static int __init pseries_dlpar_init(void) 647static int __init pseries_dlpar_init(void)
539{ 648{
649 int rc;
650
651#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
540 ppc_md.cpu_probe = dlpar_cpu_probe; 652 ppc_md.cpu_probe = dlpar_cpu_probe;
541 ppc_md.cpu_release = dlpar_cpu_release; 653 ppc_md.cpu_release = dlpar_cpu_release;
654#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
542 655
543 return 0; 656 rc = sysfs_create_file(kernel_kobj, &class_attr_dlpar.attr);
657
658 return rc;
544} 659}
545machine_device_initcall(pseries, pseries_dlpar_init); 660machine_device_initcall(pseries, pseries_dlpar_init);
546 661
547#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index fa41f0da5b6f..5cefcadd3562 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -9,11 +9,14 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#define pr_fmt(fmt) "pseries-hotplug-mem: " fmt
13
12#include <linux/of.h> 14#include <linux/of.h>
13#include <linux/of_address.h> 15#include <linux/of_address.h>
14#include <linux/memblock.h> 16#include <linux/memblock.h>
15#include <linux/memory.h> 17#include <linux/memory.h>
16#include <linux/memory_hotplug.h> 18#include <linux/memory_hotplug.h>
19#include <linux/slab.h>
17 20
18#include <asm/firmware.h> 21#include <asm/firmware.h>
19#include <asm/machdep.h> 22#include <asm/machdep.h>
@@ -21,6 +24,8 @@
21#include <asm/sparsemem.h> 24#include <asm/sparsemem.h>
22#include "pseries.h" 25#include "pseries.h"
23 26
27static bool rtas_hp_event;
28
24unsigned long pseries_memory_block_size(void) 29unsigned long pseries_memory_block_size(void)
25{ 30{
26 struct device_node *np; 31 struct device_node *np;
@@ -64,6 +69,67 @@ unsigned long pseries_memory_block_size(void)
64 return memblock_size; 69 return memblock_size;
65} 70}
66 71
72static void dlpar_free_drconf_property(struct property *prop)
73{
74 kfree(prop->name);
75 kfree(prop->value);
76 kfree(prop);
77}
78
79static struct property *dlpar_clone_drconf_property(struct device_node *dn)
80{
81 struct property *prop, *new_prop;
82 struct of_drconf_cell *lmbs;
83 u32 num_lmbs, *p;
84 int i;
85
86 prop = of_find_property(dn, "ibm,dynamic-memory", NULL);
87 if (!prop)
88 return NULL;
89
90 new_prop = kzalloc(sizeof(*new_prop), GFP_KERNEL);
91 if (!new_prop)
92 return NULL;
93
94 new_prop->name = kstrdup(prop->name, GFP_KERNEL);
95 new_prop->value = kmalloc(prop->length, GFP_KERNEL);
96 if (!new_prop->name || !new_prop->value) {
97 dlpar_free_drconf_property(new_prop);
98 return NULL;
99 }
100
101 memcpy(new_prop->value, prop->value, prop->length);
102 new_prop->length = prop->length;
103
104 /* Convert the property to cpu endian-ness */
105 p = new_prop->value;
106 *p = be32_to_cpu(*p);
107
108 num_lmbs = *p++;
109 lmbs = (struct of_drconf_cell *)p;
110
111 for (i = 0; i < num_lmbs; i++) {
112 lmbs[i].base_addr = be64_to_cpu(lmbs[i].base_addr);
113 lmbs[i].drc_index = be32_to_cpu(lmbs[i].drc_index);
114 lmbs[i].flags = be32_to_cpu(lmbs[i].flags);
115 }
116
117 return new_prop;
118}
119
120static struct memory_block *lmb_to_memblock(struct of_drconf_cell *lmb)
121{
122 unsigned long section_nr;
123 struct mem_section *mem_sect;
124 struct memory_block *mem_block;
125
126 section_nr = pfn_to_section_nr(PFN_DOWN(lmb->base_addr));
127 mem_sect = __nr_to_section(section_nr);
128
129 mem_block = find_memory_block(mem_sect);
130 return mem_block;
131}
132
67#ifdef CONFIG_MEMORY_HOTREMOVE 133#ifdef CONFIG_MEMORY_HOTREMOVE
68static int pseries_remove_memblock(unsigned long base, unsigned int memblock_size) 134static int pseries_remove_memblock(unsigned long base, unsigned int memblock_size)
69{ 135{
@@ -122,6 +188,173 @@ static int pseries_remove_mem_node(struct device_node *np)
122 pseries_remove_memblock(base, lmb_size); 188 pseries_remove_memblock(base, lmb_size);
123 return 0; 189 return 0;
124} 190}
191
192static bool lmb_is_removable(struct of_drconf_cell *lmb)
193{
194 int i, scns_per_block;
195 int rc = 1;
196 unsigned long pfn, block_sz;
197 u64 phys_addr;
198
199 if (!(lmb->flags & DRCONF_MEM_ASSIGNED))
200 return false;
201
202 block_sz = memory_block_size_bytes();
203 scns_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE;
204 phys_addr = lmb->base_addr;
205
206 for (i = 0; i < scns_per_block; i++) {
207 pfn = PFN_DOWN(phys_addr);
208 if (!pfn_present(pfn))
209 continue;
210
211 rc &= is_mem_section_removable(pfn, PAGES_PER_SECTION);
212 phys_addr += MIN_MEMORY_BLOCK_SIZE;
213 }
214
215 return rc ? true : false;
216}
217
218static int dlpar_add_lmb(struct of_drconf_cell *);
219
220static int dlpar_remove_lmb(struct of_drconf_cell *lmb)
221{
222 struct memory_block *mem_block;
223 unsigned long block_sz;
224 int nid, rc;
225
226 if (!lmb_is_removable(lmb))
227 return -EINVAL;
228
229 mem_block = lmb_to_memblock(lmb);
230 if (!mem_block)
231 return -EINVAL;
232
233 rc = device_offline(&mem_block->dev);
234 put_device(&mem_block->dev);
235 if (rc)
236 return rc;
237
238 block_sz = pseries_memory_block_size();
239 nid = memory_add_physaddr_to_nid(lmb->base_addr);
240
241 remove_memory(nid, lmb->base_addr, block_sz);
242
243 /* Update memory regions for memory remove */
244 memblock_remove(lmb->base_addr, block_sz);
245
246 dlpar_release_drc(lmb->drc_index);
247
248 lmb->flags &= ~DRCONF_MEM_ASSIGNED;
249 return 0;
250}
251
252static int dlpar_memory_remove_by_count(u32 lmbs_to_remove,
253 struct property *prop)
254{
255 struct of_drconf_cell *lmbs;
256 int lmbs_removed = 0;
257 int lmbs_available = 0;
258 u32 num_lmbs, *p;
259 int i, rc;
260
261 pr_info("Attempting to hot-remove %d LMB(s)\n", lmbs_to_remove);
262
263 if (lmbs_to_remove == 0)
264 return -EINVAL;
265
266 p = prop->value;
267 num_lmbs = *p++;
268 lmbs = (struct of_drconf_cell *)p;
269
270 /* Validate that there are enough LMBs to satisfy the request */
271 for (i = 0; i < num_lmbs; i++) {
272 if (lmbs[i].flags & DRCONF_MEM_ASSIGNED)
273 lmbs_available++;
274 }
275
276 if (lmbs_available < lmbs_to_remove)
277 return -EINVAL;
278
279 for (i = 0; i < num_lmbs && lmbs_removed < lmbs_to_remove; i++) {
280 rc = dlpar_remove_lmb(&lmbs[i]);
281 if (rc)
282 continue;
283
284 lmbs_removed++;
285
286 /* Mark this lmb so we can add it later if all of the
287 * requested LMBs cannot be removed.
288 */
289 lmbs[i].reserved = 1;
290 }
291
292 if (lmbs_removed != lmbs_to_remove) {
293 pr_err("Memory hot-remove failed, adding LMB's back\n");
294
295 for (i = 0; i < num_lmbs; i++) {
296 if (!lmbs[i].reserved)
297 continue;
298
299 rc = dlpar_add_lmb(&lmbs[i]);
300 if (rc)
301 pr_err("Failed to add LMB back, drc index %x\n",
302 lmbs[i].drc_index);
303
304 lmbs[i].reserved = 0;
305 }
306
307 rc = -EINVAL;
308 } else {
309 for (i = 0; i < num_lmbs; i++) {
310 if (!lmbs[i].reserved)
311 continue;
312
313 pr_info("Memory at %llx was hot-removed\n",
314 lmbs[i].base_addr);
315
316 lmbs[i].reserved = 0;
317 }
318 rc = 0;
319 }
320
321 return rc;
322}
323
324static int dlpar_memory_remove_by_index(u32 drc_index, struct property *prop)
325{
326 struct of_drconf_cell *lmbs;
327 u32 num_lmbs, *p;
328 int lmb_found;
329 int i, rc;
330
331 pr_info("Attempting to hot-remove LMB, drc index %x\n", drc_index);
332
333 p = prop->value;
334 num_lmbs = *p++;
335 lmbs = (struct of_drconf_cell *)p;
336
337 lmb_found = 0;
338 for (i = 0; i < num_lmbs; i++) {
339 if (lmbs[i].drc_index == drc_index) {
340 lmb_found = 1;
341 rc = dlpar_remove_lmb(&lmbs[i]);
342 break;
343 }
344 }
345
346 if (!lmb_found)
347 rc = -EINVAL;
348
349 if (rc)
350 pr_info("Failed to hot-remove memory at %llx\n",
351 lmbs[i].base_addr);
352 else
353 pr_info("Memory at %llx was hot-removed\n", lmbs[i].base_addr);
354
355 return rc;
356}
357
125#else 358#else
126static inline int pseries_remove_memblock(unsigned long base, 359static inline int pseries_remove_memblock(unsigned long base,
127 unsigned int memblock_size) 360 unsigned int memblock_size)
@@ -132,8 +365,248 @@ static inline int pseries_remove_mem_node(struct device_node *np)
132{ 365{
133 return 0; 366 return 0;
134} 367}
368static inline int dlpar_memory_remove(struct pseries_hp_errorlog *hp_elog)
369{
370 return -EOPNOTSUPP;
371}
372
135#endif /* CONFIG_MEMORY_HOTREMOVE */ 373#endif /* CONFIG_MEMORY_HOTREMOVE */
136 374
375static int dlpar_add_lmb(struct of_drconf_cell *lmb)
376{
377 struct memory_block *mem_block;
378 unsigned long block_sz;
379 int nid, rc;
380
381 if (lmb->flags & DRCONF_MEM_ASSIGNED)
382 return -EINVAL;
383
384 block_sz = memory_block_size_bytes();
385
386 rc = dlpar_acquire_drc(lmb->drc_index);
387 if (rc)
388 return rc;
389
390 /* Find the node id for this address */
391 nid = memory_add_physaddr_to_nid(lmb->base_addr);
392
393 /* Add the memory */
394 rc = add_memory(nid, lmb->base_addr, block_sz);
395 if (rc) {
396 dlpar_release_drc(lmb->drc_index);
397 return rc;
398 }
399
400 /* Register this block of memory */
401 rc = memblock_add(lmb->base_addr, block_sz);
402 if (rc) {
403 remove_memory(nid, lmb->base_addr, block_sz);
404 dlpar_release_drc(lmb->drc_index);
405 return rc;
406 }
407
408 mem_block = lmb_to_memblock(lmb);
409 if (!mem_block) {
410 remove_memory(nid, lmb->base_addr, block_sz);
411 dlpar_release_drc(lmb->drc_index);
412 return -EINVAL;
413 }
414
415 rc = device_online(&mem_block->dev);
416 put_device(&mem_block->dev);
417 if (rc) {
418 remove_memory(nid, lmb->base_addr, block_sz);
419 dlpar_release_drc(lmb->drc_index);
420 return rc;
421 }
422
423 lmb->flags |= DRCONF_MEM_ASSIGNED;
424 return 0;
425}
426
427static int dlpar_memory_add_by_count(u32 lmbs_to_add, struct property *prop)
428{
429 struct of_drconf_cell *lmbs;
430 u32 num_lmbs, *p;
431 int lmbs_available = 0;
432 int lmbs_added = 0;
433 int i, rc;
434
435 pr_info("Attempting to hot-add %d LMB(s)\n", lmbs_to_add);
436
437 if (lmbs_to_add == 0)
438 return -EINVAL;
439
440 p = prop->value;
441 num_lmbs = *p++;
442 lmbs = (struct of_drconf_cell *)p;
443
444 /* Validate that there are enough LMBs to satisfy the request */
445 for (i = 0; i < num_lmbs; i++) {
446 if (!(lmbs[i].flags & DRCONF_MEM_ASSIGNED))
447 lmbs_available++;
448 }
449
450 if (lmbs_available < lmbs_to_add)
451 return -EINVAL;
452
453 for (i = 0; i < num_lmbs && lmbs_to_add != lmbs_added; i++) {
454 rc = dlpar_add_lmb(&lmbs[i]);
455 if (rc)
456 continue;
457
458 lmbs_added++;
459
460 /* Mark this lmb so we can remove it later if all of the
461 * requested LMBs cannot be added.
462 */
463 lmbs[i].reserved = 1;
464 }
465
466 if (lmbs_added != lmbs_to_add) {
467 pr_err("Memory hot-add failed, removing any added LMBs\n");
468
469 for (i = 0; i < num_lmbs; i++) {
470 if (!lmbs[i].reserved)
471 continue;
472
473 rc = dlpar_remove_lmb(&lmbs[i]);
474 if (rc)
475 pr_err("Failed to remove LMB, drc index %x\n",
476 be32_to_cpu(lmbs[i].drc_index));
477 }
478 rc = -EINVAL;
479 } else {
480 for (i = 0; i < num_lmbs; i++) {
481 if (!lmbs[i].reserved)
482 continue;
483
484 pr_info("Memory at %llx (drc index %x) was hot-added\n",
485 lmbs[i].base_addr, lmbs[i].drc_index);
486 lmbs[i].reserved = 0;
487 }
488 }
489
490 return rc;
491}
492
493static int dlpar_memory_add_by_index(u32 drc_index, struct property *prop)
494{
495 struct of_drconf_cell *lmbs;
496 u32 num_lmbs, *p;
497 int i, lmb_found;
498 int rc;
499
500 pr_info("Attempting to hot-add LMB, drc index %x\n", drc_index);
501
502 p = prop->value;
503 num_lmbs = *p++;
504 lmbs = (struct of_drconf_cell *)p;
505
506 lmb_found = 0;
507 for (i = 0; i < num_lmbs; i++) {
508 if (lmbs[i].drc_index == drc_index) {
509 lmb_found = 1;
510 rc = dlpar_add_lmb(&lmbs[i]);
511 break;
512 }
513 }
514
515 if (!lmb_found)
516 rc = -EINVAL;
517
518 if (rc)
519 pr_info("Failed to hot-add memory, drc index %x\n", drc_index);
520 else
521 pr_info("Memory at %llx (drc index %x) was hot-added\n",
522 lmbs[i].base_addr, drc_index);
523
524 return rc;
525}
526
527static void dlpar_update_drconf_property(struct device_node *dn,
528 struct property *prop)
529{
530 struct of_drconf_cell *lmbs;
531 u32 num_lmbs, *p;
532 int i;
533
534 /* Convert the property back to BE */
535 p = prop->value;
536 num_lmbs = *p;
537 *p = cpu_to_be32(*p);
538 p++;
539
540 lmbs = (struct of_drconf_cell *)p;
541 for (i = 0; i < num_lmbs; i++) {
542 lmbs[i].base_addr = cpu_to_be64(lmbs[i].base_addr);
543 lmbs[i].drc_index = cpu_to_be32(lmbs[i].drc_index);
544 lmbs[i].flags = cpu_to_be32(lmbs[i].flags);
545 }
546
547 rtas_hp_event = true;
548 of_update_property(dn, prop);
549 rtas_hp_event = false;
550}
551
552int dlpar_memory(struct pseries_hp_errorlog *hp_elog)
553{
554 struct device_node *dn;
555 struct property *prop;
556 u32 count, drc_index;
557 int rc;
558
559 count = hp_elog->_drc_u.drc_count;
560 drc_index = hp_elog->_drc_u.drc_index;
561
562 lock_device_hotplug();
563
564 dn = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
565 if (!dn) {
566 rc = -EINVAL;
567 goto dlpar_memory_out;
568 }
569
570 prop = dlpar_clone_drconf_property(dn);
571 if (!prop) {
572 rc = -EINVAL;
573 goto dlpar_memory_out;
574 }
575
576 switch (hp_elog->action) {
577 case PSERIES_HP_ELOG_ACTION_ADD:
578 if (hp_elog->id_type == PSERIES_HP_ELOG_ID_DRC_COUNT)
579 rc = dlpar_memory_add_by_count(count, prop);
580 else if (hp_elog->id_type == PSERIES_HP_ELOG_ID_DRC_INDEX)
581 rc = dlpar_memory_add_by_index(drc_index, prop);
582 else
583 rc = -EINVAL;
584 break;
585 case PSERIES_HP_ELOG_ACTION_REMOVE:
586 if (hp_elog->id_type == PSERIES_HP_ELOG_ID_DRC_COUNT)
587 rc = dlpar_memory_remove_by_count(count, prop);
588 else if (hp_elog->id_type == PSERIES_HP_ELOG_ID_DRC_INDEX)
589 rc = dlpar_memory_remove_by_index(drc_index, prop);
590 else
591 rc = -EINVAL;
592 break;
593 default:
594 pr_err("Invalid action (%d) specified\n", hp_elog->action);
595 rc = -EINVAL;
596 break;
597 }
598
599 if (rc)
600 dlpar_free_drconf_property(prop);
601 else
602 dlpar_update_drconf_property(dn, prop);
603
604dlpar_memory_out:
605 of_node_put(dn);
606 unlock_device_hotplug();
607 return rc;
608}
609
137static int pseries_add_mem_node(struct device_node *np) 610static int pseries_add_mem_node(struct device_node *np)
138{ 611{
139 const char *type; 612 const char *type;
@@ -174,6 +647,9 @@ static int pseries_update_drconf_memory(struct of_reconfig_data *pr)
174 __be32 *p; 647 __be32 *p;
175 int i, rc = -EINVAL; 648 int i, rc = -EINVAL;
176 649
650 if (rtas_hp_event)
651 return 0;
652
177 memblock_size = pseries_memory_block_size(); 653 memblock_size = pseries_memory_block_size();
178 if (!memblock_size) 654 if (!memblock_size)
179 return -EINVAL; 655 return -EINVAL;
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 7803a19adb31..61d5a17f45c0 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -49,6 +49,7 @@
49#include <asm/mmzone.h> 49#include <asm/mmzone.h>
50#include <asm/plpar_wrappers.h> 50#include <asm/plpar_wrappers.h>
51 51
52#include "pseries.h"
52 53
53static void tce_invalidate_pSeries_sw(struct iommu_table *tbl, 54static void tce_invalidate_pSeries_sw(struct iommu_table *tbl,
54 __be64 *startp, __be64 *endp) 55 __be64 *startp, __be64 *endp)
@@ -1307,16 +1308,16 @@ void iommu_init_early_pSeries(void)
1307 ppc_md.tce_free = tce_free_pSeriesLP; 1308 ppc_md.tce_free = tce_free_pSeriesLP;
1308 } 1309 }
1309 ppc_md.tce_get = tce_get_pSeriesLP; 1310 ppc_md.tce_get = tce_get_pSeriesLP;
1310 ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_pSeriesLP; 1311 pseries_pci_controller_ops.dma_bus_setup = pci_dma_bus_setup_pSeriesLP;
1311 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_pSeriesLP; 1312 pseries_pci_controller_ops.dma_dev_setup = pci_dma_dev_setup_pSeriesLP;
1312 ppc_md.dma_set_mask = dma_set_mask_pSeriesLP; 1313 ppc_md.dma_set_mask = dma_set_mask_pSeriesLP;
1313 ppc_md.dma_get_required_mask = dma_get_required_mask_pSeriesLP; 1314 ppc_md.dma_get_required_mask = dma_get_required_mask_pSeriesLP;
1314 } else { 1315 } else {
1315 ppc_md.tce_build = tce_build_pSeries; 1316 ppc_md.tce_build = tce_build_pSeries;
1316 ppc_md.tce_free = tce_free_pSeries; 1317 ppc_md.tce_free = tce_free_pSeries;
1317 ppc_md.tce_get = tce_get_pseries; 1318 ppc_md.tce_get = tce_get_pseries;
1318 ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_pSeries; 1319 pseries_pci_controller_ops.dma_bus_setup = pci_dma_bus_setup_pSeries;
1319 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_pSeries; 1320 pseries_pci_controller_ops.dma_dev_setup = pci_dma_dev_setup_pSeries;
1320 } 1321 }
1321 1322
1322 1323
diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c
index 90cf3dcbd9f2..38db1b9f2ac3 100644
--- a/arch/powerpc/platforms/pseries/mobility.c
+++ b/arch/powerpc/platforms/pseries/mobility.c
@@ -318,28 +318,34 @@ static ssize_t migrate_store(struct class *class, struct class_attribute *attr,
318{ 318{
319 u64 streamid; 319 u64 streamid;
320 int rc; 320 int rc;
321 int vasi_rc = 0;
322 321
323 rc = kstrtou64(buf, 0, &streamid); 322 rc = kstrtou64(buf, 0, &streamid);
324 if (rc) 323 if (rc)
325 return rc; 324 return rc;
326 325
327 do { 326 do {
328 rc = rtas_ibm_suspend_me(streamid, &vasi_rc); 327 rc = rtas_ibm_suspend_me(streamid);
329 if (!rc && vasi_rc == RTAS_NOT_SUSPENDABLE) 328 if (rc == -EAGAIN)
330 ssleep(1); 329 ssleep(1);
331 } while (!rc && vasi_rc == RTAS_NOT_SUSPENDABLE); 330 } while (rc == -EAGAIN);
332 331
333 if (rc) 332 if (rc)
334 return rc; 333 return rc;
335 if (vasi_rc)
336 return vasi_rc;
337 334
338 post_mobility_fixup(); 335 post_mobility_fixup();
339 return count; 336 return count;
340} 337}
341 338
339/*
340 * Used by drmgr to determine the kernel behavior of the migration interface.
341 *
342 * Version 1: Performs all PAPR requirements for migration including
343 * firmware activation and device tree update.
344 */
345#define MIGRATION_API_VERSION 1
346
342static CLASS_ATTR(migration, S_IWUSR, NULL, migrate_store); 347static CLASS_ATTR(migration, S_IWUSR, NULL, migrate_store);
348static CLASS_ATTR_STRING(api_version, S_IRUGO, __stringify(MIGRATION_API_VERSION));
343 349
344static int __init mobility_sysfs_init(void) 350static int __init mobility_sysfs_init(void)
345{ 351{
@@ -350,7 +356,13 @@ static int __init mobility_sysfs_init(void)
350 return -ENOMEM; 356 return -ENOMEM;
351 357
352 rc = sysfs_create_file(mobility_kobj, &class_attr_migration.attr); 358 rc = sysfs_create_file(mobility_kobj, &class_attr_migration.attr);
359 if (rc)
360 pr_err("mobility: unable to create migration sysfs file (%d)\n", rc);
353 361
354 return rc; 362 rc = sysfs_create_file(mobility_kobj, &class_attr_api_version.attr.attr);
363 if (rc)
364 pr_err("mobility: unable to create api_version sysfs file (%d)\n", rc);
365
366 return 0;
355} 367}
356machine_device_initcall(pseries, mobility_sysfs_init); 368machine_device_initcall(pseries, mobility_sysfs_init);
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 054a0ed5c7ee..9f8184175c86 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -20,7 +20,6 @@
20#include <linux/kmsg_dump.h> 20#include <linux/kmsg_dump.h>
21#include <linux/pstore.h> 21#include <linux/pstore.h>
22#include <linux/ctype.h> 22#include <linux/ctype.h>
23#include <linux/zlib.h>
24#include <asm/uaccess.h> 23#include <asm/uaccess.h>
25#include <asm/nvram.h> 24#include <asm/nvram.h>
26#include <asm/rtas.h> 25#include <asm/rtas.h>
@@ -30,129 +29,17 @@
30/* Max bytes to read/write in one go */ 29/* Max bytes to read/write in one go */
31#define NVRW_CNT 0x20 30#define NVRW_CNT 0x20
32 31
33/*
34 * Set oops header version to distinguish between old and new format header.
35 * lnx,oops-log partition max size is 4000, header version > 4000 will
36 * help in identifying new header.
37 */
38#define OOPS_HDR_VERSION 5000
39
40static unsigned int nvram_size; 32static unsigned int nvram_size;
41static int nvram_fetch, nvram_store; 33static int nvram_fetch, nvram_store;
42static char nvram_buf[NVRW_CNT]; /* assume this is in the first 4GB */ 34static char nvram_buf[NVRW_CNT]; /* assume this is in the first 4GB */
43static DEFINE_SPINLOCK(nvram_lock); 35static DEFINE_SPINLOCK(nvram_lock);
44 36
45struct err_log_info {
46 __be32 error_type;
47 __be32 seq_num;
48};
49
50struct nvram_os_partition {
51 const char *name;
52 int req_size; /* desired size, in bytes */
53 int min_size; /* minimum acceptable size (0 means req_size) */
54 long size; /* size of data portion (excluding err_log_info) */
55 long index; /* offset of data portion of partition */
56 bool os_partition; /* partition initialized by OS, not FW */
57};
58
59static struct nvram_os_partition rtas_log_partition = {
60 .name = "ibm,rtas-log",
61 .req_size = 2079,
62 .min_size = 1055,
63 .index = -1,
64 .os_partition = true
65};
66
67static struct nvram_os_partition oops_log_partition = {
68 .name = "lnx,oops-log",
69 .req_size = 4000,
70 .min_size = 2000,
71 .index = -1,
72 .os_partition = true
73};
74
75static const char *pseries_nvram_os_partitions[] = {
76 "ibm,rtas-log",
77 "lnx,oops-log",
78 NULL
79};
80
81struct oops_log_info {
82 __be16 version;
83 __be16 report_length;
84 __be64 timestamp;
85} __attribute__((packed));
86
87static void oops_to_nvram(struct kmsg_dumper *dumper,
88 enum kmsg_dump_reason reason);
89
90static struct kmsg_dumper nvram_kmsg_dumper = {
91 .dump = oops_to_nvram
92};
93
94/* See clobbering_unread_rtas_event() */ 37/* See clobbering_unread_rtas_event() */
95#define NVRAM_RTAS_READ_TIMEOUT 5 /* seconds */ 38#define NVRAM_RTAS_READ_TIMEOUT 5 /* seconds */
96static unsigned long last_unread_rtas_event; /* timestamp */ 39static time64_t last_unread_rtas_event; /* timestamp */
97
98/*
99 * For capturing and compressing an oops or panic report...
100
101 * big_oops_buf[] holds the uncompressed text we're capturing.
102 *
103 * oops_buf[] holds the compressed text, preceded by a oops header.
104 * oops header has u16 holding the version of oops header (to differentiate
105 * between old and new format header) followed by u16 holding the length of
106 * the compressed* text (*Or uncompressed, if compression fails.) and u64
107 * holding the timestamp. oops_buf[] gets written to NVRAM.
108 *
109 * oops_log_info points to the header. oops_data points to the compressed text.
110 *
111 * +- oops_buf
112 * | +- oops_data
113 * v v
114 * +-----------+-----------+-----------+------------------------+
115 * | version | length | timestamp | text |
116 * | (2 bytes) | (2 bytes) | (8 bytes) | (oops_data_sz bytes) |
117 * +-----------+-----------+-----------+------------------------+
118 * ^
119 * +- oops_log_info
120 *
121 * We preallocate these buffers during init to avoid kmalloc during oops/panic.
122 */
123static size_t big_oops_buf_sz;
124static char *big_oops_buf, *oops_buf;
125static char *oops_data;
126static size_t oops_data_sz;
127
128/* Compression parameters */
129#define COMPR_LEVEL 6
130#define WINDOW_BITS 12
131#define MEM_LEVEL 4
132static struct z_stream_s stream;
133 40
134#ifdef CONFIG_PSTORE 41#ifdef CONFIG_PSTORE
135static struct nvram_os_partition of_config_partition = { 42time64_t last_rtas_event;
136 .name = "of-config",
137 .index = -1,
138 .os_partition = false
139};
140
141static struct nvram_os_partition common_partition = {
142 .name = "common",
143 .index = -1,
144 .os_partition = false
145};
146
147static enum pstore_type_id nvram_type_ids[] = {
148 PSTORE_TYPE_DMESG,
149 PSTORE_TYPE_PPC_RTAS,
150 PSTORE_TYPE_PPC_OF,
151 PSTORE_TYPE_PPC_COMMON,
152 -1
153};
154static int read_type;
155static unsigned long last_rtas_event;
156#endif 43#endif
157 44
158static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index) 45static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index)
@@ -246,132 +133,26 @@ static ssize_t pSeries_nvram_get_size(void)
246 return nvram_size ? nvram_size : -ENODEV; 133 return nvram_size ? nvram_size : -ENODEV;
247} 134}
248 135
249 136/* nvram_write_error_log
250/* nvram_write_os_partition, nvram_write_error_log
251 * 137 *
252 * We need to buffer the error logs into nvram to ensure that we have 138 * We need to buffer the error logs into nvram to ensure that we have
253 * the failure information to decode. If we have a severe error there 139 * the failure information to decode.
254 * is no way to guarantee that the OS or the machine is in a state to
255 * get back to user land and write the error to disk. For example if
256 * the SCSI device driver causes a Machine Check by writing to a bad
257 * IO address, there is no way of guaranteeing that the device driver
258 * is in any state that is would also be able to write the error data
259 * captured to disk, thus we buffer it in NVRAM for analysis on the
260 * next boot.
261 *
262 * In NVRAM the partition containing the error log buffer will looks like:
263 * Header (in bytes):
264 * +-----------+----------+--------+------------+------------------+
265 * | signature | checksum | length | name | data |
266 * |0 |1 |2 3|4 15|16 length-1|
267 * +-----------+----------+--------+------------+------------------+
268 *
269 * The 'data' section would look like (in bytes):
270 * +--------------+------------+-----------------------------------+
271 * | event_logged | sequence # | error log |
272 * |0 3|4 7|8 error_log_size-1|
273 * +--------------+------------+-----------------------------------+
274 *
275 * event_logged: 0 if event has not been logged to syslog, 1 if it has
276 * sequence #: The unique sequence # for each event. (until it wraps)
277 * error log: The error log from event_scan
278 */ 140 */
279static int nvram_write_os_partition(struct nvram_os_partition *part,
280 char *buff, int length,
281 unsigned int err_type,
282 unsigned int error_log_cnt)
283{
284 int rc;
285 loff_t tmp_index;
286 struct err_log_info info;
287
288 if (part->index == -1) {
289 return -ESPIPE;
290 }
291
292 if (length > part->size) {
293 length = part->size;
294 }
295
296 info.error_type = cpu_to_be32(err_type);
297 info.seq_num = cpu_to_be32(error_log_cnt);
298
299 tmp_index = part->index;
300
301 rc = ppc_md.nvram_write((char *)&info, sizeof(struct err_log_info), &tmp_index);
302 if (rc <= 0) {
303 pr_err("%s: Failed nvram_write (%d)\n", __func__, rc);
304 return rc;
305 }
306
307 rc = ppc_md.nvram_write(buff, length, &tmp_index);
308 if (rc <= 0) {
309 pr_err("%s: Failed nvram_write (%d)\n", __func__, rc);
310 return rc;
311 }
312
313 return 0;
314}
315
316int nvram_write_error_log(char * buff, int length, 141int nvram_write_error_log(char * buff, int length,
317 unsigned int err_type, unsigned int error_log_cnt) 142 unsigned int err_type, unsigned int error_log_cnt)
318{ 143{
319 int rc = nvram_write_os_partition(&rtas_log_partition, buff, length, 144 int rc = nvram_write_os_partition(&rtas_log_partition, buff, length,
320 err_type, error_log_cnt); 145 err_type, error_log_cnt);
321 if (!rc) { 146 if (!rc) {
322 last_unread_rtas_event = get_seconds(); 147 last_unread_rtas_event = ktime_get_real_seconds();
323#ifdef CONFIG_PSTORE 148#ifdef CONFIG_PSTORE
324 last_rtas_event = get_seconds(); 149 last_rtas_event = ktime_get_real_seconds();
325#endif 150#endif
326 } 151 }
327 152
328 return rc; 153 return rc;
329} 154}
330 155
331/* nvram_read_partition
332 *
333 * Reads nvram partition for at most 'length'
334 */
335static int nvram_read_partition(struct nvram_os_partition *part, char *buff,
336 int length, unsigned int *err_type,
337 unsigned int *error_log_cnt)
338{
339 int rc;
340 loff_t tmp_index;
341 struct err_log_info info;
342
343 if (part->index == -1)
344 return -1;
345
346 if (length > part->size)
347 length = part->size;
348
349 tmp_index = part->index;
350
351 if (part->os_partition) {
352 rc = ppc_md.nvram_read((char *)&info,
353 sizeof(struct err_log_info),
354 &tmp_index);
355 if (rc <= 0) {
356 pr_err("%s: Failed nvram_read (%d)\n", __func__, rc);
357 return rc;
358 }
359 }
360
361 rc = ppc_md.nvram_read(buff, length, &tmp_index);
362 if (rc <= 0) {
363 pr_err("%s: Failed nvram_read (%d)\n", __func__, rc);
364 return rc;
365 }
366
367 if (part->os_partition) {
368 *error_log_cnt = be32_to_cpu(info.seq_num);
369 *err_type = be32_to_cpu(info.error_type);
370 }
371
372 return 0;
373}
374
375/* nvram_read_error_log 156/* nvram_read_error_log
376 * 157 *
377 * Reads nvram for error log for at most 'length' 158 * Reads nvram for error log for at most 'length'
@@ -407,67 +188,6 @@ int nvram_clear_error_log(void)
407 return 0; 188 return 0;
408} 189}
409 190
410/* pseries_nvram_init_os_partition
411 *
412 * This sets up a partition with an "OS" signature.
413 *
414 * The general strategy is the following:
415 * 1.) If a partition with the indicated name already exists...
416 * - If it's large enough, use it.
417 * - Otherwise, recycle it and keep going.
418 * 2.) Search for a free partition that is large enough.
419 * 3.) If there's not a free partition large enough, recycle any obsolete
420 * OS partitions and try again.
421 * 4.) Will first try getting a chunk that will satisfy the requested size.
422 * 5.) If a chunk of the requested size cannot be allocated, then try finding
423 * a chunk that will satisfy the minum needed.
424 *
425 * Returns 0 on success, else -1.
426 */
427static int __init pseries_nvram_init_os_partition(struct nvram_os_partition
428 *part)
429{
430 loff_t p;
431 int size;
432
433 /* Look for ours */
434 p = nvram_find_partition(part->name, NVRAM_SIG_OS, &size);
435
436 /* Found one but too small, remove it */
437 if (p && size < part->min_size) {
438 pr_info("nvram: Found too small %s partition,"
439 " removing it...\n", part->name);
440 nvram_remove_partition(part->name, NVRAM_SIG_OS, NULL);
441 p = 0;
442 }
443
444 /* Create one if we didn't find */
445 if (!p) {
446 p = nvram_create_partition(part->name, NVRAM_SIG_OS,
447 part->req_size, part->min_size);
448 if (p == -ENOSPC) {
449 pr_info("nvram: No room to create %s partition, "
450 "deleting any obsolete OS partitions...\n",
451 part->name);
452 nvram_remove_partition(NULL, NVRAM_SIG_OS,
453 pseries_nvram_os_partitions);
454 p = nvram_create_partition(part->name, NVRAM_SIG_OS,
455 part->req_size, part->min_size);
456 }
457 }
458
459 if (p <= 0) {
460 pr_err("nvram: Failed to find or create %s"
461 " partition, err %d\n", part->name, (int)p);
462 return -1;
463 }
464
465 part->index = p;
466 part->size = nvram_get_partition_size(p) - sizeof(struct err_log_info);
467
468 return 0;
469}
470
471/* 191/*
472 * Are we using the ibm,rtas-log for oops/panic reports? And if so, 192 * Are we using the ibm,rtas-log for oops/panic reports? And if so,
473 * would logging this oops/panic overwrite an RTAS event that rtas_errd 193 * would logging this oops/panic overwrite an RTAS event that rtas_errd
@@ -476,321 +196,14 @@ static int __init pseries_nvram_init_os_partition(struct nvram_os_partition
476 * We assume that if rtas_errd hasn't read the RTAS event in 196 * We assume that if rtas_errd hasn't read the RTAS event in
477 * NVRAM_RTAS_READ_TIMEOUT seconds, it's probably not going to. 197 * NVRAM_RTAS_READ_TIMEOUT seconds, it's probably not going to.
478 */ 198 */
479static int clobbering_unread_rtas_event(void) 199int clobbering_unread_rtas_event(void)
480{ 200{
481 return (oops_log_partition.index == rtas_log_partition.index 201 return (oops_log_partition.index == rtas_log_partition.index
482 && last_unread_rtas_event 202 && last_unread_rtas_event
483 && get_seconds() - last_unread_rtas_event <= 203 && ktime_get_real_seconds() - last_unread_rtas_event <=
484 NVRAM_RTAS_READ_TIMEOUT); 204 NVRAM_RTAS_READ_TIMEOUT);
485} 205}
486 206
487/* Derived from logfs_compress() */
488static int nvram_compress(const void *in, void *out, size_t inlen,
489 size_t outlen)
490{
491 int err, ret;
492
493 ret = -EIO;
494 err = zlib_deflateInit2(&stream, COMPR_LEVEL, Z_DEFLATED, WINDOW_BITS,
495 MEM_LEVEL, Z_DEFAULT_STRATEGY);
496 if (err != Z_OK)
497 goto error;
498
499 stream.next_in = in;
500 stream.avail_in = inlen;
501 stream.total_in = 0;
502 stream.next_out = out;
503 stream.avail_out = outlen;
504 stream.total_out = 0;
505
506 err = zlib_deflate(&stream, Z_FINISH);
507 if (err != Z_STREAM_END)
508 goto error;
509
510 err = zlib_deflateEnd(&stream);
511 if (err != Z_OK)
512 goto error;
513
514 if (stream.total_out >= stream.total_in)
515 goto error;
516
517 ret = stream.total_out;
518error:
519 return ret;
520}
521
522/* Compress the text from big_oops_buf into oops_buf. */
523static int zip_oops(size_t text_len)
524{
525 struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
526 int zipped_len = nvram_compress(big_oops_buf, oops_data, text_len,
527 oops_data_sz);
528 if (zipped_len < 0) {
529 pr_err("nvram: compression failed; returned %d\n", zipped_len);
530 pr_err("nvram: logging uncompressed oops/panic report\n");
531 return -1;
532 }
533 oops_hdr->version = cpu_to_be16(OOPS_HDR_VERSION);
534 oops_hdr->report_length = cpu_to_be16(zipped_len);
535 oops_hdr->timestamp = cpu_to_be64(get_seconds());
536 return 0;
537}
538
539#ifdef CONFIG_PSTORE
540static int nvram_pstore_open(struct pstore_info *psi)
541{
542 /* Reset the iterator to start reading partitions again */
543 read_type = -1;
544 return 0;
545}
546
547/**
548 * nvram_pstore_write - pstore write callback for nvram
549 * @type: Type of message logged
550 * @reason: reason behind dump (oops/panic)
551 * @id: identifier to indicate the write performed
552 * @part: pstore writes data to registered buffer in parts,
553 * part number will indicate the same.
554 * @count: Indicates oops count
555 * @compressed: Flag to indicate the log is compressed
556 * @size: number of bytes written to the registered buffer
557 * @psi: registered pstore_info structure
558 *
559 * Called by pstore_dump() when an oops or panic report is logged in the
560 * printk buffer.
561 * Returns 0 on successful write.
562 */
563static int nvram_pstore_write(enum pstore_type_id type,
564 enum kmsg_dump_reason reason,
565 u64 *id, unsigned int part, int count,
566 bool compressed, size_t size,
567 struct pstore_info *psi)
568{
569 int rc;
570 unsigned int err_type = ERR_TYPE_KERNEL_PANIC;
571 struct oops_log_info *oops_hdr = (struct oops_log_info *) oops_buf;
572
573 /* part 1 has the recent messages from printk buffer */
574 if (part > 1 || type != PSTORE_TYPE_DMESG ||
575 clobbering_unread_rtas_event())
576 return -1;
577
578 oops_hdr->version = cpu_to_be16(OOPS_HDR_VERSION);
579 oops_hdr->report_length = cpu_to_be16(size);
580 oops_hdr->timestamp = cpu_to_be64(get_seconds());
581
582 if (compressed)
583 err_type = ERR_TYPE_KERNEL_PANIC_GZ;
584
585 rc = nvram_write_os_partition(&oops_log_partition, oops_buf,
586 (int) (sizeof(*oops_hdr) + size), err_type, count);
587
588 if (rc != 0)
589 return rc;
590
591 *id = part;
592 return 0;
593}
594
595/*
596 * Reads the oops/panic report, rtas, of-config and common partition.
597 * Returns the length of the data we read from each partition.
598 * Returns 0 if we've been called before.
599 */
600static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
601 int *count, struct timespec *time, char **buf,
602 bool *compressed, struct pstore_info *psi)
603{
604 struct oops_log_info *oops_hdr;
605 unsigned int err_type, id_no, size = 0;
606 struct nvram_os_partition *part = NULL;
607 char *buff = NULL;
608 int sig = 0;
609 loff_t p;
610
611 read_type++;
612
613 switch (nvram_type_ids[read_type]) {
614 case PSTORE_TYPE_DMESG:
615 part = &oops_log_partition;
616 *type = PSTORE_TYPE_DMESG;
617 break;
618 case PSTORE_TYPE_PPC_RTAS:
619 part = &rtas_log_partition;
620 *type = PSTORE_TYPE_PPC_RTAS;
621 time->tv_sec = last_rtas_event;
622 time->tv_nsec = 0;
623 break;
624 case PSTORE_TYPE_PPC_OF:
625 sig = NVRAM_SIG_OF;
626 part = &of_config_partition;
627 *type = PSTORE_TYPE_PPC_OF;
628 *id = PSTORE_TYPE_PPC_OF;
629 time->tv_sec = 0;
630 time->tv_nsec = 0;
631 break;
632 case PSTORE_TYPE_PPC_COMMON:
633 sig = NVRAM_SIG_SYS;
634 part = &common_partition;
635 *type = PSTORE_TYPE_PPC_COMMON;
636 *id = PSTORE_TYPE_PPC_COMMON;
637 time->tv_sec = 0;
638 time->tv_nsec = 0;
639 break;
640 default:
641 return 0;
642 }
643
644 if (!part->os_partition) {
645 p = nvram_find_partition(part->name, sig, &size);
646 if (p <= 0) {
647 pr_err("nvram: Failed to find partition %s, "
648 "err %d\n", part->name, (int)p);
649 return 0;
650 }
651 part->index = p;
652 part->size = size;
653 }
654
655 buff = kmalloc(part->size, GFP_KERNEL);
656
657 if (!buff)
658 return -ENOMEM;
659
660 if (nvram_read_partition(part, buff, part->size, &err_type, &id_no)) {
661 kfree(buff);
662 return 0;
663 }
664
665 *count = 0;
666
667 if (part->os_partition)
668 *id = id_no;
669
670 if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
671 size_t length, hdr_size;
672
673 oops_hdr = (struct oops_log_info *)buff;
674 if (be16_to_cpu(oops_hdr->version) < OOPS_HDR_VERSION) {
675 /* Old format oops header had 2-byte record size */
676 hdr_size = sizeof(u16);
677 length = be16_to_cpu(oops_hdr->version);
678 time->tv_sec = 0;
679 time->tv_nsec = 0;
680 } else {
681 hdr_size = sizeof(*oops_hdr);
682 length = be16_to_cpu(oops_hdr->report_length);
683 time->tv_sec = be64_to_cpu(oops_hdr->timestamp);
684 time->tv_nsec = 0;
685 }
686 *buf = kmalloc(length, GFP_KERNEL);
687 if (*buf == NULL)
688 return -ENOMEM;
689 memcpy(*buf, buff + hdr_size, length);
690 kfree(buff);
691
692 if (err_type == ERR_TYPE_KERNEL_PANIC_GZ)
693 *compressed = true;
694 else
695 *compressed = false;
696 return length;
697 }
698
699 *buf = buff;
700 return part->size;
701}
702
703static struct pstore_info nvram_pstore_info = {
704 .owner = THIS_MODULE,
705 .name = "nvram",
706 .open = nvram_pstore_open,
707 .read = nvram_pstore_read,
708 .write = nvram_pstore_write,
709};
710
711static int nvram_pstore_init(void)
712{
713 int rc = 0;
714
715 nvram_pstore_info.buf = oops_data;
716 nvram_pstore_info.bufsize = oops_data_sz;
717
718 spin_lock_init(&nvram_pstore_info.buf_lock);
719
720 rc = pstore_register(&nvram_pstore_info);
721 if (rc != 0)
722 pr_err("nvram: pstore_register() failed, defaults to "
723 "kmsg_dump; returned %d\n", rc);
724
725 return rc;
726}
727#else
728static int nvram_pstore_init(void)
729{
730 return -1;
731}
732#endif
733
734static void __init nvram_init_oops_partition(int rtas_partition_exists)
735{
736 int rc;
737
738 rc = pseries_nvram_init_os_partition(&oops_log_partition);
739 if (rc != 0) {
740 if (!rtas_partition_exists)
741 return;
742 pr_notice("nvram: Using %s partition to log both"
743 " RTAS errors and oops/panic reports\n",
744 rtas_log_partition.name);
745 memcpy(&oops_log_partition, &rtas_log_partition,
746 sizeof(rtas_log_partition));
747 }
748 oops_buf = kmalloc(oops_log_partition.size, GFP_KERNEL);
749 if (!oops_buf) {
750 pr_err("nvram: No memory for %s partition\n",
751 oops_log_partition.name);
752 return;
753 }
754 oops_data = oops_buf + sizeof(struct oops_log_info);
755 oops_data_sz = oops_log_partition.size - sizeof(struct oops_log_info);
756
757 rc = nvram_pstore_init();
758
759 if (!rc)
760 return;
761
762 /*
763 * Figure compression (preceded by elimination of each line's <n>
764 * severity prefix) will reduce the oops/panic report to at most
765 * 45% of its original size.
766 */
767 big_oops_buf_sz = (oops_data_sz * 100) / 45;
768 big_oops_buf = kmalloc(big_oops_buf_sz, GFP_KERNEL);
769 if (big_oops_buf) {
770 stream.workspace = kmalloc(zlib_deflate_workspacesize(
771 WINDOW_BITS, MEM_LEVEL), GFP_KERNEL);
772 if (!stream.workspace) {
773 pr_err("nvram: No memory for compression workspace; "
774 "skipping compression of %s partition data\n",
775 oops_log_partition.name);
776 kfree(big_oops_buf);
777 big_oops_buf = NULL;
778 }
779 } else {
780 pr_err("No memory for uncompressed %s data; "
781 "skipping compression\n", oops_log_partition.name);
782 stream.workspace = NULL;
783 }
784
785 rc = kmsg_dump_register(&nvram_kmsg_dumper);
786 if (rc != 0) {
787 pr_err("nvram: kmsg_dump_register() failed; returned %d\n", rc);
788 kfree(oops_buf);
789 kfree(big_oops_buf);
790 kfree(stream.workspace);
791 }
792}
793
794static int __init pseries_nvram_init_log_partitions(void) 207static int __init pseries_nvram_init_log_partitions(void)
795{ 208{
796 int rc; 209 int rc;
@@ -798,7 +211,7 @@ static int __init pseries_nvram_init_log_partitions(void)
798 /* Scan nvram for partitions */ 211 /* Scan nvram for partitions */
799 nvram_scan_partitions(); 212 nvram_scan_partitions();
800 213
801 rc = pseries_nvram_init_os_partition(&rtas_log_partition); 214 rc = nvram_init_os_partition(&rtas_log_partition);
802 nvram_init_oops_partition(rc == 0); 215 nvram_init_oops_partition(rc == 0);
803 return 0; 216 return 0;
804} 217}
@@ -834,72 +247,3 @@ int __init pSeries_nvram_init(void)
834 return 0; 247 return 0;
835} 248}
836 249
837
838/*
839 * This is our kmsg_dump callback, called after an oops or panic report
840 * has been written to the printk buffer. We want to capture as much
841 * of the printk buffer as possible. First, capture as much as we can
842 * that we think will compress sufficiently to fit in the lnx,oops-log
843 * partition. If that's too much, go back and capture uncompressed text.
844 */
845static void oops_to_nvram(struct kmsg_dumper *dumper,
846 enum kmsg_dump_reason reason)
847{
848 struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
849 static unsigned int oops_count = 0;
850 static bool panicking = false;
851 static DEFINE_SPINLOCK(lock);
852 unsigned long flags;
853 size_t text_len;
854 unsigned int err_type = ERR_TYPE_KERNEL_PANIC_GZ;
855 int rc = -1;
856
857 switch (reason) {
858 case KMSG_DUMP_RESTART:
859 case KMSG_DUMP_HALT:
860 case KMSG_DUMP_POWEROFF:
861 /* These are almost always orderly shutdowns. */
862 return;
863 case KMSG_DUMP_OOPS:
864 break;
865 case KMSG_DUMP_PANIC:
866 panicking = true;
867 break;
868 case KMSG_DUMP_EMERG:
869 if (panicking)
870 /* Panic report already captured. */
871 return;
872 break;
873 default:
874 pr_err("%s: ignoring unrecognized KMSG_DUMP_* reason %d\n",
875 __func__, (int) reason);
876 return;
877 }
878
879 if (clobbering_unread_rtas_event())
880 return;
881
882 if (!spin_trylock_irqsave(&lock, flags))
883 return;
884
885 if (big_oops_buf) {
886 kmsg_dump_get_buffer(dumper, false,
887 big_oops_buf, big_oops_buf_sz, &text_len);
888 rc = zip_oops(text_len);
889 }
890 if (rc != 0) {
891 kmsg_dump_rewind(dumper);
892 kmsg_dump_get_buffer(dumper, false,
893 oops_data, oops_data_sz, &text_len);
894 err_type = ERR_TYPE_KERNEL_PANIC;
895 oops_hdr->version = cpu_to_be16(OOPS_HDR_VERSION);
896 oops_hdr->report_length = cpu_to_be16(text_len);
897 oops_hdr->timestamp = cpu_to_be64(get_seconds());
898 }
899
900 (void) nvram_write_os_partition(&oops_log_partition, oops_buf,
901 (int) (sizeof(*oops_hdr) + text_len), err_type,
902 ++oops_count);
903
904 spin_unlock_irqrestore(&lock, flags);
905}
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index f735f4fee48c..5d4a3df59d0c 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -32,6 +32,8 @@
32#include <asm/firmware.h> 32#include <asm/firmware.h>
33#include <asm/eeh.h> 33#include <asm/eeh.h>
34 34
35#include "pseries.h"
36
35static struct pci_bus * 37static struct pci_bus *
36find_bus_among_children(struct pci_bus *bus, 38find_bus_among_children(struct pci_bus *bus,
37 struct device_node *dn) 39 struct device_node *dn)
@@ -75,6 +77,7 @@ struct pci_controller *init_phb_dynamic(struct device_node *dn)
75 return NULL; 77 return NULL;
76 rtas_setup_phb(phb); 78 rtas_setup_phb(phb);
77 pci_process_bridge_OF_ranges(phb, dn, 0); 79 pci_process_bridge_OF_ranges(phb, dn, 0);
80 phb->controller_ops = pseries_pci_controller_ops;
78 81
79 pci_devs_phb_init_dynamic(phb); 82 pci_devs_phb_init_dynamic(phb);
80 83
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 1796c5438cc6..8411c27293e4 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -11,6 +11,7 @@
11#define _PSERIES_PSERIES_H 11#define _PSERIES_PSERIES_H
12 12
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <asm/rtas.h>
14 15
15struct device_node; 16struct device_node;
16 17
@@ -60,11 +61,24 @@ extern struct device_node *dlpar_configure_connector(__be32,
60 struct device_node *); 61 struct device_node *);
61extern int dlpar_attach_node(struct device_node *); 62extern int dlpar_attach_node(struct device_node *);
62extern int dlpar_detach_node(struct device_node *); 63extern int dlpar_detach_node(struct device_node *);
64extern int dlpar_acquire_drc(u32 drc_index);
65extern int dlpar_release_drc(u32 drc_index);
66
67#ifdef CONFIG_MEMORY_HOTPLUG
68int dlpar_memory(struct pseries_hp_errorlog *hp_elog);
69#else
70static inline int dlpar_memory(struct pseries_hp_errorlog *hp_elog)
71{
72 return -EOPNOTSUPP;
73}
74#endif
63 75
64/* PCI root bridge prepare function override for pseries */ 76/* PCI root bridge prepare function override for pseries */
65struct pci_host_bridge; 77struct pci_host_bridge;
66int pseries_root_bridge_prepare(struct pci_host_bridge *bridge); 78int pseries_root_bridge_prepare(struct pci_host_bridge *bridge);
67 79
80extern struct pci_controller_ops pseries_pci_controller_ops;
81
68unsigned long pseries_memory_block_size(void); 82unsigned long pseries_memory_block_size(void);
69 83
70#endif /* _PSERIES_PSERIES_H */ 84#endif /* _PSERIES_PSERIES_H */
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 70304070a260..1044b8b4da71 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -461,6 +461,54 @@ static long pseries_little_endian_exceptions(void)
461} 461}
462#endif 462#endif
463 463
464static void __init find_and_init_phbs(void)
465{
466 struct device_node *node;
467 struct pci_controller *phb;
468 struct device_node *root = of_find_node_by_path("/");
469
470 for_each_child_of_node(root, node) {
471 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
472 strcmp(node->type, "pciex") != 0))
473 continue;
474
475 phb = pcibios_alloc_controller(node);
476 if (!phb)
477 continue;
478 rtas_setup_phb(phb);
479 pci_process_bridge_OF_ranges(phb, node, 0);
480 isa_bridge_find_early(phb);
481 phb->controller_ops = pseries_pci_controller_ops;
482 }
483
484 of_node_put(root);
485 pci_devs_phb_init();
486
487 /*
488 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
489 * in chosen.
490 */
491 if (of_chosen) {
492 const int *prop;
493
494 prop = of_get_property(of_chosen,
495 "linux,pci-probe-only", NULL);
496 if (prop) {
497 if (*prop)
498 pci_add_flags(PCI_PROBE_ONLY);
499 else
500 pci_clear_flags(PCI_PROBE_ONLY);
501 }
502
503#ifdef CONFIG_PPC32 /* Will be made generic soon */
504 prop = of_get_property(of_chosen,
505 "linux,pci-assign-all-buses", NULL);
506 if (prop && *prop)
507 pci_add_flags(PCI_REASSIGN_ALL_BUS);
508#endif /* CONFIG_PPC32 */
509 }
510}
511
464static void __init pSeries_setup_arch(void) 512static void __init pSeries_setup_arch(void)
465{ 513{
466 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 514 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
@@ -793,6 +841,10 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
793void pSeries_final_fixup(void) { } 841void pSeries_final_fixup(void) { }
794#endif 842#endif
795 843
844struct pci_controller_ops pseries_pci_controller_ops = {
845 .probe_mode = pSeries_pci_probe_mode,
846};
847
796define_machine(pseries) { 848define_machine(pseries) {
797 .name = "pSeries", 849 .name = "pSeries",
798 .probe = pSeries_probe, 850 .probe = pSeries_probe,
@@ -801,7 +853,6 @@ define_machine(pseries) {
801 .show_cpuinfo = pSeries_show_cpuinfo, 853 .show_cpuinfo = pSeries_show_cpuinfo,
802 .log_error = pSeries_log_error, 854 .log_error = pSeries_log_error,
803 .pcibios_fixup = pSeries_final_fixup, 855 .pcibios_fixup = pSeries_final_fixup,
804 .pci_probe_mode = pSeries_pci_probe_mode,
805 .restart = rtas_restart, 856 .restart = rtas_restart,
806 .halt = rtas_halt, 857 .halt = rtas_halt,
807 .panic = rtas_os_term, 858 .panic = rtas_os_term,
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index a3555b10c1a5..6932ea803e33 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -197,16 +197,14 @@ static void pSeries_cause_ipi_mux(int cpu, unsigned long data)
197 xics_cause_ipi(cpu, data); 197 xics_cause_ipi(cpu, data);
198} 198}
199 199
200static __init int pSeries_smp_probe(void) 200static __init void pSeries_smp_probe(void)
201{ 201{
202 int ret = xics_smp_probe(); 202 xics_smp_probe();
203 203
204 if (cpu_has_feature(CPU_FTR_DBELL)) { 204 if (cpu_has_feature(CPU_FTR_DBELL)) {
205 xics_cause_ipi = smp_ops->cause_ipi; 205 xics_cause_ipi = smp_ops->cause_ipi;
206 smp_ops->cause_ipi = pSeries_cause_ipi_mux; 206 smp_ops->cause_ipi = pSeries_cause_ipi_mux;
207 } 207 }
208
209 return ret;
210} 208}
211 209
212static struct smp_ops_t pSeries_mpic_smp_ops = { 210static struct smp_ops_t pSeries_mpic_smp_ops = {
diff --git a/arch/powerpc/relocs_check.pl b/arch/powerpc/relocs_check.pl
deleted file mode 100755
index 3f46e8b9c56d..000000000000
--- a/arch/powerpc/relocs_check.pl
+++ /dev/null
@@ -1,66 +0,0 @@
1#!/usr/bin/perl
2
3# Copyright © 2009 IBM Corporation
4
5# This program is free software; you can redistribute it and/or
6# modify it under the terms of the GNU General Public License
7# as published by the Free Software Foundation; either version
8# 2 of the License, or (at your option) any later version.
9
10# This script checks the relocations of a vmlinux for "suspicious"
11# relocations.
12
13use strict;
14use warnings;
15
16if ($#ARGV != 1) {
17 die "$0 [path to objdump] [path to vmlinux]\n";
18}
19
20# Have Kbuild supply the path to objdump so we handle cross compilation.
21my $objdump = shift;
22my $vmlinux = shift;
23my $bad_relocs_count = 0;
24my $bad_relocs = "";
25my $old_binutils = 0;
26
27open(FD, "$objdump -R $vmlinux|") or die;
28while (<FD>) {
29 study $_;
30
31 # Only look at relocation lines.
32 next if (!/\s+R_/);
33
34 # These relocations are okay
35 # On PPC64:
36 # R_PPC64_RELATIVE, R_PPC64_NONE, R_PPC64_ADDR64
37 # On PPC:
38 # R_PPC_RELATIVE, R_PPC_ADDR16_HI,
39 # R_PPC_ADDR16_HA,R_PPC_ADDR16_LO,
40 # R_PPC_NONE
41
42 next if (/\bR_PPC64_RELATIVE\b/ or /\bR_PPC64_NONE\b/ or
43 /\bR_PPC64_ADDR64\s+mach_/);
44 next if (/\bR_PPC_ADDR16_LO\b/ or /\bR_PPC_ADDR16_HI\b/ or
45 /\bR_PPC_ADDR16_HA\b/ or /\bR_PPC_RELATIVE\b/ or
46 /\bR_PPC_NONE\b/);
47
48 # If we see this type of relocation it's an idication that
49 # we /may/ be using an old version of binutils.
50 if (/R_PPC64_UADDR64/) {
51 $old_binutils++;
52 }
53
54 $bad_relocs_count++;
55 $bad_relocs .= $_;
56}
57
58if ($bad_relocs_count) {
59 print "WARNING: $bad_relocs_count bad relocations\n";
60 print $bad_relocs;
61}
62
63if ($old_binutils) {
64 print "WARNING: You need at least binutils >= 2.19 to build a ".
65 "CONFIG_RELOCATABLE kernel\n";
66}
diff --git a/arch/powerpc/relocs_check.sh b/arch/powerpc/relocs_check.sh
new file mode 100755
index 000000000000..2e4ebd0e25b3
--- /dev/null
+++ b/arch/powerpc/relocs_check.sh
@@ -0,0 +1,59 @@
1#!/bin/sh
2
3# Copyright © 2015 IBM Corporation
4
5# This program is free software; you can redistribute it and/or
6# modify it under the terms of the GNU General Public License
7# as published by the Free Software Foundation; either version
8# 2 of the License, or (at your option) any later version.
9
10# This script checks the relocations of a vmlinux for "suspicious"
11# relocations.
12
13# based on relocs_check.pl
14# Copyright © 2009 IBM Corporation
15
16if [ $# -lt 2 ]; then
17 echo "$0 [path to objdump] [path to vmlinux]" 1>&2
18 exit 1
19fi
20
21# Have Kbuild supply the path to objdump so we handle cross compilation.
22objdump="$1"
23vmlinux="$2"
24
25bad_relocs=$(
26"$objdump" -R "$vmlinux" |
27 # Only look at relocation lines.
28 grep -E '\<R_' |
29 # These relocations are okay
30 # On PPC64:
31 # R_PPC64_RELATIVE, R_PPC64_NONE
32 # R_PPC64_ADDR64 mach_<name>
33 # On PPC:
34 # R_PPC_RELATIVE, R_PPC_ADDR16_HI,
35 # R_PPC_ADDR16_HA,R_PPC_ADDR16_LO,
36 # R_PPC_NONE
37 grep -F -w -v 'R_PPC64_RELATIVE
38R_PPC64_NONE
39R_PPC_ADDR16_LO
40R_PPC_ADDR16_HI
41R_PPC_ADDR16_HA
42R_PPC_RELATIVE
43R_PPC_NONE' |
44 grep -E -v '\<R_PPC64_ADDR64[[:space:]]+mach_'
45)
46
47if [ -z "$bad_relocs" ]; then
48 exit 0
49fi
50
51num_bad=$(echo "$bad_relocs" | wc -l)
52echo "WARNING: $num_bad bad relocations"
53echo "$bad_relocs"
54
55# If we see this type of relocation it's an idication that
56# we /may/ be using an old version of binutils.
57if echo "$bad_relocs" | grep -q -F -w R_PPC64_UADDR64; then
58 echo "WARNING: You need at least binutils >= 2.19 to build a CONFIG_RELOCATABLE kernel"
59fi
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 9e5353ff6d1b..d00a5663e312 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -369,7 +369,7 @@ static int dart_dma_set_mask(struct device *dev, u64 dma_mask)
369 return 0; 369 return 0;
370} 370}
371 371
372void __init iommu_init_early_dart(void) 372void __init iommu_init_early_dart(struct pci_controller_ops *controller_ops)
373{ 373{
374 struct device_node *dn; 374 struct device_node *dn;
375 375
@@ -395,8 +395,8 @@ void __init iommu_init_early_dart(void)
395 if (dart_is_u4) 395 if (dart_is_u4)
396 ppc_md.dma_set_mask = dart_dma_set_mask; 396 ppc_md.dma_set_mask = dart_dma_set_mask;
397 397
398 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_dart; 398 controller_ops->dma_dev_setup = pci_dma_dev_setup_dart;
399 ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_dart; 399 controller_ops->dma_bus_setup = pci_dma_bus_setup_dart;
400 400
401 /* Setup pci_dma ops */ 401 /* Setup pci_dma ops */
402 set_pci_dma_ops(&dma_iommu_ops); 402 set_pci_dma_ops(&dma_iommu_ops);
@@ -404,8 +404,8 @@ void __init iommu_init_early_dart(void)
404 404
405 bail: 405 bail:
406 /* If init failed, use direct iommu and null setup functions */ 406 /* If init failed, use direct iommu and null setup functions */
407 ppc_md.pci_dma_dev_setup = NULL; 407 controller_ops->dma_dev_setup = NULL;
408 ppc_md.pci_dma_bus_setup = NULL; 408 controller_ops->dma_bus_setup = NULL;
409 409
410 /* Setup pci_dma ops */ 410 /* Setup pci_dma ops */
411 set_pci_dma_ops(&dma_direct_ops); 411 set_pci_dma_ops(&dma_direct_ops);
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index 2d8a101b6b9e..121e26fffd50 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -54,7 +54,7 @@ bool dcr_map_ok_generic(dcr_host_t host)
54 else if (host.type == DCR_HOST_MMIO) 54 else if (host.type == DCR_HOST_MMIO)
55 return dcr_map_ok_mmio(host.host.mmio); 55 return dcr_map_ok_mmio(host.host.mmio);
56 else 56 else
57 return 0; 57 return false;
58} 58}
59EXPORT_SYMBOL_GPL(dcr_map_ok_generic); 59EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
60 60
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 4bbb4b8dfd09..f086c6f22dc9 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -162,7 +162,17 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
162 msg->address_lo = lower_32_bits(address); 162 msg->address_lo = lower_32_bits(address);
163 msg->address_hi = upper_32_bits(address); 163 msg->address_hi = upper_32_bits(address);
164 164
165 msg->data = hwirq; 165 /*
166 * MPIC version 2.0 has erratum PIC1. It causes
167 * that neither MSI nor MSI-X can work fine.
168 * This is a workaround to allow MSI-X to function
169 * properly. It only works for MSI-X, we prevent
170 * MSI on buggy chips in fsl_setup_msi_irqs().
171 */
172 if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
173 msg->data = __swab32(hwirq);
174 else
175 msg->data = hwirq;
166 176
167 pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__, 177 pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__,
168 (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK, 178 (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK,
@@ -180,8 +190,16 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
180 struct msi_msg msg; 190 struct msi_msg msg;
181 struct fsl_msi *msi_data; 191 struct fsl_msi *msi_data;
182 192
183 if (type == PCI_CAP_ID_MSIX) 193 if (type == PCI_CAP_ID_MSI) {
184 pr_debug("fslmsi: MSI-X untested, trying anyway.\n"); 194 /*
195 * MPIC version 2.0 has erratum PIC1. For now MSI
196 * could not work. So check to prevent MSI from
197 * being used on the board with this erratum.
198 */
199 list_for_each_entry(msi_data, &msi_head, list)
200 if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
201 return -EINVAL;
202 }
185 203
186 /* 204 /*
187 * If the PCI node has an fsl,msi property, then we need to use it 205 * If the PCI node has an fsl,msi property, then we need to use it
@@ -446,6 +464,11 @@ static int fsl_of_msi_probe(struct platform_device *dev)
446 464
447 msi->feature = features->fsl_pic_ip; 465 msi->feature = features->fsl_pic_ip;
448 466
467 /* For erratum PIC1 on MPIC version 2.0*/
468 if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) == FSL_PIC_IP_MPIC
469 && (fsl_mpic_primary_get_version() == 0x0200))
470 msi->feature |= MSI_HW_ERRATA_ENDIAN;
471
449 /* 472 /*
450 * Remember the phandle, so that we can match with any PCI nodes 473 * Remember the phandle, so that we can match with any PCI nodes
451 * that have an "fsl,msi" property. 474 * that have an "fsl,msi" property.
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index 420cfcbdac01..a67359d993e5 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -27,6 +27,8 @@
27#define FSL_PIC_IP_IPIC 0x00000002 27#define FSL_PIC_IP_IPIC 0x00000002
28#define FSL_PIC_IP_VMPIC 0x00000003 28#define FSL_PIC_IP_VMPIC 0x00000003
29 29
30#define MSI_HW_ERRATA_ENDIAN 0x00000010
31
30struct fsl_msi_cascade_data; 32struct fsl_msi_cascade_data;
31 33
32struct fsl_msi { 34struct fsl_msi {
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4b74c276e427..9a8fcf0d79d7 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -111,6 +111,18 @@ static struct pci_ops fsl_indirect_pcie_ops =
111#define MAX_PHYS_ADDR_BITS 40 111#define MAX_PHYS_ADDR_BITS 40
112static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS; 112static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS;
113 113
114#ifdef CONFIG_SWIOTLB
115static void setup_swiotlb_ops(struct pci_controller *hose)
116{
117 if (ppc_swiotlb_enable) {
118 hose->controller_ops.dma_dev_setup = pci_dma_dev_setup_swiotlb;
119 set_pci_dma_ops(&swiotlb_dma_ops);
120 }
121}
122#else
123static inline void setup_swiotlb_ops(struct pci_controller *hose) {}
124#endif
125
114static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask) 126static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
115{ 127{
116 if (!dev->dma_mask || !dma_supported(dev, dma_mask)) 128 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
@@ -548,6 +560,9 @@ int fsl_add_bridge(struct platform_device *pdev, int is_primary)
548 /* Setup PEX window registers */ 560 /* Setup PEX window registers */
549 setup_pci_atmu(hose); 561 setup_pci_atmu(hose);
550 562
563 /* Set up controller operations */
564 setup_swiotlb_ops(hose);
565
551 return 0; 566 return 0;
552 567
553no_bridge: 568no_bridge:
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index bbfbbf2025fd..b2b8447a227a 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -655,7 +655,6 @@ static inline struct mpic * mpic_from_irq_data(struct irq_data *d)
655static inline void mpic_eoi(struct mpic *mpic) 655static inline void mpic_eoi(struct mpic *mpic)
656{ 656{
657 mpic_cpu_write(MPIC_INFO(CPU_EOI), 0); 657 mpic_cpu_write(MPIC_INFO(CPU_EOI), 0);
658 (void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI));
659} 658}
660 659
661/* 660/*
@@ -1676,31 +1675,6 @@ void __init mpic_init(struct mpic *mpic)
1676 mpic_err_int_init(mpic, MPIC_FSL_ERR_INT); 1675 mpic_err_int_init(mpic, MPIC_FSL_ERR_INT);
1677} 1676}
1678 1677
1679void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
1680{
1681 u32 v;
1682
1683 v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
1684 v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK;
1685 v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio);
1686 mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
1687}
1688
1689void __init mpic_set_serial_int(struct mpic *mpic, int enable)
1690{
1691 unsigned long flags;
1692 u32 v;
1693
1694 raw_spin_lock_irqsave(&mpic_lock, flags);
1695 v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
1696 if (enable)
1697 v |= MPIC_GREG_GLOBAL_CONF_1_SIE;
1698 else
1699 v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE;
1700 mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
1701 raw_spin_unlock_irqrestore(&mpic_lock, flags);
1702}
1703
1704void mpic_irq_set_priority(unsigned int irq, unsigned int pri) 1678void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
1705{ 1679{
1706 struct mpic *mpic = mpic_find(irq); 1680 struct mpic *mpic = mpic_find(irq);
@@ -1923,7 +1897,7 @@ void smp_mpic_message_pass(int cpu, int msg)
1923 msg * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE), physmask); 1897 msg * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE), physmask);
1924} 1898}
1925 1899
1926int __init smp_mpic_probe(void) 1900void __init smp_mpic_probe(void)
1927{ 1901{
1928 int nr_cpus; 1902 int nr_cpus;
1929 1903
@@ -1935,8 +1909,6 @@ int __init smp_mpic_probe(void)
1935 1909
1936 if (nr_cpus > 1) 1910 if (nr_cpus > 1)
1937 mpic_request_ipis(); 1911 mpic_request_ipis();
1938
1939 return nr_cpus;
1940} 1912}
1941 1913
1942void smp_mpic_setup_cpu(int cpu) 1914void smp_mpic_setup_cpu(int cpu)
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c
index d09994164daf..7ea0174f6d3d 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
@@ -190,28 +190,3 @@ int par_io_of_config(struct device_node *np)
190 return 0; 190 return 0;
191} 191}
192EXPORT_SYMBOL(par_io_of_config); 192EXPORT_SYMBOL(par_io_of_config);
193
194#ifdef DEBUG
195static void dump_par_io(void)
196{
197 unsigned int i;
198
199 printk(KERN_INFO "%s: par_io=%p\n", __func__, par_io);
200 for (i = 0; i < num_par_io_ports; i++) {
201 printk(KERN_INFO " cpodr[%u]=%08x\n", i,
202 in_be32(&par_io[i].cpodr));
203 printk(KERN_INFO " cpdata[%u]=%08x\n", i,
204 in_be32(&par_io[i].cpdata));
205 printk(KERN_INFO " cpdir1[%u]=%08x\n", i,
206 in_be32(&par_io[i].cpdir1));
207 printk(KERN_INFO " cpdir2[%u]=%08x\n", i,
208 in_be32(&par_io[i].cpdir2));
209 printk(KERN_INFO " cppar1[%u]=%08x\n", i,
210 in_be32(&par_io[i].cppar1));
211 printk(KERN_INFO " cppar2[%u]=%08x\n", i,
212 in_be32(&par_io[i].cppar2));
213 }
214
215}
216EXPORT_SYMBOL(dump_par_io);
217#endif /* DEBUG */
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
index befaf1123f7f..5f91628209eb 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
@@ -43,11 +43,6 @@ u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
43} 43}
44EXPORT_SYMBOL(ucc_slow_get_qe_cr_subblock); 44EXPORT_SYMBOL(ucc_slow_get_qe_cr_subblock);
45 45
46void ucc_slow_poll_transmitter_now(struct ucc_slow_private * uccs)
47{
48 out_be16(&uccs->us_regs->utodr, UCC_SLOW_TOD);
49}
50
51void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs) 46void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs)
52{ 47{
53 struct ucc_slow_info *us_info = uccs->us_info; 48 struct ucc_slow_info *us_info = uccs->us_info;
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index 125743b58c70..878a54036a25 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -140,15 +140,13 @@ static void xics_request_ipi(void)
140 IRQF_PERCPU | IRQF_NO_THREAD, "IPI", NULL)); 140 IRQF_PERCPU | IRQF_NO_THREAD, "IPI", NULL));
141} 141}
142 142
143int __init xics_smp_probe(void) 143void __init xics_smp_probe(void)
144{ 144{
145 /* Setup cause_ipi callback based on which ICP is used */ 145 /* Setup cause_ipi callback based on which ICP is used */
146 smp_ops->cause_ipi = icp_ops->cause_ipi; 146 smp_ops->cause_ipi = icp_ops->cause_ipi;
147 147
148 /* Register all the IPIs */ 148 /* Register all the IPIs */
149 xics_request_ipi(); 149 xics_request_ipi();
150
151 return num_possible_cpus();
152} 150}
153 151
154#endif /* CONFIG_SMP */ 152#endif /* CONFIG_SMP */
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index d84559e31f32..f407bbf5ee94 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -515,15 +515,15 @@ struct s390_io_adapter {
515#define S390_ARCH_FAC_MASK_SIZE_U64 \ 515#define S390_ARCH_FAC_MASK_SIZE_U64 \
516 (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64)) 516 (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64))
517 517
518struct s390_model_fac { 518struct kvm_s390_fac {
519 /* facilities used in SIE context */ 519 /* facility list requested by guest */
520 __u64 sie[S390_ARCH_FAC_LIST_SIZE_U64]; 520 __u64 list[S390_ARCH_FAC_LIST_SIZE_U64];
521 /* subset enabled by kvm */ 521 /* facility mask supported by kvm & hosting machine */
522 __u64 kvm[S390_ARCH_FAC_LIST_SIZE_U64]; 522 __u64 mask[S390_ARCH_FAC_LIST_SIZE_U64];
523}; 523};
524 524
525struct kvm_s390_cpu_model { 525struct kvm_s390_cpu_model {
526 struct s390_model_fac *fac; 526 struct kvm_s390_fac *fac;
527 struct cpuid cpu_id; 527 struct cpuid cpu_id;
528 unsigned short ibc; 528 unsigned short ibc;
529}; 529};
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index f49b71954654..8fb3802f8fad 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -62,6 +62,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
62{ 62{
63 int cpu = smp_processor_id(); 63 int cpu = smp_processor_id();
64 64
65 S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
65 if (prev == next) 66 if (prev == next)
66 return; 67 return;
67 if (MACHINE_HAS_TLB_LC) 68 if (MACHINE_HAS_TLB_LC)
@@ -73,7 +74,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
73 atomic_dec(&prev->context.attach_count); 74 atomic_dec(&prev->context.attach_count);
74 if (MACHINE_HAS_TLB_LC) 75 if (MACHINE_HAS_TLB_LC)
75 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); 76 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
76 S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
77} 77}
78 78
79#define finish_arch_post_lock_switch finish_arch_post_lock_switch 79#define finish_arch_post_lock_switch finish_arch_post_lock_switch
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 7b2ac6e44166..53eacbd4f09b 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -37,16 +37,7 @@ static inline void storage_key_init_range(unsigned long start, unsigned long end
37#endif 37#endif
38} 38}
39 39
40static inline void clear_page(void *page) 40#define clear_page(page) memset((page), 0, PAGE_SIZE)
41{
42 register unsigned long reg1 asm ("1") = 0;
43 register void *reg2 asm ("2") = page;
44 register unsigned long reg3 asm ("3") = 4096;
45 asm volatile(
46 " mvcl 2,0"
47 : "+d" (reg2), "+d" (reg3) : "d" (reg1)
48 : "memory", "cc");
49}
50 41
51/* 42/*
52 * copy_page uses the mvcl instruction with 0xb0 padding byte in order to 43 * copy_page uses the mvcl instruction with 0xb0 padding byte in order to
diff --git a/arch/s390/kernel/jump_label.c b/arch/s390/kernel/jump_label.c
index cb2d51e779df..830066f936c8 100644
--- a/arch/s390/kernel/jump_label.c
+++ b/arch/s390/kernel/jump_label.c
@@ -36,16 +36,20 @@ static void jump_label_make_branch(struct jump_entry *entry, struct insn *insn)
36 insn->offset = (entry->target - entry->code) >> 1; 36 insn->offset = (entry->target - entry->code) >> 1;
37} 37}
38 38
39static void jump_label_bug(struct jump_entry *entry, struct insn *insn) 39static void jump_label_bug(struct jump_entry *entry, struct insn *expected,
40 struct insn *new)
40{ 41{
41 unsigned char *ipc = (unsigned char *)entry->code; 42 unsigned char *ipc = (unsigned char *)entry->code;
42 unsigned char *ipe = (unsigned char *)insn; 43 unsigned char *ipe = (unsigned char *)expected;
44 unsigned char *ipn = (unsigned char *)new;
43 45
44 pr_emerg("Jump label code mismatch at %pS [%p]\n", ipc, ipc); 46 pr_emerg("Jump label code mismatch at %pS [%p]\n", ipc, ipc);
45 pr_emerg("Found: %02x %02x %02x %02x %02x %02x\n", 47 pr_emerg("Found: %02x %02x %02x %02x %02x %02x\n",
46 ipc[0], ipc[1], ipc[2], ipc[3], ipc[4], ipc[5]); 48 ipc[0], ipc[1], ipc[2], ipc[3], ipc[4], ipc[5]);
47 pr_emerg("Expected: %02x %02x %02x %02x %02x %02x\n", 49 pr_emerg("Expected: %02x %02x %02x %02x %02x %02x\n",
48 ipe[0], ipe[1], ipe[2], ipe[3], ipe[4], ipe[5]); 50 ipe[0], ipe[1], ipe[2], ipe[3], ipe[4], ipe[5]);
51 pr_emerg("New: %02x %02x %02x %02x %02x %02x\n",
52 ipn[0], ipn[1], ipn[2], ipn[3], ipn[4], ipn[5]);
49 panic("Corrupted kernel text"); 53 panic("Corrupted kernel text");
50} 54}
51 55
@@ -69,10 +73,10 @@ static void __jump_label_transform(struct jump_entry *entry,
69 } 73 }
70 if (init) { 74 if (init) {
71 if (memcmp((void *)entry->code, &orignop, sizeof(orignop))) 75 if (memcmp((void *)entry->code, &orignop, sizeof(orignop)))
72 jump_label_bug(entry, &old); 76 jump_label_bug(entry, &orignop, &new);
73 } else { 77 } else {
74 if (memcmp((void *)entry->code, &old, sizeof(old))) 78 if (memcmp((void *)entry->code, &old, sizeof(old)))
75 jump_label_bug(entry, &old); 79 jump_label_bug(entry, &old, &new);
76 } 80 }
77 probe_kernel_write((void *)entry->code, &new, sizeof(new)); 81 probe_kernel_write((void *)entry->code, &new, sizeof(new));
78} 82}
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index 36154a2f1814..2ca95862e336 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -436,6 +436,7 @@ int module_finalize(const Elf_Ehdr *hdr,
436 const Elf_Shdr *sechdrs, 436 const Elf_Shdr *sechdrs,
437 struct module *me) 437 struct module *me)
438{ 438{
439 jump_label_apply_nops(me);
439 vfree(me->arch.syminfo); 440 vfree(me->arch.syminfo);
440 me->arch.syminfo = NULL; 441 me->arch.syminfo = NULL;
441 return 0; 442 return 0;
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 26108232fcaa..dc488e13b7e3 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -18,7 +18,7 @@
18 18
19static DEFINE_PER_CPU(struct cpuid, cpu_id); 19static DEFINE_PER_CPU(struct cpuid, cpu_id);
20 20
21void cpu_relax(void) 21void notrace cpu_relax(void)
22{ 22{
23 if (!smp_cpu_mtid && MACHINE_HAS_DIAG44) 23 if (!smp_cpu_mtid && MACHINE_HAS_DIAG44)
24 asm volatile("diag 0,0,0x44"); 24 asm volatile("diag 0,0,0x44");
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 0c3623927563..f6579cfde2df 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -522,7 +522,7 @@ static int kvm_s390_set_processor(struct kvm *kvm, struct kvm_device_attr *attr)
522 memcpy(&kvm->arch.model.cpu_id, &proc->cpuid, 522 memcpy(&kvm->arch.model.cpu_id, &proc->cpuid,
523 sizeof(struct cpuid)); 523 sizeof(struct cpuid));
524 kvm->arch.model.ibc = proc->ibc; 524 kvm->arch.model.ibc = proc->ibc;
525 memcpy(kvm->arch.model.fac->kvm, proc->fac_list, 525 memcpy(kvm->arch.model.fac->list, proc->fac_list,
526 S390_ARCH_FAC_LIST_SIZE_BYTE); 526 S390_ARCH_FAC_LIST_SIZE_BYTE);
527 } else 527 } else
528 ret = -EFAULT; 528 ret = -EFAULT;
@@ -556,7 +556,7 @@ static int kvm_s390_get_processor(struct kvm *kvm, struct kvm_device_attr *attr)
556 } 556 }
557 memcpy(&proc->cpuid, &kvm->arch.model.cpu_id, sizeof(struct cpuid)); 557 memcpy(&proc->cpuid, &kvm->arch.model.cpu_id, sizeof(struct cpuid));
558 proc->ibc = kvm->arch.model.ibc; 558 proc->ibc = kvm->arch.model.ibc;
559 memcpy(&proc->fac_list, kvm->arch.model.fac->kvm, S390_ARCH_FAC_LIST_SIZE_BYTE); 559 memcpy(&proc->fac_list, kvm->arch.model.fac->list, S390_ARCH_FAC_LIST_SIZE_BYTE);
560 if (copy_to_user((void __user *)attr->addr, proc, sizeof(*proc))) 560 if (copy_to_user((void __user *)attr->addr, proc, sizeof(*proc)))
561 ret = -EFAULT; 561 ret = -EFAULT;
562 kfree(proc); 562 kfree(proc);
@@ -576,10 +576,10 @@ static int kvm_s390_get_machine(struct kvm *kvm, struct kvm_device_attr *attr)
576 } 576 }
577 get_cpu_id((struct cpuid *) &mach->cpuid); 577 get_cpu_id((struct cpuid *) &mach->cpuid);
578 mach->ibc = sclp_get_ibc(); 578 mach->ibc = sclp_get_ibc();
579 memcpy(&mach->fac_mask, kvm_s390_fac_list_mask, 579 memcpy(&mach->fac_mask, kvm->arch.model.fac->mask,
580 kvm_s390_fac_list_mask_size() * sizeof(u64)); 580 S390_ARCH_FAC_LIST_SIZE_BYTE);
581 memcpy((unsigned long *)&mach->fac_list, S390_lowcore.stfle_fac_list, 581 memcpy((unsigned long *)&mach->fac_list, S390_lowcore.stfle_fac_list,
582 S390_ARCH_FAC_LIST_SIZE_U64); 582 S390_ARCH_FAC_LIST_SIZE_BYTE);
583 if (copy_to_user((void __user *)attr->addr, mach, sizeof(*mach))) 583 if (copy_to_user((void __user *)attr->addr, mach, sizeof(*mach)))
584 ret = -EFAULT; 584 ret = -EFAULT;
585 kfree(mach); 585 kfree(mach);
@@ -778,15 +778,18 @@ long kvm_arch_vm_ioctl(struct file *filp,
778static int kvm_s390_query_ap_config(u8 *config) 778static int kvm_s390_query_ap_config(u8 *config)
779{ 779{
780 u32 fcn_code = 0x04000000UL; 780 u32 fcn_code = 0x04000000UL;
781 u32 cc; 781 u32 cc = 0;
782 782
783 memset(config, 0, 128);
783 asm volatile( 784 asm volatile(
784 "lgr 0,%1\n" 785 "lgr 0,%1\n"
785 "lgr 2,%2\n" 786 "lgr 2,%2\n"
786 ".long 0xb2af0000\n" /* PQAP(QCI) */ 787 ".long 0xb2af0000\n" /* PQAP(QCI) */
787 "ipm %0\n" 788 "0: ipm %0\n"
788 "srl %0,28\n" 789 "srl %0,28\n"
789 : "=r" (cc) 790 "1:\n"
791 EX_TABLE(0b, 1b)
792 : "+r" (cc)
790 : "r" (fcn_code), "r" (config) 793 : "r" (fcn_code), "r" (config)
791 : "cc", "0", "2", "memory" 794 : "cc", "0", "2", "memory"
792 ); 795 );
@@ -839,9 +842,13 @@ static int kvm_s390_crypto_init(struct kvm *kvm)
839 842
840 kvm_s390_set_crycb_format(kvm); 843 kvm_s390_set_crycb_format(kvm);
841 844
842 /* Disable AES/DEA protected key functions by default */ 845 /* Enable AES/DEA protected key functions by default */
843 kvm->arch.crypto.aes_kw = 0; 846 kvm->arch.crypto.aes_kw = 1;
844 kvm->arch.crypto.dea_kw = 0; 847 kvm->arch.crypto.dea_kw = 1;
848 get_random_bytes(kvm->arch.crypto.crycb->aes_wrapping_key_mask,
849 sizeof(kvm->arch.crypto.crycb->aes_wrapping_key_mask));
850 get_random_bytes(kvm->arch.crypto.crycb->dea_wrapping_key_mask,
851 sizeof(kvm->arch.crypto.crycb->dea_wrapping_key_mask));
845 852
846 return 0; 853 return 0;
847} 854}
@@ -886,40 +893,29 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
886 /* 893 /*
887 * The architectural maximum amount of facilities is 16 kbit. To store 894 * The architectural maximum amount of facilities is 16 kbit. To store
888 * this amount, 2 kbyte of memory is required. Thus we need a full 895 * this amount, 2 kbyte of memory is required. Thus we need a full
889 * page to hold the active copy (arch.model.fac->sie) and the current 896 * page to hold the guest facility list (arch.model.fac->list) and the
890 * facilities set (arch.model.fac->kvm). Its address size has to be 897 * facility mask (arch.model.fac->mask). Its address size has to be
891 * 31 bits and word aligned. 898 * 31 bits and word aligned.
892 */ 899 */
893 kvm->arch.model.fac = 900 kvm->arch.model.fac =
894 (struct s390_model_fac *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 901 (struct kvm_s390_fac *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
895 if (!kvm->arch.model.fac) 902 if (!kvm->arch.model.fac)
896 goto out_nofac; 903 goto out_nofac;
897 904
898 memcpy(kvm->arch.model.fac->kvm, S390_lowcore.stfle_fac_list, 905 /* Populate the facility mask initially. */
899 S390_ARCH_FAC_LIST_SIZE_U64); 906 memcpy(kvm->arch.model.fac->mask, S390_lowcore.stfle_fac_list,
900 907 S390_ARCH_FAC_LIST_SIZE_BYTE);
901 /*
902 * If this KVM host runs *not* in a LPAR, relax the facility bits
903 * of the kvm facility mask by all missing facilities. This will allow
904 * to determine the right CPU model by means of the remaining facilities.
905 * Live guest migration must prohibit the migration of KVMs running in
906 * a LPAR to non LPAR hosts.
907 */
908 if (!MACHINE_IS_LPAR)
909 for (i = 0; i < kvm_s390_fac_list_mask_size(); i++)
910 kvm_s390_fac_list_mask[i] &= kvm->arch.model.fac->kvm[i];
911
912 /*
913 * Apply the kvm facility mask to limit the kvm supported/tolerated
914 * facility list.
915 */
916 for (i = 0; i < S390_ARCH_FAC_LIST_SIZE_U64; i++) { 908 for (i = 0; i < S390_ARCH_FAC_LIST_SIZE_U64; i++) {
917 if (i < kvm_s390_fac_list_mask_size()) 909 if (i < kvm_s390_fac_list_mask_size())
918 kvm->arch.model.fac->kvm[i] &= kvm_s390_fac_list_mask[i]; 910 kvm->arch.model.fac->mask[i] &= kvm_s390_fac_list_mask[i];
919 else 911 else
920 kvm->arch.model.fac->kvm[i] = 0UL; 912 kvm->arch.model.fac->mask[i] = 0UL;
921 } 913 }
922 914
915 /* Populate the facility list initially. */
916 memcpy(kvm->arch.model.fac->list, kvm->arch.model.fac->mask,
917 S390_ARCH_FAC_LIST_SIZE_BYTE);
918
923 kvm_s390_get_cpu_id(&kvm->arch.model.cpu_id); 919 kvm_s390_get_cpu_id(&kvm->arch.model.cpu_id);
924 kvm->arch.model.ibc = sclp_get_ibc() & 0x0fff; 920 kvm->arch.model.ibc = sclp_get_ibc() & 0x0fff;
925 921
@@ -1165,8 +1161,6 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1165 1161
1166 mutex_lock(&vcpu->kvm->lock); 1162 mutex_lock(&vcpu->kvm->lock);
1167 vcpu->arch.cpu_id = vcpu->kvm->arch.model.cpu_id; 1163 vcpu->arch.cpu_id = vcpu->kvm->arch.model.cpu_id;
1168 memcpy(vcpu->kvm->arch.model.fac->sie, vcpu->kvm->arch.model.fac->kvm,
1169 S390_ARCH_FAC_LIST_SIZE_BYTE);
1170 vcpu->arch.sie_block->ibc = vcpu->kvm->arch.model.ibc; 1164 vcpu->arch.sie_block->ibc = vcpu->kvm->arch.model.ibc;
1171 mutex_unlock(&vcpu->kvm->lock); 1165 mutex_unlock(&vcpu->kvm->lock);
1172 1166
@@ -1212,7 +1206,7 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
1212 vcpu->arch.sie_block->scaol = (__u32)(__u64)kvm->arch.sca; 1206 vcpu->arch.sie_block->scaol = (__u32)(__u64)kvm->arch.sca;
1213 set_bit(63 - id, (unsigned long *) &kvm->arch.sca->mcn); 1207 set_bit(63 - id, (unsigned long *) &kvm->arch.sca->mcn);
1214 } 1208 }
1215 vcpu->arch.sie_block->fac = (int) (long) kvm->arch.model.fac->sie; 1209 vcpu->arch.sie_block->fac = (int) (long) kvm->arch.model.fac->list;
1216 1210
1217 spin_lock_init(&vcpu->arch.local_int.lock); 1211 spin_lock_init(&vcpu->arch.local_int.lock);
1218 vcpu->arch.local_int.float_int = &kvm->arch.float_int; 1212 vcpu->arch.local_int.float_int = &kvm->arch.float_int;
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
index 985c2114d7ef..c34109aa552d 100644
--- a/arch/s390/kvm/kvm-s390.h
+++ b/arch/s390/kvm/kvm-s390.h
@@ -128,7 +128,8 @@ static inline void kvm_s390_set_psw_cc(struct kvm_vcpu *vcpu, unsigned long cc)
128/* test availability of facility in a kvm intance */ 128/* test availability of facility in a kvm intance */
129static inline int test_kvm_facility(struct kvm *kvm, unsigned long nr) 129static inline int test_kvm_facility(struct kvm *kvm, unsigned long nr)
130{ 130{
131 return __test_facility(nr, kvm->arch.model.fac->kvm); 131 return __test_facility(nr, kvm->arch.model.fac->mask) &&
132 __test_facility(nr, kvm->arch.model.fac->list);
132} 133}
133 134
134/* are cpu states controlled by user space */ 135/* are cpu states controlled by user space */
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index bdd9b5b17e03..351116939ea2 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -348,7 +348,7 @@ static int handle_stfl(struct kvm_vcpu *vcpu)
348 * We need to shift the lower 32 facility bits (bit 0-31) from a u64 348 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
349 * into a u32 memory representation. They will remain bits 0-31. 349 * into a u32 memory representation. They will remain bits 0-31.
350 */ 350 */
351 fac = *vcpu->kvm->arch.model.fac->sie >> 32; 351 fac = *vcpu->kvm->arch.model.fac->list >> 32;
352 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list), 352 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
353 &fac, sizeof(fac)); 353 &fac, sizeof(fac));
354 if (rc) 354 if (rc)
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index 753a56731951..f0b85443e060 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -287,7 +287,7 @@ void __iomem *pci_iomap_range(struct pci_dev *pdev,
287 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); 287 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
288 return (void __iomem *) addr + offset; 288 return (void __iomem *) addr + offset;
289} 289}
290EXPORT_SYMBOL_GPL(pci_iomap_range); 290EXPORT_SYMBOL(pci_iomap_range);
291 291
292void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 292void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
293{ 293{
@@ -309,7 +309,7 @@ void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
309 } 309 }
310 spin_unlock(&zpci_iomap_lock); 310 spin_unlock(&zpci_iomap_lock);
311} 311}
312EXPORT_SYMBOL_GPL(pci_iounmap); 312EXPORT_SYMBOL(pci_iounmap);
313 313
314static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, 314static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
315 int size, u32 *val) 315 int size, u32 *val)
@@ -483,9 +483,8 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev)
483 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); 483 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
484} 484}
485 485
486static void zpci_map_resources(struct zpci_dev *zdev) 486static void zpci_map_resources(struct pci_dev *pdev)
487{ 487{
488 struct pci_dev *pdev = zdev->pdev;
489 resource_size_t len; 488 resource_size_t len;
490 int i; 489 int i;
491 490
@@ -499,9 +498,8 @@ static void zpci_map_resources(struct zpci_dev *zdev)
499 } 498 }
500} 499}
501 500
502static void zpci_unmap_resources(struct zpci_dev *zdev) 501static void zpci_unmap_resources(struct pci_dev *pdev)
503{ 502{
504 struct pci_dev *pdev = zdev->pdev;
505 resource_size_t len; 503 resource_size_t len;
506 int i; 504 int i;
507 505
@@ -651,7 +649,7 @@ int pcibios_add_device(struct pci_dev *pdev)
651 649
652 zdev->pdev = pdev; 650 zdev->pdev = pdev;
653 pdev->dev.groups = zpci_attr_groups; 651 pdev->dev.groups = zpci_attr_groups;
654 zpci_map_resources(zdev); 652 zpci_map_resources(pdev);
655 653
656 for (i = 0; i < PCI_BAR_COUNT; i++) { 654 for (i = 0; i < PCI_BAR_COUNT; i++) {
657 res = &pdev->resource[i]; 655 res = &pdev->resource[i];
@@ -663,6 +661,11 @@ int pcibios_add_device(struct pci_dev *pdev)
663 return 0; 661 return 0;
664} 662}
665 663
664void pcibios_release_device(struct pci_dev *pdev)
665{
666 zpci_unmap_resources(pdev);
667}
668
666int pcibios_enable_device(struct pci_dev *pdev, int mask) 669int pcibios_enable_device(struct pci_dev *pdev, int mask)
667{ 670{
668 struct zpci_dev *zdev = get_zdev(pdev); 671 struct zpci_dev *zdev = get_zdev(pdev);
@@ -670,7 +673,6 @@ int pcibios_enable_device(struct pci_dev *pdev, int mask)
670 zdev->pdev = pdev; 673 zdev->pdev = pdev;
671 zpci_debug_init_device(zdev); 674 zpci_debug_init_device(zdev);
672 zpci_fmb_enable_device(zdev); 675 zpci_fmb_enable_device(zdev);
673 zpci_map_resources(zdev);
674 676
675 return pci_enable_resources(pdev, mask); 677 return pci_enable_resources(pdev, mask);
676} 678}
@@ -679,7 +681,6 @@ void pcibios_disable_device(struct pci_dev *pdev)
679{ 681{
680 struct zpci_dev *zdev = get_zdev(pdev); 682 struct zpci_dev *zdev = get_zdev(pdev);
681 683
682 zpci_unmap_resources(zdev);
683 zpci_fmb_disable_device(zdev); 684 zpci_fmb_disable_device(zdev);
684 zpci_debug_exit_device(zdev); 685 zpci_debug_exit_device(zdev);
685 zdev->pdev = NULL; 686 zdev->pdev = NULL;
@@ -688,7 +689,8 @@ void pcibios_disable_device(struct pci_dev *pdev)
688#ifdef CONFIG_HIBERNATE_CALLBACKS 689#ifdef CONFIG_HIBERNATE_CALLBACKS
689static int zpci_restore(struct device *dev) 690static int zpci_restore(struct device *dev)
690{ 691{
691 struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); 692 struct pci_dev *pdev = to_pci_dev(dev);
693 struct zpci_dev *zdev = get_zdev(pdev);
692 int ret = 0; 694 int ret = 0;
693 695
694 if (zdev->state != ZPCI_FN_STATE_ONLINE) 696 if (zdev->state != ZPCI_FN_STATE_ONLINE)
@@ -698,7 +700,7 @@ static int zpci_restore(struct device *dev)
698 if (ret) 700 if (ret)
699 goto out; 701 goto out;
700 702
701 zpci_map_resources(zdev); 703 zpci_map_resources(pdev);
702 zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET, 704 zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET,
703 zdev->start_dma + zdev->iommu_size - 1, 705 zdev->start_dma + zdev->iommu_size - 1,
704 (u64) zdev->dma_table); 706 (u64) zdev->dma_table);
@@ -709,12 +711,14 @@ out:
709 711
710static int zpci_freeze(struct device *dev) 712static int zpci_freeze(struct device *dev)
711{ 713{
712 struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); 714 struct pci_dev *pdev = to_pci_dev(dev);
715 struct zpci_dev *zdev = get_zdev(pdev);
713 716
714 if (zdev->state != ZPCI_FN_STATE_ONLINE) 717 if (zdev->state != ZPCI_FN_STATE_ONLINE)
715 return 0; 718 return 0;
716 719
717 zpci_unregister_ioat(zdev, 0); 720 zpci_unregister_ioat(zdev, 0);
721 zpci_unmap_resources(pdev);
718 return clp_disable_fh(zdev); 722 return clp_disable_fh(zdev);
719} 723}
720 724
diff --git a/arch/s390/pci/pci_mmio.c b/arch/s390/pci/pci_mmio.c
index 8aa271b3d1ad..b1bb2b72302c 100644
--- a/arch/s390/pci/pci_mmio.c
+++ b/arch/s390/pci/pci_mmio.c
@@ -64,8 +64,7 @@ SYSCALL_DEFINE3(s390_pci_mmio_write, unsigned long, mmio_addr,
64 if (copy_from_user(buf, user_buffer, length)) 64 if (copy_from_user(buf, user_buffer, length))
65 goto out; 65 goto out;
66 66
67 memcpy_toio(io_addr, buf, length); 67 ret = zpci_memcpy_toio(io_addr, buf, length);
68 ret = 0;
69out: 68out:
70 if (buf != local_buf) 69 if (buf != local_buf)
71 kfree(buf); 70 kfree(buf);
@@ -98,16 +97,16 @@ SYSCALL_DEFINE3(s390_pci_mmio_read, unsigned long, mmio_addr,
98 goto out; 97 goto out;
99 io_addr = (void __iomem *)((pfn << PAGE_SHIFT) | (mmio_addr & ~PAGE_MASK)); 98 io_addr = (void __iomem *)((pfn << PAGE_SHIFT) | (mmio_addr & ~PAGE_MASK));
100 99
101 ret = -EFAULT; 100 if ((unsigned long) io_addr < ZPCI_IOMAP_ADDR_BASE) {
102 if ((unsigned long) io_addr < ZPCI_IOMAP_ADDR_BASE) 101 ret = -EFAULT;
103 goto out; 102 goto out;
104 103 }
105 memcpy_fromio(buf, io_addr, length); 104 ret = zpci_memcpy_fromio(buf, io_addr, length);
106 105 if (ret)
107 if (copy_to_user(user_buffer, buf, length))
108 goto out; 106 goto out;
107 if (copy_to_user(user_buffer, buf, length))
108 ret = -EFAULT;
109 109
110 ret = 0;
111out: 110out:
112 if (buf != local_buf) 111 if (buf != local_buf)
113 kfree(buf); 112 kfree(buf);
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 740ae3026a14..9f93af56a5fc 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -563,7 +563,7 @@ static bool alloc_p2m(unsigned long pfn)
563 if (p2m_pfn == PFN_DOWN(__pa(p2m_missing))) 563 if (p2m_pfn == PFN_DOWN(__pa(p2m_missing)))
564 p2m_init(p2m); 564 p2m_init(p2m);
565 else 565 else
566 p2m_init_identity(p2m, pfn); 566 p2m_init_identity(p2m, pfn & ~(P2M_PER_PAGE - 1));
567 567
568 spin_lock_irqsave(&p2m_update_lock, flags); 568 spin_lock_irqsave(&p2m_update_lock, flags);
569 569
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 657964e8ab7e..37fb19047603 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -65,6 +65,7 @@ struct lpss_private_data;
65 65
66struct lpss_device_desc { 66struct lpss_device_desc {
67 unsigned int flags; 67 unsigned int flags;
68 const char *clk_con_id;
68 unsigned int prv_offset; 69 unsigned int prv_offset;
69 size_t prv_size_override; 70 size_t prv_size_override;
70 void (*setup)(struct lpss_private_data *pdata); 71 void (*setup)(struct lpss_private_data *pdata);
@@ -140,6 +141,7 @@ static struct lpss_device_desc lpt_i2c_dev_desc = {
140 141
141static struct lpss_device_desc lpt_uart_dev_desc = { 142static struct lpss_device_desc lpt_uart_dev_desc = {
142 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, 143 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
144 .clk_con_id = "baudclk",
143 .prv_offset = 0x800, 145 .prv_offset = 0x800,
144 .setup = lpss_uart_setup, 146 .setup = lpss_uart_setup,
145}; 147};
@@ -156,6 +158,7 @@ static struct lpss_device_desc byt_pwm_dev_desc = {
156 158
157static struct lpss_device_desc byt_uart_dev_desc = { 159static struct lpss_device_desc byt_uart_dev_desc = {
158 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 160 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
161 .clk_con_id = "baudclk",
159 .prv_offset = 0x800, 162 .prv_offset = 0x800,
160 .setup = lpss_uart_setup, 163 .setup = lpss_uart_setup,
161}; 164};
@@ -313,7 +316,7 @@ out:
313 return PTR_ERR(clk); 316 return PTR_ERR(clk);
314 317
315 pdata->clk = clk; 318 pdata->clk = clk;
316 clk_register_clkdev(clk, NULL, devname); 319 clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
317 return 0; 320 return 0;
318} 321}
319 322
diff --git a/drivers/ata/pata_macio.c b/drivers/ata/pata_macio.c
index a02f76fdcfcd..b0028588ff1c 100644
--- a/drivers/ata/pata_macio.c
+++ b/drivers/ata/pata_macio.c
@@ -540,9 +540,9 @@ static void pata_macio_qc_prep(struct ata_queued_cmd *qc)
540 BUG_ON (pi++ >= MAX_DCMDS); 540 BUG_ON (pi++ >= MAX_DCMDS);
541 541
542 len = (sg_len < MAX_DBDMA_SEG) ? sg_len : MAX_DBDMA_SEG; 542 len = (sg_len < MAX_DBDMA_SEG) ? sg_len : MAX_DBDMA_SEG;
543 st_le16(&table->command, write ? OUTPUT_MORE: INPUT_MORE); 543 table->command = cpu_to_le16(write ? OUTPUT_MORE: INPUT_MORE);
544 st_le16(&table->req_count, len); 544 table->req_count = cpu_to_le16(len);
545 st_le32(&table->phy_addr, addr); 545 table->phy_addr = cpu_to_le32(addr);
546 table->cmd_dep = 0; 546 table->cmd_dep = 0;
547 table->xfer_status = 0; 547 table->xfer_status = 0;
548 table->res_count = 0; 548 table->res_count = 0;
@@ -557,12 +557,12 @@ static void pata_macio_qc_prep(struct ata_queued_cmd *qc)
557 557
558 /* Convert the last command to an input/output */ 558 /* Convert the last command to an input/output */
559 table--; 559 table--;
560 st_le16(&table->command, write ? OUTPUT_LAST: INPUT_LAST); 560 table->command = cpu_to_le16(write ? OUTPUT_LAST: INPUT_LAST);
561 table++; 561 table++;
562 562
563 /* Add the stop command to the end of the list */ 563 /* Add the stop command to the end of the list */
564 memset(table, 0, sizeof(struct dbdma_cmd)); 564 memset(table, 0, sizeof(struct dbdma_cmd));
565 st_le16(&table->command, DBDMA_STOP); 565 table->command = cpu_to_le16(DBDMA_STOP);
566 566
567 dev_dbgdma(priv->dev, "%s: %d DMA list entries\n", __func__, pi); 567 dev_dbgdma(priv->dev, "%s: %d DMA list entries\n", __func__, pi);
568} 568}
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index f9054cd36a72..5389579c5120 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -869,6 +869,8 @@ try_offline_again:
869 */ 869 */
870 ata_msleep(ap, 1); 870 ata_msleep(ap, 1);
871 871
872 sata_set_spd(link);
873
872 /* 874 /*
873 * Now, bring the host controller online again, this can take time 875 * Now, bring the host controller online again, this can take time
874 * as PHY reset and communication establishment, 1st D2H FIS and 876 * as PHY reset and communication establishment, 1st D2H FIS and
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c
index c630fa812624..4c06f6281d74 100644
--- a/drivers/ata/sata_svw.c
+++ b/drivers/ata/sata_svw.c
@@ -47,11 +47,7 @@
47#include <scsi/scsi_cmnd.h> 47#include <scsi/scsi_cmnd.h>
48#include <scsi/scsi.h> 48#include <scsi/scsi.h>
49#include <linux/libata.h> 49#include <linux/libata.h>
50 50#include <linux/of.h>
51#ifdef CONFIG_PPC_OF
52#include <asm/prom.h>
53#include <asm/pci-bridge.h>
54#endif /* CONFIG_PPC_OF */
55 51
56#define DRV_NAME "sata_svw" 52#define DRV_NAME "sata_svw"
57#define DRV_VERSION "2.3" 53#define DRV_VERSION "2.3"
@@ -320,7 +316,6 @@ static u8 k2_stat_check_status(struct ata_port *ap)
320 return readl(ap->ioaddr.status_addr); 316 return readl(ap->ioaddr.status_addr);
321} 317}
322 318
323#ifdef CONFIG_PPC_OF
324static int k2_sata_show_info(struct seq_file *m, struct Scsi_Host *shost) 319static int k2_sata_show_info(struct seq_file *m, struct Scsi_Host *shost)
325{ 320{
326 struct ata_port *ap; 321 struct ata_port *ap;
@@ -350,14 +345,10 @@ static int k2_sata_show_info(struct seq_file *m, struct Scsi_Host *shost)
350 } 345 }
351 return 0; 346 return 0;
352} 347}
353#endif /* CONFIG_PPC_OF */
354
355 348
356static struct scsi_host_template k2_sata_sht = { 349static struct scsi_host_template k2_sata_sht = {
357 ATA_BMDMA_SHT(DRV_NAME), 350 ATA_BMDMA_SHT(DRV_NAME),
358#ifdef CONFIG_PPC_OF
359 .show_info = k2_sata_show_info, 351 .show_info = k2_sata_show_info,
360#endif
361}; 352};
362 353
363 354
diff --git a/drivers/block/swim3.c b/drivers/block/swim3.c
index 523ee8fd4c15..c264f2d284a7 100644
--- a/drivers/block/swim3.c
+++ b/drivers/block/swim3.c
@@ -440,9 +440,9 @@ static inline void seek_track(struct floppy_state *fs, int n)
440static inline void init_dma(struct dbdma_cmd *cp, int cmd, 440static inline void init_dma(struct dbdma_cmd *cp, int cmd,
441 void *buf, int count) 441 void *buf, int count)
442{ 442{
443 st_le16(&cp->req_count, count); 443 cp->req_count = cpu_to_le16(count);
444 st_le16(&cp->command, cmd); 444 cp->command = cpu_to_le16(cmd);
445 st_le32(&cp->phy_addr, virt_to_bus(buf)); 445 cp->phy_addr = cpu_to_le32(virt_to_bus(buf));
446 cp->xfer_status = 0; 446 cp->xfer_status = 0;
447} 447}
448 448
@@ -771,8 +771,8 @@ static irqreturn_t swim3_interrupt(int irq, void *dev_id)
771 } 771 }
772 /* turn off DMA */ 772 /* turn off DMA */
773 out_le32(&dr->control, (RUN | PAUSE) << 16); 773 out_le32(&dr->control, (RUN | PAUSE) << 16);
774 stat = ld_le16(&cp->xfer_status); 774 stat = le16_to_cpu(cp->xfer_status);
775 resid = ld_le16(&cp->res_count); 775 resid = le16_to_cpu(cp->res_count);
776 if (intr & ERROR_INTR) { 776 if (intr & ERROR_INTR) {
777 n = fs->scount - 1 - resid / 512; 777 n = fs->scount - 1 - resid / 512;
778 if (n > 0) { 778 if (n > 0) {
@@ -1170,7 +1170,7 @@ static int swim3_add_device(struct macio_dev *mdev, int index)
1170 1170
1171 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space); 1171 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1172 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd)); 1172 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1173 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP); 1173 fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
1174 1174
1175 if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD) 1175 if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
1176 swim3_mb_event(mdev, MB_FD); 1176 swim3_mb_event(mdev, MB_FD);
diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c
index 1d278ccd751f..e096e9cddb40 100644
--- a/drivers/char/tpm/tpm-chip.c
+++ b/drivers/char/tpm/tpm-chip.c
@@ -140,24 +140,24 @@ static int tpm_dev_add_device(struct tpm_chip *chip)
140{ 140{
141 int rc; 141 int rc;
142 142
143 rc = device_add(&chip->dev); 143 rc = cdev_add(&chip->cdev, chip->dev.devt, 1);
144 if (rc) { 144 if (rc) {
145 dev_err(&chip->dev, 145 dev_err(&chip->dev,
146 "unable to device_register() %s, major %d, minor %d, err=%d\n", 146 "unable to cdev_add() %s, major %d, minor %d, err=%d\n",
147 chip->devname, MAJOR(chip->dev.devt), 147 chip->devname, MAJOR(chip->dev.devt),
148 MINOR(chip->dev.devt), rc); 148 MINOR(chip->dev.devt), rc);
149 149
150 device_unregister(&chip->dev);
150 return rc; 151 return rc;
151 } 152 }
152 153
153 rc = cdev_add(&chip->cdev, chip->dev.devt, 1); 154 rc = device_add(&chip->dev);
154 if (rc) { 155 if (rc) {
155 dev_err(&chip->dev, 156 dev_err(&chip->dev,
156 "unable to cdev_add() %s, major %d, minor %d, err=%d\n", 157 "unable to device_register() %s, major %d, minor %d, err=%d\n",
157 chip->devname, MAJOR(chip->dev.devt), 158 chip->devname, MAJOR(chip->dev.devt),
158 MINOR(chip->dev.devt), rc); 159 MINOR(chip->dev.devt), rc);
159 160
160 device_unregister(&chip->dev);
161 return rc; 161 return rc;
162 } 162 }
163 163
@@ -174,27 +174,17 @@ static void tpm_dev_del_device(struct tpm_chip *chip)
174 * tpm_chip_register() - create a character device for the TPM chip 174 * tpm_chip_register() - create a character device for the TPM chip
175 * @chip: TPM chip to use. 175 * @chip: TPM chip to use.
176 * 176 *
177 * Creates a character device for the TPM chip and adds sysfs interfaces for 177 * Creates a character device for the TPM chip and adds sysfs attributes for
178 * the device, PPI and TCPA. As the last step this function adds the 178 * the device. As the last step this function adds the chip to the list of TPM
179 * chip to the list of TPM chips available for use. 179 * chips available for in-kernel use.
180 * 180 *
181 * NOTE: This function should be only called after the chip initialization 181 * This function should be only called after the chip initialization is
182 * is complete. 182 * complete.
183 *
184 * Called from tpm_<specific>.c probe function only for devices
185 * the driver has determined it should claim. Prior to calling
186 * this function the specific probe function has called pci_enable_device
187 * upon errant exit from this function specific probe function should call
188 * pci_disable_device
189 */ 183 */
190int tpm_chip_register(struct tpm_chip *chip) 184int tpm_chip_register(struct tpm_chip *chip)
191{ 185{
192 int rc; 186 int rc;
193 187
194 rc = tpm_dev_add_device(chip);
195 if (rc)
196 return rc;
197
198 /* Populate sysfs for TPM1 devices. */ 188 /* Populate sysfs for TPM1 devices. */
199 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) { 189 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) {
200 rc = tpm_sysfs_add_device(chip); 190 rc = tpm_sysfs_add_device(chip);
@@ -208,6 +198,10 @@ int tpm_chip_register(struct tpm_chip *chip)
208 chip->bios_dir = tpm_bios_log_setup(chip->devname); 198 chip->bios_dir = tpm_bios_log_setup(chip->devname);
209 } 199 }
210 200
201 rc = tpm_dev_add_device(chip);
202 if (rc)
203 return rc;
204
211 /* Make the chip available. */ 205 /* Make the chip available. */
212 spin_lock(&driver_lock); 206 spin_lock(&driver_lock);
213 list_add_rcu(&chip->list, &tpm_chip_list); 207 list_add_rcu(&chip->list, &tpm_chip_list);
diff --git a/drivers/char/tpm/tpm_ibmvtpm.c b/drivers/char/tpm/tpm_ibmvtpm.c
index b1e53e3aece5..42ffa5e7a1e0 100644
--- a/drivers/char/tpm/tpm_ibmvtpm.c
+++ b/drivers/char/tpm/tpm_ibmvtpm.c
@@ -124,7 +124,7 @@ static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
124{ 124{
125 struct ibmvtpm_dev *ibmvtpm; 125 struct ibmvtpm_dev *ibmvtpm;
126 struct ibmvtpm_crq crq; 126 struct ibmvtpm_crq crq;
127 u64 *word = (u64 *) &crq; 127 __be64 *word = (__be64 *)&crq;
128 int rc; 128 int rc;
129 129
130 ibmvtpm = (struct ibmvtpm_dev *)TPM_VPRIV(chip); 130 ibmvtpm = (struct ibmvtpm_dev *)TPM_VPRIV(chip);
@@ -145,11 +145,11 @@ static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
145 memcpy((void *)ibmvtpm->rtce_buf, (void *)buf, count); 145 memcpy((void *)ibmvtpm->rtce_buf, (void *)buf, count);
146 crq.valid = (u8)IBMVTPM_VALID_CMD; 146 crq.valid = (u8)IBMVTPM_VALID_CMD;
147 crq.msg = (u8)VTPM_TPM_COMMAND; 147 crq.msg = (u8)VTPM_TPM_COMMAND;
148 crq.len = (u16)count; 148 crq.len = cpu_to_be16(count);
149 crq.data = ibmvtpm->rtce_dma_handle; 149 crq.data = cpu_to_be32(ibmvtpm->rtce_dma_handle);
150 150
151 rc = ibmvtpm_send_crq(ibmvtpm->vdev, cpu_to_be64(word[0]), 151 rc = ibmvtpm_send_crq(ibmvtpm->vdev, be64_to_cpu(word[0]),
152 cpu_to_be64(word[1])); 152 be64_to_cpu(word[1]));
153 if (rc != H_SUCCESS) { 153 if (rc != H_SUCCESS) {
154 dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc); 154 dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc);
155 rc = 0; 155 rc = 0;
diff --git a/drivers/char/tpm/tpm_ibmvtpm.h b/drivers/char/tpm/tpm_ibmvtpm.h
index f595f14426bf..6af92890518f 100644
--- a/drivers/char/tpm/tpm_ibmvtpm.h
+++ b/drivers/char/tpm/tpm_ibmvtpm.h
@@ -22,9 +22,9 @@
22struct ibmvtpm_crq { 22struct ibmvtpm_crq {
23 u8 valid; 23 u8 valid;
24 u8 msg; 24 u8 msg;
25 u16 len; 25 __be16 len;
26 u32 data; 26 __be32 data;
27 u64 reserved; 27 __be64 reserved;
28} __attribute__((packed, aligned(8))); 28} __attribute__((packed, aligned(8)));
29 29
30struct ibmvtpm_crq_queue { 30struct ibmvtpm_crq_queue {
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index db7f8bce7467..25006a8bb8e6 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -144,12 +144,6 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
144 divider->flags); 144 divider->flags);
145} 145}
146 146
147/*
148 * The reverse of DIV_ROUND_UP: The maximum number which
149 * divided by m is r
150 */
151#define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)
152
153static bool _is_valid_table_div(const struct clk_div_table *table, 147static bool _is_valid_table_div(const struct clk_div_table *table,
154 unsigned int div) 148 unsigned int div)
155{ 149{
@@ -225,19 +219,24 @@ static int _div_round_closest(const struct clk_div_table *table,
225 unsigned long parent_rate, unsigned long rate, 219 unsigned long parent_rate, unsigned long rate,
226 unsigned long flags) 220 unsigned long flags)
227{ 221{
228 int up, down, div; 222 int up, down;
223 unsigned long up_rate, down_rate;
229 224
230 up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate); 225 up = DIV_ROUND_UP(parent_rate, rate);
226 down = parent_rate / rate;
231 227
232 if (flags & CLK_DIVIDER_POWER_OF_TWO) { 228 if (flags & CLK_DIVIDER_POWER_OF_TWO) {
233 up = __roundup_pow_of_two(div); 229 up = __roundup_pow_of_two(up);
234 down = __rounddown_pow_of_two(div); 230 down = __rounddown_pow_of_two(down);
235 } else if (table) { 231 } else if (table) {
236 up = _round_up_table(table, div); 232 up = _round_up_table(table, up);
237 down = _round_down_table(table, div); 233 down = _round_down_table(table, down);
238 } 234 }
239 235
240 return (up - div) <= (div - down) ? up : down; 236 up_rate = DIV_ROUND_UP(parent_rate, up);
237 down_rate = DIV_ROUND_UP(parent_rate, down);
238
239 return (rate - up_rate) <= (down_rate - rate) ? up : down;
241} 240}
242 241
243static int _div_round(const struct clk_div_table *table, 242static int _div_round(const struct clk_div_table *table,
@@ -313,7 +312,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
313 return i; 312 return i;
314 } 313 }
315 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 314 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
316 MULT_ROUND_UP(rate, i)); 315 rate * i);
317 now = DIV_ROUND_UP(parent_rate, i); 316 now = DIV_ROUND_UP(parent_rate, i);
318 if (_is_best_div(rate, now, best, flags)) { 317 if (_is_best_div(rate, now, best, flags)) {
319 bestdiv = i; 318 bestdiv = i;
@@ -353,7 +352,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
353 bestdiv = readl(divider->reg) >> divider->shift; 352 bestdiv = readl(divider->reg) >> divider->shift;
354 bestdiv &= div_mask(divider->width); 353 bestdiv &= div_mask(divider->width);
355 bestdiv = _get_div(divider->table, bestdiv, divider->flags); 354 bestdiv = _get_div(divider->table, bestdiv, divider->flags);
356 return bestdiv; 355 return DIV_ROUND_UP(*prate, bestdiv);
357 } 356 }
358 357
359 return divider_round_rate(hw, rate, prate, divider->table, 358 return divider_round_rate(hw, rate, prate, divider->table,
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index eb0152961d3c..237f23f68bfc 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1350,7 +1350,6 @@ static unsigned long clk_core_get_rate(struct clk_core *clk)
1350 1350
1351 return rate; 1351 return rate;
1352} 1352}
1353EXPORT_SYMBOL_GPL(clk_core_get_rate);
1354 1353
1355/** 1354/**
1356 * clk_get_rate - return the rate of clk 1355 * clk_get_rate - return the rate of clk
@@ -2171,6 +2170,32 @@ int clk_get_phase(struct clk *clk)
2171} 2170}
2172 2171
2173/** 2172/**
2173 * clk_is_match - check if two clk's point to the same hardware clock
2174 * @p: clk compared against q
2175 * @q: clk compared against p
2176 *
2177 * Returns true if the two struct clk pointers both point to the same hardware
2178 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2179 * share the same struct clk_core object.
2180 *
2181 * Returns false otherwise. Note that two NULL clks are treated as matching.
2182 */
2183bool clk_is_match(const struct clk *p, const struct clk *q)
2184{
2185 /* trivial case: identical struct clk's or both NULL */
2186 if (p == q)
2187 return true;
2188
2189 /* true if clk->core pointers match. Avoid derefing garbage */
2190 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2191 if (p->core == q->core)
2192 return true;
2193
2194 return false;
2195}
2196EXPORT_SYMBOL_GPL(clk_is_match);
2197
2198/**
2174 * __clk_init - initialize the data structures in a struct clk 2199 * __clk_init - initialize the data structures in a struct clk
2175 * @dev: device initializing this clk, placeholder for now 2200 * @dev: device initializing this clk, placeholder for now
2176 * @clk: clk being initialized 2201 * @clk: clk being initialized
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index b0b562b9ce0e..e60feffc10a1 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -48,6 +48,17 @@ static struct clk_pll pll3 = {
48 }, 48 },
49}; 49};
50 50
51static struct clk_regmap pll4_vote = {
52 .enable_reg = 0x34c0,
53 .enable_mask = BIT(4),
54 .hw.init = &(struct clk_init_data){
55 .name = "pll4_vote",
56 .parent_names = (const char *[]){ "pll4" },
57 .num_parents = 1,
58 .ops = &clk_pll_vote_ops,
59 },
60};
61
51static struct clk_pll pll8 = { 62static struct clk_pll pll8 = {
52 .l_reg = 0x3144, 63 .l_reg = 0x3144,
53 .m_reg = 0x3148, 64 .m_reg = 0x3148,
@@ -3023,6 +3034,7 @@ static struct clk_branch rpm_msg_ram_h_clk = {
3023 3034
3024static struct clk_regmap *gcc_msm8960_clks[] = { 3035static struct clk_regmap *gcc_msm8960_clks[] = {
3025 [PLL3] = &pll3.clkr, 3036 [PLL3] = &pll3.clkr,
3037 [PLL4_VOTE] = &pll4_vote,
3026 [PLL8] = &pll8.clkr, 3038 [PLL8] = &pll8.clkr,
3027 [PLL8_VOTE] = &pll8_vote, 3039 [PLL8_VOTE] = &pll8_vote,
3028 [PLL14] = &pll14.clkr, 3040 [PLL14] = &pll14.clkr,
@@ -3247,6 +3259,7 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
3247 3259
3248static struct clk_regmap *gcc_apq8064_clks[] = { 3260static struct clk_regmap *gcc_apq8064_clks[] = {
3249 [PLL3] = &pll3.clkr, 3261 [PLL3] = &pll3.clkr,
3262 [PLL4_VOTE] = &pll4_vote,
3250 [PLL8] = &pll8.clkr, 3263 [PLL8] = &pll8.clkr,
3251 [PLL8_VOTE] = &pll8_vote, 3264 [PLL8_VOTE] = &pll8_vote,
3252 [PLL14] = &pll14.clkr, 3265 [PLL14] = &pll14.clkr,
diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
index 121ffde25dc3..c9ff27b4648b 100644
--- a/drivers/clk/qcom/lcc-ipq806x.c
+++ b/drivers/clk/qcom/lcc-ipq806x.c
@@ -462,7 +462,6 @@ static struct platform_driver lcc_ipq806x_driver = {
462 .remove = lcc_ipq806x_remove, 462 .remove = lcc_ipq806x_remove,
463 .driver = { 463 .driver = {
464 .name = "lcc-ipq806x", 464 .name = "lcc-ipq806x",
465 .owner = THIS_MODULE,
466 .of_match_table = lcc_ipq806x_match_table, 465 .of_match_table = lcc_ipq806x_match_table,
467 }, 466 },
468}; 467};
diff --git a/drivers/clk/qcom/lcc-msm8960.c b/drivers/clk/qcom/lcc-msm8960.c
index a75a408cfccd..e2c863295f00 100644
--- a/drivers/clk/qcom/lcc-msm8960.c
+++ b/drivers/clk/qcom/lcc-msm8960.c
@@ -417,8 +417,8 @@ static struct clk_rcg slimbus_src = {
417 .mnctr_en_bit = 8, 417 .mnctr_en_bit = 8,
418 .mnctr_reset_bit = 7, 418 .mnctr_reset_bit = 7,
419 .mnctr_mode_shift = 5, 419 .mnctr_mode_shift = 5,
420 .n_val_shift = 16, 420 .n_val_shift = 24,
421 .m_val_shift = 16, 421 .m_val_shift = 8,
422 .width = 8, 422 .width = 8,
423 }, 423 },
424 .p = { 424 .p = {
@@ -547,7 +547,7 @@ static int lcc_msm8960_probe(struct platform_device *pdev)
547 return PTR_ERR(regmap); 547 return PTR_ERR(regmap);
548 548
549 /* Use the correct frequency plan depending on speed of PLL4 */ 549 /* Use the correct frequency plan depending on speed of PLL4 */
550 val = regmap_read(regmap, 0x4, &val); 550 regmap_read(regmap, 0x4, &val);
551 if (val == 0x12) { 551 if (val == 0x12) {
552 slimbus_src.freq_tbl = clk_tbl_aif_osr_492; 552 slimbus_src.freq_tbl = clk_tbl_aif_osr_492;
553 mi2s_osr_src.freq_tbl = clk_tbl_aif_osr_492; 553 mi2s_osr_src.freq_tbl = clk_tbl_aif_osr_492;
@@ -574,7 +574,6 @@ static struct platform_driver lcc_msm8960_driver = {
574 .remove = lcc_msm8960_remove, 574 .remove = lcc_msm8960_remove,
575 .driver = { 575 .driver = {
576 .name = "lcc-msm8960", 576 .name = "lcc-msm8960",
577 .owner = THIS_MODULE,
578 .of_match_table = lcc_msm8960_match_table, 577 .of_match_table = lcc_msm8960_match_table,
579 }, 578 },
580}; 579};
diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c
index 6ef89639a9f6..d21640634adf 100644
--- a/drivers/clk/ti/fapll.c
+++ b/drivers/clk/ti/fapll.c
@@ -84,7 +84,7 @@ static int ti_fapll_enable(struct clk_hw *hw)
84 struct fapll_data *fd = to_fapll(hw); 84 struct fapll_data *fd = to_fapll(hw);
85 u32 v = readl_relaxed(fd->base); 85 u32 v = readl_relaxed(fd->base);
86 86
87 v |= (1 << FAPLL_MAIN_PLLEN); 87 v |= FAPLL_MAIN_PLLEN;
88 writel_relaxed(v, fd->base); 88 writel_relaxed(v, fd->base);
89 89
90 return 0; 90 return 0;
@@ -95,7 +95,7 @@ static void ti_fapll_disable(struct clk_hw *hw)
95 struct fapll_data *fd = to_fapll(hw); 95 struct fapll_data *fd = to_fapll(hw);
96 u32 v = readl_relaxed(fd->base); 96 u32 v = readl_relaxed(fd->base);
97 97
98 v &= ~(1 << FAPLL_MAIN_PLLEN); 98 v &= ~FAPLL_MAIN_PLLEN;
99 writel_relaxed(v, fd->base); 99 writel_relaxed(v, fd->base);
100} 100}
101 101
@@ -104,7 +104,7 @@ static int ti_fapll_is_enabled(struct clk_hw *hw)
104 struct fapll_data *fd = to_fapll(hw); 104 struct fapll_data *fd = to_fapll(hw);
105 u32 v = readl_relaxed(fd->base); 105 u32 v = readl_relaxed(fd->base);
106 106
107 return v & (1 << FAPLL_MAIN_PLLEN); 107 return v & FAPLL_MAIN_PLLEN;
108} 108}
109 109
110static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw, 110static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw,
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 6b6b07ff720b..f6d04c7b5115 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -43,9 +43,10 @@
43#include "drm_crtc_internal.h" 43#include "drm_crtc_internal.h"
44#include "drm_internal.h" 44#include "drm_internal.h"
45 45
46static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev, 46static struct drm_framebuffer *
47 struct drm_mode_fb_cmd2 *r, 47internal_framebuffer_create(struct drm_device *dev,
48 struct drm_file *file_priv); 48 struct drm_mode_fb_cmd2 *r,
49 struct drm_file *file_priv);
49 50
50/* Avoid boilerplate. I'm tired of typing. */ 51/* Avoid boilerplate. I'm tired of typing. */
51#define DRM_ENUM_NAME_FN(fnname, list) \ 52#define DRM_ENUM_NAME_FN(fnname, list) \
@@ -2908,13 +2909,11 @@ static int drm_mode_cursor_universal(struct drm_crtc *crtc,
2908 */ 2909 */
2909 if (req->flags & DRM_MODE_CURSOR_BO) { 2910 if (req->flags & DRM_MODE_CURSOR_BO) {
2910 if (req->handle) { 2911 if (req->handle) {
2911 fb = add_framebuffer_internal(dev, &fbreq, file_priv); 2912 fb = internal_framebuffer_create(dev, &fbreq, file_priv);
2912 if (IS_ERR(fb)) { 2913 if (IS_ERR(fb)) {
2913 DRM_DEBUG_KMS("failed to wrap cursor buffer in drm framebuffer\n"); 2914 DRM_DEBUG_KMS("failed to wrap cursor buffer in drm framebuffer\n");
2914 return PTR_ERR(fb); 2915 return PTR_ERR(fb);
2915 } 2916 }
2916
2917 drm_framebuffer_reference(fb);
2918 } else { 2917 } else {
2919 fb = NULL; 2918 fb = NULL;
2920 } 2919 }
@@ -3267,9 +3266,10 @@ static int framebuffer_check(const struct drm_mode_fb_cmd2 *r)
3267 return 0; 3266 return 0;
3268} 3267}
3269 3268
3270static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev, 3269static struct drm_framebuffer *
3271 struct drm_mode_fb_cmd2 *r, 3270internal_framebuffer_create(struct drm_device *dev,
3272 struct drm_file *file_priv) 3271 struct drm_mode_fb_cmd2 *r,
3272 struct drm_file *file_priv)
3273{ 3273{
3274 struct drm_mode_config *config = &dev->mode_config; 3274 struct drm_mode_config *config = &dev->mode_config;
3275 struct drm_framebuffer *fb; 3275 struct drm_framebuffer *fb;
@@ -3301,12 +3301,6 @@ static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
3301 return fb; 3301 return fb;
3302 } 3302 }
3303 3303
3304 mutex_lock(&file_priv->fbs_lock);
3305 r->fb_id = fb->base.id;
3306 list_add(&fb->filp_head, &file_priv->fbs);
3307 DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
3308 mutex_unlock(&file_priv->fbs_lock);
3309
3310 return fb; 3304 return fb;
3311} 3305}
3312 3306
@@ -3328,15 +3322,24 @@ static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
3328int drm_mode_addfb2(struct drm_device *dev, 3322int drm_mode_addfb2(struct drm_device *dev,
3329 void *data, struct drm_file *file_priv) 3323 void *data, struct drm_file *file_priv)
3330{ 3324{
3325 struct drm_mode_fb_cmd2 *r = data;
3331 struct drm_framebuffer *fb; 3326 struct drm_framebuffer *fb;
3332 3327
3333 if (!drm_core_check_feature(dev, DRIVER_MODESET)) 3328 if (!drm_core_check_feature(dev, DRIVER_MODESET))
3334 return -EINVAL; 3329 return -EINVAL;
3335 3330
3336 fb = add_framebuffer_internal(dev, data, file_priv); 3331 fb = internal_framebuffer_create(dev, r, file_priv);
3337 if (IS_ERR(fb)) 3332 if (IS_ERR(fb))
3338 return PTR_ERR(fb); 3333 return PTR_ERR(fb);
3339 3334
3335 /* Transfer ownership to the filp for reaping on close */
3336
3337 DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
3338 mutex_lock(&file_priv->fbs_lock);
3339 r->fb_id = fb->base.id;
3340 list_add(&fb->filp_head, &file_priv->fbs);
3341 mutex_unlock(&file_priv->fbs_lock);
3342
3340 return 0; 3343 return 0;
3341} 3344}
3342 3345
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index 9a5b68717ec8..379ab4555756 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -733,10 +733,14 @@ static bool check_txmsg_state(struct drm_dp_mst_topology_mgr *mgr,
733 struct drm_dp_sideband_msg_tx *txmsg) 733 struct drm_dp_sideband_msg_tx *txmsg)
734{ 734{
735 bool ret; 735 bool ret;
736 mutex_lock(&mgr->qlock); 736
737 /*
738 * All updates to txmsg->state are protected by mgr->qlock, and the two
739 * cases we check here are terminal states. For those the barriers
740 * provided by the wake_up/wait_event pair are enough.
741 */
737 ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX || 742 ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
738 txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT); 743 txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT);
739 mutex_unlock(&mgr->qlock);
740 return ret; 744 return ret;
741} 745}
742 746
@@ -1363,12 +1367,13 @@ static int process_single_tx_qlock(struct drm_dp_mst_topology_mgr *mgr,
1363 return 0; 1367 return 0;
1364} 1368}
1365 1369
1366/* must be called holding qlock */
1367static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr) 1370static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr)
1368{ 1371{
1369 struct drm_dp_sideband_msg_tx *txmsg; 1372 struct drm_dp_sideband_msg_tx *txmsg;
1370 int ret; 1373 int ret;
1371 1374
1375 WARN_ON(!mutex_is_locked(&mgr->qlock));
1376
1372 /* construct a chunk from the first msg in the tx_msg queue */ 1377 /* construct a chunk from the first msg in the tx_msg queue */
1373 if (list_empty(&mgr->tx_msg_downq)) { 1378 if (list_empty(&mgr->tx_msg_downq)) {
1374 mgr->tx_down_in_progress = false; 1379 mgr->tx_down_in_progress = false;
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 7fc6f8bd4821..1134526286c8 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -403,7 +403,7 @@ static int check_free_hole(u64 start, u64 end, u64 size, unsigned alignment)
403 unsigned rem; 403 unsigned rem;
404 404
405 rem = do_div(tmp, alignment); 405 rem = do_div(tmp, alignment);
406 if (tmp) 406 if (rem)
407 start += alignment - rem; 407 start += alignment - rem;
408 } 408 }
409 409
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e5daad5f75fb..5b205863b659 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2936,9 +2936,9 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
2936 req = obj->last_read_req; 2936 req = obj->last_read_req;
2937 2937
2938 /* Do this after OLR check to make sure we make forward progress polling 2938 /* Do this after OLR check to make sure we make forward progress polling
2939 * on this IOCTL with a timeout <=0 (like busy ioctl) 2939 * on this IOCTL with a timeout == 0 (like busy ioctl)
2940 */ 2940 */
2941 if (args->timeout_ns <= 0) { 2941 if (args->timeout_ns == 0) {
2942 ret = -ETIME; 2942 ret = -ETIME;
2943 goto out; 2943 goto out;
2944 } 2944 }
@@ -2948,7 +2948,8 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
2948 i915_gem_request_reference(req); 2948 i915_gem_request_reference(req);
2949 mutex_unlock(&dev->struct_mutex); 2949 mutex_unlock(&dev->struct_mutex);
2950 2950
2951 ret = __i915_wait_request(req, reset_counter, true, &args->timeout_ns, 2951 ret = __i915_wait_request(req, reset_counter, true,
2952 args->timeout_ns > 0 ? &args->timeout_ns : NULL,
2952 file->driver_priv); 2953 file->driver_priv);
2953 mutex_lock(&dev->struct_mutex); 2954 mutex_lock(&dev->struct_mutex);
2954 i915_gem_request_unreference(req); 2955 i915_gem_request_unreference(req);
@@ -4792,6 +4793,9 @@ i915_gem_init_hw(struct drm_device *dev)
4792 if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt()) 4793 if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
4793 return -EIO; 4794 return -EIO;
4794 4795
4796 /* Double layer security blanket, see i915_gem_init() */
4797 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4798
4795 if (dev_priv->ellc_size) 4799 if (dev_priv->ellc_size)
4796 I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf)); 4800 I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
4797 4801
@@ -4824,7 +4828,7 @@ i915_gem_init_hw(struct drm_device *dev)
4824 for_each_ring(ring, dev_priv, i) { 4828 for_each_ring(ring, dev_priv, i) {
4825 ret = ring->init_hw(ring); 4829 ret = ring->init_hw(ring);
4826 if (ret) 4830 if (ret)
4827 return ret; 4831 goto out;
4828 } 4832 }
4829 4833
4830 for (i = 0; i < NUM_L3_SLICES(dev); i++) 4834 for (i = 0; i < NUM_L3_SLICES(dev); i++)
@@ -4841,9 +4845,11 @@ i915_gem_init_hw(struct drm_device *dev)
4841 DRM_ERROR("Context enable failed %d\n", ret); 4845 DRM_ERROR("Context enable failed %d\n", ret);
4842 i915_gem_cleanup_ringbuffer(dev); 4846 i915_gem_cleanup_ringbuffer(dev);
4843 4847
4844 return ret; 4848 goto out;
4845 } 4849 }
4846 4850
4851out:
4852 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4847 return ret; 4853 return ret;
4848} 4854}
4849 4855
@@ -4877,6 +4883,14 @@ int i915_gem_init(struct drm_device *dev)
4877 dev_priv->gt.stop_ring = intel_logical_ring_stop; 4883 dev_priv->gt.stop_ring = intel_logical_ring_stop;
4878 } 4884 }
4879 4885
4886 /* This is just a security blanket to placate dragons.
4887 * On some systems, we very sporadically observe that the first TLBs
4888 * used by the CS may be stale, despite us poking the TLB reset. If
4889 * we hold the forcewake during initialisation these problems
4890 * just magically go away.
4891 */
4892 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4893
4880 ret = i915_gem_init_userptr(dev); 4894 ret = i915_gem_init_userptr(dev);
4881 if (ret) 4895 if (ret)
4882 goto out_unlock; 4896 goto out_unlock;
@@ -4903,6 +4917,7 @@ int i915_gem_init(struct drm_device *dev)
4903 } 4917 }
4904 4918
4905out_unlock: 4919out_unlock:
4920 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4906 mutex_unlock(&dev->struct_mutex); 4921 mutex_unlock(&dev->struct_mutex);
4907 4922
4908 return ret; 4923 return ret;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e730789b53b7..9943c20a741d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9716,7 +9716,7 @@ void intel_check_page_flip(struct drm_device *dev, int pipe)
9716 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 9716 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
9717 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 9717 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
9718 9718
9719 WARN_ON(!in_irq()); 9719 WARN_ON(!in_interrupt());
9720 9720
9721 if (crtc == NULL) 9721 if (crtc == NULL)
9722 return; 9722 return;
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index c47a3baa53d5..4e8fb891d4ea 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1048,8 +1048,14 @@ static void intel_uncore_fw_domains_init(struct drm_device *dev)
1048 1048
1049 /* We need to init first for ECOBUS access and then 1049 /* We need to init first for ECOBUS access and then
1050 * determine later if we want to reinit, in case of MT access is 1050 * determine later if we want to reinit, in case of MT access is
1051 * not working 1051 * not working. In this stage we don't know which flavour this
1052 * ivb is, so it is better to reset also the gen6 fw registers
1053 * before the ecobus check.
1052 */ 1054 */
1055
1056 __raw_i915_write32(dev_priv, FORCEWAKE, 0);
1057 __raw_posting_read(dev_priv, ECOBUS);
1058
1053 fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER, 1059 fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
1054 FORCEWAKE_MT, FORCEWAKE_MT_ACK); 1060 FORCEWAKE_MT, FORCEWAKE_MT_ACK);
1055 1061
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index d13d1b5a859f..df09ca7c4889 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -1030,37 +1030,59 @@ static inline bool radeon_test_signaled(struct radeon_fence *fence)
1030 return test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->base.flags); 1030 return test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);
1031} 1031}
1032 1032
1033struct radeon_wait_cb {
1034 struct fence_cb base;
1035 struct task_struct *task;
1036};
1037
1038static void
1039radeon_fence_wait_cb(struct fence *fence, struct fence_cb *cb)
1040{
1041 struct radeon_wait_cb *wait =
1042 container_of(cb, struct radeon_wait_cb, base);
1043
1044 wake_up_process(wait->task);
1045}
1046
1033static signed long radeon_fence_default_wait(struct fence *f, bool intr, 1047static signed long radeon_fence_default_wait(struct fence *f, bool intr,
1034 signed long t) 1048 signed long t)
1035{ 1049{
1036 struct radeon_fence *fence = to_radeon_fence(f); 1050 struct radeon_fence *fence = to_radeon_fence(f);
1037 struct radeon_device *rdev = fence->rdev; 1051 struct radeon_device *rdev = fence->rdev;
1038 bool signaled; 1052 struct radeon_wait_cb cb;
1039 1053
1040 fence_enable_sw_signaling(&fence->base); 1054 cb.task = current;
1041 1055
1042 /* 1056 if (fence_add_callback(f, &cb.base, radeon_fence_wait_cb))
1043 * This function has to return -EDEADLK, but cannot hold 1057 return t;
1044 * exclusive_lock during the wait because some callers 1058
1045 * may already hold it. This means checking needs_reset without 1059 while (t > 0) {
1046 * lock, and not fiddling with any gpu internals. 1060 if (intr)
1047 * 1061 set_current_state(TASK_INTERRUPTIBLE);
1048 * The callback installed with fence_enable_sw_signaling will 1062 else
1049 * run before our wait_event_*timeout call, so we will see 1063 set_current_state(TASK_UNINTERRUPTIBLE);
1050 * both the signaled fence and the changes to needs_reset. 1064
1051 */ 1065 /*
1066 * radeon_test_signaled must be called after
1067 * set_current_state to prevent a race with wake_up_process
1068 */
1069 if (radeon_test_signaled(fence))
1070 break;
1071
1072 if (rdev->needs_reset) {
1073 t = -EDEADLK;
1074 break;
1075 }
1076
1077 t = schedule_timeout(t);
1078
1079 if (t > 0 && intr && signal_pending(current))
1080 t = -ERESTARTSYS;
1081 }
1082
1083 __set_current_state(TASK_RUNNING);
1084 fence_remove_callback(f, &cb.base);
1052 1085
1053 if (intr)
1054 t = wait_event_interruptible_timeout(rdev->fence_queue,
1055 ((signaled = radeon_test_signaled(fence)) ||
1056 rdev->needs_reset), t);
1057 else
1058 t = wait_event_timeout(rdev->fence_queue,
1059 ((signaled = radeon_test_signaled(fence)) ||
1060 rdev->needs_reset), t);
1061
1062 if (t > 0 && !signaled)
1063 return -EDEADLK;
1064 return t; 1086 return t;
1065} 1087}
1066 1088
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index e088e5558da0..a7fb2735d4a9 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -7130,8 +7130,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
7130 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); 7130 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK);
7131 7131
7132 if (!vclk || !dclk) { 7132 if (!vclk || !dclk) {
7133 /* keep the Bypass mode, put PLL to sleep */ 7133 /* keep the Bypass mode */
7134 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK);
7135 return 0; 7134 return 0;
7136 } 7135 }
7137 7136
@@ -7147,8 +7146,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
7147 /* set VCO_MODE to 1 */ 7146 /* set VCO_MODE to 1 */
7148 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_VCO_MODE_MASK, ~UPLL_VCO_MODE_MASK); 7147 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_VCO_MODE_MASK, ~UPLL_VCO_MODE_MASK);
7149 7148
7150 /* toggle UPLL_SLEEP to 1 then back to 0 */ 7149 /* disable sleep mode */
7151 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK);
7152 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_SLEEP_MASK); 7150 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_SLEEP_MASK);
7153 7151
7154 /* deassert UPLL_RESET */ 7152 /* deassert UPLL_RESET */
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 6c6b655defcf..e13b9cbc304e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -725,32 +725,6 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
725 goto out_err1; 725 goto out_err1;
726 } 726 }
727 727
728 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
729 (dev_priv->vram_size >> PAGE_SHIFT));
730 if (unlikely(ret != 0)) {
731 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
732 goto out_err2;
733 }
734
735 dev_priv->has_gmr = true;
736 if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
737 refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
738 VMW_PL_GMR) != 0) {
739 DRM_INFO("No GMR memory available. "
740 "Graphics memory resources are very limited.\n");
741 dev_priv->has_gmr = false;
742 }
743
744 if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
745 dev_priv->has_mob = true;
746 if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
747 VMW_PL_MOB) != 0) {
748 DRM_INFO("No MOB memory available. "
749 "3D will be disabled.\n");
750 dev_priv->has_mob = false;
751 }
752 }
753
754 dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start, 728 dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start,
755 dev_priv->mmio_size); 729 dev_priv->mmio_size);
756 730
@@ -813,6 +787,33 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
813 goto out_no_fman; 787 goto out_no_fman;
814 } 788 }
815 789
790
791 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
792 (dev_priv->vram_size >> PAGE_SHIFT));
793 if (unlikely(ret != 0)) {
794 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
795 goto out_no_vram;
796 }
797
798 dev_priv->has_gmr = true;
799 if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
800 refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
801 VMW_PL_GMR) != 0) {
802 DRM_INFO("No GMR memory available. "
803 "Graphics memory resources are very limited.\n");
804 dev_priv->has_gmr = false;
805 }
806
807 if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
808 dev_priv->has_mob = true;
809 if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
810 VMW_PL_MOB) != 0) {
811 DRM_INFO("No MOB memory available. "
812 "3D will be disabled.\n");
813 dev_priv->has_mob = false;
814 }
815 }
816
816 vmw_kms_save_vga(dev_priv); 817 vmw_kms_save_vga(dev_priv);
817 818
818 /* Start kms and overlay systems, needs fifo. */ 819 /* Start kms and overlay systems, needs fifo. */
@@ -838,6 +839,12 @@ out_no_fifo:
838 vmw_kms_close(dev_priv); 839 vmw_kms_close(dev_priv);
839out_no_kms: 840out_no_kms:
840 vmw_kms_restore_vga(dev_priv); 841 vmw_kms_restore_vga(dev_priv);
842 if (dev_priv->has_mob)
843 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
844 if (dev_priv->has_gmr)
845 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
846 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
847out_no_vram:
841 vmw_fence_manager_takedown(dev_priv->fman); 848 vmw_fence_manager_takedown(dev_priv->fman);
842out_no_fman: 849out_no_fman:
843 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) 850 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
@@ -853,12 +860,6 @@ out_err4:
853 iounmap(dev_priv->mmio_virt); 860 iounmap(dev_priv->mmio_virt);
854out_err3: 861out_err3:
855 arch_phys_wc_del(dev_priv->mmio_mtrr); 862 arch_phys_wc_del(dev_priv->mmio_mtrr);
856 if (dev_priv->has_mob)
857 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
858 if (dev_priv->has_gmr)
859 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
860 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
861out_err2:
862 (void)ttm_bo_device_release(&dev_priv->bdev); 863 (void)ttm_bo_device_release(&dev_priv->bdev);
863out_err1: 864out_err1:
864 vmw_ttm_global_release(dev_priv); 865 vmw_ttm_global_release(dev_priv);
@@ -887,6 +888,13 @@ static int vmw_driver_unload(struct drm_device *dev)
887 } 888 }
888 vmw_kms_close(dev_priv); 889 vmw_kms_close(dev_priv);
889 vmw_overlay_close(dev_priv); 890 vmw_overlay_close(dev_priv);
891
892 if (dev_priv->has_mob)
893 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
894 if (dev_priv->has_gmr)
895 (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
896 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
897
890 vmw_fence_manager_takedown(dev_priv->fman); 898 vmw_fence_manager_takedown(dev_priv->fman);
891 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) 899 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
892 drm_irq_uninstall(dev_priv->dev); 900 drm_irq_uninstall(dev_priv->dev);
@@ -898,11 +906,6 @@ static int vmw_driver_unload(struct drm_device *dev)
898 ttm_object_device_release(&dev_priv->tdev); 906 ttm_object_device_release(&dev_priv->tdev);
899 iounmap(dev_priv->mmio_virt); 907 iounmap(dev_priv->mmio_virt);
900 arch_phys_wc_del(dev_priv->mmio_mtrr); 908 arch_phys_wc_del(dev_priv->mmio_mtrr);
901 if (dev_priv->has_mob)
902 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
903 if (dev_priv->has_gmr)
904 (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
905 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
906 (void)ttm_bo_device_release(&dev_priv->bdev); 909 (void)ttm_bo_device_release(&dev_priv->bdev);
907 vmw_ttm_global_release(dev_priv); 910 vmw_ttm_global_release(dev_priv);
908 911
@@ -1235,6 +1238,7 @@ static void vmw_remove(struct pci_dev *pdev)
1235{ 1238{
1236 struct drm_device *dev = pci_get_drvdata(pdev); 1239 struct drm_device *dev = pci_get_drvdata(pdev);
1237 1240
1241 pci_disable_device(pdev);
1238 drm_put_dev(dev); 1242 drm_put_dev(dev);
1239} 1243}
1240 1244
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 33176d05db35..654c8daeb5ab 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -890,7 +890,8 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
890 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo); 890 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
891 if (unlikely(ret != 0)) { 891 if (unlikely(ret != 0)) {
892 DRM_ERROR("Could not find or use MOB buffer.\n"); 892 DRM_ERROR("Could not find or use MOB buffer.\n");
893 return -EINVAL; 893 ret = -EINVAL;
894 goto out_no_reloc;
894 } 895 }
895 bo = &vmw_bo->base; 896 bo = &vmw_bo->base;
896 897
@@ -914,7 +915,7 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
914 915
915out_no_reloc: 916out_no_reloc:
916 vmw_dmabuf_unreference(&vmw_bo); 917 vmw_dmabuf_unreference(&vmw_bo);
917 vmw_bo_p = NULL; 918 *vmw_bo_p = NULL;
918 return ret; 919 return ret;
919} 920}
920 921
@@ -951,7 +952,8 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
951 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo); 952 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
952 if (unlikely(ret != 0)) { 953 if (unlikely(ret != 0)) {
953 DRM_ERROR("Could not find or use GMR region.\n"); 954 DRM_ERROR("Could not find or use GMR region.\n");
954 return -EINVAL; 955 ret = -EINVAL;
956 goto out_no_reloc;
955 } 957 }
956 bo = &vmw_bo->base; 958 bo = &vmw_bo->base;
957 959
@@ -974,7 +976,7 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
974 976
975out_no_reloc: 977out_no_reloc:
976 vmw_dmabuf_unreference(&vmw_bo); 978 vmw_dmabuf_unreference(&vmw_bo);
977 vmw_bo_p = NULL; 979 *vmw_bo_p = NULL;
978 return ret; 980 return ret;
979} 981}
980 982
@@ -2780,13 +2782,11 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
2780 NULL, arg->command_size, arg->throttle_us, 2782 NULL, arg->command_size, arg->throttle_us,
2781 (void __user *)(unsigned long)arg->fence_rep, 2783 (void __user *)(unsigned long)arg->fence_rep,
2782 NULL); 2784 NULL);
2783 2785 ttm_read_unlock(&dev_priv->reservation_sem);
2784 if (unlikely(ret != 0)) 2786 if (unlikely(ret != 0))
2785 goto out_unlock; 2787 return ret;
2786 2788
2787 vmw_kms_cursor_post_execbuf(dev_priv); 2789 vmw_kms_cursor_post_execbuf(dev_priv);
2788 2790
2789out_unlock: 2791 return 0;
2790 ttm_read_unlock(&dev_priv->reservation_sem);
2791 return ret;
2792} 2792}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 8725b79e7847..07cda8cbbddb 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -2033,23 +2033,17 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2033 int i; 2033 int i;
2034 struct drm_mode_config *mode_config = &dev->mode_config; 2034 struct drm_mode_config *mode_config = &dev->mode_config;
2035 2035
2036 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2037 if (unlikely(ret != 0))
2038 return ret;
2039
2040 if (!arg->num_outputs) { 2036 if (!arg->num_outputs) {
2041 struct drm_vmw_rect def_rect = {0, 0, 800, 600}; 2037 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
2042 vmw_du_update_layout(dev_priv, 1, &def_rect); 2038 vmw_du_update_layout(dev_priv, 1, &def_rect);
2043 goto out_unlock; 2039 return 0;
2044 } 2040 }
2045 2041
2046 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect); 2042 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
2047 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect), 2043 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2048 GFP_KERNEL); 2044 GFP_KERNEL);
2049 if (unlikely(!rects)) { 2045 if (unlikely(!rects))
2050 ret = -ENOMEM; 2046 return -ENOMEM;
2051 goto out_unlock;
2052 }
2053 2047
2054 user_rects = (void __user *)(unsigned long)arg->rects; 2048 user_rects = (void __user *)(unsigned long)arg->rects;
2055 ret = copy_from_user(rects, user_rects, rects_size); 2049 ret = copy_from_user(rects, user_rects, rects_size);
@@ -2074,7 +2068,5 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2074 2068
2075out_free: 2069out_free:
2076 kfree(rects); 2070 kfree(rects);
2077out_unlock:
2078 ttm_read_unlock(&dev_priv->reservation_sem);
2079 return ret; 2071 return ret;
2080} 2072}
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 210cf4874cb7..edf274cabe81 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -679,9 +679,6 @@ static int i2c_device_remove(struct device *dev)
679 status = driver->remove(client); 679 status = driver->remove(client);
680 } 680 }
681 681
682 if (dev->of_node)
683 irq_dispose_mapping(client->irq);
684
685 dev_pm_domain_detach(&client->dev, true); 682 dev_pm_domain_detach(&client->dev, true);
686 return status; 683 return status;
687} 684}
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
index 2db803cd095c..d24a3f8b49bc 100644
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -1497,9 +1497,9 @@ static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
1497 drive->name); 1497 drive->name);
1498 return 0; 1498 return 0;
1499 } 1499 }
1500 st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE); 1500 table->command = cpu_to_le16(wr? OUTPUT_MORE: INPUT_MORE);
1501 st_le16(&table->req_count, tc); 1501 table->req_count = cpu_to_le16(tc);
1502 st_le32(&table->phy_addr, cur_addr); 1502 table->phy_addr = cpu_to_le32(cur_addr);
1503 table->cmd_dep = 0; 1503 table->cmd_dep = 0;
1504 table->xfer_status = 0; 1504 table->xfer_status = 0;
1505 table->res_count = 0; 1505 table->res_count = 0;
@@ -1513,10 +1513,10 @@ static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
1513 1513
1514 /* convert the last command to an input/output last command */ 1514 /* convert the last command to an input/output last command */
1515 if (count) { 1515 if (count) {
1516 st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST); 1516 table[-1].command = cpu_to_le16(wr? OUTPUT_LAST: INPUT_LAST);
1517 /* add the stop command to the end of the list */ 1517 /* add the stop command to the end of the list */
1518 memset(table, 0, sizeof(struct dbdma_cmd)); 1518 memset(table, 0, sizeof(struct dbdma_cmd));
1519 st_le16(&table->command, DBDMA_STOP); 1519 table->command = cpu_to_le16(DBDMA_STOP);
1520 mb(); 1520 mb();
1521 writel(hwif->dmatable_dma, &dma->cmdptr); 1521 writel(hwif->dmatable_dma, &dma->cmdptr);
1522 return 1; 1522 return 1;
diff --git a/drivers/input/keyboard/tc3589x-keypad.c b/drivers/input/keyboard/tc3589x-keypad.c
index 8ff612d160b0..563932500ff1 100644
--- a/drivers/input/keyboard/tc3589x-keypad.c
+++ b/drivers/input/keyboard/tc3589x-keypad.c
@@ -411,9 +411,9 @@ static int tc3589x_keypad_probe(struct platform_device *pdev)
411 411
412 input_set_drvdata(input, keypad); 412 input_set_drvdata(input, keypad);
413 413
414 error = request_threaded_irq(irq, NULL, 414 error = request_threaded_irq(irq, NULL, tc3589x_keypad_irq,
415 tc3589x_keypad_irq, plat->irqtype, 415 plat->irqtype | IRQF_ONESHOT,
416 "tc3589x-keypad", keypad); 416 "tc3589x-keypad", keypad);
417 if (error < 0) { 417 if (error < 0) {
418 dev_err(&pdev->dev, 418 dev_err(&pdev->dev,
419 "Could not allocate irq %d,error %d\n", 419 "Could not allocate irq %d,error %d\n",
diff --git a/drivers/input/misc/mma8450.c b/drivers/input/misc/mma8450.c
index 59d4dcddf6de..98228773a111 100644
--- a/drivers/input/misc/mma8450.c
+++ b/drivers/input/misc/mma8450.c
@@ -187,6 +187,7 @@ static int mma8450_probe(struct i2c_client *c,
187 idev->private = m; 187 idev->private = m;
188 idev->input->name = MMA8450_DRV_NAME; 188 idev->input->name = MMA8450_DRV_NAME;
189 idev->input->id.bustype = BUS_I2C; 189 idev->input->id.bustype = BUS_I2C;
190 idev->input->dev.parent = &c->dev;
190 idev->poll = mma8450_poll; 191 idev->poll = mma8450_poll;
191 idev->poll_interval = POLL_INTERVAL; 192 idev->poll_interval = POLL_INTERVAL;
192 idev->poll_interval_max = POLL_INTERVAL_MAX; 193 idev->poll_interval_max = POLL_INTERVAL_MAX;
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index d28726a0ef85..1bd15ebc01f2 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -2605,8 +2605,10 @@ int alps_detect(struct psmouse *psmouse, bool set_properties)
2605 return -ENOMEM; 2605 return -ENOMEM;
2606 2606
2607 error = alps_identify(psmouse, priv); 2607 error = alps_identify(psmouse, priv);
2608 if (error) 2608 if (error) {
2609 kfree(priv);
2609 return error; 2610 return error;
2611 }
2610 2612
2611 if (set_properties) { 2613 if (set_properties) {
2612 psmouse->vendor = "ALPS"; 2614 psmouse->vendor = "ALPS";
diff --git a/drivers/input/mouse/cyapa_gen3.c b/drivers/input/mouse/cyapa_gen3.c
index 77e9d70a986b..1e2291c378fe 100644
--- a/drivers/input/mouse/cyapa_gen3.c
+++ b/drivers/input/mouse/cyapa_gen3.c
@@ -20,7 +20,7 @@
20#include <linux/input/mt.h> 20#include <linux/input/mt.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/unaligned/access_ok.h> 23#include <asm/unaligned.h>
24#include "cyapa.h" 24#include "cyapa.h"
25 25
26 26
diff --git a/drivers/input/mouse/cyapa_gen5.c b/drivers/input/mouse/cyapa_gen5.c
index ddf5393a1180..5b611dd71e79 100644
--- a/drivers/input/mouse/cyapa_gen5.c
+++ b/drivers/input/mouse/cyapa_gen5.c
@@ -17,7 +17,7 @@
17#include <linux/mutex.h> 17#include <linux/mutex.h>
18#include <linux/completion.h> 18#include <linux/completion.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/unaligned/access_ok.h> 20#include <asm/unaligned.h>
21#include <linux/crc-itu-t.h> 21#include <linux/crc-itu-t.h>
22#include "cyapa.h" 22#include "cyapa.h"
23 23
@@ -1926,7 +1926,7 @@ static int cyapa_gen5_read_idac_data(struct cyapa *cyapa,
1926 electrodes_tx = cyapa->electrodes_x; 1926 electrodes_tx = cyapa->electrodes_x;
1927 max_element_cnt = ((cyapa->aligned_electrodes_rx + 7) & 1927 max_element_cnt = ((cyapa->aligned_electrodes_rx + 7) &
1928 ~7u) * electrodes_tx; 1928 ~7u) * electrodes_tx;
1929 } else if (idac_data_type == GEN5_RETRIEVE_SELF_CAP_PWC_DATA) { 1929 } else {
1930 offset = 2; 1930 offset = 2;
1931 max_element_cnt = cyapa->electrodes_x + 1931 max_element_cnt = cyapa->electrodes_x +
1932 cyapa->electrodes_y; 1932 cyapa->electrodes_y;
diff --git a/drivers/input/mouse/focaltech.c b/drivers/input/mouse/focaltech.c
index 757f78a94aec..23d259416f2f 100644
--- a/drivers/input/mouse/focaltech.c
+++ b/drivers/input/mouse/focaltech.c
@@ -67,9 +67,6 @@ static void focaltech_reset(struct psmouse *psmouse)
67 67
68#define FOC_MAX_FINGERS 5 68#define FOC_MAX_FINGERS 5
69 69
70#define FOC_MAX_X 2431
71#define FOC_MAX_Y 1663
72
73/* 70/*
74 * Current state of a single finger on the touchpad. 71 * Current state of a single finger on the touchpad.
75 */ 72 */
@@ -129,9 +126,17 @@ static void focaltech_report_state(struct psmouse *psmouse)
129 input_mt_slot(dev, i); 126 input_mt_slot(dev, i);
130 input_mt_report_slot_state(dev, MT_TOOL_FINGER, active); 127 input_mt_report_slot_state(dev, MT_TOOL_FINGER, active);
131 if (active) { 128 if (active) {
132 input_report_abs(dev, ABS_MT_POSITION_X, finger->x); 129 unsigned int clamped_x, clamped_y;
130 /*
131 * The touchpad might report invalid data, so we clamp
132 * the resulting values so that we do not confuse
133 * userspace.
134 */
135 clamped_x = clamp(finger->x, 0U, priv->x_max);
136 clamped_y = clamp(finger->y, 0U, priv->y_max);
137 input_report_abs(dev, ABS_MT_POSITION_X, clamped_x);
133 input_report_abs(dev, ABS_MT_POSITION_Y, 138 input_report_abs(dev, ABS_MT_POSITION_Y,
134 FOC_MAX_Y - finger->y); 139 priv->y_max - clamped_y);
135 } 140 }
136 } 141 }
137 input_mt_report_pointer_emulation(dev, true); 142 input_mt_report_pointer_emulation(dev, true);
@@ -180,16 +185,6 @@ static void focaltech_process_abs_packet(struct psmouse *psmouse,
180 185
181 state->pressed = (packet[0] >> 4) & 1; 186 state->pressed = (packet[0] >> 4) & 1;
182 187
183 /*
184 * packet[5] contains some kind of tool size in the most
185 * significant nibble. 0xff is a special value (latching) that
186 * signals a large contact area.
187 */
188 if (packet[5] == 0xff) {
189 state->fingers[finger].valid = false;
190 return;
191 }
192
193 state->fingers[finger].x = ((packet[1] & 0xf) << 8) | packet[2]; 188 state->fingers[finger].x = ((packet[1] & 0xf) << 8) | packet[2];
194 state->fingers[finger].y = (packet[3] << 8) | packet[4]; 189 state->fingers[finger].y = (packet[3] << 8) | packet[4];
195 state->fingers[finger].valid = true; 190 state->fingers[finger].valid = true;
@@ -381,6 +376,23 @@ static int focaltech_read_size(struct psmouse *psmouse)
381 376
382 return 0; 377 return 0;
383} 378}
379
380void focaltech_set_resolution(struct psmouse *psmouse, unsigned int resolution)
381{
382 /* not supported yet */
383}
384
385static void focaltech_set_rate(struct psmouse *psmouse, unsigned int rate)
386{
387 /* not supported yet */
388}
389
390static void focaltech_set_scale(struct psmouse *psmouse,
391 enum psmouse_scale scale)
392{
393 /* not supported yet */
394}
395
384int focaltech_init(struct psmouse *psmouse) 396int focaltech_init(struct psmouse *psmouse)
385{ 397{
386 struct focaltech_data *priv; 398 struct focaltech_data *priv;
@@ -415,6 +427,14 @@ int focaltech_init(struct psmouse *psmouse)
415 psmouse->cleanup = focaltech_reset; 427 psmouse->cleanup = focaltech_reset;
416 /* resync is not supported yet */ 428 /* resync is not supported yet */
417 psmouse->resync_time = 0; 429 psmouse->resync_time = 0;
430 /*
431 * rate/resolution/scale changes are not supported yet, and
432 * the generic implementations of these functions seem to
433 * confuse some touchpads
434 */
435 psmouse->set_resolution = focaltech_set_resolution;
436 psmouse->set_rate = focaltech_set_rate;
437 psmouse->set_scale = focaltech_set_scale;
418 438
419 return 0; 439 return 0;
420 440
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index 4ccd01d7a48d..8bc61237bc1b 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -454,6 +454,17 @@ static void psmouse_set_rate(struct psmouse *psmouse, unsigned int rate)
454} 454}
455 455
456/* 456/*
457 * Here we set the mouse scaling.
458 */
459
460static void psmouse_set_scale(struct psmouse *psmouse, enum psmouse_scale scale)
461{
462 ps2_command(&psmouse->ps2dev, NULL,
463 scale == PSMOUSE_SCALE21 ? PSMOUSE_CMD_SETSCALE21 :
464 PSMOUSE_CMD_SETSCALE11);
465}
466
467/*
457 * psmouse_poll() - default poll handler. Everyone except for ALPS uses it. 468 * psmouse_poll() - default poll handler. Everyone except for ALPS uses it.
458 */ 469 */
459 470
@@ -689,6 +700,7 @@ static void psmouse_apply_defaults(struct psmouse *psmouse)
689 700
690 psmouse->set_rate = psmouse_set_rate; 701 psmouse->set_rate = psmouse_set_rate;
691 psmouse->set_resolution = psmouse_set_resolution; 702 psmouse->set_resolution = psmouse_set_resolution;
703 psmouse->set_scale = psmouse_set_scale;
692 psmouse->poll = psmouse_poll; 704 psmouse->poll = psmouse_poll;
693 psmouse->protocol_handler = psmouse_process_byte; 705 psmouse->protocol_handler = psmouse_process_byte;
694 psmouse->pktsize = 3; 706 psmouse->pktsize = 3;
@@ -1160,7 +1172,7 @@ static void psmouse_initialize(struct psmouse *psmouse)
1160 if (psmouse_max_proto != PSMOUSE_PS2) { 1172 if (psmouse_max_proto != PSMOUSE_PS2) {
1161 psmouse->set_rate(psmouse, psmouse->rate); 1173 psmouse->set_rate(psmouse, psmouse->rate);
1162 psmouse->set_resolution(psmouse, psmouse->resolution); 1174 psmouse->set_resolution(psmouse, psmouse->resolution);
1163 ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_SETSCALE11); 1175 psmouse->set_scale(psmouse, PSMOUSE_SCALE11);
1164 } 1176 }
1165} 1177}
1166 1178
diff --git a/drivers/input/mouse/psmouse.h b/drivers/input/mouse/psmouse.h
index c2ff137ecbdb..d02e1bdc9ae4 100644
--- a/drivers/input/mouse/psmouse.h
+++ b/drivers/input/mouse/psmouse.h
@@ -36,6 +36,11 @@ typedef enum {
36 PSMOUSE_FULL_PACKET 36 PSMOUSE_FULL_PACKET
37} psmouse_ret_t; 37} psmouse_ret_t;
38 38
39enum psmouse_scale {
40 PSMOUSE_SCALE11,
41 PSMOUSE_SCALE21
42};
43
39struct psmouse { 44struct psmouse {
40 void *private; 45 void *private;
41 struct input_dev *dev; 46 struct input_dev *dev;
@@ -67,6 +72,7 @@ struct psmouse {
67 psmouse_ret_t (*protocol_handler)(struct psmouse *psmouse); 72 psmouse_ret_t (*protocol_handler)(struct psmouse *psmouse);
68 void (*set_rate)(struct psmouse *psmouse, unsigned int rate); 73 void (*set_rate)(struct psmouse *psmouse, unsigned int rate);
69 void (*set_resolution)(struct psmouse *psmouse, unsigned int resolution); 74 void (*set_resolution)(struct psmouse *psmouse, unsigned int resolution);
75 void (*set_scale)(struct psmouse *psmouse, enum psmouse_scale scale);
70 76
71 int (*reconnect)(struct psmouse *psmouse); 77 int (*reconnect)(struct psmouse *psmouse);
72 void (*disconnect)(struct psmouse *psmouse); 78 void (*disconnect)(struct psmouse *psmouse);
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 58917525126e..6261fd6d7c3c 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -943,6 +943,7 @@ config TOUCHSCREEN_SUN4I
943 tristate "Allwinner sun4i resistive touchscreen controller support" 943 tristate "Allwinner sun4i resistive touchscreen controller support"
944 depends on ARCH_SUNXI || COMPILE_TEST 944 depends on ARCH_SUNXI || COMPILE_TEST
945 depends on HWMON 945 depends on HWMON
946 depends on THERMAL || !THERMAL_OF
946 help 947 help
947 This selects support for the resistive touchscreen controller 948 This selects support for the resistive touchscreen controller
948 found on Allwinner sunxi SoCs. 949 found on Allwinner sunxi SoCs.
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index baa0d9786f50..1ae4e547b419 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -23,6 +23,7 @@ config IOMMU_IO_PGTABLE
23config IOMMU_IO_PGTABLE_LPAE 23config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format" 24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE 25 select IOMMU_IO_PGTABLE
26 depends on ARM || ARM64 || COMPILE_TEST
26 help 27 help
27 Enable support for the ARM long descriptor pagetable format. 28 Enable support for the ARM long descriptor pagetable format.
28 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page 29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
@@ -63,6 +64,7 @@ config MSM_IOMMU
63 bool "MSM IOMMU Support" 64 bool "MSM IOMMU Support"
64 depends on ARM 65 depends on ARM
65 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST 66 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
67 depends on BROKEN
66 select IOMMU_API 68 select IOMMU_API
67 help 69 help
68 Support for the IOMMUs found on certain Qualcomm SOCs. 70 Support for the IOMMUs found on certain Qualcomm SOCs.
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 7ce52737c7a1..dc14fec4ede1 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1186,8 +1186,15 @@ static const struct iommu_ops exynos_iommu_ops = {
1186 1186
1187static int __init exynos_iommu_init(void) 1187static int __init exynos_iommu_init(void)
1188{ 1188{
1189 struct device_node *np;
1189 int ret; 1190 int ret;
1190 1191
1192 np = of_find_matching_node(NULL, sysmmu_of_match);
1193 if (!np)
1194 return 0;
1195
1196 of_node_put(np);
1197
1191 lv2table_kmem_cache = kmem_cache_create("exynos-iommu-lv2table", 1198 lv2table_kmem_cache = kmem_cache_create("exynos-iommu-lv2table",
1192 LV2TABLE_SIZE, LV2TABLE_SIZE, 0, NULL); 1199 LV2TABLE_SIZE, LV2TABLE_SIZE, 0, NULL);
1193 if (!lv2table_kmem_cache) { 1200 if (!lv2table_kmem_cache) {
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 5a500edf00cc..b610a8dee238 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -56,7 +56,8 @@
56 ((((d)->levels - ((l) - ARM_LPAE_START_LVL(d) + 1)) \ 56 ((((d)->levels - ((l) - ARM_LPAE_START_LVL(d) + 1)) \
57 * (d)->bits_per_level) + (d)->pg_shift) 57 * (d)->bits_per_level) + (d)->pg_shift)
58 58
59#define ARM_LPAE_PAGES_PER_PGD(d) ((d)->pgd_size >> (d)->pg_shift) 59#define ARM_LPAE_PAGES_PER_PGD(d) \
60 DIV_ROUND_UP((d)->pgd_size, 1UL << (d)->pg_shift)
60 61
61/* 62/*
62 * Calculate the index at level l used to map virtual address a using the 63 * Calculate the index at level l used to map virtual address a using the
@@ -66,7 +67,7 @@
66 ((l) == ARM_LPAE_START_LVL(d) ? ilog2(ARM_LPAE_PAGES_PER_PGD(d)) : 0) 67 ((l) == ARM_LPAE_START_LVL(d) ? ilog2(ARM_LPAE_PAGES_PER_PGD(d)) : 0)
67 68
68#define ARM_LPAE_LVL_IDX(a,l,d) \ 69#define ARM_LPAE_LVL_IDX(a,l,d) \
69 (((a) >> ARM_LPAE_LVL_SHIFT(l,d)) & \ 70 (((u64)(a) >> ARM_LPAE_LVL_SHIFT(l,d)) & \
70 ((1 << ((d)->bits_per_level + ARM_LPAE_PGD_IDX(l,d))) - 1)) 71 ((1 << ((d)->bits_per_level + ARM_LPAE_PGD_IDX(l,d))) - 1))
71 72
72/* Calculate the block/page mapping size at level l for pagetable in d. */ 73/* Calculate the block/page mapping size at level l for pagetable in d. */
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index f59f857b702e..a4ba851825c2 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -1376,6 +1376,13 @@ static int __init omap_iommu_init(void)
1376 struct kmem_cache *p; 1376 struct kmem_cache *p;
1377 const unsigned long flags = SLAB_HWCACHE_ALIGN; 1377 const unsigned long flags = SLAB_HWCACHE_ALIGN;
1378 size_t align = 1 << 10; /* L2 pagetable alignement */ 1378 size_t align = 1 << 10; /* L2 pagetable alignement */
1379 struct device_node *np;
1380
1381 np = of_find_matching_node(NULL, omap_iommu_of_match);
1382 if (!np)
1383 return 0;
1384
1385 of_node_put(np);
1379 1386
1380 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags, 1387 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags,
1381 iopte_cachep_ctor); 1388 iopte_cachep_ctor);
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 6a8b1ec4a48a..9f74fddcd304 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -1015,8 +1015,15 @@ static struct platform_driver rk_iommu_driver = {
1015 1015
1016static int __init rk_iommu_init(void) 1016static int __init rk_iommu_init(void)
1017{ 1017{
1018 struct device_node *np;
1018 int ret; 1019 int ret;
1019 1020
1021 np = of_find_matching_node(NULL, rk_iommu_dt_ids);
1022 if (!np)
1023 return 0;
1024
1025 of_node_put(np);
1026
1020 ret = bus_set_iommu(&platform_bus_type, &rk_iommu_ops); 1027 ret = bus_set_iommu(&platform_bus_type, &rk_iommu_ops);
1021 if (ret) 1028 if (ret)
1022 return ret; 1029 return ret;
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 463c235acbdc..4387dae14e45 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -69,6 +69,7 @@ static void __iomem *per_cpu_int_base;
69static void __iomem *main_int_base; 69static void __iomem *main_int_base;
70static struct irq_domain *armada_370_xp_mpic_domain; 70static struct irq_domain *armada_370_xp_mpic_domain;
71static u32 doorbell_mask_reg; 71static u32 doorbell_mask_reg;
72static int parent_irq;
72#ifdef CONFIG_PCI_MSI 73#ifdef CONFIG_PCI_MSI
73static struct irq_domain *armada_370_xp_msi_domain; 74static struct irq_domain *armada_370_xp_msi_domain;
74static DECLARE_BITMAP(msi_used, PCI_MSI_DOORBELL_NR); 75static DECLARE_BITMAP(msi_used, PCI_MSI_DOORBELL_NR);
@@ -356,6 +357,7 @@ static int armada_xp_mpic_secondary_init(struct notifier_block *nfb,
356{ 357{
357 if (action == CPU_STARTING || action == CPU_STARTING_FROZEN) 358 if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
358 armada_xp_mpic_smp_cpu_init(); 359 armada_xp_mpic_smp_cpu_init();
360
359 return NOTIFY_OK; 361 return NOTIFY_OK;
360} 362}
361 363
@@ -364,6 +366,20 @@ static struct notifier_block armada_370_xp_mpic_cpu_notifier = {
364 .priority = 100, 366 .priority = 100,
365}; 367};
366 368
369static int mpic_cascaded_secondary_init(struct notifier_block *nfb,
370 unsigned long action, void *hcpu)
371{
372 if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
373 enable_percpu_irq(parent_irq, IRQ_TYPE_NONE);
374
375 return NOTIFY_OK;
376}
377
378static struct notifier_block mpic_cascaded_cpu_notifier = {
379 .notifier_call = mpic_cascaded_secondary_init,
380 .priority = 100,
381};
382
367#endif /* CONFIG_SMP */ 383#endif /* CONFIG_SMP */
368 384
369static struct irq_domain_ops armada_370_xp_mpic_irq_ops = { 385static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
@@ -539,7 +555,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
539 struct device_node *parent) 555 struct device_node *parent)
540{ 556{
541 struct resource main_int_res, per_cpu_int_res; 557 struct resource main_int_res, per_cpu_int_res;
542 int parent_irq, nr_irqs, i; 558 int nr_irqs, i;
543 u32 control; 559 u32 control;
544 560
545 BUG_ON(of_address_to_resource(node, 0, &main_int_res)); 561 BUG_ON(of_address_to_resource(node, 0, &main_int_res));
@@ -587,6 +603,9 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
587 register_cpu_notifier(&armada_370_xp_mpic_cpu_notifier); 603 register_cpu_notifier(&armada_370_xp_mpic_cpu_notifier);
588#endif 604#endif
589 } else { 605 } else {
606#ifdef CONFIG_SMP
607 register_cpu_notifier(&mpic_cascaded_cpu_notifier);
608#endif
590 irq_set_chained_handler(parent_irq, 609 irq_set_chained_handler(parent_irq,
591 armada_370_xp_mpic_handle_cascade_irq); 610 armada_370_xp_mpic_handle_cascade_irq);
592 } 611 }
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index d8996bdf0f61..596b0a9eee99 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -416,13 +416,14 @@ static void its_send_single_command(struct its_node *its,
416{ 416{
417 struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 417 struct its_cmd_block *cmd, *sync_cmd, *next_cmd;
418 struct its_collection *sync_col; 418 struct its_collection *sync_col;
419 unsigned long flags;
419 420
420 raw_spin_lock(&its->lock); 421 raw_spin_lock_irqsave(&its->lock, flags);
421 422
422 cmd = its_allocate_entry(its); 423 cmd = its_allocate_entry(its);
423 if (!cmd) { /* We're soooooo screewed... */ 424 if (!cmd) { /* We're soooooo screewed... */
424 pr_err_ratelimited("ITS can't allocate, dropping command\n"); 425 pr_err_ratelimited("ITS can't allocate, dropping command\n");
425 raw_spin_unlock(&its->lock); 426 raw_spin_unlock_irqrestore(&its->lock, flags);
426 return; 427 return;
427 } 428 }
428 sync_col = builder(cmd, desc); 429 sync_col = builder(cmd, desc);
@@ -442,7 +443,7 @@ static void its_send_single_command(struct its_node *its,
442 443
443post: 444post:
444 next_cmd = its_post_commands(its); 445 next_cmd = its_post_commands(its);
445 raw_spin_unlock(&its->lock); 446 raw_spin_unlock_irqrestore(&its->lock, flags);
446 447
447 its_wait_for_range_completion(its, cmd, next_cmd); 448 its_wait_for_range_completion(its, cmd, next_cmd);
448} 449}
@@ -799,21 +800,43 @@ static int its_alloc_tables(struct its_node *its)
799{ 800{
800 int err; 801 int err;
801 int i; 802 int i;
802 int psz = PAGE_SIZE; 803 int psz = SZ_64K;
803 u64 shr = GITS_BASER_InnerShareable; 804 u64 shr = GITS_BASER_InnerShareable;
804 805
805 for (i = 0; i < GITS_BASER_NR_REGS; i++) { 806 for (i = 0; i < GITS_BASER_NR_REGS; i++) {
806 u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 807 u64 val = readq_relaxed(its->base + GITS_BASER + i * 8);
807 u64 type = GITS_BASER_TYPE(val); 808 u64 type = GITS_BASER_TYPE(val);
808 u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 809 u64 entry_size = GITS_BASER_ENTRY_SIZE(val);
810 int order = get_order(psz);
811 int alloc_size;
809 u64 tmp; 812 u64 tmp;
810 void *base; 813 void *base;
811 814
812 if (type == GITS_BASER_TYPE_NONE) 815 if (type == GITS_BASER_TYPE_NONE)
813 continue; 816 continue;
814 817
815 /* We're lazy and only allocate a single page for now */ 818 /*
816 base = (void *)get_zeroed_page(GFP_KERNEL); 819 * Allocate as many entries as required to fit the
820 * range of device IDs that the ITS can grok... The ID
821 * space being incredibly sparse, this results in a
822 * massive waste of memory.
823 *
824 * For other tables, only allocate a single page.
825 */
826 if (type == GITS_BASER_TYPE_DEVICE) {
827 u64 typer = readq_relaxed(its->base + GITS_TYPER);
828 u32 ids = GITS_TYPER_DEVBITS(typer);
829
830 order = get_order((1UL << ids) * entry_size);
831 if (order >= MAX_ORDER) {
832 order = MAX_ORDER - 1;
833 pr_warn("%s: Device Table too large, reduce its page order to %u\n",
834 its->msi_chip.of_node->full_name, order);
835 }
836 }
837
838 alloc_size = (1 << order) * PAGE_SIZE;
839 base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
817 if (!base) { 840 if (!base) {
818 err = -ENOMEM; 841 err = -ENOMEM;
819 goto out_free; 842 goto out_free;
@@ -841,7 +864,7 @@ retry_baser:
841 break; 864 break;
842 } 865 }
843 866
844 val |= (PAGE_SIZE / psz) - 1; 867 val |= (alloc_size / psz) - 1;
845 868
846 writeq_relaxed(val, its->base + GITS_BASER + i * 8); 869 writeq_relaxed(val, its->base + GITS_BASER + i * 8);
847 tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 870 tmp = readq_relaxed(its->base + GITS_BASER + i * 8);
@@ -882,7 +905,7 @@ retry_baser:
882 } 905 }
883 906
884 pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 907 pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n",
885 (int)(PAGE_SIZE / entry_size), 908 (int)(alloc_size / entry_size),
886 its_base_type_string[type], 909 its_base_type_string[type],
887 (unsigned long)virt_to_phys(base), 910 (unsigned long)virt_to_phys(base),
888 psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 911 psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT);
@@ -1020,8 +1043,9 @@ static void its_cpu_init_collection(void)
1020static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 1043static struct its_device *its_find_device(struct its_node *its, u32 dev_id)
1021{ 1044{
1022 struct its_device *its_dev = NULL, *tmp; 1045 struct its_device *its_dev = NULL, *tmp;
1046 unsigned long flags;
1023 1047
1024 raw_spin_lock(&its->lock); 1048 raw_spin_lock_irqsave(&its->lock, flags);
1025 1049
1026 list_for_each_entry(tmp, &its->its_device_list, entry) { 1050 list_for_each_entry(tmp, &its->its_device_list, entry) {
1027 if (tmp->device_id == dev_id) { 1051 if (tmp->device_id == dev_id) {
@@ -1030,7 +1054,7 @@ static struct its_device *its_find_device(struct its_node *its, u32 dev_id)
1030 } 1054 }
1031 } 1055 }
1032 1056
1033 raw_spin_unlock(&its->lock); 1057 raw_spin_unlock_irqrestore(&its->lock, flags);
1034 1058
1035 return its_dev; 1059 return its_dev;
1036} 1060}
@@ -1040,6 +1064,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1040{ 1064{
1041 struct its_device *dev; 1065 struct its_device *dev;
1042 unsigned long *lpi_map; 1066 unsigned long *lpi_map;
1067 unsigned long flags;
1043 void *itt; 1068 void *itt;
1044 int lpi_base; 1069 int lpi_base;
1045 int nr_lpis; 1070 int nr_lpis;
@@ -1056,7 +1081,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1056 nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1081 nr_ites = max(2UL, roundup_pow_of_two(nvecs));
1057 sz = nr_ites * its->ite_size; 1082 sz = nr_ites * its->ite_size;
1058 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 1083 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
1059 itt = kmalloc(sz, GFP_KERNEL); 1084 itt = kzalloc(sz, GFP_KERNEL);
1060 lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1085 lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis);
1061 1086
1062 if (!dev || !itt || !lpi_map) { 1087 if (!dev || !itt || !lpi_map) {
@@ -1075,9 +1100,9 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1075 dev->device_id = dev_id; 1100 dev->device_id = dev_id;
1076 INIT_LIST_HEAD(&dev->entry); 1101 INIT_LIST_HEAD(&dev->entry);
1077 1102
1078 raw_spin_lock(&its->lock); 1103 raw_spin_lock_irqsave(&its->lock, flags);
1079 list_add(&dev->entry, &its->its_device_list); 1104 list_add(&dev->entry, &its->its_device_list);
1080 raw_spin_unlock(&its->lock); 1105 raw_spin_unlock_irqrestore(&its->lock, flags);
1081 1106
1082 /* Bind the device to the first possible CPU */ 1107 /* Bind the device to the first possible CPU */
1083 cpu = cpumask_first(cpu_online_mask); 1108 cpu = cpumask_first(cpu_online_mask);
@@ -1091,9 +1116,11 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1091 1116
1092static void its_free_device(struct its_device *its_dev) 1117static void its_free_device(struct its_device *its_dev)
1093{ 1118{
1094 raw_spin_lock(&its_dev->its->lock); 1119 unsigned long flags;
1120
1121 raw_spin_lock_irqsave(&its_dev->its->lock, flags);
1095 list_del(&its_dev->entry); 1122 list_del(&its_dev->entry);
1096 raw_spin_unlock(&its_dev->its->lock); 1123 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags);
1097 kfree(its_dev->itt); 1124 kfree(its_dev->itt);
1098 kfree(its_dev); 1125 kfree(its_dev);
1099} 1126}
@@ -1112,31 +1139,69 @@ static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq)
1112 return 0; 1139 return 0;
1113} 1140}
1114 1141
1142struct its_pci_alias {
1143 struct pci_dev *pdev;
1144 u32 dev_id;
1145 u32 count;
1146};
1147
1148static int its_pci_msi_vec_count(struct pci_dev *pdev)
1149{
1150 int msi, msix;
1151
1152 msi = max(pci_msi_vec_count(pdev), 0);
1153 msix = max(pci_msix_vec_count(pdev), 0);
1154
1155 return max(msi, msix);
1156}
1157
1158static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
1159{
1160 struct its_pci_alias *dev_alias = data;
1161
1162 dev_alias->dev_id = alias;
1163 if (pdev != dev_alias->pdev)
1164 dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev);
1165
1166 return 0;
1167}
1168
1115static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1169static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
1116 int nvec, msi_alloc_info_t *info) 1170 int nvec, msi_alloc_info_t *info)
1117{ 1171{
1118 struct pci_dev *pdev; 1172 struct pci_dev *pdev;
1119 struct its_node *its; 1173 struct its_node *its;
1120 u32 dev_id;
1121 struct its_device *its_dev; 1174 struct its_device *its_dev;
1175 struct its_pci_alias dev_alias;
1122 1176
1123 if (!dev_is_pci(dev)) 1177 if (!dev_is_pci(dev))
1124 return -EINVAL; 1178 return -EINVAL;
1125 1179
1126 pdev = to_pci_dev(dev); 1180 pdev = to_pci_dev(dev);
1127 dev_id = PCI_DEVID(pdev->bus->number, pdev->devfn); 1181 dev_alias.pdev = pdev;
1182 dev_alias.count = nvec;
1183
1184 pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias);
1128 its = domain->parent->host_data; 1185 its = domain->parent->host_data;
1129 1186
1130 its_dev = its_find_device(its, dev_id); 1187 its_dev = its_find_device(its, dev_alias.dev_id);
1131 if (WARN_ON(its_dev)) 1188 if (its_dev) {
1132 return -EINVAL; 1189 /*
1190 * We already have seen this ID, probably through
1191 * another alias (PCI bridge of some sort). No need to
1192 * create the device.
1193 */
1194 dev_dbg(dev, "Reusing ITT for devID %x\n", dev_alias.dev_id);
1195 goto out;
1196 }
1133 1197
1134 its_dev = its_create_device(its, dev_id, nvec); 1198 its_dev = its_create_device(its, dev_alias.dev_id, dev_alias.count);
1135 if (!its_dev) 1199 if (!its_dev)
1136 return -ENOMEM; 1200 return -ENOMEM;
1137 1201
1138 dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1202 dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n",
1139 1203 dev_alias.count, ilog2(dev_alias.count));
1204out:
1140 info->scratchpad[0].ptr = its_dev; 1205 info->scratchpad[0].ptr = its_dev;
1141 info->scratchpad[1].ptr = dev; 1206 info->scratchpad[1].ptr = dev;
1142 return 0; 1207 return 0;
@@ -1255,6 +1320,34 @@ static const struct irq_domain_ops its_domain_ops = {
1255 .deactivate = its_irq_domain_deactivate, 1320 .deactivate = its_irq_domain_deactivate,
1256}; 1321};
1257 1322
1323static int its_force_quiescent(void __iomem *base)
1324{
1325 u32 count = 1000000; /* 1s */
1326 u32 val;
1327
1328 val = readl_relaxed(base + GITS_CTLR);
1329 if (val & GITS_CTLR_QUIESCENT)
1330 return 0;
1331
1332 /* Disable the generation of all interrupts to this ITS */
1333 val &= ~GITS_CTLR_ENABLE;
1334 writel_relaxed(val, base + GITS_CTLR);
1335
1336 /* Poll GITS_CTLR and wait until ITS becomes quiescent */
1337 while (1) {
1338 val = readl_relaxed(base + GITS_CTLR);
1339 if (val & GITS_CTLR_QUIESCENT)
1340 return 0;
1341
1342 count--;
1343 if (!count)
1344 return -EBUSY;
1345
1346 cpu_relax();
1347 udelay(1);
1348 }
1349}
1350
1258static int its_probe(struct device_node *node, struct irq_domain *parent) 1351static int its_probe(struct device_node *node, struct irq_domain *parent)
1259{ 1352{
1260 struct resource res; 1353 struct resource res;
@@ -1283,6 +1376,13 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
1283 goto out_unmap; 1376 goto out_unmap;
1284 } 1377 }
1285 1378
1379 err = its_force_quiescent(its_base);
1380 if (err) {
1381 pr_warn("%s: failed to quiesce, giving up\n",
1382 node->full_name);
1383 goto out_unmap;
1384 }
1385
1286 pr_info("ITS: %s\n", node->full_name); 1386 pr_info("ITS: %s\n", node->full_name);
1287 1387
1288 its = kzalloc(sizeof(*its), GFP_KERNEL); 1388 its = kzalloc(sizeof(*its), GFP_KERNEL);
@@ -1323,7 +1423,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
1323 writeq_relaxed(baser, its->base + GITS_CBASER); 1423 writeq_relaxed(baser, its->base + GITS_CBASER);
1324 tmp = readq_relaxed(its->base + GITS_CBASER); 1424 tmp = readq_relaxed(its->base + GITS_CBASER);
1325 writeq_relaxed(0, its->base + GITS_CWRITER); 1425 writeq_relaxed(0, its->base + GITS_CWRITER);
1326 writel_relaxed(1, its->base + GITS_CTLR); 1426 writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
1327 1427
1328 if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) { 1428 if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) {
1329 pr_info("ITS: using cache flushing for cmd queue\n"); 1429 pr_info("ITS: using cache flushing for cmd queue\n");
@@ -1382,12 +1482,11 @@ static bool gic_rdists_supports_plpis(void)
1382 1482
1383int its_cpu_init(void) 1483int its_cpu_init(void)
1384{ 1484{
1385 if (!gic_rdists_supports_plpis()) {
1386 pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
1387 return -ENXIO;
1388 }
1389
1390 if (!list_empty(&its_nodes)) { 1485 if (!list_empty(&its_nodes)) {
1486 if (!gic_rdists_supports_plpis()) {
1487 pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
1488 return -ENXIO;
1489 }
1391 its_cpu_init_lpis(); 1490 its_cpu_init_lpis();
1392 its_cpu_init_collection(); 1491 its_cpu_init_collection();
1393 } 1492 }
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 1c6dea2fbc34..fd8850def1b8 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -466,7 +466,7 @@ static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,
466 tlist |= 1 << (mpidr & 0xf); 466 tlist |= 1 << (mpidr & 0xf);
467 467
468 cpu = cpumask_next(cpu, mask); 468 cpu = cpumask_next(cpu, mask);
469 if (cpu == nr_cpu_ids) 469 if (cpu >= nr_cpu_ids)
470 goto out; 470 goto out;
471 471
472 mpidr = cpu_logical_map(cpu); 472 mpidr = cpu_logical_map(cpu);
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 4634cf7d0ec3..471e1cdc1933 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -154,23 +154,25 @@ static inline unsigned int gic_irq(struct irq_data *d)
154static void gic_mask_irq(struct irq_data *d) 154static void gic_mask_irq(struct irq_data *d)
155{ 155{
156 u32 mask = 1 << (gic_irq(d) % 32); 156 u32 mask = 1 << (gic_irq(d) % 32);
157 unsigned long flags;
157 158
158 raw_spin_lock(&irq_controller_lock); 159 raw_spin_lock_irqsave(&irq_controller_lock, flags);
159 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); 160 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
160 if (gic_arch_extn.irq_mask) 161 if (gic_arch_extn.irq_mask)
161 gic_arch_extn.irq_mask(d); 162 gic_arch_extn.irq_mask(d);
162 raw_spin_unlock(&irq_controller_lock); 163 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
163} 164}
164 165
165static void gic_unmask_irq(struct irq_data *d) 166static void gic_unmask_irq(struct irq_data *d)
166{ 167{
167 u32 mask = 1 << (gic_irq(d) % 32); 168 u32 mask = 1 << (gic_irq(d) % 32);
169 unsigned long flags;
168 170
169 raw_spin_lock(&irq_controller_lock); 171 raw_spin_lock_irqsave(&irq_controller_lock, flags);
170 if (gic_arch_extn.irq_unmask) 172 if (gic_arch_extn.irq_unmask)
171 gic_arch_extn.irq_unmask(d); 173 gic_arch_extn.irq_unmask(d);
172 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4); 174 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
173 raw_spin_unlock(&irq_controller_lock); 175 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
174} 176}
175 177
176static void gic_eoi_irq(struct irq_data *d) 178static void gic_eoi_irq(struct irq_data *d)
@@ -188,6 +190,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
188{ 190{
189 void __iomem *base = gic_dist_base(d); 191 void __iomem *base = gic_dist_base(d);
190 unsigned int gicirq = gic_irq(d); 192 unsigned int gicirq = gic_irq(d);
193 unsigned long flags;
191 int ret; 194 int ret;
192 195
193 /* Interrupt configuration for SGIs can't be changed */ 196 /* Interrupt configuration for SGIs can't be changed */
@@ -199,14 +202,14 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
199 type != IRQ_TYPE_EDGE_RISING) 202 type != IRQ_TYPE_EDGE_RISING)
200 return -EINVAL; 203 return -EINVAL;
201 204
202 raw_spin_lock(&irq_controller_lock); 205 raw_spin_lock_irqsave(&irq_controller_lock, flags);
203 206
204 if (gic_arch_extn.irq_set_type) 207 if (gic_arch_extn.irq_set_type)
205 gic_arch_extn.irq_set_type(d, type); 208 gic_arch_extn.irq_set_type(d, type);
206 209
207 ret = gic_configure_irq(gicirq, type, base, NULL); 210 ret = gic_configure_irq(gicirq, type, base, NULL);
208 211
209 raw_spin_unlock(&irq_controller_lock); 212 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
210 213
211 return ret; 214 return ret;
212} 215}
@@ -227,6 +230,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
227 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); 230 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
228 unsigned int cpu, shift = (gic_irq(d) % 4) * 8; 231 unsigned int cpu, shift = (gic_irq(d) % 4) * 8;
229 u32 val, mask, bit; 232 u32 val, mask, bit;
233 unsigned long flags;
230 234
231 if (!force) 235 if (!force)
232 cpu = cpumask_any_and(mask_val, cpu_online_mask); 236 cpu = cpumask_any_and(mask_val, cpu_online_mask);
@@ -236,12 +240,12 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
236 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) 240 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
237 return -EINVAL; 241 return -EINVAL;
238 242
239 raw_spin_lock(&irq_controller_lock); 243 raw_spin_lock_irqsave(&irq_controller_lock, flags);
240 mask = 0xff << shift; 244 mask = 0xff << shift;
241 bit = gic_cpu_map[cpu] << shift; 245 bit = gic_cpu_map[cpu] << shift;
242 val = readl_relaxed(reg) & ~mask; 246 val = readl_relaxed(reg) & ~mask;
243 writel_relaxed(val | bit, reg); 247 writel_relaxed(val | bit, reg);
244 raw_spin_unlock(&irq_controller_lock); 248 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
245 249
246 return IRQ_SET_MASK_OK; 250 return IRQ_SET_MASK_OK;
247} 251}
diff --git a/drivers/macintosh/rack-meter.c b/drivers/macintosh/rack-meter.c
index 4192901cab40..048901a1111a 100644
--- a/drivers/macintosh/rack-meter.c
+++ b/drivers/macintosh/rack-meter.c
@@ -182,31 +182,31 @@ static void rackmeter_setup_dbdma(struct rackmeter *rm)
182 182
183 /* Prepare 4 dbdma commands for the 2 buffers */ 183 /* Prepare 4 dbdma commands for the 2 buffers */
184 memset(cmd, 0, 4 * sizeof(struct dbdma_cmd)); 184 memset(cmd, 0, 4 * sizeof(struct dbdma_cmd));
185 st_le16(&cmd->req_count, 4); 185 cmd->req_count = cpu_to_le16(4);
186 st_le16(&cmd->command, STORE_WORD | INTR_ALWAYS | KEY_SYSTEM); 186 cmd->command = cpu_to_le16(STORE_WORD | INTR_ALWAYS | KEY_SYSTEM);
187 st_le32(&cmd->phy_addr, rm->dma_buf_p + 187 cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
188 offsetof(struct rackmeter_dma, mark)); 188 offsetof(struct rackmeter_dma, mark));
189 st_le32(&cmd->cmd_dep, 0x02000000); 189 cmd->cmd_dep = cpu_to_le32(0x02000000);
190 cmd++; 190 cmd++;
191 191
192 st_le16(&cmd->req_count, SAMPLE_COUNT * 4); 192 cmd->req_count = cpu_to_le16(SAMPLE_COUNT * 4);
193 st_le16(&cmd->command, OUTPUT_MORE); 193 cmd->command = cpu_to_le16(OUTPUT_MORE);
194 st_le32(&cmd->phy_addr, rm->dma_buf_p + 194 cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
195 offsetof(struct rackmeter_dma, buf1)); 195 offsetof(struct rackmeter_dma, buf1));
196 cmd++; 196 cmd++;
197 197
198 st_le16(&cmd->req_count, 4); 198 cmd->req_count = cpu_to_le16(4);
199 st_le16(&cmd->command, STORE_WORD | INTR_ALWAYS | KEY_SYSTEM); 199 cmd->command = cpu_to_le16(STORE_WORD | INTR_ALWAYS | KEY_SYSTEM);
200 st_le32(&cmd->phy_addr, rm->dma_buf_p + 200 cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
201 offsetof(struct rackmeter_dma, mark)); 201 offsetof(struct rackmeter_dma, mark));
202 st_le32(&cmd->cmd_dep, 0x01000000); 202 cmd->cmd_dep = cpu_to_le32(0x01000000);
203 cmd++; 203 cmd++;
204 204
205 st_le16(&cmd->req_count, SAMPLE_COUNT * 4); 205 cmd->req_count = cpu_to_le16(SAMPLE_COUNT * 4);
206 st_le16(&cmd->command, OUTPUT_MORE | BR_ALWAYS); 206 cmd->command = cpu_to_le16(OUTPUT_MORE | BR_ALWAYS);
207 st_le32(&cmd->phy_addr, rm->dma_buf_p + 207 cmd->phy_addr = cpu_to_le32(rm->dma_buf_p +
208 offsetof(struct rackmeter_dma, buf2)); 208 offsetof(struct rackmeter_dma, buf2));
209 st_le32(&cmd->cmd_dep, rm->dma_buf_p); 209 cmd->cmd_dep = cpu_to_le32(rm->dma_buf_p);
210 210
211 rackmeter_do_pause(rm, 0); 211 rackmeter_do_pause(rm, 0);
212} 212}
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index 10ae69bcbbd2..d531f804455d 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -557,8 +557,7 @@ int __init smu_init (void)
557 return 0; 557 return 0;
558 558
559fail_msg_node: 559fail_msg_node:
560 if (smu->msg_node) 560 of_node_put(smu->msg_node);
561 of_node_put(smu->msg_node);
562fail_db_node: 561fail_db_node:
563 of_node_put(smu->db_node); 562 of_node_put(smu->db_node);
564fail_bootmem: 563fail_bootmem:
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index dee88e59f0d3..f9512bfa6c3c 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -329,10 +329,11 @@ int __init find_via_pmu(void)
329 gaddr = of_translate_address(gpiop, reg); 329 gaddr = of_translate_address(gpiop, reg);
330 if (gaddr != OF_BAD_ADDR) 330 if (gaddr != OF_BAD_ADDR)
331 gpio_reg = ioremap(gaddr, 0x10); 331 gpio_reg = ioremap(gaddr, 0x10);
332 of_node_put(gpiop);
332 } 333 }
333 if (gpio_reg == NULL) { 334 if (gpio_reg == NULL) {
334 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); 335 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
335 goto fail_gpio; 336 goto fail;
336 } 337 }
337 } else 338 } else
338 pmu_kind = PMU_UNKNOWN; 339 pmu_kind = PMU_UNKNOWN;
@@ -340,7 +341,7 @@ int __init find_via_pmu(void)
340 via = ioremap(taddr, 0x2000); 341 via = ioremap(taddr, 0x2000);
341 if (via == NULL) { 342 if (via == NULL) {
342 printk(KERN_ERR "via-pmu: Can't map address !\n"); 343 printk(KERN_ERR "via-pmu: Can't map address !\n");
343 goto fail; 344 goto fail_via_remap;
344 } 345 }
345 346
346 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ 347 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
@@ -348,10 +349,8 @@ int __init find_via_pmu(void)
348 349
349 pmu_state = idle; 350 pmu_state = idle;
350 351
351 if (!init_pmu()) { 352 if (!init_pmu())
352 via = NULL; 353 goto fail_init;
353 return 0;
354 }
355 354
356 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", 355 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
357 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); 356 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
@@ -359,11 +358,15 @@ int __init find_via_pmu(void)
359 sys_ctrler = SYS_CTRLER_PMU; 358 sys_ctrler = SYS_CTRLER_PMU;
360 359
361 return 1; 360 return 1;
362 fail: 361
363 of_node_put(vias); 362 fail_init:
363 iounmap(via);
364 via = NULL;
365 fail_via_remap:
364 iounmap(gpio_reg); 366 iounmap(gpio_reg);
365 gpio_reg = NULL; 367 gpio_reg = NULL;
366 fail_gpio: 368 fail:
369 of_node_put(vias);
367 vias = NULL; 370 vias = NULL;
368 return 0; 371 return 0;
369} 372}
@@ -2109,7 +2112,7 @@ pmu_read(struct file *file, char __user *buf,
2109 2112
2110 spin_lock_irqsave(&pp->lock, flags); 2113 spin_lock_irqsave(&pp->lock, flags);
2111 add_wait_queue(&pp->wait, &wait); 2114 add_wait_queue(&pp->wait, &wait);
2112 current->state = TASK_INTERRUPTIBLE; 2115 set_current_state(TASK_INTERRUPTIBLE);
2113 2116
2114 for (;;) { 2117 for (;;) {
2115 ret = -EAGAIN; 2118 ret = -EAGAIN;
@@ -2138,7 +2141,7 @@ pmu_read(struct file *file, char __user *buf,
2138 schedule(); 2141 schedule();
2139 spin_lock_irqsave(&pp->lock, flags); 2142 spin_lock_irqsave(&pp->lock, flags);
2140 } 2143 }
2141 current->state = TASK_RUNNING; 2144 __set_current_state(TASK_RUNNING);
2142 remove_wait_queue(&pp->wait, &wait); 2145 remove_wait_queue(&pp->wait, &wait);
2143 spin_unlock_irqrestore(&pp->lock, flags); 2146 spin_unlock_irqrestore(&pp->lock, flags);
2144 2147
diff --git a/drivers/media/pci/bt8xx/bt878.c b/drivers/media/pci/bt8xx/bt878.c
index 0939d399b774..8aa726651630 100644
--- a/drivers/media/pci/bt8xx/bt878.c
+++ b/drivers/media/pci/bt8xx/bt878.c
@@ -416,9 +416,6 @@ static int bt878_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
416 int result = 0; 416 int result = 0;
417 unsigned char lat; 417 unsigned char lat;
418 struct bt878 *bt; 418 struct bt878 *bt;
419#if defined(__powerpc__)
420 unsigned int cmd;
421#endif
422 unsigned int cardid; 419 unsigned int cardid;
423 420
424 printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n", 421 printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
@@ -461,15 +458,6 @@ static int bt878_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
461 printk("irq: %d, latency: %d, memory: 0x%lx\n", 458 printk("irq: %d, latency: %d, memory: 0x%lx\n",
462 bt->irq, lat, bt->bt878_adr); 459 bt->irq, lat, bt->bt878_adr);
463 460
464
465#if defined(__powerpc__)
466 /* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
467 /* response on cards with no firmware is not enabled by OF */
468 pci_read_config_dword(dev, PCI_COMMAND, &cmd);
469 cmd = (cmd | PCI_COMMAND_MEMORY);
470 pci_write_config_dword(dev, PCI_COMMAND, cmd);
471#endif
472
473#ifdef __sparc__ 461#ifdef __sparc__
474 bt->bt878_mem = (unsigned char *) bt->bt878_adr; 462 bt->bt878_mem = (unsigned char *) bt->bt878_adr;
475#else 463#else
diff --git a/drivers/media/pci/bt8xx/bt878.h b/drivers/media/pci/bt8xx/bt878.h
index d19b59299d78..49af240b5894 100644
--- a/drivers/media/pci/bt8xx/bt878.h
+++ b/drivers/media/pci/bt8xx/bt878.h
@@ -142,18 +142,7 @@ void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
142 u32 irq_err_ignore); 142 u32 irq_err_ignore);
143void bt878_stop(struct bt878 *bt); 143void bt878_stop(struct bt878 *bt);
144 144
145#if defined(__powerpc__) /* big-endian */
146static inline void io_st_le32(volatile unsigned __iomem *addr, unsigned val)
147{
148 st_le32(addr, val);
149 eieio();
150}
151
152#define bmtwrite(dat,adr) io_st_le32((adr),(dat))
153#define bmtread(adr) ld_le32((adr))
154#else
155#define bmtwrite(dat,adr) writel((dat), (adr)) 145#define bmtwrite(dat,adr) writel((dat), (adr))
156#define bmtread(adr) readl(adr) 146#define bmtread(adr) readl(adr)
157#endif
158 147
159#endif 148#endif
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index 5316d9b9e7b4..317d709f7550 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -281,7 +281,7 @@ static inline void buffer_swap32(u32 *buf, int len)
281 int i; 281 int i;
282 282
283 for (i = 0; i < ((len + 3) / 4); i++) { 283 for (i = 0; i < ((len + 3) / 4); i++) {
284 st_le32(buf, *buf); 284 *buf = swab32(*buf);
285 buf++; 285 buf++;
286 } 286 }
287} 287}
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 5b76a173cd95..5897d8d8fa5a 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -526,6 +526,7 @@ config MTD_NAND_SUNXI
526 526
527config MTD_NAND_HISI504 527config MTD_NAND_HISI504
528 tristate "Support for NAND controller on Hisilicon SoC Hip04" 528 tristate "Support for NAND controller on Hisilicon SoC Hip04"
529 depends on HAS_DMA
529 help 530 help
530 Enables support for NAND controller on Hisilicon SoC Hip04. 531 Enables support for NAND controller on Hisilicon SoC Hip04.
531 532
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 96b0b1d27df1..10b1f7a4fe50 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -480,6 +480,42 @@ static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)
480 nand_writel(info, NDCR, ndcr | int_mask); 480 nand_writel(info, NDCR, ndcr | int_mask);
481} 481}
482 482
483static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
484{
485 if (info->ecc_bch) {
486 int timeout;
487
488 /*
489 * According to the datasheet, when reading from NDDB
490 * with BCH enabled, after each 32 bytes reads, we
491 * have to make sure that the NDSR.RDDREQ bit is set.
492 *
493 * Drain the FIFO 8 32 bits reads at a time, and skip
494 * the polling on the last read.
495 */
496 while (len > 8) {
497 __raw_readsl(info->mmio_base + NDDB, data, 8);
498
499 for (timeout = 0;
500 !(nand_readl(info, NDSR) & NDSR_RDDREQ);
501 timeout++) {
502 if (timeout >= 5) {
503 dev_err(&info->pdev->dev,
504 "Timeout on RDDREQ while draining the FIFO\n");
505 return;
506 }
507
508 mdelay(1);
509 }
510
511 data += 32;
512 len -= 8;
513 }
514 }
515
516 __raw_readsl(info->mmio_base + NDDB, data, len);
517}
518
483static void handle_data_pio(struct pxa3xx_nand_info *info) 519static void handle_data_pio(struct pxa3xx_nand_info *info)
484{ 520{
485 unsigned int do_bytes = min(info->data_size, info->chunk_size); 521 unsigned int do_bytes = min(info->data_size, info->chunk_size);
@@ -496,14 +532,14 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
496 DIV_ROUND_UP(info->oob_size, 4)); 532 DIV_ROUND_UP(info->oob_size, 4));
497 break; 533 break;
498 case STATE_PIO_READING: 534 case STATE_PIO_READING:
499 __raw_readsl(info->mmio_base + NDDB, 535 drain_fifo(info,
500 info->data_buff + info->data_buff_pos, 536 info->data_buff + info->data_buff_pos,
501 DIV_ROUND_UP(do_bytes, 4)); 537 DIV_ROUND_UP(do_bytes, 4));
502 538
503 if (info->oob_size > 0) 539 if (info->oob_size > 0)
504 __raw_readsl(info->mmio_base + NDDB, 540 drain_fifo(info,
505 info->oob_buff + info->oob_buff_pos, 541 info->oob_buff + info->oob_buff_pos,
506 DIV_ROUND_UP(info->oob_size, 4)); 542 DIV_ROUND_UP(info->oob_size, 4));
507 break; 543 break;
508 default: 544 default:
509 dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, 545 dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
@@ -1572,6 +1608,8 @@ static int alloc_nand_resource(struct platform_device *pdev)
1572 int ret, irq, cs; 1608 int ret, irq, cs;
1573 1609
1574 pdata = dev_get_platdata(&pdev->dev); 1610 pdata = dev_get_platdata(&pdev->dev);
1611 if (pdata->num_cs <= 0)
1612 return -ENODEV;
1575 info = devm_kzalloc(&pdev->dev, sizeof(*info) + (sizeof(*mtd) + 1613 info = devm_kzalloc(&pdev->dev, sizeof(*info) + (sizeof(*mtd) +
1576 sizeof(*host)) * pdata->num_cs, GFP_KERNEL); 1614 sizeof(*host)) * pdata->num_cs, GFP_KERNEL);
1577 if (!info) 1615 if (!info)
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index 3c82e02e3dae..b0f69248cb71 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -579,6 +579,10 @@ struct sk_buff *alloc_can_skb(struct net_device *dev, struct can_frame **cf)
579 skb->pkt_type = PACKET_BROADCAST; 579 skb->pkt_type = PACKET_BROADCAST;
580 skb->ip_summed = CHECKSUM_UNNECESSARY; 580 skb->ip_summed = CHECKSUM_UNNECESSARY;
581 581
582 skb_reset_mac_header(skb);
583 skb_reset_network_header(skb);
584 skb_reset_transport_header(skb);
585
582 can_skb_reserve(skb); 586 can_skb_reserve(skb);
583 can_skb_prv(skb)->ifindex = dev->ifindex; 587 can_skb_prv(skb)->ifindex = dev->ifindex;
584 588
@@ -603,6 +607,10 @@ struct sk_buff *alloc_canfd_skb(struct net_device *dev,
603 skb->pkt_type = PACKET_BROADCAST; 607 skb->pkt_type = PACKET_BROADCAST;
604 skb->ip_summed = CHECKSUM_UNNECESSARY; 608 skb->ip_summed = CHECKSUM_UNNECESSARY;
605 609
610 skb_reset_mac_header(skb);
611 skb_reset_network_header(skb);
612 skb_reset_transport_header(skb);
613
606 can_skb_reserve(skb); 614 can_skb_reserve(skb);
607 can_skb_prv(skb)->ifindex = dev->ifindex; 615 can_skb_prv(skb)->ifindex = dev->ifindex;
608 616
diff --git a/drivers/net/can/usb/kvaser_usb.c b/drivers/net/can/usb/kvaser_usb.c
index 2928f7003041..a316fa4b91ab 100644
--- a/drivers/net/can/usb/kvaser_usb.c
+++ b/drivers/net/can/usb/kvaser_usb.c
@@ -14,6 +14,7 @@
14 * Copyright (C) 2015 Valeo S.A. 14 * Copyright (C) 2015 Valeo S.A.
15 */ 15 */
16 16
17#include <linux/kernel.h>
17#include <linux/completion.h> 18#include <linux/completion.h>
18#include <linux/module.h> 19#include <linux/module.h>
19#include <linux/netdevice.h> 20#include <linux/netdevice.h>
@@ -584,8 +585,15 @@ static int kvaser_usb_wait_msg(const struct kvaser_usb *dev, u8 id,
584 while (pos <= actual_len - MSG_HEADER_LEN) { 585 while (pos <= actual_len - MSG_HEADER_LEN) {
585 tmp = buf + pos; 586 tmp = buf + pos;
586 587
587 if (!tmp->len) 588 /* Handle messages crossing the USB endpoint max packet
588 break; 589 * size boundary. Check kvaser_usb_read_bulk_callback()
590 * for further details.
591 */
592 if (tmp->len == 0) {
593 pos = round_up(pos,
594 dev->bulk_in->wMaxPacketSize);
595 continue;
596 }
589 597
590 if (pos + tmp->len > actual_len) { 598 if (pos + tmp->len > actual_len) {
591 dev_err(dev->udev->dev.parent, 599 dev_err(dev->udev->dev.parent,
@@ -787,7 +795,6 @@ static int kvaser_usb_simple_msg_async(struct kvaser_usb_net_priv *priv,
787 netdev_err(netdev, "Error transmitting URB\n"); 795 netdev_err(netdev, "Error transmitting URB\n");
788 usb_unanchor_urb(urb); 796 usb_unanchor_urb(urb);
789 usb_free_urb(urb); 797 usb_free_urb(urb);
790 kfree(buf);
791 return err; 798 return err;
792 } 799 }
793 800
@@ -1317,8 +1324,19 @@ static void kvaser_usb_read_bulk_callback(struct urb *urb)
1317 while (pos <= urb->actual_length - MSG_HEADER_LEN) { 1324 while (pos <= urb->actual_length - MSG_HEADER_LEN) {
1318 msg = urb->transfer_buffer + pos; 1325 msg = urb->transfer_buffer + pos;
1319 1326
1320 if (!msg->len) 1327 /* The Kvaser firmware can only read and write messages that
1321 break; 1328 * does not cross the USB's endpoint wMaxPacketSize boundary.
1329 * If a follow-up command crosses such boundary, firmware puts
1330 * a placeholder zero-length command in its place then aligns
1331 * the real command to the next max packet size.
1332 *
1333 * Handle such cases or we're going to miss a significant
1334 * number of events in case of a heavy rx load on the bus.
1335 */
1336 if (msg->len == 0) {
1337 pos = round_up(pos, dev->bulk_in->wMaxPacketSize);
1338 continue;
1339 }
1322 1340
1323 if (pos + msg->len > urb->actual_length) { 1341 if (pos + msg->len > urb->actual_length) {
1324 dev_err(dev->udev->dev.parent, "Format error\n"); 1342 dev_err(dev->udev->dev.parent, "Format error\n");
@@ -1326,7 +1344,6 @@ static void kvaser_usb_read_bulk_callback(struct urb *urb)
1326 } 1344 }
1327 1345
1328 kvaser_usb_handle_message(dev, msg); 1346 kvaser_usb_handle_message(dev, msg);
1329
1330 pos += msg->len; 1347 pos += msg->len;
1331 } 1348 }
1332 1349
@@ -1615,8 +1632,7 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1615 struct urb *urb; 1632 struct urb *urb;
1616 void *buf; 1633 void *buf;
1617 struct kvaser_msg *msg; 1634 struct kvaser_msg *msg;
1618 int i, err; 1635 int i, err, ret = NETDEV_TX_OK;
1619 int ret = NETDEV_TX_OK;
1620 u8 *msg_tx_can_flags = NULL; /* GCC */ 1636 u8 *msg_tx_can_flags = NULL; /* GCC */
1621 1637
1622 if (can_dropped_invalid_skb(netdev, skb)) 1638 if (can_dropped_invalid_skb(netdev, skb))
@@ -1634,7 +1650,7 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1634 if (!buf) { 1650 if (!buf) {
1635 stats->tx_dropped++; 1651 stats->tx_dropped++;
1636 dev_kfree_skb(skb); 1652 dev_kfree_skb(skb);
1637 goto nobufmem; 1653 goto freeurb;
1638 } 1654 }
1639 1655
1640 msg = buf; 1656 msg = buf;
@@ -1681,8 +1697,10 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1681 /* This should never happen; it implies a flow control bug */ 1697 /* This should never happen; it implies a flow control bug */
1682 if (!context) { 1698 if (!context) {
1683 netdev_warn(netdev, "cannot find free context\n"); 1699 netdev_warn(netdev, "cannot find free context\n");
1700
1701 kfree(buf);
1684 ret = NETDEV_TX_BUSY; 1702 ret = NETDEV_TX_BUSY;
1685 goto releasebuf; 1703 goto freeurb;
1686 } 1704 }
1687 1705
1688 context->priv = priv; 1706 context->priv = priv;
@@ -1719,16 +1737,12 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1719 else 1737 else
1720 netdev_warn(netdev, "Failed tx_urb %d\n", err); 1738 netdev_warn(netdev, "Failed tx_urb %d\n", err);
1721 1739
1722 goto releasebuf; 1740 goto freeurb;
1723 } 1741 }
1724 1742
1725 usb_free_urb(urb); 1743 ret = NETDEV_TX_OK;
1726
1727 return NETDEV_TX_OK;
1728 1744
1729releasebuf: 1745freeurb:
1730 kfree(buf);
1731nobufmem:
1732 usb_free_urb(urb); 1746 usb_free_urb(urb);
1733 return ret; 1747 return ret;
1734} 1748}
diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
index 962c3f027383..0bac0f14edc3 100644
--- a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
+++ b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
@@ -879,6 +879,10 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)
879 879
880 pdev->usb_if = ppdev->usb_if; 880 pdev->usb_if = ppdev->usb_if;
881 pdev->cmd_buffer_addr = ppdev->cmd_buffer_addr; 881 pdev->cmd_buffer_addr = ppdev->cmd_buffer_addr;
882
883 /* do a copy of the ctrlmode[_supported] too */
884 dev->can.ctrlmode = ppdev->dev.can.ctrlmode;
885 dev->can.ctrlmode_supported = ppdev->dev.can.ctrlmode_supported;
882 } 886 }
883 887
884 pdev->usb_if->dev[dev->ctrl_idx] = dev; 888 pdev->usb_if->dev[dev->ctrl_idx] = dev;
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
index 869d97fcf781..b927021c6c40 100644
--- a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
+++ b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
@@ -593,7 +593,7 @@ static int xgene_enet_reset(struct xgene_enet_pdata *pdata)
593 if (!xgene_ring_mgr_init(pdata)) 593 if (!xgene_ring_mgr_init(pdata))
594 return -ENODEV; 594 return -ENODEV;
595 595
596 if (!efi_enabled(EFI_BOOT)) { 596 if (pdata->clk) {
597 clk_prepare_enable(pdata->clk); 597 clk_prepare_enable(pdata->clk);
598 clk_disable_unprepare(pdata->clk); 598 clk_disable_unprepare(pdata->clk);
599 clk_prepare_enable(pdata->clk); 599 clk_prepare_enable(pdata->clk);
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c
index 4de62b210c85..635a83be7e5e 100644
--- a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c
+++ b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c
@@ -1025,6 +1025,8 @@ static int xgene_enet_remove(struct platform_device *pdev)
1025#ifdef CONFIG_ACPI 1025#ifdef CONFIG_ACPI
1026static const struct acpi_device_id xgene_enet_acpi_match[] = { 1026static const struct acpi_device_id xgene_enet_acpi_match[] = {
1027 { "APMC0D05", }, 1027 { "APMC0D05", },
1028 { "APMC0D30", },
1029 { "APMC0D31", },
1028 { } 1030 { }
1029}; 1031};
1030MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match); 1032MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
@@ -1033,6 +1035,8 @@ MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
1033#ifdef CONFIG_OF 1035#ifdef CONFIG_OF
1034static struct of_device_id xgene_enet_of_match[] = { 1036static struct of_device_id xgene_enet_of_match[] = {
1035 {.compatible = "apm,xgene-enet",}, 1037 {.compatible = "apm,xgene-enet",},
1038 {.compatible = "apm,xgene1-sgenet",},
1039 {.compatible = "apm,xgene1-xgenet",},
1036 {}, 1040 {},
1037}; 1041};
1038 1042
diff --git a/drivers/net/ethernet/apple/bmac.c b/drivers/net/ethernet/apple/bmac.c
index daae0e016253..c0bd638f84af 100644
--- a/drivers/net/ethernet/apple/bmac.c
+++ b/drivers/net/ethernet/apple/bmac.c
@@ -483,8 +483,8 @@ static int bmac_suspend(struct macio_dev *mdev, pm_message_t state)
483 bmwrite(dev, TXCFG, (config & ~TxMACEnable)); 483 bmwrite(dev, TXCFG, (config & ~TxMACEnable));
484 bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */ 484 bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */
485 /* disable rx and tx dma */ 485 /* disable rx and tx dma */
486 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 486 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
487 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 487 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
488 /* free some skb's */ 488 /* free some skb's */
489 for (i=0; i<N_RX_RING; i++) { 489 for (i=0; i<N_RX_RING; i++) {
490 if (bp->rx_bufs[i] != NULL) { 490 if (bp->rx_bufs[i] != NULL) {
@@ -699,8 +699,8 @@ static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id)
699 699
700 while (1) { 700 while (1) {
701 cp = &bp->rx_cmds[i]; 701 cp = &bp->rx_cmds[i];
702 stat = ld_le16(&cp->xfer_status); 702 stat = le16_to_cpu(cp->xfer_status);
703 residual = ld_le16(&cp->res_count); 703 residual = le16_to_cpu(cp->res_count);
704 if ((stat & ACTIVE) == 0) 704 if ((stat & ACTIVE) == 0)
705 break; 705 break;
706 nb = RX_BUFLEN - residual - 2; 706 nb = RX_BUFLEN - residual - 2;
@@ -728,8 +728,8 @@ static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id)
728 skb_reserve(bp->rx_bufs[i], 2); 728 skb_reserve(bp->rx_bufs[i], 2);
729 } 729 }
730 bmac_construct_rxbuff(skb, &bp->rx_cmds[i]); 730 bmac_construct_rxbuff(skb, &bp->rx_cmds[i]);
731 st_le16(&cp->res_count, 0); 731 cp->res_count = cpu_to_le16(0);
732 st_le16(&cp->xfer_status, 0); 732 cp->xfer_status = cpu_to_le16(0);
733 last = i; 733 last = i;
734 if (++i >= N_RX_RING) i = 0; 734 if (++i >= N_RX_RING) i = 0;
735 } 735 }
@@ -769,7 +769,7 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)
769 769
770 while (1) { 770 while (1) {
771 cp = &bp->tx_cmds[bp->tx_empty]; 771 cp = &bp->tx_cmds[bp->tx_empty];
772 stat = ld_le16(&cp->xfer_status); 772 stat = le16_to_cpu(cp->xfer_status);
773 if (txintcount < 10) { 773 if (txintcount < 10) {
774 XXDEBUG(("bmac_txdma_xfer_stat=%#0x\n", stat)); 774 XXDEBUG(("bmac_txdma_xfer_stat=%#0x\n", stat));
775 } 775 }
@@ -1411,8 +1411,8 @@ static int bmac_close(struct net_device *dev)
1411 bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */ 1411 bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */
1412 1412
1413 /* disable rx and tx dma */ 1413 /* disable rx and tx dma */
1414 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 1414 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
1415 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ 1415 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
1416 1416
1417 /* free some skb's */ 1417 /* free some skb's */
1418 XXDEBUG(("bmac: free rx bufs\n")); 1418 XXDEBUG(("bmac: free rx bufs\n"));
@@ -1493,7 +1493,7 @@ static void bmac_tx_timeout(unsigned long data)
1493 1493
1494 cp = &bp->tx_cmds[bp->tx_empty]; 1494 cp = &bp->tx_cmds[bp->tx_empty];
1495/* XXDEBUG((KERN_DEBUG "bmac: tx dmastat=%x %x runt=%d pr=%x fs=%x fc=%x\n", */ 1495/* XXDEBUG((KERN_DEBUG "bmac: tx dmastat=%x %x runt=%d pr=%x fs=%x fc=%x\n", */
1496/* ld_le32(&td->status), ld_le16(&cp->xfer_status), bp->tx_bad_runt, */ 1496/* le32_to_cpu(td->status), le16_to_cpu(cp->xfer_status), bp->tx_bad_runt, */
1497/* mb->pr, mb->xmtfs, mb->fifofc)); */ 1497/* mb->pr, mb->xmtfs, mb->fifofc)); */
1498 1498
1499 /* turn off both tx and rx and reset the chip */ 1499 /* turn off both tx and rx and reset the chip */
@@ -1506,7 +1506,7 @@ static void bmac_tx_timeout(unsigned long data)
1506 bmac_enable_and_reset_chip(dev); 1506 bmac_enable_and_reset_chip(dev);
1507 1507
1508 /* restart rx dma */ 1508 /* restart rx dma */
1509 cp = bus_to_virt(ld_le32(&rd->cmdptr)); 1509 cp = bus_to_virt(le32_to_cpu(rd->cmdptr));
1510 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); 1510 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
1511 out_le16(&cp->xfer_status, 0); 1511 out_le16(&cp->xfer_status, 0);
1512 out_le32(&rd->cmdptr, virt_to_bus(cp)); 1512 out_le32(&rd->cmdptr, virt_to_bus(cp));
@@ -1553,10 +1553,10 @@ static void dump_dbdma(volatile struct dbdma_cmd *cp,int count)
1553 ip = (int*)(cp+i); 1553 ip = (int*)(cp+i);
1554 1554
1555 printk("dbdma req 0x%x addr 0x%x baddr 0x%x xfer/res 0x%x\n", 1555 printk("dbdma req 0x%x addr 0x%x baddr 0x%x xfer/res 0x%x\n",
1556 ld_le32(ip+0), 1556 le32_to_cpup(ip+0),
1557 ld_le32(ip+1), 1557 le32_to_cpup(ip+1),
1558 ld_le32(ip+2), 1558 le32_to_cpup(ip+2),
1559 ld_le32(ip+3)); 1559 le32_to_cpup(ip+3));
1560 } 1560 }
1561 1561
1562} 1562}
diff --git a/drivers/net/ethernet/apple/mace.c b/drivers/net/ethernet/apple/mace.c
index 842fe7684904..73afe49624f2 100644
--- a/drivers/net/ethernet/apple/mace.c
+++ b/drivers/net/ethernet/apple/mace.c
@@ -310,7 +310,7 @@ static void dbdma_reset(volatile struct dbdma_regs __iomem *dma)
310 * way on some machines. 310 * way on some machines.
311 */ 311 */
312 for (i = 200; i > 0; --i) 312 for (i = 200; i > 0; --i)
313 if (ld_le32(&dma->control) & RUN) 313 if (le32_to_cpu(dma->control) & RUN)
314 udelay(1); 314 udelay(1);
315} 315}
316 316
@@ -452,21 +452,21 @@ static int mace_open(struct net_device *dev)
452 data = skb->data; 452 data = skb->data;
453 } 453 }
454 mp->rx_bufs[i] = skb; 454 mp->rx_bufs[i] = skb;
455 st_le16(&cp->req_count, RX_BUFLEN); 455 cp->req_count = cpu_to_le16(RX_BUFLEN);
456 st_le16(&cp->command, INPUT_LAST + INTR_ALWAYS); 456 cp->command = cpu_to_le16(INPUT_LAST + INTR_ALWAYS);
457 st_le32(&cp->phy_addr, virt_to_bus(data)); 457 cp->phy_addr = cpu_to_le32(virt_to_bus(data));
458 cp->xfer_status = 0; 458 cp->xfer_status = 0;
459 ++cp; 459 ++cp;
460 } 460 }
461 mp->rx_bufs[i] = NULL; 461 mp->rx_bufs[i] = NULL;
462 st_le16(&cp->command, DBDMA_STOP); 462 cp->command = cpu_to_le16(DBDMA_STOP);
463 mp->rx_fill = i; 463 mp->rx_fill = i;
464 mp->rx_empty = 0; 464 mp->rx_empty = 0;
465 465
466 /* Put a branch back to the beginning of the receive command list */ 466 /* Put a branch back to the beginning of the receive command list */
467 ++cp; 467 ++cp;
468 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS); 468 cp->command = cpu_to_le16(DBDMA_NOP + BR_ALWAYS);
469 st_le32(&cp->cmd_dep, virt_to_bus(mp->rx_cmds)); 469 cp->cmd_dep = cpu_to_le32(virt_to_bus(mp->rx_cmds));
470 470
471 /* start rx dma */ 471 /* start rx dma */
472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ 472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
@@ -475,8 +475,8 @@ static int mace_open(struct net_device *dev)
475 475
476 /* put a branch at the end of the tx command list */ 476 /* put a branch at the end of the tx command list */
477 cp = mp->tx_cmds + NCMDS_TX * N_TX_RING; 477 cp = mp->tx_cmds + NCMDS_TX * N_TX_RING;
478 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS); 478 cp->command = cpu_to_le16(DBDMA_NOP + BR_ALWAYS);
479 st_le32(&cp->cmd_dep, virt_to_bus(mp->tx_cmds)); 479 cp->cmd_dep = cpu_to_le32(virt_to_bus(mp->tx_cmds));
480 480
481 /* reset tx dma */ 481 /* reset tx dma */
482 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); 482 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
@@ -507,8 +507,8 @@ static int mace_close(struct net_device *dev)
507 out_8(&mb->imr, 0xff); /* disable all intrs */ 507 out_8(&mb->imr, 0xff); /* disable all intrs */
508 508
509 /* disable rx and tx dma */ 509 /* disable rx and tx dma */
510 st_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ 510 rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
511 st_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ 511 td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
512 512
513 mace_clean_rings(mp); 513 mace_clean_rings(mp);
514 514
@@ -558,8 +558,8 @@ static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)
558 } 558 }
559 mp->tx_bufs[fill] = skb; 559 mp->tx_bufs[fill] = skb;
560 cp = mp->tx_cmds + NCMDS_TX * fill; 560 cp = mp->tx_cmds + NCMDS_TX * fill;
561 st_le16(&cp->req_count, len); 561 cp->req_count = cpu_to_le16(len);
562 st_le32(&cp->phy_addr, virt_to_bus(skb->data)); 562 cp->phy_addr = cpu_to_le32(virt_to_bus(skb->data));
563 563
564 np = mp->tx_cmds + NCMDS_TX * next; 564 np = mp->tx_cmds + NCMDS_TX * next;
565 out_le16(&np->command, DBDMA_STOP); 565 out_le16(&np->command, DBDMA_STOP);
@@ -691,7 +691,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)
691 out_8(&mb->xmtfc, AUTO_PAD_XMIT); 691 out_8(&mb->xmtfc, AUTO_PAD_XMIT);
692 continue; 692 continue;
693 } 693 }
694 dstat = ld_le32(&td->status); 694 dstat = le32_to_cpu(td->status);
695 /* stop DMA controller */ 695 /* stop DMA controller */
696 out_le32(&td->control, RUN << 16); 696 out_le32(&td->control, RUN << 16);
697 /* 697 /*
@@ -724,7 +724,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)
724 */ 724 */
725 } 725 }
726 cp = mp->tx_cmds + NCMDS_TX * i; 726 cp = mp->tx_cmds + NCMDS_TX * i;
727 stat = ld_le16(&cp->xfer_status); 727 stat = le16_to_cpu(cp->xfer_status);
728 if ((fs & (UFLO|LCOL|LCAR|RTRY)) || (dstat & DEAD) || xcount == 0) { 728 if ((fs & (UFLO|LCOL|LCAR|RTRY)) || (dstat & DEAD) || xcount == 0) {
729 /* 729 /*
730 * Check whether there were in fact 2 bytes written to 730 * Check whether there were in fact 2 bytes written to
@@ -830,7 +830,7 @@ static void mace_tx_timeout(unsigned long data)
830 mace_reset(dev); 830 mace_reset(dev);
831 831
832 /* restart rx dma */ 832 /* restart rx dma */
833 cp = bus_to_virt(ld_le32(&rd->cmdptr)); 833 cp = bus_to_virt(le32_to_cpu(rd->cmdptr));
834 dbdma_reset(rd); 834 dbdma_reset(rd);
835 out_le16(&cp->xfer_status, 0); 835 out_le16(&cp->xfer_status, 0);
836 out_le32(&rd->cmdptr, virt_to_bus(cp)); 836 out_le32(&rd->cmdptr, virt_to_bus(cp));
@@ -889,20 +889,20 @@ static irqreturn_t mace_rxdma_intr(int irq, void *dev_id)
889 spin_lock_irqsave(&mp->lock, flags); 889 spin_lock_irqsave(&mp->lock, flags);
890 for (i = mp->rx_empty; i != mp->rx_fill; ) { 890 for (i = mp->rx_empty; i != mp->rx_fill; ) {
891 cp = mp->rx_cmds + i; 891 cp = mp->rx_cmds + i;
892 stat = ld_le16(&cp->xfer_status); 892 stat = le16_to_cpu(cp->xfer_status);
893 if ((stat & ACTIVE) == 0) { 893 if ((stat & ACTIVE) == 0) {
894 next = i + 1; 894 next = i + 1;
895 if (next >= N_RX_RING) 895 if (next >= N_RX_RING)
896 next = 0; 896 next = 0;
897 np = mp->rx_cmds + next; 897 np = mp->rx_cmds + next;
898 if (next != mp->rx_fill && 898 if (next != mp->rx_fill &&
899 (ld_le16(&np->xfer_status) & ACTIVE) != 0) { 899 (le16_to_cpu(np->xfer_status) & ACTIVE) != 0) {
900 printk(KERN_DEBUG "mace: lost a status word\n"); 900 printk(KERN_DEBUG "mace: lost a status word\n");
901 ++mace_lost_status; 901 ++mace_lost_status;
902 } else 902 } else
903 break; 903 break;
904 } 904 }
905 nb = ld_le16(&cp->req_count) - ld_le16(&cp->res_count); 905 nb = le16_to_cpu(cp->req_count) - le16_to_cpu(cp->res_count);
906 out_le16(&cp->command, DBDMA_STOP); 906 out_le16(&cp->command, DBDMA_STOP);
907 /* got a packet, have a look at it */ 907 /* got a packet, have a look at it */
908 skb = mp->rx_bufs[i]; 908 skb = mp->rx_bufs[i];
@@ -962,13 +962,13 @@ static irqreturn_t mace_rxdma_intr(int irq, void *dev_id)
962 mp->rx_bufs[i] = skb; 962 mp->rx_bufs[i] = skb;
963 } 963 }
964 } 964 }
965 st_le16(&cp->req_count, RX_BUFLEN); 965 cp->req_count = cpu_to_le16(RX_BUFLEN);
966 data = skb? skb->data: dummy_buf; 966 data = skb? skb->data: dummy_buf;
967 st_le32(&cp->phy_addr, virt_to_bus(data)); 967 cp->phy_addr = cpu_to_le32(virt_to_bus(data));
968 out_le16(&cp->xfer_status, 0); 968 out_le16(&cp->xfer_status, 0);
969 out_le16(&cp->command, INPUT_LAST + INTR_ALWAYS); 969 out_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
970#if 0 970#if 0
971 if ((ld_le32(&rd->status) & ACTIVE) != 0) { 971 if ((le32_to_cpu(rd->status) & ACTIVE) != 0) {
972 out_le32(&rd->control, (PAUSE << 16) | PAUSE); 972 out_le32(&rd->control, (PAUSE << 16) | PAUSE);
973 while ((in_le32(&rd->status) & ACTIVE) != 0) 973 while ((in_le32(&rd->status) & ACTIVE) != 0)
974 ; 974 ;
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index 21206d33b638..a7f2cc3e485e 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -486,7 +486,7 @@ static int bcm_enet_poll(struct napi_struct *napi, int budget)
486{ 486{
487 struct bcm_enet_priv *priv; 487 struct bcm_enet_priv *priv;
488 struct net_device *dev; 488 struct net_device *dev;
489 int tx_work_done, rx_work_done; 489 int rx_work_done;
490 490
491 priv = container_of(napi, struct bcm_enet_priv, napi); 491 priv = container_of(napi, struct bcm_enet_priv, napi);
492 dev = priv->net_dev; 492 dev = priv->net_dev;
@@ -498,14 +498,14 @@ static int bcm_enet_poll(struct napi_struct *napi, int budget)
498 ENETDMAC_IR, priv->tx_chan); 498 ENETDMAC_IR, priv->tx_chan);
499 499
500 /* reclaim sent skb */ 500 /* reclaim sent skb */
501 tx_work_done = bcm_enet_tx_reclaim(dev, 0); 501 bcm_enet_tx_reclaim(dev, 0);
502 502
503 spin_lock(&priv->rx_lock); 503 spin_lock(&priv->rx_lock);
504 rx_work_done = bcm_enet_receive_queue(dev, budget); 504 rx_work_done = bcm_enet_receive_queue(dev, budget);
505 spin_unlock(&priv->rx_lock); 505 spin_unlock(&priv->rx_lock);
506 506
507 if (rx_work_done >= budget || tx_work_done > 0) { 507 if (rx_work_done >= budget) {
508 /* rx/tx queue is not yet empty/clean */ 508 /* rx queue is not yet empty/clean */
509 return rx_work_done; 509 return rx_work_done;
510 } 510 }
511 511
diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index 676ffe093180..0469f72c6e7e 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -302,9 +302,6 @@ static int bgmac_dma_rx_skb_for_slot(struct bgmac *bgmac,
302 slot->skb = skb; 302 slot->skb = skb;
303 slot->dma_addr = dma_addr; 303 slot->dma_addr = dma_addr;
304 304
305 if (slot->dma_addr & 0xC0000000)
306 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
307
308 return 0; 305 return 0;
309} 306}
310 307
@@ -505,8 +502,6 @@ static int bgmac_dma_alloc(struct bgmac *bgmac)
505 ring->mmio_base); 502 ring->mmio_base);
506 goto err_dma_free; 503 goto err_dma_free;
507 } 504 }
508 if (ring->dma_base & 0xC0000000)
509 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
510 505
511 ring->unaligned = bgmac_dma_unaligned(bgmac, ring, 506 ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
512 BGMAC_DMA_RING_TX); 507 BGMAC_DMA_RING_TX);
@@ -536,8 +531,6 @@ static int bgmac_dma_alloc(struct bgmac *bgmac)
536 err = -ENOMEM; 531 err = -ENOMEM;
537 goto err_dma_free; 532 goto err_dma_free;
538 } 533 }
539 if (ring->dma_base & 0xC0000000)
540 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
541 534
542 ring->unaligned = bgmac_dma_unaligned(bgmac, ring, 535 ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
543 BGMAC_DMA_RING_RX); 536 BGMAC_DMA_RING_RX);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 7155e1d2c208..bef750a09027 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -12722,6 +12722,9 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev,
12722 pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, 12722 pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS,
12723 PCICFG_VENDOR_ID_OFFSET); 12723 PCICFG_VENDOR_ID_OFFSET);
12724 12724
12725 /* Set PCIe reset type to fundamental for EEH recovery */
12726 pdev->needs_freset = 1;
12727
12725 /* AER (Advanced Error reporting) configuration */ 12728 /* AER (Advanced Error reporting) configuration */
12726 rc = pci_enable_pcie_error_reporting(pdev); 12729 rc = pci_enable_pcie_error_reporting(pdev);
12727 if (!rc) 12730 if (!rc)
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
index 149a0d70c108..b97122926d3a 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
@@ -73,15 +73,17 @@ int bcmgenet_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
73 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_MAGICSECURE)) 73 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_MAGICSECURE))
74 return -EINVAL; 74 return -EINVAL;
75 75
76 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
76 if (wol->wolopts & WAKE_MAGICSECURE) { 77 if (wol->wolopts & WAKE_MAGICSECURE) {
77 bcmgenet_umac_writel(priv, get_unaligned_be16(&wol->sopass[0]), 78 bcmgenet_umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
78 UMAC_MPD_PW_MS); 79 UMAC_MPD_PW_MS);
79 bcmgenet_umac_writel(priv, get_unaligned_be32(&wol->sopass[2]), 80 bcmgenet_umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
80 UMAC_MPD_PW_LS); 81 UMAC_MPD_PW_LS);
81 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
82 reg |= MPD_PW_EN; 82 reg |= MPD_PW_EN;
83 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL); 83 } else {
84 reg &= ~MPD_PW_EN;
84 } 85 }
86 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);
85 87
86 /* Flag the device and relevant IRQ as wakeup capable */ 88 /* Flag the device and relevant IRQ as wakeup capable */
87 if (wol->wolopts) { 89 if (wol->wolopts) {
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index ad76b8e35a00..81d41539fcba 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2113,17 +2113,17 @@ static const struct net_device_ops macb_netdev_ops = {
2113}; 2113};
2114 2114
2115#if defined(CONFIG_OF) 2115#if defined(CONFIG_OF)
2116static struct macb_config pc302gem_config = { 2116static const struct macb_config pc302gem_config = {
2117 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, 2117 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
2118 .dma_burst_length = 16, 2118 .dma_burst_length = 16,
2119}; 2119};
2120 2120
2121static struct macb_config sama5d3_config = { 2121static const struct macb_config sama5d3_config = {
2122 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, 2122 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
2123 .dma_burst_length = 16, 2123 .dma_burst_length = 16,
2124}; 2124};
2125 2125
2126static struct macb_config sama5d4_config = { 2126static const struct macb_config sama5d4_config = {
2127 .caps = 0, 2127 .caps = 0,
2128 .dma_burst_length = 4, 2128 .dma_burst_length = 4,
2129}; 2129};
@@ -2154,7 +2154,7 @@ static void macb_configure_caps(struct macb *bp)
2154 if (bp->pdev->dev.of_node) { 2154 if (bp->pdev->dev.of_node) {
2155 match = of_match_node(macb_dt_ids, bp->pdev->dev.of_node); 2155 match = of_match_node(macb_dt_ids, bp->pdev->dev.of_node);
2156 if (match && match->data) { 2156 if (match && match->data) {
2157 config = (const struct macb_config *)match->data; 2157 config = match->data;
2158 2158
2159 bp->caps = config->caps; 2159 bp->caps = config->caps;
2160 /* 2160 /*
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 31dc080f2437..ff85619a9732 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -351,7 +351,7 @@
351 351
352/* Bitfields in MID */ 352/* Bitfields in MID */
353#define MACB_IDNUM_OFFSET 16 353#define MACB_IDNUM_OFFSET 16
354#define MACB_IDNUM_SIZE 16 354#define MACB_IDNUM_SIZE 12
355#define MACB_REV_OFFSET 0 355#define MACB_REV_OFFSET 0
356#define MACB_REV_SIZE 16 356#define MACB_REV_SIZE 16
357 357
diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index 9bb6220663b2..99492b7e3713 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -1597,7 +1597,7 @@ fec_enet_interrupt(int irq, void *dev_id)
1597 writel(int_events, fep->hwp + FEC_IEVENT); 1597 writel(int_events, fep->hwp + FEC_IEVENT);
1598 fec_enet_collect_events(fep, int_events); 1598 fec_enet_collect_events(fep, int_events);
1599 1599
1600 if (fep->work_tx || fep->work_rx) { 1600 if ((fep->work_tx || fep->work_rx) && fep->link) {
1601 ret = IRQ_HANDLED; 1601 ret = IRQ_HANDLED;
1602 1602
1603 if (napi_schedule_prep(&fep->napi)) { 1603 if (napi_schedule_prep(&fep->napi)) {
@@ -3383,7 +3383,6 @@ fec_drv_remove(struct platform_device *pdev)
3383 regulator_disable(fep->reg_phy); 3383 regulator_disable(fep->reg_phy);
3384 if (fep->ptp_clock) 3384 if (fep->ptp_clock)
3385 ptp_clock_unregister(fep->ptp_clock); 3385 ptp_clock_unregister(fep->ptp_clock);
3386 fec_enet_clk_enable(ndev, false);
3387 of_node_put(fep->phy_node); 3386 of_node_put(fep->phy_node);
3388 free_netdev(ndev); 3387 free_netdev(ndev);
3389 3388
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 178e54028d10..7bf3682cdf47 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -747,6 +747,18 @@ static int gfar_parse_group(struct device_node *np,
747 return 0; 747 return 0;
748} 748}
749 749
750static int gfar_of_group_count(struct device_node *np)
751{
752 struct device_node *child;
753 int num = 0;
754
755 for_each_available_child_of_node(np, child)
756 if (!of_node_cmp(child->name, "queue-group"))
757 num++;
758
759 return num;
760}
761
750static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) 762static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
751{ 763{
752 const char *model; 764 const char *model;
@@ -784,7 +796,7 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
784 num_rx_qs = 1; 796 num_rx_qs = 1;
785 } else { /* MQ_MG_MODE */ 797 } else { /* MQ_MG_MODE */
786 /* get the actual number of supported groups */ 798 /* get the actual number of supported groups */
787 unsigned int num_grps = of_get_available_child_count(np); 799 unsigned int num_grps = gfar_of_group_count(np);
788 800
789 if (num_grps == 0 || num_grps > MAXGROUPS) { 801 if (num_grps == 0 || num_grps > MAXGROUPS) {
790 dev_err(&ofdev->dev, "Invalid # of int groups(%d)\n", 802 dev_err(&ofdev->dev, "Invalid # of int groups(%d)\n",
@@ -851,7 +863,10 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
851 863
852 /* Parse and initialize group specific information */ 864 /* Parse and initialize group specific information */
853 if (priv->mode == MQ_MG_MODE) { 865 if (priv->mode == MQ_MG_MODE) {
854 for_each_child_of_node(np, child) { 866 for_each_available_child_of_node(np, child) {
867 if (of_node_cmp(child->name, "queue-group"))
868 continue;
869
855 err = gfar_parse_group(child, priv, model); 870 err = gfar_parse_group(child, priv, model);
856 if (err) 871 if (err)
857 goto err_grp_init; 872 goto err_grp_init;
diff --git a/drivers/net/ethernet/ibm/emac/core.c b/drivers/net/ethernet/ibm/emac/core.c
index 162762d1a12c..220bae6f5e43 100644
--- a/drivers/net/ethernet/ibm/emac/core.c
+++ b/drivers/net/ethernet/ibm/emac/core.c
@@ -79,13 +79,6 @@ MODULE_AUTHOR
79 ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>"); 79 ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>");
80MODULE_LICENSE("GPL"); 80MODULE_LICENSE("GPL");
81 81
82/*
83 * PPC64 doesn't (yet) have a cacheable_memcpy
84 */
85#ifdef CONFIG_PPC64
86#define cacheable_memcpy(d,s,n) memcpy((d),(s),(n))
87#endif
88
89/* minimum number of free TX descriptors required to wake up TX process */ 82/* minimum number of free TX descriptors required to wake up TX process */
90#define EMAC_TX_WAKEUP_THRESH (NUM_TX_BUFF / 4) 83#define EMAC_TX_WAKEUP_THRESH (NUM_TX_BUFF / 4)
91 84
@@ -1673,7 +1666,7 @@ static inline int emac_rx_sg_append(struct emac_instance *dev, int slot)
1673 dev_kfree_skb(dev->rx_sg_skb); 1666 dev_kfree_skb(dev->rx_sg_skb);
1674 dev->rx_sg_skb = NULL; 1667 dev->rx_sg_skb = NULL;
1675 } else { 1668 } else {
1676 cacheable_memcpy(skb_tail_pointer(dev->rx_sg_skb), 1669 memcpy(skb_tail_pointer(dev->rx_sg_skb),
1677 dev->rx_skb[slot]->data, len); 1670 dev->rx_skb[slot]->data, len);
1678 skb_put(dev->rx_sg_skb, len); 1671 skb_put(dev->rx_sg_skb, len);
1679 emac_recycle_rx_skb(dev, slot, len); 1672 emac_recycle_rx_skb(dev, slot, len);
@@ -1730,8 +1723,7 @@ static int emac_poll_rx(void *param, int budget)
1730 goto oom; 1723 goto oom;
1731 1724
1732 skb_reserve(copy_skb, EMAC_RX_SKB_HEADROOM + 2); 1725 skb_reserve(copy_skb, EMAC_RX_SKB_HEADROOM + 2);
1733 cacheable_memcpy(copy_skb->data - 2, skb->data - 2, 1726 memcpy(copy_skb->data - 2, skb->data - 2, len + 2);
1734 len + 2);
1735 emac_recycle_rx_skb(dev, slot, len); 1727 emac_recycle_rx_skb(dev, slot, len);
1736 skb = copy_skb; 1728 skb = copy_skb;
1737 } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) 1729 } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC)))
diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c
index 209ee1b27f8d..5d093dc0f5f5 100644
--- a/drivers/net/ethernet/smsc/smc91x.c
+++ b/drivers/net/ethernet/smsc/smc91x.c
@@ -92,6 +92,7 @@ static const char version[] =
92#include "smc91x.h" 92#include "smc91x.h"
93 93
94#if defined(CONFIG_ASSABET_NEPONSET) 94#if defined(CONFIG_ASSABET_NEPONSET)
95#include <mach/assabet.h>
95#include <mach/neponset.h> 96#include <mach/neponset.h>
96#endif 97#endif
97 98
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index fb846ebba1d9..f9b42f11950f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -272,6 +272,37 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
272 struct stmmac_priv *priv = NULL; 272 struct stmmac_priv *priv = NULL;
273 struct plat_stmmacenet_data *plat_dat = NULL; 273 struct plat_stmmacenet_data *plat_dat = NULL;
274 const char *mac = NULL; 274 const char *mac = NULL;
275 int irq, wol_irq, lpi_irq;
276
277 /* Get IRQ information early to have an ability to ask for deferred
278 * probe if needed before we went too far with resource allocation.
279 */
280 irq = platform_get_irq_byname(pdev, "macirq");
281 if (irq < 0) {
282 if (irq != -EPROBE_DEFER) {
283 dev_err(dev,
284 "MAC IRQ configuration information not found\n");
285 }
286 return irq;
287 }
288
289 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
290 * The external wake up irq can be passed through the platform code
291 * named as "eth_wake_irq"
292 *
293 * In case the wake up interrupt is not passed from the platform
294 * so the driver will continue to use the mac irq (ndev->irq)
295 */
296 wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
297 if (wol_irq < 0) {
298 if (wol_irq == -EPROBE_DEFER)
299 return -EPROBE_DEFER;
300 wol_irq = irq;
301 }
302
303 lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
304 if (lpi_irq == -EPROBE_DEFER)
305 return -EPROBE_DEFER;
275 306
276 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 307 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
277 addr = devm_ioremap_resource(dev, res); 308 addr = devm_ioremap_resource(dev, res);
@@ -323,39 +354,15 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
323 return PTR_ERR(priv); 354 return PTR_ERR(priv);
324 } 355 }
325 356
357 /* Copy IRQ values to priv structure which is now avaialble */
358 priv->dev->irq = irq;
359 priv->wol_irq = wol_irq;
360 priv->lpi_irq = lpi_irq;
361
326 /* Get MAC address if available (DT) */ 362 /* Get MAC address if available (DT) */
327 if (mac) 363 if (mac)
328 memcpy(priv->dev->dev_addr, mac, ETH_ALEN); 364 memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
329 365
330 /* Get the MAC information */
331 priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
332 if (priv->dev->irq < 0) {
333 if (priv->dev->irq != -EPROBE_DEFER) {
334 netdev_err(priv->dev,
335 "MAC IRQ configuration information not found\n");
336 }
337 return priv->dev->irq;
338 }
339
340 /*
341 * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
342 * The external wake up irq can be passed through the platform code
343 * named as "eth_wake_irq"
344 *
345 * In case the wake up interrupt is not passed from the platform
346 * so the driver will continue to use the mac irq (ndev->irq)
347 */
348 priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
349 if (priv->wol_irq < 0) {
350 if (priv->wol_irq == -EPROBE_DEFER)
351 return -EPROBE_DEFER;
352 priv->wol_irq = priv->dev->irq;
353 }
354
355 priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
356 if (priv->lpi_irq == -EPROBE_DEFER)
357 return -EPROBE_DEFER;
358
359 platform_set_drvdata(pdev, priv->dev); 366 platform_set_drvdata(pdev, priv->dev);
360 367
361 pr_debug("STMMAC platform driver registration completed"); 368 pr_debug("STMMAC platform driver registration completed");
diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index f1ee71e22241..7d394846afc2 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -1730,11 +1730,11 @@ static int team_set_mac_address(struct net_device *dev, void *p)
1730 if (dev->type == ARPHRD_ETHER && !is_valid_ether_addr(addr->sa_data)) 1730 if (dev->type == ARPHRD_ETHER && !is_valid_ether_addr(addr->sa_data))
1731 return -EADDRNOTAVAIL; 1731 return -EADDRNOTAVAIL;
1732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1733 rcu_read_lock(); 1733 mutex_lock(&team->lock);
1734 list_for_each_entry_rcu(port, &team->port_list, list) 1734 list_for_each_entry(port, &team->port_list, list)
1735 if (team->ops.port_change_dev_addr) 1735 if (team->ops.port_change_dev_addr)
1736 team->ops.port_change_dev_addr(team, port); 1736 team->ops.port_change_dev_addr(team, port);
1737 rcu_read_unlock(); 1737 mutex_unlock(&team->lock);
1738 return 0; 1738 return 0;
1739} 1739}
1740 1740
diff --git a/drivers/net/xen-netback/interface.c b/drivers/net/xen-netback/interface.c
index f38227afe099..3aa8648080c8 100644
--- a/drivers/net/xen-netback/interface.c
+++ b/drivers/net/xen-netback/interface.c
@@ -340,12 +340,11 @@ static void xenvif_get_ethtool_stats(struct net_device *dev,
340 unsigned int num_queues = vif->num_queues; 340 unsigned int num_queues = vif->num_queues;
341 int i; 341 int i;
342 unsigned int queue_index; 342 unsigned int queue_index;
343 struct xenvif_stats *vif_stats;
344 343
345 for (i = 0; i < ARRAY_SIZE(xenvif_stats); i++) { 344 for (i = 0; i < ARRAY_SIZE(xenvif_stats); i++) {
346 unsigned long accum = 0; 345 unsigned long accum = 0;
347 for (queue_index = 0; queue_index < num_queues; ++queue_index) { 346 for (queue_index = 0; queue_index < num_queues; ++queue_index) {
348 vif_stats = &vif->queues[queue_index].stats; 347 void *vif_stats = &vif->queues[queue_index].stats;
349 accum += *(unsigned long *)(vif_stats + xenvif_stats[i].offset); 348 accum += *(unsigned long *)(vif_stats + xenvif_stats[i].offset);
350 } 349 }
351 data[i] = accum; 350 data[i] = accum;
diff --git a/drivers/net/xen-netback/netback.c b/drivers/net/xen-netback/netback.c
index c4d68d768408..cab9f5257f57 100644
--- a/drivers/net/xen-netback/netback.c
+++ b/drivers/net/xen-netback/netback.c
@@ -1349,7 +1349,7 @@ static int xenvif_handle_frag_list(struct xenvif_queue *queue, struct sk_buff *s
1349{ 1349{
1350 unsigned int offset = skb_headlen(skb); 1350 unsigned int offset = skb_headlen(skb);
1351 skb_frag_t frags[MAX_SKB_FRAGS]; 1351 skb_frag_t frags[MAX_SKB_FRAGS];
1352 int i; 1352 int i, f;
1353 struct ubuf_info *uarg; 1353 struct ubuf_info *uarg;
1354 struct sk_buff *nskb = skb_shinfo(skb)->frag_list; 1354 struct sk_buff *nskb = skb_shinfo(skb)->frag_list;
1355 1355
@@ -1389,23 +1389,25 @@ static int xenvif_handle_frag_list(struct xenvif_queue *queue, struct sk_buff *s
1389 frags[i].page_offset = 0; 1389 frags[i].page_offset = 0;
1390 skb_frag_size_set(&frags[i], len); 1390 skb_frag_size_set(&frags[i], len);
1391 } 1391 }
1392 /* swap out with old one */
1393 memcpy(skb_shinfo(skb)->frags,
1394 frags,
1395 i * sizeof(skb_frag_t));
1396 skb_shinfo(skb)->nr_frags = i;
1397 skb->truesize += i * PAGE_SIZE;
1398 1392
1399 /* remove traces of mapped pages and frag_list */ 1393 /* Copied all the bits from the frag list -- free it. */
1400 skb_frag_list_init(skb); 1394 skb_frag_list_init(skb);
1395 xenvif_skb_zerocopy_prepare(queue, nskb);
1396 kfree_skb(nskb);
1397
1398 /* Release all the original (foreign) frags. */
1399 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
1400 skb_frag_unref(skb, f);
1401 uarg = skb_shinfo(skb)->destructor_arg; 1401 uarg = skb_shinfo(skb)->destructor_arg;
1402 /* increase inflight counter to offset decrement in callback */ 1402 /* increase inflight counter to offset decrement in callback */
1403 atomic_inc(&queue->inflight_packets); 1403 atomic_inc(&queue->inflight_packets);
1404 uarg->callback(uarg, true); 1404 uarg->callback(uarg, true);
1405 skb_shinfo(skb)->destructor_arg = NULL; 1405 skb_shinfo(skb)->destructor_arg = NULL;
1406 1406
1407 xenvif_skb_zerocopy_prepare(queue, nskb); 1407 /* Fill the skb with the new (local) frags. */
1408 kfree_skb(nskb); 1408 memcpy(skb_shinfo(skb)->frags, frags, i * sizeof(skb_frag_t));
1409 skb_shinfo(skb)->nr_frags = i;
1410 skb->truesize += i * PAGE_SIZE;
1409 1411
1410 return 0; 1412 return 0;
1411} 1413}
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 38d1c51f58b1..7bcaeec876c0 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -84,8 +84,7 @@ config OF_RESOLVE
84 bool 84 bool
85 85
86config OF_OVERLAY 86config OF_OVERLAY
87 bool 87 bool "Device Tree overlays"
88 depends on OF
89 select OF_DYNAMIC 88 select OF_DYNAMIC
90 select OF_RESOLVE 89 select OF_RESOLVE
91 90
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 0a8aeb8523fe..adb8764861c0 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -714,16 +714,17 @@ static struct device_node *__of_find_node_by_path(struct device_node *parent,
714 const char *path) 714 const char *path)
715{ 715{
716 struct device_node *child; 716 struct device_node *child;
717 int len = strchrnul(path, '/') - path; 717 int len;
718 int term; 718 const char *end;
719 719
720 end = strchr(path, ':');
721 if (!end)
722 end = strchrnul(path, '/');
723
724 len = end - path;
720 if (!len) 725 if (!len)
721 return NULL; 726 return NULL;
722 727
723 term = strchrnul(path, ':') - path;
724 if (term < len)
725 len = term;
726
727 __for_each_child_of_node(parent, child) { 728 __for_each_child_of_node(parent, child) {
728 const char *name = strrchr(child->full_name, '/'); 729 const char *name = strrchr(child->full_name, '/');
729 if (WARN(!name, "malformed device_node %s\n", child->full_name)) 730 if (WARN(!name, "malformed device_node %s\n", child->full_name))
@@ -768,8 +769,12 @@ struct device_node *of_find_node_opts_by_path(const char *path, const char **opt
768 769
769 /* The path could begin with an alias */ 770 /* The path could begin with an alias */
770 if (*path != '/') { 771 if (*path != '/') {
771 char *p = strchrnul(path, '/'); 772 int len;
772 int len = separator ? separator - path : p - path; 773 const char *p = separator;
774
775 if (!p)
776 p = strchrnul(path, '/');
777 len = p - path;
773 778
774 /* of_aliases must not be NULL */ 779 /* of_aliases must not be NULL */
775 if (!of_aliases) 780 if (!of_aliases)
@@ -794,6 +799,8 @@ struct device_node *of_find_node_opts_by_path(const char *path, const char **opt
794 path++; /* Increment past '/' delimiter */ 799 path++; /* Increment past '/' delimiter */
795 np = __of_find_node_by_path(np, path); 800 np = __of_find_node_by_path(np, path);
796 path = strchrnul(path, '/'); 801 path = strchrnul(path, '/');
802 if (separator && separator < path)
803 break;
797 } 804 }
798 raw_spin_unlock_irqrestore(&devtree_lock, flags); 805 raw_spin_unlock_irqrestore(&devtree_lock, flags);
799 return np; 806 return np;
@@ -1886,8 +1893,10 @@ void of_alias_scan(void * (*dt_alloc)(u64 size, u64 align))
1886 name = of_get_property(of_chosen, "linux,stdout-path", NULL); 1893 name = of_get_property(of_chosen, "linux,stdout-path", NULL);
1887 if (IS_ENABLED(CONFIG_PPC) && !name) 1894 if (IS_ENABLED(CONFIG_PPC) && !name)
1888 name = of_get_property(of_aliases, "stdout", NULL); 1895 name = of_get_property(of_aliases, "stdout", NULL);
1889 if (name) 1896 if (name) {
1890 of_stdout = of_find_node_opts_by_path(name, &of_stdout_options); 1897 of_stdout = of_find_node_opts_by_path(name, &of_stdout_options);
1898 add_preferred_console("stdout-path", 0, NULL);
1899 }
1891 } 1900 }
1892 1901
1893 if (!of_aliases) 1902 if (!of_aliases)
diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index 352b4f28f82c..dee9270ba547 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -19,6 +19,7 @@
19#include <linux/string.h> 19#include <linux/string.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/idr.h>
22 23
23#include "of_private.h" 24#include "of_private.h"
24 25
@@ -85,7 +86,7 @@ static int of_overlay_apply_single_device_node(struct of_overlay *ov,
85 struct device_node *target, struct device_node *child) 86 struct device_node *target, struct device_node *child)
86{ 87{
87 const char *cname; 88 const char *cname;
88 struct device_node *tchild, *grandchild; 89 struct device_node *tchild;
89 int ret = 0; 90 int ret = 0;
90 91
91 cname = kbasename(child->full_name); 92 cname = kbasename(child->full_name);
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index 0cf9a236d438..aba8946cac46 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -92,6 +92,11 @@ static void __init of_selftest_find_node_by_name(void)
92 "option path test failed\n"); 92 "option path test failed\n");
93 of_node_put(np); 93 of_node_put(np);
94 94
95 np = of_find_node_opts_by_path("/testcase-data:test/option", &options);
96 selftest(np && !strcmp("test/option", options),
97 "option path test, subcase #1 failed\n");
98 of_node_put(np);
99
95 np = of_find_node_opts_by_path("/testcase-data:testoption", NULL); 100 np = of_find_node_opts_by_path("/testcase-data:testoption", NULL);
96 selftest(np, "NULL option path test failed\n"); 101 selftest(np, "NULL option path test failed\n");
97 of_node_put(np); 102 of_node_put(np);
@@ -102,6 +107,12 @@ static void __init of_selftest_find_node_by_name(void)
102 "option alias path test failed\n"); 107 "option alias path test failed\n");
103 of_node_put(np); 108 of_node_put(np);
104 109
110 np = of_find_node_opts_by_path("testcase-alias:test/alias/option",
111 &options);
112 selftest(np && !strcmp("test/alias/option", options),
113 "option alias path test, subcase #1 failed\n");
114 of_node_put(np);
115
105 np = of_find_node_opts_by_path("testcase-alias:testaliasoption", NULL); 116 np = of_find_node_opts_by_path("testcase-alias:testaliasoption", NULL);
106 selftest(np, "NULL option alias path test failed\n"); 117 selftest(np, "NULL option alias path test failed\n");
107 of_node_put(np); 118 of_node_put(np);
@@ -378,9 +389,9 @@ static void __init of_selftest_property_string(void)
378 rc = of_property_match_string(np, "phandle-list-names", "first"); 389 rc = of_property_match_string(np, "phandle-list-names", "first");
379 selftest(rc == 0, "first expected:0 got:%i\n", rc); 390 selftest(rc == 0, "first expected:0 got:%i\n", rc);
380 rc = of_property_match_string(np, "phandle-list-names", "second"); 391 rc = of_property_match_string(np, "phandle-list-names", "second");
381 selftest(rc == 1, "second expected:0 got:%i\n", rc); 392 selftest(rc == 1, "second expected:1 got:%i\n", rc);
382 rc = of_property_match_string(np, "phandle-list-names", "third"); 393 rc = of_property_match_string(np, "phandle-list-names", "third");
383 selftest(rc == 2, "third expected:0 got:%i\n", rc); 394 selftest(rc == 2, "third expected:2 got:%i\n", rc);
384 rc = of_property_match_string(np, "phandle-list-names", "fourth"); 395 rc = of_property_match_string(np, "phandle-list-names", "fourth");
385 selftest(rc == -ENODATA, "unmatched string; rc=%i\n", rc); 396 selftest(rc == -ENODATA, "unmatched string; rc=%i\n", rc);
386 rc = of_property_match_string(np, "missing-property", "blah"); 397 rc = of_property_match_string(np, "missing-property", "blah");
@@ -478,7 +489,6 @@ static void __init of_selftest_changeset(void)
478 struct device_node *n1, *n2, *n21, *nremove, *parent, *np; 489 struct device_node *n1, *n2, *n21, *nremove, *parent, *np;
479 struct of_changeset chgset; 490 struct of_changeset chgset;
480 491
481 of_changeset_init(&chgset);
482 n1 = __of_node_dup(NULL, "/testcase-data/changeset/n1"); 492 n1 = __of_node_dup(NULL, "/testcase-data/changeset/n1");
483 selftest(n1, "testcase setup failure\n"); 493 selftest(n1, "testcase setup failure\n");
484 n2 = __of_node_dup(NULL, "/testcase-data/changeset/n2"); 494 n2 = __of_node_dup(NULL, "/testcase-data/changeset/n2");
@@ -979,7 +989,7 @@ static int of_path_platform_device_exists(const char *path)
979 return pdev != NULL; 989 return pdev != NULL;
980} 990}
981 991
982#if IS_ENABLED(CONFIG_I2C) 992#if IS_BUILTIN(CONFIG_I2C)
983 993
984/* get the i2c client device instantiated at the path */ 994/* get the i2c client device instantiated at the path */
985static struct i2c_client *of_path_to_i2c_client(const char *path) 995static struct i2c_client *of_path_to_i2c_client(const char *path)
@@ -1445,7 +1455,7 @@ static void of_selftest_overlay_11(void)
1445 return; 1455 return;
1446} 1456}
1447 1457
1448#if IS_ENABLED(CONFIG_I2C) && IS_ENABLED(CONFIG_OF_OVERLAY) 1458#if IS_BUILTIN(CONFIG_I2C) && IS_ENABLED(CONFIG_OF_OVERLAY)
1449 1459
1450struct selftest_i2c_bus_data { 1460struct selftest_i2c_bus_data {
1451 struct platform_device *pdev; 1461 struct platform_device *pdev;
@@ -1584,7 +1594,7 @@ static struct i2c_driver selftest_i2c_dev_driver = {
1584 .id_table = selftest_i2c_dev_id, 1594 .id_table = selftest_i2c_dev_id,
1585}; 1595};
1586 1596
1587#if IS_ENABLED(CONFIG_I2C_MUX) 1597#if IS_BUILTIN(CONFIG_I2C_MUX)
1588 1598
1589struct selftest_i2c_mux_data { 1599struct selftest_i2c_mux_data {
1590 int nchans; 1600 int nchans;
@@ -1695,7 +1705,7 @@ static int of_selftest_overlay_i2c_init(void)
1695 "could not register selftest i2c bus driver\n")) 1705 "could not register selftest i2c bus driver\n"))
1696 return ret; 1706 return ret;
1697 1707
1698#if IS_ENABLED(CONFIG_I2C_MUX) 1708#if IS_BUILTIN(CONFIG_I2C_MUX)
1699 ret = i2c_add_driver(&selftest_i2c_mux_driver); 1709 ret = i2c_add_driver(&selftest_i2c_mux_driver);
1700 if (selftest(ret == 0, 1710 if (selftest(ret == 0,
1701 "could not register selftest i2c mux driver\n")) 1711 "could not register selftest i2c mux driver\n"))
@@ -1707,7 +1717,7 @@ static int of_selftest_overlay_i2c_init(void)
1707 1717
1708static void of_selftest_overlay_i2c_cleanup(void) 1718static void of_selftest_overlay_i2c_cleanup(void)
1709{ 1719{
1710#if IS_ENABLED(CONFIG_I2C_MUX) 1720#if IS_BUILTIN(CONFIG_I2C_MUX)
1711 i2c_del_driver(&selftest_i2c_mux_driver); 1721 i2c_del_driver(&selftest_i2c_mux_driver);
1712#endif 1722#endif
1713 platform_driver_unregister(&selftest_i2c_bus_driver); 1723 platform_driver_unregister(&selftest_i2c_bus_driver);
@@ -1814,7 +1824,7 @@ static void __init of_selftest_overlay(void)
1814 of_selftest_overlay_10(); 1824 of_selftest_overlay_10();
1815 of_selftest_overlay_11(); 1825 of_selftest_overlay_11();
1816 1826
1817#if IS_ENABLED(CONFIG_I2C) 1827#if IS_BUILTIN(CONFIG_I2C)
1818 if (selftest(of_selftest_overlay_i2c_init() == 0, "i2c init failed\n")) 1828 if (selftest(of_selftest_overlay_i2c_init() == 0, "i2c init failed\n"))
1819 goto out; 1829 goto out;
1820 1830
diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index aab55474dd0d..ee082c0366ec 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
@@ -127,7 +127,7 @@ static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset)
127 return false; 127 return false;
128} 128}
129 129
130static int xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, 130static void __iomem *xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
131 int offset) 131 int offset)
132{ 132{
133 struct xgene_pcie_port *port = bus->sysdata; 133 struct xgene_pcie_port *port = bus->sysdata;
@@ -137,7 +137,7 @@ static int xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
137 return NULL; 137 return NULL;
138 138
139 xgene_pcie_set_rtdid_reg(bus, devfn); 139 xgene_pcie_set_rtdid_reg(bus, devfn);
140 return xgene_pcie_get_cfg_base(bus); 140 return xgene_pcie_get_cfg_base(bus) + offset;
141} 141}
142 142
143static struct pci_ops xgene_pcie_ops = { 143static struct pci_ops xgene_pcie_ops = {
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index aa012fb3834b..312f23a8429c 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -521,7 +521,8 @@ static ssize_t driver_override_store(struct device *dev,
521 struct pci_dev *pdev = to_pci_dev(dev); 521 struct pci_dev *pdev = to_pci_dev(dev);
522 char *driver_override, *old = pdev->driver_override, *cp; 522 char *driver_override, *old = pdev->driver_override, *cp;
523 523
524 if (count > PATH_MAX) 524 /* We need to keep extra room for a newline */
525 if (count >= (PAGE_SIZE - 1))
525 return -EINVAL; 526 return -EINVAL;
526 527
527 driver_override = kstrndup(buf, count, GFP_KERNEL); 528 driver_override = kstrndup(buf, count, GFP_KERNEL);
@@ -549,7 +550,7 @@ static ssize_t driver_override_show(struct device *dev,
549{ 550{
550 struct pci_dev *pdev = to_pci_dev(dev); 551 struct pci_dev *pdev = to_pci_dev(dev);
551 552
552 return sprintf(buf, "%s\n", pdev->driver_override); 553 return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
553} 554}
554static DEVICE_ATTR_RW(driver_override); 555static DEVICE_ATTR_RW(driver_override);
555 556
diff --git a/drivers/ps3/ps3-lpm.c b/drivers/ps3/ps3-lpm.c
index b139b7792e9f..cb7d3a67380d 100644
--- a/drivers/ps3/ps3-lpm.c
+++ b/drivers/ps3/ps3-lpm.c
@@ -105,7 +105,7 @@ struct ps3_lpm_shadow_regs {
105 * @open: An atomic variable indicating the lpm driver has been opened. 105 * @open: An atomic variable indicating the lpm driver has been opened.
106 * @rights: The lpm rigths granted by the system policy module. A logical 106 * @rights: The lpm rigths granted by the system policy module. A logical
107 * OR of enum ps3_lpm_rights. 107 * OR of enum ps3_lpm_rights.
108 * @node_id: The node id of a BE prosessor whose performance monitor this 108 * @node_id: The node id of a BE processor whose performance monitor this
109 * lpar has the right to use. 109 * lpar has the right to use.
110 * @pu_id: The lv1 id of the logical PU. 110 * @pu_id: The lv1 id of the logical PU.
111 * @lpm_id: The lv1 id of this lpm instance. 111 * @lpm_id: The lv1 id of this lpm instance.
@@ -412,7 +412,7 @@ u32 ps3_read_pm(u32 cpu, enum pm_reg_name reg)
412 result = lv1_set_lpm_interval(lpm_priv->lpm_id, 0, 0, &val); 412 result = lv1_set_lpm_interval(lpm_priv->lpm_id, 0, 0, &val);
413 if (result) { 413 if (result) {
414 val = 0; 414 val = 0;
415 dev_dbg(sbd_core(), "%s:%u: lv1 set_inteval failed: " 415 dev_dbg(sbd_core(), "%s:%u: lv1 set_interval failed: "
416 "reg %u, %s\n", __func__, __LINE__, reg, 416 "reg %u, %s\n", __func__, __LINE__, reg,
417 ps3_result(result)); 417 ps3_result(result));
418 } 418 }
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index b899947d839d..1245dca79009 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -3444,13 +3444,6 @@ static umode_t regulator_attr_is_visible(struct kobject *kobj,
3444 if (attr == &dev_attr_requested_microamps.attr) 3444 if (attr == &dev_attr_requested_microamps.attr)
3445 return rdev->desc->type == REGULATOR_CURRENT ? mode : 0; 3445 return rdev->desc->type == REGULATOR_CURRENT ? mode : 0;
3446 3446
3447 /* all the other attributes exist to support constraints;
3448 * don't show them if there are no constraints, or if the
3449 * relevant supporting methods are missing.
3450 */
3451 if (!rdev->constraints)
3452 return 0;
3453
3454 /* constraints need specific supporting methods */ 3447 /* constraints need specific supporting methods */
3455 if (attr == &dev_attr_min_microvolts.attr || 3448 if (attr == &dev_attr_min_microvolts.attr ||
3456 attr == &dev_attr_max_microvolts.attr) 3449 attr == &dev_attr_max_microvolts.attr)
diff --git a/drivers/regulator/da9210-regulator.c b/drivers/regulator/da9210-regulator.c
index bc6100103f7f..f0489cb9018b 100644
--- a/drivers/regulator/da9210-regulator.c
+++ b/drivers/regulator/da9210-regulator.c
@@ -152,6 +152,15 @@ static int da9210_i2c_probe(struct i2c_client *i2c,
152 config.regmap = chip->regmap; 152 config.regmap = chip->regmap;
153 config.of_node = dev->of_node; 153 config.of_node = dev->of_node;
154 154
155 /* Mask all interrupt sources to deassert interrupt line */
156 error = regmap_write(chip->regmap, DA9210_REG_MASK_A, ~0);
157 if (!error)
158 error = regmap_write(chip->regmap, DA9210_REG_MASK_B, ~0);
159 if (error) {
160 dev_err(&i2c->dev, "Failed to write to mask reg: %d\n", error);
161 return error;
162 }
163
155 rdev = devm_regulator_register(&i2c->dev, &da9210_reg, &config); 164 rdev = devm_regulator_register(&i2c->dev, &da9210_reg, &config);
156 if (IS_ERR(rdev)) { 165 if (IS_ERR(rdev)) {
157 dev_err(&i2c->dev, "Failed to register DA9210 regulator\n"); 166 dev_err(&i2c->dev, "Failed to register DA9210 regulator\n");
diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c
index 1f93b752a81c..3fd44353cc80 100644
--- a/drivers/regulator/rk808-regulator.c
+++ b/drivers/regulator/rk808-regulator.c
@@ -235,6 +235,7 @@ static const struct regulator_desc rk808_reg[] = {
235 .vsel_mask = RK808_LDO_VSEL_MASK, 235 .vsel_mask = RK808_LDO_VSEL_MASK,
236 .enable_reg = RK808_LDO_EN_REG, 236 .enable_reg = RK808_LDO_EN_REG,
237 .enable_mask = BIT(0), 237 .enable_mask = BIT(0),
238 .enable_time = 400,
238 .owner = THIS_MODULE, 239 .owner = THIS_MODULE,
239 }, { 240 }, {
240 .name = "LDO_REG2", 241 .name = "LDO_REG2",
@@ -249,6 +250,7 @@ static const struct regulator_desc rk808_reg[] = {
249 .vsel_mask = RK808_LDO_VSEL_MASK, 250 .vsel_mask = RK808_LDO_VSEL_MASK,
250 .enable_reg = RK808_LDO_EN_REG, 251 .enable_reg = RK808_LDO_EN_REG,
251 .enable_mask = BIT(1), 252 .enable_mask = BIT(1),
253 .enable_time = 400,
252 .owner = THIS_MODULE, 254 .owner = THIS_MODULE,
253 }, { 255 }, {
254 .name = "LDO_REG3", 256 .name = "LDO_REG3",
@@ -263,6 +265,7 @@ static const struct regulator_desc rk808_reg[] = {
263 .vsel_mask = RK808_BUCK4_VSEL_MASK, 265 .vsel_mask = RK808_BUCK4_VSEL_MASK,
264 .enable_reg = RK808_LDO_EN_REG, 266 .enable_reg = RK808_LDO_EN_REG,
265 .enable_mask = BIT(2), 267 .enable_mask = BIT(2),
268 .enable_time = 400,
266 .owner = THIS_MODULE, 269 .owner = THIS_MODULE,
267 }, { 270 }, {
268 .name = "LDO_REG4", 271 .name = "LDO_REG4",
@@ -277,6 +280,7 @@ static const struct regulator_desc rk808_reg[] = {
277 .vsel_mask = RK808_LDO_VSEL_MASK, 280 .vsel_mask = RK808_LDO_VSEL_MASK,
278 .enable_reg = RK808_LDO_EN_REG, 281 .enable_reg = RK808_LDO_EN_REG,
279 .enable_mask = BIT(3), 282 .enable_mask = BIT(3),
283 .enable_time = 400,
280 .owner = THIS_MODULE, 284 .owner = THIS_MODULE,
281 }, { 285 }, {
282 .name = "LDO_REG5", 286 .name = "LDO_REG5",
@@ -291,6 +295,7 @@ static const struct regulator_desc rk808_reg[] = {
291 .vsel_mask = RK808_LDO_VSEL_MASK, 295 .vsel_mask = RK808_LDO_VSEL_MASK,
292 .enable_reg = RK808_LDO_EN_REG, 296 .enable_reg = RK808_LDO_EN_REG,
293 .enable_mask = BIT(4), 297 .enable_mask = BIT(4),
298 .enable_time = 400,
294 .owner = THIS_MODULE, 299 .owner = THIS_MODULE,
295 }, { 300 }, {
296 .name = "LDO_REG6", 301 .name = "LDO_REG6",
@@ -305,6 +310,7 @@ static const struct regulator_desc rk808_reg[] = {
305 .vsel_mask = RK808_LDO_VSEL_MASK, 310 .vsel_mask = RK808_LDO_VSEL_MASK,
306 .enable_reg = RK808_LDO_EN_REG, 311 .enable_reg = RK808_LDO_EN_REG,
307 .enable_mask = BIT(5), 312 .enable_mask = BIT(5),
313 .enable_time = 400,
308 .owner = THIS_MODULE, 314 .owner = THIS_MODULE,
309 }, { 315 }, {
310 .name = "LDO_REG7", 316 .name = "LDO_REG7",
@@ -319,6 +325,7 @@ static const struct regulator_desc rk808_reg[] = {
319 .vsel_mask = RK808_LDO_VSEL_MASK, 325 .vsel_mask = RK808_LDO_VSEL_MASK,
320 .enable_reg = RK808_LDO_EN_REG, 326 .enable_reg = RK808_LDO_EN_REG,
321 .enable_mask = BIT(6), 327 .enable_mask = BIT(6),
328 .enable_time = 400,
322 .owner = THIS_MODULE, 329 .owner = THIS_MODULE,
323 }, { 330 }, {
324 .name = "LDO_REG8", 331 .name = "LDO_REG8",
@@ -333,6 +340,7 @@ static const struct regulator_desc rk808_reg[] = {
333 .vsel_mask = RK808_LDO_VSEL_MASK, 340 .vsel_mask = RK808_LDO_VSEL_MASK,
334 .enable_reg = RK808_LDO_EN_REG, 341 .enable_reg = RK808_LDO_EN_REG,
335 .enable_mask = BIT(7), 342 .enable_mask = BIT(7),
343 .enable_time = 400,
336 .owner = THIS_MODULE, 344 .owner = THIS_MODULE,
337 }, { 345 }, {
338 .name = "SWITCH_REG1", 346 .name = "SWITCH_REG1",
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 4241eeab3386..f4cf6851fae9 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -849,6 +849,7 @@ static struct s3c_rtc_data const s3c2443_rtc_data = {
849 849
850static struct s3c_rtc_data const s3c6410_rtc_data = { 850static struct s3c_rtc_data const s3c6410_rtc_data = {
851 .max_user_freq = 32768, 851 .max_user_freq = 32768,
852 .needs_src_clk = true,
852 .irq_handler = s3c6410_rtc_irq, 853 .irq_handler = s3c6410_rtc_irq,
853 .set_freq = s3c6410_rtc_setfreq, 854 .set_freq = s3c6410_rtc_setfreq,
854 .enable_tick = s3c6410_rtc_enable_tick, 855 .enable_tick = s3c6410_rtc_enable_tick,
diff --git a/drivers/s390/block/dcssblk.c b/drivers/s390/block/dcssblk.c
index 96128cb009f3..da212813f2d5 100644
--- a/drivers/s390/block/dcssblk.c
+++ b/drivers/s390/block/dcssblk.c
@@ -547,7 +547,7 @@ dcssblk_add_store(struct device *dev, struct device_attribute *attr, const char
547 * parse input 547 * parse input
548 */ 548 */
549 num_of_segments = 0; 549 num_of_segments = 0;
550 for (i = 0; ((buf[i] != '\0') && (buf[i] != '\n') && i < count); i++) { 550 for (i = 0; (i < count && (buf[i] != '\0') && (buf[i] != '\n')); i++) {
551 for (j = i; (buf[j] != ':') && 551 for (j = i; (buf[j] != ':') &&
552 (buf[j] != '\0') && 552 (buf[j] != '\0') &&
553 (buf[j] != '\n') && 553 (buf[j] != '\n') &&
diff --git a/drivers/s390/block/scm_blk_cluster.c b/drivers/s390/block/scm_blk_cluster.c
index 09db45296eed..7497ddde2dd6 100644
--- a/drivers/s390/block/scm_blk_cluster.c
+++ b/drivers/s390/block/scm_blk_cluster.c
@@ -92,7 +92,7 @@ bool scm_reserve_cluster(struct scm_request *scmrq)
92 add = 0; 92 add = 0;
93 continue; 93 continue;
94 } 94 }
95 for (pos = 0; pos <= iter->aob->request.msb_count; pos++) { 95 for (pos = 0; pos < iter->aob->request.msb_count; pos++) {
96 if (clusters_intersect(req, iter->request[pos]) && 96 if (clusters_intersect(req, iter->request[pos]) &&
97 (rq_data_dir(req) == WRITE || 97 (rq_data_dir(req) == WRITE ||
98 rq_data_dir(iter->request[pos]) == WRITE)) { 98 rq_data_dir(iter->request[pos]) == WRITE)) {
diff --git a/drivers/scsi/libsas/sas_discover.c b/drivers/scsi/libsas/sas_discover.c
index 62b58d38ce2e..60de66252fa2 100644
--- a/drivers/scsi/libsas/sas_discover.c
+++ b/drivers/scsi/libsas/sas_discover.c
@@ -500,6 +500,7 @@ static void sas_revalidate_domain(struct work_struct *work)
500 struct sas_discovery_event *ev = to_sas_discovery_event(work); 500 struct sas_discovery_event *ev = to_sas_discovery_event(work);
501 struct asd_sas_port *port = ev->port; 501 struct asd_sas_port *port = ev->port;
502 struct sas_ha_struct *ha = port->ha; 502 struct sas_ha_struct *ha = port->ha;
503 struct domain_device *ddev = port->port_dev;
503 504
504 /* prevent revalidation from finding sata links in recovery */ 505 /* prevent revalidation from finding sata links in recovery */
505 mutex_lock(&ha->disco_mutex); 506 mutex_lock(&ha->disco_mutex);
@@ -514,8 +515,9 @@ static void sas_revalidate_domain(struct work_struct *work)
514 SAS_DPRINTK("REVALIDATING DOMAIN on port %d, pid:%d\n", port->id, 515 SAS_DPRINTK("REVALIDATING DOMAIN on port %d, pid:%d\n", port->id,
515 task_pid_nr(current)); 516 task_pid_nr(current));
516 517
517 if (port->port_dev) 518 if (ddev && (ddev->dev_type == SAS_FANOUT_EXPANDER_DEVICE ||
518 res = sas_ex_revalidate_domain(port->port_dev); 519 ddev->dev_type == SAS_EDGE_EXPANDER_DEVICE))
520 res = sas_ex_revalidate_domain(ddev);
519 521
520 SAS_DPRINTK("done REVALIDATING DOMAIN on port %d, pid:%d, res 0x%x\n", 522 SAS_DPRINTK("done REVALIDATING DOMAIN on port %d, pid:%d, res 0x%x\n",
521 port->id, task_pid_nr(current), res); 523 port->id, task_pid_nr(current), res);
diff --git a/drivers/scsi/mac53c94.c b/drivers/scsi/mac53c94.c
index e5cd8d8d4ce7..0adb2e015597 100644
--- a/drivers/scsi/mac53c94.c
+++ b/drivers/scsi/mac53c94.c
@@ -382,16 +382,16 @@ static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
382 if (dma_len > 0xffff) 382 if (dma_len > 0xffff)
383 panic("mac53c94: scatterlist element >= 64k"); 383 panic("mac53c94: scatterlist element >= 64k");
384 total += dma_len; 384 total += dma_len;
385 st_le16(&dcmds->req_count, dma_len); 385 dcmds->req_count = cpu_to_le16(dma_len);
386 st_le16(&dcmds->command, dma_cmd); 386 dcmds->command = cpu_to_le16(dma_cmd);
387 st_le32(&dcmds->phy_addr, dma_addr); 387 dcmds->phy_addr = cpu_to_le32(dma_addr);
388 dcmds->xfer_status = 0; 388 dcmds->xfer_status = 0;
389 ++dcmds; 389 ++dcmds;
390 } 390 }
391 391
392 dma_cmd += OUTPUT_LAST - OUTPUT_MORE; 392 dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
393 st_le16(&dcmds[-1].command, dma_cmd); 393 dcmds[-1].command = cpu_to_le16(dma_cmd);
394 st_le16(&dcmds->command, DBDMA_STOP); 394 dcmds->command = cpu_to_le16(DBDMA_STOP);
395 cmd->SCp.this_residual = total; 395 cmd->SCp.this_residual = total;
396} 396}
397 397
diff --git a/drivers/scsi/mesh.c b/drivers/scsi/mesh.c
index 57a95e2c3442..555367f00228 100644
--- a/drivers/scsi/mesh.c
+++ b/drivers/scsi/mesh.c
@@ -1287,9 +1287,9 @@ static void set_dma_cmds(struct mesh_state *ms, struct scsi_cmnd *cmd)
1287 } 1287 }
1288 if (dma_len > 0xffff) 1288 if (dma_len > 0xffff)
1289 panic("mesh: scatterlist element >= 64k"); 1289 panic("mesh: scatterlist element >= 64k");
1290 st_le16(&dcmds->req_count, dma_len - off); 1290 dcmds->req_count = cpu_to_le16(dma_len - off);
1291 st_le16(&dcmds->command, dma_cmd); 1291 dcmds->command = cpu_to_le16(dma_cmd);
1292 st_le32(&dcmds->phy_addr, dma_addr + off); 1292 dcmds->phy_addr = cpu_to_le32(dma_addr + off);
1293 dcmds->xfer_status = 0; 1293 dcmds->xfer_status = 0;
1294 ++dcmds; 1294 ++dcmds;
1295 dtot += dma_len - off; 1295 dtot += dma_len - off;
@@ -1303,15 +1303,15 @@ static void set_dma_cmds(struct mesh_state *ms, struct scsi_cmnd *cmd)
1303 static char mesh_extra_buf[64]; 1303 static char mesh_extra_buf[64];
1304 1304
1305 dtot = sizeof(mesh_extra_buf); 1305 dtot = sizeof(mesh_extra_buf);
1306 st_le16(&dcmds->req_count, dtot); 1306 dcmds->req_count = cpu_to_le16(dtot);
1307 st_le32(&dcmds->phy_addr, virt_to_phys(mesh_extra_buf)); 1307 dcmds->phy_addr = cpu_to_le32(virt_to_phys(mesh_extra_buf));
1308 dcmds->xfer_status = 0; 1308 dcmds->xfer_status = 0;
1309 ++dcmds; 1309 ++dcmds;
1310 } 1310 }
1311 dma_cmd += OUTPUT_LAST - OUTPUT_MORE; 1311 dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
1312 st_le16(&dcmds[-1].command, dma_cmd); 1312 dcmds[-1].command = cpu_to_le16(dma_cmd);
1313 memset(dcmds, 0, sizeof(*dcmds)); 1313 memset(dcmds, 0, sizeof(*dcmds));
1314 st_le16(&dcmds->command, DBDMA_STOP); 1314 dcmds->command = cpu_to_le16(DBDMA_STOP);
1315 ms->dma_count = dtot; 1315 ms->dma_count = dtot;
1316} 1316}
1317 1317
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 9af7841f2e8c..06de34001c66 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -764,17 +764,17 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master,
764 (unsigned long long)xfer->rx_dma); 764 (unsigned long long)xfer->rx_dma);
765 } 765 }
766 766
767 /* REVISIT: We're waiting for ENDRX before we start the next 767 /* REVISIT: We're waiting for RXBUFF before we start the next
768 * transfer because we need to handle some difficult timing 768 * transfer because we need to handle some difficult timing
769 * issues otherwise. If we wait for ENDTX in one transfer and 769 * issues otherwise. If we wait for TXBUFE in one transfer and
770 * then starts waiting for ENDRX in the next, it's difficult 770 * then starts waiting for RXBUFF in the next, it's difficult
771 * to tell the difference between the ENDRX interrupt we're 771 * to tell the difference between the RXBUFF interrupt we're
772 * actually waiting for and the ENDRX interrupt of the 772 * actually waiting for and the RXBUFF interrupt of the
773 * previous transfer. 773 * previous transfer.
774 * 774 *
775 * It should be doable, though. Just not now... 775 * It should be doable, though. Just not now...
776 */ 776 */
777 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); 777 spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES));
778 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); 778 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
779} 779}
780 780
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index a0197fd4e95c..3ce39d10fafb 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -139,6 +139,9 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws)
139 1, 139 1,
140 DMA_MEM_TO_DEV, 140 DMA_MEM_TO_DEV,
141 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 141 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
142 if (!txdesc)
143 return NULL;
144
142 txdesc->callback = dw_spi_dma_tx_done; 145 txdesc->callback = dw_spi_dma_tx_done;
143 txdesc->callback_param = dws; 146 txdesc->callback_param = dws;
144 147
@@ -184,6 +187,9 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws)
184 1, 187 1,
185 DMA_DEV_TO_MEM, 188 DMA_DEV_TO_MEM,
186 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 189 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
190 if (!rxdesc)
191 return NULL;
192
187 rxdesc->callback = dw_spi_dma_rx_done; 193 rxdesc->callback = dw_spi_dma_rx_done;
188 rxdesc->callback_param = dws; 194 rxdesc->callback_param = dws;
189 195
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index 5ba331047cbe..6d331e0db331 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -36,13 +36,13 @@ struct spi_pci_desc {
36 36
37static struct spi_pci_desc spi_pci_mid_desc_1 = { 37static struct spi_pci_desc spi_pci_mid_desc_1 = {
38 .setup = dw_spi_mid_init, 38 .setup = dw_spi_mid_init,
39 .num_cs = 32, 39 .num_cs = 5,
40 .bus_num = 0, 40 .bus_num = 0,
41}; 41};
42 42
43static struct spi_pci_desc spi_pci_mid_desc_2 = { 43static struct spi_pci_desc spi_pci_mid_desc_2 = {
44 .setup = dw_spi_mid_init, 44 .setup = dw_spi_mid_init,
45 .num_cs = 4, 45 .num_cs = 2,
46 .bus_num = 1, 46 .bus_num = 1,
47}; 47};
48 48
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 5a97a62b298a..4847afba89f4 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -621,14 +621,14 @@ static void spi_hw_init(struct device *dev, struct dw_spi *dws)
621 if (!dws->fifo_len) { 621 if (!dws->fifo_len) {
622 u32 fifo; 622 u32 fifo;
623 623
624 for (fifo = 2; fifo <= 256; fifo++) { 624 for (fifo = 1; fifo < 256; fifo++) {
625 dw_writew(dws, DW_SPI_TXFLTR, fifo); 625 dw_writew(dws, DW_SPI_TXFLTR, fifo);
626 if (fifo != dw_readw(dws, DW_SPI_TXFLTR)) 626 if (fifo != dw_readw(dws, DW_SPI_TXFLTR))
627 break; 627 break;
628 } 628 }
629 dw_writew(dws, DW_SPI_TXFLTR, 0); 629 dw_writew(dws, DW_SPI_TXFLTR, 0);
630 630
631 dws->fifo_len = (fifo == 2) ? 0 : fifo - 1; 631 dws->fifo_len = (fifo == 1) ? 0 : fifo;
632 dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len); 632 dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len);
633 } 633 }
634} 634}
diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c
index c01567d53581..e649bc7d4c08 100644
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -459,6 +459,13 @@ static int img_spfi_transfer_one(struct spi_master *master,
459 unsigned long flags; 459 unsigned long flags;
460 int ret; 460 int ret;
461 461
462 if (xfer->len > SPFI_TRANSACTION_TSIZE_MASK) {
463 dev_err(spfi->dev,
464 "Transfer length (%d) is greater than the max supported (%d)",
465 xfer->len, SPFI_TRANSACTION_TSIZE_MASK);
466 return -EINVAL;
467 }
468
462 /* 469 /*
463 * Stop all DMA and reset the controller if the previous transaction 470 * Stop all DMA and reset the controller if the previous transaction
464 * timed-out and never completed it's DMA. 471 * timed-out and never completed it's DMA.
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 89ca162801da..ee513a85296b 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -534,12 +534,12 @@ static void giveback(struct pl022 *pl022)
534 pl022->cur_msg = NULL; 534 pl022->cur_msg = NULL;
535 pl022->cur_transfer = NULL; 535 pl022->cur_transfer = NULL;
536 pl022->cur_chip = NULL; 536 pl022->cur_chip = NULL;
537 spi_finalize_current_message(pl022->master);
538 537
539 /* disable the SPI/SSP operation */ 538 /* disable the SPI/SSP operation */
540 writew((readw(SSP_CR1(pl022->virtbase)) & 539 writew((readw(SSP_CR1(pl022->virtbase)) &
541 (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); 540 (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase));
542 541
542 spi_finalize_current_message(pl022->master);
543} 543}
544 544
545/** 545/**
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 884a716e50cb..5c0616870358 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi/spi-ti-qspi.c
@@ -101,6 +101,7 @@ struct ti_qspi {
101#define QSPI_FLEN(n) ((n - 1) << 0) 101#define QSPI_FLEN(n) ((n - 1) << 0)
102 102
103/* STATUS REGISTER */ 103/* STATUS REGISTER */
104#define BUSY 0x01
104#define WC 0x02 105#define WC 0x02
105 106
106/* INTERRUPT REGISTER */ 107/* INTERRUPT REGISTER */
@@ -199,6 +200,21 @@ static void ti_qspi_restore_ctx(struct ti_qspi *qspi)
199 ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG); 200 ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG);
200} 201}
201 202
203static inline u32 qspi_is_busy(struct ti_qspi *qspi)
204{
205 u32 stat;
206 unsigned long timeout = jiffies + QSPI_COMPLETION_TIMEOUT;
207
208 stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
209 while ((stat & BUSY) && time_after(timeout, jiffies)) {
210 cpu_relax();
211 stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
212 }
213
214 WARN(stat & BUSY, "qspi busy\n");
215 return stat & BUSY;
216}
217
202static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) 218static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
203{ 219{
204 int wlen, count; 220 int wlen, count;
@@ -211,6 +227,9 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
211 wlen = t->bits_per_word >> 3; /* in bytes */ 227 wlen = t->bits_per_word >> 3; /* in bytes */
212 228
213 while (count) { 229 while (count) {
230 if (qspi_is_busy(qspi))
231 return -EBUSY;
232
214 switch (wlen) { 233 switch (wlen) {
215 case 1: 234 case 1:
216 dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n", 235 dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n",
@@ -266,6 +285,9 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t)
266 285
267 while (count) { 286 while (count) {
268 dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc); 287 dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc);
288 if (qspi_is_busy(qspi))
289 return -EBUSY;
290
269 ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); 291 ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);
270 if (!wait_for_completion_timeout(&qspi->transfer_complete, 292 if (!wait_for_completion_timeout(&qspi->transfer_complete,
271 QSPI_COMPLETION_TIMEOUT)) { 293 QSPI_COMPLETION_TIMEOUT)) {
diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index af98b096af2f..175c9956cbe3 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -144,10 +144,9 @@ struct ffs_io_data {
144 bool read; 144 bool read;
145 145
146 struct kiocb *kiocb; 146 struct kiocb *kiocb;
147 const struct iovec *iovec; 147 struct iov_iter data;
148 unsigned long nr_segs; 148 const void *to_free;
149 char __user *buf; 149 char *buf;
150 size_t len;
151 150
152 struct mm_struct *mm; 151 struct mm_struct *mm;
153 struct work_struct work; 152 struct work_struct work;
@@ -649,29 +648,10 @@ static void ffs_user_copy_worker(struct work_struct *work)
649 io_data->req->actual; 648 io_data->req->actual;
650 649
651 if (io_data->read && ret > 0) { 650 if (io_data->read && ret > 0) {
652 int i;
653 size_t pos = 0;
654
655 /*
656 * Since req->length may be bigger than io_data->len (after
657 * being rounded up to maxpacketsize), we may end up with more
658 * data then user space has space for.
659 */
660 ret = min_t(int, ret, io_data->len);
661
662 use_mm(io_data->mm); 651 use_mm(io_data->mm);
663 for (i = 0; i < io_data->nr_segs; i++) { 652 ret = copy_to_iter(io_data->buf, ret, &io_data->data);
664 size_t len = min_t(size_t, ret - pos, 653 if (iov_iter_count(&io_data->data))
665 io_data->iovec[i].iov_len); 654 ret = -EFAULT;
666 if (!len)
667 break;
668 if (unlikely(copy_to_user(io_data->iovec[i].iov_base,
669 &io_data->buf[pos], len))) {
670 ret = -EFAULT;
671 break;
672 }
673 pos += len;
674 }
675 unuse_mm(io_data->mm); 655 unuse_mm(io_data->mm);
676 } 656 }
677 657
@@ -684,7 +664,7 @@ static void ffs_user_copy_worker(struct work_struct *work)
684 664
685 io_data->kiocb->private = NULL; 665 io_data->kiocb->private = NULL;
686 if (io_data->read) 666 if (io_data->read)
687 kfree(io_data->iovec); 667 kfree(io_data->to_free);
688 kfree(io_data->buf); 668 kfree(io_data->buf);
689 kfree(io_data); 669 kfree(io_data);
690} 670}
@@ -743,6 +723,7 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
743 * before the waiting completes, so do not assign to 'gadget' earlier 723 * before the waiting completes, so do not assign to 'gadget' earlier
744 */ 724 */
745 struct usb_gadget *gadget = epfile->ffs->gadget; 725 struct usb_gadget *gadget = epfile->ffs->gadget;
726 size_t copied;
746 727
747 spin_lock_irq(&epfile->ffs->eps_lock); 728 spin_lock_irq(&epfile->ffs->eps_lock);
748 /* In the meantime, endpoint got disabled or changed. */ 729 /* In the meantime, endpoint got disabled or changed. */
@@ -750,34 +731,21 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
750 spin_unlock_irq(&epfile->ffs->eps_lock); 731 spin_unlock_irq(&epfile->ffs->eps_lock);
751 return -ESHUTDOWN; 732 return -ESHUTDOWN;
752 } 733 }
734 data_len = iov_iter_count(&io_data->data);
753 /* 735 /*
754 * Controller may require buffer size to be aligned to 736 * Controller may require buffer size to be aligned to
755 * maxpacketsize of an out endpoint. 737 * maxpacketsize of an out endpoint.
756 */ 738 */
757 data_len = io_data->read ? 739 if (io_data->read)
758 usb_ep_align_maybe(gadget, ep->ep, io_data->len) : 740 data_len = usb_ep_align_maybe(gadget, ep->ep, data_len);
759 io_data->len;
760 spin_unlock_irq(&epfile->ffs->eps_lock); 741 spin_unlock_irq(&epfile->ffs->eps_lock);
761 742
762 data = kmalloc(data_len, GFP_KERNEL); 743 data = kmalloc(data_len, GFP_KERNEL);
763 if (unlikely(!data)) 744 if (unlikely(!data))
764 return -ENOMEM; 745 return -ENOMEM;
765 if (io_data->aio && !io_data->read) { 746 if (!io_data->read) {
766 int i; 747 copied = copy_from_iter(data, data_len, &io_data->data);
767 size_t pos = 0; 748 if (copied != data_len) {
768 for (i = 0; i < io_data->nr_segs; i++) {
769 if (unlikely(copy_from_user(&data[pos],
770 io_data->iovec[i].iov_base,
771 io_data->iovec[i].iov_len))) {
772 ret = -EFAULT;
773 goto error;
774 }
775 pos += io_data->iovec[i].iov_len;
776 }
777 } else {
778 if (!io_data->read &&
779 unlikely(__copy_from_user(data, io_data->buf,
780 io_data->len))) {
781 ret = -EFAULT; 749 ret = -EFAULT;
782 goto error; 750 goto error;
783 } 751 }
@@ -876,10 +844,8 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
876 */ 844 */
877 ret = ep->status; 845 ret = ep->status;
878 if (io_data->read && ret > 0) { 846 if (io_data->read && ret > 0) {
879 ret = min_t(size_t, ret, io_data->len); 847 ret = copy_to_iter(data, ret, &io_data->data);
880 848 if (unlikely(iov_iter_count(&io_data->data)))
881 if (unlikely(copy_to_user(io_data->buf,
882 data, ret)))
883 ret = -EFAULT; 849 ret = -EFAULT;
884 } 850 }
885 } 851 }
@@ -898,37 +864,6 @@ error:
898 return ret; 864 return ret;
899} 865}
900 866
901static ssize_t
902ffs_epfile_write(struct file *file, const char __user *buf, size_t len,
903 loff_t *ptr)
904{
905 struct ffs_io_data io_data;
906
907 ENTER();
908
909 io_data.aio = false;
910 io_data.read = false;
911 io_data.buf = (char * __user)buf;
912 io_data.len = len;
913
914 return ffs_epfile_io(file, &io_data);
915}
916
917static ssize_t
918ffs_epfile_read(struct file *file, char __user *buf, size_t len, loff_t *ptr)
919{
920 struct ffs_io_data io_data;
921
922 ENTER();
923
924 io_data.aio = false;
925 io_data.read = true;
926 io_data.buf = buf;
927 io_data.len = len;
928
929 return ffs_epfile_io(file, &io_data);
930}
931
932static int 867static int
933ffs_epfile_open(struct inode *inode, struct file *file) 868ffs_epfile_open(struct inode *inode, struct file *file)
934{ 869{
@@ -965,67 +900,86 @@ static int ffs_aio_cancel(struct kiocb *kiocb)
965 return value; 900 return value;
966} 901}
967 902
968static ssize_t ffs_epfile_aio_write(struct kiocb *kiocb, 903static ssize_t ffs_epfile_write_iter(struct kiocb *kiocb, struct iov_iter *from)
969 const struct iovec *iovec,
970 unsigned long nr_segs, loff_t loff)
971{ 904{
972 struct ffs_io_data *io_data; 905 struct ffs_io_data io_data, *p = &io_data;
906 ssize_t res;
973 907
974 ENTER(); 908 ENTER();
975 909
976 io_data = kmalloc(sizeof(*io_data), GFP_KERNEL); 910 if (!is_sync_kiocb(kiocb)) {
977 if (unlikely(!io_data)) 911 p = kmalloc(sizeof(io_data), GFP_KERNEL);
978 return -ENOMEM; 912 if (unlikely(!p))
913 return -ENOMEM;
914 p->aio = true;
915 } else {
916 p->aio = false;
917 }
979 918
980 io_data->aio = true; 919 p->read = false;
981 io_data->read = false; 920 p->kiocb = kiocb;
982 io_data->kiocb = kiocb; 921 p->data = *from;
983 io_data->iovec = iovec; 922 p->mm = current->mm;
984 io_data->nr_segs = nr_segs;
985 io_data->len = kiocb->ki_nbytes;
986 io_data->mm = current->mm;
987 923
988 kiocb->private = io_data; 924 kiocb->private = p;
989 925
990 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel); 926 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel);
991 927
992 return ffs_epfile_io(kiocb->ki_filp, io_data); 928 res = ffs_epfile_io(kiocb->ki_filp, p);
929 if (res == -EIOCBQUEUED)
930 return res;
931 if (p->aio)
932 kfree(p);
933 else
934 *from = p->data;
935 return res;
993} 936}
994 937
995static ssize_t ffs_epfile_aio_read(struct kiocb *kiocb, 938static ssize_t ffs_epfile_read_iter(struct kiocb *kiocb, struct iov_iter *to)
996 const struct iovec *iovec,
997 unsigned long nr_segs, loff_t loff)
998{ 939{
999 struct ffs_io_data *io_data; 940 struct ffs_io_data io_data, *p = &io_data;
1000 struct iovec *iovec_copy; 941 ssize_t res;
1001 942
1002 ENTER(); 943 ENTER();
1003 944
1004 iovec_copy = kmalloc_array(nr_segs, sizeof(*iovec_copy), GFP_KERNEL); 945 if (!is_sync_kiocb(kiocb)) {
1005 if (unlikely(!iovec_copy)) 946 p = kmalloc(sizeof(io_data), GFP_KERNEL);
1006 return -ENOMEM; 947 if (unlikely(!p))
1007 948 return -ENOMEM;
1008 memcpy(iovec_copy, iovec, sizeof(struct iovec)*nr_segs); 949 p->aio = true;
1009 950 } else {
1010 io_data = kmalloc(sizeof(*io_data), GFP_KERNEL); 951 p->aio = false;
1011 if (unlikely(!io_data)) {
1012 kfree(iovec_copy);
1013 return -ENOMEM;
1014 } 952 }
1015 953
1016 io_data->aio = true; 954 p->read = true;
1017 io_data->read = true; 955 p->kiocb = kiocb;
1018 io_data->kiocb = kiocb; 956 if (p->aio) {
1019 io_data->iovec = iovec_copy; 957 p->to_free = dup_iter(&p->data, to, GFP_KERNEL);
1020 io_data->nr_segs = nr_segs; 958 if (!p->to_free) {
1021 io_data->len = kiocb->ki_nbytes; 959 kfree(p);
1022 io_data->mm = current->mm; 960 return -ENOMEM;
961 }
962 } else {
963 p->data = *to;
964 p->to_free = NULL;
965 }
966 p->mm = current->mm;
1023 967
1024 kiocb->private = io_data; 968 kiocb->private = p;
1025 969
1026 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel); 970 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel);
1027 971
1028 return ffs_epfile_io(kiocb->ki_filp, io_data); 972 res = ffs_epfile_io(kiocb->ki_filp, p);
973 if (res == -EIOCBQUEUED)
974 return res;
975
976 if (p->aio) {
977 kfree(p->to_free);
978 kfree(p);
979 } else {
980 *to = p->data;
981 }
982 return res;
1029} 983}
1030 984
1031static int 985static int
@@ -1105,10 +1059,10 @@ static const struct file_operations ffs_epfile_operations = {
1105 .llseek = no_llseek, 1059 .llseek = no_llseek,
1106 1060
1107 .open = ffs_epfile_open, 1061 .open = ffs_epfile_open,
1108 .write = ffs_epfile_write, 1062 .write = new_sync_write,
1109 .read = ffs_epfile_read, 1063 .read = new_sync_read,
1110 .aio_write = ffs_epfile_aio_write, 1064 .write_iter = ffs_epfile_write_iter,
1111 .aio_read = ffs_epfile_aio_read, 1065 .read_iter = ffs_epfile_read_iter,
1112 .release = ffs_epfile_release, 1066 .release = ffs_epfile_release,
1113 .unlocked_ioctl = ffs_epfile_ioctl, 1067 .unlocked_ioctl = ffs_epfile_ioctl,
1114}; 1068};
diff --git a/drivers/usb/gadget/legacy/inode.c b/drivers/usb/gadget/legacy/inode.c
index db49ec4c748e..200f9a584064 100644
--- a/drivers/usb/gadget/legacy/inode.c
+++ b/drivers/usb/gadget/legacy/inode.c
@@ -74,6 +74,8 @@ MODULE_DESCRIPTION (DRIVER_DESC);
74MODULE_AUTHOR ("David Brownell"); 74MODULE_AUTHOR ("David Brownell");
75MODULE_LICENSE ("GPL"); 75MODULE_LICENSE ("GPL");
76 76
77static int ep_open(struct inode *, struct file *);
78
77 79
78/*----------------------------------------------------------------------*/ 80/*----------------------------------------------------------------------*/
79 81
@@ -283,14 +285,15 @@ static void epio_complete (struct usb_ep *ep, struct usb_request *req)
283 * still need dev->lock to use epdata->ep. 285 * still need dev->lock to use epdata->ep.
284 */ 286 */
285static int 287static int
286get_ready_ep (unsigned f_flags, struct ep_data *epdata) 288get_ready_ep (unsigned f_flags, struct ep_data *epdata, bool is_write)
287{ 289{
288 int val; 290 int val;
289 291
290 if (f_flags & O_NONBLOCK) { 292 if (f_flags & O_NONBLOCK) {
291 if (!mutex_trylock(&epdata->lock)) 293 if (!mutex_trylock(&epdata->lock))
292 goto nonblock; 294 goto nonblock;
293 if (epdata->state != STATE_EP_ENABLED) { 295 if (epdata->state != STATE_EP_ENABLED &&
296 (!is_write || epdata->state != STATE_EP_READY)) {
294 mutex_unlock(&epdata->lock); 297 mutex_unlock(&epdata->lock);
295nonblock: 298nonblock:
296 val = -EAGAIN; 299 val = -EAGAIN;
@@ -305,18 +308,20 @@ nonblock:
305 308
306 switch (epdata->state) { 309 switch (epdata->state) {
307 case STATE_EP_ENABLED: 310 case STATE_EP_ENABLED:
311 return 0;
312 case STATE_EP_READY: /* not configured yet */
313 if (is_write)
314 return 0;
315 // FALLTHRU
316 case STATE_EP_UNBOUND: /* clean disconnect */
308 break; 317 break;
309 // case STATE_EP_DISABLED: /* "can't happen" */ 318 // case STATE_EP_DISABLED: /* "can't happen" */
310 // case STATE_EP_READY: /* "can't happen" */
311 default: /* error! */ 319 default: /* error! */
312 pr_debug ("%s: ep %p not available, state %d\n", 320 pr_debug ("%s: ep %p not available, state %d\n",
313 shortname, epdata, epdata->state); 321 shortname, epdata, epdata->state);
314 // FALLTHROUGH
315 case STATE_EP_UNBOUND: /* clean disconnect */
316 val = -ENODEV;
317 mutex_unlock(&epdata->lock);
318 } 322 }
319 return val; 323 mutex_unlock(&epdata->lock);
324 return -ENODEV;
320} 325}
321 326
322static ssize_t 327static ssize_t
@@ -363,97 +368,6 @@ ep_io (struct ep_data *epdata, void *buf, unsigned len)
363 return value; 368 return value;
364} 369}
365 370
366
367/* handle a synchronous OUT bulk/intr/iso transfer */
368static ssize_t
369ep_read (struct file *fd, char __user *buf, size_t len, loff_t *ptr)
370{
371 struct ep_data *data = fd->private_data;
372 void *kbuf;
373 ssize_t value;
374
375 if ((value = get_ready_ep (fd->f_flags, data)) < 0)
376 return value;
377
378 /* halt any endpoint by doing a "wrong direction" i/o call */
379 if (usb_endpoint_dir_in(&data->desc)) {
380 if (usb_endpoint_xfer_isoc(&data->desc)) {
381 mutex_unlock(&data->lock);
382 return -EINVAL;
383 }
384 DBG (data->dev, "%s halt\n", data->name);
385 spin_lock_irq (&data->dev->lock);
386 if (likely (data->ep != NULL))
387 usb_ep_set_halt (data->ep);
388 spin_unlock_irq (&data->dev->lock);
389 mutex_unlock(&data->lock);
390 return -EBADMSG;
391 }
392
393 /* FIXME readahead for O_NONBLOCK and poll(); careful with ZLPs */
394
395 value = -ENOMEM;
396 kbuf = kmalloc (len, GFP_KERNEL);
397 if (unlikely (!kbuf))
398 goto free1;
399
400 value = ep_io (data, kbuf, len);
401 VDEBUG (data->dev, "%s read %zu OUT, status %d\n",
402 data->name, len, (int) value);
403 if (value >= 0 && copy_to_user (buf, kbuf, value))
404 value = -EFAULT;
405
406free1:
407 mutex_unlock(&data->lock);
408 kfree (kbuf);
409 return value;
410}
411
412/* handle a synchronous IN bulk/intr/iso transfer */
413static ssize_t
414ep_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
415{
416 struct ep_data *data = fd->private_data;
417 void *kbuf;
418 ssize_t value;
419
420 if ((value = get_ready_ep (fd->f_flags, data)) < 0)
421 return value;
422
423 /* halt any endpoint by doing a "wrong direction" i/o call */
424 if (!usb_endpoint_dir_in(&data->desc)) {
425 if (usb_endpoint_xfer_isoc(&data->desc)) {
426 mutex_unlock(&data->lock);
427 return -EINVAL;
428 }
429 DBG (data->dev, "%s halt\n", data->name);
430 spin_lock_irq (&data->dev->lock);
431 if (likely (data->ep != NULL))
432 usb_ep_set_halt (data->ep);
433 spin_unlock_irq (&data->dev->lock);
434 mutex_unlock(&data->lock);
435 return -EBADMSG;
436 }
437
438 /* FIXME writebehind for O_NONBLOCK and poll(), qlen = 1 */
439
440 value = -ENOMEM;
441 kbuf = memdup_user(buf, len);
442 if (IS_ERR(kbuf)) {
443 value = PTR_ERR(kbuf);
444 kbuf = NULL;
445 goto free1;
446 }
447
448 value = ep_io (data, kbuf, len);
449 VDEBUG (data->dev, "%s write %zu IN, status %d\n",
450 data->name, len, (int) value);
451free1:
452 mutex_unlock(&data->lock);
453 kfree (kbuf);
454 return value;
455}
456
457static int 371static int
458ep_release (struct inode *inode, struct file *fd) 372ep_release (struct inode *inode, struct file *fd)
459{ 373{
@@ -481,7 +395,7 @@ static long ep_ioctl(struct file *fd, unsigned code, unsigned long value)
481 struct ep_data *data = fd->private_data; 395 struct ep_data *data = fd->private_data;
482 int status; 396 int status;
483 397
484 if ((status = get_ready_ep (fd->f_flags, data)) < 0) 398 if ((status = get_ready_ep (fd->f_flags, data, false)) < 0)
485 return status; 399 return status;
486 400
487 spin_lock_irq (&data->dev->lock); 401 spin_lock_irq (&data->dev->lock);
@@ -517,8 +431,8 @@ struct kiocb_priv {
517 struct mm_struct *mm; 431 struct mm_struct *mm;
518 struct work_struct work; 432 struct work_struct work;
519 void *buf; 433 void *buf;
520 const struct iovec *iv; 434 struct iov_iter to;
521 unsigned long nr_segs; 435 const void *to_free;
522 unsigned actual; 436 unsigned actual;
523}; 437};
524 438
@@ -541,35 +455,6 @@ static int ep_aio_cancel(struct kiocb *iocb)
541 return value; 455 return value;
542} 456}
543 457
544static ssize_t ep_copy_to_user(struct kiocb_priv *priv)
545{
546 ssize_t len, total;
547 void *to_copy;
548 int i;
549
550 /* copy stuff into user buffers */
551 total = priv->actual;
552 len = 0;
553 to_copy = priv->buf;
554 for (i=0; i < priv->nr_segs; i++) {
555 ssize_t this = min((ssize_t)(priv->iv[i].iov_len), total);
556
557 if (copy_to_user(priv->iv[i].iov_base, to_copy, this)) {
558 if (len == 0)
559 len = -EFAULT;
560 break;
561 }
562
563 total -= this;
564 len += this;
565 to_copy += this;
566 if (total == 0)
567 break;
568 }
569
570 return len;
571}
572
573static void ep_user_copy_worker(struct work_struct *work) 458static void ep_user_copy_worker(struct work_struct *work)
574{ 459{
575 struct kiocb_priv *priv = container_of(work, struct kiocb_priv, work); 460 struct kiocb_priv *priv = container_of(work, struct kiocb_priv, work);
@@ -578,13 +463,16 @@ static void ep_user_copy_worker(struct work_struct *work)
578 size_t ret; 463 size_t ret;
579 464
580 use_mm(mm); 465 use_mm(mm);
581 ret = ep_copy_to_user(priv); 466 ret = copy_to_iter(priv->buf, priv->actual, &priv->to);
582 unuse_mm(mm); 467 unuse_mm(mm);
468 if (!ret)
469 ret = -EFAULT;
583 470
584 /* completing the iocb can drop the ctx and mm, don't touch mm after */ 471 /* completing the iocb can drop the ctx and mm, don't touch mm after */
585 aio_complete(iocb, ret, ret); 472 aio_complete(iocb, ret, ret);
586 473
587 kfree(priv->buf); 474 kfree(priv->buf);
475 kfree(priv->to_free);
588 kfree(priv); 476 kfree(priv);
589} 477}
590 478
@@ -603,8 +491,9 @@ static void ep_aio_complete(struct usb_ep *ep, struct usb_request *req)
603 * don't need to copy anything to userspace, so we can 491 * don't need to copy anything to userspace, so we can
604 * complete the aio request immediately. 492 * complete the aio request immediately.
605 */ 493 */
606 if (priv->iv == NULL || unlikely(req->actual == 0)) { 494 if (priv->to_free == NULL || unlikely(req->actual == 0)) {
607 kfree(req->buf); 495 kfree(req->buf);
496 kfree(priv->to_free);
608 kfree(priv); 497 kfree(priv);
609 iocb->private = NULL; 498 iocb->private = NULL;
610 /* aio_complete() reports bytes-transferred _and_ faults */ 499 /* aio_complete() reports bytes-transferred _and_ faults */
@@ -618,6 +507,7 @@ static void ep_aio_complete(struct usb_ep *ep, struct usb_request *req)
618 507
619 priv->buf = req->buf; 508 priv->buf = req->buf;
620 priv->actual = req->actual; 509 priv->actual = req->actual;
510 INIT_WORK(&priv->work, ep_user_copy_worker);
621 schedule_work(&priv->work); 511 schedule_work(&priv->work);
622 } 512 }
623 spin_unlock(&epdata->dev->lock); 513 spin_unlock(&epdata->dev->lock);
@@ -626,38 +516,17 @@ static void ep_aio_complete(struct usb_ep *ep, struct usb_request *req)
626 put_ep(epdata); 516 put_ep(epdata);
627} 517}
628 518
629static ssize_t 519static ssize_t ep_aio(struct kiocb *iocb,
630ep_aio_rwtail( 520 struct kiocb_priv *priv,
631 struct kiocb *iocb, 521 struct ep_data *epdata,
632 char *buf, 522 char *buf,
633 size_t len, 523 size_t len)
634 struct ep_data *epdata,
635 const struct iovec *iv,
636 unsigned long nr_segs
637)
638{ 524{
639 struct kiocb_priv *priv; 525 struct usb_request *req;
640 struct usb_request *req; 526 ssize_t value;
641 ssize_t value;
642 527
643 priv = kmalloc(sizeof *priv, GFP_KERNEL);
644 if (!priv) {
645 value = -ENOMEM;
646fail:
647 kfree(buf);
648 return value;
649 }
650 iocb->private = priv; 528 iocb->private = priv;
651 priv->iocb = iocb; 529 priv->iocb = iocb;
652 priv->iv = iv;
653 priv->nr_segs = nr_segs;
654 INIT_WORK(&priv->work, ep_user_copy_worker);
655
656 value = get_ready_ep(iocb->ki_filp->f_flags, epdata);
657 if (unlikely(value < 0)) {
658 kfree(priv);
659 goto fail;
660 }
661 530
662 kiocb_set_cancel_fn(iocb, ep_aio_cancel); 531 kiocb_set_cancel_fn(iocb, ep_aio_cancel);
663 get_ep(epdata); 532 get_ep(epdata);
@@ -669,75 +538,154 @@ fail:
669 * allocate or submit those if the host disconnected. 538 * allocate or submit those if the host disconnected.
670 */ 539 */
671 spin_lock_irq(&epdata->dev->lock); 540 spin_lock_irq(&epdata->dev->lock);
672 if (likely(epdata->ep)) { 541 value = -ENODEV;
673 req = usb_ep_alloc_request(epdata->ep, GFP_ATOMIC); 542 if (unlikely(epdata->ep))
674 if (likely(req)) { 543 goto fail;
675 priv->req = req;
676 req->buf = buf;
677 req->length = len;
678 req->complete = ep_aio_complete;
679 req->context = iocb;
680 value = usb_ep_queue(epdata->ep, req, GFP_ATOMIC);
681 if (unlikely(0 != value))
682 usb_ep_free_request(epdata->ep, req);
683 } else
684 value = -EAGAIN;
685 } else
686 value = -ENODEV;
687 spin_unlock_irq(&epdata->dev->lock);
688 544
689 mutex_unlock(&epdata->lock); 545 req = usb_ep_alloc_request(epdata->ep, GFP_ATOMIC);
546 value = -ENOMEM;
547 if (unlikely(!req))
548 goto fail;
690 549
691 if (unlikely(value)) { 550 priv->req = req;
692 kfree(priv); 551 req->buf = buf;
693 put_ep(epdata); 552 req->length = len;
694 } else 553 req->complete = ep_aio_complete;
695 value = -EIOCBQUEUED; 554 req->context = iocb;
555 value = usb_ep_queue(epdata->ep, req, GFP_ATOMIC);
556 if (unlikely(0 != value)) {
557 usb_ep_free_request(epdata->ep, req);
558 goto fail;
559 }
560 spin_unlock_irq(&epdata->dev->lock);
561 return -EIOCBQUEUED;
562
563fail:
564 spin_unlock_irq(&epdata->dev->lock);
565 kfree(priv->to_free);
566 kfree(priv);
567 put_ep(epdata);
696 return value; 568 return value;
697} 569}
698 570
699static ssize_t 571static ssize_t
700ep_aio_read(struct kiocb *iocb, const struct iovec *iov, 572ep_read_iter(struct kiocb *iocb, struct iov_iter *to)
701 unsigned long nr_segs, loff_t o)
702{ 573{
703 struct ep_data *epdata = iocb->ki_filp->private_data; 574 struct file *file = iocb->ki_filp;
704 char *buf; 575 struct ep_data *epdata = file->private_data;
576 size_t len = iov_iter_count(to);
577 ssize_t value;
578 char *buf;
705 579
706 if (unlikely(usb_endpoint_dir_in(&epdata->desc))) 580 if ((value = get_ready_ep(file->f_flags, epdata, false)) < 0)
707 return -EINVAL; 581 return value;
708 582
709 buf = kmalloc(iocb->ki_nbytes, GFP_KERNEL); 583 /* halt any endpoint by doing a "wrong direction" i/o call */
710 if (unlikely(!buf)) 584 if (usb_endpoint_dir_in(&epdata->desc)) {
711 return -ENOMEM; 585 if (usb_endpoint_xfer_isoc(&epdata->desc) ||
586 !is_sync_kiocb(iocb)) {
587 mutex_unlock(&epdata->lock);
588 return -EINVAL;
589 }
590 DBG (epdata->dev, "%s halt\n", epdata->name);
591 spin_lock_irq(&epdata->dev->lock);
592 if (likely(epdata->ep != NULL))
593 usb_ep_set_halt(epdata->ep);
594 spin_unlock_irq(&epdata->dev->lock);
595 mutex_unlock(&epdata->lock);
596 return -EBADMSG;
597 }
712 598
713 return ep_aio_rwtail(iocb, buf, iocb->ki_nbytes, epdata, iov, nr_segs); 599 buf = kmalloc(len, GFP_KERNEL);
600 if (unlikely(!buf)) {
601 mutex_unlock(&epdata->lock);
602 return -ENOMEM;
603 }
604 if (is_sync_kiocb(iocb)) {
605 value = ep_io(epdata, buf, len);
606 if (value >= 0 && copy_to_iter(buf, value, to))
607 value = -EFAULT;
608 } else {
609 struct kiocb_priv *priv = kzalloc(sizeof *priv, GFP_KERNEL);
610 value = -ENOMEM;
611 if (!priv)
612 goto fail;
613 priv->to_free = dup_iter(&priv->to, to, GFP_KERNEL);
614 if (!priv->to_free) {
615 kfree(priv);
616 goto fail;
617 }
618 value = ep_aio(iocb, priv, epdata, buf, len);
619 if (value == -EIOCBQUEUED)
620 buf = NULL;
621 }
622fail:
623 kfree(buf);
624 mutex_unlock(&epdata->lock);
625 return value;
714} 626}
715 627
628static ssize_t ep_config(struct ep_data *, const char *, size_t);
629
716static ssize_t 630static ssize_t
717ep_aio_write(struct kiocb *iocb, const struct iovec *iov, 631ep_write_iter(struct kiocb *iocb, struct iov_iter *from)
718 unsigned long nr_segs, loff_t o)
719{ 632{
720 struct ep_data *epdata = iocb->ki_filp->private_data; 633 struct file *file = iocb->ki_filp;
721 char *buf; 634 struct ep_data *epdata = file->private_data;
722 size_t len = 0; 635 size_t len = iov_iter_count(from);
723 int i = 0; 636 bool configured;
637 ssize_t value;
638 char *buf;
639
640 if ((value = get_ready_ep(file->f_flags, epdata, true)) < 0)
641 return value;
724 642
725 if (unlikely(!usb_endpoint_dir_in(&epdata->desc))) 643 configured = epdata->state == STATE_EP_ENABLED;
726 return -EINVAL;
727 644
728 buf = kmalloc(iocb->ki_nbytes, GFP_KERNEL); 645 /* halt any endpoint by doing a "wrong direction" i/o call */
729 if (unlikely(!buf)) 646 if (configured && !usb_endpoint_dir_in(&epdata->desc)) {
647 if (usb_endpoint_xfer_isoc(&epdata->desc) ||
648 !is_sync_kiocb(iocb)) {
649 mutex_unlock(&epdata->lock);
650 return -EINVAL;
651 }
652 DBG (epdata->dev, "%s halt\n", epdata->name);
653 spin_lock_irq(&epdata->dev->lock);
654 if (likely(epdata->ep != NULL))
655 usb_ep_set_halt(epdata->ep);
656 spin_unlock_irq(&epdata->dev->lock);
657 mutex_unlock(&epdata->lock);
658 return -EBADMSG;
659 }
660
661 buf = kmalloc(len, GFP_KERNEL);
662 if (unlikely(!buf)) {
663 mutex_unlock(&epdata->lock);
730 return -ENOMEM; 664 return -ENOMEM;
665 }
731 666
732 for (i=0; i < nr_segs; i++) { 667 if (unlikely(copy_from_iter(buf, len, from) != len)) {
733 if (unlikely(copy_from_user(&buf[len], iov[i].iov_base, 668 value = -EFAULT;
734 iov[i].iov_len) != 0)) { 669 goto out;
735 kfree(buf); 670 }
736 return -EFAULT; 671
672 if (unlikely(!configured)) {
673 value = ep_config(epdata, buf, len);
674 } else if (is_sync_kiocb(iocb)) {
675 value = ep_io(epdata, buf, len);
676 } else {
677 struct kiocb_priv *priv = kzalloc(sizeof *priv, GFP_KERNEL);
678 value = -ENOMEM;
679 if (priv) {
680 value = ep_aio(iocb, priv, epdata, buf, len);
681 if (value == -EIOCBQUEUED)
682 buf = NULL;
737 } 683 }
738 len += iov[i].iov_len;
739 } 684 }
740 return ep_aio_rwtail(iocb, buf, len, epdata, NULL, 0); 685out:
686 kfree(buf);
687 mutex_unlock(&epdata->lock);
688 return value;
741} 689}
742 690
743/*----------------------------------------------------------------------*/ 691/*----------------------------------------------------------------------*/
@@ -745,15 +693,15 @@ ep_aio_write(struct kiocb *iocb, const struct iovec *iov,
745/* used after endpoint configuration */ 693/* used after endpoint configuration */
746static const struct file_operations ep_io_operations = { 694static const struct file_operations ep_io_operations = {
747 .owner = THIS_MODULE, 695 .owner = THIS_MODULE,
748 .llseek = no_llseek,
749 696
750 .read = ep_read, 697 .open = ep_open,
751 .write = ep_write,
752 .unlocked_ioctl = ep_ioctl,
753 .release = ep_release, 698 .release = ep_release,
754 699 .llseek = no_llseek,
755 .aio_read = ep_aio_read, 700 .read = new_sync_read,
756 .aio_write = ep_aio_write, 701 .write = new_sync_write,
702 .unlocked_ioctl = ep_ioctl,
703 .read_iter = ep_read_iter,
704 .write_iter = ep_write_iter,
757}; 705};
758 706
759/* ENDPOINT INITIALIZATION 707/* ENDPOINT INITIALIZATION
@@ -770,17 +718,12 @@ static const struct file_operations ep_io_operations = {
770 * speed descriptor, then optional high speed descriptor. 718 * speed descriptor, then optional high speed descriptor.
771 */ 719 */
772static ssize_t 720static ssize_t
773ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr) 721ep_config (struct ep_data *data, const char *buf, size_t len)
774{ 722{
775 struct ep_data *data = fd->private_data;
776 struct usb_ep *ep; 723 struct usb_ep *ep;
777 u32 tag; 724 u32 tag;
778 int value, length = len; 725 int value, length = len;
779 726
780 value = mutex_lock_interruptible(&data->lock);
781 if (value < 0)
782 return value;
783
784 if (data->state != STATE_EP_READY) { 727 if (data->state != STATE_EP_READY) {
785 value = -EL2HLT; 728 value = -EL2HLT;
786 goto fail; 729 goto fail;
@@ -791,9 +734,7 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
791 goto fail0; 734 goto fail0;
792 735
793 /* we might need to change message format someday */ 736 /* we might need to change message format someday */
794 if (copy_from_user (&tag, buf, 4)) { 737 memcpy(&tag, buf, 4);
795 goto fail1;
796 }
797 if (tag != 1) { 738 if (tag != 1) {
798 DBG(data->dev, "config %s, bad tag %d\n", data->name, tag); 739 DBG(data->dev, "config %s, bad tag %d\n", data->name, tag);
799 goto fail0; 740 goto fail0;
@@ -806,19 +747,15 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
806 */ 747 */
807 748
808 /* full/low speed descriptor, then high speed */ 749 /* full/low speed descriptor, then high speed */
809 if (copy_from_user (&data->desc, buf, USB_DT_ENDPOINT_SIZE)) { 750 memcpy(&data->desc, buf, USB_DT_ENDPOINT_SIZE);
810 goto fail1;
811 }
812 if (data->desc.bLength != USB_DT_ENDPOINT_SIZE 751 if (data->desc.bLength != USB_DT_ENDPOINT_SIZE
813 || data->desc.bDescriptorType != USB_DT_ENDPOINT) 752 || data->desc.bDescriptorType != USB_DT_ENDPOINT)
814 goto fail0; 753 goto fail0;
815 if (len != USB_DT_ENDPOINT_SIZE) { 754 if (len != USB_DT_ENDPOINT_SIZE) {
816 if (len != 2 * USB_DT_ENDPOINT_SIZE) 755 if (len != 2 * USB_DT_ENDPOINT_SIZE)
817 goto fail0; 756 goto fail0;
818 if (copy_from_user (&data->hs_desc, buf + USB_DT_ENDPOINT_SIZE, 757 memcpy(&data->hs_desc, buf + USB_DT_ENDPOINT_SIZE,
819 USB_DT_ENDPOINT_SIZE)) { 758 USB_DT_ENDPOINT_SIZE);
820 goto fail1;
821 }
822 if (data->hs_desc.bLength != USB_DT_ENDPOINT_SIZE 759 if (data->hs_desc.bLength != USB_DT_ENDPOINT_SIZE
823 || data->hs_desc.bDescriptorType 760 || data->hs_desc.bDescriptorType
824 != USB_DT_ENDPOINT) { 761 != USB_DT_ENDPOINT) {
@@ -840,24 +777,20 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
840 case USB_SPEED_LOW: 777 case USB_SPEED_LOW:
841 case USB_SPEED_FULL: 778 case USB_SPEED_FULL:
842 ep->desc = &data->desc; 779 ep->desc = &data->desc;
843 value = usb_ep_enable(ep);
844 if (value == 0)
845 data->state = STATE_EP_ENABLED;
846 break; 780 break;
847 case USB_SPEED_HIGH: 781 case USB_SPEED_HIGH:
848 /* fails if caller didn't provide that descriptor... */ 782 /* fails if caller didn't provide that descriptor... */
849 ep->desc = &data->hs_desc; 783 ep->desc = &data->hs_desc;
850 value = usb_ep_enable(ep);
851 if (value == 0)
852 data->state = STATE_EP_ENABLED;
853 break; 784 break;
854 default: 785 default:
855 DBG(data->dev, "unconnected, %s init abandoned\n", 786 DBG(data->dev, "unconnected, %s init abandoned\n",
856 data->name); 787 data->name);
857 value = -EINVAL; 788 value = -EINVAL;
789 goto gone;
858 } 790 }
791 value = usb_ep_enable(ep);
859 if (value == 0) { 792 if (value == 0) {
860 fd->f_op = &ep_io_operations; 793 data->state = STATE_EP_ENABLED;
861 value = length; 794 value = length;
862 } 795 }
863gone: 796gone:
@@ -867,14 +800,10 @@ fail:
867 data->desc.bDescriptorType = 0; 800 data->desc.bDescriptorType = 0;
868 data->hs_desc.bDescriptorType = 0; 801 data->hs_desc.bDescriptorType = 0;
869 } 802 }
870 mutex_unlock(&data->lock);
871 return value; 803 return value;
872fail0: 804fail0:
873 value = -EINVAL; 805 value = -EINVAL;
874 goto fail; 806 goto fail;
875fail1:
876 value = -EFAULT;
877 goto fail;
878} 807}
879 808
880static int 809static int
@@ -902,15 +831,6 @@ ep_open (struct inode *inode, struct file *fd)
902 return value; 831 return value;
903} 832}
904 833
905/* used before endpoint configuration */
906static const struct file_operations ep_config_operations = {
907 .llseek = no_llseek,
908
909 .open = ep_open,
910 .write = ep_config,
911 .release = ep_release,
912};
913
914/*----------------------------------------------------------------------*/ 834/*----------------------------------------------------------------------*/
915 835
916/* EP0 IMPLEMENTATION can be partly in userspace. 836/* EP0 IMPLEMENTATION can be partly in userspace.
@@ -989,6 +909,10 @@ ep0_read (struct file *fd, char __user *buf, size_t len, loff_t *ptr)
989 enum ep0_state state; 909 enum ep0_state state;
990 910
991 spin_lock_irq (&dev->lock); 911 spin_lock_irq (&dev->lock);
912 if (dev->state <= STATE_DEV_OPENED) {
913 retval = -EINVAL;
914 goto done;
915 }
992 916
993 /* report fd mode change before acting on it */ 917 /* report fd mode change before acting on it */
994 if (dev->setup_abort) { 918 if (dev->setup_abort) {
@@ -1187,8 +1111,6 @@ ep0_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1187 struct dev_data *dev = fd->private_data; 1111 struct dev_data *dev = fd->private_data;
1188 ssize_t retval = -ESRCH; 1112 ssize_t retval = -ESRCH;
1189 1113
1190 spin_lock_irq (&dev->lock);
1191
1192 /* report fd mode change before acting on it */ 1114 /* report fd mode change before acting on it */
1193 if (dev->setup_abort) { 1115 if (dev->setup_abort) {
1194 dev->setup_abort = 0; 1116 dev->setup_abort = 0;
@@ -1234,7 +1156,6 @@ ep0_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1234 } else 1156 } else
1235 DBG (dev, "fail %s, state %d\n", __func__, dev->state); 1157 DBG (dev, "fail %s, state %d\n", __func__, dev->state);
1236 1158
1237 spin_unlock_irq (&dev->lock);
1238 return retval; 1159 return retval;
1239} 1160}
1240 1161
@@ -1281,6 +1202,9 @@ ep0_poll (struct file *fd, poll_table *wait)
1281 struct dev_data *dev = fd->private_data; 1202 struct dev_data *dev = fd->private_data;
1282 int mask = 0; 1203 int mask = 0;
1283 1204
1205 if (dev->state <= STATE_DEV_OPENED)
1206 return DEFAULT_POLLMASK;
1207
1284 poll_wait(fd, &dev->wait, wait); 1208 poll_wait(fd, &dev->wait, wait);
1285 1209
1286 spin_lock_irq (&dev->lock); 1210 spin_lock_irq (&dev->lock);
@@ -1316,19 +1240,6 @@ static long dev_ioctl (struct file *fd, unsigned code, unsigned long value)
1316 return ret; 1240 return ret;
1317} 1241}
1318 1242
1319/* used after device configuration */
1320static const struct file_operations ep0_io_operations = {
1321 .owner = THIS_MODULE,
1322 .llseek = no_llseek,
1323
1324 .read = ep0_read,
1325 .write = ep0_write,
1326 .fasync = ep0_fasync,
1327 .poll = ep0_poll,
1328 .unlocked_ioctl = dev_ioctl,
1329 .release = dev_release,
1330};
1331
1332/*----------------------------------------------------------------------*/ 1243/*----------------------------------------------------------------------*/
1333 1244
1334/* The in-kernel gadget driver handles most ep0 issues, in particular 1245/* The in-kernel gadget driver handles most ep0 issues, in particular
@@ -1650,7 +1561,7 @@ static int activate_ep_files (struct dev_data *dev)
1650 goto enomem1; 1561 goto enomem1;
1651 1562
1652 data->dentry = gadgetfs_create_file (dev->sb, data->name, 1563 data->dentry = gadgetfs_create_file (dev->sb, data->name,
1653 data, &ep_config_operations); 1564 data, &ep_io_operations);
1654 if (!data->dentry) 1565 if (!data->dentry)
1655 goto enomem2; 1566 goto enomem2;
1656 list_add_tail (&data->epfiles, &dev->epfiles); 1567 list_add_tail (&data->epfiles, &dev->epfiles);
@@ -1852,6 +1763,14 @@ dev_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1852 u32 tag; 1763 u32 tag;
1853 char *kbuf; 1764 char *kbuf;
1854 1765
1766 spin_lock_irq(&dev->lock);
1767 if (dev->state > STATE_DEV_OPENED) {
1768 value = ep0_write(fd, buf, len, ptr);
1769 spin_unlock_irq(&dev->lock);
1770 return value;
1771 }
1772 spin_unlock_irq(&dev->lock);
1773
1855 if (len < (USB_DT_CONFIG_SIZE + USB_DT_DEVICE_SIZE + 4)) 1774 if (len < (USB_DT_CONFIG_SIZE + USB_DT_DEVICE_SIZE + 4))
1856 return -EINVAL; 1775 return -EINVAL;
1857 1776
@@ -1925,7 +1844,6 @@ dev_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1925 * on, they can work ... except in cleanup paths that 1844 * on, they can work ... except in cleanup paths that
1926 * kick in after the ep0 descriptor is closed. 1845 * kick in after the ep0 descriptor is closed.
1927 */ 1846 */
1928 fd->f_op = &ep0_io_operations;
1929 value = len; 1847 value = len;
1930 } 1848 }
1931 return value; 1849 return value;
@@ -1956,12 +1874,14 @@ dev_open (struct inode *inode, struct file *fd)
1956 return value; 1874 return value;
1957} 1875}
1958 1876
1959static const struct file_operations dev_init_operations = { 1877static const struct file_operations ep0_operations = {
1960 .llseek = no_llseek, 1878 .llseek = no_llseek,
1961 1879
1962 .open = dev_open, 1880 .open = dev_open,
1881 .read = ep0_read,
1963 .write = dev_config, 1882 .write = dev_config,
1964 .fasync = ep0_fasync, 1883 .fasync = ep0_fasync,
1884 .poll = ep0_poll,
1965 .unlocked_ioctl = dev_ioctl, 1885 .unlocked_ioctl = dev_ioctl,
1966 .release = dev_release, 1886 .release = dev_release,
1967}; 1887};
@@ -2077,7 +1997,7 @@ gadgetfs_fill_super (struct super_block *sb, void *opts, int silent)
2077 goto Enomem; 1997 goto Enomem;
2078 1998
2079 dev->sb = sb; 1999 dev->sb = sb;
2080 dev->dentry = gadgetfs_create_file(sb, CHIP, dev, &dev_init_operations); 2000 dev->dentry = gadgetfs_create_file(sb, CHIP, dev, &ep0_operations);
2081 if (!dev->dentry) { 2001 if (!dev->dentry) {
2082 put_dev(dev); 2002 put_dev(dev);
2083 goto Enomem; 2003 goto Enomem;
diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c
index f88bfdf5b6a0..2027a27546ef 100644
--- a/drivers/vfio/pci/vfio_pci_intrs.c
+++ b/drivers/vfio/pci/vfio_pci_intrs.c
@@ -868,12 +868,14 @@ int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags,
868 func = vfio_pci_set_err_trigger; 868 func = vfio_pci_set_err_trigger;
869 break; 869 break;
870 } 870 }
871 break;
871 case VFIO_PCI_REQ_IRQ_INDEX: 872 case VFIO_PCI_REQ_IRQ_INDEX:
872 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) { 873 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
873 case VFIO_IRQ_SET_ACTION_TRIGGER: 874 case VFIO_IRQ_SET_ACTION_TRIGGER:
874 func = vfio_pci_set_req_trigger; 875 func = vfio_pci_set_req_trigger;
875 break; 876 break;
876 } 877 }
878 break;
877 } 879 }
878 880
879 if (!func) 881 if (!func)
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index b3dd417b4719..109462303087 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -479,7 +479,7 @@ config FB_ATARI
479 479
480config FB_OF 480config FB_OF
481 bool "Open Firmware frame buffer device support" 481 bool "Open Firmware frame buffer device support"
482 depends on (FB = y) && (PPC64 || PPC_OF) && (!PPC_PSERIES || PCI) 482 depends on (FB = y) && PPC && (!PPC_PSERIES || PCI)
483 select FB_CFB_FILLRECT 483 select FB_CFB_FILLRECT
484 select FB_CFB_COPYAREA 484 select FB_CFB_COPYAREA
485 select FB_CFB_IMAGEBLIT 485 select FB_CFB_IMAGEBLIT
@@ -1333,7 +1333,7 @@ config FB_RADEON
1333 select FB_CFB_FILLRECT 1333 select FB_CFB_FILLRECT
1334 select FB_CFB_COPYAREA 1334 select FB_CFB_COPYAREA
1335 select FB_CFB_IMAGEBLIT 1335 select FB_CFB_IMAGEBLIT
1336 select FB_MACMODES if PPC_OF 1336 select FB_MACMODES if PPC
1337 help 1337 help
1338 Choose this option if you want to use an ATI Radeon graphics card as 1338 Choose this option if you want to use an ATI Radeon graphics card as
1339 a framebuffer device. There are both PCI and AGP versions. You 1339 a framebuffer device. There are both PCI and AGP versions. You
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index 32c0b6b28097..9362424c2340 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -599,6 +599,9 @@ static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
599 599
600 len = clcdfb_snprintf_mode(NULL, 0, mode); 600 len = clcdfb_snprintf_mode(NULL, 0, mode);
601 name = devm_kzalloc(dev, len + 1, GFP_KERNEL); 601 name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
602 if (!name)
603 return -ENOMEM;
604
602 clcdfb_snprintf_mode(name, len + 1, mode); 605 clcdfb_snprintf_mode(name, len + 1, mode);
603 mode->name = name; 606 mode->name = name;
604 607
diff --git a/drivers/video/fbdev/aty/aty128fb.c b/drivers/video/fbdev/aty/aty128fb.c
index aedf2fbf9bf6..0156954bf340 100644
--- a/drivers/video/fbdev/aty/aty128fb.c
+++ b/drivers/video/fbdev/aty/aty128fb.c
@@ -965,7 +965,7 @@ static void __iomem *aty128_find_mem_vbios(struct aty128fb_par *par)
965/* fill in known card constants if pll_block is not available */ 965/* fill in known card constants if pll_block is not available */
966static void aty128_timings(struct aty128fb_par *par) 966static void aty128_timings(struct aty128fb_par *par)
967{ 967{
968#ifdef CONFIG_PPC_OF 968#ifdef CONFIG_PPC
969 /* instead of a table lookup, assume OF has properly 969 /* instead of a table lookup, assume OF has properly
970 * setup the PLL registers and use their values 970 * setup the PLL registers and use their values
971 * to set the XCLK values and reference divider values */ 971 * to set the XCLK values and reference divider values */
@@ -979,7 +979,7 @@ static void aty128_timings(struct aty128fb_par *par)
979 if (!par->constants.ref_clk) 979 if (!par->constants.ref_clk)
980 par->constants.ref_clk = 2950; 980 par->constants.ref_clk = 2950;
981 981
982#ifdef CONFIG_PPC_OF 982#ifdef CONFIG_PPC
983 x_mpll_ref_fb_div = aty_ld_pll(X_MPLL_REF_FB_DIV); 983 x_mpll_ref_fb_div = aty_ld_pll(X_MPLL_REF_FB_DIV);
984 xclk_cntl = aty_ld_pll(XCLK_CNTL) & 0x7; 984 xclk_cntl = aty_ld_pll(XCLK_CNTL) & 0x7;
985 Nx = (x_mpll_ref_fb_div & 0x00ff00) >> 8; 985 Nx = (x_mpll_ref_fb_div & 0x00ff00) >> 8;
diff --git a/drivers/video/fbdev/aty/radeon_base.c b/drivers/video/fbdev/aty/radeon_base.c
index 26d80a4486fb..01237c8fcdc6 100644
--- a/drivers/video/fbdev/aty/radeon_base.c
+++ b/drivers/video/fbdev/aty/radeon_base.c
@@ -74,7 +74,7 @@
74#include <asm/io.h> 74#include <asm/io.h>
75#include <linux/uaccess.h> 75#include <linux/uaccess.h>
76 76
77#ifdef CONFIG_PPC_OF 77#ifdef CONFIG_PPC
78 78
79#include <asm/pci-bridge.h> 79#include <asm/pci-bridge.h>
80#include "../macmodes.h" 80#include "../macmodes.h"
@@ -83,7 +83,7 @@
83#include <asm/btext.h> 83#include <asm/btext.h>
84#endif 84#endif
85 85
86#endif /* CONFIG_PPC_OF */ 86#endif /* CONFIG_PPC */
87 87
88#ifdef CONFIG_MTRR 88#ifdef CONFIG_MTRR
89#include <asm/mtrr.h> 89#include <asm/mtrr.h>
@@ -418,7 +418,7 @@ static int radeon_find_mem_vbios(struct radeonfb_info *rinfo)
418} 418}
419#endif 419#endif
420 420
421#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 421#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
422/* 422/*
423 * Read XTAL (ref clock), SCLK and MCLK from Open Firmware device 423 * Read XTAL (ref clock), SCLK and MCLK from Open Firmware device
424 * tree. Hopefully, ATI OF driver is kind enough to fill these 424 * tree. Hopefully, ATI OF driver is kind enough to fill these
@@ -448,7 +448,7 @@ static int radeon_read_xtal_OF(struct radeonfb_info *rinfo)
448 448
449 return 0; 449 return 0;
450} 450}
451#endif /* CONFIG_PPC_OF || CONFIG_SPARC */ 451#endif /* CONFIG_PPC || CONFIG_SPARC */
452 452
453/* 453/*
454 * Read PLL infos from chip registers 454 * Read PLL infos from chip registers
@@ -653,7 +653,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
653 rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; 653 rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;
654 654
655 655
656#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 656#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
657 /* 657 /*
658 * Retrieve PLL infos from Open Firmware first 658 * Retrieve PLL infos from Open Firmware first
659 */ 659 */
@@ -661,7 +661,7 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
661 printk(KERN_INFO "radeonfb: Retrieved PLL infos from Open Firmware\n"); 661 printk(KERN_INFO "radeonfb: Retrieved PLL infos from Open Firmware\n");
662 goto found; 662 goto found;
663 } 663 }
664#endif /* CONFIG_PPC_OF || CONFIG_SPARC */ 664#endif /* CONFIG_PPC || CONFIG_SPARC */
665 665
666 /* 666 /*
667 * Check out if we have an X86 which gave us some PLL informations 667 * Check out if we have an X86 which gave us some PLL informations
@@ -1910,7 +1910,7 @@ static int radeon_set_fbinfo(struct radeonfb_info *rinfo)
1910 * I put the card's memory at 0 in card space and AGP at some random high 1910 * I put the card's memory at 0 in card space and AGP at some random high
1911 * local (0xe0000000 for now) that will be changed by XFree/DRI anyway 1911 * local (0xe0000000 for now) that will be changed by XFree/DRI anyway
1912 */ 1912 */
1913#ifdef CONFIG_PPC_OF 1913#ifdef CONFIG_PPC
1914#undef SET_MC_FB_FROM_APERTURE 1914#undef SET_MC_FB_FROM_APERTURE
1915static void fixup_memory_mappings(struct radeonfb_info *rinfo) 1915static void fixup_memory_mappings(struct radeonfb_info *rinfo)
1916{ 1916{
@@ -1984,7 +1984,7 @@ static void fixup_memory_mappings(struct radeonfb_info *rinfo)
1984 ((aper_base + aper_size - 1) & 0xffff0000) | (aper_base >> 16), 1984 ((aper_base + aper_size - 1) & 0xffff0000) | (aper_base >> 16),
1985 0xffff0000 | (agp_base >> 16)); 1985 0xffff0000 | (agp_base >> 16));
1986} 1986}
1987#endif /* CONFIG_PPC_OF */ 1987#endif /* CONFIG_PPC */
1988 1988
1989 1989
1990static void radeon_identify_vram(struct radeonfb_info *rinfo) 1990static void radeon_identify_vram(struct radeonfb_info *rinfo)
@@ -2236,7 +2236,7 @@ static int radeonfb_pci_register(struct pci_dev *pdev,
2236 rinfo->family == CHIP_FAMILY_RS200) 2236 rinfo->family == CHIP_FAMILY_RS200)
2237 rinfo->errata |= CHIP_ERRATA_PLL_DELAY; 2237 rinfo->errata |= CHIP_ERRATA_PLL_DELAY;
2238 2238
2239#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 2239#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
2240 /* On PPC, we obtain the OF device-node pointer to the firmware 2240 /* On PPC, we obtain the OF device-node pointer to the firmware
2241 * data for this chip 2241 * data for this chip
2242 */ 2242 */
@@ -2245,14 +2245,14 @@ static int radeonfb_pci_register(struct pci_dev *pdev,
2245 printk(KERN_WARNING "radeonfb (%s): Cannot match card to OF node !\n", 2245 printk(KERN_WARNING "radeonfb (%s): Cannot match card to OF node !\n",
2246 pci_name(rinfo->pdev)); 2246 pci_name(rinfo->pdev));
2247 2247
2248#endif /* CONFIG_PPC_OF || CONFIG_SPARC */ 2248#endif /* CONFIG_PPC || CONFIG_SPARC */
2249#ifdef CONFIG_PPC_OF 2249#ifdef CONFIG_PPC
2250 /* On PPC, the firmware sets up a memory mapping that tends 2250 /* On PPC, the firmware sets up a memory mapping that tends
2251 * to cause lockups when enabling the engine. We reconfigure 2251 * to cause lockups when enabling the engine. We reconfigure
2252 * the card internal memory mappings properly 2252 * the card internal memory mappings properly
2253 */ 2253 */
2254 fixup_memory_mappings(rinfo); 2254 fixup_memory_mappings(rinfo);
2255#endif /* CONFIG_PPC_OF */ 2255#endif /* CONFIG_PPC */
2256 2256
2257 /* Get VRAM size and type */ 2257 /* Get VRAM size and type */
2258 radeon_identify_vram(rinfo); 2258 radeon_identify_vram(rinfo);
diff --git a/drivers/video/fbdev/aty/radeon_monitor.c b/drivers/video/fbdev/aty/radeon_monitor.c
index bc078d50d8f1..f1ce229de78d 100644
--- a/drivers/video/fbdev/aty/radeon_monitor.c
+++ b/drivers/video/fbdev/aty/radeon_monitor.c
@@ -55,7 +55,7 @@ static char *radeon_get_mon_name(int type)
55} 55}
56 56
57 57
58#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 58#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
59/* 59/*
60 * Try to find monitor informations & EDID data out of the Open Firmware 60 * Try to find monitor informations & EDID data out of the Open Firmware
61 * device-tree. This also contains some "hacks" to work around a few machine 61 * device-tree. This also contains some "hacks" to work around a few machine
@@ -160,7 +160,7 @@ static int radeon_probe_OF_head(struct radeonfb_info *rinfo, int head_no,
160 } 160 }
161 return MT_NONE; 161 return MT_NONE;
162} 162}
163#endif /* CONFIG_PPC_OF || CONFIG_SPARC */ 163#endif /* CONFIG_PPC || CONFIG_SPARC */
164 164
165 165
166static int radeon_get_panel_info_BIOS(struct radeonfb_info *rinfo) 166static int radeon_get_panel_info_BIOS(struct radeonfb_info *rinfo)
@@ -499,11 +499,11 @@ void radeon_probe_screens(struct radeonfb_info *rinfo,
499 * Old single head cards 499 * Old single head cards
500 */ 500 */
501 if (!rinfo->has_CRTC2) { 501 if (!rinfo->has_CRTC2) {
502#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 502#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
503 if (rinfo->mon1_type == MT_NONE) 503 if (rinfo->mon1_type == MT_NONE)
504 rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0, 504 rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
505 &rinfo->mon1_EDID); 505 &rinfo->mon1_EDID);
506#endif /* CONFIG_PPC_OF || CONFIG_SPARC */ 506#endif /* CONFIG_PPC || CONFIG_SPARC */
507#ifdef CONFIG_FB_RADEON_I2C 507#ifdef CONFIG_FB_RADEON_I2C
508 if (rinfo->mon1_type == MT_NONE) 508 if (rinfo->mon1_type == MT_NONE)
509 rinfo->mon1_type = 509 rinfo->mon1_type =
@@ -548,11 +548,11 @@ void radeon_probe_screens(struct radeonfb_info *rinfo,
548 /* 548 /*
549 * Probe primary head (DVI or laptop internal panel) 549 * Probe primary head (DVI or laptop internal panel)
550 */ 550 */
551#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 551#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
552 if (rinfo->mon1_type == MT_NONE) 552 if (rinfo->mon1_type == MT_NONE)
553 rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0, 553 rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
554 &rinfo->mon1_EDID); 554 &rinfo->mon1_EDID);
555#endif /* CONFIG_PPC_OF || CONFIG_SPARC */ 555#endif /* CONFIG_PPC || CONFIG_SPARC */
556#ifdef CONFIG_FB_RADEON_I2C 556#ifdef CONFIG_FB_RADEON_I2C
557 if (rinfo->mon1_type == MT_NONE) 557 if (rinfo->mon1_type == MT_NONE)
558 rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi, 558 rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi,
@@ -576,11 +576,11 @@ void radeon_probe_screens(struct radeonfb_info *rinfo,
576 /* 576 /*
577 * Probe secondary head (mostly VGA, can be DVI) 577 * Probe secondary head (mostly VGA, can be DVI)
578 */ 578 */
579#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 579#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
580 if (rinfo->mon2_type == MT_NONE) 580 if (rinfo->mon2_type == MT_NONE)
581 rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1, 581 rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1,
582 &rinfo->mon2_EDID); 582 &rinfo->mon2_EDID);
583#endif /* CONFIG_PPC_OF || defined(CONFIG_SPARC) */ 583#endif /* CONFIG_PPC || defined(CONFIG_SPARC) */
584#ifdef CONFIG_FB_RADEON_I2C 584#ifdef CONFIG_FB_RADEON_I2C
585 if (rinfo->mon2_type == MT_NONE) 585 if (rinfo->mon2_type == MT_NONE)
586 rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_vga, 586 rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_vga,
@@ -653,7 +653,7 @@ void radeon_probe_screens(struct radeonfb_info *rinfo,
653 */ 653 */
654static void radeon_fixup_panel_info(struct radeonfb_info *rinfo) 654static void radeon_fixup_panel_info(struct radeonfb_info *rinfo)
655{ 655{
656#ifdef CONFIG_PPC_OF 656#ifdef CONFIG_PPC
657 /* 657 /*
658 * LCD Flat panels should use fixed dividers, we enfore that on 658 * LCD Flat panels should use fixed dividers, we enfore that on
659 * PPC only for now... 659 * PPC only for now...
@@ -676,7 +676,7 @@ static void radeon_fixup_panel_info(struct radeonfb_info *rinfo)
676 (rinfo->panel_info.post_divider << 16), 676 (rinfo->panel_info.post_divider << 16),
677 ppll_div_sel); 677 ppll_div_sel);
678 } 678 }
679#endif /* CONFIG_PPC_OF */ 679#endif /* CONFIG_PPC */
680} 680}
681 681
682 682
diff --git a/drivers/video/fbdev/aty/radeon_pm.c b/drivers/video/fbdev/aty/radeon_pm.c
index 46a12f1a93c3..1417542738fc 100644
--- a/drivers/video/fbdev/aty/radeon_pm.c
+++ b/drivers/video/fbdev/aty/radeon_pm.c
@@ -523,7 +523,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
523 OUTPLL(pllVCLK_ECP_CNTL, tmp); 523 OUTPLL(pllVCLK_ECP_CNTL, tmp);
524 524
525 /* X doesn't do that ... hrm, we do on mobility && Macs */ 525 /* X doesn't do that ... hrm, we do on mobility && Macs */
526#ifdef CONFIG_PPC_OF 526#ifdef CONFIG_PPC
527 if (rinfo->is_mobility) { 527 if (rinfo->is_mobility) {
528 tmp = INPLL(pllMCLK_CNTL); 528 tmp = INPLL(pllMCLK_CNTL);
529 tmp &= ~(MCLK_CNTL__FORCE_MCLKA | 529 tmp &= ~(MCLK_CNTL__FORCE_MCLKA |
@@ -541,7 +541,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
541 OUTPLL(pllMCLK_MISC, tmp); 541 OUTPLL(pllMCLK_MISC, tmp);
542 radeon_msleep(15); 542 radeon_msleep(15);
543 } 543 }
544#endif /* CONFIG_PPC_OF */ 544#endif /* CONFIG_PPC */
545} 545}
546 546
547#ifdef CONFIG_PM 547#ifdef CONFIG_PM
@@ -1288,7 +1288,7 @@ static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo)
1288 radeon_pm_enable_dll_m10(rinfo); 1288 radeon_pm_enable_dll_m10(rinfo);
1289 radeon_pm_yclk_mclk_sync_m10(rinfo); 1289 radeon_pm_yclk_mclk_sync_m10(rinfo);
1290 1290
1291#ifdef CONFIG_PPC_OF 1291#ifdef CONFIG_PPC
1292 if (rinfo->of_node != NULL) { 1292 if (rinfo->of_node != NULL) {
1293 int size; 1293 int size;
1294 1294
@@ -1298,7 +1298,7 @@ static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo)
1298 else 1298 else
1299 mrtable = default_mrtable; 1299 mrtable = default_mrtable;
1300 } 1300 }
1301#endif /* CONFIG_PPC_OF */ 1301#endif /* CONFIG_PPC */
1302 1302
1303 /* Program the SDRAM */ 1303 /* Program the SDRAM */
1304 sdram_mode_reg = mrtable[0]; 1304 sdram_mode_reg = mrtable[0];
@@ -1943,7 +1943,7 @@ static void radeon_reinitialize_M10(struct radeonfb_info *rinfo)
1943} 1943}
1944#endif 1944#endif
1945 1945
1946#ifdef CONFIG_PPC_OF 1946#ifdef CONFIG_PPC
1947#ifdef CONFIG_PPC_PMAC 1947#ifdef CONFIG_PPC_PMAC
1948static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo) 1948static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo)
1949{ 1949{
@@ -2512,7 +2512,7 @@ static void radeon_reinitialize_QW(struct radeonfb_info *rinfo)
2512} 2512}
2513#endif /* 0 */ 2513#endif /* 0 */
2514 2514
2515#endif /* CONFIG_PPC_OF */ 2515#endif /* CONFIG_PPC */
2516 2516
2517static void radeonfb_whack_power_state(struct radeonfb_info *rinfo, pci_power_t state) 2517static void radeonfb_whack_power_state(struct radeonfb_info *rinfo, pci_power_t state)
2518{ 2518{
@@ -2793,7 +2793,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
2793 return rc; 2793 return rc;
2794} 2794}
2795 2795
2796#ifdef CONFIG_PPC_OF__disabled 2796#ifdef CONFIG_PPC__disabled
2797static void radeonfb_early_resume(void *data) 2797static void radeonfb_early_resume(void *data)
2798{ 2798{
2799 struct radeonfb_info *rinfo = data; 2799 struct radeonfb_info *rinfo = data;
@@ -2803,7 +2803,7 @@ static void radeonfb_early_resume(void *data)
2803 radeonfb_pci_resume(rinfo->pdev); 2803 radeonfb_pci_resume(rinfo->pdev);
2804 rinfo->no_schedule = 0; 2804 rinfo->no_schedule = 0;
2805} 2805}
2806#endif /* CONFIG_PPC_OF */ 2806#endif /* CONFIG_PPC */
2807 2807
2808#endif /* CONFIG_PM */ 2808#endif /* CONFIG_PM */
2809 2809
diff --git a/drivers/video/fbdev/aty/radeonfb.h b/drivers/video/fbdev/aty/radeonfb.h
index cb846044f57c..039def41c920 100644
--- a/drivers/video/fbdev/aty/radeonfb.h
+++ b/drivers/video/fbdev/aty/radeonfb.h
@@ -20,7 +20,7 @@
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22 22
23#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 23#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
24#include <asm/prom.h> 24#include <asm/prom.h>
25#endif 25#endif
26 26
@@ -301,7 +301,7 @@ struct radeonfb_info {
301 unsigned long fb_local_base; 301 unsigned long fb_local_base;
302 302
303 struct pci_dev *pdev; 303 struct pci_dev *pdev;
304#if defined(CONFIG_PPC_OF) || defined(CONFIG_SPARC) 304#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
305 struct device_node *of_node; 305 struct device_node *of_node;
306#endif 306#endif
307 307
diff --git a/drivers/video/fbdev/controlfb.c b/drivers/video/fbdev/controlfb.c
index 080fdd2a70f3..8d14b29aafea 100644
--- a/drivers/video/fbdev/controlfb.c
+++ b/drivers/video/fbdev/controlfb.c
@@ -315,7 +315,7 @@ static int controlfb_blank(int blank_mode, struct fb_info *info)
315 container_of(info, struct fb_info_control, info); 315 container_of(info, struct fb_info_control, info);
316 unsigned ctrl; 316 unsigned ctrl;
317 317
318 ctrl = ld_le32(CNTRL_REG(p,ctrl)); 318 ctrl = le32_to_cpup(CNTRL_REG(p,ctrl));
319 if (blank_mode > 0) 319 if (blank_mode > 0)
320 switch (blank_mode) { 320 switch (blank_mode) {
321 case FB_BLANK_VSYNC_SUSPEND: 321 case FB_BLANK_VSYNC_SUSPEND:
diff --git a/drivers/video/fbdev/core/fbmon.c b/drivers/video/fbdev/core/fbmon.c
index 95338593ebf4..01ef1b953390 100644
--- a/drivers/video/fbdev/core/fbmon.c
+++ b/drivers/video/fbdev/core/fbmon.c
@@ -33,10 +33,6 @@
33#include <video/edid.h> 33#include <video/edid.h>
34#include <video/of_videomode.h> 34#include <video/of_videomode.h>
35#include <video/videomode.h> 35#include <video/videomode.h>
36#ifdef CONFIG_PPC_OF
37#include <asm/prom.h>
38#include <asm/pci-bridge.h>
39#endif
40#include "../edid.h" 36#include "../edid.h"
41 37
42/* 38/*
@@ -624,9 +620,6 @@ static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize,
624 int num = 0, i, first = 1; 620 int num = 0, i, first = 1;
625 int ver, rev; 621 int ver, rev;
626 622
627 ver = edid[EDID_STRUCT_VERSION];
628 rev = edid[EDID_STRUCT_REVISION];
629
630 mode = kzalloc(50 * sizeof(struct fb_videomode), GFP_KERNEL); 623 mode = kzalloc(50 * sizeof(struct fb_videomode), GFP_KERNEL);
631 if (mode == NULL) 624 if (mode == NULL)
632 return NULL; 625 return NULL;
@@ -637,6 +630,9 @@ static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize,
637 return NULL; 630 return NULL;
638 } 631 }
639 632
633 ver = edid[EDID_STRUCT_VERSION];
634 rev = edid[EDID_STRUCT_REVISION];
635
640 *dbsize = 0; 636 *dbsize = 0;
641 637
642 DPRINTK(" Detailed Timings\n"); 638 DPRINTK(" Detailed Timings\n");
diff --git a/drivers/video/fbdev/imsttfb.c b/drivers/video/fbdev/imsttfb.c
index aae10ce74f14..9b167f7ef6c6 100644
--- a/drivers/video/fbdev/imsttfb.c
+++ b/drivers/video/fbdev/imsttfb.c
@@ -1470,15 +1470,13 @@ static int imsttfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1470 unsigned long addr, size; 1470 unsigned long addr, size;
1471 struct imstt_par *par; 1471 struct imstt_par *par;
1472 struct fb_info *info; 1472 struct fb_info *info;
1473#ifdef CONFIG_PPC_OF
1474 struct device_node *dp; 1473 struct device_node *dp;
1475 1474
1476 dp = pci_device_to_OF_node(pdev); 1475 dp = pci_device_to_OF_node(pdev);
1477 if(dp) 1476 if(dp)
1478 printk(KERN_INFO "%s: OF name %s\n",__func__, dp->name); 1477 printk(KERN_INFO "%s: OF name %s\n",__func__, dp->name);
1479 else 1478 else if (IS_ENABLED(CONFIG_OF))
1480 printk(KERN_ERR "imsttfb: no OF node for pci device\n"); 1479 printk(KERN_ERR "imsttfb: no OF node for pci device\n");
1481#endif /* CONFIG_PPC_OF */
1482 1480
1483 info = framebuffer_alloc(sizeof(struct imstt_par), &pdev->dev); 1481 info = framebuffer_alloc(sizeof(struct imstt_par), &pdev->dev);
1484 1482
@@ -1501,11 +1499,9 @@ static int imsttfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1501 switch (pdev->device) { 1499 switch (pdev->device) {
1502 case PCI_DEVICE_ID_IMS_TT128: /* IMS,tt128mbA */ 1500 case PCI_DEVICE_ID_IMS_TT128: /* IMS,tt128mbA */
1503 par->ramdac = IBM; 1501 par->ramdac = IBM;
1504#ifdef CONFIG_PPC_OF
1505 if (dp && ((strcmp(dp->name, "IMS,tt128mb8") == 0) || 1502 if (dp && ((strcmp(dp->name, "IMS,tt128mb8") == 0) ||
1506 (strcmp(dp->name, "IMS,tt128mb8A") == 0))) 1503 (strcmp(dp->name, "IMS,tt128mb8A") == 0)))
1507 par->ramdac = TVP; 1504 par->ramdac = TVP;
1508#endif /* CONFIG_PPC_OF */
1509 break; 1505 break;
1510 case PCI_DEVICE_ID_IMS_TT3D: /* IMS,tt3d */ 1506 case PCI_DEVICE_ID_IMS_TT3D: /* IMS,tt3d */
1511 par->ramdac = TVP; 1507 par->ramdac = TVP;
diff --git a/drivers/video/fbdev/nvidia/Makefile b/drivers/video/fbdev/nvidia/Makefile
index ca47432113e0..917d3eb05feb 100644
--- a/drivers/video/fbdev/nvidia/Makefile
+++ b/drivers/video/fbdev/nvidia/Makefile
@@ -5,9 +5,8 @@
5obj-$(CONFIG_FB_NVIDIA) += nvidiafb.o 5obj-$(CONFIG_FB_NVIDIA) += nvidiafb.o
6 6
7nvidiafb-y := nvidia.o nv_hw.o nv_setup.o \ 7nvidiafb-y := nvidia.o nv_hw.o nv_setup.o \
8 nv_accel.o 8 nv_accel.o nv_of.o
9nvidiafb-$(CONFIG_FB_NVIDIA_I2C) += nv_i2c.o 9nvidiafb-$(CONFIG_FB_NVIDIA_I2C) += nv_i2c.o
10nvidiafb-$(CONFIG_FB_NVIDIA_BACKLIGHT) += nv_backlight.o 10nvidiafb-$(CONFIG_FB_NVIDIA_BACKLIGHT) += nv_backlight.o
11nvidiafb-$(CONFIG_PPC_OF) += nv_of.o
12 11
13nvidiafb-objs := $(nvidiafb-y) 12nvidiafb-objs := $(nvidiafb-y)
diff --git a/drivers/video/fbdev/nvidia/nv_of.c b/drivers/video/fbdev/nvidia/nv_of.c
index 3bc13df4b120..5f3e5179c25a 100644
--- a/drivers/video/fbdev/nvidia/nv_of.c
+++ b/drivers/video/fbdev/nvidia/nv_of.c
@@ -19,9 +19,6 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22#include <asm/prom.h>
23#include <asm/pci-bridge.h>
24
25#include "nv_type.h" 22#include "nv_type.h"
26#include "nv_local.h" 23#include "nv_local.h"
27#include "nv_proto.h" 24#include "nv_proto.h"
diff --git a/drivers/video/fbdev/nvidia/nv_proto.h b/drivers/video/fbdev/nvidia/nv_proto.h
index ff5c410355ea..878a5ce02299 100644
--- a/drivers/video/fbdev/nvidia/nv_proto.h
+++ b/drivers/video/fbdev/nvidia/nv_proto.h
@@ -42,16 +42,8 @@ int nvidia_probe_i2c_connector(struct fb_info *info, int conn,
42#define nvidia_probe_i2c_connector(p, c, edid) (-1) 42#define nvidia_probe_i2c_connector(p, c, edid) (-1)
43#endif 43#endif
44 44
45#ifdef CONFIG_PPC_OF
46int nvidia_probe_of_connector(struct fb_info *info, int conn, 45int nvidia_probe_of_connector(struct fb_info *info, int conn,
47 u8 ** out_edid); 46 u8 ** out_edid);
48#else
49static inline int nvidia_probe_of_connector(struct fb_info *info, int conn,
50 u8 ** out_edid)
51{
52 return -1;
53}
54#endif
55 47
56/* in nv_accel.c */ 48/* in nv_accel.c */
57extern void NVResetGraphics(struct fb_info *info); 49extern void NVResetGraphics(struct fb_info *info);
diff --git a/drivers/video/fbdev/nvidia/nvidia.c b/drivers/video/fbdev/nvidia/nvidia.c
index def041204676..4273c6ee8cf6 100644
--- a/drivers/video/fbdev/nvidia/nvidia.c
+++ b/drivers/video/fbdev/nvidia/nvidia.c
@@ -24,10 +24,6 @@
24#ifdef CONFIG_MTRR 24#ifdef CONFIG_MTRR
25#include <asm/mtrr.h> 25#include <asm/mtrr.h>
26#endif 26#endif
27#ifdef CONFIG_PPC_OF
28#include <asm/prom.h>
29#include <asm/pci-bridge.h>
30#endif
31#ifdef CONFIG_BOOTX_TEXT 27#ifdef CONFIG_BOOTX_TEXT
32#include <asm/btext.h> 28#include <asm/btext.h>
33#endif 29#endif
diff --git a/drivers/video/fbdev/omap2/dss/display-sysfs.c b/drivers/video/fbdev/omap2/dss/display-sysfs.c
index 5a2095a98ed8..12186557a9d4 100644
--- a/drivers/video/fbdev/omap2/dss/display-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/display-sysfs.c
@@ -28,44 +28,22 @@
28#include <video/omapdss.h> 28#include <video/omapdss.h>
29#include "dss.h" 29#include "dss.h"
30 30
31static struct omap_dss_device *to_dss_device_sysfs(struct device *dev) 31static ssize_t display_name_show(struct omap_dss_device *dssdev, char *buf)
32{ 32{
33 struct omap_dss_device *dssdev = NULL;
34
35 for_each_dss_dev(dssdev) {
36 if (dssdev->dev == dev) {
37 omap_dss_put_device(dssdev);
38 return dssdev;
39 }
40 }
41
42 return NULL;
43}
44
45static ssize_t display_name_show(struct device *dev,
46 struct device_attribute *attr, char *buf)
47{
48 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
49
50 return snprintf(buf, PAGE_SIZE, "%s\n", 33 return snprintf(buf, PAGE_SIZE, "%s\n",
51 dssdev->name ? 34 dssdev->name ?
52 dssdev->name : ""); 35 dssdev->name : "");
53} 36}
54 37
55static ssize_t display_enabled_show(struct device *dev, 38static ssize_t display_enabled_show(struct omap_dss_device *dssdev, char *buf)
56 struct device_attribute *attr, char *buf)
57{ 39{
58 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
59
60 return snprintf(buf, PAGE_SIZE, "%d\n", 40 return snprintf(buf, PAGE_SIZE, "%d\n",
61 omapdss_device_is_enabled(dssdev)); 41 omapdss_device_is_enabled(dssdev));
62} 42}
63 43
64static ssize_t display_enabled_store(struct device *dev, 44static ssize_t display_enabled_store(struct omap_dss_device *dssdev,
65 struct device_attribute *attr,
66 const char *buf, size_t size) 45 const char *buf, size_t size)
67{ 46{
68 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
69 int r; 47 int r;
70 bool enable; 48 bool enable;
71 49
@@ -90,19 +68,16 @@ static ssize_t display_enabled_store(struct device *dev,
90 return size; 68 return size;
91} 69}
92 70
93static ssize_t display_tear_show(struct device *dev, 71static ssize_t display_tear_show(struct omap_dss_device *dssdev, char *buf)
94 struct device_attribute *attr, char *buf)
95{ 72{
96 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
97 return snprintf(buf, PAGE_SIZE, "%d\n", 73 return snprintf(buf, PAGE_SIZE, "%d\n",
98 dssdev->driver->get_te ? 74 dssdev->driver->get_te ?
99 dssdev->driver->get_te(dssdev) : 0); 75 dssdev->driver->get_te(dssdev) : 0);
100} 76}
101 77
102static ssize_t display_tear_store(struct device *dev, 78static ssize_t display_tear_store(struct omap_dss_device *dssdev,
103 struct device_attribute *attr, const char *buf, size_t size) 79 const char *buf, size_t size)
104{ 80{
105 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
106 int r; 81 int r;
107 bool te; 82 bool te;
108 83
@@ -120,10 +95,8 @@ static ssize_t display_tear_store(struct device *dev,
120 return size; 95 return size;
121} 96}
122 97
123static ssize_t display_timings_show(struct device *dev, 98static ssize_t display_timings_show(struct omap_dss_device *dssdev, char *buf)
124 struct device_attribute *attr, char *buf)
125{ 99{
126 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
127 struct omap_video_timings t; 100 struct omap_video_timings t;
128 101
129 if (!dssdev->driver->get_timings) 102 if (!dssdev->driver->get_timings)
@@ -137,10 +110,9 @@ static ssize_t display_timings_show(struct device *dev,
137 t.y_res, t.vfp, t.vbp, t.vsw); 110 t.y_res, t.vfp, t.vbp, t.vsw);
138} 111}
139 112
140static ssize_t display_timings_store(struct device *dev, 113static ssize_t display_timings_store(struct omap_dss_device *dssdev,
141 struct device_attribute *attr, const char *buf, size_t size) 114 const char *buf, size_t size)
142{ 115{
143 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
144 struct omap_video_timings t = dssdev->panel.timings; 116 struct omap_video_timings t = dssdev->panel.timings;
145 int r, found; 117 int r, found;
146 118
@@ -176,10 +148,8 @@ static ssize_t display_timings_store(struct device *dev,
176 return size; 148 return size;
177} 149}
178 150
179static ssize_t display_rotate_show(struct device *dev, 151static ssize_t display_rotate_show(struct omap_dss_device *dssdev, char *buf)
180 struct device_attribute *attr, char *buf)
181{ 152{
182 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
183 int rotate; 153 int rotate;
184 if (!dssdev->driver->get_rotate) 154 if (!dssdev->driver->get_rotate)
185 return -ENOENT; 155 return -ENOENT;
@@ -187,10 +157,9 @@ static ssize_t display_rotate_show(struct device *dev,
187 return snprintf(buf, PAGE_SIZE, "%u\n", rotate); 157 return snprintf(buf, PAGE_SIZE, "%u\n", rotate);
188} 158}
189 159
190static ssize_t display_rotate_store(struct device *dev, 160static ssize_t display_rotate_store(struct omap_dss_device *dssdev,
191 struct device_attribute *attr, const char *buf, size_t size) 161 const char *buf, size_t size)
192{ 162{
193 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
194 int rot, r; 163 int rot, r;
195 164
196 if (!dssdev->driver->set_rotate || !dssdev->driver->get_rotate) 165 if (!dssdev->driver->set_rotate || !dssdev->driver->get_rotate)
@@ -207,10 +176,8 @@ static ssize_t display_rotate_store(struct device *dev,
207 return size; 176 return size;
208} 177}
209 178
210static ssize_t display_mirror_show(struct device *dev, 179static ssize_t display_mirror_show(struct omap_dss_device *dssdev, char *buf)
211 struct device_attribute *attr, char *buf)
212{ 180{
213 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
214 int mirror; 181 int mirror;
215 if (!dssdev->driver->get_mirror) 182 if (!dssdev->driver->get_mirror)
216 return -ENOENT; 183 return -ENOENT;
@@ -218,10 +185,9 @@ static ssize_t display_mirror_show(struct device *dev,
218 return snprintf(buf, PAGE_SIZE, "%u\n", mirror); 185 return snprintf(buf, PAGE_SIZE, "%u\n", mirror);
219} 186}
220 187
221static ssize_t display_mirror_store(struct device *dev, 188static ssize_t display_mirror_store(struct omap_dss_device *dssdev,
222 struct device_attribute *attr, const char *buf, size_t size) 189 const char *buf, size_t size)
223{ 190{
224 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
225 int r; 191 int r;
226 bool mirror; 192 bool mirror;
227 193
@@ -239,10 +205,8 @@ static ssize_t display_mirror_store(struct device *dev,
239 return size; 205 return size;
240} 206}
241 207
242static ssize_t display_wss_show(struct device *dev, 208static ssize_t display_wss_show(struct omap_dss_device *dssdev, char *buf)
243 struct device_attribute *attr, char *buf)
244{ 209{
245 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
246 unsigned int wss; 210 unsigned int wss;
247 211
248 if (!dssdev->driver->get_wss) 212 if (!dssdev->driver->get_wss)
@@ -253,10 +217,9 @@ static ssize_t display_wss_show(struct device *dev,
253 return snprintf(buf, PAGE_SIZE, "0x%05x\n", wss); 217 return snprintf(buf, PAGE_SIZE, "0x%05x\n", wss);
254} 218}
255 219
256static ssize_t display_wss_store(struct device *dev, 220static ssize_t display_wss_store(struct omap_dss_device *dssdev,
257 struct device_attribute *attr, const char *buf, size_t size) 221 const char *buf, size_t size)
258{ 222{
259 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
260 u32 wss; 223 u32 wss;
261 int r; 224 int r;
262 225
@@ -277,50 +240,94 @@ static ssize_t display_wss_store(struct device *dev,
277 return size; 240 return size;
278} 241}
279 242
280static DEVICE_ATTR(display_name, S_IRUGO, display_name_show, NULL); 243struct display_attribute {
281static DEVICE_ATTR(enabled, S_IRUGO|S_IWUSR, 244 struct attribute attr;
245 ssize_t (*show)(struct omap_dss_device *, char *);
246 ssize_t (*store)(struct omap_dss_device *, const char *, size_t);
247};
248
249#define DISPLAY_ATTR(_name, _mode, _show, _store) \
250 struct display_attribute display_attr_##_name = \
251 __ATTR(_name, _mode, _show, _store)
252
253static DISPLAY_ATTR(name, S_IRUGO, display_name_show, NULL);
254static DISPLAY_ATTR(display_name, S_IRUGO, display_name_show, NULL);
255static DISPLAY_ATTR(enabled, S_IRUGO|S_IWUSR,
282 display_enabled_show, display_enabled_store); 256 display_enabled_show, display_enabled_store);
283static DEVICE_ATTR(tear_elim, S_IRUGO|S_IWUSR, 257static DISPLAY_ATTR(tear_elim, S_IRUGO|S_IWUSR,
284 display_tear_show, display_tear_store); 258 display_tear_show, display_tear_store);
285static DEVICE_ATTR(timings, S_IRUGO|S_IWUSR, 259static DISPLAY_ATTR(timings, S_IRUGO|S_IWUSR,
286 display_timings_show, display_timings_store); 260 display_timings_show, display_timings_store);
287static DEVICE_ATTR(rotate, S_IRUGO|S_IWUSR, 261static DISPLAY_ATTR(rotate, S_IRUGO|S_IWUSR,
288 display_rotate_show, display_rotate_store); 262 display_rotate_show, display_rotate_store);
289static DEVICE_ATTR(mirror, S_IRUGO|S_IWUSR, 263static DISPLAY_ATTR(mirror, S_IRUGO|S_IWUSR,
290 display_mirror_show, display_mirror_store); 264 display_mirror_show, display_mirror_store);
291static DEVICE_ATTR(wss, S_IRUGO|S_IWUSR, 265static DISPLAY_ATTR(wss, S_IRUGO|S_IWUSR,
292 display_wss_show, display_wss_store); 266 display_wss_show, display_wss_store);
293 267
294static const struct attribute *display_sysfs_attrs[] = { 268static struct attribute *display_sysfs_attrs[] = {
295 &dev_attr_display_name.attr, 269 &display_attr_name.attr,
296 &dev_attr_enabled.attr, 270 &display_attr_display_name.attr,
297 &dev_attr_tear_elim.attr, 271 &display_attr_enabled.attr,
298 &dev_attr_timings.attr, 272 &display_attr_tear_elim.attr,
299 &dev_attr_rotate.attr, 273 &display_attr_timings.attr,
300 &dev_attr_mirror.attr, 274 &display_attr_rotate.attr,
301 &dev_attr_wss.attr, 275 &display_attr_mirror.attr,
276 &display_attr_wss.attr,
302 NULL 277 NULL
303}; 278};
304 279
280static ssize_t display_attr_show(struct kobject *kobj, struct attribute *attr,
281 char *buf)
282{
283 struct omap_dss_device *dssdev;
284 struct display_attribute *display_attr;
285
286 dssdev = container_of(kobj, struct omap_dss_device, kobj);
287 display_attr = container_of(attr, struct display_attribute, attr);
288
289 if (!display_attr->show)
290 return -ENOENT;
291
292 return display_attr->show(dssdev, buf);
293}
294
295static ssize_t display_attr_store(struct kobject *kobj, struct attribute *attr,
296 const char *buf, size_t size)
297{
298 struct omap_dss_device *dssdev;
299 struct display_attribute *display_attr;
300
301 dssdev = container_of(kobj, struct omap_dss_device, kobj);
302 display_attr = container_of(attr, struct display_attribute, attr);
303
304 if (!display_attr->store)
305 return -ENOENT;
306
307 return display_attr->store(dssdev, buf, size);
308}
309
310static const struct sysfs_ops display_sysfs_ops = {
311 .show = display_attr_show,
312 .store = display_attr_store,
313};
314
315static struct kobj_type display_ktype = {
316 .sysfs_ops = &display_sysfs_ops,
317 .default_attrs = display_sysfs_attrs,
318};
319
305int display_init_sysfs(struct platform_device *pdev) 320int display_init_sysfs(struct platform_device *pdev)
306{ 321{
307 struct omap_dss_device *dssdev = NULL; 322 struct omap_dss_device *dssdev = NULL;
308 int r; 323 int r;
309 324
310 for_each_dss_dev(dssdev) { 325 for_each_dss_dev(dssdev) {
311 struct kobject *kobj = &dssdev->dev->kobj; 326 r = kobject_init_and_add(&dssdev->kobj, &display_ktype,
312 327 &pdev->dev.kobj, dssdev->alias);
313 r = sysfs_create_files(kobj, display_sysfs_attrs);
314 if (r) { 328 if (r) {
315 DSSERR("failed to create sysfs files\n"); 329 DSSERR("failed to create sysfs files\n");
316 goto err; 330 omap_dss_put_device(dssdev);
317 }
318
319 r = sysfs_create_link(&pdev->dev.kobj, kobj, dssdev->alias);
320 if (r) {
321 sysfs_remove_files(kobj, display_sysfs_attrs);
322
323 DSSERR("failed to create sysfs display link\n");
324 goto err; 331 goto err;
325 } 332 }
326 } 333 }
@@ -338,8 +345,12 @@ void display_uninit_sysfs(struct platform_device *pdev)
338 struct omap_dss_device *dssdev = NULL; 345 struct omap_dss_device *dssdev = NULL;
339 346
340 for_each_dss_dev(dssdev) { 347 for_each_dss_dev(dssdev) {
341 sysfs_remove_link(&pdev->dev.kobj, dssdev->alias); 348 if (kobject_name(&dssdev->kobj) == NULL)
342 sysfs_remove_files(&dssdev->dev->kobj, 349 continue;
343 display_sysfs_attrs); 350
351 kobject_del(&dssdev->kobj);
352 kobject_put(&dssdev->kobj);
353
354 memset(&dssdev->kobj, 0, sizeof(dssdev->kobj));
344 } 355 }
345} 356}
diff --git a/drivers/video/fbdev/platinumfb.c b/drivers/video/fbdev/platinumfb.c
index 518d1fd38a81..377d3399a3ad 100644
--- a/drivers/video/fbdev/platinumfb.c
+++ b/drivers/video/fbdev/platinumfb.c
@@ -168,7 +168,7 @@ static int platinumfb_blank(int blank, struct fb_info *fb)
168 struct fb_info_platinum *info = (struct fb_info_platinum *) fb; 168 struct fb_info_platinum *info = (struct fb_info_platinum *) fb;
169 int ctrl; 169 int ctrl;
170 170
171 ctrl = ld_le32(&info->platinum_regs->ctrl.r) | 0x33; 171 ctrl = le32_to_cpup(&info->platinum_regs->ctrl.r) | 0x33;
172 if (blank) 172 if (blank)
173 --blank_mode; 173 --blank_mode;
174 if (blank & VESA_VSYNC_SUSPEND) 174 if (blank & VESA_VSYNC_SUSPEND)
diff --git a/drivers/video/fbdev/riva/fbdev.c b/drivers/video/fbdev/riva/fbdev.c
index be73727c7227..294a80908c8c 100644
--- a/drivers/video/fbdev/riva/fbdev.c
+++ b/drivers/video/fbdev/riva/fbdev.c
@@ -44,10 +44,6 @@
44#ifdef CONFIG_MTRR 44#ifdef CONFIG_MTRR
45#include <asm/mtrr.h> 45#include <asm/mtrr.h>
46#endif 46#endif
47#ifdef CONFIG_PPC_OF
48#include <asm/prom.h>
49#include <asm/pci-bridge.h>
50#endif
51#ifdef CONFIG_PMAC_BACKLIGHT 47#ifdef CONFIG_PMAC_BACKLIGHT
52#include <asm/machdep.h> 48#include <asm/machdep.h>
53#include <asm/backlight.h> 49#include <asm/backlight.h>
@@ -1735,7 +1731,6 @@ static int riva_set_fbinfo(struct fb_info *info)
1735 return (rivafb_check_var(&info->var, info)); 1731 return (rivafb_check_var(&info->var, info));
1736} 1732}
1737 1733
1738#ifdef CONFIG_PPC_OF
1739static int riva_get_EDID_OF(struct fb_info *info, struct pci_dev *pd) 1734static int riva_get_EDID_OF(struct fb_info *info, struct pci_dev *pd)
1740{ 1735{
1741 struct riva_par *par = info->par; 1736 struct riva_par *par = info->par;
@@ -1766,9 +1761,8 @@ static int riva_get_EDID_OF(struct fb_info *info, struct pci_dev *pd)
1766 NVTRACE_LEAVE(); 1761 NVTRACE_LEAVE();
1767 return 0; 1762 return 0;
1768} 1763}
1769#endif /* CONFIG_PPC_OF */
1770 1764
1771#if defined(CONFIG_FB_RIVA_I2C) && !defined(CONFIG_PPC_OF) 1765#if defined(CONFIG_FB_RIVA_I2C)
1772static int riva_get_EDID_i2c(struct fb_info *info) 1766static int riva_get_EDID_i2c(struct fb_info *info)
1773{ 1767{
1774 struct riva_par *par = info->par; 1768 struct riva_par *par = info->par;
@@ -1828,10 +1822,13 @@ static void riva_update_default_var(struct fb_var_screeninfo *var,
1828static void riva_get_EDID(struct fb_info *info, struct pci_dev *pdev) 1822static void riva_get_EDID(struct fb_info *info, struct pci_dev *pdev)
1829{ 1823{
1830 NVTRACE_ENTER(); 1824 NVTRACE_ENTER();
1831#ifdef CONFIG_PPC_OF 1825 if (riva_get_EDID_OF(info, pdev)) {
1832 if (!riva_get_EDID_OF(info, pdev)) 1826 NVTRACE_LEAVE();
1827 return;
1828 }
1829 if (IS_ENABLED(CONFIG_OF))
1833 printk(PFX "could not retrieve EDID from OF\n"); 1830 printk(PFX "could not retrieve EDID from OF\n");
1834#elif defined(CONFIG_FB_RIVA_I2C) 1831#if defined(CONFIG_FB_RIVA_I2C)
1835 if (!riva_get_EDID_i2c(info)) 1832 if (!riva_get_EDID_i2c(info))
1836 printk(PFX "could not retrieve EDID from DDC/I2C\n"); 1833 printk(PFX "could not retrieve EDID from DDC/I2C\n");
1837#endif 1834#endif
diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c
index b4bca2d4a7e5..70fba973a107 100644
--- a/drivers/xen/events/events_base.c
+++ b/drivers/xen/events/events_base.c
@@ -526,20 +526,26 @@ static unsigned int __startup_pirq(unsigned int irq)
526 pirq_query_unmask(irq); 526 pirq_query_unmask(irq);
527 527
528 rc = set_evtchn_to_irq(evtchn, irq); 528 rc = set_evtchn_to_irq(evtchn, irq);
529 if (rc != 0) { 529 if (rc)
530 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", 530 goto err;
531 irq, rc); 531
532 xen_evtchn_close(evtchn);
533 return 0;
534 }
535 bind_evtchn_to_cpu(evtchn, 0); 532 bind_evtchn_to_cpu(evtchn, 0);
536 info->evtchn = evtchn; 533 info->evtchn = evtchn;
537 534
535 rc = xen_evtchn_port_setup(info);
536 if (rc)
537 goto err;
538
538out: 539out:
539 unmask_evtchn(evtchn); 540 unmask_evtchn(evtchn);
540 eoi_pirq(irq_get_irq_data(irq)); 541 eoi_pirq(irq_get_irq_data(irq));
541 542
542 return 0; 543 return 0;
544
545err:
546 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
547 xen_evtchn_close(evtchn);
548 return 0;
543} 549}
544 550
545static unsigned int startup_pirq(struct irq_data *data) 551static unsigned int startup_pirq(struct irq_data *data)
diff --git a/drivers/xen/xen-pciback/conf_space.c b/drivers/xen/xen-pciback/conf_space.c
index 46ae0f9f02ad..75fe3d466515 100644
--- a/drivers/xen/xen-pciback/conf_space.c
+++ b/drivers/xen/xen-pciback/conf_space.c
@@ -16,7 +16,7 @@
16#include "conf_space.h" 16#include "conf_space.h"
17#include "conf_space_quirks.h" 17#include "conf_space_quirks.h"
18 18
19static bool permissive; 19bool permissive;
20module_param(permissive, bool, 0644); 20module_param(permissive, bool, 0644);
21 21
22/* This is where xen_pcibk_read_config_byte, xen_pcibk_read_config_word, 22/* This is where xen_pcibk_read_config_byte, xen_pcibk_read_config_word,
diff --git a/drivers/xen/xen-pciback/conf_space.h b/drivers/xen/xen-pciback/conf_space.h
index e56c934ad137..2e1d73d1d5d0 100644
--- a/drivers/xen/xen-pciback/conf_space.h
+++ b/drivers/xen/xen-pciback/conf_space.h
@@ -64,6 +64,8 @@ struct config_field_entry {
64 void *data; 64 void *data;
65}; 65};
66 66
67extern bool permissive;
68
67#define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset) 69#define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset)
68 70
69/* Add fields to a device - the add_fields macro expects to get a pointer to 71/* Add fields to a device - the add_fields macro expects to get a pointer to
diff --git a/drivers/xen/xen-pciback/conf_space_header.c b/drivers/xen/xen-pciback/conf_space_header.c
index c5ee82587e8c..2d7369391472 100644
--- a/drivers/xen/xen-pciback/conf_space_header.c
+++ b/drivers/xen/xen-pciback/conf_space_header.c
@@ -11,6 +11,10 @@
11#include "pciback.h" 11#include "pciback.h"
12#include "conf_space.h" 12#include "conf_space.h"
13 13
14struct pci_cmd_info {
15 u16 val;
16};
17
14struct pci_bar_info { 18struct pci_bar_info {
15 u32 val; 19 u32 val;
16 u32 len_val; 20 u32 len_val;
@@ -20,22 +24,36 @@ struct pci_bar_info {
20#define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO)) 24#define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO))
21#define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER) 25#define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER)
22 26
23static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data) 27/* Bits guests are allowed to control in permissive mode. */
28#define PCI_COMMAND_GUEST (PCI_COMMAND_MASTER|PCI_COMMAND_SPECIAL| \
29 PCI_COMMAND_INVALIDATE|PCI_COMMAND_VGA_PALETTE| \
30 PCI_COMMAND_WAIT|PCI_COMMAND_FAST_BACK)
31
32static void *command_init(struct pci_dev *dev, int offset)
24{ 33{
25 int i; 34 struct pci_cmd_info *cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
26 int ret; 35 int err;
27 36
28 ret = xen_pcibk_read_config_word(dev, offset, value, data); 37 if (!cmd)
29 if (!pci_is_enabled(dev)) 38 return ERR_PTR(-ENOMEM);
30 return ret; 39
31 40 err = pci_read_config_word(dev, PCI_COMMAND, &cmd->val);
32 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 41 if (err) {
33 if (dev->resource[i].flags & IORESOURCE_IO) 42 kfree(cmd);
34 *value |= PCI_COMMAND_IO; 43 return ERR_PTR(err);
35 if (dev->resource[i].flags & IORESOURCE_MEM)
36 *value |= PCI_COMMAND_MEMORY;
37 } 44 }
38 45
46 return cmd;
47}
48
49static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data)
50{
51 int ret = pci_read_config_word(dev, offset, value);
52 const struct pci_cmd_info *cmd = data;
53
54 *value &= PCI_COMMAND_GUEST;
55 *value |= cmd->val & ~PCI_COMMAND_GUEST;
56
39 return ret; 57 return ret;
40} 58}
41 59
@@ -43,6 +61,8 @@ static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
43{ 61{
44 struct xen_pcibk_dev_data *dev_data; 62 struct xen_pcibk_dev_data *dev_data;
45 int err; 63 int err;
64 u16 val;
65 struct pci_cmd_info *cmd = data;
46 66
47 dev_data = pci_get_drvdata(dev); 67 dev_data = pci_get_drvdata(dev);
48 if (!pci_is_enabled(dev) && is_enable_cmd(value)) { 68 if (!pci_is_enabled(dev) && is_enable_cmd(value)) {
@@ -83,6 +103,19 @@ static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
83 } 103 }
84 } 104 }
85 105
106 cmd->val = value;
107
108 if (!permissive && (!dev_data || !dev_data->permissive))
109 return 0;
110
111 /* Only allow the guest to control certain bits. */
112 err = pci_read_config_word(dev, offset, &val);
113 if (err || val == value)
114 return err;
115
116 value &= PCI_COMMAND_GUEST;
117 value |= val & ~PCI_COMMAND_GUEST;
118
86 return pci_write_config_word(dev, offset, value); 119 return pci_write_config_word(dev, offset, value);
87} 120}
88 121
@@ -282,6 +315,8 @@ static const struct config_field header_common[] = {
282 { 315 {
283 .offset = PCI_COMMAND, 316 .offset = PCI_COMMAND,
284 .size = 2, 317 .size = 2,
318 .init = command_init,
319 .release = bar_release,
285 .u.w.read = command_read, 320 .u.w.read = command_read,
286 .u.w.write = command_write, 321 .u.w.write = command_write,
287 }, 322 },
diff --git a/fs/locks.c b/fs/locks.c
index f1bad681fc1c..528fedfda15e 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1728,7 +1728,7 @@ static int generic_delete_lease(struct file *filp, void *owner)
1728 break; 1728 break;
1729 } 1729 }
1730 } 1730 }
1731 trace_generic_delete_lease(inode, fl); 1731 trace_generic_delete_lease(inode, victim);
1732 if (victim) 1732 if (victim)
1733 error = fl->fl_lmops->lm_change(victim, F_UNLCK, &dispose); 1733 error = fl->fl_lmops->lm_change(victim, F_UNLCK, &dispose);
1734 spin_unlock(&ctx->flc_lock); 1734 spin_unlock(&ctx->flc_lock);
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c
index 469086b9f99b..0c3f303baf32 100644
--- a/fs/nilfs2/segment.c
+++ b/fs/nilfs2/segment.c
@@ -1907,6 +1907,7 @@ static void nilfs_segctor_drop_written_files(struct nilfs_sc_info *sci,
1907 struct the_nilfs *nilfs) 1907 struct the_nilfs *nilfs)
1908{ 1908{
1909 struct nilfs_inode_info *ii, *n; 1909 struct nilfs_inode_info *ii, *n;
1910 int during_mount = !(sci->sc_super->s_flags & MS_ACTIVE);
1910 int defer_iput = false; 1911 int defer_iput = false;
1911 1912
1912 spin_lock(&nilfs->ns_inode_lock); 1913 spin_lock(&nilfs->ns_inode_lock);
@@ -1919,10 +1920,10 @@ static void nilfs_segctor_drop_written_files(struct nilfs_sc_info *sci,
1919 brelse(ii->i_bh); 1920 brelse(ii->i_bh);
1920 ii->i_bh = NULL; 1921 ii->i_bh = NULL;
1921 list_del_init(&ii->i_dirty); 1922 list_del_init(&ii->i_dirty);
1922 if (!ii->vfs_inode.i_nlink) { 1923 if (!ii->vfs_inode.i_nlink || during_mount) {
1923 /* 1924 /*
1924 * Defer calling iput() to avoid a deadlock 1925 * Defer calling iput() to avoid deadlocks if
1925 * over I_SYNC flag for inodes with i_nlink == 0 1926 * i_nlink == 0 or mount is not yet finished.
1926 */ 1927 */
1927 list_add_tail(&ii->i_dirty, &sci->sc_iput_queue); 1928 list_add_tail(&ii->i_dirty, &sci->sc_iput_queue);
1928 defer_iput = true; 1929 defer_iput = true;
diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c
index 9a66ff79ff27..d2f97ecca6a5 100644
--- a/fs/notify/fanotify/fanotify.c
+++ b/fs/notify/fanotify/fanotify.c
@@ -143,7 +143,8 @@ static bool fanotify_should_send_event(struct fsnotify_mark *inode_mark,
143 !(marks_mask & FS_ISDIR & ~marks_ignored_mask)) 143 !(marks_mask & FS_ISDIR & ~marks_ignored_mask))
144 return false; 144 return false;
145 145
146 if (event_mask & marks_mask & ~marks_ignored_mask) 146 if (event_mask & FAN_ALL_OUTGOING_EVENTS & marks_mask &
147 ~marks_ignored_mask)
147 return true; 148 return true;
148 149
149 return false; 150 return false;
diff --git a/fs/ocfs2/ocfs2.h b/fs/ocfs2/ocfs2.h
index 8490c64d34fe..460c6c37e683 100644
--- a/fs/ocfs2/ocfs2.h
+++ b/fs/ocfs2/ocfs2.h
@@ -502,7 +502,7 @@ static inline int ocfs2_writes_unwritten_extents(struct ocfs2_super *osb)
502 502
503static inline int ocfs2_supports_append_dio(struct ocfs2_super *osb) 503static inline int ocfs2_supports_append_dio(struct ocfs2_super *osb)
504{ 504{
505 if (osb->s_feature_ro_compat & OCFS2_FEATURE_RO_COMPAT_APPEND_DIO) 505 if (osb->s_feature_incompat & OCFS2_FEATURE_INCOMPAT_APPEND_DIO)
506 return 1; 506 return 1;
507 return 0; 507 return 0;
508} 508}
diff --git a/fs/ocfs2/ocfs2_fs.h b/fs/ocfs2/ocfs2_fs.h
index 20e37a3ed26f..db64ce2d4667 100644
--- a/fs/ocfs2/ocfs2_fs.h
+++ b/fs/ocfs2/ocfs2_fs.h
@@ -102,11 +102,11 @@
102 | OCFS2_FEATURE_INCOMPAT_INDEXED_DIRS \ 102 | OCFS2_FEATURE_INCOMPAT_INDEXED_DIRS \
103 | OCFS2_FEATURE_INCOMPAT_REFCOUNT_TREE \ 103 | OCFS2_FEATURE_INCOMPAT_REFCOUNT_TREE \
104 | OCFS2_FEATURE_INCOMPAT_DISCONTIG_BG \ 104 | OCFS2_FEATURE_INCOMPAT_DISCONTIG_BG \
105 | OCFS2_FEATURE_INCOMPAT_CLUSTERINFO) 105 | OCFS2_FEATURE_INCOMPAT_CLUSTERINFO \
106 | OCFS2_FEATURE_INCOMPAT_APPEND_DIO)
106#define OCFS2_FEATURE_RO_COMPAT_SUPP (OCFS2_FEATURE_RO_COMPAT_UNWRITTEN \ 107#define OCFS2_FEATURE_RO_COMPAT_SUPP (OCFS2_FEATURE_RO_COMPAT_UNWRITTEN \
107 | OCFS2_FEATURE_RO_COMPAT_USRQUOTA \ 108 | OCFS2_FEATURE_RO_COMPAT_USRQUOTA \
108 | OCFS2_FEATURE_RO_COMPAT_GRPQUOTA \ 109 | OCFS2_FEATURE_RO_COMPAT_GRPQUOTA)
109 | OCFS2_FEATURE_RO_COMPAT_APPEND_DIO)
110 110
111/* 111/*
112 * Heartbeat-only devices are missing journals and other files. The 112 * Heartbeat-only devices are missing journals and other files. The
@@ -179,6 +179,11 @@
179#define OCFS2_FEATURE_INCOMPAT_CLUSTERINFO 0x4000 179#define OCFS2_FEATURE_INCOMPAT_CLUSTERINFO 0x4000
180 180
181/* 181/*
182 * Append Direct IO support
183 */
184#define OCFS2_FEATURE_INCOMPAT_APPEND_DIO 0x8000
185
186/*
182 * backup superblock flag is used to indicate that this volume 187 * backup superblock flag is used to indicate that this volume
183 * has backup superblocks. 188 * has backup superblocks.
184 */ 189 */
@@ -200,10 +205,6 @@
200#define OCFS2_FEATURE_RO_COMPAT_USRQUOTA 0x0002 205#define OCFS2_FEATURE_RO_COMPAT_USRQUOTA 0x0002
201#define OCFS2_FEATURE_RO_COMPAT_GRPQUOTA 0x0004 206#define OCFS2_FEATURE_RO_COMPAT_GRPQUOTA 0x0004
202 207
203/*
204 * Append Direct IO support
205 */
206#define OCFS2_FEATURE_RO_COMPAT_APPEND_DIO 0x0008
207 208
208/* The byte offset of the first backup block will be 1G. 209/* The byte offset of the first backup block will be 1G.
209 * The following will be 4G, 16G, 64G, 256G and 1T. 210 * The following will be 4G, 16G, 64G, 256G and 1T.
diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
index b32ce53d24ee..56e1ffda4d89 100644
--- a/fs/pstore/inode.c
+++ b/fs/pstore/inode.c
@@ -364,6 +364,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname, u64 id, int count,
364 case PSTORE_TYPE_PMSG: 364 case PSTORE_TYPE_PMSG:
365 scnprintf(name, sizeof(name), "pmsg-%s-%lld", psname, id); 365 scnprintf(name, sizeof(name), "pmsg-%s-%lld", psname, id);
366 break; 366 break;
367 case PSTORE_TYPE_PPC_OPAL:
368 sprintf(name, "powerpc-opal-%s-%lld", psname, id);
369 break;
367 case PSTORE_TYPE_UNKNOWN: 370 case PSTORE_TYPE_UNKNOWN:
368 scnprintf(name, sizeof(name), "unknown-%s-%lld", psname, id); 371 scnprintf(name, sizeof(name), "unknown-%s-%lld", psname, id);
369 break; 372 break;
diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h
index 2fbc804e1a45..226f77246a70 100644
--- a/include/dt-bindings/pinctrl/am33xx.h
+++ b/include/dt-bindings/pinctrl/am33xx.h
@@ -13,7 +13,8 @@
13 13
14#define PULL_DISABLE (1 << 3) 14#define PULL_DISABLE (1 << 3)
15#define INPUT_EN (1 << 5) 15#define INPUT_EN (1 << 5)
16#define SLEWCTRL_FAST (1 << 6) 16#define SLEWCTRL_SLOW (1 << 6)
17#define SLEWCTRL_FAST 0
17 18
18/* update macro depending on INPUT_EN and PULL_ENA */ 19/* update macro depending on INPUT_EN and PULL_ENA */
19#undef PIN_OUTPUT 20#undef PIN_OUTPUT
diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h
index 9c2e4f82381e..5f4d01898c9c 100644
--- a/include/dt-bindings/pinctrl/am43xx.h
+++ b/include/dt-bindings/pinctrl/am43xx.h
@@ -18,7 +18,8 @@
18#define PULL_DISABLE (1 << 16) 18#define PULL_DISABLE (1 << 16)
19#define PULL_UP (1 << 17) 19#define PULL_UP (1 << 17)
20#define INPUT_EN (1 << 18) 20#define INPUT_EN (1 << 18)
21#define SLEWCTRL_FAST (1 << 19) 21#define SLEWCTRL_SLOW (1 << 19)
22#define SLEWCTRL_FAST 0
22#define DS0_PULL_UP_DOWN_EN (1 << 27) 23#define DS0_PULL_UP_DOWN_EN (1 << 27)
23 24
24#define PIN_OUTPUT (PULL_DISABLE) 25#define PIN_OUTPUT (PULL_DISABLE)
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 8381bbfbc308..68c16a6bedb3 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -125,6 +125,19 @@ int clk_set_phase(struct clk *clk, int degrees);
125 */ 125 */
126int clk_get_phase(struct clk *clk); 126int clk_get_phase(struct clk *clk);
127 127
128/**
129 * clk_is_match - check if two clk's point to the same hardware clock
130 * @p: clk compared against q
131 * @q: clk compared against p
132 *
133 * Returns true if the two struct clk pointers both point to the same hardware
134 * clock node. Put differently, returns true if struct clk *p and struct clk *q
135 * share the same struct clk_core object.
136 *
137 * Returns false otherwise. Note that two NULL clks are treated as matching.
138 */
139bool clk_is_match(const struct clk *p, const struct clk *q);
140
128#else 141#else
129 142
130static inline long clk_get_accuracy(struct clk *clk) 143static inline long clk_get_accuracy(struct clk *clk)
@@ -142,6 +155,11 @@ static inline long clk_get_phase(struct clk *clk)
142 return -ENOTSUPP; 155 return -ENOTSUPP;
143} 156}
144 157
158static inline bool clk_is_match(const struct clk *p, const struct clk *q)
159{
160 return p == q;
161}
162
145#endif 163#endif
146 164
147/** 165/**
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 800544bc7bfd..781974afff9f 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -166,6 +166,11 @@
166 166
167#define GITS_TRANSLATER 0x10040 167#define GITS_TRANSLATER 0x10040
168 168
169#define GITS_CTLR_ENABLE (1U << 0)
170#define GITS_CTLR_QUIESCENT (1U << 31)
171
172#define GITS_TYPER_DEVBITS_SHIFT 13
173#define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)
169#define GITS_TYPER_PTA (1UL << 19) 174#define GITS_TYPER_PTA (1UL << 19)
170 175
171#define GITS_CBASER_VALID (1UL << 63) 176#define GITS_CBASER_VALID (1UL << 63)
diff --git a/include/linux/kasan.h b/include/linux/kasan.h
index 72ba725ddf9c..5bb074431eb0 100644
--- a/include/linux/kasan.h
+++ b/include/linux/kasan.h
@@ -5,6 +5,7 @@
5 5
6struct kmem_cache; 6struct kmem_cache;
7struct page; 7struct page;
8struct vm_struct;
8 9
9#ifdef CONFIG_KASAN 10#ifdef CONFIG_KASAN
10 11
@@ -49,15 +50,11 @@ void kasan_krealloc(const void *object, size_t new_size);
49void kasan_slab_alloc(struct kmem_cache *s, void *object); 50void kasan_slab_alloc(struct kmem_cache *s, void *object);
50void kasan_slab_free(struct kmem_cache *s, void *object); 51void kasan_slab_free(struct kmem_cache *s, void *object);
51 52
52#define MODULE_ALIGN (PAGE_SIZE << KASAN_SHADOW_SCALE_SHIFT)
53
54int kasan_module_alloc(void *addr, size_t size); 53int kasan_module_alloc(void *addr, size_t size);
55void kasan_module_free(void *addr); 54void kasan_free_shadow(const struct vm_struct *vm);
56 55
57#else /* CONFIG_KASAN */ 56#else /* CONFIG_KASAN */
58 57
59#define MODULE_ALIGN 1
60
61static inline void kasan_unpoison_shadow(const void *address, size_t size) {} 58static inline void kasan_unpoison_shadow(const void *address, size_t size) {}
62 59
63static inline void kasan_enable_current(void) {} 60static inline void kasan_enable_current(void) {}
@@ -82,7 +79,7 @@ static inline void kasan_slab_alloc(struct kmem_cache *s, void *object) {}
82static inline void kasan_slab_free(struct kmem_cache *s, void *object) {} 79static inline void kasan_slab_free(struct kmem_cache *s, void *object) {}
83 80
84static inline int kasan_module_alloc(void *addr, size_t size) { return 0; } 81static inline int kasan_module_alloc(void *addr, size_t size) { return 0; }
85static inline void kasan_module_free(void *addr) {} 82static inline void kasan_free_shadow(const struct vm_struct *vm) {}
86 83
87#endif /* CONFIG_KASAN */ 84#endif /* CONFIG_KASAN */
88 85
diff --git a/include/linux/moduleloader.h b/include/linux/moduleloader.h
index f7556261fe3c..4d0cb9bba93e 100644
--- a/include/linux/moduleloader.h
+++ b/include/linux/moduleloader.h
@@ -84,4 +84,12 @@ void module_arch_cleanup(struct module *mod);
84 84
85/* Any cleanup before freeing mod->module_init */ 85/* Any cleanup before freeing mod->module_init */
86void module_arch_freeing_init(struct module *mod); 86void module_arch_freeing_init(struct module *mod);
87
88#ifdef CONFIG_KASAN
89#include <linux/kasan.h>
90#define MODULE_ALIGN (PAGE_SIZE << KASAN_SHADOW_SCALE_SHIFT)
91#else
92#define MODULE_ALIGN PAGE_SIZE
93#endif
94
87#endif 95#endif
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 8a860f096c35..611a691145c4 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -84,7 +84,7 @@ static inline int of_platform_populate(struct device_node *root,
84static inline void of_platform_depopulate(struct device *parent) { } 84static inline void of_platform_depopulate(struct device *parent) { }
85#endif 85#endif
86 86
87#ifdef CONFIG_OF_DYNAMIC 87#if defined(CONFIG_OF_DYNAMIC) && defined(CONFIG_OF_ADDRESS)
88extern void of_platform_register_reconfig_notifier(void); 88extern void of_platform_register_reconfig_notifier(void);
89#else 89#else
90static inline void of_platform_register_reconfig_notifier(void) { } 90static inline void of_platform_register_reconfig_notifier(void) { }
diff --git a/include/linux/pstore.h b/include/linux/pstore.h
index 8884f6e507f7..8e7a25b068b0 100644
--- a/include/linux/pstore.h
+++ b/include/linux/pstore.h
@@ -40,6 +40,7 @@ enum pstore_type_id {
40 PSTORE_TYPE_PPC_OF = 5, 40 PSTORE_TYPE_PPC_OF = 5,
41 PSTORE_TYPE_PPC_COMMON = 6, 41 PSTORE_TYPE_PPC_COMMON = 6,
42 PSTORE_TYPE_PMSG = 7, 42 PSTORE_TYPE_PMSG = 7,
43 PSTORE_TYPE_PPC_OPAL = 8,
43 PSTORE_TYPE_UNKNOWN = 255 44 PSTORE_TYPE_UNKNOWN = 255
44}; 45};
45 46
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index ed9489d893a4..856d34dde79b 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -649,7 +649,7 @@ struct spi_transfer {
649 * sequence completes. On some systems, many such sequences can execute as 649 * sequence completes. On some systems, many such sequences can execute as
650 * as single programmed DMA transfer. On all systems, these messages are 650 * as single programmed DMA transfer. On all systems, these messages are
651 * queued, and might complete after transactions to other devices. Messages 651 * queued, and might complete after transactions to other devices. Messages
652 * sent to a given spi_device are alway executed in FIFO order. 652 * sent to a given spi_device are always executed in FIFO order.
653 * 653 *
654 * The code that submits an spi_message (and its spi_transfers) 654 * The code that submits an spi_message (and its spi_transfers)
655 * to the lower layers is responsible for managing its memory. 655 * to the lower layers is responsible for managing its memory.
diff --git a/include/linux/uio.h b/include/linux/uio.h
index 07a022641996..71880299ed48 100644
--- a/include/linux/uio.h
+++ b/include/linux/uio.h
@@ -98,6 +98,8 @@ ssize_t iov_iter_get_pages_alloc(struct iov_iter *i, struct page ***pages,
98 size_t maxsize, size_t *start); 98 size_t maxsize, size_t *start);
99int iov_iter_npages(const struct iov_iter *i, int maxpages); 99int iov_iter_npages(const struct iov_iter *i, int maxpages);
100 100
101const void *dup_iter(struct iov_iter *new, struct iov_iter *old, gfp_t flags);
102
101static inline size_t iov_iter_count(struct iov_iter *i) 103static inline size_t iov_iter_count(struct iov_iter *i)
102{ 104{
103 return i->count; 105 return i->count;
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 7d7acb35603d..0ec598381f97 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -17,6 +17,7 @@ struct vm_area_struct; /* vma defining user mapping in mm_types.h */
17#define VM_VPAGES 0x00000010 /* buffer for pages was vmalloc'ed */ 17#define VM_VPAGES 0x00000010 /* buffer for pages was vmalloc'ed */
18#define VM_UNINITIALIZED 0x00000020 /* vm_struct is not fully initialized */ 18#define VM_UNINITIALIZED 0x00000020 /* vm_struct is not fully initialized */
19#define VM_NO_GUARD 0x00000040 /* don't add guard page */ 19#define VM_NO_GUARD 0x00000040 /* don't add guard page */
20#define VM_KASAN 0x00000080 /* has allocated kasan shadow memory */
20/* bits [20..32] reserved for arch specific ioremap internals */ 21/* bits [20..32] reserved for arch specific ioremap internals */
21 22
22/* 23/*
diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h
index 74db135f9957..f597846ff605 100644
--- a/include/linux/workqueue.h
+++ b/include/linux/workqueue.h
@@ -70,7 +70,8 @@ enum {
70 /* data contains off-queue information when !WORK_STRUCT_PWQ */ 70 /* data contains off-queue information when !WORK_STRUCT_PWQ */
71 WORK_OFFQ_FLAG_BASE = WORK_STRUCT_COLOR_SHIFT, 71 WORK_OFFQ_FLAG_BASE = WORK_STRUCT_COLOR_SHIFT,
72 72
73 WORK_OFFQ_CANCELING = (1 << WORK_OFFQ_FLAG_BASE), 73 __WORK_OFFQ_CANCELING = WORK_OFFQ_FLAG_BASE,
74 WORK_OFFQ_CANCELING = (1 << __WORK_OFFQ_CANCELING),
74 75
75 /* 76 /*
76 * When a work item is off queue, its high bits point to the last 77 * When a work item is off queue, its high bits point to the last
diff --git a/include/net/netfilter/nf_tables.h b/include/net/netfilter/nf_tables.h
index 9eaaa7884586..decb9a095ae7 100644
--- a/include/net/netfilter/nf_tables.h
+++ b/include/net/netfilter/nf_tables.h
@@ -119,6 +119,22 @@ int nft_validate_data_load(const struct nft_ctx *ctx, enum nft_registers reg,
119 const struct nft_data *data, 119 const struct nft_data *data,
120 enum nft_data_types type); 120 enum nft_data_types type);
121 121
122
123/**
124 * struct nft_userdata - user defined data associated with an object
125 *
126 * @len: length of the data
127 * @data: content
128 *
129 * The presence of user data is indicated in an object specific fashion,
130 * so a length of zero can't occur and the value "len" indicates data
131 * of length len + 1.
132 */
133struct nft_userdata {
134 u8 len;
135 unsigned char data[0];
136};
137
122/** 138/**
123 * struct nft_set_elem - generic representation of set elements 139 * struct nft_set_elem - generic representation of set elements
124 * 140 *
@@ -380,7 +396,7 @@ static inline void *nft_expr_priv(const struct nft_expr *expr)
380 * @handle: rule handle 396 * @handle: rule handle
381 * @genmask: generation mask 397 * @genmask: generation mask
382 * @dlen: length of expression data 398 * @dlen: length of expression data
383 * @ulen: length of user data (used for comments) 399 * @udata: user data is appended to the rule
384 * @data: expression data 400 * @data: expression data
385 */ 401 */
386struct nft_rule { 402struct nft_rule {
@@ -388,7 +404,7 @@ struct nft_rule {
388 u64 handle:42, 404 u64 handle:42,
389 genmask:2, 405 genmask:2,
390 dlen:12, 406 dlen:12,
391 ulen:8; 407 udata:1;
392 unsigned char data[] 408 unsigned char data[]
393 __attribute__((aligned(__alignof__(struct nft_expr)))); 409 __attribute__((aligned(__alignof__(struct nft_expr))));
394}; 410};
@@ -476,7 +492,7 @@ static inline struct nft_expr *nft_expr_last(const struct nft_rule *rule)
476 return (struct nft_expr *)&rule->data[rule->dlen]; 492 return (struct nft_expr *)&rule->data[rule->dlen];
477} 493}
478 494
479static inline void *nft_userdata(const struct nft_rule *rule) 495static inline struct nft_userdata *nft_userdata(const struct nft_rule *rule)
480{ 496{
481 return (void *)&rule->data[rule->dlen]; 497 return (void *)&rule->data[rule->dlen];
482} 498}
diff --git a/include/soc/at91/at91sam9_ddrsdr.h b/include/soc/at91/at91sam9_ddrsdr.h
index 0210797abf2e..dc10c52e0e91 100644
--- a/include/soc/at91/at91sam9_ddrsdr.h
+++ b/include/soc/at91/at91sam9_ddrsdr.h
@@ -92,7 +92,7 @@
92#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ 92#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */
93 93
94#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ 94#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */
95#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ 95#define AT91_DDRSDRC_MD (7 << 0) /* Memory Device Type */
96#define AT91_DDRSDRC_MD_SDR 0 96#define AT91_DDRSDRC_MD_SDR 0
97#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 97#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
98#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 98#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 60de61fea8e3..c8ed15daad02 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -689,6 +689,7 @@ struct omapdss_dsi_ops {
689}; 689};
690 690
691struct omap_dss_device { 691struct omap_dss_device {
692 struct kobject kobj;
692 struct device *dev; 693 struct device *dev;
693 694
694 struct module *owner; 695 struct module *owner;
diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h
index b78f21caf55a..b0f1c9e5d687 100644
--- a/include/xen/xenbus.h
+++ b/include/xen/xenbus.h
@@ -114,9 +114,9 @@ int __must_check __xenbus_register_backend(struct xenbus_driver *drv,
114 const char *mod_name); 114 const char *mod_name);
115 115
116#define xenbus_register_frontend(drv) \ 116#define xenbus_register_frontend(drv) \
117 __xenbus_register_frontend(drv, THIS_MODULE, KBUILD_MODNAME); 117 __xenbus_register_frontend(drv, THIS_MODULE, KBUILD_MODNAME)
118#define xenbus_register_backend(drv) \ 118#define xenbus_register_backend(drv) \
119 __xenbus_register_backend(drv, THIS_MODULE, KBUILD_MODNAME); 119 __xenbus_register_backend(drv, THIS_MODULE, KBUILD_MODNAME)
120 120
121void xenbus_unregister_driver(struct xenbus_driver *drv); 121void xenbus_unregister_driver(struct xenbus_driver *drv);
122 122
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 1d1fe9361d29..fc7f4748d34a 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -548,9 +548,6 @@ static void update_domain_attr_tree(struct sched_domain_attr *dattr,
548 548
549 rcu_read_lock(); 549 rcu_read_lock();
550 cpuset_for_each_descendant_pre(cp, pos_css, root_cs) { 550 cpuset_for_each_descendant_pre(cp, pos_css, root_cs) {
551 if (cp == root_cs)
552 continue;
553
554 /* skip the whole subtree if @cp doesn't have any CPU */ 551 /* skip the whole subtree if @cp doesn't have any CPU */
555 if (cpumask_empty(cp->cpus_allowed)) { 552 if (cpumask_empty(cp->cpus_allowed)) {
556 pos_css = css_rightmost_descendant(pos_css); 553 pos_css = css_rightmost_descendant(pos_css);
@@ -873,7 +870,7 @@ static void update_cpumasks_hier(struct cpuset *cs, struct cpumask *new_cpus)
873 * If it becomes empty, inherit the effective mask of the 870 * If it becomes empty, inherit the effective mask of the
874 * parent, which is guaranteed to have some CPUs. 871 * parent, which is guaranteed to have some CPUs.
875 */ 872 */
876 if (cpumask_empty(new_cpus)) 873 if (cgroup_on_dfl(cp->css.cgroup) && cpumask_empty(new_cpus))
877 cpumask_copy(new_cpus, parent->effective_cpus); 874 cpumask_copy(new_cpus, parent->effective_cpus);
878 875
879 /* Skip the whole subtree if the cpumask remains the same. */ 876 /* Skip the whole subtree if the cpumask remains the same. */
@@ -1129,7 +1126,7 @@ static void update_nodemasks_hier(struct cpuset *cs, nodemask_t *new_mems)
1129 * If it becomes empty, inherit the effective mask of the 1126 * If it becomes empty, inherit the effective mask of the
1130 * parent, which is guaranteed to have some MEMs. 1127 * parent, which is guaranteed to have some MEMs.
1131 */ 1128 */
1132 if (nodes_empty(*new_mems)) 1129 if (cgroup_on_dfl(cp->css.cgroup) && nodes_empty(*new_mems))
1133 *new_mems = parent->effective_mems; 1130 *new_mems = parent->effective_mems;
1134 1131
1135 /* Skip the whole subtree if the nodemask remains the same. */ 1132 /* Skip the whole subtree if the nodemask remains the same. */
@@ -1979,7 +1976,9 @@ static int cpuset_css_online(struct cgroup_subsys_state *css)
1979 1976
1980 spin_lock_irq(&callback_lock); 1977 spin_lock_irq(&callback_lock);
1981 cs->mems_allowed = parent->mems_allowed; 1978 cs->mems_allowed = parent->mems_allowed;
1979 cs->effective_mems = parent->mems_allowed;
1982 cpumask_copy(cs->cpus_allowed, parent->cpus_allowed); 1980 cpumask_copy(cs->cpus_allowed, parent->cpus_allowed);
1981 cpumask_copy(cs->effective_cpus, parent->cpus_allowed);
1983 spin_unlock_irq(&callback_lock); 1982 spin_unlock_irq(&callback_lock);
1984out_unlock: 1983out_unlock:
1985 mutex_unlock(&cpuset_mutex); 1984 mutex_unlock(&cpuset_mutex);
diff --git a/kernel/module.c b/kernel/module.c
index cc93cf68653c..b3d634ed06c9 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -56,7 +56,6 @@
56#include <linux/async.h> 56#include <linux/async.h>
57#include <linux/percpu.h> 57#include <linux/percpu.h>
58#include <linux/kmemleak.h> 58#include <linux/kmemleak.h>
59#include <linux/kasan.h>
60#include <linux/jump_label.h> 59#include <linux/jump_label.h>
61#include <linux/pfn.h> 60#include <linux/pfn.h>
62#include <linux/bsearch.h> 61#include <linux/bsearch.h>
@@ -1814,7 +1813,6 @@ static void unset_module_init_ro_nx(struct module *mod) { }
1814void __weak module_memfree(void *module_region) 1813void __weak module_memfree(void *module_region)
1815{ 1814{
1816 vfree(module_region); 1815 vfree(module_region);
1817 kasan_module_free(module_region);
1818} 1816}
1819 1817
1820void __weak module_arch_cleanup(struct module *mod) 1818void __weak module_arch_cleanup(struct module *mod)
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 45e5cb143d17..4f228024055b 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -1059,6 +1059,12 @@ static __init void ftrace_profile_debugfs(struct dentry *d_tracer)
1059 1059
1060static struct pid * const ftrace_swapper_pid = &init_struct_pid; 1060static struct pid * const ftrace_swapper_pid = &init_struct_pid;
1061 1061
1062#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1063static int ftrace_graph_active;
1064#else
1065# define ftrace_graph_active 0
1066#endif
1067
1062#ifdef CONFIG_DYNAMIC_FTRACE 1068#ifdef CONFIG_DYNAMIC_FTRACE
1063 1069
1064static struct ftrace_ops *removed_ops; 1070static struct ftrace_ops *removed_ops;
@@ -2041,8 +2047,12 @@ static int ftrace_check_record(struct dyn_ftrace *rec, int enable, int update)
2041 if (!ftrace_rec_count(rec)) 2047 if (!ftrace_rec_count(rec))
2042 rec->flags = 0; 2048 rec->flags = 0;
2043 else 2049 else
2044 /* Just disable the record (keep REGS state) */ 2050 /*
2045 rec->flags &= ~FTRACE_FL_ENABLED; 2051 * Just disable the record, but keep the ops TRAMP
2052 * and REGS states. The _EN flags must be disabled though.
2053 */
2054 rec->flags &= ~(FTRACE_FL_ENABLED | FTRACE_FL_TRAMP_EN |
2055 FTRACE_FL_REGS_EN);
2046 } 2056 }
2047 2057
2048 return FTRACE_UPDATE_MAKE_NOP; 2058 return FTRACE_UPDATE_MAKE_NOP;
@@ -2688,24 +2698,36 @@ static int ftrace_shutdown(struct ftrace_ops *ops, int command)
2688 2698
2689static void ftrace_startup_sysctl(void) 2699static void ftrace_startup_sysctl(void)
2690{ 2700{
2701 int command;
2702
2691 if (unlikely(ftrace_disabled)) 2703 if (unlikely(ftrace_disabled))
2692 return; 2704 return;
2693 2705
2694 /* Force update next time */ 2706 /* Force update next time */
2695 saved_ftrace_func = NULL; 2707 saved_ftrace_func = NULL;
2696 /* ftrace_start_up is true if we want ftrace running */ 2708 /* ftrace_start_up is true if we want ftrace running */
2697 if (ftrace_start_up) 2709 if (ftrace_start_up) {
2698 ftrace_run_update_code(FTRACE_UPDATE_CALLS); 2710 command = FTRACE_UPDATE_CALLS;
2711 if (ftrace_graph_active)
2712 command |= FTRACE_START_FUNC_RET;
2713 ftrace_startup_enable(command);
2714 }
2699} 2715}
2700 2716
2701static void ftrace_shutdown_sysctl(void) 2717static void ftrace_shutdown_sysctl(void)
2702{ 2718{
2719 int command;
2720
2703 if (unlikely(ftrace_disabled)) 2721 if (unlikely(ftrace_disabled))
2704 return; 2722 return;
2705 2723
2706 /* ftrace_start_up is true if ftrace is running */ 2724 /* ftrace_start_up is true if ftrace is running */
2707 if (ftrace_start_up) 2725 if (ftrace_start_up) {
2708 ftrace_run_update_code(FTRACE_DISABLE_CALLS); 2726 command = FTRACE_DISABLE_CALLS;
2727 if (ftrace_graph_active)
2728 command |= FTRACE_STOP_FUNC_RET;
2729 ftrace_run_update_code(command);
2730 }
2709} 2731}
2710 2732
2711static cycle_t ftrace_update_time; 2733static cycle_t ftrace_update_time;
@@ -5558,12 +5580,12 @@ ftrace_enable_sysctl(struct ctl_table *table, int write,
5558 5580
5559 if (ftrace_enabled) { 5581 if (ftrace_enabled) {
5560 5582
5561 ftrace_startup_sysctl();
5562
5563 /* we are starting ftrace again */ 5583 /* we are starting ftrace again */
5564 if (ftrace_ops_list != &ftrace_list_end) 5584 if (ftrace_ops_list != &ftrace_list_end)
5565 update_ftrace_function(); 5585 update_ftrace_function();
5566 5586
5587 ftrace_startup_sysctl();
5588
5567 } else { 5589 } else {
5568 /* stopping ftrace calls (just send to ftrace_stub) */ 5590 /* stopping ftrace calls (just send to ftrace_stub) */
5569 ftrace_trace_function = ftrace_stub; 5591 ftrace_trace_function = ftrace_stub;
@@ -5590,8 +5612,6 @@ static struct ftrace_ops graph_ops = {
5590 ASSIGN_OPS_HASH(graph_ops, &global_ops.local_hash) 5612 ASSIGN_OPS_HASH(graph_ops, &global_ops.local_hash)
5591}; 5613};
5592 5614
5593static int ftrace_graph_active;
5594
5595int ftrace_graph_entry_stub(struct ftrace_graph_ent *trace) 5615int ftrace_graph_entry_stub(struct ftrace_graph_ent *trace)
5596{ 5616{
5597 return 0; 5617 return 0;
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index f28849394791..41ff75b478c6 100644
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -2728,19 +2728,57 @@ bool flush_work(struct work_struct *work)
2728} 2728}
2729EXPORT_SYMBOL_GPL(flush_work); 2729EXPORT_SYMBOL_GPL(flush_work);
2730 2730
2731struct cwt_wait {
2732 wait_queue_t wait;
2733 struct work_struct *work;
2734};
2735
2736static int cwt_wakefn(wait_queue_t *wait, unsigned mode, int sync, void *key)
2737{
2738 struct cwt_wait *cwait = container_of(wait, struct cwt_wait, wait);
2739
2740 if (cwait->work != key)
2741 return 0;
2742 return autoremove_wake_function(wait, mode, sync, key);
2743}
2744
2731static bool __cancel_work_timer(struct work_struct *work, bool is_dwork) 2745static bool __cancel_work_timer(struct work_struct *work, bool is_dwork)
2732{ 2746{
2747 static DECLARE_WAIT_QUEUE_HEAD(cancel_waitq);
2733 unsigned long flags; 2748 unsigned long flags;
2734 int ret; 2749 int ret;
2735 2750
2736 do { 2751 do {
2737 ret = try_to_grab_pending(work, is_dwork, &flags); 2752 ret = try_to_grab_pending(work, is_dwork, &flags);
2738 /* 2753 /*
2739 * If someone else is canceling, wait for the same event it 2754 * If someone else is already canceling, wait for it to
2740 * would be waiting for before retrying. 2755 * finish. flush_work() doesn't work for PREEMPT_NONE
2756 * because we may get scheduled between @work's completion
2757 * and the other canceling task resuming and clearing
2758 * CANCELING - flush_work() will return false immediately
2759 * as @work is no longer busy, try_to_grab_pending() will
2760 * return -ENOENT as @work is still being canceled and the
2761 * other canceling task won't be able to clear CANCELING as
2762 * we're hogging the CPU.
2763 *
2764 * Let's wait for completion using a waitqueue. As this
2765 * may lead to the thundering herd problem, use a custom
2766 * wake function which matches @work along with exclusive
2767 * wait and wakeup.
2741 */ 2768 */
2742 if (unlikely(ret == -ENOENT)) 2769 if (unlikely(ret == -ENOENT)) {
2743 flush_work(work); 2770 struct cwt_wait cwait;
2771
2772 init_wait(&cwait.wait);
2773 cwait.wait.func = cwt_wakefn;
2774 cwait.work = work;
2775
2776 prepare_to_wait_exclusive(&cancel_waitq, &cwait.wait,
2777 TASK_UNINTERRUPTIBLE);
2778 if (work_is_canceling(work))
2779 schedule();
2780 finish_wait(&cancel_waitq, &cwait.wait);
2781 }
2744 } while (unlikely(ret < 0)); 2782 } while (unlikely(ret < 0));
2745 2783
2746 /* tell other tasks trying to grab @work to back off */ 2784 /* tell other tasks trying to grab @work to back off */
@@ -2749,6 +2787,16 @@ static bool __cancel_work_timer(struct work_struct *work, bool is_dwork)
2749 2787
2750 flush_work(work); 2788 flush_work(work);
2751 clear_work_data(work); 2789 clear_work_data(work);
2790
2791 /*
2792 * Paired with prepare_to_wait() above so that either
2793 * waitqueue_active() is visible here or !work_is_canceling() is
2794 * visible there.
2795 */
2796 smp_mb();
2797 if (waitqueue_active(&cancel_waitq))
2798 __wake_up(&cancel_waitq, TASK_NORMAL, 1, work);
2799
2752 return ret; 2800 return ret;
2753} 2801}
2754 2802
diff --git a/lib/Makefile b/lib/Makefile
index 87eb3bffc283..58f74d2dd396 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -24,7 +24,7 @@ obj-y += lockref.o
24 24
25obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \ 25obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \
26 bust_spinlocks.o kasprintf.o bitmap.o scatterlist.o \ 26 bust_spinlocks.o kasprintf.o bitmap.o scatterlist.o \
27 gcd.o lcm.o list_sort.o uuid.o flex_array.o clz_ctz.o \ 27 gcd.o lcm.o list_sort.o uuid.o flex_array.o iov_iter.o clz_ctz.o \
28 bsearch.o find_last_bit.o find_next_bit.o llist.o memweight.o kfifo.o \ 28 bsearch.o find_last_bit.o find_next_bit.o llist.o memweight.o kfifo.o \
29 percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o 29 percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o
30obj-y += string_helpers.o 30obj-y += string_helpers.o
diff --git a/mm/iov_iter.c b/lib/iov_iter.c
index 827732047da1..9d96e283520c 100644
--- a/mm/iov_iter.c
+++ b/lib/iov_iter.c
@@ -751,3 +751,18 @@ int iov_iter_npages(const struct iov_iter *i, int maxpages)
751 return npages; 751 return npages;
752} 752}
753EXPORT_SYMBOL(iov_iter_npages); 753EXPORT_SYMBOL(iov_iter_npages);
754
755const void *dup_iter(struct iov_iter *new, struct iov_iter *old, gfp_t flags)
756{
757 *new = *old;
758 if (new->type & ITER_BVEC)
759 return new->bvec = kmemdup(new->bvec,
760 new->nr_segs * sizeof(struct bio_vec),
761 flags);
762 else
763 /* iovec and kvec have identical layout */
764 return new->iov = kmemdup(new->iov,
765 new->nr_segs * sizeof(struct iovec),
766 flags);
767}
768EXPORT_SYMBOL(dup_iter);
diff --git a/lib/seq_buf.c b/lib/seq_buf.c
index 88c0854bd752..5c94e1012a91 100644
--- a/lib/seq_buf.c
+++ b/lib/seq_buf.c
@@ -61,7 +61,7 @@ int seq_buf_vprintf(struct seq_buf *s, const char *fmt, va_list args)
61 61
62 if (s->len < s->size) { 62 if (s->len < s->size) {
63 len = vsnprintf(s->buffer + s->len, s->size - s->len, fmt, args); 63 len = vsnprintf(s->buffer + s->len, s->size - s->len, fmt, args);
64 if (seq_buf_can_fit(s, len)) { 64 if (s->len + len < s->size) {
65 s->len += len; 65 s->len += len;
66 return 0; 66 return 0;
67 } 67 }
@@ -118,7 +118,7 @@ int seq_buf_bprintf(struct seq_buf *s, const char *fmt, const u32 *binary)
118 118
119 if (s->len < s->size) { 119 if (s->len < s->size) {
120 ret = bstr_printf(s->buffer + s->len, len, fmt, binary); 120 ret = bstr_printf(s->buffer + s->len, len, fmt, binary);
121 if (seq_buf_can_fit(s, ret)) { 121 if (s->len + ret < s->size) {
122 s->len += ret; 122 s->len += ret;
123 return 0; 123 return 0;
124 } 124 }
diff --git a/mm/Makefile b/mm/Makefile
index 3c1caa2693bd..15dbe9903c27 100644
--- a/mm/Makefile
+++ b/mm/Makefile
@@ -21,7 +21,7 @@ obj-y := filemap.o mempool.o oom_kill.o \
21 mm_init.o mmu_context.o percpu.o slab_common.o \ 21 mm_init.o mmu_context.o percpu.o slab_common.o \
22 compaction.o vmacache.o \ 22 compaction.o vmacache.o \
23 interval_tree.o list_lru.o workingset.o \ 23 interval_tree.o list_lru.o workingset.o \
24 iov_iter.o debug.o $(mmu-y) 24 debug.o $(mmu-y)
25 25
26obj-y += init-mm.o 26obj-y += init-mm.o
27 27
diff --git a/mm/cma.c b/mm/cma.c
index 75016fd1de90..68ecb7a42983 100644
--- a/mm/cma.c
+++ b/mm/cma.c
@@ -64,15 +64,17 @@ static unsigned long cma_bitmap_aligned_mask(struct cma *cma, int align_order)
64 return (1UL << (align_order - cma->order_per_bit)) - 1; 64 return (1UL << (align_order - cma->order_per_bit)) - 1;
65} 65}
66 66
67/*
68 * Find a PFN aligned to the specified order and return an offset represented in
69 * order_per_bits.
70 */
67static unsigned long cma_bitmap_aligned_offset(struct cma *cma, int align_order) 71static unsigned long cma_bitmap_aligned_offset(struct cma *cma, int align_order)
68{ 72{
69 unsigned int alignment;
70
71 if (align_order <= cma->order_per_bit) 73 if (align_order <= cma->order_per_bit)
72 return 0; 74 return 0;
73 alignment = 1UL << (align_order - cma->order_per_bit); 75
74 return ALIGN(cma->base_pfn, alignment) - 76 return (ALIGN(cma->base_pfn, (1UL << align_order))
75 (cma->base_pfn >> cma->order_per_bit); 77 - cma->base_pfn) >> cma->order_per_bit;
76} 78}
77 79
78static unsigned long cma_bitmap_maxno(struct cma *cma) 80static unsigned long cma_bitmap_maxno(struct cma *cma)
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index fc00c8cb5a82..626e93db28ba 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1295,8 +1295,13 @@ int do_huge_pmd_numa_page(struct mm_struct *mm, struct vm_area_struct *vma,
1295 * Avoid grouping on DSO/COW pages in specific and RO pages 1295 * Avoid grouping on DSO/COW pages in specific and RO pages
1296 * in general, RO pages shouldn't hurt as much anyway since 1296 * in general, RO pages shouldn't hurt as much anyway since
1297 * they can be in shared cache state. 1297 * they can be in shared cache state.
1298 *
1299 * FIXME! This checks "pmd_dirty()" as an approximation of
1300 * "is this a read-only page", since checking "pmd_write()"
1301 * is even more broken. We haven't actually turned this into
1302 * a writable page, so pmd_write() will always be false.
1298 */ 1303 */
1299 if (!pmd_write(pmd)) 1304 if (!pmd_dirty(pmd))
1300 flags |= TNF_NO_GROUP; 1305 flags |= TNF_NO_GROUP;
1301 1306
1302 /* 1307 /*
@@ -1482,6 +1487,7 @@ int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd,
1482 1487
1483 if (__pmd_trans_huge_lock(pmd, vma, &ptl) == 1) { 1488 if (__pmd_trans_huge_lock(pmd, vma, &ptl) == 1) {
1484 pmd_t entry; 1489 pmd_t entry;
1490 ret = 1;
1485 1491
1486 /* 1492 /*
1487 * Avoid trapping faults against the zero page. The read-only 1493 * Avoid trapping faults against the zero page. The read-only
@@ -1490,11 +1496,10 @@ int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd,
1490 */ 1496 */
1491 if (prot_numa && is_huge_zero_pmd(*pmd)) { 1497 if (prot_numa && is_huge_zero_pmd(*pmd)) {
1492 spin_unlock(ptl); 1498 spin_unlock(ptl);
1493 return 0; 1499 return ret;
1494 } 1500 }
1495 1501
1496 if (!prot_numa || !pmd_protnone(*pmd)) { 1502 if (!prot_numa || !pmd_protnone(*pmd)) {
1497 ret = 1;
1498 entry = pmdp_get_and_clear_notify(mm, addr, pmd); 1503 entry = pmdp_get_and_clear_notify(mm, addr, pmd);
1499 entry = pmd_modify(entry, newprot); 1504 entry = pmd_modify(entry, newprot);
1500 ret = HPAGE_PMD_NR; 1505 ret = HPAGE_PMD_NR;
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 0a9ac6c26832..c41b2a0ee273 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -917,7 +917,6 @@ static void prep_compound_gigantic_page(struct page *page, unsigned long order)
917 __SetPageHead(page); 917 __SetPageHead(page);
918 __ClearPageReserved(page); 918 __ClearPageReserved(page);
919 for (i = 1; i < nr_pages; i++, p = mem_map_next(p, page, i)) { 919 for (i = 1; i < nr_pages; i++, p = mem_map_next(p, page, i)) {
920 __SetPageTail(p);
921 /* 920 /*
922 * For gigantic hugepages allocated through bootmem at 921 * For gigantic hugepages allocated through bootmem at
923 * boot, it's safer to be consistent with the not-gigantic 922 * boot, it's safer to be consistent with the not-gigantic
@@ -933,6 +932,9 @@ static void prep_compound_gigantic_page(struct page *page, unsigned long order)
933 __ClearPageReserved(p); 932 __ClearPageReserved(p);
934 set_page_count(p, 0); 933 set_page_count(p, 0);
935 p->first_page = page; 934 p->first_page = page;
935 /* Make sure p->first_page is always valid for PageTail() */
936 smp_wmb();
937 __SetPageTail(p);
936 } 938 }
937} 939}
938 940
diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
index 78fee632a7ee..936d81661c47 100644
--- a/mm/kasan/kasan.c
+++ b/mm/kasan/kasan.c
@@ -29,6 +29,7 @@
29#include <linux/stacktrace.h> 29#include <linux/stacktrace.h>
30#include <linux/string.h> 30#include <linux/string.h>
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/vmalloc.h>
32#include <linux/kasan.h> 33#include <linux/kasan.h>
33 34
34#include "kasan.h" 35#include "kasan.h"
@@ -414,12 +415,19 @@ int kasan_module_alloc(void *addr, size_t size)
414 GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO, 415 GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO,
415 PAGE_KERNEL, VM_NO_GUARD, NUMA_NO_NODE, 416 PAGE_KERNEL, VM_NO_GUARD, NUMA_NO_NODE,
416 __builtin_return_address(0)); 417 __builtin_return_address(0));
417 return ret ? 0 : -ENOMEM; 418
419 if (ret) {
420 find_vm_area(addr)->flags |= VM_KASAN;
421 return 0;
422 }
423
424 return -ENOMEM;
418} 425}
419 426
420void kasan_module_free(void *addr) 427void kasan_free_shadow(const struct vm_struct *vm)
421{ 428{
422 vfree(kasan_mem_to_shadow(addr)); 429 if (vm->flags & VM_KASAN)
430 vfree(kasan_mem_to_shadow(vm->addr));
423} 431}
424 432
425static void register_global(struct kasan_global *global) 433static void register_global(struct kasan_global *global)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 9fe07692eaad..b34ef4a32a3b 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -5232,7 +5232,9 @@ static void mem_cgroup_bind(struct cgroup_subsys_state *root_css)
5232 * on for the root memcg is enough. 5232 * on for the root memcg is enough.
5233 */ 5233 */
5234 if (cgroup_on_dfl(root_css->cgroup)) 5234 if (cgroup_on_dfl(root_css->cgroup))
5235 mem_cgroup_from_css(root_css)->use_hierarchy = true; 5235 root_mem_cgroup->use_hierarchy = true;
5236 else
5237 root_mem_cgroup->use_hierarchy = false;
5236} 5238}
5237 5239
5238static u64 memory_current_read(struct cgroup_subsys_state *css, 5240static u64 memory_current_read(struct cgroup_subsys_state *css,
diff --git a/mm/memory.c b/mm/memory.c
index 8068893697bb..411144f977b1 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -3072,8 +3072,13 @@ static int do_numa_page(struct mm_struct *mm, struct vm_area_struct *vma,
3072 * Avoid grouping on DSO/COW pages in specific and RO pages 3072 * Avoid grouping on DSO/COW pages in specific and RO pages
3073 * in general, RO pages shouldn't hurt as much anyway since 3073 * in general, RO pages shouldn't hurt as much anyway since
3074 * they can be in shared cache state. 3074 * they can be in shared cache state.
3075 *
3076 * FIXME! This checks "pmd_dirty()" as an approximation of
3077 * "is this a read-only page", since checking "pmd_write()"
3078 * is even more broken. We haven't actually turned this into
3079 * a writable page, so pmd_write() will always be false.
3075 */ 3080 */
3076 if (!pte_write(pte)) 3081 if (!pte_dirty(pte))
3077 flags |= TNF_NO_GROUP; 3082 flags |= TNF_NO_GROUP;
3078 3083
3079 /* 3084 /*
diff --git a/mm/mlock.c b/mm/mlock.c
index 73cf0987088c..8a54cd214925 100644
--- a/mm/mlock.c
+++ b/mm/mlock.c
@@ -26,10 +26,10 @@
26 26
27int can_do_mlock(void) 27int can_do_mlock(void)
28{ 28{
29 if (capable(CAP_IPC_LOCK))
30 return 1;
31 if (rlimit(RLIMIT_MEMLOCK) != 0) 29 if (rlimit(RLIMIT_MEMLOCK) != 0)
32 return 1; 30 return 1;
31 if (capable(CAP_IPC_LOCK))
32 return 1;
33 return 0; 33 return 0;
34} 34}
35EXPORT_SYMBOL(can_do_mlock); 35EXPORT_SYMBOL(can_do_mlock);
diff --git a/mm/nommu.c b/mm/nommu.c
index 3e67e7538ecf..3fba2dc97c44 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -62,6 +62,7 @@ void *high_memory;
62EXPORT_SYMBOL(high_memory); 62EXPORT_SYMBOL(high_memory);
63struct page *mem_map; 63struct page *mem_map;
64unsigned long max_mapnr; 64unsigned long max_mapnr;
65EXPORT_SYMBOL(max_mapnr);
65unsigned long highest_memmap_pfn; 66unsigned long highest_memmap_pfn;
66struct percpu_counter vm_committed_as; 67struct percpu_counter vm_committed_as;
67int sysctl_overcommit_memory = OVERCOMMIT_GUESS; /* heuristic overcommit */ 68int sysctl_overcommit_memory = OVERCOMMIT_GUESS; /* heuristic overcommit */
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 7abfa70cdc1a..40e29429e7b0 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -2373,7 +2373,8 @@ __alloc_pages_may_oom(gfp_t gfp_mask, unsigned int order,
2373 goto out; 2373 goto out;
2374 } 2374 }
2375 /* Exhausted what can be done so it's blamo time */ 2375 /* Exhausted what can be done so it's blamo time */
2376 if (out_of_memory(ac->zonelist, gfp_mask, order, ac->nodemask, false)) 2376 if (out_of_memory(ac->zonelist, gfp_mask, order, ac->nodemask, false)
2377 || WARN_ON_ONCE(gfp_mask & __GFP_NOFAIL))
2377 *did_some_progress = 1; 2378 *did_some_progress = 1;
2378out: 2379out:
2379 oom_zonelist_unlock(ac->zonelist, gfp_mask); 2380 oom_zonelist_unlock(ac->zonelist, gfp_mask);
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 35b25e1340ca..49abccf29a29 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1418,6 +1418,7 @@ struct vm_struct *remove_vm_area(const void *addr)
1418 spin_unlock(&vmap_area_lock); 1418 spin_unlock(&vmap_area_lock);
1419 1419
1420 vmap_debug_free_range(va->va_start, va->va_end); 1420 vmap_debug_free_range(va->va_start, va->va_end);
1421 kasan_free_shadow(vm);
1421 free_unmap_vmap_area(va); 1422 free_unmap_vmap_area(va);
1422 vm->size -= PAGE_SIZE; 1423 vm->size -= PAGE_SIZE;
1423 1424
diff --git a/net/can/af_can.c b/net/can/af_can.c
index 66e08040ced7..32d710eaf1fc 100644
--- a/net/can/af_can.c
+++ b/net/can/af_can.c
@@ -259,6 +259,9 @@ int can_send(struct sk_buff *skb, int loop)
259 goto inval_skb; 259 goto inval_skb;
260 } 260 }
261 261
262 skb->ip_summed = CHECKSUM_UNNECESSARY;
263
264 skb_reset_mac_header(skb);
262 skb_reset_network_header(skb); 265 skb_reset_network_header(skb);
263 skb_reset_transport_header(skb); 266 skb_reset_transport_header(skb);
264 267
diff --git a/net/ipv4/ip_fragment.c b/net/ipv4/ip_fragment.c
index 2c8d98e728c0..145a50c4d566 100644
--- a/net/ipv4/ip_fragment.c
+++ b/net/ipv4/ip_fragment.c
@@ -659,27 +659,30 @@ EXPORT_SYMBOL(ip_defrag);
659struct sk_buff *ip_check_defrag(struct sk_buff *skb, u32 user) 659struct sk_buff *ip_check_defrag(struct sk_buff *skb, u32 user)
660{ 660{
661 struct iphdr iph; 661 struct iphdr iph;
662 int netoff;
662 u32 len; 663 u32 len;
663 664
664 if (skb->protocol != htons(ETH_P_IP)) 665 if (skb->protocol != htons(ETH_P_IP))
665 return skb; 666 return skb;
666 667
667 if (skb_copy_bits(skb, 0, &iph, sizeof(iph)) < 0) 668 netoff = skb_network_offset(skb);
669
670 if (skb_copy_bits(skb, netoff, &iph, sizeof(iph)) < 0)
668 return skb; 671 return skb;
669 672
670 if (iph.ihl < 5 || iph.version != 4) 673 if (iph.ihl < 5 || iph.version != 4)
671 return skb; 674 return skb;
672 675
673 len = ntohs(iph.tot_len); 676 len = ntohs(iph.tot_len);
674 if (skb->len < len || len < (iph.ihl * 4)) 677 if (skb->len < netoff + len || len < (iph.ihl * 4))
675 return skb; 678 return skb;
676 679
677 if (ip_is_fragment(&iph)) { 680 if (ip_is_fragment(&iph)) {
678 skb = skb_share_check(skb, GFP_ATOMIC); 681 skb = skb_share_check(skb, GFP_ATOMIC);
679 if (skb) { 682 if (skb) {
680 if (!pskb_may_pull(skb, iph.ihl*4)) 683 if (!pskb_may_pull(skb, netoff + iph.ihl * 4))
681 return skb; 684 return skb;
682 if (pskb_trim_rcsum(skb, len)) 685 if (pskb_trim_rcsum(skb, netoff + len))
683 return skb; 686 return skb;
684 memset(IPCB(skb), 0, sizeof(struct inet_skb_parm)); 687 memset(IPCB(skb), 0, sizeof(struct inet_skb_parm));
685 if (ip_defrag(skb, user)) 688 if (ip_defrag(skb, user))
diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c
index 31d8c71986b4..5cd99271d3a6 100644
--- a/net/ipv4/ip_sockglue.c
+++ b/net/ipv4/ip_sockglue.c
@@ -432,17 +432,32 @@ void ip_local_error(struct sock *sk, int err, __be32 daddr, __be16 port, u32 inf
432 kfree_skb(skb); 432 kfree_skb(skb);
433} 433}
434 434
435static bool ipv4_pktinfo_prepare_errqueue(const struct sock *sk, 435/* IPv4 supports cmsg on all imcp errors and some timestamps
436 const struct sk_buff *skb, 436 *
437 int ee_origin) 437 * Timestamp code paths do not initialize the fields expected by cmsg:
438 * the PKTINFO fields in skb->cb[]. Fill those in here.
439 */
440static bool ipv4_datagram_support_cmsg(const struct sock *sk,
441 struct sk_buff *skb,
442 int ee_origin)
438{ 443{
439 struct in_pktinfo *info = PKTINFO_SKB_CB(skb); 444 struct in_pktinfo *info;
445
446 if (ee_origin == SO_EE_ORIGIN_ICMP)
447 return true;
440 448
441 if ((ee_origin != SO_EE_ORIGIN_TIMESTAMPING) || 449 if (ee_origin == SO_EE_ORIGIN_LOCAL)
442 (!(sk->sk_tsflags & SOF_TIMESTAMPING_OPT_CMSG)) || 450 return false;
451
452 /* Support IP_PKTINFO on tstamp packets if requested, to correlate
453 * timestamp with egress dev. Not possible for packets without dev
454 * or without payload (SOF_TIMESTAMPING_OPT_TSONLY).
455 */
456 if ((!(sk->sk_tsflags & SOF_TIMESTAMPING_OPT_CMSG)) ||
443 (!skb->dev)) 457 (!skb->dev))
444 return false; 458 return false;
445 459
460 info = PKTINFO_SKB_CB(skb);
446 info->ipi_spec_dst.s_addr = ip_hdr(skb)->saddr; 461 info->ipi_spec_dst.s_addr = ip_hdr(skb)->saddr;
447 info->ipi_ifindex = skb->dev->ifindex; 462 info->ipi_ifindex = skb->dev->ifindex;
448 return true; 463 return true;
@@ -483,7 +498,7 @@ int ip_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
483 498
484 serr = SKB_EXT_ERR(skb); 499 serr = SKB_EXT_ERR(skb);
485 500
486 if (sin && skb->len) { 501 if (sin && serr->port) {
487 sin->sin_family = AF_INET; 502 sin->sin_family = AF_INET;
488 sin->sin_addr.s_addr = *(__be32 *)(skb_network_header(skb) + 503 sin->sin_addr.s_addr = *(__be32 *)(skb_network_header(skb) +
489 serr->addr_offset); 504 serr->addr_offset);
@@ -496,9 +511,7 @@ int ip_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
496 sin = &errhdr.offender; 511 sin = &errhdr.offender;
497 memset(sin, 0, sizeof(*sin)); 512 memset(sin, 0, sizeof(*sin));
498 513
499 if (skb->len && 514 if (ipv4_datagram_support_cmsg(sk, skb, serr->ee.ee_origin)) {
500 (serr->ee.ee_origin == SO_EE_ORIGIN_ICMP ||
501 ipv4_pktinfo_prepare_errqueue(sk, skb, serr->ee.ee_origin))) {
502 sin->sin_family = AF_INET; 515 sin->sin_family = AF_INET;
503 sin->sin_addr.s_addr = ip_hdr(skb)->saddr; 516 sin->sin_addr.s_addr = ip_hdr(skb)->saddr;
504 if (inet_sk(sk)->cmsg_flags) 517 if (inet_sk(sk)->cmsg_flags)
diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index e9f66e1cda50..208d5439e59b 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -259,6 +259,9 @@ int ping_init_sock(struct sock *sk)
259 kgid_t low, high; 259 kgid_t low, high;
260 int ret = 0; 260 int ret = 0;
261 261
262 if (sk->sk_family == AF_INET6)
263 sk->sk_ipv6only = 1;
264
262 inet_get_ping_group_range_net(net, &low, &high); 265 inet_get_ping_group_range_net(net, &low, &high);
263 if (gid_lte(low, group) && gid_lte(group, high)) 266 if (gid_lte(low, group) && gid_lte(group, high))
264 return 0; 267 return 0;
@@ -305,6 +308,11 @@ static int ping_check_bind_addr(struct sock *sk, struct inet_sock *isk,
305 if (addr_len < sizeof(*addr)) 308 if (addr_len < sizeof(*addr))
306 return -EINVAL; 309 return -EINVAL;
307 310
311 if (addr->sin_family != AF_INET &&
312 !(addr->sin_family == AF_UNSPEC &&
313 addr->sin_addr.s_addr == htonl(INADDR_ANY)))
314 return -EAFNOSUPPORT;
315
308 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI4,port=%d)\n", 316 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI4,port=%d)\n",
309 sk, &addr->sin_addr.s_addr, ntohs(addr->sin_port)); 317 sk, &addr->sin_addr.s_addr, ntohs(addr->sin_port));
310 318
@@ -330,7 +338,7 @@ static int ping_check_bind_addr(struct sock *sk, struct inet_sock *isk,
330 return -EINVAL; 338 return -EINVAL;
331 339
332 if (addr->sin6_family != AF_INET6) 340 if (addr->sin6_family != AF_INET6)
333 return -EINVAL; 341 return -EAFNOSUPPORT;
334 342
335 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI6c,port=%d)\n", 343 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI6c,port=%d)\n",
336 sk, addr->sin6_addr.s6_addr, ntohs(addr->sin6_port)); 344 sk, addr->sin6_addr.s6_addr, ntohs(addr->sin6_port));
@@ -716,7 +724,7 @@ static int ping_v4_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *m
716 if (msg->msg_namelen < sizeof(*usin)) 724 if (msg->msg_namelen < sizeof(*usin))
717 return -EINVAL; 725 return -EINVAL;
718 if (usin->sin_family != AF_INET) 726 if (usin->sin_family != AF_INET)
719 return -EINVAL; 727 return -EAFNOSUPPORT;
720 daddr = usin->sin_addr.s_addr; 728 daddr = usin->sin_addr.s_addr;
721 /* no remote port */ 729 /* no remote port */
722 } else { 730 } else {
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 9d72a0fcd928..995a2259bcfc 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -835,17 +835,13 @@ static unsigned int tcp_xmit_size_goal(struct sock *sk, u32 mss_now,
835 int large_allowed) 835 int large_allowed)
836{ 836{
837 struct tcp_sock *tp = tcp_sk(sk); 837 struct tcp_sock *tp = tcp_sk(sk);
838 u32 new_size_goal, size_goal, hlen; 838 u32 new_size_goal, size_goal;
839 839
840 if (!large_allowed || !sk_can_gso(sk)) 840 if (!large_allowed || !sk_can_gso(sk))
841 return mss_now; 841 return mss_now;
842 842
843 /* Maybe we should/could use sk->sk_prot->max_header here ? */ 843 /* Note : tcp_tso_autosize() will eventually split this later */
844 hlen = inet_csk(sk)->icsk_af_ops->net_header_len + 844 new_size_goal = sk->sk_gso_max_size - 1 - MAX_TCP_HEADER;
845 inet_csk(sk)->icsk_ext_hdr_len +
846 tp->tcp_header_len;
847
848 new_size_goal = sk->sk_gso_max_size - 1 - hlen;
849 new_size_goal = tcp_bound_to_half_wnd(tp, new_size_goal); 845 new_size_goal = tcp_bound_to_half_wnd(tp, new_size_goal);
850 846
851 /* We try hard to avoid divides here */ 847 /* We try hard to avoid divides here */
diff --git a/net/ipv6/datagram.c b/net/ipv6/datagram.c
index c215be70cac0..ace8daca5c83 100644
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -325,14 +325,34 @@ void ipv6_local_rxpmtu(struct sock *sk, struct flowi6 *fl6, u32 mtu)
325 kfree_skb(skb); 325 kfree_skb(skb);
326} 326}
327 327
328static void ip6_datagram_prepare_pktinfo_errqueue(struct sk_buff *skb) 328/* IPv6 supports cmsg on all origins aside from SO_EE_ORIGIN_LOCAL.
329 *
330 * At one point, excluding local errors was a quick test to identify icmp/icmp6
331 * errors. This is no longer true, but the test remained, so the v6 stack,
332 * unlike v4, also honors cmsg requests on all wifi and timestamp errors.
333 *
334 * Timestamp code paths do not initialize the fields expected by cmsg:
335 * the PKTINFO fields in skb->cb[]. Fill those in here.
336 */
337static bool ip6_datagram_support_cmsg(struct sk_buff *skb,
338 struct sock_exterr_skb *serr)
329{ 339{
330 int ifindex = skb->dev ? skb->dev->ifindex : -1; 340 if (serr->ee.ee_origin == SO_EE_ORIGIN_ICMP ||
341 serr->ee.ee_origin == SO_EE_ORIGIN_ICMP6)
342 return true;
343
344 if (serr->ee.ee_origin == SO_EE_ORIGIN_LOCAL)
345 return false;
346
347 if (!skb->dev)
348 return false;
331 349
332 if (skb->protocol == htons(ETH_P_IPV6)) 350 if (skb->protocol == htons(ETH_P_IPV6))
333 IP6CB(skb)->iif = ifindex; 351 IP6CB(skb)->iif = skb->dev->ifindex;
334 else 352 else
335 PKTINFO_SKB_CB(skb)->ipi_ifindex = ifindex; 353 PKTINFO_SKB_CB(skb)->ipi_ifindex = skb->dev->ifindex;
354
355 return true;
336} 356}
337 357
338/* 358/*
@@ -369,7 +389,7 @@ int ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
369 389
370 serr = SKB_EXT_ERR(skb); 390 serr = SKB_EXT_ERR(skb);
371 391
372 if (sin && skb->len) { 392 if (sin && serr->port) {
373 const unsigned char *nh = skb_network_header(skb); 393 const unsigned char *nh = skb_network_header(skb);
374 sin->sin6_family = AF_INET6; 394 sin->sin6_family = AF_INET6;
375 sin->sin6_flowinfo = 0; 395 sin->sin6_flowinfo = 0;
@@ -394,14 +414,11 @@ int ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
394 memcpy(&errhdr.ee, &serr->ee, sizeof(struct sock_extended_err)); 414 memcpy(&errhdr.ee, &serr->ee, sizeof(struct sock_extended_err));
395 sin = &errhdr.offender; 415 sin = &errhdr.offender;
396 memset(sin, 0, sizeof(*sin)); 416 memset(sin, 0, sizeof(*sin));
397 if (serr->ee.ee_origin != SO_EE_ORIGIN_LOCAL && skb->len) { 417
418 if (ip6_datagram_support_cmsg(skb, serr)) {
398 sin->sin6_family = AF_INET6; 419 sin->sin6_family = AF_INET6;
399 if (np->rxopt.all) { 420 if (np->rxopt.all)
400 if (serr->ee.ee_origin != SO_EE_ORIGIN_ICMP &&
401 serr->ee.ee_origin != SO_EE_ORIGIN_ICMP6)
402 ip6_datagram_prepare_pktinfo_errqueue(skb);
403 ip6_datagram_recv_common_ctl(sk, msg, skb); 421 ip6_datagram_recv_common_ctl(sk, msg, skb);
404 }
405 if (skb->protocol == htons(ETH_P_IPV6)) { 422 if (skb->protocol == htons(ETH_P_IPV6)) {
406 sin->sin6_addr = ipv6_hdr(skb)->saddr; 423 sin->sin6_addr = ipv6_hdr(skb)->saddr;
407 if (np->rxopt.all) 424 if (np->rxopt.all)
diff --git a/net/ipv6/ping.c b/net/ipv6/ping.c
index bd46f736f61d..a2dfff6ff227 100644
--- a/net/ipv6/ping.c
+++ b/net/ipv6/ping.c
@@ -102,9 +102,10 @@ int ping_v6_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
102 102
103 if (msg->msg_name) { 103 if (msg->msg_name) {
104 DECLARE_SOCKADDR(struct sockaddr_in6 *, u, msg->msg_name); 104 DECLARE_SOCKADDR(struct sockaddr_in6 *, u, msg->msg_name);
105 if (msg->msg_namelen < sizeof(struct sockaddr_in6) || 105 if (msg->msg_namelen < sizeof(*u))
106 u->sin6_family != AF_INET6) {
107 return -EINVAL; 106 return -EINVAL;
107 if (u->sin6_family != AF_INET6) {
108 return -EAFNOSUPPORT;
108 } 109 }
109 if (sk->sk_bound_dev_if && 110 if (sk->sk_bound_dev_if &&
110 sk->sk_bound_dev_if != u->sin6_scope_id) { 111 sk->sk_bound_dev_if != u->sin6_scope_id) {
diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c
index c47ffd7a0a70..d93ceeb3ef04 100644
--- a/net/netfilter/ipvs/ip_vs_sync.c
+++ b/net/netfilter/ipvs/ip_vs_sync.c
@@ -896,6 +896,8 @@ static void ip_vs_proc_conn(struct net *net, struct ip_vs_conn_param *param,
896 IP_VS_DBG(2, "BACKUP, add new conn. failed\n"); 896 IP_VS_DBG(2, "BACKUP, add new conn. failed\n");
897 return; 897 return;
898 } 898 }
899 if (!(flags & IP_VS_CONN_F_TEMPLATE))
900 kfree(param->pe_data);
899 } 901 }
900 902
901 if (opt) 903 if (opt)
@@ -1169,6 +1171,7 @@ static inline int ip_vs_proc_sync_conn(struct net *net, __u8 *p, __u8 *msg_end)
1169 (opt_flags & IPVS_OPT_F_SEQ_DATA ? &opt : NULL) 1171 (opt_flags & IPVS_OPT_F_SEQ_DATA ? &opt : NULL)
1170 ); 1172 );
1171#endif 1173#endif
1174 ip_vs_pe_put(param.pe);
1172 return 0; 1175 return 0;
1173 /* Error exit */ 1176 /* Error exit */
1174out: 1177out:
diff --git a/net/netfilter/nf_tables_api.c b/net/netfilter/nf_tables_api.c
index 199fd0f27b0e..6ab777912237 100644
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -227,7 +227,7 @@ nft_rule_deactivate_next(struct net *net, struct nft_rule *rule)
227 227
228static inline void nft_rule_clear(struct net *net, struct nft_rule *rule) 228static inline void nft_rule_clear(struct net *net, struct nft_rule *rule)
229{ 229{
230 rule->genmask = 0; 230 rule->genmask &= ~(1 << gencursor_next(net));
231} 231}
232 232
233static int 233static int
@@ -1711,9 +1711,12 @@ static int nf_tables_fill_rule_info(struct sk_buff *skb, struct net *net,
1711 } 1711 }
1712 nla_nest_end(skb, list); 1712 nla_nest_end(skb, list);
1713 1713
1714 if (rule->ulen && 1714 if (rule->udata) {
1715 nla_put(skb, NFTA_RULE_USERDATA, rule->ulen, nft_userdata(rule))) 1715 struct nft_userdata *udata = nft_userdata(rule);
1716 goto nla_put_failure; 1716 if (nla_put(skb, NFTA_RULE_USERDATA, udata->len + 1,
1717 udata->data) < 0)
1718 goto nla_put_failure;
1719 }
1717 1720
1718 nlmsg_end(skb, nlh); 1721 nlmsg_end(skb, nlh);
1719 return 0; 1722 return 0;
@@ -1896,11 +1899,12 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
1896 struct nft_table *table; 1899 struct nft_table *table;
1897 struct nft_chain *chain; 1900 struct nft_chain *chain;
1898 struct nft_rule *rule, *old_rule = NULL; 1901 struct nft_rule *rule, *old_rule = NULL;
1902 struct nft_userdata *udata;
1899 struct nft_trans *trans = NULL; 1903 struct nft_trans *trans = NULL;
1900 struct nft_expr *expr; 1904 struct nft_expr *expr;
1901 struct nft_ctx ctx; 1905 struct nft_ctx ctx;
1902 struct nlattr *tmp; 1906 struct nlattr *tmp;
1903 unsigned int size, i, n, ulen = 0; 1907 unsigned int size, i, n, ulen = 0, usize = 0;
1904 int err, rem; 1908 int err, rem;
1905 bool create; 1909 bool create;
1906 u64 handle, pos_handle; 1910 u64 handle, pos_handle;
@@ -1968,12 +1972,19 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
1968 n++; 1972 n++;
1969 } 1973 }
1970 } 1974 }
1975 /* Check for overflow of dlen field */
1976 err = -EFBIG;
1977 if (size >= 1 << 12)
1978 goto err1;
1971 1979
1972 if (nla[NFTA_RULE_USERDATA]) 1980 if (nla[NFTA_RULE_USERDATA]) {
1973 ulen = nla_len(nla[NFTA_RULE_USERDATA]); 1981 ulen = nla_len(nla[NFTA_RULE_USERDATA]);
1982 if (ulen > 0)
1983 usize = sizeof(struct nft_userdata) + ulen;
1984 }
1974 1985
1975 err = -ENOMEM; 1986 err = -ENOMEM;
1976 rule = kzalloc(sizeof(*rule) + size + ulen, GFP_KERNEL); 1987 rule = kzalloc(sizeof(*rule) + size + usize, GFP_KERNEL);
1977 if (rule == NULL) 1988 if (rule == NULL)
1978 goto err1; 1989 goto err1;
1979 1990
@@ -1981,10 +1992,13 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
1981 1992
1982 rule->handle = handle; 1993 rule->handle = handle;
1983 rule->dlen = size; 1994 rule->dlen = size;
1984 rule->ulen = ulen; 1995 rule->udata = ulen ? 1 : 0;
1985 1996
1986 if (ulen) 1997 if (ulen) {
1987 nla_memcpy(nft_userdata(rule), nla[NFTA_RULE_USERDATA], ulen); 1998 udata = nft_userdata(rule);
1999 udata->len = ulen - 1;
2000 nla_memcpy(udata->data, nla[NFTA_RULE_USERDATA], ulen);
2001 }
1988 2002
1989 expr = nft_expr_first(rule); 2003 expr = nft_expr_first(rule);
1990 for (i = 0; i < n; i++) { 2004 for (i = 0; i < n; i++) {
@@ -2031,12 +2045,6 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
2031 2045
2032err3: 2046err3:
2033 list_del_rcu(&rule->list); 2047 list_del_rcu(&rule->list);
2034 if (trans) {
2035 list_del_rcu(&nft_trans_rule(trans)->list);
2036 nft_rule_clear(net, nft_trans_rule(trans));
2037 nft_trans_destroy(trans);
2038 chain->use++;
2039 }
2040err2: 2048err2:
2041 nf_tables_rule_destroy(&ctx, rule); 2049 nf_tables_rule_destroy(&ctx, rule);
2042err1: 2050err1:
@@ -3612,12 +3620,11 @@ static int nf_tables_commit(struct sk_buff *skb)
3612 &te->elem, 3620 &te->elem,
3613 NFT_MSG_DELSETELEM, 0); 3621 NFT_MSG_DELSETELEM, 0);
3614 te->set->ops->get(te->set, &te->elem); 3622 te->set->ops->get(te->set, &te->elem);
3615 te->set->ops->remove(te->set, &te->elem);
3616 nft_data_uninit(&te->elem.key, NFT_DATA_VALUE); 3623 nft_data_uninit(&te->elem.key, NFT_DATA_VALUE);
3617 if (te->elem.flags & NFT_SET_MAP) { 3624 if (te->set->flags & NFT_SET_MAP &&
3618 nft_data_uninit(&te->elem.data, 3625 !(te->elem.flags & NFT_SET_ELEM_INTERVAL_END))
3619 te->set->dtype); 3626 nft_data_uninit(&te->elem.data, te->set->dtype);
3620 } 3627 te->set->ops->remove(te->set, &te->elem);
3621 nft_trans_destroy(trans); 3628 nft_trans_destroy(trans);
3622 break; 3629 break;
3623 } 3630 }
@@ -3658,7 +3665,7 @@ static int nf_tables_abort(struct sk_buff *skb)
3658{ 3665{
3659 struct net *net = sock_net(skb->sk); 3666 struct net *net = sock_net(skb->sk);
3660 struct nft_trans *trans, *next; 3667 struct nft_trans *trans, *next;
3661 struct nft_set *set; 3668 struct nft_trans_elem *te;
3662 3669
3663 list_for_each_entry_safe(trans, next, &net->nft.commit_list, list) { 3670 list_for_each_entry_safe(trans, next, &net->nft.commit_list, list) {
3664 switch (trans->msg_type) { 3671 switch (trans->msg_type) {
@@ -3719,9 +3726,13 @@ static int nf_tables_abort(struct sk_buff *skb)
3719 break; 3726 break;
3720 case NFT_MSG_NEWSETELEM: 3727 case NFT_MSG_NEWSETELEM:
3721 nft_trans_elem_set(trans)->nelems--; 3728 nft_trans_elem_set(trans)->nelems--;
3722 set = nft_trans_elem_set(trans); 3729 te = (struct nft_trans_elem *)trans->data;
3723 set->ops->get(set, &nft_trans_elem(trans)); 3730 te->set->ops->get(te->set, &te->elem);
3724 set->ops->remove(set, &nft_trans_elem(trans)); 3731 nft_data_uninit(&te->elem.key, NFT_DATA_VALUE);
3732 if (te->set->flags & NFT_SET_MAP &&
3733 !(te->elem.flags & NFT_SET_ELEM_INTERVAL_END))
3734 nft_data_uninit(&te->elem.data, te->set->dtype);
3735 te->set->ops->remove(te->set, &te->elem);
3725 nft_trans_destroy(trans); 3736 nft_trans_destroy(trans);
3726 break; 3737 break;
3727 case NFT_MSG_DELSETELEM: 3738 case NFT_MSG_DELSETELEM:
diff --git a/net/netfilter/nft_compat.c b/net/netfilter/nft_compat.c
index 1279cd85663e..213584cf04b3 100644
--- a/net/netfilter/nft_compat.c
+++ b/net/netfilter/nft_compat.c
@@ -123,7 +123,7 @@ static void
123nft_target_set_tgchk_param(struct xt_tgchk_param *par, 123nft_target_set_tgchk_param(struct xt_tgchk_param *par,
124 const struct nft_ctx *ctx, 124 const struct nft_ctx *ctx,
125 struct xt_target *target, void *info, 125 struct xt_target *target, void *info,
126 union nft_entry *entry, u8 proto, bool inv) 126 union nft_entry *entry, u16 proto, bool inv)
127{ 127{
128 par->net = ctx->net; 128 par->net = ctx->net;
129 par->table = ctx->table->name; 129 par->table = ctx->table->name;
@@ -137,7 +137,7 @@ nft_target_set_tgchk_param(struct xt_tgchk_param *par,
137 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0; 137 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0;
138 break; 138 break;
139 case NFPROTO_BRIDGE: 139 case NFPROTO_BRIDGE:
140 entry->ebt.ethproto = proto; 140 entry->ebt.ethproto = (__force __be16)proto;
141 entry->ebt.invflags = inv ? EBT_IPROTO : 0; 141 entry->ebt.invflags = inv ? EBT_IPROTO : 0;
142 break; 142 break;
143 } 143 }
@@ -171,7 +171,7 @@ static const struct nla_policy nft_rule_compat_policy[NFTA_RULE_COMPAT_MAX + 1]
171 [NFTA_RULE_COMPAT_FLAGS] = { .type = NLA_U32 }, 171 [NFTA_RULE_COMPAT_FLAGS] = { .type = NLA_U32 },
172}; 172};
173 173
174static int nft_parse_compat(const struct nlattr *attr, u8 *proto, bool *inv) 174static int nft_parse_compat(const struct nlattr *attr, u16 *proto, bool *inv)
175{ 175{
176 struct nlattr *tb[NFTA_RULE_COMPAT_MAX+1]; 176 struct nlattr *tb[NFTA_RULE_COMPAT_MAX+1];
177 u32 flags; 177 u32 flags;
@@ -203,7 +203,7 @@ nft_target_init(const struct nft_ctx *ctx, const struct nft_expr *expr,
203 struct xt_target *target = expr->ops->data; 203 struct xt_target *target = expr->ops->data;
204 struct xt_tgchk_param par; 204 struct xt_tgchk_param par;
205 size_t size = XT_ALIGN(nla_len(tb[NFTA_TARGET_INFO])); 205 size_t size = XT_ALIGN(nla_len(tb[NFTA_TARGET_INFO]));
206 u8 proto = 0; 206 u16 proto = 0;
207 bool inv = false; 207 bool inv = false;
208 union nft_entry e = {}; 208 union nft_entry e = {};
209 int ret; 209 int ret;
@@ -334,7 +334,7 @@ static const struct nla_policy nft_match_policy[NFTA_MATCH_MAX + 1] = {
334static void 334static void
335nft_match_set_mtchk_param(struct xt_mtchk_param *par, const struct nft_ctx *ctx, 335nft_match_set_mtchk_param(struct xt_mtchk_param *par, const struct nft_ctx *ctx,
336 struct xt_match *match, void *info, 336 struct xt_match *match, void *info,
337 union nft_entry *entry, u8 proto, bool inv) 337 union nft_entry *entry, u16 proto, bool inv)
338{ 338{
339 par->net = ctx->net; 339 par->net = ctx->net;
340 par->table = ctx->table->name; 340 par->table = ctx->table->name;
@@ -348,7 +348,7 @@ nft_match_set_mtchk_param(struct xt_mtchk_param *par, const struct nft_ctx *ctx,
348 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0; 348 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0;
349 break; 349 break;
350 case NFPROTO_BRIDGE: 350 case NFPROTO_BRIDGE:
351 entry->ebt.ethproto = proto; 351 entry->ebt.ethproto = (__force __be16)proto;
352 entry->ebt.invflags = inv ? EBT_IPROTO : 0; 352 entry->ebt.invflags = inv ? EBT_IPROTO : 0;
353 break; 353 break;
354 } 354 }
@@ -385,7 +385,7 @@ nft_match_init(const struct nft_ctx *ctx, const struct nft_expr *expr,
385 struct xt_match *match = expr->ops->data; 385 struct xt_match *match = expr->ops->data;
386 struct xt_mtchk_param par; 386 struct xt_mtchk_param par;
387 size_t size = XT_ALIGN(nla_len(tb[NFTA_MATCH_INFO])); 387 size_t size = XT_ALIGN(nla_len(tb[NFTA_MATCH_INFO]));
388 u8 proto = 0; 388 u16 proto = 0;
389 bool inv = false; 389 bool inv = false;
390 union nft_entry e = {}; 390 union nft_entry e = {};
391 int ret; 391 int ret;
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 5bf1e968a728..f8db7064d81c 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -3123,11 +3123,18 @@ static int packet_dev_mc(struct net_device *dev, struct packet_mclist *i,
3123 return 0; 3123 return 0;
3124} 3124}
3125 3125
3126static void packet_dev_mclist(struct net_device *dev, struct packet_mclist *i, int what) 3126static void packet_dev_mclist_delete(struct net_device *dev,
3127 struct packet_mclist **mlp)
3127{ 3128{
3128 for ( ; i; i = i->next) { 3129 struct packet_mclist *ml;
3129 if (i->ifindex == dev->ifindex) 3130
3130 packet_dev_mc(dev, i, what); 3131 while ((ml = *mlp) != NULL) {
3132 if (ml->ifindex == dev->ifindex) {
3133 packet_dev_mc(dev, ml, -1);
3134 *mlp = ml->next;
3135 kfree(ml);
3136 } else
3137 mlp = &ml->next;
3131 } 3138 }
3132} 3139}
3133 3140
@@ -3204,12 +3211,11 @@ static int packet_mc_drop(struct sock *sk, struct packet_mreq_max *mreq)
3204 packet_dev_mc(dev, ml, -1); 3211 packet_dev_mc(dev, ml, -1);
3205 kfree(ml); 3212 kfree(ml);
3206 } 3213 }
3207 rtnl_unlock(); 3214 break;
3208 return 0;
3209 } 3215 }
3210 } 3216 }
3211 rtnl_unlock(); 3217 rtnl_unlock();
3212 return -EADDRNOTAVAIL; 3218 return 0;
3213} 3219}
3214 3220
3215static void packet_flush_mclist(struct sock *sk) 3221static void packet_flush_mclist(struct sock *sk)
@@ -3559,7 +3565,7 @@ static int packet_notifier(struct notifier_block *this,
3559 switch (msg) { 3565 switch (msg) {
3560 case NETDEV_UNREGISTER: 3566 case NETDEV_UNREGISTER:
3561 if (po->mclist) 3567 if (po->mclist)
3562 packet_dev_mclist(dev, po->mclist, -1); 3568 packet_dev_mclist_delete(dev, &po->mclist);
3563 /* fallthrough */ 3569 /* fallthrough */
3564 3570
3565 case NETDEV_DOWN: 3571 case NETDEV_DOWN:
diff --git a/net/rxrpc/ar-error.c b/net/rxrpc/ar-error.c
index 5394b6be46ec..0610efa83d72 100644
--- a/net/rxrpc/ar-error.c
+++ b/net/rxrpc/ar-error.c
@@ -42,7 +42,8 @@ void rxrpc_UDP_error_report(struct sock *sk)
42 _leave("UDP socket errqueue empty"); 42 _leave("UDP socket errqueue empty");
43 return; 43 return;
44 } 44 }
45 if (!skb->len) { 45 serr = SKB_EXT_ERR(skb);
46 if (!skb->len && serr->ee.ee_origin == SO_EE_ORIGIN_TIMESTAMPING) {
46 _leave("UDP empty message"); 47 _leave("UDP empty message");
47 kfree_skb(skb); 48 kfree_skb(skb);
48 return; 49 return;
@@ -50,7 +51,6 @@ void rxrpc_UDP_error_report(struct sock *sk)
50 51
51 rxrpc_new_skb(skb); 52 rxrpc_new_skb(skb);
52 53
53 serr = SKB_EXT_ERR(skb);
54 addr = *(__be32 *)(skb_network_header(skb) + serr->addr_offset); 54 addr = *(__be32 *)(skb_network_header(skb) + serr->addr_offset);
55 port = serr->port; 55 port = serr->port;
56 56
diff --git a/net/tipc/link.c b/net/tipc/link.c
index a4cf364316de..14f09b3cb87c 100644
--- a/net/tipc/link.c
+++ b/net/tipc/link.c
@@ -464,10 +464,11 @@ void tipc_link_reset(struct tipc_link *l_ptr)
464 /* Clean up all queues, except inputq: */ 464 /* Clean up all queues, except inputq: */
465 __skb_queue_purge(&l_ptr->outqueue); 465 __skb_queue_purge(&l_ptr->outqueue);
466 __skb_queue_purge(&l_ptr->deferred_queue); 466 __skb_queue_purge(&l_ptr->deferred_queue);
467 skb_queue_splice_init(&l_ptr->wakeupq, &l_ptr->inputq); 467 if (!owner->inputq)
468 if (!skb_queue_empty(&l_ptr->inputq)) 468 owner->inputq = &l_ptr->inputq;
469 skb_queue_splice_init(&l_ptr->wakeupq, owner->inputq);
470 if (!skb_queue_empty(owner->inputq))
469 owner->action_flags |= TIPC_MSG_EVT; 471 owner->action_flags |= TIPC_MSG_EVT;
470 owner->inputq = &l_ptr->inputq;
471 l_ptr->next_out = NULL; 472 l_ptr->next_out = NULL;
472 l_ptr->unacked_window = 0; 473 l_ptr->unacked_window = 0;
473 l_ptr->checkpoint = 1; 474 l_ptr->checkpoint = 1;
diff --git a/sound/core/control.c b/sound/core/control.c
index 35324a8e83c8..eeb691d1911f 100644
--- a/sound/core/control.c
+++ b/sound/core/control.c
@@ -1170,6 +1170,10 @@ static int snd_ctl_elem_add(struct snd_ctl_file *file,
1170 1170
1171 if (info->count < 1) 1171 if (info->count < 1)
1172 return -EINVAL; 1172 return -EINVAL;
1173 if (!*info->id.name)
1174 return -EINVAL;
1175 if (strnlen(info->id.name, sizeof(info->id.name)) >= sizeof(info->id.name))
1176 return -EINVAL;
1173 access = info->access == 0 ? SNDRV_CTL_ELEM_ACCESS_READWRITE : 1177 access = info->access == 0 ? SNDRV_CTL_ELEM_ACCESS_READWRITE :
1174 (info->access & (SNDRV_CTL_ELEM_ACCESS_READWRITE| 1178 (info->access & (SNDRV_CTL_ELEM_ACCESS_READWRITE|
1175 SNDRV_CTL_ELEM_ACCESS_INACTIVE| 1179 SNDRV_CTL_ELEM_ACCESS_INACTIVE|
diff --git a/sound/firewire/dice/dice-interface.h b/sound/firewire/dice/dice-interface.h
index de7602bd69b5..27b044f84c81 100644
--- a/sound/firewire/dice/dice-interface.h
+++ b/sound/firewire/dice/dice-interface.h
@@ -299,23 +299,23 @@
299#define RX_ISOCHRONOUS 0x008 299#define RX_ISOCHRONOUS 0x008
300 300
301/* 301/*
302 * Index of first quadlet to be interpreted; read/write. If > 0, that many
303 * quadlets at the beginning of each data block will be ignored, and all the
304 * audio and MIDI quadlets will follow.
305 */
306#define RX_SEQ_START 0x00c
307
308/*
302 * The number of audio channels; read-only. There will be one quadlet per 309 * The number of audio channels; read-only. There will be one quadlet per
303 * channel. 310 * channel.
304 */ 311 */
305#define RX_NUMBER_AUDIO 0x00c 312#define RX_NUMBER_AUDIO 0x010
306 313
307/* 314/*
308 * The number of MIDI ports, 0-8; read-only. If > 0, there will be one 315 * The number of MIDI ports, 0-8; read-only. If > 0, there will be one
309 * additional quadlet in each data block, following the audio quadlets. 316 * additional quadlet in each data block, following the audio quadlets.
310 */ 317 */
311#define RX_NUMBER_MIDI 0x010 318#define RX_NUMBER_MIDI 0x014
312
313/*
314 * Index of first quadlet to be interpreted; read/write. If > 0, that many
315 * quadlets at the beginning of each data block will be ignored, and all the
316 * audio and MIDI quadlets will follow.
317 */
318#define RX_SEQ_START 0x014
319 319
320/* 320/*
321 * Names of all audio channels; read-only. Quadlets are byte-swapped. Names 321 * Names of all audio channels; read-only. Quadlets are byte-swapped. Names
diff --git a/sound/firewire/dice/dice-proc.c b/sound/firewire/dice/dice-proc.c
index ecfe20fd4de5..f5c1d1bced59 100644
--- a/sound/firewire/dice/dice-proc.c
+++ b/sound/firewire/dice/dice-proc.c
@@ -99,9 +99,9 @@ static void dice_proc_read(struct snd_info_entry *entry,
99 } tx; 99 } tx;
100 struct { 100 struct {
101 u32 iso; 101 u32 iso;
102 u32 seq_start;
102 u32 number_audio; 103 u32 number_audio;
103 u32 number_midi; 104 u32 number_midi;
104 u32 seq_start;
105 char names[RX_NAMES_SIZE]; 105 char names[RX_NAMES_SIZE];
106 u32 ac3_caps; 106 u32 ac3_caps;
107 u32 ac3_enable; 107 u32 ac3_enable;
@@ -204,10 +204,10 @@ static void dice_proc_read(struct snd_info_entry *entry,
204 break; 204 break;
205 snd_iprintf(buffer, "rx %u:\n", stream); 205 snd_iprintf(buffer, "rx %u:\n", stream);
206 snd_iprintf(buffer, " iso channel: %d\n", (int)buf.rx.iso); 206 snd_iprintf(buffer, " iso channel: %d\n", (int)buf.rx.iso);
207 snd_iprintf(buffer, " sequence start: %u\n", buf.rx.seq_start);
207 snd_iprintf(buffer, " audio channels: %u\n", 208 snd_iprintf(buffer, " audio channels: %u\n",
208 buf.rx.number_audio); 209 buf.rx.number_audio);
209 snd_iprintf(buffer, " midi ports: %u\n", buf.rx.number_midi); 210 snd_iprintf(buffer, " midi ports: %u\n", buf.rx.number_midi);
210 snd_iprintf(buffer, " sequence start: %u\n", buf.rx.seq_start);
211 if (quadlets >= 68) { 211 if (quadlets >= 68) {
212 dice_proc_fixup_string(buf.rx.names, RX_NAMES_SIZE); 212 dice_proc_fixup_string(buf.rx.names, RX_NAMES_SIZE);
213 snd_iprintf(buffer, " names: %s\n", buf.rx.names); 213 snd_iprintf(buffer, " names: %s\n", buf.rx.names);
diff --git a/sound/firewire/iso-resources.c b/sound/firewire/iso-resources.c
index 5f17b77ee152..f0e4d502d604 100644
--- a/sound/firewire/iso-resources.c
+++ b/sound/firewire/iso-resources.c
@@ -26,7 +26,7 @@
26int fw_iso_resources_init(struct fw_iso_resources *r, struct fw_unit *unit) 26int fw_iso_resources_init(struct fw_iso_resources *r, struct fw_unit *unit)
27{ 27{
28 r->channels_mask = ~0uLL; 28 r->channels_mask = ~0uLL;
29 r->unit = fw_unit_get(unit); 29 r->unit = unit;
30 mutex_init(&r->mutex); 30 mutex_init(&r->mutex);
31 r->allocated = false; 31 r->allocated = false;
32 32
@@ -42,7 +42,6 @@ void fw_iso_resources_destroy(struct fw_iso_resources *r)
42{ 42{
43 WARN_ON(r->allocated); 43 WARN_ON(r->allocated);
44 mutex_destroy(&r->mutex); 44 mutex_destroy(&r->mutex);
45 fw_unit_put(r->unit);
46} 45}
47EXPORT_SYMBOL(fw_iso_resources_destroy); 46EXPORT_SYMBOL(fw_iso_resources_destroy);
48 47
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index a2ce773bdc62..17c2637d842c 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -1164,7 +1164,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus,
1164 } 1164 }
1165 } 1165 }
1166 1166
1167 if (!bus->no_response_fallback) 1167 if (bus->no_response_fallback)
1168 return -1; 1168 return -1;
1169 1169
1170 if (!chip->polling_mode && chip->poll_count < 2) { 1170 if (!chip->polling_mode && chip->poll_count < 2) {
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
index b680b4ec6331..fe18071bf93a 100644
--- a/sound/pci/hda/hda_generic.c
+++ b/sound/pci/hda/hda_generic.c
@@ -692,7 +692,23 @@ static void init_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx)
692{ 692{
693 unsigned int caps = query_amp_caps(codec, nid, dir); 693 unsigned int caps = query_amp_caps(codec, nid, dir);
694 int val = get_amp_val_to_activate(codec, nid, dir, caps, false); 694 int val = get_amp_val_to_activate(codec, nid, dir, caps, false);
695 snd_hda_codec_amp_init_stereo(codec, nid, dir, idx, 0xff, val); 695
696 if (get_wcaps(codec, nid) & AC_WCAP_STEREO)
697 snd_hda_codec_amp_init_stereo(codec, nid, dir, idx, 0xff, val);
698 else
699 snd_hda_codec_amp_init(codec, nid, 0, dir, idx, 0xff, val);
700}
701
702/* update the amp, doing in stereo or mono depending on NID */
703static int update_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx,
704 unsigned int mask, unsigned int val)
705{
706 if (get_wcaps(codec, nid) & AC_WCAP_STEREO)
707 return snd_hda_codec_amp_stereo(codec, nid, dir, idx,
708 mask, val);
709 else
710 return snd_hda_codec_amp_update(codec, nid, 0, dir, idx,
711 mask, val);
696} 712}
697 713
698/* calculate amp value mask we can modify; 714/* calculate amp value mask we can modify;
@@ -732,7 +748,7 @@ static void activate_amp(struct hda_codec *codec, hda_nid_t nid, int dir,
732 return; 748 return;
733 749
734 val &= mask; 750 val &= mask;
735 snd_hda_codec_amp_stereo(codec, nid, dir, idx, mask, val); 751 update_amp(codec, nid, dir, idx, mask, val);
736} 752}
737 753
738static void activate_amp_out(struct hda_codec *codec, struct nid_path *path, 754static void activate_amp_out(struct hda_codec *codec, struct nid_path *path,
@@ -4424,13 +4440,11 @@ static void mute_all_mixer_nid(struct hda_codec *codec, hda_nid_t mix)
4424 has_amp = nid_has_mute(codec, mix, HDA_INPUT); 4440 has_amp = nid_has_mute(codec, mix, HDA_INPUT);
4425 for (i = 0; i < nums; i++) { 4441 for (i = 0; i < nums; i++) {
4426 if (has_amp) 4442 if (has_amp)
4427 snd_hda_codec_amp_stereo(codec, mix, 4443 update_amp(codec, mix, HDA_INPUT, i,
4428 HDA_INPUT, i, 4444 0xff, HDA_AMP_MUTE);
4429 0xff, HDA_AMP_MUTE);
4430 else if (nid_has_volume(codec, conn[i], HDA_OUTPUT)) 4445 else if (nid_has_volume(codec, conn[i], HDA_OUTPUT))
4431 snd_hda_codec_amp_stereo(codec, conn[i], 4446 update_amp(codec, conn[i], HDA_OUTPUT, 0,
4432 HDA_OUTPUT, 0, 4447 0xff, HDA_AMP_MUTE);
4433 0xff, HDA_AMP_MUTE);
4434 } 4448 }
4435} 4449}
4436 4450
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index 1589c9bcce3e..dd2b3d92071f 100644
--- a/sound/pci/hda/patch_cirrus.c
+++ b/sound/pci/hda/patch_cirrus.c
@@ -393,6 +393,7 @@ static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
393 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81), 393 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
394 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122), 394 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
395 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101), 395 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
396 SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
396 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42), 397 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
397 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE), 398 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
398 {} /* terminator */ 399 {} /* terminator */
@@ -584,6 +585,7 @@ static int patch_cs420x(struct hda_codec *codec)
584 return -ENOMEM; 585 return -ENOMEM;
585 586
586 spec->gen.automute_hook = cs_automute; 587 spec->gen.automute_hook = cs_automute;
588 codec->single_adc_amp = 1;
587 589
588 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl, 590 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
589 cs420x_fixups); 591 cs420x_fixups);
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index fd3ed18670e9..da67ea8645a6 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -223,6 +223,7 @@ enum {
223 CXT_PINCFG_LENOVO_TP410, 223 CXT_PINCFG_LENOVO_TP410,
224 CXT_PINCFG_LEMOTE_A1004, 224 CXT_PINCFG_LEMOTE_A1004,
225 CXT_PINCFG_LEMOTE_A1205, 225 CXT_PINCFG_LEMOTE_A1205,
226 CXT_PINCFG_COMPAQ_CQ60,
226 CXT_FIXUP_STEREO_DMIC, 227 CXT_FIXUP_STEREO_DMIC,
227 CXT_FIXUP_INC_MIC_BOOST, 228 CXT_FIXUP_INC_MIC_BOOST,
228 CXT_FIXUP_HEADPHONE_MIC_PIN, 229 CXT_FIXUP_HEADPHONE_MIC_PIN,
@@ -660,6 +661,15 @@ static const struct hda_fixup cxt_fixups[] = {
660 .type = HDA_FIXUP_PINS, 661 .type = HDA_FIXUP_PINS,
661 .v.pins = cxt_pincfg_lemote, 662 .v.pins = cxt_pincfg_lemote,
662 }, 663 },
664 [CXT_PINCFG_COMPAQ_CQ60] = {
665 .type = HDA_FIXUP_PINS,
666 .v.pins = (const struct hda_pintbl[]) {
667 /* 0x17 was falsely set up as a mic, it should 0x1d */
668 { 0x17, 0x400001f0 },
669 { 0x1d, 0x97a70120 },
670 { }
671 }
672 },
663 [CXT_FIXUP_STEREO_DMIC] = { 673 [CXT_FIXUP_STEREO_DMIC] = {
664 .type = HDA_FIXUP_FUNC, 674 .type = HDA_FIXUP_FUNC,
665 .v.func = cxt_fixup_stereo_dmic, 675 .v.func = cxt_fixup_stereo_dmic,
@@ -769,6 +779,7 @@ static const struct hda_model_fixup cxt5047_fixup_models[] = {
769}; 779};
770 780
771static const struct snd_pci_quirk cxt5051_fixups[] = { 781static const struct snd_pci_quirk cxt5051_fixups[] = {
782 SND_PCI_QUIRK(0x103c, 0x360b, "Compaq CQ60", CXT_PINCFG_COMPAQ_CQ60),
772 SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200), 783 SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200),
773 {} 784 {}
774}; 785};
diff --git a/sound/ppc/pmac.c b/sound/ppc/pmac.c
index 13146d701413..0095a80a997f 100644
--- a/sound/ppc/pmac.c
+++ b/sound/ppc/pmac.c
@@ -240,7 +240,7 @@ static int snd_pmac_pcm_prepare(struct snd_pmac *chip, struct pmac_stream *rec,
240 */ 240 */
241 spin_lock_irq(&chip->reg_lock); 241 spin_lock_irq(&chip->reg_lock);
242 snd_pmac_dma_stop(rec); 242 snd_pmac_dma_stop(rec);
243 st_le16(&chip->extra_dma.cmds->command, DBDMA_STOP); 243 chip->extra_dma.cmds->command = cpu_to_le16(DBDMA_STOP);
244 snd_pmac_dma_set_command(rec, &chip->extra_dma); 244 snd_pmac_dma_set_command(rec, &chip->extra_dma);
245 snd_pmac_dma_run(rec, RUN); 245 snd_pmac_dma_run(rec, RUN);
246 spin_unlock_irq(&chip->reg_lock); 246 spin_unlock_irq(&chip->reg_lock);
@@ -251,15 +251,15 @@ static int snd_pmac_pcm_prepare(struct snd_pmac *chip, struct pmac_stream *rec,
251 */ 251 */
252 offset = runtime->dma_addr; 252 offset = runtime->dma_addr;
253 for (i = 0, cp = rec->cmd.cmds; i < rec->nperiods; i++, cp++) { 253 for (i = 0, cp = rec->cmd.cmds; i < rec->nperiods; i++, cp++) {
254 st_le32(&cp->phy_addr, offset); 254 cp->phy_addr = cpu_to_le32(offset);
255 st_le16(&cp->req_count, rec->period_size); 255 cp->req_count = cpu_to_le16(rec->period_size);
256 /*st_le16(&cp->res_count, 0);*/ 256 /*cp->res_count = cpu_to_le16(0);*/
257 st_le16(&cp->xfer_status, 0); 257 cp->xfer_status = cpu_to_le16(0);
258 offset += rec->period_size; 258 offset += rec->period_size;
259 } 259 }
260 /* make loop */ 260 /* make loop */
261 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS); 261 cp->command = cpu_to_le16(DBDMA_NOP + BR_ALWAYS);
262 st_le32(&cp->cmd_dep, rec->cmd.addr); 262 cp->cmd_dep = cpu_to_le32(rec->cmd.addr);
263 263
264 snd_pmac_dma_stop(rec); 264 snd_pmac_dma_stop(rec);
265 snd_pmac_dma_set_command(rec, &rec->cmd); 265 snd_pmac_dma_set_command(rec, &rec->cmd);
@@ -328,7 +328,7 @@ static snd_pcm_uframes_t snd_pmac_pcm_pointer(struct snd_pmac *chip,
328#if 1 /* hmm.. how can we get the current dma pointer?? */ 328#if 1 /* hmm.. how can we get the current dma pointer?? */
329 int stat; 329 int stat;
330 volatile struct dbdma_cmd __iomem *cp = &rec->cmd.cmds[rec->cur_period]; 330 volatile struct dbdma_cmd __iomem *cp = &rec->cmd.cmds[rec->cur_period];
331 stat = ld_le16(&cp->xfer_status); 331 stat = le16_to_cpu(cp->xfer_status);
332 if (stat & (ACTIVE|DEAD)) { 332 if (stat & (ACTIVE|DEAD)) {
333 count = in_le16(&cp->res_count); 333 count = in_le16(&cp->res_count);
334 if (count) 334 if (count)
@@ -427,26 +427,26 @@ static inline void snd_pmac_pcm_dead_xfer(struct pmac_stream *rec,
427 memcpy((void *)emergency_dbdma.cmds, (void *)cp, 427 memcpy((void *)emergency_dbdma.cmds, (void *)cp,
428 sizeof(struct dbdma_cmd)); 428 sizeof(struct dbdma_cmd));
429 emergency_in_use = 1; 429 emergency_in_use = 1;
430 st_le16(&cp->xfer_status, 0); 430 cp->xfer_status = cpu_to_le16(0);
431 st_le16(&cp->req_count, rec->period_size); 431 cp->req_count = cpu_to_le16(rec->period_size);
432 cp = emergency_dbdma.cmds; 432 cp = emergency_dbdma.cmds;
433 } 433 }
434 434
435 /* now bump the values to reflect the amount 435 /* now bump the values to reflect the amount
436 we haven't yet shifted */ 436 we haven't yet shifted */
437 req = ld_le16(&cp->req_count); 437 req = le16_to_cpu(cp->req_count);
438 res = ld_le16(&cp->res_count); 438 res = le16_to_cpu(cp->res_count);
439 phy = ld_le32(&cp->phy_addr); 439 phy = le32_to_cpu(cp->phy_addr);
440 phy += (req - res); 440 phy += (req - res);
441 st_le16(&cp->req_count, res); 441 cp->req_count = cpu_to_le16(res);
442 st_le16(&cp->res_count, 0); 442 cp->res_count = cpu_to_le16(0);
443 st_le16(&cp->xfer_status, 0); 443 cp->xfer_status = cpu_to_le16(0);
444 st_le32(&cp->phy_addr, phy); 444 cp->phy_addr = cpu_to_le32(phy);
445 445
446 st_le32(&cp->cmd_dep, rec->cmd.addr 446 cp->cmd_dep = cpu_to_le32(rec->cmd.addr
447 + sizeof(struct dbdma_cmd)*((rec->cur_period+1)%rec->nperiods)); 447 + sizeof(struct dbdma_cmd)*((rec->cur_period+1)%rec->nperiods));
448 448
449 st_le16(&cp->command, OUTPUT_MORE | BR_ALWAYS | INTR_ALWAYS); 449 cp->command = cpu_to_le16(OUTPUT_MORE | BR_ALWAYS | INTR_ALWAYS);
450 450
451 /* point at our patched up command block */ 451 /* point at our patched up command block */
452 out_le32(&rec->dma->cmdptr, emergency_dbdma.addr); 452 out_le32(&rec->dma->cmdptr, emergency_dbdma.addr);
@@ -475,7 +475,7 @@ static void snd_pmac_pcm_update(struct snd_pmac *chip, struct pmac_stream *rec)
475 else 475 else
476 cp = &rec->cmd.cmds[rec->cur_period]; 476 cp = &rec->cmd.cmds[rec->cur_period];
477 477
478 stat = ld_le16(&cp->xfer_status); 478 stat = le16_to_cpu(cp->xfer_status);
479 479
480 if (stat & DEAD) { 480 if (stat & DEAD) {
481 snd_pmac_pcm_dead_xfer(rec, cp); 481 snd_pmac_pcm_dead_xfer(rec, cp);
@@ -489,9 +489,9 @@ static void snd_pmac_pcm_update(struct snd_pmac *chip, struct pmac_stream *rec)
489 break; 489 break;
490 490
491 /*printk(KERN_DEBUG "update frag %d\n", rec->cur_period);*/ 491 /*printk(KERN_DEBUG "update frag %d\n", rec->cur_period);*/
492 st_le16(&cp->xfer_status, 0); 492 cp->xfer_status = cpu_to_le16(0);
493 st_le16(&cp->req_count, rec->period_size); 493 cp->req_count = cpu_to_le16(rec->period_size);
494 /*st_le16(&cp->res_count, 0);*/ 494 /*cp->res_count = cpu_to_le16(0);*/
495 rec->cur_period++; 495 rec->cur_period++;
496 if (rec->cur_period >= rec->nperiods) { 496 if (rec->cur_period >= rec->nperiods) {
497 rec->cur_period = 0; 497 rec->cur_period = 0;
@@ -760,11 +760,11 @@ void snd_pmac_beep_dma_start(struct snd_pmac *chip, int bytes, unsigned long add
760 struct pmac_stream *rec = &chip->playback; 760 struct pmac_stream *rec = &chip->playback;
761 761
762 snd_pmac_dma_stop(rec); 762 snd_pmac_dma_stop(rec);
763 st_le16(&chip->extra_dma.cmds->req_count, bytes); 763 chip->extra_dma.cmds->req_count = cpu_to_le16(bytes);
764 st_le16(&chip->extra_dma.cmds->xfer_status, 0); 764 chip->extra_dma.cmds->xfer_status = cpu_to_le16(0);
765 st_le32(&chip->extra_dma.cmds->cmd_dep, chip->extra_dma.addr); 765 chip->extra_dma.cmds->cmd_dep = cpu_to_le32(chip->extra_dma.addr);
766 st_le32(&chip->extra_dma.cmds->phy_addr, addr); 766 chip->extra_dma.cmds->phy_addr = cpu_to_le32(addr);
767 st_le16(&chip->extra_dma.cmds->command, OUTPUT_MORE + BR_ALWAYS); 767 chip->extra_dma.cmds->command = cpu_to_le16(OUTPUT_MORE + BR_ALWAYS);
768 out_le32(&chip->awacs->control, 768 out_le32(&chip->awacs->control,
769 (in_le32(&chip->awacs->control) & ~0x1f00) 769 (in_le32(&chip->awacs->control) & ~0x1f00)
770 | (speed << 8)); 770 | (speed << 8));
@@ -776,7 +776,7 @@ void snd_pmac_beep_dma_start(struct snd_pmac *chip, int bytes, unsigned long add
776void snd_pmac_beep_dma_stop(struct snd_pmac *chip) 776void snd_pmac_beep_dma_stop(struct snd_pmac *chip)
777{ 777{
778 snd_pmac_dma_stop(&chip->playback); 778 snd_pmac_dma_stop(&chip->playback);
779 st_le16(&chip->extra_dma.cmds->command, DBDMA_STOP); 779 chip->extra_dma.cmds->command = cpu_to_le16(DBDMA_STOP);
780 snd_pmac_pcm_set_format(chip); /* reset format */ 780 snd_pmac_pcm_set_format(chip); /* reset format */
781} 781}
782 782
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 75870c0ea2c9..91eb3aef7f02 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -1049,7 +1049,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
1049 enum spdif_txrate index, bool round) 1049 enum spdif_txrate index, bool round)
1050{ 1050{
1051 const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 }; 1051 const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
1052 bool is_sysclk = clk == spdif_priv->sysclk; 1052 bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk);
1053 u64 rate_ideal, rate_actual, sub; 1053 u64 rate_ideal, rate_actual, sub;
1054 u32 sysclk_dfmin, sysclk_dfmax; 1054 u32 sysclk_dfmin, sysclk_dfmax;
1055 u32 txclk_df, sysclk_df, arate; 1055 u32 txclk_df, sysclk_df, arate;
@@ -1143,7 +1143,7 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
1143 spdif_priv->txclk_src[index], rate[index]); 1143 spdif_priv->txclk_src[index], rate[index]);
1144 dev_dbg(&pdev->dev, "use txclk df %d for %dHz sample rate\n", 1144 dev_dbg(&pdev->dev, "use txclk df %d for %dHz sample rate\n",
1145 spdif_priv->txclk_df[index], rate[index]); 1145 spdif_priv->txclk_df[index], rate[index]);
1146 if (spdif_priv->txclk[index] == spdif_priv->sysclk) 1146 if (clk_is_match(spdif_priv->txclk[index], spdif_priv->sysclk))
1147 dev_dbg(&pdev->dev, "use sysclk df %d for %dHz sample rate\n", 1147 dev_dbg(&pdev->dev, "use sysclk df %d for %dHz sample rate\n",
1148 spdif_priv->sysclk_df[index], rate[index]); 1148 spdif_priv->sysclk_df[index], rate[index]);
1149 dev_dbg(&pdev->dev, "the best rate for %dHz sample rate is %dHz\n", 1149 dev_dbg(&pdev->dev, "the best rate for %dHz sample rate is %dHz\n",
diff --git a/sound/soc/kirkwood/kirkwood-i2s.c b/sound/soc/kirkwood/kirkwood-i2s.c
index def7d8260c4e..d19483081f9b 100644
--- a/sound/soc/kirkwood/kirkwood-i2s.c
+++ b/sound/soc/kirkwood/kirkwood-i2s.c
@@ -579,7 +579,7 @@ static int kirkwood_i2s_dev_probe(struct platform_device *pdev)
579 if (PTR_ERR(priv->extclk) == -EPROBE_DEFER) 579 if (PTR_ERR(priv->extclk) == -EPROBE_DEFER)
580 return -EPROBE_DEFER; 580 return -EPROBE_DEFER;
581 } else { 581 } else {
582 if (priv->extclk == priv->clk) { 582 if (clk_is_match(priv->extclk, priv->clk)) {
583 devm_clk_put(&pdev->dev, priv->extclk); 583 devm_clk_put(&pdev->dev, priv->extclk);
584 priv->extclk = ERR_PTR(-EINVAL); 584 priv->extclk = ERR_PTR(-EINVAL);
585 } else { 585 } else {
diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h
index 67d476548dcf..07f984d5f516 100644
--- a/sound/usb/quirks-table.h
+++ b/sound/usb/quirks-table.h
@@ -1773,6 +1773,36 @@ YAMAHA_DEVICE(0x7010, "UB99"),
1773 } 1773 }
1774 } 1774 }
1775}, 1775},
1776{
1777 USB_DEVICE(0x0582, 0x0159),
1778 .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) {
1779 /* .vendor_name = "Roland", */
1780 /* .product_name = "UA-22", */
1781 .ifnum = QUIRK_ANY_INTERFACE,
1782 .type = QUIRK_COMPOSITE,
1783 .data = (const struct snd_usb_audio_quirk[]) {
1784 {
1785 .ifnum = 0,
1786 .type = QUIRK_AUDIO_STANDARD_INTERFACE
1787 },
1788 {
1789 .ifnum = 1,
1790 .type = QUIRK_AUDIO_STANDARD_INTERFACE
1791 },
1792 {
1793 .ifnum = 2,
1794 .type = QUIRK_MIDI_FIXED_ENDPOINT,
1795 .data = & (const struct snd_usb_midi_endpoint_info) {
1796 .out_cables = 0x0001,
1797 .in_cables = 0x0001
1798 }
1799 },
1800 {
1801 .ifnum = -1
1802 }
1803 }
1804 }
1805},
1776/* this catches most recent vendor-specific Roland devices */ 1806/* this catches most recent vendor-specific Roland devices */
1777{ 1807{
1778 .match_flags = USB_DEVICE_ID_MATCH_VENDOR | 1808 .match_flags = USB_DEVICE_ID_MATCH_VENDOR |
diff --git a/tools/power/cpupower/Makefile b/tools/power/cpupower/Makefile
index 3ed7c0476d48..2e2ba2efa0d9 100644
--- a/tools/power/cpupower/Makefile
+++ b/tools/power/cpupower/Makefile
@@ -209,7 +209,7 @@ $(OUTPUT)%.o: %.c
209 209
210$(OUTPUT)cpupower: $(UTIL_OBJS) $(OUTPUT)libcpupower.so.$(LIB_MAJ) 210$(OUTPUT)cpupower: $(UTIL_OBJS) $(OUTPUT)libcpupower.so.$(LIB_MAJ)
211 $(ECHO) " CC " $@ 211 $(ECHO) " CC " $@
212 $(QUIET) $(CC) $(CFLAGS) $(LDFLAGS) $(UTIL_OBJS) -lcpupower -Wl,-rpath=./ -lrt -lpci -L$(OUTPUT) -o $@ 212 $(QUIET) $(CC) $(CFLAGS) $(LDFLAGS) $(UTIL_OBJS) -lcpupower -lrt -lpci -L$(OUTPUT) -o $@
213 $(QUIET) $(STRIPCMD) $@ 213 $(QUIET) $(STRIPCMD) $@
214 214
215$(OUTPUT)po/$(PACKAGE).pot: $(UTIL_SRC) 215$(OUTPUT)po/$(PACKAGE).pot: $(UTIL_SRC)
diff --git a/tools/testing/selftests/exec/execveat.c b/tools/testing/selftests/exec/execveat.c
index e238c9559caf..8d5d1d2ee7c1 100644
--- a/tools/testing/selftests/exec/execveat.c
+++ b/tools/testing/selftests/exec/execveat.c
@@ -30,7 +30,7 @@ static int execveat_(int fd, const char *path, char **argv, char **envp,
30#ifdef __NR_execveat 30#ifdef __NR_execveat
31 return syscall(__NR_execveat, fd, path, argv, envp, flags); 31 return syscall(__NR_execveat, fd, path, argv, envp, flags);
32#else 32#else
33 errno = -ENOSYS; 33 errno = ENOSYS;
34 return -1; 34 return -1;
35#endif 35#endif
36} 36}
@@ -234,6 +234,14 @@ static int run_tests(void)
234 int fd_cloexec = open_or_die("execveat", O_RDONLY|O_CLOEXEC); 234 int fd_cloexec = open_or_die("execveat", O_RDONLY|O_CLOEXEC);
235 int fd_script_cloexec = open_or_die("script", O_RDONLY|O_CLOEXEC); 235 int fd_script_cloexec = open_or_die("script", O_RDONLY|O_CLOEXEC);
236 236
237 /* Check if we have execveat at all, and bail early if not */
238 errno = 0;
239 execveat_(-1, NULL, NULL, NULL, 0);
240 if (errno == ENOSYS) {
241 printf("[FAIL] ENOSYS calling execveat - no kernel support?\n");
242 return 1;
243 }
244
237 /* Change file position to confirm it doesn't affect anything */ 245 /* Change file position to confirm it doesn't affect anything */
238 lseek(fd, 10, SEEK_SET); 246 lseek(fd, 10, SEEK_SET);
239 247
diff --git a/tools/testing/selftests/powerpc/Makefile b/tools/testing/selftests/powerpc/Makefile
index 1d5e7ad2c460..a5d5be7ec4c7 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -13,22 +13,22 @@ CFLAGS := -Wall -O2 -flto -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CUR
13 13
14export CC CFLAGS 14export CC CFLAGS
15 15
16TARGETS = pmu copyloops mm tm primitives stringloops 16SUB_DIRS = pmu copyloops mm tm primitives stringloops vphn switch_endian
17 17
18endif 18endif
19 19
20all: $(TARGETS) 20all: $(SUB_DIRS)
21 21
22$(TARGETS): 22$(SUB_DIRS):
23 $(MAKE) -k -C $@ all 23 $(MAKE) -k -C $@ all
24 24
25run_tests: all 25run_tests: all
26 @for TARGET in $(TARGETS); do \ 26 @for TARGET in $(SUB_DIRS); do \
27 $(MAKE) -C $$TARGET run_tests; \ 27 $(MAKE) -C $$TARGET run_tests; \
28 done; 28 done;
29 29
30clean: 30clean:
31 @for TARGET in $(TARGETS); do \ 31 @for TARGET in $(SUB_DIRS); do \
32 $(MAKE) -C $$TARGET clean; \ 32 $(MAKE) -C $$TARGET clean; \
33 done; 33 done;
34 rm -f tags 34 rm -f tags
@@ -36,4 +36,4 @@ clean:
36tags: 36tags:
37 find . -name '*.c' -o -name '*.h' | xargs ctags 37 find . -name '*.c' -o -name '*.h' | xargs ctags
38 38
39.PHONY: all run_tests clean tags $(TARGETS) 39.PHONY: all run_tests clean tags $(SUB_DIRS)
diff --git a/tools/testing/selftests/powerpc/copyloops/Makefile b/tools/testing/selftests/powerpc/copyloops/Makefile
index 6f2d3be227f9..9de81296ebc4 100644
--- a/tools/testing/selftests/powerpc/copyloops/Makefile
+++ b/tools/testing/selftests/powerpc/copyloops/Makefile
@@ -2,6 +2,7 @@
2CFLAGS += -m64 2CFLAGS += -m64
3CFLAGS += -I$(CURDIR) 3CFLAGS += -I$(CURDIR)
4CFLAGS += -D SELFTEST 4CFLAGS += -D SELFTEST
5CFLAGS += -maltivec
5 6
6# Use our CFLAGS for the implicit .S rule 7# Use our CFLAGS for the implicit .S rule
7ASFLAGS = $(CFLAGS) 8ASFLAGS = $(CFLAGS)
diff --git a/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h b/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h
index d1dc37425510..50ae7d2091ce 100644
--- a/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h
+++ b/tools/testing/selftests/powerpc/copyloops/asm/ppc_asm.h
@@ -4,39 +4,6 @@
4 4
5#define r1 1 5#define r1 1
6 6
7#define vr0 0
8#define vr1 1
9#define vr2 2
10#define vr3 3
11#define vr4 4
12#define vr5 5
13#define vr6 6
14#define vr7 7
15#define vr8 8
16#define vr9 9
17#define vr10 10
18#define vr11 11
19#define vr12 12
20#define vr13 13
21#define vr14 14
22#define vr15 15
23#define vr16 16
24#define vr17 17
25#define vr18 18
26#define vr19 19
27#define vr20 20
28#define vr21 21
29#define vr22 22
30#define vr23 23
31#define vr24 24
32#define vr25 25
33#define vr26 26
34#define vr27 27
35#define vr28 28
36#define vr29 29
37#define vr30 30
38#define vr31 31
39
40#define R14 r14 7#define R14 r14
41#define R15 r15 8#define R15 r15
42#define R16 r16 9#define R16 r16
diff --git a/tools/testing/selftests/powerpc/harness.c b/tools/testing/selftests/powerpc/harness.c
index 8ebc58a09311..f7997affd143 100644
--- a/tools/testing/selftests/powerpc/harness.c
+++ b/tools/testing/selftests/powerpc/harness.c
@@ -11,6 +11,10 @@
11#include <sys/types.h> 11#include <sys/types.h>
12#include <sys/wait.h> 12#include <sys/wait.h>
13#include <unistd.h> 13#include <unistd.h>
14#include <elf.h>
15#include <fcntl.h>
16#include <link.h>
17#include <sys/stat.h>
14 18
15#include "subunit.h" 19#include "subunit.h"
16#include "utils.h" 20#include "utils.h"
@@ -112,3 +116,46 @@ int test_harness(int (test_function)(void), char *name)
112 116
113 return rc; 117 return rc;
114} 118}
119
120static char auxv[4096];
121
122void *get_auxv_entry(int type)
123{
124 ElfW(auxv_t) *p;
125 void *result;
126 ssize_t num;
127 int fd;
128
129 fd = open("/proc/self/auxv", O_RDONLY);
130 if (fd == -1) {
131 perror("open");
132 return NULL;
133 }
134
135 result = NULL;
136
137 num = read(fd, auxv, sizeof(auxv));
138 if (num < 0) {
139 perror("read");
140 goto out;
141 }
142
143 if (num > sizeof(auxv)) {
144 printf("Overflowed auxv buffer\n");
145 goto out;
146 }
147
148 p = (ElfW(auxv_t) *)auxv;
149
150 while (p->a_type != AT_NULL) {
151 if (p->a_type == type) {
152 result = (void *)p->a_un.a_val;
153 break;
154 }
155
156 p++;
157 }
158out:
159 close(fd);
160 return result;
161}
diff --git a/tools/testing/selftests/powerpc/pmu/lib.c b/tools/testing/selftests/powerpc/pmu/lib.c
index 9768dea37bf3..a07104c2afe6 100644
--- a/tools/testing/selftests/powerpc/pmu/lib.c
+++ b/tools/testing/selftests/powerpc/pmu/lib.c
@@ -5,15 +5,10 @@
5 5
6#define _GNU_SOURCE /* For CPU_ZERO etc. */ 6#define _GNU_SOURCE /* For CPU_ZERO etc. */
7 7
8#include <elf.h>
9#include <errno.h> 8#include <errno.h>
10#include <fcntl.h>
11#include <link.h>
12#include <sched.h> 9#include <sched.h>
13#include <setjmp.h> 10#include <setjmp.h>
14#include <stdlib.h> 11#include <stdlib.h>
15#include <sys/stat.h>
16#include <sys/types.h>
17#include <sys/wait.h> 12#include <sys/wait.h>
18 13
19#include "utils.h" 14#include "utils.h"
@@ -256,45 +251,3 @@ out:
256 return rc; 251 return rc;
257} 252}
258 253
259static char auxv[4096];
260
261void *get_auxv_entry(int type)
262{
263 ElfW(auxv_t) *p;
264 void *result;
265 ssize_t num;
266 int fd;
267
268 fd = open("/proc/self/auxv", O_RDONLY);
269 if (fd == -1) {
270 perror("open");
271 return NULL;
272 }
273
274 result = NULL;
275
276 num = read(fd, auxv, sizeof(auxv));
277 if (num < 0) {
278 perror("read");
279 goto out;
280 }
281
282 if (num > sizeof(auxv)) {
283 printf("Overflowed auxv buffer\n");
284 goto out;
285 }
286
287 p = (ElfW(auxv_t) *)auxv;
288
289 while (p->a_type != AT_NULL) {
290 if (p->a_type == type) {
291 result = (void *)p->a_un.a_val;
292 break;
293 }
294
295 p++;
296 }
297out:
298 close(fd);
299 return result;
300}
diff --git a/tools/testing/selftests/powerpc/pmu/lib.h b/tools/testing/selftests/powerpc/pmu/lib.h
index 0f0339c8a6f6..ca5d72ae3be6 100644
--- a/tools/testing/selftests/powerpc/pmu/lib.h
+++ b/tools/testing/selftests/powerpc/pmu/lib.h
@@ -29,7 +29,6 @@ extern int notify_parent(union pipe write_pipe);
29extern int notify_parent_of_error(union pipe write_pipe); 29extern int notify_parent_of_error(union pipe write_pipe);
30extern pid_t eat_cpu(int (test_function)(void)); 30extern pid_t eat_cpu(int (test_function)(void));
31extern bool require_paranoia_below(int level); 31extern bool require_paranoia_below(int level);
32extern void *get_auxv_entry(int type);
33 32
34struct addr_range { 33struct addr_range {
35 uint64_t first, last; 34 uint64_t first, last;
diff --git a/tools/testing/selftests/powerpc/switch_endian/.gitignore b/tools/testing/selftests/powerpc/switch_endian/.gitignore
new file mode 100644
index 000000000000..89e762eab676
--- /dev/null
+++ b/tools/testing/selftests/powerpc/switch_endian/.gitignore
@@ -0,0 +1,2 @@
1switch_endian_test
2check-reversed.S
diff --git a/tools/testing/selftests/powerpc/switch_endian/Makefile b/tools/testing/selftests/powerpc/switch_endian/Makefile
new file mode 100644
index 000000000000..081473db22b7
--- /dev/null
+++ b/tools/testing/selftests/powerpc/switch_endian/Makefile
@@ -0,0 +1,24 @@
1CC := $(CROSS_COMPILE)gcc
2PROGS := switch_endian_test
3
4ASFLAGS += -O2 -Wall -g -nostdlib -m64
5
6all: $(PROGS)
7
8switch_endian_test: check-reversed.S
9
10check-reversed.o: check.o
11 $(CROSS_COMPILE)objcopy -j .text --reverse-bytes=4 -O binary $< $@
12
13check-reversed.S: check-reversed.o
14 hexdump -v -e '/1 ".byte 0x%02X\n"' $< > $@
15
16run_tests: all
17 @-for PROG in $(PROGS); do \
18 ./$$PROG; \
19 done;
20
21clean:
22 rm -f $(PROGS) *.o check-reversed.S
23
24.PHONY: all run_tests clean
diff --git a/tools/testing/selftests/powerpc/switch_endian/check.S b/tools/testing/selftests/powerpc/switch_endian/check.S
new file mode 100644
index 000000000000..e2484d2c24f4
--- /dev/null
+++ b/tools/testing/selftests/powerpc/switch_endian/check.S
@@ -0,0 +1,100 @@
1#include "common.h"
2
3/*
4 * Checks that registers contain what we expect, ie. they were not clobbered by
5 * the syscall.
6 *
7 * r15: pattern to check registers against.
8 *
9 * At the end r3 == 0 if everything's OK.
10 */
11 nop # guaranteed to be illegal in reverse-endian
12 mr r9,r15
13 cmpd r9,r3 # check r3
14 bne 1f
15 addi r9,r15,4 # check r4
16 cmpd r9,r4
17 bne 1f
18 lis r9,0x00FF # check CR
19 ori r9,r9,0xF000
20 mfcr r10
21 and r10,r10,r9
22 cmpw r9,r10
23 addi r9,r15,34
24 bne 1f
25 addi r9,r15,32 # check LR
26 mflr r10
27 cmpd r9,r10
28 bne 1f
29 addi r9,r15,5 # check r5
30 cmpd r9,r5
31 bne 1f
32 addi r9,r15,6 # check r6
33 cmpd r9,r6
34 bne 1f
35 addi r9,r15,7 # check r7
36 cmpd r9,r7
37 bne 1f
38 addi r9,r15,8 # check r8
39 cmpd r9,r8
40 bne 1f
41 addi r9,r15,13 # check r13
42 cmpd r9,r13
43 bne 1f
44 addi r9,r15,14 # check r14
45 cmpd r9,r14
46 bne 1f
47 addi r9,r15,16 # check r16
48 cmpd r9,r16
49 bne 1f
50 addi r9,r15,17 # check r17
51 cmpd r9,r17
52 bne 1f
53 addi r9,r15,18 # check r18
54 cmpd r9,r18
55 bne 1f
56 addi r9,r15,19 # check r19
57 cmpd r9,r19
58 bne 1f
59 addi r9,r15,20 # check r20
60 cmpd r9,r20
61 bne 1f
62 addi r9,r15,21 # check r21
63 cmpd r9,r21
64 bne 1f
65 addi r9,r15,22 # check r22
66 cmpd r9,r22
67 bne 1f
68 addi r9,r15,23 # check r23
69 cmpd r9,r23
70 bne 1f
71 addi r9,r15,24 # check r24
72 cmpd r9,r24
73 bne 1f
74 addi r9,r15,25 # check r25
75 cmpd r9,r25
76 bne 1f
77 addi r9,r15,26 # check r26
78 cmpd r9,r26
79 bne 1f
80 addi r9,r15,27 # check r27
81 cmpd r9,r27
82 bne 1f
83 addi r9,r15,28 # check r28
84 cmpd r9,r28
85 bne 1f
86 addi r9,r15,29 # check r29
87 cmpd r9,r29
88 bne 1f
89 addi r9,r15,30 # check r30
90 cmpd r9,r30
91 bne 1f
92 addi r9,r15,31 # check r31
93 cmpd r9,r31
94 bne 1f
95 b 2f
961: mr r3, r9
97 li r0, __NR_exit
98 sc
992: li r0, __NR_switch_endian
100 nop
diff --git a/tools/testing/selftests/powerpc/switch_endian/common.h b/tools/testing/selftests/powerpc/switch_endian/common.h
new file mode 100644
index 000000000000..69e399698c64
--- /dev/null
+++ b/tools/testing/selftests/powerpc/switch_endian/common.h
@@ -0,0 +1,6 @@
1#include <ppc-asm.h>
2#include <asm/unistd.h>
3
4#ifndef __NR_switch_endian
5#define __NR_switch_endian 363
6#endif
diff --git a/tools/testing/selftests/powerpc/switch_endian/switch_endian_test.S b/tools/testing/selftests/powerpc/switch_endian/switch_endian_test.S
new file mode 100644
index 000000000000..ef7c971abb67
--- /dev/null
+++ b/tools/testing/selftests/powerpc/switch_endian/switch_endian_test.S
@@ -0,0 +1,81 @@
1#include "common.h"
2
3 .data
4 .balign 8
5message:
6 .ascii "success: switch_endian_test\n\0"
7
8 .section ".toc"
9 .balign 8
10pattern:
11 .llong 0x5555AAAA5555AAAA
12
13 .text
14FUNC_START(_start)
15 /* Load the pattern */
16 ld r15, pattern@TOC(%r2)
17
18 /* Setup CR, only CR2-CR4 are maintained */
19 lis r3, 0x00FF
20 ori r3, r3, 0xF000
21 mtcr r3
22
23 /* Load the pattern slightly modified into the registers */
24 mr r3, r15
25 addi r4, r15, 4
26
27 addi r5, r15, 32
28 mtlr r5
29
30 addi r5, r15, 5
31 addi r6, r15, 6
32 addi r7, r15, 7
33 addi r8, r15, 8
34
35 /* r9 - r12 are clobbered */
36
37 addi r13, r15, 13
38 addi r14, r15, 14
39
40 /* Skip r15 we're using it */
41
42 addi r16, r15, 16
43 addi r17, r15, 17
44 addi r18, r15, 18
45 addi r19, r15, 19
46 addi r20, r15, 20
47 addi r21, r15, 21
48 addi r22, r15, 22
49 addi r23, r15, 23
50 addi r24, r15, 24
51 addi r25, r15, 25
52 addi r26, r15, 26
53 addi r27, r15, 27
54 addi r28, r15, 28
55 addi r29, r15, 29
56 addi r30, r15, 30
57 addi r31, r15, 31
58
59 /*
60 * Call the syscall to switch endian.
61 * It clobbers r9-r12, XER, CTR and CR0-1,5-7.
62 */
63 li r0, __NR_switch_endian
64 sc
65
66#include "check-reversed.S"
67
68 /* Flip back, r0 already has the switch syscall number */
69 .long 0x02000044 /* sc */
70
71#include "check.S"
72
73 li r0, __NR_write
74 li r3, 1 /* stdout */
75 ld r4, message@got(%r2)
76 li r5, 28 /* strlen(message3) */
77 sc
78 li r0, __NR_exit
79 li r3, 0
80 sc
81 b .
diff --git a/tools/testing/selftests/powerpc/tm/.gitignore b/tools/testing/selftests/powerpc/tm/.gitignore
index 33d02cc54a3e..2699635d2cd9 100644
--- a/tools/testing/selftests/powerpc/tm/.gitignore
+++ b/tools/testing/selftests/powerpc/tm/.gitignore
@@ -1 +1,2 @@
1tm-resched-dscr 1tm-resched-dscr
2tm-syscall
diff --git a/tools/testing/selftests/powerpc/tm/Makefile b/tools/testing/selftests/powerpc/tm/Makefile
index 2cede239a074..122cf1830de8 100644
--- a/tools/testing/selftests/powerpc/tm/Makefile
+++ b/tools/testing/selftests/powerpc/tm/Makefile
@@ -1,9 +1,12 @@
1PROGS := tm-resched-dscr 1PROGS := tm-resched-dscr tm-syscall
2 2
3all: $(PROGS) 3all: $(PROGS)
4 4
5$(PROGS): ../harness.c 5$(PROGS): ../harness.c
6 6
7tm-syscall: tm-syscall-asm.S
8tm-syscall: CFLAGS += -mhtm
9
7run_tests: all 10run_tests: all
8 @-for PROG in $(PROGS); do \ 11 @-for PROG in $(PROGS); do \
9 ./$$PROG; \ 12 ./$$PROG; \
diff --git a/tools/testing/selftests/powerpc/tm/tm-syscall-asm.S b/tools/testing/selftests/powerpc/tm/tm-syscall-asm.S
new file mode 100644
index 000000000000..431f61ae2368
--- /dev/null
+++ b/tools/testing/selftests/powerpc/tm/tm-syscall-asm.S
@@ -0,0 +1,27 @@
1#include <ppc-asm.h>
2#include <asm/unistd.h>
3
4 .text
5FUNC_START(getppid_tm_active)
6 tbegin.
7 beq 1f
8 li r0, __NR_getppid
9 sc
10 tend.
11 blr
121:
13 li r3, -1
14 blr
15
16FUNC_START(getppid_tm_suspended)
17 tbegin.
18 beq 1f
19 li r0, __NR_getppid
20 tsuspend.
21 sc
22 tresume.
23 tend.
24 blr
251:
26 li r3, -1
27 blr
diff --git a/tools/testing/selftests/powerpc/tm/tm-syscall.c b/tools/testing/selftests/powerpc/tm/tm-syscall.c
new file mode 100644
index 000000000000..3ed8d4b252fa
--- /dev/null
+++ b/tools/testing/selftests/powerpc/tm/tm-syscall.c
@@ -0,0 +1,121 @@
1/*
2 * Copyright 2015, Sam Bobroff, IBM Corp.
3 * Licensed under GPLv2.
4 *
5 * Test the kernel's system call code to ensure that a system call
6 * made from within an active HTM transaction is aborted with the
7 * correct failure code.
8 * Conversely, ensure that a system call made from within a
9 * suspended transaction can succeed.
10 */
11
12#include <stdio.h>
13#include <unistd.h>
14#include <sys/syscall.h>
15#include <asm/tm.h>
16#include <asm/cputable.h>
17#include <linux/auxvec.h>
18#include <sys/time.h>
19#include <stdlib.h>
20
21#include "utils.h"
22
23extern int getppid_tm_active(void);
24extern int getppid_tm_suspended(void);
25
26unsigned retries = 0;
27
28#define TEST_DURATION 10 /* seconds */
29#define TM_RETRIES 100
30
31long failure_code(void)
32{
33 return __builtin_get_texasru() >> 24;
34}
35
36bool failure_is_persistent(void)
37{
38 return (failure_code() & TM_CAUSE_PERSISTENT) == TM_CAUSE_PERSISTENT;
39}
40
41bool failure_is_syscall(void)
42{
43 return (failure_code() & TM_CAUSE_SYSCALL) == TM_CAUSE_SYSCALL;
44}
45
46pid_t getppid_tm(bool suspend)
47{
48 int i;
49 pid_t pid;
50
51 for (i = 0; i < TM_RETRIES; i++) {
52 if (suspend)
53 pid = getppid_tm_suspended();
54 else
55 pid = getppid_tm_active();
56
57 if (pid >= 0)
58 return pid;
59
60 if (failure_is_persistent()) {
61 if (failure_is_syscall())
62 return -1;
63
64 printf("Unexpected persistent transaction failure.\n");
65 printf("TEXASR 0x%016lx, TFIAR 0x%016lx.\n",
66 __builtin_get_texasr(), __builtin_get_tfiar());
67 exit(-1);
68 }
69
70 retries++;
71 }
72
73 printf("Exceeded limit of %d temporary transaction failures.\n", TM_RETRIES);
74 printf("TEXASR 0x%016lx, TFIAR 0x%016lx.\n",
75 __builtin_get_texasr(), __builtin_get_tfiar());
76
77 exit(-1);
78}
79
80int tm_syscall(void)
81{
82 unsigned count = 0;
83 struct timeval end, now;
84
85 SKIP_IF(!((long)get_auxv_entry(AT_HWCAP2) & PPC_FEATURE2_HTM));
86 setbuf(stdout, NULL);
87
88 printf("Testing transactional syscalls for %d seconds...\n", TEST_DURATION);
89
90 gettimeofday(&end, NULL);
91 now.tv_sec = TEST_DURATION;
92 now.tv_usec = 0;
93 timeradd(&end, &now, &end);
94
95 for (count = 0; timercmp(&now, &end, <); count++) {
96 /*
97 * Test a syscall within a suspended transaction and verify
98 * that it succeeds.
99 */
100 FAIL_IF(getppid_tm(true) == -1); /* Should succeed. */
101
102 /*
103 * Test a syscall within an active transaction and verify that
104 * it fails with the correct failure code.
105 */
106 FAIL_IF(getppid_tm(false) != -1); /* Should fail... */
107 FAIL_IF(!failure_is_persistent()); /* ...persistently... */
108 FAIL_IF(!failure_is_syscall()); /* ...with code syscall. */
109 gettimeofday(&now, 0);
110 }
111
112 printf("%d active and suspended transactions behaved correctly.\n", count);
113 printf("(There were %d transaction retries.)\n", retries);
114
115 return 0;
116}
117
118int main(void)
119{
120 return test_harness(tm_syscall, "tm_syscall");
121}
diff --git a/tools/testing/selftests/powerpc/utils.h b/tools/testing/selftests/powerpc/utils.h
index a93777ae0684..b7d41086bb0a 100644
--- a/tools/testing/selftests/powerpc/utils.h
+++ b/tools/testing/selftests/powerpc/utils.h
@@ -15,11 +15,12 @@ typedef signed long long s64;
15 15
16/* Just for familiarity */ 16/* Just for familiarity */
17typedef uint32_t u32; 17typedef uint32_t u32;
18typedef uint16_t u16;
18typedef uint8_t u8; 19typedef uint8_t u8;
19 20
20 21
21int test_harness(int (test_function)(void), char *name); 22int test_harness(int (test_function)(void), char *name);
22 23extern void *get_auxv_entry(int type);
23 24
24/* Yes, this is evil */ 25/* Yes, this is evil */
25#define FAIL_IF(x) \ 26#define FAIL_IF(x) \
diff --git a/tools/testing/selftests/powerpc/vphn/.gitignore b/tools/testing/selftests/powerpc/vphn/.gitignore
new file mode 100644
index 000000000000..7c04395010cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/vphn/.gitignore
@@ -0,0 +1 @@
test-vphn
diff --git a/tools/testing/selftests/powerpc/vphn/Makefile b/tools/testing/selftests/powerpc/vphn/Makefile
new file mode 100644
index 000000000000..e539f775fd8f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/vphn/Makefile
@@ -0,0 +1,15 @@
1PROG := test-vphn
2
3CFLAGS += -m64
4
5all: $(PROG)
6
7$(PROG): ../harness.c
8
9run_tests: all
10 ./$(PROG)
11
12clean:
13 rm -f $(PROG)
14
15.PHONY: all run_tests clean
diff --git a/tools/testing/selftests/powerpc/vphn/test-vphn.c b/tools/testing/selftests/powerpc/vphn/test-vphn.c
new file mode 100644
index 000000000000..5742f6876b25
--- /dev/null
+++ b/tools/testing/selftests/powerpc/vphn/test-vphn.c
@@ -0,0 +1,410 @@
1#include <stdio.h>
2#include <byteswap.h>
3#include "utils.h"
4#include "subunit.h"
5
6#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
7#define cpu_to_be32(x) bswap_32(x)
8#define be32_to_cpu(x) bswap_32(x)
9#define be16_to_cpup(x) bswap_16(*x)
10#define cpu_to_be64(x) bswap_64(x)
11#else
12#define cpu_to_be32(x) (x)
13#define be32_to_cpu(x) (x)
14#define be16_to_cpup(x) (*x)
15#define cpu_to_be64(x) (x)
16#endif
17
18#include "vphn.c"
19
20static struct test {
21 char *descr;
22 long input[VPHN_REGISTER_COUNT];
23 u32 expected[VPHN_ASSOC_BUFSIZE];
24} all_tests[] = {
25 {
26 "vphn: no data",
27 {
28 0xffffffffffffffff,
29 0xffffffffffffffff,
30 0xffffffffffffffff,
31 0xffffffffffffffff,
32 0xffffffffffffffff,
33 0xffffffffffffffff,
34 },
35 {
36 0x00000000
37 }
38 },
39 {
40 "vphn: 1 x 16-bit value",
41 {
42 0x8001ffffffffffff,
43 0xffffffffffffffff,
44 0xffffffffffffffff,
45 0xffffffffffffffff,
46 0xffffffffffffffff,
47 0xffffffffffffffff,
48 },
49 {
50 0x00000001,
51 0x00000001
52 }
53 },
54 {
55 "vphn: 2 x 16-bit values",
56 {
57 0x80018002ffffffff,
58 0xffffffffffffffff,
59 0xffffffffffffffff,
60 0xffffffffffffffff,
61 0xffffffffffffffff,
62 0xffffffffffffffff,
63 },
64 {
65 0x00000002,
66 0x00000001,
67 0x00000002
68 }
69 },
70 {
71 "vphn: 3 x 16-bit values",
72 {
73 0x800180028003ffff,
74 0xffffffffffffffff,
75 0xffffffffffffffff,
76 0xffffffffffffffff,
77 0xffffffffffffffff,
78 0xffffffffffffffff,
79 },
80 {
81 0x00000003,
82 0x00000001,
83 0x00000002,
84 0x00000003
85 }
86 },
87 {
88 "vphn: 4 x 16-bit values",
89 {
90 0x8001800280038004,
91 0xffffffffffffffff,
92 0xffffffffffffffff,
93 0xffffffffffffffff,
94 0xffffffffffffffff,
95 0xffffffffffffffff,
96 },
97 {
98 0x00000004,
99 0x00000001,
100 0x00000002,
101 0x00000003,
102 0x00000004
103 }
104 },
105 {
106 /* Parsing the next 16-bit value out of the next 64-bit input
107 * value.
108 */
109 "vphn: 5 x 16-bit values",
110 {
111 0x8001800280038004,
112 0x8005ffffffffffff,
113 0xffffffffffffffff,
114 0xffffffffffffffff,
115 0xffffffffffffffff,
116 0xffffffffffffffff,
117 },
118 {
119 0x00000005,
120 0x00000001,
121 0x00000002,
122 0x00000003,
123 0x00000004,
124 0x00000005
125 }
126 },
127 {
128 /* Parse at most 6 x 64-bit input values */
129 "vphn: 24 x 16-bit values",
130 {
131 0x8001800280038004,
132 0x8005800680078008,
133 0x8009800a800b800c,
134 0x800d800e800f8010,
135 0x8011801280138014,
136 0x8015801680178018
137 },
138 {
139 0x00000018,
140 0x00000001,
141 0x00000002,
142 0x00000003,
143 0x00000004,
144 0x00000005,
145 0x00000006,
146 0x00000007,
147 0x00000008,
148 0x00000009,
149 0x0000000a,
150 0x0000000b,
151 0x0000000c,
152 0x0000000d,
153 0x0000000e,
154 0x0000000f,
155 0x00000010,
156 0x00000011,
157 0x00000012,
158 0x00000013,
159 0x00000014,
160 0x00000015,
161 0x00000016,
162 0x00000017,
163 0x00000018
164 }
165 },
166 {
167 "vphn: 1 x 32-bit value",
168 {
169 0x00000001ffffffff,
170 0xffffffffffffffff,
171 0xffffffffffffffff,
172 0xffffffffffffffff,
173 0xffffffffffffffff,
174 0xffffffffffffffff
175 },
176 {
177 0x00000001,
178 0x00000001
179 }
180 },
181 {
182 "vphn: 2 x 32-bit values",
183 {
184 0x0000000100000002,
185 0xffffffffffffffff,
186 0xffffffffffffffff,
187 0xffffffffffffffff,
188 0xffffffffffffffff,
189 0xffffffffffffffff
190 },
191 {
192 0x00000002,
193 0x00000001,
194 0x00000002
195 }
196 },
197 {
198 /* Parsing the next 32-bit value out of the next 64-bit input
199 * value.
200 */
201 "vphn: 3 x 32-bit values",
202 {
203 0x0000000100000002,
204 0x00000003ffffffff,
205 0xffffffffffffffff,
206 0xffffffffffffffff,
207 0xffffffffffffffff,
208 0xffffffffffffffff
209 },
210 {
211 0x00000003,
212 0x00000001,
213 0x00000002,
214 0x00000003
215 }
216 },
217 {
218 /* Parse at most 6 x 64-bit input values */
219 "vphn: 12 x 32-bit values",
220 {
221 0x0000000100000002,
222 0x0000000300000004,
223 0x0000000500000006,
224 0x0000000700000008,
225 0x000000090000000a,
226 0x0000000b0000000c
227 },
228 {
229 0x0000000c,
230 0x00000001,
231 0x00000002,
232 0x00000003,
233 0x00000004,
234 0x00000005,
235 0x00000006,
236 0x00000007,
237 0x00000008,
238 0x00000009,
239 0x0000000a,
240 0x0000000b,
241 0x0000000c
242 }
243 },
244 {
245 "vphn: 16-bit value followed by 32-bit value",
246 {
247 0x800100000002ffff,
248 0xffffffffffffffff,
249 0xffffffffffffffff,
250 0xffffffffffffffff,
251 0xffffffffffffffff,
252 0xffffffffffffffff
253 },
254 {
255 0x00000002,
256 0x00000001,
257 0x00000002
258 }
259 },
260 {
261 "vphn: 32-bit value followed by 16-bit value",
262 {
263 0x000000018002ffff,
264 0xffffffffffffffff,
265 0xffffffffffffffff,
266 0xffffffffffffffff,
267 0xffffffffffffffff,
268 0xffffffffffffffff
269 },
270 {
271 0x00000002,
272 0x00000001,
273 0x00000002
274 }
275 },
276 {
277 /* Parse a 32-bit value split accross two consecutives 64-bit
278 * input values.
279 */
280 "vphn: 16-bit value followed by 2 x 32-bit values",
281 {
282 0x8001000000020000,
283 0x0003ffffffffffff,
284 0xffffffffffffffff,
285 0xffffffffffffffff,
286 0xffffffffffffffff,
287 0xffffffffffffffff
288 },
289 {
290 0x00000003,
291 0x00000001,
292 0x00000002,
293 0x00000003,
294 0x00000004,
295 0x00000005
296 }
297 },
298 {
299 /* The lower bits in 0x0001ffff don't get mixed up with the
300 * 0xffff terminator.
301 */
302 "vphn: 32-bit value has all ones in 16 lower bits",
303 {
304 0x0001ffff80028003,
305 0xffffffffffffffff,
306 0xffffffffffffffff,
307 0xffffffffffffffff,
308 0xffffffffffffffff,
309 0xffffffffffffffff
310 },
311 {
312 0x00000003,
313 0x0001ffff,
314 0x00000002,
315 0x00000003
316 }
317 },
318 {
319 /* The following input doesn't follow the specification.
320 */
321 "vphn: last 32-bit value is truncated",
322 {
323 0x0000000100000002,
324 0x0000000300000004,
325 0x0000000500000006,
326 0x0000000700000008,
327 0x000000090000000a,
328 0x0000000b800c2bad
329 },
330 {
331 0x0000000c,
332 0x00000001,
333 0x00000002,
334 0x00000003,
335 0x00000004,
336 0x00000005,
337 0x00000006,
338 0x00000007,
339 0x00000008,
340 0x00000009,
341 0x0000000a,
342 0x0000000b,
343 0x0000000c
344 }
345 },
346 {
347 "vphn: garbage after terminator",
348 {
349 0xffff2bad2bad2bad,
350 0x2bad2bad2bad2bad,
351 0x2bad2bad2bad2bad,
352 0x2bad2bad2bad2bad,
353 0x2bad2bad2bad2bad,
354 0x2bad2bad2bad2bad
355 },
356 {
357 0x00000000
358 }
359 },
360 {
361 NULL
362 }
363};
364
365static int test_one(struct test *test)
366{
367 __be32 output[VPHN_ASSOC_BUFSIZE] = { 0 };
368 int i, len;
369
370 vphn_unpack_associativity(test->input, output);
371
372 len = be32_to_cpu(output[0]);
373 if (len != test->expected[0]) {
374 printf("expected %d elements, got %d\n", test->expected[0],
375 len);
376 return 1;
377 }
378
379 for (i = 1; i < len; i++) {
380 u32 val = be32_to_cpu(output[i]);
381 if (val != test->expected[i]) {
382 printf("element #%d is 0x%x, should be 0x%x\n", i, val,
383 test->expected[i]);
384 return 1;
385 }
386 }
387
388 return 0;
389}
390
391static int test_vphn(void)
392{
393 static struct test *test;
394
395 for (test = all_tests; test->descr; test++) {
396 int ret;
397
398 ret = test_one(test);
399 test_finish(test->descr, ret);
400 if (ret)
401 return ret;
402 }
403
404 return 0;
405}
406
407int main(int argc, char **argv)
408{
409 return test_harness(test_vphn, "test-vphn");
410}
diff --git a/tools/testing/selftests/powerpc/vphn/vphn.c b/tools/testing/selftests/powerpc/vphn/vphn.c
new file mode 120000
index 000000000000..186b906e66d5
--- /dev/null
+++ b/tools/testing/selftests/powerpc/vphn/vphn.c
@@ -0,0 +1 @@
../../../../../arch/powerpc/mm/vphn.c \ No newline at end of file
diff --git a/tools/testing/selftests/powerpc/vphn/vphn.h b/tools/testing/selftests/powerpc/vphn/vphn.h
new file mode 120000
index 000000000000..7131efe38c65
--- /dev/null
+++ b/tools/testing/selftests/powerpc/vphn/vphn.h
@@ -0,0 +1 @@
../../../../../arch/powerpc/mm/vphn.h \ No newline at end of file