diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 6 |
3 files changed, 12 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index dcd4518a9b08..0b2471107137 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
| @@ -7676,14 +7676,16 @@ restart_ih: | |||
| 7676 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); | 7676 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); |
| 7677 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); | 7677 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); |
| 7678 | mc_client = RREG32(VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); | 7678 | mc_client = RREG32(VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); |
| 7679 | /* reset addr and status */ | ||
| 7680 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
| 7681 | if (addr == 0x0 && status == 0x0) | ||
| 7682 | break; | ||
| 7679 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); | 7683 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); |
| 7680 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", | 7684 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", |
| 7681 | addr); | 7685 | addr); |
| 7682 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 7686 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
| 7683 | status); | 7687 | status); |
| 7684 | cik_vm_decode_fault(rdev, status, addr, mc_client); | 7688 | cik_vm_decode_fault(rdev, status, addr, mc_client); |
| 7685 | /* reset addr and status */ | ||
| 7686 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
| 7687 | break; | 7689 | break; |
| 7688 | case 167: /* VCE */ | 7690 | case 167: /* VCE */ |
| 7689 | DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data); | 7691 | DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data); |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index e2f605224e8c..d5d4d3a86731 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -5066,14 +5066,16 @@ restart_ih: | |||
| 5066 | case 147: | 5066 | case 147: |
| 5067 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); | 5067 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); |
| 5068 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); | 5068 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); |
| 5069 | /* reset addr and status */ | ||
| 5070 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
| 5071 | if (addr == 0x0 && status == 0x0) | ||
| 5072 | break; | ||
| 5069 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); | 5073 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); |
| 5070 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", | 5074 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", |
| 5071 | addr); | 5075 | addr); |
| 5072 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 5076 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
| 5073 | status); | 5077 | status); |
| 5074 | cayman_vm_decode_fault(rdev, status, addr); | 5078 | cayman_vm_decode_fault(rdev, status, addr); |
| 5075 | /* reset addr and status */ | ||
| 5076 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
| 5077 | break; | 5079 | break; |
| 5078 | case 176: /* CP_INT in ring buffer */ | 5080 | case 176: /* CP_INT in ring buffer */ |
| 5079 | case 177: /* CP_INT in IB1 */ | 5081 | case 177: /* CP_INT in IB1 */ |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 730cee2c34cf..eba0225259a4 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
| @@ -6376,14 +6376,16 @@ restart_ih: | |||
| 6376 | case 147: | 6376 | case 147: |
| 6377 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); | 6377 | addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR); |
| 6378 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); | 6378 | status = RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS); |
| 6379 | /* reset addr and status */ | ||
| 6380 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
| 6381 | if (addr == 0x0 && status == 0x0) | ||
| 6382 | break; | ||
| 6379 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); | 6383 | dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); |
| 6380 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", | 6384 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", |
| 6381 | addr); | 6385 | addr); |
| 6382 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", | 6386 | dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", |
| 6383 | status); | 6387 | status); |
| 6384 | si_vm_decode_fault(rdev, status, addr); | 6388 | si_vm_decode_fault(rdev, status, addr); |
| 6385 | /* reset addr and status */ | ||
| 6386 | WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); | ||
| 6387 | break; | 6389 | break; |
| 6388 | case 176: /* RINGID0 CP_INT */ | 6390 | case 176: /* RINGID0 CP_INT */ |
| 6389 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); | 6391 | radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); |
