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-rw-r--r--arch/score/include/asm/irq.h10
-rw-r--r--arch/score/kernel/irq.c33
2 files changed, 23 insertions, 20 deletions
diff --git a/arch/score/include/asm/irq.h b/arch/score/include/asm/irq.h
index 401f6704848c..6edd2a2adef7 100644
--- a/arch/score/include/asm/irq.h
+++ b/arch/score/include/asm/irq.h
@@ -18,16 +18,6 @@
18 18
19#define irq_canonicalize(irq) (irq) 19#define irq_canonicalize(irq) (irq)
20 20
21#define P_INT_PNDL 0x95F50000
22#define P_INT_PNDH 0x95F50004
23#define P_INT_PRIORITY_M 0x95F50008
24#define P_INT_PRIORITY_SG0 0x95F50010
25#define P_INT_PRIORITY_SG1 0x95F50014
26#define P_INT_PRIORITY_SG2 0x95F50018
27#define P_INT_PRIORITY_SG3 0x95F5001C
28#define P_INT_MASKL 0x95F50020
29#define P_INT_MASKH 0x95F50024
30
31#define IRQ_TIMER (7) /* Timer IRQ number of SPCT6600 */ 21#define IRQ_TIMER (7) /* Timer IRQ number of SPCT6600 */
32 22
33#endif /* _ASM_SCORE_IRQ_H */ 23#endif /* _ASM_SCORE_IRQ_H */
diff --git a/arch/score/kernel/irq.c b/arch/score/kernel/irq.c
index 55474e8e9725..47647dde09ca 100644
--- a/arch/score/kernel/irq.c
+++ b/arch/score/kernel/irq.c
@@ -29,6 +29,19 @@
29 29
30#include <asm/io.h> 30#include <asm/io.h>
31 31
32/* the interrupt controller is hardcoded at this address */
33#define SCORE_PIC ((u32 __iomem __force *)0x95F50000)
34
35#define INT_PNDL 0
36#define INT_PNDH 1
37#define INT_PRIORITY_M 2
38#define INT_PRIORITY_SG0 4
39#define INT_PRIORITY_SG1 5
40#define INT_PRIORITY_SG2 6
41#define INT_PRIORITY_SG3 7
42#define INT_MASKL 8
43#define INT_MASKH 9
44
32/* 45/*
33 * handles all normal device IRQs 46 * handles all normal device IRQs
34 */ 47 */
@@ -44,11 +57,11 @@ static void score_mask(unsigned int irq_nr)
44 unsigned int irq_source = 63 - irq_nr; 57 unsigned int irq_source = 63 - irq_nr;
45 58
46 if (irq_source < 32) 59 if (irq_source < 32)
47 __raw_writel((__raw_readl((void *)P_INT_MASKL) | \ 60 __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \
48 (1 << irq_source)), (void *)P_INT_MASKL); 61 (1 << irq_source)), SCORE_PIC + INT_MASKL);
49 else 62 else
50 __raw_writel((__raw_readl((void *)P_INT_MASKH) | \ 63 __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \
51 (1 << (irq_source - 32))), (void *)P_INT_MASKH); 64 (1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
52} 65}
53 66
54static void score_unmask(unsigned int irq_nr) 67static void score_unmask(unsigned int irq_nr)
@@ -56,11 +69,11 @@ static void score_unmask(unsigned int irq_nr)
56 unsigned int irq_source = 63 - irq_nr; 69 unsigned int irq_source = 63 - irq_nr;
57 70
58 if (irq_source < 32) 71 if (irq_source < 32)
59 __raw_writel((__raw_readl((void *)P_INT_MASKL) & \ 72 __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \
60 ~(1 << irq_source)), (void *)P_INT_MASKL); 73 ~(1 << irq_source)), SCORE_PIC + INT_MASKL);
61 else 74 else
62 __raw_writel((__raw_readl((void *)P_INT_MASKH) & \ 75 __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \
63 ~(1 << (irq_source - 32))), (void *)P_INT_MASKH); 76 ~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
64} 77}
65 78
66struct irq_chip score_irq_chip = { 79struct irq_chip score_irq_chip = {
@@ -88,8 +101,8 @@ void __init init_IRQ(void)
88 memcpy((void *)target_addr, \ 101 memcpy((void *)target_addr, \
89 interrupt_exception_vector, IRQ_VECTOR_SIZE); 102 interrupt_exception_vector, IRQ_VECTOR_SIZE);
90 103
91 __raw_writel(0xffffffff, (void *)P_INT_MASKL); 104 __raw_writel(0xffffffff, SCORE_PIC + INT_MASKL);
92 __raw_writel(0xffffffff, (void *)P_INT_MASKH); 105 __raw_writel(0xffffffff, SCORE_PIC + INT_MASKH);
93 106
94 __asm__ __volatile__( 107 __asm__ __volatile__(
95 "mtcr %0, cr3\n\t" 108 "mtcr %0, cr3\n\t"