diff options
| -rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 11 | ||||
| -rw-r--r-- | arch/x86/oprofile/op_model_ppro.c | 11 | ||||
| -rw-r--r-- | arch/x86/oprofile/op_x86_model.h | 11 |
3 files changed, 31 insertions, 2 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index a9d194734a8e..ef9d735dea35 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
| @@ -194,9 +194,18 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, | |||
| 194 | 194 | ||
| 195 | /* clear all counters */ | 195 | /* clear all counters */ |
| 196 | for (i = 0; i < NUM_CONTROLS; ++i) { | 196 | for (i = 0; i < NUM_CONTROLS; ++i) { |
| 197 | if (unlikely(!msrs->controls[i].addr)) | 197 | if (unlikely(!msrs->controls[i].addr)) { |
| 198 | if (counter_config[i].enabled && !smp_processor_id()) | ||
| 199 | /* | ||
| 200 | * counter is reserved, this is on all | ||
| 201 | * cpus, so report only for cpu #0 | ||
| 202 | */ | ||
| 203 | op_x86_warn_reserved(i); | ||
| 198 | continue; | 204 | continue; |
| 205 | } | ||
| 199 | rdmsrl(msrs->controls[i].addr, val); | 206 | rdmsrl(msrs->controls[i].addr, val); |
| 207 | if (val & ARCH_PERFMON_EVENTSEL0_ENABLE) | ||
| 208 | op_x86_warn_in_use(i); | ||
| 200 | val &= model->reserved; | 209 | val &= model->reserved; |
| 201 | wrmsrl(msrs->controls[i].addr, val); | 210 | wrmsrl(msrs->controls[i].addr, val); |
| 202 | } | 211 | } |
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index 8eb05878554c..c344525ebb55 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c | |||
| @@ -82,9 +82,18 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model, | |||
| 82 | 82 | ||
| 83 | /* clear all counters */ | 83 | /* clear all counters */ |
| 84 | for (i = 0; i < num_counters; ++i) { | 84 | for (i = 0; i < num_counters; ++i) { |
| 85 | if (unlikely(!msrs->controls[i].addr)) | 85 | if (unlikely(!msrs->controls[i].addr)) { |
| 86 | if (counter_config[i].enabled && !smp_processor_id()) | ||
| 87 | /* | ||
| 88 | * counter is reserved, this is on all | ||
| 89 | * cpus, so report only for cpu #0 | ||
| 90 | */ | ||
| 91 | op_x86_warn_reserved(i); | ||
| 86 | continue; | 92 | continue; |
| 93 | } | ||
| 87 | rdmsrl(msrs->controls[i].addr, val); | 94 | rdmsrl(msrs->controls[i].addr, val); |
| 95 | if (val & ARCH_PERFMON_EVENTSEL0_ENABLE) | ||
| 96 | op_x86_warn_in_use(i); | ||
| 88 | val &= model->reserved; | 97 | val &= model->reserved; |
| 89 | wrmsrl(msrs->controls[i].addr, val); | 98 | wrmsrl(msrs->controls[i].addr, val); |
| 90 | } | 99 | } |
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h index 7b8e75d16081..59fa2bdb0da3 100644 --- a/arch/x86/oprofile/op_x86_model.h +++ b/arch/x86/oprofile/op_x86_model.h | |||
| @@ -57,6 +57,17 @@ struct op_x86_model_spec { | |||
| 57 | 57 | ||
| 58 | struct op_counter_config; | 58 | struct op_counter_config; |
| 59 | 59 | ||
| 60 | static inline void op_x86_warn_in_use(int counter) | ||
| 61 | { | ||
| 62 | pr_warning("oprofile: counter #%d on cpu #%d may already be used\n", | ||
| 63 | counter, smp_processor_id()); | ||
| 64 | } | ||
| 65 | |||
| 66 | static inline void op_x86_warn_reserved(int counter) | ||
| 67 | { | ||
| 68 | pr_warning("oprofile: counter #%d is already reserved\n", counter); | ||
| 69 | } | ||
| 70 | |||
| 60 | extern u64 op_x86_get_ctrl(struct op_x86_model_spec const *model, | 71 | extern u64 op_x86_get_ctrl(struct op_x86_model_spec const *model, |
| 61 | struct op_counter_config *counter_config); | 72 | struct op_counter_config *counter_config); |
| 62 | extern int op_x86_phys_to_virt(int phys); | 73 | extern int op_x86_phys_to_virt(int phys); |
