diff options
| -rw-r--r-- | drivers/spi/spi-sirf.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index d6308e6a9b47..adbabbdfc7f0 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c | |||
| @@ -62,15 +62,15 @@ | |||
| 62 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_12 (1 << 26) | 62 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_12 (1 << 26) |
| 63 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_16 (2 << 26) | 63 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_16 (2 << 26) |
| 64 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_32 (3 << 26) | 64 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_32 (3 << 26) |
| 65 | #define SIRFSOC_SPI_CMD_BYTE_NUM(x) ((x & 3) << 28) | 65 | #define SIRFSOC_SPI_CMD_BYTE_NUM(x) ((x & 3) << 28) |
| 66 | #define SIRFSOC_SPI_ENA_AUTO_CLR BIT(30) | 66 | #define SIRFSOC_SPI_ENA_AUTO_CLR BIT(30) |
| 67 | #define SIRFSOC_SPI_MUL_DAT_MODE BIT(31) | 67 | #define SIRFSOC_SPI_MUL_DAT_MODE BIT(31) |
| 68 | 68 | ||
| 69 | /* Interrupt Enable */ | 69 | /* Interrupt Enable */ |
| 70 | #define SIRFSOC_SPI_RX_DONE_INT_EN BIT(0) | 70 | #define SIRFSOC_SPI_RX_DONE_INT_EN BIT(0) |
| 71 | #define SIRFSOC_SPI_TX_DONE_INT_EN BIT(1) | 71 | #define SIRFSOC_SPI_TX_DONE_INT_EN BIT(1) |
| 72 | #define SIRFSOC_SPI_RX_OFLOW_INT_EN BIT(2) | 72 | #define SIRFSOC_SPI_RX_OFLOW_INT_EN BIT(2) |
| 73 | #define SIRFSOC_SPI_TX_UFLOW_INT_EN BIT(3) | 73 | #define SIRFSOC_SPI_TX_UFLOW_INT_EN BIT(3) |
| 74 | #define SIRFSOC_SPI_RX_IO_DMA_INT_EN BIT(4) | 74 | #define SIRFSOC_SPI_RX_IO_DMA_INT_EN BIT(4) |
| 75 | #define SIRFSOC_SPI_TX_IO_DMA_INT_EN BIT(5) | 75 | #define SIRFSOC_SPI_TX_IO_DMA_INT_EN BIT(5) |
| 76 | #define SIRFSOC_SPI_RXFIFO_FULL_INT_EN BIT(6) | 76 | #define SIRFSOC_SPI_RXFIFO_FULL_INT_EN BIT(6) |
| @@ -79,7 +79,7 @@ | |||
| 79 | #define SIRFSOC_SPI_TXFIFO_THD_INT_EN BIT(9) | 79 | #define SIRFSOC_SPI_TXFIFO_THD_INT_EN BIT(9) |
| 80 | #define SIRFSOC_SPI_FRM_END_INT_EN BIT(10) | 80 | #define SIRFSOC_SPI_FRM_END_INT_EN BIT(10) |
| 81 | 81 | ||
| 82 | #define SIRFSOC_SPI_INT_MASK_ALL 0x1FFF | 82 | #define SIRFSOC_SPI_INT_MASK_ALL 0x1FFF |
| 83 | 83 | ||
| 84 | /* Interrupt status */ | 84 | /* Interrupt status */ |
| 85 | #define SIRFSOC_SPI_RX_DONE BIT(0) | 85 | #define SIRFSOC_SPI_RX_DONE BIT(0) |
