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-rw-r--r--Documentation/crypto/api-intro.txt1
-rw-r--r--Documentation/feature-removal-schedule.txt10
-rw-r--r--Documentation/filesystems/proc.txt1
-rw-r--r--Documentation/networking/README.ipw2100246
-rw-r--r--Documentation/networking/README.ipw2200300
-rw-r--r--Documentation/power/swsusp-dmcrypt.txt138
-rw-r--r--Documentation/power/swsusp.txt7
-rw-r--r--Documentation/power/video.txt9
-rw-r--r--Documentation/serial/driver15
-rw-r--r--Documentation/vm/locking15
-rw-r--r--Documentation/watchdog/watchdog-api.txt20
-rw-r--r--MAINTAINERS12
-rw-r--r--Makefile4
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/common/gic.c1
-rw-r--r--arch/arm/common/locomo.c24
-rw-r--r--arch/arm/common/sa1111.c8
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/kernel/ecard.c4
-rw-r--r--arch/arm/kernel/entry-common.S4
-rw-r--r--arch/arm/kernel/irq.c20
-rw-r--r--arch/arm/kernel/smp.c2
-rw-r--r--arch/arm/kernel/sys_arm.c10
-rw-r--r--arch/arm/kernel/time.c10
-rw-r--r--arch/arm/mach-footbridge/isa-irq.c2
-rw-r--r--arch/arm/mach-h720x/common.c2
-rw-r--r--arch/arm/mach-h720x/cpu-h7202.c2
-rw-r--r--arch/arm/mach-imx/irq.c4
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c2
-rw-r--r--arch/arm/mach-ixp2000/core.c10
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c2
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c155
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c7
-rw-r--r--arch/arm/mach-ixp4xx/coyote-setup.c9
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-pci.c28
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-setup.c8
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-pci.c12
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c13
-rw-r--r--arch/arm/mach-ixp4xx/ixdpg425-pci.c4
-rw-r--r--arch/arm/mach-lh7a40x/common.h2
-rw-r--r--arch/arm/mach-omap1/fpga.c2
-rw-r--r--arch/arm/mach-pxa/irq.c12
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c2
-rw-r--r--arch/arm/mach-pxa/time.c58
-rw-r--r--arch/arm/mach-s3c2410/bast-irq.c2
-rw-r--r--arch/arm/mach-s3c2410/clock.c9
-rw-r--r--arch/arm/mach-s3c2410/irq.c22
-rw-r--r--arch/arm/mach-s3c2410/pm.c6
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-clock.c6
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-irq.c8
-rw-r--r--arch/arm/mach-sa1100/irq.c10
-rw-r--r--arch/arm/mach-sa1100/neponset.c6
-rw-r--r--arch/arm/mach-sa1100/time.c68
-rw-r--r--arch/arm/mach-versatile/core.c2
-rw-r--r--arch/arm/mm/alignment.c70
-rw-r--r--arch/arm/mm/mm-armv.c30
-rw-r--r--arch/arm/mm/proc-arm6_7.S8
-rw-r--r--arch/arm/plat-omap/gpio.c2
-rw-r--r--arch/cris/Kconfig.debug31
-rw-r--r--arch/frv/kernel/frv_ksyms.c1
-rw-r--r--arch/i386/Kconfig5
-rw-r--r--arch/i386/kernel/Makefile2
-rw-r--r--arch/i386/kernel/acpi/boot.c3
-rw-r--r--arch/i386/kernel/cpu/common.c16
-rw-r--r--arch/i386/kernel/cpu/cpufreq/longhaul.c12
-rw-r--r--arch/i386/kernel/cpu/cyrix.c6
-rw-r--r--arch/i386/kernel/cpu/intel.c9
-rw-r--r--arch/i386/kernel/cpu/intel_cacheinfo.c9
-rw-r--r--arch/i386/kernel/cpu/mtrr/main.c2
-rw-r--r--arch/i386/kernel/crash.c2
-rw-r--r--arch/i386/kernel/doublefault.c2
-rw-r--r--arch/i386/kernel/efi.c110
-rw-r--r--arch/i386/kernel/entry.S9
-rw-r--r--arch/i386/kernel/head.S48
-rw-r--r--arch/i386/kernel/i8237.c67
-rw-r--r--arch/i386/kernel/ioport.c7
-rw-r--r--arch/i386/kernel/ldt.c7
-rw-r--r--arch/i386/kernel/machine_kexec.c18
-rw-r--r--arch/i386/kernel/microcode.c7
-rw-r--r--arch/i386/kernel/mpparse.c17
-rw-r--r--arch/i386/kernel/msr.c31
-rw-r--r--arch/i386/kernel/nmi.c5
-rw-r--r--arch/i386/kernel/process.c43
-rw-r--r--arch/i386/kernel/ptrace.c63
-rw-r--r--arch/i386/kernel/reboot.c9
-rw-r--r--arch/i386/kernel/semaphore.c162
-rw-r--r--arch/i386/kernel/setup.c22
-rw-r--r--arch/i386/kernel/signal.c8
-rw-r--r--arch/i386/kernel/smp.c2
-rw-r--r--arch/i386/kernel/smpboot.c7
-rw-r--r--arch/i386/kernel/time.c10
-rw-r--r--arch/i386/kernel/timers/timer_hpet.c19
-rw-r--r--arch/i386/kernel/timers/timer_pit.c27
-rw-r--r--arch/i386/kernel/timers/timer_pm.c9
-rw-r--r--arch/i386/kernel/timers/timer_tsc.c14
-rw-r--r--arch/i386/kernel/traps.c11
-rw-r--r--arch/i386/kernel/vm86.c10
-rw-r--r--arch/i386/kernel/vsyscall-sigreturn.S3
-rw-r--r--arch/i386/mach-es7000/es7000.h5
-rw-r--r--arch/i386/mach-es7000/es7000plat.c45
-rw-r--r--arch/i386/mach-generic/bigsmp.c5
-rw-r--r--arch/i386/mach-generic/probe.c20
-rw-r--r--arch/i386/mach-voyager/voyager_basic.c14
-rw-r--r--arch/i386/mach-voyager/voyager_smp.c5
-rw-r--r--arch/i386/math-emu/get_address.c13
-rw-r--r--arch/i386/mm/fault.c37
-rw-r--r--arch/i386/mm/hugetlbpage.c27
-rw-r--r--arch/i386/mm/init.c7
-rw-r--r--arch/i386/mm/pageattr.c7
-rw-r--r--arch/i386/mm/pgtable.c10
-rw-r--r--arch/i386/power/cpu.c43
-rw-r--r--arch/ia64/Kconfig6
-rw-r--r--arch/ia64/hp/sim/boot/fw-emu.c11
-rw-r--r--arch/ia64/ia32/ia32_signal.c1
-rw-r--r--arch/ia64/kernel/Makefile1
-rw-r--r--arch/ia64/kernel/cpufreq/Kconfig29
-rw-r--r--arch/ia64/kernel/cpufreq/Makefile1
-rw-r--r--arch/ia64/kernel/cpufreq/acpi-cpufreq.c499
-rw-r--r--arch/ia64/kernel/sys_ia64.c2
-rw-r--r--arch/ia64/kernel/uncached.c4
-rw-r--r--arch/ia64/lib/Makefile2
-rw-r--r--arch/ia64/lib/swiotlb.c5
-rw-r--r--arch/ia64/mm/hugetlbpage.c8
-rw-r--r--arch/ia64/pci/pci.c1
-rw-r--r--arch/ia64/sn/include/tio.h6
-rw-r--r--arch/ia64/sn/include/xtalk/hubdev.h11
-rw-r--r--arch/ia64/sn/kernel/bte.c83
-rw-r--r--arch/ia64/sn/kernel/huberror.c2
-rw-r--r--arch/ia64/sn/kernel/io_init.c35
-rw-r--r--arch/ia64/sn/kernel/irq.c75
-rw-r--r--arch/ia64/sn/kernel/setup.c7
-rw-r--r--arch/ia64/sn/kernel/sn2/ptc_deadlock.S13
-rw-r--r--arch/ia64/sn/kernel/sn2/sn2_smp.c256
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_hwperf.c313
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_proc_fs.c4
-rw-r--r--arch/ia64/sn/kernel/sn2/timer_interrupt.c22
-rw-r--r--arch/ia64/sn/pci/Makefile2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c60
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_provider.c40
-rw-r--r--arch/ia64/sn/pci/tioca_provider.c7
-rw-r--r--arch/ia64/sn/pci/tioce_provider.c771
-rw-r--r--arch/m68k/kernel/m68k_ksyms.c4
-rw-r--r--arch/m68k/kernel/ptrace.c370
-rw-r--r--arch/m68k/lib/Makefile2
-rw-r--r--arch/m68k/lib/memcmp.c11
-rw-r--r--arch/m68k/lib/memcpy.c75
-rw-r--r--arch/m68k/lib/memset.c68
-rw-r--r--arch/m68k/lib/string.c237
-rw-r--r--arch/m68k/mm/Makefile2
-rw-r--r--arch/m68k/mm/cache.c118
-rw-r--r--arch/m68k/mm/memory.c104
-rw-r--r--arch/m68knommu/Kconfig66
-rw-r--r--arch/m68knommu/Makefile5
-rw-r--r--arch/m68knommu/defconfig452
-rw-r--r--arch/m68knommu/kernel/setup.c25
-rw-r--r--arch/m68knommu/kernel/traps.c20
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S23
-rw-r--r--arch/m68knommu/platform/523x/config.c82
-rw-r--r--arch/m68knommu/platform/5307/head.S15
-rw-r--r--arch/m68knommu/platform/68328/entry.S4
-rw-r--r--arch/m68knommu/platform/68360/entry.S2
-rw-r--r--arch/mips/Kconfig255
-rw-r--r--arch/mips/Makefile46
-rw-r--r--arch/mips/au1000/common/pci.c8
-rw-r--r--arch/mips/au1000/common/setup.c2
-rw-r--r--arch/mips/au1000/common/time.c14
-rw-r--r--arch/mips/au1000/csb250/board_setup.c4
-rw-r--r--arch/mips/au1000/csb250/init.c2
-rw-r--r--arch/mips/au1000/db1x00/init.c2
-rw-r--r--arch/mips/au1000/hydrogen3/init.c2
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c2
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c6
-rw-r--r--arch/mips/au1000/xxs1500/init.c2
-rw-r--r--arch/mips/au1000/xxs1500/irqmap.c2
-rw-r--r--arch/mips/configs/atlas_defconfig5
-rw-r--r--arch/mips/configs/capcella_defconfig5
-rw-r--r--arch/mips/configs/cobalt_defconfig5
-rw-r--r--arch/mips/configs/db1000_defconfig5
-rw-r--r--arch/mips/configs/db1100_defconfig5
-rw-r--r--arch/mips/configs/db1500_defconfig4
-rw-r--r--arch/mips/configs/db1550_defconfig4
-rw-r--r--arch/mips/configs/ddb5476_defconfig5
-rw-r--r--arch/mips/configs/ddb5477_defconfig5
-rw-r--r--arch/mips/configs/decstation_defconfig5
-rw-r--r--arch/mips/configs/e55_defconfig5
-rw-r--r--arch/mips/configs/ev64120_defconfig5
-rw-r--r--arch/mips/configs/ev96100_defconfig5
-rw-r--r--arch/mips/configs/ip22_defconfig5
-rw-r--r--arch/mips/configs/ip27_defconfig2
-rw-r--r--arch/mips/configs/ip32_defconfig3
-rw-r--r--arch/mips/configs/it8172_defconfig5
-rw-r--r--arch/mips/configs/ivr_defconfig5
-rw-r--r--arch/mips/configs/jaguar-atx_defconfig5
-rw-r--r--arch/mips/configs/jmr3927_defconfig5
-rw-r--r--arch/mips/configs/lasat200_defconfig5
-rw-r--r--arch/mips/configs/malta_defconfig5
-rw-r--r--arch/mips/configs/mpc30x_defconfig5
-rw-r--r--arch/mips/configs/ocelot_3_defconfig5
-rw-r--r--arch/mips/configs/ocelot_c_defconfig3
-rw-r--r--arch/mips/configs/ocelot_defconfig5
-rw-r--r--arch/mips/configs/ocelot_g_defconfig3
-rw-r--r--arch/mips/configs/pb1100_defconfig5
-rw-r--r--arch/mips/configs/pb1500_defconfig4
-rw-r--r--arch/mips/configs/pb1550_defconfig4
-rw-r--r--arch/mips/configs/qemu_defconfig (renamed from arch/mips/configs/osprey_defconfig)405
-rw-r--r--arch/mips/configs/rm200_defconfig5
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig4
-rw-r--r--arch/mips/configs/sead_defconfig5
-rw-r--r--arch/mips/configs/tb0226_defconfig5
-rw-r--r--arch/mips/configs/tb0229_defconfig5
-rw-r--r--arch/mips/configs/workpad_defconfig5
-rw-r--r--arch/mips/configs/yosemite_defconfig4
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq.c6
-rw-r--r--arch/mips/ddb5xxx/ddb5477/setup.c22
-rw-r--r--arch/mips/dec/ecc-berr.c2
-rw-r--r--arch/mips/dec/int-handler.S6
-rw-r--r--arch/mips/dec/prom/Makefile4
-rw-r--r--arch/mips/defconfig5
-rw-r--r--arch/mips/ite-boards/generic/it8172_setup.c2
-rw-r--r--arch/mips/ite-boards/generic/time.c16
-rw-r--r--arch/mips/kernel/Makefile10
-rw-r--r--arch/mips/kernel/binfmt_elfn32.c2
-rw-r--r--arch/mips/kernel/binfmt_elfo32.c2
-rw-r--r--arch/mips/kernel/cpu-bugs64.c4
-rw-r--r--arch/mips/kernel/cpu-probe.c6
-rw-r--r--arch/mips/kernel/gdb-low.S4
-rw-r--r--arch/mips/kernel/gdb-stub.c12
-rw-r--r--arch/mips/kernel/genex.S14
-rw-r--r--arch/mips/kernel/head.S6
-rw-r--r--arch/mips/kernel/ioctl32.c2
-rw-r--r--arch/mips/kernel/irq.c2
-rw-r--r--arch/mips/kernel/linux32.c22
-rw-r--r--arch/mips/kernel/mips_ksyms.c2
-rw-r--r--arch/mips/kernel/process.c8
-rw-r--r--arch/mips/kernel/ptrace.c12
-rw-r--r--arch/mips/kernel/r2300_switch.S4
-rw-r--r--arch/mips/kernel/r4k_fpu.S4
-rw-r--r--arch/mips/kernel/r4k_switch.S8
-rw-r--r--arch/mips/kernel/setup.c4
-rw-r--r--arch/mips/kernel/signal32.c2
-rw-r--r--arch/mips/kernel/traps.c2
-rw-r--r--arch/mips/kernel/unaligned.c12
-rw-r--r--arch/mips/kernel/vmlinux.lds.S2
-rw-r--r--arch/mips/lasat/at93c.c16
-rw-r--r--arch/mips/lasat/at93c.h4
-rw-r--r--arch/mips/lasat/ds1603.c12
-rw-r--r--arch/mips/lasat/ds1603.h6
-rw-r--r--arch/mips/lasat/image/Makefile2
-rw-r--r--arch/mips/lasat/image/head.S2
-rw-r--r--arch/mips/lasat/interrupt.c4
-rw-r--r--arch/mips/lasat/lasat_board.c8
-rw-r--r--arch/mips/lasat/picvue.c12
-rw-r--r--arch/mips/lasat/picvue.h4
-rw-r--r--arch/mips/lasat/picvue_proc.c10
-rw-r--r--arch/mips/lasat/prom.c2
-rw-r--r--arch/mips/lasat/reset.c2
-rw-r--r--arch/mips/lasat/setup.c4
-rw-r--r--arch/mips/lasat/sysctl.c26
-rw-r--r--arch/mips/lib-32/Makefile2
-rw-r--r--arch/mips/lib-64/Makefile2
-rw-r--r--arch/mips/lib/memcpy.S6
-rw-r--r--arch/mips/math-emu/cp1emu.c12
-rw-r--r--arch/mips/math-emu/kernel_linkage.c2
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c2
-rw-r--r--arch/mips/mips-boards/generic/init.c6
-rw-r--r--arch/mips/mips-boards/generic/time.c2
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c6
-rw-r--r--arch/mips/mm/Makefile4
-rw-r--r--arch/mips/mm/c-r4k.c20
-rw-r--r--arch/mips/mm/c-sb1.c2
-rw-r--r--arch/mips/mm/cerr-sb1.c24
-rw-r--r--arch/mips/mm/dma-noncoherent.c10
-rw-r--r--arch/mips/mm/init.c8
-rw-r--r--arch/mips/mm/pg-sb1.c10
-rw-r--r--arch/mips/mm/tlbex.c30
-rw-r--r--arch/mips/momentum/jaguar_atx/int-handler.S12
-rw-r--r--arch/mips/momentum/jaguar_atx/prom.c12
-rw-r--r--arch/mips/momentum/jaguar_atx/reset.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/setup.c4
-rw-r--r--arch/mips/momentum/ocelot_3/prom.c12
-rw-r--r--arch/mips/momentum/ocelot_c/int-handler.S8
-rw-r--r--arch/mips/momentum/ocelot_c/ocelot_c_fpga.h2
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c14
-rw-r--r--arch/mips/momentum/ocelot_c/reset.c2
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c8
-rw-r--r--arch/mips/pci/fixup-ddb5074.c2
-rw-r--r--arch/mips/pci/fixup-ddb5477.c2
-rw-r--r--arch/mips/pci/fixup-malta.c2
-rw-r--r--arch/mips/pci/fixup-rbtx4927.c2
-rw-r--r--arch/mips/pci/fixup-sni.c2
-rw-r--r--arch/mips/pci/fixup-tb0219.c15
-rw-r--r--arch/mips/pci/ops-ddb5477.c4
-rw-r--r--arch/mips/pci/ops-tx4927.c6
-rw-r--r--arch/mips/pci/pci-ddb5477.c8
-rw-r--r--arch/mips/pci/pci-ip32.c2
-rw-r--r--arch/mips/pci/pci.c21
-rw-r--r--arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c14
-rw-r--r--arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h4
-rw-r--r--arch/mips/qemu/Makefile5
-rw-r--r--arch/mips/qemu/q-firmware.c7
-rw-r--r--arch/mips/qemu/q-int.S17
-rw-r--r--arch/mips/qemu/q-irq.c37
-rw-r--r--arch/mips/qemu/q-mem.c6
-rw-r--r--arch/mips/qemu/q-setup.c20
-rw-r--r--arch/mips/sgi-ip22/ip22-eisa.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-hpc.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c12
-rw-r--r--arch/mips/sgi-ip22/ip22-nvram.c8
-rw-r--r--arch/mips/sgi-ip22/ip22-reset.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-memory.c2
-rw-r--r--arch/mips/sgi-ip32/ip32-reset.c2
-rw-r--r--arch/mips/sibyte/cfe/cfe_error.h10
-rw-r--r--arch/mips/sibyte/cfe/console.c2
-rw-r--r--arch/mips/sibyte/cfe/setup.c4
-rw-r--r--arch/mips/sibyte/cfe/smp.c2
-rw-r--r--arch/mips/sibyte/sb1250/bus_watcher.c6
-rw-r--r--arch/mips/sibyte/sb1250/irq.c4
-rw-r--r--arch/mips/sibyte/swarm/rtc_m41t81.c10
-rw-r--r--arch/mips/sibyte/swarm/setup.c4
-rw-r--r--arch/mips/sni/irq.c2
-rw-r--r--arch/mips/sni/setup.c2
-rw-r--r--arch/mips/tx4927/common/tx4927_irq_handler.S6
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c2
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/Makefile6
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c42
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c2
-rw-r--r--arch/mips/vr4181/common/Makefile7
-rw-r--r--arch/mips/vr4181/common/int_handler.S206
-rw-r--r--arch/mips/vr4181/common/irq.c239
-rw-r--r--arch/mips/vr4181/common/serial.c51
-rw-r--r--arch/mips/vr4181/common/time.c145
-rw-r--r--arch/mips/vr4181/osprey/Makefile7
-rw-r--r--arch/mips/vr4181/osprey/dbg_io.c136
-rw-r--r--arch/mips/vr4181/osprey/prom.c49
-rw-r--r--arch/mips/vr4181/osprey/reset.c40
-rw-r--r--arch/mips/vr4181/osprey/setup.c68
-rw-r--r--arch/mips/vr41xx/casio-e55/setup.c5
-rw-r--r--arch/mips/vr41xx/common/Makefile2
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1052 files changed, 61942 insertions, 23010 deletions
diff --git a/Documentation/crypto/api-intro.txt b/Documentation/crypto/api-intro.txt
index a2d5b4900772..74dffc68ff9f 100644
--- a/Documentation/crypto/api-intro.txt
+++ b/Documentation/crypto/api-intro.txt
@@ -223,6 +223,7 @@ CAST5 algorithm contributors:
223 223
224TEA/XTEA algorithm contributors: 224TEA/XTEA algorithm contributors:
225 Aaron Grothe 225 Aaron Grothe
226 Michael Ringe
226 227
227Khazad algorithm contributors: 228Khazad algorithm contributors:
228 Aaron Grothe 229 Aaron Grothe
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 0665cb12bd66..363909056e46 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -102,16 +102,6 @@ Who: Jody McIntyre <scjody@steamballoon.com>
102 102
103--------------------------- 103---------------------------
104 104
105What: register_serial/unregister_serial
106When: September 2005
107Why: This interface does not allow serial ports to be registered against
108 a struct device, and as such does not allow correct power management
109 of such ports. 8250-based ports should use serial8250_register_port
110 and serial8250_unregister_port, or platform devices instead.
111Who: Russell King <rmk@arm.linux.org.uk>
112
113---------------------------
114
115What: i2c sysfs name change: in1_ref, vid deprecated in favour of cpu0_vid 105What: i2c sysfs name change: in1_ref, vid deprecated in favour of cpu0_vid
116When: November 2005 106When: November 2005
117Files: drivers/i2c/chips/adm1025.c, drivers/i2c/chips/adm1026.c 107Files: drivers/i2c/chips/adm1025.c, drivers/i2c/chips/adm1026.c
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index 6c98f2bd421e..5024ba7a592c 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -133,6 +133,7 @@ Table 1-1: Process specific entries in /proc
133 statm Process memory status information 133 statm Process memory status information
134 status Process status in human readable form 134 status Process status in human readable form
135 wchan If CONFIG_KALLSYMS is set, a pre-decoded wchan 135 wchan If CONFIG_KALLSYMS is set, a pre-decoded wchan
136 smaps Extension based on maps, presenting the rss size for each mapped file
136.............................................................................. 137..............................................................................
137 138
138For example, to get the status information of a process, all you have to do is 139For example, to get the status information of a process, all you have to do is
diff --git a/Documentation/networking/README.ipw2100 b/Documentation/networking/README.ipw2100
new file mode 100644
index 000000000000..2046948b020d
--- /dev/null
+++ b/Documentation/networking/README.ipw2100
@@ -0,0 +1,246 @@
1
2===========================
3Intel(R) PRO/Wireless 2100 Network Connection Driver for Linux
4README.ipw2100
5
6March 14, 2005
7
8===========================
9Index
10---------------------------
110. Introduction
121. Release 1.1.0 Current Features
132. Command Line Parameters
143. Sysfs Helper Files
154. Radio Kill Switch
165. Dynamic Firmware
176. Power Management
187. Support
198. License
20
21
22===========================
230. Introduction
24------------ ----- ----- ---- --- -- -
25
26This document provides a brief overview of the features supported by the
27IPW2100 driver project. The main project website, where the latest
28development version of the driver can be found, is:
29
30 http://ipw2100.sourceforge.net
31
32There you can find the not only the latest releases, but also information about
33potential fixes and patches, as well as links to the development mailing list
34for the driver project.
35
36
37===========================
381. Release 1.1.0 Current Supported Features
39---------------------------
40- Managed (BSS) and Ad-Hoc (IBSS)
41- WEP (shared key and open)
42- Wireless Tools support
43- 802.1x (tested with XSupplicant 1.0.1)
44
45Enabled (but not supported) features:
46- Monitor/RFMon mode
47- WPA/WPA2
48
49The distinction between officially supported and enabled is a reflection
50on the amount of validation and interoperability testing that has been
51performed on a given feature.
52
53
54===========================
552. Command Line Parameters
56---------------------------
57
58If the driver is built as a module, the following optional parameters are used
59by entering them on the command line with the modprobe command using this
60syntax:
61
62 modprobe ipw2100 [<option>=<VAL1><,VAL2>...]
63
64For example, to disable the radio on driver loading, enter:
65
66 modprobe ipw2100 disable=1
67
68The ipw2100 driver supports the following module parameters:
69
70Name Value Example:
71debug 0x0-0xffffffff debug=1024
72mode 0,1,2 mode=1 /* AdHoc */
73channel int channel=3 /* Only valid in AdHoc or Monitor */
74associate boolean associate=0 /* Do NOT auto associate */
75disable boolean disable=1 /* Do not power the HW */
76
77
78===========================
793. Sysfs Helper Files
80---------------------------
81
82There are several ways to control the behavior of the driver. Many of the
83general capabilities are exposed through the Wireless Tools (iwconfig). There
84are a few capabilities that are exposed through entries in the Linux Sysfs.
85
86
87----- Driver Level ------
88For the driver level files, look in /sys/bus/pci/drivers/ipw2100/
89
90 debug_level
91
92 This controls the same global as the 'debug' module parameter. For
93 information on the various debugging levels available, run the 'dvals'
94 script found in the driver source directory.
95
96 NOTE: 'debug_level' is only enabled if CONFIG_IPW2100_DEBUG is turn
97 on.
98
99----- Device Level ------
100For the device level files look in
101
102 /sys/bus/pci/drivers/ipw2100/{PCI-ID}/
103
104For example:
105 /sys/bus/pci/drivers/ipw2100/0000:02:01.0
106
107For the device level files, see /sys/bus/pci/drivers/ipw2100:
108
109 rf_kill
110 read -
111 0 = RF kill not enabled (radio on)
112 1 = SW based RF kill active (radio off)
113 2 = HW based RF kill active (radio off)
114 3 = Both HW and SW RF kill active (radio off)
115 write -
116 0 = If SW based RF kill active, turn the radio back on
117 1 = If radio is on, activate SW based RF kill
118
119 NOTE: If you enable the SW based RF kill and then toggle the HW
120 based RF kill from ON -> OFF -> ON, the radio will NOT come back on
121
122
123===========================
1244. Radio Kill Switch
125---------------------------
126Most laptops provide the ability for the user to physically disable the radio.
127Some vendors have implemented this as a physical switch that requires no
128software to turn the radio off and on. On other laptops, however, the switch
129is controlled through a button being pressed and a software driver then making
130calls to turn the radio off and on. This is referred to as a "software based
131RF kill switch"
132
133See the Sysfs helper file 'rf_kill' for determining the state of the RF switch
134on your system.
135
136
137===========================
1385. Dynamic Firmware
139---------------------------
140As the firmware is licensed under a restricted use license, it can not be
141included within the kernel sources. To enable the IPW2100 you will need a
142firmware image to load into the wireless NIC's processors.
143
144You can obtain these images from <http://ipw2100.sf.net/firmware.php>.
145
146See INSTALL for instructions on installing the firmware.
147
148
149===========================
1506. Power Management
151---------------------------
152The IPW2100 supports the configuration of the Power Save Protocol
153through a private wireless extension interface. The IPW2100 supports
154the following different modes:
155
156 off No power management. Radio is always on.
157 on Automatic power management
158 1-5 Different levels of power management. The higher the
159 number the greater the power savings, but with an impact to
160 packet latencies.
161
162Power management works by powering down the radio after a certain
163interval of time has passed where no packets are passed through the
164radio. Once powered down, the radio remains in that state for a given
165period of time. For higher power savings, the interval between last
166packet processed to sleep is shorter and the sleep period is longer.
167
168When the radio is asleep, the access point sending data to the station
169must buffer packets at the AP until the station wakes up and requests
170any buffered packets. If you have an AP that does not correctly support
171the PSP protocol you may experience packet loss or very poor performance
172while power management is enabled. If this is the case, you will need
173to try and find a firmware update for your AP, or disable power
174management (via `iwconfig eth1 power off`)
175
176To configure the power level on the IPW2100 you use a combination of
177iwconfig and iwpriv. iwconfig is used to turn power management on, off,
178and set it to auto.
179
180 iwconfig eth1 power off Disables radio power down
181 iwconfig eth1 power on Enables radio power management to
182 last set level (defaults to AUTO)
183 iwpriv eth1 set_power 0 Sets power level to AUTO and enables
184 power management if not previously
185 enabled.
186 iwpriv eth1 set_power 1-5 Set the power level as specified,
187 enabling power management if not
188 previously enabled.
189
190You can view the current power level setting via:
191
192 iwpriv eth1 get_power
193
194It will return the current period or timeout that is configured as a string
195in the form of xxxx/yyyy (z) where xxxx is the timeout interval (amount of
196time after packet processing), yyyy is the period to sleep (amount of time to
197wait before powering the radio and querying the access point for buffered
198packets), and z is the 'power level'. If power management is turned off the
199xxxx/yyyy will be replaced with 'off' -- the level reported will be the active
200level if `iwconfig eth1 power on` is invoked.
201
202
203===========================
2047. Support
205---------------------------
206
207For general development information and support,
208go to:
209
210 http://ipw2100.sf.net/
211
212The ipw2100 1.1.0 driver and firmware can be downloaded from:
213
214 http://support.intel.com
215
216For installation support on the ipw2100 1.1.0 driver on Linux kernels
2172.6.8 or greater, email support is available from:
218
219 http://supportmail.intel.com
220
221===========================
2228. License
223---------------------------
224
225 Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
226
227 This program is free software; you can redistribute it and/or modify it
228 under the terms of the GNU General Public License (version 2) as
229 published by the Free Software Foundation.
230
231 This program is distributed in the hope that it will be useful, but WITHOUT
232 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
233 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
234 more details.
235
236 You should have received a copy of the GNU General Public License along with
237 this program; if not, write to the Free Software Foundation, Inc., 59
238 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
239
240 The full GNU General Public License is included in this distribution in the
241 file called LICENSE.
242
243 License Contact Information:
244 James P. Ketrenos <ipw2100-admin@linux.intel.com>
245 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
246
diff --git a/Documentation/networking/README.ipw2200 b/Documentation/networking/README.ipw2200
new file mode 100644
index 000000000000..6916080c5f03
--- /dev/null
+++ b/Documentation/networking/README.ipw2200
@@ -0,0 +1,300 @@
1
2Intel(R) PRO/Wireless 2915ABG Driver for Linux in support of:
3
4Intel(R) PRO/Wireless 2200BG Network Connection
5Intel(R) PRO/Wireless 2915ABG Network Connection
6
7Note: The Intel(R) PRO/Wireless 2915ABG Driver for Linux and Intel(R)
8PRO/Wireless 2200BG Driver for Linux is a unified driver that works on
9both hardware adapters listed above. In this document the Intel(R)
10PRO/Wireless 2915ABG Driver for Linux will be used to reference the
11unified driver.
12
13Copyright (C) 2004-2005, Intel Corporation
14
15README.ipw2200
16
17Version: 1.0.0
18Date : January 31, 2005
19
20
21Index
22-----------------------------------------------
231. Introduction
241.1. Overview of features
251.2. Module parameters
261.3. Wireless Extension Private Methods
271.4. Sysfs Helper Files
282. About the Version Numbers
293. Support
304. License
31
32
331. Introduction
34-----------------------------------------------
35The following sections attempt to provide a brief introduction to using
36the Intel(R) PRO/Wireless 2915ABG Driver for Linux.
37
38This document is not meant to be a comprehensive manual on
39understanding or using wireless technologies, but should be sufficient
40to get you moving without wires on Linux.
41
42For information on building and installing the driver, see the INSTALL
43file.
44
45
461.1. Overview of Features
47-----------------------------------------------
48The current release (1.0.0) supports the following features:
49
50+ BSS mode (Infrastructure, Managed)
51+ IBSS mode (Ad-Hoc)
52+ WEP (OPEN and SHARED KEY mode)
53+ 802.1x EAP via wpa_supplicant and xsupplicant
54+ Wireless Extension support
55+ Full B and G rate support (2200 and 2915)
56+ Full A rate support (2915 only)
57+ Transmit power control
58+ S state support (ACPI suspend/resume)
59+ long/short preamble support
60
61
62
631.2. Command Line Parameters
64-----------------------------------------------
65
66Like many modules used in the Linux kernel, the Intel(R) PRO/Wireless
672915ABG Driver for Linux allows certain configuration options to be
68provided as module parameters. The most common way to specify a module
69parameter is via the command line.
70
71The general form is:
72
73% modprobe ipw2200 parameter=value
74
75Where the supported parameter are:
76
77 associate
78 Set to 0 to disable the auto scan-and-associate functionality of the
79 driver. If disabled, the driver will not attempt to scan
80 for and associate to a network until it has been configured with
81 one or more properties for the target network, for example configuring
82 the network SSID. Default is 1 (auto-associate)
83
84 Example: % modprobe ipw2200 associate=0
85
86 auto_create
87 Set to 0 to disable the auto creation of an Ad-Hoc network
88 matching the channel and network name parameters provided.
89 Default is 1.
90
91 channel
92 channel number for association. The normal method for setting
93 the channel would be to use the standard wireless tools
94 (i.e. `iwconfig eth1 channel 10`), but it is useful sometimes
95 to set this while debugging. Channel 0 means 'ANY'
96
97 debug
98 If using a debug build, this is used to control the amount of debug
99 info is logged. See the 'dval' and 'load' script for more info on
100 how to use this (the dval and load scripts are provided as part
101 of the ipw2200 development snapshot releases available from the
102 SourceForge project at http://ipw2200.sf.net)
103
104 mode
105 Can be used to set the default mode of the adapter.
106 0 = Managed, 1 = Ad-Hoc
107
108
1091.3. Wireless Extension Private Methods
110-----------------------------------------------
111
112As an interface designed to handle generic hardware, there are certain
113capabilities not exposed through the normal Wireless Tool interface. As
114such, a provision is provided for a driver to declare custom, or
115private, methods. The Intel(R) PRO/Wireless 2915ABG Driver for Linux
116defines several of these to configure various settings.
117
118The general form of using the private wireless methods is:
119
120 % iwpriv $IFNAME method parameters
121
122Where $IFNAME is the interface name the device is registered with
123(typically eth1, customized via one of the various network interface
124name managers, such as ifrename)
125
126The supported private methods are:
127
128 get_mode
129 Can be used to report out which IEEE mode the driver is
130 configured to support. Example:
131
132 % iwpriv eth1 get_mode
133 eth1 get_mode:802.11bg (6)
134
135 set_mode
136 Can be used to configure which IEEE mode the driver will
137 support.
138
139 Usage:
140 % iwpriv eth1 set_mode {mode}
141 Where {mode} is a number in the range 1-7:
142 1 802.11a (2915 only)
143 2 802.11b
144 3 802.11ab (2915 only)
145 4 802.11g
146 5 802.11ag (2915 only)
147 6 802.11bg
148 7 802.11abg (2915 only)
149
150 get_preamble
151 Can be used to report configuration of preamble length.
152
153 set_preamble
154 Can be used to set the configuration of preamble length:
155
156 Usage:
157 % iwpriv eth1 set_preamble {mode}
158 Where {mode} is one of:
159 1 Long preamble only
160 0 Auto (long or short based on connection)
161
162
1631.4. Sysfs Helper Files:
164-----------------------------------------------
165
166The Linux kernel provides a pseudo file system that can be used to
167access various components of the operating system. The Intel(R)
168PRO/Wireless 2915ABG Driver for Linux exposes several configuration
169parameters through this mechanism.
170
171An entry in the sysfs can support reading and/or writing. You can
172typically query the contents of a sysfs entry through the use of cat,
173and can set the contents via echo. For example:
174
175% cat /sys/bus/pci/drivers/ipw2200/debug_level
176
177Will report the current debug level of the driver's logging subsystem
178(only available if CONFIG_IPW_DEBUG was configured when the driver was
179built).
180
181You can set the debug level via:
182
183% echo $VALUE > /sys/bus/pci/drivers/ipw2200/debug_level
184
185Where $VALUE would be a number in the case of this sysfs entry. The
186input to sysfs files does not have to be a number. For example, the
187firmware loader used by hotplug utilizes sysfs entries for transferring
188the firmware image from user space into the driver.
189
190The Intel(R) PRO/Wireless 2915ABG Driver for Linux exposes sysfs entries
191at two levels -- driver level, which apply to all instances of the
192driver (in the event that there are more than one device installed) and
193device level, which applies only to the single specific instance.
194
195
1961.4.1 Driver Level Sysfs Helper Files
197-----------------------------------------------
198
199For the driver level files, look in /sys/bus/pci/drivers/ipw2200/
200
201 debug_level
202
203 This controls the same global as the 'debug' module parameter
204
205
2061.4.2 Device Level Sysfs Helper Files
207-----------------------------------------------
208
209For the device level files, look in
210
211 /sys/bus/pci/drivers/ipw2200/{PCI-ID}/
212
213For example:
214 /sys/bus/pci/drivers/ipw2200/0000:02:01.0
215
216For the device level files, see /sys/bus/pci/[drivers/ipw2200:
217
218 rf_kill
219 read -
220 0 = RF kill not enabled (radio on)
221 1 = SW based RF kill active (radio off)
222 2 = HW based RF kill active (radio off)
223 3 = Both HW and SW RF kill active (radio off)
224 write -
225 0 = If SW based RF kill active, turn the radio back on
226 1 = If radio is on, activate SW based RF kill
227
228 NOTE: If you enable the SW based RF kill and then toggle the HW
229 based RF kill from ON -> OFF -> ON, the radio will NOT come back on
230
231 ucode
232 read-only access to the ucode version number
233
234
2352. About the Version Numbers
236-----------------------------------------------
237
238Due to the nature of open source development projects, there are
239frequently changes being incorporated that have not gone through
240a complete validation process. These changes are incorporated into
241development snapshot releases.
242
243Releases are numbered with a three level scheme:
244
245 major.minor.development
246
247Any version where the 'development' portion is 0 (for example
2481.0.0, 1.1.0, etc.) indicates a stable version that will be made
249available for kernel inclusion.
250
251Any version where the 'development' portion is not a 0 (for
252example 1.0.1, 1.1.5, etc.) indicates a development version that is
253being made available for testing and cutting edge users. The stability
254and functionality of the development releases are not know. We make
255efforts to try and keep all snapshots reasonably stable, but due to the
256frequency of their release, and the desire to get those releases
257available as quickly as possible, unknown anomalies should be expected.
258
259The major version number will be incremented when significant changes
260are made to the driver. Currently, there are no major changes planned.
261
262
2633. Support
264-----------------------------------------------
265
266For installation support of the 1.0.0 version, you can contact
267http://supportmail.intel.com, or you can use the open source project
268support.
269
270For general information and support, go to:
271
272 http://ipw2200.sf.net/
273
274
2754. License
276-----------------------------------------------
277
278 Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
279
280 This program is free software; you can redistribute it and/or modify it
281 under the terms of the GNU General Public License version 2 as
282 published by the Free Software Foundation.
283
284 This program is distributed in the hope that it will be useful, but WITHOUT
285 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
286 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
287 more details.
288
289 You should have received a copy of the GNU General Public License along with
290 this program; if not, write to the Free Software Foundation, Inc., 59
291 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
292
293 The full GNU General Public License is included in this distribution in the
294 file called LICENSE.
295
296 Contact Information:
297 James P. Ketrenos <ipw2100-admin@linux.intel.com>
298 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
299
300
diff --git a/Documentation/power/swsusp-dmcrypt.txt b/Documentation/power/swsusp-dmcrypt.txt
new file mode 100644
index 000000000000..59931b46ff7e
--- /dev/null
+++ b/Documentation/power/swsusp-dmcrypt.txt
@@ -0,0 +1,138 @@
1Author: Andreas Steinmetz <ast@domdv.de>
2
3
4How to use dm-crypt and swsusp together:
5========================================
6
7Some prerequisites:
8You know how dm-crypt works. If not, visit the following web page:
9http://www.saout.de/misc/dm-crypt/
10You have read Documentation/power/swsusp.txt and understand it.
11You did read Documentation/initrd.txt and know how an initrd works.
12You know how to create or how to modify an initrd.
13
14Now your system is properly set up, your disk is encrypted except for
15the swap device(s) and the boot partition which may contain a mini
16system for crypto setup and/or rescue purposes. You may even have
17an initrd that does your current crypto setup already.
18
19At this point you want to encrypt your swap, too. Still you want to
20be able to suspend using swsusp. This, however, means that you
21have to be able to either enter a passphrase or that you read
22the key(s) from an external device like a pcmcia flash disk
23or an usb stick prior to resume. So you need an initrd, that sets
24up dm-crypt and then asks swsusp to resume from the encrypted
25swap device.
26
27The most important thing is that you set up dm-crypt in such
28a way that the swap device you suspend to/resume from has
29always the same major/minor within the initrd as well as
30within your running system. The easiest way to achieve this is
31to always set up this swap device first with dmsetup, so that
32it will always look like the following:
33
34brw------- 1 root root 254, 0 Jul 28 13:37 /dev/mapper/swap0
35
36Now set up your kernel to use /dev/mapper/swap0 as the default
37resume partition, so your kernel .config contains:
38
39CONFIG_PM_STD_PARTITION="/dev/mapper/swap0"
40
41Prepare your boot loader to use the initrd you will create or
42modify. For lilo the simplest setup looks like the following
43lines:
44
45image=/boot/vmlinuz
46initrd=/boot/initrd.gz
47label=linux
48append="root=/dev/ram0 init=/linuxrc rw"
49
50Finally you need to create or modify your initrd. Lets assume
51you create an initrd that reads the required dm-crypt setup
52from a pcmcia flash disk card. The card is formatted with an ext2
53fs which resides on /dev/hde1 when the card is inserted. The
54card contains at least the encrypted swap setup in a file
55named "swapkey". /etc/fstab of your initrd contains something
56like the following:
57
58/dev/hda1 /mnt ext3 ro 0 0
59none /proc proc defaults,noatime,nodiratime 0 0
60none /sys sysfs defaults,noatime,nodiratime 0 0
61
62/dev/hda1 contains an unencrypted mini system that sets up all
63of your crypto devices, again by reading the setup from the
64pcmcia flash disk. What follows now is a /linuxrc for your
65initrd that allows you to resume from encrypted swap and that
66continues boot with your mini system on /dev/hda1 if resume
67does not happen:
68
69#!/bin/sh
70PATH=/sbin:/bin:/usr/sbin:/usr/bin
71mount /proc
72mount /sys
73mapped=0
74noresume=`grep -c noresume /proc/cmdline`
75if [ "$*" != "" ]
76then
77 noresume=1
78fi
79dmesg -n 1
80/sbin/cardmgr -q
81for i in 1 2 3 4 5 6 7 8 9 0
82do
83 if [ -f /proc/ide/hde/media ]
84 then
85 usleep 500000
86 mount -t ext2 -o ro /dev/hde1 /mnt
87 if [ -f /mnt/swapkey ]
88 then
89 dmsetup create swap0 /mnt/swapkey > /dev/null 2>&1 && mapped=1
90 fi
91 umount /mnt
92 break
93 fi
94 usleep 500000
95done
96killproc /sbin/cardmgr
97dmesg -n 6
98if [ $mapped = 1 ]
99then
100 if [ $noresume != 0 ]
101 then
102 mkswap /dev/mapper/swap0 > /dev/null 2>&1
103 fi
104 echo 254:0 > /sys/power/resume
105 dmsetup remove swap0
106fi
107umount /sys
108mount /mnt
109umount /proc
110cd /mnt
111pivot_root . mnt
112mount /proc
113umount -l /mnt
114umount /proc
115exec chroot . /sbin/init $* < dev/console > dev/console 2>&1
116
117Please don't mind the weird loop above, busybox's msh doesn't know
118the let statement. Now, what is happening in the script?
119First we have to decide if we want to try to resume, or not.
120We will not resume if booting with "noresume" or any parameters
121for init like "single" or "emergency" as boot parameters.
122
123Then we need to set up dmcrypt with the setup data from the
124pcmcia flash disk. If this succeeds we need to reset the swap
125device if we don't want to resume. The line "echo 254:0 > /sys/power/resume"
126then attempts to resume from the first device mapper device.
127Note that it is important to set the device in /sys/power/resume,
128regardless if resuming or not, otherwise later suspend will fail.
129If resume starts, script execution terminates here.
130
131Otherwise we just remove the encrypted swap device and leave it to the
132mini system on /dev/hda1 to set the whole crypto up (it is up to
133you to modify this to your taste).
134
135What then follows is the well known process to change the root
136file system and continue booting from there. I prefer to unmount
137the initrd prior to continue booting but it is up to you to modify
138this.
diff --git a/Documentation/power/swsusp.txt b/Documentation/power/swsusp.txt
index 7a6b78966459..ddf907fbcc05 100644
--- a/Documentation/power/swsusp.txt
+++ b/Documentation/power/swsusp.txt
@@ -311,3 +311,10 @@ As a rule of thumb use encrypted swap to protect your data while your
311system is shut down or suspended. Additionally use the encrypted 311system is shut down or suspended. Additionally use the encrypted
312suspend image to prevent sensitive data from being stolen after 312suspend image to prevent sensitive data from being stolen after
313resume. 313resume.
314
315Q: Why we cannot suspend to a swap file?
316
317A: Because accessing swap file needs the filesystem mounted, and
318filesystem might do something wrong (like replaying the journal)
319during mount. [Probably could be solved by modifying every filesystem
320to support some kind of "really read-only!" option. Patches welcome.]
diff --git a/Documentation/power/video.txt b/Documentation/power/video.txt
index 7a4a5036d123..1a44e8acb54c 100644
--- a/Documentation/power/video.txt
+++ b/Documentation/power/video.txt
@@ -46,6 +46,12 @@ There are a few types of systems where video works after S3 resume:
46 POSTing bios works. Ole Rohne has patch to do just that at 46 POSTing bios works. Ole Rohne has patch to do just that at
47 http://dev.gentoo.org/~marineam/patch-radeonfb-2.6.11-rc2-mm2. 47 http://dev.gentoo.org/~marineam/patch-radeonfb-2.6.11-rc2-mm2.
48 48
49(8) on some systems, you can use the video_post utility mentioned here:
50 http://bugzilla.kernel.org/show_bug.cgi?id=3670. Do echo 3 > /sys/power/state
51 && /usr/sbin/video_post - which will initialize the display in console mode.
52 If you are in X, you can switch to a virtual terminal and back to X using
53 CTRL+ALT+F1 - CTRL+ALT+F7 to get the display working in graphical mode again.
54
49Now, if you pass acpi_sleep=something, and it does not work with your 55Now, if you pass acpi_sleep=something, and it does not work with your
50bios, you'll get a hard crash during resume. Be careful. Also it is 56bios, you'll get a hard crash during resume. Be careful. Also it is
51safest to do your experiments with plain old VGA console. The vesafb 57safest to do your experiments with plain old VGA console. The vesafb
@@ -64,7 +70,8 @@ Model hack (or "how to do it")
64------------------------------------------------------------------------------ 70------------------------------------------------------------------------------
65Acer Aspire 1406LC ole's late BIOS init (7), turn off DRI 71Acer Aspire 1406LC ole's late BIOS init (7), turn off DRI
66Acer TM 242FX vbetool (6) 72Acer TM 242FX vbetool (6)
67Acer TM C300 vga=normal (only suspend on console, not in X), vbetool (6) 73Acer TM C110 video_post (8)
74Acer TM C300 vga=normal (only suspend on console, not in X), vbetool (6) or video_post (8)
68Acer TM 4052LCi s3_bios (2) 75Acer TM 4052LCi s3_bios (2)
69Acer TM 636Lci s3_bios vga=normal (2) 76Acer TM 636Lci s3_bios vga=normal (2)
70Acer TM 650 (Radeon M7) vga=normal plus boot-radeon (5) gets text console back 77Acer TM 650 (Radeon M7) vga=normal plus boot-radeon (5) gets text console back
diff --git a/Documentation/serial/driver b/Documentation/serial/driver
index ac7eabbf662a..87856d3cfb67 100644
--- a/Documentation/serial/driver
+++ b/Documentation/serial/driver
@@ -111,24 +111,17 @@ hardware.
111 Interrupts: locally disabled. 111 Interrupts: locally disabled.
112 This call must not sleep 112 This call must not sleep
113 113
114 stop_tx(port,tty_stop) 114 stop_tx(port)
115 Stop transmitting characters. This might be due to the CTS 115 Stop transmitting characters. This might be due to the CTS
116 line becoming inactive or the tty layer indicating we want 116 line becoming inactive or the tty layer indicating we want
117 to stop transmission. 117 to stop transmission due to an XOFF character.
118
119 tty_stop: 1 if this call is due to the TTY layer issuing a
120 TTY stop to the driver (equiv to rs_stop).
121 118
122 Locking: port->lock taken. 119 Locking: port->lock taken.
123 Interrupts: locally disabled. 120 Interrupts: locally disabled.
124 This call must not sleep 121 This call must not sleep
125 122
126 start_tx(port,tty_start) 123 start_tx(port)
127 start transmitting characters. (incidentally, nonempty will 124 start transmitting characters.
128 always be nonzero, and shouldn't be used - it will be dropped).
129
130 tty_start: 1 if this call was due to the TTY layer issuing
131 a TTY start to the driver (equiv to rs_start)
132 125
133 Locking: port->lock taken. 126 Locking: port->lock taken.
134 Interrupts: locally disabled. 127 Interrupts: locally disabled.
diff --git a/Documentation/vm/locking b/Documentation/vm/locking
index c3ef09ae3bb1..f366fa956179 100644
--- a/Documentation/vm/locking
+++ b/Documentation/vm/locking
@@ -83,19 +83,18 @@ single address space optimization, so that the zap_page_range (from
83vmtruncate) does not lose sending ipi's to cloned threads that might 83vmtruncate) does not lose sending ipi's to cloned threads that might
84be spawned underneath it and go to user mode to drag in pte's into tlbs. 84be spawned underneath it and go to user mode to drag in pte's into tlbs.
85 85
86swap_list_lock/swap_device_lock 86swap_lock
87------------------------------- 87--------------
88The swap devices are chained in priority order from the "swap_list" header. 88The swap devices are chained in priority order from the "swap_list" header.
89The "swap_list" is used for the round-robin swaphandle allocation strategy. 89The "swap_list" is used for the round-robin swaphandle allocation strategy.
90The #free swaphandles is maintained in "nr_swap_pages". These two together 90The #free swaphandles is maintained in "nr_swap_pages". These two together
91are protected by the swap_list_lock. 91are protected by the swap_lock.
92 92
93The swap_device_lock, which is per swap device, protects the reference 93The swap_lock also protects all the device reference counts on the
94counts on the corresponding swaphandles, maintained in the "swap_map" 94corresponding swaphandles, maintained in the "swap_map" array, and the
95array, and the "highest_bit" and "lowest_bit" fields. 95"highest_bit" and "lowest_bit" fields.
96 96
97Both of these are spinlocks, and are never acquired from intr level. The 97The swap_lock is a spinlock, and is never acquired from intr level.
98locking hierarchy is swap_list_lock -> swap_device_lock.
99 98
100To prevent races between swap space deletion or async readahead swapins 99To prevent races between swap space deletion or async readahead swapins
101deciding whether a swap handle is being used, ie worthy of being read in 100deciding whether a swap handle is being used, ie worthy of being read in
diff --git a/Documentation/watchdog/watchdog-api.txt b/Documentation/watchdog/watchdog-api.txt
index 28388aa700c6..c5beb548cfc4 100644
--- a/Documentation/watchdog/watchdog-api.txt
+++ b/Documentation/watchdog/watchdog-api.txt
@@ -228,6 +228,26 @@ advantechwdt.c -- Advantech Single Board Computer
228 The GETSTATUS call returns if the device is open or not. 228 The GETSTATUS call returns if the device is open or not.
229 [FIXME -- silliness again?] 229 [FIXME -- silliness again?]
230 230
231booke_wdt.c -- PowerPC BookE Watchdog Timer
232
233 Timeout default varies according to frequency, supports
234 SETTIMEOUT
235
236 Watchdog can not be turned off, CONFIG_WATCHDOG_NOWAYOUT
237 does not make sense
238
239 GETSUPPORT returns the watchdog_info struct, and
240 GETSTATUS returns the supported options. GETBOOTSTATUS
241 returns a 1 if the last reset was caused by the
242 watchdog and a 0 otherwise. This watchdog can not be
243 disabled once it has been started. The wdt_period kernel
244 parameter selects which bit of the time base changing
245 from 0->1 will trigger the watchdog exception. Changing
246 the timeout from the ioctl calls will change the
247 wdt_period as defined above. Finally if you would like to
248 replace the default Watchdog Handler you can implement the
249 WatchdogHandler() function in your own code.
250
231eurotechwdt.c -- Eurotech CPU-1220/1410 251eurotechwdt.c -- Eurotech CPU-1220/1410
232 252
233 The timeout can be set using the SETTIMEOUT ioctl and defaults 253 The timeout can be set using the SETTIMEOUT ioctl and defaults
diff --git a/MAINTAINERS b/MAINTAINERS
index e8214fe53a5e..5899ec1504f3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -991,6 +991,13 @@ M: mike.miller@hp.com
991L: iss_storagedev@hp.com 991L: iss_storagedev@hp.com
992S: Supported 992S: Supported
993 993
994HOST AP DRIVER
995P: Jouni Malinen
996M: jkmaline@cc.hut.fi
997L: hostap@shmoo.com
998W: http://hostap.epitest.fi/
999S: Maintained
1000
994HP100: Driver for HP 10/100 Mbit/s Voice Grade Network Adapter Series 1001HP100: Driver for HP 10/100 Mbit/s Voice Grade Network Adapter Series
995P: Jaroslav Kysela 1002P: Jaroslav Kysela
996M: perex@suse.cz 1003M: perex@suse.cz
@@ -2643,11 +2650,6 @@ S: Maintained
2643UCLINUX (AND M68KNOMMU) 2650UCLINUX (AND M68KNOMMU)
2644P: Greg Ungerer 2651P: Greg Ungerer
2645M: gerg@uclinux.org 2652M: gerg@uclinux.org
2646M: gerg@snapgear.com
2647P: David McCullough
2648M: davidm@snapgear.com
2649P: D. Jeff Dionne (created first uClinux port)
2650M: jeff@uclinux.org
2651W: http://www.uclinux.org/ 2653W: http://www.uclinux.org/
2652L: uclinux-dev@uclinux.org (subscribers-only) 2654L: uclinux-dev@uclinux.org (subscribers-only)
2653S: Maintained 2655S: Maintained
diff --git a/Makefile b/Makefile
index 3d84df581cf2..2d68adbcfa28 100644
--- a/Makefile
+++ b/Makefile
@@ -374,8 +374,8 @@ depfile = $(subst $(comma),_,$(@D)/.$(@F).d)
374 374
375# Files to ignore in find ... statements 375# Files to ignore in find ... statements
376 376
377RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS -o -name .pc \) -prune -o 377RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS -o -name .pc -o -name .hg \) -prune -o
378RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn --exclude CVS --exclude .pc 378RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn --exclude CVS --exclude .pc --exclude .hg
379 379
380# =========================================================================== 380# ===========================================================================
381# Rules shared between *config targets and build targets 381# Rules shared between *config targets and build targets
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4bf0e8737e1f..68dfdba71d74 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -365,8 +365,8 @@ config NO_IDLE_HZ
365 365
366 Please note that dynamic tick may affect the accuracy of 366 Please note that dynamic tick may affect the accuracy of
367 timekeeping on some platforms depending on the implementation. 367 timekeeping on some platforms depending on the implementation.
368 Currently at least OMAP platform is known to have accurate 368 Currently at least OMAP, PXA2xx and SA11x0 platforms are known
369 timekeeping with dynamic tick. 369 to have accurate timekeeping with dynamic tick.
370 370
371config ARCH_DISCONTIGMEM_ENABLE 371config ARCH_DISCONTIGMEM_ENABLE
372 bool 372 bool
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 51dbf5489b6b..d74990717559 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -24,6 +24,7 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/list.h> 25#include <linux/list.h>
26#include <linux/smp.h> 26#include <linux/smp.h>
27#include <linux/cpumask.h>
27 28
28#include <asm/irq.h> 29#include <asm/irq.h>
29#include <asm/io.h> 30#include <asm/io.h>
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 41f12658c8b4..51f430cc2fbf 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -177,7 +177,7 @@ static void locomo_handler(unsigned int irq, struct irqdesc *desc,
177 d = irq_desc + irq; 177 d = irq_desc + irq;
178 for (i = 0; i <= 3; i++, d++, irq++) { 178 for (i = 0; i <= 3; i++, d++, irq++) {
179 if (req & (0x0100 << i)) { 179 if (req & (0x0100 << i)) {
180 d->handle(irq, d, regs); 180 desc_handle_irq(irq, d, regs);
181 } 181 }
182 182
183 } 183 }
@@ -220,7 +220,7 @@ static void locomo_key_handler(unsigned int irq, struct irqdesc *desc,
220 220
221 if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) { 221 if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
222 d = irq_desc + LOCOMO_IRQ_KEY_START; 222 d = irq_desc + LOCOMO_IRQ_KEY_START;
223 d->handle(LOCOMO_IRQ_KEY_START, d, regs); 223 desc_handle_irq(LOCOMO_IRQ_KEY_START, d, regs);
224 } 224 }
225} 225}
226 226
@@ -273,7 +273,7 @@ static void locomo_gpio_handler(unsigned int irq, struct irqdesc *desc,
273 d = irq_desc + LOCOMO_IRQ_GPIO_START; 273 d = irq_desc + LOCOMO_IRQ_GPIO_START;
274 for (i = 0; i <= 15; i++, irq++, d++) { 274 for (i = 0; i <= 15; i++, irq++, d++) {
275 if (req & (0x0001 << i)) { 275 if (req & (0x0001 << i)) {
276 d->handle(irq, d, regs); 276 desc_handle_irq(irq, d, regs);
277 } 277 }
278 } 278 }
279 } 279 }
@@ -328,7 +328,7 @@ static void locomo_lt_handler(unsigned int irq, struct irqdesc *desc,
328 328
329 if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) { 329 if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
330 d = irq_desc + LOCOMO_IRQ_LT_START; 330 d = irq_desc + LOCOMO_IRQ_LT_START;
331 d->handle(LOCOMO_IRQ_LT_START, d, regs); 331 desc_handle_irq(LOCOMO_IRQ_LT_START, d, regs);
332 } 332 }
333} 333}
334 334
@@ -379,7 +379,7 @@ static void locomo_spi_handler(unsigned int irq, struct irqdesc *desc,
379 379
380 for (i = 0; i <= 3; i++, irq++, d++) { 380 for (i = 0; i <= 3; i++, irq++, d++) {
381 if (req & (0x0001 << i)) { 381 if (req & (0x0001 << i)) {
382 d->handle(irq, d, regs); 382 desc_handle_irq(irq, d, regs);
383 } 383 }
384 } 384 }
385 } 385 }
@@ -651,15 +651,15 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
651 return ret; 651 return ret;
652} 652}
653 653
654static void __locomo_remove(struct locomo *lchip) 654static int locomo_remove_child(struct device *dev, void *data)
655{ 655{
656 struct list_head *l, *n; 656 device_unregister(dev);
657 657 return 0;
658 list_for_each_safe(l, n, &lchip->dev->children) { 658}
659 struct device *d = list_to_dev(l);
660 659
661 device_unregister(d); 660static void __locomo_remove(struct locomo *lchip)
662 } 661{
662 device_for_each_child(lchip->dev, NULL, locomo_remove_child);
663 663
664 if (lchip->irq != NO_IRQ) { 664 if (lchip->irq != NO_IRQ) {
665 set_irq_chained_handler(lchip->irq, NULL); 665 set_irq_chained_handler(lchip->irq, NULL);
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 38c2eb667eb9..1a47fbf9cbbc 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -268,8 +268,8 @@ static struct irqchip sa1111_low_chip = {
268 .mask = sa1111_mask_lowirq, 268 .mask = sa1111_mask_lowirq,
269 .unmask = sa1111_unmask_lowirq, 269 .unmask = sa1111_unmask_lowirq,
270 .retrigger = sa1111_retrigger_lowirq, 270 .retrigger = sa1111_retrigger_lowirq,
271 .type = sa1111_type_lowirq, 271 .set_type = sa1111_type_lowirq,
272 .wake = sa1111_wake_lowirq, 272 .set_wake = sa1111_wake_lowirq,
273}; 273};
274 274
275static void sa1111_mask_highirq(unsigned int irq) 275static void sa1111_mask_highirq(unsigned int irq)
@@ -364,8 +364,8 @@ static struct irqchip sa1111_high_chip = {
364 .mask = sa1111_mask_highirq, 364 .mask = sa1111_mask_highirq,
365 .unmask = sa1111_unmask_highirq, 365 .unmask = sa1111_unmask_highirq,
366 .retrigger = sa1111_retrigger_highirq, 366 .retrigger = sa1111_retrigger_highirq,
367 .type = sa1111_type_highirq, 367 .set_type = sa1111_type_highirq,
368 .wake = sa1111_wake_highirq, 368 .set_wake = sa1111_wake_highirq,
369}; 369};
370 370
371static void sa1111_setup_irq(struct sa1111 *sachip) 371static void sa1111_setup_irq(struct sa1111 *sachip)
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 2b6b4c786e65..db07ce42b3b2 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -284,7 +284,7 @@ __syscall_start:
284 .long sys_fstatfs64 284 .long sys_fstatfs64
285 .long sys_tgkill 285 .long sys_tgkill
286 .long sys_utimes 286 .long sys_utimes
287/* 270 */ .long sys_fadvise64_64 287/* 270 */ .long sys_arm_fadvise64_64_wrapper
288 .long sys_pciconfig_iobase 288 .long sys_pciconfig_iobase
289 .long sys_pciconfig_read 289 .long sys_pciconfig_read
290 .long sys_pciconfig_write 290 .long sys_pciconfig_write
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 6540db691338..dceb826bd216 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -585,7 +585,7 @@ ecard_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
585 585
586 if (pending) { 586 if (pending) {
587 struct irqdesc *d = irq_desc + ec->irq; 587 struct irqdesc *d = irq_desc + ec->irq;
588 d->handle(ec->irq, d, regs); 588 desc_handle_irq(ec->irq, d, regs);
589 called ++; 589 called ++;
590 } 590 }
591 } 591 }
@@ -632,7 +632,7 @@ ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
632 * Serial cards should go in 0/1, ethernet/scsi in 2/3 632 * Serial cards should go in 0/1, ethernet/scsi in 2/3
633 * otherwise you will lose serial data at high speeds! 633 * otherwise you will lose serial data at high speeds!
634 */ 634 */
635 d->handle(ec->irq, d, regs); 635 desc_handle_irq(ec->irq, d, regs);
636 } else { 636 } else {
637 printk(KERN_WARNING "card%d: interrupt from unclaimed " 637 printk(KERN_WARNING "card%d: interrupt from unclaimed "
638 "card???\n", slot); 638 "card???\n", slot);
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 3f8d0e3aefab..6281d488ac97 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -265,6 +265,10 @@ sys_futex_wrapper:
265 str r5, [sp, #4] @ push sixth arg 265 str r5, [sp, #4] @ push sixth arg
266 b sys_futex 266 b sys_futex
267 267
268sys_arm_fadvise64_64_wrapper:
269 str r5, [sp, #4] @ push r5 to stack
270 b sys_arm_fadvise64_64
271
268/* 272/*
269 * Note: off_4k (r5) is always units of 4K. If we can't do the requested 273 * Note: off_4k (r5) is always units of 4K. If we can't do the requested
270 * offset, we return EINVAL. 274 * offset, we return EINVAL.
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 395137a8fad2..3284118f356b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -207,8 +207,8 @@ void enable_irq_wake(unsigned int irq)
207 unsigned long flags; 207 unsigned long flags;
208 208
209 spin_lock_irqsave(&irq_controller_lock, flags); 209 spin_lock_irqsave(&irq_controller_lock, flags);
210 if (desc->chip->wake) 210 if (desc->chip->set_wake)
211 desc->chip->wake(irq, 1); 211 desc->chip->set_wake(irq, 1);
212 spin_unlock_irqrestore(&irq_controller_lock, flags); 212 spin_unlock_irqrestore(&irq_controller_lock, flags);
213} 213}
214EXPORT_SYMBOL(enable_irq_wake); 214EXPORT_SYMBOL(enable_irq_wake);
@@ -219,8 +219,8 @@ void disable_irq_wake(unsigned int irq)
219 unsigned long flags; 219 unsigned long flags;
220 220
221 spin_lock_irqsave(&irq_controller_lock, flags); 221 spin_lock_irqsave(&irq_controller_lock, flags);
222 if (desc->chip->wake) 222 if (desc->chip->set_wake)
223 desc->chip->wake(irq, 0); 223 desc->chip->set_wake(irq, 0);
224 spin_unlock_irqrestore(&irq_controller_lock, flags); 224 spin_unlock_irqrestore(&irq_controller_lock, flags);
225} 225}
226EXPORT_SYMBOL(disable_irq_wake); 226EXPORT_SYMBOL(disable_irq_wake);
@@ -517,7 +517,7 @@ static void do_pending_irqs(struct pt_regs *regs)
517 list_for_each_safe(l, n, &head) { 517 list_for_each_safe(l, n, &head) {
518 desc = list_entry(l, struct irqdesc, pend); 518 desc = list_entry(l, struct irqdesc, pend);
519 list_del_init(&desc->pend); 519 list_del_init(&desc->pend);
520 desc->handle(desc - irq_desc, desc, regs); 520 desc_handle_irq(desc - irq_desc, desc, regs);
521 } 521 }
522 522
523 /* 523 /*
@@ -545,7 +545,7 @@ asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
545 545
546 irq_enter(); 546 irq_enter();
547 spin_lock(&irq_controller_lock); 547 spin_lock(&irq_controller_lock);
548 desc->handle(irq, desc, regs); 548 desc_handle_irq(irq, desc, regs);
549 549
550 /* 550 /*
551 * Now re-run any pending interrupts. 551 * Now re-run any pending interrupts.
@@ -624,9 +624,9 @@ int set_irq_type(unsigned int irq, unsigned int type)
624 } 624 }
625 625
626 desc = irq_desc + irq; 626 desc = irq_desc + irq;
627 if (desc->chip->type) { 627 if (desc->chip->set_type) {
628 spin_lock_irqsave(&irq_controller_lock, flags); 628 spin_lock_irqsave(&irq_controller_lock, flags);
629 ret = desc->chip->type(irq, type); 629 ret = desc->chip->set_type(irq, type);
630 spin_unlock_irqrestore(&irq_controller_lock, flags); 630 spin_unlock_irqrestore(&irq_controller_lock, flags);
631 } 631 }
632 632
@@ -846,8 +846,8 @@ unsigned long probe_irq_on(void)
846 846
847 irq_desc[i].probing = 1; 847 irq_desc[i].probing = 1;
848 irq_desc[i].triggered = 0; 848 irq_desc[i].triggered = 0;
849 if (irq_desc[i].chip->type) 849 if (irq_desc[i].chip->set_type)
850 irq_desc[i].chip->type(i, IRQT_PROBE); 850 irq_desc[i].chip->set_type(i, IRQT_PROBE);
851 irq_desc[i].chip->unmask(i); 851 irq_desc[i].chip->unmask(i);
852 irqs += 1; 852 irqs += 1;
853 } 853 }
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index b2085735a2ba..826164945747 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -110,7 +110,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
110 * We need to tell the secondary core where to find 110 * We need to tell the secondary core where to find
111 * its stack and the page tables. 111 * its stack and the page tables.
112 */ 112 */
113 secondary_data.stack = (void *)idle->thread_info + THREAD_SIZE - 8; 113 secondary_data.stack = (void *)idle->thread_info + THREAD_START_SP;
114 secondary_data.pgdir = virt_to_phys(pgd); 114 secondary_data.pgdir = virt_to_phys(pgd);
115 wmb(); 115 wmb();
116 116
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index f897ce2ccf0d..42629ff84f5a 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -311,3 +311,13 @@ long execve(const char *filename, char **argv, char **envp)
311 return ret; 311 return ret;
312} 312}
313EXPORT_SYMBOL(execve); 313EXPORT_SYMBOL(execve);
314
315/*
316 * Since loff_t is a 64 bit type we avoid a lot of ABI hastle
317 * with a different argument ordering.
318 */
319asmlinkage long sys_arm_fadvise64_64(int fd, int advice,
320 loff_t offset, loff_t len)
321{
322 return sys_fadvise64_64(fd, offset, len, advice);
323}
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 1b7fcd50c3e2..8880482dcbff 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -433,10 +433,12 @@ void timer_dyn_reprogram(void)
433{ 433{
434 struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; 434 struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick;
435 435
436 write_seqlock(&xtime_lock); 436 if (dyn_tick) {
437 if (dyn_tick->state & DYN_TICK_ENABLED) 437 write_seqlock(&xtime_lock);
438 dyn_tick->reprogram(next_timer_interrupt() - jiffies); 438 if (dyn_tick->state & DYN_TICK_ENABLED)
439 write_sequnlock(&xtime_lock); 439 dyn_tick->reprogram(next_timer_interrupt() - jiffies);
440 write_sequnlock(&xtime_lock);
441 }
440} 442}
441 443
442static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf) 444static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf)
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index b21016070ea3..e1c43b331d64 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -95,7 +95,7 @@ isa_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
95 } 95 }
96 96
97 desc = irq_desc + isa_irq; 97 desc = irq_desc + isa_irq;
98 desc->handle(isa_irq, desc, regs); 98 desc_handle_irq(isa_irq, desc, regs);
99} 99}
100 100
101static struct irqaction irq_cascade = { .handler = no_action, .name = "cascade", }; 101static struct irqaction irq_cascade = { .handler = no_action, .name = "cascade", };
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 96aa3af70d86..5110e2e65ddd 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -108,7 +108,7 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
108 while (mask) { 108 while (mask) {
109 if (mask & 1) { 109 if (mask & 1) {
110 IRQDBG("handling irq %d\n", irq); 110 IRQDBG("handling irq %d\n", irq);
111 desc->handle(irq, desc, regs); 111 desc_handle_irq(irq, desc, regs);
112 } 112 }
113 irq++; 113 irq++;
114 desc++; 114 desc++;
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index 593b6a2a30e1..4b3199319e68 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -126,7 +126,7 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
126 desc = irq_desc + irq; 126 desc = irq_desc + irq;
127 while (mask) { 127 while (mask) {
128 if (mask & 1) 128 if (mask & 1)
129 desc->handle(irq, desc, regs); 129 desc_handle_irq(irq, desc, regs);
130 irq++; 130 irq++;
131 desc++; 131 desc++;
132 mask >>= 1; 132 mask >>= 1;
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index 0c2713426dfd..eeb8a6d4a399 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -152,7 +152,7 @@ imx_gpio_handler(unsigned int mask, unsigned int irq,
152 while (mask) { 152 while (mask) {
153 if (mask & 1) { 153 if (mask & 1) {
154 DEBUG_IRQ("handling irq %d\n", irq); 154 DEBUG_IRQ("handling irq %d\n", irq);
155 desc->handle(irq, desc, regs); 155 desc_handle_irq(irq, desc, regs);
156 } 156 }
157 irq++; 157 irq++;
158 desc++; 158 desc++;
@@ -214,7 +214,7 @@ static struct irqchip imx_gpio_chip = {
214 .ack = imx_gpio_ack_irq, 214 .ack = imx_gpio_ack_irq,
215 .mask = imx_gpio_mask_irq, 215 .mask = imx_gpio_mask_irq,
216 .unmask = imx_gpio_unmask_irq, 216 .unmask = imx_gpio_unmask_irq,
217 .type = imx_gpio_irq_type, 217 .set_type = imx_gpio_irq_type,
218}; 218};
219 219
220void __init 220void __init
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 569f328c479d..2be5c03ab87f 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -170,7 +170,7 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
170 irq += IRQ_SIC_START; 170 irq += IRQ_SIC_START;
171 171
172 desc = irq_desc + irq; 172 desc = irq_desc + irq;
173 desc->handle(irq, desc, regs); 173 desc_handle_irq(irq, desc, regs);
174 } while (status); 174 } while (status);
175} 175}
176 176
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 45b18658499f..781d10ae00b7 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -317,7 +317,7 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc, str
317 for (i = 0; i <= 7; i++) { 317 for (i = 0; i <= 7; i++) {
318 if (status & (1<<i)) { 318 if (status & (1<<i)) {
319 desc = irq_desc + i + IRQ_IXP2000_GPIO0; 319 desc = irq_desc + i + IRQ_IXP2000_GPIO0;
320 desc->handle(i + IRQ_IXP2000_GPIO0, desc, regs); 320 desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc, regs);
321 } 321 }
322 } 322 }
323} 323}
@@ -380,10 +380,10 @@ static void ixp2000_GPIO_irq_unmask(unsigned int irq)
380} 380}
381 381
382static struct irqchip ixp2000_GPIO_irq_chip = { 382static struct irqchip ixp2000_GPIO_irq_chip = {
383 .type = ixp2000_GPIO_irq_type, 383 .ack = ixp2000_GPIO_irq_mask_ack,
384 .ack = ixp2000_GPIO_irq_mask_ack, 384 .mask = ixp2000_GPIO_irq_mask,
385 .mask = ixp2000_GPIO_irq_mask, 385 .unmask = ixp2000_GPIO_irq_unmask
386 .unmask = ixp2000_GPIO_irq_unmask 386 .set_type = ixp2000_GPIO_irq_type,
387}; 387};
388 388
389static void ixp2000_pci_irq_mask(unsigned int irq) 389static void ixp2000_pci_irq_mask(unsigned int irq)
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index a43369ad876c..63ba0191aa65 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -133,7 +133,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc, struct
133 struct irqdesc *cpld_desc; 133 struct irqdesc *cpld_desc;
134 int cpld_irq = IXP2000_BOARD_IRQ(0) + i; 134 int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
135 cpld_desc = irq_desc + cpld_irq; 135 cpld_desc = irq_desc + cpld_irq;
136 cpld_desc->handle(cpld_irq, cpld_desc, regs); 136 desc_handle_irq(cpld_irq, cpld_desc, regs);
137 } 137 }
138 } 138 }
139 139
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 43447dad1657..7a5109921287 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -82,7 +82,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc, struct
82 struct irqdesc *cpld_desc; 82 struct irqdesc *cpld_desc;
83 int cpld_irq = IXP2000_BOARD_IRQ(0) + i; 83 int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
84 cpld_desc = irq_desc + cpld_irq; 84 cpld_desc = irq_desc + cpld_irq;
85 cpld_desc->handle(cpld_irq, cpld_desc, regs); 85 desc_handle_irq(cpld_irq, cpld_desc, regs);
86 } 86 }
87 } 87 }
88 88
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 04490a9f8f6e..0422e906cc9a 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -38,90 +38,6 @@
38#include <asm/mach/irq.h> 38#include <asm/mach/irq.h>
39#include <asm/mach/time.h> 39#include <asm/mach/time.h>
40 40
41enum ixp4xx_irq_type {
42 IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE
43};
44static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type);
45
46/*************************************************************************
47 * GPIO acces functions
48 *************************************************************************/
49
50/*
51 * Configure GPIO line for input, interrupt, or output operation
52 *
53 * TODO: Enable/disable the irq_desc based on interrupt or output mode.
54 * TODO: Should these be named ixp4xx_gpio_?
55 */
56void gpio_line_config(u8 line, u32 style)
57{
58 static const int gpio2irq[] = {
59 6, 7, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29
60 };
61 u32 enable;
62 volatile u32 *int_reg;
63 u32 int_style;
64 enum ixp4xx_irq_type irq_type;
65
66 enable = *IXP4XX_GPIO_GPOER;
67
68 if (style & IXP4XX_GPIO_OUT) {
69 enable &= ~((1) << line);
70 } else if (style & IXP4XX_GPIO_IN) {
71 enable |= ((1) << line);
72
73 switch (style & IXP4XX_GPIO_INTSTYLE_MASK)
74 {
75 case (IXP4XX_GPIO_ACTIVE_HIGH):
76 int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
77 irq_type = IXP4XX_IRQ_LEVEL;
78 break;
79 case (IXP4XX_GPIO_ACTIVE_LOW):
80 int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
81 irq_type = IXP4XX_IRQ_LEVEL;
82 break;
83 case (IXP4XX_GPIO_RISING_EDGE):
84 int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
85 irq_type = IXP4XX_IRQ_EDGE;
86 break;
87 case (IXP4XX_GPIO_FALLING_EDGE):
88 int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
89 irq_type = IXP4XX_IRQ_EDGE;
90 break;
91 case (IXP4XX_GPIO_TRANSITIONAL):
92 int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
93 irq_type = IXP4XX_IRQ_EDGE;
94 break;
95 default:
96 int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
97 irq_type = IXP4XX_IRQ_LEVEL;
98 break;
99 }
100
101 if (style & IXP4XX_GPIO_INTSTYLE_MASK)
102 ixp4xx_config_irq(gpio2irq[line], irq_type);
103
104 if (line >= 8) { /* pins 8-15 */
105 line -= 8;
106 int_reg = IXP4XX_GPIO_GPIT2R;
107 }
108 else { /* pins 0-7 */
109 int_reg = IXP4XX_GPIO_GPIT1R;
110 }
111
112 /* Clear the style for the appropriate pin */
113 *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<
114 (line * IXP4XX_GPIO_STYLE_SIZE));
115
116 /* Set the new style */
117 *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
118 }
119
120 *IXP4XX_GPIO_GPOER = enable;
121}
122
123EXPORT_SYMBOL(gpio_line_config);
124
125/************************************************************************* 41/*************************************************************************
126 * IXP4xx chipset I/O mapping 42 * IXP4xx chipset I/O mapping
127 *************************************************************************/ 43 *************************************************************************/
@@ -165,6 +81,69 @@ void __init ixp4xx_map_io(void)
165 * (be it PCI or something else) configures that GPIO line 81 * (be it PCI or something else) configures that GPIO line
166 * as an IRQ. 82 * as an IRQ.
167 **************************************************************************/ 83 **************************************************************************/
84enum ixp4xx_irq_type {
85 IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE
86};
87
88static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type);
89
90/*
91 * IRQ -> GPIO mapping table
92 */
93static int irq2gpio[32] = {
94 -1, -1, -1, -1, -1, -1, 0, 1,
95 -1, -1, -1, -1, -1, -1, -1, -1,
96 -1, -1, -1, 2, 3, 4, 5, 6,
97 7, 8, 9, 10, 11, 12, -1, -1,
98};
99
100static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
101{
102 int line = irq2gpio[irq];
103 u32 int_style;
104 enum ixp4xx_irq_type irq_type;
105 volatile u32 *int_reg;
106
107 /*
108 * Only for GPIO IRQs
109 */
110 if (line < 0)
111 return -EINVAL;
112
113 if (type & IRQT_BOTHEDGE) {
114 int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
115 irq_type = IXP4XX_IRQ_EDGE;
116 } else if (type & IRQT_RISING) {
117 int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
118 irq_type = IXP4XX_IRQ_EDGE;
119 } else if (type & IRQT_FALLING) {
120 int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
121 irq_type = IXP4XX_IRQ_EDGE;
122 } else if (type & IRQT_HIGH) {
123 int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
124 irq_type = IXP4XX_IRQ_LEVEL;
125 } else if (type & IRQT_LOW) {
126 int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
127 irq_type = IXP4XX_IRQ_LEVEL;
128 }
129
130 ixp4xx_config_irq(irq, irq_type);
131
132 if (line >= 8) { /* pins 8-15 */
133 line -= 8;
134 int_reg = IXP4XX_GPIO_GPIT2R;
135 } else { /* pins 0-7 */
136 int_reg = IXP4XX_GPIO_GPIT1R;
137 }
138
139 /* Clear the style for the appropriate pin */
140 *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<
141 (line * IXP4XX_GPIO_STYLE_SIZE));
142
143 /* Set the new style */
144 *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
145}
146
168static void ixp4xx_irq_mask(unsigned int irq) 147static void ixp4xx_irq_mask(unsigned int irq)
169{ 148{
170 if (cpu_is_ixp46x() && irq >= 32) 149 if (cpu_is_ixp46x() && irq >= 32)
@@ -183,12 +162,6 @@ static void ixp4xx_irq_unmask(unsigned int irq)
183 162
184static void ixp4xx_irq_ack(unsigned int irq) 163static void ixp4xx_irq_ack(unsigned int irq)
185{ 164{
186 static int irq2gpio[32] = {
187 -1, -1, -1, -1, -1, -1, 0, 1,
188 -1, -1, -1, -1, -1, -1, -1, -1,
189 -1, -1, -1, 2, 3, 4, 5, 6,
190 7, 8, 9, 10, 11, 12, -1, -1,
191 };
192 int line = (irq < 32) ? irq2gpio[irq] : -1; 165 int line = (irq < 32) ? irq2gpio[irq] : -1;
193 166
194 if (line >= 0) 167 if (line >= 0)
@@ -209,12 +182,14 @@ static struct irqchip ixp4xx_irq_level_chip = {
209 .ack = ixp4xx_irq_mask, 182 .ack = ixp4xx_irq_mask,
210 .mask = ixp4xx_irq_mask, 183 .mask = ixp4xx_irq_mask,
211 .unmask = ixp4xx_irq_level_unmask, 184 .unmask = ixp4xx_irq_level_unmask,
185 .type = ixp4xx_set_irq_type
212}; 186};
213 187
214static struct irqchip ixp4xx_irq_edge_chip = { 188static struct irqchip ixp4xx_irq_edge_chip = {
215 .ack = ixp4xx_irq_ack, 189 .ack = ixp4xx_irq_ack,
216 .mask = ixp4xx_irq_mask, 190 .mask = ixp4xx_irq_mask,
217 .unmask = ixp4xx_irq_unmask, 191 .unmask = ixp4xx_irq_unmask,
192 .type = ixp4xx_set_irq_type
218}; 193};
219 194
220static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type) 195static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type)
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index afafb42ae129..60de8a94cff5 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -30,11 +30,8 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
30 30
31void __init coyote_pci_preinit(void) 31void __init coyote_pci_preinit(void)
32{ 32{
33 gpio_line_config(COYOTE_PCI_SLOT0_PIN, 33 set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
34 IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); 34 set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW);
35
36 gpio_line_config(COYOTE_PCI_SLOT1_PIN,
37 IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
38 35
39 gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN); 36 gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN);
40 gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN); 37 gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN);
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 411ea9996190..8b2f25322452 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -24,11 +24,6 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/flash.h> 25#include <asm/mach/flash.h>
26 26
27void __init coyote_map_io(void)
28{
29 ixp4xx_map_io();
30}
31
32static struct flash_platform_data coyote_flash_data = { 27static struct flash_platform_data coyote_flash_data = {
33 .map_name = "cfi_probe", 28 .map_name = "cfi_probe",
34 .width = 2, 29 .width = 2,
@@ -107,7 +102,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
107 .phys_ram = PHYS_OFFSET, 102 .phys_ram = PHYS_OFFSET,
108 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, 103 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
109 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, 104 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
110 .map_io = coyote_map_io, 105 .map_io = ixp4xx_map_io,
111 .init_irq = ixp4xx_init_irq, 106 .init_irq = ixp4xx_init_irq,
112 .timer = &ixp4xx_timer, 107 .timer = &ixp4xx_timer,
113 .boot_params = 0x0100, 108 .boot_params = 0x0100,
@@ -125,7 +120,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
125 .phys_ram = PHYS_OFFSET, 120 .phys_ram = PHYS_OFFSET,
126 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, 121 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
127 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, 122 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
128 .map_io = coyote_map_io, 123 .map_io = ixp4xx_map_io,
129 .init_irq = ixp4xx_init_irq, 124 .init_irq = ixp4xx_init_irq,
130 .timer = &ixp4xx_timer, 125 .timer = &ixp4xx_timer,
131 .boot_params = 0x0100, 126 .boot_params = 0x0100,
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index b18035824e3e..a66484b63d36 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -35,26 +35,20 @@ extern void ixp4xx_pci_preinit(void);
35extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 35extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
36extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); 36extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
37 37
38 /*
39 * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h
40 * Slot 0 isn't actually populated with a card connector but
41 * we initialize it anyway in case a future version has the
42 * slot populated or someone with good soldering skills has
43 * some free time.
44 */
45
46
47static void gtwx5715_init_gpio(u8 pin, u32 style)
48{
49 gpio_line_config(pin, style | IXP4XX_GPIO_ACTIVE_LOW);
50
51 if (style & IXP4XX_GPIO_IN) gpio_line_isr_clear(pin);
52}
53 38
39/*
40 * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h
41 * Slot 0 isn't actually populated with a card connector but
42 * we initialize it anyway in case a future version has the
43 * slot populated or someone with good soldering skills has
44 * some free time.
45 */
54void __init gtwx5715_pci_preinit(void) 46void __init gtwx5715_pci_preinit(void)
55{ 47{
56 gtwx5715_init_gpio(GTWX5715_PCI_SLOT0_INTA_GPIO, IXP4XX_GPIO_IN); 48 set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQT_LOW);
57 gtwx5715_init_gpio(GTWX5715_PCI_SLOT1_INTA_GPIO, IXP4XX_GPIO_IN); 49 set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQT_LOW);
50 set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQT_LOW);
51 set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQT_LOW);
58 52
59 ixp4xx_pci_preinit(); 53 ixp4xx_pci_preinit();
60} 54}
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index 333459d6aa46..3fd92c5cbaa8 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -101,12 +101,6 @@ static struct platform_device gtwx5715_uart_device = {
101 .resource = gtwx5715_uart_resources, 101 .resource = gtwx5715_uart_resources,
102}; 102};
103 103
104
105void __init gtwx5715_map_io(void)
106{
107 ixp4xx_map_io();
108}
109
110static struct flash_platform_data gtwx5715_flash_data = { 104static struct flash_platform_data gtwx5715_flash_data = {
111 .map_name = "cfi_probe", 105 .map_name = "cfi_probe",
112 .width = 2, 106 .width = 2,
@@ -144,7 +138,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
144 .phys_ram = PHYS_OFFSET, 138 .phys_ram = PHYS_OFFSET,
145 .phys_io = IXP4XX_UART2_BASE_PHYS, 139 .phys_io = IXP4XX_UART2_BASE_PHYS,
146 .io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc, 140 .io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc,
147 .map_io = gtwx5715_map_io, 141 .map_io = ixp4xx_map_io,
148 .init_irq = ixp4xx_init_irq, 142 .init_irq = ixp4xx_init_irq,
149 .timer = &ixp4xx_timer, 143 .timer = &ixp4xx_timer,
150 .boot_params = 0x0100, 144 .boot_params = 0x0100,
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index c2ab9ebb5980..f9a1d3e7d692 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -27,14 +27,10 @@
27 27
28void __init ixdp425_pci_preinit(void) 28void __init ixdp425_pci_preinit(void)
29{ 29{
30 gpio_line_config(IXDP425_PCI_INTA_PIN, 30 set_irq_type(IRQ_IXDP425_PCI_INTA, IRQT_LOW);
31 IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); 31 set_irq_type(IRQ_IXDP425_PCI_INTB, IRQT_LOW);
32 gpio_line_config(IXDP425_PCI_INTB_PIN, 32 set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW);
33 IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); 33 set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW);
34 gpio_line_config(IXDP425_PCI_INTC_PIN,
35 IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
36 gpio_line_config(IXDP425_PCI_INTD_PIN,
37 IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
38 34
39 gpio_line_isr_clear(IXDP425_PCI_INTA_PIN); 35 gpio_line_isr_clear(IXDP425_PCI_INTA_PIN);
40 gpio_line_isr_clear(IXDP425_PCI_INTB_PIN); 36 gpio_line_isr_clear(IXDP425_PCI_INTB_PIN);
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index fa0646c8693b..6c14ff3c23a0 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -24,11 +24,6 @@
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/flash.h> 25#include <asm/mach/flash.h>
26 26
27void __init ixdp425_map_io(void)
28{
29 ixp4xx_map_io();
30}
31
32static struct flash_platform_data ixdp425_flash_data = { 27static struct flash_platform_data ixdp425_flash_data = {
33 .map_name = "cfi_probe", 28 .map_name = "cfi_probe",
34 .width = 2, 29 .width = 2,
@@ -133,7 +128,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
133 .phys_ram = PHYS_OFFSET, 128 .phys_ram = PHYS_OFFSET,
134 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, 129 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
135 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, 130 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
136 .map_io = ixdp425_map_io, 131 .map_io = ixp4xx_map_io,
137 .init_irq = ixp4xx_init_irq, 132 .init_irq = ixp4xx_init_irq,
138 .timer = &ixp4xx_timer, 133 .timer = &ixp4xx_timer,
139 .boot_params = 0x0100, 134 .boot_params = 0x0100,
@@ -145,7 +140,7 @@ MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
145 .phys_ram = PHYS_OFFSET, 140 .phys_ram = PHYS_OFFSET,
146 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, 141 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
147 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, 142 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
148 .map_io = ixdp425_map_io, 143 .map_io = ixp4xx_map_io,
149 .init_irq = ixp4xx_init_irq, 144 .init_irq = ixp4xx_init_irq,
150 .timer = &ixp4xx_timer, 145 .timer = &ixp4xx_timer,
151 .boot_params = 0x0100, 146 .boot_params = 0x0100,
@@ -157,7 +152,7 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
157 .phys_ram = PHYS_OFFSET, 152 .phys_ram = PHYS_OFFSET,
158 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, 153 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
159 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, 154 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
160 .map_io = ixdp425_map_io, 155 .map_io = ixp4xx_map_io,
161 .init_irq = ixp4xx_init_irq, 156 .init_irq = ixp4xx_init_irq,
162 .timer = &ixp4xx_timer, 157 .timer = &ixp4xx_timer,
163 .boot_params = 0x0100, 158 .boot_params = 0x0100,
@@ -176,7 +171,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
176 .phys_ram = PHYS_OFFSET, 171 .phys_ram = PHYS_OFFSET,
177 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, 172 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
178 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, 173 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
179 .map_io = ixdp425_map_io, 174 .map_io = ixp4xx_map_io,
180 .init_irq = ixp4xx_init_irq, 175 .init_irq = ixp4xx_init_irq,
181 .timer = &ixp4xx_timer, 176 .timer = &ixp4xx_timer,
182 .boot_params = 0x0100, 177 .boot_params = 0x0100,
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index ce4563f00676..fe5e7660de1d 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -29,8 +29,8 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
29 29
30void __init ixdpg425_pci_preinit(void) 30void __init ixdpg425_pci_preinit(void)
31{ 31{
32 gpio_line_config(6, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); 32 set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
33 gpio_line_config(7, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW); 33 set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW);
34 34
35 gpio_line_isr_clear(6); 35 gpio_line_isr_clear(6);
36 gpio_line_isr_clear(7); 36 gpio_line_isr_clear(7);
diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h
index beda7c2602fb..578a52461fdb 100644
--- a/arch/arm/mach-lh7a40x/common.h
+++ b/arch/arm/mach-lh7a40x/common.h
@@ -13,4 +13,4 @@ extern struct sys_timer lh7a40x_timer;
13extern void lh7a400_init_irq (void); 13extern void lh7a400_init_irq (void);
14extern void lh7a404_init_irq (void); 14extern void lh7a404_init_irq (void);
15 15
16#define IRQ_DISPATCH(irq) irq_desc[irq].handle ((irq), &irq_desc[irq], regs) 16#define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq), regs)
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 7c08f6c2e1d0..c12a78335625 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -102,7 +102,7 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc,
102 fpga_irq++, stat >>= 1) { 102 fpga_irq++, stat >>= 1) {
103 if (stat & 1) { 103 if (stat & 1) {
104 d = irq_desc + fpga_irq; 104 d = irq_desc + fpga_irq;
105 d->handle(fpga_irq, d, regs); 105 desc_handle_irq(fpga_irq, d, regs);
106 } 106 }
107 } 107 }
108} 108}
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index f3cac43124a5..539b596005fc 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -133,7 +133,7 @@ static struct irqchip pxa_low_gpio_chip = {
133 .ack = pxa_ack_low_gpio, 133 .ack = pxa_ack_low_gpio,
134 .mask = pxa_mask_low_irq, 134 .mask = pxa_mask_low_irq,
135 .unmask = pxa_unmask_low_irq, 135 .unmask = pxa_unmask_low_irq,
136 .type = pxa_gpio_irq_type, 136 .set_type = pxa_gpio_irq_type,
137}; 137};
138 138
139/* 139/*
@@ -157,7 +157,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
157 mask >>= 2; 157 mask >>= 2;
158 do { 158 do {
159 if (mask & 1) 159 if (mask & 1)
160 desc->handle(irq, desc, regs); 160 desc_handle_irq(irq, desc, regs);
161 irq++; 161 irq++;
162 desc++; 162 desc++;
163 mask >>= 1; 163 mask >>= 1;
@@ -172,7 +172,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
172 desc = irq_desc + irq; 172 desc = irq_desc + irq;
173 do { 173 do {
174 if (mask & 1) 174 if (mask & 1)
175 desc->handle(irq, desc, regs); 175 desc_handle_irq(irq, desc, regs);
176 irq++; 176 irq++;
177 desc++; 177 desc++;
178 mask >>= 1; 178 mask >>= 1;
@@ -187,7 +187,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
187 desc = irq_desc + irq; 187 desc = irq_desc + irq;
188 do { 188 do {
189 if (mask & 1) 189 if (mask & 1)
190 desc->handle(irq, desc, regs); 190 desc_handle_irq(irq, desc, regs);
191 irq++; 191 irq++;
192 desc++; 192 desc++;
193 mask >>= 1; 193 mask >>= 1;
@@ -203,7 +203,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
203 desc = irq_desc + irq; 203 desc = irq_desc + irq;
204 do { 204 do {
205 if (mask & 1) 205 if (mask & 1)
206 desc->handle(irq, desc, regs); 206 desc_handle_irq(irq, desc, regs);
207 irq++; 207 irq++;
208 desc++; 208 desc++;
209 mask >>= 1; 209 mask >>= 1;
@@ -241,7 +241,7 @@ static struct irqchip pxa_muxed_gpio_chip = {
241 .ack = pxa_ack_muxed_gpio, 241 .ack = pxa_ack_muxed_gpio,
242 .mask = pxa_mask_muxed_gpio, 242 .mask = pxa_mask_muxed_gpio,
243 .unmask = pxa_unmask_muxed_gpio, 243 .unmask = pxa_unmask_muxed_gpio,
244 .type = pxa_gpio_irq_type, 244 .set_type = pxa_gpio_irq_type,
245}; 245};
246 246
247 247
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 6309853b59be..923f6eb774c0 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -84,7 +84,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc,
84 if (likely(pending)) { 84 if (likely(pending)) {
85 irq = LUBBOCK_IRQ(0) + __ffs(pending); 85 irq = LUBBOCK_IRQ(0) + __ffs(pending);
86 desc = irq_desc + irq; 86 desc = irq_desc + irq;
87 desc->handle(irq, desc, regs); 87 desc_handle_irq(irq, desc, regs);
88 } 88 }
89 pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; 89 pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
90 } while (pending); 90 } while (pending);
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 827b7b5a5be8..85fdb5b1470a 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -72,7 +72,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
72 if (likely(pending)) { 72 if (likely(pending)) {
73 irq = MAINSTONE_IRQ(0) + __ffs(pending); 73 irq = MAINSTONE_IRQ(0) + __ffs(pending);
74 desc = irq_desc + irq; 74 desc = irq_desc + irq;
75 desc->handle(irq, desc, regs); 75 desc_handle_irq(irq, desc, regs);
76 } 76 }
77 pending = MST_INTSETCLR & mainstone_irq_enabled; 77 pending = MST_INTSETCLR & mainstone_irq_enabled;
78 } while (pending); 78 } while (pending);
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 6e5202154f91..7dad3f1465e0 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -70,6 +70,11 @@ static unsigned long pxa_gettimeoffset (void)
70 return usec; 70 return usec;
71} 71}
72 72
73#ifdef CONFIG_NO_IDLE_HZ
74static unsigned long initial_match;
75static int match_posponed;
76#endif
77
73static irqreturn_t 78static irqreturn_t
74pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 79pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
75{ 80{
@@ -77,11 +82,19 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
77 82
78 write_seqlock(&xtime_lock); 83 write_seqlock(&xtime_lock);
79 84
85#ifdef CONFIG_NO_IDLE_HZ
86 if (match_posponed) {
87 match_posponed = 0;
88 OSMR0 = initial_match;
89 }
90#endif
91
80 /* Loop until we get ahead of the free running timer. 92 /* Loop until we get ahead of the free running timer.
81 * This ensures an exact clock tick count and time accuracy. 93 * This ensures an exact clock tick count and time accuracy.
82 * IRQs are disabled inside the loop to ensure coherence between 94 * Since IRQs are disabled at this point, coherence between
83 * lost_ticks (updated in do_timer()) and the match reg value, so we 95 * lost_ticks(updated in do_timer()) and the match reg value is
84 * can use do_gettimeofday() from interrupt handlers. 96 * ensured, hence we can use do_gettimeofday() from interrupt
97 * handlers.
85 * 98 *
86 * HACK ALERT: it seems that the PXA timer regs aren't updated right 99 * HACK ALERT: it seems that the PXA timer regs aren't updated right
87 * away in all cases when a write occurs. We therefore compare with 100 * away in all cases when a write occurs. We therefore compare with
@@ -126,6 +139,42 @@ static void __init pxa_timer_init(void)
126 OSCR = 0; /* initialize free-running timer, force first match */ 139 OSCR = 0; /* initialize free-running timer, force first match */
127} 140}
128 141
142#ifdef CONFIG_NO_IDLE_HZ
143static int pxa_dyn_tick_enable_disable(void)
144{
145 /* nothing to do */
146 return 0;
147}
148
149static void pxa_dyn_tick_reprogram(unsigned long ticks)
150{
151 if (ticks > 1) {
152 initial_match = OSMR0;
153 OSMR0 = initial_match + ticks * LATCH;
154 match_posponed = 1;
155 }
156}
157
158static irqreturn_t
159pxa_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs)
160{
161 if (match_posponed) {
162 match_posponed = 0;
163 OSMR0 = initial_match;
164 if ( (signed long)(initial_match - OSCR) <= 8 )
165 return pxa_timer_interrupt(irq, dev_id, regs);
166 }
167 return IRQ_NONE;
168}
169
170static struct dyn_tick_timer pxa_dyn_tick = {
171 .enable = pxa_dyn_tick_enable_disable,
172 .disable = pxa_dyn_tick_enable_disable,
173 .reprogram = pxa_dyn_tick_reprogram,
174 .handler = pxa_dyn_tick_handler,
175};
176#endif
177
129#ifdef CONFIG_PM 178#ifdef CONFIG_PM
130static unsigned long osmr[4], oier; 179static unsigned long osmr[4], oier;
131 180
@@ -161,4 +210,7 @@ struct sys_timer pxa_timer = {
161 .suspend = pxa_timer_suspend, 210 .suspend = pxa_timer_suspend,
162 .resume = pxa_timer_resume, 211 .resume = pxa_timer_resume,
163 .offset = pxa_gettimeoffset, 212 .offset = pxa_gettimeoffset,
213#ifdef CONFIG_NO_IDLE_HZ
214 .dyn_tick = &pxa_dyn_tick,
215#endif
164}; 216};
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 5e5bbe893cbb..49914709fa09 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -124,7 +124,7 @@ bast_irq_pc104_demux(unsigned int irq,
124 irqno = bast_pc104_irqs[i]; 124 irqno = bast_pc104_irqs[i];
125 desc = irq_desc + irqno; 125 desc = irq_desc + irqno;
126 126
127 desc->handle(irqno, desc, regs); 127 desc_handle_irq(irqno, desc, regs);
128 } 128 }
129 129
130 stat >>= 1; 130 stat >>= 1;
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 9a66050e887d..f59608268751 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -388,6 +388,7 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
388 unsigned long hclk, 388 unsigned long hclk,
389 unsigned long pclk) 389 unsigned long pclk)
390{ 390{
391 unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
391 struct clk *clkp = init_clocks; 392 struct clk *clkp = init_clocks;
392 int ptr; 393 int ptr;
393 int ret; 394 int ret;
@@ -446,5 +447,13 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
446 } 447 }
447 } 448 }
448 449
450 /* show the clock-slow value */
451
452 printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n",
453 print_mhz(xtal / ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))),
454 (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast",
455 (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
456 (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
457
449 return 0; 458 return 0;
450} 459}
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index 973a5fe6769c..66d8c068e940 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -184,14 +184,14 @@ struct irqchip s3c_irq_level_chip = {
184 .ack = s3c_irq_maskack, 184 .ack = s3c_irq_maskack,
185 .mask = s3c_irq_mask, 185 .mask = s3c_irq_mask,
186 .unmask = s3c_irq_unmask, 186 .unmask = s3c_irq_unmask,
187 .wake = s3c_irq_wake 187 .set_wake = s3c_irq_wake
188}; 188};
189 189
190static struct irqchip s3c_irq_chip = { 190static struct irqchip s3c_irq_chip = {
191 .ack = s3c_irq_ack, 191 .ack = s3c_irq_ack,
192 .mask = s3c_irq_mask, 192 .mask = s3c_irq_mask,
193 .unmask = s3c_irq_unmask, 193 .unmask = s3c_irq_unmask,
194 .wake = s3c_irq_wake 194 .set_wake = s3c_irq_wake
195}; 195};
196 196
197/* S3C2410_EINTMASK 197/* S3C2410_EINTMASK
@@ -350,16 +350,16 @@ static struct irqchip s3c_irqext_chip = {
350 .mask = s3c_irqext_mask, 350 .mask = s3c_irqext_mask,
351 .unmask = s3c_irqext_unmask, 351 .unmask = s3c_irqext_unmask,
352 .ack = s3c_irqext_ack, 352 .ack = s3c_irqext_ack,
353 .type = s3c_irqext_type, 353 .set_type = s3c_irqext_type,
354 .wake = s3c_irqext_wake 354 .set_wake = s3c_irqext_wake
355}; 355};
356 356
357static struct irqchip s3c_irq_eint0t4 = { 357static struct irqchip s3c_irq_eint0t4 = {
358 .ack = s3c_irq_ack, 358 .ack = s3c_irq_ack,
359 .mask = s3c_irq_mask, 359 .mask = s3c_irq_mask,
360 .unmask = s3c_irq_unmask, 360 .unmask = s3c_irq_unmask,
361 .wake = s3c_irq_wake, 361 .set_wake = s3c_irq_wake,
362 .type = s3c_irqext_type, 362 .set_type = s3c_irqext_type,
363}; 363};
364 364
365/* mask values for the parent registers for each of the interrupt types */ 365/* mask values for the parent registers for each of the interrupt types */
@@ -496,11 +496,11 @@ static void s3c_irq_demux_adc(unsigned int irq,
496 if (subsrc != 0) { 496 if (subsrc != 0) {
497 if (subsrc & 1) { 497 if (subsrc & 1) {
498 mydesc = irq_desc + IRQ_TC; 498 mydesc = irq_desc + IRQ_TC;
499 mydesc->handle( IRQ_TC, mydesc, regs); 499 desc_handle_irq(IRQ_TC, mydesc, regs);
500 } 500 }
501 if (subsrc & 2) { 501 if (subsrc & 2) {
502 mydesc = irq_desc + IRQ_ADC; 502 mydesc = irq_desc + IRQ_ADC;
503 mydesc->handle(IRQ_ADC, mydesc, regs); 503 desc_handle_irq(IRQ_ADC, mydesc, regs);
504 } 504 }
505 } 505 }
506} 506}
@@ -529,17 +529,17 @@ static void s3c_irq_demux_uart(unsigned int start,
529 desc = irq_desc + start; 529 desc = irq_desc + start;
530 530
531 if (subsrc & 1) 531 if (subsrc & 1)
532 desc->handle(start, desc, regs); 532 desc_handle_irq(start, desc, regs);
533 533
534 desc++; 534 desc++;
535 535
536 if (subsrc & 2) 536 if (subsrc & 2)
537 desc->handle(start+1, desc, regs); 537 desc_handle_irq(start+1, desc, regs);
538 538
539 desc++; 539 desc++;
540 540
541 if (subsrc & 4) 541 if (subsrc & 4)
542 desc->handle(start+2, desc, regs); 542 desc_handle_irq(start+2, desc, regs);
543 } 543 }
544} 544}
545 545
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 13a48ee77484..fe57d966a34d 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -585,14 +585,16 @@ static int s3c2410_pm_enter(suspend_state_t state)
585 585
586 s3c2410_pm_check_store(); 586 s3c2410_pm_check_store();
587 587
588 // need to make some form of time-delta
589
590 /* send the cpu to sleep... */ 588 /* send the cpu to sleep... */
591 589
592 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ 590 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
593 591
594 s3c2410_cpu_suspend(regs_save); 592 s3c2410_cpu_suspend(regs_save);
595 593
594 /* restore the cpu state */
595
596 cpu_init();
597
596 /* unset the return-from-sleep flag, to ensure reset */ 598 /* unset the return-from-sleep flag, to ensure reset */
597 599
598 tmp = __raw_readl(S3C2410_GSTATUS2); 600 tmp = __raw_readl(S3C2410_GSTATUS2);
diff --git a/arch/arm/mach-s3c2410/s3c2440-clock.c b/arch/arm/mach-s3c2410/s3c2440-clock.c
index b018a1f680ce..c67e0979aec3 100644
--- a/arch/arm/mach-s3c2410/s3c2440-clock.c
+++ b/arch/arm/mach-s3c2410/s3c2440-clock.c
@@ -68,6 +68,7 @@ static struct clk s3c2440_clk_ac97 = {
68static int s3c2440_clk_add(struct sys_device *sysdev) 68static int s3c2440_clk_add(struct sys_device *sysdev)
69{ 69{
70 unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); 70 unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
71 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
71 struct clk *clk_h; 72 struct clk *clk_h;
72 struct clk *clk_p; 73 struct clk *clk_p;
73 struct clk *clk_xtal; 74 struct clk *clk_xtal;
@@ -80,8 +81,9 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
80 81
81 s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate); 82 s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
82 83
83 printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n", 84 printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz, DVS %s\n",
84 print_mhz(s3c2440_clk_upll.rate)); 85 print_mhz(s3c2440_clk_upll.rate),
86 (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
85 87
86 clk_p = clk_get(NULL, "pclk"); 88 clk_p = clk_get(NULL, "pclk");
87 clk_h = clk_get(NULL, "hclk"); 89 clk_h = clk_get(NULL, "hclk");
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 7cb9912242a3..278d0044c85d 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -64,11 +64,11 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
64 if (subsrc != 0) { 64 if (subsrc != 0) {
65 if (subsrc & 1) { 65 if (subsrc & 1) {
66 mydesc = irq_desc + IRQ_S3C2440_WDT; 66 mydesc = irq_desc + IRQ_S3C2440_WDT;
67 mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs); 67 desc_handle_irq(IRQ_S3C2440_WDT, mydesc, regs);
68 } 68 }
69 if (subsrc & 2) { 69 if (subsrc & 2) {
70 mydesc = irq_desc + IRQ_S3C2440_AC97; 70 mydesc = irq_desc + IRQ_S3C2440_AC97;
71 mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs); 71 desc_handle_irq(IRQ_S3C2440_AC97, mydesc, regs);
72 } 72 }
73 } 73 }
74} 74}
@@ -122,11 +122,11 @@ static void s3c_irq_demux_cam(unsigned int irq,
122 if (subsrc != 0) { 122 if (subsrc != 0) {
123 if (subsrc & 1) { 123 if (subsrc & 1) {
124 mydesc = irq_desc + IRQ_S3C2440_CAM_C; 124 mydesc = irq_desc + IRQ_S3C2440_CAM_C;
125 mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs); 125 desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs);
126 } 126 }
127 if (subsrc & 2) { 127 if (subsrc & 2) {
128 mydesc = irq_desc + IRQ_S3C2440_CAM_P; 128 mydesc = irq_desc + IRQ_S3C2440_CAM_P;
129 mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs); 129 desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs);
130 } 130 }
131 } 131 }
132} 132}
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 66a929cb7bc5..c131a5201b5b 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -98,8 +98,8 @@ static struct irqchip sa1100_low_gpio_chip = {
98 .ack = sa1100_low_gpio_ack, 98 .ack = sa1100_low_gpio_ack,
99 .mask = sa1100_low_gpio_mask, 99 .mask = sa1100_low_gpio_mask,
100 .unmask = sa1100_low_gpio_unmask, 100 .unmask = sa1100_low_gpio_unmask,
101 .type = sa1100_gpio_type, 101 .set_type = sa1100_gpio_type,
102 .wake = sa1100_low_gpio_wake, 102 .set_wake = sa1100_low_gpio_wake,
103}; 103};
104 104
105/* 105/*
@@ -126,7 +126,7 @@ sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc,
126 mask >>= 11; 126 mask >>= 11;
127 do { 127 do {
128 if (mask & 1) 128 if (mask & 1)
129 desc->handle(irq, desc, regs); 129 desc_handle_irq(irq, desc, regs);
130 mask >>= 1; 130 mask >>= 1;
131 irq++; 131 irq++;
132 desc++; 132 desc++;
@@ -181,8 +181,8 @@ static struct irqchip sa1100_high_gpio_chip = {
181 .ack = sa1100_high_gpio_ack, 181 .ack = sa1100_high_gpio_ack,
182 .mask = sa1100_high_gpio_mask, 182 .mask = sa1100_high_gpio_mask,
183 .unmask = sa1100_high_gpio_unmask, 183 .unmask = sa1100_high_gpio_unmask,
184 .type = sa1100_gpio_type, 184 .set_type = sa1100_gpio_type,
185 .wake = sa1100_high_gpio_wake, 185 .set_wake = sa1100_high_gpio_wake,
186}; 186};
187 187
188/* 188/*
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 1405383463ea..fc061641b7be 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -61,12 +61,12 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
61 61
62 if (irr & IRR_ETHERNET) { 62 if (irr & IRR_ETHERNET) {
63 d = irq_desc + IRQ_NEPONSET_SMC9196; 63 d = irq_desc + IRQ_NEPONSET_SMC9196;
64 d->handle(IRQ_NEPONSET_SMC9196, d, regs); 64 desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs);
65 } 65 }
66 66
67 if (irr & IRR_USAR) { 67 if (irr & IRR_USAR) {
68 d = irq_desc + IRQ_NEPONSET_USAR; 68 d = irq_desc + IRQ_NEPONSET_USAR;
69 d->handle(IRQ_NEPONSET_USAR, d, regs); 69 desc_handle_irq(IRQ_NEPONSET_USAR, d, regs);
70 } 70 }
71 71
72 desc->chip->unmask(irq); 72 desc->chip->unmask(irq);
@@ -74,7 +74,7 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
74 74
75 if (irr & IRR_SA1111) { 75 if (irr & IRR_SA1111) {
76 d = irq_desc + IRQ_NEPONSET_SA1111; 76 d = irq_desc + IRQ_NEPONSET_SA1111;
77 d->handle(IRQ_NEPONSET_SA1111, d, regs); 77 desc_handle_irq(IRQ_NEPONSET_SA1111, d, regs);
78 } 78 }
79 } 79 }
80} 80}
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 0eeb3616ffea..47e0420623fc 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -70,15 +70,11 @@ static unsigned long sa1100_gettimeoffset (void)
70 return usec; 70 return usec;
71} 71}
72 72
73/* 73#ifdef CONFIG_NO_IDLE_HZ
74 * We will be entered with IRQs enabled. 74static unsigned long initial_match;
75 * 75static int match_posponed;
76 * Loop until we get ahead of the free running timer. 76#endif
77 * This ensures an exact clock tick count and time accuracy. 77
78 * IRQs are disabled inside the loop to ensure coherence between
79 * lost_ticks (updated in do_timer()) and the match reg value, so we
80 * can use do_gettimeofday() from interrupt handlers.
81 */
82static irqreturn_t 78static irqreturn_t
83sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 79sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
84{ 80{
@@ -86,6 +82,21 @@ sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
86 82
87 write_seqlock(&xtime_lock); 83 write_seqlock(&xtime_lock);
88 84
85#ifdef CONFIG_NO_IDLE_HZ
86 if (match_posponed) {
87 match_posponed = 0;
88 OSMR0 = initial_match;
89 }
90#endif
91
92 /*
93 * Loop until we get ahead of the free running timer.
94 * This ensures an exact clock tick count and time accuracy.
95 * Since IRQs are disabled at this point, coherence between
96 * lost_ticks(updated in do_timer()) and the match reg value is
97 * ensured, hence we can use do_gettimeofday() from interrupt
98 * handlers.
99 */
89 do { 100 do {
90 timer_tick(regs); 101 timer_tick(regs);
91 OSSR = OSSR_M0; /* Clear match on timer 0 */ 102 OSSR = OSSR_M0; /* Clear match on timer 0 */
@@ -120,6 +131,42 @@ static void __init sa1100_timer_init(void)
120 OSCR = 0; /* initialize free-running timer, force first match */ 131 OSCR = 0; /* initialize free-running timer, force first match */
121} 132}
122 133
134#ifdef CONFIG_NO_IDLE_HZ
135static int sa1100_dyn_tick_enable_disable(void)
136{
137 /* nothing to do */
138 return 0;
139}
140
141static void sa1100_dyn_tick_reprogram(unsigned long ticks)
142{
143 if (ticks > 1) {
144 initial_match = OSMR0;
145 OSMR0 = initial_match + ticks * LATCH;
146 match_posponed = 1;
147 }
148}
149
150static irqreturn_t
151sa1100_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs)
152{
153 if (match_posponed) {
154 match_posponed = 0;
155 OSMR0 = initial_match;
156 if ((signed long)(initial_match - OSCR) <= 0)
157 return sa1100_timer_interrupt(irq, dev_id, regs);
158 }
159 return IRQ_NONE;
160}
161
162static struct dyn_tick_timer sa1100_dyn_tick = {
163 .enable = sa1100_dyn_tick_enable_disable,
164 .disable = sa1100_dyn_tick_enable_disable,
165 .reprogram = sa1100_dyn_tick_reprogram,
166 .handler = sa1100_dyn_tick_handler,
167};
168#endif
169
123#ifdef CONFIG_PM 170#ifdef CONFIG_PM
124unsigned long osmr[4], oier; 171unsigned long osmr[4], oier;
125 172
@@ -156,4 +203,7 @@ struct sys_timer sa1100_timer = {
156 .suspend = sa1100_timer_suspend, 203 .suspend = sa1100_timer_suspend,
157 .resume = sa1100_timer_resume, 204 .resume = sa1100_timer_resume,
158 .offset = sa1100_gettimeoffset, 205 .offset = sa1100_gettimeoffset,
206#ifdef CONFIG_NO_IDLE_HZ
207 .dyn_tick = &sa1100_dyn_tick,
208#endif
159}; 209};
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index f01c0f8a2bb3..3c8862fde51a 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -108,7 +108,7 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
108 irq += IRQ_SIC_START; 108 irq += IRQ_SIC_START;
109 109
110 desc = irq_desc + irq; 110 desc = irq_desc + irq;
111 desc->handle(irq, desc, regs); 111 desc_handle_irq(irq, desc, regs);
112 } while (status); 112 } while (status);
113} 113}
114 114
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 81f4a8a2d34b..4b39d867ac14 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -45,7 +45,7 @@
45 45
46#define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0) 46#define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
47 47
48#define LDSTH_I_BIT(i) (i & (1 << 22)) /* half-word immed */ 48#define LDSTHD_I_BIT(i) (i & (1 << 22)) /* double/half-word immed */
49#define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */ 49#define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */
50 50
51#define RN_BITS(i) ((i >> 16) & 15) /* Rn */ 51#define RN_BITS(i) ((i >> 16) & 15) /* Rn */
@@ -68,6 +68,7 @@ static unsigned long ai_sys;
68static unsigned long ai_skipped; 68static unsigned long ai_skipped;
69static unsigned long ai_half; 69static unsigned long ai_half;
70static unsigned long ai_word; 70static unsigned long ai_word;
71static unsigned long ai_dword;
71static unsigned long ai_multi; 72static unsigned long ai_multi;
72static int ai_usermode; 73static int ai_usermode;
73 74
@@ -93,6 +94,8 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
93 p += sprintf(p, "Skipped:\t%lu\n", ai_skipped); 94 p += sprintf(p, "Skipped:\t%lu\n", ai_skipped);
94 p += sprintf(p, "Half:\t\t%lu\n", ai_half); 95 p += sprintf(p, "Half:\t\t%lu\n", ai_half);
95 p += sprintf(p, "Word:\t\t%lu\n", ai_word); 96 p += sprintf(p, "Word:\t\t%lu\n", ai_word);
97 if (cpu_architecture() >= CPU_ARCH_ARMv5TE)
98 p += sprintf(p, "DWord:\t\t%lu\n", ai_dword);
96 p += sprintf(p, "Multi:\t\t%lu\n", ai_multi); 99 p += sprintf(p, "Multi:\t\t%lu\n", ai_multi);
97 p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode, 100 p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode,
98 usermode_action[ai_usermode]); 101 usermode_action[ai_usermode]);
@@ -283,12 +286,6 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
283{ 286{
284 unsigned int rd = RD_BITS(instr); 287 unsigned int rd = RD_BITS(instr);
285 288
286 if ((instr & 0x01f00ff0) == 0x01000090)
287 goto swp;
288
289 if ((instr & 0x90) != 0x90 || (instr & 0x60) == 0)
290 goto bad;
291
292 ai_half += 1; 289 ai_half += 1;
293 290
294 if (user_mode(regs)) 291 if (user_mode(regs))
@@ -323,10 +320,47 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
323 320
324 return TYPE_LDST; 321 return TYPE_LDST;
325 322
326 swp: 323 fault:
327 printk(KERN_ERR "Alignment trap: not handling swp instruction\n"); 324 return TYPE_FAULT;
328 bad: 325}
329 return TYPE_ERROR; 326
327static int
328do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
329 struct pt_regs *regs)
330{
331 unsigned int rd = RD_BITS(instr);
332
333 ai_dword += 1;
334
335 if (user_mode(regs))
336 goto user;
337
338 if ((instr & 0xf0) == 0xd0) {
339 unsigned long val;
340 get32_unaligned_check(val, addr);
341 regs->uregs[rd] = val;
342 get32_unaligned_check(val, addr+4);
343 regs->uregs[rd+1] = val;
344 } else {
345 put32_unaligned_check(regs->uregs[rd], addr);
346 put32_unaligned_check(regs->uregs[rd+1], addr+4);
347 }
348
349 return TYPE_LDST;
350
351 user:
352 if ((instr & 0xf0) == 0xd0) {
353 unsigned long val;
354 get32t_unaligned_check(val, addr);
355 regs->uregs[rd] = val;
356 get32t_unaligned_check(val, addr+4);
357 regs->uregs[rd+1] = val;
358 } else {
359 put32t_unaligned_check(regs->uregs[rd], addr);
360 put32t_unaligned_check(regs->uregs[rd+1], addr+4);
361 }
362
363 return TYPE_LDST;
330 364
331 fault: 365 fault:
332 return TYPE_FAULT; 366 return TYPE_FAULT;
@@ -617,12 +651,20 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
617 regs->ARM_pc += thumb_mode(regs) ? 2 : 4; 651 regs->ARM_pc += thumb_mode(regs) ? 2 : 4;
618 652
619 switch (CODING_BITS(instr)) { 653 switch (CODING_BITS(instr)) {
620 case 0x00000000: /* ldrh or strh */ 654 case 0x00000000: /* 3.13.4 load/store instruction extensions */
621 if (LDSTH_I_BIT(instr)) 655 if (LDSTHD_I_BIT(instr))
622 offset.un = (instr & 0xf00) >> 4 | (instr & 15); 656 offset.un = (instr & 0xf00) >> 4 | (instr & 15);
623 else 657 else
624 offset.un = regs->uregs[RM_BITS(instr)]; 658 offset.un = regs->uregs[RM_BITS(instr)];
625 handler = do_alignment_ldrhstrh; 659
660 if ((instr & 0x000000f0) == 0x000000b0 || /* LDRH, STRH */
661 (instr & 0x001000f0) == 0x001000f0) /* LDRSH */
662 handler = do_alignment_ldrhstrh;
663 else if ((instr & 0x001000f0) == 0x000000d0 || /* LDRD */
664 (instr & 0x001000f0) == 0x000000f0) /* STRD */
665 handler = do_alignment_ldrdstrd;
666 else
667 goto bad;
626 break; 668 break;
627 669
628 case 0x04000000: /* ldr or str immediate */ 670 case 0x04000000: /* ldr or str immediate */
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 3c655c54e231..d125a3dc061c 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -275,11 +275,9 @@ alloc_init_supersection(unsigned long virt, unsigned long phys, int prot)
275 int i; 275 int i;
276 276
277 for (i = 0; i < 16; i += 1) { 277 for (i = 0; i < 16; i += 1) {
278 alloc_init_section(virt, phys & SUPERSECTION_MASK, 278 alloc_init_section(virt, phys, prot | PMD_SECT_SUPER);
279 prot | PMD_SECT_SUPER);
280 279
281 virt += (PGDIR_SIZE / 2); 280 virt += (PGDIR_SIZE / 2);
282 phys += (PGDIR_SIZE / 2);
283 } 281 }
284} 282}
285 283
@@ -297,14 +295,10 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
297 pte_t *ptep; 295 pte_t *ptep;
298 296
299 if (pmd_none(*pmdp)) { 297 if (pmd_none(*pmdp)) {
300 unsigned long pmdval;
301 ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE * 298 ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE *
302 sizeof(pte_t)); 299 sizeof(pte_t));
303 300
304 pmdval = __pa(ptep) | prot_l1; 301 __pmd_populate(pmdp, __pa(ptep) | prot_l1);
305 pmdp[0] = __pmd(pmdval);
306 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
307 flush_pmd_entry(pmdp);
308 } 302 }
309 ptep = pte_offset_kernel(pmdp, virt); 303 ptep = pte_offset_kernel(pmdp, virt);
310 304
@@ -459,7 +453,7 @@ static void __init build_mem_type_table(void)
459 453
460 for (i = 0; i < 16; i++) { 454 for (i = 0; i < 16; i++) {
461 unsigned long v = pgprot_val(protection_map[i]); 455 unsigned long v = pgprot_val(protection_map[i]);
462 v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot; 456 v = (v & ~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot;
463 protection_map[i] = __pgprot(v); 457 protection_map[i] = __pgprot(v);
464 } 458 }
465 459
@@ -583,23 +577,23 @@ static void __init create_mapping(struct map_desc *md)
583 */ 577 */
584void setup_mm_for_reboot(char mode) 578void setup_mm_for_reboot(char mode)
585{ 579{
586 unsigned long pmdval; 580 unsigned long base_pmdval;
587 pgd_t *pgd; 581 pgd_t *pgd;
588 pmd_t *pmd;
589 int i; 582 int i;
590 int cpu_arch = cpu_architecture();
591 583
592 if (current->mm && current->mm->pgd) 584 if (current->mm && current->mm->pgd)
593 pgd = current->mm->pgd; 585 pgd = current->mm->pgd;
594 else 586 else
595 pgd = init_mm.pgd; 587 pgd = init_mm.pgd;
596 588
597 for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++) { 589 base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
598 pmdval = (i << PGDIR_SHIFT) | 590 if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
599 PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | 591 base_pmdval |= PMD_BIT4;
600 PMD_TYPE_SECT; 592
601 if (cpu_arch <= CPU_ARCH_ARMv5TEJ) 593 for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
602 pmdval |= PMD_BIT4; 594 unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval;
595 pmd_t *pmd;
596
603 pmd = pmd_off(pgd, i << PGDIR_SHIFT); 597 pmd = pmd_off(pgd, i << PGDIR_SHIFT);
604 pmd[0] = __pmd(pmdval); 598 pmd[0] = __pmd(pmdval);
605 pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))); 599 pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 0ee214b824ff..189ef6a71ba1 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -38,8 +38,8 @@ ENTRY(cpu_arm7_data_abort)
38 mrc p15, 0, r1, c5, c0, 0 @ get FSR 38 mrc p15, 0, r1, c5, c0, 0 @ get FSR
39 mrc p15, 0, r0, c6, c0, 0 @ get FAR 39 mrc p15, 0, r0, c6, c0, 0 @ get FAR
40 ldr r8, [r0] @ read arm instruction 40 ldr r8, [r0] @ read arm instruction
41 tst r8, #1 << 20 @ L = 1 -> write? 41 tst r8, #1 << 20 @ L = 0 -> write?
42 orreq r1, r1, #1 << 8 @ yes. 42 orreq r1, r1, #1 << 11 @ yes.
43 and r7, r8, #15 << 24 43 and r7, r8, #15 << 24
44 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine 44 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
45 nop 45 nop
@@ -71,8 +71,8 @@ ENTRY(cpu_arm6_data_abort)
71 mrc p15, 0, r1, c5, c0, 0 @ get FSR 71 mrc p15, 0, r1, c5, c0, 0 @ get FSR
72 mrc p15, 0, r0, c6, c0, 0 @ get FAR 72 mrc p15, 0, r0, c6, c0, 0 @ get FAR
73 ldr r8, [r2] @ read arm instruction 73 ldr r8, [r2] @ read arm instruction
74 tst r8, #1 << 20 @ L = 1 -> write? 74 tst r8, #1 << 20 @ L = 0 -> write?
75 orreq r1, r1, #1 << 8 @ yes. 75 orreq r1, r1, #1 << 11 @ yes.
76 and r7, r8, #14 << 24 76 and r7, r8, #14 << 24
77 teq r7, #8 << 24 @ was it ldm/stm 77 teq r7, #8 << 24 @ was it ldm/stm
78 movne pc, lr 78 movne pc, lr
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 1c85b4e536c2..aa481ea3d702 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -590,7 +590,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
590 if (!(isr & 1)) 590 if (!(isr & 1))
591 continue; 591 continue;
592 d = irq_desc + gpio_irq; 592 d = irq_desc + gpio_irq;
593 d->handle(gpio_irq, d, regs); 593 desc_handle_irq(gpio_irq, d, regs);
594 } 594 }
595} 595}
596 596
diff --git a/arch/cris/Kconfig.debug b/arch/cris/Kconfig.debug
index cd72324935c4..0a1d62a23614 100644
--- a/arch/cris/Kconfig.debug
+++ b/arch/cris/Kconfig.debug
@@ -5,10 +5,13 @@ config PROFILING
5 bool "Kernel profiling support" 5 bool "Kernel profiling support"
6 6
7config SYSTEM_PROFILER 7config SYSTEM_PROFILER
8 bool "System profiling support" 8 bool "System profiling support"
9
10source "lib/Kconfig.debug"
9 11
10config ETRAX_KGDB 12config ETRAX_KGDB
11 bool "Use kernel GDB debugger" 13 bool "Use kernel GDB debugger"
14 depends on DEBUG_KERNEL
12 ---help--- 15 ---help---
13 The CRIS version of gdb can be used to remotely debug a running 16 The CRIS version of gdb can be used to remotely debug a running
14 Linux kernel via the serial debug port. Provided you have gdb-cris 17 Linux kernel via the serial debug port. Provided you have gdb-cris
@@ -22,25 +25,11 @@ config ETRAX_KGDB
22 this option is turned on! 25 this option is turned on!
23 26
24 27
25config DEBUG_INFO
26 bool "Compile the kernel with debug info"
27 help
28 If you say Y here the resulting kernel image will include
29 debugging info resulting in a larger kernel image.
30 Say Y here only if you plan to use gdb to debug the kernel.
31 If you don't debug the kernel, you can say N.
32
33config FRAME_POINTER
34 bool "Compile the kernel with frame pointers"
35 help
36 If you say Y here the resulting kernel image will be slightly larger
37 and slower, but it will give very useful debugging information.
38 If you don't debug the kernel, you can say N, but we may not be able
39 to solve problems without frame pointers.
40
41config DEBUG_NMI_OOPS 28config DEBUG_NMI_OOPS
42 bool "NMI causes oops printout" 29 bool "NMI causes oops printout"
43 help 30 depends on DEBUG_KERNEL
44 If the system locks up without any debug information you can say Y 31 help
45 here to make it possible to dump an OOPS with an external NMI. 32 If the system locks up without any debug information you can say Y
33 here to make it possible to dump an OOPS with an external NMI.
34
46endmenu 35endmenu
diff --git a/arch/frv/kernel/frv_ksyms.c b/arch/frv/kernel/frv_ksyms.c
index 62cfbd9b4f98..1a76d5247190 100644
--- a/arch/frv/kernel/frv_ksyms.c
+++ b/arch/frv/kernel/frv_ksyms.c
@@ -71,7 +71,6 @@ EXPORT_SYMBOL(memset);
71EXPORT_SYMBOL(memcmp); 71EXPORT_SYMBOL(memcmp);
72EXPORT_SYMBOL(memscan); 72EXPORT_SYMBOL(memscan);
73EXPORT_SYMBOL(memmove); 73EXPORT_SYMBOL(memmove);
74EXPORT_SYMBOL(strtok);
75 74
76EXPORT_SYMBOL(get_wchan); 75EXPORT_SYMBOL(get_wchan);
77 76
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 619d843ba231..3b3b017e1c15 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -14,6 +14,10 @@ config X86
14 486, 586, Pentiums, and various instruction-set-compatible chips by 14 486, 586, Pentiums, and various instruction-set-compatible chips by
15 AMD, Cyrix, and others. 15 AMD, Cyrix, and others.
16 16
17config SEMAPHORE_SLEEPERS
18 bool
19 default y
20
17config MMU 21config MMU
18 bool 22 bool
19 default y 23 default y
@@ -754,6 +758,7 @@ config NUMA
754 depends on SMP && HIGHMEM64G && (X86_NUMAQ || X86_GENERICARCH || (X86_SUMMIT && ACPI)) 758 depends on SMP && HIGHMEM64G && (X86_NUMAQ || X86_GENERICARCH || (X86_SUMMIT && ACPI))
755 default n if X86_PC 759 default n if X86_PC
756 default y if (X86_NUMAQ || X86_SUMMIT) 760 default y if (X86_NUMAQ || X86_SUMMIT)
761 select SPARSEMEM_STATIC
757 762
758# Need comments to help the hapless user trying to turn on NUMA support 763# Need comments to help the hapless user trying to turn on NUMA support
759comment "NUMA (NUMA-Q) requires SMP, 64GB highmem support" 764comment "NUMA (NUMA-Q) requires SMP, 64GB highmem support"
diff --git a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile
index 4cc83b322b36..64682a0edacf 100644
--- a/arch/i386/kernel/Makefile
+++ b/arch/i386/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y := head.o init_task.o vmlinux.lds
7obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o vm86.o \ 7obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o vm86.o \
8 ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_i386.o \ 8 ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_i386.o \
9 pci-dma.o i386_ksyms.o i387.o dmi_scan.o bootflag.o \ 9 pci-dma.o i386_ksyms.o i387.o dmi_scan.o bootflag.o \
10 doublefault.o quirks.o 10 doublefault.o quirks.o i8237.o
11 11
12obj-y += cpu/ 12obj-y += cpu/
13obj-y += timers/ 13obj-y += timers/
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c
index b7808a89d945..34ee500c26e5 100644
--- a/arch/i386/kernel/acpi/boot.c
+++ b/arch/i386/kernel/acpi/boot.c
@@ -833,6 +833,9 @@ acpi_process_madt(void)
833 if (!error) { 833 if (!error) {
834 acpi_lapic = 1; 834 acpi_lapic = 1;
835 835
836#ifdef CONFIG_X86_GENERICARCH
837 generic_bigsmp_probe();
838#endif
836 /* 839 /*
837 * Parse MADT IO-APIC entries 840 * Parse MADT IO-APIC entries
838 */ 841 */
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 4553ffd94b1f..46ce9b248f55 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -613,8 +613,8 @@ void __devinit cpu_init(void)
613 memcpy(thread->tls_array, &per_cpu(cpu_gdt_table, cpu), 613 memcpy(thread->tls_array, &per_cpu(cpu_gdt_table, cpu),
614 GDT_ENTRY_TLS_ENTRIES * 8); 614 GDT_ENTRY_TLS_ENTRIES * 8);
615 615
616 __asm__ __volatile__("lgdt %0" : : "m" (cpu_gdt_descr[cpu])); 616 load_gdt(&cpu_gdt_descr[cpu]);
617 __asm__ __volatile__("lidt %0" : : "m" (idt_descr)); 617 load_idt(&idt_descr);
618 618
619 /* 619 /*
620 * Delete NT 620 * Delete NT
@@ -642,12 +642,12 @@ void __devinit cpu_init(void)
642 asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs"); 642 asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
643 643
644 /* Clear all 6 debug registers: */ 644 /* Clear all 6 debug registers: */
645 645 set_debugreg(0, 0);
646#define CD(register) set_debugreg(0, register) 646 set_debugreg(0, 1);
647 647 set_debugreg(0, 2);
648 CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7); 648 set_debugreg(0, 3);
649 649 set_debugreg(0, 6);
650#undef CD 650 set_debugreg(0, 7);
651 651
652 /* 652 /*
653 * Force FPU initialization: 653 * Force FPU initialization:
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index 04e3563da4fe..bf02b5026e62 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -64,8 +64,6 @@ static int dont_scale_voltage;
64#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg) 64#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
65 65
66 66
67#define __hlt() __asm__ __volatile__("hlt": : :"memory")
68
69/* Clock ratios multiplied by 10 */ 67/* Clock ratios multiplied by 10 */
70static int clock_ratio[32]; 68static int clock_ratio[32];
71static int eblcr_table[32]; 69static int eblcr_table[32];
@@ -168,11 +166,9 @@ static void do_powersaver(union msr_longhaul *longhaul,
168 outb(0xFE,0x21); /* TMR0 only */ 166 outb(0xFE,0x21); /* TMR0 only */
169 outb(0xFF,0x80); /* delay */ 167 outb(0xFF,0x80); /* delay */
170 168
171 local_irq_enable(); 169 safe_halt();
172
173 __hlt();
174 wrmsrl(MSR_VIA_LONGHAUL, longhaul->val); 170 wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
175 __hlt(); 171 halt();
176 172
177 local_irq_disable(); 173 local_irq_disable();
178 174
@@ -251,9 +247,7 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
251 bcr2.bits.CLOCKMUL = clock_ratio_index; 247 bcr2.bits.CLOCKMUL = clock_ratio_index;
252 local_irq_disable(); 248 local_irq_disable();
253 wrmsrl (MSR_VIA_BCR2, bcr2.val); 249 wrmsrl (MSR_VIA_BCR2, bcr2.val);
254 local_irq_enable(); 250 safe_halt();
255
256 __hlt();
257 251
258 /* Disable software clock multiplier */ 252 /* Disable software clock multiplier */
259 rdmsrl (MSR_VIA_BCR2, bcr2.val); 253 rdmsrl (MSR_VIA_BCR2, bcr2.val);
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index ba4b01138c8f..ff87cc22b323 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -132,11 +132,7 @@ static void __init set_cx86_memwb(void)
132 setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04); 132 setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
133 /* set 'Not Write-through' */ 133 /* set 'Not Write-through' */
134 cr0 = 0x20000000; 134 cr0 = 0x20000000;
135 __asm__("movl %%cr0,%%eax\n\t" 135 write_cr0(read_cr0() | cr0);
136 "orl %0,%%eax\n\t"
137 "movl %%eax,%%cr0\n"
138 : : "r" (cr0)
139 :"ax");
140 /* CCR2 bit 2: lock NW bit and set WT1 */ 136 /* CCR2 bit 2: lock NW bit and set WT1 */
141 setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14 ); 137 setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14 );
142} 138}
diff --git a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c
index a2c33c1a46c5..43601de0f633 100644
--- a/arch/i386/kernel/cpu/intel.c
+++ b/arch/i386/kernel/cpu/intel.c
@@ -82,16 +82,13 @@ static void __devinit Intel_errata_workarounds(struct cpuinfo_x86 *c)
82 */ 82 */
83static int __devinit num_cpu_cores(struct cpuinfo_x86 *c) 83static int __devinit num_cpu_cores(struct cpuinfo_x86 *c)
84{ 84{
85 unsigned int eax; 85 unsigned int eax, ebx, ecx, edx;
86 86
87 if (c->cpuid_level < 4) 87 if (c->cpuid_level < 4)
88 return 1; 88 return 1;
89 89
90 __asm__("cpuid" 90 /* Intel has a non-standard dependency on %ecx for this CPUID level. */
91 : "=a" (eax) 91 cpuid_count(4, 0, &eax, &ebx, &ecx, &edx);
92 : "0" (4), "c" (0)
93 : "bx", "dx");
94
95 if (eax & 0x1f) 92 if (eax & 0x1f)
96 return ((eax >> 26) + 1); 93 return ((eax >> 26) + 1);
97 else 94 else
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index 6c55b50cf048..9e0d5f83cb9f 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -305,6 +305,9 @@ static void __devinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
305{ 305{
306 struct _cpuid4_info *this_leaf; 306 struct _cpuid4_info *this_leaf;
307 unsigned long num_threads_sharing; 307 unsigned long num_threads_sharing;
308#ifdef CONFIG_X86_HT
309 struct cpuinfo_x86 *c = cpu_data + cpu;
310#endif
308 311
309 this_leaf = CPUID4_INFO_IDX(cpu, index); 312 this_leaf = CPUID4_INFO_IDX(cpu, index);
310 num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing; 313 num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
@@ -314,10 +317,12 @@ static void __devinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
314#ifdef CONFIG_X86_HT 317#ifdef CONFIG_X86_HT
315 else if (num_threads_sharing == smp_num_siblings) 318 else if (num_threads_sharing == smp_num_siblings)
316 this_leaf->shared_cpu_map = cpu_sibling_map[cpu]; 319 this_leaf->shared_cpu_map = cpu_sibling_map[cpu];
317#endif 320 else if (num_threads_sharing == (c->x86_num_cores * smp_num_siblings))
321 this_leaf->shared_cpu_map = cpu_core_map[cpu];
318 else 322 else
319 printk(KERN_INFO "Number of CPUs sharing cache didn't match " 323 printk(KERN_DEBUG "Number of CPUs sharing cache didn't match "
320 "any known set of CPUs\n"); 324 "any known set of CPUs\n");
325#endif
321} 326}
322#else 327#else
323static void __init cache_shared_cpu_map_setup(unsigned int cpu, int index) {} 328static void __init cache_shared_cpu_map_setup(unsigned int cpu, int index) {}
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c
index 764cac64e211..dd4ebd6af7e4 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/i386/kernel/cpu/mtrr/main.c
@@ -561,7 +561,7 @@ struct mtrr_value {
561 561
562static struct mtrr_value * mtrr_state; 562static struct mtrr_value * mtrr_state;
563 563
564static int mtrr_save(struct sys_device * sysdev, u32 state) 564static int mtrr_save(struct sys_device * sysdev, pm_message_t state)
565{ 565{
566 int i; 566 int i;
567 int size = num_var_ranges * sizeof(struct mtrr_value); 567 int size = num_var_ranges * sizeof(struct mtrr_value);
diff --git a/arch/i386/kernel/crash.c b/arch/i386/kernel/crash.c
index e5fab12f7926..913be77bb844 100644
--- a/arch/i386/kernel/crash.c
+++ b/arch/i386/kernel/crash.c
@@ -153,7 +153,7 @@ static int crash_nmi_callback(struct pt_regs *regs, int cpu)
153 disable_local_APIC(); 153 disable_local_APIC();
154 atomic_dec(&waiting_for_crash_ipi); 154 atomic_dec(&waiting_for_crash_ipi);
155 /* Assume hlt works */ 155 /* Assume hlt works */
156 __asm__("hlt"); 156 halt();
157 for(;;); 157 for(;;);
158 158
159 return 1; 159 return 1;
diff --git a/arch/i386/kernel/doublefault.c b/arch/i386/kernel/doublefault.c
index 789af3e9fb1f..5edb1d379add 100644
--- a/arch/i386/kernel/doublefault.c
+++ b/arch/i386/kernel/doublefault.c
@@ -20,7 +20,7 @@ static void doublefault_fn(void)
20 struct Xgt_desc_struct gdt_desc = {0, 0}; 20 struct Xgt_desc_struct gdt_desc = {0, 0};
21 unsigned long gdt, tss; 21 unsigned long gdt, tss;
22 22
23 __asm__ __volatile__("sgdt %0": "=m" (gdt_desc): :"memory"); 23 store_gdt(&gdt_desc);
24 gdt = gdt_desc.address; 24 gdt = gdt_desc.address;
25 25
26 printk("double fault, gdt at %08lx [%d bytes]\n", gdt, gdt_desc.size); 26 printk("double fault, gdt at %08lx [%d bytes]\n", gdt, gdt_desc.size);
diff --git a/arch/i386/kernel/efi.c b/arch/i386/kernel/efi.c
index 385883ea8c19..ecad519fd395 100644
--- a/arch/i386/kernel/efi.c
+++ b/arch/i386/kernel/efi.c
@@ -79,7 +79,7 @@ static void efi_call_phys_prelog(void)
79 * directory. If I have PSE, I just need to duplicate one entry in 79 * directory. If I have PSE, I just need to duplicate one entry in
80 * page directory. 80 * page directory.
81 */ 81 */
82 __asm__ __volatile__("movl %%cr4, %0":"=r"(cr4)); 82 cr4 = read_cr4();
83 83
84 if (cr4 & X86_CR4_PSE) { 84 if (cr4 & X86_CR4_PSE) {
85 efi_bak_pg_dir_pointer[0].pgd = 85 efi_bak_pg_dir_pointer[0].pgd =
@@ -104,8 +104,7 @@ static void efi_call_phys_prelog(void)
104 local_flush_tlb(); 104 local_flush_tlb();
105 105
106 cpu_gdt_descr[0].address = __pa(cpu_gdt_descr[0].address); 106 cpu_gdt_descr[0].address = __pa(cpu_gdt_descr[0].address);
107 __asm__ __volatile__("lgdt %0":"=m" 107 load_gdt((struct Xgt_desc_struct *) __pa(&cpu_gdt_descr[0]));
108 (*(struct Xgt_desc_struct *) __pa(&cpu_gdt_descr[0])));
109} 108}
110 109
111static void efi_call_phys_epilog(void) 110static void efi_call_phys_epilog(void)
@@ -114,8 +113,8 @@ static void efi_call_phys_epilog(void)
114 113
115 cpu_gdt_descr[0].address = 114 cpu_gdt_descr[0].address =
116 (unsigned long) __va(cpu_gdt_descr[0].address); 115 (unsigned long) __va(cpu_gdt_descr[0].address);
117 __asm__ __volatile__("lgdt %0":"=m"(cpu_gdt_descr)); 116 load_gdt(&cpu_gdt_descr[0]);
118 __asm__ __volatile__("movl %%cr4, %0":"=r"(cr4)); 117 cr4 = read_cr4();
119 118
120 if (cr4 & X86_CR4_PSE) { 119 if (cr4 & X86_CR4_PSE) {
121 swapper_pg_dir[pgd_index(0)].pgd = 120 swapper_pg_dir[pgd_index(0)].pgd =
@@ -233,22 +232,23 @@ void __init efi_map_memmap(void)
233{ 232{
234 memmap.map = NULL; 233 memmap.map = NULL;
235 234
236 memmap.map = (efi_memory_desc_t *) 235 memmap.map = bt_ioremap((unsigned long) memmap.phys_map,
237 bt_ioremap((unsigned long) memmap.phys_map, 236 (memmap.nr_map * memmap.desc_size));
238 (memmap.nr_map * sizeof(efi_memory_desc_t)));
239
240 if (memmap.map == NULL) 237 if (memmap.map == NULL)
241 printk(KERN_ERR PFX "Could not remap the EFI memmap!\n"); 238 printk(KERN_ERR PFX "Could not remap the EFI memmap!\n");
239
240 memmap.map_end = memmap.map + (memmap.nr_map * memmap.desc_size);
242} 241}
243 242
244#if EFI_DEBUG 243#if EFI_DEBUG
245static void __init print_efi_memmap(void) 244static void __init print_efi_memmap(void)
246{ 245{
247 efi_memory_desc_t *md; 246 efi_memory_desc_t *md;
247 void *p;
248 int i; 248 int i;
249 249
250 for (i = 0; i < memmap.nr_map; i++) { 250 for (p = memmap.map, i = 0; p < memmap.map_end; p += memmap.desc_size, i++) {
251 md = &memmap.map[i]; 251 md = p;
252 printk(KERN_INFO "mem%02u: type=%u, attr=0x%llx, " 252 printk(KERN_INFO "mem%02u: type=%u, attr=0x%llx, "
253 "range=[0x%016llx-0x%016llx) (%lluMB)\n", 253 "range=[0x%016llx-0x%016llx) (%lluMB)\n",
254 i, md->type, md->attribute, md->phys_addr, 254 i, md->type, md->attribute, md->phys_addr,
@@ -271,10 +271,10 @@ void efi_memmap_walk(efi_freemem_callback_t callback, void *arg)
271 } prev, curr; 271 } prev, curr;
272 efi_memory_desc_t *md; 272 efi_memory_desc_t *md;
273 unsigned long start, end; 273 unsigned long start, end;
274 int i; 274 void *p;
275 275
276 for (i = 0; i < memmap.nr_map; i++) { 276 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
277 md = &memmap.map[i]; 277 md = p;
278 278
279 if ((md->num_pages == 0) || (!is_available_memory(md))) 279 if ((md->num_pages == 0) || (!is_available_memory(md)))
280 continue; 280 continue;
@@ -325,6 +325,7 @@ void __init efi_init(void)
325 memmap.phys_map = EFI_MEMMAP; 325 memmap.phys_map = EFI_MEMMAP;
326 memmap.nr_map = EFI_MEMMAP_SIZE/EFI_MEMDESC_SIZE; 326 memmap.nr_map = EFI_MEMMAP_SIZE/EFI_MEMDESC_SIZE;
327 memmap.desc_version = EFI_MEMDESC_VERSION; 327 memmap.desc_version = EFI_MEMDESC_VERSION;
328 memmap.desc_size = EFI_MEMDESC_SIZE;
328 329
329 efi.systab = (efi_system_table_t *) 330 efi.systab = (efi_system_table_t *)
330 boot_ioremap((unsigned long) efi_phys.systab, 331 boot_ioremap((unsigned long) efi_phys.systab,
@@ -428,22 +429,30 @@ void __init efi_init(void)
428 printk(KERN_ERR PFX "Could not map the runtime service table!\n"); 429 printk(KERN_ERR PFX "Could not map the runtime service table!\n");
429 430
430 /* Map the EFI memory map for use until paging_init() */ 431 /* Map the EFI memory map for use until paging_init() */
431 432 memmap.map = boot_ioremap((unsigned long) EFI_MEMMAP, EFI_MEMMAP_SIZE);
432 memmap.map = (efi_memory_desc_t *)
433 boot_ioremap((unsigned long) EFI_MEMMAP, EFI_MEMMAP_SIZE);
434
435 if (memmap.map == NULL) 433 if (memmap.map == NULL)
436 printk(KERN_ERR PFX "Could not map the EFI memory map!\n"); 434 printk(KERN_ERR PFX "Could not map the EFI memory map!\n");
437 435
438 if (EFI_MEMDESC_SIZE != sizeof(efi_memory_desc_t)) { 436 memmap.map_end = memmap.map + (memmap.nr_map * memmap.desc_size);
439 printk(KERN_WARNING PFX "Warning! Kernel-defined memdesc doesn't " 437
440 "match the one from EFI!\n");
441 }
442#if EFI_DEBUG 438#if EFI_DEBUG
443 print_efi_memmap(); 439 print_efi_memmap();
444#endif 440#endif
445} 441}
446 442
443static inline void __init check_range_for_systab(efi_memory_desc_t *md)
444{
445 if (((unsigned long)md->phys_addr <= (unsigned long)efi_phys.systab) &&
446 ((unsigned long)efi_phys.systab < md->phys_addr +
447 ((unsigned long)md->num_pages << EFI_PAGE_SHIFT))) {
448 unsigned long addr;
449
450 addr = md->virt_addr - md->phys_addr +
451 (unsigned long)efi_phys.systab;
452 efi.systab = (efi_system_table_t *)addr;
453 }
454}
455
447/* 456/*
448 * This function will switch the EFI runtime services to virtual mode. 457 * This function will switch the EFI runtime services to virtual mode.
449 * Essentially, look through the EFI memmap and map every region that 458 * Essentially, look through the EFI memmap and map every region that
@@ -457,43 +466,32 @@ void __init efi_enter_virtual_mode(void)
457{ 466{
458 efi_memory_desc_t *md; 467 efi_memory_desc_t *md;
459 efi_status_t status; 468 efi_status_t status;
460 int i; 469 void *p;
461 470
462 efi.systab = NULL; 471 efi.systab = NULL;
463 472
464 for (i = 0; i < memmap.nr_map; i++) { 473 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
465 md = &memmap.map[i]; 474 md = p;
466 475
467 if (md->attribute & EFI_MEMORY_RUNTIME) { 476 if (!(md->attribute & EFI_MEMORY_RUNTIME))
468 md->virt_addr = 477 continue;
469 (unsigned long)ioremap(md->phys_addr,
470 md->num_pages << EFI_PAGE_SHIFT);
471 if (!(unsigned long)md->virt_addr) {
472 printk(KERN_ERR PFX "ioremap of 0x%lX failed\n",
473 (unsigned long)md->phys_addr);
474 }
475 478
476 if (((unsigned long)md->phys_addr <= 479 md->virt_addr = (unsigned long)ioremap(md->phys_addr,
477 (unsigned long)efi_phys.systab) && 480 md->num_pages << EFI_PAGE_SHIFT);
478 ((unsigned long)efi_phys.systab < 481 if (!(unsigned long)md->virt_addr) {
479 md->phys_addr + 482 printk(KERN_ERR PFX "ioremap of 0x%lX failed\n",
480 ((unsigned long)md->num_pages << 483 (unsigned long)md->phys_addr);
481 EFI_PAGE_SHIFT))) {
482 unsigned long addr;
483
484 addr = md->virt_addr - md->phys_addr +
485 (unsigned long)efi_phys.systab;
486 efi.systab = (efi_system_table_t *)addr;
487 }
488 } 484 }
485 /* update the virtual address of the EFI system table */
486 check_range_for_systab(md);
489 } 487 }
490 488
491 if (!efi.systab) 489 if (!efi.systab)
492 BUG(); 490 BUG();
493 491
494 status = phys_efi_set_virtual_address_map( 492 status = phys_efi_set_virtual_address_map(
495 sizeof(efi_memory_desc_t) * memmap.nr_map, 493 memmap.desc_size * memmap.nr_map,
496 sizeof(efi_memory_desc_t), 494 memmap.desc_size,
497 memmap.desc_version, 495 memmap.desc_version,
498 memmap.phys_map); 496 memmap.phys_map);
499 497
@@ -533,10 +531,10 @@ efi_initialize_iomem_resources(struct resource *code_resource,
533{ 531{
534 struct resource *res; 532 struct resource *res;
535 efi_memory_desc_t *md; 533 efi_memory_desc_t *md;
536 int i; 534 void *p;
537 535
538 for (i = 0; i < memmap.nr_map; i++) { 536 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
539 md = &memmap.map[i]; 537 md = p;
540 538
541 if ((md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT)) > 539 if ((md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT)) >
542 0x100000000ULL) 540 0x100000000ULL)
@@ -613,10 +611,10 @@ efi_initialize_iomem_resources(struct resource *code_resource,
613u32 efi_mem_type(unsigned long phys_addr) 611u32 efi_mem_type(unsigned long phys_addr)
614{ 612{
615 efi_memory_desc_t *md; 613 efi_memory_desc_t *md;
616 int i; 614 void *p;
617 615
618 for (i = 0; i < memmap.nr_map; i++) { 616 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
619 md = &memmap.map[i]; 617 md = p;
620 if ((md->phys_addr <= phys_addr) && (phys_addr < 618 if ((md->phys_addr <= phys_addr) && (phys_addr <
621 (md->phys_addr + (md-> num_pages << EFI_PAGE_SHIFT)) )) 619 (md->phys_addr + (md-> num_pages << EFI_PAGE_SHIFT)) ))
622 return md->type; 620 return md->type;
@@ -627,10 +625,10 @@ u32 efi_mem_type(unsigned long phys_addr)
627u64 efi_mem_attributes(unsigned long phys_addr) 625u64 efi_mem_attributes(unsigned long phys_addr)
628{ 626{
629 efi_memory_desc_t *md; 627 efi_memory_desc_t *md;
630 int i; 628 void *p;
631 629
632 for (i = 0; i < memmap.nr_map; i++) { 630 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
633 md = &memmap.map[i]; 631 md = p;
634 if ((md->phys_addr <= phys_addr) && (phys_addr < 632 if ((md->phys_addr <= phys_addr) && (phys_addr <
635 (md->phys_addr + (md-> num_pages << EFI_PAGE_SHIFT)) )) 633 (md->phys_addr + (md-> num_pages << EFI_PAGE_SHIFT)) ))
636 return md->attribute; 634 return md->attribute;
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
index a991d4e5edd2..abb909793efc 100644
--- a/arch/i386/kernel/entry.S
+++ b/arch/i386/kernel/entry.S
@@ -203,7 +203,7 @@ sysenter_past_esp:
203 GET_THREAD_INFO(%ebp) 203 GET_THREAD_INFO(%ebp)
204 204
205 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */ 205 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
206 testw $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),TI_flags(%ebp) 206 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
207 jnz syscall_trace_entry 207 jnz syscall_trace_entry
208 cmpl $(nr_syscalls), %eax 208 cmpl $(nr_syscalls), %eax
209 jae syscall_badsys 209 jae syscall_badsys
@@ -226,9 +226,9 @@ ENTRY(system_call)
226 pushl %eax # save orig_eax 226 pushl %eax # save orig_eax
227 SAVE_ALL 227 SAVE_ALL
228 GET_THREAD_INFO(%ebp) 228 GET_THREAD_INFO(%ebp)
229 # system call tracing in operation 229 # system call tracing in operation / emulation
230 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */ 230 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
231 testw $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),TI_flags(%ebp) 231 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
232 jnz syscall_trace_entry 232 jnz syscall_trace_entry
233 cmpl $(nr_syscalls), %eax 233 cmpl $(nr_syscalls), %eax
234 jae syscall_badsys 234 jae syscall_badsys
@@ -338,6 +338,9 @@ syscall_trace_entry:
338 movl %esp, %eax 338 movl %esp, %eax
339 xorl %edx,%edx 339 xorl %edx,%edx
340 call do_syscall_trace 340 call do_syscall_trace
341 cmpl $0, %eax
342 jne resume_userspace # ret != 0 -> running under PTRACE_SYSEMU,
343 # so must skip actual syscall
341 movl ORIG_EAX(%esp), %eax 344 movl ORIG_EAX(%esp), %eax
342 cmpl $(nr_syscalls), %eax 345 cmpl $(nr_syscalls), %eax
343 jnae syscall_call 346 jnae syscall_call
diff --git a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S
index 4477bb107098..0480ca9e9e57 100644
--- a/arch/i386/kernel/head.S
+++ b/arch/i386/kernel/head.S
@@ -77,6 +77,32 @@ ENTRY(startup_32)
77 subl %edi,%ecx 77 subl %edi,%ecx
78 shrl $2,%ecx 78 shrl $2,%ecx
79 rep ; stosl 79 rep ; stosl
80/*
81 * Copy bootup parameters out of the way.
82 * Note: %esi still has the pointer to the real-mode data.
83 * With the kexec as boot loader, parameter segment might be loaded beyond
84 * kernel image and might not even be addressable by early boot page tables.
85 * (kexec on panic case). Hence copy out the parameters before initializing
86 * page tables.
87 */
88 movl $(boot_params - __PAGE_OFFSET),%edi
89 movl $(PARAM_SIZE/4),%ecx
90 cld
91 rep
92 movsl
93 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
94 andl %esi,%esi
95 jnz 2f # New command line protocol
96 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
97 jne 1f
98 movzwl OLD_CL_OFFSET,%esi
99 addl $(OLD_CL_BASE_ADDR),%esi
1002:
101 movl $(saved_command_line - __PAGE_OFFSET),%edi
102 movl $(COMMAND_LINE_SIZE/4),%ecx
103 rep
104 movsl
1051:
80 106
81/* 107/*
82 * Initialize page tables. This creates a PDE and a set of page 108 * Initialize page tables. This creates a PDE and a set of page
@@ -214,28 +240,6 @@ ENTRY(startup_32_smp)
214 */ 240 */
215 call setup_idt 241 call setup_idt
216 242
217/*
218 * Copy bootup parameters out of the way.
219 * Note: %esi still has the pointer to the real-mode data.
220 */
221 movl $boot_params,%edi
222 movl $(PARAM_SIZE/4),%ecx
223 cld
224 rep
225 movsl
226 movl boot_params+NEW_CL_POINTER,%esi
227 andl %esi,%esi
228 jnz 2f # New command line protocol
229 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
230 jne 1f
231 movzwl OLD_CL_OFFSET,%esi
232 addl $(OLD_CL_BASE_ADDR),%esi
2332:
234 movl $saved_command_line,%edi
235 movl $(COMMAND_LINE_SIZE/4),%ecx
236 rep
237 movsl
2381:
239checkCPUtype: 243checkCPUtype:
240 244
241 movl $-1,X86_CPUID # -1 for no CPUID initially 245 movl $-1,X86_CPUID # -1 for no CPUID initially
diff --git a/arch/i386/kernel/i8237.c b/arch/i386/kernel/i8237.c
new file mode 100644
index 000000000000..c36d1c006c2f
--- /dev/null
+++ b/arch/i386/kernel/i8237.c
@@ -0,0 +1,67 @@
1/*
2 * i8237.c: 8237A DMA controller suspend functions.
3 *
4 * Written by Pierre Ossman, 2005.
5 */
6
7#include <linux/init.h>
8#include <linux/sysdev.h>
9
10#include <asm/dma.h>
11
12/*
13 * This module just handles suspend/resume issues with the
14 * 8237A DMA controller (used for ISA and LPC).
15 * Allocation is handled in kernel/dma.c and normal usage is
16 * in asm/dma.h.
17 */
18
19static int i8237A_resume(struct sys_device *dev)
20{
21 unsigned long flags;
22 int i;
23
24 flags = claim_dma_lock();
25
26 dma_outb(DMA1_RESET_REG, 0);
27 dma_outb(DMA2_RESET_REG, 0);
28
29 for (i = 0;i < 8;i++) {
30 set_dma_addr(i, 0x000000);
31 /* DMA count is a bit weird so this is not 0 */
32 set_dma_count(i, 1);
33 }
34
35 /* Enable cascade DMA or channel 0-3 won't work */
36 enable_dma(4);
37
38 release_dma_lock(flags);
39
40 return 0;
41}
42
43static int i8237A_suspend(struct sys_device *dev, pm_message_t state)
44{
45 return 0;
46}
47
48static struct sysdev_class i8237_sysdev_class = {
49 set_kset_name("i8237"),
50 .suspend = i8237A_suspend,
51 .resume = i8237A_resume,
52};
53
54static struct sys_device device_i8237A = {
55 .id = 0,
56 .cls = &i8237_sysdev_class,
57};
58
59static int __init i8237A_init_sysfs(void)
60{
61 int error = sysdev_class_register(&i8237_sysdev_class);
62 if (!error)
63 error = sysdev_register(&device_i8237A);
64 return error;
65}
66
67device_initcall(i8237A_init_sysfs);
diff --git a/arch/i386/kernel/ioport.c b/arch/i386/kernel/ioport.c
index 8b25160393c1..f2b37654777f 100644
--- a/arch/i386/kernel/ioport.c
+++ b/arch/i386/kernel/ioport.c
@@ -132,6 +132,7 @@ asmlinkage long sys_iopl(unsigned long unused)
132 volatile struct pt_regs * regs = (struct pt_regs *) &unused; 132 volatile struct pt_regs * regs = (struct pt_regs *) &unused;
133 unsigned int level = regs->ebx; 133 unsigned int level = regs->ebx;
134 unsigned int old = (regs->eflags >> 12) & 3; 134 unsigned int old = (regs->eflags >> 12) & 3;
135 struct thread_struct *t = &current->thread;
135 136
136 if (level > 3) 137 if (level > 3)
137 return -EINVAL; 138 return -EINVAL;
@@ -140,8 +141,8 @@ asmlinkage long sys_iopl(unsigned long unused)
140 if (!capable(CAP_SYS_RAWIO)) 141 if (!capable(CAP_SYS_RAWIO))
141 return -EPERM; 142 return -EPERM;
142 } 143 }
143 regs->eflags = (regs->eflags &~ 0x3000UL) | (level << 12); 144 t->iopl = level << 12;
144 /* Make sure we return the long way (not sysenter) */ 145 regs->eflags = (regs->eflags & ~X86_EFLAGS_IOPL) | t->iopl;
145 set_thread_flag(TIF_IRET); 146 set_iopl_mask(t->iopl);
146 return 0; 147 return 0;
147} 148}
diff --git a/arch/i386/kernel/ldt.c b/arch/i386/kernel/ldt.c
index bb50afbee921..fe1ffa55587d 100644
--- a/arch/i386/kernel/ldt.c
+++ b/arch/i386/kernel/ldt.c
@@ -177,7 +177,7 @@ static int read_default_ldt(void __user * ptr, unsigned long bytecount)
177static int write_ldt(void __user * ptr, unsigned long bytecount, int oldmode) 177static int write_ldt(void __user * ptr, unsigned long bytecount, int oldmode)
178{ 178{
179 struct mm_struct * mm = current->mm; 179 struct mm_struct * mm = current->mm;
180 __u32 entry_1, entry_2, *lp; 180 __u32 entry_1, entry_2;
181 int error; 181 int error;
182 struct user_desc ldt_info; 182 struct user_desc ldt_info;
183 183
@@ -205,8 +205,6 @@ static int write_ldt(void __user * ptr, unsigned long bytecount, int oldmode)
205 goto out_unlock; 205 goto out_unlock;
206 } 206 }
207 207
208 lp = (__u32 *) ((ldt_info.entry_number << 3) + (char *) mm->context.ldt);
209
210 /* Allow LDTs to be cleared by the user. */ 208 /* Allow LDTs to be cleared by the user. */
211 if (ldt_info.base_addr == 0 && ldt_info.limit == 0) { 209 if (ldt_info.base_addr == 0 && ldt_info.limit == 0) {
212 if (oldmode || LDT_empty(&ldt_info)) { 210 if (oldmode || LDT_empty(&ldt_info)) {
@@ -223,8 +221,7 @@ static int write_ldt(void __user * ptr, unsigned long bytecount, int oldmode)
223 221
224 /* Install the new entry ... */ 222 /* Install the new entry ... */
225install: 223install:
226 *lp = entry_1; 224 write_ldt_entry(mm->context.ldt, ldt_info.entry_number, entry_1, entry_2);
227 *(lp+1) = entry_2;
228 error = 0; 225 error = 0;
229 226
230out_unlock: 227out_unlock:
diff --git a/arch/i386/kernel/machine_kexec.c b/arch/i386/kernel/machine_kexec.c
index cb699a2aa1f8..a912fed48482 100644
--- a/arch/i386/kernel/machine_kexec.c
+++ b/arch/i386/kernel/machine_kexec.c
@@ -17,13 +17,7 @@
17#include <asm/apic.h> 17#include <asm/apic.h>
18#include <asm/cpufeature.h> 18#include <asm/cpufeature.h>
19#include <asm/desc.h> 19#include <asm/desc.h>
20 20#include <asm/system.h>
21static inline unsigned long read_cr3(void)
22{
23 unsigned long cr3;
24 asm volatile("movl %%cr3,%0": "=r"(cr3));
25 return cr3;
26}
27 21
28#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE))) 22#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
29 23
@@ -99,10 +93,7 @@ static void set_idt(void *newidt, __u16 limit)
99 curidt.size = limit; 93 curidt.size = limit;
100 curidt.address = (unsigned long)newidt; 94 curidt.address = (unsigned long)newidt;
101 95
102 __asm__ __volatile__ ( 96 load_idt(&curidt);
103 "lidtl %0\n"
104 : : "m" (curidt)
105 );
106}; 97};
107 98
108 99
@@ -114,10 +105,7 @@ static void set_gdt(void *newgdt, __u16 limit)
114 curgdt.size = limit; 105 curgdt.size = limit;
115 curgdt.address = (unsigned long)newgdt; 106 curgdt.address = (unsigned long)newgdt;
116 107
117 __asm__ __volatile__ ( 108 load_gdt(&curgdt);
118 "lgdtl %0\n"
119 : : "m" (curgdt)
120 );
121}; 109};
122 110
123static void load_segments(void) 111static void load_segments(void)
diff --git a/arch/i386/kernel/microcode.c b/arch/i386/kernel/microcode.c
index a77c612aad00..165f13158c60 100644
--- a/arch/i386/kernel/microcode.c
+++ b/arch/i386/kernel/microcode.c
@@ -164,7 +164,8 @@ static void collect_cpu_info (void *unused)
164 } 164 }
165 165
166 wrmsr(MSR_IA32_UCODE_REV, 0, 0); 166 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
167 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); 167 /* see notes above for revision 1.07. Apparent chip bug */
168 serialize_cpu();
168 /* get the current revision from MSR 0x8B */ 169 /* get the current revision from MSR 0x8B */
169 rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev); 170 rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
170 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", 171 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
@@ -377,7 +378,9 @@ static void do_update_one (void * unused)
377 (unsigned long) uci->mc->bits >> 16 >> 16); 378 (unsigned long) uci->mc->bits >> 16 >> 16);
378 wrmsr(MSR_IA32_UCODE_REV, 0, 0); 379 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
379 380
380 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); 381 /* see notes above for revision 1.07. Apparent chip bug */
382 serialize_cpu();
383
381 /* get the current revision from MSR 0x8B */ 384 /* get the current revision from MSR 0x8B */
382 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); 385 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
383 386
diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index ce838abb27d8..5d0b9a8fc43d 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -65,6 +65,8 @@ int nr_ioapics;
65int pic_mode; 65int pic_mode;
66unsigned long mp_lapic_addr; 66unsigned long mp_lapic_addr;
67 67
68unsigned int def_to_bigsmp = 0;
69
68/* Processor that is doing the boot up */ 70/* Processor that is doing the boot up */
69unsigned int boot_cpu_physical_apicid = -1U; 71unsigned int boot_cpu_physical_apicid = -1U;
70/* Internal processor count */ 72/* Internal processor count */
@@ -120,7 +122,7 @@ static int MP_valid_apicid(int apicid, int version)
120 122
121static void __init MP_processor_info (struct mpc_config_processor *m) 123static void __init MP_processor_info (struct mpc_config_processor *m)
122{ 124{
123 int ver, apicid; 125 int ver, apicid, cpu, found_bsp = 0;
124 physid_mask_t tmp; 126 physid_mask_t tmp;
125 127
126 if (!(m->mpc_cpuflag & CPU_ENABLED)) 128 if (!(m->mpc_cpuflag & CPU_ENABLED))
@@ -179,6 +181,7 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
179 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) { 181 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
180 Dprintk(" Bootup CPU\n"); 182 Dprintk(" Bootup CPU\n");
181 boot_cpu_physical_apicid = m->mpc_apicid; 183 boot_cpu_physical_apicid = m->mpc_apicid;
184 found_bsp = 1;
182 } 185 }
183 186
184 if (num_processors >= NR_CPUS) { 187 if (num_processors >= NR_CPUS) {
@@ -202,6 +205,11 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
202 return; 205 return;
203 } 206 }
204 207
208 if (found_bsp)
209 cpu = 0;
210 else
211 cpu = num_processors - 1;
212 cpu_set(cpu, cpu_possible_map);
205 tmp = apicid_to_cpu_present(apicid); 213 tmp = apicid_to_cpu_present(apicid);
206 physids_or(phys_cpu_present_map, phys_cpu_present_map, tmp); 214 physids_or(phys_cpu_present_map, phys_cpu_present_map, tmp);
207 215
@@ -213,6 +221,13 @@ static void __init MP_processor_info (struct mpc_config_processor *m)
213 ver = 0x10; 221 ver = 0x10;
214 } 222 }
215 apic_version[m->mpc_apicid] = ver; 223 apic_version[m->mpc_apicid] = ver;
224 if ((num_processors > 8) &&
225 APIC_XAPIC(ver) &&
226 (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL))
227 def_to_bigsmp = 1;
228 else
229 def_to_bigsmp = 0;
230
216 bios_cpu_apicid[num_processors - 1] = m->mpc_apicid; 231 bios_cpu_apicid[num_processors - 1] = m->mpc_apicid;
217} 232}
218 233
diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c
index b2f03c39a6fe..03100d6fc5d6 100644
--- a/arch/i386/kernel/msr.c
+++ b/arch/i386/kernel/msr.c
@@ -46,23 +46,13 @@
46 46
47static struct class *msr_class; 47static struct class *msr_class;
48 48
49/* Note: "err" is handled in a funny way below. Otherwise one version
50 of gcc or another breaks. */
51
52static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) 49static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx)
53{ 50{
54 int err; 51 int err;
55 52
56 asm volatile ("1: wrmsr\n" 53 err = wrmsr_safe(reg, eax, edx);
57 "2:\n" 54 if (err)
58 ".section .fixup,\"ax\"\n" 55 err = -EIO;
59 "3: movl %4,%0\n"
60 " jmp 2b\n"
61 ".previous\n"
62 ".section __ex_table,\"a\"\n"
63 " .align 4\n" " .long 1b,3b\n" ".previous":"=&bDS" (err)
64 :"a"(eax), "d"(edx), "c"(reg), "i"(-EIO), "0"(0));
65
66 return err; 56 return err;
67} 57}
68 58
@@ -70,18 +60,9 @@ static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx)
70{ 60{
71 int err; 61 int err;
72 62
73 asm volatile ("1: rdmsr\n" 63 err = rdmsr_safe(reg, eax, edx);
74 "2:\n" 64 if (err)
75 ".section .fixup,\"ax\"\n" 65 err = -EIO;
76 "3: movl %4,%0\n"
77 " jmp 2b\n"
78 ".previous\n"
79 ".section __ex_table,\"a\"\n"
80 " .align 4\n"
81 " .long 1b,3b\n"
82 ".previous":"=&bDS" (err), "=a"(*eax), "=d"(*edx)
83 :"c"(reg), "i"(-EIO), "0"(0));
84
85 return err; 66 return err;
86} 67}
87 68
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index 8c242bb1ef45..8bbdbda07a2d 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -501,8 +501,11 @@ void nmi_watchdog_tick (struct pt_regs * regs)
501 */ 501 */
502 alert_counter[cpu]++; 502 alert_counter[cpu]++;
503 if (alert_counter[cpu] == 5*nmi_hz) 503 if (alert_counter[cpu] == 5*nmi_hz)
504 /*
505 * die_nmi will return ONLY if NOTIFY_STOP happens..
506 */
504 die_nmi(regs, "NMI Watchdog detected LOCKUP"); 507 die_nmi(regs, "NMI Watchdog detected LOCKUP");
505 } else { 508
506 last_irq_sums[cpu] = sum; 509 last_irq_sums[cpu] = sum;
507 alert_counter[cpu] = 0; 510 alert_counter[cpu] = 0;
508 } 511 }
diff --git a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
index e3f362e8af5b..b45cbf93d439 100644
--- a/arch/i386/kernel/process.c
+++ b/arch/i386/kernel/process.c
@@ -164,7 +164,7 @@ static inline void play_dead(void)
164 */ 164 */
165 local_irq_disable(); 165 local_irq_disable();
166 while (1) 166 while (1)
167 __asm__ __volatile__("hlt":::"memory"); 167 halt();
168} 168}
169#else 169#else
170static inline void play_dead(void) 170static inline void play_dead(void)
@@ -313,16 +313,12 @@ void show_regs(struct pt_regs * regs)
313 printk(" DS: %04x ES: %04x\n", 313 printk(" DS: %04x ES: %04x\n",
314 0xffff & regs->xds,0xffff & regs->xes); 314 0xffff & regs->xds,0xffff & regs->xes);
315 315
316 __asm__("movl %%cr0, %0": "=r" (cr0)); 316 cr0 = read_cr0();
317 __asm__("movl %%cr2, %0": "=r" (cr2)); 317 cr2 = read_cr2();
318 __asm__("movl %%cr3, %0": "=r" (cr3)); 318 cr3 = read_cr3();
319 /* This could fault if %cr4 does not exist */ 319 if (current_cpu_data.x86 > 4) {
320 __asm__("1: movl %%cr4, %0 \n" 320 cr4 = read_cr4();
321 "2: \n" 321 }
322 ".section __ex_table,\"a\" \n"
323 ".long 1b,2b \n"
324 ".previous \n"
325 : "=r" (cr4): "0" (0));
326 printk("CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", cr0, cr2, cr3, cr4); 322 printk("CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", cr0, cr2, cr3, cr4);
327 show_trace(NULL, &regs->esp); 323 show_trace(NULL, &regs->esp);
328} 324}
@@ -682,21 +678,26 @@ struct task_struct fastcall * __switch_to(struct task_struct *prev_p, struct tas
682 __unlazy_fpu(prev_p); 678 __unlazy_fpu(prev_p);
683 679
684 /* 680 /*
685 * Reload esp0, LDT and the page table pointer: 681 * Reload esp0.
686 */ 682 */
687 load_esp0(tss, next); 683 load_esp0(tss, next);
688 684
689 /* 685 /*
690 * Load the per-thread Thread-Local Storage descriptor. 686 * Save away %fs and %gs. No need to save %es and %ds, as
687 * those are always kernel segments while inside the kernel.
688 * Doing this before setting the new TLS descriptors avoids
689 * the situation where we temporarily have non-reloadable
690 * segments in %fs and %gs. This could be an issue if the
691 * NMI handler ever used %fs or %gs (it does not today), or
692 * if the kernel is running inside of a hypervisor layer.
691 */ 693 */
692 load_TLS(next, cpu); 694 savesegment(fs, prev->fs);
695 savesegment(gs, prev->gs);
693 696
694 /* 697 /*
695 * Save away %fs and %gs. No need to save %es and %ds, as 698 * Load the per-thread Thread-Local Storage descriptor.
696 * those are always kernel segments while inside the kernel.
697 */ 699 */
698 asm volatile("mov %%fs,%0":"=m" (prev->fs)); 700 load_TLS(next, cpu);
699 asm volatile("mov %%gs,%0":"=m" (prev->gs));
700 701
701 /* 702 /*
702 * Restore %fs and %gs if needed. 703 * Restore %fs and %gs if needed.
@@ -711,6 +712,12 @@ struct task_struct fastcall * __switch_to(struct task_struct *prev_p, struct tas
711 loadsegment(gs, next->gs); 712 loadsegment(gs, next->gs);
712 713
713 /* 714 /*
715 * Restore IOPL if needed.
716 */
717 if (unlikely(prev->iopl != next->iopl))
718 set_iopl_mask(next->iopl);
719
720 /*
714 * Now maybe reload the debug registers 721 * Now maybe reload the debug registers
715 */ 722 */
716 if (unlikely(next->debugreg[7])) { 723 if (unlikely(next->debugreg[7])) {
diff --git a/arch/i386/kernel/ptrace.c b/arch/i386/kernel/ptrace.c
index 0da59b42843c..340980203b09 100644
--- a/arch/i386/kernel/ptrace.c
+++ b/arch/i386/kernel/ptrace.c
@@ -271,6 +271,8 @@ static void clear_singlestep(struct task_struct *child)
271void ptrace_disable(struct task_struct *child) 271void ptrace_disable(struct task_struct *child)
272{ 272{
273 clear_singlestep(child); 273 clear_singlestep(child);
274 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
275 clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
274} 276}
275 277
276/* 278/*
@@ -509,15 +511,20 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
509 } 511 }
510 break; 512 break;
511 513
514 case PTRACE_SYSEMU: /* continue and stop at next syscall, which will not be executed */
512 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 515 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
513 case PTRACE_CONT: /* restart after signal. */ 516 case PTRACE_CONT: /* restart after signal. */
514 ret = -EIO; 517 ret = -EIO;
515 if (!valid_signal(data)) 518 if (!valid_signal(data))
516 break; 519 break;
517 if (request == PTRACE_SYSCALL) { 520 if (request == PTRACE_SYSEMU) {
521 set_tsk_thread_flag(child, TIF_SYSCALL_EMU);
522 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
523 } else if (request == PTRACE_SYSCALL) {
518 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 524 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
519 } 525 clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
520 else { 526 } else {
527 clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
521 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 528 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
522 } 529 }
523 child->exit_code = data; 530 child->exit_code = data;
@@ -542,10 +549,17 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
542 wake_up_process(child); 549 wake_up_process(child);
543 break; 550 break;
544 551
552 case PTRACE_SYSEMU_SINGLESTEP: /* Same as SYSEMU, but singlestep if not syscall */
545 case PTRACE_SINGLESTEP: /* set the trap flag. */ 553 case PTRACE_SINGLESTEP: /* set the trap flag. */
546 ret = -EIO; 554 ret = -EIO;
547 if (!valid_signal(data)) 555 if (!valid_signal(data))
548 break; 556 break;
557
558 if (request == PTRACE_SYSEMU_SINGLESTEP)
559 set_tsk_thread_flag(child, TIF_SYSCALL_EMU);
560 else
561 clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
562
549 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 563 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
550 set_singlestep(child); 564 set_singlestep(child);
551 child->exit_code = data; 565 child->exit_code = data;
@@ -678,26 +692,52 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code)
678 * - triggered by current->work.syscall_trace 692 * - triggered by current->work.syscall_trace
679 */ 693 */
680__attribute__((regparm(3))) 694__attribute__((regparm(3)))
681void do_syscall_trace(struct pt_regs *regs, int entryexit) 695int do_syscall_trace(struct pt_regs *regs, int entryexit)
682{ 696{
697 int is_sysemu = test_thread_flag(TIF_SYSCALL_EMU), ret = 0;
698 /* With TIF_SYSCALL_EMU set we want to ignore TIF_SINGLESTEP for syscall
699 * interception. */
700 int is_singlestep = !is_sysemu && test_thread_flag(TIF_SINGLESTEP);
701
683 /* do the secure computing check first */ 702 /* do the secure computing check first */
684 secure_computing(regs->orig_eax); 703 secure_computing(regs->orig_eax);
685 704
686 if (unlikely(current->audit_context) && entryexit) 705 if (unlikely(current->audit_context)) {
687 audit_syscall_exit(current, AUDITSC_RESULT(regs->eax), regs->eax); 706 if (entryexit)
707 audit_syscall_exit(current, AUDITSC_RESULT(regs->eax), regs->eax);
708 /* Debug traps, when using PTRACE_SINGLESTEP, must be sent only
709 * on the syscall exit path. Normally, when TIF_SYSCALL_AUDIT is
710 * not used, entry.S will call us only on syscall exit, not
711 * entry; so when TIF_SYSCALL_AUDIT is used we must avoid
712 * calling send_sigtrap() on syscall entry.
713 *
714 * Note that when PTRACE_SYSEMU_SINGLESTEP is used,
715 * is_singlestep is false, despite his name, so we will still do
716 * the correct thing.
717 */
718 else if (is_singlestep)
719 goto out;
720 }
688 721
689 if (!(current->ptrace & PT_PTRACED)) 722 if (!(current->ptrace & PT_PTRACED))
690 goto out; 723 goto out;
691 724
725 /* If a process stops on the 1st tracepoint with SYSCALL_TRACE
726 * and then is resumed with SYSEMU_SINGLESTEP, it will come in
727 * here. We have to check this and return */
728 if (is_sysemu && entryexit)
729 return 0;
730
692 /* Fake a debug trap */ 731 /* Fake a debug trap */
693 if (test_thread_flag(TIF_SINGLESTEP)) 732 if (is_singlestep)
694 send_sigtrap(current, regs, 0); 733 send_sigtrap(current, regs, 0);
695 734
696 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 735 if (!test_thread_flag(TIF_SYSCALL_TRACE) && !is_sysemu)
697 goto out; 736 goto out;
698 737
699 /* the 0x80 provides a way for the tracing parent to distinguish 738 /* the 0x80 provides a way for the tracing parent to distinguish
700 between a syscall stop and SIGTRAP delivery */ 739 between a syscall stop and SIGTRAP delivery */
740 /* Note that the debugger could change the result of test_thread_flag!*/
701 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0)); 741 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0));
702 742
703 /* 743 /*
@@ -709,9 +749,16 @@ void do_syscall_trace(struct pt_regs *regs, int entryexit)
709 send_sig(current->exit_code, current, 1); 749 send_sig(current->exit_code, current, 1);
710 current->exit_code = 0; 750 current->exit_code = 0;
711 } 751 }
752 ret = is_sysemu;
712 out: 753 out:
713 if (unlikely(current->audit_context) && !entryexit) 754 if (unlikely(current->audit_context) && !entryexit)
714 audit_syscall_entry(current, AUDIT_ARCH_I386, regs->orig_eax, 755 audit_syscall_entry(current, AUDIT_ARCH_I386, regs->orig_eax,
715 regs->ebx, regs->ecx, regs->edx, regs->esi); 756 regs->ebx, regs->ecx, regs->edx, regs->esi);
757 if (ret == 0)
758 return 0;
716 759
760 regs->orig_eax = -1; /* force skip of syscall restarting */
761 if (unlikely(current->audit_context))
762 audit_syscall_exit(current, AUDITSC_RESULT(regs->eax), regs->eax);
763 return 1;
717} 764}
diff --git a/arch/i386/kernel/reboot.c b/arch/i386/kernel/reboot.c
index c71fef31dc47..1cbb9c0f4704 100644
--- a/arch/i386/kernel/reboot.c
+++ b/arch/i386/kernel/reboot.c
@@ -13,6 +13,7 @@
13#include <linux/dmi.h> 13#include <linux/dmi.h>
14#include <asm/uaccess.h> 14#include <asm/uaccess.h>
15#include <asm/apic.h> 15#include <asm/apic.h>
16#include <asm/desc.h>
16#include "mach_reboot.h" 17#include "mach_reboot.h"
17#include <linux/reboot_fixups.h> 18#include <linux/reboot_fixups.h>
18 19
@@ -242,13 +243,13 @@ void machine_real_restart(unsigned char *code, int length)
242 243
243 /* Set up the IDT for real mode. */ 244 /* Set up the IDT for real mode. */
244 245
245 __asm__ __volatile__ ("lidt %0" : : "m" (real_mode_idt)); 246 load_idt(&real_mode_idt);
246 247
247 /* Set up a GDT from which we can load segment descriptors for real 248 /* Set up a GDT from which we can load segment descriptors for real
248 mode. The GDT is not used in real mode; it is just needed here to 249 mode. The GDT is not used in real mode; it is just needed here to
249 prepare the descriptors. */ 250 prepare the descriptors. */
250 251
251 __asm__ __volatile__ ("lgdt %0" : : "m" (real_mode_gdt)); 252 load_gdt(&real_mode_gdt);
252 253
253 /* Load the data segment registers, and thus the descriptors ready for 254 /* Load the data segment registers, and thus the descriptors ready for
254 real mode. The base address of each segment is 0x100, 16 times the 255 real mode. The base address of each segment is 0x100, 16 times the
@@ -316,7 +317,7 @@ void machine_emergency_restart(void)
316 if (!reboot_thru_bios) { 317 if (!reboot_thru_bios) {
317 if (efi_enabled) { 318 if (efi_enabled) {
318 efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL); 319 efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
319 __asm__ __volatile__("lidt %0": :"m" (no_idt)); 320 load_idt(&no_idt);
320 __asm__ __volatile__("int3"); 321 __asm__ __volatile__("int3");
321 } 322 }
322 /* rebooting needs to touch the page at absolute addr 0 */ 323 /* rebooting needs to touch the page at absolute addr 0 */
@@ -325,7 +326,7 @@ void machine_emergency_restart(void)
325 mach_reboot_fixups(); /* for board specific fixups */ 326 mach_reboot_fixups(); /* for board specific fixups */
326 mach_reboot(); 327 mach_reboot();
327 /* That didn't work - force a triple fault.. */ 328 /* That didn't work - force a triple fault.. */
328 __asm__ __volatile__("lidt %0": :"m" (no_idt)); 329 load_idt(&no_idt);
329 __asm__ __volatile__("int3"); 330 __asm__ __volatile__("int3");
330 } 331 }
331 } 332 }
diff --git a/arch/i386/kernel/semaphore.c b/arch/i386/kernel/semaphore.c
index 469f496e55c0..7455ab643943 100644
--- a/arch/i386/kernel/semaphore.c
+++ b/arch/i386/kernel/semaphore.c
@@ -13,171 +13,9 @@
13 * rw semaphores implemented November 1999 by Benjamin LaHaise <bcrl@kvack.org> 13 * rw semaphores implemented November 1999 by Benjamin LaHaise <bcrl@kvack.org>
14 */ 14 */
15#include <linux/config.h> 15#include <linux/config.h>
16#include <linux/sched.h>
17#include <linux/err.h>
18#include <linux/init.h>
19#include <asm/semaphore.h> 16#include <asm/semaphore.h>
20 17
21/* 18/*
22 * Semaphores are implemented using a two-way counter:
23 * The "count" variable is decremented for each process
24 * that tries to acquire the semaphore, while the "sleeping"
25 * variable is a count of such acquires.
26 *
27 * Notably, the inline "up()" and "down()" functions can
28 * efficiently test if they need to do any extra work (up
29 * needs to do something only if count was negative before
30 * the increment operation.
31 *
32 * "sleeping" and the contention routine ordering is protected
33 * by the spinlock in the semaphore's waitqueue head.
34 *
35 * Note that these functions are only called when there is
36 * contention on the lock, and as such all this is the
37 * "non-critical" part of the whole semaphore business. The
38 * critical part is the inline stuff in <asm/semaphore.h>
39 * where we want to avoid any extra jumps and calls.
40 */
41
42/*
43 * Logic:
44 * - only on a boundary condition do we need to care. When we go
45 * from a negative count to a non-negative, we wake people up.
46 * - when we go from a non-negative count to a negative do we
47 * (a) synchronize with the "sleeper" count and (b) make sure
48 * that we're on the wakeup list before we synchronize so that
49 * we cannot lose wakeup events.
50 */
51
52static fastcall void __attribute_used__ __up(struct semaphore *sem)
53{
54 wake_up(&sem->wait);
55}
56
57static fastcall void __attribute_used__ __sched __down(struct semaphore * sem)
58{
59 struct task_struct *tsk = current;
60 DECLARE_WAITQUEUE(wait, tsk);
61 unsigned long flags;
62
63 tsk->state = TASK_UNINTERRUPTIBLE;
64 spin_lock_irqsave(&sem->wait.lock, flags);
65 add_wait_queue_exclusive_locked(&sem->wait, &wait);
66
67 sem->sleepers++;
68 for (;;) {
69 int sleepers = sem->sleepers;
70
71 /*
72 * Add "everybody else" into it. They aren't
73 * playing, because we own the spinlock in
74 * the wait_queue_head.
75 */
76 if (!atomic_add_negative(sleepers - 1, &sem->count)) {
77 sem->sleepers = 0;
78 break;
79 }
80 sem->sleepers = 1; /* us - see -1 above */
81 spin_unlock_irqrestore(&sem->wait.lock, flags);
82
83 schedule();
84
85 spin_lock_irqsave(&sem->wait.lock, flags);
86 tsk->state = TASK_UNINTERRUPTIBLE;
87 }
88 remove_wait_queue_locked(&sem->wait, &wait);
89 wake_up_locked(&sem->wait);
90 spin_unlock_irqrestore(&sem->wait.lock, flags);
91 tsk->state = TASK_RUNNING;
92}
93
94static fastcall int __attribute_used__ __sched __down_interruptible(struct semaphore * sem)
95{
96 int retval = 0;
97 struct task_struct *tsk = current;
98 DECLARE_WAITQUEUE(wait, tsk);
99 unsigned long flags;
100
101 tsk->state = TASK_INTERRUPTIBLE;
102 spin_lock_irqsave(&sem->wait.lock, flags);
103 add_wait_queue_exclusive_locked(&sem->wait, &wait);
104
105 sem->sleepers++;
106 for (;;) {
107 int sleepers = sem->sleepers;
108
109 /*
110 * With signals pending, this turns into
111 * the trylock failure case - we won't be
112 * sleeping, and we* can't get the lock as
113 * it has contention. Just correct the count
114 * and exit.
115 */
116 if (signal_pending(current)) {
117 retval = -EINTR;
118 sem->sleepers = 0;
119 atomic_add(sleepers, &sem->count);
120 break;
121 }
122
123 /*
124 * Add "everybody else" into it. They aren't
125 * playing, because we own the spinlock in
126 * wait_queue_head. The "-1" is because we're
127 * still hoping to get the semaphore.
128 */
129 if (!atomic_add_negative(sleepers - 1, &sem->count)) {
130 sem->sleepers = 0;
131 break;
132 }
133 sem->sleepers = 1; /* us - see -1 above */
134 spin_unlock_irqrestore(&sem->wait.lock, flags);
135
136 schedule();
137
138 spin_lock_irqsave(&sem->wait.lock, flags);
139 tsk->state = TASK_INTERRUPTIBLE;
140 }
141 remove_wait_queue_locked(&sem->wait, &wait);
142 wake_up_locked(&sem->wait);
143 spin_unlock_irqrestore(&sem->wait.lock, flags);
144
145 tsk->state = TASK_RUNNING;
146 return retval;
147}
148
149/*
150 * Trylock failed - make sure we correct for
151 * having decremented the count.
152 *
153 * We could have done the trylock with a
154 * single "cmpxchg" without failure cases,
155 * but then it wouldn't work on a 386.
156 */
157static fastcall int __attribute_used__ __down_trylock(struct semaphore * sem)
158{
159 int sleepers;
160 unsigned long flags;
161
162 spin_lock_irqsave(&sem->wait.lock, flags);
163 sleepers = sem->sleepers + 1;
164 sem->sleepers = 0;
165
166 /*
167 * Add "everybody else" and us into it. They aren't
168 * playing, because we own the spinlock in the
169 * wait_queue_head.
170 */
171 if (!atomic_add_negative(sleepers, &sem->count)) {
172 wake_up_locked(&sem->wait);
173 }
174
175 spin_unlock_irqrestore(&sem->wait.lock, flags);
176 return 1;
177}
178
179
180/*
181 * The semaphore operations have a special calling sequence that 19 * The semaphore operations have a special calling sequence that
182 * allow us to do a simpler in-line version of them. These routines 20 * allow us to do a simpler in-line version of them. These routines
183 * need to convert that sequence back into the C sequence when 21 * need to convert that sequence back into the C sequence when
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index af4de58cab54..294bcca985ab 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -370,12 +370,16 @@ static void __init limit_regions(unsigned long long size)
370 int i; 370 int i;
371 371
372 if (efi_enabled) { 372 if (efi_enabled) {
373 for (i = 0; i < memmap.nr_map; i++) { 373 efi_memory_desc_t *md;
374 current_addr = memmap.map[i].phys_addr + 374 void *p;
375 (memmap.map[i].num_pages << 12); 375
376 if (memmap.map[i].type == EFI_CONVENTIONAL_MEMORY) { 376 for (p = memmap.map, i = 0; p < memmap.map_end;
377 p += memmap.desc_size, i++) {
378 md = p;
379 current_addr = md->phys_addr + (md->num_pages << 12);
380 if (md->type == EFI_CONVENTIONAL_MEMORY) {
377 if (current_addr >= size) { 381 if (current_addr >= size) {
378 memmap.map[i].num_pages -= 382 md->num_pages -=
379 (((current_addr-size) + PAGE_SIZE-1) >> PAGE_SHIFT); 383 (((current_addr-size) + PAGE_SIZE-1) >> PAGE_SHIFT);
380 memmap.nr_map = i + 1; 384 memmap.nr_map = i + 1;
381 return; 385 return;
@@ -1581,8 +1585,14 @@ void __init setup_arch(char **cmdline_p)
1581 */ 1585 */
1582 acpi_boot_table_init(); 1586 acpi_boot_table_init();
1583 acpi_boot_init(); 1587 acpi_boot_init();
1584#endif
1585 1588
1589#if defined(CONFIG_SMP) && defined(CONFIG_X86_PC)
1590 if (def_to_bigsmp)
1591 printk(KERN_WARNING "More than 8 CPUs detected and "
1592 "CONFIG_X86_PC cannot handle it.\nUse "
1593 "CONFIG_X86_GENERICARCH or CONFIG_X86_BIGSMP.\n");
1594#endif
1595#endif
1586#ifdef CONFIG_X86_LOCAL_APIC 1596#ifdef CONFIG_X86_LOCAL_APIC
1587 if (smp_found_config) 1597 if (smp_found_config)
1588 get_smp_config(); 1598 get_smp_config();
diff --git a/arch/i386/kernel/signal.c b/arch/i386/kernel/signal.c
index 140e340569c6..61eb0c8a6e47 100644
--- a/arch/i386/kernel/signal.c
+++ b/arch/i386/kernel/signal.c
@@ -278,9 +278,9 @@ setup_sigcontext(struct sigcontext __user *sc, struct _fpstate __user *fpstate,
278 int tmp, err = 0; 278 int tmp, err = 0;
279 279
280 tmp = 0; 280 tmp = 0;
281 __asm__("movl %%gs,%0" : "=r"(tmp): "0"(tmp)); 281 savesegment(gs, tmp);
282 err |= __put_user(tmp, (unsigned int __user *)&sc->gs); 282 err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
283 __asm__("movl %%fs,%0" : "=r"(tmp): "0"(tmp)); 283 savesegment(fs, tmp);
284 err |= __put_user(tmp, (unsigned int __user *)&sc->fs); 284 err |= __put_user(tmp, (unsigned int __user *)&sc->fs);
285 285
286 err |= __put_user(regs->xes, (unsigned int __user *)&sc->es); 286 err |= __put_user(regs->xes, (unsigned int __user *)&sc->es);
@@ -604,7 +604,9 @@ int fastcall do_signal(struct pt_regs *regs, sigset_t *oldset)
604 * We want the common case to go fast, which 604 * We want the common case to go fast, which
605 * is why we may in certain cases get here from 605 * is why we may in certain cases get here from
606 * kernel mode. Just return without doing anything 606 * kernel mode. Just return without doing anything
607 * if so. 607 * if so. vm86 regs switched out by assembly code
608 * before reaching here, so testing against kernel
609 * CS suffices.
608 */ 610 */
609 if (!user_mode(regs)) 611 if (!user_mode(regs))
610 return 1; 612 return 1;
diff --git a/arch/i386/kernel/smp.c b/arch/i386/kernel/smp.c
index cec4bde67161..48b55db3680f 100644
--- a/arch/i386/kernel/smp.c
+++ b/arch/i386/kernel/smp.c
@@ -576,7 +576,7 @@ static void stop_this_cpu (void * dummy)
576 local_irq_disable(); 576 local_irq_disable();
577 disable_local_APIC(); 577 disable_local_APIC();
578 if (cpu_data[smp_processor_id()].hlt_works_ok) 578 if (cpu_data[smp_processor_id()].hlt_works_ok)
579 for(;;) __asm__("hlt"); 579 for(;;) halt();
580 for (;;); 580 for (;;);
581} 581}
582 582
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 8ac8e9fd5614..5e4893d2b9f2 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -88,6 +88,8 @@ EXPORT_SYMBOL(cpu_online_map);
88cpumask_t cpu_callin_map; 88cpumask_t cpu_callin_map;
89cpumask_t cpu_callout_map; 89cpumask_t cpu_callout_map;
90EXPORT_SYMBOL(cpu_callout_map); 90EXPORT_SYMBOL(cpu_callout_map);
91cpumask_t cpu_possible_map;
92EXPORT_SYMBOL(cpu_possible_map);
91static cpumask_t smp_commenced_mask; 93static cpumask_t smp_commenced_mask;
92 94
93/* TSC's upper 32 bits can't be written in eariler CPU (before prescott), there 95/* TSC's upper 32 bits can't be written in eariler CPU (before prescott), there
@@ -1017,8 +1019,8 @@ int __devinit smp_prepare_cpu(int cpu)
1017 tsc_sync_disabled = 1; 1019 tsc_sync_disabled = 1;
1018 1020
1019 /* init low mem mapping */ 1021 /* init low mem mapping */
1020 memcpy(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS, 1022 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
1021 sizeof(swapper_pg_dir[0]) * KERNEL_PGD_PTRS); 1023 KERNEL_PGD_PTRS);
1022 flush_tlb_all(); 1024 flush_tlb_all();
1023 schedule_work(&task); 1025 schedule_work(&task);
1024 wait_for_completion(&done); 1026 wait_for_completion(&done);
@@ -1265,6 +1267,7 @@ void __devinit smp_prepare_boot_cpu(void)
1265 cpu_set(smp_processor_id(), cpu_online_map); 1267 cpu_set(smp_processor_id(), cpu_online_map);
1266 cpu_set(smp_processor_id(), cpu_callout_map); 1268 cpu_set(smp_processor_id(), cpu_callout_map);
1267 cpu_set(smp_processor_id(), cpu_present_map); 1269 cpu_set(smp_processor_id(), cpu_present_map);
1270 cpu_set(smp_processor_id(), cpu_possible_map);
1268 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 1271 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
1269} 1272}
1270 1273
diff --git a/arch/i386/kernel/time.c b/arch/i386/kernel/time.c
index 0ee9dee8af06..6f794a78ee1e 100644
--- a/arch/i386/kernel/time.c
+++ b/arch/i386/kernel/time.c
@@ -383,6 +383,7 @@ void notify_arch_cmos_timer(void)
383 383
384static long clock_cmos_diff, sleep_start; 384static long clock_cmos_diff, sleep_start;
385 385
386static struct timer_opts *last_timer;
386static int timer_suspend(struct sys_device *dev, pm_message_t state) 387static int timer_suspend(struct sys_device *dev, pm_message_t state)
387{ 388{
388 /* 389 /*
@@ -391,6 +392,10 @@ static int timer_suspend(struct sys_device *dev, pm_message_t state)
391 clock_cmos_diff = -get_cmos_time(); 392 clock_cmos_diff = -get_cmos_time();
392 clock_cmos_diff += get_seconds(); 393 clock_cmos_diff += get_seconds();
393 sleep_start = get_cmos_time(); 394 sleep_start = get_cmos_time();
395 last_timer = cur_timer;
396 cur_timer = &timer_none;
397 if (last_timer->suspend)
398 last_timer->suspend(state);
394 return 0; 399 return 0;
395} 400}
396 401
@@ -404,6 +409,7 @@ static int timer_resume(struct sys_device *dev)
404 if (is_hpet_enabled()) 409 if (is_hpet_enabled())
405 hpet_reenable(); 410 hpet_reenable();
406#endif 411#endif
412 setup_pit_timer();
407 sec = get_cmos_time() + clock_cmos_diff; 413 sec = get_cmos_time() + clock_cmos_diff;
408 sleep_length = (get_cmos_time() - sleep_start) * HZ; 414 sleep_length = (get_cmos_time() - sleep_start) * HZ;
409 write_seqlock_irqsave(&xtime_lock, flags); 415 write_seqlock_irqsave(&xtime_lock, flags);
@@ -412,6 +418,10 @@ static int timer_resume(struct sys_device *dev)
412 write_sequnlock_irqrestore(&xtime_lock, flags); 418 write_sequnlock_irqrestore(&xtime_lock, flags);
413 jiffies += sleep_length; 419 jiffies += sleep_length;
414 wall_jiffies += sleep_length; 420 wall_jiffies += sleep_length;
421 if (last_timer->resume)
422 last_timer->resume();
423 cur_timer = last_timer;
424 last_timer = NULL;
415 return 0; 425 return 0;
416} 426}
417 427
diff --git a/arch/i386/kernel/timers/timer_hpet.c b/arch/i386/kernel/timers/timer_hpet.c
index ef8dac5dd33b..001de97c9e4a 100644
--- a/arch/i386/kernel/timers/timer_hpet.c
+++ b/arch/i386/kernel/timers/timer_hpet.c
@@ -136,6 +136,8 @@ static void delay_hpet(unsigned long loops)
136 } while ((hpet_end - hpet_start) < (loops)); 136 } while ((hpet_end - hpet_start) < (loops));
137} 137}
138 138
139static struct timer_opts timer_hpet;
140
139static int __init init_hpet(char* override) 141static int __init init_hpet(char* override)
140{ 142{
141 unsigned long result, remain; 143 unsigned long result, remain;
@@ -163,6 +165,8 @@ static int __init init_hpet(char* override)
163 } 165 }
164 set_cyc2ns_scale(cpu_khz/1000); 166 set_cyc2ns_scale(cpu_khz/1000);
165 } 167 }
168 /* set this only when cpu_has_tsc */
169 timer_hpet.read_timer = read_timer_tsc;
166 } 170 }
167 171
168 /* 172 /*
@@ -177,6 +181,19 @@ static int __init init_hpet(char* override)
177 return 0; 181 return 0;
178} 182}
179 183
184static int hpet_resume(void)
185{
186 write_seqlock(&monotonic_lock);
187 /* Assume this is the last mark offset time */
188 rdtsc(last_tsc_low, last_tsc_high);
189
190 if (hpet_use_timer)
191 hpet_last = hpet_readl(HPET_T0_CMP) - hpet_tick;
192 else
193 hpet_last = hpet_readl(HPET_COUNTER);
194 write_sequnlock(&monotonic_lock);
195 return 0;
196}
180/************************************************************/ 197/************************************************************/
181 198
182/* tsc timer_opts struct */ 199/* tsc timer_opts struct */
@@ -186,7 +203,7 @@ static struct timer_opts timer_hpet __read_mostly = {
186 .get_offset = get_offset_hpet, 203 .get_offset = get_offset_hpet,
187 .monotonic_clock = monotonic_clock_hpet, 204 .monotonic_clock = monotonic_clock_hpet,
188 .delay = delay_hpet, 205 .delay = delay_hpet,
189 .read_timer = read_timer_tsc, 206 .resume = hpet_resume,
190}; 207};
191 208
192struct init_timer_opts __initdata timer_hpet_init = { 209struct init_timer_opts __initdata timer_hpet_init = {
diff --git a/arch/i386/kernel/timers/timer_pit.c b/arch/i386/kernel/timers/timer_pit.c
index 06de036a820c..eddb64038234 100644
--- a/arch/i386/kernel/timers/timer_pit.c
+++ b/arch/i386/kernel/timers/timer_pit.c
@@ -175,30 +175,3 @@ void setup_pit_timer(void)
175 outb(LATCH >> 8 , PIT_CH0); /* MSB */ 175 outb(LATCH >> 8 , PIT_CH0); /* MSB */
176 spin_unlock_irqrestore(&i8253_lock, flags); 176 spin_unlock_irqrestore(&i8253_lock, flags);
177} 177}
178
179static int timer_resume(struct sys_device *dev)
180{
181 setup_pit_timer();
182 return 0;
183}
184
185static struct sysdev_class timer_sysclass = {
186 set_kset_name("timer_pit"),
187 .resume = timer_resume,
188};
189
190static struct sys_device device_timer = {
191 .id = 0,
192 .cls = &timer_sysclass,
193};
194
195static int __init init_timer_sysfs(void)
196{
197 int error = sysdev_class_register(&timer_sysclass);
198 if (!error)
199 error = sysdev_register(&device_timer);
200 return error;
201}
202
203device_initcall(init_timer_sysfs);
204
diff --git a/arch/i386/kernel/timers/timer_pm.c b/arch/i386/kernel/timers/timer_pm.c
index 4ef20e663498..264edaaac315 100644
--- a/arch/i386/kernel/timers/timer_pm.c
+++ b/arch/i386/kernel/timers/timer_pm.c
@@ -186,6 +186,14 @@ static void mark_offset_pmtmr(void)
186 } 186 }
187} 187}
188 188
189static int pmtmr_resume(void)
190{
191 write_seqlock(&monotonic_lock);
192 /* Assume this is the last mark offset time */
193 offset_tick = read_pmtmr();
194 write_sequnlock(&monotonic_lock);
195 return 0;
196}
189 197
190static unsigned long long monotonic_clock_pmtmr(void) 198static unsigned long long monotonic_clock_pmtmr(void)
191{ 199{
@@ -247,6 +255,7 @@ static struct timer_opts timer_pmtmr = {
247 .monotonic_clock = monotonic_clock_pmtmr, 255 .monotonic_clock = monotonic_clock_pmtmr,
248 .delay = delay_pmtmr, 256 .delay = delay_pmtmr,
249 .read_timer = read_timer_tsc, 257 .read_timer = read_timer_tsc,
258 .resume = pmtmr_resume,
250}; 259};
251 260
252struct init_timer_opts __initdata timer_pmtmr_init = { 261struct init_timer_opts __initdata timer_pmtmr_init = {
diff --git a/arch/i386/kernel/timers/timer_tsc.c b/arch/i386/kernel/timers/timer_tsc.c
index 8f4e4d5bc560..6dd470cc9f72 100644
--- a/arch/i386/kernel/timers/timer_tsc.c
+++ b/arch/i386/kernel/timers/timer_tsc.c
@@ -543,6 +543,19 @@ static int __init init_tsc(char* override)
543 return -ENODEV; 543 return -ENODEV;
544} 544}
545 545
546static int tsc_resume(void)
547{
548 write_seqlock(&monotonic_lock);
549 /* Assume this is the last mark offset time */
550 rdtsc(last_tsc_low, last_tsc_high);
551#ifdef CONFIG_HPET_TIMER
552 if (is_hpet_enabled() && hpet_use_timer)
553 hpet_last = hpet_readl(HPET_COUNTER);
554#endif
555 write_sequnlock(&monotonic_lock);
556 return 0;
557}
558
546#ifndef CONFIG_X86_TSC 559#ifndef CONFIG_X86_TSC
547/* disable flag for tsc. Takes effect by clearing the TSC cpu flag 560/* disable flag for tsc. Takes effect by clearing the TSC cpu flag
548 * in cpu/common.c */ 561 * in cpu/common.c */
@@ -573,6 +586,7 @@ static struct timer_opts timer_tsc = {
573 .monotonic_clock = monotonic_clock_tsc, 586 .monotonic_clock = monotonic_clock_tsc,
574 .delay = delay_tsc, 587 .delay = delay_tsc,
575 .read_timer = read_timer_tsc, 588 .read_timer = read_timer_tsc,
589 .resume = tsc_resume,
576}; 590};
577 591
578struct init_timer_opts __initdata timer_tsc_init = { 592struct init_timer_opts __initdata timer_tsc_init = {
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index cd2d5d5514fe..54629bb5893a 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -210,7 +210,7 @@ void show_registers(struct pt_regs *regs)
210 unsigned short ss; 210 unsigned short ss;
211 211
212 esp = (unsigned long) (&regs->esp); 212 esp = (unsigned long) (&regs->esp);
213 ss = __KERNEL_DS; 213 savesegment(ss, ss);
214 if (user_mode(regs)) { 214 if (user_mode(regs)) {
215 in_kernel = 0; 215 in_kernel = 0;
216 esp = regs->esp; 216 esp = regs->esp;
@@ -267,9 +267,6 @@ static void handle_BUG(struct pt_regs *regs)
267 char c; 267 char c;
268 unsigned long eip; 268 unsigned long eip;
269 269
270 if (user_mode(regs))
271 goto no_bug; /* Not in kernel */
272
273 eip = regs->eip; 270 eip = regs->eip;
274 271
275 if (eip < PAGE_OFFSET) 272 if (eip < PAGE_OFFSET)
@@ -568,6 +565,10 @@ static DEFINE_SPINLOCK(nmi_print_lock);
568 565
569void die_nmi (struct pt_regs *regs, const char *msg) 566void die_nmi (struct pt_regs *regs, const char *msg)
570{ 567{
568 if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 0, SIGINT) ==
569 NOTIFY_STOP)
570 return;
571
571 spin_lock(&nmi_print_lock); 572 spin_lock(&nmi_print_lock);
572 /* 573 /*
573 * We are in trouble anyway, lets at least try 574 * We are in trouble anyway, lets at least try
@@ -1008,7 +1009,7 @@ void __init trap_init_f00f_bug(void)
1008 * it uses the read-only mapped virtual address. 1009 * it uses the read-only mapped virtual address.
1009 */ 1010 */
1010 idt_descr.address = fix_to_virt(FIX_F00F_IDT); 1011 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
1011 __asm__ __volatile__("lidt %0" : : "m" (idt_descr)); 1012 load_idt(&idt_descr);
1012} 1013}
1013#endif 1014#endif
1014 1015
diff --git a/arch/i386/kernel/vm86.c b/arch/i386/kernel/vm86.c
index ec0f68ce6886..16b485009622 100644
--- a/arch/i386/kernel/vm86.c
+++ b/arch/i386/kernel/vm86.c
@@ -294,8 +294,8 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk
294 */ 294 */
295 info->regs32->eax = 0; 295 info->regs32->eax = 0;
296 tsk->thread.saved_esp0 = tsk->thread.esp0; 296 tsk->thread.saved_esp0 = tsk->thread.esp0;
297 asm volatile("mov %%fs,%0":"=m" (tsk->thread.saved_fs)); 297 savesegment(fs, tsk->thread.saved_fs);
298 asm volatile("mov %%gs,%0":"=m" (tsk->thread.saved_gs)); 298 savesegment(gs, tsk->thread.saved_gs);
299 299
300 tss = &per_cpu(init_tss, get_cpu()); 300 tss = &per_cpu(init_tss, get_cpu());
301 tsk->thread.esp0 = (unsigned long) &info->VM86_TSS_ESP0; 301 tsk->thread.esp0 = (unsigned long) &info->VM86_TSS_ESP0;
@@ -542,7 +542,7 @@ void handle_vm86_fault(struct kernel_vm86_regs * regs, long error_code)
542 unsigned char opcode; 542 unsigned char opcode;
543 unsigned char __user *csp; 543 unsigned char __user *csp;
544 unsigned char __user *ssp; 544 unsigned char __user *ssp;
545 unsigned short ip, sp; 545 unsigned short ip, sp, orig_flags;
546 int data32, pref_done; 546 int data32, pref_done;
547 547
548#define CHECK_IF_IN_TRAP \ 548#define CHECK_IF_IN_TRAP \
@@ -551,8 +551,12 @@ void handle_vm86_fault(struct kernel_vm86_regs * regs, long error_code)
551#define VM86_FAULT_RETURN do { \ 551#define VM86_FAULT_RETURN do { \
552 if (VMPI.force_return_for_pic && (VEFLAGS & (IF_MASK | VIF_MASK))) \ 552 if (VMPI.force_return_for_pic && (VEFLAGS & (IF_MASK | VIF_MASK))) \
553 return_to_32bit(regs, VM86_PICRETURN); \ 553 return_to_32bit(regs, VM86_PICRETURN); \
554 if (orig_flags & TF_MASK) \
555 handle_vm86_trap(regs, 0, 1); \
554 return; } while (0) 556 return; } while (0)
555 557
558 orig_flags = *(unsigned short *)&regs->eflags;
559
556 csp = (unsigned char __user *) (regs->cs << 4); 560 csp = (unsigned char __user *) (regs->cs << 4);
557 ssp = (unsigned char __user *) (regs->ss << 4); 561 ssp = (unsigned char __user *) (regs->ss << 4);
558 sp = SP(regs); 562 sp = SP(regs);
diff --git a/arch/i386/kernel/vsyscall-sigreturn.S b/arch/i386/kernel/vsyscall-sigreturn.S
index c8fcf75b9be3..68afa50dd7cf 100644
--- a/arch/i386/kernel/vsyscall-sigreturn.S
+++ b/arch/i386/kernel/vsyscall-sigreturn.S
@@ -15,7 +15,7 @@
15*/ 15*/
16 16
17 .text 17 .text
18 .org __kernel_vsyscall+32 18 .org __kernel_vsyscall+32,0x90
19 .globl __kernel_sigreturn 19 .globl __kernel_sigreturn
20 .type __kernel_sigreturn,@function 20 .type __kernel_sigreturn,@function
21__kernel_sigreturn: 21__kernel_sigreturn:
@@ -35,6 +35,7 @@ __kernel_rt_sigreturn:
35 int $0x80 35 int $0x80
36.LEND_rt_sigreturn: 36.LEND_rt_sigreturn:
37 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn 37 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
38 .balign 32
38 .previous 39 .previous
39 40
40 .section .eh_frame,"a",@progbits 41 .section .eh_frame,"a",@progbits
diff --git a/arch/i386/mach-es7000/es7000.h b/arch/i386/mach-es7000/es7000.h
index 70691f0c4ce2..898ed905e119 100644
--- a/arch/i386/mach-es7000/es7000.h
+++ b/arch/i386/mach-es7000/es7000.h
@@ -104,7 +104,8 @@ struct mip_reg {
104#define MIP_SW_APIC 0x1020b 104#define MIP_SW_APIC 0x1020b
105#define MIP_FUNC(VALUE) (VALUE & 0xff) 105#define MIP_FUNC(VALUE) (VALUE & 0xff)
106 106
107extern int parse_unisys_oem (char *oemptr, int oem_entries); 107extern int parse_unisys_oem (char *oemptr);
108extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length); 108extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
109extern void setup_unisys ();
109extern int es7000_start_cpu(int cpu, unsigned long eip); 110extern int es7000_start_cpu(int cpu, unsigned long eip);
110extern void es7000_sw_apic(void); 111extern void es7000_sw_apic(void);
diff --git a/arch/i386/mach-es7000/es7000plat.c b/arch/i386/mach-es7000/es7000plat.c
index d5936d500479..2000bdca2fc2 100644
--- a/arch/i386/mach-es7000/es7000plat.c
+++ b/arch/i386/mach-es7000/es7000plat.c
@@ -75,12 +75,29 @@ es7000_rename_gsi(int ioapic, int gsi)
75 75
76#endif // (CONFIG_X86_IO_APIC) && (CONFIG_ACPI_INTERPRETER || CONFIG_ACPI_BOOT) 76#endif // (CONFIG_X86_IO_APIC) && (CONFIG_ACPI_INTERPRETER || CONFIG_ACPI_BOOT)
77 77
78void __init
79setup_unisys ()
80{
81 /*
82 * Determine the generation of the ES7000 currently running.
83 *
84 * es7000_plat = 1 if the machine is a 5xx ES7000 box
85 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
86 *
87 */
88 if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
89 es7000_plat = 2;
90 else
91 es7000_plat = 1;
92 ioapic_renumber_irq = es7000_rename_gsi;
93}
94
78/* 95/*
79 * Parse the OEM Table 96 * Parse the OEM Table
80 */ 97 */
81 98
82int __init 99int __init
83parse_unisys_oem (char *oemptr, int oem_entries) 100parse_unisys_oem (char *oemptr)
84{ 101{
85 int i; 102 int i;
86 int success = 0; 103 int success = 0;
@@ -95,7 +112,7 @@ parse_unisys_oem (char *oemptr, int oem_entries)
95 112
96 tp += 8; 113 tp += 8;
97 114
98 for (i=0; i <= oem_entries; i++) { 115 for (i=0; i <= 6; i++) {
99 type = *tp++; 116 type = *tp++;
100 size = *tp++; 117 size = *tp++;
101 tp -= 2; 118 tp -= 2;
@@ -130,34 +147,18 @@ parse_unisys_oem (char *oemptr, int oem_entries)
130 default: 147 default:
131 break; 148 break;
132 } 149 }
133 if (i == 6) break;
134 tp += size; 150 tp += size;
135 } 151 }
136 152
137 if (success < 2) { 153 if (success < 2) {
138 es7000_plat = 0; 154 es7000_plat = 0;
139 } else { 155 } else
140 printk("\nEnabling ES7000 specific features...\n"); 156 setup_unisys();
141 /*
142 * Determine the generation of the ES7000 currently running.
143 *
144 * es7000_plat = 0 if the machine is NOT a Unisys ES7000 box
145 * es7000_plat = 1 if the machine is a 5xx ES7000 box
146 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
147 *
148 */
149 if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
150 es7000_plat = 2;
151 else
152 es7000_plat = 1;
153
154 ioapic_renumber_irq = es7000_rename_gsi;
155 }
156 return es7000_plat; 157 return es7000_plat;
157} 158}
158 159
159int __init 160int __init
160find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length) 161find_unisys_acpi_oem_table(unsigned long *oem_addr)
161{ 162{
162 struct acpi_table_rsdp *rsdp = NULL; 163 struct acpi_table_rsdp *rsdp = NULL;
163 unsigned long rsdp_phys = 0; 164 unsigned long rsdp_phys = 0;
@@ -201,13 +202,11 @@ find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length)
201 acpi_table_print(header, sdt.entry[i].pa); 202 acpi_table_print(header, sdt.entry[i].pa);
202 t = (struct oem_table *) __acpi_map_table(sdt.entry[i].pa, header->length); 203 t = (struct oem_table *) __acpi_map_table(sdt.entry[i].pa, header->length);
203 addr = (void *) __acpi_map_table(t->OEMTableAddr, t->OEMTableSize); 204 addr = (void *) __acpi_map_table(t->OEMTableAddr, t->OEMTableSize);
204 *length = header->length;
205 *oem_addr = (unsigned long) addr; 205 *oem_addr = (unsigned long) addr;
206 return 0; 206 return 0;
207 } 207 }
208 } 208 }
209 } 209 }
210 Dprintk("ES7000: did not find Unisys ACPI OEM table!\n");
211 return -1; 210 return -1;
212} 211}
213 212
diff --git a/arch/i386/mach-generic/bigsmp.c b/arch/i386/mach-generic/bigsmp.c
index 25883b44f625..037b2af1a1f4 100644
--- a/arch/i386/mach-generic/bigsmp.c
+++ b/arch/i386/mach-generic/bigsmp.c
@@ -47,7 +47,10 @@ static struct dmi_system_id __initdata bigsmp_dmi_table[] = {
47 47
48static __init int probe_bigsmp(void) 48static __init int probe_bigsmp(void)
49{ 49{
50 dmi_check_system(bigsmp_dmi_table); 50 if (def_to_bigsmp)
51 dmi_bigsmp = 1;
52 else
53 dmi_check_system(bigsmp_dmi_table);
51 return dmi_bigsmp; 54 return dmi_bigsmp;
52} 55}
53 56
diff --git a/arch/i386/mach-generic/probe.c b/arch/i386/mach-generic/probe.c
index 5497c65a8790..cea5b3ce4b57 100644
--- a/arch/i386/mach-generic/probe.c
+++ b/arch/i386/mach-generic/probe.c
@@ -30,6 +30,25 @@ struct genapic *apic_probe[] __initdata = {
30 NULL, 30 NULL,
31}; 31};
32 32
33static int cmdline_apic;
34
35void __init generic_bigsmp_probe(void)
36{
37 /*
38 * This routine is used to switch to bigsmp mode when
39 * - There is no apic= option specified by the user
40 * - generic_apic_probe() has choosen apic_default as the sub_arch
41 * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
42 */
43
44 if (!cmdline_apic && genapic == &apic_default)
45 if (apic_bigsmp.probe()) {
46 genapic = &apic_bigsmp;
47 printk(KERN_INFO "Overriding APIC driver with %s\n",
48 genapic->name);
49 }
50}
51
33void __init generic_apic_probe(char *command_line) 52void __init generic_apic_probe(char *command_line)
34{ 53{
35 char *s; 54 char *s;
@@ -52,6 +71,7 @@ void __init generic_apic_probe(char *command_line)
52 if (!changed) 71 if (!changed)
53 printk(KERN_ERR "Unknown genapic `%s' specified.\n", s); 72 printk(KERN_ERR "Unknown genapic `%s' specified.\n", s);
54 *p = old; 73 *p = old;
74 cmdline_apic = changed;
55 } 75 }
56 for (i = 0; !changed && apic_probe[i]; i++) { 76 for (i = 0; !changed && apic_probe[i]; i++) {
57 if (apic_probe[i]->probe()) { 77 if (apic_probe[i]->probe()) {
diff --git a/arch/i386/mach-voyager/voyager_basic.c b/arch/i386/mach-voyager/voyager_basic.c
index c6384061328a..cc69875d979b 100644
--- a/arch/i386/mach-voyager/voyager_basic.c
+++ b/arch/i386/mach-voyager/voyager_basic.c
@@ -234,10 +234,9 @@ voyager_power_off(void)
234#endif 234#endif
235 } 235 }
236 /* and wait for it to happen */ 236 /* and wait for it to happen */
237 for(;;) { 237 local_irq_disable();
238 __asm("cli"); 238 for(;;)
239 __asm("hlt"); 239 halt();
240 }
241} 240}
242 241
243/* copied from process.c */ 242/* copied from process.c */
@@ -278,10 +277,9 @@ machine_restart(char *cmd)
278 outb(basebd | 0x08, VOYAGER_MC_SETUP); 277 outb(basebd | 0x08, VOYAGER_MC_SETUP);
279 outb(0x02, catbase + 0x21); 278 outb(0x02, catbase + 0x21);
280 } 279 }
281 for(;;) { 280 local_irq_disable();
282 asm("cli"); 281 for(;;)
283 asm("hlt"); 282 halt();
284 }
285} 283}
286 284
287void 285void
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c
index 0e1f4208b07c..46b0cf4a31e0 100644
--- a/arch/i386/mach-voyager/voyager_smp.c
+++ b/arch/i386/mach-voyager/voyager_smp.c
@@ -242,6 +242,8 @@ static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
242cpumask_t cpu_callin_map = CPU_MASK_NONE; 242cpumask_t cpu_callin_map = CPU_MASK_NONE;
243cpumask_t cpu_callout_map = CPU_MASK_NONE; 243cpumask_t cpu_callout_map = CPU_MASK_NONE;
244EXPORT_SYMBOL(cpu_callout_map); 244EXPORT_SYMBOL(cpu_callout_map);
245cpumask_t cpu_possible_map = CPU_MASK_ALL;
246EXPORT_SYMBOL(cpu_possible_map);
245 247
246/* The per processor IRQ masks (these are usually kept in sync) */ 248/* The per processor IRQ masks (these are usually kept in sync) */
247static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned; 249static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
@@ -1015,7 +1017,7 @@ smp_stop_cpu_function(void *dummy)
1015 cpu_clear(smp_processor_id(), cpu_online_map); 1017 cpu_clear(smp_processor_id(), cpu_online_map);
1016 local_irq_disable(); 1018 local_irq_disable();
1017 for(;;) 1019 for(;;)
1018 __asm__("hlt"); 1020 halt();
1019} 1021}
1020 1022
1021static DEFINE_SPINLOCK(call_lock); 1023static DEFINE_SPINLOCK(call_lock);
@@ -1910,6 +1912,7 @@ void __devinit smp_prepare_boot_cpu(void)
1910{ 1912{
1911 cpu_set(smp_processor_id(), cpu_online_map); 1913 cpu_set(smp_processor_id(), cpu_online_map);
1912 cpu_set(smp_processor_id(), cpu_callout_map); 1914 cpu_set(smp_processor_id(), cpu_callout_map);
1915 cpu_set(smp_processor_id(), cpu_possible_map);
1913} 1916}
1914 1917
1915int __devinit 1918int __devinit
diff --git a/arch/i386/math-emu/get_address.c b/arch/i386/math-emu/get_address.c
index 91175738e948..9819b705efa4 100644
--- a/arch/i386/math-emu/get_address.c
+++ b/arch/i386/math-emu/get_address.c
@@ -155,7 +155,6 @@ static long pm_address(u_char FPU_modrm, u_char segment,
155{ 155{
156 struct desc_struct descriptor; 156 struct desc_struct descriptor;
157 unsigned long base_address, limit, address, seg_top; 157 unsigned long base_address, limit, address, seg_top;
158 unsigned short selector;
159 158
160 segment--; 159 segment--;
161 160
@@ -173,17 +172,11 @@ static long pm_address(u_char FPU_modrm, u_char segment,
173 /* fs and gs aren't used by the kernel, so they still have their 172 /* fs and gs aren't used by the kernel, so they still have their
174 user-space values. */ 173 user-space values. */
175 case PREFIX_FS_-1: 174 case PREFIX_FS_-1:
176 /* The cast is needed here to get gcc 2.8.0 to use a 16 bit register 175 /* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */
177 in the assembler statement. */ 176 savesegment(fs, addr->selector);
178
179 __asm__("mov %%fs,%0":"=r" (selector));
180 addr->selector = selector;
181 break; 177 break;
182 case PREFIX_GS_-1: 178 case PREFIX_GS_-1:
183 /* The cast is needed here to get gcc 2.8.0 to use a 16 bit register 179 savesegment(gs, addr->selector);
184 in the assembler statement. */
185 __asm__("mov %%gs,%0":"=r" (selector));
186 addr->selector = selector;
187 break; 180 break;
188 default: 181 default:
189 addr->selector = PM_REG_(segment); 182 addr->selector = PM_REG_(segment);
diff --git a/arch/i386/mm/fault.c b/arch/i386/mm/fault.c
index 8e90339d6eaa..411b8500ad1b 100644
--- a/arch/i386/mm/fault.c
+++ b/arch/i386/mm/fault.c
@@ -199,6 +199,18 @@ static inline int is_prefetch(struct pt_regs *regs, unsigned long addr,
199 return 0; 199 return 0;
200} 200}
201 201
202static noinline void force_sig_info_fault(int si_signo, int si_code,
203 unsigned long address, struct task_struct *tsk)
204{
205 siginfo_t info;
206
207 info.si_signo = si_signo;
208 info.si_errno = 0;
209 info.si_code = si_code;
210 info.si_addr = (void __user *)address;
211 force_sig_info(si_signo, &info, tsk);
212}
213
202fastcall void do_invalid_op(struct pt_regs *, unsigned long); 214fastcall void do_invalid_op(struct pt_regs *, unsigned long);
203 215
204/* 216/*
@@ -218,11 +230,10 @@ fastcall void do_page_fault(struct pt_regs *regs, unsigned long error_code)
218 struct vm_area_struct * vma; 230 struct vm_area_struct * vma;
219 unsigned long address; 231 unsigned long address;
220 unsigned long page; 232 unsigned long page;
221 int write; 233 int write, si_code;
222 siginfo_t info;
223 234
224 /* get the address */ 235 /* get the address */
225 __asm__("movl %%cr2,%0":"=r" (address)); 236 address = read_cr2();
226 237
227 if (notify_die(DIE_PAGE_FAULT, "page fault", regs, error_code, 14, 238 if (notify_die(DIE_PAGE_FAULT, "page fault", regs, error_code, 14,
228 SIGSEGV) == NOTIFY_STOP) 239 SIGSEGV) == NOTIFY_STOP)
@@ -233,7 +244,7 @@ fastcall void do_page_fault(struct pt_regs *regs, unsigned long error_code)
233 244
234 tsk = current; 245 tsk = current;
235 246
236 info.si_code = SEGV_MAPERR; 247 si_code = SEGV_MAPERR;
237 248
238 /* 249 /*
239 * We fault-in kernel-space virtual memory on-demand. The 250 * We fault-in kernel-space virtual memory on-demand. The
@@ -313,7 +324,7 @@ fastcall void do_page_fault(struct pt_regs *regs, unsigned long error_code)
313 * we can handle it.. 324 * we can handle it..
314 */ 325 */
315good_area: 326good_area:
316 info.si_code = SEGV_ACCERR; 327 si_code = SEGV_ACCERR;
317 write = 0; 328 write = 0;
318 switch (error_code & 3) { 329 switch (error_code & 3) {
319 default: /* 3: write, present */ 330 default: /* 3: write, present */
@@ -387,11 +398,7 @@ bad_area_nosemaphore:
387 /* Kernel addresses are always protection faults */ 398 /* Kernel addresses are always protection faults */
388 tsk->thread.error_code = error_code | (address >= TASK_SIZE); 399 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
389 tsk->thread.trap_no = 14; 400 tsk->thread.trap_no = 14;
390 info.si_signo = SIGSEGV; 401 force_sig_info_fault(SIGSEGV, si_code, address, tsk);
391 info.si_errno = 0;
392 /* info.si_code has been set above */
393 info.si_addr = (void __user *)address;
394 force_sig_info(SIGSEGV, &info, tsk);
395 return; 402 return;
396 } 403 }
397 404
@@ -446,7 +453,7 @@ no_context:
446 printk(" at virtual address %08lx\n",address); 453 printk(" at virtual address %08lx\n",address);
447 printk(KERN_ALERT " printing eip:\n"); 454 printk(KERN_ALERT " printing eip:\n");
448 printk("%08lx\n", regs->eip); 455 printk("%08lx\n", regs->eip);
449 asm("movl %%cr3,%0":"=r" (page)); 456 page = read_cr3();
450 page = ((unsigned long *) __va(page))[address >> 22]; 457 page = ((unsigned long *) __va(page))[address >> 22];
451 printk(KERN_ALERT "*pde = %08lx\n", page); 458 printk(KERN_ALERT "*pde = %08lx\n", page);
452 /* 459 /*
@@ -500,11 +507,7 @@ do_sigbus:
500 tsk->thread.cr2 = address; 507 tsk->thread.cr2 = address;
501 tsk->thread.error_code = error_code; 508 tsk->thread.error_code = error_code;
502 tsk->thread.trap_no = 14; 509 tsk->thread.trap_no = 14;
503 info.si_signo = SIGBUS; 510 force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
504 info.si_errno = 0;
505 info.si_code = BUS_ADRERR;
506 info.si_addr = (void __user *)address;
507 force_sig_info(SIGBUS, &info, tsk);
508 return; 511 return;
509 512
510vmalloc_fault: 513vmalloc_fault:
@@ -523,7 +526,7 @@ vmalloc_fault:
523 pmd_t *pmd, *pmd_k; 526 pmd_t *pmd, *pmd_k;
524 pte_t *pte_k; 527 pte_t *pte_k;
525 528
526 asm("movl %%cr3,%0":"=r" (pgd_paddr)); 529 pgd_paddr = read_cr3();
527 pgd = index + (pgd_t *)__va(pgd_paddr); 530 pgd = index + (pgd_t *)__va(pgd_paddr);
528 pgd_k = init_mm.pgd + index; 531 pgd_k = init_mm.pgd + index;
529 532
diff --git a/arch/i386/mm/hugetlbpage.c b/arch/i386/mm/hugetlbpage.c
index 3b099f32b948..d524127c9afc 100644
--- a/arch/i386/mm/hugetlbpage.c
+++ b/arch/i386/mm/hugetlbpage.c
@@ -22,12 +22,15 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr)
22{ 22{
23 pgd_t *pgd; 23 pgd_t *pgd;
24 pud_t *pud; 24 pud_t *pud;
25 pmd_t *pmd = NULL; 25 pte_t *pte = NULL;
26 26
27 pgd = pgd_offset(mm, addr); 27 pgd = pgd_offset(mm, addr);
28 pud = pud_alloc(mm, pgd, addr); 28 pud = pud_alloc(mm, pgd, addr);
29 pmd = pmd_alloc(mm, pud, addr); 29 if (pud)
30 return (pte_t *) pmd; 30 pte = (pte_t *) pmd_alloc(mm, pud, addr);
31 BUG_ON(pte && !pte_none(*pte) && !pte_huge(*pte));
32
33 return pte;
31} 34}
32 35
33pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr) 36pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
@@ -37,8 +40,11 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
37 pmd_t *pmd = NULL; 40 pmd_t *pmd = NULL;
38 41
39 pgd = pgd_offset(mm, addr); 42 pgd = pgd_offset(mm, addr);
40 pud = pud_offset(pgd, addr); 43 if (pgd_present(*pgd)) {
41 pmd = pmd_offset(pud, addr); 44 pud = pud_offset(pgd, addr);
45 if (pud_present(*pud))
46 pmd = pmd_offset(pud, addr);
47 }
42 return (pte_t *) pmd; 48 return (pte_t *) pmd;
43} 49}
44 50
@@ -118,17 +124,6 @@ follow_huge_pmd(struct mm_struct *mm, unsigned long address,
118} 124}
119#endif 125#endif
120 126
121void hugetlb_clean_stale_pgtable(pte_t *pte)
122{
123 pmd_t *pmd = (pmd_t *) pte;
124 struct page *page;
125
126 page = pmd_page(*pmd);
127 pmd_clear(pmd);
128 dec_page_state(nr_page_table_pages);
129 page_cache_release(page);
130}
131
132/* x86_64 also uses this file */ 127/* x86_64 also uses this file */
133 128
134#ifdef HAVE_ARCH_HUGETLB_UNMAPPED_AREA 129#ifdef HAVE_ARCH_HUGETLB_UNMAPPED_AREA
diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c
index 12216b52e28b..9edfc058b894 100644
--- a/arch/i386/mm/init.c
+++ b/arch/i386/mm/init.c
@@ -198,9 +198,10 @@ int page_is_ram(unsigned long pagenr)
198 198
199 if (efi_enabled) { 199 if (efi_enabled) {
200 efi_memory_desc_t *md; 200 efi_memory_desc_t *md;
201 void *p;
201 202
202 for (i = 0; i < memmap.nr_map; i++) { 203 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
203 md = &memmap.map[i]; 204 md = p;
204 if (!is_available_memory(md)) 205 if (!is_available_memory(md))
205 continue; 206 continue;
206 addr = (md->phys_addr+PAGE_SIZE-1) >> PAGE_SHIFT; 207 addr = (md->phys_addr+PAGE_SIZE-1) >> PAGE_SHIFT;
@@ -348,7 +349,7 @@ static void __init pagetable_init (void)
348 * All user-space mappings are explicitly cleared after 349 * All user-space mappings are explicitly cleared after
349 * SMP startup. 350 * SMP startup.
350 */ 351 */
351 pgd_base[0] = pgd_base[USER_PTRS_PER_PGD]; 352 set_pgd(&pgd_base[0], pgd_base[USER_PTRS_PER_PGD]);
352#endif 353#endif
353} 354}
354 355
diff --git a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c
index cb3da6baa704..f600fc244f02 100644
--- a/arch/i386/mm/pageattr.c
+++ b/arch/i386/mm/pageattr.c
@@ -12,6 +12,7 @@
12#include <asm/uaccess.h> 12#include <asm/uaccess.h>
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/tlbflush.h> 14#include <asm/tlbflush.h>
15#include <asm/pgalloc.h>
15 16
16static DEFINE_SPINLOCK(cpa_lock); 17static DEFINE_SPINLOCK(cpa_lock);
17static struct list_head df_list = LIST_HEAD_INIT(df_list); 18static struct list_head df_list = LIST_HEAD_INIT(df_list);
@@ -52,8 +53,8 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot)
52 addr = address & LARGE_PAGE_MASK; 53 addr = address & LARGE_PAGE_MASK;
53 pbase = (pte_t *)page_address(base); 54 pbase = (pte_t *)page_address(base);
54 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE) { 55 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE) {
55 pbase[i] = pfn_pte(addr >> PAGE_SHIFT, 56 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT,
56 addr == address ? prot : PAGE_KERNEL); 57 addr == address ? prot : PAGE_KERNEL));
57 } 58 }
58 return base; 59 return base;
59} 60}
@@ -62,7 +63,7 @@ static void flush_kernel_map(void *dummy)
62{ 63{
63 /* Could use CLFLUSH here if the CPU supports it (Hammer,P4) */ 64 /* Could use CLFLUSH here if the CPU supports it (Hammer,P4) */
64 if (boot_cpu_data.x86_model >= 4) 65 if (boot_cpu_data.x86_model >= 4)
65 asm volatile("wbinvd":::"memory"); 66 wbinvd();
66 /* Flush all to work around Errata in early athlons regarding 67 /* Flush all to work around Errata in early athlons regarding
67 * large page flushing. 68 * large page flushing.
68 */ 69 */
diff --git a/arch/i386/mm/pgtable.c b/arch/i386/mm/pgtable.c
index bd2f7afc7a2a..dcdce2c6c532 100644
--- a/arch/i386/mm/pgtable.c
+++ b/arch/i386/mm/pgtable.c
@@ -207,19 +207,19 @@ void pgd_ctor(void *pgd, kmem_cache_t *cache, unsigned long unused)
207{ 207{
208 unsigned long flags; 208 unsigned long flags;
209 209
210 if (PTRS_PER_PMD == 1) 210 if (PTRS_PER_PMD == 1) {
211 memset(pgd, 0, USER_PTRS_PER_PGD*sizeof(pgd_t));
211 spin_lock_irqsave(&pgd_lock, flags); 212 spin_lock_irqsave(&pgd_lock, flags);
213 }
212 214
213 memcpy((pgd_t *)pgd + USER_PTRS_PER_PGD, 215 clone_pgd_range((pgd_t *)pgd + USER_PTRS_PER_PGD,
214 swapper_pg_dir + USER_PTRS_PER_PGD, 216 swapper_pg_dir + USER_PTRS_PER_PGD,
215 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); 217 KERNEL_PGD_PTRS);
216
217 if (PTRS_PER_PMD > 1) 218 if (PTRS_PER_PMD > 1)
218 return; 219 return;
219 220
220 pgd_list_add(pgd); 221 pgd_list_add(pgd);
221 spin_unlock_irqrestore(&pgd_lock, flags); 222 spin_unlock_irqrestore(&pgd_lock, flags);
222 memset(pgd, 0, USER_PTRS_PER_PGD*sizeof(pgd_t));
223} 223}
224 224
225/* never called when PTRS_PER_PMD > 1 */ 225/* never called when PTRS_PER_PMD > 1 */
diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index c547c1af6fa1..7b0b9ad848e5 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -42,25 +42,25 @@ void __save_processor_state(struct saved_context *ctxt)
42 /* 42 /*
43 * descriptor tables 43 * descriptor tables
44 */ 44 */
45 asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit)); 45 store_gdt(&ctxt->gdt_limit);
46 asm volatile ("sidt %0" : "=m" (ctxt->idt_limit)); 46 store_idt(&ctxt->idt_limit);
47 asm volatile ("str %0" : "=m" (ctxt->tr)); 47 store_tr(ctxt->tr);
48 48
49 /* 49 /*
50 * segment registers 50 * segment registers
51 */ 51 */
52 asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); 52 savesegment(es, ctxt->es);
53 asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); 53 savesegment(fs, ctxt->fs);
54 asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs)); 54 savesegment(gs, ctxt->gs);
55 asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss)); 55 savesegment(ss, ctxt->ss);
56 56
57 /* 57 /*
58 * control registers 58 * control registers
59 */ 59 */
60 asm volatile ("movl %%cr0, %0" : "=r" (ctxt->cr0)); 60 ctxt->cr0 = read_cr0();
61 asm volatile ("movl %%cr2, %0" : "=r" (ctxt->cr2)); 61 ctxt->cr2 = read_cr2();
62 asm volatile ("movl %%cr3, %0" : "=r" (ctxt->cr3)); 62 ctxt->cr3 = read_cr3();
63 asm volatile ("movl %%cr4, %0" : "=r" (ctxt->cr4)); 63 ctxt->cr4 = read_cr4();
64} 64}
65 65
66void save_processor_state(void) 66void save_processor_state(void)
@@ -84,7 +84,6 @@ static void fix_processor_context(void)
84 struct tss_struct * t = &per_cpu(init_tss, cpu); 84 struct tss_struct * t = &per_cpu(init_tss, cpu);
85 85
86 set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */ 86 set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
87 per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;
88 87
89 load_TR_desc(); /* This does ltr */ 88 load_TR_desc(); /* This does ltr */
90 load_LDT(&current->active_mm->context); /* This does lldt */ 89 load_LDT(&current->active_mm->context); /* This does lldt */
@@ -109,25 +108,25 @@ void __restore_processor_state(struct saved_context *ctxt)
109 /* 108 /*
110 * control registers 109 * control registers
111 */ 110 */
112 asm volatile ("movl %0, %%cr4" :: "r" (ctxt->cr4)); 111 write_cr4(ctxt->cr4);
113 asm volatile ("movl %0, %%cr3" :: "r" (ctxt->cr3)); 112 write_cr3(ctxt->cr3);
114 asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2)); 113 write_cr2(ctxt->cr2);
115 asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0)); 114 write_cr2(ctxt->cr0);
116 115
117 /* 116 /*
118 * now restore the descriptor tables to their proper values 117 * now restore the descriptor tables to their proper values
119 * ltr is done i fix_processor_context(). 118 * ltr is done i fix_processor_context().
120 */ 119 */
121 asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit)); 120 load_gdt(&ctxt->gdt_limit);
122 asm volatile ("lidt %0" :: "m" (ctxt->idt_limit)); 121 load_idt(&ctxt->idt_limit);
123 122
124 /* 123 /*
125 * segment registers 124 * segment registers
126 */ 125 */
127 asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); 126 loadsegment(es, ctxt->es);
128 asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); 127 loadsegment(fs, ctxt->fs);
129 asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs)); 128 loadsegment(gs, ctxt->gs);
130 asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); 129 loadsegment(ss, ctxt->ss);
131 130
132 /* 131 /*
133 * sysenter MSRs 132 * sysenter MSRs
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 80988136f26d..3deced637f07 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -383,6 +383,12 @@ source "drivers/acpi/Kconfig"
383 383
384endif 384endif
385 385
386if PM
387
388source "arch/ia64/kernel/cpufreq/Kconfig"
389
390endif
391
386endmenu 392endmenu
387 393
388if !IA64_HP_SIM 394if !IA64_HP_SIM
diff --git a/arch/ia64/hp/sim/boot/fw-emu.c b/arch/ia64/hp/sim/boot/fw-emu.c
index 5c46928e3dc6..30fdfb1d0a53 100644
--- a/arch/ia64/hp/sim/boot/fw-emu.c
+++ b/arch/ia64/hp/sim/boot/fw-emu.c
@@ -237,17 +237,6 @@ sal_emulator (long index, unsigned long in1, unsigned long in2,
237 return ((struct sal_ret_values) {status, r9, r10, r11}); 237 return ((struct sal_ret_values) {status, r9, r10, r11});
238} 238}
239 239
240
241/*
242 * This is here to work around a bug in egcs-1.1.1b that causes the
243 * compiler to crash (seems like a bug in the new alias analysis code.
244 */
245void *
246id (long addr)
247{
248 return (void *) addr;
249}
250
251struct ia64_boot_param * 240struct ia64_boot_param *
252sys_fw_init (const char *args, int arglen) 241sys_fw_init (const char *args, int arglen)
253{ 242{
diff --git a/arch/ia64/ia32/ia32_signal.c b/arch/ia64/ia32/ia32_signal.c
index ebb89be2aa2d..aa891c9bc9b6 100644
--- a/arch/ia64/ia32/ia32_signal.c
+++ b/arch/ia64/ia32/ia32_signal.c
@@ -29,7 +29,6 @@
29#include <asm/uaccess.h> 29#include <asm/uaccess.h>
30#include <asm/rse.h> 30#include <asm/rse.h>
31#include <asm/sigcontext.h> 31#include <asm/sigcontext.h>
32#include <asm/segment.h>
33 32
34#include "ia32priv.h" 33#include "ia32priv.h"
35 34
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile
index e1fb68ddec26..b242594be55b 100644
--- a/arch/ia64/kernel/Makefile
+++ b/arch/ia64/kernel/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_SMP) += smp.o smpboot.o domain.o
20obj-$(CONFIG_NUMA) += numa.o 20obj-$(CONFIG_NUMA) += numa.o
21obj-$(CONFIG_PERFMON) += perfmon_default_smpl.o 21obj-$(CONFIG_PERFMON) += perfmon_default_smpl.o
22obj-$(CONFIG_IA64_CYCLONE) += cyclone.o 22obj-$(CONFIG_IA64_CYCLONE) += cyclone.o
23obj-$(CONFIG_CPU_FREQ) += cpufreq/
23obj-$(CONFIG_IA64_MCA_RECOVERY) += mca_recovery.o 24obj-$(CONFIG_IA64_MCA_RECOVERY) += mca_recovery.o
24obj-$(CONFIG_KPROBES) += kprobes.o jprobes.o 25obj-$(CONFIG_KPROBES) += kprobes.o jprobes.o
25obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o 26obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o
diff --git a/arch/ia64/kernel/cpufreq/Kconfig b/arch/ia64/kernel/cpufreq/Kconfig
new file mode 100644
index 000000000000..2d9d5279b981
--- /dev/null
+++ b/arch/ia64/kernel/cpufreq/Kconfig
@@ -0,0 +1,29 @@
1
2#
3# CPU Frequency scaling
4#
5
6menu "CPU Frequency scaling"
7
8source "drivers/cpufreq/Kconfig"
9
10if CPU_FREQ
11
12comment "CPUFreq processor drivers"
13
14config IA64_ACPI_CPUFREQ
15 tristate "ACPI Processor P-States driver"
16 select CPU_FREQ_TABLE
17 depends on ACPI_PROCESSOR
18 help
19 This driver adds a CPUFreq driver which utilizes the ACPI
20 Processor Performance States.
21
22 For details, take a look at <file:Documentation/cpu-freq/>.
23
24 If in doubt, say N.
25
26endif # CPU_FREQ
27
28endmenu
29
diff --git a/arch/ia64/kernel/cpufreq/Makefile b/arch/ia64/kernel/cpufreq/Makefile
new file mode 100644
index 000000000000..f748d34c02f0
--- /dev/null
+++ b/arch/ia64/kernel/cpufreq/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_IA64_ACPI_CPUFREQ) += acpi-cpufreq.o
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
new file mode 100644
index 000000000000..da4d5cf80a48
--- /dev/null
+++ b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
@@ -0,0 +1,499 @@
1/*
2 * arch/ia64/kernel/cpufreq/acpi-cpufreq.c
3 * This file provides the ACPI based P-state support. This
4 * module works with generic cpufreq infrastructure. Most of
5 * the code is based on i386 version
6 * (arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c)
7 *
8 * Copyright (C) 2005 Intel Corp
9 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 */
11
12#include <linux/config.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/cpufreq.h>
17#include <linux/proc_fs.h>
18#include <linux/seq_file.h>
19#include <asm/io.h>
20#include <asm/uaccess.h>
21#include <asm/pal.h>
22
23#include <linux/acpi.h>
24#include <acpi/processor.h>
25
26#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
27
28MODULE_AUTHOR("Venkatesh Pallipadi");
29MODULE_DESCRIPTION("ACPI Processor P-States Driver");
30MODULE_LICENSE("GPL");
31
32
33struct cpufreq_acpi_io {
34 struct acpi_processor_performance acpi_data;
35 struct cpufreq_frequency_table *freq_table;
36 unsigned int resume;
37};
38
39static struct cpufreq_acpi_io *acpi_io_data[NR_CPUS];
40
41static struct cpufreq_driver acpi_cpufreq_driver;
42
43
44static int
45processor_set_pstate (
46 u32 value)
47{
48 s64 retval;
49
50 dprintk("processor_set_pstate\n");
51
52 retval = ia64_pal_set_pstate((u64)value);
53
54 if (retval) {
55 dprintk("Failed to set freq to 0x%x, with error 0x%x\n",
56 value, retval);
57 return -ENODEV;
58 }
59 return (int)retval;
60}
61
62
63static int
64processor_get_pstate (
65 u32 *value)
66{
67 u64 pstate_index = 0;
68 s64 retval;
69
70 dprintk("processor_get_pstate\n");
71
72 retval = ia64_pal_get_pstate(&pstate_index);
73 *value = (u32) pstate_index;
74
75 if (retval)
76 dprintk("Failed to get current freq with "
77 "error 0x%x, idx 0x%x\n", retval, *value);
78
79 return (int)retval;
80}
81
82
83/* To be used only after data->acpi_data is initialized */
84static unsigned
85extract_clock (
86 struct cpufreq_acpi_io *data,
87 unsigned value,
88 unsigned int cpu)
89{
90 unsigned long i;
91
92 dprintk("extract_clock\n");
93
94 for (i = 0; i < data->acpi_data.state_count; i++) {
95 if (value >= data->acpi_data.states[i].control)
96 return data->acpi_data.states[i].core_frequency;
97 }
98 return data->acpi_data.states[i-1].core_frequency;
99}
100
101
102static unsigned int
103processor_get_freq (
104 struct cpufreq_acpi_io *data,
105 unsigned int cpu)
106{
107 int ret = 0;
108 u32 value = 0;
109 cpumask_t saved_mask;
110 unsigned long clock_freq;
111
112 dprintk("processor_get_freq\n");
113
114 saved_mask = current->cpus_allowed;
115 set_cpus_allowed(current, cpumask_of_cpu(cpu));
116 if (smp_processor_id() != cpu) {
117 ret = -EAGAIN;
118 goto migrate_end;
119 }
120
121 /*
122 * processor_get_pstate gets the average frequency since the
123 * last get. So, do two PAL_get_freq()...
124 */
125 ret = processor_get_pstate(&value);
126 ret = processor_get_pstate(&value);
127
128 if (ret) {
129 set_cpus_allowed(current, saved_mask);
130 printk(KERN_WARNING "get performance failed with error %d\n",
131 ret);
132 ret = -EAGAIN;
133 goto migrate_end;
134 }
135 clock_freq = extract_clock(data, value, cpu);
136 ret = (clock_freq*1000);
137
138migrate_end:
139 set_cpus_allowed(current, saved_mask);
140 return ret;
141}
142
143
144static int
145processor_set_freq (
146 struct cpufreq_acpi_io *data,
147 unsigned int cpu,
148 int state)
149{
150 int ret = 0;
151 u32 value = 0;
152 struct cpufreq_freqs cpufreq_freqs;
153 cpumask_t saved_mask;
154 int retval;
155
156 dprintk("processor_set_freq\n");
157
158 saved_mask = current->cpus_allowed;
159 set_cpus_allowed(current, cpumask_of_cpu(cpu));
160 if (smp_processor_id() != cpu) {
161 retval = -EAGAIN;
162 goto migrate_end;
163 }
164
165 if (state == data->acpi_data.state) {
166 if (unlikely(data->resume)) {
167 dprintk("Called after resume, resetting to P%d\n", state);
168 data->resume = 0;
169 } else {
170 dprintk("Already at target state (P%d)\n", state);
171 retval = 0;
172 goto migrate_end;
173 }
174 }
175
176 dprintk("Transitioning from P%d to P%d\n",
177 data->acpi_data.state, state);
178
179 /* cpufreq frequency struct */
180 cpufreq_freqs.cpu = cpu;
181 cpufreq_freqs.old = data->freq_table[data->acpi_data.state].frequency;
182 cpufreq_freqs.new = data->freq_table[state].frequency;
183
184 /* notify cpufreq */
185 cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE);
186
187 /*
188 * First we write the target state's 'control' value to the
189 * control_register.
190 */
191
192 value = (u32) data->acpi_data.states[state].control;
193
194 dprintk("Transitioning to state: 0x%08x\n", value);
195
196 ret = processor_set_pstate(value);
197 if (ret) {
198 unsigned int tmp = cpufreq_freqs.new;
199 cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
200 cpufreq_freqs.new = cpufreq_freqs.old;
201 cpufreq_freqs.old = tmp;
202 cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE);
203 cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
204 printk(KERN_WARNING "Transition failed with error %d\n", ret);
205 retval = -ENODEV;
206 goto migrate_end;
207 }
208
209 cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
210
211 data->acpi_data.state = state;
212
213 retval = 0;
214
215migrate_end:
216 set_cpus_allowed(current, saved_mask);
217 return (retval);
218}
219
220
221static unsigned int
222acpi_cpufreq_get (
223 unsigned int cpu)
224{
225 struct cpufreq_acpi_io *data = acpi_io_data[cpu];
226
227 dprintk("acpi_cpufreq_get\n");
228
229 return processor_get_freq(data, cpu);
230}
231
232
233static int
234acpi_cpufreq_target (
235 struct cpufreq_policy *policy,
236 unsigned int target_freq,
237 unsigned int relation)
238{
239 struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
240 unsigned int next_state = 0;
241 unsigned int result = 0;
242
243 dprintk("acpi_cpufreq_setpolicy\n");
244
245 result = cpufreq_frequency_table_target(policy,
246 data->freq_table, target_freq, relation, &next_state);
247 if (result)
248 return (result);
249
250 result = processor_set_freq(data, policy->cpu, next_state);
251
252 return (result);
253}
254
255
256static int
257acpi_cpufreq_verify (
258 struct cpufreq_policy *policy)
259{
260 unsigned int result = 0;
261 struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
262
263 dprintk("acpi_cpufreq_verify\n");
264
265 result = cpufreq_frequency_table_verify(policy,
266 data->freq_table);
267
268 return (result);
269}
270
271
272/*
273 * processor_init_pdc - let BIOS know about the SMP capabilities
274 * of this driver
275 * @perf: processor-specific acpi_io_data struct
276 * @cpu: CPU being initialized
277 *
278 * To avoid issues with legacy OSes, some BIOSes require to be informed of
279 * the SMP capabilities of OS P-state driver. Here we set the bits in _PDC
280 * accordingly. Actual call to _PDC is done in driver/acpi/processor.c
281 */
282static void
283processor_init_pdc (
284 struct acpi_processor_performance *perf,
285 unsigned int cpu,
286 struct acpi_object_list *obj_list
287 )
288{
289 union acpi_object *obj;
290 u32 *buf;
291
292 dprintk("processor_init_pdc\n");
293
294 perf->pdc = NULL;
295 /* Initialize pdc. It will be used later. */
296 if (!obj_list)
297 return;
298
299 if (!(obj_list->count && obj_list->pointer))
300 return;
301
302 obj = obj_list->pointer;
303 if ((obj->buffer.length == 12) && obj->buffer.pointer) {
304 buf = (u32 *)obj->buffer.pointer;
305 buf[0] = ACPI_PDC_REVISION_ID;
306 buf[1] = 1;
307 buf[2] = ACPI_PDC_EST_CAPABILITY_SMP;
308 perf->pdc = obj_list;
309 }
310 return;
311}
312
313
314static int
315acpi_cpufreq_cpu_init (
316 struct cpufreq_policy *policy)
317{
318 unsigned int i;
319 unsigned int cpu = policy->cpu;
320 struct cpufreq_acpi_io *data;
321 unsigned int result = 0;
322
323 union acpi_object arg0 = {ACPI_TYPE_BUFFER};
324 u32 arg0_buf[3];
325 struct acpi_object_list arg_list = {1, &arg0};
326
327 dprintk("acpi_cpufreq_cpu_init\n");
328 /* setup arg_list for _PDC settings */
329 arg0.buffer.length = 12;
330 arg0.buffer.pointer = (u8 *) arg0_buf;
331
332 data = kmalloc(sizeof(struct cpufreq_acpi_io), GFP_KERNEL);
333 if (!data)
334 return (-ENOMEM);
335
336 memset(data, 0, sizeof(struct cpufreq_acpi_io));
337
338 acpi_io_data[cpu] = data;
339
340 processor_init_pdc(&data->acpi_data, cpu, &arg_list);
341 result = acpi_processor_register_performance(&data->acpi_data, cpu);
342 data->acpi_data.pdc = NULL;
343
344 if (result)
345 goto err_free;
346
347 /* capability check */
348 if (data->acpi_data.state_count <= 1) {
349 dprintk("No P-States\n");
350 result = -ENODEV;
351 goto err_unreg;
352 }
353
354 if ((data->acpi_data.control_register.space_id !=
355 ACPI_ADR_SPACE_FIXED_HARDWARE) ||
356 (data->acpi_data.status_register.space_id !=
357 ACPI_ADR_SPACE_FIXED_HARDWARE)) {
358 dprintk("Unsupported address space [%d, %d]\n",
359 (u32) (data->acpi_data.control_register.space_id),
360 (u32) (data->acpi_data.status_register.space_id));
361 result = -ENODEV;
362 goto err_unreg;
363 }
364
365 /* alloc freq_table */
366 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
367 (data->acpi_data.state_count + 1),
368 GFP_KERNEL);
369 if (!data->freq_table) {
370 result = -ENOMEM;
371 goto err_unreg;
372 }
373
374 /* detect transition latency */
375 policy->cpuinfo.transition_latency = 0;
376 for (i=0; i<data->acpi_data.state_count; i++) {
377 if ((data->acpi_data.states[i].transition_latency * 1000) >
378 policy->cpuinfo.transition_latency) {
379 policy->cpuinfo.transition_latency =
380 data->acpi_data.states[i].transition_latency * 1000;
381 }
382 }
383 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
384
385 policy->cur = processor_get_freq(data, policy->cpu);
386
387 /* table init */
388 for (i = 0; i <= data->acpi_data.state_count; i++)
389 {
390 data->freq_table[i].index = i;
391 if (i < data->acpi_data.state_count) {
392 data->freq_table[i].frequency =
393 data->acpi_data.states[i].core_frequency * 1000;
394 } else {
395 data->freq_table[i].frequency = CPUFREQ_TABLE_END;
396 }
397 }
398
399 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
400 if (result) {
401 goto err_freqfree;
402 }
403
404 /* notify BIOS that we exist */
405 acpi_processor_notify_smm(THIS_MODULE);
406
407 printk(KERN_INFO "acpi-cpufreq: CPU%u - ACPI performance management "
408 "activated.\n", cpu);
409
410 for (i = 0; i < data->acpi_data.state_count; i++)
411 dprintk(" %cP%d: %d MHz, %d mW, %d uS, %d uS, 0x%x 0x%x\n",
412 (i == data->acpi_data.state?'*':' '), i,
413 (u32) data->acpi_data.states[i].core_frequency,
414 (u32) data->acpi_data.states[i].power,
415 (u32) data->acpi_data.states[i].transition_latency,
416 (u32) data->acpi_data.states[i].bus_master_latency,
417 (u32) data->acpi_data.states[i].status,
418 (u32) data->acpi_data.states[i].control);
419
420 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
421
422 /* the first call to ->target() should result in us actually
423 * writing something to the appropriate registers. */
424 data->resume = 1;
425
426 return (result);
427
428 err_freqfree:
429 kfree(data->freq_table);
430 err_unreg:
431 acpi_processor_unregister_performance(&data->acpi_data, cpu);
432 err_free:
433 kfree(data);
434 acpi_io_data[cpu] = NULL;
435
436 return (result);
437}
438
439
440static int
441acpi_cpufreq_cpu_exit (
442 struct cpufreq_policy *policy)
443{
444 struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
445
446 dprintk("acpi_cpufreq_cpu_exit\n");
447
448 if (data) {
449 cpufreq_frequency_table_put_attr(policy->cpu);
450 acpi_io_data[policy->cpu] = NULL;
451 acpi_processor_unregister_performance(&data->acpi_data,
452 policy->cpu);
453 kfree(data);
454 }
455
456 return (0);
457}
458
459
460static struct freq_attr* acpi_cpufreq_attr[] = {
461 &cpufreq_freq_attr_scaling_available_freqs,
462 NULL,
463};
464
465
466static struct cpufreq_driver acpi_cpufreq_driver = {
467 .verify = acpi_cpufreq_verify,
468 .target = acpi_cpufreq_target,
469 .get = acpi_cpufreq_get,
470 .init = acpi_cpufreq_cpu_init,
471 .exit = acpi_cpufreq_cpu_exit,
472 .name = "acpi-cpufreq",
473 .owner = THIS_MODULE,
474 .attr = acpi_cpufreq_attr,
475};
476
477
478static int __init
479acpi_cpufreq_init (void)
480{
481 dprintk("acpi_cpufreq_init\n");
482
483 return cpufreq_register_driver(&acpi_cpufreq_driver);
484}
485
486
487static void __exit
488acpi_cpufreq_exit (void)
489{
490 dprintk("acpi_cpufreq_exit\n");
491
492 cpufreq_unregister_driver(&acpi_cpufreq_driver);
493 return;
494}
495
496
497late_initcall(acpi_cpufreq_init);
498module_exit(acpi_cpufreq_exit);
499
diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c
index 770fab37928e..f2dbcd1db0d4 100644
--- a/arch/ia64/kernel/sys_ia64.c
+++ b/arch/ia64/kernel/sys_ia64.c
@@ -35,7 +35,7 @@ arch_get_unmapped_area (struct file *filp, unsigned long addr, unsigned long len
35 return -ENOMEM; 35 return -ENOMEM;
36 36
37#ifdef CONFIG_HUGETLB_PAGE 37#ifdef CONFIG_HUGETLB_PAGE
38 if (REGION_NUMBER(addr) == REGION_HPAGE) 38 if (REGION_NUMBER(addr) == RGN_HPAGE)
39 addr = 0; 39 addr = 0;
40#endif 40#endif
41 if (!addr) 41 if (!addr)
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c
index 490dfc9ab47f..4e9d06c48a8b 100644
--- a/arch/ia64/kernel/uncached.c
+++ b/arch/ia64/kernel/uncached.c
@@ -184,7 +184,7 @@ uncached_free_page(unsigned long maddr)
184{ 184{
185 int node; 185 int node;
186 186
187 node = nasid_to_cnodeid(NASID_GET(maddr)); 187 node = paddr_to_nid(maddr - __IA64_UNCACHED_OFFSET);
188 188
189 dprintk(KERN_DEBUG "uncached_free_page(%lx) on node %i\n", maddr, node); 189 dprintk(KERN_DEBUG "uncached_free_page(%lx) on node %i\n", maddr, node);
190 190
@@ -217,7 +217,7 @@ uncached_build_memmap(unsigned long start, unsigned long end, void *arg)
217 217
218 memset((char *)vstart, 0, length); 218 memset((char *)vstart, 0, length);
219 219
220 node = nasid_to_cnodeid(NASID_GET(start)); 220 node = paddr_to_nid(start);
221 221
222 for (; vstart < vend ; vstart += PAGE_SIZE) { 222 for (; vstart < vend ; vstart += PAGE_SIZE) {
223 dprintk(KERN_INFO "sticking %lx into the pool!\n", vstart); 223 dprintk(KERN_INFO "sticking %lx into the pool!\n", vstart);
diff --git a/arch/ia64/lib/Makefile b/arch/ia64/lib/Makefile
index 1902c3c2ef92..799407e7726f 100644
--- a/arch/ia64/lib/Makefile
+++ b/arch/ia64/lib/Makefile
@@ -6,7 +6,7 @@ obj-y := io.o
6 6
7lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \ 7lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \
8 __divdi3.o __udivdi3.o __moddi3.o __umoddi3.o \ 8 __divdi3.o __udivdi3.o __moddi3.o __umoddi3.o \
9 bitop.o checksum.o clear_page.o csum_partial_copy.o copy_page.o \ 9 bitop.o checksum.o clear_page.o csum_partial_copy.o \
10 clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \ 10 clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \
11 flush.o ip_fast_csum.o do_csum.o \ 11 flush.o ip_fast_csum.o do_csum.o \
12 memset.o strlen.o swiotlb.o 12 memset.o strlen.o swiotlb.o
diff --git a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c
index ab7b3ad99a7f..dbc0b3e449c5 100644
--- a/arch/ia64/lib/swiotlb.c
+++ b/arch/ia64/lib/swiotlb.c
@@ -93,8 +93,7 @@ static int __init
93setup_io_tlb_npages(char *str) 93setup_io_tlb_npages(char *str)
94{ 94{
95 if (isdigit(*str)) { 95 if (isdigit(*str)) {
96 io_tlb_nslabs = simple_strtoul(str, &str, 0) << 96 io_tlb_nslabs = simple_strtoul(str, &str, 0);
97 (PAGE_SHIFT - IO_TLB_SHIFT);
98 /* avoid tail segment of size < IO_TLB_SEGSIZE */ 97 /* avoid tail segment of size < IO_TLB_SEGSIZE */
99 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 98 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
100 } 99 }
@@ -117,7 +116,7 @@ swiotlb_init_with_default_size (size_t default_size)
117 unsigned long i; 116 unsigned long i;
118 117
119 if (!io_tlb_nslabs) { 118 if (!io_tlb_nslabs) {
120 io_tlb_nslabs = (default_size >> PAGE_SHIFT); 119 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
121 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 120 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
122 } 121 }
123 122
diff --git a/arch/ia64/mm/hugetlbpage.c b/arch/ia64/mm/hugetlbpage.c
index e0a776a3044c..2d13889d0a99 100644
--- a/arch/ia64/mm/hugetlbpage.c
+++ b/arch/ia64/mm/hugetlbpage.c
@@ -76,7 +76,7 @@ int is_aligned_hugepage_range(unsigned long addr, unsigned long len)
76 return -EINVAL; 76 return -EINVAL;
77 if (addr & ~HPAGE_MASK) 77 if (addr & ~HPAGE_MASK)
78 return -EINVAL; 78 return -EINVAL;
79 if (REGION_NUMBER(addr) != REGION_HPAGE) 79 if (REGION_NUMBER(addr) != RGN_HPAGE)
80 return -EINVAL; 80 return -EINVAL;
81 81
82 return 0; 82 return 0;
@@ -87,7 +87,7 @@ struct page *follow_huge_addr(struct mm_struct *mm, unsigned long addr, int writ
87 struct page *page; 87 struct page *page;
88 pte_t *ptep; 88 pte_t *ptep;
89 89
90 if (REGION_NUMBER(addr) != REGION_HPAGE) 90 if (REGION_NUMBER(addr) != RGN_HPAGE)
91 return ERR_PTR(-EINVAL); 91 return ERR_PTR(-EINVAL);
92 92
93 ptep = huge_pte_offset(mm, addr); 93 ptep = huge_pte_offset(mm, addr);
@@ -142,8 +142,8 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, u
142 return -ENOMEM; 142 return -ENOMEM;
143 if (len & ~HPAGE_MASK) 143 if (len & ~HPAGE_MASK)
144 return -EINVAL; 144 return -EINVAL;
145 /* This code assumes that REGION_HPAGE != 0. */ 145 /* This code assumes that RGN_HPAGE != 0. */
146 if ((REGION_NUMBER(addr) != REGION_HPAGE) || (addr & (HPAGE_SIZE - 1))) 146 if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1)))
147 addr = HPAGE_REGION_BASE; 147 addr = HPAGE_REGION_BASE;
148 else 148 else
149 addr = ALIGN(addr, HPAGE_SIZE); 149 addr = ALIGN(addr, HPAGE_SIZE);
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index f9472c50ab42..9977c122e9fa 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -24,7 +24,6 @@
24 24
25#include <asm/machvec.h> 25#include <asm/machvec.h>
26#include <asm/page.h> 26#include <asm/page.h>
27#include <asm/segment.h>
28#include <asm/system.h> 27#include <asm/system.h>
29#include <asm/io.h> 28#include <asm/io.h>
30#include <asm/sal.h> 29#include <asm/sal.h>
diff --git a/arch/ia64/sn/include/tio.h b/arch/ia64/sn/include/tio.h
index 0139124dd54a..6b2e7b75eb19 100644
--- a/arch/ia64/sn/include/tio.h
+++ b/arch/ia64/sn/include/tio.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#ifndef _ASM_IA64_SN_TIO_H 9#ifndef _ASM_IA64_SN_TIO_H
@@ -26,6 +26,10 @@
26#define TIO_ITTE_VALID_MASK 0x1 26#define TIO_ITTE_VALID_MASK 0x1
27#define TIO_ITTE_VALID_SHIFT 16 27#define TIO_ITTE_VALID_SHIFT 16
28 28
29#define TIO_ITTE_WIDGET(itte) \
30 (((itte) >> TIO_ITTE_WIDGET_SHIFT) & TIO_ITTE_WIDGET_MASK)
31#define TIO_ITTE_VALID(itte) \
32 (((itte) >> TIO_ITTE_VALID_SHIFT) & TIO_ITTE_VALID_MASK)
29 33
30#define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \ 34#define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \
31 REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \ 35 REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \
diff --git a/arch/ia64/sn/include/xtalk/hubdev.h b/arch/ia64/sn/include/xtalk/hubdev.h
index 580a1c0403a7..71c2b271b4c6 100644
--- a/arch/ia64/sn/include/xtalk/hubdev.h
+++ b/arch/ia64/sn/include/xtalk/hubdev.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H 8#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H
9#define _ASM_IA64_SN_XTALK_HUBDEV_H 9#define _ASM_IA64_SN_XTALK_HUBDEV_H
@@ -16,6 +16,9 @@
16#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1) 16#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
17#define IIO_ITTE_WIDGET_SHIFT 8 17#define IIO_ITTE_WIDGET_SHIFT 8
18 18
19#define IIO_ITTE_WIDGET(itte) \
20 (((itte) >> IIO_ITTE_WIDGET_SHIFT) & IIO_ITTE_WIDGET_MASK)
21
19/* 22/*
20 * Use the top big window as a surrogate for the first small window 23 * Use the top big window as a surrogate for the first small window
21 */ 24 */
@@ -34,7 +37,8 @@ struct sn_flush_device_list {
34 unsigned long sfdl_force_int_addr; 37 unsigned long sfdl_force_int_addr;
35 unsigned long sfdl_flush_value; 38 unsigned long sfdl_flush_value;
36 volatile unsigned long *sfdl_flush_addr; 39 volatile unsigned long *sfdl_flush_addr;
37 uint64_t sfdl_persistent_busnum; 40 uint32_t sfdl_persistent_busnum;
41 uint32_t sfdl_persistent_segment;
38 struct pcibus_info *sfdl_pcibus_info; 42 struct pcibus_info *sfdl_pcibus_info;
39 spinlock_t sfdl_flush_lock; 43 spinlock_t sfdl_flush_lock;
40}; 44};
@@ -58,7 +62,8 @@ struct hubdev_info {
58 62
59 void *hdi_nodepda; 63 void *hdi_nodepda;
60 void *hdi_node_vertex; 64 void *hdi_node_vertex;
61 void *hdi_xtalk_vertex; 65 uint32_t max_segment_number;
66 uint32_t max_pcibus_number;
62}; 67};
63 68
64extern void hubdev_init_node(nodepda_t *, cnodeid_t); 69extern void hubdev_init_node(nodepda_t *, cnodeid_t);
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c
index 647deae9bfcd..45854c637e9c 100644
--- a/arch/ia64/sn/kernel/bte.c
+++ b/arch/ia64/sn/kernel/bte.c
@@ -29,16 +29,30 @@
29 29
30/* two interfaces on two btes */ 30/* two interfaces on two btes */
31#define MAX_INTERFACES_TO_TRY 4 31#define MAX_INTERFACES_TO_TRY 4
32#define MAX_NODES_TO_TRY 2
32 33
33static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface) 34static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface)
34{ 35{
35 nodepda_t *tmp_nodepda; 36 nodepda_t *tmp_nodepda;
36 37
38 if (nasid_to_cnodeid(nasid) == -1)
39 return (struct bteinfo_s *)NULL;;
40
37 tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid)); 41 tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid));
38 return &tmp_nodepda->bte_if[interface]; 42 return &tmp_nodepda->bte_if[interface];
39 43
40} 44}
41 45
46static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode)
47{
48 if (is_shub2()) {
49 BTE_CTRL_STORE(bte, (IBLS_BUSY | ((len) | (mode) << 24)));
50 } else {
51 BTE_LNSTAT_STORE(bte, len);
52 BTE_CTRL_STORE(bte, mode);
53 }
54}
55
42/************************************************************************ 56/************************************************************************
43 * Block Transfer Engine copy related functions. 57 * Block Transfer Engine copy related functions.
44 * 58 *
@@ -67,13 +81,15 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
67{ 81{
68 u64 transfer_size; 82 u64 transfer_size;
69 u64 transfer_stat; 83 u64 transfer_stat;
84 u64 notif_phys_addr;
70 struct bteinfo_s *bte; 85 struct bteinfo_s *bte;
71 bte_result_t bte_status; 86 bte_result_t bte_status;
72 unsigned long irq_flags; 87 unsigned long irq_flags;
73 unsigned long itc_end = 0; 88 unsigned long itc_end = 0;
74 struct bteinfo_s *btes_to_try[MAX_INTERFACES_TO_TRY]; 89 int nasid_to_try[MAX_NODES_TO_TRY];
75 int bte_if_index; 90 int my_nasid = get_nasid();
76 int bte_pri, bte_sec; 91 int bte_if_index, nasid_index;
92 int bte_first, btes_per_node = BTES_PER_NODE;
77 93
78 BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n", 94 BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
79 src, dest, len, mode, notification)); 95 src, dest, len, mode, notification));
@@ -86,36 +102,26 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
86 (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)); 102 (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK));
87 BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT))); 103 BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT)));
88 104
89 /* CPU 0 (per node) tries bte0 first, CPU 1 try bte1 first */ 105 /*
90 if (cpuid_to_subnode(smp_processor_id()) == 0) { 106 * Start with interface corresponding to cpu number
91 bte_pri = 0; 107 */
92 bte_sec = 1; 108 bte_first = raw_smp_processor_id() % btes_per_node;
93 } else {
94 bte_pri = 1;
95 bte_sec = 0;
96 }
97 109
98 if (mode & BTE_USE_DEST) { 110 if (mode & BTE_USE_DEST) {
99 /* try remote then local */ 111 /* try remote then local */
100 btes_to_try[0] = bte_if_on_node(NASID_GET(dest), bte_pri); 112 nasid_to_try[0] = NASID_GET(dest);
101 btes_to_try[1] = bte_if_on_node(NASID_GET(dest), bte_sec);
102 if (mode & BTE_USE_ANY) { 113 if (mode & BTE_USE_ANY) {
103 btes_to_try[2] = bte_if_on_node(get_nasid(), bte_pri); 114 nasid_to_try[1] = my_nasid;
104 btes_to_try[3] = bte_if_on_node(get_nasid(), bte_sec);
105 } else { 115 } else {
106 btes_to_try[2] = NULL; 116 nasid_to_try[1] = (int)NULL;
107 btes_to_try[3] = NULL;
108 } 117 }
109 } else { 118 } else {
110 /* try local then remote */ 119 /* try local then remote */
111 btes_to_try[0] = bte_if_on_node(get_nasid(), bte_pri); 120 nasid_to_try[0] = my_nasid;
112 btes_to_try[1] = bte_if_on_node(get_nasid(), bte_sec);
113 if (mode & BTE_USE_ANY) { 121 if (mode & BTE_USE_ANY) {
114 btes_to_try[2] = bte_if_on_node(NASID_GET(dest), bte_pri); 122 nasid_to_try[1] = NASID_GET(dest);
115 btes_to_try[3] = bte_if_on_node(NASID_GET(dest), bte_sec);
116 } else { 123 } else {
117 btes_to_try[2] = NULL; 124 nasid_to_try[1] = (int)NULL;
118 btes_to_try[3] = NULL;
119 } 125 }
120 } 126 }
121 127
@@ -123,11 +129,12 @@ retry_bteop:
123 do { 129 do {
124 local_irq_save(irq_flags); 130 local_irq_save(irq_flags);
125 131
126 bte_if_index = 0; 132 bte_if_index = bte_first;
133 nasid_index = 0;
127 134
128 /* Attempt to lock one of the BTE interfaces. */ 135 /* Attempt to lock one of the BTE interfaces. */
129 while (bte_if_index < MAX_INTERFACES_TO_TRY) { 136 while (nasid_index < MAX_NODES_TO_TRY) {
130 bte = btes_to_try[bte_if_index++]; 137 bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index);
131 138
132 if (bte == NULL) { 139 if (bte == NULL) {
133 continue; 140 continue;
@@ -143,6 +150,15 @@ retry_bteop:
143 break; 150 break;
144 } 151 }
145 } 152 }
153
154 bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */
155 if (bte_if_index == bte_first) {
156 /*
157 * We've tried all interfaces on this node
158 */
159 nasid_index++;
160 }
161
146 bte = NULL; 162 bte = NULL;
147 } 163 }
148 164
@@ -169,7 +185,13 @@ retry_bteop:
169 185
170 /* Initialize the notification to a known value. */ 186 /* Initialize the notification to a known value. */
171 *bte->most_rcnt_na = BTE_WORD_BUSY; 187 *bte->most_rcnt_na = BTE_WORD_BUSY;
188 notif_phys_addr = TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na));
172 189
190 if (is_shub2()) {
191 src = SH2_TIO_PHYS_TO_DMA(src);
192 dest = SH2_TIO_PHYS_TO_DMA(dest);
193 notif_phys_addr = SH2_TIO_PHYS_TO_DMA(notif_phys_addr);
194 }
173 /* Set the source and destination registers */ 195 /* Set the source and destination registers */
174 BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src)))); 196 BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src))));
175 BTE_SRC_STORE(bte, TO_PHYS(src)); 197 BTE_SRC_STORE(bte, TO_PHYS(src));
@@ -177,14 +199,12 @@ retry_bteop:
177 BTE_DEST_STORE(bte, TO_PHYS(dest)); 199 BTE_DEST_STORE(bte, TO_PHYS(dest));
178 200
179 /* Set the notification register */ 201 /* Set the notification register */
180 BTE_PRINTKV(("IBNA = 0x%lx)\n", 202 BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr));
181 TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na)))); 203 BTE_NOTIF_STORE(bte, notif_phys_addr);
182 BTE_NOTIF_STORE(bte,
183 TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na)));
184 204
185 /* Initiate the transfer */ 205 /* Initiate the transfer */
186 BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode))); 206 BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
187 BTE_START_TRANSFER(bte, transfer_size, BTE_VALID_MODE(mode)); 207 bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode));
188 208
189 itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec); 209 itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);
190 210
@@ -195,6 +215,7 @@ retry_bteop:
195 } 215 }
196 216
197 while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) { 217 while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) {
218 cpu_relax();
198 if (ia64_get_itc() > itc_end) { 219 if (ia64_get_itc() > itc_end) {
199 BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n", 220 BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
200 NASID_GET(bte->bte_base_addr), bte->bte_num, 221 NASID_GET(bte->bte_base_addr), bte->bte_num,
diff --git a/arch/ia64/sn/kernel/huberror.c b/arch/ia64/sn/kernel/huberror.c
index 5c39b43ba3c0..5c5eb01c50f0 100644
--- a/arch/ia64/sn/kernel/huberror.c
+++ b/arch/ia64/sn/kernel/huberror.c
@@ -76,7 +76,7 @@ void hubiio_crb_free(struct hubdev_info *hubdev_info, int crbnum)
76 */ 76 */
77 REMOTE_HUB_S(hubdev_info->hdi_nasid, IIO_ICDR, (IIO_ICDR_PND | crbnum)); 77 REMOTE_HUB_S(hubdev_info->hdi_nasid, IIO_ICDR, (IIO_ICDR_PND | crbnum));
78 while (REMOTE_HUB_L(hubdev_info->hdi_nasid, IIO_ICDR) & IIO_ICDR_PND) 78 while (REMOTE_HUB_L(hubdev_info->hdi_nasid, IIO_ICDR) & IIO_ICDR_PND)
79 udelay(1); 79 cpu_relax();
80 80
81} 81}
82 82
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index 414cdf2e3c96..4564ed0b5ff3 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -18,6 +18,7 @@
18#include <asm/sn/simulator.h> 18#include <asm/sn/simulator.h>
19#include <asm/sn/sn_sal.h> 19#include <asm/sn/sn_sal.h>
20#include <asm/sn/tioca_provider.h> 20#include <asm/sn/tioca_provider.h>
21#include <asm/sn/tioce_provider.h>
21#include "xtalk/hubdev.h" 22#include "xtalk/hubdev.h"
22#include "xtalk/xwidgetdev.h" 23#include "xtalk/xwidgetdev.h"
23 24
@@ -44,6 +45,9 @@ int sn_ioif_inited = 0; /* SN I/O infrastructure initialized? */
44 45
45struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */ 46struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */
46 47
48static int max_segment_number = 0; /* Default highest segment number */
49static int max_pcibus_number = 255; /* Default highest pci bus number */
50
47/* 51/*
48 * Hooks and struct for unsupported pci providers 52 * Hooks and struct for unsupported pci providers
49 */ 53 */
@@ -157,13 +161,28 @@ static void sn_fixup_ionodes(void)
157 uint64_t nasid; 161 uint64_t nasid;
158 int i, widget; 162 int i, widget;
159 163
164 /*
165 * Get SGI Specific HUB chipset information.
166 * Inform Prom that this kernel can support domain bus numbering.
167 */
160 for (i = 0; i < numionodes; i++) { 168 for (i = 0; i < numionodes; i++) {
161 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo); 169 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
162 nasid = cnodeid_to_nasid(i); 170 nasid = cnodeid_to_nasid(i);
171 hubdev->max_segment_number = 0xffffffff;
172 hubdev->max_pcibus_number = 0xff;
163 status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev)); 173 status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev));
164 if (status) 174 if (status)
165 continue; 175 continue;
166 176
177 /* Save the largest Domain and pcibus numbers found. */
178 if (hubdev->max_segment_number) {
179 /*
180 * Dealing with a Prom that supports segments.
181 */
182 max_segment_number = hubdev->max_segment_number;
183 max_pcibus_number = hubdev->max_pcibus_number;
184 }
185
167 /* Attach the error interrupt handlers */ 186 /* Attach the error interrupt handlers */
168 if (nasid & 1) 187 if (nasid & 1)
169 ice_error_init(hubdev); 188 ice_error_init(hubdev);
@@ -230,7 +249,7 @@ void sn_pci_unfixup_slot(struct pci_dev *dev)
230void sn_pci_fixup_slot(struct pci_dev *dev) 249void sn_pci_fixup_slot(struct pci_dev *dev)
231{ 250{
232 int idx; 251 int idx;
233 int segment = 0; 252 int segment = pci_domain_nr(dev->bus);
234 int status = 0; 253 int status = 0;
235 struct pcibus_bussoft *bs; 254 struct pcibus_bussoft *bs;
236 struct pci_bus *host_pci_bus; 255 struct pci_bus *host_pci_bus;
@@ -283,9 +302,9 @@ void sn_pci_fixup_slot(struct pci_dev *dev)
283 * PCI host_pci_dev struct and set up host bus linkages 302 * PCI host_pci_dev struct and set up host bus linkages
284 */ 303 */
285 304
286 bus_no = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32; 305 bus_no = (SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32) & 0xff;
287 devfn = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle & 0xffffffff; 306 devfn = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle & 0xffffffff;
288 host_pci_bus = pci_find_bus(pci_domain_nr(dev->bus), bus_no); 307 host_pci_bus = pci_find_bus(segment, bus_no);
289 host_pci_dev = pci_get_slot(host_pci_bus, devfn); 308 host_pci_dev = pci_get_slot(host_pci_bus, devfn);
290 309
291 SN_PCIDEV_INFO(dev)->host_pci_dev = host_pci_dev; 310 SN_PCIDEV_INFO(dev)->host_pci_dev = host_pci_dev;
@@ -333,6 +352,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
333 prom_bussoft_ptr = __va(prom_bussoft_ptr); 352 prom_bussoft_ptr = __va(prom_bussoft_ptr);
334 353
335 controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL); 354 controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL);
355 controller->segment = segment;
336 if (!controller) 356 if (!controller)
337 BUG(); 357 BUG();
338 358
@@ -390,7 +410,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
390 if (controller->node >= num_online_nodes()) { 410 if (controller->node >= num_online_nodes()) {
391 struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus); 411 struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);
392 412
393 printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%lu" 413 printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
394 "L_IO=%lx L_MEM=%lx BASE=%lx\n", 414 "L_IO=%lx L_MEM=%lx BASE=%lx\n",
395 b->bs_asic_type, b->bs_xid, b->bs_persist_busnum, 415 b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
396 b->bs_legacy_io, b->bs_legacy_mem, b->bs_base); 416 b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
@@ -445,6 +465,7 @@ sn_sysdata_free_start:
445static int __init sn_pci_init(void) 465static int __init sn_pci_init(void)
446{ 466{
447 int i = 0; 467 int i = 0;
468 int j = 0;
448 struct pci_dev *pci_dev = NULL; 469 struct pci_dev *pci_dev = NULL;
449 extern void sn_init_cpei_timer(void); 470 extern void sn_init_cpei_timer(void);
450#ifdef CONFIG_PROC_FS 471#ifdef CONFIG_PROC_FS
@@ -464,6 +485,7 @@ static int __init sn_pci_init(void)
464 485
465 pcibr_init_provider(); 486 pcibr_init_provider();
466 tioca_init_provider(); 487 tioca_init_provider();
488 tioce_init_provider();
467 489
468 /* 490 /*
469 * This is needed to avoid bounce limit checks in the blk layer 491 * This is needed to avoid bounce limit checks in the blk layer
@@ -479,8 +501,9 @@ static int __init sn_pci_init(void)
479#endif 501#endif
480 502
481 /* busses are not known yet ... */ 503 /* busses are not known yet ... */
482 for (i = 0; i < PCI_BUSES_TO_SCAN; i++) 504 for (i = 0; i <= max_segment_number; i++)
483 sn_pci_controller_fixup(0, i, NULL); 505 for (j = 0; j <= max_pcibus_number; j++)
506 sn_pci_controller_fixup(i, j, NULL);
484 507
485 /* 508 /*
486 * Generic Linux PCI Layer has created the pci_bus and pci_dev 509 * Generic Linux PCI Layer has created the pci_bus and pci_dev
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 84d276a14ecb..9fc74631ba8a 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -5,7 +5,7 @@
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved. 8 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
9 */ 9 */
10 10
11#include <linux/irq.h> 11#include <linux/irq.h>
@@ -76,16 +76,14 @@ static void sn_enable_irq(unsigned int irq)
76 76
77static void sn_ack_irq(unsigned int irq) 77static void sn_ack_irq(unsigned int irq)
78{ 78{
79 uint64_t event_occurred, mask = 0; 79 u64 event_occurred, mask = 0;
80 int nasid;
81 80
82 irq = irq & 0xff; 81 irq = irq & 0xff;
83 nasid = get_nasid();
84 event_occurred = 82 event_occurred =
85 HUB_L((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED)); 83 HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
86 mask = event_occurred & SH_ALL_INT_MASK; 84 mask = event_occurred & SH_ALL_INT_MASK;
87 HUB_S((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED_ALIAS), 85 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
88 mask); 86 mask);
89 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); 87 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
90 88
91 move_irq(irq); 89 move_irq(irq);
@@ -93,15 +91,12 @@ static void sn_ack_irq(unsigned int irq)
93 91
94static void sn_end_irq(unsigned int irq) 92static void sn_end_irq(unsigned int irq)
95{ 93{
96 int nasid;
97 int ivec; 94 int ivec;
98 uint64_t event_occurred; 95 u64 event_occurred;
99 96
100 ivec = irq & 0xff; 97 ivec = irq & 0xff;
101 if (ivec == SGI_UART_VECTOR) { 98 if (ivec == SGI_UART_VECTOR) {
102 nasid = get_nasid(); 99 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
103 event_occurred = HUB_L((uint64_t *) GLOBAL_MMR_ADDR
104 (nasid, SH_EVENT_OCCURRED));
105 /* If the UART bit is set here, we may have received an 100 /* If the UART bit is set here, we may have received an
106 * interrupt from the UART that the driver missed. To 101 * interrupt from the UART that the driver missed. To
107 * make sure, we IPI ourselves to force us to look again. 102 * make sure, we IPI ourselves to force us to look again.
@@ -132,6 +127,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
132 int local_widget, status; 127 int local_widget, status;
133 nasid_t local_nasid; 128 nasid_t local_nasid;
134 struct sn_irq_info *new_irq_info; 129 struct sn_irq_info *new_irq_info;
130 struct sn_pcibus_provider *pci_provider;
135 131
136 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC); 132 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
137 if (new_irq_info == NULL) 133 if (new_irq_info == NULL)
@@ -171,8 +167,9 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
171 new_irq_info->irq_cpuid = cpuid; 167 new_irq_info->irq_cpuid = cpuid;
172 register_intr_pda(new_irq_info); 168 register_intr_pda(new_irq_info);
173 169
174 if (IS_PCI_BRIDGE_ASIC(new_irq_info->irq_bridge_type)) 170 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
175 pcibr_change_devices_irq(new_irq_info); 171 if (pci_provider && pci_provider->target_interrupt)
172 (pci_provider->target_interrupt)(new_irq_info);
176 173
177 spin_lock(&sn_irq_info_lock); 174 spin_lock(&sn_irq_info_lock);
178 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list); 175 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
@@ -317,6 +314,16 @@ void sn_irq_unfixup(struct pci_dev *pci_dev)
317 pci_dev_put(pci_dev); 314 pci_dev_put(pci_dev);
318} 315}
319 316
317static inline void
318sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
319{
320 struct sn_pcibus_provider *pci_provider;
321
322 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
323 if (pci_provider && pci_provider->force_interrupt)
324 (*pci_provider->force_interrupt)(sn_irq_info);
325}
326
320static void force_interrupt(int irq) 327static void force_interrupt(int irq)
321{ 328{
322 struct sn_irq_info *sn_irq_info; 329 struct sn_irq_info *sn_irq_info;
@@ -325,11 +332,9 @@ static void force_interrupt(int irq)
325 return; 332 return;
326 333
327 rcu_read_lock(); 334 rcu_read_lock();
328 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) { 335 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
329 if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) && 336 sn_call_force_intr_provider(sn_irq_info);
330 (sn_irq_info->irq_bridge != NULL)) 337
331 pcibr_force_interrupt(sn_irq_info);
332 }
333 rcu_read_unlock(); 338 rcu_read_unlock();
334} 339}
335 340
@@ -351,6 +356,14 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
351 struct pcidev_info *pcidev_info; 356 struct pcidev_info *pcidev_info;
352 struct pcibus_info *pcibus_info; 357 struct pcibus_info *pcibus_info;
353 358
359 /*
360 * Bridge types attached to TIO (anything but PIC) do not need this WAR
361 * since they do not target Shub II interrupt registers. If that
362 * ever changes, this check needs to accomodate.
363 */
364 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
365 return;
366
354 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; 367 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
355 if (!pcidev_info) 368 if (!pcidev_info)
356 return; 369 return;
@@ -377,16 +390,12 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
377 break; 390 break;
378 } 391 }
379 if (!test_bit(irr_bit, &irr_reg)) { 392 if (!test_bit(irr_bit, &irr_reg)) {
380 if (!test_bit(irq, pda->sn_soft_irr)) { 393 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
381 if (!test_bit(irq, pda->sn_in_service_ivecs)) { 394 regval &= 0xff;
382 regval &= 0xff; 395 if (sn_irq_info->irq_int_bit & regval &
383 if (sn_irq_info->irq_int_bit & regval & 396 sn_irq_info->irq_last_intr) {
384 sn_irq_info->irq_last_intr) { 397 regval &= ~(sn_irq_info->irq_int_bit & regval);
385 regval &= 398 sn_call_force_intr_provider(sn_irq_info);
386 ~(sn_irq_info->
387 irq_int_bit & regval);
388 pcibr_force_interrupt(sn_irq_info);
389 }
390 } 399 }
391 } 400 }
392 } 401 }
@@ -404,13 +413,7 @@ void sn_lb_int_war_check(void)
404 rcu_read_lock(); 413 rcu_read_lock();
405 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) { 414 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
406 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) { 415 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
407 /* 416 sn_check_intr(i, sn_irq_info);
408 * Only call for PCI bridges that are fully
409 * initialized.
410 */
411 if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
412 (sn_irq_info->irq_bridge != NULL))
413 sn_check_intr(i, sn_irq_info);
414 } 417 }
415 } 418 }
416 rcu_read_unlock(); 419 rcu_read_unlock();
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 7c7fe441d623..a594aca959e6 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -80,8 +80,6 @@ EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
80DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda); 80DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
81EXPORT_PER_CPU_SYMBOL(__sn_nodepda); 81EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
82 82
83partid_t sn_partid = -1;
84EXPORT_SYMBOL(sn_partid);
85char sn_system_serial_number_string[128]; 83char sn_system_serial_number_string[128];
86EXPORT_SYMBOL(sn_system_serial_number_string); 84EXPORT_SYMBOL(sn_system_serial_number_string);
87u64 sn_partition_serial_number; 85u64 sn_partition_serial_number;
@@ -403,6 +401,7 @@ static void __init sn_init_pdas(char **cmdline_p)
403 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t)); 401 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
404 memset(nodepdaindr[cnode]->phys_cpuid, -1, 402 memset(nodepdaindr[cnode]->phys_cpuid, -1,
405 sizeof(nodepdaindr[cnode]->phys_cpuid)); 403 sizeof(nodepdaindr[cnode]->phys_cpuid));
404 spin_lock_init(&nodepdaindr[cnode]->ptc_lock);
406 } 405 }
407 406
408 /* 407 /*
@@ -532,8 +531,8 @@ void __init sn_cpu_init(void)
532 */ 531 */
533 { 532 {
534 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0}; 533 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
535 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1, 534 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2,
536 SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3}; 535 SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3};
537 u64 *pio; 536 u64 *pio;
538 pio = is_shub1() ? pio1 : pio2; 537 pio = is_shub1() ? pio1 : pio2;
539 pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]); 538 pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
diff --git a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
index 96cb71d15682..3fa95065a446 100644
--- a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
+++ b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <asm/types.h> 9#include <asm/types.h>
@@ -11,7 +11,7 @@
11 11
12#define DEADLOCKBIT SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT 12#define DEADLOCKBIT SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT
13#define WRITECOUNTMASK SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK 13#define WRITECOUNTMASK SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK
14#define ALIAS_OFFSET (SH1_PIO_WRITE_STATUS_0_ALIAS-SH1_PIO_WRITE_STATUS_0) 14#define ALIAS_OFFSET 8
15 15
16 16
17 .global sn2_ptc_deadlock_recovery_core 17 .global sn2_ptc_deadlock_recovery_core
@@ -36,13 +36,15 @@ sn2_ptc_deadlock_recovery_core:
36 extr.u piowcphy=piowc,0,61;; // Convert piowc to uncached physical address 36 extr.u piowcphy=piowc,0,61;; // Convert piowc to uncached physical address
37 dep piowcphy=-1,piowcphy,63,1 37 dep piowcphy=-1,piowcphy,63,1
38 movl mask=WRITECOUNTMASK 38 movl mask=WRITECOUNTMASK
39 mov r8=r0
39 40
401: 411:
41 add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register 42 add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register
42 mov scr1=7;; // Clear DEADLOCK, WRITE_ERROR, MULTI_WRITE_ERROR 43 ;;
43 st8.rel [scr2]=scr1;; 44 ld8.acq scr1=[scr2];;
44 45
455: ld8.acq scr1=[piowc];; // Wait for PIOs to complete. 465: ld8.acq scr1=[piowc];; // Wait for PIOs to complete.
47 hint @pause
46 and scr2=scr1,mask;; // mask of writecount bits 48 and scr2=scr1,mask;; // mask of writecount bits
47 cmp.ne p6,p0=zeroval,scr2 49 cmp.ne p6,p0=zeroval,scr2
48(p6) br.cond.sptk 5b 50(p6) br.cond.sptk 5b
@@ -57,6 +59,7 @@ sn2_ptc_deadlock_recovery_core:
57 st8.rel [ptc0]=data0 // Write PTC0 & wait for completion. 59 st8.rel [ptc0]=data0 // Write PTC0 & wait for completion.
58 60
595: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete. 615: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete.
62 hint @pause
60 and scr2=scr1,mask;; // mask of writecount bits 63 and scr2=scr1,mask;; // mask of writecount bits
61 cmp.ne p6,p0=zeroval,scr2 64 cmp.ne p6,p0=zeroval,scr2
62(p6) br.cond.sptk 5b;; 65(p6) br.cond.sptk 5b;;
@@ -67,6 +70,7 @@ sn2_ptc_deadlock_recovery_core:
67(p7) st8.rel [ptc1]=data1;; // Now write PTC1. 70(p7) st8.rel [ptc1]=data1;; // Now write PTC1.
68 71
695: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete. 725: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete.
73 hint @pause
70 and scr2=scr1,mask;; // mask of writecount bits 74 and scr2=scr1,mask;; // mask of writecount bits
71 cmp.ne p6,p0=zeroval,scr2 75 cmp.ne p6,p0=zeroval,scr2
72(p6) br.cond.sptk 5b 76(p6) br.cond.sptk 5b
@@ -77,6 +81,7 @@ sn2_ptc_deadlock_recovery_core:
77 srlz.i;; 81 srlz.i;;
78 ////////////// END PHYSICAL MODE //////////////////// 82 ////////////// END PHYSICAL MODE ////////////////////
79 83
84(p8) add r8=1,r8
80(p8) br.cond.spnt 1b;; // Repeat if DEADLOCK occurred. 85(p8) br.cond.spnt 1b;; // Repeat if DEADLOCK occurred.
81 86
82 br.ret.sptk rp 87 br.ret.sptk rp
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c
index 7af05a7ac743..0a4ee50c302f 100644
--- a/arch/ia64/sn/kernel/sn2/sn2_smp.c
+++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c
@@ -5,7 +5,7 @@
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. 8 * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
9 */ 9 */
10 10
11#include <linux/init.h> 11#include <linux/init.h>
@@ -20,6 +20,8 @@
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/bitops.h> 21#include <linux/bitops.h>
22#include <linux/nodemask.h> 22#include <linux/nodemask.h>
23#include <linux/proc_fs.h>
24#include <linux/seq_file.h>
23 25
24#include <asm/processor.h> 26#include <asm/processor.h>
25#include <asm/irq.h> 27#include <asm/irq.h>
@@ -39,12 +41,120 @@
39#include <asm/sn/nodepda.h> 41#include <asm/sn/nodepda.h>
40#include <asm/sn/rw_mmr.h> 42#include <asm/sn/rw_mmr.h>
41 43
42void sn2_ptc_deadlock_recovery(volatile unsigned long *, unsigned long data0, 44DEFINE_PER_CPU(struct ptc_stats, ptcstats);
43 volatile unsigned long *, unsigned long data1); 45DECLARE_PER_CPU(struct ptc_stats, ptcstats);
44 46
45static __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock); 47static __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock);
46 48
47static unsigned long sn2_ptc_deadlock_count; 49void sn2_ptc_deadlock_recovery(short *, short, int, volatile unsigned long *, unsigned long data0,
50 volatile unsigned long *, unsigned long data1);
51
52#ifdef DEBUG_PTC
53/*
54 * ptctest:
55 *
56 * xyz - 3 digit hex number:
57 * x - Force PTC purges to use shub:
58 * 0 - no force
59 * 1 - force
60 * y - interupt enable
61 * 0 - disable interrupts
62 * 1 - leave interuupts enabled
63 * z - type of lock:
64 * 0 - global lock
65 * 1 - node local lock
66 * 2 - no lock
67 *
68 * Note: on shub1, only ptctest == 0 is supported. Don't try other values!
69 */
70
71static unsigned int sn2_ptctest = 0;
72
73static int __init ptc_test(char *str)
74{
75 get_option(&str, &sn2_ptctest);
76 return 1;
77}
78__setup("ptctest=", ptc_test);
79
80static inline int ptc_lock(unsigned long *flagp)
81{
82 unsigned long opt = sn2_ptctest & 255;
83
84 switch (opt) {
85 case 0x00:
86 spin_lock_irqsave(&sn2_global_ptc_lock, *flagp);
87 break;
88 case 0x01:
89 spin_lock_irqsave(&sn_nodepda->ptc_lock, *flagp);
90 break;
91 case 0x02:
92 local_irq_save(*flagp);
93 break;
94 case 0x10:
95 spin_lock(&sn2_global_ptc_lock);
96 break;
97 case 0x11:
98 spin_lock(&sn_nodepda->ptc_lock);
99 break;
100 case 0x12:
101 break;
102 default:
103 BUG();
104 }
105 return opt;
106}
107
108static inline void ptc_unlock(unsigned long flags, int opt)
109{
110 switch (opt) {
111 case 0x00:
112 spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
113 break;
114 case 0x01:
115 spin_unlock_irqrestore(&sn_nodepda->ptc_lock, flags);
116 break;
117 case 0x02:
118 local_irq_restore(flags);
119 break;
120 case 0x10:
121 spin_unlock(&sn2_global_ptc_lock);
122 break;
123 case 0x11:
124 spin_unlock(&sn_nodepda->ptc_lock);
125 break;
126 case 0x12:
127 break;
128 default:
129 BUG();
130 }
131}
132#else
133
134#define sn2_ptctest 0
135
136static inline int ptc_lock(unsigned long *flagp)
137{
138 spin_lock_irqsave(&sn2_global_ptc_lock, *flagp);
139 return 0;
140}
141
142static inline void ptc_unlock(unsigned long flags, int opt)
143{
144 spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
145}
146#endif
147
148struct ptc_stats {
149 unsigned long ptc_l;
150 unsigned long change_rid;
151 unsigned long shub_ptc_flushes;
152 unsigned long nodes_flushed;
153 unsigned long deadlocks;
154 unsigned long lock_itc_clocks;
155 unsigned long shub_itc_clocks;
156 unsigned long shub_itc_clocks_max;
157};
48 158
49static inline unsigned long wait_piowc(void) 159static inline unsigned long wait_piowc(void)
50{ 160{
@@ -89,9 +199,9 @@ void
89sn2_global_tlb_purge(unsigned long start, unsigned long end, 199sn2_global_tlb_purge(unsigned long start, unsigned long end,
90 unsigned long nbits) 200 unsigned long nbits)
91{ 201{
92 int i, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0; 202 int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
93 volatile unsigned long *ptc0, *ptc1; 203 volatile unsigned long *ptc0, *ptc1;
94 unsigned long flags = 0, data0 = 0, data1 = 0; 204 unsigned long itc, itc2, flags, data0 = 0, data1 = 0;
95 struct mm_struct *mm = current->active_mm; 205 struct mm_struct *mm = current->active_mm;
96 short nasids[MAX_NUMNODES], nix; 206 short nasids[MAX_NUMNODES], nix;
97 nodemask_t nodes_flushed; 207 nodemask_t nodes_flushed;
@@ -114,16 +224,19 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
114 start += (1UL << nbits); 224 start += (1UL << nbits);
115 } while (start < end); 225 } while (start < end);
116 ia64_srlz_i(); 226 ia64_srlz_i();
227 __get_cpu_var(ptcstats).ptc_l++;
117 preempt_enable(); 228 preempt_enable();
118 return; 229 return;
119 } 230 }
120 231
121 if (atomic_read(&mm->mm_users) == 1) { 232 if (atomic_read(&mm->mm_users) == 1) {
122 flush_tlb_mm(mm); 233 flush_tlb_mm(mm);
234 __get_cpu_var(ptcstats).change_rid++;
123 preempt_enable(); 235 preempt_enable();
124 return; 236 return;
125 } 237 }
126 238
239 itc = ia64_get_itc();
127 nix = 0; 240 nix = 0;
128 for_each_node_mask(cnode, nodes_flushed) 241 for_each_node_mask(cnode, nodes_flushed)
129 nasids[nix++] = cnodeid_to_nasid(cnode); 242 nasids[nix++] = cnodeid_to_nasid(cnode);
@@ -148,7 +261,12 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
148 261
149 mynasid = get_nasid(); 262 mynasid = get_nasid();
150 263
151 spin_lock_irqsave(&sn2_global_ptc_lock, flags); 264 itc = ia64_get_itc();
265 opt = ptc_lock(&flags);
266 itc2 = ia64_get_itc();
267 __get_cpu_var(ptcstats).lock_itc_clocks += itc2 - itc;
268 __get_cpu_var(ptcstats).shub_ptc_flushes++;
269 __get_cpu_var(ptcstats).nodes_flushed += nix;
152 270
153 do { 271 do {
154 if (shub1) 272 if (shub1)
@@ -157,7 +275,7 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
157 data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK); 275 data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK);
158 for (i = 0; i < nix; i++) { 276 for (i = 0; i < nix; i++) {
159 nasid = nasids[i]; 277 nasid = nasids[i];
160 if (unlikely(nasid == mynasid)) { 278 if ((!(sn2_ptctest & 3)) && unlikely(nasid == mynasid)) {
161 ia64_ptcga(start, nbits << 2); 279 ia64_ptcga(start, nbits << 2);
162 ia64_srlz_i(); 280 ia64_srlz_i();
163 } else { 281 } else {
@@ -169,18 +287,22 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
169 flushed = 1; 287 flushed = 1;
170 } 288 }
171 } 289 }
172
173 if (flushed 290 if (flushed
174 && (wait_piowc() & 291 && (wait_piowc() &
175 SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK)) { 292 (SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK))) {
176 sn2_ptc_deadlock_recovery(ptc0, data0, ptc1, data1); 293 sn2_ptc_deadlock_recovery(nasids, nix, mynasid, ptc0, data0, ptc1, data1);
177 } 294 }
178 295
179 start += (1UL << nbits); 296 start += (1UL << nbits);
180 297
181 } while (start < end); 298 } while (start < end);
182 299
183 spin_unlock_irqrestore(&sn2_global_ptc_lock, flags); 300 itc2 = ia64_get_itc() - itc2;
301 __get_cpu_var(ptcstats).shub_itc_clocks += itc2;
302 if (itc2 > __get_cpu_var(ptcstats).shub_itc_clocks_max)
303 __get_cpu_var(ptcstats).shub_itc_clocks_max = itc2;
304
305 ptc_unlock(flags, opt);
184 306
185 preempt_enable(); 307 preempt_enable();
186} 308}
@@ -192,31 +314,29 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
192 * TLB flush transaction. The recovery sequence is somewhat tricky & is 314 * TLB flush transaction. The recovery sequence is somewhat tricky & is
193 * coded in assembly language. 315 * coded in assembly language.
194 */ 316 */
195void sn2_ptc_deadlock_recovery(volatile unsigned long *ptc0, unsigned long data0, 317void sn2_ptc_deadlock_recovery(short *nasids, short nix, int mynasid, volatile unsigned long *ptc0, unsigned long data0,
196 volatile unsigned long *ptc1, unsigned long data1) 318 volatile unsigned long *ptc1, unsigned long data1)
197{ 319{
198 extern void sn2_ptc_deadlock_recovery_core(volatile unsigned long *, unsigned long, 320 extern void sn2_ptc_deadlock_recovery_core(volatile unsigned long *, unsigned long,
199 volatile unsigned long *, unsigned long, volatile unsigned long *, unsigned long); 321 volatile unsigned long *, unsigned long, volatile unsigned long *, unsigned long);
200 int cnode, mycnode, nasid; 322 short nasid, i;
201 volatile unsigned long *piows; 323 unsigned long *piows, zeroval;
202 volatile unsigned long zeroval;
203 324
204 sn2_ptc_deadlock_count++; 325 __get_cpu_var(ptcstats).deadlocks++;
205 326
206 piows = pda->pio_write_status_addr; 327 piows = (unsigned long *) pda->pio_write_status_addr;
207 zeroval = pda->pio_write_status_val; 328 zeroval = pda->pio_write_status_val;
208 329
209 mycnode = numa_node_id(); 330 for (i=0; i < nix; i++) {
210 331 nasid = nasids[i];
211 for_each_online_node(cnode) { 332 if (!(sn2_ptctest & 3) && nasid == mynasid)
212 if (is_headless_node(cnode) || cnode == mycnode)
213 continue; 333 continue;
214 nasid = cnodeid_to_nasid(cnode);
215 ptc0 = CHANGE_NASID(nasid, ptc0); 334 ptc0 = CHANGE_NASID(nasid, ptc0);
216 if (ptc1) 335 if (ptc1)
217 ptc1 = CHANGE_NASID(nasid, ptc1); 336 ptc1 = CHANGE_NASID(nasid, ptc1);
218 sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval); 337 sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval);
219 } 338 }
339
220} 340}
221 341
222/** 342/**
@@ -293,3 +413,93 @@ void sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect)
293 413
294 sn_send_IPI_phys(nasid, physid, vector, delivery_mode); 414 sn_send_IPI_phys(nasid, physid, vector, delivery_mode);
295} 415}
416
417#ifdef CONFIG_PROC_FS
418
419#define PTC_BASENAME "sgi_sn/ptc_statistics"
420
421static void *sn2_ptc_seq_start(struct seq_file *file, loff_t * offset)
422{
423 if (*offset < NR_CPUS)
424 return offset;
425 return NULL;
426}
427
428static void *sn2_ptc_seq_next(struct seq_file *file, void *data, loff_t * offset)
429{
430 (*offset)++;
431 if (*offset < NR_CPUS)
432 return offset;
433 return NULL;
434}
435
436static void sn2_ptc_seq_stop(struct seq_file *file, void *data)
437{
438}
439
440static int sn2_ptc_seq_show(struct seq_file *file, void *data)
441{
442 struct ptc_stats *stat;
443 int cpu;
444
445 cpu = *(loff_t *) data;
446
447 if (!cpu) {
448 seq_printf(file, "# ptc_l change_rid shub_ptc_flushes shub_nodes_flushed deadlocks lock_nsec shub_nsec shub_nsec_max\n");
449 seq_printf(file, "# ptctest %d\n", sn2_ptctest);
450 }
451
452 if (cpu < NR_CPUS && cpu_online(cpu)) {
453 stat = &per_cpu(ptcstats, cpu);
454 seq_printf(file, "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld\n", cpu, stat->ptc_l,
455 stat->change_rid, stat->shub_ptc_flushes, stat->nodes_flushed,
456 stat->deadlocks,
457 1000 * stat->lock_itc_clocks / per_cpu(cpu_info, cpu).cyc_per_usec,
458 1000 * stat->shub_itc_clocks / per_cpu(cpu_info, cpu).cyc_per_usec,
459 1000 * stat->shub_itc_clocks_max / per_cpu(cpu_info, cpu).cyc_per_usec);
460 }
461
462 return 0;
463}
464
465static struct seq_operations sn2_ptc_seq_ops = {
466 .start = sn2_ptc_seq_start,
467 .next = sn2_ptc_seq_next,
468 .stop = sn2_ptc_seq_stop,
469 .show = sn2_ptc_seq_show
470};
471
472int sn2_ptc_proc_open(struct inode *inode, struct file *file)
473{
474 return seq_open(file, &sn2_ptc_seq_ops);
475}
476
477static struct file_operations proc_sn2_ptc_operations = {
478 .open = sn2_ptc_proc_open,
479 .read = seq_read,
480 .llseek = seq_lseek,
481 .release = seq_release,
482};
483
484static struct proc_dir_entry *proc_sn2_ptc;
485
486static int __init sn2_ptc_init(void)
487{
488 if (!(proc_sn2_ptc = create_proc_entry(PTC_BASENAME, 0444, NULL))) {
489 printk(KERN_ERR "unable to create %s proc entry", PTC_BASENAME);
490 return -EINVAL;
491 }
492 proc_sn2_ptc->proc_fops = &proc_sn2_ptc_operations;
493 spin_lock_init(&sn2_global_ptc_lock);
494 return 0;
495}
496
497static void __exit sn2_ptc_exit(void)
498{
499 remove_proc_entry(PTC_BASENAME, NULL);
500}
501
502module_init(sn2_ptc_init);
503module_exit(sn2_ptc_exit);
504#endif /* CONFIG_PROC_FS */
505
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
index 833e700fdac9..0513aacac8c1 100644
--- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -36,7 +36,6 @@
36#include <asm/topology.h> 36#include <asm/topology.h>
37#include <asm/smp.h> 37#include <asm/smp.h>
38#include <asm/semaphore.h> 38#include <asm/semaphore.h>
39#include <asm/segment.h>
40#include <asm/uaccess.h> 39#include <asm/uaccess.h>
41#include <asm/sal.h> 40#include <asm/sal.h>
42#include <asm/sn/io.h> 41#include <asm/sn/io.h>
@@ -59,7 +58,7 @@ static int sn_hwperf_enum_objects(int *nobj, struct sn_hwperf_object_info **ret)
59 struct sn_hwperf_object_info *objbuf = NULL; 58 struct sn_hwperf_object_info *objbuf = NULL;
60 59
61 if ((e = sn_hwperf_init()) < 0) { 60 if ((e = sn_hwperf_init()) < 0) {
62 printk("sn_hwperf_init failed: err %d\n", e); 61 printk(KERN_ERR "sn_hwperf_init failed: err %d\n", e);
63 goto out; 62 goto out;
64 } 63 }
65 64
@@ -111,7 +110,7 @@ static int sn_hwperf_geoid_to_cnode(char *location)
111 if (sn_hwperf_location_to_bpos(location, &rack, &bay, &slot, &slab)) 110 if (sn_hwperf_location_to_bpos(location, &rack, &bay, &slot, &slab))
112 return -1; 111 return -1;
113 112
114 for (cnode = 0; cnode < numionodes; cnode++) { 113 for_each_node(cnode) {
115 geoid = cnodeid_get_geoid(cnode); 114 geoid = cnodeid_get_geoid(cnode);
116 module_id = geo_module(geoid); 115 module_id = geo_module(geoid);
117 this_rack = MODULE_GET_RACK(module_id); 116 this_rack = MODULE_GET_RACK(module_id);
@@ -124,11 +123,13 @@ static int sn_hwperf_geoid_to_cnode(char *location)
124 } 123 }
125 } 124 }
126 125
127 return cnode < numionodes ? cnode : -1; 126 return node_possible(cnode) ? cnode : -1;
128} 127}
129 128
130static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj) 129static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj)
131{ 130{
131 if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
132 BUG();
132 if (!obj->sn_hwp_this_part) 133 if (!obj->sn_hwp_this_part)
133 return -1; 134 return -1;
134 return sn_hwperf_geoid_to_cnode(obj->location); 135 return sn_hwperf_geoid_to_cnode(obj->location);
@@ -174,31 +175,199 @@ static const char *sn_hwperf_get_slabname(struct sn_hwperf_object_info *obj,
174 return slabname; 175 return slabname;
175} 176}
176 177
177static void print_pci_topology(struct seq_file *s, 178static void print_pci_topology(struct seq_file *s)
178 struct sn_hwperf_object_info *obj, int *ordinal, 179{
179 u64 rack, u64 bay, u64 slot, u64 slab) 180 char *p;
181 size_t sz;
182 int e;
183
184 for (sz = PAGE_SIZE; sz < 16 * PAGE_SIZE; sz += PAGE_SIZE) {
185 if (!(p = (char *)kmalloc(sz, GFP_KERNEL)))
186 break;
187 e = ia64_sn_ioif_get_pci_topology(__pa(p), sz);
188 if (e == SALRET_OK)
189 seq_puts(s, p);
190 kfree(p);
191 if (e == SALRET_OK || e == SALRET_NOT_IMPLEMENTED)
192 break;
193 }
194}
195
196static inline int sn_hwperf_has_cpus(cnodeid_t node)
197{
198 return node_online(node) && nr_cpus_node(node);
199}
200
201static inline int sn_hwperf_has_mem(cnodeid_t node)
202{
203 return node_online(node) && NODE_DATA(node)->node_present_pages;
204}
205
206static struct sn_hwperf_object_info *
207sn_hwperf_findobj_id(struct sn_hwperf_object_info *objbuf,
208 int nobj, int id)
180{ 209{
181 char *p1; 210 int i;
182 char *p2; 211 struct sn_hwperf_object_info *p = objbuf;
183 char *pg; 212
184 213 for (i=0; i < nobj; i++, p++) {
185 if (!(pg = (char *)get_zeroed_page(GFP_KERNEL))) 214 if (p->id == id)
186 return; /* ignore */ 215 return p;
187 if (ia64_sn_ioif_get_pci_topology(rack, bay, slot, slab, 216 }
188 __pa(pg), PAGE_SIZE) == SN_HWPERF_OP_OK) { 217
189 for (p1=pg; *p1 && p1 < pg + PAGE_SIZE;) { 218 return NULL;
190 if (!(p2 = strchr(p1, '\n'))) 219
220}
221
222static int sn_hwperf_get_nearest_node_objdata(struct sn_hwperf_object_info *objbuf,
223 int nobj, cnodeid_t node, cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node)
224{
225 int e;
226 struct sn_hwperf_object_info *nodeobj = NULL;
227 struct sn_hwperf_object_info *op;
228 struct sn_hwperf_object_info *dest;
229 struct sn_hwperf_object_info *router;
230 struct sn_hwperf_port_info ptdata[16];
231 int sz, i, j;
232 cnodeid_t c;
233 int found_mem = 0;
234 int found_cpu = 0;
235
236 if (!node_possible(node))
237 return -EINVAL;
238
239 if (sn_hwperf_has_cpus(node)) {
240 if (near_cpu_node)
241 *near_cpu_node = node;
242 found_cpu++;
243 }
244
245 if (sn_hwperf_has_mem(node)) {
246 if (near_mem_node)
247 *near_mem_node = node;
248 found_mem++;
249 }
250
251 if (found_cpu && found_mem)
252 return 0; /* trivially successful */
253
254 /* find the argument node object */
255 for (i=0, op=objbuf; i < nobj; i++, op++) {
256 if (!SN_HWPERF_IS_NODE(op) && !SN_HWPERF_IS_IONODE(op))
257 continue;
258 if (node == sn_hwperf_obj_to_cnode(op)) {
259 nodeobj = op;
260 break;
261 }
262 }
263 if (!nodeobj) {
264 e = -ENOENT;
265 goto err;
266 }
267
268 /* get it's interconnect topology */
269 sz = op->ports * sizeof(struct sn_hwperf_port_info);
270 if (sz > sizeof(ptdata))
271 BUG();
272 e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
273 SN_HWPERF_ENUM_PORTS, nodeobj->id, sz,
274 (u64)&ptdata, 0, 0, NULL);
275 if (e != SN_HWPERF_OP_OK) {
276 e = -EINVAL;
277 goto err;
278 }
279
280 /* find nearest node with cpus and nearest memory */
281 for (router=NULL, j=0; j < op->ports; j++) {
282 dest = sn_hwperf_findobj_id(objbuf, nobj, ptdata[j].conn_id);
283 if (!dest || SN_HWPERF_FOREIGN(dest) ||
284 !SN_HWPERF_IS_NODE(dest) || SN_HWPERF_IS_IONODE(dest)) {
285 continue;
286 }
287 c = sn_hwperf_obj_to_cnode(dest);
288 if (!found_cpu && sn_hwperf_has_cpus(c)) {
289 if (near_cpu_node)
290 *near_cpu_node = c;
291 found_cpu++;
292 }
293 if (!found_mem && sn_hwperf_has_mem(c)) {
294 if (near_mem_node)
295 *near_mem_node = c;
296 found_mem++;
297 }
298 if (SN_HWPERF_IS_ROUTER(dest))
299 router = dest;
300 }
301
302 if (router && (!found_cpu || !found_mem)) {
303 /* search for a node connected to the same router */
304 sz = router->ports * sizeof(struct sn_hwperf_port_info);
305 if (sz > sizeof(ptdata))
306 BUG();
307 e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
308 SN_HWPERF_ENUM_PORTS, router->id, sz,
309 (u64)&ptdata, 0, 0, NULL);
310 if (e != SN_HWPERF_OP_OK) {
311 e = -EINVAL;
312 goto err;
313 }
314 for (j=0; j < router->ports; j++) {
315 dest = sn_hwperf_findobj_id(objbuf, nobj,
316 ptdata[j].conn_id);
317 if (!dest || dest->id == node ||
318 SN_HWPERF_FOREIGN(dest) ||
319 !SN_HWPERF_IS_NODE(dest) ||
320 SN_HWPERF_IS_IONODE(dest)) {
321 continue;
322 }
323 c = sn_hwperf_obj_to_cnode(dest);
324 if (!found_cpu && sn_hwperf_has_cpus(c)) {
325 if (near_cpu_node)
326 *near_cpu_node = c;
327 found_cpu++;
328 }
329 if (!found_mem && sn_hwperf_has_mem(c)) {
330 if (near_mem_node)
331 *near_mem_node = c;
332 found_mem++;
333 }
334 if (found_cpu && found_mem)
335 break;
336 }
337 }
338
339 if (!found_cpu || !found_mem) {
340 /* resort to _any_ node with CPUs and memory */
341 for (i=0, op=objbuf; i < nobj; i++, op++) {
342 if (SN_HWPERF_FOREIGN(op) ||
343 SN_HWPERF_IS_IONODE(op) ||
344 !SN_HWPERF_IS_NODE(op)) {
345 continue;
346 }
347 c = sn_hwperf_obj_to_cnode(op);
348 if (!found_cpu && sn_hwperf_has_cpus(c)) {
349 if (near_cpu_node)
350 *near_cpu_node = c;
351 found_cpu++;
352 }
353 if (!found_mem && sn_hwperf_has_mem(c)) {
354 if (near_mem_node)
355 *near_mem_node = c;
356 found_mem++;
357 }
358 if (found_cpu && found_mem)
191 break; 359 break;
192 *p2 = '\0';
193 seq_printf(s, "pcibus %d %s-%s\n",
194 *ordinal, obj->location, p1);
195 (*ordinal)++;
196 p1 = p2 + 1;
197 } 360 }
198 } 361 }
199 free_page((unsigned long)pg); 362
363 if (!found_cpu || !found_mem)
364 e = -ENODATA;
365
366err:
367 return e;
200} 368}
201 369
370
202static int sn_topology_show(struct seq_file *s, void *d) 371static int sn_topology_show(struct seq_file *s, void *d)
203{ 372{
204 int sz; 373 int sz;
@@ -215,7 +384,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
215 struct sn_hwperf_object_info *p; 384 struct sn_hwperf_object_info *p;
216 struct sn_hwperf_object_info *obj = d; /* this object */ 385 struct sn_hwperf_object_info *obj = d; /* this object */
217 struct sn_hwperf_object_info *objs = s->private; /* all objects */ 386 struct sn_hwperf_object_info *objs = s->private; /* all objects */
218 int rack, bay, slot, slab;
219 u8 shubtype; 387 u8 shubtype;
220 u8 system_size; 388 u8 system_size;
221 u8 sharing_size; 389 u8 sharing_size;
@@ -225,7 +393,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
225 u8 region_size; 393 u8 region_size;
226 u16 nasid_mask; 394 u16 nasid_mask;
227 int nasid_msb; 395 int nasid_msb;
228 int pci_bus_ordinal = 0;
229 396
230 if (obj == objs) { 397 if (obj == objs) {
231 seq_printf(s, "# sn_topology version 2\n"); 398 seq_printf(s, "# sn_topology version 2\n");
@@ -253,6 +420,8 @@ static int sn_topology_show(struct seq_file *s, void *d)
253 shubtype ? "shub2" : "shub1", 420 shubtype ? "shub2" : "shub1",
254 (u64)nasid_mask << nasid_shift, nasid_msb, nasid_shift, 421 (u64)nasid_mask << nasid_shift, nasid_msb, nasid_shift,
255 system_size, sharing_size, coher, region_size); 422 system_size, sharing_size, coher, region_size);
423
424 print_pci_topology(s);
256 } 425 }
257 426
258 if (SN_HWPERF_FOREIGN(obj)) { 427 if (SN_HWPERF_FOREIGN(obj)) {
@@ -272,11 +441,24 @@ static int sn_topology_show(struct seq_file *s, void *d)
272 if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj)) 441 if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
273 seq_putc(s, '\n'); 442 seq_putc(s, '\n');
274 else { 443 else {
444 cnodeid_t near_mem = -1;
445 cnodeid_t near_cpu = -1;
446
275 seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal)); 447 seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal));
276 for (i=0; i < numionodes; i++) { 448
277 seq_printf(s, i ? ":%d" : ", dist %d", 449 if (sn_hwperf_get_nearest_node_objdata(objs, sn_hwperf_obj_cnt,
278 node_distance(ordinal, i)); 450 ordinal, &near_mem, &near_cpu) == 0) {
451 seq_printf(s, ", near_mem_nodeid %d, near_cpu_nodeid %d",
452 near_mem, near_cpu);
453 }
454
455 if (!SN_HWPERF_IS_IONODE(obj)) {
456 for_each_online_node(i) {
457 seq_printf(s, i ? ":%d" : ", dist %d",
458 node_distance(ordinal, i));
459 }
279 } 460 }
461
280 seq_putc(s, '\n'); 462 seq_putc(s, '\n');
281 463
282 /* 464 /*
@@ -300,17 +482,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
300 seq_putc(s, '\n'); 482 seq_putc(s, '\n');
301 } 483 }
302 } 484 }
303
304 /*
305 * PCI busses attached to this node, if any
306 */
307 if (sn_hwperf_location_to_bpos(obj->location,
308 &rack, &bay, &slot, &slab)) {
309 /* export pci bus info */
310 print_pci_topology(s, obj, &pci_bus_ordinal,
311 rack, bay, slot, slab);
312
313 }
314 } 485 }
315 486
316 if (obj->ports) { 487 if (obj->ports) {
@@ -572,6 +743,8 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
572 if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) { 743 if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) {
573 memset(p, 0, a.sz); 744 memset(p, 0, a.sz);
574 for (i = 0; i < nobj; i++) { 745 for (i = 0; i < nobj; i++) {
746 if (!SN_HWPERF_IS_NODE(objs + i))
747 continue;
575 node = sn_hwperf_obj_to_cnode(objs + i); 748 node = sn_hwperf_obj_to_cnode(objs + i);
576 for_each_online_cpu(j) { 749 for_each_online_cpu(j) {
577 if (node != cpu_to_node(j)) 750 if (node != cpu_to_node(j))
@@ -598,7 +771,7 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
598 771
599 case SN_HWPERF_GET_NODE_NASID: 772 case SN_HWPERF_GET_NODE_NASID:
600 if (a.sz != sizeof(u64) || 773 if (a.sz != sizeof(u64) ||
601 (node = a.arg) < 0 || node >= numionodes) { 774 (node = a.arg) < 0 || !node_possible(node)) {
602 r = -EINVAL; 775 r = -EINVAL;
603 goto error; 776 goto error;
604 } 777 }
@@ -627,6 +800,14 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
627 vfree(objs); 800 vfree(objs);
628 goto error; 801 goto error;
629 } 802 }
803
804 if (!SN_HWPERF_IS_NODE(objs + i) &&
805 !SN_HWPERF_IS_IONODE(objs + i)) {
806 r = -ENOENT;
807 vfree(objs);
808 goto error;
809 }
810
630 *(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i); 811 *(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i);
631 vfree(objs); 812 vfree(objs);
632 } 813 }
@@ -692,6 +873,7 @@ static int sn_hwperf_init(void)
692 873
693 /* single threaded, once-only initialization */ 874 /* single threaded, once-only initialization */
694 down(&sn_hwperf_init_mutex); 875 down(&sn_hwperf_init_mutex);
876
695 if (sn_hwperf_salheap) { 877 if (sn_hwperf_salheap) {
696 up(&sn_hwperf_init_mutex); 878 up(&sn_hwperf_init_mutex);
697 return e; 879 return e;
@@ -742,19 +924,6 @@ out:
742 sn_hwperf_salheap = NULL; 924 sn_hwperf_salheap = NULL;
743 sn_hwperf_obj_cnt = 0; 925 sn_hwperf_obj_cnt = 0;
744 } 926 }
745
746 if (!e) {
747 /*
748 * Register a dynamic misc device for ioctl. Platforms
749 * supporting hotplug will create /dev/sn_hwperf, else
750 * user can to look up the minor number in /proc/misc.
751 */
752 if ((e = misc_register(&sn_hwperf_dev)) != 0) {
753 printk(KERN_ERR "sn_hwperf_init: misc register "
754 "for \"sn_hwperf\" failed, err %d\n", e);
755 }
756 }
757
758 up(&sn_hwperf_init_mutex); 927 up(&sn_hwperf_init_mutex);
759 return e; 928 return e;
760} 929}
@@ -782,3 +951,41 @@ int sn_topology_release(struct inode *inode, struct file *file)
782 vfree(seq->private); 951 vfree(seq->private);
783 return seq_release(inode, file); 952 return seq_release(inode, file);
784} 953}
954
955int sn_hwperf_get_nearest_node(cnodeid_t node,
956 cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node)
957{
958 int e;
959 int nobj;
960 struct sn_hwperf_object_info *objbuf;
961
962 if ((e = sn_hwperf_enum_objects(&nobj, &objbuf)) == 0) {
963 e = sn_hwperf_get_nearest_node_objdata(objbuf, nobj,
964 node, near_mem_node, near_cpu_node);
965 vfree(objbuf);
966 }
967
968 return e;
969}
970
971static int __devinit sn_hwperf_misc_register_init(void)
972{
973 int e;
974
975 sn_hwperf_init();
976
977 /*
978 * Register a dynamic misc device for hwperf ioctls. Platforms
979 * supporting hotplug will create /dev/sn_hwperf, else user
980 * can to look up the minor number in /proc/misc.
981 */
982 if ((e = misc_register(&sn_hwperf_dev)) != 0) {
983 printk(KERN_ERR "sn_hwperf_misc_register_init: failed to "
984 "register misc device for \"%s\"\n", sn_hwperf_dev.name);
985 }
986
987 return e;
988}
989
990device_initcall(sn_hwperf_misc_register_init); /* after misc_init() */
991EXPORT_SYMBOL(sn_hwperf_get_nearest_node);
diff --git a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
index 6a80fca807b9..51bf82720d99 100644
--- a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
+++ b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#include <linux/config.h> 8#include <linux/config.h>
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
@@ -15,7 +15,7 @@
15 15
16static int partition_id_show(struct seq_file *s, void *p) 16static int partition_id_show(struct seq_file *s, void *p)
17{ 17{
18 seq_printf(s, "%d\n", sn_local_partid()); 18 seq_printf(s, "%d\n", sn_partition_id);
19 return 0; 19 return 0;
20} 20}
21 21
diff --git a/arch/ia64/sn/kernel/sn2/timer_interrupt.c b/arch/ia64/sn/kernel/sn2/timer_interrupt.c
index cde7375390b0..adf5db2e2afe 100644
--- a/arch/ia64/sn/kernel/sn2/timer_interrupt.c
+++ b/arch/ia64/sn/kernel/sn2/timer_interrupt.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * 2 *
3 * 3 *
4 * Copyright (c) 2003 Silicon Graphics, Inc. All Rights Reserved. 4 * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License 7 * under the terms of version 2 of the GNU General Public License
@@ -50,14 +50,16 @@ void sn_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
50 LED_CPU_HEARTBEAT, LED_CPU_HEARTBEAT); 50 LED_CPU_HEARTBEAT, LED_CPU_HEARTBEAT);
51 } 51 }
52 52
53 if (enable_shub_wars_1_1()) { 53 if (is_shub1()) {
54 /* Bugfix code for SHUB 1.1 */ 54 if (enable_shub_wars_1_1()) {
55 if (pda->pio_shub_war_cam_addr) 55 /* Bugfix code for SHUB 1.1 */
56 *pda->pio_shub_war_cam_addr = 0x8000000000000010UL; 56 if (pda->pio_shub_war_cam_addr)
57 *pda->pio_shub_war_cam_addr = 0x8000000000000010UL;
58 }
59 if (pda->sn_lb_int_war_ticks == 0)
60 sn_lb_int_war_check();
61 pda->sn_lb_int_war_ticks++;
62 if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL)
63 pda->sn_lb_int_war_ticks = 0;
57 } 64 }
58 if (pda->sn_lb_int_war_ticks == 0)
59 sn_lb_int_war_check();
60 pda->sn_lb_int_war_ticks++;
61 if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL)
62 pda->sn_lb_int_war_ticks = 0;
63} 65}
diff --git a/arch/ia64/sn/pci/Makefile b/arch/ia64/sn/pci/Makefile
index 2f915bce25f9..321576b1b425 100644
--- a/arch/ia64/sn/pci/Makefile
+++ b/arch/ia64/sn/pci/Makefile
@@ -7,4 +7,4 @@
7# 7#
8# Makefile for the sn pci general routines. 8# Makefile for the sn pci general routines.
9 9
10obj-y := pci_dma.o tioca_provider.o pcibr/ 10obj-y := pci_dma.o tioca_provider.o tioce_provider.o pcibr/
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index b058dc2a0b9d..34093476e965 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/types.h> 9#include <linux/types.h>
@@ -215,8 +215,8 @@ void sn_dma_flush(uint64_t addr)
215 int is_tio; 215 int is_tio;
216 int wid_num; 216 int wid_num;
217 int i, j; 217 int i, j;
218 int bwin;
219 uint64_t flags; 218 uint64_t flags;
219 uint64_t itte;
220 struct hubdev_info *hubinfo; 220 struct hubdev_info *hubinfo;
221 volatile struct sn_flush_device_list *p; 221 volatile struct sn_flush_device_list *p;
222 struct sn_flush_nasid_entry *flush_nasid_list; 222 struct sn_flush_nasid_entry *flush_nasid_list;
@@ -233,31 +233,36 @@ void sn_dma_flush(uint64_t addr)
233 if (!hubinfo) { 233 if (!hubinfo) {
234 BUG(); 234 BUG();
235 } 235 }
236 is_tio = (nasid & 1);
237 if (is_tio) {
238 wid_num = TIO_SWIN_WIDGETNUM(addr);
239 bwin = TIO_BWIN_WINDOWNUM(addr);
240 } else {
241 wid_num = SWIN_WIDGETNUM(addr);
242 bwin = BWIN_WINDOWNUM(addr);
243 }
244 236
245 flush_nasid_list = &hubinfo->hdi_flush_nasid_list; 237 flush_nasid_list = &hubinfo->hdi_flush_nasid_list;
246 if (flush_nasid_list->widget_p == NULL) 238 if (flush_nasid_list->widget_p == NULL)
247 return; 239 return;
248 if (bwin > 0) {
249 uint64_t itte = flush_nasid_list->iio_itte[bwin];
250 240
251 if (is_tio) { 241 is_tio = (nasid & 1);
252 wid_num = (itte >> TIO_ITTE_WIDGET_SHIFT) & 242 if (is_tio) {
253 TIO_ITTE_WIDGET_MASK; 243 int itte_index;
254 } else { 244
255 wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) & 245 if (TIO_HWIN(addr))
256 IIO_ITTE_WIDGET_MASK; 246 itte_index = 0;
257 } 247 else if (TIO_BWIN_WINDOWNUM(addr))
248 itte_index = TIO_BWIN_WINDOWNUM(addr);
249 else
250 itte_index = -1;
251
252 if (itte_index >= 0) {
253 itte = flush_nasid_list->iio_itte[itte_index];
254 if (! TIO_ITTE_VALID(itte))
255 return;
256 wid_num = TIO_ITTE_WIDGET(itte);
257 } else
258 wid_num = TIO_SWIN_WIDGETNUM(addr);
259 } else {
260 if (BWIN_WINDOWNUM(addr)) {
261 itte = flush_nasid_list->iio_itte[BWIN_WINDOWNUM(addr)];
262 wid_num = IIO_ITTE_WIDGET(itte);
263 } else
264 wid_num = SWIN_WIDGETNUM(addr);
258 } 265 }
259 if (flush_nasid_list->widget_p == NULL)
260 return;
261 if (flush_nasid_list->widget_p[wid_num] == NULL) 266 if (flush_nasid_list->widget_p[wid_num] == NULL)
262 return; 267 return;
263 p = &flush_nasid_list->widget_p[wid_num][0]; 268 p = &flush_nasid_list->widget_p[wid_num][0];
@@ -283,10 +288,16 @@ void sn_dma_flush(uint64_t addr)
283 /* 288 /*
284 * For TIOCP use the Device(x) Write Request Buffer Flush Bridge 289 * For TIOCP use the Device(x) Write Request Buffer Flush Bridge
285 * register since it ensures the data has entered the coherence 290 * register since it ensures the data has entered the coherence
286 * domain, unlike PIC 291 * domain, unlike PIC.
287 */ 292 */
288 if (is_tio) { 293 if (is_tio) {
289 uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID); 294 /*
295 * Note: devices behind TIOCE should never be matched in the
296 * above code, and so the following code is PIC/CP centric.
297 * If CE ever needs the sn_dma_flush mechanism, we will have
298 * to account for that here and in tioce_bus_fixup().
299 */
300 uint32_t tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID));
290 uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id); 301 uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id);
291 302
292 /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */ 303 /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */
@@ -306,7 +317,8 @@ void sn_dma_flush(uint64_t addr)
306 *(volatile uint32_t *)(p->sfdl_force_int_addr) = 1; 317 *(volatile uint32_t *)(p->sfdl_force_int_addr) = 1;
307 318
308 /* wait for the interrupt to come back. */ 319 /* wait for the interrupt to come back. */
309 while (*(p->sfdl_flush_addr) != 0x10f) ; 320 while (*(p->sfdl_flush_addr) != 0x10f)
321 cpu_relax();
310 322
311 /* okay, everything is synched up. */ 323 /* okay, everything is synched up. */
312 spin_unlock_irqrestore((spinlock_t *)&p->sfdl_flush_lock, flags); 324 spin_unlock_irqrestore((spinlock_t *)&p->sfdl_flush_lock, flags);
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index b95e928636a1..7b03b8084ffc 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -15,6 +15,7 @@
15#include <asm/sn/pcibus_provider_defs.h> 15#include <asm/sn/pcibus_provider_defs.h>
16#include <asm/sn/pcidev.h> 16#include <asm/sn/pcidev.h>
17#include <asm/sn/sn_sal.h> 17#include <asm/sn/sn_sal.h>
18#include <asm/sn/sn2/sn_hwperf.h>
18#include "xtalk/xwidgetdev.h" 19#include "xtalk/xwidgetdev.h"
19#include "xtalk/hubdev.h" 20#include "xtalk/hubdev.h"
20 21
@@ -60,7 +61,7 @@ static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
60 ret_stuff.status = 0; 61 ret_stuff.status = 0;
61 ret_stuff.v0 = 0; 62 ret_stuff.v0 = 0;
62 63
63 segment = 0; 64 segment = soft->pbi_buscommon.bs_persist_segment;
64 busnum = soft->pbi_buscommon.bs_persist_busnum; 65 busnum = soft->pbi_buscommon.bs_persist_busnum;
65 SAL_CALL_NOLOCK(ret_stuff, 66 SAL_CALL_NOLOCK(ret_stuff,
66 (u64) SN_SAL_IOIF_ERROR_INTERRUPT, 67 (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
@@ -88,6 +89,7 @@ void *
88pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) 89pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
89{ 90{
90 int nasid, cnode, j; 91 int nasid, cnode, j;
92 cnodeid_t near_cnode;
91 struct hubdev_info *hubdev_info; 93 struct hubdev_info *hubdev_info;
92 struct pcibus_info *soft; 94 struct pcibus_info *soft;
93 struct sn_flush_device_list *sn_flush_device_list; 95 struct sn_flush_device_list *sn_flush_device_list;
@@ -115,7 +117,7 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
115 /* 117 /*
116 * register the bridge's error interrupt handler 118 * register the bridge's error interrupt handler
117 */ 119 */
118 if (request_irq(SGI_PCIBR_ERROR, (void *)pcibr_error_intr_handler, 120 if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
119 SA_SHIRQ, "PCIBR error", (void *)(soft))) { 121 SA_SHIRQ, "PCIBR error", (void *)(soft))) {
120 printk(KERN_WARNING 122 printk(KERN_WARNING
121 "pcibr cannot allocate interrupt for error handler\n"); 123 "pcibr cannot allocate interrupt for error handler\n");
@@ -142,9 +144,12 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
142 j++, sn_flush_device_list++) { 144 j++, sn_flush_device_list++) {
143 if (sn_flush_device_list->sfdl_slot == -1) 145 if (sn_flush_device_list->sfdl_slot == -1)
144 continue; 146 continue;
145 if (sn_flush_device_list-> 147 if ((sn_flush_device_list->
146 sfdl_persistent_busnum == 148 sfdl_persistent_segment ==
147 soft->pbi_buscommon.bs_persist_busnum) 149 soft->pbi_buscommon.bs_persist_segment) &&
150 (sn_flush_device_list->
151 sfdl_persistent_busnum ==
152 soft->pbi_buscommon.bs_persist_busnum))
148 sn_flush_device_list->sfdl_pcibus_info = 153 sn_flush_device_list->sfdl_pcibus_info =
149 soft; 154 soft;
150 } 155 }
@@ -158,12 +163,18 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
158 memset(soft->pbi_int_ate_resource.ate, 0, 163 memset(soft->pbi_int_ate_resource.ate, 0,
159 (soft->pbi_int_ate_size * sizeof(uint64_t))); 164 (soft->pbi_int_ate_size * sizeof(uint64_t)));
160 165
161 if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) 166 if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
162 /* 167 /* TIO PCI Bridge: find nearest node with CPUs */
163 * TIO PCI Bridge with no closest node information. 168 int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
164 * FIXME: Find another way to determine the closest node 169
165 */ 170 if (e < 0) {
166 controller->node = -1; 171 near_cnode = (cnodeid_t)-1; /* use any node */
172 printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
173 "near node with CPUs to TIO node %d, err=%d\n",
174 cnode, e);
175 }
176 controller->node = near_cnode;
177 }
167 else 178 else
168 controller->node = cnode; 179 controller->node = cnode;
169 return soft; 180 return soft;
@@ -175,6 +186,9 @@ void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
175 struct pcibus_info *pcibus_info; 186 struct pcibus_info *pcibus_info;
176 int bit = sn_irq_info->irq_int_bit; 187 int bit = sn_irq_info->irq_int_bit;
177 188
189 if (! sn_irq_info->irq_bridge)
190 return;
191
178 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo; 192 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
179 if (pcidev_info) { 193 if (pcidev_info) {
180 pcibus_info = 194 pcibus_info =
@@ -184,7 +198,7 @@ void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
184 } 198 }
185} 199}
186 200
187void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info) 201void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
188{ 202{
189 struct pcidev_info *pcidev_info; 203 struct pcidev_info *pcidev_info;
190 struct pcibus_info *pcibus_info; 204 struct pcibus_info *pcibus_info;
@@ -219,6 +233,8 @@ struct sn_pcibus_provider pcibr_provider = {
219 .dma_map_consistent = pcibr_dma_map_consistent, 233 .dma_map_consistent = pcibr_dma_map_consistent,
220 .dma_unmap = pcibr_dma_unmap, 234 .dma_unmap = pcibr_dma_unmap,
221 .bus_fixup = pcibr_bus_fixup, 235 .bus_fixup = pcibr_bus_fixup,
236 .force_interrupt = pcibr_force_interrupt,
237 .target_interrupt = pcibr_target_interrupt
222}; 238};
223 239
224int 240int
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 5d76a7581465..ea09c12f0258 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -559,7 +559,7 @@ tioca_error_intr_handler(int irq, void *arg, struct pt_regs *pt)
559 ret_stuff.status = 0; 559 ret_stuff.status = 0;
560 ret_stuff.v0 = 0; 560 ret_stuff.v0 = 0;
561 561
562 segment = 0; 562 segment = soft->ca_common.bs_persist_segment;
563 busnum = soft->ca_common.bs_persist_busnum; 563 busnum = soft->ca_common.bs_persist_busnum;
564 564
565 SAL_CALL_NOLOCK(ret_stuff, 565 SAL_CALL_NOLOCK(ret_stuff,
@@ -622,7 +622,8 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
622 nasid_to_cnodeid(tioca_common->ca_closest_nasid); 622 nasid_to_cnodeid(tioca_common->ca_closest_nasid);
623 tioca_common->ca_kernel_private = (uint64_t) tioca_kern; 623 tioca_common->ca_kernel_private = (uint64_t) tioca_kern;
624 624
625 bus = pci_find_bus(0, tioca_common->ca_common.bs_persist_busnum); 625 bus = pci_find_bus(tioca_common->ca_common.bs_persist_segment,
626 tioca_common->ca_common.bs_persist_busnum);
626 BUG_ON(!bus); 627 BUG_ON(!bus);
627 tioca_kern->ca_devices = &bus->devices; 628 tioca_kern->ca_devices = &bus->devices;
628 629
@@ -656,6 +657,8 @@ static struct sn_pcibus_provider tioca_pci_interfaces = {
656 .dma_map_consistent = tioca_dma_map, 657 .dma_map_consistent = tioca_dma_map,
657 .dma_unmap = tioca_dma_unmap, 658 .dma_unmap = tioca_dma_unmap,
658 .bus_fixup = tioca_bus_fixup, 659 .bus_fixup = tioca_bus_fixup,
660 .force_interrupt = NULL,
661 .target_interrupt = NULL
659}; 662};
660 663
661/** 664/**
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
new file mode 100644
index 000000000000..8e75db2b825d
--- /dev/null
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -0,0 +1,771 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003-2005 Silicon Graphics, Inc. All Rights Reserved.
7 */
8
9#include <linux/types.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h>
12#include <asm/sn/sn_sal.h>
13#include <asm/sn/addrs.h>
14#include <asm/sn/pcidev.h>
15#include <asm/sn/pcibus_provider_defs.h>
16#include <asm/sn/tioce_provider.h>
17
18/**
19 * Bus address ranges for the 5 flavors of TIOCE DMA
20 */
21
22#define TIOCE_D64_MIN 0x8000000000000000UL
23#define TIOCE_D64_MAX 0xffffffffffffffffUL
24#define TIOCE_D64_ADDR(a) ((a) >= TIOCE_D64_MIN)
25
26#define TIOCE_D32_MIN 0x0000000080000000UL
27#define TIOCE_D32_MAX 0x00000000ffffffffUL
28#define TIOCE_D32_ADDR(a) ((a) >= TIOCE_D32_MIN && (a) <= TIOCE_D32_MAX)
29
30#define TIOCE_M32_MIN 0x0000000000000000UL
31#define TIOCE_M32_MAX 0x000000007fffffffUL
32#define TIOCE_M32_ADDR(a) ((a) >= TIOCE_M32_MIN && (a) <= TIOCE_M32_MAX)
33
34#define TIOCE_M40_MIN 0x0000004000000000UL
35#define TIOCE_M40_MAX 0x0000007fffffffffUL
36#define TIOCE_M40_ADDR(a) ((a) >= TIOCE_M40_MIN && (a) <= TIOCE_M40_MAX)
37
38#define TIOCE_M40S_MIN 0x0000008000000000UL
39#define TIOCE_M40S_MAX 0x000000ffffffffffUL
40#define TIOCE_M40S_ADDR(a) ((a) >= TIOCE_M40S_MIN && (a) <= TIOCE_M40S_MAX)
41
42/*
43 * ATE manipulation macros.
44 */
45
46#define ATE_PAGESHIFT(ps) (__ffs(ps))
47#define ATE_PAGEMASK(ps) ((ps)-1)
48
49#define ATE_PAGE(x, ps) ((x) >> ATE_PAGESHIFT(ps))
50#define ATE_NPAGES(start, len, pagesize) \
51 (ATE_PAGE((start)+(len)-1, pagesize) - ATE_PAGE(start, pagesize) + 1)
52
53#define ATE_VALID(ate) ((ate) & (1UL << 63))
54#define ATE_MAKE(addr, ps) (((addr) & ~ATE_PAGEMASK(ps)) | (1UL << 63))
55
56/*
57 * Flavors of ate-based mapping supported by tioce_alloc_map()
58 */
59
60#define TIOCE_ATE_M32 1
61#define TIOCE_ATE_M40 2
62#define TIOCE_ATE_M40S 3
63
64#define KB(x) ((x) << 10)
65#define MB(x) ((x) << 20)
66#define GB(x) ((x) << 30)
67
68/**
69 * tioce_dma_d64 - create a DMA mapping using 64-bit direct mode
70 * @ct_addr: system coretalk address
71 *
72 * Map @ct_addr into 64-bit CE bus space. No device context is necessary
73 * and no CE mapping are consumed.
74 *
75 * Bits 53:0 come from the coretalk address. The remaining bits are set as
76 * follows:
77 *
78 * 63 - must be 1 to indicate d64 mode to CE hardware
79 * 62 - barrier bit ... controlled with tioce_dma_barrier()
80 * 61 - 0 since this is not an MSI transaction
81 * 60:54 - reserved, MBZ
82 */
83static uint64_t
84tioce_dma_d64(unsigned long ct_addr)
85{
86 uint64_t bus_addr;
87
88 bus_addr = ct_addr | (1UL << 63);
89
90 return bus_addr;
91}
92
93/**
94 * pcidev_to_tioce - return misc ce related pointers given a pci_dev
95 * @pci_dev: pci device context
96 * @base: ptr to store struct tioce_mmr * for the CE holding this device
97 * @kernel: ptr to store struct tioce_kernel * for the CE holding this device
98 * @port: ptr to store the CE port number that this device is on
99 *
100 * Return pointers to various CE-related structures for the CE upstream of
101 * @pci_dev.
102 */
103static inline void
104pcidev_to_tioce(struct pci_dev *pdev, struct tioce **base,
105 struct tioce_kernel **kernel, int *port)
106{
107 struct pcidev_info *pcidev_info;
108 struct tioce_common *ce_common;
109 struct tioce_kernel *ce_kernel;
110
111 pcidev_info = SN_PCIDEV_INFO(pdev);
112 ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info;
113 ce_kernel = (struct tioce_kernel *)ce_common->ce_kernel_private;
114
115 if (base)
116 *base = (struct tioce *)ce_common->ce_pcibus.bs_base;
117 if (kernel)
118 *kernel = ce_kernel;
119
120 /*
121 * we use port as a zero-based value internally, even though the
122 * documentation is 1-based.
123 */
124 if (port)
125 *port =
126 (pdev->bus->number < ce_kernel->ce_port1_secondary) ? 0 : 1;
127}
128
129/**
130 * tioce_alloc_map - Given a coretalk address, map it to pcie bus address
131 * space using one of the various ATE-based address modes.
132 * @ce_kern: tioce context
133 * @type: map mode to use
134 * @port: 0-based port that the requesting device is downstream of
135 * @ct_addr: the coretalk address to map
136 * @len: number of bytes to map
137 *
138 * Given the addressing type, set up various paramaters that define the
139 * ATE pool to use. Search for a contiguous block of entries to cover the
140 * length, and if enough resources exist, fill in the ATE's and construct a
141 * tioce_dmamap struct to track the mapping.
142 */
143static uint64_t
144tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port,
145 uint64_t ct_addr, int len)
146{
147 int i;
148 int j;
149 int first;
150 int last;
151 int entries;
152 int nates;
153 int pagesize;
154 uint64_t *ate_shadow;
155 uint64_t *ate_reg;
156 uint64_t addr;
157 struct tioce *ce_mmr;
158 uint64_t bus_base;
159 struct tioce_dmamap *map;
160
161 ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base;
162
163 switch (type) {
164 case TIOCE_ATE_M32:
165 /*
166 * The first 64 entries of the ate3240 pool are dedicated to
167 * super-page (TIOCE_ATE_M40S) mode.
168 */
169 first = 64;
170 entries = TIOCE_NUM_M3240_ATES - 64;
171 ate_shadow = ce_kern->ce_ate3240_shadow;
172 ate_reg = ce_mmr->ce_ure_ate3240;
173 pagesize = ce_kern->ce_ate3240_pagesize;
174 bus_base = TIOCE_M32_MIN;
175 break;
176 case TIOCE_ATE_M40:
177 first = 0;
178 entries = TIOCE_NUM_M40_ATES;
179 ate_shadow = ce_kern->ce_ate40_shadow;
180 ate_reg = ce_mmr->ce_ure_ate40;
181 pagesize = MB(64);
182 bus_base = TIOCE_M40_MIN;
183 break;
184 case TIOCE_ATE_M40S:
185 /*
186 * ate3240 entries 0-31 are dedicated to port1 super-page
187 * mappings. ate3240 entries 32-63 are dedicated to port2.
188 */
189 first = port * 32;
190 entries = 32;
191 ate_shadow = ce_kern->ce_ate3240_shadow;
192 ate_reg = ce_mmr->ce_ure_ate3240;
193 pagesize = GB(16);
194 bus_base = TIOCE_M40S_MIN;
195 break;
196 default:
197 return 0;
198 }
199
200 nates = ATE_NPAGES(ct_addr, len, pagesize);
201 if (nates > entries)
202 return 0;
203
204 last = first + entries - nates;
205 for (i = first; i <= last; i++) {
206 if (ATE_VALID(ate_shadow[i]))
207 continue;
208
209 for (j = i; j < i + nates; j++)
210 if (ATE_VALID(ate_shadow[j]))
211 break;
212
213 if (j >= i + nates)
214 break;
215 }
216
217 if (i > last)
218 return 0;
219
220 map = kcalloc(1, sizeof(struct tioce_dmamap), GFP_ATOMIC);
221 if (!map)
222 return 0;
223
224 addr = ct_addr;
225 for (j = 0; j < nates; j++) {
226 uint64_t ate;
227
228 ate = ATE_MAKE(addr, pagesize);
229 ate_shadow[i + j] = ate;
230 ate_reg[i + j] = ate;
231 addr += pagesize;
232 }
233
234 map->refcnt = 1;
235 map->nbytes = nates * pagesize;
236 map->ct_start = ct_addr & ~ATE_PAGEMASK(pagesize);
237 map->pci_start = bus_base + (i * pagesize);
238 map->ate_hw = &ate_reg[i];
239 map->ate_shadow = &ate_shadow[i];
240 map->ate_count = nates;
241
242 list_add(&map->ce_dmamap_list, &ce_kern->ce_dmamap_list);
243
244 return (map->pci_start + (ct_addr - map->ct_start));
245}
246
247/**
248 * tioce_dma_d32 - create a DMA mapping using 32-bit direct mode
249 * @pdev: linux pci_dev representing the function
250 * @paddr: system physical address
251 *
252 * Map @paddr into 32-bit bus space of the CE associated with @pcidev_info.
253 */
254static uint64_t
255tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr)
256{
257 int dma_ok;
258 int port;
259 struct tioce *ce_mmr;
260 struct tioce_kernel *ce_kern;
261 uint64_t ct_upper;
262 uint64_t ct_lower;
263 dma_addr_t bus_addr;
264
265 ct_upper = ct_addr & ~0x3fffffffUL;
266 ct_lower = ct_addr & 0x3fffffffUL;
267
268 pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port);
269
270 if (ce_kern->ce_port[port].dirmap_refcnt == 0) {
271 volatile uint64_t tmp;
272
273 ce_kern->ce_port[port].dirmap_shadow = ct_upper;
274 ce_mmr->ce_ure_dir_map[port] = ct_upper;
275 tmp = ce_mmr->ce_ure_dir_map[port];
276 dma_ok = 1;
277 } else
278 dma_ok = (ce_kern->ce_port[port].dirmap_shadow == ct_upper);
279
280 if (dma_ok) {
281 ce_kern->ce_port[port].dirmap_refcnt++;
282 bus_addr = TIOCE_D32_MIN + ct_lower;
283 } else
284 bus_addr = 0;
285
286 return bus_addr;
287}
288
289/**
290 * tioce_dma_barrier - swizzle a TIOCE bus address to include or exclude
291 * the barrier bit.
292 * @bus_addr: bus address to swizzle
293 *
294 * Given a TIOCE bus address, set the appropriate bit to indicate barrier
295 * attributes.
296 */
297static uint64_t
298tioce_dma_barrier(uint64_t bus_addr, int on)
299{
300 uint64_t barrier_bit;
301
302 /* barrier not supported in M40/M40S mode */
303 if (TIOCE_M40_ADDR(bus_addr) || TIOCE_M40S_ADDR(bus_addr))
304 return bus_addr;
305
306 if (TIOCE_D64_ADDR(bus_addr))
307 barrier_bit = (1UL << 62);
308 else /* must be m32 or d32 */
309 barrier_bit = (1UL << 30);
310
311 return (on) ? (bus_addr | barrier_bit) : (bus_addr & ~barrier_bit);
312}
313
314/**
315 * tioce_dma_unmap - release CE mapping resources
316 * @pdev: linux pci_dev representing the function
317 * @bus_addr: bus address returned by an earlier tioce_dma_map
318 * @dir: mapping direction (unused)
319 *
320 * Locate mapping resources associated with @bus_addr and release them.
321 * For mappings created using the direct modes there are no resources
322 * to release.
323 */
324void
325tioce_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir)
326{
327 int i;
328 int port;
329 struct tioce_kernel *ce_kern;
330 struct tioce *ce_mmr;
331 unsigned long flags;
332
333 bus_addr = tioce_dma_barrier(bus_addr, 0);
334 pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port);
335
336 /* nothing to do for D64 */
337
338 if (TIOCE_D64_ADDR(bus_addr))
339 return;
340
341 spin_lock_irqsave(&ce_kern->ce_lock, flags);
342
343 if (TIOCE_D32_ADDR(bus_addr)) {
344 if (--ce_kern->ce_port[port].dirmap_refcnt == 0) {
345 ce_kern->ce_port[port].dirmap_shadow = 0;
346 ce_mmr->ce_ure_dir_map[port] = 0;
347 }
348 } else {
349 struct tioce_dmamap *map;
350
351 list_for_each_entry(map, &ce_kern->ce_dmamap_list,
352 ce_dmamap_list) {
353 uint64_t last;
354
355 last = map->pci_start + map->nbytes - 1;
356 if (bus_addr >= map->pci_start && bus_addr <= last)
357 break;
358 }
359
360 if (&map->ce_dmamap_list == &ce_kern->ce_dmamap_list) {
361 printk(KERN_WARNING
362 "%s: %s - no map found for bus_addr 0x%lx\n",
363 __FUNCTION__, pci_name(pdev), bus_addr);
364 } else if (--map->refcnt == 0) {
365 for (i = 0; i < map->ate_count; i++) {
366 map->ate_shadow[i] = 0;
367 map->ate_hw[i] = 0;
368 }
369
370 list_del(&map->ce_dmamap_list);
371 kfree(map);
372 }
373 }
374
375 spin_unlock_irqrestore(&ce_kern->ce_lock, flags);
376}
377
378/**
379 * tioce_do_dma_map - map pages for PCI DMA
380 * @pdev: linux pci_dev representing the function
381 * @paddr: host physical address to map
382 * @byte_count: bytes to map
383 *
384 * This is the main wrapper for mapping host physical pages to CE PCI space.
385 * The mapping mode used is based on the device's dma_mask.
386 */
387static uint64_t
388tioce_do_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count,
389 int barrier)
390{
391 unsigned long flags;
392 uint64_t ct_addr;
393 uint64_t mapaddr = 0;
394 struct tioce_kernel *ce_kern;
395 struct tioce_dmamap *map;
396 int port;
397 uint64_t dma_mask;
398
399 dma_mask = (barrier) ? pdev->dev.coherent_dma_mask : pdev->dma_mask;
400
401 /* cards must be able to address at least 31 bits */
402 if (dma_mask < 0x7fffffffUL)
403 return 0;
404
405 ct_addr = PHYS_TO_TIODMA(paddr);
406
407 /*
408 * If the device can generate 64 bit addresses, create a D64 map.
409 * Since this should never fail, bypass the rest of the checks.
410 */
411 if (dma_mask == ~0UL) {
412 mapaddr = tioce_dma_d64(ct_addr);
413 goto dma_map_done;
414 }
415
416 pcidev_to_tioce(pdev, NULL, &ce_kern, &port);
417
418 spin_lock_irqsave(&ce_kern->ce_lock, flags);
419
420 /*
421 * D64 didn't work ... See if we have an existing map that covers
422 * this address range. Must account for devices dma_mask here since
423 * an existing map might have been done in a mode using more pci
424 * address bits than this device can support.
425 */
426 list_for_each_entry(map, &ce_kern->ce_dmamap_list, ce_dmamap_list) {
427 uint64_t last;
428
429 last = map->ct_start + map->nbytes - 1;
430 if (ct_addr >= map->ct_start &&
431 ct_addr + byte_count - 1 <= last &&
432 map->pci_start <= dma_mask) {
433 map->refcnt++;
434 mapaddr = map->pci_start + (ct_addr - map->ct_start);
435 break;
436 }
437 }
438
439 /*
440 * If we don't have a map yet, and the card can generate 40
441 * bit addresses, try the M40/M40S modes. Note these modes do not
442 * support a barrier bit, so if we need a consistent map these
443 * won't work.
444 */
445 if (!mapaddr && !barrier && dma_mask >= 0xffffffffffUL) {
446 /*
447 * We have two options for 40-bit mappings: 16GB "super" ATE's
448 * and 64MB "regular" ATE's. We'll try both if needed for a
449 * given mapping but which one we try first depends on the
450 * size. For requests >64MB, prefer to use a super page with
451 * regular as the fallback. Otherwise, try in the reverse order.
452 */
453
454 if (byte_count > MB(64)) {
455 mapaddr = tioce_alloc_map(ce_kern, TIOCE_ATE_M40S,
456 port, ct_addr, byte_count);
457 if (!mapaddr)
458 mapaddr =
459 tioce_alloc_map(ce_kern, TIOCE_ATE_M40, -1,
460 ct_addr, byte_count);
461 } else {
462 mapaddr = tioce_alloc_map(ce_kern, TIOCE_ATE_M40, -1,
463 ct_addr, byte_count);
464 if (!mapaddr)
465 mapaddr =
466 tioce_alloc_map(ce_kern, TIOCE_ATE_M40S,
467 port, ct_addr, byte_count);
468 }
469 }
470
471 /*
472 * 32-bit direct is the next mode to try
473 */
474 if (!mapaddr && dma_mask >= 0xffffffffUL)
475 mapaddr = tioce_dma_d32(pdev, ct_addr);
476
477 /*
478 * Last resort, try 32-bit ATE-based map.
479 */
480 if (!mapaddr)
481 mapaddr =
482 tioce_alloc_map(ce_kern, TIOCE_ATE_M32, -1, ct_addr,
483 byte_count);
484
485 spin_unlock_irqrestore(&ce_kern->ce_lock, flags);
486
487dma_map_done:
488 if (mapaddr & barrier)
489 mapaddr = tioce_dma_barrier(mapaddr, 1);
490
491 return mapaddr;
492}
493
494/**
495 * tioce_dma - standard pci dma map interface
496 * @pdev: pci device requesting the map
497 * @paddr: system physical address to map into pci space
498 * @byte_count: # bytes to map
499 *
500 * Simply call tioce_do_dma_map() to create a map with the barrier bit clear
501 * in the address.
502 */
503static uint64_t
504tioce_dma(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
505{
506 return tioce_do_dma_map(pdev, paddr, byte_count, 0);
507}
508
509/**
510 * tioce_dma_consistent - consistent pci dma map interface
511 * @pdev: pci device requesting the map
512 * @paddr: system physical address to map into pci space
513 * @byte_count: # bytes to map
514 *
515 * Simply call tioce_do_dma_map() to create a map with the barrier bit set
516 * in the address.
517 */ static uint64_t
518tioce_dma_consistent(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
519{
520 return tioce_do_dma_map(pdev, paddr, byte_count, 1);
521}
522
523/**
524 * tioce_error_intr_handler - SGI TIO CE error interrupt handler
525 * @irq: unused
526 * @arg: pointer to tioce_common struct for the given CE
527 * @pt: unused
528 *
529 * Handle a CE error interrupt. Simply a wrapper around a SAL call which
530 * defers processing to the SGI prom.
531 */ static irqreturn_t
532tioce_error_intr_handler(int irq, void *arg, struct pt_regs *pt)
533{
534 struct tioce_common *soft = arg;
535 struct ia64_sal_retval ret_stuff;
536 ret_stuff.status = 0;
537 ret_stuff.v0 = 0;
538
539 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
540 soft->ce_pcibus.bs_persist_segment,
541 soft->ce_pcibus.bs_persist_busnum, 0, 0, 0, 0, 0);
542
543 return IRQ_HANDLED;
544}
545
546/**
547 * tioce_kern_init - init kernel structures related to a given TIOCE
548 * @tioce_common: ptr to a cached tioce_common struct that originated in prom
549 */ static struct tioce_kernel *
550tioce_kern_init(struct tioce_common *tioce_common)
551{
552 int i;
553 uint32_t tmp;
554 struct tioce *tioce_mmr;
555 struct tioce_kernel *tioce_kern;
556
557 tioce_kern = kcalloc(1, sizeof(struct tioce_kernel), GFP_KERNEL);
558 if (!tioce_kern) {
559 return NULL;
560 }
561
562 tioce_kern->ce_common = tioce_common;
563 spin_lock_init(&tioce_kern->ce_lock);
564 INIT_LIST_HEAD(&tioce_kern->ce_dmamap_list);
565 tioce_common->ce_kernel_private = (uint64_t) tioce_kern;
566
567 /*
568 * Determine the secondary bus number of the port2 logical PPB.
569 * This is used to decide whether a given pci device resides on
570 * port1 or port2. Note: We don't have enough plumbing set up
571 * here to use pci_read_config_xxx() so use the raw_pci_ops vector.
572 */
573
574 raw_pci_ops->read(tioce_common->ce_pcibus.bs_persist_segment,
575 tioce_common->ce_pcibus.bs_persist_busnum,
576 PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1, &tmp);
577 tioce_kern->ce_port1_secondary = (uint8_t) tmp;
578
579 /*
580 * Set PMU pagesize to the largest size available, and zero out
581 * the ate's.
582 */
583
584 tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base;
585 tioce_mmr->ce_ure_page_map &= ~CE_URE_PAGESIZE_MASK;
586 tioce_mmr->ce_ure_page_map |= CE_URE_256K_PAGESIZE;
587 tioce_kern->ce_ate3240_pagesize = KB(256);
588
589 for (i = 0; i < TIOCE_NUM_M40_ATES; i++) {
590 tioce_kern->ce_ate40_shadow[i] = 0;
591 tioce_mmr->ce_ure_ate40[i] = 0;
592 }
593
594 for (i = 0; i < TIOCE_NUM_M3240_ATES; i++) {
595 tioce_kern->ce_ate3240_shadow[i] = 0;
596 tioce_mmr->ce_ure_ate3240[i] = 0;
597 }
598
599 return tioce_kern;
600}
601
602/**
603 * tioce_force_interrupt - implement altix force_interrupt() backend for CE
604 * @sn_irq_info: sn asic irq that we need an interrupt generated for
605 *
606 * Given an sn_irq_info struct, set the proper bit in ce_adm_force_int to
607 * force a secondary interrupt to be generated. This is to work around an
608 * asic issue where there is a small window of opportunity for a legacy device
609 * interrupt to be lost.
610 */
611static void
612tioce_force_interrupt(struct sn_irq_info *sn_irq_info)
613{
614 struct pcidev_info *pcidev_info;
615 struct tioce_common *ce_common;
616 struct tioce *ce_mmr;
617 uint64_t force_int_val;
618
619 if (!sn_irq_info->irq_bridge)
620 return;
621
622 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_TIOCE)
623 return;
624
625 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
626 if (!pcidev_info)
627 return;
628
629 ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info;
630 ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base;
631
632 /*
633 * irq_int_bit is originally set up by prom, and holds the interrupt
634 * bit shift (not mask) as defined by the bit definitions in the
635 * ce_adm_int mmr. These shifts are not the same for the
636 * ce_adm_force_int register, so do an explicit mapping here to make
637 * things clearer.
638 */
639
640 switch (sn_irq_info->irq_int_bit) {
641 case CE_ADM_INT_PCIE_PORT1_DEV_A_SHFT:
642 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_A_SHFT;
643 break;
644 case CE_ADM_INT_PCIE_PORT1_DEV_B_SHFT:
645 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_B_SHFT;
646 break;
647 case CE_ADM_INT_PCIE_PORT1_DEV_C_SHFT:
648 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_C_SHFT;
649 break;
650 case CE_ADM_INT_PCIE_PORT1_DEV_D_SHFT:
651 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_D_SHFT;
652 break;
653 case CE_ADM_INT_PCIE_PORT2_DEV_A_SHFT:
654 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_A_SHFT;
655 break;
656 case CE_ADM_INT_PCIE_PORT2_DEV_B_SHFT:
657 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_B_SHFT;
658 break;
659 case CE_ADM_INT_PCIE_PORT2_DEV_C_SHFT:
660 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_C_SHFT;
661 break;
662 case CE_ADM_INT_PCIE_PORT2_DEV_D_SHFT:
663 force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_D_SHFT;
664 break;
665 default:
666 return;
667 }
668 ce_mmr->ce_adm_force_int = force_int_val;
669}
670
671/**
672 * tioce_target_interrupt - implement set_irq_affinity for tioce resident
673 * functions. Note: only applies to line interrupts, not MSI's.
674 *
675 * @sn_irq_info: SN IRQ context
676 *
677 * Given an sn_irq_info, set the associated CE device's interrupt destination
678 * register. Since the interrupt destination registers are on a per-ce-slot
679 * basis, this will retarget line interrupts for all functions downstream of
680 * the slot.
681 */
682static void
683tioce_target_interrupt(struct sn_irq_info *sn_irq_info)
684{
685 struct pcidev_info *pcidev_info;
686 struct tioce_common *ce_common;
687 struct tioce *ce_mmr;
688 int bit;
689
690 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
691 if (!pcidev_info)
692 return;
693
694 ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info;
695 ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base;
696
697 bit = sn_irq_info->irq_int_bit;
698
699 ce_mmr->ce_adm_int_mask |= (1UL << bit);
700 ce_mmr->ce_adm_int_dest[bit] =
701 ((uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT) |
702 sn_irq_info->irq_xtalkaddr;
703 ce_mmr->ce_adm_int_mask &= ~(1UL << bit);
704
705 tioce_force_interrupt(sn_irq_info);
706}
707
708/**
709 * tioce_bus_fixup - perform final PCI fixup for a TIO CE bus
710 * @prom_bussoft: Common prom/kernel struct representing the bus
711 *
712 * Replicates the tioce_common pointed to by @prom_bussoft in kernel
713 * space. Allocates and initializes a kernel-only area for a given CE,
714 * and sets up an irq for handling CE error interrupts.
715 *
716 * On successful setup, returns the kernel version of tioce_common back to
717 * the caller.
718 */
719static void *
720tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
721{
722 struct tioce_common *tioce_common;
723
724 /*
725 * Allocate kernel bus soft and copy from prom.
726 */
727
728 tioce_common = kcalloc(1, sizeof(struct tioce_common), GFP_KERNEL);
729 if (!tioce_common)
730 return NULL;
731
732 memcpy(tioce_common, prom_bussoft, sizeof(struct tioce_common));
733 tioce_common->ce_pcibus.bs_base |= __IA64_UNCACHED_OFFSET;
734
735 if (tioce_kern_init(tioce_common) == NULL) {
736 kfree(tioce_common);
737 return NULL;
738 }
739
740 if (request_irq(SGI_PCIASIC_ERROR,
741 tioce_error_intr_handler,
742 SA_SHIRQ, "TIOCE error", (void *)tioce_common))
743 printk(KERN_WARNING
744 "%s: Unable to get irq %d. "
745 "Error interrupts won't be routed for "
746 "TIOCE bus %04x:%02x\n",
747 __FUNCTION__, SGI_PCIASIC_ERROR,
748 tioce_common->ce_pcibus.bs_persist_segment,
749 tioce_common->ce_pcibus.bs_persist_busnum);
750
751 return tioce_common;
752}
753
754static struct sn_pcibus_provider tioce_pci_interfaces = {
755 .dma_map = tioce_dma,
756 .dma_map_consistent = tioce_dma_consistent,
757 .dma_unmap = tioce_dma_unmap,
758 .bus_fixup = tioce_bus_fixup,
759 .force_interrupt = tioce_force_interrupt,
760 .target_interrupt = tioce_target_interrupt
761};
762
763/**
764 * tioce_init_provider - init SN PCI provider ops for TIO CE
765 */
766int
767tioce_init_provider(void)
768{
769 sn_pci_provider[PCIIO_ASIC_TYPE_TIOCE] = &tioce_pci_interfaces;
770 return 0;
771}
diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c
index fe837e31afbf..73e2f5e168dd 100644
--- a/arch/m68k/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms.c
@@ -74,10 +74,6 @@ EXPORT_SYMBOL(vme_brdtype);
74EXPORT_SYMBOL(__ashldi3); 74EXPORT_SYMBOL(__ashldi3);
75EXPORT_SYMBOL(__ashrdi3); 75EXPORT_SYMBOL(__ashrdi3);
76EXPORT_SYMBOL(__lshrdi3); 76EXPORT_SYMBOL(__lshrdi3);
77EXPORT_SYMBOL(memcpy);
78EXPORT_SYMBOL(memset);
79EXPORT_SYMBOL(memcmp);
80EXPORT_SYMBOL(memscan);
81EXPORT_SYMBOL(__muldi3); 77EXPORT_SYMBOL(__muldi3);
82 78
83EXPORT_SYMBOL(__down_failed); 79EXPORT_SYMBOL(__down_failed);
diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c
index f4e1e5eb8e12..8ed1b01a6a87 100644
--- a/arch/m68k/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace.c
@@ -95,7 +95,7 @@ static inline int put_reg(struct task_struct *task, int regno,
95 if (regno == PT_USP) 95 if (regno == PT_USP)
96 addr = &task->thread.usp; 96 addr = &task->thread.usp;
97 else if (regno < sizeof(regoff)/sizeof(regoff[0])) 97 else if (regno < sizeof(regoff)/sizeof(regoff[0]))
98 addr = (unsigned long *) (task->thread.esp0 + regoff[regno]); 98 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
99 else 99 else
100 return -1; 100 return -1;
101 *addr = data; 101 *addr = data;
@@ -103,48 +103,56 @@ static inline int put_reg(struct task_struct *task, int regno,
103} 103}
104 104
105/* 105/*
106 * Called by kernel/ptrace.c when detaching..
107 *
108 * Make sure the single step bit is not set. 106 * Make sure the single step bit is not set.
109 */ 107 */
110void ptrace_disable(struct task_struct *child) 108static inline void singlestep_disable(struct task_struct *child)
111{ 109{
112 unsigned long tmp; 110 unsigned long tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
113 /* make sure the single step bit is not set. */
114 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
115 put_reg(child, PT_SR, tmp); 111 put_reg(child, PT_SR, tmp);
116 child->thread.work.delayed_trace = 0; 112 child->thread.work.delayed_trace = 0;
113}
114
115/*
116 * Called by kernel/ptrace.c when detaching..
117 */
118void ptrace_disable(struct task_struct *child)
119{
120 singlestep_disable(child);
117 child->thread.work.syscall_trace = 0; 121 child->thread.work.syscall_trace = 0;
118} 122}
119 123
120asmlinkage int sys_ptrace(long request, long pid, long addr, long data) 124asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
121{ 125{
122 struct task_struct *child; 126 struct task_struct *child;
123 int ret; 127 unsigned long tmp;
128 int i, ret = 0;
124 129
125 lock_kernel(); 130 lock_kernel();
126 ret = -EPERM;
127 if (request == PTRACE_TRACEME) { 131 if (request == PTRACE_TRACEME) {
128 /* are we already being traced? */ 132 /* are we already being traced? */
129 if (current->ptrace & PT_PTRACED) 133 if (current->ptrace & PT_PTRACED) {
134 ret = -EPERM;
130 goto out; 135 goto out;
136 }
131 /* set the ptrace bit in the process flags. */ 137 /* set the ptrace bit in the process flags. */
132 current->ptrace |= PT_PTRACED; 138 current->ptrace |= PT_PTRACED;
133 ret = 0;
134 goto out; 139 goto out;
135 } 140 }
136 ret = -ESRCH;
137 read_lock(&tasklist_lock); 141 read_lock(&tasklist_lock);
138 child = find_task_by_pid(pid); 142 child = find_task_by_pid(pid);
139 if (child) 143 if (child)
140 get_task_struct(child); 144 get_task_struct(child);
141 read_unlock(&tasklist_lock); 145 read_unlock(&tasklist_lock);
142 if (!child) 146 if (unlikely(!child)) {
147 ret = -ESRCH;
143 goto out; 148 goto out;
149 }
144 150
145 ret = -EPERM; 151 /* you may not mess with init */
146 if (pid == 1) /* you may not mess with init */ 152 if (unlikely(pid == 1)) {
153 ret = -EPERM;
147 goto out_tsk; 154 goto out_tsk;
155 }
148 156
149 if (request == PTRACE_ATTACH) { 157 if (request == PTRACE_ATTACH) {
150 ret = ptrace_attach(child); 158 ret = ptrace_attach(child);
@@ -152,227 +160,171 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
152 } 160 }
153 161
154 ret = ptrace_check_attach(child, request == PTRACE_KILL); 162 ret = ptrace_check_attach(child, request == PTRACE_KILL);
155 if (ret < 0) 163 if (ret)
156 goto out_tsk; 164 goto out_tsk;
157 165
158 switch (request) { 166 switch (request) {
159 /* when I and D space are separate, these will need to be fixed. */ 167 /* when I and D space are separate, these will need to be fixed. */
160 case PTRACE_PEEKTEXT: /* read word at location addr. */ 168 case PTRACE_PEEKTEXT: /* read word at location addr. */
161 case PTRACE_PEEKDATA: { 169 case PTRACE_PEEKDATA:
162 unsigned long tmp; 170 i = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
163 int copied; 171 if (i != sizeof(tmp))
164 172 goto out_eio;
165 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); 173 ret = put_user(tmp, (unsigned long *)data);
166 ret = -EIO; 174 break;
167 if (copied != sizeof(tmp))
168 break;
169 ret = put_user(tmp,(unsigned long *) data);
170 break;
171 }
172 175
173 /* read the word at location addr in the USER area. */ 176 /* read the word at location addr in the USER area. */
174 case PTRACE_PEEKUSR: { 177 case PTRACE_PEEKUSR:
175 unsigned long tmp; 178 if (addr & 3)
176 179 goto out_eio;
177 ret = -EIO; 180 addr >>= 2; /* temporary hack. */
178 if ((addr & 3) || addr < 0 || 181
179 addr > sizeof(struct user) - 3) 182 if (addr >= 0 && addr < 19) {
180 break; 183 tmp = get_reg(child, addr);
181 184 if (addr == PT_SR)
182 tmp = 0; /* Default return condition */ 185 tmp >>= 16;
183 addr = addr >> 2; /* temporary hack. */ 186 } else if (addr >= 21 && addr < 49) {
184 ret = -EIO; 187 tmp = child->thread.fp[addr - 21];
185 if (addr < 19) { 188 /* Convert internal fpu reg representation
186 tmp = get_reg(child, addr); 189 * into long double format
187 if (addr == PT_SR) 190 */
188 tmp >>= 16; 191 if (FPU_IS_EMU && (addr < 45) && !(addr % 3))
189 } else if (addr >= 21 && addr < 49) { 192 tmp = ((tmp & 0xffff0000) << 15) |
190 tmp = child->thread.fp[addr - 21]; 193 ((tmp & 0x0000ffff) << 16);
191#ifdef CONFIG_M68KFPU_EMU 194 } else
192 /* Convert internal fpu reg representation
193 * into long double format
194 */
195 if (FPU_IS_EMU && (addr < 45) && !(addr % 3))
196 tmp = ((tmp & 0xffff0000) << 15) |
197 ((tmp & 0x0000ffff) << 16);
198#endif
199 } else
200 break;
201 ret = put_user(tmp,(unsigned long *) data);
202 break;
203 }
204
205 /* when I and D space are separate, this will have to be fixed. */
206 case PTRACE_POKETEXT: /* write the word at location addr. */
207 case PTRACE_POKEDATA:
208 ret = 0;
209 if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
210 break;
211 ret = -EIO;
212 break;
213
214 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
215 ret = -EIO;
216 if ((addr & 3) || addr < 0 ||
217 addr > sizeof(struct user) - 3)
218 break;
219
220 addr = addr >> 2; /* temporary hack. */
221
222 if (addr == PT_SR) {
223 data &= SR_MASK;
224 data <<= 16;
225 data |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
226 }
227 if (addr < 19) {
228 if (put_reg(child, addr, data))
229 break;
230 ret = 0;
231 break;
232 }
233 if (addr >= 21 && addr < 48)
234 {
235#ifdef CONFIG_M68KFPU_EMU
236 /* Convert long double format
237 * into internal fpu reg representation
238 */
239 if (FPU_IS_EMU && (addr < 45) && !(addr % 3)) {
240 data = (unsigned long)data << 15;
241 data = (data & 0xffff0000) |
242 ((data & 0x0000ffff) >> 1);
243 }
244#endif
245 child->thread.fp[addr - 21] = data;
246 ret = 0;
247 }
248 break; 195 break;
249 196 ret = put_user(tmp, (unsigned long *)data);
250 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 197 break;
251 case PTRACE_CONT: { /* restart after signal. */ 198
252 long tmp; 199 /* when I and D space are separate, this will have to be fixed. */
253 200 case PTRACE_POKETEXT: /* write the word at location addr. */
254 ret = -EIO; 201 case PTRACE_POKEDATA:
255 if (!valid_signal(data)) 202 if (access_process_vm(child, addr, &data, sizeof(data), 1) != sizeof(data))
256 break; 203 goto out_eio;
257 if (request == PTRACE_SYSCALL) { 204 break;
258 child->thread.work.syscall_trace = ~0; 205
259 } else { 206 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
260 child->thread.work.syscall_trace = 0; 207 if (addr & 3)
208 goto out_eio;
209 addr >>= 2; /* temporary hack. */
210
211 if (addr == PT_SR) {
212 data &= SR_MASK;
213 data <<= 16;
214 data |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
215 } else if (addr >= 0 && addr < 19) {
216 if (put_reg(child, addr, data))
217 goto out_eio;
218 } else if (addr >= 21 && addr < 48) {
219 /* Convert long double format
220 * into internal fpu reg representation
221 */
222 if (FPU_IS_EMU && (addr < 45) && !(addr % 3)) {
223 data = (unsigned long)data << 15;
224 data = (data & 0xffff0000) |
225 ((data & 0x0000ffff) >> 1);
261 } 226 }
262 child->exit_code = data; 227 child->thread.fp[addr - 21] = data;
263 /* make sure the single step bit is not set. */ 228 } else
264 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); 229 goto out_eio;
265 put_reg(child, PT_SR, tmp); 230 break;
266 child->thread.work.delayed_trace = 0; 231
267 wake_up_process(child); 232 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
268 ret = 0; 233 case PTRACE_CONT: /* restart after signal. */
269 break; 234 if (!valid_signal(data))
270 } 235 goto out_eio;
271 236
272/* 237 if (request == PTRACE_SYSCALL)
273 * make the child exit. Best I can do is send it a sigkill. 238 child->thread.work.syscall_trace = ~0;
274 * perhaps it should be put in the status that it wants to 239 else
275 * exit.
276 */
277 case PTRACE_KILL: {
278 long tmp;
279
280 ret = 0;
281 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
282 break;
283 child->exit_code = SIGKILL;
284 /* make sure the single step bit is not set. */
285 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
286 put_reg(child, PT_SR, tmp);
287 child->thread.work.delayed_trace = 0;
288 wake_up_process(child);
289 break;
290 }
291
292 case PTRACE_SINGLESTEP: { /* set the trap flag. */
293 long tmp;
294
295 ret = -EIO;
296 if (!valid_signal(data))
297 break;
298 child->thread.work.syscall_trace = 0; 240 child->thread.work.syscall_trace = 0;
299 tmp = get_reg(child, PT_SR) | (TRACE_BITS << 16); 241 child->exit_code = data;
300 put_reg(child, PT_SR, tmp); 242 singlestep_disable(child);
301 child->thread.work.delayed_trace = 1; 243 wake_up_process(child);
302 244 break;
303 child->exit_code = data;
304 /* give it a chance to run. */
305 wake_up_process(child);
306 ret = 0;
307 break;
308 }
309 245
310 case PTRACE_DETACH: /* detach a process that was attached. */ 246 /*
311 ret = ptrace_detach(child, data); 247 * make the child exit. Best I can do is send it a sigkill.
248 * perhaps it should be put in the status that it wants to
249 * exit.
250 */
251 case PTRACE_KILL:
252 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
312 break; 253 break;
313 254 child->exit_code = SIGKILL;
314 case PTRACE_GETREGS: { /* Get all gp regs from the child. */ 255 singlestep_disable(child);
315 int i; 256 wake_up_process(child);
316 unsigned long tmp; 257 break;
317 for (i = 0; i < 19; i++) { 258
318 tmp = get_reg(child, i); 259 case PTRACE_SINGLESTEP: /* set the trap flag. */
319 if (i == PT_SR) 260 if (!valid_signal(data))
261 goto out_eio;
262
263 child->thread.work.syscall_trace = 0;
264 tmp = get_reg(child, PT_SR) | (TRACE_BITS << 16);
265 put_reg(child, PT_SR, tmp);
266 child->thread.work.delayed_trace = 1;
267
268 child->exit_code = data;
269 /* give it a chance to run. */
270 wake_up_process(child);
271 break;
272
273 case PTRACE_DETACH: /* detach a process that was attached. */
274 ret = ptrace_detach(child, data);
275 break;
276
277 case PTRACE_GETREGS: /* Get all gp regs from the child. */
278 for (i = 0; i < 19; i++) {
279 tmp = get_reg(child, i);
280 if (i == PT_SR)
320 tmp >>= 16; 281 tmp >>= 16;
321 if (put_user(tmp, (unsigned long *) data)) { 282 ret = put_user(tmp, (unsigned long *)data);
322 ret = -EFAULT; 283 if (ret)
323 break; 284 break;
324 } 285 data += sizeof(long);
325 data += sizeof(long);
326 }
327 ret = 0;
328 break;
329 } 286 }
287 break;
330 288
331 case PTRACE_SETREGS: { /* Set all gp regs in the child. */ 289 case PTRACE_SETREGS: /* Set all gp regs in the child. */
332 int i; 290 for (i = 0; i < 19; i++) {
333 unsigned long tmp; 291 ret = get_user(tmp, (unsigned long *)data);
334 for (i = 0; i < 19; i++) { 292 if (ret)
335 if (get_user(tmp, (unsigned long *) data)) {
336 ret = -EFAULT;
337 break; 293 break;
338 } 294 if (i == PT_SR) {
339 if (i == PT_SR) {
340 tmp &= SR_MASK; 295 tmp &= SR_MASK;
341 tmp <<= 16; 296 tmp <<= 16;
342 tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16); 297 tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
343 }
344 put_reg(child, i, tmp);
345 data += sizeof(long);
346 } 298 }
347 ret = 0; 299 put_reg(child, i, tmp);
348 break; 300 data += sizeof(long);
349 } 301 }
350 302 break;
351 case PTRACE_GETFPREGS: { /* Get the child FPU state. */ 303
352 ret = 0; 304 case PTRACE_GETFPREGS: /* Get the child FPU state. */
353 if (copy_to_user((void *)data, &child->thread.fp, 305 if (copy_to_user((void *)data, &child->thread.fp,
354 sizeof(struct user_m68kfp_struct))) 306 sizeof(struct user_m68kfp_struct)))
355 ret = -EFAULT; 307 ret = -EFAULT;
356 break; 308 break;
357 } 309
358 310 case PTRACE_SETFPREGS: /* Set the child FPU state. */
359 case PTRACE_SETFPREGS: { /* Set the child FPU state. */ 311 if (copy_from_user(&child->thread.fp, (void *)data,
360 ret = 0; 312 sizeof(struct user_m68kfp_struct)))
361 if (copy_from_user(&child->thread.fp, (void *)data, 313 ret = -EFAULT;
362 sizeof(struct user_m68kfp_struct))) 314 break;
363 ret = -EFAULT; 315
364 break; 316 default:
365 } 317 ret = ptrace_request(child, request, addr, data);
366 318 break;
367 default:
368 ret = ptrace_request(child, request, addr, data);
369 break;
370 } 319 }
371out_tsk: 320out_tsk:
372 put_task_struct(child); 321 put_task_struct(child);
373out: 322out:
374 unlock_kernel(); 323 unlock_kernel();
375 return ret; 324 return ret;
325out_eio:
326 ret = -EIO;
327 goto out_tsk;
376} 328}
377 329
378asmlinkage void syscall_trace(void) 330asmlinkage void syscall_trace(void)
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index 34b6dbc29c85..ebe51a513817 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -5,4 +5,4 @@
5EXTRA_AFLAGS := -traditional 5EXTRA_AFLAGS := -traditional
6 6
7lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 7lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
8 checksum.o memcmp.o memcpy.o memset.o semaphore.o 8 checksum.o string.o semaphore.o
diff --git a/arch/m68k/lib/memcmp.c b/arch/m68k/lib/memcmp.c
deleted file mode 100644
index f4796febb773..000000000000
--- a/arch/m68k/lib/memcmp.c
+++ /dev/null
@@ -1,11 +0,0 @@
1#include <linux/types.h>
2
3int memcmp(const void * cs,const void * ct,size_t count)
4{
5 const unsigned char *su1, *su2;
6
7 for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
8 if (*su1 != *su2)
9 return((*su1 < *su2) ? -1 : +1);
10 return(0);
11}
diff --git a/arch/m68k/lib/memcpy.c b/arch/m68k/lib/memcpy.c
deleted file mode 100644
index 73e181823d9b..000000000000
--- a/arch/m68k/lib/memcpy.c
+++ /dev/null
@@ -1,75 +0,0 @@
1#include <linux/types.h>
2
3void * memcpy(void * to, const void * from, size_t n)
4{
5 void *xto = to;
6 size_t temp, temp1;
7
8 if (!n)
9 return xto;
10 if ((long) to & 1)
11 {
12 char *cto = to;
13 const char *cfrom = from;
14 *cto++ = *cfrom++;
15 to = cto;
16 from = cfrom;
17 n--;
18 }
19 if (n > 2 && (long) to & 2)
20 {
21 short *sto = to;
22 const short *sfrom = from;
23 *sto++ = *sfrom++;
24 to = sto;
25 from = sfrom;
26 n -= 2;
27 }
28 temp = n >> 2;
29 if (temp)
30 {
31 long *lto = to;
32 const long *lfrom = from;
33
34 __asm__ __volatile__("movel %2,%3\n\t"
35 "andw #7,%3\n\t"
36 "lsrl #3,%2\n\t"
37 "negw %3\n\t"
38 "jmp %%pc@(1f,%3:w:2)\n\t"
39 "4:\t"
40 "movel %0@+,%1@+\n\t"
41 "movel %0@+,%1@+\n\t"
42 "movel %0@+,%1@+\n\t"
43 "movel %0@+,%1@+\n\t"
44 "movel %0@+,%1@+\n\t"
45 "movel %0@+,%1@+\n\t"
46 "movel %0@+,%1@+\n\t"
47 "movel %0@+,%1@+\n\t"
48 "1:\t"
49 "dbra %2,4b\n\t"
50 "clrw %2\n\t"
51 "subql #1,%2\n\t"
52 "jpl 4b\n\t"
53 : "=a" (lfrom), "=a" (lto), "=d" (temp),
54 "=&d" (temp1)
55 : "0" (lfrom), "1" (lto), "2" (temp)
56 );
57 to = lto;
58 from = lfrom;
59 }
60 if (n & 2)
61 {
62 short *sto = to;
63 const short *sfrom = from;
64 *sto++ = *sfrom++;
65 to = sto;
66 from = sfrom;
67 }
68 if (n & 1)
69 {
70 char *cto = to;
71 const char *cfrom = from;
72 *cto = *cfrom;
73 }
74 return xto;
75}
diff --git a/arch/m68k/lib/memset.c b/arch/m68k/lib/memset.c
deleted file mode 100644
index d55fdb2ee9d3..000000000000
--- a/arch/m68k/lib/memset.c
+++ /dev/null
@@ -1,68 +0,0 @@
1#include <linux/types.h>
2
3void * memset(void * s, int c, size_t count)
4{
5 void *xs = s;
6 size_t temp, temp1;
7
8 if (!count)
9 return xs;
10 c &= 0xff;
11 c |= c << 8;
12 c |= c << 16;
13 if ((long) s & 1)
14 {
15 char *cs = s;
16 *cs++ = c;
17 s = cs;
18 count--;
19 }
20 if (count > 2 && (long) s & 2)
21 {
22 short *ss = s;
23 *ss++ = c;
24 s = ss;
25 count -= 2;
26 }
27 temp = count >> 2;
28 if (temp)
29 {
30 long *ls = s;
31
32 __asm__ __volatile__("movel %1,%2\n\t"
33 "andw #7,%2\n\t"
34 "lsrl #3,%1\n\t"
35 "negw %2\n\t"
36 "jmp %%pc@(2f,%2:w:2)\n\t"
37 "1:\t"
38 "movel %3,%0@+\n\t"
39 "movel %3,%0@+\n\t"
40 "movel %3,%0@+\n\t"
41 "movel %3,%0@+\n\t"
42 "movel %3,%0@+\n\t"
43 "movel %3,%0@+\n\t"
44 "movel %3,%0@+\n\t"
45 "movel %3,%0@+\n\t"
46 "2:\t"
47 "dbra %1,1b\n\t"
48 "clrw %1\n\t"
49 "subql #1,%1\n\t"
50 "jpl 1b\n\t"
51 : "=a" (ls), "=d" (temp), "=&d" (temp1)
52 : "d" (c), "0" (ls), "1" (temp)
53 );
54 s = ls;
55 }
56 if (count & 2)
57 {
58 short *ss = s;
59 *ss++ = c;
60 s = ss;
61 }
62 if (count & 1)
63 {
64 char *cs = s;
65 *cs = c;
66 }
67 return xs;
68}
diff --git a/arch/m68k/lib/string.c b/arch/m68k/lib/string.c
new file mode 100644
index 000000000000..b92b89e1ea0c
--- /dev/null
+++ b/arch/m68k/lib/string.c
@@ -0,0 +1,237 @@
1
2#include <linux/types.h>
3#include <linux/module.h>
4
5void *memset(void *s, int c, size_t count)
6{
7 void *xs = s;
8 size_t temp, temp1;
9
10 if (!count)
11 return xs;
12 c &= 0xff;
13 c |= c << 8;
14 c |= c << 16;
15 if ((long)s & 1) {
16 char *cs = s;
17 *cs++ = c;
18 s = cs;
19 count--;
20 }
21 if (count > 2 && (long)s & 2) {
22 short *ss = s;
23 *ss++ = c;
24 s = ss;
25 count -= 2;
26 }
27 temp = count >> 2;
28 if (temp) {
29 long *ls = s;
30
31 asm volatile (
32 " movel %1,%2\n"
33 " andw #7,%2\n"
34 " lsrl #3,%1\n"
35 " negw %2\n"
36 " jmp %%pc@(2f,%2:w:2)\n"
37 "1: movel %3,%0@+\n"
38 " movel %3,%0@+\n"
39 " movel %3,%0@+\n"
40 " movel %3,%0@+\n"
41 " movel %3,%0@+\n"
42 " movel %3,%0@+\n"
43 " movel %3,%0@+\n"
44 " movel %3,%0@+\n"
45 "2: dbra %1,1b\n"
46 " clrw %1\n"
47 " subql #1,%1\n"
48 " jpl 1b"
49 : "=a" (ls), "=d" (temp), "=&d" (temp1)
50 : "d" (c), "0" (ls), "1" (temp));
51 s = ls;
52 }
53 if (count & 2) {
54 short *ss = s;
55 *ss++ = c;
56 s = ss;
57 }
58 if (count & 1) {
59 char *cs = s;
60 *cs = c;
61 }
62 return xs;
63}
64EXPORT_SYMBOL(memset);
65
66void *memcpy(void *to, const void *from, size_t n)
67{
68 void *xto = to;
69 size_t temp, temp1;
70
71 if (!n)
72 return xto;
73 if ((long)to & 1) {
74 char *cto = to;
75 const char *cfrom = from;
76 *cto++ = *cfrom++;
77 to = cto;
78 from = cfrom;
79 n--;
80 }
81 if (n > 2 && (long)to & 2) {
82 short *sto = to;
83 const short *sfrom = from;
84 *sto++ = *sfrom++;
85 to = sto;
86 from = sfrom;
87 n -= 2;
88 }
89 temp = n >> 2;
90 if (temp) {
91 long *lto = to;
92 const long *lfrom = from;
93
94 asm volatile (
95 " movel %2,%3\n"
96 " andw #7,%3\n"
97 " lsrl #3,%2\n"
98 " negw %3\n"
99 " jmp %%pc@(1f,%3:w:2)\n"
100 "4: movel %0@+,%1@+\n"
101 " movel %0@+,%1@+\n"
102 " movel %0@+,%1@+\n"
103 " movel %0@+,%1@+\n"
104 " movel %0@+,%1@+\n"
105 " movel %0@+,%1@+\n"
106 " movel %0@+,%1@+\n"
107 " movel %0@+,%1@+\n"
108 "1: dbra %2,4b\n"
109 " clrw %2\n"
110 " subql #1,%2\n"
111 " jpl 4b"
112 : "=a" (lfrom), "=a" (lto), "=d" (temp), "=&d" (temp1)
113 : "0" (lfrom), "1" (lto), "2" (temp));
114 to = lto;
115 from = lfrom;
116 }
117 if (n & 2) {
118 short *sto = to;
119 const short *sfrom = from;
120 *sto++ = *sfrom++;
121 to = sto;
122 from = sfrom;
123 }
124 if (n & 1) {
125 char *cto = to;
126 const char *cfrom = from;
127 *cto = *cfrom;
128 }
129 return xto;
130}
131EXPORT_SYMBOL(memcpy);
132
133void *memmove(void *dest, const void *src, size_t n)
134{
135 void *xdest = dest;
136 size_t temp;
137
138 if (!n)
139 return xdest;
140
141 if (dest < src) {
142 if ((long)dest & 1) {
143 char *cdest = dest;
144 const char *csrc = src;
145 *cdest++ = *csrc++;
146 dest = cdest;
147 src = csrc;
148 n--;
149 }
150 if (n > 2 && (long)dest & 2) {
151 short *sdest = dest;
152 const short *ssrc = src;
153 *sdest++ = *ssrc++;
154 dest = sdest;
155 src = ssrc;
156 n -= 2;
157 }
158 temp = n >> 2;
159 if (temp) {
160 long *ldest = dest;
161 const long *lsrc = src;
162 temp--;
163 do
164 *ldest++ = *lsrc++;
165 while (temp--);
166 dest = ldest;
167 src = lsrc;
168 }
169 if (n & 2) {
170 short *sdest = dest;
171 const short *ssrc = src;
172 *sdest++ = *ssrc++;
173 dest = sdest;
174 src = ssrc;
175 }
176 if (n & 1) {
177 char *cdest = dest;
178 const char *csrc = src;
179 *cdest = *csrc;
180 }
181 } else {
182 dest = (char *)dest + n;
183 src = (const char *)src + n;
184 if ((long)dest & 1) {
185 char *cdest = dest;
186 const char *csrc = src;
187 *--cdest = *--csrc;
188 dest = cdest;
189 src = csrc;
190 n--;
191 }
192 if (n > 2 && (long)dest & 2) {
193 short *sdest = dest;
194 const short *ssrc = src;
195 *--sdest = *--ssrc;
196 dest = sdest;
197 src = ssrc;
198 n -= 2;
199 }
200 temp = n >> 2;
201 if (temp) {
202 long *ldest = dest;
203 const long *lsrc = src;
204 temp--;
205 do
206 *--ldest = *--lsrc;
207 while (temp--);
208 dest = ldest;
209 src = lsrc;
210 }
211 if (n & 2) {
212 short *sdest = dest;
213 const short *ssrc = src;
214 *--sdest = *--ssrc;
215 dest = sdest;
216 src = ssrc;
217 }
218 if (n & 1) {
219 char *cdest = dest;
220 const char *csrc = src;
221 *--cdest = *--csrc;
222 }
223 }
224 return xdest;
225}
226EXPORT_SYMBOL(memmove);
227
228int memcmp(const void *cs, const void *ct, size_t count)
229{
230 const unsigned char *su1, *su2;
231
232 for (su1 = cs, su2 = ct; count > 0; ++su1, ++su2, count--)
233 if (*su1 != *su2)
234 return *su1 < *su2 ? -1 : +1;
235 return 0;
236}
237EXPORT_SYMBOL(memcmp);
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile
index 90f1c735c110..5eaa43c4cb3c 100644
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux m68k-specific parts of the memory manager. 2# Makefile for the linux m68k-specific parts of the memory manager.
3# 3#
4 4
5obj-y := init.o fault.o hwtest.o 5obj-y := cache.o init.o fault.o hwtest.o
6 6
7obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o 7obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o
8obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o 8obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
new file mode 100644
index 000000000000..5437fff5fe07
--- /dev/null
+++ b/arch/m68k/mm/cache.c
@@ -0,0 +1,118 @@
1/*
2 * linux/arch/m68k/mm/cache.c
3 *
4 * Instruction cache handling
5 *
6 * Copyright (C) 1995 Hamish Macdonald
7 */
8
9#include <linux/module.h>
10#include <asm/pgalloc.h>
11#include <asm/traps.h>
12
13
14static unsigned long virt_to_phys_slow(unsigned long vaddr)
15{
16 if (CPU_IS_060) {
17 unsigned long paddr;
18
19 /* The PLPAR instruction causes an access error if the translation
20 * is not possible. To catch this we use the same exception mechanism
21 * as for user space accesses in <asm/uaccess.h>. */
22 asm volatile (".chip 68060\n"
23 "1: plpar (%0)\n"
24 ".chip 68k\n"
25 "2:\n"
26 ".section .fixup,\"ax\"\n"
27 " .even\n"
28 "3: sub.l %0,%0\n"
29 " jra 2b\n"
30 ".previous\n"
31 ".section __ex_table,\"a\"\n"
32 " .align 4\n"
33 " .long 1b,3b\n"
34 ".previous"
35 : "=a" (paddr)
36 : "0" (vaddr));
37 return paddr;
38 } else if (CPU_IS_040) {
39 unsigned long mmusr;
40
41 asm volatile (".chip 68040\n\t"
42 "ptestr (%1)\n\t"
43 "movec %%mmusr, %0\n\t"
44 ".chip 68k"
45 : "=r" (mmusr)
46 : "a" (vaddr));
47
48 if (mmusr & MMU_R_040)
49 return (mmusr & PAGE_MASK) | (vaddr & ~PAGE_MASK);
50 } else {
51 unsigned short mmusr;
52 unsigned long *descaddr;
53
54 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
55 "pmove %%psr,%1@"
56 : "=a&" (descaddr)
57 : "a" (&mmusr), "a" (vaddr), "d" (get_fs().seg));
58 if (mmusr & (MMU_I|MMU_B|MMU_L))
59 return 0;
60 descaddr = phys_to_virt((unsigned long)descaddr);
61 switch (mmusr & MMU_NUM) {
62 case 1:
63 return (*descaddr & 0xfe000000) | (vaddr & 0x01ffffff);
64 case 2:
65 return (*descaddr & 0xfffc0000) | (vaddr & 0x0003ffff);
66 case 3:
67 return (*descaddr & PAGE_MASK) | (vaddr & ~PAGE_MASK);
68 }
69 }
70 return 0;
71}
72
73/* Push n pages at kernel virtual address and clear the icache */
74/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
75void flush_icache_range(unsigned long address, unsigned long endaddr)
76{
77
78 if (CPU_IS_040_OR_060) {
79 address &= PAGE_MASK;
80
81 do {
82 asm volatile ("nop\n\t"
83 ".chip 68040\n\t"
84 "cpushp %%bc,(%0)\n\t"
85 ".chip 68k"
86 : : "a" (virt_to_phys_slow(address)));
87 address += PAGE_SIZE;
88 } while (address < endaddr);
89 } else {
90 unsigned long tmp;
91 asm volatile ("movec %%cacr,%0\n\t"
92 "orw %1,%0\n\t"
93 "movec %0,%%cacr"
94 : "=&d" (tmp)
95 : "di" (FLUSH_I));
96 }
97}
98EXPORT_SYMBOL(flush_icache_range);
99
100void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
101 unsigned long addr, int len)
102{
103 if (CPU_IS_040_OR_060) {
104 asm volatile ("nop\n\t"
105 ".chip 68040\n\t"
106 "cpushp %%bc,(%0)\n\t"
107 ".chip 68k"
108 : : "a" (page_to_phys(page)));
109 } else {
110 unsigned long tmp;
111 asm volatile ("movec %%cacr,%0\n\t"
112 "orw %1,%0\n\t"
113 "movec %0,%%cacr"
114 : "=&d" (tmp)
115 : "di" (FLUSH_I));
116 }
117}
118
diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c
index 1453a6013721..559942ce0e1e 100644
--- a/arch/m68k/mm/memory.c
+++ b/arch/m68k/mm/memory.c
@@ -354,110 +354,6 @@ void cache_push (unsigned long paddr, int len)
354#endif 354#endif
355} 355}
356 356
357static unsigned long virt_to_phys_slow(unsigned long vaddr)
358{
359 if (CPU_IS_060) {
360 mm_segment_t fs = get_fs();
361 unsigned long paddr;
362
363 set_fs(get_ds());
364
365 /* The PLPAR instruction causes an access error if the translation
366 * is not possible. To catch this we use the same exception mechanism
367 * as for user space accesses in <asm/uaccess.h>. */
368 asm volatile (".chip 68060\n"
369 "1: plpar (%0)\n"
370 ".chip 68k\n"
371 "2:\n"
372 ".section .fixup,\"ax\"\n"
373 " .even\n"
374 "3: sub.l %0,%0\n"
375 " jra 2b\n"
376 ".previous\n"
377 ".section __ex_table,\"a\"\n"
378 " .align 4\n"
379 " .long 1b,3b\n"
380 ".previous"
381 : "=a" (paddr)
382 : "0" (vaddr));
383 set_fs(fs);
384 return paddr;
385 } else if (CPU_IS_040) {
386 mm_segment_t fs = get_fs();
387 unsigned long mmusr;
388
389 set_fs(get_ds());
390
391 asm volatile (".chip 68040\n\t"
392 "ptestr (%1)\n\t"
393 "movec %%mmusr, %0\n\t"
394 ".chip 68k"
395 : "=r" (mmusr)
396 : "a" (vaddr));
397 set_fs(fs);
398
399 if (mmusr & MMU_R_040)
400 return (mmusr & PAGE_MASK) | (vaddr & ~PAGE_MASK);
401 } else {
402 unsigned short mmusr;
403 unsigned long *descaddr;
404
405 asm volatile ("ptestr #5,%2@,#7,%0\n\t"
406 "pmove %%psr,%1@"
407 : "=a&" (descaddr)
408 : "a" (&mmusr), "a" (vaddr));
409 if (mmusr & (MMU_I|MMU_B|MMU_L))
410 return 0;
411 descaddr = phys_to_virt((unsigned long)descaddr);
412 switch (mmusr & MMU_NUM) {
413 case 1:
414 return (*descaddr & 0xfe000000) | (vaddr & 0x01ffffff);
415 case 2:
416 return (*descaddr & 0xfffc0000) | (vaddr & 0x0003ffff);
417 case 3:
418 return (*descaddr & PAGE_MASK) | (vaddr & ~PAGE_MASK);
419 }
420 }
421 return 0;
422}
423
424/* Push n pages at kernel virtual address and clear the icache */
425/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
426void flush_icache_range(unsigned long address, unsigned long endaddr)
427{
428 if (CPU_IS_040_OR_060) {
429 address &= PAGE_MASK;
430
431 if (address >= PAGE_OFFSET && address < (unsigned long)high_memory) {
432 do {
433 asm volatile ("nop\n\t"
434 ".chip 68040\n\t"
435 "cpushp %%bc,(%0)\n\t"
436 ".chip 68k"
437 : : "a" (virt_to_phys((void *)address)));
438 address += PAGE_SIZE;
439 } while (address < endaddr);
440 } else {
441 do {
442 asm volatile ("nop\n\t"
443 ".chip 68040\n\t"
444 "cpushp %%bc,(%0)\n\t"
445 ".chip 68k"
446 : : "a" (virt_to_phys_slow(address)));
447 address += PAGE_SIZE;
448 } while (address < endaddr);
449 }
450 } else {
451 unsigned long tmp;
452 asm volatile ("movec %%cacr,%0\n\t"
453 "orw %1,%0\n\t"
454 "movec %0,%%cacr"
455 : "=&d" (tmp)
456 : "di" (FLUSH_I));
457 }
458}
459
460
461#ifndef CONFIG_SINGLE_MEMORY_CHUNK 357#ifndef CONFIG_SINGLE_MEMORY_CHUNK
462int mm_end_of_chunk (unsigned long addr, int len) 358int mm_end_of_chunk (unsigned long addr, int len)
463{ 359{
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 117f183f0b43..8520df9cee6d 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -71,21 +71,31 @@ config M5206e
71 help 71 help
72 Motorola ColdFire 5206e processor support. 72 Motorola ColdFire 5206e processor support.
73 73
74config M523x
75 bool "MCF523x"
76 help
77 Freescale Coldfire 5230/1/2/4/5 processor support
78
74config M5249 79config M5249
75 bool "MCF5249" 80 bool "MCF5249"
76 help 81 help
77 Motorola ColdFire 5249 processor support. 82 Motorola ColdFire 5249 processor support.
78 83
79config M527x 84config M5271
80 bool "MCF527x" 85 bool "MCF5271"
81 help 86 help
82 Freescale (Motorola) ColdFire 5270/5271/5274/5275 processor support. 87 Freescale (Motorola) ColdFire 5270/5271 processor support.
83 88
84config M5272 89config M5272
85 bool "MCF5272" 90 bool "MCF5272"
86 help 91 help
87 Motorola ColdFire 5272 processor support. 92 Motorola ColdFire 5272 processor support.
88 93
94config M5275
95 bool "MCF5275"
96 help
97 Freescale (Motorola) ColdFire 5274/5275 processor support.
98
89config M528x 99config M528x
90 bool "MCF528x" 100 bool "MCF528x"
91 help 101 help
@@ -103,9 +113,14 @@ config M5407
103 113
104endchoice 114endchoice
105 115
116config M527x
117 bool
118 depends on (M5271 || M5275)
119 default y
120
106config COLDFIRE 121config COLDFIRE
107 bool 122 bool
108 depends on (M5206 || M5206e || M5249 || M527x || M5272 || M528x || M5307 || M5407) 123 depends on (M5206 || M5206e || M523x || M5249 || M527x || M5272 || M528x || M5307 || M5407)
109 default y 124 default y
110 125
111choice 126choice
@@ -183,6 +198,11 @@ config CLOCK_60MHz
183 help 198 help
184 Select a 60MHz CPU clock frequency. 199 Select a 60MHz CPU clock frequency.
185 200
201config CLOCK_62_5MHz
202 bool "62.5MHz"
203 help
204 Select a 62.5MHz CPU clock frequency.
205
186config CLOCK_64MHz 206config CLOCK_64MHz
187 bool "64MHz" 207 bool "64MHz"
188 help 208 help
@@ -302,6 +322,12 @@ config ELITE
302 help 322 help
303 Support for the Motorola M5206eLITE board. 323 Support for the Motorola M5206eLITE board.
304 324
325config M5235EVB
326 bool "Freescale M5235EVB support"
327 depends on M523x
328 help
329 Support for the Freescale M5235EVB board.
330
305config M5249C3 331config M5249C3
306 bool "Motorola M5249C3 board support" 332 bool "Motorola M5249C3 board support"
307 depends on M5249 333 depends on M5249
@@ -310,13 +336,13 @@ config M5249C3
310 336
311config M5271EVB 337config M5271EVB
312 bool "Freescale (Motorola) M5271EVB board support" 338 bool "Freescale (Motorola) M5271EVB board support"
313 depends on M527x 339 depends on M5271
314 help 340 help
315 Support for the Freescale (Motorola) M5271EVB board. 341 Support for the Freescale (Motorola) M5271EVB board.
316 342
317config M5275EVB 343config M5275EVB
318 bool "Freescale (Motorola) M5275EVB board support" 344 bool "Freescale (Motorola) M5275EVB board support"
319 depends on M527x 345 depends on M5275
320 help 346 help
321 Support for the Freescale (Motorola) M5275EVB board. 347 Support for the Freescale (Motorola) M5275EVB board.
322 348
@@ -343,6 +369,12 @@ config COBRA5282
343 depends on M528x 369 depends on M528x
344 help 370 help
345 Support for the senTec COBRA5282 board. 371 Support for the senTec COBRA5282 board.
372
373config SOM5282EM
374 bool "EMAC.Inc SOM5282EM board support"
375 depends on M528x
376 help
377 Support for the EMAC.Inc SOM5282EM module.
346 378
347config ARN5307 379config ARN5307
348 bool "Arnewsh 5307 board support" 380 bool "Arnewsh 5307 board support"
@@ -410,6 +442,12 @@ config CPU16B
410 help 442 help
411 Support for the SNEHA CPU16B board. 443 Support for the SNEHA CPU16B board.
412 444
445config MOD5272
446 bool "Netburner MOD-5272 board support"
447 depends on M5272
448 help
449 Support for the Netburner MOD-5272 board.
450
413config ROMFS_FROM_ROM 451config ROMFS_FROM_ROM
414 bool " ROMFS image not RAM resident" 452 bool " ROMFS image not RAM resident"
415 depends on (NETtel || SNAPGEAR) 453 depends on (NETtel || SNAPGEAR)
@@ -430,7 +468,7 @@ config ARNEWSH
430config MOTOROLA 468config MOTOROLA
431 bool 469 bool
432 default y 470 default y
433 depends on (M5206eC3 || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3) 471 depends on (M5206eC3 || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3)
434 472
435config HW_FEITH 473config HW_FEITH
436 bool 474 bool
@@ -441,6 +479,11 @@ config senTec
441 bool 479 bool
442 default y 480 default y
443 depends on (COBRA5272 || COBRA5282) 481 depends on (COBRA5272 || COBRA5282)
482
483config EMAC_INC
484 bool
485 default y
486 depends on (SOM5282EM)
444 487
445config SNEHA 488config SNEHA
446 bool 489 bool
@@ -455,6 +498,15 @@ config LARGE_ALLOCS
455 a lot of RAM, and you need to able to allocate very large 498 a lot of RAM, and you need to able to allocate very large
456 contiguous chunks. If unsure, say N. 499 contiguous chunks. If unsure, say N.
457 500
501config 4KSTACKS
502 bool "Use 4Kb for kernel stacks instead of 8Kb"
503 default y
504 help
505 If you say Y here the kernel will use a 4Kb stacksize for the
506 kernel stack attached to each process/thread. This facilitates
507 running more threads on a system and also reduces the pressure
508 on the VM subsystem for higher order allocations.
509
458choice 510choice
459 prompt "RAM size" 511 prompt "RAM size"
460 default AUTO 512 default AUTO
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index a254aa9d4998..97022ed0da38 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -14,6 +14,7 @@ platform-$(CONFIG_M68VZ328) := 68VZ328
14platform-$(CONFIG_M68360) := 68360 14platform-$(CONFIG_M68360) := 68360
15platform-$(CONFIG_M5206) := 5206 15platform-$(CONFIG_M5206) := 5206
16platform-$(CONFIG_M5206e) := 5206e 16platform-$(CONFIG_M5206e) := 5206e
17platform-$(CONFIG_M523x) := 523x
17platform-$(CONFIG_M5249) := 5249 18platform-$(CONFIG_M5249) := 5249
18platform-$(CONFIG_M527x) := 527x 19platform-$(CONFIG_M527x) := 527x
19platform-$(CONFIG_M5272) := 5272 20platform-$(CONFIG_M5272) := 5272
@@ -29,6 +30,7 @@ board-$(CONFIG_UCQUICC) := uCquicc
29board-$(CONFIG_DRAGEN2) := de2 30board-$(CONFIG_DRAGEN2) := de2
30board-$(CONFIG_ARNEWSH) := ARNEWSH 31board-$(CONFIG_ARNEWSH) := ARNEWSH
31board-$(CONFIG_MOTOROLA) := MOTOROLA 32board-$(CONFIG_MOTOROLA) := MOTOROLA
33board-$(CONFIG_M5235EVB) := M5235EVB
32board-$(CONFIG_M5271EVB) := M5271EVB 34board-$(CONFIG_M5271EVB) := M5271EVB
33board-$(CONFIG_M5275EVB) := M5275EVB 35board-$(CONFIG_M5275EVB) := M5275EVB
34board-$(CONFIG_M5282EVB) := M5282EVB 36board-$(CONFIG_M5282EVB) := M5282EVB
@@ -39,6 +41,7 @@ board-$(CONFIG_SECUREEDGEMP3) := MP3
39board-$(CONFIG_CLEOPATRA) := CLEOPATRA 41board-$(CONFIG_CLEOPATRA) := CLEOPATRA
40board-$(CONFIG_senTec) := senTec 42board-$(CONFIG_senTec) := senTec
41board-$(CONFIG_SNEHA) := SNEHA 43board-$(CONFIG_SNEHA) := SNEHA
44board-$(CONFIG_MOD5272) := MOD5272
42BOARD := $(board-y) 45BOARD := $(board-y)
43 46
44model-$(CONFIG_RAMKERNEL) := ram 47model-$(CONFIG_RAMKERNEL) := ram
@@ -53,6 +56,7 @@ MODEL := $(model-y)
53# 56#
54cpuclass-$(CONFIG_M5206) := 5307 57cpuclass-$(CONFIG_M5206) := 5307
55cpuclass-$(CONFIG_M5206e) := 5307 58cpuclass-$(CONFIG_M5206e) := 5307
59cpuclass-$(CONFIG_M523x) := 5307
56cpuclass-$(CONFIG_M5249) := 5307 60cpuclass-$(CONFIG_M5249) := 5307
57cpuclass-$(CONFIG_M527x) := 5307 61cpuclass-$(CONFIG_M527x) := 5307
58cpuclass-$(CONFIG_M5272) := 5307 62cpuclass-$(CONFIG_M5272) := 5307
@@ -76,6 +80,7 @@ export PLATFORM BOARD MODEL CPUCLASS
76# 80#
77cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200 81cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200
78cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200 82cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200
83cflags-$(CONFIG_M523x) := -m5307 -Wa,-S -Wa,-m5307
79cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200 84cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200
80cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307 85cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307
81cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307 86cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig
index e4bd31be966a..87f2d6587c56 100644
--- a/arch/m68knommu/defconfig
+++ b/arch/m68knommu/defconfig
@@ -1,24 +1,48 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-uc0
4# Wed Aug 31 15:03:26 2005
3# 5#
6CONFIG_M68KNOMMU=y
4# CONFIG_MMU is not set 7# CONFIG_MMU is not set
5# CONFIG_FPU is not set 8# CONFIG_FPU is not set
6CONFIG_UID16=y 9CONFIG_UID16=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 10CONFIG_RWSEM_GENERIC_SPINLOCK=y
8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 11# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
12CONFIG_GENERIC_CALIBRATE_DELAY=y
9 13
10# 14#
11# Code maturity level options 15# Code maturity level options
12# 16#
13CONFIG_EXPERIMENTAL=y 17CONFIG_EXPERIMENTAL=y
18CONFIG_CLEAN_COMPILE=y
19CONFIG_BROKEN_ON_SMP=y
20CONFIG_INIT_ENV_ARG_LIMIT=32
14 21
15# 22#
16# General setup 23# General setup
17# 24#
18# CONFIG_SYSVIPC is not set 25CONFIG_LOCALVERSION=""
26# CONFIG_POSIX_MQUEUE is not set
19# CONFIG_BSD_PROCESS_ACCT is not set 27# CONFIG_BSD_PROCESS_ACCT is not set
20# CONFIG_SYSCTL is not set 28# CONFIG_SYSCTL is not set
21CONFIG_LOG_BUF_SHIFT=14 29# CONFIG_AUDIT is not set
30# CONFIG_HOTPLUG is not set
31# CONFIG_KOBJECT_UEVENT is not set
32# CONFIG_IKCONFIG is not set
33CONFIG_EMBEDDED=y
34# CONFIG_KALLSYMS is not set
35CONFIG_PRINTK=y
36CONFIG_BUG=y
37CONFIG_BASE_FULL=y
38# CONFIG_FUTEX is not set
39# CONFIG_EPOLL is not set
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_CC_ALIGN_FUNCTIONS=0
42CONFIG_CC_ALIGN_LABELS=0
43CONFIG_CC_ALIGN_LOOPS=0
44CONFIG_CC_ALIGN_JUMPS=0
45CONFIG_BASE_SMALL=0
22 46
23# 47#
24# Loadable module support 48# Loadable module support
@@ -34,9 +58,11 @@ CONFIG_LOG_BUF_SHIFT=14
34# CONFIG_M68360 is not set 58# CONFIG_M68360 is not set
35# CONFIG_M5206 is not set 59# CONFIG_M5206 is not set
36# CONFIG_M5206e is not set 60# CONFIG_M5206e is not set
61# CONFIG_M523x is not set
37# CONFIG_M5249 is not set 62# CONFIG_M5249 is not set
38# CONFIG_M527x is not set 63# CONFIG_M5271 is not set
39CONFIG_M5272=y 64CONFIG_M5272=y
65# CONFIG_M5275 is not set
40# CONFIG_M528x is not set 66# CONFIG_M528x is not set
41# CONFIG_M5307 is not set 67# CONFIG_M5307 is not set
42# CONFIG_M5407 is not set 68# CONFIG_M5407 is not set
@@ -54,6 +80,8 @@ CONFIG_COLDFIRE=y
54# CONFIG_CLOCK_50MHz is not set 80# CONFIG_CLOCK_50MHz is not set
55# CONFIG_CLOCK_54MHz is not set 81# CONFIG_CLOCK_54MHz is not set
56# CONFIG_CLOCK_60MHz is not set 82# CONFIG_CLOCK_60MHz is not set
83# CONFIG_CLOCK_62_5MHz is not set
84# CONFIG_CLOCK_64MHz is not set
57CONFIG_CLOCK_66MHz=y 85CONFIG_CLOCK_66MHz=y
58# CONFIG_CLOCK_70MHz is not set 86# CONFIG_CLOCK_70MHz is not set
59# CONFIG_CLOCK_100MHz is not set 87# CONFIG_CLOCK_100MHz is not set
@@ -65,13 +93,19 @@ CONFIG_CLOCK_66MHz=y
65# Platform 93# Platform
66# 94#
67CONFIG_M5272C3=y 95CONFIG_M5272C3=y
96# CONFIG_COBRA5272 is not set
97# CONFIG_CANCam is not set
98# CONFIG_SCALES is not set
68# CONFIG_NETtel is not set 99# CONFIG_NETtel is not set
100# CONFIG_CPU16B is not set
101# CONFIG_MOD5272 is not set
69CONFIG_MOTOROLA=y 102CONFIG_MOTOROLA=y
70# CONFIG_LARGE_ALLOCS is not set 103# CONFIG_LARGE_ALLOCS is not set
71# CONFIG_RAMAUTO is not set 104CONFIG_4KSTACKS=y
105CONFIG_RAMAUTO=y
72# CONFIG_RAM4MB is not set 106# CONFIG_RAM4MB is not set
73# CONFIG_RAM8MB is not set 107# CONFIG_RAM8MB is not set
74CONFIG_RAM16MB=y 108# CONFIG_RAM16MB is not set
75# CONFIG_RAM32MB is not set 109# CONFIG_RAM32MB is not set
76CONFIG_RAMAUTOBIT=y 110CONFIG_RAMAUTOBIT=y
77# CONFIG_RAM8BIT is not set 111# CONFIG_RAM8BIT is not set
@@ -79,20 +113,34 @@ CONFIG_RAMAUTOBIT=y
79# CONFIG_RAM32BIT is not set 113# CONFIG_RAM32BIT is not set
80CONFIG_RAMKERNEL=y 114CONFIG_RAMKERNEL=y
81# CONFIG_ROMKERNEL is not set 115# CONFIG_ROMKERNEL is not set
82# CONFIG_HIMEMKERNEL is not set 116CONFIG_SELECT_MEMORY_MODEL=y
117CONFIG_FLATMEM_MANUAL=y
118# CONFIG_DISCONTIGMEM_MANUAL is not set
119# CONFIG_SPARSEMEM_MANUAL is not set
120CONFIG_FLATMEM=y
121CONFIG_FLAT_NODE_MEM_MAP=y
83 122
84# 123#
85# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 124# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
86# 125#
87# CONFIG_PCI is not set 126# CONFIG_PCI is not set
88# CONFIG_HOTPLUG is not set 127
128#
129# PCCARD (PCMCIA/CardBus) support
130#
131# CONFIG_PCCARD is not set
132
133#
134# PCI Hotplug Support
135#
89 136
90# 137#
91# Executable file formats 138# Executable file formats
92# 139#
93CONFIG_KCORE_AOUT=y
94CONFIG_BINFMT_FLAT=y 140CONFIG_BINFMT_FLAT=y
95# CONFIG_BINFMT_ZFLAT is not set 141# CONFIG_BINFMT_ZFLAT is not set
142# CONFIG_BINFMT_SHARED_FLAT is not set
143# CONFIG_BINFMT_MISC is not set
96 144
97# 145#
98# Power management options 146# Power management options
@@ -100,12 +148,82 @@ CONFIG_BINFMT_FLAT=y
100# CONFIG_PM is not set 148# CONFIG_PM is not set
101 149
102# 150#
151# Networking
152#
153CONFIG_NET=y
154
155#
156# Networking options
157#
158CONFIG_PACKET=y
159# CONFIG_PACKET_MMAP is not set
160CONFIG_UNIX=y
161# CONFIG_NET_KEY is not set
162CONFIG_INET=y
163# CONFIG_IP_MULTICAST is not set
164# CONFIG_IP_ADVANCED_ROUTER is not set
165CONFIG_IP_FIB_HASH=y
166# CONFIG_IP_PNP is not set
167# CONFIG_NET_IPIP is not set
168# CONFIG_NET_IPGRE is not set
169# CONFIG_ARPD is not set
170# CONFIG_SYN_COOKIES is not set
171# CONFIG_INET_AH is not set
172# CONFIG_INET_ESP is not set
173# CONFIG_INET_IPCOMP is not set
174# CONFIG_INET_TUNNEL is not set
175# CONFIG_IP_TCPDIAG is not set
176# CONFIG_IP_TCPDIAG_IPV6 is not set
177# CONFIG_TCP_CONG_ADVANCED is not set
178CONFIG_TCP_CONG_BIC=y
179# CONFIG_IPV6 is not set
180# CONFIG_NETFILTER is not set
181
182#
183# SCTP Configuration (EXPERIMENTAL)
184#
185# CONFIG_IP_SCTP is not set
186# CONFIG_ATM is not set
187# CONFIG_BRIDGE is not set
188# CONFIG_VLAN_8021Q is not set
189# CONFIG_DECNET is not set
190# CONFIG_LLC2 is not set
191# CONFIG_IPX is not set
192# CONFIG_ATALK is not set
193# CONFIG_X25 is not set
194# CONFIG_LAPB is not set
195# CONFIG_NET_DIVERT is not set
196# CONFIG_ECONET is not set
197# CONFIG_WAN_ROUTER is not set
198# CONFIG_NET_SCHED is not set
199# CONFIG_NET_CLS_ROUTE is not set
200
201#
202# Network testing
203#
204# CONFIG_NET_PKTGEN is not set
205# CONFIG_HAMRADIO is not set
206# CONFIG_IRDA is not set
207# CONFIG_BT is not set
208
209#
210# Device Drivers
211#
212
213#
214# Generic Driver Options
215#
216CONFIG_STANDALONE=y
217CONFIG_PREVENT_FIRMWARE_BUILD=y
218# CONFIG_FW_LOADER is not set
219
220#
103# Memory Technology Devices (MTD) 221# Memory Technology Devices (MTD)
104# 222#
105CONFIG_MTD=y 223CONFIG_MTD=y
106# CONFIG_MTD_DEBUG is not set 224# CONFIG_MTD_DEBUG is not set
107CONFIG_MTD_PARTITIONS=y
108# CONFIG_MTD_CONCAT is not set 225# CONFIG_MTD_CONCAT is not set
226CONFIG_MTD_PARTITIONS=y
109# CONFIG_MTD_REDBOOT_PARTS is not set 227# CONFIG_MTD_REDBOOT_PARTS is not set
110# CONFIG_MTD_CMDLINE_PARTS is not set 228# CONFIG_MTD_CMDLINE_PARTS is not set
111 229
@@ -116,35 +234,50 @@ CONFIG_MTD_CHAR=y
116CONFIG_MTD_BLOCK=y 234CONFIG_MTD_BLOCK=y
117# CONFIG_FTL is not set 235# CONFIG_FTL is not set
118# CONFIG_NFTL is not set 236# CONFIG_NFTL is not set
237# CONFIG_INFTL is not set
119 238
120# 239#
121# RAM/ROM/Flash chip drivers 240# RAM/ROM/Flash chip drivers
122# 241#
123# CONFIG_MTD_CFI is not set 242# CONFIG_MTD_CFI is not set
124# CONFIG_MTD_JEDECPROBE is not set 243# CONFIG_MTD_JEDECPROBE is not set
244CONFIG_MTD_MAP_BANK_WIDTH_1=y
245CONFIG_MTD_MAP_BANK_WIDTH_2=y
246CONFIG_MTD_MAP_BANK_WIDTH_4=y
247# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
248# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
249# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
250CONFIG_MTD_CFI_I1=y
251CONFIG_MTD_CFI_I2=y
252# CONFIG_MTD_CFI_I4 is not set
253# CONFIG_MTD_CFI_I8 is not set
125CONFIG_MTD_RAM=y 254CONFIG_MTD_RAM=y
126# CONFIG_MTD_ROM is not set 255# CONFIG_MTD_ROM is not set
127# CONFIG_MTD_ABSENT is not set 256# CONFIG_MTD_ABSENT is not set
128# CONFIG_MTD_OBSOLETE_CHIPS is not set
129 257
130# 258#
131# Mapping drivers for chip access 259# Mapping drivers for chip access
132# 260#
261# CONFIG_MTD_COMPLEX_MAPPINGS is not set
133CONFIG_MTD_UCLINUX=y 262CONFIG_MTD_UCLINUX=y
263# CONFIG_MTD_SNAPGEARuC is not set
264# CONFIG_MTD_PLATRAM is not set
134 265
135# 266#
136# Self-contained MTD device drivers 267# Self-contained MTD device drivers
137# 268#
138# CONFIG_MTD_SLRAM is not set 269# CONFIG_MTD_SLRAM is not set
270# CONFIG_MTD_PHRAM is not set
139# CONFIG_MTD_MTDRAM is not set 271# CONFIG_MTD_MTDRAM is not set
140# CONFIG_MTD_BLKMTD is not set 272# CONFIG_MTD_BLKMTD is not set
273# CONFIG_MTD_BLOCK2MTD is not set
141 274
142# 275#
143# Disk-On-Chip Device Drivers 276# Disk-On-Chip Device Drivers
144# 277#
145# CONFIG_MTD_DOC1000 is not set
146# CONFIG_MTD_DOC2000 is not set 278# CONFIG_MTD_DOC2000 is not set
147# CONFIG_MTD_DOC2001 is not set 279# CONFIG_MTD_DOC2001 is not set
280# CONFIG_MTD_DOC2001PLUS is not set
148 281
149# 282#
150# NAND Flash Device Drivers 283# NAND Flash Device Drivers
@@ -159,21 +292,32 @@ CONFIG_MTD_UCLINUX=y
159# 292#
160# Plug and Play support 293# Plug and Play support
161# 294#
162# CONFIG_PNP is not set
163 295
164# 296#
165# Block devices 297# Block devices
166# 298#
167# CONFIG_BLK_DEV_FD is not set 299# CONFIG_BLK_DEV_FD is not set
300# CONFIG_BLK_DEV_COW_COMMON is not set
168# CONFIG_BLK_DEV_LOOP is not set 301# CONFIG_BLK_DEV_LOOP is not set
169# CONFIG_BLK_DEV_NBD is not set 302# CONFIG_BLK_DEV_NBD is not set
170CONFIG_BLK_DEV_RAM=y 303CONFIG_BLK_DEV_RAM=y
304CONFIG_BLK_DEV_RAM_COUNT=16
171CONFIG_BLK_DEV_RAM_SIZE=4096 305CONFIG_BLK_DEV_RAM_SIZE=4096
172# CONFIG_BLK_DEV_INITRD is not set 306# CONFIG_BLK_DEV_INITRD is not set
173# CONFIG_BLK_DEV_BLKMEM is not set 307CONFIG_INITRAMFS_SOURCE=""
308# CONFIG_CDROM_PKTCDVD is not set
174 309
175# 310#
176# ATA/IDE/MFM/RLL support 311# IO Schedulers
312#
313CONFIG_IOSCHED_NOOP=y
314# CONFIG_IOSCHED_AS is not set
315# CONFIG_IOSCHED_DEADLINE is not set
316# CONFIG_IOSCHED_CFQ is not set
317# CONFIG_ATA_OVER_ETH is not set
318
319#
320# ATA/ATAPI/MFM/RLL support
177# 321#
178# CONFIG_IDE is not set 322# CONFIG_IDE is not set
179 323
@@ -190,249 +334,230 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
190# 334#
191# Fusion MPT device support 335# Fusion MPT device support
192# 336#
337# CONFIG_FUSION is not set
193 338
194# 339#
195# I2O device support 340# IEEE 1394 (FireWire) support
196#
197
198#
199# Networking support
200#
201CONFIG_NET=y
202
203#
204# Networking options
205#
206CONFIG_PACKET=y
207# CONFIG_PACKET_MMAP is not set
208# CONFIG_NETLINK_DEV is not set
209# CONFIG_NETFILTER is not set
210# CONFIG_FILTER is not set
211CONFIG_UNIX=y
212# CONFIG_NET_KEY is not set
213CONFIG_INET=y
214# CONFIG_IP_MULTICAST is not set
215# CONFIG_IP_ADVANCED_ROUTER is not set
216# CONFIG_IP_PNP is not set
217# CONFIG_NET_IPIP is not set
218# CONFIG_NET_IPGRE is not set
219# CONFIG_ARPD is not set
220# CONFIG_INET_ECN is not set
221# CONFIG_SYN_COOKIES is not set
222# CONFIG_INET_AH is not set
223# CONFIG_INET_ESP is not set
224# CONFIG_XFRM_USER is not set
225# CONFIG_IPV6 is not set
226
227#
228# SCTP Configuration (EXPERIMENTAL)
229# 341#
230CONFIG_IPV6_SCTP__=y
231# CONFIG_IP_SCTP is not set
232# CONFIG_ATM is not set
233# CONFIG_VLAN_8021Q is not set
234# CONFIG_LLC is not set
235# CONFIG_DECNET is not set
236# CONFIG_BRIDGE is not set
237# CONFIG_X25 is not set
238# CONFIG_LAPB is not set
239# CONFIG_NET_DIVERT is not set
240# CONFIG_ECONET is not set
241# CONFIG_WAN_ROUTER is not set
242# CONFIG_NET_HW_FLOWCONTROL is not set
243 342
244# 343#
245# QoS and/or fair queueing 344# I2O device support
246# 345#
247# CONFIG_NET_SCHED is not set
248 346
249# 347#
250# Network testing 348# Network device support
251# 349#
252# CONFIG_NET_PKTGEN is not set
253CONFIG_NETDEVICES=y 350CONFIG_NETDEVICES=y
254# CONFIG_DUMMY is not set 351# CONFIG_DUMMY is not set
255# CONFIG_BONDING is not set 352# CONFIG_BONDING is not set
256# CONFIG_EQUALIZER is not set 353# CONFIG_EQUALIZER is not set
257# CONFIG_TUN is not set 354# CONFIG_TUN is not set
258# CONFIG_ETHERTAP is not set
259 355
260# 356#
261# Ethernet (10 or 100Mbit) 357# Ethernet (10 or 100Mbit)
262# 358#
263CONFIG_NET_ETHERNET=y 359CONFIG_NET_ETHERNET=y
264# CONFIG_MII is not set 360# CONFIG_MII is not set
361# CONFIG_NET_VENDOR_SMC is not set
362# CONFIG_NE2000 is not set
363# CONFIG_NET_PCI is not set
265CONFIG_FEC=y 364CONFIG_FEC=y
365# CONFIG_FEC2 is not set
266 366
267# 367#
268# Ethernet (1000 Mbit) 368# Ethernet (1000 Mbit)
269# 369#
370
371#
372# Ethernet (10000 Mbit)
373#
374
375#
376# Token Ring devices
377#
378
379#
380# Wireless LAN (non-hamradio)
381#
382# CONFIG_NET_RADIO is not set
383
384#
385# Wan interfaces
386#
387# CONFIG_WAN is not set
270CONFIG_PPP=y 388CONFIG_PPP=y
271# CONFIG_PPP_MULTILINK is not set 389# CONFIG_PPP_MULTILINK is not set
390# CONFIG_PPP_FILTER is not set
272# CONFIG_PPP_ASYNC is not set 391# CONFIG_PPP_ASYNC is not set
273# CONFIG_PPP_SYNC_TTY is not set 392# CONFIG_PPP_SYNC_TTY is not set
274# CONFIG_PPP_DEFLATE is not set 393# CONFIG_PPP_DEFLATE is not set
275# CONFIG_PPP_BSDCOMP is not set 394# CONFIG_PPP_BSDCOMP is not set
276# CONFIG_PPPOE is not set 395# CONFIG_PPPOE is not set
277# CONFIG_SLIP is not set 396# CONFIG_SLIP is not set
397# CONFIG_SHAPER is not set
398# CONFIG_NETCONSOLE is not set
399# CONFIG_NETPOLL is not set
400# CONFIG_NET_POLL_CONTROLLER is not set
278 401
279# 402#
280# Wireless LAN (non-hamradio) 403# ISDN subsystem
281# 404#
282# CONFIG_NET_RADIO is not set 405# CONFIG_ISDN is not set
283 406
284# 407#
285# Token Ring devices (depends on LLC=y) 408# Telephony Support
286# 409#
287# CONFIG_SHAPER is not set 410# CONFIG_PHONE is not set
288 411
289# 412#
290# Wan interfaces 413# Input device support
291# 414#
292# CONFIG_WAN is not set 415# CONFIG_INPUT is not set
293 416
294# 417#
295# Amateur Radio support 418# Hardware I/O ports
296# 419#
297# CONFIG_HAMRADIO is not set 420# CONFIG_SERIO is not set
421# CONFIG_GAMEPORT is not set
298 422
299# 423#
300# IrDA (infrared) support 424# Character devices
301# 425#
302# CONFIG_IRDA is not set 426# CONFIG_VT is not set
427# CONFIG_SERIAL_NONSTANDARD is not set
428# CONFIG_LEDMAN is not set
429# CONFIG_RESETSWITCH is not set
303 430
304# 431#
305# ISDN subsystem 432# Serial drivers
306# 433#
307# CONFIG_ISDN_BOOL is not set 434# CONFIG_SERIAL_8250 is not set
308 435
309# 436#
310# Telephony Support 437# Non-8250 serial port support
311# 438#
312# CONFIG_PHONE is not set 439CONFIG_SERIAL_COLDFIRE=y
440# CONFIG_UNIX98_PTYS is not set
441CONFIG_LEGACY_PTYS=y
442CONFIG_LEGACY_PTY_COUNT=256
313 443
314# 444#
315# Input device support 445# IPMI
316# 446#
317CONFIG_INPUT=y 447# CONFIG_IPMI_HANDLER is not set
318 448
319# 449#
320# Userland interfaces 450# Watchdog Cards
321# 451#
322CONFIG_INPUT_MOUSEDEV=y 452# CONFIG_WATCHDOG is not set
323CONFIG_INPUT_MOUSEDEV_PSAUX=y 453# CONFIG_MCFWATCHDOG is not set
324CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 454# CONFIG_RTC is not set
325CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 455# CONFIG_GEN_RTC is not set
326# CONFIG_INPUT_JOYDEV is not set 456# CONFIG_DTLK is not set
327# CONFIG_INPUT_TSDEV is not set 457# CONFIG_R3964 is not set
328# CONFIG_INPUT_EVDEV is not set
329# CONFIG_INPUT_EVBUG is not set
330 458
331# 459#
332# Input I/O drivers 460# Ftape, the floppy tape device driver
333# 461#
334# CONFIG_GAMEPORT is not set 462# CONFIG_RAW_DRIVER is not set
335CONFIG_SOUND_GAMEPORT=y
336CONFIG_SERIO=y
337CONFIG_SERIO_I8042=y
338CONFIG_SERIO_SERPORT=y
339# CONFIG_SERIO_CT82C710 is not set
340 463
341# 464#
342# Input Device Drivers 465# TPM devices
343# 466#
344CONFIG_INPUT_KEYBOARD=y 467# CONFIG_MCF_QSPI is not set
345CONFIG_KEYBOARD_ATKBD=y 468# CONFIG_M41T11M6 is not set
346# CONFIG_KEYBOARD_SUNKBD is not set
347# CONFIG_KEYBOARD_XTKBD is not set
348# CONFIG_KEYBOARD_NEWTON is not set
349CONFIG_INPUT_MOUSE=y
350CONFIG_MOUSE_PS2=y
351# CONFIG_MOUSE_SERIAL is not set
352# CONFIG_INPUT_JOYSTICK is not set
353# CONFIG_INPUT_TOUCHSCREEN is not set
354# CONFIG_INPUT_MISC is not set
355 469
356# 470#
357# Character devices 471# I2C support
358# 472#
359# CONFIG_VT is not set 473# CONFIG_I2C is not set
360# CONFIG_SERIAL_NONSTANDARD is not set 474# CONFIG_I2C_SENSOR is not set
361# CONFIG_RESETSWITCH is not set
362 475
363# 476#
364# Serial drivers 477# Dallas's 1-wire bus
365# 478#
366# CONFIG_SERIAL_8250 is not set 479# CONFIG_W1 is not set
367 480
368# 481#
369# Non-8250 serial port support 482# Hardware Monitoring support
370# 483#
371CONFIG_SERIAL_COLDFIRE=y 484# CONFIG_HWMON is not set
372# CONFIG_UNIX98_PTYS is not set
373 485
374# 486#
375# I2C support 487# Misc devices
376# 488#
377# CONFIG_I2C is not set
378 489
379# 490#
380# I2C Hardware Sensors Mainboard support 491# Multimedia devices
381# 492#
493# CONFIG_VIDEO_DEV is not set
382 494
383# 495#
384# I2C Hardware Sensors Chip support 496# Digital Video Broadcasting Devices
385# 497#
498# CONFIG_DVB is not set
386 499
387# 500#
388# Mice 501# Graphics support
389# 502#
390# CONFIG_BUSMOUSE is not set 503# CONFIG_FB is not set
391# CONFIG_QIC02_TAPE is not set
392 504
393# 505#
394# IPMI 506# SPI support
395# 507#
396# CONFIG_IPMI_HANDLER is not set 508# CONFIG_SPI is not set
397 509
398# 510#
399# Watchdog Cards 511# Sound
400# 512#
401# CONFIG_WATCHDOG is not set 513# CONFIG_SOUND is not set
402# CONFIG_NVRAM is not set
403# CONFIG_RTC is not set
404# CONFIG_GEN_RTC is not set
405# CONFIG_DTLK is not set
406# CONFIG_R3964 is not set
407# CONFIG_APPLICOM is not set
408 514
409# 515#
410# Ftape, the floppy tape device driver 516# USB support
411# 517#
412# CONFIG_FTAPE is not set 518# CONFIG_USB_ARCH_HAS_HCD is not set
413# CONFIG_AGP is not set 519# CONFIG_USB_ARCH_HAS_OHCI is not set
414# CONFIG_DRM is not set
415# CONFIG_RAW_DRIVER is not set
416# CONFIG_HANGCHECK_TIMER is not set
417 520
418# 521#
419# Multimedia devices 522# USB Gadget Support
523#
524# CONFIG_USB_GADGET is not set
525
526#
527# MMC/SD Card support
528#
529# CONFIG_MMC is not set
530
531#
532# InfiniBand support
533#
534
535#
536# SN Devices
420# 537#
421# CONFIG_VIDEO_DEV is not set
422 538
423# 539#
424# File systems 540# File systems
425# 541#
426CONFIG_EXT2_FS=y 542CONFIG_EXT2_FS=y
427# CONFIG_EXT2_FS_XATTR is not set 543# CONFIG_EXT2_FS_XATTR is not set
544# CONFIG_EXT2_FS_XIP is not set
428# CONFIG_EXT3_FS is not set 545# CONFIG_EXT3_FS is not set
429# CONFIG_JBD is not set 546# CONFIG_JBD is not set
430# CONFIG_REISERFS_FS is not set 547# CONFIG_REISERFS_FS is not set
431# CONFIG_JFS_FS is not set 548# CONFIG_JFS_FS is not set
549# CONFIG_FS_POSIX_ACL is not set
550
551#
552# XFS support
553#
432# CONFIG_XFS_FS is not set 554# CONFIG_XFS_FS is not set
433# CONFIG_MINIX_FS is not set 555# CONFIG_MINIX_FS is not set
434CONFIG_ROMFS_FS=y 556CONFIG_ROMFS_FS=y
557CONFIG_MAGIC_ROM_PTR=y
558# CONFIG_INOTIFY is not set
435# CONFIG_QUOTA is not set 559# CONFIG_QUOTA is not set
560# CONFIG_DNOTIFY is not set
436# CONFIG_AUTOFS_FS is not set 561# CONFIG_AUTOFS_FS is not set
437# CONFIG_AUTOFS4_FS is not set 562# CONFIG_AUTOFS4_FS is not set
438 563
@@ -445,15 +570,17 @@ CONFIG_ROMFS_FS=y
445# 570#
446# DOS/FAT/NT Filesystems 571# DOS/FAT/NT Filesystems
447# 572#
448# CONFIG_FAT_FS is not set 573# CONFIG_MSDOS_FS is not set
574# CONFIG_VFAT_FS is not set
449# CONFIG_NTFS_FS is not set 575# CONFIG_NTFS_FS is not set
450 576
451# 577#
452# Pseudo filesystems 578# Pseudo filesystems
453# 579#
454CONFIG_PROC_FS=y 580CONFIG_PROC_FS=y
455# CONFIG_DEVFS_FS is not set 581CONFIG_SYSFS=y
456# CONFIG_TMPFS is not set 582# CONFIG_TMPFS is not set
583# CONFIG_HUGETLB_PAGE is not set
457CONFIG_RAMFS=y 584CONFIG_RAMFS=y
458 585
459# 586#
@@ -462,6 +589,7 @@ CONFIG_RAMFS=y
462# CONFIG_ADFS_FS is not set 589# CONFIG_ADFS_FS is not set
463# CONFIG_AFFS_FS is not set 590# CONFIG_AFFS_FS is not set
464# CONFIG_HFS_FS is not set 591# CONFIG_HFS_FS is not set
592# CONFIG_HFSPLUS_FS is not set
465# CONFIG_BEFS_FS is not set 593# CONFIG_BEFS_FS is not set
466# CONFIG_BFS_FS is not set 594# CONFIG_BFS_FS is not set
467# CONFIG_EFS_FS is not set 595# CONFIG_EFS_FS is not set
@@ -479,12 +607,10 @@ CONFIG_RAMFS=y
479# 607#
480# CONFIG_NFS_FS is not set 608# CONFIG_NFS_FS is not set
481# CONFIG_NFSD is not set 609# CONFIG_NFSD is not set
482# CONFIG_EXPORTFS is not set
483# CONFIG_SMB_FS is not set 610# CONFIG_SMB_FS is not set
484# CONFIG_CIFS is not set 611# CONFIG_CIFS is not set
485# CONFIG_NCP_FS is not set 612# CONFIG_NCP_FS is not set
486# CONFIG_CODA_FS is not set 613# CONFIG_CODA_FS is not set
487# CONFIG_INTERMEZZO_FS is not set
488# CONFIG_AFS_FS is not set 614# CONFIG_AFS_FS is not set
489 615
490# 616#
@@ -494,30 +620,19 @@ CONFIG_RAMFS=y
494CONFIG_MSDOS_PARTITION=y 620CONFIG_MSDOS_PARTITION=y
495 621
496# 622#
497# Graphics support 623# Native Language Support
498#
499# CONFIG_FB is not set
500
501#
502# Sound
503#
504# CONFIG_SOUND is not set
505
506#
507# USB support
508#
509
510#
511# Bluetooth support
512# 624#
513# CONFIG_BT is not set 625# CONFIG_NLS is not set
514 626
515# 627#
516# Kernel hacking 628# Kernel hacking
517# 629#
630# CONFIG_PRINTK_TIME is not set
631# CONFIG_DEBUG_KERNEL is not set
632CONFIG_LOG_BUF_SHIFT=14
518# CONFIG_FULLDEBUG is not set 633# CONFIG_FULLDEBUG is not set
519# CONFIG_MAGIC_SYSRQ is not set
520# CONFIG_HIGHPROFILE is not set 634# CONFIG_HIGHPROFILE is not set
635# CONFIG_BOOTPARAM is not set
521# CONFIG_DUMPTOFLASH is not set 636# CONFIG_DUMPTOFLASH is not set
522# CONFIG_NO_KERNEL_MSG is not set 637# CONFIG_NO_KERNEL_MSG is not set
523# CONFIG_BDM_DISABLE is not set 638# CONFIG_BDM_DISABLE is not set
@@ -525,6 +640,7 @@ CONFIG_MSDOS_PARTITION=y
525# 640#
526# Security options 641# Security options
527# 642#
643# CONFIG_KEYS is not set
528# CONFIG_SECURITY is not set 644# CONFIG_SECURITY is not set
529 645
530# 646#
@@ -533,6 +649,12 @@ CONFIG_MSDOS_PARTITION=y
533# CONFIG_CRYPTO is not set 649# CONFIG_CRYPTO is not set
534 650
535# 651#
652# Hardware crypto devices
653#
654
655#
536# Library routines 656# Library routines
537# 657#
658# CONFIG_CRC_CCITT is not set
538# CONFIG_CRC32 is not set 659# CONFIG_CRC32 is not set
660# CONFIG_LIBCRC32C is not set
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index 557238596dcb..a220345e9746 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -6,7 +6,7 @@
6 * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com} 6 * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
7 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com> 7 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
8 * Copyright (C) 1995 Hamish Macdonald 8 * Copyright (C) 1995 Hamish Macdonald
9 * Copyright (C) 2000 Lineo Inc. (www.lineo.com) 9 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
10 * Copyright (C) 2001 Lineo, Inc. <www.lineo.com> 10 * Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
11 * 11 *
12 * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca> 12 * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca>
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/fs.h> 24#include <linux/fs.h>
25#include <linux/fb.h> 25#include <linux/fb.h>
26#include <linux/module.h>
26#include <linux/console.h> 27#include <linux/console.h>
27#include <linux/genhd.h> 28#include <linux/genhd.h>
28#include <linux/errno.h> 29#include <linux/errno.h>
@@ -45,6 +46,9 @@ unsigned long rom_length;
45unsigned long memory_start; 46unsigned long memory_start;
46unsigned long memory_end; 47unsigned long memory_end;
47 48
49EXPORT_SYMBOL(memory_start);
50EXPORT_SYMBOL(memory_end);
51
48char command_line[COMMAND_LINE_SIZE]; 52char command_line[COMMAND_LINE_SIZE];
49 53
50/* setup some dummy routines */ 54/* setup some dummy routines */
@@ -103,15 +107,21 @@ void (*mach_power_off)( void ) = NULL;
103#if defined(CONFIG_M5206e) 107#if defined(CONFIG_M5206e)
104 #define CPU "COLDFIRE(m5206e)" 108 #define CPU "COLDFIRE(m5206e)"
105#endif 109#endif
110#if defined(CONFIG_M523x)
111 #define CPU "COLDFIRE(m523x)"
112#endif
106#if defined(CONFIG_M5249) 113#if defined(CONFIG_M5249)
107 #define CPU "COLDFIRE(m5249)" 114 #define CPU "COLDFIRE(m5249)"
108#endif 115#endif
109#if defined(CONFIG_M527x) 116#if defined(CONFIG_M5271)
110 #define CPU "COLDFIRE(m5270/5271/5274/5275)" 117 #define CPU "COLDFIRE(m5270/5271)"
111#endif 118#endif
112#if defined(CONFIG_M5272) 119#if defined(CONFIG_M5272)
113 #define CPU "COLDFIRE(m5272)" 120 #define CPU "COLDFIRE(m5272)"
114#endif 121#endif
122#if defined(CONFIG_M5275)
123 #define CPU "COLDFIRE(m5274/5275)"
124#endif
115#if defined(CONFIG_M528x) 125#if defined(CONFIG_M528x)
116 #define CPU "COLDFIRE(m5280/5282)" 126 #define CPU "COLDFIRE(m5280/5282)"
117#endif 127#endif
@@ -152,7 +162,7 @@ void setup_arch(char **cmdline_p)
152 init_mm.start_code = (unsigned long) &_stext; 162 init_mm.start_code = (unsigned long) &_stext;
153 init_mm.end_code = (unsigned long) &_etext; 163 init_mm.end_code = (unsigned long) &_etext;
154 init_mm.end_data = (unsigned long) &_edata; 164 init_mm.end_data = (unsigned long) &_edata;
155 init_mm.brk = (unsigned long) 0; 165 init_mm.brk = (unsigned long) 0;
156 166
157 config_BSP(&command_line[0], sizeof(command_line)); 167 config_BSP(&command_line[0], sizeof(command_line));
158 168
@@ -171,7 +181,7 @@ void setup_arch(char **cmdline_p)
171#endif 181#endif
172#ifdef CONFIG_ELITE 182#ifdef CONFIG_ELITE
173 printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n"); 183 printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
174#endif 184#endif
175#ifdef CONFIG_TELOS 185#ifdef CONFIG_TELOS
176 printk(KERN_INFO "Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n"); 186 printk(KERN_INFO "Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n");
177#endif 187#endif
@@ -200,6 +210,9 @@ void setup_arch(char **cmdline_p)
200#ifdef CONFIG_DRAGEN2 210#ifdef CONFIG_DRAGEN2
201 printk(KERN_INFO "DragonEngine II board support by Georges Menie\n"); 211 printk(KERN_INFO "DragonEngine II board support by Georges Menie\n");
202#endif 212#endif
213#ifdef CONFIG_M5235EVB
214 printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)");
215#endif
203 216
204#ifdef DEBUG 217#ifdef DEBUG
205 printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " 218 printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
@@ -223,7 +236,7 @@ void setup_arch(char **cmdline_p)
223 saved_command_line[COMMAND_LINE_SIZE-1] = 0; 236 saved_command_line[COMMAND_LINE_SIZE-1] = 0;
224 237
225#ifdef DEBUG 238#ifdef DEBUG
226 if (strlen(*cmdline_p)) 239 if (strlen(*cmdline_p))
227 printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p); 240 printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
228#endif 241#endif
229 242
diff --git a/arch/m68knommu/kernel/traps.c b/arch/m68knommu/kernel/traps.c
index ad7dc6347f19..5bc068462864 100644
--- a/arch/m68knommu/kernel/traps.c
+++ b/arch/m68knommu/kernel/traps.c
@@ -21,6 +21,7 @@
21#include <linux/signal.h> 21#include <linux/signal.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/module.h>
24#include <linux/types.h> 25#include <linux/types.h>
25#include <linux/a.out.h> 26#include <linux/a.out.h>
26#include <linux/user.h> 27#include <linux/user.h>
@@ -38,7 +39,7 @@
38#include <asm/machdep.h> 39#include <asm/machdep.h>
39#include <asm/siginfo.h> 40#include <asm/siginfo.h>
40 41
41static char *vec_names[] = { 42static char const * const vec_names[] = {
42 "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR", 43 "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
43 "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc", 44 "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
44 "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111", 45 "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
@@ -106,17 +107,20 @@ asmlinkage void buserr_c(struct frame *fp)
106 107
107int kstack_depth_to_print = 48; 108int kstack_depth_to_print = 48;
108 109
109void show_stack(struct task_struct *task, unsigned long *esp) 110void show_stack(struct task_struct *task, unsigned long *stack)
110{ 111{
111 unsigned long *stack, *endstack, addr; 112 unsigned long *endstack, addr;
112 extern char _start, _etext; 113 extern char _start, _etext;
113 int i; 114 int i;
114 115
115 if (esp == NULL) 116 if (!stack) {
116 esp = (unsigned long *) &esp; 117 if (task)
118 stack = (unsigned long *)task->thread.ksp;
119 else
120 stack = (unsigned long *)&stack;
121 }
117 122
118 stack = esp; 123 addr = (unsigned long) stack;
119 addr = (unsigned long) esp;
120 endstack = (unsigned long *) PAGE_ALIGN(addr); 124 endstack = (unsigned long *) PAGE_ALIGN(addr);
121 125
122 printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack); 126 printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack);
@@ -306,6 +310,8 @@ void dump_stack(void)
306 show_stack(current, &stack); 310 show_stack(current, &stack);
307} 311}
308 312
313EXPORT_SYMBOL(dump_stack);
314
309#ifdef CONFIG_M68KFPU_EMU 315#ifdef CONFIG_M68KFPU_EMU
310asmlinkage void fpemu_signal(int signal, int code, void *addr) 316asmlinkage void fpemu_signal(int signal, int code, void *addr)
311{ 317{
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index 31cb12892da5..47f06787190d 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -107,7 +107,7 @@
107 */ 107 */
108#if defined(CONFIG_ELITE) 108#if defined(CONFIG_ELITE)
109#define RAM_START 0x30020000 109#define RAM_START 0x30020000
110#define RAM_END 0xe0000 110#define RAM_LENGTH 0xe0000
111#endif 111#endif
112 112
113/* 113/*
@@ -118,7 +118,8 @@
118#if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \ 118#if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \
119 defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \ 119 defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \
120 defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \ 120 defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \
121 defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) 121 defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) || \
122 defined(CONFIG_M5235EVB)
122#define RAM_START 0x20000 123#define RAM_START 0x20000
123#define RAM_LENGTH 0x3e0000 124#define RAM_LENGTH 0x3e0000
124#endif 125#endif
@@ -145,6 +146,16 @@
145#define RAM_LENGTH 0x3f0000 146#define RAM_LENGTH 0x3f0000
146#endif 147#endif
147 148
149
150/*
151 * The EMAC SoM-5282EM module.
152 */
153#if defined(CONFIG_SOM5282EM)
154#define RAM_START 0x10000
155#define RAM_LENGTH 0xff0000
156#endif
157
158
148/* 159/*
149 * These flash boot boards use all of ram for operation. Again the 160 * These flash boot boards use all of ram for operation. Again the
150 * actual memory size is not important here, assume at least 4MiB. 161 * actual memory size is not important here, assume at least 4MiB.
@@ -158,7 +169,7 @@
158#endif 169#endif
159 170
160/* 171/*
161 * Sneha Boards mimimun memmory 172 * Sneha Boards mimimun memory
162 * The end of RAM will vary depending on how much ram is fitted, 173 * The end of RAM will vary depending on how much ram is fitted,
163 * but this isn't important here, we assume at least 4MiB. 174 * but this isn't important here, we assume at least 4MiB.
164 */ 175 */
@@ -167,6 +178,12 @@
167#define RAM_LENGTH 0x3e0000 178#define RAM_LENGTH 0x3e0000
168#endif 179#endif
169 180
181#if defined(CONFIG_MOD5272)
182#define RAM_START 0x02000000
183#define RAM_LENGTH 0x00800000
184#define RAMVEC_START 0x20000000
185#define RAMVEC_LENGTH 0x00000400
186#endif
170 187
171#if defined(CONFIG_RAMKERNEL) 188#if defined(CONFIG_RAMKERNEL)
172#define TEXT ram 189#define TEXT ram
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
new file mode 100644
index 000000000000..22767ce506e0
--- /dev/null
+++ b/arch/m68knommu/platform/523x/config.c
@@ -0,0 +1,82 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/523x/config.c
5 *
6 * Sub-architcture dependant initialization code for the Freescale
7 * 523x CPUs.
8 *
9 * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/config.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/param.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <asm/dma.h>
22#include <asm/traps.h>
23#include <asm/machdep.h>
24#include <asm/coldfire.h>
25#include <asm/mcfsim.h>
26#include <asm/mcfdma.h>
27
28/***************************************************************************/
29
30void coldfire_pit_tick(void);
31void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
32unsigned long coldfire_pit_offset(void);
33void coldfire_trap_init(void);
34void coldfire_reset(void);
35
36/***************************************************************************/
37
38/*
39 * DMA channel base address table.
40 */
41unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
42 MCF_MBAR + MCFDMA_BASE0,
43};
44
45unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
46
47/***************************************************************************/
48
49void mcf_disableall(void)
50{
51 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
52 *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
53}
54
55/***************************************************************************/
56
57void mcf_autovector(unsigned int vec)
58{
59 /* Everything is auto-vectored on the 5272 */
60}
61
62/***************************************************************************/
63
64void config_BSP(char *commandp, int size)
65{
66 mcf_disableall();
67
68#ifdef CONFIG_BOOTPARAM
69 strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
70 commandp[size-1] = 0;
71#else
72 memset(commandp, 0, size);
73#endif
74
75 mach_sched_init = coldfire_pit_init;
76 mach_tick = coldfire_pit_tick;
77 mach_gettimeoffset = coldfire_pit_offset;
78 mach_trap_init = coldfire_trap_init;
79 mach_reset = coldfire_reset;
80}
81
82/***************************************************************************/
diff --git a/arch/m68knommu/platform/5307/head.S b/arch/m68knommu/platform/5307/head.S
index c7d7a395c4cc..7f4ba837901f 100644
--- a/arch/m68knommu/platform/5307/head.S
+++ b/arch/m68knommu/platform/5307/head.S
@@ -39,14 +39,18 @@
39 * Memory size exceptions for special cases. Some boards may be set 39 * Memory size exceptions for special cases. Some boards may be set
40 * for auto memory sizing, but we can't do it that way for some reason. 40 * for auto memory sizing, but we can't do it that way for some reason.
41 * For example the 5206eLITE board has static RAM, and auto-detecting 41 * For example the 5206eLITE board has static RAM, and auto-detecting
42 * the SDRAM will do you no good at all. 42 * the SDRAM will do you no good at all. Same goes for the MOD5272.
43 */ 43 */
44#ifdef CONFIG_RAMAUTO 44#ifdef CONFIG_RAMAUTO
45#if defined(CONFIG_M5206eLITE) 45#if defined(CONFIG_M5206eLITE)
46#define MEM_SIZE 0x00100000 /* 1MiB default memory */ 46#define MEM_SIZE 0x00100000 /* 1MiB default memory */
47#endif
48#if defined(CONFIG_MOD5272)
49#define MEM_SIZE 0x00800000 /* 8MiB default memory */
47#endif 50#endif
48#endif /* CONFIG_RAMAUTO */ 51#endif /* CONFIG_RAMAUTO */
49 52
53
50/* 54/*
51 * If we don't have a fixed memory size now, then lets build in code 55 * If we don't have a fixed memory size now, then lets build in code
52 * to auto detect the DRAM size. Obviously this is the prefered 56 * to auto detect the DRAM size. Obviously this is the prefered
@@ -100,11 +104,15 @@
100 104
101/* 105/*
102 * Most ColdFire boards have their DRAM starting at address 0. 106 * Most ColdFire boards have their DRAM starting at address 0.
103 * Notable exception is the 5206eLITE board. 107 * Notable exception is the 5206eLITE board, another is the MOD5272.
104 */ 108 */
105#if defined(CONFIG_M5206eLITE) 109#if defined(CONFIG_M5206eLITE)
106#define MEM_BASE 0x30000000 110#define MEM_BASE 0x30000000
107#endif 111#endif
112#if defined(CONFIG_MOD5272)
113#define MEM_BASE 0x02000000
114#define VBR_BASE 0x20000000 /* vectors in SRAM */
115#endif
108 116
109#ifndef MEM_BASE 117#ifndef MEM_BASE
110#define MEM_BASE 0x00000000 /* memory base at address 0 */ 118#define MEM_BASE 0x00000000 /* memory base at address 0 */
@@ -188,6 +196,7 @@ _start:
188 movel %a7,_rambase 196 movel %a7,_rambase
189 197
190 GET_MEM_SIZE /* macro code determines size */ 198 GET_MEM_SIZE /* macro code determines size */
199 addl %a7,%d0
191 movel %d0,_ramend /* set end ram addr */ 200 movel %d0,_ramend /* set end ram addr */
192 201
193 /* 202 /*
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S
index 0f5d1fe8eb5f..7d8990d784a2 100644
--- a/arch/m68knommu/platform/68328/entry.S
+++ b/arch/m68knommu/platform/68328/entry.S
@@ -79,7 +79,7 @@ ENTRY(system_call)
79 movel %sp@(PT_ORIG_D0),%d0 79 movel %sp@(PT_ORIG_D0),%d0
80 80
81 movel %sp,%d1 /* get thread_info pointer */ 81 movel %sp,%d1 /* get thread_info pointer */
82 andl #0xffffe000,%d1 82 andl #-THREAD_SIZE,%d1
83 movel %d1,%a2 83 movel %d1,%a2
84 btst #TIF_SYSCALL_TRACE,%a2@(TI_FLAGS) 84 btst #TIF_SYSCALL_TRACE,%a2@(TI_FLAGS)
85 jne do_trace 85 jne do_trace
@@ -105,7 +105,7 @@ Luser_return:
105 andw #ALLOWINT,%sr 105 andw #ALLOWINT,%sr
106 106
107 movel %sp,%d1 /* get thread_info pointer */ 107 movel %sp,%d1 /* get thread_info pointer */
108 andl #0xffffe000,%d1 108 andl #-THREAD_SIZE,%d1
109 movel %d1,%a2 109 movel %d1,%a2
110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ 110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
111 andl #_TIF_WORK_MASK,%d1 111 andl #_TIF_WORK_MASK,%d1
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S
index f7bc80a60e0f..8ff48adf24ab 100644
--- a/arch/m68knommu/platform/68360/entry.S
+++ b/arch/m68knommu/platform/68360/entry.S
@@ -96,7 +96,7 @@ Luser_return:
96 andw #ALLOWINT,%sr 96 andw #ALLOWINT,%sr
97 97
98 movel %sp,%d1 /* get thread_info pointer */ 98 movel %sp,%d1 /* get thread_info pointer */
99 andl #0xffffe000,%d1 99 andl #-THREAD_SIZE,%d1
100 movel %d1,%a2 100 movel %d1,%a2
101 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ 101 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
102 andl #_TIF_WORK_MASK,%d1 102 andl #_TIF_WORK_MASK,%d1
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 898de2df1fc7..d79fba0aa8bf 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -4,26 +4,46 @@ config MIPS
4 # Horrible source of confusion. Die, die, die ... 4 # Horrible source of confusion. Die, die, die ...
5 select EMBEDDED 5 select EMBEDDED
6 6
7config MIPS64 7mainmenu "Linux/MIPS Kernel Configuration"
8 bool "64-bit kernel"
9 help
10 Select this option if you want to build a 64-bit kernel. You should
11 only select this option if you have hardware that actually has a
12 64-bit processor and if your application will actually benefit from
13 64-bit processing, otherwise say N. You must say Y for kernels for
14 SGI IP27 (Origin 200 and 2000) and SGI IP32 (O2). If in doubt say N.
15 8
16config 64BIT 9source "init/Kconfig"
17 def_bool MIPS64
18 10
19config MIPS32 11config SYS_SUPPORTS_32BIT_KERNEL
12 bool
13config SYS_SUPPORTS_64BIT_KERNEL
14 bool
15config CPU_SUPPORTS_32BIT_KERNEL
16 bool
17config CPU_SUPPORTS_64BIT_KERNEL
20 bool 18 bool
21 depends on MIPS64 = 'n'
22 default y
23 19
24mainmenu "Linux/MIPS Kernel Configuration" 20menu "Kernel type"
25 21
26source "init/Kconfig" 22choice
23
24 prompt "Kernel code model"
25 help
26 You should only select this option if you have a workload that
27 actually benefits from 64-bit processing or if your machine has
28 large memory. You will only be presented a single option in this
29 menu if your system does not support both 32-bit and 64-bit kernels.
30
31config 32BIT
32 bool "32-bit kernel"
33 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
34 select TRAD_SIGNALS
35 help
36 Select this option if you want to build a 32-bit kernel.
37
38config 64BIT
39 bool "64-bit kernel"
40 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
41 help
42 Select this option if you want to build a 64-bit kernel.
43
44endchoice
45
46endmenu
27 47
28menu "Machine selection" 48menu "Machine selection"
29 49
@@ -34,6 +54,8 @@ config MACH_JAZZ
34 select GENERIC_ISA_DMA 54 select GENERIC_ISA_DMA
35 select I8259 55 select I8259
36 select ISA 56 select ISA
57 select SYS_SUPPORTS_32BIT_KERNEL
58 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
37 help 59 help
38 This a family of machines based on the MIPS R4030 chipset which was 60 This a family of machines based on the MIPS R4030 chipset which was
39 used by several vendors to build RISC/os and Windows NT workstations. 61 used by several vendors to build RISC/os and Windows NT workstations.
@@ -71,7 +93,9 @@ config OLIVETTI_M700
71 <http://www.linux-mips.org/>. 93 <http://www.linux-mips.org/>.
72 94
73config MACH_VR41XX 95config MACH_VR41XX
74 bool "Support for NEC VR41XX-based machines" 96 bool "Support for NEC VR4100 series based machines"
97 select SYS_SUPPORTS_32BIT_KERNEL
98 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
75 99
76config NEC_CMBVR4133 100config NEC_CMBVR4133
77 bool "Support for NEC CMB-VR4133" 101 bool "Support for NEC CMB-VR4133"
@@ -80,7 +104,6 @@ config NEC_CMBVR4133
80 select DMA_NONCOHERENT 104 select DMA_NONCOHERENT
81 select IRQ_CPU 105 select IRQ_CPU
82 select HW_HAS_PCI 106 select HW_HAS_PCI
83 select PCI_VR41XX
84 107
85config ROCKHOPPER 108config ROCKHOPPER
86 bool "Support for Rockhopper baseboard" 109 bool "Support for Rockhopper baseboard"
@@ -91,6 +114,7 @@ config ROCKHOPPER
91config CASIO_E55 114config CASIO_E55
92 bool "Support for CASIO CASSIOPEIA E-10/15/55/65" 115 bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
93 depends on MACH_VR41XX 116 depends on MACH_VR41XX
117 select CPU_LITTLE_ENDIAN
94 select DMA_NONCOHERENT 118 select DMA_NONCOHERENT
95 select IRQ_CPU 119 select IRQ_CPU
96 select ISA 120 select ISA
@@ -98,53 +122,54 @@ config CASIO_E55
98config IBM_WORKPAD 122config IBM_WORKPAD
99 bool "Support for IBM WorkPad z50" 123 bool "Support for IBM WorkPad z50"
100 depends on MACH_VR41XX 124 depends on MACH_VR41XX
125 select CPU_LITTLE_ENDIAN
101 select DMA_NONCOHERENT 126 select DMA_NONCOHERENT
102 select IRQ_CPU 127 select IRQ_CPU
103 select ISA 128 select ISA
104 129
105config TANBAC_TB0226 130config TANBAC_TB022X
106 bool "Support for TANBAC TB0226 (Mbase)" 131 bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
107 depends on MACH_VR41XX 132 depends on MACH_VR41XX
133 select CPU_LITTLE_ENDIAN
108 select DMA_NONCOHERENT 134 select DMA_NONCOHERENT
109 select HW_HAS_PCI
110 select IRQ_CPU 135 select IRQ_CPU
136 select HW_HAS_PCI
111 help 137 help
112 The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC. 138 The TANBAC VR4131 multichip module(TB0225) and
113 Please refer to <http://www.tanbac.co.jp/> about Mbase. 139 the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms
140 manufactured by TANBAC.
141 Please refer to <http://www.tanbac.co.jp/>
142 about VR4131 multichip module and VR4131DIMM.
114 143
115config TANBAC_TB0229 144config TANBAC_TB0226
116 bool "Support for TANBAC TB0229 (VR4131DIMM)" 145 bool "Support for TANBAC Mbase(TB0226)"
117 depends on MACH_VR41XX 146 depends on TANBAC_TB022X
118 select DMA_NONCOHERENT 147 select GPIO_VR41XX
119 select HW_HAS_PCI
120 select IRQ_CPU
121 help 148 help
122 The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC. 149 The TANBAC Mbase(TB0226) is a MIPS-based platform manufactured by TANBAC.
123 Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM. 150 Please refer to <http://www.tanbac.co.jp/> about Mbase.
124 151
125config VICTOR_MPC30X 152config VICTOR_MPC30X
126 bool "Support for Victor MP-C303/304" 153 bool "Support for Victor MP-C303/304"
154 depends on MACH_VR41XX
155 select CPU_LITTLE_ENDIAN
127 select DMA_NONCOHERENT 156 select DMA_NONCOHERENT
128 select HW_HAS_PCI
129 select IRQ_CPU 157 select IRQ_CPU
130 depends on MACH_VR41XX 158 select HW_HAS_PCI
131 159
132config ZAO_CAPCELLA 160config ZAO_CAPCELLA
133 bool "Support for ZAO Networks Capcella" 161 bool "Support for ZAO Networks Capcella"
134 depends on MACH_VR41XX 162 depends on MACH_VR41XX
163 select CPU_LITTLE_ENDIAN
135 select DMA_NONCOHERENT 164 select DMA_NONCOHERENT
136 select HW_HAS_PCI
137 select IRQ_CPU 165 select IRQ_CPU
166 select HW_HAS_PCI
138 167
139config PCI_VR41XX 168config PCI_VR41XX
140 bool "Add PCI control unit support of NEC VR4100 series" 169 bool "Add PCI control unit support of NEC VR4100 series"
141 depends on MACH_VR41XX && PCI 170 depends on MACH_VR41XX && HW_HAS_PCI
142 171 default y
143config VRC4171 172 select PCI
144 tristate "Add NEC VRC4171 companion chip support"
145 depends on MACH_VR41XX && ISA
146 ---help---
147 The NEC VRC4171/4171A is a companion chip for NEC VR4111/VR4121.
148 173
149config VRC4173 174config VRC4173
150 tristate "Add NEC VRC4173 companion chip support" 175 tristate "Add NEC VRC4173 companion chip support"
@@ -154,25 +179,28 @@ config VRC4173
154 179
155config TOSHIBA_JMR3927 180config TOSHIBA_JMR3927
156 bool "Support for Toshiba JMR-TX3927 board" 181 bool "Support for Toshiba JMR-TX3927 board"
157 depends on MIPS32
158 select DMA_NONCOHERENT 182 select DMA_NONCOHERENT
159 select HW_HAS_PCI 183 select HW_HAS_PCI
160 select SWAP_IO_SPACE 184 select SWAP_IO_SPACE
185 select SYS_SUPPORTS_32BIT_KERNEL
161 186
162config MIPS_COBALT 187config MIPS_COBALT
163 bool "Support for Cobalt Server (EXPERIMENTAL)" 188 bool "Support for Cobalt Server"
164 depends on EXPERIMENTAL 189 depends on EXPERIMENTAL
165 select DMA_NONCOHERENT 190 select DMA_NONCOHERENT
166 select HW_HAS_PCI 191 select HW_HAS_PCI
167 select I8259 192 select I8259
168 select IRQ_CPU 193 select IRQ_CPU
194 select SYS_SUPPORTS_32BIT_KERNEL
195 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
169 196
170config MACH_DECSTATION 197config MACH_DECSTATION
171 bool "Support for DECstations" 198 bool "Support for DECstations"
172 select BOOT_ELF32 199 select BOOT_ELF32
173 select DMA_NONCOHERENT 200 select DMA_NONCOHERENT
174 select IRQ_CPU 201 select IRQ_CPU
175 depends on MIPS32 || EXPERIMENTAL 202 select SYS_SUPPORTS_32BIT_KERNEL
203 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
176 ---help--- 204 ---help---
177 This enables support for DEC's MIPS based workstations. For details 205 This enables support for DEC's MIPS based workstations. For details
178 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 206 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
@@ -194,6 +222,8 @@ config MIPS_EV64120
194 select DMA_NONCOHERENT 222 select DMA_NONCOHERENT
195 select HW_HAS_PCI 223 select HW_HAS_PCI
196 select MIPS_GT64120 224 select MIPS_GT64120
225 select SYS_SUPPORTS_32BIT_KERNEL
226 select SYS_SUPPORTS_64BIT_KERNEL
197 help 227 help
198 This is an evaluation board based on the Galileo GT-64120 228 This is an evaluation board based on the Galileo GT-64120
199 single-chip system controller that contains a MIPS R5000 compatible 229 single-chip system controller that contains a MIPS R5000 compatible
@@ -214,6 +244,8 @@ config MIPS_EV96100
214 select MIPS_GT96100 244 select MIPS_GT96100
215 select RM7000_CPU_SCACHE 245 select RM7000_CPU_SCACHE
216 select SWAP_IO_SPACE 246 select SWAP_IO_SPACE
247 select SYS_SUPPORTS_32BIT_KERNEL
248 select SYS_SUPPORTS_64BIT_KERNEL
217 help 249 help
218 This is an evaluation board based on the Galileo GT-96100 LAN/WAN 250 This is an evaluation board based on the Galileo GT-96100 LAN/WAN
219 communications controllers containing a MIPS R5000 compatible core 251 communications controllers containing a MIPS R5000 compatible core
@@ -224,6 +256,8 @@ config MIPS_IVR
224 bool "Support for Globespan IVR board" 256 bool "Support for Globespan IVR board"
225 select DMA_NONCOHERENT 257 select DMA_NONCOHERENT
226 select HW_HAS_PCI 258 select HW_HAS_PCI
259 select SYS_SUPPORTS_32BIT_KERNEL
260 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
227 help 261 help
228 This is an evaluation board built by Globespan to showcase thir 262 This is an evaluation board built by Globespan to showcase thir
229 iVR (Internet Video Recorder) design. It utilizes a QED RM5231 263 iVR (Internet Video Recorder) design. It utilizes a QED RM5231
@@ -237,6 +271,8 @@ config LASAT
237 select HW_HAS_PCI 271 select HW_HAS_PCI
238 select MIPS_GT64120 272 select MIPS_GT64120
239 select R5000_CPU_SCACHE 273 select R5000_CPU_SCACHE
274 select SYS_SUPPORTS_32BIT_KERNEL
275 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
240 276
241config PICVUE 277config PICVUE
242 tristate "PICVUE LCD display driver" 278 tristate "PICVUE LCD display driver"
@@ -258,6 +294,8 @@ config MIPS_ITE8172
258 bool "Support for ITE 8172G board" 294 bool "Support for ITE 8172G board"
259 select DMA_NONCOHERENT 295 select DMA_NONCOHERENT
260 select HW_HAS_PCI 296 select HW_HAS_PCI
297 select SYS_SUPPORTS_32BIT_KERNEL
298 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
261 help 299 help
262 Ths is an evaluation board made by ITE <http://www.ite.com.tw/> 300 Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
263 with ATX form factor that utilizes a MIPS R5000 to work with its 301 with ATX form factor that utilizes a MIPS R5000 to work with its
@@ -281,6 +319,8 @@ config MIPS_ATLAS
281 select HW_HAS_PCI 319 select HW_HAS_PCI
282 select MIPS_GT64120 320 select MIPS_GT64120
283 select SWAP_IO_SPACE 321 select SWAP_IO_SPACE
322 select SYS_SUPPORTS_32BIT_KERNEL
323 select SYS_SUPPORTS_64BIT_KERNEL
284 help 324 help
285 This enables support for the QED R5231-based MIPS Atlas evaluation 325 This enables support for the QED R5231-based MIPS Atlas evaluation
286 board. 326 board.
@@ -295,6 +335,8 @@ config MIPS_MALTA
295 select I8259 335 select I8259
296 select MIPS_GT64120 336 select MIPS_GT64120
297 select SWAP_IO_SPACE 337 select SWAP_IO_SPACE
338 select SYS_SUPPORTS_32BIT_KERNEL
339 select SYS_SUPPORTS_64BIT_KERNEL
298 help 340 help
299 This enables support for the VR5000-based MIPS Malta evaluation 341 This enables support for the VR5000-based MIPS Malta evaluation
300 board. 342 board.
@@ -304,6 +346,8 @@ config MIPS_SEAD
304 depends on EXPERIMENTAL 346 depends on EXPERIMENTAL
305 select IRQ_CPU 347 select IRQ_CPU
306 select DMA_NONCOHERENT 348 select DMA_NONCOHERENT
349 select SYS_SUPPORTS_32BIT_KERNEL
350 select SYS_SUPPORTS_64BIT_KERNEL
307 351
308config MOMENCO_OCELOT 352config MOMENCO_OCELOT
309 bool "Support for Momentum Ocelot board" 353 bool "Support for Momentum Ocelot board"
@@ -314,6 +358,8 @@ config MOMENCO_OCELOT
314 select MIPS_GT64120 358 select MIPS_GT64120
315 select RM7000_CPU_SCACHE 359 select RM7000_CPU_SCACHE
316 select SWAP_IO_SPACE 360 select SWAP_IO_SPACE
361 select SYS_SUPPORTS_32BIT_KERNEL
362 select SYS_SUPPORTS_64BIT_KERNEL
317 help 363 help
318 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 364 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
319 Momentum Computer <http://www.momenco.com/>. 365 Momentum Computer <http://www.momenco.com/>.
@@ -327,6 +373,8 @@ config MOMENCO_OCELOT_G
327 select PCI_MARVELL 373 select PCI_MARVELL
328 select RM7000_CPU_SCACHE 374 select RM7000_CPU_SCACHE
329 select SWAP_IO_SPACE 375 select SWAP_IO_SPACE
376 select SYS_SUPPORTS_32BIT_KERNEL
377 select SYS_SUPPORTS_64BIT_KERNEL
330 help 378 help
331 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 379 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
332 Momentum Computer <http://www.momenco.com/>. 380 Momentum Computer <http://www.momenco.com/>.
@@ -340,6 +388,8 @@ config MOMENCO_OCELOT_C
340 select PCI_MARVELL 388 select PCI_MARVELL
341 select RM7000_CPU_SCACHE 389 select RM7000_CPU_SCACHE
342 select SWAP_IO_SPACE 390 select SWAP_IO_SPACE
391 select SYS_SUPPORTS_32BIT_KERNEL
392 select SYS_SUPPORTS_64BIT_KERNEL
343 help 393 help
344 The Ocelot is a MIPS-based Single Board Computer (SBC) made by 394 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
345 Momentum Computer <http://www.momenco.com/>. 395 Momentum Computer <http://www.momenco.com/>.
@@ -355,6 +405,8 @@ config MOMENCO_OCELOT_3
355 select PCI_MARVELL 405 select PCI_MARVELL
356 select RM7000_CPU_SCACHE 406 select RM7000_CPU_SCACHE
357 select SWAP_IO_SPACE 407 select SWAP_IO_SPACE
408 select SYS_SUPPORTS_32BIT_KERNEL
409 select SYS_SUPPORTS_64BIT_KERNEL
358 help 410 help
359 The Ocelot-3 is based off Discovery III System Controller and 411 The Ocelot-3 is based off Discovery III System Controller and
360 PMC-Sierra Rm79000 core. 412 PMC-Sierra Rm79000 core.
@@ -371,6 +423,8 @@ config MOMENCO_JAGUAR_ATX
371 select PCI_MARVELL 423 select PCI_MARVELL
372 select RM7000_CPU_SCACHE 424 select RM7000_CPU_SCACHE
373 select SWAP_IO_SPACE 425 select SWAP_IO_SPACE
426 select SYS_SUPPORTS_32BIT_KERNEL
427 select SYS_SUPPORTS_64BIT_KERNEL
374 help 428 help
375 The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by 429 The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
376 Momentum Computer <http://www.momenco.com/>. 430 Momentum Computer <http://www.momenco.com/>.
@@ -390,6 +444,8 @@ config PMC_YOSEMITE
390 select IRQ_CPU_RM7K 444 select IRQ_CPU_RM7K
391 select IRQ_CPU_RM9K 445 select IRQ_CPU_RM9K
392 select SWAP_IO_SPACE 446 select SWAP_IO_SPACE
447 select SYS_SUPPORTS_32BIT_KERNEL
448 select SYS_SUPPORTS_64BIT_KERNEL
393 help 449 help
394 Yosemite is an evaluation board for the RM9000x2 processor 450 Yosemite is an evaluation board for the RM9000x2 processor
395 manufactured by PMC-Sierra 451 manufactured by PMC-Sierra
@@ -407,6 +463,8 @@ config DDB5074
407 select IRQ_CPU 463 select IRQ_CPU
408 select I8259 464 select I8259
409 select ISA 465 select ISA
466 select SYS_SUPPORTS_32BIT_KERNEL
467 select SYS_SUPPORTS_64BIT_KERNEL
410 help 468 help
411 This enables support for the VR5000-based NEC DDB Vrc-5074 469 This enables support for the VR5000-based NEC DDB Vrc-5074
412 evaluation board. 470 evaluation board.
@@ -419,6 +477,8 @@ config DDB5476
419 select IRQ_CPU 477 select IRQ_CPU
420 select I8259 478 select I8259
421 select ISA 479 select ISA
480 select SYS_SUPPORTS_32BIT_KERNEL
481 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
422 help 482 help
423 This enables support for the R5432-based NEC DDB Vrc-5476 483 This enables support for the R5432-based NEC DDB Vrc-5476
424 evaluation board. 484 evaluation board.
@@ -433,6 +493,8 @@ config DDB5477
433 select HW_HAS_PCI 493 select HW_HAS_PCI
434 select I8259 494 select I8259
435 select IRQ_CPU 495 select IRQ_CPU
496 select SYS_SUPPORTS_32BIT_KERNEL
497 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
436 help 498 help
437 This enables support for the R5432-based NEC DDB Vrc-5477, 499 This enables support for the R5432-based NEC DDB Vrc-5477,
438 or Rockhopper/SolutionGear boards with R5432/R5500 CPUs. 500 or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
@@ -445,10 +507,23 @@ config DDB5477_BUS_FREQUENCY
445 depends on DDB5477 507 depends on DDB5477
446 default 0 508 default 0
447 509
448config NEC_OSPREY 510config QEMU
449 bool "Support for NEC Osprey board" 511 bool "Support for Qemu"
450 select DMA_NONCOHERENT 512 select DMA_COHERENT
451 select IRQ_CPU 513 select GENERIC_ISA_DMA
514 select HAVE_STD_PC_SERIAL_PORT
515 select I8259
516 select ISA
517 select SWAP_IO_SPACE
518 select SYS_SUPPORTS_32BIT_KERNEL
519 select SYS_SUPPORTS_BIG_ENDIAN
520 help
521 Qemu is a software emulator which among other architectures also
522 can simulate a MIPS32 4Kc system. This patch adds support for the
523 system architecture that currently is being simulated by Qemu. It
524 will eventually be removed again when Qemu has the capability to
525 simulate actual MIPS hardware platforms. More information on Qemu
526 can be found at http://www.linux-mips.org/wiki/Qemu.
452 527
453config SGI_IP22 528config SGI_IP22
454 bool "Support for SGI IP22 (Indy/Indigo2)" 529 bool "Support for SGI IP22 (Indy/Indigo2)"
@@ -459,6 +534,8 @@ config SGI_IP22
459 select IP22_CPU_SCACHE 534 select IP22_CPU_SCACHE
460 select IRQ_CPU 535 select IRQ_CPU
461 select SWAP_IO_SPACE 536 select SWAP_IO_SPACE
537 select SYS_SUPPORTS_32BIT_KERNEL
538 select SYS_SUPPORTS_64BIT_KERNEL
462 help 539 help
463 This are the SGI Indy, Challenge S and Indigo2, as well as certain 540 This are the SGI Indy, Challenge S and Indigo2, as well as certain
464 OEM variants like the Tandem CMN B006S. To compile a Linux kernel 541 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
@@ -466,12 +543,12 @@ config SGI_IP22
466 543
467config SGI_IP27 544config SGI_IP27
468 bool "Support for SGI IP27 (Origin200/2000)" 545 bool "Support for SGI IP27 (Origin200/2000)"
469 depends on MIPS64
470 select ARC 546 select ARC
471 select ARC64 547 select ARC64
472 select DMA_IP27 548 select DMA_IP27
473 select HW_HAS_PCI 549 select HW_HAS_PCI
474 select PCI_DOMAINS 550 select PCI_DOMAINS
551 select SYS_SUPPORTS_64BIT_KERNEL
475 help 552 help
476 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 553 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
477 workstations. To compile a Linux kernel that runs on these, say Y 554 workstations. To compile a Linux kernel that runs on these, say Y
@@ -534,7 +611,7 @@ config REPLICATE_EXHANDLERS
534 611
535config SGI_IP32 612config SGI_IP32
536 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" 613 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
537 depends on MIPS64 && EXPERIMENTAL 614 depends on EXPERIMENTAL
538 select ARC 615 select ARC
539 select ARC32 616 select ARC32
540 select BOOT_ELF32 617 select BOOT_ELF32
@@ -544,12 +621,13 @@ config SGI_IP32
544 select HW_HAS_PCI 621 select HW_HAS_PCI
545 select R5000_CPU_SCACHE 622 select R5000_CPU_SCACHE
546 select RM7000_CPU_SCACHE 623 select RM7000_CPU_SCACHE
624 select SYS_SUPPORTS_64BIT_KERNEL
547 help 625 help
548 If you want this kernel to run on SGI O2 workstation, say Y here. 626 If you want this kernel to run on SGI O2 workstation, say Y here.
549 627
550config SOC_AU1X00 628config SOC_AU1X00
551 depends on MIPS32
552 bool "Support for AMD/Alchemy Au1X00 SOCs" 629 bool "Support for AMD/Alchemy Au1X00 SOCs"
630 select SYS_SUPPORTS_32BIT_KERNEL
553 631
554choice 632choice
555 prompt "Au1X00 SOC Type" 633 prompt "Au1X00 SOC Type"
@@ -661,6 +739,8 @@ config SIBYTE_SB1xxx_SOC
661 select BOOT_ELF32 739 select BOOT_ELF32
662 select DMA_COHERENT 740 select DMA_COHERENT
663 select SWAP_IO_SPACE 741 select SWAP_IO_SPACE
742 select SYS_SUPPORTS_32BIT_KERNEL
743 select SYS_SUPPORTS_64BIT_KERNEL
664 744
665choice 745choice
666 prompt "BCM1xxx SOC-based board" 746 prompt "BCM1xxx SOC-based board"
@@ -880,6 +960,8 @@ config SNI_RM200_PCI
880 select HW_HAS_PCI 960 select HW_HAS_PCI
881 select I8259 961 select I8259
882 select ISA 962 select ISA
963 select SYS_SUPPORTS_32BIT_KERNEL
964 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
883 help 965 help
884 The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens 966 The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
885 Nixdorf Informationssysteme (SNI), parent company of Pyramid 967 Nixdorf Informationssysteme (SNI), parent company of Pyramid
@@ -888,13 +970,14 @@ config SNI_RM200_PCI
888 970
889config TOSHIBA_RBTX4927 971config TOSHIBA_RBTX4927
890 bool "Support for Toshiba TBTX49[23]7 board" 972 bool "Support for Toshiba TBTX49[23]7 board"
891 depends on MIPS32
892 select DMA_NONCOHERENT 973 select DMA_NONCOHERENT
893 select HAS_TXX9_SERIAL 974 select HAS_TXX9_SERIAL
894 select HW_HAS_PCI 975 select HW_HAS_PCI
895 select I8259 976 select I8259
896 select ISA 977 select ISA
897 select SWAP_IO_SPACE 978 select SWAP_IO_SPACE
979 select SYS_SUPPORTS_32BIT_KERNEL
980 select SYS_SUPPORTS_64BIT_KERNEL
898 help 981 help
899 This Toshiba board is based on the TX4927 processor. Say Y here to 982 This Toshiba board is based on the TX4927 processor. Say Y here to
900 support this machine type 983 support this machine type
@@ -926,13 +1009,21 @@ config ARC
926 depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61 1009 depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
927 default y 1010 default y
928 1011
929config DMA_COHERENT 1012config DMA_COHERENT
1013 bool
1014
1015config DMA_IP27
930 bool 1016 bool
931 1017
932config DMA_IP27 1018config DMA_IP32
933 bool 1019 bool
1020 select DMA_NEED_PCI_MAP_STATE
934 1021
935config DMA_NONCOHERENT 1022config DMA_NONCOHERENT
1023 bool
1024 select DMA_NEED_PCI_MAP_STATE
1025
1026config DMA_NEED_PCI_MAP_STATE
936 bool 1027 bool
937 1028
938config EARLY_PRINTK 1029config EARLY_PRINTK
@@ -974,7 +1065,7 @@ config MIPS_DISABLE_OBSOLETE_IDE
974 1065
975config CPU_LITTLE_ENDIAN 1066config CPU_LITTLE_ENDIAN
976 bool "Generate little endian code" 1067 bool "Generate little endian code"
977 default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA 1068 default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
978 default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927 1069 default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
979 help 1070 help
980 Some MIPS machines can be configured for either little or big endian 1071 Some MIPS machines can be configured for either little or big endian
@@ -1091,11 +1182,6 @@ config ARC32
1091config HAVE_STD_PC_SERIAL_PORT 1182config HAVE_STD_PC_SERIAL_PORT
1092 bool 1183 bool
1093 1184
1094config VR4181
1095 bool
1096 depends on NEC_OSPREY
1097 default y
1098
1099config ARC_CONSOLE 1185config ARC_CONSOLE
1100 bool "ARC console support" 1186 bool "ARC console support"
1101 depends on SGI_IP22 || SNI_RM200_PCI 1187 depends on SGI_IP22 || SNI_RM200_PCI
@@ -1145,13 +1231,16 @@ choice
1145 1231
1146config CPU_MIPS32 1232config CPU_MIPS32
1147 bool "MIPS32" 1233 bool "MIPS32"
1234 select CPU_SUPPORTS_32BIT_KERNEL
1148 1235
1149config CPU_MIPS64 1236config CPU_MIPS64
1150 bool "MIPS64" 1237 bool "MIPS64"
1238 select CPU_SUPPORTS_32BIT_KERNEL
1239 select CPU_SUPPORTS_64BIT_KERNEL
1151 1240
1152config CPU_R3000 1241config CPU_R3000
1153 bool "R3000" 1242 bool "R3000"
1154 depends on MIPS32 1243 select CPU_SUPPORTS_32BIT_KERNEL
1155 help 1244 help
1156 Please make sure to pick the right CPU type. Linux/MIPS is not 1245 Please make sure to pick the right CPU type. Linux/MIPS is not
1157 designed to be generic, i.e. Kernels compiled for R3000 CPUs will 1246 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
@@ -1162,10 +1251,12 @@ config CPU_R3000
1162 1251
1163config CPU_TX39XX 1252config CPU_TX39XX
1164 bool "R39XX" 1253 bool "R39XX"
1165 depends on MIPS32 1254 select CPU_SUPPORTS_32BIT_KERNEL
1166 1255
1167config CPU_VR41XX 1256config CPU_VR41XX
1168 bool "R41xx" 1257 bool "R41xx"
1258 select CPU_SUPPORTS_32BIT_KERNEL
1259 select CPU_SUPPORTS_64BIT_KERNEL
1169 help 1260 help
1170 The options selects support for the NEC VR41xx series of processors. 1261 The options selects support for the NEC VR41xx series of processors.
1171 Only choose this option if you have one of these processors as a 1262 Only choose this option if you have one of these processors as a
@@ -1174,20 +1265,28 @@ config CPU_VR41XX
1174 1265
1175config CPU_R4300 1266config CPU_R4300
1176 bool "R4300" 1267 bool "R4300"
1268 select CPU_SUPPORTS_32BIT_KERNEL
1269 select CPU_SUPPORTS_64BIT_KERNEL
1177 help 1270 help
1178 MIPS Technologies R4300-series processors. 1271 MIPS Technologies R4300-series processors.
1179 1272
1180config CPU_R4X00 1273config CPU_R4X00
1181 bool "R4x00" 1274 bool "R4x00"
1275 select CPU_SUPPORTS_32BIT_KERNEL
1276 select CPU_SUPPORTS_64BIT_KERNEL
1182 help 1277 help
1183 MIPS Technologies R4000-series processors other than 4300, including 1278 MIPS Technologies R4000-series processors other than 4300, including
1184 the R4000, R4400, R4600, and 4700. 1279 the R4000, R4400, R4600, and 4700.
1185 1280
1186config CPU_TX49XX 1281config CPU_TX49XX
1187 bool "R49XX" 1282 bool "R49XX"
1283 select CPU_SUPPORTS_32BIT_KERNEL
1284 select CPU_SUPPORTS_64BIT_KERNEL
1188 1285
1189config CPU_R5000 1286config CPU_R5000
1190 bool "R5000" 1287 bool "R5000"
1288 select CPU_SUPPORTS_32BIT_KERNEL
1289 select CPU_SUPPORTS_64BIT_KERNEL
1191 help 1290 help
1192 MIPS Technologies R5000-series processors other than the Nevada. 1291 MIPS Technologies R5000-series processors other than the Nevada.
1193 1292
@@ -1196,36 +1295,48 @@ config CPU_R5432
1196 1295
1197config CPU_R6000 1296config CPU_R6000
1198 bool "R6000" 1297 bool "R6000"
1199 depends on MIPS32 && EXPERIMENTAL 1298 depends on EXPERIMENTAL
1299 select CPU_SUPPORTS_32BIT_KERNEL
1200 help 1300 help
1201 MIPS Technologies R6000 and R6000A series processors. Note these 1301 MIPS Technologies R6000 and R6000A series processors. Note these
1202 processors are extremly rare and the support for them is incomplete. 1302 processors are extremly rare and the support for them is incomplete.
1203 1303
1204config CPU_NEVADA 1304config CPU_NEVADA
1205 bool "RM52xx" 1305 bool "RM52xx"
1306 select CPU_SUPPORTS_32BIT_KERNEL
1307 select CPU_SUPPORTS_64BIT_KERNEL
1206 help 1308 help
1207 QED / PMC-Sierra RM52xx-series ("Nevada") processors. 1309 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1208 1310
1209config CPU_R8000 1311config CPU_R8000
1210 bool "R8000" 1312 bool "R8000"
1211 depends on MIPS64 && EXPERIMENTAL 1313 depends on EXPERIMENTAL
1314 select CPU_SUPPORTS_64BIT_KERNEL
1212 help 1315 help
1213 MIPS Technologies R8000 processors. Note these processors are 1316 MIPS Technologies R8000 processors. Note these processors are
1214 uncommon and the support for them is incomplete. 1317 uncommon and the support for them is incomplete.
1215 1318
1216config CPU_R10000 1319config CPU_R10000
1217 bool "R10000" 1320 bool "R10000"
1321 select CPU_SUPPORTS_32BIT_KERNEL
1322 select CPU_SUPPORTS_64BIT_KERNEL
1218 help 1323 help
1219 MIPS Technologies R10000-series processors. 1324 MIPS Technologies R10000-series processors.
1220 1325
1221config CPU_RM7000 1326config CPU_RM7000
1222 bool "RM7000" 1327 bool "RM7000"
1328 select CPU_SUPPORTS_32BIT_KERNEL
1329 select CPU_SUPPORTS_64BIT_KERNEL
1223 1330
1224config CPU_RM9000 1331config CPU_RM9000
1225 bool "RM9000" 1332 bool "RM9000"
1333 select CPU_SUPPORTS_32BIT_KERNEL
1334 select CPU_SUPPORTS_64BIT_KERNEL
1226 1335
1227config CPU_SB1 1336config CPU_SB1
1228 bool "SB1" 1337 bool "SB1"
1338 select CPU_SUPPORTS_32BIT_KERNEL
1339 select CPU_SUPPORTS_64BIT_KERNEL
1229 1340
1230endchoice 1341endchoice
1231 1342
@@ -1321,11 +1432,11 @@ config SB1_PASS_2_1_WORKAROUNDS
1321 1432
1322config 64BIT_PHYS_ADDR 1433config 64BIT_PHYS_ADDR
1323 bool "Support for 64-bit physical address space" 1434 bool "Support for 64-bit physical address space"
1324 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32 1435 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
1325 1436
1326config CPU_ADVANCED 1437config CPU_ADVANCED
1327 bool "Override CPU Options" 1438 bool "Override CPU Options"
1328 depends on MIPS32 1439 depends on 32BIT
1329 help 1440 help
1330 Saying yes here allows you to select support for various features 1441 Saying yes here allows you to select support for various features
1331 your CPU may or may not have. Most people should say N here. 1442 your CPU may or may not have. Most people should say N here.
@@ -1379,7 +1490,7 @@ config CPU_HAS_SYNC
1379# 1490#
1380config HIGHMEM 1491config HIGHMEM
1381 bool "High Memory Support" 1492 bool "High Memory Support"
1382 depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) 1493 depends on 32BIT && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX)
1383 1494
1384config ARCH_FLATMEM_ENABLE 1495config ARCH_FLATMEM_ENABLE
1385 def_bool y 1496 def_bool y
@@ -1439,7 +1550,7 @@ config RTC_DS1742
1439 1550
1440config MIPS_INSANE_LARGE 1551config MIPS_INSANE_LARGE
1441 bool "Support for large 64-bit configurations" 1552 bool "Support for large 64-bit configurations"
1442 depends on CPU_R10000 && MIPS64 1553 depends on CPU_R10000 && 64BIT
1443 help 1554 help
1444 MIPS R10000 does support a 44 bit / 16TB address space as opposed to 1555 MIPS R10000 does support a 44 bit / 16TB address space as opposed to
1445 previous 64-bit processors which only supported 40 bit / 1TB. If you 1556 previous 64-bit processors which only supported 40 bit / 1TB. If you
@@ -1540,11 +1651,11 @@ source "fs/Kconfig.binfmt"
1540 1651
1541config TRAD_SIGNALS 1652config TRAD_SIGNALS
1542 bool 1653 bool
1543 default y if MIPS32 1654 default y if 32BIT
1544 1655
1545config BUILD_ELF64 1656config BUILD_ELF64
1546 bool "Use 64-bit ELF format for building" 1657 bool "Use 64-bit ELF format for building"
1547 depends on MIPS64 1658 depends on 64BIT
1548 help 1659 help
1549 A 64-bit kernel is usually built using the 64-bit ELF binary object 1660 A 64-bit kernel is usually built using the 64-bit ELF binary object
1550 format as it's one that allows arbitrary 64-bit constructs. For 1661 format as it's one that allows arbitrary 64-bit constructs. For
@@ -1559,11 +1670,11 @@ config BUILD_ELF64
1559 1670
1560config BINFMT_IRIX 1671config BINFMT_IRIX
1561 bool "Include IRIX binary compatibility" 1672 bool "Include IRIX binary compatibility"
1562 depends on !CPU_LITTLE_ENDIAN && MIPS32 && BROKEN 1673 depends on !CPU_LITTLE_ENDIAN && 32BIT && BROKEN
1563 1674
1564config MIPS32_COMPAT 1675config MIPS32_COMPAT
1565 bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 1676 bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
1566 depends on MIPS64 1677 depends on 64BIT
1567 help 1678 help
1568 Select this option if you want Linux/MIPS 32-bit binary 1679 Select this option if you want Linux/MIPS 32-bit binary
1569 compatibility. Since all software available for Linux/MIPS is 1680 compatibility. Since all software available for Linux/MIPS is
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index bc1c44274a58..d27b82595485 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -37,12 +37,12 @@ else
3764bit-emul = elf64btsmip 3764bit-emul = elf64btsmip
38endif 38endif
39 39
40ifdef CONFIG_MIPS32 40ifdef CONFIG_32BIT
41gcc-abi = 32 41gcc-abi = 32
42tool-prefix = $(32bit-tool-prefix) 42tool-prefix = $(32bit-tool-prefix)
43UTS_MACHINE := mips 43UTS_MACHINE := mips
44endif 44endif
45ifdef CONFIG_MIPS64 45ifdef CONFIG_64BIT
46gcc-abi = 64 46gcc-abi = 64
47tool-prefix = $(64bit-tool-prefix) 47tool-prefix = $(64bit-tool-prefix)
48UTS_MACHINE := mips64 48UTS_MACHINE := mips64
@@ -63,7 +63,7 @@ ld-emul = $(32bit-emul)
63vmlinux-32 = vmlinux 63vmlinux-32 = vmlinux
64vmlinux-64 = vmlinux.64 64vmlinux-64 = vmlinux.64
65 65
66cflags-$(CONFIG_MIPS64) += $(call cc-option,-mno-explicit-relocs) 66cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
67endif 67endif
68 68
69# 69#
@@ -177,7 +177,7 @@ cflags-$(CONFIG_CPU_MIPS64) += \
177 177
178cflags-$(CONFIG_CPU_R5000) += \ 178cflags-$(CONFIG_CPU_R5000) += \
179 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \ 179 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
180 -Wa,--trap 180 -Wa,--trap
181 181
182cflags-$(CONFIG_CPU_R5432) += \ 182cflags-$(CONFIG_CPU_R5432) += \
183 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \ 183 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
@@ -423,6 +423,12 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
423cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite 423cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
424load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 424load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
425 425
426# Qemu simulating MIPS32 4Kc
427#
428core-$(CONFIG_QEMU) += arch/mips/qemu/
429cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
430load-$(CONFIG_QEMU) += 0xffffffff80010000
431
426# 432#
427# Momentum Ocelot-3 433# Momentum Ocelot-3
428# 434#
@@ -469,13 +475,6 @@ cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
469load-$(CONFIG_LASAT) += 0xffffffff80000000 475load-$(CONFIG_LASAT) += 0xffffffff80000000
470 476
471# 477#
472# NEC Osprey (vr4181) board
473#
474core-$(CONFIG_NEC_OSPREY) += arch/mips/vr4181/common/ \
475 arch/mips/vr4181/osprey/
476load-$(CONFIG_NEC_OSPREY) += 0xffffffff80002000
477
478#
479# Common VR41xx 478# Common VR41xx
480# 479#
481core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ 480core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
@@ -490,13 +489,11 @@ load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
490# 489#
491# ZAO Networks Capcella (VR4131) 490# ZAO Networks Capcella (VR4131)
492# 491#
493core-$(CONFIG_ZAO_CAPCELLA) += arch/mips/vr41xx/zao-capcella/
494load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000 492load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
495 493
496# 494#
497# Victor MP-C303/304 (VR4122) 495# Victor MP-C303/304 (VR4122)
498# 496#
499core-$(CONFIG_VICTOR_MPC30X) += arch/mips/vr41xx/victor-mpc30x/
500load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000 497load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
501 498
502# 499#
@@ -512,16 +509,9 @@ core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
512load-$(CONFIG_CASIO_E55) += 0xffffffff80004000 509load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
513 510
514# 511#
515# TANBAC TB0226 Mbase (VR4131) 512# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
516#
517core-$(CONFIG_TANBAC_TB0226) += arch/mips/vr41xx/tanbac-tb0226/
518load-$(CONFIG_TANBAC_TB0226) += 0xffffffff80000000
519
520#
521# TANBAC TB0229 VR4131DIMM (VR4131)
522# 513#
523core-$(CONFIG_TANBAC_TB0229) += arch/mips/vr41xx/tanbac-tb0229/ 514load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
524load-$(CONFIG_TANBAC_TB0229) += 0xffffffff80000000
525 515
526# 516#
527# SGI IP22 (Indy/Indigo2) 517# SGI IP22 (Indy/Indigo2)
@@ -534,10 +524,10 @@ load-$(CONFIG_TANBAC_TB0229) += 0xffffffff80000000
534# 524#
535core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ 525core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
536cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 526cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
537ifdef CONFIG_MIPS32 527ifdef CONFIG_32BIT
538load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 528load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
539endif 529endif
540ifdef CONFIG_MIPS64 530ifdef CONFIG_64BIT
541load-$(CONFIG_SGI_IP22) += 0xffffffff88004000 531load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
542endif 532endif
543 533
@@ -642,7 +632,7 @@ load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
642cflags-y += -Iinclude/asm-mips/mach-generic 632cflags-y += -Iinclude/asm-mips/mach-generic
643drivers-$(CONFIG_PCI) += arch/mips/pci/ 633drivers-$(CONFIG_PCI) += arch/mips/pci/
644 634
645ifdef CONFIG_MIPS32 635ifdef CONFIG_32BIT
646ifdef CONFIG_CPU_LITTLE_ENDIAN 636ifdef CONFIG_CPU_LITTLE_ENDIAN
647JIFFIES = jiffies_64 637JIFFIES = jiffies_64
648else 638else
@@ -674,8 +664,8 @@ CPPFLAGS_vmlinux.lds := \
674head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o 664head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
675 665
676libs-y += arch/mips/lib/ 666libs-y += arch/mips/lib/
677libs-$(CONFIG_MIPS32) += arch/mips/lib-32/ 667libs-$(CONFIG_32BIT) += arch/mips/lib-32/
678libs-$(CONFIG_MIPS64) += arch/mips/lib-64/ 668libs-$(CONFIG_64BIT) += arch/mips/lib-64/
679 669
680core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ 670core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
681 671
@@ -730,7 +720,7 @@ archclean:
730 @$(MAKE) $(clean)=arch/mips/boot 720 @$(MAKE) $(clean)=arch/mips/boot
731 @$(MAKE) $(clean)=arch/mips/lasat 721 @$(MAKE) $(clean)=arch/mips/lasat
732 722
733# Generate <asm/offset.h 723# Generate <asm/offset.h
734# 724#
735# The default rule is suffering from funny problems on MIPS so we using our 725# The default rule is suffering from funny problems on MIPS so we using our
736# own ... 726# own ...
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index 533721eef6ae..4e5a6e1a9a6e 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -40,14 +40,14 @@
40 40
41/* TBD */ 41/* TBD */
42static struct resource pci_io_resource = { 42static struct resource pci_io_resource = {
43 "pci IO space", 43 "pci IO space",
44 (u32)PCI_IO_START, 44 (u32)PCI_IO_START,
45 (u32)PCI_IO_END, 45 (u32)PCI_IO_END,
46 IORESOURCE_IO 46 IORESOURCE_IO
47}; 47};
48 48
49static struct resource pci_mem_resource = { 49static struct resource pci_mem_resource = {
50 "pci memory space", 50 "pci memory space",
51 (u32)PCI_MEM_START, 51 (u32)PCI_MEM_START,
52 (u32)PCI_MEM_END, 52 (u32)PCI_MEM_END,
53 IORESOURCE_MEM 53 IORESOURCE_MEM
@@ -68,7 +68,7 @@ static unsigned long virt_io_addr;
68static int __init au1x_pci_setup(void) 68static int __init au1x_pci_setup(void)
69{ 69{
70#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) 70#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
71 virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, 71 virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
72 Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1); 72 Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
73 73
74 if (!virt_io_addr) { 74 if (!virt_io_addr) {
@@ -77,7 +77,7 @@ static int __init au1x_pci_setup(void)
77 } 77 }
78 78
79#ifdef CONFIG_DMA_NONCOHERENT 79#ifdef CONFIG_DMA_NONCOHERENT
80 /* 80 /*
81 * Set the NC bit in controller for Au1500 pre-AC silicon 81 * Set the NC bit in controller for Au1500 pre-AC silicon
82 */ 82 */
83 u32 prid = read_c0_prid(); 83 u32 prid = read_c0_prid();
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index dbc8b1bda963..eff89e109ce6 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -97,7 +97,7 @@ static int __init au1x00_setup(void)
97 argptr = prom_getcmdline(); 97 argptr = prom_getcmdline();
98 strcat(argptr, " console=ttyS0,115200"); 98 strcat(argptr, " console=ttyS0,115200");
99 } 99 }
100#endif 100#endif
101 101
102#ifdef CONFIG_FB_AU1100 102#ifdef CONFIG_FB_AU1100
103 if ((argptr = strstr(argptr, "video=")) == NULL) { 103 if ((argptr = strstr(argptr, "video=")) == NULL) {
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index fe418f1620c3..57675b41480e 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -281,7 +281,7 @@ unsigned long cal_r4koff(void)
281 cpu_speed = count * 2; 281 cpu_speed = count * 2;
282 } 282 }
283#else 283#else
284 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * 284 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
285 AU1000_SRC_CLK; 285 AU1000_SRC_CLK;
286 count = cpu_speed / 2; 286 count = cpu_speed / 2;
287#endif 287#endif
@@ -356,7 +356,7 @@ static unsigned long do_fast_cp0_gettimeoffset(void)
356 : "hi", "lo", GCC_REG_ACCUM); 356 : "hi", "lo", GCC_REG_ACCUM);
357 357
358 /* 358 /*
359 * Due to possible jiffies inconsistencies, we need to check 359 * Due to possible jiffies inconsistencies, we need to check
360 * the result so that we'll get a timer that is monotonic. 360 * the result so that we'll get a timer that is monotonic.
361 */ 361 */
362 if (res >= USECS_PER_JIFFY) 362 if (res >= USECS_PER_JIFFY)
@@ -375,8 +375,8 @@ static unsigned long do_fast_pm_gettimeoffset(void)
375 au_sync(); 375 au_sync();
376 offset = pc0 - last_pc0; 376 offset = pc0 - last_pc0;
377 if (offset > 2*MATCH20_INC) { 377 if (offset > 2*MATCH20_INC) {
378 printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n", 378 printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n",
379 (unsigned)offset, (unsigned)last_pc0, 379 (unsigned)offset, (unsigned)last_pc0,
380 (unsigned)last_match20, (unsigned)pc0); 380 (unsigned)last_match20, (unsigned)pc0);
381 } 381 }
382 offset = (unsigned long)((offset * 305) / 10); 382 offset = (unsigned long)((offset * 305) / 10);
@@ -394,11 +394,11 @@ void au1xxx_timer_setup(struct irqaction *irq)
394 r4k_offset = cal_r4koff(); 394 r4k_offset = cal_r4koff();
395 printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset); 395 printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
396 396
397 //est_freq = 2*r4k_offset*HZ; 397 //est_freq = 2*r4k_offset*HZ;
398 est_freq = r4k_offset*HZ; 398 est_freq = r4k_offset*HZ;
399 est_freq += 5000; /* round */ 399 est_freq += 5000; /* round */
400 est_freq -= est_freq%10000; 400 est_freq -= est_freq%10000;
401 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 401 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
402 (est_freq%1000000)*100/1000000); 402 (est_freq%1000000)*100/1000000);
403 set_au1x00_speed(est_freq); 403 set_au1x00_speed(est_freq);
404 set_au1x00_lcd_clock(); // program the LCD clock 404 set_au1x00_lcd_clock(); // program the LCD clock
diff --git a/arch/mips/au1000/csb250/board_setup.c b/arch/mips/au1000/csb250/board_setup.c
index 90426eaffb23..1c55c5f59d75 100644
--- a/arch/mips/au1000/csb250/board_setup.c
+++ b/arch/mips/au1000/csb250/board_setup.c
@@ -182,7 +182,7 @@ void __init board_setup(void)
182 au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); 182 au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
183 au_writel(0, Au1500_PCI_MWBASE_REV_CCL); 183 au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
184 au_writel(0x02a00356, Au1500_PCI_STATCMD); 184 au_writel(0x02a00356, Au1500_PCI_STATCMD);
185 au_writel(0x00003c04, Au1500_PCI_HDRTYPE); 185 au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
186 au_writel(0x00000008, Au1500_PCI_MBAR); 186 au_writel(0x00000008, Au1500_PCI_MBAR);
187 au_sync(); 187 au_sync();
188 188
@@ -216,7 +216,7 @@ csb250_pci_idsel(unsigned int devsel, int assert)
216 unsigned int gpio2_pins; 216 unsigned int gpio2_pins;
217 217
218 retval = 1; 218 retval = 1;
219 219
220 /* First, disable both selects, then assert the one requested. 220 /* First, disable both selects, then assert the one requested.
221 */ 221 */
222 au_writel(0xc000c000, GPIO2_OUTPUT); 222 au_writel(0xc000c000, GPIO2_OUTPUT);
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c
index 4320057fc439..bd99733abc0b 100644
--- a/arch/mips/au1000/csb250/init.c
+++ b/arch/mips/au1000/csb250/init.c
@@ -81,7 +81,7 @@ int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
81 csb_env[0] = env1; 81 csb_env[0] = env1;
82 82
83 mips_machgroup = MACH_GROUP_ALCHEMY; 83 mips_machgroup = MACH_GROUP_ALCHEMY;
84 mips_machtype = MACH_CSB250; 84 mips_machtype = MACH_CSB250;
85 85
86 prom_init_cmdline(); 86 prom_init_cmdline();
87 memsize_str = prom_getenv("memsize"); 87 memsize_str = prom_getenv("memsize");
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index 51eee94a5e82..4b9d5e46edbb 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -61,7 +61,7 @@ void __init prom_init(void)
61 prom_envp = (char **) fw_arg2; 61 prom_envp = (char **) fw_arg2;
62 62
63 mips_machgroup = MACH_GROUP_ALCHEMY; 63 mips_machgroup = MACH_GROUP_ALCHEMY;
64 mips_machtype = MACH_DB1000; /* set the platform # */ 64 mips_machtype = MACH_DB1000; /* set the platform # */
65 65
66 prom_init_cmdline(); 66 prom_init_cmdline();
67 67
diff --git a/arch/mips/au1000/hydrogen3/init.c b/arch/mips/au1000/hydrogen3/init.c
index eee4adf98711..8cc9879dd582 100644
--- a/arch/mips/au1000/hydrogen3/init.c
+++ b/arch/mips/au1000/hydrogen3/init.c
@@ -63,7 +63,7 @@ int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
63 prom_envp = envp; 63 prom_envp = envp;
64 64
65 mips_machgroup = MACH_GROUP_ALCHEMY; 65 mips_machgroup = MACH_GROUP_ALCHEMY;
66 mips_machtype = MACH_DB1000; /* set the platform # */ 66 mips_machtype = MACH_DB1000; /* set the platform # */
67 prom_init_cmdline(); 67 prom_init_cmdline();
68 68
69 memsize_str = prom_getenv("memsize"); 69 memsize_str = prom_getenv("memsize");
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 2fa211b69329..0b4807dc9f44 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -174,7 +174,7 @@ void __init board_setup(void)
174 case 0x02: /* HB */ 174 case 0x02: /* HB */
175 break; 175 break;
176 default: /* HC and newer */ 176 default: /* HC and newer */
177 /* Enable sys bus clock divider when IDLE state or no bus 177 /* Enable sys bus clock divider when IDLE state or no bus
178 activity. */ 178 activity. */
179 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); 179 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
180 break; 180 break;
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index 9dadc82536f4..1e59433dfd66 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -49,7 +49,7 @@ void board_reset (void)
49void __init board_setup(void) 49void __init board_setup(void)
50{ 50{
51 u32 pin_func; 51 u32 pin_func;
52 52
53 // set multiple use pins (UART3/GPIO) to UART (it's used as UART too) 53 // set multiple use pins (UART3/GPIO) to UART (it's used as UART too)
54 pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3); 54 pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3);
55 pin_func |= SYS_PF_UR3; 55 pin_func |= SYS_PF_UR3;
@@ -75,11 +75,11 @@ void __init board_setup(void)
75 au_writel(1, GPIO2_ENABLE); 75 au_writel(1, GPIO2_ENABLE);
76 /* gpio2 208/9/10/11 are inputs */ 76 /* gpio2 208/9/10/11 are inputs */
77 au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR); 77 au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR);
78 78
79 /* turn off power */ 79 /* turn off power */
80 au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT); 80 au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT);
81#endif 81#endif
82 82
83 83
84#ifdef CONFIG_PCI 84#ifdef CONFIG_PCI
85#if defined(__MIPSEB__) 85#if defined(__MIPSEB__)
diff --git a/arch/mips/au1000/xxs1500/init.c b/arch/mips/au1000/xxs1500/init.c
index 03f755291b51..f1c76533b6fc 100644
--- a/arch/mips/au1000/xxs1500/init.c
+++ b/arch/mips/au1000/xxs1500/init.c
@@ -55,7 +55,7 @@ void __init prom_init(void)
55 prom_envp = (char **) fw_arg2; 55 prom_envp = (char **) fw_arg2;
56 56
57 mips_machgroup = MACH_GROUP_ALCHEMY; 57 mips_machgroup = MACH_GROUP_ALCHEMY;
58 mips_machtype = MACH_XXS1500; /* set the platform # */ 58 mips_machtype = MACH_XXS1500; /* set the platform # */
59 59
60 prom_init_cmdline(); 60 prom_init_cmdline();
61 61
diff --git a/arch/mips/au1000/xxs1500/irqmap.c b/arch/mips/au1000/xxs1500/irqmap.c
index 954800a0ab52..52f2f7daeb05 100644
--- a/arch/mips/au1000/xxs1500/irqmap.c
+++ b/arch/mips/au1000/xxs1500/irqmap.c
@@ -56,7 +56,7 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
56 { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, 56 { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
57 57
58 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, 58 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
59 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, 59 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
60 { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, 60 { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 },
61 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, 61 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
62 { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */ 62 { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index caad7ca27abd..3120a02b8670 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:00 2005 4# Wed Jan 26 02:49:00 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 88CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y 89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 90CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y
91CONFIG_MIPS_BONITO64=y 92CONFIG_MIPS_BONITO64=y
92CONFIG_MIPS_MSC=y 93CONFIG_MIPS_MSC=y
93# CONFIG_CPU_LITTLE_ENDIAN is not set 94# CONFIG_CPU_LITTLE_ENDIAN is not set
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index 1b7f8a702d06..158e7165f4e3 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:00 2005 4# Wed Jan 26 02:49:00 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
97CONFIG_GENERIC_CALIBRATE_DELAY=y 97CONFIG_GENERIC_CALIBRATE_DELAY=y
98CONFIG_HAVE_DEC_LOCK=y 98CONFIG_HAVE_DEC_LOCK=y
99CONFIG_DMA_NONCOHERENT=y 99CONFIG_DMA_NONCOHERENT=y
100CONFIG_DMA_NEED_PCI_MAP_STATE=y
100CONFIG_CPU_LITTLE_ENDIAN=y 101CONFIG_CPU_LITTLE_ENDIAN=y
101CONFIG_IRQ_CPU=y 102CONFIG_IRQ_CPU=y
102CONFIG_MIPS_L1_CACHE_SHIFT=5 103CONFIG_MIPS_L1_CACHE_SHIFT=5
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 8861854561e5..4302c6f914f5 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:00 2005 4# Wed Jan 26 02:49:00 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 82CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y 83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 84CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y
85CONFIG_I8259=y 86CONFIG_I8259=y
86CONFIG_CPU_LITTLE_ENDIAN=y 87CONFIG_CPU_LITTLE_ENDIAN=y
87CONFIG_IRQ_CPU=y 88CONFIG_IRQ_CPU=y
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 19cac1bf4f01..962fc14b58c2 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:01 2005 4# Wed Jan 26 02:49:01 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 104CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 105CONFIG_HAVE_DEC_LOCK=y
106CONFIG_DMA_NONCOHERENT=y 106CONFIG_DMA_NONCOHERENT=y
107CONFIG_DMA_NEED_PCI_MAP_STATE=y
107CONFIG_CPU_LITTLE_ENDIAN=y 108CONFIG_CPU_LITTLE_ENDIAN=y
108CONFIG_MIPS_L1_CACHE_SHIFT=5 109CONFIG_MIPS_L1_CACHE_SHIFT=5
109 110
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 035ac95d197e..6a528d479d70 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:01 2005 4# Wed Jan 26 02:49:01 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 104CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 105CONFIG_HAVE_DEC_LOCK=y
106CONFIG_DMA_NONCOHERENT=y 106CONFIG_DMA_NONCOHERENT=y
107CONFIG_DMA_NEED_PCI_MAP_STATE=y
107CONFIG_CPU_LITTLE_ENDIAN=y 108CONFIG_CPU_LITTLE_ENDIAN=y
108CONFIG_MIPS_L1_CACHE_SHIFT=5 109CONFIG_MIPS_L1_CACHE_SHIFT=5
109 110
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index c38c4ed18fe7..fed6f2fab48b 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:01 2005 4# Wed Jan 26 02:49:01 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index ee81309ae3a5..178c0ad1af75 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:02 2005 4# Wed Jan 26 02:49:02 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig
index d43ed57c4b4e..70addc73f699 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/ddb5476_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:02 2005 4# Wed Jan 26 02:49:02 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 82CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y 83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 84CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y
85CONFIG_I8259=y 86CONFIG_I8259=y
86CONFIG_CPU_LITTLE_ENDIAN=y 87CONFIG_CPU_LITTLE_ENDIAN=y
87CONFIG_IRQ_CPU=y 88CONFIG_IRQ_CPU=y
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 5a032cdefd63..60292808b384 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:02 2005 4# Wed Jan 26 02:49:02 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -83,6 +83,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
83CONFIG_GENERIC_CALIBRATE_DELAY=y 83CONFIG_GENERIC_CALIBRATE_DELAY=y
84CONFIG_HAVE_DEC_LOCK=y 84CONFIG_HAVE_DEC_LOCK=y
85CONFIG_DMA_NONCOHERENT=y 85CONFIG_DMA_NONCOHERENT=y
86CONFIG_DMA_NEED_PCI_MAP_STATE=y
86CONFIG_I8259=y 87CONFIG_I8259=y
87CONFIG_CPU_LITTLE_ENDIAN=y 88CONFIG_CPU_LITTLE_ENDIAN=y
88CONFIG_IRQ_CPU=y 89CONFIG_IRQ_CPU=y
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 32ada79da9d8..66ec1f41d122 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:03 2005 4# Wed Jan 26 02:49:03 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 88CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y 89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 90CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y
91CONFIG_EARLY_PRINTK=y 92CONFIG_EARLY_PRINTK=y
92CONFIG_CPU_LITTLE_ENDIAN=y 93CONFIG_CPU_LITTLE_ENDIAN=y
93CONFIG_IRQ_CPU=y 94CONFIG_IRQ_CPU=y
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 52074a2085fb..ba2ec01defb1 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:03 2005 4# Wed Jan 26 02:49:03 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -96,6 +96,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
96CONFIG_GENERIC_CALIBRATE_DELAY=y 96CONFIG_GENERIC_CALIBRATE_DELAY=y
97CONFIG_HAVE_DEC_LOCK=y 97CONFIG_HAVE_DEC_LOCK=y
98CONFIG_DMA_NONCOHERENT=y 98CONFIG_DMA_NONCOHERENT=y
99CONFIG_DMA_NEED_PCI_MAP_STATE=y
99CONFIG_CPU_LITTLE_ENDIAN=y 100CONFIG_CPU_LITTLE_ENDIAN=y
100CONFIG_IRQ_CPU=y 101CONFIG_IRQ_CPU=y
101CONFIG_MIPS_L1_CACHE_SHIFT=5 102CONFIG_MIPS_L1_CACHE_SHIFT=5
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index 360e842fd4be..17e87f70f602 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:03 2005 4# Wed Jan 26 02:49:03 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 89CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y 90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_DMA_NONCOHERENT=y 91CONFIG_DMA_NONCOHERENT=y
92CONFIG_DMA_NEED_PCI_MAP_STATE=y
92# CONFIG_CPU_LITTLE_ENDIAN is not set 93# CONFIG_CPU_LITTLE_ENDIAN is not set
93CONFIG_MIPS_GT64120=y 94CONFIG_MIPS_GT64120=y
94# CONFIG_SYSCLK_75 is not set 95# CONFIG_SYSCLK_75 is not set
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index 657a9508d31a..9da4140eae00 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:03 2005 4# Wed Jan 26 02:49:03 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 88CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y 89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 90CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y
91# CONFIG_CPU_LITTLE_ENDIAN is not set 92# CONFIG_CPU_LITTLE_ENDIAN is not set
92CONFIG_IRQ_CPU=y 93CONFIG_IRQ_CPU=y
93CONFIG_MIPS_GT64120=y 94CONFIG_MIPS_GT64120=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 3fb102e6a7f7..17fa5c4e3ad1 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:04 2005 4# Wed Jan 26 02:49:04 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -90,6 +90,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y 90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_ARC=y 91CONFIG_ARC=y
92CONFIG_DMA_NONCOHERENT=y 92CONFIG_DMA_NONCOHERENT=y
93CONFIG_DMA_NEED_PCI_MAP_STATE=y
93# CONFIG_CPU_LITTLE_ENDIAN is not set 94# CONFIG_CPU_LITTLE_ENDIAN is not set
94CONFIG_IRQ_CPU=y 95CONFIG_IRQ_CPU=y
95CONFIG_SWAP_IO_SPACE=y 96CONFIG_SWAP_IO_SPACE=y
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index b5bab3a42fc4..b2a67da1e031 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -4,7 +4,7 @@
4# Wed Jan 26 02:49:04 2005 4# Wed Jan 26 02:49:04 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_MIPS64=y 7CONFIG_64BIT=y
8CONFIG_64BIT=y 8CONFIG_64BIT=y
9 9
10# 10#
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index bdf1415475ff..b26e1173365d 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -4,7 +4,7 @@
4# Wed Jan 26 02:49:04 2005 4# Wed Jan 26 02:49:04 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_MIPS64=y 7CONFIG_64BIT=y
8CONFIG_64BIT=y 8CONFIG_64BIT=y
9 9
10# 10#
@@ -84,6 +84,7 @@ CONFIG_ARC=y
84CONFIG_DMA_IP32=y 84CONFIG_DMA_IP32=y
85CONFIG_OWN_DMA=y 85CONFIG_OWN_DMA=y
86CONFIG_DMA_NONCOHERENT=y 86CONFIG_DMA_NONCOHERENT=y
87CONFIG_DMA_NEED_PCI_MAP_STATE=y
87# CONFIG_CPU_LITTLE_ENDIAN is not set 88# CONFIG_CPU_LITTLE_ENDIAN is not set
88CONFIG_ARC32=y 89CONFIG_ARC32=y
89CONFIG_BOOT_ELF32=y 90CONFIG_BOOT_ELF32=y
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index 1ca7746388f0..08bd3ad64761 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:05 2005 4# Wed Jan 26 02:49:05 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -90,6 +90,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
90CONFIG_GENERIC_CALIBRATE_DELAY=y 90CONFIG_GENERIC_CALIBRATE_DELAY=y
91CONFIG_HAVE_DEC_LOCK=y 91CONFIG_HAVE_DEC_LOCK=y
92CONFIG_DMA_NONCOHERENT=y 92CONFIG_DMA_NONCOHERENT=y
93CONFIG_DMA_NEED_PCI_MAP_STATE=y
93CONFIG_CPU_LITTLE_ENDIAN=y 94CONFIG_CPU_LITTLE_ENDIAN=y
94CONFIG_ITE_BOARD_GEN=y 95CONFIG_ITE_BOARD_GEN=y
95CONFIG_IT8172_CIR=y 96CONFIG_IT8172_CIR=y
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index c6eef708be1e..583ef5c5b1cd 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:05 2005 4# Wed Jan 26 02:49:05 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 89CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y 90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_DMA_NONCOHERENT=y 91CONFIG_DMA_NONCOHERENT=y
92CONFIG_DMA_NEED_PCI_MAP_STATE=y
92CONFIG_CPU_LITTLE_ENDIAN=y 93CONFIG_CPU_LITTLE_ENDIAN=y
93CONFIG_ITE_BOARD_GEN=y 94CONFIG_ITE_BOARD_GEN=y
94CONFIG_IT8172_CIR=y 95CONFIG_IT8172_CIR=y
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 757c4e88cc00..8abb5a0c6c12 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:05 2005 4# Wed Jan 26 02:49:05 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -81,6 +81,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
81CONFIG_GENERIC_CALIBRATE_DELAY=y 81CONFIG_GENERIC_CALIBRATE_DELAY=y
82CONFIG_HAVE_DEC_LOCK=y 82CONFIG_HAVE_DEC_LOCK=y
83CONFIG_DMA_NONCOHERENT=y 83CONFIG_DMA_NONCOHERENT=y
84CONFIG_DMA_NEED_PCI_MAP_STATE=y
84CONFIG_LIMITED_DMA=y 85CONFIG_LIMITED_DMA=y
85# CONFIG_CPU_LITTLE_ENDIAN is not set 86# CONFIG_CPU_LITTLE_ENDIAN is not set
86CONFIG_IRQ_CPU=y 87CONFIG_IRQ_CPU=y
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index e5a613906554..da5d9ee2ecce 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:06 2005 4# Wed Jan 26 02:49:06 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 82CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y 83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 84CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y
85# CONFIG_CPU_LITTLE_ENDIAN is not set 86# CONFIG_CPU_LITTLE_ENDIAN is not set
86CONFIG_MIPS_TX3927=y 87CONFIG_MIPS_TX3927=y
87CONFIG_SWAP_IO_SPACE=y 88CONFIG_SWAP_IO_SPACE=y
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index 1e7697834e90..8d600ae890f4 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:06 2005 4# Wed Jan 26 02:49:06 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -92,6 +92,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
92CONFIG_GENERIC_CALIBRATE_DELAY=y 92CONFIG_GENERIC_CALIBRATE_DELAY=y
93CONFIG_HAVE_DEC_LOCK=y 93CONFIG_HAVE_DEC_LOCK=y
94CONFIG_DMA_NONCOHERENT=y 94CONFIG_DMA_NONCOHERENT=y
95CONFIG_DMA_NEED_PCI_MAP_STATE=y
95CONFIG_MIPS_NILE4=y 96CONFIG_MIPS_NILE4=y
96CONFIG_CPU_LITTLE_ENDIAN=y 97CONFIG_CPU_LITTLE_ENDIAN=y
97CONFIG_MIPS_GT64120=y 98CONFIG_MIPS_GT64120=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 61fb9fb97e6e..79519ac5af4a 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:53:14 2005 4# Wed Jan 26 02:53:14 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -88,6 +88,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 88CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y 89CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 90CONFIG_DMA_NONCOHERENT=y
91CONFIG_DMA_NEED_PCI_MAP_STATE=y
91CONFIG_GENERIC_ISA_DMA=y 92CONFIG_GENERIC_ISA_DMA=y
92CONFIG_I8259=y 93CONFIG_I8259=y
93CONFIG_MIPS_BONITO64=y 94CONFIG_MIPS_BONITO64=y
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 31b8f2ad7338..0fea57ef18f2 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:07 2005 4# Wed Jan 26 02:49:07 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
97CONFIG_GENERIC_CALIBRATE_DELAY=y 97CONFIG_GENERIC_CALIBRATE_DELAY=y
98CONFIG_HAVE_DEC_LOCK=y 98CONFIG_HAVE_DEC_LOCK=y
99CONFIG_DMA_NONCOHERENT=y 99CONFIG_DMA_NONCOHERENT=y
100CONFIG_DMA_NEED_PCI_MAP_STATE=y
100CONFIG_CPU_LITTLE_ENDIAN=y 101CONFIG_CPU_LITTLE_ENDIAN=y
101CONFIG_IRQ_CPU=y 102CONFIG_IRQ_CPU=y
102CONFIG_MIPS_L1_CACHE_SHIFT=5 103CONFIG_MIPS_L1_CACHE_SHIFT=5
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index 2cce682fffcf..b4cf97a732bc 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:07 2005 4# Wed Jan 26 02:49:07 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -89,6 +89,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
89CONFIG_GENERIC_CALIBRATE_DELAY=y 89CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y 90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_DMA_NONCOHERENT=y 91CONFIG_DMA_NONCOHERENT=y
92CONFIG_DMA_NEED_PCI_MAP_STATE=y
92# CONFIG_CPU_LITTLE_ENDIAN is not set 93# CONFIG_CPU_LITTLE_ENDIAN is not set
93CONFIG_IRQ_CPU=y 94CONFIG_IRQ_CPU=y
94CONFIG_IRQ_CPU_RM7K=y 95CONFIG_IRQ_CPU_RM7K=y
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index 0cbf48a62e02..a38903db85a0 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -4,7 +4,7 @@
4# Wed Jan 26 02:49:07 2005 4# Wed Jan 26 02:49:07 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_MIPS64=y 7CONFIG_64BIT=y
8CONFIG_64BIT=y 8CONFIG_64BIT=y
9 9
10# 10#
@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
80CONFIG_GENERIC_CALIBRATE_DELAY=y 80CONFIG_GENERIC_CALIBRATE_DELAY=y
81CONFIG_HAVE_DEC_LOCK=y 81CONFIG_HAVE_DEC_LOCK=y
82CONFIG_DMA_NONCOHERENT=y 82CONFIG_DMA_NONCOHERENT=y
83CONFIG_DMA_NEED_PCI_MAP_STATE=y
83# CONFIG_CPU_LITTLE_ENDIAN is not set 84# CONFIG_CPU_LITTLE_ENDIAN is not set
84CONFIG_IRQ_CPU=y 85CONFIG_IRQ_CPU=y
85CONFIG_IRQ_MV64340=y 86CONFIG_IRQ_MV64340=y
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index 4043950d360a..920d59b56a4e 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:08 2005 4# Wed Jan 26 02:49:08 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -82,6 +82,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
82CONFIG_GENERIC_CALIBRATE_DELAY=y 82CONFIG_GENERIC_CALIBRATE_DELAY=y
83CONFIG_HAVE_DEC_LOCK=y 83CONFIG_HAVE_DEC_LOCK=y
84CONFIG_DMA_NONCOHERENT=y 84CONFIG_DMA_NONCOHERENT=y
85CONFIG_DMA_NEED_PCI_MAP_STATE=y
85# CONFIG_CPU_LITTLE_ENDIAN is not set 86# CONFIG_CPU_LITTLE_ENDIAN is not set
86CONFIG_IRQ_CPU=y 87CONFIG_IRQ_CPU=y
87CONFIG_IRQ_CPU_RM7K=y 88CONFIG_IRQ_CPU_RM7K=y
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index 3870af4537ad..ef5ea50893d1 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -4,7 +4,7 @@
4# Wed Jan 26 02:49:08 2005 4# Wed Jan 26 02:49:08 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7CONFIG_MIPS64=y 7CONFIG_64BIT=y
8CONFIG_64BIT=y 8CONFIG_64BIT=y
9 9
10# 10#
@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
80CONFIG_GENERIC_CALIBRATE_DELAY=y 80CONFIG_GENERIC_CALIBRATE_DELAY=y
81CONFIG_HAVE_DEC_LOCK=y 81CONFIG_HAVE_DEC_LOCK=y
82CONFIG_DMA_NONCOHERENT=y 82CONFIG_DMA_NONCOHERENT=y
83CONFIG_DMA_NEED_PCI_MAP_STATE=y
83# CONFIG_CPU_LITTLE_ENDIAN is not set 84# CONFIG_CPU_LITTLE_ENDIAN is not set
84CONFIG_IRQ_CPU=y 85CONFIG_IRQ_CPU=y
85CONFIG_IRQ_CPU_RM7K=y 86CONFIG_IRQ_CPU_RM7K=y
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 6cdabd550300..813e3a8b480b 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:08 2005 4# Wed Jan 26 02:49:08 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -104,6 +104,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
104CONFIG_GENERIC_CALIBRATE_DELAY=y 104CONFIG_GENERIC_CALIBRATE_DELAY=y
105CONFIG_HAVE_DEC_LOCK=y 105CONFIG_HAVE_DEC_LOCK=y
106CONFIG_DMA_NONCOHERENT=y 106CONFIG_DMA_NONCOHERENT=y
107CONFIG_DMA_NEED_PCI_MAP_STATE=y
107CONFIG_CPU_LITTLE_ENDIAN=y 108CONFIG_CPU_LITTLE_ENDIAN=y
108CONFIG_SWAP_IO_SPACE=y 109CONFIG_SWAP_IO_SPACE=y
109# CONFIG_AU1X00_USB_DEVICE is not set 110# CONFIG_AU1X00_USB_DEVICE is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 2aebbd2e82b3..49e528340a39 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:09 2005 4# Wed Jan 26 02:49:09 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 9e21edc28280..8e426776c098 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:09 2005 4# Wed Jan 26 02:49:09 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
diff --git a/arch/mips/configs/osprey_defconfig b/arch/mips/configs/qemu_defconfig
index 989cb9e7ae83..b6568e421b99 100644
--- a/arch/mips/configs/osprey_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -1,108 +1,133 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc2 3# Linux kernel version: 2.6.13-rc6
4# Wed Jan 26 02:49:08 2005 4# Mon Aug 8 11:49:54 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set
9CONFIG_MIPS32=y
10 7
11# 8#
12# Code maturity level options 9# Code maturity level options
13# 10#
14CONFIG_EXPERIMENTAL=y 11# CONFIG_EXPERIMENTAL is not set
15CONFIG_CLEAN_COMPILE=y 12CONFIG_CLEAN_COMPILE=y
16CONFIG_BROKEN_ON_SMP=y 13CONFIG_BROKEN_ON_SMP=y
14CONFIG_INIT_ENV_ARG_LIMIT=32
17 15
18# 16#
19# General setup 17# General setup
20# 18#
21CONFIG_LOCALVERSION="" 19CONFIG_LOCALVERSION=""
22CONFIG_SWAP=y 20# CONFIG_SWAP is not set
23CONFIG_SYSVIPC=y 21# CONFIG_SYSVIPC is not set
24# CONFIG_POSIX_MQUEUE is not set
25# CONFIG_BSD_PROCESS_ACCT is not set 22# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 23# CONFIG_SYSCTL is not set
27# CONFIG_AUDIT is not set 24# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set 25# CONFIG_HOTPLUG is not set
30CONFIG_KOBJECT_UEVENT=y 26CONFIG_KOBJECT_UEVENT=y
31# CONFIG_IKCONFIG is not set 27# CONFIG_IKCONFIG is not set
32CONFIG_EMBEDDED=y 28CONFIG_EMBEDDED=y
33CONFIG_KALLSYMS=y 29CONFIG_KALLSYMS=y
34# CONFIG_KALLSYMS_EXTRA_PASS is not set 30# CONFIG_KALLSYMS_EXTRA_PASS is not set
35CONFIG_FUTEX=y 31CONFIG_PRINTK=y
36CONFIG_EPOLL=y 32# CONFIG_BUG is not set
33# CONFIG_BASE_FULL is not set
34# CONFIG_FUTEX is not set
35# CONFIG_EPOLL is not set
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
38CONFIG_SHMEM=y 37# CONFIG_SHMEM is not set
39CONFIG_CC_ALIGN_FUNCTIONS=0 38CONFIG_CC_ALIGN_FUNCTIONS=0
40CONFIG_CC_ALIGN_LABELS=0 39CONFIG_CC_ALIGN_LABELS=0
41CONFIG_CC_ALIGN_LOOPS=0 40CONFIG_CC_ALIGN_LOOPS=0
42CONFIG_CC_ALIGN_JUMPS=0 41CONFIG_CC_ALIGN_JUMPS=0
43# CONFIG_TINY_SHMEM is not set 42CONFIG_TINY_SHMEM=y
43CONFIG_BASE_SMALL=1
44 44
45# 45#
46# Loadable module support 46# Loadable module support
47# 47#
48CONFIG_MODULES=y 48# CONFIG_MODULES is not set
49CONFIG_MODULE_UNLOAD=y
50# CONFIG_MODULE_FORCE_UNLOAD is not set
51CONFIG_OBSOLETE_MODPARM=y
52CONFIG_MODVERSIONS=y
53CONFIG_MODULE_SRCVERSION_ALL=y
54CONFIG_KMOD=y
55 49
56# 50#
57# Machine selection 51# Machine selection
58# 52#
59# CONFIG_MACH_JAZZ is not set 53# CONFIG_MIPS_MTX1 is not set
60# CONFIG_MACH_VR41XX is not set 54# CONFIG_MIPS_BOSPORUS is not set
61# CONFIG_TOSHIBA_JMR3927 is not set 55# CONFIG_MIPS_PB1000 is not set
56# CONFIG_MIPS_PB1100 is not set
57# CONFIG_MIPS_PB1500 is not set
58# CONFIG_MIPS_PB1550 is not set
59# CONFIG_MIPS_PB1200 is not set
60# CONFIG_MIPS_DB1000 is not set
61# CONFIG_MIPS_DB1100 is not set
62# CONFIG_MIPS_DB1500 is not set
63# CONFIG_MIPS_DB1550 is not set
64# CONFIG_MIPS_DB1200 is not set
65# CONFIG_MIPS_MIRAGE is not set
62# CONFIG_MIPS_COBALT is not set 66# CONFIG_MIPS_COBALT is not set
63# CONFIG_MACH_DECSTATION is not set 67# CONFIG_MACH_DECSTATION is not set
64# CONFIG_MIPS_EV64120 is not set 68# CONFIG_MIPS_EV64120 is not set
65# CONFIG_MIPS_EV96100 is not set 69# CONFIG_MIPS_EV96100 is not set
66# CONFIG_MIPS_IVR is not set 70# CONFIG_MIPS_IVR is not set
67# CONFIG_LASAT is not set
68# CONFIG_MIPS_ITE8172 is not set 71# CONFIG_MIPS_ITE8172 is not set
72# CONFIG_MACH_JAZZ is not set
73# CONFIG_LASAT is not set
69# CONFIG_MIPS_ATLAS is not set 74# CONFIG_MIPS_ATLAS is not set
70# CONFIG_MIPS_MALTA is not set 75# CONFIG_MIPS_MALTA is not set
71# CONFIG_MIPS_SEAD is not set 76# CONFIG_MIPS_SEAD is not set
77# CONFIG_MOMENCO_JAGUAR_ATX is not set
72# CONFIG_MOMENCO_OCELOT is not set 78# CONFIG_MOMENCO_OCELOT is not set
73# CONFIG_MOMENCO_OCELOT_G is not set
74# CONFIG_MOMENCO_OCELOT_C is not set
75# CONFIG_MOMENCO_OCELOT_3 is not set 79# CONFIG_MOMENCO_OCELOT_3 is not set
76# CONFIG_MOMENCO_JAGUAR_ATX is not set 80# CONFIG_MOMENCO_OCELOT_C is not set
77# CONFIG_PMC_YOSEMITE is not set 81# CONFIG_MOMENCO_OCELOT_G is not set
82# CONFIG_MIPS_XXS1500 is not set
83# CONFIG_PNX8550_V2PCI is not set
84# CONFIG_PNX8550_JBS is not set
78# CONFIG_DDB5074 is not set 85# CONFIG_DDB5074 is not set
79# CONFIG_DDB5476 is not set 86# CONFIG_DDB5476 is not set
80# CONFIG_DDB5477 is not set 87# CONFIG_DDB5477 is not set
81CONFIG_NEC_OSPREY=y 88# CONFIG_MACH_VR41XX is not set
89# CONFIG_PMC_YOSEMITE is not set
90CONFIG_QEMU=y
82# CONFIG_SGI_IP22 is not set 91# CONFIG_SGI_IP22 is not set
83# CONFIG_SOC_AU1X00 is not set 92# CONFIG_SGI_IP27 is not set
84# CONFIG_SIBYTE_SB1xxx_SOC is not set 93# CONFIG_SGI_IP32 is not set
94# CONFIG_SIBYTE_SWARM is not set
95# CONFIG_SIBYTE_SENTOSA is not set
96# CONFIG_SIBYTE_RHONE is not set
97# CONFIG_SIBYTE_CARMEL is not set
98# CONFIG_SIBYTE_PTSWARM is not set
99# CONFIG_SIBYTE_LITTLESUR is not set
100# CONFIG_SIBYTE_CRHINE is not set
101# CONFIG_SIBYTE_CRHONE is not set
85# CONFIG_SNI_RM200_PCI is not set 102# CONFIG_SNI_RM200_PCI is not set
103# CONFIG_TOSHIBA_JMR3927 is not set
86# CONFIG_TOSHIBA_RBTX4927 is not set 104# CONFIG_TOSHIBA_RBTX4927 is not set
105# CONFIG_TOSHIBA_RBTX4938 is not set
87CONFIG_RWSEM_GENERIC_SPINLOCK=y 106CONFIG_RWSEM_GENERIC_SPINLOCK=y
88CONFIG_GENERIC_CALIBRATE_DELAY=y 107CONFIG_GENERIC_CALIBRATE_DELAY=y
89CONFIG_HAVE_DEC_LOCK=y 108CONFIG_HAVE_DEC_LOCK=y
90CONFIG_DMA_NONCOHERENT=y 109CONFIG_DMA_COHERENT=y
91CONFIG_CPU_LITTLE_ENDIAN=y 110CONFIG_GENERIC_ISA_DMA=y
92CONFIG_IRQ_CPU=y 111CONFIG_I8259=y
112CONFIG_CPU_BIG_ENDIAN=y
113# CONFIG_CPU_LITTLE_ENDIAN is not set
114CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
115CONFIG_SWAP_IO_SPACE=y
93CONFIG_MIPS_L1_CACHE_SHIFT=5 116CONFIG_MIPS_L1_CACHE_SHIFT=5
94CONFIG_VR4181=y 117CONFIG_HAVE_STD_PC_SERIAL_PORT=y
95 118
96# 119#
97# CPU selection 120# CPU selection
98# 121#
99# CONFIG_CPU_MIPS32 is not set 122# CONFIG_CPU_MIPS32_R1 is not set
100# CONFIG_CPU_MIPS64 is not set 123# CONFIG_CPU_MIPS32_R2 is not set
124# CONFIG_CPU_MIPS64_R1 is not set
125# CONFIG_CPU_MIPS64_R2 is not set
101# CONFIG_CPU_R3000 is not set 126# CONFIG_CPU_R3000 is not set
102# CONFIG_CPU_TX39XX is not set 127# CONFIG_CPU_TX39XX is not set
103CONFIG_CPU_VR41XX=y 128# CONFIG_CPU_VR41XX is not set
104# CONFIG_CPU_R4300 is not set 129# CONFIG_CPU_R4300 is not set
105# CONFIG_CPU_R4X00 is not set 130CONFIG_CPU_R4X00=y
106# CONFIG_CPU_TX49XX is not set 131# CONFIG_CPU_TX49XX is not set
107# CONFIG_CPU_R5000 is not set 132# CONFIG_CPU_R5000 is not set
108# CONFIG_CPU_R5432 is not set 133# CONFIG_CPU_R5432 is not set
@@ -113,17 +138,36 @@ CONFIG_CPU_VR41XX=y
113# CONFIG_CPU_RM7000 is not set 138# CONFIG_CPU_RM7000 is not set
114# CONFIG_CPU_RM9000 is not set 139# CONFIG_CPU_RM9000 is not set
115# CONFIG_CPU_SB1 is not set 140# CONFIG_CPU_SB1 is not set
141CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
142CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
143CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
144
145#
146# Kernel type
147#
148CONFIG_32BIT=y
149# CONFIG_64BIT is not set
116CONFIG_PAGE_SIZE_4KB=y 150CONFIG_PAGE_SIZE_4KB=y
117# CONFIG_PAGE_SIZE_8KB is not set 151# CONFIG_PAGE_SIZE_8KB is not set
118# CONFIG_PAGE_SIZE_16KB is not set 152# CONFIG_PAGE_SIZE_16KB is not set
119# CONFIG_PAGE_SIZE_64KB is not set 153# CONFIG_PAGE_SIZE_64KB is not set
154# CONFIG_MIPS_MT is not set
155# CONFIG_64BIT_PHYS_ADDR is not set
120# CONFIG_CPU_ADVANCED is not set 156# CONFIG_CPU_ADVANCED is not set
157CONFIG_CPU_HAS_LLSC=y
158CONFIG_CPU_HAS_LLDSCD=y
121CONFIG_CPU_HAS_SYNC=y 159CONFIG_CPU_HAS_SYNC=y
160CONFIG_ARCH_FLATMEM_ENABLE=y
161CONFIG_FLATMEM=y
162CONFIG_FLAT_NODE_MEM_MAP=y
163CONFIG_PREEMPT_NONE=y
164# CONFIG_PREEMPT_VOLUNTARY is not set
122# CONFIG_PREEMPT is not set 165# CONFIG_PREEMPT is not set
123 166
124# 167#
125# Bus options (PCI, PCMCIA, EISA, ISA, TC) 168# Bus options (PCI, PCMCIA, EISA, ISA, TC)
126# 169#
170CONFIG_ISA=y
127CONFIG_MMU=y 171CONFIG_MMU=y
128 172
129# 173#
@@ -132,10 +176,6 @@ CONFIG_MMU=y
132# CONFIG_PCCARD is not set 176# CONFIG_PCCARD is not set
133 177
134# 178#
135# PC-card bridges
136#
137
138#
139# PCI Hotplug Support 179# PCI Hotplug Support
140# 180#
141 181
@@ -147,6 +187,56 @@ CONFIG_BINFMT_ELF=y
147CONFIG_TRAD_SIGNALS=y 187CONFIG_TRAD_SIGNALS=y
148 188
149# 189#
190# Networking
191#
192CONFIG_NET=y
193
194#
195# Networking options
196#
197CONFIG_PACKET=y
198CONFIG_PACKET_MMAP=y
199CONFIG_UNIX=y
200# CONFIG_NET_KEY is not set
201CONFIG_INET=y
202CONFIG_IP_MULTICAST=y
203# CONFIG_IP_ADVANCED_ROUTER is not set
204CONFIG_IP_FIB_HASH=y
205CONFIG_IP_PNP=y
206CONFIG_IP_PNP_DHCP=y
207CONFIG_IP_PNP_BOOTP=y
208# CONFIG_IP_PNP_RARP is not set
209# CONFIG_NET_IPIP is not set
210# CONFIG_NET_IPGRE is not set
211# CONFIG_IP_MROUTE is not set
212# CONFIG_SYN_COOKIES is not set
213# CONFIG_INET_AH is not set
214# CONFIG_INET_ESP is not set
215# CONFIG_INET_IPCOMP is not set
216# CONFIG_INET_TUNNEL is not set
217CONFIG_IP_TCPDIAG=y
218# CONFIG_IP_TCPDIAG_IPV6 is not set
219# CONFIG_TCP_CONG_ADVANCED is not set
220CONFIG_TCP_CONG_BIC=y
221# CONFIG_IPV6 is not set
222# CONFIG_NETFILTER is not set
223# CONFIG_BRIDGE is not set
224# CONFIG_VLAN_8021Q is not set
225# CONFIG_DECNET is not set
226# CONFIG_LLC2 is not set
227# CONFIG_IPX is not set
228# CONFIG_ATALK is not set
229# CONFIG_NET_SCHED is not set
230# CONFIG_NET_CLS_ROUTE is not set
231
232#
233# Network testing
234#
235# CONFIG_HAMRADIO is not set
236# CONFIG_IRDA is not set
237# CONFIG_BT is not set
238
239#
150# Device Drivers 240# Device Drivers
151# 241#
152 242
@@ -154,7 +244,7 @@ CONFIG_TRAD_SIGNALS=y
154# Generic Driver Options 244# Generic Driver Options
155# 245#
156CONFIG_STANDALONE=y 246CONFIG_STANDALONE=y
157CONFIG_PREVENT_FIRMWARE_BUILD=y 247# CONFIG_PREVENT_FIRMWARE_BUILD is not set
158# CONFIG_FW_LOADER is not set 248# CONFIG_FW_LOADER is not set
159 249
160# 250#
@@ -170,6 +260,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
170# 260#
171# Plug and Play support 261# Plug and Play support
172# 262#
263# CONFIG_PNP is not set
173 264
174# 265#
175# Block devices 266# Block devices
@@ -181,19 +272,16 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
181# CONFIG_BLK_DEV_RAM is not set 272# CONFIG_BLK_DEV_RAM is not set
182CONFIG_BLK_DEV_RAM_COUNT=16 273CONFIG_BLK_DEV_RAM_COUNT=16
183CONFIG_INITRAMFS_SOURCE="" 274CONFIG_INITRAMFS_SOURCE=""
184# CONFIG_LBD is not set 275# CONFIG_CDROM_PKTCDVD is not set
185CONFIG_CDROM_PKTCDVD=m
186CONFIG_CDROM_PKTCDVD_BUFFERS=8
187# CONFIG_CDROM_PKTCDVD_WCACHE is not set
188 276
189# 277#
190# IO Schedulers 278# IO Schedulers
191# 279#
192CONFIG_IOSCHED_NOOP=y 280CONFIG_IOSCHED_NOOP=y
193CONFIG_IOSCHED_AS=y 281# CONFIG_IOSCHED_AS is not set
194CONFIG_IOSCHED_DEADLINE=y 282# CONFIG_IOSCHED_DEADLINE is not set
195CONFIG_IOSCHED_CFQ=y 283# CONFIG_IOSCHED_CFQ is not set
196CONFIG_ATA_OVER_ETH=m 284# CONFIG_ATA_OVER_ETH is not set
197 285
198# 286#
199# ATA/ATAPI/MFM/RLL support 287# ATA/ATAPI/MFM/RLL support
@@ -206,6 +294,11 @@ CONFIG_ATA_OVER_ETH=m
206# CONFIG_SCSI is not set 294# CONFIG_SCSI is not set
207 295
208# 296#
297# Old CD-ROM drivers (not SCSI, not IDE)
298#
299# CONFIG_CD_NO_IDESCSI is not set
300
301#
209# Multi-device support (RAID and LVM) 302# Multi-device support (RAID and LVM)
210# 303#
211# CONFIG_MD is not set 304# CONFIG_MD is not set
@@ -213,6 +306,7 @@ CONFIG_ATA_OVER_ETH=m
213# 306#
214# Fusion MPT device support 307# Fusion MPT device support
215# 308#
309# CONFIG_FUSION is not set
216 310
217# 311#
218# IEEE 1394 (FireWire) support 312# IEEE 1394 (FireWire) support
@@ -223,84 +317,41 @@ CONFIG_ATA_OVER_ETH=m
223# 317#
224 318
225# 319#
226# Networking support 320# Network device support
227#
228CONFIG_NET=y
229
230#
231# Networking options
232# 321#
233CONFIG_PACKET=y
234# CONFIG_PACKET_MMAP is not set
235CONFIG_NETLINK_DEV=y
236CONFIG_UNIX=y
237CONFIG_NET_KEY=y
238CONFIG_INET=y
239# CONFIG_IP_MULTICAST is not set
240# CONFIG_IP_ADVANCED_ROUTER is not set
241CONFIG_IP_PNP=y
242# CONFIG_IP_PNP_DHCP is not set
243CONFIG_IP_PNP_BOOTP=y
244# CONFIG_IP_PNP_RARP is not set
245# CONFIG_NET_IPIP is not set
246# CONFIG_NET_IPGRE is not set
247# CONFIG_ARPD is not set
248# CONFIG_SYN_COOKIES is not set
249# CONFIG_INET_AH is not set
250# CONFIG_INET_ESP is not set
251# CONFIG_INET_IPCOMP is not set
252CONFIG_INET_TUNNEL=m
253CONFIG_IP_TCPDIAG=m
254# CONFIG_IP_TCPDIAG_IPV6 is not set
255# CONFIG_IPV6 is not set
256# CONFIG_NETFILTER is not set
257CONFIG_XFRM=y
258CONFIG_XFRM_USER=m
259
260#
261# SCTP Configuration (EXPERIMENTAL)
262#
263# CONFIG_IP_SCTP is not set
264# CONFIG_ATM is not set
265# CONFIG_BRIDGE is not set
266# CONFIG_VLAN_8021Q is not set
267# CONFIG_DECNET is not set
268# CONFIG_LLC2 is not set
269# CONFIG_IPX is not set
270# CONFIG_ATALK is not set
271# CONFIG_X25 is not set
272# CONFIG_LAPB is not set
273# CONFIG_NET_DIVERT is not set
274# CONFIG_ECONET is not set
275# CONFIG_WAN_ROUTER is not set
276
277#
278# QoS and/or fair queueing
279#
280# CONFIG_NET_SCHED is not set
281# CONFIG_NET_CLS_ROUTE is not set
282
283#
284# Network testing
285#
286# CONFIG_NET_PKTGEN is not set
287# CONFIG_NETPOLL is not set
288# CONFIG_NET_POLL_CONTROLLER is not set
289# CONFIG_HAMRADIO is not set
290# CONFIG_IRDA is not set
291# CONFIG_BT is not set
292CONFIG_NETDEVICES=y 322CONFIG_NETDEVICES=y
293# CONFIG_DUMMY is not set 323# CONFIG_DUMMY is not set
294# CONFIG_BONDING is not set 324# CONFIG_BONDING is not set
295# CONFIG_EQUALIZER is not set 325# CONFIG_EQUALIZER is not set
296# CONFIG_TUN is not set 326# CONFIG_TUN is not set
297# CONFIG_ETHERTAP is not set 327
328#
329# ARCnet devices
330#
331# CONFIG_ARCNET is not set
298 332
299# 333#
300# Ethernet (10 or 100Mbit) 334# Ethernet (10 or 100Mbit)
301# 335#
302CONFIG_NET_ETHERNET=y 336CONFIG_NET_ETHERNET=y
303# CONFIG_MII is not set 337CONFIG_MII=y
338# CONFIG_NET_VENDOR_3COM is not set
339# CONFIG_NET_VENDOR_SMC is not set
340# CONFIG_NET_VENDOR_RACAL is not set
341# CONFIG_DEPCA is not set
342# CONFIG_HP100 is not set
343CONFIG_NET_ISA=y
344# CONFIG_E2100 is not set
345# CONFIG_EWRK3 is not set
346# CONFIG_EEXPRESS is not set
347# CONFIG_EEXPRESS_PRO is not set
348# CONFIG_HPLAN_PLUS is not set
349# CONFIG_HPLAN is not set
350# CONFIG_LP486E is not set
351# CONFIG_ETH16I is not set
352CONFIG_NE2000=y
353# CONFIG_NET_PCI is not set
354# CONFIG_NET_POCKET is not set
304 355
305# 356#
306# Ethernet (1000 Mbit) 357# Ethernet (1000 Mbit)
@@ -313,6 +364,7 @@ CONFIG_NET_ETHERNET=y
313# 364#
314# Token Ring devices 365# Token Ring devices
315# 366#
367# CONFIG_TR is not set
316 368
317# 369#
318# Wireless LAN (non-hamradio) 370# Wireless LAN (non-hamradio)
@@ -325,8 +377,8 @@ CONFIG_NET_ETHERNET=y
325# CONFIG_WAN is not set 377# CONFIG_WAN is not set
326# CONFIG_PPP is not set 378# CONFIG_PPP is not set
327# CONFIG_SLIP is not set 379# CONFIG_SLIP is not set
328# CONFIG_SHAPER is not set 380# CONFIG_NETPOLL is not set
329# CONFIG_NETCONSOLE is not set 381# CONFIG_NET_POLL_CONTROLLER is not set
330 382
331# 383#
332# ISDN subsystem 384# ISDN subsystem
@@ -346,28 +398,13 @@ CONFIG_INPUT=y
346# 398#
347# Userland interfaces 399# Userland interfaces
348# 400#
349CONFIG_INPUT_MOUSEDEV=y 401# CONFIG_INPUT_MOUSEDEV is not set
350CONFIG_INPUT_MOUSEDEV_PSAUX=y
351CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
352CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
353# CONFIG_INPUT_JOYDEV is not set 402# CONFIG_INPUT_JOYDEV is not set
354# CONFIG_INPUT_TSDEV is not set 403# CONFIG_INPUT_TSDEV is not set
355# CONFIG_INPUT_EVDEV is not set 404# CONFIG_INPUT_EVDEV is not set
356# CONFIG_INPUT_EVBUG is not set 405# CONFIG_INPUT_EVBUG is not set
357 406
358# 407#
359# Input I/O drivers
360#
361# CONFIG_GAMEPORT is not set
362CONFIG_SOUND_GAMEPORT=y
363CONFIG_SERIO=y
364# CONFIG_SERIO_I8042 is not set
365CONFIG_SERIO_SERPORT=y
366# CONFIG_SERIO_CT82C710 is not set
367# CONFIG_SERIO_LIBPS2 is not set
368CONFIG_SERIO_RAW=m
369
370#
371# Input Device Drivers 408# Input Device Drivers
372# 409#
373# CONFIG_INPUT_KEYBOARD is not set 410# CONFIG_INPUT_KEYBOARD is not set
@@ -377,6 +414,12 @@ CONFIG_SERIO_RAW=m
377# CONFIG_INPUT_MISC is not set 414# CONFIG_INPUT_MISC is not set
378 415
379# 416#
417# Hardware I/O ports
418#
419# CONFIG_SERIO is not set
420# CONFIG_GAMEPORT is not set
421
422#
380# Character devices 423# Character devices
381# 424#
382CONFIG_VT=y 425CONFIG_VT=y
@@ -397,9 +440,8 @@ CONFIG_SERIAL_8250_NR_UARTS=4
397# 440#
398CONFIG_SERIAL_CORE=y 441CONFIG_SERIAL_CORE=y
399CONFIG_SERIAL_CORE_CONSOLE=y 442CONFIG_SERIAL_CORE_CONSOLE=y
400CONFIG_UNIX98_PTYS=y 443# CONFIG_UNIX98_PTYS is not set
401CONFIG_LEGACY_PTYS=y 444# CONFIG_LEGACY_PTYS is not set
402CONFIG_LEGACY_PTY_COUNT=256
403 445
404# 446#
405# IPMI 447# IPMI
@@ -418,13 +460,17 @@ CONFIG_LEGACY_PTY_COUNT=256
418# 460#
419# Ftape, the floppy tape device driver 461# Ftape, the floppy tape device driver
420# 462#
421# CONFIG_DRM is not set
422# CONFIG_RAW_DRIVER is not set 463# CONFIG_RAW_DRIVER is not set
423 464
424# 465#
466# TPM devices
467#
468
469#
425# I2C support 470# I2C support
426# 471#
427# CONFIG_I2C is not set 472# CONFIG_I2C is not set
473# CONFIG_I2C_SENSOR is not set
428 474
429# 475#
430# Dallas's 1-wire bus 476# Dallas's 1-wire bus
@@ -432,6 +478,11 @@ CONFIG_LEGACY_PTY_COUNT=256
432# CONFIG_W1 is not set 478# CONFIG_W1 is not set
433 479
434# 480#
481# Hardware Monitoring support
482#
483# CONFIG_HWMON is not set
484
485#
435# Misc devices 486# Misc devices
436# 487#
437 488
@@ -453,9 +504,9 @@ CONFIG_LEGACY_PTY_COUNT=256
453# 504#
454# Console display driver support 505# Console display driver support
455# 506#
456# CONFIG_VGA_CONSOLE is not set 507CONFIG_VGA_CONSOLE=y
508# CONFIG_MDA_CONSOLE is not set
457CONFIG_DUMMY_CONSOLE=y 509CONFIG_DUMMY_CONSOLE=y
458# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
459 510
460# 511#
461# Sound 512# Sound
@@ -469,10 +520,6 @@ CONFIG_DUMMY_CONSOLE=y
469# CONFIG_USB_ARCH_HAS_OHCI is not set 520# CONFIG_USB_ARCH_HAS_OHCI is not set
470 521
471# 522#
472# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
473#
474
475#
476# USB Gadget Support 523# USB Gadget Support
477# 524#
478# CONFIG_USB_GADGET is not set 525# CONFIG_USB_GADGET is not set
@@ -488,19 +535,28 @@ CONFIG_DUMMY_CONSOLE=y
488# CONFIG_INFINIBAND is not set 535# CONFIG_INFINIBAND is not set
489 536
490# 537#
538# SN Devices
539#
540
541#
491# File systems 542# File systems
492# 543#
493CONFIG_EXT2_FS=y 544# CONFIG_EXT2_FS is not set
494# CONFIG_EXT2_FS_XATTR is not set
495# CONFIG_EXT3_FS is not set 545# CONFIG_EXT3_FS is not set
496# CONFIG_JBD is not set 546# CONFIG_JBD is not set
497# CONFIG_REISERFS_FS is not set 547# CONFIG_REISERFS_FS is not set
498# CONFIG_JFS_FS is not set 548# CONFIG_JFS_FS is not set
549# CONFIG_FS_POSIX_ACL is not set
550
551#
552# XFS support
553#
499# CONFIG_XFS_FS is not set 554# CONFIG_XFS_FS is not set
500# CONFIG_MINIX_FS is not set 555# CONFIG_MINIX_FS is not set
501# CONFIG_ROMFS_FS is not set 556# CONFIG_ROMFS_FS is not set
557CONFIG_INOTIFY=y
502# CONFIG_QUOTA is not set 558# CONFIG_QUOTA is not set
503CONFIG_DNOTIFY=y 559# CONFIG_DNOTIFY is not set
504# CONFIG_AUTOFS_FS is not set 560# CONFIG_AUTOFS_FS is not set
505# CONFIG_AUTOFS4_FS is not set 561# CONFIG_AUTOFS4_FS is not set
506 562
@@ -520,12 +576,8 @@ CONFIG_DNOTIFY=y
520# 576#
521# Pseudo filesystems 577# Pseudo filesystems
522# 578#
523CONFIG_PROC_FS=y 579# CONFIG_PROC_FS is not set
524CONFIG_PROC_KCORE=y 580# CONFIG_SYSFS is not set
525CONFIG_SYSFS=y
526# CONFIG_DEVFS_FS is not set
527CONFIG_DEVPTS_FS_XATTR=y
528CONFIG_DEVPTS_FS_SECURITY=y
529# CONFIG_TMPFS is not set 581# CONFIG_TMPFS is not set
530# CONFIG_HUGETLB_PAGE is not set 582# CONFIG_HUGETLB_PAGE is not set
531CONFIG_RAMFS=y 583CONFIG_RAMFS=y
@@ -533,13 +585,7 @@ CONFIG_RAMFS=y
533# 585#
534# Miscellaneous filesystems 586# Miscellaneous filesystems
535# 587#
536# CONFIG_ADFS_FS is not set
537# CONFIG_AFFS_FS is not set
538# CONFIG_HFS_FS is not set
539# CONFIG_HFSPLUS_FS is not set 588# CONFIG_HFSPLUS_FS is not set
540# CONFIG_BEFS_FS is not set
541# CONFIG_BFS_FS is not set
542# CONFIG_EFS_FS is not set
543# CONFIG_CRAMFS is not set 589# CONFIG_CRAMFS is not set
544# CONFIG_VXFS_FS is not set 590# CONFIG_VXFS_FS is not set
545# CONFIG_HPFS_FS is not set 591# CONFIG_HPFS_FS is not set
@@ -551,23 +597,18 @@ CONFIG_RAMFS=y
551# Network File Systems 597# Network File Systems
552# 598#
553CONFIG_NFS_FS=y 599CONFIG_NFS_FS=y
554# CONFIG_NFS_V3 is not set 600CONFIG_NFS_V3=y
555# CONFIG_NFS_V4 is not set 601# CONFIG_NFS_V3_ACL is not set
556# CONFIG_NFS_DIRECTIO is not set 602# CONFIG_NFSD is not set
557CONFIG_NFSD=y
558# CONFIG_NFSD_V3 is not set
559# CONFIG_NFSD_TCP is not set
560CONFIG_ROOT_NFS=y 603CONFIG_ROOT_NFS=y
561CONFIG_LOCKD=y 604CONFIG_LOCKD=y
562CONFIG_EXPORTFS=y 605CONFIG_LOCKD_V4=y
606CONFIG_NFS_COMMON=y
563CONFIG_SUNRPC=y 607CONFIG_SUNRPC=y
564# CONFIG_RPCSEC_GSS_KRB5 is not set
565# CONFIG_RPCSEC_GSS_SPKM3 is not set
566# CONFIG_SMB_FS is not set 608# CONFIG_SMB_FS is not set
567# CONFIG_CIFS is not set 609# CONFIG_CIFS is not set
568# CONFIG_NCP_FS is not set 610# CONFIG_NCP_FS is not set
569# CONFIG_CODA_FS is not set 611# CONFIG_CODA_FS is not set
570# CONFIG_AFS_FS is not set
571 612
572# 613#
573# Partition Types 614# Partition Types
@@ -581,22 +622,18 @@ CONFIG_MSDOS_PARTITION=y
581# CONFIG_NLS is not set 622# CONFIG_NLS is not set
582 623
583# 624#
584# Profiling support
585#
586# CONFIG_PROFILING is not set
587
588#
589# Kernel hacking 625# Kernel hacking
590# 626#
627# CONFIG_PRINTK_TIME is not set
591# CONFIG_DEBUG_KERNEL is not set 628# CONFIG_DEBUG_KERNEL is not set
629CONFIG_LOG_BUF_SHIFT=14
592CONFIG_CROSSCOMPILE=y 630CONFIG_CROSSCOMPILE=y
593CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0" 631CONFIG_CMDLINE="console=ttyS0 debug ip=172.20.0.2:172.20.0.1::255.255.0.0"
594 632
595# 633#
596# Security options 634# Security options
597# 635#
598CONFIG_KEYS=y 636# CONFIG_KEYS is not set
599CONFIG_KEYS_DEBUG_PROC_KEYS=y
600# CONFIG_SECURITY is not set 637# CONFIG_SECURITY is not set
601 638
602# 639#
@@ -612,7 +649,7 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
612# Library routines 649# Library routines
613# 650#
614# CONFIG_CRC_CCITT is not set 651# CONFIG_CRC_CCITT is not set
615# CONFIG_CRC32 is not set 652CONFIG_CRC32=y
616CONFIG_LIBCRC32C=m 653# CONFIG_LIBCRC32C is not set
617CONFIG_GENERIC_HARDIRQS=y 654CONFIG_GENERIC_HARDIRQS=y
618CONFIG_GENERIC_IRQ_PROBE=y 655CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index d0c85a4009d6..17d4fce6c4c6 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:09 2005 4# Wed Jan 26 02:49:09 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -91,6 +91,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
91CONFIG_HAVE_DEC_LOCK=y 91CONFIG_HAVE_DEC_LOCK=y
92CONFIG_ARC=y 92CONFIG_ARC=y
93CONFIG_DMA_NONCOHERENT=y 93CONFIG_DMA_NONCOHERENT=y
94CONFIG_DMA_NEED_PCI_MAP_STATE=y
94CONFIG_GENERIC_ISA_DMA=y 95CONFIG_GENERIC_ISA_DMA=y
95CONFIG_I8259=y 96CONFIG_I8259=y
96CONFIG_CPU_LITTLE_ENDIAN=y 97CONFIG_CPU_LITTLE_ENDIAN=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 84978b70714b..1dc935f37582 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:10 2005 4# Wed Jan 26 02:49:10 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index 7c718a429b04..dd07e866b128 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:10 2005 4# Wed Jan 26 02:49:10 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -80,6 +80,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
80CONFIG_GENERIC_CALIBRATE_DELAY=y 80CONFIG_GENERIC_CALIBRATE_DELAY=y
81CONFIG_HAVE_DEC_LOCK=y 81CONFIG_HAVE_DEC_LOCK=y
82CONFIG_DMA_NONCOHERENT=y 82CONFIG_DMA_NONCOHERENT=y
83CONFIG_DMA_NEED_PCI_MAP_STATE=y
83CONFIG_CPU_LITTLE_ENDIAN=y 84CONFIG_CPU_LITTLE_ENDIAN=y
84CONFIG_IRQ_CPU=y 85CONFIG_IRQ_CPU=y
85CONFIG_MIPS_BOARDS_GEN=y 86CONFIG_MIPS_BOARDS_GEN=y
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index e01727cd0fe9..c9d3f83caf0f 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:12 2005 4# Wed Jan 26 02:49:12 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -95,6 +95,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
95CONFIG_GENERIC_CALIBRATE_DELAY=y 95CONFIG_GENERIC_CALIBRATE_DELAY=y
96CONFIG_HAVE_DEC_LOCK=y 96CONFIG_HAVE_DEC_LOCK=y
97CONFIG_DMA_NONCOHERENT=y 97CONFIG_DMA_NONCOHERENT=y
98CONFIG_DMA_NEED_PCI_MAP_STATE=y
98CONFIG_CPU_LITTLE_ENDIAN=y 99CONFIG_CPU_LITTLE_ENDIAN=y
99CONFIG_IRQ_CPU=y 100CONFIG_IRQ_CPU=y
100CONFIG_MIPS_L1_CACHE_SHIFT=5 101CONFIG_MIPS_L1_CACHE_SHIFT=5
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig
index c6ba3de27614..2cb669188aa9 100644
--- a/arch/mips/configs/tb0229_defconfig
+++ b/arch/mips/configs/tb0229_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:12 2005 4# Wed Jan 26 02:49:12 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -98,6 +98,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
98CONFIG_GENERIC_CALIBRATE_DELAY=y 98CONFIG_GENERIC_CALIBRATE_DELAY=y
99CONFIG_HAVE_DEC_LOCK=y 99CONFIG_HAVE_DEC_LOCK=y
100CONFIG_DMA_NONCOHERENT=y 100CONFIG_DMA_NONCOHERENT=y
101CONFIG_DMA_NEED_PCI_MAP_STATE=y
101CONFIG_CPU_LITTLE_ENDIAN=y 102CONFIG_CPU_LITTLE_ENDIAN=y
102CONFIG_IRQ_CPU=y 103CONFIG_IRQ_CPU=y
103CONFIG_MIPS_L1_CACHE_SHIFT=5 104CONFIG_MIPS_L1_CACHE_SHIFT=5
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index 915c43b6e2d9..16e07fca446f 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:12 2005 4# Wed Jan 26 02:49:12 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -96,6 +96,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
96CONFIG_GENERIC_CALIBRATE_DELAY=y 96CONFIG_GENERIC_CALIBRATE_DELAY=y
97CONFIG_HAVE_DEC_LOCK=y 97CONFIG_HAVE_DEC_LOCK=y
98CONFIG_DMA_NONCOHERENT=y 98CONFIG_DMA_NONCOHERENT=y
99CONFIG_DMA_NEED_PCI_MAP_STATE=y
99CONFIG_CPU_LITTLE_ENDIAN=y 100CONFIG_CPU_LITTLE_ENDIAN=y
100CONFIG_IRQ_CPU=y 101CONFIG_IRQ_CPU=y
101CONFIG_MIPS_L1_CACHE_SHIFT=5 102CONFIG_MIPS_L1_CACHE_SHIFT=5
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index 562f2b8043ac..6d2290777ad7 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:49:13 2005 4# Wed Jan 26 02:49:13 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c
index 5f027bfa4af8..9ffe1a9142ca 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq.c
@@ -76,7 +76,7 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger)
76extern void vrc5477_irq_init(u32 base); 76extern void vrc5477_irq_init(u32 base);
77extern void mips_cpu_irq_init(u32 base); 77extern void mips_cpu_irq_init(u32 base);
78extern asmlinkage void ddb5477_handle_int(void); 78extern asmlinkage void ddb5477_handle_int(void);
79extern int setup_irq(unsigned int irq, struct irqaction *irqaction); 79extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
80static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; 80static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
81 81
82void __init arch_init_irq(void) 82void __init arch_init_irq(void)
@@ -94,7 +94,7 @@ void __init arch_init_irq(void)
94 /* setup PCI interrupt attributes */ 94 /* setup PCI interrupt attributes */
95 set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE); 95 set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE);
96 set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE); 96 set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE);
97 if (mips_machtype == MACH_NEC_ROCKHOPPERII) 97 if (mips_machtype == MACH_NEC_ROCKHOPPERII)
98 set_pci_int_attr(PCI0, INTC, ACTIVE_HIGH, LEVEL_SENSE); 98 set_pci_int_attr(PCI0, INTC, ACTIVE_HIGH, LEVEL_SENSE);
99 else 99 else
100 set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE); 100 set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE);
@@ -134,7 +134,7 @@ void __init arch_init_irq(void)
134 134
135 /* setup cascade interrupts */ 135 /* setup cascade interrupts */
136 setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade); 136 setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade);
137 setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade); 137 setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade);
138 138
139 /* hook up the first-level interrupt handler */ 139 /* hook up the first-level interrupt handler */
140 set_except_vector(0, ddb5477_handle_int); 140 set_except_vector(0, ddb5477_handle_int);
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c
index 15c6e543b56f..d62f5a789b05 100644
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@@ -141,7 +141,7 @@ static void __init ddb_time_init(void)
141 141
142 /* mips_hpt_frequency is 1/2 of the cpu core freq */ 142 /* mips_hpt_frequency is 1/2 of the cpu core freq */
143 i = (read_c0_config() >> 28 ) & 7; 143 i = (read_c0_config() >> 28 ) & 7;
144 if ((current_cpu_data.cputype == CPU_R5432) && (i == 3)) 144 if ((current_cpu_data.cputype == CPU_R5432) && (i == 3))
145 i = 4; 145 i = 4;
146 mips_hpt_frequency = bus_frequency*(i+4)/4; 146 mips_hpt_frequency = bus_frequency*(i+4)/4;
147} 147}
@@ -298,11 +298,11 @@ static void __init ddb5477_board_init(void)
298 298
299 if (mips_machtype == MACH_NEC_ROCKHOPPER 299 if (mips_machtype == MACH_NEC_ROCKHOPPER
300 || mips_machtype == MACH_NEC_ROCKHOPPERII) { 300 || mips_machtype == MACH_NEC_ROCKHOPPERII) {
301 /* Disable bus diagnostics. */ 301 /* Disable bus diagnostics. */
302 ddb_out32(DDB_PCICTL0_L, 0); 302 ddb_out32(DDB_PCICTL0_L, 0);
303 ddb_out32(DDB_PCICTL0_H, 0); 303 ddb_out32(DDB_PCICTL0_H, 0);
304 ddb_out32(DDB_PCICTL1_L, 0); 304 ddb_out32(DDB_PCICTL1_L, 0);
305 ddb_out32(DDB_PCICTL1_H, 0); 305 ddb_out32(DDB_PCICTL1_H, 0);
306 } 306 }
307 307
308 if (mips_machtype == MACH_NEC_ROCKHOPPER) { 308 if (mips_machtype == MACH_NEC_ROCKHOPPER) {
@@ -354,7 +354,7 @@ static void __init ddb5477_board_init(void)
354 */ 354 */
355 pci_write_config_byte(&dev_m1533, 0x58, 0x74); 355 pci_write_config_byte(&dev_m1533, 0x58, 0x74);
356 356
357 /* 357 /*
358 * positive decode (bit6 -0) 358 * positive decode (bit6 -0)
359 * enable IDE controler interrupt (bit 4 -1) 359 * enable IDE controler interrupt (bit 4 -1)
360 * setup SIRQ to point to IRQ 14 (bit 3:0 - 1101) 360 * setup SIRQ to point to IRQ 14 (bit 3:0 - 1101)
@@ -364,31 +364,31 @@ static void __init ddb5477_board_init(void)
364 /* Setup M5229 registers */ 364 /* Setup M5229 registers */
365 dev_m5229.bus = &bus; 365 dev_m5229.bus = &bus;
366 dev_m5229.sysdata = NULL; 366 dev_m5229.sysdata = NULL;
367 dev_m5229.devfn = 4*8; // slot 4 (AD15): M5229 IDE 367 dev_m5229.devfn = 4*8; // slot 4 (AD15): M5229 IDE
368 368
369 /* 369 /*
370 * enable IDE in the M5229 config register 0x50 (bit 0 - 1) 370 * enable IDE in the M5229 config register 0x50 (bit 0 - 1)
371 * M5229 IDSEL is addr:15; see above setting 371 * M5229 IDSEL is addr:15; see above setting
372 */ 372 */
373 pci_read_config_byte(&dev_m5229, 0x50, &temp8); 373 pci_read_config_byte(&dev_m5229, 0x50, &temp8);
374 pci_write_config_byte(&dev_m5229, 0x50, temp8 | 0x1); 374 pci_write_config_byte(&dev_m5229, 0x50, temp8 | 0x1);
375 375
376 /* 376 /*
377 * enable bus master (bit 2) and IO decoding (bit 0) 377 * enable bus master (bit 2) and IO decoding (bit 0)
378 */ 378 */
379 pci_read_config_byte(&dev_m5229, 0x04, &temp8); 379 pci_read_config_byte(&dev_m5229, 0x04, &temp8);
380 pci_write_config_byte(&dev_m5229, 0x04, temp8 | 0x5); 380 pci_write_config_byte(&dev_m5229, 0x04, temp8 | 0x5);
381 381
382 /* 382 /*
383 * enable native, copied from arch/ppc/k2boot/head.S 383 * enable native, copied from arch/ppc/k2boot/head.S
384 * TODO - need volatile, need to be portable 384 * TODO - need volatile, need to be portable
385 */ 385 */
386 pci_write_config_byte(&dev_m5229, 0x09, 0xef); 386 pci_write_config_byte(&dev_m5229, 0x09, 0xef);
387 387
388 /* Set Primary Channel Command Block Timing */ 388 /* Set Primary Channel Command Block Timing */
389 pci_write_config_byte(&dev_m5229, 0x59, 0x31); 389 pci_write_config_byte(&dev_m5229, 0x59, 0x31);
390 390
391 /* 391 /*
392 * Enable primary channel 40-pin cable 392 * Enable primary channel 40-pin cable
393 * M5229 register 0x4a (bit 0) 393 * M5229 register 0x4a (bit 0)
394 */ 394 */
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 133fb7c48e6c..6dbce92eb068 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -253,7 +253,7 @@ static inline void dec_kn03_be_init(void)
253 253
254 kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR); 254 kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR);
255 kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN); 255 kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN);
256 256
257 /* 257 /*
258 * Set normal ECC detection and generation, enable ECC correction. 258 * Set normal ECC detection and generation, enable ECC correction.
259 * For KN05 we also need to make sure EE (?) is enabled in the MB. 259 * For KN05 we also need to make sure EE (?) is enabled in the MB.
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 3b3790993219..c89768d5c4e5 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -133,7 +133,7 @@
133 */ 133 */
134 mfc0 t0,CP0_CAUSE # get pending interrupts 134 mfc0 t0,CP0_CAUSE # get pending interrupts
135 mfc0 t1,CP0_STATUS 135 mfc0 t1,CP0_STATUS
136#ifdef CONFIG_MIPS32 136#ifdef CONFIG_32BIT
137 lw t2,cpu_fpu_mask 137 lw t2,cpu_fpu_mask
138#endif 138#endif
139 andi t0,ST0_IM # CAUSE.CE may be non-zero! 139 andi t0,ST0_IM # CAUSE.CE may be non-zero!
@@ -141,7 +141,7 @@
141 141
142 beqz t0,spurious 142 beqz t0,spurious
143 143
144#ifdef CONFIG_MIPS32 144#ifdef CONFIG_32BIT
145 and t2,t0 145 and t2,t0
146 bnez t2,fpu # handle FPU immediately 146 bnez t2,fpu # handle FPU immediately
147#endif 147#endif
@@ -271,7 +271,7 @@ handle_it:
271 j ret_from_irq 271 j ret_from_irq
272 nop 272 nop
273 273
274#ifdef CONFIG_MIPS32 274#ifdef CONFIG_32BIT
275fpu: 275fpu:
276 j handle_fpe_int 276 j handle_fpe_int
277 nop 277 nop
diff --git a/arch/mips/dec/prom/Makefile b/arch/mips/dec/prom/Makefile
index 373822ec2d8c..bcd0247b3a66 100644
--- a/arch/mips/dec/prom/Makefile
+++ b/arch/mips/dec/prom/Makefile
@@ -5,7 +5,7 @@
5 5
6lib-y += init.o memory.o cmdline.o identify.o console.o 6lib-y += init.o memory.o cmdline.o identify.o console.o
7 7
8lib-$(CONFIG_MIPS32) += locore.o 8lib-$(CONFIG_32BIT) += locore.o
9lib-$(CONFIG_MIPS64) += call_o32.o 9lib-$(CONFIG_64BIT) += call_o32.o
10 10
11EXTRA_AFLAGS := $(CFLAGS) 11EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index d55fe665926f..20f84b119b4c 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -4,9 +4,9 @@
4# Wed Jan 26 02:48:59 2005 4# Wed Jan 26 02:48:59 2005
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7# CONFIG_MIPS64 is not set
8# CONFIG_64BIT is not set 7# CONFIG_64BIT is not set
9CONFIG_MIPS32=y 8# CONFIG_64BIT is not set
9CONFIG_32BIT=y
10 10
11# 11#
12# Code maturity level options 12# Code maturity level options
@@ -90,6 +90,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
90CONFIG_HAVE_DEC_LOCK=y 90CONFIG_HAVE_DEC_LOCK=y
91CONFIG_ARC=y 91CONFIG_ARC=y
92CONFIG_DMA_NONCOHERENT=y 92CONFIG_DMA_NONCOHERENT=y
93CONFIG_DMA_NEED_PCI_MAP_STATE=y
93# CONFIG_CPU_LITTLE_ENDIAN is not set 94# CONFIG_CPU_LITTLE_ENDIAN is not set
94CONFIG_IRQ_CPU=y 95CONFIG_IRQ_CPU=y
95CONFIG_SWAP_IO_SPACE=y 96CONFIG_SWAP_IO_SPACE=y
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
index d808a67294b8..a5f6d84bc181 100644
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@@ -129,7 +129,7 @@ static void __init it8172_setup(void)
129 129
130 /* 130 /*
131 * IO/MEM resources. 131 * IO/MEM resources.
132 * 132 *
133 * revisit this area. 133 * revisit this area.
134 */ 134 */
135 set_io_port_base(KSEG1); 135 set_io_port_base(KSEG1);
diff --git a/arch/mips/ite-boards/generic/time.c b/arch/mips/ite-boards/generic/time.c
index 30a6c0d5fc50..f5d67ee21ac6 100644
--- a/arch/mips/ite-boards/generic/time.c
+++ b/arch/mips/ite-boards/generic/time.c
@@ -72,7 +72,7 @@ static inline int rtc_dm_binary(void) { return saved_control & RTC_DM_BINARY; }
72static inline unsigned char 72static inline unsigned char
73bin_to_hw(unsigned char c) 73bin_to_hw(unsigned char c)
74{ 74{
75 if (rtc_dm_binary()) 75 if (rtc_dm_binary())
76 return c; 76 return c;
77 else 77 else
78 return ((c/10) << 4) + (c%10); 78 return ((c/10) << 4) + (c%10);
@@ -91,9 +91,9 @@ hw_to_bin(unsigned char c)
91static inline unsigned char 91static inline unsigned char
92hour_bin_to_hw(unsigned char c) 92hour_bin_to_hw(unsigned char c)
93{ 93{
94 if (rtc_24h()) 94 if (rtc_24h())
95 return bin_to_hw(c); 95 return bin_to_hw(c);
96 if (c >= 12) 96 if (c >= 12)
97 return 0x80 | bin_to_hw((c==12)?12:c-12); /* 12 is 12pm */ 97 return 0x80 | bin_to_hw((c==12)?12:c-12); /* 12 is 12pm */
98 else 98 else
99 return bin_to_hw((c==0)?12:c); /* 0 is 12 AM, not 0 am */ 99 return bin_to_hw((c==0)?12:c); /* 0 is 12 AM, not 0 am */
@@ -105,9 +105,9 @@ hour_hw_to_bin(unsigned char c)
105 unsigned char tmp = hw_to_bin(c&0x3f); 105 unsigned char tmp = hw_to_bin(c&0x3f);
106 if (rtc_24h()) 106 if (rtc_24h())
107 return tmp; 107 return tmp;
108 if (c & 0x80) 108 if (c & 0x80)
109 return (tmp==12)?12:tmp+12; /* 12pm is 12, not 24 */ 109 return (tmp==12)?12:tmp+12; /* 12pm is 12, not 24 */
110 else 110 else
111 return (tmp==12)?0:tmp; /* 12am is 0 */ 111 return (tmp==12)?0:tmp; /* 12am is 0 */
112} 112}
113 113
@@ -145,7 +145,7 @@ static unsigned long __init cal_r4koff(void)
145 return (mips_hpt_frequency / HZ); 145 return (mips_hpt_frequency / HZ);
146} 146}
147 147
148static unsigned long 148static unsigned long
149it8172_rtc_get_time(void) 149it8172_rtc_get_time(void)
150{ 150{
151 unsigned int year, mon, day, hour, min, sec; 151 unsigned int year, mon, day, hour, min, sec;
@@ -166,12 +166,12 @@ it8172_rtc_get_time(void)
166 hour = hour_hw_to_bin(CMOS_READ(RTC_HOURS)); 166 hour = hour_hw_to_bin(CMOS_READ(RTC_HOURS));
167 day = hw_to_bin(CMOS_READ(RTC_DAY_OF_MONTH)); 167 day = hw_to_bin(CMOS_READ(RTC_DAY_OF_MONTH));
168 mon = hw_to_bin(CMOS_READ(RTC_MONTH)); 168 mon = hw_to_bin(CMOS_READ(RTC_MONTH));
169 year = hw_to_bin(CMOS_READ(RTC_YEAR)) + 169 year = hw_to_bin(CMOS_READ(RTC_YEAR)) +
170 hw_to_bin(*rtc_century_reg) * 100; 170 hw_to_bin(*rtc_century_reg) * 100;
171 171
172 /* restore interrupts */ 172 /* restore interrupts */
173 local_irq_restore(flags); 173 local_irq_restore(flags);
174 174
175 return mktime(year, mon, day, hour, min, sec); 175 return mktime(year, mon, day, hour, min, sec);
176} 176}
177 177
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index a0230ee0f7f4..d3303584fbd1 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -13,8 +13,8 @@ binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
13 13
14ifdef CONFIG_MODULES 14ifdef CONFIG_MODULES
15obj-y += mips_ksyms.o module.o 15obj-y += mips_ksyms.o module.o
16obj-$(CONFIG_MIPS32) += module-elf32.o 16obj-$(CONFIG_32BIT) += module-elf32.o
17obj-$(CONFIG_MIPS64) += module-elf64.o 17obj-$(CONFIG_64BIT) += module-elf64.o
18endif 18endif
19 19
20obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o 20obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o
@@ -45,8 +45,8 @@ obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
45obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o 45obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
46obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o 46obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o
47 47
48obj-$(CONFIG_MIPS32) += scall32-o32.o 48obj-$(CONFIG_32BIT) += scall32-o32.o
49obj-$(CONFIG_MIPS64) += scall64-64.o 49obj-$(CONFIG_64BIT) += scall64-64.o
50obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o 50obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o
51obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o 51obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o
52obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o 52obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
@@ -55,7 +55,7 @@ obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o ptrace32.o
55obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o 55obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o
56obj-$(CONFIG_PROC_FS) += proc.o 56obj-$(CONFIG_PROC_FS) += proc.o
57 57
58obj-$(CONFIG_MIPS64) += cpu-bugs64.o 58obj-$(CONFIG_64BIT) += cpu-bugs64.o
59 59
60obj-$(CONFIG_GEN_RTC) += genrtc.o 60obj-$(CONFIG_GEN_RTC) += genrtc.o
61 61
diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c
index ed47041f3030..6b645fbb1ddc 100644
--- a/arch/mips/kernel/binfmt_elfn32.c
+++ b/arch/mips/kernel/binfmt_elfn32.c
@@ -103,7 +103,7 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
103 * Convert jiffies to nanoseconds and seperate with 103 * Convert jiffies to nanoseconds and seperate with
104 * one divide. 104 * one divide.
105 */ 105 */
106 u64 nsec = (u64)jiffies * TICK_NSEC; 106 u64 nsec = (u64)jiffies * TICK_NSEC;
107 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec); 107 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec);
108 value->tv_usec /= NSEC_PER_USEC; 108 value->tv_usec /= NSEC_PER_USEC;
109} 109}
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index ee21b18c37a8..b4075e99c452 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -105,7 +105,7 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
105 * Convert jiffies to nanoseconds and seperate with 105 * Convert jiffies to nanoseconds and seperate with
106 * one divide. 106 * one divide.
107 */ 107 */
108 u64 nsec = (u64)jiffies * TICK_NSEC; 108 u64 nsec = (u64)jiffies * TICK_NSEC;
109 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec); 109 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec);
110 value->tv_usec /= NSEC_PER_USEC; 110 value->tv_usec /= NSEC_PER_USEC;
111} 111}
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 11ebe5d4c446..47a087b6c11b 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -137,7 +137,7 @@ static inline void check_mult_sh(void)
137 for (i = 0; i < 8; i++) 137 for (i = 0; i < 8; i++)
138 if (v1[i] != w[i]) 138 if (v1[i] != w[i])
139 bug = 1; 139 bug = 1;
140 140
141 if (bug == 0) { 141 if (bug == 0) {
142 printk("no.\n"); 142 printk("no.\n");
143 return; 143 return;
@@ -149,7 +149,7 @@ static inline void check_mult_sh(void)
149 for (i = 0; i < 8; i++) 149 for (i = 0; i < 8; i++)
150 if (v2[i] != w[i]) 150 if (v2[i] != w[i])
151 fix = 0; 151 fix = 0;
152 152
153 if (fix == 1) { 153 if (fix == 1) {
154 printk("yes.\n"); 154 printk("yes.\n");
155 return; 155 return;
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 4bb849582314..7685f8baf3f0 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -229,15 +229,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
229 break; 229 break;
230 case PRID_IMP_VR41XX: 230 case PRID_IMP_VR41XX:
231 switch (c->processor_id & 0xf0) { 231 switch (c->processor_id & 0xf0) {
232#ifndef CONFIG_VR4181
233 case PRID_REV_VR4111: 232 case PRID_REV_VR4111:
234 c->cputype = CPU_VR4111; 233 c->cputype = CPU_VR4111;
235 break; 234 break;
236#else
237 case PRID_REV_VR4181:
238 c->cputype = CPU_VR4181;
239 break;
240#endif
241 case PRID_REV_VR4121: 235 case PRID_REV_VR4121:
242 c->cputype = CPU_VR4121; 236 c->cputype = CPU_VR4121;
243 break; 237 break;
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index ece6ddaf7011..512bedbfa7b9 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -13,13 +13,13 @@
13#include <asm/stackframe.h> 13#include <asm/stackframe.h>
14#include <asm/gdb-stub.h> 14#include <asm/gdb-stub.h>
15 15
16#ifdef CONFIG_MIPS32 16#ifdef CONFIG_32BIT
17#define DMFC0 mfc0 17#define DMFC0 mfc0
18#define DMTC0 mtc0 18#define DMTC0 mtc0
19#define LDC1 lwc1 19#define LDC1 lwc1
20#define SDC1 lwc1 20#define SDC1 lwc1
21#endif 21#endif
22#ifdef CONFIG_MIPS64 22#ifdef CONFIG_64BIT
23#define DMFC0 dmfc0 23#define DMFC0 dmfc0
24#define DMTC0 dmtc0 24#define DMTC0 dmtc0
25#define LDC1 ldc1 25#define LDC1 ldc1
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index 269889302a27..d3fd1ab14274 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -687,8 +687,8 @@ void handle_exception (struct gdb_regs *regs)
687 * acquire the big kgdb spinlock 687 * acquire the big kgdb spinlock
688 */ 688 */
689 if (!spin_trylock(&kgdb_lock)) { 689 if (!spin_trylock(&kgdb_lock)) {
690 /* 690 /*
691 * some other CPU has the lock, we should go back to 691 * some other CPU has the lock, we should go back to
692 * receive the gdb_wait IPC 692 * receive the gdb_wait IPC
693 */ 693 */
694 return; 694 return;
@@ -703,7 +703,7 @@ void handle_exception (struct gdb_regs *regs)
703 async_bp.addr = 0; 703 async_bp.addr = 0;
704 } 704 }
705 705
706 /* 706 /*
707 * acquire the CPU spinlocks 707 * acquire the CPU spinlocks
708 */ 708 */
709 for (i = num_online_cpus()-1; i >= 0; i--) 709 for (i = num_online_cpus()-1; i >= 0; i--)
@@ -894,7 +894,7 @@ void handle_exception (struct gdb_regs *regs)
894 ptr = &input_buffer[1]; 894 ptr = &input_buffer[1];
895 if (hexToLong(&ptr, &addr)) 895 if (hexToLong(&ptr, &addr))
896 regs->cp0_epc = addr; 896 regs->cp0_epc = addr;
897 897
898 goto exit_kgdb_exception; 898 goto exit_kgdb_exception;
899 break; 899 break;
900 900
@@ -1001,7 +1001,7 @@ void breakpoint(void)
1001 return; 1001 return;
1002 1002
1003 __asm__ __volatile__( 1003 __asm__ __volatile__(
1004 ".globl breakinst\n\t" 1004 ".globl breakinst\n\t"
1005 ".set\tnoreorder\n\t" 1005 ".set\tnoreorder\n\t"
1006 "nop\n" 1006 "nop\n"
1007 "breakinst:\tbreak\n\t" 1007 "breakinst:\tbreak\n\t"
@@ -1014,7 +1014,7 @@ void breakpoint(void)
1014void async_breakpoint(void) 1014void async_breakpoint(void)
1015{ 1015{
1016 __asm__ __volatile__( 1016 __asm__ __volatile__(
1017 ".globl async_breakinst\n\t" 1017 ".globl async_breakinst\n\t"
1018 ".set\tnoreorder\n\t" 1018 ".set\tnoreorder\n\t"
1019 "nop\n" 1019 "nop\n"
1020 "async_breakinst:\tbreak\n\t" 1020 "async_breakinst:\tbreak\n\t"
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index a5b0a389b063..e7f6c1b90806 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -54,7 +54,7 @@ NESTED(except_vec3_generic, 0, sp)
54#endif 54#endif
55 mfc0 k1, CP0_CAUSE 55 mfc0 k1, CP0_CAUSE
56 andi k1, k1, 0x7c 56 andi k1, k1, 0x7c
57#ifdef CONFIG_MIPS64 57#ifdef CONFIG_64BIT
58 dsll k1, k1, 1 58 dsll k1, k1, 1
59#endif 59#endif
60 PTR_L k0, exception_handlers(k1) 60 PTR_L k0, exception_handlers(k1)
@@ -81,7 +81,7 @@ NESTED(except_vec3_r4000, 0, sp)
81 beq k1, k0, handle_vced 81 beq k1, k0, handle_vced
82 li k0, 14<<2 82 li k0, 14<<2
83 beq k1, k0, handle_vcei 83 beq k1, k0, handle_vcei
84#ifdef CONFIG_MIPS64 84#ifdef CONFIG_64BIT
85 dsll k1, k1, 1 85 dsll k1, k1, 1
86#endif 86#endif
87 .set pop 87 .set pop
@@ -244,12 +244,12 @@ NESTED(nmi_handler, PT_SIZE, sp)
244 start with an n and gas will believe \n is ok ... */ 244 start with an n and gas will believe \n is ok ... */
245 .macro __BUILD_verbose nexception 245 .macro __BUILD_verbose nexception
246 LONG_L a1, PT_EPC(sp) 246 LONG_L a1, PT_EPC(sp)
247#if CONFIG_MIPS32 247#ifdef CONFIG_32BIT
248 PRINT("Got \nexception at %08lx\012") 248 PRINT("Got \nexception at %08lx\012")
249#endif 249#endif
250#if CONFIG_MIPS64 250#ifdef CONFIG_64BIT
251 PRINT("Got \nexception at %016lx\012") 251 PRINT("Got \nexception at %016lx\012")
252#endif 252#endif
253 .endm 253 .endm
254 254
255 .macro __BUILD_count exception 255 .macro __BUILD_count exception
@@ -293,7 +293,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
293 BUILD_HANDLER mcheck mcheck cli verbose /* #24 */ 293 BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
294 BUILD_HANDLER reserved reserved sti verbose /* others */ 294 BUILD_HANDLER reserved reserved sti verbose /* others */
295 295
296#ifdef CONFIG_MIPS64 296#ifdef CONFIG_64BIT
297/* A temporary overflow handler used by check_daddi(). */ 297/* A temporary overflow handler used by check_daddi(). */
298 298
299 __INIT 299 __INIT
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index a64e87d22014..2a1b45d66f04 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -107,7 +107,7 @@
107 .endm 107 .endm
108 108
109 .macro setup_c0_status_pri 109 .macro setup_c0_status_pri
110#ifdef CONFIG_MIPS64 110#ifdef CONFIG_64BIT
111 setup_c0_status ST0_KX 0 111 setup_c0_status ST0_KX 0
112#else 112#else
113 setup_c0_status 0 0 113 setup_c0_status 0 0
@@ -115,7 +115,7 @@
115 .endm 115 .endm
116 116
117 .macro setup_c0_status_sec 117 .macro setup_c0_status_sec
118#ifdef CONFIG_MIPS64 118#ifdef CONFIG_64BIT
119 setup_c0_status ST0_KX ST0_BEV 119 setup_c0_status ST0_KX ST0_BEV
120#else 120#else
121 setup_c0_status 0 ST0_BEV 121 setup_c0_status 0 ST0_BEV
@@ -215,7 +215,7 @@ NESTED(smp_bootstrap, 16, sp)
215 * slightly different layout ... 215 * slightly different layout ...
216 */ 216 */
217 page swapper_pg_dir, _PGD_ORDER 217 page swapper_pg_dir, _PGD_ORDER
218#ifdef CONFIG_MIPS64 218#ifdef CONFIG_64BIT
219 page invalid_pmd_table, _PMD_ORDER 219 page invalid_pmd_table, _PMD_ORDER
220#endif 220#endif
221 page invalid_pte_table, _PTE_ORDER 221 page invalid_pte_table, _PTE_ORDER
diff --git a/arch/mips/kernel/ioctl32.c b/arch/mips/kernel/ioctl32.c
index 519cd5d0aebb..c069719ff0d8 100644
--- a/arch/mips/kernel/ioctl32.c
+++ b/arch/mips/kernel/ioctl32.c
@@ -27,7 +27,7 @@ long sys_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg);
27#include "compat_ioctl.c" 27#include "compat_ioctl.c"
28 28
29typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *); 29typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
30 30
31#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl) 31#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl)
32#define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl32_handler_t)(handler), NULL }, 32#define HANDLE_IOCTL(cmd,handler) { (cmd), (ioctl32_handler_t)(handler), NULL },
33#define IOCTL_TABLE_START \ 33#define IOCTL_TABLE_START \
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 441157a1f994..7d93992e462c 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -77,7 +77,7 @@ int show_interrupts(struct seq_file *p, void *v)
77 if (i < NR_IRQS) { 77 if (i < NR_IRQS) {
78 spin_lock_irqsave(&irq_desc[i].lock, flags); 78 spin_lock_irqsave(&irq_desc[i].lock, flags);
79 action = irq_desc[i].action; 79 action = irq_desc[i].action;
80 if (!action) 80 if (!action)
81 goto skip; 81 goto skip;
82 seq_printf(p, "%3d: ",i); 82 seq_printf(p, "%3d: ",i);
83#ifndef CONFIG_SMP 83#ifndef CONFIG_SMP
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 993abc868e54..4613219dd73e 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -313,7 +313,7 @@ asmlinkage int sys32_sysinfo(struct sysinfo32 *info)
313 struct sysinfo s; 313 struct sysinfo s;
314 int ret, err; 314 int ret, err;
315 mm_segment_t old_fs = get_fs (); 315 mm_segment_t old_fs = get_fs ();
316 316
317 set_fs (KERNEL_DS); 317 set_fs (KERNEL_DS);
318 ret = sys_sysinfo(&s); 318 ret = sys_sysinfo(&s);
319 set_fs (old_fs); 319 set_fs (old_fs);
@@ -560,7 +560,7 @@ struct ipc64_perm32 {
560 compat_gid_t gid; 560 compat_gid_t gid;
561 compat_uid_t cuid; 561 compat_uid_t cuid;
562 compat_gid_t cgid; 562 compat_gid_t cgid;
563 compat_mode_t mode; 563 compat_mode_t mode;
564 unsigned short seq; 564 unsigned short seq;
565 unsigned short __pad1; 565 unsigned short __pad1;
566 unsigned int __unused1; 566 unsigned int __unused1;
@@ -1334,17 +1334,17 @@ asmlinkage int sys32_sendfile(int out_fd, int in_fd, compat_off_t *offset,
1334 mm_segment_t old_fs = get_fs(); 1334 mm_segment_t old_fs = get_fs();
1335 int ret; 1335 int ret;
1336 off_t of; 1336 off_t of;
1337 1337
1338 if (offset && get_user(of, offset)) 1338 if (offset && get_user(of, offset))
1339 return -EFAULT; 1339 return -EFAULT;
1340 1340
1341 set_fs(KERNEL_DS); 1341 set_fs(KERNEL_DS);
1342 ret = sys_sendfile(out_fd, in_fd, offset ? &of : NULL, count); 1342 ret = sys_sendfile(out_fd, in_fd, offset ? &of : NULL, count);
1343 set_fs(old_fs); 1343 set_fs(old_fs);
1344 1344
1345 if (offset && put_user(of, offset)) 1345 if (offset && put_user(of, offset))
1346 return -EFAULT; 1346 return -EFAULT;
1347 1347
1348 return ret; 1348 return ret;
1349} 1349}
1350 1350
@@ -1362,11 +1362,11 @@ static unsigned char socketcall_nargs[18]={AL(0),AL(3),AL(3),AL(3),AL(2),AL(3),
1362#undef AL 1362#undef AL
1363 1363
1364/* 1364/*
1365 * System call vectors. 1365 * System call vectors.
1366 * 1366 *
1367 * Argument checking cleaned up. Saved 20% in size. 1367 * Argument checking cleaned up. Saved 20% in size.
1368 * This function doesn't need to set the kernel lock because 1368 * This function doesn't need to set the kernel lock because
1369 * it is set by the callees. 1369 * it is set by the callees.
1370 */ 1370 */
1371 1371
1372asmlinkage long sys32_socketcall(int call, unsigned int *args32) 1372asmlinkage long sys32_socketcall(int call, unsigned int *args32)
@@ -1402,11 +1402,11 @@ asmlinkage long sys32_socketcall(int call, unsigned int *args32)
1402 /* copy_from_user should be SMP safe. */ 1402 /* copy_from_user should be SMP safe. */
1403 if (copy_from_user(a, args32, socketcall_nargs[call])) 1403 if (copy_from_user(a, args32, socketcall_nargs[call]))
1404 return -EFAULT; 1404 return -EFAULT;
1405 1405
1406 a0=a[0]; 1406 a0=a[0];
1407 a1=a[1]; 1407 a1=a[1];
1408 1408
1409 switch(call) 1409 switch(call)
1410 { 1410 {
1411 case SYS_SOCKET: 1411 case SYS_SOCKET:
1412 err = sys_socket(a0,a1,a[2]); 1412 err = sys_socket(a0,a1,a[2]);
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index eed29fc9dc82..86e42c633f73 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -35,7 +35,7 @@ EXPORT_SYMBOL(memcpy);
35EXPORT_SYMBOL(memmove); 35EXPORT_SYMBOL(memmove);
36EXPORT_SYMBOL(strcat); 36EXPORT_SYMBOL(strcat);
37EXPORT_SYMBOL(strchr); 37EXPORT_SYMBOL(strchr);
38#ifdef CONFIG_MIPS64 38#ifdef CONFIG_64BIT
39EXPORT_SYMBOL(strncmp); 39EXPORT_SYMBOL(strncmp);
40#endif 40#endif
41EXPORT_SYMBOL(strlen); 41EXPORT_SYMBOL(strlen);
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 6e70c42c2058..e4f2f8011387 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -70,7 +70,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
70 70
71 /* New thread loses kernel privileges. */ 71 /* New thread loses kernel privileges. */
72 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK); 72 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK);
73#ifdef CONFIG_MIPS64 73#ifdef CONFIG_64BIT
74 status &= ~ST0_FR; 74 status &= ~ST0_FR;
75 status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR; 75 status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR;
76#endif 76#endif
@@ -236,10 +236,10 @@ static int __init get_frame_info(struct mips_frame_info *info, void *func)
236 break; 236 break;
237 237
238 if ( 238 if (
239#ifdef CONFIG_MIPS32 239#ifdef CONFIG_32BIT
240 ip->i_format.opcode == sw_op && 240 ip->i_format.opcode == sw_op &&
241#endif 241#endif
242#ifdef CONFIG_MIPS64 242#ifdef CONFIG_64BIT
243 ip->i_format.opcode == sd_op && 243 ip->i_format.opcode == sd_op &&
244#endif 244#endif
245 ip->i_format.rs == 29) 245 ip->i_format.rs == 29)
@@ -353,7 +353,7 @@ schedule_timeout_caller:
353 353
354out: 354out:
355 355
356#ifdef CONFIG_MIPS64 356#ifdef CONFIG_64BIT
357 if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */ 357 if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */
358 pc &= 0xffffffffUL; 358 pc &= 0xffffffffUL;
359#endif 359#endif
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 92e70ca3bff9..0b571a5b4b83 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -124,7 +124,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
124 if (tsk_used_math(child)) { 124 if (tsk_used_math(child)) {
125 fpureg_t *fregs = get_fpu_regs(child); 125 fpureg_t *fregs = get_fpu_regs(child);
126 126
127#ifdef CONFIG_MIPS32 127#ifdef CONFIG_32BIT
128 /* 128 /*
129 * The odd registers are actually the high 129 * The odd registers are actually the high
130 * order bits of the values stored in the even 130 * order bits of the values stored in the even
@@ -135,7 +135,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
135 else 135 else
136 tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); 136 tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
137#endif 137#endif
138#ifdef CONFIG_MIPS64 138#ifdef CONFIG_64BIT
139 tmp = fregs[addr - FPR_BASE]; 139 tmp = fregs[addr - FPR_BASE];
140#endif 140#endif
141 } else { 141 } else {
@@ -213,7 +213,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
213 sizeof(child->thread.fpu.hard)); 213 sizeof(child->thread.fpu.hard));
214 child->thread.fpu.hard.fcr31 = 0; 214 child->thread.fpu.hard.fcr31 = 0;
215 } 215 }
216#ifdef CONFIG_MIPS32 216#ifdef CONFIG_32BIT
217 /* 217 /*
218 * The odd registers are actually the high order bits 218 * The odd registers are actually the high order bits
219 * of the values stored in the even registers - unless 219 * of the values stored in the even registers - unless
@@ -227,7 +227,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
227 fregs[addr - FPR_BASE] |= data; 227 fregs[addr - FPR_BASE] |= data;
228 } 228 }
229#endif 229#endif
230#ifdef CONFIG_MIPS64 230#ifdef CONFIG_64BIT
231 fregs[addr - FPR_BASE] = data; 231 fregs[addr - FPR_BASE] = data;
232#endif 232#endif
233 break; 233 break;
@@ -304,14 +304,14 @@ out:
304static inline int audit_arch(void) 304static inline int audit_arch(void)
305{ 305{
306#ifdef CONFIG_CPU_LITTLE_ENDIAN 306#ifdef CONFIG_CPU_LITTLE_ENDIAN
307#ifdef CONFIG_MIPS64 307#ifdef CONFIG_64BIT
308 if (!(current->thread.mflags & MF_32BIT_REGS)) 308 if (!(current->thread.mflags & MF_32BIT_REGS))
309 return AUDIT_ARCH_MIPSEL64; 309 return AUDIT_ARCH_MIPSEL64;
310#endif /* MIPS64 */ 310#endif /* MIPS64 */
311 return AUDIT_ARCH_MIPSEL; 311 return AUDIT_ARCH_MIPSEL;
312 312
313#else /* big endian... */ 313#else /* big endian... */
314#ifdef CONFIG_MIPS64 314#ifdef CONFIG_64BIT
315 if (!(current->thread.mflags & MF_32BIT_REGS)) 315 if (!(current->thread.mflags & MF_32BIT_REGS))
316 return AUDIT_ARCH_MIPS64; 316 return AUDIT_ARCH_MIPS64;
317#endif /* MIPS64 */ 317#endif /* MIPS64 */
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 243e7b629af6..f10019640ee9 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -35,7 +35,7 @@
35/* 35/*
36 * FPU context is saved iff the process has used it's FPU in the current 36 * FPU context is saved iff the process has used it's FPU in the current
37 * time slice as indicated by TIF_USEDFPU. In any case, the CU1 bit for user 37 * time slice as indicated by TIF_USEDFPU. In any case, the CU1 bit for user
38 * space STATUS register should be 0, so that a process *always* starts its 38 * space STATUS register should be 0, so that a process *always* starts its
39 * userland with FPU disabled after each context switch. 39 * userland with FPU disabled after each context switch.
40 * 40 *
41 * FPU will be enabled as soon as the process accesses FPU again, through 41 * FPU will be enabled as soon as the process accesses FPU again, through
@@ -55,7 +55,7 @@ LEAF(resume)
55 cpu_save_nonscratch a0 55 cpu_save_nonscratch a0
56 sw ra, THREAD_REG31(a0) 56 sw ra, THREAD_REG31(a0)
57 57
58 /* 58 /*
59 * check if we need to save FPU registers 59 * check if we need to save FPU registers
60 */ 60 */
61 lw t3, TASK_THREAD_INFO(a0) 61 lw t3, TASK_THREAD_INFO(a0)
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index ebb643d8d14c..aba665bcb386 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -36,7 +36,7 @@
36LEAF(_save_fp_context) 36LEAF(_save_fp_context)
37 cfc1 t1, fcr31 37 cfc1 t1, fcr31
38 38
39#ifdef CONFIG_MIPS64 39#ifdef CONFIG_64BIT
40 /* Store the 16 odd double precision registers */ 40 /* Store the 16 odd double precision registers */
41 EX sdc1 $f1, SC_FPREGS+8(a0) 41 EX sdc1 $f1, SC_FPREGS+8(a0)
42 EX sdc1 $f3, SC_FPREGS+24(a0) 42 EX sdc1 $f3, SC_FPREGS+24(a0)
@@ -118,7 +118,7 @@ LEAF(_save_fp_context32)
118 */ 118 */
119LEAF(_restore_fp_context) 119LEAF(_restore_fp_context)
120 EX lw t0, SC_FPC_CSR(a0) 120 EX lw t0, SC_FPC_CSR(a0)
121#ifdef CONFIG_MIPS64 121#ifdef CONFIG_64BIT
122 EX ldc1 $f1, SC_FPREGS+8(a0) 122 EX ldc1 $f1, SC_FPREGS+8(a0)
123 EX ldc1 $f3, SC_FPREGS+24(a0) 123 EX ldc1 $f3, SC_FPREGS+24(a0)
124 EX ldc1 $f5, SC_FPREGS+40(a0) 124 EX ldc1 $f5, SC_FPREGS+40(a0)
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 1fc3b2eb12bd..e02b7722ccb8 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -33,7 +33,7 @@
33/* 33/*
34 * FPU context is saved iff the process has used it's FPU in the current 34 * FPU context is saved iff the process has used it's FPU in the current
35 * time slice as indicated by _TIF_USEDFPU. In any case, the CU1 bit for user 35 * time slice as indicated by _TIF_USEDFPU. In any case, the CU1 bit for user
36 * space STATUS register should be 0, so that a process *always* starts its 36 * space STATUS register should be 0, so that a process *always* starts its
37 * userland with FPU disabled after each context switch. 37 * userland with FPU disabled after each context switch.
38 * 38 *
39 * FPU will be enabled as soon as the process accesses FPU again, through 39 * FPU will be enabled as soon as the process accesses FPU again, through
@@ -105,7 +105,7 @@
105 * Save a thread's fp context. 105 * Save a thread's fp context.
106 */ 106 */
107LEAF(_save_fp) 107LEAF(_save_fp)
108#ifdef CONFIG_MIPS64 108#ifdef CONFIG_64BIT
109 mfc0 t1, CP0_STATUS 109 mfc0 t1, CP0_STATUS
110#endif 110#endif
111 fpu_save_double a0 t1 t0 t2 # clobbers t1 111 fpu_save_double a0 t1 t0 t2 # clobbers t1
@@ -142,7 +142,7 @@ LEAF(_init_fpu)
142 142
143 li t1, -1 # SNaN 143 li t1, -1 # SNaN
144 144
145#ifdef CONFIG_MIPS64 145#ifdef CONFIG_64BIT
146 sll t0, t0, 5 146 sll t0, t0, 5
147 bgez t0, 1f # 16 / 32 register mode? 147 bgez t0, 1f # 16 / 32 register mode?
148 148
@@ -164,7 +164,7 @@ LEAF(_init_fpu)
164 dmtc1 t1, $f31 164 dmtc1 t1, $f31
1651: 1651:
166#endif 166#endif
167 167
168#ifdef CONFIG_CPU_MIPS32 168#ifdef CONFIG_CPU_MIPS32
169 mtc1 t1, $f0 169 mtc1 t1, $f0
170 mtc1 t1, $f1 170 mtc1 t1, $f1
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 3a240e3e004c..12b531c295c4 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -241,7 +241,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en
241 if (*tmp) 241 if (*tmp)
242 strcat(command_line, tmp); 242 strcat(command_line, tmp);
243 243
244#ifdef CONFIG_MIPS64 244#ifdef CONFIG_64BIT
245 /* HACK: Guess if the sign extension was forgotten */ 245 /* HACK: Guess if the sign extension was forgotten */
246 if (start > 0x0000000080000000 && start < 0x00000000ffffffff) 246 if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
247 start |= 0xffffffff00000000; 247 start |= 0xffffffff00000000;
@@ -446,7 +446,7 @@ static inline void resource_init(void)
446{ 446{
447 int i; 447 int i;
448 448
449#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 449#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
450 /* 450 /*
451 * The 64bit code in 32bit object format trick can't represent 451 * The 64bit code in 32bit object format trick can't represent
452 * 64bit wide relocations for linker script symbols. 452 * 64bit wide relocations for linker script symbols.
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index f6875f023a29..8ddfbd8d425a 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -558,7 +558,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs,
558 if (!used_math()) 558 if (!used_math())
559 goto out; 559 goto out;
560 560
561 /* 561 /*
562 * Save FPU state to signal context. Signal handler will "inherit" 562 * Save FPU state to signal context. Signal handler will "inherit"
563 * current FPU state. 563 * current FPU state.
564 */ 564 */
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 56c36e42e0a6..a53b1ed7b386 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -924,7 +924,7 @@ void __init per_cpu_trap_init(void)
924 * flag that some firmware may have left set and the TS bit (for 924 * flag that some firmware may have left set and the TS bit (for
925 * IP27). Set XX for ISA IV code to work. 925 * IP27). Set XX for ISA IV code to work.
926 */ 926 */
927#ifdef CONFIG_MIPS64 927#ifdef CONFIG_64BIT
928 status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX; 928 status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
929#endif 929#endif
930 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV) 930 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 3f24a1d45865..36c5212e0928 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -240,7 +240,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
240 break; 240 break;
241 241
242 case lwu_op: 242 case lwu_op:
243#ifdef CONFIG_MIPS64 243#ifdef CONFIG_64BIT
244 /* 244 /*
245 * A 32-bit kernel might be running on a 64-bit processor. But 245 * A 32-bit kernel might be running on a 64-bit processor. But
246 * if we're on a 32-bit processor and an i-cache incoherency 246 * if we're on a 32-bit processor and an i-cache incoherency
@@ -278,13 +278,13 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
278 *newvalue = value; 278 *newvalue = value;
279 *regptr = &regs->regs[insn.i_format.rt]; 279 *regptr = &regs->regs[insn.i_format.rt];
280 break; 280 break;
281#endif /* CONFIG_MIPS64 */ 281#endif /* CONFIG_64BIT */
282 282
283 /* Cannot handle 64-bit instructions in 32-bit kernel */ 283 /* Cannot handle 64-bit instructions in 32-bit kernel */
284 goto sigill; 284 goto sigill;
285 285
286 case ld_op: 286 case ld_op:
287#ifdef CONFIG_MIPS64 287#ifdef CONFIG_64BIT
288 /* 288 /*
289 * A 32-bit kernel might be running on a 64-bit processor. But 289 * A 32-bit kernel might be running on a 64-bit processor. But
290 * if we're on a 32-bit processor and an i-cache incoherency 290 * if we're on a 32-bit processor and an i-cache incoherency
@@ -320,7 +320,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
320 *newvalue = value; 320 *newvalue = value;
321 *regptr = &regs->regs[insn.i_format.rt]; 321 *regptr = &regs->regs[insn.i_format.rt];
322 break; 322 break;
323#endif /* CONFIG_MIPS64 */ 323#endif /* CONFIG_64BIT */
324 324
325 /* Cannot handle 64-bit instructions in 32-bit kernel */ 325 /* Cannot handle 64-bit instructions in 32-bit kernel */
326 goto sigill; 326 goto sigill;
@@ -392,7 +392,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
392 break; 392 break;
393 393
394 case sd_op: 394 case sd_op:
395#ifdef CONFIG_MIPS64 395#ifdef CONFIG_64BIT
396 /* 396 /*
397 * A 32-bit kernel might be running on a 64-bit processor. But 397 * A 32-bit kernel might be running on a 64-bit processor. But
398 * if we're on a 32-bit processor and an i-cache incoherency 398 * if we're on a 32-bit processor and an i-cache incoherency
@@ -428,7 +428,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs,
428 if (res) 428 if (res)
429 goto fault; 429 goto fault;
430 break; 430 break;
431#endif /* CONFIG_MIPS64 */ 431#endif /* CONFIG_64BIT */
432 432
433 /* Cannot handle 64-bit instructions in 32-bit kernel */ 433 /* Cannot handle 64-bit instructions in 32-bit kernel */
434 goto sigill; 434 goto sigill;
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index e830d788c106..482ac310c937 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -15,7 +15,7 @@ SECTIONS
15 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 15 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
16 /* . = 0xc00000000001c000; */ 16 /* . = 0xc00000000001c000; */
17 17
18 /* Set the vaddr for the text segment to a value 18 /* Set the vaddr for the text segment to a value
19 >= 0xa800 0000 0001 9000 if no symmon is going to configured 19 >= 0xa800 0000 0001 9000 if no symmon is going to configured
20 >= 0xa800 0000 0030 0000 otherwise */ 20 >= 0xa800 0000 0030 0000 otherwise */
21 21
diff --git a/arch/mips/lasat/at93c.c b/arch/mips/lasat/at93c.c
index f6add041ebec..ca26e554615e 100644
--- a/arch/mips/lasat/at93c.c
+++ b/arch/mips/lasat/at93c.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Atmel AT93C46 serial eeprom driver 2 * Atmel AT93C46 serial eeprom driver
3 * 3 *
4 * Brian Murphy <brian.murphy@eicon.com> 4 * Brian Murphy <brian.murphy@eicon.com>
5 * 5 *
6 */ 6 */
7#include <linux/kernel.h> 7#include <linux/kernel.h>
@@ -21,12 +21,12 @@
21 21
22struct at93c_defs *at93c; 22struct at93c_defs *at93c;
23 23
24static void at93c_reg_write(u32 val) 24static void at93c_reg_write(u32 val)
25{ 25{
26 *at93c->reg = val; 26 *at93c->reg = val;
27} 27}
28 28
29static u32 at93c_reg_read(void) 29static u32 at93c_reg_read(void)
30{ 30{
31 u32 tmp = *at93c->reg; 31 u32 tmp = *at93c->reg;
32 return tmp; 32 return tmp;
@@ -81,7 +81,7 @@ static u8 at93c_read_byte(void)
81} 81}
82 82
83static void at93c_write_bits(u32 data, int size) 83static void at93c_write_bits(u32 data, int size)
84{ 84{
85 int i; 85 int i;
86 int shift = size - 1; 86 int shift = size - 1;
87 u32 mask = (1 << shift); 87 u32 mask = (1 << shift);
@@ -90,7 +90,7 @@ static void at93c_write_bits(u32 data, int size)
90 at93c_write_databit((data & mask) >> shift); 90 at93c_write_databit((data & mask) >> shift);
91 data <<= 1; 91 data <<= 1;
92 } 92 }
93} 93}
94 94
95static void at93c_init_op(void) 95static void at93c_init_op(void)
96{ 96{
@@ -104,8 +104,8 @@ static void at93c_end_op(void)
104 lasat_ndelay(250); 104 lasat_ndelay(250);
105} 105}
106 106
107static void at93c_wait(void) 107static void at93c_wait(void)
108{ 108{
109 at93c_init_op(); 109 at93c_init_op();
110 while (!at93c_read_databit()) 110 while (!at93c_read_databit())
111 ; 111 ;
diff --git a/arch/mips/lasat/at93c.h b/arch/mips/lasat/at93c.h
index a912ac2171b0..cfe2f99b1d44 100644
--- a/arch/mips/lasat/at93c.h
+++ b/arch/mips/lasat/at93c.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Atmel AT93C46 serial eeprom driver 2 * Atmel AT93C46 serial eeprom driver
3 * 3 *
4 * Brian Murphy <brian.murphy@eicon.com> 4 * Brian Murphy <brian.murphy@eicon.com>
5 * 5 *
6 */ 6 */
7 7
diff --git a/arch/mips/lasat/ds1603.c b/arch/mips/lasat/ds1603.c
index 7bbf6cf923c9..9d7812e03dcd 100644
--- a/arch/mips/lasat/ds1603.c
+++ b/arch/mips/lasat/ds1603.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Dallas Semiconductors 1603 RTC driver 2 * Dallas Semiconductors 1603 RTC driver
3 * 3 *
4 * Brian Murphy <brian@murphy.dk> 4 * Brian Murphy <brian@murphy.dk>
5 * 5 *
6 */ 6 */
7#include <linux/kernel.h> 7#include <linux/kernel.h>
@@ -20,12 +20,12 @@
20struct ds_defs *ds1603 = NULL; 20struct ds_defs *ds1603 = NULL;
21 21
22/* HW specific register functions */ 22/* HW specific register functions */
23static void rtc_reg_write(unsigned long val) 23static void rtc_reg_write(unsigned long val)
24{ 24{
25 *ds1603->reg = val; 25 *ds1603->reg = val;
26} 26}
27 27
28static unsigned long rtc_reg_read(void) 28static unsigned long rtc_reg_read(void)
29{ 29{
30 unsigned long tmp = *ds1603->reg; 30 unsigned long tmp = *ds1603->reg;
31 return tmp; 31 return tmp;
@@ -80,7 +80,7 @@ static unsigned int rtc_read_databit(void)
80{ 80{
81 unsigned int data; 81 unsigned int data;
82 82
83 data = (rtc_datareg_read() & (1 << ds1603->data_read_shift)) 83 data = (rtc_datareg_read() & (1 << ds1603->data_read_shift))
84 >> ds1603->data_read_shift; 84 >> ds1603->data_read_shift;
85 rtc_cycle_clock(rtc_reg_read()); 85 rtc_cycle_clock(rtc_reg_read());
86 return data; 86 return data;
diff --git a/arch/mips/lasat/ds1603.h b/arch/mips/lasat/ds1603.h
index 55f3b0423c20..c2e5c76a379d 100644
--- a/arch/mips/lasat/ds1603.h
+++ b/arch/mips/lasat/ds1603.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Dallas Semiconductors 1603 RTC driver 2 * Dallas Semiconductors 1603 RTC driver
3 * 3 *
4 * Brian Murphy <brian@murphy.dk> 4 * Brian Murphy <brian@murphy.dk>
5 * 5 *
6 */ 6 */
7#ifndef __DS1603_H 7#ifndef __DS1603_H
diff --git a/arch/mips/lasat/image/Makefile b/arch/mips/lasat/image/Makefile
index 18b6430f11be..35ecd6483ef6 100644
--- a/arch/mips/lasat/image/Makefile
+++ b/arch/mips/lasat/image/Makefile
@@ -21,7 +21,7 @@ LDSCRIPT= -L$(obj) -Tromscript.normal
21HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \ 21HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
22 -D_kernel_entry=0x$(KERNEL_ENTRY) \ 22 -D_kernel_entry=0x$(KERNEL_ENTRY) \
23 -D VERSION="\"$(Version)\"" \ 23 -D VERSION="\"$(Version)\"" \
24 -D TIMESTAMP=$(shell date +%s) 24 -D TIMESTAMP=$(shell date +%s)
25 25
26$(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE) 26$(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE)
27 $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $< 27 $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $<
diff --git a/arch/mips/lasat/image/head.S b/arch/mips/lasat/image/head.S
index 426bd7de17bb..efb95f2609c2 100644
--- a/arch/mips/lasat/image/head.S
+++ b/arch/mips/lasat/image/head.S
@@ -27,5 +27,5 @@ reldate:
27 .word TIMESTAMP 27 .word TIMESTAMP
28 28
29 .org 0x50 29 .org 0x50
30release: 30release:
31 .string VERSION 31 .string VERSION
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 1148a2d20aa7..c90da1639440 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -15,7 +15,7 @@
15 * with this program; if not, write to the Free Software Foundation, Inc., 15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 * 17 *
18 * Routines for generic manipulation of the interrupts found on the 18 * Routines for generic manipulation of the interrupts found on the
19 * Lasat boards. 19 * Lasat boards.
20 */ 20 */
21#include <linux/init.h> 21#include <linux/init.h>
@@ -101,7 +101,7 @@ static unsigned long get_int_status_100(void)
101 return *lasat_int_status & *lasat_int_mask; 101 return *lasat_int_status & *lasat_int_mask;
102} 102}
103 103
104static unsigned long get_int_status_200(void) 104static unsigned long get_int_status_200(void)
105{ 105{
106 unsigned long int_status; 106 unsigned long int_status;
107 107
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
index 8c784bcf1111..fc9b0e2a6be1 100644
--- a/arch/mips/lasat/lasat_board.c
+++ b/arch/mips/lasat/lasat_board.c
@@ -67,7 +67,7 @@ static void init_flash_sizes(void)
67 67
68 if (mips_machtype == MACH_LASAT_100) { 68 if (mips_machtype == MACH_LASAT_100) {
69 lasat_board_info.li_flash_base = 0x1e000000; 69 lasat_board_info.li_flash_base = 0x1e000000;
70 70
71 lb[LASAT_MTD_BOOTLOADER] = 0x1e400000; 71 lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
72 72
73 if (lasat_board_info.li_flash_size > 0x200000) { 73 if (lasat_board_info.li_flash_size > 0x200000) {
@@ -103,7 +103,7 @@ int lasat_init_board_info(void)
103 memset(&lasat_board_info, 0, sizeof(lasat_board_info)); 103 memset(&lasat_board_info, 0, sizeof(lasat_board_info));
104 104
105 /* First read the EEPROM info */ 105 /* First read the EEPROM info */
106 EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info, 106 EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
107 sizeof(struct lasat_eeprom_struct)); 107 sizeof(struct lasat_eeprom_struct));
108 108
109 /* Check the CRC */ 109 /* Check the CRC */
@@ -188,7 +188,7 @@ int lasat_init_board_info(void)
188 case 0x1: 188 case 0x1:
189 lasat_board_info.li_cpu_hz = 189 lasat_board_info.li_cpu_hz =
190 lasat_board_info.li_bus_hz + 190 lasat_board_info.li_bus_hz +
191 (lasat_board_info.li_bus_hz >> 1); 191 (lasat_board_info.li_bus_hz >> 1);
192 break; 192 break;
193 case 0x2: 193 case 0x2:
194 lasat_board_info.li_cpu_hz = 194 lasat_board_info.li_cpu_hz =
@@ -271,7 +271,7 @@ void lasat_write_eeprom_info(void)
271 lasat_board_info.li_eeprom_info.crc32 = crc; 271 lasat_board_info.li_eeprom_info.crc32 = crc;
272 272
273 /* Write the EEPROM info */ 273 /* Write the EEPROM info */
274 EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info, 274 EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
275 sizeof(struct lasat_eeprom_struct)); 275 sizeof(struct lasat_eeprom_struct));
276} 276}
277 277
diff --git a/arch/mips/lasat/picvue.c b/arch/mips/lasat/picvue.c
index 5637cd153926..9ae82c3ffb07 100644
--- a/arch/mips/lasat/picvue.c
+++ b/arch/mips/lasat/picvue.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Picvue PVC160206 display driver 2 * Picvue PVC160206 display driver
3 * 3 *
4 * Brian Murphy <brian@murphy.dk> 4 * Brian Murphy <brian@murphy.dk>
5 * 5 *
6 */ 6 */
7#include <linux/kernel.h> 7#include <linux/kernel.h>
@@ -24,12 +24,12 @@ struct pvc_defs *picvue = NULL;
24 24
25DECLARE_MUTEX(pvc_sem); 25DECLARE_MUTEX(pvc_sem);
26 26
27static void pvc_reg_write(u32 val) 27static void pvc_reg_write(u32 val)
28{ 28{
29 *picvue->reg = val; 29 *picvue->reg = val;
30} 30}
31 31
32static u32 pvc_reg_read(void) 32static u32 pvc_reg_read(void)
33{ 33{
34 u32 tmp = *picvue->reg; 34 u32 tmp = *picvue->reg;
35 return tmp; 35 return tmp;
@@ -65,12 +65,12 @@ static u8 pvc_read_data(void)
65{ 65{
66 u32 data = pvc_reg_read(); 66 u32 data = pvc_reg_read();
67 u8 byte; 67 u8 byte;
68 data |= picvue->rw; 68 data |= picvue->rw;
69 data &= ~picvue->rs; 69 data &= ~picvue->rs;
70 pvc_reg_write(data); 70 pvc_reg_write(data);
71 ndelay(40); 71 ndelay(40);
72 byte = pvc_read_byte(data); 72 byte = pvc_read_byte(data);
73 data |= picvue->rs; 73 data |= picvue->rs;
74 pvc_reg_write(data); 74 pvc_reg_write(data);
75 return byte; 75 return byte;
76} 76}
diff --git a/arch/mips/lasat/picvue.h b/arch/mips/lasat/picvue.h
index 74a39039135d..2a96bf971897 100644
--- a/arch/mips/lasat/picvue.h
+++ b/arch/mips/lasat/picvue.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Picvue PVC160206 display driver 2 * Picvue PVC160206 display driver
3 * 3 *
4 * Brian Murphy <brian.murphy@eicon.com> 4 * Brian Murphy <brian.murphy@eicon.com>
5 * 5 *
6 */ 6 */
7#include <asm/semaphore.h> 7#include <asm/semaphore.h>
diff --git a/arch/mips/lasat/picvue_proc.c b/arch/mips/lasat/picvue_proc.c
index eaa2b4625124..cce7cddcdb08 100644
--- a/arch/mips/lasat/picvue_proc.c
+++ b/arch/mips/lasat/picvue_proc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Picvue PVC160206 display driver 2 * Picvue PVC160206 display driver
3 * 3 *
4 * Brian Murphy <brian.murphy@eicon.com> 4 * Brian Murphy <brian.murphy@eicon.com>
5 * 5 *
6 */ 6 */
7#include <linux/kernel.h> 7#include <linux/kernel.h>
@@ -51,10 +51,10 @@ static int pvc_proc_read_line(char *page, char **start,
51 page += sprintf(page, "%s\n", pvc_lines[lineno]); 51 page += sprintf(page, "%s\n", pvc_lines[lineno]);
52 up(&pvc_sem); 52 up(&pvc_sem);
53 53
54 return page - origpage; 54 return page - origpage;
55} 55}
56 56
57static int pvc_proc_write_line(struct file *file, const char *buffer, 57static int pvc_proc_write_line(struct file *file, const char *buffer,
58 unsigned long count, void *data) 58 unsigned long count, void *data)
59{ 59{
60 int origcount = count; 60 int origcount = count;
@@ -119,7 +119,7 @@ static int pvc_proc_read_scroll(char *page, char **start,
119 page += sprintf(page, "%d\n", scroll_dir * scroll_interval); 119 page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
120 up(&pvc_sem); 120 up(&pvc_sem);
121 121
122 return page - origpage; 122 return page - origpage;
123} 123}
124 124
125 125
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c
index ca62881c9e52..88c7ab871ec4 100644
--- a/arch/mips/lasat/prom.c
+++ b/arch/mips/lasat/prom.c
@@ -42,7 +42,7 @@ static void null_prom_putc(char c)
42/* these are functions provided by the bootloader */ 42/* these are functions provided by the bootloader */
43static void (* prom_putc)(char c) = null_prom_putc; 43static void (* prom_putc)(char c) = null_prom_putc;
44void (* prom_printf)(const char * fmt, ...) = null_prom_printf; 44void (* prom_printf)(const char * fmt, ...) = null_prom_printf;
45void (* prom_display)(const char *string, int pos, int clear) = 45void (* prom_display)(const char *string, int pos, int clear) =
46 null_prom_display; 46 null_prom_display;
47void (* prom_monitor)(void) = null_prom_monitor; 47void (* prom_monitor)(void) = null_prom_monitor;
48 48
diff --git a/arch/mips/lasat/reset.c b/arch/mips/lasat/reset.c
index 37e4912ee1c8..8d7d7a454f9a 100644
--- a/arch/mips/lasat/reset.c
+++ b/arch/mips/lasat/reset.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * Thomas Horsten <thh@lasat.com> 2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S. 3 * Copyright (C) 2000 LASAT Networks A/S.
4 * 4 *
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index e371ed5cbe34..f2604fab9a99 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -105,7 +105,7 @@ static int lasat_panic_prom_monitor(struct notifier_block *this,
105 return NOTIFY_DONE; 105 return NOTIFY_DONE;
106} 106}
107 107
108static struct notifier_block lasat_panic_block[] = 108static struct notifier_block lasat_panic_block[] =
109{ 109{
110 { lasat_panic_display, NULL, INT_MAX }, 110 { lasat_panic_display, NULL, INT_MAX },
111 { lasat_panic_prom_monitor, NULL, INT_MIN } 111 { lasat_panic_prom_monitor, NULL, INT_MIN }
@@ -120,7 +120,7 @@ static void lasat_timer_setup(struct irqaction *irq)
120{ 120{
121 121
122 write_c0_compare( 122 write_c0_compare(
123 read_c0_count() + 123 read_c0_count() +
124 mips_hpt_frequency / HZ); 124 mips_hpt_frequency / HZ);
125 change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5); 125 change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
126} 126}
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index 1c0cc620a43f..8ff43a1c1e99 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -37,14 +37,14 @@
37 37
38static DECLARE_MUTEX(lasat_info_sem); 38static DECLARE_MUTEX(lasat_info_sem);
39 39
40/* Strategy function to write EEPROM after changing string entry */ 40/* Strategy function to write EEPROM after changing string entry */
41int sysctl_lasatstring(ctl_table *table, int *name, int nlen, 41int sysctl_lasatstring(ctl_table *table, int *name, int nlen,
42 void *oldval, size_t *oldlenp, 42 void *oldval, size_t *oldlenp,
43 void *newval, size_t newlen, void **context) 43 void *newval, size_t newlen, void **context)
44{ 44{
45 int r; 45 int r;
46 down(&lasat_info_sem); 46 down(&lasat_info_sem);
47 r = sysctl_string(table, name, 47 r = sysctl_string(table, name,
48 nlen, oldval, oldlenp, newval, newlen, context); 48 nlen, oldval, oldlenp, newval, newlen, context);
49 if (r < 0) { 49 if (r < 0) {
50 up(&lasat_info_sem); 50 up(&lasat_info_sem);
@@ -74,7 +74,7 @@ int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
74 return 0; 74 return 0;
75} 75}
76 76
77/* proc function to write EEPROM after changing int entry */ 77/* proc function to write EEPROM after changing int entry */
78int proc_dolasatint(ctl_table *table, int write, struct file *filp, 78int proc_dolasatint(ctl_table *table, int write, struct file *filp,
79 void *buffer, size_t *lenp, loff_t *ppos) 79 void *buffer, size_t *lenp, loff_t *ppos)
80{ 80{
@@ -93,7 +93,7 @@ int proc_dolasatint(ctl_table *table, int write, struct file *filp,
93static int rtctmp; 93static int rtctmp;
94 94
95#ifdef CONFIG_DS1603 95#ifdef CONFIG_DS1603
96/* proc function to read/write RealTime Clock */ 96/* proc function to read/write RealTime Clock */
97int proc_dolasatrtc(ctl_table *table, int write, struct file *filp, 97int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
98 void *buffer, size_t *lenp, loff_t *ppos) 98 void *buffer, size_t *lenp, loff_t *ppos)
99{ 99{
@@ -165,9 +165,9 @@ static char lasat_bcastaddr[16];
165void update_bcastaddr(void) 165void update_bcastaddr(void)
166{ 166{
167 unsigned int ip; 167 unsigned int ip;
168 168
169 ip = (lasat_board_info.li_eeprom_info.ipaddr & 169 ip = (lasat_board_info.li_eeprom_info.ipaddr &
170 lasat_board_info.li_eeprom_info.netmask) | 170 lasat_board_info.li_eeprom_info.netmask) |
171 ~lasat_board_info.li_eeprom_info.netmask; 171 ~lasat_board_info.li_eeprom_info.netmask;
172 172
173 sprintf(lasat_bcastaddr, "%d.%d.%d.%d", 173 sprintf(lasat_bcastaddr, "%d.%d.%d.%d",
@@ -205,7 +205,7 @@ int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
205 break; 205 break;
206 len++; 206 len++;
207 } 207 }
208 if (len >= sizeof(proc_lasat_ipbuf)-1) 208 if (len >= sizeof(proc_lasat_ipbuf)-1)
209 len = sizeof(proc_lasat_ipbuf) - 1; 209 len = sizeof(proc_lasat_ipbuf) - 1;
210 if (copy_from_user(proc_lasat_ipbuf, buffer, len)) 210 if (copy_from_user(proc_lasat_ipbuf, buffer, len))
211 { 211 {
@@ -249,8 +249,8 @@ int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
249} 249}
250#endif /* defined(CONFIG_INET) */ 250#endif /* defined(CONFIG_INET) */
251 251
252static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen, 252static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen,
253 void *oldval, size_t *oldlenp, 253 void *oldval, size_t *oldlenp,
254 void *newval, size_t newlen, 254 void *newval, size_t newlen,
255 void **context) 255 void **context)
256{ 256{
@@ -293,7 +293,7 @@ int proc_lasat_eeprom_value(ctl_table *table, int write, struct file *filp,
293 if (!strcmp(filp->f_dentry->d_name.name, "debugaccess")) 293 if (!strcmp(filp->f_dentry->d_name.name, "debugaccess"))
294 lasat_board_info.li_eeprom_info.debugaccess = lasat_board_info.li_debugaccess; 294 lasat_board_info.li_eeprom_info.debugaccess = lasat_board_info.li_debugaccess;
295 } 295 }
296 lasat_write_eeprom_info(); 296 lasat_write_eeprom_info();
297 up(&lasat_info_sem); 297 up(&lasat_info_sem);
298 return 0; 298 return 0;
299} 299}
@@ -316,8 +316,8 @@ static ctl_table lasat_table[] = {
316 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec}, 316 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec},
317 {LASAT_NETMASK, "netmask", &lasat_board_info.li_eeprom_info.netmask, sizeof(int), 317 {LASAT_NETMASK, "netmask", &lasat_board_info.li_eeprom_info.netmask, sizeof(int),
318 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec}, 318 0644, NULL, &proc_lasat_ip, &sysctl_lasat_intvec},
319 {LASAT_BCAST, "bcastaddr", &lasat_bcastaddr, 319 {LASAT_BCAST, "bcastaddr", &lasat_bcastaddr,
320 sizeof(lasat_bcastaddr), 0600, NULL, 320 sizeof(lasat_bcastaddr), 0600, NULL,
321 &proc_dostring, &sysctl_string}, 321 &proc_dostring, &sysctl_string},
322#endif 322#endif
323 {LASAT_PASSWORD, "passwd_hash", &lasat_board_info.li_eeprom_info.passwd_hash, sizeof(lasat_board_info.li_eeprom_info.passwd_hash), 323 {LASAT_PASSWORD, "passwd_hash", &lasat_board_info.li_eeprom_info.passwd_hash, sizeof(lasat_board_info.li_eeprom_info.passwd_hash),
diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile
index fd6a2bafdfcf..ad285786e74b 100644
--- a/arch/mips/lib-32/Makefile
+++ b/arch/mips/lib-32/Makefile
@@ -2,7 +2,7 @@
2# Makefile for MIPS-specific library files.. 2# Makefile for MIPS-specific library files..
3# 3#
4 4
5lib-y += csum_partial.o memset.o watch.o 5lib-y += csum_partial.o memset.o watch.o
6 6
7obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o 7obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o
8obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o 8obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o
diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile
index fd6a2bafdfcf..ad285786e74b 100644
--- a/arch/mips/lib-64/Makefile
+++ b/arch/mips/lib-64/Makefile
@@ -2,7 +2,7 @@
2# Makefile for MIPS-specific library files.. 2# Makefile for MIPS-specific library files..
3# 3#
4 4
5lib-y += csum_partial.o memset.o watch.o 5lib-y += csum_partial.o memset.o watch.o
6 6
7obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o 7obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o
8obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o 8obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index afa8eae18ff6..90ee8d43261f 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -79,7 +79,7 @@
79/* 79/*
80 * Only on the 64-bit kernel we can made use of 64-bit registers. 80 * Only on the 64-bit kernel we can made use of 64-bit registers.
81 */ 81 */
82#ifdef CONFIG_MIPS64 82#ifdef CONFIG_64BIT
83#define USE_DOUBLE 83#define USE_DOUBLE
84#endif 84#endif
85 85
@@ -101,7 +101,7 @@
101#define NBYTES 8 101#define NBYTES 8
102#define LOG_NBYTES 3 102#define LOG_NBYTES 3
103 103
104/* 104/*
105 * As we are sharing code base with the mips32 tree (which use the o32 ABI 105 * As we are sharing code base with the mips32 tree (which use the o32 ABI
106 * register definitions). We need to redefine the register definitions from 106 * register definitions). We need to redefine the register definitions from
107 * the n64 ABI register naming to the o32 ABI register naming. 107 * the n64 ABI register naming to the o32 ABI register naming.
@@ -118,7 +118,7 @@
118#define t5 $13 118#define t5 $13
119#define t6 $14 119#define t6 $14
120#define t7 $15 120#define t7 $15
121 121
122#else 122#else
123 123
124#define LOAD lw 124#define LOAD lw
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 20a552be02ee..99c550632d44 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -320,7 +320,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
320 case cop1_op: 320 case cop1_op:
321 switch (MIPSInst_RS(ir)) { 321 switch (MIPSInst_RS(ir)) {
322 322
323#if __mips64 && !defined(SINGLE_ONLY_FPU) 323#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
324 case dmfc_op: 324 case dmfc_op:
325 /* copregister fs -> gpr[rt] */ 325 /* copregister fs -> gpr[rt] */
326 if (MIPSInst_RT(ir) != 0) { 326 if (MIPSInst_RT(ir) != 0) {
@@ -805,7 +805,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
805 ieee754dp d; 805 ieee754dp d;
806 ieee754sp s; 806 ieee754sp s;
807 int w; 807 int w;
808#if __mips64 808#ifdef __mips64
809 s64 l; 809 s64 l;
810#endif 810#endif
811 } rv; /* resulting value */ 811 } rv; /* resulting value */
@@ -950,7 +950,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
950 } 950 }
951#endif /* __mips >= 2 */ 951#endif /* __mips >= 2 */
952 952
953#if __mips64 && !defined(SINGLE_ONLY_FPU) 953#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
954 case fcvtl_op:{ 954 case fcvtl_op:{
955 ieee754sp fs; 955 ieee754sp fs;
956 956
@@ -1125,7 +1125,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1125 } 1125 }
1126#endif 1126#endif
1127 1127
1128#if __mips64 && !defined(SINGLE_ONLY_FPU) 1128#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
1129 case fcvtl_op:{ 1129 case fcvtl_op:{
1130 ieee754dp fs; 1130 ieee754dp fs;
1131 1131
@@ -1203,7 +1203,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1203 break; 1203 break;
1204 } 1204 }
1205 1205
1206#if __mips64 && !defined(SINGLE_ONLY_FPU) 1206#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
1207 case l_fmt:{ 1207 case l_fmt:{
1208 switch (MIPSInst_FUNC(ir)) { 1208 switch (MIPSInst_FUNC(ir)) {
1209 case fcvts_op: 1209 case fcvts_op:
@@ -1267,7 +1267,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1267 case w_fmt: 1267 case w_fmt:
1268 SITOREG(rv.w, MIPSInst_FD(ir)); 1268 SITOREG(rv.w, MIPSInst_FD(ir));
1269 break; 1269 break;
1270#if __mips64 && !defined(SINGLE_ONLY_FPU) 1270#if defined(__mips64) && !defined(SINGLE_ONLY_FPU)
1271 case l_fmt: 1271 case l_fmt:
1272 DITOREG(rv.l, MIPSInst_FD(ir)); 1272 DITOREG(rv.l, MIPSInst_FD(ir));
1273 break; 1273 break;
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index 04397fec30fc..4002f0cf79f3 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -86,7 +86,7 @@ int fpu_emulator_restore_context(struct sigcontext *sc)
86 return err; 86 return err;
87} 87}
88 88
89#ifdef CONFIG_MIPS64 89#ifdef CONFIG_64BIT
90/* 90/*
91 * This is the o32 version 91 * This is the o32 version
92 */ 92 */
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 8f1d875217a2..19d4b0792460 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -122,7 +122,7 @@ void __init arch_init_irq(void)
122 int i; 122 int i;
123 123
124 atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *)); 124 atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *));
125 125
126 /* 126 /*
127 * Mask out all interrupt by writing "1" to all bit position in 127 * Mask out all interrupt by writing "1" to all bit position in
128 * the interrupt reset reg. 128 * the interrupt reset reg.
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index 31caf0603a3f..311155d1d3ed 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -200,7 +200,7 @@ void __init kgdb_config (void)
200 generic_putDebugChar = saa9730_putDebugChar; 200 generic_putDebugChar = saa9730_putDebugChar;
201 generic_getDebugChar = saa9730_getDebugChar; 201 generic_getDebugChar = saa9730_getDebugChar;
202 } 202 }
203 else 203 else
204#endif 204#endif
205 { 205 {
206 speed = rs_kgdb_hook(line, speed); 206 speed = rs_kgdb_hook(line, speed);
@@ -243,7 +243,7 @@ void __init prom_init(void)
243 mips_revision_corid = MIPS_REVISION_CORID; 243 mips_revision_corid = MIPS_REVISION_CORID;
244 244
245 if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) { 245 if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
246 if (BONITO_PCIDID == 0x0001df53 || 246 if (BONITO_PCIDID == 0x0001df53 ||
247 BONITO_PCIDID == 0x0003df53) 247 BONITO_PCIDID == 0x0003df53)
248 mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON; 248 mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
249 else 249 else
@@ -310,7 +310,7 @@ void __init prom_init(void)
310 case MIPS_REVISION_CORID_CORE_MSC: 310 case MIPS_REVISION_CORID_CORE_MSC:
311 case MIPS_REVISION_CORID_CORE_FPGA2: 311 case MIPS_REVISION_CORID_CORE_FPGA2:
312 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 312 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
313 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); 313 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
314 314
315#ifdef CONFIG_CPU_LITTLE_ENDIAN 315#ifdef CONFIG_CPU_LITTLE_ENDIAN
316 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP); 316 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index fe7fc17305a6..16315444dd5a 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -89,7 +89,7 @@ static unsigned int __init estimate_cpu_frequency(void)
89 * really calculate the timer frequency 89 * really calculate the timer frequency
90 * For now we hardwire the SEAD board frequency to 12MHz. 90 * For now we hardwire the SEAD board frequency to 12MHz.
91 */ 91 */
92 92
93 if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) || 93 if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
94 (prid == (PRID_COMP_MIPS | PRID_IMP_25KF))) 94 (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
95 count = 12000000; 95 count = 12000000;
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index 3377e66de9eb..df6db6419ae9 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -149,15 +149,15 @@ static int __init malta_setup(void)
149 argptr = prom_getcmdline(); 149 argptr = prom_getcmdline();
150 if (strstr(argptr, "iobcuncached")) { 150 if (strstr(argptr, "iobcuncached")) {
151 BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; 151 BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
152 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & 152 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
153 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | 153 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
154 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); 154 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
155 printk("Disabled Bonito IOBC coherency\n"); 155 printk("Disabled Bonito IOBC coherency\n");
156 } 156 }
157 else { 157 else {
158 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; 158 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
159 BONITO_PCIMEMBASECFG |= 159 BONITO_PCIMEMBASECFG |=
160 (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | 160 (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
161 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); 161 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
162 printk("Disabled Bonito IOBC coherency\n"); 162 printk("Disabled Bonito IOBC coherency\n");
163 } 163 }
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index f61e038b4440..b56a0abdc3d4 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -5,8 +5,8 @@
5obj-y += cache.o extable.o fault.o init.o pgtable.o \ 5obj-y += cache.o extable.o fault.o init.o pgtable.o \
6 tlbex.o tlbex-fault.o 6 tlbex.o tlbex-fault.o
7 7
8obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o 8obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o
9obj-$(CONFIG_MIPS64) += pgtable-64.o 9obj-$(CONFIG_64BIT) += pgtable-64.o
10obj-$(CONFIG_HIGHMEM) += highmem.o 10obj-$(CONFIG_HIGHMEM) += highmem.o
11 11
12obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 12obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index a03ebb2cba67..5ea84bc98c6a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -126,13 +126,13 @@ static inline void tx49_blast_icache32(void)
126 126
127 CACHE32_UNROLL32_ALIGN2; 127 CACHE32_UNROLL32_ALIGN2;
128 /* I'm in even chunk. blast odd chunks */ 128 /* I'm in even chunk. blast odd chunks */
129 for (ws = 0; ws < ws_end; ws += ws_inc) 129 for (ws = 0; ws < ws_end; ws += ws_inc)
130 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 130 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
131 cache32_unroll32(addr|ws,Index_Invalidate_I); 131 cache32_unroll32(addr|ws,Index_Invalidate_I);
132 CACHE32_UNROLL32_ALIGN; 132 CACHE32_UNROLL32_ALIGN;
133 /* I'm in odd chunk. blast even chunks */ 133 /* I'm in odd chunk. blast even chunks */
134 for (ws = 0; ws < ws_end; ws += ws_inc) 134 for (ws = 0; ws < ws_end; ws += ws_inc)
135 for (addr = start; addr < end; addr += 0x400 * 2) 135 for (addr = start; addr < end; addr += 0x400 * 2)
136 cache32_unroll32(addr|ws,Index_Invalidate_I); 136 cache32_unroll32(addr|ws,Index_Invalidate_I);
137} 137}
138 138
@@ -156,13 +156,13 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
156 156
157 CACHE32_UNROLL32_ALIGN2; 157 CACHE32_UNROLL32_ALIGN2;
158 /* I'm in even chunk. blast odd chunks */ 158 /* I'm in even chunk. blast odd chunks */
159 for (ws = 0; ws < ws_end; ws += ws_inc) 159 for (ws = 0; ws < ws_end; ws += ws_inc)
160 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 160 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
161 cache32_unroll32(addr|ws,Index_Invalidate_I); 161 cache32_unroll32(addr|ws,Index_Invalidate_I);
162 CACHE32_UNROLL32_ALIGN; 162 CACHE32_UNROLL32_ALIGN;
163 /* I'm in odd chunk. blast even chunks */ 163 /* I'm in odd chunk. blast even chunks */
164 for (ws = 0; ws < ws_end; ws += ws_inc) 164 for (ws = 0; ws < ws_end; ws += ws_inc)
165 for (addr = start; addr < end; addr += 0x400 * 2) 165 for (addr = start; addr < end; addr += 0x400 * 2)
166 cache32_unroll32(addr|ws,Index_Invalidate_I); 166 cache32_unroll32(addr|ws,Index_Invalidate_I);
167} 167}
168 168
@@ -723,10 +723,10 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
723 ".set push\n\t" 723 ".set push\n\t"
724 ".set noat\n\t" 724 ".set noat\n\t"
725 ".set mips3\n\t" 725 ".set mips3\n\t"
726#ifdef CONFIG_MIPS32 726#ifdef CONFIG_32BIT
727 "la $at,1f\n\t" 727 "la $at,1f\n\t"
728#endif 728#endif
729#ifdef CONFIG_MIPS64 729#ifdef CONFIG_64BIT
730 "dla $at,1f\n\t" 730 "dla $at,1f\n\t"
731#endif 731#endif
732 "cache %0,($at)\n\t" 732 "cache %0,($at)\n\t"
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index ab30afd63b32..502f68c664b2 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -270,7 +270,7 @@ static void local_sb1_flush_icache_range(unsigned long start,
270 __sb1_writeback_inv_dcache_all(); 270 __sb1_writeback_inv_dcache_all();
271 else 271 else
272 __sb1_writeback_inv_dcache_range(start, end); 272 __sb1_writeback_inv_dcache_range(start, end);
273 273
274 /* Just flush the whole icache if the range is big enough */ 274 /* Just flush the whole icache if the range is big enough */
275 if ((end - start) > icache_range_cutoff) 275 if ((end - start) > icache_range_cutoff)
276 __sb1_flush_icache_all(); 276 __sb1_flush_icache_all();
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 13d96d62764e..7166ffe63502 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -25,7 +25,7 @@
25#include <asm/sibyte/sb1250_regs.h> 25#include <asm/sibyte/sb1250_regs.h>
26#include <asm/sibyte/sb1250_scd.h> 26#include <asm/sibyte/sb1250_scd.h>
27#endif 27#endif
28 28
29/* SB1 definitions */ 29/* SB1 definitions */
30 30
31/* XXX should come from config1 XXX */ 31/* XXX should come from config1 XXX */
@@ -136,14 +136,14 @@ static inline void breakout_cerrd(unsigned int val)
136 136
137#ifndef CONFIG_SIBYTE_BUS_WATCHER 137#ifndef CONFIG_SIBYTE_BUS_WATCHER
138 138
139static void check_bus_watcher(void) 139static void check_bus_watcher(void)
140{ 140{
141 uint32_t status, l2_err, memio_err; 141 uint32_t status, l2_err, memio_err;
142 142
143 /* Destructive read, clears register and interrupt */ 143 /* Destructive read, clears register and interrupt */
144 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); 144 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
145 /* Bit 31 is always on, but there's no #define for that */ 145 /* Bit 31 is always on, but there's no #define for that */
146 if (status & ~(1UL << 31)) { 146 if (status & ~(1UL << 31)) {
147 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); 147 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
148 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); 148 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
149 prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err); 149 prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
@@ -153,14 +153,14 @@ static void check_bus_watcher(void)
153 (int)(G_SCD_BERR_TID(status) >> 6), 153 (int)(G_SCD_BERR_TID(status) >> 6),
154 (int)G_SCD_BERR_RID(status), 154 (int)G_SCD_BERR_RID(status),
155 (int)G_SCD_BERR_DCODE(status)); 155 (int)G_SCD_BERR_DCODE(status));
156 } else { 156 } else {
157 prom_printf("Bus watcher indicates no error\n"); 157 prom_printf("Bus watcher indicates no error\n");
158 } 158 }
159} 159}
160#else 160#else
161extern void check_bus_watcher(void); 161extern void check_bus_watcher(void);
162#endif 162#endif
163 163
164asmlinkage void sb1_cache_error(void) 164asmlinkage void sb1_cache_error(void)
165{ 165{
166 uint64_t cerr_dpa; 166 uint64_t cerr_dpa;
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index 9895e32b0fce..59e54f12212e 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -162,7 +162,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
162 162
163 for (i = 0; i < nents; i++, sg++) { 163 for (i = 0; i < nents; i++, sg++) {
164 unsigned long addr; 164 unsigned long addr;
165 165
166 addr = (unsigned long) page_address(sg->page); 166 addr = (unsigned long) page_address(sg->page);
167 if (addr) 167 if (addr)
168 __dma_sync(addr + sg->offset, sg->length, direction); 168 __dma_sync(addr + sg->offset, sg->length, direction);
@@ -230,9 +230,9 @@ void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
230 size_t size, enum dma_data_direction direction) 230 size_t size, enum dma_data_direction direction)
231{ 231{
232 unsigned long addr; 232 unsigned long addr;
233 233
234 BUG_ON(direction == DMA_NONE); 234 BUG_ON(direction == DMA_NONE);
235 235
236 addr = dma_handle + PAGE_OFFSET; 236 addr = dma_handle + PAGE_OFFSET;
237 __dma_sync(addr, size, direction); 237 __dma_sync(addr, size, direction);
238} 238}
@@ -282,9 +282,9 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
282 enum dma_data_direction direction) 282 enum dma_data_direction direction)
283{ 283{
284 int i; 284 int i;
285 285
286 BUG_ON(direction == DMA_NONE); 286 BUG_ON(direction == DMA_NONE);
287 287
288 /* Make sure that gcc doesn't leave the empty loop body. */ 288 /* Make sure that gcc doesn't leave the empty loop body. */
289 for (i = 0; i < nelems; i++, sg++) 289 for (i = 0; i < nelems; i++, sg++)
290 __dma_sync((unsigned long)page_address(sg->page), 290 __dma_sync((unsigned long)page_address(sg->page),
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 9c9a271c8a3a..dc6830b10fab 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -96,7 +96,7 @@ static void __init kmap_init(void)
96 kmap_prot = PAGE_KERNEL; 96 kmap_prot = PAGE_KERNEL;
97} 97}
98 98
99#ifdef CONFIG_MIPS64 99#ifdef CONFIG_64BIT
100static void __init fixrange_init(unsigned long start, unsigned long end, 100static void __init fixrange_init(unsigned long start, unsigned long end,
101 pgd_t *pgd_base) 101 pgd_t *pgd_base)
102{ 102{
@@ -125,7 +125,7 @@ static void __init fixrange_init(unsigned long start, unsigned long end,
125 j = 0; 125 j = 0;
126 } 126 }
127} 127}
128#endif /* CONFIG_MIPS64 */ 128#endif /* CONFIG_64BIT */
129#endif /* CONFIG_HIGHMEM */ 129#endif /* CONFIG_HIGHMEM */
130 130
131#ifndef CONFIG_NEED_MULTIPLE_NODES 131#ifndef CONFIG_NEED_MULTIPLE_NODES
@@ -258,7 +258,7 @@ void __init mem_init(void)
258#ifdef CONFIG_BLK_DEV_INITRD 258#ifdef CONFIG_BLK_DEV_INITRD
259void free_initrd_mem(unsigned long start, unsigned long end) 259void free_initrd_mem(unsigned long start, unsigned long end)
260{ 260{
261#ifdef CONFIG_MIPS64 261#ifdef CONFIG_64BIT
262 /* Switch from KSEG0 to XKPHYS addresses */ 262 /* Switch from KSEG0 to XKPHYS addresses */
263 start = (unsigned long)phys_to_virt(CPHYSADDR(start)); 263 start = (unsigned long)phys_to_virt(CPHYSADDR(start));
264 end = (unsigned long)phys_to_virt(CPHYSADDR(end)); 264 end = (unsigned long)phys_to_virt(CPHYSADDR(end));
@@ -286,7 +286,7 @@ void free_initmem(void)
286 286
287 addr = (unsigned long) &__init_begin; 287 addr = (unsigned long) &__init_begin;
288 while (addr < (unsigned long) &__init_end) { 288 while (addr < (unsigned long) &__init_end) {
289#ifdef CONFIG_MIPS64 289#ifdef CONFIG_64BIT
290 page = PAGE_OFFSET | CPHYSADDR(addr); 290 page = PAGE_OFFSET | CPHYSADDR(addr);
291#else 291#else
292 page = addr; 292 page = addr;
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 59d131b5e536..1b6df7133c1e 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -114,7 +114,7 @@ static inline void copy_page_cpu(void *to, void *from)
114 " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n" 114 " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n"
115 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n" 115 " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n"
116 "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n" 116 "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n"
117# ifdef CONFIG_MIPS64 117# ifdef CONFIG_64BIT
118 " ld $8, -128(%0) \n" /* Block copy a cacheline */ 118 " ld $8, -128(%0) \n" /* Block copy a cacheline */
119 " ld $9, -120(%0) \n" 119 " ld $9, -120(%0) \n"
120 " ld $10, -112(%0) \n" 120 " ld $10, -112(%0) \n"
@@ -148,7 +148,7 @@ static inline void copy_page_cpu(void *to, void *from)
148 " daddiu %0, %0, -128 \n" 148 " daddiu %0, %0, -128 \n"
149 " daddiu %1, %1, -128 \n" 149 " daddiu %1, %1, -128 \n"
150#endif 150#endif
151#ifdef CONFIG_MIPS64 151#ifdef CONFIG_64BIT
152 " ld $8, 0(%0) \n" /* Block copy a cacheline */ 152 " ld $8, 0(%0) \n" /* Block copy a cacheline */
153 "1: ld $9, 8(%0) \n" 153 "1: ld $9, 8(%0) \n"
154 " ld $10, 16(%0) \n" 154 " ld $10, 16(%0) \n"
@@ -178,7 +178,7 @@ static inline void copy_page_cpu(void *to, void *from)
178 " daddiu %0, %0, 32 \n" 178 " daddiu %0, %0, 32 \n"
179 " daddiu %1, %1, 32 \n" 179 " daddiu %1, %1, 32 \n"
180 " bnel %0, %2, 1b \n" 180 " bnel %0, %2, 1b \n"
181#ifdef CONFIG_MIPS64 181#ifdef CONFIG_64BIT
182 " ld $8, 0(%0) \n" 182 " ld $8, 0(%0) \n"
183#else 183#else
184 " lw $2, 0(%0) \n" 184 " lw $2, 0(%0) \n"
@@ -186,7 +186,7 @@ static inline void copy_page_cpu(void *to, void *from)
186 " .set pop \n" 186 " .set pop \n"
187 : "+r" (src), "+r" (dst) 187 : "+r" (src), "+r" (dst)
188 : "r" (end) 188 : "r" (end)
189#ifdef CONFIG_MIPS64 189#ifdef CONFIG_64BIT
190 : "$8","$9","$10","$11","memory"); 190 : "$8","$9","$10","$11","memory");
191#else 191#else
192 : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); 192 : "$2","$3","$6","$7","$8","$9","$10","$11","memory");
@@ -198,7 +198,7 @@ static inline void copy_page_cpu(void *to, void *from)
198 198
199/* 199/*
200 * Pad descriptors to cacheline, since each is exclusively owned by a 200 * Pad descriptors to cacheline, since each is exclusively owned by a
201 * particular CPU. 201 * particular CPU.
202 */ 202 */
203typedef struct dmadscr_s { 203typedef struct dmadscr_s {
204 u64 dscr_a; 204 u64 dscr_a;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 87e229f4d3d5..6569be3983c7 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -448,7 +448,7 @@ L_LA(_r3000_write_probe_fail)
448L_LA(_r3000_write_probe_ok) 448L_LA(_r3000_write_probe_ok)
449 449
450/* convenience macros for instructions */ 450/* convenience macros for instructions */
451#ifdef CONFIG_MIPS64 451#ifdef CONFIG_64BIT
452# define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off) 452# define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off)
453# define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off) 453# define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off)
454# define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh) 454# define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh)
@@ -486,7 +486,7 @@ L_LA(_r3000_write_probe_ok)
486#define i_ssnop(buf) i_sll(buf, 0, 0, 1) 486#define i_ssnop(buf) i_sll(buf, 0, 0, 1)
487#define i_ehb(buf) i_sll(buf, 0, 0, 3) 487#define i_ehb(buf) i_sll(buf, 0, 0, 3)
488 488
489#ifdef CONFIG_MIPS64 489#ifdef CONFIG_64BIT
490static __init int __attribute__((unused)) in_compat_space_p(long addr) 490static __init int __attribute__((unused)) in_compat_space_p(long addr)
491{ 491{
492 /* Is this address in 32bit compat space? */ 492 /* Is this address in 32bit compat space? */
@@ -516,7 +516,7 @@ static __init int rel_lo(long val)
516 516
517static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) 517static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr)
518{ 518{
519#if CONFIG_MIPS64 519#ifdef CONFIG_64BIT
520 if (!in_compat_space_p(addr)) { 520 if (!in_compat_space_p(addr)) {
521 i_lui(buf, rs, rel_highest(addr)); 521 i_lui(buf, rs, rel_highest(addr));
522 if (rel_higher(addr)) 522 if (rel_higher(addr))
@@ -682,7 +682,7 @@ static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg,
682#define C0_EPC 14 682#define C0_EPC 14
683#define C0_XCONTEXT 20 683#define C0_XCONTEXT 20
684 684
685#ifdef CONFIG_MIPS64 685#ifdef CONFIG_64BIT
686# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT) 686# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT)
687#else 687#else
688# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT) 688# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT)
@@ -923,7 +923,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
923 } 923 }
924} 924}
925 925
926#ifdef CONFIG_MIPS64 926#ifdef CONFIG_64BIT
927/* 927/*
928 * TMP and PTR are scratch. 928 * TMP and PTR are scratch.
929 * TMP will be clobbered, PTR will hold the pmd entry. 929 * TMP will be clobbered, PTR will hold the pmd entry.
@@ -1010,7 +1010,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
1010 } 1010 }
1011} 1011}
1012 1012
1013#else /* !CONFIG_MIPS64 */ 1013#else /* !CONFIG_64BIT */
1014 1014
1015/* 1015/*
1016 * TMP and PTR are scratch. 1016 * TMP and PTR are scratch.
@@ -1038,7 +1038,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1038 i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ 1038 i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
1039} 1039}
1040 1040
1041#endif /* !CONFIG_MIPS64 */ 1041#endif /* !CONFIG_64BIT */
1042 1042
1043static __init void build_adjust_context(u32 **p, unsigned int ctx) 1043static __init void build_adjust_context(u32 **p, unsigned int ctx)
1044{ 1044{
@@ -1159,7 +1159,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1159 /* No need for i_nop */ 1159 /* No need for i_nop */
1160 } 1160 }
1161 1161
1162#ifdef CONFIG_MIPS64 1162#ifdef CONFIG_64BIT
1163 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ 1163 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
1164#else 1164#else
1165 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ 1165 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
@@ -1171,7 +1171,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1171 l_leave(&l, p); 1171 l_leave(&l, p);
1172 i_eret(&p); /* return from trap */ 1172 i_eret(&p); /* return from trap */
1173 1173
1174#ifdef CONFIG_MIPS64 1174#ifdef CONFIG_64BIT
1175 build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); 1175 build_get_pgd_vmalloc64(&p, &l, &r, K0, K1);
1176#endif 1176#endif
1177 1177
@@ -1182,7 +1182,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1182 * need three, with the the second nop'ed and the third being 1182 * need three, with the the second nop'ed and the third being
1183 * unused. 1183 * unused.
1184 */ 1184 */
1185#ifdef CONFIG_MIPS32 1185#ifdef CONFIG_32BIT
1186 if ((p - tlb_handler) > 64) 1186 if ((p - tlb_handler) > 64)
1187 panic("TLB refill handler space exceeded"); 1187 panic("TLB refill handler space exceeded");
1188#else 1188#else
@@ -1195,12 +1195,12 @@ static void __init build_r4000_tlb_refill_handler(void)
1195 /* 1195 /*
1196 * Now fold the handler in the TLB refill handler space. 1196 * Now fold the handler in the TLB refill handler space.
1197 */ 1197 */
1198#ifdef CONFIG_MIPS32 1198#ifdef CONFIG_32BIT
1199 f = final_handler; 1199 f = final_handler;
1200 /* Simplest case, just copy the handler. */ 1200 /* Simplest case, just copy the handler. */
1201 copy_handler(relocs, labels, tlb_handler, p, f); 1201 copy_handler(relocs, labels, tlb_handler, p, f);
1202 final_len = p - tlb_handler; 1202 final_len = p - tlb_handler;
1203#else /* CONFIG_MIPS64 */ 1203#else /* CONFIG_64BIT */
1204 f = final_handler + 32; 1204 f = final_handler + 32;
1205 if ((p - tlb_handler) <= 32) { 1205 if ((p - tlb_handler) <= 32) {
1206 /* Just copy the handler. */ 1206 /* Just copy the handler. */
@@ -1235,7 +1235,7 @@ static void __init build_r4000_tlb_refill_handler(void)
1235 copy_handler(relocs, labels, split, p, final_handler); 1235 copy_handler(relocs, labels, split, p, final_handler);
1236 final_len = (f - (final_handler + 32)) + (p - split); 1236 final_len = (f - (final_handler + 32)) + (p - split);
1237 } 1237 }
1238#endif /* CONFIG_MIPS64 */ 1238#endif /* CONFIG_64BIT */
1239 1239
1240 resolve_relocs(relocs, labels); 1240 resolve_relocs(relocs, labels);
1241 printk("Synthesized TLB refill handler (%u instructions).\n", 1241 printk("Synthesized TLB refill handler (%u instructions).\n",
@@ -1605,7 +1605,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct label **l,
1605 struct reloc **r, unsigned int pte, 1605 struct reloc **r, unsigned int pte,
1606 unsigned int ptr) 1606 unsigned int ptr)
1607{ 1607{
1608#ifdef CONFIG_MIPS64 1608#ifdef CONFIG_64BIT
1609 build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ 1609 build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */
1610#else 1610#else
1611 build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ 1611 build_get_pgde32(p, pte, ptr); /* get pgd in ptr */
@@ -1636,7 +1636,7 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct label **l,
1636 l_leave(l, *p); 1636 l_leave(l, *p);
1637 i_eret(p); /* return from trap */ 1637 i_eret(p); /* return from trap */
1638 1638
1639#ifdef CONFIG_MIPS64 1639#ifdef CONFIG_64BIT
1640 build_get_pgd_vmalloc64(p, l, r, tmp, ptr); 1640 build_get_pgd_vmalloc64(p, l, r, tmp, ptr);
1641#endif 1641#endif
1642} 1642}
diff --git a/arch/mips/momentum/jaguar_atx/int-handler.S b/arch/mips/momentum/jaguar_atx/int-handler.S
index 43fd5a58077c..55bc789733f2 100644
--- a/arch/mips/momentum/jaguar_atx/int-handler.S
+++ b/arch/mips/momentum/jaguar_atx/int-handler.S
@@ -27,11 +27,11 @@
27 SAVE_ALL 27 SAVE_ALL
28 CLI 28 CLI
29 .set at 29 .set at
30 mfc0 t0, CP0_CAUSE 30 mfc0 t0, CP0_CAUSE
31 mfc0 t2, CP0_STATUS 31 mfc0 t2, CP0_STATUS
32 32
33 and t0, t2 33 and t0, t2
34 34
35 andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ 35 andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
36 bnez t1, ll_sw0_irq 36 bnez t1, ll_sw0_irq
37 andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ 37 andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
@@ -103,25 +103,25 @@ ll_pcia_irq:
103 move a1, sp 103 move a1, sp
104 jal do_IRQ 104 jal do_IRQ
105 j ret_from_irq 105 j ret_from_irq
106 106
107ll_pcib_irq: 107ll_pcib_irq:
108 li a0, 5 108 li a0, 5
109 move a1, sp 109 move a1, sp
110 jal do_IRQ 110 jal do_IRQ
111 j ret_from_irq 111 j ret_from_irq
112 112
113ll_uart_irq: 113ll_uart_irq:
114 li a0, 6 114 li a0, 6
115 move a1, sp 115 move a1, sp
116 jal do_IRQ 116 jal do_IRQ
117 j ret_from_irq 117 j ret_from_irq
118 118
119ll_cputimer_irq: 119ll_cputimer_irq:
120 li a0, 7 120 li a0, 7
121 move a1, sp 121 move a1, sp
122 jal ll_timer_interrupt 122 jal ll_timer_interrupt
123 j ret_from_irq 123 j ret_from_irq
124 124
125ll_mv64340_decode_irq: 125ll_mv64340_decode_irq:
126 move a0, sp 126 move a0, sp
127 jal ll_mv64340_irq 127 jal ll_mv64340_irq
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c
index fa5982ac0ac6..14ae2e713585 100644
--- a/arch/mips/momentum/jaguar_atx/prom.c
+++ b/arch/mips/momentum/jaguar_atx/prom.c
@@ -64,7 +64,7 @@ static u8 exchange_bit(u8 val, u8 cs)
64 64
65 /* turn the clock off and read-strobe */ 65 /* turn the clock off and read-strobe */
66 JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); 66 JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
67 67
68 /* return the data */ 68 /* return the data */
69 return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); 69 return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
70} 70}
@@ -90,7 +90,7 @@ void get_mac(char dest[6])
90} 90}
91#endif 91#endif
92 92
93#ifdef CONFIG_MIPS64 93#ifdef CONFIG_64BIT
94 94
95unsigned long signext(unsigned long addr) 95unsigned long signext(unsigned long addr)
96{ 96{
@@ -143,7 +143,7 @@ char *arg64(unsigned long addrin, int arg_index)
143 143
144 return p; 144 return p;
145} 145}
146#endif /* CONFIG_MIPS64 */ 146#endif /* CONFIG_64BIT */
147 147
148/* PMON passes arguments in C main() style */ 148/* PMON passes arguments in C main() style */
149void __init prom_init(void) 149void __init prom_init(void)
@@ -158,7 +158,7 @@ void __init prom_init(void)
158// ja_setup_console(); /* The very first thing. */ 158// ja_setup_console(); /* The very first thing. */
159#endif 159#endif
160 160
161#ifdef CONFIG_MIPS64 161#ifdef CONFIG_64BIT
162 char *ptr; 162 char *ptr;
163 163
164 printk("Mips64 Jaguar-ATX\n"); 164 printk("Mips64 Jaguar-ATX\n");
@@ -201,7 +201,7 @@ void __init prom_init(void)
201 } 201 }
202 printk("arcs_cmdline: %s\n", arcs_cmdline); 202 printk("arcs_cmdline: %s\n", arcs_cmdline);
203 203
204#else /* CONFIG_MIPS64 */ 204#else /* CONFIG_64BIT */
205 /* save the PROM vectors for debugging use */ 205 /* save the PROM vectors for debugging use */
206 debug_vectors = cv; 206 debug_vectors = cv;
207 207
@@ -226,7 +226,7 @@ void __init prom_init(void)
226 } 226 }
227 env++; 227 env++;
228 } 228 }
229#endif /* CONFIG_MIPS64 */ 229#endif /* CONFIG_64BIT */
230 mips_machgroup = MACH_GROUP_MOMENCO; 230 mips_machgroup = MACH_GROUP_MOMENCO;
231 mips_machtype = MACH_MOMENCO_JAGUAR_ATX; 231 mips_machtype = MACH_MOMENCO_JAGUAR_ATX;
232 232
diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c
index 48039484cdf9..c4236b1e59fa 100644
--- a/arch/mips/momentum/jaguar_atx/reset.c
+++ b/arch/mips/momentum/jaguar_atx/reset.c
@@ -27,7 +27,7 @@
27void momenco_jaguar_restart(char *command) 27void momenco_jaguar_restart(char *command)
28{ 28{
29 /* base address of timekeeper portion of part */ 29 /* base address of timekeeper portion of part */
30#ifdef CONFIG_MIPS64 30#ifdef CONFIG_64BIT
31 void *nvram = (void*) 0xfffffffffc807000; 31 void *nvram = (void*) 0xfffffffffc807000;
32#else 32#else
33 void *nvram = (void*) 0xfc807000; 33 void *nvram = (void*) 0xfc807000;
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index 30462e715066..90288cf2b1e0 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -105,7 +105,7 @@ void __init bus_error_init(void) { /* nothing */ }
105 105
106static __init void wire_stupidity_into_tlb(void) 106static __init void wire_stupidity_into_tlb(void)
107{ 107{
108#ifdef CONFIG_MIPS32 108#ifdef CONFIG_32BIT
109 write_c0_wired(0); 109 write_c0_wired(0);
110 local_flush_tlb_all(); 110 local_flush_tlb_all();
111 111
@@ -451,7 +451,7 @@ static int __init momenco_jaguar_atx_setup(void)
451#ifdef GEMDEBUG_TRACEBUFFER 451#ifdef GEMDEBUG_TRACEBUFFER
452 { 452 {
453 unsigned int tbControl; 453 unsigned int tbControl;
454 tbControl = 454 tbControl =
455 0 << 26 | /* post trigger delay 0 */ 455 0 << 26 | /* post trigger delay 0 */
456 0x2 << 16 | /* sequential trace mode */ 456 0x2 << 16 | /* sequential trace mode */
457 // 0x0 << 16 | /* non-sequential trace mode */ 457 // 0x0 << 16 | /* non-sequential trace mode */
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c
index 89c17a0c0bed..c4fa9c525faa 100644
--- a/arch/mips/momentum/ocelot_3/prom.c
+++ b/arch/mips/momentum/ocelot_3/prom.c
@@ -93,7 +93,7 @@ void get_mac(char dest[6])
93#endif 93#endif
94 94
95 95
96#ifdef CONFIG_MIPS64 96#ifdef CONFIG_64BIT
97 97
98unsigned long signext(unsigned long addr) 98unsigned long signext(unsigned long addr)
99{ 99{
@@ -145,7 +145,7 @@ char *arg64(unsigned long addrin, int arg_index)
145 145
146 return p; 146 return p;
147} 147}
148#endif /* CONFIG_MIPS64 */ 148#endif /* CONFIG_64BIT */
149 149
150void __init prom_init(void) 150void __init prom_init(void)
151{ 151{
@@ -155,7 +155,7 @@ void __init prom_init(void)
155 struct callvectors *cv = (struct callvectors *) fw_arg3; 155 struct callvectors *cv = (struct callvectors *) fw_arg3;
156 int i; 156 int i;
157 157
158#ifdef CONFIG_MIPS64 158#ifdef CONFIG_64BIT
159 char *ptr; 159 char *ptr;
160 printk("prom_init - MIPS64\n"); 160 printk("prom_init - MIPS64\n");
161 161
@@ -198,7 +198,7 @@ void __init prom_init(void)
198 } 198 }
199 printk("arcs_cmdline: %s\n", arcs_cmdline); 199 printk("arcs_cmdline: %s\n", arcs_cmdline);
200 200
201#else /* CONFIG_MIPS64 */ 201#else /* CONFIG_64BIT */
202 202
203 /* save the PROM vectors for debugging use */ 203 /* save the PROM vectors for debugging use */
204 debug_vectors = cv; 204 debug_vectors = cv;
@@ -224,7 +224,7 @@ void __init prom_init(void)
224 } 224 }
225 env++; 225 env++;
226 } 226 }
227#endif /* CONFIG_MIPS64 */ 227#endif /* CONFIG_64BIT */
228 228
229 mips_machgroup = MACH_GROUP_MOMENCO; 229 mips_machgroup = MACH_GROUP_MOMENCO;
230 mips_machtype = MACH_MOMENCO_OCELOT_3; 230 mips_machtype = MACH_MOMENCO_OCELOT_3;
@@ -234,7 +234,7 @@ void __init prom_init(void)
234 get_mac(prom_mac_addr_base); 234 get_mac(prom_mac_addr_base);
235#endif 235#endif
236 236
237#ifndef CONFIG_MIPS64 237#ifndef CONFIG_64BIT
238 debug_vectors->printf("Booting Linux kernel...\n"); 238 debug_vectors->printf("Booting Linux kernel...\n");
239#endif 239#endif
240} 240}
diff --git a/arch/mips/momentum/ocelot_c/int-handler.S b/arch/mips/momentum/ocelot_c/int-handler.S
index 2f2430648abc..52349d9bf1be 100644
--- a/arch/mips/momentum/ocelot_c/int-handler.S
+++ b/arch/mips/momentum/ocelot_c/int-handler.S
@@ -27,11 +27,11 @@
27 SAVE_ALL 27 SAVE_ALL
28 CLI 28 CLI
29 .set at 29 .set at
30 mfc0 t0, CP0_CAUSE 30 mfc0 t0, CP0_CAUSE
31 mfc0 t2, CP0_STATUS 31 mfc0 t2, CP0_STATUS
32 32
33 and t0, t2 33 and t0, t2
34 34
35 andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ 35 andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
36 bnez t1, ll_sw0_irq 36 bnez t1, ll_sw0_irq
37 andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ 37 andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
@@ -83,7 +83,7 @@ ll_pmc_irq:
83 move a1, sp 83 move a1, sp
84 jal do_IRQ 84 jal do_IRQ
85 j ret_from_irq 85 j ret_from_irq
86 86
87ll_cpci_decode_irq: 87ll_cpci_decode_irq:
88 move a0, sp 88 move a0, sp
89 jal ll_cpci_irq 89 jal ll_cpci_irq
@@ -99,4 +99,4 @@ ll_cputimer_irq:
99 move a1, sp 99 move a1, sp
100 jal do_IRQ 100 jal do_IRQ
101 j ret_from_irq 101 j ret_from_irq
102 102
diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
index a6cf7a7959b3..97fb77dad723 100644
--- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
+++ b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
@@ -32,7 +32,7 @@
32 32
33#include <linux/config.h> 33#include <linux/config.h>
34 34
35#ifdef CONFIG_MIPS64 35#ifdef CONFIG_64BIT
36#define OCELOT_C_CS0_ADDR (0xfffffffffc000000) 36#define OCELOT_C_CS0_ADDR (0xfffffffffc000000)
37#else 37#else
38#define OCELOT_C_CS0_ADDR (0xfc000000) 38#define OCELOT_C_CS0_ADDR (0xfc000000)
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
index 49ac302d8901..5b6809724b15 100644
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ b/arch/mips/momentum/ocelot_c/prom.c
@@ -67,7 +67,7 @@ static u8 exchange_bit(u8 val, u8 cs)
67 67
68 /* turn the clock off and read-strobe */ 68 /* turn the clock off and read-strobe */
69 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); 69 OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
70 70
71 /* return the data */ 71 /* return the data */
72 return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); 72 return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
73} 73}
@@ -94,7 +94,7 @@ void get_mac(char dest[6])
94#endif 94#endif
95 95
96 96
97#ifdef CONFIG_MIPS64 97#ifdef CONFIG_64BIT
98 98
99unsigned long signext(unsigned long addr) 99unsigned long signext(unsigned long addr)
100{ 100{
@@ -144,7 +144,7 @@ char *arg64(unsigned long addrin, int arg_index)
144 p = (char *)get_arg(args, arg_index); 144 p = (char *)get_arg(args, arg_index);
145 return p; 145 return p;
146} 146}
147#endif /* CONFIG_MIPS64 */ 147#endif /* CONFIG_64BIT */
148 148
149 149
150void __init prom_init(void) 150void __init prom_init(void)
@@ -155,7 +155,7 @@ void __init prom_init(void)
155 struct callvectors *cv = (struct callvectors *) fw_arg3; 155 struct callvectors *cv = (struct callvectors *) fw_arg3;
156 int i; 156 int i;
157 157
158#ifdef CONFIG_MIPS64 158#ifdef CONFIG_64BIT
159 char *ptr; 159 char *ptr;
160 160
161 printk("prom_init - MIPS64\n"); 161 printk("prom_init - MIPS64\n");
@@ -197,7 +197,7 @@ void __init prom_init(void)
197 } 197 }
198 printk("arcs_cmdline: %s\n", arcs_cmdline); 198 printk("arcs_cmdline: %s\n", arcs_cmdline);
199 199
200#else /* CONFIG_MIPS64 */ 200#else /* CONFIG_64BIT */
201 /* save the PROM vectors for debugging use */ 201 /* save the PROM vectors for debugging use */
202 debug_vectors = cv; 202 debug_vectors = cv;
203 203
@@ -222,7 +222,7 @@ void __init prom_init(void)
222 } 222 }
223 env++; 223 env++;
224 } 224 }
225#endif /* CONFIG_MIPS64 */ 225#endif /* CONFIG_64BIT */
226 226
227 mips_machgroup = MACH_GROUP_MOMENCO; 227 mips_machgroup = MACH_GROUP_MOMENCO;
228 mips_machtype = MACH_MOMENCO_OCELOT_C; 228 mips_machtype = MACH_MOMENCO_OCELOT_C;
@@ -232,7 +232,7 @@ void __init prom_init(void)
232 get_mac(prom_mac_addr_base); 232 get_mac(prom_mac_addr_base);
233#endif 233#endif
234 234
235#ifndef CONFIG_MIPS64 235#ifndef CONFIG_64BIT
236 debug_vectors->printf("Booting Linux kernel...\n"); 236 debug_vectors->printf("Booting Linux kernel...\n");
237#endif 237#endif
238} 238}
diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c
index 1f2b4263cc8c..6a2489f3b9a0 100644
--- a/arch/mips/momentum/ocelot_c/reset.c
+++ b/arch/mips/momentum/ocelot_c/reset.c
@@ -28,7 +28,7 @@ void momenco_ocelot_restart(char *command)
28{ 28{
29 /* base address of timekeeper portion of part */ 29 /* base address of timekeeper portion of part */
30 void *nvram = (void *) 30 void *nvram = (void *)
31#ifdef CONFIG_MIPS64 31#ifdef CONFIG_64BIT
32 0xfffffffffc807000; 32 0xfffffffffc807000;
33#else 33#else
34 0xfc807000; 34 0xfc807000;
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 021c00e3c07c..844ddd06349b 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -109,7 +109,7 @@ void PMON_v2_setup(void)
109 */ 109 */
110 printk("PMON_v2_setup\n"); 110 printk("PMON_v2_setup\n");
111 111
112#ifdef CONFIG_MIPS64 112#ifdef CONFIG_64BIT
113 /* marvell and extra space */ 113 /* marvell and extra space */
114 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K); 114 add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K);
115 /* fpga, rtc, and uart */ 115 /* fpga, rtc, and uart */
@@ -134,7 +134,7 @@ void PMON_v2_setup(void)
134 134
135unsigned long m48t37y_get_time(void) 135unsigned long m48t37y_get_time(void)
136{ 136{
137#ifdef CONFIG_MIPS64 137#ifdef CONFIG_64BIT
138 unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000; 138 unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000;
139#else 139#else
140 unsigned char* rtc_base = (unsigned char*)0xfc800000; 140 unsigned char* rtc_base = (unsigned char*)0xfc800000;
@@ -163,7 +163,7 @@ unsigned long m48t37y_get_time(void)
163 163
164int m48t37y_set_time(unsigned long sec) 164int m48t37y_set_time(unsigned long sec)
165{ 165{
166#ifdef CONFIG_MIPS64 166#ifdef CONFIG_64BIT
167 unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000; 167 unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000;
168#else 168#else
169 unsigned char* rtc_base = (unsigned char*)0xfc800000; 169 unsigned char* rtc_base = (unsigned char*)0xfc800000;
@@ -342,7 +342,7 @@ static void __init momenco_ocelot_c_setup(void)
342 342
343early_initcall(momenco_ocelot_c_setup); 343early_initcall(momenco_ocelot_c_setup);
344 344
345#ifndef CONFIG_MIPS64 345#ifndef CONFIG_64BIT
346/* This needs to be one of the first initcalls, because no I/O port access 346/* This needs to be one of the first initcalls, because no I/O port access
347 can work before this */ 347 can work before this */
348static int io_base_ioremap(void) 348static int io_base_ioremap(void)
diff --git a/arch/mips/pci/fixup-ddb5074.c b/arch/mips/pci/fixup-ddb5074.c
index b345e528a53c..5a4a7c239c42 100644
--- a/arch/mips/pci/fixup-ddb5074.c
+++ b/arch/mips/pci/fixup-ddb5074.c
@@ -5,7 +5,7 @@ static void ddb5074_fixup(struct pci_dev *dev)
5{ 5{
6 extern struct pci_dev *pci_pmu; 6 extern struct pci_dev *pci_pmu;
7 u8 t8; 7 u8 t8;
8 8
9 pci_pmu = dev; /* for LEDs D2 and D3 */ 9 pci_pmu = dev; /* for LEDs D2 and D3 */
10 /* Program the lines for LEDs D2 and D3 to output */ 10 /* Program the lines for LEDs D2 and D3 to output */
11 pci_read_config_byte(dev, 0x7d, &t8); 11 pci_read_config_byte(dev, 0x7d, &t8);
diff --git a/arch/mips/pci/fixup-ddb5477.c b/arch/mips/pci/fixup-ddb5477.c
index 6abdc88bab1e..2f1444e60654 100644
--- a/arch/mips/pci/fixup-ddb5477.c
+++ b/arch/mips/pci/fixup-ddb5477.c
@@ -65,7 +65,7 @@ static void ddb5477_amd_lance_fixup(struct pci_dev *dev)
65 ioaddr = pci_resource_start(dev, 0); 65 ioaddr = pci_resource_start(dev, 0);
66 66
67 inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */ 67 inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */
68 68
69 /* bcr_18 |= 0x0800 */ 69 /* bcr_18 |= 0x0800 */
70 outw(18, ioaddr + PCNET32_WIO_RAP); 70 outw(18, ioaddr + PCNET32_WIO_RAP);
71 temp = inw(ioaddr + PCNET32_WIO_BDP); 71 temp = inw(ioaddr + PCNET32_WIO_BDP);
diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
index b9296d9942b3..bf2c41d1e9c5 100644
--- a/arch/mips/pci/fixup-malta.c
+++ b/arch/mips/pci/fixup-malta.c
@@ -56,7 +56,7 @@ static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
56 0, 0, 0, 3, 56 0, 0, 0, 3,
57 4, 5, 6, 7, 57 4, 5, 6, 7,
58 0, 9, 10, 11, 58 0, 9, 10, 11,
59 12, 0, 14, 15 59 12, 0, 14, 15
60 }; 60 };
61 int i; 61 int i;
62 62
diff --git a/arch/mips/pci/fixup-rbtx4927.c b/arch/mips/pci/fixup-rbtx4927.c
index de4e443da208..ceeb1860895a 100644
--- a/arch/mips/pci/fixup-rbtx4927.c
+++ b/arch/mips/pci/fixup-rbtx4927.c
@@ -7,7 +7,7 @@
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com 8 * ppopov@mvista.com or source@mvista.com
9 * 9 *
10 * Copyright (C) 2000-2001 Toshiba Corporation 10 * Copyright (C) 2000-2001 Toshiba Corporation
11 * 11 *
12 * Copyright (C) 2004 MontaVista Software Inc. 12 * Copyright (C) 2004 MontaVista Software Inc.
13 * Author: Manish Lachwani (mlachwani@mvista.com) 13 * Author: Manish Lachwani (mlachwani@mvista.com)
diff --git a/arch/mips/pci/fixup-sni.c b/arch/mips/pci/fixup-sni.c
index c8ef01a017cc..a176f2ca8656 100644
--- a/arch/mips/pci/fixup-sni.c
+++ b/arch/mips/pci/fixup-sni.c
@@ -32,7 +32,7 @@
32 * Device 4: Unused 32 * Device 4: Unused
33 * Device 5: Slot 2 33 * Device 5: Slot 2
34 * Device 6: Slot 3 34 * Device 6: Slot 3
35 * Device 7: Slot 4 35 * Device 7: Slot 4
36 * 36 *
37 * Documentation says the VGA is device 5 and device 3 is unused but that 37 * Documentation says the VGA is device 5 and device 3 is unused but that
38 * seem to be a documentation error. At least on my RM200C the Cirrus 38 * seem to be a documentation error. At least on my RM200C the Cirrus
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c
index 850a900f0eb4..bc55b06e1904 100644
--- a/arch/mips/pci/fixup-tb0219.c
+++ b/arch/mips/pci/fixup-tb0219.c
@@ -29,27 +29,12 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
29 29
30 switch (slot) { 30 switch (slot) {
31 case 12: 31 case 12:
32 vr41xx_set_irq_trigger(TB0219_PCI_SLOT1_PIN,
33 TRIGGER_LEVEL,
34 SIGNAL_THROUGH);
35 vr41xx_set_irq_level(TB0219_PCI_SLOT1_PIN,
36 LEVEL_LOW);
37 irq = TB0219_PCI_SLOT1_IRQ; 32 irq = TB0219_PCI_SLOT1_IRQ;
38 break; 33 break;
39 case 13: 34 case 13:
40 vr41xx_set_irq_trigger(TB0219_PCI_SLOT2_PIN,
41 TRIGGER_LEVEL,
42 SIGNAL_THROUGH);
43 vr41xx_set_irq_level(TB0219_PCI_SLOT2_PIN,
44 LEVEL_LOW);
45 irq = TB0219_PCI_SLOT2_IRQ; 35 irq = TB0219_PCI_SLOT2_IRQ;
46 break; 36 break;
47 case 14: 37 case 14:
48 vr41xx_set_irq_trigger(TB0219_PCI_SLOT3_PIN,
49 TRIGGER_LEVEL,
50 SIGNAL_THROUGH);
51 vr41xx_set_irq_level(TB0219_PCI_SLOT3_PIN,
52 LEVEL_LOW);
53 irq = TB0219_PCI_SLOT3_IRQ; 38 irq = TB0219_PCI_SLOT3_IRQ;
54 break; 39 break;
55 default: 40 default:
diff --git a/arch/mips/pci/ops-ddb5477.c b/arch/mips/pci/ops-ddb5477.c
index e955443fedf9..0406b50a37d8 100644
--- a/arch/mips/pci/ops-ddb5477.c
+++ b/arch/mips/pci/ops-ddb5477.c
@@ -127,7 +127,7 @@ static inline void ddb_close_config_base(struct pci_config_swap *swap)
127} 127}
128 128
129static int read_config_dword(struct pci_config_swap *swap, 129static int read_config_dword(struct pci_config_swap *swap,
130 struct pci_bus *bus, u32 devfn, u32 where, 130 struct pci_bus *bus, u32 devfn, u32 where,
131 u32 * val) 131 u32 * val)
132{ 132{
133 u32 bus_num, slot_num, func_num; 133 u32 bus_num, slot_num, func_num;
@@ -153,7 +153,7 @@ static int read_config_dword(struct pci_config_swap *swap,
153} 153}
154 154
155static int read_config_word(struct pci_config_swap *swap, 155static int read_config_word(struct pci_config_swap *swap,
156 struct pci_bus *bus, u32 devfn, u32 where, 156 struct pci_bus *bus, u32 devfn, u32 where,
157 u16 * val) 157 u16 * val)
158{ 158{
159 int status; 159 int status;
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 2a9d7227fe87..7688b7711329 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -1,16 +1,16 @@
1/* 1/*
2 * Copyright 2001 MontaVista Software Inc. 2 * Copyright 2001 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. 3 * Author: MontaVista Software, Inc.
4 * ahennessy@mvista.com 4 * ahennessy@mvista.com
5 * 5 *
6 * Copyright (C) 2000-2001 Toshiba Corporation 6 * Copyright (C) 2000-2001 Toshiba Corporation
7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 7 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
8 * 8 *
9 * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c 9 * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
10 * 10 *
11 * Define the pci_ops for the Toshiba rbtx4927 11 * Define the pci_ops for the Toshiba rbtx4927
12 * 12 *
13 * Much of the code is derived from the original DDB5074 port by 13 * Much of the code is derived from the original DDB5074 port by
14 * Geert Uytterhoeven <geert@sonycom.com> 14 * Geert Uytterhoeven <geert@sonycom.com>
15 * 15 *
16 * Copyright 2004 MontaVista Software Inc. 16 * Copyright 2004 MontaVista Software Inc.
diff --git a/arch/mips/pci/pci-ddb5477.c b/arch/mips/pci/pci-ddb5477.c
index 4ddd53eaf656..826d653184e5 100644
--- a/arch/mips/pci/pci-ddb5477.c
+++ b/arch/mips/pci/pci-ddb5477.c
@@ -76,7 +76,7 @@ struct pci_controller ddb5477_io_controller = {
76 */ 76 */
77 77
78/* 78/*
79 * irq mapping : device -> pci int # -> vrc4377 irq# , 79 * irq mapping : device -> pci int # -> vrc4377 irq# ,
80 * ddb5477 board manual page 4 and vrc5477 manual page 46 80 * ddb5477 board manual page 4 and vrc5477 manual page 46
81 */ 81 */
82 82
@@ -137,9 +137,9 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
137 unsigned char *slot_irq_map; 137 unsigned char *slot_irq_map;
138 unsigned char irq; 138 unsigned char irq;
139 139
140 /* 140 /*
141 * We ignore the swizzled slot and pin values. The original 141 * We ignore the swizzled slot and pin values. The original
142 * pci_fixup_irq() codes largely base irq number on the dev slot 142 * pci_fixup_irq() codes largely base irq number on the dev slot
143 * numbers because except for one case they are unique even 143 * numbers because except for one case they are unique even
144 * though there are multiple pci buses. 144 * though there are multiple pci buses.
145 */ 145 */
@@ -160,7 +160,7 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
160 160
161 if (mips_machtype == MACH_NEC_ROCKHOPPERII) { 161 if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
162 /* hack to distinquish overlapping slot 20s, one 162 /* hack to distinquish overlapping slot 20s, one
163 * on bus 0 (ALI USB on the M1535 on the backplane), 163 * on bus 0 (ALI USB on the M1535 on the backplane),
164 * and one on bus 2 (NEC USB controller on the CPU board) 164 * and one on bus 2 (NEC USB controller on the CPU board)
165 * Make the M1535 USB - ISA IRQ number 9. 165 * Make the M1535 USB - ISA IRQ number 9.
166 */ 166 */
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 1faeb034f06e..000dc6af6cd3 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -84,7 +84,7 @@ static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs)
84 84
85 85
86extern struct pci_ops mace_pci_ops; 86extern struct pci_ops mace_pci_ops;
87#ifdef CONFIG_MIPS64 87#ifdef CONFIG_64BIT
88static struct resource mace_pci_mem_resource = { 88static struct resource mace_pci_mem_resource = {
89 .name = "SGI O2 PCI MEM", 89 .name = "SGI O2 PCI MEM",
90 .start = MACEPCI_HI_MEMORY, 90 .start = MACEPCI_HI_MEMORY,
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 8141dffac241..a8d499b0a36f 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -132,7 +132,7 @@ static int __init pcibios_init(void)
132 hose->need_domain_info = need_domain_info; 132 hose->need_domain_info = need_domain_info;
133 next_busno = bus->subordinate + 1; 133 next_busno = bus->subordinate + 1;
134 /* Don't allow 8-bit bus number overflow inside the hose - 134 /* Don't allow 8-bit bus number overflow inside the hose -
135 reserve some space for bridges. */ 135 reserve some space for bridges. */
136 if (next_busno > 224) { 136 if (next_busno > 224) {
137 next_busno = 0; 137 next_busno = 0;
138 need_domain_info = 1; 138 need_domain_info = 1;
@@ -260,7 +260,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
260 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { 260 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
261 pci_read_bridge_bases(bus); 261 pci_read_bridge_bases(bus);
262 pcibios_fixup_device_resources(dev, bus); 262 pcibios_fixup_device_resources(dev, bus);
263 } 263 }
264 264
265 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { 265 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
266 struct pci_dev *dev = pci_dev_b(ln); 266 struct pci_dev *dev = pci_dev_b(ln);
@@ -292,8 +292,25 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
292 region->end = res->end - offset; 292 region->end = res->end - offset;
293} 293}
294 294
295void __devinit
296pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
297 struct pci_bus_region *region)
298{
299 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
300 unsigned long offset = 0;
301
302 if (res->flags & IORESOURCE_IO)
303 offset = hose->io_offset;
304 else if (res->flags & IORESOURCE_MEM)
305 offset = hose->mem_offset;
306
307 res->start = region->start + offset;
308 res->end = region->end + offset;
309}
310
295#ifdef CONFIG_HOTPLUG 311#ifdef CONFIG_HOTPLUG
296EXPORT_SYMBOL(pcibios_resource_to_bus); 312EXPORT_SYMBOL(pcibios_resource_to_bus);
313EXPORT_SYMBOL(pcibios_bus_to_resource);
297EXPORT_SYMBOL(PCIBIOS_MIN_IO); 314EXPORT_SYMBOL(PCIBIOS_MIN_IO);
298EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 315EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
299#endif 316#endif
diff --git a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
index b067988614c3..97862f45496d 100644
--- a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
+++ b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
@@ -30,7 +30,7 @@
30 * 30 *
31 * This code reads the ATMEL 24CXX EEPROM. The PMC-Sierra Yosemite board uses the ATMEL 31 * This code reads the ATMEL 24CXX EEPROM. The PMC-Sierra Yosemite board uses the ATMEL
32 * 24C32/24C64 which uses two byte addressing as compared to 24C16. Note that this program 32 * 24C32/24C64 which uses two byte addressing as compared to 24C16. Note that this program
33 * uses the serial port like /dev/ttyS0, to communicate with the EEPROM. Hence, you are 33 * uses the serial port like /dev/ttyS0, to communicate with the EEPROM. Hence, you are
34 * expected to have a connectivity from the EEPROM to the serial port. This program does 34 * expected to have a connectivity from the EEPROM to the serial port. This program does
35 * __not__ communicate using the I2C protocol 35 * __not__ communicate using the I2C protocol
36 */ 36 */
@@ -64,14 +64,14 @@ static void send_ack(void)
64static void send_byte(unsigned char byte) 64static void send_byte(unsigned char byte)
65{ 65{
66 int i = 0; 66 int i = 0;
67 67
68 for (i = 7; i >= 0; i--) 68 for (i = 7; i >= 0; i--)
69 send_bit((byte >> i) & 0x01); 69 send_bit((byte >> i) & 0x01);
70} 70}
71 71
72static void send_start(void) 72static void send_start(void)
73{ 73{
74 sda_hi; 74 sda_hi;
75 delay(TXX); 75 delay(TXX);
76 scl_hi; 76 scl_hi;
77 delay(TXX); 77 delay(TXX);
@@ -114,9 +114,9 @@ static unsigned char recv_byte(void) {
114 int i; 114 int i;
115 unsigned char byte=0; 115 unsigned char byte=0;
116 116
117 for (i=7;i>=0;i--) 117 for (i=7;i>=0;i--)
118 byte |= (recv_bit() << i); 118 byte |= (recv_bit() << i);
119 119
120 return byte; 120 return byte;
121} 121}
122 122
diff --git a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
index d27566d99ffc..c19f01a32045 100644
--- a/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
+++ b/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
@@ -27,7 +27,7 @@
27 */ 27 */
28 28
29/* 29/*
30 * Header file for atmel_read_eeprom.c 30 * Header file for atmel_read_eeprom.c
31 */ 31 */
32 32
33#include <linux/types.h> 33#include <linux/types.h>
@@ -46,7 +46,7 @@
46#define DEFAULT_PORT "/dev/ttyS0" /* Port to open */ 46#define DEFAULT_PORT "/dev/ttyS0" /* Port to open */
47#define TXX 0 /* Dummy loop for spinning */ 47#define TXX 0 /* Dummy loop for spinning */
48 48
49#define BLOCK_SEL 0x00 49#define BLOCK_SEL 0x00
50#define SLAVE_ADDR 0xa0 50#define SLAVE_ADDR 0xa0
51#define READ_BIT 0x01 51#define READ_BIT 0x01
52#define WRITE_BIT 0x00 52#define WRITE_BIT 0x00
diff --git a/arch/mips/qemu/Makefile b/arch/mips/qemu/Makefile
new file mode 100644
index 000000000000..934944ab9e85
--- /dev/null
+++ b/arch/mips/qemu/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for Qemu specific kernel interface routines under Linux.
3#
4
5obj-y = q-firmware.o q-int.o q-irq.o q-mem.o q-setup.o
diff --git a/arch/mips/qemu/q-firmware.c b/arch/mips/qemu/q-firmware.c
new file mode 100644
index 000000000000..5980f02b2df9
--- /dev/null
+++ b/arch/mips/qemu/q-firmware.c
@@ -0,0 +1,7 @@
1#include <linux/init.h>
2#include <asm/bootinfo.h>
3
4void __init prom_init(void)
5{
6 add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM);
7}
diff --git a/arch/mips/qemu/q-int.S b/arch/mips/qemu/q-int.S
new file mode 100644
index 000000000000..6e3dfe5eb14b
--- /dev/null
+++ b/arch/mips/qemu/q-int.S
@@ -0,0 +1,17 @@
1/*
2 * Qemu interrupt handler code.
3 *
4 * Copyright (C) 2005 by Ralf Baechle
5 */
6#include <asm/asm.h>
7#include <asm/regdef.h>
8#include <asm/stackframe.h>
9
10 .align 5
11 NESTED(qemu_handle_int, PT_SIZE, sp)
12 SAVE_ALL
13 CLI
14 move a0, sp
15 PTR_LA ra, ret_from_irq
16 j do_qemu_int
17 END(qemu_handle_int)
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c
new file mode 100644
index 000000000000..2c4e0704ff10
--- /dev/null
+++ b/arch/mips/qemu/q-irq.c
@@ -0,0 +1,37 @@
1#include <linux/init.h>
2#include <linux/linkage.h>
3
4#include <asm/i8259.h>
5#include <asm/mipsregs.h>
6#include <asm/qemu.h>
7#include <asm/system.h>
8#include <asm/time.h>
9
10extern asmlinkage void qemu_handle_int(void);
11
12asmlinkage void do_qemu_int(struct pt_regs *regs)
13{
14 unsigned int pending = read_c0_status() & read_c0_cause();
15
16 if (pending & 0x8000) {
17 ll_timer_interrupt(Q_COUNT_COMPARE_IRQ, regs);
18 return;
19 }
20 if (pending & 0x0400) {
21 int irq = i8259_irq();
22
23 if (likely(irq >= 0))
24 do_IRQ(irq, regs);
25
26 return;
27 }
28}
29
30void __init arch_init_irq(void)
31{
32 set_except_vector(0, qemu_handle_int);
33 mips_hpt_frequency = QEMU_C0_COUNTER_CLOCK; /* 100MHz */
34
35 init_i8259_irqs();
36 set_c0_status(0x8400);
37}
diff --git a/arch/mips/qemu/q-mem.c b/arch/mips/qemu/q-mem.c
new file mode 100644
index 000000000000..d174fac43031
--- /dev/null
+++ b/arch/mips/qemu/q-mem.c
@@ -0,0 +1,6 @@
1#include <linux/init.h>
2
3unsigned long __init prom_free_prom_memory(void)
4{
5 return 0UL;
6}
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c
new file mode 100644
index 000000000000..1a80eee8cd35
--- /dev/null
+++ b/arch/mips/qemu/q-setup.c
@@ -0,0 +1,20 @@
1#include <linux/init.h>
2#include <asm/io.h>
3#include <asm/time.h>
4
5#define QEMU_PORT_BASE 0xb4000000
6
7static void __init qemu_timer_setup(struct irqaction *irq)
8{
9 /* set the clock to 100 Hz */
10 outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
11 outb_p(LATCH & 0xff , 0x40); /* LSB */
12 outb(LATCH >> 8 , 0x40); /* MSB */
13 setup_irq(0, irq);
14}
15
16void __init plat_setup(void)
17{
18 set_io_port_base(QEMU_PORT_BASE);
19 board_timer_setup = qemu_timer_setup;
20}
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index 0ab4abf65d58..fa0e719c5bd1 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -242,7 +242,7 @@ int __init ip22_eisa_init(void)
242 int i, c; 242 int i, c;
243 char *str; 243 char *str;
244 u8 *slot_addr; 244 u8 *slot_addr;
245 245
246 if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) { 246 if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) {
247 printk(KERN_INFO "EISA: bus not present.\n"); 247 printk(KERN_INFO "EISA: bus not present.\n");
248 return 1; 248 return 1;
diff --git a/arch/mips/sgi-ip22/ip22-hpc.c b/arch/mips/sgi-ip22/ip22-hpc.c
index c0afeccb08c4..5c00cdd20d8e 100644
--- a/arch/mips/sgi-ip22/ip22-hpc.c
+++ b/arch/mips/sgi-ip22/ip22-hpc.c
@@ -49,7 +49,7 @@ void __init sgihpc_init(void)
49 sgint = &sgioc->int3; 49 sgint = &sgioc->int3;
50 system_type = "SGI Indy"; 50 system_type = "SGI Indy";
51 } 51 }
52 52
53 sgi_ioc_reset = (SGIOC_RESET_PPORT | SGIOC_RESET_KBDMOUSE | 53 sgi_ioc_reset = (SGIOC_RESET_PPORT | SGIOC_RESET_KBDMOUSE |
54 SGIOC_RESET_EISA | SGIOC_RESET_ISDN | 54 SGIOC_RESET_EISA | SGIOC_RESET_ISDN |
55 SGIOC_RESET_LC0OFF); 55 SGIOC_RESET_LC0OFF);
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index ea2844d29e6e..d16fb43b1a93 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -28,7 +28,7 @@
28/* #define DEBUG_SGINT */ 28/* #define DEBUG_SGINT */
29 29
30/* So far nothing hangs here */ 30/* So far nothing hangs here */
31#undef USE_LIO3_IRQ 31#undef USE_LIO3_IRQ
32 32
33struct sgint_regs *sgint; 33struct sgint_regs *sgint;
34 34
@@ -272,32 +272,32 @@ void indy_buserror_irq(struct pt_regs *regs)
272 irq_exit(); 272 irq_exit();
273} 273}
274 274
275static struct irqaction local0_cascade = { 275static struct irqaction local0_cascade = {
276 .handler = no_action, 276 .handler = no_action,
277 .flags = SA_INTERRUPT, 277 .flags = SA_INTERRUPT,
278 .name = "local0 cascade", 278 .name = "local0 cascade",
279}; 279};
280 280
281static struct irqaction local1_cascade = { 281static struct irqaction local1_cascade = {
282 .handler = no_action, 282 .handler = no_action,
283 .flags = SA_INTERRUPT, 283 .flags = SA_INTERRUPT,
284 .name = "local1 cascade", 284 .name = "local1 cascade",
285}; 285};
286 286
287static struct irqaction buserr = { 287static struct irqaction buserr = {
288 .handler = no_action, 288 .handler = no_action,
289 .flags = SA_INTERRUPT, 289 .flags = SA_INTERRUPT,
290 .name = "Bus Error", 290 .name = "Bus Error",
291}; 291};
292 292
293static struct irqaction map0_cascade = { 293static struct irqaction map0_cascade = {
294 .handler = no_action, 294 .handler = no_action,
295 .flags = SA_INTERRUPT, 295 .flags = SA_INTERRUPT,
296 .name = "mapable0 cascade", 296 .name = "mapable0 cascade",
297}; 297};
298 298
299#ifdef USE_LIO3_IRQ 299#ifdef USE_LIO3_IRQ
300static struct irqaction map1_cascade = { 300static struct irqaction map1_cascade = {
301 .handler = no_action, 301 .handler = no_action,
302 .flags = SA_INTERRUPT, 302 .flags = SA_INTERRUPT,
303 .name = "mapable1 cascade", 303 .name = "mapable1 cascade",
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index de43e86fa17c..fd29fd407ae8 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -39,7 +39,7 @@
39 *ptr |= EEPROM_CSEL; \ 39 *ptr |= EEPROM_CSEL; \
40 *ptr |= EEPROM_ECLK; }) 40 *ptr |= EEPROM_ECLK; })
41 41
42 42
43#define eeprom_cs_off(ptr) ({ \ 43#define eeprom_cs_off(ptr) ({ \
44 *ptr &= ~EEPROM_ECLK; \ 44 *ptr &= ~EEPROM_ECLK; \
45 *ptr &= ~EEPROM_CSEL; \ 45 *ptr &= ~EEPROM_CSEL; \
@@ -50,7 +50,7 @@
50/* 50/*
51 * clock in the nvram command and the register number. For the 51 * clock in the nvram command and the register number. For the
52 * national semiconductor nv ram chip the op code is 3 bits and 52 * national semiconductor nv ram chip the op code is 3 bits and
53 * the address is 6/8 bits. 53 * the address is 6/8 bits.
54 */ 54 */
55static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, 55static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
56 unsigned reg) 56 unsigned reg)
@@ -90,7 +90,7 @@ unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg)
90 if (*ctrl & EEPROM_DATI) 90 if (*ctrl & EEPROM_DATI)
91 res |= 1; 91 res |= 1;
92 } 92 }
93 93
94 eeprom_cs_off(ctrl); 94 eeprom_cs_off(ctrl);
95 95
96 return res; 96 return res;
@@ -113,7 +113,7 @@ unsigned short ip22_nvram_read(int reg)
113 reg <<= 1; 113 reg <<= 1;
114 tmp = hpc3c0->bbram[reg++] & 0xff; 114 tmp = hpc3c0->bbram[reg++] & 0xff;
115 return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff); 115 return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff);
116 } 116 }
117} 117}
118 118
119EXPORT_SYMBOL(ip22_nvram_read); 119EXPORT_SYMBOL(ip22_nvram_read);
diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c
index ed5c60adce63..214ffd2e98a3 100644
--- a/arch/mips/sgi-ip22/ip22-reset.c
+++ b/arch/mips/sgi-ip22/ip22-reset.c
@@ -185,7 +185,7 @@ static irqreturn_t panel_int(int irq, void *dev_id, struct pt_regs *regs)
185 add_timer(&debounce_timer); 185 add_timer(&debounce_timer);
186 } 186 }
187 187
188 /* Power button was pressed 188 /* Power button was pressed
189 * ioc.ps page 22: "The Panel Register is called Power Control by Full 189 * ioc.ps page 22: "The Panel Register is called Power Control by Full
190 * House. Only lowest 2 bits are used. Guiness uses upper four bits 190 * House. Only lowest 2 bits are used. Guiness uses upper four bits
191 * for volume control". This is not true, all bits are pulled high 191 * for volume control". This is not true, all bits are pulled high
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 173f76805ea3..df9b5694328a 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -126,7 +126,7 @@ static __init void indy_time_init(void)
126 unsigned long r4k_ticks[3]; 126 unsigned long r4k_ticks[3];
127 unsigned long r4k_tick; 127 unsigned long r4k_tick;
128 128
129 /* 129 /*
130 * Figure out the r4k offset, the algorithm is very simple and works in 130 * Figure out the r4k offset, the algorithm is very simple and works in
131 * _all_ cases as long as the 8254 counter register itself works ok (as 131 * _all_ cases as long as the 8254 counter register itself works ok (as
132 * an interrupt driving timer it does not because of bug, this is why 132 * an interrupt driving timer it does not because of bug, this is why
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index a160d04f7dbe..ef20d9ac0ba3 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -538,7 +538,7 @@ void __init mem_init(void)
538 for_each_online_node(node) { 538 for_each_online_node(node) {
539 unsigned slot, numslots; 539 unsigned slot, numslots;
540 struct page *end, *p; 540 struct page *end, *p;
541 541
542 /* 542 /*
543 * This will free up the bootmem, ie, slot 0 memory. 543 * This will free up the bootmem, ie, slot 0 memory.
544 */ 544 */
diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c
index 281f090e48a4..88e1f52059ff 100644
--- a/arch/mips/sgi-ip32/ip32-reset.c
+++ b/arch/mips/sgi-ip32/ip32-reset.c
@@ -140,7 +140,7 @@ static irqreturn_t ip32_rtc_int(int irq, void *dev_id, struct pt_regs *regs)
140 140
141 reg_c = CMOS_READ(RTC_INTR_FLAGS); 141 reg_c = CMOS_READ(RTC_INTR_FLAGS);
142 if (!(reg_c & RTC_IRQF)) { 142 if (!(reg_c & RTC_IRQF)) {
143 printk(KERN_WARNING 143 printk(KERN_WARNING
144 "%s: RTC IRQ without RTC_IRQF\n", __FUNCTION__); 144 "%s: RTC IRQ without RTC_IRQF\n", __FUNCTION__);
145 } 145 }
146 /* Wait until interrupt goes away */ 146 /* Wait until interrupt goes away */
diff --git a/arch/mips/sibyte/cfe/cfe_error.h b/arch/mips/sibyte/cfe/cfe_error.h
index 77eb4935bfb4..975f00002cbe 100644
--- a/arch/mips/sibyte/cfe/cfe_error.h
+++ b/arch/mips/sibyte/cfe/cfe_error.h
@@ -17,15 +17,15 @@
17 */ 17 */
18 18
19/* ********************************************************************* 19/* *********************************************************************
20 * 20 *
21 * Broadcom Common Firmware Environment (CFE) 21 * Broadcom Common Firmware Environment (CFE)
22 * 22 *
23 * Error codes File: cfe_error.h 23 * Error codes File: cfe_error.h
24 * 24 *
25 * CFE's global error code list is here. 25 * CFE's global error code list is here.
26 * 26 *
27 * Author: Mitch Lichtenberg 27 * Author: Mitch Lichtenberg
28 * 28 *
29 ********************************************************************* */ 29 ********************************************************************* */
30 30
31 31
diff --git a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
index 53a5c1eb5611..7721100d0275 100644
--- a/arch/mips/sibyte/cfe/console.c
+++ b/arch/mips/sibyte/cfe/console.c
@@ -38,7 +38,7 @@ static void cfe_console_write(struct console *cons, const char *str,
38 last += written; 38 last += written;
39 } while (last < count); 39 } while (last < count);
40 } 40 }
41 41
42} 42}
43 43
44static int cfe_console_setup(struct console *cons, char *str) 44static int cfe_console_setup(struct console *cons, char *str)
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index d6d0364fa760..7a2c7a8510d4 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -33,7 +33,7 @@
33#include "cfe_error.h" 33#include "cfe_error.h"
34 34
35/* Max ram addressable in 32-bit segments */ 35/* Max ram addressable in 32-bit segments */
36#ifdef CONFIG_MIPS64 36#ifdef CONFIG_64BIT
37#define MAX_RAM_SIZE (~0ULL) 37#define MAX_RAM_SIZE (~0ULL)
38#else 38#else
39#ifdef CONFIG_HIGHMEM 39#ifdef CONFIG_HIGHMEM
@@ -285,7 +285,7 @@ void __init prom_init(void)
285 while (1) ; 285 while (1) ;
286 } 286 }
287 cfe_init(cfe_handle, cfe_ept); 287 cfe_init(cfe_handle, cfe_ept);
288 /* 288 /*
289 * Get the handle for (at least) prom_putchar, possibly for 289 * Get the handle for (at least) prom_putchar, possibly for
290 * boot console 290 * boot console
291 */ 291 */
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index 73392190d2b1..e44ce1a9eea9 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -57,7 +57,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
57void prom_boot_secondary(int cpu, struct task_struct *idle) 57void prom_boot_secondary(int cpu, struct task_struct *idle)
58{ 58{
59 int retval; 59 int retval;
60 60
61 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap, 61 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
62 __KSTK_TOS(idle), 62 __KSTK_TOS(idle),
63 (unsigned long)idle->thread_info, 0); 63 (unsigned long)idle->thread_info, 0);
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 182a16f42e2d..1a97e3127aeb 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -10,13 +10,13 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 * You should have received a copy of the GNU General Public License 14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18 18
19/* 19/*
20 * The Bus Watcher monitors internal bus transactions and maintains 20 * The Bus Watcher monitors internal bus transactions and maintains
21 * counts of transactions with error status, logging details and 21 * counts of transactions with error status, logging details and
22 * causing one of several interrupts. This driver provides a handler 22 * causing one of several interrupts. This driver provides a handler
@@ -155,7 +155,7 @@ static int bw_read_proc(char *page, char **start, off_t off,
155static void create_proc_decoder(struct bw_stats_struct *stats) 155static void create_proc_decoder(struct bw_stats_struct *stats)
156{ 156{
157 struct proc_dir_entry *ent; 157 struct proc_dir_entry *ent;
158 158
159 ent = create_proc_read_entry("bus_watcher", S_IWUSR | S_IRUGO, NULL, 159 ent = create_proc_read_entry("bus_watcher", S_IWUSR | S_IRUGO, NULL,
160 bw_read_proc, stats); 160 bw_read_proc, stats);
161 if (!ent) { 161 if (!ent) {
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 2728abbc94d2..2725b263cced 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -377,7 +377,7 @@ void __init arch_init_irq(void)
377 377
378 /* 378 /*
379 * Note that the timer interrupts are also mapped, but this is 379 * Note that the timer interrupts are also mapped, but this is
380 * done in sb1250_time_init(). Also, the profiling driver 380 * done in sb1250_time_init(). Also, the profiling driver
381 * does its own management of IP7. 381 * does its own management of IP7.
382 */ 382 */
383 383
@@ -392,7 +392,7 @@ void __init arch_init_irq(void)
392 if (kgdb_flag) { 392 if (kgdb_flag) {
393 kgdb_irq = K_INT_UART_0 + kgdb_port; 393 kgdb_irq = K_INT_UART_0 + kgdb_port;
394 394
395#ifdef CONFIG_SIBYTE_SB1250_DUART 395#ifdef CONFIG_SIBYTE_SB1250_DUART
396 sb1250_duart_present[kgdb_port] = 0; 396 sb1250_duart_present[kgdb_port] = 0;
397#endif 397#endif
398 /* Setup uart 1 settings, mapper */ 398 /* Setup uart 1 settings, mapper */
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index 0e633ee8d83c..a686bb716ec6 100644
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -128,7 +128,7 @@ static int m41t81_write(uint8_t addr, int b)
128 /* Clear error bit by writing a 1 */ 128 /* Clear error bit by writing a 1 */
129 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); 129 bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
130 return -1; 130 return -1;
131 } 131 }
132 132
133 /* read the same byte again to make sure it is written */ 133 /* read the same byte again to make sure it is written */
134 bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, 134 bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
@@ -136,7 +136,7 @@ static int m41t81_write(uint8_t addr, int b)
136 136
137 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) 137 while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
138 ; 138 ;
139 139
140 return 0; 140 return 0;
141} 141}
142 142
@@ -148,13 +148,13 @@ int m41t81_set_time(unsigned long t)
148 148
149 /* 149 /*
150 * Note the write order matters as it ensures the correctness. 150 * Note the write order matters as it ensures the correctness.
151 * When we write sec, 10th sec is clear. It is reasonable to 151 * When we write sec, 10th sec is clear. It is reasonable to
152 * believe we should finish writing min within a second. 152 * believe we should finish writing min within a second.
153 */ 153 */
154 154
155 tm.tm_sec = BIN2BCD(tm.tm_sec); 155 tm.tm_sec = BIN2BCD(tm.tm_sec);
156 m41t81_write(M41T81REG_SC, tm.tm_sec); 156 m41t81_write(M41T81REG_SC, tm.tm_sec);
157 157
158 tm.tm_min = BIN2BCD(tm.tm_min); 158 tm.tm_min = BIN2BCD(tm.tm_min);
159 m41t81_write(M41T81REG_MN, tm.tm_min); 159 m41t81_write(M41T81REG_MN, tm.tm_min);
160 160
@@ -187,7 +187,7 @@ unsigned long m41t81_get_time(void)
187{ 187{
188 unsigned int year, mon, day, hour, min, sec; 188 unsigned int year, mon, day, hour, min, sec;
189 189
190 /* 190 /*
191 * min is valid if two reads of sec are the same. 191 * min is valid if two reads of sec are the same.
192 */ 192 */
193 for (;;) { 193 for (;;) {
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 457aeb7be858..4daeaa413def 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -73,7 +73,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
73{ 73{
74 if (!is_fixup && (regs->cp0_cause & 4)) { 74 if (!is_fixup && (regs->cp0_cause & 4)) {
75 /* Data bus error - print PA */ 75 /* Data bus error - print PA */
76#ifdef CONFIG_MIPS64 76#ifdef CONFIG_64BIT
77 printk("DBE physical address: %010lx\n", 77 printk("DBE physical address: %010lx\n",
78 __read_64bit_c0_register($26, 1)); 78 __read_64bit_c0_register($26, 1));
79#else 79#else
@@ -98,7 +98,7 @@ static int __init swarm_setup(void)
98 rtc_get_time = xicor_get_time; 98 rtc_get_time = xicor_get_time;
99 rtc_set_time = xicor_set_time; 99 rtc_set_time = xicor_set_time;
100 } 100 }
101 101
102 if (m41t81_probe()) { 102 if (m41t81_probe()) {
103 printk("swarm setup: M41T81 RTC detected.\n"); 103 printk("swarm setup: M41T81 RTC detected.\n");
104 rtc_get_time = m41t81_get_time; 104 rtc_get_time = m41t81_get_time;
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index 62c760f14674..141a310d74d8 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -103,7 +103,7 @@ static unsigned int ls1bit8(unsigned int x)
103 103
104/* 104/*
105 * hwint 1 deals with EISA and SCSI interrupts, 105 * hwint 1 deals with EISA and SCSI interrupts,
106 * 106 *
107 * The EISA_INT bit in CSITPEND is high active, all others are low active. 107 * The EISA_INT bit in CSITPEND is high active, all others are low active.
108 */ 108 */
109void pciasic_hwint1(struct pt_regs *regs) 109void pciasic_hwint1(struct pt_regs *regs)
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 8f67cee4317b..1b3f8a0903e1 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -111,7 +111,7 @@ static struct resource sni_mem_resource = {
111 * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used 111 * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
112 * for other purposes. Be paranoid and allocate all of the before the PCI 112 * for other purposes. Be paranoid and allocate all of the before the PCI
113 * code gets a chance to to map anything else there ... 113 * code gets a chance to to map anything else there ...
114 * 114 *
115 * This leaves the following areas available: 115 * This leaves the following areas available:
116 * 116 *
117 * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory 117 * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
diff --git a/arch/mips/tx4927/common/tx4927_irq_handler.S b/arch/mips/tx4927/common/tx4927_irq_handler.S
index ca123e28d1ef..dd3ceda9d712 100644
--- a/arch/mips/tx4927/common/tx4927_irq_handler.S
+++ b/arch/mips/tx4927/common/tx4927_irq_handler.S
@@ -42,13 +42,13 @@
42 CLI 42 CLI
43 .set at 43 .set at
44 44
45 mfc0 t0, CP0_CAUSE 45 mfc0 t0, CP0_CAUSE
46 mfc0 t1, CP0_STATUS 46 mfc0 t1, CP0_STATUS
47 and t0, t1 47 and t0, t1
48 48
49 andi t1, t0, STATUSF_IP7 /* cpu timer */ 49 andi t1, t0, STATUSF_IP7 /* cpu timer */
50 bnez t1, ll_ip7 50 bnez t1, ll_ip7
51 51
52 /* IP6..IP3 multiplexed -- do not use */ 52 /* IP6..IP3 multiplexed -- do not use */
53 53
54 andi t1, t0, STATUSF_IP2 /* tx4927 pic */ 54 andi t1, t0, STATUSF_IP2 /* tx4927 pic */
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 16bcbdc6d1cc..26d7c53612a8 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -152,7 +152,7 @@ dump_cp0(char *key)
152 print_cp0(key, 16, "CONFIG ", read_c0_config()); 152 print_cp0(key, 16, "CONFIG ", read_c0_config());
153 return; 153 return;
154} 154}
155 155
156void print_pic(char *key, u32 reg, char *name) 156void print_pic(char *key, u32 reg, char *name)
157{ 157{
158 printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name, 158 printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name,
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/Makefile b/arch/mips/tx4927/toshiba_rbtx4927/Makefile
index 86ca4cf2d587..c1a377a80a5d 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/Makefile
+++ b/arch/mips/tx4927/toshiba_rbtx4927/Makefile
@@ -1,5 +1,5 @@
1obj-y += toshiba_rbtx4927_prom.o 1obj-y += toshiba_rbtx4927_prom.o
2obj-y += toshiba_rbtx4927_setup.o 2obj-y += toshiba_rbtx4927_setup.o
3obj-y += toshiba_rbtx4927_irq.o 3obj-y += toshiba_rbtx4927_irq.o
4 4
5EXTRA_AFLAGS := $(CFLAGS) 5EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index fd5b433f83b7..aee07ff2212a 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -31,7 +31,7 @@
31 31
32 32
33/* 33/*
34IRQ Device 34IRQ Device
3500 RBTX4927-ISA/00 3500 RBTX4927-ISA/00
3601 RBTX4927-ISA/01 PS2/Keyboard 3601 RBTX4927-ISA/01 PS2/Keyboard
3702 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15) 3702 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
@@ -52,15 +52,15 @@ IRQ Device
5216 TX4927-CP0/00 Software 0 5216 TX4927-CP0/00 Software 0
5317 TX4927-CP0/01 Software 1 5317 TX4927-CP0/01 Software 1
5418 TX4927-CP0/02 Cascade TX4927-CP0 5418 TX4927-CP0/02 Cascade TX4927-CP0
5519 TX4927-CP0/03 Multiplexed -- do not use 5519 TX4927-CP0/03 Multiplexed -- do not use
5620 TX4927-CP0/04 Multiplexed -- do not use 5620 TX4927-CP0/04 Multiplexed -- do not use
5721 TX4927-CP0/05 Multiplexed -- do not use 5721 TX4927-CP0/05 Multiplexed -- do not use
5822 TX4927-CP0/06 Multiplexed -- do not use 5822 TX4927-CP0/06 Multiplexed -- do not use
5923 TX4927-CP0/07 CPU TIMER 5923 TX4927-CP0/07 CPU TIMER
60 60
6124 TX4927-PIC/00 6124 TX4927-PIC/00
6225 TX4927-PIC/01 6225 TX4927-PIC/01
6326 TX4927-PIC/02 6326 TX4927-PIC/02
6427 TX4927-PIC/03 Cascade RBTX4927-IOC 6427 TX4927-PIC/03 Cascade RBTX4927-IOC
6528 TX4927-PIC/04 6528 TX4927-PIC/04
6629 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet 6629 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
@@ -80,7 +80,7 @@ IRQ Device
8043 TX4927-PIC/19 8043 TX4927-PIC/19
8144 TX4927-PIC/20 8144 TX4927-PIC/20
8245 TX4927-PIC/21 8245 TX4927-PIC/21
8346 TX4927-PIC/22 TX4927 PCI PCI-ERR 8346 TX4927-PIC/22 TX4927 PCI PCI-ERR
8447 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used) 8447 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
8548 TX4927-PIC/24 8548 TX4927-PIC/24
8649 TX4927-PIC/25 8649 TX4927-PIC/25
@@ -100,7 +100,7 @@ IRQ Device
10062 RBTX4927-IOC/06 10062 RBTX4927-IOC/06
10163 RBTX4927-IOC/07 10163 RBTX4927-IOC/07
102 102
103NOTES: 103NOTES:
104SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 104SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
105SouthBridge/ISA/pin=0 no pci irq used by this device 105SouthBridge/ISA/pin=0 no pci irq used by this device
106SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14 106SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
@@ -175,19 +175,19 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
175static const u32 toshiba_rbtx4927_irq_debug_flag = 175static const u32 toshiba_rbtx4927_irq_debug_flag =
176 (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO | 176 (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
177 TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR 177 TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
178// | TOSHIBA_RBTX4927_IRQ_IOC_INIT 178// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
179// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP 179// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP
180// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN 180// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN
181// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE 181// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
182// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE 182// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
183// | TOSHIBA_RBTX4927_IRQ_IOC_MASK 183// | TOSHIBA_RBTX4927_IRQ_IOC_MASK
184// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ 184// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
185// | TOSHIBA_RBTX4927_IRQ_ISA_INIT 185// | TOSHIBA_RBTX4927_IRQ_ISA_INIT
186// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP 186// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP
187// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN 187// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN
188// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE 188// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
189// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE 189// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
190// | TOSHIBA_RBTX4927_IRQ_ISA_MASK 190// | TOSHIBA_RBTX4927_IRQ_ISA_MASK
191// | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ 191// | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ
192 ); 192 );
193#endif 193#endif
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index 8724ea3ae04e..fc0720599fd9 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -395,7 +395,7 @@ static int __init tx4927_pcibios_init(void)
395 /* enable secondary ide */ 395 /* enable secondary ide */
396 v08_43 |= 0x80; 396 v08_43 |= 0x80;
397 397
398 /* 398 /*
399 * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!! 399 * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
400 * 400 *
401 * This line of code is intended to provide the user with a work 401 * This line of code is intended to provide the user with a work
diff --git a/arch/mips/vr4181/common/Makefile b/arch/mips/vr4181/common/Makefile
deleted file mode 100644
index f7587ca64ead..000000000000
--- a/arch/mips/vr4181/common/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for common code of NEC vr4181 based boards
3#
4
5obj-y := irq.o int_handler.o serial.o time.o
6
7EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/vr4181/common/int_handler.S b/arch/mips/vr4181/common/int_handler.S
deleted file mode 100644
index 2c041b8ee52b..000000000000
--- a/arch/mips/vr4181/common/int_handler.S
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 * arch/mips/vr4181/common/int_handler.S
3 *
4 * Adapted to the VR4181 and almost entirely rewritten:
5 * Copyright (C) 1999 Bradley D. LaRonde and Michael Klar
6 *
7 * Clean up to conform to the new IRQ
8 * Copyright (C) 2001 MontaVista Software Inc.
9 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16
17#include <asm/asm.h>
18#include <asm/regdef.h>
19#include <asm/mipsregs.h>
20#include <asm/stackframe.h>
21
22#include <asm/vr4181/vr4181.h>
23
24/*
25 * [jsun]
26 * See include/asm/vr4181/irq.h for IRQ assignment and strategy.
27 */
28
29 .text
30 .set noreorder
31
32 .align 5
33 NESTED(vr4181_handle_irq, PT_SIZE, ra)
34
35 .set noat
36 SAVE_ALL
37 CLI
38
39 .set at
40 .set noreorder
41
42 mfc0 t0, CP0_CAUSE
43 mfc0 t2, CP0_STATUS
44
45 and t0, t2
46
47 /* we check IP3 first; it happens most frequently */
48 andi t1, t0, STATUSF_IP3
49 bnez t1, ll_cpu_ip3
50 andi t1, t0, STATUSF_IP2
51 bnez t1, ll_cpu_ip2
52 andi t1, t0, STATUSF_IP7 /* cpu timer */
53 bnez t1, ll_cputimer_irq
54 andi t1, t0, STATUSF_IP4
55 bnez t1, ll_cpu_ip4
56 andi t1, t0, STATUSF_IP5
57 bnez t1, ll_cpu_ip5
58 andi t1, t0, STATUSF_IP6
59 bnez t1, ll_cpu_ip6
60 andi t1, t0, STATUSF_IP0 /* software int 0 */
61 bnez t1, ll_cpu_ip0
62 andi t1, t0, STATUSF_IP1 /* software int 1 */
63 bnez t1, ll_cpu_ip1
64 nop
65
66 .set reorder
67do_spurious:
68 j spurious_interrupt
69
70/*
71 * regular CPU irqs
72 */
73ll_cputimer_irq:
74 li a0, VR4181_IRQ_TIMER
75 move a1, sp
76 jal do_IRQ
77 j ret_from_irq
78
79
80ll_cpu_ip0:
81 li a0, VR4181_IRQ_SW1
82 move a1, sp
83 jal do_IRQ
84 j ret_from_irq
85
86ll_cpu_ip1:
87 li a0, VR4181_IRQ_SW2
88 move a1, sp
89 jal do_IRQ
90 j ret_from_irq
91
92ll_cpu_ip3:
93 li a0, VR4181_IRQ_INT1
94 move a1, sp
95 jal do_IRQ
96 j ret_from_irq
97
98ll_cpu_ip4:
99 li a0, VR4181_IRQ_INT2
100 move a1, sp
101 jal do_IRQ
102 j ret_from_irq
103
104ll_cpu_ip5:
105 li a0, VR4181_IRQ_INT3
106 move a1, sp
107 jal do_IRQ
108 j ret_from_irq
109
110ll_cpu_ip6:
111 li a0, VR4181_IRQ_INT4
112 move a1, sp
113 jal do_IRQ
114 j ret_from_irq
115
116/*
117 * One of the sys irq has happend.
118 *
119 * In the interest of speed, we first determine in the following order
120 * which 16-irq block have pending interrupts:
121 * sysint1 (16 sources, including cascading intrs from GPIO)
122 * sysint2
123 * gpio (16 intr sources)
124 *
125 * Then we do binary search to find the exact interrupt source.
126 */
127ll_cpu_ip2:
128
129 lui t3,%hi(VR4181_SYSINT1REG)
130 lhu t0,%lo(VR4181_SYSINT1REG)(t3)
131 lhu t2,%lo(VR4181_MSYSINT1REG)(t3)
132 and t0, 0xfffb /* hack - remove RTC Long 1 intr */
133 and t0, t2
134 beqz t0, check_sysint2
135
136 /* check for GPIO interrupts */
137 andi t1, t0, 0x0100
138 bnez t1, check_gpio_int
139
140 /* so we have an interrupt in sysint1 which is not gpio int */
141 li a0, VR4181_SYS_IRQ_BASE - 1
142 j check_16
143
144check_sysint2:
145
146 lhu t0,%lo(VR4181_SYSINT2REG)(t3)
147 lhu t2,%lo(VR4181_MSYSINT2REG)(t3)
148 and t0, 0xfffe /* hack - remove RTC Long 2 intr */
149 and t0, t2
150 li a0, VR4181_SYS_IRQ_BASE + 16 - 1
151 j check_16
152
153check_gpio_int:
154 lui t3,%hi(VR4181_GPINTMSK)
155 lhu t0,%lo(VR4181_GPINTMSK)(t3)
156 lhu t2,%lo(VR4181_GPINTSTAT)(t3)
157 xori t0, 0xffff /* why? reverse logic? */
158 and t0, t2
159 li a0, VR4181_GPIO_IRQ_BASE - 1
160 j check_16
161
162/*
163 * When we reach check_16, we have 16-bit status in t0 and base irq number
164 * in a0.
165 */
166check_16:
167 andi t1, t0, 0xff
168 bnez t1, check_8
169
170 srl t0, 8
171 addi a0, 8
172 j check_8
173
174/*
175 * When we reach check_8, we have 8-bit status in t0 and base irq number
176 * in a0.
177 */
178check_8:
179 andi t1, t0, 0xf
180 bnez t1, check_4
181
182 srl t0, 4
183 addi a0, 4
184 j check_4
185
186/*
187 * When we reach check_4, we have 4-bit status in t0 and base irq number
188 * in a0.
189 */
190check_4:
191 andi t0, t0, 0xf
192 beqz t0, do_spurious
193
194loop:
195 andi t2, t0, 0x1
196 srl t0, 1
197 addi a0, 1
198 beqz t2, loop
199
200found_it:
201 move a1, sp
202 jal do_IRQ
203
204 j ret_from_irq
205
206 END(vr4181_handle_irq)
diff --git a/arch/mips/vr4181/common/irq.c b/arch/mips/vr4181/common/irq.c
deleted file mode 100644
index 2cdf77c5cb3e..000000000000
--- a/arch/mips/vr4181/common/irq.c
+++ /dev/null
@@ -1,239 +0,0 @@
1/*
2 * Copyright (C) 2001 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
5 *
6 * linux/arch/mips/vr4181/common/irq.c
7 * Completely re-written to use the new irq.c
8 *
9 * Credits to Bradley D. LaRonde and Michael Klar for writing the original
10 * irq.c file which was derived from the common irq.c file.
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 */
16#include <linux/types.h>
17#include <linux/init.h>
18#include <linux/kernel_stat.h>
19#include <linux/signal.h>
20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/slab.h>
23#include <linux/random.h>
24
25#include <asm/irq.h>
26#include <asm/mipsregs.h>
27#include <asm/gdb-stub.h>
28
29#include <asm/vr4181/vr4181.h>
30
31/*
32 * Strategy:
33 *
34 * We essentially have three irq controllers, CPU, system, and gpio.
35 *
36 * CPU irq controller is taken care by arch/mips/kernel/irq_cpu.c and
37 * CONFIG_IRQ_CPU config option.
38 *
39 * We here provide sys_irq and gpio_irq controller code.
40 */
41
42static int sys_irq_base;
43static int gpio_irq_base;
44
45/* ---------------------- sys irq ------------------------ */
46static void
47sys_irq_enable(unsigned int irq)
48{
49 irq -= sys_irq_base;
50 if (irq < 16) {
51 *VR4181_MSYSINT1REG |= (u16)(1 << irq);
52 } else {
53 irq -= 16;
54 *VR4181_MSYSINT2REG |= (u16)(1 << irq);
55 }
56}
57
58static void
59sys_irq_disable(unsigned int irq)
60{
61 irq -= sys_irq_base;
62 if (irq < 16) {
63 *VR4181_MSYSINT1REG &= ~((u16)(1 << irq));
64 } else {
65 irq -= 16;
66 *VR4181_MSYSINT2REG &= ~((u16)(1 << irq));
67 }
68
69}
70
71static unsigned int
72sys_irq_startup(unsigned int irq)
73{
74 sys_irq_enable(irq);
75 return 0;
76}
77
78#define sys_irq_shutdown sys_irq_disable
79#define sys_irq_ack sys_irq_disable
80
81static void
82sys_irq_end(unsigned int irq)
83{
84 if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
85 sys_irq_enable(irq);
86}
87
88static hw_irq_controller sys_irq_controller = {
89 "vr4181_sys_irq",
90 sys_irq_startup,
91 sys_irq_shutdown,
92 sys_irq_enable,
93 sys_irq_disable,
94 sys_irq_ack,
95 sys_irq_end,
96 NULL /* no affinity stuff for UP */
97};
98
99/* ---------------------- gpio irq ------------------------ */
100/* gpio irq lines use reverse logic */
101static void
102gpio_irq_enable(unsigned int irq)
103{
104 irq -= gpio_irq_base;
105 *VR4181_GPINTMSK &= ~((u16)(1 << irq));
106}
107
108static void
109gpio_irq_disable(unsigned int irq)
110{
111 irq -= gpio_irq_base;
112 *VR4181_GPINTMSK |= (u16)(1 << irq);
113}
114
115static unsigned int
116gpio_irq_startup(unsigned int irq)
117{
118 gpio_irq_enable(irq);
119
120 irq -= gpio_irq_base;
121 *VR4181_GPINTEN |= (u16)(1 << irq );
122
123 return 0;
124}
125
126static void
127gpio_irq_shutdown(unsigned int irq)
128{
129 gpio_irq_disable(irq);
130
131 irq -= gpio_irq_base;
132 *VR4181_GPINTEN &= ~((u16)(1 << irq ));
133}
134
135static void
136gpio_irq_ack(unsigned int irq)
137{
138 u16 irqtype;
139 u16 irqshift;
140
141 gpio_irq_disable(irq);
142
143 /* we clear interrupt if it is edge triggered */
144 irq -= gpio_irq_base;
145 if (irq < 8) {
146 irqtype = *VR4181_GPINTTYPL;
147 irqshift = 2 << (irq*2);
148 } else {
149 irqtype = *VR4181_GPINTTYPH;
150 irqshift = 2 << ((irq-8)*2);
151 }
152 if ( ! (irqtype & irqshift) ) {
153 *VR4181_GPINTSTAT = (u16) (1 << irq);
154 }
155}
156
157static void
158gpio_irq_end(unsigned int irq)
159{
160 if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
161 gpio_irq_enable(irq);
162}
163
164static hw_irq_controller gpio_irq_controller = {
165 "vr4181_gpio_irq",
166 gpio_irq_startup,
167 gpio_irq_shutdown,
168 gpio_irq_enable,
169 gpio_irq_disable,
170 gpio_irq_ack,
171 gpio_irq_end,
172 NULL /* no affinity stuff for UP */
173};
174
175/* --------------------- IRQ init stuff ---------------------- */
176
177extern asmlinkage void vr4181_handle_irq(void);
178extern void breakpoint(void);
179extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
180extern void mips_cpu_irq_init(u32 irq_base);
181
182static struct irqaction cascade =
183 { no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL };
184static struct irqaction reserved =
185 { no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL };
186
187void __init arch_init_irq(void)
188{
189 int i;
190
191 set_except_vector(0, vr4181_handle_irq);
192
193 /* init CPU irqs */
194 mips_cpu_irq_init(VR4181_CPU_IRQ_BASE);
195
196 /* init sys irqs */
197 sys_irq_base = VR4181_SYS_IRQ_BASE;
198 for (i=sys_irq_base; i < sys_irq_base + VR4181_NUM_SYS_IRQ; i++) {
199 irq_desc[i].status = IRQ_DISABLED;
200 irq_desc[i].action = NULL;
201 irq_desc[i].depth = 1;
202 irq_desc[i].handler = &sys_irq_controller;
203 }
204
205 /* init gpio irqs */
206 gpio_irq_base = VR4181_GPIO_IRQ_BASE;
207 for (i=gpio_irq_base; i < gpio_irq_base + VR4181_NUM_GPIO_IRQ; i++) {
208 irq_desc[i].status = IRQ_DISABLED;
209 irq_desc[i].action = NULL;
210 irq_desc[i].depth = 1;
211 irq_desc[i].handler = &gpio_irq_controller;
212 }
213
214 /* Default all ICU IRQs to off ... */
215 *VR4181_MSYSINT1REG = 0;
216 *VR4181_MSYSINT2REG = 0;
217
218 /* We initialize the level 2 ICU registers to all bits disabled. */
219 *VR4181_MPIUINTREG = 0;
220 *VR4181_MAIUINTREG = 0;
221 *VR4181_MKIUINTREG = 0;
222
223 /* disable all GPIO intrs */
224 *VR4181_GPINTMSK = 0xffff;
225
226 /* vector handler. What these do is register the IRQ as non-sharable */
227 setup_irq(VR4181_IRQ_INT0, &cascade);
228 setup_irq(VR4181_IRQ_GIU, &cascade);
229
230 /*
231 * RTC interrupts are interesting. They have two destinations.
232 * One is at sys irq controller, and the other is at CPU IP3 and IP4.
233 * RTC timer is used as system timer.
234 * We enable them here, but timer routine will register later
235 * with CPU IP3/IP4.
236 */
237 setup_irq(VR4181_IRQ_RTCL1, &reserved);
238 setup_irq(VR4181_IRQ_RTCL2, &reserved);
239}
diff --git a/arch/mips/vr4181/common/serial.c b/arch/mips/vr4181/common/serial.c
deleted file mode 100644
index 3f62c62b107f..000000000000
--- a/arch/mips/vr4181/common/serial.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 *
5 * arch/mips/vr4181/common/serial.c
6 * initialize serial port on vr4181.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15/*
16 * [jsun, 010925]
17 * You need to make sure rs_table has at least one element in
18 * drivers/char/serial.c file. There is no good way to do it right
19 * now. A workaround is to include CONFIG_SERIAL_MANY_PORTS in your
20 * configure file, which would gives you 64 ports and wastes 11K ram.
21 */
22
23#include <linux/types.h>
24#include <linux/kernel.h>
25#include <linux/init.h>
26#include <linux/serial.h>
27
28#include <asm/vr4181/vr4181.h>
29
30void __init vr4181_init_serial(void)
31{
32 struct serial_struct s;
33
34 /* turn on UART clock */
35 *VR4181_CMUCLKMSK |= VR4181_CMUCLKMSK_MSKSIU;
36
37 /* clear memory */
38 memset(&s, 0, sizeof(s));
39
40 s.line = 0; /* we set the first one */
41 s.baud_base = 1152000;
42 s.irq = VR4181_IRQ_SIU;
43 s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; /* STD_COM_FLAGS */
44 s.iomem_base = (u8*)VR4181_SIURB;
45 s.iomem_reg_shift = 0;
46 s.io_type = SERIAL_IO_MEM;
47 if (early_serial_setup(&s) != 0) {
48 panic("vr4181_init_serial() failed!");
49 }
50}
51
diff --git a/arch/mips/vr4181/common/time.c b/arch/mips/vr4181/common/time.c
deleted file mode 100644
index 17814076b6f4..000000000000
--- a/arch/mips/vr4181/common/time.c
+++ /dev/null
@@ -1,145 +0,0 @@
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: jsun@mvista.com or jsun@junsun.net
4 *
5 * rtc and time ops for vr4181. Part of code is drived from
6 * linux-vr, originally written by Bradley D. LaRonde & Michael Klar.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/spinlock.h>
17#include <linux/param.h> /* for HZ */
18#include <linux/time.h>
19#include <linux/interrupt.h>
20
21#include <asm/system.h>
22#include <asm/time.h>
23
24#include <asm/vr4181/vr4181.h>
25
26#define COUNTS_PER_JIFFY ((32768 + HZ/2) / HZ)
27
28/*
29 * RTC ops
30 */
31
32DEFINE_SPINLOCK(rtc_lock);
33
34/* per VR41xx docs, bad data can be read if between 2 counts */
35static inline unsigned short
36read_time_reg(volatile unsigned short *reg)
37{
38 unsigned short value;
39 do {
40 value = *reg;
41 barrier();
42 } while (value != *reg);
43 return value;
44}
45
46static unsigned long
47vr4181_rtc_get_time(void)
48{
49 unsigned short regh, regm, regl;
50
51 // why this crazy order, you ask? to guarantee that neither m
52 // nor l wrap before all 3 read
53 do {
54 regm = read_time_reg(VR4181_ETIMEMREG);
55 barrier();
56 regh = read_time_reg(VR4181_ETIMEHREG);
57 barrier();
58 regl = read_time_reg(VR4181_ETIMELREG);
59 } while (regm != read_time_reg(VR4181_ETIMEMREG));
60 return ((regh << 17) | (regm << 1) | (regl >> 15));
61}
62
63static int
64vr4181_rtc_set_time(unsigned long timeval)
65{
66 unsigned short intreg;
67 unsigned long flags;
68
69 spin_lock_irqsave(&rtc_lock, flags);
70 intreg = *VR4181_RTCINTREG & 0x05;
71 barrier();
72 *VR4181_ETIMELREG = timeval << 15;
73 *VR4181_ETIMEMREG = timeval >> 1;
74 *VR4181_ETIMEHREG = timeval >> 17;
75 barrier();
76 // assume that any ints that just triggered are invalid, since the
77 // time value is written non-atomically in 3 separate regs
78 *VR4181_RTCINTREG = 0x05 ^ intreg;
79 spin_unlock_irqrestore(&rtc_lock, flags);
80
81 return 0;
82}
83
84
85/*
86 * timer interrupt routine (wrapper)
87 *
88 * we need our own interrupt routine because we need to clear
89 * RTC1 interrupt.
90 */
91static void
92vr4181_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
93{
94 /* Clear the interrupt. */
95 *VR4181_RTCINTREG = 0x2;
96
97 /* call the generic one */
98 timer_interrupt(irq, dev_id, regs);
99}
100
101
102/*
103 * vr4181_time_init:
104 *
105 * We pick the following choices:
106 * . we use elapsed timer as the RTC. We set some reasonable init data since
107 * it does not persist across reset
108 * . we use RTC1 as the system timer interrupt source.
109 * . we use CPU counter for fast_gettimeoffset and we calivrate the cpu
110 * frequency. In other words, we use calibrate_div64_gettimeoffset().
111 * . we use our own timer interrupt routine which clears the interrupt
112 * and then calls the generic high-level timer interrupt routine.
113 *
114 */
115
116extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
117
118static void
119vr4181_timer_setup(struct irqaction *irq)
120{
121 /* over-write the handler to be our own one */
122 irq->handler = vr4181_timer_interrupt;
123
124 /* sets up the frequency */
125 *VR4181_RTCL1LREG = COUNTS_PER_JIFFY;
126 *VR4181_RTCL1HREG = 0;
127
128 /* and ack any pending ints */
129 *VR4181_RTCINTREG = 0x2;
130
131 /* setup irqaction */
132 setup_irq(VR4181_IRQ_INT1, irq);
133
134}
135
136void
137vr4181_init_time(void)
138{
139 /* setup hookup functions */
140 rtc_get_time = vr4181_rtc_get_time;
141 rtc_set_time = vr4181_rtc_set_time;
142
143 board_timer_setup = vr4181_timer_setup;
144}
145
diff --git a/arch/mips/vr4181/osprey/Makefile b/arch/mips/vr4181/osprey/Makefile
deleted file mode 100644
index 34be05790883..000000000000
--- a/arch/mips/vr4181/osprey/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for common code of NEC Osprey board
3#
4
5obj-y := setup.o prom.o reset.o
6
7obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/vr4181/osprey/dbg_io.c b/arch/mips/vr4181/osprey/dbg_io.c
deleted file mode 100644
index 5e8a84072d5b..000000000000
--- a/arch/mips/vr4181/osprey/dbg_io.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * kgdb io functions for osprey. We use the serial port on debug board.
3 *
4 * Copyright (C) 2001 MontaVista Software Inc.
5 * Author: jsun@mvista.com or jsun@junsun.net
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14/* ======================= CONFIG ======================== */
15
16/* [jsun] we use the second serial port for kdb */
17#define BASE 0xb7fffff0
18#define MAX_BAUD 115200
19
20/* distance in bytes between two serial registers */
21#define REG_OFFSET 1
22
23/*
24 * 0 - kgdb does serial init
25 * 1 - kgdb skip serial init
26 */
27static int remoteDebugInitialized = 1;
28
29/*
30 * the default baud rate *if* kgdb does serial init
31 */
32#define BAUD_DEFAULT UART16550_BAUD_38400
33
34/* ======================= END OF CONFIG ======================== */
35
36typedef unsigned char uint8;
37typedef unsigned int uint32;
38
39#define UART16550_BAUD_2400 2400
40#define UART16550_BAUD_4800 4800
41#define UART16550_BAUD_9600 9600
42#define UART16550_BAUD_19200 19200
43#define UART16550_BAUD_38400 38400
44#define UART16550_BAUD_57600 57600
45#define UART16550_BAUD_115200 115200
46
47#define UART16550_PARITY_NONE 0
48#define UART16550_PARITY_ODD 0x08
49#define UART16550_PARITY_EVEN 0x18
50#define UART16550_PARITY_MARK 0x28
51#define UART16550_PARITY_SPACE 0x38
52
53#define UART16550_DATA_5BIT 0x0
54#define UART16550_DATA_6BIT 0x1
55#define UART16550_DATA_7BIT 0x2
56#define UART16550_DATA_8BIT 0x3
57
58#define UART16550_STOP_1BIT 0x0
59#define UART16550_STOP_2BIT 0x4
60
61/* register offset */
62#define OFS_RCV_BUFFER 0
63#define OFS_TRANS_HOLD 0
64#define OFS_SEND_BUFFER 0
65#define OFS_INTR_ENABLE (1*REG_OFFSET)
66#define OFS_INTR_ID (2*REG_OFFSET)
67#define OFS_DATA_FORMAT (3*REG_OFFSET)
68#define OFS_LINE_CONTROL (3*REG_OFFSET)
69#define OFS_MODEM_CONTROL (4*REG_OFFSET)
70#define OFS_RS232_OUTPUT (4*REG_OFFSET)
71#define OFS_LINE_STATUS (5*REG_OFFSET)
72#define OFS_MODEM_STATUS (6*REG_OFFSET)
73#define OFS_RS232_INPUT (6*REG_OFFSET)
74#define OFS_SCRATCH_PAD (7*REG_OFFSET)
75
76#define OFS_DIVISOR_LSB (0*REG_OFFSET)
77#define OFS_DIVISOR_MSB (1*REG_OFFSET)
78
79
80/* memory-mapped read/write of the port */
81#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
82#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
83
84void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
85{
86 /* disable interrupts */
87 UART16550_WRITE(OFS_INTR_ENABLE, 0);
88
89 /* set up buad rate */
90 {
91 uint32 divisor;
92
93 /* set DIAB bit */
94 UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
95
96 /* set divisor */
97 divisor = MAX_BAUD / baud;
98 UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
99 UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
100
101 /* clear DIAB bit */
102 UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
103 }
104
105 /* set data format */
106 UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
107}
108
109
110uint8 getDebugChar(void)
111{
112 if (!remoteDebugInitialized) {
113 remoteDebugInitialized = 1;
114 debugInit(BAUD_DEFAULT,
115 UART16550_DATA_8BIT,
116 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
117 }
118
119 while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
120 return UART16550_READ(OFS_RCV_BUFFER);
121}
122
123
124int putDebugChar(uint8 byte)
125{
126 if (!remoteDebugInitialized) {
127 remoteDebugInitialized = 1;
128 debugInit(BAUD_DEFAULT,
129 UART16550_DATA_8BIT,
130 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
131 }
132
133 while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
134 UART16550_WRITE(OFS_SEND_BUFFER, byte);
135 return 1;
136}
diff --git a/arch/mips/vr4181/osprey/prom.c b/arch/mips/vr4181/osprey/prom.c
deleted file mode 100644
index af0d14561619..000000000000
--- a/arch/mips/vr4181/osprey/prom.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: jsun@mvista.com or jsun@junsun.net
4 *
5 * arch/mips/vr4181/osprey/prom.c
6 * prom code for osprey.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/mm.h>
18#include <linux/bootmem.h>
19#include <asm/bootinfo.h>
20#include <asm/addrspace.h>
21
22const char *get_system_type(void)
23{
24 return "NEC_Vr41xx Osprey";
25}
26
27/*
28 * [jsun] right now we assume it is the nec debug monitor, which does
29 * not pass any arguments.
30 */
31void __init prom_init(void)
32{
33 // cmdline is now set in default config
34 // strcpy(arcs_cmdline, "ip=bootp ");
35 // strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
36 // strcpy(arcs_cmdline, "ether=0,0x0300,eth0 "
37 // strcat(arcs_cmdline, "video=vr4181fb:xres:240,yres:320,bpp:8 ");
38
39 mips_machgroup = MACH_GROUP_NEC_VR41XX;
40 mips_machtype = MACH_NEC_OSPREY;
41
42 /* 16MB fixed */
43 add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
44}
45
46unsigned long __init prom_free_prom_memory(void)
47{
48 return 0;
49}
diff --git a/arch/mips/vr4181/osprey/reset.c b/arch/mips/vr4181/osprey/reset.c
deleted file mode 100644
index 036ae83d89d6..000000000000
--- a/arch/mips/vr4181/osprey/reset.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * Copyright (C) 1997, 2001 Ralf Baechle
8 * Copyright 2001 MontaVista Software Inc.
9 * Author: jsun@mvista.com or jsun@junsun.net
10 */
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <asm/io.h>
14#include <asm/cacheflush.h>
15#include <asm/processor.h>
16#include <asm/reboot.h>
17#include <asm/system.h>
18
19void nec_osprey_restart(char *command)
20{
21 set_c0_status(ST0_ERL);
22 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
23 flush_cache_all();
24 write_c0_wired(0);
25 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
26}
27
28void nec_osprey_halt(void)
29{
30 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
31 while (1)
32 __asm__(".set\tmips3\n\t"
33 "wait\n\t"
34 ".set\tmips0");
35}
36
37void nec_osprey_power_off(void)
38{
39 nec_osprey_halt();
40}
diff --git a/arch/mips/vr4181/osprey/setup.c b/arch/mips/vr4181/osprey/setup.c
deleted file mode 100644
index 2ff7140e7ed7..000000000000
--- a/arch/mips/vr4181/osprey/setup.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * linux/arch/mips/vr4181/setup.c
3 *
4 * VR41xx setup routines
5 *
6 * Copyright (C) 1999 Bradley D. LaRonde
7 * Copyright (C) 1999, 2000 Michael Klar
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: jsun@mvista.com or jsun@junsun.net
11 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 *
17 */
18
19#include <linux/ide.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <asm/reboot.h>
23#include <asm/vr4181/vr4181.h>
24#include <asm/io.h>
25
26
27extern void nec_osprey_restart(char* c);
28extern void nec_osprey_halt(void);
29extern void nec_osprey_power_off(void);
30
31extern void vr4181_init_serial(void);
32extern void vr4181_init_time(void);
33
34static void __init nec_osprey_setup(void)
35{
36 set_io_port_base(VR4181_PORT_BASE);
37 isa_slot_offset = VR4181_ISAMEM_BASE;
38
39 vr4181_init_serial();
40 vr4181_init_time();
41
42 _machine_restart = nec_osprey_restart;
43 _machine_halt = nec_osprey_halt;
44 _machine_power_off = nec_osprey_power_off;
45
46 /* setup resource limit */
47 ioport_resource.end = 0xffffffff;
48 iomem_resource.end = 0xffffffff;
49
50 /* [jsun] hack */
51 /*
52 printk("[jsun] hack to change external ISA control register, %x -> %x\n",
53 (*VR4181_XISACTL),
54 (*VR4181_XISACTL) | 0x2);
55 *VR4181_XISACTL |= 0x2;
56 */
57
58 // *VR4181_GPHIBSTH = 0x2000;
59 // *VR4181_GPMD0REG = 0x00c0;
60 // *VR4181_GPINTEN = 1<<6;
61
62 /* [jsun] I believe this will get the interrupt type right
63 * for the ether port.
64 */
65 *VR4181_GPINTTYPL = 0x3000;
66}
67
68early_initcall(nec_osprey_setup);
diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c
index aa8605ab76ff..d29201acc4f3 100644
--- a/arch/mips/vr41xx/casio-e55/setup.c
+++ b/arch/mips/vr41xx/casio-e55/setup.c
@@ -23,11 +23,6 @@
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/vr41xx/e55.h> 24#include <asm/vr41xx/e55.h>
25 25
26const char *get_system_type(void)
27{
28 return "CASIO CASSIOPEIA E-11/15/55/65";
29}
30
31static int __init casio_e55_setup(void) 26static int __init casio_e55_setup(void)
32{ 27{
33 set_io_port_base(IO_PORT_BASE); 28 set_io_port_base(IO_PORT_BASE);
diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile
index fa98ef3855bc..9096302a7ecc 100644
--- a/arch/mips/vr41xx/common/Makefile
+++ b/arch/mips/vr41xx/common/Makefile
@@ -2,7 +2,7 @@
2# Makefile for common code of the NEC VR4100 series. 2# Makefile for common code of the NEC VR4100 series.
3# 3#
4 4
5obj-y += bcu.o cmu.o icu.o init.o int-handler.o pmu.o 5obj-y += bcu.o cmu.o icu.o init.o int-handler.o irq.o pmu.o type.o
6obj-$(CONFIG_VRC4173) += vrc4173.o 6obj-$(CONFIG_VRC4173) += vrc4173.o
7 7
8EXTRA_AFLAGS := $(CFLAGS) 8EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index c842661144cb..0b73c5ab3c0c 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -3,8 +3,7 @@
3 * 3 *
4 * Copyright (C) 2001-2002 MontaVista Software Inc. 4 * Copyright (C) 2001-2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> 5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 6 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -31,7 +30,7 @@
31 */ 30 */
32#include <linux/errno.h> 31#include <linux/errno.h>
33#include <linux/init.h> 32#include <linux/init.h>
34#include <linux/interrupt.h> 33#include <linux/ioport.h>
35#include <linux/irq.h> 34#include <linux/irq.h>
36#include <linux/module.h> 35#include <linux/module.h>
37#include <linux/smp.h> 36#include <linux/smp.h>
@@ -39,34 +38,24 @@
39 38
40#include <asm/cpu.h> 39#include <asm/cpu.h>
41#include <asm/io.h> 40#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/irq_cpu.h>
44#include <asm/vr41xx/vr41xx.h> 41#include <asm/vr41xx/vr41xx.h>
45 42
46extern asmlinkage void vr41xx_handle_interrupt(void); 43static void __iomem *icu1_base;
47 44static void __iomem *icu2_base;
48extern void init_vr41xx_giuint_irq(void);
49extern void giuint_irq_dispatch(struct pt_regs *regs);
50
51static uint32_t icu1_base;
52static uint32_t icu2_base;
53
54static struct irqaction icu_cascade = {
55 .handler = no_action,
56 .mask = CPU_MASK_NONE,
57 .name = "cascade",
58};
59 45
60static unsigned char sysint1_assign[16] = { 46static unsigned char sysint1_assign[16] = {
61 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; 47 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
62static unsigned char sysint2_assign[16] = { 48static unsigned char sysint2_assign[16] = {
63 2, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; 49 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
64 50
65#define SYSINT1REG_TYPE1 KSEG1ADDR(0x0b000080) 51#define ICU1_TYPE1_BASE 0x0b000080UL
66#define SYSINT2REG_TYPE1 KSEG1ADDR(0x0b000200) 52#define ICU2_TYPE1_BASE 0x0b000200UL
67 53
68#define SYSINT1REG_TYPE2 KSEG1ADDR(0x0f000080) 54#define ICU1_TYPE2_BASE 0x0f000080UL
69#define SYSINT2REG_TYPE2 KSEG1ADDR(0x0f0000a0) 55#define ICU2_TYPE2_BASE 0x0f0000a0UL
56
57#define ICU1_SIZE 0x20
58#define ICU2_SIZE 0x1c
70 59
71#define SYSINT1REG 0x00 60#define SYSINT1REG 0x00
72#define PIUINTREG 0x02 61#define PIUINTREG 0x02
@@ -106,61 +95,61 @@ static unsigned char sysint2_assign[16] = {
106#define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */ 95#define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */
107#define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */ 96#define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */
108 97
109#define read_icu1(offset) readw(icu1_base + (offset)) 98#define INT_TO_IRQ(x) ((x) + 2) /* Int0-4 -> IRQ2-6 */
110#define write_icu1(val, offset) writew((val), icu1_base + (offset)) 99
100#define icu1_read(offset) readw(icu1_base + (offset))
101#define icu1_write(offset, value) writew((value), icu1_base + (offset))
111 102
112#define read_icu2(offset) readw(icu2_base + (offset)) 103#define icu2_read(offset) readw(icu2_base + (offset))
113#define write_icu2(val, offset) writew((val), icu2_base + (offset)) 104#define icu2_write(offset, value) writew((value), icu2_base + (offset))
114 105
115#define INTASSIGN_MAX 4 106#define INTASSIGN_MAX 4
116#define INTASSIGN_MASK 0x0007 107#define INTASSIGN_MASK 0x0007
117 108
118static inline uint16_t set_icu1(uint8_t offset, uint16_t set) 109static inline uint16_t icu1_set(uint8_t offset, uint16_t set)
119{ 110{
120 uint16_t res; 111 uint16_t data;
121 112
122 res = read_icu1(offset); 113 data = icu1_read(offset);
123 res |= set; 114 data |= set;
124 write_icu1(res, offset); 115 icu1_write(offset, data);
125 116
126 return res; 117 return data;
127} 118}
128 119
129static inline uint16_t clear_icu1(uint8_t offset, uint16_t clear) 120static inline uint16_t icu1_clear(uint8_t offset, uint16_t clear)
130{ 121{
131 uint16_t res; 122 uint16_t data;
132 123
133 res = read_icu1(offset); 124 data = icu1_read(offset);
134 res &= ~clear; 125 data &= ~clear;
135 write_icu1(res, offset); 126 icu1_write(offset, data);
136 127
137 return res; 128 return data;
138} 129}
139 130
140static inline uint16_t set_icu2(uint8_t offset, uint16_t set) 131static inline uint16_t icu2_set(uint8_t offset, uint16_t set)
141{ 132{
142 uint16_t res; 133 uint16_t data;
143 134
144 res = read_icu2(offset); 135 data = icu2_read(offset);
145 res |= set; 136 data |= set;
146 write_icu2(res, offset); 137 icu2_write(offset, data);
147 138
148 return res; 139 return data;
149} 140}
150 141
151static inline uint16_t clear_icu2(uint8_t offset, uint16_t clear) 142static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear)
152{ 143{
153 uint16_t res; 144 uint16_t data;
154 145
155 res = read_icu2(offset); 146 data = icu2_read(offset);
156 res &= ~clear; 147 data &= ~clear;
157 write_icu2(res, offset); 148 icu2_write(offset, data);
158 149
159 return res; 150 return data;
160} 151}
161 152
162/*=======================================================================*/
163
164void vr41xx_enable_piuint(uint16_t mask) 153void vr41xx_enable_piuint(uint16_t mask)
165{ 154{
166 irq_desc_t *desc = irq_desc + PIU_IRQ; 155 irq_desc_t *desc = irq_desc + PIU_IRQ;
@@ -169,7 +158,7 @@ void vr41xx_enable_piuint(uint16_t mask)
169 if (current_cpu_data.cputype == CPU_VR4111 || 158 if (current_cpu_data.cputype == CPU_VR4111 ||
170 current_cpu_data.cputype == CPU_VR4121) { 159 current_cpu_data.cputype == CPU_VR4121) {
171 spin_lock_irqsave(&desc->lock, flags); 160 spin_lock_irqsave(&desc->lock, flags);
172 set_icu1(MPIUINTREG, mask); 161 icu1_set(MPIUINTREG, mask);
173 spin_unlock_irqrestore(&desc->lock, flags); 162 spin_unlock_irqrestore(&desc->lock, flags);
174 } 163 }
175} 164}
@@ -184,7 +173,7 @@ void vr41xx_disable_piuint(uint16_t mask)
184 if (current_cpu_data.cputype == CPU_VR4111 || 173 if (current_cpu_data.cputype == CPU_VR4111 ||
185 current_cpu_data.cputype == CPU_VR4121) { 174 current_cpu_data.cputype == CPU_VR4121) {
186 spin_lock_irqsave(&desc->lock, flags); 175 spin_lock_irqsave(&desc->lock, flags);
187 clear_icu1(MPIUINTREG, mask); 176 icu1_clear(MPIUINTREG, mask);
188 spin_unlock_irqrestore(&desc->lock, flags); 177 spin_unlock_irqrestore(&desc->lock, flags);
189 } 178 }
190} 179}
@@ -199,7 +188,7 @@ void vr41xx_enable_aiuint(uint16_t mask)
199 if (current_cpu_data.cputype == CPU_VR4111 || 188 if (current_cpu_data.cputype == CPU_VR4111 ||
200 current_cpu_data.cputype == CPU_VR4121) { 189 current_cpu_data.cputype == CPU_VR4121) {
201 spin_lock_irqsave(&desc->lock, flags); 190 spin_lock_irqsave(&desc->lock, flags);
202 set_icu1(MAIUINTREG, mask); 191 icu1_set(MAIUINTREG, mask);
203 spin_unlock_irqrestore(&desc->lock, flags); 192 spin_unlock_irqrestore(&desc->lock, flags);
204 } 193 }
205} 194}
@@ -214,7 +203,7 @@ void vr41xx_disable_aiuint(uint16_t mask)
214 if (current_cpu_data.cputype == CPU_VR4111 || 203 if (current_cpu_data.cputype == CPU_VR4111 ||
215 current_cpu_data.cputype == CPU_VR4121) { 204 current_cpu_data.cputype == CPU_VR4121) {
216 spin_lock_irqsave(&desc->lock, flags); 205 spin_lock_irqsave(&desc->lock, flags);
217 clear_icu1(MAIUINTREG, mask); 206 icu1_clear(MAIUINTREG, mask);
218 spin_unlock_irqrestore(&desc->lock, flags); 207 spin_unlock_irqrestore(&desc->lock, flags);
219 } 208 }
220} 209}
@@ -229,7 +218,7 @@ void vr41xx_enable_kiuint(uint16_t mask)
229 if (current_cpu_data.cputype == CPU_VR4111 || 218 if (current_cpu_data.cputype == CPU_VR4111 ||
230 current_cpu_data.cputype == CPU_VR4121) { 219 current_cpu_data.cputype == CPU_VR4121) {
231 spin_lock_irqsave(&desc->lock, flags); 220 spin_lock_irqsave(&desc->lock, flags);
232 set_icu1(MKIUINTREG, mask); 221 icu1_set(MKIUINTREG, mask);
233 spin_unlock_irqrestore(&desc->lock, flags); 222 spin_unlock_irqrestore(&desc->lock, flags);
234 } 223 }
235} 224}
@@ -244,7 +233,7 @@ void vr41xx_disable_kiuint(uint16_t mask)
244 if (current_cpu_data.cputype == CPU_VR4111 || 233 if (current_cpu_data.cputype == CPU_VR4111 ||
245 current_cpu_data.cputype == CPU_VR4121) { 234 current_cpu_data.cputype == CPU_VR4121) {
246 spin_lock_irqsave(&desc->lock, flags); 235 spin_lock_irqsave(&desc->lock, flags);
247 clear_icu1(MKIUINTREG, mask); 236 icu1_clear(MKIUINTREG, mask);
248 spin_unlock_irqrestore(&desc->lock, flags); 237 spin_unlock_irqrestore(&desc->lock, flags);
249 } 238 }
250} 239}
@@ -257,7 +246,7 @@ void vr41xx_enable_dsiuint(uint16_t mask)
257 unsigned long flags; 246 unsigned long flags;
258 247
259 spin_lock_irqsave(&desc->lock, flags); 248 spin_lock_irqsave(&desc->lock, flags);
260 set_icu1(MDSIUINTREG, mask); 249 icu1_set(MDSIUINTREG, mask);
261 spin_unlock_irqrestore(&desc->lock, flags); 250 spin_unlock_irqrestore(&desc->lock, flags);
262} 251}
263 252
@@ -269,7 +258,7 @@ void vr41xx_disable_dsiuint(uint16_t mask)
269 unsigned long flags; 258 unsigned long flags;
270 259
271 spin_lock_irqsave(&desc->lock, flags); 260 spin_lock_irqsave(&desc->lock, flags);
272 clear_icu1(MDSIUINTREG, mask); 261 icu1_clear(MDSIUINTREG, mask);
273 spin_unlock_irqrestore(&desc->lock, flags); 262 spin_unlock_irqrestore(&desc->lock, flags);
274} 263}
275 264
@@ -281,7 +270,7 @@ void vr41xx_enable_firint(uint16_t mask)
281 unsigned long flags; 270 unsigned long flags;
282 271
283 spin_lock_irqsave(&desc->lock, flags); 272 spin_lock_irqsave(&desc->lock, flags);
284 set_icu2(MFIRINTREG, mask); 273 icu2_set(MFIRINTREG, mask);
285 spin_unlock_irqrestore(&desc->lock, flags); 274 spin_unlock_irqrestore(&desc->lock, flags);
286} 275}
287 276
@@ -293,7 +282,7 @@ void vr41xx_disable_firint(uint16_t mask)
293 unsigned long flags; 282 unsigned long flags;
294 283
295 spin_lock_irqsave(&desc->lock, flags); 284 spin_lock_irqsave(&desc->lock, flags);
296 clear_icu2(MFIRINTREG, mask); 285 icu2_clear(MFIRINTREG, mask);
297 spin_unlock_irqrestore(&desc->lock, flags); 286 spin_unlock_irqrestore(&desc->lock, flags);
298} 287}
299 288
@@ -308,7 +297,7 @@ void vr41xx_enable_pciint(void)
308 current_cpu_data.cputype == CPU_VR4131 || 297 current_cpu_data.cputype == CPU_VR4131 ||
309 current_cpu_data.cputype == CPU_VR4133) { 298 current_cpu_data.cputype == CPU_VR4133) {
310 spin_lock_irqsave(&desc->lock, flags); 299 spin_lock_irqsave(&desc->lock, flags);
311 write_icu2(PCIINT0, MPCIINTREG); 300 icu2_write(MPCIINTREG, PCIINT0);
312 spin_unlock_irqrestore(&desc->lock, flags); 301 spin_unlock_irqrestore(&desc->lock, flags);
313 } 302 }
314} 303}
@@ -324,7 +313,7 @@ void vr41xx_disable_pciint(void)
324 current_cpu_data.cputype == CPU_VR4131 || 313 current_cpu_data.cputype == CPU_VR4131 ||
325 current_cpu_data.cputype == CPU_VR4133) { 314 current_cpu_data.cputype == CPU_VR4133) {
326 spin_lock_irqsave(&desc->lock, flags); 315 spin_lock_irqsave(&desc->lock, flags);
327 write_icu2(0, MPCIINTREG); 316 icu2_write(MPCIINTREG, 0);
328 spin_unlock_irqrestore(&desc->lock, flags); 317 spin_unlock_irqrestore(&desc->lock, flags);
329 } 318 }
330} 319}
@@ -340,7 +329,7 @@ void vr41xx_enable_scuint(void)
340 current_cpu_data.cputype == CPU_VR4131 || 329 current_cpu_data.cputype == CPU_VR4131 ||
341 current_cpu_data.cputype == CPU_VR4133) { 330 current_cpu_data.cputype == CPU_VR4133) {
342 spin_lock_irqsave(&desc->lock, flags); 331 spin_lock_irqsave(&desc->lock, flags);
343 write_icu2(SCUINT0, MSCUINTREG); 332 icu2_write(MSCUINTREG, SCUINT0);
344 spin_unlock_irqrestore(&desc->lock, flags); 333 spin_unlock_irqrestore(&desc->lock, flags);
345 } 334 }
346} 335}
@@ -356,7 +345,7 @@ void vr41xx_disable_scuint(void)
356 current_cpu_data.cputype == CPU_VR4131 || 345 current_cpu_data.cputype == CPU_VR4131 ||
357 current_cpu_data.cputype == CPU_VR4133) { 346 current_cpu_data.cputype == CPU_VR4133) {
358 spin_lock_irqsave(&desc->lock, flags); 347 spin_lock_irqsave(&desc->lock, flags);
359 write_icu2(0, MSCUINTREG); 348 icu2_write(MSCUINTREG, 0);
360 spin_unlock_irqrestore(&desc->lock, flags); 349 spin_unlock_irqrestore(&desc->lock, flags);
361 } 350 }
362} 351}
@@ -372,7 +361,7 @@ void vr41xx_enable_csiint(uint16_t mask)
372 current_cpu_data.cputype == CPU_VR4131 || 361 current_cpu_data.cputype == CPU_VR4131 ||
373 current_cpu_data.cputype == CPU_VR4133) { 362 current_cpu_data.cputype == CPU_VR4133) {
374 spin_lock_irqsave(&desc->lock, flags); 363 spin_lock_irqsave(&desc->lock, flags);
375 set_icu2(MCSIINTREG, mask); 364 icu2_set(MCSIINTREG, mask);
376 spin_unlock_irqrestore(&desc->lock, flags); 365 spin_unlock_irqrestore(&desc->lock, flags);
377 } 366 }
378} 367}
@@ -388,7 +377,7 @@ void vr41xx_disable_csiint(uint16_t mask)
388 current_cpu_data.cputype == CPU_VR4131 || 377 current_cpu_data.cputype == CPU_VR4131 ||
389 current_cpu_data.cputype == CPU_VR4133) { 378 current_cpu_data.cputype == CPU_VR4133) {
390 spin_lock_irqsave(&desc->lock, flags); 379 spin_lock_irqsave(&desc->lock, flags);
391 clear_icu2(MCSIINTREG, mask); 380 icu2_clear(MCSIINTREG, mask);
392 spin_unlock_irqrestore(&desc->lock, flags); 381 spin_unlock_irqrestore(&desc->lock, flags);
393 } 382 }
394} 383}
@@ -404,7 +393,7 @@ void vr41xx_enable_bcuint(void)
404 current_cpu_data.cputype == CPU_VR4131 || 393 current_cpu_data.cputype == CPU_VR4131 ||
405 current_cpu_data.cputype == CPU_VR4133) { 394 current_cpu_data.cputype == CPU_VR4133) {
406 spin_lock_irqsave(&desc->lock, flags); 395 spin_lock_irqsave(&desc->lock, flags);
407 write_icu2(BCUINTR, MBCUINTREG); 396 icu2_write(MBCUINTREG, BCUINTR);
408 spin_unlock_irqrestore(&desc->lock, flags); 397 spin_unlock_irqrestore(&desc->lock, flags);
409 } 398 }
410} 399}
@@ -420,30 +409,28 @@ void vr41xx_disable_bcuint(void)
420 current_cpu_data.cputype == CPU_VR4131 || 409 current_cpu_data.cputype == CPU_VR4131 ||
421 current_cpu_data.cputype == CPU_VR4133) { 410 current_cpu_data.cputype == CPU_VR4133) {
422 spin_lock_irqsave(&desc->lock, flags); 411 spin_lock_irqsave(&desc->lock, flags);
423 write_icu2(0, MBCUINTREG); 412 icu2_write(MBCUINTREG, 0);
424 spin_unlock_irqrestore(&desc->lock, flags); 413 spin_unlock_irqrestore(&desc->lock, flags);
425 } 414 }
426} 415}
427 416
428EXPORT_SYMBOL(vr41xx_disable_bcuint); 417EXPORT_SYMBOL(vr41xx_disable_bcuint);
429 418
430/*=======================================================================*/
431
432static unsigned int startup_sysint1_irq(unsigned int irq) 419static unsigned int startup_sysint1_irq(unsigned int irq)
433{ 420{
434 set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); 421 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
435 422
436 return 0; /* never anything pending */ 423 return 0; /* never anything pending */
437} 424}
438 425
439static void shutdown_sysint1_irq(unsigned int irq) 426static void shutdown_sysint1_irq(unsigned int irq)
440{ 427{
441 clear_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); 428 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
442} 429}
443 430
444static void enable_sysint1_irq(unsigned int irq) 431static void enable_sysint1_irq(unsigned int irq)
445{ 432{
446 set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); 433 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
447} 434}
448 435
449#define disable_sysint1_irq shutdown_sysint1_irq 436#define disable_sysint1_irq shutdown_sysint1_irq
@@ -452,7 +439,7 @@ static void enable_sysint1_irq(unsigned int irq)
452static void end_sysint1_irq(unsigned int irq) 439static void end_sysint1_irq(unsigned int irq)
453{ 440{
454 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 441 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
455 set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); 442 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
456} 443}
457 444
458static struct hw_interrupt_type sysint1_irq_type = { 445static struct hw_interrupt_type sysint1_irq_type = {
@@ -465,23 +452,21 @@ static struct hw_interrupt_type sysint1_irq_type = {
465 .end = end_sysint1_irq, 452 .end = end_sysint1_irq,
466}; 453};
467 454
468/*=======================================================================*/
469
470static unsigned int startup_sysint2_irq(unsigned int irq) 455static unsigned int startup_sysint2_irq(unsigned int irq)
471{ 456{
472 set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); 457 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
473 458
474 return 0; /* never anything pending */ 459 return 0; /* never anything pending */
475} 460}
476 461
477static void shutdown_sysint2_irq(unsigned int irq) 462static void shutdown_sysint2_irq(unsigned int irq)
478{ 463{
479 clear_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); 464 icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
480} 465}
481 466
482static void enable_sysint2_irq(unsigned int irq) 467static void enable_sysint2_irq(unsigned int irq)
483{ 468{
484 set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); 469 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
485} 470}
486 471
487#define disable_sysint2_irq shutdown_sysint2_irq 472#define disable_sysint2_irq shutdown_sysint2_irq
@@ -490,7 +475,7 @@ static void enable_sysint2_irq(unsigned int irq)
490static void end_sysint2_irq(unsigned int irq) 475static void end_sysint2_irq(unsigned int irq)
491{ 476{
492 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 477 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
493 set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); 478 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
494} 479}
495 480
496static struct hw_interrupt_type sysint2_irq_type = { 481static struct hw_interrupt_type sysint2_irq_type = {
@@ -503,8 +488,6 @@ static struct hw_interrupt_type sysint2_irq_type = {
503 .end = end_sysint2_irq, 488 .end = end_sysint2_irq,
504}; 489};
505 490
506/*=======================================================================*/
507
508static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) 491static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
509{ 492{
510 irq_desc_t *desc = irq_desc + irq; 493 irq_desc_t *desc = irq_desc + irq;
@@ -515,8 +498,8 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
515 498
516 spin_lock_irq(&desc->lock); 499 spin_lock_irq(&desc->lock);
517 500
518 intassign0 = read_icu1(INTASSIGN0); 501 intassign0 = icu1_read(INTASSIGN0);
519 intassign1 = read_icu1(INTASSIGN1); 502 intassign1 = icu1_read(INTASSIGN1);
520 503
521 switch (pin) { 504 switch (pin) {
522 case 0: 505 case 0:
@@ -556,8 +539,8 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
556 } 539 }
557 540
558 sysint1_assign[pin] = assign; 541 sysint1_assign[pin] = assign;
559 write_icu1(intassign0, INTASSIGN0); 542 icu1_write(INTASSIGN0, intassign0);
560 write_icu1(intassign1, INTASSIGN1); 543 icu1_write(INTASSIGN1, intassign1);
561 544
562 spin_unlock_irq(&desc->lock); 545 spin_unlock_irq(&desc->lock);
563 546
@@ -574,8 +557,8 @@ static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
574 557
575 spin_lock_irq(&desc->lock); 558 spin_lock_irq(&desc->lock);
576 559
577 intassign2 = read_icu1(INTASSIGN2); 560 intassign2 = icu1_read(INTASSIGN2);
578 intassign3 = read_icu1(INTASSIGN3); 561 intassign3 = icu1_read(INTASSIGN3);
579 562
580 switch (pin) { 563 switch (pin) {
581 case 0: 564 case 0:
@@ -623,8 +606,8 @@ static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
623 } 606 }
624 607
625 sysint2_assign[pin] = assign; 608 sysint2_assign[pin] = assign;
626 write_icu1(intassign2, INTASSIGN2); 609 icu1_write(INTASSIGN2, intassign2);
627 write_icu1(intassign3, INTASSIGN3); 610 icu1_write(INTASSIGN3, intassign3);
628 611
629 spin_unlock_irq(&desc->lock); 612 spin_unlock_irq(&desc->lock);
630 613
@@ -651,88 +634,92 @@ int vr41xx_set_intassign(unsigned int irq, unsigned char intassign)
651 634
652EXPORT_SYMBOL(vr41xx_set_intassign); 635EXPORT_SYMBOL(vr41xx_set_intassign);
653 636
654/*=======================================================================*/ 637static int icu_get_irq(unsigned int irq, struct pt_regs *regs)
655
656asmlinkage void irq_dispatch(unsigned char intnum, struct pt_regs *regs)
657{ 638{
658 uint16_t pend1, pend2; 639 uint16_t pend1, pend2;
659 uint16_t mask1, mask2; 640 uint16_t mask1, mask2;
660 int i; 641 int i;
661 642
662 pend1 = read_icu1(SYSINT1REG); 643 pend1 = icu1_read(SYSINT1REG);
663 mask1 = read_icu1(MSYSINT1REG); 644 mask1 = icu1_read(MSYSINT1REG);
664 645
665 pend2 = read_icu2(SYSINT2REG); 646 pend2 = icu2_read(SYSINT2REG);
666 mask2 = read_icu2(MSYSINT2REG); 647 mask2 = icu2_read(MSYSINT2REG);
667 648
668 mask1 &= pend1; 649 mask1 &= pend1;
669 mask2 &= pend2; 650 mask2 &= pend2;
670 651
671 if (mask1) { 652 if (mask1) {
672 for (i = 0; i < 16; i++) { 653 for (i = 0; i < 16; i++) {
673 if (intnum == sysint1_assign[i] && 654 if (irq == INT_TO_IRQ(sysint1_assign[i]) && (mask1 & (1 << i)))
674 (mask1 & ((uint16_t)1 << i))) { 655 return SYSINT1_IRQ(i);
675 if (i == 8)
676 giuint_irq_dispatch(regs);
677 else
678 do_IRQ(SYSINT1_IRQ(i), regs);
679 return;
680 }
681 } 656 }
682 } 657 }
683 658
684 if (mask2) { 659 if (mask2) {
685 for (i = 0; i < 16; i++) { 660 for (i = 0; i < 16; i++) {
686 if (intnum == sysint2_assign[i] && 661 if (irq == INT_TO_IRQ(sysint2_assign[i]) && (mask2 & (1 << i)))
687 (mask2 & ((uint16_t)1 << i))) { 662 return SYSINT2_IRQ(i);
688 do_IRQ(SYSINT2_IRQ(i), regs);
689 return;
690 }
691 } 663 }
692 } 664 }
693 665
694 printk(KERN_ERR "spurious ICU interrupt: %04x,%04x\n", pend1, pend2); 666 printk(KERN_ERR "spurious ICU interrupt: %04x,%04x\n", pend1, pend2);
695 667
696 atomic_inc(&irq_err_count); 668 atomic_inc(&irq_err_count);
697}
698 669
699/*=======================================================================*/ 670 return -1;
671}
700 672
701static int __init vr41xx_icu_init(void) 673static int __init vr41xx_icu_init(void)
702{ 674{
675 unsigned long icu1_start, icu2_start;
676 int i;
677
703 switch (current_cpu_data.cputype) { 678 switch (current_cpu_data.cputype) {
704 case CPU_VR4111: 679 case CPU_VR4111:
705 case CPU_VR4121: 680 case CPU_VR4121:
706 icu1_base = SYSINT1REG_TYPE1; 681 icu1_start = ICU1_TYPE1_BASE;
707 icu2_base = SYSINT2REG_TYPE1; 682 icu2_start = ICU2_TYPE1_BASE;
708 break; 683 break;
709 case CPU_VR4122: 684 case CPU_VR4122:
710 case CPU_VR4131: 685 case CPU_VR4131:
711 case CPU_VR4133: 686 case CPU_VR4133:
712 icu1_base = SYSINT1REG_TYPE2; 687 icu1_start = ICU1_TYPE2_BASE;
713 icu2_base = SYSINT2REG_TYPE2; 688 icu2_start = ICU2_TYPE2_BASE;
714 break; 689 break;
715 default: 690 default:
716 printk(KERN_ERR "ICU: Unexpected CPU of NEC VR4100 series\n"); 691 printk(KERN_ERR "ICU: Unexpected CPU of NEC VR4100 series\n");
717 return -EINVAL; 692 return -ENODEV;
718 } 693 }
719 694
720 write_icu1(0, MSYSINT1REG); 695 if (request_mem_region(icu1_start, ICU1_SIZE, "ICU") == NULL)
721 write_icu1(0xffff, MGIUINTLREG); 696 return -EBUSY;
722 697
723 write_icu2(0, MSYSINT2REG); 698 if (request_mem_region(icu2_start, ICU2_SIZE, "ICU") == NULL) {
724 write_icu2(0xffff, MGIUINTHREG); 699 release_mem_region(icu1_start, ICU1_SIZE);
700 return -EBUSY;
701 }
725 702
726 return 0; 703 icu1_base = ioremap(icu1_start, ICU1_SIZE);
727} 704 if (icu1_base == NULL) {
705 release_mem_region(icu1_start, ICU1_SIZE);
706 release_mem_region(icu2_start, ICU2_SIZE);
707 return -ENOMEM;
708 }
728 709
729early_initcall(vr41xx_icu_init); 710 icu2_base = ioremap(icu2_start, ICU2_SIZE);
711 if (icu2_base == NULL) {
712 iounmap(icu1_base);
713 release_mem_region(icu1_start, ICU1_SIZE);
714 release_mem_region(icu2_start, ICU2_SIZE);
715 return -ENOMEM;
716 }
730 717
731/*=======================================================================*/ 718 icu1_write(MSYSINT1REG, 0);
719 icu1_write(MGIUINTLREG, 0xffff);
732 720
733static inline void init_vr41xx_icu_irq(void) 721 icu2_write(MSYSINT2REG, 0);
734{ 722 icu2_write(MGIUINTHREG, 0xffff);
735 int i;
736 723
737 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) 724 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
738 irq_desc[i].handler = &sysint1_irq_type; 725 irq_desc[i].handler = &sysint1_irq_type;
@@ -740,18 +727,13 @@ static inline void init_vr41xx_icu_irq(void)
740 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) 727 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
741 irq_desc[i].handler = &sysint2_irq_type; 728 irq_desc[i].handler = &sysint2_irq_type;
742 729
743 setup_irq(INT0_CASCADE_IRQ, &icu_cascade); 730 cascade_irq(INT0_IRQ, icu_get_irq);
744 setup_irq(INT1_CASCADE_IRQ, &icu_cascade); 731 cascade_irq(INT1_IRQ, icu_get_irq);
745 setup_irq(INT2_CASCADE_IRQ, &icu_cascade); 732 cascade_irq(INT2_IRQ, icu_get_irq);
746 setup_irq(INT3_CASCADE_IRQ, &icu_cascade); 733 cascade_irq(INT3_IRQ, icu_get_irq);
747 setup_irq(INT4_CASCADE_IRQ, &icu_cascade); 734 cascade_irq(INT4_IRQ, icu_get_irq);
748}
749 735
750void __init arch_init_irq(void) 736 return 0;
751{
752 mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
753 init_vr41xx_icu_irq();
754 init_vr41xx_giuint_irq();
755
756 set_except_vector(0, vr41xx_handle_interrupt);
757} 737}
738
739core_initcall(vr41xx_icu_init);
diff --git a/arch/mips/vr41xx/common/int-handler.S b/arch/mips/vr41xx/common/int-handler.S
index 38ff89b505f2..272c13aee4fd 100644
--- a/arch/mips/vr41xx/common/int-handler.S
+++ b/arch/mips/vr41xx/common/int-handler.S
@@ -71,24 +71,24 @@
71 71
72 andi t1, t0, CAUSEF_IP3 # check for Int1 72 andi t1, t0, CAUSEF_IP3 # check for Int1
73 bnez t1, handle_int 73 bnez t1, handle_int
74 li a0, 1 74 li a0, 3
75 75
76 andi t1, t0, CAUSEF_IP4 # check for Int2 76 andi t1, t0, CAUSEF_IP4 # check for Int2
77 bnez t1, handle_int 77 bnez t1, handle_int
78 li a0, 2 78 li a0, 4
79 79
80 andi t1, t0, CAUSEF_IP5 # check for Int3 80 andi t1, t0, CAUSEF_IP5 # check for Int3
81 bnez t1, handle_int 81 bnez t1, handle_int
82 li a0, 3 82 li a0, 5
83 83
84 andi t1, t0, CAUSEF_IP6 # check for Int4 84 andi t1, t0, CAUSEF_IP6 # check for Int4
85 bnez t1, handle_int 85 bnez t1, handle_int
86 li a0, 4 86 li a0, 6
87 87
881: 881:
89 andi t1, t0, CAUSEF_IP2 # check for Int0 89 andi t1, t0, CAUSEF_IP2 # check for Int0
90 bnez t1, handle_int 90 bnez t1, handle_int
91 li a0, 0 91 li a0, 2
92 92
93 andi t1, t0, CAUSEF_IP0 # check for IP0 93 andi t1, t0, CAUSEF_IP0 # check for IP0
94 bnez t1, handle_irq 94 bnez t1, handle_irq
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
new file mode 100644
index 000000000000..43b214d39438
--- /dev/null
+++ b/arch/mips/vr41xx/common/irq.c
@@ -0,0 +1,94 @@
1/*
2 * Interrupt handing routines for NEC VR4100 series.
3 *
4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/interrupt.h>
21#include <linux/module.h>
22
23#include <asm/irq_cpu.h>
24#include <asm/system.h>
25#include <asm/vr41xx/vr41xx.h>
26
27typedef struct irq_cascade {
28 int (*get_irq)(unsigned int, struct pt_regs *);
29} irq_cascade_t;
30
31static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
32
33static struct irqaction cascade_irqaction = {
34 .handler = no_action,
35 .mask = CPU_MASK_NONE,
36 .name = "cascade",
37};
38
39int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *))
40{
41 int retval = 0;
42
43 if (irq >= NR_IRQS)
44 return -EINVAL;
45
46 if (irq_cascade[irq].get_irq != NULL)
47 free_irq(irq, NULL);
48
49 irq_cascade[irq].get_irq = get_irq;
50
51 if (get_irq != NULL) {
52 retval = setup_irq(irq, &cascade_irqaction);
53 if (retval < 0)
54 irq_cascade[irq].get_irq = NULL;
55 }
56
57 return retval;
58}
59
60EXPORT_SYMBOL_GPL(cascade_irq);
61
62asmlinkage void irq_dispatch(unsigned int irq, struct pt_regs *regs)
63{
64 irq_cascade_t *cascade;
65 irq_desc_t *desc;
66
67 if (irq >= NR_IRQS) {
68 atomic_inc(&irq_err_count);
69 return;
70 }
71
72 cascade = irq_cascade + irq;
73 if (cascade->get_irq != NULL) {
74 unsigned int source_irq = irq;
75 desc = irq_desc + source_irq;
76 desc->handler->ack(source_irq);
77 irq = cascade->get_irq(irq, regs);
78 if (irq < 0)
79 atomic_inc(&irq_err_count);
80 else
81 irq_dispatch(irq, regs);
82 desc->handler->end(source_irq);
83 } else
84 do_IRQ(irq, regs);
85}
86
87extern asmlinkage void vr41xx_handle_interrupt(void);
88
89void __init arch_init_irq(void)
90{
91 mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
92
93 set_except_vector(0, vr41xx_handle_interrupt);
94}
diff --git a/arch/mips/vr41xx/tanbac-tb0226/setup.c b/arch/mips/vr41xx/common/type.c
index 60027e5dea25..bcb5f71b5026 100644
--- a/arch/mips/vr41xx/tanbac-tb0226/setup.c
+++ b/arch/mips/vr41xx/common/type.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * setup.c, Setup for the TANBAC TB0226. 2 * type.c, System type for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 4 * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -20,5 +20,5 @@
20 20
21const char *get_system_type(void) 21const char *get_system_type(void)
22{ 22{
23 return "TANBAC TB0226"; 23 return "NEC VR4100 series";
24} 24}
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index 5475dd72e264..ba58764ef8ea 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -476,7 +476,7 @@ static inline int vrc4173_icu_init(int cascade_irq)
476 476
477 if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) 477 if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15))
478 return -EINVAL; 478 return -EINVAL;
479 479
480 vrc4173_outw(0, VRC4173_MSYSINT1REG); 480 vrc4173_outw(0, VRC4173_MSYSINT1REG);
481 481
482 vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH); 482 vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH);
diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c
index cff44602d3d4..e4b34ad6ea61 100644
--- a/arch/mips/vr41xx/ibm-workpad/setup.c
+++ b/arch/mips/vr41xx/ibm-workpad/setup.c
@@ -23,11 +23,6 @@
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/vr41xx/workpad.h> 24#include <asm/vr41xx/workpad.h>
25 25
26const char *get_system_type(void)
27{
28 return "IBM WorkPad z50";
29}
30
31static int __init ibm_workpad_setup(void) 26static int __init ibm_workpad_setup(void)
32{ 27{
33 set_io_port_base(IO_PORT_BASE); 28 set_io_port_base(IO_PORT_BASE);
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
index 87f06b3f5a9c..be590edb0b83 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/init.c
@@ -16,11 +16,6 @@
16 * Manish Lachwani (mlachwani@mvista.com) 16 * Manish Lachwani (mlachwani@mvista.com)
17 */ 17 */
18#include <linux/config.h> 18#include <linux/config.h>
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/string.h>
22
23#include <asm/bootinfo.h>
24 19
25#ifdef CONFIG_ROCKHOPPER 20#ifdef CONFIG_ROCKHOPPER
26#include <asm/io.h> 21#include <asm/io.h>
@@ -28,14 +23,7 @@
28 23
29#define PCICONFDREG 0xaf000c14 24#define PCICONFDREG 0xaf000c14
30#define PCICONFAREG 0xaf000c18 25#define PCICONFAREG 0xaf000c18
31#endif
32
33const char *get_system_type(void)
34{
35 return "NEC CMB-VR4133";
36}
37 26
38#ifdef CONFIG_ROCKHOPPER
39void disable_pcnet(void) 27void disable_pcnet(void)
40{ 28{
41 u32 data; 29 u32 data;
diff --git a/arch/mips/vr41xx/tanbac-tb0226/Makefile b/arch/mips/vr41xx/tanbac-tb0226/Makefile
deleted file mode 100644
index 372f953d240b..000000000000
--- a/arch/mips/vr41xx/tanbac-tb0226/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the TANBAC TB0226 specific parts of the kernel
3#
4
5obj-y += setup.o
diff --git a/arch/mips/vr41xx/tanbac-tb0229/Makefile b/arch/mips/vr41xx/tanbac-tb0229/Makefile
deleted file mode 100644
index 9c6b864ef2ef..000000000000
--- a/arch/mips/vr41xx/tanbac-tb0229/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the TANBAC TB0229(VR4131DIMM) specific parts of the kernel
3#
4
5obj-y := setup.o
diff --git a/arch/mips/vr41xx/tanbac-tb0229/setup.c b/arch/mips/vr41xx/tanbac-tb0229/setup.c
deleted file mode 100644
index 5c1b757bfb0c..000000000000
--- a/arch/mips/vr41xx/tanbac-tb0229/setup.c
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * setup.c, Setup for the TANBAC TB0229 (VR4131DIMM)
3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * Modified for TANBAC TB0229:
7 * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24const char *get_system_type(void)
25{
26 return "TANBAC TB0229";
27}
diff --git a/arch/mips/vr41xx/victor-mpc30x/Makefile b/arch/mips/vr41xx/victor-mpc30x/Makefile
deleted file mode 100644
index a2e8086a31a6..000000000000
--- a/arch/mips/vr41xx/victor-mpc30x/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the Victor MP-C303/304 specific parts of the kernel
3#
4
5obj-y += setup.o
diff --git a/arch/mips/vr41xx/victor-mpc30x/setup.c b/arch/mips/vr41xx/victor-mpc30x/setup.c
deleted file mode 100644
index f591e36726e6..000000000000
--- a/arch/mips/vr41xx/victor-mpc30x/setup.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * setup.c, Setup for the Victor MP-C303/304.
3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21const char *get_system_type(void)
22{
23 return "Victor MP-C303/304";
24}
diff --git a/arch/mips/vr41xx/zao-capcella/Makefile b/arch/mips/vr41xx/zao-capcella/Makefile
deleted file mode 100644
index cf420197cd23..000000000000
--- a/arch/mips/vr41xx/zao-capcella/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the ZAO Networks Capcella specific parts of the kernel
3#
4
5obj-y += setup.o
diff --git a/arch/mips/vr41xx/zao-capcella/setup.c b/arch/mips/vr41xx/zao-capcella/setup.c
deleted file mode 100644
index 17bade241fe2..000000000000
--- a/arch/mips/vr41xx/zao-capcella/setup.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * setup.c, Setup for the ZAO Networks Capcella.
3 *
4 * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21const char *get_system_type(void)
22{
23 return "ZAO Networks Capcella";
24}
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index e6fa1d1cc03a..36dee0ff5ca0 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -330,14 +330,6 @@ config RPXLITE
330 End of life: end 2000 ? 330 End of life: end 2000 ?
331 URL: see TQM850L 331 URL: see TQM850L
332 332
333 SPD823TS:
334 MPC823 based board used in the "Tele Server" product
335 Manufacturer: Speech Design, <http://www.speech-design.de/>
336 Date of Release: Mid 2000 (?)
337 End of life: -
338 URL: <http://www.speech-design.de/>
339 select "English", then "Teleteam Solutions", then "TeleServer"
340
341 IVMS8: 333 IVMS8:
342 MPC860 based board used in the "Integrated Voice Mail System", 334 MPC860 based board used in the "Integrated Voice Mail System",
343 Small Version (8 voice channels) 335 Small Version (8 voice channels)
@@ -354,13 +346,6 @@ config RPXLITE
354 End of life: - 346 End of life: -
355 URL: <http://www.speech-design.de/> 347 URL: <http://www.speech-design.de/>
356 348
357 SM850:
358 Service Module (based on TQM850L)
359 Manufacturer: Dependable Computer Systems, <http://www.decomsys.com/>
360 Date of Release: end 2000 (?)
361 End of life: mid 2001 (?)
362 URL: <http://www.tz-mikroelektronik.de/ServiceModule/index.html>
363
364 HERMES: 349 HERMES:
365 Hermes-Pro ISDN/LAN router with integrated 8 x hub 350 Hermes-Pro ISDN/LAN router with integrated 8 x hub
366 Manufacturer: Multidata Gesellschaft fur Datentechnik und Informatik 351 Manufacturer: Multidata Gesellschaft fur Datentechnik und Informatik
@@ -464,13 +449,6 @@ config TQM860L
464config FPS850L 449config FPS850L
465 bool "FPS850L" 450 bool "FPS850L"
466 451
467config SPD823TS
468 bool "SPD823TS"
469 help
470 Say Y here to support the Speech Design 823 Tele-Server from Speech
471 Design, released in 2000. The manufacturer's website is at
472 <http://www.speech-design.de/>.
473
474config IVMS8 452config IVMS8
475 bool "IVMS8" 453 bool "IVMS8"
476 help 454 help
@@ -485,14 +463,6 @@ config IVML24
485 from Speech Design, released March 2001. The manufacturer's website 463 from Speech Design, released March 2001. The manufacturer's website
486 is at <http://www.speech-design.de/>. 464 is at <http://www.speech-design.de/>.
487 465
488config SM850
489 bool "SM850"
490 help
491 Say Y here to support the Service Module 850 from Dependable
492 Computer Systems, an SBC based on the TQM850L module by TQ
493 Components. This board is no longer in production. The
494 manufacturer's website is at <http://www.decomsys.com/>.
495
496config HERMES_PRO 466config HERMES_PRO
497 bool "HERMES" 467 bool "HERMES"
498 468
@@ -525,6 +495,11 @@ config WINCEPT
525 MPC821 PowerPC, introduced in 1998 and designed to be used in 495 MPC821 PowerPC, introduced in 1998 and designed to be used in
526 thin-client machines. Say Y to support it directly. 496 thin-client machines. Say Y to support it directly.
527 497
498 Be aware that PCI buses can only function when SYS board is plugged
499 into the PIB (Platform IO Board) board from Freescale which provide
500 3 PCI slots. The PIBs PCI initialization is the bootloader's
501 responsiblilty.
502
528endchoice 503endchoice
529 504
530choice 505choice
@@ -578,9 +553,6 @@ config CPCI690
578 help 553 help
579 Select CPCI690 if configuring a Force CPCI690 cPCI board. 554 Select CPCI690 if configuring a Force CPCI690 cPCI board.
580 555
581config PCORE
582 bool "Force-PowerCore"
583
584config POWERPMC250 556config POWERPMC250
585 bool "Force-PowerPMC250" 557 bool "Force-PowerPMC250"
586 558
@@ -613,9 +585,6 @@ config EV64260
613config LOPEC 585config LOPEC
614 bool "Motorola-LoPEC" 586 bool "Motorola-LoPEC"
615 587
616config MCPN765
617 bool "Motorola-MCPN765"
618
619config MVME5100 588config MVME5100
620 bool "Motorola-MVME5100" 589 bool "Motorola-MVME5100"
621 590
@@ -637,12 +606,6 @@ config SANDPOINT
637config RADSTONE_PPC7D 606config RADSTONE_PPC7D
638 bool "Radstone Technology PPC7D board" 607 bool "Radstone Technology PPC7D board"
639 608
640config ADIR
641 bool "SBS-Adirondack"
642
643config K2
644 bool "SBS-K2"
645
646config PAL4 609config PAL4
647 bool "SBS-Palomar4" 610 bool "SBS-Palomar4"
648 611
@@ -713,6 +676,11 @@ config MPC834x_SYS
713 help 676 help
714 This option enables support for the MPC 834x SYS evaluation board. 677 This option enables support for the MPC 834x SYS evaluation board.
715 678
679config EV64360
680 bool "Marvell-EV64360BP"
681 help
682 Select EV64360 if configuring a Marvell EV64360BP Evaluation
683 platform.
716endchoice 684endchoice
717 685
718config PQ2ADS 686config PQ2ADS
@@ -722,7 +690,7 @@ config PQ2ADS
722 690
723config TQM8xxL 691config TQM8xxL
724 bool 692 bool
725 depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L || SM850) 693 depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
726 default y 694 default y
727 695
728config EMBEDDEDBOOT 696config EMBEDDEDBOOT
@@ -796,15 +764,15 @@ config PPC_OF
796 764
797config PPC_GEN550 765config PPC_GEN550
798 bool 766 bool
799 depends on SANDPOINT || MCPN765 || SPRUCE || PPLUS || PCORE || \ 767 depends on SANDPOINT || SPRUCE || PPLUS || \
800 PRPMC750 || K2 || PRPMC800 || LOPEC || \ 768 PRPMC750 || PRPMC800 || LOPEC || \
801 (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \ 769 (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \
802 83xx 770 83xx
803 default y 771 default y
804 772
805config FORCE 773config FORCE
806 bool 774 bool
807 depends on 6xx && (PCORE || POWERPMC250) 775 depends on 6xx && POWERPMC250
808 default y 776 default y
809 777
810config GT64260 778config GT64260
@@ -814,7 +782,7 @@ config GT64260
814 782
815config MV64360 # Really MV64360 & MV64460 783config MV64360 # Really MV64360 & MV64460
816 bool 784 bool
817 depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU 785 depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU || EV64360
818 default y 786 default y
819 787
820config MV64X60 788config MV64X60
@@ -867,7 +835,7 @@ config EPIC_SERIAL_MODE
867 835
868config MPC10X_BRIDGE 836config MPC10X_BRIDGE
869 bool 837 bool
870 depends on PCORE || POWERPMC250 || LOPEC || SANDPOINT 838 depends on POWERPMC250 || LOPEC || SANDPOINT
871 default y 839 default y
872 840
873config MPC10X_OPENPIC 841config MPC10X_OPENPIC
@@ -886,10 +854,6 @@ config SANDPOINT_ENABLE_UART1
886 If this option is enabled then the MPC824x processor will run 854 If this option is enabled then the MPC824x processor will run
887 in DUART mode instead of UART mode. 855 in DUART mode instead of UART mode.
888 856
889config CPC710_DATA_GATHERING
890 bool "Enable CPC710 data gathering"
891 depends on K2
892
893config HARRIER_STORE_GATHERING 857config HARRIER_STORE_GATHERING
894 bool "Enable Harrier store gathering" 858 bool "Enable Harrier store gathering"
895 depends on HARRIER 859 depends on HARRIER
@@ -1194,6 +1158,11 @@ config PCI_DOMAINS
1194 bool 1158 bool
1195 default PCI 1159 default PCI
1196 1160
1161config MPC83xx_PCI2
1162 bool " Supprt for 2nd PCI host controller"
1163 depends on PCI && MPC834x
1164 default y if MPC834x_SYS
1165
1197config PCI_QSPAN 1166config PCI_QSPAN
1198 bool "QSpan PCI" 1167 bool "QSpan PCI"
1199 depends on !4xx && !CPM2 && 8xx 1168 depends on !4xx && !CPM2 && 8xx
diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug
index e16c7710d4be..61653cb60c4e 100644
--- a/arch/ppc/Kconfig.debug
+++ b/arch/ppc/Kconfig.debug
@@ -62,7 +62,8 @@ config BOOTX_TEXT
62 62
63config SERIAL_TEXT_DEBUG 63config SERIAL_TEXT_DEBUG
64 bool "Support for early boot texts over serial port" 64 bool "Support for early boot texts over serial port"
65 depends on 4xx || GT64260 || LOPEC || PPLUS || PRPMC800 || PPC_GEN550 || PPC_MPC52xx 65 depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \
66 PPC_GEN550 || PPC_MPC52xx
66 67
67config PPC_OCP 68config PPC_OCP
68 bool 69 bool
diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile
index d4dc4fa79647..b7bd8f61a4ad 100644
--- a/arch/ppc/boot/simple/Makefile
+++ b/arch/ppc/boot/simple/Makefile
@@ -96,10 +96,6 @@ zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
96zimageinitrd-$(CONFIG_GEMINI) := zImage.initrd-STRIPELF 96zimageinitrd-$(CONFIG_GEMINI) := zImage.initrd-STRIPELF
97 end-$(CONFIG_GEMINI) := gemini 97 end-$(CONFIG_GEMINI) := gemini
98 98
99 extra.o-$(CONFIG_K2) := prepmap.o
100 end-$(CONFIG_K2) := k2
101 cacheflag-$(CONFIG_K2) := -include $(clear_L2_L3)
102
103 extra.o-$(CONFIG_KATANA) := misc-katana.o 99 extra.o-$(CONFIG_KATANA) := misc-katana.o
104 end-$(CONFIG_KATANA) := katana 100 end-$(CONFIG_KATANA) := katana
105 cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3) 101 cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3)
@@ -108,12 +104,15 @@ zimageinitrd-$(CONFIG_GEMINI) := zImage.initrd-STRIPELF
108 end-$(CONFIG_RADSTONE_PPC7D) := radstone_ppc7d 104 end-$(CONFIG_RADSTONE_PPC7D) := radstone_ppc7d
109 cacheflag-$(CONFIG_RADSTONE_PPC7D) := -include $(clear_L2_L3) 105 cacheflag-$(CONFIG_RADSTONE_PPC7D) := -include $(clear_L2_L3)
110 106
107 extra.o-$(CONFIG_EV64360) := misc-ev64360.o
108 end-$(CONFIG_EV64360) := ev64360
109 cacheflag-$(CONFIG_EV64360) := -include $(clear_L2_L3)
110
111# kconfig 'feature', only one of these will ever be 'y' at a time. 111# kconfig 'feature', only one of these will ever be 'y' at a time.
112# The rest will be unset. 112# The rest will be unset.
113motorola := $(CONFIG_MCPN765)$(CONFIG_MVME5100)$(CONFIG_PRPMC750) \ 113motorola := $(CONFIG_MVME5100)$(CONFIG_PRPMC750) \
114$(CONFIG_PRPMC800)$(CONFIG_LOPEC)$(CONFIG_PPLUS) 114$(CONFIG_PRPMC800)$(CONFIG_LOPEC)$(CONFIG_PPLUS)
115motorola := $(strip $(motorola)) 115motorola := $(strip $(motorola))
116pcore := $(CONFIG_PCORE)$(CONFIG_POWERPMC250)
117 116
118 zimage-$(motorola) := zImage-PPLUS 117 zimage-$(motorola) := zImage-PPLUS
119zimageinitrd-$(motorola) := zImage.initrd-PPLUS 118zimageinitrd-$(motorola) := zImage.initrd-PPLUS
@@ -123,12 +122,6 @@ zimageinitrd-$(motorola) := zImage.initrd-PPLUS
123 extra.o-$(CONFIG_PPLUS) := prepmap.o 122 extra.o-$(CONFIG_PPLUS) := prepmap.o
124 extra.o-$(CONFIG_LOPEC) := mpc10x_memory.o 123 extra.o-$(CONFIG_LOPEC) := mpc10x_memory.o
125 124
126 zimage-$(pcore) := zImage-STRIPELF
127zimageinitrd-$(pcore) := zImage.initrd-STRIPELF
128 extra.o-$(pcore) := chrpmap.o
129 end-$(pcore) := pcore
130 cacheflag-$(pcore) := -include $(clear_L2_L3)
131
132# Really only valid if CONFIG_6xx=y 125# Really only valid if CONFIG_6xx=y
133 zimage-$(CONFIG_PPC_PREP) := zImage-PPLUS 126 zimage-$(CONFIG_PPC_PREP) := zImage-PPLUS
134zimageinitrd-$(CONFIG_PPC_PREP) := zImage.initrd-PPLUS 127zimageinitrd-$(CONFIG_PPC_PREP) := zImage.initrd-PPLUS
@@ -158,8 +151,6 @@ zimageinitrd-$(CONFIG_LITE5200) := zImage.initrd-STRIPELF
158 151
159# This is a treeboot that needs init functions until the 152# This is a treeboot that needs init functions until the
160# boot rom is sorted out (i.e. this is short lived) 153# boot rom is sorted out (i.e. this is short lived)
161extra-aflags-$(CONFIG_REDWOOD_4) := -Wa,-m405
162extra.o-$(CONFIG_REDWOOD_4) := rw4/rw4_init.o rw4/rw4_init_brd.o
163EXTRA_AFLAGS := $(extra-aflags-y) 154EXTRA_AFLAGS := $(extra-aflags-y)
164# head.o needs to get the cacheflags defined. 155# head.o needs to get the cacheflags defined.
165AFLAGS_head.o += $(cacheflag-y) 156AFLAGS_head.o += $(cacheflag-y)
diff --git a/arch/ppc/boot/simple/embed_config.c b/arch/ppc/boot/simple/embed_config.c
index c342b47e763e..491a691d10cc 100644
--- a/arch/ppc/boot/simple/embed_config.c
+++ b/arch/ppc/boot/simple/embed_config.c
@@ -784,28 +784,12 @@ embed_config(bd_t ** bdp)
784#ifdef CONFIG_IBM_OPENBIOS 784#ifdef CONFIG_IBM_OPENBIOS
785/* This could possibly work for all treeboot roms. 785/* This could possibly work for all treeboot roms.
786*/ 786*/
787#if defined(CONFIG_ASH) || defined(CONFIG_BEECH) || defined(CONFIG_BUBINGA) 787#if defined(CONFIG_BUBINGA)
788#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */ 788#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
789#else 789#else
790#define BOARD_INFO_VECTOR 0xFFFE0B50 790#define BOARD_INFO_VECTOR 0xFFFE0B50
791#endif 791#endif
792 792
793#ifdef CONFIG_BEECH
794static void
795get_board_info(bd_t **bdp)
796{
797 typedef void (*PFV)(bd_t *bd);
798 ((PFV)(*(unsigned long *)BOARD_INFO_VECTOR))(*bdp);
799 return;
800}
801
802void
803embed_config(bd_t **bdp)
804{
805 *bdp = &bdinfo;
806 get_board_info(bdp);
807}
808#else /* !CONFIG_BEECH */
809void 793void
810embed_config(bd_t **bdp) 794embed_config(bd_t **bdp)
811{ 795{
@@ -860,7 +844,6 @@ embed_config(bd_t **bdp)
860#endif 844#endif
861 timebase_period_ns = 1000000000 / bd->bi_tbfreq; 845 timebase_period_ns = 1000000000 / bd->bi_tbfreq;
862} 846}
863#endif /* CONFIG_BEECH */
864#endif /* CONFIG_IBM_OPENBIOS */ 847#endif /* CONFIG_IBM_OPENBIOS */
865 848
866#ifdef CONFIG_EP405 849#ifdef CONFIG_EP405
@@ -943,39 +926,3 @@ embed_config(bd_t **bdp)
943#endif 926#endif
944} 927}
945#endif 928#endif
946
947#ifdef CONFIG_RAINIER
948/* Rainier uses vxworks bootrom */
949void
950embed_config(bd_t **bdp)
951{
952 u_char *cp;
953 int i;
954 bd_t *bd;
955
956 bd = &bdinfo;
957 *bdp = bd;
958
959 for(i=0;i<8192;i+=32) {
960 __asm__("dccci 0,%0" :: "r" (i));
961 }
962 __asm__("iccci 0,0");
963 __asm__("sync;isync");
964
965 /* init ram for parity */
966 memset(0, 0,0x400000); /* Lo memory */
967
968
969 bd->bi_memsize = (32 * 1024 * 1024) ;
970 bd->bi_intfreq = 133000000; //the internal clock is 133 MHz
971 bd->bi_busfreq = 100000000;
972 bd->bi_pci_busfreq= 33000000;
973
974 cp = (u_char *)def_enet_addr;
975 for (i=0; i<6; i++) {
976 bd->bi_enetaddr[i] = *cp++;
977 }
978
979}
980#endif
981
diff --git a/arch/ppc/boot/simple/head.S b/arch/ppc/boot/simple/head.S
index 524053202bb4..5e4adc298bf9 100644
--- a/arch/ppc/boot/simple/head.S
+++ b/arch/ppc/boot/simple/head.S
@@ -120,15 +120,6 @@ haveOF:
120 mtspr SPRN_DER,r4 120 mtspr SPRN_DER,r4
121#endif 121#endif
122 122
123#ifdef CONFIG_REDWOOD_4
124 /* All of this Redwood 4 stuff will soon disappear when the
125 * boot rom is straightened out.
126 */
127 mr r29, r3 /* Easier than changing the other code */
128 bl HdwInit
129 mr r3, r29
130#endif
131
132#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP) 123#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
133 mr r4,r29 /* put the board info pointer where the relocate 124 mr r4,r29 /* put the board info pointer where the relocate
134 * routine will find it 125 * routine will find it
diff --git a/arch/ppc/boot/simple/misc-cpci690.c b/arch/ppc/boot/simple/misc-cpci690.c
index ef08e86c9b25..26860300fa09 100644
--- a/arch/ppc/boot/simple/misc-cpci690.c
+++ b/arch/ppc/boot/simple/misc-cpci690.c
@@ -12,16 +12,56 @@
12 */ 12 */
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <asm/io.h>
15#include <platforms/cpci690.h> 16#include <platforms/cpci690.h>
16 17
18#define KB (1024UL)
19#define MB (1024UL*KB)
20#define GB (1024UL*MB)
21
17extern u32 mv64x60_console_baud; 22extern u32 mv64x60_console_baud;
18extern u32 mv64x60_mpsc_clk_src; 23extern u32 mv64x60_mpsc_clk_src;
19extern u32 mv64x60_mpsc_clk_freq; 24extern u32 mv64x60_mpsc_clk_freq;
20 25
26u32 mag = 0xffff;
27
28unsigned long
29get_mem_size(void)
30{
31 u32 size;
32
33 switch (in_8(((void __iomem *)CPCI690_BR_BASE + CPCI690_BR_MEM_CTLR))
34 & 0x07) {
35 case 0x01:
36 size = 256*MB;
37 break;
38 case 0x02:
39 size = 512*MB;
40 break;
41 case 0x03:
42 size = 768*MB;
43 break;
44 case 0x04:
45 size = 1*GB;
46 break;
47 case 0x05:
48 size = 1*GB + 512*MB;
49 break;
50 case 0x06:
51 size = 2*GB;
52 break;
53 default:
54 size = 0;
55 }
56
57 return size;
58}
59
21void 60void
22mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) 61mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
23{ 62{
24 mv64x60_console_baud = CPCI690_MPSC_BAUD; 63 mv64x60_console_baud = CPCI690_MPSC_BAUD;
25 mv64x60_mpsc_clk_src = CPCI690_MPSC_CLK_SRC; 64 mv64x60_mpsc_clk_src = CPCI690_MPSC_CLK_SRC;
26 mv64x60_mpsc_clk_freq = CPCI690_BUS_FREQ; 65 mv64x60_mpsc_clk_freq =
66 (get_mem_size() >= (1*GB)) ? 100000000 : 133333333;
27} 67}
diff --git a/arch/ppc/boot/simple/misc-ev64360.c b/arch/ppc/boot/simple/misc-ev64360.c
new file mode 100644
index 000000000000..cd1ccf2a1582
--- /dev/null
+++ b/arch/ppc/boot/simple/misc-ev64360.c
@@ -0,0 +1,44 @@
1/*
2 * arch/ppc/boot/simple/misc-ev64360.c
3 * Copyright (C) 2005 Lee Nicks <allinux@gmail.com>
4 *
5 * Based on arch/ppc/boot/simple/misc-katana.c from:
6 * Mark A. Greer <source@mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23#include <linux/config.h>
24#include <linux/types.h>
25#include <asm/io.h>
26#include <asm/mv64x60_defs.h>
27#include <platforms/ev64360.h>
28
29extern u32 mv64x60_console_baud;
30extern u32 mv64x60_mpsc_clk_src;
31extern u32 mv64x60_mpsc_clk_freq;
32
33/* Not in the kernel so won't include kernel.h to get its 'min' definition */
34#ifndef min
35#define min(a,b) (((a) < (b)) ? (a) : (b))
36#endif
37
38void
39mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
40{
41 mv64x60_console_baud = EV64360_DEFAULT_BAUD;
42 mv64x60_mpsc_clk_src = EV64360_MPSC_CLK_SRC;
43 mv64x60_mpsc_clk_freq = EV64360_MPSC_CLK_FREQ;
44}
diff --git a/arch/ppc/boot/simple/misc-katana.c b/arch/ppc/boot/simple/misc-katana.c
index b6e1bb833157..ec94a11bacac 100644
--- a/arch/ppc/boot/simple/misc-katana.c
+++ b/arch/ppc/boot/simple/misc-katana.c
@@ -26,6 +26,8 @@ extern u32 mv64x60_mpsc_clk_freq;
26#define min(a,b) (((a) < (b)) ? (a) : (b)) 26#define min(a,b) (((a) < (b)) ? (a) : (b))
27#endif 27#endif
28 28
29unsigned long mv64360_get_mem_size(void);
30
29void 31void
30mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) 32mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
31{ 33{
@@ -35,3 +37,9 @@ mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
35 min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE), 37 min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE),
36 MV64x60_TCLK_FREQ_MAX); 38 MV64x60_TCLK_FREQ_MAX);
37} 39}
40
41unsigned long
42get_mem_size(void)
43{
44 return mv64360_get_mem_size();
45}
diff --git a/arch/ppc/boot/simple/misc-mv64x60.c b/arch/ppc/boot/simple/misc-mv64x60.c
index 7e88fc6d207d..258d4599fadc 100644
--- a/arch/ppc/boot/simple/misc-mv64x60.c
+++ b/arch/ppc/boot/simple/misc-mv64x60.c
@@ -19,6 +19,33 @@
19extern struct bi_record *decompress_kernel(unsigned long load_addr, 19extern struct bi_record *decompress_kernel(unsigned long load_addr,
20 int num_words, unsigned long cksum); 20 int num_words, unsigned long cksum);
21 21
22
23u32 size_reg[MV64x60_CPU2MEM_WINDOWS] = {
24 MV64x60_CPU2MEM_0_SIZE, MV64x60_CPU2MEM_1_SIZE,
25 MV64x60_CPU2MEM_2_SIZE, MV64x60_CPU2MEM_3_SIZE
26};
27
28/* Read mem ctlr to get the amount of mem in system */
29unsigned long
30mv64360_get_mem_size(void)
31{
32 u32 enables, i, v;
33 u32 mem = 0;
34
35 enables = in_le32((void __iomem *)CONFIG_MV64X60_NEW_BASE +
36 MV64360_CPU_BAR_ENABLE) & 0xf;
37
38 for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++)
39 if (!(enables & (1<<i))) {
40 v = in_le32((void __iomem *)CONFIG_MV64X60_NEW_BASE
41 + size_reg[i]) & 0xffff;
42 v = (v + 1) << 16;
43 mem += v;
44 }
45
46 return mem;
47}
48
22void 49void
23mv64x60_move_base(void __iomem *old_base, void __iomem *new_base) 50mv64x60_move_base(void __iomem *old_base, void __iomem *new_base)
24{ 51{
diff --git a/arch/ppc/boot/simple/mv64x60_tty.c b/arch/ppc/boot/simple/mv64x60_tty.c
index 5b45eb46b669..b9c24d4c738b 100644
--- a/arch/ppc/boot/simple/mv64x60_tty.c
+++ b/arch/ppc/boot/simple/mv64x60_tty.c
@@ -22,9 +22,16 @@
22#include <asm/mv64x60_defs.h> 22#include <asm/mv64x60_defs.h>
23#include <mpsc_defs.h> 23#include <mpsc_defs.h>
24 24
25#ifdef CONFIG_EV64360
26#include <platforms/ev64360.h>
27u32 mv64x60_console_baud = EV64360_DEFAULT_BAUD;
28u32 mv64x60_mpsc_clk_src = EV64360_MPSC_CLK_SRC; /* TCLK */
29u32 mv64x60_mpsc_clk_freq = EV64360_MPSC_CLK_FREQ;
30#else
25u32 mv64x60_console_baud = 9600; 31u32 mv64x60_console_baud = 9600;
26u32 mv64x60_mpsc_clk_src = 8; /* TCLK */ 32u32 mv64x60_mpsc_clk_src = 8; /* TCLK */
27u32 mv64x60_mpsc_clk_freq = 100000000; 33u32 mv64x60_mpsc_clk_freq = 100000000;
34#endif
28 35
29extern void udelay(long); 36extern void udelay(long);
30static void stop_dma(int chan); 37static void stop_dma(int chan);
diff --git a/arch/ppc/configs/SM850_defconfig b/arch/ppc/configs/SM850_defconfig
deleted file mode 100644
index 021884b43029..000000000000
--- a/arch/ppc/configs/SM850_defconfig
+++ /dev/null
@@ -1,522 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16CONFIG_SWAP=y
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21CONFIG_EMBEDDED=y
22CONFIG_FUTEX=y
23# CONFIG_EPOLL is not set
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y
30# CONFIG_MODULE_FORCE_UNLOAD is not set
31CONFIG_OBSOLETE_MODPARM=y
32# CONFIG_MODVERSIONS is not set
33CONFIG_KMOD=y
34
35#
36# Platform support
37#
38CONFIG_PPC=y
39CONFIG_PPC32=y
40# CONFIG_6xx is not set
41# CONFIG_40x is not set
42# CONFIG_POWER3 is not set
43CONFIG_8xx=y
44
45#
46# IBM 4xx options
47#
48CONFIG_EMBEDDEDBOOT=y
49CONFIG_SERIAL_CONSOLE=y
50CONFIG_NOT_COHERENT_CACHE=y
51# CONFIG_RPXLITE is not set
52# CONFIG_RPXCLASSIC is not set
53# CONFIG_BSEIP is not set
54# CONFIG_FADS is not set
55# CONFIG_TQM823L is not set
56# CONFIG_TQM850L is not set
57# CONFIG_TQM855L is not set
58# CONFIG_TQM860L is not set
59# CONFIG_FPS850L is not set
60# CONFIG_SPD823TS is not set
61# CONFIG_IVMS8 is not set
62# CONFIG_IVML24 is not set
63CONFIG_SM850=y
64# CONFIG_HERMES_PRO is not set
65# CONFIG_IP860 is not set
66# CONFIG_LWMON is not set
67# CONFIG_PCU_E is not set
68# CONFIG_CCM is not set
69# CONFIG_LANTEC is not set
70# CONFIG_MBX is not set
71# CONFIG_WINCEPT is not set
72CONFIG_TQM8xxL=y
73# CONFIG_SMP is not set
74# CONFIG_PREEMPT is not set
75CONFIG_MATH_EMULATION=y
76# CONFIG_CPU_FREQ is not set
77
78#
79# General setup
80#
81# CONFIG_HIGHMEM is not set
82# CONFIG_PCI is not set
83# CONFIG_PCI_DOMAINS is not set
84# CONFIG_PCI_QSPAN is not set
85CONFIG_KCORE_ELF=y
86CONFIG_BINFMT_ELF=y
87CONFIG_KERNEL_ELF=y
88# CONFIG_BINFMT_MISC is not set
89# CONFIG_HOTPLUG is not set
90
91#
92# Parallel port support
93#
94# CONFIG_PARPORT is not set
95CONFIG_CMDLINE_BOOL=y
96CONFIG_CMDLINE="console=ttyCPM1"
97
98#
99# Advanced setup
100#
101# CONFIG_ADVANCED_OPTIONS is not set
102
103#
104# Default settings for advanced configuration options are used
105#
106CONFIG_HIGHMEM_START=0xfe000000
107CONFIG_LOWMEM_SIZE=0x30000000
108CONFIG_KERNEL_START=0xc0000000
109CONFIG_TASK_SIZE=0x80000000
110CONFIG_BOOT_LOAD=0x00400000
111
112#
113# Memory Technology Devices (MTD)
114#
115# CONFIG_MTD is not set
116
117#
118# Plug and Play support
119#
120# CONFIG_PNP is not set
121
122#
123# Block devices
124#
125# CONFIG_BLK_DEV_FD is not set
126# CONFIG_BLK_DEV_LOOP is not set
127# CONFIG_BLK_DEV_NBD is not set
128# CONFIG_BLK_DEV_RAM is not set
129# CONFIG_BLK_DEV_INITRD is not set
130
131#
132# Multi-device support (RAID and LVM)
133#
134# CONFIG_MD is not set
135
136#
137# ATA/IDE/MFM/RLL support
138#
139# CONFIG_IDE is not set
140
141#
142# SCSI support
143#
144# CONFIG_SCSI is not set
145
146#
147# Fusion MPT device support
148#
149
150#
151# I2O device support
152#
153
154#
155# Networking support
156#
157CONFIG_NET=y
158
159#
160# Networking options
161#
162CONFIG_PACKET=y
163# CONFIG_PACKET_MMAP is not set
164# CONFIG_NETLINK_DEV is not set
165# CONFIG_NETFILTER is not set
166CONFIG_UNIX=y
167# CONFIG_NET_KEY is not set
168CONFIG_INET=y
169# CONFIG_IP_MULTICAST is not set
170# CONFIG_IP_ADVANCED_ROUTER is not set
171CONFIG_IP_PNP=y
172CONFIG_IP_PNP_DHCP=y
173# CONFIG_IP_PNP_BOOTP is not set
174# CONFIG_IP_PNP_RARP is not set
175# CONFIG_NET_IPIP is not set
176# CONFIG_NET_IPGRE is not set
177# CONFIG_ARPD is not set
178# CONFIG_INET_ECN is not set
179# CONFIG_SYN_COOKIES is not set
180# CONFIG_INET_AH is not set
181# CONFIG_INET_ESP is not set
182# CONFIG_INET_IPCOMP is not set
183# CONFIG_IPV6 is not set
184# CONFIG_XFRM_USER is not set
185
186#
187# SCTP Configuration (EXPERIMENTAL)
188#
189CONFIG_IPV6_SCTP__=y
190# CONFIG_IP_SCTP is not set
191# CONFIG_ATM is not set
192# CONFIG_VLAN_8021Q is not set
193# CONFIG_LLC is not set
194# CONFIG_DECNET is not set
195# CONFIG_BRIDGE is not set
196# CONFIG_X25 is not set
197# CONFIG_LAPB is not set
198# CONFIG_NET_DIVERT is not set
199# CONFIG_ECONET is not set
200# CONFIG_WAN_ROUTER is not set
201# CONFIG_NET_HW_FLOWCONTROL is not set
202
203#
204# QoS and/or fair queueing
205#
206# CONFIG_NET_SCHED is not set
207
208#
209# Network testing
210#
211# CONFIG_NET_PKTGEN is not set
212CONFIG_NETDEVICES=y
213# CONFIG_DUMMY is not set
214# CONFIG_BONDING is not set
215# CONFIG_EQUALIZER is not set
216# CONFIG_TUN is not set
217# CONFIG_ETHERTAP is not set
218
219#
220# Ethernet (10 or 100Mbit)
221#
222CONFIG_NET_ETHERNET=y
223# CONFIG_MII is not set
224# CONFIG_OAKNET is not set
225
226#
227# Ethernet (1000 Mbit)
228#
229
230#
231# Ethernet (10000 Mbit)
232#
233# CONFIG_PPP is not set
234# CONFIG_SLIP is not set
235
236#
237# Wireless LAN (non-hamradio)
238#
239# CONFIG_NET_RADIO is not set
240
241#
242# Token Ring devices (depends on LLC=y)
243#
244# CONFIG_SHAPER is not set
245
246#
247# Wan interfaces
248#
249# CONFIG_WAN is not set
250
251#
252# Amateur Radio support
253#
254# CONFIG_HAMRADIO is not set
255
256#
257# IrDA (infrared) support
258#
259# CONFIG_IRDA is not set
260
261#
262# ISDN subsystem
263#
264# CONFIG_ISDN_BOOL is not set
265
266#
267# Graphics support
268#
269# CONFIG_FB is not set
270
271#
272# Old CD-ROM drivers (not SCSI, not IDE)
273#
274# CONFIG_CD_NO_IDESCSI is not set
275
276#
277# Input device support
278#
279# CONFIG_INPUT is not set
280
281#
282# Userland interfaces
283#
284
285#
286# Input I/O drivers
287#
288# CONFIG_GAMEPORT is not set
289CONFIG_SOUND_GAMEPORT=y
290# CONFIG_SERIO is not set
291
292#
293# Input Device Drivers
294#
295
296#
297# Macintosh device drivers
298#
299
300#
301# Serial drivers
302#
303# CONFIG_SERIAL_8250 is not set
304
305#
306# Non-8250 serial port support
307#
308CONFIG_SERIAL_CORE=y
309CONFIG_SERIAL_CORE_CONSOLE=y
310CONFIG_SERIAL_CPM=y
311CONFIG_SERIAL_CPM_CONSOLE=y
312# CONFIG_SERIAL_CPM_SCC1 is not set
313# CONFIG_SERIAL_CPM_SCC2 is not set
314# CONFIG_SERIAL_CPM_SCC3 is not set
315# CONFIG_SERIAL_CPM_SCC4 is not set
316CONFIG_SERIAL_CPM_SMC1=y
317CONFIG_SERIAL_CPM_SMC2=y
318CONFIG_SERIAL_CPM_ALT_SMC2=y
319CONFIG_UNIX98_PTYS=y
320# CONFIG_LEGACY_PTYS is not set
321
322#
323# I2C support
324#
325# CONFIG_I2C is not set
326
327#
328# I2C Hardware Sensors Mainboard support
329#
330
331#
332# I2C Hardware Sensors Chip support
333#
334# CONFIG_I2C_SENSOR is not set
335
336#
337# Mice
338#
339# CONFIG_BUSMOUSE is not set
340# CONFIG_QIC02_TAPE is not set
341
342#
343# IPMI
344#
345# CONFIG_IPMI_HANDLER is not set
346
347#
348# Watchdog Cards
349#
350# CONFIG_WATCHDOG is not set
351# CONFIG_NVRAM is not set
352CONFIG_GEN_RTC=y
353# CONFIG_GEN_RTC_X is not set
354# CONFIG_DTLK is not set
355# CONFIG_R3964 is not set
356# CONFIG_APPLICOM is not set
357
358#
359# Ftape, the floppy tape device driver
360#
361# CONFIG_FTAPE is not set
362# CONFIG_AGP is not set
363# CONFIG_DRM is not set
364# CONFIG_RAW_DRIVER is not set
365# CONFIG_HANGCHECK_TIMER is not set
366
367#
368# Multimedia devices
369#
370# CONFIG_VIDEO_DEV is not set
371
372#
373# Digital Video Broadcasting Devices
374#
375# CONFIG_DVB is not set
376
377#
378# File systems
379#
380# CONFIG_EXT2_FS is not set
381CONFIG_EXT3_FS=y
382CONFIG_EXT3_FS_XATTR=y
383# CONFIG_EXT3_FS_POSIX_ACL is not set
384# CONFIG_EXT3_FS_SECURITY is not set
385CONFIG_JBD=y
386# CONFIG_JBD_DEBUG is not set
387CONFIG_FS_MBCACHE=y
388# CONFIG_REISERFS_FS is not set
389# CONFIG_JFS_FS is not set
390# CONFIG_XFS_FS is not set
391# CONFIG_MINIX_FS is not set
392# CONFIG_ROMFS_FS is not set
393# CONFIG_QUOTA is not set
394# CONFIG_AUTOFS_FS is not set
395# CONFIG_AUTOFS4_FS is not set
396
397#
398# CD-ROM/DVD Filesystems
399#
400# CONFIG_ISO9660_FS is not set
401# CONFIG_UDF_FS is not set
402
403#
404# DOS/FAT/NT Filesystems
405#
406# CONFIG_FAT_FS is not set
407# CONFIG_NTFS_FS is not set
408
409#
410# Pseudo filesystems
411#
412CONFIG_PROC_FS=y
413# CONFIG_DEVFS_FS is not set
414CONFIG_DEVPTS_FS=y
415# CONFIG_DEVPTS_FS_XATTR is not set
416CONFIG_TMPFS=y
417CONFIG_RAMFS=y
418
419#
420# Miscellaneous filesystems
421#
422# CONFIG_ADFS_FS is not set
423# CONFIG_AFFS_FS is not set
424# CONFIG_HFS_FS is not set
425# CONFIG_BEFS_FS is not set
426# CONFIG_BFS_FS is not set
427# CONFIG_EFS_FS is not set
428# CONFIG_CRAMFS is not set
429# CONFIG_VXFS_FS is not set
430# CONFIG_HPFS_FS is not set
431# CONFIG_QNX4FS_FS is not set
432# CONFIG_SYSV_FS is not set
433# CONFIG_UFS_FS is not set
434
435#
436# Network File Systems
437#
438CONFIG_NFS_FS=y
439# CONFIG_NFS_V3 is not set
440# CONFIG_NFS_V4 is not set
441# CONFIG_NFSD is not set
442CONFIG_ROOT_NFS=y
443CONFIG_LOCKD=y
444# CONFIG_EXPORTFS is not set
445CONFIG_SUNRPC=y
446# CONFIG_SUNRPC_GSS is not set
447# CONFIG_SMB_FS is not set
448# CONFIG_CIFS is not set
449# CONFIG_NCP_FS is not set
450# CONFIG_CODA_FS is not set
451# CONFIG_INTERMEZZO_FS is not set
452# CONFIG_AFS_FS is not set
453
454#
455# Partition Types
456#
457CONFIG_PARTITION_ADVANCED=y
458# CONFIG_ACORN_PARTITION is not set
459# CONFIG_OSF_PARTITION is not set
460# CONFIG_AMIGA_PARTITION is not set
461# CONFIG_ATARI_PARTITION is not set
462# CONFIG_MAC_PARTITION is not set
463# CONFIG_MSDOS_PARTITION is not set
464# CONFIG_LDM_PARTITION is not set
465# CONFIG_NEC98_PARTITION is not set
466# CONFIG_SGI_PARTITION is not set
467# CONFIG_ULTRIX_PARTITION is not set
468# CONFIG_SUN_PARTITION is not set
469# CONFIG_EFI_PARTITION is not set
470
471#
472# Sound
473#
474# CONFIG_SOUND is not set
475
476#
477# MPC8xx CPM Options
478#
479CONFIG_SCC_ENET=y
480# CONFIG_SCC1_ENET is not set
481# CONFIG_SCC2_ENET is not set
482CONFIG_SCC3_ENET=y
483# CONFIG_FEC_ENET is not set
484CONFIG_ENET_BIG_BUFFERS=y
485
486#
487# Generic MPC8xx Options
488#
489CONFIG_8xx_COPYBACK=y
490CONFIG_8xx_CPU6=y
491# CONFIG_UCODE_PATCH is not set
492
493#
494# USB support
495#
496# CONFIG_USB_GADGET is not set
497
498#
499# Bluetooth support
500#
501# CONFIG_BT is not set
502
503#
504# Library routines
505#
506# CONFIG_CRC32 is not set
507
508#
509# Kernel hacking
510#
511# CONFIG_DEBUG_KERNEL is not set
512# CONFIG_KALLSYMS is not set
513
514#
515# Security options
516#
517# CONFIG_SECURITY is not set
518
519#
520# Cryptographic options
521#
522# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/SPD823TS_defconfig b/arch/ppc/configs/SPD823TS_defconfig
deleted file mode 100644
index ba60fea2b834..000000000000
--- a/arch/ppc/configs/SPD823TS_defconfig
+++ /dev/null
@@ -1,520 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16CONFIG_SWAP=y
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21CONFIG_EMBEDDED=y
22CONFIG_FUTEX=y
23# CONFIG_EPOLL is not set
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y
30# CONFIG_MODULE_FORCE_UNLOAD is not set
31CONFIG_OBSOLETE_MODPARM=y
32# CONFIG_MODVERSIONS is not set
33CONFIG_KMOD=y
34
35#
36# Platform support
37#
38CONFIG_PPC=y
39CONFIG_PPC32=y
40# CONFIG_6xx is not set
41# CONFIG_40x is not set
42# CONFIG_POWER3 is not set
43CONFIG_8xx=y
44
45#
46# IBM 4xx options
47#
48CONFIG_EMBEDDEDBOOT=y
49CONFIG_SERIAL_CONSOLE=y
50CONFIG_NOT_COHERENT_CACHE=y
51# CONFIG_RPXLITE is not set
52# CONFIG_RPXCLASSIC is not set
53# CONFIG_BSEIP is not set
54# CONFIG_FADS is not set
55# CONFIG_TQM823L is not set
56# CONFIG_TQM850L is not set
57# CONFIG_TQM855L is not set
58# CONFIG_TQM860L is not set
59# CONFIG_FPS850L is not set
60CONFIG_SPD823TS=y
61# CONFIG_IVMS8 is not set
62# CONFIG_IVML24 is not set
63# CONFIG_SM850 is not set
64# CONFIG_HERMES_PRO is not set
65# CONFIG_IP860 is not set
66# CONFIG_LWMON is not set
67# CONFIG_PCU_E is not set
68# CONFIG_CCM is not set
69# CONFIG_LANTEC is not set
70# CONFIG_MBX is not set
71# CONFIG_WINCEPT is not set
72# CONFIG_SMP is not set
73# CONFIG_PREEMPT is not set
74CONFIG_MATH_EMULATION=y
75# CONFIG_CPU_FREQ is not set
76
77#
78# General setup
79#
80# CONFIG_HIGHMEM is not set
81# CONFIG_PCI is not set
82# CONFIG_PCI_DOMAINS is not set
83# CONFIG_PCI_QSPAN is not set
84CONFIG_KCORE_ELF=y
85CONFIG_BINFMT_ELF=y
86CONFIG_KERNEL_ELF=y
87# CONFIG_BINFMT_MISC is not set
88# CONFIG_HOTPLUG is not set
89
90#
91# Parallel port support
92#
93# CONFIG_PARPORT is not set
94# CONFIG_CMDLINE_BOOL is not set
95
96#
97# Advanced setup
98#
99# CONFIG_ADVANCED_OPTIONS is not set
100
101#
102# Default settings for advanced configuration options are used
103#
104CONFIG_HIGHMEM_START=0xfe000000
105CONFIG_LOWMEM_SIZE=0x30000000
106CONFIG_KERNEL_START=0xc0000000
107CONFIG_TASK_SIZE=0x80000000
108CONFIG_BOOT_LOAD=0x00400000
109
110#
111# Memory Technology Devices (MTD)
112#
113# CONFIG_MTD is not set
114
115#
116# Plug and Play support
117#
118# CONFIG_PNP is not set
119
120#
121# Block devices
122#
123# CONFIG_BLK_DEV_FD is not set
124# CONFIG_BLK_DEV_LOOP is not set
125# CONFIG_BLK_DEV_NBD is not set
126# CONFIG_BLK_DEV_RAM is not set
127# CONFIG_BLK_DEV_INITRD is not set
128
129#
130# Multi-device support (RAID and LVM)
131#
132# CONFIG_MD is not set
133
134#
135# ATA/IDE/MFM/RLL support
136#
137# CONFIG_IDE is not set
138
139#
140# SCSI support
141#
142# CONFIG_SCSI is not set
143
144#
145# Fusion MPT device support
146#
147
148#
149# I2O device support
150#
151
152#
153# Networking support
154#
155CONFIG_NET=y
156
157#
158# Networking options
159#
160CONFIG_PACKET=y
161# CONFIG_PACKET_MMAP is not set
162# CONFIG_NETLINK_DEV is not set
163# CONFIG_NETFILTER is not set
164CONFIG_UNIX=y
165# CONFIG_NET_KEY is not set
166CONFIG_INET=y
167# CONFIG_IP_MULTICAST is not set
168# CONFIG_IP_ADVANCED_ROUTER is not set
169CONFIG_IP_PNP=y
170CONFIG_IP_PNP_DHCP=y
171# CONFIG_IP_PNP_BOOTP is not set
172# CONFIG_IP_PNP_RARP is not set
173# CONFIG_NET_IPIP is not set
174# CONFIG_NET_IPGRE is not set
175# CONFIG_ARPD is not set
176# CONFIG_INET_ECN is not set
177# CONFIG_SYN_COOKIES is not set
178# CONFIG_INET_AH is not set
179# CONFIG_INET_ESP is not set
180# CONFIG_INET_IPCOMP is not set
181# CONFIG_IPV6 is not set
182# CONFIG_XFRM_USER is not set
183
184#
185# SCTP Configuration (EXPERIMENTAL)
186#
187CONFIG_IPV6_SCTP__=y
188# CONFIG_IP_SCTP is not set
189# CONFIG_ATM is not set
190# CONFIG_VLAN_8021Q is not set
191# CONFIG_LLC is not set
192# CONFIG_DECNET is not set
193# CONFIG_BRIDGE is not set
194# CONFIG_X25 is not set
195# CONFIG_LAPB is not set
196# CONFIG_NET_DIVERT is not set
197# CONFIG_ECONET is not set
198# CONFIG_WAN_ROUTER is not set
199# CONFIG_NET_HW_FLOWCONTROL is not set
200
201#
202# QoS and/or fair queueing
203#
204# CONFIG_NET_SCHED is not set
205
206#
207# Network testing
208#
209# CONFIG_NET_PKTGEN is not set
210CONFIG_NETDEVICES=y
211# CONFIG_DUMMY is not set
212# CONFIG_BONDING is not set
213# CONFIG_EQUALIZER is not set
214# CONFIG_TUN is not set
215# CONFIG_ETHERTAP is not set
216
217#
218# Ethernet (10 or 100Mbit)
219#
220CONFIG_NET_ETHERNET=y
221# CONFIG_MII is not set
222# CONFIG_OAKNET is not set
223
224#
225# Ethernet (1000 Mbit)
226#
227
228#
229# Ethernet (10000 Mbit)
230#
231# CONFIG_PPP is not set
232# CONFIG_SLIP is not set
233
234#
235# Wireless LAN (non-hamradio)
236#
237# CONFIG_NET_RADIO is not set
238
239#
240# Token Ring devices (depends on LLC=y)
241#
242# CONFIG_SHAPER is not set
243
244#
245# Wan interfaces
246#
247# CONFIG_WAN is not set
248
249#
250# Amateur Radio support
251#
252# CONFIG_HAMRADIO is not set
253
254#
255# IrDA (infrared) support
256#
257# CONFIG_IRDA is not set
258
259#
260# ISDN subsystem
261#
262# CONFIG_ISDN_BOOL is not set
263
264#
265# Graphics support
266#
267# CONFIG_FB is not set
268
269#
270# Old CD-ROM drivers (not SCSI, not IDE)
271#
272# CONFIG_CD_NO_IDESCSI is not set
273
274#
275# Input device support
276#
277# CONFIG_INPUT is not set
278
279#
280# Userland interfaces
281#
282
283#
284# Input I/O drivers
285#
286# CONFIG_GAMEPORT is not set
287CONFIG_SOUND_GAMEPORT=y
288# CONFIG_SERIO is not set
289
290#
291# Input Device Drivers
292#
293
294#
295# Macintosh device drivers
296#
297
298#
299# Serial drivers
300#
301# CONFIG_SERIAL_8250 is not set
302
303#
304# Non-8250 serial port support
305#
306CONFIG_SERIAL_CORE=y
307CONFIG_SERIAL_CORE_CONSOLE=y
308CONFIG_SERIAL_CPM=y
309CONFIG_SERIAL_CPM_CONSOLE=y
310# CONFIG_SERIAL_CPM_SCC1 is not set
311# CONFIG_SERIAL_CPM_SCC2 is not set
312# CONFIG_SERIAL_CPM_SCC3 is not set
313# CONFIG_SERIAL_CPM_SCC4 is not set
314CONFIG_SERIAL_CPM_SMC1=y
315# CONFIG_SERIAL_CPM_SMC2 is not set
316CONFIG_SERIAL_CPM_ALT_SMC2=y
317CONFIG_UNIX98_PTYS=y
318# CONFIG_LEGACY_PTYS is not set
319
320#
321# I2C support
322#
323# CONFIG_I2C is not set
324
325#
326# I2C Hardware Sensors Mainboard support
327#
328
329#
330# I2C Hardware Sensors Chip support
331#
332# CONFIG_I2C_SENSOR is not set
333
334#
335# Mice
336#
337# CONFIG_BUSMOUSE is not set
338# CONFIG_QIC02_TAPE is not set
339
340#
341# IPMI
342#
343# CONFIG_IPMI_HANDLER is not set
344
345#
346# Watchdog Cards
347#
348# CONFIG_WATCHDOG is not set
349# CONFIG_NVRAM is not set
350CONFIG_GEN_RTC=y
351# CONFIG_GEN_RTC_X is not set
352# CONFIG_DTLK is not set
353# CONFIG_R3964 is not set
354# CONFIG_APPLICOM is not set
355
356#
357# Ftape, the floppy tape device driver
358#
359# CONFIG_FTAPE is not set
360# CONFIG_AGP is not set
361# CONFIG_DRM is not set
362# CONFIG_RAW_DRIVER is not set
363# CONFIG_HANGCHECK_TIMER is not set
364
365#
366# Multimedia devices
367#
368# CONFIG_VIDEO_DEV is not set
369
370#
371# Digital Video Broadcasting Devices
372#
373# CONFIG_DVB is not set
374
375#
376# File systems
377#
378# CONFIG_EXT2_FS is not set
379CONFIG_EXT3_FS=y
380CONFIG_EXT3_FS_XATTR=y
381# CONFIG_EXT3_FS_POSIX_ACL is not set
382# CONFIG_EXT3_FS_SECURITY is not set
383CONFIG_JBD=y
384# CONFIG_JBD_DEBUG is not set
385CONFIG_FS_MBCACHE=y
386# CONFIG_REISERFS_FS is not set
387# CONFIG_JFS_FS is not set
388# CONFIG_XFS_FS is not set
389# CONFIG_MINIX_FS is not set
390# CONFIG_ROMFS_FS is not set
391# CONFIG_QUOTA is not set
392# CONFIG_AUTOFS_FS is not set
393# CONFIG_AUTOFS4_FS is not set
394
395#
396# CD-ROM/DVD Filesystems
397#
398# CONFIG_ISO9660_FS is not set
399# CONFIG_UDF_FS is not set
400
401#
402# DOS/FAT/NT Filesystems
403#
404# CONFIG_FAT_FS is not set
405# CONFIG_NTFS_FS is not set
406
407#
408# Pseudo filesystems
409#
410CONFIG_PROC_FS=y
411# CONFIG_DEVFS_FS is not set
412CONFIG_DEVPTS_FS=y
413# CONFIG_DEVPTS_FS_XATTR is not set
414CONFIG_TMPFS=y
415CONFIG_RAMFS=y
416
417#
418# Miscellaneous filesystems
419#
420# CONFIG_ADFS_FS is not set
421# CONFIG_AFFS_FS is not set
422# CONFIG_HFS_FS is not set
423# CONFIG_BEFS_FS is not set
424# CONFIG_BFS_FS is not set
425# CONFIG_EFS_FS is not set
426# CONFIG_CRAMFS is not set
427# CONFIG_VXFS_FS is not set
428# CONFIG_HPFS_FS is not set
429# CONFIG_QNX4FS_FS is not set
430# CONFIG_SYSV_FS is not set
431# CONFIG_UFS_FS is not set
432
433#
434# Network File Systems
435#
436CONFIG_NFS_FS=y
437# CONFIG_NFS_V3 is not set
438# CONFIG_NFS_V4 is not set
439# CONFIG_NFSD is not set
440CONFIG_ROOT_NFS=y
441CONFIG_LOCKD=y
442# CONFIG_EXPORTFS is not set
443CONFIG_SUNRPC=y
444# CONFIG_SUNRPC_GSS is not set
445# CONFIG_SMB_FS is not set
446# CONFIG_CIFS is not set
447# CONFIG_NCP_FS is not set
448# CONFIG_CODA_FS is not set
449# CONFIG_INTERMEZZO_FS is not set
450# CONFIG_AFS_FS is not set
451
452#
453# Partition Types
454#
455CONFIG_PARTITION_ADVANCED=y
456# CONFIG_ACORN_PARTITION is not set
457# CONFIG_OSF_PARTITION is not set
458# CONFIG_AMIGA_PARTITION is not set
459# CONFIG_ATARI_PARTITION is not set
460# CONFIG_MAC_PARTITION is not set
461# CONFIG_MSDOS_PARTITION is not set
462# CONFIG_LDM_PARTITION is not set
463# CONFIG_NEC98_PARTITION is not set
464# CONFIG_SGI_PARTITION is not set
465# CONFIG_ULTRIX_PARTITION is not set
466# CONFIG_SUN_PARTITION is not set
467# CONFIG_EFI_PARTITION is not set
468
469#
470# Sound
471#
472# CONFIG_SOUND is not set
473
474#
475# MPC8xx CPM Options
476#
477CONFIG_SCC_ENET=y
478# CONFIG_SCC1_ENET is not set
479CONFIG_SCC2_ENET=y
480# CONFIG_SCC3_ENET is not set
481# CONFIG_FEC_ENET is not set
482CONFIG_ENET_BIG_BUFFERS=y
483
484#
485# Generic MPC8xx Options
486#
487CONFIG_8xx_COPYBACK=y
488# CONFIG_8xx_CPU6 is not set
489# CONFIG_UCODE_PATCH is not set
490
491#
492# USB support
493#
494# CONFIG_USB_GADGET is not set
495
496#
497# Bluetooth support
498#
499# CONFIG_BT is not set
500
501#
502# Library routines
503#
504# CONFIG_CRC32 is not set
505
506#
507# Kernel hacking
508#
509# CONFIG_DEBUG_KERNEL is not set
510# CONFIG_KALLSYMS is not set
511
512#
513# Security options
514#
515# CONFIG_SECURITY is not set
516
517#
518# Cryptographic options
519#
520# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/adir_defconfig b/arch/ppc/configs/adir_defconfig
deleted file mode 100644
index f20e6533dc79..000000000000
--- a/arch/ppc/configs/adir_defconfig
+++ /dev/null
@@ -1,805 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16CONFIG_SWAP=y
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21# CONFIG_EMBEDDED is not set
22CONFIG_FUTEX=y
23CONFIG_EPOLL=y
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y
30# CONFIG_MODULE_FORCE_UNLOAD is not set
31CONFIG_OBSOLETE_MODPARM=y
32# CONFIG_MODVERSIONS is not set
33CONFIG_KMOD=y
34
35#
36# Platform support
37#
38CONFIG_PPC=y
39CONFIG_PPC32=y
40CONFIG_6xx=y
41# CONFIG_40x is not set
42# CONFIG_POWER3 is not set
43# CONFIG_8xx is not set
44
45#
46# IBM 4xx options
47#
48# CONFIG_8260 is not set
49CONFIG_GENERIC_ISA_DMA=y
50CONFIG_PPC_STD_MMU=y
51# CONFIG_PPC_MULTIPLATFORM is not set
52# CONFIG_APUS is not set
53# CONFIG_WILLOW_2 is not set
54# CONFIG_PCORE is not set
55# CONFIG_POWERPMC250 is not set
56# CONFIG_EV64260 is not set
57# CONFIG_SPRUCE is not set
58# CONFIG_LOPEC is not set
59# CONFIG_MCPN765 is not set
60# CONFIG_MVME5100 is not set
61# CONFIG_PPLUS is not set
62# CONFIG_PRPMC750 is not set
63# CONFIG_PRPMC800 is not set
64# CONFIG_SANDPOINT is not set
65CONFIG_ADIR=y
66# CONFIG_K2 is not set
67# CONFIG_PAL4 is not set
68# CONFIG_GEMINI is not set
69# CONFIG_SMP is not set
70# CONFIG_PREEMPT is not set
71# CONFIG_ALTIVEC is not set
72# CONFIG_TAU is not set
73# CONFIG_CPU_FREQ is not set
74
75#
76# General setup
77#
78# CONFIG_HIGHMEM is not set
79CONFIG_PCI=y
80CONFIG_PCI_DOMAINS=y
81CONFIG_KCORE_ELF=y
82CONFIG_BINFMT_ELF=y
83CONFIG_KERNEL_ELF=y
84# CONFIG_BINFMT_MISC is not set
85CONFIG_PCI_LEGACY_PROC=y
86# CONFIG_PCI_NAMES is not set
87# CONFIG_HOTPLUG is not set
88
89#
90# Parallel port support
91#
92CONFIG_PARPORT=y
93CONFIG_PARPORT_PC=y
94CONFIG_PARPORT_PC_CML1=y
95# CONFIG_PARPORT_SERIAL is not set
96CONFIG_PARPORT_PC_FIFO=y
97CONFIG_PARPORT_PC_SUPERIO=y
98# CONFIG_PARPORT_OTHER is not set
99CONFIG_PARPORT_1284=y
100# CONFIG_PPC601_SYNC_FIX is not set
101CONFIG_CMDLINE_BOOL=y
102CONFIG_CMDLINE="ip=on"
103
104#
105# Advanced setup
106#
107# CONFIG_ADVANCED_OPTIONS is not set
108
109#
110# Default settings for advanced configuration options are used
111#
112CONFIG_HIGHMEM_START=0xfe000000
113CONFIG_LOWMEM_SIZE=0x30000000
114CONFIG_KERNEL_START=0xc0000000
115CONFIG_TASK_SIZE=0x80000000
116CONFIG_BOOT_LOAD=0x00800000
117
118#
119# Memory Technology Devices (MTD)
120#
121# CONFIG_MTD is not set
122
123#
124# Plug and Play support
125#
126# CONFIG_PNP is not set
127
128#
129# Block devices
130#
131CONFIG_BLK_DEV_FD=y
132# CONFIG_PARIDE is not set
133# CONFIG_BLK_CPQ_DA is not set
134# CONFIG_BLK_CPQ_CISS_DA is not set
135# CONFIG_BLK_DEV_DAC960 is not set
136# CONFIG_BLK_DEV_UMEM is not set
137CONFIG_BLK_DEV_LOOP=y
138# CONFIG_BLK_DEV_NBD is not set
139CONFIG_BLK_DEV_RAM=y
140CONFIG_BLK_DEV_RAM_SIZE=4096
141CONFIG_BLK_DEV_INITRD=y
142
143#
144# Multi-device support (RAID and LVM)
145#
146# CONFIG_MD is not set
147
148#
149# ATA/IDE/MFM/RLL support
150#
151# CONFIG_IDE is not set
152
153#
154# SCSI support
155#
156CONFIG_SCSI=y
157
158#
159# SCSI support type (disk, tape, CD-ROM)
160#
161CONFIG_BLK_DEV_SD=y
162CONFIG_CHR_DEV_ST=y
163# CONFIG_CHR_DEV_OSST is not set
164CONFIG_BLK_DEV_SR=y
165CONFIG_BLK_DEV_SR_VENDOR=y
166CONFIG_CHR_DEV_SG=y
167
168#
169# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
170#
171# CONFIG_SCSI_MULTI_LUN is not set
172# CONFIG_SCSI_REPORT_LUNS is not set
173CONFIG_SCSI_CONSTANTS=y
174# CONFIG_SCSI_LOGGING is not set
175
176#
177# SCSI low-level drivers
178#
179# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
180# CONFIG_SCSI_ACARD is not set
181# CONFIG_SCSI_AACRAID is not set
182# CONFIG_SCSI_AIC7XXX is not set
183# CONFIG_SCSI_AIC7XXX_OLD is not set
184# CONFIG_SCSI_AIC79XX is not set
185# CONFIG_SCSI_DPT_I2O is not set
186# CONFIG_SCSI_ADVANSYS is not set
187# CONFIG_SCSI_IN2000 is not set
188# CONFIG_SCSI_AM53C974 is not set
189# CONFIG_SCSI_MEGARAID is not set
190# CONFIG_SCSI_BUSLOGIC is not set
191# CONFIG_SCSI_CPQFCTS is not set
192# CONFIG_SCSI_DMX3191D is not set
193# CONFIG_SCSI_EATA is not set
194# CONFIG_SCSI_EATA_PIO is not set
195# CONFIG_SCSI_FUTURE_DOMAIN is not set
196# CONFIG_SCSI_GDTH is not set
197# CONFIG_SCSI_GENERIC_NCR5380 is not set
198# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
199# CONFIG_SCSI_INITIO is not set
200# CONFIG_SCSI_INIA100 is not set
201# CONFIG_SCSI_PPA is not set
202# CONFIG_SCSI_IMM is not set
203# CONFIG_SCSI_NCR53C7xx is not set
204# CONFIG_SCSI_SYM53C8XX_2 is not set
205CONFIG_SCSI_NCR53C8XX=y
206CONFIG_SCSI_SYM53C8XX=y
207CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=8
208CONFIG_SCSI_NCR53C8XX_MAX_TAGS=32
209CONFIG_SCSI_NCR53C8XX_SYNC=20
210# CONFIG_SCSI_NCR53C8XX_PROFILE is not set
211# CONFIG_SCSI_NCR53C8XX_IOMAPPED is not set
212# CONFIG_SCSI_NCR53C8XX_PQS_PDS is not set
213# CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT is not set
214# CONFIG_SCSI_PCI2000 is not set
215# CONFIG_SCSI_PCI2220I is not set
216# CONFIG_SCSI_QLOGIC_ISP is not set
217# CONFIG_SCSI_QLOGIC_FC is not set
218# CONFIG_SCSI_QLOGIC_1280 is not set
219# CONFIG_SCSI_DC395x is not set
220# CONFIG_SCSI_DC390T is not set
221# CONFIG_SCSI_U14_34F is not set
222# CONFIG_SCSI_NSP32 is not set
223# CONFIG_SCSI_DEBUG is not set
224
225#
226# Fusion MPT device support
227#
228# CONFIG_FUSION is not set
229
230#
231# IEEE 1394 (FireWire) support (EXPERIMENTAL)
232#
233# CONFIG_IEEE1394 is not set
234
235#
236# I2O device support
237#
238# CONFIG_I2O is not set
239
240#
241# Networking support
242#
243CONFIG_NET=y
244
245#
246# Networking options
247#
248CONFIG_PACKET=y
249# CONFIG_PACKET_MMAP is not set
250# CONFIG_NETLINK_DEV is not set
251CONFIG_NETFILTER=y
252# CONFIG_NETFILTER_DEBUG is not set
253CONFIG_UNIX=y
254# CONFIG_NET_KEY is not set
255CONFIG_INET=y
256# CONFIG_IP_MULTICAST is not set
257# CONFIG_IP_ADVANCED_ROUTER is not set
258CONFIG_IP_PNP=y
259CONFIG_IP_PNP_DHCP=y
260# CONFIG_IP_PNP_BOOTP is not set
261# CONFIG_IP_PNP_RARP is not set
262# CONFIG_NET_IPIP is not set
263# CONFIG_NET_IPGRE is not set
264# CONFIG_ARPD is not set
265# CONFIG_INET_ECN is not set
266# CONFIG_SYN_COOKIES is not set
267# CONFIG_INET_AH is not set
268# CONFIG_INET_ESP is not set
269# CONFIG_INET_IPCOMP is not set
270
271#
272# IP: Netfilter Configuration
273#
274CONFIG_IP_NF_CONNTRACK=m
275CONFIG_IP_NF_FTP=m
276CONFIG_IP_NF_IRC=m
277CONFIG_IP_NF_TFTP=m
278CONFIG_IP_NF_AMANDA=m
279# CONFIG_IP_NF_QUEUE is not set
280CONFIG_IP_NF_IPTABLES=m
281CONFIG_IP_NF_MATCH_LIMIT=m
282CONFIG_IP_NF_MATCH_MAC=m
283CONFIG_IP_NF_MATCH_PKTTYPE=m
284CONFIG_IP_NF_MATCH_MARK=m
285CONFIG_IP_NF_MATCH_MULTIPORT=m
286CONFIG_IP_NF_MATCH_TOS=m
287CONFIG_IP_NF_MATCH_ECN=m
288CONFIG_IP_NF_MATCH_DSCP=m
289CONFIG_IP_NF_MATCH_AH_ESP=m
290CONFIG_IP_NF_MATCH_LENGTH=m
291CONFIG_IP_NF_MATCH_TTL=m
292CONFIG_IP_NF_MATCH_TCPMSS=m
293CONFIG_IP_NF_MATCH_HELPER=m
294CONFIG_IP_NF_MATCH_STATE=m
295CONFIG_IP_NF_MATCH_CONNTRACK=m
296CONFIG_IP_NF_MATCH_UNCLEAN=m
297CONFIG_IP_NF_MATCH_OWNER=m
298CONFIG_IP_NF_FILTER=m
299CONFIG_IP_NF_TARGET_REJECT=m
300CONFIG_IP_NF_TARGET_MIRROR=m
301CONFIG_IP_NF_NAT=m
302CONFIG_IP_NF_NAT_NEEDED=y
303CONFIG_IP_NF_TARGET_MASQUERADE=m
304CONFIG_IP_NF_TARGET_REDIRECT=m
305CONFIG_IP_NF_NAT_SNMP_BASIC=m
306CONFIG_IP_NF_NAT_IRC=m
307CONFIG_IP_NF_NAT_FTP=m
308CONFIG_IP_NF_NAT_TFTP=m
309CONFIG_IP_NF_NAT_AMANDA=m
310# CONFIG_IP_NF_MANGLE is not set
311# CONFIG_IP_NF_TARGET_LOG is not set
312# CONFIG_IP_NF_TARGET_ULOG is not set
313CONFIG_IP_NF_TARGET_TCPMSS=m
314CONFIG_IP_NF_ARPTABLES=m
315CONFIG_IP_NF_ARPFILTER=m
316CONFIG_IP_NF_COMPAT_IPCHAINS=m
317# CONFIG_IP_NF_COMPAT_IPFWADM is not set
318# CONFIG_IPV6 is not set
319# CONFIG_XFRM_USER is not set
320
321#
322# SCTP Configuration (EXPERIMENTAL)
323#
324CONFIG_IPV6_SCTP__=y
325# CONFIG_IP_SCTP is not set
326# CONFIG_ATM is not set
327# CONFIG_VLAN_8021Q is not set
328# CONFIG_LLC is not set
329# CONFIG_DECNET is not set
330# CONFIG_BRIDGE is not set
331# CONFIG_X25 is not set
332# CONFIG_LAPB is not set
333# CONFIG_NET_DIVERT is not set
334# CONFIG_ECONET is not set
335# CONFIG_WAN_ROUTER is not set
336# CONFIG_NET_HW_FLOWCONTROL is not set
337
338#
339# QoS and/or fair queueing
340#
341# CONFIG_NET_SCHED is not set
342
343#
344# Network testing
345#
346# CONFIG_NET_PKTGEN is not set
347CONFIG_NETDEVICES=y
348
349#
350# ARCnet devices
351#
352# CONFIG_ARCNET is not set
353# CONFIG_DUMMY is not set
354# CONFIG_BONDING is not set
355# CONFIG_EQUALIZER is not set
356# CONFIG_TUN is not set
357# CONFIG_ETHERTAP is not set
358
359#
360# Ethernet (10 or 100Mbit)
361#
362CONFIG_NET_ETHERNET=y
363CONFIG_MII=y
364# CONFIG_OAKNET is not set
365# CONFIG_HAPPYMEAL is not set
366# CONFIG_SUNGEM is not set
367# CONFIG_NET_VENDOR_3COM is not set
368
369#
370# Tulip family network device support
371#
372# CONFIG_NET_TULIP is not set
373# CONFIG_HP100 is not set
374CONFIG_NET_PCI=y
375# CONFIG_PCNET32 is not set
376# CONFIG_AMD8111_ETH is not set
377# CONFIG_ADAPTEC_STARFIRE is not set
378# CONFIG_B44 is not set
379# CONFIG_DGRS is not set
380CONFIG_EEPRO100=y
381# CONFIG_EEPRO100_PIO is not set
382# CONFIG_E100 is not set
383# CONFIG_FEALNX is not set
384# CONFIG_NATSEMI is not set
385# CONFIG_NE2K_PCI is not set
386# CONFIG_8139CP is not set
387# CONFIG_8139TOO is not set
388# CONFIG_SIS900 is not set
389# CONFIG_EPIC100 is not set
390# CONFIG_SUNDANCE is not set
391# CONFIG_TLAN is not set
392# CONFIG_VIA_RHINE is not set
393
394#
395# Ethernet (1000 Mbit)
396#
397# CONFIG_ACENIC is not set
398# CONFIG_DL2K is not set
399# CONFIG_E1000 is not set
400# CONFIG_NS83820 is not set
401# CONFIG_HAMACHI is not set
402# CONFIG_YELLOWFIN is not set
403# CONFIG_R8169 is not set
404# CONFIG_SK98LIN is not set
405# CONFIG_TIGON3 is not set
406
407#
408# Ethernet (10000 Mbit)
409#
410# CONFIG_IXGB is not set
411# CONFIG_FDDI is not set
412# CONFIG_HIPPI is not set
413# CONFIG_PLIP is not set
414# CONFIG_PPP is not set
415# CONFIG_SLIP is not set
416
417#
418# Wireless LAN (non-hamradio)
419#
420# CONFIG_NET_RADIO is not set
421
422#
423# Token Ring devices (depends on LLC=y)
424#
425# CONFIG_NET_FC is not set
426# CONFIG_RCPCI is not set
427# CONFIG_SHAPER is not set
428
429#
430# Wan interfaces
431#
432# CONFIG_WAN is not set
433
434#
435# Amateur Radio support
436#
437# CONFIG_HAMRADIO is not set
438
439#
440# IrDA (infrared) support
441#
442# CONFIG_IRDA is not set
443
444#
445# ISDN subsystem
446#
447# CONFIG_ISDN_BOOL is not set
448
449#
450# Graphics support
451#
452# CONFIG_FB is not set
453
454#
455# Old CD-ROM drivers (not SCSI, not IDE)
456#
457# CONFIG_CD_NO_IDESCSI is not set
458
459#
460# Input device support
461#
462# CONFIG_INPUT is not set
463
464#
465# Userland interfaces
466#
467
468#
469# Input I/O drivers
470#
471# CONFIG_GAMEPORT is not set
472CONFIG_SOUND_GAMEPORT=y
473# CONFIG_SERIO is not set
474
475#
476# Input Device Drivers
477#
478
479#
480# Macintosh device drivers
481#
482
483#
484# Character devices
485#
486# CONFIG_SERIAL_NONSTANDARD is not set
487
488#
489# Serial drivers
490#
491CONFIG_SERIAL_8250=y
492CONFIG_SERIAL_8250_CONSOLE=y
493# CONFIG_SERIAL_8250_EXTENDED is not set
494
495#
496# Non-8250 serial port support
497#
498CONFIG_SERIAL_CORE=y
499CONFIG_SERIAL_CORE_CONSOLE=y
500CONFIG_UNIX98_PTYS=y
501CONFIG_UNIX98_PTY_COUNT=256
502# CONFIG_PRINTER is not set
503# CONFIG_PPDEV is not set
504# CONFIG_TIPAR is not set
505
506#
507# I2C support
508#
509# CONFIG_I2C is not set
510
511#
512# I2C Hardware Sensors Mainboard support
513#
514
515#
516# I2C Hardware Sensors Chip support
517#
518# CONFIG_I2C_SENSOR is not set
519
520#
521# Mice
522#
523# CONFIG_BUSMOUSE is not set
524# CONFIG_QIC02_TAPE is not set
525
526#
527# IPMI
528#
529# CONFIG_IPMI_HANDLER is not set
530
531#
532# Watchdog Cards
533#
534# CONFIG_WATCHDOG is not set
535# CONFIG_NVRAM is not set
536CONFIG_GEN_RTC=y
537# CONFIG_GEN_RTC_X is not set
538# CONFIG_DTLK is not set
539# CONFIG_R3964 is not set
540# CONFIG_APPLICOM is not set
541
542#
543# Ftape, the floppy tape device driver
544#
545# CONFIG_FTAPE is not set
546# CONFIG_AGP is not set
547# CONFIG_DRM is not set
548# CONFIG_RAW_DRIVER is not set
549# CONFIG_HANGCHECK_TIMER is not set
550
551#
552# Multimedia devices
553#
554# CONFIG_VIDEO_DEV is not set
555
556#
557# Digital Video Broadcasting Devices
558#
559# CONFIG_DVB is not set
560
561#
562# File systems
563#
564CONFIG_EXT2_FS=y
565# CONFIG_EXT2_FS_XATTR is not set
566CONFIG_EXT3_FS=y
567CONFIG_EXT3_FS_XATTR=y
568# CONFIG_EXT3_FS_POSIX_ACL is not set
569# CONFIG_EXT3_FS_SECURITY is not set
570CONFIG_JBD=y
571# CONFIG_JBD_DEBUG is not set
572CONFIG_FS_MBCACHE=y
573# CONFIG_REISERFS_FS is not set
574# CONFIG_JFS_FS is not set
575# CONFIG_XFS_FS is not set
576# CONFIG_MINIX_FS is not set
577# CONFIG_ROMFS_FS is not set
578# CONFIG_QUOTA is not set
579# CONFIG_AUTOFS_FS is not set
580# CONFIG_AUTOFS4_FS is not set
581
582#
583# CD-ROM/DVD Filesystems
584#
585# CONFIG_ISO9660_FS is not set
586# CONFIG_UDF_FS is not set
587
588#
589# DOS/FAT/NT Filesystems
590#
591# CONFIG_FAT_FS is not set
592# CONFIG_NTFS_FS is not set
593
594#
595# Pseudo filesystems
596#
597CONFIG_PROC_FS=y
598# CONFIG_DEVFS_FS is not set
599CONFIG_DEVPTS_FS=y
600# CONFIG_DEVPTS_FS_XATTR is not set
601CONFIG_TMPFS=y
602CONFIG_RAMFS=y
603
604#
605# Miscellaneous filesystems
606#
607# CONFIG_ADFS_FS is not set
608# CONFIG_AFFS_FS is not set
609# CONFIG_HFS_FS is not set
610# CONFIG_BEFS_FS is not set
611# CONFIG_BFS_FS is not set
612# CONFIG_EFS_FS is not set
613# CONFIG_CRAMFS is not set
614# CONFIG_VXFS_FS is not set
615# CONFIG_HPFS_FS is not set
616# CONFIG_QNX4FS_FS is not set
617# CONFIG_SYSV_FS is not set
618# CONFIG_UFS_FS is not set
619
620#
621# Network File Systems
622#
623CONFIG_NFS_FS=y
624# CONFIG_NFS_V3 is not set
625# CONFIG_NFS_V4 is not set
626# CONFIG_NFSD is not set
627CONFIG_ROOT_NFS=y
628CONFIG_LOCKD=y
629# CONFIG_EXPORTFS is not set
630CONFIG_SUNRPC=y
631# CONFIG_SUNRPC_GSS is not set
632# CONFIG_SMB_FS is not set
633# CONFIG_CIFS is not set
634# CONFIG_NCP_FS is not set
635# CONFIG_CODA_FS is not set
636# CONFIG_INTERMEZZO_FS is not set
637# CONFIG_AFS_FS is not set
638
639#
640# Partition Types
641#
642# CONFIG_PARTITION_ADVANCED is not set
643CONFIG_MSDOS_PARTITION=y
644
645#
646# Sound
647#
648# CONFIG_SOUND is not set
649
650#
651# USB support
652#
653CONFIG_USB=y
654# CONFIG_USB_DEBUG is not set
655
656#
657# Miscellaneous USB options
658#
659CONFIG_USB_DEVICEFS=y
660# CONFIG_USB_BANDWIDTH is not set
661CONFIG_USB_DYNAMIC_MINORS=y
662
663#
664# USB Host Controller Drivers
665#
666# CONFIG_USB_EHCI_HCD is not set
667CONFIG_USB_OHCI_HCD=y
668# CONFIG_USB_UHCI_HCD is not set
669
670#
671# USB Device Class drivers
672#
673# CONFIG_USB_BLUETOOTH_TTY is not set
674CONFIG_USB_ACM=m
675# CONFIG_USB_PRINTER is not set
676CONFIG_USB_STORAGE=m
677# CONFIG_USB_STORAGE_DEBUG is not set
678# CONFIG_USB_STORAGE_DATAFAB is not set
679CONFIG_USB_STORAGE_FREECOM=y
680# CONFIG_USB_STORAGE_ISD200 is not set
681CONFIG_USB_STORAGE_DPCM=y
682# CONFIG_USB_STORAGE_HP8200e is not set
683# CONFIG_USB_STORAGE_SDDR09 is not set
684# CONFIG_USB_STORAGE_SDDR55 is not set
685# CONFIG_USB_STORAGE_JUMPSHOT is not set
686
687#
688# USB Human Interface Devices (HID)
689#
690CONFIG_USB_HID=m
691
692#
693# Input core support is needed for USB HID input layer or HIDBP support
694#
695CONFIG_USB_HIDDEV=y
696
697#
698# USB HID Boot Protocol drivers
699#
700
701#
702# USB Imaging devices
703#
704# CONFIG_USB_MDC800 is not set
705# CONFIG_USB_SCANNER is not set
706# CONFIG_USB_MICROTEK is not set
707# CONFIG_USB_HPUSBSCSI is not set
708
709#
710# USB Multimedia devices
711#
712# CONFIG_USB_DABUSB is not set
713
714#
715# Video4Linux support is needed for USB Multimedia device support
716#
717
718#
719# USB Network adaptors
720#
721# CONFIG_USB_CATC is not set
722# CONFIG_USB_KAWETH is not set
723# CONFIG_USB_PEGASUS is not set
724# CONFIG_USB_RTL8150 is not set
725# CONFIG_USB_USBNET is not set
726
727#
728# USB port drivers
729#
730# CONFIG_USB_USS720 is not set
731
732#
733# USB Serial Converter support
734#
735CONFIG_USB_SERIAL=m
736# CONFIG_USB_SERIAL_GENERIC is not set
737# CONFIG_USB_SERIAL_BELKIN is not set
738# CONFIG_USB_SERIAL_WHITEHEAT is not set
739# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
740# CONFIG_USB_SERIAL_EMPEG is not set
741# CONFIG_USB_SERIAL_FTDI_SIO is not set
742CONFIG_USB_SERIAL_VISOR=m
743# CONFIG_USB_SERIAL_IPAQ is not set
744# CONFIG_USB_SERIAL_IR is not set
745# CONFIG_USB_SERIAL_EDGEPORT is not set
746# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
747# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
748CONFIG_USB_SERIAL_KEYSPAN=m
749# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set
750CONFIG_USB_SERIAL_KEYSPAN_USA28=y
751CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
752# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
753# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
754CONFIG_USB_SERIAL_KEYSPAN_USA19=y
755CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
756CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
757CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
758CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
759CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
760# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set
761# CONFIG_USB_SERIAL_KLSI is not set
762# CONFIG_USB_SERIAL_KOBIL_SCT is not set
763# CONFIG_USB_SERIAL_MCT_U232 is not set
764# CONFIG_USB_SERIAL_PL2303 is not set
765# CONFIG_USB_SERIAL_SAFE is not set
766# CONFIG_USB_SERIAL_CYBERJACK is not set
767# CONFIG_USB_SERIAL_XIRCOM is not set
768# CONFIG_USB_SERIAL_OMNINET is not set
769CONFIG_USB_EZUSB=y
770
771#
772# USB Miscellaneous drivers
773#
774# CONFIG_USB_TIGL is not set
775# CONFIG_USB_AUERSWALD is not set
776# CONFIG_USB_RIO500 is not set
777# CONFIG_USB_LCD is not set
778# CONFIG_USB_TEST is not set
779# CONFIG_USB_GADGET is not set
780
781#
782# Bluetooth support
783#
784# CONFIG_BT is not set
785
786#
787# Library routines
788#
789# CONFIG_CRC32 is not set
790
791#
792# Kernel hacking
793#
794# CONFIG_DEBUG_KERNEL is not set
795# CONFIG_KALLSYMS is not set
796
797#
798# Security options
799#
800# CONFIG_SECURITY is not set
801
802#
803# Cryptographic options
804#
805# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ash_defconfig b/arch/ppc/configs/ash_defconfig
deleted file mode 100644
index c4a73cc16cf6..000000000000
--- a/arch/ppc/configs/ash_defconfig
+++ /dev/null
@@ -1,666 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9CONFIG_GENERIC_NVRAM=y
10
11#
12# Code maturity level options
13#
14CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y
16CONFIG_STANDALONE=y
17CONFIG_BROKEN_ON_SMP=y
18
19#
20# General setup
21#
22CONFIG_SWAP=y
23CONFIG_SYSVIPC=y
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26CONFIG_LOG_BUF_SHIFT=14
27# CONFIG_HOTPLUG is not set
28# CONFIG_IKCONFIG is not set
29CONFIG_EMBEDDED=y
30# CONFIG_KALLSYMS is not set
31CONFIG_FUTEX=y
32# CONFIG_EPOLL is not set
33CONFIG_IOSCHED_NOOP=y
34CONFIG_IOSCHED_AS=y
35CONFIG_IOSCHED_DEADLINE=y
36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
37
38#
39# Loadable module support
40#
41CONFIG_MODULES=y
42CONFIG_MODULE_UNLOAD=y
43# CONFIG_MODULE_FORCE_UNLOAD is not set
44CONFIG_OBSOLETE_MODPARM=y
45# CONFIG_MODVERSIONS is not set
46CONFIG_KMOD=y
47
48#
49# Processor
50#
51# CONFIG_6xx is not set
52CONFIG_40x=y
53# CONFIG_44x is not set
54# CONFIG_POWER3 is not set
55# CONFIG_POWER4 is not set
56# CONFIG_8xx is not set
57# CONFIG_MATH_EMULATION is not set
58# CONFIG_CPU_FREQ is not set
59CONFIG_4xx=y
60
61#
62# IBM 4xx options
63#
64CONFIG_ASH=y
65# CONFIG_CPCI405 is not set
66# CONFIG_EP405 is not set
67# CONFIG_EVB405EP is not set
68# CONFIG_OAK is not set
69# CONFIG_REDWOOD_5 is not set
70# CONFIG_REDWOOD_6 is not set
71# CONFIG_SYCAMORE is not set
72# CONFIG_WALNUT is not set
73CONFIG_NP405H=y
74CONFIG_IBM405_ERR77=y
75CONFIG_IBM405_ERR51=y
76CONFIG_IBM_OCP=y
77CONFIG_PPC_OCP=y
78CONFIG_IBM_OPENBIOS=y
79# CONFIG_PM is not set
80CONFIG_UART0_TTYS0=y
81# CONFIG_UART0_TTYS1 is not set
82CONFIG_NOT_COHERENT_CACHE=y
83
84#
85# Platform options
86#
87# CONFIG_PC_KEYBOARD is not set
88# CONFIG_SMP is not set
89# CONFIG_PREEMPT is not set
90# CONFIG_HIGHMEM is not set
91CONFIG_KERNEL_ELF=y
92CONFIG_BINFMT_ELF=y
93# CONFIG_BINFMT_MISC is not set
94CONFIG_CMDLINE_BOOL=y
95CONFIG_CMDLINE="ip=on"
96
97#
98# Bus options
99#
100CONFIG_PCI=y
101CONFIG_PCI_DOMAINS=y
102CONFIG_PCI_LEGACY_PROC=y
103# CONFIG_PCI_NAMES is not set
104
105#
106# Advanced setup
107#
108# CONFIG_ADVANCED_OPTIONS is not set
109
110#
111# Default settings for advanced configuration options are used
112#
113CONFIG_HIGHMEM_START=0xfe000000
114CONFIG_LOWMEM_SIZE=0x30000000
115CONFIG_KERNEL_START=0xc0000000
116CONFIG_TASK_SIZE=0x80000000
117CONFIG_BOOT_LOAD=0x00400000
118
119#
120# Device Drivers
121#
122
123#
124# Generic Driver Options
125#
126
127#
128# Memory Technology Devices (MTD)
129#
130# CONFIG_MTD is not set
131
132#
133# Parallel port support
134#
135# CONFIG_PARPORT is not set
136
137#
138# Plug and Play support
139#
140
141#
142# Block devices
143#
144# CONFIG_BLK_DEV_FD is not set
145# CONFIG_BLK_CPQ_DA is not set
146# CONFIG_BLK_CPQ_CISS_DA is not set
147# CONFIG_BLK_DEV_DAC960 is not set
148# CONFIG_BLK_DEV_UMEM is not set
149CONFIG_BLK_DEV_LOOP=y
150# CONFIG_BLK_DEV_CRYPTOLOOP is not set
151# CONFIG_BLK_DEV_NBD is not set
152# CONFIG_BLK_DEV_CARMEL is not set
153CONFIG_BLK_DEV_RAM=y
154CONFIG_BLK_DEV_RAM_SIZE=4096
155CONFIG_BLK_DEV_INITRD=y
156# CONFIG_LBD is not set
157
158#
159# ATA/ATAPI/MFM/RLL support
160#
161# CONFIG_IDE is not set
162
163#
164# SCSI device support
165#
166# CONFIG_SCSI is not set
167
168#
169# Multi-device support (RAID and LVM)
170#
171# CONFIG_MD is not set
172
173#
174# Fusion MPT device support
175#
176# CONFIG_FUSION is not set
177
178#
179# IEEE 1394 (FireWire) support
180#
181# CONFIG_IEEE1394 is not set
182
183#
184# I2O device support
185#
186# CONFIG_I2O is not set
187
188#
189# Macintosh device drivers
190#
191
192#
193# Networking support
194#
195CONFIG_NET=y
196
197#
198# Networking options
199#
200# CONFIG_PACKET is not set
201# CONFIG_NETLINK_DEV is not set
202CONFIG_UNIX=y
203# CONFIG_NET_KEY is not set
204CONFIG_INET=y
205CONFIG_IP_MULTICAST=y
206# CONFIG_IP_ADVANCED_ROUTER is not set
207CONFIG_IP_PNP=y
208# CONFIG_IP_PNP_DHCP is not set
209CONFIG_IP_PNP_BOOTP=y
210# CONFIG_IP_PNP_RARP is not set
211# CONFIG_NET_IPIP is not set
212# CONFIG_NET_IPGRE is not set
213# CONFIG_IP_MROUTE is not set
214# CONFIG_ARPD is not set
215CONFIG_SYN_COOKIES=y
216# CONFIG_INET_AH is not set
217# CONFIG_INET_ESP is not set
218# CONFIG_INET_IPCOMP is not set
219# CONFIG_IPV6 is not set
220# CONFIG_DECNET is not set
221# CONFIG_BRIDGE is not set
222# CONFIG_NETFILTER is not set
223
224#
225# SCTP Configuration (EXPERIMENTAL)
226#
227# CONFIG_IP_SCTP is not set
228# CONFIG_ATM is not set
229# CONFIG_VLAN_8021Q is not set
230# CONFIG_LLC2 is not set
231# CONFIG_IPX is not set
232# CONFIG_ATALK is not set
233# CONFIG_X25 is not set
234# CONFIG_LAPB is not set
235# CONFIG_NET_DIVERT is not set
236# CONFIG_ECONET is not set
237# CONFIG_WAN_ROUTER is not set
238# CONFIG_NET_HW_FLOWCONTROL is not set
239
240#
241# QoS and/or fair queueing
242#
243# CONFIG_NET_SCHED is not set
244
245#
246# Network testing
247#
248# CONFIG_NET_PKTGEN is not set
249CONFIG_NETDEVICES=y
250
251#
252# ARCnet devices
253#
254# CONFIG_ARCNET is not set
255# CONFIG_DUMMY is not set
256# CONFIG_BONDING is not set
257# CONFIG_EQUALIZER is not set
258# CONFIG_TUN is not set
259
260#
261# Ethernet (10 or 100Mbit)
262#
263# CONFIG_NET_ETHERNET is not set
264
265#
266# Ethernet (1000 Mbit)
267#
268# CONFIG_ACENIC is not set
269# CONFIG_DL2K is not set
270# CONFIG_E1000 is not set
271# CONFIG_NS83820 is not set
272# CONFIG_HAMACHI is not set
273# CONFIG_YELLOWFIN is not set
274# CONFIG_R8169 is not set
275# CONFIG_SIS190 is not set
276# CONFIG_SK98LIN is not set
277# CONFIG_TIGON3 is not set
278
279#
280# Ethernet (10000 Mbit)
281#
282# CONFIG_IXGB is not set
283CONFIG_IBM_EMAC=y
284# CONFIG_IBM_EMAC_ERRMSG is not set
285CONFIG_IBM_EMAC_RXB=64
286CONFIG_IBM_EMAC_TXB=8
287CONFIG_IBM_EMAC_FGAP=8
288CONFIG_IBM_EMAC_SKBRES=0
289# CONFIG_FDDI is not set
290# CONFIG_HIPPI is not set
291# CONFIG_PPP is not set
292# CONFIG_SLIP is not set
293
294#
295# Wireless LAN (non-hamradio)
296#
297# CONFIG_NET_RADIO is not set
298
299#
300# Token Ring devices
301#
302# CONFIG_TR is not set
303# CONFIG_RCPCI is not set
304# CONFIG_SHAPER is not set
305# CONFIG_NETCONSOLE is not set
306
307#
308# Wan interfaces
309#
310# CONFIG_WAN is not set
311
312#
313# Amateur Radio support
314#
315# CONFIG_HAMRADIO is not set
316
317#
318# IrDA (infrared) support
319#
320# CONFIG_IRDA is not set
321
322#
323# Bluetooth support
324#
325# CONFIG_BT is not set
326# CONFIG_NETPOLL is not set
327# CONFIG_NET_POLL_CONTROLLER is not set
328
329#
330# ISDN subsystem
331#
332# CONFIG_ISDN is not set
333
334#
335# Telephony Support
336#
337# CONFIG_PHONE is not set
338
339#
340# Input device support
341#
342CONFIG_INPUT=y
343
344#
345# Userland interfaces
346#
347CONFIG_INPUT_MOUSEDEV=y
348CONFIG_INPUT_MOUSEDEV_PSAUX=y
349CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
350CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
351# CONFIG_INPUT_JOYDEV is not set
352# CONFIG_INPUT_TSDEV is not set
353# CONFIG_INPUT_EVDEV is not set
354# CONFIG_INPUT_EVBUG is not set
355
356#
357# Input I/O drivers
358#
359# CONFIG_GAMEPORT is not set
360CONFIG_SOUND_GAMEPORT=y
361CONFIG_SERIO=y
362CONFIG_SERIO_I8042=y
363CONFIG_SERIO_SERPORT=y
364# CONFIG_SERIO_CT82C710 is not set
365# CONFIG_SERIO_PCIPS2 is not set
366
367#
368# Input Device Drivers
369#
370CONFIG_INPUT_KEYBOARD=y
371CONFIG_KEYBOARD_ATKBD=y
372# CONFIG_KEYBOARD_SUNKBD is not set
373# CONFIG_KEYBOARD_LKKBD is not set
374# CONFIG_KEYBOARD_XTKBD is not set
375# CONFIG_KEYBOARD_NEWTON is not set
376CONFIG_INPUT_MOUSE=y
377CONFIG_MOUSE_PS2=y
378# CONFIG_MOUSE_SERIAL is not set
379# CONFIG_MOUSE_VSXXXAA is not set
380# CONFIG_INPUT_JOYSTICK is not set
381# CONFIG_INPUT_TOUCHSCREEN is not set
382# CONFIG_INPUT_MISC is not set
383
384#
385# Character devices
386#
387# CONFIG_VT is not set
388# CONFIG_SERIAL_NONSTANDARD is not set
389
390#
391# Serial drivers
392#
393CONFIG_SERIAL_8250=y
394CONFIG_SERIAL_8250_CONSOLE=y
395CONFIG_SERIAL_8250_NR_UARTS=4
396# CONFIG_SERIAL_8250_EXTENDED is not set
397
398#
399# Non-8250 serial port support
400#
401CONFIG_SERIAL_CORE=y
402CONFIG_SERIAL_CORE_CONSOLE=y
403CONFIG_UNIX98_PTYS=y
404CONFIG_LEGACY_PTYS=y
405CONFIG_LEGACY_PTY_COUNT=256
406# CONFIG_QIC02_TAPE is not set
407
408#
409# IPMI
410#
411# CONFIG_IPMI_HANDLER is not set
412
413#
414# Watchdog Cards
415#
416CONFIG_WATCHDOG=y
417# CONFIG_WATCHDOG_NOWAYOUT is not set
418
419#
420# Watchdog Device Drivers
421#
422# CONFIG_SOFT_WATCHDOG is not set
423
424#
425# PCI-based Watchdog Cards
426#
427# CONFIG_PCIPCWATCHDOG is not set
428# CONFIG_WDTPCI is not set
429# CONFIG_NVRAM is not set
430CONFIG_GEN_RTC=y
431# CONFIG_GEN_RTC_X is not set
432# CONFIG_DTLK is not set
433# CONFIG_R3964 is not set
434# CONFIG_APPLICOM is not set
435
436#
437# Ftape, the floppy tape device driver
438#
439# CONFIG_FTAPE is not set
440# CONFIG_AGP is not set
441# CONFIG_DRM is not set
442# CONFIG_RAW_DRIVER is not set
443
444#
445# I2C support
446#
447CONFIG_I2C=y
448# CONFIG_I2C_CHARDEV is not set
449
450#
451# I2C Algorithms
452#
453# CONFIG_I2C_ALGOBIT is not set
454# CONFIG_I2C_ALGOPCF is not set
455
456#
457# I2C Hardware Bus support
458#
459# CONFIG_I2C_ALI1535 is not set
460# CONFIG_I2C_ALI15X3 is not set
461# CONFIG_I2C_AMD756 is not set
462# CONFIG_I2C_AMD8111 is not set
463# CONFIG_I2C_I801 is not set
464# CONFIG_I2C_I810 is not set
465# CONFIG_I2C_IBM_IIC is not set
466# CONFIG_I2C_ISA is not set
467# CONFIG_I2C_NFORCE2 is not set
468# CONFIG_I2C_PARPORT_LIGHT is not set
469# CONFIG_I2C_PIIX4 is not set
470# CONFIG_I2C_PROSAVAGE is not set
471# CONFIG_I2C_SAVAGE4 is not set
472# CONFIG_SCx200_ACB is not set
473# CONFIG_I2C_SIS5595 is not set
474# CONFIG_I2C_SIS630 is not set
475# CONFIG_I2C_SIS96X is not set
476# CONFIG_I2C_VIA is not set
477# CONFIG_I2C_VIAPRO is not set
478# CONFIG_I2C_VOODOO3 is not set
479
480#
481# Hardware Sensors Chip support
482#
483# CONFIG_I2C_SENSOR is not set
484# CONFIG_SENSORS_ADM1021 is not set
485# CONFIG_SENSORS_ASB100 is not set
486# CONFIG_SENSORS_DS1621 is not set
487# CONFIG_SENSORS_FSCHER is not set
488# CONFIG_SENSORS_GL518SM is not set
489# CONFIG_SENSORS_IT87 is not set
490# CONFIG_SENSORS_LM75 is not set
491# CONFIG_SENSORS_LM78 is not set
492# CONFIG_SENSORS_LM80 is not set
493# CONFIG_SENSORS_LM83 is not set
494# CONFIG_SENSORS_LM85 is not set
495# CONFIG_SENSORS_LM90 is not set
496# CONFIG_SENSORS_VIA686A is not set
497# CONFIG_SENSORS_W83781D is not set
498# CONFIG_SENSORS_W83L785TS is not set
499# CONFIG_SENSORS_W83627HF is not set
500
501#
502# Other I2C Chip support
503#
504# CONFIG_SENSORS_EEPROM is not set
505# CONFIG_I2C_DEBUG_CORE is not set
506# CONFIG_I2C_DEBUG_ALGO is not set
507# CONFIG_I2C_DEBUG_BUS is not set
508# CONFIG_I2C_DEBUG_CHIP is not set
509
510#
511# Misc devices
512#
513
514#
515# Multimedia devices
516#
517# CONFIG_VIDEO_DEV is not set
518
519#
520# Digital Video Broadcasting Devices
521#
522# CONFIG_DVB is not set
523
524#
525# Graphics support
526#
527# CONFIG_FB is not set
528
529#
530# Sound
531#
532# CONFIG_SOUND is not set
533
534#
535# USB support
536#
537# CONFIG_USB is not set
538
539#
540# USB Gadget Support
541#
542# CONFIG_USB_GADGET is not set
543
544#
545# File systems
546#
547CONFIG_EXT2_FS=y
548# CONFIG_EXT2_FS_XATTR is not set
549# CONFIG_EXT3_FS is not set
550# CONFIG_JBD is not set
551# CONFIG_REISERFS_FS is not set
552# CONFIG_JFS_FS is not set
553# CONFIG_XFS_FS is not set
554# CONFIG_MINIX_FS is not set
555# CONFIG_ROMFS_FS is not set
556# CONFIG_QUOTA is not set
557# CONFIG_AUTOFS_FS is not set
558# CONFIG_AUTOFS4_FS is not set
559
560#
561# CD-ROM/DVD Filesystems
562#
563# CONFIG_ISO9660_FS is not set
564# CONFIG_UDF_FS is not set
565
566#
567# DOS/FAT/NT Filesystems
568#
569# CONFIG_FAT_FS is not set
570# CONFIG_NTFS_FS is not set
571
572#
573# Pseudo filesystems
574#
575CONFIG_PROC_FS=y
576CONFIG_PROC_KCORE=y
577# CONFIG_DEVFS_FS is not set
578# CONFIG_DEVPTS_FS_XATTR is not set
579CONFIG_TMPFS=y
580# CONFIG_HUGETLB_PAGE is not set
581CONFIG_RAMFS=y
582
583#
584# Miscellaneous filesystems
585#
586# CONFIG_ADFS_FS is not set
587# CONFIG_AFFS_FS is not set
588# CONFIG_HFS_FS is not set
589# CONFIG_HFSPLUS_FS is not set
590# CONFIG_BEFS_FS is not set
591# CONFIG_BFS_FS is not set
592# CONFIG_EFS_FS is not set
593# CONFIG_CRAMFS is not set
594# CONFIG_VXFS_FS is not set
595# CONFIG_HPFS_FS is not set
596# CONFIG_QNX4FS_FS is not set
597# CONFIG_SYSV_FS is not set
598# CONFIG_UFS_FS is not set
599
600#
601# Network File Systems
602#
603CONFIG_NFS_FS=y
604# CONFIG_NFS_V3 is not set
605# CONFIG_NFS_V4 is not set
606# CONFIG_NFS_DIRECTIO is not set
607# CONFIG_NFSD is not set
608CONFIG_ROOT_NFS=y
609CONFIG_LOCKD=y
610# CONFIG_EXPORTFS is not set
611CONFIG_SUNRPC=y
612# CONFIG_RPCSEC_GSS_KRB5 is not set
613# CONFIG_SMB_FS is not set
614# CONFIG_CIFS is not set
615# CONFIG_NCP_FS is not set
616# CONFIG_CODA_FS is not set
617# CONFIG_INTERMEZZO_FS is not set
618# CONFIG_AFS_FS is not set
619
620#
621# Partition Types
622#
623CONFIG_PARTITION_ADVANCED=y
624# CONFIG_ACORN_PARTITION is not set
625# CONFIG_OSF_PARTITION is not set
626# CONFIG_AMIGA_PARTITION is not set
627# CONFIG_ATARI_PARTITION is not set
628# CONFIG_MAC_PARTITION is not set
629# CONFIG_MSDOS_PARTITION is not set
630# CONFIG_LDM_PARTITION is not set
631# CONFIG_NEC98_PARTITION is not set
632# CONFIG_SGI_PARTITION is not set
633# CONFIG_ULTRIX_PARTITION is not set
634# CONFIG_SUN_PARTITION is not set
635# CONFIG_EFI_PARTITION is not set
636
637#
638# Native Language Support
639#
640# CONFIG_NLS is not set
641
642#
643# IBM 40x options
644#
645
646#
647# Library routines
648#
649CONFIG_CRC32=y
650
651#
652# Kernel hacking
653#
654# CONFIG_DEBUG_KERNEL is not set
655# CONFIG_SERIAL_TEXT_DEBUG is not set
656CONFIG_OCP=y
657
658#
659# Security options
660#
661# CONFIG_SECURITY is not set
662
663#
664# Cryptographic options
665#
666# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/beech_defconfig b/arch/ppc/configs/beech_defconfig
deleted file mode 100644
index 0bd671bdceb4..000000000000
--- a/arch/ppc/configs/beech_defconfig
+++ /dev/null
@@ -1,615 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9
10#
11# Code maturity level options
12#
13CONFIG_EXPERIMENTAL=y
14CONFIG_CLEAN_COMPILE=y
15# CONFIG_STANDALONE is not set
16CONFIG_BROKEN_ON_SMP=y
17
18#
19# General setup
20#
21# CONFIG_SWAP is not set
22CONFIG_SYSVIPC=y
23# CONFIG_BSD_PROCESS_ACCT is not set
24CONFIG_SYSCTL=y
25CONFIG_LOG_BUF_SHIFT=14
26# CONFIG_IKCONFIG is not set
27CONFIG_EMBEDDED=y
28# CONFIG_KALLSYMS is not set
29CONFIG_FUTEX=y
30# CONFIG_EPOLL is not set
31CONFIG_IOSCHED_NOOP=y
32CONFIG_IOSCHED_AS=y
33CONFIG_IOSCHED_DEADLINE=y
34
35#
36# Loadable module support
37#
38CONFIG_MODULES=y
39CONFIG_MODULE_UNLOAD=y
40# CONFIG_MODULE_FORCE_UNLOAD is not set
41CONFIG_OBSOLETE_MODPARM=y
42CONFIG_MODVERSIONS=y
43CONFIG_KMOD=y
44
45#
46# Processor
47#
48# CONFIG_6xx is not set
49CONFIG_40x=y
50# CONFIG_44x is not set
51# CONFIG_POWER3 is not set
52# CONFIG_POWER4 is not set
53# CONFIG_8xx is not set
54# CONFIG_MATH_EMULATION is not set
55# CONFIG_CPU_FREQ is not set
56CONFIG_4xx=y
57
58#
59# IBM 4xx options
60#
61# CONFIG_ASH is not set
62CONFIG_BEECH=y
63# CONFIG_CEDAR is not set
64# CONFIG_CPCI405 is not set
65# CONFIG_EP405 is not set
66# CONFIG_OAK is not set
67# CONFIG_REDWOOD_4 is not set
68# CONFIG_REDWOOD_5 is not set
69# CONFIG_REDWOOD_6 is not set
70# CONFIG_SYCAMORE is not set
71# CONFIG_TIVO is not set
72# CONFIG_WALNUT is not set
73CONFIG_IBM405_ERR77=y
74CONFIG_IBM405_ERR51=y
75CONFIG_IBM_OCP=y
76CONFIG_IBM_OPENBIOS=y
77CONFIG_405_DMA=y
78# CONFIG_PM is not set
79CONFIG_UART0_TTYS0=y
80# CONFIG_UART0_TTYS1 is not set
81CONFIG_NOT_COHERENT_CACHE=y
82
83#
84# Platform options
85#
86# CONFIG_PC_KEYBOARD is not set
87# CONFIG_SMP is not set
88# CONFIG_PREEMPT is not set
89# CONFIG_HIGHMEM is not set
90CONFIG_KERNEL_ELF=y
91CONFIG_BINFMT_ELF=y
92# CONFIG_BINFMT_MISC is not set
93# CONFIG_CMDLINE_BOOL is not set
94
95#
96# Bus options
97#
98# CONFIG_PCI is not set
99# CONFIG_PCI_DOMAINS is not set
100# CONFIG_HOTPLUG is not set
101
102#
103# Parallel port support
104#
105# CONFIG_PARPORT is not set
106
107#
108# Advanced setup
109#
110# CONFIG_ADVANCED_OPTIONS is not set
111
112#
113# Default settings for advanced configuration options are used
114#
115CONFIG_HIGHMEM_START=0xfe000000
116CONFIG_LOWMEM_SIZE=0x30000000
117CONFIG_KERNEL_START=0xc0000000
118CONFIG_TASK_SIZE=0x80000000
119CONFIG_BOOT_LOAD=0x00400000
120
121#
122# Generic Driver Options
123#
124
125#
126# Memory Technology Devices (MTD)
127#
128CONFIG_MTD=y
129# CONFIG_MTD_DEBUG is not set
130CONFIG_MTD_PARTITIONS=y
131# CONFIG_MTD_CONCAT is not set
132# CONFIG_MTD_REDBOOT_PARTS is not set
133# CONFIG_MTD_CMDLINE_PARTS is not set
134
135#
136# User Modules And Translation Layers
137#
138CONFIG_MTD_CHAR=y
139CONFIG_MTD_BLOCK=y
140# CONFIG_FTL is not set
141# CONFIG_NFTL is not set
142# CONFIG_INFTL is not set
143
144#
145# RAM/ROM/Flash chip drivers
146#
147CONFIG_MTD_CFI=y
148CONFIG_MTD_JEDECPROBE=y
149CONFIG_MTD_GEN_PROBE=y
150# CONFIG_MTD_CFI_ADV_OPTIONS is not set
151# CONFIG_MTD_CFI_INTELEXT is not set
152CONFIG_MTD_CFI_AMDSTD=y
153# CONFIG_MTD_CFI_STAA is not set
154# CONFIG_MTD_RAM is not set
155# CONFIG_MTD_ROM is not set
156# CONFIG_MTD_ABSENT is not set
157# CONFIG_MTD_OBSOLETE_CHIPS is not set
158
159#
160# Mapping drivers for chip access
161#
162# CONFIG_MTD_COMPLEX_MAPPINGS is not set
163# CONFIG_MTD_PHYSMAP is not set
164CONFIG_MTD_BEECH=y
165
166#
167# Self-contained MTD device drivers
168#
169# CONFIG_MTD_SLRAM is not set
170# CONFIG_MTD_MTDRAM is not set
171# CONFIG_MTD_BLKMTD is not set
172
173#
174# Disk-On-Chip Device Drivers
175#
176# CONFIG_MTD_DOC2000 is not set
177# CONFIG_MTD_DOC2001 is not set
178# CONFIG_MTD_DOC2001PLUS is not set
179
180#
181# NAND Flash Device Drivers
182#
183# CONFIG_MTD_NAND is not set
184
185#
186# Plug and Play support
187#
188# CONFIG_PNP is not set
189
190#
191# Block devices
192#
193CONFIG_BLK_DEV_LOOP=y
194# CONFIG_BLK_DEV_CRYPTOLOOP is not set
195# CONFIG_BLK_DEV_NBD is not set
196CONFIG_BLK_DEV_RAM=y
197CONFIG_BLK_DEV_RAM_SIZE=4096
198CONFIG_BLK_DEV_INITRD=y
199# CONFIG_LBD is not set
200
201#
202# Multi-device support (RAID and LVM)
203#
204# CONFIG_MD is not set
205
206#
207# ATA/ATAPI/MFM/RLL support
208#
209# CONFIG_IDE is not set
210
211#
212# SCSI device support
213#
214# CONFIG_SCSI is not set
215
216#
217# Fusion MPT device support
218#
219
220#
221# I2O device support
222#
223
224#
225# Networking support
226#
227CONFIG_NET=y
228
229#
230# Networking options
231#
232# CONFIG_PACKET is not set
233# CONFIG_NETLINK_DEV is not set
234CONFIG_UNIX=y
235# CONFIG_NET_KEY is not set
236CONFIG_INET=y
237CONFIG_IP_MULTICAST=y
238# CONFIG_IP_ADVANCED_ROUTER is not set
239CONFIG_IP_PNP=y
240# CONFIG_IP_PNP_DHCP is not set
241CONFIG_IP_PNP_BOOTP=y
242CONFIG_IP_PNP_RARP=y
243# CONFIG_NET_IPIP is not set
244# CONFIG_NET_IPGRE is not set
245# CONFIG_IP_MROUTE is not set
246# CONFIG_ARPD is not set
247# CONFIG_INET_ECN is not set
248CONFIG_SYN_COOKIES=y
249# CONFIG_INET_AH is not set
250# CONFIG_INET_ESP is not set
251# CONFIG_INET_IPCOMP is not set
252# CONFIG_IPV6 is not set
253# CONFIG_DECNET is not set
254# CONFIG_BRIDGE is not set
255# CONFIG_NETFILTER is not set
256
257#
258# SCTP Configuration (EXPERIMENTAL)
259#
260CONFIG_IPV6_SCTP__=y
261# CONFIG_IP_SCTP is not set
262# CONFIG_ATM is not set
263# CONFIG_VLAN_8021Q is not set
264# CONFIG_LLC2 is not set
265# CONFIG_IPX is not set
266# CONFIG_ATALK is not set
267# CONFIG_X25 is not set
268# CONFIG_LAPB is not set
269# CONFIG_NET_DIVERT is not set
270# CONFIG_ECONET is not set
271# CONFIG_WAN_ROUTER is not set
272# CONFIG_NET_HW_FLOWCONTROL is not set
273
274#
275# QoS and/or fair queueing
276#
277# CONFIG_NET_SCHED is not set
278
279#
280# Network testing
281#
282# CONFIG_NET_PKTGEN is not set
283CONFIG_NETDEVICES=y
284# CONFIG_DUMMY is not set
285# CONFIG_BONDING is not set
286# CONFIG_EQUALIZER is not set
287# CONFIG_TUN is not set
288
289#
290# Ethernet (10 or 100Mbit)
291#
292CONFIG_NET_ETHERNET=y
293# CONFIG_MII is not set
294# CONFIG_OAKNET is not set
295
296#
297# Ethernet (1000 Mbit)
298#
299
300#
301# Ethernet (10000 Mbit)
302#
303# CONFIG_PPP is not set
304# CONFIG_SLIP is not set
305
306#
307# Wireless LAN (non-hamradio)
308#
309# CONFIG_NET_RADIO is not set
310
311#
312# Token Ring devices
313#
314# CONFIG_SHAPER is not set
315
316#
317# Wan interfaces
318#
319# CONFIG_WAN is not set
320
321#
322# Amateur Radio support
323#
324# CONFIG_HAMRADIO is not set
325
326#
327# IrDA (infrared) support
328#
329# CONFIG_IRDA is not set
330
331#
332# Bluetooth support
333#
334# CONFIG_BT is not set
335
336#
337# ISDN subsystem
338#
339# CONFIG_ISDN_BOOL is not set
340
341#
342# Graphics support
343#
344CONFIG_FB=y
345# CONFIG_FB_CT65550 is not set
346# CONFIG_FB_S3TRIO is not set
347# CONFIG_FB_VGA16 is not set
348# CONFIG_FB_VIRTUAL is not set
349
350#
351# Logo configuration
352#
353# CONFIG_LOGO is not set
354
355#
356# Input device support
357#
358CONFIG_INPUT=y
359
360#
361# Userland interfaces
362#
363# CONFIG_INPUT_MOUSEDEV is not set
364# CONFIG_INPUT_JOYDEV is not set
365# CONFIG_INPUT_TSDEV is not set
366# CONFIG_INPUT_EVDEV is not set
367# CONFIG_INPUT_EVBUG is not set
368
369#
370# Input I/O drivers
371#
372# CONFIG_GAMEPORT is not set
373CONFIG_SOUND_GAMEPORT=y
374CONFIG_SERIO=y
375# CONFIG_SERIO_I8042 is not set
376# CONFIG_SERIO_SERPORT is not set
377# CONFIG_SERIO_CT82C710 is not set
378
379#
380# Input Device Drivers
381#
382# CONFIG_INPUT_KEYBOARD is not set
383# CONFIG_INPUT_MOUSE is not set
384# CONFIG_INPUT_JOYSTICK is not set
385# CONFIG_INPUT_TOUCHSCREEN is not set
386# CONFIG_INPUT_MISC is not set
387
388#
389# Macintosh device drivers
390#
391
392#
393# Character devices
394#
395# CONFIG_VT is not set
396# CONFIG_SERIAL_NONSTANDARD is not set
397
398#
399# Serial drivers
400#
401CONFIG_SERIAL_8250=y
402CONFIG_SERIAL_8250_CONSOLE=y
403CONFIG_SERIAL_8250_NR_UARTS=4
404# CONFIG_SERIAL_8250_EXTENDED is not set
405
406#
407# Non-8250 serial port support
408#
409CONFIG_SERIAL_CORE=y
410CONFIG_SERIAL_CORE_CONSOLE=y
411CONFIG_UNIX98_PTYS=y
412CONFIG_UNIX98_PTY_COUNT=256
413
414#
415# I2C support
416#
417CONFIG_I2C=y
418# CONFIG_I2C_CHARDEV is not set
419
420#
421# I2C Algorithms
422#
423# CONFIG_I2C_ALGOBIT is not set
424# CONFIG_I2C_ALGOPCF is not set
425
426#
427# I2C Hardware Bus support
428#
429# CONFIG_I2C_AMD756 is not set
430# CONFIG_I2C_AMD8111 is not set
431CONFIG_I2C_IBM_IIC=y
432
433#
434# I2C Hardware Sensors Chip support
435#
436# CONFIG_I2C_SENSOR is not set
437# CONFIG_SENSORS_ADM1021 is not set
438# CONFIG_SENSORS_EEPROM is not set
439# CONFIG_SENSORS_IT87 is not set
440# CONFIG_SENSORS_LM75 is not set
441# CONFIG_SENSORS_LM78 is not set
442# CONFIG_SENSORS_LM85 is not set
443# CONFIG_SENSORS_VIA686A is not set
444# CONFIG_SENSORS_W83781D is not set
445
446#
447# Mice
448#
449# CONFIG_BUSMOUSE is not set
450# CONFIG_QIC02_TAPE is not set
451
452#
453# IPMI
454#
455# CONFIG_IPMI_HANDLER is not set
456
457#
458# Watchdog Cards
459#
460# CONFIG_WATCHDOG is not set
461# CONFIG_NVRAM is not set
462CONFIG_GEN_RTC=y
463# CONFIG_GEN_RTC_X is not set
464# CONFIG_DTLK is not set
465# CONFIG_R3964 is not set
466# CONFIG_APPLICOM is not set
467
468#
469# Ftape, the floppy tape device driver
470#
471# CONFIG_FTAPE is not set
472# CONFIG_AGP is not set
473# CONFIG_DRM is not set
474# CONFIG_RAW_DRIVER is not set
475
476#
477# Multimedia devices
478#
479# CONFIG_VIDEO_DEV is not set
480
481#
482# Digital Video Broadcasting Devices
483#
484# CONFIG_DVB is not set
485
486#
487# File systems
488#
489CONFIG_EXT2_FS=y
490# CONFIG_EXT2_FS_XATTR is not set
491# CONFIG_EXT3_FS is not set
492# CONFIG_JBD is not set
493# CONFIG_REISERFS_FS is not set
494# CONFIG_JFS_FS is not set
495# CONFIG_XFS_FS is not set
496# CONFIG_MINIX_FS is not set
497# CONFIG_ROMFS_FS is not set
498# CONFIG_QUOTA is not set
499# CONFIG_AUTOFS_FS is not set
500# CONFIG_AUTOFS4_FS is not set
501
502#
503# CD-ROM/DVD Filesystems
504#
505# CONFIG_ISO9660_FS is not set
506# CONFIG_UDF_FS is not set
507
508#
509# DOS/FAT/NT Filesystems
510#
511# CONFIG_FAT_FS is not set
512# CONFIG_NTFS_FS is not set
513
514#
515# Pseudo filesystems
516#
517CONFIG_PROC_FS=y
518CONFIG_PROC_KCORE=y
519CONFIG_DEVFS_FS=y
520# CONFIG_DEVFS_MOUNT is not set
521# CONFIG_DEVFS_DEBUG is not set
522CONFIG_DEVPTS_FS=y
523# CONFIG_DEVPTS_FS_XATTR is not set
524CONFIG_TMPFS=y
525# CONFIG_HUGETLB_PAGE is not set
526CONFIG_RAMFS=y
527
528#
529# Miscellaneous filesystems
530#
531# CONFIG_ADFS_FS is not set
532# CONFIG_AFFS_FS is not set
533# CONFIG_HFS_FS is not set
534# CONFIG_BEFS_FS is not set
535# CONFIG_BFS_FS is not set
536# CONFIG_EFS_FS is not set
537# CONFIG_JFFS_FS is not set
538# CONFIG_JFFS2_FS is not set
539# CONFIG_CRAMFS is not set
540# CONFIG_VXFS_FS is not set
541# CONFIG_HPFS_FS is not set
542# CONFIG_QNX4FS_FS is not set
543# CONFIG_SYSV_FS is not set
544# CONFIG_UFS_FS is not set
545
546#
547# Network File Systems
548#
549CONFIG_NFS_FS=y
550# CONFIG_NFS_V3 is not set
551# CONFIG_NFS_V4 is not set
552# CONFIG_NFSD is not set
553CONFIG_ROOT_NFS=y
554CONFIG_LOCKD=y
555# CONFIG_EXPORTFS is not set
556CONFIG_SUNRPC=y
557# CONFIG_SUNRPC_GSS is not set
558# CONFIG_SMB_FS is not set
559# CONFIG_CIFS is not set
560# CONFIG_NCP_FS is not set
561# CONFIG_CODA_FS is not set
562# CONFIG_INTERMEZZO_FS is not set
563# CONFIG_AFS_FS is not set
564
565#
566# Partition Types
567#
568# CONFIG_PARTITION_ADVANCED is not set
569CONFIG_MSDOS_PARTITION=y
570
571#
572# Sound
573#
574CONFIG_SOUND=y
575
576#
577# Advanced Linux Sound Architecture
578#
579# CONFIG_SND is not set
580
581#
582# Open Sound System
583#
584# CONFIG_SOUND_PRIME is not set
585
586#
587# IBM 40x options
588#
589
590#
591# USB support
592#
593# CONFIG_USB_GADGET is not set
594
595#
596# Library routines
597#
598# CONFIG_CRC32 is not set
599
600#
601# Kernel hacking
602#
603# CONFIG_DEBUG_KERNEL is not set
604# CONFIG_SERIAL_TEXT_DEBUG is not set
605CONFIG_OCP=y
606
607#
608# Security options
609#
610# CONFIG_SECURITY is not set
611
612#
613# Cryptographic options
614#
615# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/cedar_defconfig b/arch/ppc/configs/cedar_defconfig
deleted file mode 100644
index 5de8288a0673..000000000000
--- a/arch/ppc/configs/cedar_defconfig
+++ /dev/null
@@ -1,534 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16CONFIG_SWAP=y
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21CONFIG_EMBEDDED=y
22CONFIG_FUTEX=y
23# CONFIG_EPOLL is not set
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y
30# CONFIG_MODULE_FORCE_UNLOAD is not set
31CONFIG_OBSOLETE_MODPARM=y
32# CONFIG_MODVERSIONS is not set
33CONFIG_KMOD=y
34
35#
36# Platform support
37#
38CONFIG_PPC=y
39CONFIG_PPC32=y
40# CONFIG_6xx is not set
41CONFIG_40x=y
42# CONFIG_POWER3 is not set
43# CONFIG_8xx is not set
44CONFIG_4xx=y
45
46#
47# IBM 4xx options
48#
49# CONFIG_ASH is not set
50# CONFIG_BEECH is not set
51CONFIG_CEDAR=y
52# CONFIG_CPCI405 is not set
53# CONFIG_EP405 is not set
54# CONFIG_OAK is not set
55# CONFIG_REDWOOD_4 is not set
56# CONFIG_REDWOOD_5 is not set
57# CONFIG_REDWOOD_6 is not set
58# CONFIG_SYCAMORE is not set
59# CONFIG_TIVO is not set
60# CONFIG_WALNUT is not set
61CONFIG_IBM405_ERR77=y
62CONFIG_IBM405_ERR51=y
63CONFIG_IBM_OCP=y
64CONFIG_NP405L=y
65CONFIG_BIOS_FIXUP=y
66CONFIG_IBM_OPENBIOS=y
67# CONFIG_405_DMA is not set
68# CONFIG_PM is not set
69CONFIG_UART0_TTYS0=y
70# CONFIG_UART0_TTYS1 is not set
71CONFIG_NOT_COHERENT_CACHE=y
72# CONFIG_SMP is not set
73# CONFIG_PREEMPT is not set
74# CONFIG_MATH_EMULATION is not set
75# CONFIG_CPU_FREQ is not set
76
77#
78# General setup
79#
80# CONFIG_HIGHMEM is not set
81# CONFIG_PCI is not set
82# CONFIG_PCI_DOMAINS is not set
83# CONFIG_PC_KEYBOARD is not set
84CONFIG_KCORE_ELF=y
85CONFIG_BINFMT_ELF=y
86CONFIG_KERNEL_ELF=y
87# CONFIG_BINFMT_MISC is not set
88# CONFIG_HOTPLUG is not set
89
90#
91# Parallel port support
92#
93# CONFIG_PARPORT is not set
94# CONFIG_CMDLINE_BOOL is not set
95
96#
97# Advanced setup
98#
99# CONFIG_ADVANCED_OPTIONS is not set
100
101#
102# Default settings for advanced configuration options are used
103#
104CONFIG_HIGHMEM_START=0xfe000000
105CONFIG_LOWMEM_SIZE=0x30000000
106CONFIG_KERNEL_START=0xc0000000
107CONFIG_TASK_SIZE=0x80000000
108CONFIG_BOOT_LOAD=0x00400000
109
110#
111# Memory Technology Devices (MTD)
112#
113# CONFIG_MTD is not set
114
115#
116# Plug and Play support
117#
118# CONFIG_PNP is not set
119
120#
121# Block devices
122#
123# CONFIG_BLK_DEV_FD is not set
124CONFIG_BLK_DEV_LOOP=y
125# CONFIG_BLK_DEV_NBD is not set
126CONFIG_BLK_DEV_RAM=y
127CONFIG_BLK_DEV_RAM_SIZE=4096
128CONFIG_BLK_DEV_INITRD=y
129
130#
131# Multi-device support (RAID and LVM)
132#
133# CONFIG_MD is not set
134
135#
136# ATA/IDE/MFM/RLL support
137#
138# CONFIG_IDE is not set
139
140#
141# SCSI support
142#
143# CONFIG_SCSI is not set
144
145#
146# Fusion MPT device support
147#
148
149#
150# I2O device support
151#
152
153#
154# Networking support
155#
156CONFIG_NET=y
157
158#
159# Networking options
160#
161# CONFIG_PACKET is not set
162# CONFIG_NETLINK_DEV is not set
163# CONFIG_NETFILTER is not set
164CONFIG_UNIX=y
165# CONFIG_NET_KEY is not set
166CONFIG_INET=y
167CONFIG_IP_MULTICAST=y
168# CONFIG_IP_ADVANCED_ROUTER is not set
169CONFIG_IP_PNP=y
170CONFIG_IP_PNP_DHCP=y
171CONFIG_IP_PNP_BOOTP=y
172CONFIG_IP_PNP_RARP=y
173# CONFIG_NET_IPIP is not set
174# CONFIG_NET_IPGRE is not set
175# CONFIG_IP_MROUTE is not set
176# CONFIG_ARPD is not set
177# CONFIG_INET_ECN is not set
178CONFIG_SYN_COOKIES=y
179# CONFIG_INET_AH is not set
180# CONFIG_INET_ESP is not set
181# CONFIG_INET_IPCOMP is not set
182# CONFIG_IPV6 is not set
183# CONFIG_XFRM_USER is not set
184
185#
186# SCTP Configuration (EXPERIMENTAL)
187#
188CONFIG_IPV6_SCTP__=y
189# CONFIG_IP_SCTP is not set
190# CONFIG_ATM is not set
191# CONFIG_VLAN_8021Q is not set
192# CONFIG_LLC is not set
193# CONFIG_DECNET is not set
194# CONFIG_BRIDGE is not set
195# CONFIG_X25 is not set
196# CONFIG_LAPB is not set
197# CONFIG_NET_DIVERT is not set
198# CONFIG_ECONET is not set
199# CONFIG_WAN_ROUTER is not set
200# CONFIG_NET_HW_FLOWCONTROL is not set
201
202#
203# QoS and/or fair queueing
204#
205# CONFIG_NET_SCHED is not set
206
207#
208# Network testing
209#
210# CONFIG_NET_PKTGEN is not set
211CONFIG_NETDEVICES=y
212# CONFIG_DUMMY is not set
213# CONFIG_BONDING is not set
214# CONFIG_EQUALIZER is not set
215# CONFIG_TUN is not set
216# CONFIG_ETHERTAP is not set
217
218#
219# Ethernet (10 or 100Mbit)
220#
221# CONFIG_NET_ETHERNET is not set
222
223#
224# Ethernet (1000 Mbit)
225#
226
227#
228# Ethernet (10000 Mbit)
229#
230# CONFIG_PPP is not set
231# CONFIG_SLIP is not set
232
233#
234# Wireless LAN (non-hamradio)
235#
236# CONFIG_NET_RADIO is not set
237
238#
239# Token Ring devices (depends on LLC=y)
240#
241# CONFIG_SHAPER is not set
242
243#
244# Wan interfaces
245#
246# CONFIG_WAN is not set
247
248#
249# Amateur Radio support
250#
251# CONFIG_HAMRADIO is not set
252
253#
254# IrDA (infrared) support
255#
256# CONFIG_IRDA is not set
257
258#
259# ISDN subsystem
260#
261# CONFIG_ISDN_BOOL is not set
262
263#
264# Graphics support
265#
266# CONFIG_FB is not set
267
268#
269# Old CD-ROM drivers (not SCSI, not IDE)
270#
271# CONFIG_CD_NO_IDESCSI is not set
272
273#
274# Input device support
275#
276# CONFIG_INPUT is not set
277
278#
279# Userland interfaces
280#
281
282#
283# Input I/O drivers
284#
285# CONFIG_GAMEPORT is not set
286CONFIG_SOUND_GAMEPORT=y
287# CONFIG_SERIO is not set
288
289#
290# Input Device Drivers
291#
292
293#
294# Macintosh device drivers
295#
296
297#
298# Character devices
299#
300# CONFIG_SERIAL_NONSTANDARD is not set
301
302#
303# Serial drivers
304#
305CONFIG_SERIAL_8250=y
306CONFIG_SERIAL_8250_CONSOLE=y
307# CONFIG_SERIAL_8250_EXTENDED is not set
308
309#
310# Non-8250 serial port support
311#
312CONFIG_SERIAL_CORE=y
313CONFIG_SERIAL_CORE_CONSOLE=y
314CONFIG_UNIX98_PTYS=y
315CONFIG_UNIX98_PTY_COUNT=256
316
317#
318# I2C support
319#
320CONFIG_I2C=y
321# CONFIG_I2C_ALGOBIT is not set
322# CONFIG_I2C_ALGOPCF is not set
323CONFIG_I2C_IBM_OCP_ALGO=y
324CONFIG_I2C_IBM_OCP_ADAP=y
325# CONFIG_I2C_CHARDEV is not set
326
327#
328# I2C Hardware Sensors Mainboard support
329#
330# CONFIG_I2C_AMD756 is not set
331# CONFIG_I2C_AMD8111 is not set
332
333#
334# I2C Hardware Sensors Chip support
335#
336# CONFIG_SENSORS_ADM1021 is not set
337# CONFIG_SENSORS_IT87 is not set
338# CONFIG_SENSORS_LM75 is not set
339# CONFIG_SENSORS_LM85 is not set
340# CONFIG_SENSORS_VIA686A is not set
341# CONFIG_SENSORS_W83781D is not set
342# CONFIG_I2C_SENSOR is not set
343
344#
345# Mice
346#
347# CONFIG_BUSMOUSE is not set
348# CONFIG_QIC02_TAPE is not set
349
350#
351# IPMI
352#
353# CONFIG_IPMI_HANDLER is not set
354
355#
356# Watchdog Cards
357#
358CONFIG_WATCHDOG=y
359# CONFIG_WATCHDOG_NOWAYOUT is not set
360# CONFIG_SOFT_WATCHDOG is not set
361# CONFIG_WDT is not set
362# CONFIG_WDTPCI is not set
363# CONFIG_PCWATCHDOG is not set
364# CONFIG_ACQUIRE_WDT is not set
365# CONFIG_ADVANTECH_WDT is not set
366# CONFIG_EUROTECH_WDT is not set
367# CONFIG_IB700_WDT is not set
368# CONFIG_MIXCOMWD is not set
369# CONFIG_SCx200_WDT is not set
370# CONFIG_60XX_WDT is not set
371# CONFIG_W83877F_WDT is not set
372# CONFIG_MACHZ_WDT is not set
373# CONFIG_SC520_WDT is not set
374# CONFIG_AMD7XX_TCO is not set
375# CONFIG_ALIM7101_WDT is not set
376# CONFIG_SC1200_WDT is not set
377# CONFIG_WAFER_WDT is not set
378# CONFIG_CPU5_WDT is not set
379# CONFIG_NVRAM is not set
380# CONFIG_GEN_RTC is not set
381# CONFIG_DTLK is not set
382# CONFIG_R3964 is not set
383# CONFIG_APPLICOM is not set
384
385#
386# Ftape, the floppy tape device driver
387#
388# CONFIG_FTAPE is not set
389# CONFIG_AGP is not set
390# CONFIG_DRM is not set
391# CONFIG_RAW_DRIVER is not set
392# CONFIG_HANGCHECK_TIMER is not set
393
394#
395# Multimedia devices
396#
397# CONFIG_VIDEO_DEV is not set
398
399#
400# Digital Video Broadcasting Devices
401#
402# CONFIG_DVB is not set
403
404#
405# File systems
406#
407CONFIG_EXT2_FS=y
408# CONFIG_EXT2_FS_XATTR is not set
409# CONFIG_EXT3_FS is not set
410# CONFIG_JBD is not set
411# CONFIG_REISERFS_FS is not set
412# CONFIG_JFS_FS is not set
413# CONFIG_XFS_FS is not set
414# CONFIG_MINIX_FS is not set
415# CONFIG_ROMFS_FS is not set
416# CONFIG_QUOTA is not set
417# CONFIG_AUTOFS_FS is not set
418# CONFIG_AUTOFS4_FS is not set
419
420#
421# CD-ROM/DVD Filesystems
422#
423# CONFIG_ISO9660_FS is not set
424# CONFIG_UDF_FS is not set
425
426#
427# DOS/FAT/NT Filesystems
428#
429# CONFIG_FAT_FS is not set
430# CONFIG_NTFS_FS is not set
431
432#
433# Pseudo filesystems
434#
435CONFIG_PROC_FS=y
436# CONFIG_DEVFS_FS is not set
437CONFIG_DEVPTS_FS=y
438# CONFIG_DEVPTS_FS_XATTR is not set
439CONFIG_TMPFS=y
440CONFIG_RAMFS=y
441
442#
443# Miscellaneous filesystems
444#
445# CONFIG_ADFS_FS is not set
446# CONFIG_AFFS_FS is not set
447# CONFIG_HFS_FS is not set
448# CONFIG_BEFS_FS is not set
449# CONFIG_BFS_FS is not set
450# CONFIG_EFS_FS is not set
451# CONFIG_CRAMFS is not set
452# CONFIG_VXFS_FS is not set
453# CONFIG_HPFS_FS is not set
454# CONFIG_QNX4FS_FS is not set
455# CONFIG_SYSV_FS is not set
456# CONFIG_UFS_FS is not set
457
458#
459# Network File Systems
460#
461CONFIG_NFS_FS=y
462# CONFIG_NFS_V3 is not set
463# CONFIG_NFS_V4 is not set
464# CONFIG_NFSD is not set
465CONFIG_ROOT_NFS=y
466CONFIG_LOCKD=y
467# CONFIG_EXPORTFS is not set
468CONFIG_SUNRPC=y
469# CONFIG_SUNRPC_GSS is not set
470# CONFIG_SMB_FS is not set
471# CONFIG_CIFS is not set
472# CONFIG_NCP_FS is not set
473# CONFIG_CODA_FS is not set
474# CONFIG_INTERMEZZO_FS is not set
475# CONFIG_AFS_FS is not set
476
477#
478# Partition Types
479#
480CONFIG_PARTITION_ADVANCED=y
481# CONFIG_ACORN_PARTITION is not set
482# CONFIG_OSF_PARTITION is not set
483# CONFIG_AMIGA_PARTITION is not set
484# CONFIG_ATARI_PARTITION is not set
485# CONFIG_MAC_PARTITION is not set
486# CONFIG_MSDOS_PARTITION is not set
487# CONFIG_LDM_PARTITION is not set
488# CONFIG_NEC98_PARTITION is not set
489# CONFIG_SGI_PARTITION is not set
490# CONFIG_ULTRIX_PARTITION is not set
491# CONFIG_SUN_PARTITION is not set
492# CONFIG_EFI_PARTITION is not set
493
494#
495# Sound
496#
497# CONFIG_SOUND is not set
498
499#
500# IBM 40x options
501#
502
503#
504# USB support
505#
506# CONFIG_USB_GADGET is not set
507
508#
509# Bluetooth support
510#
511# CONFIG_BT is not set
512
513#
514# Library routines
515#
516CONFIG_CRC32=y
517
518#
519# Kernel hacking
520#
521# CONFIG_DEBUG_KERNEL is not set
522# CONFIG_KALLSYMS is not set
523# CONFIG_SERIAL_TEXT_DEBUG is not set
524CONFIG_OCP=y
525
526#
527# Security options
528#
529# CONFIG_SECURITY is not set
530
531#
532# Cryptographic options
533#
534# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/cpci690_defconfig b/arch/ppc/configs/cpci690_defconfig
index 53948793d9af..ff3f7e02ab0f 100644
--- a/arch/ppc/configs/cpci690_defconfig
+++ b/arch/ppc/configs/cpci690_defconfig
@@ -1,15 +1,17 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.10-rc2 3# Linux kernel version: 2.6.13-mm1
4# Fri Dec 3 15:56:10 2004 4# Thu Sep 1 17:10:37 2005
5# 5#
6CONFIG_MMU=y 6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y 7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y 8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
9CONFIG_HAVE_DEC_LOCK=y 10CONFIG_HAVE_DEC_LOCK=y
10CONFIG_PPC=y 11CONFIG_PPC=y
11CONFIG_PPC32=y 12CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y 13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
13 15
14# 16#
15# Code maturity level options 17# Code maturity level options
@@ -17,33 +19,38 @@ CONFIG_GENERIC_NVRAM=y
17CONFIG_EXPERIMENTAL=y 19CONFIG_EXPERIMENTAL=y
18CONFIG_CLEAN_COMPILE=y 20CONFIG_CLEAN_COMPILE=y
19CONFIG_BROKEN_ON_SMP=y 21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
20 23
21# 24#
22# General setup 25# General setup
23# 26#
24CONFIG_LOCALVERSION="" 27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
25# CONFIG_SWAP is not set 29# CONFIG_SWAP is not set
26CONFIG_SYSVIPC=y 30CONFIG_SYSVIPC=y
27# CONFIG_POSIX_MQUEUE is not set 31# CONFIG_POSIX_MQUEUE is not set
28# CONFIG_BSD_PROCESS_ACCT is not set 32# CONFIG_BSD_PROCESS_ACCT is not set
29CONFIG_SYSCTL=y 33CONFIG_SYSCTL=y
30# CONFIG_AUDIT is not set 34# CONFIG_AUDIT is not set
31CONFIG_LOG_BUF_SHIFT=14
32# CONFIG_HOTPLUG is not set 35# CONFIG_HOTPLUG is not set
33CONFIG_KOBJECT_UEVENT=y 36CONFIG_KOBJECT_UEVENT=y
34# CONFIG_IKCONFIG is not set 37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
35# CONFIG_EMBEDDED is not set 39# CONFIG_EMBEDDED is not set
36CONFIG_KALLSYMS=y 40CONFIG_KALLSYMS=y
37# CONFIG_KALLSYMS_EXTRA_PASS is not set 41# CONFIG_KALLSYMS_EXTRA_PASS is not set
42CONFIG_PRINTK=y
43CONFIG_BUG=y
44CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y 45CONFIG_FUTEX=y
39CONFIG_EPOLL=y 46CONFIG_EPOLL=y
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SHMEM=y 47CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0 48CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0 49CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0 50CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0 51CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set 52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
47 54
48# 55#
49# Loadable module support 56# Loadable module support
@@ -65,38 +72,42 @@ CONFIG_6xx=y
65# CONFIG_POWER3 is not set 72# CONFIG_POWER3 is not set
66# CONFIG_POWER4 is not set 73# CONFIG_POWER4 is not set
67# CONFIG_8xx is not set 74# CONFIG_8xx is not set
75# CONFIG_E200 is not set
68# CONFIG_E500 is not set 76# CONFIG_E500 is not set
77CONFIG_PPC_FPU=y
69CONFIG_ALTIVEC=y 78CONFIG_ALTIVEC=y
70# CONFIG_TAU is not set 79# CONFIG_TAU is not set
80# CONFIG_KEXEC is not set
71# CONFIG_CPU_FREQ is not set 81# CONFIG_CPU_FREQ is not set
82# CONFIG_WANT_EARLY_SERIAL is not set
72CONFIG_PPC_STD_MMU=y 83CONFIG_PPC_STD_MMU=y
73# CONFIG_NOT_COHERENT_CACHE is not set 84# CONFIG_NOT_COHERENT_CACHE is not set
74 85
75# 86#
87# Performance-monitoring counters support
88#
89# CONFIG_PERFCTR is not set
90
91#
76# Platform options 92# Platform options
77# 93#
78# CONFIG_PPC_MULTIPLATFORM is not set 94# CONFIG_PPC_MULTIPLATFORM is not set
79# CONFIG_APUS is not set 95# CONFIG_APUS is not set
80# CONFIG_KATANA is not set 96# CONFIG_KATANA is not set
81# CONFIG_DMV182 is not set
82# CONFIG_WILLOW is not set 97# CONFIG_WILLOW is not set
83CONFIG_CPCI690=y 98CONFIG_CPCI690=y
84# CONFIG_PCORE is not set
85# CONFIG_POWERPMC250 is not set 99# CONFIG_POWERPMC250 is not set
86# CONFIG_EV64260 is not set
87# CONFIG_DB64360 is not set
88# CONFIG_CHESTNUT is not set 100# CONFIG_CHESTNUT is not set
89# CONFIG_SPRUCE is not set 101# CONFIG_SPRUCE is not set
102# CONFIG_HDPU is not set
103# CONFIG_EV64260 is not set
90# CONFIG_LOPEC is not set 104# CONFIG_LOPEC is not set
91# CONFIG_MCPN765 is not set
92# CONFIG_MVME5100 is not set 105# CONFIG_MVME5100 is not set
93# CONFIG_PPLUS is not set 106# CONFIG_PPLUS is not set
94# CONFIG_PRPMC750 is not set 107# CONFIG_PRPMC750 is not set
95# CONFIG_PRPMC800 is not set 108# CONFIG_PRPMC800 is not set
96# CONFIG_PRPMC880 is not set
97# CONFIG_SANDPOINT is not set 109# CONFIG_SANDPOINT is not set
98# CONFIG_ADIR is not set 110# CONFIG_RADSTONE_PPC7D is not set
99# CONFIG_K2 is not set
100# CONFIG_PAL4 is not set 111# CONFIG_PAL4 is not set
101# CONFIG_GEMINI is not set 112# CONFIG_GEMINI is not set
102# CONFIG_EST8260 is not set 113# CONFIG_EST8260 is not set
@@ -105,22 +116,41 @@ CONFIG_CPCI690=y
105# CONFIG_RPX8260 is not set 116# CONFIG_RPX8260 is not set
106# CONFIG_TQM8260 is not set 117# CONFIG_TQM8260 is not set
107# CONFIG_ADS8272 is not set 118# CONFIG_ADS8272 is not set
119# CONFIG_PQ2FADS is not set
108# CONFIG_LITE5200 is not set 120# CONFIG_LITE5200 is not set
121# CONFIG_MPC834x_SYS is not set
122# CONFIG_EV64360 is not set
123CONFIG_GT64260=y
124CONFIG_MV64X60=y
109 125
110# 126#
111# Set bridge options 127# Set bridge options
112# 128#
113CONFIG_MV64X60_BASE=0xf1000000 129CONFIG_MV64X60_BASE=0xf1000000
114CONFIG_MV64X60_NEW_BASE=0xf1000000 130CONFIG_MV64X60_NEW_BASE=0xf1000000
115CONFIG_GT64260=y
116CONFIG_MV64X60=y
117# CONFIG_SMP is not set 131# CONFIG_SMP is not set
132CONFIG_HIGHMEM=y
133CONFIG_HZ_100=y
134# CONFIG_HZ_250 is not set
135# CONFIG_HZ_1000 is not set
136CONFIG_HZ=100
137CONFIG_PREEMPT_NONE=y
138# CONFIG_PREEMPT_VOLUNTARY is not set
118# CONFIG_PREEMPT is not set 139# CONFIG_PREEMPT is not set
119# CONFIG_HIGHMEM is not set 140CONFIG_SELECT_MEMORY_MODEL=y
141CONFIG_FLATMEM_MANUAL=y
142# CONFIG_DISCONTIGMEM_MANUAL is not set
143# CONFIG_SPARSEMEM_MANUAL is not set
144CONFIG_FLATMEM=y
145CONFIG_FLAT_NODE_MEM_MAP=y
146# CONFIG_SPARSEMEM_STATIC is not set
120CONFIG_BINFMT_ELF=y 147CONFIG_BINFMT_ELF=y
121CONFIG_BINFMT_MISC=y 148CONFIG_BINFMT_MISC=y
122CONFIG_CMDLINE_BOOL=y 149CONFIG_CMDLINE_BOOL=y
123CONFIG_CMDLINE="console=ttyMM0,9600 ip=on" 150CONFIG_CMDLINE="console=ttyMM0 ip=on"
151# CONFIG_PM is not set
152CONFIG_SECCOMP=y
153CONFIG_ISA_DMA_API=y
124 154
125# 155#
126# Bus options 156# Bus options
@@ -129,7 +159,11 @@ CONFIG_GENERIC_ISA_DMA=y
129CONFIG_PCI=y 159CONFIG_PCI=y
130CONFIG_PCI_DOMAINS=y 160CONFIG_PCI_DOMAINS=y
131CONFIG_PCI_LEGACY_PROC=y 161CONFIG_PCI_LEGACY_PROC=y
132CONFIG_PCI_NAMES=y 162
163#
164# PCCARD (PCMCIA/CardBus) support
165#
166# CONFIG_PCCARD is not set
133 167
134# 168#
135# Advanced setup 169# Advanced setup
@@ -146,6 +180,76 @@ CONFIG_TASK_SIZE=0x80000000
146CONFIG_BOOT_LOAD=0x00800000 180CONFIG_BOOT_LOAD=0x00800000
147 181
148# 182#
183# Networking
184#
185CONFIG_NET=y
186
187#
188# Networking options
189#
190CONFIG_PACKET=y
191# CONFIG_PACKET_MMAP is not set
192CONFIG_UNIX=y
193# CONFIG_NET_KEY is not set
194CONFIG_INET=y
195CONFIG_IP_MULTICAST=y
196# CONFIG_IP_ADVANCED_ROUTER is not set
197CONFIG_IP_FIB_HASH=y
198CONFIG_IP_PNP=y
199CONFIG_IP_PNP_DHCP=y
200# CONFIG_IP_PNP_BOOTP is not set
201# CONFIG_IP_PNP_RARP is not set
202# CONFIG_NET_IPIP is not set
203# CONFIG_NET_IPGRE is not set
204# CONFIG_IP_MROUTE is not set
205# CONFIG_ARPD is not set
206CONFIG_SYN_COOKIES=y
207# CONFIG_INET_AH is not set
208# CONFIG_INET_ESP is not set
209# CONFIG_INET_IPCOMP is not set
210# CONFIG_INET_TUNNEL is not set
211CONFIG_INET_DIAG=y
212CONFIG_INET_TCP_DIAG=y
213# CONFIG_TCP_CONG_ADVANCED is not set
214CONFIG_TCP_CONG_BIC=y
215# CONFIG_IPV6 is not set
216# CONFIG_NETFILTER is not set
217
218#
219# DCCP Configuration (EXPERIMENTAL)
220#
221# CONFIG_IP_DCCP is not set
222
223#
224# SCTP Configuration (EXPERIMENTAL)
225#
226# CONFIG_IP_SCTP is not set
227# CONFIG_ATM is not set
228# CONFIG_BRIDGE is not set
229# CONFIG_VLAN_8021Q is not set
230# CONFIG_DECNET is not set
231# CONFIG_LLC2 is not set
232# CONFIG_IPX is not set
233# CONFIG_ATALK is not set
234# CONFIG_X25 is not set
235# CONFIG_LAPB is not set
236# CONFIG_NET_DIVERT is not set
237# CONFIG_ECONET is not set
238# CONFIG_WAN_ROUTER is not set
239# CONFIG_NET_SCHED is not set
240# CONFIG_NET_CLS_ROUTE is not set
241
242#
243# Network testing
244#
245# CONFIG_NET_PKTGEN is not set
246# CONFIG_NETFILTER_NETLINK is not set
247# CONFIG_HAMRADIO is not set
248# CONFIG_IRDA is not set
249# CONFIG_BT is not set
250# CONFIG_IEEE80211 is not set
251
252#
149# Device Drivers 253# Device Drivers
150# 254#
151 255
@@ -154,6 +258,7 @@ CONFIG_BOOT_LOAD=0x00800000
154# 258#
155CONFIG_STANDALONE=y 259CONFIG_STANDALONE=y
156CONFIG_PREVENT_FIRMWARE_BUILD=y 260CONFIG_PREVENT_FIRMWARE_BUILD=y
261# CONFIG_FW_LOADER is not set
157 262
158# 263#
159# Memory Technology Devices (MTD) 264# Memory Technology Devices (MTD)
@@ -177,6 +282,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
177# CONFIG_BLK_CPQ_CISS_DA is not set 282# CONFIG_BLK_CPQ_CISS_DA is not set
178# CONFIG_BLK_DEV_DAC960 is not set 283# CONFIG_BLK_DEV_DAC960 is not set
179# CONFIG_BLK_DEV_UMEM is not set 284# CONFIG_BLK_DEV_UMEM is not set
285# CONFIG_BLK_DEV_COW_COMMON is not set
180CONFIG_BLK_DEV_LOOP=y 286CONFIG_BLK_DEV_LOOP=y
181# CONFIG_BLK_DEV_CRYPTOLOOP is not set 287# CONFIG_BLK_DEV_CRYPTOLOOP is not set
182# CONFIG_BLK_DEV_NBD is not set 288# CONFIG_BLK_DEV_NBD is not set
@@ -185,7 +291,6 @@ CONFIG_BLK_DEV_RAM=y
185CONFIG_BLK_DEV_RAM_COUNT=16 291CONFIG_BLK_DEV_RAM_COUNT=16
186CONFIG_BLK_DEV_RAM_SIZE=4096 292CONFIG_BLK_DEV_RAM_SIZE=4096
187CONFIG_BLK_DEV_INITRD=y 293CONFIG_BLK_DEV_INITRD=y
188CONFIG_INITRAMFS_SOURCE=""
189# CONFIG_LBD is not set 294# CONFIG_LBD is not set
190# CONFIG_CDROM_PKTCDVD is not set 295# CONFIG_CDROM_PKTCDVD is not set
191 296
@@ -196,6 +301,7 @@ CONFIG_IOSCHED_NOOP=y
196CONFIG_IOSCHED_AS=y 301CONFIG_IOSCHED_AS=y
197CONFIG_IOSCHED_DEADLINE=y 302CONFIG_IOSCHED_DEADLINE=y
198CONFIG_IOSCHED_CFQ=y 303CONFIG_IOSCHED_CFQ=y
304# CONFIG_ATA_OVER_ETH is not set
199 305
200# 306#
201# ATA/ATAPI/MFM/RLL support 307# ATA/ATAPI/MFM/RLL support
@@ -205,6 +311,7 @@ CONFIG_IOSCHED_CFQ=y
205# 311#
206# SCSI device support 312# SCSI device support
207# 313#
314# CONFIG_RAID_ATTRS is not set
208# CONFIG_SCSI is not set 315# CONFIG_SCSI is not set
209 316
210# 317#
@@ -215,6 +322,7 @@ CONFIG_IOSCHED_CFQ=y
215# 322#
216# Fusion MPT device support 323# Fusion MPT device support
217# 324#
325# CONFIG_FUSION is not set
218 326
219# 327#
220# IEEE 1394 (FireWire) support 328# IEEE 1394 (FireWire) support
@@ -231,71 +339,8 @@ CONFIG_IOSCHED_CFQ=y
231# 339#
232 340
233# 341#
234# Networking support 342# Network device support
235# 343#
236CONFIG_NET=y
237
238#
239# Networking options
240#
241CONFIG_PACKET=y
242# CONFIG_PACKET_MMAP is not set
243# CONFIG_NETLINK_DEV is not set
244CONFIG_UNIX=y
245# CONFIG_NET_KEY is not set
246CONFIG_INET=y
247CONFIG_IP_MULTICAST=y
248# CONFIG_IP_ADVANCED_ROUTER is not set
249CONFIG_IP_PNP=y
250CONFIG_IP_PNP_DHCP=y
251# CONFIG_IP_PNP_BOOTP is not set
252# CONFIG_IP_PNP_RARP is not set
253# CONFIG_NET_IPIP is not set
254# CONFIG_NET_IPGRE is not set
255# CONFIG_IP_MROUTE is not set
256# CONFIG_ARPD is not set
257CONFIG_SYN_COOKIES=y
258# CONFIG_INET_AH is not set
259# CONFIG_INET_ESP is not set
260# CONFIG_INET_IPCOMP is not set
261# CONFIG_INET_TUNNEL is not set
262CONFIG_IP_TCPDIAG=y
263# CONFIG_IP_TCPDIAG_IPV6 is not set
264# CONFIG_IPV6 is not set
265# CONFIG_NETFILTER is not set
266
267#
268# SCTP Configuration (EXPERIMENTAL)
269#
270# CONFIG_IP_SCTP is not set
271# CONFIG_ATM is not set
272# CONFIG_BRIDGE is not set
273# CONFIG_VLAN_8021Q is not set
274# CONFIG_DECNET is not set
275# CONFIG_LLC2 is not set
276# CONFIG_IPX is not set
277# CONFIG_ATALK is not set
278# CONFIG_X25 is not set
279# CONFIG_LAPB is not set
280# CONFIG_NET_DIVERT is not set
281# CONFIG_ECONET is not set
282# CONFIG_WAN_ROUTER is not set
283
284#
285# QoS and/or fair queueing
286#
287# CONFIG_NET_SCHED is not set
288# CONFIG_NET_CLS_ROUTE is not set
289
290#
291# Network testing
292#
293# CONFIG_NET_PKTGEN is not set
294# CONFIG_NETPOLL is not set
295# CONFIG_NET_POLL_CONTROLLER is not set
296# CONFIG_HAMRADIO is not set
297# CONFIG_IRDA is not set
298# CONFIG_BT is not set
299CONFIG_NETDEVICES=y 344CONFIG_NETDEVICES=y
300# CONFIG_DUMMY is not set 345# CONFIG_DUMMY is not set
301# CONFIG_BONDING is not set 346# CONFIG_BONDING is not set
@@ -308,6 +353,11 @@ CONFIG_NETDEVICES=y
308# CONFIG_ARCNET is not set 353# CONFIG_ARCNET is not set
309 354
310# 355#
356# PHY device support
357#
358# CONFIG_PHYLIB is not set
359
360#
311# Ethernet (10 or 100Mbit) 361# Ethernet (10 or 100Mbit)
312# 362#
313CONFIG_NET_ETHERNET=y 363CONFIG_NET_ETHERNET=y
@@ -328,6 +378,7 @@ CONFIG_TULIP=y
328# CONFIG_DE4X5 is not set 378# CONFIG_DE4X5 is not set
329# CONFIG_WINBOND_840 is not set 379# CONFIG_WINBOND_840 is not set
330# CONFIG_DM9102 is not set 380# CONFIG_DM9102 is not set
381# CONFIG_ULI526X is not set
331# CONFIG_HP100 is not set 382# CONFIG_HP100 is not set
332CONFIG_NET_PCI=y 383CONFIG_NET_PCI=y
333# CONFIG_PCNET32 is not set 384# CONFIG_PCNET32 is not set
@@ -337,7 +388,6 @@ CONFIG_NET_PCI=y
337# CONFIG_FORCEDETH is not set 388# CONFIG_FORCEDETH is not set
338# CONFIG_DGRS is not set 389# CONFIG_DGRS is not set
339CONFIG_EEPRO100=y 390CONFIG_EEPRO100=y
340# CONFIG_EEPRO100_PIO is not set
341# CONFIG_E100 is not set 391# CONFIG_E100 is not set
342# CONFIG_FEALNX is not set 392# CONFIG_FEALNX is not set
343# CONFIG_NATSEMI is not set 393# CONFIG_NATSEMI is not set
@@ -360,13 +410,18 @@ CONFIG_EEPRO100=y
360# CONFIG_HAMACHI is not set 410# CONFIG_HAMACHI is not set
361# CONFIG_YELLOWFIN is not set 411# CONFIG_YELLOWFIN is not set
362# CONFIG_R8169 is not set 412# CONFIG_R8169 is not set
413# CONFIG_SIS190 is not set
414# CONFIG_SKGE is not set
415# CONFIG_SKY2 is not set
363# CONFIG_SK98LIN is not set 416# CONFIG_SK98LIN is not set
364# CONFIG_VIA_VELOCITY is not set 417# CONFIG_VIA_VELOCITY is not set
365# CONFIG_TIGON3 is not set 418# CONFIG_TIGON3 is not set
419# CONFIG_BNX2 is not set
366 420
367# 421#
368# Ethernet (10000 Mbit) 422# Ethernet (10000 Mbit)
369# 423#
424# CONFIG_CHELSIO_T1 is not set
370# CONFIG_IXGB is not set 425# CONFIG_IXGB is not set
371# CONFIG_S2IO is not set 426# CONFIG_S2IO is not set
372 427
@@ -390,6 +445,11 @@ CONFIG_EEPRO100=y
390# CONFIG_SLIP is not set 445# CONFIG_SLIP is not set
391# CONFIG_SHAPER is not set 446# CONFIG_SHAPER is not set
392# CONFIG_NETCONSOLE is not set 447# CONFIG_NETCONSOLE is not set
448# CONFIG_KGDBOE is not set
449# CONFIG_NETPOLL is not set
450# CONFIG_NETPOLL_RX is not set
451# CONFIG_NETPOLL_TRAP is not set
452# CONFIG_NET_POLL_CONTROLLER is not set
393 453
394# 454#
395# ISDN subsystem 455# ISDN subsystem
@@ -419,14 +479,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
419# CONFIG_INPUT_EVBUG is not set 479# CONFIG_INPUT_EVBUG is not set
420 480
421# 481#
422# Input I/O drivers
423#
424# CONFIG_GAMEPORT is not set
425CONFIG_SOUND_GAMEPORT=y
426# CONFIG_SERIO is not set
427# CONFIG_SERIO_I8042 is not set
428
429#
430# Input Device Drivers 482# Input Device Drivers
431# 483#
432# CONFIG_INPUT_KEYBOARD is not set 484# CONFIG_INPUT_KEYBOARD is not set
@@ -436,6 +488,12 @@ CONFIG_SOUND_GAMEPORT=y
436# CONFIG_INPUT_MISC is not set 488# CONFIG_INPUT_MISC is not set
437 489
438# 490#
491# Hardware I/O ports
492#
493# CONFIG_SERIO is not set
494# CONFIG_GAMEPORT is not set
495
496#
439# Character devices 497# Character devices
440# 498#
441CONFIG_VT=y 499CONFIG_VT=y
@@ -455,6 +513,7 @@ CONFIG_SERIAL_MPSC=y
455CONFIG_SERIAL_MPSC_CONSOLE=y 513CONFIG_SERIAL_MPSC_CONSOLE=y
456CONFIG_SERIAL_CORE=y 514CONFIG_SERIAL_CORE=y
457CONFIG_SERIAL_CORE_CONSOLE=y 515CONFIG_SERIAL_CORE_CONSOLE=y
516# CONFIG_SERIAL_JSM is not set
458CONFIG_UNIX98_PTYS=y 517CONFIG_UNIX98_PTYS=y
459CONFIG_LEGACY_PTYS=y 518CONFIG_LEGACY_PTYS=y
460CONFIG_LEGACY_PTY_COUNT=256 519CONFIG_LEGACY_PTY_COUNT=256
@@ -483,6 +542,11 @@ CONFIG_GEN_RTC=y
483# CONFIG_RAW_DRIVER is not set 542# CONFIG_RAW_DRIVER is not set
484 543
485# 544#
545# TPM devices
546#
547# CONFIG_TCG_TPM is not set
548
549#
486# I2C support 550# I2C support
487# 551#
488# CONFIG_I2C is not set 552# CONFIG_I2C is not set
@@ -493,10 +557,21 @@ CONFIG_GEN_RTC=y
493# CONFIG_W1 is not set 557# CONFIG_W1 is not set
494 558
495# 559#
560# Hardware Monitoring support
561#
562CONFIG_HWMON=y
563# CONFIG_HWMON_VID is not set
564# CONFIG_HWMON_DEBUG_CHIP is not set
565
566#
496# Misc devices 567# Misc devices
497# 568#
498 569
499# 570#
571# Multimedia Capabilities Port drivers
572#
573
574#
500# Multimedia devices 575# Multimedia devices
501# 576#
502# CONFIG_VIDEO_DEV is not set 577# CONFIG_VIDEO_DEV is not set
@@ -518,6 +593,11 @@ CONFIG_GEN_RTC=y
518CONFIG_DUMMY_CONSOLE=y 593CONFIG_DUMMY_CONSOLE=y
519 594
520# 595#
596# Speakup console speech
597#
598# CONFIG_SPEAKUP is not set
599
600#
521# Sound 601# Sound
522# 602#
523# CONFIG_SOUND is not set 603# CONFIG_SOUND is not set
@@ -525,35 +605,59 @@ CONFIG_DUMMY_CONSOLE=y
525# 605#
526# USB support 606# USB support
527# 607#
528# CONFIG_USB is not set
529CONFIG_USB_ARCH_HAS_HCD=y 608CONFIG_USB_ARCH_HAS_HCD=y
530CONFIG_USB_ARCH_HAS_OHCI=y 609CONFIG_USB_ARCH_HAS_OHCI=y
610# CONFIG_USB is not set
531 611
532# 612#
533# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information 613# USB Gadget Support
534# 614#
615# CONFIG_USB_GADGET is not set
535 616
536# 617#
537# USB Gadget Support 618# MMC/SD Card support
538# 619#
539# CONFIG_USB_GADGET is not set 620# CONFIG_MMC is not set
621
622#
623# InfiniBand support
624#
625# CONFIG_INFINIBAND is not set
626
627#
628# SN Devices
629#
630
631#
632# Distributed Lock Manager
633#
634# CONFIG_DLM is not set
540 635
541# 636#
542# File systems 637# File systems
543# 638#
544CONFIG_EXT2_FS=y 639CONFIG_EXT2_FS=y
545# CONFIG_EXT2_FS_XATTR is not set 640# CONFIG_EXT2_FS_XATTR is not set
641# CONFIG_EXT2_FS_XIP is not set
546# CONFIG_EXT3_FS is not set 642# CONFIG_EXT3_FS is not set
547# CONFIG_JBD is not set 643# CONFIG_REISER4_FS is not set
548# CONFIG_REISERFS_FS is not set 644# CONFIG_REISERFS_FS is not set
549# CONFIG_JFS_FS is not set 645# CONFIG_JFS_FS is not set
646# CONFIG_FS_POSIX_ACL is not set
647
648#
649# XFS support
650#
550# CONFIG_XFS_FS is not set 651# CONFIG_XFS_FS is not set
652# CONFIG_OCFS2_FS is not set
551# CONFIG_MINIX_FS is not set 653# CONFIG_MINIX_FS is not set
552# CONFIG_ROMFS_FS is not set 654# CONFIG_ROMFS_FS is not set
655CONFIG_INOTIFY=y
553# CONFIG_QUOTA is not set 656# CONFIG_QUOTA is not set
554CONFIG_DNOTIFY=y 657CONFIG_DNOTIFY=y
555# CONFIG_AUTOFS_FS is not set 658# CONFIG_AUTOFS_FS is not set
556# CONFIG_AUTOFS4_FS is not set 659# CONFIG_AUTOFS4_FS is not set
660# CONFIG_FUSE_FS is not set
557 661
558# 662#
559# CD-ROM/DVD Filesystems 663# CD-ROM/DVD Filesystems
@@ -574,20 +678,18 @@ CONFIG_DNOTIFY=y
574CONFIG_PROC_FS=y 678CONFIG_PROC_FS=y
575CONFIG_PROC_KCORE=y 679CONFIG_PROC_KCORE=y
576CONFIG_SYSFS=y 680CONFIG_SYSFS=y
577CONFIG_DEVFS_FS=y
578# CONFIG_DEVFS_MOUNT is not set
579# CONFIG_DEVFS_DEBUG is not set
580# CONFIG_DEVPTS_FS_XATTR is not set
581CONFIG_TMPFS=y 681CONFIG_TMPFS=y
582# CONFIG_TMPFS_XATTR is not set
583# CONFIG_HUGETLB_PAGE is not set 682# CONFIG_HUGETLB_PAGE is not set
584CONFIG_RAMFS=y 683CONFIG_RAMFS=y
684# CONFIG_CONFIGFS_FS is not set
685# CONFIG_RELAYFS_FS is not set
585 686
586# 687#
587# Miscellaneous filesystems 688# Miscellaneous filesystems
588# 689#
589# CONFIG_ADFS_FS is not set 690# CONFIG_ADFS_FS is not set
590# CONFIG_AFFS_FS is not set 691# CONFIG_AFFS_FS is not set
692# CONFIG_ASFS_FS is not set
591# CONFIG_HFS_FS is not set 693# CONFIG_HFS_FS is not set
592# CONFIG_HFSPLUS_FS is not set 694# CONFIG_HFSPLUS_FS is not set
593# CONFIG_BEFS_FS is not set 695# CONFIG_BEFS_FS is not set
@@ -605,13 +707,14 @@ CONFIG_RAMFS=y
605# 707#
606CONFIG_NFS_FS=y 708CONFIG_NFS_FS=y
607CONFIG_NFS_V3=y 709CONFIG_NFS_V3=y
710# CONFIG_NFS_V3_ACL is not set
608CONFIG_NFS_V4=y 711CONFIG_NFS_V4=y
609# CONFIG_NFS_DIRECTIO is not set 712# CONFIG_NFS_DIRECTIO is not set
610# CONFIG_NFSD is not set 713# CONFIG_NFSD is not set
611CONFIG_ROOT_NFS=y 714CONFIG_ROOT_NFS=y
612CONFIG_LOCKD=y 715CONFIG_LOCKD=y
613CONFIG_LOCKD_V4=y 716CONFIG_LOCKD_V4=y
614# CONFIG_EXPORTFS is not set 717CONFIG_NFS_COMMON=y
615CONFIG_SUNRPC=y 718CONFIG_SUNRPC=y
616CONFIG_SUNRPC_GSS=y 719CONFIG_SUNRPC_GSS=y
617CONFIG_RPCSEC_GSS_KRB5=y 720CONFIG_RPCSEC_GSS_KRB5=y
@@ -621,6 +724,7 @@ CONFIG_RPCSEC_GSS_KRB5=y
621# CONFIG_NCP_FS is not set 724# CONFIG_NCP_FS is not set
622# CONFIG_CODA_FS is not set 725# CONFIG_CODA_FS is not set
623# CONFIG_AFS_FS is not set 726# CONFIG_AFS_FS is not set
727# CONFIG_9P_FS is not set
624 728
625# 729#
626# Partition Types 730# Partition Types
@@ -637,6 +741,7 @@ CONFIG_MSDOS_PARTITION=y
637# Library routines 741# Library routines
638# 742#
639# CONFIG_CRC_CCITT is not set 743# CONFIG_CRC_CCITT is not set
744# CONFIG_CRC16 is not set
640CONFIG_CRC32=y 745CONFIG_CRC32=y
641# CONFIG_LIBCRC32C is not set 746# CONFIG_LIBCRC32C is not set
642 747
@@ -648,7 +753,9 @@ CONFIG_CRC32=y
648# 753#
649# Kernel hacking 754# Kernel hacking
650# 755#
756# CONFIG_PRINTK_TIME is not set
651# CONFIG_DEBUG_KERNEL is not set 757# CONFIG_DEBUG_KERNEL is not set
758CONFIG_LOG_BUF_SHIFT=14
652# CONFIG_SERIAL_TEXT_DEBUG is not set 759# CONFIG_SERIAL_TEXT_DEBUG is not set
653 760
654# 761#
@@ -669,6 +776,7 @@ CONFIG_CRYPTO_MD5=y
669# CONFIG_CRYPTO_SHA256 is not set 776# CONFIG_CRYPTO_SHA256 is not set
670# CONFIG_CRYPTO_SHA512 is not set 777# CONFIG_CRYPTO_SHA512 is not set
671# CONFIG_CRYPTO_WP512 is not set 778# CONFIG_CRYPTO_WP512 is not set
779# CONFIG_CRYPTO_TGR192 is not set
672CONFIG_CRYPTO_DES=y 780CONFIG_CRYPTO_DES=y
673# CONFIG_CRYPTO_BLOWFISH is not set 781# CONFIG_CRYPTO_BLOWFISH is not set
674# CONFIG_CRYPTO_TWOFISH is not set 782# CONFIG_CRYPTO_TWOFISH is not set
@@ -684,3 +792,7 @@ CONFIG_CRYPTO_DES=y
684# CONFIG_CRYPTO_MICHAEL_MIC is not set 792# CONFIG_CRYPTO_MICHAEL_MIC is not set
685# CONFIG_CRYPTO_CRC32C is not set 793# CONFIG_CRYPTO_CRC32C is not set
686# CONFIG_CRYPTO_TEST is not set 794# CONFIG_CRYPTO_TEST is not set
795
796#
797# Hardware crypto devices
798#
diff --git a/arch/ppc/configs/k2_defconfig b/arch/ppc/configs/ev64360_defconfig
index f10f5a6d2dae..de9bbb791db9 100644
--- a/arch/ppc/configs/k2_defconfig
+++ b/arch/ppc/configs/ev64360_defconfig
@@ -1,52 +1,60 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-rc5
4# Fri Aug 5 15:18:23 2005
3# 5#
4CONFIG_MMU=y 6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y 8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
6CONFIG_HAVE_DEC_LOCK=y 10CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y 11CONFIG_PPC=y
8CONFIG_PPC32=y 12CONFIG_PPC32=y
9CONFIG_GENERIC_NVRAM=y 13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
10 15
11# 16#
12# Code maturity level options 17# Code maturity level options
13# 18#
14CONFIG_EXPERIMENTAL=y 19CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y 20CONFIG_CLEAN_COMPILE=y
16CONFIG_STANDALONE=y
17CONFIG_BROKEN_ON_SMP=y 21CONFIG_BROKEN_ON_SMP=y
22CONFIG_LOCK_KERNEL=y
23CONFIG_INIT_ENV_ARG_LIMIT=32
18 24
19# 25#
20# General setup 26# General setup
21# 27#
28CONFIG_LOCALVERSION=""
22CONFIG_SWAP=y 29CONFIG_SWAP=y
23CONFIG_SYSVIPC=y 30CONFIG_SYSVIPC=y
24# CONFIG_POSIX_MQUEUE is not set 31CONFIG_POSIX_MQUEUE=y
25# CONFIG_BSD_PROCESS_ACCT is not set 32# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y 33CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set 34# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14 35CONFIG_HOTPLUG=y
29# CONFIG_HOTPLUG is not set 36CONFIG_KOBJECT_UEVENT=y
30# CONFIG_IKCONFIG is not set 37# CONFIG_IKCONFIG is not set
31CONFIG_EMBEDDED=y 38# CONFIG_EMBEDDED is not set
32CONFIG_KALLSYMS=y 39CONFIG_KALLSYMS=y
40# CONFIG_KALLSYMS_EXTRA_PASS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
33CONFIG_FUTEX=y 44CONFIG_FUTEX=y
34CONFIG_EPOLL=y 45CONFIG_EPOLL=y
35CONFIG_IOSCHED_NOOP=y 46CONFIG_SHMEM=y
36CONFIG_IOSCHED_AS=y 47CONFIG_CC_ALIGN_FUNCTIONS=0
37CONFIG_IOSCHED_DEADLINE=y 48CONFIG_CC_ALIGN_LABELS=0
38CONFIG_IOSCHED_CFQ=y 49CONFIG_CC_ALIGN_LOOPS=0
39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 50CONFIG_CC_ALIGN_JUMPS=0
51# CONFIG_TINY_SHMEM is not set
52CONFIG_BASE_SMALL=0
40 53
41# 54#
42# Loadable module support 55# Loadable module support
43# 56#
44CONFIG_MODULES=y 57# CONFIG_MODULES is not set
45CONFIG_MODULE_UNLOAD=y
46# CONFIG_MODULE_FORCE_UNLOAD is not set
47CONFIG_OBSOLETE_MODPARM=y
48# CONFIG_MODVERSIONS is not set
49CONFIG_KMOD=y
50 58
51# 59#
52# Processor 60# Processor
@@ -57,21 +65,33 @@ CONFIG_6xx=y
57# CONFIG_POWER3 is not set 65# CONFIG_POWER3 is not set
58# CONFIG_POWER4 is not set 66# CONFIG_POWER4 is not set
59# CONFIG_8xx is not set 67# CONFIG_8xx is not set
60# CONFIG_ALTIVEC is not set 68# CONFIG_E200 is not set
61# CONFIG_TAU is not set 69# CONFIG_E500 is not set
70CONFIG_PPC_FPU=y
71CONFIG_ALTIVEC=y
72CONFIG_TAU=y
73# CONFIG_TAU_INT is not set
74# CONFIG_TAU_AVERAGE is not set
75# CONFIG_KEXEC is not set
62# CONFIG_CPU_FREQ is not set 76# CONFIG_CPU_FREQ is not set
77# CONFIG_PM is not set
63CONFIG_PPC_STD_MMU=y 78CONFIG_PPC_STD_MMU=y
79CONFIG_NOT_COHERENT_CACHE=y
64 80
65# 81#
66# Platform options 82# Platform options
67# 83#
68# CONFIG_PPC_MULTIPLATFORM is not set 84# CONFIG_PPC_MULTIPLATFORM is not set
69# CONFIG_APUS is not set 85# CONFIG_APUS is not set
86# CONFIG_KATANA is not set
70# CONFIG_WILLOW is not set 87# CONFIG_WILLOW is not set
88# CONFIG_CPCI690 is not set
71# CONFIG_PCORE is not set 89# CONFIG_PCORE is not set
72# CONFIG_POWERPMC250 is not set 90# CONFIG_POWERPMC250 is not set
73# CONFIG_EV64260 is not set 91# CONFIG_CHESTNUT is not set
74# CONFIG_SPRUCE is not set 92# CONFIG_SPRUCE is not set
93# CONFIG_HDPU is not set
94# CONFIG_EV64260 is not set
75# CONFIG_LOPEC is not set 95# CONFIG_LOPEC is not set
76# CONFIG_MCPN765 is not set 96# CONFIG_MCPN765 is not set
77# CONFIG_MVME5100 is not set 97# CONFIG_MVME5100 is not set
@@ -79,24 +99,51 @@ CONFIG_PPC_STD_MMU=y
79# CONFIG_PRPMC750 is not set 99# CONFIG_PRPMC750 is not set
80# CONFIG_PRPMC800 is not set 100# CONFIG_PRPMC800 is not set
81# CONFIG_SANDPOINT is not set 101# CONFIG_SANDPOINT is not set
102# CONFIG_RADSTONE_PPC7D is not set
82# CONFIG_ADIR is not set 103# CONFIG_ADIR is not set
83CONFIG_K2=y 104# CONFIG_K2 is not set
84# CONFIG_PAL4 is not set 105# CONFIG_PAL4 is not set
85# CONFIG_GEMINI is not set 106# CONFIG_GEMINI is not set
86# CONFIG_EST8260 is not set 107# CONFIG_EST8260 is not set
108# CONFIG_SBC82xx is not set
87# CONFIG_SBS8260 is not set 109# CONFIG_SBS8260 is not set
88# CONFIG_RPX6 is not set 110# CONFIG_RPX8260 is not set
89# CONFIG_TQM8260 is not set 111# CONFIG_TQM8260 is not set
90CONFIG_PPC_GEN550=y 112# CONFIG_ADS8272 is not set
91# CONFIG_CPC710_DATA_GATHERING is not set 113# CONFIG_PQ2FADS is not set
114# CONFIG_LITE5200 is not set
115# CONFIG_MPC834x_SYS is not set
116CONFIG_EV64360=y
117CONFIG_MV64360=y
118CONFIG_MV64X60=y
119
120#
121# Set bridge options
122#
123CONFIG_MV64X60_BASE=0xf1000000
124CONFIG_MV64X60_NEW_BASE=0xf1000000
92# CONFIG_SMP is not set 125# CONFIG_SMP is not set
93# CONFIG_PREEMPT is not set
94# CONFIG_HIGHMEM is not set 126# CONFIG_HIGHMEM is not set
95CONFIG_KERNEL_ELF=y 127# CONFIG_HZ_100 is not set
128CONFIG_HZ_250=y
129# CONFIG_HZ_1000 is not set
130CONFIG_HZ=250
131# CONFIG_PREEMPT_NONE is not set
132# CONFIG_PREEMPT_VOLUNTARY is not set
133CONFIG_PREEMPT=y
134CONFIG_PREEMPT_BKL=y
135CONFIG_SELECT_MEMORY_MODEL=y
136CONFIG_FLATMEM_MANUAL=y
137# CONFIG_DISCONTIGMEM_MANUAL is not set
138# CONFIG_SPARSEMEM_MANUAL is not set
139CONFIG_FLATMEM=y
140CONFIG_FLAT_NODE_MEM_MAP=y
96CONFIG_BINFMT_ELF=y 141CONFIG_BINFMT_ELF=y
97# CONFIG_BINFMT_MISC is not set 142CONFIG_BINFMT_MISC=y
98CONFIG_CMDLINE_BOOL=y 143CONFIG_CMDLINE_BOOL=y
99CONFIG_CMDLINE="ip=on" 144CONFIG_CMDLINE="console=ttyMM0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"
145CONFIG_SECCOMP=y
146CONFIG_ISA_DMA_API=y
100 147
101# 148#
102# Bus options 149# Bus options
@@ -108,31 +155,182 @@ CONFIG_PCI_DOMAINS=y
108# CONFIG_PCI_NAMES is not set 155# CONFIG_PCI_NAMES is not set
109 156
110# 157#
111# Advanced setup 158# PCCARD (PCMCIA/CardBus) support
112# 159#
113# CONFIG_ADVANCED_OPTIONS is not set 160# CONFIG_PCCARD is not set
114 161
115# 162#
116# Default settings for advanced configuration options are used 163# Advanced setup
117# 164#
165CONFIG_ADVANCED_OPTIONS=y
118CONFIG_HIGHMEM_START=0xfe000000 166CONFIG_HIGHMEM_START=0xfe000000
167# CONFIG_LOWMEM_SIZE_BOOL is not set
119CONFIG_LOWMEM_SIZE=0x30000000 168CONFIG_LOWMEM_SIZE=0x30000000
169# CONFIG_KERNEL_START_BOOL is not set
120CONFIG_KERNEL_START=0xc0000000 170CONFIG_KERNEL_START=0xc0000000
171# CONFIG_TASK_SIZE_BOOL is not set
121CONFIG_TASK_SIZE=0x80000000 172CONFIG_TASK_SIZE=0x80000000
173# CONFIG_CONSISTENT_START_BOOL is not set
174CONFIG_CONSISTENT_START=0xff100000
175# CONFIG_CONSISTENT_SIZE_BOOL is not set
176CONFIG_CONSISTENT_SIZE=0x00200000
177# CONFIG_BOOT_LOAD_BOOL is not set
122CONFIG_BOOT_LOAD=0x00800000 178CONFIG_BOOT_LOAD=0x00800000
123 179
124# 180#
181# Networking
182#
183CONFIG_NET=y
184
185#
186# Networking options
187#
188CONFIG_PACKET=y
189# CONFIG_PACKET_MMAP is not set
190CONFIG_UNIX=y
191# CONFIG_NET_KEY is not set
192CONFIG_INET=y
193CONFIG_IP_MULTICAST=y
194# CONFIG_IP_ADVANCED_ROUTER is not set
195CONFIG_IP_FIB_HASH=y
196CONFIG_IP_PNP=y
197CONFIG_IP_PNP_DHCP=y
198# CONFIG_IP_PNP_BOOTP is not set
199# CONFIG_IP_PNP_RARP is not set
200# CONFIG_NET_IPIP is not set
201# CONFIG_NET_IPGRE is not set
202# CONFIG_IP_MROUTE is not set
203# CONFIG_ARPD is not set
204CONFIG_SYN_COOKIES=y
205# CONFIG_INET_AH is not set
206# CONFIG_INET_ESP is not set
207# CONFIG_INET_IPCOMP is not set
208# CONFIG_INET_TUNNEL is not set
209CONFIG_IP_TCPDIAG=y
210# CONFIG_IP_TCPDIAG_IPV6 is not set
211# CONFIG_TCP_CONG_ADVANCED is not set
212CONFIG_TCP_CONG_BIC=y
213# CONFIG_IPV6 is not set
214# CONFIG_NETFILTER is not set
215
216#
217# SCTP Configuration (EXPERIMENTAL)
218#
219# CONFIG_IP_SCTP is not set
220# CONFIG_ATM is not set
221# CONFIG_BRIDGE is not set
222# CONFIG_VLAN_8021Q is not set
223# CONFIG_DECNET is not set
224# CONFIG_LLC2 is not set
225# CONFIG_IPX is not set
226# CONFIG_ATALK is not set
227# CONFIG_X25 is not set
228# CONFIG_LAPB is not set
229# CONFIG_NET_DIVERT is not set
230# CONFIG_ECONET is not set
231# CONFIG_WAN_ROUTER is not set
232# CONFIG_NET_SCHED is not set
233# CONFIG_NET_CLS_ROUTE is not set
234
235#
236# Network testing
237#
238# CONFIG_NET_PKTGEN is not set
239# CONFIG_HAMRADIO is not set
240# CONFIG_IRDA is not set
241# CONFIG_BT is not set
242
243#
125# Device Drivers 244# Device Drivers
126# 245#
127 246
128# 247#
129# Generic Driver Options 248# Generic Driver Options
130# 249#
250CONFIG_STANDALONE=y
251CONFIG_PREVENT_FIRMWARE_BUILD=y
252# CONFIG_FW_LOADER is not set
131 253
132# 254#
133# Memory Technology Devices (MTD) 255# Memory Technology Devices (MTD)
134# 256#
135# CONFIG_MTD is not set 257CONFIG_MTD=y
258# CONFIG_MTD_DEBUG is not set
259CONFIG_MTD_CONCAT=y
260CONFIG_MTD_PARTITIONS=y
261# CONFIG_MTD_REDBOOT_PARTS is not set
262# CONFIG_MTD_CMDLINE_PARTS is not set
263
264#
265# User Modules And Translation Layers
266#
267CONFIG_MTD_CHAR=y
268CONFIG_MTD_BLOCK=y
269# CONFIG_FTL is not set
270# CONFIG_NFTL is not set
271# CONFIG_INFTL is not set
272
273#
274# RAM/ROM/Flash chip drivers
275#
276CONFIG_MTD_CFI=y
277# CONFIG_MTD_JEDECPROBE is not set
278CONFIG_MTD_GEN_PROBE=y
279CONFIG_MTD_CFI_ADV_OPTIONS=y
280CONFIG_MTD_CFI_NOSWAP=y
281# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
282# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
283CONFIG_MTD_CFI_GEOMETRY=y
284# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
285# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
286CONFIG_MTD_MAP_BANK_WIDTH_4=y
287# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
288# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
289# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
290# CONFIG_MTD_CFI_I1 is not set
291CONFIG_MTD_CFI_I2=y
292# CONFIG_MTD_CFI_I4 is not set
293# CONFIG_MTD_CFI_I8 is not set
294# CONFIG_MTD_OTP is not set
295CONFIG_MTD_CFI_INTELEXT=y
296# CONFIG_MTD_CFI_AMDSTD is not set
297# CONFIG_MTD_CFI_STAA is not set
298CONFIG_MTD_CFI_UTIL=y
299# CONFIG_MTD_RAM is not set
300# CONFIG_MTD_ROM is not set
301# CONFIG_MTD_ABSENT is not set
302
303#
304# Mapping drivers for chip access
305#
306# CONFIG_MTD_COMPLEX_MAPPINGS is not set
307CONFIG_MTD_PHYSMAP=y
308CONFIG_MTD_PHYSMAP_START=0xff000000
309CONFIG_MTD_PHYSMAP_LEN=0x01000000
310CONFIG_MTD_PHYSMAP_BANKWIDTH=4
311# CONFIG_MTD_PLATRAM is not set
312
313#
314# Self-contained MTD device drivers
315#
316# CONFIG_MTD_PMC551 is not set
317# CONFIG_MTD_SLRAM is not set
318CONFIG_MTD_PHRAM=y
319# CONFIG_MTD_MTDRAM is not set
320# CONFIG_MTD_BLKMTD is not set
321# CONFIG_MTD_BLOCK2MTD is not set
322
323#
324# Disk-On-Chip Device Drivers
325#
326# CONFIG_MTD_DOC2000 is not set
327# CONFIG_MTD_DOC2001 is not set
328# CONFIG_MTD_DOC2001PLUS is not set
329
330#
331# NAND Flash Device Drivers
332#
333# CONFIG_MTD_NAND is not set
136 334
137# 335#
138# Parallel port support 336# Parallel port support
@@ -151,72 +349,32 @@ CONFIG_BOOT_LOAD=0x00800000
151# CONFIG_BLK_CPQ_CISS_DA is not set 349# CONFIG_BLK_CPQ_CISS_DA is not set
152# CONFIG_BLK_DEV_DAC960 is not set 350# CONFIG_BLK_DEV_DAC960 is not set
153# CONFIG_BLK_DEV_UMEM is not set 351# CONFIG_BLK_DEV_UMEM is not set
352# CONFIG_BLK_DEV_COW_COMMON is not set
154CONFIG_BLK_DEV_LOOP=y 353CONFIG_BLK_DEV_LOOP=y
155# CONFIG_BLK_DEV_CRYPTOLOOP is not set 354# CONFIG_BLK_DEV_CRYPTOLOOP is not set
156# CONFIG_BLK_DEV_NBD is not set 355# CONFIG_BLK_DEV_NBD is not set
157# CONFIG_BLK_DEV_CARMEL is not set 356# CONFIG_BLK_DEV_SX8 is not set
158CONFIG_BLK_DEV_RAM=y 357CONFIG_BLK_DEV_RAM=y
159CONFIG_BLK_DEV_RAM_SIZE=4096 358CONFIG_BLK_DEV_RAM_COUNT=16
359CONFIG_BLK_DEV_RAM_SIZE=32768
160CONFIG_BLK_DEV_INITRD=y 360CONFIG_BLK_DEV_INITRD=y
361CONFIG_INITRAMFS_SOURCE=""
161# CONFIG_LBD is not set 362# CONFIG_LBD is not set
363# CONFIG_CDROM_PKTCDVD is not set
364
365#
366# IO Schedulers
367#
368CONFIG_IOSCHED_NOOP=y
369CONFIG_IOSCHED_AS=y
370CONFIG_IOSCHED_DEADLINE=y
371CONFIG_IOSCHED_CFQ=y
372# CONFIG_ATA_OVER_ETH is not set
162 373
163# 374#
164# ATA/ATAPI/MFM/RLL support 375# ATA/ATAPI/MFM/RLL support
165# 376#
166CONFIG_IDE=y 377# CONFIG_IDE is not set
167CONFIG_BLK_DEV_IDE=y
168
169#
170# Please see Documentation/ide.txt for help/info on IDE drives
171#
172CONFIG_BLK_DEV_IDEDISK=y
173# CONFIG_IDEDISK_MULTI_MODE is not set
174# CONFIG_IDEDISK_STROKE is not set
175# CONFIG_BLK_DEV_IDECD is not set
176# CONFIG_BLK_DEV_IDETAPE is not set
177# CONFIG_BLK_DEV_IDEFLOPPY is not set
178# CONFIG_IDE_TASK_IOCTL is not set
179# CONFIG_IDE_TASKFILE_IO is not set
180
181#
182# IDE chipset support/bugfixes
183#
184# CONFIG_IDE_GENERIC is not set
185CONFIG_BLK_DEV_IDEPCI=y
186# CONFIG_IDEPCI_SHARE_IRQ is not set
187# CONFIG_BLK_DEV_OFFBOARD is not set
188# CONFIG_BLK_DEV_GENERIC is not set
189# CONFIG_BLK_DEV_OPTI621 is not set
190# CONFIG_BLK_DEV_SL82C105 is not set
191CONFIG_BLK_DEV_IDEDMA_PCI=y
192# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
193# CONFIG_IDEDMA_PCI_AUTO is not set
194CONFIG_BLK_DEV_ADMA=y
195# CONFIG_BLK_DEV_AEC62XX is not set
196CONFIG_BLK_DEV_ALI15X3=y
197# CONFIG_WDC_ALI15X3 is not set
198# CONFIG_BLK_DEV_AMD74XX is not set
199# CONFIG_BLK_DEV_CMD64X is not set
200# CONFIG_BLK_DEV_TRIFLEX is not set
201# CONFIG_BLK_DEV_CY82C693 is not set
202# CONFIG_BLK_DEV_CS5520 is not set
203# CONFIG_BLK_DEV_CS5530 is not set
204# CONFIG_BLK_DEV_HPT34X is not set
205# CONFIG_BLK_DEV_HPT366 is not set
206# CONFIG_BLK_DEV_SC1200 is not set
207# CONFIG_BLK_DEV_PIIX is not set
208# CONFIG_BLK_DEV_NS87415 is not set
209# CONFIG_BLK_DEV_PDC202XX_OLD is not set
210# CONFIG_BLK_DEV_PDC202XX_NEW is not set
211# CONFIG_BLK_DEV_SVWKS is not set
212# CONFIG_BLK_DEV_SIIMAGE is not set
213# CONFIG_BLK_DEV_SLC90E66 is not set
214# CONFIG_BLK_DEV_TRM290 is not set
215# CONFIG_BLK_DEV_VIA82CXXX is not set
216CONFIG_BLK_DEV_IDEDMA=y
217# CONFIG_IDEDMA_IVB is not set
218# CONFIG_IDEDMA_AUTO is not set
219# CONFIG_BLK_DEV_HD is not set
220 378
221# 379#
222# SCSI device support 380# SCSI device support
@@ -248,122 +406,8 @@ CONFIG_BLK_DEV_IDEDMA=y
248# 406#
249 407
250# 408#
251# Networking support 409# Network device support
252#
253CONFIG_NET=y
254
255# 410#
256# Networking options
257#
258CONFIG_PACKET=y
259# CONFIG_PACKET_MMAP is not set
260# CONFIG_NETLINK_DEV is not set
261CONFIG_UNIX=y
262# CONFIG_NET_KEY is not set
263CONFIG_INET=y
264# CONFIG_IP_MULTICAST is not set
265# CONFIG_IP_ADVANCED_ROUTER is not set
266CONFIG_IP_PNP=y
267CONFIG_IP_PNP_DHCP=y
268# CONFIG_IP_PNP_BOOTP is not set
269# CONFIG_IP_PNP_RARP is not set
270# CONFIG_NET_IPIP is not set
271# CONFIG_NET_IPGRE is not set
272# CONFIG_ARPD is not set
273# CONFIG_SYN_COOKIES is not set
274# CONFIG_INET_AH is not set
275# CONFIG_INET_ESP is not set
276# CONFIG_INET_IPCOMP is not set
277
278#
279# IP: Virtual Server Configuration
280#
281# CONFIG_IP_VS is not set
282# CONFIG_IPV6 is not set
283CONFIG_NETFILTER=y
284# CONFIG_NETFILTER_DEBUG is not set
285
286#
287# IP: Netfilter Configuration
288#
289CONFIG_IP_NF_CONNTRACK=m
290CONFIG_IP_NF_FTP=m
291# CONFIG_IP_NF_IRC is not set
292# CONFIG_IP_NF_TFTP is not set
293# CONFIG_IP_NF_AMANDA is not set
294# CONFIG_IP_NF_QUEUE is not set
295CONFIG_IP_NF_IPTABLES=m
296CONFIG_IP_NF_MATCH_LIMIT=m
297# CONFIG_IP_NF_MATCH_IPRANGE is not set
298CONFIG_IP_NF_MATCH_MAC=m
299CONFIG_IP_NF_MATCH_PKTTYPE=m
300CONFIG_IP_NF_MATCH_MARK=m
301CONFIG_IP_NF_MATCH_MULTIPORT=m
302CONFIG_IP_NF_MATCH_TOS=m
303# CONFIG_IP_NF_MATCH_RECENT is not set
304CONFIG_IP_NF_MATCH_ECN=m
305CONFIG_IP_NF_MATCH_DSCP=m
306CONFIG_IP_NF_MATCH_AH_ESP=m
307# CONFIG_IP_NF_MATCH_LENGTH is not set
308# CONFIG_IP_NF_MATCH_TTL is not set
309CONFIG_IP_NF_MATCH_TCPMSS=m
310CONFIG_IP_NF_MATCH_HELPER=m
311CONFIG_IP_NF_MATCH_STATE=m
312CONFIG_IP_NF_MATCH_CONNTRACK=m
313CONFIG_IP_NF_MATCH_OWNER=m
314CONFIG_IP_NF_FILTER=m
315CONFIG_IP_NF_TARGET_REJECT=m
316CONFIG_IP_NF_NAT=m
317CONFIG_IP_NF_NAT_NEEDED=y
318CONFIG_IP_NF_TARGET_MASQUERADE=m
319CONFIG_IP_NF_TARGET_REDIRECT=m
320# CONFIG_IP_NF_TARGET_NETMAP is not set
321# CONFIG_IP_NF_TARGET_SAME is not set
322# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
323CONFIG_IP_NF_NAT_FTP=m
324# CONFIG_IP_NF_MANGLE is not set
325# CONFIG_IP_NF_TARGET_LOG is not set
326CONFIG_IP_NF_TARGET_ULOG=m
327CONFIG_IP_NF_TARGET_TCPMSS=m
328CONFIG_IP_NF_ARPTABLES=m
329CONFIG_IP_NF_ARPFILTER=m
330# CONFIG_IP_NF_ARP_MANGLE is not set
331CONFIG_IP_NF_COMPAT_IPCHAINS=m
332# CONFIG_IP_NF_COMPAT_IPFWADM is not set
333# CONFIG_IP_NF_RAW is not set
334
335#
336# SCTP Configuration (EXPERIMENTAL)
337#
338# CONFIG_IP_SCTP is not set
339# CONFIG_ATM is not set
340# CONFIG_BRIDGE is not set
341# CONFIG_VLAN_8021Q is not set
342# CONFIG_DECNET is not set
343# CONFIG_LLC2 is not set
344# CONFIG_IPX is not set
345# CONFIG_ATALK is not set
346# CONFIG_X25 is not set
347# CONFIG_LAPB is not set
348# CONFIG_NET_DIVERT is not set
349# CONFIG_ECONET is not set
350# CONFIG_WAN_ROUTER is not set
351# CONFIG_NET_HW_FLOWCONTROL is not set
352
353#
354# QoS and/or fair queueing
355#
356# CONFIG_NET_SCHED is not set
357
358#
359# Network testing
360#
361# CONFIG_NET_PKTGEN is not set
362# CONFIG_NETPOLL is not set
363# CONFIG_NET_POLL_CONTROLLER is not set
364# CONFIG_HAMRADIO is not set
365# CONFIG_IRDA is not set
366# CONFIG_BT is not set
367CONFIG_NETDEVICES=y 411CONFIG_NETDEVICES=y
368# CONFIG_DUMMY is not set 412# CONFIG_DUMMY is not set
369# CONFIG_BONDING is not set 413# CONFIG_BONDING is not set
@@ -378,38 +422,7 @@ CONFIG_NETDEVICES=y
378# 422#
379# Ethernet (10 or 100Mbit) 423# Ethernet (10 or 100Mbit)
380# 424#
381CONFIG_NET_ETHERNET=y 425# CONFIG_NET_ETHERNET is not set
382CONFIG_MII=y
383# CONFIG_OAKNET is not set
384# CONFIG_HAPPYMEAL is not set
385# CONFIG_SUNGEM is not set
386# CONFIG_NET_VENDOR_3COM is not set
387
388#
389# Tulip family network device support
390#
391# CONFIG_NET_TULIP is not set
392# CONFIG_HP100 is not set
393CONFIG_NET_PCI=y
394# CONFIG_PCNET32 is not set
395# CONFIG_AMD8111_ETH is not set
396# CONFIG_ADAPTEC_STARFIRE is not set
397# CONFIG_B44 is not set
398# CONFIG_FORCEDETH is not set
399# CONFIG_DGRS is not set
400CONFIG_EEPRO100=y
401# CONFIG_EEPRO100_PIO is not set
402# CONFIG_E100 is not set
403# CONFIG_FEALNX is not set
404# CONFIG_NATSEMI is not set
405# CONFIG_NE2K_PCI is not set
406# CONFIG_8139CP is not set
407# CONFIG_8139TOO is not set
408# CONFIG_SIS900 is not set
409# CONFIG_EPIC100 is not set
410# CONFIG_SUNDANCE is not set
411# CONFIG_TLAN is not set
412# CONFIG_VIA_RHINE is not set
413 426
414# 427#
415# Ethernet (1000 Mbit) 428# Ethernet (1000 Mbit)
@@ -421,8 +434,14 @@ CONFIG_EEPRO100=y
421# CONFIG_HAMACHI is not set 434# CONFIG_HAMACHI is not set
422# CONFIG_YELLOWFIN is not set 435# CONFIG_YELLOWFIN is not set
423# CONFIG_R8169 is not set 436# CONFIG_R8169 is not set
437# CONFIG_SKGE is not set
424# CONFIG_SK98LIN is not set 438# CONFIG_SK98LIN is not set
425# CONFIG_TIGON3 is not set 439# CONFIG_TIGON3 is not set
440# CONFIG_BNX2 is not set
441CONFIG_MV643XX_ETH=y
442CONFIG_MV643XX_ETH_0=y
443# CONFIG_MV643XX_ETH_1 is not set
444# CONFIG_MV643XX_ETH_2 is not set
426 445
427# 446#
428# Ethernet (10000 Mbit) 447# Ethernet (10000 Mbit)
@@ -448,9 +467,10 @@ CONFIG_EEPRO100=y
448# CONFIG_HIPPI is not set 467# CONFIG_HIPPI is not set
449# CONFIG_PPP is not set 468# CONFIG_PPP is not set
450# CONFIG_SLIP is not set 469# CONFIG_SLIP is not set
451# CONFIG_RCPCI is not set
452# CONFIG_SHAPER is not set 470# CONFIG_SHAPER is not set
453# CONFIG_NETCONSOLE is not set 471# CONFIG_NETCONSOLE is not set
472# CONFIG_NETPOLL is not set
473# CONFIG_NET_POLL_CONTROLLER is not set
454 474
455# 475#
456# ISDN subsystem 476# ISDN subsystem
@@ -465,47 +485,59 @@ CONFIG_EEPRO100=y
465# 485#
466# Input device support 486# Input device support
467# 487#
468# CONFIG_INPUT is not set 488CONFIG_INPUT=y
469 489
470# 490#
471# Userland interfaces 491# Userland interfaces
472# 492#
493CONFIG_INPUT_MOUSEDEV=y
494# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
495CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
496CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
497# CONFIG_INPUT_JOYDEV is not set
498# CONFIG_INPUT_TSDEV is not set
499# CONFIG_INPUT_EVDEV is not set
500# CONFIG_INPUT_EVBUG is not set
473 501
474# 502#
475# Input I/O drivers 503# Input Device Drivers
476# 504#
477# CONFIG_GAMEPORT is not set 505# CONFIG_INPUT_KEYBOARD is not set
478CONFIG_SOUND_GAMEPORT=y 506# CONFIG_INPUT_MOUSE is not set
479# CONFIG_SERIO is not set 507# CONFIG_INPUT_JOYSTICK is not set
480# CONFIG_SERIO_I8042 is not set 508# CONFIG_INPUT_TOUCHSCREEN is not set
509# CONFIG_INPUT_MISC is not set
481 510
482# 511#
483# Input Device Drivers 512# Hardware I/O ports
484# 513#
514# CONFIG_SERIO is not set
515# CONFIG_GAMEPORT is not set
485 516
486# 517#
487# Character devices 518# Character devices
488# 519#
489# CONFIG_VT is not set 520CONFIG_VT=y
521CONFIG_VT_CONSOLE=y
522CONFIG_HW_CONSOLE=y
490# CONFIG_SERIAL_NONSTANDARD is not set 523# CONFIG_SERIAL_NONSTANDARD is not set
491 524
492# 525#
493# Serial drivers 526# Serial drivers
494# 527#
495CONFIG_SERIAL_8250=y 528# CONFIG_SERIAL_8250 is not set
496CONFIG_SERIAL_8250_CONSOLE=y
497CONFIG_SERIAL_8250_NR_UARTS=2
498# CONFIG_SERIAL_8250_EXTENDED is not set
499 529
500# 530#
501# Non-8250 serial port support 531# Non-8250 serial port support
502# 532#
533CONFIG_SERIAL_MPSC=y
534CONFIG_SERIAL_MPSC_CONSOLE=y
503CONFIG_SERIAL_CORE=y 535CONFIG_SERIAL_CORE=y
504CONFIG_SERIAL_CORE_CONSOLE=y 536CONFIG_SERIAL_CORE_CONSOLE=y
537# CONFIG_SERIAL_JSM is not set
505CONFIG_UNIX98_PTYS=y 538CONFIG_UNIX98_PTYS=y
506CONFIG_LEGACY_PTYS=y 539CONFIG_LEGACY_PTYS=y
507CONFIG_LEGACY_PTY_COUNT=256 540CONFIG_LEGACY_PTY_COUNT=256
508# CONFIG_QIC02_TAPE is not set
509 541
510# 542#
511# IPMI 543# IPMI
@@ -526,15 +558,31 @@ CONFIG_GEN_RTC=y
526# 558#
527# Ftape, the floppy tape device driver 559# Ftape, the floppy tape device driver
528# 560#
529# CONFIG_FTAPE is not set
530# CONFIG_AGP is not set 561# CONFIG_AGP is not set
531# CONFIG_DRM is not set 562# CONFIG_DRM is not set
532# CONFIG_RAW_DRIVER is not set 563# CONFIG_RAW_DRIVER is not set
533 564
534# 565#
566# TPM devices
567#
568# CONFIG_TCG_TPM is not set
569
570#
535# I2C support 571# I2C support
536# 572#
537# CONFIG_I2C is not set 573# CONFIG_I2C is not set
574# CONFIG_I2C_SENSOR is not set
575
576#
577# Dallas's 1-wire bus
578#
579# CONFIG_W1 is not set
580
581#
582# Hardware Monitoring support
583#
584CONFIG_HWMON=y
585# CONFIG_HWMON_DEBUG_CHIP is not set
538 586
539# 587#
540# Misc devices 588# Misc devices
@@ -556,6 +604,12 @@ CONFIG_GEN_RTC=y
556# CONFIG_FB is not set 604# CONFIG_FB is not set
557 605
558# 606#
607# Console display driver support
608#
609# CONFIG_VGA_CONSOLE is not set
610CONFIG_DUMMY_CONSOLE=y
611
612#
559# Sound 613# Sound
560# 614#
561# CONFIG_SOUND is not set 615# CONFIG_SOUND is not set
@@ -563,6 +617,8 @@ CONFIG_GEN_RTC=y
563# 617#
564# USB support 618# USB support
565# 619#
620CONFIG_USB_ARCH_HAS_HCD=y
621CONFIG_USB_ARCH_HAS_OHCI=y
566# CONFIG_USB is not set 622# CONFIG_USB is not set
567 623
568# 624#
@@ -571,18 +627,40 @@ CONFIG_GEN_RTC=y
571# CONFIG_USB_GADGET is not set 627# CONFIG_USB_GADGET is not set
572 628
573# 629#
630# MMC/SD Card support
631#
632# CONFIG_MMC is not set
633
634#
635# InfiniBand support
636#
637# CONFIG_INFINIBAND is not set
638
639#
640# SN Devices
641#
642
643#
574# File systems 644# File systems
575# 645#
576CONFIG_EXT2_FS=y 646CONFIG_EXT2_FS=y
577# CONFIG_EXT2_FS_XATTR is not set 647# CONFIG_EXT2_FS_XATTR is not set
648# CONFIG_EXT2_FS_XIP is not set
578# CONFIG_EXT3_FS is not set 649# CONFIG_EXT3_FS is not set
579# CONFIG_JBD is not set 650# CONFIG_JBD is not set
580# CONFIG_REISERFS_FS is not set 651# CONFIG_REISERFS_FS is not set
581# CONFIG_JFS_FS is not set 652# CONFIG_JFS_FS is not set
653# CONFIG_FS_POSIX_ACL is not set
654
655#
656# XFS support
657#
582# CONFIG_XFS_FS is not set 658# CONFIG_XFS_FS is not set
583# CONFIG_MINIX_FS is not set 659# CONFIG_MINIX_FS is not set
584# CONFIG_ROMFS_FS is not set 660# CONFIG_ROMFS_FS is not set
661CONFIG_INOTIFY=y
585# CONFIG_QUOTA is not set 662# CONFIG_QUOTA is not set
663CONFIG_DNOTIFY=y
586# CONFIG_AUTOFS_FS is not set 664# CONFIG_AUTOFS_FS is not set
587# CONFIG_AUTOFS4_FS is not set 665# CONFIG_AUTOFS4_FS is not set
588 666
@@ -595,7 +673,8 @@ CONFIG_EXT2_FS=y
595# 673#
596# DOS/FAT/NT Filesystems 674# DOS/FAT/NT Filesystems
597# 675#
598# CONFIG_FAT_FS is not set 676# CONFIG_MSDOS_FS is not set
677# CONFIG_VFAT_FS is not set
599# CONFIG_NTFS_FS is not set 678# CONFIG_NTFS_FS is not set
600 679
601# 680#
@@ -604,9 +683,9 @@ CONFIG_EXT2_FS=y
604CONFIG_PROC_FS=y 683CONFIG_PROC_FS=y
605CONFIG_PROC_KCORE=y 684CONFIG_PROC_KCORE=y
606CONFIG_SYSFS=y 685CONFIG_SYSFS=y
607# CONFIG_DEVFS_FS is not set
608# CONFIG_DEVPTS_FS_XATTR is not set 686# CONFIG_DEVPTS_FS_XATTR is not set
609CONFIG_TMPFS=y 687CONFIG_TMPFS=y
688# CONFIG_TMPFS_XATTR is not set
610# CONFIG_HUGETLB_PAGE is not set 689# CONFIG_HUGETLB_PAGE is not set
611CONFIG_RAMFS=y 690CONFIG_RAMFS=y
612 691
@@ -620,6 +699,14 @@ CONFIG_RAMFS=y
620# CONFIG_BEFS_FS is not set 699# CONFIG_BEFS_FS is not set
621# CONFIG_BFS_FS is not set 700# CONFIG_BFS_FS is not set
622# CONFIG_EFS_FS is not set 701# CONFIG_EFS_FS is not set
702# CONFIG_JFFS_FS is not set
703CONFIG_JFFS2_FS=y
704CONFIG_JFFS2_FS_DEBUG=0
705CONFIG_JFFS2_FS_WRITEBUFFER=y
706# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
707CONFIG_JFFS2_ZLIB=y
708CONFIG_JFFS2_RTIME=y
709# CONFIG_JFFS2_RUBIN is not set
623# CONFIG_CRAMFS is not set 710# CONFIG_CRAMFS is not set
624# CONFIG_VXFS_FS is not set 711# CONFIG_VXFS_FS is not set
625# CONFIG_HPFS_FS is not set 712# CONFIG_HPFS_FS is not set
@@ -631,20 +718,22 @@ CONFIG_RAMFS=y
631# Network File Systems 718# Network File Systems
632# 719#
633CONFIG_NFS_FS=y 720CONFIG_NFS_FS=y
634# CONFIG_NFS_V3 is not set 721CONFIG_NFS_V3=y
722# CONFIG_NFS_V3_ACL is not set
635# CONFIG_NFS_V4 is not set 723# CONFIG_NFS_V4 is not set
636# CONFIG_NFS_DIRECTIO is not set 724# CONFIG_NFS_DIRECTIO is not set
637# CONFIG_NFSD is not set 725# CONFIG_NFSD is not set
638CONFIG_ROOT_NFS=y 726CONFIG_ROOT_NFS=y
639CONFIG_LOCKD=y 727CONFIG_LOCKD=y
640# CONFIG_EXPORTFS is not set 728CONFIG_LOCKD_V4=y
729CONFIG_NFS_COMMON=y
641CONFIG_SUNRPC=y 730CONFIG_SUNRPC=y
642# CONFIG_RPCSEC_GSS_KRB5 is not set 731# CONFIG_RPCSEC_GSS_KRB5 is not set
732# CONFIG_RPCSEC_GSS_SPKM3 is not set
643# CONFIG_SMB_FS is not set 733# CONFIG_SMB_FS is not set
644# CONFIG_CIFS is not set 734# CONFIG_CIFS is not set
645# CONFIG_NCP_FS is not set 735# CONFIG_NCP_FS is not set
646# CONFIG_CODA_FS is not set 736# CONFIG_CODA_FS is not set
647# CONFIG_INTERMEZZO_FS is not set
648# CONFIG_AFS_FS is not set 737# CONFIG_AFS_FS is not set
649 738
650# 739#
@@ -661,20 +750,35 @@ CONFIG_MSDOS_PARTITION=y
661# 750#
662# Library routines 751# Library routines
663# 752#
664# CONFIG_CRC32 is not set 753# CONFIG_CRC_CCITT is not set
754CONFIG_CRC32=y
755# CONFIG_LIBCRC32C is not set
756CONFIG_ZLIB_INFLATE=y
757CONFIG_ZLIB_DEFLATE=y
758
759#
760# Profiling support
761#
762# CONFIG_PROFILING is not set
665 763
666# 764#
667# Kernel hacking 765# Kernel hacking
668# 766#
767# CONFIG_PRINTK_TIME is not set
669# CONFIG_DEBUG_KERNEL is not set 768# CONFIG_DEBUG_KERNEL is not set
670# CONFIG_SERIAL_TEXT_DEBUG is not set 769CONFIG_LOG_BUF_SHIFT=14
671 770
672# 771#
673# Security options 772# Security options
674# 773#
774# CONFIG_KEYS is not set
675# CONFIG_SECURITY is not set 775# CONFIG_SECURITY is not set
676 776
677# 777#
678# Cryptographic options 778# Cryptographic options
679# 779#
680# CONFIG_CRYPTO is not set 780# CONFIG_CRYPTO is not set
781
782#
783# Hardware crypto devices
784#
diff --git a/arch/ppc/configs/katana_defconfig b/arch/ppc/configs/katana_defconfig
index f0b0d5720154..0f3bb9af9c22 100644
--- a/arch/ppc/configs/katana_defconfig
+++ b/arch/ppc/configs/katana_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11 3# Linux kernel version: 2.6.13-mm1
4# Tue Mar 8 17:31:00 2005 4# Thu Sep 1 17:16:03 2005
5# 5#
6CONFIG_MMU=y 6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y 7CONFIG_GENERIC_HARDIRQS=y
@@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y 11CONFIG_PPC=y
12CONFIG_PPC32=y 12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y 13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14 15
15# 16#
16# Code maturity level options 17# Code maturity level options
@@ -18,28 +19,31 @@ CONFIG_GENERIC_NVRAM=y
18CONFIG_EXPERIMENTAL=y 19CONFIG_EXPERIMENTAL=y
19CONFIG_CLEAN_COMPILE=y 20CONFIG_CLEAN_COMPILE=y
20CONFIG_BROKEN_ON_SMP=y 21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
21 23
22# 24#
23# General setup 25# General setup
24# 26#
25CONFIG_LOCALVERSION="" 27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
26CONFIG_SWAP=y 29CONFIG_SWAP=y
27CONFIG_SYSVIPC=y 30CONFIG_SYSVIPC=y
28# CONFIG_POSIX_MQUEUE is not set 31# CONFIG_POSIX_MQUEUE is not set
29# CONFIG_BSD_PROCESS_ACCT is not set 32# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y 33CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set 34# CONFIG_AUDIT is not set
32CONFIG_LOG_BUF_SHIFT=14
33# CONFIG_HOTPLUG is not set 35# CONFIG_HOTPLUG is not set
34CONFIG_KOBJECT_UEVENT=y 36CONFIG_KOBJECT_UEVENT=y
35# CONFIG_IKCONFIG is not set 37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
36# CONFIG_EMBEDDED is not set 39# CONFIG_EMBEDDED is not set
37CONFIG_KALLSYMS=y 40CONFIG_KALLSYMS=y
38# CONFIG_KALLSYMS_EXTRA_PASS is not set 41# CONFIG_KALLSYMS_EXTRA_PASS is not set
42CONFIG_PRINTK=y
43CONFIG_BUG=y
39CONFIG_BASE_FULL=y 44CONFIG_BASE_FULL=y
40CONFIG_FUTEX=y 45CONFIG_FUTEX=y
41CONFIG_EPOLL=y 46CONFIG_EPOLL=y
42# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
43CONFIG_SHMEM=y 47CONFIG_SHMEM=y
44CONFIG_CC_ALIGN_FUNCTIONS=0 48CONFIG_CC_ALIGN_FUNCTIONS=0
45CONFIG_CC_ALIGN_LABELS=0 49CONFIG_CC_ALIGN_LABELS=0
@@ -68,15 +72,23 @@ CONFIG_6xx=y
68# CONFIG_POWER3 is not set 72# CONFIG_POWER3 is not set
69# CONFIG_POWER4 is not set 73# CONFIG_POWER4 is not set
70# CONFIG_8xx is not set 74# CONFIG_8xx is not set
75# CONFIG_E200 is not set
71# CONFIG_E500 is not set 76# CONFIG_E500 is not set
77CONFIG_PPC_FPU=y
72CONFIG_ALTIVEC=y 78CONFIG_ALTIVEC=y
73# CONFIG_TAU is not set 79# CONFIG_TAU is not set
80# CONFIG_KEXEC is not set
74# CONFIG_CPU_FREQ is not set 81# CONFIG_CPU_FREQ is not set
75# CONFIG_83xx is not set 82# CONFIG_WANT_EARLY_SERIAL is not set
76CONFIG_PPC_STD_MMU=y 83CONFIG_PPC_STD_MMU=y
77CONFIG_NOT_COHERENT_CACHE=y 84CONFIG_NOT_COHERENT_CACHE=y
78 85
79# 86#
87# Performance-monitoring counters support
88#
89# CONFIG_PERFCTR is not set
90
91#
80# Platform options 92# Platform options
81# 93#
82# CONFIG_PPC_MULTIPLATFORM is not set 94# CONFIG_PPC_MULTIPLATFORM is not set
@@ -84,21 +96,18 @@ CONFIG_NOT_COHERENT_CACHE=y
84CONFIG_KATANA=y 96CONFIG_KATANA=y
85# CONFIG_WILLOW is not set 97# CONFIG_WILLOW is not set
86# CONFIG_CPCI690 is not set 98# CONFIG_CPCI690 is not set
87# CONFIG_PCORE is not set
88# CONFIG_POWERPMC250 is not set 99# CONFIG_POWERPMC250 is not set
89# CONFIG_CHESTNUT is not set 100# CONFIG_CHESTNUT is not set
90# CONFIG_SPRUCE is not set 101# CONFIG_SPRUCE is not set
102# CONFIG_HDPU is not set
91# CONFIG_EV64260 is not set 103# CONFIG_EV64260 is not set
92# CONFIG_LOPEC is not set 104# CONFIG_LOPEC is not set
93# CONFIG_MCPN765 is not set
94# CONFIG_MVME5100 is not set 105# CONFIG_MVME5100 is not set
95# CONFIG_PPLUS is not set 106# CONFIG_PPLUS is not set
96# CONFIG_PRPMC750 is not set 107# CONFIG_PRPMC750 is not set
97# CONFIG_PRPMC800 is not set 108# CONFIG_PRPMC800 is not set
98# CONFIG_SANDPOINT is not set 109# CONFIG_SANDPOINT is not set
99# CONFIG_RADSTONE_PPC7D is not set 110# CONFIG_RADSTONE_PPC7D is not set
100# CONFIG_ADIR is not set
101# CONFIG_K2 is not set
102# CONFIG_PAL4 is not set 111# CONFIG_PAL4 is not set
103# CONFIG_GEMINI is not set 112# CONFIG_GEMINI is not set
104# CONFIG_EST8260 is not set 113# CONFIG_EST8260 is not set
@@ -109,6 +118,8 @@ CONFIG_KATANA=y
109# CONFIG_ADS8272 is not set 118# CONFIG_ADS8272 is not set
110# CONFIG_PQ2FADS is not set 119# CONFIG_PQ2FADS is not set
111# CONFIG_LITE5200 is not set 120# CONFIG_LITE5200 is not set
121# CONFIG_MPC834x_SYS is not set
122# CONFIG_EV64360 is not set
112CONFIG_MV64360=y 123CONFIG_MV64360=y
113CONFIG_MV64X60=y 124CONFIG_MV64X60=y
114 125
@@ -118,12 +129,28 @@ CONFIG_MV64X60=y
118CONFIG_MV64X60_BASE=0xf8100000 129CONFIG_MV64X60_BASE=0xf8100000
119CONFIG_MV64X60_NEW_BASE=0xf8100000 130CONFIG_MV64X60_NEW_BASE=0xf8100000
120# CONFIG_SMP is not set 131# CONFIG_SMP is not set
132CONFIG_HIGHMEM=y
133# CONFIG_HZ_100 is not set
134CONFIG_HZ_250=y
135# CONFIG_HZ_1000 is not set
136CONFIG_HZ=250
137CONFIG_PREEMPT_NONE=y
138# CONFIG_PREEMPT_VOLUNTARY is not set
121# CONFIG_PREEMPT is not set 139# CONFIG_PREEMPT is not set
122# CONFIG_HIGHMEM is not set 140CONFIG_SELECT_MEMORY_MODEL=y
141CONFIG_FLATMEM_MANUAL=y
142# CONFIG_DISCONTIGMEM_MANUAL is not set
143# CONFIG_SPARSEMEM_MANUAL is not set
144CONFIG_FLATMEM=y
145CONFIG_FLAT_NODE_MEM_MAP=y
146# CONFIG_SPARSEMEM_STATIC is not set
123CONFIG_BINFMT_ELF=y 147CONFIG_BINFMT_ELF=y
124CONFIG_BINFMT_MISC=y 148CONFIG_BINFMT_MISC=y
125CONFIG_CMDLINE_BOOL=y 149CONFIG_CMDLINE_BOOL=y
126CONFIG_CMDLINE="console=ttyMM0,9600 ip=on" 150CONFIG_CMDLINE="console=ttyMM0 ip=on"
151# CONFIG_PM is not set
152CONFIG_SECCOMP=y
153CONFIG_ISA_DMA_API=y
127 154
128# 155#
129# Bus options 156# Bus options
@@ -132,7 +159,6 @@ CONFIG_GENERIC_ISA_DMA=y
132CONFIG_PCI=y 159CONFIG_PCI=y
133CONFIG_PCI_DOMAINS=y 160CONFIG_PCI_DOMAINS=y
134CONFIG_PCI_LEGACY_PROC=y 161CONFIG_PCI_LEGACY_PROC=y
135CONFIG_PCI_NAMES=y
136 162
137# 163#
138# PCCARD (PCMCIA/CardBus) support 164# PCCARD (PCMCIA/CardBus) support
@@ -140,13 +166,10 @@ CONFIG_PCI_NAMES=y
140# CONFIG_PCCARD is not set 166# CONFIG_PCCARD is not set
141 167
142# 168#
143# PC-card bridges
144#
145
146#
147# Advanced setup 169# Advanced setup
148# 170#
149CONFIG_ADVANCED_OPTIONS=y 171CONFIG_ADVANCED_OPTIONS=y
172# CONFIG_HIGHMEM_START_BOOL is not set
150CONFIG_HIGHMEM_START=0xfe000000 173CONFIG_HIGHMEM_START=0xfe000000
151# CONFIG_LOWMEM_SIZE_BOOL is not set 174# CONFIG_LOWMEM_SIZE_BOOL is not set
152CONFIG_LOWMEM_SIZE=0x30000000 175CONFIG_LOWMEM_SIZE=0x30000000
@@ -162,6 +185,76 @@ CONFIG_CONSISTENT_SIZE=0x00400000
162CONFIG_BOOT_LOAD=0x00800000 185CONFIG_BOOT_LOAD=0x00800000
163 186
164# 187#
188# Networking
189#
190CONFIG_NET=y
191
192#
193# Networking options
194#
195CONFIG_PACKET=y
196# CONFIG_PACKET_MMAP is not set
197CONFIG_UNIX=y
198# CONFIG_NET_KEY is not set
199CONFIG_INET=y
200CONFIG_IP_MULTICAST=y
201# CONFIG_IP_ADVANCED_ROUTER is not set
202CONFIG_IP_FIB_HASH=y
203CONFIG_IP_PNP=y
204CONFIG_IP_PNP_DHCP=y
205# CONFIG_IP_PNP_BOOTP is not set
206# CONFIG_IP_PNP_RARP is not set
207# CONFIG_NET_IPIP is not set
208# CONFIG_NET_IPGRE is not set
209# CONFIG_IP_MROUTE is not set
210# CONFIG_ARPD is not set
211CONFIG_SYN_COOKIES=y
212# CONFIG_INET_AH is not set
213# CONFIG_INET_ESP is not set
214# CONFIG_INET_IPCOMP is not set
215# CONFIG_INET_TUNNEL is not set
216CONFIG_INET_DIAG=y
217CONFIG_INET_TCP_DIAG=y
218# CONFIG_TCP_CONG_ADVANCED is not set
219CONFIG_TCP_CONG_BIC=y
220# CONFIG_IPV6 is not set
221# CONFIG_NETFILTER is not set
222
223#
224# DCCP Configuration (EXPERIMENTAL)
225#
226# CONFIG_IP_DCCP is not set
227
228#
229# SCTP Configuration (EXPERIMENTAL)
230#
231# CONFIG_IP_SCTP is not set
232# CONFIG_ATM is not set
233# CONFIG_BRIDGE is not set
234# CONFIG_VLAN_8021Q is not set
235# CONFIG_DECNET is not set
236# CONFIG_LLC2 is not set
237# CONFIG_IPX is not set
238# CONFIG_ATALK is not set
239# CONFIG_X25 is not set
240# CONFIG_LAPB is not set
241# CONFIG_NET_DIVERT is not set
242# CONFIG_ECONET is not set
243# CONFIG_WAN_ROUTER is not set
244# CONFIG_NET_SCHED is not set
245# CONFIG_NET_CLS_ROUTE is not set
246
247#
248# Network testing
249#
250# CONFIG_NET_PKTGEN is not set
251# CONFIG_NETFILTER_NETLINK is not set
252# CONFIG_HAMRADIO is not set
253# CONFIG_IRDA is not set
254# CONFIG_BT is not set
255# CONFIG_IEEE80211 is not set
256
257#
165# Device Drivers 258# Device Drivers
166# 259#
167 260
@@ -177,8 +270,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
177# 270#
178CONFIG_MTD=y 271CONFIG_MTD=y
179# CONFIG_MTD_DEBUG is not set 272# CONFIG_MTD_DEBUG is not set
180CONFIG_MTD_PARTITIONS=y
181CONFIG_MTD_CONCAT=y 273CONFIG_MTD_CONCAT=y
274CONFIG_MTD_PARTITIONS=y
182# CONFIG_MTD_REDBOOT_PARTS is not set 275# CONFIG_MTD_REDBOOT_PARTS is not set
183# CONFIG_MTD_CMDLINE_PARTS is not set 276# CONFIG_MTD_CMDLINE_PARTS is not set
184 277
@@ -212,6 +305,7 @@ CONFIG_MTD_MAP_BANK_WIDTH_4=y
212CONFIG_MTD_CFI_I2=y 305CONFIG_MTD_CFI_I2=y
213# CONFIG_MTD_CFI_I4 is not set 306# CONFIG_MTD_CFI_I4 is not set
214# CONFIG_MTD_CFI_I8 is not set 307# CONFIG_MTD_CFI_I8 is not set
308# CONFIG_MTD_OTP is not set
215CONFIG_MTD_CFI_INTELEXT=y 309CONFIG_MTD_CFI_INTELEXT=y
216# CONFIG_MTD_CFI_AMDSTD is not set 310# CONFIG_MTD_CFI_AMDSTD is not set
217# CONFIG_MTD_CFI_STAA is not set 311# CONFIG_MTD_CFI_STAA is not set
@@ -219,7 +313,6 @@ CONFIG_MTD_CFI_UTIL=y
219# CONFIG_MTD_RAM is not set 313# CONFIG_MTD_RAM is not set
220# CONFIG_MTD_ROM is not set 314# CONFIG_MTD_ROM is not set
221# CONFIG_MTD_ABSENT is not set 315# CONFIG_MTD_ABSENT is not set
222# CONFIG_MTD_XIP is not set
223 316
224# 317#
225# Mapping drivers for chip access 318# Mapping drivers for chip access
@@ -229,6 +322,7 @@ CONFIG_MTD_PHYSMAP=y
229CONFIG_MTD_PHYSMAP_START=0xe0000000 322CONFIG_MTD_PHYSMAP_START=0xe0000000
230CONFIG_MTD_PHYSMAP_LEN=0x0 323CONFIG_MTD_PHYSMAP_LEN=0x0
231CONFIG_MTD_PHYSMAP_BANKWIDTH=4 324CONFIG_MTD_PHYSMAP_BANKWIDTH=4
325# CONFIG_MTD_PLATRAM is not set
232 326
233# 327#
234# Self-contained MTD device drivers 328# Self-contained MTD device drivers
@@ -278,7 +372,6 @@ CONFIG_BLK_DEV_RAM=y
278CONFIG_BLK_DEV_RAM_COUNT=16 372CONFIG_BLK_DEV_RAM_COUNT=16
279CONFIG_BLK_DEV_RAM_SIZE=4096 373CONFIG_BLK_DEV_RAM_SIZE=4096
280CONFIG_BLK_DEV_INITRD=y 374CONFIG_BLK_DEV_INITRD=y
281CONFIG_INITRAMFS_SOURCE=""
282# CONFIG_LBD is not set 375# CONFIG_LBD is not set
283# CONFIG_CDROM_PKTCDVD is not set 376# CONFIG_CDROM_PKTCDVD is not set
284 377
@@ -299,6 +392,7 @@ CONFIG_IOSCHED_CFQ=y
299# 392#
300# SCSI device support 393# SCSI device support
301# 394#
395# CONFIG_RAID_ATTRS is not set
302# CONFIG_SCSI is not set 396# CONFIG_SCSI is not set
303 397
304# 398#
@@ -309,6 +403,7 @@ CONFIG_IOSCHED_CFQ=y
309# 403#
310# Fusion MPT device support 404# Fusion MPT device support
311# 405#
406# CONFIG_FUSION is not set
312 407
313# 408#
314# IEEE 1394 (FireWire) support 409# IEEE 1394 (FireWire) support
@@ -325,71 +420,8 @@ CONFIG_IOSCHED_CFQ=y
325# 420#
326 421
327# 422#
328# Networking support 423# Network device support
329#
330CONFIG_NET=y
331
332#
333# Networking options
334#
335CONFIG_PACKET=y
336# CONFIG_PACKET_MMAP is not set
337# CONFIG_NETLINK_DEV is not set
338CONFIG_UNIX=y
339# CONFIG_NET_KEY is not set
340CONFIG_INET=y
341CONFIG_IP_MULTICAST=y
342# CONFIG_IP_ADVANCED_ROUTER is not set
343CONFIG_IP_PNP=y
344CONFIG_IP_PNP_DHCP=y
345# CONFIG_IP_PNP_BOOTP is not set
346# CONFIG_IP_PNP_RARP is not set
347# CONFIG_NET_IPIP is not set
348# CONFIG_NET_IPGRE is not set
349# CONFIG_IP_MROUTE is not set
350# CONFIG_ARPD is not set
351CONFIG_SYN_COOKIES=y
352# CONFIG_INET_AH is not set
353# CONFIG_INET_ESP is not set
354# CONFIG_INET_IPCOMP is not set
355# CONFIG_INET_TUNNEL is not set
356CONFIG_IP_TCPDIAG=y
357# CONFIG_IP_TCPDIAG_IPV6 is not set
358# CONFIG_IPV6 is not set
359# CONFIG_NETFILTER is not set
360
361#
362# SCTP Configuration (EXPERIMENTAL)
363#
364# CONFIG_IP_SCTP is not set
365# CONFIG_ATM is not set
366# CONFIG_BRIDGE is not set
367# CONFIG_VLAN_8021Q is not set
368# CONFIG_DECNET is not set
369# CONFIG_LLC2 is not set
370# CONFIG_IPX is not set
371# CONFIG_ATALK is not set
372# CONFIG_X25 is not set
373# CONFIG_LAPB is not set
374# CONFIG_NET_DIVERT is not set
375# CONFIG_ECONET is not set
376# CONFIG_WAN_ROUTER is not set
377
378#
379# QoS and/or fair queueing
380#
381# CONFIG_NET_SCHED is not set
382# CONFIG_NET_CLS_ROUTE is not set
383
384#
385# Network testing
386# 424#
387# CONFIG_NET_PKTGEN is not set
388# CONFIG_NETPOLL is not set
389# CONFIG_NET_POLL_CONTROLLER is not set
390# CONFIG_HAMRADIO is not set
391# CONFIG_IRDA is not set
392# CONFIG_BT is not set
393CONFIG_NETDEVICES=y 425CONFIG_NETDEVICES=y
394# CONFIG_DUMMY is not set 426# CONFIG_DUMMY is not set
395# CONFIG_BONDING is not set 427# CONFIG_BONDING is not set
@@ -402,6 +434,11 @@ CONFIG_NETDEVICES=y
402# CONFIG_ARCNET is not set 434# CONFIG_ARCNET is not set
403 435
404# 436#
437# PHY device support
438#
439# CONFIG_PHYLIB is not set
440
441#
405# Ethernet (10 or 100Mbit) 442# Ethernet (10 or 100Mbit)
406# 443#
407CONFIG_NET_ETHERNET=y 444CONFIG_NET_ETHERNET=y
@@ -422,6 +459,7 @@ CONFIG_TULIP=y
422# CONFIG_DE4X5 is not set 459# CONFIG_DE4X5 is not set
423# CONFIG_WINBOND_840 is not set 460# CONFIG_WINBOND_840 is not set
424# CONFIG_DM9102 is not set 461# CONFIG_DM9102 is not set
462# CONFIG_ULI526X is not set
425# CONFIG_HP100 is not set 463# CONFIG_HP100 is not set
426CONFIG_NET_PCI=y 464CONFIG_NET_PCI=y
427# CONFIG_PCNET32 is not set 465# CONFIG_PCNET32 is not set
@@ -448,14 +486,19 @@ CONFIG_E100=y
448# 486#
449# CONFIG_ACENIC is not set 487# CONFIG_ACENIC is not set
450# CONFIG_DL2K is not set 488# CONFIG_DL2K is not set
451# CONFIG_E1000 is not set 489CONFIG_E1000=y
490# CONFIG_E1000_NAPI is not set
452# CONFIG_NS83820 is not set 491# CONFIG_NS83820 is not set
453# CONFIG_HAMACHI is not set 492# CONFIG_HAMACHI is not set
454# CONFIG_YELLOWFIN is not set 493# CONFIG_YELLOWFIN is not set
455# CONFIG_R8169 is not set 494# CONFIG_R8169 is not set
495# CONFIG_SIS190 is not set
496# CONFIG_SKGE is not set
497# CONFIG_SKY2 is not set
456# CONFIG_SK98LIN is not set 498# CONFIG_SK98LIN is not set
457# CONFIG_VIA_VELOCITY is not set 499# CONFIG_VIA_VELOCITY is not set
458# CONFIG_TIGON3 is not set 500# CONFIG_TIGON3 is not set
501# CONFIG_BNX2 is not set
459CONFIG_MV643XX_ETH=y 502CONFIG_MV643XX_ETH=y
460CONFIG_MV643XX_ETH_0=y 503CONFIG_MV643XX_ETH_0=y
461CONFIG_MV643XX_ETH_1=y 504CONFIG_MV643XX_ETH_1=y
@@ -464,6 +507,7 @@ CONFIG_MV643XX_ETH_2=y
464# 507#
465# Ethernet (10000 Mbit) 508# Ethernet (10000 Mbit)
466# 509#
510# CONFIG_CHELSIO_T1 is not set
467# CONFIG_IXGB is not set 511# CONFIG_IXGB is not set
468# CONFIG_S2IO is not set 512# CONFIG_S2IO is not set
469 513
@@ -487,6 +531,11 @@ CONFIG_MV643XX_ETH_2=y
487# CONFIG_SLIP is not set 531# CONFIG_SLIP is not set
488# CONFIG_SHAPER is not set 532# CONFIG_SHAPER is not set
489# CONFIG_NETCONSOLE is not set 533# CONFIG_NETCONSOLE is not set
534# CONFIG_KGDBOE is not set
535# CONFIG_NETPOLL is not set
536# CONFIG_NETPOLL_RX is not set
537# CONFIG_NETPOLL_TRAP is not set
538# CONFIG_NET_POLL_CONTROLLER is not set
490 539
491# 540#
492# ISDN subsystem 541# ISDN subsystem
@@ -516,14 +565,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
516# CONFIG_INPUT_EVBUG is not set 565# CONFIG_INPUT_EVBUG is not set
517 566
518# 567#
519# Input I/O drivers
520#
521# CONFIG_GAMEPORT is not set
522CONFIG_SOUND_GAMEPORT=y
523# CONFIG_SERIO is not set
524# CONFIG_SERIO_I8042 is not set
525
526#
527# Input Device Drivers 568# Input Device Drivers
528# 569#
529# CONFIG_INPUT_KEYBOARD is not set 570# CONFIG_INPUT_KEYBOARD is not set
@@ -533,6 +574,12 @@ CONFIG_SOUND_GAMEPORT=y
533# CONFIG_INPUT_MISC is not set 574# CONFIG_INPUT_MISC is not set
534 575
535# 576#
577# Hardware I/O ports
578#
579# CONFIG_SERIO is not set
580# CONFIG_GAMEPORT is not set
581
582#
536# Character devices 583# Character devices
537# 584#
538CONFIG_VT=y 585CONFIG_VT=y
@@ -552,6 +599,7 @@ CONFIG_SERIAL_MPSC=y
552CONFIG_SERIAL_MPSC_CONSOLE=y 599CONFIG_SERIAL_MPSC_CONSOLE=y
553CONFIG_SERIAL_CORE=y 600CONFIG_SERIAL_CORE=y
554CONFIG_SERIAL_CORE_CONSOLE=y 601CONFIG_SERIAL_CORE_CONSOLE=y
602# CONFIG_SERIAL_JSM is not set
555CONFIG_UNIX98_PTYS=y 603CONFIG_UNIX98_PTYS=y
556CONFIG_LEGACY_PTYS=y 604CONFIG_LEGACY_PTYS=y
557CONFIG_LEGACY_PTY_COUNT=256 605CONFIG_LEGACY_PTY_COUNT=256
@@ -580,6 +628,11 @@ CONFIG_GEN_RTC=y
580# CONFIG_RAW_DRIVER is not set 628# CONFIG_RAW_DRIVER is not set
581 629
582# 630#
631# TPM devices
632#
633# CONFIG_TCG_TPM is not set
634
635#
583# I2C support 636# I2C support
584# 637#
585CONFIG_I2C=y 638CONFIG_I2C=y
@@ -602,11 +655,10 @@ CONFIG_I2C_CHARDEV=y
602# CONFIG_I2C_AMD8111 is not set 655# CONFIG_I2C_AMD8111 is not set
603# CONFIG_I2C_I801 is not set 656# CONFIG_I2C_I801 is not set
604# CONFIG_I2C_I810 is not set 657# CONFIG_I2C_I810 is not set
605# CONFIG_I2C_ISA is not set 658# CONFIG_I2C_PIIX4 is not set
606# CONFIG_I2C_MPC is not set 659# CONFIG_I2C_MPC is not set
607# CONFIG_I2C_NFORCE2 is not set 660# CONFIG_I2C_NFORCE2 is not set
608# CONFIG_I2C_PARPORT_LIGHT is not set 661# CONFIG_I2C_PARPORT_LIGHT is not set
609# CONFIG_I2C_PIIX4 is not set
610# CONFIG_I2C_PROSAVAGE is not set 662# CONFIG_I2C_PROSAVAGE is not set
611# CONFIG_I2C_SAVAGE4 is not set 663# CONFIG_I2C_SAVAGE4 is not set
612# CONFIG_SCx200_ACB is not set 664# CONFIG_SCx200_ACB is not set
@@ -621,14 +673,39 @@ CONFIG_I2C_CHARDEV=y
621CONFIG_I2C_MV64XXX=y 673CONFIG_I2C_MV64XXX=y
622 674
623# 675#
624# Hardware Sensors Chip support 676# Miscellaneous I2C Chip support
625# 677#
626# CONFIG_I2C_SENSOR is not set 678# CONFIG_SENSORS_DS1337 is not set
679# CONFIG_SENSORS_DS1374 is not set
680# CONFIG_SENSORS_EEPROM is not set
681# CONFIG_SENSORS_PCF8574 is not set
682# CONFIG_SENSORS_PCA9539 is not set
683# CONFIG_SENSORS_PCF8591 is not set
684# CONFIG_SENSORS_RTC8564 is not set
685CONFIG_SENSORS_M41T00=y
686# CONFIG_SENSORS_MAX6875 is not set
687# CONFIG_I2C_DEBUG_CORE is not set
688# CONFIG_I2C_DEBUG_ALGO is not set
689# CONFIG_I2C_DEBUG_BUS is not set
690# CONFIG_I2C_DEBUG_CHIP is not set
691
692#
693# Dallas's 1-wire bus
694#
695# CONFIG_W1 is not set
696
697#
698# Hardware Monitoring support
699#
700CONFIG_HWMON=y
701# CONFIG_HWMON_VID is not set
627# CONFIG_SENSORS_ADM1021 is not set 702# CONFIG_SENSORS_ADM1021 is not set
628# CONFIG_SENSORS_ADM1025 is not set 703# CONFIG_SENSORS_ADM1025 is not set
629# CONFIG_SENSORS_ADM1026 is not set 704# CONFIG_SENSORS_ADM1026 is not set
630# CONFIG_SENSORS_ADM1031 is not set 705# CONFIG_SENSORS_ADM1031 is not set
706# CONFIG_SENSORS_ADM9240 is not set
631# CONFIG_SENSORS_ASB100 is not set 707# CONFIG_SENSORS_ASB100 is not set
708# CONFIG_SENSORS_ATXP1 is not set
632# CONFIG_SENSORS_DS1621 is not set 709# CONFIG_SENSORS_DS1621 is not set
633# CONFIG_SENSORS_FSCHER is not set 710# CONFIG_SENSORS_FSCHER is not set
634# CONFIG_SENSORS_FSCPOS is not set 711# CONFIG_SENSORS_FSCPOS is not set
@@ -644,36 +721,26 @@ CONFIG_I2C_MV64XXX=y
644# CONFIG_SENSORS_LM85 is not set 721# CONFIG_SENSORS_LM85 is not set
645# CONFIG_SENSORS_LM87 is not set 722# CONFIG_SENSORS_LM87 is not set
646# CONFIG_SENSORS_LM90 is not set 723# CONFIG_SENSORS_LM90 is not set
724# CONFIG_SENSORS_LM92 is not set
647# CONFIG_SENSORS_MAX1619 is not set 725# CONFIG_SENSORS_MAX1619 is not set
648# CONFIG_SENSORS_PC87360 is not set 726# CONFIG_SENSORS_PC87360 is not set
649# CONFIG_SENSORS_SMSC47B397 is not set
650# CONFIG_SENSORS_SIS5595 is not set 727# CONFIG_SENSORS_SIS5595 is not set
651# CONFIG_SENSORS_SMSC47M1 is not set 728# CONFIG_SENSORS_SMSC47M1 is not set
729# CONFIG_SENSORS_SMSC47B397 is not set
652# CONFIG_SENSORS_VIA686A is not set 730# CONFIG_SENSORS_VIA686A is not set
653# CONFIG_SENSORS_W83781D is not set 731# CONFIG_SENSORS_W83781D is not set
732# CONFIG_SENSORS_W83792D is not set
654# CONFIG_SENSORS_W83L785TS is not set 733# CONFIG_SENSORS_W83L785TS is not set
655# CONFIG_SENSORS_W83627HF is not set 734# CONFIG_SENSORS_W83627HF is not set
735# CONFIG_SENSORS_W83627EHF is not set
736# CONFIG_HWMON_DEBUG_CHIP is not set
656 737
657# 738#
658# Other I2C Chip support 739# Misc devices
659#
660# CONFIG_SENSORS_EEPROM is not set
661# CONFIG_SENSORS_PCF8574 is not set
662# CONFIG_SENSORS_PCF8591 is not set
663# CONFIG_SENSORS_RTC8564 is not set
664CONFIG_SENSORS_M41T00=y
665# CONFIG_I2C_DEBUG_CORE is not set
666# CONFIG_I2C_DEBUG_ALGO is not set
667# CONFIG_I2C_DEBUG_BUS is not set
668# CONFIG_I2C_DEBUG_CHIP is not set
669
670#
671# Dallas's 1-wire bus
672# 740#
673# CONFIG_W1 is not set
674 741
675# 742#
676# Misc devices 743# Multimedia Capabilities Port drivers
677# 744#
678 745
679# 746#
@@ -698,6 +765,11 @@ CONFIG_SENSORS_M41T00=y
698CONFIG_DUMMY_CONSOLE=y 765CONFIG_DUMMY_CONSOLE=y
699 766
700# 767#
768# Speakup console speech
769#
770# CONFIG_SPEAKUP is not set
771
772#
701# Sound 773# Sound
702# 774#
703# CONFIG_SOUND is not set 775# CONFIG_SOUND is not set
@@ -705,13 +777,9 @@ CONFIG_DUMMY_CONSOLE=y
705# 777#
706# USB support 778# USB support
707# 779#
708# CONFIG_USB is not set
709CONFIG_USB_ARCH_HAS_HCD=y 780CONFIG_USB_ARCH_HAS_HCD=y
710CONFIG_USB_ARCH_HAS_OHCI=y 781CONFIG_USB_ARCH_HAS_OHCI=y
711 782# CONFIG_USB is not set
712#
713# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
714#
715 783
716# 784#
717# USB Gadget Support 785# USB Gadget Support
@@ -729,25 +797,39 @@ CONFIG_USB_ARCH_HAS_OHCI=y
729# CONFIG_INFINIBAND is not set 797# CONFIG_INFINIBAND is not set
730 798
731# 799#
800# SN Devices
801#
802
803#
804# Distributed Lock Manager
805#
806# CONFIG_DLM is not set
807
808#
732# File systems 809# File systems
733# 810#
734CONFIG_EXT2_FS=y 811CONFIG_EXT2_FS=y
735# CONFIG_EXT2_FS_XATTR is not set 812# CONFIG_EXT2_FS_XATTR is not set
813# CONFIG_EXT2_FS_XIP is not set
736# CONFIG_EXT3_FS is not set 814# CONFIG_EXT3_FS is not set
737# CONFIG_JBD is not set 815# CONFIG_REISER4_FS is not set
738# CONFIG_REISERFS_FS is not set 816# CONFIG_REISERFS_FS is not set
739# CONFIG_JFS_FS is not set 817# CONFIG_JFS_FS is not set
818# CONFIG_FS_POSIX_ACL is not set
740 819
741# 820#
742# XFS support 821# XFS support
743# 822#
744# CONFIG_XFS_FS is not set 823# CONFIG_XFS_FS is not set
824# CONFIG_OCFS2_FS is not set
745# CONFIG_MINIX_FS is not set 825# CONFIG_MINIX_FS is not set
746# CONFIG_ROMFS_FS is not set 826# CONFIG_ROMFS_FS is not set
827CONFIG_INOTIFY=y
747# CONFIG_QUOTA is not set 828# CONFIG_QUOTA is not set
748CONFIG_DNOTIFY=y 829CONFIG_DNOTIFY=y
749# CONFIG_AUTOFS_FS is not set 830# CONFIG_AUTOFS_FS is not set
750# CONFIG_AUTOFS4_FS is not set 831# CONFIG_AUTOFS4_FS is not set
832# CONFIG_FUSE_FS is not set
751 833
752# 834#
753# CD-ROM/DVD Filesystems 835# CD-ROM/DVD Filesystems
@@ -768,20 +850,18 @@ CONFIG_DNOTIFY=y
768CONFIG_PROC_FS=y 850CONFIG_PROC_FS=y
769CONFIG_PROC_KCORE=y 851CONFIG_PROC_KCORE=y
770CONFIG_SYSFS=y 852CONFIG_SYSFS=y
771CONFIG_DEVFS_FS=y
772# CONFIG_DEVFS_MOUNT is not set
773# CONFIG_DEVFS_DEBUG is not set
774# CONFIG_DEVPTS_FS_XATTR is not set
775CONFIG_TMPFS=y 853CONFIG_TMPFS=y
776# CONFIG_TMPFS_XATTR is not set
777# CONFIG_HUGETLB_PAGE is not set 854# CONFIG_HUGETLB_PAGE is not set
778CONFIG_RAMFS=y 855CONFIG_RAMFS=y
856# CONFIG_CONFIGFS_FS is not set
857# CONFIG_RELAYFS_FS is not set
779 858
780# 859#
781# Miscellaneous filesystems 860# Miscellaneous filesystems
782# 861#
783# CONFIG_ADFS_FS is not set 862# CONFIG_ADFS_FS is not set
784# CONFIG_AFFS_FS is not set 863# CONFIG_AFFS_FS is not set
864# CONFIG_ASFS_FS is not set
785# CONFIG_HFS_FS is not set 865# CONFIG_HFS_FS is not set
786# CONFIG_HFSPLUS_FS is not set 866# CONFIG_HFSPLUS_FS is not set
787# CONFIG_BEFS_FS is not set 867# CONFIG_BEFS_FS is not set
@@ -801,12 +881,14 @@ CONFIG_RAMFS=y
801# 881#
802CONFIG_NFS_FS=y 882CONFIG_NFS_FS=y
803CONFIG_NFS_V3=y 883CONFIG_NFS_V3=y
884# CONFIG_NFS_V3_ACL is not set
804# CONFIG_NFS_V4 is not set 885# CONFIG_NFS_V4 is not set
805# CONFIG_NFS_DIRECTIO is not set 886# CONFIG_NFS_DIRECTIO is not set
806# CONFIG_NFSD is not set 887# CONFIG_NFSD is not set
807CONFIG_ROOT_NFS=y 888CONFIG_ROOT_NFS=y
808CONFIG_LOCKD=y 889CONFIG_LOCKD=y
809CONFIG_LOCKD_V4=y 890CONFIG_LOCKD_V4=y
891CONFIG_NFS_COMMON=y
810CONFIG_SUNRPC=y 892CONFIG_SUNRPC=y
811# CONFIG_RPCSEC_GSS_KRB5 is not set 893# CONFIG_RPCSEC_GSS_KRB5 is not set
812# CONFIG_RPCSEC_GSS_SPKM3 is not set 894# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -815,6 +897,7 @@ CONFIG_SUNRPC=y
815# CONFIG_NCP_FS is not set 897# CONFIG_NCP_FS is not set
816# CONFIG_CODA_FS is not set 898# CONFIG_CODA_FS is not set
817# CONFIG_AFS_FS is not set 899# CONFIG_AFS_FS is not set
900# CONFIG_9P_FS is not set
818 901
819# 902#
820# Partition Types 903# Partition Types
@@ -831,6 +914,7 @@ CONFIG_MSDOS_PARTITION=y
831# Library routines 914# Library routines
832# 915#
833# CONFIG_CRC_CCITT is not set 916# CONFIG_CRC_CCITT is not set
917# CONFIG_CRC16 is not set
834CONFIG_CRC32=y 918CONFIG_CRC32=y
835# CONFIG_LIBCRC32C is not set 919# CONFIG_LIBCRC32C is not set
836 920
@@ -842,8 +926,10 @@ CONFIG_CRC32=y
842# 926#
843# Kernel hacking 927# Kernel hacking
844# 928#
845# CONFIG_DEBUG_KERNEL is not set
846# CONFIG_PRINTK_TIME is not set 929# CONFIG_PRINTK_TIME is not set
930# CONFIG_DEBUG_KERNEL is not set
931CONFIG_LOG_BUF_SHIFT=14
932# CONFIG_SERIAL_TEXT_DEBUG is not set
847 933
848# 934#
849# Security options 935# Security options
diff --git a/arch/ppc/configs/mcpn765_defconfig b/arch/ppc/configs/mcpn765_defconfig
deleted file mode 100644
index 899e89a9ea6a..000000000000
--- a/arch/ppc/configs/mcpn765_defconfig
+++ /dev/null
@@ -1,579 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9CONFIG_GENERIC_NVRAM=y
10
11#
12# Code maturity level options
13#
14# CONFIG_EXPERIMENTAL is not set
15CONFIG_CLEAN_COMPILE=y
16CONFIG_STANDALONE=y
17CONFIG_BROKEN_ON_SMP=y
18
19#
20# General setup
21#
22# CONFIG_SWAP is not set
23CONFIG_SYSVIPC=y
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26CONFIG_LOG_BUF_SHIFT=14
27# CONFIG_HOTPLUG is not set
28# CONFIG_IKCONFIG is not set
29CONFIG_EMBEDDED=y
30CONFIG_KALLSYMS=y
31CONFIG_FUTEX=y
32CONFIG_EPOLL=y
33CONFIG_IOSCHED_NOOP=y
34CONFIG_IOSCHED_AS=y
35CONFIG_IOSCHED_DEADLINE=y
36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
37
38#
39# Loadable module support
40#
41CONFIG_MODULES=y
42# CONFIG_MODULE_UNLOAD is not set
43CONFIG_OBSOLETE_MODPARM=y
44# CONFIG_KMOD is not set
45
46#
47# Processor
48#
49CONFIG_6xx=y
50# CONFIG_40x is not set
51# CONFIG_44x is not set
52# CONFIG_POWER3 is not set
53# CONFIG_POWER4 is not set
54# CONFIG_8xx is not set
55CONFIG_ALTIVEC=y
56# CONFIG_TAU is not set
57# CONFIG_CPU_FREQ is not set
58CONFIG_PPC_STD_MMU=y
59
60#
61# Platform options
62#
63# CONFIG_PPC_MULTIPLATFORM is not set
64# CONFIG_APUS is not set
65# CONFIG_WILLOW is not set
66# CONFIG_PCORE is not set
67# CONFIG_POWERPMC250 is not set
68# CONFIG_EV64260 is not set
69# CONFIG_SPRUCE is not set
70# CONFIG_LOPEC is not set
71CONFIG_MCPN765=y
72# CONFIG_MVME5100 is not set
73# CONFIG_PPLUS is not set
74# CONFIG_PRPMC750 is not set
75# CONFIG_PRPMC800 is not set
76# CONFIG_SANDPOINT is not set
77# CONFIG_ADIR is not set
78# CONFIG_K2 is not set
79# CONFIG_PAL4 is not set
80# CONFIG_GEMINI is not set
81# CONFIG_EST8260 is not set
82# CONFIG_SBS8260 is not set
83# CONFIG_RPX6 is not set
84# CONFIG_TQM8260 is not set
85CONFIG_PPC_GEN550=y
86# CONFIG_SMP is not set
87# CONFIG_PREEMPT is not set
88CONFIG_HIGHMEM=y
89CONFIG_KERNEL_ELF=y
90CONFIG_BINFMT_ELF=y
91# CONFIG_BINFMT_MISC is not set
92CONFIG_CMDLINE_BOOL=y
93CONFIG_CMDLINE="ip=on"
94
95#
96# Bus options
97#
98CONFIG_GENERIC_ISA_DMA=y
99CONFIG_PCI=y
100CONFIG_PCI_DOMAINS=y
101# CONFIG_PCI_LEGACY_PROC is not set
102# CONFIG_PCI_NAMES is not set
103
104#
105# Advanced setup
106#
107# CONFIG_ADVANCED_OPTIONS is not set
108
109#
110# Default settings for advanced configuration options are used
111#
112CONFIG_HIGHMEM_START=0xfe000000
113CONFIG_LOWMEM_SIZE=0x30000000
114CONFIG_KERNEL_START=0xc0000000
115CONFIG_TASK_SIZE=0x80000000
116CONFIG_BOOT_LOAD=0x00800000
117
118#
119# Device Drivers
120#
121
122#
123# Generic Driver Options
124#
125
126#
127# Memory Technology Devices (MTD)
128#
129# CONFIG_MTD is not set
130
131#
132# Parallel port support
133#
134# CONFIG_PARPORT is not set
135
136#
137# Plug and Play support
138#
139
140#
141# Block devices
142#
143# CONFIG_BLK_DEV_FD is not set
144# CONFIG_BLK_CPQ_DA is not set
145# CONFIG_BLK_CPQ_CISS_DA is not set
146# CONFIG_BLK_DEV_DAC960 is not set
147CONFIG_BLK_DEV_LOOP=y
148# CONFIG_BLK_DEV_CRYPTOLOOP is not set
149# CONFIG_BLK_DEV_NBD is not set
150# CONFIG_BLK_DEV_CARMEL is not set
151CONFIG_BLK_DEV_RAM=y
152CONFIG_BLK_DEV_RAM_SIZE=4096
153CONFIG_BLK_DEV_INITRD=y
154# CONFIG_LBD is not set
155
156#
157# ATA/ATAPI/MFM/RLL support
158#
159CONFIG_IDE=y
160CONFIG_BLK_DEV_IDE=y
161
162#
163# Please see Documentation/ide.txt for help/info on IDE drives
164#
165CONFIG_BLK_DEV_IDEDISK=y
166# CONFIG_IDEDISK_MULTI_MODE is not set
167# CONFIG_IDEDISK_STROKE is not set
168# CONFIG_BLK_DEV_IDECD is not set
169# CONFIG_BLK_DEV_IDEFLOPPY is not set
170# CONFIG_IDE_TASK_IOCTL is not set
171
172#
173# IDE chipset support/bugfixes
174#
175# CONFIG_IDE_GENERIC is not set
176CONFIG_BLK_DEV_IDEPCI=y
177# CONFIG_IDEPCI_SHARE_IRQ is not set
178# CONFIG_BLK_DEV_OFFBOARD is not set
179# CONFIG_BLK_DEV_GENERIC is not set
180# CONFIG_BLK_DEV_SL82C105 is not set
181CONFIG_BLK_DEV_IDEDMA_PCI=y
182# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
183# CONFIG_IDEDMA_PCI_AUTO is not set
184CONFIG_BLK_DEV_ADMA=y
185# CONFIG_BLK_DEV_AEC62XX is not set
186# CONFIG_BLK_DEV_ALI15X3 is not set
187# CONFIG_BLK_DEV_AMD74XX is not set
188# CONFIG_BLK_DEV_CMD64X is not set
189# CONFIG_BLK_DEV_TRIFLEX is not set
190# CONFIG_BLK_DEV_CY82C693 is not set
191# CONFIG_BLK_DEV_CS5530 is not set
192# CONFIG_BLK_DEV_HPT34X is not set
193# CONFIG_BLK_DEV_HPT366 is not set
194# CONFIG_BLK_DEV_SC1200 is not set
195# CONFIG_BLK_DEV_PIIX is not set
196# CONFIG_BLK_DEV_NS87415 is not set
197# CONFIG_BLK_DEV_PDC202XX_OLD is not set
198# CONFIG_BLK_DEV_PDC202XX_NEW is not set
199# CONFIG_BLK_DEV_SVWKS is not set
200# CONFIG_BLK_DEV_SIIMAGE is not set
201# CONFIG_BLK_DEV_SLC90E66 is not set
202# CONFIG_BLK_DEV_TRM290 is not set
203CONFIG_BLK_DEV_VIA82CXXX=y
204CONFIG_BLK_DEV_IDEDMA=y
205# CONFIG_IDEDMA_IVB is not set
206# CONFIG_IDEDMA_AUTO is not set
207# CONFIG_BLK_DEV_HD is not set
208
209#
210# SCSI device support
211#
212# CONFIG_SCSI is not set
213
214#
215# Multi-device support (RAID and LVM)
216#
217# CONFIG_MD is not set
218
219#
220# Fusion MPT device support
221#
222# CONFIG_FUSION is not set
223
224#
225# IEEE 1394 (FireWire) support
226#
227# CONFIG_IEEE1394 is not set
228
229#
230# I2O device support
231#
232# CONFIG_I2O is not set
233
234#
235# Macintosh device drivers
236#
237
238#
239# Networking support
240#
241CONFIG_NET=y
242
243#
244# Networking options
245#
246CONFIG_PACKET=y
247# CONFIG_PACKET_MMAP is not set
248# CONFIG_NETLINK_DEV is not set
249CONFIG_UNIX=y
250# CONFIG_NET_KEY is not set
251CONFIG_INET=y
252# CONFIG_IP_MULTICAST is not set
253# CONFIG_IP_ADVANCED_ROUTER is not set
254CONFIG_IP_PNP=y
255CONFIG_IP_PNP_DHCP=y
256# CONFIG_IP_PNP_BOOTP is not set
257# CONFIG_IP_PNP_RARP is not set
258# CONFIG_NET_IPIP is not set
259# CONFIG_NET_IPGRE is not set
260# CONFIG_SYN_COOKIES is not set
261# CONFIG_INET_AH is not set
262# CONFIG_INET_ESP is not set
263# CONFIG_INET_IPCOMP is not set
264# CONFIG_DECNET is not set
265# CONFIG_BRIDGE is not set
266# CONFIG_NETFILTER is not set
267# CONFIG_VLAN_8021Q is not set
268# CONFIG_LLC2 is not set
269# CONFIG_IPX is not set
270# CONFIG_ATALK is not set
271
272#
273# QoS and/or fair queueing
274#
275# CONFIG_NET_SCHED is not set
276
277#
278# Network testing
279#
280# CONFIG_NET_PKTGEN is not set
281CONFIG_NETDEVICES=y
282
283#
284# ARCnet devices
285#
286# CONFIG_ARCNET is not set
287# CONFIG_DUMMY is not set
288# CONFIG_BONDING is not set
289# CONFIG_EQUALIZER is not set
290# CONFIG_TUN is not set
291
292#
293# Ethernet (10 or 100Mbit)
294#
295CONFIG_NET_ETHERNET=y
296CONFIG_MII=y
297# CONFIG_OAKNET is not set
298# CONFIG_HAPPYMEAL is not set
299# CONFIG_SUNGEM is not set
300# CONFIG_NET_VENDOR_3COM is not set
301
302#
303# Tulip family network device support
304#
305CONFIG_NET_TULIP=y
306CONFIG_TULIP=y
307# CONFIG_TULIP_MMIO is not set
308# CONFIG_TULIP_NAPI is not set
309# CONFIG_DE4X5 is not set
310# CONFIG_WINBOND_840 is not set
311# CONFIG_DM9102 is not set
312# CONFIG_HP100 is not set
313# CONFIG_NET_PCI is not set
314
315#
316# Ethernet (1000 Mbit)
317#
318# CONFIG_ACENIC is not set
319# CONFIG_DL2K is not set
320# CONFIG_E1000 is not set
321# CONFIG_NS83820 is not set
322# CONFIG_HAMACHI is not set
323# CONFIG_R8169 is not set
324# CONFIG_SK98LIN is not set
325# CONFIG_TIGON3 is not set
326
327#
328# Ethernet (10000 Mbit)
329#
330# CONFIG_IXGB is not set
331# CONFIG_FDDI is not set
332# CONFIG_PPP is not set
333# CONFIG_SLIP is not set
334
335#
336# Wireless LAN (non-hamradio)
337#
338# CONFIG_NET_RADIO is not set
339
340#
341# Token Ring devices
342#
343# CONFIG_TR is not set
344
345#
346# Wan interfaces
347#
348# CONFIG_WAN is not set
349
350#
351# Amateur Radio support
352#
353# CONFIG_HAMRADIO is not set
354
355#
356# IrDA (infrared) support
357#
358# CONFIG_IRDA is not set
359
360#
361# Bluetooth support
362#
363# CONFIG_BT is not set
364# CONFIG_NETPOLL is not set
365# CONFIG_NET_POLL_CONTROLLER is not set
366
367#
368# ISDN subsystem
369#
370# CONFIG_ISDN is not set
371
372#
373# Telephony Support
374#
375# CONFIG_PHONE is not set
376
377#
378# Input device support
379#
380# CONFIG_INPUT is not set
381
382#
383# Userland interfaces
384#
385
386#
387# Input I/O drivers
388#
389# CONFIG_GAMEPORT is not set
390CONFIG_SOUND_GAMEPORT=y
391# CONFIG_SERIO is not set
392# CONFIG_SERIO_I8042 is not set
393
394#
395# Input Device Drivers
396#
397
398#
399# Character devices
400#
401# CONFIG_VT is not set
402# CONFIG_SERIAL_NONSTANDARD is not set
403
404#
405# Serial drivers
406#
407CONFIG_SERIAL_8250=y
408CONFIG_SERIAL_8250_CONSOLE=y
409CONFIG_SERIAL_8250_NR_UARTS=4
410# CONFIG_SERIAL_8250_EXTENDED is not set
411
412#
413# Non-8250 serial port support
414#
415CONFIG_SERIAL_CORE=y
416CONFIG_SERIAL_CORE_CONSOLE=y
417CONFIG_UNIX98_PTYS=y
418CONFIG_LEGACY_PTYS=y
419CONFIG_LEGACY_PTY_COUNT=256
420# CONFIG_QIC02_TAPE is not set
421
422#
423# IPMI
424#
425# CONFIG_IPMI_HANDLER is not set
426
427#
428# Watchdog Cards
429#
430# CONFIG_WATCHDOG is not set
431# CONFIG_NVRAM is not set
432CONFIG_GEN_RTC=y
433# CONFIG_GEN_RTC_X is not set
434# CONFIG_DTLK is not set
435# CONFIG_R3964 is not set
436# CONFIG_APPLICOM is not set
437
438#
439# Ftape, the floppy tape device driver
440#
441# CONFIG_FTAPE is not set
442# CONFIG_AGP is not set
443# CONFIG_DRM is not set
444# CONFIG_RAW_DRIVER is not set
445
446#
447# I2C support
448#
449# CONFIG_I2C is not set
450
451#
452# Misc devices
453#
454
455#
456# Multimedia devices
457#
458# CONFIG_VIDEO_DEV is not set
459
460#
461# Digital Video Broadcasting Devices
462#
463# CONFIG_DVB is not set
464
465#
466# Graphics support
467#
468# CONFIG_FB is not set
469
470#
471# Sound
472#
473# CONFIG_SOUND is not set
474
475#
476# USB support
477#
478# CONFIG_USB is not set
479
480#
481# USB Gadget Support
482#
483# CONFIG_USB_GADGET is not set
484
485#
486# File systems
487#
488CONFIG_EXT2_FS=y
489# CONFIG_EXT2_FS_XATTR is not set
490# CONFIG_EXT3_FS is not set
491# CONFIG_JBD is not set
492# CONFIG_REISERFS_FS is not set
493# CONFIG_JFS_FS is not set
494# CONFIG_XFS_FS is not set
495# CONFIG_MINIX_FS is not set
496# CONFIG_ROMFS_FS is not set
497# CONFIG_QUOTA is not set
498# CONFIG_AUTOFS_FS is not set
499# CONFIG_AUTOFS4_FS is not set
500
501#
502# CD-ROM/DVD Filesystems
503#
504# CONFIG_ISO9660_FS is not set
505# CONFIG_UDF_FS is not set
506
507#
508# DOS/FAT/NT Filesystems
509#
510# CONFIG_FAT_FS is not set
511# CONFIG_NTFS_FS is not set
512
513#
514# Pseudo filesystems
515#
516CONFIG_PROC_FS=y
517CONFIG_PROC_KCORE=y
518# CONFIG_DEVPTS_FS_XATTR is not set
519CONFIG_TMPFS=y
520# CONFIG_HUGETLB_PAGE is not set
521CONFIG_RAMFS=y
522
523#
524# Miscellaneous filesystems
525#
526# CONFIG_HFSPLUS_FS is not set
527# CONFIG_CRAMFS is not set
528# CONFIG_VXFS_FS is not set
529# CONFIG_HPFS_FS is not set
530# CONFIG_QNX4FS_FS is not set
531# CONFIG_SYSV_FS is not set
532# CONFIG_UFS_FS is not set
533
534#
535# Network File Systems
536#
537CONFIG_NFS_FS=y
538# CONFIG_NFS_V3 is not set
539# CONFIG_NFSD is not set
540CONFIG_ROOT_NFS=y
541CONFIG_LOCKD=y
542# CONFIG_EXPORTFS is not set
543CONFIG_SUNRPC=y
544# CONFIG_SMB_FS is not set
545# CONFIG_CIFS is not set
546# CONFIG_NCP_FS is not set
547# CONFIG_CODA_FS is not set
548
549#
550# Partition Types
551#
552# CONFIG_PARTITION_ADVANCED is not set
553CONFIG_MSDOS_PARTITION=y
554
555#
556# Native Language Support
557#
558# CONFIG_NLS is not set
559
560#
561# Library routines
562#
563CONFIG_CRC32=y
564
565#
566# Kernel hacking
567#
568# CONFIG_DEBUG_KERNEL is not set
569# CONFIG_SERIAL_TEXT_DEBUG is not set
570
571#
572# Security options
573#
574# CONFIG_SECURITY is not set
575
576#
577# Cryptographic options
578#
579# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/menf1_defconfig b/arch/ppc/configs/menf1_defconfig
deleted file mode 100644
index 321659b5505f..000000000000
--- a/arch/ppc/configs/menf1_defconfig
+++ /dev/null
@@ -1,621 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16CONFIG_SWAP=y
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21# CONFIG_EMBEDDED is not set
22CONFIG_FUTEX=y
23CONFIG_EPOLL=y
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y
30# CONFIG_MODULE_FORCE_UNLOAD is not set
31CONFIG_OBSOLETE_MODPARM=y
32# CONFIG_MODVERSIONS is not set
33CONFIG_KMOD=y
34
35#
36# Platform support
37#
38CONFIG_PPC=y
39CONFIG_PPC32=y
40CONFIG_6xx=y
41# CONFIG_40x is not set
42# CONFIG_POWER3 is not set
43# CONFIG_8xx is not set
44
45#
46# IBM 4xx options
47#
48# CONFIG_8260 is not set
49CONFIG_GENERIC_ISA_DMA=y
50CONFIG_PPC_STD_MMU=y
51# CONFIG_PPC_MULTIPLATFORM is not set
52# CONFIG_APUS is not set
53# CONFIG_WILLOW_2 is not set
54# CONFIG_PCORE is not set
55# CONFIG_POWERPMC250 is not set
56# CONFIG_EV64260 is not set
57# CONFIG_SPRUCE is not set
58CONFIG_MENF1=y
59# CONFIG_LOPEC is not set
60# CONFIG_MCPN765 is not set
61# CONFIG_MVME5100 is not set
62# CONFIG_PPLUS is not set
63# CONFIG_PRPMC750 is not set
64# CONFIG_PRPMC800 is not set
65# CONFIG_SANDPOINT is not set
66# CONFIG_ADIR is not set
67# CONFIG_K2 is not set
68# CONFIG_PAL4 is not set
69# CONFIG_GEMINI is not set
70CONFIG_MPC10X_STORE_GATHERING=y
71# CONFIG_SMP is not set
72# CONFIG_PREEMPT is not set
73# CONFIG_ALTIVEC is not set
74# CONFIG_TAU is not set
75# CONFIG_CPU_FREQ is not set
76
77#
78# General setup
79#
80# CONFIG_HIGHMEM is not set
81CONFIG_PCI=y
82CONFIG_PCI_DOMAINS=y
83CONFIG_KCORE_ELF=y
84CONFIG_BINFMT_ELF=y
85CONFIG_KERNEL_ELF=y
86# CONFIG_BINFMT_MISC is not set
87# CONFIG_PCI_LEGACY_PROC is not set
88# CONFIG_PCI_NAMES is not set
89# CONFIG_HOTPLUG is not set
90
91#
92# Parallel port support
93#
94# CONFIG_PARPORT is not set
95# CONFIG_PPC601_SYNC_FIX is not set
96CONFIG_CMDLINE_BOOL=y
97CONFIG_CMDLINE="ip=on"
98
99#
100# Advanced setup
101#
102# CONFIG_ADVANCED_OPTIONS is not set
103
104#
105# Default settings for advanced configuration options are used
106#
107CONFIG_HIGHMEM_START=0xfe000000
108CONFIG_LOWMEM_SIZE=0x30000000
109CONFIG_KERNEL_START=0xc0000000
110CONFIG_TASK_SIZE=0x80000000
111CONFIG_BOOT_LOAD=0x00800000
112
113#
114# Memory Technology Devices (MTD)
115#
116# CONFIG_MTD is not set
117
118#
119# Plug and Play support
120#
121# CONFIG_PNP is not set
122
123#
124# Block devices
125#
126# CONFIG_BLK_DEV_FD is not set
127# CONFIG_BLK_CPQ_DA is not set
128# CONFIG_BLK_CPQ_CISS_DA is not set
129# CONFIG_BLK_DEV_DAC960 is not set
130# CONFIG_BLK_DEV_UMEM is not set
131# CONFIG_BLK_DEV_LOOP is not set
132# CONFIG_BLK_DEV_NBD is not set
133# CONFIG_BLK_DEV_RAM is not set
134# CONFIG_BLK_DEV_INITRD is not set
135
136#
137# Multi-device support (RAID and LVM)
138#
139# CONFIG_MD is not set
140
141#
142# ATA/IDE/MFM/RLL support
143#
144CONFIG_IDE=y
145
146#
147# IDE, ATA and ATAPI Block devices
148#
149CONFIG_BLK_DEV_IDE=y
150
151#
152# Please see Documentation/ide.txt for help/info on IDE drives
153#
154# CONFIG_BLK_DEV_HD is not set
155CONFIG_BLK_DEV_IDEDISK=y
156# CONFIG_IDEDISK_MULTI_MODE is not set
157# CONFIG_IDEDISK_STROKE is not set
158CONFIG_BLK_DEV_IDECD=y
159# CONFIG_BLK_DEV_IDEFLOPPY is not set
160# CONFIG_IDE_TASK_IOCTL is not set
161
162#
163# IDE chipset support/bugfixes
164#
165# CONFIG_BLK_DEV_IDEPCI is not set
166
167#
168# SCSI support
169#
170# CONFIG_SCSI is not set
171
172#
173# Fusion MPT device support
174#
175
176#
177# IEEE 1394 (FireWire) support (EXPERIMENTAL)
178#
179# CONFIG_IEEE1394 is not set
180
181#
182# I2O device support
183#
184# CONFIG_I2O is not set
185
186#
187# Networking support
188#
189CONFIG_NET=y
190
191#
192# Networking options
193#
194CONFIG_PACKET=y
195# CONFIG_PACKET_MMAP is not set
196# CONFIG_NETLINK_DEV is not set
197CONFIG_NETFILTER=y
198# CONFIG_NETFILTER_DEBUG is not set
199CONFIG_UNIX=y
200# CONFIG_NET_KEY is not set
201CONFIG_INET=y
202CONFIG_IP_MULTICAST=y
203# CONFIG_IP_ADVANCED_ROUTER is not set
204CONFIG_IP_PNP=y
205CONFIG_IP_PNP_DHCP=y
206# CONFIG_IP_PNP_BOOTP is not set
207# CONFIG_IP_PNP_RARP is not set
208# CONFIG_NET_IPIP is not set
209# CONFIG_NET_IPGRE is not set
210# CONFIG_IP_MROUTE is not set
211# CONFIG_ARPD is not set
212# CONFIG_INET_ECN is not set
213# CONFIG_SYN_COOKIES is not set
214# CONFIG_INET_AH is not set
215# CONFIG_INET_ESP is not set
216# CONFIG_INET_IPCOMP is not set
217
218#
219# IP: Netfilter Configuration
220#
221CONFIG_IP_NF_CONNTRACK=m
222CONFIG_IP_NF_FTP=m
223CONFIG_IP_NF_IRC=m
224# CONFIG_IP_NF_TFTP is not set
225# CONFIG_IP_NF_AMANDA is not set
226# CONFIG_IP_NF_QUEUE is not set
227CONFIG_IP_NF_IPTABLES=m
228CONFIG_IP_NF_MATCH_LIMIT=m
229CONFIG_IP_NF_MATCH_MAC=m
230CONFIG_IP_NF_MATCH_PKTTYPE=m
231CONFIG_IP_NF_MATCH_MARK=m
232CONFIG_IP_NF_MATCH_MULTIPORT=m
233CONFIG_IP_NF_MATCH_TOS=m
234CONFIG_IP_NF_MATCH_ECN=m
235CONFIG_IP_NF_MATCH_DSCP=m
236CONFIG_IP_NF_MATCH_AH_ESP=m
237CONFIG_IP_NF_MATCH_LENGTH=m
238CONFIG_IP_NF_MATCH_TTL=m
239CONFIG_IP_NF_MATCH_TCPMSS=m
240CONFIG_IP_NF_MATCH_HELPER=m
241CONFIG_IP_NF_MATCH_STATE=m
242CONFIG_IP_NF_MATCH_CONNTRACK=m
243CONFIG_IP_NF_MATCH_UNCLEAN=m
244CONFIG_IP_NF_MATCH_OWNER=m
245CONFIG_IP_NF_FILTER=m
246CONFIG_IP_NF_TARGET_REJECT=m
247CONFIG_IP_NF_TARGET_MIRROR=m
248CONFIG_IP_NF_NAT=m
249CONFIG_IP_NF_NAT_NEEDED=y
250CONFIG_IP_NF_TARGET_MASQUERADE=m
251CONFIG_IP_NF_TARGET_REDIRECT=m
252# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
253CONFIG_IP_NF_NAT_IRC=m
254CONFIG_IP_NF_NAT_FTP=m
255# CONFIG_IP_NF_MANGLE is not set
256# CONFIG_IP_NF_TARGET_LOG is not set
257CONFIG_IP_NF_TARGET_ULOG=m
258CONFIG_IP_NF_TARGET_TCPMSS=m
259CONFIG_IP_NF_ARPTABLES=m
260CONFIG_IP_NF_ARPFILTER=m
261CONFIG_IP_NF_COMPAT_IPCHAINS=m
262# CONFIG_IP_NF_COMPAT_IPFWADM is not set
263# CONFIG_IPV6 is not set
264# CONFIG_XFRM_USER is not set
265
266#
267# SCTP Configuration (EXPERIMENTAL)
268#
269CONFIG_IPV6_SCTP__=y
270# CONFIG_IP_SCTP is not set
271# CONFIG_ATM is not set
272# CONFIG_VLAN_8021Q is not set
273# CONFIG_LLC is not set
274# CONFIG_DECNET is not set
275# CONFIG_BRIDGE is not set
276# CONFIG_X25 is not set
277# CONFIG_LAPB is not set
278# CONFIG_NET_DIVERT is not set
279# CONFIG_ECONET is not set
280# CONFIG_WAN_ROUTER is not set
281# CONFIG_NET_HW_FLOWCONTROL is not set
282
283#
284# QoS and/or fair queueing
285#
286# CONFIG_NET_SCHED is not set
287
288#
289# Network testing
290#
291# CONFIG_NET_PKTGEN is not set
292CONFIG_NETDEVICES=y
293
294#
295# ARCnet devices
296#
297# CONFIG_ARCNET is not set
298# CONFIG_DUMMY is not set
299# CONFIG_BONDING is not set
300# CONFIG_EQUALIZER is not set
301# CONFIG_TUN is not set
302# CONFIG_ETHERTAP is not set
303
304#
305# Ethernet (10 or 100Mbit)
306#
307CONFIG_NET_ETHERNET=y
308CONFIG_MII=y
309# CONFIG_OAKNET is not set
310# CONFIG_HAPPYMEAL is not set
311# CONFIG_SUNGEM is not set
312# CONFIG_NET_VENDOR_3COM is not set
313
314#
315# Tulip family network device support
316#
317# CONFIG_NET_TULIP is not set
318# CONFIG_HP100 is not set
319CONFIG_NET_PCI=y
320# CONFIG_PCNET32 is not set
321# CONFIG_AMD8111_ETH is not set
322# CONFIG_ADAPTEC_STARFIRE is not set
323# CONFIG_B44 is not set
324# CONFIG_DGRS is not set
325# CONFIG_EEPRO100 is not set
326# CONFIG_E100 is not set
327# CONFIG_FEALNX is not set
328# CONFIG_NATSEMI is not set
329# CONFIG_NE2K_PCI is not set
330# CONFIG_8139CP is not set
331# CONFIG_8139TOO is not set
332# CONFIG_SIS900 is not set
333# CONFIG_EPIC100 is not set
334# CONFIG_SUNDANCE is not set
335# CONFIG_TLAN is not set
336# CONFIG_VIA_RHINE is not set
337
338#
339# Ethernet (1000 Mbit)
340#
341# CONFIG_ACENIC is not set
342# CONFIG_DL2K is not set
343# CONFIG_E1000 is not set
344# CONFIG_NS83820 is not set
345# CONFIG_HAMACHI is not set
346# CONFIG_YELLOWFIN is not set
347# CONFIG_R8169 is not set
348# CONFIG_SK98LIN is not set
349# CONFIG_TIGON3 is not set
350
351#
352# Ethernet (10000 Mbit)
353#
354# CONFIG_IXGB is not set
355# CONFIG_FDDI is not set
356# CONFIG_HIPPI is not set
357# CONFIG_PPP is not set
358# CONFIG_SLIP is not set
359
360#
361# Wireless LAN (non-hamradio)
362#
363# CONFIG_NET_RADIO is not set
364
365#
366# Token Ring devices (depends on LLC=y)
367#
368# CONFIG_RCPCI is not set
369# CONFIG_SHAPER is not set
370
371#
372# Wan interfaces
373#
374# CONFIG_WAN is not set
375
376#
377# Amateur Radio support
378#
379# CONFIG_HAMRADIO is not set
380
381#
382# IrDA (infrared) support
383#
384# CONFIG_IRDA is not set
385
386#
387# ISDN subsystem
388#
389# CONFIG_ISDN_BOOL is not set
390
391#
392# Graphics support
393#
394# CONFIG_FB is not set
395
396#
397# Old CD-ROM drivers (not SCSI, not IDE)
398#
399# CONFIG_CD_NO_IDESCSI is not set
400
401#
402# Input device support
403#
404# CONFIG_INPUT is not set
405
406#
407# Userland interfaces
408#
409
410#
411# Input I/O drivers
412#
413# CONFIG_GAMEPORT is not set
414CONFIG_SOUND_GAMEPORT=y
415# CONFIG_SERIO is not set
416
417#
418# Input Device Drivers
419#
420
421#
422# Macintosh device drivers
423#
424
425#
426# Character devices
427#
428# CONFIG_SERIAL_NONSTANDARD is not set
429
430#
431# Serial drivers
432#
433CONFIG_SERIAL_8250=y
434CONFIG_SERIAL_8250_CONSOLE=y
435# CONFIG_SERIAL_8250_EXTENDED is not set
436
437#
438# Non-8250 serial port support
439#
440CONFIG_SERIAL_CORE=y
441CONFIG_SERIAL_CORE_CONSOLE=y
442CONFIG_UNIX98_PTYS=y
443CONFIG_UNIX98_PTY_COUNT=256
444
445#
446# I2C support
447#
448# CONFIG_I2C is not set
449
450#
451# I2C Hardware Sensors Mainboard support
452#
453
454#
455# I2C Hardware Sensors Chip support
456#
457# CONFIG_I2C_SENSOR is not set
458
459#
460# Mice
461#
462# CONFIG_BUSMOUSE is not set
463# CONFIG_QIC02_TAPE is not set
464
465#
466# IPMI
467#
468# CONFIG_IPMI_HANDLER is not set
469
470#
471# Watchdog Cards
472#
473# CONFIG_WATCHDOG is not set
474# CONFIG_NVRAM is not set
475CONFIG_GEN_RTC=y
476# CONFIG_GEN_RTC_X is not set
477# CONFIG_DTLK is not set
478# CONFIG_R3964 is not set
479# CONFIG_APPLICOM is not set
480
481#
482# Ftape, the floppy tape device driver
483#
484# CONFIG_FTAPE is not set
485# CONFIG_AGP is not set
486# CONFIG_DRM is not set
487# CONFIG_RAW_DRIVER is not set
488# CONFIG_HANGCHECK_TIMER is not set
489
490#
491# Multimedia devices
492#
493# CONFIG_VIDEO_DEV is not set
494
495#
496# Digital Video Broadcasting Devices
497#
498# CONFIG_DVB is not set
499
500#
501# File systems
502#
503CONFIG_EXT2_FS=y
504# CONFIG_EXT2_FS_XATTR is not set
505CONFIG_EXT3_FS=y
506CONFIG_EXT3_FS_XATTR=y
507# CONFIG_EXT3_FS_POSIX_ACL is not set
508# CONFIG_EXT3_FS_SECURITY is not set
509CONFIG_JBD=y
510# CONFIG_JBD_DEBUG is not set
511CONFIG_FS_MBCACHE=y
512# CONFIG_REISERFS_FS is not set
513# CONFIG_JFS_FS is not set
514# CONFIG_XFS_FS is not set
515# CONFIG_MINIX_FS is not set
516# CONFIG_ROMFS_FS is not set
517# CONFIG_QUOTA is not set
518# CONFIG_AUTOFS_FS is not set
519# CONFIG_AUTOFS4_FS is not set
520
521#
522# CD-ROM/DVD Filesystems
523#
524CONFIG_ISO9660_FS=y
525# CONFIG_JOLIET is not set
526# CONFIG_ZISOFS is not set
527# CONFIG_UDF_FS is not set
528
529#
530# DOS/FAT/NT Filesystems
531#
532# CONFIG_FAT_FS is not set
533# CONFIG_NTFS_FS is not set
534
535#
536# Pseudo filesystems
537#
538CONFIG_PROC_FS=y
539# CONFIG_DEVFS_FS is not set
540CONFIG_DEVPTS_FS=y
541# CONFIG_DEVPTS_FS_XATTR is not set
542CONFIG_TMPFS=y
543CONFIG_RAMFS=y
544
545#
546# Miscellaneous filesystems
547#
548# CONFIG_ADFS_FS is not set
549# CONFIG_AFFS_FS is not set
550# CONFIG_HFS_FS is not set
551# CONFIG_BEFS_FS is not set
552# CONFIG_BFS_FS is not set
553# CONFIG_EFS_FS is not set
554# CONFIG_CRAMFS is not set
555# CONFIG_VXFS_FS is not set
556# CONFIG_HPFS_FS is not set
557# CONFIG_QNX4FS_FS is not set
558# CONFIG_SYSV_FS is not set
559# CONFIG_UFS_FS is not set
560
561#
562# Network File Systems
563#
564CONFIG_NFS_FS=y
565# CONFIG_NFS_V3 is not set
566# CONFIG_NFS_V4 is not set
567# CONFIG_NFSD is not set
568CONFIG_ROOT_NFS=y
569CONFIG_LOCKD=y
570# CONFIG_EXPORTFS is not set
571CONFIG_SUNRPC=y
572# CONFIG_SUNRPC_GSS is not set
573# CONFIG_SMB_FS is not set
574# CONFIG_CIFS is not set
575# CONFIG_NCP_FS is not set
576# CONFIG_CODA_FS is not set
577# CONFIG_INTERMEZZO_FS is not set
578# CONFIG_AFS_FS is not set
579
580#
581# Partition Types
582#
583# CONFIG_PARTITION_ADVANCED is not set
584CONFIG_MSDOS_PARTITION=y
585
586#
587# Sound
588#
589# CONFIG_SOUND is not set
590
591#
592# USB support
593#
594# CONFIG_USB is not set
595# CONFIG_USB_GADGET is not set
596
597#
598# Bluetooth support
599#
600# CONFIG_BT is not set
601
602#
603# Library routines
604#
605# CONFIG_CRC32 is not set
606
607#
608# Kernel hacking
609#
610# CONFIG_DEBUG_KERNEL is not set
611# CONFIG_KALLSYMS is not set
612
613#
614# Security options
615#
616# CONFIG_SECURITY is not set
617
618#
619# Cryptographic options
620#
621# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/mpc8560_ads_defconfig b/arch/ppc/configs/mpc8560_ads_defconfig
index 38a343c9056a..f834fb541ad5 100644
--- a/arch/ppc/configs/mpc8560_ads_defconfig
+++ b/arch/ppc/configs/mpc8560_ads_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc1 3# Linux kernel version: 2.6.13-rc6
4# Thu Jan 20 01:24:56 2005 4# Thu Aug 11 18:14:45 2005
5# 5#
6CONFIG_MMU=y 6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y 7CONFIG_GENERIC_HARDIRQS=y
@@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y 11CONFIG_PPC=y
12CONFIG_PPC32=y 12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y 13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14 15
15# 16#
16# Code maturity level options 17# Code maturity level options
@@ -18,6 +19,7 @@ CONFIG_GENERIC_NVRAM=y
18CONFIG_EXPERIMENTAL=y 19CONFIG_EXPERIMENTAL=y
19CONFIG_CLEAN_COMPILE=y 20CONFIG_CLEAN_COMPILE=y
20CONFIG_BROKEN_ON_SMP=y 21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
21 23
22# 24#
23# General setup 25# General setup
@@ -29,12 +31,14 @@ CONFIG_SYSVIPC=y
29# CONFIG_BSD_PROCESS_ACCT is not set 31# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y 32CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set 33# CONFIG_AUDIT is not set
32CONFIG_LOG_BUF_SHIFT=14
33# CONFIG_HOTPLUG is not set 34# CONFIG_HOTPLUG is not set
34CONFIG_KOBJECT_UEVENT=y 35CONFIG_KOBJECT_UEVENT=y
35# CONFIG_IKCONFIG is not set 36# CONFIG_IKCONFIG is not set
36CONFIG_EMBEDDED=y 37CONFIG_EMBEDDED=y
37# CONFIG_KALLSYMS is not set 38# CONFIG_KALLSYMS is not set
39CONFIG_PRINTK=y
40CONFIG_BUG=y
41CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y 42CONFIG_FUTEX=y
39# CONFIG_EPOLL is not set 43# CONFIG_EPOLL is not set
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -44,6 +48,7 @@ CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0 48CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0 49CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set 50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0
47 52
48# 53#
49# Loadable module support 54# Loadable module support
@@ -59,12 +64,16 @@ CONFIG_CC_ALIGN_JUMPS=0
59# CONFIG_POWER3 is not set 64# CONFIG_POWER3 is not set
60# CONFIG_POWER4 is not set 65# CONFIG_POWER4 is not set
61# CONFIG_8xx is not set 66# CONFIG_8xx is not set
67# CONFIG_E200 is not set
62CONFIG_E500=y 68CONFIG_E500=y
63CONFIG_BOOKE=y 69CONFIG_BOOKE=y
64CONFIG_FSL_BOOKE=y 70CONFIG_FSL_BOOKE=y
71# CONFIG_PHYS_64BIT is not set
65CONFIG_SPE=y 72CONFIG_SPE=y
66CONFIG_MATH_EMULATION=y 73CONFIG_MATH_EMULATION=y
74# CONFIG_KEXEC is not set
67# CONFIG_CPU_FREQ is not set 75# CONFIG_CPU_FREQ is not set
76# CONFIG_PM is not set
68CONFIG_85xx=y 77CONFIG_85xx=y
69CONFIG_PPC_INDIRECT_PCI_BE=y 78CONFIG_PPC_INDIRECT_PCI_BE=y
70 79
@@ -72,9 +81,11 @@ CONFIG_PPC_INDIRECT_PCI_BE=y
72# Freescale 85xx options 81# Freescale 85xx options
73# 82#
74# CONFIG_MPC8540_ADS is not set 83# CONFIG_MPC8540_ADS is not set
84# CONFIG_MPC8548_CDS is not set
75# CONFIG_MPC8555_CDS is not set 85# CONFIG_MPC8555_CDS is not set
76CONFIG_MPC8560_ADS=y 86CONFIG_MPC8560_ADS=y
77# CONFIG_SBC8560 is not set 87# CONFIG_SBC8560 is not set
88# CONFIG_STX_GP3 is not set
78CONFIG_MPC8560=y 89CONFIG_MPC8560=y
79 90
80# 91#
@@ -83,11 +94,25 @@ CONFIG_MPC8560=y
83CONFIG_CPM2=y 94CONFIG_CPM2=y
84# CONFIG_PC_KEYBOARD is not set 95# CONFIG_PC_KEYBOARD is not set
85# CONFIG_SMP is not set 96# CONFIG_SMP is not set
86# CONFIG_PREEMPT is not set
87# CONFIG_HIGHMEM is not set 97# CONFIG_HIGHMEM is not set
98# CONFIG_HZ_100 is not set
99CONFIG_HZ_250=y
100# CONFIG_HZ_1000 is not set
101CONFIG_HZ=250
102CONFIG_PREEMPT_NONE=y
103# CONFIG_PREEMPT_VOLUNTARY is not set
104# CONFIG_PREEMPT is not set
105CONFIG_SELECT_MEMORY_MODEL=y
106CONFIG_FLATMEM_MANUAL=y
107# CONFIG_DISCONTIGMEM_MANUAL is not set
108# CONFIG_SPARSEMEM_MANUAL is not set
109CONFIG_FLATMEM=y
110CONFIG_FLAT_NODE_MEM_MAP=y
88CONFIG_BINFMT_ELF=y 111CONFIG_BINFMT_ELF=y
89# CONFIG_BINFMT_MISC is not set 112# CONFIG_BINFMT_MISC is not set
90# CONFIG_CMDLINE_BOOL is not set 113# CONFIG_CMDLINE_BOOL is not set
114CONFIG_SECCOMP=y
115CONFIG_ISA_DMA_API=y
91 116
92# 117#
93# Bus options 118# Bus options
@@ -103,10 +128,6 @@ CONFIG_PCI_NAMES=y
103# CONFIG_PCCARD is not set 128# CONFIG_PCCARD is not set
104 129
105# 130#
106# PC-card bridges
107#
108
109#
110# Advanced setup 131# Advanced setup
111# 132#
112# CONFIG_ADVANCED_OPTIONS is not set 133# CONFIG_ADVANCED_OPTIONS is not set
@@ -121,6 +142,69 @@ CONFIG_TASK_SIZE=0x80000000
121CONFIG_BOOT_LOAD=0x00800000 142CONFIG_BOOT_LOAD=0x00800000
122 143
123# 144#
145# Networking
146#
147CONFIG_NET=y
148
149#
150# Networking options
151#
152CONFIG_PACKET=y
153# CONFIG_PACKET_MMAP is not set
154CONFIG_UNIX=y
155# CONFIG_NET_KEY is not set
156CONFIG_INET=y
157CONFIG_IP_MULTICAST=y
158# CONFIG_IP_ADVANCED_ROUTER is not set
159CONFIG_IP_FIB_HASH=y
160CONFIG_IP_PNP=y
161CONFIG_IP_PNP_DHCP=y
162CONFIG_IP_PNP_BOOTP=y
163# CONFIG_IP_PNP_RARP is not set
164# CONFIG_NET_IPIP is not set
165# CONFIG_NET_IPGRE is not set
166# CONFIG_IP_MROUTE is not set
167# CONFIG_ARPD is not set
168CONFIG_SYN_COOKIES=y
169# CONFIG_INET_AH is not set
170# CONFIG_INET_ESP is not set
171# CONFIG_INET_IPCOMP is not set
172# CONFIG_INET_TUNNEL is not set
173CONFIG_IP_TCPDIAG=y
174# CONFIG_IP_TCPDIAG_IPV6 is not set
175# CONFIG_TCP_CONG_ADVANCED is not set
176CONFIG_TCP_CONG_BIC=y
177# CONFIG_IPV6 is not set
178# CONFIG_NETFILTER is not set
179
180#
181# SCTP Configuration (EXPERIMENTAL)
182#
183# CONFIG_IP_SCTP is not set
184# CONFIG_ATM is not set
185# CONFIG_BRIDGE is not set
186# CONFIG_VLAN_8021Q is not set
187# CONFIG_DECNET is not set
188# CONFIG_LLC2 is not set
189# CONFIG_IPX is not set
190# CONFIG_ATALK is not set
191# CONFIG_X25 is not set
192# CONFIG_LAPB is not set
193# CONFIG_NET_DIVERT is not set
194# CONFIG_ECONET is not set
195# CONFIG_WAN_ROUTER is not set
196# CONFIG_NET_SCHED is not set
197# CONFIG_NET_CLS_ROUTE is not set
198
199#
200# Network testing
201#
202# CONFIG_NET_PKTGEN is not set
203# CONFIG_HAMRADIO is not set
204# CONFIG_IRDA is not set
205# CONFIG_BT is not set
206
207#
124# Device Drivers 208# Device Drivers
125# 209#
126 210
@@ -193,6 +277,7 @@ CONFIG_IOSCHED_CFQ=y
193# 277#
194# Fusion MPT device support 278# Fusion MPT device support
195# 279#
280# CONFIG_FUSION is not set
196 281
197# 282#
198# IEEE 1394 (FireWire) support 283# IEEE 1394 (FireWire) support
@@ -209,71 +294,8 @@ CONFIG_IOSCHED_CFQ=y
209# 294#
210 295
211# 296#
212# Networking support 297# Network device support
213#
214CONFIG_NET=y
215
216#
217# Networking options
218#
219CONFIG_PACKET=y
220# CONFIG_PACKET_MMAP is not set
221# CONFIG_NETLINK_DEV is not set
222CONFIG_UNIX=y
223# CONFIG_NET_KEY is not set
224CONFIG_INET=y
225CONFIG_IP_MULTICAST=y
226# CONFIG_IP_ADVANCED_ROUTER is not set
227CONFIG_IP_PNP=y
228CONFIG_IP_PNP_DHCP=y
229CONFIG_IP_PNP_BOOTP=y
230# CONFIG_IP_PNP_RARP is not set
231# CONFIG_NET_IPIP is not set
232# CONFIG_NET_IPGRE is not set
233# CONFIG_IP_MROUTE is not set
234# CONFIG_ARPD is not set
235CONFIG_SYN_COOKIES=y
236# CONFIG_INET_AH is not set
237# CONFIG_INET_ESP is not set
238# CONFIG_INET_IPCOMP is not set
239# CONFIG_INET_TUNNEL is not set
240CONFIG_IP_TCPDIAG=y
241# CONFIG_IP_TCPDIAG_IPV6 is not set
242# CONFIG_IPV6 is not set
243# CONFIG_NETFILTER is not set
244
245# 298#
246# SCTP Configuration (EXPERIMENTAL)
247#
248# CONFIG_IP_SCTP is not set
249# CONFIG_ATM is not set
250# CONFIG_BRIDGE is not set
251# CONFIG_VLAN_8021Q is not set
252# CONFIG_DECNET is not set
253# CONFIG_LLC2 is not set
254# CONFIG_IPX is not set
255# CONFIG_ATALK is not set
256# CONFIG_X25 is not set
257# CONFIG_LAPB is not set
258# CONFIG_NET_DIVERT is not set
259# CONFIG_ECONET is not set
260# CONFIG_WAN_ROUTER is not set
261
262#
263# QoS and/or fair queueing
264#
265# CONFIG_NET_SCHED is not set
266# CONFIG_NET_CLS_ROUTE is not set
267
268#
269# Network testing
270#
271# CONFIG_NET_PKTGEN is not set
272# CONFIG_NETPOLL is not set
273# CONFIG_NET_POLL_CONTROLLER is not set
274# CONFIG_HAMRADIO is not set
275# CONFIG_IRDA is not set
276# CONFIG_BT is not set
277CONFIG_NETDEVICES=y 299CONFIG_NETDEVICES=y
278# CONFIG_DUMMY is not set 300# CONFIG_DUMMY is not set
279# CONFIG_BONDING is not set 301# CONFIG_BONDING is not set
@@ -311,8 +333,10 @@ CONFIG_MII=y
311# CONFIG_HAMACHI is not set 333# CONFIG_HAMACHI is not set
312# CONFIG_YELLOWFIN is not set 334# CONFIG_YELLOWFIN is not set
313# CONFIG_R8169 is not set 335# CONFIG_R8169 is not set
336# CONFIG_SKGE is not set
314# CONFIG_SK98LIN is not set 337# CONFIG_SK98LIN is not set
315# CONFIG_TIGON3 is not set 338# CONFIG_TIGON3 is not set
339# CONFIG_BNX2 is not set
316CONFIG_GIANFAR=y 340CONFIG_GIANFAR=y
317CONFIG_GFAR_NAPI=y 341CONFIG_GFAR_NAPI=y
318 342
@@ -342,6 +366,8 @@ CONFIG_GFAR_NAPI=y
342# CONFIG_SLIP is not set 366# CONFIG_SLIP is not set
343# CONFIG_SHAPER is not set 367# CONFIG_SHAPER is not set
344# CONFIG_NETCONSOLE is not set 368# CONFIG_NETCONSOLE is not set
369# CONFIG_NETPOLL is not set
370# CONFIG_NET_POLL_CONTROLLER is not set
345 371
346# 372#
347# ISDN subsystem 373# ISDN subsystem
@@ -368,14 +394,6 @@ CONFIG_INPUT=y
368# CONFIG_INPUT_EVBUG is not set 394# CONFIG_INPUT_EVBUG is not set
369 395
370# 396#
371# Input I/O drivers
372#
373# CONFIG_GAMEPORT is not set
374CONFIG_SOUND_GAMEPORT=y
375# CONFIG_SERIO is not set
376# CONFIG_SERIO_I8042 is not set
377
378#
379# Input Device Drivers 397# Input Device Drivers
380# 398#
381# CONFIG_INPUT_KEYBOARD is not set 399# CONFIG_INPUT_KEYBOARD is not set
@@ -385,6 +403,12 @@ CONFIG_SOUND_GAMEPORT=y
385# CONFIG_INPUT_MISC is not set 403# CONFIG_INPUT_MISC is not set
386 404
387# 405#
406# Hardware I/O ports
407#
408# CONFIG_SERIO is not set
409# CONFIG_GAMEPORT is not set
410
411#
388# Character devices 412# Character devices
389# 413#
390# CONFIG_VT is not set 414# CONFIG_VT is not set
@@ -403,11 +427,12 @@ CONFIG_SERIAL_CORE_CONSOLE=y
403CONFIG_SERIAL_CPM=y 427CONFIG_SERIAL_CPM=y
404CONFIG_SERIAL_CPM_CONSOLE=y 428CONFIG_SERIAL_CPM_CONSOLE=y
405CONFIG_SERIAL_CPM_SCC1=y 429CONFIG_SERIAL_CPM_SCC1=y
406# CONFIG_SERIAL_CPM_SCC2 is not set 430CONFIG_SERIAL_CPM_SCC2=y
407# CONFIG_SERIAL_CPM_SCC3 is not set 431# CONFIG_SERIAL_CPM_SCC3 is not set
408CONFIG_SERIAL_CPM_SCC4=y 432# CONFIG_SERIAL_CPM_SCC4 is not set
409# CONFIG_SERIAL_CPM_SMC1 is not set 433# CONFIG_SERIAL_CPM_SMC1 is not set
410# CONFIG_SERIAL_CPM_SMC2 is not set 434# CONFIG_SERIAL_CPM_SMC2 is not set
435# CONFIG_SERIAL_JSM is not set
411CONFIG_UNIX98_PTYS=y 436CONFIG_UNIX98_PTYS=y
412CONFIG_LEGACY_PTYS=y 437CONFIG_LEGACY_PTYS=y
413CONFIG_LEGACY_PTY_COUNT=256 438CONFIG_LEGACY_PTY_COUNT=256
@@ -436,6 +461,11 @@ CONFIG_GEN_RTC=y
436# CONFIG_RAW_DRIVER is not set 461# CONFIG_RAW_DRIVER is not set
437 462
438# 463#
464# TPM devices
465#
466# CONFIG_TCG_TPM is not set
467
468#
439# I2C support 469# I2C support
440# 470#
441CONFIG_I2C=y 471CONFIG_I2C=y
@@ -458,11 +488,11 @@ CONFIG_I2C_CHARDEV=y
458# CONFIG_I2C_AMD8111 is not set 488# CONFIG_I2C_AMD8111 is not set
459# CONFIG_I2C_I801 is not set 489# CONFIG_I2C_I801 is not set
460# CONFIG_I2C_I810 is not set 490# CONFIG_I2C_I810 is not set
491# CONFIG_I2C_PIIX4 is not set
461# CONFIG_I2C_ISA is not set 492# CONFIG_I2C_ISA is not set
462CONFIG_I2C_MPC=y 493CONFIG_I2C_MPC=y
463# CONFIG_I2C_NFORCE2 is not set 494# CONFIG_I2C_NFORCE2 is not set
464# CONFIG_I2C_PARPORT_LIGHT is not set 495# CONFIG_I2C_PARPORT_LIGHT is not set
465# CONFIG_I2C_PIIX4 is not set
466# CONFIG_I2C_PROSAVAGE is not set 496# CONFIG_I2C_PROSAVAGE is not set
467# CONFIG_I2C_SAVAGE4 is not set 497# CONFIG_I2C_SAVAGE4 is not set
468# CONFIG_SCx200_ACB is not set 498# CONFIG_SCx200_ACB is not set
@@ -473,19 +503,46 @@ CONFIG_I2C_MPC=y
473# CONFIG_I2C_VIAPRO is not set 503# CONFIG_I2C_VIAPRO is not set
474# CONFIG_I2C_VOODOO3 is not set 504# CONFIG_I2C_VOODOO3 is not set
475# CONFIG_I2C_PCA_ISA is not set 505# CONFIG_I2C_PCA_ISA is not set
506# CONFIG_I2C_SENSOR is not set
476 507
477# 508#
478# Hardware Sensors Chip support 509# Miscellaneous I2C Chip support
479# 510#
480# CONFIG_I2C_SENSOR is not set 511# CONFIG_SENSORS_DS1337 is not set
512# CONFIG_SENSORS_DS1374 is not set
513# CONFIG_SENSORS_EEPROM is not set
514# CONFIG_SENSORS_PCF8574 is not set
515# CONFIG_SENSORS_PCA9539 is not set
516# CONFIG_SENSORS_PCF8591 is not set
517# CONFIG_SENSORS_RTC8564 is not set
518# CONFIG_SENSORS_M41T00 is not set
519# CONFIG_SENSORS_MAX6875 is not set
520# CONFIG_I2C_DEBUG_CORE is not set
521# CONFIG_I2C_DEBUG_ALGO is not set
522# CONFIG_I2C_DEBUG_BUS is not set
523# CONFIG_I2C_DEBUG_CHIP is not set
524
525#
526# Dallas's 1-wire bus
527#
528# CONFIG_W1 is not set
529
530#
531# Hardware Monitoring support
532#
533CONFIG_HWMON=y
481# CONFIG_SENSORS_ADM1021 is not set 534# CONFIG_SENSORS_ADM1021 is not set
482# CONFIG_SENSORS_ADM1025 is not set 535# CONFIG_SENSORS_ADM1025 is not set
483# CONFIG_SENSORS_ADM1026 is not set 536# CONFIG_SENSORS_ADM1026 is not set
484# CONFIG_SENSORS_ADM1031 is not set 537# CONFIG_SENSORS_ADM1031 is not set
538# CONFIG_SENSORS_ADM9240 is not set
485# CONFIG_SENSORS_ASB100 is not set 539# CONFIG_SENSORS_ASB100 is not set
540# CONFIG_SENSORS_ATXP1 is not set
486# CONFIG_SENSORS_DS1621 is not set 541# CONFIG_SENSORS_DS1621 is not set
487# CONFIG_SENSORS_FSCHER is not set 542# CONFIG_SENSORS_FSCHER is not set
543# CONFIG_SENSORS_FSCPOS is not set
488# CONFIG_SENSORS_GL518SM is not set 544# CONFIG_SENSORS_GL518SM is not set
545# CONFIG_SENSORS_GL520SM is not set
489# CONFIG_SENSORS_IT87 is not set 546# CONFIG_SENSORS_IT87 is not set
490# CONFIG_SENSORS_LM63 is not set 547# CONFIG_SENSORS_LM63 is not set
491# CONFIG_SENSORS_LM75 is not set 548# CONFIG_SENSORS_LM75 is not set
@@ -496,31 +553,18 @@ CONFIG_I2C_MPC=y
496# CONFIG_SENSORS_LM85 is not set 553# CONFIG_SENSORS_LM85 is not set
497# CONFIG_SENSORS_LM87 is not set 554# CONFIG_SENSORS_LM87 is not set
498# CONFIG_SENSORS_LM90 is not set 555# CONFIG_SENSORS_LM90 is not set
556# CONFIG_SENSORS_LM92 is not set
499# CONFIG_SENSORS_MAX1619 is not set 557# CONFIG_SENSORS_MAX1619 is not set
500# CONFIG_SENSORS_PC87360 is not set 558# CONFIG_SENSORS_PC87360 is not set
501# CONFIG_SENSORS_SMSC47B397 is not set 559# CONFIG_SENSORS_SIS5595 is not set
502# CONFIG_SENSORS_SMSC47M1 is not set 560# CONFIG_SENSORS_SMSC47M1 is not set
561# CONFIG_SENSORS_SMSC47B397 is not set
503# CONFIG_SENSORS_VIA686A is not set 562# CONFIG_SENSORS_VIA686A is not set
504# CONFIG_SENSORS_W83781D is not set 563# CONFIG_SENSORS_W83781D is not set
505# CONFIG_SENSORS_W83L785TS is not set 564# CONFIG_SENSORS_W83L785TS is not set
506# CONFIG_SENSORS_W83627HF is not set 565# CONFIG_SENSORS_W83627HF is not set
507 566# CONFIG_SENSORS_W83627EHF is not set
508# 567# CONFIG_HWMON_DEBUG_CHIP is not set
509# Other I2C Chip support
510#
511# CONFIG_SENSORS_EEPROM is not set
512# CONFIG_SENSORS_PCF8574 is not set
513# CONFIG_SENSORS_PCF8591 is not set
514# CONFIG_SENSORS_RTC8564 is not set
515# CONFIG_I2C_DEBUG_CORE is not set
516# CONFIG_I2C_DEBUG_ALGO is not set
517# CONFIG_I2C_DEBUG_BUS is not set
518# CONFIG_I2C_DEBUG_CHIP is not set
519
520#
521# Dallas's 1-wire bus
522#
523# CONFIG_W1 is not set
524 568
525# 569#
526# Misc devices 570# Misc devices
@@ -540,7 +584,6 @@ CONFIG_I2C_MPC=y
540# Graphics support 584# Graphics support
541# 585#
542# CONFIG_FB is not set 586# CONFIG_FB is not set
543# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
544 587
545# 588#
546# Sound 589# Sound
@@ -550,13 +593,9 @@ CONFIG_I2C_MPC=y
550# 593#
551# USB support 594# USB support
552# 595#
553# CONFIG_USB is not set
554CONFIG_USB_ARCH_HAS_HCD=y 596CONFIG_USB_ARCH_HAS_HCD=y
555CONFIG_USB_ARCH_HAS_OHCI=y 597CONFIG_USB_ARCH_HAS_OHCI=y
556 598# CONFIG_USB is not set
557#
558# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
559#
560 599
561# 600#
562# USB Gadget Support 601# USB Gadget Support
@@ -574,10 +613,15 @@ CONFIG_USB_ARCH_HAS_OHCI=y
574# CONFIG_INFINIBAND is not set 613# CONFIG_INFINIBAND is not set
575 614
576# 615#
616# SN Devices
617#
618
619#
577# File systems 620# File systems
578# 621#
579CONFIG_EXT2_FS=y 622CONFIG_EXT2_FS=y
580# CONFIG_EXT2_FS_XATTR is not set 623# CONFIG_EXT2_FS_XATTR is not set
624# CONFIG_EXT2_FS_XIP is not set
581CONFIG_EXT3_FS=y 625CONFIG_EXT3_FS=y
582CONFIG_EXT3_FS_XATTR=y 626CONFIG_EXT3_FS_XATTR=y
583# CONFIG_EXT3_FS_POSIX_ACL is not set 627# CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -587,9 +631,15 @@ CONFIG_JBD=y
587CONFIG_FS_MBCACHE=y 631CONFIG_FS_MBCACHE=y
588# CONFIG_REISERFS_FS is not set 632# CONFIG_REISERFS_FS is not set
589# CONFIG_JFS_FS is not set 633# CONFIG_JFS_FS is not set
634# CONFIG_FS_POSIX_ACL is not set
635
636#
637# XFS support
638#
590# CONFIG_XFS_FS is not set 639# CONFIG_XFS_FS is not set
591# CONFIG_MINIX_FS is not set 640# CONFIG_MINIX_FS is not set
592# CONFIG_ROMFS_FS is not set 641# CONFIG_ROMFS_FS is not set
642CONFIG_INOTIFY=y
593# CONFIG_QUOTA is not set 643# CONFIG_QUOTA is not set
594CONFIG_DNOTIFY=y 644CONFIG_DNOTIFY=y
595# CONFIG_AUTOFS_FS is not set 645# CONFIG_AUTOFS_FS is not set
@@ -614,7 +664,6 @@ CONFIG_DNOTIFY=y
614CONFIG_PROC_FS=y 664CONFIG_PROC_FS=y
615CONFIG_PROC_KCORE=y 665CONFIG_PROC_KCORE=y
616CONFIG_SYSFS=y 666CONFIG_SYSFS=y
617# CONFIG_DEVFS_FS is not set
618# CONFIG_DEVPTS_FS_XATTR is not set 667# CONFIG_DEVPTS_FS_XATTR is not set
619CONFIG_TMPFS=y 668CONFIG_TMPFS=y
620# CONFIG_TMPFS_XATTR is not set 669# CONFIG_TMPFS_XATTR is not set
@@ -648,7 +697,7 @@ CONFIG_NFS_FS=y
648# CONFIG_NFSD is not set 697# CONFIG_NFSD is not set
649CONFIG_ROOT_NFS=y 698CONFIG_ROOT_NFS=y
650CONFIG_LOCKD=y 699CONFIG_LOCKD=y
651# CONFIG_EXPORTFS is not set 700CONFIG_NFS_COMMON=y
652CONFIG_SUNRPC=y 701CONFIG_SUNRPC=y
653# CONFIG_RPCSEC_GSS_KRB5 is not set 702# CONFIG_RPCSEC_GSS_KRB5 is not set
654# CONFIG_RPCSEC_GSS_SPKM3 is not set 703# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -700,7 +749,9 @@ CONFIG_CRC32=y
700# 749#
701# Kernel hacking 750# Kernel hacking
702# 751#
752# CONFIG_PRINTK_TIME is not set
703# CONFIG_DEBUG_KERNEL is not set 753# CONFIG_DEBUG_KERNEL is not set
754CONFIG_LOG_BUF_SHIFT=14
704# CONFIG_KGDB_CONSOLE is not set 755# CONFIG_KGDB_CONSOLE is not set
705 756
706# 757#
diff --git a/arch/ppc/configs/oak_defconfig b/arch/ppc/configs/oak_defconfig
deleted file mode 100644
index 366cc480cea3..000000000000
--- a/arch/ppc/configs/oak_defconfig
+++ /dev/null
@@ -1,485 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16CONFIG_SWAP=y
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21CONFIG_EMBEDDED=y
22CONFIG_FUTEX=y
23# CONFIG_EPOLL is not set
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29CONFIG_MODULE_UNLOAD=y
30# CONFIG_MODULE_FORCE_UNLOAD is not set
31CONFIG_OBSOLETE_MODPARM=y
32# CONFIG_MODVERSIONS is not set
33CONFIG_KMOD=y
34
35#
36# Platform support
37#
38CONFIG_PPC=y
39CONFIG_PPC32=y
40# CONFIG_6xx is not set
41CONFIG_40x=y
42# CONFIG_POWER3 is not set
43# CONFIG_8xx is not set
44CONFIG_4xx=y
45
46#
47# IBM 4xx options
48#
49# CONFIG_ASH is not set
50# CONFIG_BEECH is not set
51# CONFIG_CEDAR is not set
52# CONFIG_CPCI405 is not set
53# CONFIG_EP405 is not set
54CONFIG_OAK=y
55# CONFIG_REDWOOD_4 is not set
56# CONFIG_REDWOOD_5 is not set
57# CONFIG_REDWOOD_6 is not set
58# CONFIG_SYCAMORE is not set
59# CONFIG_TIVO is not set
60# CONFIG_WALNUT is not set
61CONFIG_IBM405_ERR51=y
62CONFIG_403GCX=y
63# CONFIG_405_DMA is not set
64# CONFIG_PM is not set
65CONFIG_UART0_TTYS0=y
66# CONFIG_UART0_TTYS1 is not set
67CONFIG_NOT_COHERENT_CACHE=y
68# CONFIG_SMP is not set
69# CONFIG_PREEMPT is not set
70# CONFIG_MATH_EMULATION is not set
71# CONFIG_CPU_FREQ is not set
72
73#
74# General setup
75#
76# CONFIG_HIGHMEM is not set
77# CONFIG_PCI is not set
78# CONFIG_PCI_DOMAINS is not set
79# CONFIG_PC_KEYBOARD is not set
80CONFIG_KCORE_ELF=y
81CONFIG_BINFMT_ELF=y
82CONFIG_KERNEL_ELF=y
83# CONFIG_BINFMT_MISC is not set
84# CONFIG_HOTPLUG is not set
85
86#
87# Parallel port support
88#
89# CONFIG_PARPORT is not set
90# CONFIG_CMDLINE_BOOL is not set
91
92#
93# Advanced setup
94#
95# CONFIG_ADVANCED_OPTIONS is not set
96
97#
98# Default settings for advanced configuration options are used
99#
100CONFIG_HIGHMEM_START=0xfe000000
101CONFIG_LOWMEM_SIZE=0x30000000
102CONFIG_KERNEL_START=0xc0000000
103CONFIG_TASK_SIZE=0x80000000
104CONFIG_BOOT_LOAD=0x00400000
105
106#
107# Memory Technology Devices (MTD)
108#
109# CONFIG_MTD is not set
110
111#
112# Plug and Play support
113#
114# CONFIG_PNP is not set
115
116#
117# Block devices
118#
119# CONFIG_BLK_DEV_FD is not set
120CONFIG_BLK_DEV_LOOP=y
121# CONFIG_BLK_DEV_NBD is not set
122CONFIG_BLK_DEV_RAM=y
123CONFIG_BLK_DEV_RAM_SIZE=4096
124CONFIG_BLK_DEV_INITRD=y
125
126#
127# Multi-device support (RAID and LVM)
128#
129# CONFIG_MD is not set
130
131#
132# ATA/IDE/MFM/RLL support
133#
134# CONFIG_IDE is not set
135
136#
137# SCSI support
138#
139# CONFIG_SCSI is not set
140
141#
142# Fusion MPT device support
143#
144
145#
146# I2O device support
147#
148
149#
150# Networking support
151#
152CONFIG_NET=y
153
154#
155# Networking options
156#
157# CONFIG_PACKET is not set
158# CONFIG_NETLINK_DEV is not set
159# CONFIG_NETFILTER is not set
160CONFIG_UNIX=y
161# CONFIG_NET_KEY is not set
162CONFIG_INET=y
163CONFIG_IP_MULTICAST=y
164# CONFIG_IP_ADVANCED_ROUTER is not set
165CONFIG_IP_PNP=y
166# CONFIG_IP_PNP_DHCP is not set
167CONFIG_IP_PNP_BOOTP=y
168CONFIG_IP_PNP_RARP=y
169# CONFIG_NET_IPIP is not set
170# CONFIG_NET_IPGRE is not set
171# CONFIG_IP_MROUTE is not set
172# CONFIG_ARPD is not set
173# CONFIG_INET_ECN is not set
174CONFIG_SYN_COOKIES=y
175# CONFIG_INET_AH is not set
176# CONFIG_INET_ESP is not set
177# CONFIG_INET_IPCOMP is not set
178# CONFIG_IPV6 is not set
179# CONFIG_XFRM_USER is not set
180
181#
182# SCTP Configuration (EXPERIMENTAL)
183#
184CONFIG_IPV6_SCTP__=y
185# CONFIG_IP_SCTP is not set
186# CONFIG_ATM is not set
187# CONFIG_VLAN_8021Q is not set
188# CONFIG_LLC is not set
189# CONFIG_DECNET is not set
190# CONFIG_BRIDGE is not set
191# CONFIG_X25 is not set
192# CONFIG_LAPB is not set
193# CONFIG_NET_DIVERT is not set
194# CONFIG_ECONET is not set
195# CONFIG_WAN_ROUTER is not set
196# CONFIG_NET_HW_FLOWCONTROL is not set
197
198#
199# QoS and/or fair queueing
200#
201# CONFIG_NET_SCHED is not set
202
203#
204# Network testing
205#
206# CONFIG_NET_PKTGEN is not set
207CONFIG_NETDEVICES=y
208# CONFIG_DUMMY is not set
209# CONFIG_BONDING is not set
210# CONFIG_EQUALIZER is not set
211# CONFIG_TUN is not set
212# CONFIG_ETHERTAP is not set
213
214#
215# Ethernet (10 or 100Mbit)
216#
217CONFIG_NET_ETHERNET=y
218# CONFIG_MII is not set
219CONFIG_OAKNET=y
220
221#
222# Ethernet (1000 Mbit)
223#
224
225#
226# Ethernet (10000 Mbit)
227#
228# CONFIG_PPP is not set
229# CONFIG_SLIP is not set
230
231#
232# Wireless LAN (non-hamradio)
233#
234# CONFIG_NET_RADIO is not set
235
236#
237# Token Ring devices (depends on LLC=y)
238#
239# CONFIG_SHAPER is not set
240
241#
242# Wan interfaces
243#
244# CONFIG_WAN is not set
245
246#
247# Amateur Radio support
248#
249# CONFIG_HAMRADIO is not set
250
251#
252# IrDA (infrared) support
253#
254# CONFIG_IRDA is not set
255
256#
257# ISDN subsystem
258#
259# CONFIG_ISDN_BOOL is not set
260
261#
262# Graphics support
263#
264# CONFIG_FB is not set
265
266#
267# Old CD-ROM drivers (not SCSI, not IDE)
268#
269# CONFIG_CD_NO_IDESCSI is not set
270
271#
272# Input device support
273#
274# CONFIG_INPUT is not set
275
276#
277# Userland interfaces
278#
279
280#
281# Input I/O drivers
282#
283# CONFIG_GAMEPORT is not set
284CONFIG_SOUND_GAMEPORT=y
285# CONFIG_SERIO is not set
286
287#
288# Input Device Drivers
289#
290
291#
292# Macintosh device drivers
293#
294
295#
296# Character devices
297#
298# CONFIG_SERIAL_NONSTANDARD is not set
299
300#
301# Serial drivers
302#
303CONFIG_SERIAL_8250=y
304CONFIG_SERIAL_8250_CONSOLE=y
305# CONFIG_SERIAL_8250_EXTENDED is not set
306
307#
308# Non-8250 serial port support
309#
310CONFIG_SERIAL_CORE=y
311CONFIG_SERIAL_CORE_CONSOLE=y
312# CONFIG_UNIX98_PTYS is not set
313
314#
315# I2C support
316#
317# CONFIG_I2C is not set
318
319#
320# I2C Hardware Sensors Mainboard support
321#
322
323#
324# I2C Hardware Sensors Chip support
325#
326# CONFIG_I2C_SENSOR is not set
327
328#
329# Mice
330#
331# CONFIG_BUSMOUSE is not set
332# CONFIG_QIC02_TAPE is not set
333
334#
335# IPMI
336#
337# CONFIG_IPMI_HANDLER is not set
338
339#
340# Watchdog Cards
341#
342# CONFIG_WATCHDOG is not set
343# CONFIG_NVRAM is not set
344CONFIG_GEN_RTC=y
345# CONFIG_GEN_RTC_X is not set
346# CONFIG_DTLK is not set
347# CONFIG_R3964 is not set
348# CONFIG_APPLICOM is not set
349
350#
351# Ftape, the floppy tape device driver
352#
353# CONFIG_FTAPE is not set
354# CONFIG_AGP is not set
355# CONFIG_DRM is not set
356# CONFIG_RAW_DRIVER is not set
357# CONFIG_HANGCHECK_TIMER is not set
358
359#
360# Multimedia devices
361#
362# CONFIG_VIDEO_DEV is not set
363
364#
365# Digital Video Broadcasting Devices
366#
367# CONFIG_DVB is not set
368
369#
370# File systems
371#
372CONFIG_EXT2_FS=y
373# CONFIG_EXT2_FS_XATTR is not set
374# CONFIG_EXT3_FS is not set
375# CONFIG_JBD is not set
376# CONFIG_REISERFS_FS is not set
377# CONFIG_JFS_FS is not set
378# CONFIG_XFS_FS is not set
379# CONFIG_MINIX_FS is not set
380# CONFIG_ROMFS_FS is not set
381# CONFIG_QUOTA is not set
382# CONFIG_AUTOFS_FS is not set
383# CONFIG_AUTOFS4_FS is not set
384
385#
386# CD-ROM/DVD Filesystems
387#
388# CONFIG_ISO9660_FS is not set
389# CONFIG_UDF_FS is not set
390
391#
392# DOS/FAT/NT Filesystems
393#
394# CONFIG_FAT_FS is not set
395# CONFIG_NTFS_FS is not set
396
397#
398# Pseudo filesystems
399#
400CONFIG_PROC_FS=y
401# CONFIG_DEVFS_FS is not set
402CONFIG_TMPFS=y
403CONFIG_RAMFS=y
404
405#
406# Miscellaneous filesystems
407#
408# CONFIG_ADFS_FS is not set
409# CONFIG_AFFS_FS is not set
410# CONFIG_HFS_FS is not set
411# CONFIG_BEFS_FS is not set
412# CONFIG_BFS_FS is not set
413# CONFIG_EFS_FS is not set
414# CONFIG_CRAMFS is not set
415# CONFIG_VXFS_FS is not set
416# CONFIG_HPFS_FS is not set
417# CONFIG_QNX4FS_FS is not set
418# CONFIG_SYSV_FS is not set
419# CONFIG_UFS_FS is not set
420
421#
422# Network File Systems
423#
424CONFIG_NFS_FS=y
425# CONFIG_NFS_V3 is not set
426# CONFIG_NFS_V4 is not set
427# CONFIG_NFSD is not set
428CONFIG_ROOT_NFS=y
429CONFIG_LOCKD=y
430# CONFIG_EXPORTFS is not set
431CONFIG_SUNRPC=y
432# CONFIG_SUNRPC_GSS is not set
433# CONFIG_SMB_FS is not set
434# CONFIG_CIFS is not set
435# CONFIG_NCP_FS is not set
436# CONFIG_CODA_FS is not set
437# CONFIG_INTERMEZZO_FS is not set
438# CONFIG_AFS_FS is not set
439
440#
441# Partition Types
442#
443# CONFIG_PARTITION_ADVANCED is not set
444CONFIG_MSDOS_PARTITION=y
445
446#
447# Sound
448#
449# CONFIG_SOUND is not set
450
451#
452# IBM 40x options
453#
454
455#
456# USB support
457#
458# CONFIG_USB_GADGET is not set
459
460#
461# Bluetooth support
462#
463# CONFIG_BT is not set
464
465#
466# Library routines
467#
468# CONFIG_CRC32 is not set
469
470#
471# Kernel hacking
472#
473# CONFIG_DEBUG_KERNEL is not set
474# CONFIG_KALLSYMS is not set
475# CONFIG_SERIAL_TEXT_DEBUG is not set
476
477#
478# Security options
479#
480# CONFIG_SECURITY is not set
481
482#
483# Cryptographic options
484#
485# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/pcore_defconfig b/arch/ppc/configs/pcore_defconfig
deleted file mode 100644
index ed34405a7574..000000000000
--- a/arch/ppc/configs/pcore_defconfig
+++ /dev/null
@@ -1,716 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9CONFIG_GENERIC_NVRAM=y
10
11#
12# Code maturity level options
13#
14CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y
16CONFIG_STANDALONE=y
17CONFIG_BROKEN_ON_SMP=y
18
19#
20# General setup
21#
22CONFIG_SWAP=y
23CONFIG_SYSVIPC=y
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26CONFIG_LOG_BUF_SHIFT=14
27# CONFIG_HOTPLUG is not set
28# CONFIG_IKCONFIG is not set
29CONFIG_EMBEDDED=y
30CONFIG_KALLSYMS=y
31CONFIG_FUTEX=y
32CONFIG_EPOLL=y
33CONFIG_IOSCHED_NOOP=y
34CONFIG_IOSCHED_AS=y
35CONFIG_IOSCHED_DEADLINE=y
36# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
37
38#
39# Loadable module support
40#
41CONFIG_MODULES=y
42CONFIG_MODULE_UNLOAD=y
43# CONFIG_MODULE_FORCE_UNLOAD is not set
44CONFIG_OBSOLETE_MODPARM=y
45# CONFIG_MODVERSIONS is not set
46CONFIG_KMOD=y
47
48#
49# Processor
50#
51CONFIG_6xx=y
52# CONFIG_40x is not set
53# CONFIG_44x is not set
54# CONFIG_POWER3 is not set
55# CONFIG_POWER4 is not set
56# CONFIG_8xx is not set
57CONFIG_ALTIVEC=y
58# CONFIG_TAU is not set
59# CONFIG_CPU_FREQ is not set
60CONFIG_PPC_STD_MMU=y
61
62#
63# Platform options
64#
65# CONFIG_PPC_MULTIPLATFORM is not set
66# CONFIG_APUS is not set
67# CONFIG_WILLOW is not set
68CONFIG_PCORE=y
69# CONFIG_POWERPMC250 is not set
70# CONFIG_EV64260 is not set
71# CONFIG_SPRUCE is not set
72# CONFIG_LOPEC is not set
73# CONFIG_MCPN765 is not set
74# CONFIG_MVME5100 is not set
75# CONFIG_PPLUS is not set
76# CONFIG_PRPMC750 is not set
77# CONFIG_PRPMC800 is not set
78# CONFIG_SANDPOINT is not set
79# CONFIG_ADIR is not set
80# CONFIG_K2 is not set
81# CONFIG_PAL4 is not set
82# CONFIG_GEMINI is not set
83# CONFIG_EST8260 is not set
84# CONFIG_SBS8260 is not set
85# CONFIG_RPX6 is not set
86# CONFIG_TQM8260 is not set
87CONFIG_PPC_GEN550=y
88CONFIG_FORCE=y
89# CONFIG_MPC10X_STORE_GATHERING is not set
90# CONFIG_SMP is not set
91# CONFIG_PREEMPT is not set
92# CONFIG_HIGHMEM is not set
93CONFIG_KERNEL_ELF=y
94CONFIG_BINFMT_ELF=y
95# CONFIG_BINFMT_MISC is not set
96CONFIG_CMDLINE_BOOL=y
97CONFIG_CMDLINE="ip=on"
98
99#
100# Bus options
101#
102CONFIG_GENERIC_ISA_DMA=y
103CONFIG_PCI=y
104CONFIG_PCI_DOMAINS=y
105# CONFIG_PCI_LEGACY_PROC is not set
106# CONFIG_PCI_NAMES is not set
107
108#
109# Advanced setup
110#
111# CONFIG_ADVANCED_OPTIONS is not set
112
113#
114# Default settings for advanced configuration options are used
115#
116CONFIG_HIGHMEM_START=0xfe000000
117CONFIG_LOWMEM_SIZE=0x30000000
118CONFIG_KERNEL_START=0xc0000000
119CONFIG_TASK_SIZE=0x80000000
120CONFIG_BOOT_LOAD=0x00800000
121
122#
123# Device Drivers
124#
125
126#
127# Generic Driver Options
128#
129
130#
131# Memory Technology Devices (MTD)
132#
133# CONFIG_MTD is not set
134
135#
136# Parallel port support
137#
138# CONFIG_PARPORT is not set
139
140#
141# Plug and Play support
142#
143
144#
145# Block devices
146#
147# CONFIG_BLK_DEV_FD is not set
148# CONFIG_BLK_CPQ_DA is not set
149# CONFIG_BLK_CPQ_CISS_DA is not set
150# CONFIG_BLK_DEV_DAC960 is not set
151# CONFIG_BLK_DEV_UMEM is not set
152# CONFIG_BLK_DEV_LOOP is not set
153# CONFIG_BLK_DEV_NBD is not set
154# CONFIG_BLK_DEV_CARMEL is not set
155CONFIG_BLK_DEV_RAM=y
156CONFIG_BLK_DEV_RAM_SIZE=4096
157CONFIG_BLK_DEV_INITRD=y
158# CONFIG_LBD is not set
159
160#
161# ATA/ATAPI/MFM/RLL support
162#
163# CONFIG_IDE is not set
164
165#
166# SCSI device support
167#
168CONFIG_SCSI=y
169CONFIG_SCSI_PROC_FS=y
170
171#
172# SCSI support type (disk, tape, CD-ROM)
173#
174CONFIG_BLK_DEV_SD=y
175# CONFIG_CHR_DEV_ST is not set
176# CONFIG_CHR_DEV_OSST is not set
177CONFIG_BLK_DEV_SR=y
178# CONFIG_BLK_DEV_SR_VENDOR is not set
179# CONFIG_CHR_DEV_SG is not set
180
181#
182# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
183#
184# CONFIG_SCSI_MULTI_LUN is not set
185# CONFIG_SCSI_REPORT_LUNS is not set
186# CONFIG_SCSI_CONSTANTS is not set
187# CONFIG_SCSI_LOGGING is not set
188
189#
190# SCSI Transport Attributes
191#
192# CONFIG_SCSI_SPI_ATTRS is not set
193# CONFIG_SCSI_FC_ATTRS is not set
194
195#
196# SCSI low-level drivers
197#
198# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
199# CONFIG_SCSI_ACARD is not set
200# CONFIG_SCSI_AACRAID is not set
201# CONFIG_SCSI_AIC7XXX is not set
202# CONFIG_SCSI_AIC7XXX_OLD is not set
203# CONFIG_SCSI_AIC79XX is not set
204# CONFIG_SCSI_ADVANSYS is not set
205# CONFIG_SCSI_MEGARAID is not set
206# CONFIG_SCSI_SATA is not set
207# CONFIG_SCSI_BUSLOGIC is not set
208# CONFIG_SCSI_CPQFCTS is not set
209# CONFIG_SCSI_DMX3191D is not set
210# CONFIG_SCSI_EATA is not set
211# CONFIG_SCSI_EATA_PIO is not set
212# CONFIG_SCSI_FUTURE_DOMAIN is not set
213# CONFIG_SCSI_GDTH is not set
214# CONFIG_SCSI_IPS is not set
215# CONFIG_SCSI_INIA100 is not set
216CONFIG_SCSI_SYM53C8XX_2=y
217CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
218CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
219CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
220# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
221# CONFIG_SCSI_QLOGIC_ISP is not set
222# CONFIG_SCSI_QLOGIC_FC is not set
223# CONFIG_SCSI_QLOGIC_1280 is not set
224CONFIG_SCSI_QLA2XXX=y
225# CONFIG_SCSI_QLA21XX is not set
226# CONFIG_SCSI_QLA22XX is not set
227# CONFIG_SCSI_QLA2300 is not set
228# CONFIG_SCSI_QLA2322 is not set
229# CONFIG_SCSI_QLA6312 is not set
230# CONFIG_SCSI_QLA6322 is not set
231# CONFIG_SCSI_DC395x is not set
232# CONFIG_SCSI_DC390T is not set
233# CONFIG_SCSI_NSP32 is not set
234# CONFIG_SCSI_DEBUG is not set
235
236#
237# Multi-device support (RAID and LVM)
238#
239# CONFIG_MD is not set
240
241#
242# Fusion MPT device support
243#
244# CONFIG_FUSION is not set
245
246#
247# IEEE 1394 (FireWire) support
248#
249# CONFIG_IEEE1394 is not set
250
251#
252# I2O device support
253#
254# CONFIG_I2O is not set
255
256#
257# Macintosh device drivers
258#
259
260#
261# Networking support
262#
263CONFIG_NET=y
264
265#
266# Networking options
267#
268CONFIG_PACKET=y
269# CONFIG_PACKET_MMAP is not set
270# CONFIG_NETLINK_DEV is not set
271CONFIG_UNIX=y
272# CONFIG_NET_KEY is not set
273CONFIG_INET=y
274CONFIG_IP_MULTICAST=y
275# CONFIG_IP_ADVANCED_ROUTER is not set
276CONFIG_IP_PNP=y
277CONFIG_IP_PNP_DHCP=y
278# CONFIG_IP_PNP_BOOTP is not set
279# CONFIG_IP_PNP_RARP is not set
280# CONFIG_NET_IPIP is not set
281# CONFIG_NET_IPGRE is not set
282# CONFIG_IP_MROUTE is not set
283# CONFIG_ARPD is not set
284# CONFIG_SYN_COOKIES is not set
285# CONFIG_INET_AH is not set
286# CONFIG_INET_ESP is not set
287# CONFIG_INET_IPCOMP is not set
288
289#
290# IP: Virtual Server Configuration
291#
292# CONFIG_IP_VS is not set
293# CONFIG_IPV6 is not set
294# CONFIG_DECNET is not set
295# CONFIG_BRIDGE is not set
296CONFIG_NETFILTER=y
297# CONFIG_NETFILTER_DEBUG is not set
298
299#
300# IP: Netfilter Configuration
301#
302CONFIG_IP_NF_CONNTRACK=m
303CONFIG_IP_NF_FTP=m
304CONFIG_IP_NF_IRC=m
305# CONFIG_IP_NF_TFTP is not set
306# CONFIG_IP_NF_AMANDA is not set
307# CONFIG_IP_NF_QUEUE is not set
308CONFIG_IP_NF_IPTABLES=m
309CONFIG_IP_NF_MATCH_LIMIT=m
310# CONFIG_IP_NF_MATCH_IPRANGE is not set
311CONFIG_IP_NF_MATCH_MAC=m
312CONFIG_IP_NF_MATCH_PKTTYPE=m
313CONFIG_IP_NF_MATCH_MARK=m
314CONFIG_IP_NF_MATCH_MULTIPORT=m
315CONFIG_IP_NF_MATCH_TOS=m
316# CONFIG_IP_NF_MATCH_RECENT is not set
317CONFIG_IP_NF_MATCH_ECN=m
318CONFIG_IP_NF_MATCH_DSCP=m
319CONFIG_IP_NF_MATCH_AH_ESP=m
320CONFIG_IP_NF_MATCH_LENGTH=m
321CONFIG_IP_NF_MATCH_TTL=m
322CONFIG_IP_NF_MATCH_TCPMSS=m
323CONFIG_IP_NF_MATCH_HELPER=m
324CONFIG_IP_NF_MATCH_STATE=m
325CONFIG_IP_NF_MATCH_CONNTRACK=m
326CONFIG_IP_NF_MATCH_OWNER=m
327CONFIG_IP_NF_FILTER=m
328CONFIG_IP_NF_TARGET_REJECT=m
329CONFIG_IP_NF_NAT=m
330CONFIG_IP_NF_NAT_NEEDED=y
331CONFIG_IP_NF_TARGET_MASQUERADE=m
332CONFIG_IP_NF_TARGET_REDIRECT=m
333# CONFIG_IP_NF_TARGET_NETMAP is not set
334# CONFIG_IP_NF_TARGET_SAME is not set
335# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
336CONFIG_IP_NF_NAT_IRC=m
337CONFIG_IP_NF_NAT_FTP=m
338# CONFIG_IP_NF_MANGLE is not set
339# CONFIG_IP_NF_TARGET_LOG is not set
340CONFIG_IP_NF_TARGET_ULOG=m
341CONFIG_IP_NF_TARGET_TCPMSS=m
342CONFIG_IP_NF_ARPTABLES=m
343CONFIG_IP_NF_ARPFILTER=m
344# CONFIG_IP_NF_ARP_MANGLE is not set
345CONFIG_IP_NF_COMPAT_IPCHAINS=m
346# CONFIG_IP_NF_COMPAT_IPFWADM is not set
347
348#
349# SCTP Configuration (EXPERIMENTAL)
350#
351# CONFIG_IP_SCTP is not set
352# CONFIG_ATM is not set
353# CONFIG_VLAN_8021Q is not set
354# CONFIG_LLC2 is not set
355# CONFIG_IPX is not set
356# CONFIG_ATALK is not set
357# CONFIG_X25 is not set
358# CONFIG_LAPB is not set
359# CONFIG_NET_DIVERT is not set
360# CONFIG_ECONET is not set
361# CONFIG_WAN_ROUTER is not set
362# CONFIG_NET_HW_FLOWCONTROL is not set
363
364#
365# QoS and/or fair queueing
366#
367# CONFIG_NET_SCHED is not set
368
369#
370# Network testing
371#
372# CONFIG_NET_PKTGEN is not set
373CONFIG_NETDEVICES=y
374
375#
376# ARCnet devices
377#
378# CONFIG_ARCNET is not set
379# CONFIG_DUMMY is not set
380# CONFIG_BONDING is not set
381# CONFIG_EQUALIZER is not set
382# CONFIG_TUN is not set
383
384#
385# Ethernet (10 or 100Mbit)
386#
387CONFIG_NET_ETHERNET=y
388CONFIG_MII=y
389# CONFIG_OAKNET is not set
390# CONFIG_HAPPYMEAL is not set
391# CONFIG_SUNGEM is not set
392# CONFIG_NET_VENDOR_3COM is not set
393
394#
395# Tulip family network device support
396#
397CONFIG_NET_TULIP=y
398# CONFIG_DE2104X is not set
399CONFIG_TULIP=y
400# CONFIG_TULIP_MWI is not set
401# CONFIG_TULIP_MMIO is not set
402# CONFIG_TULIP_NAPI is not set
403# CONFIG_DE4X5 is not set
404# CONFIG_WINBOND_840 is not set
405# CONFIG_DM9102 is not set
406# CONFIG_HP100 is not set
407CONFIG_NET_PCI=y
408# CONFIG_PCNET32 is not set
409# CONFIG_AMD8111_ETH is not set
410# CONFIG_ADAPTEC_STARFIRE is not set
411# CONFIG_B44 is not set
412# CONFIG_FORCEDETH is not set
413# CONFIG_DGRS is not set
414CONFIG_EEPRO100=y
415# CONFIG_EEPRO100_PIO is not set
416# CONFIG_E100 is not set
417# CONFIG_FEALNX is not set
418# CONFIG_NATSEMI is not set
419# CONFIG_NE2K_PCI is not set
420# CONFIG_8139CP is not set
421# CONFIG_8139TOO is not set
422# CONFIG_SIS900 is not set
423# CONFIG_EPIC100 is not set
424# CONFIG_SUNDANCE is not set
425# CONFIG_TLAN is not set
426# CONFIG_VIA_RHINE is not set
427
428#
429# Ethernet (1000 Mbit)
430#
431# CONFIG_ACENIC is not set
432# CONFIG_DL2K is not set
433# CONFIG_E1000 is not set
434# CONFIG_NS83820 is not set
435# CONFIG_HAMACHI is not set
436# CONFIG_YELLOWFIN is not set
437# CONFIG_R8169 is not set
438# CONFIG_SIS190 is not set
439# CONFIG_SK98LIN is not set
440# CONFIG_TIGON3 is not set
441
442#
443# Ethernet (10000 Mbit)
444#
445# CONFIG_IXGB is not set
446# CONFIG_FDDI is not set
447# CONFIG_HIPPI is not set
448# CONFIG_PPP is not set
449# CONFIG_SLIP is not set
450
451#
452# Wireless LAN (non-hamradio)
453#
454# CONFIG_NET_RADIO is not set
455
456#
457# Token Ring devices
458#
459# CONFIG_TR is not set
460# CONFIG_NET_FC is not set
461# CONFIG_RCPCI is not set
462# CONFIG_SHAPER is not set
463# CONFIG_NETCONSOLE is not set
464
465#
466# Wan interfaces
467#
468# CONFIG_WAN is not set
469
470#
471# Amateur Radio support
472#
473# CONFIG_HAMRADIO is not set
474
475#
476# IrDA (infrared) support
477#
478# CONFIG_IRDA is not set
479
480#
481# Bluetooth support
482#
483# CONFIG_BT is not set
484# CONFIG_NETPOLL is not set
485# CONFIG_NET_POLL_CONTROLLER is not set
486
487#
488# ISDN subsystem
489#
490# CONFIG_ISDN is not set
491
492#
493# Telephony Support
494#
495# CONFIG_PHONE is not set
496
497#
498# Input device support
499#
500# CONFIG_INPUT is not set
501
502#
503# Userland interfaces
504#
505
506#
507# Input I/O drivers
508#
509# CONFIG_GAMEPORT is not set
510CONFIG_SOUND_GAMEPORT=y
511# CONFIG_SERIO is not set
512# CONFIG_SERIO_I8042 is not set
513
514#
515# Input Device Drivers
516#
517
518#
519# Character devices
520#
521# CONFIG_VT is not set
522# CONFIG_SERIAL_NONSTANDARD is not set
523
524#
525# Serial drivers
526#
527CONFIG_SERIAL_8250=y
528CONFIG_SERIAL_8250_CONSOLE=y
529CONFIG_SERIAL_8250_NR_UARTS=2
530# CONFIG_SERIAL_8250_EXTENDED is not set
531
532#
533# Non-8250 serial port support
534#
535CONFIG_SERIAL_CORE=y
536CONFIG_SERIAL_CORE_CONSOLE=y
537CONFIG_UNIX98_PTYS=y
538CONFIG_LEGACY_PTYS=y
539CONFIG_LEGACY_PTY_COUNT=256
540# CONFIG_QIC02_TAPE is not set
541
542#
543# IPMI
544#
545# CONFIG_IPMI_HANDLER is not set
546
547#
548# Watchdog Cards
549#
550# CONFIG_WATCHDOG is not set
551# CONFIG_NVRAM is not set
552CONFIG_GEN_RTC=y
553# CONFIG_GEN_RTC_X is not set
554# CONFIG_DTLK is not set
555# CONFIG_R3964 is not set
556# CONFIG_APPLICOM is not set
557
558#
559# Ftape, the floppy tape device driver
560#
561# CONFIG_FTAPE is not set
562# CONFIG_AGP is not set
563# CONFIG_DRM is not set
564# CONFIG_RAW_DRIVER is not set
565
566#
567# I2C support
568#
569# CONFIG_I2C is not set
570
571#
572# Misc devices
573#
574
575#
576# Multimedia devices
577#
578# CONFIG_VIDEO_DEV is not set
579
580#
581# Digital Video Broadcasting Devices
582#
583# CONFIG_DVB is not set
584
585#
586# Graphics support
587#
588# CONFIG_FB is not set
589
590#
591# Sound
592#
593# CONFIG_SOUND is not set
594
595#
596# USB support
597#
598# CONFIG_USB is not set
599
600#
601# USB Gadget Support
602#
603# CONFIG_USB_GADGET is not set
604
605#
606# File systems
607#
608CONFIG_EXT2_FS=y
609# CONFIG_EXT2_FS_XATTR is not set
610CONFIG_EXT3_FS=y
611CONFIG_EXT3_FS_XATTR=y
612# CONFIG_EXT3_FS_POSIX_ACL is not set
613# CONFIG_EXT3_FS_SECURITY is not set
614CONFIG_JBD=y
615# CONFIG_JBD_DEBUG is not set
616CONFIG_FS_MBCACHE=y
617# CONFIG_REISERFS_FS is not set
618# CONFIG_JFS_FS is not set
619# CONFIG_XFS_FS is not set
620# CONFIG_MINIX_FS is not set
621# CONFIG_ROMFS_FS is not set
622# CONFIG_QUOTA is not set
623# CONFIG_AUTOFS_FS is not set
624# CONFIG_AUTOFS4_FS is not set
625
626#
627# CD-ROM/DVD Filesystems
628#
629# CONFIG_ISO9660_FS is not set
630# CONFIG_UDF_FS is not set
631
632#
633# DOS/FAT/NT Filesystems
634#
635# CONFIG_FAT_FS is not set
636# CONFIG_NTFS_FS is not set
637
638#
639# Pseudo filesystems
640#
641CONFIG_PROC_FS=y
642CONFIG_PROC_KCORE=y
643# CONFIG_DEVFS_FS is not set
644# CONFIG_DEVPTS_FS_XATTR is not set
645CONFIG_TMPFS=y
646# CONFIG_HUGETLB_PAGE is not set
647CONFIG_RAMFS=y
648
649#
650# Miscellaneous filesystems
651#
652# CONFIG_ADFS_FS is not set
653# CONFIG_AFFS_FS is not set
654# CONFIG_HFS_FS is not set
655# CONFIG_HFSPLUS_FS is not set
656# CONFIG_BEFS_FS is not set
657# CONFIG_BFS_FS is not set
658# CONFIG_EFS_FS is not set
659# CONFIG_CRAMFS is not set
660# CONFIG_VXFS_FS is not set
661# CONFIG_HPFS_FS is not set
662# CONFIG_QNX4FS_FS is not set
663# CONFIG_SYSV_FS is not set
664# CONFIG_UFS_FS is not set
665
666#
667# Network File Systems
668#
669CONFIG_NFS_FS=y
670# CONFIG_NFS_V3 is not set
671# CONFIG_NFS_V4 is not set
672# CONFIG_NFS_DIRECTIO is not set
673# CONFIG_NFSD is not set
674CONFIG_ROOT_NFS=y
675CONFIG_LOCKD=y
676# CONFIG_EXPORTFS is not set
677CONFIG_SUNRPC=y
678# CONFIG_RPCSEC_GSS_KRB5 is not set
679# CONFIG_SMB_FS is not set
680# CONFIG_CIFS is not set
681# CONFIG_NCP_FS is not set
682# CONFIG_CODA_FS is not set
683# CONFIG_INTERMEZZO_FS is not set
684# CONFIG_AFS_FS is not set
685
686#
687# Partition Types
688#
689# CONFIG_PARTITION_ADVANCED is not set
690CONFIG_MSDOS_PARTITION=y
691
692#
693# Native Language Support
694#
695# CONFIG_NLS is not set
696
697#
698# Library routines
699#
700CONFIG_CRC32=y
701
702#
703# Kernel hacking
704#
705# CONFIG_DEBUG_KERNEL is not set
706# CONFIG_SERIAL_TEXT_DEBUG is not set
707
708#
709# Security options
710#
711# CONFIG_SECURITY is not set
712
713#
714# Cryptographic options
715#
716# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/rainier_defconfig b/arch/ppc/configs/rainier_defconfig
deleted file mode 100644
index 4d4fcdc61bb7..000000000000
--- a/arch/ppc/configs/rainier_defconfig
+++ /dev/null
@@ -1,599 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7
8#
9# Code maturity level options
10#
11CONFIG_EXPERIMENTAL=y
12
13#
14# General setup
15#
16# CONFIG_SWAP is not set
17CONFIG_SYSVIPC=y
18# CONFIG_BSD_PROCESS_ACCT is not set
19CONFIG_SYSCTL=y
20CONFIG_LOG_BUF_SHIFT=14
21CONFIG_EMBEDDED=y
22CONFIG_FUTEX=y
23# CONFIG_EPOLL is not set
24
25#
26# Loadable module support
27#
28CONFIG_MODULES=y
29# CONFIG_MODULE_UNLOAD is not set
30CONFIG_OBSOLETE_MODPARM=y
31CONFIG_MODVERSIONS=y
32CONFIG_KMOD=y
33
34#
35# Platform support
36#
37CONFIG_PPC=y
38CONFIG_PPC32=y
39# CONFIG_6xx is not set
40CONFIG_40x=y
41# CONFIG_POWER3 is not set
42# CONFIG_8xx is not set
43CONFIG_4xx=y
44
45#
46# IBM 4xx options
47#
48# CONFIG_ASH is not set
49# CONFIG_BEECH is not set
50# CONFIG_CEDAR is not set
51# CONFIG_CPCI405 is not set
52# CONFIG_EP405 is not set
53# CONFIG_OAK is not set
54# CONFIG_REDWOOD_4 is not set
55# CONFIG_REDWOOD_5 is not set
56# CONFIG_REDWOOD_6 is not set
57# CONFIG_SYCAMORE is not set
58# CONFIG_TIVO is not set
59CONFIG_WALNUT=y
60CONFIG_IBM405_ERR77=y
61CONFIG_IBM405_ERR51=y
62CONFIG_IBM_OCP=y
63CONFIG_BIOS_FIXUP=y
64CONFIG_405GP=y
65CONFIG_IBM_OPENBIOS=y
66CONFIG_405_DMA=y
67# CONFIG_PM is not set
68CONFIG_UART0_TTYS0=y
69# CONFIG_UART0_TTYS1 is not set
70CONFIG_NOT_COHERENT_CACHE=y
71# CONFIG_SMP is not set
72# CONFIG_PREEMPT is not set
73# CONFIG_MATH_EMULATION is not set
74# CONFIG_CPU_FREQ is not set
75
76#
77# General setup
78#
79# CONFIG_HIGHMEM is not set
80CONFIG_PCI=y
81CONFIG_PCI_DOMAINS=y
82# CONFIG_PC_KEYBOARD is not set
83CONFIG_KCORE_ELF=y
84CONFIG_BINFMT_ELF=y
85CONFIG_KERNEL_ELF=y
86# CONFIG_BINFMT_MISC is not set
87# CONFIG_PCI_LEGACY_PROC is not set
88CONFIG_PCI_NAMES=y
89# CONFIG_HOTPLUG is not set
90
91#
92# Parallel port support
93#
94# CONFIG_PARPORT is not set
95# CONFIG_CMDLINE_BOOL is not set
96
97#
98# Advanced setup
99#
100# CONFIG_ADVANCED_OPTIONS is not set
101
102#
103# Default settings for advanced configuration options are used
104#
105CONFIG_HIGHMEM_START=0xfe000000
106CONFIG_LOWMEM_SIZE=0x30000000
107CONFIG_KERNEL_START=0xc0000000
108CONFIG_TASK_SIZE=0x80000000
109CONFIG_BOOT_LOAD=0x00400000
110
111#
112# Memory Technology Devices (MTD)
113#
114# CONFIG_MTD is not set
115
116#
117# Plug and Play support
118#
119# CONFIG_PNP is not set
120
121#
122# Block devices
123#
124# CONFIG_BLK_DEV_FD is not set
125# CONFIG_BLK_CPQ_DA is not set
126# CONFIG_BLK_CPQ_CISS_DA is not set
127# CONFIG_BLK_DEV_DAC960 is not set
128# CONFIG_BLK_DEV_UMEM is not set
129CONFIG_BLK_DEV_LOOP=y
130CONFIG_BLK_DEV_NBD=y
131CONFIG_BLK_DEV_RAM=y
132CONFIG_BLK_DEV_RAM_SIZE=4096
133CONFIG_BLK_DEV_INITRD=y
134
135#
136# Multi-device support (RAID and LVM)
137#
138# CONFIG_MD is not set
139
140#
141# ATA/IDE/MFM/RLL support
142#
143# CONFIG_IDE is not set
144
145#
146# SCSI support
147#
148# CONFIG_SCSI is not set
149
150#
151# Fusion MPT device support
152#
153
154#
155# IEEE 1394 (FireWire) support (EXPERIMENTAL)
156#
157# CONFIG_IEEE1394 is not set
158
159#
160# I2O device support
161#
162# CONFIG_I2O is not set
163
164#
165# Networking support
166#
167CONFIG_NET=y
168
169#
170# Networking options
171#
172CONFIG_PACKET=y
173# CONFIG_PACKET_MMAP is not set
174# CONFIG_NETLINK_DEV is not set
175# CONFIG_NETFILTER is not set
176CONFIG_UNIX=y
177# CONFIG_NET_KEY is not set
178CONFIG_INET=y
179CONFIG_IP_MULTICAST=y
180# CONFIG_IP_ADVANCED_ROUTER is not set
181CONFIG_IP_PNP=y
182# CONFIG_IP_PNP_DHCP is not set
183CONFIG_IP_PNP_BOOTP=y
184CONFIG_IP_PNP_RARP=y
185# CONFIG_NET_IPIP is not set
186# CONFIG_NET_IPGRE is not set
187# CONFIG_IP_MROUTE is not set
188# CONFIG_ARPD is not set
189# CONFIG_INET_ECN is not set
190CONFIG_SYN_COOKIES=y
191# CONFIG_INET_AH is not set
192# CONFIG_INET_ESP is not set
193# CONFIG_INET_IPCOMP is not set
194# CONFIG_IPV6 is not set
195# CONFIG_XFRM_USER is not set
196
197#
198# SCTP Configuration (EXPERIMENTAL)
199#
200CONFIG_IPV6_SCTP__=y
201# CONFIG_IP_SCTP is not set
202# CONFIG_ATM is not set
203# CONFIG_VLAN_8021Q is not set
204# CONFIG_LLC is not set
205# CONFIG_DECNET is not set
206# CONFIG_BRIDGE is not set
207# CONFIG_X25 is not set
208# CONFIG_LAPB is not set
209# CONFIG_NET_DIVERT is not set
210# CONFIG_ECONET is not set
211# CONFIG_WAN_ROUTER is not set
212# CONFIG_NET_HW_FLOWCONTROL is not set
213
214#
215# QoS and/or fair queueing
216#
217# CONFIG_NET_SCHED is not set
218
219#
220# Network testing
221#
222# CONFIG_NET_PKTGEN is not set
223CONFIG_NETDEVICES=y
224
225#
226# ARCnet devices
227#
228# CONFIG_ARCNET is not set
229# CONFIG_DUMMY is not set
230# CONFIG_BONDING is not set
231# CONFIG_EQUALIZER is not set
232# CONFIG_TUN is not set
233# CONFIG_ETHERTAP is not set
234
235#
236# Ethernet (10 or 100Mbit)
237#
238CONFIG_NET_ETHERNET=y
239CONFIG_MII=y
240# CONFIG_OAKNET is not set
241# CONFIG_HAPPYMEAL is not set
242# CONFIG_SUNGEM is not set
243# CONFIG_NET_VENDOR_3COM is not set
244
245#
246# Tulip family network device support
247#
248# CONFIG_NET_TULIP is not set
249# CONFIG_HP100 is not set
250CONFIG_NET_PCI=y
251CONFIG_PCNET32=y
252# CONFIG_AMD8111_ETH is not set
253# CONFIG_ADAPTEC_STARFIRE is not set
254# CONFIG_B44 is not set
255# CONFIG_DGRS is not set
256CONFIG_EEPRO100=y
257# CONFIG_EEPRO100_PIO is not set
258# CONFIG_E100 is not set
259# CONFIG_FEALNX is not set
260# CONFIG_NATSEMI is not set
261# CONFIG_NE2K_PCI is not set
262# CONFIG_8139CP is not set
263# CONFIG_8139TOO is not set
264# CONFIG_SIS900 is not set
265# CONFIG_EPIC100 is not set
266# CONFIG_SUNDANCE is not set
267# CONFIG_TLAN is not set
268# CONFIG_VIA_RHINE is not set
269
270#
271# Ethernet (1000 Mbit)
272#
273# CONFIG_ACENIC is not set
274# CONFIG_DL2K is not set
275# CONFIG_E1000 is not set
276# CONFIG_NS83820 is not set
277# CONFIG_HAMACHI is not set
278# CONFIG_YELLOWFIN is not set
279# CONFIG_R8169 is not set
280# CONFIG_SK98LIN is not set
281# CONFIG_TIGON3 is not set
282
283#
284# Ethernet (10000 Mbit)
285#
286# CONFIG_IXGB is not set
287# CONFIG_FDDI is not set
288# CONFIG_HIPPI is not set
289CONFIG_PPP=y
290# CONFIG_PPP_MULTILINK is not set
291# CONFIG_PPP_FILTER is not set
292# CONFIG_PPP_ASYNC is not set
293# CONFIG_PPP_SYNC_TTY is not set
294# CONFIG_PPP_DEFLATE is not set
295# CONFIG_PPP_BSDCOMP is not set
296# CONFIG_PPPOE is not set
297# CONFIG_SLIP is not set
298
299#
300# Wireless LAN (non-hamradio)
301#
302# CONFIG_NET_RADIO is not set
303
304#
305# Token Ring devices (depends on LLC=y)
306#
307# CONFIG_RCPCI is not set
308# CONFIG_SHAPER is not set
309
310#
311# Wan interfaces
312#
313# CONFIG_WAN is not set
314
315#
316# Amateur Radio support
317#
318# CONFIG_HAMRADIO is not set
319
320#
321# IrDA (infrared) support
322#
323# CONFIG_IRDA is not set
324
325#
326# ISDN subsystem
327#
328# CONFIG_ISDN_BOOL is not set
329
330#
331# Graphics support
332#
333# CONFIG_FB is not set
334
335#
336# Old CD-ROM drivers (not SCSI, not IDE)
337#
338# CONFIG_CD_NO_IDESCSI is not set
339
340#
341# Input device support
342#
343# CONFIG_INPUT is not set
344
345#
346# Userland interfaces
347#
348
349#
350# Input I/O drivers
351#
352# CONFIG_GAMEPORT is not set
353CONFIG_SOUND_GAMEPORT=y
354CONFIG_SERIO=y
355CONFIG_SERIO_I8042=y
356CONFIG_SERIO_SERPORT=y
357# CONFIG_SERIO_CT82C710 is not set
358
359#
360# Input Device Drivers
361#
362
363#
364# Macintosh device drivers
365#
366
367#
368# Character devices
369#
370# CONFIG_SERIAL_NONSTANDARD is not set
371
372#
373# Serial drivers
374#
375# CONFIG_SERIAL_8250 is not set
376
377#
378# Non-8250 serial port support
379#
380CONFIG_UNIX98_PTYS=y
381CONFIG_UNIX98_PTY_COUNT=256
382
383#
384# I2C support
385#
386CONFIG_I2C=y
387# CONFIG_I2C_ALGOBIT is not set
388# CONFIG_I2C_ALGOPCF is not set
389# CONFIG_I2C_IBM_OCP_ALGO is not set
390CONFIG_I2C_CHARDEV=y
391
392#
393# I2C Hardware Sensors Mainboard support
394#
395# CONFIG_I2C_ALI15X3 is not set
396# CONFIG_I2C_AMD756 is not set
397# CONFIG_I2C_AMD8111 is not set
398# CONFIG_I2C_I801 is not set
399# CONFIG_I2C_PIIX4 is not set
400# CONFIG_I2C_SIS96X is not set
401# CONFIG_I2C_VIAPRO is not set
402
403#
404# I2C Hardware Sensors Chip support
405#
406# CONFIG_SENSORS_ADM1021 is not set
407# CONFIG_SENSORS_IT87 is not set
408# CONFIG_SENSORS_LM75 is not set
409# CONFIG_SENSORS_LM85 is not set
410# CONFIG_SENSORS_VIA686A is not set
411# CONFIG_SENSORS_W83781D is not set
412# CONFIG_I2C_SENSOR is not set
413
414#
415# Mice
416#
417CONFIG_BUSMOUSE=y
418# CONFIG_QIC02_TAPE is not set
419
420#
421# IPMI
422#
423# CONFIG_IPMI_HANDLER is not set
424
425#
426# Watchdog Cards
427#
428CONFIG_WATCHDOG=y
429# CONFIG_WATCHDOG_NOWAYOUT is not set
430# CONFIG_SOFT_WATCHDOG is not set
431# CONFIG_WDT is not set
432# CONFIG_WDTPCI is not set
433# CONFIG_PCWATCHDOG is not set
434# CONFIG_ACQUIRE_WDT is not set
435# CONFIG_ADVANTECH_WDT is not set
436# CONFIG_EUROTECH_WDT is not set
437# CONFIG_IB700_WDT is not set
438# CONFIG_MIXCOMWD is not set
439# CONFIG_SCx200_WDT is not set
440# CONFIG_60XX_WDT is not set
441# CONFIG_W83877F_WDT is not set
442# CONFIG_MACHZ_WDT is not set
443# CONFIG_SC520_WDT is not set
444# CONFIG_AMD7XX_TCO is not set
445# CONFIG_ALIM7101_WDT is not set
446# CONFIG_SC1200_WDT is not set
447# CONFIG_WAFER_WDT is not set
448# CONFIG_CPU5_WDT is not set
449# CONFIG_NVRAM is not set
450CONFIG_GEN_RTC=y
451# CONFIG_GEN_RTC_X is not set
452# CONFIG_DTLK is not set
453# CONFIG_R3964 is not set
454# CONFIG_APPLICOM is not set
455
456#
457# Ftape, the floppy tape device driver
458#
459# CONFIG_FTAPE is not set
460# CONFIG_AGP is not set
461# CONFIG_DRM is not set
462# CONFIG_RAW_DRIVER is not set
463# CONFIG_HANGCHECK_TIMER is not set
464
465#
466# Multimedia devices
467#
468# CONFIG_VIDEO_DEV is not set
469
470#
471# Digital Video Broadcasting Devices
472#
473# CONFIG_DVB is not set
474
475#
476# File systems
477#
478CONFIG_EXT2_FS=y
479# CONFIG_EXT2_FS_XATTR is not set
480# CONFIG_EXT3_FS is not set
481# CONFIG_JBD is not set
482# CONFIG_REISERFS_FS is not set
483# CONFIG_JFS_FS is not set
484# CONFIG_XFS_FS is not set
485# CONFIG_MINIX_FS is not set
486# CONFIG_ROMFS_FS is not set
487# CONFIG_QUOTA is not set
488CONFIG_AUTOFS_FS=y
489# CONFIG_AUTOFS4_FS is not set
490
491#
492# CD-ROM/DVD Filesystems
493#
494CONFIG_ISO9660_FS=y
495# CONFIG_JOLIET is not set
496# CONFIG_ZISOFS is not set
497# CONFIG_UDF_FS is not set
498
499#
500# DOS/FAT/NT Filesystems
501#
502# CONFIG_FAT_FS is not set
503# CONFIG_NTFS_FS is not set
504
505#
506# Pseudo filesystems
507#
508CONFIG_PROC_FS=y
509# CONFIG_DEVFS_FS is not set
510CONFIG_DEVPTS_FS=y
511# CONFIG_DEVPTS_FS_XATTR is not set
512CONFIG_TMPFS=y
513CONFIG_RAMFS=y
514
515#
516# Miscellaneous filesystems
517#
518# CONFIG_ADFS_FS is not set
519# CONFIG_AFFS_FS is not set
520# CONFIG_HFS_FS is not set
521# CONFIG_BEFS_FS is not set
522# CONFIG_BFS_FS is not set
523# CONFIG_EFS_FS is not set
524# CONFIG_CRAMFS is not set
525# CONFIG_VXFS_FS is not set
526# CONFIG_HPFS_FS is not set
527# CONFIG_QNX4FS_FS is not set
528# CONFIG_SYSV_FS is not set
529# CONFIG_UFS_FS is not set
530
531#
532# Network File Systems
533#
534CONFIG_NFS_FS=y
535# CONFIG_NFS_V3 is not set
536# CONFIG_NFS_V4 is not set
537CONFIG_NFSD=y
538# CONFIG_NFSD_V3 is not set
539# CONFIG_NFSD_TCP is not set
540CONFIG_ROOT_NFS=y
541CONFIG_LOCKD=y
542CONFIG_EXPORTFS=y
543CONFIG_SUNRPC=y
544# CONFIG_SUNRPC_GSS is not set
545# CONFIG_SMB_FS is not set
546# CONFIG_CIFS is not set
547# CONFIG_NCP_FS is not set
548# CONFIG_CODA_FS is not set
549# CONFIG_INTERMEZZO_FS is not set
550# CONFIG_AFS_FS is not set
551
552#
553# Partition Types
554#
555# CONFIG_PARTITION_ADVANCED is not set
556CONFIG_MSDOS_PARTITION=y
557
558#
559# Sound
560#
561# CONFIG_SOUND is not set
562
563#
564# IBM 40x options
565#
566
567#
568# USB support
569#
570# CONFIG_USB is not set
571# CONFIG_USB_GADGET is not set
572
573#
574# Bluetooth support
575#
576# CONFIG_BT is not set
577
578#
579# Library routines
580#
581# CONFIG_CRC32 is not set
582
583#
584# Kernel hacking
585#
586# CONFIG_DEBUG_KERNEL is not set
587# CONFIG_KALLSYMS is not set
588# CONFIG_SERIAL_TEXT_DEBUG is not set
589CONFIG_OCP=y
590
591#
592# Security options
593#
594# CONFIG_SECURITY is not set
595
596#
597# Cryptographic options
598#
599# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/redwood_defconfig b/arch/ppc/configs/redwood_defconfig
deleted file mode 100644
index 4aa348dcf22c..000000000000
--- a/arch/ppc/configs/redwood_defconfig
+++ /dev/null
@@ -1,540 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9
10#
11# Code maturity level options
12#
13CONFIG_EXPERIMENTAL=y
14CONFIG_CLEAN_COMPILE=y
15# CONFIG_STANDALONE is not set
16CONFIG_BROKEN_ON_SMP=y
17
18#
19# General setup
20#
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23# CONFIG_BSD_PROCESS_ACCT is not set
24CONFIG_SYSCTL=y
25CONFIG_LOG_BUF_SHIFT=14
26# CONFIG_IKCONFIG is not set
27CONFIG_EMBEDDED=y
28# CONFIG_KALLSYMS is not set
29CONFIG_FUTEX=y
30# CONFIG_EPOLL is not set
31CONFIG_IOSCHED_NOOP=y
32CONFIG_IOSCHED_AS=y
33CONFIG_IOSCHED_DEADLINE=y
34
35#
36# Loadable module support
37#
38CONFIG_MODULES=y
39# CONFIG_MODULE_UNLOAD is not set
40CONFIG_OBSOLETE_MODPARM=y
41# CONFIG_MODVERSIONS is not set
42CONFIG_KMOD=y
43
44#
45# Processor
46#
47# CONFIG_6xx is not set
48CONFIG_40x=y
49# CONFIG_44x is not set
50# CONFIG_POWER3 is not set
51# CONFIG_POWER4 is not set
52# CONFIG_8xx is not set
53# CONFIG_MATH_EMULATION is not set
54# CONFIG_CPU_FREQ is not set
55CONFIG_4xx=y
56
57#
58# IBM 4xx options
59#
60# CONFIG_ASH is not set
61# CONFIG_BEECH is not set
62# CONFIG_CEDAR is not set
63# CONFIG_CPCI405 is not set
64# CONFIG_EP405 is not set
65# CONFIG_OAK is not set
66CONFIG_REDWOOD_4=y
67# CONFIG_REDWOOD_5 is not set
68# CONFIG_REDWOOD_6 is not set
69# CONFIG_SYCAMORE is not set
70# CONFIG_TIVO is not set
71# CONFIG_WALNUT is not set
72CONFIG_IBM405_ERR77=y
73CONFIG_IBM405_ERR51=y
74CONFIG_IBM_OCP=y
75CONFIG_STB03xxx=y
76CONFIG_IBM_OPENBIOS=y
77# CONFIG_405_DMA is not set
78# CONFIG_PM is not set
79CONFIG_UART0_TTYS0=y
80# CONFIG_UART0_TTYS1 is not set
81# CONFIG_SERIAL_SICC is not set
82CONFIG_NOT_COHERENT_CACHE=y
83
84#
85# Platform options
86#
87# CONFIG_PC_KEYBOARD is not set
88# CONFIG_SMP is not set
89# CONFIG_PREEMPT is not set
90# CONFIG_HIGHMEM is not set
91CONFIG_KERNEL_ELF=y
92CONFIG_BINFMT_ELF=y
93# CONFIG_BINFMT_MISC is not set
94# CONFIG_CMDLINE_BOOL is not set
95
96#
97# Bus options
98#
99# CONFIG_PCI is not set
100# CONFIG_PCI_DOMAINS is not set
101# CONFIG_HOTPLUG is not set
102
103#
104# Parallel port support
105#
106# CONFIG_PARPORT is not set
107
108#
109# Advanced setup
110#
111# CONFIG_ADVANCED_OPTIONS is not set
112
113#
114# Default settings for advanced configuration options are used
115#
116CONFIG_HIGHMEM_START=0xfe000000
117CONFIG_LOWMEM_SIZE=0x30000000
118CONFIG_KERNEL_START=0xc0000000
119CONFIG_TASK_SIZE=0x80000000
120CONFIG_BOOT_LOAD=0x00400000
121
122#
123# Generic Driver Options
124#
125
126#
127# Memory Technology Devices (MTD)
128#
129# CONFIG_MTD is not set
130
131#
132# Plug and Play support
133#
134# CONFIG_PNP is not set
135
136#
137# Block devices
138#
139CONFIG_BLK_DEV_LOOP=y
140# CONFIG_BLK_DEV_CRYPTOLOOP is not set
141# CONFIG_BLK_DEV_NBD is not set
142CONFIG_BLK_DEV_RAM=y
143CONFIG_BLK_DEV_RAM_SIZE=4096
144CONFIG_BLK_DEV_INITRD=y
145# CONFIG_LBD is not set
146
147#
148# Multi-device support (RAID and LVM)
149#
150# CONFIG_MD is not set
151
152#
153# ATA/ATAPI/MFM/RLL support
154#
155# CONFIG_IDE is not set
156
157#
158# SCSI device support
159#
160# CONFIG_SCSI is not set
161
162#
163# Fusion MPT device support
164#
165
166#
167# I2O device support
168#
169
170#
171# Networking support
172#
173CONFIG_NET=y
174
175#
176# Networking options
177#
178# CONFIG_PACKET is not set
179# CONFIG_NETLINK_DEV is not set
180CONFIG_UNIX=y
181# CONFIG_NET_KEY is not set
182CONFIG_INET=y
183CONFIG_IP_MULTICAST=y
184# CONFIG_IP_ADVANCED_ROUTER is not set
185CONFIG_IP_PNP=y
186CONFIG_IP_PNP_DHCP=y
187CONFIG_IP_PNP_BOOTP=y
188CONFIG_IP_PNP_RARP=y
189# CONFIG_NET_IPIP is not set
190# CONFIG_NET_IPGRE is not set
191# CONFIG_IP_MROUTE is not set
192# CONFIG_ARPD is not set
193# CONFIG_INET_ECN is not set
194CONFIG_SYN_COOKIES=y
195# CONFIG_INET_AH is not set
196# CONFIG_INET_ESP is not set
197# CONFIG_INET_IPCOMP is not set
198# CONFIG_IPV6 is not set
199# CONFIG_DECNET is not set
200# CONFIG_BRIDGE is not set
201# CONFIG_NETFILTER is not set
202
203#
204# SCTP Configuration (EXPERIMENTAL)
205#
206CONFIG_IPV6_SCTP__=y
207# CONFIG_IP_SCTP is not set
208# CONFIG_ATM is not set
209# CONFIG_VLAN_8021Q is not set
210# CONFIG_LLC2 is not set
211# CONFIG_IPX is not set
212# CONFIG_ATALK is not set
213# CONFIG_X25 is not set
214# CONFIG_LAPB is not set
215# CONFIG_NET_DIVERT is not set
216# CONFIG_ECONET is not set
217# CONFIG_WAN_ROUTER is not set
218# CONFIG_NET_HW_FLOWCONTROL is not set
219
220#
221# QoS and/or fair queueing
222#
223# CONFIG_NET_SCHED is not set
224
225#
226# Network testing
227#
228# CONFIG_NET_PKTGEN is not set
229CONFIG_NETDEVICES=y
230# CONFIG_DUMMY is not set
231# CONFIG_BONDING is not set
232# CONFIG_EQUALIZER is not set
233# CONFIG_TUN is not set
234
235#
236# Ethernet (10 or 100Mbit)
237#
238CONFIG_NET_ETHERNET=y
239CONFIG_MII=y
240CONFIG_OAKNET=y
241
242#
243# Ethernet (1000 Mbit)
244#
245
246#
247# Ethernet (10000 Mbit)
248#
249# CONFIG_PPP is not set
250# CONFIG_SLIP is not set
251
252#
253# Wireless LAN (non-hamradio)
254#
255# CONFIG_NET_RADIO is not set
256
257#
258# Token Ring devices
259#
260# CONFIG_SHAPER is not set
261
262#
263# Wan interfaces
264#
265# CONFIG_WAN is not set
266
267#
268# Amateur Radio support
269#
270# CONFIG_HAMRADIO is not set
271
272#
273# IrDA (infrared) support
274#
275# CONFIG_IRDA is not set
276
277#
278# Bluetooth support
279#
280# CONFIG_BT is not set
281
282#
283# ISDN subsystem
284#
285# CONFIG_ISDN_BOOL is not set
286
287#
288# Graphics support
289#
290# CONFIG_FB is not set
291
292#
293# Input device support
294#
295CONFIG_INPUT=y
296
297#
298# Userland interfaces
299#
300# CONFIG_INPUT_MOUSEDEV is not set
301# CONFIG_INPUT_JOYDEV is not set
302# CONFIG_INPUT_TSDEV is not set
303# CONFIG_INPUT_EVDEV is not set
304# CONFIG_INPUT_EVBUG is not set
305
306#
307# Input I/O drivers
308#
309# CONFIG_GAMEPORT is not set
310CONFIG_SOUND_GAMEPORT=y
311CONFIG_SERIO=y
312# CONFIG_SERIO_I8042 is not set
313# CONFIG_SERIO_SERPORT is not set
314# CONFIG_SERIO_CT82C710 is not set
315
316#
317# Input Device Drivers
318#
319# CONFIG_INPUT_KEYBOARD is not set
320# CONFIG_INPUT_MOUSE is not set
321# CONFIG_INPUT_JOYSTICK is not set
322# CONFIG_INPUT_TOUCHSCREEN is not set
323# CONFIG_INPUT_MISC is not set
324
325#
326# Macintosh device drivers
327#
328
329#
330# Character devices
331#
332# CONFIG_VT is not set
333# CONFIG_SERIAL_NONSTANDARD is not set
334
335#
336# Serial drivers
337#
338CONFIG_SERIAL_8250=y
339CONFIG_SERIAL_8250_CONSOLE=y
340CONFIG_SERIAL_8250_NR_UARTS=4
341# CONFIG_SERIAL_8250_EXTENDED is not set
342
343#
344# Non-8250 serial port support
345#
346CONFIG_SERIAL_CORE=y
347CONFIG_SERIAL_CORE_CONSOLE=y
348# CONFIG_UNIX98_PTYS is not set
349
350#
351# I2C support
352#
353CONFIG_I2C=y
354# CONFIG_I2C_CHARDEV is not set
355
356#
357# I2C Algorithms
358#
359# CONFIG_I2C_ALGOBIT is not set
360# CONFIG_I2C_ALGOPCF is not set
361
362#
363# I2C Hardware Bus support
364#
365# CONFIG_I2C_AMD756 is not set
366# CONFIG_I2C_AMD8111 is not set
367CONFIG_I2C_IBM_IIC=y
368
369#
370# I2C Hardware Sensors Chip support
371#
372# CONFIG_I2C_SENSOR is not set
373# CONFIG_SENSORS_ADM1021 is not set
374# CONFIG_SENSORS_EEPROM is not set
375# CONFIG_SENSORS_IT87 is not set
376# CONFIG_SENSORS_LM75 is not set
377# CONFIG_SENSORS_LM78 is not set
378# CONFIG_SENSORS_LM85 is not set
379# CONFIG_SENSORS_VIA686A is not set
380# CONFIG_SENSORS_W83781D is not set
381
382#
383# Mice
384#
385# CONFIG_BUSMOUSE is not set
386# CONFIG_QIC02_TAPE is not set
387
388#
389# IPMI
390#
391# CONFIG_IPMI_HANDLER is not set
392
393#
394# Watchdog Cards
395#
396# CONFIG_WATCHDOG is not set
397# CONFIG_NVRAM is not set
398CONFIG_GEN_RTC=y
399# CONFIG_GEN_RTC_X is not set
400# CONFIG_DTLK is not set
401# CONFIG_R3964 is not set
402# CONFIG_APPLICOM is not set
403
404#
405# Ftape, the floppy tape device driver
406#
407# CONFIG_FTAPE is not set
408# CONFIG_AGP is not set
409# CONFIG_DRM is not set
410# CONFIG_RAW_DRIVER is not set
411
412#
413# Multimedia devices
414#
415# CONFIG_VIDEO_DEV is not set
416
417#
418# Digital Video Broadcasting Devices
419#
420# CONFIG_DVB is not set
421
422#
423# File systems
424#
425CONFIG_EXT2_FS=y
426# CONFIG_EXT2_FS_XATTR is not set
427CONFIG_EXT3_FS=y
428CONFIG_EXT3_FS_XATTR=y
429# CONFIG_EXT3_FS_POSIX_ACL is not set
430# CONFIG_EXT3_FS_SECURITY is not set
431CONFIG_JBD=y
432# CONFIG_JBD_DEBUG is not set
433CONFIG_FS_MBCACHE=y
434# CONFIG_REISERFS_FS is not set
435# CONFIG_JFS_FS is not set
436# CONFIG_XFS_FS is not set
437# CONFIG_MINIX_FS is not set
438# CONFIG_ROMFS_FS is not set
439# CONFIG_QUOTA is not set
440# CONFIG_AUTOFS_FS is not set
441# CONFIG_AUTOFS4_FS is not set
442
443#
444# CD-ROM/DVD Filesystems
445#
446# CONFIG_ISO9660_FS is not set
447# CONFIG_UDF_FS is not set
448
449#
450# DOS/FAT/NT Filesystems
451#
452# CONFIG_FAT_FS is not set
453# CONFIG_NTFS_FS is not set
454
455#
456# Pseudo filesystems
457#
458CONFIG_PROC_FS=y
459CONFIG_PROC_KCORE=y
460# CONFIG_DEVFS_FS is not set
461CONFIG_TMPFS=y
462# CONFIG_HUGETLB_PAGE is not set
463CONFIG_RAMFS=y
464
465#
466# Miscellaneous filesystems
467#
468# CONFIG_ADFS_FS is not set
469# CONFIG_AFFS_FS is not set
470# CONFIG_HFS_FS is not set
471# CONFIG_BEFS_FS is not set
472# CONFIG_BFS_FS is not set
473# CONFIG_EFS_FS is not set
474# CONFIG_CRAMFS is not set
475# CONFIG_VXFS_FS is not set
476# CONFIG_HPFS_FS is not set
477# CONFIG_QNX4FS_FS is not set
478# CONFIG_SYSV_FS is not set
479# CONFIG_UFS_FS is not set
480
481#
482# Network File Systems
483#
484CONFIG_NFS_FS=y
485# CONFIG_NFS_V3 is not set
486# CONFIG_NFS_V4 is not set
487# CONFIG_NFSD is not set
488CONFIG_ROOT_NFS=y
489CONFIG_LOCKD=y
490# CONFIG_EXPORTFS is not set
491CONFIG_SUNRPC=y
492# CONFIG_SUNRPC_GSS is not set
493# CONFIG_SMB_FS is not set
494# CONFIG_CIFS is not set
495# CONFIG_NCP_FS is not set
496# CONFIG_CODA_FS is not set
497# CONFIG_INTERMEZZO_FS is not set
498# CONFIG_AFS_FS is not set
499
500#
501# Partition Types
502#
503# CONFIG_PARTITION_ADVANCED is not set
504CONFIG_MSDOS_PARTITION=y
505
506#
507# Sound
508#
509# CONFIG_SOUND is not set
510
511#
512# IBM 40x options
513#
514
515#
516# USB support
517#
518# CONFIG_USB_GADGET is not set
519
520#
521# Library routines
522#
523CONFIG_CRC32=y
524
525#
526# Kernel hacking
527#
528# CONFIG_DEBUG_KERNEL is not set
529CONFIG_SERIAL_TEXT_DEBUG=y
530CONFIG_OCP=y
531
532#
533# Security options
534#
535# CONFIG_SECURITY is not set
536
537#
538# Cryptographic options
539#
540# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index 468721d9ebd2..bd037caa4055 100644
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -249,8 +249,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
249 sync 249 sync
250 isync 250 isync
251 251
252 /* Enable L2 HW prefetch 252 /* Enable L2 HW prefetch, if L2 is enabled
253 */ 253 */
254 mfspr r3,SPRN_L2CR
255 andis. r3,r3,L2CR_L2E@h
256 beqlr
254 mfspr r3,SPRN_MSSCR0 257 mfspr r3,SPRN_MSSCR0
255 ori r3,r3,3 258 ori r3,r3,3
256 sync 259 sync
@@ -324,6 +327,7 @@ _GLOBAL(__save_cpu_setup)
324 cmplwi cr4,r3,0x8002 /* 7457 */ 327 cmplwi cr4,r3,0x8002 /* 7457 */
325 cmplwi cr5,r3,0x8003 /* 7447A */ 328 cmplwi cr5,r3,0x8003 /* 7447A */
326 cmplwi cr6,r3,0x7000 /* 750FX */ 329 cmplwi cr6,r3,0x7000 /* 750FX */
330 cmplwi cr7,r3,0x8004 /* 7448 */
327 /* cr1 is 7400 || 7410 */ 331 /* cr1 is 7400 || 7410 */
328 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq 332 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq
329 /* cr0 is 74xx */ 333 /* cr0 is 74xx */
@@ -331,6 +335,7 @@ _GLOBAL(__save_cpu_setup)
331 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq 335 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq
332 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 336 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
333 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq 337 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq
338 cror 4*cr0+eq,4*cr0+eq,4*cr7+eq
334 bne 1f 339 bne 1f
335 /* Backup 74xx specific regs */ 340 /* Backup 74xx specific regs */
336 mfspr r4,SPRN_MSSCR0 341 mfspr r4,SPRN_MSSCR0
@@ -393,6 +398,7 @@ _GLOBAL(__restore_cpu_setup)
393 cmplwi cr4,r3,0x8002 /* 7457 */ 398 cmplwi cr4,r3,0x8002 /* 7457 */
394 cmplwi cr5,r3,0x8003 /* 7447A */ 399 cmplwi cr5,r3,0x8003 /* 7447A */
395 cmplwi cr6,r3,0x7000 /* 750FX */ 400 cmplwi cr6,r3,0x7000 /* 750FX */
401 cmplwi cr7,r3,0x8004 /* 7448 */
396 /* cr1 is 7400 || 7410 */ 402 /* cr1 is 7400 || 7410 */
397 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq 403 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq
398 /* cr0 is 74xx */ 404 /* cr0 is 74xx */
@@ -400,6 +406,7 @@ _GLOBAL(__restore_cpu_setup)
400 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq 406 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq
401 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 407 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
402 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq 408 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq
409 cror 4*cr0+eq,4*cr0+eq,4*cr7+eq
403 bne 2f 410 bne 2f
404 /* Restore 74xx specific regs */ 411 /* Restore 74xx specific regs */
405 lwz r4,CS_MSSCR0(r5) 412 lwz r4,CS_MSSCR0(r5)
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 8a3d74f2531e..546e1ea4cafa 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -198,10 +198,10 @@ struct cpu_spec cpu_specs[] = {
198 .num_pmcs = 4, 198 .num_pmcs = 4,
199 .cpu_setup = __setup_cpu_750 199 .cpu_setup = __setup_cpu_750
200 }, 200 },
201 { /* 745/755 */ 201 { /* 750CX (80100 and 8010x?) */
202 .pvr_mask = 0xfffff000, 202 .pvr_mask = 0xfffffff0,
203 .pvr_value = 0x00083000, 203 .pvr_value = 0x00080100,
204 .cpu_name = "745/755", 204 .cpu_name = "750CX",
205 .cpu_features = CPU_FTR_COMMON | 205 .cpu_features = CPU_FTR_COMMON |
206 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 206 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
207 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | 207 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
@@ -210,11 +210,11 @@ struct cpu_spec cpu_specs[] = {
210 .icache_bsize = 32, 210 .icache_bsize = 32,
211 .dcache_bsize = 32, 211 .dcache_bsize = 32,
212 .num_pmcs = 4, 212 .num_pmcs = 4,
213 .cpu_setup = __setup_cpu_750 213 .cpu_setup = __setup_cpu_750cx
214 }, 214 },
215 { /* 750CX (80100 and 8010x?) */ 215 { /* 750CX (82201 and 82202) */
216 .pvr_mask = 0xfffffff0, 216 .pvr_mask = 0xfffffff0,
217 .pvr_value = 0x00080100, 217 .pvr_value = 0x00082200,
218 .cpu_name = "750CX", 218 .cpu_name = "750CX",
219 .cpu_features = CPU_FTR_COMMON | 219 .cpu_features = CPU_FTR_COMMON |
220 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 220 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
@@ -226,10 +226,10 @@ struct cpu_spec cpu_specs[] = {
226 .num_pmcs = 4, 226 .num_pmcs = 4,
227 .cpu_setup = __setup_cpu_750cx 227 .cpu_setup = __setup_cpu_750cx
228 }, 228 },
229 { /* 750CX (82201 and 82202) */ 229 { /* 750CXe (82214) */
230 .pvr_mask = 0xfffffff0, 230 .pvr_mask = 0xfffffff0,
231 .pvr_value = 0x00082200, 231 .pvr_value = 0x00082210,
232 .cpu_name = "750CX", 232 .cpu_name = "750CXe",
233 .cpu_features = CPU_FTR_COMMON | 233 .cpu_features = CPU_FTR_COMMON |
234 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 234 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
235 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | 235 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
@@ -240,9 +240,9 @@ struct cpu_spec cpu_specs[] = {
240 .num_pmcs = 4, 240 .num_pmcs = 4,
241 .cpu_setup = __setup_cpu_750cx 241 .cpu_setup = __setup_cpu_750cx
242 }, 242 },
243 { /* 750CXe (82214) */ 243 { /* 750CXe "Gekko" (83214) */
244 .pvr_mask = 0xfffffff0, 244 .pvr_mask = 0xffffffff,
245 .pvr_value = 0x00082210, 245 .pvr_value = 0x00083214,
246 .cpu_name = "750CXe", 246 .cpu_name = "750CXe",
247 .cpu_features = CPU_FTR_COMMON | 247 .cpu_features = CPU_FTR_COMMON |
248 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 248 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
@@ -254,6 +254,20 @@ struct cpu_spec cpu_specs[] = {
254 .num_pmcs = 4, 254 .num_pmcs = 4,
255 .cpu_setup = __setup_cpu_750cx 255 .cpu_setup = __setup_cpu_750cx
256 }, 256 },
257 { /* 745/755 */
258 .pvr_mask = 0xfffff000,
259 .pvr_value = 0x00083000,
260 .cpu_name = "745/755",
261 .cpu_features = CPU_FTR_COMMON |
262 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
263 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
264 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
265 .cpu_user_features = COMMON_PPC,
266 .icache_bsize = 32,
267 .dcache_bsize = 32,
268 .num_pmcs = 4,
269 .cpu_setup = __setup_cpu_750
270 },
257 { /* 750FX rev 1.x */ 271 { /* 750FX rev 1.x */
258 .pvr_mask = 0xffffff00, 272 .pvr_mask = 0xffffff00,
259 .pvr_value = 0x70000100, 273 .pvr_value = 0x70000100,
@@ -536,6 +550,22 @@ struct cpu_spec cpu_specs[] = {
536 .num_pmcs = 6, 550 .num_pmcs = 6,
537 .cpu_setup = __setup_cpu_745x 551 .cpu_setup = __setup_cpu_745x
538 }, 552 },
553 { /* 7448 */
554 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x80040000,
556 .cpu_name = "7448",
557 .cpu_features = CPU_FTR_COMMON |
558 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
559 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
560 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
561 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
562 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
563 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
564 .icache_bsize = 32,
565 .dcache_bsize = 32,
566 .num_pmcs = 6,
567 .cpu_setup = __setup_cpu_745x
568 },
539 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 569 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
540 .pvr_mask = 0x7fff0000, 570 .pvr_mask = 0x7fff0000,
541 .pvr_value = 0x00810000, 571 .pvr_value = 0x00810000,
@@ -922,6 +952,26 @@ struct cpu_spec cpu_specs[] = {
922 .icache_bsize = 32, 952 .icache_bsize = 32,
923 .dcache_bsize = 32, 953 .dcache_bsize = 32,
924 }, 954 },
955 { /* 440GX Rev. F */
956 .pvr_mask = 0xf0000fff,
957 .pvr_value = 0x50000894,
958 .cpu_name = "440GX Rev. F",
959 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
960 CPU_FTR_USE_TB,
961 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
962 .icache_bsize = 32,
963 .dcache_bsize = 32,
964 },
965 { /* 440SP Rev. A */
966 .pvr_mask = 0xff000fff,
967 .pvr_value = 0x53000891,
968 .cpu_name = "440SP Rev. A",
969 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
970 CPU_FTR_USE_TB,
971 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
972 .icache_bsize = 32,
973 .dcache_bsize = 32,
974 },
925#endif /* CONFIG_44x */ 975#endif /* CONFIG_44x */
926#ifdef CONFIG_FSL_BOOKE 976#ifdef CONFIG_FSL_BOOKE
927 { /* e200z5 */ 977 { /* e200z5 */
diff --git a/arch/ppc/kernel/find_name.c b/arch/ppc/kernel/find_name.c
deleted file mode 100644
index 3c0fa8e0c077..000000000000
--- a/arch/ppc/kernel/find_name.c
+++ /dev/null
@@ -1,48 +0,0 @@
1#include <stdio.h>
2#include <asm/page.h>
3#include <sys/mman.h>
4#include <strings.h>
5/*
6 * Finds a given address in the System.map and prints it out
7 * with its neighbors. -- Cort
8 */
9
10int main(int argc, char **argv)
11{
12 unsigned long addr, cmp, i;
13 FILE *f;
14 char s[256], last[256];
15
16 if ( argc < 2 )
17 {
18 fprintf(stderr, "Usage: %s <address>\n", argv[0]);
19 return -1;
20 }
21
22 for ( i = 1 ; argv[i] ; i++ )
23 {
24 sscanf( argv[i], "%0lx", &addr );
25 /* adjust if addr is relative to kernelbase */
26 if ( addr < PAGE_OFFSET )
27 addr += PAGE_OFFSET;
28
29 if ( (f = fopen( "System.map", "r" )) == NULL )
30 {
31 perror("fopen()\n");
32 exit(-1);
33 }
34
35 while ( !feof(f) )
36 {
37 fgets(s, 255 , f);
38 sscanf( s, "%0lx", &cmp );
39 if ( addr < cmp )
40 break;
41 strcpy( last, s);
42 }
43
44 printf( "%s%s", last, s );
45 }
46 fclose(f);
47 return 0;
48}
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 69ff3a9961e8..9e68e32edb60 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -462,7 +462,11 @@ interrupt_base:
462 462
463 /* Watchdog Timer Interrupt */ 463 /* Watchdog Timer Interrupt */
464 /* TODO: Add watchdog support */ 464 /* TODO: Add watchdog support */
465#ifdef CONFIG_BOOKE_WDT
466 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
467#else
465 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException) 468 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException)
469#endif
466 470
467 /* Data TLB Error Interrupt */ 471 /* Data TLB Error Interrupt */
468 START_EXCEPTION(DataTLBError) 472 START_EXCEPTION(DataTLBError)
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
index 23fb51819ba5..0a5e723d3be6 100644
--- a/arch/ppc/kernel/head_4xx.S
+++ b/arch/ppc/kernel/head_4xx.S
@@ -448,7 +448,9 @@ label:
448 448
449/* 0x1020 - Watchdog Timer (WDT) Exception 449/* 0x1020 - Watchdog Timer (WDT) Exception
450*/ 450*/
451 451#ifdef CONFIG_BOOKE_WDT
452 CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
453#else
452 CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException) 454 CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException)
453#endif 455#endif
454 456
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index eb804b7a3cb2..4028f4c7d978 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -564,8 +564,11 @@ interrupt_base:
564 EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE) 564 EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
565 565
566 /* Watchdog Timer Interrupt */ 566 /* Watchdog Timer Interrupt */
567 /* TODO: Add watchdog support */ 567#ifdef CONFIG_BOOKE_WDT
568 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
569#else
568 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException) 570 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
571#endif
569 572
570 /* Data TLB Error Interrupt */ 573 /* Data TLB Error Interrupt */
571 START_EXCEPTION(DataTLBError) 574 START_EXCEPTION(DataTLBError)
diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S
index c39441048266..861115249b35 100644
--- a/arch/ppc/kernel/l2cr.S
+++ b/arch/ppc/kernel/l2cr.S
@@ -156,6 +156,26 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
156 The bit moved on the 7450..... 156 The bit moved on the 7450.....
157 ****/ 157 ****/
158 158
159BEGIN_FTR_SECTION
160 /* Disable L2 prefetch on some 745x and try to ensure
161 * L2 prefetch engines are idle. As explained by errata
162 * text, we can't be sure they are, we just hope very hard
163 * that well be enough (sic !). At least I noticed Apple
164 * doesn't even bother doing the dcbf's here...
165 */
166 mfspr r4,SPRN_MSSCR0
167 rlwinm r4,r4,0,0,29
168 sync
169 mtspr SPRN_MSSCR0,r4
170 sync
171 isync
172 lis r4,KERNELBASE@h
173 dcbf 0,r4
174 dcbf 0,r4
175 dcbf 0,r4
176 dcbf 0,r4
177END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
178
159 /* TODO: use HW flush assist when available */ 179 /* TODO: use HW flush assist when available */
160 180
161 lis r4,0x0002 181 lis r4,0x0002
@@ -230,7 +250,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
230 oris r3,r3,0x8000 250 oris r3,r3,0x8000
231 mtspr SPRN_L2CR,r3 251 mtspr SPRN_L2CR,r3
232 sync 252 sync
233 253
254 /* Enable L2 HW prefetch on 744x/745x */
255BEGIN_FTR_SECTION
256 mfspr r3,SPRN_MSSCR0
257 ori r3,r3,3
258 sync
259 mtspr SPRN_MSSCR0,r3
260 sync
261 isync
262END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
2344: 2634:
235 264
236 /* Restore HID0[DPM] to whatever it was before */ 265 /* Restore HID0[DPM] to whatever it was before */
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index e7d40cc6c1b6..88f6bb7b6964 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -51,9 +51,6 @@
51#include <asm/commproc.h> 51#include <asm/commproc.h>
52#endif 52#endif
53 53
54/* Tell string.h we don't want memcpy etc. as cpp defines */
55#define EXPORT_SYMTAB_STROPS
56
57extern void transfer_to_handler(void); 54extern void transfer_to_handler(void);
58extern void do_IRQ(struct pt_regs *regs); 55extern void do_IRQ(struct pt_regs *regs);
59extern void MachineCheckException(struct pt_regs *regs); 56extern void MachineCheckException(struct pt_regs *regs);
@@ -263,6 +260,7 @@ EXPORT_SYMBOL(__ashrdi3);
263EXPORT_SYMBOL(__ashldi3); 260EXPORT_SYMBOL(__ashldi3);
264EXPORT_SYMBOL(__lshrdi3); 261EXPORT_SYMBOL(__lshrdi3);
265EXPORT_SYMBOL(memcpy); 262EXPORT_SYMBOL(memcpy);
263EXPORT_SYMBOL(cacheable_memcpy);
266EXPORT_SYMBOL(memset); 264EXPORT_SYMBOL(memset);
267EXPORT_SYMBOL(memmove); 265EXPORT_SYMBOL(memmove);
268EXPORT_SYMBOL(memscan); 266EXPORT_SYMBOL(memscan);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 929e5d1cc7fe..545cfd0fab59 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -41,7 +41,11 @@
41#include <asm/xmon.h> 41#include <asm/xmon.h>
42#include <asm/ocp.h> 42#include <asm/ocp.h>
43 43
44#if defined(CONFIG_85xx) || defined(CONFIG_83xx) || defined(CONFIG_MPC10X_BRIDGE) 44#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \
45 defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
46 defined(CONFIG_PPC_MPC52xx))
47
48#if USES_PPC_SYS
45#include <asm/ppc_sys.h> 49#include <asm/ppc_sys.h>
46#endif 50#endif
47 51
@@ -241,7 +245,7 @@ int show_cpuinfo(struct seq_file *m, void *v)
241 seq_printf(m, "bogomips\t: %lu.%02lu\n", 245 seq_printf(m, "bogomips\t: %lu.%02lu\n",
242 lpj / (500000/HZ), (lpj / (5000/HZ)) % 100); 246 lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);
243 247
244#if defined(CONFIG_85xx) || defined(CONFIG_83xx) || defined(CONFIG_MPC10X_BRIDGE) 248#if USES_PPC_SYS
245 if (cur_ppc_sys_spec->ppc_sys_name) 249 if (cur_ppc_sys_spec->ppc_sys_name)
246 seq_printf(m, "chipset\t\t: %s\n", 250 seq_printf(m, "chipset\t\t: %s\n",
247 cur_ppc_sys_spec->ppc_sys_name); 251 cur_ppc_sys_spec->ppc_sys_name);
@@ -615,6 +619,26 @@ machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
615 if (ppc_md.progress) 619 if (ppc_md.progress)
616 ppc_md.progress("id mach(): done", 0x200); 620 ppc_md.progress("id mach(): done", 0x200);
617} 621}
622#ifdef CONFIG_BOOKE_WDT
623/* Checks wdt=x and wdt_period=xx command-line option */
624int __init early_parse_wdt(char *p)
625{
626 if (p && strncmp(p, "0", 1) != 0)
627 booke_wdt_enabled = 1;
628
629 return 0;
630}
631early_param("wdt", early_parse_wdt);
632
633int __init early_parse_wdt_period (char *p)
634{
635 if (p)
636 booke_wdt_period = simple_strtoul(p, NULL, 0);
637
638 return 0;
639}
640early_param("wdt_period", early_parse_wdt_period);
641#endif /* CONFIG_BOOKE_WDT */
618 642
619/* Checks "l2cr=xxxx" command-line option */ 643/* Checks "l2cr=xxxx" command-line option */
620int __init ppc_setup_l2cr(char *str) 644int __init ppc_setup_l2cr(char *str)
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 9e6ae5696650..d87423d1003a 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -904,6 +904,25 @@ void SPEFloatingPointException(struct pt_regs *regs)
904} 904}
905#endif 905#endif
906 906
907#ifdef CONFIG_BOOKE_WDT
908/*
909 * Default handler for a Watchdog exception,
910 * spins until a reboot occurs
911 */
912void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
913{
914 /* Generic WatchdogHandler, implement your own */
915 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
916 return;
917}
918
919void WatchdogException(struct pt_regs *regs)
920{
921 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
922 WatchdogHandler(regs);
923}
924#endif
925
907void __init trap_init(void) 926void __init trap_init(void)
908{ 927{
909} 928}
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index 33ada72c7330..f421a4b337f6 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -560,9 +560,10 @@ void flush_dcache_page(struct page *page)
560void flush_dcache_icache_page(struct page *page) 560void flush_dcache_icache_page(struct page *page)
561{ 561{
562#ifdef CONFIG_BOOKE 562#ifdef CONFIG_BOOKE
563 __flush_dcache_icache(kmap(page)); 563 void *start = kmap_atomic(page, KM_PPC_SYNC_ICACHE);
564 kunmap(page); 564 __flush_dcache_icache(start);
565#elif CONFIG_8xx 565 kunmap_atomic(start, KM_PPC_SYNC_ICACHE);
566#elif defined(CONFIG_8xx)
566 /* On 8xx there is no need to kmap since highmem is not supported */ 567 /* On 8xx there is no need to kmap since highmem is not supported */
567 __flush_dcache_icache(page_address(page)); 568 __flush_dcache_icache(page_address(page));
568#else 569#else
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
index 805dd98908a3..76f4476cab44 100644
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -16,11 +16,6 @@ choice
16 depends on 40x 16 depends on 40x
17 default WALNUT 17 default WALNUT
18 18
19config ASH
20 bool "Ash"
21 help
22 This option enables support for the IBM NP405H evaluation board.
23
24config BUBINGA 19config BUBINGA
25 bool "Bubinga" 20 bool "Bubinga"
26 select WANT_EARLY_SERIAL 21 select WANT_EARLY_SERIAL
@@ -37,11 +32,6 @@ config EP405
37 help 32 help
38 This option enables support for the EP405/EP405PC boards. 33 This option enables support for the EP405/EP405PC boards.
39 34
40config OAK
41 bool "Oak"
42 help
43 This option enables support for the IBM 403GCX evaluation board.
44
45config REDWOOD_5 35config REDWOOD_5
46 bool "Redwood-5" 36 bool "Redwood-5"
47 help 37 help
@@ -152,13 +142,13 @@ config IBM440EP_ERR42
152# All 405-based cores up until the 405GPR and 405EP have this errata. 142# All 405-based cores up until the 405GPR and 405EP have this errata.
153config IBM405_ERR77 143config IBM405_ERR77
154 bool 144 bool
155 depends on 40x && !403GCX && !405GPR 145 depends on 40x && !403GCX && !405GPR && !405EP
156 default y 146 default y
157 147
158# All 40x-based cores, up until the 405GPR and 405EP have this errata. 148# All 40x-based cores, up until the 405GPR and 405EP have this errata.
159config IBM405_ERR51 149config IBM405_ERR51
160 bool 150 bool
161 depends on 40x && !405GPR 151 depends on 40x && !405GPR && !405EP
162 default y 152 default y
163 153
164config BOOKE 154config BOOKE
@@ -186,6 +176,7 @@ config BIOS_FIXUP
186 depends on BUBINGA || EP405 || SYCAMORE || WALNUT 176 depends on BUBINGA || EP405 || SYCAMORE || WALNUT
187 default y 177 default y
188 178
179# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
189config 403GCX 180config 403GCX
190 bool 181 bool
191 depends OAK 182 depends OAK
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
index 844c3b5066e8..1dd6d7fd6a9a 100644
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -1,14 +1,12 @@
1# 1#
2# Makefile for the PowerPC 4xx linux kernel. 2# Makefile for the PowerPC 4xx linux kernel.
3 3
4obj-$(CONFIG_ASH) += ash.o
5obj-$(CONFIG_BAMBOO) += bamboo.o 4obj-$(CONFIG_BAMBOO) += bamboo.o
6obj-$(CONFIG_CPCI405) += cpci405.o 5obj-$(CONFIG_CPCI405) += cpci405.o
7obj-$(CONFIG_EBONY) += ebony.o 6obj-$(CONFIG_EBONY) += ebony.o
8obj-$(CONFIG_EP405) += ep405.o 7obj-$(CONFIG_EP405) += ep405.o
9obj-$(CONFIG_BUBINGA) += bubinga.o 8obj-$(CONFIG_BUBINGA) += bubinga.o
10obj-$(CONFIG_LUAN) += luan.o 9obj-$(CONFIG_LUAN) += luan.o
11obj-$(CONFIG_OAK) += oak.o
12obj-$(CONFIG_OCOTEA) += ocotea.o 10obj-$(CONFIG_OCOTEA) += ocotea.o
13obj-$(CONFIG_REDWOOD_5) += redwood5.o 11obj-$(CONFIG_REDWOOD_5) += redwood5.o
14obj-$(CONFIG_REDWOOD_6) += redwood6.o 12obj-$(CONFIG_REDWOOD_6) += redwood6.o
diff --git a/arch/ppc/platforms/4xx/ash.c b/arch/ppc/platforms/4xx/ash.c
deleted file mode 100644
index ce2911793716..000000000000
--- a/arch/ppc/platforms/4xx/ash.c
+++ /dev/null
@@ -1,250 +0,0 @@
1/*
2 * arch/ppc/platforms/4xx/ash.c
3 *
4 * Support for the IBM NP405H ash eval board
5 *
6 * Author: Armin Kuster <akuster@mvista.com>
7 *
8 * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13#include <linux/config.h>
14#include <linux/init.h>
15#include <linux/pagemap.h>
16#include <linux/pci.h>
17
18#include <asm/machdep.h>
19#include <asm/pci-bridge.h>
20#include <asm/io.h>
21#include <asm/ocp.h>
22#include <asm/ibm_ocp_pci.h>
23#include <asm/todc.h>
24
25#ifdef DEBUG
26#define DBG(x...) printk(x)
27#else
28#define DBG(x...)
29#endif
30
31void *ash_rtc_base;
32
33/* Some IRQs unique to Walnut.
34 * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
35 */
36int __init
37ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
38{
39 static char pci_irq_table[][4] =
40 /*
41 * PCI IDSEL/INTPIN->INTLINE
42 * A B C D
43 */
44 {
45 {24, 24, 24, 24}, /* IDSEL 1 - PCI slot 1 */
46 {25, 25, 25, 25}, /* IDSEL 2 - PCI slot 2 */
47 {26, 26, 26, 26}, /* IDSEL 3 - PCI slot 3 */
48 {27, 27, 27, 27}, /* IDSEL 4 - PCI slot 4 */
49 };
50
51 const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
52 return PCI_IRQ_TABLE_LOOKUP;
53}
54
55void __init
56ash_setup_arch(void)
57{
58 ppc4xx_setup_arch();
59
60 ibm_ocp_set_emac(0, 3);
61
62#ifdef CONFIG_DEBUG_BRINGUP
63 int i;
64 printk("\n");
65 printk("machine\t: %s\n", PPC4xx_MACHINE_NAME);
66 printk("\n");
67 printk("bi_s_version\t %s\n", bip->bi_s_version);
68 printk("bi_r_version\t %s\n", bip->bi_r_version);
69 printk("bi_memsize\t 0x%8.8x\t %dMBytes\n", bip->bi_memsize,
70 bip->bi_memsize / (1024 * 1000));
71 for (i = 0; i < EMAC_NUMS; i++) {
72 printk("bi_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", i,
73 bip->bi_enetaddr[i][0], bip->bi_enetaddr[i][1],
74 bip->bi_enetaddr[i][2], bip->bi_enetaddr[i][3],
75 bip->bi_enetaddr[i][4], bip->bi_enetaddr[i][5]);
76 }
77 printk("bi_pci_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", 0,
78 bip->bi_pci_enetaddr[0], bip->bi_pci_enetaddr[1],
79 bip->bi_pci_enetaddr[2], bip->bi_pci_enetaddr[3],
80 bip->bi_pci_enetaddr[4], bip->bi_pci_enetaddr[5]);
81
82 printk("bi_intfreq\t 0x%8.8x\t clock:\t %dMhz\n",
83 bip->bi_intfreq, bip->bi_intfreq / 1000000);
84
85 printk("bi_busfreq\t 0x%8.8x\t plb bus clock:\t %dMHz\n",
86 bip->bi_busfreq, bip->bi_busfreq / 1000000);
87 printk("bi_pci_busfreq\t 0x%8.8x\t pci bus clock:\t %dMHz\n",
88 bip->bi_pci_busfreq, bip->bi_pci_busfreq / 1000000);
89
90 printk("\n");
91#endif
92 /* RTC step for ash */
93 ash_rtc_base = (void *) ASH_RTC_VADDR;
94 TODC_INIT(TODC_TYPE_DS1743, ash_rtc_base, ash_rtc_base, ash_rtc_base,
95 8);
96}
97
98void __init
99bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
100{
101 /*
102 * Expected PCI mapping:
103 *
104 * PLB addr PCI memory addr
105 * --------------------- ---------------------
106 * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
107 * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
108 *
109 * PLB addr PCI io addr
110 * --------------------- ---------------------
111 * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
112 *
113 * The following code is simplified by assuming that the bootrom
114 * has been well behaved in following this mapping.
115 */
116
117#ifdef DEBUG
118 int i;
119
120 printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
121 printk("PCI bridge regs before fixup \n");
122 for (i = 0; i <= 2; i++) {
123 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
124 printk(" pmm%dla\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
125 printk(" pmm%dpcila\t0x%x\n", i,
126 in_le32(&(pcip->pmm[i].pcila)));
127 printk(" pmm%dpciha\t0x%x\n", i,
128 in_le32(&(pcip->pmm[i].pciha)));
129 }
130 printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
131 printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
132 printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
133 printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
134 for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
135 early_read_config_dword(hose, hose->first_busno,
136 PCI_FUNC(hose->first_busno), bar,
137 &bar_response);
138 DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
139 hose->first_busno, PCI_SLOT(hose->first_busno),
140 PCI_FUNC(hose->first_busno), bar, bar_response);
141 }
142
143#endif
144 if (ppc_md.progress)
145 ppc_md.progress("bios_fixup(): enter", 0x800);
146
147 /* added for IBM boot rom version 1.15 bios bar changes -AK */
148
149 /* Disable region first */
150 out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
151 /* PLB starting addr, PCI: 0x80000000 */
152 out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
153 /* PCI start addr, 0x80000000 */
154 out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
155 /* 512MB range of PLB to PCI */
156 out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
157 /* Enable no pre-fetch, enable region */
158 out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
159 (PPC405_PCI_UPPER_MEM -
160 PPC405_PCI_MEM_BASE)) | 0x01));
161
162 /* Disable region one */
163 out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
164 out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
165 out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
166 out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
167 out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
168
169 /* Disable region two */
170 out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
171 out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
172 out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
173 out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
174 out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
175
176 /* Enable PTM1 and PTM2, mapped to PLB address 0. */
177
178 out_le32((void *) &(pcip->ptm1la), 0x00000000);
179 out_le32((void *) &(pcip->ptm1ms), 0x00000001);
180 out_le32((void *) &(pcip->ptm2la), 0x00000000);
181 out_le32((void *) &(pcip->ptm2ms), 0x00000001);
182
183 /* Write zero to PTM1 BAR. */
184
185 early_write_config_dword(hose, hose->first_busno,
186 PCI_FUNC(hose->first_busno),
187 PCI_BASE_ADDRESS_1,
188 0x00000000);
189
190 /* Disable PTM2 (unused) */
191
192 out_le32((void *) &(pcip->ptm2la), 0x00000000);
193 out_le32((void *) &(pcip->ptm2ms), 0x00000000);
194
195 /* end work arround */
196 if (ppc_md.progress)
197 ppc_md.progress("bios_fixup(): done", 0x800);
198
199#ifdef DEBUG
200 printk("PCI bridge regs after fixup \n");
201 for (i = 0; i <= 2; i++) {
202 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
203 printk(" pmm%dla\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
204 printk(" pmm%dpcila\t0x%x\n", i,
205 in_le32(&(pcip->pmm[i].pcila)));
206 printk(" pmm%dpciha\t0x%x\n", i,
207 in_le32(&(pcip->pmm[i].pciha)));
208 }
209 printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
210 printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
211 printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
212 printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
213
214 for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
215 early_read_config_dword(hose, hose->first_busno,
216 PCI_FUNC(hose->first_busno), bar,
217 &bar_response);
218 DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
219 hose->first_busno, PCI_SLOT(hose->first_busno),
220 PCI_FUNC(hose->first_busno), bar, bar_response);
221 }
222
223
224#endif
225}
226
227void __init
228ash_map_io(void)
229{
230 ppc4xx_map_io();
231 io_block_mapping(ASH_RTC_VADDR, ASH_RTC_PADDR, ASH_RTC_SIZE, _PAGE_IO);
232}
233
234void __init
235platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
236 unsigned long r6, unsigned long r7)
237{
238 ppc4xx_init(r3, r4, r5, r6, r7);
239
240 ppc_md.setup_arch = ash_setup_arch;
241 ppc_md.setup_io_mappings = ash_map_io;
242
243#ifdef CONFIG_PPC_RTC
244 ppc_md.time_init = todc_time_init;
245 ppc_md.set_rtc_time = todc_set_rtc_time;
246 ppc_md.get_rtc_time = todc_get_rtc_time;
247 ppc_md.nvram_read_val = todc_direct_read_val;
248 ppc_md.nvram_write_val = todc_direct_write_val;
249#endif
250}
diff --git a/arch/ppc/platforms/4xx/ash.h b/arch/ppc/platforms/4xx/ash.h
deleted file mode 100644
index 5f7448ea418d..000000000000
--- a/arch/ppc/platforms/4xx/ash.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * arch/ppc/platforms/4xx/ash.h
3 *
4 * Macros, definitions, and data structures specific to the IBM PowerPC
5 * Ash eval board.
6 *
7 * Author: Armin Kuster <akuster@mvista.com>
8 *
9 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14
15#ifdef __KERNEL__
16#ifndef __ASM_ASH_H__
17#define __ASM_ASH_H__
18#include <platforms/4xx/ibmnp405h.h>
19
20#ifndef __ASSEMBLY__
21/*
22 * Data structure defining board information maintained by the boot
23 * ROM on IBM's "Ash" evaluation board. An effort has been made to
24 * keep the field names consistent with the 8xx 'bd_t' board info
25 * structures.
26 */
27
28typedef struct board_info {
29 unsigned char bi_s_version[4]; /* Version of this structure */
30 unsigned char bi_r_version[30]; /* Version of the IBM ROM */
31 unsigned int bi_memsize; /* DRAM installed, in bytes */
32 unsigned char bi_enetaddr[4][6]; /* Local Ethernet MAC address */
33 unsigned char bi_pci_enetaddr[6];
34 unsigned int bi_intfreq; /* Processor speed, in Hz */
35 unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
36 unsigned int bi_pci_busfreq; /* PCI speed in Hz */
37} bd_t;
38
39/* Some 4xx parts use a different timebase frequency from the internal clock.
40*/
41#define bi_tbfreq bi_intfreq
42
43/* Memory map for the IBM "Ash" NP405H evaluation board.
44 */
45
46extern void *ash_rtc_base;
47#define ASH_RTC_PADDR ((uint)0xf0000000)
48#define ASH_RTC_VADDR ASH_RTC_PADDR
49#define ASH_RTC_SIZE ((uint)8*1024)
50
51
52/* Early initialization address mapping for block_io.
53 * Standard 405GP map.
54 */
55#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
56#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
57#define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
58#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
59#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
60#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
61#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
62#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
63#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
64#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
65#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
66#define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
67
68#define NR_BOARD_IRQS 32
69
70#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
71#define BASE_BAUD 201600
72#else
73#define BASE_BAUD 691200
74#endif
75
76#define PPC4xx_MACHINE_NAME "IBM NP405H Ash"
77
78extern char pci_irq_table[][4];
79
80
81#endif /* !__ASSEMBLY__ */
82#endif /* __ASM_ASH_H__ */
83#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c
index f116787b0b76..ac391d463d78 100644
--- a/arch/ppc/platforms/4xx/bamboo.c
+++ b/arch/ppc/platforms/4xx/bamboo.c
@@ -52,13 +52,6 @@
52#include <syslib/gen550.h> 52#include <syslib/gen550.h>
53#include <syslib/ibm440gx_common.h> 53#include <syslib/ibm440gx_common.h>
54 54
55/*
56 * This is a horrible kludge, we eventually need to abstract this
57 * generic PHY stuff, so the standard phy mode defines can be
58 * easily used from arch code.
59 */
60#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h"
61
62bd_t __res; 55bd_t __res;
63 56
64static struct ibm44x_clocks clocks __initdata; 57static struct ibm44x_clocks clocks __initdata;
@@ -123,33 +116,69 @@ bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
123 116
124static void __init bamboo_set_emacdata(void) 117static void __init bamboo_set_emacdata(void)
125{ 118{
126 unsigned char * selection1_base; 119 u8 * base_addr;
127 struct ocp_def *def; 120 struct ocp_def *def;
128 struct ocp_func_emac_data *emacdata; 121 struct ocp_func_emac_data *emacdata;
129 u8 selection1_val; 122 u8 val;
130 int mode; 123 int mode;
124 u32 excluded = 0;
131 125
132 selection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16); 126 base_addr = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
133 selection1_val = readb(selection1_base); 127 val = readb(base_addr);
134 iounmap((void *) selection1_base); 128 iounmap((void *) base_addr);
135 if (BAMBOO_SEL_MII(selection1_val)) 129 if (BAMBOO_SEL_MII(val))
136 mode = PHY_MODE_MII; 130 mode = PHY_MODE_MII;
137 else if (BAMBOO_SEL_RMII(selection1_val)) 131 else if (BAMBOO_SEL_RMII(val))
138 mode = PHY_MODE_RMII; 132 mode = PHY_MODE_RMII;
139 else 133 else
140 mode = PHY_MODE_SMII; 134 mode = PHY_MODE_SMII;
141 135
142 /* Set mac_addr and phy mode for each EMAC */ 136 /*
137 * SW2 on the Bamboo is used for ethernet configuration and is accessed
138 * via the CONFIG2 register in the FPGA. If the ANEG pin is set,
139 * overwrite the supported features with the settings in SW2.
140 *
141 * This is used as a workaround for the improperly biased RJ-45 sockets
142 * on the Rev. 0 Bamboo. By default only 10baseT is functional.
143 * Removing inductors L17 and L18 from the board allows 100baseT, but
144 * disables 10baseT. The Rev. 1 has no such limitations.
145 */
146
147 base_addr = ioremap64(BAMBOO_FPGA_CONFIG2_REG_ADDR, 8);
148 val = readb(base_addr);
149 iounmap((void *) base_addr);
150 if (!BAMBOO_AUTONEGOTIATE(val)) {
151 excluded |= SUPPORTED_Autoneg;
152 if (BAMBOO_FORCE_100Mbps(val)) {
153 excluded |= SUPPORTED_10baseT_Full;
154 excluded |= SUPPORTED_10baseT_Half;
155 if (BAMBOO_FULL_DUPLEX_EN(val))
156 excluded |= SUPPORTED_100baseT_Half;
157 else
158 excluded |= SUPPORTED_100baseT_Full;
159 } else {
160 excluded |= SUPPORTED_100baseT_Full;
161 excluded |= SUPPORTED_100baseT_Half;
162 if (BAMBOO_FULL_DUPLEX_EN(val))
163 excluded |= SUPPORTED_10baseT_Half;
164 else
165 excluded |= SUPPORTED_10baseT_Full;
166 }
167 }
168
169 /* Set mac_addr, phy mode and unsupported phy features for each EMAC */
143 170
144 def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); 171 def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
145 emacdata = def->additions; 172 emacdata = def->additions;
146 memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); 173 memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
147 emacdata->phy_mode = mode; 174 emacdata->phy_mode = mode;
175 emacdata->phy_feat_exc = excluded;
148 176
149 def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1); 177 def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
150 emacdata = def->additions; 178 emacdata = def->additions;
151 memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); 179 memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
152 emacdata->phy_mode = mode; 180 emacdata->phy_mode = mode;
181 emacdata->phy_feat_exc = excluded;
153} 182}
154 183
155static int 184static int
diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h
index 63d714504148..5c0192826494 100644
--- a/arch/ppc/platforms/4xx/bamboo.h
+++ b/arch/ppc/platforms/4xx/bamboo.h
@@ -88,7 +88,7 @@
88#define STD_UART_OP(num) \ 88#define STD_UART_OP(num) \
89 { 0, BASE_BAUD, 0, UART##num##_INT, \ 89 { 0, BASE_BAUD, 0, UART##num##_INT, \
90 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ 90 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
91 iomem_base: UART##num##_IO_BASE, \ 91 iomem_base: (void*)UART##num##_IO_BASE, \
92 io_type: SERIAL_IO_MEM}, 92 io_type: SERIAL_IO_MEM},
93 93
94#define SERIAL_PORT_DFNS \ 94#define SERIAL_PORT_DFNS \
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index 509e69a095f0..0fd3442f5131 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -55,13 +55,6 @@
55#include <syslib/gen550.h> 55#include <syslib/gen550.h>
56#include <syslib/ibm440gp_common.h> 56#include <syslib/ibm440gp_common.h>
57 57
58/*
59 * This is a horrible kludge, we eventually need to abstract this
60 * generic PHY stuff, so the standard phy mode defines can be
61 * easily used from arch code.
62 */
63#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h"
64
65bd_t __res; 58bd_t __res;
66 59
67static struct ibm44x_clocks clocks __initdata; 60static struct ibm44x_clocks clocks __initdata;
diff --git a/arch/ppc/platforms/4xx/ibm405ep.c b/arch/ppc/platforms/4xx/ibm405ep.c
index 6d44567f4dd2..093b28d27a41 100644
--- a/arch/ppc/platforms/4xx/ibm405ep.c
+++ b/arch/ppc/platforms/4xx/ibm405ep.c
@@ -33,6 +33,7 @@ static struct ocp_func_mal_data ibm405ep_mal0_def = {
33 .txde_irq = 13, /* TX Descriptor Error IRQ */ 33 .txde_irq = 13, /* TX Descriptor Error IRQ */
34 .rxde_irq = 14, /* RX Descriptor Error IRQ */ 34 .rxde_irq = 14, /* RX Descriptor Error IRQ */
35 .serr_irq = 10, /* MAL System Error IRQ */ 35 .serr_irq = 10, /* MAL System Error IRQ */
36 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
36}; 37};
37OCP_SYSFS_MAL_DATA() 38OCP_SYSFS_MAL_DATA()
38 39
diff --git a/arch/ppc/platforms/4xx/ibm405gp.c b/arch/ppc/platforms/4xx/ibm405gp.c
index dfd7ef3ba5f8..e5700469a682 100644
--- a/arch/ppc/platforms/4xx/ibm405gp.c
+++ b/arch/ppc/platforms/4xx/ibm405gp.c
@@ -46,6 +46,7 @@ static struct ocp_func_mal_data ibm405gp_mal0_def = {
46 .txde_irq = 13, /* TX Descriptor Error IRQ */ 46 .txde_irq = 13, /* TX Descriptor Error IRQ */
47 .rxde_irq = 14, /* RX Descriptor Error IRQ */ 47 .rxde_irq = 14, /* RX Descriptor Error IRQ */
48 .serr_irq = 10, /* MAL System Error IRQ */ 48 .serr_irq = 10, /* MAL System Error IRQ */
49 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
49}; 50};
50OCP_SYSFS_MAL_DATA() 51OCP_SYSFS_MAL_DATA()
51 52
diff --git a/arch/ppc/platforms/4xx/ibm405gpr.c b/arch/ppc/platforms/4xx/ibm405gpr.c
index 01c8ccbc7214..cd0d00d8e8ee 100644
--- a/arch/ppc/platforms/4xx/ibm405gpr.c
+++ b/arch/ppc/platforms/4xx/ibm405gpr.c
@@ -42,6 +42,7 @@ static struct ocp_func_mal_data ibm405gpr_mal0_def = {
42 .txde_irq = 13, /* TX Descriptor Error IRQ */ 42 .txde_irq = 13, /* TX Descriptor Error IRQ */
43 .rxde_irq = 14, /* RX Descriptor Error IRQ */ 43 .rxde_irq = 14, /* RX Descriptor Error IRQ */
44 .serr_irq = 10, /* MAL System Error IRQ */ 44 .serr_irq = 10, /* MAL System Error IRQ */
45 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
45}; 46};
46OCP_SYSFS_MAL_DATA() 47OCP_SYSFS_MAL_DATA()
47 48
diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c
index 284da01f1ffd..4712de8ff80f 100644
--- a/arch/ppc/platforms/4xx/ibm440ep.c
+++ b/arch/ppc/platforms/4xx/ibm440ep.c
@@ -53,6 +53,7 @@ static struct ocp_func_mal_data ibm440ep_mal0_def = {
53 .txde_irq = 33, /* TX Descriptor Error IRQ */ 53 .txde_irq = 33, /* TX Descriptor Error IRQ */
54 .rxde_irq = 34, /* RX Descriptor Error IRQ */ 54 .rxde_irq = 34, /* RX Descriptor Error IRQ */
55 .serr_irq = 32, /* MAL System Error IRQ */ 55 .serr_irq = 32, /* MAL System Error IRQ */
56 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
56}; 57};
57OCP_SYSFS_MAL_DATA() 58OCP_SYSFS_MAL_DATA()
58 59
diff --git a/arch/ppc/platforms/4xx/ibm440gp.c b/arch/ppc/platforms/4xx/ibm440gp.c
index 27615ef8309c..d926245e8b3e 100644
--- a/arch/ppc/platforms/4xx/ibm440gp.c
+++ b/arch/ppc/platforms/4xx/ibm440gp.c
@@ -56,6 +56,7 @@ static struct ocp_func_mal_data ibm440gp_mal0_def = {
56 .txde_irq = 33, /* TX Descriptor Error IRQ */ 56 .txde_irq = 33, /* TX Descriptor Error IRQ */
57 .rxde_irq = 34, /* RX Descriptor Error IRQ */ 57 .rxde_irq = 34, /* RX Descriptor Error IRQ */
58 .serr_irq = 32, /* MAL System Error IRQ */ 58 .serr_irq = 32, /* MAL System Error IRQ */
59 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
59}; 60};
60OCP_SYSFS_MAL_DATA() 61OCP_SYSFS_MAL_DATA()
61 62
diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c
index 1f38f42835b4..956f45e4ef97 100644
--- a/arch/ppc/platforms/4xx/ibm440gx.c
+++ b/arch/ppc/platforms/4xx/ibm440gx.c
@@ -84,6 +84,7 @@ static struct ocp_func_mal_data ibm440gx_mal0_def = {
84 .txde_irq = 33, /* TX Descriptor Error IRQ */ 84 .txde_irq = 33, /* TX Descriptor Error IRQ */
85 .rxde_irq = 34, /* RX Descriptor Error IRQ */ 85 .rxde_irq = 34, /* RX Descriptor Error IRQ */
86 .serr_irq = 32, /* MAL System Error IRQ */ 86 .serr_irq = 32, /* MAL System Error IRQ */
87 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
87}; 88};
88OCP_SYSFS_MAL_DATA() 89OCP_SYSFS_MAL_DATA()
89 90
diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c
index fa3e003a0db9..feb17e41ef69 100644
--- a/arch/ppc/platforms/4xx/ibm440sp.c
+++ b/arch/ppc/platforms/4xx/ibm440sp.c
@@ -43,6 +43,7 @@ static struct ocp_func_mal_data ibm440sp_mal0_def = {
43 .txde_irq = 34, /* TX Descriptor Error IRQ */ 43 .txde_irq = 34, /* TX Descriptor Error IRQ */
44 .rxde_irq = 35, /* RX Descriptor Error IRQ */ 44 .rxde_irq = 35, /* RX Descriptor Error IRQ */
45 .serr_irq = 33, /* MAL System Error IRQ */ 45 .serr_irq = 33, /* MAL System Error IRQ */
46 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
46}; 47};
47OCP_SYSFS_MAL_DATA() 48OCP_SYSFS_MAL_DATA()
48 49
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c
index ecdc5be6ae28..a477a78f4902 100644
--- a/arch/ppc/platforms/4xx/ibmnp405h.c
+++ b/arch/ppc/platforms/4xx/ibmnp405h.c
@@ -34,7 +34,7 @@ static struct ocp_func_emac_data ibmnp405h_emac1_def = {
34 .zmii_mux = 1, /* ZMII input of this EMAC */ 34 .zmii_mux = 1, /* ZMII input of this EMAC */
35 .mal_idx = 0, /* MAL device index */ 35 .mal_idx = 0, /* MAL device index */
36 .mal_rx_chan = 1, /* MAL rx channel number */ 36 .mal_rx_chan = 1, /* MAL rx channel number */
37 .mal_tx_chan = 1, /* MAL tx channel number */ 37 .mal_tx_chan = 2, /* MAL tx channel number */
38 .wol_irq = 41, /* WOL interrupt number */ 38 .wol_irq = 41, /* WOL interrupt number */
39 .mdio_idx = -1, /* No shared MDIO */ 39 .mdio_idx = -1, /* No shared MDIO */
40 .tah_idx = -1, /* No TAH */ 40 .tah_idx = -1, /* No TAH */
@@ -46,7 +46,7 @@ static struct ocp_func_emac_data ibmnp405h_emac2_def = {
46 .zmii_mux = 2, /* ZMII input of this EMAC */ 46 .zmii_mux = 2, /* ZMII input of this EMAC */
47 .mal_idx = 0, /* MAL device index */ 47 .mal_idx = 0, /* MAL device index */
48 .mal_rx_chan = 2, /* MAL rx channel number */ 48 .mal_rx_chan = 2, /* MAL rx channel number */
49 .mal_tx_chan = 2, /* MAL tx channel number */ 49 .mal_tx_chan = 4, /* MAL tx channel number */
50 .wol_irq = 41, /* WOL interrupt number */ 50 .wol_irq = 41, /* WOL interrupt number */
51 .mdio_idx = -1, /* No shared MDIO */ 51 .mdio_idx = -1, /* No shared MDIO */
52 .tah_idx = -1, /* No TAH */ 52 .tah_idx = -1, /* No TAH */
@@ -58,7 +58,7 @@ static struct ocp_func_emac_data ibmnp405h_emac3_def = {
58 .zmii_mux = 3, /* ZMII input of this EMAC */ 58 .zmii_mux = 3, /* ZMII input of this EMAC */
59 .mal_idx = 0, /* MAL device index */ 59 .mal_idx = 0, /* MAL device index */
60 .mal_rx_chan = 3, /* MAL rx channel number */ 60 .mal_rx_chan = 3, /* MAL rx channel number */
61 .mal_tx_chan = 3, /* MAL tx channel number */ 61 .mal_tx_chan = 6, /* MAL tx channel number */
62 .wol_irq = 41, /* WOL interrupt number */ 62 .wol_irq = 41, /* WOL interrupt number */
63 .mdio_idx = -1, /* No shared MDIO */ 63 .mdio_idx = -1, /* No shared MDIO */
64 .tah_idx = -1, /* No TAH */ 64 .tah_idx = -1, /* No TAH */
@@ -73,6 +73,7 @@ static struct ocp_func_mal_data ibmnp405h_mal0_def = {
73 .txde_irq = 46, /* TX Descriptor Error IRQ */ 73 .txde_irq = 46, /* TX Descriptor Error IRQ */
74 .rxde_irq = 47, /* RX Descriptor Error IRQ */ 74 .rxde_irq = 47, /* RX Descriptor Error IRQ */
75 .serr_irq = 45, /* MAL System Error IRQ */ 75 .serr_irq = 45, /* MAL System Error IRQ */
76 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
76}; 77};
77OCP_SYSFS_MAL_DATA() 78OCP_SYSFS_MAL_DATA()
78 79
diff --git a/arch/ppc/platforms/4xx/ibmstb4.c b/arch/ppc/platforms/4xx/ibmstb4.c
index 874d16bab73c..d90627b68faa 100644
--- a/arch/ppc/platforms/4xx/ibmstb4.c
+++ b/arch/ppc/platforms/4xx/ibmstb4.c
@@ -11,6 +11,7 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/ocp.h> 13#include <asm/ocp.h>
14#include <asm/ppc4xx_pic.h>
14#include <platforms/4xx/ibmstb4.h> 15#include <platforms/4xx/ibmstb4.h>
15 16
16static struct ocp_func_iic_data ibmstb4_iic0_def = { 17static struct ocp_func_iic_data ibmstb4_iic0_def = {
@@ -72,12 +73,51 @@ struct ocp_def core_ocp[] __initdata = {
72 .irq = IDE0_IRQ, 73 .irq = IDE0_IRQ,
73 .pm = OCP_CPM_NA, 74 .pm = OCP_CPM_NA,
74 }, 75 },
75 { .vendor = OCP_VENDOR_IBM,
76 .function = OCP_FUNC_USB,
77 .paddr = USB0_BASE,
78 .irq = USB0_IRQ,
79 .pm = OCP_CPM_NA,
80 },
81 { .vendor = OCP_VENDOR_INVALID, 76 { .vendor = OCP_VENDOR_INVALID,
82 } 77 }
83}; 78};
79
80/* Polarity and triggering settings for internal interrupt sources */
81struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
82 { .polarity = 0x7fffff01,
83 .triggering = 0x00000000,
84 .ext_irq_mask = 0x0000007e, /* IRQ0 - IRQ5 */
85 }
86};
87
88static struct resource ohci_usb_resources[] = {
89 [0] = {
90 .start = USB0_BASE,
91 .end = USB0_BASE + USB0_SIZE - 1,
92 .flags = IORESOURCE_MEM,
93 },
94 [1] = {
95 .start = USB0_IRQ,
96 .end = USB0_IRQ,
97 .flags = IORESOURCE_IRQ,
98 },
99};
100
101static u64 dma_mask = 0xffffffffULL;
102
103static struct platform_device ohci_usb_device = {
104 .name = "ppc-soc-ohci",
105 .id = 0,
106 .num_resources = ARRAY_SIZE(ohci_usb_resources),
107 .resource = ohci_usb_resources,
108 .dev = {
109 .dma_mask = &dma_mask,
110 .coherent_dma_mask = 0xffffffffULL,
111 }
112};
113
114static struct platform_device *ibmstb4_devs[] __initdata = {
115 &ohci_usb_device,
116};
117
118static int __init
119ibmstb4_platform_add_devices(void)
120{
121 return platform_add_devices(ibmstb4_devs, ARRAY_SIZE(ibmstb4_devs));
122}
123arch_initcall(ibmstb4_platform_add_devices);
diff --git a/arch/ppc/platforms/4xx/ibmstb4.h b/arch/ppc/platforms/4xx/ibmstb4.h
index bcb4b1ee71f2..9f21d4c88a3d 100644
--- a/arch/ppc/platforms/4xx/ibmstb4.h
+++ b/arch/ppc/platforms/4xx/ibmstb4.h
@@ -73,9 +73,9 @@
73#define OPB0_BASE 0x40000000 73#define OPB0_BASE 0x40000000
74#define GPIO0_BASE 0x40060000 74#define GPIO0_BASE 0x40060000
75 75
76#define USB0_BASE 0x40010000
77#define USB0_SIZE 0xA0
76#define USB0_IRQ 18 78#define USB0_IRQ 18
77#define USB0_BASE STB04xxx_MAP_IO_ADDR(0x40010000)
78#define USB0_EXTENT 4096
79 79
80#define IIC_NUMS 2 80#define IIC_NUMS 2
81#define UART_NUMS 3 81#define UART_NUMS 3
diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c
index 95359f748e7b..a38e6f9ef858 100644
--- a/arch/ppc/platforms/4xx/luan.c
+++ b/arch/ppc/platforms/4xx/luan.c
@@ -53,13 +53,6 @@
53#include <syslib/ibm440gx_common.h> 53#include <syslib/ibm440gx_common.h>
54#include <syslib/ibm440sp_common.h> 54#include <syslib/ibm440sp_common.h>
55 55
56/*
57 * This is a horrible kludge, we eventually need to abstract this
58 * generic PHY stuff, so the standard phy mode defines can be
59 * easily used from arch code.
60 */
61#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h"
62
63bd_t __res; 56bd_t __res;
64 57
65static struct ibm44x_clocks clocks __initdata; 58static struct ibm44x_clocks clocks __initdata;
diff --git a/arch/ppc/platforms/4xx/luan.h b/arch/ppc/platforms/4xx/luan.h
index 09b444c87816..bbe7d0766db8 100644
--- a/arch/ppc/platforms/4xx/luan.h
+++ b/arch/ppc/platforms/4xx/luan.h
@@ -55,7 +55,7 @@
55#define STD_UART_OP(num) \ 55#define STD_UART_OP(num) \
56 { 0, BASE_BAUD, 0, UART##num##_INT, \ 56 { 0, BASE_BAUD, 0, UART##num##_INT, \
57 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ 57 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
58 iomem_base: UART##num##_IO_BASE, \ 58 iomem_base: (void*)UART##num##_IO_BASE, \
59 io_type: SERIAL_IO_MEM}, 59 io_type: SERIAL_IO_MEM},
60 60
61#define SERIAL_PORT_DFNS \ 61#define SERIAL_PORT_DFNS \
diff --git a/arch/ppc/platforms/4xx/oak.c b/arch/ppc/platforms/4xx/oak.c
deleted file mode 100644
index fa25ee1fa733..000000000000
--- a/arch/ppc/platforms/4xx/oak.c
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 *
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Module name: oak.c
6 *
7 * Description:
8 * Architecture- / platform-specific boot-time initialization code for
9 * the IBM PowerPC 403GCX "Oak" evaluation board. Adapted from original
10 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
11 * <dan@net4x.com>.
12 *
13 */
14
15#include <linux/config.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/threads.h>
19#include <linux/param.h>
20#include <linux/string.h>
21#include <linux/initrd.h>
22#include <linux/irq.h>
23#include <linux/seq_file.h>
24
25#include <asm/board.h>
26#include <asm/machdep.h>
27#include <asm/page.h>
28#include <asm/bootinfo.h>
29#include <asm/ppc4xx_pic.h>
30#include <asm/time.h>
31
32#include "oak.h"
33
34/* Function Prototypes */
35
36extern void abort(void);
37
38/* Global Variables */
39
40unsigned char __res[sizeof(bd_t)];
41
42
43/*
44 * void __init oak_init()
45 *
46 * Description:
47 * This routine...
48 *
49 * Input(s):
50 * r3 - Optional pointer to a board information structure.
51 * r4 - Optional pointer to the physical starting address of the init RAM
52 * disk.
53 * r5 - Optional pointer to the physical ending address of the init RAM
54 * disk.
55 * r6 - Optional pointer to the physical starting address of any kernel
56 * command-line parameters.
57 * r7 - Optional pointer to the physical ending address of any kernel
58 * command-line parameters.
59 *
60 * Output(s):
61 * N/A
62 *
63 * Returns:
64 * N/A
65 *
66 */
67void __init
68platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
69 unsigned long r6, unsigned long r7)
70{
71 parse_bootinfo(find_bootinfo());
72
73 /*
74 * If we were passed in a board information, copy it into the
75 * residual data area.
76 */
77 if (r3) {
78 memcpy((void *)__res, (void *)(r3 + KERNELBASE), sizeof(bd_t));
79 }
80
81#if defined(CONFIG_BLK_DEV_INITRD)
82 /*
83 * If the init RAM disk has been configured in, and there's a valid
84 * starting address for it, set it up.
85 */
86 if (r4) {
87 initrd_start = r4 + KERNELBASE;
88 initrd_end = r5 + KERNELBASE;
89 }
90#endif /* CONFIG_BLK_DEV_INITRD */
91
92 /* Copy the kernel command line arguments to a safe place. */
93
94 if (r6) {
95 *(char *)(r7 + KERNELBASE) = 0;
96 strcpy(cmd_line, (char *)(r6 + KERNELBASE));
97 }
98
99 /* Initialize machine-dependency vectors */
100
101 ppc_md.setup_arch = oak_setup_arch;
102 ppc_md.show_percpuinfo = oak_show_percpuinfo;
103 ppc_md.irq_canonicalize = NULL;
104 ppc_md.init_IRQ = ppc4xx_pic_init;
105 ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
106 ppc_md.init = NULL;
107
108 ppc_md.restart = oak_restart;
109 ppc_md.power_off = oak_power_off;
110 ppc_md.halt = oak_halt;
111
112 ppc_md.time_init = oak_time_init;
113 ppc_md.set_rtc_time = oak_set_rtc_time;
114 ppc_md.get_rtc_time = oak_get_rtc_time;
115 ppc_md.calibrate_decr = oak_calibrate_decr;
116}
117
118/*
119 * Document me.
120 */
121void __init
122oak_setup_arch(void)
123{
124 /* XXX - Implement me */
125}
126
127/*
128 * int oak_show_percpuinfo()
129 *
130 * Description:
131 * This routine pretty-prints the platform's internal CPU and bus clock
132 * frequencies into the buffer for usage in /proc/cpuinfo.
133 *
134 * Input(s):
135 * *buffer - Buffer into which CPU and bus clock frequencies are to be
136 * printed.
137 *
138 * Output(s):
139 * *buffer - Buffer with the CPU and bus clock frequencies.
140 *
141 * Returns:
142 * The number of bytes copied into 'buffer' if OK, otherwise zero or less
143 * on error.
144 */
145int
146oak_show_percpuinfo(struct seq_file *m, int i)
147{
148 bd_t *bp = (bd_t *)__res;
149
150 seq_printf(m, "clock\t\t: %dMHz\n"
151 "bus clock\t\t: %dMHz\n",
152 bp->bi_intfreq / 1000000,
153 bp->bi_busfreq / 1000000);
154
155 return 0;
156}
157
158/*
159 * Document me.
160 */
161void
162oak_restart(char *cmd)
163{
164 abort();
165}
166
167/*
168 * Document me.
169 */
170void
171oak_power_off(void)
172{
173 oak_restart(NULL);
174}
175
176/*
177 * Document me.
178 */
179void
180oak_halt(void)
181{
182 oak_restart(NULL);
183}
184
185/*
186 * Document me.
187 */
188long __init
189oak_time_init(void)
190{
191 /* XXX - Implement me */
192 return 0;
193}
194
195/*
196 * Document me.
197 */
198int __init
199oak_set_rtc_time(unsigned long time)
200{
201 /* XXX - Implement me */
202
203 return (0);
204}
205
206/*
207 * Document me.
208 */
209unsigned long __init
210oak_get_rtc_time(void)
211{
212 /* XXX - Implement me */
213
214 return (0);
215}
216
217/*
218 * void __init oak_calibrate_decr()
219 *
220 * Description:
221 * This routine retrieves the internal processor frequency from the board
222 * information structure, sets up the kernel timer decrementer based on
223 * that value, enables the 403 programmable interval timer (PIT) and sets
224 * it up for auto-reload.
225 *
226 * Input(s):
227 * N/A
228 *
229 * Output(s):
230 * N/A
231 *
232 * Returns:
233 * N/A
234 *
235 */
236void __init
237oak_calibrate_decr(void)
238{
239 unsigned int freq;
240 bd_t *bip = (bd_t *)__res;
241
242 freq = bip->bi_intfreq;
243
244 decrementer_count = freq / HZ;
245 count_period_num = 1;
246 count_period_den = freq;
247
248 /* Enable the PIT and set auto-reload of its value */
249
250 mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);
251
252 /* Clear any pending timer interrupts */
253
254 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);
255}
diff --git a/arch/ppc/platforms/4xx/oak.h b/arch/ppc/platforms/4xx/oak.h
deleted file mode 100644
index 1b86a4c66b04..000000000000
--- a/arch/ppc/platforms/4xx/oak.h
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 *
3 * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Module name: oak.h
6 *
7 * Description:
8 * Macros, definitions, and data structures specific to the IBM PowerPC
9 * 403G{A,B,C,CX} "Oak" evaluation board. Anything specific to the pro-
10 * cessor itself is defined elsewhere.
11 *
12 */
13
14#ifdef __KERNEL__
15#ifndef __ASM_OAK_H__
16#define __ASM_OAK_H__
17
18/* We have an IBM 403G{A,B,C,CX} core */
19#include <asm/ibm403.h>
20
21#define _IO_BASE 0
22#define _ISA_MEM_BASE 0
23#define PCI_DRAM_OFFSET 0
24
25/* Memory map for the "Oak" evaluation board */
26
27#define PPC403SPU_IO_BASE 0x40000000 /* 403 On-chip serial port */
28#define PPC403SPU_IO_SIZE 0x00000008
29#define OAKSERIAL_IO_BASE 0x7E000000 /* NS16550DV serial port */
30#define OAKSERIAL_IO_SIZE 0x00000008
31#define OAKNET_IO_BASE 0xF4000000 /* NS83902AV Ethernet */
32#define OAKNET_IO_SIZE 0x00000040
33#define OAKPROM_IO_BASE 0xFFFE0000 /* AMD 29F010 Flash ROM */
34#define OAKPROM_IO_SIZE 0x00020000
35
36
37/* Interrupt assignments fixed by the hardware implementation */
38
39/* This is annoying kbuild-2.4 problem. -- Tom */
40
41#define PPC403SPU_RX_INT 4 /* AIC_INT4 */
42#define PPC403SPU_TX_INT 5 /* AIC_INT5 */
43#define OAKNET_INT 27 /* AIC_INT27 */
44#define OAKSERIAL_INT 28 /* AIC_INT28 */
45
46#ifndef __ASSEMBLY__
47/*
48 * Data structure defining board information maintained by the boot
49 * ROM on IBM's "Oak" evaluation board. An effort has been made to
50 * keep the field names consistent with the 8xx 'bd_t' board info
51 * structures.
52 */
53
54typedef struct board_info {
55 unsigned char bi_s_version[4]; /* Version of this structure */
56 unsigned char bi_r_version[30]; /* Version of the IBM ROM */
57 unsigned int bi_memsize; /* DRAM installed, in bytes */
58 unsigned char bi_enetaddr[6]; /* Ethernet MAC address */
59 unsigned int bi_intfreq; /* Processor speed, in Hz */
60 unsigned int bi_busfreq; /* Bus speed, in Hz */
61} bd_t;
62
63#ifdef __cplusplus
64extern "C" {
65#endif
66
67extern void oak_init(unsigned long r3,
68 unsigned long ird_start,
69 unsigned long ird_end,
70 unsigned long cline_start,
71 unsigned long cline_end);
72extern void oak_setup_arch(void);
73extern int oak_setup_residual(char *buffer);
74extern void oak_init_IRQ(void);
75extern int oak_get_irq(struct pt_regs *regs);
76extern void oak_restart(char *cmd);
77extern void oak_power_off(void);
78extern void oak_halt(void);
79extern void oak_time_init(void);
80extern int oak_set_rtc_time(unsigned long now);
81extern unsigned long oak_get_rtc_time(void);
82extern void oak_calibrate_decr(void);
83
84#ifdef __cplusplus
85}
86#endif
87
88/* Some 4xx parts use a different timebase frequency from the internal clock.
89*/
90#define bi_tbfreq bi_intfreq
91
92#define PPC4xx_MACHINE_NAME "IBM Oak"
93
94#endif /* !__ASSEMBLY__ */
95#endif /* __ASM_OAK_H__ */
96#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/oak_setup.h b/arch/ppc/platforms/4xx/oak_setup.h
deleted file mode 100644
index 8648bd084df8..000000000000
--- a/arch/ppc/platforms/4xx/oak_setup.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 *
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Module name: oak_setup.h
6 *
7 * Description:
8 * Architecture- / platform-specific boot-time initialization code for
9 * the IBM PowerPC 403GCX "Oak" evaluation board. Adapted from original
10 * code by Gary Thomas, Cort Dougan <cort@cs.nmt.edu>, and Dan Malek
11 * <dan@netx4.com>.
12 *
13 */
14
15#ifndef __OAK_SETUP_H__
16#define __OAK_SETUP_H__
17
18#include <asm/ptrace.h>
19#include <asm/board.h>
20
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26extern unsigned char __res[sizeof(bd_t)];
27
28extern void oak_init(unsigned long r3,
29 unsigned long ird_start,
30 unsigned long ird_end,
31 unsigned long cline_start,
32 unsigned long cline_end);
33extern void oak_setup_arch(void);
34extern int oak_setup_residual(char *buffer);
35extern void oak_init_IRQ(void);
36extern int oak_get_irq(struct pt_regs *regs);
37extern void oak_restart(char *cmd);
38extern void oak_power_off(void);
39extern void oak_halt(void);
40extern void oak_time_init(void);
41extern int oak_set_rtc_time(unsigned long now);
42extern unsigned long oak_get_rtc_time(void);
43extern void oak_calibrate_decr(void);
44
45
46#ifdef __cplusplus
47}
48#endif
49
50#endif /* __OAK_SETUP_H__ */
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 8fc34a344769..80028df1b445 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -53,13 +53,6 @@
53#include <syslib/gen550.h> 53#include <syslib/gen550.h>
54#include <syslib/ibm440gx_common.h> 54#include <syslib/ibm440gx_common.h>
55 55
56/*
57 * This is a horrible kludge, we eventually need to abstract this
58 * generic PHY stuff, so the standard phy mode defines can be
59 * easily used from arch code.
60 */
61#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h"
62
63bd_t __res; 56bd_t __res;
64 57
65static struct ibm44x_clocks clocks __initdata; 58static struct ibm44x_clocks clocks __initdata;
diff --git a/arch/ppc/platforms/4xx/redwood5.c b/arch/ppc/platforms/4xx/redwood5.c
index 2f5e410afbc5..bee8b4ac8afd 100644
--- a/arch/ppc/platforms/4xx/redwood5.c
+++ b/arch/ppc/platforms/4xx/redwood5.c
@@ -18,6 +18,19 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/machdep.h> 20#include <asm/machdep.h>
21#include <asm/ppc4xx_pic.h>
22
23/*
24 * Define external IRQ senses and polarities.
25 */
26unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
27 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */
28 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */
29 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */
30 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */
31 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */
32 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */
33};
21 34
22static struct resource smc91x_resources[] = { 35static struct resource smc91x_resources[] = {
23 [0] = { 36 [0] = {
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index ddd04d4c1ea9..b38a851a64ec 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -62,9 +62,29 @@ extern unsigned long total_memory; /* in mm/init */
62unsigned char __res[sizeof (bd_t)]; 62unsigned char __res[sizeof (bd_t)];
63 63
64#ifdef CONFIG_PCI 64#ifdef CONFIG_PCI
65#error "PCI is not supported" 65int
66/* NEED mpc83xx_map_irq & mpc83xx_exclude_device 66mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
67 see platforms/85xx/mpc85xx_ads_common.c */ 67{
68 static char pci_irq_table[][4] =
69 /*
70 * PCI IDSEL/INTPIN->INTLINE
71 * A B C D
72 */
73 {
74 {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
75 {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
76 {PIRQD, PIRQA, PIRQB, PIRQC} /* idsel 0x13 */
77 };
78
79 const long min_idsel = 0x11, max_idsel = 0x13, irqs_per_slot = 4;
80 return PCI_IRQ_TABLE_LOOKUP;
81}
82
83int
84mpc83xx_exclude_device(u_char bus, u_char devfn)
85{
86 return PCIBIOS_SUCCESSFUL;
87}
68#endif /* CONFIG_PCI */ 88#endif /* CONFIG_PCI */
69 89
70/* ************************************************************************ 90/* ************************************************************************
@@ -88,7 +108,7 @@ mpc834x_sys_setup_arch(void)
88 108
89#ifdef CONFIG_PCI 109#ifdef CONFIG_PCI
90 /* setup PCI host bridges */ 110 /* setup PCI host bridges */
91 mpc83xx_sys_setup_hose(); 111 mpc83xx_setup_hose();
92#endif 112#endif
93 mpc83xx_early_serial_map(); 113 mpc83xx_early_serial_map();
94 114
@@ -175,10 +195,17 @@ mpc834x_sys_init_IRQ(void)
175 IRQ_SENSE_LEVEL, /* EXT 1 */ 195 IRQ_SENSE_LEVEL, /* EXT 1 */
176 IRQ_SENSE_LEVEL, /* EXT 2 */ 196 IRQ_SENSE_LEVEL, /* EXT 2 */
177 0, /* EXT 3 */ 197 0, /* EXT 3 */
198#ifdef CONFIG_PCI
199 IRQ_SENSE_LEVEL, /* EXT 4 */
200 IRQ_SENSE_LEVEL, /* EXT 5 */
201 IRQ_SENSE_LEVEL, /* EXT 6 */
202 IRQ_SENSE_LEVEL, /* EXT 7 */
203#else
178 0, /* EXT 4 */ 204 0, /* EXT 4 */
179 0, /* EXT 5 */ 205 0, /* EXT 5 */
180 0, /* EXT 6 */ 206 0, /* EXT 6 */
181 0, /* EXT 7 */ 207 0, /* EXT 7 */
208#endif
182 }; 209 };
183 210
184 ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8); 211 ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index a2f6e49d7151..1584cd77a9ef 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -26,7 +26,7 @@
26#define VIRT_IMMRBAR ((uint)0xfe000000) 26#define VIRT_IMMRBAR ((uint)0xfe000000)
27 27
28#define BCSR_PHYS_ADDR ((uint)0xf8000000) 28#define BCSR_PHYS_ADDR ((uint)0xf8000000)
29#define BCSR_SIZE ((uint)(32 * 1024)) 29#define BCSR_SIZE ((uint)(128 * 1024))
30 30
31#define BCSR_MISC_REG2_OFF 0x07 31#define BCSR_MISC_REG2_OFF 0x07
32#define BCSR_MISC_REG2_PORESET 0x01 32#define BCSR_MISC_REG2_PORESET 0x01
@@ -34,23 +34,25 @@
34#define BCSR_MISC_REG3_OFF 0x08 34#define BCSR_MISC_REG3_OFF 0x08
35#define BCSR_MISC_REG3_CNFLOCK 0x80 35#define BCSR_MISC_REG3_CNFLOCK 0x80
36 36
37#ifdef CONFIG_PCI 37#define PIRQA MPC83xx_IRQ_EXT4
38/* PCI interrupt controller */ 38#define PIRQB MPC83xx_IRQ_EXT5
39#define PIRQA MPC83xx_IRQ_IRQ4 39#define PIRQC MPC83xx_IRQ_EXT6
40#define PIRQB MPC83xx_IRQ_IRQ5 40#define PIRQD MPC83xx_IRQ_EXT7
41#define PIRQC MPC83xx_IRQ_IRQ6 41
42#define PIRQD MPC83xx_IRQ_IRQ7 42#define MPC83xx_PCI1_LOWER_IO 0x00000000
43 43#define MPC83xx_PCI1_UPPER_IO 0x00ffffff
44#define MPC834x_SYS_PCI1_LOWER_IO 0x00000000 44#define MPC83xx_PCI1_LOWER_MEM 0x80000000
45#define MPC834x_SYS_PCI1_UPPER_IO 0x00ffffff 45#define MPC83xx_PCI1_UPPER_MEM 0x9fffffff
46 46#define MPC83xx_PCI1_IO_BASE 0xe2000000
47#define MPC834x_SYS_PCI1_LOWER_MEM 0x80000000 47#define MPC83xx_PCI1_MEM_OFFSET 0x00000000
48#define MPC834x_SYS_PCI1_UPPER_MEM 0x9fffffff 48#define MPC83xx_PCI1_IO_SIZE 0x01000000
49 49
50#define MPC834x_SYS_PCI1_IO_BASE 0xe2000000 50#define MPC83xx_PCI2_LOWER_IO 0x00000000
51#define MPC834x_SYS_PCI1_MEM_OFFSET 0x00000000 51#define MPC83xx_PCI2_UPPER_IO 0x00ffffff
52 52#define MPC83xx_PCI2_LOWER_MEM 0xa0000000
53#define MPC834x_SYS_PCI1_IO_SIZE 0x01000000 53#define MPC83xx_PCI2_UPPER_MEM 0xbfffffff
54#endif /* CONFIG_PCI */ 54#define MPC83xx_PCI2_IO_BASE 0xe3000000
55#define MPC83xx_PCI2_MEM_OFFSET 0x00000000
56#define MPC83xx_PCI2_IO_SIZE 0x01000000
55 57
56#endif /* __MACH_MPC83XX_SYS_H__ */ 58#endif /* __MACH_MPC83XX_SYS_H__ */
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index 5488a053f415..ff7452e5d8e5 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -21,22 +21,17 @@ obj-$(CONFIG_CPU_FREQ_PMAC) += pmac_cpufreq.o
21endif 21endif
22obj-$(CONFIG_PMAC_BACKLIGHT) += pmac_backlight.o 22obj-$(CONFIG_PMAC_BACKLIGHT) += pmac_backlight.o
23obj-$(CONFIG_PREP_RESIDUAL) += residual.o 23obj-$(CONFIG_PREP_RESIDUAL) += residual.o
24obj-$(CONFIG_ADIR) += adir_setup.o adir_pic.o adir_pci.o
25obj-$(CONFIG_PQ2ADS) += pq2ads.o 24obj-$(CONFIG_PQ2ADS) += pq2ads.o
26obj-$(CONFIG_TQM8260) += tqm8260_setup.o 25obj-$(CONFIG_TQM8260) += tqm8260_setup.o
27obj-$(CONFIG_CPCI690) += cpci690.o 26obj-$(CONFIG_CPCI690) += cpci690.o
28obj-$(CONFIG_EV64260) += ev64260.o 27obj-$(CONFIG_EV64260) += ev64260.o
29obj-$(CONFIG_CHESTNUT) += chestnut.o 28obj-$(CONFIG_CHESTNUT) += chestnut.o
30obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o 29obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o
31obj-$(CONFIG_K2) += k2.o
32obj-$(CONFIG_LOPEC) += lopec.o 30obj-$(CONFIG_LOPEC) += lopec.o
33obj-$(CONFIG_KATANA) += katana.o 31obj-$(CONFIG_KATANA) += katana.o
34obj-$(CONFIG_HDPU) += hdpu.o 32obj-$(CONFIG_HDPU) += hdpu.o
35obj-$(CONFIG_MCPN765) += mcpn765.o
36obj-$(CONFIG_MENF1) += menf1_setup.o menf1_pci.o
37obj-$(CONFIG_MVME5100) += mvme5100.o 33obj-$(CONFIG_MVME5100) += mvme5100.o
38obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o 34obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o
39obj-$(CONFIG_PCORE) += pcore.o
40obj-$(CONFIG_POWERPMC250) += powerpmc250.o 35obj-$(CONFIG_POWERPMC250) += powerpmc250.o
41obj-$(CONFIG_PPLUS) += pplus.o 36obj-$(CONFIG_PPLUS) += pplus.o
42obj-$(CONFIG_PRPMC750) += prpmc750.o 37obj-$(CONFIG_PRPMC750) += prpmc750.o
@@ -46,6 +41,7 @@ obj-$(CONFIG_SANDPOINT) += sandpoint.o
46obj-$(CONFIG_SBC82xx) += sbc82xx.o 41obj-$(CONFIG_SBC82xx) += sbc82xx.o
47obj-$(CONFIG_SPRUCE) += spruce.o 42obj-$(CONFIG_SPRUCE) += spruce.o
48obj-$(CONFIG_LITE5200) += lite5200.o 43obj-$(CONFIG_LITE5200) += lite5200.o
44obj-$(CONFIG_EV64360) += ev64360.o
49 45
50ifeq ($(CONFIG_SMP),y) 46ifeq ($(CONFIG_SMP),y)
51obj-$(CONFIG_PPC_PMAC) += pmac_smp.o 47obj-$(CONFIG_PPC_PMAC) += pmac_smp.o
diff --git a/arch/ppc/platforms/adir.h b/arch/ppc/platforms/adir.h
deleted file mode 100644
index 13a748b46956..000000000000
--- a/arch/ppc/platforms/adir.h
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * arch/ppc/platforms/adir.h
3 *
4 * Definitions for SBS Adirondack board support
5 *
6 * By Michael Sokolov <msokolov@ivan.Harhan.ORG>
7 */
8
9#ifndef __PPC_PLATFORMS_ADIR_H
10#define __PPC_PLATFORMS_ADIR_H
11
12/*
13 * SBS Adirondack definitions
14 */
15
16/* PPC physical address space layout. We use the one set up by the firmware. */
17#define ADIR_PCI32_MEM_BASE 0x80000000
18#define ADIR_PCI32_MEM_SIZE 0x20000000
19#define ADIR_PCI64_MEM_BASE 0xA0000000
20#define ADIR_PCI64_MEM_SIZE 0x20000000
21#define ADIR_PCI32_IO_BASE 0xC0000000
22#define ADIR_PCI32_IO_SIZE 0x10000000
23#define ADIR_PCI64_IO_BASE 0xD0000000
24#define ADIR_PCI64_IO_SIZE 0x10000000
25#define ADIR_PCI64_PHB 0xFF400000
26#define ADIR_PCI32_PHB 0xFF500000
27
28#define ADIR_PCI64_CONFIG_ADDR (ADIR_PCI64_PHB + 0x000f8000)
29#define ADIR_PCI64_CONFIG_DATA (ADIR_PCI64_PHB + 0x000f8010)
30
31#define ADIR_PCI32_CONFIG_ADDR (ADIR_PCI32_PHB + 0x000f8000)
32#define ADIR_PCI32_CONFIG_DATA (ADIR_PCI32_PHB + 0x000f8010)
33
34/* System memory as seen from PCI */
35#define ADIR_PCI_SYS_MEM_BASE 0x80000000
36
37/* Static virtual mapping of PCI I/O */
38#define ADIR_PCI32_VIRT_IO_BASE 0xFE000000
39#define ADIR_PCI32_VIRT_IO_SIZE 0x01000000
40#define ADIR_PCI64_VIRT_IO_BASE 0xFF000000
41#define ADIR_PCI64_VIRT_IO_SIZE 0x01000000
42
43/* Registers */
44#define ADIR_NVRAM_RTC_ADDR 0x74
45#define ADIR_NVRAM_RTC_DATA 0x75
46
47#define ADIR_BOARD_ID_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF0)
48#define ADIR_CPLD1REV_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF1)
49#define ADIR_CPLD2REV_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF2)
50#define ADIR_FLASHCTL_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF3)
51#define ADIR_CPC710_STAT_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF4)
52#define ADIR_CLOCK_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF5)
53#define ADIR_GPIO_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF8)
54#define ADIR_MISC_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF9)
55#define ADIR_LED_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFFA)
56
57#define ADIR_CLOCK_REG_PD 0x10
58#define ADIR_CLOCK_REG_SPREAD 0x08
59#define ADIR_CLOCK_REG_SEL133 0x04
60#define ADIR_CLOCK_REG_SEL1 0x02
61#define ADIR_CLOCK_REG_SEL0 0x01
62
63#define ADIR_PROCA_INT_MASK (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF0)
64#define ADIR_PROCB_INT_MASK (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF2)
65#define ADIR_PROCA_INT_STAT (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF4)
66#define ADIR_PROCB_INT_STAT (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF6)
67
68/* Linux IRQ numbers */
69#define ADIR_IRQ_NONE -1
70#define ADIR_IRQ_SERIAL2 3
71#define ADIR_IRQ_SERIAL1 4
72#define ADIR_IRQ_FDC 6
73#define ADIR_IRQ_PARALLEL 7
74#define ADIR_IRQ_VIA_AUDIO 10
75#define ADIR_IRQ_VIA_USB 11
76#define ADIR_IRQ_IDE0 14
77#define ADIR_IRQ_IDE1 15
78#define ADIR_IRQ_PCI0_INTA 16
79#define ADIR_IRQ_PCI0_INTB 17
80#define ADIR_IRQ_PCI0_INTC 18
81#define ADIR_IRQ_PCI0_INTD 19
82#define ADIR_IRQ_PCI1_INTA 20
83#define ADIR_IRQ_PCI1_INTB 21
84#define ADIR_IRQ_PCI1_INTC 22
85#define ADIR_IRQ_PCI1_INTD 23
86#define ADIR_IRQ_MBSCSI 24 /* motherboard SCSI */
87#define ADIR_IRQ_MBETH1 25 /* motherboard Ethernet 1 */
88#define ADIR_IRQ_MBETH0 26 /* motherboard Ethernet 0 */
89#define ADIR_IRQ_CPC710_INT1 27
90#define ADIR_IRQ_CPC710_INT2 28
91#define ADIR_IRQ_VT82C686_NMI 29
92#define ADIR_IRQ_VT82C686_INTR 30
93#define ADIR_IRQ_INTERPROC 31
94
95#endif /* __PPC_PLATFORMS_ADIR_H */
diff --git a/arch/ppc/platforms/adir_pci.c b/arch/ppc/platforms/adir_pci.c
deleted file mode 100644
index f94ac53e0711..000000000000
--- a/arch/ppc/platforms/adir_pci.c
+++ /dev/null
@@ -1,247 +0,0 @@
1/*
2 * arch/ppc/platforms/adir_pci.c
3 *
4 * PCI support for SBS Adirondack
5 *
6 * By Michael Sokolov <msokolov@ivan.Harhan.ORG>
7 * based on the K2 version by Matt Porter <mporter@mvista.com>
8 */
9
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/pci.h>
13#include <linux/slab.h>
14
15#include <asm/byteorder.h>
16#include <asm/io.h>
17#include <asm/uaccess.h>
18#include <asm/machdep.h>
19#include <asm/pci-bridge.h>
20
21#include <syslib/cpc710.h>
22#include "adir.h"
23
24#undef DEBUG
25#ifdef DEBUG
26#define DBG(x...) printk(x)
27#else
28#define DBG(x...)
29#endif /* DEBUG */
30
31static inline int __init
32adir_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
33{
34#define PCIIRQ(a,b,c,d) {ADIR_IRQ_##a,ADIR_IRQ_##b,ADIR_IRQ_##c,ADIR_IRQ_##d},
35 struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
36 /*
37 * The three PCI devices on the motherboard have dedicated lines to the
38 * CPLD interrupt controller, bypassing the standard PCI INTA-D and the
39 * PC interrupt controller. All other PCI devices (slots) have usual
40 * staggered INTA-D lines, resulting in 8 lines total (PCI0 INTA-D and
41 * PCI1 INTA-D). All 8 go to the CPLD interrupt controller. PCI0 INTA-D
42 * also go to the south bridge, so we have the option of taking them
43 * via the CPLD interrupt controller or via the south bridge 8259
44 * 8258 thingy. PCI1 INTA-D can only be taken via the CPLD interrupt
45 * controller. We take all PCI interrupts via the CPLD interrupt
46 * controller as recommended by SBS.
47 *
48 * We also have some monkey business with the PCI devices within the
49 * VT82C686B south bridge itself. This chip actually has 7 functions on
50 * its IDSEL. Function 0 is the actual south bridge, function 1 is IDE,
51 * and function 4 is some special stuff. The other 4 functions are just
52 * regular PCI devices bundled in the chip. 2 and 3 are USB UHCIs and 5
53 * and 6 are audio (not supported on the Adirondack).
54 *
55 * This is where the monkey business begins. PCI devices are supposed
56 * to signal normal PCI interrupts. But the 4 functions in question are
57 * located in the south bridge chip, which is designed with the
58 * assumption that it will be fielding PCI INTA-D interrupts rather
59 * than generating them. Here's what it does. Each of the functions in
60 * question routes its interrupt to one of the IRQs on the 8259 thingy.
61 * Which one? It looks at the Interrupt Line register in the PCI config
62 * space, even though the PCI spec says it's for BIOS/OS interaction
63 * only.
64 *
65 * How do we deal with this? We take these interrupts via 8259 IRQs as
66 * we have to. We return the desired IRQ numbers from this routine when
67 * called for the functions in question. The PCI scan code will then
68 * stick our return value into the Interrupt Line register in the PCI
69 * config space, and the interrupt will actually go there. We identify
70 * these functions within the south bridge IDSEL by their interrupt pin
71 * numbers, as the VT82C686B has 04 in the Interrupt Pin register for
72 * USB and 03 for audio.
73 */
74 if (!hose->index) {
75 static char pci_irq_table[][4] =
76 /*
77 * PCI IDSEL/INTPIN->INTLINE
78 * A B C D
79 */
80 {
81 /* south bridge */ PCIIRQ(IDE0, NONE, VIA_AUDIO, VIA_USB)
82 /* Ethernet 0 */ PCIIRQ(MBETH0, MBETH0, MBETH0, MBETH0)
83 /* PCI0 slot 1 */ PCIIRQ(PCI0_INTB, PCI0_INTC, PCI0_INTD, PCI0_INTA)
84 /* PCI0 slot 2 */ PCIIRQ(PCI0_INTC, PCI0_INTD, PCI0_INTA, PCI0_INTB)
85 /* PCI0 slot 3 */ PCIIRQ(PCI0_INTD, PCI0_INTA, PCI0_INTB, PCI0_INTC)
86 };
87 const long min_idsel = 3, max_idsel = 7, irqs_per_slot = 4;
88 return PCI_IRQ_TABLE_LOOKUP;
89 } else {
90 static char pci_irq_table[][4] =
91 /*
92 * PCI IDSEL/INTPIN->INTLINE
93 * A B C D
94 */
95 {
96 /* Ethernet 1 */ PCIIRQ(MBETH1, MBETH1, MBETH1, MBETH1)
97 /* SCSI */ PCIIRQ(MBSCSI, MBSCSI, MBSCSI, MBSCSI)
98 /* PCI1 slot 1 */ PCIIRQ(PCI1_INTB, PCI1_INTC, PCI1_INTD, PCI1_INTA)
99 /* PCI1 slot 2 */ PCIIRQ(PCI1_INTC, PCI1_INTD, PCI1_INTA, PCI1_INTB)
100 /* PCI1 slot 3 */ PCIIRQ(PCI1_INTD, PCI1_INTA, PCI1_INTB, PCI1_INTC)
101 };
102 const long min_idsel = 3, max_idsel = 7, irqs_per_slot = 4;
103 return PCI_IRQ_TABLE_LOOKUP;
104 }
105#undef PCIIRQ
106}
107
108static void
109adir_pcibios_fixup_resources(struct pci_dev *dev)
110{
111 int i;
112
113 if ((dev->vendor == PCI_VENDOR_ID_IBM) &&
114 (dev->device == PCI_DEVICE_ID_IBM_CPC710_PCI64))
115 {
116 DBG("Fixup CPC710 resources\n");
117 for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
118 {
119 dev->resource[i].start = 0;
120 dev->resource[i].end = 0;
121 }
122 }
123}
124
125/*
126 * CPC710 DD3 has an errata causing it to hang the system if a type 0 config
127 * cycle is attempted on its PCI32 interface with a device number > 21.
128 * CPC710's PCI bridges map device numbers 1 through 21 to AD11 through AD31.
129 * Per the PCI spec it MUST accept all other device numbers and do nothing, and
130 * software MUST scan all device numbers without assuming how IDSELs are
131 * mapped. However, as the CPC710 DD3's errata causes such correct scanning
132 * procedure to hang the system, we have no choice but to introduce this hack
133 * of knowingly avoiding device numbers > 21 on PCI0,
134 */
135static int
136adir_exclude_device(u_char bus, u_char devfn)
137{
138 if ((bus == 0) && (PCI_SLOT(devfn) > 21))
139 return PCIBIOS_DEVICE_NOT_FOUND;
140 else
141 return PCIBIOS_SUCCESSFUL;
142}
143
144void adir_find_bridges(void)
145{
146 struct pci_controller *hose_a, *hose_b;
147
148 /* Setup PCI32 hose */
149 hose_a = pcibios_alloc_controller();
150 if (!hose_a)
151 return;
152
153 hose_a->first_busno = 0;
154 hose_a->last_busno = 0xff;
155 hose_a->pci_mem_offset = ADIR_PCI32_MEM_BASE;
156 hose_a->io_space.start = 0;
157 hose_a->io_space.end = ADIR_PCI32_VIRT_IO_SIZE - 1;
158 hose_a->mem_space.start = 0;
159 hose_a->mem_space.end = ADIR_PCI32_MEM_SIZE - 1;
160 hose_a->io_resource.start = 0;
161 hose_a->io_resource.end = ADIR_PCI32_VIRT_IO_SIZE - 1;
162 hose_a->io_resource.flags = IORESOURCE_IO;
163 hose_a->mem_resources[0].start = ADIR_PCI32_MEM_BASE;
164 hose_a->mem_resources[0].end = ADIR_PCI32_MEM_BASE +
165 ADIR_PCI32_MEM_SIZE - 1;
166 hose_a->mem_resources[0].flags = IORESOURCE_MEM;
167 hose_a->io_base_phys = ADIR_PCI32_IO_BASE;
168 hose_a->io_base_virt = (void *) ADIR_PCI32_VIRT_IO_BASE;
169
170 ppc_md.pci_exclude_device = adir_exclude_device;
171 setup_indirect_pci(hose_a, ADIR_PCI32_CONFIG_ADDR,
172 ADIR_PCI32_CONFIG_DATA);
173
174 /* Initialize PCI32 bus registers */
175 early_write_config_byte(hose_a,
176 hose_a->first_busno,
177 PCI_DEVFN(0, 0),
178 CPC710_BUS_NUMBER,
179 hose_a->first_busno);
180 early_write_config_byte(hose_a,
181 hose_a->first_busno,
182 PCI_DEVFN(0, 0),
183 CPC710_SUB_BUS_NUMBER,
184 hose_a->last_busno);
185
186 hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
187
188 /* Write out correct max subordinate bus number for hose A */
189 early_write_config_byte(hose_a,
190 hose_a->first_busno,
191 PCI_DEVFN(0, 0),
192 CPC710_SUB_BUS_NUMBER,
193 hose_a->last_busno);
194
195 /* Setup PCI64 hose */
196 hose_b = pcibios_alloc_controller();
197 if (!hose_b)
198 return;
199
200 hose_b->first_busno = hose_a->last_busno + 1;
201 hose_b->last_busno = 0xff;
202 hose_b->pci_mem_offset = ADIR_PCI64_MEM_BASE;
203 hose_b->io_space.start = 0;
204 hose_b->io_space.end = ADIR_PCI64_VIRT_IO_SIZE - 1;
205 hose_b->mem_space.start = 0;
206 hose_b->mem_space.end = ADIR_PCI64_MEM_SIZE - 1;
207 hose_b->io_resource.start = 0;
208 hose_b->io_resource.end = ADIR_PCI64_VIRT_IO_SIZE - 1;
209 hose_b->io_resource.flags = IORESOURCE_IO;
210 hose_b->mem_resources[0].start = ADIR_PCI64_MEM_BASE;
211 hose_b->mem_resources[0].end = ADIR_PCI64_MEM_BASE +
212 ADIR_PCI64_MEM_SIZE - 1;
213 hose_b->mem_resources[0].flags = IORESOURCE_MEM;
214 hose_b->io_base_phys = ADIR_PCI64_IO_BASE;
215 hose_b->io_base_virt = (void *) ADIR_PCI64_VIRT_IO_BASE;
216
217 setup_indirect_pci(hose_b, ADIR_PCI64_CONFIG_ADDR,
218 ADIR_PCI64_CONFIG_DATA);
219
220 /* Initialize PCI64 bus registers */
221 early_write_config_byte(hose_b,
222 0,
223 PCI_DEVFN(0, 0),
224 CPC710_SUB_BUS_NUMBER,
225 0xff);
226
227 early_write_config_byte(hose_b,
228 0,
229 PCI_DEVFN(0, 0),
230 CPC710_BUS_NUMBER,
231 hose_b->first_busno);
232
233 hose_b->last_busno = pciauto_bus_scan(hose_b,
234 hose_b->first_busno);
235
236 /* Write out correct max subordinate bus number for hose B */
237 early_write_config_byte(hose_b,
238 hose_b->first_busno,
239 PCI_DEVFN(0, 0),
240 CPC710_SUB_BUS_NUMBER,
241 hose_b->last_busno);
242
243 ppc_md.pcibios_fixup = NULL;
244 ppc_md.pcibios_fixup_resources = adir_pcibios_fixup_resources;
245 ppc_md.pci_swizzle = common_swizzle;
246 ppc_md.pci_map_irq = adir_map_irq;
247}
diff --git a/arch/ppc/platforms/adir_pic.c b/arch/ppc/platforms/adir_pic.c
deleted file mode 100644
index 9947cba52af5..000000000000
--- a/arch/ppc/platforms/adir_pic.c
+++ /dev/null
@@ -1,130 +0,0 @@
1/*
2 * arch/ppc/platforms/adir_pic.c
3 *
4 * Interrupt controller support for SBS Adirondack
5 *
6 * By Michael Sokolov <msokolov@ivan.Harhan.ORG>
7 * based on the K2 and SCM versions by Matt Porter <mporter@mvista.com>
8 */
9
10#include <linux/stddef.h>
11#include <linux/init.h>
12#include <linux/sched.h>
13#include <linux/pci.h>
14#include <linux/interrupt.h>
15
16#include <asm/io.h>
17#include <asm/i8259.h>
18#include "adir.h"
19
20static void adir_onboard_pic_enable(unsigned int irq);
21static void adir_onboard_pic_disable(unsigned int irq);
22
23__init static void
24adir_onboard_pic_init(void)
25{
26 volatile u_short *maskreg = (volatile u_short *) ADIR_PROCA_INT_MASK;
27
28 /* Disable all Adirondack onboard interrupts */
29 out_be16(maskreg, 0xFFFF);
30}
31
32static int
33adir_onboard_pic_get_irq(void)
34{
35 volatile u_short *statreg = (volatile u_short *) ADIR_PROCA_INT_STAT;
36 int irq;
37 u_short int_status, int_test;
38
39 int_status = in_be16(statreg);
40 for (irq = 0, int_test = 1; irq < 16; irq++, int_test <<= 1) {
41 if (int_status & int_test)
42 break;
43 }
44
45 if (irq == 16)
46 return -1;
47
48 return (irq+16);
49}
50
51static void
52adir_onboard_pic_enable(unsigned int irq)
53{
54 volatile u_short *maskreg = (volatile u_short *) ADIR_PROCA_INT_MASK;
55
56 /* Change irq to Adirondack onboard native value */
57 irq -= 16;
58
59 /* Enable requested irq number */
60 out_be16(maskreg, in_be16(maskreg) & ~(1 << irq));
61}
62
63static void
64adir_onboard_pic_disable(unsigned int irq)
65{
66 volatile u_short *maskreg = (volatile u_short *) ADIR_PROCA_INT_MASK;
67
68 /* Change irq to Adirondack onboard native value */
69 irq -= 16;
70
71 /* Disable requested irq number */
72 out_be16(maskreg, in_be16(maskreg) | (1 << irq));
73}
74
75static struct hw_interrupt_type adir_onboard_pic = {
76 " ADIR PIC ",
77 NULL,
78 NULL,
79 adir_onboard_pic_enable, /* unmask */
80 adir_onboard_pic_disable, /* mask */
81 adir_onboard_pic_disable, /* mask and ack */
82 NULL,
83 NULL
84};
85
86static struct irqaction noop_action = {
87 .handler = no_action,
88 .flags = SA_INTERRUPT,
89 .mask = CPU_MASK_NONE,
90 .name = "82c59 primary cascade",
91};
92
93/*
94 * Linux interrupt values are assigned as follows:
95 *
96 * 0-15 VT82C686 8259 interrupts
97 * 16-31 Adirondack CPLD interrupts
98 */
99__init void
100adir_init_IRQ(void)
101{
102 int i;
103
104 /* Initialize the cascaded 8259's on the VT82C686 */
105 for (i=0; i<16; i++)
106 irq_desc[i].handler = &i8259_pic;
107 i8259_init(NULL);
108
109 /* Initialize Adirondack CPLD PIC and enable 8259 interrupt cascade */
110 for (i=16; i<32; i++)
111 irq_desc[i].handler = &adir_onboard_pic;
112 adir_onboard_pic_init();
113
114 /* Enable 8259 interrupt cascade */
115 setup_irq(ADIR_IRQ_VT82C686_INTR, &noop_action);
116}
117
118int
119adir_get_irq(struct pt_regs *regs)
120{
121 int irq;
122
123 if ((irq = adir_onboard_pic_get_irq()) < 0)
124 return irq;
125
126 if (irq == ADIR_IRQ_VT82C686_INTR)
127 irq = i8259_irq(regs);
128
129 return irq;
130}
diff --git a/arch/ppc/platforms/adir_setup.c b/arch/ppc/platforms/adir_setup.c
deleted file mode 100644
index 6a6754ee0617..000000000000
--- a/arch/ppc/platforms/adir_setup.c
+++ /dev/null
@@ -1,210 +0,0 @@
1/*
2 * arch/ppc/platforms/adir_setup.c
3 *
4 * Board setup routines for SBS Adirondack
5 *
6 * By Michael Sokolov <msokolov@ivan.Harhan.ORG>
7 * based on the K2 version by Matt Porter <mporter@mvista.com>
8 */
9
10#include <linux/config.h>
11#include <linux/stddef.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/errno.h>
15#include <linux/reboot.h>
16#include <linux/pci.h>
17#include <linux/kdev_t.h>
18#include <linux/types.h>
19#include <linux/major.h>
20#include <linux/initrd.h>
21#include <linux/console.h>
22#include <linux/delay.h>
23#include <linux/ide.h>
24#include <linux/seq_file.h>
25#include <linux/root_dev.h>
26
27#include <asm/system.h>
28#include <asm/pgtable.h>
29#include <asm/page.h>
30#include <asm/dma.h>
31#include <asm/io.h>
32#include <asm/machdep.h>
33#include <asm/time.h>
34#include <asm/todc.h>
35#include <asm/bootinfo.h>
36
37#include "adir.h"
38
39extern void adir_init_IRQ(void);
40extern int adir_get_irq(struct pt_regs *);
41extern void adir_find_bridges(void);
42extern unsigned long loops_per_jiffy;
43
44static unsigned int cpu_750cx[16] = {
45 5, 15, 14, 0, 4, 13, 0, 9, 6, 11, 8, 10, 16, 12, 7, 0
46};
47
48static int
49adir_get_bus_speed(void)
50{
51 if (!(*((u_char *) ADIR_CLOCK_REG) & ADIR_CLOCK_REG_SEL133))
52 return 100000000;
53 else
54 return 133333333;
55}
56
57static int
58adir_get_cpu_speed(void)
59{
60 unsigned long hid1;
61 int cpu_speed;
62
63 hid1 = mfspr(SPRN_HID1) >> 28;
64
65 hid1 = cpu_750cx[hid1];
66
67 cpu_speed = adir_get_bus_speed()*hid1/2;
68 return cpu_speed;
69}
70
71static void __init
72adir_calibrate_decr(void)
73{
74 int freq, divisor = 4;
75
76 /* determine processor bus speed */
77 freq = adir_get_bus_speed();
78 tb_ticks_per_jiffy = freq / HZ / divisor;
79 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
80}
81
82static int
83adir_show_cpuinfo(struct seq_file *m)
84{
85 seq_printf(m, "vendor\t\t: SBS\n");
86 seq_printf(m, "machine\t\t: Adirondack\n");
87 seq_printf(m, "cpu speed\t: %dMhz\n", adir_get_cpu_speed()/1000000);
88 seq_printf(m, "bus speed\t: %dMhz\n", adir_get_bus_speed()/1000000);
89 seq_printf(m, "memory type\t: SDRAM\n");
90
91 return 0;
92}
93
94extern char cmd_line[];
95
96TODC_ALLOC();
97
98static void __init
99adir_setup_arch(void)
100{
101 unsigned int cpu;
102
103 /* Setup TODC access */
104 TODC_INIT(TODC_TYPE_MC146818, ADIR_NVRAM_RTC_ADDR, 0,
105 ADIR_NVRAM_RTC_DATA, 8);
106
107 /* init to some ~sane value until calibrate_delay() runs */
108 loops_per_jiffy = 50000000/HZ;
109
110 /* Setup PCI host bridges */
111 adir_find_bridges();
112
113#ifdef CONFIG_BLK_DEV_INITRD
114 if (initrd_start)
115 ROOT_DEV = Root_RAM0;
116 else
117#endif
118#ifdef CONFIG_ROOT_NFS
119 ROOT_DEV = Root_NFS;
120#else
121 ROOT_DEV = Root_SDA1;
122#endif
123
124 /* Identify the system */
125 printk("System Identification: SBS Adirondack - PowerPC 750CXe @ %d Mhz\n", adir_get_cpu_speed()/1000000);
126 printk("SBS Adirondack port (C) 2001 SBS Technologies, Inc.\n");
127
128 /* Identify the CPU manufacturer */
129 cpu = mfspr(SPRN_PVR);
130 printk("CPU manufacturer: IBM [rev=%04x]\n", (cpu & 0xffff));
131}
132
133static void
134adir_restart(char *cmd)
135{
136 local_irq_disable();
137 /* SRR0 has system reset vector, SRR1 has default MSR value */
138 /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
139 __asm__ __volatile__
140 ("lis 3,0xfff0\n\t"
141 "ori 3,3,0x0100\n\t"
142 "mtspr 26,3\n\t"
143 "li 3,0\n\t"
144 "mtspr 27,3\n\t"
145 "rfi\n\t");
146 for(;;);
147}
148
149static void
150adir_power_off(void)
151{
152 for(;;);
153}
154
155static void
156adir_halt(void)
157{
158 adir_restart(NULL);
159}
160
161static unsigned long __init
162adir_find_end_of_memory(void)
163{
164 return boot_mem_size;
165}
166
167static void __init
168adir_map_io(void)
169{
170 io_block_mapping(ADIR_PCI32_VIRT_IO_BASE, ADIR_PCI32_IO_BASE,
171 ADIR_PCI32_VIRT_IO_SIZE, _PAGE_IO);
172 io_block_mapping(ADIR_PCI64_VIRT_IO_BASE, ADIR_PCI64_IO_BASE,
173 ADIR_PCI64_VIRT_IO_SIZE, _PAGE_IO);
174}
175
176void __init
177platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
178 unsigned long r6, unsigned long r7)
179{
180 /*
181 * On the Adirondack we use bi_recs and pass the pointer to them in R3.
182 */
183 parse_bootinfo((struct bi_record *) (r3 + KERNELBASE));
184
185 /* Remember, isa_io_base is virtual but isa_mem_base is physical! */
186 isa_io_base = ADIR_PCI32_VIRT_IO_BASE;
187 isa_mem_base = ADIR_PCI32_MEM_BASE;
188 pci_dram_offset = ADIR_PCI_SYS_MEM_BASE;
189
190 ppc_md.setup_arch = adir_setup_arch;
191 ppc_md.show_cpuinfo = adir_show_cpuinfo;
192 ppc_md.irq_canonicalize = NULL;
193 ppc_md.init_IRQ = adir_init_IRQ;
194 ppc_md.get_irq = adir_get_irq;
195 ppc_md.init = NULL;
196
197 ppc_md.find_end_of_memory = adir_find_end_of_memory;
198 ppc_md.setup_io_mappings = adir_map_io;
199
200 ppc_md.restart = adir_restart;
201 ppc_md.power_off = adir_power_off;
202 ppc_md.halt = adir_halt;
203
204 ppc_md.time_init = todc_time_init;
205 ppc_md.set_rtc_time = todc_set_rtc_time;
206 ppc_md.get_rtc_time = todc_get_rtc_time;
207 ppc_md.nvram_read_val = todc_mc146818_read_val;
208 ppc_md.nvram_write_val = todc_mc146818_write_val;
209 ppc_md.calibrate_decr = adir_calibrate_decr;
210}
diff --git a/arch/ppc/platforms/cpci690.c b/arch/ppc/platforms/cpci690.c
index 507870c9a97a..f64ac2acb603 100644
--- a/arch/ppc/platforms/cpci690.c
+++ b/arch/ppc/platforms/cpci690.c
@@ -35,11 +35,7 @@
35#define SET_PCI_IDE_NATIVE 35#define SET_PCI_IDE_NATIVE
36 36
37static struct mv64x60_handle bh; 37static struct mv64x60_handle bh;
38static u32 cpci690_br_base; 38static void __iomem *cpci690_br_base;
39
40static const unsigned int cpu_7xx[16] = { /* 7xx & 74xx (but not 745x) */
41 18, 15, 14, 2, 4, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
42};
43 39
44TODC_ALLOC(); 40TODC_ALLOC();
45 41
@@ -55,7 +51,7 @@ cpci690_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
55 * A B C D 51 * A B C D
56 */ 52 */
57 { 53 {
58 { 90, 91, 88, 89}, /* IDSEL 30/20 - Sentinel */ 54 { 90, 91, 88, 89 }, /* IDSEL 30/20 - Sentinel */
59 }; 55 };
60 56
61 const long min_idsel = 20, max_idsel = 20, irqs_per_slot = 4; 57 const long min_idsel = 20, max_idsel = 20, irqs_per_slot = 4;
@@ -67,9 +63,9 @@ cpci690_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
67 * A B C D 63 * A B C D
68 */ 64 */
69 { 65 {
70 { 93, 94, 95, 92}, /* IDSEL 28/18 - PMC slot 2 */ 66 { 93, 94, 95, 92 }, /* IDSEL 28/18 - PMC slot 2 */
71 { 0, 0, 0, 0}, /* IDSEL 29/19 - Not used */ 67 { 0, 0, 0, 0 }, /* IDSEL 29/19 - Not used */
72 { 94, 95, 92, 93}, /* IDSEL 30/20 - PMC slot 1 */ 68 { 94, 95, 92, 93 }, /* IDSEL 30/20 - PMC slot 1 */
73 }; 69 };
74 70
75 const long min_idsel = 18, max_idsel = 20, irqs_per_slot = 4; 71 const long min_idsel = 18, max_idsel = 20, irqs_per_slot = 4;
@@ -77,68 +73,29 @@ cpci690_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
77 } 73 }
78} 74}
79 75
80static int 76#define GB (1024UL * 1024UL * 1024UL)
81cpci690_get_cpu_speed(void)
82{
83 unsigned long hid1;
84 77
85 hid1 = mfspr(SPRN_HID1) >> 28; 78static u32
86 return CPCI690_BUS_FREQ * cpu_7xx[hid1]/2; 79cpci690_get_bus_freq(void)
80{
81 if (boot_mem_size >= (1*GB)) /* bus speed based on mem size */
82 return 100000000;
83 else
84 return 133333333;
87} 85}
88 86
89#define KB (1024UL) 87static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */
90#define MB (1024UL * KB) 88 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/
91#define GB (1024UL * MB) 89 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/
90};
92 91
93unsigned long __init 92static int
94cpci690_find_end_of_memory(void) 93cpci690_get_cpu_freq(void)
95{ 94{
96 u32 mem_ctlr_size; 95 unsigned long pll_cfg;
97 static u32 board_size; 96
98 static u8 first_time = 1; 97 pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27;
99 98 return cpci690_get_bus_freq() * cpu_750xx[pll_cfg]/2;
100 if (first_time) {
101 /* Using cpci690_set_bat() mapping ==> virt addr == phys addr */
102 switch (in_8((u8 *) (cpci690_br_base +
103 CPCI690_BR_MEM_CTLR)) & 0x07) {
104 case 0x01:
105 board_size = 256*MB;
106 break;
107 case 0x02:
108 board_size = 512*MB;
109 break;
110 case 0x03:
111 board_size = 768*MB;
112 break;
113 case 0x04:
114 board_size = 1*GB;
115 break;
116 case 0x05:
117 board_size = 1*GB + 512*MB;
118 break;
119 case 0x06:
120 board_size = 2*GB;
121 break;
122 default:
123 board_size = 0xffffffff; /* use mem ctlr size */
124 } /* switch */
125
126 mem_ctlr_size = mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
127 MV64x60_TYPE_GT64260A);
128
129 /* Check that mem ctlr & board reg agree. If not, pick MIN. */
130 if (board_size != mem_ctlr_size) {
131 printk(KERN_WARNING "Board register & memory controller"
132 "mem size disagree (board reg: 0x%lx, "
133 "mem ctlr: 0x%lx)\n",
134 (ulong)board_size, (ulong)mem_ctlr_size);
135 board_size = min(board_size, mem_ctlr_size);
136 }
137
138 first_time = 0;
139 } /* if */
140
141 return board_size;
142} 99}
143 100
144static void __init 101static void __init
@@ -228,7 +185,7 @@ cpci690_setup_peripherals(void)
228 mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, CPCI690_BR_BASE, 185 mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, CPCI690_BR_BASE,
229 CPCI690_BR_SIZE, 0); 186 CPCI690_BR_SIZE, 0);
230 bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); 187 bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
231 cpci690_br_base = (u32)ioremap(CPCI690_BR_BASE, CPCI690_BR_SIZE); 188 cpci690_br_base = ioremap(CPCI690_BR_BASE, CPCI690_BR_SIZE);
232 189
233 mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, CPCI690_TODC_BASE, 190 mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, CPCI690_TODC_BASE,
234 CPCI690_TODC_SIZE, 0); 191 CPCI690_TODC_SIZE, 0);
@@ -329,7 +286,7 @@ cpci690_fixup_mpsc_pdata(struct platform_device *pdev)
329 pdata->max_idle = 40; 286 pdata->max_idle = 40;
330 pdata->default_baud = CPCI690_MPSC_BAUD; 287 pdata->default_baud = CPCI690_MPSC_BAUD;
331 pdata->brg_clk_src = CPCI690_MPSC_CLK_SRC; 288 pdata->brg_clk_src = CPCI690_MPSC_CLK_SRC;
332 pdata->brg_clk_freq = CPCI690_BUS_FREQ; 289 pdata->brg_clk_freq = cpci690_get_bus_freq();
333} 290}
334 291
335static int __init 292static int __init
@@ -365,7 +322,7 @@ cpci690_reset_board(void)
365 u32 i = 10000; 322 u32 i = 10000;
366 323
367 local_irq_disable(); 324 local_irq_disable();
368 out_8((u8 *)(cpci690_br_base + CPCI690_BR_SW_RESET), 0x11); 325 out_8((cpci690_br_base + CPCI690_BR_SW_RESET), 0x11);
369 326
370 while (i != 0) i++; 327 while (i != 0) i++;
371 panic("restart failed\n"); 328 panic("restart failed\n");
@@ -394,10 +351,40 @@ cpci690_power_off(void)
394static int 351static int
395cpci690_show_cpuinfo(struct seq_file *m) 352cpci690_show_cpuinfo(struct seq_file *m)
396{ 353{
354 char *s;
355
356 seq_printf(m, "cpu MHz\t\t: %d\n",
357 (cpci690_get_cpu_freq() + 500000) / 1000000);
358 seq_printf(m, "bus MHz\t\t: %d\n",
359 (cpci690_get_bus_freq() + 500000) / 1000000);
397 seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n"); 360 seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n");
398 seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n"); 361 seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n");
399 seq_printf(m, "cpu MHz\t\t: %d\n", cpci690_get_cpu_speed()/1000/1000); 362 seq_printf(m, "FPGA Revision\t: %d\n",
400 seq_printf(m, "bus MHz\t\t: %d\n", CPCI690_BUS_FREQ/1000/1000); 363 in_8(cpci690_br_base + CPCI690_BR_MEM_CTLR) >> 5);
364
365 switch(bh.type) {
366 case MV64x60_TYPE_GT64260A:
367 s = "gt64260a";
368 break;
369 case MV64x60_TYPE_GT64260B:
370 s = "gt64260b";
371 break;
372 case MV64x60_TYPE_MV64360:
373 s = "mv64360";
374 break;
375 case MV64x60_TYPE_MV64460:
376 s = "mv64460";
377 break;
378 default:
379 s = "Unknown";
380 }
381 seq_printf(m, "bridge type\t: %s\n", s);
382 seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev);
383#if defined(CONFIG_NOT_COHERENT_CACHE)
384 seq_printf(m, "coherency\t: %s\n", "off");
385#else
386 seq_printf(m, "coherency\t: %s\n", "on");
387#endif
401 388
402 return 0; 389 return 0;
403} 390}
@@ -407,7 +394,7 @@ cpci690_calibrate_decr(void)
407{ 394{
408 ulong freq; 395 ulong freq;
409 396
410 freq = CPCI690_BUS_FREQ / 4; 397 freq = cpci690_get_bus_freq() / 4;
411 398
412 printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n", 399 printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
413 freq/1000000, freq%1000000); 400 freq/1000000, freq%1000000);
@@ -416,25 +403,12 @@ cpci690_calibrate_decr(void)
416 tb_to_us = mulhwu_scale_factor(freq, 1000000); 403 tb_to_us = mulhwu_scale_factor(freq, 1000000);
417} 404}
418 405
419static __inline__ void 406#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC)
420cpci690_set_bat(u32 addr, u32 size)
421{
422 addr &= 0xfffe0000;
423 size &= 0x1ffe0000;
424 size = ((size >> 17) - 1) << 2;
425
426 mb();
427 mtspr(SPRN_DBAT1U, addr | size | 0x2); /* Vs == 1; Vp == 0 */
428 mtspr(SPRN_DBAT1L, addr | 0x2a); /* WIMG bits == 0101; PP == r/w access */
429 mb();
430}
431
432#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
433static void __init 407static void __init
434cpci690_map_io(void) 408cpci690_map_io(void)
435{ 409{
436 io_block_mapping(CONFIG_MV64X60_NEW_BASE, CONFIG_MV64X60_NEW_BASE, 410 io_block_mapping(CONFIG_MV64X60_NEW_BASE, CONFIG_MV64X60_NEW_BASE,
437 128 * KB, _PAGE_IO); 411 128 * 1024, _PAGE_IO);
438} 412}
439#endif 413#endif
440 414
@@ -442,14 +416,15 @@ void __init
442platform_init(unsigned long r3, unsigned long r4, unsigned long r5, 416platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
443 unsigned long r6, unsigned long r7) 417 unsigned long r6, unsigned long r7)
444{ 418{
445#ifdef CONFIG_BLK_DEV_INITRD
446 initrd_start=initrd_end=0;
447 initrd_below_start_ok=0;
448#endif /* CONFIG_BLK_DEV_INITRD */
449
450 parse_bootinfo(find_bootinfo()); 419 parse_bootinfo(find_bootinfo());
451 420
452 loops_per_jiffy = cpci690_get_cpu_speed() / HZ; 421#ifdef CONFIG_BLK_DEV_INITRD
422 /* take care of initrd if we have one */
423 if (r4) {
424 initrd_start = r4 + KERNELBASE;
425 initrd_end = r5 + KERNELBASE;
426 }
427#endif /* CONFIG_BLK_DEV_INITRD */
453 428
454 isa_mem_base = 0; 429 isa_mem_base = 0;
455 430
@@ -460,7 +435,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
460 ppc_md.restart = cpci690_restart; 435 ppc_md.restart = cpci690_restart;
461 ppc_md.power_off = cpci690_power_off; 436 ppc_md.power_off = cpci690_power_off;
462 ppc_md.halt = cpci690_halt; 437 ppc_md.halt = cpci690_halt;
463 ppc_md.find_end_of_memory = cpci690_find_end_of_memory;
464 ppc_md.time_init = todc_time_init; 438 ppc_md.time_init = todc_time_init;
465 ppc_md.set_rtc_time = todc_set_rtc_time; 439 ppc_md.set_rtc_time = todc_set_rtc_time;
466 ppc_md.get_rtc_time = todc_get_rtc_time; 440 ppc_md.get_rtc_time = todc_get_rtc_time;
@@ -468,22 +442,13 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
468 ppc_md.nvram_write_val = todc_direct_write_val; 442 ppc_md.nvram_write_val = todc_direct_write_val;
469 ppc_md.calibrate_decr = cpci690_calibrate_decr; 443 ppc_md.calibrate_decr = cpci690_calibrate_decr;
470 444
471 /* 445#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC)
472 * Need to map in board regs (used by cpci690_find_end_of_memory())
473 * and the bridge's regs (used by progress);
474 */
475 cpci690_set_bat(CPCI690_BR_BASE, 32 * MB);
476 cpci690_br_base = CPCI690_BR_BASE;
477
478#ifdef CONFIG_SERIAL_TEXT_DEBUG
479 ppc_md.setup_io_mappings = cpci690_map_io; 446 ppc_md.setup_io_mappings = cpci690_map_io;
447#ifdef CONFIG_SERIAL_TEXT_DEBUG
480 ppc_md.progress = mv64x60_mpsc_progress; 448 ppc_md.progress = mv64x60_mpsc_progress;
481 mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE); 449 mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
482#endif /* CONFIG_SERIAL_TEXT_DEBUG */ 450#endif /* CONFIG_SERIAL_TEXT_DEBUG */
483#ifdef CONFIG_KGDB 451#endif /* defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC) */
484 ppc_md.setup_io_mappings = cpci690_map_io;
485 ppc_md.early_serial_map = cpci690_early_serial_map;
486#endif /* CONFIG_KGDB */
487 452
488#if defined(CONFIG_SERIAL_MPSC) 453#if defined(CONFIG_SERIAL_MPSC)
489 platform_notify = cpci690_platform_notify; 454 platform_notify = cpci690_platform_notify;
diff --git a/arch/ppc/platforms/cpci690.h b/arch/ppc/platforms/cpci690.h
index 36cd2673c742..49584c9cedf3 100644
--- a/arch/ppc/platforms/cpci690.h
+++ b/arch/ppc/platforms/cpci690.h
@@ -73,6 +73,4 @@ typedef struct board_info {
73#define CPCI690_MPSC_BAUD 9600 73#define CPCI690_MPSC_BAUD 9600
74#define CPCI690_MPSC_CLK_SRC 8 /* TCLK */ 74#define CPCI690_MPSC_CLK_SRC 8 /* TCLK */
75 75
76#define CPCI690_BUS_FREQ 133333333
77
78#endif /* __PPC_PLATFORMS_CPCI690_H */ 76#endif /* __PPC_PLATFORMS_CPCI690_H */
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
new file mode 100644
index 000000000000..9811a8a52c25
--- /dev/null
+++ b/arch/ppc/platforms/ev64360.c
@@ -0,0 +1,510 @@
1/*
2 * arch/ppc/platforms/ev64360.c
3 *
4 * Board setup routines for the Marvell EV-64360-BP Evaluation Board.
5 *
6 * Author: Lee Nicks <allinux@gmail.com>
7 *
8 * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
9 * Based on code done by - Mark A. Greer <mgreer@mvista.com>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/config.h>
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/kdev_t.h>
20#include <linux/console.h>
21#include <linux/initrd.h>
22#include <linux/root_dev.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/bootmem.h>
26#include <linux/mtd/physmap.h>
27#include <linux/mv643xx.h>
28#ifdef CONFIG_BOOTIMG
29#include <linux/bootimg.h>
30#endif
31#include <asm/page.h>
32#include <asm/time.h>
33#include <asm/smp.h>
34#include <asm/todc.h>
35#include <asm/bootinfo.h>
36#include <asm/ppcboot.h>
37#include <asm/mv64x60.h>
38#include <platforms/ev64360.h>
39
40#define BOARD_VENDOR "Marvell"
41#define BOARD_MACHINE "EV-64360-BP"
42
43static struct mv64x60_handle bh;
44static void __iomem *sram_base;
45
46static u32 ev64360_flash_size_0;
47static u32 ev64360_flash_size_1;
48
49static u32 ev64360_bus_frequency;
50
51unsigned char __res[sizeof(bd_t)];
52
53static int __init
54ev64360_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
55{
56 return 0;
57}
58
59static void __init
60ev64360_setup_bridge(void)
61{
62 struct mv64x60_setup_info si;
63 int i;
64
65 memset(&si, 0, sizeof(si));
66
67 si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
68
69 #ifdef CONFIG_PCI
70 si.pci_1.enable_bus = 1;
71 si.pci_1.pci_io.cpu_base = EV64360_PCI1_IO_START_PROC_ADDR;
72 si.pci_1.pci_io.pci_base_hi = 0;
73 si.pci_1.pci_io.pci_base_lo = EV64360_PCI1_IO_START_PCI_ADDR;
74 si.pci_1.pci_io.size = EV64360_PCI1_IO_SIZE;
75 si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
76 si.pci_1.pci_mem[0].cpu_base = EV64360_PCI1_MEM_START_PROC_ADDR;
77 si.pci_1.pci_mem[0].pci_base_hi = EV64360_PCI1_MEM_START_PCI_HI_ADDR;
78 si.pci_1.pci_mem[0].pci_base_lo = EV64360_PCI1_MEM_START_PCI_LO_ADDR;
79 si.pci_1.pci_mem[0].size = EV64360_PCI1_MEM_SIZE;
80 si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
81 si.pci_1.pci_cmd_bits = 0;
82 si.pci_1.latency_timer = 0x80;
83 #else
84 si.pci_0.enable_bus = 0;
85 si.pci_1.enable_bus = 0;
86 #endif
87
88 for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) {
89#if defined(CONFIG_NOT_COHERENT_CACHE)
90 si.cpu_prot_options[i] = 0;
91 si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
92 si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
93 si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
94
95 si.pci_1.acc_cntl_options[i] =
96 MV64360_PCI_ACC_CNTL_SNOOP_NONE |
97 MV64360_PCI_ACC_CNTL_SWAP_NONE |
98 MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
99 MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
100#else
101 si.cpu_prot_options[i] = 0;
102 si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; /* errata */
103 si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; /* errata */
104 si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; /* errata */
105
106 si.pci_1.acc_cntl_options[i] =
107 MV64360_PCI_ACC_CNTL_SNOOP_WB |
108 MV64360_PCI_ACC_CNTL_SWAP_NONE |
109 MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
110 MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES;
111#endif
112 }
113
114 if (mv64x60_init(&bh, &si))
115 printk(KERN_WARNING "Bridge initialization failed.\n");
116
117 #ifdef CONFIG_PCI
118 pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */
119 ppc_md.pci_swizzle = common_swizzle;
120 ppc_md.pci_map_irq = ev64360_map_irq;
121 ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
122
123 mv64x60_set_bus(&bh, 1, 0);
124 bh.hose_b->first_busno = 0;
125 bh.hose_b->last_busno = 0xff;
126 #endif
127}
128
129/* Bridge & platform setup routines */
130void __init
131ev64360_intr_setup(void)
132{
133 /* MPP 8, 9, and 10 */
134 mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff);
135
136 /*
137 * Define GPP 8,9,and 10 interrupt polarity as active low
138 * input signal and level triggered
139 */
140 mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, 0x700);
141 mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, 0x700);
142
143 /* Config GPP intr ctlr to respond to level trigger */
144 mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10));
145
146 /* Erranum FEr PCI-#8 */
147 mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1<<5) | (1<<9));
148 mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<5) | (1<<9));
149
150 /*
151 * Dismiss and then enable interrupt on GPP interrupt cause
152 * for CPU #0
153 */
154 mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~0x700);
155 mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, 0x700);
156
157 /*
158 * Dismiss and then enable interrupt on CPU #0 high cause reg
159 * BIT25 summarizes GPP interrupts 8-15
160 */
161 mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1<<25));
162}
163
164void __init
165ev64360_setup_peripherals(void)
166{
167 u32 base;
168
169 /* Set up window for boot CS */
170 mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
171 EV64360_BOOT_WINDOW_BASE, EV64360_BOOT_WINDOW_SIZE, 0);
172 bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
173
174 /* We only use the 32-bit flash */
175 mv64x60_get_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, &base,
176 &ev64360_flash_size_0);
177 ev64360_flash_size_1 = 0;
178
179 mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
180 EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE, 0);
181 bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
182
183 mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
184 EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0);
185 bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
186 sram_base = ioremap(EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE);
187
188 /* Set up Enet->SRAM window */
189 mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN,
190 EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0x2);
191 bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN);
192
193 /* Give enet r/w access to memory region */
194 mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_0, (0x3 << (4 << 1)));
195 mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_1, (0x3 << (4 << 1)));
196 mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_2, (0x3 << (4 << 1)));
197
198 mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3));
199 mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
200 ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24)));
201
202#if defined(CONFIG_NOT_COHERENT_CACHE)
203 mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x00160000);
204#else
205 mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2);
206#endif
207
208 /*
209 * Setting the SRAM to 0. Note that this generates parity errors on
210 * internal data path in SRAM since it's first time accessing it
211 * while after reset it's not configured.
212 */
213 memset(sram_base, 0, MV64360_SRAM_SIZE);
214
215 /* set up PCI interrupt controller */
216 ev64360_intr_setup();
217}
218
219static void __init
220ev64360_setup_arch(void)
221{
222 if (ppc_md.progress)
223 ppc_md.progress("ev64360_setup_arch: enter", 0);
224
225 set_tb(0, 0);
226
227#ifdef CONFIG_BLK_DEV_INITRD
228 if (initrd_start)
229 ROOT_DEV = Root_RAM0;
230 else
231#endif
232#ifdef CONFIG_ROOT_NFS
233 ROOT_DEV = Root_NFS;
234#else
235 ROOT_DEV = Root_SDA2;
236#endif
237
238 /*
239 * Set up the L2CR register.
240 */
241 _set_L2CR(L2CR_L2E | L2CR_L2PE);
242
243 if (ppc_md.progress)
244 ppc_md.progress("ev64360_setup_arch: calling setup_bridge", 0);
245
246 ev64360_setup_bridge();
247 ev64360_setup_peripherals();
248 ev64360_bus_frequency = ev64360_bus_freq();
249
250 printk(KERN_INFO "%s %s port (C) 2005 Lee Nicks "
251 "(allinux@gmail.com)\n", BOARD_VENDOR, BOARD_MACHINE);
252 if (ppc_md.progress)
253 ppc_md.progress("ev64360_setup_arch: exit", 0);
254}
255
256/* Platform device data fixup routines. */
257#if defined(CONFIG_SERIAL_MPSC)
258static void __init
259ev64360_fixup_mpsc_pdata(struct platform_device *pdev)
260{
261 struct mpsc_pdata *pdata;
262
263 pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
264
265 pdata->max_idle = 40;
266 pdata->default_baud = EV64360_DEFAULT_BAUD;
267 pdata->brg_clk_src = EV64360_MPSC_CLK_SRC;
268 /*
269 * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts,
270 * TCLK == SysCLK but on 64460, they are separate pins.
271 * SysCLK can go up to 200 MHz but TCLK can only go up to 133 MHz.
272 */
273 pdata->brg_clk_freq = min(ev64360_bus_frequency, MV64x60_TCLK_FREQ_MAX);
274}
275#endif
276
277#if defined(CONFIG_MV643XX_ETH)
278static void __init
279ev64360_fixup_eth_pdata(struct platform_device *pdev)
280{
281 struct mv643xx_eth_platform_data *eth_pd;
282 static u16 phy_addr[] = {
283 EV64360_ETH0_PHY_ADDR,
284 EV64360_ETH1_PHY_ADDR,
285 EV64360_ETH2_PHY_ADDR,
286 };
287
288 eth_pd = pdev->dev.platform_data;
289 eth_pd->force_phy_addr = 1;
290 eth_pd->phy_addr = phy_addr[pdev->id];
291 eth_pd->tx_queue_size = EV64360_ETH_TX_QUEUE_SIZE;
292 eth_pd->rx_queue_size = EV64360_ETH_RX_QUEUE_SIZE;
293}
294#endif
295
296static int __init
297ev64360_platform_notify(struct device *dev)
298{
299 static struct {
300 char *bus_id;
301 void ((*rtn)(struct platform_device *pdev));
302 } dev_map[] = {
303#if defined(CONFIG_SERIAL_MPSC)
304 { MPSC_CTLR_NAME ".0", ev64360_fixup_mpsc_pdata },
305 { MPSC_CTLR_NAME ".1", ev64360_fixup_mpsc_pdata },
306#endif
307#if defined(CONFIG_MV643XX_ETH)
308 { MV643XX_ETH_NAME ".0", ev64360_fixup_eth_pdata },
309 { MV643XX_ETH_NAME ".1", ev64360_fixup_eth_pdata },
310 { MV643XX_ETH_NAME ".2", ev64360_fixup_eth_pdata },
311#endif
312 };
313 struct platform_device *pdev;
314 int i;
315
316 if (dev && dev->bus_id)
317 for (i=0; i<ARRAY_SIZE(dev_map); i++)
318 if (!strncmp(dev->bus_id, dev_map[i].bus_id,
319 BUS_ID_SIZE)) {
320
321 pdev = container_of(dev,
322 struct platform_device, dev);
323 dev_map[i].rtn(pdev);
324 }
325
326 return 0;
327}
328
329#ifdef CONFIG_MTD_PHYSMAP
330
331#ifndef MB
332#define MB (1 << 20)
333#endif
334
335/*
336 * MTD Layout.
337 *
338 * FLASH Amount: 0xff000000 - 0xffffffff
339 * ------------- -----------------------
340 * Reserved: 0xff000000 - 0xff03ffff
341 * JFFS2 file system: 0xff040000 - 0xffefffff
342 * U-boot: 0xfff00000 - 0xffffffff
343 */
344static int __init
345ev64360_setup_mtd(void)
346{
347 u32 size;
348 int ptbl_entries;
349 static struct mtd_partition *ptbl;
350
351 size = ev64360_flash_size_0 + ev64360_flash_size_1;
352 if (!size)
353 return -ENOMEM;
354
355 ptbl_entries = 3;
356
357 if ((ptbl = kmalloc(ptbl_entries * sizeof(struct mtd_partition),
358 GFP_KERNEL)) == NULL) {
359
360 printk(KERN_WARNING "Can't alloc MTD partition table\n");
361 return -ENOMEM;
362 }
363 memset(ptbl, 0, ptbl_entries * sizeof(struct mtd_partition));
364
365 ptbl[0].name = "reserved";
366 ptbl[0].offset = 0;
367 ptbl[0].size = EV64360_MTD_RESERVED_SIZE;
368 ptbl[1].name = "jffs2";
369 ptbl[1].offset = EV64360_MTD_RESERVED_SIZE;
370 ptbl[1].size = EV64360_MTD_JFFS2_SIZE;
371 ptbl[2].name = "U-BOOT";
372 ptbl[2].offset = EV64360_MTD_RESERVED_SIZE + EV64360_MTD_JFFS2_SIZE;
373 ptbl[2].size = EV64360_MTD_UBOOT_SIZE;
374
375 physmap_map.size = size;
376 physmap_set_partitions(ptbl, ptbl_entries);
377 return 0;
378}
379
380arch_initcall(ev64360_setup_mtd);
381#endif
382
383static void
384ev64360_restart(char *cmd)
385{
386 ulong i = 0xffffffff;
387 volatile unsigned char * rtc_base = ioremap(EV64360_RTC_WINDOW_BASE,0x4000);
388
389 /* issue hard reset */
390 rtc_base[0xf] = 0x80;
391 rtc_base[0xc] = 0x00;
392 rtc_base[0xd] = 0x01;
393 rtc_base[0xf] = 0x83;
394
395 while (i-- > 0) ;
396 panic("restart failed\n");
397}
398
399static void
400ev64360_halt(void)
401{
402 while (1) ;
403 /* NOTREACHED */
404}
405
406static void
407ev64360_power_off(void)
408{
409 ev64360_halt();
410 /* NOTREACHED */
411}
412
413static int
414ev64360_show_cpuinfo(struct seq_file *m)
415{
416 seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n");
417 seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n");
418 seq_printf(m, "bus speed\t: %dMHz\n", ev64360_bus_frequency/1000/1000);
419
420 return 0;
421}
422
423static void __init
424ev64360_calibrate_decr(void)
425{
426 u32 freq;
427
428 freq = ev64360_bus_frequency / 4;
429
430 printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
431 (long)freq / 1000000, (long)freq % 1000000);
432
433 tb_ticks_per_jiffy = freq / HZ;
434 tb_to_us = mulhwu_scale_factor(freq, 1000000);
435}
436
437unsigned long __init
438ev64360_find_end_of_memory(void)
439{
440 return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
441 MV64x60_TYPE_MV64360);
442}
443
444static inline void
445ev64360_set_bat(void)
446{
447 mb();
448 mtspr(SPRN_DBAT2U, 0xf0001ffe);
449 mtspr(SPRN_DBAT2L, 0xf000002a);
450 mb();
451}
452
453#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
454static void __init
455ev64360_map_io(void)
456{
457 io_block_mapping(CONFIG_MV64X60_NEW_BASE, \
458 CONFIG_MV64X60_NEW_BASE, \
459 0x00020000, _PAGE_IO);
460}
461#endif
462
463void __init
464platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
465 unsigned long r6, unsigned long r7)
466{
467 parse_bootinfo(find_bootinfo());
468
469 /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer)
470 * are non-zero, then we should use the board info from the bd_t
471 * structure and the cmdline pointed to by r6 instead of the
472 * information from birecs, if any. Otherwise, use the information
473 * from birecs as discovered by the preceeding call to
474 * parse_bootinfo(). This rule should work with both PPCBoot, which
475 * uses a bd_t board info structure, and the kernel boot wrapper,
476 * which uses birecs.
477 */
478 if (r3 && r6) {
479 /* copy board info structure */
480 memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
481 /* copy command line */
482 *(char *)(r7+KERNELBASE) = 0;
483 strcpy(cmd_line, (char *)(r6+KERNELBASE));
484 }
485 #ifdef CONFIG_ISA
486 isa_mem_base = 0;
487 #endif
488
489 ppc_md.setup_arch = ev64360_setup_arch;
490 ppc_md.show_cpuinfo = ev64360_show_cpuinfo;
491 ppc_md.init_IRQ = mv64360_init_irq;
492 ppc_md.get_irq = mv64360_get_irq;
493 ppc_md.restart = ev64360_restart;
494 ppc_md.power_off = ev64360_power_off;
495 ppc_md.halt = ev64360_halt;
496 ppc_md.find_end_of_memory = ev64360_find_end_of_memory;
497 ppc_md.calibrate_decr = ev64360_calibrate_decr;
498
499#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
500 ppc_md.setup_io_mappings = ev64360_map_io;
501 ppc_md.progress = mv64x60_mpsc_progress;
502 mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
503#endif
504
505#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
506 platform_notify = ev64360_platform_notify;
507#endif
508
509 ev64360_set_bat(); /* Need for ev64360_find_end_of_memory and progress */
510}
diff --git a/arch/ppc/platforms/ev64360.h b/arch/ppc/platforms/ev64360.h
new file mode 100644
index 000000000000..68eabe490397
--- /dev/null
+++ b/arch/ppc/platforms/ev64360.h
@@ -0,0 +1,116 @@
1/*
2 * arch/ppc/platforms/ev64360.h
3 *
4 * Definitions for Marvell EV-64360-BP Evaluation Board.
5 *
6 * Author: Lee Nicks <allinux@gmail.com>
7 *
8 * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
9 * Based on code done by Mark A. Greer <mgreer@mvista.com>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17/*
18 * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to
19 * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
20 * We'll only use one PCI MEM window on each PCI bus.
21 *
22 * This is the CPU physical memory map (windows must be at least 64KB and start
23 * on a boundary that is a multiple of the window size):
24 *
25 * 0x42000000-0x4203ffff - Internal SRAM
26 * 0xf1000000-0xf100ffff - MV64360 Registers (CONFIG_MV64X60_NEW_BASE)
27 * 0xfc800000-0xfcffffff - RTC
28 * 0xff000000-0xffffffff - Boot window, 16 MB flash
29 * 0xc0000000-0xc3ffffff - PCI I/O (second hose)
30 * 0x80000000-0xbfffffff - PCI MEM (second hose)
31 */
32
33#ifndef __PPC_PLATFORMS_EV64360_H
34#define __PPC_PLATFORMS_EV64360_H
35
36/* CPU Physical Memory Map setup. */
37#define EV64360_BOOT_WINDOW_BASE 0xff000000
38#define EV64360_BOOT_WINDOW_SIZE 0x01000000 /* 16 MB */
39#define EV64360_INTERNAL_SRAM_BASE 0x42000000
40#define EV64360_RTC_WINDOW_BASE 0xfc800000
41#define EV64360_RTC_WINDOW_SIZE 0x00800000 /* 8 MB */
42
43#define EV64360_PCI1_MEM_START_PROC_ADDR 0x80000000
44#define EV64360_PCI1_MEM_START_PCI_HI_ADDR 0x00000000
45#define EV64360_PCI1_MEM_START_PCI_LO_ADDR 0x80000000
46#define EV64360_PCI1_MEM_SIZE 0x40000000 /* 1 GB */
47#define EV64360_PCI1_IO_START_PROC_ADDR 0xc0000000
48#define EV64360_PCI1_IO_START_PCI_ADDR 0x00000000
49#define EV64360_PCI1_IO_SIZE 0x04000000 /* 64 MB */
50
51#define EV64360_DEFAULT_BAUD 115200
52#define EV64360_MPSC_CLK_SRC 8 /* TCLK */
53#define EV64360_MPSC_CLK_FREQ 133333333
54
55#define EV64360_MTD_RESERVED_SIZE 0x40000
56#define EV64360_MTD_JFFS2_SIZE 0xec0000
57#define EV64360_MTD_UBOOT_SIZE 0x100000
58
59#define EV64360_ETH0_PHY_ADDR 8
60#define EV64360_ETH1_PHY_ADDR 9
61#define EV64360_ETH2_PHY_ADDR 10
62
63#define EV64360_ETH_TX_QUEUE_SIZE 800
64#define EV64360_ETH_RX_QUEUE_SIZE 400
65
66#define EV64360_ETH_PORT_CONFIG_VALUE \
67 ETH_UNICAST_NORMAL_MODE | \
68 ETH_DEFAULT_RX_QUEUE_0 | \
69 ETH_DEFAULT_RX_ARP_QUEUE_0 | \
70 ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
71 ETH_RECEIVE_BC_IF_IP | \
72 ETH_RECEIVE_BC_IF_ARP | \
73 ETH_CAPTURE_TCP_FRAMES_DIS | \
74 ETH_CAPTURE_UDP_FRAMES_DIS | \
75 ETH_DEFAULT_RX_TCP_QUEUE_0 | \
76 ETH_DEFAULT_RX_UDP_QUEUE_0 | \
77 ETH_DEFAULT_RX_BPDU_QUEUE_0
78
79#define EV64360_ETH_PORT_CONFIG_EXTEND_VALUE \
80 ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
81 ETH_PARTITION_DISABLE
82
83#define GT_ETH_IPG_INT_RX(value) \
84 ((value & 0x3fff) << 8)
85
86#define EV64360_ETH_PORT_SDMA_CONFIG_VALUE \
87 ETH_RX_BURST_SIZE_4_64BIT | \
88 GT_ETH_IPG_INT_RX(0) | \
89 ETH_TX_BURST_SIZE_4_64BIT
90
91#define EV64360_ETH_PORT_SERIAL_CONTROL_VALUE \
92 ETH_FORCE_LINK_PASS | \
93 ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
94 ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
95 ETH_ADV_SYMMETRIC_FLOW_CTRL | \
96 ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
97 ETH_FORCE_BP_MODE_NO_JAM | \
98 BIT9 | \
99 ETH_DO_NOT_FORCE_LINK_FAIL | \
100 ETH_RETRANSMIT_16_ATTEMPTS | \
101 ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
102 ETH_DTE_ADV_0 | \
103 ETH_DISABLE_AUTO_NEG_BYPASS | \
104 ETH_AUTO_NEG_NO_CHANGE | \
105 ETH_MAX_RX_PACKET_9700BYTE | \
106 ETH_CLR_EXT_LOOPBACK | \
107 ETH_SET_FULL_DUPLEX_MODE | \
108 ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX
109
110static inline u32
111ev64360_bus_freq(void)
112{
113 return 133333333;
114}
115
116#endif /* __PPC_PLATFORMS_EV64360_H */
diff --git a/arch/ppc/platforms/k2.c b/arch/ppc/platforms/k2.c
deleted file mode 100644
index aacb438708ff..000000000000
--- a/arch/ppc/platforms/k2.c
+++ /dev/null
@@ -1,613 +0,0 @@
1/*
2 * arch/ppc/platforms/k2.c
3 *
4 * Board setup routines for SBS K2
5 *
6 * Author: Matt Porter <mporter@mvista.com>
7 *
8 * Updated by: Randy Vinson <rvinson@mvista.com.
9 *
10 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15
16#include <linux/config.h>
17#include <linux/stddef.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/errno.h>
21#include <linux/reboot.h>
22#include <linux/pci.h>
23#include <linux/kdev_t.h>
24#include <linux/types.h>
25#include <linux/major.h>
26#include <linux/initrd.h>
27#include <linux/console.h>
28#include <linux/delay.h>
29#include <linux/ide.h>
30#include <linux/irq.h>
31#include <linux/seq_file.h>
32#include <linux/root_dev.h>
33
34#include <asm/system.h>
35#include <asm/pgtable.h>
36#include <asm/page.h>
37#include <asm/dma.h>
38#include <asm/io.h>
39#include <asm/machdep.h>
40#include <asm/time.h>
41#include <asm/i8259.h>
42#include <asm/todc.h>
43#include <asm/bootinfo.h>
44
45#include <syslib/cpc710.h>
46#include "k2.h"
47
48extern unsigned long loops_per_jiffy;
49extern void gen550_progress(char *, unsigned short);
50
51static unsigned int cpu_7xx[16] = {
52 0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
53};
54static unsigned int cpu_6xx[16] = {
55 0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0
56};
57
58static inline int __init
59k2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
60{
61 struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
62 /*
63 * Check our hose index. If we are zero then we are on the
64 * local PCI hose, otherwise we are on the cPCI hose.
65 */
66 if (!hose->index) {
67 static char pci_irq_table[][4] =
68 /*
69 * PCI IDSEL/INTPIN->INTLINE
70 * A B C D
71 */
72 {
73 {1, 0, 0, 0}, /* Ethernet */
74 {5, 5, 5, 5}, /* PMC Site 1 */
75 {6, 6, 6, 6}, /* PMC Site 2 */
76 {0, 0, 0, 0}, /* unused */
77 {0, 0, 0, 0}, /* unused */
78 {0, 0, 0, 0}, /* PCI-ISA Bridge */
79 {0, 0, 0, 0}, /* unused */
80 {0, 0, 0, 0}, /* unused */
81 {0, 0, 0, 0}, /* unused */
82 {0, 0, 0, 0}, /* unused */
83 {0, 0, 0, 0}, /* unused */
84 {0, 0, 0, 0}, /* unused */
85 {0, 0, 0, 0}, /* unused */
86 {0, 0, 0, 0}, /* unused */
87 {15, 0, 0, 0}, /* M5229 IDE */
88 };
89 const long min_idsel = 3, max_idsel = 17, irqs_per_slot = 4;
90 return PCI_IRQ_TABLE_LOOKUP;
91 } else {
92 static char pci_irq_table[][4] =
93 /*
94 * PCI IDSEL/INTPIN->INTLINE
95 * A B C D
96 */
97 {
98 {10, 11, 12, 9}, /* cPCI slot 8 */
99 {11, 12, 9, 10}, /* cPCI slot 7 */
100 {12, 9, 10, 11}, /* cPCI slot 6 */
101 {9, 10, 11, 12}, /* cPCI slot 5 */
102 {10, 11, 12, 9}, /* cPCI slot 4 */
103 {11, 12, 9, 10}, /* cPCI slot 3 */
104 {12, 9, 10, 11}, /* cPCI slot 2 */
105 };
106 const long min_idsel = 15, max_idsel = 21, irqs_per_slot = 4;
107 return PCI_IRQ_TABLE_LOOKUP;
108 }
109}
110
111void k2_pcibios_fixup(void)
112{
113#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
114 struct pci_dev *ide_dev;
115
116 /*
117 * Enable DMA support on hdc
118 */
119 ide_dev = pci_get_device(PCI_VENDOR_ID_AL,
120 PCI_DEVICE_ID_AL_M5229, NULL);
121
122 if (ide_dev) {
123
124 unsigned long ide_dma_base;
125
126 ide_dma_base = pci_resource_start(ide_dev, 4);
127 outb(0x00, ide_dma_base + 0x2);
128 outb(0x20, ide_dma_base + 0xa);
129 pci_dev_put(ide_dev);
130 }
131#endif
132}
133
134void k2_pcibios_fixup_resources(struct pci_dev *dev)
135{
136 int i;
137
138 if ((dev->vendor == PCI_VENDOR_ID_IBM) &&
139 (dev->device == PCI_DEVICE_ID_IBM_CPC710_PCI64)) {
140 pr_debug("Fixup CPC710 resources\n");
141 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
142 dev->resource[i].start = 0;
143 dev->resource[i].end = 0;
144 }
145 }
146}
147
148void k2_setup_hoses(void)
149{
150 struct pci_controller *hose_a, *hose_b;
151
152 /*
153 * Reconfigure CPC710 memory map so
154 * we have some more PCI memory space.
155 */
156
157 /* Set FPHB mode */
158 __raw_writel(0x808000e0, PGCHP); /* Set FPHB mode */
159
160 /* PCI32 mappings */
161 __raw_writel(0x00000000, K2_PCI32_BAR + PIBAR); /* PCI I/O base */
162 __raw_writel(0x00000000, K2_PCI32_BAR + PMBAR); /* PCI Mem base */
163 __raw_writel(0xf0000000, K2_PCI32_BAR + MSIZE); /* 256MB */
164 __raw_writel(0xfff00000, K2_PCI32_BAR + IOSIZE); /* 1MB */
165 __raw_writel(0xc0000000, K2_PCI32_BAR + SMBAR); /* Base@0xc0000000 */
166 __raw_writel(0x80000000, K2_PCI32_BAR + SIBAR); /* Base@0x80000000 */
167 __raw_writel(0x000000c0, K2_PCI32_BAR + PSSIZE); /* 1GB space */
168 __raw_writel(0x000000c0, K2_PCI32_BAR + PPSIZE); /* 1GB space */
169 __raw_writel(0x00000000, K2_PCI32_BAR + BARPS); /* Base@0x00000000 */
170 __raw_writel(0x00000000, K2_PCI32_BAR + BARPP); /* Base@0x00000000 */
171 __raw_writel(0x00000080, K2_PCI32_BAR + PSBAR); /* Base@0x80 */
172 __raw_writel(0x00000000, K2_PCI32_BAR + PPBAR);
173
174 __raw_writel(0xc0000000, K2_PCI32_BAR + BPMDLK);
175 __raw_writel(0xd0000000, K2_PCI32_BAR + TPMDLK);
176 __raw_writel(0x80000000, K2_PCI32_BAR + BIODLK);
177 __raw_writel(0x80100000, K2_PCI32_BAR + TIODLK);
178 __raw_writel(0xe0008000, K2_PCI32_BAR + DLKCTRL);
179 __raw_writel(0xffffffff, K2_PCI32_BAR + DLKDEV);
180
181 /* PCI64 mappings */
182 __raw_writel(0x00100000, K2_PCI64_BAR + PIBAR); /* PCI I/O base */
183 __raw_writel(0x10000000, K2_PCI64_BAR + PMBAR); /* PCI Mem base */
184 __raw_writel(0xf0000000, K2_PCI64_BAR + MSIZE); /* 256MB */
185 __raw_writel(0xfff00000, K2_PCI64_BAR + IOSIZE); /* 1MB */
186 __raw_writel(0xd0000000, K2_PCI64_BAR + SMBAR); /* Base@0xd0000000 */
187 __raw_writel(0x80100000, K2_PCI64_BAR + SIBAR); /* Base@0x80100000 */
188 __raw_writel(0x000000c0, K2_PCI64_BAR + PSSIZE); /* 1GB space */
189 __raw_writel(0x000000c0, K2_PCI64_BAR + PPSIZE); /* 1GB space */
190 __raw_writel(0x00000000, K2_PCI64_BAR + BARPS); /* Base@0x00000000 */
191 __raw_writel(0x00000000, K2_PCI64_BAR + BARPP); /* Base@0x00000000 */
192
193 /* Setup PCI32 hose */
194 hose_a = pcibios_alloc_controller();
195 if (!hose_a)
196 return;
197
198 hose_a->first_busno = 0;
199 hose_a->last_busno = 0xff;
200 hose_a->pci_mem_offset = K2_PCI32_MEM_BASE;
201
202 pci_init_resource(&hose_a->io_resource,
203 K2_PCI32_LOWER_IO,
204 K2_PCI32_UPPER_IO,
205 IORESOURCE_IO, "PCI32 host bridge");
206
207 pci_init_resource(&hose_a->mem_resources[0],
208 K2_PCI32_LOWER_MEM + K2_PCI32_MEM_BASE,
209 K2_PCI32_UPPER_MEM + K2_PCI32_MEM_BASE,
210 IORESOURCE_MEM, "PCI32 host bridge");
211
212 hose_a->io_space.start = K2_PCI32_LOWER_IO;
213 hose_a->io_space.end = K2_PCI32_UPPER_IO;
214 hose_a->mem_space.start = K2_PCI32_LOWER_MEM;
215 hose_a->mem_space.end = K2_PCI32_UPPER_MEM;
216 hose_a->io_base_virt = (void *)K2_ISA_IO_BASE;
217
218 setup_indirect_pci(hose_a, K2_PCI32_CONFIG_ADDR, K2_PCI32_CONFIG_DATA);
219
220 /* Initialize PCI32 bus registers */
221 early_write_config_byte(hose_a,
222 hose_a->first_busno,
223 PCI_DEVFN(0, 0),
224 CPC710_BUS_NUMBER, hose_a->first_busno);
225
226 early_write_config_byte(hose_a,
227 hose_a->first_busno,
228 PCI_DEVFN(0, 0),
229 CPC710_SUB_BUS_NUMBER, hose_a->last_busno);
230
231 /* Enable PCI interrupt polling */
232 early_write_config_byte(hose_a,
233 hose_a->first_busno,
234 PCI_DEVFN(8, 0), 0x45, 0x80);
235
236 /* Route polled PCI interrupts */
237 early_write_config_byte(hose_a,
238 hose_a->first_busno,
239 PCI_DEVFN(8, 0), 0x48, 0x58);
240
241 early_write_config_byte(hose_a,
242 hose_a->first_busno,
243 PCI_DEVFN(8, 0), 0x49, 0x07);
244
245 early_write_config_byte(hose_a,
246 hose_a->first_busno,
247 PCI_DEVFN(8, 0), 0x4a, 0x31);
248
249 early_write_config_byte(hose_a,
250 hose_a->first_busno,
251 PCI_DEVFN(8, 0), 0x4b, 0xb9);
252
253 /* route secondary IDE channel interrupt to IRQ 15 */
254 early_write_config_byte(hose_a,
255 hose_a->first_busno,
256 PCI_DEVFN(8, 0), 0x75, 0x0f);
257
258 /* enable IDE controller IDSEL */
259 early_write_config_byte(hose_a,
260 hose_a->first_busno,
261 PCI_DEVFN(8, 0), 0x58, 0x48);
262
263 /* Enable IDE function */
264 early_write_config_byte(hose_a,
265 hose_a->first_busno,
266 PCI_DEVFN(17, 0), 0x50, 0x03);
267
268 /* Set M5229 IDE controller to native mode */
269 early_write_config_byte(hose_a,
270 hose_a->first_busno,
271 PCI_DEVFN(17, 0), PCI_CLASS_PROG, 0xdf);
272
273 hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
274
275 /* Write out correct max subordinate bus number for hose A */
276 early_write_config_byte(hose_a,
277 hose_a->first_busno,
278 PCI_DEVFN(0, 0),
279 CPC710_SUB_BUS_NUMBER, hose_a->last_busno);
280
281 /* Only setup PCI64 hose if we are in the system slot */
282 if (!(readb(K2_MISC_REG) & K2_SYS_SLOT_MASK)) {
283 /* Setup PCI64 hose */
284 hose_b = pcibios_alloc_controller();
285 if (!hose_b)
286 return;
287
288 hose_b->first_busno = hose_a->last_busno + 1;
289 hose_b->last_busno = 0xff;
290
291 /* Reminder: quit changing the following, it is correct. */
292 hose_b->pci_mem_offset = K2_PCI32_MEM_BASE;
293
294 pci_init_resource(&hose_b->io_resource,
295 K2_PCI64_LOWER_IO,
296 K2_PCI64_UPPER_IO,
297 IORESOURCE_IO, "PCI64 host bridge");
298
299 pci_init_resource(&hose_b->mem_resources[0],
300 K2_PCI64_LOWER_MEM + K2_PCI32_MEM_BASE,
301 K2_PCI64_UPPER_MEM + K2_PCI32_MEM_BASE,
302 IORESOURCE_MEM, "PCI64 host bridge");
303
304 hose_b->io_space.start = K2_PCI64_LOWER_IO;
305 hose_b->io_space.end = K2_PCI64_UPPER_IO;
306 hose_b->mem_space.start = K2_PCI64_LOWER_MEM;
307 hose_b->mem_space.end = K2_PCI64_UPPER_MEM;
308 hose_b->io_base_virt = (void *)K2_ISA_IO_BASE;
309
310 setup_indirect_pci(hose_b,
311 K2_PCI64_CONFIG_ADDR, K2_PCI64_CONFIG_DATA);
312
313 /* Initialize PCI64 bus registers */
314 early_write_config_byte(hose_b,
315 0,
316 PCI_DEVFN(0, 0),
317 CPC710_SUB_BUS_NUMBER, 0xff);
318
319 early_write_config_byte(hose_b,
320 0,
321 PCI_DEVFN(0, 0),
322 CPC710_BUS_NUMBER, hose_b->first_busno);
323
324 hose_b->last_busno = pciauto_bus_scan(hose_b,
325 hose_b->first_busno);
326
327 /* Write out correct max subordinate bus number for hose B */
328 early_write_config_byte(hose_b,
329 hose_b->first_busno,
330 PCI_DEVFN(0, 0),
331 CPC710_SUB_BUS_NUMBER,
332 hose_b->last_busno);
333
334 /* Configure PCI64 PSBAR */
335 early_write_config_dword(hose_b,
336 hose_b->first_busno,
337 PCI_DEVFN(0, 0),
338 PCI_BASE_ADDRESS_0,
339 K2_PCI64_SYS_MEM_BASE);
340 }
341
342 /* Configure i8259 level/edge settings */
343 outb(0x62, 0x4d0);
344 outb(0xde, 0x4d1);
345
346#ifdef CONFIG_CPC710_DATA_GATHERING
347 {
348 unsigned int tmp;
349 tmp = __raw_readl(ABCNTL);
350 /* Enable data gathering on both PCI interfaces */
351 __raw_writel(tmp | 0x05000000, ABCNTL);
352 }
353#endif
354
355 ppc_md.pcibios_fixup = k2_pcibios_fixup;
356 ppc_md.pcibios_fixup_resources = k2_pcibios_fixup_resources;
357 ppc_md.pci_swizzle = common_swizzle;
358 ppc_md.pci_map_irq = k2_map_irq;
359}
360
361static int k2_get_bus_speed(void)
362{
363 int bus_speed;
364 unsigned char board_id;
365
366 board_id = *(unsigned char *)K2_BOARD_ID_REG;
367
368 switch (K2_BUS_SPD(board_id)) {
369
370 case 0:
371 default:
372 bus_speed = 100000000;
373 break;
374
375 case 1:
376 bus_speed = 83333333;
377 break;
378
379 case 2:
380 bus_speed = 75000000;
381 break;
382
383 case 3:
384 bus_speed = 66666666;
385 break;
386 }
387 return bus_speed;
388}
389
390static int k2_get_cpu_speed(void)
391{
392 unsigned long hid1;
393 int cpu_speed;
394
395 hid1 = mfspr(SPRN_HID1) >> 28;
396
397 if ((mfspr(SPRN_PVR) >> 16) == 8)
398 hid1 = cpu_7xx[hid1];
399 else
400 hid1 = cpu_6xx[hid1];
401
402 cpu_speed = k2_get_bus_speed() * hid1 / 2;
403 return cpu_speed;
404}
405
406static void __init k2_calibrate_decr(void)
407{
408 int freq, divisor = 4;
409
410 /* determine processor bus speed */
411 freq = k2_get_bus_speed();
412 tb_ticks_per_jiffy = freq / HZ / divisor;
413 tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
414}
415
416static int k2_show_cpuinfo(struct seq_file *m)
417{
418 unsigned char k2_geo_bits, k2_system_slot;
419
420 seq_printf(m, "vendor\t\t: SBS\n");
421 seq_printf(m, "machine\t\t: K2\n");
422 seq_printf(m, "cpu speed\t: %dMhz\n", k2_get_cpu_speed() / 1000000);
423 seq_printf(m, "bus speed\t: %dMhz\n", k2_get_bus_speed() / 1000000);
424 seq_printf(m, "memory type\t: SDRAM\n");
425
426 k2_geo_bits = readb(K2_MSIZ_GEO_REG) & K2_GEO_ADR_MASK;
427 k2_system_slot = !(readb(K2_MISC_REG) & K2_SYS_SLOT_MASK);
428 seq_printf(m, "backplane\t: %s slot board",
429 k2_system_slot ? "System" : "Non system");
430 seq_printf(m, "with geographical address %x\n", k2_geo_bits);
431
432 return 0;
433}
434
435TODC_ALLOC();
436
437static void __init k2_setup_arch(void)
438{
439 unsigned int cpu;
440
441 /* Setup TODC access */
442 TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
443 ioremap(K2_RTC_BASE_ADDRESS, K2_RTC_SIZE), 8);
444
445 /* init to some ~sane value until calibrate_delay() runs */
446 loops_per_jiffy = 50000000 / HZ;
447
448 /* make FLASH transactions higher priority than PCI to avoid deadlock */
449 __raw_writel(__raw_readl(SIOC1) | 0x80000000, SIOC1);
450
451 /* Set hardware to access FLASH page 2 */
452 __raw_writel(1 << 29, GPOUT);
453
454 /* Setup PCI host bridges */
455 k2_setup_hoses();
456
457#ifdef CONFIG_BLK_DEV_INITRD
458 if (initrd_start)
459 ROOT_DEV = Root_RAM0;
460 else
461#endif
462#ifdef CONFIG_ROOT_NFS
463 ROOT_DEV = Root_NFS;
464#else
465 ROOT_DEV = Root_HDC1;
466#endif
467
468 /* Identify the system */
469 printk(KERN_INFO "System Identification: SBS K2 - PowerPC 750 @ "
470 "%d Mhz\n", k2_get_cpu_speed() / 1000000);
471 printk(KERN_INFO "Port by MontaVista Software, Inc. "
472 "(source@mvista.com)\n");
473
474 /* Identify the CPU manufacturer */
475 cpu = PVR_REV(mfspr(SPRN_PVR));
476 printk(KERN_INFO "CPU manufacturer: %s [rev=%04x]\n",
477 (cpu & (1 << 15)) ? "IBM" : "Motorola", cpu);
478}
479
480static void k2_restart(char *cmd)
481{
482 local_irq_disable();
483
484 /* Flip FLASH back to page 1 to access firmware image */
485 __raw_writel(0, GPOUT);
486
487 /* SRR0 has system reset vector, SRR1 has default MSR value */
488 /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
489 mtspr(SPRN_SRR0, 0xfff00100);
490 mtspr(SPRN_SRR1, 0);
491 __asm__ __volatile__("rfi\n\t");
492
493 /* not reached */
494 for (;;) ;
495}
496
497static void k2_power_off(void)
498{
499 for (;;) ;
500}
501
502static void k2_halt(void)
503{
504 k2_restart(NULL);
505}
506
507/*
508 * Set BAT 3 to map PCI32 I/O space.
509 */
510static __inline__ void k2_set_bat(void)
511{
512 /* wait for all outstanding memory accesses to complete */
513 mb();
514
515 /* setup DBATs */
516 mtspr(SPRN_DBAT2U, 0x80001ffe);
517 mtspr(SPRN_DBAT2L, 0x8000002a);
518 mtspr(SPRN_DBAT3U, 0xf0001ffe);
519 mtspr(SPRN_DBAT3L, 0xf000002a);
520
521 /* wait for updates */
522 mb();
523}
524
525static unsigned long __init k2_find_end_of_memory(void)
526{
527 unsigned long total;
528 unsigned char msize = 7; /* Default to 128MB */
529
530 msize = K2_MEM_SIZE(readb(K2_MSIZ_GEO_REG));
531
532 switch (msize) {
533 case 2:
534 /*
535 * This will break without a lowered
536 * KERNELBASE or CONFIG_HIGHMEM on.
537 * It seems non 1GB builds exist yet,
538 * though.
539 */
540 total = K2_MEM_SIZE_1GB;
541 break;
542 case 3:
543 case 4:
544 total = K2_MEM_SIZE_512MB;
545 break;
546 case 5:
547 case 6:
548 total = K2_MEM_SIZE_256MB;
549 break;
550 case 7:
551 total = K2_MEM_SIZE_128MB;
552 break;
553 default:
554 printk
555 ("K2: Invalid memory size detected, defaulting to 128MB\n");
556 total = K2_MEM_SIZE_128MB;
557 break;
558 }
559 return total;
560}
561
562static void __init k2_map_io(void)
563{
564 io_block_mapping(K2_PCI32_IO_BASE,
565 K2_PCI32_IO_BASE, 0x00200000, _PAGE_IO);
566 io_block_mapping(0xff000000, 0xff000000, 0x01000000, _PAGE_IO);
567}
568
569static void __init k2_init_irq(void)
570{
571 int i;
572
573 for (i = 0; i < 16; i++)
574 irq_desc[i].handler = &i8259_pic;
575
576 i8259_init(0);
577}
578
579void __init platform_init(unsigned long r3, unsigned long r4,
580 unsigned long r5, unsigned long r6, unsigned long r7)
581{
582 parse_bootinfo((struct bi_record *)(r3 + KERNELBASE));
583
584 k2_set_bat();
585
586 isa_io_base = K2_ISA_IO_BASE;
587 isa_mem_base = K2_ISA_MEM_BASE;
588 pci_dram_offset = K2_PCI32_SYS_MEM_BASE;
589
590 ppc_md.setup_arch = k2_setup_arch;
591 ppc_md.show_cpuinfo = k2_show_cpuinfo;
592 ppc_md.init_IRQ = k2_init_irq;
593 ppc_md.get_irq = i8259_irq;
594
595 ppc_md.find_end_of_memory = k2_find_end_of_memory;
596 ppc_md.setup_io_mappings = k2_map_io;
597
598 ppc_md.restart = k2_restart;
599 ppc_md.power_off = k2_power_off;
600 ppc_md.halt = k2_halt;
601
602 ppc_md.time_init = todc_time_init;
603 ppc_md.set_rtc_time = todc_set_rtc_time;
604 ppc_md.get_rtc_time = todc_get_rtc_time;
605 ppc_md.calibrate_decr = k2_calibrate_decr;
606
607 ppc_md.nvram_read_val = todc_direct_read_val;
608 ppc_md.nvram_write_val = todc_direct_write_val;
609
610#ifdef CONFIG_SERIAL_TEXT_DEBUG
611 ppc_md.progress = gen550_progress;
612#endif
613}
diff --git a/arch/ppc/platforms/k2.h b/arch/ppc/platforms/k2.h
deleted file mode 100644
index 78326aba1988..000000000000
--- a/arch/ppc/platforms/k2.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * arch/ppc/platforms/k2.h
3 *
4 * Definitions for SBS K2 board support
5 *
6 * Author: Matt Porter <mporter@mvista.com>
7 *
8 * 2001 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13
14#ifndef __PPC_PLATFORMS_K2_H
15#define __PPC_PLATFORMS_K2_H
16
17/*
18 * SBS K2 definitions
19 */
20
21#define K2_PCI64_BAR 0xff400000
22#define K2_PCI32_BAR 0xff500000
23
24#define K2_PCI64_CONFIG_ADDR (K2_PCI64_BAR + 0x000f8000)
25#define K2_PCI64_CONFIG_DATA (K2_PCI64_BAR + 0x000f8010)
26
27#define K2_PCI32_CONFIG_ADDR (K2_PCI32_BAR + 0x000f8000)
28#define K2_PCI32_CONFIG_DATA (K2_PCI32_BAR + 0x000f8010)
29
30#define K2_PCI64_MEM_BASE 0xd0000000
31#define K2_PCI64_IO_BASE 0x80100000
32
33#define K2_PCI32_MEM_BASE 0xc0000000
34#define K2_PCI32_IO_BASE 0x80000000
35
36#define K2_PCI32_SYS_MEM_BASE 0x80000000
37#define K2_PCI64_SYS_MEM_BASE K2_PCI32_SYS_MEM_BASE
38
39#define K2_PCI32_LOWER_MEM 0x00000000
40#define K2_PCI32_UPPER_MEM 0x0fffffff
41#define K2_PCI32_LOWER_IO 0x00000000
42#define K2_PCI32_UPPER_IO 0x000fffff
43
44#define K2_PCI64_LOWER_MEM 0x10000000
45#define K2_PCI64_UPPER_MEM 0x1fffffff
46#define K2_PCI64_LOWER_IO 0x00100000
47#define K2_PCI64_UPPER_IO 0x001fffff
48
49#define K2_ISA_IO_BASE K2_PCI32_IO_BASE
50#define K2_ISA_MEM_BASE K2_PCI32_MEM_BASE
51
52#define K2_BOARD_ID_REG (K2_ISA_IO_BASE + 0x800)
53#define K2_MISC_REG (K2_ISA_IO_BASE + 0x804)
54#define K2_MSIZ_GEO_REG (K2_ISA_IO_BASE + 0x808)
55#define K2_HOT_SWAP_REG (K2_ISA_IO_BASE + 0x80c)
56#define K2_PLD2_REG (K2_ISA_IO_BASE + 0x80e)
57#define K2_PLD3_REG (K2_ISA_IO_BASE + 0x80f)
58
59#define K2_BUS_SPD(board_id) (board_id >> 2) & 3
60
61#define K2_RTC_BASE_OFFSET 0x90000
62#define K2_RTC_BASE_ADDRESS (K2_PCI32_MEM_BASE + K2_RTC_BASE_OFFSET)
63#define K2_RTC_SIZE 0x8000
64
65#define K2_MEM_SIZE_MASK 0xe0
66#define K2_MEM_SIZE(size_reg) (size_reg & K2_MEM_SIZE_MASK) >> 5
67#define K2_MEM_SIZE_1GB 0x40000000
68#define K2_MEM_SIZE_512MB 0x20000000
69#define K2_MEM_SIZE_256MB 0x10000000
70#define K2_MEM_SIZE_128MB 0x08000000
71
72#define K2_L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
73#define K2_L2CACHE_512KB 0x00 /* 512KB */
74#define K2_L2CACHE_256KB 0x01 /* 256KB */
75#define K2_L2CACHE_1MB 0x02 /* 1MB */
76#define K2_L2CACHE_NONE 0x03 /* None */
77
78#define K2_GEO_ADR_MASK 0x1f
79
80#define K2_SYS_SLOT_MASK 0x08
81
82#endif /* __PPC_PLATFORMS_K2_H */
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 169dbf6534b9..2b53afae0e9c 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -33,6 +33,7 @@
33#include <linux/bootimg.h> 33#include <linux/bootimg.h>
34#endif 34#endif
35#include <asm/io.h> 35#include <asm/io.h>
36#include <asm/unistd.h>
36#include <asm/page.h> 37#include <asm/page.h>
37#include <asm/time.h> 38#include <asm/time.h>
38#include <asm/smp.h> 39#include <asm/smp.h>
@@ -42,15 +43,14 @@
42#include <asm/mv64x60.h> 43#include <asm/mv64x60.h>
43#include <platforms/katana.h> 44#include <platforms/katana.h>
44 45
45static struct mv64x60_handle bh; 46static struct mv64x60_handle bh;
46static katana_id_t katana_id; 47static katana_id_t katana_id;
47static void __iomem *cpld_base; 48static void __iomem *cpld_base;
48static void __iomem *sram_base; 49static void __iomem *sram_base;
49 50static u32 katana_flash_size_0;
50static u32 katana_flash_size_0; 51static u32 katana_flash_size_1;
51static u32 katana_flash_size_1; 52static u32 katana_bus_frequency;
52 53static struct pci_controller katana_hose_a;
53static u32 katana_bus_frequency;
54 54
55unsigned char __res[sizeof(bd_t)]; 55unsigned char __res[sizeof(bd_t)];
56 56
@@ -71,8 +71,12 @@ katana_irq_lookup_750i(unsigned char idsel, unsigned char pin)
71 KATANA_PCI_INTA_IRQ_750i, KATANA_PCI_INTB_IRQ_750i }, 71 KATANA_PCI_INTA_IRQ_750i, KATANA_PCI_INTB_IRQ_750i },
72 /* IDSEL 6 (T8110) */ 72 /* IDSEL 6 (T8110) */
73 {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 }, 73 {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 },
74 /* IDSEL 7 (unused) */
75 {0, 0, 0, 0 },
76 /* IDSEL 8 (Intel 82544) (752i only but doesn't harm 750i) */
77 {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 },
74 }; 78 };
75 const long min_idsel = 4, max_idsel = 6, irqs_per_slot = 4; 79 const long min_idsel = 4, max_idsel = 8, irqs_per_slot = 4;
76 80
77 return PCI_IRQ_TABLE_LOOKUP; 81 return PCI_IRQ_TABLE_LOOKUP;
78} 82}
@@ -148,7 +152,7 @@ katana_get_proc_num(void)
148 save_exclude = mv64x60_pci_exclude_bridge; 152 save_exclude = mv64x60_pci_exclude_bridge;
149 mv64x60_pci_exclude_bridge = 0; 153 mv64x60_pci_exclude_bridge = 0;
150 154
151 early_read_config_word(bh.hose_a, 0, 155 early_read_config_word(bh.hose_b, 0,
152 PCI_DEVFN(0,0), PCI_DEVICE_ID, &val); 156 PCI_DEVFN(0,0), PCI_DEVICE_ID, &val);
153 157
154 mv64x60_pci_exclude_bridge = save_exclude; 158 mv64x60_pci_exclude_bridge = save_exclude;
@@ -191,7 +195,8 @@ katana_setup_bridge(void)
191 struct mv64x60_setup_info si; 195 struct mv64x60_setup_info si;
192 void __iomem *vaddr; 196 void __iomem *vaddr;
193 int i; 197 int i;
194 u16 val; 198 u32 v;
199 u16 val, type;
195 u8 save_exclude; 200 u8 save_exclude;
196 201
197 /* 202 /*
@@ -222,6 +227,20 @@ katana_setup_bridge(void)
222 PCI_DEVICE_ID, val); 227 PCI_DEVICE_ID, val);
223 } 228 }
224 229
230 /*
231 * While we're in here, set the hotswap register correctly.
232 * Turn off blue LED; mask ENUM#, clear insertion & extraction bits.
233 */
234 early_read_config_dword(&hose, 0, PCI_DEVFN(0, 0),
235 MV64360_PCICFG_CPCI_HOTSWAP, &v);
236 v &= ~(1<<19);
237 v |= ((1<<17) | (1<<22) | (1<<23));
238 early_write_config_dword(&hose, 0, PCI_DEVFN(0, 0),
239 MV64360_PCICFG_CPCI_HOTSWAP, v);
240
241 /* While we're at it, grab the bridge type for later */
242 early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_DEVICE_ID, &type);
243
225 mv64x60_pci_exclude_bridge = save_exclude; 244 mv64x60_pci_exclude_bridge = save_exclude;
226 iounmap(vaddr); 245 iounmap(vaddr);
227 246
@@ -251,21 +270,23 @@ katana_setup_bridge(void)
251 si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; 270 si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
252 271
253 si.pci_1.acc_cntl_options[i] = 272 si.pci_1.acc_cntl_options[i] =
254 MV64360_PCI_ACC_CNTL_SNOOP_NONE | 273 MV64360_PCI_ACC_CNTL_SNOOP_NONE |
255 MV64360_PCI_ACC_CNTL_SWAP_NONE | 274 MV64360_PCI_ACC_CNTL_SWAP_NONE |
256 MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | 275 MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
257 MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; 276 MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
258#else 277#else
259 si.cpu_prot_options[i] = 0; 278 si.cpu_prot_options[i] = 0;
260 si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; /* errata */ 279 si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB;
261 si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; /* errata */ 280 si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB;
262 si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; /* errata */ 281 si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB;
263 282
264 si.pci_1.acc_cntl_options[i] = 283 si.pci_1.acc_cntl_options[i] =
265 MV64360_PCI_ACC_CNTL_SNOOP_WB | 284 MV64360_PCI_ACC_CNTL_SNOOP_WB |
266 MV64360_PCI_ACC_CNTL_SWAP_NONE | 285 MV64360_PCI_ACC_CNTL_SWAP_NONE |
267 MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | 286 MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
268 MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES; 287 ((type == PCI_DEVICE_ID_MARVELL_MV64360) ?
288 MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES :
289 MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES);
269#endif 290#endif
270 } 291 }
271 292
@@ -281,12 +302,26 @@ katana_setup_bridge(void)
281 mv64x60_set_bus(&bh, 1, 0); 302 mv64x60_set_bus(&bh, 1, 0);
282 bh.hose_b->first_busno = 0; 303 bh.hose_b->first_busno = 0;
283 bh.hose_b->last_busno = 0xff; 304 bh.hose_b->last_busno = 0xff;
305
306 /*
307 * Need to access hotswap reg which is in the pci config area of the
308 * bridge's hose 0. Note that pcibios_alloc_controller() can't be used
309 * to alloc hose_a b/c that would make hose 0 known to the generic
310 * pci code which we don't want.
311 */
312 bh.hose_a = &katana_hose_a;
313 setup_indirect_pci_nomap(bh.hose_a,
314 bh.v_base + MV64x60_PCI0_CONFIG_ADDR,
315 bh.v_base + MV64x60_PCI0_CONFIG_DATA);
284} 316}
285 317
286/* Bridge & platform setup routines */ 318/* Bridge & platform setup routines */
287void __init 319void __init
288katana_intr_setup(void) 320katana_intr_setup(void)
289{ 321{
322 if (bh.type == MV64x60_TYPE_MV64460) /* As per instns from Marvell */
323 mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, 1 << 15);
324
290 /* MPP 8, 9, and 10 */ 325 /* MPP 8, 9, and 10 */
291 mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff); 326 mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff);
292 327
@@ -309,9 +344,16 @@ katana_intr_setup(void)
309 /* Config GPP intr ctlr to respond to level trigger */ 344 /* Config GPP intr ctlr to respond to level trigger */
310 mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10)); 345 mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10));
311 346
312 /* Erranum FEr PCI-#8 */ 347 if (bh.type == MV64x60_TYPE_MV64360) {
313 mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1<<5) | (1<<9)); 348 /* Erratum FEr PCI-#9 */
314 mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<5) | (1<<9)); 349 mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD,
350 (1<<4) | (1<<5) | (1<<6) | (1<<7));
351 mv64x60_set_bits(&bh, MV64x60_PCI1_CMD, (1<<8) | (1<<9));
352 } else {
353 mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<6) | (1<<7));
354 mv64x60_set_bits(&bh, MV64x60_PCI1_CMD,
355 (1<<4) | (1<<5) | (1<<8) | (1<<9));
356 }
315 357
316 /* 358 /*
317 * Dismiss and then enable interrupt on GPP interrupt cause 359 * Dismiss and then enable interrupt on GPP interrupt cause
@@ -473,17 +515,46 @@ katana_setup_arch(void)
473 ppc_md.progress("katana_setup_arch: exit", 0); 515 ppc_md.progress("katana_setup_arch: exit", 0);
474} 516}
475 517
518void
519katana_fixup_resources(struct pci_dev *dev)
520{
521 u16 v16;
522
523 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_LINE_SIZE>>2);
524
525 pci_read_config_word(dev, PCI_COMMAND, &v16);
526 v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK;
527 pci_write_config_word(dev, PCI_COMMAND, v16);
528}
529
530static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */
531 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/
532 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/
533};
534
535static int
536katana_get_cpu_freq(void)
537{
538 unsigned long pll_cfg;
539
540 pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27;
541 return katana_bus_frequency * cpu_750xx[pll_cfg]/2;
542}
543
476/* Platform device data fixup routines. */ 544/* Platform device data fixup routines. */
477#if defined(CONFIG_SERIAL_MPSC) 545#if defined(CONFIG_SERIAL_MPSC)
478static void __init 546static void __init
479katana_fixup_mpsc_pdata(struct platform_device *pdev) 547katana_fixup_mpsc_pdata(struct platform_device *pdev)
480{ 548{
481 struct mpsc_pdata *pdata; 549 struct mpsc_pdata *pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
550 bd_t *bdp = (bd_t *)__res;
482 551
483 pdata = (struct mpsc_pdata *)pdev->dev.platform_data; 552 if (bdp->bi_baudrate)
553 pdata->default_baud = bdp->bi_baudrate;
554 else
555 pdata->default_baud = KATANA_DEFAULT_BAUD;
484 556
485 pdata->max_idle = 40; 557 pdata->max_idle = 40;
486 pdata->default_baud = KATANA_DEFAULT_BAUD;
487 pdata->brg_clk_src = KATANA_MPSC_CLK_SRC; 558 pdata->brg_clk_src = KATANA_MPSC_CLK_SRC;
488 /* 559 /*
489 * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts, 560 * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts,
@@ -513,6 +584,18 @@ katana_fixup_eth_pdata(struct platform_device *pdev)
513} 584}
514#endif 585#endif
515 586
587#if defined(CONFIG_SYSFS)
588static void __init
589katana_fixup_mv64xxx_pdata(struct platform_device *pdev)
590{
591 struct mv64xxx_pdata *pdata = (struct mv64xxx_pdata *)
592 pdev->dev.platform_data;
593
594 /* Katana supports the mv64xxx hotswap register */
595 pdata->hs_reg_valid = 1;
596}
597#endif
598
516static int __init 599static int __init
517katana_platform_notify(struct device *dev) 600katana_platform_notify(struct device *dev)
518{ 601{
@@ -529,6 +612,9 @@ katana_platform_notify(struct device *dev)
529 { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata }, 612 { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata },
530 { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata }, 613 { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata },
531#endif 614#endif
615#if defined(CONFIG_SYSFS)
616 { MV64XXX_DEV_NAME ".0", katana_fixup_mv64xxx_pdata },
617#endif
532 }; 618 };
533 struct platform_device *pdev; 619 struct platform_device *pdev;
534 int i; 620 int i;
@@ -536,8 +622,7 @@ katana_platform_notify(struct device *dev)
536 if (dev && dev->bus_id) 622 if (dev && dev->bus_id)
537 for (i=0; i<ARRAY_SIZE(dev_map); i++) 623 for (i=0; i<ARRAY_SIZE(dev_map); i++)
538 if (!strncmp(dev->bus_id, dev_map[i].bus_id, 624 if (!strncmp(dev->bus_id, dev_map[i].bus_id,
539 BUS_ID_SIZE)) { 625 BUS_ID_SIZE)) {
540
541 pdev = container_of(dev, 626 pdev = container_of(dev,
542 struct platform_device, dev); 627 struct platform_device, dev);
543 dev_map[i].rtn(pdev); 628 dev_map[i].rtn(pdev);
@@ -578,8 +663,7 @@ katana_setup_mtd(void)
578 ptbl_entries = (size >= (64*MB)) ? 6 : 4; 663 ptbl_entries = (size >= (64*MB)) ? 6 : 4;
579 664
580 if ((ptbl = kmalloc(ptbl_entries * sizeof(struct mtd_partition), 665 if ((ptbl = kmalloc(ptbl_entries * sizeof(struct mtd_partition),
581 GFP_KERNEL)) == NULL) { 666 GFP_KERNEL)) == NULL) {
582
583 printk(KERN_WARNING "Can't alloc MTD partition table\n"); 667 printk(KERN_WARNING "Can't alloc MTD partition table\n");
584 return -ENOMEM; 668 return -ENOMEM;
585 } 669 }
@@ -611,7 +695,6 @@ katana_setup_mtd(void)
611 physmap_set_partitions(ptbl, ptbl_entries); 695 physmap_set_partitions(ptbl, ptbl_entries);
612 return 0; 696 return 0;
613} 697}
614
615arch_initcall(katana_setup_mtd); 698arch_initcall(katana_setup_mtd);
616#endif 699#endif
617 700
@@ -632,7 +715,22 @@ katana_halt(void)
632{ 715{
633 u8 v; 716 u8 v;
634 717
635 if (katana_id == KATANA_ID_752I) { 718 /* Turn on blue LED to indicate its okay to remove */
719 if (katana_id == KATANA_ID_750I) {
720 u32 v;
721 u8 save_exclude;
722
723 /* Set LOO bit in cPCI HotSwap reg of hose 0 to turn on LED. */
724 save_exclude = mv64x60_pci_exclude_bridge;
725 mv64x60_pci_exclude_bridge = 0;
726 early_read_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0),
727 MV64360_PCICFG_CPCI_HOTSWAP, &v);
728 v &= 0xff;
729 v |= (1 << 19);
730 early_write_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0),
731 MV64360_PCICFG_CPCI_HOTSWAP, v);
732 mv64x60_pci_exclude_bridge = save_exclude;
733 } else if (katana_id == KATANA_ID_752I) {
636 v = in_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF); 734 v = in_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF);
637 v |= HSL_PLD_HOT_SWAP_LED_BIT; 735 v |= HSL_PLD_HOT_SWAP_LED_BIT;
638 out_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF, v); 736 out_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF, v);
@@ -652,37 +750,65 @@ katana_power_off(void)
652static int 750static int
653katana_show_cpuinfo(struct seq_file *m) 751katana_show_cpuinfo(struct seq_file *m)
654{ 752{
753 char *s;
754
755 seq_printf(m, "cpu freq\t: %dMHz\n",
756 (katana_get_cpu_freq() + 500000) / 1000000);
757 seq_printf(m, "bus freq\t: %ldMHz\n",
758 ((long)katana_bus_frequency + 500000) / 1000000);
655 seq_printf(m, "vendor\t\t: Artesyn Communication Products, LLC\n"); 759 seq_printf(m, "vendor\t\t: Artesyn Communication Products, LLC\n");
656 760
657 seq_printf(m, "board\t\t: "); 761 seq_printf(m, "board\t\t: ");
658
659 switch (katana_id) { 762 switch (katana_id) {
660 case KATANA_ID_3750: 763 case KATANA_ID_3750:
661 seq_printf(m, "Katana 3750\n"); 764 seq_printf(m, "Katana 3750");
662 break; 765 break;
663 766
664 case KATANA_ID_750I: 767 case KATANA_ID_750I:
665 seq_printf(m, "Katana 750i\n"); 768 seq_printf(m, "Katana 750i");
666 break; 769 break;
667 770
668 case KATANA_ID_752I: 771 case KATANA_ID_752I:
669 seq_printf(m, "Katana 752i\n"); 772 seq_printf(m, "Katana 752i");
670 break; 773 break;
671 774
672 default: 775 default:
673 seq_printf(m, "Unknown\n"); 776 seq_printf(m, "Unknown");
674 break; 777 break;
675 } 778 }
676 779 seq_printf(m, " (product id: 0x%x)\n",
677 seq_printf(m, "product ID\t: 0x%x\n",
678 in_8(cpld_base + KATANA_CPLD_PRODUCT_ID)); 780 in_8(cpld_base + KATANA_CPLD_PRODUCT_ID));
781
782 seq_printf(m, "pci mode\t: %sMonarch\n",
783 katana_is_monarch()? "" : "Non-");
679 seq_printf(m, "hardware rev\t: 0x%x\n", 784 seq_printf(m, "hardware rev\t: 0x%x\n",
680 in_8(cpld_base+KATANA_CPLD_HARDWARE_VER)); 785 in_8(cpld_base+KATANA_CPLD_HARDWARE_VER));
681 seq_printf(m, "PLD rev\t\t: 0x%x\n", 786 seq_printf(m, "pld rev\t\t: 0x%x\n",
682 in_8(cpld_base + KATANA_CPLD_PLD_VER)); 787 in_8(cpld_base + KATANA_CPLD_PLD_VER));
683 seq_printf(m, "PLB freq\t: %ldMhz\n", 788
684 (long)katana_bus_frequency / 1000000); 789 switch(bh.type) {
685 seq_printf(m, "PCI\t\t: %sMonarch\n", katana_is_monarch()? "" : "Non-"); 790 case MV64x60_TYPE_GT64260A:
791 s = "gt64260a";
792 break;
793 case MV64x60_TYPE_GT64260B:
794 s = "gt64260b";
795 break;
796 case MV64x60_TYPE_MV64360:
797 s = "mv64360";
798 break;
799 case MV64x60_TYPE_MV64460:
800 s = "mv64460";
801 break;
802 default:
803 s = "Unknown";
804 }
805 seq_printf(m, "bridge type\t: %s\n", s);
806 seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev);
807#if defined(CONFIG_NOT_COHERENT_CACHE)
808 seq_printf(m, "coherency\t: %s\n", "off");
809#else
810 seq_printf(m, "coherency\t: %s\n", "on");
811#endif
686 812
687 return 0; 813 return 0;
688} 814}
@@ -701,11 +827,20 @@ katana_calibrate_decr(void)
701 tb_to_us = mulhwu_scale_factor(freq, 1000000); 827 tb_to_us = mulhwu_scale_factor(freq, 1000000);
702} 828}
703 829
830/*
831 * The katana supports both uImage and zImage. If uImage, get the mem size
832 * from the bd info. If zImage, the bootwrapper adds a BI_MEMSIZE entry in
833 * the bi_rec data which is sucked out and put into boot_mem_size by
834 * parse_bootinfo(). MMU_init() will then use the boot_mem_size for the mem
835 * size and not call this routine. The only way this will fail is when a uImage
836 * is used but the fw doesn't pass in a valid bi_memsize. This should never
837 * happen, though.
838 */
704unsigned long __init 839unsigned long __init
705katana_find_end_of_memory(void) 840katana_find_end_of_memory(void)
706{ 841{
707 return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE, 842 bd_t *bdp = (bd_t *)__res;
708 MV64x60_TYPE_MV64360); 843 return bdp->bi_memsize;
709} 844}
710 845
711#if defined(CONFIG_I2C_MV64XXX) && defined(CONFIG_SENSORS_M41T00) 846#if defined(CONFIG_I2C_MV64XXX) && defined(CONFIG_SENSORS_M41T00)
@@ -729,15 +864,6 @@ katana_rtc_hookup(void)
729late_initcall(katana_rtc_hookup); 864late_initcall(katana_rtc_hookup);
730#endif 865#endif
731 866
732static inline void
733katana_set_bat(void)
734{
735 mb();
736 mtspr(SPRN_DBAT2U, 0xf0001ffe);
737 mtspr(SPRN_DBAT2L, 0xf000002a);
738 mb();
739}
740
741#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) 867#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
742static void __init 868static void __init
743katana_map_io(void) 869katana_map_io(void)
@@ -763,15 +889,24 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
763 */ 889 */
764 if (r3 && r6) { 890 if (r3 && r6) {
765 /* copy board info structure */ 891 /* copy board info structure */
766 memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); 892 memcpy((void *)__res, (void *)(r3+KERNELBASE), sizeof(bd_t));
767 /* copy command line */ 893 /* copy command line */
768 *(char *)(r7+KERNELBASE) = 0; 894 *(char *)(r7+KERNELBASE) = 0;
769 strcpy(cmd_line, (char *)(r6+KERNELBASE)); 895 strcpy(cmd_line, (char *)(r6+KERNELBASE));
770 } 896 }
771 897
898#ifdef CONFIG_BLK_DEV_INITRD
899 /* take care of initrd if we have one */
900 if (r4) {
901 initrd_start = r4 + KERNELBASE;
902 initrd_end = r5 + KERNELBASE;
903 }
904#endif /* CONFIG_BLK_DEV_INITRD */
905
772 isa_mem_base = 0; 906 isa_mem_base = 0;
773 907
774 ppc_md.setup_arch = katana_setup_arch; 908 ppc_md.setup_arch = katana_setup_arch;
909 ppc_md.pcibios_fixup_resources = katana_fixup_resources;
775 ppc_md.show_cpuinfo = katana_show_cpuinfo; 910 ppc_md.show_cpuinfo = katana_show_cpuinfo;
776 ppc_md.init_IRQ = mv64360_init_irq; 911 ppc_md.init_IRQ = mv64360_init_irq;
777 ppc_md.get_irq = mv64360_get_irq; 912 ppc_md.get_irq = mv64360_get_irq;
@@ -790,6 +925,4 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
790#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) 925#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
791 platform_notify = katana_platform_notify; 926 platform_notify = katana_platform_notify;
792#endif 927#endif
793
794 katana_set_bat(); /* Need for katana_find_end_of_memory and progress */
795} 928}
diff --git a/arch/ppc/platforms/katana.h b/arch/ppc/platforms/katana.h
index b82ed81950f5..597257eff2ec 100644
--- a/arch/ppc/platforms/katana.h
+++ b/arch/ppc/platforms/katana.h
@@ -56,14 +56,14 @@
56#define KATANA_PCI1_IO_SIZE 0x04000000 /* 64 MB */ 56#define KATANA_PCI1_IO_SIZE 0x04000000 /* 64 MB */
57 57
58/* Board-specific IRQ info */ 58/* Board-specific IRQ info */
59#define KATANA_PCI_INTA_IRQ_3750 64+8 59#define KATANA_PCI_INTA_IRQ_3750 (64+8)
60#define KATANA_PCI_INTB_IRQ_3750 64+9 60#define KATANA_PCI_INTB_IRQ_3750 (64+9)
61#define KATANA_PCI_INTC_IRQ_3750 64+10 61#define KATANA_PCI_INTC_IRQ_3750 (64+10)
62 62
63#define KATANA_PCI_INTA_IRQ_750i 64+8 63#define KATANA_PCI_INTA_IRQ_750i (64+8)
64#define KATANA_PCI_INTB_IRQ_750i 64+9 64#define KATANA_PCI_INTB_IRQ_750i (64+9)
65#define KATANA_PCI_INTC_IRQ_750i 64+10 65#define KATANA_PCI_INTC_IRQ_750i (64+10)
66#define KATANA_PCI_INTD_IRQ_750i 64+14 66#define KATANA_PCI_INTD_IRQ_750i (64+14)
67 67
68#define KATANA_CPLD_RST_EVENT 0x00000000 68#define KATANA_CPLD_RST_EVENT 0x00000000
69#define KATANA_CPLD_RST_CMD 0x00001000 69#define KATANA_CPLD_RST_CMD 0x00001000
diff --git a/arch/ppc/platforms/mcpn765.c b/arch/ppc/platforms/mcpn765.c
deleted file mode 100644
index e88d294ea593..000000000000
--- a/arch/ppc/platforms/mcpn765.c
+++ /dev/null
@@ -1,527 +0,0 @@
1/*
2 * arch/ppc/platforms/mcpn765.c
3 *
4 * Board setup routines for the Motorola MCG MCPN765 cPCI Board.
5 *
6 * Author: Mark A. Greer
7 * mgreer@mvista.com
8 *
9 * Modified by Randy Vinson (rvinson@mvista.com)
10 *
11 * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
14 * or implied.
15 */
16
17/*
18 * This file adds support for the Motorola MCG MCPN765.
19 */
20#include <linux/config.h>
21#include <linux/stddef.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/errno.h>
25#include <linux/reboot.h>
26#include <linux/pci.h>
27#include <linux/kdev_t.h>
28#include <linux/major.h>
29#include <linux/initrd.h>
30#include <linux/console.h>
31#include <linux/delay.h>
32#include <linux/irq.h>
33#include <linux/seq_file.h>
34#include <linux/root_dev.h>
35#include <linux/serial.h>
36#include <linux/tty.h> /* for linux/serial_core.h */
37#include <linux/serial_core.h>
38#include <linux/slab.h>
39
40#include <asm/system.h>
41#include <asm/pgtable.h>
42#include <asm/page.h>
43#include <asm/time.h>
44#include <asm/dma.h>
45#include <asm/byteorder.h>
46#include <asm/io.h>
47#include <asm/machdep.h>
48#include <asm/prom.h>
49#include <asm/smp.h>
50#include <asm/open_pic.h>
51#include <asm/i8259.h>
52#include <asm/todc.h>
53#include <asm/pci-bridge.h>
54#include <asm/irq.h>
55#include <asm/uaccess.h>
56#include <asm/bootinfo.h>
57#include <asm/hawk.h>
58#include <asm/kgdb.h>
59
60#include "mcpn765.h"
61
62static u_char mcpn765_openpic_initsenses[] __initdata = {
63 (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE),/* 16: i8259 cascade */
64 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 17: COM1,2,3,4 */
65 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 18: Enet 1 (front) */
66 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 19: HAWK WDT XXXX */
67 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 20: 21554 bridge */
68 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 21: cPCI INTA# */
69 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 22: cPCI INTB# */
70 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 23: cPCI INTC# */
71 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 24: cPCI INTD# */
72 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 25: PMC1 INTA#,PMC2 INTB#*/
73 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 26: PMC1 INTB#,PMC2 INTC#*/
74 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 27: PMC1 INTC#,PMC2 INTD#*/
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 28: PMC1 INTD#,PMC2 INTA#*/
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 29: Enet 2 (J3) */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 30: Abort Switch */
78 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 31: RTC Alarm */
79};
80
81extern void mcpn765_set_VIA_IDE_native(void);
82
83extern u_int openpic_irq(void);
84extern char cmd_line[];
85
86extern void gen550_progress(char *, unsigned short);
87extern void gen550_init(int, struct uart_port *);
88
89int use_of_interrupt_tree = 0;
90
91static void mcpn765_halt(void);
92
93TODC_ALLOC();
94
95/*
96 * Motorola MCG MCPN765 interrupt routing.
97 */
98static inline int
99mcpn765_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
100{
101 static char pci_irq_table[][4] =
102 /*
103 * PCI IDSEL/INTPIN->INTLINE
104 * A B C D
105 */
106 {
107 { 14, 0, 0, 0 }, /* IDSEL 11 - have to manually set */
108 { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
109 { 0, 0, 0, 0 }, /* IDSEL 13 - unused */
110 { 18, 0, 0, 0 }, /* IDSEL 14 - Enet 0 */
111 { 0, 0, 0, 0 }, /* IDSEL 15 - unused */
112 { 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */
113 { 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */
114 { 0, 0, 0, 0 }, /* IDSEL 18 - PMC 2B Connector XXXX */
115 { 29, 0, 0, 0 }, /* IDSEL 19 - Enet 1 */
116 { 20, 0, 0, 0 }, /* IDSEL 20 - 21554 cPCI bridge */
117 };
118
119 const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
120 return PCI_IRQ_TABLE_LOOKUP;
121}
122
123void __init
124mcpn765_set_VIA_IDE_legacy(void)
125{
126 unsigned short vend, dev;
127
128 early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend);
129 early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev);
130
131 if ((vend == PCI_VENDOR_ID_VIA) &&
132 (dev == PCI_DEVICE_ID_VIA_82C586_1)) {
133
134 unsigned char temp;
135
136 /* put back original "standard" port base addresses */
137 early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
138 PCI_BASE_ADDRESS_0, 0x1f1);
139 early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
140 PCI_BASE_ADDRESS_1, 0x3f5);
141 early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
142 PCI_BASE_ADDRESS_2, 0x171);
143 early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
144 PCI_BASE_ADDRESS_3, 0x375);
145 early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
146 PCI_BASE_ADDRESS_4, 0xcc01);
147
148 /* put into legacy mode */
149 early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
150 &temp);
151 temp &= ~0x05;
152 early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
153 temp);
154 }
155}
156
157void
158mcpn765_set_VIA_IDE_native(void)
159{
160 unsigned short vend, dev;
161
162 early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend);
163 early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev);
164
165 if ((vend == PCI_VENDOR_ID_VIA) &&
166 (dev == PCI_DEVICE_ID_VIA_82C586_1)) {
167
168 unsigned char temp;
169
170 /* put into native mode */
171 early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
172 &temp);
173 temp |= 0x05;
174 early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
175 temp);
176 }
177}
178
179/*
180 * Initialize the VIA 82c586b.
181 */
182static void __init
183mcpn765_setup_via_82c586b(void)
184{
185 struct pci_dev *dev;
186 u_char c;
187
188 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
189 PCI_DEVICE_ID_VIA_82C586_0,
190 NULL)) == NULL) {
191 printk("No VIA ISA bridge found\n");
192 mcpn765_halt();
193 /* NOTREACHED */
194 }
195
196 /*
197 * If the firmware left the EISA 4d0/4d1 ports enabled, make sure
198 * IRQ 14 is set for edge.
199 */
200 pci_read_config_byte(dev, 0x47, &c);
201
202 if (c & (1<<5)) {
203 c = inb(0x4d1);
204 c &= ~(1<<6);
205 outb(c, 0x4d1);
206 }
207
208 /* Disable PNP IRQ routing since we use the Hawk's MPIC */
209 pci_write_config_dword(dev, 0x54, 0);
210 pci_write_config_byte(dev, 0x58, 0);
211
212 pci_dev_put(dev);
213 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
214 PCI_DEVICE_ID_VIA_82C586_1,
215 NULL)) == NULL) {
216 printk("No VIA ISA bridge found\n");
217 mcpn765_halt();
218 /* NOTREACHED */
219 }
220
221 /*
222 * PPCBug doesn't set the enable bits for the IDE device.
223 * Turn them on now.
224 */
225 pci_read_config_byte(dev, 0x40, &c);
226 c |= 0x03;
227 pci_write_config_byte(dev, 0x40, c);
228 pci_dev_put(dev);
229
230 return;
231}
232
233void __init
234mcpn765_pcibios_fixup(void)
235{
236 /* Do MCPN765 board specific initialization. */
237 mcpn765_setup_via_82c586b();
238}
239
240void __init
241mcpn765_find_bridges(void)
242{
243 struct pci_controller *hose;
244
245 hose = pcibios_alloc_controller();
246
247 if (!hose)
248 return;
249
250 hose->first_busno = 0;
251 hose->last_busno = 0xff;
252 hose->pci_mem_offset = MCPN765_PCI_PHY_MEM_OFFSET;
253
254 pci_init_resource(&hose->io_resource,
255 MCPN765_PCI_IO_START,
256 MCPN765_PCI_IO_END,
257 IORESOURCE_IO,
258 "PCI host bridge");
259
260 pci_init_resource(&hose->mem_resources[0],
261 MCPN765_PCI_MEM_START,
262 MCPN765_PCI_MEM_END,
263 IORESOURCE_MEM,
264 "PCI host bridge");
265
266 hose->io_space.start = MCPN765_PCI_IO_START;
267 hose->io_space.end = MCPN765_PCI_IO_END;
268 hose->mem_space.start = MCPN765_PCI_MEM_START;
269 hose->mem_space.end = MCPN765_PCI_MEM_END - HAWK_MPIC_SIZE;
270
271 if (hawk_init(hose,
272 MCPN765_HAWK_PPC_REG_BASE,
273 MCPN765_PROC_PCI_MEM_START,
274 MCPN765_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
275 MCPN765_PROC_PCI_IO_START,
276 MCPN765_PROC_PCI_IO_END,
277 MCPN765_PCI_MEM_END - HAWK_MPIC_SIZE + 1) != 0) {
278 printk("Could not initialize HAWK bridge\n");
279 }
280
281 /* VIA IDE BAR decoders are only 16-bits wide. PCI Auto Config
282 * will reassign the bars outside of 16-bit I/O space, which will
283 * "break" things. To prevent this, we'll set the IDE chip into
284 * legacy mode and seed the bars with their legacy addresses (in 16-bit
285 * I/O space). The Auto Config code will skip the IDE contoller in
286 * legacy mode, so our bar values will stick.
287 */
288 mcpn765_set_VIA_IDE_legacy();
289
290 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
291
292 /* Now that we've got 16-bit addresses in the bars, we can switch the
293 * IDE controller back into native mode so we can do "modern" resource
294 * and interrupt management.
295 */
296 mcpn765_set_VIA_IDE_native();
297
298 ppc_md.pcibios_fixup = mcpn765_pcibios_fixup;
299 ppc_md.pcibios_fixup_bus = NULL;
300 ppc_md.pci_swizzle = common_swizzle;
301 ppc_md.pci_map_irq = mcpn765_map_irq;
302
303 return;
304}
305static void __init
306mcpn765_setup_arch(void)
307{
308 struct pci_controller *hose;
309
310 if ( ppc_md.progress )
311 ppc_md.progress("mcpn765_setup_arch: enter", 0);
312
313 loops_per_jiffy = 50000000 / HZ;
314
315#ifdef CONFIG_BLK_DEV_INITRD
316 if (initrd_start)
317 ROOT_DEV = Root_RAM0;
318 else
319#endif
320#ifdef CONFIG_ROOT_NFS
321 ROOT_DEV = Root_NFS;
322#else
323 ROOT_DEV = Root_SDA2;
324#endif
325
326 if ( ppc_md.progress )
327 ppc_md.progress("mcpn765_setup_arch: find_bridges", 0);
328
329 /* Lookup PCI host bridges */
330 mcpn765_find_bridges();
331
332 hose = pci_bus_to_hose(0);
333 isa_io_base = (ulong)hose->io_base_virt;
334
335 TODC_INIT(TODC_TYPE_MK48T37,
336 (MCPN765_PHYS_NVRAM_AS0 - isa_io_base),
337 (MCPN765_PHYS_NVRAM_AS1 - isa_io_base),
338 (MCPN765_PHYS_NVRAM_DATA - isa_io_base),
339 8);
340
341 OpenPIC_InitSenses = mcpn765_openpic_initsenses;
342 OpenPIC_NumInitSenses = sizeof(mcpn765_openpic_initsenses);
343
344 printk("Motorola MCG MCPN765 cPCI Non-System Board\n");
345 printk("MCPN765 port (MontaVista Software, Inc. (source@mvista.com))\n");
346
347 if ( ppc_md.progress )
348 ppc_md.progress("mcpn765_setup_arch: exit", 0);
349
350 return;
351}
352
353static void __init
354mcpn765_init2(void)
355{
356
357 request_region(0x00,0x20,"dma1");
358 request_region(0x20,0x20,"pic1");
359 request_region(0x40,0x20,"timer");
360 request_region(0x80,0x10,"dma page reg");
361 request_region(0xa0,0x20,"pic2");
362 request_region(0xc0,0x20,"dma2");
363
364 return;
365}
366
367/*
368 * Interrupt setup and service.
369 * Have MPIC on HAWK and cascaded 8259s on VIA 82586 cascaded to MPIC.
370 */
371static void __init
372mcpn765_init_IRQ(void)
373{
374 int i;
375
376 if ( ppc_md.progress )
377 ppc_md.progress("init_irq: enter", 0);
378
379 openpic_init(NUM_8259_INTERRUPTS);
380 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
381 i8259_irq);
382
383 for(i=0; i < NUM_8259_INTERRUPTS; i++)
384 irq_desc[i].handler = &i8259_pic;
385
386 i8259_init(0);
387
388 if ( ppc_md.progress )
389 ppc_md.progress("init_irq: exit", 0);
390
391 return;
392}
393
394static u32
395mcpn765_irq_canonicalize(u32 irq)
396{
397 if (irq == 2)
398 return 9;
399 else
400 return irq;
401}
402
403static unsigned long __init
404mcpn765_find_end_of_memory(void)
405{
406 return hawk_get_mem_size(MCPN765_HAWK_SMC_BASE);
407}
408
409static void __init
410mcpn765_map_io(void)
411{
412 io_block_mapping(0xfe800000, 0xfe800000, 0x00800000, _PAGE_IO);
413}
414
415static void
416mcpn765_reset_board(void)
417{
418 local_irq_disable();
419
420 /* set VIA IDE controller into native mode */
421 mcpn765_set_VIA_IDE_native();
422
423 /* Set exception prefix high - to the firmware */
424 _nmask_and_or_msr(0, MSR_IP);
425
426 out_8((u_char *)MCPN765_BOARD_MODRST_REG, 0x01);
427
428 return;
429}
430
431static void
432mcpn765_restart(char *cmd)
433{
434 volatile ulong i = 10000000;
435
436 mcpn765_reset_board();
437
438 while (i-- > 0);
439 panic("restart failed\n");
440}
441
442static void
443mcpn765_power_off(void)
444{
445 mcpn765_halt();
446 /* NOTREACHED */
447}
448
449static void
450mcpn765_halt(void)
451{
452 local_irq_disable();
453 while (1);
454 /* NOTREACHED */
455}
456
457static int
458mcpn765_show_cpuinfo(struct seq_file *m)
459{
460 seq_printf(m, "vendor\t\t: Motorola MCG\n");
461 seq_printf(m, "machine\t\t: MCPN765\n");
462
463 return 0;
464}
465
466/*
467 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
468 */
469static __inline__ void
470mcpn765_set_bat(void)
471{
472 mb();
473 mtspr(SPRN_DBAT1U, 0xfe8000fe);
474 mtspr(SPRN_DBAT1L, 0xfe80002a);
475 mb();
476}
477
478void __init
479platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
480 unsigned long r6, unsigned long r7)
481{
482 parse_bootinfo(find_bootinfo());
483
484 /* Map in board regs, etc. */
485 mcpn765_set_bat();
486
487 isa_mem_base = MCPN765_ISA_MEM_BASE;
488 pci_dram_offset = MCPN765_PCI_DRAM_OFFSET;
489 ISA_DMA_THRESHOLD = 0x00ffffff;
490 DMA_MODE_READ = 0x44;
491 DMA_MODE_WRITE = 0x48;
492
493 ppc_md.setup_arch = mcpn765_setup_arch;
494 ppc_md.show_cpuinfo = mcpn765_show_cpuinfo;
495 ppc_md.irq_canonicalize = mcpn765_irq_canonicalize;
496 ppc_md.init_IRQ = mcpn765_init_IRQ;
497 ppc_md.get_irq = openpic_get_irq;
498 ppc_md.init = mcpn765_init2;
499
500 ppc_md.restart = mcpn765_restart;
501 ppc_md.power_off = mcpn765_power_off;
502 ppc_md.halt = mcpn765_halt;
503
504 ppc_md.find_end_of_memory = mcpn765_find_end_of_memory;
505 ppc_md.setup_io_mappings = mcpn765_map_io;
506
507 ppc_md.time_init = todc_time_init;
508 ppc_md.set_rtc_time = todc_set_rtc_time;
509 ppc_md.get_rtc_time = todc_get_rtc_time;
510 ppc_md.calibrate_decr = todc_calibrate_decr;
511
512 ppc_md.nvram_read_val = todc_m48txx_read_val;
513 ppc_md.nvram_write_val = todc_m48txx_write_val;
514
515 ppc_md.heartbeat = NULL;
516 ppc_md.heartbeat_reset = 0;
517 ppc_md.heartbeat_count = 0;
518
519#ifdef CONFIG_SERIAL_TEXT_DEBUG
520 ppc_md.progress = gen550_progress;
521#endif
522#ifdef CONFIG_KGDB
523 ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
524#endif
525
526 return;
527}
diff --git a/arch/ppc/platforms/mcpn765.h b/arch/ppc/platforms/mcpn765.h
deleted file mode 100644
index 4d35ecad097b..000000000000
--- a/arch/ppc/platforms/mcpn765.h
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * arch/ppc/platforms/mcpn765.h
3 *
4 * Definitions for Motorola MCG MCPN765 cPCI Board.
5 *
6 * Author: Mark A. Greer
7 * mgreer@mvista.com
8 *
9 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14
15/*
16 * From Processor to PCI:
17 * PCI Mem Space: 0x80000000 - 0xc0000000 -> 0x80000000 - 0xc0000000 (1 GB)
18 * PCI I/O Space: 0xfd800000 - 0xfe000000 -> 0x00000000 - 0x00800000 (8 MB)
19 * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
20 * MPIC in PCI Mem Space: 0xfe800000 - 0xfe830000 (not all used by MPIC)
21 *
22 * From PCI to Processor:
23 * System Memory: 0x00000000 -> 0x00000000
24 */
25
26#ifndef __PPC_PLATFORMS_MCPN765_H
27#define __PPC_PLATFORMS_MCPN765_H
28#include <linux/config.h>
29
30/* PCI Memory space mapping info */
31#define MCPN765_PCI_MEM_SIZE 0x40000000U
32#define MCPN765_PROC_PCI_MEM_START 0x80000000U
33#define MCPN765_PROC_PCI_MEM_END (MCPN765_PROC_PCI_MEM_START + \
34 MCPN765_PCI_MEM_SIZE - 1)
35#define MCPN765_PCI_MEM_START 0x80000000U
36#define MCPN765_PCI_MEM_END (MCPN765_PCI_MEM_START + \
37 MCPN765_PCI_MEM_SIZE - 1)
38
39/* PCI I/O space mapping info */
40#define MCPN765_PCI_IO_SIZE 0x00800000U
41#define MCPN765_PROC_PCI_IO_START 0xfd800000U
42#define MCPN765_PROC_PCI_IO_END (MCPN765_PROC_PCI_IO_START + \
43 MCPN765_PCI_IO_SIZE - 1)
44#define MCPN765_PCI_IO_START 0x00000000U
45#define MCPN765_PCI_IO_END (MCPN765_PCI_IO_START + \
46 MCPN765_PCI_IO_SIZE - 1)
47
48/* System memory mapping info */
49#define MCPN765_PCI_DRAM_OFFSET 0x00000000U
50#define MCPN765_PCI_PHY_MEM_OFFSET 0x00000000U
51
52#define MCPN765_ISA_MEM_BASE 0x00000000U
53#define MCPN765_ISA_IO_BASE MCPN765_PROC_PCI_IO_START
54
55/* Define base addresses for important sets of registers */
56#define MCPN765_HAWK_MPIC_BASE 0xfe800000U
57#define MCPN765_HAWK_SMC_BASE 0xfef80000U
58#define MCPN765_HAWK_PPC_REG_BASE 0xfeff0000U
59
60/* Define MCPN765 board register addresses. */
61#define MCPN765_BOARD_STATUS_REG 0xfef88080U
62#define MCPN765_BOARD_MODFAIL_REG 0xfef88090U
63#define MCPN765_BOARD_MODRST_REG 0xfef880a0U
64#define MCPN765_BOARD_TBEN_REG 0xfef880c0U
65#define MCPN765_BOARD_GEOGRAPHICAL_REG 0xfef880e8U
66#define MCPN765_BOARD_EXT_FEATURE_REG 0xfef880f0U
67#define MCPN765_BOARD_LAST_RESET_REG 0xfef880f8U
68
69/* Defines for UART */
70
71/* Define the UART base addresses */
72#define MCPN765_SERIAL_1 0xfef88000
73#define MCPN765_SERIAL_2 0xfef88200
74#define MCPN765_SERIAL_3 0xfef88400
75#define MCPN765_SERIAL_4 0xfef88600
76
77#ifdef CONFIG_SERIAL_MANY_PORTS
78#define RS_TABLE_SIZE 64
79#else
80#define RS_TABLE_SIZE 4
81#endif
82
83/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
84#define BASE_BAUD ( 1843200 / 16 )
85#define UART_CLK 1843200
86
87#ifdef CONFIG_SERIAL_DETECT_IRQ
88#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
89#else
90#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
91#endif
92
93/* All UART IRQ's are wire-OR'd to IRQ 17 */
94#define STD_SERIAL_PORT_DFNS \
95 { 0, BASE_BAUD, MCPN765_SERIAL_1, 17, STD_COM_FLAGS, /* ttyS0 */\
96 iomem_base: (u8 *)MCPN765_SERIAL_1, \
97 iomem_reg_shift: 4, \
98 io_type: SERIAL_IO_MEM }, \
99 { 0, BASE_BAUD, MCPN765_SERIAL_2, 17, STD_COM_FLAGS, /* ttyS1 */\
100 iomem_base: (u8 *)MCPN765_SERIAL_2, \
101 iomem_reg_shift: 4, \
102 io_type: SERIAL_IO_MEM }, \
103 { 0, BASE_BAUD, MCPN765_SERIAL_3, 17, STD_COM_FLAGS, /* ttyS2 */\
104 iomem_base: (u8 *)MCPN765_SERIAL_3, \
105 iomem_reg_shift: 4, \
106 io_type: SERIAL_IO_MEM }, \
107 { 0, BASE_BAUD, MCPN765_SERIAL_4, 17, STD_COM_FLAGS, /* ttyS3 */\
108 iomem_base: (u8 *)MCPN765_SERIAL_4, \
109 iomem_reg_shift: 4, \
110 io_type: SERIAL_IO_MEM },
111
112#define SERIAL_PORT_DFNS \
113 STD_SERIAL_PORT_DFNS
114
115/* Define the NVRAM/RTC address strobe & data registers */
116#define MCPN765_PHYS_NVRAM_AS0 0xfef880c8U
117#define MCPN765_PHYS_NVRAM_AS1 0xfef880d0U
118#define MCPN765_PHYS_NVRAM_DATA 0xfef880d8U
119
120extern void mcpn765_find_bridges(void);
121
122#endif /* __PPC_PLATFORMS_MCPN765_H */
diff --git a/arch/ppc/platforms/pcore.c b/arch/ppc/platforms/pcore.c
deleted file mode 100644
index d7191630a650..000000000000
--- a/arch/ppc/platforms/pcore.c
+++ /dev/null
@@ -1,352 +0,0 @@
1/*
2 * arch/ppc/platforms/pcore_setup.c
3 *
4 * Setup routines for Force PCORE boards
5 *
6 * Author: Matt Porter <mporter@mvista.com>
7 *
8 * 2001 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13
14#include <linux/config.h>
15#include <linux/stddef.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/errno.h>
19#include <linux/reboot.h>
20#include <linux/pci.h>
21#include <linux/kdev_t.h>
22#include <linux/types.h>
23#include <linux/major.h>
24#include <linux/initrd.h>
25#include <linux/console.h>
26#include <linux/irq.h>
27#include <linux/seq_file.h>
28#include <linux/root_dev.h>
29
30#include <asm/io.h>
31#include <asm/machdep.h>
32#include <asm/time.h>
33#include <asm/i8259.h>
34#include <asm/mpc10x.h>
35#include <asm/todc.h>
36#include <asm/bootinfo.h>
37#include <asm/kgdb.h>
38
39#include "pcore.h"
40
41extern unsigned long loops_per_jiffy;
42
43static int board_type;
44
45static inline int __init
46pcore_6750_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
47{
48 static char pci_irq_table[][4] =
49 /*
50 * PCI IDSEL/INTPIN->INTLINE
51 * A B C D
52 */
53 {
54 {9, 10, 11, 12}, /* IDSEL 24 - DEC 21554 */
55 {10, 0, 0, 0}, /* IDSEL 25 - DEC 21143 */
56 {11, 12, 9, 10}, /* IDSEL 26 - PMC I */
57 {12, 9, 10, 11}, /* IDSEL 27 - PMC II */
58 {0, 0, 0, 0}, /* IDSEL 28 - unused */
59 {0, 0, 9, 0}, /* IDSEL 29 - unused */
60 {0, 0, 0, 0}, /* IDSEL 30 - Winbond */
61 };
62 const long min_idsel = 24, max_idsel = 30, irqs_per_slot = 4;
63 return PCI_IRQ_TABLE_LOOKUP;
64};
65
66static inline int __init
67pcore_680_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
68{
69 static char pci_irq_table[][4] =
70 /*
71 * PCI IDSEL/INTPIN->INTLINE
72 * A B C D
73 */
74 {
75 {9, 10, 11, 12}, /* IDSEL 24 - Sentinel */
76 {10, 0, 0, 0}, /* IDSEL 25 - i82559 #1 */
77 {11, 12, 9, 10}, /* IDSEL 26 - PMC I */
78 {12, 9, 10, 11}, /* IDSEL 27 - PMC II */
79 {9, 0, 0, 0}, /* IDSEL 28 - i82559 #2 */
80 {0, 0, 0, 0}, /* IDSEL 29 - unused */
81 {0, 0, 0, 0}, /* IDSEL 30 - Winbond */
82 };
83 const long min_idsel = 24, max_idsel = 30, irqs_per_slot = 4;
84 return PCI_IRQ_TABLE_LOOKUP;
85};
86
87void __init
88pcore_pcibios_fixup(void)
89{
90 struct pci_dev *dev;
91
92 if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND,
93 PCI_DEVICE_ID_WINBOND_83C553,
94 0)))
95 {
96 /* Reroute interrupts both IDE channels to 15 */
97 pci_write_config_byte(dev,
98 PCORE_WINBOND_IDE_INT,
99 0xff);
100
101 /* Route INTA-D to IRQ9-12, respectively */
102 pci_write_config_word(dev,
103 PCORE_WINBOND_PCI_INT,
104 0x9abc);
105
106 /*
107 * Set up 8259 edge/level triggering
108 */
109 outb(0x00, PCORE_WINBOND_PRI_EDG_LVL);
110 outb(0x1e, PCORE_WINBOND_SEC_EDG_LVL);
111 pci_dev_put(dev);
112 }
113}
114
115int __init
116pcore_find_bridges(void)
117{
118 struct pci_controller* hose;
119 int host_bridge, board_type;
120
121 hose = pcibios_alloc_controller();
122 if (!hose)
123 return 0;
124
125 mpc10x_bridge_init(hose,
126 MPC10X_MEM_MAP_B,
127 MPC10X_MEM_MAP_B,
128 MPC10X_MAPB_EUMB_BASE);
129
130 /* Determine board type */
131 early_read_config_dword(hose,
132 0,
133 PCI_DEVFN(0,0),
134 PCI_VENDOR_ID,
135 &host_bridge);
136 if (host_bridge == MPC10X_BRIDGE_106)
137 board_type = PCORE_TYPE_6750;
138 else /* MPC10X_BRIDGE_107 */
139 board_type = PCORE_TYPE_680;
140
141 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
142
143 ppc_md.pcibios_fixup = pcore_pcibios_fixup;
144 ppc_md.pci_swizzle = common_swizzle;
145
146 if (board_type == PCORE_TYPE_6750)
147 ppc_md.pci_map_irq = pcore_6750_map_irq;
148 else /* PCORE_TYPE_680 */
149 ppc_md.pci_map_irq = pcore_680_map_irq;
150
151 return board_type;
152}
153
154/* Dummy variable to satisfy mpc10x_common.o */
155void *OpenPIC_Addr;
156
157static int
158pcore_show_cpuinfo(struct seq_file *m)
159{
160 seq_printf(m, "vendor\t\t: Force Computers\n");
161
162 if (board_type == PCORE_TYPE_6750)
163 seq_printf(m, "machine\t\t: PowerCore 6750\n");
164 else /* PCORE_TYPE_680 */
165 seq_printf(m, "machine\t\t: PowerCore 680\n");
166
167 seq_printf(m, "L2\t\t: " );
168 if (board_type == PCORE_TYPE_6750)
169 switch (readb(PCORE_DCCR_REG) & PCORE_DCCR_L2_MASK)
170 {
171 case PCORE_DCCR_L2_0KB:
172 seq_printf(m, "nocache");
173 break;
174 case PCORE_DCCR_L2_256KB:
175 seq_printf(m, "256KB");
176 break;
177 case PCORE_DCCR_L2_1MB:
178 seq_printf(m, "1MB");
179 break;
180 case PCORE_DCCR_L2_512KB:
181 seq_printf(m, "512KB");
182 break;
183 default:
184 seq_printf(m, "error");
185 break;
186 }
187 else /* PCORE_TYPE_680 */
188 switch (readb(PCORE_DCCR_REG) & PCORE_DCCR_L2_MASK)
189 {
190 case PCORE_DCCR_L2_2MB:
191 seq_printf(m, "2MB");
192 break;
193 case PCORE_DCCR_L2_256KB:
194 seq_printf(m, "reserved");
195 break;
196 case PCORE_DCCR_L2_1MB:
197 seq_printf(m, "1MB");
198 break;
199 case PCORE_DCCR_L2_512KB:
200 seq_printf(m, "512KB");
201 break;
202 default:
203 seq_printf(m, "error");
204 break;
205 }
206
207 seq_printf(m, "\n");
208
209 return 0;
210}
211
212static void __init
213pcore_setup_arch(void)
214{
215 /* init to some ~sane value until calibrate_delay() runs */
216 loops_per_jiffy = 50000000/HZ;
217
218 /* Lookup PCI host bridges */
219 board_type = pcore_find_bridges();
220
221#ifdef CONFIG_BLK_DEV_INITRD
222 if (initrd_start)
223 ROOT_DEV = Root_RAM0;
224 else
225#endif
226#ifdef CONFIG_ROOT_NFS
227 ROOT_DEV = Root_NFS;
228#else
229 ROOT_DEV = Root_SDA2;
230#endif
231
232 printk(KERN_INFO "Force PowerCore ");
233 if (board_type == PCORE_TYPE_6750)
234 printk("6750\n");
235 else
236 printk("680\n");
237 printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
238 _set_L2CR(L2CR_L2E | _get_L2CR());
239
240}
241
242static void
243pcore_restart(char *cmd)
244{
245 local_irq_disable();
246 /* Hard reset */
247 writeb(0x11, 0xfe000332);
248 while(1);
249}
250
251static void
252pcore_halt(void)
253{
254 local_irq_disable();
255 /* Turn off user LEDs */
256 writeb(0x00, 0xfe000300);
257 while (1);
258}
259
260static void
261pcore_power_off(void)
262{
263 pcore_halt();
264}
265
266
267static void __init
268pcore_init_IRQ(void)
269{
270 int i;
271
272 for ( i = 0 ; i < 16 ; i++ )
273 irq_desc[i].handler = &i8259_pic;
274
275 i8259_init(0);
276}
277
278/*
279 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
280 */
281static __inline__ void
282pcore_set_bat(void)
283{
284 mb();
285 mtspr(SPRN_DBAT3U, 0xf0001ffe);
286 mtspr(SPRN_DBAT3L, 0xfe80002a);
287 mb();
288
289}
290
291static unsigned long __init
292pcore_find_end_of_memory(void)
293{
294
295 return mpc10x_get_mem_size(MPC10X_MEM_MAP_B);
296}
297
298static void __init
299pcore_map_io(void)
300{
301 io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
302}
303
304TODC_ALLOC();
305
306void __init
307platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
308 unsigned long r6, unsigned long r7)
309{
310 parse_bootinfo(find_bootinfo());
311
312 /* Cover I/O space with a BAT */
313 /* yuck, better hope your ram size is a power of 2 -- paulus */
314 pcore_set_bat();
315
316 isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
317 isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
318 pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
319
320 ppc_md.setup_arch = pcore_setup_arch;
321 ppc_md.show_cpuinfo = pcore_show_cpuinfo;
322 ppc_md.init_IRQ = pcore_init_IRQ;
323 ppc_md.get_irq = i8259_irq;
324
325 ppc_md.find_end_of_memory = pcore_find_end_of_memory;
326 ppc_md.setup_io_mappings = pcore_map_io;
327
328 ppc_md.restart = pcore_restart;
329 ppc_md.power_off = pcore_power_off;
330 ppc_md.halt = pcore_halt;
331
332 TODC_INIT(TODC_TYPE_MK48T59,
333 PCORE_NVRAM_AS0,
334 PCORE_NVRAM_AS1,
335 PCORE_NVRAM_DATA,
336 8);
337
338 ppc_md.time_init = todc_time_init;
339 ppc_md.get_rtc_time = todc_get_rtc_time;
340 ppc_md.set_rtc_time = todc_set_rtc_time;
341 ppc_md.calibrate_decr = todc_calibrate_decr;
342
343 ppc_md.nvram_read_val = todc_m48txx_read_val;
344 ppc_md.nvram_write_val = todc_m48txx_write_val;
345
346#ifdef CONFIG_SERIAL_TEXT_DEBUG
347 ppc_md.progress = gen550_progress;
348#endif
349#ifdef CONFIG_KGDB
350 ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
351#endif
352}
diff --git a/arch/ppc/platforms/pcore.h b/arch/ppc/platforms/pcore.h
deleted file mode 100644
index c6a26e764926..000000000000
--- a/arch/ppc/platforms/pcore.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/ppc/platforms/pcore.h
3 *
4 * Definitions for Force PowerCore board support
5 *
6 * Author: Matt Porter <mporter@mvista.com>
7 *
8 * 2001 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13
14#ifndef __PPC_PLATFORMS_PCORE_H
15#define __PPC_PLATFORMS_PCORE_H
16
17#include <asm/mpc10x.h>
18
19#define PCORE_TYPE_6750 1
20#define PCORE_TYPE_680 2
21
22#define PCORE_NVRAM_AS0 0x73
23#define PCORE_NVRAM_AS1 0x75
24#define PCORE_NVRAM_DATA 0x77
25
26#define PCORE_DCCR_REG (MPC10X_MAPB_ISA_IO_BASE + 0x308)
27#define PCORE_DCCR_L2_MASK 0xc0
28#define PCORE_DCCR_L2_0KB 0x00
29#define PCORE_DCCR_L2_256KB 0x40
30#define PCORE_DCCR_L2_512KB 0xc0
31#define PCORE_DCCR_L2_1MB 0x80
32#define PCORE_DCCR_L2_2MB 0x00
33
34#define PCORE_WINBOND_IDE_INT 0x43
35#define PCORE_WINBOND_PCI_INT 0x44
36#define PCORE_WINBOND_PRI_EDG_LVL 0x4d0
37#define PCORE_WINBOND_SEC_EDG_LVL 0x4d1
38
39#endif /* __PPC_PLATFORMS_PCORE_H */
diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c
index 9f92e1bb7f34..2ce058895e03 100644
--- a/arch/ppc/platforms/pmac_pic.c
+++ b/arch/ppc/platforms/pmac_pic.c
@@ -619,7 +619,7 @@ not_found:
619 return viaint; 619 return viaint;
620} 620}
621 621
622static int pmacpic_suspend(struct sys_device *sysdev, u32 state) 622static int pmacpic_suspend(struct sys_device *sysdev, pm_message_t state)
623{ 623{
624 int viaint = pmacpic_find_viaint(); 624 int viaint = pmacpic_find_viaint();
625 625
diff --git a/arch/ppc/platforms/spd8xx.h b/arch/ppc/platforms/spd8xx.h
deleted file mode 100644
index ed48d144f415..000000000000
--- a/arch/ppc/platforms/spd8xx.h
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * Speech Design SPD8xxTS board specific definitions
3 *
4 * Copyright (c) 2000,2001 Wolfgang Denk (wd@denx.de)
5 */
6
7#ifdef __KERNEL__
8#ifndef __ASM_SPD8XX_H__
9#define __ASM_SPD8XX_H__
10
11#include <linux/config.h>
12
13#include <asm/ppcboot.h>
14
15#ifndef __ASSEMBLY__
16#define SPD_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */
17#define SPD_IMAP_SIZE (64 * 1024) /* size of mapped area */
18
19#define IMAP_ADDR SPD_IMMR_BASE /* physical base address of IMMR area */
20#define IMAP_SIZE SPD_IMAP_SIZE /* mapped size of IMMR area */
21
22#define PCMCIA_MEM_ADDR ((uint)0xFE100000)
23#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
24
25#define IDE0_INTERRUPT 10 /* = IRQ5 */
26#define IDE1_INTERRUPT 12 /* = IRQ6 */
27#define CPM_INTERRUPT 13 /* = SIU_LEVEL6 (was: SIU_LEVEL2) */
28
29/* override the default number of IDE hardware interfaces */
30#define MAX_HWIFS 2
31
32/*
33 * Definitions for IDE0 Interface
34 */
35#define IDE0_BASE_OFFSET 0x0000 /* Offset in PCMCIA memory */
36#define IDE0_DATA_REG_OFFSET 0x0000
37#define IDE0_ERROR_REG_OFFSET 0x0081
38#define IDE0_NSECTOR_REG_OFFSET 0x0082
39#define IDE0_SECTOR_REG_OFFSET 0x0083
40#define IDE0_LCYL_REG_OFFSET 0x0084
41#define IDE0_HCYL_REG_OFFSET 0x0085
42#define IDE0_SELECT_REG_OFFSET 0x0086
43#define IDE0_STATUS_REG_OFFSET 0x0087
44#define IDE0_CONTROL_REG_OFFSET 0x0106
45#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */
46
47/*
48 * Definitions for IDE1 Interface
49 */
50#define IDE1_BASE_OFFSET 0x0C00 /* Offset in PCMCIA memory */
51#define IDE1_DATA_REG_OFFSET 0x0000
52#define IDE1_ERROR_REG_OFFSET 0x0081
53#define IDE1_NSECTOR_REG_OFFSET 0x0082
54#define IDE1_SECTOR_REG_OFFSET 0x0083
55#define IDE1_LCYL_REG_OFFSET 0x0084
56#define IDE1_HCYL_REG_OFFSET 0x0085
57#define IDE1_SELECT_REG_OFFSET 0x0086
58#define IDE1_STATUS_REG_OFFSET 0x0087
59#define IDE1_CONTROL_REG_OFFSET 0x0106
60#define IDE1_IRQ_REG_OFFSET 0x000A /* not used */
61
62/* CPM Ethernet through SCCx.
63 *
64 * Bits in parallel I/O port registers that have to be set/cleared
65 * to configure the pins for SCC2 use.
66 */
67#define PA_ENET_MDC ((ushort)0x0001) /* PA 15 !!! */
68#define PA_ENET_MDIO ((ushort)0x0002) /* PA 14 !!! */
69#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
70#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
71#define PA_ENET_RCLK ((ushort)0x0200) /* PA 6 */
72#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
73
74#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */
75
76#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
77#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
78#define PC_ENET_RESET ((ushort)0x0100) /* PC 7 !!! */
79
80/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK2) to
81 * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
82 */
83#define SICR_ENET_MASK ((uint)0x0000ff00)
84#define SICR_ENET_CLKRT ((uint)0x00002E00)
85
86/* We don't use the 8259.
87*/
88#define NR_8259_INTS 0
89
90#endif /* !__ASSEMBLY__ */
91#endif /* __ASM_SPD8XX_H__ */
92#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/tqm8xx.h b/arch/ppc/platforms/tqm8xx.h
index 2150dc87b18f..43ac064ebe5a 100644
--- a/arch/ppc/platforms/tqm8xx.h
+++ b/arch/ppc/platforms/tqm8xx.h
@@ -147,29 +147,6 @@ static __inline__ void ide_led(int on)
147#define SICR_ENET_CLKRT ((uint)0x00002600) 147#define SICR_ENET_CLKRT ((uint)0x00002600)
148#endif /* CONFIG_FPS850L */ 148#endif /* CONFIG_FPS850L */
149 149
150/*** SM850 *********************************************************/
151
152/* The SM850 Service Module uses SCC2 for IrDA and SCC3 for Ethernet */
153
154#ifdef CONFIG_SM850
155#define PB_ENET_RXD ((uint)0x00000004) /* PB 29 */
156#define PB_ENET_TXD ((uint)0x00000002) /* PB 30 */
157#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
158#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
159
160#define PC_ENET_LBK ((ushort)0x0008) /* PC 12 */
161#define PC_ENET_TENA ((ushort)0x0004) /* PC 13 */
162
163#define PC_ENET_RENA ((ushort)0x0800) /* PC 4 */
164#define PC_ENET_CLSN ((ushort)0x0400) /* PC 5 */
165
166/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
167 * SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero.
168 */
169#define SICR_ENET_MASK ((uint)0x00FF0000)
170#define SICR_ENET_CLKRT ((uint)0x00260000)
171#endif /* CONFIG_SM850 */
172
173/* We don't use the 8259. 150/* We don't use the 8259.
174*/ 151*/
175#define NR_8259_INTS 0 152#define NR_8259_INTS 0
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 220a65ab0a51..8b9b226005d1 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -43,8 +43,6 @@ obj-$(CONFIG_PPC_PMAC) += open_pic.o indirect_pci.o
43obj-$(CONFIG_POWER4) += open_pic2.o 43obj-$(CONFIG_POWER4) += open_pic2.o
44obj-$(CONFIG_PPC_CHRP) += open_pic.o indirect_pci.o i8259.o 44obj-$(CONFIG_PPC_CHRP) += open_pic.o indirect_pci.o i8259.o
45obj-$(CONFIG_PPC_PREP) += open_pic.o indirect_pci.o i8259.o todc_time.o 45obj-$(CONFIG_PPC_PREP) += open_pic.o indirect_pci.o i8259.o todc_time.o
46obj-$(CONFIG_ADIR) += i8259.o indirect_pci.o pci_auto.o \
47 todc_time.o
48obj-$(CONFIG_BAMBOO) += indirect_pci.o pci_auto.o todc_time.o 46obj-$(CONFIG_BAMBOO) += indirect_pci.o pci_auto.o todc_time.o
49obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o 47obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o
50obj-$(CONFIG_EBONY) += indirect_pci.o pci_auto.o todc_time.o 48obj-$(CONFIG_EBONY) += indirect_pci.o pci_auto.o todc_time.o
@@ -52,16 +50,10 @@ obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o
52obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o 50obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o
53obj-$(CONFIG_GEMINI) += open_pic.o indirect_pci.o 51obj-$(CONFIG_GEMINI) += open_pic.o indirect_pci.o
54obj-$(CONFIG_GT64260) += gt64260_pic.o 52obj-$(CONFIG_GT64260) += gt64260_pic.o
55obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \
56 pci_auto.o
57obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o 53obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o
58obj-$(CONFIG_HDPU) += pci_auto.o 54obj-$(CONFIG_HDPU) += pci_auto.o
59obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o 55obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o
60obj-$(CONFIG_KATANA) += pci_auto.o 56obj-$(CONFIG_KATANA) += pci_auto.o
61obj-$(CONFIG_MCPN765) += todc_time.o indirect_pci.o pci_auto.o \
62 open_pic.o i8259.o hawk_common.o
63obj-$(CONFIG_MENF1) += todc_time.o i8259.o mpc10x_common.o \
64 pci_auto.o indirect_pci.o
65obj-$(CONFIG_MV64360) += mv64360_pic.o 57obj-$(CONFIG_MV64360) += mv64360_pic.o
66obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o indirect_pci.o 58obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o indirect_pci.o
67obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \ 59obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \
@@ -69,7 +61,6 @@ obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \
69obj-$(CONFIG_MVME5100_IPMC761_PRESENT) += i8259.o 61obj-$(CONFIG_MVME5100_IPMC761_PRESENT) += i8259.o
70obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o 62obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o
71obj-$(CONFIG_PAL4) += cpc700_pic.o 63obj-$(CONFIG_PAL4) += cpc700_pic.o
72obj-$(CONFIG_PCORE) += todc_time.o i8259.o pci_auto.o
73obj-$(CONFIG_POWERPMC250) += pci_auto.o 64obj-$(CONFIG_POWERPMC250) += pci_auto.o
74obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o i8259.o \ 65obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o i8259.o \
75 indirect_pci.o todc_time.o pci_auto.o 66 indirect_pci.o todc_time.o pci_auto.o
@@ -82,7 +73,8 @@ obj-$(CONFIG_SANDPOINT) += i8259.o pci_auto.o todc_time.o
82obj-$(CONFIG_SBC82xx) += todc_time.o 73obj-$(CONFIG_SBC82xx) += todc_time.o
83obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ 74obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
84 todc_time.o 75 todc_time.o
85obj-$(CONFIG_8260) += m8260_setup.o 76obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \
77 ppc_sys.o
86obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o 78obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o
87obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o 79obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
88obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o 80obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 74d8996418e9..8356da4678a2 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -366,10 +366,16 @@ mv64360_pci_error_int_handler(int irq, void *dev_id, struct pt_regs *regs)
366 return IRQ_HANDLED; 366 return IRQ_HANDLED;
367} 367}
368 368
369/*
370 * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of
371 * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as
372 * well. IOW, don't set bit 0.
373 */
374#define MV64360_PCI0_ERR_MASK_VAL 0x00a50c24
375
369static int __init 376static int __init
370mv64360_register_hdlrs(void) 377mv64360_register_hdlrs(void)
371{ 378{
372 u32 mask;
373 int rc; 379 int rc;
374 380
375 /* Clear old errors and register CPU interface error intr handler */ 381 /* Clear old errors and register CPU interface error intr handler */
@@ -387,17 +393,6 @@ mv64360_register_hdlrs(void)
387 mv64360_sram_error_int_handler,SA_INTERRUPT,SRAM_INTR_STR, 0))) 393 mv64360_sram_error_int_handler,SA_INTERRUPT,SRAM_INTR_STR, 0)))
388 printk(KERN_WARNING "Can't register SRAM error handler: %d",rc); 394 printk(KERN_WARNING "Can't register SRAM error handler: %d",rc);
389 395
390 /*
391 * Bit 0 reserved on 64360 and erratum FEr PCI-#11 (PCI internal
392 * data parity error set incorrectly) on rev 0 & 1 of 64460 requires
393 * bit 0 to be cleared.
394 */
395 mask = 0x00a50c24;
396
397 if ((mv64x60_get_bridge_type() == MV64x60_TYPE_MV64460) &&
398 (mv64x60_get_bridge_rev() > 1))
399 mask |= 0x1; /* enable DPErr on 64460 */
400
401 /* Clear old errors and register PCI 0 error intr handler */ 396 /* Clear old errors and register PCI 0 error intr handler */
402 mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0); 397 mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0);
403 if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base, 398 if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base,
@@ -407,7 +402,11 @@ mv64360_register_hdlrs(void)
407 rc); 402 rc);
408 403
409 mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0); 404 mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0);
410 mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, mask); 405 mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, MV64360_PCI0_ERR_MASK_VAL);
406
407 /* Erratum FEr PCI-#16 says to clear bit 0 of PCI SERRn Mask reg. */
408 mv64x60_write(&bh, MV64x60_PCI0_ERR_SERR_MASK,
409 mv64x60_read(&bh, MV64x60_PCI0_ERR_SERR_MASK) & ~0x1UL);
411 410
412 /* Clear old errors and register PCI 1 error intr handler */ 411 /* Clear old errors and register PCI 1 error intr handler */
413 mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0); 412 mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0);
@@ -418,7 +417,11 @@ mv64360_register_hdlrs(void)
418 rc); 417 rc);
419 418
420 mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0); 419 mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0);
421 mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, mask); 420 mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, MV64360_PCI0_ERR_MASK_VAL);
421
422 /* Erratum FEr PCI-#16 says to clear bit 0 of PCI Intr Mask reg. */
423 mv64x60_write(&bh, MV64x60_PCI1_ERR_SERR_MASK,
424 mv64x60_read(&bh, MV64x60_PCI1_ERR_SERR_MASK) & ~0x1UL);
422 425
423 return 0; 426 return 0;
424} 427}
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index cc77177fa1c6..6262b11f366f 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -30,13 +30,16 @@
30#include <asm/mv64x60.h> 30#include <asm/mv64x60.h>
31 31
32 32
33u8 mv64x60_pci_exclude_bridge = 1; 33u8 mv64x60_pci_exclude_bridge = 1;
34spinlock_t mv64x60_lock = SPIN_LOCK_UNLOCKED; 34spinlock_t mv64x60_lock = SPIN_LOCK_UNLOCKED;
35 35
36static phys_addr_t mv64x60_bridge_pbase = 0; 36static phys_addr_t mv64x60_bridge_pbase;
37static void *mv64x60_bridge_vbase = 0; 37static void *mv64x60_bridge_vbase;
38static u32 mv64x60_bridge_type = MV64x60_TYPE_INVALID; 38static u32 mv64x60_bridge_type = MV64x60_TYPE_INVALID;
39static u32 mv64x60_bridge_rev = 0; 39static u32 mv64x60_bridge_rev;
40#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
41static struct pci_controller sysfs_hose_a;
42#endif
40 43
41static u32 gt64260_translate_size(u32 base, u32 size, u32 num_bits); 44static u32 gt64260_translate_size(u32 base, u32 size, u32 num_bits);
42static u32 gt64260_untranslate_size(u32 base, u32 size, u32 num_bits); 45static u32 gt64260_untranslate_size(u32 base, u32 size, u32 num_bits);
@@ -432,6 +435,20 @@ static struct platform_device i2c_device = {
432}; 435};
433#endif 436#endif
434 437
438#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
439static struct mv64xxx_pdata mv64xxx_pdata = {
440 .hs_reg_valid = 0,
441};
442
443static struct platform_device mv64xxx_device = { /* general mv64x60 stuff */
444 .name = MV64XXX_DEV_NAME,
445 .id = 0,
446 .dev = {
447 .platform_data = &mv64xxx_pdata,
448 },
449};
450#endif
451
435static struct platform_device *mv64x60_pd_devs[] __initdata = { 452static struct platform_device *mv64x60_pd_devs[] __initdata = {
436#ifdef CONFIG_SERIAL_MPSC 453#ifdef CONFIG_SERIAL_MPSC
437 &mpsc_shared_device, 454 &mpsc_shared_device,
@@ -453,6 +470,9 @@ static struct platform_device *mv64x60_pd_devs[] __initdata = {
453#ifdef CONFIG_I2C_MV64XXX 470#ifdef CONFIG_I2C_MV64XXX
454 &i2c_device, 471 &i2c_device,
455#endif 472#endif
473#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
474 &mv64xxx_device,
475#endif
456}; 476};
457 477
458/* 478/*
@@ -574,6 +594,11 @@ mv64x60_early_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si)
574 bh->hose_a = &hose_a; 594 bh->hose_a = &hose_a;
575 bh->hose_b = &hose_b; 595 bh->hose_b = &hose_b;
576 596
597#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
598 /* Save a copy of hose_a for sysfs functions -- hack */
599 memcpy(&sysfs_hose_a, &hose_a, sizeof(hose_a));
600#endif
601
577 mv64x60_set_bus(bh, 0, 0); 602 mv64x60_set_bus(bh, 0, 0);
578 mv64x60_set_bus(bh, 1, 0); 603 mv64x60_set_bus(bh, 1, 0);
579 604
@@ -590,8 +615,6 @@ mv64x60_early_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si)
590 615
591 mv64x60_set_bits(bh, MV64x60_PCI0_TO_RETRY, 0xffff); 616 mv64x60_set_bits(bh, MV64x60_PCI0_TO_RETRY, 0xffff);
592 mv64x60_set_bits(bh, MV64x60_PCI1_TO_RETRY, 0xffff); 617 mv64x60_set_bits(bh, MV64x60_PCI1_TO_RETRY, 0xffff);
593
594 return;
595} 618}
596 619
597/* 620/*
@@ -628,19 +651,15 @@ mv64x60_get_32bit_window(struct mv64x60_handle *bh, u32 window,
628 val = mv64x60_read(bh, size_reg); 651 val = mv64x60_read(bh, size_reg);
629 val = get_from_field(val, size_bits); 652 val = get_from_field(val, size_bits);
630 *size = bh->ci->untranslate_size(*base, val, size_bits); 653 *size = bh->ci->untranslate_size(*base, val, size_bits);
631 } 654 } else
632 else
633 *size = 0; 655 *size = 0;
634 } 656 } else {
635 else {
636 *base = 0; 657 *base = 0;
637 *size = 0; 658 *size = 0;
638 } 659 }
639 660
640 pr_debug("get 32bit window: %d, base: 0x%x, size: 0x%x\n", 661 pr_debug("get 32bit window: %d, base: 0x%x, size: 0x%x\n",
641 window, *base, *size); 662 window, *base, *size);
642
643 return;
644} 663}
645 664
646/* 665/*
@@ -677,8 +696,6 @@ mv64x60_set_32bit_window(struct mv64x60_handle *bh, u32 window,
677 696
678 (void)mv64x60_read(bh, base_reg); /* Flush FIFO */ 697 (void)mv64x60_read(bh, base_reg); /* Flush FIFO */
679 } 698 }
680
681 return;
682} 699}
683 700
684/* 701/*
@@ -712,11 +729,9 @@ mv64x60_get_64bit_window(struct mv64x60_handle *bh, u32 window,
712 val = get_from_field(val, size_bits); 729 val = get_from_field(val, size_bits);
713 *size = bh->ci->untranslate_size(*base_lo, val, 730 *size = bh->ci->untranslate_size(*base_lo, val,
714 size_bits); 731 size_bits);
715 } 732 } else
716 else
717 *size = 0; 733 *size = 0;
718 } 734 } else {
719 else {
720 *base_hi = 0; 735 *base_hi = 0;
721 *base_lo = 0; 736 *base_lo = 0;
722 *size = 0; 737 *size = 0;
@@ -724,8 +739,6 @@ mv64x60_get_64bit_window(struct mv64x60_handle *bh, u32 window,
724 739
725 pr_debug("get 64bit window: %d, base hi: 0x%x, base lo: 0x%x, " 740 pr_debug("get 64bit window: %d, base hi: 0x%x, base lo: 0x%x, "
726 "size: 0x%x\n", window, *base_hi, *base_lo, *size); 741 "size: 0x%x\n", window, *base_hi, *base_lo, *size);
727
728 return;
729} 742}
730 743
731/* 744/*
@@ -766,8 +779,6 @@ mv64x60_set_64bit_window(struct mv64x60_handle *bh, u32 window,
766 779
767 (void)mv64x60_read(bh, base_lo_reg); /* Flush FIFO */ 780 (void)mv64x60_read(bh, base_lo_reg); /* Flush FIFO */
768 } 781 }
769
770 return;
771} 782}
772 783
773/* 784/*
@@ -1008,8 +1019,6 @@ mv64x60_get_mem_windows(struct mv64x60_handle *bh,
1008 mem_windows[i][0] = 0; 1019 mem_windows[i][0] = 0;
1009 mem_windows[i][1] = 0; 1020 mem_windows[i][1] = 0;
1010 } 1021 }
1011
1012 return;
1013} 1022}
1014 1023
1015/* 1024/*
@@ -1077,8 +1086,6 @@ mv64x60_config_cpu2mem_windows(struct mv64x60_handle *bh,
1077 } 1086 }
1078 1087
1079 } 1088 }
1080
1081 return;
1082} 1089}
1083 1090
1084/* 1091/*
@@ -1112,8 +1119,7 @@ mv64x60_config_cpu2pci_windows(struct mv64x60_handle *bh,
1112 mv64x60_set_32bit_window(bh, remap_tab[bus][0], 1119 mv64x60_set_32bit_window(bh, remap_tab[bus][0],
1113 pi->pci_io.pci_base_lo, 0, 0); 1120 pi->pci_io.pci_base_lo, 0, 0);
1114 bh->ci->enable_window_32bit(bh, win_tab[bus][0]); 1121 bh->ci->enable_window_32bit(bh, win_tab[bus][0]);
1115 } 1122 } else /* Actually, the window should already be disabled */
1116 else /* Actually, the window should already be disabled */
1117 bh->ci->disable_window_32bit(bh, win_tab[bus][0]); 1123 bh->ci->disable_window_32bit(bh, win_tab[bus][0]);
1118 1124
1119 for (i=0; i<3; i++) 1125 for (i=0; i<3; i++)
@@ -1125,11 +1131,8 @@ mv64x60_config_cpu2pci_windows(struct mv64x60_handle *bh,
1125 pi->pci_mem[i].pci_base_hi, 1131 pi->pci_mem[i].pci_base_hi,
1126 pi->pci_mem[i].pci_base_lo, 0, 0); 1132 pi->pci_mem[i].pci_base_lo, 0, 0);
1127 bh->ci->enable_window_32bit(bh, win_tab[bus][i+1]); 1133 bh->ci->enable_window_32bit(bh, win_tab[bus][i+1]);
1128 } 1134 } else /* Actually, the window should already be disabled */
1129 else /* Actually, the window should already be disabled */
1130 bh->ci->disable_window_32bit(bh, win_tab[bus][i+1]); 1135 bh->ci->disable_window_32bit(bh, win_tab[bus][i+1]);
1131
1132 return;
1133} 1136}
1134 1137
1135/* 1138/*
@@ -1206,8 +1209,6 @@ mv64x60_config_pci2mem_windows(struct mv64x60_handle *bh,
1206 MV64x60_PCI0_BAR_ENABLE : 1209 MV64x60_PCI0_BAR_ENABLE :
1207 MV64x60_PCI1_BAR_ENABLE), (1 << i)); 1210 MV64x60_PCI1_BAR_ENABLE), (1 << i));
1208 } 1211 }
1209
1210 return;
1211} 1212}
1212 1213
1213/* 1214/*
@@ -1229,7 +1230,6 @@ mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr, u32 cfg_data,
1229 *hose = pcibios_alloc_controller(); 1230 *hose = pcibios_alloc_controller();
1230 setup_indirect_pci_nomap(*hose, bh->v_base + cfg_addr, 1231 setup_indirect_pci_nomap(*hose, bh->v_base + cfg_addr,
1231 bh->v_base + cfg_data); 1232 bh->v_base + cfg_data);
1232 return;
1233} 1233}
1234 1234
1235/* 1235/*
@@ -1272,7 +1272,6 @@ mv64x60_config_resources(struct pci_controller *hose,
1272 pi->pci_mem[0].size - 1; 1272 pi->pci_mem[0].size - 1;
1273 hose->pci_mem_offset = pi->pci_mem[0].cpu_base - 1273 hose->pci_mem_offset = pi->pci_mem[0].cpu_base -
1274 pi->pci_mem[0].pci_base_lo; 1274 pi->pci_mem[0].pci_base_lo;
1275 return;
1276} 1275}
1277 1276
1278/* 1277/*
@@ -1309,7 +1308,6 @@ mv64x60_config_pci_params(struct pci_controller *hose,
1309 early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val); 1308 early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val);
1310 1309
1311 mv64x60_pci_exclude_bridge = save_exclude; 1310 mv64x60_pci_exclude_bridge = save_exclude;
1312 return;
1313} 1311}
1314 1312
1315/* 1313/*
@@ -1336,8 +1334,7 @@ mv64x60_set_bus(struct mv64x60_handle *bh, u32 bus, u32 child_bus)
1336 p2p_cfg = MV64x60_PCI0_P2P_CONFIG; 1334 p2p_cfg = MV64x60_PCI0_P2P_CONFIG;
1337 pci_cfg_offset = 0x64; 1335 pci_cfg_offset = 0x64;
1338 hose = bh->hose_a; 1336 hose = bh->hose_a;
1339 } 1337 } else {
1340 else {
1341 pci_mode = bh->pci_mode_b; 1338 pci_mode = bh->pci_mode_b;
1342 p2p_cfg = MV64x60_PCI1_P2P_CONFIG; 1339 p2p_cfg = MV64x60_PCI1_P2P_CONFIG;
1343 pci_cfg_offset = 0xe4; 1340 pci_cfg_offset = 0xe4;
@@ -1352,8 +1349,7 @@ mv64x60_set_bus(struct mv64x60_handle *bh, u32 bus, u32 child_bus)
1352 val |= (child_bus << 16) | 0xff; 1349 val |= (child_bus << 16) | 0xff;
1353 mv64x60_write(bh, p2p_cfg, val); 1350 mv64x60_write(bh, p2p_cfg, val);
1354 (void)mv64x60_read(bh, p2p_cfg); /* Flush FIFO */ 1351 (void)mv64x60_read(bh, p2p_cfg); /* Flush FIFO */
1355 } 1352 } else { /* PCI-X */
1356 else { /* PCI-X */
1357 /* 1353 /*
1358 * Need to use the current bus/dev number (that's in the 1354 * Need to use the current bus/dev number (that's in the
1359 * P2P CONFIG reg) to access the bridge's pci config space. 1355 * P2P CONFIG reg) to access the bridge's pci config space.
@@ -1365,8 +1361,6 @@ mv64x60_set_bus(struct mv64x60_handle *bh, u32 bus, u32 child_bus)
1365 pci_cfg_offset, child_bus << 8); 1361 pci_cfg_offset, child_bus << 8);
1366 mv64x60_pci_exclude_bridge = save_exclude; 1362 mv64x60_pci_exclude_bridge = save_exclude;
1367 } 1363 }
1368
1369 return;
1370} 1364}
1371 1365
1372/* 1366/*
@@ -1423,8 +1417,6 @@ mv64x60_pd_fixup(struct mv64x60_handle *bh, struct platform_device *pd_devs[],
1423 j++; 1417 j++;
1424 } 1418 }
1425 } 1419 }
1426
1427 return;
1428} 1420}
1429 1421
1430/* 1422/*
@@ -1498,8 +1490,6 @@ gt64260_set_pci2mem_window(struct pci_controller *hose, u32 bus, u32 window,
1498 early_write_config_dword(hose, 0, PCI_DEVFN(0, 0), 1490 early_write_config_dword(hose, 0, PCI_DEVFN(0, 0),
1499 gt64260_reg_addrs[bus][window], mv64x60_mask(base, 20) | 0x8); 1491 gt64260_reg_addrs[bus][window], mv64x60_mask(base, 20) | 0x8);
1500 mv64x60_pci_exclude_bridge = save_exclude; 1492 mv64x60_pci_exclude_bridge = save_exclude;
1501
1502 return;
1503} 1493}
1504 1494
1505/* 1495/*
@@ -1523,8 +1513,6 @@ gt64260_set_pci2regs_window(struct mv64x60_handle *bh,
1523 early_write_config_dword(hose, 0, PCI_DEVFN(0,0), gt64260_offset[bus], 1513 early_write_config_dword(hose, 0, PCI_DEVFN(0,0), gt64260_offset[bus],
1524 (base << 16)); 1514 (base << 16));
1525 mv64x60_pci_exclude_bridge = save_exclude; 1515 mv64x60_pci_exclude_bridge = save_exclude;
1526
1527 return;
1528} 1516}
1529 1517
1530/* 1518/*
@@ -1561,7 +1549,6 @@ static void __init
1561gt64260_enable_window_32bit(struct mv64x60_handle *bh, u32 window) 1549gt64260_enable_window_32bit(struct mv64x60_handle *bh, u32 window)
1562{ 1550{
1563 pr_debug("enable 32bit window: %d\n", window); 1551 pr_debug("enable 32bit window: %d\n", window);
1564 return;
1565} 1552}
1566 1553
1567/* 1554/*
@@ -1584,8 +1571,6 @@ gt64260_disable_window_32bit(struct mv64x60_handle *bh, u32 window)
1584 mv64x60_write(bh, gt64260_32bit_windows[window].base_reg,0xfff); 1571 mv64x60_write(bh, gt64260_32bit_windows[window].base_reg,0xfff);
1585 mv64x60_write(bh, gt64260_32bit_windows[window].size_reg, 0); 1572 mv64x60_write(bh, gt64260_32bit_windows[window].size_reg, 0);
1586 } 1573 }
1587
1588 return;
1589} 1574}
1590 1575
1591/* 1576/*
@@ -1599,7 +1584,6 @@ static void __init
1599gt64260_enable_window_64bit(struct mv64x60_handle *bh, u32 window) 1584gt64260_enable_window_64bit(struct mv64x60_handle *bh, u32 window)
1600{ 1585{
1601 pr_debug("enable 64bit window: %d\n", window); 1586 pr_debug("enable 64bit window: %d\n", window);
1602 return; /* Enabled when window configured (i.e., when top >= base) */
1603} 1587}
1604 1588
1605/* 1589/*
@@ -1624,8 +1608,6 @@ gt64260_disable_window_64bit(struct mv64x60_handle *bh, u32 window)
1624 mv64x60_write(bh, gt64260_64bit_windows[window].base_hi_reg, 0); 1608 mv64x60_write(bh, gt64260_64bit_windows[window].base_hi_reg, 0);
1625 mv64x60_write(bh, gt64260_64bit_windows[window].size_reg, 0); 1609 mv64x60_write(bh, gt64260_64bit_windows[window].size_reg, 0);
1626 } 1610 }
1627
1628 return;
1629} 1611}
1630 1612
1631/* 1613/*
@@ -1712,8 +1694,6 @@ gt64260_disable_all_windows(struct mv64x60_handle *bh,
1712 mv64x60_write(bh, GT64260_IC_CPU_INT_1_MASK, 0); 1694 mv64x60_write(bh, GT64260_IC_CPU_INT_1_MASK, 0);
1713 mv64x60_write(bh, GT64260_IC_CPU_INT_2_MASK, 0); 1695 mv64x60_write(bh, GT64260_IC_CPU_INT_2_MASK, 0);
1714 mv64x60_write(bh, GT64260_IC_CPU_INT_3_MASK, 0); 1696 mv64x60_write(bh, GT64260_IC_CPU_INT_3_MASK, 0);
1715
1716 return;
1717} 1697}
1718 1698
1719/* 1699/*
@@ -1781,14 +1761,11 @@ gt64260a_chip_specific_init(struct mv64x60_handle *bh,
1781 mv64x60_mpsc1_pdata.cache_mgmt = 1; 1761 mv64x60_mpsc1_pdata.cache_mgmt = 1;
1782 1762
1783 if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0)) 1763 if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0))
1784 != NULL) { 1764 != NULL) {
1785
1786 r->start = MV64x60_IRQ_SDMA_0; 1765 r->start = MV64x60_IRQ_SDMA_0;
1787 r->end = MV64x60_IRQ_SDMA_0; 1766 r->end = MV64x60_IRQ_SDMA_0;
1788 } 1767 }
1789#endif 1768#endif
1790
1791 return;
1792} 1769}
1793 1770
1794/* 1771/*
@@ -1861,14 +1838,11 @@ gt64260b_chip_specific_init(struct mv64x60_handle *bh,
1861 mv64x60_mpsc1_pdata.cache_mgmt = 1; 1838 mv64x60_mpsc1_pdata.cache_mgmt = 1;
1862 1839
1863 if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0)) 1840 if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0))
1864 != NULL) { 1841 != NULL) {
1865
1866 r->start = MV64x60_IRQ_SDMA_0; 1842 r->start = MV64x60_IRQ_SDMA_0;
1867 r->end = MV64x60_IRQ_SDMA_0; 1843 r->end = MV64x60_IRQ_SDMA_0;
1868 } 1844 }
1869#endif 1845#endif
1870
1871 return;
1872} 1846}
1873 1847
1874/* 1848/*
@@ -1945,8 +1919,6 @@ mv64360_set_pci2mem_window(struct pci_controller *hose, u32 bus, u32 window,
1945 mv64360_reg_addrs[bus][window].base_lo_bar, 1919 mv64360_reg_addrs[bus][window].base_lo_bar,
1946 mv64x60_mask(base,20) | 0xc); 1920 mv64x60_mask(base,20) | 0xc);
1947 mv64x60_pci_exclude_bridge = save_exclude; 1921 mv64x60_pci_exclude_bridge = save_exclude;
1948
1949 return;
1950} 1922}
1951 1923
1952/* 1924/*
@@ -1972,8 +1944,6 @@ mv64360_set_pci2regs_window(struct mv64x60_handle *bh,
1972 early_write_config_dword(hose, 0, PCI_DEVFN(0,0), 1944 early_write_config_dword(hose, 0, PCI_DEVFN(0,0),
1973 mv64360_offset[bus][1], 0); 1945 mv64360_offset[bus][1], 0);
1974 mv64x60_pci_exclude_bridge = save_exclude; 1946 mv64x60_pci_exclude_bridge = save_exclude;
1975
1976 return;
1977} 1947}
1978 1948
1979/* 1949/*
@@ -2082,8 +2052,6 @@ mv64360_enable_window_32bit(struct mv64x60_handle *bh, u32 window)
2082 "32bit table corrupted"); 2052 "32bit table corrupted");
2083 } 2053 }
2084 } 2054 }
2085
2086 return;
2087} 2055}
2088 2056
2089/* 2057/*
@@ -2139,8 +2107,6 @@ mv64360_disable_window_32bit(struct mv64x60_handle *bh, u32 window)
2139 "32bit table corrupted"); 2107 "32bit table corrupted");
2140 } 2108 }
2141 } 2109 }
2142
2143 return;
2144} 2110}
2145 2111
2146/* 2112/*
@@ -2158,8 +2124,7 @@ mv64360_enable_window_64bit(struct mv64x60_handle *bh, u32 window)
2158 (mv64360_64bit_windows[window].size_reg != 0)) { 2124 (mv64360_64bit_windows[window].size_reg != 0)) {
2159 2125
2160 if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK) 2126 if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK)
2161 == MV64x60_EXTRA_PCIACC_ENAB) 2127 == MV64x60_EXTRA_PCIACC_ENAB)
2162
2163 mv64x60_set_bits(bh, 2128 mv64x60_set_bits(bh,
2164 mv64360_64bit_windows[window].base_lo_reg, 2129 mv64360_64bit_windows[window].base_lo_reg,
2165 (1 << (mv64360_64bit_windows[window].extra & 2130 (1 << (mv64360_64bit_windows[window].extra &
@@ -2168,8 +2133,6 @@ mv64360_enable_window_64bit(struct mv64x60_handle *bh, u32 window)
2168 printk(KERN_ERR "mv64360_enable: %s\n", 2133 printk(KERN_ERR "mv64360_enable: %s\n",
2169 "64bit table corrupted"); 2134 "64bit table corrupted");
2170 } 2135 }
2171
2172 return;
2173} 2136}
2174 2137
2175/* 2138/*
@@ -2186,11 +2149,9 @@ mv64360_disable_window_64bit(struct mv64x60_handle *bh, u32 window)
2186 mv64360_64bit_windows[window].size_reg); 2149 mv64360_64bit_windows[window].size_reg);
2187 2150
2188 if ((mv64360_64bit_windows[window].base_lo_reg != 0) && 2151 if ((mv64360_64bit_windows[window].base_lo_reg != 0) &&
2189 (mv64360_64bit_windows[window].size_reg != 0)) { 2152 (mv64360_64bit_windows[window].size_reg != 0)) {
2190
2191 if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK) 2153 if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK)
2192 == MV64x60_EXTRA_PCIACC_ENAB) 2154 == MV64x60_EXTRA_PCIACC_ENAB)
2193
2194 mv64x60_clr_bits(bh, 2155 mv64x60_clr_bits(bh,
2195 mv64360_64bit_windows[window].base_lo_reg, 2156 mv64360_64bit_windows[window].base_lo_reg,
2196 (1 << (mv64360_64bit_windows[window].extra & 2157 (1 << (mv64360_64bit_windows[window].extra &
@@ -2199,8 +2160,6 @@ mv64360_disable_window_64bit(struct mv64x60_handle *bh, u32 window)
2199 printk(KERN_ERR "mv64360_disable: %s\n", 2160 printk(KERN_ERR "mv64360_disable: %s\n",
2200 "64bit table corrupted"); 2161 "64bit table corrupted");
2201 } 2162 }
2202
2203 return;
2204} 2163}
2205 2164
2206/* 2165/*
@@ -2241,8 +2200,6 @@ mv64360_disable_all_windows(struct mv64x60_handle *bh,
2241 /* Disable all PCI-><whatever> windows */ 2200 /* Disable all PCI-><whatever> windows */
2242 mv64x60_set_bits(bh, MV64x60_PCI0_BAR_ENABLE, 0x0000f9ff); 2201 mv64x60_set_bits(bh, MV64x60_PCI0_BAR_ENABLE, 0x0000f9ff);
2243 mv64x60_set_bits(bh, MV64x60_PCI1_BAR_ENABLE, 0x0000f9ff); 2202 mv64x60_set_bits(bh, MV64x60_PCI1_BAR_ENABLE, 0x0000f9ff);
2244
2245 return;
2246} 2203}
2247 2204
2248/* 2205/*
@@ -2335,8 +2292,6 @@ mv64360_config_io2mem_windows(struct mv64x60_handle *bh,
2335 mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_3, 2292 mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_3,
2336 (0x3 << (i << 1))); 2293 (0x3 << (i << 1)));
2337 } 2294 }
2338
2339 return;
2340} 2295}
2341 2296
2342/* 2297/*
@@ -2350,42 +2305,145 @@ static void __init
2350mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base) 2305mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base)
2351{ 2306{
2352 pr_debug("set mpsc->internal regs, base: 0x%x\n", base); 2307 pr_debug("set mpsc->internal regs, base: 0x%x\n", base);
2353
2354 mv64x60_write(bh, MV64360_MPSC2REGS_BASE, base & 0xffff0000); 2308 mv64x60_write(bh, MV64360_MPSC2REGS_BASE, base & 0xffff0000);
2355 return;
2356} 2309}
2357 2310
2358/* 2311/*
2359 * mv64360_chip_specific_init() 2312 * mv64360_chip_specific_init()
2360 * 2313 *
2361 * No errata work arounds for the MV64360 implemented at this point. 2314 * Implement errata work arounds for the MV64360.
2362 */ 2315 */
2363static void __init 2316static void __init
2364mv64360_chip_specific_init(struct mv64x60_handle *bh, 2317mv64360_chip_specific_init(struct mv64x60_handle *bh,
2365 struct mv64x60_setup_info *si) 2318 struct mv64x60_setup_info *si)
2366{ 2319{
2320#if !defined(CONFIG_NOT_COHERENT_CACHE)
2321 mv64x60_set_bits(bh, MV64360_D_UNIT_CONTROL_HIGH, (1<<24));
2322#endif
2367#ifdef CONFIG_SERIAL_MPSC 2323#ifdef CONFIG_SERIAL_MPSC
2368 mv64x60_mpsc0_pdata.brg_can_tune = 1; 2324 mv64x60_mpsc0_pdata.brg_can_tune = 1;
2369 mv64x60_mpsc0_pdata.cache_mgmt = 1; 2325 mv64x60_mpsc0_pdata.cache_mgmt = 1;
2370 mv64x60_mpsc1_pdata.brg_can_tune = 1; 2326 mv64x60_mpsc1_pdata.brg_can_tune = 1;
2371 mv64x60_mpsc1_pdata.cache_mgmt = 1; 2327 mv64x60_mpsc1_pdata.cache_mgmt = 1;
2372#endif 2328#endif
2373
2374 return;
2375} 2329}
2376 2330
2377/* 2331/*
2378 * mv64460_chip_specific_init() 2332 * mv64460_chip_specific_init()
2379 * 2333 *
2380 * No errata work arounds for the MV64460 implemented at this point. 2334 * Implement errata work arounds for the MV64460.
2381 */ 2335 */
2382static void __init 2336static void __init
2383mv64460_chip_specific_init(struct mv64x60_handle *bh, 2337mv64460_chip_specific_init(struct mv64x60_handle *bh,
2384 struct mv64x60_setup_info *si) 2338 struct mv64x60_setup_info *si)
2385{ 2339{
2340#if !defined(CONFIG_NOT_COHERENT_CACHE)
2341 mv64x60_set_bits(bh, MV64360_D_UNIT_CONTROL_HIGH, (1<<24) | (1<<25));
2342 mv64x60_set_bits(bh, MV64460_D_UNIT_MMASK, (1<<1) | (1<<4));
2343#endif
2386#ifdef CONFIG_SERIAL_MPSC 2344#ifdef CONFIG_SERIAL_MPSC
2387 mv64x60_mpsc0_pdata.brg_can_tune = 1; 2345 mv64x60_mpsc0_pdata.brg_can_tune = 1;
2346 mv64x60_mpsc0_pdata.cache_mgmt = 1;
2388 mv64x60_mpsc1_pdata.brg_can_tune = 1; 2347 mv64x60_mpsc1_pdata.brg_can_tune = 1;
2348 mv64x60_mpsc1_pdata.cache_mgmt = 1;
2389#endif 2349#endif
2390 return;
2391} 2350}
2351
2352
2353#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
2354/* Export the hotswap register via sysfs for enum event monitoring */
2355#define VAL_LEN_MAX 11 /* 32-bit hex or dec stringified number + '\n' */
2356
2357DECLARE_MUTEX(mv64xxx_hs_lock);
2358
2359static ssize_t
2360mv64xxx_hs_reg_read(struct kobject *kobj, char *buf, loff_t off, size_t count)
2361{
2362 u32 v;
2363 u8 save_exclude;
2364
2365 if (off > 0)
2366 return 0;
2367 if (count < VAL_LEN_MAX)
2368 return -EINVAL;
2369
2370 if (down_interruptible(&mv64xxx_hs_lock))
2371 return -ERESTARTSYS;
2372 save_exclude = mv64x60_pci_exclude_bridge;
2373 mv64x60_pci_exclude_bridge = 0;
2374 early_read_config_dword(&sysfs_hose_a, 0, PCI_DEVFN(0, 0),
2375 MV64360_PCICFG_CPCI_HOTSWAP, &v);
2376 mv64x60_pci_exclude_bridge = save_exclude;
2377 up(&mv64xxx_hs_lock);
2378
2379 return sprintf(buf, "0x%08x\n", v);
2380}
2381
2382static ssize_t
2383mv64xxx_hs_reg_write(struct kobject *kobj, char *buf, loff_t off, size_t count)
2384{
2385 u32 v;
2386 u8 save_exclude;
2387
2388 if (off > 0)
2389 return 0;
2390 if (count <= 0)
2391 return -EINVAL;
2392
2393 if (sscanf(buf, "%i", &v) == 1) {
2394 if (down_interruptible(&mv64xxx_hs_lock))
2395 return -ERESTARTSYS;
2396 save_exclude = mv64x60_pci_exclude_bridge;
2397 mv64x60_pci_exclude_bridge = 0;
2398 early_write_config_dword(&sysfs_hose_a, 0, PCI_DEVFN(0, 0),
2399 MV64360_PCICFG_CPCI_HOTSWAP, v);
2400 mv64x60_pci_exclude_bridge = save_exclude;
2401 up(&mv64xxx_hs_lock);
2402 }
2403 else
2404 count = -EINVAL;
2405
2406 return count;
2407}
2408
2409static struct bin_attribute mv64xxx_hs_reg_attr = { /* Hotswap register */
2410 .attr = {
2411 .name = "hs_reg",
2412 .mode = S_IRUGO | S_IWUSR,
2413 .owner = THIS_MODULE,
2414 },
2415 .size = VAL_LEN_MAX,
2416 .read = mv64xxx_hs_reg_read,
2417 .write = mv64xxx_hs_reg_write,
2418};
2419
2420/* Provide sysfs file indicating if this platform supports the hs_reg */
2421static ssize_t
2422mv64xxx_hs_reg_valid_show(struct device *dev, struct device_attribute *attr,
2423 char *buf)
2424{
2425 struct platform_device *pdev;
2426 struct mv64xxx_pdata *pdp;
2427 u32 v;
2428
2429 pdev = container_of(dev, struct platform_device, dev);
2430 pdp = (struct mv64xxx_pdata *)pdev->dev.platform_data;
2431
2432 if (down_interruptible(&mv64xxx_hs_lock))
2433 return -ERESTARTSYS;
2434 v = pdp->hs_reg_valid;
2435 up(&mv64xxx_hs_lock);
2436
2437 return sprintf(buf, "%i\n", v);
2438}
2439static DEVICE_ATTR(hs_reg_valid, S_IRUGO, mv64xxx_hs_reg_valid_show, NULL);
2440
2441static int __init
2442mv64xxx_sysfs_init(void)
2443{
2444 sysfs_create_bin_file(&mv64xxx_device.dev.kobj, &mv64xxx_hs_reg_attr);
2445 sysfs_create_file(&mv64xxx_device.dev.kobj,&dev_attr_hs_reg_valid.attr);
2446 return 0;
2447}
2448subsys_initcall(mv64xxx_sysfs_init);
2449#endif
diff --git a/arch/ppc/syslib/of_device.c b/arch/ppc/syslib/of_device.c
index 1eb4f726ca9f..da8a0f2128dc 100644
--- a/arch/ppc/syslib/of_device.c
+++ b/arch/ppc/syslib/of_device.c
@@ -105,7 +105,7 @@ static int of_device_remove(struct device *dev)
105 return 0; 105 return 0;
106} 106}
107 107
108static int of_device_suspend(struct device *dev, u32 state) 108static int of_device_suspend(struct device *dev, pm_message_t state)
109{ 109{
110 struct of_device * of_dev = to_of_device(dev); 110 struct of_device * of_dev = to_of_device(dev);
111 struct of_platform_driver * drv = to_of_platform_driver(dev->driver); 111 struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index ad39b86ca92c..53da58523e39 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -948,7 +948,7 @@ static void openpic_cached_disable_irq(u_int irq)
948 * we need something better to deal with that... Maybe switch to S1 for 948 * we need something better to deal with that... Maybe switch to S1 for
949 * cpufreq changes 949 * cpufreq changes
950 */ 950 */
951int openpic_suspend(struct sys_device *sysdev, u32 state) 951int openpic_suspend(struct sys_device *sysdev, pm_message_t state)
952{ 952{
953 int i; 953 int i;
954 unsigned long flags; 954 unsigned long flags;
diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c
index e170aebeb69b..b843c4fef25e 100644
--- a/arch/ppc/syslib/ppc4xx_setup.c
+++ b/arch/ppc/syslib/ppc4xx_setup.c
@@ -48,10 +48,6 @@
48extern void abort(void); 48extern void abort(void);
49extern void ppc4xx_find_bridges(void); 49extern void ppc4xx_find_bridges(void);
50 50
51extern void ppc4xx_wdt_heartbeat(void);
52extern int wdt_enable;
53extern unsigned long wdt_period;
54
55/* Global Variables */ 51/* Global Variables */
56bd_t __res; 52bd_t __res;
57 53
@@ -171,7 +167,7 @@ ppc4xx_calibrate_decr(void)
171 unsigned int freq; 167 unsigned int freq;
172 bd_t *bip = &__res; 168 bd_t *bip = &__res;
173 169
174#if defined(CONFIG_WALNUT) || defined(CONFIG_ASH) || defined(CONFIG_SYCAMORE) 170#if defined(CONFIG_WALNUT) || defined(CONFIG_SYCAMORE)
175 /* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */ 171 /* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */
176 mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE); 172 mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE);
177#endif 173#endif
@@ -257,22 +253,6 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
257 *(char *) (r7 + KERNELBASE) = 0; 253 *(char *) (r7 + KERNELBASE) = 0;
258 strcpy(cmd_line, (char *) (r6 + KERNELBASE)); 254 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
259 } 255 }
260#if defined(CONFIG_PPC405_WDT)
261/* Look for wdt= option on command line */
262 if (strstr(cmd_line, "wdt=")) {
263 int valid_wdt = 0;
264 char *p, *q;
265 for (q = cmd_line; (p = strstr(q, "wdt=")) != 0;) {
266 q = p + 4;
267 if (p > cmd_line && p[-1] != ' ')
268 continue;
269 wdt_period = simple_strtoul(q, &q, 0);
270 valid_wdt = 1;
271 ++q;
272 }
273 wdt_enable = valid_wdt;
274 }
275#endif
276 256
277 /* Initialize machine-dependent vectors */ 257 /* Initialize machine-dependent vectors */
278 258
@@ -287,11 +267,6 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
287 267
288 ppc_md.calibrate_decr = ppc4xx_calibrate_decr; 268 ppc_md.calibrate_decr = ppc4xx_calibrate_decr;
289 269
290#ifdef CONFIG_PPC405_WDT
291 ppc_md.heartbeat = ppc4xx_wdt_heartbeat;
292#endif
293 ppc_md.heartbeat_count = 0;
294
295 ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory; 270 ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory;
296 ppc_md.setup_io_mappings = ppc4xx_map_io; 271 ppc_md.setup_io_mappings = ppc4xx_map_io;
297 272
diff --git a/arch/ppc/syslib/ppc83xx_pci.h b/arch/ppc/syslib/ppc83xx_pci.h
new file mode 100644
index 000000000000..ec691640f6be
--- /dev/null
+++ b/arch/ppc/syslib/ppc83xx_pci.h
@@ -0,0 +1,151 @@
1/* Created by Tony Li <tony.li@freescale.com>
2 * Copyright (c) 2005 freescale semiconductor
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __PPC_SYSLIB_PPC83XX_PCI_H
20#define __PPC_SYSLIB_PPC83XX_PCI_H
21
22typedef struct immr_clk {
23 u32 spmr; /* system PLL mode Register */
24 u32 occr; /* output clock control Register */
25 u32 sccr; /* system clock control Register */
26 u8 res0[0xF4];
27} immr_clk_t;
28
29/*
30 * Sequencer
31 */
32typedef struct immr_ios {
33 u32 potar0;
34 u8 res0[4];
35 u32 pobar0;
36 u8 res1[4];
37 u32 pocmr0;
38 u8 res2[4];
39 u32 potar1;
40 u8 res3[4];
41 u32 pobar1;
42 u8 res4[4];
43 u32 pocmr1;
44 u8 res5[4];
45 u32 potar2;
46 u8 res6[4];
47 u32 pobar2;
48 u8 res7[4];
49 u32 pocmr2;
50 u8 res8[4];
51 u32 potar3;
52 u8 res9[4];
53 u32 pobar3;
54 u8 res10[4];
55 u32 pocmr3;
56 u8 res11[4];
57 u32 potar4;
58 u8 res12[4];
59 u32 pobar4;
60 u8 res13[4];
61 u32 pocmr4;
62 u8 res14[4];
63 u32 potar5;
64 u8 res15[4];
65 u32 pobar5;
66 u8 res16[4];
67 u32 pocmr5;
68 u8 res17[4];
69 u8 res18[0x60];
70 u32 pmcr;
71 u8 res19[4];
72 u32 dtcr;
73 u8 res20[4];
74} immr_ios_t;
75#define POTAR_TA_MASK 0x000fffff
76#define POBAR_BA_MASK 0x000fffff
77#define POCMR_EN 0x80000000
78#define POCMR_IO 0x40000000 /* 0--memory space 1--I/O space */
79#define POCMR_SE 0x20000000 /* streaming enable */
80#define POCMR_DST 0x10000000 /* 0--PCI1 1--PCI2 */
81#define POCMR_CM_MASK 0x000fffff
82
83/*
84 * PCI Controller Control and Status Registers
85 */
86typedef struct immr_pcictrl {
87 u32 esr;
88 u32 ecdr;
89 u32 eer;
90 u32 eatcr;
91 u32 eacr;
92 u32 eeacr;
93 u32 edlcr;
94 u32 edhcr;
95 u32 gcr;
96 u32 ecr;
97 u32 gsr;
98 u8 res0[12];
99 u32 pitar2;
100 u8 res1[4];
101 u32 pibar2;
102 u32 piebar2;
103 u32 piwar2;
104 u8 res2[4];
105 u32 pitar1;
106 u8 res3[4];
107 u32 pibar1;
108 u32 piebar1;
109 u32 piwar1;
110 u8 res4[4];
111 u32 pitar0;
112 u8 res5[4];
113 u32 pibar0;
114 u8 res6[4];
115 u32 piwar0;
116 u8 res7[132];
117} immr_pcictrl_t;
118#define PITAR_TA_MASK 0x000fffff
119#define PIBAR_MASK 0xffffffff
120#define PIEBAR_EBA_MASK 0x000fffff
121#define PIWAR_EN 0x80000000
122#define PIWAR_PF 0x20000000
123#define PIWAR_RTT_MASK 0x000f0000
124#define PIWAR_RTT_NO_SNOOP 0x00040000
125#define PIWAR_RTT_SNOOP 0x00050000
126#define PIWAR_WTT_MASK 0x0000f000
127#define PIWAR_WTT_NO_SNOOP 0x00004000
128#define PIWAR_WTT_SNOOP 0x00005000
129#define PIWAR_IWS_MASK 0x0000003F
130#define PIWAR_IWS_4K 0x0000000B
131#define PIWAR_IWS_8K 0x0000000C
132#define PIWAR_IWS_16K 0x0000000D
133#define PIWAR_IWS_32K 0x0000000E
134#define PIWAR_IWS_64K 0x0000000F
135#define PIWAR_IWS_128K 0x00000010
136#define PIWAR_IWS_256K 0x00000011
137#define PIWAR_IWS_512K 0x00000012
138#define PIWAR_IWS_1M 0x00000013
139#define PIWAR_IWS_2M 0x00000014
140#define PIWAR_IWS_4M 0x00000015
141#define PIWAR_IWS_8M 0x00000016
142#define PIWAR_IWS_16M 0x00000017
143#define PIWAR_IWS_32M 0x00000018
144#define PIWAR_IWS_64M 0x00000019
145#define PIWAR_IWS_128M 0x0000001A
146#define PIWAR_IWS_256M 0x0000001B
147#define PIWAR_IWS_512M 0x0000001C
148#define PIWAR_IWS_1G 0x0000001D
149#define PIWAR_IWS_2G 0x0000001E
150
151#endif /* __PPC_SYSLIB_PPC83XX_PCI_H */
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index 602a86891f7f..890484e576e7 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -11,6 +11,17 @@
11 * under the terms of the GNU General Public License as published by the 11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your 12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version. 13 * option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 * Added PCI support -- Tony Li <tony.li@freescale.com>
14 */ 25 */
15 26
16#include <linux/config.h> 27#include <linux/config.h>
@@ -31,6 +42,10 @@
31#include <asm/delay.h> 42#include <asm/delay.h>
32 43
33#include <syslib/ppc83xx_setup.h> 44#include <syslib/ppc83xx_setup.h>
45#if defined(CONFIG_PCI)
46#include <asm/delay.h>
47#include <syslib/ppc83xx_pci.h>
48#endif
34 49
35phys_addr_t immrbar; 50phys_addr_t immrbar;
36 51
@@ -162,4 +177,237 @@ mpc83xx_halt(void)
162 for(;;); 177 for(;;);
163} 178}
164 179
165/* PCI SUPPORT DOES NOT EXIT, MODEL after ppc85xx_setup.c */ 180#if defined(CONFIG_PCI)
181void __init
182mpc83xx_setup_pci1(struct pci_controller *hose)
183{
184 u16 reg16;
185 volatile immr_pcictrl_t * pci_ctrl;
186 volatile immr_ios_t * ios;
187 bd_t *binfo = (bd_t *) __res;
188
189 pci_ctrl = ioremap(binfo->bi_immr_base + 0x8500, sizeof(immr_pcictrl_t));
190 ios = ioremap(binfo->bi_immr_base + 0x8400, sizeof(immr_ios_t));
191
192 /*
193 * Configure PCI Outbound Translation Windows
194 */
195 ios->potar0 = (MPC83xx_PCI1_LOWER_MEM >> 12) & POTAR_TA_MASK;
196 ios->pobar0 = (MPC83xx_PCI1_LOWER_MEM >> 12) & POBAR_BA_MASK;
197 ios->pocmr0 = POCMR_EN |
198 (((0xffffffff - (MPC83xx_PCI1_UPPER_MEM -
199 MPC83xx_PCI1_LOWER_MEM)) >> 12) & POCMR_CM_MASK);
200
201 /* mapped to PCI1 IO space */
202 ios->potar1 = (MPC83xx_PCI1_LOWER_IO >> 12) & POTAR_TA_MASK;
203 ios->pobar1 = (MPC83xx_PCI1_IO_BASE >> 12) & POBAR_BA_MASK;
204 ios->pocmr1 = POCMR_EN | POCMR_IO |
205 (((0xffffffff - (MPC83xx_PCI1_UPPER_IO -
206 MPC83xx_PCI1_LOWER_IO)) >> 12) & POCMR_CM_MASK);
207
208 /*
209 * Configure PCI Inbound Translation Windows
210 */
211 pci_ctrl->pitar1 = 0x0;
212 pci_ctrl->pibar1 = 0x0;
213 pci_ctrl->piebar1 = 0x0;
214 pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_2G;
215
216 /*
217 * Release PCI RST signal
218 */
219 pci_ctrl->gcr = 0;
220 udelay(2000);
221 pci_ctrl->gcr = 1;
222 udelay(2000);
223
224 reg16 = 0xff;
225 early_read_config_word(hose, hose->first_busno, 0, PCI_COMMAND, &reg16);
226 reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
227 early_write_config_word(hose, hose->first_busno, 0, PCI_COMMAND, reg16);
228
229 /*
230 * Clear non-reserved bits in status register.
231 */
232 early_write_config_word(hose, hose->first_busno, 0, PCI_STATUS, 0xffff);
233 early_write_config_byte(hose, hose->first_busno, 0, PCI_LATENCY_TIMER, 0x80);
234
235 iounmap(pci_ctrl);
236 iounmap(ios);
237}
238
239void __init
240mpc83xx_setup_pci2(struct pci_controller *hose)
241{
242 u16 reg16;
243 volatile immr_pcictrl_t * pci_ctrl;
244 volatile immr_ios_t * ios;
245 bd_t *binfo = (bd_t *) __res;
246
247 pci_ctrl = ioremap(binfo->bi_immr_base + 0x8600, sizeof(immr_pcictrl_t));
248 ios = ioremap(binfo->bi_immr_base + 0x8400, sizeof(immr_ios_t));
249
250 /*
251 * Configure PCI Outbound Translation Windows
252 */
253 ios->potar3 = (MPC83xx_PCI2_LOWER_MEM >> 12) & POTAR_TA_MASK;
254 ios->pobar3 = (MPC83xx_PCI2_LOWER_MEM >> 12) & POBAR_BA_MASK;
255 ios->pocmr3 = POCMR_EN | POCMR_DST |
256 (((0xffffffff - (MPC83xx_PCI2_UPPER_MEM -
257 MPC83xx_PCI2_LOWER_MEM)) >> 12) & POCMR_CM_MASK);
258
259 /* mapped to PCI2 IO space */
260 ios->potar4 = (MPC83xx_PCI2_LOWER_IO >> 12) & POTAR_TA_MASK;
261 ios->pobar4 = (MPC83xx_PCI2_IO_BASE >> 12) & POBAR_BA_MASK;
262 ios->pocmr4 = POCMR_EN | POCMR_DST | POCMR_IO |
263 (((0xffffffff - (MPC83xx_PCI2_UPPER_IO -
264 MPC83xx_PCI2_LOWER_IO)) >> 12) & POCMR_CM_MASK);
265
266 /*
267 * Configure PCI Inbound Translation Windows
268 */
269 pci_ctrl->pitar1 = 0x0;
270 pci_ctrl->pibar1 = 0x0;
271 pci_ctrl->piebar1 = 0x0;
272 pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_2G;
273
274 /*
275 * Release PCI RST signal
276 */
277 pci_ctrl->gcr = 0;
278 udelay(2000);
279 pci_ctrl->gcr = 1;
280 udelay(2000);
281
282 reg16 = 0xff;
283 early_read_config_word(hose, hose->first_busno, 0, PCI_COMMAND, &reg16);
284 reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
285 early_write_config_word(hose, hose->first_busno, 0, PCI_COMMAND, reg16);
286
287 /*
288 * Clear non-reserved bits in status register.
289 */
290 early_write_config_word(hose, hose->first_busno, 0, PCI_STATUS, 0xffff);
291 early_write_config_byte(hose, hose->first_busno, 0, PCI_LATENCY_TIMER, 0x80);
292
293 iounmap(pci_ctrl);
294 iounmap(ios);
295}
296
297/*
298 * PCI buses can be enabled only if SYS board combinates with PIB
299 * (Platform IO Board) board which provide 3 PCI slots. There is 2 PCI buses
300 * and 3 PCI slots, so people must configure the routes between them before
301 * enable PCI bus. This routes are under the control of PCA9555PW device which
302 * can be accessed via I2C bus 2 and are configured by firmware. Refer to
303 * Freescale to get more information about firmware configuration.
304 */
305
306extern int mpc83xx_exclude_device(u_char bus, u_char devfn);
307extern int mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel,
308 unsigned char pin);
309void __init
310mpc83xx_setup_hose(void)
311{
312 u32 val32;
313 volatile immr_clk_t * clk;
314 struct pci_controller * hose1;
315#ifdef CONFIG_MPC83xx_PCI2
316 struct pci_controller * hose2;
317#endif
318 bd_t * binfo = (bd_t *)__res;
319
320 clk = ioremap(binfo->bi_immr_base + 0xA00,
321 sizeof(immr_clk_t));
322
323 /*
324 * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
325 */
326 val32 = clk->occr;
327 udelay(2000);
328 clk->occr = 0xff000000;
329 udelay(2000);
330
331 iounmap(clk);
332
333 hose1 = pcibios_alloc_controller();
334 if(!hose1)
335 return;
336
337 ppc_md.pci_swizzle = common_swizzle;
338 ppc_md.pci_map_irq = mpc83xx_map_irq;
339
340 hose1->bus_offset = 0;
341 hose1->first_busno = 0;
342 hose1->last_busno = 0xff;
343
344 setup_indirect_pci(hose1, binfo->bi_immr_base + PCI1_CFG_ADDR_OFFSET,
345 binfo->bi_immr_base + PCI1_CFG_DATA_OFFSET);
346 hose1->set_cfg_type = 1;
347
348 mpc83xx_setup_pci1(hose1);
349
350 hose1->pci_mem_offset = MPC83xx_PCI1_MEM_OFFSET;
351 hose1->mem_space.start = MPC83xx_PCI1_LOWER_MEM;
352 hose1->mem_space.end = MPC83xx_PCI1_UPPER_MEM;
353
354 hose1->io_base_phys = MPC83xx_PCI1_IO_BASE;
355 hose1->io_space.start = MPC83xx_PCI1_LOWER_IO;
356 hose1->io_space.end = MPC83xx_PCI1_UPPER_IO;
357#ifdef CONFIG_MPC83xx_PCI2
358 isa_io_base = (unsigned long)ioremap(MPC83xx_PCI1_IO_BASE,
359 MPC83xx_PCI1_IO_SIZE + MPC83xx_PCI2_IO_SIZE);
360#else
361 isa_io_base = (unsigned long)ioremap(MPC83xx_PCI1_IO_BASE,
362 MPC83xx_PCI1_IO_SIZE);
363#endif /* CONFIG_MPC83xx_PCI2 */
364 hose1->io_base_virt = (void *)isa_io_base;
365 /* setup resources */
366 pci_init_resource(&hose1->io_resource,
367 MPC83xx_PCI1_LOWER_IO,
368 MPC83xx_PCI1_UPPER_IO,
369 IORESOURCE_IO, "PCI host bridge 1");
370 pci_init_resource(&hose1->mem_resources[0],
371 MPC83xx_PCI1_LOWER_MEM,
372 MPC83xx_PCI1_UPPER_MEM,
373 IORESOURCE_MEM, "PCI host bridge 1");
374
375 ppc_md.pci_exclude_device = mpc83xx_exclude_device;
376 hose1->last_busno = pciauto_bus_scan(hose1, hose1->first_busno);
377
378#ifdef CONFIG_MPC83xx_PCI2
379 hose2 = pcibios_alloc_controller();
380 if(!hose2)
381 return;
382
383 hose2->bus_offset = hose1->last_busno + 1;
384 hose2->first_busno = hose1->last_busno + 1;
385 hose2->last_busno = 0xff;
386 setup_indirect_pci(hose2, binfo->bi_immr_base + PCI2_CFG_ADDR_OFFSET,
387 binfo->bi_immr_base + PCI2_CFG_DATA_OFFSET);
388 hose2->set_cfg_type = 1;
389
390 mpc83xx_setup_pci2(hose2);
391
392 hose2->pci_mem_offset = MPC83xx_PCI2_MEM_OFFSET;
393 hose2->mem_space.start = MPC83xx_PCI2_LOWER_MEM;
394 hose2->mem_space.end = MPC83xx_PCI2_UPPER_MEM;
395
396 hose2->io_base_phys = MPC83xx_PCI2_IO_BASE;
397 hose2->io_space.start = MPC83xx_PCI2_LOWER_IO;
398 hose2->io_space.end = MPC83xx_PCI2_UPPER_IO;
399 hose2->io_base_virt = (void *)(isa_io_base + MPC83xx_PCI1_IO_SIZE);
400 /* setup resources */
401 pci_init_resource(&hose2->io_resource,
402 MPC83xx_PCI2_LOWER_IO,
403 MPC83xx_PCI2_UPPER_IO,
404 IORESOURCE_IO, "PCI host bridge 2");
405 pci_init_resource(&hose2->mem_resources[0],
406 MPC83xx_PCI2_LOWER_MEM,
407 MPC83xx_PCI2_UPPER_MEM,
408 IORESOURCE_MEM, "PCI host bridge 2");
409
410 hose2->last_busno = pciauto_bus_scan(hose2, hose2->first_busno);
411#endif /* CONFIG_MPC83xx_PCI2 */
412}
413#endif /*CONFIG_PCI*/
diff --git a/arch/ppc/syslib/ppc83xx_setup.h b/arch/ppc/syslib/ppc83xx_setup.h
index 683f179b746c..c766c1a5f786 100644
--- a/arch/ppc/syslib/ppc83xx_setup.h
+++ b/arch/ppc/syslib/ppc83xx_setup.h
@@ -12,6 +12,14 @@
12 * Free Software Foundation; either version 2 of the License, or (at your 12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version. 13 * option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
15 */ 23 */
16 24
17#ifndef __PPC_SYSLIB_PPC83XX_SETUP_H 25#ifndef __PPC_SYSLIB_PPC83XX_SETUP_H
@@ -19,7 +27,6 @@
19 27
20#include <linux/config.h> 28#include <linux/config.h>
21#include <linux/init.h> 29#include <linux/init.h>
22#include <asm/ppcboot.h>
23 30
24extern unsigned long mpc83xx_find_end_of_memory(void) __init; 31extern unsigned long mpc83xx_find_end_of_memory(void) __init;
25extern long mpc83xx_time_init(void) __init; 32extern long mpc83xx_time_init(void) __init;
@@ -31,13 +38,11 @@ extern void mpc83xx_halt(void);
31extern void mpc83xx_setup_hose(void) __init; 38extern void mpc83xx_setup_hose(void) __init;
32 39
33/* PCI config */ 40/* PCI config */
34#if 0 41#define PCI1_CFG_ADDR_OFFSET (0x8300)
35#define PCI1_CFG_ADDR_OFFSET (FIXME) 42#define PCI1_CFG_DATA_OFFSET (0x8304)
36#define PCI1_CFG_DATA_OFFSET (FIXME)
37 43
38#define PCI2_CFG_ADDR_OFFSET (FIXME) 44#define PCI2_CFG_ADDR_OFFSET (0x8380)
39#define PCI2_CFG_DATA_OFFSET (FIXME) 45#define PCI2_CFG_DATA_OFFSET (0x8384)
40#endif
41 46
42/* Serial Config */ 47/* Serial Config */
43#ifdef CONFIG_SERIAL_MANY_PORTS 48#ifdef CONFIG_SERIAL_MANY_PORTS
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index 879202352560..52ba0c68078d 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -6,6 +6,7 @@
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com> 6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 * 7 *
8 * Copyright 2005 Freescale Semiconductor Inc. 8 * Copyright 2005 Freescale Semiconductor Inc.
9 * Copyright 2005 MontaVista, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
9 * 10 *
10 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 12 * under the terms of the GNU General Public License as published by the
@@ -35,10 +36,59 @@ void __init identify_ppc_sys_by_id(u32 id)
35 36
36void __init identify_ppc_sys_by_name(char *name) 37void __init identify_ppc_sys_by_name(char *name)
37{ 38{
38 /* TODO */ 39 unsigned int i = 0;
40 while (ppc_sys_specs[i].ppc_sys_name[0])
41 {
42 if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name))
43 break;
44 i++;
45 }
46 cur_ppc_sys_spec = &ppc_sys_specs[i];
39 return; 47 return;
40} 48}
41 49
50static int __init count_sys_specs(void)
51{
52 int i = 0;
53 while (ppc_sys_specs[i].ppc_sys_name[0])
54 i++;
55 return i;
56}
57
58static int __init find_chip_by_name_and_id(char *name, u32 id)
59{
60 int ret = -1;
61 unsigned int i = 0;
62 unsigned int j = 0;
63 unsigned int dups = 0;
64
65 unsigned char matched[count_sys_specs()];
66
67 while (ppc_sys_specs[i].ppc_sys_name[0]) {
68 if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name))
69 matched[j++] = i;
70 i++;
71 }
72 if (j != 0) {
73 for (i = 0; i < j; i++) {
74 if ((ppc_sys_specs[matched[i]].mask & id) ==
75 ppc_sys_specs[matched[i]].value) {
76 ret = matched[i];
77 dups++;
78 }
79 }
80 ret = (dups == 1) ? ret : (-1 * dups);
81 }
82 return ret;
83}
84
85void __init identify_ppc_sys_by_name_and_id(char *name, u32 id)
86{
87 int i = find_chip_by_name_and_id(name, id);
88 BUG_ON(i < 0);
89 cur_ppc_sys_spec = &ppc_sys_specs[i];
90}
91
42/* Update all memory resources by paddr, call before platform_device_register */ 92/* Update all memory resources by paddr, call before platform_device_register */
43void __init 93void __init
44ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr) 94ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr)
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
new file mode 100644
index 000000000000..1d3869768f96
--- /dev/null
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -0,0 +1,389 @@
1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 Device descriptions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/ioport.h>
18#include <asm/cpm2.h>
19#include <asm/irq.h>
20#include <asm/ppc_sys.h>
21
22struct platform_device ppc_sys_platform_devices[] = {
23 [MPC82xx_CPM_FCC1] = {
24 .name = "fsl-cpm-fcc",
25 .id = 1,
26 .num_resources = 3,
27 .resource = (struct resource[]) {
28 {
29 .name = "fcc_regs",
30 .start = 0x11300,
31 .end = 0x1131f,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .name = "fcc_pram",
36 .start = 0x8400,
37 .end = 0x84ff,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = SIU_INT_FCC1,
42 .end = SIU_INT_FCC1,
43 .flags = IORESOURCE_IRQ,
44 },
45 },
46 },
47 [MPC82xx_CPM_FCC2] = {
48 .name = "fsl-cpm-fcc",
49 .id = 2,
50 .num_resources = 3,
51 .resource = (struct resource[]) {
52 {
53 .name = "fcc_regs",
54 .start = 0x11320,
55 .end = 0x1133f,
56 .flags = IORESOURCE_MEM,
57 },
58 {
59 .name = "fcc_pram",
60 .start = 0x8500,
61 .end = 0x85ff,
62 .flags = IORESOURCE_MEM,
63 },
64 {
65 .start = SIU_INT_FCC2,
66 .end = SIU_INT_FCC2,
67 .flags = IORESOURCE_IRQ,
68 },
69 },
70 },
71 [MPC82xx_CPM_FCC3] = {
72 .name = "fsl-cpm-fcc",
73 .id = 3,
74 .num_resources = 3,
75 .resource = (struct resource[]) {
76 {
77 .name = "fcc_regs",
78 .start = 0x11340,
79 .end = 0x1135f,
80 .flags = IORESOURCE_MEM,
81 },
82 {
83 .name = "fcc_pram",
84 .start = 0x8600,
85 .end = 0x86ff,
86 .flags = IORESOURCE_MEM,
87 },
88 {
89 .start = SIU_INT_FCC3,
90 .end = SIU_INT_FCC3,
91 .flags = IORESOURCE_IRQ,
92 },
93 },
94 },
95 [MPC82xx_CPM_I2C] = {
96 .name = "fsl-cpm-i2c",
97 .id = 1,
98 .num_resources = 3,
99 .resource = (struct resource[]) {
100 {
101 .name = "i2c_mem",
102 .start = 0x11860,
103 .end = 0x118BF,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .name = "i2c_pram",
108 .start = 0x8afc,
109 .end = 0x8afd,
110 .flags = IORESOURCE_MEM,
111 },
112 {
113 .start = SIU_INT_I2C,
114 .end = SIU_INT_I2C,
115 .flags = IORESOURCE_IRQ,
116 },
117 },
118 },
119 [MPC82xx_CPM_SCC1] = {
120 .name = "fsl-cpm-scc",
121 .id = 1,
122 .num_resources = 3,
123 .resource = (struct resource[]) {
124 {
125 .name = "scc_mem",
126 .start = 0x11A00,
127 .end = 0x11A1F,
128 .flags = IORESOURCE_MEM,
129 },
130 {
131 .name = "scc_pram",
132 .start = 0x8000,
133 .end = 0x80ff,
134 .flags = IORESOURCE_MEM,
135 },
136 {
137 .start = SIU_INT_SCC1,
138 .end = SIU_INT_SCC1,
139 .flags = IORESOURCE_IRQ,
140 },
141 },
142 },
143 [MPC82xx_CPM_SCC2] = {
144 .name = "fsl-cpm-scc",
145 .id = 2,
146 .num_resources = 3,
147 .resource = (struct resource[]) {
148 {
149 .name = "scc_mem",
150 .start = 0x11A20,
151 .end = 0x11A3F,
152 .flags = IORESOURCE_MEM,
153 },
154 {
155 .name = "scc_pram",
156 .start = 0x8100,
157 .end = 0x81ff,
158 .flags = IORESOURCE_MEM,
159 },
160 {
161 .start = SIU_INT_SCC2,
162 .end = SIU_INT_SCC2,
163 .flags = IORESOURCE_IRQ,
164 },
165 },
166 },
167 [MPC82xx_CPM_SCC3] = {
168 .name = "fsl-cpm-scc",
169 .id = 3,
170 .num_resources = 3,
171 .resource = (struct resource[]) {
172 {
173 .name = "scc_mem",
174 .start = 0x11A40,
175 .end = 0x11A5F,
176 .flags = IORESOURCE_MEM,
177 },
178 {
179 .name = "scc_pram",
180 .start = 0x8200,
181 .end = 0x82ff,
182 .flags = IORESOURCE_MEM,
183 },
184 {
185 .start = SIU_INT_SCC3,
186 .end = SIU_INT_SCC3,
187 .flags = IORESOURCE_IRQ,
188 },
189 },
190 },
191 [MPC82xx_CPM_SCC4] = {
192 .name = "fsl-cpm-scc",
193 .id = 4,
194 .num_resources = 3,
195 .resource = (struct resource[]) {
196 {
197 .name = "scc_mem",
198 .start = 0x11A60,
199 .end = 0x11A7F,
200 .flags = IORESOURCE_MEM,
201 },
202 {
203 .name = "scc_pram",
204 .start = 0x8300,
205 .end = 0x83ff,
206 .flags = IORESOURCE_MEM,
207 },
208 {
209 .start = SIU_INT_SCC4,
210 .end = SIU_INT_SCC4,
211 .flags = IORESOURCE_IRQ,
212 },
213 },
214 },
215 [MPC82xx_CPM_SPI] = {
216 .name = "fsl-cpm-spi",
217 .id = 1,
218 .num_resources = 3,
219 .resource = (struct resource[]) {
220 {
221 .name = "spi_mem",
222 .start = 0x11AA0,
223 .end = 0x11AFF,
224 .flags = IORESOURCE_MEM,
225 },
226 {
227 .name = "spi_pram",
228 .start = 0x89fc,
229 .end = 0x89fd,
230 .flags = IORESOURCE_MEM,
231 },
232 {
233 .start = SIU_INT_SPI,
234 .end = SIU_INT_SPI,
235 .flags = IORESOURCE_IRQ,
236 },
237 },
238 },
239 [MPC82xx_CPM_MCC1] = {
240 .name = "fsl-cpm-mcc",
241 .id = 1,
242 .num_resources = 3,
243 .resource = (struct resource[]) {
244 {
245 .name = "mcc_mem",
246 .start = 0x11B30,
247 .end = 0x11B3F,
248 .flags = IORESOURCE_MEM,
249 },
250 {
251 .name = "mcc_pram",
252 .start = 0x8700,
253 .end = 0x877f,
254 .flags = IORESOURCE_MEM,
255 },
256 {
257 .start = SIU_INT_MCC1,
258 .end = SIU_INT_MCC1,
259 .flags = IORESOURCE_IRQ,
260 },
261 },
262 },
263 [MPC82xx_CPM_MCC2] = {
264 .name = "fsl-cpm-mcc",
265 .id = 2,
266 .num_resources = 3,
267 .resource = (struct resource[]) {
268 {
269 .name = "mcc_mem",
270 .start = 0x11B50,
271 .end = 0x11B5F,
272 .flags = IORESOURCE_MEM,
273 },
274 {
275 .name = "mcc_pram",
276 .start = 0x8800,
277 .end = 0x887f,
278 .flags = IORESOURCE_MEM,
279 },
280 {
281 .start = SIU_INT_MCC2,
282 .end = SIU_INT_MCC2,
283 .flags = IORESOURCE_IRQ,
284 },
285 },
286 },
287 [MPC82xx_CPM_SMC1] = {
288 .name = "fsl-cpm-smc",
289 .id = 1,
290 .num_resources = 3,
291 .resource = (struct resource[]) {
292 {
293 .name = "smc_mem",
294 .start = 0x11A80,
295 .end = 0x11A8F,
296 .flags = IORESOURCE_MEM,
297 },
298 {
299 .name = "smc_pram",
300 .start = 0x87fc,
301 .end = 0x87fd,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = SIU_INT_SMC1,
306 .end = SIU_INT_SMC1,
307 .flags = IORESOURCE_IRQ,
308 },
309 },
310 },
311 [MPC82xx_CPM_SMC2] = {
312 .name = "fsl-cpm-smc",
313 .id = 2,
314 .num_resources = 3,
315 .resource = (struct resource[]) {
316 {
317 .name = "smc_mem",
318 .start = 0x11A90,
319 .end = 0x11A9F,
320 .flags = IORESOURCE_MEM,
321 },
322 {
323 .name = "smc_pram",
324 .start = 0x88fc,
325 .end = 0x88fd,
326 .flags = IORESOURCE_MEM,
327 },
328 {
329 .start = SIU_INT_SMC2,
330 .end = SIU_INT_SMC2,
331 .flags = IORESOURCE_IRQ,
332 },
333 },
334 },
335 [MPC82xx_CPM_USB] = {
336 .name = "fsl-cpm-usb",
337 .id = 1,
338 .num_resources = 3,
339 .resource = (struct resource[]) {
340 {
341 .name = "usb_mem",
342 .start = 0x11b60,
343 .end = 0x11b78,
344 .flags = IORESOURCE_MEM,
345 },
346 {
347 .name = "usb_pram",
348 .start = 0x8b00,
349 .end = 0x8bff,
350 .flags = IORESOURCE_MEM,
351 },
352 {
353 .start = SIU_INT_USB,
354 .end = SIU_INT_USB,
355 .flags = IORESOURCE_IRQ,
356 },
357
358 },
359 },
360 [MPC82xx_SEC1] = {
361 .name = "fsl-sec",
362 .id = 1,
363 .num_resources = 1,
364 .resource = (struct resource[]) {
365 {
366 .name = "sec_mem",
367 .start = 0x40000,
368 .end = 0x52fff,
369 .flags = IORESOURCE_MEM,
370 },
371 },
372 },
373};
374
375static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
376{
377 ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
378 return 0;
379}
380
381static int __init mach_mpc82xx_init(void)
382{
383 if (ppc_md.progress)
384 ppc_md.progress("mach_mpc82xx_init:enter", 0);
385 ppc_sys_device_fixup = mach_mpc82xx_fixup;
386 return 0;
387}
388
389postcore_initcall(mach_mpc82xx_init);
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
new file mode 100644
index 000000000000..7b6c9ebdb9e3
--- /dev/null
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -0,0 +1,200 @@
1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 System descriptions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/device.h>
16
17#include <asm/ppc_sys.h>
18
19struct ppc_sys_spec *cur_ppc_sys_spec;
20struct ppc_sys_spec ppc_sys_specs[] = {
21 /* below is a list of the 8260 family of processors */
22 {
23 .ppc_sys_name = "8250",
24 .mask = 0x0000ff00,
25 .value = 0x00000000,
26 .num_devices = 12,
27 .device_list = (enum ppc_sys_devices[])
28 {
29 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
30 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
31 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
32 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
33 }
34 },
35 {
36 .ppc_sys_name = "8255",
37 .mask = 0x0000ff00,
38 .value = 0x00000000,
39 .num_devices = 11,
40 .device_list = (enum ppc_sys_devices[])
41 {
42 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
43 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
44 MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
45 MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
46 }
47 },
48 {
49 .ppc_sys_name = "8260",
50 .mask = 0x0000ff00,
51 .value = 0x00000000,
52 .num_devices = 12,
53 .device_list = (enum ppc_sys_devices[])
54 {
55 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
56 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
57 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
58 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
59 }
60 },
61 {
62 .ppc_sys_name = "8264",
63 .mask = 0x0000ff00,
64 .value = 0x00000000,
65 .num_devices = 12,
66 .device_list = (enum ppc_sys_devices[])
67 {
68 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
69 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
70 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
71 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
72 }
73 },
74 {
75 .ppc_sys_name = "8265",
76 .mask = 0x0000ff00,
77 .value = 0x00000000,
78 .num_devices = 12,
79 .device_list = (enum ppc_sys_devices[])
80 {
81 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
82 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
83 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
84 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
85 }
86 },
87 {
88 .ppc_sys_name = "8266",
89 .mask = 0x0000ff00,
90 .value = 0x00000000,
91 .num_devices = 12,
92 .device_list = (enum ppc_sys_devices[])
93 {
94 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
95 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
96 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
97 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
98 }
99 },
100 /* below is a list of the 8272 family of processors */
101 {
102 .ppc_sys_name = "8247",
103 .mask = 0x0000ff00,
104 .value = 0x00000d00,
105 .num_devices = 10,
106 .device_list = (enum ppc_sys_devices[])
107 {
108 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
109 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
110 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
111 MPC82xx_CPM_USB,
112 },
113 },
114 {
115 .ppc_sys_name = "8248",
116 .mask = 0x0000ff00,
117 .value = 0x00000c00,
118 .num_devices = 11,
119 .device_list = (enum ppc_sys_devices[])
120 {
121 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
122 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
123 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
124 MPC82xx_CPM_USB, MPC82xx_SEC1,
125 },
126 },
127 {
128 .ppc_sys_name = "8271",
129 .mask = 0x0000ff00,
130 .value = 0x00000d00,
131 .num_devices = 10,
132 .device_list = (enum ppc_sys_devices[])
133 {
134 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
135 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
136 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
137 MPC82xx_CPM_USB,
138 },
139 },
140 {
141 .ppc_sys_name = "8272",
142 .mask = 0x0000ff00,
143 .value = 0x00000c00,
144 .num_devices = 11,
145 .device_list = (enum ppc_sys_devices[])
146 {
147 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
148 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
149 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
150 MPC82xx_CPM_USB, MPC82xx_SEC1,
151 },
152 },
153 /* below is a list of the 8280 family of processors */
154 {
155 .ppc_sys_name = "8270",
156 .mask = 0x0000ff00,
157 .value = 0x00000a00,
158 .num_devices = 12,
159 .device_list = (enum ppc_sys_devices[])
160 {
161 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
162 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
163 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
164 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
165 },
166 },
167 {
168 .ppc_sys_name = "8275",
169 .mask = 0x0000ff00,
170 .value = 0x00000a00,
171 .num_devices = 12,
172 .device_list = (enum ppc_sys_devices[])
173 {
174 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
175 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
176 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
177 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
178 },
179 },
180 {
181 .ppc_sys_name = "8280",
182 .mask = 0x0000ff00,
183 .value = 0x00000a00,
184 .num_devices = 13,
185 .device_list = (enum ppc_sys_devices[])
186 {
187 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
188 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
189 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
190 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
191 MPC82xx_CPM_I2C,
192 },
193 },
194 {
195 /* default match */
196 .ppc_sys_name = "",
197 .mask = 0x00000000,
198 .value = 0x00000000,
199 },
200};
diff --git a/arch/ppc64/Kconfig.debug b/arch/ppc64/Kconfig.debug
index 46b1ce58da3b..f16a5030527b 100644
--- a/arch/ppc64/Kconfig.debug
+++ b/arch/ppc64/Kconfig.debug
@@ -41,10 +41,19 @@ config XMON
41 help 41 help
42 Include in-kernel hooks for the xmon kernel monitor/debugger. 42 Include in-kernel hooks for the xmon kernel monitor/debugger.
43 Unless you are intending to debug the kernel, say N here. 43 Unless you are intending to debug the kernel, say N here.
44 Make sure to enable also CONFIG_BOOTX_TEXT on Macs. Otherwise
45 nothing will appear on the screen (xmon writes directly to the
46 framebuffer memory).
47 The cmdline option 'xmon' or 'xmon=early' will drop into xmon very
48 early during boot. 'xmon=on' will just enable the xmon debugger hooks.
49 'xmon=off' will disable the debugger hooks if CONFIG_XMON_DEFAULT is set.
44 50
45config XMON_DEFAULT 51config XMON_DEFAULT
46 bool "Enable xmon by default" 52 bool "Enable xmon by default"
47 depends on XMON 53 depends on XMON
54 help
55 xmon is normally disabled unless booted with 'xmon=on'.
56 Use 'xmon=off' to disable xmon init during runtime.
48 57
49config PPCDBG 58config PPCDBG
50 bool "Include PPCDBG realtime debugging" 59 bool "Include PPCDBG realtime debugging"
diff --git a/arch/ppc64/kernel/pSeries_lpar.c b/arch/ppc64/kernel/pSeries_lpar.c
index 0a3ddc9227c5..a1d5fdfea4a8 100644
--- a/arch/ppc64/kernel/pSeries_lpar.c
+++ b/arch/ppc64/kernel/pSeries_lpar.c
@@ -266,6 +266,10 @@ void vpa_init(int cpu)
266 266
267 /* Register the Virtual Processor Area (VPA) */ 267 /* Register the Virtual Processor Area (VPA) */
268 flags = 1UL << (63 - 18); 268 flags = 1UL << (63 - 18);
269
270 if (cpu_has_feature(CPU_FTR_ALTIVEC))
271 paca[cpu].lppaca.vmxregs_in_use = 1;
272
269 ret = register_vpa(flags, hwcpu, __pa(vpa)); 273 ret = register_vpa(flags, hwcpu, __pa(vpa));
270 274
271 if (ret) 275 if (ret)
diff --git a/arch/ppc64/kernel/pacaData.c b/arch/ppc64/kernel/pacaData.c
index 6182a2cd90a5..33a2d8db3f21 100644
--- a/arch/ppc64/kernel/pacaData.c
+++ b/arch/ppc64/kernel/pacaData.c
@@ -59,6 +59,7 @@ extern unsigned long __toc_start;
59 .fpregs_in_use = 1, \ 59 .fpregs_in_use = 1, \
60 .end_of_quantum = 0xfffffffffffffffful, \ 60 .end_of_quantum = 0xfffffffffffffffful, \
61 .slb_count = 64, \ 61 .slb_count = 64, \
62 .vmxregs_in_use = 0, \
62 }, \ 63 }, \
63 64
64#ifdef CONFIG_PPC_ISERIES 65#ifdef CONFIG_PPC_ISERIES
diff --git a/arch/ppc64/kernel/rtasd.c b/arch/ppc64/kernel/rtasd.c
index b0c3b829fe47..e26b0420b6dd 100644
--- a/arch/ppc64/kernel/rtasd.c
+++ b/arch/ppc64/kernel/rtasd.c
@@ -19,6 +19,7 @@
19#include <linux/vmalloc.h> 19#include <linux/vmalloc.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <linux/cpu.h> 21#include <linux/cpu.h>
22#include <linux/delay.h>
22 23
23#include <asm/uaccess.h> 24#include <asm/uaccess.h>
24#include <asm/io.h> 25#include <asm/io.h>
@@ -412,8 +413,7 @@ static void do_event_scan_all_cpus(long delay)
412 413
413 /* Drop hotplug lock, and sleep for the specified delay */ 414 /* Drop hotplug lock, and sleep for the specified delay */
414 unlock_cpu_hotplug(); 415 unlock_cpu_hotplug();
415 set_current_state(TASK_INTERRUPTIBLE); 416 msleep_interruptible(delay);
416 schedule_timeout(delay);
417 lock_cpu_hotplug(); 417 lock_cpu_hotplug();
418 418
419 cpu = next_cpu(cpu, cpu_online_map); 419 cpu = next_cpu(cpu, cpu_online_map);
@@ -442,7 +442,7 @@ static int rtasd(void *unused)
442 442
443 printk(KERN_INFO "RTAS daemon started\n"); 443 printk(KERN_INFO "RTAS daemon started\n");
444 444
445 DEBUG("will sleep for %d jiffies\n", (HZ*60/rtas_event_scan_rate) / 2); 445 DEBUG("will sleep for %d milliseconds\n", (30000/rtas_event_scan_rate));
446 446
447 /* See if we have any error stored in NVRAM */ 447 /* See if we have any error stored in NVRAM */
448 memset(logdata, 0, rtas_error_log_max); 448 memset(logdata, 0, rtas_error_log_max);
@@ -459,7 +459,7 @@ static int rtasd(void *unused)
459 } 459 }
460 460
461 /* First pass. */ 461 /* First pass. */
462 do_event_scan_all_cpus(HZ); 462 do_event_scan_all_cpus(1000);
463 463
464 if (surveillance_timeout != -1) { 464 if (surveillance_timeout != -1) {
465 DEBUG("enabling surveillance\n"); 465 DEBUG("enabling surveillance\n");
@@ -471,7 +471,7 @@ static int rtasd(void *unused)
471 * machines have problems if we call event-scan too 471 * machines have problems if we call event-scan too
472 * quickly. */ 472 * quickly. */
473 for (;;) 473 for (;;)
474 do_event_scan_all_cpus((HZ*60/rtas_event_scan_rate) / 2); 474 do_event_scan_all_cpus(30000/rtas_event_scan_rate);
475 475
476error: 476error:
477 /* Should delete proc entries */ 477 /* Should delete proc entries */
diff --git a/arch/ppc64/kernel/rtc.c b/arch/ppc64/kernel/rtc.c
index d729fefa0df5..6ff52bc61325 100644
--- a/arch/ppc64/kernel/rtc.c
+++ b/arch/ppc64/kernel/rtc.c
@@ -35,6 +35,7 @@
35#include <linux/spinlock.h> 35#include <linux/spinlock.h>
36#include <linux/bcd.h> 36#include <linux/bcd.h>
37#include <linux/interrupt.h> 37#include <linux/interrupt.h>
38#include <linux/delay.h>
38 39
39#include <asm/io.h> 40#include <asm/io.h>
40#include <asm/uaccess.h> 41#include <asm/uaccess.h>
@@ -351,8 +352,7 @@ void rtas_get_rtc_time(struct rtc_time *rtc_tm)
351 return; /* delay not allowed */ 352 return; /* delay not allowed */
352 } 353 }
353 wait_time = rtas_extended_busy_delay_time(error); 354 wait_time = rtas_extended_busy_delay_time(error);
354 set_current_state(TASK_INTERRUPTIBLE); 355 msleep_interruptible(wait_time);
355 schedule_timeout(wait_time);
356 error = RTAS_CLOCK_BUSY; 356 error = RTAS_CLOCK_BUSY;
357 } 357 }
358 } while (error == RTAS_CLOCK_BUSY && (__get_tb() < max_wait_tb)); 358 } while (error == RTAS_CLOCK_BUSY && (__get_tb() < max_wait_tb));
@@ -386,8 +386,7 @@ int rtas_set_rtc_time(struct rtc_time *tm)
386 if (in_interrupt()) 386 if (in_interrupt())
387 return 1; /* probably decrementer */ 387 return 1; /* probably decrementer */
388 wait_time = rtas_extended_busy_delay_time(error); 388 wait_time = rtas_extended_busy_delay_time(error);
389 set_current_state(TASK_INTERRUPTIBLE); 389 msleep_interruptible(wait_time);
390 schedule_timeout(wait_time);
391 error = RTAS_CLOCK_BUSY; 390 error = RTAS_CLOCK_BUSY;
392 } 391 }
393 } while (error == RTAS_CLOCK_BUSY && (__get_tb() < max_wait_tb)); 392 } while (error == RTAS_CLOCK_BUSY && (__get_tb() < max_wait_tb));
diff --git a/arch/ppc64/kernel/scanlog.c b/arch/ppc64/kernel/scanlog.c
index 4d70736619c7..215bf8900304 100644
--- a/arch/ppc64/kernel/scanlog.c
+++ b/arch/ppc64/kernel/scanlog.c
@@ -25,6 +25,7 @@
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/proc_fs.h> 26#include <linux/proc_fs.h>
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/delay.h>
28#include <asm/uaccess.h> 29#include <asm/uaccess.h>
29#include <asm/rtas.h> 30#include <asm/rtas.h>
30#include <asm/prom.h> 31#include <asm/prom.h>
@@ -77,7 +78,7 @@ static ssize_t scanlog_read(struct file *file, char __user *buf,
77 return -EFAULT; 78 return -EFAULT;
78 79
79 for (;;) { 80 for (;;) {
80 wait_time = HZ/2; /* default wait if no data */ 81 wait_time = 500; /* default wait if no data */
81 spin_lock(&rtas_data_buf_lock); 82 spin_lock(&rtas_data_buf_lock);
82 memcpy(rtas_data_buf, data, RTAS_DATA_BUF_SIZE); 83 memcpy(rtas_data_buf, data, RTAS_DATA_BUF_SIZE);
83 status = rtas_call(ibm_scan_log_dump, 2, 1, NULL, 84 status = rtas_call(ibm_scan_log_dump, 2, 1, NULL,
@@ -107,24 +108,14 @@ static ssize_t scanlog_read(struct file *file, char __user *buf,
107 break; 108 break;
108 default: 109 default:
109 if (status > 9900 && status <= 9905) { 110 if (status > 9900 && status <= 9905) {
110 /* No data. RTAS is hinting at a delay required 111 wait_time = rtas_extended_busy_delay_time(status);
111 * between 1-100000 milliseconds
112 */
113 int ms = 1;
114 for (; status > 9900; status--)
115 ms = ms * 10;
116 /* Use microseconds for reasonable accuracy */
117 ms *= 1000;
118 wait_time = ms / (1000000/HZ); /* round down is fine */
119 /* Fall through to sleep */
120 } else { 112 } else {
121 printk(KERN_ERR "scanlog: unknown error from rtas: %d\n", status); 113 printk(KERN_ERR "scanlog: unknown error from rtas: %d\n", status);
122 return -EIO; 114 return -EIO;
123 } 115 }
124 } 116 }
125 /* Apparently no data yet. Wait and try again. */ 117 /* Apparently no data yet. Wait and try again. */
126 set_current_state(TASK_INTERRUPTIBLE); 118 msleep_interruptible(wait_time);
127 schedule_timeout(wait_time);
128 } 119 }
129 /*NOTREACHED*/ 120 /*NOTREACHED*/
130} 121}
diff --git a/arch/ppc64/mm/init.c b/arch/ppc64/mm/init.c
index c02dc9809ca5..b3b1e9c1770a 100644
--- a/arch/ppc64/mm/init.c
+++ b/arch/ppc64/mm/init.c
@@ -552,27 +552,18 @@ void __init do_init_bootmem(void)
552 /* Add all physical memory to the bootmem map, mark each area 552 /* Add all physical memory to the bootmem map, mark each area
553 * present. 553 * present.
554 */ 554 */
555 for (i=0; i < lmb.memory.cnt; i++) { 555 for (i=0; i < lmb.memory.cnt; i++)
556 unsigned long base, size; 556 free_bootmem(lmb_start_pfn(&lmb.memory, i),
557 unsigned long start_pfn, end_pfn; 557 lmb_size_bytes(&lmb.memory, i));
558
559 base = lmb.memory.region[i].base;
560 size = lmb.memory.region[i].size;
561
562 start_pfn = base >> PAGE_SHIFT;
563 end_pfn = start_pfn + (size >> PAGE_SHIFT);
564 memory_present(0, start_pfn, end_pfn);
565
566 free_bootmem(base, size);
567 }
568 558
569 /* reserve the sections we're already using */ 559 /* reserve the sections we're already using */
570 for (i=0; i < lmb.reserved.cnt; i++) { 560 for (i=0; i < lmb.reserved.cnt; i++)
571 unsigned long base = lmb.reserved.region[i].base; 561 reserve_bootmem(lmb_start_pfn(&lmb.reserved, i),
572 unsigned long size = lmb.reserved.region[i].size; 562 lmb_size_bytes(&lmb.reserved, i));
573 563
574 reserve_bootmem(base, size); 564 for (i=0; i < lmb.memory.cnt; i++)
575 } 565 memory_present(0, lmb_start_pfn(&lmb.memory, i),
566 lmb_end_pfn(&lmb.memory, i));
576} 567}
577 568
578/* 569/*
diff --git a/arch/ppc64/mm/numa.c b/arch/ppc64/mm/numa.c
index c3116f0d788c..cb864b8f2750 100644
--- a/arch/ppc64/mm/numa.c
+++ b/arch/ppc64/mm/numa.c
@@ -440,8 +440,6 @@ new_range:
440 for (i = start ; i < (start+size); i += MEMORY_INCREMENT) 440 for (i = start ; i < (start+size); i += MEMORY_INCREMENT)
441 numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 441 numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] =
442 numa_domain; 442 numa_domain;
443 memory_present(numa_domain, start >> PAGE_SHIFT,
444 (start + size) >> PAGE_SHIFT);
445 443
446 if (--ranges) 444 if (--ranges)
447 goto new_range; 445 goto new_range;
@@ -483,7 +481,6 @@ static void __init setup_nonnuma(void)
483 481
484 for (i = 0 ; i < top_of_ram; i += MEMORY_INCREMENT) 482 for (i = 0 ; i < top_of_ram; i += MEMORY_INCREMENT)
485 numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 0; 483 numa_memory_lookup_table[i >> MEMORY_INCREMENT_SHIFT] = 0;
486 memory_present(0, 0, init_node_data[0].node_end_pfn);
487} 484}
488 485
489static void __init dump_numa_topology(void) 486static void __init dump_numa_topology(void)
@@ -695,6 +692,46 @@ new_range:
695 size); 692 size);
696 } 693 }
697 } 694 }
695 /*
696 * This loop may look famaliar, but we have to do it again
697 * after marking our reserved memory to mark memory present
698 * for sparsemem.
699 */
700 addr_cells = get_mem_addr_cells();
701 size_cells = get_mem_size_cells();
702 memory = NULL;
703 while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
704 unsigned long mem_start, mem_size;
705 int numa_domain, ranges;
706 unsigned int *memcell_buf;
707 unsigned int len;
708
709 memcell_buf = (unsigned int *)get_property(memory, "reg", &len);
710 if (!memcell_buf || len <= 0)
711 continue;
712
713 ranges = memory->n_addrs; /* ranges in cell */
714new_range2:
715 mem_start = read_n_cells(addr_cells, &memcell_buf);
716 mem_size = read_n_cells(size_cells, &memcell_buf);
717 if (numa_enabled) {
718 numa_domain = of_node_numa_domain(memory);
719 if (numa_domain >= MAX_NUMNODES)
720 numa_domain = 0;
721 } else
722 numa_domain = 0;
723
724 if (numa_domain != nid)
725 continue;
726
727 mem_size = numa_enforce_memory_limit(mem_start, mem_size);
728 memory_present(numa_domain, mem_start >> PAGE_SHIFT,
729 (mem_start + mem_size) >> PAGE_SHIFT);
730
731 if (--ranges) /* process all ranges in cell */
732 goto new_range2;
733 }
734
698 } 735 }
699} 736}
700 737
diff --git a/arch/ppc64/mm/slb_low.S b/arch/ppc64/mm/slb_low.S
index bab255889c58..698d6b9ed6d1 100644
--- a/arch/ppc64/mm/slb_low.S
+++ b/arch/ppc64/mm/slb_low.S
@@ -97,25 +97,21 @@ BEGIN_FTR_SECTION
97 lhz r9,PACAHIGHHTLBAREAS(r13) 97 lhz r9,PACAHIGHHTLBAREAS(r13)
98 srdi r11,r3,(HTLB_AREA_SHIFT-SID_SHIFT) 98 srdi r11,r3,(HTLB_AREA_SHIFT-SID_SHIFT)
99 srd r9,r9,r11 99 srd r9,r9,r11
100 andi. r9,r9,1 100 lhz r11,PACALOWHTLBAREAS(r13)
101 bne 5f 101 srd r11,r11,r3
102 or r9,r9,r11
103END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE)
104#endif /* CONFIG_HUGETLB_PAGE */
102 105
103 li r11,SLB_VSID_USER 106 li r11,SLB_VSID_USER
104 107
105 cmpldi r3,16 108#ifdef CONFIG_HUGETLB_PAGE
106 bge 6f 109BEGIN_FTR_SECTION
107 110 rldimi r11,r9,8,55 /* shift masked bit into SLB_VSID_L */
108 lhz r9,PACALOWHTLBAREAS(r13)
109 srd r9,r9,r3
110 andi. r9,r9,1
111
112 beq 6f
113
1145: li r11,SLB_VSID_USER|SLB_VSID_L
115END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) 111END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE)
116#endif /* CONFIG_HUGETLB_PAGE */ 112#endif /* CONFIG_HUGETLB_PAGE */
117 113
1186: ld r9,PACACONTEXTID(r13) 114 ld r9,PACACONTEXTID(r13)
119 rldimi r3,r9,USER_ESID_BITS,0 115 rldimi r3,r9,USER_ESID_BITS,0
120 116
1219: /* r3 = protovsid, r11 = flags, r10 = esid_data, cr7 = <>KERNELBASE */ 1179: /* r3 = protovsid, r11 = flags, r10 = esid_data, cr7 = <>KERNELBASE */
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index 960ba6029c3a..bc59282da762 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -62,7 +62,7 @@ typedef struct
62} debug_sprintf_entry_t; 62} debug_sprintf_entry_t;
63 63
64 64
65extern void tod_to_timeval(uint64_t todval, struct timeval *xtime); 65extern void tod_to_timeval(uint64_t todval, struct timespec *xtime);
66 66
67/* internal function prototyes */ 67/* internal function prototyes */
68 68
@@ -374,9 +374,24 @@ debug_info_copy(debug_info_t* in, int mode)
374{ 374{
375 int i,j; 375 int i,j;
376 debug_info_t* rc; 376 debug_info_t* rc;
377 unsigned long flags;
378
379 /* get a consistent copy of the debug areas */
380 do {
381 rc = debug_info_alloc(in->name, in->pages_per_area,
382 in->nr_areas, in->buf_size, in->level, mode);
383 spin_lock_irqsave(&in->lock, flags);
384 if(!rc)
385 goto out;
386 /* has something changed in the meantime ? */
387 if((rc->pages_per_area == in->pages_per_area) &&
388 (rc->nr_areas == in->nr_areas)) {
389 break;
390 }
391 spin_unlock_irqrestore(&in->lock, flags);
392 debug_info_free(rc);
393 } while (1);
377 394
378 rc = debug_info_alloc(in->name, in->pages_per_area, in->nr_areas,
379 in->buf_size, in->level, mode);
380 if(!rc || (mode == NO_AREAS)) 395 if(!rc || (mode == NO_AREAS))
381 goto out; 396 goto out;
382 397
@@ -386,6 +401,7 @@ debug_info_copy(debug_info_t* in, int mode)
386 } 401 }
387 } 402 }
388out: 403out:
404 spin_unlock_irqrestore(&in->lock, flags);
389 return rc; 405 return rc;
390} 406}
391 407
@@ -593,19 +609,15 @@ debug_open(struct inode *inode, struct file *file)
593 debug_info_t *debug_info, *debug_info_snapshot; 609 debug_info_t *debug_info, *debug_info_snapshot;
594 610
595 down(&debug_lock); 611 down(&debug_lock);
596 612 debug_info = (struct debug_info*)file->f_dentry->d_inode->u.generic_ip;
597 /* find debug log and view */ 613 /* find debug view */
598 debug_info = debug_area_first; 614 for (i = 0; i < DEBUG_MAX_VIEWS; i++) {
599 while(debug_info != NULL){ 615 if (!debug_info->views[i])
600 for (i = 0; i < DEBUG_MAX_VIEWS; i++) { 616 continue;
601 if (!debug_info->views[i]) 617 else if (debug_info->debugfs_entries[i] ==
602 continue; 618 file->f_dentry) {
603 else if (debug_info->debugfs_entries[i] == 619 goto found; /* found view ! */
604 file->f_dentry) {
605 goto found; /* found view ! */
606 }
607 } 620 }
608 debug_info = debug_info->next;
609 } 621 }
610 /* no entry found */ 622 /* no entry found */
611 rc = -EINVAL; 623 rc = -EINVAL;
@@ -833,7 +845,7 @@ extern inline void
833debug_finish_entry(debug_info_t * id, debug_entry_t* active, int level, 845debug_finish_entry(debug_info_t * id, debug_entry_t* active, int level,
834 int exception) 846 int exception)
835{ 847{
836 STCK(active->id.stck); 848 active->id.stck = get_clock();
837 active->id.fields.cpuid = smp_processor_id(); 849 active->id.fields.cpuid = smp_processor_id();
838 active->caller = __builtin_return_address(0); 850 active->caller = __builtin_return_address(0);
839 active->id.fields.exception = exception; 851 active->id.fields.exception = exception;
@@ -1078,7 +1090,7 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
1078 if (view->input_proc) 1090 if (view->input_proc)
1079 mode |= S_IWUSR; 1091 mode |= S_IWUSR;
1080 pde = debugfs_create_file(view->name, mode, id->debugfs_root_entry, 1092 pde = debugfs_create_file(view->name, mode, id->debugfs_root_entry,
1081 NULL, &debug_file_ops); 1093 id , &debug_file_ops);
1082 if (!pde){ 1094 if (!pde){
1083 printk(KERN_WARNING "debug: debugfs_create_file() failed!"\ 1095 printk(KERN_WARNING "debug: debugfs_create_file() failed!"\
1084 " Cannot register view %s/%s\n", id->name,view->name); 1096 " Cannot register view %s/%s\n", id->name,view->name);
@@ -1432,7 +1444,7 @@ int
1432debug_dflt_header_fn(debug_info_t * id, struct debug_view *view, 1444debug_dflt_header_fn(debug_info_t * id, struct debug_view *view,
1433 int area, debug_entry_t * entry, char *out_buf) 1445 int area, debug_entry_t * entry, char *out_buf)
1434{ 1446{
1435 struct timeval time_val; 1447 struct timespec time_spec;
1436 unsigned long long time; 1448 unsigned long long time;
1437 char *except_str; 1449 char *except_str;
1438 unsigned long caller; 1450 unsigned long caller;
@@ -1443,7 +1455,7 @@ debug_dflt_header_fn(debug_info_t * id, struct debug_view *view,
1443 time = entry->id.stck; 1455 time = entry->id.stck;
1444 /* adjust todclock to 1970 */ 1456 /* adjust todclock to 1970 */
1445 time -= 0x8126d60e46000000LL - (0x3c26700LL * 1000000 * 4096); 1457 time -= 0x8126d60e46000000LL - (0x3c26700LL * 1000000 * 4096);
1446 tod_to_timeval(time, &time_val); 1458 tod_to_timeval(time, &time_spec);
1447 1459
1448 if (entry->id.fields.exception) 1460 if (entry->id.fields.exception)
1449 except_str = "*"; 1461 except_str = "*";
@@ -1451,7 +1463,7 @@ debug_dflt_header_fn(debug_info_t * id, struct debug_view *view,
1451 except_str = "-"; 1463 except_str = "-";
1452 caller = ((unsigned long) entry->caller) & PSW_ADDR_INSN; 1464 caller = ((unsigned long) entry->caller) & PSW_ADDR_INSN;
1453 rc += sprintf(out_buf, "%02i %011lu:%06lu %1u %1s %02i %p ", 1465 rc += sprintf(out_buf, "%02i %011lu:%06lu %1u %1s %02i %p ",
1454 area, time_val.tv_sec, time_val.tv_usec, level, 1466 area, time_spec.tv_sec, time_spec.tv_nsec / 1000, level,
1455 except_str, entry->id.fields.cpuid, (void *) caller); 1467 except_str, entry->id.fields.cpuid, (void *) caller);
1456 return rc; 1468 return rc;
1457} 1469}
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 1a271b16cb5c..cbe7d6a2d02c 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -138,14 +138,14 @@ STACK_SIZE = 1 << STACK_SHIFT
138 st %r12,__SF_BACKCHAIN(%r15) # clear back chain 138 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
139 .endm 139 .endm
140 140
141 .macro RESTORE_ALL sync 141 .macro RESTORE_ALL psworg,sync
142 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) # move user PSW to lowcore 142 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
143 .if !\sync 143 .if !\sync
144 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit 144 ni \psworg+1,0xfd # clear wait state bit
145 .endif 145 .endif
146 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 146 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
147 STORE_TIMER __LC_EXIT_TIMER 147 STORE_TIMER __LC_EXIT_TIMER
148 lpsw __LC_RETURN_PSW # back to caller 148 lpsw \psworg # back to caller
149 .endm 149 .endm
150 150
151/* 151/*
@@ -235,7 +235,7 @@ sysc_return:
235 tm __TI_flags+3(%r9),_TIF_WORK_SVC 235 tm __TI_flags+3(%r9),_TIF_WORK_SVC
236 bnz BASED(sysc_work) # there is work to do (signals etc.) 236 bnz BASED(sysc_work) # there is work to do (signals etc.)
237sysc_leave: 237sysc_leave:
238 RESTORE_ALL 1 238 RESTORE_ALL __LC_RETURN_PSW,1
239 239
240# 240#
241# recheck if there is more work to do 241# recheck if there is more work to do
@@ -312,8 +312,6 @@ sysc_singlestep:
312 la %r14,BASED(sysc_return) # load adr. of system return 312 la %r14,BASED(sysc_return) # load adr. of system return
313 br %r1 # branch to do_single_step 313 br %r1 # branch to do_single_step
314 314
315__critical_end:
316
317# 315#
318# call trace before and after sys_call 316# call trace before and after sys_call
319# 317#
@@ -571,7 +569,8 @@ io_return:
571 tm __TI_flags+3(%r9),_TIF_WORK_INT 569 tm __TI_flags+3(%r9),_TIF_WORK_INT
572 bnz BASED(io_work) # there is work to do (signals etc.) 570 bnz BASED(io_work) # there is work to do (signals etc.)
573io_leave: 571io_leave:
574 RESTORE_ALL 0 572 RESTORE_ALL __LC_RETURN_PSW,0
573io_done:
575 574
576#ifdef CONFIG_PREEMPT 575#ifdef CONFIG_PREEMPT
577io_preempt: 576io_preempt:
@@ -621,7 +620,7 @@ io_work_loop:
621# 620#
622io_mcck_pending: 621io_mcck_pending:
623 l %r1,BASED(.Ls390_handle_mcck) 622 l %r1,BASED(.Ls390_handle_mcck)
624 l %r14,BASED(io_work_loop) 623 la %r14,BASED(io_work_loop)
625 br %r1 # TIF bit will be cleared by handler 624 br %r1 # TIF bit will be cleared by handler
626 625
627# 626#
@@ -674,6 +673,8 @@ ext_no_vtime:
674 basr %r14,%r1 673 basr %r14,%r1
675 b BASED(io_return) 674 b BASED(io_return)
676 675
676__critical_end:
677
677/* 678/*
678 * Machine check handler routines 679 * Machine check handler routines
679 */ 680 */
@@ -681,6 +682,7 @@ ext_no_vtime:
681 .globl mcck_int_handler 682 .globl mcck_int_handler
682mcck_int_handler: 683mcck_int_handler:
683 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer 684 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
685 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
684 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs 686 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
685 SAVE_ALL_BASE __LC_SAVE_AREA+32 687 SAVE_ALL_BASE __LC_SAVE_AREA+32
686 la %r12,__LC_MCK_OLD_PSW 688 la %r12,__LC_MCK_OLD_PSW
@@ -693,17 +695,8 @@ mcck_int_handler:
693 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER 695 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
694 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER 696 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
695 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER 697 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
6960: tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
697 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
698 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
699 bz BASED(mcck_no_vtime)
700 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
701 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
702 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
703mcck_no_vtime:
704#endif 698#endif
7050: 6990: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
706 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
707 bno BASED(mcck_int_main) # no -> skip cleanup critical 700 bno BASED(mcck_int_main) # no -> skip cleanup critical
708 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 701 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
709 bnz BASED(mcck_int_main) # from user -> load async stack 702 bnz BASED(mcck_int_main) # from user -> load async stack
@@ -720,6 +713,16 @@ mcck_int_main:
720 be BASED(0f) 713 be BASED(0f)
721 l %r15,__LC_PANIC_STACK # load panic stack 714 l %r15,__LC_PANIC_STACK # load panic stack
7220: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 7150: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
716#ifdef CONFIG_VIRT_CPU_ACCOUNTING
717 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
718 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
719 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
720 bz BASED(mcck_no_vtime)
721 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
722 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
723 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
724mcck_no_vtime:
725#endif
723 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 726 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
724 la %r2,SP_PTREGS(%r15) # load pt_regs 727 la %r2,SP_PTREGS(%r15) # load pt_regs
725 l %r1,BASED(.Ls390_mcck) 728 l %r1,BASED(.Ls390_mcck)
@@ -737,7 +740,7 @@ mcck_int_main:
737 l %r1,BASED(.Ls390_handle_mcck) 740 l %r1,BASED(.Ls390_handle_mcck)
738 basr %r14,%r1 # call machine check handler 741 basr %r14,%r1 # call machine check handler
739mcck_return: 742mcck_return:
740 RESTORE_ALL 0 743 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
741 744
742#ifdef CONFIG_SMP 745#ifdef CONFIG_SMP
743/* 746/*
@@ -803,6 +806,10 @@ cleanup_table_sysc_leave:
803 .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000 806 .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
804cleanup_table_sysc_work_loop: 807cleanup_table_sysc_work_loop:
805 .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000 808 .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
809cleanup_table_io_leave:
810 .long io_leave + 0x80000000, io_done + 0x80000000
811cleanup_table_io_work_loop:
812 .long io_work_loop + 0x80000000, io_mcck_pending + 0x80000000
806 813
807cleanup_critical: 814cleanup_critical:
808 clc 4(4,%r12),BASED(cleanup_table_system_call) 815 clc 4(4,%r12),BASED(cleanup_table_system_call)
@@ -825,10 +832,26 @@ cleanup_critical:
825 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) 832 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
826 bl BASED(cleanup_sysc_return) 833 bl BASED(cleanup_sysc_return)
8270: 8340:
835 clc 4(4,%r12),BASED(cleanup_table_io_leave)
836 bl BASED(0f)
837 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
838 bl BASED(cleanup_io_leave)
8390:
840 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
841 bl BASED(0f)
842 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
843 bl BASED(cleanup_io_return)
8440:
828 br %r14 845 br %r14
829 846
830cleanup_system_call: 847cleanup_system_call:
831 mvc __LC_RETURN_PSW(8),0(%r12) 848 mvc __LC_RETURN_PSW(8),0(%r12)
849 c %r12,BASED(.Lmck_old_psw)
850 be BASED(0f)
851 la %r12,__LC_SAVE_AREA+16
852 b BASED(1f)
8530: la %r12,__LC_SAVE_AREA+32
8541:
832#ifdef CONFIG_VIRT_CPU_ACCOUNTING 855#ifdef CONFIG_VIRT_CPU_ACCOUNTING
833 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 856 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
834 bh BASED(0f) 857 bh BASED(0f)
@@ -838,11 +861,13 @@ cleanup_system_call:
838#endif 861#endif
839 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 862 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
840 bh BASED(0f) 863 bh BASED(0f)
841 mvc __LC_SAVE_AREA(16),__LC_SAVE_AREA+16 864 mvc __LC_SAVE_AREA(16),0(%r12)
8420: st %r13,__LC_SAVE_AREA+20 8650: st %r13,4(%r12)
866 st %r12,__LC_SAVE_AREA+48 # argh
843 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 867 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
844 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 868 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
845 st %r15,__LC_SAVE_AREA+28 869 l %r12,__LC_SAVE_AREA+48 # argh
870 st %r15,12(%r12)
846 lh %r7,0x8a 871 lh %r7,0x8a
847#ifdef CONFIG_VIRT_CPU_ACCOUNTING 872#ifdef CONFIG_VIRT_CPU_ACCOUNTING
848cleanup_vtime: 873cleanup_vtime:
@@ -879,17 +904,21 @@ cleanup_sysc_return:
879 904
880cleanup_sysc_leave: 905cleanup_sysc_leave:
881 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) 906 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
882 be BASED(0f) 907 be BASED(2f)
883#ifdef CONFIG_VIRT_CPU_ACCOUNTING 908#ifdef CONFIG_VIRT_CPU_ACCOUNTING
884 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 909 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
885 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) 910 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
886 be BASED(0f) 911 be BASED(2f)
887#endif 912#endif
888 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 913 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
889 mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) 914 c %r12,BASED(.Lmck_old_psw)
890 lm %r0,%r11,SP_R0(%r15) 915 bne BASED(0f)
916 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
917 b BASED(1f)
9180: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
9191: lm %r0,%r11,SP_R0(%r15)
891 l %r15,SP_R15(%r15) 920 l %r15,SP_R15(%r15)
8920: la %r12,__LC_RETURN_PSW 9212: la %r12,__LC_RETURN_PSW
893 br %r14 922 br %r14
894cleanup_sysc_leave_insn: 923cleanup_sysc_leave_insn:
895#ifdef CONFIG_VIRT_CPU_ACCOUNTING 924#ifdef CONFIG_VIRT_CPU_ACCOUNTING
@@ -897,6 +926,36 @@ cleanup_sysc_leave_insn:
897#endif 926#endif
898 .long sysc_leave + 10 + 0x80000000 927 .long sysc_leave + 10 + 0x80000000
899 928
929cleanup_io_return:
930 mvc __LC_RETURN_PSW(4),0(%r12)
931 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
932 la %r12,__LC_RETURN_PSW
933 br %r14
934
935cleanup_io_leave:
936 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
937 be BASED(2f)
938#ifdef CONFIG_VIRT_CPU_ACCOUNTING
939 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
940 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
941 be BASED(2f)
942#endif
943 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
944 c %r12,BASED(.Lmck_old_psw)
945 bne BASED(0f)
946 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
947 b BASED(1f)
9480: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
9491: lm %r0,%r11,SP_R0(%r15)
950 l %r15,SP_R15(%r15)
9512: la %r12,__LC_RETURN_PSW
952 br %r14
953cleanup_io_leave_insn:
954#ifdef CONFIG_VIRT_CPU_ACCOUNTING
955 .long io_leave + 18 + 0x80000000
956#endif
957 .long io_leave + 14 + 0x80000000
958
900/* 959/*
901 * Integer constants 960 * Integer constants
902 */ 961 */
@@ -918,6 +977,7 @@ cleanup_sysc_leave_insn:
918.Ls390_mcck: .long s390_do_machine_check 977.Ls390_mcck: .long s390_do_machine_check
919.Ls390_handle_mcck: 978.Ls390_handle_mcck:
920 .long s390_handle_mcck 979 .long s390_handle_mcck
980.Lmck_old_psw: .long __LC_MCK_OLD_PSW
921.Ldo_IRQ: .long do_IRQ 981.Ldo_IRQ: .long do_IRQ
922.Ldo_extint: .long do_extint 982.Ldo_extint: .long do_extint
923.Ldo_signal: .long do_signal 983.Ldo_signal: .long do_signal
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index d9f22915008c..fb77b72ab262 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -131,14 +131,14 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
131 stg %r12,__SF_BACKCHAIN(%r15) 131 stg %r12,__SF_BACKCHAIN(%r15)
132 .endm 132 .endm
133 133
134 .macro RESTORE_ALL sync 134 .macro RESTORE_ALL psworg,sync
135 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) # move user PSW to lowcore 135 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
136 .if !\sync 136 .if !\sync
137 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit 137 ni \psworg+1,0xfd # clear wait state bit
138 .endif 138 .endif
139 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 139 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
140 STORE_TIMER __LC_EXIT_TIMER 140 STORE_TIMER __LC_EXIT_TIMER
141 lpswe __LC_RETURN_PSW # back to caller 141 lpswe \psworg # back to caller
142 .endm 142 .endm
143 143
144/* 144/*
@@ -214,8 +214,8 @@ sysc_nr_ok:
214sysc_do_restart: 214sysc_do_restart:
215 larl %r10,sys_call_table 215 larl %r10,sys_call_table
216#ifdef CONFIG_S390_SUPPORT 216#ifdef CONFIG_S390_SUPPORT
217 tm SP_PSW+3(%r15),0x01 # are we running in 31 bit mode ? 217 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
218 jo sysc_noemu 218 jno sysc_noemu
219 larl %r10,sys_call_table_emu # use 31 bit emulation system calls 219 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
220sysc_noemu: 220sysc_noemu:
221#endif 221#endif
@@ -233,7 +233,7 @@ sysc_return:
233 tm __TI_flags+7(%r9),_TIF_WORK_SVC 233 tm __TI_flags+7(%r9),_TIF_WORK_SVC
234 jnz sysc_work # there is work to do (signals etc.) 234 jnz sysc_work # there is work to do (signals etc.)
235sysc_leave: 235sysc_leave:
236 RESTORE_ALL 1 236 RESTORE_ALL __LC_RETURN_PSW,1
237 237
238# 238#
239# recheck if there is more work to do 239# recheck if there is more work to do
@@ -308,8 +308,6 @@ sysc_singlestep:
308 jg do_single_step # branch to do_sigtrap 308 jg do_single_step # branch to do_sigtrap
309 309
310 310
311__critical_end:
312
313# 311#
314# call syscall_trace before and after system call 312# call syscall_trace before and after system call
315# special linkage: %r12 contains the return address for trace_svc 313# special linkage: %r12 contains the return address for trace_svc
@@ -612,7 +610,8 @@ io_return:
612 tm __TI_flags+7(%r9),_TIF_WORK_INT 610 tm __TI_flags+7(%r9),_TIF_WORK_INT
613 jnz io_work # there is work to do (signals etc.) 611 jnz io_work # there is work to do (signals etc.)
614io_leave: 612io_leave:
615 RESTORE_ALL 0 613 RESTORE_ALL __LC_RETURN_PSW,0
614io_done:
616 615
617#ifdef CONFIG_PREEMPT 616#ifdef CONFIG_PREEMPT
618io_preempt: 617io_preempt:
@@ -711,6 +710,8 @@ ext_no_vtime:
711 brasl %r14,do_extint 710 brasl %r14,do_extint
712 j io_return 711 j io_return
713 712
713__critical_end:
714
714/* 715/*
715 * Machine check handler routines 716 * Machine check handler routines
716 */ 717 */
@@ -718,6 +719,7 @@ ext_no_vtime:
718mcck_int_handler: 719mcck_int_handler:
719 la %r1,4095 # revalidate r1 720 la %r1,4095 # revalidate r1
720 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 721 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
722 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r1)
721 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 723 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
722 SAVE_ALL_BASE __LC_SAVE_AREA+64 724 SAVE_ALL_BASE __LC_SAVE_AREA+64
723 la %r12,__LC_MCK_OLD_PSW 725 la %r12,__LC_MCK_OLD_PSW
@@ -730,17 +732,8 @@ mcck_int_handler:
730 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER 732 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
731 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER 733 mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER
732 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER 734 mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER
7330: tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
734 jno mcck_no_vtime # no -> no timer update
735 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
736 jz mcck_no_vtime
737 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
738 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
739 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
740mcck_no_vtime:
741#endif 735#endif
7420: 7360: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
743 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
744 jno mcck_int_main # no -> skip cleanup critical 737 jno mcck_int_main # no -> skip cleanup critical
745 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 738 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
746 jnz mcck_int_main # from user -> load kernel stack 739 jnz mcck_int_main # from user -> load kernel stack
@@ -756,6 +749,16 @@ mcck_int_main:
756 jz 0f 749 jz 0f
757 lg %r15,__LC_PANIC_STACK # load panic stack 750 lg %r15,__LC_PANIC_STACK # load panic stack
7580: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 7510: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
752#ifdef CONFIG_VIRT_CPU_ACCOUNTING
753 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
754 jno mcck_no_vtime # no -> no timer update
755 tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ?
756 jz mcck_no_vtime
757 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
758 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
759 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
760mcck_no_vtime:
761#endif
759 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct 762 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
760 la %r2,SP_PTREGS(%r15) # load pt_regs 763 la %r2,SP_PTREGS(%r15) # load pt_regs
761 brasl %r14,s390_do_machine_check 764 brasl %r14,s390_do_machine_check
@@ -771,7 +774,7 @@ mcck_int_main:
771 jno mcck_return 774 jno mcck_return
772 brasl %r14,s390_handle_mcck 775 brasl %r14,s390_handle_mcck
773mcck_return: 776mcck_return:
774 RESTORE_ALL 0 777 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
775 778
776#ifdef CONFIG_SMP 779#ifdef CONFIG_SMP
777/* 780/*
@@ -833,6 +836,10 @@ cleanup_table_sysc_leave:
833 .quad sysc_leave, sysc_work_loop 836 .quad sysc_leave, sysc_work_loop
834cleanup_table_sysc_work_loop: 837cleanup_table_sysc_work_loop:
835 .quad sysc_work_loop, sysc_reschedule 838 .quad sysc_work_loop, sysc_reschedule
839cleanup_table_io_leave:
840 .quad io_leave, io_done
841cleanup_table_io_work_loop:
842 .quad io_work_loop, io_mcck_pending
836 843
837cleanup_critical: 844cleanup_critical:
838 clc 8(8,%r12),BASED(cleanup_table_system_call) 845 clc 8(8,%r12),BASED(cleanup_table_system_call)
@@ -855,10 +862,26 @@ cleanup_critical:
855 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) 862 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
856 jl cleanup_sysc_return 863 jl cleanup_sysc_return
8570: 8640:
865 clc 8(8,%r12),BASED(cleanup_table_io_leave)
866 jl 0f
867 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
868 jl cleanup_io_leave
8690:
870 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
871 jl 0f
872 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
873 jl cleanup_io_return
8740:
858 br %r14 875 br %r14
859 876
860cleanup_system_call: 877cleanup_system_call:
861 mvc __LC_RETURN_PSW(16),0(%r12) 878 mvc __LC_RETURN_PSW(16),0(%r12)
879 cghi %r12,__LC_MCK_OLD_PSW
880 je 0f
881 la %r12,__LC_SAVE_AREA+32
882 j 1f
8830: la %r12,__LC_SAVE_AREA+64
8841:
862#ifdef CONFIG_VIRT_CPU_ACCOUNTING 885#ifdef CONFIG_VIRT_CPU_ACCOUNTING
863 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) 886 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
864 jh 0f 887 jh 0f
@@ -868,11 +891,13 @@ cleanup_system_call:
868#endif 891#endif
869 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) 892 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
870 jh 0f 893 jh 0f
871 mvc __LC_SAVE_AREA(32),__LC_SAVE_AREA+32 894 mvc __LC_SAVE_AREA(32),0(%r12)
8720: stg %r13,__LC_SAVE_AREA+40 8950: stg %r13,8(%r12)
896 stg %r12,__LC_SAVE_AREA+96 # argh
873 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 897 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
874 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 898 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
875 stg %r15,__LC_SAVE_AREA+56 899 lg %r12,__LC_SAVE_AREA+96 # argh
900 stg %r15,24(%r12)
876 llgh %r7,__LC_SVC_INT_CODE 901 llgh %r7,__LC_SVC_INT_CODE
877#ifdef CONFIG_VIRT_CPU_ACCOUNTING 902#ifdef CONFIG_VIRT_CPU_ACCOUNTING
878cleanup_vtime: 903cleanup_vtime:
@@ -909,17 +934,21 @@ cleanup_sysc_return:
909 934
910cleanup_sysc_leave: 935cleanup_sysc_leave:
911 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) 936 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
912 je 0f 937 je 2f
913#ifdef CONFIG_VIRT_CPU_ACCOUNTING 938#ifdef CONFIG_VIRT_CPU_ACCOUNTING
914 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 939 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
915 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) 940 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
916 je 0f 941 je 2f
917#endif 942#endif
918 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) 943 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
919 mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) 944 cghi %r12,__LC_MCK_OLD_PSW
920 lmg %r0,%r11,SP_R0(%r15) 945 jne 0f
946 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
947 j 1f
9480: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9491: lmg %r0,%r11,SP_R0(%r15)
921 lg %r15,SP_R15(%r15) 950 lg %r15,SP_R15(%r15)
9220: la %r12,__LC_RETURN_PSW 9512: la %r12,__LC_RETURN_PSW
923 br %r14 952 br %r14
924cleanup_sysc_leave_insn: 953cleanup_sysc_leave_insn:
925#ifdef CONFIG_VIRT_CPU_ACCOUNTING 954#ifdef CONFIG_VIRT_CPU_ACCOUNTING
@@ -927,6 +956,36 @@ cleanup_sysc_leave_insn:
927#endif 956#endif
928 .quad sysc_leave + 12 957 .quad sysc_leave + 12
929 958
959cleanup_io_return:
960 mvc __LC_RETURN_PSW(8),0(%r12)
961 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
962 la %r12,__LC_RETURN_PSW
963 br %r14
964
965cleanup_io_leave:
966 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
967 je 2f
968#ifdef CONFIG_VIRT_CPU_ACCOUNTING
969 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
970 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
971 je 2f
972#endif
973 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
974 cghi %r12,__LC_MCK_OLD_PSW
975 jne 0f
976 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
977 j 1f
9780: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
9791: lmg %r0,%r11,SP_R0(%r15)
980 lg %r15,SP_R15(%r15)
9812: la %r12,__LC_RETURN_PSW
982 br %r14
983cleanup_io_leave_insn:
984#ifdef CONFIG_VIRT_CPU_ACCOUNTING
985 .quad io_leave + 20
986#endif
987 .quad io_leave + 16
988
930/* 989/*
931 * Integer constants 990 * Integer constants
932 */ 991 */
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 75fde949d125..856a971759b1 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -563,12 +563,14 @@ pfault_interrupt(struct pt_regs *regs, __u16 error_code)
563 * interrupt. pfault_wait is valid. Set pfault_wait 563 * interrupt. pfault_wait is valid. Set pfault_wait
564 * back to zero and wake up the process. This can 564 * back to zero and wake up the process. This can
565 * safely be done because the task is still sleeping 565 * safely be done because the task is still sleeping
566 * and can't procude new pfaults. */ 566 * and can't produce new pfaults. */
567 tsk->thread.pfault_wait = 0; 567 tsk->thread.pfault_wait = 0;
568 wake_up_process(tsk); 568 wake_up_process(tsk);
569 put_task_struct(tsk);
569 } 570 }
570 } else { 571 } else {
571 /* signal bit not set -> a real page is missing. */ 572 /* signal bit not set -> a real page is missing. */
573 get_task_struct(tsk);
572 set_task_state(tsk, TASK_UNINTERRUPTIBLE); 574 set_task_state(tsk, TASK_UNINTERRUPTIBLE);
573 if (xchg(&tsk->thread.pfault_wait, 1) != 0) { 575 if (xchg(&tsk->thread.pfault_wait, 1) != 0) {
574 /* Completion interrupt was faster than the initial 576 /* Completion interrupt was faster than the initial
@@ -578,6 +580,7 @@ pfault_interrupt(struct pt_regs *regs, __u16 error_code)
578 * mode and can't produce new pfaults. */ 580 * mode and can't produce new pfaults. */
579 tsk->thread.pfault_wait = 0; 581 tsk->thread.pfault_wait = 0;
580 set_task_state(tsk, TASK_RUNNING); 582 set_task_state(tsk, TASK_RUNNING);
583 put_task_struct(tsk);
581 } else 584 } else
582 set_tsk_need_resched(tsk); 585 set_tsk_need_resched(tsk);
583 } 586 }
diff --git a/arch/sh64/Kconfig b/arch/sh64/Kconfig
index 4c3e5334adb3..fb35b45dc130 100644
--- a/arch/sh64/Kconfig
+++ b/arch/sh64/Kconfig
@@ -29,10 +29,6 @@ config GENERIC_CALIBRATE_DELAY
29 bool 29 bool
30 default y 30 default y
31 31
32config LOG_BUF_SHIFT
33 int
34 default 14
35
36config RWSEM_XCHGADD_ALGORITHM 32config RWSEM_XCHGADD_ALGORITHM
37 bool 33 bool
38 34
diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms.c
index 8faa8dc4de43..5d974a2b735a 100644
--- a/arch/sparc/kernel/sparc_ksyms.c
+++ b/arch/sparc/kernel/sparc_ksyms.c
@@ -175,7 +175,6 @@ EXPORT_SYMBOL(set_auxio);
175EXPORT_SYMBOL(get_auxio); 175EXPORT_SYMBOL(get_auxio);
176#endif 176#endif
177EXPORT_SYMBOL(request_fast_irq); 177EXPORT_SYMBOL(request_fast_irq);
178EXPORT_SYMBOL(io_remap_page_range);
179EXPORT_SYMBOL(io_remap_pfn_range); 178EXPORT_SYMBOL(io_remap_pfn_range);
180 /* P3: iounit_xxx may be needed, sun4d users */ 179 /* P3: iounit_xxx may be needed, sun4d users */
181/* EXPORT_SYMBOL(iounit_map_dma_init); */ 180/* EXPORT_SYMBOL(iounit_map_dma_init); */
diff --git a/arch/sparc/mm/generic.c b/arch/sparc/mm/generic.c
index db27eee3bda1..20ccb957fb77 100644
--- a/arch/sparc/mm/generic.c
+++ b/arch/sparc/mm/generic.c
@@ -16,31 +16,6 @@
16#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
17#include <asm/tlbflush.h> 17#include <asm/tlbflush.h>
18 18
19static inline void forget_pte(pte_t page)
20{
21#if 0 /* old 2.4 code */
22 if (pte_none(page))
23 return;
24 if (pte_present(page)) {
25 unsigned long pfn = pte_pfn(page);
26 struct page *ptpage;
27 if (!pfn_valid(pfn))
28 return;
29 ptpage = pfn_to_page(pfn);
30 if (PageReserved(ptpage))
31 return;
32 page_cache_release(ptpage);
33 return;
34 }
35 swap_free(pte_to_swp_entry(page));
36#else
37 if (!pte_none(page)) {
38 printk("forget_pte: old mapping existed!\n");
39 BUG();
40 }
41#endif
42}
43
44/* Remap IO memory, the same way as remap_pfn_range(), but use 19/* Remap IO memory, the same way as remap_pfn_range(), but use
45 * the obio memory space. 20 * the obio memory space.
46 * 21 *
@@ -60,7 +35,6 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, unsigne
60 pte_t oldpage = *pte; 35 pte_t oldpage = *pte;
61 pte_clear(mm, address, pte); 36 pte_clear(mm, address, pte);
62 set_pte(pte, mk_pte_io(offset, prot, space)); 37 set_pte(pte, mk_pte_io(offset, prot, space));
63 forget_pte(oldpage);
64 address += PAGE_SIZE; 38 address += PAGE_SIZE;
65 offset += PAGE_SIZE; 39 offset += PAGE_SIZE;
66 pte++; 40 pte++;
@@ -88,37 +62,6 @@ static inline int io_remap_pmd_range(struct mm_struct *mm, pmd_t * pmd, unsigned
88 return 0; 62 return 0;
89} 63}
90 64
91int io_remap_page_range(struct vm_area_struct *vma, unsigned long from, unsigned long offset, unsigned long size, pgprot_t prot, int space)
92{
93 int error = 0;
94 pgd_t * dir;
95 unsigned long beg = from;
96 unsigned long end = from + size;
97 struct mm_struct *mm = vma->vm_mm;
98
99 prot = __pgprot(pg_iobits);
100 offset -= from;
101 dir = pgd_offset(mm, from);
102 flush_cache_range(vma, beg, end);
103
104 spin_lock(&mm->page_table_lock);
105 while (from < end) {
106 pmd_t *pmd = pmd_alloc(current->mm, dir, from);
107 error = -ENOMEM;
108 if (!pmd)
109 break;
110 error = io_remap_pmd_range(mm, pmd, from, end - from, offset + from, prot, space);
111 if (error)
112 break;
113 from = (from + PGDIR_SIZE) & PGDIR_MASK;
114 dir++;
115 }
116 spin_unlock(&mm->page_table_lock);
117
118 flush_tlb_range(vma, beg, end);
119 return error;
120}
121
122int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 65int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
123 unsigned long pfn, unsigned long size, pgprot_t prot) 66 unsigned long pfn, unsigned long size, pgprot_t prot)
124{ 67{
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 9afd28e2c4d5..17846f4ba9b6 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -5,6 +5,16 @@
5 5
6mainmenu "Linux/UltraSPARC Kernel Configuration" 6mainmenu "Linux/UltraSPARC Kernel Configuration"
7 7
8config SPARC64
9 bool
10 default y
11 help
12 SPARC is a family of RISC microprocessors designed and marketed by
13 Sun Microsystems, incorporated. This port covers the newer 64-bit
14 UltraSPARC. The UltraLinux project maintains both the SPARC32 and
15 SPARC64 ports; its web page is available at
16 <http://www.ultralinux.org/>.
17
8config 64BIT 18config 64BIT
9 def_bool y 19 def_bool y
10 20
@@ -71,75 +81,6 @@ config SYSVIPC_COMPAT
71 81
72menu "General machine setup" 82menu "General machine setup"
73 83
74config BBC_I2C
75 tristate "UltraSPARC-III bootbus i2c controller driver"
76 depends on PCI
77 help
78 The BBC devices on the UltraSPARC III have two I2C controllers. The
79 first I2C controller connects mainly to configuration PROMs (NVRAM,
80 CPU configuration, DIMM types, etc.). The second I2C controller
81 connects to environmental control devices such as fans and
82 temperature sensors. The second controller also connects to the
83 smartcard reader, if present. Say Y to enable support for these.
84
85config VT
86 bool "Virtual terminal" if EMBEDDED
87 select INPUT
88 default y
89 ---help---
90 If you say Y here, you will get support for terminal devices with
91 display and keyboard devices. These are called "virtual" because you
92 can run several virtual terminals (also called virtual consoles) on
93 one physical terminal. This is rather useful, for example one
94 virtual terminal can collect system messages and warnings, another
95 one can be used for a text-mode user session, and a third could run
96 an X session, all in parallel. Switching between virtual terminals
97 is done with certain key combinations, usually Alt-<function key>.
98
99 The setterm command ("man setterm") can be used to change the
100 properties (such as colors or beeping) of a virtual terminal. The
101 man page console_codes(4) ("man console_codes") contains the special
102 character sequences that can be used to change those properties
103 directly. The fonts used on virtual terminals can be changed with
104 the setfont ("man setfont") command and the key bindings are defined
105 with the loadkeys ("man loadkeys") command.
106
107 You need at least one virtual terminal device in order to make use
108 of your keyboard and monitor. Therefore, only people configuring an
109 embedded system would want to say N here in order to save some
110 memory; the only way to log into such a system is then via a serial
111 or network connection.
112
113 If unsure, say Y, or else you won't be able to do much with your new
114 shiny Linux system :-)
115
116config VT_CONSOLE
117 bool "Support for console on virtual terminal" if EMBEDDED
118 depends on VT
119 default y
120 ---help---
121 The system console is the device which receives all kernel messages
122 and warnings and which allows logins in single user mode. If you
123 answer Y here, a virtual terminal (the device used to interact with
124 a physical terminal) can be used as system console. This is the most
125 common mode of operations, so you should say Y here unless you want
126 the kernel messages be output only to a serial port (in which case
127 you should say Y to "Console on serial port", below).
128
129 If you do say Y here, by default the currently visible virtual
130 terminal (/dev/tty0) will be used as system console. You can change
131 that with a kernel command line option such as "console=tty3" which
132 would use the third virtual terminal as system console. (Try "man
133 bootparam" or see the documentation of your boot loader (lilo or
134 loadlin) about how to pass options to the kernel at boot time.)
135
136 If unsure, say Y.
137
138config HW_CONSOLE
139 bool
140 depends on VT
141 default y
142
143config SMP 84config SMP
144 bool "Symmetric multi-processing support" 85 bool "Symmetric multi-processing support"
145 ---help--- 86 ---help---
@@ -205,17 +146,6 @@ config US2E_FREQ
205 146
206 If in doubt, say N. 147 If in doubt, say N.
207 148
208# Identify this as a Sparc64 build
209config SPARC64
210 bool
211 default y
212 help
213 SPARC is a family of RISC microprocessors designed and marketed by
214 Sun Microsystems, incorporated. This port covers the newer 64-bit
215 UltraSPARC. The UltraLinux project maintains both the SPARC32 and
216 SPARC64 ports; its web page is available at
217 <http://www.ultralinux.org/>.
218
219# Global things across all Sun machines. 149# Global things across all Sun machines.
220config RWSEM_GENERIC_SPINLOCK 150config RWSEM_GENERIC_SPINLOCK
221 bool 151 bool
@@ -246,6 +176,12 @@ config HUGETLB_PAGE_SIZE_64K
246 176
247endchoice 177endchoice
248 178
179endmenu
180
181source "drivers/firmware/Kconfig"
182
183source "mm/Kconfig"
184
249config GENERIC_ISA_DMA 185config GENERIC_ISA_DMA
250 bool 186 bool
251 default y 187 default y
@@ -344,33 +280,6 @@ config PCI_DOMAINS
344 bool 280 bool
345 default PCI 281 default PCI
346 282
347config RTC
348 tristate
349 depends on PCI
350 default y
351 ---help---
352 If you say Y here and create a character special file /dev/rtc with
353 major number 10 and minor number 135 using mknod ("man mknod"), you
354 will get access to the real time clock (or hardware clock) built
355 into your computer.
356
357 Every PC has such a clock built in. It can be used to generate
358 signals from as low as 1Hz up to 8192Hz, and can also be used
359 as a 24 hour alarm. It reports status information via the file
360 /proc/driver/rtc and its behaviour is set by various ioctls on
361 /dev/rtc.
362
363 If you run Linux on a multiprocessor machine and said Y to
364 "Symmetric Multi Processing" above, you should say Y here to read
365 and set the RTC in an SMP compatible fashion.
366
367 If you think you have a use for such a device (such as periodic data
368 sampling), then say Y here, and read <file:Documentation/rtc.txt>
369 for details.
370
371 To compile this driver as a module, choose M here: the
372 module will be called rtc.
373
374source "drivers/pci/Kconfig" 283source "drivers/pci/Kconfig"
375 284
376config SUN_OPENPROMFS 285config SUN_OPENPROMFS
@@ -414,6 +323,8 @@ config BINFMT_AOUT32
414 If you want to run SunOS binaries (see SunOS binary emulation below) 323 If you want to run SunOS binaries (see SunOS binary emulation below)
415 or other a.out binaries, say Y. If unsure, say N. 324 or other a.out binaries, say Y. If unsure, say N.
416 325
326menu "Executable file formats"
327
417source "fs/Kconfig.binfmt" 328source "fs/Kconfig.binfmt"
418 329
419config SUNOS_EMUL 330config SUNOS_EMUL
@@ -436,74 +347,7 @@ config SOLARIS_EMUL
436 To compile this code as a module, choose M here: the 347 To compile this code as a module, choose M here: the
437 module will be called solaris. 348 module will be called solaris.
438 349
439source "drivers/parport/Kconfig" 350endmenu
440
441config PRINTER
442 tristate "Parallel printer support"
443 depends on PARPORT
444 ---help---
445 If you intend to attach a printer to the parallel port of your Linux
446 box (as opposed to using a serial printer; if the connector at the
447 printer has 9 or 25 holes ["female"], then it's serial), say Y.
448 Also read the Printing-HOWTO, available from
449 <http://www.tldp.org/docs.html#howto>.
450
451 It is possible to share one parallel port among several devices
452 (e.g. printer and ZIP drive) and it is safe to compile the
453 corresponding drivers into the kernel.
454 To compile this driver as a module, choose M here and read
455 <file:Documentation/parport.txt>. The module will be called lp.
456
457 If you have several parallel ports, you can specify which ports to
458 use with the "lp" kernel command line option. (Try "man bootparam"
459 or see the documentation of your boot loader (lilo or loadlin) about
460 how to pass options to the kernel at boot time.) The syntax of the
461 "lp" command line option can be found in <file:drivers/char/lp.c>.
462
463 If you have more than 8 printers, you need to increase the LP_NO
464 macro in lp.c and the PARPORT_MAX macro in parport.h.
465
466config PPDEV
467 tristate "Support for user-space parallel port device drivers"
468 depends on PARPORT
469 ---help---
470 Saying Y to this adds support for /dev/parport device nodes. This
471 is needed for programs that want portable access to the parallel
472 port, for instance deviceid (which displays Plug-and-Play device
473 IDs).
474
475 This is the parallel port equivalent of SCSI generic support (sg).
476 It is safe to say N to this -- it is not needed for normal printing
477 or parallel port CD-ROM/disk support.
478
479 To compile this driver as a module, choose M here: the
480 module will be called ppdev.
481
482 If unsure, say N.
483
484config ENVCTRL
485 tristate "SUNW, envctrl support"
486 depends on PCI
487 help
488 Kernel support for temperature and fan monitoring on Sun SME
489 machines.
490
491 To compile this driver as a module, choose M here: the
492 module will be called envctrl.
493
494config DISPLAY7SEG
495 tristate "7-Segment Display support"
496 depends on PCI
497 ---help---
498 This is the driver for the 7-segment display and LED present on
499 Sun Microsystems CompactPCI models CP1400 and CP1500.
500
501 To compile this driver as a module, choose M here: the
502 module will be called display7seg.
503
504 If you do not have a CompactPCI model CP1400 or CP1500, or
505 another UltraSPARC-IIi-cEngine boardset with a 7-segment display,
506 you should say N to this option.
507 351
508config CMDLINE_BOOL 352config CMDLINE_BOOL
509 bool "Default bootloader kernel arguments" 353 bool "Default bootloader kernel arguments"
@@ -521,148 +365,16 @@ config CMDLINE
521 365
522 NOTE: This option WILL override the PROM bootargs setting! 366 NOTE: This option WILL override the PROM bootargs setting!
523 367
524source "mm/Kconfig"
525
526endmenu
527
528source "net/Kconfig" 368source "net/Kconfig"
529 369
530source "drivers/base/Kconfig" 370source "drivers/Kconfig"
531
532source "drivers/video/Kconfig"
533
534source "drivers/serial/Kconfig"
535 371
536source "drivers/sbus/char/Kconfig" 372source "drivers/sbus/char/Kconfig"
537 373
538source "drivers/mtd/Kconfig"
539
540source "drivers/block/Kconfig"
541
542source "drivers/ide/Kconfig"
543
544source "drivers/scsi/Kconfig"
545
546source "drivers/fc4/Kconfig" 374source "drivers/fc4/Kconfig"
547 375
548source "drivers/md/Kconfig"
549
550if PCI
551source "drivers/message/fusion/Kconfig"
552endif
553
554source "drivers/ieee1394/Kconfig"
555
556source "drivers/net/Kconfig"
557
558source "drivers/isdn/Kconfig"
559
560source "drivers/telephony/Kconfig"
561
562# This one must be before the filesystem configs. -DaveM
563
564menu "Unix98 PTY support"
565
566config UNIX98_PTYS
567 bool "Unix98 PTY support"
568 ---help---
569 A pseudo terminal (PTY) is a software device consisting of two
570 halves: a master and a slave. The slave device behaves identical to
571 a physical terminal; the master device is used by a process to
572 read data from and write data to the slave, thereby emulating a
573 terminal. Typical programs for the master side are telnet servers
574 and xterms.
575
576 Linux has traditionally used the BSD-like names /dev/ptyxx for
577 masters and /dev/ttyxx for slaves of pseudo terminals. This scheme
578 has a number of problems. The GNU C library glibc 2.1 and later,
579 however, supports the Unix98 naming standard: in order to acquire a
580 pseudo terminal, a process opens /dev/ptmx; the number of the pseudo
581 terminal is then made available to the process and the pseudo
582 terminal slave can be accessed as /dev/pts/<number>. What was
583 traditionally /dev/ttyp2 will then be /dev/pts/2, for example.
584
585 The entries in /dev/pts/ are created on the fly by a virtual
586 file system; therefore, if you say Y here you should say Y to
587 "/dev/pts file system for Unix98 PTYs" as well.
588
589 If you want to say Y here, you need to have the C library glibc 2.1
590 or later (equal to libc-6.1, check with "ls -l /lib/libc.so.*").
591 Read the instructions in <file:Documentation/Changes> pertaining to
592 pseudo terminals. It's safe to say N.
593
594config UNIX98_PTY_COUNT
595 int "Maximum number of Unix98 PTYs in use (0-2048)"
596 depends on UNIX98_PTYS
597 default "256"
598 help
599 The maximum number of Unix98 PTYs that can be used at any one time.
600 The default is 256, and should be enough for desktop systems. Server
601 machines which support incoming telnet/rlogin/ssh connections and/or
602 serve several X terminals may want to increase this: every incoming
603 connection and every xterm uses up one PTY.
604
605 When not in use, each additional set of 256 PTYs occupy
606 approximately 8 KB of kernel memory on 32-bit architectures.
607
608endmenu
609
610menu "XFree86 DRI support"
611
612config DRM
613 bool "Direct Rendering Manager (XFree86 DRI support)"
614 help
615 Kernel-level support for the Direct Rendering Infrastructure (DRI)
616 introduced in XFree86 4.0. If you say Y here, you need to select
617 the module that's right for your graphics card from the list below.
618 These modules provide support for synchronization, security, and
619 DMA transfers. Please see <http://dri.sourceforge.net/> for more
620 details. You should also select and configure AGP
621 (/dev/agpgart) support.
622
623config DRM_FFB
624 tristate "Creator/Creator3D"
625 depends on DRM && BROKEN
626 help
627 Choose this option if you have one of Sun's Creator3D-based graphics
628 and frame buffer cards. Product page at
629 <http://www.sun.com/desktop/products/Graphics/creator3d.html>.
630
631config DRM_TDFX
632 tristate "3dfx Banshee/Voodoo3+"
633 depends on DRM
634 help
635 Choose this option if you have a 3dfx Banshee or Voodoo3 (or later),
636 graphics card. If M is selected, the module will be called tdfx.
637
638config DRM_R128
639 tristate "ATI Rage 128"
640 depends on DRM
641 help
642 Choose this option if you have an ATI Rage 128 graphics card. If M
643 is selected, the module will be called r128. AGP support for
644 this card is strongly suggested (unless you have a PCI version).
645
646endmenu
647
648source "drivers/input/Kconfig"
649
650source "drivers/i2c/Kconfig"
651
652source "drivers/hwmon/Kconfig"
653
654source "fs/Kconfig" 376source "fs/Kconfig"
655 377
656source "drivers/media/Kconfig"
657
658source "sound/Kconfig"
659
660source "drivers/usb/Kconfig"
661
662source "drivers/infiniband/Kconfig"
663
664source "drivers/char/watchdog/Kconfig"
665
666source "arch/sparc64/oprofile/Kconfig" 378source "arch/sparc64/oprofile/Kconfig"
667 379
668source "arch/sparc64/Kconfig.debug" 380source "arch/sparc64/Kconfig.debug"
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index cecdc0a7521f..3e0badb820c5 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -927,139 +927,6 @@ __spitfire_insn_access_exception:
927 ba,pt %xcc, rtrap 927 ba,pt %xcc, rtrap
928 clr %l6 928 clr %l6
929 929
930 /* Capture I/D/E-cache state into per-cpu error scoreboard.
931 *
932 * %g1: (TL>=0) ? 1 : 0
933 * %g2: scratch
934 * %g3: scratch
935 * %g4: AFSR
936 * %g5: AFAR
937 * %g6: current thread ptr
938 * %g7: scratch
939 */
940#define CHEETAH_LOG_ERROR \
941 /* Put "TL1" software bit into AFSR. */ \
942 and %g1, 0x1, %g1; \
943 sllx %g1, 63, %g2; \
944 or %g4, %g2, %g4; \
945 /* Get log entry pointer for this cpu at this trap level. */ \
946 BRANCH_IF_JALAPENO(g2,g3,50f) \
947 ldxa [%g0] ASI_SAFARI_CONFIG, %g2; \
948 srlx %g2, 17, %g2; \
949 ba,pt %xcc, 60f; \
950 and %g2, 0x3ff, %g2; \
95150: ldxa [%g0] ASI_JBUS_CONFIG, %g2; \
952 srlx %g2, 17, %g2; \
953 and %g2, 0x1f, %g2; \
95460: sllx %g2, 9, %g2; \
955 sethi %hi(cheetah_error_log), %g3; \
956 ldx [%g3 + %lo(cheetah_error_log)], %g3; \
957 brz,pn %g3, 80f; \
958 nop; \
959 add %g3, %g2, %g3; \
960 sllx %g1, 8, %g1; \
961 add %g3, %g1, %g1; \
962 /* %g1 holds pointer to the top of the logging scoreboard */ \
963 ldx [%g1 + 0x0], %g7; \
964 cmp %g7, -1; \
965 bne,pn %xcc, 80f; \
966 nop; \
967 stx %g4, [%g1 + 0x0]; \
968 stx %g5, [%g1 + 0x8]; \
969 add %g1, 0x10, %g1; \
970 /* %g1 now points to D-cache logging area */ \
971 set 0x3ff8, %g2; /* DC_addr mask */ \
972 and %g5, %g2, %g2; /* DC_addr bits of AFAR */ \
973 srlx %g5, 12, %g3; \
974 or %g3, 1, %g3; /* PHYS tag + valid */ \
97510: ldxa [%g2] ASI_DCACHE_TAG, %g7; \
976 cmp %g3, %g7; /* TAG match? */ \
977 bne,pt %xcc, 13f; \
978 nop; \
979 /* Yep, what we want, capture state. */ \
980 stx %g2, [%g1 + 0x20]; \
981 stx %g7, [%g1 + 0x28]; \
982 /* A membar Sync is required before and after utag access. */ \
983 membar #Sync; \
984 ldxa [%g2] ASI_DCACHE_UTAG, %g7; \
985 membar #Sync; \
986 stx %g7, [%g1 + 0x30]; \
987 ldxa [%g2] ASI_DCACHE_SNOOP_TAG, %g7; \
988 stx %g7, [%g1 + 0x38]; \
989 clr %g3; \
99012: ldxa [%g2 + %g3] ASI_DCACHE_DATA, %g7; \
991 stx %g7, [%g1]; \
992 add %g3, (1 << 5), %g3; \
993 cmp %g3, (4 << 5); \
994 bl,pt %xcc, 12b; \
995 add %g1, 0x8, %g1; \
996 ba,pt %xcc, 20f; \
997 add %g1, 0x20, %g1; \
99813: sethi %hi(1 << 14), %g7; \
999 add %g2, %g7, %g2; \
1000 srlx %g2, 14, %g7; \
1001 cmp %g7, 4; \
1002 bl,pt %xcc, 10b; \
1003 nop; \
1004 add %g1, 0x40, %g1; \
100520: /* %g1 now points to I-cache logging area */ \
1006 set 0x1fe0, %g2; /* IC_addr mask */ \
1007 and %g5, %g2, %g2; /* IC_addr bits of AFAR */ \
1008 sllx %g2, 1, %g2; /* IC_addr[13:6]==VA[12:5] */ \
1009 srlx %g5, (13 - 8), %g3; /* Make PTAG */ \
1010 andn %g3, 0xff, %g3; /* Mask off undefined bits */ \
101121: ldxa [%g2] ASI_IC_TAG, %g7; \
1012 andn %g7, 0xff, %g7; \
1013 cmp %g3, %g7; \
1014 bne,pt %xcc, 23f; \
1015 nop; \
1016 /* Yep, what we want, capture state. */ \
1017 stx %g2, [%g1 + 0x40]; \
1018 stx %g7, [%g1 + 0x48]; \
1019 add %g2, (1 << 3), %g2; \
1020 ldxa [%g2] ASI_IC_TAG, %g7; \
1021 add %g2, (1 << 3), %g2; \
1022 stx %g7, [%g1 + 0x50]; \
1023 ldxa [%g2] ASI_IC_TAG, %g7; \
1024 add %g2, (1 << 3), %g2; \
1025 stx %g7, [%g1 + 0x60]; \
1026 ldxa [%g2] ASI_IC_TAG, %g7; \
1027 stx %g7, [%g1 + 0x68]; \
1028 sub %g2, (3 << 3), %g2; \
1029 ldxa [%g2] ASI_IC_STAG, %g7; \
1030 stx %g7, [%g1 + 0x58]; \
1031 clr %g3; \
1032 srlx %g2, 2, %g2; \
103322: ldxa [%g2 + %g3] ASI_IC_INSTR, %g7; \
1034 stx %g7, [%g1]; \
1035 add %g3, (1 << 3), %g3; \
1036 cmp %g3, (8 << 3); \
1037 bl,pt %xcc, 22b; \
1038 add %g1, 0x8, %g1; \
1039 ba,pt %xcc, 30f; \
1040 add %g1, 0x30, %g1; \
104123: sethi %hi(1 << 14), %g7; \
1042 add %g2, %g7, %g2; \
1043 srlx %g2, 14, %g7; \
1044 cmp %g7, 4; \
1045 bl,pt %xcc, 21b; \
1046 nop; \
1047 add %g1, 0x70, %g1; \
104830: /* %g1 now points to E-cache logging area */ \
1049 andn %g5, (32 - 1), %g2; /* E-cache subblock */ \
1050 stx %g2, [%g1 + 0x20]; \
1051 ldxa [%g2] ASI_EC_TAG_DATA, %g7; \
1052 stx %g7, [%g1 + 0x28]; \
1053 ldxa [%g2] ASI_EC_R, %g0; \
1054 clr %g3; \
105531: ldxa [%g3] ASI_EC_DATA, %g7; \
1056 stx %g7, [%g1 + %g3]; \
1057 add %g3, 0x8, %g3; \
1058 cmp %g3, 0x20; \
1059 bl,pt %xcc, 31b; \
1060 nop; \
106180: /* DONE */
1062
1063 /* These get patched into the trap table at boot time 930 /* These get patched into the trap table at boot time
1064 * once we know we have a cheetah processor. 931 * once we know we have a cheetah processor.
1065 */ 932 */
@@ -1296,6 +1163,170 @@ dcpe_icpe_tl1_common:
1296 membar #Sync 1163 membar #Sync
1297 retry 1164 retry
1298 1165
1166 /* Capture I/D/E-cache state into per-cpu error scoreboard.
1167 *
1168 * %g1: (TL>=0) ? 1 : 0
1169 * %g2: scratch
1170 * %g3: scratch
1171 * %g4: AFSR
1172 * %g5: AFAR
1173 * %g6: current thread ptr
1174 * %g7: scratch
1175 */
1176__cheetah_log_error:
1177 /* Put "TL1" software bit into AFSR. */
1178 and %g1, 0x1, %g1
1179 sllx %g1, 63, %g2
1180 or %g4, %g2, %g4
1181
1182 /* Get log entry pointer for this cpu at this trap level. */
1183 BRANCH_IF_JALAPENO(g2,g3,50f)
1184 ldxa [%g0] ASI_SAFARI_CONFIG, %g2
1185 srlx %g2, 17, %g2
1186 ba,pt %xcc, 60f
1187 and %g2, 0x3ff, %g2
1188
118950: ldxa [%g0] ASI_JBUS_CONFIG, %g2
1190 srlx %g2, 17, %g2
1191 and %g2, 0x1f, %g2
1192
119360: sllx %g2, 9, %g2
1194 sethi %hi(cheetah_error_log), %g3
1195 ldx [%g3 + %lo(cheetah_error_log)], %g3
1196 brz,pn %g3, 80f
1197 nop
1198
1199 add %g3, %g2, %g3
1200 sllx %g1, 8, %g1
1201 add %g3, %g1, %g1
1202
1203 /* %g1 holds pointer to the top of the logging scoreboard */
1204 ldx [%g1 + 0x0], %g7
1205 cmp %g7, -1
1206 bne,pn %xcc, 80f
1207 nop
1208
1209 stx %g4, [%g1 + 0x0]
1210 stx %g5, [%g1 + 0x8]
1211 add %g1, 0x10, %g1
1212
1213 /* %g1 now points to D-cache logging area */
1214 set 0x3ff8, %g2 /* DC_addr mask */
1215 and %g5, %g2, %g2 /* DC_addr bits of AFAR */
1216 srlx %g5, 12, %g3
1217 or %g3, 1, %g3 /* PHYS tag + valid */
1218
121910: ldxa [%g2] ASI_DCACHE_TAG, %g7
1220 cmp %g3, %g7 /* TAG match? */
1221 bne,pt %xcc, 13f
1222 nop
1223
1224 /* Yep, what we want, capture state. */
1225 stx %g2, [%g1 + 0x20]
1226 stx %g7, [%g1 + 0x28]
1227
1228 /* A membar Sync is required before and after utag access. */
1229 membar #Sync
1230 ldxa [%g2] ASI_DCACHE_UTAG, %g7
1231 membar #Sync
1232 stx %g7, [%g1 + 0x30]
1233 ldxa [%g2] ASI_DCACHE_SNOOP_TAG, %g7
1234 stx %g7, [%g1 + 0x38]
1235 clr %g3
1236
123712: ldxa [%g2 + %g3] ASI_DCACHE_DATA, %g7
1238 stx %g7, [%g1]
1239 add %g3, (1 << 5), %g3
1240 cmp %g3, (4 << 5)
1241 bl,pt %xcc, 12b
1242 add %g1, 0x8, %g1
1243
1244 ba,pt %xcc, 20f
1245 add %g1, 0x20, %g1
1246
124713: sethi %hi(1 << 14), %g7
1248 add %g2, %g7, %g2
1249 srlx %g2, 14, %g7
1250 cmp %g7, 4
1251 bl,pt %xcc, 10b
1252 nop
1253
1254 add %g1, 0x40, %g1
1255
1256 /* %g1 now points to I-cache logging area */
125720: set 0x1fe0, %g2 /* IC_addr mask */
1258 and %g5, %g2, %g2 /* IC_addr bits of AFAR */
1259 sllx %g2, 1, %g2 /* IC_addr[13:6]==VA[12:5] */
1260 srlx %g5, (13 - 8), %g3 /* Make PTAG */
1261 andn %g3, 0xff, %g3 /* Mask off undefined bits */
1262
126321: ldxa [%g2] ASI_IC_TAG, %g7
1264 andn %g7, 0xff, %g7
1265 cmp %g3, %g7
1266 bne,pt %xcc, 23f
1267 nop
1268
1269 /* Yep, what we want, capture state. */
1270 stx %g2, [%g1 + 0x40]
1271 stx %g7, [%g1 + 0x48]
1272 add %g2, (1 << 3), %g2
1273 ldxa [%g2] ASI_IC_TAG, %g7
1274 add %g2, (1 << 3), %g2
1275 stx %g7, [%g1 + 0x50]
1276 ldxa [%g2] ASI_IC_TAG, %g7
1277 add %g2, (1 << 3), %g2
1278 stx %g7, [%g1 + 0x60]
1279 ldxa [%g2] ASI_IC_TAG, %g7
1280 stx %g7, [%g1 + 0x68]
1281 sub %g2, (3 << 3), %g2
1282 ldxa [%g2] ASI_IC_STAG, %g7
1283 stx %g7, [%g1 + 0x58]
1284 clr %g3
1285 srlx %g2, 2, %g2
1286
128722: ldxa [%g2 + %g3] ASI_IC_INSTR, %g7
1288 stx %g7, [%g1]
1289 add %g3, (1 << 3), %g3
1290 cmp %g3, (8 << 3)
1291 bl,pt %xcc, 22b
1292 add %g1, 0x8, %g1
1293
1294 ba,pt %xcc, 30f
1295 add %g1, 0x30, %g1
1296
129723: sethi %hi(1 << 14), %g7
1298 add %g2, %g7, %g2
1299 srlx %g2, 14, %g7
1300 cmp %g7, 4
1301 bl,pt %xcc, 21b
1302 nop
1303
1304 add %g1, 0x70, %g1
1305
1306 /* %g1 now points to E-cache logging area */
130730: andn %g5, (32 - 1), %g2
1308 stx %g2, [%g1 + 0x20]
1309 ldxa [%g2] ASI_EC_TAG_DATA, %g7
1310 stx %g7, [%g1 + 0x28]
1311 ldxa [%g2] ASI_EC_R, %g0
1312 clr %g3
1313
131431: ldxa [%g3] ASI_EC_DATA, %g7
1315 stx %g7, [%g1 + %g3]
1316 add %g3, 0x8, %g3
1317 cmp %g3, 0x20
1318
1319 bl,pt %xcc, 31b
1320 nop
132180:
1322 rdpr %tt, %g2
1323 cmp %g2, 0x70
1324 be c_fast_ecc
1325 cmp %g2, 0x63
1326 be c_cee
1327 nop
1328 ba,pt %xcc, c_deferred
1329
1299 /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc 1330 /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc
1300 * in the trap table. That code has done a memory barrier 1331 * in the trap table. That code has done a memory barrier
1301 * and has disabled both the I-cache and D-cache in the DCU 1332 * and has disabled both the I-cache and D-cache in the DCU
@@ -1321,8 +1352,10 @@ cheetah_fast_ecc:
1321 stxa %g4, [%g0] ASI_AFSR 1352 stxa %g4, [%g0] ASI_AFSR
1322 membar #Sync 1353 membar #Sync
1323 1354
1324 CHEETAH_LOG_ERROR 1355 ba,pt %xcc, __cheetah_log_error
1356 nop
1325 1357
1358c_fast_ecc:
1326 rdpr %pil, %g2 1359 rdpr %pil, %g2
1327 wrpr %g0, 15, %pil 1360 wrpr %g0, 15, %pil
1328 ba,pt %xcc, etrap_irq 1361 ba,pt %xcc, etrap_irq
@@ -1347,8 +1380,10 @@ cheetah_cee:
1347 stxa %g4, [%g0] ASI_AFSR 1380 stxa %g4, [%g0] ASI_AFSR
1348 membar #Sync 1381 membar #Sync
1349 1382
1350 CHEETAH_LOG_ERROR 1383 ba,pt %xcc, __cheetah_log_error
1384 nop
1351 1385
1386c_cee:
1352 rdpr %pil, %g2 1387 rdpr %pil, %g2
1353 wrpr %g0, 15, %pil 1388 wrpr %g0, 15, %pil
1354 ba,pt %xcc, etrap_irq 1389 ba,pt %xcc, etrap_irq
@@ -1373,8 +1408,10 @@ cheetah_deferred_trap:
1373 stxa %g4, [%g0] ASI_AFSR 1408 stxa %g4, [%g0] ASI_AFSR
1374 membar #Sync 1409 membar #Sync
1375 1410
1376 CHEETAH_LOG_ERROR 1411 ba,pt %xcc, __cheetah_log_error
1412 nop
1377 1413
1414c_deferred:
1378 rdpr %pil, %g2 1415 rdpr %pil, %g2
1379 wrpr %g0, 15, %pil 1416 wrpr %g0, 15, %pil
1380 ba,pt %xcc, etrap_irq 1417 ba,pt %xcc, etrap_irq
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index 8104a56ca2d8..1fa06c4e3bdb 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -538,11 +538,12 @@ cheetah_tlb_fixup:
538 nop 538 nop
539 call cheetah_plus_patch_winfixup 539 call cheetah_plus_patch_winfixup
540 nop 540 nop
541
542 541
5432: /* Patch copy/page operations to cheetah optimized versions. */ 5422: /* Patch copy/page operations to cheetah optimized versions. */
544 call cheetah_patch_copyops 543 call cheetah_patch_copyops
545 nop 544 nop
545 call cheetah_patch_copy_page
546 nop
546 call cheetah_patch_cachetlbops 547 call cheetah_patch_cachetlbops
547 nop 548 nop
548 549
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index f21c993f8856..ec8bf4012c0c 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -736,8 +736,7 @@ static void __pci_mmap_set_flags(struct pci_dev *dev, struct vm_area_struct *vma
736static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma, 736static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
737 enum pci_mmap_state mmap_state) 737 enum pci_mmap_state mmap_state)
738{ 738{
739 /* Our io_remap_page_range/io_remap_pfn_range takes care of this, 739 /* Our io_remap_pfn_range takes care of this, do nothing. */
740 do nothing. */
741} 740}
742 741
743/* Perform the actual remap of the pages for a PCI device mapping, as appropriate 742/* Perform the actual remap of the pages for a PCI device mapping, as appropriate
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S
index 0696ed4b9d64..fafd227735fa 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc64/kernel/rtrap.S
@@ -153,11 +153,14 @@ __handle_signal:
153rtrap_irq: 153rtrap_irq:
154rtrap_clr_l6: clr %l6 154rtrap_clr_l6: clr %l6
155rtrap: 155rtrap:
156 ldub [%g6 + TI_CPU], %l0 156#ifndef CONFIG_SMP
157 sethi %hi(irq_stat), %l2 ! &softirq_active 157 sethi %hi(per_cpu____cpu_data), %l0
158 or %l2, %lo(irq_stat), %l2 ! &softirq_active 158 lduw [%l0 + %lo(per_cpu____cpu_data)], %l1
159irqsz_patchme: sllx %l0, 0, %l0 159#else
160 lduw [%l2 + %l0], %l1 ! softirq_pending 160 sethi %hi(per_cpu____cpu_data), %l0
161 or %l0, %lo(per_cpu____cpu_data), %l0
162 lduw [%l0 + %g5], %l1
163#endif
161 cmp %l1, 0 164 cmp %l1, 0
162 165
163 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */ 166 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index fbdfed3798d8..ddbed3341a23 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -511,18 +511,6 @@ void __init setup_arch(char **cmdline_p)
511 conswitchp = &prom_con; 511 conswitchp = &prom_con;
512#endif 512#endif
513 513
514#ifdef CONFIG_SMP
515 i = (unsigned long)&irq_stat[1] - (unsigned long)&irq_stat[0];
516 if ((i == SMP_CACHE_BYTES) || (i == (2 * SMP_CACHE_BYTES))) {
517 extern unsigned int irqsz_patchme[1];
518 irqsz_patchme[0] |= ((i == SMP_CACHE_BYTES) ? SMP_CACHE_BYTES_SHIFT : \
519 SMP_CACHE_BYTES_SHIFT + 1);
520 flushi((long)&irqsz_patchme[0]);
521 } else {
522 prom_printf("Unexpected size of irq_stat[] elements\n");
523 prom_halt();
524 }
525#endif
526 /* Work out if we are starfire early on */ 514 /* Work out if we are starfire early on */
527 check_if_starfire(); 515 check_if_starfire();
528 516
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index a3ea697f1adb..d89fc24808d3 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -88,8 +88,6 @@ extern int svr4_setcontext(svr4_ucontext_t *uc, struct pt_regs *regs);
88extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg); 88extern int compat_sys_ioctl(unsigned int fd, unsigned int cmd, u32 arg);
89extern int (*handle_mathemu)(struct pt_regs *, struct fpustate *); 89extern int (*handle_mathemu)(struct pt_regs *, struct fpustate *);
90extern long sparc32_open(const char __user * filename, int flags, int mode); 90extern long sparc32_open(const char __user * filename, int flags, int mode);
91extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from,
92 unsigned long offset, unsigned long size, pgprot_t prot, int space);
93extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 91extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
94 unsigned long pfn, unsigned long size, pgprot_t prot); 92 unsigned long pfn, unsigned long size, pgprot_t prot);
95extern void (*prom_palette)(int); 93extern void (*prom_palette)(int);
@@ -245,7 +243,6 @@ EXPORT_SYMBOL(pci_dma_supported);
245#endif 243#endif
246 244
247/* I/O device mmaping on Sparc64. */ 245/* I/O device mmaping on Sparc64. */
248EXPORT_SYMBOL(io_remap_page_range);
249EXPORT_SYMBOL(io_remap_pfn_range); 246EXPORT_SYMBOL(io_remap_pfn_range);
250 247
251/* Solaris/SunOS binary compatibility */ 248/* Solaris/SunOS binary compatibility */
diff --git a/arch/sparc64/lib/PeeCeeI.c b/arch/sparc64/lib/PeeCeeI.c
index 3008d536e8c2..3c6cfbb20360 100644
--- a/arch/sparc64/lib/PeeCeeI.c
+++ b/arch/sparc64/lib/PeeCeeI.c
@@ -7,28 +7,31 @@
7#include <asm/io.h> 7#include <asm/io.h>
8#include <asm/byteorder.h> 8#include <asm/byteorder.h>
9 9
10void outsb(void __iomem *addr, const void *src, unsigned long count) 10void outsb(unsigned long __addr, const void *src, unsigned long count)
11{ 11{
12 void __iomem *addr = (void __iomem *) __addr;
12 const u8 *p = src; 13 const u8 *p = src;
13 14
14 while(count--) 15 while (count--)
15 outb(*p++, addr); 16 outb(*p++, addr);
16} 17}
17 18
18void outsw(void __iomem *addr, const void *src, unsigned long count) 19void outsw(unsigned long __addr, const void *src, unsigned long count)
19{ 20{
20 if(count) { 21 void __iomem *addr = (void __iomem *) __addr;
22
23 if (count) {
21 u16 *ps = (u16 *)src; 24 u16 *ps = (u16 *)src;
22 u32 *pi; 25 u32 *pi;
23 26
24 if(((u64)src) & 0x2) { 27 if (((u64)src) & 0x2) {
25 u16 val = le16_to_cpup(ps); 28 u16 val = le16_to_cpup(ps);
26 outw(val, addr); 29 outw(val, addr);
27 ps++; 30 ps++;
28 count--; 31 count--;
29 } 32 }
30 pi = (u32 *)ps; 33 pi = (u32 *)ps;
31 while(count >= 2) { 34 while (count >= 2) {
32 u32 w = le32_to_cpup(pi); 35 u32 w = le32_to_cpup(pi);
33 36
34 pi++; 37 pi++;
@@ -37,19 +40,21 @@ void outsw(void __iomem *addr, const void *src, unsigned long count)
37 count -= 2; 40 count -= 2;
38 } 41 }
39 ps = (u16 *)pi; 42 ps = (u16 *)pi;
40 if(count) { 43 if (count) {
41 u16 val = le16_to_cpup(ps); 44 u16 val = le16_to_cpup(ps);
42 outw(val, addr); 45 outw(val, addr);
43 } 46 }
44 } 47 }
45} 48}
46 49
47void outsl(void __iomem *addr, const void *src, unsigned long count) 50void outsl(unsigned long __addr, const void *src, unsigned long count)
48{ 51{
49 if(count) { 52 void __iomem *addr = (void __iomem *) __addr;
50 if((((u64)src) & 0x3) == 0) { 53
54 if (count) {
55 if ((((u64)src) & 0x3) == 0) {
51 u32 *p = (u32 *)src; 56 u32 *p = (u32 *)src;
52 while(count--) { 57 while (count--) {
53 u32 val = cpu_to_le32p(p); 58 u32 val = cpu_to_le32p(p);
54 outl(val, addr); 59 outl(val, addr);
55 p++; 60 p++;
@@ -60,13 +65,13 @@ void outsl(void __iomem *addr, const void *src, unsigned long count)
60 u32 l = 0, l2; 65 u32 l = 0, l2;
61 u32 *pi; 66 u32 *pi;
62 67
63 switch(((u64)src) & 0x3) { 68 switch (((u64)src) & 0x3) {
64 case 0x2: 69 case 0x2:
65 count -= 1; 70 count -= 1;
66 l = cpu_to_le16p(ps) << 16; 71 l = cpu_to_le16p(ps) << 16;
67 ps++; 72 ps++;
68 pi = (u32 *)ps; 73 pi = (u32 *)ps;
69 while(count--) { 74 while (count--) {
70 l2 = cpu_to_le32p(pi); 75 l2 = cpu_to_le32p(pi);
71 pi++; 76 pi++;
72 outl(((l >> 16) | (l2 << 16)), addr); 77 outl(((l >> 16) | (l2 << 16)), addr);
@@ -86,7 +91,7 @@ void outsl(void __iomem *addr, const void *src, unsigned long count)
86 ps++; 91 ps++;
87 l |= (l2 << 16); 92 l |= (l2 << 16);
88 pi = (u32 *)ps; 93 pi = (u32 *)ps;
89 while(count--) { 94 while (count--) {
90 l2 = cpu_to_le32p(pi); 95 l2 = cpu_to_le32p(pi);
91 pi++; 96 pi++;
92 outl(((l >> 8) | (l2 << 24)), addr); 97 outl(((l >> 8) | (l2 << 24)), addr);
@@ -101,7 +106,7 @@ void outsl(void __iomem *addr, const void *src, unsigned long count)
101 pb = (u8 *)src; 106 pb = (u8 *)src;
102 l = (*pb++ << 24); 107 l = (*pb++ << 24);
103 pi = (u32 *)pb; 108 pi = (u32 *)pb;
104 while(count--) { 109 while (count--) {
105 l2 = cpu_to_le32p(pi); 110 l2 = cpu_to_le32p(pi);
106 pi++; 111 pi++;
107 outl(((l >> 24) | (l2 << 8)), addr); 112 outl(((l >> 24) | (l2 << 8)), addr);
@@ -119,16 +124,18 @@ void outsl(void __iomem *addr, const void *src, unsigned long count)
119 } 124 }
120} 125}
121 126
122void insb(void __iomem *addr, void *dst, unsigned long count) 127void insb(unsigned long __addr, void *dst, unsigned long count)
123{ 128{
124 if(count) { 129 void __iomem *addr = (void __iomem *) __addr;
130
131 if (count) {
125 u32 *pi; 132 u32 *pi;
126 u8 *pb = dst; 133 u8 *pb = dst;
127 134
128 while((((unsigned long)pb) & 0x3) && count--) 135 while ((((unsigned long)pb) & 0x3) && count--)
129 *pb++ = inb(addr); 136 *pb++ = inb(addr);
130 pi = (u32 *)pb; 137 pi = (u32 *)pb;
131 while(count >= 4) { 138 while (count >= 4) {
132 u32 w; 139 u32 w;
133 140
134 w = (inb(addr) << 24); 141 w = (inb(addr) << 24);
@@ -139,23 +146,25 @@ void insb(void __iomem *addr, void *dst, unsigned long count)
139 count -= 4; 146 count -= 4;
140 } 147 }
141 pb = (u8 *)pi; 148 pb = (u8 *)pi;
142 while(count--) 149 while (count--)
143 *pb++ = inb(addr); 150 *pb++ = inb(addr);
144 } 151 }
145} 152}
146 153
147void insw(void __iomem *addr, void *dst, unsigned long count) 154void insw(unsigned long __addr, void *dst, unsigned long count)
148{ 155{
149 if(count) { 156 void __iomem *addr = (void __iomem *) __addr;
157
158 if (count) {
150 u16 *ps = dst; 159 u16 *ps = dst;
151 u32 *pi; 160 u32 *pi;
152 161
153 if(((unsigned long)ps) & 0x2) { 162 if (((unsigned long)ps) & 0x2) {
154 *ps++ = le16_to_cpu(inw(addr)); 163 *ps++ = le16_to_cpu(inw(addr));
155 count--; 164 count--;
156 } 165 }
157 pi = (u32 *)ps; 166 pi = (u32 *)ps;
158 while(count >= 2) { 167 while (count >= 2) {
159 u32 w; 168 u32 w;
160 169
161 w = (le16_to_cpu(inw(addr)) << 16); 170 w = (le16_to_cpu(inw(addr)) << 16);
@@ -164,31 +173,33 @@ void insw(void __iomem *addr, void *dst, unsigned long count)
164 count -= 2; 173 count -= 2;
165 } 174 }
166 ps = (u16 *)pi; 175 ps = (u16 *)pi;
167 if(count) 176 if (count)
168 *ps = le16_to_cpu(inw(addr)); 177 *ps = le16_to_cpu(inw(addr));
169 } 178 }
170} 179}
171 180
172void insl(void __iomem *addr, void *dst, unsigned long count) 181void insl(unsigned long __addr, void *dst, unsigned long count)
173{ 182{
174 if(count) { 183 void __iomem *addr = (void __iomem *) __addr;
175 if((((unsigned long)dst) & 0x3) == 0) { 184
185 if (count) {
186 if ((((unsigned long)dst) & 0x3) == 0) {
176 u32 *pi = dst; 187 u32 *pi = dst;
177 while(count--) 188 while (count--)
178 *pi++ = le32_to_cpu(inl(addr)); 189 *pi++ = le32_to_cpu(inl(addr));
179 } else { 190 } else {
180 u32 l = 0, l2, *pi; 191 u32 l = 0, l2, *pi;
181 u16 *ps; 192 u16 *ps;
182 u8 *pb; 193 u8 *pb;
183 194
184 switch(((unsigned long)dst) & 3) { 195 switch (((unsigned long)dst) & 3) {
185 case 0x2: 196 case 0x2:
186 ps = dst; 197 ps = dst;
187 count -= 1; 198 count -= 1;
188 l = le32_to_cpu(inl(addr)); 199 l = le32_to_cpu(inl(addr));
189 *ps++ = l; 200 *ps++ = l;
190 pi = (u32 *)ps; 201 pi = (u32 *)ps;
191 while(count--) { 202 while (count--) {
192 l2 = le32_to_cpu(inl(addr)); 203 l2 = le32_to_cpu(inl(addr));
193 *pi++ = (l << 16) | (l2 >> 16); 204 *pi++ = (l << 16) | (l2 >> 16);
194 l = l2; 205 l = l2;
@@ -205,7 +216,7 @@ void insl(void __iomem *addr, void *dst, unsigned long count)
205 ps = (u16 *)pb; 216 ps = (u16 *)pb;
206 *ps++ = ((l >> 8) & 0xffff); 217 *ps++ = ((l >> 8) & 0xffff);
207 pi = (u32 *)ps; 218 pi = (u32 *)ps;
208 while(count--) { 219 while (count--) {
209 l2 = le32_to_cpu(inl(addr)); 220 l2 = le32_to_cpu(inl(addr));
210 *pi++ = (l << 24) | (l2 >> 8); 221 *pi++ = (l << 24) | (l2 >> 8);
211 l = l2; 222 l = l2;
@@ -220,7 +231,7 @@ void insl(void __iomem *addr, void *dst, unsigned long count)
220 l = le32_to_cpu(inl(addr)); 231 l = le32_to_cpu(inl(addr));
221 *pb++ = l >> 24; 232 *pb++ = l >> 24;
222 pi = (u32 *)pb; 233 pi = (u32 *)pb;
223 while(count--) { 234 while (count--) {
224 l2 = le32_to_cpu(inl(addr)); 235 l2 = le32_to_cpu(inl(addr));
225 *pi++ = (l << 8) | (l2 >> 24); 236 *pi++ = (l << 8) | (l2 >> 24);
226 l = l2; 237 l = l2;
diff --git a/arch/sparc64/lib/copy_page.S b/arch/sparc64/lib/copy_page.S
index 23ebf2c970b7..feebb14fd27a 100644
--- a/arch/sparc64/lib/copy_page.S
+++ b/arch/sparc64/lib/copy_page.S
@@ -87,7 +87,7 @@ copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
87 membar #Sync 87 membar #Sync
88 wrpr %o2, 0x0, %pstate 88 wrpr %o2, 0x0, %pstate
89 89
90 BRANCH_IF_ANY_CHEETAH(g3,o2,1f) 90cheetah_copy_page_insn:
91 ba,pt %xcc, 9f 91 ba,pt %xcc, 9f
92 nop 92 nop
93 93
@@ -240,3 +240,14 @@ copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
240 stw %o4, [%g6 + TI_PRE_COUNT] 240 stw %o4, [%g6 + TI_PRE_COUNT]
241 241
242 .size copy_user_page, .-copy_user_page 242 .size copy_user_page, .-copy_user_page
243
244 .globl cheetah_patch_copy_page
245cheetah_patch_copy_page:
246 sethi %hi(0x01000000), %o1 ! NOP
247 sethi %hi(cheetah_copy_page_insn), %o0
248 or %o0, %lo(cheetah_copy_page_insn), %o0
249 stw %o1, [%o0]
250 membar #StoreStore
251 flush %o0
252 retl
253 nop
diff --git a/arch/sparc64/mm/generic.c b/arch/sparc64/mm/generic.c
index 6b31f6117a95..c954d91f01d0 100644
--- a/arch/sparc64/mm/generic.c
+++ b/arch/sparc64/mm/generic.c
@@ -116,37 +116,6 @@ static inline int io_remap_pud_range(struct mm_struct *mm, pud_t * pud, unsigned
116 return 0; 116 return 0;
117} 117}
118 118
119int io_remap_page_range(struct vm_area_struct *vma, unsigned long from, unsigned long offset, unsigned long size, pgprot_t prot, int space)
120{
121 int error = 0;
122 pgd_t * dir;
123 unsigned long beg = from;
124 unsigned long end = from + size;
125 struct mm_struct *mm = vma->vm_mm;
126
127 prot = __pgprot(pg_iobits);
128 offset -= from;
129 dir = pgd_offset(mm, from);
130 flush_cache_range(vma, beg, end);
131
132 spin_lock(&mm->page_table_lock);
133 while (from < end) {
134 pud_t *pud = pud_alloc(mm, dir, from);
135 error = -ENOMEM;
136 if (!pud)
137 break;
138 error = io_remap_pud_range(mm, pud, from, end - from, offset + from, prot, space);
139 if (error)
140 break;
141 from = (from + PGDIR_SIZE) & PGDIR_MASK;
142 dir++;
143 }
144 flush_tlb_range(vma, beg, end);
145 spin_unlock(&mm->page_table_lock);
146
147 return error;
148}
149
150int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 119int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
151 unsigned long pfn, unsigned long size, pgprot_t prot) 120 unsigned long pfn, unsigned long size, pgprot_t prot)
152{ 121{
diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc64/mm/ultra.S
index 363770893797..8dfa825eca51 100644
--- a/arch/sparc64/mm/ultra.S
+++ b/arch/sparc64/mm/ultra.S
@@ -10,6 +10,7 @@
10#include <asm/page.h> 10#include <asm/page.h>
11#include <asm/spitfire.h> 11#include <asm/spitfire.h>
12#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
13#include <asm/mmu.h>
13#include <asm/pil.h> 14#include <asm/pil.h>
14#include <asm/head.h> 15#include <asm/head.h>
15#include <asm/thread_info.h> 16#include <asm/thread_info.h>
@@ -45,6 +46,8 @@ __flush_tlb_mm: /* %o0=(ctx & TAG_CONTEXT_BITS), %o1=SECONDARY_CONTEXT */
45 nop 46 nop
46 nop 47 nop
47 nop 48 nop
49 nop
50 nop
48 51
49 .align 32 52 .align 32
50 .globl __flush_tlb_pending 53 .globl __flush_tlb_pending
@@ -73,6 +76,9 @@ __flush_tlb_pending:
73 retl 76 retl
74 wrpr %g7, 0x0, %pstate 77 wrpr %g7, 0x0, %pstate
75 nop 78 nop
79 nop
80 nop
81 nop
76 82
77 .align 32 83 .align 32
78 .globl __flush_tlb_kernel_range 84 .globl __flush_tlb_kernel_range
@@ -224,16 +230,8 @@ __update_mmu_cache: /* %o0=hw_context, %o1=address, %o2=pte, %o3=fault_code */
224 or %o5, %o0, %o5 230 or %o5, %o0, %o5
225 ba,a,pt %xcc, __prefill_itlb 231 ba,a,pt %xcc, __prefill_itlb
226 232
227 /* Cheetah specific versions, patched at boot time. 233 /* Cheetah specific versions, patched at boot time. */
228 * 234__cheetah_flush_tlb_mm: /* 18 insns */
229 * This writes of the PRIMARY_CONTEXT register in this file are
230 * safe even on Cheetah+ and later wrt. the page size fields.
231 * The nucleus page size fields do not matter because we make
232 * no data references, and these instructions execute out of a
233 * locked I-TLB entry sitting in the fully assosciative I-TLB.
234 * This sequence should also never trap.
235 */
236__cheetah_flush_tlb_mm: /* 15 insns */
237 rdpr %pstate, %g7 235 rdpr %pstate, %g7
238 andn %g7, PSTATE_IE, %g2 236 andn %g7, PSTATE_IE, %g2
239 wrpr %g2, 0x0, %pstate 237 wrpr %g2, 0x0, %pstate
@@ -241,6 +239,9 @@ __cheetah_flush_tlb_mm: /* 15 insns */
241 mov PRIMARY_CONTEXT, %o2 239 mov PRIMARY_CONTEXT, %o2
242 mov 0x40, %g3 240 mov 0x40, %g3
243 ldxa [%o2] ASI_DMMU, %g2 241 ldxa [%o2] ASI_DMMU, %g2
242 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o1
243 sllx %o1, CTX_PGSZ1_NUC_SHIFT, %o1
244 or %o0, %o1, %o0 /* Preserve nucleus page size fields */
244 stxa %o0, [%o2] ASI_DMMU 245 stxa %o0, [%o2] ASI_DMMU
245 stxa %g0, [%g3] ASI_DMMU_DEMAP 246 stxa %g0, [%g3] ASI_DMMU_DEMAP
246 stxa %g0, [%g3] ASI_IMMU_DEMAP 247 stxa %g0, [%g3] ASI_IMMU_DEMAP
@@ -250,7 +251,7 @@ __cheetah_flush_tlb_mm: /* 15 insns */
250 retl 251 retl
251 wrpr %g7, 0x0, %pstate 252 wrpr %g7, 0x0, %pstate
252 253
253__cheetah_flush_tlb_pending: /* 23 insns */ 254__cheetah_flush_tlb_pending: /* 26 insns */
254 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */ 255 /* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
255 rdpr %pstate, %g7 256 rdpr %pstate, %g7
256 sllx %o1, 3, %o1 257 sllx %o1, 3, %o1
@@ -259,6 +260,9 @@ __cheetah_flush_tlb_pending: /* 23 insns */
259 wrpr %g0, 1, %tl 260 wrpr %g0, 1, %tl
260 mov PRIMARY_CONTEXT, %o4 261 mov PRIMARY_CONTEXT, %o4
261 ldxa [%o4] ASI_DMMU, %g2 262 ldxa [%o4] ASI_DMMU, %g2
263 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o3
264 sllx %o3, CTX_PGSZ1_NUC_SHIFT, %o3
265 or %o0, %o3, %o0 /* Preserve nucleus page size fields */
262 stxa %o0, [%o4] ASI_DMMU 266 stxa %o0, [%o4] ASI_DMMU
2631: sub %o1, (1 << 3), %o1 2671: sub %o1, (1 << 3), %o1
264 ldx [%o2 + %o1], %o3 268 ldx [%o2 + %o1], %o3
@@ -311,14 +315,14 @@ cheetah_patch_cachetlbops:
311 sethi %hi(__cheetah_flush_tlb_mm), %o1 315 sethi %hi(__cheetah_flush_tlb_mm), %o1
312 or %o1, %lo(__cheetah_flush_tlb_mm), %o1 316 or %o1, %lo(__cheetah_flush_tlb_mm), %o1
313 call cheetah_patch_one 317 call cheetah_patch_one
314 mov 15, %o2 318 mov 18, %o2
315 319
316 sethi %hi(__flush_tlb_pending), %o0 320 sethi %hi(__flush_tlb_pending), %o0
317 or %o0, %lo(__flush_tlb_pending), %o0 321 or %o0, %lo(__flush_tlb_pending), %o0
318 sethi %hi(__cheetah_flush_tlb_pending), %o1 322 sethi %hi(__cheetah_flush_tlb_pending), %o1
319 or %o1, %lo(__cheetah_flush_tlb_pending), %o1 323 or %o1, %lo(__cheetah_flush_tlb_pending), %o1
320 call cheetah_patch_one 324 call cheetah_patch_one
321 mov 23, %o2 325 mov 26, %o2
322 326
323#ifdef DCACHE_ALIASING_POSSIBLE 327#ifdef DCACHE_ALIASING_POSSIBLE
324 sethi %hi(__flush_dcache_page), %o0 328 sethi %hi(__flush_dcache_page), %o0
@@ -352,9 +356,12 @@ cheetah_patch_cachetlbops:
352 .globl xcall_flush_tlb_mm 356 .globl xcall_flush_tlb_mm
353xcall_flush_tlb_mm: 357xcall_flush_tlb_mm:
354 mov PRIMARY_CONTEXT, %g2 358 mov PRIMARY_CONTEXT, %g2
355 mov 0x40, %g4
356 ldxa [%g2] ASI_DMMU, %g3 359 ldxa [%g2] ASI_DMMU, %g3
360 srlx %g3, CTX_PGSZ1_NUC_SHIFT, %g4
361 sllx %g4, CTX_PGSZ1_NUC_SHIFT, %g4
362 or %g5, %g4, %g5 /* Preserve nucleus page size fields */
357 stxa %g5, [%g2] ASI_DMMU 363 stxa %g5, [%g2] ASI_DMMU
364 mov 0x40, %g4
358 stxa %g0, [%g4] ASI_DMMU_DEMAP 365 stxa %g0, [%g4] ASI_DMMU_DEMAP
359 stxa %g0, [%g4] ASI_IMMU_DEMAP 366 stxa %g0, [%g4] ASI_IMMU_DEMAP
360 stxa %g3, [%g2] ASI_DMMU 367 stxa %g3, [%g2] ASI_DMMU
@@ -366,6 +373,10 @@ xcall_flush_tlb_pending:
366 sllx %g1, 3, %g1 373 sllx %g1, 3, %g1
367 mov PRIMARY_CONTEXT, %g4 374 mov PRIMARY_CONTEXT, %g4
368 ldxa [%g4] ASI_DMMU, %g2 375 ldxa [%g4] ASI_DMMU, %g2
376 srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4
377 sllx %g4, CTX_PGSZ1_NUC_SHIFT, %g4
378 or %g5, %g4, %g5
379 mov PRIMARY_CONTEXT, %g4
369 stxa %g5, [%g4] ASI_DMMU 380 stxa %g5, [%g4] ASI_DMMU
3701: sub %g1, (1 << 3), %g1 3811: sub %g1, (1 << 3), %g1
371 ldx [%g7 + %g1], %g5 382 ldx [%g7 + %g1], %g5
diff --git a/arch/um/Kconfig b/arch/um/Kconfig
index f945444df49c..684e1f8b2755 100644
--- a/arch/um/Kconfig
+++ b/arch/um/Kconfig
@@ -73,7 +73,7 @@ config MODE_SKAS
73 to CONFIG_MODE_TT). Otherwise, it is safe to say Y. Disabling this 73 to CONFIG_MODE_TT). Otherwise, it is safe to say Y. Disabling this
74 option will shrink the UML binary slightly. 74 option will shrink the UML binary slightly.
75 75
76source "arch/um/Kconfig_arch" 76source "arch/um/Kconfig.arch"
77source "mm/Kconfig" 77source "mm/Kconfig"
78 78
79config LD_SCRIPT_STATIC 79config LD_SCRIPT_STATIC
@@ -196,7 +196,7 @@ config HOST_2G_2G
196config SMP 196config SMP
197 bool "Symmetric multi-processing support (EXPERIMENTAL)" 197 bool "Symmetric multi-processing support (EXPERIMENTAL)"
198 default n 198 default n
199 depends on MODE_TT && EXPERIMENTAL 199 depends on (MODE_TT && EXPERIMENTAL && !SMP_BROKEN) || (BROKEN && SMP_BROKEN)
200 help 200 help
201 This option enables UML SMP support. 201 This option enables UML SMP support.
202 It is NOT related to having a real SMP box. Not directly, at least. 202 It is NOT related to having a real SMP box. Not directly, at least.
@@ -279,7 +279,7 @@ source "net/Kconfig"
279 279
280source "drivers/base/Kconfig" 280source "drivers/base/Kconfig"
281 281
282source "arch/um/Kconfig_char" 282source "arch/um/Kconfig.char"
283 283
284source "drivers/block/Kconfig" 284source "drivers/block/Kconfig"
285 285
@@ -287,7 +287,7 @@ config NETDEVICES
287 bool 287 bool
288 default NET 288 default NET
289 289
290source "arch/um/Kconfig_net" 290source "arch/um/Kconfig.net"
291 291
292source "drivers/net/Kconfig" 292source "drivers/net/Kconfig"
293 293
@@ -311,7 +311,7 @@ config GENERIC_ISA_DMA
311 depends on SCSI 311 depends on SCSI
312 default y 312 default y
313 313
314source "arch/um/Kconfig_scsi" 314source "arch/um/Kconfig.scsi"
315 315
316endmenu 316endmenu
317 317
diff --git a/arch/um/Kconfig_char b/arch/um/Kconfig.char
index 62d87b71179b..62d87b71179b 100644
--- a/arch/um/Kconfig_char
+++ b/arch/um/Kconfig.char
diff --git a/arch/um/Kconfig.debug b/arch/um/Kconfig.debug
index bd41e4286d0d..5681a8bd370b 100644
--- a/arch/um/Kconfig.debug
+++ b/arch/um/Kconfig.debug
@@ -2,6 +2,17 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5config CMDLINE_ON_HOST
6 bool "Show command line arguments on the host in TT mode"
7 depends on MODE_TT
8 default !DEBUG_INFO
9 help
10 This controls whether arguments in guest processes should be shown on
11 the host's ps output.
12 Enabling this option hinders debugging on some recent GDB versions
13 (because GDB gets "confused" when we do an execvp()). So probably you
14 should disable it.
15
5config PT_PROXY 16config PT_PROXY
6 bool "Enable ptrace proxy" 17 bool "Enable ptrace proxy"
7 depends on XTERM_CHAN && DEBUG_INFO && MODE_TT 18 depends on XTERM_CHAN && DEBUG_INFO && MODE_TT
diff --git a/arch/um/Kconfig_i386 b/arch/um/Kconfig.i386
index 27c18a8d9d17..8ad156a00499 100644
--- a/arch/um/Kconfig_i386
+++ b/arch/um/Kconfig.i386
@@ -6,6 +6,10 @@ config 64BIT
6 bool 6 bool
7 default n 7 default n
8 8
9config SEMAPHORE_SLEEPERS
10 bool
11 default y
12
9config TOP_ADDR 13config TOP_ADDR
10 hex 14 hex
11 default 0xc0000000 if !HOST_2G_2G 15 default 0xc0000000 if !HOST_2G_2G
diff --git a/arch/um/Kconfig_net b/arch/um/Kconfig.net
index fa2ab2dd78b7..14a04ebdeae9 100644
--- a/arch/um/Kconfig_net
+++ b/arch/um/Kconfig.net
@@ -34,7 +34,7 @@ config UML_NET_ETHERTAP
34 link with the host. 34 link with the host.
35 35
36 To use this, your host kernel must have support for Ethertap 36 To use this, your host kernel must have support for Ethertap
37 devices. Also, if your host kernel is 2.4.x, it must have 37 devices. Also, if your host kernel is 2.4.x, it must have
38 CONFIG_NETLINK_DEV configured as Y or M. 38 CONFIG_NETLINK_DEV configured as Y or M.
39 39
40 For more information, see 40 For more information, see
@@ -43,7 +43,7 @@ config UML_NET_ETHERTAP
43 networking. 43 networking.
44 44
45 If you'd like to set up an IP network with the host and/or the 45 If you'd like to set up an IP network with the host and/or the
46 outside world, say Y to this, the Daemon Transport and/or the 46 outside world, say Y to this, the Daemon Transport and/or the
47 Slip Transport. You'll need at least one of them, but may choose 47 Slip Transport. You'll need at least one of them, but may choose
48 more than one without conflict. If you don't need UML networking, 48 more than one without conflict. If you don't need UML networking,
49 say N. 49 say N.
@@ -78,7 +78,7 @@ config UML_NET_SLIP
78 78
79 The Ethertap Transport is preferred over slip because of its 79 The Ethertap Transport is preferred over slip because of its
80 limitations. If you prefer slip, however, say Y here. Otherwise 80 limitations. If you prefer slip, however, say Y here. Otherwise
81 choose the Multicast transport (to network multiple UMLs on 81 choose the Multicast transport (to network multiple UMLs on
82 multiple hosts), Ethertap (to network with the host and the 82 multiple hosts), Ethertap (to network with the host and the
83 outside world), and/or the Daemon transport (to network multiple 83 outside world), and/or the Daemon transport (to network multiple
84 UMLs on a single host). You may choose more than one without 84 UMLs on a single host). You may choose more than one without
@@ -138,7 +138,7 @@ config UML_NET_PCAP
138 depends on UML_NET && EXPERIMENTAL 138 depends on UML_NET && EXPERIMENTAL
139 help 139 help
140 The pcap transport makes a pcap packet stream on the host look 140 The pcap transport makes a pcap packet stream on the host look
141 like an ethernet device inside UML. This is useful for making 141 like an ethernet device inside UML. This is useful for making
142 UML act as a network monitor for the host. You must have libcap 142 UML act as a network monitor for the host. You must have libcap
143 installed in order to build the pcap transport into UML. 143 installed in order to build the pcap transport into UML.
144 144
@@ -169,11 +169,11 @@ config UML_NET_SLIRP
169 setup string. The effect of this transport on the UML is similar 169 setup string. The effect of this transport on the UML is similar
170 that of a host behind a firewall that masquerades all network 170 that of a host behind a firewall that masquerades all network
171 connections passing through it (but is less secure). 171 connections passing through it (but is less secure).
172 172
173 To use this you should first have slirp compiled somewhere 173 To use this you should first have slirp compiled somewhere
174 accessible on the host, and have read its documentation. If you 174 accessible on the host, and have read its documentation. If you
175 don't need UML networking, say N. 175 don't need UML networking, say N.
176 176
177 Startup example: "eth0=slirp,FE:FD:01:02:03:04,/usr/local/bin/slirp" 177 Startup example: "eth0=slirp,FE:FD:01:02:03:04,/usr/local/bin/slirp"
178 178
179endmenu 179endmenu
diff --git a/arch/um/Kconfig_scsi b/arch/um/Kconfig.scsi
index c291c942b1a8..c291c942b1a8 100644
--- a/arch/um/Kconfig_scsi
+++ b/arch/um/Kconfig.scsi
diff --git a/arch/um/Kconfig_x86_64 b/arch/um/Kconfig.x86_64
index 735a047c890c..bd35e59419c8 100644
--- a/arch/um/Kconfig_x86_64
+++ b/arch/um/Kconfig.x86_64
@@ -6,6 +6,10 @@ config 64BIT
6 bool 6 bool
7 default y 7 default y
8 8
9config SEMAPHORE_SLEEPERS
10 bool
11 default y
12
9config TOP_ADDR 13config TOP_ADDR
10 hex 14 hex
11 default 0x80000000 15 default 0x80000000
@@ -33,3 +37,7 @@ config ARCH_HAS_SC_SIGNALS
33config ARCH_REUSE_HOST_VSYSCALL_AREA 37config ARCH_REUSE_HOST_VSYSCALL_AREA
34 bool 38 bool
35 default n 39 default n
40
41config SMP_BROKEN
42 bool
43 default y
diff --git a/arch/um/Makefile b/arch/um/Makefile
index f5a83a72aa75..b15f6048caae 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -56,6 +56,7 @@ SYS_DIR := $(ARCH_DIR)/include/sysdep-$(SUBARCH)
56 56
57CFLAGS += $(CFLAGS-y) -D__arch_um__ -DSUBARCH=\"$(SUBARCH)\" \ 57CFLAGS += $(CFLAGS-y) -D__arch_um__ -DSUBARCH=\"$(SUBARCH)\" \
58 $(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap 58 $(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap
59AFLAGS += $(ARCH_INCLUDE)
59 60
60USER_CFLAGS := $(patsubst -I%,,$(CFLAGS)) 61USER_CFLAGS := $(patsubst -I%,,$(CFLAGS))
61USER_CFLAGS := $(patsubst -D__KERNEL__,,$(USER_CFLAGS)) $(ARCH_INCLUDE) \ 62USER_CFLAGS := $(patsubst -D__KERNEL__,,$(USER_CFLAGS)) $(ARCH_INCLUDE) \
@@ -101,10 +102,10 @@ define archhelp
101endef 102endef
102 103
103ifneq ($(KBUILD_SRC),) 104ifneq ($(KBUILD_SRC),)
104$(shell mkdir -p $(ARCH_DIR) && ln -fsn $(srctree)/$(ARCH_DIR)/Kconfig_$(SUBARCH) $(ARCH_DIR)/Kconfig_arch) 105$(shell mkdir -p $(ARCH_DIR) && ln -fsn $(srctree)/$(ARCH_DIR)/Kconfig.$(SUBARCH) $(ARCH_DIR)/Kconfig.arch)
105CLEAN_FILES += $(ARCH_DIR)/Kconfig_arch 106CLEAN_FILES += $(ARCH_DIR)/Kconfig.arch
106else 107else
107$(shell cd $(ARCH_DIR) && ln -sf Kconfig_$(SUBARCH) Kconfig_arch) 108$(shell cd $(ARCH_DIR) && ln -sf Kconfig.$(SUBARCH) Kconfig.arch)
108endif 109endif
109 110
110prepare: $(ARCH_SYMLINKS) $(SYS_HEADERS) $(GEN_HEADERS) 111prepare: $(ARCH_SYMLINKS) $(SYS_HEADERS) $(GEN_HEADERS)
@@ -147,7 +148,7 @@ CLEAN_FILES += linux x.i gmon.out $(ARCH_DIR)/include/uml-config.h \
147 148
148MRPROPER_FILES += $(SYMLINK_HEADERS) $(ARCH_SYMLINKS) \ 149MRPROPER_FILES += $(SYMLINK_HEADERS) $(ARCH_SYMLINKS) \
149 $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os \ 150 $(addprefix $(ARCH_DIR)/kernel/,$(KERN_SYMLINKS)) $(ARCH_DIR)/os \
150 $(ARCH_DIR)/Kconfig_arch 151 $(ARCH_DIR)/Kconfig.arch
151 152
152archclean: 153archclean:
153 $(Q)$(MAKE) $(clean)=$(ARCH_DIR)/util 154 $(Q)$(MAKE) $(clean)=$(ARCH_DIR)/util
diff --git a/arch/um/Makefile-x86_64 b/arch/um/Makefile-x86_64
index aa2f7174ebca..baddb5d64ca5 100644
--- a/arch/um/Makefile-x86_64
+++ b/arch/um/Makefile-x86_64
@@ -6,7 +6,7 @@ START := 0x60000000
6 6
7#We #undef __x86_64__ for kernelspace, not for userspace where 7#We #undef __x86_64__ for kernelspace, not for userspace where
8#it's needed for headers to work! 8#it's needed for headers to work!
9CFLAGS += -U__$(SUBARCH)__ -fno-builtin $(STUB_CFLAGS) 9CFLAGS += -U__$(SUBARCH)__ -fno-builtin
10USER_CFLAGS += -fno-builtin 10USER_CFLAGS += -fno-builtin
11 11
12ELF_ARCH := i386:x86-64 12ELF_ARCH := i386:x86-64
diff --git a/arch/um/drivers/Makefile b/arch/um/drivers/Makefile
index de17d4c6e02d..783e18cae090 100644
--- a/arch/um/drivers/Makefile
+++ b/arch/um/drivers/Makefile
@@ -13,7 +13,7 @@ mcast-objs := mcast_kern.o mcast_user.o
13net-objs := net_kern.o net_user.o 13net-objs := net_kern.o net_user.o
14mconsole-objs := mconsole_kern.o mconsole_user.o 14mconsole-objs := mconsole_kern.o mconsole_user.o
15hostaudio-objs := hostaudio_kern.o 15hostaudio-objs := hostaudio_kern.o
16ubd-objs := ubd_kern.o ubd_user.o 16ubd-objs := ubd_kern.o
17port-objs := port_kern.o port_user.o 17port-objs := port_kern.o port_user.o
18harddog-objs := harddog_kern.o harddog_user.o 18harddog-objs := harddog_kern.o harddog_user.o
19 19
diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c
index 5d3768156c92..de3bce71aeb3 100644
--- a/arch/um/drivers/chan_user.c
+++ b/arch/um/drivers/chan_user.c
@@ -63,7 +63,7 @@ error:
63 * 63 *
64 * SIGWINCH can't be received synchronously, so you have to set up to receive it 64 * SIGWINCH can't be received synchronously, so you have to set up to receive it
65 * as a signal. That being the case, if you are going to wait for it, it is 65 * as a signal. That being the case, if you are going to wait for it, it is
66 * convenient to sit in a pause() and wait for the signal to bounce you out of 66 * convenient to sit in sigsuspend() and wait for the signal to bounce you out of
67 * it (see below for how we make sure to exit only on SIGWINCH). 67 * it (see below for how we make sure to exit only on SIGWINCH).
68 */ 68 */
69 69
@@ -94,18 +94,19 @@ static int winch_thread(void *arg)
94 "byte, err = %d\n", -count); 94 "byte, err = %d\n", -count);
95 95
96 /* We are not using SIG_IGN on purpose, so don't fix it as I thought to 96 /* We are not using SIG_IGN on purpose, so don't fix it as I thought to
97 * do! If using SIG_IGN, the pause() call below would not stop on 97 * do! If using SIG_IGN, the sigsuspend() call below would not stop on
98 * SIGWINCH. */ 98 * SIGWINCH. */
99 99
100 signal(SIGWINCH, winch_handler); 100 signal(SIGWINCH, winch_handler);
101 sigfillset(&sigs); 101 sigfillset(&sigs);
102 sigdelset(&sigs, SIGWINCH); 102 /* Block all signals possible. */
103 /* Block anything else than SIGWINCH. */
104 if(sigprocmask(SIG_SETMASK, &sigs, NULL) < 0){ 103 if(sigprocmask(SIG_SETMASK, &sigs, NULL) < 0){
105 printk("winch_thread : sigprocmask failed, errno = %d\n", 104 printk("winch_thread : sigprocmask failed, errno = %d\n",
106 errno); 105 errno);
107 exit(1); 106 exit(1);
108 } 107 }
108 /* In sigsuspend(), block anything else than SIGWINCH. */
109 sigdelset(&sigs, SIGWINCH);
109 110
110 if(setsid() < 0){ 111 if(setsid() < 0){
111 printk("winch_thread : setsid failed, errno = %d\n", errno); 112 printk("winch_thread : setsid failed, errno = %d\n", errno);
@@ -130,7 +131,7 @@ static int winch_thread(void *arg)
130 while(1){ 131 while(1){
131 /* This will be interrupted by SIGWINCH only, since other signals 132 /* This will be interrupted by SIGWINCH only, since other signals
132 * are blocked.*/ 133 * are blocked.*/
133 pause(); 134 sigsuspend(&sigs);
134 135
135 count = os_write_file(pipe_fd, &c, sizeof(c)); 136 count = os_write_file(pipe_fd, &c, sizeof(c));
136 if(count != sizeof(c)) 137 if(count != sizeof(c))
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 344b24d09a7c..e77a38da4350 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -35,6 +35,7 @@
35#include "linux/blkpg.h" 35#include "linux/blkpg.h"
36#include "linux/genhd.h" 36#include "linux/genhd.h"
37#include "linux/spinlock.h" 37#include "linux/spinlock.h"
38#include "asm/atomic.h"
38#include "asm/segment.h" 39#include "asm/segment.h"
39#include "asm/uaccess.h" 40#include "asm/uaccess.h"
40#include "asm/irq.h" 41#include "asm/irq.h"
@@ -53,20 +54,21 @@
53#include "mem.h" 54#include "mem.h"
54#include "mem_kern.h" 55#include "mem_kern.h"
55#include "cow.h" 56#include "cow.h"
57#include "aio.h"
56 58
57enum ubd_req { UBD_READ, UBD_WRITE }; 59enum ubd_req { UBD_READ, UBD_WRITE };
58 60
59struct io_thread_req { 61struct io_thread_req {
60 enum ubd_req op; 62 enum aio_type op;
61 int fds[2]; 63 int fds[2];
62 unsigned long offsets[2]; 64 unsigned long offsets[2];
63 unsigned long long offset; 65 unsigned long long offset;
64 unsigned long length; 66 unsigned long length;
65 char *buffer; 67 char *buffer;
66 int sectorsize; 68 int sectorsize;
67 unsigned long sector_mask; 69 int bitmap_offset;
68 unsigned long long cow_offset; 70 long bitmap_start;
69 unsigned long bitmap_words[2]; 71 long bitmap_end;
70 int error; 72 int error;
71}; 73};
72 74
@@ -80,28 +82,31 @@ extern int create_cow_file(char *cow_file, char *backing_file,
80 unsigned long *bitmap_len_out, 82 unsigned long *bitmap_len_out,
81 int *data_offset_out); 83 int *data_offset_out);
82extern int read_cow_bitmap(int fd, void *buf, int offset, int len); 84extern int read_cow_bitmap(int fd, void *buf, int offset, int len);
83extern void do_io(struct io_thread_req *req); 85extern void do_io(struct io_thread_req *req, struct request *r,
86 unsigned long *bitmap);
84 87
85static inline int ubd_test_bit(__u64 bit, unsigned char *data) 88static inline int ubd_test_bit(__u64 bit, void *data)
86{ 89{
90 unsigned char *buffer = data;
87 __u64 n; 91 __u64 n;
88 int bits, off; 92 int bits, off;
89 93
90 bits = sizeof(data[0]) * 8; 94 bits = sizeof(buffer[0]) * 8;
91 n = bit / bits; 95 n = bit / bits;
92 off = bit % bits; 96 off = bit % bits;
93 return((data[n] & (1 << off)) != 0); 97 return((buffer[n] & (1 << off)) != 0);
94} 98}
95 99
96static inline void ubd_set_bit(__u64 bit, unsigned char *data) 100static inline void ubd_set_bit(__u64 bit, void *data)
97{ 101{
102 unsigned char *buffer = data;
98 __u64 n; 103 __u64 n;
99 int bits, off; 104 int bits, off;
100 105
101 bits = sizeof(data[0]) * 8; 106 bits = sizeof(buffer[0]) * 8;
102 n = bit / bits; 107 n = bit / bits;
103 off = bit % bits; 108 off = bit % bits;
104 data[n] |= (1 << off); 109 buffer[n] |= (1 << off);
105} 110}
106/*End stuff from ubd_user.h*/ 111/*End stuff from ubd_user.h*/
107 112
@@ -110,8 +115,6 @@ static inline void ubd_set_bit(__u64 bit, unsigned char *data)
110static DEFINE_SPINLOCK(ubd_io_lock); 115static DEFINE_SPINLOCK(ubd_io_lock);
111static DEFINE_SPINLOCK(ubd_lock); 116static DEFINE_SPINLOCK(ubd_lock);
112 117
113static void (*do_ubd)(void);
114
115static int ubd_open(struct inode * inode, struct file * filp); 118static int ubd_open(struct inode * inode, struct file * filp);
116static int ubd_release(struct inode * inode, struct file * file); 119static int ubd_release(struct inode * inode, struct file * file);
117static int ubd_ioctl(struct inode * inode, struct file * file, 120static int ubd_ioctl(struct inode * inode, struct file * file,
@@ -158,6 +161,8 @@ struct cow {
158 int data_offset; 161 int data_offset;
159}; 162};
160 163
164#define MAX_SG 64
165
161struct ubd { 166struct ubd {
162 char *file; 167 char *file;
163 int count; 168 int count;
@@ -168,6 +173,7 @@ struct ubd {
168 int no_cow; 173 int no_cow;
169 struct cow cow; 174 struct cow cow;
170 struct platform_device pdev; 175 struct platform_device pdev;
176 struct scatterlist sg[MAX_SG];
171}; 177};
172 178
173#define DEFAULT_COW { \ 179#define DEFAULT_COW { \
@@ -460,80 +466,113 @@ __uml_help(fakehd,
460); 466);
461 467
462static void do_ubd_request(request_queue_t * q); 468static void do_ubd_request(request_queue_t * q);
463 469static int in_ubd;
464/* Only changed by ubd_init, which is an initcall. */
465int thread_fd = -1;
466 470
467/* Changed by ubd_handler, which is serialized because interrupts only 471/* Changed by ubd_handler, which is serialized because interrupts only
468 * happen on CPU 0. 472 * happen on CPU 0.
469 */ 473 */
470int intr_count = 0; 474int intr_count = 0;
471 475
472/* call ubd_finish if you need to serialize */ 476static void ubd_end_request(struct request *req, int bytes, int uptodate)
473static void __ubd_finish(struct request *req, int error)
474{ 477{
475 int nsect; 478 if (!end_that_request_first(req, uptodate, bytes >> 9)) {
476 479 add_disk_randomness(req->rq_disk);
477 if(error){ 480 end_that_request_last(req);
478 end_request(req, 0);
479 return;
480 } 481 }
481 nsect = req->current_nr_sectors;
482 req->sector += nsect;
483 req->buffer += nsect << 9;
484 req->errors = 0;
485 req->nr_sectors -= nsect;
486 req->current_nr_sectors = 0;
487 end_request(req, 1);
488} 482}
489 483
490static inline void ubd_finish(struct request *req, int error) 484/* call ubd_finish if you need to serialize */
485static void __ubd_finish(struct request *req, int bytes)
491{ 486{
492 spin_lock(&ubd_io_lock); 487 if(bytes < 0){
493 __ubd_finish(req, error); 488 ubd_end_request(req, 0, 0);
494 spin_unlock(&ubd_io_lock); 489 return;
490 }
491
492 ubd_end_request(req, bytes, 1);
495} 493}
496 494
497/* Called without ubd_io_lock held */ 495static inline void ubd_finish(struct request *req, int bytes)
498static void ubd_handler(void)
499{ 496{
500 struct io_thread_req req; 497 spin_lock(&ubd_io_lock);
501 struct request *rq = elv_next_request(ubd_queue); 498 __ubd_finish(req, bytes);
502 int n; 499 spin_unlock(&ubd_io_lock);
503
504 do_ubd = NULL;
505 intr_count++;
506 n = os_read_file(thread_fd, &req, sizeof(req));
507 if(n != sizeof(req)){
508 printk(KERN_ERR "Pid %d - spurious interrupt in ubd_handler, "
509 "err = %d\n", os_getpid(), -n);
510 spin_lock(&ubd_io_lock);
511 end_request(rq, 0);
512 spin_unlock(&ubd_io_lock);
513 return;
514 }
515
516 ubd_finish(rq, req.error);
517 reactivate_fd(thread_fd, UBD_IRQ);
518 do_ubd_request(ubd_queue);
519} 500}
520 501
502struct bitmap_io {
503 atomic_t count;
504 struct aio_context aio;
505};
506
507struct ubd_aio {
508 struct aio_context aio;
509 struct request *req;
510 int len;
511 struct bitmap_io *bitmap;
512 void *bitmap_buf;
513};
514
515static int ubd_reply_fd = -1;
516
521static irqreturn_t ubd_intr(int irq, void *dev, struct pt_regs *unused) 517static irqreturn_t ubd_intr(int irq, void *dev, struct pt_regs *unused)
522{ 518{
523 ubd_handler(); 519 struct aio_thread_reply reply;
524 return(IRQ_HANDLED); 520 struct ubd_aio *aio;
525} 521 struct request *req;
522 int err, n, fd = (int) (long) dev;
523
524 while(1){
525 err = os_read_file(fd, &reply, sizeof(reply));
526 if(err == -EAGAIN)
527 break;
528 if(err < 0){
529 printk("ubd_aio_handler - read returned err %d\n",
530 -err);
531 break;
532 }
526 533
527/* Only changed by ubd_init, which is an initcall. */ 534 aio = container_of(reply.data, struct ubd_aio, aio);
528static int io_pid = -1; 535 n = reply.err;
529 536
530void kill_io_thread(void) 537 if(n == 0){
531{ 538 req = aio->req;
532 if(io_pid != -1) 539 req->nr_sectors -= aio->len >> 9;
533 os_kill_process(io_pid, 1); 540
534} 541 if((aio->bitmap != NULL) &&
542 (atomic_dec_and_test(&aio->bitmap->count))){
543 aio->aio = aio->bitmap->aio;
544 aio->len = 0;
545 kfree(aio->bitmap);
546 aio->bitmap = NULL;
547 submit_aio(&aio->aio);
548 }
549 else {
550 if((req->nr_sectors == 0) &&
551 (aio->bitmap == NULL)){
552 int len = req->hard_nr_sectors << 9;
553 ubd_finish(req, len);
554 }
555
556 if(aio->bitmap_buf != NULL)
557 kfree(aio->bitmap_buf);
558 kfree(aio);
559 }
560 }
561 else if(n < 0){
562 ubd_finish(aio->req, n);
563 if(aio->bitmap != NULL)
564 kfree(aio->bitmap);
565 if(aio->bitmap_buf != NULL)
566 kfree(aio->bitmap_buf);
567 kfree(aio);
568 }
569 }
570 reactivate_fd(fd, UBD_IRQ);
535 571
536__uml_exitcall(kill_io_thread); 572 do_ubd_request(ubd_queue);
573
574 return(IRQ_HANDLED);
575}
537 576
538static int ubd_file_size(struct ubd *dev, __u64 *size_out) 577static int ubd_file_size(struct ubd *dev, __u64 *size_out)
539{ 578{
@@ -569,7 +608,7 @@ static int ubd_open_dev(struct ubd *dev)
569 &dev->cow.data_offset, create_ptr); 608 &dev->cow.data_offset, create_ptr);
570 609
571 if((dev->fd == -ENOENT) && create_cow){ 610 if((dev->fd == -ENOENT) && create_cow){
572 dev->fd = create_cow_file(dev->file, dev->cow.file, 611 dev->fd = create_cow_file(dev->file, dev->cow.file,
573 dev->openflags, 1 << 9, PAGE_SIZE, 612 dev->openflags, 1 << 9, PAGE_SIZE,
574 &dev->cow.bitmap_offset, 613 &dev->cow.bitmap_offset,
575 &dev->cow.bitmap_len, 614 &dev->cow.bitmap_len,
@@ -668,21 +707,22 @@ static int ubd_add(int n)
668 struct ubd *dev = &ubd_dev[n]; 707 struct ubd *dev = &ubd_dev[n];
669 int err; 708 int err;
670 709
710 err = -ENODEV;
671 if(dev->file == NULL) 711 if(dev->file == NULL)
672 return(-ENODEV); 712 goto out;
673 713
674 if (ubd_open_dev(dev)) 714 if (ubd_open_dev(dev))
675 return(-ENODEV); 715 goto out;
676 716
677 err = ubd_file_size(dev, &dev->size); 717 err = ubd_file_size(dev, &dev->size);
678 if(err < 0) 718 if(err < 0)
679 return(err); 719 goto out_close;
680 720
681 dev->size = ROUND_BLOCK(dev->size); 721 dev->size = ROUND_BLOCK(dev->size);
682 722
683 err = ubd_new_disk(MAJOR_NR, dev->size, n, &ubd_gendisk[n]); 723 err = ubd_new_disk(MAJOR_NR, dev->size, n, &ubd_gendisk[n]);
684 if(err) 724 if(err)
685 return(err); 725 goto out_close;
686 726
687 if(fake_major != MAJOR_NR) 727 if(fake_major != MAJOR_NR)
688 ubd_new_disk(fake_major, dev->size, n, 728 ubd_new_disk(fake_major, dev->size, n,
@@ -693,8 +733,11 @@ static int ubd_add(int n)
693 if (fake_ide) 733 if (fake_ide)
694 make_ide_entries(ubd_gendisk[n]->disk_name); 734 make_ide_entries(ubd_gendisk[n]->disk_name);
695 735
736 err = 0;
737out_close:
696 ubd_close(dev); 738 ubd_close(dev);
697 return 0; 739out:
740 return err;
698} 741}
699 742
700static int ubd_config(char *str) 743static int ubd_config(char *str)
@@ -827,6 +870,10 @@ int ubd_init(void)
827{ 870{
828 int i; 871 int i;
829 872
873 ubd_reply_fd = init_aio_irq(UBD_IRQ, "ubd", ubd_intr);
874 if(ubd_reply_fd < 0)
875 printk("Setting up ubd AIO failed, err = %d\n", ubd_reply_fd);
876
830 devfs_mk_dir("ubd"); 877 devfs_mk_dir("ubd");
831 if (register_blkdev(MAJOR_NR, "ubd")) 878 if (register_blkdev(MAJOR_NR, "ubd"))
832 return -1; 879 return -1;
@@ -837,6 +884,7 @@ int ubd_init(void)
837 return -1; 884 return -1;
838 } 885 }
839 886
887 blk_queue_max_hw_segments(ubd_queue, MAX_SG);
840 if (fake_major != MAJOR_NR) { 888 if (fake_major != MAJOR_NR) {
841 char name[sizeof("ubd_nnn\0")]; 889 char name[sizeof("ubd_nnn\0")];
842 890
@@ -848,40 +896,12 @@ int ubd_init(void)
848 driver_register(&ubd_driver); 896 driver_register(&ubd_driver);
849 for (i = 0; i < MAX_DEV; i++) 897 for (i = 0; i < MAX_DEV; i++)
850 ubd_add(i); 898 ubd_add(i);
899
851 return 0; 900 return 0;
852} 901}
853 902
854late_initcall(ubd_init); 903late_initcall(ubd_init);
855 904
856int ubd_driver_init(void){
857 unsigned long stack;
858 int err;
859
860 /* Set by CONFIG_BLK_DEV_UBD_SYNC or ubd=sync.*/
861 if(global_openflags.s){
862 printk(KERN_INFO "ubd: Synchronous mode\n");
863 /* Letting ubd=sync be like using ubd#s= instead of ubd#= is
864 * enough. So use anyway the io thread. */
865 }
866 stack = alloc_stack(0, 0);
867 io_pid = start_io_thread(stack + PAGE_SIZE - sizeof(void *),
868 &thread_fd);
869 if(io_pid < 0){
870 printk(KERN_ERR
871 "ubd : Failed to start I/O thread (errno = %d) - "
872 "falling back to synchronous I/O\n", -io_pid);
873 io_pid = -1;
874 return(0);
875 }
876 err = um_request_irq(UBD_IRQ, thread_fd, IRQ_READ, ubd_intr,
877 SA_INTERRUPT, "ubd", ubd_dev);
878 if(err != 0)
879 printk(KERN_ERR "um_request_irq failed - errno = %d\n", -err);
880 return(err);
881}
882
883device_initcall(ubd_driver_init);
884
885static int ubd_open(struct inode *inode, struct file *filp) 905static int ubd_open(struct inode *inode, struct file *filp)
886{ 906{
887 struct gendisk *disk = inode->i_bdev->bd_disk; 907 struct gendisk *disk = inode->i_bdev->bd_disk;
@@ -919,105 +939,55 @@ static int ubd_release(struct inode * inode, struct file * file)
919 return(0); 939 return(0);
920} 940}
921 941
922static void cowify_bitmap(__u64 io_offset, int length, unsigned long *cow_mask, 942static void cowify_bitmap(struct io_thread_req *req, unsigned long *bitmap)
923 __u64 *cow_offset, unsigned long *bitmap,
924 __u64 bitmap_offset, unsigned long *bitmap_words,
925 __u64 bitmap_len)
926{ 943{
927 __u64 sector = io_offset >> 9; 944 __u64 sector = req->offset / req->sectorsize;
928 int i, update_bitmap = 0; 945 int i;
929
930 for(i = 0; i < length >> 9; i++){
931 if(cow_mask != NULL)
932 ubd_set_bit(i, (unsigned char *) cow_mask);
933 if(ubd_test_bit(sector + i, (unsigned char *) bitmap))
934 continue;
935
936 update_bitmap = 1;
937 ubd_set_bit(sector + i, (unsigned char *) bitmap);
938 }
939
940 if(!update_bitmap)
941 return;
942
943 *cow_offset = sector / (sizeof(unsigned long) * 8);
944
945 /* This takes care of the case where we're exactly at the end of the
946 * device, and *cow_offset + 1 is off the end. So, just back it up
947 * by one word. Thanks to Lynn Kerby for the fix and James McMechan
948 * for the original diagnosis.
949 */
950 if(*cow_offset == ((bitmap_len + sizeof(unsigned long) - 1) /
951 sizeof(unsigned long) - 1))
952 (*cow_offset)--;
953
954 bitmap_words[0] = bitmap[*cow_offset];
955 bitmap_words[1] = bitmap[*cow_offset + 1];
956
957 *cow_offset *= sizeof(unsigned long);
958 *cow_offset += bitmap_offset;
959}
960 946
961static void cowify_req(struct io_thread_req *req, unsigned long *bitmap, 947 for(i = 0; i < req->length / req->sectorsize; i++){
962 __u64 bitmap_offset, __u64 bitmap_len) 948 if(ubd_test_bit(sector + i, bitmap))
963{ 949 continue;
964 __u64 sector = req->offset >> 9;
965 int i;
966 950
967 if(req->length > (sizeof(req->sector_mask) * 8) << 9) 951 if(req->bitmap_start == -1)
968 panic("Operation too long"); 952 req->bitmap_start = sector + i;
953 req->bitmap_end = sector + i + 1;
969 954
970 if(req->op == UBD_READ) { 955 ubd_set_bit(sector + i, bitmap);
971 for(i = 0; i < req->length >> 9; i++){ 956 }
972 if(ubd_test_bit(sector + i, (unsigned char *) bitmap))
973 ubd_set_bit(i, (unsigned char *)
974 &req->sector_mask);
975 }
976 }
977 else cowify_bitmap(req->offset, req->length, &req->sector_mask,
978 &req->cow_offset, bitmap, bitmap_offset,
979 req->bitmap_words, bitmap_len);
980} 957}
981 958
982/* Called with ubd_io_lock held */ 959/* Called with ubd_io_lock held */
983static int prepare_request(struct request *req, struct io_thread_req *io_req) 960static int prepare_request(struct request *req, struct io_thread_req *io_req,
961 unsigned long long offset, int page_offset,
962 int len, struct page *page)
984{ 963{
985 struct gendisk *disk = req->rq_disk; 964 struct gendisk *disk = req->rq_disk;
986 struct ubd *dev = disk->private_data; 965 struct ubd *dev = disk->private_data;
987 __u64 offset;
988 int len;
989
990 if(req->rq_status == RQ_INACTIVE) return(1);
991 966
992 /* This should be impossible now */ 967 /* This should be impossible now */
993 if((rq_data_dir(req) == WRITE) && !dev->openflags.w){ 968 if((rq_data_dir(req) == WRITE) && !dev->openflags.w){
994 printk("Write attempted on readonly ubd device %s\n", 969 printk("Write attempted on readonly ubd device %s\n",
995 disk->disk_name); 970 disk->disk_name);
996 end_request(req, 0); 971 ubd_end_request(req, 0, 0);
997 return(1); 972 return(1);
998 } 973 }
999 974
1000 offset = ((__u64) req->sector) << 9;
1001 len = req->current_nr_sectors << 9;
1002
1003 io_req->fds[0] = (dev->cow.file != NULL) ? dev->cow.fd : dev->fd; 975 io_req->fds[0] = (dev->cow.file != NULL) ? dev->cow.fd : dev->fd;
1004 io_req->fds[1] = dev->fd; 976 io_req->fds[1] = dev->fd;
1005 io_req->cow_offset = -1;
1006 io_req->offset = offset; 977 io_req->offset = offset;
1007 io_req->length = len; 978 io_req->length = len;
1008 io_req->error = 0; 979 io_req->error = 0;
1009 io_req->sector_mask = 0; 980 io_req->op = (rq_data_dir(req) == READ) ? AIO_READ : AIO_WRITE;
1010
1011 io_req->op = (rq_data_dir(req) == READ) ? UBD_READ : UBD_WRITE;
1012 io_req->offsets[0] = 0; 981 io_req->offsets[0] = 0;
1013 io_req->offsets[1] = dev->cow.data_offset; 982 io_req->offsets[1] = dev->cow.data_offset;
1014 io_req->buffer = req->buffer; 983 io_req->buffer = page_address(page) + page_offset;
1015 io_req->sectorsize = 1 << 9; 984 io_req->sectorsize = 1 << 9;
985 io_req->bitmap_offset = dev->cow.bitmap_offset;
986 io_req->bitmap_start = -1;
987 io_req->bitmap_end = -1;
1016 988
1017 if(dev->cow.file != NULL) 989 if((dev->cow.file != NULL) && (io_req->op == UBD_WRITE))
1018 cowify_req(io_req, dev->cow.bitmap, dev->cow.bitmap_offset, 990 cowify_bitmap(io_req, dev->cow.bitmap);
1019 dev->cow.bitmap_len);
1020
1021 return(0); 991 return(0);
1022} 992}
1023 993
@@ -1026,30 +996,36 @@ static void do_ubd_request(request_queue_t *q)
1026{ 996{
1027 struct io_thread_req io_req; 997 struct io_thread_req io_req;
1028 struct request *req; 998 struct request *req;
1029 int err, n; 999 __u64 sector;
1030 1000 int err;
1031 if(thread_fd == -1){ 1001
1032 while((req = elv_next_request(q)) != NULL){ 1002 if(in_ubd)
1033 err = prepare_request(req, &io_req); 1003 return;
1034 if(!err){ 1004 in_ubd = 1;
1035 do_io(&io_req); 1005 while((req = elv_next_request(q)) != NULL){
1036 __ubd_finish(req, io_req.error); 1006 struct gendisk *disk = req->rq_disk;
1037 } 1007 struct ubd *dev = disk->private_data;
1038 } 1008 int n, i;
1039 } 1009
1040 else { 1010 blkdev_dequeue_request(req);
1041 if(do_ubd || (req = elv_next_request(q)) == NULL) 1011
1042 return; 1012 sector = req->sector;
1043 err = prepare_request(req, &io_req); 1013 n = blk_rq_map_sg(q, req, dev->sg);
1044 if(!err){ 1014
1045 do_ubd = ubd_handler; 1015 for(i = 0; i < n; i++){
1046 n = os_write_file(thread_fd, (char *) &io_req, 1016 struct scatterlist *sg = &dev->sg[i];
1047 sizeof(io_req)); 1017
1048 if(n != sizeof(io_req)) 1018 err = prepare_request(req, &io_req, sector << 9,
1049 printk("write to io thread failed, " 1019 sg->offset, sg->length,
1050 "errno = %d\n", -n); 1020 sg->page);
1021 if(err)
1022 continue;
1023
1024 sector += sg->length >> 9;
1025 do_io(&io_req, req, dev->cow.bitmap);
1051 } 1026 }
1052 } 1027 }
1028 in_ubd = 0;
1053} 1029}
1054 1030
1055static int ubd_ioctl(struct inode * inode, struct file * file, 1031static int ubd_ioctl(struct inode * inode, struct file * file,
@@ -1265,131 +1241,95 @@ int create_cow_file(char *cow_file, char *backing_file, struct openflags flags,
1265 return(err); 1241 return(err);
1266} 1242}
1267 1243
1268static int update_bitmap(struct io_thread_req *req) 1244void do_io(struct io_thread_req *req, struct request *r, unsigned long *bitmap)
1269{
1270 int n;
1271
1272 if(req->cow_offset == -1)
1273 return(0);
1274
1275 n = os_seek_file(req->fds[1], req->cow_offset);
1276 if(n < 0){
1277 printk("do_io - bitmap lseek failed : err = %d\n", -n);
1278 return(1);
1279 }
1280
1281 n = os_write_file(req->fds[1], &req->bitmap_words,
1282 sizeof(req->bitmap_words));
1283 if(n != sizeof(req->bitmap_words)){
1284 printk("do_io - bitmap update failed, err = %d fd = %d\n", -n,
1285 req->fds[1]);
1286 return(1);
1287 }
1288
1289 return(0);
1290}
1291
1292void do_io(struct io_thread_req *req)
1293{ 1245{
1294 char *buf; 1246 struct ubd_aio *aio;
1295 unsigned long len; 1247 struct bitmap_io *bitmap_io = NULL;
1296 int n, nsectors, start, end, bit; 1248 char *buf;
1297 int err; 1249 void *bitmap_buf = NULL;
1298 __u64 off; 1250 unsigned long len, sector;
1299 1251 int nsectors, start, end, bit, err;
1300 nsectors = req->length / req->sectorsize; 1252 __u64 off;
1301 start = 0; 1253
1302 do { 1254 if(req->bitmap_start != -1){
1303 bit = ubd_test_bit(start, (unsigned char *) &req->sector_mask); 1255 /* Round up to the nearest word */
1304 end = start; 1256 int round = sizeof(unsigned long);
1305 while((end < nsectors) && 1257 len = (req->bitmap_end - req->bitmap_start +
1306 (ubd_test_bit(end, (unsigned char *) 1258 round * 8 - 1) / (round * 8);
1307 &req->sector_mask) == bit)) 1259 len *= round;
1308 end++; 1260
1309 1261 off = req->bitmap_start / (8 * round);
1310 off = req->offset + req->offsets[bit] + 1262 off *= round;
1311 start * req->sectorsize; 1263
1312 len = (end - start) * req->sectorsize; 1264 bitmap_io = kmalloc(sizeof(*bitmap_io), GFP_KERNEL);
1313 buf = &req->buffer[start * req->sectorsize]; 1265 if(bitmap_io == NULL){
1314 1266 printk("Failed to kmalloc bitmap IO\n");
1315 err = os_seek_file(req->fds[bit], off); 1267 req->error = 1;
1316 if(err < 0){ 1268 return;
1317 printk("do_io - lseek failed : err = %d\n", -err); 1269 }
1318 req->error = 1;
1319 return;
1320 }
1321 if(req->op == UBD_READ){
1322 n = 0;
1323 do {
1324 buf = &buf[n];
1325 len -= n;
1326 n = os_read_file(req->fds[bit], buf, len);
1327 if (n < 0) {
1328 printk("do_io - read failed, err = %d "
1329 "fd = %d\n", -n, req->fds[bit]);
1330 req->error = 1;
1331 return;
1332 }
1333 } while((n < len) && (n != 0));
1334 if (n < len) memset(&buf[n], 0, len - n);
1335 } else {
1336 n = os_write_file(req->fds[bit], buf, len);
1337 if(n != len){
1338 printk("do_io - write failed err = %d "
1339 "fd = %d\n", -n, req->fds[bit]);
1340 req->error = 1;
1341 return;
1342 }
1343 }
1344 1270
1345 start = end; 1271 bitmap_buf = kmalloc(len, GFP_KERNEL);
1346 } while(start < nsectors); 1272 if(bitmap_buf == NULL){
1273 printk("do_io : kmalloc of bitmap chunk "
1274 "failed\n");
1275 kfree(bitmap_io);
1276 req->error = 1;
1277 return;
1278 }
1279 memcpy(bitmap_buf, &bitmap[off / sizeof(bitmap[0])], len);
1280
1281 *bitmap_io = ((struct bitmap_io)
1282 { .count = ATOMIC_INIT(0),
1283 .aio = INIT_AIO(AIO_WRITE, req->fds[1],
1284 bitmap_buf, len,
1285 req->bitmap_offset + off,
1286 ubd_reply_fd) } );
1287 }
1347 1288
1348 req->error = update_bitmap(req); 1289 nsectors = req->length / req->sectorsize;
1349} 1290 start = 0;
1291 end = nsectors;
1292 bit = 0;
1293 do {
1294 if(bitmap != NULL){
1295 sector = req->offset / req->sectorsize;
1296 bit = ubd_test_bit(sector + start, bitmap);
1297 end = start;
1298 while((end < nsectors) &&
1299 (ubd_test_bit(sector + end, bitmap) == bit))
1300 end++;
1301 }
1350 1302
1351/* Changed in start_io_thread, which is serialized by being called only 1303 off = req->offsets[bit] + req->offset +
1352 * from ubd_init, which is an initcall. 1304 start * req->sectorsize;
1353 */ 1305 len = (end - start) * req->sectorsize;
1354int kernel_fd = -1; 1306 buf = &req->buffer[start * req->sectorsize];
1355 1307
1356/* Only changed by the io thread */ 1308 aio = kmalloc(sizeof(*aio), GFP_KERNEL);
1357int io_count = 0; 1309 if(aio == NULL){
1310 req->error = 1;
1311 return;
1312 }
1358 1313
1359int io_thread(void *arg) 1314 *aio = ((struct ubd_aio)
1360{ 1315 { .aio = INIT_AIO(req->op, req->fds[bit], buf,
1361 struct io_thread_req req; 1316 len, off, ubd_reply_fd),
1362 int n; 1317 .len = len,
1318 .req = r,
1319 .bitmap = bitmap_io,
1320 .bitmap_buf = bitmap_buf });
1321
1322 if(aio->bitmap != NULL)
1323 atomic_inc(&aio->bitmap->count);
1324
1325 err = submit_aio(&aio->aio);
1326 if(err){
1327 printk("do_io - submit_aio failed, "
1328 "err = %d\n", err);
1329 req->error = 1;
1330 return;
1331 }
1363 1332
1364 ignore_sigwinch_sig(); 1333 start = end;
1365 while(1){ 1334 } while(start < nsectors);
1366 n = os_read_file(kernel_fd, &req, sizeof(req));
1367 if(n != sizeof(req)){
1368 if(n < 0)
1369 printk("io_thread - read failed, fd = %d, "
1370 "err = %d\n", kernel_fd, -n);
1371 else {
1372 printk("io_thread - short read, fd = %d, "
1373 "length = %d\n", kernel_fd, n);
1374 }
1375 continue;
1376 }
1377 io_count++;
1378 do_io(&req);
1379 n = os_write_file(kernel_fd, &req, sizeof(req));
1380 if(n != sizeof(req))
1381 printk("io_thread - write failed, fd = %d, err = %d\n",
1382 kernel_fd, -n);
1383 }
1384} 1335}
1385
1386/*
1387 * Overrides for Emacs so that we follow Linus's tabbing style.
1388 * Emacs will notice this stuff at the end of the file and automatically
1389 * adjust the settings for this buffer only. This must remain at the end
1390 * of the file.
1391 * ---------------------------------------------------------------------------
1392 * Local variables:
1393 * c-file-style: "linux"
1394 * End:
1395 */
diff --git a/arch/um/include/aio.h b/arch/um/include/aio.h
new file mode 100644
index 000000000000..83f16877ab08
--- /dev/null
+++ b/arch/um/include/aio.h
@@ -0,0 +1,40 @@
1/*
2 * Copyright (C) 2004 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef AIO_H__
7#define AIO_H__
8
9enum aio_type { AIO_READ, AIO_WRITE, AIO_MMAP };
10
11struct aio_thread_reply {
12 void *data;
13 int err;
14};
15
16struct aio_context {
17 enum aio_type type;
18 int fd;
19 void *data;
20 int len;
21 unsigned long long offset;
22 int reply_fd;
23 struct aio_context *next;
24};
25
26#define INIT_AIO(aio_type, aio_fd, aio_data, aio_len, aio_offset, \
27 aio_reply_fd) \
28 { .type = aio_type, \
29 .fd = aio_fd, \
30 .data = aio_data, \
31 .len = aio_len, \
32 .offset = aio_offset, \
33 .reply_fd = aio_reply_fd }
34
35#define INIT_AIO_CONTEXT { .reply_fd = -1, \
36 .next = NULL }
37
38extern int submit_aio(struct aio_context *aio);
39
40#endif
diff --git a/arch/um/include/init.h b/arch/um/include/init.h
index 55c2693f8778..cbd79a8d213d 100644
--- a/arch/um/include/init.h
+++ b/arch/um/include/init.h
@@ -111,7 +111,15 @@ extern struct uml_param __uml_setup_start, __uml_setup_end;
111 111
112#ifndef __KERNEL__ 112#ifndef __KERNEL__
113 113
114#define __initcall(fn) static initcall_t __initcall_##fn __init_call = fn 114#define __define_initcall(level,fn) \
115 static initcall_t __initcall_##fn __attribute_used__ \
116 __attribute__((__section__(".initcall" level ".init"))) = fn
117
118/* Userspace initcalls shouldn't depend on anything in the kernel, so we'll
119 * make them run first.
120 */
121#define __initcall(fn) __define_initcall("1", fn)
122
115#define __exitcall(fn) static exitcall_t __exitcall_##fn __exit_call = fn 123#define __exitcall(fn) static exitcall_t __exitcall_##fn __exit_call = fn
116 124
117#define __init_call __attribute__ ((unused,__section__ (".initcall.init"))) 125#define __init_call __attribute__ ((unused,__section__ (".initcall.init")))
diff --git a/arch/um/include/irq_kern.h b/arch/um/include/irq_kern.h
index 3af52a634c4c..c222d56b1494 100644
--- a/arch/um/include/irq_kern.h
+++ b/arch/um/include/irq_kern.h
@@ -7,12 +7,15 @@
7#define __IRQ_KERN_H__ 7#define __IRQ_KERN_H__
8 8
9#include "linux/interrupt.h" 9#include "linux/interrupt.h"
10#include "asm/ptrace.h"
10 11
11extern int um_request_irq(unsigned int irq, int fd, int type, 12extern int um_request_irq(unsigned int irq, int fd, int type,
12 irqreturn_t (*handler)(int, void *, 13 irqreturn_t (*handler)(int, void *,
13 struct pt_regs *), 14 struct pt_regs *),
14 unsigned long irqflags, const char * devname, 15 unsigned long irqflags, const char * devname,
15 void *dev_id); 16 void *dev_id);
17extern int init_aio_irq(int irq, char *name,
18 irqreturn_t (*handler)(int, void *, struct pt_regs *));
16 19
17#endif 20#endif
18 21
diff --git a/arch/um/include/os.h b/arch/um/include/os.h
index 881d2988d2d8..4c362458052c 100644
--- a/arch/um/include/os.h
+++ b/arch/um/include/os.h
@@ -153,6 +153,11 @@ extern int os_file_type(char *file);
153extern int os_file_mode(char *file, struct openflags *mode_out); 153extern int os_file_mode(char *file, struct openflags *mode_out);
154extern int os_lock_file(int fd, int excl); 154extern int os_lock_file(int fd, int excl);
155 155
156/* start_up.c */
157extern void os_early_checks(void);
158extern int can_do_skas(void);
159
160/* process.c */
156extern unsigned long os_process_pc(int pid); 161extern unsigned long os_process_pc(int pid);
157extern int os_process_parent(int pid); 162extern int os_process_parent(int pid);
158extern void os_stop_process(int pid); 163extern void os_stop_process(int pid);
@@ -161,6 +166,9 @@ extern void os_kill_ptraced_process(int pid, int reap_child);
161extern void os_usr1_process(int pid); 166extern void os_usr1_process(int pid);
162extern int os_getpid(void); 167extern int os_getpid(void);
163extern int os_getpgrp(void); 168extern int os_getpgrp(void);
169extern void init_new_thread_stack(void *sig_stack, void (*usr1_handler)(int));
170extern void init_new_thread_signals(int altstack);
171extern int run_kernel_thread(int (*fn)(void *), void *arg, void **jmp_ptr);
164 172
165extern int os_map_memory(void *virt, int fd, unsigned long long off, 173extern int os_map_memory(void *virt, int fd, unsigned long long off,
166 unsigned long len, int r, int w, int x); 174 unsigned long len, int r, int w, int x);
@@ -170,6 +178,13 @@ extern int os_unmap_memory(void *addr, int len);
170extern void os_flush_stdout(void); 178extern void os_flush_stdout(void);
171extern unsigned long long os_usecs(void); 179extern unsigned long long os_usecs(void);
172 180
181/* tt.c
182 * for tt mode only (will be deleted in future...)
183 */
184extern void forward_pending_sigio(int target);
185extern int start_fork_tramp(void *arg, unsigned long temp_stack,
186 int clone_flags, int (*tramp)(void *));
187
173#endif 188#endif
174 189
175/* 190/*
diff --git a/arch/um/include/syscall.h b/arch/um/include/syscall.h
new file mode 100644
index 000000000000..dda1df901a08
--- /dev/null
+++ b/arch/um/include/syscall.h
@@ -0,0 +1,12 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __SYSCALL_USER_H
7#define __SYSCALL_USER_H
8
9extern int record_syscall_start(int syscall);
10extern void record_syscall_end(int index, long result);
11
12#endif
diff --git a/arch/um/include/syscall_user.h b/arch/um/include/syscall_user.h
deleted file mode 100644
index 811d0ec2445e..000000000000
--- a/arch/um/include/syscall_user.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __SYSCALL_USER_H
7#define __SYSCALL_USER_H
8
9extern int record_syscall_start(int syscall);
10extern void record_syscall_end(int index, long result);
11
12#endif
13
14/*
15 * Overrides for Emacs so that we follow Linus's tabbing style.
16 * Emacs will notice this stuff at the end of the file and automatically
17 * adjust the settings for this buffer only. This must remain at the end
18 * of the file.
19 * ---------------------------------------------------------------------------
20 * Local variables:
21 * c-file-style: "linux"
22 * End:
23 */
diff --git a/arch/um/include/sysdep-i386/syscalls.h b/arch/um/include/sysdep-i386/syscalls.h
index be0a3e3469eb..a0d5b74d3731 100644
--- a/arch/um/include/sysdep-i386/syscalls.h
+++ b/arch/um/include/sysdep-i386/syscalls.h
@@ -16,6 +16,8 @@ extern syscall_handler_t sys_rt_sigaction;
16 16
17extern syscall_handler_t old_mmap_i386; 17extern syscall_handler_t old_mmap_i386;
18 18
19extern syscall_handler_t *sys_call_table[];
20
19#define EXECUTE_SYSCALL(syscall, regs) \ 21#define EXECUTE_SYSCALL(syscall, regs) \
20 ((long (*)(struct syscall_args)) (*sys_call_table[syscall]))(SYSCALL_ARGS(&regs->regs)) 22 ((long (*)(struct syscall_args)) (*sys_call_table[syscall]))(SYSCALL_ARGS(&regs->regs))
21 23
diff --git a/arch/um/include/sysdep-x86_64/ptrace.h b/arch/um/include/sysdep-x86_64/ptrace.h
index be8acd5efd97..331aa2d1f3f5 100644
--- a/arch/um/include/sysdep-x86_64/ptrace.h
+++ b/arch/um/include/sysdep-x86_64/ptrace.h
@@ -227,7 +227,7 @@ struct syscall_args {
227 panic("Bad register in UPT_SET : %d\n", reg); \ 227 panic("Bad register in UPT_SET : %d\n", reg); \
228 break; \ 228 break; \
229 } \ 229 } \
230 val; \ 230 __upt_val; \
231 }) 231 })
232 232
233#define UPT_SET_SYSCALL_RETURN(r, res) \ 233#define UPT_SET_SYSCALL_RETURN(r, res) \
diff --git a/arch/um/include/sysdep-x86_64/syscalls.h b/arch/um/include/sysdep-x86_64/syscalls.h
index 67923cca5691..e06f83e80f4a 100644
--- a/arch/um/include/sysdep-x86_64/syscalls.h
+++ b/arch/um/include/sysdep-x86_64/syscalls.h
@@ -14,6 +14,8 @@ typedef long syscall_handler_t(void);
14 14
15extern syscall_handler_t *ia32_sys_call_table[]; 15extern syscall_handler_t *ia32_sys_call_table[];
16 16
17extern syscall_handler_t *sys_call_table[];
18
17#define EXECUTE_SYSCALL(syscall, regs) \ 19#define EXECUTE_SYSCALL(syscall, regs) \
18 (((long (*)(long, long, long, long, long, long)) \ 20 (((long (*)(long, long, long, long, long, long)) \
19 (*sys_call_table[syscall]))(UPT_SYSCALL_ARG1(&regs->regs), \ 21 (*sys_call_table[syscall]))(UPT_SYSCALL_ARG1(&regs->regs), \
diff --git a/arch/um/include/tlb.h b/arch/um/include/tlb.h
index c6f9628f39bf..45d7da6c3b2c 100644
--- a/arch/um/include/tlb.h
+++ b/arch/um/include/tlb.h
@@ -9,7 +9,7 @@
9#include "um_mmu.h" 9#include "um_mmu.h"
10 10
11struct host_vm_op { 11struct host_vm_op {
12 enum { MMAP, MUNMAP, MPROTECT } type; 12 enum { NONE, MMAP, MUNMAP, MPROTECT } type;
13 union { 13 union {
14 struct { 14 struct {
15 unsigned long addr; 15 unsigned long addr;
@@ -38,24 +38,10 @@ extern void mprotect_kernel_vm(int w);
38extern void force_flush_all(void); 38extern void force_flush_all(void);
39extern void fix_range_common(struct mm_struct *mm, unsigned long start_addr, 39extern void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
40 unsigned long end_addr, int force, 40 unsigned long end_addr, int force,
41 void (*do_ops)(union mm_context *, 41 int (*do_ops)(union mm_context *,
42 struct host_vm_op *, int)); 42 struct host_vm_op *, int, int,
43 void **));
43extern int flush_tlb_kernel_range_common(unsigned long start, 44extern int flush_tlb_kernel_range_common(unsigned long start,
44 unsigned long end); 45 unsigned long end);
45 46
46extern int add_mmap(unsigned long virt, unsigned long phys, unsigned long len,
47 int r, int w, int x, struct host_vm_op *ops, int index,
48 int last_filled, union mm_context *mmu,
49 void (*do_ops)(union mm_context *, struct host_vm_op *,
50 int));
51extern int add_munmap(unsigned long addr, unsigned long len,
52 struct host_vm_op *ops, int index, int last_filled,
53 union mm_context *mmu,
54 void (*do_ops)(union mm_context *, struct host_vm_op *,
55 int));
56extern int add_mprotect(unsigned long addr, unsigned long len, int r, int w,
57 int x, struct host_vm_op *ops, int index,
58 int last_filled, union mm_context *mmu,
59 void (*do_ops)(union mm_context *, struct host_vm_op *,
60 int));
61#endif 47#endif
diff --git a/arch/um/include/user_util.h b/arch/um/include/user_util.h
index 7b6a24dfd302..bb505e01d994 100644
--- a/arch/um/include/user_util.h
+++ b/arch/um/include/user_util.h
@@ -54,8 +54,6 @@ extern void stack_protections(unsigned long address);
54extern void task_protections(unsigned long address); 54extern void task_protections(unsigned long address);
55extern int wait_for_stop(int pid, int sig, int cont_type, void *relay); 55extern int wait_for_stop(int pid, int sig, int cont_type, void *relay);
56extern void *add_signal_handler(int sig, void (*handler)(int)); 56extern void *add_signal_handler(int sig, void (*handler)(int));
57extern int start_fork_tramp(void *arg, unsigned long temp_stack,
58 int clone_flags, int (*tramp)(void *));
59extern int linux_main(int argc, char **argv); 57extern int linux_main(int argc, char **argv);
60extern void set_cmdline(char *cmd); 58extern void set_cmdline(char *cmd);
61extern void input_cb(void (*proc)(void *), void *arg, int arg_len); 59extern void input_cb(void (*proc)(void *), void *arg, int arg_len);
@@ -64,8 +62,6 @@ extern void *um_kmalloc(int size);
64extern int switcheroo(int fd, int prot, void *from, void *to, int size); 62extern int switcheroo(int fd, int prot, void *from, void *to, int size);
65extern void setup_machinename(char *machine_out); 63extern void setup_machinename(char *machine_out);
66extern void setup_hostinfo(void); 64extern void setup_hostinfo(void);
67extern void init_new_thread_stack(void *sig_stack, void (*usr1_handler)(int));
68extern void init_new_thread_signals(int altstack);
69extern void do_exec(int old_pid, int new_pid); 65extern void do_exec(int old_pid, int new_pid);
70extern void tracer_panic(char *msg, ...); 66extern void tracer_panic(char *msg, ...);
71extern char *get_umid(int only_if_set); 67extern char *get_umid(int only_if_set);
@@ -74,16 +70,12 @@ extern int detach(int pid, int sig);
74extern int attach(int pid); 70extern int attach(int pid);
75extern void kill_child_dead(int pid); 71extern void kill_child_dead(int pid);
76extern int cont(int pid); 72extern int cont(int pid);
77extern void check_ptrace(void);
78extern void check_sigio(void); 73extern void check_sigio(void);
79extern int run_kernel_thread(int (*fn)(void *), void *arg, void **jmp_ptr);
80extern void write_sigio_workaround(void); 74extern void write_sigio_workaround(void);
81extern void arch_check_bugs(void); 75extern void arch_check_bugs(void);
82extern int cpu_feature(char *what, char *buf, int len); 76extern int cpu_feature(char *what, char *buf, int len);
83extern int arch_handle_signal(int sig, union uml_pt_regs *regs); 77extern int arch_handle_signal(int sig, union uml_pt_regs *regs);
84extern int arch_fixup(unsigned long address, void *sc_ptr); 78extern int arch_fixup(unsigned long address, void *sc_ptr);
85extern void forward_pending_sigio(int target);
86extern int can_do_skas(void);
87extern void arch_init_thread(void); 79extern void arch_init_thread(void);
88extern int setjmp_wrapper(void (*proc)(void *, void *), ...); 80extern int setjmp_wrapper(void (*proc)(void *, void *), ...);
89extern int raw(int fd); 81extern int raw(int fd);
diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile
index a8918e80df96..614b8ebeb0ed 100644
--- a/arch/um/kernel/Makefile
+++ b/arch/um/kernel/Makefile
@@ -8,25 +8,24 @@ clean-files :=
8 8
9obj-y = config.o exec_kern.o exitcode.o \ 9obj-y = config.o exec_kern.o exitcode.o \
10 helper.o init_task.o irq.o irq_user.o ksyms.o main.o mem.o mem_user.o \ 10 helper.o init_task.o irq.o irq_user.o ksyms.o main.o mem.o mem_user.o \
11 physmem.o process.o process_kern.o ptrace.o reboot.o resource.o \ 11 physmem.o process_kern.o ptrace.o reboot.o resource.o sigio_user.o \
12 sigio_user.o sigio_kern.o signal_kern.o signal_user.o smp.o \ 12 sigio_kern.o signal_kern.o signal_user.o smp.o syscall_kern.o sysrq.o \
13 syscall_kern.o sysrq.o tempfile.o time.o time_kern.o \ 13 tempfile.o time.o time_kern.o tlb.o trap_kern.o trap_user.o \
14 tlb.o trap_kern.o trap_user.o uaccess_user.o um_arch.o umid.o \ 14 uaccess_user.o um_arch.o umid.o user_util.o
15 user_util.o
16 15
17obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o 16obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o
18obj-$(CONFIG_GPROF) += gprof_syms.o 17obj-$(CONFIG_GPROF) += gprof_syms.o
19obj-$(CONFIG_GCOV) += gmon_syms.o 18obj-$(CONFIG_GCOV) += gmon_syms.o
20obj-$(CONFIG_TTY_LOG) += tty_log.o 19obj-$(CONFIG_TTY_LOG) += tty_log.o
21obj-$(CONFIG_SYSCALL_DEBUG) += syscall_user.o 20obj-$(CONFIG_SYSCALL_DEBUG) += syscall.o
22 21
23obj-$(CONFIG_MODE_TT) += tt/ 22obj-$(CONFIG_MODE_TT) += tt/
24obj-$(CONFIG_MODE_SKAS) += skas/ 23obj-$(CONFIG_MODE_SKAS) += skas/
25 24
26user-objs-$(CONFIG_TTY_LOG) += tty_log.o 25user-objs-$(CONFIG_TTY_LOG) += tty_log.o
27 26
28USER_OBJS := $(user-objs-y) config.o helper.o main.o process.o tempfile.o \ 27USER_OBJS := $(user-objs-y) config.o helper.o main.o tempfile.o time.o \
29 time.o tty_log.o umid.o user_util.o 28 tty_log.o umid.o user_util.o
30 29
31include arch/um/scripts/Makefile.rules 30include arch/um/scripts/Makefile.rules
32 31
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 9f18061ef4c9..dcd814971995 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -31,7 +31,7 @@
31#include "kern_util.h" 31#include "kern_util.h"
32#include "irq_user.h" 32#include "irq_user.h"
33#include "irq_kern.h" 33#include "irq_kern.h"
34 34#include "os.h"
35 35
36/* 36/*
37 * Generic, controller-independent functions: 37 * Generic, controller-independent functions:
@@ -168,13 +168,32 @@ void __init init_IRQ(void)
168 } 168 }
169} 169}
170 170
171/* 171int init_aio_irq(int irq, char *name, irqreturn_t (*handler)(int, void *,
172 * Overrides for Emacs so that we follow Linus's tabbing style. 172 struct pt_regs *))
173 * Emacs will notice this stuff at the end of the file and automatically 173{
174 * adjust the settings for this buffer only. This must remain at the end 174 int fds[2], err;
175 * of the file. 175
176 * --------------------------------------------------------------------------- 176 err = os_pipe(fds, 1, 1);
177 * Local variables: 177 if(err){
178 * c-file-style: "linux" 178 printk("init_aio_irq - os_pipe failed, err = %d\n", -err);
179 * End: 179 goto out;
180 */ 180 }
181
182 err = um_request_irq(irq, fds[0], IRQ_READ, handler,
183 SA_INTERRUPT | SA_SAMPLE_RANDOM, name,
184 (void *) (long) fds[0]);
185 if(err){
186 printk("init_aio_irq - : um_request_irq failed, err = %d\n",
187 err);
188 goto out_close;
189 }
190
191 err = fds[1];
192 goto out;
193
194 out_close:
195 os_close_file(fds[0]);
196 os_close_file(fds[1]);
197 out:
198 return(err);
199}
diff --git a/arch/um/kernel/ksyms.c b/arch/um/kernel/ksyms.c
index 99439fa15ef4..32d3076dd220 100644
--- a/arch/um/kernel/ksyms.c
+++ b/arch/um/kernel/ksyms.c
@@ -114,22 +114,3 @@ extern void FASTCALL( __read_lock_failed(rwlock_t *rw));
114EXPORT_SYMBOL(__read_lock_failed); 114EXPORT_SYMBOL(__read_lock_failed);
115 115
116#endif 116#endif
117
118#ifdef CONFIG_HIGHMEM
119EXPORT_SYMBOL(kmap);
120EXPORT_SYMBOL(kunmap);
121EXPORT_SYMBOL(kmap_atomic);
122EXPORT_SYMBOL(kunmap_atomic);
123EXPORT_SYMBOL(kmap_atomic_to_page);
124#endif
125
126/*
127 * Overrides for Emacs so that we follow Linus's tabbing style.
128 * Emacs will notice this stuff at the end of the file and automatically
129 * adjust the settings for this buffer only. This must remain at the end
130 * of the file.
131 * ---------------------------------------------------------------------------
132 * Local variables:
133 * c-file-style: "linux"
134 * End:
135 */
diff --git a/arch/um/kernel/main.c b/arch/um/kernel/main.c
index 1e1a87f1c510..d31027f0fe39 100644
--- a/arch/um/kernel/main.c
+++ b/arch/um/kernel/main.c
@@ -97,7 +97,7 @@ int main(int argc, char **argv, char **envp)
97 exit(1); 97 exit(1);
98 } 98 }
99 99
100#ifdef UML_CONFIG_MODE_TT 100#ifdef UML_CONFIG_CMDLINE_ON_HOST
101 /* Allocate memory for thread command lines */ 101 /* Allocate memory for thread command lines */
102 if(argc < 2 || strlen(argv[1]) < THREAD_NAME_LEN - 1){ 102 if(argc < 2 || strlen(argv[1]) < THREAD_NAME_LEN - 1){
103 103
diff --git a/arch/um/kernel/skas/Makefile b/arch/um/kernel/skas/Makefile
index d296d55ade4b..db36c7c95940 100644
--- a/arch/um/kernel/skas/Makefile
+++ b/arch/um/kernel/skas/Makefile
@@ -4,7 +4,7 @@
4# 4#
5 5
6obj-y := clone.o exec_kern.o mem.o mem_user.o mmu.o process.o process_kern.o \ 6obj-y := clone.o exec_kern.o mem.o mem_user.o mmu.o process.o process_kern.o \
7 syscall_kern.o syscall_user.o tlb.o trap_user.o uaccess.o \ 7 syscall.o tlb.o trap_user.o uaccess.o
8 8
9subdir- := util 9subdir- := util
10 10
diff --git a/arch/um/kernel/skas/include/mmu-skas.h b/arch/um/kernel/skas/include/mmu-skas.h
index 278b72f1d9ad..09536f81ee42 100644
--- a/arch/um/kernel/skas/include/mmu-skas.h
+++ b/arch/um/kernel/skas/include/mmu-skas.h
@@ -6,11 +6,15 @@
6#ifndef __SKAS_MMU_H 6#ifndef __SKAS_MMU_H
7#define __SKAS_MMU_H 7#define __SKAS_MMU_H
8 8
9#include "linux/config.h"
9#include "mm_id.h" 10#include "mm_id.h"
10 11
11struct mmu_context_skas { 12struct mmu_context_skas {
12 struct mm_id id; 13 struct mm_id id;
13 unsigned long last_page_table; 14 unsigned long last_page_table;
15#ifdef CONFIG_3_LEVEL_PGTABLES
16 unsigned long last_pmd;
17#endif
14}; 18};
15 19
16extern void switch_mm_skas(struct mm_id * mm_idp); 20extern void switch_mm_skas(struct mm_id * mm_idp);
diff --git a/arch/um/kernel/skas/include/skas.h b/arch/um/kernel/skas/include/skas.h
index d983ea842547..060934740f9f 100644
--- a/arch/um/kernel/skas/include/skas.h
+++ b/arch/um/kernel/skas/include/skas.h
@@ -24,28 +24,26 @@ extern void new_thread_proc(void *stack, void (*handler)(int sig));
24extern void remove_sigstack(void); 24extern void remove_sigstack(void);
25extern void new_thread_handler(int sig); 25extern void new_thread_handler(int sig);
26extern void handle_syscall(union uml_pt_regs *regs); 26extern void handle_syscall(union uml_pt_regs *regs);
27extern int map(struct mm_id * mm_idp, unsigned long virt, unsigned long len, 27extern int map(struct mm_id * mm_idp, unsigned long virt,
28 int r, int w, int x, int phys_fd, unsigned long long offset); 28 unsigned long len, int r, int w, int x, int phys_fd,
29extern int unmap(struct mm_id * mm_idp, void *addr, unsigned long len); 29 unsigned long long offset, int done, void **data);
30extern int unmap(struct mm_id * mm_idp, void *addr, unsigned long len,
31 int done, void **data);
30extern int protect(struct mm_id * mm_idp, unsigned long addr, 32extern int protect(struct mm_id * mm_idp, unsigned long addr,
31 unsigned long len, int r, int w, int x); 33 unsigned long len, int r, int w, int x, int done,
34 void **data);
32extern void user_signal(int sig, union uml_pt_regs *regs, int pid); 35extern void user_signal(int sig, union uml_pt_regs *regs, int pid);
33extern int new_mm(int from); 36extern int new_mm(int from, unsigned long stack);
34extern int start_userspace(unsigned long stub_stack); 37extern int start_userspace(unsigned long stub_stack);
35extern int copy_context_skas0(unsigned long stack, int pid); 38extern int copy_context_skas0(unsigned long stack, int pid);
36extern void get_skas_faultinfo(int pid, struct faultinfo * fi); 39extern void get_skas_faultinfo(int pid, struct faultinfo * fi);
37extern long execute_syscall_skas(void *r); 40extern long execute_syscall_skas(void *r);
38extern unsigned long current_stub_stack(void); 41extern unsigned long current_stub_stack(void);
42extern long run_syscall_stub(struct mm_id * mm_idp,
43 int syscall, unsigned long *args, long expected,
44 void **addr, int done);
45extern long syscall_stub_data(struct mm_id * mm_idp,
46 unsigned long *data, int data_count,
47 void **addr, void **stub_addr);
39 48
40#endif 49#endif
41
42/*
43 * Overrides for Emacs so that we follow Linus's tabbing style.
44 * Emacs will notice this stuff at the end of the file and automatically
45 * adjust the settings for this buffer only. This must remain at the end
46 * of the file.
47 * ---------------------------------------------------------------------------
48 * Local variables:
49 * c-file-style: "linux"
50 * End:
51 */
diff --git a/arch/um/kernel/skas/mem_user.c b/arch/um/kernel/skas/mem_user.c
index b0980ff3bd95..1d89640bd502 100644
--- a/arch/um/kernel/skas/mem_user.c
+++ b/arch/um/kernel/skas/mem_user.c
@@ -5,13 +5,14 @@
5 5
6#include <signal.h> 6#include <signal.h>
7#include <errno.h> 7#include <errno.h>
8#include <string.h>
8#include <sys/mman.h> 9#include <sys/mman.h>
9#include <sys/wait.h> 10#include <sys/wait.h>
10#include <asm/page.h> 11#include <asm/page.h>
11#include <asm/unistd.h> 12#include <asm/unistd.h>
12#include "mem_user.h" 13#include "mem_user.h"
13#include "mem.h" 14#include "mem.h"
14#include "mm_id.h" 15#include "skas.h"
15#include "user.h" 16#include "user.h"
16#include "os.h" 17#include "os.h"
17#include "proc_mm.h" 18#include "proc_mm.h"
@@ -23,46 +24,155 @@
23#include "uml-config.h" 24#include "uml-config.h"
24#include "sysdep/ptrace.h" 25#include "sysdep/ptrace.h"
25#include "sysdep/stub.h" 26#include "sysdep/stub.h"
26#include "skas.h"
27 27
28extern unsigned long syscall_stub, __syscall_stub_start; 28extern unsigned long batch_syscall_stub, __syscall_stub_start;
29 29
30extern void wait_stub_done(int pid, int sig, char * fname); 30extern void wait_stub_done(int pid, int sig, char * fname);
31 31
32static long run_syscall_stub(struct mm_id * mm_idp, int syscall, 32static inline unsigned long *check_init_stack(struct mm_id * mm_idp,
33 unsigned long *args) 33 unsigned long *stack)
34{
35 if(stack == NULL){
36 stack = (unsigned long *) mm_idp->stack + 2;
37 *stack = 0;
38 }
39 return stack;
40}
41
42extern int proc_mm;
43
44int single_count = 0;
45int multi_count = 0;
46int multi_op_count = 0;
47
48static long do_syscall_stub(struct mm_id *mm_idp, void **addr)
34{ 49{
50 unsigned long regs[MAX_REG_NR];
51 unsigned long *data;
52 unsigned long *syscall;
53 long ret, offset;
35 int n, pid = mm_idp->u.pid; 54 int n, pid = mm_idp->u.pid;
36 unsigned long regs[MAX_REG_NR]; 55
56 if(proc_mm)
57#warning Need to look up userspace_pid by cpu
58 pid = userspace_pid[0];
59
60 multi_count++;
37 61
38 get_safe_registers(regs); 62 get_safe_registers(regs);
39 regs[REGS_IP_INDEX] = UML_CONFIG_STUB_CODE + 63 regs[REGS_IP_INDEX] = UML_CONFIG_STUB_CODE +
40 ((unsigned long) &syscall_stub - 64 ((unsigned long) &batch_syscall_stub -
41 (unsigned long) &__syscall_stub_start); 65 (unsigned long) &__syscall_stub_start);
42 /* XXX Don't have a define for starting a syscall */ 66 n = ptrace_setregs(pid, regs);
43 regs[REGS_SYSCALL_NR] = syscall; 67 if(n < 0)
44 regs[REGS_SYSCALL_ARG1] = args[0]; 68 panic("do_syscall_stub : PTRACE_SETREGS failed, errno = %d\n",
45 regs[REGS_SYSCALL_ARG2] = args[1]; 69 n);
46 regs[REGS_SYSCALL_ARG3] = args[2]; 70
47 regs[REGS_SYSCALL_ARG4] = args[3]; 71 wait_stub_done(pid, 0, "do_syscall_stub");
48 regs[REGS_SYSCALL_ARG5] = args[4]; 72
49 regs[REGS_SYSCALL_ARG6] = args[5]; 73 /* When the stub stops, we find the following values on the
50 n = ptrace_setregs(pid, regs); 74 * beginning of the stack:
51 if(n < 0){ 75 * (long )return_value
52 printk("run_syscall_stub : PTRACE_SETREGS failed, " 76 * (long )offset to failed sycall-data (0, if no error)
53 "errno = %d\n", n); 77 */
54 return(n); 78 ret = *((unsigned long *) mm_idp->stack);
79 offset = *((unsigned long *) mm_idp->stack + 1);
80 if (offset) {
81 data = (unsigned long *)(mm_idp->stack +
82 offset - UML_CONFIG_STUB_DATA);
83 syscall = (unsigned long *)((unsigned long)data + data[0]);
84 printk("do_syscall_stub: syscall %ld failed, return value = "
85 "0x%lx, expected return value = 0x%lx\n",
86 syscall[0], ret, syscall[7]);
87 printk(" syscall parameters: "
88 "0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx\n",
89 syscall[1], syscall[2], syscall[3],
90 syscall[4], syscall[5], syscall[6]);
91 for(n = 1; n < data[0]/sizeof(long); n++) {
92 if(n == 1)
93 printk(" additional syscall data:");
94 if(n % 4 == 1)
95 printk("\n ");
96 printk(" 0x%lx", data[n]);
97 }
98 if(n > 1)
99 printk("\n");
100 }
101 else ret = 0;
102
103 *addr = check_init_stack(mm_idp, NULL);
104
105 return ret;
106}
107
108long run_syscall_stub(struct mm_id * mm_idp, int syscall,
109 unsigned long *args, long expected, void **addr,
110 int done)
111{
112 unsigned long *stack = check_init_stack(mm_idp, *addr);
113
114 if(done && *addr == NULL)
115 single_count++;
116
117 *stack += sizeof(long);
118 stack += *stack / sizeof(long);
119
120 *stack++ = syscall;
121 *stack++ = args[0];
122 *stack++ = args[1];
123 *stack++ = args[2];
124 *stack++ = args[3];
125 *stack++ = args[4];
126 *stack++ = args[5];
127 *stack++ = expected;
128 *stack = 0;
129 multi_op_count++;
130
131 if(!done && ((((unsigned long) stack) & ~PAGE_MASK) <
132 PAGE_SIZE - 10 * sizeof(long))){
133 *addr = stack;
134 return 0;
55 } 135 }
56 136
57 wait_stub_done(pid, 0, "run_syscall_stub"); 137 return do_syscall_stub(mm_idp, addr);
138}
139
140long syscall_stub_data(struct mm_id * mm_idp,
141 unsigned long *data, int data_count,
142 void **addr, void **stub_addr)
143{
144 unsigned long *stack;
145 int ret = 0;
58 146
59 return(*((unsigned long *) mm_idp->stack)); 147 /* If *addr still is uninitialized, it *must* contain NULL.
148 * Thus in this case do_syscall_stub correctly won't be called.
149 */
150 if((((unsigned long) *addr) & ~PAGE_MASK) >=
151 PAGE_SIZE - (10 + data_count) * sizeof(long)) {
152 ret = do_syscall_stub(mm_idp, addr);
153 /* in case of error, don't overwrite data on stack */
154 if(ret)
155 return ret;
156 }
157
158 stack = check_init_stack(mm_idp, *addr);
159 *addr = stack;
160
161 *stack = data_count * sizeof(long);
162
163 memcpy(stack + 1, data, data_count * sizeof(long));
164
165 *stub_addr = (void *)(((unsigned long)(stack + 1) & ~PAGE_MASK) +
166 UML_CONFIG_STUB_DATA);
167
168 return 0;
60} 169}
61 170
62int map(struct mm_id *mm_idp, unsigned long virt, unsigned long len, 171int map(struct mm_id * mm_idp, unsigned long virt, unsigned long len,
63 int r, int w, int x, int phys_fd, unsigned long long offset) 172 int r, int w, int x, int phys_fd, unsigned long long offset,
173 int done, void **data)
64{ 174{
65 int prot, n; 175 int prot, ret;
66 176
67 prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) | 177 prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) |
68 (x ? PROT_EXEC : 0); 178 (x ? PROT_EXEC : 0);
@@ -70,6 +180,7 @@ int map(struct mm_id *mm_idp, unsigned long virt, unsigned long len,
70 if(proc_mm){ 180 if(proc_mm){
71 struct proc_mm_op map; 181 struct proc_mm_op map;
72 int fd = mm_idp->u.mm_fd; 182 int fd = mm_idp->u.mm_fd;
183
73 map = ((struct proc_mm_op) { .op = MM_MMAP, 184 map = ((struct proc_mm_op) { .op = MM_MMAP,
74 .u = 185 .u =
75 { .mmap = 186 { .mmap =
@@ -81,63 +192,61 @@ int map(struct mm_id *mm_idp, unsigned long virt, unsigned long len,
81 .fd = phys_fd, 192 .fd = phys_fd,
82 .offset= offset 193 .offset= offset
83 } } } ); 194 } } } );
84 n = os_write_file(fd, &map, sizeof(map)); 195 ret = os_write_file(fd, &map, sizeof(map));
85 if(n != sizeof(map)) 196 if(ret != sizeof(map))
86 printk("map : /proc/mm map failed, err = %d\n", -n); 197 printk("map : /proc/mm map failed, err = %d\n", -ret);
198 else ret = 0;
87 } 199 }
88 else { 200 else {
89 long res;
90 unsigned long args[] = { virt, len, prot, 201 unsigned long args[] = { virt, len, prot,
91 MAP_SHARED | MAP_FIXED, phys_fd, 202 MAP_SHARED | MAP_FIXED, phys_fd,
92 MMAP_OFFSET(offset) }; 203 MMAP_OFFSET(offset) };
93 204
94 res = run_syscall_stub(mm_idp, STUB_MMAP_NR, args); 205 ret = run_syscall_stub(mm_idp, STUB_MMAP_NR, args, virt,
95 if((void *) res == MAP_FAILED) 206 data, done);
96 printk("mmap stub failed, errno = %d\n", res);
97 } 207 }
98 208
99 return 0; 209 return ret;
100} 210}
101 211
102int unmap(struct mm_id *mm_idp, void *addr, unsigned long len) 212int unmap(struct mm_id * mm_idp, void *addr, unsigned long len, int done,
213 void **data)
103{ 214{
104 int n; 215 int ret;
105 216
106 if(proc_mm){ 217 if(proc_mm){
107 struct proc_mm_op unmap; 218 struct proc_mm_op unmap;
108 int fd = mm_idp->u.mm_fd; 219 int fd = mm_idp->u.mm_fd;
220
109 unmap = ((struct proc_mm_op) { .op = MM_MUNMAP, 221 unmap = ((struct proc_mm_op) { .op = MM_MUNMAP,
110 .u = 222 .u =
111 { .munmap = 223 { .munmap =
112 { .addr = 224 { .addr =
113 (unsigned long) addr, 225 (unsigned long) addr,
114 .len = len } } } ); 226 .len = len } } } );
115 n = os_write_file(fd, &unmap, sizeof(unmap)); 227 ret = os_write_file(fd, &unmap, sizeof(unmap));
116 if(n != sizeof(unmap)) { 228 if(ret != sizeof(unmap))
117 if(n < 0) 229 printk("unmap - proc_mm write returned %d\n", ret);
118 return(n); 230 else ret = 0;
119 else if(n > 0)
120 return(-EIO);
121 }
122 } 231 }
123 else { 232 else {
124 int res;
125 unsigned long args[] = { (unsigned long) addr, len, 0, 0, 0, 233 unsigned long args[] = { (unsigned long) addr, len, 0, 0, 0,
126 0 }; 234 0 };
127 235
128 res = run_syscall_stub(mm_idp, __NR_munmap, args); 236 ret = run_syscall_stub(mm_idp, __NR_munmap, args, 0,
129 if(res < 0) 237 data, done);
130 printk("munmap stub failed, errno = %d\n", res); 238 if(ret < 0)
239 printk("munmap stub failed, errno = %d\n", ret);
131 } 240 }
132 241
133 return(0); 242 return ret;
134} 243}
135 244
136int protect(struct mm_id *mm_idp, unsigned long addr, unsigned long len, 245int protect(struct mm_id * mm_idp, unsigned long addr, unsigned long len,
137 int r, int w, int x) 246 int r, int w, int x, int done, void **data)
138{ 247{
139 struct proc_mm_op protect; 248 struct proc_mm_op protect;
140 int prot, n; 249 int prot, ret;
141 250
142 prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) | 251 prot = (r ? PROT_READ : 0) | (w ? PROT_WRITE : 0) |
143 (x ? PROT_EXEC : 0); 252 (x ? PROT_EXEC : 0);
@@ -152,20 +261,19 @@ int protect(struct mm_id *mm_idp, unsigned long addr, unsigned long len,
152 .len = len, 261 .len = len,
153 .prot = prot } } } ); 262 .prot = prot } } } );
154 263
155 n = os_write_file(fd, &protect, sizeof(protect)); 264 ret = os_write_file(fd, &protect, sizeof(protect));
156 if(n != sizeof(protect)) 265 if(ret != sizeof(protect))
157 panic("protect failed, err = %d", -n); 266 printk("protect failed, err = %d", -ret);
267 else ret = 0;
158 } 268 }
159 else { 269 else {
160 int res;
161 unsigned long args[] = { addr, len, prot, 0, 0, 0 }; 270 unsigned long args[] = { addr, len, prot, 0, 0, 0 };
162 271
163 res = run_syscall_stub(mm_idp, __NR_mprotect, args); 272 ret = run_syscall_stub(mm_idp, __NR_mprotect, args, 0,
164 if(res < 0) 273 data, done);
165 panic("mprotect stub failed, errno = %d\n", res);
166 } 274 }
167 275
168 return(0); 276 return ret;
169} 277}
170 278
171void before_mem_skas(unsigned long unused) 279void before_mem_skas(unsigned long unused)
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index d232daa42c31..240143b616a2 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -56,6 +56,9 @@ static int init_stub_pte(struct mm_struct *mm, unsigned long proc,
56 */ 56 */
57 57
58 mm->context.skas.last_page_table = pmd_page_kernel(*pmd); 58 mm->context.skas.last_page_table = pmd_page_kernel(*pmd);
59#ifdef CONFIG_3_LEVEL_PGTABLES
60 mm->context.skas.last_pmd = (unsigned long) __va(pud_val(*pud));
61#endif
59 62
60 *pte = mk_pte(virt_to_page(kernel), __pgprot(_PAGE_PRESENT)); 63 *pte = mk_pte(virt_to_page(kernel), __pgprot(_PAGE_PRESENT));
61 *pte = pte_mkexec(*pte); 64 *pte = pte_mkexec(*pte);
@@ -77,23 +80,14 @@ int init_new_context_skas(struct task_struct *task, struct mm_struct *mm)
77 struct mm_struct *cur_mm = current->mm; 80 struct mm_struct *cur_mm = current->mm;
78 struct mm_id *cur_mm_id = &cur_mm->context.skas.id; 81 struct mm_id *cur_mm_id = &cur_mm->context.skas.id;
79 struct mm_id *mm_id = &mm->context.skas.id; 82 struct mm_id *mm_id = &mm->context.skas.id;
80 unsigned long stack; 83 unsigned long stack = 0;
81 int from, ret; 84 int from, ret = -ENOMEM;
82 85
83 if(proc_mm){ 86 if(!proc_mm || !ptrace_faultinfo){
84 if((cur_mm != NULL) && (cur_mm != &init_mm)) 87 stack = get_zeroed_page(GFP_KERNEL);
85 from = cur_mm->context.skas.id.u.mm_fd; 88 if(stack == 0)
86 else from = -1; 89 goto out;
87 90
88 ret = new_mm(from);
89 if(ret < 0){
90 printk("init_new_context_skas - new_mm failed, "
91 "errno = %d\n", ret);
92 return ret;
93 }
94 mm_id->u.mm_fd = ret;
95 }
96 else {
97 /* This zeros the entry that pgd_alloc didn't, needed since 91 /* This zeros the entry that pgd_alloc didn't, needed since
98 * we are about to reinitialize it, and want mm.nr_ptes to 92 * we are about to reinitialize it, and want mm.nr_ptes to
99 * be accurate. 93 * be accurate.
@@ -103,20 +97,30 @@ int init_new_context_skas(struct task_struct *task, struct mm_struct *mm)
103 ret = init_stub_pte(mm, CONFIG_STUB_CODE, 97 ret = init_stub_pte(mm, CONFIG_STUB_CODE,
104 (unsigned long) &__syscall_stub_start); 98 (unsigned long) &__syscall_stub_start);
105 if(ret) 99 if(ret)
106 goto out; 100 goto out_free;
107
108 ret = -ENOMEM;
109 stack = get_zeroed_page(GFP_KERNEL);
110 if(stack == 0)
111 goto out;
112 mm_id->stack = stack;
113 101
114 ret = init_stub_pte(mm, CONFIG_STUB_DATA, stack); 102 ret = init_stub_pte(mm, CONFIG_STUB_DATA, stack);
115 if(ret) 103 if(ret)
116 goto out_free; 104 goto out_free;
117 105
118 mm->nr_ptes--; 106 mm->nr_ptes--;
107 }
108 mm_id->stack = stack;
119 109
110 if(proc_mm){
111 if((cur_mm != NULL) && (cur_mm != &init_mm))
112 from = cur_mm_id->u.mm_fd;
113 else from = -1;
114
115 ret = new_mm(from, stack);
116 if(ret < 0){
117 printk("init_new_context_skas - new_mm failed, "
118 "errno = %d\n", ret);
119 goto out_free;
120 }
121 mm_id->u.mm_fd = ret;
122 }
123 else {
120 if((cur_mm != NULL) && (cur_mm != &init_mm)) 124 if((cur_mm != NULL) && (cur_mm != &init_mm))
121 mm_id->u.pid = copy_context_skas0(stack, 125 mm_id->u.pid = copy_context_skas0(stack,
122 cur_mm_id->u.pid); 126 cur_mm_id->u.pid);
@@ -126,7 +130,8 @@ int init_new_context_skas(struct task_struct *task, struct mm_struct *mm)
126 return 0; 130 return 0;
127 131
128 out_free: 132 out_free:
129 free_page(mm_id->stack); 133 if(mm_id->stack != 0)
134 free_page(mm_id->stack);
130 out: 135 out:
131 return ret; 136 return ret;
132} 137}
@@ -137,9 +142,15 @@ void destroy_context_skas(struct mm_struct *mm)
137 142
138 if(proc_mm) 143 if(proc_mm)
139 os_close_file(mmu->id.u.mm_fd); 144 os_close_file(mmu->id.u.mm_fd);
140 else { 145 else
141 os_kill_ptraced_process(mmu->id.u.pid, 1); 146 os_kill_ptraced_process(mmu->id.u.pid, 1);
147
148 if(!proc_mm || !ptrace_faultinfo){
142 free_page(mmu->id.stack); 149 free_page(mmu->id.stack);
143 free_page(mmu->last_page_table); 150 pte_free_kernel((pte_t *) mmu->last_page_table);
151 dec_page_state(nr_page_table_pages);
152#ifdef CONFIG_3_LEVEL_PGTABLES
153 pmd_free((pmd_t *) mmu->last_pmd);
154#endif
144 } 155 }
145} 156}
diff --git a/arch/um/kernel/skas/process.c b/arch/um/kernel/skas/process.c
index f228f8b54194..5cd0e9929789 100644
--- a/arch/um/kernel/skas/process.c
+++ b/arch/um/kernel/skas/process.c
@@ -138,6 +138,8 @@ static void handle_trap(int pid, union uml_pt_regs *regs, int local_using_sysemu
138} 138}
139 139
140extern int __syscall_stub_start; 140extern int __syscall_stub_start;
141int stub_code_fd = -1;
142__u64 stub_code_offset;
141 143
142static int userspace_tramp(void *stack) 144static int userspace_tramp(void *stack)
143{ 145{
@@ -152,31 +154,31 @@ static int userspace_tramp(void *stack)
152 /* This has a pte, but it can't be mapped in with the usual 154 /* This has a pte, but it can't be mapped in with the usual
153 * tlb_flush mechanism because this is part of that mechanism 155 * tlb_flush mechanism because this is part of that mechanism
154 */ 156 */
155 int fd;
156 __u64 offset;
157
158 fd = phys_mapping(to_phys(&__syscall_stub_start), &offset);
159 addr = mmap64((void *) UML_CONFIG_STUB_CODE, page_size(), 157 addr = mmap64((void *) UML_CONFIG_STUB_CODE, page_size(),
160 PROT_EXEC, MAP_FIXED | MAP_PRIVATE, fd, offset); 158 PROT_EXEC, MAP_FIXED | MAP_PRIVATE,
159 stub_code_fd, stub_code_offset);
161 if(addr == MAP_FAILED){ 160 if(addr == MAP_FAILED){
162 printk("mapping mmap stub failed, errno = %d\n", 161 printk("mapping stub code failed, errno = %d\n",
163 errno); 162 errno);
164 exit(1); 163 exit(1);
165 } 164 }
166 165
167 if(stack != NULL){ 166 if(stack != NULL){
167 int fd;
168 __u64 offset;
169
168 fd = phys_mapping(to_phys(stack), &offset); 170 fd = phys_mapping(to_phys(stack), &offset);
169 addr = mmap((void *) UML_CONFIG_STUB_DATA, page_size(), 171 addr = mmap((void *) UML_CONFIG_STUB_DATA, page_size(),
170 PROT_READ | PROT_WRITE, 172 PROT_READ | PROT_WRITE,
171 MAP_FIXED | MAP_SHARED, fd, offset); 173 MAP_FIXED | MAP_SHARED, fd, offset);
172 if(addr == MAP_FAILED){ 174 if(addr == MAP_FAILED){
173 printk("mapping segfault stack failed, " 175 printk("mapping stub stack failed, "
174 "errno = %d\n", errno); 176 "errno = %d\n", errno);
175 exit(1); 177 exit(1);
176 } 178 }
177 } 179 }
178 } 180 }
179 if(!ptrace_faultinfo && (stack != NULL)){ 181 if(!ptrace_faultinfo){
180 unsigned long v = UML_CONFIG_STUB_CODE + 182 unsigned long v = UML_CONFIG_STUB_CODE +
181 (unsigned long) stub_segv_handler - 183 (unsigned long) stub_segv_handler -
182 (unsigned long) &__syscall_stub_start; 184 (unsigned long) &__syscall_stub_start;
@@ -202,6 +204,10 @@ int start_userspace(unsigned long stub_stack)
202 unsigned long sp; 204 unsigned long sp;
203 int pid, status, n, flags; 205 int pid, status, n, flags;
204 206
207 if ( stub_code_fd == -1 )
208 stub_code_fd = phys_mapping(to_phys(&__syscall_stub_start),
209 &stub_code_offset);
210
205 stack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC, 211 stack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC,
206 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); 212 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
207 if(stack == MAP_FAILED) 213 if(stack == MAP_FAILED)
@@ -363,6 +369,53 @@ int copy_context_skas0(unsigned long new_stack, int pid)
363 return pid; 369 return pid;
364} 370}
365 371
372/*
373 * This is used only, if proc_mm is available, while PTRACE_FAULTINFO
374 * isn't. Opening /proc/mm creates a new mm_context, which lacks the stub-pages
375 * Thus, we map them using /proc/mm-fd
376 */
377void map_stub_pages(int fd, unsigned long code,
378 unsigned long data, unsigned long stack)
379{
380 struct proc_mm_op mmop;
381 int n;
382
383 mmop = ((struct proc_mm_op) { .op = MM_MMAP,
384 .u =
385 { .mmap =
386 { .addr = code,
387 .len = PAGE_SIZE,
388 .prot = PROT_EXEC,
389 .flags = MAP_FIXED | MAP_PRIVATE,
390 .fd = stub_code_fd,
391 .offset = stub_code_offset
392 } } });
393 n = os_write_file(fd, &mmop, sizeof(mmop));
394 if(n != sizeof(mmop))
395 panic("map_stub_pages : /proc/mm map for code failed, "
396 "err = %d\n", -n);
397
398 if ( stack ) {
399 __u64 map_offset;
400 int map_fd = phys_mapping(to_phys((void *)stack), &map_offset);
401 mmop = ((struct proc_mm_op)
402 { .op = MM_MMAP,
403 .u =
404 { .mmap =
405 { .addr = data,
406 .len = PAGE_SIZE,
407 .prot = PROT_READ | PROT_WRITE,
408 .flags = MAP_FIXED | MAP_SHARED,
409 .fd = map_fd,
410 .offset = map_offset
411 } } });
412 n = os_write_file(fd, &mmop, sizeof(mmop));
413 if(n != sizeof(mmop))
414 panic("map_stub_pages : /proc/mm map for data failed, "
415 "err = %d\n", -n);
416 }
417}
418
366void new_thread(void *stack, void **switch_buf_ptr, void **fork_buf_ptr, 419void new_thread(void *stack, void **switch_buf_ptr, void **fork_buf_ptr,
367 void (*handler)(int)) 420 void (*handler)(int))
368{ 421{
diff --git a/arch/um/kernel/skas/process_kern.c b/arch/um/kernel/skas/process_kern.c
index cbabab104ac3..3d1b227226e6 100644
--- a/arch/um/kernel/skas/process_kern.c
+++ b/arch/um/kernel/skas/process_kern.c
@@ -129,7 +129,9 @@ int copy_thread_skas(int nr, unsigned long clone_flags, unsigned long sp,
129 return(0); 129 return(0);
130} 130}
131 131
132int new_mm(int from) 132extern void map_stub_pages(int fd, unsigned long code,
133 unsigned long data, unsigned long stack);
134int new_mm(int from, unsigned long stack)
133{ 135{
134 struct proc_mm_op copy; 136 struct proc_mm_op copy;
135 int n, fd; 137 int n, fd;
@@ -148,6 +150,9 @@ int new_mm(int from)
148 "err = %d\n", -n); 150 "err = %d\n", -n);
149 } 151 }
150 152
153 if(!ptrace_faultinfo)
154 map_stub_pages(fd, CONFIG_STUB_CODE, CONFIG_STUB_DATA, stack);
155
151 return(fd); 156 return(fd);
152} 157}
153 158
diff --git a/arch/um/kernel/skas/syscall.c b/arch/um/kernel/skas/syscall.c
new file mode 100644
index 000000000000..51fb94076fcf
--- /dev/null
+++ b/arch/um/kernel/skas/syscall.c
@@ -0,0 +1,50 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include "linux/sys.h"
7#include "linux/ptrace.h"
8#include "asm/errno.h"
9#include "asm/unistd.h"
10#include "asm/ptrace.h"
11#include "asm/current.h"
12#include "sysdep/syscalls.h"
13#include "kern_util.h"
14#include "syscall.h"
15
16void handle_syscall(union uml_pt_regs *r)
17{
18 struct pt_regs *regs = container_of(r, struct pt_regs, regs);
19 long result;
20 int syscall;
21#ifdef UML_CONFIG_SYSCALL_DEBUG
22 int index;
23
24 index = record_syscall_start(UPT_SYSCALL_NR(r));
25#endif
26 syscall_trace(r, 0);
27
28 current->thread.nsyscalls++;
29 nsyscalls++;
30
31 /* This should go in the declaration of syscall, but when I do that,
32 * strace -f -c bash -c 'ls ; ls' breaks, sometimes not tracing
33 * children at all, sometimes hanging when bash doesn't see the first
34 * ls exit.
35 * The assembly looks functionally the same to me. This is
36 * gcc version 4.0.1 20050727 (Red Hat 4.0.1-5)
37 * in case it's a compiler bug.
38 */
39 syscall = UPT_SYSCALL_NR(r);
40 if((syscall >= NR_syscalls) || (syscall < 0))
41 result = -ENOSYS;
42 else result = EXECUTE_SYSCALL(syscall, regs);
43
44 REGS_SET_SYSCALL_RETURN(r->skas.regs, result);
45
46 syscall_trace(r, 1);
47#ifdef UML_CONFIG_SYSCALL_DEBUG
48 record_syscall_end(index, result);
49#endif
50}
diff --git a/arch/um/kernel/skas/syscall_kern.c b/arch/um/kernel/skas/syscall_kern.c
deleted file mode 100644
index bdf040ce5b8e..000000000000
--- a/arch/um/kernel/skas/syscall_kern.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) 2002 - 2003 Jeff Dike (jdike@addtoit.com)
3 * Licensed under the GPL
4 */
5
6#include "linux/sys.h"
7#include "linux/ptrace.h"
8#include "asm/errno.h"
9#include "asm/unistd.h"
10#include "asm/ptrace.h"
11#include "asm/current.h"
12#include "sysdep/syscalls.h"
13#include "kern_util.h"
14
15extern syscall_handler_t *sys_call_table[];
16
17long execute_syscall_skas(void *r)
18{
19 struct pt_regs *regs = r;
20 long res;
21 int syscall;
22
23 current->thread.nsyscalls++;
24 nsyscalls++;
25 syscall = UPT_SYSCALL_NR(&regs->regs);
26
27 if((syscall >= NR_syscalls) || (syscall < 0))
28 res = -ENOSYS;
29 else res = EXECUTE_SYSCALL(syscall, regs);
30
31 return(res);
32}
33
34/*
35 * Overrides for Emacs so that we follow Linus's tabbing style.
36 * Emacs will notice this stuff at the end of the file and automatically
37 * adjust the settings for this buffer only. This must remain at the end
38 * of the file.
39 * ---------------------------------------------------------------------------
40 * Local variables:
41 * c-file-style: "linux"
42 * End:
43 */
diff --git a/arch/um/kernel/skas/syscall_user.c b/arch/um/kernel/skas/syscall_user.c
deleted file mode 100644
index 6b0664970147..000000000000
--- a/arch/um/kernel/skas/syscall_user.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include <stdlib.h>
7#include <signal.h>
8#include "kern_util.h"
9#include "uml-config.h"
10#include "syscall_user.h"
11#include "sysdep/ptrace.h"
12#include "sysdep/sigcontext.h"
13#include "skas.h"
14
15void handle_syscall(union uml_pt_regs *regs)
16{
17 long result;
18#ifdef UML_CONFIG_SYSCALL_DEBUG
19 int index;
20
21 index = record_syscall_start(UPT_SYSCALL_NR(regs));
22#endif
23
24 syscall_trace(regs, 0);
25 result = execute_syscall_skas(regs);
26
27 REGS_SET_SYSCALL_RETURN(regs->skas.regs, result);
28
29 syscall_trace(regs, 1);
30#ifdef UML_CONFIG_SYSCALL_DEBUG
31 record_syscall_end(index, result);
32#endif
33}
34
35/*
36 * Overrides for Emacs so that we follow Linus's tabbing style.
37 * Emacs will notice this stuff at the end of the file and automatically
38 * adjust the settings for this buffer only. This must remain at the end
39 * of the file.
40 * ---------------------------------------------------------------------------
41 * Local variables:
42 * c-file-style: "linux"
43 * End:
44 */
diff --git a/arch/um/kernel/skas/tlb.c b/arch/um/kernel/skas/tlb.c
index 6230999c672c..6e84963dfc29 100644
--- a/arch/um/kernel/skas/tlb.c
+++ b/arch/um/kernel/skas/tlb.c
@@ -18,33 +18,39 @@
18#include "os.h" 18#include "os.h"
19#include "tlb.h" 19#include "tlb.h"
20 20
21static void do_ops(union mm_context *mmu, struct host_vm_op *ops, int last) 21static int do_ops(union mm_context *mmu, struct host_vm_op *ops, int last,
22 int finished, void **flush)
22{ 23{
23 struct host_vm_op *op; 24 struct host_vm_op *op;
24 int i; 25 int i, ret = 0;
25 26
26 for(i = 0; i <= last; i++){ 27 for(i = 0; i <= last && !ret; i++){
27 op = &ops[i]; 28 op = &ops[i];
28 switch(op->type){ 29 switch(op->type){
29 case MMAP: 30 case MMAP:
30 map(&mmu->skas.id, op->u.mmap.addr, op->u.mmap.len, 31 ret = map(&mmu->skas.id, op->u.mmap.addr,
31 op->u.mmap.r, op->u.mmap.w, op->u.mmap.x, 32 op->u.mmap.len, op->u.mmap.r, op->u.mmap.w,
32 op->u.mmap.fd, op->u.mmap.offset); 33 op->u.mmap.x, op->u.mmap.fd,
34 op->u.mmap.offset, finished, flush);
33 break; 35 break;
34 case MUNMAP: 36 case MUNMAP:
35 unmap(&mmu->skas.id, (void *) op->u.munmap.addr, 37 ret = unmap(&mmu->skas.id,
36 op->u.munmap.len); 38 (void *) op->u.munmap.addr,
39 op->u.munmap.len, finished, flush);
37 break; 40 break;
38 case MPROTECT: 41 case MPROTECT:
39 protect(&mmu->skas.id, op->u.mprotect.addr, 42 ret = protect(&mmu->skas.id, op->u.mprotect.addr,
40 op->u.mprotect.len, op->u.mprotect.r, 43 op->u.mprotect.len, op->u.mprotect.r,
41 op->u.mprotect.w, op->u.mprotect.x); 44 op->u.mprotect.w, op->u.mprotect.x,
45 finished, flush);
42 break; 46 break;
43 default: 47 default:
44 printk("Unknown op type %d in do_ops\n", op->type); 48 printk("Unknown op type %d in do_ops\n", op->type);
45 break; 49 break;
46 } 50 }
47 } 51 }
52
53 return ret;
48} 54}
49 55
50extern int proc_mm; 56extern int proc_mm;
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
new file mode 100644
index 000000000000..1429c131879d
--- /dev/null
+++ b/arch/um/kernel/syscall.c
@@ -0,0 +1,36 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include "kern_util.h"
7#include "syscall.h"
8#include "os.h"
9
10struct {
11 int syscall;
12 int pid;
13 long result;
14 unsigned long long start;
15 unsigned long long end;
16} syscall_record[1024];
17
18int record_syscall_start(int syscall)
19{
20 int max, index;
21
22 max = sizeof(syscall_record)/sizeof(syscall_record[0]);
23 index = next_syscall_index(max);
24
25 syscall_record[index].syscall = syscall;
26 syscall_record[index].pid = current_pid();
27 syscall_record[index].result = 0xdeadbeef;
28 syscall_record[index].start = os_usecs();
29 return(index);
30}
31
32void record_syscall_end(int index, long result)
33{
34 syscall_record[index].result = result;
35 syscall_record[index].end = os_usecs();
36}
diff --git a/arch/um/kernel/syscall_user.c b/arch/um/kernel/syscall_user.c
deleted file mode 100644
index 01b711e00a85..000000000000
--- a/arch/um/kernel/syscall_user.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include <stdlib.h>
7#include <sys/time.h>
8#include "kern_util.h"
9#include "syscall_user.h"
10
11struct {
12 int syscall;
13 int pid;
14 long result;
15 struct timeval start;
16 struct timeval end;
17} syscall_record[1024];
18
19int record_syscall_start(int syscall)
20{
21 int max, index;
22
23 max = sizeof(syscall_record)/sizeof(syscall_record[0]);
24 index = next_syscall_index(max);
25
26 syscall_record[index].syscall = syscall;
27 syscall_record[index].pid = current_pid();
28 syscall_record[index].result = 0xdeadbeef;
29 gettimeofday(&syscall_record[index].start, NULL);
30 return(index);
31}
32
33void record_syscall_end(int index, long result)
34{
35 syscall_record[index].result = result;
36 gettimeofday(&syscall_record[index].end, NULL);
37}
38
39/*
40 * Overrides for Emacs so that we follow Linus's tabbing style.
41 * Emacs will notice this stuff at the end of the file and automatically
42 * adjust the settings for this buffer only. This must remain at the end
43 * of the file.
44 * ---------------------------------------------------------------------------
45 * Local variables:
46 * c-file-style: "linux"
47 * End:
48 */
diff --git a/arch/um/kernel/tlb.c b/arch/um/kernel/tlb.c
index 83ec8d4747fd..80ed6188e8a2 100644
--- a/arch/um/kernel/tlb.c
+++ b/arch/um/kernel/tlb.c
@@ -15,12 +15,118 @@
15#include "mem_user.h" 15#include "mem_user.h"
16#include "os.h" 16#include "os.h"
17 17
18static int add_mmap(unsigned long virt, unsigned long phys, unsigned long len,
19 int r, int w, int x, struct host_vm_op *ops, int *index,
20 int last_filled, union mm_context *mmu, void **flush,
21 int (*do_ops)(union mm_context *, struct host_vm_op *,
22 int, int, void **))
23{
24 __u64 offset;
25 struct host_vm_op *last;
26 int fd, ret = 0;
27
28 fd = phys_mapping(phys, &offset);
29 if(*index != -1){
30 last = &ops[*index];
31 if((last->type == MMAP) &&
32 (last->u.mmap.addr + last->u.mmap.len == virt) &&
33 (last->u.mmap.r == r) && (last->u.mmap.w == w) &&
34 (last->u.mmap.x == x) && (last->u.mmap.fd == fd) &&
35 (last->u.mmap.offset + last->u.mmap.len == offset)){
36 last->u.mmap.len += len;
37 return 0;
38 }
39 }
40
41 if(*index == last_filled){
42 ret = (*do_ops)(mmu, ops, last_filled, 0, flush);
43 *index = -1;
44 }
45
46 ops[++*index] = ((struct host_vm_op) { .type = MMAP,
47 .u = { .mmap = {
48 .addr = virt,
49 .len = len,
50 .r = r,
51 .w = w,
52 .x = x,
53 .fd = fd,
54 .offset = offset }
55 } });
56 return ret;
57}
58
59static int add_munmap(unsigned long addr, unsigned long len,
60 struct host_vm_op *ops, int *index, int last_filled,
61 union mm_context *mmu, void **flush,
62 int (*do_ops)(union mm_context *, struct host_vm_op *,
63 int, int, void **))
64{
65 struct host_vm_op *last;
66 int ret = 0;
67
68 if(*index != -1){
69 last = &ops[*index];
70 if((last->type == MUNMAP) &&
71 (last->u.munmap.addr + last->u.mmap.len == addr)){
72 last->u.munmap.len += len;
73 return 0;
74 }
75 }
76
77 if(*index == last_filled){
78 ret = (*do_ops)(mmu, ops, last_filled, 0, flush);
79 *index = -1;
80 }
81
82 ops[++*index] = ((struct host_vm_op) { .type = MUNMAP,
83 .u = { .munmap = {
84 .addr = addr,
85 .len = len } } });
86 return ret;
87}
88
89static int add_mprotect(unsigned long addr, unsigned long len, int r, int w,
90 int x, struct host_vm_op *ops, int *index,
91 int last_filled, union mm_context *mmu, void **flush,
92 int (*do_ops)(union mm_context *, struct host_vm_op *,
93 int, int, void **))
94{
95 struct host_vm_op *last;
96 int ret = 0;
97
98 if(*index != -1){
99 last = &ops[*index];
100 if((last->type == MPROTECT) &&
101 (last->u.mprotect.addr + last->u.mprotect.len == addr) &&
102 (last->u.mprotect.r == r) && (last->u.mprotect.w == w) &&
103 (last->u.mprotect.x == x)){
104 last->u.mprotect.len += len;
105 return 0;
106 }
107 }
108
109 if(*index == last_filled){
110 ret = (*do_ops)(mmu, ops, last_filled, 0, flush);
111 *index = -1;
112 }
113
114 ops[++*index] = ((struct host_vm_op) { .type = MPROTECT,
115 .u = { .mprotect = {
116 .addr = addr,
117 .len = len,
118 .r = r,
119 .w = w,
120 .x = x } } });
121 return ret;
122}
123
18#define ADD_ROUND(n, inc) (((n) + (inc)) & ~((inc) - 1)) 124#define ADD_ROUND(n, inc) (((n) + (inc)) & ~((inc) - 1))
19 125
20void fix_range_common(struct mm_struct *mm, unsigned long start_addr, 126void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
21 unsigned long end_addr, int force, 127 unsigned long end_addr, int force,
22 void (*do_ops)(union mm_context *, struct host_vm_op *, 128 int (*do_ops)(union mm_context *, struct host_vm_op *,
23 int)) 129 int, int, void **))
24{ 130{
25 pgd_t *npgd; 131 pgd_t *npgd;
26 pud_t *npud; 132 pud_t *npud;
@@ -29,21 +135,24 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
29 union mm_context *mmu = &mm->context; 135 union mm_context *mmu = &mm->context;
30 unsigned long addr, end; 136 unsigned long addr, end;
31 int r, w, x; 137 int r, w, x;
32 struct host_vm_op ops[16]; 138 struct host_vm_op ops[1];
139 void *flush = NULL;
33 int op_index = -1, last_op = sizeof(ops) / sizeof(ops[0]) - 1; 140 int op_index = -1, last_op = sizeof(ops) / sizeof(ops[0]) - 1;
141 int ret = 0;
34 142
35 if(mm == NULL) return; 143 if(mm == NULL) return;
36 144
37 for(addr = start_addr; addr < end_addr;){ 145 ops[0].type = NONE;
146 for(addr = start_addr; addr < end_addr && !ret;){
38 npgd = pgd_offset(mm, addr); 147 npgd = pgd_offset(mm, addr);
39 if(!pgd_present(*npgd)){ 148 if(!pgd_present(*npgd)){
40 end = ADD_ROUND(addr, PGDIR_SIZE); 149 end = ADD_ROUND(addr, PGDIR_SIZE);
41 if(end > end_addr) 150 if(end > end_addr)
42 end = end_addr; 151 end = end_addr;
43 if(force || pgd_newpage(*npgd)){ 152 if(force || pgd_newpage(*npgd)){
44 op_index = add_munmap(addr, end - addr, ops, 153 ret = add_munmap(addr, end - addr, ops,
45 op_index, last_op, mmu, 154 &op_index, last_op, mmu,
46 do_ops); 155 &flush, do_ops);
47 pgd_mkuptodate(*npgd); 156 pgd_mkuptodate(*npgd);
48 } 157 }
49 addr = end; 158 addr = end;
@@ -56,9 +165,9 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
56 if(end > end_addr) 165 if(end > end_addr)
57 end = end_addr; 166 end = end_addr;
58 if(force || pud_newpage(*npud)){ 167 if(force || pud_newpage(*npud)){
59 op_index = add_munmap(addr, end - addr, ops, 168 ret = add_munmap(addr, end - addr, ops,
60 op_index, last_op, mmu, 169 &op_index, last_op, mmu,
61 do_ops); 170 &flush, do_ops);
62 pud_mkuptodate(*npud); 171 pud_mkuptodate(*npud);
63 } 172 }
64 addr = end; 173 addr = end;
@@ -71,9 +180,9 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
71 if(end > end_addr) 180 if(end > end_addr)
72 end = end_addr; 181 end = end_addr;
73 if(force || pmd_newpage(*npmd)){ 182 if(force || pmd_newpage(*npmd)){
74 op_index = add_munmap(addr, end - addr, ops, 183 ret = add_munmap(addr, end - addr, ops,
75 op_index, last_op, mmu, 184 &op_index, last_op, mmu,
76 do_ops); 185 &flush, do_ops);
77 pmd_mkuptodate(*npmd); 186 pmd_mkuptodate(*npmd);
78 } 187 }
79 addr = end; 188 addr = end;
@@ -92,24 +201,32 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
92 } 201 }
93 if(force || pte_newpage(*npte)){ 202 if(force || pte_newpage(*npte)){
94 if(pte_present(*npte)) 203 if(pte_present(*npte))
95 op_index = add_mmap(addr, 204 ret = add_mmap(addr,
96 pte_val(*npte) & PAGE_MASK, 205 pte_val(*npte) & PAGE_MASK,
97 PAGE_SIZE, r, w, x, ops, 206 PAGE_SIZE, r, w, x, ops,
98 op_index, last_op, mmu, 207 &op_index, last_op, mmu,
99 do_ops); 208 &flush, do_ops);
100 else op_index = add_munmap(addr, PAGE_SIZE, ops, 209 else ret = add_munmap(addr, PAGE_SIZE, ops,
101 op_index, last_op, mmu, 210 &op_index, last_op, mmu,
102 do_ops); 211 &flush, do_ops);
103 } 212 }
104 else if(pte_newprot(*npte)) 213 else if(pte_newprot(*npte))
105 op_index = add_mprotect(addr, PAGE_SIZE, r, w, x, ops, 214 ret = add_mprotect(addr, PAGE_SIZE, r, w, x, ops,
106 op_index, last_op, mmu, 215 &op_index, last_op, mmu,
107 do_ops); 216 &flush, do_ops);
108 217
109 *npte = pte_mkuptodate(*npte); 218 *npte = pte_mkuptodate(*npte);
110 addr += PAGE_SIZE; 219 addr += PAGE_SIZE;
111 } 220 }
112 (*do_ops)(mmu, ops, op_index); 221
222 if(!ret)
223 ret = (*do_ops)(mmu, ops, op_index, 1, &flush);
224
225 /* This is not an else because ret is modified above */
226 if(ret) {
227 printk("fix_range_common: failed, killing current process\n");
228 force_sig(SIGKILL, current);
229 }
113} 230}
114 231
115int flush_tlb_kernel_range_common(unsigned long start, unsigned long end) 232int flush_tlb_kernel_range_common(unsigned long start, unsigned long end)
@@ -226,106 +343,6 @@ pte_t *addr_pte(struct task_struct *task, unsigned long addr)
226 return(pte_offset_map(pmd, addr)); 343 return(pte_offset_map(pmd, addr));
227} 344}
228 345
229int add_mmap(unsigned long virt, unsigned long phys, unsigned long len,
230 int r, int w, int x, struct host_vm_op *ops, int index,
231 int last_filled, union mm_context *mmu,
232 void (*do_ops)(union mm_context *, struct host_vm_op *, int))
233{
234 __u64 offset;
235 struct host_vm_op *last;
236 int fd;
237
238 fd = phys_mapping(phys, &offset);
239 if(index != -1){
240 last = &ops[index];
241 if((last->type == MMAP) &&
242 (last->u.mmap.addr + last->u.mmap.len == virt) &&
243 (last->u.mmap.r == r) && (last->u.mmap.w == w) &&
244 (last->u.mmap.x == x) && (last->u.mmap.fd == fd) &&
245 (last->u.mmap.offset + last->u.mmap.len == offset)){
246 last->u.mmap.len += len;
247 return(index);
248 }
249 }
250
251 if(index == last_filled){
252 (*do_ops)(mmu, ops, last_filled);
253 index = -1;
254 }
255
256 ops[++index] = ((struct host_vm_op) { .type = MMAP,
257 .u = { .mmap = {
258 .addr = virt,
259 .len = len,
260 .r = r,
261 .w = w,
262 .x = x,
263 .fd = fd,
264 .offset = offset }
265 } });
266 return(index);
267}
268
269int add_munmap(unsigned long addr, unsigned long len, struct host_vm_op *ops,
270 int index, int last_filled, union mm_context *mmu,
271 void (*do_ops)(union mm_context *, struct host_vm_op *, int))
272{
273 struct host_vm_op *last;
274
275 if(index != -1){
276 last = &ops[index];
277 if((last->type == MUNMAP) &&
278 (last->u.munmap.addr + last->u.mmap.len == addr)){
279 last->u.munmap.len += len;
280 return(index);
281 }
282 }
283
284 if(index == last_filled){
285 (*do_ops)(mmu, ops, last_filled);
286 index = -1;
287 }
288
289 ops[++index] = ((struct host_vm_op) { .type = MUNMAP,
290 .u = { .munmap = {
291 .addr = addr,
292 .len = len } } });
293 return(index);
294}
295
296int add_mprotect(unsigned long addr, unsigned long len, int r, int w, int x,
297 struct host_vm_op *ops, int index, int last_filled,
298 union mm_context *mmu,
299 void (*do_ops)(union mm_context *, struct host_vm_op *, int))
300{
301 struct host_vm_op *last;
302
303 if(index != -1){
304 last = &ops[index];
305 if((last->type == MPROTECT) &&
306 (last->u.mprotect.addr + last->u.mprotect.len == addr) &&
307 (last->u.mprotect.r == r) && (last->u.mprotect.w == w) &&
308 (last->u.mprotect.x == x)){
309 last->u.mprotect.len += len;
310 return(index);
311 }
312 }
313
314 if(index == last_filled){
315 (*do_ops)(mmu, ops, last_filled);
316 index = -1;
317 }
318
319 ops[++index] = ((struct host_vm_op) { .type = MPROTECT,
320 .u = { .mprotect = {
321 .addr = addr,
322 .len = len,
323 .r = r,
324 .w = w,
325 .x = x } } });
326 return(index);
327}
328
329void flush_tlb_page(struct vm_area_struct *vma, unsigned long address) 346void flush_tlb_page(struct vm_area_struct *vma, unsigned long address)
330{ 347{
331 address &= PAGE_MASK; 348 address &= PAGE_MASK;
diff --git a/arch/um/kernel/trap_kern.c b/arch/um/kernel/trap_kern.c
index c20aef120598..b5fc89fe9eab 100644
--- a/arch/um/kernel/trap_kern.c
+++ b/arch/um/kernel/trap_kern.c
@@ -26,6 +26,7 @@
26#include "mem.h" 26#include "mem.h"
27#include "mem_kern.h" 27#include "mem_kern.h"
28 28
29/* Note this is constrained to return 0, -EFAULT, -EACCESS, -ENOMEM by segv(). */
29int handle_page_fault(unsigned long address, unsigned long ip, 30int handle_page_fault(unsigned long address, unsigned long ip,
30 int is_write, int is_user, int *code_out) 31 int is_write, int is_user, int *code_out)
31{ 32{
@@ -35,7 +36,6 @@ int handle_page_fault(unsigned long address, unsigned long ip,
35 pud_t *pud; 36 pud_t *pud;
36 pmd_t *pmd; 37 pmd_t *pmd;
37 pte_t *pte; 38 pte_t *pte;
38 unsigned long page;
39 int err = -EFAULT; 39 int err = -EFAULT;
40 40
41 *code_out = SEGV_MAPERR; 41 *code_out = SEGV_MAPERR;
@@ -52,7 +52,7 @@ int handle_page_fault(unsigned long address, unsigned long ip,
52 else if(expand_stack(vma, address)) 52 else if(expand_stack(vma, address))
53 goto out; 53 goto out;
54 54
55 good_area: 55good_area:
56 *code_out = SEGV_ACCERR; 56 *code_out = SEGV_ACCERR;
57 if(is_write && !(vma->vm_flags & VM_WRITE)) 57 if(is_write && !(vma->vm_flags & VM_WRITE))
58 goto out; 58 goto out;
@@ -60,9 +60,8 @@ int handle_page_fault(unsigned long address, unsigned long ip,
60 if(!(vma->vm_flags & (VM_READ | VM_EXEC))) 60 if(!(vma->vm_flags & (VM_READ | VM_EXEC)))
61 goto out; 61 goto out;
62 62
63 page = address & PAGE_MASK;
64 do { 63 do {
65 survive: 64survive:
66 switch (handle_mm_fault(mm, vma, address, is_write)){ 65 switch (handle_mm_fault(mm, vma, address, is_write)){
67 case VM_FAULT_MINOR: 66 case VM_FAULT_MINOR:
68 current->min_flt++; 67 current->min_flt++;
@@ -79,16 +78,16 @@ int handle_page_fault(unsigned long address, unsigned long ip,
79 default: 78 default:
80 BUG(); 79 BUG();
81 } 80 }
82 pgd = pgd_offset(mm, page); 81 pgd = pgd_offset(mm, address);
83 pud = pud_offset(pgd, page); 82 pud = pud_offset(pgd, address);
84 pmd = pmd_offset(pud, page); 83 pmd = pmd_offset(pud, address);
85 pte = pte_offset_kernel(pmd, page); 84 pte = pte_offset_kernel(pmd, address);
86 } while(!pte_present(*pte)); 85 } while(!pte_present(*pte));
87 err = 0; 86 err = 0;
88 *pte = pte_mkyoung(*pte); 87 *pte = pte_mkyoung(*pte);
89 if(pte_write(*pte)) *pte = pte_mkdirty(*pte); 88 if(pte_write(*pte)) *pte = pte_mkdirty(*pte);
90 flush_tlb_page(vma, page); 89 flush_tlb_page(vma, address);
91 out: 90out:
92 up_read(&mm->mmap_sem); 91 up_read(&mm->mmap_sem);
93 return(err); 92 return(err);
94 93
@@ -144,19 +143,18 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user, void *sc)
144 panic("Kernel mode fault at addr 0x%lx, ip 0x%lx", 143 panic("Kernel mode fault at addr 0x%lx, ip 0x%lx",
145 address, ip); 144 address, ip);
146 145
147 if(err == -EACCES){ 146 if (err == -EACCES) {
148 si.si_signo = SIGBUS; 147 si.si_signo = SIGBUS;
149 si.si_errno = 0; 148 si.si_errno = 0;
150 si.si_code = BUS_ADRERR; 149 si.si_code = BUS_ADRERR;
151 si.si_addr = (void *)address; 150 si.si_addr = (void *)address;
152 current->thread.arch.faultinfo = fi; 151 current->thread.arch.faultinfo = fi;
153 force_sig_info(SIGBUS, &si, current); 152 force_sig_info(SIGBUS, &si, current);
154 } 153 } else if (err == -ENOMEM) {
155 else if(err == -ENOMEM){
156 printk("VM: killing process %s\n", current->comm); 154 printk("VM: killing process %s\n", current->comm);
157 do_exit(SIGKILL); 155 do_exit(SIGKILL);
158 } 156 } else {
159 else { 157 BUG_ON(err != -EFAULT);
160 si.si_signo = SIGSEGV; 158 si.si_signo = SIGSEGV;
161 si.si_addr = (void *) address; 159 si.si_addr = (void *) address;
162 current->thread.arch.faultinfo = fi; 160 current->thread.arch.faultinfo = fi;
@@ -200,30 +198,3 @@ void winch(int sig, union uml_pt_regs *regs)
200void trap_init(void) 198void trap_init(void)
201{ 199{
202} 200}
203
204DEFINE_SPINLOCK(trap_lock);
205
206static int trap_index = 0;
207
208int next_trap_index(int limit)
209{
210 int ret;
211
212 spin_lock(&trap_lock);
213 ret = trap_index;
214 if(++trap_index == limit)
215 trap_index = 0;
216 spin_unlock(&trap_lock);
217 return(ret);
218}
219
220/*
221 * Overrides for Emacs so that we follow Linus's tabbing style.
222 * Emacs will notice this stuff at the end of the file and automatically
223 * adjust the settings for this buffer only. This must remain at the end
224 * of the file.
225 * ---------------------------------------------------------------------------
226 * Local variables:
227 * c-file-style: "linux"
228 * End:
229 */
diff --git a/arch/um/kernel/trap_user.c b/arch/um/kernel/trap_user.c
index f825a6eda3f5..e9ccd6b8d3c7 100644
--- a/arch/um/kernel/trap_user.c
+++ b/arch/um/kernel/trap_user.c
@@ -40,35 +40,14 @@ void kill_child_dead(int pid)
40 } while(1); 40 } while(1);
41} 41}
42 42
43/* Unlocked - don't care if this is a bit off */
44int nsegfaults = 0;
45
46struct {
47 unsigned long address;
48 int is_write;
49 int pid;
50 unsigned long sp;
51 int is_user;
52} segfault_record[1024];
53
54void segv_handler(int sig, union uml_pt_regs *regs) 43void segv_handler(int sig, union uml_pt_regs *regs)
55{ 44{
56 int index, max;
57 struct faultinfo * fi = UPT_FAULTINFO(regs); 45 struct faultinfo * fi = UPT_FAULTINFO(regs);
58 46
59 if(UPT_IS_USER(regs) && !SEGV_IS_FIXABLE(fi)){ 47 if(UPT_IS_USER(regs) && !SEGV_IS_FIXABLE(fi)){
60 bad_segv(*fi, UPT_IP(regs)); 48 bad_segv(*fi, UPT_IP(regs));
61 return; 49 return;
62 } 50 }
63 max = sizeof(segfault_record)/sizeof(segfault_record[0]);
64 index = next_trap_index(max);
65
66 nsegfaults++;
67 segfault_record[index].address = FAULT_ADDRESS(*fi);
68 segfault_record[index].pid = os_getpid();
69 segfault_record[index].is_write = FAULT_WRITE(*fi);
70 segfault_record[index].sp = UPT_SP(regs);
71 segfault_record[index].is_user = UPT_IS_USER(regs);
72 segv(*fi, UPT_IP(regs), UPT_IS_USER(regs), regs); 51 segv(*fi, UPT_IP(regs), UPT_IS_USER(regs), regs);
73} 52}
74 53
diff --git a/arch/um/kernel/tt/syscall_kern.c b/arch/um/kernel/tt/syscall_kern.c
index 2650a628719e..3d29c90514cc 100644
--- a/arch/um/kernel/tt/syscall_kern.c
+++ b/arch/um/kernel/tt/syscall_kern.c
@@ -12,36 +12,41 @@
12#include "asm/uaccess.h" 12#include "asm/uaccess.h"
13#include "asm/stat.h" 13#include "asm/stat.h"
14#include "sysdep/syscalls.h" 14#include "sysdep/syscalls.h"
15#include "sysdep/sigcontext.h"
15#include "kern_util.h" 16#include "kern_util.h"
17#include "syscall.h"
16 18
17extern syscall_handler_t *sys_call_table[]; 19void syscall_handler_tt(int sig, struct pt_regs *regs)
18
19long execute_syscall_tt(void *r)
20{ 20{
21 struct pt_regs *regs = r; 21 void *sc;
22 long res; 22 long result;
23 int syscall; 23 int syscall;
24
25#ifdef CONFIG_SYSCALL_DEBUG 24#ifdef CONFIG_SYSCALL_DEBUG
25 int index;
26 index = record_syscall_start(syscall);
27#endif
28 sc = UPT_SC(&regs->regs);
29 SC_START_SYSCALL(sc);
30
31 syscall_trace(&regs->regs, 0);
32
26 current->thread.nsyscalls++; 33 current->thread.nsyscalls++;
27 nsyscalls++; 34 nsyscalls++;
28#endif
29 syscall = UPT_SYSCALL_NR(&regs->regs); 35 syscall = UPT_SYSCALL_NR(&regs->regs);
30 36
31 if((syscall >= NR_syscalls) || (syscall < 0)) 37 if((syscall >= NR_syscalls) || (syscall < 0))
32 res = -ENOSYS; 38 result = -ENOSYS;
33 else res = EXECUTE_SYSCALL(syscall, regs); 39 else result = EXECUTE_SYSCALL(syscall, regs);
34 40
35 return(res); 41 /* regs->sc may have changed while the system call ran (there may
36} 42 * have been an interrupt or segfault), so it needs to be refreshed.
43 */
44 UPT_SC(&regs->regs) = sc;
37 45
38/* 46 SC_SET_SYSCALL_RETURN(sc, result);
39 * Overrides for Emacs so that we follow Linus's tabbing style. 47
40 * Emacs will notice this stuff at the end of the file and automatically 48 syscall_trace(&regs->regs, 1);
41 * adjust the settings for this buffer only. This must remain at the end 49#ifdef CONFIG_SYSCALL_DEBUG
42 * of the file. 50 record_syscall_end(index, result);
43 * --------------------------------------------------------------------------- 51#endif
44 * Local variables: 52}
45 * c-file-style: "linux"
46 * End:
47 */
diff --git a/arch/um/kernel/tt/syscall_user.c b/arch/um/kernel/tt/syscall_user.c
index b218316cfdb2..902987bf379b 100644
--- a/arch/um/kernel/tt/syscall_user.c
+++ b/arch/um/kernel/tt/syscall_user.c
@@ -13,42 +13,9 @@
13#include "task.h" 13#include "task.h"
14#include "user_util.h" 14#include "user_util.h"
15#include "kern_util.h" 15#include "kern_util.h"
16#include "syscall_user.h" 16#include "syscall.h"
17#include "tt.h" 17#include "tt.h"
18 18
19
20void syscall_handler_tt(int sig, union uml_pt_regs *regs)
21{
22 void *sc;
23 long result;
24 int syscall;
25#ifdef UML_CONFIG_DEBUG_SYSCALL
26 int index;
27#endif
28
29 syscall = UPT_SYSCALL_NR(regs);
30 sc = UPT_SC(regs);
31 SC_START_SYSCALL(sc);
32
33#ifdef UML_CONFIG_DEBUG_SYSCALL
34 index = record_syscall_start(syscall);
35#endif
36 syscall_trace(regs, 0);
37 result = execute_syscall_tt(regs);
38
39 /* regs->sc may have changed while the system call ran (there may
40 * have been an interrupt or segfault), so it needs to be refreshed.
41 */
42 UPT_SC(regs) = sc;
43
44 SC_SET_SYSCALL_RETURN(sc, result);
45
46 syscall_trace(regs, 1);
47#ifdef UML_CONFIG_DEBUG_SYSCALL
48 record_syscall_end(index, result);
49#endif
50}
51
52void do_sigtrap(void *task) 19void do_sigtrap(void *task)
53{ 20{
54 UPT_SYSCALL_NR(TASK_REGS(task)) = -1; 21 UPT_SYSCALL_NR(TASK_REGS(task)) = -1;
diff --git a/arch/um/kernel/tt/tlb.c b/arch/um/kernel/tt/tlb.c
index 2eefb43bc9c2..f1d85dbb45b9 100644
--- a/arch/um/kernel/tt/tlb.c
+++ b/arch/um/kernel/tt/tlb.c
@@ -17,25 +17,31 @@
17#include "os.h" 17#include "os.h"
18#include "tlb.h" 18#include "tlb.h"
19 19
20static void do_ops(union mm_context *mmu, struct host_vm_op *ops, int last) 20static int do_ops(union mm_context *mmu, struct host_vm_op *ops, int last,
21 int finished, void **flush)
21{ 22{
22 struct host_vm_op *op; 23 struct host_vm_op *op;
23 int i; 24 int i, ret=0;
24 25
25 for(i = 0; i <= last; i++){ 26 for(i = 0; i <= last && !ret; i++){
26 op = &ops[i]; 27 op = &ops[i];
27 switch(op->type){ 28 switch(op->type){
28 case MMAP: 29 case MMAP:
29 os_map_memory((void *) op->u.mmap.addr, op->u.mmap.fd, 30 ret = os_map_memory((void *) op->u.mmap.addr,
30 op->u.mmap.offset, op->u.mmap.len, 31 op->u.mmap.fd, op->u.mmap.offset,
31 op->u.mmap.r, op->u.mmap.w, 32 op->u.mmap.len, op->u.mmap.r,
32 op->u.mmap.x); 33 op->u.mmap.w, op->u.mmap.x);
33 break; 34 break;
34 case MUNMAP: 35 case MUNMAP:
35 os_unmap_memory((void *) op->u.munmap.addr, 36 ret = os_unmap_memory((void *) op->u.munmap.addr,
36 op->u.munmap.len); 37 op->u.munmap.len);
37 break; 38 break;
38 case MPROTECT: 39 case MPROTECT:
40 ret = protect_memory(op->u.mprotect.addr,
41 op->u.munmap.len,
42 op->u.mprotect.r,
43 op->u.mprotect.w,
44 op->u.mprotect.x, 1);
39 protect_memory(op->u.mprotect.addr, op->u.munmap.len, 45 protect_memory(op->u.mprotect.addr, op->u.munmap.len,
40 op->u.mprotect.r, op->u.mprotect.w, 46 op->u.mprotect.r, op->u.mprotect.w,
41 op->u.mprotect.x, 1); 47 op->u.mprotect.x, 1);
@@ -45,6 +51,8 @@ static void do_ops(union mm_context *mmu, struct host_vm_op *ops, int last)
45 break; 51 break;
46 } 52 }
47 } 53 }
54
55 return ret;
48} 56}
49 57
50static void fix_range(struct mm_struct *mm, unsigned long start_addr, 58static void fix_range(struct mm_struct *mm, unsigned long start_addr,
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index ca2bb6f09a7d..09f6f7ce4695 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -126,7 +126,7 @@ unsigned long start_vm;
126unsigned long end_vm; 126unsigned long end_vm;
127int ncpus = 1; 127int ncpus = 1;
128 128
129#ifdef CONFIG_MODE_TT 129#ifdef CONFIG_CMDLINE_ON_HOST
130/* Pointer set in linux_main, the array itself is private to each thread, 130/* Pointer set in linux_main, the array itself is private to each thread,
131 * and changed at address space creation time so this poses no concurrency 131 * and changed at address space creation time so this poses no concurrency
132 * problems. 132 * problems.
@@ -141,7 +141,7 @@ long physmem_size = 32 * 1024 * 1024;
141 141
142void set_cmdline(char *cmd) 142void set_cmdline(char *cmd)
143{ 143{
144#ifdef CONFIG_MODE_TT 144#ifdef CONFIG_CMDLINE_ON_HOST
145 char *umid, *ptr; 145 char *umid, *ptr;
146 146
147 if(CHOOSE_MODE(honeypot, 0)) return; 147 if(CHOOSE_MODE(honeypot, 0)) return;
@@ -333,6 +333,7 @@ int linux_main(int argc, char **argv)
333 if(have_root == 0) 333 if(have_root == 0)
334 add_arg(DEFAULT_COMMAND_LINE); 334 add_arg(DEFAULT_COMMAND_LINE);
335 335
336 os_early_checks();
336 mode_tt = force_tt ? 1 : !can_do_skas(); 337 mode_tt = force_tt ? 1 : !can_do_skas();
337#ifndef CONFIG_MODE_TT 338#ifndef CONFIG_MODE_TT
338 if (mode_tt) { 339 if (mode_tt) {
@@ -385,7 +386,7 @@ int linux_main(int argc, char **argv)
385 386
386 setup_machinename(system_utsname.machine); 387 setup_machinename(system_utsname.machine);
387 388
388#ifdef CONFIG_MODE_TT 389#ifdef CONFIG_CMDLINE_ON_HOST
389 argv1_begin = argv[1]; 390 argv1_begin = argv[1];
390 argv1_end = &argv[1][strlen(argv[1])]; 391 argv1_end = &argv[1][strlen(argv[1])];
391#endif 392#endif
@@ -470,7 +471,6 @@ void __init setup_arch(char **cmdline_p)
470void __init check_bugs(void) 471void __init check_bugs(void)
471{ 472{
472 arch_check_bugs(); 473 arch_check_bugs();
473 check_ptrace();
474 check_sigio(); 474 check_sigio();
475 check_devanon(); 475 check_devanon();
476} 476}
diff --git a/arch/um/os-Linux/Makefile b/arch/um/os-Linux/Makefile
index 4ddf540284ce..d3c1560e3ed8 100644
--- a/arch/um/os-Linux/Makefile
+++ b/arch/um/os-Linux/Makefile
@@ -3,11 +3,16 @@
3# Licensed under the GPL 3# Licensed under the GPL
4# 4#
5 5
6obj-y = elf_aux.o file.o process.o signal.o time.o tty.o user_syms.o drivers/ \ 6obj-y = aio.o elf_aux.o file.o process.o signal.o start_up.o time.o tt.o \
7 sys-$(SUBARCH)/ 7 tty.o user_syms.o drivers/ sys-$(SUBARCH)/
8 8
9USER_OBJS := elf_aux.o file.o process.o signal.o time.o tty.o 9USER_OBJS := aio.o elf_aux.o file.o process.o signal.o start_up.o time.o tt.o \
10 tty.o
10 11
11CFLAGS_user_syms.o += -DSUBARCH_$(SUBARCH) 12CFLAGS_user_syms.o += -DSUBARCH_$(SUBARCH)
12 13
14HAVE_AIO_ABI := $(shell [ -r /usr/include/linux/aio_abi.h ] && \
15 echo -DHAVE_AIO_ABI )
16CFLAGS_aio.o += $(HAVE_AIO_ABI)
17
13include arch/um/scripts/Makefile.rules 18include arch/um/scripts/Makefile.rules
diff --git a/arch/um/os-Linux/aio.c b/arch/um/os-Linux/aio.c
new file mode 100644
index 000000000000..b04897cd995d
--- /dev/null
+++ b/arch/um/os-Linux/aio.c
@@ -0,0 +1,414 @@
1/*
2 * Copyright (C) 2004 Jeff Dike (jdike@addtoit.com)
3 * Licensed under the GPL
4 */
5
6#include <stdlib.h>
7#include <unistd.h>
8#include <signal.h>
9#include <string.h>
10#include <errno.h>
11#include <sched.h>
12#include <sys/syscall.h>
13#include "os.h"
14#include "helper.h"
15#include "aio.h"
16#include "init.h"
17#include "user.h"
18#include "mode.h"
19
20static int aio_req_fd_r = -1;
21static int aio_req_fd_w = -1;
22
23static int update_aio(struct aio_context *aio, int res)
24{
25 if(res < 0)
26 aio->len = res;
27 else if((res == 0) && (aio->type == AIO_READ)){
28 /* This is the EOF case - we have hit the end of the file
29 * and it ends in a partial block, so we fill the end of
30 * the block with zeros and claim success.
31 */
32 memset(aio->data, 0, aio->len);
33 aio->len = 0;
34 }
35 else if(res > 0){
36 aio->len -= res;
37 aio->data += res;
38 aio->offset += res;
39 return aio->len;
40 }
41
42 return 0;
43}
44
45#if defined(HAVE_AIO_ABI)
46#include <linux/aio_abi.h>
47
48/* If we have the headers, we are going to build with AIO enabled.
49 * If we don't have aio in libc, we define the necessary stubs here.
50 */
51
52#if !defined(HAVE_AIO_LIBC)
53
54static long io_setup(int n, aio_context_t *ctxp)
55{
56 return syscall(__NR_io_setup, n, ctxp);
57}
58
59static long io_submit(aio_context_t ctx, long nr, struct iocb **iocbpp)
60{
61 return syscall(__NR_io_submit, ctx, nr, iocbpp);
62}
63
64static long io_getevents(aio_context_t ctx_id, long min_nr, long nr,
65 struct io_event *events, struct timespec *timeout)
66{
67 return syscall(__NR_io_getevents, ctx_id, min_nr, nr, events, timeout);
68}
69
70#endif
71
72/* The AIO_MMAP cases force the mmapped page into memory here
73 * rather than in whatever place first touches the data. I used
74 * to do this by touching the page, but that's delicate because
75 * gcc is prone to optimizing that away. So, what's done here
76 * is we read from the descriptor from which the page was
77 * mapped. The caller is required to pass an offset which is
78 * inside the page that was mapped. Thus, when the read
79 * returns, we know that the page is in the page cache, and
80 * that it now backs the mmapped area.
81 */
82
83static int do_aio(aio_context_t ctx, struct aio_context *aio)
84{
85 struct iocb iocb, *iocbp = &iocb;
86 char c;
87 int err;
88
89 iocb = ((struct iocb) { .aio_data = (unsigned long) aio,
90 .aio_reqprio = 0,
91 .aio_fildes = aio->fd,
92 .aio_buf = (unsigned long) aio->data,
93 .aio_nbytes = aio->len,
94 .aio_offset = aio->offset,
95 .aio_reserved1 = 0,
96 .aio_reserved2 = 0,
97 .aio_reserved3 = 0 });
98
99 switch(aio->type){
100 case AIO_READ:
101 iocb.aio_lio_opcode = IOCB_CMD_PREAD;
102 break;
103 case AIO_WRITE:
104 iocb.aio_lio_opcode = IOCB_CMD_PWRITE;
105 break;
106 case AIO_MMAP:
107 iocb.aio_lio_opcode = IOCB_CMD_PREAD;
108 iocb.aio_buf = (unsigned long) &c;
109 iocb.aio_nbytes = sizeof(c);
110 break;
111 default:
112 printk("Bogus op in do_aio - %d\n", aio->type);
113 err = -EINVAL;
114 goto out;
115 }
116
117 err = io_submit(ctx, 1, &iocbp);
118 if(err > 0)
119 err = 0;
120
121 out:
122 return err;
123}
124
125static aio_context_t ctx = 0;
126
127static int aio_thread(void *arg)
128{
129 struct aio_thread_reply reply;
130 struct aio_context *aio;
131 struct io_event event;
132 int err, n;
133
134 signal(SIGWINCH, SIG_IGN);
135
136 while(1){
137 n = io_getevents(ctx, 1, 1, &event, NULL);
138 if(n < 0){
139 if(errno == EINTR)
140 continue;
141 printk("aio_thread - io_getevents failed, "
142 "errno = %d\n", errno);
143 }
144 else {
145 aio = (struct aio_context *) event.data;
146 if(update_aio(aio, event.res)){
147 do_aio(ctx, aio);
148 continue;
149 }
150
151 reply = ((struct aio_thread_reply)
152 { .data = aio,
153 .err = aio->len });
154 err = os_write_file(aio->reply_fd, &reply,
155 sizeof(reply));
156 if(err != sizeof(reply))
157 printk("aio_thread - write failed, "
158 "fd = %d, err = %d\n", aio->reply_fd,
159 -err);
160 }
161 }
162 return 0;
163}
164
165#endif
166
167static int do_not_aio(struct aio_context *aio)
168{
169 char c;
170 int err;
171
172 switch(aio->type){
173 case AIO_READ:
174 err = os_seek_file(aio->fd, aio->offset);
175 if(err)
176 goto out;
177
178 err = os_read_file(aio->fd, aio->data, aio->len);
179 break;
180 case AIO_WRITE:
181 err = os_seek_file(aio->fd, aio->offset);
182 if(err)
183 goto out;
184
185 err = os_write_file(aio->fd, aio->data, aio->len);
186 break;
187 case AIO_MMAP:
188 err = os_seek_file(aio->fd, aio->offset);
189 if(err)
190 goto out;
191
192 err = os_read_file(aio->fd, &c, sizeof(c));
193 break;
194 default:
195 printk("do_not_aio - bad request type : %d\n", aio->type);
196 err = -EINVAL;
197 break;
198 }
199
200 out:
201 return err;
202}
203
204static int not_aio_thread(void *arg)
205{
206 struct aio_context *aio;
207 struct aio_thread_reply reply;
208 int err;
209
210 signal(SIGWINCH, SIG_IGN);
211 while(1){
212 err = os_read_file(aio_req_fd_r, &aio, sizeof(aio));
213 if(err != sizeof(aio)){
214 if(err < 0)
215 printk("not_aio_thread - read failed, "
216 "fd = %d, err = %d\n", aio_req_fd_r,
217 -err);
218 else {
219 printk("not_aio_thread - short read, fd = %d, "
220 "length = %d\n", aio_req_fd_r, err);
221 }
222 continue;
223 }
224 again:
225 err = do_not_aio(aio);
226
227 if(update_aio(aio, err))
228 goto again;
229
230 reply = ((struct aio_thread_reply) { .data = aio,
231 .err = aio->len });
232 err = os_write_file(aio->reply_fd, &reply, sizeof(reply));
233 if(err != sizeof(reply))
234 printk("not_aio_thread - write failed, fd = %d, "
235 "err = %d\n", aio_req_fd_r, -err);
236 }
237}
238
239static int submit_aio_24(struct aio_context *aio)
240{
241 int err;
242
243 err = os_write_file(aio_req_fd_w, &aio, sizeof(aio));
244 if(err == sizeof(aio))
245 err = 0;
246
247 return err;
248}
249
250static int aio_pid = -1;
251static int (*submit_proc)(struct aio_context *aio);
252
253static int init_aio_24(void)
254{
255 unsigned long stack;
256 int fds[2], err;
257
258 err = os_pipe(fds, 1, 1);
259 if(err)
260 goto out;
261
262 aio_req_fd_w = fds[0];
263 aio_req_fd_r = fds[1];
264 err = run_helper_thread(not_aio_thread, NULL,
265 CLONE_FILES | CLONE_VM | SIGCHLD, &stack, 0);
266 if(err < 0)
267 goto out_close_pipe;
268
269 aio_pid = err;
270 goto out;
271
272 out_close_pipe:
273 os_close_file(fds[0]);
274 os_close_file(fds[1]);
275 aio_req_fd_w = -1;
276 aio_req_fd_r = -1;
277 out:
278#ifndef HAVE_AIO_ABI
279 printk("/usr/include/linux/aio_abi.h not present during build\n");
280#endif
281 printk("2.6 host AIO support not used - falling back to I/O "
282 "thread\n");
283
284 submit_proc = submit_aio_24;
285
286 return 0;
287}
288
289#ifdef HAVE_AIO_ABI
290#define DEFAULT_24_AIO 0
291static int submit_aio_26(struct aio_context *aio)
292{
293 struct aio_thread_reply reply;
294 int err;
295
296 err = do_aio(ctx, aio);
297 if(err){
298 reply = ((struct aio_thread_reply) { .data = aio,
299 .err = err });
300 err = os_write_file(aio->reply_fd, &reply, sizeof(reply));
301 if(err != sizeof(reply))
302 printk("submit_aio_26 - write failed, "
303 "fd = %d, err = %d\n", aio->reply_fd, -err);
304 else err = 0;
305 }
306
307 return err;
308}
309
310static int init_aio_26(void)
311{
312 unsigned long stack;
313 int err;
314
315 if(io_setup(256, &ctx)){
316 printk("aio_thread failed to initialize context, err = %d\n",
317 errno);
318 return -errno;
319 }
320
321 err = run_helper_thread(aio_thread, NULL,
322 CLONE_FILES | CLONE_VM | SIGCHLD, &stack, 0);
323 if(err < 0)
324 return -errno;
325
326 aio_pid = err;
327
328 printk("Using 2.6 host AIO\n");
329
330 submit_proc = submit_aio_26;
331
332 return 0;
333}
334
335#else
336#define DEFAULT_24_AIO 1
337static int submit_aio_26(struct aio_context *aio)
338{
339 return -ENOSYS;
340}
341
342static int init_aio_26(void)
343{
344 submit_proc = submit_aio_26;
345 return -ENOSYS;
346}
347#endif
348
349static int aio_24 = DEFAULT_24_AIO;
350
351static int __init set_aio_24(char *name, int *add)
352{
353 aio_24 = 1;
354 return 0;
355}
356
357__uml_setup("aio=2.4", set_aio_24,
358"aio=2.4\n"
359" This is used to force UML to use 2.4-style AIO even when 2.6 AIO is\n"
360" available. 2.4 AIO is a single thread that handles one request at a\n"
361" time, synchronously. 2.6 AIO is a thread which uses the 2.6 AIO \n"
362" interface to handle an arbitrary number of pending requests. 2.6 AIO \n"
363" is not available in tt mode, on 2.4 hosts, or when UML is built with\n"
364" /usr/include/linux/aio_abi.h not available. Many distributions don't\n"
365" include aio_abi.h, so you will need to copy it from a kernel tree to\n"
366" your /usr/include/linux in order to build an AIO-capable UML\n\n"
367);
368
369static int init_aio(void)
370{
371 int err;
372
373 CHOOSE_MODE(({
374 if(!aio_24){
375 printk("Disabling 2.6 AIO in tt mode\n");
376 aio_24 = 1;
377 } }), (void) 0);
378
379 if(!aio_24){
380 err = init_aio_26();
381 if(err && (errno == ENOSYS)){
382 printk("2.6 AIO not supported on the host - "
383 "reverting to 2.4 AIO\n");
384 aio_24 = 1;
385 }
386 else return err;
387 }
388
389 if(aio_24)
390 return init_aio_24();
391
392 return 0;
393}
394
395/* The reason for the __initcall/__uml_exitcall asymmetry is that init_aio
396 * needs to be called when the kernel is running because it calls run_helper,
397 * which needs get_free_page. exit_aio is a __uml_exitcall because the generic
398 * kernel does not run __exitcalls on shutdown, and can't because many of them
399 * break when called outside of module unloading.
400 */
401__initcall(init_aio);
402
403static void exit_aio(void)
404{
405 if(aio_pid != -1)
406 os_kill_process(aio_pid, 1);
407}
408
409__uml_exitcall(exit_aio);
410
411int submit_aio(struct aio_context *aio)
412{
413 return (*submit_proc)(aio);
414}
diff --git a/arch/um/os-Linux/process.c b/arch/um/os-Linux/process.c
index 1e126bfd31a7..d32413e4b4ce 100644
--- a/arch/um/os-Linux/process.c
+++ b/arch/um/os-Linux/process.c
@@ -3,10 +3,10 @@
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include <unistd.h>
7#include <stdio.h> 6#include <stdio.h>
8#include <errno.h> 7#include <errno.h>
9#include <signal.h> 8#include <signal.h>
9#include <setjmp.h>
10#include <linux/unistd.h> 10#include <linux/unistd.h>
11#include <sys/mman.h> 11#include <sys/mman.h>
12#include <sys/wait.h> 12#include <sys/wait.h>
@@ -14,6 +14,10 @@
14#include "os.h" 14#include "os.h"
15#include "user.h" 15#include "user.h"
16#include "user_util.h" 16#include "user_util.h"
17#include "signal_user.h"
18#include "process.h"
19#include "irq_user.h"
20#include "kern_util.h"
17 21
18#define ARBITRARY_ADDR -1 22#define ARBITRARY_ADDR -1
19#define FAILURE_PID -1 23#define FAILURE_PID -1
@@ -114,8 +118,10 @@ void os_usr1_process(int pid)
114 kill(pid, SIGUSR1); 118 kill(pid, SIGUSR1);
115} 119}
116 120
117/*Don't use the glibc version, which caches the result in TLS. It misses some 121/* Don't use the glibc version, which caches the result in TLS. It misses some
118 * syscalls, and also breaks with clone(), which does not unshare the TLS.*/ 122 * syscalls, and also breaks with clone(), which does not unshare the TLS.
123 */
124
119inline _syscall0(pid_t, getpid) 125inline _syscall0(pid_t, getpid)
120 126
121int os_getpid(void) 127int os_getpid(void)
@@ -164,6 +170,52 @@ int os_unmap_memory(void *addr, int len)
164 return(0); 170 return(0);
165} 171}
166 172
173void init_new_thread_stack(void *sig_stack, void (*usr1_handler)(int))
174{
175 int flags = 0, pages;
176
177 if(sig_stack != NULL){
178 pages = (1 << UML_CONFIG_KERNEL_STACK_ORDER);
179 set_sigstack(sig_stack, pages * page_size());
180 flags = SA_ONSTACK;
181 }
182 if(usr1_handler) set_handler(SIGUSR1, usr1_handler, flags, -1);
183}
184
185void init_new_thread_signals(int altstack)
186{
187 int flags = altstack ? SA_ONSTACK : 0;
188
189 set_handler(SIGSEGV, (__sighandler_t) sig_handler, flags,
190 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
191 set_handler(SIGTRAP, (__sighandler_t) sig_handler, flags,
192 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
193 set_handler(SIGFPE, (__sighandler_t) sig_handler, flags,
194 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
195 set_handler(SIGILL, (__sighandler_t) sig_handler, flags,
196 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
197 set_handler(SIGBUS, (__sighandler_t) sig_handler, flags,
198 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
199 set_handler(SIGUSR2, (__sighandler_t) sig_handler,
200 flags, SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
201 signal(SIGHUP, SIG_IGN);
202
203 init_irq_signals(altstack);
204}
205
206int run_kernel_thread(int (*fn)(void *), void *arg, void **jmp_ptr)
207{
208 sigjmp_buf buf;
209 int n;
210
211 *jmp_ptr = &buf;
212 n = sigsetjmp(buf, 1);
213 if(n != 0)
214 return(n);
215 (*fn)(arg);
216 return(0);
217}
218
167/* 219/*
168 * Overrides for Emacs so that we follow Linus's tabbing style. 220 * Overrides for Emacs so that we follow Linus's tabbing style.
169 * Emacs will notice this stuff at the end of the file and automatically 221 * Emacs will notice this stuff at the end of the file and automatically
diff --git a/arch/um/kernel/process.c b/arch/um/os-Linux/start_up.c
index 67acd92c5322..040cc1472bc7 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/os-Linux/start_up.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) 2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
@@ -19,7 +19,6 @@
19#include "user_util.h" 19#include "user_util.h"
20#include "kern_util.h" 20#include "kern_util.h"
21#include "user.h" 21#include "user.h"
22#include "process.h"
23#include "signal_kern.h" 22#include "signal_kern.h"
24#include "signal_user.h" 23#include "signal_user.h"
25#include "sysdep/ptrace.h" 24#include "sysdep/ptrace.h"
@@ -39,98 +38,6 @@
39#include "registers.h" 38#include "registers.h"
40#endif 39#endif
41 40
42void init_new_thread_stack(void *sig_stack, void (*usr1_handler)(int))
43{
44 int flags = 0, pages;
45
46 if(sig_stack != NULL){
47 pages = (1 << UML_CONFIG_KERNEL_STACK_ORDER);
48 set_sigstack(sig_stack, pages * page_size());
49 flags = SA_ONSTACK;
50 }
51 if(usr1_handler) set_handler(SIGUSR1, usr1_handler, flags, -1);
52}
53
54void init_new_thread_signals(int altstack)
55{
56 int flags = altstack ? SA_ONSTACK : 0;
57
58 set_handler(SIGSEGV, (__sighandler_t) sig_handler, flags,
59 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
60 set_handler(SIGTRAP, (__sighandler_t) sig_handler, flags,
61 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
62 set_handler(SIGFPE, (__sighandler_t) sig_handler, flags,
63 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
64 set_handler(SIGILL, (__sighandler_t) sig_handler, flags,
65 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
66 set_handler(SIGBUS, (__sighandler_t) sig_handler, flags,
67 SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
68 set_handler(SIGUSR2, (__sighandler_t) sig_handler,
69 flags, SIGUSR1, SIGIO, SIGWINCH, SIGALRM, SIGVTALRM, -1);
70 signal(SIGHUP, SIG_IGN);
71
72 init_irq_signals(altstack);
73}
74
75struct tramp {
76 int (*tramp)(void *);
77 void *tramp_data;
78 unsigned long temp_stack;
79 int flags;
80 int pid;
81};
82
83/* See above for why sigkill is here */
84
85int sigkill = SIGKILL;
86
87int outer_tramp(void *arg)
88{
89 struct tramp *t;
90 int sig = sigkill;
91
92 t = arg;
93 t->pid = clone(t->tramp, (void *) t->temp_stack + page_size()/2,
94 t->flags, t->tramp_data);
95 if(t->pid > 0) wait_for_stop(t->pid, SIGSTOP, PTRACE_CONT, NULL);
96 kill(os_getpid(), sig);
97 _exit(0);
98}
99
100int start_fork_tramp(void *thread_arg, unsigned long temp_stack,
101 int clone_flags, int (*tramp)(void *))
102{
103 struct tramp arg;
104 unsigned long sp;
105 int new_pid, status, err;
106
107 /* The trampoline will run on the temporary stack */
108 sp = stack_sp(temp_stack);
109
110 clone_flags |= CLONE_FILES | SIGCHLD;
111
112 arg.tramp = tramp;
113 arg.tramp_data = thread_arg;
114 arg.temp_stack = temp_stack;
115 arg.flags = clone_flags;
116
117 /* Start the process and wait for it to kill itself */
118 new_pid = clone(outer_tramp, (void *) sp, clone_flags, &arg);
119 if(new_pid < 0)
120 return(new_pid);
121
122 CATCH_EINTR(err = waitpid(new_pid, &status, 0));
123 if(err < 0)
124 panic("Waiting for outer trampoline failed - errno = %d",
125 errno);
126
127 if(!WIFSIGNALED(status) || (WTERMSIG(status) != SIGKILL))
128 panic("outer trampoline didn't exit with SIGKILL, "
129 "status = %d", status);
130
131 return(arg.pid);
132}
133
134static int ptrace_child(void *arg) 41static int ptrace_child(void *arg)
135{ 42{
136 int ret; 43 int ret;
@@ -165,7 +72,7 @@ static int start_ptraced_child(void **stack_out)
165 void *stack; 72 void *stack;
166 unsigned long sp; 73 unsigned long sp;
167 int pid, n, status; 74 int pid, n, status;
168 75
169 stack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC, 76 stack = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC,
170 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); 77 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
171 if(stack == MAP_FAILED) 78 if(stack == MAP_FAILED)
@@ -173,10 +80,10 @@ static int start_ptraced_child(void **stack_out)
173 sp = (unsigned long) stack + PAGE_SIZE - sizeof(void *); 80 sp = (unsigned long) stack + PAGE_SIZE - sizeof(void *);
174 pid = clone(ptrace_child, (void *) sp, SIGCHLD, NULL); 81 pid = clone(ptrace_child, (void *) sp, SIGCHLD, NULL);
175 if(pid < 0) 82 if(pid < 0)
176 panic("check_ptrace : clone failed, errno = %d", errno); 83 panic("start_ptraced_child : clone failed, errno = %d", errno);
177 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED)); 84 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
178 if(n < 0) 85 if(n < 0)
179 panic("check_ptrace : wait failed, errno = %d", errno); 86 panic("check_ptrace : clone failed, errno = %d", errno);
180 if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGSTOP)) 87 if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGSTOP))
181 panic("check_ptrace : expected SIGSTOP, got status = %d", 88 panic("check_ptrace : expected SIGSTOP, got status = %d",
182 status); 89 status);
@@ -185,11 +92,14 @@ static int start_ptraced_child(void **stack_out)
185 return(pid); 92 return(pid);
186} 93}
187 94
188/* When testing for SYSEMU support, if it is one of the broken versions, we must 95/* When testing for SYSEMU support, if it is one of the broken versions, we
189 * just avoid using sysemu, not panic, but only if SYSEMU features are broken. 96 * must just avoid using sysemu, not panic, but only if SYSEMU features are
97 * broken.
190 * So only for SYSEMU features we test mustpanic, while normal host features 98 * So only for SYSEMU features we test mustpanic, while normal host features
191 * must work anyway!*/ 99 * must work anyway!
192static int stop_ptraced_child(int pid, void *stack, int exitcode, int mustpanic) 100 */
101static int stop_ptraced_child(int pid, void *stack, int exitcode,
102 int mustpanic)
193{ 103{
194 int status, n, ret = 0; 104 int status, n, ret = 0;
195 105
@@ -217,8 +127,6 @@ static int stop_ptraced_child(int pid, void *stack, int exitcode, int mustpanic)
217 return ret; 127 return ret;
218} 128}
219 129
220static int force_sysemu_disabled = 0;
221
222int ptrace_faultinfo = 1; 130int ptrace_faultinfo = 1;
223int proc_mm = 1; 131int proc_mm = 1;
224 132
@@ -228,29 +136,32 @@ static int __init skas0_cmd_param(char *str, int* add)
228 return 0; 136 return 0;
229} 137}
230 138
139__uml_setup("skas0", skas0_cmd_param,
140 "skas0\n"
141 " Disables SKAS3 usage, so that SKAS0 is used, unless \n"
142 " you specify mode=tt.\n\n");
143
144static int force_sysemu_disabled = 0;
145
231static int __init nosysemu_cmd_param(char *str, int* add) 146static int __init nosysemu_cmd_param(char *str, int* add)
232{ 147{
233 force_sysemu_disabled = 1; 148 force_sysemu_disabled = 1;
234 return 0; 149 return 0;
235} 150}
236 151
237__uml_setup("skas0", skas0_cmd_param,
238 "skas0\n"
239 " Disables SKAS3 usage, so that SKAS0 is used, unless you \n"
240 " specify mode=tt.\n\n");
241
242__uml_setup("nosysemu", nosysemu_cmd_param, 152__uml_setup("nosysemu", nosysemu_cmd_param,
243 "nosysemu\n" 153"nosysemu\n"
244 " Turns off syscall emulation patch for ptrace (SYSEMU) on.\n" 154" Turns off syscall emulation patch for ptrace (SYSEMU) on.\n"
245 " SYSEMU is a performance-patch introduced by Laurent Vivier. It changes\n" 155" SYSEMU is a performance-patch introduced by Laurent Vivier. It changes\n"
246 " behaviour of ptrace() and helps reducing host context switch rate.\n" 156" behaviour of ptrace() and helps reducing host context switch rate.\n"
247 " To make it working, you need a kernel patch for your host, too.\n" 157" To make it working, you need a kernel patch for your host, too.\n"
248 " See http://perso.wanadoo.fr/laurent.vivier/UML/ for further information.\n\n"); 158" See http://perso.wanadoo.fr/laurent.vivier/UML/ for further \n"
159" information.\n\n");
249 160
250static void __init check_sysemu(void) 161static void __init check_sysemu(void)
251{ 162{
252 void *stack; 163 void *stack;
253 int pid, syscall, n, status, count=0; 164 int pid, n, status, count=0;
254 165
255 printk("Checking syscall emulation patch for ptrace..."); 166 printk("Checking syscall emulation patch for ptrace...");
256 sysemu_supported = 0; 167 sysemu_supported = 0;
@@ -281,6 +192,12 @@ static void __init check_sysemu(void)
281 192
282 printk("Checking advanced syscall emulation patch for ptrace..."); 193 printk("Checking advanced syscall emulation patch for ptrace...");
283 pid = start_ptraced_child(&stack); 194 pid = start_ptraced_child(&stack);
195
196 if(ptrace(PTRACE_OLDSETOPTIONS, pid, 0,
197 (void *) PTRACE_O_TRACESYSGOOD) < 0)
198 panic("check_ptrace: PTRACE_OLDSETOPTIONS failed, errno = %d",
199 errno);
200
284 while(1){ 201 while(1){
285 count++; 202 count++;
286 if(ptrace(PTRACE_SYSEMU_SINGLESTEP, pid, 0, 0) < 0) 203 if(ptrace(PTRACE_SYSEMU_SINGLESTEP, pid, 0, 0) < 0)
@@ -288,15 +205,10 @@ static void __init check_sysemu(void)
288 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED)); 205 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
289 if(n < 0) 206 if(n < 0)
290 panic("check_ptrace : wait failed, errno = %d", errno); 207 panic("check_ptrace : wait failed, errno = %d", errno);
291 if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGTRAP)) 208 if(WIFSTOPPED(status) && (WSTOPSIG(status) == (SIGTRAP|0x80))){
292 panic("check_ptrace : expected (SIGTRAP|SYSCALL_TRAP), "
293 "got status = %d", status);
294
295 syscall = ptrace(PTRACE_PEEKUSR, pid, PT_SYSCALL_NR_OFFSET,
296 0);
297 if(syscall == __NR_getpid){
298 if (!count) 209 if (!count)
299 panic("check_ptrace : SYSEMU_SINGLESTEP doesn't singlestep"); 210 panic("check_ptrace : SYSEMU_SINGLESTEP "
211 "doesn't singlestep");
300 n = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_RET_OFFSET, 212 n = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_RET_OFFSET,
301 os_getpid()); 213 os_getpid());
302 if(n < 0) 214 if(n < 0)
@@ -304,6 +216,11 @@ static void __init check_sysemu(void)
304 "call return, errno = %d", errno); 216 "call return, errno = %d", errno);
305 break; 217 break;
306 } 218 }
219 else if(WIFSTOPPED(status) && (WSTOPSIG(status) == SIGTRAP))
220 count++;
221 else
222 panic("check_ptrace : expected SIGTRAP or "
223 "(SIGTRAP|0x80), got status = %d", status);
307 } 224 }
308 if (stop_ptraced_child(pid, stack, 0, 0) < 0) 225 if (stop_ptraced_child(pid, stack, 0, 0) < 0)
309 goto fail_stopped; 226 goto fail_stopped;
@@ -321,7 +238,7 @@ fail_stopped:
321 printk("missing\n"); 238 printk("missing\n");
322} 239}
323 240
324void __init check_ptrace(void) 241static void __init check_ptrace(void)
325{ 242{
326 void *stack; 243 void *stack;
327 int pid, syscall, n, status; 244 int pid, syscall, n, status;
@@ -329,20 +246,20 @@ void __init check_ptrace(void)
329 printk("Checking that ptrace can change system call numbers..."); 246 printk("Checking that ptrace can change system call numbers...");
330 pid = start_ptraced_child(&stack); 247 pid = start_ptraced_child(&stack);
331 248
332 if (ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0) 249 if(ptrace(PTRACE_OLDSETOPTIONS, pid, 0, (void *)PTRACE_O_TRACESYSGOOD) < 0)
333 panic("check_ptrace: PTRACE_SETOPTIONS failed, errno = %d", errno); 250 panic("check_ptrace: PTRACE_OLDSETOPTIONS failed, errno = %d", errno);
334 251
335 while(1){ 252 while(1){
336 if(ptrace(PTRACE_SYSCALL, pid, 0, 0) < 0) 253 if(ptrace(PTRACE_SYSCALL, pid, 0, 0) < 0)
337 panic("check_ptrace : ptrace failed, errno = %d", 254 panic("check_ptrace : ptrace failed, errno = %d",
338 errno); 255 errno);
339 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED)); 256 CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED));
340 if(n < 0) 257 if(n < 0)
341 panic("check_ptrace : wait failed, errno = %d", errno); 258 panic("check_ptrace : wait failed, errno = %d", errno);
342 if(!WIFSTOPPED(status) || (WSTOPSIG(status) != SIGTRAP + 0x80)) 259 if(!WIFSTOPPED(status) || (WSTOPSIG(status) != (SIGTRAP|0x80)))
343 panic("check_ptrace : expected SIGTRAP + 0x80, " 260 panic("check_ptrace : expected (SIGTRAP|0x80), "
344 "got status = %d", status); 261 "got status = %d", status);
345 262
346 syscall = ptrace(PTRACE_PEEKUSR, pid, PT_SYSCALL_NR_OFFSET, 263 syscall = ptrace(PTRACE_PEEKUSR, pid, PT_SYSCALL_NR_OFFSET,
347 0); 264 0);
348 if(syscall == __NR_getpid){ 265 if(syscall == __NR_getpid){
@@ -359,33 +276,36 @@ void __init check_ptrace(void)
359 check_sysemu(); 276 check_sysemu();
360} 277}
361 278
362int run_kernel_thread(int (*fn)(void *), void *arg, void **jmp_ptr) 279void os_early_checks(void)
363{ 280{
364 sigjmp_buf buf; 281 check_ptrace();
365 int n;
366
367 *jmp_ptr = &buf;
368 n = sigsetjmp(buf, 1);
369 if(n != 0)
370 return(n);
371 (*fn)(arg);
372 return(0);
373} 282}
374 283
375void forward_pending_sigio(int target) 284static int __init noprocmm_cmd_param(char *str, int* add)
376{ 285{
377 sigset_t sigs; 286 proc_mm = 0;
287 return 0;
288}
289
290__uml_setup("noprocmm", noprocmm_cmd_param,
291"noprocmm\n"
292" Turns off usage of /proc/mm, even if host supports it.\n"
293" To support /proc/mm, the host needs to be patched using\n"
294" the current skas3 patch.\n\n");
378 295
379 if(sigpending(&sigs)) 296static int __init noptracefaultinfo_cmd_param(char *str, int* add)
380 panic("forward_pending_sigio : sigpending failed"); 297{
381 if(sigismember(&sigs, SIGIO)) 298 ptrace_faultinfo = 0;
382 kill(target, SIGIO); 299 return 0;
383} 300}
384 301
385extern void *__syscall_stub_start, __syscall_stub_end; 302__uml_setup("noptracefaultinfo", noptracefaultinfo_cmd_param,
303"noptracefaultinfo\n"
304" Turns off usage of PTRACE_FAULTINFO, even if host supports\n"
305" it. To support PTRACE_FAULTINFO, the host needs to be patched\n"
306" using the current skas3 patch.\n\n");
386 307
387#ifdef UML_CONFIG_MODE_SKAS 308#ifdef UML_CONFIG_MODE_SKAS
388
389static inline void check_skas3_ptrace_support(void) 309static inline void check_skas3_ptrace_support(void)
390{ 310{
391 struct ptrace_faultinfo fi; 311 struct ptrace_faultinfo fi;
@@ -400,9 +320,8 @@ static inline void check_skas3_ptrace_support(void)
400 ptrace_faultinfo = 0; 320 ptrace_faultinfo = 0;
401 if(errno == EIO) 321 if(errno == EIO)
402 printf("not found\n"); 322 printf("not found\n");
403 else { 323 else
404 perror("not found"); 324 perror("not found");
405 }
406 } 325 }
407 else { 326 else {
408 if (!ptrace_faultinfo) 327 if (!ptrace_faultinfo)
@@ -419,9 +338,10 @@ int can_do_skas(void)
419{ 338{
420 printf("Checking for /proc/mm..."); 339 printf("Checking for /proc/mm...");
421 if (os_access("/proc/mm", OS_ACC_W_OK) < 0) { 340 if (os_access("/proc/mm", OS_ACC_W_OK) < 0) {
422 proc_mm = 0; 341 proc_mm = 0;
423 printf("not found\n"); 342 printf("not found\n");
424 } else { 343 }
344 else {
425 if (!proc_mm) 345 if (!proc_mm)
426 printf("found but disabled on command line\n"); 346 printf("found but disabled on command line\n");
427 else 347 else
diff --git a/arch/um/os-Linux/tt.c b/arch/um/os-Linux/tt.c
new file mode 100644
index 000000000000..5b047ab8416a
--- /dev/null
+++ b/arch/um/os-Linux/tt.c
@@ -0,0 +1,113 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include <stdio.h>
7#include <unistd.h>
8#include <signal.h>
9#include <sched.h>
10#include <errno.h>
11#include <stdarg.h>
12#include <stdlib.h>
13#include <setjmp.h>
14#include <sys/time.h>
15#include <sys/ptrace.h>
16#include <linux/ptrace.h>
17#include <sys/wait.h>
18#include <sys/mman.h>
19#include <asm/ptrace.h>
20#include <asm/unistd.h>
21#include <asm/page.h>
22#include "user_util.h"
23#include "kern_util.h"
24#include "user.h"
25#include "signal_kern.h"
26#include "signal_user.h"
27#include "sysdep/ptrace.h"
28#include "sysdep/sigcontext.h"
29#include "irq_user.h"
30#include "ptrace_user.h"
31#include "time_user.h"
32#include "init.h"
33#include "os.h"
34#include "uml-config.h"
35#include "choose-mode.h"
36#include "mode.h"
37#include "tempfile.h"
38
39/*
40 *-------------------------
41 * only for tt mode (will be deleted in future...)
42 *-------------------------
43 */
44
45struct tramp {
46 int (*tramp)(void *);
47 void *tramp_data;
48 unsigned long temp_stack;
49 int flags;
50 int pid;
51};
52
53/* See above for why sigkill is here */
54
55int sigkill = SIGKILL;
56
57int outer_tramp(void *arg)
58{
59 struct tramp *t;
60 int sig = sigkill;
61
62 t = arg;
63 t->pid = clone(t->tramp, (void *) t->temp_stack + page_size()/2,
64 t->flags, t->tramp_data);
65 if(t->pid > 0) wait_for_stop(t->pid, SIGSTOP, PTRACE_CONT, NULL);
66 kill(os_getpid(), sig);
67 _exit(0);
68}
69
70int start_fork_tramp(void *thread_arg, unsigned long temp_stack,
71 int clone_flags, int (*tramp)(void *))
72{
73 struct tramp arg;
74 unsigned long sp;
75 int new_pid, status, err;
76
77 /* The trampoline will run on the temporary stack */
78 sp = stack_sp(temp_stack);
79
80 clone_flags |= CLONE_FILES | SIGCHLD;
81
82 arg.tramp = tramp;
83 arg.tramp_data = thread_arg;
84 arg.temp_stack = temp_stack;
85 arg.flags = clone_flags;
86
87 /* Start the process and wait for it to kill itself */
88 new_pid = clone(outer_tramp, (void *) sp, clone_flags, &arg);
89 if(new_pid < 0)
90 return(new_pid);
91
92 CATCH_EINTR(err = waitpid(new_pid, &status, 0));
93 if(err < 0)
94 panic("Waiting for outer trampoline failed - errno = %d",
95 errno);
96
97 if(!WIFSIGNALED(status) || (WTERMSIG(status) != SIGKILL))
98 panic("outer trampoline didn't exit with SIGKILL, "
99 "status = %d", status);
100
101 return(arg.pid);
102}
103
104void forward_pending_sigio(int target)
105{
106 sigset_t sigs;
107
108 if(sigpending(&sigs))
109 panic("forward_pending_sigio : sigpending failed");
110 if(sigismember(&sigs, SIGIO))
111 kill(target, SIGIO);
112}
113
diff --git a/arch/um/scripts/Makefile.unmap b/arch/um/scripts/Makefile.unmap
index 802d027a1e13..b2165188d942 100644
--- a/arch/um/scripts/Makefile.unmap
+++ b/arch/um/scripts/Makefile.unmap
@@ -12,7 +12,7 @@ $(obj)/unmap.o: _c_flags = $(call unprofile,$(CFLAGS))
12 12
13quiet_cmd_wrapld = LD $@ 13quiet_cmd_wrapld = LD $@
14define cmd_wrapld 14define cmd_wrapld
15 $(LD) $(LDFLAGS) -r -o $(obj)/unmap_tmp.o $< $(shell $(CC) $(CFLAGS) -print-file-name=libc.a); \ 15 $(LD) $(LDFLAGS) -r -o $(obj)/unmap_tmp.o $< ; \
16 $(OBJCOPY) $(UML_OBJCOPYFLAGS) $(obj)/unmap_tmp.o $@ -G switcheroo 16 $(OBJCOPY) $(UML_OBJCOPYFLAGS) $(obj)/unmap_tmp.o $@ -G switcheroo
17endef 17endef
18 18
diff --git a/arch/um/sys-i386/Makefile b/arch/um/sys-i386/Makefile
index 77c3c4d29f55..4ca2a229da49 100644
--- a/arch/um/sys-i386/Makefile
+++ b/arch/um/sys-i386/Makefile
@@ -16,13 +16,7 @@ semaphore.c-dir = kernel
16highmem.c-dir = mm 16highmem.c-dir = mm
17module.c-dir = kernel 17module.c-dir = kernel
18 18
19STUB_CFLAGS = -Wp,-MD,$(depfile) $(call unprofile,$(USER_CFLAGS)) 19$(obj)/stub_segv.o : _c_flags = $(call unprofile,$(CFLAGS))
20
21# _cflags works with kernel files, not with userspace ones, but c_flags does,
22# why ask why?
23$(obj)/stub_segv.o : c_flags = $(STUB_CFLAGS)
24
25$(obj)/stub.o : a_flags = $(STUB_CFLAGS)
26 20
27subdir- := util 21subdir- := util
28 22
diff --git a/arch/um/sys-i386/signal.c b/arch/um/sys-i386/signal.c
index 4efc69a039d7..16bc19928b3c 100644
--- a/arch/um/sys-i386/signal.c
+++ b/arch/um/sys-i386/signal.c
@@ -122,9 +122,9 @@ int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from,
122 int err; 122 int err;
123 123
124 to_fp = to->fpstate; 124 to_fp = to->fpstate;
125 from_fp = from->fpstate;
126 sigs = to->oldmask; 125 sigs = to->oldmask;
127 err = copy_from_user(to, from, sizeof(*to)); 126 err = copy_from_user(to, from, sizeof(*to));
127 from_fp = to->fpstate;
128 to->oldmask = sigs; 128 to->oldmask = sigs;
129 to->fpstate = to_fp; 129 to->fpstate = to_fp;
130 if(to_fp != NULL) 130 if(to_fp != NULL)
diff --git a/arch/um/sys-i386/stub.S b/arch/um/sys-i386/stub.S
index 2f2c70a8f043..6a70d9ab5c29 100644
--- a/arch/um/sys-i386/stub.S
+++ b/arch/um/sys-i386/stub.S
@@ -2,7 +2,50 @@
2 2
3 .globl syscall_stub 3 .globl syscall_stub
4.section .__syscall_stub, "x" 4.section .__syscall_stub, "x"
5syscall_stub: 5
6 int $0x80 6 .globl batch_syscall_stub
7batch_syscall_stub:
8 /* load pointer to first operation */
9 mov $(UML_CONFIG_STUB_DATA+8), %esp
10
11again:
12 /* load length of additional data */
13 mov 0x0(%esp), %eax
14
15 /* if(length == 0) : end of list */
16 /* write possible 0 to header */
17 mov %eax, UML_CONFIG_STUB_DATA+4
18 cmpl $0, %eax
19 jz done
20
21 /* save current pointer */
22 mov %esp, UML_CONFIG_STUB_DATA+4
23
24 /* skip additional data */
25 add %eax, %esp
26
27 /* load syscall-# */
28 pop %eax
29
30 /* load syscall params */
31 pop %ebx
32 pop %ecx
33 pop %edx
34 pop %esi
35 pop %edi
36 pop %ebp
37
38 /* execute syscall */
39 int $0x80
40
41 /* check return value */
42 pop %ebx
43 cmp %ebx, %eax
44 je again
45
46done:
47 /* save return value */
7 mov %eax, UML_CONFIG_STUB_DATA 48 mov %eax, UML_CONFIG_STUB_DATA
49
50 /* stop */
8 int3 51 int3
diff --git a/arch/um/sys-i386/stub_segv.c b/arch/um/sys-i386/stub_segv.c
index 68aeabe3a654..1e88b275edac 100644
--- a/arch/um/sys-i386/stub_segv.c
+++ b/arch/um/sys-i386/stub_segv.c
@@ -3,8 +3,7 @@
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include <signal.h> 6#include <asm/signal.h>
7#include <asm/sigcontext.h>
8#include <asm/unistd.h> 7#include <asm/unistd.h>
9#include "uml-config.h" 8#include "uml-config.h"
10#include "sysdep/sigcontext.h" 9#include "sysdep/sigcontext.h"
diff --git a/arch/um/sys-x86_64/Makefile b/arch/um/sys-x86_64/Makefile
index 7488206ce6f4..f0ab574d1e95 100644
--- a/arch/um/sys-x86_64/Makefile
+++ b/arch/um/sys-x86_64/Makefile
@@ -6,7 +6,7 @@
6 6
7#XXX: why into lib-y? 7#XXX: why into lib-y?
8lib-y = bitops.o bugs.o csum-partial.o delay.o fault.o mem.o memcpy.o \ 8lib-y = bitops.o bugs.o csum-partial.o delay.o fault.o mem.o memcpy.o \
9 ptrace.o ptrace_user.o semaphore.o sigcontext.o signal.o stub.o \ 9 ptrace.o ptrace_user.o sigcontext.o signal.o stub.o \
10 stub_segv.o syscalls.o syscall_table.o sysrq.o thunk.o 10 stub_segv.o syscalls.o syscall_table.o sysrq.o thunk.o
11 11
12obj-y := ksyms.o 12obj-y := ksyms.o
@@ -15,7 +15,7 @@ obj-$(CONFIG_MODULES) += module.o um_module.o
15USER_OBJS := ptrace_user.o sigcontext.o 15USER_OBJS := ptrace_user.o sigcontext.o
16 16
17SYMLINKS = bitops.c csum-copy.S csum-partial.c csum-wrappers.c memcpy.S \ 17SYMLINKS = bitops.c csum-copy.S csum-partial.c csum-wrappers.c memcpy.S \
18 semaphore.c thunk.S module.c 18 thunk.S module.c
19 19
20include arch/um/scripts/Makefile.rules 20include arch/um/scripts/Makefile.rules
21 21
@@ -24,17 +24,10 @@ csum-copy.S-dir = lib
24csum-partial.c-dir = lib 24csum-partial.c-dir = lib
25csum-wrappers.c-dir = lib 25csum-wrappers.c-dir = lib
26memcpy.S-dir = lib 26memcpy.S-dir = lib
27semaphore.c-dir = kernel
28thunk.S-dir = lib 27thunk.S-dir = lib
29module.c-dir = kernel 28module.c-dir = kernel
30 29
31STUB_CFLAGS = -Wp,-MD,$(depfile) $(call unprofile,$(USER_CFLAGS)) 30$(obj)/stub_segv.o: _c_flags = $(call unprofile,$(CFLAGS))
32
33# _cflags works with kernel files, not with userspace ones, but c_flags does,
34# why ask why?
35$(obj)/stub_segv.o : c_flags = $(STUB_CFLAGS)
36
37$(obj)/stub.o : a_flags = $(STUB_CFLAGS)
38 31
39subdir- := util 32subdir- := util
40 33
diff --git a/arch/um/sys-x86_64/signal.c b/arch/um/sys-x86_64/signal.c
index 8fdaed06c10d..fe1d065332b1 100644
--- a/arch/um/sys-x86_64/signal.c
+++ b/arch/um/sys-x86_64/signal.c
@@ -104,28 +104,35 @@ int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp,
104int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from, 104int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from,
105 int fpsize) 105 int fpsize)
106{ 106{
107 struct _fpstate *to_fp, *from_fp; 107 struct _fpstate *to_fp, *from_fp;
108 unsigned long sigs; 108 unsigned long sigs;
109 int err; 109 int err;
110 110
111 to_fp = to->fpstate; 111 to_fp = to->fpstate;
112 from_fp = from->fpstate; 112 sigs = to->oldmask;
113 sigs = to->oldmask; 113 err = copy_from_user(to, from, sizeof(*to));
114 err = copy_from_user(to, from, sizeof(*to)); 114 from_fp = to->fpstate;
115 to->oldmask = sigs; 115 to->fpstate = to_fp;
116 return(err); 116 to->oldmask = sigs;
117 if(to_fp != NULL)
118 err |= copy_from_user(to_fp, from_fp, fpsize);
119 return(err);
117} 120}
118 121
119int copy_sc_to_user_tt(struct sigcontext *to, struct _fpstate *fp, 122int copy_sc_to_user_tt(struct sigcontext *to, struct _fpstate *fp,
120 struct sigcontext *from, int fpsize) 123 struct sigcontext *from, int fpsize)
121{ 124{
122 struct _fpstate *to_fp, *from_fp; 125 struct _fpstate *to_fp, *from_fp;
123 int err; 126 int err;
124 127
125 to_fp = (fp ? fp : (struct _fpstate *) (to + 1)); 128 to_fp = (fp ? fp : (struct _fpstate *) (to + 1));
126 from_fp = from->fpstate; 129 from_fp = from->fpstate;
127 err = copy_to_user(to, from, sizeof(*to)); 130 err = copy_to_user(to, from, sizeof(*to));
128 return(err); 131 if(from_fp != NULL){
132 err |= copy_to_user(&to->fpstate, &to_fp, sizeof(to->fpstate));
133 err |= copy_to_user(to_fp, from_fp, fpsize);
134 }
135 return(err);
129} 136}
130 137
131#endif 138#endif
diff --git a/arch/um/sys-x86_64/stub.S b/arch/um/sys-x86_64/stub.S
index 31c14925716b..03c279735784 100644
--- a/arch/um/sys-x86_64/stub.S
+++ b/arch/um/sys-x86_64/stub.S
@@ -13,3 +13,54 @@ syscall_stub:
13 or %rcx, %rbx 13 or %rcx, %rbx
14 movq %rax, (%rbx) 14 movq %rax, (%rbx)
15 int3 15 int3
16
17 .globl batch_syscall_stub
18batch_syscall_stub:
19 mov $(UML_CONFIG_STUB_DATA >> 32), %rbx
20 sal $32, %rbx
21 mov $(UML_CONFIG_STUB_DATA & 0xffffffff), %rax
22 or %rax, %rbx
23 /* load pointer to first operation */
24 mov %rbx, %rsp
25 add $0x10, %rsp
26again:
27 /* load length of additional data */
28 mov 0x0(%rsp), %rax
29
30 /* if(length == 0) : end of list */
31 /* write possible 0 to header */
32 mov %rax, 8(%rbx)
33 cmp $0, %rax
34 jz done
35
36 /* save current pointer */
37 mov %rsp, 8(%rbx)
38
39 /* skip additional data */
40 add %rax, %rsp
41
42 /* load syscall-# */
43 pop %rax
44
45 /* load syscall params */
46 pop %rdi
47 pop %rsi
48 pop %rdx
49 pop %r10
50 pop %r8
51 pop %r9
52
53 /* execute syscall */
54 syscall
55
56 /* check return value */
57 pop %rcx
58 cmp %rcx, %rax
59 je again
60
61done:
62 /* save return value */
63 mov %rax, (%rbx)
64
65 /* stop */
66 int3
diff --git a/arch/um/sys-x86_64/stub_segv.c b/arch/um/sys-x86_64/stub_segv.c
index 161d1fe9c034..65a131b362b6 100644
--- a/arch/um/sys-x86_64/stub_segv.c
+++ b/arch/um/sys-x86_64/stub_segv.c
@@ -3,9 +3,10 @@
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include <signal.h> 6#include <asm/signal.h>
7#include <linux/compiler.h> 7#include <linux/compiler.h>
8#include <asm/unistd.h> 8#include <asm/unistd.h>
9#include <asm/ucontext.h>
9#include "uml-config.h" 10#include "uml-config.h"
10#include "sysdep/sigcontext.h" 11#include "sysdep/sigcontext.h"
11#include "sysdep/faultinfo.h" 12#include "sysdep/faultinfo.h"
diff --git a/arch/v850/configs/rte-ma1-cb_defconfig b/arch/v850/configs/rte-ma1-cb_defconfig
index 1b5ca3c3a658..1a5beda36e29 100644
--- a/arch/v850/configs/rte-ma1-cb_defconfig
+++ b/arch/v850/configs/rte-ma1-cb_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-uc0 3# Linux kernel version: 2.6.13-uc0
4# Thu Jul 21 11:08:27 2005 4# Fri Sep 2 13:54:27 2005
5# 5#
6# CONFIG_MMU is not set 6# CONFIG_MMU is not set
7# CONFIG_UID16 is not set 7# CONFIG_UID16 is not set
@@ -44,6 +44,8 @@ CONFIG_ZERO_BSS=y
44# CONFIG_V850E_HIGHRES_TIMER is not set 44# CONFIG_V850E_HIGHRES_TIMER is not set
45# CONFIG_RESET_GUARD is not set 45# CONFIG_RESET_GUARD is not set
46CONFIG_LARGE_ALLOCS=y 46CONFIG_LARGE_ALLOCS=y
47CONFIG_FLATMEM=y
48CONFIG_FLAT_NODE_MEM_MAP=y
47 49
48# 50#
49# Code maturity level options 51# Code maturity level options
@@ -111,6 +113,52 @@ CONFIG_BINFMT_FLAT=y
111# CONFIG_BINFMT_MISC is not set 113# CONFIG_BINFMT_MISC is not set
112 114
113# 115#
116# Networking
117#
118CONFIG_NET=y
119
120#
121# Networking options
122#
123# CONFIG_PACKET is not set
124# CONFIG_UNIX is not set
125# CONFIG_NET_KEY is not set
126CONFIG_INET=y
127# CONFIG_IP_MULTICAST is not set
128# CONFIG_IP_ADVANCED_ROUTER is not set
129CONFIG_IP_FIB_HASH=y
130# CONFIG_IP_PNP is not set
131# CONFIG_NET_IPIP is not set
132# CONFIG_NET_IPGRE is not set
133# CONFIG_SYN_COOKIES is not set
134# CONFIG_INET_AH is not set
135# CONFIG_INET_ESP is not set
136# CONFIG_INET_IPCOMP is not set
137# CONFIG_INET_TUNNEL is not set
138# CONFIG_IP_TCPDIAG is not set
139# CONFIG_IP_TCPDIAG_IPV6 is not set
140# CONFIG_TCP_CONG_ADVANCED is not set
141CONFIG_TCP_CONG_BIC=y
142# CONFIG_IPV6 is not set
143# CONFIG_NETFILTER is not set
144# CONFIG_BRIDGE is not set
145# CONFIG_VLAN_8021Q is not set
146# CONFIG_DECNET is not set
147# CONFIG_LLC2 is not set
148# CONFIG_IPX is not set
149# CONFIG_ATALK is not set
150# CONFIG_NET_SCHED is not set
151# CONFIG_NET_CLS_ROUTE is not set
152
153#
154# Network testing
155#
156# CONFIG_NET_PKTGEN is not set
157# CONFIG_HAMRADIO is not set
158# CONFIG_IRDA is not set
159# CONFIG_BT is not set
160
161#
114# Generic Driver Options 162# Generic Driver Options
115# 163#
116CONFIG_STANDALONE=y 164CONFIG_STANDALONE=y
@@ -158,6 +206,7 @@ CONFIG_MTD_CFI_I2=y
158# Mapping drivers for chip access 206# Mapping drivers for chip access
159# 207#
160# CONFIG_MTD_COMPLEX_MAPPINGS is not set 208# CONFIG_MTD_COMPLEX_MAPPINGS is not set
209# CONFIG_MTD_PLATRAM is not set
161 210
162# 211#
163# Self-contained MTD device drivers 212# Self-contained MTD device drivers
@@ -232,6 +281,7 @@ CONFIG_IOSCHED_NOOP=y
232# 281#
233# Fusion MPT device support 282# Fusion MPT device support
234# 283#
284# CONFIG_FUSION is not set
235 285
236# 286#
237# IEEE 1394 (FireWire) support 287# IEEE 1394 (FireWire) support
@@ -244,53 +294,8 @@ CONFIG_IOSCHED_NOOP=y
244# CONFIG_I2O is not set 294# CONFIG_I2O is not set
245 295
246# 296#
247# Networking support 297# Network device support
248#
249CONFIG_NET=y
250
251#
252# Networking options
253#
254# CONFIG_PACKET is not set
255# CONFIG_UNIX is not set
256# CONFIG_NET_KEY is not set
257CONFIG_INET=y
258# CONFIG_IP_MULTICAST is not set
259# CONFIG_IP_ADVANCED_ROUTER is not set
260# CONFIG_IP_PNP is not set
261# CONFIG_NET_IPIP is not set
262# CONFIG_NET_IPGRE is not set
263# CONFIG_SYN_COOKIES is not set
264# CONFIG_INET_AH is not set
265# CONFIG_INET_ESP is not set
266# CONFIG_INET_IPCOMP is not set
267# CONFIG_INET_TUNNEL is not set
268# CONFIG_IP_TCPDIAG is not set
269# CONFIG_IP_TCPDIAG_IPV6 is not set
270# CONFIG_IPV6 is not set
271# CONFIG_NETFILTER is not set
272# CONFIG_BRIDGE is not set
273# CONFIG_VLAN_8021Q is not set
274# CONFIG_DECNET is not set
275# CONFIG_LLC2 is not set
276# CONFIG_IPX is not set
277# CONFIG_ATALK is not set
278
279#
280# QoS and/or fair queueing
281#
282# CONFIG_NET_SCHED is not set
283# CONFIG_NET_CLS_ROUTE is not set
284
285#
286# Network testing
287# 298#
288# CONFIG_NET_PKTGEN is not set
289# CONFIG_NETPOLL is not set
290# CONFIG_NET_POLL_CONTROLLER is not set
291# CONFIG_HAMRADIO is not set
292# CONFIG_IRDA is not set
293# CONFIG_BT is not set
294CONFIG_NETDEVICES=y 299CONFIG_NETDEVICES=y
295# CONFIG_DUMMY is not set 300# CONFIG_DUMMY is not set
296# CONFIG_BONDING is not set 301# CONFIG_BONDING is not set
@@ -372,6 +377,8 @@ CONFIG_EEPRO100=y
372# CONFIG_FDDI is not set 377# CONFIG_FDDI is not set
373# CONFIG_PPP is not set 378# CONFIG_PPP is not set
374# CONFIG_SLIP is not set 379# CONFIG_SLIP is not set
380# CONFIG_NETPOLL is not set
381# CONFIG_NET_POLL_CONTROLLER is not set
375 382
376# 383#
377# ISDN subsystem 384# ISDN subsystem
@@ -472,6 +479,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
472# CONFIG_JBD is not set 479# CONFIG_JBD is not set
473# CONFIG_REISERFS_FS is not set 480# CONFIG_REISERFS_FS is not set
474# CONFIG_JFS_FS is not set 481# CONFIG_JFS_FS is not set
482# CONFIG_FS_POSIX_ACL is not set
475 483
476# 484#
477# XFS support 485# XFS support
@@ -479,6 +487,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
479# CONFIG_XFS_FS is not set 487# CONFIG_XFS_FS is not set
480# CONFIG_MINIX_FS is not set 488# CONFIG_MINIX_FS is not set
481CONFIG_ROMFS_FS=y 489CONFIG_ROMFS_FS=y
490# CONFIG_MAGIC_ROM_PTR is not set
491CONFIG_INOTIFY=y
482# CONFIG_QUOTA is not set 492# CONFIG_QUOTA is not set
483CONFIG_DNOTIFY=y 493CONFIG_DNOTIFY=y
484# CONFIG_AUTOFS_FS is not set 494# CONFIG_AUTOFS_FS is not set
@@ -524,9 +534,11 @@ CONFIG_RAMFS=y
524# 534#
525CONFIG_NFS_FS=y 535CONFIG_NFS_FS=y
526CONFIG_NFS_V3=y 536CONFIG_NFS_V3=y
537# CONFIG_NFS_V3_ACL is not set
527# CONFIG_NFSD is not set 538# CONFIG_NFSD is not set
528CONFIG_LOCKD=y 539CONFIG_LOCKD=y
529CONFIG_LOCKD_V4=y 540CONFIG_LOCKD_V4=y
541CONFIG_NFS_COMMON=y
530CONFIG_SUNRPC=y 542CONFIG_SUNRPC=y
531# CONFIG_SMB_FS is not set 543# CONFIG_SMB_FS is not set
532# CONFIG_CIFS is not set 544# CONFIG_CIFS is not set
diff --git a/arch/v850/configs/rte-me2-cb_defconfig b/arch/v850/configs/rte-me2-cb_defconfig
index 44becc065404..15e666478061 100644
--- a/arch/v850/configs/rte-me2-cb_defconfig
+++ b/arch/v850/configs/rte-me2-cb_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-uc0 3# Linux kernel version: 2.6.13-uc0
4# Thu Jul 21 11:30:08 2005 4# Fri Sep 2 13:47:50 2005
5# 5#
6# CONFIG_MMU is not set 6# CONFIG_MMU is not set
7# CONFIG_UID16 is not set 7# CONFIG_UID16 is not set
@@ -41,6 +41,8 @@ CONFIG_ZERO_BSS=y
41# CONFIG_V850E_HIGHRES_TIMER is not set 41# CONFIG_V850E_HIGHRES_TIMER is not set
42# CONFIG_RESET_GUARD is not set 42# CONFIG_RESET_GUARD is not set
43CONFIG_LARGE_ALLOCS=y 43CONFIG_LARGE_ALLOCS=y
44CONFIG_FLATMEM=y
45CONFIG_FLAT_NODE_MEM_MAP=y
44 46
45# 47#
46# Code maturity level options 48# Code maturity level options
@@ -56,7 +58,6 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
56CONFIG_LOCALVERSION="" 58CONFIG_LOCALVERSION=""
57# CONFIG_BSD_PROCESS_ACCT is not set 59# CONFIG_BSD_PROCESS_ACCT is not set
58# CONFIG_SYSCTL is not set 60# CONFIG_SYSCTL is not set
59# CONFIG_AUDIT is not set
60# CONFIG_HOTPLUG is not set 61# CONFIG_HOTPLUG is not set
61# CONFIG_IKCONFIG is not set 62# CONFIG_IKCONFIG is not set
62CONFIG_EMBEDDED=y 63CONFIG_EMBEDDED=y
@@ -104,6 +105,11 @@ CONFIG_BINFMT_FLAT=y
104# CONFIG_BINFMT_MISC is not set 105# CONFIG_BINFMT_MISC is not set
105 106
106# 107#
108# Networking
109#
110# CONFIG_NET is not set
111
112#
107# Generic Driver Options 113# Generic Driver Options
108# 114#
109CONFIG_STANDALONE=y 115CONFIG_STANDALONE=y
@@ -151,6 +157,7 @@ CONFIG_MTD_CFI_I2=y
151# Mapping drivers for chip access 157# Mapping drivers for chip access
152# 158#
153# CONFIG_MTD_COMPLEX_MAPPINGS is not set 159# CONFIG_MTD_COMPLEX_MAPPINGS is not set
160# CONFIG_MTD_PLATRAM is not set
154 161
155# 162#
156# Self-contained MTD device drivers 163# Self-contained MTD device drivers
@@ -218,6 +225,7 @@ CONFIG_IOSCHED_NOOP=y
218# 225#
219# Fusion MPT device support 226# Fusion MPT device support
220# 227#
228# CONFIG_FUSION is not set
221 229
222# 230#
223# IEEE 1394 (FireWire) support 231# IEEE 1394 (FireWire) support
@@ -228,9 +236,8 @@ CONFIG_IOSCHED_NOOP=y
228# 236#
229 237
230# 238#
231# Networking support 239# Network device support
232# 240#
233# CONFIG_NET is not set
234# CONFIG_NETPOLL is not set 241# CONFIG_NETPOLL is not set
235# CONFIG_NET_POLL_CONTROLLER is not set 242# CONFIG_NET_POLL_CONTROLLER is not set
236 243
@@ -311,7 +318,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
311# 318#
312# Ftape, the floppy tape device driver 319# Ftape, the floppy tape device driver
313# 320#
314# CONFIG_DRM is not set
315# CONFIG_RAW_DRIVER is not set 321# CONFIG_RAW_DRIVER is not set
316 322
317# 323#
@@ -335,6 +341,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
335# CONFIG_JBD is not set 341# CONFIG_JBD is not set
336# CONFIG_REISERFS_FS is not set 342# CONFIG_REISERFS_FS is not set
337# CONFIG_JFS_FS is not set 343# CONFIG_JFS_FS is not set
344# CONFIG_FS_POSIX_ACL is not set
338 345
339# 346#
340# XFS support 347# XFS support
@@ -342,6 +349,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
342# CONFIG_XFS_FS is not set 349# CONFIG_XFS_FS is not set
343# CONFIG_MINIX_FS is not set 350# CONFIG_MINIX_FS is not set
344CONFIG_ROMFS_FS=y 351CONFIG_ROMFS_FS=y
352# CONFIG_MAGIC_ROM_PTR is not set
353CONFIG_INOTIFY=y
345# CONFIG_QUOTA is not set 354# CONFIG_QUOTA is not set
346CONFIG_DNOTIFY=y 355CONFIG_DNOTIFY=y
347# CONFIG_AUTOFS_FS is not set 356# CONFIG_AUTOFS_FS is not set
diff --git a/arch/v850/configs/sim_defconfig b/arch/v850/configs/sim_defconfig
index d73f5f9d8383..f31ba7398ad0 100644
--- a/arch/v850/configs/sim_defconfig
+++ b/arch/v850/configs/sim_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-uc0 3# Linux kernel version: 2.6.13-uc0
4# Thu Jul 21 11:29:27 2005 4# Fri Sep 2 13:36:43 2005
5# 5#
6# CONFIG_MMU is not set 6# CONFIG_MMU is not set
7# CONFIG_UID16 is not set 7# CONFIG_UID16 is not set
@@ -36,6 +36,8 @@ CONFIG_NO_CACHE=y
36CONFIG_ZERO_BSS=y 36CONFIG_ZERO_BSS=y
37# CONFIG_RESET_GUARD is not set 37# CONFIG_RESET_GUARD is not set
38CONFIG_LARGE_ALLOCS=y 38CONFIG_LARGE_ALLOCS=y
39CONFIG_FLATMEM=y
40CONFIG_FLAT_NODE_MEM_MAP=y
39 41
40# 42#
41# Code maturity level options 43# Code maturity level options
@@ -51,7 +53,6 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
51CONFIG_LOCALVERSION="" 53CONFIG_LOCALVERSION=""
52# CONFIG_BSD_PROCESS_ACCT is not set 54# CONFIG_BSD_PROCESS_ACCT is not set
53# CONFIG_SYSCTL is not set 55# CONFIG_SYSCTL is not set
54# CONFIG_AUDIT is not set
55# CONFIG_HOTPLUG is not set 56# CONFIG_HOTPLUG is not set
56# CONFIG_IKCONFIG is not set 57# CONFIG_IKCONFIG is not set
57CONFIG_EMBEDDED=y 58CONFIG_EMBEDDED=y
@@ -99,6 +100,11 @@ CONFIG_BINFMT_FLAT=y
99# CONFIG_BINFMT_MISC is not set 100# CONFIG_BINFMT_MISC is not set
100 101
101# 102#
103# Networking
104#
105# CONFIG_NET is not set
106
107#
102# Generic Driver Options 108# Generic Driver Options
103# 109#
104CONFIG_STANDALONE=y 110CONFIG_STANDALONE=y
@@ -146,6 +152,7 @@ CONFIG_MTD_CFI_I2=y
146# Mapping drivers for chip access 152# Mapping drivers for chip access
147# 153#
148# CONFIG_MTD_COMPLEX_MAPPINGS is not set 154# CONFIG_MTD_COMPLEX_MAPPINGS is not set
155# CONFIG_MTD_PLATRAM is not set
149 156
150# 157#
151# Self-contained MTD device drivers 158# Self-contained MTD device drivers
@@ -213,6 +220,7 @@ CONFIG_IOSCHED_NOOP=y
213# 220#
214# Fusion MPT device support 221# Fusion MPT device support
215# 222#
223# CONFIG_FUSION is not set
216 224
217# 225#
218# IEEE 1394 (FireWire) support 226# IEEE 1394 (FireWire) support
@@ -223,9 +231,8 @@ CONFIG_IOSCHED_NOOP=y
223# 231#
224 232
225# 233#
226# Networking support 234# Network device support
227# 235#
228# CONFIG_NET is not set
229# CONFIG_NETPOLL is not set 236# CONFIG_NETPOLL is not set
230# CONFIG_NET_POLL_CONTROLLER is not set 237# CONFIG_NET_POLL_CONTROLLER is not set
231 238
@@ -300,7 +307,6 @@ CONFIG_SERIO=y
300# 307#
301# Ftape, the floppy tape device driver 308# Ftape, the floppy tape device driver
302# 309#
303# CONFIG_DRM is not set
304# CONFIG_RAW_DRIVER is not set 310# CONFIG_RAW_DRIVER is not set
305 311
306# 312#
@@ -324,6 +330,7 @@ CONFIG_SERIO=y
324# CONFIG_JBD is not set 330# CONFIG_JBD is not set
325# CONFIG_REISERFS_FS is not set 331# CONFIG_REISERFS_FS is not set
326# CONFIG_JFS_FS is not set 332# CONFIG_JFS_FS is not set
333# CONFIG_FS_POSIX_ACL is not set
327 334
328# 335#
329# XFS support 336# XFS support
@@ -331,6 +338,8 @@ CONFIG_SERIO=y
331# CONFIG_XFS_FS is not set 338# CONFIG_XFS_FS is not set
332# CONFIG_MINIX_FS is not set 339# CONFIG_MINIX_FS is not set
333CONFIG_ROMFS_FS=y 340CONFIG_ROMFS_FS=y
341# CONFIG_MAGIC_ROM_PTR is not set
342CONFIG_INOTIFY=y
334# CONFIG_QUOTA is not set 343# CONFIG_QUOTA is not set
335CONFIG_DNOTIFY=y 344CONFIG_DNOTIFY=y
336# CONFIG_AUTOFS_FS is not set 345# CONFIG_AUTOFS_FS is not set
diff --git a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c
index c41d72b01b88..abd48409dcca 100644
--- a/arch/v850/kernel/setup.c
+++ b/arch/v850/kernel/setup.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * arch/v850/kernel/setup.c -- Arch-dependent initialization functions 2 * arch/v850/kernel/setup.c -- Arch-dependent initialization functions
3 * 3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation 4 * Copyright (C) 2001,02,03,05 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> 5 * Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org>
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General 7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this 8 * Public License. See the file COPYING in the main directory of this
@@ -98,10 +98,20 @@ void __init trap_init (void)
98} 98}
99 99
100#ifdef CONFIG_MTD 100#ifdef CONFIG_MTD
101
102/* From drivers/mtd/devices/slram.c */
103#define SLRAM_BLK_SZ 0x4000
104
101/* Set the root filesystem to be the given memory region. 105/* Set the root filesystem to be the given memory region.
102 Some parameter may be appended to CMD_LINE. */ 106 Some parameter may be appended to CMD_LINE. */
103void set_mem_root (void *addr, size_t len, char *cmd_line) 107void set_mem_root (void *addr, size_t len, char *cmd_line)
104{ 108{
109 /* Some sort of idiocy in MTD means we must supply a length that's
110 a multiple of SLRAM_BLK_SZ. We just round up the real length,
111 as the file system shouldn't attempt to access anything beyond
112 the end of the image anyway. */
113 len = (((len - 1) + SLRAM_BLK_SZ) / SLRAM_BLK_SZ) * SLRAM_BLK_SZ;
114
105 /* The only way to pass info to the MTD slram driver is via 115 /* The only way to pass info to the MTD slram driver is via
106 the command line. */ 116 the command line. */
107 if (*cmd_line) { 117 if (*cmd_line) {
@@ -284,3 +294,33 @@ init_mem_alloc (unsigned long ram_start, unsigned long ram_len)
284 free_area_init_node (0, NODE_DATA(0), zones_size, 294 free_area_init_node (0, NODE_DATA(0), zones_size,
285 ADDR_TO_PAGE (PAGE_OFFSET), 0); 295 ADDR_TO_PAGE (PAGE_OFFSET), 0);
286} 296}
297
298
299
300/* Taken from m68knommu */
301void show_mem(void)
302{
303 unsigned long i;
304 int free = 0, total = 0, reserved = 0, shared = 0;
305 int cached = 0;
306
307 printk(KERN_INFO "\nMem-info:\n");
308 show_free_areas();
309 i = max_mapnr;
310 while (i-- > 0) {
311 total++;
312 if (PageReserved(mem_map+i))
313 reserved++;
314 else if (PageSwapCache(mem_map+i))
315 cached++;
316 else if (!page_count(mem_map+i))
317 free++;
318 else
319 shared += page_count(mem_map+i) - 1;
320 }
321 printk(KERN_INFO "%d pages of RAM\n",total);
322 printk(KERN_INFO "%d free pages\n",free);
323 printk(KERN_INFO "%d reserved pages\n",reserved);
324 printk(KERN_INFO "%d pages shared\n",shared);
325 printk(KERN_INFO "%d pages swap cached\n",cached);
326}
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index 660a03a89e66..75e52c57f19c 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -24,6 +24,10 @@ config X86
24 bool 24 bool
25 default y 25 default y
26 26
27config SEMAPHORE_SLEEPERS
28 bool
29 default y
30
27config MMU 31config MMU
28 bool 32 bool
29 default y 33 default y
diff --git a/arch/x86_64/kernel/Makefile b/arch/x86_64/kernel/Makefile
index 48f9e2c19cd6..c32e198d7b2b 100644
--- a/arch/x86_64/kernel/Makefile
+++ b/arch/x86_64/kernel/Makefile
@@ -4,10 +4,10 @@
4 4
5extra-y := head.o head64.o init_task.o vmlinux.lds 5extra-y := head.o head64.o init_task.o vmlinux.lds
6EXTRA_AFLAGS := -traditional 6EXTRA_AFLAGS := -traditional
7obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o \ 7obj-y := process.o signal.o entry.o traps.o irq.o \
8 ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_x86_64.o \ 8 ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_x86_64.o \
9 x8664_ksyms.o i387.o syscall.o vsyscall.o \ 9 x8664_ksyms.o i387.o syscall.o vsyscall.o \
10 setup64.o bootflag.o e820.o reboot.o quirks.o 10 setup64.o bootflag.o e820.o reboot.o quirks.o i8237.o
11 11
12obj-$(CONFIG_X86_MCE) += mce.o 12obj-$(CONFIG_X86_MCE) += mce.o
13obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o 13obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o
@@ -45,3 +45,4 @@ swiotlb-$(CONFIG_SWIOTLB) += ../../ia64/lib/swiotlb.o
45microcode-$(subst m,y,$(CONFIG_MICROCODE)) += ../../i386/kernel/microcode.o 45microcode-$(subst m,y,$(CONFIG_MICROCODE)) += ../../i386/kernel/microcode.o
46intel_cacheinfo-y += ../../i386/kernel/cpu/intel_cacheinfo.o 46intel_cacheinfo-y += ../../i386/kernel/cpu/intel_cacheinfo.o
47quirks-y += ../../i386/kernel/quirks.o 47quirks-y += ../../i386/kernel/quirks.o
48i8237-y += ../../i386/kernel/i8237.o
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
index 4e44d6e6b7e5..64a8e05d5811 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86_64/kernel/nmi.c
@@ -290,7 +290,7 @@ void enable_timer_nmi_watchdog(void)
290 290
291static int nmi_pm_active; /* nmi_active before suspend */ 291static int nmi_pm_active; /* nmi_active before suspend */
292 292
293static int lapic_nmi_suspend(struct sys_device *dev, u32 state) 293static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
294{ 294{
295 nmi_pm_active = nmi_active; 295 nmi_pm_active = nmi_active;
296 disable_lapic_nmi_watchdog(); 296 disable_lapic_nmi_watchdog();
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 256c0b1fed10..89299f4ffe12 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -219,7 +219,7 @@ config CRYPTO_CAST6
219 described in RFC2612. 219 described in RFC2612.
220 220
221config CRYPTO_TEA 221config CRYPTO_TEA
222 tristate "TEA and XTEA cipher algorithms" 222 tristate "TEA, XTEA and XETA cipher algorithms"
223 depends on CRYPTO 223 depends on CRYPTO
224 help 224 help
225 TEA cipher algorithm. 225 TEA cipher algorithm.
@@ -232,6 +232,9 @@ config CRYPTO_TEA
232 the TEA algorithm to address a potential key weakness 232 the TEA algorithm to address a potential key weakness
233 in the TEA algorithm. 233 in the TEA algorithm.
234 234
235 Xtendend Encryption Tiny Algorithm is a mis-implementation
236 of the XTEA algorithm for compatibility purposes.
237
235config CRYPTO_ARC4 238config CRYPTO_ARC4
236 tristate "ARC4 cipher algorithm" 239 tristate "ARC4 cipher algorithm"
237 depends on CRYPTO 240 depends on CRYPTO
diff --git a/crypto/api.c b/crypto/api.c
index b4728811ce3b..959c4e5f264f 100644
--- a/crypto/api.c
+++ b/crypto/api.c
@@ -66,7 +66,8 @@ static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
66 66
67static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags) 67static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags)
68{ 68{
69 tfm->crt_flags = 0; 69 tfm->crt_flags = flags & CRYPTO_TFM_REQ_MASK;
70 flags &= ~CRYPTO_TFM_REQ_MASK;
70 71
71 switch (crypto_tfm_alg_type(tfm)) { 72 switch (crypto_tfm_alg_type(tfm)) {
72 case CRYPTO_ALG_TYPE_CIPHER: 73 case CRYPTO_ALG_TYPE_CIPHER:
diff --git a/crypto/cipher.c b/crypto/cipher.c
index 8da644364cb4..3df47f93c9db 100644
--- a/crypto/cipher.c
+++ b/crypto/cipher.c
@@ -377,11 +377,7 @@ static int nocrypt_iv(struct crypto_tfm *tfm,
377int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags) 377int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags)
378{ 378{
379 u32 mode = flags & CRYPTO_TFM_MODE_MASK; 379 u32 mode = flags & CRYPTO_TFM_MODE_MASK;
380
381 tfm->crt_cipher.cit_mode = mode ? mode : CRYPTO_TFM_MODE_ECB; 380 tfm->crt_cipher.cit_mode = mode ? mode : CRYPTO_TFM_MODE_ECB;
382 if (flags & CRYPTO_TFM_REQ_WEAK_KEY)
383 tfm->crt_flags = CRYPTO_TFM_REQ_WEAK_KEY;
384
385 return 0; 381 return 0;
386} 382}
387 383
diff --git a/crypto/internal.h b/crypto/internal.h
index 37515beafc8c..37aa652ce5ce 100644
--- a/crypto/internal.h
+++ b/crypto/internal.h
@@ -17,6 +17,7 @@
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/slab.h>
20#include <asm/kmap_types.h> 21#include <asm/kmap_types.h>
21 22
22extern enum km_type crypto_km_types[]; 23extern enum km_type crypto_km_types[];
@@ -38,7 +39,7 @@ static inline void crypto_kunmap(void *vaddr, int out)
38 39
39static inline void crypto_yield(struct crypto_tfm *tfm) 40static inline void crypto_yield(struct crypto_tfm *tfm)
40{ 41{
41 if (!in_atomic()) 42 if (tfm->crt_flags & CRYPTO_TFM_REQ_MAY_SLEEP)
42 cond_resched(); 43 cond_resched();
43} 44}
44 45
diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c
index bd7524cfff33..68639419c5bd 100644
--- a/crypto/tcrypt.c
+++ b/crypto/tcrypt.c
@@ -72,7 +72,7 @@ static char *check[] = {
72 "des", "md5", "des3_ede", "rot13", "sha1", "sha256", "blowfish", 72 "des", "md5", "des3_ede", "rot13", "sha1", "sha256", "blowfish",
73 "twofish", "serpent", "sha384", "sha512", "md4", "aes", "cast6", 73 "twofish", "serpent", "sha384", "sha512", "md4", "aes", "cast6",
74 "arc4", "michael_mic", "deflate", "crc32c", "tea", "xtea", 74 "arc4", "michael_mic", "deflate", "crc32c", "tea", "xtea",
75 "khazad", "wp512", "wp384", "wp256", "tnepres", NULL 75 "khazad", "wp512", "wp384", "wp256", "tnepres", "xeta", NULL
76}; 76};
77 77
78static void hexdump(unsigned char *buf, unsigned int len) 78static void hexdump(unsigned char *buf, unsigned int len)
@@ -859,6 +859,10 @@ static void do_test(void)
859 test_cipher ("anubis", MODE_CBC, ENCRYPT, anubis_cbc_enc_tv_template, ANUBIS_CBC_ENC_TEST_VECTORS); 859 test_cipher ("anubis", MODE_CBC, ENCRYPT, anubis_cbc_enc_tv_template, ANUBIS_CBC_ENC_TEST_VECTORS);
860 test_cipher ("anubis", MODE_CBC, DECRYPT, anubis_cbc_dec_tv_template, ANUBIS_CBC_ENC_TEST_VECTORS); 860 test_cipher ("anubis", MODE_CBC, DECRYPT, anubis_cbc_dec_tv_template, ANUBIS_CBC_ENC_TEST_VECTORS);
861 861
862 //XETA
863 test_cipher ("xeta", MODE_ECB, ENCRYPT, xeta_enc_tv_template, XETA_ENC_TEST_VECTORS);
864 test_cipher ("xeta", MODE_ECB, DECRYPT, xeta_dec_tv_template, XETA_DEC_TEST_VECTORS);
865
862 test_hash("sha384", sha384_tv_template, SHA384_TEST_VECTORS); 866 test_hash("sha384", sha384_tv_template, SHA384_TEST_VECTORS);
863 test_hash("sha512", sha512_tv_template, SHA512_TEST_VECTORS); 867 test_hash("sha512", sha512_tv_template, SHA512_TEST_VECTORS);
864 test_hash("wp512", wp512_tv_template, WP512_TEST_VECTORS); 868 test_hash("wp512", wp512_tv_template, WP512_TEST_VECTORS);
@@ -1016,6 +1020,11 @@ static void do_test(void)
1016 case 29: 1020 case 29:
1017 test_hash("tgr128", tgr128_tv_template, TGR128_TEST_VECTORS); 1021 test_hash("tgr128", tgr128_tv_template, TGR128_TEST_VECTORS);
1018 break; 1022 break;
1023
1024 case 30:
1025 test_cipher ("xeta", MODE_ECB, ENCRYPT, xeta_enc_tv_template, XETA_ENC_TEST_VECTORS);
1026 test_cipher ("xeta", MODE_ECB, DECRYPT, xeta_dec_tv_template, XETA_DEC_TEST_VECTORS);
1027 break;
1019 1028
1020#ifdef CONFIG_CRYPTO_HMAC 1029#ifdef CONFIG_CRYPTO_HMAC
1021 case 100: 1030 case 100:
diff --git a/crypto/tcrypt.h b/crypto/tcrypt.h
index c01a0ce9b40a..522ffd4b6f43 100644
--- a/crypto/tcrypt.h
+++ b/crypto/tcrypt.h
@@ -2211,7 +2211,7 @@ static struct cipher_testvec xtea_enc_tv_template[] = {
2211 .klen = 16, 2211 .klen = 16,
2212 .input = { [0 ... 8] = 0x00 }, 2212 .input = { [0 ... 8] = 0x00 },
2213 .ilen = 8, 2213 .ilen = 8,
2214 .result = { 0xaa, 0x22, 0x96, 0xe5, 0x6c, 0x61, 0xf3, 0x45 }, 2214 .result = { 0xd8, 0xd4, 0xe9, 0xde, 0xd9, 0x1e, 0x13, 0xf7 },
2215 .rlen = 8, 2215 .rlen = 8,
2216 }, { 2216 }, {
2217 .key = { 0x2b, 0x02, 0x05, 0x68, 0x06, 0x14, 0x49, 0x76, 2217 .key = { 0x2b, 0x02, 0x05, 0x68, 0x06, 0x14, 0x49, 0x76,
@@ -2219,31 +2219,31 @@ static struct cipher_testvec xtea_enc_tv_template[] = {
2219 .klen = 16, 2219 .klen = 16,
2220 .input = { 0x74, 0x65, 0x73, 0x74, 0x20, 0x6d, 0x65, 0x2e }, 2220 .input = { 0x74, 0x65, 0x73, 0x74, 0x20, 0x6d, 0x65, 0x2e },
2221 .ilen = 8, 2221 .ilen = 8,
2222 .result = { 0x82, 0x3e, 0xeb, 0x35, 0xdc, 0xdd, 0xd9, 0xc3 }, 2222 .result = { 0x94, 0xeb, 0xc8, 0x96, 0x84, 0x6a, 0x49, 0xa8 },
2223 .rlen = 8, 2223 .rlen = 8,
2224 }, { 2224 }, {
2225 .key = { 0x09, 0x65, 0x43, 0x11, 0x66, 0x44, 0x39, 0x25, 2225 .key = { 0x09, 0x65, 0x43, 0x11, 0x66, 0x44, 0x39, 0x25,
2226 0x51, 0x3a, 0x16, 0x10, 0x0a, 0x08, 0x12, 0x6e }, 2226 0x51, 0x3a, 0x16, 0x10, 0x0a, 0x08, 0x12, 0x6e },
2227 .klen = 16, 2227 .klen = 16,
2228 .input = { 0x6c, 0x6f, 0x6e, 0x67, 0x65, 0x72, 0x5f, 0x74, 2228 .input = { 0x3e, 0xce, 0xae, 0x22, 0x60, 0x56, 0xa8, 0x9d,
2229 0x65, 0x73, 0x74, 0x5f, 0x76, 0x65, 0x63, 0x74 }, 2229 0x65, 0x73, 0x74, 0x5f, 0x76, 0x65, 0x63, 0x74 },
2230 .ilen = 16, 2230 .ilen = 16,
2231 .result = { 0xe2, 0x04, 0xdb, 0xf2, 0x89, 0x85, 0x9e, 0xea, 2231 .result = { 0xe2, 0x04, 0xdb, 0xf2, 0x89, 0x85, 0x9e, 0xea,
2232 0x61, 0x35, 0xaa, 0xed, 0xb5, 0xcb, 0x71, 0x2c }, 2232 0x61, 0x35, 0xaa, 0xed, 0xb5, 0xcb, 0x71, 0x2c },
2233 .rlen = 16, 2233 .rlen = 16,
2234 }, { 2234 }, {
2235 .key = { 0x4d, 0x76, 0x32, 0x17, 0x05, 0x3f, 0x75, 0x2c, 2235 .key = { 0x4d, 0x76, 0x32, 0x17, 0x05, 0x3f, 0x75, 0x2c,
2236 0x5d, 0x04, 0x16, 0x36, 0x15, 0x72, 0x63, 0x2f }, 2236 0x5d, 0x04, 0x16, 0x36, 0x15, 0x72, 0x63, 0x2f },
2237 .klen = 16, 2237 .klen = 16,
2238 .input = { 0x54, 0x65, 0x61, 0x20, 0x69, 0x73, 0x20, 0x67, 2238 .input = { 0x54, 0x65, 0x61, 0x20, 0x69, 0x73, 0x20, 0x67,
2239 0x6f, 0x6f, 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 2239 0x6f, 0x6f, 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20,
2240 0x79, 0x6f, 0x75, 0x21, 0x21, 0x21, 0x20, 0x72, 2240 0x79, 0x6f, 0x75, 0x21, 0x21, 0x21, 0x20, 0x72,
2241 0x65, 0x61, 0x6c, 0x6c, 0x79, 0x21, 0x21, 0x21 }, 2241 0x65, 0x61, 0x6c, 0x6c, 0x79, 0x21, 0x21, 0x21 },
2242 .ilen = 32, 2242 .ilen = 32,
2243 .result = { 0x0b, 0x03, 0xcd, 0x8a, 0xbe, 0x95, 0xfd, 0xb1, 2243 .result = { 0x99, 0x81, 0x9f, 0x5d, 0x6f, 0x4b, 0x31, 0x3a,
2244 0xc1, 0x44, 0x91, 0x0b, 0xa5, 0xc9, 0x1b, 0xb4, 2244 0x86, 0xff, 0x6f, 0xd0, 0xe3, 0x87, 0x70, 0x07,
2245 0xa9, 0xda, 0x1e, 0x9e, 0xb1, 0x3e, 0x2a, 0x8f, 2245 0x4d, 0xb8, 0xcf, 0xf3, 0x99, 0x50, 0xb3, 0xd4,
2246 0xea, 0xa5, 0x6a, 0x85, 0xd1, 0xf4, 0xa8, 0xa5 }, 2246 0x73, 0xa2, 0xfa, 0xc9, 0x16, 0x59, 0x5d, 0x81 },
2247 .rlen = 32, 2247 .rlen = 32,
2248 } 2248 }
2249}; 2249};
@@ -2252,7 +2252,7 @@ static struct cipher_testvec xtea_dec_tv_template[] = {
2252 { 2252 {
2253 .key = { [0 ... 15] = 0x00 }, 2253 .key = { [0 ... 15] = 0x00 },
2254 .klen = 16, 2254 .klen = 16,
2255 .input = { 0xaa, 0x22, 0x96, 0xe5, 0x6c, 0x61, 0xf3, 0x45 }, 2255 .input = { 0xd8, 0xd4, 0xe9, 0xde, 0xd9, 0x1e, 0x13, 0xf7 },
2256 .ilen = 8, 2256 .ilen = 8,
2257 .result = { [0 ... 8] = 0x00 }, 2257 .result = { [0 ... 8] = 0x00 },
2258 .rlen = 8, 2258 .rlen = 8,
@@ -2260,7 +2260,7 @@ static struct cipher_testvec xtea_dec_tv_template[] = {
2260 .key = { 0x2b, 0x02, 0x05, 0x68, 0x06, 0x14, 0x49, 0x76, 2260 .key = { 0x2b, 0x02, 0x05, 0x68, 0x06, 0x14, 0x49, 0x76,
2261 0x77, 0x5d, 0x0e, 0x26, 0x6c, 0x28, 0x78, 0x43 }, 2261 0x77, 0x5d, 0x0e, 0x26, 0x6c, 0x28, 0x78, 0x43 },
2262 .klen = 16, 2262 .klen = 16,
2263 .input = { 0x82, 0x3e, 0xeb, 0x35, 0xdc, 0xdd, 0xd9, 0xc3 }, 2263 .input = { 0x94, 0xeb, 0xc8, 0x96, 0x84, 0x6a, 0x49, 0xa8 },
2264 .ilen = 8, 2264 .ilen = 8,
2265 .result = { 0x74, 0x65, 0x73, 0x74, 0x20, 0x6d, 0x65, 0x2e }, 2265 .result = { 0x74, 0x65, 0x73, 0x74, 0x20, 0x6d, 0x65, 0x2e },
2266 .rlen = 8, 2266 .rlen = 8,
@@ -2268,24 +2268,24 @@ static struct cipher_testvec xtea_dec_tv_template[] = {
2268 .key = { 0x09, 0x65, 0x43, 0x11, 0x66, 0x44, 0x39, 0x25, 2268 .key = { 0x09, 0x65, 0x43, 0x11, 0x66, 0x44, 0x39, 0x25,
2269 0x51, 0x3a, 0x16, 0x10, 0x0a, 0x08, 0x12, 0x6e }, 2269 0x51, 0x3a, 0x16, 0x10, 0x0a, 0x08, 0x12, 0x6e },
2270 .klen = 16, 2270 .klen = 16,
2271 .input = { 0xe2, 0x04, 0xdb, 0xf2, 0x89, 0x85, 0x9e, 0xea, 2271 .input = { 0x3e, 0xce, 0xae, 0x22, 0x60, 0x56, 0xa8, 0x9d,
2272 0x61, 0x35, 0xaa, 0xed, 0xb5, 0xcb, 0x71, 0x2c }, 2272 0x77, 0x4d, 0xd4, 0xb4, 0x87, 0x24, 0xe3, 0x9a },
2273 .ilen = 16, 2273 .ilen = 16,
2274 .result = { 0x6c, 0x6f, 0x6e, 0x67, 0x65, 0x72, 0x5f, 0x74, 2274 .result = { 0x6c, 0x6f, 0x6e, 0x67, 0x65, 0x72, 0x5f, 0x74,
2275 0x65, 0x73, 0x74, 0x5f, 0x76, 0x65, 0x63, 0x74 }, 2275 0x65, 0x73, 0x74, 0x5f, 0x76, 0x65, 0x63, 0x74 },
2276 .rlen = 16, 2276 .rlen = 16,
2277 }, { 2277 }, {
2278 .key = { 0x4d, 0x76, 0x32, 0x17, 0x05, 0x3f, 0x75, 0x2c, 2278 .key = { 0x4d, 0x76, 0x32, 0x17, 0x05, 0x3f, 0x75, 0x2c,
2279 0x5d, 0x04, 0x16, 0x36, 0x15, 0x72, 0x63, 0x2f }, 2279 0x5d, 0x04, 0x16, 0x36, 0x15, 0x72, 0x63, 0x2f },
2280 .klen = 16, 2280 .klen = 16,
2281 .input = { 0x0b, 0x03, 0xcd, 0x8a, 0xbe, 0x95, 0xfd, 0xb1, 2281 .input = { 0x99, 0x81, 0x9f, 0x5d, 0x6f, 0x4b, 0x31, 0x3a,
2282 0xc1, 0x44, 0x91, 0x0b, 0xa5, 0xc9, 0x1b, 0xb4, 2282 0x86, 0xff, 0x6f, 0xd0, 0xe3, 0x87, 0x70, 0x07,
2283 0xa9, 0xda, 0x1e, 0x9e, 0xb1, 0x3e, 0x2a, 0x8f, 2283 0x4d, 0xb8, 0xcf, 0xf3, 0x99, 0x50, 0xb3, 0xd4,
2284 0xea, 0xa5, 0x6a, 0x85, 0xd1, 0xf4, 0xa8, 0xa5 }, 2284 0x73, 0xa2, 0xfa, 0xc9, 0x16, 0x59, 0x5d, 0x81 },
2285 .ilen = 32, 2285 .ilen = 32,
2286 .result = { 0x54, 0x65, 0x61, 0x20, 0x69, 0x73, 0x20, 0x67, 2286 .result = { 0x54, 0x65, 0x61, 0x20, 0x69, 0x73, 0x20, 0x67,
2287 0x6f, 0x6f, 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 2287 0x6f, 0x6f, 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20,
2288 0x79, 0x6f, 0x75, 0x21, 0x21, 0x21, 0x20, 0x72, 2288 0x79, 0x6f, 0x75, 0x21, 0x21, 0x21, 0x20, 0x72,
2289 0x65, 0x61, 0x6c, 0x6c, 0x79, 0x21, 0x21, 0x21 }, 2289 0x65, 0x61, 0x6c, 0x6c, 0x79, 0x21, 0x21, 0x21 },
2290 .rlen = 32, 2290 .rlen = 32,
2291 } 2291 }
@@ -2594,6 +2594,98 @@ static struct cipher_testvec anubis_cbc_dec_tv_template[] = {
2594 }, 2594 },
2595}; 2595};
2596 2596
2597/*
2598 * XETA test vectors
2599 */
2600#define XETA_ENC_TEST_VECTORS 4
2601#define XETA_DEC_TEST_VECTORS 4
2602
2603static struct cipher_testvec xeta_enc_tv_template[] = {
2604 {
2605 .key = { [0 ... 15] = 0x00 },
2606 .klen = 16,
2607 .input = { [0 ... 8] = 0x00 },
2608 .ilen = 8,
2609 .result = { 0xaa, 0x22, 0x96, 0xe5, 0x6c, 0x61, 0xf3, 0x45 },
2610 .rlen = 8,
2611 }, {
2612 .key = { 0x2b, 0x02, 0x05, 0x68, 0x06, 0x14, 0x49, 0x76,
2613 0x77, 0x5d, 0x0e, 0x26, 0x6c, 0x28, 0x78, 0x43 },
2614 .klen = 16,
2615 .input = { 0x74, 0x65, 0x73, 0x74, 0x20, 0x6d, 0x65, 0x2e },
2616 .ilen = 8,
2617 .result = { 0x82, 0x3e, 0xeb, 0x35, 0xdc, 0xdd, 0xd9, 0xc3 },
2618 .rlen = 8,
2619 }, {
2620 .key = { 0x09, 0x65, 0x43, 0x11, 0x66, 0x44, 0x39, 0x25,
2621 0x51, 0x3a, 0x16, 0x10, 0x0a, 0x08, 0x12, 0x6e },
2622 .klen = 16,
2623 .input = { 0x6c, 0x6f, 0x6e, 0x67, 0x65, 0x72, 0x5f, 0x74,
2624 0x65, 0x73, 0x74, 0x5f, 0x76, 0x65, 0x63, 0x74 },
2625 .ilen = 16,
2626 .result = { 0xe2, 0x04, 0xdb, 0xf2, 0x89, 0x85, 0x9e, 0xea,
2627 0x61, 0x35, 0xaa, 0xed, 0xb5, 0xcb, 0x71, 0x2c },
2628 .rlen = 16,
2629 }, {
2630 .key = { 0x4d, 0x76, 0x32, 0x17, 0x05, 0x3f, 0x75, 0x2c,
2631 0x5d, 0x04, 0x16, 0x36, 0x15, 0x72, 0x63, 0x2f },
2632 .klen = 16,
2633 .input = { 0x54, 0x65, 0x61, 0x20, 0x69, 0x73, 0x20, 0x67,
2634 0x6f, 0x6f, 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20,
2635 0x79, 0x6f, 0x75, 0x21, 0x21, 0x21, 0x20, 0x72,
2636 0x65, 0x61, 0x6c, 0x6c, 0x79, 0x21, 0x21, 0x21 },
2637 .ilen = 32,
2638 .result = { 0x0b, 0x03, 0xcd, 0x8a, 0xbe, 0x95, 0xfd, 0xb1,
2639 0xc1, 0x44, 0x91, 0x0b, 0xa5, 0xc9, 0x1b, 0xb4,
2640 0xa9, 0xda, 0x1e, 0x9e, 0xb1, 0x3e, 0x2a, 0x8f,
2641 0xea, 0xa5, 0x6a, 0x85, 0xd1, 0xf4, 0xa8, 0xa5 },
2642 .rlen = 32,
2643 }
2644};
2645
2646static struct cipher_testvec xeta_dec_tv_template[] = {
2647 {
2648 .key = { [0 ... 15] = 0x00 },
2649 .klen = 16,
2650 .input = { 0xaa, 0x22, 0x96, 0xe5, 0x6c, 0x61, 0xf3, 0x45 },
2651 .ilen = 8,
2652 .result = { [0 ... 8] = 0x00 },
2653 .rlen = 8,
2654 }, {
2655 .key = { 0x2b, 0x02, 0x05, 0x68, 0x06, 0x14, 0x49, 0x76,
2656 0x77, 0x5d, 0x0e, 0x26, 0x6c, 0x28, 0x78, 0x43 },
2657 .klen = 16,
2658 .input = { 0x82, 0x3e, 0xeb, 0x35, 0xdc, 0xdd, 0xd9, 0xc3 },
2659 .ilen = 8,
2660 .result = { 0x74, 0x65, 0x73, 0x74, 0x20, 0x6d, 0x65, 0x2e },
2661 .rlen = 8,
2662 }, {
2663 .key = { 0x09, 0x65, 0x43, 0x11, 0x66, 0x44, 0x39, 0x25,
2664 0x51, 0x3a, 0x16, 0x10, 0x0a, 0x08, 0x12, 0x6e },
2665 .klen = 16,
2666 .input = { 0xe2, 0x04, 0xdb, 0xf2, 0x89, 0x85, 0x9e, 0xea,
2667 0x61, 0x35, 0xaa, 0xed, 0xb5, 0xcb, 0x71, 0x2c },
2668 .ilen = 16,
2669 .result = { 0x6c, 0x6f, 0x6e, 0x67, 0x65, 0x72, 0x5f, 0x74,
2670 0x65, 0x73, 0x74, 0x5f, 0x76, 0x65, 0x63, 0x74 },
2671 .rlen = 16,
2672 }, {
2673 .key = { 0x4d, 0x76, 0x32, 0x17, 0x05, 0x3f, 0x75, 0x2c,
2674 0x5d, 0x04, 0x16, 0x36, 0x15, 0x72, 0x63, 0x2f },
2675 .klen = 16,
2676 .input = { 0x0b, 0x03, 0xcd, 0x8a, 0xbe, 0x95, 0xfd, 0xb1,
2677 0xc1, 0x44, 0x91, 0x0b, 0xa5, 0xc9, 0x1b, 0xb4,
2678 0xa9, 0xda, 0x1e, 0x9e, 0xb1, 0x3e, 0x2a, 0x8f,
2679 0xea, 0xa5, 0x6a, 0x85, 0xd1, 0xf4, 0xa8, 0xa5 },
2680 .ilen = 32,
2681 .result = { 0x54, 0x65, 0x61, 0x20, 0x69, 0x73, 0x20, 0x67,
2682 0x6f, 0x6f, 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20,
2683 0x79, 0x6f, 0x75, 0x21, 0x21, 0x21, 0x20, 0x72,
2684 0x65, 0x61, 0x6c, 0x6c, 0x79, 0x21, 0x21, 0x21 },
2685 .rlen = 32,
2686 }
2687};
2688
2597/* 2689/*
2598 * Compression stuff. 2690 * Compression stuff.
2599 */ 2691 */
diff --git a/crypto/tea.c b/crypto/tea.c
index 03c23cbd3afa..5924efdd3a16 100644
--- a/crypto/tea.c
+++ b/crypto/tea.c
@@ -1,11 +1,15 @@
1/* 1/*
2 * Cryptographic API. 2 * Cryptographic API.
3 * 3 *
4 * TEA and Xtended TEA Algorithms 4 * TEA, XTEA, and XETA crypto alogrithms
5 * 5 *
6 * The TEA and Xtended TEA algorithms were developed by David Wheeler 6 * The TEA and Xtended TEA algorithms were developed by David Wheeler
7 * and Roger Needham at the Computer Laboratory of Cambridge University. 7 * and Roger Needham at the Computer Laboratory of Cambridge University.
8 * 8 *
9 * Due to the order of evaluation in XTEA many people have incorrectly
10 * implemented it. XETA (XTEA in the wrong order), exists for
11 * compatibility with these implementations.
12 *
9 * Copyright (c) 2004 Aaron Grothe ajgrothe@yahoo.com 13 * Copyright (c) 2004 Aaron Grothe ajgrothe@yahoo.com
10 * 14 *
11 * This program is free software; you can redistribute it and/or modify 15 * This program is free software; you can redistribute it and/or modify
@@ -153,9 +157,9 @@ static void xtea_encrypt(void *ctx_arg, u8 *dst, const u8 *src)
153 z = u32_in (src + 4); 157 z = u32_in (src + 4);
154 158
155 while (sum != limit) { 159 while (sum != limit) {
156 y += (z << 4 ^ z >> 5) + (z ^ sum) + ctx->KEY[sum&3]; 160 y += ((z << 4 ^ z >> 5) + z) ^ (sum + ctx->KEY[sum&3]);
157 sum += XTEA_DELTA; 161 sum += XTEA_DELTA;
158 z += (y << 4 ^ y >> 5) + (y ^ sum) + ctx->KEY[sum>>11 &3]; 162 z += ((y << 4 ^ y >> 5) + y) ^ (sum + ctx->KEY[sum>>11 &3]);
159 } 163 }
160 164
161 u32_out (dst, y); 165 u32_out (dst, y);
@@ -175,6 +179,51 @@ static void xtea_decrypt(void *ctx_arg, u8 *dst, const u8 *src)
175 sum = XTEA_DELTA * XTEA_ROUNDS; 179 sum = XTEA_DELTA * XTEA_ROUNDS;
176 180
177 while (sum) { 181 while (sum) {
182 z -= ((y << 4 ^ y >> 5) + y) ^ (sum + ctx->KEY[sum>>11 & 3]);
183 sum -= XTEA_DELTA;
184 y -= ((z << 4 ^ z >> 5) + z) ^ (sum + ctx->KEY[sum & 3]);
185 }
186
187 u32_out (dst, y);
188 u32_out (dst + 4, z);
189
190}
191
192
193static void xeta_encrypt(void *ctx_arg, u8 *dst, const u8 *src)
194{
195
196 u32 y, z, sum = 0;
197 u32 limit = XTEA_DELTA * XTEA_ROUNDS;
198
199 struct xtea_ctx *ctx = ctx_arg;
200
201 y = u32_in (src);
202 z = u32_in (src + 4);
203
204 while (sum != limit) {
205 y += (z << 4 ^ z >> 5) + (z ^ sum) + ctx->KEY[sum&3];
206 sum += XTEA_DELTA;
207 z += (y << 4 ^ y >> 5) + (y ^ sum) + ctx->KEY[sum>>11 &3];
208 }
209
210 u32_out (dst, y);
211 u32_out (dst + 4, z);
212
213}
214
215static void xeta_decrypt(void *ctx_arg, u8 *dst, const u8 *src)
216{
217
218 u32 y, z, sum;
219 struct tea_ctx *ctx = ctx_arg;
220
221 y = u32_in (src);
222 z = u32_in (src + 4);
223
224 sum = XTEA_DELTA * XTEA_ROUNDS;
225
226 while (sum) {
178 z -= (y << 4 ^ y >> 5) + (y ^ sum) + ctx->KEY[sum>>11 & 3]; 227 z -= (y << 4 ^ y >> 5) + (y ^ sum) + ctx->KEY[sum>>11 & 3];
179 sum -= XTEA_DELTA; 228 sum -= XTEA_DELTA;
180 y -= (z << 4 ^ z >> 5) + (z ^ sum) + ctx->KEY[sum & 3]; 229 y -= (z << 4 ^ z >> 5) + (z ^ sum) + ctx->KEY[sum & 3];
@@ -215,6 +264,21 @@ static struct crypto_alg xtea_alg = {
215 .cia_decrypt = xtea_decrypt } } 264 .cia_decrypt = xtea_decrypt } }
216}; 265};
217 266
267static struct crypto_alg xeta_alg = {
268 .cra_name = "xeta",
269 .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
270 .cra_blocksize = XTEA_BLOCK_SIZE,
271 .cra_ctxsize = sizeof (struct xtea_ctx),
272 .cra_module = THIS_MODULE,
273 .cra_list = LIST_HEAD_INIT(xtea_alg.cra_list),
274 .cra_u = { .cipher = {
275 .cia_min_keysize = XTEA_KEY_SIZE,
276 .cia_max_keysize = XTEA_KEY_SIZE,
277 .cia_setkey = xtea_setkey,
278 .cia_encrypt = xeta_encrypt,
279 .cia_decrypt = xeta_decrypt } }
280};
281
218static int __init init(void) 282static int __init init(void)
219{ 283{
220 int ret = 0; 284 int ret = 0;
@@ -229,6 +293,13 @@ static int __init init(void)
229 goto out; 293 goto out;
230 } 294 }
231 295
296 ret = crypto_register_alg(&xeta_alg);
297 if (ret < 0) {
298 crypto_unregister_alg(&tea_alg);
299 crypto_unregister_alg(&xtea_alg);
300 goto out;
301 }
302
232out: 303out:
233 return ret; 304 return ret;
234} 305}
@@ -237,12 +308,14 @@ static void __exit fini(void)
237{ 308{
238 crypto_unregister_alg(&tea_alg); 309 crypto_unregister_alg(&tea_alg);
239 crypto_unregister_alg(&xtea_alg); 310 crypto_unregister_alg(&xtea_alg);
311 crypto_unregister_alg(&xeta_alg);
240} 312}
241 313
242MODULE_ALIAS("xtea"); 314MODULE_ALIAS("xtea");
315MODULE_ALIAS("xeta");
243 316
244module_init(init); 317module_init(init);
245module_exit(fini); 318module_exit(fini);
246 319
247MODULE_LICENSE("GPL"); 320MODULE_LICENSE("GPL");
248MODULE_DESCRIPTION("TEA & XTEA Cryptographic Algorithms"); 321MODULE_DESCRIPTION("TEA, XTEA & XETA Cryptographic Algorithms");
diff --git a/drivers/atm/zatm.c b/drivers/atm/zatm.c
index c4b75ecf9460..55959e4d1cb7 100644
--- a/drivers/atm/zatm.c
+++ b/drivers/atm/zatm.c
@@ -417,9 +417,9 @@ printk("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
417 chan = (here[3] & uPD98401_AAL5_CHAN) >> 417 chan = (here[3] & uPD98401_AAL5_CHAN) >>
418 uPD98401_AAL5_CHAN_SHIFT; 418 uPD98401_AAL5_CHAN_SHIFT;
419 if (chan < zatm_dev->chans && zatm_dev->rx_map[chan]) { 419 if (chan < zatm_dev->chans && zatm_dev->rx_map[chan]) {
420 int pos = ZATM_VCC(vcc)->pool; 420 int pos;
421
422 vcc = zatm_dev->rx_map[chan]; 421 vcc = zatm_dev->rx_map[chan];
422 pos = ZATM_VCC(vcc)->pool;
423 if (skb == zatm_dev->last_free[pos]) 423 if (skb == zatm_dev->last_free[pos])
424 zatm_dev->last_free[pos] = NULL; 424 zatm_dev->last_free[pos] = NULL;
425 skb_unlink(skb, zatm_dev->pool + pos); 425 skb_unlink(skb, zatm_dev->pool + pos);
diff --git a/drivers/base/node.c b/drivers/base/node.c
index 904b27caf697..16c513aa4d48 100644
--- a/drivers/base/node.c
+++ b/drivers/base/node.c
@@ -39,13 +39,25 @@ static ssize_t node_read_meminfo(struct sys_device * dev, char * buf)
39 int n; 39 int n;
40 int nid = dev->id; 40 int nid = dev->id;
41 struct sysinfo i; 41 struct sysinfo i;
42 struct page_state ps;
42 unsigned long inactive; 43 unsigned long inactive;
43 unsigned long active; 44 unsigned long active;
44 unsigned long free; 45 unsigned long free;
45 46
46 si_meminfo_node(&i, nid); 47 si_meminfo_node(&i, nid);
48 get_page_state_node(&ps, nid);
47 __get_zone_counts(&active, &inactive, &free, NODE_DATA(nid)); 49 __get_zone_counts(&active, &inactive, &free, NODE_DATA(nid));
48 50
51 /* Check for negative values in these approximate counters */
52 if ((long)ps.nr_dirty < 0)
53 ps.nr_dirty = 0;
54 if ((long)ps.nr_writeback < 0)
55 ps.nr_writeback = 0;
56 if ((long)ps.nr_mapped < 0)
57 ps.nr_mapped = 0;
58 if ((long)ps.nr_slab < 0)
59 ps.nr_slab = 0;
60
49 n = sprintf(buf, "\n" 61 n = sprintf(buf, "\n"
50 "Node %d MemTotal: %8lu kB\n" 62 "Node %d MemTotal: %8lu kB\n"
51 "Node %d MemFree: %8lu kB\n" 63 "Node %d MemFree: %8lu kB\n"
@@ -55,7 +67,11 @@ static ssize_t node_read_meminfo(struct sys_device * dev, char * buf)
55 "Node %d HighTotal: %8lu kB\n" 67 "Node %d HighTotal: %8lu kB\n"
56 "Node %d HighFree: %8lu kB\n" 68 "Node %d HighFree: %8lu kB\n"
57 "Node %d LowTotal: %8lu kB\n" 69 "Node %d LowTotal: %8lu kB\n"
58 "Node %d LowFree: %8lu kB\n", 70 "Node %d LowFree: %8lu kB\n"
71 "Node %d Dirty: %8lu kB\n"
72 "Node %d Writeback: %8lu kB\n"
73 "Node %d Mapped: %8lu kB\n"
74 "Node %d Slab: %8lu kB\n",
59 nid, K(i.totalram), 75 nid, K(i.totalram),
60 nid, K(i.freeram), 76 nid, K(i.freeram),
61 nid, K(i.totalram - i.freeram), 77 nid, K(i.totalram - i.freeram),
@@ -64,7 +80,11 @@ static ssize_t node_read_meminfo(struct sys_device * dev, char * buf)
64 nid, K(i.totalhigh), 80 nid, K(i.totalhigh),
65 nid, K(i.freehigh), 81 nid, K(i.freehigh),
66 nid, K(i.totalram - i.totalhigh), 82 nid, K(i.totalram - i.totalhigh),
67 nid, K(i.freeram - i.freehigh)); 83 nid, K(i.freeram - i.freehigh),
84 nid, K(ps.nr_dirty),
85 nid, K(ps.nr_writeback),
86 nid, K(ps.nr_mapped),
87 nid, K(ps.nr_slab));
68 n += hugetlb_report_node_meminfo(nid, buf + n); 88 n += hugetlb_report_node_meminfo(nid, buf + n);
69 return n; 89 return n;
70} 90}
diff --git a/drivers/base/power/resume.c b/drivers/base/power/resume.c
index bdd96b03b885..0a7aa07b9a2a 100644
--- a/drivers/base/power/resume.c
+++ b/drivers/base/power/resume.c
@@ -26,11 +26,11 @@ int resume_device(struct device * dev)
26 26
27 down(&dev->sem); 27 down(&dev->sem);
28 if (dev->power.pm_parent 28 if (dev->power.pm_parent
29 && dev->power.pm_parent->power.power_state) { 29 && dev->power.pm_parent->power.power_state.event) {
30 dev_err(dev, "PM: resume from %d, parent %s still %d\n", 30 dev_err(dev, "PM: resume from %d, parent %s still %d\n",
31 dev->power.power_state, 31 dev->power.power_state.event,
32 dev->power.pm_parent->bus_id, 32 dev->power.pm_parent->bus_id,
33 dev->power.pm_parent->power.power_state); 33 dev->power.pm_parent->power.power_state.event);
34 } 34 }
35 if (dev->bus && dev->bus->resume) { 35 if (dev->bus && dev->bus->resume) {
36 dev_dbg(dev,"resuming\n"); 36 dev_dbg(dev,"resuming\n");
@@ -54,7 +54,7 @@ void dpm_resume(void)
54 list_add_tail(entry, &dpm_active); 54 list_add_tail(entry, &dpm_active);
55 55
56 up(&dpm_list_sem); 56 up(&dpm_list_sem);
57 if (!dev->power.prev_state) 57 if (!dev->power.prev_state.event)
58 resume_device(dev); 58 resume_device(dev);
59 down(&dpm_list_sem); 59 down(&dpm_list_sem);
60 put_device(dev); 60 put_device(dev);
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 325962d80191..e8f0519f5dfa 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -13,10 +13,10 @@
13static void runtime_resume(struct device * dev) 13static void runtime_resume(struct device * dev)
14{ 14{
15 dev_dbg(dev, "resuming\n"); 15 dev_dbg(dev, "resuming\n");
16 if (!dev->power.power_state) 16 if (!dev->power.power_state.event)
17 return; 17 return;
18 if (!resume_device(dev)) 18 if (!resume_device(dev))
19 dev->power.power_state = 0; 19 dev->power.power_state = PMSG_ON;
20} 20}
21 21
22 22
@@ -49,10 +49,10 @@ int dpm_runtime_suspend(struct device * dev, pm_message_t state)
49 int error = 0; 49 int error = 0;
50 50
51 down(&dpm_sem); 51 down(&dpm_sem);
52 if (dev->power.power_state == state) 52 if (dev->power.power_state.event == state.event)
53 goto Done; 53 goto Done;
54 54
55 if (dev->power.power_state) 55 if (dev->power.power_state.event)
56 runtime_resume(dev); 56 runtime_resume(dev);
57 57
58 if (!(error = suspend_device(dev, state))) 58 if (!(error = suspend_device(dev, state)))
diff --git a/drivers/base/power/suspend.c b/drivers/base/power/suspend.c
index 2ccee3763acf..50501764d050 100644
--- a/drivers/base/power/suspend.c
+++ b/drivers/base/power/suspend.c
@@ -40,22 +40,22 @@ int suspend_device(struct device * dev, pm_message_t state)
40 int error = 0; 40 int error = 0;
41 41
42 down(&dev->sem); 42 down(&dev->sem);
43 if (dev->power.power_state) { 43 if (dev->power.power_state.event) {
44 dev_dbg(dev, "PM: suspend %d-->%d\n", 44 dev_dbg(dev, "PM: suspend %d-->%d\n",
45 dev->power.power_state, state); 45 dev->power.power_state.event, state.event);
46 } 46 }
47 if (dev->power.pm_parent 47 if (dev->power.pm_parent
48 && dev->power.pm_parent->power.power_state) { 48 && dev->power.pm_parent->power.power_state.event) {
49 dev_err(dev, 49 dev_err(dev,
50 "PM: suspend %d->%d, parent %s already %d\n", 50 "PM: suspend %d->%d, parent %s already %d\n",
51 dev->power.power_state, state, 51 dev->power.power_state.event, state.event,
52 dev->power.pm_parent->bus_id, 52 dev->power.pm_parent->bus_id,
53 dev->power.pm_parent->power.power_state); 53 dev->power.pm_parent->power.power_state.event);
54 } 54 }
55 55
56 dev->power.prev_state = dev->power.power_state; 56 dev->power.prev_state = dev->power.power_state;
57 57
58 if (dev->bus && dev->bus->suspend && !dev->power.power_state) { 58 if (dev->bus && dev->bus->suspend && !dev->power.power_state.event) {
59 dev_dbg(dev, "suspending\n"); 59 dev_dbg(dev, "suspending\n");
60 error = dev->bus->suspend(dev, state); 60 error = dev->bus->suspend(dev, state);
61 } 61 }
diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
index f82b3df9545f..8d04fb435c17 100644
--- a/drivers/base/power/sysfs.c
+++ b/drivers/base/power/sysfs.c
@@ -26,19 +26,19 @@
26 26
27static ssize_t state_show(struct device * dev, struct device_attribute *attr, char * buf) 27static ssize_t state_show(struct device * dev, struct device_attribute *attr, char * buf)
28{ 28{
29 return sprintf(buf, "%u\n", dev->power.power_state); 29 return sprintf(buf, "%u\n", dev->power.power_state.event);
30} 30}
31 31
32static ssize_t state_store(struct device * dev, struct device_attribute *attr, const char * buf, size_t n) 32static ssize_t state_store(struct device * dev, struct device_attribute *attr, const char * buf, size_t n)
33{ 33{
34 u32 state; 34 pm_message_t state;
35 char * rest; 35 char * rest;
36 int error = 0; 36 int error = 0;
37 37
38 state = simple_strtoul(buf, &rest, 10); 38 state.event = simple_strtoul(buf, &rest, 10);
39 if (*rest) 39 if (*rest)
40 return -EINVAL; 40 return -EINVAL;
41 if (state) 41 if (state.event)
42 error = dpm_runtime_suspend(dev, state); 42 error = dpm_runtime_suspend(dev, state);
43 else 43 else
44 dpm_runtime_resume(dev); 44 dpm_runtime_resume(dev);
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index b594768b0241..879036d4b30b 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -455,7 +455,7 @@ config INITRAMFS_ROOT_GID
455#for instance. 455#for instance.
456config LBD 456config LBD
457 bool "Support for Large Block Devices" 457 bool "Support for Large Block Devices"
458 depends on X86 || MIPS32 || PPC32 || ARCH_S390_31 || SUPERH || UML 458 depends on X86 || (MIPS && 32BIT) || PPC32 || ARCH_S390_31 || SUPERH || UML
459 help 459 help
460 Say Y here if you want to attach large (bigger than 2TB) discs to 460 Say Y here if you want to attach large (bigger than 2TB) discs to
461 your machine, or if you want to have a raid or loopback device 461 your machine, or if you want to have a raid or loopback device
diff --git a/drivers/block/cryptoloop.c b/drivers/block/cryptoloop.c
index 5be6f998d8c5..3d4261c39f16 100644
--- a/drivers/block/cryptoloop.c
+++ b/drivers/block/cryptoloop.c
@@ -57,9 +57,11 @@ cryptoloop_init(struct loop_device *lo, const struct loop_info64 *info)
57 mode = strsep(&cmsp, "-"); 57 mode = strsep(&cmsp, "-");
58 58
59 if (mode == NULL || strcmp(mode, "cbc") == 0) 59 if (mode == NULL || strcmp(mode, "cbc") == 0)
60 tfm = crypto_alloc_tfm(cipher, CRYPTO_TFM_MODE_CBC); 60 tfm = crypto_alloc_tfm(cipher, CRYPTO_TFM_MODE_CBC |
61 CRYPTO_TFM_REQ_MAY_SLEEP);
61 else if (strcmp(mode, "ecb") == 0) 62 else if (strcmp(mode, "ecb") == 0)
62 tfm = crypto_alloc_tfm(cipher, CRYPTO_TFM_MODE_ECB); 63 tfm = crypto_alloc_tfm(cipher, CRYPTO_TFM_MODE_ECB |
64 CRYPTO_TFM_REQ_MAY_SLEEP);
63 if (tfm == NULL) 65 if (tfm == NULL)
64 return -EINVAL; 66 return -EINVAL;
65 67
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 7333b41d4224..df5f2b0e0750 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -175,7 +175,7 @@ config MOXA_INTELLIO
175 175
176config MOXA_SMARTIO 176config MOXA_SMARTIO
177 tristate "Moxa SmartIO support" 177 tristate "Moxa SmartIO support"
178 depends on SERIAL_NONSTANDARD 178 depends on SERIAL_NONSTANDARD && (BROKEN || !SPARC32)
179 help 179 help
180 Say Y here if you have a Moxa SmartIO multiport serial card. 180 Say Y here if you have a Moxa SmartIO multiport serial card.
181 181
@@ -842,8 +842,7 @@ config SONYPI
842 842
843config TANBAC_TB0219 843config TANBAC_TB0219
844 tristate "TANBAC TB0219 base board support" 844 tristate "TANBAC TB0219 base board support"
845 depends TANBAC_TB0229 845 depends TANBAC_TB022X
846
847 846
848menu "Ftape, the floppy tape device driver" 847menu "Ftape, the floppy tape device driver"
849 848
diff --git a/drivers/char/moxa.c b/drivers/char/moxa.c
index 95f7046ff059..79e490ef2cf2 100644
--- a/drivers/char/moxa.c
+++ b/drivers/char/moxa.c
@@ -339,7 +339,7 @@ static int __init moxa_init(void)
339 339
340 init_MUTEX(&moxaBuffSem); 340 init_MUTEX(&moxaBuffSem);
341 moxaDriver->owner = THIS_MODULE; 341 moxaDriver->owner = THIS_MODULE;
342 moxaDriver->name = "ttya"; 342 moxaDriver->name = "ttyMX";
343 moxaDriver->devfs_name = "tts/a"; 343 moxaDriver->devfs_name = "tts/a";
344 moxaDriver->major = ttymajor; 344 moxaDriver->major = ttymajor;
345 moxaDriver->minor_start = 0; 345 moxaDriver->minor_start = 0;
diff --git a/drivers/char/mwave/mwavedd.c b/drivers/char/mwave/mwavedd.c
index d568991ac6b3..8666171e187b 100644
--- a/drivers/char/mwave/mwavedd.c
+++ b/drivers/char/mwave/mwavedd.c
@@ -57,6 +57,7 @@
57#include <linux/sched.h> 57#include <linux/sched.h>
58#include <linux/spinlock.h> 58#include <linux/spinlock.h>
59#include <linux/delay.h> 59#include <linux/delay.h>
60#include <linux/serial_8250.h>
60#include "smapi.h" 61#include "smapi.h"
61#include "mwavedd.h" 62#include "mwavedd.h"
62#include "3780i.h" 63#include "3780i.h"
@@ -410,8 +411,8 @@ static ssize_t mwave_write(struct file *file, const char __user *buf,
410 411
411static int register_serial_portandirq(unsigned int port, int irq) 412static int register_serial_portandirq(unsigned int port, int irq)
412{ 413{
413 struct serial_struct serial; 414 struct uart_port uart;
414 415
415 switch ( port ) { 416 switch ( port ) {
416 case 0x3f8: 417 case 0x3f8:
417 case 0x2f8: 418 case 0x2f8:
@@ -442,12 +443,14 @@ static int register_serial_portandirq(unsigned int port, int irq)
442 } /* switch */ 443 } /* switch */
443 /* irq is okay */ 444 /* irq is okay */
444 445
445 memset(&serial, 0, sizeof(serial)); 446 memset(&uart, 0, sizeof(struct uart_port));
446 serial.port = port; 447
447 serial.irq = irq; 448 uart.uartclk = 1843200;
448 serial.flags = ASYNC_SHARE_IRQ; 449 uart.iobase = port;
449 450 uart.irq = irq;
450 return register_serial(&serial); 451 uart.iotype = UPIO_PORT;
452 uart.flags = UPF_SHARE_IRQ;
453 return serial8250_register_port(&uart);
451} 454}
452 455
453 456
@@ -523,7 +526,7 @@ static void mwave_exit(void)
523#endif 526#endif
524 527
525 if ( pDrvData->sLine >= 0 ) { 528 if ( pDrvData->sLine >= 0 ) {
526 unregister_serial(pDrvData->sLine); 529 serial8250_unregister_port(pDrvData->sLine);
527 } 530 }
528 if (pDrvData->bMwaveDevRegistered) { 531 if (pDrvData->bMwaveDevRegistered) {
529 misc_deregister(&mwave_misc_dev); 532 misc_deregister(&mwave_misc_dev);
diff --git a/drivers/char/snsc_event.c b/drivers/char/snsc_event.c
index d692af57213a..baaa365285fa 100644
--- a/drivers/char/snsc_event.c
+++ b/drivers/char/snsc_event.c
@@ -19,6 +19,7 @@
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <linux/byteorder/generic.h> 20#include <linux/byteorder/generic.h>
21#include <asm/sn/sn_sal.h> 21#include <asm/sn/sn_sal.h>
22#include <asm/unaligned.h>
22#include "snsc.h" 23#include "snsc.h"
23 24
24static struct subch_data_s *event_sd; 25static struct subch_data_s *event_sd;
@@ -62,13 +63,16 @@ static int
62scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc) 63scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc)
63{ 64{
64 char *desc_end; 65 char *desc_end;
66 __be32 from_buf;
65 67
66 /* record event source address */ 68 /* record event source address */
67 *src = be32_to_cpup((__be32 *)event); 69 from_buf = get_unaligned((__be32 *)event);
70 *src = be32_to_cpup(&from_buf);
68 event += 4; /* move on to event code */ 71 event += 4; /* move on to event code */
69 72
70 /* record the system controller's event code */ 73 /* record the system controller's event code */
71 *code = be32_to_cpup((__be32 *)event); 74 from_buf = get_unaligned((__be32 *)event);
75 *code = be32_to_cpup(&from_buf);
72 event += 4; /* move on to event arguments */ 76 event += 4; /* move on to event arguments */
73 77
74 /* how many arguments are in the packet? */ 78 /* how many arguments are in the packet? */
@@ -82,7 +86,8 @@ scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc)
82 /* not an integer argument, so give up */ 86 /* not an integer argument, so give up */
83 return -1; 87 return -1;
84 } 88 }
85 *esp_code = be32_to_cpup((__be32 *)event); 89 from_buf = get_unaligned((__be32 *)event);
90 *esp_code = be32_to_cpup(&from_buf);
86 event += 4; 91 event += 4;
87 92
88 /* parse out the event description */ 93 /* parse out the event description */
diff --git a/drivers/char/tpm/tpm_infineon.c b/drivers/char/tpm/tpm_infineon.c
index dc8c540391fd..939e51e119e6 100644
--- a/drivers/char/tpm/tpm_infineon.c
+++ b/drivers/char/tpm/tpm_infineon.c
@@ -14,7 +14,6 @@
14 * License. 14 * License.
15 */ 15 */
16 16
17#include <acpi/acpi_bus.h>
18#include <linux/pnp.h> 17#include <linux/pnp.h>
19#include "tpm.h" 18#include "tpm.h"
20 19
@@ -29,9 +28,10 @@
29#define TPM_MAX_TRIES 5000 28#define TPM_MAX_TRIES 5000
30#define TPM_INFINEON_DEV_VEN_VALUE 0x15D1 29#define TPM_INFINEON_DEV_VEN_VALUE 0x15D1
31 30
32/* These values will be filled after ACPI-call */ 31/* These values will be filled after PnP-call */
33static int TPM_INF_DATA = 0; 32static int TPM_INF_DATA = 0;
34static int TPM_INF_ADDR = 0; 33static int TPM_INF_ADDR = 0;
34static int pnp_registered = 0;
35 35
36/* TPM header definitions */ 36/* TPM header definitions */
37enum infineon_tpm_header { 37enum infineon_tpm_header {
@@ -356,24 +356,26 @@ static const struct pnp_device_id tpm_pnp_tbl[] = {
356 {"IFX0102", 0}, 356 {"IFX0102", 0},
357 {"", 0} 357 {"", 0}
358}; 358};
359MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
359 360
360static int __devinit tpm_inf_acpi_probe(struct pnp_dev *dev, 361static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
361 const struct pnp_device_id *dev_id) 362 const struct pnp_device_id *dev_id)
362{ 363{
363 TPM_INF_ADDR = (pnp_port_start(dev, 0) & 0xff); 364 if (pnp_port_valid(dev, 0)) {
364 TPM_INF_DATA = ((TPM_INF_ADDR + 1) & 0xff); 365 TPM_INF_ADDR = (pnp_port_start(dev, 0) & 0xff);
365 tpm_inf.base = pnp_port_start(dev, 1); 366 TPM_INF_DATA = ((TPM_INF_ADDR + 1) & 0xff);
366 dev_info(&dev->dev, "Found %s with ID %s\n", 367 tpm_inf.base = pnp_port_start(dev, 1);
367 dev->name, dev_id->id); 368 dev_info(&dev->dev, "Found %s with ID %s\n",
368 if (!((tpm_inf.base >> 8) & 0xff)) 369 dev->name, dev_id->id);
369 tpm_inf.base = 0; 370 return 0;
370 return 0; 371 }
372 return -ENODEV;
371} 373}
372 374
373static struct pnp_driver tpm_inf_pnp = { 375static struct pnp_driver tpm_inf_pnp = {
374 .name = "tpm_inf_pnp", 376 .name = "tpm_inf_pnp",
375 .id_table = tpm_pnp_tbl, 377 .id_table = tpm_pnp_tbl,
376 .probe = tpm_inf_acpi_probe, 378 .probe = tpm_inf_pnp_probe,
377}; 379};
378 380
379static int __devinit tpm_inf_probe(struct pci_dev *pci_dev, 381static int __devinit tpm_inf_probe(struct pci_dev *pci_dev,
@@ -386,19 +388,30 @@ static int __devinit tpm_inf_probe(struct pci_dev *pci_dev,
386 int productid[2]; 388 int productid[2];
387 char chipname[20]; 389 char chipname[20];
388 390
389 if (pci_enable_device(pci_dev)) 391 rc = pci_enable_device(pci_dev);
390 return -EIO; 392 if (rc)
393 return rc;
391 394
392 dev_info(&pci_dev->dev, "LPC-bus found at 0x%x\n", pci_id->device); 395 dev_info(&pci_dev->dev, "LPC-bus found at 0x%x\n", pci_id->device);
393 396
394 /* read IO-ports from ACPI */ 397 /* read IO-ports from PnP */
395 pnp_register_driver(&tpm_inf_pnp); 398 rc = pnp_register_driver(&tpm_inf_pnp);
396 pnp_unregister_driver(&tpm_inf_pnp); 399 if (rc < 0) {
400 dev_err(&pci_dev->dev,
401 "Error %x from pnp_register_driver!\n",rc);
402 goto error2;
403 }
404 if (!rc) {
405 dev_info(&pci_dev->dev, "No Infineon TPM found!\n");
406 goto error;
407 } else {
408 pnp_registered = 1;
409 }
397 410
398 /* Make sure, we have received valid config ports */ 411 /* Make sure, we have received valid config ports */
399 if (!TPM_INF_ADDR) { 412 if (!TPM_INF_ADDR) {
400 pci_disable_device(pci_dev); 413 dev_err(&pci_dev->dev, "No valid IO-ports received!\n");
401 return -EIO; 414 goto error;
402 } 415 }
403 416
404 /* query chip for its vendor, its version number a.s.o. */ 417 /* query chip for its vendor, its version number a.s.o. */
@@ -418,23 +431,21 @@ static int __devinit tpm_inf_probe(struct pci_dev *pci_dev,
418 431
419 switch ((productid[0] << 8) | productid[1]) { 432 switch ((productid[0] << 8) | productid[1]) {
420 case 6: 433 case 6:
421 sprintf(chipname, " (SLD 9630 TT 1.1)"); 434 snprintf(chipname, sizeof(chipname), " (SLD 9630 TT 1.1)");
422 break; 435 break;
423 case 11: 436 case 11:
424 sprintf(chipname, " (SLB 9635 TT 1.2)"); 437 snprintf(chipname, sizeof(chipname), " (SLB 9635 TT 1.2)");
425 break; 438 break;
426 default: 439 default:
427 sprintf(chipname, " (unknown chip)"); 440 snprintf(chipname, sizeof(chipname), " (unknown chip)");
428 break; 441 break;
429 } 442 }
430 chipname[19] = 0;
431 443
432 if ((vendorid[0] << 8 | vendorid[1]) == (TPM_INFINEON_DEV_VEN_VALUE)) { 444 if ((vendorid[0] << 8 | vendorid[1]) == (TPM_INFINEON_DEV_VEN_VALUE)) {
433 445
434 if (tpm_inf.base == 0) { 446 if (tpm_inf.base == 0) {
435 dev_err(&pci_dev->dev, "No IO-ports found!\n"); 447 dev_err(&pci_dev->dev, "No IO-ports found!\n");
436 pci_disable_device(pci_dev); 448 goto error;
437 return -EIO;
438 } 449 }
439 /* configure TPM with IO-ports */ 450 /* configure TPM with IO-ports */
440 outb(IOLIMH, TPM_INF_ADDR); 451 outb(IOLIMH, TPM_INF_ADDR);
@@ -452,8 +463,7 @@ static int __devinit tpm_inf_probe(struct pci_dev *pci_dev,
452 dev_err(&pci_dev->dev, 463 dev_err(&pci_dev->dev,
453 "Could not set IO-ports to %04x\n", 464 "Could not set IO-ports to %04x\n",
454 tpm_inf.base); 465 tpm_inf.base);
455 pci_disable_device(pci_dev); 466 goto error;
456 return -EIO;
457 } 467 }
458 468
459 /* activate register */ 469 /* activate register */
@@ -479,14 +489,16 @@ static int __devinit tpm_inf_probe(struct pci_dev *pci_dev,
479 productid[0], productid[1], chipname); 489 productid[0], productid[1], chipname);
480 490
481 rc = tpm_register_hardware(pci_dev, &tpm_inf); 491 rc = tpm_register_hardware(pci_dev, &tpm_inf);
482 if (rc < 0) { 492 if (rc < 0)
483 pci_disable_device(pci_dev); 493 goto error;
484 return -ENODEV;
485 }
486 return 0; 494 return 0;
487 } else { 495 } else {
488 dev_info(&pci_dev->dev, "No Infineon TPM found!\n"); 496 dev_info(&pci_dev->dev, "No Infineon TPM found!\n");
497error:
498 pnp_unregister_driver(&tpm_inf_pnp);
499error2:
489 pci_disable_device(pci_dev); 500 pci_disable_device(pci_dev);
501 pnp_registered = 0;
490 return -ENODEV; 502 return -ENODEV;
491 } 503 }
492} 504}
@@ -521,6 +533,8 @@ static int __init init_inf(void)
521 533
522static void __exit cleanup_inf(void) 534static void __exit cleanup_inf(void)
523{ 535{
536 if (pnp_registered)
537 pnp_unregister_driver(&tpm_inf_pnp);
524 pci_unregister_driver(&inf_pci_driver); 538 pci_unregister_driver(&inf_pci_driver);
525} 539}
526 540
diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
index b53e2e2b5aee..c3898afce3ae 100644
--- a/drivers/char/watchdog/Kconfig
+++ b/drivers/char/watchdog/Kconfig
@@ -346,6 +346,13 @@ config 8xx_WDT
346 tristate "MPC8xx Watchdog Timer" 346 tristate "MPC8xx Watchdog Timer"
347 depends on WATCHDOG && 8xx 347 depends on WATCHDOG && 8xx
348 348
349config BOOKE_WDT
350 tristate "PowerPC Book-E Watchdog Timer"
351 depends on WATCHDOG && (BOOKE || 4xx)
352 ---help---
353 Please see Documentation/watchdog/watchdog-api.txt for
354 more information.
355
349# MIPS Architecture 356# MIPS Architecture
350 357
351config INDYDOG 358config INDYDOG
diff --git a/drivers/char/watchdog/Makefile b/drivers/char/watchdog/Makefile
index c1838834ea7f..b16dfea28134 100644
--- a/drivers/char/watchdog/Makefile
+++ b/drivers/char/watchdog/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
34obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o 34obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o
35obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o 35obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
36obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o 36obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o
37obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
37 38
38# Only one watchdog can succeed. We probe the hardware watchdog 39# Only one watchdog can succeed. We probe the hardware watchdog
39# drivers first, then the softdog driver. This means if your hardware 40# drivers first, then the softdog driver. This means if your hardware
diff --git a/drivers/char/watchdog/booke_wdt.c b/drivers/char/watchdog/booke_wdt.c
new file mode 100644
index 000000000000..abc30cca6645
--- /dev/null
+++ b/drivers/char/watchdog/booke_wdt.c
@@ -0,0 +1,192 @@
1/*
2 * drivers/char/watchdog/booke_wdt.c
3 *
4 * Watchdog timer for PowerPC Book-E systems
5 *
6 * Author: Matthew McClintock
7 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
8 *
9 * Copyright 2005 Freescale Semiconductor Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#include <linux/config.h>
18#include <linux/module.h>
19#include <linux/fs.h>
20#include <linux/miscdevice.h>
21#include <linux/notifier.h>
22#include <linux/watchdog.h>
23
24#include <asm/reg_booke.h>
25#include <asm/uaccess.h>
26#include <asm/system.h>
27
28/* If the kernel parameter wdt_enable=1, the watchdog will be enabled at boot.
29 * Also, the wdt_period sets the watchdog timer period timeout.
30 * For E500 cpus the wdt_period sets which bit changing from 0->1 will
31 * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
32 * first time nothing will happen, the second time a watchdog exception will
33 * occur, and the final time the board will reset.
34 */
35
36#ifdef CONFIG_FSL_BOOKE
37#define WDT_PERIOD_DEFAULT 63 /* Ex. wdt_period=28 bus=333Mhz , reset=~40sec */
38#else
39#define WDT_PERIOD_DEFAULT 4 /* Refer to the PPC40x and PPC4xx manuals */
40#endif /* for timing information */
41
42u32 booke_wdt_enabled = 0;
43u32 booke_wdt_period = WDT_PERIOD_DEFAULT;
44
45#ifdef CONFIG_FSL_BOOKE
46#define WDTP(x) ((((63-x)&0x3)<<30)|(((63-x)&0x3c)<<15))
47#else
48#define WDTP(x) (TCR_WP(x))
49#endif
50
51/*
52 * booke_wdt_enable:
53 */
54static __inline__ void booke_wdt_enable(void)
55{
56 u32 val;
57
58 val = mfspr(SPRN_TCR);
59 val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
60
61 mtspr(SPRN_TCR, val);
62}
63
64/*
65 * booke_wdt_ping:
66 */
67static __inline__ void booke_wdt_ping(void)
68{
69 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
70}
71
72/*
73 * booke_wdt_write:
74 */
75static ssize_t booke_wdt_write (struct file *file, const char *buf,
76 size_t count, loff_t *ppos)
77{
78 booke_wdt_ping();
79 return count;
80}
81
82static struct watchdog_info ident = {
83 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
84 .firmware_version = 0,
85 .identity = "PowerPC Book-E Watchdog",
86};
87
88/*
89 * booke_wdt_ioctl:
90 */
91static int booke_wdt_ioctl (struct inode *inode, struct file *file,
92 unsigned int cmd, unsigned long arg)
93{
94 u32 tmp = 0;
95
96 switch (cmd) {
97 case WDIOC_GETSUPPORT:
98 if (copy_to_user ((struct watchdog_info *) arg, &ident,
99 sizeof(struct watchdog_info)))
100 return -EFAULT;
101 case WDIOC_GETSTATUS:
102 return put_user(ident.options, (u32 *) arg);
103 case WDIOC_GETBOOTSTATUS:
104 /* XXX: something is clearing TSR */
105 tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
106 /* returns 1 if last reset was caused by the WDT */
107 return (tmp ? 1 : 0);
108 case WDIOC_KEEPALIVE:
109 booke_wdt_ping();
110 return 0;
111 case WDIOC_SETTIMEOUT:
112 if (get_user(booke_wdt_period, (u32 *) arg))
113 return -EFAULT;
114 mtspr(SPRN_TCR, (mfspr(SPRN_TCR)&~WDTP(0))|WDTP(booke_wdt_period));
115 return 0;
116 case WDIOC_GETTIMEOUT:
117 return put_user(booke_wdt_period, (u32 *) arg);
118 case WDIOC_SETOPTIONS:
119 if (get_user(tmp, (u32 *) arg))
120 return -EINVAL;
121 if (tmp == WDIOS_ENABLECARD) {
122 booke_wdt_ping();
123 break;
124 } else
125 return -EINVAL;
126 return 0;
127 default:
128 return -ENOIOCTLCMD;
129 }
130
131 return 0;
132}
133/*
134 * booke_wdt_open:
135 */
136static int booke_wdt_open (struct inode *inode, struct file *file)
137{
138 if (booke_wdt_enabled == 0) {
139 booke_wdt_enabled = 1;
140 booke_wdt_enable();
141 printk (KERN_INFO "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
142 booke_wdt_period);
143 }
144
145 return 0;
146}
147
148static struct file_operations booke_wdt_fops = {
149 .owner = THIS_MODULE,
150 .llseek = no_llseek,
151 .write = booke_wdt_write,
152 .ioctl = booke_wdt_ioctl,
153 .open = booke_wdt_open,
154};
155
156static struct miscdevice booke_wdt_miscdev = {
157 .minor = WATCHDOG_MINOR,
158 .name = "watchdog",
159 .fops = &booke_wdt_fops,
160};
161
162static void __exit booke_wdt_exit(void)
163{
164 misc_deregister(&booke_wdt_miscdev);
165}
166
167/*
168 * booke_wdt_init:
169 */
170static int __init booke_wdt_init(void)
171{
172 int ret = 0;
173
174 printk (KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n");
175 ident.firmware_version = cpu_specs[0].pvr_value;
176
177 ret = misc_register(&booke_wdt_miscdev);
178 if (ret) {
179 printk (KERN_CRIT "Cannot register miscdev on minor=%d (err=%d)\n",
180 WATCHDOG_MINOR, ret);
181 return ret;
182 }
183
184 if (booke_wdt_enabled == 1) {
185 printk (KERN_INFO "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
186 booke_wdt_period);
187 booke_wdt_enable();
188 }
189
190 return ret;
191}
192device_initcall(booke_wdt_init);
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index 248e3cc8b352..f174aee659e5 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -150,7 +150,7 @@ static void ide_complete_power_step(ide_drive_t *drive, struct request *rq, u8 s
150 150
151 switch (rq->pm->pm_step) { 151 switch (rq->pm->pm_step) {
152 case ide_pm_flush_cache: /* Suspend step 1 (flush cache) complete */ 152 case ide_pm_flush_cache: /* Suspend step 1 (flush cache) complete */
153 if (rq->pm->pm_state == 4) 153 if (rq->pm->pm_state == PM_EVENT_FREEZE)
154 rq->pm->pm_step = ide_pm_state_completed; 154 rq->pm->pm_step = ide_pm_state_completed;
155 else 155 else
156 rq->pm->pm_step = idedisk_pm_standby; 156 rq->pm->pm_step = idedisk_pm_standby;
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index dae1bd5b8c3e..73ca8f73917d 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -1229,7 +1229,7 @@ static int generic_ide_suspend(struct device *dev, pm_message_t state)
1229 rq.special = &args; 1229 rq.special = &args;
1230 rq.pm = &rqpm; 1230 rq.pm = &rqpm;
1231 rqpm.pm_step = ide_pm_state_start_suspend; 1231 rqpm.pm_step = ide_pm_state_start_suspend;
1232 rqpm.pm_state = state; 1232 rqpm.pm_state = state.event;
1233 1233
1234 return ide_do_drive_cmd(drive, &rq, ide_wait); 1234 return ide_do_drive_cmd(drive, &rq, ide_wait);
1235} 1235}
@@ -1248,7 +1248,7 @@ static int generic_ide_resume(struct device *dev)
1248 rq.special = &args; 1248 rq.special = &args;
1249 rq.pm = &rqpm; 1249 rq.pm = &rqpm;
1250 rqpm.pm_step = ide_pm_state_start_resume; 1250 rqpm.pm_step = ide_pm_state_start_resume;
1251 rqpm.pm_state = 0; 1251 rqpm.pm_state = PM_EVENT_ON;
1252 1252
1253 return ide_do_drive_cmd(drive, &rq, ide_head_wait); 1253 return ide_do_drive_cmd(drive, &rq, ide_head_wait);
1254} 1254}
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 10592cec6c43..24e21b2838c1 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -350,9 +350,9 @@ static int sc1200_suspend (struct pci_dev *dev, pm_message_t state)
350{ 350{
351 ide_hwif_t *hwif = NULL; 351 ide_hwif_t *hwif = NULL;
352 352
353 printk("SC1200: suspend(%u)\n", state); 353 printk("SC1200: suspend(%u)\n", state.event);
354 354
355 if (state == 0) { 355 if (state.event == PM_EVENT_ON) {
356 // we only save state when going from full power to less 356 // we only save state when going from full power to less
357 357
358 // 358 //
@@ -386,8 +386,8 @@ static int sc1200_suspend (struct pci_dev *dev, pm_message_t state)
386 /* You don't need to iterate over disks -- sysfs should have done that for you already */ 386 /* You don't need to iterate over disks -- sysfs should have done that for you already */
387 387
388 pci_disable_device(dev); 388 pci_disable_device(dev);
389 pci_set_power_state(dev,state); 389 pci_set_power_state(dev, pci_choose_state(dev, state));
390 dev->current_state = state; 390 dev->current_state = state.event;
391 return 0; 391 return 0;
392} 392}
393 393
@@ -396,8 +396,8 @@ static int sc1200_resume (struct pci_dev *dev)
396 ide_hwif_t *hwif = NULL; 396 ide_hwif_t *hwif = NULL;
397 397
398printk("SC1200: resume\n"); 398printk("SC1200: resume\n");
399 pci_set_power_state(dev,0); // bring chip back from sleep state 399 pci_set_power_state(dev, PCI_D0); // bring chip back from sleep state
400 dev->current_state = 0; 400 dev->current_state = PM_EVENT_ON;
401 pci_enable_device(dev); 401 pci_enable_device(dev);
402 // 402 //
403 // loop over all interfaces that are part of this pci device: 403 // loop over all interfaces that are part of this pci device:
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index ea65b070a367..87d1f8a1f41e 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -1504,12 +1504,12 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
1504} 1504}
1505 1505
1506static int 1506static int
1507pmac_ide_macio_suspend(struct macio_dev *mdev, u32 state) 1507pmac_ide_macio_suspend(struct macio_dev *mdev, pm_message_t state)
1508{ 1508{
1509 ide_hwif_t *hwif = (ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev); 1509 ide_hwif_t *hwif = (ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
1510 int rc = 0; 1510 int rc = 0;
1511 1511
1512 if (state != mdev->ofdev.dev.power.power_state && state >= 2) { 1512 if (state.event != mdev->ofdev.dev.power.power_state.event && state.event >= PM_EVENT_SUSPEND) {
1513 rc = pmac_ide_do_suspend(hwif); 1513 rc = pmac_ide_do_suspend(hwif);
1514 if (rc == 0) 1514 if (rc == 0)
1515 mdev->ofdev.dev.power.power_state = state; 1515 mdev->ofdev.dev.power.power_state = state;
@@ -1524,10 +1524,10 @@ pmac_ide_macio_resume(struct macio_dev *mdev)
1524 ide_hwif_t *hwif = (ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev); 1524 ide_hwif_t *hwif = (ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
1525 int rc = 0; 1525 int rc = 0;
1526 1526
1527 if (mdev->ofdev.dev.power.power_state != 0) { 1527 if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) {
1528 rc = pmac_ide_do_resume(hwif); 1528 rc = pmac_ide_do_resume(hwif);
1529 if (rc == 0) 1529 if (rc == 0)
1530 mdev->ofdev.dev.power.power_state = 0; 1530 mdev->ofdev.dev.power.power_state = PMSG_ON;
1531 } 1531 }
1532 1532
1533 return rc; 1533 return rc;
@@ -1608,12 +1608,12 @@ pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1608} 1608}
1609 1609
1610static int 1610static int
1611pmac_ide_pci_suspend(struct pci_dev *pdev, u32 state) 1611pmac_ide_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1612{ 1612{
1613 ide_hwif_t *hwif = (ide_hwif_t *)pci_get_drvdata(pdev); 1613 ide_hwif_t *hwif = (ide_hwif_t *)pci_get_drvdata(pdev);
1614 int rc = 0; 1614 int rc = 0;
1615 1615
1616 if (state != pdev->dev.power.power_state && state >= 2) { 1616 if (state.event != pdev->dev.power.power_state.event && state.event >= 2) {
1617 rc = pmac_ide_do_suspend(hwif); 1617 rc = pmac_ide_do_suspend(hwif);
1618 if (rc == 0) 1618 if (rc == 0)
1619 pdev->dev.power.power_state = state; 1619 pdev->dev.power.power_state = state;
@@ -1628,10 +1628,10 @@ pmac_ide_pci_resume(struct pci_dev *pdev)
1628 ide_hwif_t *hwif = (ide_hwif_t *)pci_get_drvdata(pdev); 1628 ide_hwif_t *hwif = (ide_hwif_t *)pci_get_drvdata(pdev);
1629 int rc = 0; 1629 int rc = 0;
1630 1630
1631 if (pdev->dev.power.power_state != 0) { 1631 if (pdev->dev.power.power_state.event != PM_EVENT_ON) {
1632 rc = pmac_ide_do_resume(hwif); 1632 rc = pmac_ide_do_resume(hwif);
1633 if (rc == 0) 1633 if (rc == 0)
1634 pdev->dev.power.power_state = 0; 1634 pdev->dev.power.power_state = PMSG_ON;
1635 } 1635 }
1636 1636
1637 return rc; 1637 return rc;
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index 20e3a165989f..f8b278d3559b 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -160,6 +160,8 @@ struct input_event_compat {
160# define COMPAT_TEST IS_IA32_PROCESS(ia64_task_regs(current)) 160# define COMPAT_TEST IS_IA32_PROCESS(ia64_task_regs(current))
161#elif defined(CONFIG_ARCH_S390) 161#elif defined(CONFIG_ARCH_S390)
162# define COMPAT_TEST test_thread_flag(TIF_31BIT) 162# define COMPAT_TEST test_thread_flag(TIF_31BIT)
163#elif defined(CONFIG_MIPS)
164# define COMPAT_TEST (current->thread.mflags & MF_32BIT_ADDR)
163#else 165#else
164# define COMPAT_TEST test_thread_flag(TIF_32BIT) 166# define COMPAT_TEST test_thread_flag(TIF_32BIT)
165#endif 167#endif
diff --git a/drivers/macintosh/mediabay.c b/drivers/macintosh/mediabay.c
index 7c16c25fc5d4..c0712a1ea5af 100644
--- a/drivers/macintosh/mediabay.c
+++ b/drivers/macintosh/mediabay.c
@@ -708,7 +708,7 @@ static int __pmac media_bay_suspend(struct macio_dev *mdev, pm_message_t state)
708{ 708{
709 struct media_bay_info *bay = macio_get_drvdata(mdev); 709 struct media_bay_info *bay = macio_get_drvdata(mdev);
710 710
711 if (state != mdev->ofdev.dev.power.power_state && state == PM_SUSPEND_MEM) { 711 if (state.event != mdev->ofdev.dev.power.power_state.event && state.event == PM_EVENT_SUSPEND) {
712 down(&bay->lock); 712 down(&bay->lock);
713 bay->sleeping = 1; 713 bay->sleeping = 1;
714 set_mb_power(bay, 0); 714 set_mb_power(bay, 0);
@@ -723,8 +723,8 @@ static int __pmac media_bay_resume(struct macio_dev *mdev)
723{ 723{
724 struct media_bay_info *bay = macio_get_drvdata(mdev); 724 struct media_bay_info *bay = macio_get_drvdata(mdev);
725 725
726 if (mdev->ofdev.dev.power.power_state != 0) { 726 if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) {
727 mdev->ofdev.dev.power.power_state = 0; 727 mdev->ofdev.dev.power.power_state = PMSG_ON;
728 728
729 /* We re-enable the bay using it's previous content 729 /* We re-enable the bay using it's previous content
730 only if it did not change. Note those bozo timings, 730 only if it did not change. Note those bozo timings,
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index 4a0a0ad2d03c..645a2e5c70ab 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -3065,7 +3065,7 @@ static int pmu_sys_suspended = 0;
3065 3065
3066static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state) 3066static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
3067{ 3067{
3068 if (state != PM_SUSPEND_DISK || pmu_sys_suspended) 3068 if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
3069 return 0; 3069 return 0;
3070 3070
3071 /* Suspend PMU event interrupts */ 3071 /* Suspend PMU event interrupts */
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index d0a4bab220e5..b82bc3150476 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -144,7 +144,7 @@ static int crypt_iv_essiv_ctr(struct crypt_config *cc, struct dm_target *ti,
144 } 144 }
145 145
146 /* Hash the cipher key with the given hash algorithm */ 146 /* Hash the cipher key with the given hash algorithm */
147 hash_tfm = crypto_alloc_tfm(opts, 0); 147 hash_tfm = crypto_alloc_tfm(opts, CRYPTO_TFM_REQ_MAY_SLEEP);
148 if (hash_tfm == NULL) { 148 if (hash_tfm == NULL) {
149 ti->error = PFX "Error initializing ESSIV hash"; 149 ti->error = PFX "Error initializing ESSIV hash";
150 return -EINVAL; 150 return -EINVAL;
@@ -172,7 +172,8 @@ static int crypt_iv_essiv_ctr(struct crypt_config *cc, struct dm_target *ti,
172 172
173 /* Setup the essiv_tfm with the given salt */ 173 /* Setup the essiv_tfm with the given salt */
174 essiv_tfm = crypto_alloc_tfm(crypto_tfm_alg_name(cc->tfm), 174 essiv_tfm = crypto_alloc_tfm(crypto_tfm_alg_name(cc->tfm),
175 CRYPTO_TFM_MODE_ECB); 175 CRYPTO_TFM_MODE_ECB |
176 CRYPTO_TFM_REQ_MAY_SLEEP);
176 if (essiv_tfm == NULL) { 177 if (essiv_tfm == NULL) {
177 ti->error = PFX "Error allocating crypto tfm for ESSIV"; 178 ti->error = PFX "Error allocating crypto tfm for ESSIV";
178 kfree(salt); 179 kfree(salt);
@@ -587,7 +588,7 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
587 goto bad1; 588 goto bad1;
588 } 589 }
589 590
590 tfm = crypto_alloc_tfm(cipher, crypto_flags); 591 tfm = crypto_alloc_tfm(cipher, crypto_flags | CRYPTO_TFM_REQ_MAY_SLEEP);
591 if (!tfm) { 592 if (!tfm) {
592 ti->error = PFX "Error allocating crypto tfm"; 593 ti->error = PFX "Error allocating crypto tfm";
593 goto bad1; 594 goto bad1;
diff --git a/drivers/media/dvb/cinergyT2/cinergyT2.c b/drivers/media/dvb/cinergyT2/cinergyT2.c
index 7d8b3cad350b..9ea5747b1211 100644
--- a/drivers/media/dvb/cinergyT2/cinergyT2.c
+++ b/drivers/media/dvb/cinergyT2/cinergyT2.c
@@ -888,7 +888,7 @@ static int cinergyt2_suspend (struct usb_interface *intf, pm_message_t state)
888 if (down_interruptible(&cinergyt2->sem)) 888 if (down_interruptible(&cinergyt2->sem))
889 return -ERESTARTSYS; 889 return -ERESTARTSYS;
890 890
891 if (state > 0) { /* state 0 seems to mean DEVICE_PM_ON */ 891 if (state.event > PM_EVENT_ON) {
892 struct cinergyt2 *cinergyt2 = usb_get_intfdata (intf); 892 struct cinergyt2 *cinergyt2 = usb_get_intfdata (intf);
893#ifdef ENABLE_RC 893#ifdef ENABLE_RC
894 cancel_delayed_work(&cinergyt2->rc_query_work); 894 cancel_delayed_work(&cinergyt2->rc_query_work);
diff --git a/drivers/media/dvb/ttpci/Kconfig b/drivers/media/dvb/ttpci/Kconfig
index bf3c011d2cfb..d8bf65877897 100644
--- a/drivers/media/dvb/ttpci/Kconfig
+++ b/drivers/media/dvb/ttpci/Kconfig
@@ -102,6 +102,9 @@ config DVB_BUDGET_AV
102 select VIDEO_DEV 102 select VIDEO_DEV
103 select VIDEO_SAA7146_VV 103 select VIDEO_SAA7146_VV
104 select DVB_STV0299 104 select DVB_STV0299
105 select DVB_TDA1004X
106 select DVB_TDA10021
107 select FW_LOADER
105 help 108 help
106 Support for simple SAA7146 based DVB cards 109 Support for simple SAA7146 based DVB cards
107 (so called Budget- or Nova-PCI cards) without onboard 110 (so called Budget- or Nova-PCI cards) without onboard
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index 3f5742396096..16c85c081e6e 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -254,6 +254,7 @@ config VIDEO_SAA7134_DVB
254 select VIDEO_BUF_DVB 254 select VIDEO_BUF_DVB
255 select DVB_MT352 255 select DVB_MT352
256 select DVB_CX22702 256 select DVB_CX22702
257 select DVB_TDA1004X
257 ---help--- 258 ---help---
258 This adds support for DVB cards based on the 259 This adds support for DVB cards based on the
259 Philips saa7134 chip. 260 Philips saa7134 chip.
diff --git a/drivers/media/video/bttv-driver.c b/drivers/media/video/bttv-driver.c
index eee9322ce21b..087efb4dea09 100644
--- a/drivers/media/video/bttv-driver.c
+++ b/drivers/media/video/bttv-driver.c
@@ -4047,7 +4047,6 @@ static int bttv_suspend(struct pci_dev *pci_dev, pm_message_t state)
4047 struct bttv_buffer_set idle; 4047 struct bttv_buffer_set idle;
4048 unsigned long flags; 4048 unsigned long flags;
4049 4049
4050 dprintk("bttv%d: suspend %d\n", btv->c.nr, state);
4051 4050
4052 /* stop dma + irqs */ 4051 /* stop dma + irqs */
4053 spin_lock_irqsave(&btv->s_lock,flags); 4052 spin_lock_irqsave(&btv->s_lock,flags);
diff --git a/drivers/media/video/msp3400.c b/drivers/media/video/msp3400.c
index 62f1b8ddb98b..e956234abf24 100644
--- a/drivers/media/video/msp3400.c
+++ b/drivers/media/video/msp3400.c
@@ -1416,7 +1416,7 @@ static int msp_detach(struct i2c_client *client);
1416static int msp_probe(struct i2c_adapter *adap); 1416static int msp_probe(struct i2c_adapter *adap);
1417static int msp_command(struct i2c_client *client, unsigned int cmd, void *arg); 1417static int msp_command(struct i2c_client *client, unsigned int cmd, void *arg);
1418 1418
1419static int msp_suspend(struct device * dev, u32 state, u32 level); 1419static int msp_suspend(struct device * dev, pm_message_t state, u32 level);
1420static int msp_resume(struct device * dev, u32 level); 1420static int msp_resume(struct device * dev, u32 level);
1421 1421
1422static void msp_wake_thread(struct i2c_client *client); 1422static void msp_wake_thread(struct i2c_client *client);
@@ -1817,7 +1817,7 @@ static int msp_command(struct i2c_client *client, unsigned int cmd, void *arg)
1817 return 0; 1817 return 0;
1818} 1818}
1819 1819
1820static int msp_suspend(struct device * dev, u32 state, u32 level) 1820static int msp_suspend(struct device * dev, pm_message_t state, u32 level)
1821{ 1821{
1822 struct i2c_client *c = container_of(dev, struct i2c_client, dev); 1822 struct i2c_client *c = container_of(dev, struct i2c_client, dev);
1823 1823
diff --git a/drivers/media/video/tda9887.c b/drivers/media/video/tda9887.c
index 108c3ad7d622..a28a395d6dfe 100644
--- a/drivers/media/video/tda9887.c
+++ b/drivers/media/video/tda9887.c
@@ -760,7 +760,7 @@ tda9887_command(struct i2c_client *client, unsigned int cmd, void *arg)
760 return 0; 760 return 0;
761} 761}
762 762
763static int tda9887_suspend(struct device * dev, u32 state, u32 level) 763static int tda9887_suspend(struct device * dev, pm_message_t state, u32 level)
764{ 764{
765 dprintk("tda9887: suspend\n"); 765 dprintk("tda9887: suspend\n");
766 return 0; 766 return 0;
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c
index f0a579827a24..a155e99a263b 100644
--- a/drivers/media/video/tuner-core.c
+++ b/drivers/media/video/tuner-core.c
@@ -672,7 +672,7 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
672 return 0; 672 return 0;
673} 673}
674 674
675static int tuner_suspend(struct device *dev, u32 state, u32 level) 675static int tuner_suspend(struct device *dev, pm_message_t state, u32 level)
676{ 676{
677 struct i2c_client *c = container_of (dev, struct i2c_client, dev); 677 struct i2c_client *c = container_of (dev, struct i2c_client, dev);
678 struct tuner *t = i2c_get_clientdata (c); 678 struct tuner *t = i2c_get_clientdata (c);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 7fc692a8f5b0..dea6589d1533 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -6,7 +6,7 @@ menu "Misc devices"
6 6
7config IBM_ASM 7config IBM_ASM
8 tristate "Device driver for IBM RSA service processor" 8 tristate "Device driver for IBM RSA service processor"
9 depends on X86 && PCI && EXPERIMENTAL 9 depends on X86 && PCI && EXPERIMENTAL && BROKEN
10 ---help--- 10 ---help---
11 This option enables device driver support for in-band access to the 11 This option enables device driver support for in-band access to the
12 IBM RSA (Condor) service processor in eServer xSeries systems. 12 IBM RSA (Condor) service processor in eServer xSeries systems.
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 3c5904834fe8..0a8165974ba7 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -457,6 +457,11 @@ static void mmc_idle_cards(struct mmc_host *host)
457{ 457{
458 struct mmc_command cmd; 458 struct mmc_command cmd;
459 459
460 host->ios.chip_select = MMC_CS_HIGH;
461 host->ops->set_ios(host, &host->ios);
462
463 mmc_delay(1);
464
460 cmd.opcode = MMC_GO_IDLE_STATE; 465 cmd.opcode = MMC_GO_IDLE_STATE;
461 cmd.arg = 0; 466 cmd.arg = 0;
462 cmd.flags = MMC_RSP_NONE; 467 cmd.flags = MMC_RSP_NONE;
@@ -464,6 +469,11 @@ static void mmc_idle_cards(struct mmc_host *host)
464 mmc_wait_for_cmd(host, &cmd, 0); 469 mmc_wait_for_cmd(host, &cmd, 0);
465 470
466 mmc_delay(1); 471 mmc_delay(1);
472
473 host->ios.chip_select = MMC_CS_DONTCARE;
474 host->ops->set_ios(host, &host->ios);
475
476 mmc_delay(1);
467} 477}
468 478
469/* 479/*
@@ -475,6 +485,7 @@ static void mmc_power_up(struct mmc_host *host)
475 485
476 host->ios.vdd = bit; 486 host->ios.vdd = bit;
477 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; 487 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
488 host->ios.chip_select = MMC_CS_DONTCARE;
478 host->ios.power_mode = MMC_POWER_UP; 489 host->ios.power_mode = MMC_POWER_UP;
479 host->ops->set_ios(host, &host->ios); 490 host->ops->set_ios(host, &host->ios);
480 491
@@ -492,6 +503,7 @@ static void mmc_power_off(struct mmc_host *host)
492 host->ios.clock = 0; 503 host->ios.clock = 0;
493 host->ios.vdd = 0; 504 host->ios.vdd = 0;
494 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; 505 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
506 host->ios.chip_select = MMC_CS_DONTCARE;
495 host->ios.power_mode = MMC_POWER_OFF; 507 host->ios.power_mode = MMC_POWER_OFF;
496 host->ops->set_ios(host, &host->ios); 508 host->ops->set_ios(host, &host->ios);
497} 509}
diff --git a/drivers/mmc/wbsd.c b/drivers/mmc/wbsd.c
index 402c2d661fb2..08ae22aed9e8 100644
--- a/drivers/mmc/wbsd.c
+++ b/drivers/mmc/wbsd.c
@@ -42,7 +42,7 @@
42#include "wbsd.h" 42#include "wbsd.h"
43 43
44#define DRIVER_NAME "wbsd" 44#define DRIVER_NAME "wbsd"
45#define DRIVER_VERSION "1.3" 45#define DRIVER_VERSION "1.4"
46 46
47#ifdef CONFIG_MMC_DEBUG 47#ifdef CONFIG_MMC_DEBUG
48#define DBG(x...) \ 48#define DBG(x...) \
@@ -960,8 +960,9 @@ static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
960 struct wbsd_host* host = mmc_priv(mmc); 960 struct wbsd_host* host = mmc_priv(mmc);
961 u8 clk, setup, pwr; 961 u8 clk, setup, pwr;
962 962
963 DBGF("clock %uHz busmode %u powermode %u Vdd %u\n", 963 DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u\n",
964 ios->clock, ios->bus_mode, ios->power_mode, ios->vdd); 964 ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select,
965 ios->vdd);
965 966
966 spin_lock_bh(&host->lock); 967 spin_lock_bh(&host->lock);
967 968
@@ -1003,13 +1004,11 @@ static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
1003 1004
1004 /* 1005 /*
1005 * MMC cards need to have pin 1 high during init. 1006 * MMC cards need to have pin 1 high during init.
1006 * Init time corresponds rather nicely with the bus mode.
1007 * It wreaks havoc with the card detection though so 1007 * It wreaks havoc with the card detection though so
1008 * that needs to be disabed. 1008 * that needs to be disabled.
1009 */ 1009 */
1010 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 1010 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
1011 if ((ios->power_mode == MMC_POWER_ON) && 1011 if (ios->chip_select == MMC_CS_HIGH)
1012 (ios->bus_mode == MMC_BUSMODE_OPENDRAIN))
1013 { 1012 {
1014 setup |= WBSD_DAT3_H; 1013 setup |= WBSD_DAT3_H;
1015 host->flags |= WBSD_FIGNORE_DETECT; 1014 host->flags |= WBSD_FIGNORE_DETECT;
@@ -1017,7 +1016,12 @@ static void wbsd_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
1017 else 1016 else
1018 { 1017 {
1019 setup &= ~WBSD_DAT3_H; 1018 setup &= ~WBSD_DAT3_H;
1020 host->flags &= ~WBSD_FIGNORE_DETECT; 1019
1020 /*
1021 * We cannot resume card detection immediatly
1022 * because of capacitance and delays in the chip.
1023 */
1024 mod_timer(&host->ignore_timer, jiffies + HZ/100);
1021 } 1025 }
1022 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 1026 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
1023 1027
@@ -1036,6 +1040,31 @@ static struct mmc_host_ops wbsd_ops = {
1036\*****************************************************************************/ 1040\*****************************************************************************/
1037 1041
1038/* 1042/*
1043 * Helper function to reset detection ignore
1044 */
1045
1046static void wbsd_reset_ignore(unsigned long data)
1047{
1048 struct wbsd_host *host = (struct wbsd_host*)data;
1049
1050 BUG_ON(host == NULL);
1051
1052 DBG("Resetting card detection ignore\n");
1053
1054 spin_lock_bh(&host->lock);
1055
1056 host->flags &= ~WBSD_FIGNORE_DETECT;
1057
1058 /*
1059 * Card status might have changed during the
1060 * blackout.
1061 */
1062 tasklet_schedule(&host->card_tasklet);
1063
1064 spin_unlock_bh(&host->lock);
1065}
1066
1067/*
1039 * Helper function for card detection 1068 * Helper function for card detection
1040 */ 1069 */
1041static void wbsd_detect_card(unsigned long data) 1070static void wbsd_detect_card(unsigned long data)
@@ -1097,7 +1126,7 @@ static void wbsd_tasklet_card(unsigned long param)
1097 * Delay card detection to allow electrical connections 1126 * Delay card detection to allow electrical connections
1098 * to stabilise. 1127 * to stabilise.
1099 */ 1128 */
1100 mod_timer(&host->timer, jiffies + HZ/2); 1129 mod_timer(&host->detect_timer, jiffies + HZ/2);
1101 } 1130 }
1102 1131
1103 spin_unlock(&host->lock); 1132 spin_unlock(&host->lock);
@@ -1124,6 +1153,8 @@ static void wbsd_tasklet_card(unsigned long param)
1124 1153
1125 mmc_detect_change(host->mmc); 1154 mmc_detect_change(host->mmc);
1126 } 1155 }
1156 else
1157 spin_unlock(&host->lock);
1127} 1158}
1128 1159
1129static void wbsd_tasklet_fifo(unsigned long param) 1160static void wbsd_tasklet_fifo(unsigned long param)
@@ -1328,11 +1359,15 @@ static int __devinit wbsd_alloc_mmc(struct device* dev)
1328 spin_lock_init(&host->lock); 1359 spin_lock_init(&host->lock);
1329 1360
1330 /* 1361 /*
1331 * Set up detection timer 1362 * Set up timers
1332 */ 1363 */
1333 init_timer(&host->timer); 1364 init_timer(&host->detect_timer);
1334 host->timer.data = (unsigned long)host; 1365 host->detect_timer.data = (unsigned long)host;
1335 host->timer.function = wbsd_detect_card; 1366 host->detect_timer.function = wbsd_detect_card;
1367
1368 init_timer(&host->ignore_timer);
1369 host->ignore_timer.data = (unsigned long)host;
1370 host->ignore_timer.function = wbsd_reset_ignore;
1336 1371
1337 /* 1372 /*
1338 * Maximum number of segments. Worst case is one sector per segment 1373 * Maximum number of segments. Worst case is one sector per segment
@@ -1370,7 +1405,8 @@ static void __devexit wbsd_free_mmc(struct device* dev)
1370 host = mmc_priv(mmc); 1405 host = mmc_priv(mmc);
1371 BUG_ON(host == NULL); 1406 BUG_ON(host == NULL);
1372 1407
1373 del_timer_sync(&host->timer); 1408 del_timer_sync(&host->ignore_timer);
1409 del_timer_sync(&host->detect_timer);
1374 1410
1375 mmc_free_host(mmc); 1411 mmc_free_host(mmc);
1376 1412
diff --git a/drivers/mmc/wbsd.h b/drivers/mmc/wbsd.h
index 661a9f6a6e6f..8af43549f5d5 100644
--- a/drivers/mmc/wbsd.h
+++ b/drivers/mmc/wbsd.h
@@ -181,5 +181,6 @@ struct wbsd_host
181 struct tasklet_struct finish_tasklet; 181 struct tasklet_struct finish_tasklet;
182 struct tasklet_struct block_tasklet; 182 struct tasklet_struct block_tasklet;
183 183
184 struct timer_list timer; /* Card detection timer */ 184 struct timer_list detect_timer; /* Card detection timer */
185 struct timer_list ignore_timer; /* Ignore detection timer */
185}; 186};
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index e0239a10d325..7d8bcb38797a 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -447,7 +447,7 @@ config NET_SB1250_MAC
447 447
448config SGI_IOC3_ETH 448config SGI_IOC3_ETH
449 bool "SGI IOC3 Ethernet" 449 bool "SGI IOC3 Ethernet"
450 depends on NET_ETHERNET && PCI && SGI_IP27 450 depends on NET_ETHERNET && PCI && SGI_IP27 && BROKEN
451 select CRC32 451 select CRC32
452 select MII 452 select MII
453 help 453 help
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 7babf6af4e28..55a72c7ad001 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -2004,14 +2004,14 @@ bnx2_init_cpus(struct bnx2 *bp)
2004} 2004}
2005 2005
2006static int 2006static int
2007bnx2_set_power_state(struct bnx2 *bp, int state) 2007bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
2008{ 2008{
2009 u16 pmcsr; 2009 u16 pmcsr;
2010 2010
2011 pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr); 2011 pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
2012 2012
2013 switch (state) { 2013 switch (state) {
2014 case 0: { 2014 case PCI_D0: {
2015 u32 val; 2015 u32 val;
2016 2016
2017 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, 2017 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
@@ -2032,7 +2032,7 @@ bnx2_set_power_state(struct bnx2 *bp, int state)
2032 REG_WR(bp, BNX2_RPM_CONFIG, val); 2032 REG_WR(bp, BNX2_RPM_CONFIG, val);
2033 break; 2033 break;
2034 } 2034 }
2035 case 3: { 2035 case PCI_D3hot: {
2036 int i; 2036 int i;
2037 u32 val, wol_msg; 2037 u32 val, wol_msg;
2038 2038
@@ -3886,7 +3886,7 @@ bnx2_open(struct net_device *dev)
3886 struct bnx2 *bp = dev->priv; 3886 struct bnx2 *bp = dev->priv;
3887 int rc; 3887 int rc;
3888 3888
3889 bnx2_set_power_state(bp, 0); 3889 bnx2_set_power_state(bp, PCI_D0);
3890 bnx2_disable_int(bp); 3890 bnx2_disable_int(bp);
3891 3891
3892 rc = bnx2_alloc_mem(bp); 3892 rc = bnx2_alloc_mem(bp);
@@ -4197,7 +4197,7 @@ bnx2_close(struct net_device *dev)
4197 bnx2_free_mem(bp); 4197 bnx2_free_mem(bp);
4198 bp->link_up = 0; 4198 bp->link_up = 0;
4199 netif_carrier_off(bp->dev); 4199 netif_carrier_off(bp->dev);
4200 bnx2_set_power_state(bp, 3); 4200 bnx2_set_power_state(bp, PCI_D3hot);
4201 return 0; 4201 return 0;
4202} 4202}
4203 4203
@@ -5203,7 +5203,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
5203 BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA | 5203 BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
5204 BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP); 5204 BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP);
5205 5205
5206 bnx2_set_power_state(bp, 0); 5206 bnx2_set_power_state(bp, PCI_D0);
5207 5207
5208 bp->chip_id = REG_RD(bp, BNX2_MISC_ID); 5208 bp->chip_id = REG_RD(bp, BNX2_MISC_ID);
5209 5209
@@ -5495,7 +5495,7 @@ bnx2_remove_one(struct pci_dev *pdev)
5495} 5495}
5496 5496
5497static int 5497static int
5498bnx2_suspend(struct pci_dev *pdev, u32 state) 5498bnx2_suspend(struct pci_dev *pdev, pm_message_t state)
5499{ 5499{
5500 struct net_device *dev = pci_get_drvdata(pdev); 5500 struct net_device *dev = pci_get_drvdata(pdev);
5501 struct bnx2 *bp = dev->priv; 5501 struct bnx2 *bp = dev->priv;
@@ -5513,7 +5513,7 @@ bnx2_suspend(struct pci_dev *pdev, u32 state)
5513 reset_code = BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL; 5513 reset_code = BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL;
5514 bnx2_reset_chip(bp, reset_code); 5514 bnx2_reset_chip(bp, reset_code);
5515 bnx2_free_skbs(bp); 5515 bnx2_free_skbs(bp);
5516 bnx2_set_power_state(bp, state); 5516 bnx2_set_power_state(bp, pci_choose_state(pdev, state));
5517 return 0; 5517 return 0;
5518} 5518}
5519 5519
@@ -5526,7 +5526,7 @@ bnx2_resume(struct pci_dev *pdev)
5526 if (!netif_running(dev)) 5526 if (!netif_running(dev))
5527 return 0; 5527 return 0;
5528 5528
5529 bnx2_set_power_state(bp, 0); 5529 bnx2_set_power_state(bp, PCI_D0);
5530 netif_device_attach(dev); 5530 netif_device_attach(dev);
5531 bnx2_init_nic(bp); 5531 bnx2_init_nic(bp);
5532 bnx2_netif_start(bp); 5532 bnx2_netif_start(bp);
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 9b596e0bbf95..7c8a0a22dcd5 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -162,7 +162,7 @@ static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); 162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
163static void e1000_restore_vlan(struct e1000_adapter *adapter); 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164 164
165static int e1000_suspend(struct pci_dev *pdev, uint32_t state); 165static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
166#ifdef CONFIG_PM 166#ifdef CONFIG_PM
167static int e1000_resume(struct pci_dev *pdev); 167static int e1000_resume(struct pci_dev *pdev);
168#endif 168#endif
@@ -3642,7 +3642,7 @@ e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
3642} 3642}
3643 3643
3644static int 3644static int
3645e1000_suspend(struct pci_dev *pdev, uint32_t state) 3645e1000_suspend(struct pci_dev *pdev, pm_message_t state)
3646{ 3646{
3647 struct net_device *netdev = pci_get_drvdata(pdev); 3647 struct net_device *netdev = pci_get_drvdata(pdev);
3648 struct e1000_adapter *adapter = netdev_priv(netdev); 3648 struct e1000_adapter *adapter = netdev_priv(netdev);
@@ -3726,9 +3726,7 @@ e1000_suspend(struct pci_dev *pdev, uint32_t state)
3726 } 3726 }
3727 3727
3728 pci_disable_device(pdev); 3728 pci_disable_device(pdev);
3729 3729 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3730 state = (state > 0) ? 3 : 0;
3731 pci_set_power_state(pdev, state);
3732 3730
3733 return 0; 3731 return 0;
3734} 3732}
@@ -3741,13 +3739,13 @@ e1000_resume(struct pci_dev *pdev)
3741 struct e1000_adapter *adapter = netdev_priv(netdev); 3739 struct e1000_adapter *adapter = netdev_priv(netdev);
3742 uint32_t manc, ret_val, swsm; 3740 uint32_t manc, ret_val, swsm;
3743 3741
3744 pci_set_power_state(pdev, 0); 3742 pci_set_power_state(pdev, PCI_D0);
3745 pci_restore_state(pdev); 3743 pci_restore_state(pdev);
3746 ret_val = pci_enable_device(pdev); 3744 ret_val = pci_enable_device(pdev);
3747 pci_set_master(pdev); 3745 pci_set_master(pdev);
3748 3746
3749 pci_enable_wake(pdev, 3, 0); 3747 pci_enable_wake(pdev, PCI_D3hot, 0);
3750 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ 3748 pci_enable_wake(pdev, PCI_D3cold, 0);
3751 3749
3752 e1000_reset(adapter); 3750 e1000_reset(adapter);
3753 E1000_WRITE_REG(&adapter->hw, WUS, ~0); 3751 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c
index 006e4f575606..6d9de626c967 100644
--- a/drivers/net/irda/vlsi_ir.c
+++ b/drivers/net/irda/vlsi_ir.c
@@ -1749,11 +1749,6 @@ static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state)
1749 struct net_device *ndev = pci_get_drvdata(pdev); 1749 struct net_device *ndev = pci_get_drvdata(pdev);
1750 vlsi_irda_dev_t *idev; 1750 vlsi_irda_dev_t *idev;
1751 1751
1752 if (state < 1 || state > 3 ) {
1753 IRDA_ERROR("%s - %s: invalid pm state request: %u\n",
1754 __FUNCTION__, PCIDEV_NAME(pdev), state);
1755 return 0;
1756 }
1757 if (!ndev) { 1752 if (!ndev) {
1758 IRDA_ERROR("%s - %s: no netdevice \n", 1753 IRDA_ERROR("%s - %s: no netdevice \n",
1759 __FUNCTION__, PCIDEV_NAME(pdev)); 1754 __FUNCTION__, PCIDEV_NAME(pdev));
@@ -1762,12 +1757,12 @@ static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state)
1762 idev = ndev->priv; 1757 idev = ndev->priv;
1763 down(&idev->sem); 1758 down(&idev->sem);
1764 if (pdev->current_state != 0) { /* already suspended */ 1759 if (pdev->current_state != 0) { /* already suspended */
1765 if (state > pdev->current_state) { /* simply go deeper */ 1760 if (state.event > pdev->current_state) { /* simply go deeper */
1766 pci_set_power_state(pdev,state); 1761 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1767 pdev->current_state = state; 1762 pdev->current_state = state.event;
1768 } 1763 }
1769 else 1764 else
1770 IRDA_ERROR("%s - %s: invalid suspend request %u -> %u\n", __FUNCTION__, PCIDEV_NAME(pdev), pdev->current_state, state); 1765 IRDA_ERROR("%s - %s: invalid suspend request %u -> %u\n", __FUNCTION__, PCIDEV_NAME(pdev), pdev->current_state, state.event);
1771 up(&idev->sem); 1766 up(&idev->sem);
1772 return 0; 1767 return 0;
1773 } 1768 }
@@ -1781,8 +1776,8 @@ static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state)
1781 idev->new_baud = idev->baud; 1776 idev->new_baud = idev->baud;
1782 } 1777 }
1783 1778
1784 pci_set_power_state(pdev,state); 1779 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1785 pdev->current_state = state; 1780 pdev->current_state = state.event;
1786 idev->resume_ok = 1; 1781 idev->resume_ok = 1;
1787 up(&idev->sem); 1782 up(&idev->sem);
1788 return 0; 1783 return 0;
@@ -1807,8 +1802,8 @@ static int vlsi_irda_resume(struct pci_dev *pdev)
1807 return 0; 1802 return 0;
1808 } 1803 }
1809 1804
1810 pci_set_power_state(pdev, 0); 1805 pci_set_power_state(pdev, PCI_D0);
1811 pdev->current_state = 0; 1806 pdev->current_state = PM_EVENT_ON;
1812 1807
1813 if (!idev->resume_ok) { 1808 if (!idev->resume_ok) {
1814 /* should be obsolete now - but used to happen due to: 1809 /* should be obsolete now - but used to happen due to:
diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c
index 183ba97785b0..dc5d089bf184 100644
--- a/drivers/net/iseries_veth.c
+++ b/drivers/net/iseries_veth.c
@@ -79,12 +79,55 @@
79#include <asm/iommu.h> 79#include <asm/iommu.h>
80#include <asm/vio.h> 80#include <asm/vio.h>
81 81
82#include "iseries_veth.h" 82#undef DEBUG
83 83
84MODULE_AUTHOR("Kyle Lucke <klucke@us.ibm.com>"); 84MODULE_AUTHOR("Kyle Lucke <klucke@us.ibm.com>");
85MODULE_DESCRIPTION("iSeries Virtual ethernet driver"); 85MODULE_DESCRIPTION("iSeries Virtual ethernet driver");
86MODULE_LICENSE("GPL"); 86MODULE_LICENSE("GPL");
87 87
88#define VETH_EVENT_CAP (0)
89#define VETH_EVENT_FRAMES (1)
90#define VETH_EVENT_MONITOR (2)
91#define VETH_EVENT_FRAMES_ACK (3)
92
93#define VETH_MAX_ACKS_PER_MSG (20)
94#define VETH_MAX_FRAMES_PER_MSG (6)
95
96struct veth_frames_data {
97 u32 addr[VETH_MAX_FRAMES_PER_MSG];
98 u16 len[VETH_MAX_FRAMES_PER_MSG];
99 u32 eofmask;
100};
101#define VETH_EOF_SHIFT (32-VETH_MAX_FRAMES_PER_MSG)
102
103struct veth_frames_ack_data {
104 u16 token[VETH_MAX_ACKS_PER_MSG];
105};
106
107struct veth_cap_data {
108 u8 caps_version;
109 u8 rsvd1;
110 u16 num_buffers;
111 u16 ack_threshold;
112 u16 rsvd2;
113 u32 ack_timeout;
114 u32 rsvd3;
115 u64 rsvd4[3];
116};
117
118struct veth_lpevent {
119 struct HvLpEvent base_event;
120 union {
121 struct veth_cap_data caps_data;
122 struct veth_frames_data frames_data;
123 struct veth_frames_ack_data frames_ack_data;
124 } u;
125
126};
127
128#define DRV_NAME "iseries_veth"
129#define DRV_VERSION "2.0"
130
88#define VETH_NUMBUFFERS (120) 131#define VETH_NUMBUFFERS (120)
89#define VETH_ACKTIMEOUT (1000000) /* microseconds */ 132#define VETH_ACKTIMEOUT (1000000) /* microseconds */
90#define VETH_MAX_MCAST (12) 133#define VETH_MAX_MCAST (12)
@@ -113,9 +156,9 @@ MODULE_LICENSE("GPL");
113 156
114struct veth_msg { 157struct veth_msg {
115 struct veth_msg *next; 158 struct veth_msg *next;
116 struct VethFramesData data; 159 struct veth_frames_data data;
117 int token; 160 int token;
118 unsigned long in_use; 161 int in_use;
119 struct sk_buff *skb; 162 struct sk_buff *skb;
120 struct device *dev; 163 struct device *dev;
121}; 164};
@@ -125,23 +168,28 @@ struct veth_lpar_connection {
125 struct work_struct statemachine_wq; 168 struct work_struct statemachine_wq;
126 struct veth_msg *msgs; 169 struct veth_msg *msgs;
127 int num_events; 170 int num_events;
128 struct VethCapData local_caps; 171 struct veth_cap_data local_caps;
129 172
173 struct kobject kobject;
130 struct timer_list ack_timer; 174 struct timer_list ack_timer;
131 175
176 struct timer_list reset_timer;
177 unsigned int reset_timeout;
178 unsigned long last_contact;
179 int outstanding_tx;
180
132 spinlock_t lock; 181 spinlock_t lock;
133 unsigned long state; 182 unsigned long state;
134 HvLpInstanceId src_inst; 183 HvLpInstanceId src_inst;
135 HvLpInstanceId dst_inst; 184 HvLpInstanceId dst_inst;
136 struct VethLpEvent cap_event, cap_ack_event; 185 struct veth_lpevent cap_event, cap_ack_event;
137 u16 pending_acks[VETH_MAX_ACKS_PER_MSG]; 186 u16 pending_acks[VETH_MAX_ACKS_PER_MSG];
138 u32 num_pending_acks; 187 u32 num_pending_acks;
139 188
140 int num_ack_events; 189 int num_ack_events;
141 struct VethCapData remote_caps; 190 struct veth_cap_data remote_caps;
142 u32 ack_timeout; 191 u32 ack_timeout;
143 192
144 spinlock_t msg_stack_lock;
145 struct veth_msg *msg_stack_head; 193 struct veth_msg *msg_stack_head;
146}; 194};
147 195
@@ -151,15 +199,17 @@ struct veth_port {
151 u64 mac_addr; 199 u64 mac_addr;
152 HvLpIndexMap lpar_map; 200 HvLpIndexMap lpar_map;
153 201
154 spinlock_t pending_gate; 202 /* queue_lock protects the stopped_map and dev's queue. */
155 struct sk_buff *pending_skb; 203 spinlock_t queue_lock;
156 HvLpIndexMap pending_lpmask; 204 HvLpIndexMap stopped_map;
157 205
206 /* mcast_gate protects promiscuous, num_mcast & mcast_addr. */
158 rwlock_t mcast_gate; 207 rwlock_t mcast_gate;
159 int promiscuous; 208 int promiscuous;
160 int all_mcast;
161 int num_mcast; 209 int num_mcast;
162 u64 mcast_addr[VETH_MAX_MCAST]; 210 u64 mcast_addr[VETH_MAX_MCAST];
211
212 struct kobject kobject;
163}; 213};
164 214
165static HvLpIndex this_lp; 215static HvLpIndex this_lp;
@@ -168,44 +218,56 @@ static struct net_device *veth_dev[HVMAXARCHITECTEDVIRTUALLANS]; /* = 0 */
168 218
169static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev); 219static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev);
170static void veth_recycle_msg(struct veth_lpar_connection *, struct veth_msg *); 220static void veth_recycle_msg(struct veth_lpar_connection *, struct veth_msg *);
171static void veth_flush_pending(struct veth_lpar_connection *cnx); 221static void veth_wake_queues(struct veth_lpar_connection *cnx);
172static void veth_receive(struct veth_lpar_connection *, struct VethLpEvent *); 222static void veth_stop_queues(struct veth_lpar_connection *cnx);
173static void veth_timed_ack(unsigned long connectionPtr); 223static void veth_receive(struct veth_lpar_connection *, struct veth_lpevent *);
224static void veth_release_connection(struct kobject *kobject);
225static void veth_timed_ack(unsigned long ptr);
226static void veth_timed_reset(unsigned long ptr);
174 227
175/* 228/*
176 * Utility functions 229 * Utility functions
177 */ 230 */
178 231
179#define veth_printk(prio, fmt, args...) \ 232#define veth_info(fmt, args...) \
180 printk(prio "%s: " fmt, __FILE__, ## args) 233 printk(KERN_INFO DRV_NAME ": " fmt, ## args)
181 234
182#define veth_error(fmt, args...) \ 235#define veth_error(fmt, args...) \
183 printk(KERN_ERR "(%s:%3.3d) ERROR: " fmt, __FILE__, __LINE__ , ## args) 236 printk(KERN_ERR DRV_NAME ": Error: " fmt, ## args)
237
238#ifdef DEBUG
239#define veth_debug(fmt, args...) \
240 printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
241#else
242#define veth_debug(fmt, args...) do {} while (0)
243#endif
184 244
245/* You must hold the connection's lock when you call this function. */
185static inline void veth_stack_push(struct veth_lpar_connection *cnx, 246static inline void veth_stack_push(struct veth_lpar_connection *cnx,
186 struct veth_msg *msg) 247 struct veth_msg *msg)
187{ 248{
188 unsigned long flags;
189
190 spin_lock_irqsave(&cnx->msg_stack_lock, flags);
191 msg->next = cnx->msg_stack_head; 249 msg->next = cnx->msg_stack_head;
192 cnx->msg_stack_head = msg; 250 cnx->msg_stack_head = msg;
193 spin_unlock_irqrestore(&cnx->msg_stack_lock, flags);
194} 251}
195 252
253/* You must hold the connection's lock when you call this function. */
196static inline struct veth_msg *veth_stack_pop(struct veth_lpar_connection *cnx) 254static inline struct veth_msg *veth_stack_pop(struct veth_lpar_connection *cnx)
197{ 255{
198 unsigned long flags;
199 struct veth_msg *msg; 256 struct veth_msg *msg;
200 257
201 spin_lock_irqsave(&cnx->msg_stack_lock, flags);
202 msg = cnx->msg_stack_head; 258 msg = cnx->msg_stack_head;
203 if (msg) 259 if (msg)
204 cnx->msg_stack_head = cnx->msg_stack_head->next; 260 cnx->msg_stack_head = cnx->msg_stack_head->next;
205 spin_unlock_irqrestore(&cnx->msg_stack_lock, flags); 261
206 return msg; 262 return msg;
207} 263}
208 264
265/* You must hold the connection's lock when you call this function. */
266static inline int veth_stack_is_empty(struct veth_lpar_connection *cnx)
267{
268 return cnx->msg_stack_head == NULL;
269}
270
209static inline HvLpEvent_Rc 271static inline HvLpEvent_Rc
210veth_signalevent(struct veth_lpar_connection *cnx, u16 subtype, 272veth_signalevent(struct veth_lpar_connection *cnx, u16 subtype,
211 HvLpEvent_AckInd ackind, HvLpEvent_AckType acktype, 273 HvLpEvent_AckInd ackind, HvLpEvent_AckType acktype,
@@ -249,7 +311,7 @@ static int veth_allocate_events(HvLpIndex rlp, int number)
249 struct veth_allocation vc = { COMPLETION_INITIALIZER(vc.c), 0 }; 311 struct veth_allocation vc = { COMPLETION_INITIALIZER(vc.c), 0 };
250 312
251 mf_allocate_lp_events(rlp, HvLpEvent_Type_VirtualLan, 313 mf_allocate_lp_events(rlp, HvLpEvent_Type_VirtualLan,
252 sizeof(struct VethLpEvent), number, 314 sizeof(struct veth_lpevent), number,
253 &veth_complete_allocation, &vc); 315 &veth_complete_allocation, &vc);
254 wait_for_completion(&vc.c); 316 wait_for_completion(&vc.c);
255 317
@@ -257,6 +319,137 @@ static int veth_allocate_events(HvLpIndex rlp, int number)
257} 319}
258 320
259/* 321/*
322 * sysfs support
323 */
324
325struct veth_cnx_attribute {
326 struct attribute attr;
327 ssize_t (*show)(struct veth_lpar_connection *, char *buf);
328 ssize_t (*store)(struct veth_lpar_connection *, const char *buf);
329};
330
331static ssize_t veth_cnx_attribute_show(struct kobject *kobj,
332 struct attribute *attr, char *buf)
333{
334 struct veth_cnx_attribute *cnx_attr;
335 struct veth_lpar_connection *cnx;
336
337 cnx_attr = container_of(attr, struct veth_cnx_attribute, attr);
338 cnx = container_of(kobj, struct veth_lpar_connection, kobject);
339
340 if (!cnx_attr->show)
341 return -EIO;
342
343 return cnx_attr->show(cnx, buf);
344}
345
346#define CUSTOM_CNX_ATTR(_name, _format, _expression) \
347static ssize_t _name##_show(struct veth_lpar_connection *cnx, char *buf)\
348{ \
349 return sprintf(buf, _format, _expression); \
350} \
351struct veth_cnx_attribute veth_cnx_attr_##_name = __ATTR_RO(_name)
352
353#define SIMPLE_CNX_ATTR(_name) \
354 CUSTOM_CNX_ATTR(_name, "%lu\n", (unsigned long)cnx->_name)
355
356SIMPLE_CNX_ATTR(outstanding_tx);
357SIMPLE_CNX_ATTR(remote_lp);
358SIMPLE_CNX_ATTR(num_events);
359SIMPLE_CNX_ATTR(src_inst);
360SIMPLE_CNX_ATTR(dst_inst);
361SIMPLE_CNX_ATTR(num_pending_acks);
362SIMPLE_CNX_ATTR(num_ack_events);
363CUSTOM_CNX_ATTR(ack_timeout, "%d\n", jiffies_to_msecs(cnx->ack_timeout));
364CUSTOM_CNX_ATTR(reset_timeout, "%d\n", jiffies_to_msecs(cnx->reset_timeout));
365CUSTOM_CNX_ATTR(state, "0x%.4lX\n", cnx->state);
366CUSTOM_CNX_ATTR(last_contact, "%d\n", cnx->last_contact ?
367 jiffies_to_msecs(jiffies - cnx->last_contact) : 0);
368
369#define GET_CNX_ATTR(_name) (&veth_cnx_attr_##_name.attr)
370
371static struct attribute *veth_cnx_default_attrs[] = {
372 GET_CNX_ATTR(outstanding_tx),
373 GET_CNX_ATTR(remote_lp),
374 GET_CNX_ATTR(num_events),
375 GET_CNX_ATTR(reset_timeout),
376 GET_CNX_ATTR(last_contact),
377 GET_CNX_ATTR(state),
378 GET_CNX_ATTR(src_inst),
379 GET_CNX_ATTR(dst_inst),
380 GET_CNX_ATTR(num_pending_acks),
381 GET_CNX_ATTR(num_ack_events),
382 GET_CNX_ATTR(ack_timeout),
383 NULL
384};
385
386static struct sysfs_ops veth_cnx_sysfs_ops = {
387 .show = veth_cnx_attribute_show
388};
389
390static struct kobj_type veth_lpar_connection_ktype = {
391 .release = veth_release_connection,
392 .sysfs_ops = &veth_cnx_sysfs_ops,
393 .default_attrs = veth_cnx_default_attrs
394};
395
396struct veth_port_attribute {
397 struct attribute attr;
398 ssize_t (*show)(struct veth_port *, char *buf);
399 ssize_t (*store)(struct veth_port *, const char *buf);
400};
401
402static ssize_t veth_port_attribute_show(struct kobject *kobj,
403 struct attribute *attr, char *buf)
404{
405 struct veth_port_attribute *port_attr;
406 struct veth_port *port;
407
408 port_attr = container_of(attr, struct veth_port_attribute, attr);
409 port = container_of(kobj, struct veth_port, kobject);
410
411 if (!port_attr->show)
412 return -EIO;
413
414 return port_attr->show(port, buf);
415}
416
417#define CUSTOM_PORT_ATTR(_name, _format, _expression) \
418static ssize_t _name##_show(struct veth_port *port, char *buf) \
419{ \
420 return sprintf(buf, _format, _expression); \
421} \
422struct veth_port_attribute veth_port_attr_##_name = __ATTR_RO(_name)
423
424#define SIMPLE_PORT_ATTR(_name) \
425 CUSTOM_PORT_ATTR(_name, "%lu\n", (unsigned long)port->_name)
426
427SIMPLE_PORT_ATTR(promiscuous);
428SIMPLE_PORT_ATTR(num_mcast);
429CUSTOM_PORT_ATTR(lpar_map, "0x%X\n", port->lpar_map);
430CUSTOM_PORT_ATTR(stopped_map, "0x%X\n", port->stopped_map);
431CUSTOM_PORT_ATTR(mac_addr, "0x%lX\n", port->mac_addr);
432
433#define GET_PORT_ATTR(_name) (&veth_port_attr_##_name.attr)
434static struct attribute *veth_port_default_attrs[] = {
435 GET_PORT_ATTR(mac_addr),
436 GET_PORT_ATTR(lpar_map),
437 GET_PORT_ATTR(stopped_map),
438 GET_PORT_ATTR(promiscuous),
439 GET_PORT_ATTR(num_mcast),
440 NULL
441};
442
443static struct sysfs_ops veth_port_sysfs_ops = {
444 .show = veth_port_attribute_show
445};
446
447static struct kobj_type veth_port_ktype = {
448 .sysfs_ops = &veth_port_sysfs_ops,
449 .default_attrs = veth_port_default_attrs
450};
451
452/*
260 * LPAR connection code 453 * LPAR connection code
261 */ 454 */
262 455
@@ -266,7 +459,7 @@ static inline void veth_kick_statemachine(struct veth_lpar_connection *cnx)
266} 459}
267 460
268static void veth_take_cap(struct veth_lpar_connection *cnx, 461static void veth_take_cap(struct veth_lpar_connection *cnx,
269 struct VethLpEvent *event) 462 struct veth_lpevent *event)
270{ 463{
271 unsigned long flags; 464 unsigned long flags;
272 465
@@ -278,7 +471,7 @@ static void veth_take_cap(struct veth_lpar_connection *cnx,
278 HvLpEvent_Type_VirtualLan); 471 HvLpEvent_Type_VirtualLan);
279 472
280 if (cnx->state & VETH_STATE_GOTCAPS) { 473 if (cnx->state & VETH_STATE_GOTCAPS) {
281 veth_error("Received a second capabilities from lpar %d\n", 474 veth_error("Received a second capabilities from LPAR %d.\n",
282 cnx->remote_lp); 475 cnx->remote_lp);
283 event->base_event.xRc = HvLpEvent_Rc_BufferNotAvailable; 476 event->base_event.xRc = HvLpEvent_Rc_BufferNotAvailable;
284 HvCallEvent_ackLpEvent((struct HvLpEvent *) event); 477 HvCallEvent_ackLpEvent((struct HvLpEvent *) event);
@@ -291,13 +484,13 @@ static void veth_take_cap(struct veth_lpar_connection *cnx,
291} 484}
292 485
293static void veth_take_cap_ack(struct veth_lpar_connection *cnx, 486static void veth_take_cap_ack(struct veth_lpar_connection *cnx,
294 struct VethLpEvent *event) 487 struct veth_lpevent *event)
295{ 488{
296 unsigned long flags; 489 unsigned long flags;
297 490
298 spin_lock_irqsave(&cnx->lock, flags); 491 spin_lock_irqsave(&cnx->lock, flags);
299 if (cnx->state & VETH_STATE_GOTCAPACK) { 492 if (cnx->state & VETH_STATE_GOTCAPACK) {
300 veth_error("Received a second capabilities ack from lpar %d\n", 493 veth_error("Received a second capabilities ack from LPAR %d.\n",
301 cnx->remote_lp); 494 cnx->remote_lp);
302 } else { 495 } else {
303 memcpy(&cnx->cap_ack_event, event, 496 memcpy(&cnx->cap_ack_event, event,
@@ -309,19 +502,24 @@ static void veth_take_cap_ack(struct veth_lpar_connection *cnx,
309} 502}
310 503
311static void veth_take_monitor_ack(struct veth_lpar_connection *cnx, 504static void veth_take_monitor_ack(struct veth_lpar_connection *cnx,
312 struct VethLpEvent *event) 505 struct veth_lpevent *event)
313{ 506{
314 unsigned long flags; 507 unsigned long flags;
315 508
316 spin_lock_irqsave(&cnx->lock, flags); 509 spin_lock_irqsave(&cnx->lock, flags);
317 veth_printk(KERN_DEBUG, "Monitor ack returned for lpar %d\n", 510 veth_debug("cnx %d: lost connection.\n", cnx->remote_lp);
318 cnx->remote_lp); 511
319 cnx->state |= VETH_STATE_RESET; 512 /* Avoid kicking the statemachine once we're shutdown.
320 veth_kick_statemachine(cnx); 513 * It's unnecessary and it could break veth_stop_connection(). */
514
515 if (! (cnx->state & VETH_STATE_SHUTDOWN)) {
516 cnx->state |= VETH_STATE_RESET;
517 veth_kick_statemachine(cnx);
518 }
321 spin_unlock_irqrestore(&cnx->lock, flags); 519 spin_unlock_irqrestore(&cnx->lock, flags);
322} 520}
323 521
324static void veth_handle_ack(struct VethLpEvent *event) 522static void veth_handle_ack(struct veth_lpevent *event)
325{ 523{
326 HvLpIndex rlp = event->base_event.xTargetLp; 524 HvLpIndex rlp = event->base_event.xTargetLp;
327 struct veth_lpar_connection *cnx = veth_cnx[rlp]; 525 struct veth_lpar_connection *cnx = veth_cnx[rlp];
@@ -329,58 +527,67 @@ static void veth_handle_ack(struct VethLpEvent *event)
329 BUG_ON(! cnx); 527 BUG_ON(! cnx);
330 528
331 switch (event->base_event.xSubtype) { 529 switch (event->base_event.xSubtype) {
332 case VethEventTypeCap: 530 case VETH_EVENT_CAP:
333 veth_take_cap_ack(cnx, event); 531 veth_take_cap_ack(cnx, event);
334 break; 532 break;
335 case VethEventTypeMonitor: 533 case VETH_EVENT_MONITOR:
336 veth_take_monitor_ack(cnx, event); 534 veth_take_monitor_ack(cnx, event);
337 break; 535 break;
338 default: 536 default:
339 veth_error("Unknown ack type %d from lpar %d\n", 537 veth_error("Unknown ack type %d from LPAR %d.\n",
340 event->base_event.xSubtype, rlp); 538 event->base_event.xSubtype, rlp);
341 }; 539 };
342} 540}
343 541
344static void veth_handle_int(struct VethLpEvent *event) 542static void veth_handle_int(struct veth_lpevent *event)
345{ 543{
346 HvLpIndex rlp = event->base_event.xSourceLp; 544 HvLpIndex rlp = event->base_event.xSourceLp;
347 struct veth_lpar_connection *cnx = veth_cnx[rlp]; 545 struct veth_lpar_connection *cnx = veth_cnx[rlp];
348 unsigned long flags; 546 unsigned long flags;
349 int i; 547 int i, acked = 0;
350 548
351 BUG_ON(! cnx); 549 BUG_ON(! cnx);
352 550
353 switch (event->base_event.xSubtype) { 551 switch (event->base_event.xSubtype) {
354 case VethEventTypeCap: 552 case VETH_EVENT_CAP:
355 veth_take_cap(cnx, event); 553 veth_take_cap(cnx, event);
356 break; 554 break;
357 case VethEventTypeMonitor: 555 case VETH_EVENT_MONITOR:
358 /* do nothing... this'll hang out here til we're dead, 556 /* do nothing... this'll hang out here til we're dead,
359 * and the hypervisor will return it for us. */ 557 * and the hypervisor will return it for us. */
360 break; 558 break;
361 case VethEventTypeFramesAck: 559 case VETH_EVENT_FRAMES_ACK:
362 spin_lock_irqsave(&cnx->lock, flags); 560 spin_lock_irqsave(&cnx->lock, flags);
561
363 for (i = 0; i < VETH_MAX_ACKS_PER_MSG; ++i) { 562 for (i = 0; i < VETH_MAX_ACKS_PER_MSG; ++i) {
364 u16 msgnum = event->u.frames_ack_data.token[i]; 563 u16 msgnum = event->u.frames_ack_data.token[i];
365 564
366 if (msgnum < VETH_NUMBUFFERS) 565 if (msgnum < VETH_NUMBUFFERS) {
367 veth_recycle_msg(cnx, cnx->msgs + msgnum); 566 veth_recycle_msg(cnx, cnx->msgs + msgnum);
567 cnx->outstanding_tx--;
568 acked++;
569 }
570 }
571
572 if (acked > 0) {
573 cnx->last_contact = jiffies;
574 veth_wake_queues(cnx);
368 } 575 }
576
369 spin_unlock_irqrestore(&cnx->lock, flags); 577 spin_unlock_irqrestore(&cnx->lock, flags);
370 veth_flush_pending(cnx);
371 break; 578 break;
372 case VethEventTypeFrames: 579 case VETH_EVENT_FRAMES:
373 veth_receive(cnx, event); 580 veth_receive(cnx, event);
374 break; 581 break;
375 default: 582 default:
376 veth_error("Unknown interrupt type %d from lpar %d\n", 583 veth_error("Unknown interrupt type %d from LPAR %d.\n",
377 event->base_event.xSubtype, rlp); 584 event->base_event.xSubtype, rlp);
378 }; 585 };
379} 586}
380 587
381static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs) 588static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs)
382{ 589{
383 struct VethLpEvent *veth_event = (struct VethLpEvent *)event; 590 struct veth_lpevent *veth_event = (struct veth_lpevent *)event;
384 591
385 if (event->xFlags.xFunction == HvLpEvent_Function_Ack) 592 if (event->xFlags.xFunction == HvLpEvent_Function_Ack)
386 veth_handle_ack(veth_event); 593 veth_handle_ack(veth_event);
@@ -390,7 +597,7 @@ static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs)
390 597
391static int veth_process_caps(struct veth_lpar_connection *cnx) 598static int veth_process_caps(struct veth_lpar_connection *cnx)
392{ 599{
393 struct VethCapData *remote_caps = &cnx->remote_caps; 600 struct veth_cap_data *remote_caps = &cnx->remote_caps;
394 int num_acks_needed; 601 int num_acks_needed;
395 602
396 /* Convert timer to jiffies */ 603 /* Convert timer to jiffies */
@@ -400,8 +607,8 @@ static int veth_process_caps(struct veth_lpar_connection *cnx)
400 || (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG) 607 || (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG)
401 || (remote_caps->ack_threshold == 0) 608 || (remote_caps->ack_threshold == 0)
402 || (cnx->ack_timeout == 0) ) { 609 || (cnx->ack_timeout == 0) ) {
403 veth_error("Received incompatible capabilities from lpar %d\n", 610 veth_error("Received incompatible capabilities from LPAR %d.\n",
404 cnx->remote_lp); 611 cnx->remote_lp);
405 return HvLpEvent_Rc_InvalidSubtypeData; 612 return HvLpEvent_Rc_InvalidSubtypeData;
406 } 613 }
407 614
@@ -418,8 +625,8 @@ static int veth_process_caps(struct veth_lpar_connection *cnx)
418 cnx->num_ack_events += num; 625 cnx->num_ack_events += num;
419 626
420 if (cnx->num_ack_events < num_acks_needed) { 627 if (cnx->num_ack_events < num_acks_needed) {
421 veth_error("Couldn't allocate enough ack events for lpar %d\n", 628 veth_error("Couldn't allocate enough ack events "
422 cnx->remote_lp); 629 "for LPAR %d.\n", cnx->remote_lp);
423 630
424 return HvLpEvent_Rc_BufferNotAvailable; 631 return HvLpEvent_Rc_BufferNotAvailable;
425 } 632 }
@@ -440,15 +647,15 @@ static void veth_statemachine(void *p)
440 647
441 restart: 648 restart:
442 if (cnx->state & VETH_STATE_RESET) { 649 if (cnx->state & VETH_STATE_RESET) {
443 int i;
444
445 del_timer(&cnx->ack_timer);
446
447 if (cnx->state & VETH_STATE_OPEN) 650 if (cnx->state & VETH_STATE_OPEN)
448 HvCallEvent_closeLpEventPath(cnx->remote_lp, 651 HvCallEvent_closeLpEventPath(cnx->remote_lp,
449 HvLpEvent_Type_VirtualLan); 652 HvLpEvent_Type_VirtualLan);
450 653
451 /* reset ack data */ 654 /*
655 * Reset ack data. This prevents the ack_timer actually
656 * doing anything, even if it runs one more time when
657 * we drop the lock below.
658 */
452 memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks)); 659 memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks));
453 cnx->num_pending_acks = 0; 660 cnx->num_pending_acks = 0;
454 661
@@ -458,14 +665,32 @@ static void veth_statemachine(void *p)
458 | VETH_STATE_SENTCAPACK | VETH_STATE_READY); 665 | VETH_STATE_SENTCAPACK | VETH_STATE_READY);
459 666
460 /* Clean up any leftover messages */ 667 /* Clean up any leftover messages */
461 if (cnx->msgs) 668 if (cnx->msgs) {
669 int i;
462 for (i = 0; i < VETH_NUMBUFFERS; ++i) 670 for (i = 0; i < VETH_NUMBUFFERS; ++i)
463 veth_recycle_msg(cnx, cnx->msgs + i); 671 veth_recycle_msg(cnx, cnx->msgs + i);
672 }
673
674 cnx->outstanding_tx = 0;
675 veth_wake_queues(cnx);
676
677 /* Drop the lock so we can do stuff that might sleep or
678 * take other locks. */
464 spin_unlock_irq(&cnx->lock); 679 spin_unlock_irq(&cnx->lock);
465 veth_flush_pending(cnx); 680
681 del_timer_sync(&cnx->ack_timer);
682 del_timer_sync(&cnx->reset_timer);
683
466 spin_lock_irq(&cnx->lock); 684 spin_lock_irq(&cnx->lock);
685
467 if (cnx->state & VETH_STATE_RESET) 686 if (cnx->state & VETH_STATE_RESET)
468 goto restart; 687 goto restart;
688
689 /* Hack, wait for the other end to reset itself. */
690 if (! (cnx->state & VETH_STATE_SHUTDOWN)) {
691 schedule_delayed_work(&cnx->statemachine_wq, 5 * HZ);
692 goto out;
693 }
469 } 694 }
470 695
471 if (cnx->state & VETH_STATE_SHUTDOWN) 696 if (cnx->state & VETH_STATE_SHUTDOWN)
@@ -488,7 +713,7 @@ static void veth_statemachine(void *p)
488 713
489 if ( (cnx->state & VETH_STATE_OPEN) 714 if ( (cnx->state & VETH_STATE_OPEN)
490 && !(cnx->state & VETH_STATE_SENTMON) ) { 715 && !(cnx->state & VETH_STATE_SENTMON) ) {
491 rc = veth_signalevent(cnx, VethEventTypeMonitor, 716 rc = veth_signalevent(cnx, VETH_EVENT_MONITOR,
492 HvLpEvent_AckInd_DoAck, 717 HvLpEvent_AckInd_DoAck,
493 HvLpEvent_AckType_DeferredAck, 718 HvLpEvent_AckType_DeferredAck,
494 0, 0, 0, 0, 0, 0); 719 0, 0, 0, 0, 0, 0);
@@ -498,9 +723,8 @@ static void veth_statemachine(void *p)
498 } else { 723 } else {
499 if ( (rc != HvLpEvent_Rc_PartitionDead) 724 if ( (rc != HvLpEvent_Rc_PartitionDead)
500 && (rc != HvLpEvent_Rc_PathClosed) ) 725 && (rc != HvLpEvent_Rc_PathClosed) )
501 veth_error("Error sending monitor to " 726 veth_error("Error sending monitor to LPAR %d, "
502 "lpar %d, rc=%x\n", 727 "rc = %d\n", rlp, rc);
503 rlp, (int) rc);
504 728
505 /* Oh well, hope we get a cap from the other 729 /* Oh well, hope we get a cap from the other
506 * end and do better when that kicks us */ 730 * end and do better when that kicks us */
@@ -512,7 +736,7 @@ static void veth_statemachine(void *p)
512 && !(cnx->state & VETH_STATE_SENTCAPS)) { 736 && !(cnx->state & VETH_STATE_SENTCAPS)) {
513 u64 *rawcap = (u64 *)&cnx->local_caps; 737 u64 *rawcap = (u64 *)&cnx->local_caps;
514 738
515 rc = veth_signalevent(cnx, VethEventTypeCap, 739 rc = veth_signalevent(cnx, VETH_EVENT_CAP,
516 HvLpEvent_AckInd_DoAck, 740 HvLpEvent_AckInd_DoAck,
517 HvLpEvent_AckType_ImmediateAck, 741 HvLpEvent_AckType_ImmediateAck,
518 0, rawcap[0], rawcap[1], rawcap[2], 742 0, rawcap[0], rawcap[1], rawcap[2],
@@ -523,9 +747,9 @@ static void veth_statemachine(void *p)
523 } else { 747 } else {
524 if ( (rc != HvLpEvent_Rc_PartitionDead) 748 if ( (rc != HvLpEvent_Rc_PartitionDead)
525 && (rc != HvLpEvent_Rc_PathClosed) ) 749 && (rc != HvLpEvent_Rc_PathClosed) )
526 veth_error("Error sending caps to " 750 veth_error("Error sending caps to LPAR %d, "
527 "lpar %d, rc=%x\n", 751 "rc = %d\n", rlp, rc);
528 rlp, (int) rc); 752
529 /* Oh well, hope we get a cap from the other 753 /* Oh well, hope we get a cap from the other
530 * end and do better when that kicks us */ 754 * end and do better when that kicks us */
531 goto out; 755 goto out;
@@ -534,7 +758,7 @@ static void veth_statemachine(void *p)
534 758
535 if ((cnx->state & VETH_STATE_GOTCAPS) 759 if ((cnx->state & VETH_STATE_GOTCAPS)
536 && !(cnx->state & VETH_STATE_SENTCAPACK)) { 760 && !(cnx->state & VETH_STATE_SENTCAPACK)) {
537 struct VethCapData *remote_caps = &cnx->remote_caps; 761 struct veth_cap_data *remote_caps = &cnx->remote_caps;
538 762
539 memcpy(remote_caps, &cnx->cap_event.u.caps_data, 763 memcpy(remote_caps, &cnx->cap_event.u.caps_data,
540 sizeof(*remote_caps)); 764 sizeof(*remote_caps));
@@ -565,10 +789,8 @@ static void veth_statemachine(void *p)
565 add_timer(&cnx->ack_timer); 789 add_timer(&cnx->ack_timer);
566 cnx->state |= VETH_STATE_READY; 790 cnx->state |= VETH_STATE_READY;
567 } else { 791 } else {
568 veth_printk(KERN_ERR, "Caps rejected (rc=%d) by " 792 veth_error("Caps rejected by LPAR %d, rc = %d\n",
569 "lpar %d\n", 793 rlp, cnx->cap_ack_event.base_event.xRc);
570 cnx->cap_ack_event.base_event.xRc,
571 rlp);
572 goto cant_cope; 794 goto cant_cope;
573 } 795 }
574 } 796 }
@@ -581,8 +803,8 @@ static void veth_statemachine(void *p)
581 /* FIXME: we get here if something happens we really can't 803 /* FIXME: we get here if something happens we really can't
582 * cope with. The link will never work once we get here, and 804 * cope with. The link will never work once we get here, and
583 * all we can do is not lock the rest of the system up */ 805 * all we can do is not lock the rest of the system up */
584 veth_error("Badness on connection to lpar %d (state=%04lx) " 806 veth_error("Unrecoverable error on connection to LPAR %d, shutting down"
585 " - shutting down\n", rlp, cnx->state); 807 " (state = 0x%04lx)\n", rlp, cnx->state);
586 cnx->state |= VETH_STATE_SHUTDOWN; 808 cnx->state |= VETH_STATE_SHUTDOWN;
587 spin_unlock_irq(&cnx->lock); 809 spin_unlock_irq(&cnx->lock);
588} 810}
@@ -591,7 +813,7 @@ static int veth_init_connection(u8 rlp)
591{ 813{
592 struct veth_lpar_connection *cnx; 814 struct veth_lpar_connection *cnx;
593 struct veth_msg *msgs; 815 struct veth_msg *msgs;
594 int i; 816 int i, rc;
595 817
596 if ( (rlp == this_lp) 818 if ( (rlp == this_lp)
597 || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) ) 819 || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) )
@@ -605,22 +827,36 @@ static int veth_init_connection(u8 rlp)
605 cnx->remote_lp = rlp; 827 cnx->remote_lp = rlp;
606 spin_lock_init(&cnx->lock); 828 spin_lock_init(&cnx->lock);
607 INIT_WORK(&cnx->statemachine_wq, veth_statemachine, cnx); 829 INIT_WORK(&cnx->statemachine_wq, veth_statemachine, cnx);
830
608 init_timer(&cnx->ack_timer); 831 init_timer(&cnx->ack_timer);
609 cnx->ack_timer.function = veth_timed_ack; 832 cnx->ack_timer.function = veth_timed_ack;
610 cnx->ack_timer.data = (unsigned long) cnx; 833 cnx->ack_timer.data = (unsigned long) cnx;
834
835 init_timer(&cnx->reset_timer);
836 cnx->reset_timer.function = veth_timed_reset;
837 cnx->reset_timer.data = (unsigned long) cnx;
838 cnx->reset_timeout = 5 * HZ * (VETH_ACKTIMEOUT / 1000000);
839
611 memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks)); 840 memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks));
612 841
613 veth_cnx[rlp] = cnx; 842 veth_cnx[rlp] = cnx;
614 843
844 /* This gets us 1 reference, which is held on behalf of the driver
845 * infrastructure. It's released at module unload. */
846 kobject_init(&cnx->kobject);
847 cnx->kobject.ktype = &veth_lpar_connection_ktype;
848 rc = kobject_set_name(&cnx->kobject, "cnx%.2d", rlp);
849 if (rc != 0)
850 return rc;
851
615 msgs = kmalloc(VETH_NUMBUFFERS * sizeof(struct veth_msg), GFP_KERNEL); 852 msgs = kmalloc(VETH_NUMBUFFERS * sizeof(struct veth_msg), GFP_KERNEL);
616 if (! msgs) { 853 if (! msgs) {
617 veth_error("Can't allocate buffers for lpar %d\n", rlp); 854 veth_error("Can't allocate buffers for LPAR %d.\n", rlp);
618 return -ENOMEM; 855 return -ENOMEM;
619 } 856 }
620 857
621 cnx->msgs = msgs; 858 cnx->msgs = msgs;
622 memset(msgs, 0, VETH_NUMBUFFERS * sizeof(struct veth_msg)); 859 memset(msgs, 0, VETH_NUMBUFFERS * sizeof(struct veth_msg));
623 spin_lock_init(&cnx->msg_stack_lock);
624 860
625 for (i = 0; i < VETH_NUMBUFFERS; i++) { 861 for (i = 0; i < VETH_NUMBUFFERS; i++) {
626 msgs[i].token = i; 862 msgs[i].token = i;
@@ -630,8 +866,7 @@ static int veth_init_connection(u8 rlp)
630 cnx->num_events = veth_allocate_events(rlp, 2 + VETH_NUMBUFFERS); 866 cnx->num_events = veth_allocate_events(rlp, 2 + VETH_NUMBUFFERS);
631 867
632 if (cnx->num_events < (2 + VETH_NUMBUFFERS)) { 868 if (cnx->num_events < (2 + VETH_NUMBUFFERS)) {
633 veth_error("Can't allocate events for lpar %d, only got %d\n", 869 veth_error("Can't allocate enough events for LPAR %d.\n", rlp);
634 rlp, cnx->num_events);
635 return -ENOMEM; 870 return -ENOMEM;
636 } 871 }
637 872
@@ -642,11 +877,9 @@ static int veth_init_connection(u8 rlp)
642 return 0; 877 return 0;
643} 878}
644 879
645static void veth_stop_connection(u8 rlp) 880static void veth_stop_connection(struct veth_lpar_connection *cnx)
646{ 881{
647 struct veth_lpar_connection *cnx = veth_cnx[rlp]; 882 if (!cnx)
648
649 if (! cnx)
650 return; 883 return;
651 884
652 spin_lock_irq(&cnx->lock); 885 spin_lock_irq(&cnx->lock);
@@ -654,12 +887,23 @@ static void veth_stop_connection(u8 rlp)
654 veth_kick_statemachine(cnx); 887 veth_kick_statemachine(cnx);
655 spin_unlock_irq(&cnx->lock); 888 spin_unlock_irq(&cnx->lock);
656 889
890 /* There's a slim chance the reset code has just queued the
891 * statemachine to run in five seconds. If so we need to cancel
892 * that and requeue the work to run now. */
893 if (cancel_delayed_work(&cnx->statemachine_wq)) {
894 spin_lock_irq(&cnx->lock);
895 veth_kick_statemachine(cnx);
896 spin_unlock_irq(&cnx->lock);
897 }
898
899 /* Wait for the state machine to run. */
657 flush_scheduled_work(); 900 flush_scheduled_work();
901}
658 902
659 /* FIXME: not sure if this is necessary - will already have 903static void veth_destroy_connection(struct veth_lpar_connection *cnx)
660 * been deleted by the state machine, just want to make sure 904{
661 * its not running any more */ 905 if (!cnx)
662 del_timer_sync(&cnx->ack_timer); 906 return;
663 907
664 if (cnx->num_events > 0) 908 if (cnx->num_events > 0)
665 mf_deallocate_lp_events(cnx->remote_lp, 909 mf_deallocate_lp_events(cnx->remote_lp,
@@ -671,18 +915,18 @@ static void veth_stop_connection(u8 rlp)
671 HvLpEvent_Type_VirtualLan, 915 HvLpEvent_Type_VirtualLan,
672 cnx->num_ack_events, 916 cnx->num_ack_events,
673 NULL, NULL); 917 NULL, NULL);
674}
675
676static void veth_destroy_connection(u8 rlp)
677{
678 struct veth_lpar_connection *cnx = veth_cnx[rlp];
679
680 if (! cnx)
681 return;
682 918
683 kfree(cnx->msgs); 919 kfree(cnx->msgs);
920 veth_cnx[cnx->remote_lp] = NULL;
684 kfree(cnx); 921 kfree(cnx);
685 veth_cnx[rlp] = NULL; 922}
923
924static void veth_release_connection(struct kobject *kobj)
925{
926 struct veth_lpar_connection *cnx;
927 cnx = container_of(kobj, struct veth_lpar_connection, kobject);
928 veth_stop_connection(cnx);
929 veth_destroy_connection(cnx);
686} 930}
687 931
688/* 932/*
@@ -726,17 +970,15 @@ static void veth_set_multicast_list(struct net_device *dev)
726 970
727 write_lock_irqsave(&port->mcast_gate, flags); 971 write_lock_irqsave(&port->mcast_gate, flags);
728 972
729 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ 973 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
730 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", 974 (dev->mc_count > VETH_MAX_MCAST)) {
731 dev->name);
732 port->promiscuous = 1; 975 port->promiscuous = 1;
733 } else if ( (dev->flags & IFF_ALLMULTI)
734 || (dev->mc_count > VETH_MAX_MCAST) ) {
735 port->all_mcast = 1;
736 } else { 976 } else {
737 struct dev_mc_list *dmi = dev->mc_list; 977 struct dev_mc_list *dmi = dev->mc_list;
738 int i; 978 int i;
739 979
980 port->promiscuous = 0;
981
740 /* Update table */ 982 /* Update table */
741 port->num_mcast = 0; 983 port->num_mcast = 0;
742 984
@@ -758,9 +1000,10 @@ static void veth_set_multicast_list(struct net_device *dev)
758 1000
759static void veth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1001static void veth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
760{ 1002{
761 strncpy(info->driver, "veth", sizeof(info->driver) - 1); 1003 strncpy(info->driver, DRV_NAME, sizeof(info->driver) - 1);
762 info->driver[sizeof(info->driver) - 1] = '\0'; 1004 info->driver[sizeof(info->driver) - 1] = '\0';
763 strncpy(info->version, "1.0", sizeof(info->version) - 1); 1005 strncpy(info->version, DRV_VERSION, sizeof(info->version) - 1);
1006 info->version[sizeof(info->version) - 1] = '\0';
764} 1007}
765 1008
766static int veth_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1009static int veth_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
@@ -791,49 +1034,6 @@ static struct ethtool_ops ops = {
791 .get_link = veth_get_link, 1034 .get_link = veth_get_link,
792}; 1035};
793 1036
794static void veth_tx_timeout(struct net_device *dev)
795{
796 struct veth_port *port = (struct veth_port *)dev->priv;
797 struct net_device_stats *stats = &port->stats;
798 unsigned long flags;
799 int i;
800
801 stats->tx_errors++;
802
803 spin_lock_irqsave(&port->pending_gate, flags);
804
805 if (!port->pending_lpmask) {
806 spin_unlock_irqrestore(&port->pending_gate, flags);
807 return;
808 }
809
810 printk(KERN_WARNING "%s: Tx timeout! Resetting lp connections: %08x\n",
811 dev->name, port->pending_lpmask);
812
813 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) {
814 struct veth_lpar_connection *cnx = veth_cnx[i];
815
816 if (! (port->pending_lpmask & (1<<i)))
817 continue;
818
819 /* If we're pending on it, we must be connected to it,
820 * so we should certainly have a structure for it. */
821 BUG_ON(! cnx);
822
823 /* Theoretically we could be kicking a connection
824 * which doesn't deserve it, but in practice if we've
825 * had a Tx timeout, the pending_lpmask will have
826 * exactly one bit set - the connection causing the
827 * problem. */
828 spin_lock(&cnx->lock);
829 cnx->state |= VETH_STATE_RESET;
830 veth_kick_statemachine(cnx);
831 spin_unlock(&cnx->lock);
832 }
833
834 spin_unlock_irqrestore(&port->pending_gate, flags);
835}
836
837static struct net_device * __init veth_probe_one(int vlan, struct device *vdev) 1037static struct net_device * __init veth_probe_one(int vlan, struct device *vdev)
838{ 1038{
839 struct net_device *dev; 1039 struct net_device *dev;
@@ -848,8 +1048,9 @@ static struct net_device * __init veth_probe_one(int vlan, struct device *vdev)
848 1048
849 port = (struct veth_port *) dev->priv; 1049 port = (struct veth_port *) dev->priv;
850 1050
851 spin_lock_init(&port->pending_gate); 1051 spin_lock_init(&port->queue_lock);
852 rwlock_init(&port->mcast_gate); 1052 rwlock_init(&port->mcast_gate);
1053 port->stopped_map = 0;
853 1054
854 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { 1055 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) {
855 HvLpVirtualLanIndexMap map; 1056 HvLpVirtualLanIndexMap map;
@@ -882,22 +1083,24 @@ static struct net_device * __init veth_probe_one(int vlan, struct device *vdev)
882 dev->set_multicast_list = veth_set_multicast_list; 1083 dev->set_multicast_list = veth_set_multicast_list;
883 SET_ETHTOOL_OPS(dev, &ops); 1084 SET_ETHTOOL_OPS(dev, &ops);
884 1085
885 dev->watchdog_timeo = 2 * (VETH_ACKTIMEOUT * HZ / 1000000);
886 dev->tx_timeout = veth_tx_timeout;
887
888 SET_NETDEV_DEV(dev, vdev); 1086 SET_NETDEV_DEV(dev, vdev);
889 1087
890 rc = register_netdev(dev); 1088 rc = register_netdev(dev);
891 if (rc != 0) { 1089 if (rc != 0) {
892 veth_printk(KERN_ERR, 1090 veth_error("Failed registering net device for vlan%d.\n", vlan);
893 "Failed to register ethernet device for vlan %d\n",
894 vlan);
895 free_netdev(dev); 1091 free_netdev(dev);
896 return NULL; 1092 return NULL;
897 } 1093 }
898 1094
899 veth_printk(KERN_DEBUG, "%s attached to iSeries vlan %d (lpar_map=0x%04x)\n", 1095 kobject_init(&port->kobject);
900 dev->name, vlan, port->lpar_map); 1096 port->kobject.parent = &dev->class_dev.kobj;
1097 port->kobject.ktype = &veth_port_ktype;
1098 kobject_set_name(&port->kobject, "veth_port");
1099 if (0 != kobject_add(&port->kobject))
1100 veth_error("Failed adding port for %s to sysfs.\n", dev->name);
1101
1102 veth_info("%s attached to iSeries vlan %d (LPAR map = 0x%.4X)\n",
1103 dev->name, vlan, port->lpar_map);
901 1104
902 return dev; 1105 return dev;
903} 1106}
@@ -912,98 +1115,95 @@ static int veth_transmit_to_one(struct sk_buff *skb, HvLpIndex rlp,
912 struct veth_lpar_connection *cnx = veth_cnx[rlp]; 1115 struct veth_lpar_connection *cnx = veth_cnx[rlp];
913 struct veth_port *port = (struct veth_port *) dev->priv; 1116 struct veth_port *port = (struct veth_port *) dev->priv;
914 HvLpEvent_Rc rc; 1117 HvLpEvent_Rc rc;
915 u32 dma_address, dma_length;
916 struct veth_msg *msg = NULL; 1118 struct veth_msg *msg = NULL;
917 int err = 0;
918 unsigned long flags; 1119 unsigned long flags;
919 1120
920 if (! cnx) { 1121 if (! cnx)
921 port->stats.tx_errors++;
922 dev_kfree_skb(skb);
923 return 0; 1122 return 0;
924 }
925 1123
926 spin_lock_irqsave(&cnx->lock, flags); 1124 spin_lock_irqsave(&cnx->lock, flags);
927 1125
928 if (! (cnx->state & VETH_STATE_READY)) 1126 if (! (cnx->state & VETH_STATE_READY))
929 goto drop; 1127 goto no_error;
930 1128
931 if ((skb->len - 14) > VETH_MAX_MTU) 1129 if ((skb->len - ETH_HLEN) > VETH_MAX_MTU)
932 goto drop; 1130 goto drop;
933 1131
934 msg = veth_stack_pop(cnx); 1132 msg = veth_stack_pop(cnx);
935 1133 if (! msg)
936 if (! msg) {
937 err = 1;
938 goto drop; 1134 goto drop;
939 }
940 1135
941 dma_length = skb->len; 1136 msg->in_use = 1;
942 dma_address = dma_map_single(port->dev, skb->data, 1137 msg->skb = skb_get(skb);
943 dma_length, DMA_TO_DEVICE); 1138
1139 msg->data.addr[0] = dma_map_single(port->dev, skb->data,
1140 skb->len, DMA_TO_DEVICE);
944 1141
945 if (dma_mapping_error(dma_address)) 1142 if (dma_mapping_error(msg->data.addr[0]))
946 goto recycle_and_drop; 1143 goto recycle_and_drop;
947 1144
948 /* Is it really necessary to check the length and address
949 * fields of the first entry here? */
950 msg->skb = skb;
951 msg->dev = port->dev; 1145 msg->dev = port->dev;
952 msg->data.addr[0] = dma_address; 1146 msg->data.len[0] = skb->len;
953 msg->data.len[0] = dma_length;
954 msg->data.eofmask = 1 << VETH_EOF_SHIFT; 1147 msg->data.eofmask = 1 << VETH_EOF_SHIFT;
955 set_bit(0, &(msg->in_use)); 1148
956 rc = veth_signaldata(cnx, VethEventTypeFrames, msg->token, &msg->data); 1149 rc = veth_signaldata(cnx, VETH_EVENT_FRAMES, msg->token, &msg->data);
957 1150
958 if (rc != HvLpEvent_Rc_Good) 1151 if (rc != HvLpEvent_Rc_Good)
959 goto recycle_and_drop; 1152 goto recycle_and_drop;
960 1153
1154 /* If the timer's not already running, start it now. */
1155 if (0 == cnx->outstanding_tx)
1156 mod_timer(&cnx->reset_timer, jiffies + cnx->reset_timeout);
1157
1158 cnx->last_contact = jiffies;
1159 cnx->outstanding_tx++;
1160
1161 if (veth_stack_is_empty(cnx))
1162 veth_stop_queues(cnx);
1163
1164 no_error:
961 spin_unlock_irqrestore(&cnx->lock, flags); 1165 spin_unlock_irqrestore(&cnx->lock, flags);
962 return 0; 1166 return 0;
963 1167
964 recycle_and_drop: 1168 recycle_and_drop:
965 msg->skb = NULL;
966 /* need to set in use to make veth_recycle_msg in case this
967 * was a mapping failure */
968 set_bit(0, &msg->in_use);
969 veth_recycle_msg(cnx, msg); 1169 veth_recycle_msg(cnx, msg);
970 drop: 1170 drop:
971 port->stats.tx_errors++;
972 dev_kfree_skb(skb);
973 spin_unlock_irqrestore(&cnx->lock, flags); 1171 spin_unlock_irqrestore(&cnx->lock, flags);
974 return err; 1172 return 1;
975} 1173}
976 1174
977static HvLpIndexMap veth_transmit_to_many(struct sk_buff *skb, 1175static void veth_transmit_to_many(struct sk_buff *skb,
978 HvLpIndexMap lpmask, 1176 HvLpIndexMap lpmask,
979 struct net_device *dev) 1177 struct net_device *dev)
980{ 1178{
981 struct veth_port *port = (struct veth_port *) dev->priv; 1179 struct veth_port *port = (struct veth_port *) dev->priv;
982 int i; 1180 int i, success, error;
983 int rc; 1181
1182 success = error = 0;
984 1183
985 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) { 1184 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) {
986 if ((lpmask & (1 << i)) == 0) 1185 if ((lpmask & (1 << i)) == 0)
987 continue; 1186 continue;
988 1187
989 rc = veth_transmit_to_one(skb_get(skb), i, dev); 1188 if (veth_transmit_to_one(skb, i, dev))
990 if (! rc) 1189 error = 1;
991 lpmask &= ~(1<<i); 1190 else
1191 success = 1;
992 } 1192 }
993 1193
994 if (! lpmask) { 1194 if (error)
1195 port->stats.tx_errors++;
1196
1197 if (success) {
995 port->stats.tx_packets++; 1198 port->stats.tx_packets++;
996 port->stats.tx_bytes += skb->len; 1199 port->stats.tx_bytes += skb->len;
997 } 1200 }
998
999 return lpmask;
1000} 1201}
1001 1202
1002static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev) 1203static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev)
1003{ 1204{
1004 unsigned char *frame = skb->data; 1205 unsigned char *frame = skb->data;
1005 struct veth_port *port = (struct veth_port *) dev->priv; 1206 struct veth_port *port = (struct veth_port *) dev->priv;
1006 unsigned long flags;
1007 HvLpIndexMap lpmask; 1207 HvLpIndexMap lpmask;
1008 1208
1009 if (! (frame[0] & 0x01)) { 1209 if (! (frame[0] & 0x01)) {
@@ -1020,44 +1220,27 @@ static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev)
1020 lpmask = port->lpar_map; 1220 lpmask = port->lpar_map;
1021 } 1221 }
1022 1222
1023 spin_lock_irqsave(&port->pending_gate, flags); 1223 veth_transmit_to_many(skb, lpmask, dev);
1024
1025 lpmask = veth_transmit_to_many(skb, lpmask, dev);
1026
1027 dev->trans_start = jiffies;
1028 1224
1029 if (! lpmask) { 1225 dev_kfree_skb(skb);
1030 dev_kfree_skb(skb);
1031 } else {
1032 if (port->pending_skb) {
1033 veth_error("%s: Tx while skb was pending!\n",
1034 dev->name);
1035 dev_kfree_skb(skb);
1036 spin_unlock_irqrestore(&port->pending_gate, flags);
1037 return 1;
1038 }
1039
1040 port->pending_skb = skb;
1041 port->pending_lpmask = lpmask;
1042 netif_stop_queue(dev);
1043 }
1044
1045 spin_unlock_irqrestore(&port->pending_gate, flags);
1046 1226
1047 return 0; 1227 return 0;
1048} 1228}
1049 1229
1230/* You must hold the connection's lock when you call this function. */
1050static void veth_recycle_msg(struct veth_lpar_connection *cnx, 1231static void veth_recycle_msg(struct veth_lpar_connection *cnx,
1051 struct veth_msg *msg) 1232 struct veth_msg *msg)
1052{ 1233{
1053 u32 dma_address, dma_length; 1234 u32 dma_address, dma_length;
1054 1235
1055 if (test_and_clear_bit(0, &msg->in_use)) { 1236 if (msg->in_use) {
1237 msg->in_use = 0;
1056 dma_address = msg->data.addr[0]; 1238 dma_address = msg->data.addr[0];
1057 dma_length = msg->data.len[0]; 1239 dma_length = msg->data.len[0];
1058 1240
1059 dma_unmap_single(msg->dev, dma_address, dma_length, 1241 if (!dma_mapping_error(dma_address))
1060 DMA_TO_DEVICE); 1242 dma_unmap_single(msg->dev, dma_address, dma_length,
1243 DMA_TO_DEVICE);
1061 1244
1062 if (msg->skb) { 1245 if (msg->skb) {
1063 dev_kfree_skb_any(msg->skb); 1246 dev_kfree_skb_any(msg->skb);
@@ -1066,15 +1249,16 @@ static void veth_recycle_msg(struct veth_lpar_connection *cnx,
1066 1249
1067 memset(&msg->data, 0, sizeof(msg->data)); 1250 memset(&msg->data, 0, sizeof(msg->data));
1068 veth_stack_push(cnx, msg); 1251 veth_stack_push(cnx, msg);
1069 } else 1252 } else if (cnx->state & VETH_STATE_OPEN) {
1070 if (cnx->state & VETH_STATE_OPEN) 1253 veth_error("Non-pending frame (# %d) acked by LPAR %d.\n",
1071 veth_error("Bogus frames ack from lpar %d (#%d)\n", 1254 cnx->remote_lp, msg->token);
1072 cnx->remote_lp, msg->token); 1255 }
1073} 1256}
1074 1257
1075static void veth_flush_pending(struct veth_lpar_connection *cnx) 1258static void veth_wake_queues(struct veth_lpar_connection *cnx)
1076{ 1259{
1077 int i; 1260 int i;
1261
1078 for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) { 1262 for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) {
1079 struct net_device *dev = veth_dev[i]; 1263 struct net_device *dev = veth_dev[i];
1080 struct veth_port *port; 1264 struct veth_port *port;
@@ -1088,20 +1272,77 @@ static void veth_flush_pending(struct veth_lpar_connection *cnx)
1088 if (! (port->lpar_map & (1<<cnx->remote_lp))) 1272 if (! (port->lpar_map & (1<<cnx->remote_lp)))
1089 continue; 1273 continue;
1090 1274
1091 spin_lock_irqsave(&port->pending_gate, flags); 1275 spin_lock_irqsave(&port->queue_lock, flags);
1092 if (port->pending_skb) { 1276
1093 port->pending_lpmask = 1277 port->stopped_map &= ~(1 << cnx->remote_lp);
1094 veth_transmit_to_many(port->pending_skb, 1278
1095 port->pending_lpmask, 1279 if (0 == port->stopped_map && netif_queue_stopped(dev)) {
1096 dev); 1280 veth_debug("cnx %d: woke queue for %s.\n",
1097 if (! port->pending_lpmask) { 1281 cnx->remote_lp, dev->name);
1098 dev_kfree_skb_any(port->pending_skb); 1282 netif_wake_queue(dev);
1099 port->pending_skb = NULL; 1283 }
1100 netif_wake_queue(dev); 1284 spin_unlock_irqrestore(&port->queue_lock, flags);
1101 } 1285 }
1286}
1287
1288static void veth_stop_queues(struct veth_lpar_connection *cnx)
1289{
1290 int i;
1291
1292 for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) {
1293 struct net_device *dev = veth_dev[i];
1294 struct veth_port *port;
1295
1296 if (! dev)
1297 continue;
1298
1299 port = (struct veth_port *)dev->priv;
1300
1301 /* If this cnx is not on the vlan for this port, continue */
1302 if (! (port->lpar_map & (1 << cnx->remote_lp)))
1303 continue;
1304
1305 spin_lock(&port->queue_lock);
1306
1307 netif_stop_queue(dev);
1308 port->stopped_map |= (1 << cnx->remote_lp);
1309
1310 veth_debug("cnx %d: stopped queue for %s, map = 0x%x.\n",
1311 cnx->remote_lp, dev->name, port->stopped_map);
1312
1313 spin_unlock(&port->queue_lock);
1314 }
1315}
1316
1317static void veth_timed_reset(unsigned long ptr)
1318{
1319 struct veth_lpar_connection *cnx = (struct veth_lpar_connection *)ptr;
1320 unsigned long trigger_time, flags;
1321
1322 /* FIXME is it possible this fires after veth_stop_connection()?
1323 * That would reschedule the statemachine for 5 seconds and probably
1324 * execute it after the module's been unloaded. Hmm. */
1325
1326 spin_lock_irqsave(&cnx->lock, flags);
1327
1328 if (cnx->outstanding_tx > 0) {
1329 trigger_time = cnx->last_contact + cnx->reset_timeout;
1330
1331 if (trigger_time < jiffies) {
1332 cnx->state |= VETH_STATE_RESET;
1333 veth_kick_statemachine(cnx);
1334 veth_error("%d packets not acked by LPAR %d within %d "
1335 "seconds, resetting.\n",
1336 cnx->outstanding_tx, cnx->remote_lp,
1337 cnx->reset_timeout / HZ);
1338 } else {
1339 /* Reschedule the timer */
1340 trigger_time = jiffies + cnx->reset_timeout;
1341 mod_timer(&cnx->reset_timer, trigger_time);
1102 } 1342 }
1103 spin_unlock_irqrestore(&port->pending_gate, flags);
1104 } 1343 }
1344
1345 spin_unlock_irqrestore(&cnx->lock, flags);
1105} 1346}
1106 1347
1107/* 1348/*
@@ -1117,12 +1358,9 @@ static inline int veth_frame_wanted(struct veth_port *port, u64 mac_addr)
1117 if ( (mac_addr == port->mac_addr) || (mac_addr == 0xffffffffffff0000) ) 1358 if ( (mac_addr == port->mac_addr) || (mac_addr == 0xffffffffffff0000) )
1118 return 1; 1359 return 1;
1119 1360
1120 if (! (((char *) &mac_addr)[0] & 0x01))
1121 return 0;
1122
1123 read_lock_irqsave(&port->mcast_gate, flags); 1361 read_lock_irqsave(&port->mcast_gate, flags);
1124 1362
1125 if (port->promiscuous || port->all_mcast) { 1363 if (port->promiscuous) {
1126 wanted = 1; 1364 wanted = 1;
1127 goto out; 1365 goto out;
1128 } 1366 }
@@ -1175,21 +1413,21 @@ static void veth_flush_acks(struct veth_lpar_connection *cnx)
1175{ 1413{
1176 HvLpEvent_Rc rc; 1414 HvLpEvent_Rc rc;
1177 1415
1178 rc = veth_signaldata(cnx, VethEventTypeFramesAck, 1416 rc = veth_signaldata(cnx, VETH_EVENT_FRAMES_ACK,
1179 0, &cnx->pending_acks); 1417 0, &cnx->pending_acks);
1180 1418
1181 if (rc != HvLpEvent_Rc_Good) 1419 if (rc != HvLpEvent_Rc_Good)
1182 veth_error("Error 0x%x acking frames from lpar %d!\n", 1420 veth_error("Failed acking frames from LPAR %d, rc = %d\n",
1183 (unsigned)rc, cnx->remote_lp); 1421 cnx->remote_lp, (int)rc);
1184 1422
1185 cnx->num_pending_acks = 0; 1423 cnx->num_pending_acks = 0;
1186 memset(&cnx->pending_acks, 0xff, sizeof(cnx->pending_acks)); 1424 memset(&cnx->pending_acks, 0xff, sizeof(cnx->pending_acks));
1187} 1425}
1188 1426
1189static void veth_receive(struct veth_lpar_connection *cnx, 1427static void veth_receive(struct veth_lpar_connection *cnx,
1190 struct VethLpEvent *event) 1428 struct veth_lpevent *event)
1191{ 1429{
1192 struct VethFramesData *senddata = &event->u.frames_data; 1430 struct veth_frames_data *senddata = &event->u.frames_data;
1193 int startchunk = 0; 1431 int startchunk = 0;
1194 int nchunks; 1432 int nchunks;
1195 unsigned long flags; 1433 unsigned long flags;
@@ -1216,9 +1454,10 @@ static void veth_receive(struct veth_lpar_connection *cnx,
1216 /* make sure that we have at least 1 EOF entry in the 1454 /* make sure that we have at least 1 EOF entry in the
1217 * remaining entries */ 1455 * remaining entries */
1218 if (! (senddata->eofmask >> (startchunk + VETH_EOF_SHIFT))) { 1456 if (! (senddata->eofmask >> (startchunk + VETH_EOF_SHIFT))) {
1219 veth_error("missing EOF frag in event " 1457 veth_error("Missing EOF fragment in event "
1220 "eofmask=0x%x startchunk=%d\n", 1458 "eofmask = 0x%x startchunk = %d\n",
1221 (unsigned) senddata->eofmask, startchunk); 1459 (unsigned)senddata->eofmask,
1460 startchunk);
1222 break; 1461 break;
1223 } 1462 }
1224 1463
@@ -1237,8 +1476,9 @@ static void veth_receive(struct veth_lpar_connection *cnx,
1237 /* nchunks == # of chunks in this frame */ 1476 /* nchunks == # of chunks in this frame */
1238 1477
1239 if ((length - ETH_HLEN) > VETH_MAX_MTU) { 1478 if ((length - ETH_HLEN) > VETH_MAX_MTU) {
1240 veth_error("Received oversize frame from lpar %d " 1479 veth_error("Received oversize frame from LPAR %d "
1241 "(length=%d)\n", cnx->remote_lp, length); 1480 "(length = %d)\n",
1481 cnx->remote_lp, length);
1242 continue; 1482 continue;
1243 } 1483 }
1244 1484
@@ -1331,15 +1571,33 @@ static void veth_timed_ack(unsigned long ptr)
1331 1571
1332static int veth_remove(struct vio_dev *vdev) 1572static int veth_remove(struct vio_dev *vdev)
1333{ 1573{
1334 int i = vdev->unit_address; 1574 struct veth_lpar_connection *cnx;
1335 struct net_device *dev; 1575 struct net_device *dev;
1576 struct veth_port *port;
1577 int i;
1336 1578
1337 dev = veth_dev[i]; 1579 dev = veth_dev[vdev->unit_address];
1338 if (dev != NULL) { 1580
1339 veth_dev[i] = NULL; 1581 if (! dev)
1340 unregister_netdev(dev); 1582 return 0;
1341 free_netdev(dev); 1583
1584 port = netdev_priv(dev);
1585
1586 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) {
1587 cnx = veth_cnx[i];
1588
1589 if (cnx && (port->lpar_map & (1 << i))) {
1590 /* Drop our reference to connections on our VLAN */
1591 kobject_put(&cnx->kobject);
1592 }
1342 } 1593 }
1594
1595 veth_dev[vdev->unit_address] = NULL;
1596 kobject_del(&port->kobject);
1597 kobject_put(&port->kobject);
1598 unregister_netdev(dev);
1599 free_netdev(dev);
1600
1343 return 0; 1601 return 0;
1344} 1602}
1345 1603
@@ -1347,6 +1605,7 @@ static int veth_probe(struct vio_dev *vdev, const struct vio_device_id *id)
1347{ 1605{
1348 int i = vdev->unit_address; 1606 int i = vdev->unit_address;
1349 struct net_device *dev; 1607 struct net_device *dev;
1608 struct veth_port *port;
1350 1609
1351 dev = veth_probe_one(i, &vdev->dev); 1610 dev = veth_probe_one(i, &vdev->dev);
1352 if (dev == NULL) { 1611 if (dev == NULL) {
@@ -1355,11 +1614,23 @@ static int veth_probe(struct vio_dev *vdev, const struct vio_device_id *id)
1355 } 1614 }
1356 veth_dev[i] = dev; 1615 veth_dev[i] = dev;
1357 1616
1358 /* Start the state machine on each connection, to commence 1617 port = (struct veth_port*)netdev_priv(dev);
1359 * link negotiation */ 1618
1360 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) 1619 /* Start the state machine on each connection on this vlan. If we're
1361 if (veth_cnx[i]) 1620 * the first dev to do so this will commence link negotiation */
1362 veth_kick_statemachine(veth_cnx[i]); 1621 for (i = 0; i < HVMAXARCHITECTEDLPS; i++) {
1622 struct veth_lpar_connection *cnx;
1623
1624 if (! (port->lpar_map & (1 << i)))
1625 continue;
1626
1627 cnx = veth_cnx[i];
1628 if (!cnx)
1629 continue;
1630
1631 kobject_get(&cnx->kobject);
1632 veth_kick_statemachine(cnx);
1633 }
1363 1634
1364 return 0; 1635 return 0;
1365} 1636}
@@ -1375,7 +1646,7 @@ static struct vio_device_id veth_device_table[] __devinitdata = {
1375MODULE_DEVICE_TABLE(vio, veth_device_table); 1646MODULE_DEVICE_TABLE(vio, veth_device_table);
1376 1647
1377static struct vio_driver veth_driver = { 1648static struct vio_driver veth_driver = {
1378 .name = "iseries_veth", 1649 .name = DRV_NAME,
1379 .id_table = veth_device_table, 1650 .id_table = veth_device_table,
1380 .probe = veth_probe, 1651 .probe = veth_probe,
1381 .remove = veth_remove 1652 .remove = veth_remove
@@ -1388,29 +1659,29 @@ static struct vio_driver veth_driver = {
1388void __exit veth_module_cleanup(void) 1659void __exit veth_module_cleanup(void)
1389{ 1660{
1390 int i; 1661 int i;
1662 struct veth_lpar_connection *cnx;
1391 1663
1392 /* Stop the queues first to stop any new packets being sent. */ 1664 /* Disconnect our "irq" to stop events coming from the Hypervisor. */
1393 for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++)
1394 if (veth_dev[i])
1395 netif_stop_queue(veth_dev[i]);
1396
1397 /* Stop the connections before we unregister the driver. This
1398 * ensures there's no skbs lying around holding the device open. */
1399 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i)
1400 veth_stop_connection(i);
1401
1402 HvLpEvent_unregisterHandler(HvLpEvent_Type_VirtualLan); 1665 HvLpEvent_unregisterHandler(HvLpEvent_Type_VirtualLan);
1403 1666
1404 /* Hypervisor callbacks may have scheduled more work while we 1667 /* Make sure any work queued from Hypervisor callbacks is finished. */
1405 * were stoping connections. Now that we've disconnected from
1406 * the hypervisor make sure everything's finished. */
1407 flush_scheduled_work(); 1668 flush_scheduled_work();
1408 1669
1409 vio_unregister_driver(&veth_driver); 1670 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) {
1671 cnx = veth_cnx[i];
1672
1673 if (!cnx)
1674 continue;
1410 1675
1411 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) 1676 /* Remove the connection from sysfs */
1412 veth_destroy_connection(i); 1677 kobject_del(&cnx->kobject);
1678 /* Drop the driver's reference to the connection */
1679 kobject_put(&cnx->kobject);
1680 }
1413 1681
1682 /* Unregister the driver, which will close all the netdevs and stop
1683 * the connections when they're no longer referenced. */
1684 vio_unregister_driver(&veth_driver);
1414} 1685}
1415module_exit(veth_module_cleanup); 1686module_exit(veth_module_cleanup);
1416 1687
@@ -1423,15 +1694,37 @@ int __init veth_module_init(void)
1423 1694
1424 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) { 1695 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) {
1425 rc = veth_init_connection(i); 1696 rc = veth_init_connection(i);
1426 if (rc != 0) { 1697 if (rc != 0)
1427 veth_module_cleanup(); 1698 goto error;
1428 return rc;
1429 }
1430 } 1699 }
1431 1700
1432 HvLpEvent_registerHandler(HvLpEvent_Type_VirtualLan, 1701 HvLpEvent_registerHandler(HvLpEvent_Type_VirtualLan,
1433 &veth_handle_event); 1702 &veth_handle_event);
1434 1703
1435 return vio_register_driver(&veth_driver); 1704 rc = vio_register_driver(&veth_driver);
1705 if (rc != 0)
1706 goto error;
1707
1708 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) {
1709 struct kobject *kobj;
1710
1711 if (!veth_cnx[i])
1712 continue;
1713
1714 kobj = &veth_cnx[i]->kobject;
1715 kobj->parent = &veth_driver.driver.kobj;
1716 /* If the add failes, complain but otherwise continue */
1717 if (0 != kobject_add(kobj))
1718 veth_error("cnx %d: Failed adding to sysfs.\n", i);
1719 }
1720
1721 return 0;
1722
1723error:
1724 for (i = 0; i < HVMAXARCHITECTEDLPS; ++i) {
1725 veth_destroy_connection(veth_cnx[i]);
1726 }
1727
1728 return rc;
1436} 1729}
1437module_init(veth_module_init); 1730module_init(veth_module_init);
diff --git a/drivers/net/iseries_veth.h b/drivers/net/iseries_veth.h
deleted file mode 100644
index d9370f79b83e..000000000000
--- a/drivers/net/iseries_veth.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/* File veth.h created by Kyle A. Lucke on Mon Aug 7 2000. */
2
3#ifndef _ISERIES_VETH_H
4#define _ISERIES_VETH_H
5
6#define VethEventTypeCap (0)
7#define VethEventTypeFrames (1)
8#define VethEventTypeMonitor (2)
9#define VethEventTypeFramesAck (3)
10
11#define VETH_MAX_ACKS_PER_MSG (20)
12#define VETH_MAX_FRAMES_PER_MSG (6)
13
14struct VethFramesData {
15 u32 addr[VETH_MAX_FRAMES_PER_MSG];
16 u16 len[VETH_MAX_FRAMES_PER_MSG];
17 u32 eofmask;
18};
19#define VETH_EOF_SHIFT (32-VETH_MAX_FRAMES_PER_MSG)
20
21struct VethFramesAckData {
22 u16 token[VETH_MAX_ACKS_PER_MSG];
23};
24
25struct VethCapData {
26 u8 caps_version;
27 u8 rsvd1;
28 u16 num_buffers;
29 u16 ack_threshold;
30 u16 rsvd2;
31 u32 ack_timeout;
32 u32 rsvd3;
33 u64 rsvd4[3];
34};
35
36struct VethLpEvent {
37 struct HvLpEvent base_event;
38 union {
39 struct VethCapData caps_data;
40 struct VethFramesData frames_data;
41 struct VethFramesAckData frames_ack_data;
42 } u;
43
44};
45
46#endif /* _ISERIES_VETH_H */
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index 41f62c0c5fcb..5e81494e9a9a 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -128,7 +128,7 @@ static int mdio_bus_match(struct device *dev, struct device_driver *drv)
128/* Suspend and resume. Copied from platform_suspend and 128/* Suspend and resume. Copied from platform_suspend and
129 * platform_resume 129 * platform_resume
130 */ 130 */
131static int mdio_bus_suspend(struct device * dev, u32 state) 131static int mdio_bus_suspend(struct device * dev, pm_message_t state)
132{ 132{
133 int ret = 0; 133 int ret = 0;
134 struct device_driver *drv = dev->driver; 134 struct device_driver *drv = dev->driver;
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 2608e7a3d214..3f67a42e8503 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -948,6 +948,7 @@ static irqreturn_t gem_interrupt(int irq, void *dev_id, struct pt_regs *regs)
948 u32 gem_status = readl(gp->regs + GREG_STAT); 948 u32 gem_status = readl(gp->regs + GREG_STAT);
949 949
950 if (gem_status == 0) { 950 if (gem_status == 0) {
951 netif_poll_enable(dev);
951 spin_unlock_irqrestore(&gp->lock, flags); 952 spin_unlock_irqrestore(&gp->lock, flags);
952 return IRQ_NONE; 953 return IRQ_NONE;
953 } 954 }
diff --git a/drivers/net/sungem.h b/drivers/net/sungem.h
index 7143fd7cf3f8..ff8ae5f79970 100644
--- a/drivers/net/sungem.h
+++ b/drivers/net/sungem.h
@@ -1020,7 +1020,7 @@ struct gem {
1020 1020
1021 struct gem_init_block *init_block; 1021 struct gem_init_block *init_block;
1022 struct sk_buff *rx_skbs[RX_RING_SIZE]; 1022 struct sk_buff *rx_skbs[RX_RING_SIZE];
1023 struct sk_buff *tx_skbs[RX_RING_SIZE]; 1023 struct sk_buff *tx_skbs[TX_RING_SIZE];
1024 dma_addr_t gblock_dvma; 1024 dma_addr_t gblock_dvma;
1025 1025
1026 struct pci_dev *pdev; 1026 struct pci_dev *pdev;
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index af8263a1580e..3faf62310f84 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -66,8 +66,8 @@
66 66
67#define DRV_MODULE_NAME "tg3" 67#define DRV_MODULE_NAME "tg3"
68#define PFX DRV_MODULE_NAME ": " 68#define PFX DRV_MODULE_NAME ": "
69#define DRV_MODULE_VERSION "3.37" 69#define DRV_MODULE_VERSION "3.38"
70#define DRV_MODULE_RELDATE "August 25, 2005" 70#define DRV_MODULE_RELDATE "September 1, 2005"
71 71
72#define TG3_DEF_MAC_MODE 0 72#define TG3_DEF_MAC_MODE 0
73#define TG3_DEF_RX_MODE 0 73#define TG3_DEF_RX_MODE 0
@@ -121,12 +121,9 @@
121 TG3_RX_RCB_RING_SIZE(tp)) 121 TG3_RX_RCB_RING_SIZE(tp))
122#define TG3_TX_RING_BYTES (sizeof(struct tg3_tx_buffer_desc) * \ 122#define TG3_TX_RING_BYTES (sizeof(struct tg3_tx_buffer_desc) * \
123 TG3_TX_RING_SIZE) 123 TG3_TX_RING_SIZE)
124#define TX_RING_GAP(TP) \
125 (TG3_TX_RING_SIZE - (TP)->tx_pending)
126#define TX_BUFFS_AVAIL(TP) \ 124#define TX_BUFFS_AVAIL(TP) \
127 (((TP)->tx_cons <= (TP)->tx_prod) ? \ 125 ((TP)->tx_pending - \
128 (TP)->tx_cons + (TP)->tx_pending - (TP)->tx_prod : \ 126 (((TP)->tx_prod - (TP)->tx_cons) & (TG3_TX_RING_SIZE - 1)))
129 (TP)->tx_cons - (TP)->tx_prod - TX_RING_GAP(TP))
130#define NEXT_TX(N) (((N) + 1) & (TG3_TX_RING_SIZE - 1)) 127#define NEXT_TX(N) (((N) + 1) & (TG3_TX_RING_SIZE - 1))
131 128
132#define RX_PKT_BUF_SZ (1536 + tp->rx_offset + 64) 129#define RX_PKT_BUF_SZ (1536 + tp->rx_offset + 64)
@@ -2880,9 +2877,13 @@ static void tg3_tx(struct tg3 *tp)
2880 2877
2881 tp->tx_cons = sw_idx; 2878 tp->tx_cons = sw_idx;
2882 2879
2883 if (netif_queue_stopped(tp->dev) && 2880 if (unlikely(netif_queue_stopped(tp->dev))) {
2884 (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH)) 2881 spin_lock(&tp->tx_lock);
2885 netif_wake_queue(tp->dev); 2882 if (netif_queue_stopped(tp->dev) &&
2883 (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH))
2884 netif_wake_queue(tp->dev);
2885 spin_unlock(&tp->tx_lock);
2886 }
2886} 2887}
2887 2888
2888/* Returns size of skb allocated or < 0 on error. 2889/* Returns size of skb allocated or < 0 on error.
@@ -3198,9 +3199,7 @@ static int tg3_poll(struct net_device *netdev, int *budget)
3198 3199
3199 /* run TX completion thread */ 3200 /* run TX completion thread */
3200 if (sblk->idx[0].tx_consumer != tp->tx_cons) { 3201 if (sblk->idx[0].tx_consumer != tp->tx_cons) {
3201 spin_lock(&tp->tx_lock);
3202 tg3_tx(tp); 3202 tg3_tx(tp);
3203 spin_unlock(&tp->tx_lock);
3204 } 3203 }
3205 3204
3206 /* run RX thread, within the bounds set by NAPI. 3205 /* run RX thread, within the bounds set by NAPI.
@@ -3716,8 +3715,11 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
3716 tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry); 3715 tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry);
3717 3716
3718 tp->tx_prod = entry; 3717 tp->tx_prod = entry;
3719 if (TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1)) 3718 if (TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1)) {
3720 netif_stop_queue(dev); 3719 netif_stop_queue(dev);
3720 if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH)
3721 netif_wake_queue(tp->dev);
3722 }
3721 3723
3722out_unlock: 3724out_unlock:
3723 mmiowb(); 3725 mmiowb();
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c
index fc353e348f9a..a22d00198e4d 100644
--- a/drivers/net/tulip/de2104x.c
+++ b/drivers/net/tulip/de2104x.c
@@ -1934,7 +1934,7 @@ static int __init de_init_one (struct pci_dev *pdev,
1934 struct de_private *de; 1934 struct de_private *de;
1935 int rc; 1935 int rc;
1936 void __iomem *regs; 1936 void __iomem *regs;
1937 long pciaddr; 1937 unsigned long pciaddr;
1938 static int board_idx = -1; 1938 static int board_idx = -1;
1939 1939
1940 board_idx++; 1940 board_idx++;
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index 05da5bea564c..6266a9a7e6e3 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -238,6 +238,7 @@ static struct pci_device_id tulip_pci_tbl[] = {
238 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, 238 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
239 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */ 239 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
240 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */ 240 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
241 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
241 { } /* terminate list */ 242 { } /* terminate list */
242}; 243};
243MODULE_DEVICE_TABLE(pci, tulip_pci_tbl); 244MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index effab0b9adca..50b8c6754b1e 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -18,6 +18,9 @@
18/* 18/*
19 * Changes: 19 * Changes:
20 * 20 *
21 * Mike Kershaw <dragorn@kismetwireless.net> 2005/08/14
22 * Add TUNSETLINK ioctl to set the link encapsulation
23 *
21 * Mark Smith <markzzzsmith@yahoo.com.au> 24 * Mark Smith <markzzzsmith@yahoo.com.au>
22 * Use random_ether_addr() for tap MAC address. 25 * Use random_ether_addr() for tap MAC address.
23 * 26 *
@@ -612,6 +615,18 @@ static int tun_chr_ioctl(struct inode *inode, struct file *file,
612 DBG(KERN_INFO "%s: owner set to %d\n", tun->dev->name, tun->owner); 615 DBG(KERN_INFO "%s: owner set to %d\n", tun->dev->name, tun->owner);
613 break; 616 break;
614 617
618 case TUNSETLINK:
619 /* Only allow setting the type when the interface is down */
620 if (tun->dev->flags & IFF_UP) {
621 DBG(KERN_INFO "%s: Linktype set failed because interface is up\n",
622 tun->dev->name);
623 return -EBUSY;
624 } else {
625 tun->dev->type = (int) arg;
626 DBG(KERN_INFO "%s: linktype set to %d\n", tun->dev->name, tun->dev->type);
627 }
628 break;
629
615#ifdef TUN_DEBUG 630#ifdef TUN_DEBUG
616 case TUNSETDEBUG: 631 case TUNSETDEBUG:
617 tun->debug = arg; 632 tun->debug = arg;
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index ec3f75a030d2..dd7dbf7b14d4 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -137,6 +137,110 @@ config PCMCIA_RAYCS
137comment "Wireless 802.11b ISA/PCI cards support" 137comment "Wireless 802.11b ISA/PCI cards support"
138 depends on NET_RADIO && (ISA || PCI || PPC_PMAC || PCMCIA) 138 depends on NET_RADIO && (ISA || PCI || PPC_PMAC || PCMCIA)
139 139
140config IPW2100
141 tristate "Intel PRO/Wireless 2100 Network Connection"
142 depends on NET_RADIO && PCI && IEEE80211
143 select FW_LOADER
144 ---help---
145 A driver for the Intel PRO/Wireless 2100 Network
146 Connection 802.11b wireless network adapter.
147
148 See <file:Documentation/networking/README.ipw2100> for information on
149 the capabilities currently enabled in this driver and for tips
150 for debugging issues and problems.
151
152 In order to use this driver, you will need a firmware image for it.
153 You can obtain the firmware from
154 <http://ipw2100.sf.net/>. Once you have the firmware image, you
155 will need to place it in /etc/firmware.
156
157 You will also very likely need the Wireless Tools in order to
158 configure your card:
159
160 <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
161
162 If you want to compile the driver as a module ( = code which can be
163 inserted in and remvoed from the running kernel whenever you want),
164 say M here and read <file:Documentation/modules.txt>. The module
165 will be called ipw2100.ko.
166
167config IPW2100_MONITOR
168 bool "Enable promiscuous mode"
169 depends on IPW2100
170 ---help---
171 Enables promiscuous/monitor mode support for the ipw2100 driver.
172 With this feature compiled into the driver, you can switch to
173 promiscuous mode via the Wireless Tool's Monitor mode. While in this
174 mode, no packets can be sent.
175
176config IPW_DEBUG
177 bool "Enable full debugging output in IPW2100 module."
178 depends on IPW2100
179 ---help---
180 This option will enable debug tracing output for the IPW2100.
181
182 This will result in the kernel module being ~60k larger. You can
183 control which debug output is sent to the kernel log by setting the
184 value in
185
186 /sys/bus/pci/drivers/ipw2100/debug_level
187
188 This entry will only exist if this option is enabled.
189
190 If you are not trying to debug or develop the IPW2100 driver, you
191 most likely want to say N here.
192
193config IPW2200
194 tristate "Intel PRO/Wireless 2200BG and 2915ABG Network Connection"
195 depends on IEEE80211 && PCI
196 select FW_LOADER
197 ---help---
198 A driver for the Intel PRO/Wireless 2200BG and 2915ABG Network
199 Connection adapters.
200
201 See <file:Documentation/networking/README.ipw2200> for
202 information on the capabilities currently enabled in this
203 driver and for tips for debugging issues and problems.
204
205 In order to use this driver, you will need a firmware image for it.
206 You can obtain the firmware from
207 <http://ipw2200.sf.net/>. See the above referenced README.ipw2200
208 for information on where to install the firmare images.
209
210 You will also very likely need the Wireless Tools in order to
211 configure your card:
212
213 <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
214
215 If you want to compile the driver as a module ( = code which can be
216 inserted in and remvoed from the running kernel whenever you want),
217 say M here and read <file:Documentation/modules.txt>. The module
218 will be called ipw2200.ko.
219
220config IPW_DEBUG
221 bool "Enable full debugging output in IPW2200 module."
222 depends on IPW2200
223 ---help---
224 This option will enable debug tracing output for the IPW2200.
225
226 This will result in the kernel module being ~100k larger. You can
227 control which debug output is sent to the kernel log by setting the
228 value in
229
230 /sys/bus/pci/drivers/ipw2200/debug_level
231
232 This entry will only exist if this option is enabled.
233
234 To set a value, simply echo an 8-byte hex value to the same file:
235
236 % echo 0x00000FFO > /sys/bus/pci/drivers/ipw2200/debug_level
237
238 You can find the list of debug mask values in
239 drivers/net/wireless/ipw2200.h
240
241 If you are not trying to debug or develop the IPW2200 driver, you
242 most likely want to say N here.
243
140config AIRO 244config AIRO
141 tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards" 245 tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards"
142 depends on NET_RADIO && ISA && (PCI || BROKEN) 246 depends on NET_RADIO && ISA && (PCI || BROKEN)
@@ -355,6 +459,8 @@ config PRISM54
355 say M here and read <file:Documentation/modules.txt>. The module 459 say M here and read <file:Documentation/modules.txt>. The module
356 will be called prism54.ko. 460 will be called prism54.ko.
357 461
462source "drivers/net/wireless/hostap/Kconfig"
463
358# yes, this works even when no drivers are selected 464# yes, this works even when no drivers are selected
359config NET_WIRELESS 465config NET_WIRELESS
360 bool 466 bool
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 2b87841322cc..0953cc0cdee6 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -2,6 +2,10 @@
2# Makefile for the Linux Wireless network device drivers. 2# Makefile for the Linux Wireless network device drivers.
3# 3#
4 4
5obj-$(CONFIG_IPW2100) += ipw2100.o
6
7obj-$(CONFIG_IPW2200) += ipw2200.o
8
5obj-$(CONFIG_STRIP) += strip.o 9obj-$(CONFIG_STRIP) += strip.o
6obj-$(CONFIG_ARLAN) += arlan.o 10obj-$(CONFIG_ARLAN) += arlan.o
7 11
@@ -28,6 +32,8 @@ obj-$(CONFIG_PCMCIA_ATMEL) += atmel_cs.o
28 32
29obj-$(CONFIG_PRISM54) += prism54/ 33obj-$(CONFIG_PRISM54) += prism54/
30 34
35obj-$(CONFIG_HOSTAP) += hostap/
36
31# 16-bit wireless PCMCIA client drivers 37# 16-bit wireless PCMCIA client drivers
32obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o 38obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o
33obj-$(CONFIG_PCMCIA_WL3501) += wl3501_cs.o 39obj-$(CONFIG_PCMCIA_WL3501) += wl3501_cs.o
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index df20adcd0730..dbcb5a8a2194 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -1040,7 +1040,7 @@ typedef struct {
1040 u16 status; 1040 u16 status;
1041} WifiCtlHdr; 1041} WifiCtlHdr;
1042 1042
1043WifiCtlHdr wifictlhdr8023 = { 1043static WifiCtlHdr wifictlhdr8023 = {
1044 .ctlhdr = { 1044 .ctlhdr = {
1045 .ctl = HOST_DONT_RLSE, 1045 .ctl = HOST_DONT_RLSE,
1046 } 1046 }
@@ -1111,13 +1111,13 @@ static int airo_thread(void *data);
1111static void timer_func( struct net_device *dev ); 1111static void timer_func( struct net_device *dev );
1112static int airo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 1112static int airo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1113#ifdef WIRELESS_EXT 1113#ifdef WIRELESS_EXT
1114struct iw_statistics *airo_get_wireless_stats (struct net_device *dev); 1114static struct iw_statistics *airo_get_wireless_stats (struct net_device *dev);
1115static void airo_read_wireless_stats (struct airo_info *local); 1115static void airo_read_wireless_stats (struct airo_info *local);
1116#endif /* WIRELESS_EXT */ 1116#endif /* WIRELESS_EXT */
1117#ifdef CISCO_EXT 1117#ifdef CISCO_EXT
1118static int readrids(struct net_device *dev, aironet_ioctl *comp); 1118static int readrids(struct net_device *dev, aironet_ioctl *comp);
1119static int writerids(struct net_device *dev, aironet_ioctl *comp); 1119static int writerids(struct net_device *dev, aironet_ioctl *comp);
1120int flashcard(struct net_device *dev, aironet_ioctl *comp); 1120static int flashcard(struct net_device *dev, aironet_ioctl *comp);
1121#endif /* CISCO_EXT */ 1121#endif /* CISCO_EXT */
1122#ifdef MICSUPPORT 1122#ifdef MICSUPPORT
1123static void micinit(struct airo_info *ai); 1123static void micinit(struct airo_info *ai);
@@ -1226,6 +1226,12 @@ static int setup_proc_entry( struct net_device *dev,
1226static int takedown_proc_entry( struct net_device *dev, 1226static int takedown_proc_entry( struct net_device *dev,
1227 struct airo_info *apriv ); 1227 struct airo_info *apriv );
1228 1228
1229static int cmdreset(struct airo_info *ai);
1230static int setflashmode (struct airo_info *ai);
1231static int flashgchar(struct airo_info *ai,int matchbyte,int dwelltime);
1232static int flashputbuf(struct airo_info *ai);
1233static int flashrestart(struct airo_info *ai,struct net_device *dev);
1234
1229#ifdef MICSUPPORT 1235#ifdef MICSUPPORT
1230/*********************************************************************** 1236/***********************************************************************
1231 * MIC ROUTINES * 1237 * MIC ROUTINES *
@@ -1234,10 +1240,11 @@ static int takedown_proc_entry( struct net_device *dev,
1234 1240
1235static int RxSeqValid (struct airo_info *ai,miccntx *context,int mcast,u32 micSeq); 1241static int RxSeqValid (struct airo_info *ai,miccntx *context,int mcast,u32 micSeq);
1236static void MoveWindow(miccntx *context, u32 micSeq); 1242static void MoveWindow(miccntx *context, u32 micSeq);
1237void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen, struct crypto_tfm *); 1243static void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen, struct crypto_tfm *);
1238void emmh32_init(emmh32_context *context); 1244static void emmh32_init(emmh32_context *context);
1239void emmh32_update(emmh32_context *context, u8 *pOctets, int len); 1245static void emmh32_update(emmh32_context *context, u8 *pOctets, int len);
1240void emmh32_final(emmh32_context *context, u8 digest[4]); 1246static void emmh32_final(emmh32_context *context, u8 digest[4]);
1247static int flashpchar(struct airo_info *ai,int byte,int dwelltime);
1241 1248
1242/* micinit - Initialize mic seed */ 1249/* micinit - Initialize mic seed */
1243 1250
@@ -1301,7 +1308,7 @@ static int micsetup(struct airo_info *ai) {
1301 int i; 1308 int i;
1302 1309
1303 if (ai->tfm == NULL) 1310 if (ai->tfm == NULL)
1304 ai->tfm = crypto_alloc_tfm("aes", 0); 1311 ai->tfm = crypto_alloc_tfm("aes", CRYPTO_TFM_REQ_MAY_SLEEP);
1305 1312
1306 if (ai->tfm == NULL) { 1313 if (ai->tfm == NULL) {
1307 printk(KERN_ERR "airo: failed to load transform for AES\n"); 1314 printk(KERN_ERR "airo: failed to load transform for AES\n");
@@ -1315,7 +1322,7 @@ static int micsetup(struct airo_info *ai) {
1315 return SUCCESS; 1322 return SUCCESS;
1316} 1323}
1317 1324
1318char micsnap[]= {0xAA,0xAA,0x03,0x00,0x40,0x96,0x00,0x02}; 1325static char micsnap[] = {0xAA,0xAA,0x03,0x00,0x40,0x96,0x00,0x02};
1319 1326
1320/*=========================================================================== 1327/*===========================================================================
1321 * Description: Mic a packet 1328 * Description: Mic a packet
@@ -1570,7 +1577,7 @@ static void MoveWindow(miccntx *context, u32 micSeq)
1570static unsigned char aes_counter[16]; 1577static unsigned char aes_counter[16];
1571 1578
1572/* expand the key to fill the MMH coefficient array */ 1579/* expand the key to fill the MMH coefficient array */
1573void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen, struct crypto_tfm *tfm) 1580static void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen, struct crypto_tfm *tfm)
1574{ 1581{
1575 /* take the keying material, expand if necessary, truncate at 16-bytes */ 1582 /* take the keying material, expand if necessary, truncate at 16-bytes */
1576 /* run through AES counter mode to generate context->coeff[] */ 1583 /* run through AES counter mode to generate context->coeff[] */
@@ -1602,7 +1609,7 @@ void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen, struct crypto
1602} 1609}
1603 1610
1604/* prepare for calculation of a new mic */ 1611/* prepare for calculation of a new mic */
1605void emmh32_init(emmh32_context *context) 1612static void emmh32_init(emmh32_context *context)
1606{ 1613{
1607 /* prepare for new mic calculation */ 1614 /* prepare for new mic calculation */
1608 context->accum = 0; 1615 context->accum = 0;
@@ -1610,7 +1617,7 @@ void emmh32_init(emmh32_context *context)
1610} 1617}
1611 1618
1612/* add some bytes to the mic calculation */ 1619/* add some bytes to the mic calculation */
1613void emmh32_update(emmh32_context *context, u8 *pOctets, int len) 1620static void emmh32_update(emmh32_context *context, u8 *pOctets, int len)
1614{ 1621{
1615 int coeff_position, byte_position; 1622 int coeff_position, byte_position;
1616 1623
@@ -1652,7 +1659,7 @@ void emmh32_update(emmh32_context *context, u8 *pOctets, int len)
1652static u32 mask32[4] = { 0x00000000L, 0xFF000000L, 0xFFFF0000L, 0xFFFFFF00L }; 1659static u32 mask32[4] = { 0x00000000L, 0xFF000000L, 0xFFFF0000L, 0xFFFFFF00L };
1653 1660
1654/* calculate the mic */ 1661/* calculate the mic */
1655void emmh32_final(emmh32_context *context, u8 digest[4]) 1662static void emmh32_final(emmh32_context *context, u8 digest[4])
1656{ 1663{
1657 int coeff_position, byte_position; 1664 int coeff_position, byte_position;
1658 u32 val; 1665 u32 val;
@@ -2232,7 +2239,7 @@ static void airo_read_stats(struct airo_info *ai) {
2232 u32 *vals = stats_rid.vals; 2239 u32 *vals = stats_rid.vals;
2233 2240
2234 clear_bit(JOB_STATS, &ai->flags); 2241 clear_bit(JOB_STATS, &ai->flags);
2235 if (ai->power) { 2242 if (ai->power.event) {
2236 up(&ai->sem); 2243 up(&ai->sem);
2237 return; 2244 return;
2238 } 2245 }
@@ -2255,7 +2262,7 @@ static void airo_read_stats(struct airo_info *ai) {
2255 ai->stats.rx_fifo_errors = vals[0]; 2262 ai->stats.rx_fifo_errors = vals[0];
2256} 2263}
2257 2264
2258struct net_device_stats *airo_get_stats(struct net_device *dev) 2265static struct net_device_stats *airo_get_stats(struct net_device *dev)
2259{ 2266{
2260 struct airo_info *local = dev->priv; 2267 struct airo_info *local = dev->priv;
2261 2268
@@ -2403,8 +2410,7 @@ void stop_airo_card( struct net_device *dev, int freeres )
2403 } 2410 }
2404 } 2411 }
2405#ifdef MICSUPPORT 2412#ifdef MICSUPPORT
2406 if (ai->tfm) 2413 crypto_free_tfm(ai->tfm);
2407 crypto_free_tfm(ai->tfm);
2408#endif 2414#endif
2409 del_airo_dev( dev ); 2415 del_airo_dev( dev );
2410 free_netdev( dev ); 2416 free_netdev( dev );
@@ -2414,7 +2420,7 @@ EXPORT_SYMBOL(stop_airo_card);
2414 2420
2415static int add_airo_dev( struct net_device *dev ); 2421static int add_airo_dev( struct net_device *dev );
2416 2422
2417int wll_header_parse(struct sk_buff *skb, unsigned char *haddr) 2423static int wll_header_parse(struct sk_buff *skb, unsigned char *haddr)
2418{ 2424{
2419 memcpy(haddr, skb->mac.raw + 10, ETH_ALEN); 2425 memcpy(haddr, skb->mac.raw + 10, ETH_ALEN);
2420 return ETH_ALEN; 2426 return ETH_ALEN;
@@ -2681,7 +2687,7 @@ static struct net_device *init_wifidev(struct airo_info *ai,
2681 return dev; 2687 return dev;
2682} 2688}
2683 2689
2684int reset_card( struct net_device *dev , int lock) { 2690static int reset_card( struct net_device *dev , int lock) {
2685 struct airo_info *ai = dev->priv; 2691 struct airo_info *ai = dev->priv;
2686 2692
2687 if (lock && down_interruptible(&ai->sem)) 2693 if (lock && down_interruptible(&ai->sem))
@@ -2696,9 +2702,9 @@ int reset_card( struct net_device *dev , int lock) {
2696 return 0; 2702 return 0;
2697} 2703}
2698 2704
2699struct net_device *_init_airo_card( unsigned short irq, int port, 2705static struct net_device *_init_airo_card( unsigned short irq, int port,
2700 int is_pcmcia, struct pci_dev *pci, 2706 int is_pcmcia, struct pci_dev *pci,
2701 struct device *dmdev ) 2707 struct device *dmdev )
2702{ 2708{
2703 struct net_device *dev; 2709 struct net_device *dev;
2704 struct airo_info *ai; 2710 struct airo_info *ai;
@@ -2962,7 +2968,7 @@ static int airo_thread(void *data) {
2962 break; 2968 break;
2963 } 2969 }
2964 2970
2965 if (ai->power || test_bit(FLAG_FLASHING, &ai->flags)) { 2971 if (ai->power.event || test_bit(FLAG_FLASHING, &ai->flags)) {
2966 up(&ai->sem); 2972 up(&ai->sem);
2967 continue; 2973 continue;
2968 } 2974 }
@@ -5514,7 +5520,7 @@ static int airo_pci_resume(struct pci_dev *pdev)
5514 pci_restore_state(pdev); 5520 pci_restore_state(pdev);
5515 pci_enable_wake(pdev, pci_choose_state(pdev, ai->power), 0); 5521 pci_enable_wake(pdev, pci_choose_state(pdev, ai->power), 0);
5516 5522
5517 if (ai->power > 1) { 5523 if (ai->power.event > 1) {
5518 reset_card(dev, 0); 5524 reset_card(dev, 0);
5519 mpi_init_descriptors(ai); 5525 mpi_init_descriptors(ai);
5520 setup_card(ai, dev->dev_addr, 0); 5526 setup_card(ai, dev->dev_addr, 0);
@@ -7116,7 +7122,7 @@ static int airo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
7116 int rc = 0; 7122 int rc = 0;
7117 struct airo_info *ai = (struct airo_info *)dev->priv; 7123 struct airo_info *ai = (struct airo_info *)dev->priv;
7118 7124
7119 if (ai->power) 7125 if (ai->power.event)
7120 return 0; 7126 return 0;
7121 7127
7122 switch (cmd) { 7128 switch (cmd) {
@@ -7195,7 +7201,7 @@ static void airo_read_wireless_stats(struct airo_info *local)
7195 7201
7196 /* Get stats out of the card */ 7202 /* Get stats out of the card */
7197 clear_bit(JOB_WSTATS, &local->flags); 7203 clear_bit(JOB_WSTATS, &local->flags);
7198 if (local->power) { 7204 if (local->power.event) {
7199 up(&local->sem); 7205 up(&local->sem);
7200 return; 7206 return;
7201 } 7207 }
@@ -7235,7 +7241,7 @@ static void airo_read_wireless_stats(struct airo_info *local)
7235 local->wstats.miss.beacon = vals[34]; 7241 local->wstats.miss.beacon = vals[34];
7236} 7242}
7237 7243
7238struct iw_statistics *airo_get_wireless_stats(struct net_device *dev) 7244static struct iw_statistics *airo_get_wireless_stats(struct net_device *dev)
7239{ 7245{
7240 struct airo_info *local = dev->priv; 7246 struct airo_info *local = dev->priv;
7241 7247
@@ -7450,14 +7456,8 @@ static int writerids(struct net_device *dev, aironet_ioctl *comp) {
7450 * Flash command switch table 7456 * Flash command switch table
7451 */ 7457 */
7452 7458
7453int flashcard(struct net_device *dev, aironet_ioctl *comp) { 7459static int flashcard(struct net_device *dev, aironet_ioctl *comp) {
7454 int z; 7460 int z;
7455 int cmdreset(struct airo_info *);
7456 int setflashmode(struct airo_info *);
7457 int flashgchar(struct airo_info *,int,int);
7458 int flashpchar(struct airo_info *,int,int);
7459 int flashputbuf(struct airo_info *);
7460 int flashrestart(struct airo_info *,struct net_device *);
7461 7461
7462 /* Only super-user can modify flash */ 7462 /* Only super-user can modify flash */
7463 if (!capable(CAP_NET_ADMIN)) 7463 if (!capable(CAP_NET_ADMIN))
@@ -7515,7 +7515,7 @@ int flashcard(struct net_device *dev, aironet_ioctl *comp) {
7515 * card. 7515 * card.
7516 */ 7516 */
7517 7517
7518int cmdreset(struct airo_info *ai) { 7518static int cmdreset(struct airo_info *ai) {
7519 disable_MAC(ai, 1); 7519 disable_MAC(ai, 1);
7520 7520
7521 if(!waitbusy (ai)){ 7521 if(!waitbusy (ai)){
@@ -7539,7 +7539,7 @@ int cmdreset(struct airo_info *ai) {
7539 * mode 7539 * mode
7540 */ 7540 */
7541 7541
7542int setflashmode (struct airo_info *ai) { 7542static int setflashmode (struct airo_info *ai) {
7543 set_bit (FLAG_FLASHING, &ai->flags); 7543 set_bit (FLAG_FLASHING, &ai->flags);
7544 7544
7545 OUT4500(ai, SWS0, FLASH_COMMAND); 7545 OUT4500(ai, SWS0, FLASH_COMMAND);
@@ -7566,7 +7566,7 @@ int setflashmode (struct airo_info *ai) {
7566 * x 50us for echo . 7566 * x 50us for echo .
7567 */ 7567 */
7568 7568
7569int flashpchar(struct airo_info *ai,int byte,int dwelltime) { 7569static int flashpchar(struct airo_info *ai,int byte,int dwelltime) {
7570 int echo; 7570 int echo;
7571 int waittime; 7571 int waittime;
7572 7572
@@ -7606,7 +7606,7 @@ int flashpchar(struct airo_info *ai,int byte,int dwelltime) {
7606 * Get a character from the card matching matchbyte 7606 * Get a character from the card matching matchbyte
7607 * Step 3) 7607 * Step 3)
7608 */ 7608 */
7609int flashgchar(struct airo_info *ai,int matchbyte,int dwelltime){ 7609static int flashgchar(struct airo_info *ai,int matchbyte,int dwelltime){
7610 int rchar; 7610 int rchar;
7611 unsigned char rbyte=0; 7611 unsigned char rbyte=0;
7612 7612
@@ -7637,7 +7637,7 @@ int flashgchar(struct airo_info *ai,int matchbyte,int dwelltime){
7637 * send to the card 7637 * send to the card
7638 */ 7638 */
7639 7639
7640int flashputbuf(struct airo_info *ai){ 7640static int flashputbuf(struct airo_info *ai){
7641 int nwords; 7641 int nwords;
7642 7642
7643 /* Write stuff */ 7643 /* Write stuff */
@@ -7659,7 +7659,7 @@ int flashputbuf(struct airo_info *ai){
7659/* 7659/*
7660 * 7660 *
7661 */ 7661 */
7662int flashrestart(struct airo_info *ai,struct net_device *dev){ 7662static int flashrestart(struct airo_info *ai,struct net_device *dev){
7663 int i,status; 7663 int i,status;
7664 7664
7665 ssleep(1); /* Added 12/7/00 */ 7665 ssleep(1); /* Added 12/7/00 */
diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c
index 18a7d38d2a13..f48a6e729224 100644
--- a/drivers/net/wireless/atmel.c
+++ b/drivers/net/wireless/atmel.c
@@ -68,7 +68,7 @@
68#include <linux/device.h> 68#include <linux/device.h>
69#include <linux/moduleparam.h> 69#include <linux/moduleparam.h>
70#include <linux/firmware.h> 70#include <linux/firmware.h>
71#include "ieee802_11.h" 71#include <net/ieee80211.h>
72#include "atmel.h" 72#include "atmel.h"
73 73
74#define DRIVER_MAJOR 0 74#define DRIVER_MAJOR 0
@@ -618,12 +618,12 @@ static int atmel_lock_mac(struct atmel_private *priv);
618static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data); 618static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
619static void atmel_command_irq(struct atmel_private *priv); 619static void atmel_command_irq(struct atmel_private *priv);
620static int atmel_validate_channel(struct atmel_private *priv, int channel); 620static int atmel_validate_channel(struct atmel_private *priv, int channel);
621static void atmel_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header, 621static void atmel_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header,
622 u16 frame_len, u8 rssi); 622 u16 frame_len, u8 rssi);
623static void atmel_management_timer(u_long a); 623static void atmel_management_timer(u_long a);
624static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size); 624static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size);
625static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size); 625static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size);
626static void atmel_transmit_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header, 626static void atmel_transmit_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header,
627 u8 *body, int body_len); 627 u8 *body, int body_len);
628 628
629static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index); 629static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
@@ -827,7 +827,7 @@ static void tx_update_descriptor(struct atmel_private *priv, int is_bcast, u16 l
827static int start_tx (struct sk_buff *skb, struct net_device *dev) 827static int start_tx (struct sk_buff *skb, struct net_device *dev)
828{ 828{
829 struct atmel_private *priv = netdev_priv(dev); 829 struct atmel_private *priv = netdev_priv(dev);
830 struct ieee802_11_hdr header; 830 struct ieee80211_hdr header;
831 unsigned long flags; 831 unsigned long flags;
832 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; 832 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
833 u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00}; 833 u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
@@ -863,17 +863,17 @@ static int start_tx (struct sk_buff *skb, struct net_device *dev)
863 return 1; 863 return 1;
864 } 864 }
865 865
866 frame_ctl = IEEE802_11_FTYPE_DATA; 866 frame_ctl = IEEE80211_FTYPE_DATA;
867 header.duration_id = 0; 867 header.duration_id = 0;
868 header.seq_ctl = 0; 868 header.seq_ctl = 0;
869 if (priv->wep_is_on) 869 if (priv->wep_is_on)
870 frame_ctl |= IEEE802_11_FCTL_WEP; 870 frame_ctl |= IEEE80211_FCTL_PROTECTED;
871 if (priv->operating_mode == IW_MODE_ADHOC) { 871 if (priv->operating_mode == IW_MODE_ADHOC) {
872 memcpy(&header.addr1, skb->data, 6); 872 memcpy(&header.addr1, skb->data, 6);
873 memcpy(&header.addr2, dev->dev_addr, 6); 873 memcpy(&header.addr2, dev->dev_addr, 6);
874 memcpy(&header.addr3, priv->BSSID, 6); 874 memcpy(&header.addr3, priv->BSSID, 6);
875 } else { 875 } else {
876 frame_ctl |= IEEE802_11_FCTL_TODS; 876 frame_ctl |= IEEE80211_FCTL_TODS;
877 memcpy(&header.addr1, priv->CurrentBSSID, 6); 877 memcpy(&header.addr1, priv->CurrentBSSID, 6);
878 memcpy(&header.addr2, dev->dev_addr, 6); 878 memcpy(&header.addr2, dev->dev_addr, 6);
879 memcpy(&header.addr3, skb->data, 6); 879 memcpy(&header.addr3, skb->data, 6);
@@ -902,7 +902,7 @@ static int start_tx (struct sk_buff *skb, struct net_device *dev)
902} 902}
903 903
904static void atmel_transmit_management_frame(struct atmel_private *priv, 904static void atmel_transmit_management_frame(struct atmel_private *priv,
905 struct ieee802_11_hdr *header, 905 struct ieee80211_hdr *header,
906 u8 *body, int body_len) 906 u8 *body, int body_len)
907{ 907{
908 u16 buff; 908 u16 buff;
@@ -917,7 +917,7 @@ static void atmel_transmit_management_frame(struct atmel_private *priv,
917 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT); 917 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
918} 918}
919 919
920static void fast_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *header, 920static void fast_rx_path(struct atmel_private *priv, struct ieee80211_hdr *header,
921 u16 msdu_size, u16 rx_packet_loc, u32 crc) 921 u16 msdu_size, u16 rx_packet_loc, u32 crc)
922{ 922{
923 /* fast path: unfragmented packet copy directly into skbuf */ 923 /* fast path: unfragmented packet copy directly into skbuf */
@@ -955,7 +955,7 @@ static void fast_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *head
955 } 955 }
956 956
957 memcpy(skbp, header->addr1, 6); /* destination address */ 957 memcpy(skbp, header->addr1, 6); /* destination address */
958 if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS) 958 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
959 memcpy(&skbp[6], header->addr3, 6); 959 memcpy(&skbp[6], header->addr3, 6);
960 else 960 else
961 memcpy(&skbp[6], header->addr2, 6); /* source address */ 961 memcpy(&skbp[6], header->addr2, 6); /* source address */
@@ -990,14 +990,14 @@ static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
990 return (crc ^ 0xffffffff) == netcrc; 990 return (crc ^ 0xffffffff) == netcrc;
991} 991}
992 992
993static void frag_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *header, 993static void frag_rx_path(struct atmel_private *priv, struct ieee80211_hdr *header,
994 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no, u8 frag_no, int more_frags) 994 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no, u8 frag_no, int more_frags)
995{ 995{
996 u8 mac4[6]; 996 u8 mac4[6];
997 u8 source[6]; 997 u8 source[6];
998 struct sk_buff *skb; 998 struct sk_buff *skb;
999 999
1000 if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS) 1000 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1001 memcpy(source, header->addr3, 6); 1001 memcpy(source, header->addr3, 6);
1002 else 1002 else
1003 memcpy(source, header->addr2, 6); 1003 memcpy(source, header->addr2, 6);
@@ -1082,7 +1082,7 @@ static void frag_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *head
1082static void rx_done_irq(struct atmel_private *priv) 1082static void rx_done_irq(struct atmel_private *priv)
1083{ 1083{
1084 int i; 1084 int i;
1085 struct ieee802_11_hdr header; 1085 struct ieee80211_hdr header;
1086 1086
1087 for (i = 0; 1087 for (i = 0;
1088 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID && 1088 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
@@ -1117,7 +1117,7 @@ static void rx_done_irq(struct atmel_private *priv)
1117 /* probe for CRC use here if needed once five packets have arrived with 1117 /* probe for CRC use here if needed once five packets have arrived with
1118 the same crc status, we assume we know what's happening and stop probing */ 1118 the same crc status, we assume we know what's happening and stop probing */
1119 if (priv->probe_crc) { 1119 if (priv->probe_crc) {
1120 if (!priv->wep_is_on || !(frame_ctl & IEEE802_11_FCTL_WEP)) { 1120 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1121 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size); 1121 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1122 } else { 1122 } else {
1123 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24); 1123 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
@@ -1132,16 +1132,16 @@ static void rx_done_irq(struct atmel_private *priv)
1132 } 1132 }
1133 1133
1134 /* don't CRC header when WEP in use */ 1134 /* don't CRC header when WEP in use */
1135 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE802_11_FCTL_WEP))) { 1135 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1136 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24); 1136 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1137 } 1137 }
1138 msdu_size -= 24; /* header */ 1138 msdu_size -= 24; /* header */
1139 1139
1140 if ((frame_ctl & IEEE802_11_FCTL_FTYPE) == IEEE802_11_FTYPE_DATA) { 1140 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
1141 1141
1142 int more_fragments = frame_ctl & IEEE802_11_FCTL_MOREFRAGS; 1142 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1143 u8 packet_fragment_no = seq_control & IEEE802_11_SCTL_FRAG; 1143 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1144 u16 packet_sequence_no = (seq_control & IEEE802_11_SCTL_SEQ) >> 4; 1144 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
1145 1145
1146 if (!more_fragments && packet_fragment_no == 0 ) { 1146 if (!more_fragments && packet_fragment_no == 0 ) {
1147 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc); 1147 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
@@ -1151,7 +1151,7 @@ static void rx_done_irq(struct atmel_private *priv)
1151 } 1151 }
1152 } 1152 }
1153 1153
1154 if ((frame_ctl & IEEE802_11_FCTL_FTYPE) == IEEE802_11_FTYPE_MGMT) { 1154 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1155 /* copy rest of packet into buffer */ 1155 /* copy rest of packet into buffer */
1156 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size); 1156 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1157 1157
@@ -2663,10 +2663,10 @@ static void handle_beacon_probe(struct atmel_private *priv, u16 capability, u8 c
2663 2663
2664static void send_authentication_request(struct atmel_private *priv, u8 *challenge, int challenge_len) 2664static void send_authentication_request(struct atmel_private *priv, u8 *challenge, int challenge_len)
2665{ 2665{
2666 struct ieee802_11_hdr header; 2666 struct ieee80211_hdr header;
2667 struct auth_body auth; 2667 struct auth_body auth;
2668 2668
2669 header.frame_ctl = cpu_to_le16(IEEE802_11_FTYPE_MGMT | IEEE802_11_STYPE_AUTH); 2669 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2670 header.duration_id = cpu_to_le16(0x8000); 2670 header.duration_id = cpu_to_le16(0x8000);
2671 header.seq_ctl = 0; 2671 header.seq_ctl = 0;
2672 memcpy(header.addr1, priv->CurrentBSSID, 6); 2672 memcpy(header.addr1, priv->CurrentBSSID, 6);
@@ -2677,7 +2677,7 @@ static void send_authentication_request(struct atmel_private *priv, u8 *challeng
2677 auth.alg = cpu_to_le16(C80211_MGMT_AAN_SHAREDKEY); 2677 auth.alg = cpu_to_le16(C80211_MGMT_AAN_SHAREDKEY);
2678 /* no WEP for authentication frames with TrSeqNo 1 */ 2678 /* no WEP for authentication frames with TrSeqNo 1 */
2679 if (priv->CurrentAuthentTransactionSeqNum != 1) 2679 if (priv->CurrentAuthentTransactionSeqNum != 1)
2680 header.frame_ctl |= cpu_to_le16(IEEE802_11_FCTL_WEP); 2680 header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2681 } else { 2681 } else {
2682 auth.alg = cpu_to_le16(C80211_MGMT_AAN_OPENSYSTEM); 2682 auth.alg = cpu_to_le16(C80211_MGMT_AAN_OPENSYSTEM);
2683 } 2683 }
@@ -2701,7 +2701,7 @@ static void send_association_request(struct atmel_private *priv, int is_reassoc)
2701{ 2701{
2702 u8 *ssid_el_p; 2702 u8 *ssid_el_p;
2703 int bodysize; 2703 int bodysize;
2704 struct ieee802_11_hdr header; 2704 struct ieee80211_hdr header;
2705 struct ass_req_format { 2705 struct ass_req_format {
2706 u16 capability; 2706 u16 capability;
2707 u16 listen_interval; 2707 u16 listen_interval;
@@ -2714,8 +2714,8 @@ static void send_association_request(struct atmel_private *priv, int is_reassoc)
2714 u8 rates[4]; 2714 u8 rates[4];
2715 } body; 2715 } body;
2716 2716
2717 header.frame_ctl = cpu_to_le16(IEEE802_11_FTYPE_MGMT | 2717 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2718 (is_reassoc ? IEEE802_11_STYPE_REASSOC_REQ : IEEE802_11_STYPE_ASSOC_REQ)); 2718 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
2719 header.duration_id = cpu_to_le16(0x8000); 2719 header.duration_id = cpu_to_le16(0x8000);
2720 header.seq_ctl = 0; 2720 header.seq_ctl = 0;
2721 2721
@@ -2751,9 +2751,9 @@ static void send_association_request(struct atmel_private *priv, int is_reassoc)
2751 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize); 2751 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2752} 2752}
2753 2753
2754static int is_frame_from_current_bss(struct atmel_private *priv, struct ieee802_11_hdr *header) 2754static int is_frame_from_current_bss(struct atmel_private *priv, struct ieee80211_hdr *header)
2755{ 2755{
2756 if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS) 2756 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
2757 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0; 2757 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2758 else 2758 else
2759 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0; 2759 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
@@ -2801,7 +2801,7 @@ static int retrieve_bss(struct atmel_private *priv)
2801} 2801}
2802 2802
2803 2803
2804static void store_bss_info(struct atmel_private *priv, struct ieee802_11_hdr *header, 2804static void store_bss_info(struct atmel_private *priv, struct ieee80211_hdr *header,
2805 u16 capability, u16 beacon_period, u8 channel, u8 rssi, 2805 u16 capability, u16 beacon_period, u8 channel, u8 rssi,
2806 u8 ssid_len, u8 *ssid, int is_beacon) 2806 u8 ssid_len, u8 *ssid, int is_beacon)
2807{ 2807{
@@ -3085,12 +3085,12 @@ static void atmel_smooth_qual(struct atmel_private *priv)
3085} 3085}
3086 3086
3087/* deals with incoming managment frames. */ 3087/* deals with incoming managment frames. */
3088static void atmel_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header, 3088static void atmel_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header,
3089 u16 frame_len, u8 rssi) 3089 u16 frame_len, u8 rssi)
3090{ 3090{
3091 u16 subtype; 3091 u16 subtype;
3092 3092
3093 switch (subtype = le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_STYPE) { 3093 switch (subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE) {
3094 case C80211_SUBTYPE_MGMT_BEACON : 3094 case C80211_SUBTYPE_MGMT_BEACON :
3095 case C80211_SUBTYPE_MGMT_ProbeResponse: 3095 case C80211_SUBTYPE_MGMT_ProbeResponse:
3096 3096
diff --git a/drivers/net/wireless/hostap/Kconfig b/drivers/net/wireless/hostap/Kconfig
new file mode 100644
index 000000000000..56f41c714d38
--- /dev/null
+++ b/drivers/net/wireless/hostap/Kconfig
@@ -0,0 +1,73 @@
1config HOSTAP
2 tristate "IEEE 802.11 for Host AP (Prism2/2.5/3 and WEP/TKIP/CCMP)"
3 depends on NET_RADIO
4 select IEEE80211
5 select IEEE80211_CRYPT_WEP
6 ---help---
7 Shared driver code for IEEE 802.11b wireless cards based on
8 Intersil Prism2/2.5/3 chipset. This driver supports so called
9 Host AP mode that allows the card to act as an IEEE 802.11
10 access point.
11
12 See <http://hostap.epitest.fi/> for more information about the
13 Host AP driver configuration and tools. This site includes
14 information and tools (hostapd and wpa_supplicant) for WPA/WPA2
15 support.
16
17 This option includes the base Host AP driver code that is shared by
18 different hardware models. You will also need to enable support for
19 PLX/PCI/CS version of the driver to actually use the driver.
20
21 The driver can be compiled as a module and it will be called
22 "hostap.ko".
23
24config HOSTAP_FIRMWARE
25 bool "Support downloading firmware images with Host AP driver"
26 depends on HOSTAP
27 ---help---
28 Configure Host AP driver to include support for firmware image
29 download. Current version supports only downloading to volatile, i.e.,
30 RAM memory. Flash upgrade is not yet supported.
31
32 Firmware image downloading needs user space tool, prism2_srec. It is
33 available from http://hostap.epitest.fi/.
34
35config HOSTAP_PLX
36 tristate "Host AP driver for Prism2/2.5/3 in PLX9052 PCI adaptors"
37 depends on PCI && HOSTAP
38 ---help---
39 Host AP driver's version for Prism2/2.5/3 PC Cards in PLX9052 based
40 PCI adaptors.
41
42 "Host AP support for Prism2/2.5/3 IEEE 802.11b" is required for this
43 driver and its help text includes more information about the Host AP
44 driver.
45
46 The driver can be compiled as a module and will be named
47 "hostap_plx.ko".
48
49config HOSTAP_PCI
50 tristate "Host AP driver for Prism2.5 PCI adaptors"
51 depends on PCI && HOSTAP
52 ---help---
53 Host AP driver's version for Prism2.5 PCI adaptors.
54
55 "Host AP support for Prism2/2.5/3 IEEE 802.11b" is required for this
56 driver and its help text includes more information about the Host AP
57 driver.
58
59 The driver can be compiled as a module and will be named
60 "hostap_pci.ko".
61
62config HOSTAP_CS
63 tristate "Host AP driver for Prism2/2.5/3 PC Cards"
64 depends on PCMCIA!=n && HOSTAP
65 ---help---
66 Host AP driver's version for Prism2/2.5/3 PC Cards.
67
68 "Host AP support for Prism2/2.5/3 IEEE 802.11b" is required for this
69 driver and its help text includes more information about the Host AP
70 driver.
71
72 The driver can be compiled as a module and will be named
73 "hostap_cs.ko".
diff --git a/drivers/net/wireless/hostap/Makefile b/drivers/net/wireless/hostap/Makefile
new file mode 100644
index 000000000000..fc62235bfc24
--- /dev/null
+++ b/drivers/net/wireless/hostap/Makefile
@@ -0,0 +1,5 @@
1obj-$(CONFIG_HOSTAP) += hostap.o
2
3obj-$(CONFIG_HOSTAP_CS) += hostap_cs.o
4obj-$(CONFIG_HOSTAP_PLX) += hostap_plx.o
5obj-$(CONFIG_HOSTAP_PCI) += hostap_pci.o
diff --git a/drivers/net/wireless/hostap/hostap.c b/drivers/net/wireless/hostap/hostap.c
new file mode 100644
index 000000000000..e7f5821b4942
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap.c
@@ -0,0 +1,1198 @@
1/*
2 * Host AP (software wireless LAN access point) driver for
3 * Intersil Prism2/2.5/3 - hostap.o module, common routines
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2005, Jouni Malinen <jkmaline@cc.hut.fi>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. See README and COPYING for
12 * more details.
13 */
14
15#include <linux/config.h>
16#include <linux/version.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/slab.h>
20#include <linux/proc_fs.h>
21#include <linux/if_arp.h>
22#include <linux/delay.h>
23#include <linux/random.h>
24#include <linux/workqueue.h>
25#include <linux/kmod.h>
26#include <linux/rtnetlink.h>
27#include <linux/wireless.h>
28#include <net/iw_handler.h>
29#include <net/ieee80211.h>
30#include <net/ieee80211_crypt.h>
31#include <asm/uaccess.h>
32
33#include "hostap_wlan.h"
34#include "hostap_80211.h"
35#include "hostap_ap.h"
36#include "hostap.h"
37
38MODULE_AUTHOR("Jouni Malinen");
39MODULE_DESCRIPTION("Host AP common routines");
40MODULE_LICENSE("GPL");
41MODULE_VERSION(PRISM2_VERSION);
42
43#define TX_TIMEOUT (2 * HZ)
44
45#define PRISM2_MAX_FRAME_SIZE 2304
46#define PRISM2_MIN_MTU 256
47/* FIX: */
48#define PRISM2_MAX_MTU (PRISM2_MAX_FRAME_SIZE - (6 /* LLC */ + 8 /* WEP */))
49
50
51/* hostap.c */
52static int prism2_wds_add(local_info_t *local, u8 *remote_addr,
53 int rtnl_locked);
54static int prism2_wds_del(local_info_t *local, u8 *remote_addr,
55 int rtnl_locked, int do_not_remove);
56
57/* hostap_ap.c */
58static int prism2_ap_get_sta_qual(local_info_t *local, struct sockaddr addr[],
59 struct iw_quality qual[], int buf_size,
60 int aplist);
61static int prism2_ap_translate_scan(struct net_device *dev, char *buffer);
62static int prism2_hostapd(struct ap_data *ap,
63 struct prism2_hostapd_param *param);
64static void * ap_crypt_get_ptrs(struct ap_data *ap, u8 *addr, int permanent,
65 struct ieee80211_crypt_data ***crypt);
66static void ap_control_kickall(struct ap_data *ap);
67#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
68static int ap_control_add_mac(struct mac_restrictions *mac_restrictions,
69 u8 *mac);
70static int ap_control_del_mac(struct mac_restrictions *mac_restrictions,
71 u8 *mac);
72static void ap_control_flush_macs(struct mac_restrictions *mac_restrictions);
73static int ap_control_kick_mac(struct ap_data *ap, struct net_device *dev,
74 u8 *mac);
75#endif /* !PRISM2_NO_KERNEL_IEEE80211_MGMT */
76
77
78static const long freq_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
79 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
80#define FREQ_COUNT (sizeof(freq_list) / sizeof(freq_list[0]))
81
82
83/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
84/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
85static unsigned char rfc1042_header[] =
86{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
87/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
88static unsigned char bridge_tunnel_header[] =
89{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
90/* No encapsulation header if EtherType < 0x600 (=length) */
91
92
93/* FIX: these could be compiled separately and linked together to hostap.o */
94#include "hostap_ap.c"
95#include "hostap_info.c"
96#include "hostap_ioctl.c"
97#include "hostap_proc.c"
98#include "hostap_80211_rx.c"
99#include "hostap_80211_tx.c"
100
101
102struct net_device * hostap_add_interface(struct local_info *local,
103 int type, int rtnl_locked,
104 const char *prefix,
105 const char *name)
106{
107 struct net_device *dev, *mdev;
108 struct hostap_interface *iface;
109 int ret;
110
111 dev = alloc_etherdev(sizeof(struct hostap_interface));
112 if (dev == NULL)
113 return NULL;
114
115 iface = netdev_priv(dev);
116 iface->dev = dev;
117 iface->local = local;
118 iface->type = type;
119 list_add(&iface->list, &local->hostap_interfaces);
120
121 mdev = local->dev;
122 memcpy(dev->dev_addr, mdev->dev_addr, ETH_ALEN);
123 dev->base_addr = mdev->base_addr;
124 dev->irq = mdev->irq;
125 dev->mem_start = mdev->mem_start;
126 dev->mem_end = mdev->mem_end;
127
128 hostap_setup_dev(dev, local, 0);
129 dev->destructor = free_netdev;
130
131 sprintf(dev->name, "%s%s", prefix, name);
132 if (!rtnl_locked)
133 rtnl_lock();
134
135 ret = 0;
136 if (strchr(dev->name, '%'))
137 ret = dev_alloc_name(dev, dev->name);
138
139 SET_NETDEV_DEV(dev, mdev->class_dev.dev);
140 if (ret >= 0)
141 ret = register_netdevice(dev);
142
143 if (!rtnl_locked)
144 rtnl_unlock();
145
146 if (ret < 0) {
147 printk(KERN_WARNING "%s: failed to add new netdevice!\n",
148 dev->name);
149 free_netdev(dev);
150 return NULL;
151 }
152
153 printk(KERN_DEBUG "%s: registered netdevice %s\n",
154 mdev->name, dev->name);
155
156 return dev;
157}
158
159
160void hostap_remove_interface(struct net_device *dev, int rtnl_locked,
161 int remove_from_list)
162{
163 struct hostap_interface *iface;
164
165 if (!dev)
166 return;
167
168 iface = netdev_priv(dev);
169
170 if (remove_from_list) {
171 list_del(&iface->list);
172 }
173
174 if (dev == iface->local->ddev)
175 iface->local->ddev = NULL;
176 else if (dev == iface->local->apdev)
177 iface->local->apdev = NULL;
178 else if (dev == iface->local->stadev)
179 iface->local->stadev = NULL;
180
181 if (rtnl_locked)
182 unregister_netdevice(dev);
183 else
184 unregister_netdev(dev);
185
186 /* dev->destructor = free_netdev() will free the device data, including
187 * private data, when removing the device */
188}
189
190
191static inline int prism2_wds_special_addr(u8 *addr)
192{
193 if (addr[0] || addr[1] || addr[2] || addr[3] || addr[4] || addr[5])
194 return 0;
195
196 return 1;
197}
198
199
200static int prism2_wds_add(local_info_t *local, u8 *remote_addr,
201 int rtnl_locked)
202{
203 struct net_device *dev;
204 struct list_head *ptr;
205 struct hostap_interface *iface, *empty, *match;
206
207 empty = match = NULL;
208 read_lock_bh(&local->iface_lock);
209 list_for_each(ptr, &local->hostap_interfaces) {
210 iface = list_entry(ptr, struct hostap_interface, list);
211 if (iface->type != HOSTAP_INTERFACE_WDS)
212 continue;
213
214 if (prism2_wds_special_addr(iface->u.wds.remote_addr))
215 empty = iface;
216 else if (memcmp(iface->u.wds.remote_addr, remote_addr,
217 ETH_ALEN) == 0) {
218 match = iface;
219 break;
220 }
221 }
222 if (!match && empty && !prism2_wds_special_addr(remote_addr)) {
223 /* take pre-allocated entry into use */
224 memcpy(empty->u.wds.remote_addr, remote_addr, ETH_ALEN);
225 read_unlock_bh(&local->iface_lock);
226 printk(KERN_DEBUG "%s: using pre-allocated WDS netdevice %s\n",
227 local->dev->name, empty->dev->name);
228 return 0;
229 }
230 read_unlock_bh(&local->iface_lock);
231
232 if (!prism2_wds_special_addr(remote_addr)) {
233 if (match)
234 return -EEXIST;
235 hostap_add_sta(local->ap, remote_addr);
236 }
237
238 if (local->wds_connections >= local->wds_max_connections)
239 return -ENOBUFS;
240
241 /* verify that there is room for wds# postfix in the interface name */
242 if (strlen(local->dev->name) > IFNAMSIZ - 5) {
243 printk(KERN_DEBUG "'%s' too long base device name\n",
244 local->dev->name);
245 return -EINVAL;
246 }
247
248 dev = hostap_add_interface(local, HOSTAP_INTERFACE_WDS, rtnl_locked,
249 local->ddev->name, "wds%d");
250 if (dev == NULL)
251 return -ENOMEM;
252
253 iface = netdev_priv(dev);
254 memcpy(iface->u.wds.remote_addr, remote_addr, ETH_ALEN);
255
256 local->wds_connections++;
257
258 return 0;
259}
260
261
262static int prism2_wds_del(local_info_t *local, u8 *remote_addr,
263 int rtnl_locked, int do_not_remove)
264{
265 unsigned long flags;
266 struct list_head *ptr;
267 struct hostap_interface *iface, *selected = NULL;
268
269 write_lock_irqsave(&local->iface_lock, flags);
270 list_for_each(ptr, &local->hostap_interfaces) {
271 iface = list_entry(ptr, struct hostap_interface, list);
272 if (iface->type != HOSTAP_INTERFACE_WDS)
273 continue;
274
275 if (memcmp(iface->u.wds.remote_addr, remote_addr,
276 ETH_ALEN) == 0) {
277 selected = iface;
278 break;
279 }
280 }
281 if (selected && !do_not_remove)
282 list_del(&selected->list);
283 write_unlock_irqrestore(&local->iface_lock, flags);
284
285 if (selected) {
286 if (do_not_remove)
287 memset(selected->u.wds.remote_addr, 0, ETH_ALEN);
288 else {
289 hostap_remove_interface(selected->dev, rtnl_locked, 0);
290 local->wds_connections--;
291 }
292 }
293
294 return selected ? 0 : -ENODEV;
295}
296
297
298u16 hostap_tx_callback_register(local_info_t *local,
299 void (*func)(struct sk_buff *, int ok, void *),
300 void *data)
301{
302 unsigned long flags;
303 struct hostap_tx_callback_info *entry;
304
305 entry = (struct hostap_tx_callback_info *) kmalloc(sizeof(*entry),
306 GFP_ATOMIC);
307 if (entry == NULL)
308 return 0;
309
310 entry->func = func;
311 entry->data = data;
312
313 spin_lock_irqsave(&local->lock, flags);
314 entry->idx = local->tx_callback ? local->tx_callback->idx + 1 : 1;
315 entry->next = local->tx_callback;
316 local->tx_callback = entry;
317 spin_unlock_irqrestore(&local->lock, flags);
318
319 return entry->idx;
320}
321
322
323int hostap_tx_callback_unregister(local_info_t *local, u16 idx)
324{
325 unsigned long flags;
326 struct hostap_tx_callback_info *cb, *prev = NULL;
327
328 spin_lock_irqsave(&local->lock, flags);
329 cb = local->tx_callback;
330 while (cb != NULL && cb->idx != idx) {
331 prev = cb;
332 cb = cb->next;
333 }
334 if (cb) {
335 if (prev == NULL)
336 local->tx_callback = cb->next;
337 else
338 prev->next = cb->next;
339 kfree(cb);
340 }
341 spin_unlock_irqrestore(&local->lock, flags);
342
343 return cb ? 0 : -1;
344}
345
346
347/* val is in host byte order */
348int hostap_set_word(struct net_device *dev, int rid, u16 val)
349{
350 struct hostap_interface *iface;
351 u16 tmp = cpu_to_le16(val);
352 iface = netdev_priv(dev);
353 return iface->local->func->set_rid(dev, rid, &tmp, 2);
354}
355
356
357int hostap_set_string(struct net_device *dev, int rid, const char *val)
358{
359 struct hostap_interface *iface;
360 char buf[MAX_SSID_LEN + 2];
361 int len;
362
363 iface = netdev_priv(dev);
364 len = strlen(val);
365 if (len > MAX_SSID_LEN)
366 return -1;
367 memset(buf, 0, sizeof(buf));
368 buf[0] = len; /* little endian 16 bit word */
369 memcpy(buf + 2, val, len);
370
371 return iface->local->func->set_rid(dev, rid, &buf, MAX_SSID_LEN + 2);
372}
373
374
375u16 hostap_get_porttype(local_info_t *local)
376{
377 if (local->iw_mode == IW_MODE_ADHOC && local->pseudo_adhoc)
378 return HFA384X_PORTTYPE_PSEUDO_IBSS;
379 if (local->iw_mode == IW_MODE_ADHOC)
380 return HFA384X_PORTTYPE_IBSS;
381 if (local->iw_mode == IW_MODE_INFRA)
382 return HFA384X_PORTTYPE_BSS;
383 if (local->iw_mode == IW_MODE_REPEAT)
384 return HFA384X_PORTTYPE_WDS;
385 if (local->iw_mode == IW_MODE_MONITOR)
386 return HFA384X_PORTTYPE_PSEUDO_IBSS;
387 return HFA384X_PORTTYPE_HOSTAP;
388}
389
390
391int hostap_set_encryption(local_info_t *local)
392{
393 u16 val, old_val;
394 int i, keylen, len, idx;
395 char keybuf[WEP_KEY_LEN + 1];
396 enum { NONE, WEP, OTHER } encrypt_type;
397
398 idx = local->tx_keyidx;
399 if (local->crypt[idx] == NULL || local->crypt[idx]->ops == NULL)
400 encrypt_type = NONE;
401 else if (strcmp(local->crypt[idx]->ops->name, "WEP") == 0)
402 encrypt_type = WEP;
403 else
404 encrypt_type = OTHER;
405
406 if (local->func->get_rid(local->dev, HFA384X_RID_CNFWEPFLAGS, &val, 2,
407 1) < 0) {
408 printk(KERN_DEBUG "Could not read current WEP flags.\n");
409 goto fail;
410 }
411 le16_to_cpus(&val);
412 old_val = val;
413
414 if (encrypt_type != NONE || local->privacy_invoked)
415 val |= HFA384X_WEPFLAGS_PRIVACYINVOKED;
416 else
417 val &= ~HFA384X_WEPFLAGS_PRIVACYINVOKED;
418
419 if (local->open_wep || encrypt_type == NONE ||
420 ((local->ieee_802_1x || local->wpa) && local->host_decrypt))
421 val &= ~HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED;
422 else
423 val |= HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED;
424
425 if ((encrypt_type != NONE || local->privacy_invoked) &&
426 (encrypt_type == OTHER || local->host_encrypt))
427 val |= HFA384X_WEPFLAGS_HOSTENCRYPT;
428 else
429 val &= ~HFA384X_WEPFLAGS_HOSTENCRYPT;
430 if ((encrypt_type != NONE || local->privacy_invoked) &&
431 (encrypt_type == OTHER || local->host_decrypt))
432 val |= HFA384X_WEPFLAGS_HOSTDECRYPT;
433 else
434 val &= ~HFA384X_WEPFLAGS_HOSTDECRYPT;
435
436 if (val != old_val &&
437 hostap_set_word(local->dev, HFA384X_RID_CNFWEPFLAGS, val)) {
438 printk(KERN_DEBUG "Could not write new WEP flags (0x%x)\n",
439 val);
440 goto fail;
441 }
442
443 if (encrypt_type != WEP)
444 return 0;
445
446 /* 104-bit support seems to require that all the keys are set to the
447 * same keylen */
448 keylen = 6; /* first 5 octets */
449 len = local->crypt[idx]->ops->get_key(keybuf, sizeof(keybuf),
450 NULL, local->crypt[idx]->priv);
451 if (idx >= 0 && idx < WEP_KEYS && len > 5)
452 keylen = WEP_KEY_LEN + 1; /* first 13 octets */
453
454 for (i = 0; i < WEP_KEYS; i++) {
455 memset(keybuf, 0, sizeof(keybuf));
456 if (local->crypt[i]) {
457 (void) local->crypt[i]->ops->get_key(
458 keybuf, sizeof(keybuf),
459 NULL, local->crypt[i]->priv);
460 }
461 if (local->func->set_rid(local->dev,
462 HFA384X_RID_CNFDEFAULTKEY0 + i,
463 keybuf, keylen)) {
464 printk(KERN_DEBUG "Could not set key %d (len=%d)\n",
465 i, keylen);
466 goto fail;
467 }
468 }
469 if (hostap_set_word(local->dev, HFA384X_RID_CNFWEPDEFAULTKEYID, idx)) {
470 printk(KERN_DEBUG "Could not set default keyid %d\n", idx);
471 goto fail;
472 }
473
474 return 0;
475
476 fail:
477 printk(KERN_DEBUG "%s: encryption setup failed\n", local->dev->name);
478 return -1;
479}
480
481
482int hostap_set_antsel(local_info_t *local)
483{
484 u16 val;
485 int ret = 0;
486
487 if (local->antsel_tx != HOSTAP_ANTSEL_DO_NOT_TOUCH &&
488 local->func->cmd(local->dev, HFA384X_CMDCODE_READMIF,
489 HFA386X_CR_TX_CONFIGURE,
490 NULL, &val) == 0) {
491 val &= ~(BIT(2) | BIT(1));
492 switch (local->antsel_tx) {
493 case HOSTAP_ANTSEL_DIVERSITY:
494 val |= BIT(1);
495 break;
496 case HOSTAP_ANTSEL_LOW:
497 break;
498 case HOSTAP_ANTSEL_HIGH:
499 val |= BIT(2);
500 break;
501 }
502
503 if (local->func->cmd(local->dev, HFA384X_CMDCODE_WRITEMIF,
504 HFA386X_CR_TX_CONFIGURE, &val, NULL)) {
505 printk(KERN_INFO "%s: setting TX AntSel failed\n",
506 local->dev->name);
507 ret = -1;
508 }
509 }
510
511 if (local->antsel_rx != HOSTAP_ANTSEL_DO_NOT_TOUCH &&
512 local->func->cmd(local->dev, HFA384X_CMDCODE_READMIF,
513 HFA386X_CR_RX_CONFIGURE,
514 NULL, &val) == 0) {
515 val &= ~(BIT(1) | BIT(0));
516 switch (local->antsel_rx) {
517 case HOSTAP_ANTSEL_DIVERSITY:
518 break;
519 case HOSTAP_ANTSEL_LOW:
520 val |= BIT(0);
521 break;
522 case HOSTAP_ANTSEL_HIGH:
523 val |= BIT(0) | BIT(1);
524 break;
525 }
526
527 if (local->func->cmd(local->dev, HFA384X_CMDCODE_WRITEMIF,
528 HFA386X_CR_RX_CONFIGURE, &val, NULL)) {
529 printk(KERN_INFO "%s: setting RX AntSel failed\n",
530 local->dev->name);
531 ret = -1;
532 }
533 }
534
535 return ret;
536}
537
538
539int hostap_set_roaming(local_info_t *local)
540{
541 u16 val;
542
543 switch (local->host_roaming) {
544 case 1:
545 val = HFA384X_ROAMING_HOST;
546 break;
547 case 2:
548 val = HFA384X_ROAMING_DISABLED;
549 break;
550 case 0:
551 default:
552 val = HFA384X_ROAMING_FIRMWARE;
553 break;
554 }
555
556 return hostap_set_word(local->dev, HFA384X_RID_CNFROAMINGMODE, val);
557}
558
559
560int hostap_set_auth_algs(local_info_t *local)
561{
562 int val = local->auth_algs;
563 /* At least STA f/w v0.6.2 seems to have issues with cnfAuthentication
564 * set to include both Open and Shared Key flags. It tries to use
565 * Shared Key authentication in that case even if WEP keys are not
566 * configured.. STA f/w v0.7.6 is able to handle such configuration,
567 * but it is unknown when this was fixed between 0.6.2 .. 0.7.6. */
568 if (local->sta_fw_ver < PRISM2_FW_VER(0,7,0) &&
569 val != PRISM2_AUTH_OPEN && val != PRISM2_AUTH_SHARED_KEY)
570 val = PRISM2_AUTH_OPEN;
571
572 if (hostap_set_word(local->dev, HFA384X_RID_CNFAUTHENTICATION, val)) {
573 printk(KERN_INFO "%s: cnfAuthentication setting to 0x%x "
574 "failed\n", local->dev->name, local->auth_algs);
575 return -EINVAL;
576 }
577
578 return 0;
579}
580
581
582void hostap_dump_rx_header(const char *name, const struct hfa384x_rx_frame *rx)
583{
584 u16 status, fc;
585
586 status = __le16_to_cpu(rx->status);
587
588 printk(KERN_DEBUG "%s: RX status=0x%04x (port=%d, type=%d, "
589 "fcserr=%d) silence=%d signal=%d rate=%d rxflow=%d; "
590 "jiffies=%ld\n",
591 name, status, (status >> 8) & 0x07, status >> 13, status & 1,
592 rx->silence, rx->signal, rx->rate, rx->rxflow, jiffies);
593
594 fc = __le16_to_cpu(rx->frame_control);
595 printk(KERN_DEBUG " FC=0x%04x (type=%d:%d) dur=0x%04x seq=0x%04x "
596 "data_len=%d%s%s\n",
597 fc, WLAN_FC_GET_TYPE(fc) >> 2, WLAN_FC_GET_STYPE(fc) >> 4,
598 __le16_to_cpu(rx->duration_id), __le16_to_cpu(rx->seq_ctrl),
599 __le16_to_cpu(rx->data_len),
600 fc & IEEE80211_FCTL_TODS ? " [ToDS]" : "",
601 fc & IEEE80211_FCTL_FROMDS ? " [FromDS]" : "");
602
603 printk(KERN_DEBUG " A1=" MACSTR " A2=" MACSTR " A3=" MACSTR " A4="
604 MACSTR "\n",
605 MAC2STR(rx->addr1), MAC2STR(rx->addr2), MAC2STR(rx->addr3),
606 MAC2STR(rx->addr4));
607
608 printk(KERN_DEBUG " dst=" MACSTR " src=" MACSTR " len=%d\n",
609 MAC2STR(rx->dst_addr), MAC2STR(rx->src_addr),
610 __be16_to_cpu(rx->len));
611}
612
613
614void hostap_dump_tx_header(const char *name, const struct hfa384x_tx_frame *tx)
615{
616 u16 fc;
617
618 printk(KERN_DEBUG "%s: TX status=0x%04x retry_count=%d tx_rate=%d "
619 "tx_control=0x%04x; jiffies=%ld\n",
620 name, __le16_to_cpu(tx->status), tx->retry_count, tx->tx_rate,
621 __le16_to_cpu(tx->tx_control), jiffies);
622
623 fc = __le16_to_cpu(tx->frame_control);
624 printk(KERN_DEBUG " FC=0x%04x (type=%d:%d) dur=0x%04x seq=0x%04x "
625 "data_len=%d%s%s\n",
626 fc, WLAN_FC_GET_TYPE(fc) >> 2, WLAN_FC_GET_STYPE(fc) >> 4,
627 __le16_to_cpu(tx->duration_id), __le16_to_cpu(tx->seq_ctrl),
628 __le16_to_cpu(tx->data_len),
629 fc & IEEE80211_FCTL_TODS ? " [ToDS]" : "",
630 fc & IEEE80211_FCTL_FROMDS ? " [FromDS]" : "");
631
632 printk(KERN_DEBUG " A1=" MACSTR " A2=" MACSTR " A3=" MACSTR " A4="
633 MACSTR "\n",
634 MAC2STR(tx->addr1), MAC2STR(tx->addr2), MAC2STR(tx->addr3),
635 MAC2STR(tx->addr4));
636
637 printk(KERN_DEBUG " dst=" MACSTR " src=" MACSTR " len=%d\n",
638 MAC2STR(tx->dst_addr), MAC2STR(tx->src_addr),
639 __be16_to_cpu(tx->len));
640}
641
642
643int hostap_80211_header_parse(struct sk_buff *skb, unsigned char *haddr)
644{
645 memcpy(haddr, skb->mac.raw + 10, ETH_ALEN); /* addr2 */
646 return ETH_ALEN;
647}
648
649
650int hostap_80211_prism_header_parse(struct sk_buff *skb, unsigned char *haddr)
651{
652 if (*(u32 *)skb->mac.raw == LWNG_CAP_DID_BASE) {
653 memcpy(haddr, skb->mac.raw +
654 sizeof(struct linux_wlan_ng_prism_hdr) + 10,
655 ETH_ALEN); /* addr2 */
656 } else { /* (*(u32 *)skb->mac.raw == htonl(LWNG_CAPHDR_VERSION)) */
657 memcpy(haddr, skb->mac.raw +
658 sizeof(struct linux_wlan_ng_cap_hdr) + 10,
659 ETH_ALEN); /* addr2 */
660 }
661 return ETH_ALEN;
662}
663
664
665int hostap_80211_get_hdrlen(u16 fc)
666{
667 int hdrlen = 24;
668
669 switch (WLAN_FC_GET_TYPE(fc)) {
670 case IEEE80211_FTYPE_DATA:
671 if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
672 hdrlen = 30; /* Addr4 */
673 break;
674 case IEEE80211_FTYPE_CTL:
675 switch (WLAN_FC_GET_STYPE(fc)) {
676 case IEEE80211_STYPE_CTS:
677 case IEEE80211_STYPE_ACK:
678 hdrlen = 10;
679 break;
680 default:
681 hdrlen = 16;
682 break;
683 }
684 break;
685 }
686
687 return hdrlen;
688}
689
690
691struct net_device_stats *hostap_get_stats(struct net_device *dev)
692{
693 struct hostap_interface *iface;
694 iface = netdev_priv(dev);
695 return &iface->stats;
696}
697
698
699static int prism2_close(struct net_device *dev)
700{
701 struct hostap_interface *iface;
702 local_info_t *local;
703
704 PDEBUG(DEBUG_FLOW, "%s: prism2_close\n", dev->name);
705
706 iface = netdev_priv(dev);
707 local = iface->local;
708
709 if (dev == local->ddev) {
710 prism2_sta_deauth(local, WLAN_REASON_DEAUTH_LEAVING);
711 }
712#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
713 if (!local->hostapd && dev == local->dev &&
714 (!local->func->card_present || local->func->card_present(local)) &&
715 local->hw_ready && local->ap && local->iw_mode == IW_MODE_MASTER)
716 hostap_deauth_all_stas(dev, local->ap, 1);
717#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
718
719 if (local->func->dev_close && local->func->dev_close(local))
720 return 0;
721
722 if (dev == local->dev) {
723 local->func->hw_shutdown(dev, HOSTAP_HW_ENABLE_CMDCOMPL);
724 }
725
726 if (netif_running(dev)) {
727 netif_stop_queue(dev);
728 netif_device_detach(dev);
729 }
730
731 flush_scheduled_work();
732
733 module_put(local->hw_module);
734
735 local->num_dev_open--;
736
737 if (dev != local->dev && local->dev->flags & IFF_UP &&
738 local->master_dev_auto_open && local->num_dev_open == 1) {
739 /* Close master radio interface automatically if it was also
740 * opened automatically and we are now closing the last
741 * remaining non-master device. */
742 dev_close(local->dev);
743 }
744
745 return 0;
746}
747
748
749static int prism2_open(struct net_device *dev)
750{
751 struct hostap_interface *iface;
752 local_info_t *local;
753
754 PDEBUG(DEBUG_FLOW, "%s: prism2_open\n", dev->name);
755
756 iface = netdev_priv(dev);
757 local = iface->local;
758
759 if (local->no_pri) {
760 printk(KERN_DEBUG "%s: could not set interface UP - no PRI "
761 "f/w\n", dev->name);
762 return 1;
763 }
764
765 if ((local->func->card_present && !local->func->card_present(local)) ||
766 local->hw_downloading)
767 return -ENODEV;
768
769 if (local->func->dev_open && local->func->dev_open(local))
770 return 1;
771
772 if (!try_module_get(local->hw_module))
773 return -ENODEV;
774 local->num_dev_open++;
775
776 if (!local->dev_enabled && local->func->hw_enable(dev, 1)) {
777 printk(KERN_WARNING "%s: could not enable MAC port\n",
778 dev->name);
779 prism2_close(dev);
780 return 1;
781 }
782 if (!local->dev_enabled)
783 prism2_callback(local, PRISM2_CALLBACK_ENABLE);
784 local->dev_enabled = 1;
785
786 if (dev != local->dev && !(local->dev->flags & IFF_UP)) {
787 /* Master radio interface is needed for all operation, so open
788 * it automatically when any virtual net_device is opened. */
789 local->master_dev_auto_open = 1;
790 dev_open(local->dev);
791 }
792
793 netif_device_attach(dev);
794 netif_start_queue(dev);
795
796 return 0;
797}
798
799
800static int prism2_set_mac_address(struct net_device *dev, void *p)
801{
802 struct hostap_interface *iface;
803 local_info_t *local;
804 struct list_head *ptr;
805 struct sockaddr *addr = p;
806
807 iface = netdev_priv(dev);
808 local = iface->local;
809
810 if (local->func->set_rid(dev, HFA384X_RID_CNFOWNMACADDR, addr->sa_data,
811 ETH_ALEN) < 0 || local->func->reset_port(dev))
812 return -EINVAL;
813
814 read_lock_bh(&local->iface_lock);
815 list_for_each(ptr, &local->hostap_interfaces) {
816 iface = list_entry(ptr, struct hostap_interface, list);
817 memcpy(iface->dev->dev_addr, addr->sa_data, ETH_ALEN);
818 }
819 memcpy(local->dev->dev_addr, addr->sa_data, ETH_ALEN);
820 read_unlock_bh(&local->iface_lock);
821
822 return 0;
823}
824
825
826/* TODO: to be further implemented as soon as Prism2 fully supports
827 * GroupAddresses and correct documentation is available */
828void hostap_set_multicast_list_queue(void *data)
829{
830 struct net_device *dev = (struct net_device *) data;
831 struct hostap_interface *iface;
832 local_info_t *local;
833
834 iface = netdev_priv(dev);
835 local = iface->local;
836 if (hostap_set_word(dev, HFA384X_RID_PROMISCUOUSMODE,
837 local->is_promisc)) {
838 printk(KERN_INFO "%s: %sabling promiscuous mode failed\n",
839 dev->name, local->is_promisc ? "en" : "dis");
840 }
841}
842
843
844static void hostap_set_multicast_list(struct net_device *dev)
845{
846#if 0
847 /* FIX: promiscuous mode seems to be causing a lot of problems with
848 * some station firmware versions (FCSErr frames, invalid MACPort, etc.
849 * corrupted incoming frames). This code is now commented out while the
850 * problems are investigated. */
851 struct hostap_interface *iface;
852 local_info_t *local;
853
854 iface = netdev_priv(dev);
855 local = iface->local;
856 if ((dev->flags & IFF_ALLMULTI) || (dev->flags & IFF_PROMISC)) {
857 local->is_promisc = 1;
858 } else {
859 local->is_promisc = 0;
860 }
861
862 schedule_work(&local->set_multicast_list_queue);
863#endif
864}
865
866
867static int prism2_change_mtu(struct net_device *dev, int new_mtu)
868{
869 if (new_mtu < PRISM2_MIN_MTU || new_mtu > PRISM2_MAX_MTU)
870 return -EINVAL;
871
872 dev->mtu = new_mtu;
873 return 0;
874}
875
876
877static void prism2_tx_timeout(struct net_device *dev)
878{
879 struct hostap_interface *iface;
880 local_info_t *local;
881 struct hfa384x_regs regs;
882
883 iface = netdev_priv(dev);
884 local = iface->local;
885
886 printk(KERN_WARNING "%s Tx timed out! Resetting card\n", dev->name);
887 netif_stop_queue(local->dev);
888
889 local->func->read_regs(dev, &regs);
890 printk(KERN_DEBUG "%s: CMD=%04x EVSTAT=%04x "
891 "OFFSET0=%04x OFFSET1=%04x SWSUPPORT0=%04x\n",
892 dev->name, regs.cmd, regs.evstat, regs.offset0, regs.offset1,
893 regs.swsupport0);
894
895 local->func->schedule_reset(local);
896}
897
898
899void hostap_setup_dev(struct net_device *dev, local_info_t *local,
900 int main_dev)
901{
902 struct hostap_interface *iface;
903
904 iface = netdev_priv(dev);
905 ether_setup(dev);
906
907 /* kernel callbacks */
908 dev->get_stats = hostap_get_stats;
909 if (iface) {
910 /* Currently, we point to the proper spy_data only on
911 * the main_dev. This could be fixed. Jean II */
912 iface->wireless_data.spy_data = &iface->spy_data;
913 dev->wireless_data = &iface->wireless_data;
914 }
915 dev->wireless_handlers =
916 (struct iw_handler_def *) &hostap_iw_handler_def;
917 dev->do_ioctl = hostap_ioctl;
918 dev->open = prism2_open;
919 dev->stop = prism2_close;
920 dev->hard_start_xmit = hostap_data_start_xmit;
921 dev->set_mac_address = prism2_set_mac_address;
922 dev->set_multicast_list = hostap_set_multicast_list;
923 dev->change_mtu = prism2_change_mtu;
924 dev->tx_timeout = prism2_tx_timeout;
925 dev->watchdog_timeo = TX_TIMEOUT;
926
927 dev->mtu = local->mtu;
928 if (!main_dev) {
929 /* use main radio device queue */
930 dev->tx_queue_len = 0;
931 }
932
933 SET_ETHTOOL_OPS(dev, &prism2_ethtool_ops);
934
935 netif_stop_queue(dev);
936}
937
938
939static int hostap_enable_hostapd(local_info_t *local, int rtnl_locked)
940{
941 struct net_device *dev = local->dev;
942
943 if (local->apdev)
944 return -EEXIST;
945
946 printk(KERN_DEBUG "%s: enabling hostapd mode\n", dev->name);
947
948 local->apdev = hostap_add_interface(local, HOSTAP_INTERFACE_AP,
949 rtnl_locked, local->ddev->name,
950 "ap");
951 if (local->apdev == NULL)
952 return -ENOMEM;
953
954 local->apdev->hard_start_xmit = hostap_mgmt_start_xmit;
955 local->apdev->type = ARPHRD_IEEE80211;
956 local->apdev->hard_header_parse = hostap_80211_header_parse;
957
958 return 0;
959}
960
961
962static int hostap_disable_hostapd(local_info_t *local, int rtnl_locked)
963{
964 struct net_device *dev = local->dev;
965
966 printk(KERN_DEBUG "%s: disabling hostapd mode\n", dev->name);
967
968 hostap_remove_interface(local->apdev, rtnl_locked, 1);
969 local->apdev = NULL;
970
971 return 0;
972}
973
974
975static int hostap_enable_hostapd_sta(local_info_t *local, int rtnl_locked)
976{
977 struct net_device *dev = local->dev;
978
979 if (local->stadev)
980 return -EEXIST;
981
982 printk(KERN_DEBUG "%s: enabling hostapd STA mode\n", dev->name);
983
984 local->stadev = hostap_add_interface(local, HOSTAP_INTERFACE_STA,
985 rtnl_locked, local->ddev->name,
986 "sta");
987 if (local->stadev == NULL)
988 return -ENOMEM;
989
990 return 0;
991}
992
993
994static int hostap_disable_hostapd_sta(local_info_t *local, int rtnl_locked)
995{
996 struct net_device *dev = local->dev;
997
998 printk(KERN_DEBUG "%s: disabling hostapd mode\n", dev->name);
999
1000 hostap_remove_interface(local->stadev, rtnl_locked, 1);
1001 local->stadev = NULL;
1002
1003 return 0;
1004}
1005
1006
1007int hostap_set_hostapd(local_info_t *local, int val, int rtnl_locked)
1008{
1009 int ret;
1010
1011 if (val < 0 || val > 1)
1012 return -EINVAL;
1013
1014 if (local->hostapd == val)
1015 return 0;
1016
1017 if (val) {
1018 ret = hostap_enable_hostapd(local, rtnl_locked);
1019 if (ret == 0)
1020 local->hostapd = 1;
1021 } else {
1022 local->hostapd = 0;
1023 ret = hostap_disable_hostapd(local, rtnl_locked);
1024 if (ret != 0)
1025 local->hostapd = 1;
1026 }
1027
1028 return ret;
1029}
1030
1031
1032int hostap_set_hostapd_sta(local_info_t *local, int val, int rtnl_locked)
1033{
1034 int ret;
1035
1036 if (val < 0 || val > 1)
1037 return -EINVAL;
1038
1039 if (local->hostapd_sta == val)
1040 return 0;
1041
1042 if (val) {
1043 ret = hostap_enable_hostapd_sta(local, rtnl_locked);
1044 if (ret == 0)
1045 local->hostapd_sta = 1;
1046 } else {
1047 local->hostapd_sta = 0;
1048 ret = hostap_disable_hostapd_sta(local, rtnl_locked);
1049 if (ret != 0)
1050 local->hostapd_sta = 1;
1051 }
1052
1053
1054 return ret;
1055}
1056
1057
1058int prism2_update_comms_qual(struct net_device *dev)
1059{
1060 struct hostap_interface *iface;
1061 local_info_t *local;
1062 int ret = 0;
1063 struct hfa384x_comms_quality sq;
1064
1065 iface = netdev_priv(dev);
1066 local = iface->local;
1067 if (!local->sta_fw_ver)
1068 ret = -1;
1069 else if (local->sta_fw_ver >= PRISM2_FW_VER(1,3,1)) {
1070 if (local->func->get_rid(local->dev,
1071 HFA384X_RID_DBMCOMMSQUALITY,
1072 &sq, sizeof(sq), 1) >= 0) {
1073 local->comms_qual = (s16) le16_to_cpu(sq.comm_qual);
1074 local->avg_signal = (s16) le16_to_cpu(sq.signal_level);
1075 local->avg_noise = (s16) le16_to_cpu(sq.noise_level);
1076 local->last_comms_qual_update = jiffies;
1077 } else
1078 ret = -1;
1079 } else {
1080 if (local->func->get_rid(local->dev, HFA384X_RID_COMMSQUALITY,
1081 &sq, sizeof(sq), 1) >= 0) {
1082 local->comms_qual = le16_to_cpu(sq.comm_qual);
1083 local->avg_signal = HFA384X_LEVEL_TO_dBm(
1084 le16_to_cpu(sq.signal_level));
1085 local->avg_noise = HFA384X_LEVEL_TO_dBm(
1086 le16_to_cpu(sq.noise_level));
1087 local->last_comms_qual_update = jiffies;
1088 } else
1089 ret = -1;
1090 }
1091
1092 return ret;
1093}
1094
1095
1096int prism2_sta_send_mgmt(local_info_t *local, u8 *dst, u16 stype,
1097 u8 *body, size_t bodylen)
1098{
1099 struct sk_buff *skb;
1100 struct hostap_ieee80211_mgmt *mgmt;
1101 struct hostap_skb_tx_data *meta;
1102 struct net_device *dev = local->dev;
1103
1104 skb = dev_alloc_skb(IEEE80211_MGMT_HDR_LEN + bodylen);
1105 if (skb == NULL)
1106 return -ENOMEM;
1107
1108 mgmt = (struct hostap_ieee80211_mgmt *)
1109 skb_put(skb, IEEE80211_MGMT_HDR_LEN);
1110 memset(mgmt, 0, IEEE80211_MGMT_HDR_LEN);
1111 mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | stype);
1112 memcpy(mgmt->da, dst, ETH_ALEN);
1113 memcpy(mgmt->sa, dev->dev_addr, ETH_ALEN);
1114 memcpy(mgmt->bssid, dst, ETH_ALEN);
1115 if (body)
1116 memcpy(skb_put(skb, bodylen), body, bodylen);
1117
1118 meta = (struct hostap_skb_tx_data *) skb->cb;
1119 memset(meta, 0, sizeof(*meta));
1120 meta->magic = HOSTAP_SKB_TX_DATA_MAGIC;
1121 meta->iface = netdev_priv(dev);
1122
1123 skb->dev = dev;
1124 skb->mac.raw = skb->nh.raw = skb->data;
1125 dev_queue_xmit(skb);
1126
1127 return 0;
1128}
1129
1130
1131int prism2_sta_deauth(local_info_t *local, u16 reason)
1132{
1133 union iwreq_data wrqu;
1134 int ret;
1135
1136 if (local->iw_mode != IW_MODE_INFRA ||
1137 memcmp(local->bssid, "\x00\x00\x00\x00\x00\x00", ETH_ALEN) == 0 ||
1138 memcmp(local->bssid, "\x44\x44\x44\x44\x44\x44", ETH_ALEN) == 0)
1139 return 0;
1140
1141 reason = cpu_to_le16(reason);
1142 ret = prism2_sta_send_mgmt(local, local->bssid, IEEE80211_STYPE_DEAUTH,
1143 (u8 *) &reason, 2);
1144 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
1145 wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL);
1146 return ret;
1147}
1148
1149
1150struct proc_dir_entry *hostap_proc;
1151
1152static int __init hostap_init(void)
1153{
1154 if (proc_net != NULL) {
1155 hostap_proc = proc_mkdir("hostap", proc_net);
1156 if (!hostap_proc)
1157 printk(KERN_WARNING "Failed to mkdir "
1158 "/proc/net/hostap\n");
1159 } else
1160 hostap_proc = NULL;
1161
1162 return 0;
1163}
1164
1165
1166static void __exit hostap_exit(void)
1167{
1168 if (hostap_proc != NULL) {
1169 hostap_proc = NULL;
1170 remove_proc_entry("hostap", proc_net);
1171 }
1172}
1173
1174
1175EXPORT_SYMBOL(hostap_set_word);
1176EXPORT_SYMBOL(hostap_set_string);
1177EXPORT_SYMBOL(hostap_get_porttype);
1178EXPORT_SYMBOL(hostap_set_encryption);
1179EXPORT_SYMBOL(hostap_set_antsel);
1180EXPORT_SYMBOL(hostap_set_roaming);
1181EXPORT_SYMBOL(hostap_set_auth_algs);
1182EXPORT_SYMBOL(hostap_dump_rx_header);
1183EXPORT_SYMBOL(hostap_dump_tx_header);
1184EXPORT_SYMBOL(hostap_80211_header_parse);
1185EXPORT_SYMBOL(hostap_80211_prism_header_parse);
1186EXPORT_SYMBOL(hostap_80211_get_hdrlen);
1187EXPORT_SYMBOL(hostap_get_stats);
1188EXPORT_SYMBOL(hostap_setup_dev);
1189EXPORT_SYMBOL(hostap_proc);
1190EXPORT_SYMBOL(hostap_set_multicast_list_queue);
1191EXPORT_SYMBOL(hostap_set_hostapd);
1192EXPORT_SYMBOL(hostap_set_hostapd_sta);
1193EXPORT_SYMBOL(hostap_add_interface);
1194EXPORT_SYMBOL(hostap_remove_interface);
1195EXPORT_SYMBOL(prism2_update_comms_qual);
1196
1197module_init(hostap_init);
1198module_exit(hostap_exit);
diff --git a/drivers/net/wireless/hostap/hostap.h b/drivers/net/wireless/hostap/hostap.h
new file mode 100644
index 000000000000..5fac89b8ce3a
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap.h
@@ -0,0 +1,57 @@
1#ifndef HOSTAP_H
2#define HOSTAP_H
3
4/* hostap.c */
5
6extern struct proc_dir_entry *hostap_proc;
7
8u16 hostap_tx_callback_register(local_info_t *local,
9 void (*func)(struct sk_buff *, int ok, void *),
10 void *data);
11int hostap_tx_callback_unregister(local_info_t *local, u16 idx);
12int hostap_set_word(struct net_device *dev, int rid, u16 val);
13int hostap_set_string(struct net_device *dev, int rid, const char *val);
14u16 hostap_get_porttype(local_info_t *local);
15int hostap_set_encryption(local_info_t *local);
16int hostap_set_antsel(local_info_t *local);
17int hostap_set_roaming(local_info_t *local);
18int hostap_set_auth_algs(local_info_t *local);
19void hostap_dump_rx_header(const char *name,
20 const struct hfa384x_rx_frame *rx);
21void hostap_dump_tx_header(const char *name,
22 const struct hfa384x_tx_frame *tx);
23int hostap_80211_header_parse(struct sk_buff *skb, unsigned char *haddr);
24int hostap_80211_prism_header_parse(struct sk_buff *skb, unsigned char *haddr);
25int hostap_80211_get_hdrlen(u16 fc);
26struct net_device_stats *hostap_get_stats(struct net_device *dev);
27void hostap_setup_dev(struct net_device *dev, local_info_t *local,
28 int main_dev);
29void hostap_set_multicast_list_queue(void *data);
30int hostap_set_hostapd(local_info_t *local, int val, int rtnl_locked);
31int hostap_set_hostapd_sta(local_info_t *local, int val, int rtnl_locked);
32void hostap_cleanup(local_info_t *local);
33void hostap_cleanup_handler(void *data);
34struct net_device * hostap_add_interface(struct local_info *local,
35 int type, int rtnl_locked,
36 const char *prefix, const char *name);
37void hostap_remove_interface(struct net_device *dev, int rtnl_locked,
38 int remove_from_list);
39int prism2_update_comms_qual(struct net_device *dev);
40int prism2_sta_send_mgmt(local_info_t *local, u8 *dst, u16 stype,
41 u8 *body, size_t bodylen);
42int prism2_sta_deauth(local_info_t *local, u16 reason);
43
44
45/* hostap_proc.c */
46
47void hostap_init_proc(local_info_t *local);
48void hostap_remove_proc(local_info_t *local);
49
50
51/* hostap_info.c */
52
53void hostap_info_init(local_info_t *local);
54void hostap_info_process(local_info_t *local, struct sk_buff *skb);
55
56
57#endif /* HOSTAP_H */
diff --git a/drivers/net/wireless/hostap/hostap_80211.h b/drivers/net/wireless/hostap/hostap_80211.h
new file mode 100644
index 000000000000..bf506f50d722
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_80211.h
@@ -0,0 +1,96 @@
1#ifndef HOSTAP_80211_H
2#define HOSTAP_80211_H
3
4struct hostap_ieee80211_mgmt {
5 u16 frame_control;
6 u16 duration;
7 u8 da[6];
8 u8 sa[6];
9 u8 bssid[6];
10 u16 seq_ctrl;
11 union {
12 struct {
13 u16 auth_alg;
14 u16 auth_transaction;
15 u16 status_code;
16 /* possibly followed by Challenge text */
17 u8 variable[0];
18 } __attribute__ ((packed)) auth;
19 struct {
20 u16 reason_code;
21 } __attribute__ ((packed)) deauth;
22 struct {
23 u16 capab_info;
24 u16 listen_interval;
25 /* followed by SSID and Supported rates */
26 u8 variable[0];
27 } __attribute__ ((packed)) assoc_req;
28 struct {
29 u16 capab_info;
30 u16 status_code;
31 u16 aid;
32 /* followed by Supported rates */
33 u8 variable[0];
34 } __attribute__ ((packed)) assoc_resp, reassoc_resp;
35 struct {
36 u16 capab_info;
37 u16 listen_interval;
38 u8 current_ap[6];
39 /* followed by SSID and Supported rates */
40 u8 variable[0];
41 } __attribute__ ((packed)) reassoc_req;
42 struct {
43 u16 reason_code;
44 } __attribute__ ((packed)) disassoc;
45 struct {
46 } __attribute__ ((packed)) probe_req;
47 struct {
48 u8 timestamp[8];
49 u16 beacon_int;
50 u16 capab_info;
51 /* followed by some of SSID, Supported rates,
52 * FH Params, DS Params, CF Params, IBSS Params, TIM */
53 u8 variable[0];
54 } __attribute__ ((packed)) beacon, probe_resp;
55 } u;
56} __attribute__ ((packed));
57
58
59#define IEEE80211_MGMT_HDR_LEN 24
60#define IEEE80211_DATA_HDR3_LEN 24
61#define IEEE80211_DATA_HDR4_LEN 30
62
63
64struct hostap_80211_rx_status {
65 u32 mac_time;
66 u8 signal;
67 u8 noise;
68 u16 rate; /* in 100 kbps */
69};
70
71
72void hostap_80211_rx(struct net_device *dev, struct sk_buff *skb,
73 struct hostap_80211_rx_status *rx_stats);
74
75
76/* prism2_rx_80211 'type' argument */
77enum {
78 PRISM2_RX_MONITOR, PRISM2_RX_MGMT, PRISM2_RX_NON_ASSOC,
79 PRISM2_RX_NULLFUNC_ACK
80};
81
82int prism2_rx_80211(struct net_device *dev, struct sk_buff *skb,
83 struct hostap_80211_rx_status *rx_stats, int type);
84void hostap_80211_rx(struct net_device *dev, struct sk_buff *skb,
85 struct hostap_80211_rx_status *rx_stats);
86void hostap_dump_rx_80211(const char *name, struct sk_buff *skb,
87 struct hostap_80211_rx_status *rx_stats);
88
89void hostap_dump_tx_80211(const char *name, struct sk_buff *skb);
90int hostap_data_start_xmit(struct sk_buff *skb, struct net_device *dev);
91int hostap_mgmt_start_xmit(struct sk_buff *skb, struct net_device *dev);
92struct sk_buff * hostap_tx_encrypt(struct sk_buff *skb,
93 struct ieee80211_crypt_data *crypt);
94int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev);
95
96#endif /* HOSTAP_80211_H */
diff --git a/drivers/net/wireless/hostap/hostap_80211_rx.c b/drivers/net/wireless/hostap/hostap_80211_rx.c
new file mode 100644
index 000000000000..b0501243b175
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_80211_rx.c
@@ -0,0 +1,1091 @@
1#include <linux/etherdevice.h>
2
3#include "hostap_80211.h"
4#include "hostap.h"
5
6void hostap_dump_rx_80211(const char *name, struct sk_buff *skb,
7 struct hostap_80211_rx_status *rx_stats)
8{
9 struct ieee80211_hdr *hdr;
10 u16 fc;
11
12 hdr = (struct ieee80211_hdr *) skb->data;
13
14 printk(KERN_DEBUG "%s: RX signal=%d noise=%d rate=%d len=%d "
15 "jiffies=%ld\n",
16 name, rx_stats->signal, rx_stats->noise, rx_stats->rate,
17 skb->len, jiffies);
18
19 if (skb->len < 2)
20 return;
21
22 fc = le16_to_cpu(hdr->frame_ctl);
23 printk(KERN_DEBUG " FC=0x%04x (type=%d:%d)%s%s",
24 fc, WLAN_FC_GET_TYPE(fc) >> 2, WLAN_FC_GET_STYPE(fc) >> 4,
25 fc & IEEE80211_FCTL_TODS ? " [ToDS]" : "",
26 fc & IEEE80211_FCTL_FROMDS ? " [FromDS]" : "");
27
28 if (skb->len < IEEE80211_DATA_HDR3_LEN) {
29 printk("\n");
30 return;
31 }
32
33 printk(" dur=0x%04x seq=0x%04x\n", le16_to_cpu(hdr->duration_id),
34 le16_to_cpu(hdr->seq_ctl));
35
36 printk(KERN_DEBUG " A1=" MACSTR " A2=" MACSTR " A3=" MACSTR,
37 MAC2STR(hdr->addr1), MAC2STR(hdr->addr2), MAC2STR(hdr->addr3));
38 if (skb->len >= 30)
39 printk(" A4=" MACSTR, MAC2STR(hdr->addr4));
40 printk("\n");
41}
42
43
44/* Send RX frame to netif with 802.11 (and possible prism) header.
45 * Called from hardware or software IRQ context. */
46int prism2_rx_80211(struct net_device *dev, struct sk_buff *skb,
47 struct hostap_80211_rx_status *rx_stats, int type)
48{
49 struct hostap_interface *iface;
50 local_info_t *local;
51 int hdrlen, phdrlen, head_need, tail_need;
52 u16 fc;
53 int prism_header, ret;
54 struct ieee80211_hdr *hdr;
55
56 iface = netdev_priv(dev);
57 local = iface->local;
58 dev->last_rx = jiffies;
59
60 if (dev->type == ARPHRD_IEEE80211_PRISM) {
61 if (local->monitor_type == PRISM2_MONITOR_PRISM) {
62 prism_header = 1;
63 phdrlen = sizeof(struct linux_wlan_ng_prism_hdr);
64 } else { /* local->monitor_type == PRISM2_MONITOR_CAPHDR */
65 prism_header = 2;
66 phdrlen = sizeof(struct linux_wlan_ng_cap_hdr);
67 }
68 } else {
69 prism_header = 0;
70 phdrlen = 0;
71 }
72
73 hdr = (struct ieee80211_hdr *) skb->data;
74 fc = le16_to_cpu(hdr->frame_ctl);
75
76 if (type == PRISM2_RX_MGMT && (fc & IEEE80211_FCTL_VERS)) {
77 printk(KERN_DEBUG "%s: dropped management frame with header "
78 "version %d\n", dev->name, fc & IEEE80211_FCTL_VERS);
79 dev_kfree_skb_any(skb);
80 return 0;
81 }
82
83 hdrlen = hostap_80211_get_hdrlen(fc);
84
85 /* check if there is enough room for extra data; if not, expand skb
86 * buffer to be large enough for the changes */
87 head_need = phdrlen;
88 tail_need = 0;
89#ifdef PRISM2_ADD_BOGUS_CRC
90 tail_need += 4;
91#endif /* PRISM2_ADD_BOGUS_CRC */
92
93 head_need -= skb_headroom(skb);
94 tail_need -= skb_tailroom(skb);
95
96 if (head_need > 0 || tail_need > 0) {
97 if (pskb_expand_head(skb, head_need > 0 ? head_need : 0,
98 tail_need > 0 ? tail_need : 0,
99 GFP_ATOMIC)) {
100 printk(KERN_DEBUG "%s: prism2_rx_80211 failed to "
101 "reallocate skb buffer\n", dev->name);
102 dev_kfree_skb_any(skb);
103 return 0;
104 }
105 }
106
107 /* We now have an skb with enough head and tail room, so just insert
108 * the extra data */
109
110#ifdef PRISM2_ADD_BOGUS_CRC
111 memset(skb_put(skb, 4), 0xff, 4); /* Prism2 strips CRC */
112#endif /* PRISM2_ADD_BOGUS_CRC */
113
114 if (prism_header == 1) {
115 struct linux_wlan_ng_prism_hdr *hdr;
116 hdr = (struct linux_wlan_ng_prism_hdr *)
117 skb_push(skb, phdrlen);
118 memset(hdr, 0, phdrlen);
119 hdr->msgcode = LWNG_CAP_DID_BASE;
120 hdr->msglen = sizeof(*hdr);
121 memcpy(hdr->devname, dev->name, sizeof(hdr->devname));
122#define LWNG_SETVAL(f,i,s,l,d) \
123hdr->f.did = LWNG_CAP_DID_BASE | (i << 12); \
124hdr->f.status = s; hdr->f.len = l; hdr->f.data = d
125 LWNG_SETVAL(hosttime, 1, 0, 4, jiffies);
126 LWNG_SETVAL(mactime, 2, 0, 4, rx_stats->mac_time);
127 LWNG_SETVAL(channel, 3, 1 /* no value */, 4, 0);
128 LWNG_SETVAL(rssi, 4, 1 /* no value */, 4, 0);
129 LWNG_SETVAL(sq, 5, 1 /* no value */, 4, 0);
130 LWNG_SETVAL(signal, 6, 0, 4, rx_stats->signal);
131 LWNG_SETVAL(noise, 7, 0, 4, rx_stats->noise);
132 LWNG_SETVAL(rate, 8, 0, 4, rx_stats->rate / 5);
133 LWNG_SETVAL(istx, 9, 0, 4, 0);
134 LWNG_SETVAL(frmlen, 10, 0, 4, skb->len - phdrlen);
135#undef LWNG_SETVAL
136 } else if (prism_header == 2) {
137 struct linux_wlan_ng_cap_hdr *hdr;
138 hdr = (struct linux_wlan_ng_cap_hdr *)
139 skb_push(skb, phdrlen);
140 memset(hdr, 0, phdrlen);
141 hdr->version = htonl(LWNG_CAPHDR_VERSION);
142 hdr->length = htonl(phdrlen);
143 hdr->mactime = __cpu_to_be64(rx_stats->mac_time);
144 hdr->hosttime = __cpu_to_be64(jiffies);
145 hdr->phytype = htonl(4); /* dss_dot11_b */
146 hdr->channel = htonl(local->channel);
147 hdr->datarate = htonl(rx_stats->rate);
148 hdr->antenna = htonl(0); /* unknown */
149 hdr->priority = htonl(0); /* unknown */
150 hdr->ssi_type = htonl(3); /* raw */
151 hdr->ssi_signal = htonl(rx_stats->signal);
152 hdr->ssi_noise = htonl(rx_stats->noise);
153 hdr->preamble = htonl(0); /* unknown */
154 hdr->encoding = htonl(1); /* cck */
155 }
156
157 ret = skb->len - phdrlen;
158 skb->dev = dev;
159 skb->mac.raw = skb->data;
160 skb_pull(skb, hdrlen);
161 if (prism_header)
162 skb_pull(skb, phdrlen);
163 skb->pkt_type = PACKET_OTHERHOST;
164 skb->protocol = __constant_htons(ETH_P_802_2);
165 memset(skb->cb, 0, sizeof(skb->cb));
166 netif_rx(skb);
167
168 return ret;
169}
170
171
172/* Called only as a tasklet (software IRQ) */
173static void monitor_rx(struct net_device *dev, struct sk_buff *skb,
174 struct hostap_80211_rx_status *rx_stats)
175{
176 struct net_device_stats *stats;
177 int len;
178
179 len = prism2_rx_80211(dev, skb, rx_stats, PRISM2_RX_MONITOR);
180 stats = hostap_get_stats(dev);
181 stats->rx_packets++;
182 stats->rx_bytes += len;
183}
184
185
186/* Called only as a tasklet (software IRQ) */
187static struct prism2_frag_entry *
188prism2_frag_cache_find(local_info_t *local, unsigned int seq,
189 unsigned int frag, u8 *src, u8 *dst)
190{
191 struct prism2_frag_entry *entry;
192 int i;
193
194 for (i = 0; i < PRISM2_FRAG_CACHE_LEN; i++) {
195 entry = &local->frag_cache[i];
196 if (entry->skb != NULL &&
197 time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
198 printk(KERN_DEBUG "%s: expiring fragment cache entry "
199 "seq=%u last_frag=%u\n",
200 local->dev->name, entry->seq, entry->last_frag);
201 dev_kfree_skb(entry->skb);
202 entry->skb = NULL;
203 }
204
205 if (entry->skb != NULL && entry->seq == seq &&
206 (entry->last_frag + 1 == frag || frag == -1) &&
207 memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
208 memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
209 return entry;
210 }
211
212 return NULL;
213}
214
215
216/* Called only as a tasklet (software IRQ) */
217static struct sk_buff *
218prism2_frag_cache_get(local_info_t *local, struct ieee80211_hdr *hdr)
219{
220 struct sk_buff *skb = NULL;
221 u16 sc;
222 unsigned int frag, seq;
223 struct prism2_frag_entry *entry;
224
225 sc = le16_to_cpu(hdr->seq_ctl);
226 frag = WLAN_GET_SEQ_FRAG(sc);
227 seq = WLAN_GET_SEQ_SEQ(sc) >> 4;
228
229 if (frag == 0) {
230 /* Reserve enough space to fit maximum frame length */
231 skb = dev_alloc_skb(local->dev->mtu +
232 sizeof(struct ieee80211_hdr) +
233 8 /* LLC */ +
234 2 /* alignment */ +
235 8 /* WEP */ + ETH_ALEN /* WDS */);
236 if (skb == NULL)
237 return NULL;
238
239 entry = &local->frag_cache[local->frag_next_idx];
240 local->frag_next_idx++;
241 if (local->frag_next_idx >= PRISM2_FRAG_CACHE_LEN)
242 local->frag_next_idx = 0;
243
244 if (entry->skb != NULL)
245 dev_kfree_skb(entry->skb);
246
247 entry->first_frag_time = jiffies;
248 entry->seq = seq;
249 entry->last_frag = frag;
250 entry->skb = skb;
251 memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
252 memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
253 } else {
254 /* received a fragment of a frame for which the head fragment
255 * should have already been received */
256 entry = prism2_frag_cache_find(local, seq, frag, hdr->addr2,
257 hdr->addr1);
258 if (entry != NULL) {
259 entry->last_frag = frag;
260 skb = entry->skb;
261 }
262 }
263
264 return skb;
265}
266
267
268/* Called only as a tasklet (software IRQ) */
269static int prism2_frag_cache_invalidate(local_info_t *local,
270 struct ieee80211_hdr *hdr)
271{
272 u16 sc;
273 unsigned int seq;
274 struct prism2_frag_entry *entry;
275
276 sc = le16_to_cpu(hdr->seq_ctl);
277 seq = WLAN_GET_SEQ_SEQ(sc) >> 4;
278
279 entry = prism2_frag_cache_find(local, seq, -1, hdr->addr2, hdr->addr1);
280
281 if (entry == NULL) {
282 printk(KERN_DEBUG "%s: could not invalidate fragment cache "
283 "entry (seq=%u)\n",
284 local->dev->name, seq);
285 return -1;
286 }
287
288 entry->skb = NULL;
289 return 0;
290}
291
292
293static struct hostap_bss_info *__hostap_get_bss(local_info_t *local, u8 *bssid,
294 u8 *ssid, size_t ssid_len)
295{
296 struct list_head *ptr;
297 struct hostap_bss_info *bss;
298
299 list_for_each(ptr, &local->bss_list) {
300 bss = list_entry(ptr, struct hostap_bss_info, list);
301 if (memcmp(bss->bssid, bssid, ETH_ALEN) == 0 &&
302 (ssid == NULL ||
303 (ssid_len == bss->ssid_len &&
304 memcmp(ssid, bss->ssid, ssid_len) == 0))) {
305 list_move(&bss->list, &local->bss_list);
306 return bss;
307 }
308 }
309
310 return NULL;
311}
312
313
314static struct hostap_bss_info *__hostap_add_bss(local_info_t *local, u8 *bssid,
315 u8 *ssid, size_t ssid_len)
316{
317 struct hostap_bss_info *bss;
318
319 if (local->num_bss_info >= HOSTAP_MAX_BSS_COUNT) {
320 bss = list_entry(local->bss_list.prev,
321 struct hostap_bss_info, list);
322 list_del(&bss->list);
323 local->num_bss_info--;
324 } else {
325 bss = (struct hostap_bss_info *)
326 kmalloc(sizeof(*bss), GFP_ATOMIC);
327 if (bss == NULL)
328 return NULL;
329 }
330
331 memset(bss, 0, sizeof(*bss));
332 memcpy(bss->bssid, bssid, ETH_ALEN);
333 memcpy(bss->ssid, ssid, ssid_len);
334 bss->ssid_len = ssid_len;
335 local->num_bss_info++;
336 list_add(&bss->list, &local->bss_list);
337 return bss;
338}
339
340
341static void __hostap_expire_bss(local_info_t *local)
342{
343 struct hostap_bss_info *bss;
344
345 while (local->num_bss_info > 0) {
346 bss = list_entry(local->bss_list.prev,
347 struct hostap_bss_info, list);
348 if (!time_after(jiffies, bss->last_update + 60 * HZ))
349 break;
350
351 list_del(&bss->list);
352 local->num_bss_info--;
353 kfree(bss);
354 }
355}
356
357
358/* Both IEEE 802.11 Beacon and Probe Response frames have similar structure, so
359 * the same routine can be used to parse both of them. */
360static void hostap_rx_sta_beacon(local_info_t *local, struct sk_buff *skb,
361 int stype)
362{
363 struct hostap_ieee80211_mgmt *mgmt;
364 int left, chan = 0;
365 u8 *pos;
366 u8 *ssid = NULL, *wpa = NULL, *rsn = NULL;
367 size_t ssid_len = 0, wpa_len = 0, rsn_len = 0;
368 struct hostap_bss_info *bss;
369
370 if (skb->len < IEEE80211_MGMT_HDR_LEN + sizeof(mgmt->u.beacon))
371 return;
372
373 mgmt = (struct hostap_ieee80211_mgmt *) skb->data;
374 pos = mgmt->u.beacon.variable;
375 left = skb->len - (pos - skb->data);
376
377 while (left >= 2) {
378 if (2 + pos[1] > left)
379 return; /* parse failed */
380 switch (*pos) {
381 case WLAN_EID_SSID:
382 ssid = pos + 2;
383 ssid_len = pos[1];
384 break;
385 case WLAN_EID_GENERIC:
386 if (pos[1] >= 4 &&
387 pos[2] == 0x00 && pos[3] == 0x50 &&
388 pos[4] == 0xf2 && pos[5] == 1) {
389 wpa = pos;
390 wpa_len = pos[1] + 2;
391 }
392 break;
393 case WLAN_EID_RSN:
394 rsn = pos;
395 rsn_len = pos[1] + 2;
396 break;
397 case WLAN_EID_DS_PARAMS:
398 if (pos[1] >= 1)
399 chan = pos[2];
400 break;
401 }
402 left -= 2 + pos[1];
403 pos += 2 + pos[1];
404 }
405
406 if (wpa_len > MAX_WPA_IE_LEN)
407 wpa_len = MAX_WPA_IE_LEN;
408 if (rsn_len > MAX_WPA_IE_LEN)
409 rsn_len = MAX_WPA_IE_LEN;
410 if (ssid_len > sizeof(bss->ssid))
411 ssid_len = sizeof(bss->ssid);
412
413 spin_lock(&local->lock);
414 bss = __hostap_get_bss(local, mgmt->bssid, ssid, ssid_len);
415 if (bss == NULL)
416 bss = __hostap_add_bss(local, mgmt->bssid, ssid, ssid_len);
417 if (bss) {
418 bss->last_update = jiffies;
419 bss->count++;
420 bss->capab_info = le16_to_cpu(mgmt->u.beacon.capab_info);
421 if (wpa) {
422 memcpy(bss->wpa_ie, wpa, wpa_len);
423 bss->wpa_ie_len = wpa_len;
424 } else
425 bss->wpa_ie_len = 0;
426 if (rsn) {
427 memcpy(bss->rsn_ie, rsn, rsn_len);
428 bss->rsn_ie_len = rsn_len;
429 } else
430 bss->rsn_ie_len = 0;
431 bss->chan = chan;
432 }
433 __hostap_expire_bss(local);
434 spin_unlock(&local->lock);
435}
436
437
438static inline int
439hostap_rx_frame_mgmt(local_info_t *local, struct sk_buff *skb,
440 struct hostap_80211_rx_status *rx_stats, u16 type,
441 u16 stype)
442{
443 if (local->iw_mode == IW_MODE_MASTER) {
444 hostap_update_sta_ps(local, (struct ieee80211_hdr *)
445 skb->data);
446 }
447
448 if (local->hostapd && type == IEEE80211_FTYPE_MGMT) {
449 if (stype == IEEE80211_STYPE_BEACON &&
450 local->iw_mode == IW_MODE_MASTER) {
451 struct sk_buff *skb2;
452 /* Process beacon frames also in kernel driver to
453 * update STA(AP) table statistics */
454 skb2 = skb_clone(skb, GFP_ATOMIC);
455 if (skb2)
456 hostap_rx(skb2->dev, skb2, rx_stats);
457 }
458
459 /* send management frames to the user space daemon for
460 * processing */
461 local->apdevstats.rx_packets++;
462 local->apdevstats.rx_bytes += skb->len;
463 if (local->apdev == NULL)
464 return -1;
465 prism2_rx_80211(local->apdev, skb, rx_stats, PRISM2_RX_MGMT);
466 return 0;
467 }
468
469 if (local->iw_mode == IW_MODE_MASTER) {
470 if (type != IEEE80211_FTYPE_MGMT &&
471 type != IEEE80211_FTYPE_CTL) {
472 printk(KERN_DEBUG "%s: unknown management frame "
473 "(type=0x%02x, stype=0x%02x) dropped\n",
474 skb->dev->name, type >> 2, stype >> 4);
475 return -1;
476 }
477
478 hostap_rx(skb->dev, skb, rx_stats);
479 return 0;
480 } else if (type == IEEE80211_FTYPE_MGMT &&
481 (stype == IEEE80211_STYPE_BEACON ||
482 stype == IEEE80211_STYPE_PROBE_RESP)) {
483 hostap_rx_sta_beacon(local, skb, stype);
484 return -1;
485 } else if (type == IEEE80211_FTYPE_MGMT &&
486 (stype == IEEE80211_STYPE_ASSOC_RESP ||
487 stype == IEEE80211_STYPE_REASSOC_RESP)) {
488 /* Ignore (Re)AssocResp silently since these are not currently
489 * needed but are still received when WPA/RSN mode is enabled.
490 */
491 return -1;
492 } else {
493 printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: dropped unhandled"
494 " management frame in non-Host AP mode (type=%d:%d)\n",
495 skb->dev->name, type >> 2, stype >> 4);
496 return -1;
497 }
498}
499
500
501/* Called only as a tasklet (software IRQ) */
502static inline struct net_device *prism2_rx_get_wds(local_info_t *local,
503 u8 *addr)
504{
505 struct hostap_interface *iface = NULL;
506 struct list_head *ptr;
507
508 read_lock_bh(&local->iface_lock);
509 list_for_each(ptr, &local->hostap_interfaces) {
510 iface = list_entry(ptr, struct hostap_interface, list);
511 if (iface->type == HOSTAP_INTERFACE_WDS &&
512 memcmp(iface->u.wds.remote_addr, addr, ETH_ALEN) == 0)
513 break;
514 iface = NULL;
515 }
516 read_unlock_bh(&local->iface_lock);
517
518 return iface ? iface->dev : NULL;
519}
520
521
522static inline int
523hostap_rx_frame_wds(local_info_t *local, struct ieee80211_hdr *hdr,
524 u16 fc, struct net_device **wds)
525{
526 /* FIX: is this really supposed to accept WDS frames only in Master
527 * mode? What about Repeater or Managed with WDS frames? */
528 if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) !=
529 (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS) &&
530 (local->iw_mode != IW_MODE_MASTER || !(fc & IEEE80211_FCTL_TODS)))
531 return 0; /* not a WDS frame */
532
533 /* Possible WDS frame: either IEEE 802.11 compliant (if FromDS)
534 * or own non-standard frame with 4th address after payload */
535 if (memcmp(hdr->addr1, local->dev->dev_addr, ETH_ALEN) != 0 &&
536 (hdr->addr1[0] != 0xff || hdr->addr1[1] != 0xff ||
537 hdr->addr1[2] != 0xff || hdr->addr1[3] != 0xff ||
538 hdr->addr1[4] != 0xff || hdr->addr1[5] != 0xff)) {
539 /* RA (or BSSID) is not ours - drop */
540 PDEBUG(DEBUG_EXTRA, "%s: received WDS frame with "
541 "not own or broadcast %s=" MACSTR "\n",
542 local->dev->name,
543 fc & IEEE80211_FCTL_FROMDS ? "RA" : "BSSID",
544 MAC2STR(hdr->addr1));
545 return -1;
546 }
547
548 /* check if the frame came from a registered WDS connection */
549 *wds = prism2_rx_get_wds(local, hdr->addr2);
550 if (*wds == NULL && fc & IEEE80211_FCTL_FROMDS &&
551 (local->iw_mode != IW_MODE_INFRA ||
552 !(local->wds_type & HOSTAP_WDS_AP_CLIENT) ||
553 memcmp(hdr->addr2, local->bssid, ETH_ALEN) != 0)) {
554 /* require that WDS link has been registered with TA or the
555 * frame is from current AP when using 'AP client mode' */
556 PDEBUG(DEBUG_EXTRA, "%s: received WDS[4 addr] frame "
557 "from unknown TA=" MACSTR "\n",
558 local->dev->name, MAC2STR(hdr->addr2));
559 if (local->ap && local->ap->autom_ap_wds)
560 hostap_wds_link_oper(local, hdr->addr2, WDS_ADD);
561 return -1;
562 }
563
564 if (*wds && !(fc & IEEE80211_FCTL_FROMDS) && local->ap &&
565 hostap_is_sta_assoc(local->ap, hdr->addr2)) {
566 /* STA is actually associated with us even though it has a
567 * registered WDS link. Assume it is in 'AP client' mode.
568 * Since this is a 3-addr frame, assume it is not (bogus) WDS
569 * frame and process it like any normal ToDS frame from
570 * associated STA. */
571 *wds = NULL;
572 }
573
574 return 0;
575}
576
577
578static int hostap_is_eapol_frame(local_info_t *local, struct sk_buff *skb)
579{
580 struct net_device *dev = local->dev;
581 u16 fc, ethertype;
582 struct ieee80211_hdr *hdr;
583 u8 *pos;
584
585 if (skb->len < 24)
586 return 0;
587
588 hdr = (struct ieee80211_hdr *) skb->data;
589 fc = le16_to_cpu(hdr->frame_ctl);
590
591 /* check that the frame is unicast frame to us */
592 if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
593 IEEE80211_FCTL_TODS &&
594 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
595 memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
596 /* ToDS frame with own addr BSSID and DA */
597 } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
598 IEEE80211_FCTL_FROMDS &&
599 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
600 /* FromDS frame with own addr as DA */
601 } else
602 return 0;
603
604 if (skb->len < 24 + 8)
605 return 0;
606
607 /* check for port access entity Ethernet type */
608 pos = skb->data + 24;
609 ethertype = (pos[6] << 8) | pos[7];
610 if (ethertype == ETH_P_PAE)
611 return 1;
612
613 return 0;
614}
615
616
617/* Called only as a tasklet (software IRQ) */
618static inline int
619hostap_rx_frame_decrypt(local_info_t *local, struct sk_buff *skb,
620 struct ieee80211_crypt_data *crypt)
621{
622 struct ieee80211_hdr *hdr;
623 int res, hdrlen;
624
625 if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
626 return 0;
627
628 hdr = (struct ieee80211_hdr *) skb->data;
629 hdrlen = hostap_80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
630
631 if (local->tkip_countermeasures &&
632 strcmp(crypt->ops->name, "TKIP") == 0) {
633 if (net_ratelimit()) {
634 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
635 "received packet from " MACSTR "\n",
636 local->dev->name, MAC2STR(hdr->addr2));
637 }
638 return -1;
639 }
640
641 atomic_inc(&crypt->refcnt);
642 res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
643 atomic_dec(&crypt->refcnt);
644 if (res < 0) {
645 printk(KERN_DEBUG "%s: decryption failed (SA=" MACSTR
646 ") res=%d\n",
647 local->dev->name, MAC2STR(hdr->addr2), res);
648 local->comm_tallies.rx_discards_wep_undecryptable++;
649 return -1;
650 }
651
652 return res;
653}
654
655
656/* Called only as a tasklet (software IRQ) */
657static inline int
658hostap_rx_frame_decrypt_msdu(local_info_t *local, struct sk_buff *skb,
659 int keyidx, struct ieee80211_crypt_data *crypt)
660{
661 struct ieee80211_hdr *hdr;
662 int res, hdrlen;
663
664 if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
665 return 0;
666
667 hdr = (struct ieee80211_hdr *) skb->data;
668 hdrlen = hostap_80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
669
670 atomic_inc(&crypt->refcnt);
671 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
672 atomic_dec(&crypt->refcnt);
673 if (res < 0) {
674 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
675 " (SA=" MACSTR " keyidx=%d)\n",
676 local->dev->name, MAC2STR(hdr->addr2), keyidx);
677 return -1;
678 }
679
680 return 0;
681}
682
683
684/* All received frames are sent to this function. @skb contains the frame in
685 * IEEE 802.11 format, i.e., in the format it was sent over air.
686 * This function is called only as a tasklet (software IRQ). */
687void hostap_80211_rx(struct net_device *dev, struct sk_buff *skb,
688 struct hostap_80211_rx_status *rx_stats)
689{
690 struct hostap_interface *iface;
691 local_info_t *local;
692 struct ieee80211_hdr *hdr;
693 size_t hdrlen;
694 u16 fc, type, stype, sc;
695 struct net_device *wds = NULL;
696 struct net_device_stats *stats;
697 unsigned int frag;
698 u8 *payload;
699 struct sk_buff *skb2 = NULL;
700 u16 ethertype;
701 int frame_authorized = 0;
702 int from_assoc_ap = 0;
703 u8 dst[ETH_ALEN];
704 u8 src[ETH_ALEN];
705 struct ieee80211_crypt_data *crypt = NULL;
706 void *sta = NULL;
707 int keyidx = 0;
708
709 iface = netdev_priv(dev);
710 local = iface->local;
711 iface->stats.rx_packets++;
712 iface->stats.rx_bytes += skb->len;
713
714 /* dev is the master radio device; change this to be the default
715 * virtual interface (this may be changed to WDS device below) */
716 dev = local->ddev;
717 iface = netdev_priv(dev);
718
719 hdr = (struct ieee80211_hdr *) skb->data;
720 stats = hostap_get_stats(dev);
721
722 if (skb->len < 10)
723 goto rx_dropped;
724
725 fc = le16_to_cpu(hdr->frame_ctl);
726 type = WLAN_FC_GET_TYPE(fc);
727 stype = WLAN_FC_GET_STYPE(fc);
728 sc = le16_to_cpu(hdr->seq_ctl);
729 frag = WLAN_GET_SEQ_FRAG(sc);
730 hdrlen = hostap_80211_get_hdrlen(fc);
731
732 /* Put this code here so that we avoid duplicating it in all
733 * Rx paths. - Jean II */
734#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
735 /* If spy monitoring on */
736 if (iface->spy_data.spy_number > 0) {
737 struct iw_quality wstats;
738 wstats.level = rx_stats->signal;
739 wstats.noise = rx_stats->noise;
740 wstats.updated = 6; /* No qual value */
741 /* Update spy records */
742 wireless_spy_update(dev, hdr->addr2, &wstats);
743 }
744#endif /* IW_WIRELESS_SPY */
745 hostap_update_rx_stats(local->ap, hdr, rx_stats);
746
747 if (local->iw_mode == IW_MODE_MONITOR) {
748 monitor_rx(dev, skb, rx_stats);
749 return;
750 }
751
752 if (local->host_decrypt) {
753 int idx = 0;
754 if (skb->len >= hdrlen + 3)
755 idx = skb->data[hdrlen + 3] >> 6;
756 crypt = local->crypt[idx];
757 sta = NULL;
758
759 /* Use station specific key to override default keys if the
760 * receiver address is a unicast address ("individual RA"). If
761 * bcrx_sta_key parameter is set, station specific key is used
762 * even with broad/multicast targets (this is against IEEE
763 * 802.11, but makes it easier to use different keys with
764 * stations that do not support WEP key mapping). */
765
766 if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
767 (void) hostap_handle_sta_crypto(local, hdr, &crypt,
768 &sta);
769
770 /* allow NULL decrypt to indicate an station specific override
771 * for default encryption */
772 if (crypt && (crypt->ops == NULL ||
773 crypt->ops->decrypt_mpdu == NULL))
774 crypt = NULL;
775
776 if (!crypt && (fc & IEEE80211_FCTL_PROTECTED)) {
777#if 0
778 /* This seems to be triggered by some (multicast?)
779 * frames from other than current BSS, so just drop the
780 * frames silently instead of filling system log with
781 * these reports. */
782 printk(KERN_DEBUG "%s: WEP decryption failed (not set)"
783 " (SA=" MACSTR ")\n",
784 local->dev->name, MAC2STR(hdr->addr2));
785#endif
786 local->comm_tallies.rx_discards_wep_undecryptable++;
787 goto rx_dropped;
788 }
789 }
790
791 if (type != IEEE80211_FTYPE_DATA) {
792 if (type == IEEE80211_FTYPE_MGMT &&
793 stype == IEEE80211_STYPE_AUTH &&
794 fc & IEEE80211_FCTL_PROTECTED && local->host_decrypt &&
795 (keyidx = hostap_rx_frame_decrypt(local, skb, crypt)) < 0)
796 {
797 printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth "
798 "from " MACSTR "\n", dev->name,
799 MAC2STR(hdr->addr2));
800 /* TODO: could inform hostapd about this so that it
801 * could send auth failure report */
802 goto rx_dropped;
803 }
804
805 if (hostap_rx_frame_mgmt(local, skb, rx_stats, type, stype))
806 goto rx_dropped;
807 else
808 goto rx_exit;
809 }
810
811 /* Data frame - extract src/dst addresses */
812 if (skb->len < IEEE80211_DATA_HDR3_LEN)
813 goto rx_dropped;
814
815 switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
816 case IEEE80211_FCTL_FROMDS:
817 memcpy(dst, hdr->addr1, ETH_ALEN);
818 memcpy(src, hdr->addr3, ETH_ALEN);
819 break;
820 case IEEE80211_FCTL_TODS:
821 memcpy(dst, hdr->addr3, ETH_ALEN);
822 memcpy(src, hdr->addr2, ETH_ALEN);
823 break;
824 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
825 if (skb->len < IEEE80211_DATA_HDR4_LEN)
826 goto rx_dropped;
827 memcpy(dst, hdr->addr3, ETH_ALEN);
828 memcpy(src, hdr->addr4, ETH_ALEN);
829 break;
830 case 0:
831 memcpy(dst, hdr->addr1, ETH_ALEN);
832 memcpy(src, hdr->addr2, ETH_ALEN);
833 break;
834 }
835
836 if (hostap_rx_frame_wds(local, hdr, fc, &wds))
837 goto rx_dropped;
838 if (wds) {
839 skb->dev = dev = wds;
840 stats = hostap_get_stats(dev);
841 }
842
843 if (local->iw_mode == IW_MODE_MASTER && !wds &&
844 (fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
845 IEEE80211_FCTL_FROMDS &&
846 local->stadev &&
847 memcmp(hdr->addr2, local->assoc_ap_addr, ETH_ALEN) == 0) {
848 /* Frame from BSSID of the AP for which we are a client */
849 skb->dev = dev = local->stadev;
850 stats = hostap_get_stats(dev);
851 from_assoc_ap = 1;
852 }
853
854 dev->last_rx = jiffies;
855
856 if ((local->iw_mode == IW_MODE_MASTER ||
857 local->iw_mode == IW_MODE_REPEAT) &&
858 !from_assoc_ap) {
859 switch (hostap_handle_sta_rx(local, dev, skb, rx_stats,
860 wds != NULL)) {
861 case AP_RX_CONTINUE_NOT_AUTHORIZED:
862 frame_authorized = 0;
863 break;
864 case AP_RX_CONTINUE:
865 frame_authorized = 1;
866 break;
867 case AP_RX_DROP:
868 goto rx_dropped;
869 case AP_RX_EXIT:
870 goto rx_exit;
871 }
872 }
873
874 /* Nullfunc frames may have PS-bit set, so they must be passed to
875 * hostap_handle_sta_rx() before being dropped here. */
876 if (stype != IEEE80211_STYPE_DATA &&
877 stype != IEEE80211_STYPE_DATA_CFACK &&
878 stype != IEEE80211_STYPE_DATA_CFPOLL &&
879 stype != IEEE80211_STYPE_DATA_CFACKPOLL) {
880 if (stype != IEEE80211_STYPE_NULLFUNC)
881 printk(KERN_DEBUG "%s: RX: dropped data frame "
882 "with no data (type=0x%02x, subtype=0x%02x)\n",
883 dev->name, type >> 2, stype >> 4);
884 goto rx_dropped;
885 }
886
887 /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
888
889 if (local->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
890 (keyidx = hostap_rx_frame_decrypt(local, skb, crypt)) < 0)
891 goto rx_dropped;
892 hdr = (struct ieee80211_hdr *) skb->data;
893
894 /* skb: hdr + (possibly fragmented) plaintext payload */
895
896 if (local->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
897 (frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
898 int flen;
899 struct sk_buff *frag_skb =
900 prism2_frag_cache_get(local, hdr);
901 if (!frag_skb) {
902 printk(KERN_DEBUG "%s: Rx cannot get skb from "
903 "fragment cache (morefrag=%d seq=%u frag=%u)\n",
904 dev->name, (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
905 WLAN_GET_SEQ_SEQ(sc) >> 4, frag);
906 goto rx_dropped;
907 }
908
909 flen = skb->len;
910 if (frag != 0)
911 flen -= hdrlen;
912
913 if (frag_skb->tail + flen > frag_skb->end) {
914 printk(KERN_WARNING "%s: host decrypted and "
915 "reassembled frame did not fit skb\n",
916 dev->name);
917 prism2_frag_cache_invalidate(local, hdr);
918 goto rx_dropped;
919 }
920
921 if (frag == 0) {
922 /* copy first fragment (including full headers) into
923 * beginning of the fragment cache skb */
924 memcpy(skb_put(frag_skb, flen), skb->data, flen);
925 } else {
926 /* append frame payload to the end of the fragment
927 * cache skb */
928 memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
929 flen);
930 }
931 dev_kfree_skb(skb);
932 skb = NULL;
933
934 if (fc & IEEE80211_FCTL_MOREFRAGS) {
935 /* more fragments expected - leave the skb in fragment
936 * cache for now; it will be delivered to upper layers
937 * after all fragments have been received */
938 goto rx_exit;
939 }
940
941 /* this was the last fragment and the frame will be
942 * delivered, so remove skb from fragment cache */
943 skb = frag_skb;
944 hdr = (struct ieee80211_hdr *) skb->data;
945 prism2_frag_cache_invalidate(local, hdr);
946 }
947
948 /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
949 * encrypted/authenticated */
950
951 if (local->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
952 hostap_rx_frame_decrypt_msdu(local, skb, keyidx, crypt))
953 goto rx_dropped;
954
955 hdr = (struct ieee80211_hdr *) skb->data;
956 if (crypt && !(fc & IEEE80211_FCTL_PROTECTED) && !local->open_wep) {
957 if (local->ieee_802_1x &&
958 hostap_is_eapol_frame(local, skb)) {
959 /* pass unencrypted EAPOL frames even if encryption is
960 * configured */
961 PDEBUG(DEBUG_EXTRA2, "%s: RX: IEEE 802.1X - passing "
962 "unencrypted EAPOL frame\n", local->dev->name);
963 } else {
964 printk(KERN_DEBUG "%s: encryption configured, but RX "
965 "frame not encrypted (SA=" MACSTR ")\n",
966 local->dev->name, MAC2STR(hdr->addr2));
967 goto rx_dropped;
968 }
969 }
970
971 if (local->drop_unencrypted && !(fc & IEEE80211_FCTL_PROTECTED) &&
972 !hostap_is_eapol_frame(local, skb)) {
973 if (net_ratelimit()) {
974 printk(KERN_DEBUG "%s: dropped unencrypted RX data "
975 "frame from " MACSTR " (drop_unencrypted=1)\n",
976 dev->name, MAC2STR(hdr->addr2));
977 }
978 goto rx_dropped;
979 }
980
981 /* skb: hdr + (possible reassembled) full plaintext payload */
982
983 payload = skb->data + hdrlen;
984 ethertype = (payload[6] << 8) | payload[7];
985
986 /* If IEEE 802.1X is used, check whether the port is authorized to send
987 * the received frame. */
988 if (local->ieee_802_1x && local->iw_mode == IW_MODE_MASTER) {
989 if (ethertype == ETH_P_PAE) {
990 PDEBUG(DEBUG_EXTRA2, "%s: RX: IEEE 802.1X frame\n",
991 dev->name);
992 if (local->hostapd && local->apdev) {
993 /* Send IEEE 802.1X frames to the user
994 * space daemon for processing */
995 prism2_rx_80211(local->apdev, skb, rx_stats,
996 PRISM2_RX_MGMT);
997 local->apdevstats.rx_packets++;
998 local->apdevstats.rx_bytes += skb->len;
999 goto rx_exit;
1000 }
1001 } else if (!frame_authorized) {
1002 printk(KERN_DEBUG "%s: dropped frame from "
1003 "unauthorized port (IEEE 802.1X): "
1004 "ethertype=0x%04x\n",
1005 dev->name, ethertype);
1006 goto rx_dropped;
1007 }
1008 }
1009
1010 /* convert hdr + possible LLC headers into Ethernet header */
1011 if (skb->len - hdrlen >= 8 &&
1012 ((memcmp(payload, rfc1042_header, 6) == 0 &&
1013 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
1014 memcmp(payload, bridge_tunnel_header, 6) == 0)) {
1015 /* remove RFC1042 or Bridge-Tunnel encapsulation and
1016 * replace EtherType */
1017 skb_pull(skb, hdrlen + 6);
1018 memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
1019 memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
1020 } else {
1021 u16 len;
1022 /* Leave Ethernet header part of hdr and full payload */
1023 skb_pull(skb, hdrlen);
1024 len = htons(skb->len);
1025 memcpy(skb_push(skb, 2), &len, 2);
1026 memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
1027 memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
1028 }
1029
1030 if (wds && ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
1031 IEEE80211_FCTL_TODS) &&
1032 skb->len >= ETH_HLEN + ETH_ALEN) {
1033 /* Non-standard frame: get addr4 from its bogus location after
1034 * the payload */
1035 memcpy(skb->data + ETH_ALEN,
1036 skb->data + skb->len - ETH_ALEN, ETH_ALEN);
1037 skb_trim(skb, skb->len - ETH_ALEN);
1038 }
1039
1040 stats->rx_packets++;
1041 stats->rx_bytes += skb->len;
1042
1043 if (local->iw_mode == IW_MODE_MASTER && !wds &&
1044 local->ap->bridge_packets) {
1045 if (dst[0] & 0x01) {
1046 /* copy multicast frame both to the higher layers and
1047 * to the wireless media */
1048 local->ap->bridged_multicast++;
1049 skb2 = skb_clone(skb, GFP_ATOMIC);
1050 if (skb2 == NULL)
1051 printk(KERN_DEBUG "%s: skb_clone failed for "
1052 "multicast frame\n", dev->name);
1053 } else if (hostap_is_sta_authorized(local->ap, dst)) {
1054 /* send frame directly to the associated STA using
1055 * wireless media and not passing to higher layers */
1056 local->ap->bridged_unicast++;
1057 skb2 = skb;
1058 skb = NULL;
1059 }
1060 }
1061
1062 if (skb2 != NULL) {
1063 /* send to wireless media */
1064 skb2->protocol = __constant_htons(ETH_P_802_3);
1065 skb2->mac.raw = skb2->nh.raw = skb2->data;
1066 /* skb2->nh.raw = skb2->data + ETH_HLEN; */
1067 skb2->dev = dev;
1068 dev_queue_xmit(skb2);
1069 }
1070
1071 if (skb) {
1072 skb->protocol = eth_type_trans(skb, dev);
1073 memset(skb->cb, 0, sizeof(skb->cb));
1074 skb->dev = dev;
1075 netif_rx(skb);
1076 }
1077
1078 rx_exit:
1079 if (sta)
1080 hostap_handle_sta_release(sta);
1081 return;
1082
1083 rx_dropped:
1084 dev_kfree_skb(skb);
1085
1086 stats->rx_dropped++;
1087 goto rx_exit;
1088}
1089
1090
1091EXPORT_SYMBOL(hostap_80211_rx);
diff --git a/drivers/net/wireless/hostap/hostap_80211_tx.c b/drivers/net/wireless/hostap/hostap_80211_tx.c
new file mode 100644
index 000000000000..6358015f6526
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_80211_tx.c
@@ -0,0 +1,524 @@
1void hostap_dump_tx_80211(const char *name, struct sk_buff *skb)
2{
3 struct ieee80211_hdr *hdr;
4 u16 fc;
5
6 hdr = (struct ieee80211_hdr *) skb->data;
7
8 printk(KERN_DEBUG "%s: TX len=%d jiffies=%ld\n",
9 name, skb->len, jiffies);
10
11 if (skb->len < 2)
12 return;
13
14 fc = le16_to_cpu(hdr->frame_ctl);
15 printk(KERN_DEBUG " FC=0x%04x (type=%d:%d)%s%s",
16 fc, WLAN_FC_GET_TYPE(fc) >> 2, WLAN_FC_GET_STYPE(fc) >> 4,
17 fc & IEEE80211_FCTL_TODS ? " [ToDS]" : "",
18 fc & IEEE80211_FCTL_FROMDS ? " [FromDS]" : "");
19
20 if (skb->len < IEEE80211_DATA_HDR3_LEN) {
21 printk("\n");
22 return;
23 }
24
25 printk(" dur=0x%04x seq=0x%04x\n", le16_to_cpu(hdr->duration_id),
26 le16_to_cpu(hdr->seq_ctl));
27
28 printk(KERN_DEBUG " A1=" MACSTR " A2=" MACSTR " A3=" MACSTR,
29 MAC2STR(hdr->addr1), MAC2STR(hdr->addr2), MAC2STR(hdr->addr3));
30 if (skb->len >= 30)
31 printk(" A4=" MACSTR, MAC2STR(hdr->addr4));
32 printk("\n");
33}
34
35
36/* hard_start_xmit function for data interfaces (wlan#, wlan#wds#, wlan#sta)
37 * Convert Ethernet header into a suitable IEEE 802.11 header depending on
38 * device configuration. */
39int hostap_data_start_xmit(struct sk_buff *skb, struct net_device *dev)
40{
41 struct hostap_interface *iface;
42 local_info_t *local;
43 int need_headroom, need_tailroom = 0;
44 struct ieee80211_hdr hdr;
45 u16 fc, ethertype = 0;
46 enum {
47 WDS_NO = 0, WDS_OWN_FRAME, WDS_COMPLIANT_FRAME
48 } use_wds = WDS_NO;
49 u8 *encaps_data;
50 int hdr_len, encaps_len, skip_header_bytes;
51 int to_assoc_ap = 0;
52 struct hostap_skb_tx_data *meta;
53
54 iface = netdev_priv(dev);
55 local = iface->local;
56
57 if (skb->len < ETH_HLEN) {
58 printk(KERN_DEBUG "%s: hostap_data_start_xmit: short skb "
59 "(len=%d)\n", dev->name, skb->len);
60 kfree_skb(skb);
61 return 0;
62 }
63
64 if (local->ddev != dev) {
65 use_wds = (local->iw_mode == IW_MODE_MASTER &&
66 !(local->wds_type & HOSTAP_WDS_STANDARD_FRAME)) ?
67 WDS_OWN_FRAME : WDS_COMPLIANT_FRAME;
68 if (dev == local->stadev) {
69 to_assoc_ap = 1;
70 use_wds = WDS_NO;
71 } else if (dev == local->apdev) {
72 printk(KERN_DEBUG "%s: prism2_tx: trying to use "
73 "AP device with Ethernet net dev\n", dev->name);
74 kfree_skb(skb);
75 return 0;
76 }
77 } else {
78 if (local->iw_mode == IW_MODE_REPEAT) {
79 printk(KERN_DEBUG "%s: prism2_tx: trying to use "
80 "non-WDS link in Repeater mode\n", dev->name);
81 kfree_skb(skb);
82 return 0;
83 } else if (local->iw_mode == IW_MODE_INFRA &&
84 (local->wds_type & HOSTAP_WDS_AP_CLIENT) &&
85 memcmp(skb->data + ETH_ALEN, dev->dev_addr,
86 ETH_ALEN) != 0) {
87 /* AP client mode: send frames with foreign src addr
88 * using 4-addr WDS frames */
89 use_wds = WDS_COMPLIANT_FRAME;
90 }
91 }
92
93 /* Incoming skb->data: dst_addr[6], src_addr[6], proto[2], payload
94 * ==>
95 * Prism2 TX frame with 802.11 header:
96 * txdesc (address order depending on used mode; includes dst_addr and
97 * src_addr), possible encapsulation (RFC1042/Bridge-Tunnel;
98 * proto[2], payload {, possible addr4[6]} */
99
100 ethertype = (skb->data[12] << 8) | skb->data[13];
101
102 memset(&hdr, 0, sizeof(hdr));
103
104 /* Length of data after IEEE 802.11 header */
105 encaps_data = NULL;
106 encaps_len = 0;
107 skip_header_bytes = ETH_HLEN;
108 if (ethertype == ETH_P_AARP || ethertype == ETH_P_IPX) {
109 encaps_data = bridge_tunnel_header;
110 encaps_len = sizeof(bridge_tunnel_header);
111 skip_header_bytes -= 2;
112 } else if (ethertype >= 0x600) {
113 encaps_data = rfc1042_header;
114 encaps_len = sizeof(rfc1042_header);
115 skip_header_bytes -= 2;
116 }
117
118 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA;
119 hdr_len = IEEE80211_DATA_HDR3_LEN;
120
121 if (use_wds != WDS_NO) {
122 /* Note! Prism2 station firmware has problems with sending real
123 * 802.11 frames with four addresses; until these problems can
124 * be fixed or worked around, 4-addr frames needed for WDS are
125 * using incompatible format: FromDS flag is not set and the
126 * fourth address is added after the frame payload; it is
127 * assumed, that the receiving station knows how to handle this
128 * frame format */
129
130 if (use_wds == WDS_COMPLIANT_FRAME) {
131 fc |= IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS;
132 /* From&To DS: Addr1 = RA, Addr2 = TA, Addr3 = DA,
133 * Addr4 = SA */
134 memcpy(&hdr.addr4, skb->data + ETH_ALEN, ETH_ALEN);
135 hdr_len += ETH_ALEN;
136 } else {
137 /* bogus 4-addr format to workaround Prism2 station
138 * f/w bug */
139 fc |= IEEE80211_FCTL_TODS;
140 /* From DS: Addr1 = DA (used as RA),
141 * Addr2 = BSSID (used as TA), Addr3 = SA (used as DA),
142 */
143
144 /* SA from skb->data + ETH_ALEN will be added after
145 * frame payload; use hdr.addr4 as a temporary buffer
146 */
147 memcpy(&hdr.addr4, skb->data + ETH_ALEN, ETH_ALEN);
148 need_tailroom += ETH_ALEN;
149 }
150
151 /* send broadcast and multicast frames to broadcast RA, if
152 * configured; otherwise, use unicast RA of the WDS link */
153 if ((local->wds_type & HOSTAP_WDS_BROADCAST_RA) &&
154 skb->data[0] & 0x01)
155 memset(&hdr.addr1, 0xff, ETH_ALEN);
156 else if (iface->type == HOSTAP_INTERFACE_WDS)
157 memcpy(&hdr.addr1, iface->u.wds.remote_addr,
158 ETH_ALEN);
159 else
160 memcpy(&hdr.addr1, local->bssid, ETH_ALEN);
161 memcpy(&hdr.addr2, dev->dev_addr, ETH_ALEN);
162 memcpy(&hdr.addr3, skb->data, ETH_ALEN);
163 } else if (local->iw_mode == IW_MODE_MASTER && !to_assoc_ap) {
164 fc |= IEEE80211_FCTL_FROMDS;
165 /* From DS: Addr1 = DA, Addr2 = BSSID, Addr3 = SA */
166 memcpy(&hdr.addr1, skb->data, ETH_ALEN);
167 memcpy(&hdr.addr2, dev->dev_addr, ETH_ALEN);
168 memcpy(&hdr.addr3, skb->data + ETH_ALEN, ETH_ALEN);
169 } else if (local->iw_mode == IW_MODE_INFRA || to_assoc_ap) {
170 fc |= IEEE80211_FCTL_TODS;
171 /* To DS: Addr1 = BSSID, Addr2 = SA, Addr3 = DA */
172 memcpy(&hdr.addr1, to_assoc_ap ?
173 local->assoc_ap_addr : local->bssid, ETH_ALEN);
174 memcpy(&hdr.addr2, skb->data + ETH_ALEN, ETH_ALEN);
175 memcpy(&hdr.addr3, skb->data, ETH_ALEN);
176 } else if (local->iw_mode == IW_MODE_ADHOC) {
177 /* not From/To DS: Addr1 = DA, Addr2 = SA, Addr3 = BSSID */
178 memcpy(&hdr.addr1, skb->data, ETH_ALEN);
179 memcpy(&hdr.addr2, skb->data + ETH_ALEN, ETH_ALEN);
180 memcpy(&hdr.addr3, local->bssid, ETH_ALEN);
181 }
182
183 hdr.frame_ctl = cpu_to_le16(fc);
184
185 skb_pull(skb, skip_header_bytes);
186 need_headroom = local->func->need_tx_headroom + hdr_len + encaps_len;
187 if (skb_tailroom(skb) < need_tailroom) {
188 skb = skb_unshare(skb, GFP_ATOMIC);
189 if (skb == NULL) {
190 iface->stats.tx_dropped++;
191 return 0;
192 }
193 if (pskb_expand_head(skb, need_headroom, need_tailroom,
194 GFP_ATOMIC)) {
195 kfree_skb(skb);
196 iface->stats.tx_dropped++;
197 return 0;
198 }
199 } else if (skb_headroom(skb) < need_headroom) {
200 struct sk_buff *tmp = skb;
201 skb = skb_realloc_headroom(skb, need_headroom);
202 kfree_skb(tmp);
203 if (skb == NULL) {
204 iface->stats.tx_dropped++;
205 return 0;
206 }
207 } else {
208 skb = skb_unshare(skb, GFP_ATOMIC);
209 if (skb == NULL) {
210 iface->stats.tx_dropped++;
211 return 0;
212 }
213 }
214
215 if (encaps_data)
216 memcpy(skb_push(skb, encaps_len), encaps_data, encaps_len);
217 memcpy(skb_push(skb, hdr_len), &hdr, hdr_len);
218 if (use_wds == WDS_OWN_FRAME) {
219 memcpy(skb_put(skb, ETH_ALEN), &hdr.addr4, ETH_ALEN);
220 }
221
222 iface->stats.tx_packets++;
223 iface->stats.tx_bytes += skb->len;
224
225 skb->mac.raw = skb->data;
226 meta = (struct hostap_skb_tx_data *) skb->cb;
227 memset(meta, 0, sizeof(*meta));
228 meta->magic = HOSTAP_SKB_TX_DATA_MAGIC;
229 if (use_wds)
230 meta->flags |= HOSTAP_TX_FLAGS_WDS;
231 meta->ethertype = ethertype;
232 meta->iface = iface;
233
234 /* Send IEEE 802.11 encapsulated frame using the master radio device */
235 skb->dev = local->dev;
236 dev_queue_xmit(skb);
237 return 0;
238}
239
240
241/* hard_start_xmit function for hostapd wlan#ap interfaces */
242int hostap_mgmt_start_xmit(struct sk_buff *skb, struct net_device *dev)
243{
244 struct hostap_interface *iface;
245 local_info_t *local;
246 struct hostap_skb_tx_data *meta;
247 struct ieee80211_hdr *hdr;
248 u16 fc;
249
250 iface = netdev_priv(dev);
251 local = iface->local;
252
253 if (skb->len < 10) {
254 printk(KERN_DEBUG "%s: hostap_mgmt_start_xmit: short skb "
255 "(len=%d)\n", dev->name, skb->len);
256 kfree_skb(skb);
257 return 0;
258 }
259
260 iface->stats.tx_packets++;
261 iface->stats.tx_bytes += skb->len;
262
263 meta = (struct hostap_skb_tx_data *) skb->cb;
264 memset(meta, 0, sizeof(*meta));
265 meta->magic = HOSTAP_SKB_TX_DATA_MAGIC;
266 meta->iface = iface;
267
268 if (skb->len >= IEEE80211_DATA_HDR3_LEN + sizeof(rfc1042_header) + 2) {
269 hdr = (struct ieee80211_hdr *) skb->data;
270 fc = le16_to_cpu(hdr->frame_ctl);
271 if (WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA &&
272 WLAN_FC_GET_STYPE(fc) == IEEE80211_STYPE_DATA) {
273 u8 *pos = &skb->data[IEEE80211_DATA_HDR3_LEN +
274 sizeof(rfc1042_header)];
275 meta->ethertype = (pos[0] << 8) | pos[1];
276 }
277 }
278
279 /* Send IEEE 802.11 encapsulated frame using the master radio device */
280 skb->dev = local->dev;
281 dev_queue_xmit(skb);
282 return 0;
283}
284
285
286/* Called only from software IRQ */
287struct sk_buff * hostap_tx_encrypt(struct sk_buff *skb,
288 struct ieee80211_crypt_data *crypt)
289{
290 struct hostap_interface *iface;
291 local_info_t *local;
292 struct ieee80211_hdr *hdr;
293 u16 fc;
294 int hdr_len, res;
295
296 iface = netdev_priv(skb->dev);
297 local = iface->local;
298
299 if (skb->len < IEEE80211_DATA_HDR3_LEN) {
300 kfree_skb(skb);
301 return NULL;
302 }
303
304 if (local->tkip_countermeasures &&
305 crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
306 hdr = (struct ieee80211_hdr *) skb->data;
307 if (net_ratelimit()) {
308 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
309 "TX packet to " MACSTR "\n",
310 local->dev->name, MAC2STR(hdr->addr1));
311 }
312 kfree_skb(skb);
313 return NULL;
314 }
315
316 skb = skb_unshare(skb, GFP_ATOMIC);
317 if (skb == NULL)
318 return NULL;
319
320 if ((skb_headroom(skb) < crypt->ops->extra_prefix_len ||
321 skb_tailroom(skb) < crypt->ops->extra_postfix_len) &&
322 pskb_expand_head(skb, crypt->ops->extra_prefix_len,
323 crypt->ops->extra_postfix_len, GFP_ATOMIC)) {
324 kfree_skb(skb);
325 return NULL;
326 }
327
328 hdr = (struct ieee80211_hdr *) skb->data;
329 fc = le16_to_cpu(hdr->frame_ctl);
330 hdr_len = hostap_80211_get_hdrlen(fc);
331
332 /* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
333 * call both MSDU and MPDU encryption functions from here. */
334 atomic_inc(&crypt->refcnt);
335 res = 0;
336 if (crypt->ops->encrypt_msdu)
337 res = crypt->ops->encrypt_msdu(skb, hdr_len, crypt->priv);
338 if (res == 0 && crypt->ops->encrypt_mpdu)
339 res = crypt->ops->encrypt_mpdu(skb, hdr_len, crypt->priv);
340 atomic_dec(&crypt->refcnt);
341 if (res < 0) {
342 kfree_skb(skb);
343 return NULL;
344 }
345
346 return skb;
347}
348
349
350/* hard_start_xmit function for master radio interface wifi#.
351 * AP processing (TX rate control, power save buffering, etc.).
352 * Use hardware TX function to send the frame. */
353int hostap_master_start_xmit(struct sk_buff *skb, struct net_device *dev)
354{
355 struct hostap_interface *iface;
356 local_info_t *local;
357 int ret = 1;
358 u16 fc;
359 struct hostap_tx_data tx;
360 ap_tx_ret tx_ret;
361 struct hostap_skb_tx_data *meta;
362 int no_encrypt = 0;
363 struct ieee80211_hdr *hdr;
364
365 iface = netdev_priv(dev);
366 local = iface->local;
367
368 tx.skb = skb;
369 tx.sta_ptr = NULL;
370
371 meta = (struct hostap_skb_tx_data *) skb->cb;
372 if (meta->magic != HOSTAP_SKB_TX_DATA_MAGIC) {
373 printk(KERN_DEBUG "%s: invalid skb->cb magic (0x%08x, "
374 "expected 0x%08x)\n",
375 dev->name, meta->magic, HOSTAP_SKB_TX_DATA_MAGIC);
376 ret = 0;
377 iface->stats.tx_dropped++;
378 goto fail;
379 }
380
381 if (local->host_encrypt) {
382 /* Set crypt to default algorithm and key; will be replaced in
383 * AP code if STA has own alg/key */
384 tx.crypt = local->crypt[local->tx_keyidx];
385 tx.host_encrypt = 1;
386 } else {
387 tx.crypt = NULL;
388 tx.host_encrypt = 0;
389 }
390
391 if (skb->len < 24) {
392 printk(KERN_DEBUG "%s: hostap_master_start_xmit: short skb "
393 "(len=%d)\n", dev->name, skb->len);
394 ret = 0;
395 iface->stats.tx_dropped++;
396 goto fail;
397 }
398
399 /* FIX (?):
400 * Wi-Fi 802.11b test plan suggests that AP should ignore power save
401 * bit in authentication and (re)association frames and assume tha
402 * STA remains awake for the response. */
403 tx_ret = hostap_handle_sta_tx(local, &tx);
404 skb = tx.skb;
405 meta = (struct hostap_skb_tx_data *) skb->cb;
406 hdr = (struct ieee80211_hdr *) skb->data;
407 fc = le16_to_cpu(hdr->frame_ctl);
408 switch (tx_ret) {
409 case AP_TX_CONTINUE:
410 break;
411 case AP_TX_CONTINUE_NOT_AUTHORIZED:
412 if (local->ieee_802_1x &&
413 WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA &&
414 meta->ethertype != ETH_P_PAE &&
415 !(meta->flags & HOSTAP_TX_FLAGS_WDS)) {
416 printk(KERN_DEBUG "%s: dropped frame to unauthorized "
417 "port (IEEE 802.1X): ethertype=0x%04x\n",
418 dev->name, meta->ethertype);
419 hostap_dump_tx_80211(dev->name, skb);
420
421 ret = 0; /* drop packet */
422 iface->stats.tx_dropped++;
423 goto fail;
424 }
425 break;
426 case AP_TX_DROP:
427 ret = 0; /* drop packet */
428 iface->stats.tx_dropped++;
429 goto fail;
430 case AP_TX_RETRY:
431 goto fail;
432 case AP_TX_BUFFERED:
433 /* do not free skb here, it will be freed when the
434 * buffered frame is sent/timed out */
435 ret = 0;
436 goto tx_exit;
437 }
438
439 /* Request TX callback if protocol version is 2 in 802.11 header;
440 * this version 2 is a special case used between hostapd and kernel
441 * driver */
442 if (((fc & IEEE80211_FCTL_VERS) == BIT(1)) &&
443 local->ap && local->ap->tx_callback_idx && meta->tx_cb_idx == 0) {
444 meta->tx_cb_idx = local->ap->tx_callback_idx;
445
446 /* remove special version from the frame header */
447 fc &= ~IEEE80211_FCTL_VERS;
448 hdr->frame_ctl = cpu_to_le16(fc);
449 }
450
451 if (WLAN_FC_GET_TYPE(fc) != IEEE80211_FTYPE_DATA) {
452 no_encrypt = 1;
453 tx.crypt = NULL;
454 }
455
456 if (local->ieee_802_1x && meta->ethertype == ETH_P_PAE && tx.crypt &&
457 !(fc & IEEE80211_FCTL_VERS)) {
458 no_encrypt = 1;
459 PDEBUG(DEBUG_EXTRA2, "%s: TX: IEEE 802.1X - passing "
460 "unencrypted EAPOL frame\n", dev->name);
461 tx.crypt = NULL; /* no encryption for IEEE 802.1X frames */
462 }
463
464 if (tx.crypt && (!tx.crypt->ops || !tx.crypt->ops->encrypt_mpdu))
465 tx.crypt = NULL;
466 else if ((tx.crypt || local->crypt[local->tx_keyidx]) && !no_encrypt) {
467 /* Add ISWEP flag both for firmware and host based encryption
468 */
469 fc |= IEEE80211_FCTL_PROTECTED;
470 hdr->frame_ctl = cpu_to_le16(fc);
471 } else if (local->drop_unencrypted &&
472 WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA &&
473 meta->ethertype != ETH_P_PAE) {
474 if (net_ratelimit()) {
475 printk(KERN_DEBUG "%s: dropped unencrypted TX data "
476 "frame (drop_unencrypted=1)\n", dev->name);
477 }
478 iface->stats.tx_dropped++;
479 ret = 0;
480 goto fail;
481 }
482
483 if (tx.crypt) {
484 skb = hostap_tx_encrypt(skb, tx.crypt);
485 if (skb == NULL) {
486 printk(KERN_DEBUG "%s: TX - encryption failed\n",
487 dev->name);
488 ret = 0;
489 goto fail;
490 }
491 meta = (struct hostap_skb_tx_data *) skb->cb;
492 if (meta->magic != HOSTAP_SKB_TX_DATA_MAGIC) {
493 printk(KERN_DEBUG "%s: invalid skb->cb magic (0x%08x, "
494 "expected 0x%08x) after hostap_tx_encrypt\n",
495 dev->name, meta->magic,
496 HOSTAP_SKB_TX_DATA_MAGIC);
497 ret = 0;
498 iface->stats.tx_dropped++;
499 goto fail;
500 }
501 }
502
503 if (local->func->tx == NULL || local->func->tx(skb, dev)) {
504 ret = 0;
505 iface->stats.tx_dropped++;
506 } else {
507 ret = 0;
508 iface->stats.tx_packets++;
509 iface->stats.tx_bytes += skb->len;
510 }
511
512 fail:
513 if (!ret && skb)
514 dev_kfree_skb(skb);
515 tx_exit:
516 if (tx.sta_ptr)
517 hostap_handle_sta_release(tx.sta_ptr);
518 return ret;
519}
520
521
522EXPORT_SYMBOL(hostap_dump_tx_80211);
523EXPORT_SYMBOL(hostap_tx_encrypt);
524EXPORT_SYMBOL(hostap_master_start_xmit);
diff --git a/drivers/net/wireless/hostap/hostap_ap.c b/drivers/net/wireless/hostap/hostap_ap.c
new file mode 100644
index 000000000000..930cef8367f2
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_ap.c
@@ -0,0 +1,3288 @@
1/*
2 * Intersil Prism2 driver with Host AP (software access point) support
3 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
4 * <jkmaline@cc.hut.fi>
5 * Copyright (c) 2002-2005, Jouni Malinen <jkmaline@cc.hut.fi>
6 *
7 * This file is to be included into hostap.c when S/W AP functionality is
8 * compiled.
9 *
10 * AP: FIX:
11 * - if unicast Class 2 (assoc,reassoc,disassoc) frame received from
12 * unauthenticated STA, send deauth. frame (8802.11: 5.5)
13 * - if unicast Class 3 (data with to/from DS,deauth,pspoll) frame received
14 * from authenticated, but unassoc STA, send disassoc frame (8802.11: 5.5)
15 * - if unicast Class 3 received from unauthenticated STA, send deauth. frame
16 * (8802.11: 5.5)
17 */
18
19static int other_ap_policy[MAX_PARM_DEVICES] = { AP_OTHER_AP_SKIP_ALL,
20 DEF_INTS };
21module_param_array(other_ap_policy, int, NULL, 0444);
22MODULE_PARM_DESC(other_ap_policy, "Other AP beacon monitoring policy (0-3)");
23
24static int ap_max_inactivity[MAX_PARM_DEVICES] = { AP_MAX_INACTIVITY_SEC,
25 DEF_INTS };
26module_param_array(ap_max_inactivity, int, NULL, 0444);
27MODULE_PARM_DESC(ap_max_inactivity, "AP timeout (in seconds) for station "
28 "inactivity");
29
30static int ap_bridge_packets[MAX_PARM_DEVICES] = { 1, DEF_INTS };
31module_param_array(ap_bridge_packets, int, NULL, 0444);
32MODULE_PARM_DESC(ap_bridge_packets, "Bridge packets directly between "
33 "stations");
34
35static int autom_ap_wds[MAX_PARM_DEVICES] = { 0, DEF_INTS };
36module_param_array(autom_ap_wds, int, NULL, 0444);
37MODULE_PARM_DESC(autom_ap_wds, "Add WDS connections to other APs "
38 "automatically");
39
40
41static struct sta_info* ap_get_sta(struct ap_data *ap, u8 *sta);
42static void hostap_event_expired_sta(struct net_device *dev,
43 struct sta_info *sta);
44static void handle_add_proc_queue(void *data);
45
46#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
47static void handle_wds_oper_queue(void *data);
48static void prism2_send_mgmt(struct net_device *dev,
49 u16 type_subtype, char *body,
50 int body_len, u8 *addr, u16 tx_cb_idx);
51#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
52
53
54#ifndef PRISM2_NO_PROCFS_DEBUG
55static int ap_debug_proc_read(char *page, char **start, off_t off,
56 int count, int *eof, void *data)
57{
58 char *p = page;
59 struct ap_data *ap = (struct ap_data *) data;
60
61 if (off != 0) {
62 *eof = 1;
63 return 0;
64 }
65
66 p += sprintf(p, "BridgedUnicastFrames=%u\n", ap->bridged_unicast);
67 p += sprintf(p, "BridgedMulticastFrames=%u\n", ap->bridged_multicast);
68 p += sprintf(p, "max_inactivity=%u\n", ap->max_inactivity / HZ);
69 p += sprintf(p, "bridge_packets=%u\n", ap->bridge_packets);
70 p += sprintf(p, "nullfunc_ack=%u\n", ap->nullfunc_ack);
71 p += sprintf(p, "autom_ap_wds=%u\n", ap->autom_ap_wds);
72 p += sprintf(p, "auth_algs=%u\n", ap->local->auth_algs);
73 p += sprintf(p, "tx_drop_nonassoc=%u\n", ap->tx_drop_nonassoc);
74
75 return (p - page);
76}
77#endif /* PRISM2_NO_PROCFS_DEBUG */
78
79
80static void ap_sta_hash_add(struct ap_data *ap, struct sta_info *sta)
81{
82 sta->hnext = ap->sta_hash[STA_HASH(sta->addr)];
83 ap->sta_hash[STA_HASH(sta->addr)] = sta;
84}
85
86static void ap_sta_hash_del(struct ap_data *ap, struct sta_info *sta)
87{
88 struct sta_info *s;
89
90 s = ap->sta_hash[STA_HASH(sta->addr)];
91 if (s == NULL) return;
92 if (memcmp(s->addr, sta->addr, ETH_ALEN) == 0) {
93 ap->sta_hash[STA_HASH(sta->addr)] = s->hnext;
94 return;
95 }
96
97 while (s->hnext != NULL && memcmp(s->hnext->addr, sta->addr, ETH_ALEN)
98 != 0)
99 s = s->hnext;
100 if (s->hnext != NULL)
101 s->hnext = s->hnext->hnext;
102 else
103 printk("AP: could not remove STA " MACSTR " from hash table\n",
104 MAC2STR(sta->addr));
105}
106
107static void ap_free_sta(struct ap_data *ap, struct sta_info *sta)
108{
109 if (sta->ap && sta->local)
110 hostap_event_expired_sta(sta->local->dev, sta);
111
112 if (ap->proc != NULL) {
113 char name[20];
114 sprintf(name, MACSTR, MAC2STR(sta->addr));
115 remove_proc_entry(name, ap->proc);
116 }
117
118 if (sta->crypt) {
119 sta->crypt->ops->deinit(sta->crypt->priv);
120 kfree(sta->crypt);
121 sta->crypt = NULL;
122 }
123
124 skb_queue_purge(&sta->tx_buf);
125
126 ap->num_sta--;
127#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
128 if (sta->aid > 0)
129 ap->sta_aid[sta->aid - 1] = NULL;
130
131 if (!sta->ap && sta->u.sta.challenge)
132 kfree(sta->u.sta.challenge);
133 del_timer(&sta->timer);
134#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
135
136 kfree(sta);
137}
138
139
140static void hostap_set_tim(local_info_t *local, int aid, int set)
141{
142 if (local->func->set_tim)
143 local->func->set_tim(local->dev, aid, set);
144}
145
146
147static void hostap_event_new_sta(struct net_device *dev, struct sta_info *sta)
148{
149 union iwreq_data wrqu;
150 memset(&wrqu, 0, sizeof(wrqu));
151 memcpy(wrqu.addr.sa_data, sta->addr, ETH_ALEN);
152 wrqu.addr.sa_family = ARPHRD_ETHER;
153 wireless_send_event(dev, IWEVREGISTERED, &wrqu, NULL);
154}
155
156
157static void hostap_event_expired_sta(struct net_device *dev,
158 struct sta_info *sta)
159{
160 union iwreq_data wrqu;
161 memset(&wrqu, 0, sizeof(wrqu));
162 memcpy(wrqu.addr.sa_data, sta->addr, ETH_ALEN);
163 wrqu.addr.sa_family = ARPHRD_ETHER;
164 wireless_send_event(dev, IWEVEXPIRED, &wrqu, NULL);
165}
166
167
168#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
169
170static void ap_handle_timer(unsigned long data)
171{
172 struct sta_info *sta = (struct sta_info *) data;
173 local_info_t *local;
174 struct ap_data *ap;
175 unsigned long next_time = 0;
176 int was_assoc;
177
178 if (sta == NULL || sta->local == NULL || sta->local->ap == NULL) {
179 PDEBUG(DEBUG_AP, "ap_handle_timer() called with NULL data\n");
180 return;
181 }
182
183 local = sta->local;
184 ap = local->ap;
185 was_assoc = sta->flags & WLAN_STA_ASSOC;
186
187 if (atomic_read(&sta->users) != 0)
188 next_time = jiffies + HZ;
189 else if ((sta->flags & WLAN_STA_PERM) && !(sta->flags & WLAN_STA_AUTH))
190 next_time = jiffies + ap->max_inactivity;
191
192 if (time_before(jiffies, sta->last_rx + ap->max_inactivity)) {
193 /* station activity detected; reset timeout state */
194 sta->timeout_next = STA_NULLFUNC;
195 next_time = sta->last_rx + ap->max_inactivity;
196 } else if (sta->timeout_next == STA_DISASSOC &&
197 !(sta->flags & WLAN_STA_PENDING_POLL)) {
198 /* STA ACKed data nullfunc frame poll */
199 sta->timeout_next = STA_NULLFUNC;
200 next_time = jiffies + ap->max_inactivity;
201 }
202
203 if (next_time) {
204 sta->timer.expires = next_time;
205 add_timer(&sta->timer);
206 return;
207 }
208
209 if (sta->ap)
210 sta->timeout_next = STA_DEAUTH;
211
212 if (sta->timeout_next == STA_DEAUTH && !(sta->flags & WLAN_STA_PERM)) {
213 spin_lock(&ap->sta_table_lock);
214 ap_sta_hash_del(ap, sta);
215 list_del(&sta->list);
216 spin_unlock(&ap->sta_table_lock);
217 sta->flags &= ~(WLAN_STA_AUTH | WLAN_STA_ASSOC);
218 } else if (sta->timeout_next == STA_DISASSOC)
219 sta->flags &= ~WLAN_STA_ASSOC;
220
221 if (was_assoc && !(sta->flags & WLAN_STA_ASSOC) && !sta->ap)
222 hostap_event_expired_sta(local->dev, sta);
223
224 if (sta->timeout_next == STA_DEAUTH && sta->aid > 0 &&
225 !skb_queue_empty(&sta->tx_buf)) {
226 hostap_set_tim(local, sta->aid, 0);
227 sta->flags &= ~WLAN_STA_TIM;
228 }
229
230 if (sta->ap) {
231 if (ap->autom_ap_wds) {
232 PDEBUG(DEBUG_AP, "%s: removing automatic WDS "
233 "connection to AP " MACSTR "\n",
234 local->dev->name, MAC2STR(sta->addr));
235 hostap_wds_link_oper(local, sta->addr, WDS_DEL);
236 }
237 } else if (sta->timeout_next == STA_NULLFUNC) {
238 /* send data frame to poll STA and check whether this frame
239 * is ACKed */
240 /* FIX: IEEE80211_STYPE_NULLFUNC would be more appropriate, but
241 * it is apparently not retried so TX Exc events are not
242 * received for it */
243 sta->flags |= WLAN_STA_PENDING_POLL;
244 prism2_send_mgmt(local->dev, IEEE80211_FTYPE_DATA |
245 IEEE80211_STYPE_DATA, NULL, 0,
246 sta->addr, ap->tx_callback_poll);
247 } else {
248 int deauth = sta->timeout_next == STA_DEAUTH;
249 u16 resp;
250 PDEBUG(DEBUG_AP, "%s: sending %s info to STA " MACSTR
251 "(last=%lu, jiffies=%lu)\n",
252 local->dev->name,
253 deauth ? "deauthentication" : "disassociation",
254 MAC2STR(sta->addr), sta->last_rx, jiffies);
255
256 resp = cpu_to_le16(deauth ? WLAN_REASON_PREV_AUTH_NOT_VALID :
257 WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY);
258 prism2_send_mgmt(local->dev, IEEE80211_FTYPE_MGMT |
259 (deauth ? IEEE80211_STYPE_DEAUTH :
260 IEEE80211_STYPE_DISASSOC),
261 (char *) &resp, 2, sta->addr, 0);
262 }
263
264 if (sta->timeout_next == STA_DEAUTH) {
265 if (sta->flags & WLAN_STA_PERM) {
266 PDEBUG(DEBUG_AP, "%s: STA " MACSTR " would have been "
267 "removed, but it has 'perm' flag\n",
268 local->dev->name, MAC2STR(sta->addr));
269 } else
270 ap_free_sta(ap, sta);
271 return;
272 }
273
274 if (sta->timeout_next == STA_NULLFUNC) {
275 sta->timeout_next = STA_DISASSOC;
276 sta->timer.expires = jiffies + AP_DISASSOC_DELAY;
277 } else {
278 sta->timeout_next = STA_DEAUTH;
279 sta->timer.expires = jiffies + AP_DEAUTH_DELAY;
280 }
281
282 add_timer(&sta->timer);
283}
284
285
286void hostap_deauth_all_stas(struct net_device *dev, struct ap_data *ap,
287 int resend)
288{
289 u8 addr[ETH_ALEN];
290 u16 resp;
291 int i;
292
293 PDEBUG(DEBUG_AP, "%s: Deauthenticate all stations\n", dev->name);
294 memset(addr, 0xff, ETH_ALEN);
295
296 resp = __constant_cpu_to_le16(WLAN_REASON_PREV_AUTH_NOT_VALID);
297
298 /* deauth message sent; try to resend it few times; the message is
299 * broadcast, so it may be delayed until next DTIM; there is not much
300 * else we can do at this point since the driver is going to be shut
301 * down */
302 for (i = 0; i < 5; i++) {
303 prism2_send_mgmt(dev, IEEE80211_FTYPE_MGMT |
304 IEEE80211_STYPE_DEAUTH,
305 (char *) &resp, 2, addr, 0);
306
307 if (!resend || ap->num_sta <= 0)
308 return;
309
310 mdelay(50);
311 }
312}
313
314
315static int ap_control_proc_read(char *page, char **start, off_t off,
316 int count, int *eof, void *data)
317{
318 char *p = page;
319 struct ap_data *ap = (struct ap_data *) data;
320 char *policy_txt;
321 struct list_head *ptr;
322 struct mac_entry *entry;
323
324 if (off != 0) {
325 *eof = 1;
326 return 0;
327 }
328
329 switch (ap->mac_restrictions.policy) {
330 case MAC_POLICY_OPEN:
331 policy_txt = "open";
332 break;
333 case MAC_POLICY_ALLOW:
334 policy_txt = "allow";
335 break;
336 case MAC_POLICY_DENY:
337 policy_txt = "deny";
338 break;
339 default:
340 policy_txt = "unknown";
341 break;
342 };
343 p += sprintf(p, "MAC policy: %s\n", policy_txt);
344 p += sprintf(p, "MAC entries: %u\n", ap->mac_restrictions.entries);
345 p += sprintf(p, "MAC list:\n");
346 spin_lock_bh(&ap->mac_restrictions.lock);
347 for (ptr = ap->mac_restrictions.mac_list.next;
348 ptr != &ap->mac_restrictions.mac_list; ptr = ptr->next) {
349 if (p - page > PAGE_SIZE - 80) {
350 p += sprintf(p, "All entries did not fit one page.\n");
351 break;
352 }
353
354 entry = list_entry(ptr, struct mac_entry, list);
355 p += sprintf(p, MACSTR "\n", MAC2STR(entry->addr));
356 }
357 spin_unlock_bh(&ap->mac_restrictions.lock);
358
359 return (p - page);
360}
361
362
363static int ap_control_add_mac(struct mac_restrictions *mac_restrictions,
364 u8 *mac)
365{
366 struct mac_entry *entry;
367
368 entry = kmalloc(sizeof(struct mac_entry), GFP_KERNEL);
369 if (entry == NULL)
370 return -1;
371
372 memcpy(entry->addr, mac, ETH_ALEN);
373
374 spin_lock_bh(&mac_restrictions->lock);
375 list_add_tail(&entry->list, &mac_restrictions->mac_list);
376 mac_restrictions->entries++;
377 spin_unlock_bh(&mac_restrictions->lock);
378
379 return 0;
380}
381
382
383static int ap_control_del_mac(struct mac_restrictions *mac_restrictions,
384 u8 *mac)
385{
386 struct list_head *ptr;
387 struct mac_entry *entry;
388
389 spin_lock_bh(&mac_restrictions->lock);
390 for (ptr = mac_restrictions->mac_list.next;
391 ptr != &mac_restrictions->mac_list; ptr = ptr->next) {
392 entry = list_entry(ptr, struct mac_entry, list);
393
394 if (memcmp(entry->addr, mac, ETH_ALEN) == 0) {
395 list_del(ptr);
396 kfree(entry);
397 mac_restrictions->entries--;
398 spin_unlock_bh(&mac_restrictions->lock);
399 return 0;
400 }
401 }
402 spin_unlock_bh(&mac_restrictions->lock);
403 return -1;
404}
405
406
407static int ap_control_mac_deny(struct mac_restrictions *mac_restrictions,
408 u8 *mac)
409{
410 struct list_head *ptr;
411 struct mac_entry *entry;
412 int found = 0;
413
414 if (mac_restrictions->policy == MAC_POLICY_OPEN)
415 return 0;
416
417 spin_lock_bh(&mac_restrictions->lock);
418 for (ptr = mac_restrictions->mac_list.next;
419 ptr != &mac_restrictions->mac_list; ptr = ptr->next) {
420 entry = list_entry(ptr, struct mac_entry, list);
421
422 if (memcmp(entry->addr, mac, ETH_ALEN) == 0) {
423 found = 1;
424 break;
425 }
426 }
427 spin_unlock_bh(&mac_restrictions->lock);
428
429 if (mac_restrictions->policy == MAC_POLICY_ALLOW)
430 return !found;
431 else
432 return found;
433}
434
435
436static void ap_control_flush_macs(struct mac_restrictions *mac_restrictions)
437{
438 struct list_head *ptr, *n;
439 struct mac_entry *entry;
440
441 if (mac_restrictions->entries == 0)
442 return;
443
444 spin_lock_bh(&mac_restrictions->lock);
445 for (ptr = mac_restrictions->mac_list.next, n = ptr->next;
446 ptr != &mac_restrictions->mac_list;
447 ptr = n, n = ptr->next) {
448 entry = list_entry(ptr, struct mac_entry, list);
449 list_del(ptr);
450 kfree(entry);
451 }
452 mac_restrictions->entries = 0;
453 spin_unlock_bh(&mac_restrictions->lock);
454}
455
456
457static int ap_control_kick_mac(struct ap_data *ap, struct net_device *dev,
458 u8 *mac)
459{
460 struct sta_info *sta;
461 u16 resp;
462
463 spin_lock_bh(&ap->sta_table_lock);
464 sta = ap_get_sta(ap, mac);
465 if (sta) {
466 ap_sta_hash_del(ap, sta);
467 list_del(&sta->list);
468 }
469 spin_unlock_bh(&ap->sta_table_lock);
470
471 if (!sta)
472 return -EINVAL;
473
474 resp = cpu_to_le16(WLAN_REASON_PREV_AUTH_NOT_VALID);
475 prism2_send_mgmt(dev, IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_DEAUTH,
476 (char *) &resp, 2, sta->addr, 0);
477
478 if ((sta->flags & WLAN_STA_ASSOC) && !sta->ap)
479 hostap_event_expired_sta(dev, sta);
480
481 ap_free_sta(ap, sta);
482
483 return 0;
484}
485
486#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
487
488
489static void ap_control_kickall(struct ap_data *ap)
490{
491 struct list_head *ptr, *n;
492 struct sta_info *sta;
493
494 spin_lock_bh(&ap->sta_table_lock);
495 for (ptr = ap->sta_list.next, n = ptr->next; ptr != &ap->sta_list;
496 ptr = n, n = ptr->next) {
497 sta = list_entry(ptr, struct sta_info, list);
498 ap_sta_hash_del(ap, sta);
499 list_del(&sta->list);
500 if ((sta->flags & WLAN_STA_ASSOC) && !sta->ap && sta->local)
501 hostap_event_expired_sta(sta->local->dev, sta);
502 ap_free_sta(ap, sta);
503 }
504 spin_unlock_bh(&ap->sta_table_lock);
505}
506
507
508#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
509
510#define PROC_LIMIT (PAGE_SIZE - 80)
511
512static int prism2_ap_proc_read(char *page, char **start, off_t off,
513 int count, int *eof, void *data)
514{
515 char *p = page;
516 struct ap_data *ap = (struct ap_data *) data;
517 struct list_head *ptr;
518 int i;
519
520 if (off > PROC_LIMIT) {
521 *eof = 1;
522 return 0;
523 }
524
525 p += sprintf(p, "# BSSID CHAN SIGNAL NOISE RATE SSID FLAGS\n");
526 spin_lock_bh(&ap->sta_table_lock);
527 for (ptr = ap->sta_list.next; ptr != &ap->sta_list; ptr = ptr->next) {
528 struct sta_info *sta = (struct sta_info *) ptr;
529
530 if (!sta->ap)
531 continue;
532
533 p += sprintf(p, MACSTR " %d %d %d %d '", MAC2STR(sta->addr),
534 sta->u.ap.channel, sta->last_rx_signal,
535 sta->last_rx_silence, sta->last_rx_rate);
536 for (i = 0; i < sta->u.ap.ssid_len; i++)
537 p += sprintf(p, ((sta->u.ap.ssid[i] >= 32 &&
538 sta->u.ap.ssid[i] < 127) ?
539 "%c" : "<%02x>"),
540 sta->u.ap.ssid[i]);
541 p += sprintf(p, "'");
542 if (sta->capability & WLAN_CAPABILITY_ESS)
543 p += sprintf(p, " [ESS]");
544 if (sta->capability & WLAN_CAPABILITY_IBSS)
545 p += sprintf(p, " [IBSS]");
546 if (sta->capability & WLAN_CAPABILITY_PRIVACY)
547 p += sprintf(p, " [WEP]");
548 p += sprintf(p, "\n");
549
550 if ((p - page) > PROC_LIMIT) {
551 printk(KERN_DEBUG "hostap: ap proc did not fit\n");
552 break;
553 }
554 }
555 spin_unlock_bh(&ap->sta_table_lock);
556
557 if ((p - page) <= off) {
558 *eof = 1;
559 return 0;
560 }
561
562 *start = page + off;
563
564 return (p - page - off);
565}
566#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
567
568
569void hostap_check_sta_fw_version(struct ap_data *ap, int sta_fw_ver)
570{
571 if (!ap)
572 return;
573
574 if (sta_fw_ver == PRISM2_FW_VER(0,8,0)) {
575 PDEBUG(DEBUG_AP, "Using data::nullfunc ACK workaround - "
576 "firmware upgrade recommended\n");
577 ap->nullfunc_ack = 1;
578 } else
579 ap->nullfunc_ack = 0;
580
581 if (sta_fw_ver == PRISM2_FW_VER(1,4,2)) {
582 printk(KERN_WARNING "%s: Warning: secondary station firmware "
583 "version 1.4.2 does not seem to work in Host AP mode\n",
584 ap->local->dev->name);
585 }
586}
587
588
589/* Called only as a tasklet (software IRQ) */
590static void hostap_ap_tx_cb(struct sk_buff *skb, int ok, void *data)
591{
592 struct ap_data *ap = data;
593 u16 fc;
594 struct ieee80211_hdr *hdr;
595
596 if (!ap->local->hostapd || !ap->local->apdev) {
597 dev_kfree_skb(skb);
598 return;
599 }
600
601 hdr = (struct ieee80211_hdr *) skb->data;
602 fc = le16_to_cpu(hdr->frame_ctl);
603
604 /* Pass the TX callback frame to the hostapd; use 802.11 header version
605 * 1 to indicate failure (no ACK) and 2 success (frame ACKed) */
606
607 fc &= ~IEEE80211_FCTL_VERS;
608 fc |= ok ? BIT(1) : BIT(0);
609 hdr->frame_ctl = cpu_to_le16(fc);
610
611 skb->dev = ap->local->apdev;
612 skb_pull(skb, hostap_80211_get_hdrlen(fc));
613 skb->pkt_type = PACKET_OTHERHOST;
614 skb->protocol = __constant_htons(ETH_P_802_2);
615 memset(skb->cb, 0, sizeof(skb->cb));
616 netif_rx(skb);
617}
618
619
620#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
621/* Called only as a tasklet (software IRQ) */
622static void hostap_ap_tx_cb_auth(struct sk_buff *skb, int ok, void *data)
623{
624 struct ap_data *ap = data;
625 struct net_device *dev = ap->local->dev;
626 struct ieee80211_hdr *hdr;
627 u16 fc, *pos, auth_alg, auth_transaction, status;
628 struct sta_info *sta = NULL;
629 char *txt = NULL;
630
631 if (ap->local->hostapd) {
632 dev_kfree_skb(skb);
633 return;
634 }
635
636 hdr = (struct ieee80211_hdr *) skb->data;
637 fc = le16_to_cpu(hdr->frame_ctl);
638 if (WLAN_FC_GET_TYPE(fc) != IEEE80211_FTYPE_MGMT ||
639 WLAN_FC_GET_STYPE(fc) != IEEE80211_STYPE_AUTH ||
640 skb->len < IEEE80211_MGMT_HDR_LEN + 6) {
641 printk(KERN_DEBUG "%s: hostap_ap_tx_cb_auth received invalid "
642 "frame\n", dev->name);
643 dev_kfree_skb(skb);
644 return;
645 }
646
647 pos = (u16 *) (skb->data + IEEE80211_MGMT_HDR_LEN);
648 auth_alg = le16_to_cpu(*pos++);
649 auth_transaction = le16_to_cpu(*pos++);
650 status = le16_to_cpu(*pos++);
651
652 if (!ok) {
653 txt = "frame was not ACKed";
654 goto done;
655 }
656
657 spin_lock(&ap->sta_table_lock);
658 sta = ap_get_sta(ap, hdr->addr1);
659 if (sta)
660 atomic_inc(&sta->users);
661 spin_unlock(&ap->sta_table_lock);
662
663 if (!sta) {
664 txt = "STA not found";
665 goto done;
666 }
667
668 if (status == WLAN_STATUS_SUCCESS &&
669 ((auth_alg == WLAN_AUTH_OPEN && auth_transaction == 2) ||
670 (auth_alg == WLAN_AUTH_SHARED_KEY && auth_transaction == 4))) {
671 txt = "STA authenticated";
672 sta->flags |= WLAN_STA_AUTH;
673 sta->last_auth = jiffies;
674 } else if (status != WLAN_STATUS_SUCCESS)
675 txt = "authentication failed";
676
677 done:
678 if (sta)
679 atomic_dec(&sta->users);
680 if (txt) {
681 PDEBUG(DEBUG_AP, "%s: " MACSTR " auth_cb - alg=%d trans#=%d "
682 "status=%d - %s\n",
683 dev->name, MAC2STR(hdr->addr1), auth_alg,
684 auth_transaction, status, txt);
685 }
686 dev_kfree_skb(skb);
687}
688
689
690/* Called only as a tasklet (software IRQ) */
691static void hostap_ap_tx_cb_assoc(struct sk_buff *skb, int ok, void *data)
692{
693 struct ap_data *ap = data;
694 struct net_device *dev = ap->local->dev;
695 struct ieee80211_hdr *hdr;
696 u16 fc, *pos, status;
697 struct sta_info *sta = NULL;
698 char *txt = NULL;
699
700 if (ap->local->hostapd) {
701 dev_kfree_skb(skb);
702 return;
703 }
704
705 hdr = (struct ieee80211_hdr *) skb->data;
706 fc = le16_to_cpu(hdr->frame_ctl);
707 if (WLAN_FC_GET_TYPE(fc) != IEEE80211_FTYPE_MGMT ||
708 (WLAN_FC_GET_STYPE(fc) != IEEE80211_STYPE_ASSOC_RESP &&
709 WLAN_FC_GET_STYPE(fc) != IEEE80211_STYPE_REASSOC_RESP) ||
710 skb->len < IEEE80211_MGMT_HDR_LEN + 4) {
711 printk(KERN_DEBUG "%s: hostap_ap_tx_cb_assoc received invalid "
712 "frame\n", dev->name);
713 dev_kfree_skb(skb);
714 return;
715 }
716
717 if (!ok) {
718 txt = "frame was not ACKed";
719 goto done;
720 }
721
722 spin_lock(&ap->sta_table_lock);
723 sta = ap_get_sta(ap, hdr->addr1);
724 if (sta)
725 atomic_inc(&sta->users);
726 spin_unlock(&ap->sta_table_lock);
727
728 if (!sta) {
729 txt = "STA not found";
730 goto done;
731 }
732
733 pos = (u16 *) (skb->data + IEEE80211_MGMT_HDR_LEN);
734 pos++;
735 status = le16_to_cpu(*pos++);
736 if (status == WLAN_STATUS_SUCCESS) {
737 if (!(sta->flags & WLAN_STA_ASSOC))
738 hostap_event_new_sta(dev, sta);
739 txt = "STA associated";
740 sta->flags |= WLAN_STA_ASSOC;
741 sta->last_assoc = jiffies;
742 } else
743 txt = "association failed";
744
745 done:
746 if (sta)
747 atomic_dec(&sta->users);
748 if (txt) {
749 PDEBUG(DEBUG_AP, "%s: " MACSTR " assoc_cb - %s\n",
750 dev->name, MAC2STR(hdr->addr1), txt);
751 }
752 dev_kfree_skb(skb);
753}
754
755/* Called only as a tasklet (software IRQ); TX callback for poll frames used
756 * in verifying whether the STA is still present. */
757static void hostap_ap_tx_cb_poll(struct sk_buff *skb, int ok, void *data)
758{
759 struct ap_data *ap = data;
760 struct ieee80211_hdr *hdr;
761 struct sta_info *sta;
762
763 if (skb->len < 24)
764 goto fail;
765 hdr = (struct ieee80211_hdr *) skb->data;
766 if (ok) {
767 spin_lock(&ap->sta_table_lock);
768 sta = ap_get_sta(ap, hdr->addr1);
769 if (sta)
770 sta->flags &= ~WLAN_STA_PENDING_POLL;
771 spin_unlock(&ap->sta_table_lock);
772 } else {
773 PDEBUG(DEBUG_AP, "%s: STA " MACSTR " did not ACK activity "
774 "poll frame\n", ap->local->dev->name,
775 MAC2STR(hdr->addr1));
776 }
777
778 fail:
779 dev_kfree_skb(skb);
780}
781#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
782
783
784void hostap_init_data(local_info_t *local)
785{
786 struct ap_data *ap = local->ap;
787
788 if (ap == NULL) {
789 printk(KERN_WARNING "hostap_init_data: ap == NULL\n");
790 return;
791 }
792 memset(ap, 0, sizeof(struct ap_data));
793 ap->local = local;
794
795 ap->ap_policy = GET_INT_PARM(other_ap_policy, local->card_idx);
796 ap->bridge_packets = GET_INT_PARM(ap_bridge_packets, local->card_idx);
797 ap->max_inactivity =
798 GET_INT_PARM(ap_max_inactivity, local->card_idx) * HZ;
799 ap->autom_ap_wds = GET_INT_PARM(autom_ap_wds, local->card_idx);
800
801 spin_lock_init(&ap->sta_table_lock);
802 INIT_LIST_HEAD(&ap->sta_list);
803
804 /* Initialize task queue structure for AP management */
805 INIT_WORK(&local->ap->add_sta_proc_queue, handle_add_proc_queue, ap);
806
807 ap->tx_callback_idx =
808 hostap_tx_callback_register(local, hostap_ap_tx_cb, ap);
809 if (ap->tx_callback_idx == 0)
810 printk(KERN_WARNING "%s: failed to register TX callback for "
811 "AP\n", local->dev->name);
812#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
813 INIT_WORK(&local->ap->wds_oper_queue, handle_wds_oper_queue, local);
814
815 ap->tx_callback_auth =
816 hostap_tx_callback_register(local, hostap_ap_tx_cb_auth, ap);
817 ap->tx_callback_assoc =
818 hostap_tx_callback_register(local, hostap_ap_tx_cb_assoc, ap);
819 ap->tx_callback_poll =
820 hostap_tx_callback_register(local, hostap_ap_tx_cb_poll, ap);
821 if (ap->tx_callback_auth == 0 || ap->tx_callback_assoc == 0 ||
822 ap->tx_callback_poll == 0)
823 printk(KERN_WARNING "%s: failed to register TX callback for "
824 "AP\n", local->dev->name);
825
826 spin_lock_init(&ap->mac_restrictions.lock);
827 INIT_LIST_HEAD(&ap->mac_restrictions.mac_list);
828#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
829
830 ap->initialized = 1;
831}
832
833
834void hostap_init_ap_proc(local_info_t *local)
835{
836 struct ap_data *ap = local->ap;
837
838 ap->proc = local->proc;
839 if (ap->proc == NULL)
840 return;
841
842#ifndef PRISM2_NO_PROCFS_DEBUG
843 create_proc_read_entry("ap_debug", 0, ap->proc,
844 ap_debug_proc_read, ap);
845#endif /* PRISM2_NO_PROCFS_DEBUG */
846
847#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
848 create_proc_read_entry("ap_control", 0, ap->proc,
849 ap_control_proc_read, ap);
850 create_proc_read_entry("ap", 0, ap->proc,
851 prism2_ap_proc_read, ap);
852#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
853
854}
855
856
857void hostap_free_data(struct ap_data *ap)
858{
859 struct list_head *n, *ptr;
860
861 if (ap == NULL || !ap->initialized) {
862 printk(KERN_DEBUG "hostap_free_data: ap has not yet been "
863 "initialized - skip resource freeing\n");
864 return;
865 }
866
867#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
868 if (ap->crypt)
869 ap->crypt->deinit(ap->crypt_priv);
870 ap->crypt = ap->crypt_priv = NULL;
871#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
872
873 list_for_each_safe(ptr, n, &ap->sta_list) {
874 struct sta_info *sta = list_entry(ptr, struct sta_info, list);
875 ap_sta_hash_del(ap, sta);
876 list_del(&sta->list);
877 if ((sta->flags & WLAN_STA_ASSOC) && !sta->ap && sta->local)
878 hostap_event_expired_sta(sta->local->dev, sta);
879 ap_free_sta(ap, sta);
880 }
881
882#ifndef PRISM2_NO_PROCFS_DEBUG
883 if (ap->proc != NULL) {
884 remove_proc_entry("ap_debug", ap->proc);
885 }
886#endif /* PRISM2_NO_PROCFS_DEBUG */
887
888#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
889 if (ap->proc != NULL) {
890 remove_proc_entry("ap", ap->proc);
891 remove_proc_entry("ap_control", ap->proc);
892 }
893 ap_control_flush_macs(&ap->mac_restrictions);
894#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
895
896 ap->initialized = 0;
897}
898
899
900/* caller should have mutex for AP STA list handling */
901static struct sta_info* ap_get_sta(struct ap_data *ap, u8 *sta)
902{
903 struct sta_info *s;
904
905 s = ap->sta_hash[STA_HASH(sta)];
906 while (s != NULL && memcmp(s->addr, sta, ETH_ALEN) != 0)
907 s = s->hnext;
908 return s;
909}
910
911
912#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
913
914/* Called from timer handler and from scheduled AP queue handlers */
915static void prism2_send_mgmt(struct net_device *dev,
916 u16 type_subtype, char *body,
917 int body_len, u8 *addr, u16 tx_cb_idx)
918{
919 struct hostap_interface *iface;
920 local_info_t *local;
921 struct ieee80211_hdr *hdr;
922 u16 fc;
923 struct sk_buff *skb;
924 struct hostap_skb_tx_data *meta;
925 int hdrlen;
926
927 iface = netdev_priv(dev);
928 local = iface->local;
929 dev = local->dev; /* always use master radio device */
930 iface = netdev_priv(dev);
931
932 if (!(dev->flags & IFF_UP)) {
933 PDEBUG(DEBUG_AP, "%s: prism2_send_mgmt - device is not UP - "
934 "cannot send frame\n", dev->name);
935 return;
936 }
937
938 skb = dev_alloc_skb(sizeof(*hdr) + body_len);
939 if (skb == NULL) {
940 PDEBUG(DEBUG_AP, "%s: prism2_send_mgmt failed to allocate "
941 "skb\n", dev->name);
942 return;
943 }
944
945 fc = type_subtype;
946 hdrlen = hostap_80211_get_hdrlen(fc);
947 hdr = (struct ieee80211_hdr *) skb_put(skb, hdrlen);
948 if (body)
949 memcpy(skb_put(skb, body_len), body, body_len);
950
951 memset(hdr, 0, hdrlen);
952
953 /* FIX: ctrl::ack sending used special HFA384X_TX_CTRL_802_11
954 * tx_control instead of using local->tx_control */
955
956
957 memcpy(hdr->addr1, addr, ETH_ALEN); /* DA / RA */
958 if (WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) {
959 fc |= IEEE80211_FCTL_FROMDS;
960 memcpy(hdr->addr2, dev->dev_addr, ETH_ALEN); /* BSSID */
961 memcpy(hdr->addr3, dev->dev_addr, ETH_ALEN); /* SA */
962 } else if (WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_CTL) {
963 /* control:ACK does not have addr2 or addr3 */
964 memset(hdr->addr2, 0, ETH_ALEN);
965 memset(hdr->addr3, 0, ETH_ALEN);
966 } else {
967 memcpy(hdr->addr2, dev->dev_addr, ETH_ALEN); /* SA */
968 memcpy(hdr->addr3, dev->dev_addr, ETH_ALEN); /* BSSID */
969 }
970
971 hdr->frame_ctl = cpu_to_le16(fc);
972
973 meta = (struct hostap_skb_tx_data *) skb->cb;
974 memset(meta, 0, sizeof(*meta));
975 meta->magic = HOSTAP_SKB_TX_DATA_MAGIC;
976 meta->iface = iface;
977 meta->tx_cb_idx = tx_cb_idx;
978
979 skb->dev = dev;
980 skb->mac.raw = skb->nh.raw = skb->data;
981 dev_queue_xmit(skb);
982}
983#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
984
985
986static int prism2_sta_proc_read(char *page, char **start, off_t off,
987 int count, int *eof, void *data)
988{
989 char *p = page;
990 struct sta_info *sta = (struct sta_info *) data;
991 int i;
992
993 /* FIX: possible race condition.. the STA data could have just expired,
994 * but proc entry was still here so that the read could have started;
995 * some locking should be done here.. */
996
997 if (off != 0) {
998 *eof = 1;
999 return 0;
1000 }
1001
1002 p += sprintf(p, "%s=" MACSTR "\nusers=%d\naid=%d\n"
1003 "flags=0x%04x%s%s%s%s%s%s%s\n"
1004 "capability=0x%02x\nlisten_interval=%d\nsupported_rates=",
1005 sta->ap ? "AP" : "STA",
1006 MAC2STR(sta->addr), atomic_read(&sta->users), sta->aid,
1007 sta->flags,
1008 sta->flags & WLAN_STA_AUTH ? " AUTH" : "",
1009 sta->flags & WLAN_STA_ASSOC ? " ASSOC" : "",
1010 sta->flags & WLAN_STA_PS ? " PS" : "",
1011 sta->flags & WLAN_STA_TIM ? " TIM" : "",
1012 sta->flags & WLAN_STA_PERM ? " PERM" : "",
1013 sta->flags & WLAN_STA_AUTHORIZED ? " AUTHORIZED" : "",
1014 sta->flags & WLAN_STA_PENDING_POLL ? " POLL" : "",
1015 sta->capability, sta->listen_interval);
1016 /* supported_rates: 500 kbit/s units with msb ignored */
1017 for (i = 0; i < sizeof(sta->supported_rates); i++)
1018 if (sta->supported_rates[i] != 0)
1019 p += sprintf(p, "%d%sMbps ",
1020 (sta->supported_rates[i] & 0x7f) / 2,
1021 sta->supported_rates[i] & 1 ? ".5" : "");
1022 p += sprintf(p, "\njiffies=%lu\nlast_auth=%lu\nlast_assoc=%lu\n"
1023 "last_rx=%lu\nlast_tx=%lu\nrx_packets=%lu\n"
1024 "tx_packets=%lu\n"
1025 "rx_bytes=%lu\ntx_bytes=%lu\nbuffer_count=%d\n"
1026 "last_rx: silence=%d dBm signal=%d dBm rate=%d%s Mbps\n"
1027 "tx_rate=%d\ntx[1M]=%d\ntx[2M]=%d\ntx[5.5M]=%d\n"
1028 "tx[11M]=%d\n"
1029 "rx[1M]=%d\nrx[2M]=%d\nrx[5.5M]=%d\nrx[11M]=%d\n",
1030 jiffies, sta->last_auth, sta->last_assoc, sta->last_rx,
1031 sta->last_tx,
1032 sta->rx_packets, sta->tx_packets, sta->rx_bytes,
1033 sta->tx_bytes, skb_queue_len(&sta->tx_buf),
1034 sta->last_rx_silence,
1035 sta->last_rx_signal, sta->last_rx_rate / 10,
1036 sta->last_rx_rate % 10 ? ".5" : "",
1037 sta->tx_rate, sta->tx_count[0], sta->tx_count[1],
1038 sta->tx_count[2], sta->tx_count[3], sta->rx_count[0],
1039 sta->rx_count[1], sta->rx_count[2], sta->rx_count[3]);
1040 if (sta->crypt && sta->crypt->ops && sta->crypt->ops->print_stats)
1041 p = sta->crypt->ops->print_stats(p, sta->crypt->priv);
1042#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
1043 if (sta->ap) {
1044 if (sta->u.ap.channel >= 0)
1045 p += sprintf(p, "channel=%d\n", sta->u.ap.channel);
1046 p += sprintf(p, "ssid=");
1047 for (i = 0; i < sta->u.ap.ssid_len; i++)
1048 p += sprintf(p, ((sta->u.ap.ssid[i] >= 32 &&
1049 sta->u.ap.ssid[i] < 127) ?
1050 "%c" : "<%02x>"),
1051 sta->u.ap.ssid[i]);
1052 p += sprintf(p, "\n");
1053 }
1054#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
1055
1056 return (p - page);
1057}
1058
1059
1060static void handle_add_proc_queue(void *data)
1061{
1062 struct ap_data *ap = (struct ap_data *) data;
1063 struct sta_info *sta;
1064 char name[20];
1065 struct add_sta_proc_data *entry, *prev;
1066
1067 entry = ap->add_sta_proc_entries;
1068 ap->add_sta_proc_entries = NULL;
1069
1070 while (entry) {
1071 spin_lock_bh(&ap->sta_table_lock);
1072 sta = ap_get_sta(ap, entry->addr);
1073 if (sta)
1074 atomic_inc(&sta->users);
1075 spin_unlock_bh(&ap->sta_table_lock);
1076
1077 if (sta) {
1078 sprintf(name, MACSTR, MAC2STR(sta->addr));
1079 sta->proc = create_proc_read_entry(
1080 name, 0, ap->proc,
1081 prism2_sta_proc_read, sta);
1082
1083 atomic_dec(&sta->users);
1084 }
1085
1086 prev = entry;
1087 entry = entry->next;
1088 kfree(prev);
1089 }
1090}
1091
1092
1093static struct sta_info * ap_add_sta(struct ap_data *ap, u8 *addr)
1094{
1095 struct sta_info *sta;
1096
1097 sta = (struct sta_info *)
1098 kmalloc(sizeof(struct sta_info), GFP_ATOMIC);
1099 if (sta == NULL) {
1100 PDEBUG(DEBUG_AP, "AP: kmalloc failed\n");
1101 return NULL;
1102 }
1103
1104 /* initialize STA info data */
1105 memset(sta, 0, sizeof(struct sta_info));
1106 sta->local = ap->local;
1107 skb_queue_head_init(&sta->tx_buf);
1108 memcpy(sta->addr, addr, ETH_ALEN);
1109
1110 atomic_inc(&sta->users);
1111 spin_lock_bh(&ap->sta_table_lock);
1112 list_add(&sta->list, &ap->sta_list);
1113 ap->num_sta++;
1114 ap_sta_hash_add(ap, sta);
1115 spin_unlock_bh(&ap->sta_table_lock);
1116
1117 if (ap->proc) {
1118 struct add_sta_proc_data *entry;
1119 /* schedule a non-interrupt context process to add a procfs
1120 * entry for the STA since procfs code use GFP_KERNEL */
1121 entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
1122 if (entry) {
1123 memcpy(entry->addr, sta->addr, ETH_ALEN);
1124 entry->next = ap->add_sta_proc_entries;
1125 ap->add_sta_proc_entries = entry;
1126 schedule_work(&ap->add_sta_proc_queue);
1127 } else
1128 printk(KERN_DEBUG "Failed to add STA proc data\n");
1129 }
1130
1131#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
1132 init_timer(&sta->timer);
1133 sta->timer.expires = jiffies + ap->max_inactivity;
1134 sta->timer.data = (unsigned long) sta;
1135 sta->timer.function = ap_handle_timer;
1136 if (!ap->local->hostapd)
1137 add_timer(&sta->timer);
1138#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
1139
1140 return sta;
1141}
1142
1143
1144static int ap_tx_rate_ok(int rateidx, struct sta_info *sta,
1145 local_info_t *local)
1146{
1147 if (rateidx > sta->tx_max_rate ||
1148 !(sta->tx_supp_rates & (1 << rateidx)))
1149 return 0;
1150
1151 if (local->tx_rate_control != 0 &&
1152 !(local->tx_rate_control & (1 << rateidx)))
1153 return 0;
1154
1155 return 1;
1156}
1157
1158
1159static void prism2_check_tx_rates(struct sta_info *sta)
1160{
1161 int i;
1162
1163 sta->tx_supp_rates = 0;
1164 for (i = 0; i < sizeof(sta->supported_rates); i++) {
1165 if ((sta->supported_rates[i] & 0x7f) == 2)
1166 sta->tx_supp_rates |= WLAN_RATE_1M;
1167 if ((sta->supported_rates[i] & 0x7f) == 4)
1168 sta->tx_supp_rates |= WLAN_RATE_2M;
1169 if ((sta->supported_rates[i] & 0x7f) == 11)
1170 sta->tx_supp_rates |= WLAN_RATE_5M5;
1171 if ((sta->supported_rates[i] & 0x7f) == 22)
1172 sta->tx_supp_rates |= WLAN_RATE_11M;
1173 }
1174 sta->tx_max_rate = sta->tx_rate = sta->tx_rate_idx = 0;
1175 if (sta->tx_supp_rates & WLAN_RATE_1M) {
1176 sta->tx_max_rate = 0;
1177 if (ap_tx_rate_ok(0, sta, sta->local)) {
1178 sta->tx_rate = 10;
1179 sta->tx_rate_idx = 0;
1180 }
1181 }
1182 if (sta->tx_supp_rates & WLAN_RATE_2M) {
1183 sta->tx_max_rate = 1;
1184 if (ap_tx_rate_ok(1, sta, sta->local)) {
1185 sta->tx_rate = 20;
1186 sta->tx_rate_idx = 1;
1187 }
1188 }
1189 if (sta->tx_supp_rates & WLAN_RATE_5M5) {
1190 sta->tx_max_rate = 2;
1191 if (ap_tx_rate_ok(2, sta, sta->local)) {
1192 sta->tx_rate = 55;
1193 sta->tx_rate_idx = 2;
1194 }
1195 }
1196 if (sta->tx_supp_rates & WLAN_RATE_11M) {
1197 sta->tx_max_rate = 3;
1198 if (ap_tx_rate_ok(3, sta, sta->local)) {
1199 sta->tx_rate = 110;
1200 sta->tx_rate_idx = 3;
1201 }
1202 }
1203}
1204
1205
1206#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
1207
1208static void ap_crypt_init(struct ap_data *ap)
1209{
1210 ap->crypt = ieee80211_get_crypto_ops("WEP");
1211
1212 if (ap->crypt) {
1213 if (ap->crypt->init) {
1214 ap->crypt_priv = ap->crypt->init(0);
1215 if (ap->crypt_priv == NULL)
1216 ap->crypt = NULL;
1217 else {
1218 u8 key[WEP_KEY_LEN];
1219 get_random_bytes(key, WEP_KEY_LEN);
1220 ap->crypt->set_key(key, WEP_KEY_LEN, NULL,
1221 ap->crypt_priv);
1222 }
1223 }
1224 }
1225
1226 if (ap->crypt == NULL) {
1227 printk(KERN_WARNING "AP could not initialize WEP: load module "
1228 "ieee80211_crypt_wep.ko\n");
1229 }
1230}
1231
1232
1233/* Generate challenge data for shared key authentication. IEEE 802.11 specifies
1234 * that WEP algorithm is used for generating challange. This should be unique,
1235 * but otherwise there is not really need for randomness etc. Initialize WEP
1236 * with pseudo random key and then use increasing IV to get unique challenge
1237 * streams.
1238 *
1239 * Called only as a scheduled task for pending AP frames.
1240 */
1241static char * ap_auth_make_challenge(struct ap_data *ap)
1242{
1243 char *tmpbuf;
1244 struct sk_buff *skb;
1245
1246 if (ap->crypt == NULL) {
1247 ap_crypt_init(ap);
1248 if (ap->crypt == NULL)
1249 return NULL;
1250 }
1251
1252 tmpbuf = (char *) kmalloc(WLAN_AUTH_CHALLENGE_LEN, GFP_ATOMIC);
1253 if (tmpbuf == NULL) {
1254 PDEBUG(DEBUG_AP, "AP: kmalloc failed for challenge\n");
1255 return NULL;
1256 }
1257
1258 skb = dev_alloc_skb(WLAN_AUTH_CHALLENGE_LEN +
1259 ap->crypt->extra_prefix_len +
1260 ap->crypt->extra_postfix_len);
1261 if (skb == NULL) {
1262 kfree(tmpbuf);
1263 return NULL;
1264 }
1265
1266 skb_reserve(skb, ap->crypt->extra_prefix_len);
1267 memset(skb_put(skb, WLAN_AUTH_CHALLENGE_LEN), 0,
1268 WLAN_AUTH_CHALLENGE_LEN);
1269 if (ap->crypt->encrypt_mpdu(skb, 0, ap->crypt_priv)) {
1270 dev_kfree_skb(skb);
1271 kfree(tmpbuf);
1272 return NULL;
1273 }
1274
1275 memcpy(tmpbuf, skb->data + ap->crypt->extra_prefix_len,
1276 WLAN_AUTH_CHALLENGE_LEN);
1277 dev_kfree_skb(skb);
1278
1279 return tmpbuf;
1280}
1281
1282
1283/* Called only as a scheduled task for pending AP frames. */
1284static void handle_authen(local_info_t *local, struct sk_buff *skb,
1285 struct hostap_80211_rx_status *rx_stats)
1286{
1287 struct net_device *dev = local->dev;
1288 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1289 size_t hdrlen;
1290 struct ap_data *ap = local->ap;
1291 char body[8 + WLAN_AUTH_CHALLENGE_LEN], *challenge = NULL;
1292 int len, olen;
1293 u16 auth_alg, auth_transaction, status_code, *pos;
1294 u16 resp = WLAN_STATUS_SUCCESS, fc;
1295 struct sta_info *sta = NULL;
1296 struct ieee80211_crypt_data *crypt;
1297 char *txt = "";
1298
1299 len = skb->len - IEEE80211_MGMT_HDR_LEN;
1300
1301 fc = le16_to_cpu(hdr->frame_ctl);
1302 hdrlen = hostap_80211_get_hdrlen(fc);
1303
1304 if (len < 6) {
1305 PDEBUG(DEBUG_AP, "%s: handle_authen - too short payload "
1306 "(len=%d) from " MACSTR "\n", dev->name, len,
1307 MAC2STR(hdr->addr2));
1308 return;
1309 }
1310
1311 spin_lock_bh(&local->ap->sta_table_lock);
1312 sta = ap_get_sta(local->ap, hdr->addr2);
1313 if (sta)
1314 atomic_inc(&sta->users);
1315 spin_unlock_bh(&local->ap->sta_table_lock);
1316
1317 if (sta && sta->crypt)
1318 crypt = sta->crypt;
1319 else {
1320 int idx = 0;
1321 if (skb->len >= hdrlen + 3)
1322 idx = skb->data[hdrlen + 3] >> 6;
1323 crypt = local->crypt[idx];
1324 }
1325
1326 pos = (u16 *) (skb->data + IEEE80211_MGMT_HDR_LEN);
1327 auth_alg = __le16_to_cpu(*pos);
1328 pos++;
1329 auth_transaction = __le16_to_cpu(*pos);
1330 pos++;
1331 status_code = __le16_to_cpu(*pos);
1332 pos++;
1333
1334 if (memcmp(dev->dev_addr, hdr->addr2, ETH_ALEN) == 0 ||
1335 ap_control_mac_deny(&ap->mac_restrictions, hdr->addr2)) {
1336 txt = "authentication denied";
1337 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1338 goto fail;
1339 }
1340
1341 if (((local->auth_algs & PRISM2_AUTH_OPEN) &&
1342 auth_alg == WLAN_AUTH_OPEN) ||
1343 ((local->auth_algs & PRISM2_AUTH_SHARED_KEY) &&
1344 crypt && auth_alg == WLAN_AUTH_SHARED_KEY)) {
1345 } else {
1346 txt = "unsupported algorithm";
1347 resp = WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
1348 goto fail;
1349 }
1350
1351 if (len >= 8) {
1352 u8 *u = (u8 *) pos;
1353 if (*u == WLAN_EID_CHALLENGE) {
1354 if (*(u + 1) != WLAN_AUTH_CHALLENGE_LEN) {
1355 txt = "invalid challenge len";
1356 resp = WLAN_STATUS_CHALLENGE_FAIL;
1357 goto fail;
1358 }
1359 if (len - 8 < WLAN_AUTH_CHALLENGE_LEN) {
1360 txt = "challenge underflow";
1361 resp = WLAN_STATUS_CHALLENGE_FAIL;
1362 goto fail;
1363 }
1364 challenge = (char *) (u + 2);
1365 }
1366 }
1367
1368 if (sta && sta->ap) {
1369 if (time_after(jiffies, sta->u.ap.last_beacon +
1370 (10 * sta->listen_interval * HZ) / 1024)) {
1371 PDEBUG(DEBUG_AP, "%s: no beacons received for a while,"
1372 " assuming AP " MACSTR " is now STA\n",
1373 dev->name, MAC2STR(sta->addr));
1374 sta->ap = 0;
1375 sta->flags = 0;
1376 sta->u.sta.challenge = NULL;
1377 } else {
1378 txt = "AP trying to authenticate?";
1379 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1380 goto fail;
1381 }
1382 }
1383
1384 if ((auth_alg == WLAN_AUTH_OPEN && auth_transaction == 1) ||
1385 (auth_alg == WLAN_AUTH_SHARED_KEY &&
1386 (auth_transaction == 1 ||
1387 (auth_transaction == 3 && sta != NULL &&
1388 sta->u.sta.challenge != NULL)))) {
1389 } else {
1390 txt = "unknown authentication transaction number";
1391 resp = WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION;
1392 goto fail;
1393 }
1394
1395 if (sta == NULL) {
1396 txt = "new STA";
1397
1398 if (local->ap->num_sta >= MAX_STA_COUNT) {
1399 /* FIX: might try to remove some old STAs first? */
1400 txt = "no more room for new STAs";
1401 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1402 goto fail;
1403 }
1404
1405 sta = ap_add_sta(local->ap, hdr->addr2);
1406 if (sta == NULL) {
1407 txt = "ap_add_sta failed";
1408 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1409 goto fail;
1410 }
1411 }
1412
1413 switch (auth_alg) {
1414 case WLAN_AUTH_OPEN:
1415 txt = "authOK";
1416 /* IEEE 802.11 standard is not completely clear about
1417 * whether STA is considered authenticated after
1418 * authentication OK frame has been send or after it
1419 * has been ACKed. In order to reduce interoperability
1420 * issues, mark the STA authenticated before ACK. */
1421 sta->flags |= WLAN_STA_AUTH;
1422 break;
1423
1424 case WLAN_AUTH_SHARED_KEY:
1425 if (auth_transaction == 1) {
1426 if (sta->u.sta.challenge == NULL) {
1427 sta->u.sta.challenge =
1428 ap_auth_make_challenge(local->ap);
1429 if (sta->u.sta.challenge == NULL) {
1430 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1431 goto fail;
1432 }
1433 }
1434 } else {
1435 if (sta->u.sta.challenge == NULL ||
1436 challenge == NULL ||
1437 memcmp(sta->u.sta.challenge, challenge,
1438 WLAN_AUTH_CHALLENGE_LEN) != 0 ||
1439 !(fc & IEEE80211_FCTL_PROTECTED)) {
1440 txt = "challenge response incorrect";
1441 resp = WLAN_STATUS_CHALLENGE_FAIL;
1442 goto fail;
1443 }
1444
1445 txt = "challenge OK - authOK";
1446 /* IEEE 802.11 standard is not completely clear about
1447 * whether STA is considered authenticated after
1448 * authentication OK frame has been send or after it
1449 * has been ACKed. In order to reduce interoperability
1450 * issues, mark the STA authenticated before ACK. */
1451 sta->flags |= WLAN_STA_AUTH;
1452 kfree(sta->u.sta.challenge);
1453 sta->u.sta.challenge = NULL;
1454 }
1455 break;
1456 }
1457
1458 fail:
1459 pos = (u16 *) body;
1460 *pos = cpu_to_le16(auth_alg);
1461 pos++;
1462 *pos = cpu_to_le16(auth_transaction + 1);
1463 pos++;
1464 *pos = cpu_to_le16(resp); /* status_code */
1465 pos++;
1466 olen = 6;
1467
1468 if (resp == WLAN_STATUS_SUCCESS && sta != NULL &&
1469 sta->u.sta.challenge != NULL &&
1470 auth_alg == WLAN_AUTH_SHARED_KEY && auth_transaction == 1) {
1471 u8 *tmp = (u8 *) pos;
1472 *tmp++ = WLAN_EID_CHALLENGE;
1473 *tmp++ = WLAN_AUTH_CHALLENGE_LEN;
1474 pos++;
1475 memcpy(pos, sta->u.sta.challenge, WLAN_AUTH_CHALLENGE_LEN);
1476 olen += 2 + WLAN_AUTH_CHALLENGE_LEN;
1477 }
1478
1479 prism2_send_mgmt(dev, IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH,
1480 body, olen, hdr->addr2, ap->tx_callback_auth);
1481
1482 if (sta) {
1483 sta->last_rx = jiffies;
1484 atomic_dec(&sta->users);
1485 }
1486
1487 if (resp) {
1488 PDEBUG(DEBUG_AP, "%s: " MACSTR " auth (alg=%d trans#=%d "
1489 "stat=%d len=%d fc=%04x) ==> %d (%s)\n",
1490 dev->name, MAC2STR(hdr->addr2), auth_alg,
1491 auth_transaction, status_code, len, fc, resp, txt);
1492 }
1493}
1494
1495
1496/* Called only as a scheduled task for pending AP frames. */
1497static void handle_assoc(local_info_t *local, struct sk_buff *skb,
1498 struct hostap_80211_rx_status *rx_stats, int reassoc)
1499{
1500 struct net_device *dev = local->dev;
1501 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1502 char body[12], *p, *lpos;
1503 int len, left;
1504 u16 *pos;
1505 u16 resp = WLAN_STATUS_SUCCESS;
1506 struct sta_info *sta = NULL;
1507 int send_deauth = 0;
1508 char *txt = "";
1509 u8 prev_ap[ETH_ALEN];
1510
1511 left = len = skb->len - IEEE80211_MGMT_HDR_LEN;
1512
1513 if (len < (reassoc ? 10 : 4)) {
1514 PDEBUG(DEBUG_AP, "%s: handle_assoc - too short payload "
1515 "(len=%d, reassoc=%d) from " MACSTR "\n",
1516 dev->name, len, reassoc, MAC2STR(hdr->addr2));
1517 return;
1518 }
1519
1520 spin_lock_bh(&local->ap->sta_table_lock);
1521 sta = ap_get_sta(local->ap, hdr->addr2);
1522 if (sta == NULL || (sta->flags & WLAN_STA_AUTH) == 0) {
1523 spin_unlock_bh(&local->ap->sta_table_lock);
1524 txt = "trying to associate before authentication";
1525 send_deauth = 1;
1526 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1527 sta = NULL; /* do not decrement sta->users */
1528 goto fail;
1529 }
1530 atomic_inc(&sta->users);
1531 spin_unlock_bh(&local->ap->sta_table_lock);
1532
1533 pos = (u16 *) (skb->data + IEEE80211_MGMT_HDR_LEN);
1534 sta->capability = __le16_to_cpu(*pos);
1535 pos++; left -= 2;
1536 sta->listen_interval = __le16_to_cpu(*pos);
1537 pos++; left -= 2;
1538
1539 if (reassoc) {
1540 memcpy(prev_ap, pos, ETH_ALEN);
1541 pos++; pos++; pos++; left -= 6;
1542 } else
1543 memset(prev_ap, 0, ETH_ALEN);
1544
1545 if (left >= 2) {
1546 unsigned int ileft;
1547 unsigned char *u = (unsigned char *) pos;
1548
1549 if (*u == WLAN_EID_SSID) {
1550 u++; left--;
1551 ileft = *u;
1552 u++; left--;
1553
1554 if (ileft > left || ileft > MAX_SSID_LEN) {
1555 txt = "SSID overflow";
1556 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1557 goto fail;
1558 }
1559
1560 if (ileft != strlen(local->essid) ||
1561 memcmp(local->essid, u, ileft) != 0) {
1562 txt = "not our SSID";
1563 resp = WLAN_STATUS_ASSOC_DENIED_UNSPEC;
1564 goto fail;
1565 }
1566
1567 u += ileft;
1568 left -= ileft;
1569 }
1570
1571 if (left >= 2 && *u == WLAN_EID_SUPP_RATES) {
1572 u++; left--;
1573 ileft = *u;
1574 u++; left--;
1575
1576 if (ileft > left || ileft == 0 ||
1577 ileft > WLAN_SUPP_RATES_MAX) {
1578 txt = "SUPP_RATES len error";
1579 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1580 goto fail;
1581 }
1582
1583 memset(sta->supported_rates, 0,
1584 sizeof(sta->supported_rates));
1585 memcpy(sta->supported_rates, u, ileft);
1586 prism2_check_tx_rates(sta);
1587
1588 u += ileft;
1589 left -= ileft;
1590 }
1591
1592 if (left > 0) {
1593 PDEBUG(DEBUG_AP, "%s: assoc from " MACSTR " with extra"
1594 " data (%d bytes) [",
1595 dev->name, MAC2STR(hdr->addr2), left);
1596 while (left > 0) {
1597 PDEBUG2(DEBUG_AP, "<%02x>", *u);
1598 u++; left--;
1599 }
1600 PDEBUG2(DEBUG_AP, "]\n");
1601 }
1602 } else {
1603 txt = "frame underflow";
1604 resp = WLAN_STATUS_UNSPECIFIED_FAILURE;
1605 goto fail;
1606 }
1607
1608 /* get a unique AID */
1609 if (sta->aid > 0)
1610 txt = "OK, old AID";
1611 else {
1612 spin_lock_bh(&local->ap->sta_table_lock);
1613 for (sta->aid = 1; sta->aid <= MAX_AID_TABLE_SIZE; sta->aid++)
1614 if (local->ap->sta_aid[sta->aid - 1] == NULL)
1615 break;
1616 if (sta->aid > MAX_AID_TABLE_SIZE) {
1617 sta->aid = 0;
1618 spin_unlock_bh(&local->ap->sta_table_lock);
1619 resp = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
1620 txt = "no room for more AIDs";
1621 } else {
1622 local->ap->sta_aid[sta->aid - 1] = sta;
1623 spin_unlock_bh(&local->ap->sta_table_lock);
1624 txt = "OK, new AID";
1625 }
1626 }
1627
1628 fail:
1629 pos = (u16 *) body;
1630
1631 if (send_deauth) {
1632 *pos = __constant_cpu_to_le16(
1633 WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH);
1634 pos++;
1635 } else {
1636 /* FIX: CF-Pollable and CF-PollReq should be set to match the
1637 * values in beacons/probe responses */
1638 /* FIX: how about privacy and WEP? */
1639 /* capability */
1640 *pos = __constant_cpu_to_le16(WLAN_CAPABILITY_ESS);
1641 pos++;
1642
1643 /* status_code */
1644 *pos = __cpu_to_le16(resp);
1645 pos++;
1646
1647 *pos = __cpu_to_le16((sta && sta->aid > 0 ? sta->aid : 0) |
1648 BIT(14) | BIT(15)); /* AID */
1649 pos++;
1650
1651 /* Supported rates (Information element) */
1652 p = (char *) pos;
1653 *p++ = WLAN_EID_SUPP_RATES;
1654 lpos = p;
1655 *p++ = 0; /* len */
1656 if (local->tx_rate_control & WLAN_RATE_1M) {
1657 *p++ = local->basic_rates & WLAN_RATE_1M ? 0x82 : 0x02;
1658 (*lpos)++;
1659 }
1660 if (local->tx_rate_control & WLAN_RATE_2M) {
1661 *p++ = local->basic_rates & WLAN_RATE_2M ? 0x84 : 0x04;
1662 (*lpos)++;
1663 }
1664 if (local->tx_rate_control & WLAN_RATE_5M5) {
1665 *p++ = local->basic_rates & WLAN_RATE_5M5 ?
1666 0x8b : 0x0b;
1667 (*lpos)++;
1668 }
1669 if (local->tx_rate_control & WLAN_RATE_11M) {
1670 *p++ = local->basic_rates & WLAN_RATE_11M ?
1671 0x96 : 0x16;
1672 (*lpos)++;
1673 }
1674 pos = (u16 *) p;
1675 }
1676
1677 prism2_send_mgmt(dev, IEEE80211_FTYPE_MGMT |
1678 (send_deauth ? IEEE80211_STYPE_DEAUTH :
1679 (reassoc ? IEEE80211_STYPE_REASSOC_RESP :
1680 IEEE80211_STYPE_ASSOC_RESP)),
1681 body, (u8 *) pos - (u8 *) body,
1682 hdr->addr2,
1683 send_deauth ? 0 : local->ap->tx_callback_assoc);
1684
1685 if (sta) {
1686 if (resp == WLAN_STATUS_SUCCESS) {
1687 sta->last_rx = jiffies;
1688 /* STA will be marked associated from TX callback, if
1689 * AssocResp is ACKed */
1690 }
1691 atomic_dec(&sta->users);
1692 }
1693
1694#if 0
1695 PDEBUG(DEBUG_AP, "%s: " MACSTR " %sassoc (len=%d prev_ap=" MACSTR
1696 ") => %d(%d) (%s)\n",
1697 dev->name, MAC2STR(hdr->addr2), reassoc ? "re" : "", len,
1698 MAC2STR(prev_ap), resp, send_deauth, txt);
1699#endif
1700}
1701
1702
1703/* Called only as a scheduled task for pending AP frames. */
1704static void handle_deauth(local_info_t *local, struct sk_buff *skb,
1705 struct hostap_80211_rx_status *rx_stats)
1706{
1707 struct net_device *dev = local->dev;
1708 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1709 char *body = (char *) (skb->data + IEEE80211_MGMT_HDR_LEN);
1710 int len;
1711 u16 reason_code, *pos;
1712 struct sta_info *sta = NULL;
1713
1714 len = skb->len - IEEE80211_MGMT_HDR_LEN;
1715
1716 if (len < 2) {
1717 printk("handle_deauth - too short payload (len=%d)\n", len);
1718 return;
1719 }
1720
1721 pos = (u16 *) body;
1722 reason_code = __le16_to_cpu(*pos);
1723
1724 PDEBUG(DEBUG_AP, "%s: deauthentication: " MACSTR " len=%d, "
1725 "reason_code=%d\n", dev->name, MAC2STR(hdr->addr2), len,
1726 reason_code);
1727
1728 spin_lock_bh(&local->ap->sta_table_lock);
1729 sta = ap_get_sta(local->ap, hdr->addr2);
1730 if (sta != NULL) {
1731 if ((sta->flags & WLAN_STA_ASSOC) && !sta->ap)
1732 hostap_event_expired_sta(local->dev, sta);
1733 sta->flags &= ~(WLAN_STA_AUTH | WLAN_STA_ASSOC);
1734 }
1735 spin_unlock_bh(&local->ap->sta_table_lock);
1736 if (sta == NULL) {
1737 printk("%s: deauthentication from " MACSTR ", "
1738 "reason_code=%d, but STA not authenticated\n", dev->name,
1739 MAC2STR(hdr->addr2), reason_code);
1740 }
1741}
1742
1743
1744/* Called only as a scheduled task for pending AP frames. */
1745static void handle_disassoc(local_info_t *local, struct sk_buff *skb,
1746 struct hostap_80211_rx_status *rx_stats)
1747{
1748 struct net_device *dev = local->dev;
1749 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1750 char *body = skb->data + IEEE80211_MGMT_HDR_LEN;
1751 int len;
1752 u16 reason_code, *pos;
1753 struct sta_info *sta = NULL;
1754
1755 len = skb->len - IEEE80211_MGMT_HDR_LEN;
1756
1757 if (len < 2) {
1758 printk("handle_disassoc - too short payload (len=%d)\n", len);
1759 return;
1760 }
1761
1762 pos = (u16 *) body;
1763 reason_code = __le16_to_cpu(*pos);
1764
1765 PDEBUG(DEBUG_AP, "%s: disassociation: " MACSTR " len=%d, "
1766 "reason_code=%d\n", dev->name, MAC2STR(hdr->addr2), len,
1767 reason_code);
1768
1769 spin_lock_bh(&local->ap->sta_table_lock);
1770 sta = ap_get_sta(local->ap, hdr->addr2);
1771 if (sta != NULL) {
1772 if ((sta->flags & WLAN_STA_ASSOC) && !sta->ap)
1773 hostap_event_expired_sta(local->dev, sta);
1774 sta->flags &= ~WLAN_STA_ASSOC;
1775 }
1776 spin_unlock_bh(&local->ap->sta_table_lock);
1777 if (sta == NULL) {
1778 printk("%s: disassociation from " MACSTR ", "
1779 "reason_code=%d, but STA not authenticated\n",
1780 dev->name, MAC2STR(hdr->addr2), reason_code);
1781 }
1782}
1783
1784
1785/* Called only as a scheduled task for pending AP frames. */
1786static void ap_handle_data_nullfunc(local_info_t *local,
1787 struct ieee80211_hdr *hdr)
1788{
1789 struct net_device *dev = local->dev;
1790
1791 /* some STA f/w's seem to require control::ACK frame for
1792 * data::nullfunc, but at least Prism2 station f/w version 0.8.0 does
1793 * not send this..
1794 * send control::ACK for the data::nullfunc */
1795
1796 printk(KERN_DEBUG "Sending control::ACK for data::nullfunc\n");
1797 prism2_send_mgmt(dev, IEEE80211_FTYPE_CTL | IEEE80211_STYPE_ACK,
1798 NULL, 0, hdr->addr2, 0);
1799}
1800
1801
1802/* Called only as a scheduled task for pending AP frames. */
1803static void ap_handle_dropped_data(local_info_t *local,
1804 struct ieee80211_hdr *hdr)
1805{
1806 struct net_device *dev = local->dev;
1807 struct sta_info *sta;
1808 u16 reason;
1809
1810 spin_lock_bh(&local->ap->sta_table_lock);
1811 sta = ap_get_sta(local->ap, hdr->addr2);
1812 if (sta)
1813 atomic_inc(&sta->users);
1814 spin_unlock_bh(&local->ap->sta_table_lock);
1815
1816 if (sta != NULL && (sta->flags & WLAN_STA_ASSOC)) {
1817 PDEBUG(DEBUG_AP, "ap_handle_dropped_data: STA is now okay?\n");
1818 atomic_dec(&sta->users);
1819 return;
1820 }
1821
1822 reason = __constant_cpu_to_le16(
1823 WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA);
1824 prism2_send_mgmt(dev, IEEE80211_FTYPE_MGMT |
1825 ((sta == NULL || !(sta->flags & WLAN_STA_ASSOC)) ?
1826 IEEE80211_STYPE_DEAUTH : IEEE80211_STYPE_DISASSOC),
1827 (char *) &reason, sizeof(reason), hdr->addr2, 0);
1828
1829 if (sta)
1830 atomic_dec(&sta->users);
1831}
1832
1833#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
1834
1835
1836/* Called only as a scheduled task for pending AP frames. */
1837static void pspoll_send_buffered(local_info_t *local, struct sta_info *sta,
1838 struct sk_buff *skb)
1839{
1840 struct hostap_skb_tx_data *meta;
1841
1842 if (!(sta->flags & WLAN_STA_PS)) {
1843 /* Station has moved to non-PS mode, so send all buffered
1844 * frames using normal device queue. */
1845 dev_queue_xmit(skb);
1846 return;
1847 }
1848
1849 /* add a flag for hostap_handle_sta_tx() to know that this skb should
1850 * be passed through even though STA is using PS */
1851 meta = (struct hostap_skb_tx_data *) skb->cb;
1852 meta->flags |= HOSTAP_TX_FLAGS_BUFFERED_FRAME;
1853 if (!skb_queue_empty(&sta->tx_buf)) {
1854 /* indicate to STA that more frames follow */
1855 meta->flags |= HOSTAP_TX_FLAGS_ADD_MOREDATA;
1856 }
1857 dev_queue_xmit(skb);
1858}
1859
1860
1861/* Called only as a scheduled task for pending AP frames. */
1862static void handle_pspoll(local_info_t *local,
1863 struct ieee80211_hdr *hdr,
1864 struct hostap_80211_rx_status *rx_stats)
1865{
1866 struct net_device *dev = local->dev;
1867 struct sta_info *sta;
1868 u16 aid;
1869 struct sk_buff *skb;
1870
1871 PDEBUG(DEBUG_PS2, "handle_pspoll: BSSID=" MACSTR ", TA=" MACSTR
1872 " PWRMGT=%d\n",
1873 MAC2STR(hdr->addr1), MAC2STR(hdr->addr2),
1874 !!(le16_to_cpu(hdr->frame_ctl) & IEEE80211_FCTL_PM));
1875
1876 if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
1877 PDEBUG(DEBUG_AP, "handle_pspoll - addr1(BSSID)=" MACSTR
1878 " not own MAC\n", MAC2STR(hdr->addr1));
1879 return;
1880 }
1881
1882 aid = __le16_to_cpu(hdr->duration_id);
1883 if ((aid & (BIT(15) | BIT(14))) != (BIT(15) | BIT(14))) {
1884 PDEBUG(DEBUG_PS, " PSPOLL and AID[15:14] not set\n");
1885 return;
1886 }
1887 aid &= ~BIT(15) & ~BIT(14);
1888 if (aid == 0 || aid > MAX_AID_TABLE_SIZE) {
1889 PDEBUG(DEBUG_PS, " invalid aid=%d\n", aid);
1890 return;
1891 }
1892 PDEBUG(DEBUG_PS2, " aid=%d\n", aid);
1893
1894 spin_lock_bh(&local->ap->sta_table_lock);
1895 sta = ap_get_sta(local->ap, hdr->addr2);
1896 if (sta)
1897 atomic_inc(&sta->users);
1898 spin_unlock_bh(&local->ap->sta_table_lock);
1899
1900 if (sta == NULL) {
1901 PDEBUG(DEBUG_PS, " STA not found\n");
1902 return;
1903 }
1904 if (sta->aid != aid) {
1905 PDEBUG(DEBUG_PS, " received aid=%i does not match with "
1906 "assoc.aid=%d\n", aid, sta->aid);
1907 return;
1908 }
1909
1910 /* FIX: todo:
1911 * - add timeout for buffering (clear aid in TIM vector if buffer timed
1912 * out (expiry time must be longer than ListenInterval for
1913 * the corresponding STA; "8802-11: 11.2.1.9 AP aging function"
1914 * - what to do, if buffered, pspolled, and sent frame is not ACKed by
1915 * sta; store buffer for later use and leave TIM aid bit set? use
1916 * TX event to check whether frame was ACKed?
1917 */
1918
1919 while ((skb = skb_dequeue(&sta->tx_buf)) != NULL) {
1920 /* send buffered frame .. */
1921 PDEBUG(DEBUG_PS2, "Sending buffered frame to STA after PS POLL"
1922 " (buffer_count=%d)\n", skb_queue_len(&sta->tx_buf));
1923
1924 pspoll_send_buffered(local, sta, skb);
1925
1926 if (sta->flags & WLAN_STA_PS) {
1927 /* send only one buffered packet per PS Poll */
1928 /* FIX: should ignore further PS Polls until the
1929 * buffered packet that was just sent is acknowledged
1930 * (Tx or TxExc event) */
1931 break;
1932 }
1933 }
1934
1935 if (skb_queue_empty(&sta->tx_buf)) {
1936 /* try to clear aid from TIM */
1937 if (!(sta->flags & WLAN_STA_TIM))
1938 PDEBUG(DEBUG_PS2, "Re-unsetting TIM for aid %d\n",
1939 aid);
1940 hostap_set_tim(local, aid, 0);
1941 sta->flags &= ~WLAN_STA_TIM;
1942 }
1943
1944 atomic_dec(&sta->users);
1945}
1946
1947
1948#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
1949
1950static void handle_wds_oper_queue(void *data)
1951{
1952 local_info_t *local = data;
1953 struct wds_oper_data *entry, *prev;
1954
1955 spin_lock_bh(&local->lock);
1956 entry = local->ap->wds_oper_entries;
1957 local->ap->wds_oper_entries = NULL;
1958 spin_unlock_bh(&local->lock);
1959
1960 while (entry) {
1961 PDEBUG(DEBUG_AP, "%s: %s automatic WDS connection "
1962 "to AP " MACSTR "\n",
1963 local->dev->name,
1964 entry->type == WDS_ADD ? "adding" : "removing",
1965 MAC2STR(entry->addr));
1966 if (entry->type == WDS_ADD)
1967 prism2_wds_add(local, entry->addr, 0);
1968 else if (entry->type == WDS_DEL)
1969 prism2_wds_del(local, entry->addr, 0, 1);
1970
1971 prev = entry;
1972 entry = entry->next;
1973 kfree(prev);
1974 }
1975}
1976
1977
1978/* Called only as a scheduled task for pending AP frames. */
1979static void handle_beacon(local_info_t *local, struct sk_buff *skb,
1980 struct hostap_80211_rx_status *rx_stats)
1981{
1982 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1983 char *body = skb->data + IEEE80211_MGMT_HDR_LEN;
1984 int len, left;
1985 u16 *pos, beacon_int, capability;
1986 char *ssid = NULL;
1987 unsigned char *supp_rates = NULL;
1988 int ssid_len = 0, supp_rates_len = 0;
1989 struct sta_info *sta = NULL;
1990 int new_sta = 0, channel = -1;
1991
1992 len = skb->len - IEEE80211_MGMT_HDR_LEN;
1993
1994 if (len < 8 + 2 + 2) {
1995 printk(KERN_DEBUG "handle_beacon - too short payload "
1996 "(len=%d)\n", len);
1997 return;
1998 }
1999
2000 pos = (u16 *) body;
2001 left = len;
2002
2003 /* Timestamp (8 octets) */
2004 pos += 4; left -= 8;
2005 /* Beacon interval (2 octets) */
2006 beacon_int = __le16_to_cpu(*pos);
2007 pos++; left -= 2;
2008 /* Capability information (2 octets) */
2009 capability = __le16_to_cpu(*pos);
2010 pos++; left -= 2;
2011
2012 if (local->ap->ap_policy != AP_OTHER_AP_EVEN_IBSS &&
2013 capability & WLAN_CAPABILITY_IBSS)
2014 return;
2015
2016 if (left >= 2) {
2017 unsigned int ileft;
2018 unsigned char *u = (unsigned char *) pos;
2019
2020 if (*u == WLAN_EID_SSID) {
2021 u++; left--;
2022 ileft = *u;
2023 u++; left--;
2024
2025 if (ileft > left || ileft > MAX_SSID_LEN) {
2026 PDEBUG(DEBUG_AP, "SSID: overflow\n");
2027 return;
2028 }
2029
2030 if (local->ap->ap_policy == AP_OTHER_AP_SAME_SSID &&
2031 (ileft != strlen(local->essid) ||
2032 memcmp(local->essid, u, ileft) != 0)) {
2033 /* not our SSID */
2034 return;
2035 }
2036
2037 ssid = u;
2038 ssid_len = ileft;
2039
2040 u += ileft;
2041 left -= ileft;
2042 }
2043
2044 if (*u == WLAN_EID_SUPP_RATES) {
2045 u++; left--;
2046 ileft = *u;
2047 u++; left--;
2048
2049 if (ileft > left || ileft == 0 || ileft > 8) {
2050 PDEBUG(DEBUG_AP, " - SUPP_RATES len error\n");
2051 return;
2052 }
2053
2054 supp_rates = u;
2055 supp_rates_len = ileft;
2056
2057 u += ileft;
2058 left -= ileft;
2059 }
2060
2061 if (*u == WLAN_EID_DS_PARAMS) {
2062 u++; left--;
2063 ileft = *u;
2064 u++; left--;
2065
2066 if (ileft > left || ileft != 1) {
2067 PDEBUG(DEBUG_AP, " - DS_PARAMS len error\n");
2068 return;
2069 }
2070
2071 channel = *u;
2072
2073 u += ileft;
2074 left -= ileft;
2075 }
2076 }
2077
2078 spin_lock_bh(&local->ap->sta_table_lock);
2079 sta = ap_get_sta(local->ap, hdr->addr2);
2080 if (sta != NULL)
2081 atomic_inc(&sta->users);
2082 spin_unlock_bh(&local->ap->sta_table_lock);
2083
2084 if (sta == NULL) {
2085 /* add new AP */
2086 new_sta = 1;
2087 sta = ap_add_sta(local->ap, hdr->addr2);
2088 if (sta == NULL) {
2089 printk(KERN_INFO "prism2: kmalloc failed for AP "
2090 "data structure\n");
2091 return;
2092 }
2093 hostap_event_new_sta(local->dev, sta);
2094
2095 /* mark APs authentication and associated for pseudo ad-hoc
2096 * style communication */
2097 sta->flags = WLAN_STA_AUTH | WLAN_STA_ASSOC;
2098
2099 if (local->ap->autom_ap_wds) {
2100 hostap_wds_link_oper(local, sta->addr, WDS_ADD);
2101 }
2102 }
2103
2104 sta->ap = 1;
2105 if (ssid) {
2106 sta->u.ap.ssid_len = ssid_len;
2107 memcpy(sta->u.ap.ssid, ssid, ssid_len);
2108 sta->u.ap.ssid[ssid_len] = '\0';
2109 } else {
2110 sta->u.ap.ssid_len = 0;
2111 sta->u.ap.ssid[0] = '\0';
2112 }
2113 sta->u.ap.channel = channel;
2114 sta->rx_packets++;
2115 sta->rx_bytes += len;
2116 sta->u.ap.last_beacon = sta->last_rx = jiffies;
2117 sta->capability = capability;
2118 sta->listen_interval = beacon_int;
2119
2120 atomic_dec(&sta->users);
2121
2122 if (new_sta) {
2123 memset(sta->supported_rates, 0, sizeof(sta->supported_rates));
2124 memcpy(sta->supported_rates, supp_rates, supp_rates_len);
2125 prism2_check_tx_rates(sta);
2126 }
2127}
2128
2129#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
2130
2131
2132/* Called only as a tasklet. */
2133static void handle_ap_item(local_info_t *local, struct sk_buff *skb,
2134 struct hostap_80211_rx_status *rx_stats)
2135{
2136#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
2137 struct net_device *dev = local->dev;
2138#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
2139 u16 fc, type, stype;
2140 struct ieee80211_hdr *hdr;
2141
2142 /* FIX: should give skb->len to handler functions and check that the
2143 * buffer is long enough */
2144 hdr = (struct ieee80211_hdr *) skb->data;
2145 fc = le16_to_cpu(hdr->frame_ctl);
2146 type = WLAN_FC_GET_TYPE(fc);
2147 stype = WLAN_FC_GET_STYPE(fc);
2148
2149#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
2150 if (!local->hostapd && type == IEEE80211_FTYPE_DATA) {
2151 PDEBUG(DEBUG_AP, "handle_ap_item - data frame\n");
2152
2153 if (!(fc & IEEE80211_FCTL_TODS) ||
2154 (fc & IEEE80211_FCTL_FROMDS)) {
2155 if (stype == IEEE80211_STYPE_NULLFUNC) {
2156 /* no ToDS nullfunc seems to be used to check
2157 * AP association; so send reject message to
2158 * speed up re-association */
2159 ap_handle_dropped_data(local, hdr);
2160 goto done;
2161 }
2162 PDEBUG(DEBUG_AP, " not ToDS frame (fc=0x%04x)\n",
2163 fc);
2164 goto done;
2165 }
2166
2167 if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
2168 PDEBUG(DEBUG_AP, "handle_ap_item - addr1(BSSID)="
2169 MACSTR " not own MAC\n",
2170 MAC2STR(hdr->addr1));
2171 goto done;
2172 }
2173
2174 if (local->ap->nullfunc_ack &&
2175 stype == IEEE80211_STYPE_NULLFUNC)
2176 ap_handle_data_nullfunc(local, hdr);
2177 else
2178 ap_handle_dropped_data(local, hdr);
2179 goto done;
2180 }
2181
2182 if (type == IEEE80211_FTYPE_MGMT && stype == IEEE80211_STYPE_BEACON) {
2183 handle_beacon(local, skb, rx_stats);
2184 goto done;
2185 }
2186#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
2187
2188 if (type == IEEE80211_FTYPE_CTL && stype == IEEE80211_STYPE_PSPOLL) {
2189 handle_pspoll(local, hdr, rx_stats);
2190 goto done;
2191 }
2192
2193 if (local->hostapd) {
2194 PDEBUG(DEBUG_AP, "Unknown frame in AP queue: type=0x%02x "
2195 "subtype=0x%02x\n", type, stype);
2196 goto done;
2197 }
2198
2199#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
2200 if (type != IEEE80211_FTYPE_MGMT) {
2201 PDEBUG(DEBUG_AP, "handle_ap_item - not a management frame?\n");
2202 goto done;
2203 }
2204
2205 if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
2206 PDEBUG(DEBUG_AP, "handle_ap_item - addr1(DA)=" MACSTR
2207 " not own MAC\n", MAC2STR(hdr->addr1));
2208 goto done;
2209 }
2210
2211 if (memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN)) {
2212 PDEBUG(DEBUG_AP, "handle_ap_item - addr3(BSSID)=" MACSTR
2213 " not own MAC\n", MAC2STR(hdr->addr3));
2214 goto done;
2215 }
2216
2217 switch (stype) {
2218 case IEEE80211_STYPE_ASSOC_REQ:
2219 handle_assoc(local, skb, rx_stats, 0);
2220 break;
2221 case IEEE80211_STYPE_ASSOC_RESP:
2222 PDEBUG(DEBUG_AP, "==> ASSOC RESP (ignored)\n");
2223 break;
2224 case IEEE80211_STYPE_REASSOC_REQ:
2225 handle_assoc(local, skb, rx_stats, 1);
2226 break;
2227 case IEEE80211_STYPE_REASSOC_RESP:
2228 PDEBUG(DEBUG_AP, "==> REASSOC RESP (ignored)\n");
2229 break;
2230 case IEEE80211_STYPE_ATIM:
2231 PDEBUG(DEBUG_AP, "==> ATIM (ignored)\n");
2232 break;
2233 case IEEE80211_STYPE_DISASSOC:
2234 handle_disassoc(local, skb, rx_stats);
2235 break;
2236 case IEEE80211_STYPE_AUTH:
2237 handle_authen(local, skb, rx_stats);
2238 break;
2239 case IEEE80211_STYPE_DEAUTH:
2240 handle_deauth(local, skb, rx_stats);
2241 break;
2242 default:
2243 PDEBUG(DEBUG_AP, "Unknown mgmt frame subtype 0x%02x\n",
2244 stype >> 4);
2245 break;
2246 }
2247#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
2248
2249 done:
2250 dev_kfree_skb(skb);
2251}
2252
2253
2254/* Called only as a tasklet (software IRQ) */
2255void hostap_rx(struct net_device *dev, struct sk_buff *skb,
2256 struct hostap_80211_rx_status *rx_stats)
2257{
2258 struct hostap_interface *iface;
2259 local_info_t *local;
2260 u16 fc;
2261 struct ieee80211_hdr *hdr;
2262
2263 iface = netdev_priv(dev);
2264 local = iface->local;
2265
2266 if (skb->len < 16)
2267 goto drop;
2268
2269 local->stats.rx_packets++;
2270
2271 hdr = (struct ieee80211_hdr *) skb->data;
2272 fc = le16_to_cpu(hdr->frame_ctl);
2273
2274 if (local->ap->ap_policy == AP_OTHER_AP_SKIP_ALL &&
2275 WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_MGMT &&
2276 WLAN_FC_GET_STYPE(fc) == IEEE80211_STYPE_BEACON)
2277 goto drop;
2278
2279 skb->protocol = __constant_htons(ETH_P_HOSTAP);
2280 handle_ap_item(local, skb, rx_stats);
2281 return;
2282
2283 drop:
2284 dev_kfree_skb(skb);
2285}
2286
2287
2288/* Called only as a tasklet (software IRQ) */
2289static void schedule_packet_send(local_info_t *local, struct sta_info *sta)
2290{
2291 struct sk_buff *skb;
2292 struct ieee80211_hdr *hdr;
2293 struct hostap_80211_rx_status rx_stats;
2294
2295 if (skb_queue_empty(&sta->tx_buf))
2296 return;
2297
2298 skb = dev_alloc_skb(16);
2299 if (skb == NULL) {
2300 printk(KERN_DEBUG "%s: schedule_packet_send: skb alloc "
2301 "failed\n", local->dev->name);
2302 return;
2303 }
2304
2305 hdr = (struct ieee80211_hdr *) skb_put(skb, 16);
2306
2307 /* Generate a fake pspoll frame to start packet delivery */
2308 hdr->frame_ctl = __constant_cpu_to_le16(
2309 IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL);
2310 memcpy(hdr->addr1, local->dev->dev_addr, ETH_ALEN);
2311 memcpy(hdr->addr2, sta->addr, ETH_ALEN);
2312 hdr->duration_id = cpu_to_le16(sta->aid | BIT(15) | BIT(14));
2313
2314 PDEBUG(DEBUG_PS2, "%s: Scheduling buffered packet delivery for "
2315 "STA " MACSTR "\n", local->dev->name, MAC2STR(sta->addr));
2316
2317 skb->dev = local->dev;
2318
2319 memset(&rx_stats, 0, sizeof(rx_stats));
2320 hostap_rx(local->dev, skb, &rx_stats);
2321}
2322
2323
2324static int prism2_ap_get_sta_qual(local_info_t *local, struct sockaddr addr[],
2325 struct iw_quality qual[], int buf_size,
2326 int aplist)
2327{
2328 struct ap_data *ap = local->ap;
2329 struct list_head *ptr;
2330 int count = 0;
2331
2332 spin_lock_bh(&ap->sta_table_lock);
2333
2334 for (ptr = ap->sta_list.next; ptr != NULL && ptr != &ap->sta_list;
2335 ptr = ptr->next) {
2336 struct sta_info *sta = (struct sta_info *) ptr;
2337
2338 if (aplist && !sta->ap)
2339 continue;
2340 addr[count].sa_family = ARPHRD_ETHER;
2341 memcpy(addr[count].sa_data, sta->addr, ETH_ALEN);
2342 if (sta->last_rx_silence == 0)
2343 qual[count].qual = sta->last_rx_signal < 27 ?
2344 0 : (sta->last_rx_signal - 27) * 92 / 127;
2345 else
2346 qual[count].qual = sta->last_rx_signal -
2347 sta->last_rx_silence - 35;
2348 qual[count].level = HFA384X_LEVEL_TO_dBm(sta->last_rx_signal);
2349 qual[count].noise = HFA384X_LEVEL_TO_dBm(sta->last_rx_silence);
2350 qual[count].updated = sta->last_rx_updated;
2351
2352 sta->last_rx_updated = 0;
2353
2354 count++;
2355 if (count >= buf_size)
2356 break;
2357 }
2358 spin_unlock_bh(&ap->sta_table_lock);
2359
2360 return count;
2361}
2362
2363
2364/* Translate our list of Access Points & Stations to a card independant
2365 * format that the Wireless Tools will understand - Jean II */
2366static int prism2_ap_translate_scan(struct net_device *dev, char *buffer)
2367{
2368 struct hostap_interface *iface;
2369 local_info_t *local;
2370 struct ap_data *ap;
2371 struct list_head *ptr;
2372 struct iw_event iwe;
2373 char *current_ev = buffer;
2374 char *end_buf = buffer + IW_SCAN_MAX_DATA;
2375#if !defined(PRISM2_NO_KERNEL_IEEE80211_MGMT)
2376 char buf[64];
2377#endif
2378
2379 iface = netdev_priv(dev);
2380 local = iface->local;
2381 ap = local->ap;
2382
2383 spin_lock_bh(&ap->sta_table_lock);
2384
2385 for (ptr = ap->sta_list.next; ptr != NULL && ptr != &ap->sta_list;
2386 ptr = ptr->next) {
2387 struct sta_info *sta = (struct sta_info *) ptr;
2388
2389 /* First entry *MUST* be the AP MAC address */
2390 memset(&iwe, 0, sizeof(iwe));
2391 iwe.cmd = SIOCGIWAP;
2392 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2393 memcpy(iwe.u.ap_addr.sa_data, sta->addr, ETH_ALEN);
2394 iwe.len = IW_EV_ADDR_LEN;
2395 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
2396 IW_EV_ADDR_LEN);
2397
2398 /* Use the mode to indicate if it's a station or
2399 * an Access Point */
2400 memset(&iwe, 0, sizeof(iwe));
2401 iwe.cmd = SIOCGIWMODE;
2402 if (sta->ap)
2403 iwe.u.mode = IW_MODE_MASTER;
2404 else
2405 iwe.u.mode = IW_MODE_INFRA;
2406 iwe.len = IW_EV_UINT_LEN;
2407 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
2408 IW_EV_UINT_LEN);
2409
2410 /* Some quality */
2411 memset(&iwe, 0, sizeof(iwe));
2412 iwe.cmd = IWEVQUAL;
2413 if (sta->last_rx_silence == 0)
2414 iwe.u.qual.qual = sta->last_rx_signal < 27 ?
2415 0 : (sta->last_rx_signal - 27) * 92 / 127;
2416 else
2417 iwe.u.qual.qual = sta->last_rx_signal -
2418 sta->last_rx_silence - 35;
2419 iwe.u.qual.level = HFA384X_LEVEL_TO_dBm(sta->last_rx_signal);
2420 iwe.u.qual.noise = HFA384X_LEVEL_TO_dBm(sta->last_rx_silence);
2421 iwe.u.qual.updated = sta->last_rx_updated;
2422 iwe.len = IW_EV_QUAL_LEN;
2423 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
2424 IW_EV_QUAL_LEN);
2425
2426#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
2427 if (sta->ap) {
2428 memset(&iwe, 0, sizeof(iwe));
2429 iwe.cmd = SIOCGIWESSID;
2430 iwe.u.data.length = sta->u.ap.ssid_len;
2431 iwe.u.data.flags = 1;
2432 current_ev = iwe_stream_add_point(current_ev, end_buf,
2433 &iwe,
2434 sta->u.ap.ssid);
2435
2436 memset(&iwe, 0, sizeof(iwe));
2437 iwe.cmd = SIOCGIWENCODE;
2438 if (sta->capability & WLAN_CAPABILITY_PRIVACY)
2439 iwe.u.data.flags =
2440 IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2441 else
2442 iwe.u.data.flags = IW_ENCODE_DISABLED;
2443 current_ev = iwe_stream_add_point(current_ev, end_buf,
2444 &iwe,
2445 sta->u.ap.ssid
2446 /* 0 byte memcpy */);
2447
2448 if (sta->u.ap.channel > 0 &&
2449 sta->u.ap.channel <= FREQ_COUNT) {
2450 memset(&iwe, 0, sizeof(iwe));
2451 iwe.cmd = SIOCGIWFREQ;
2452 iwe.u.freq.m = freq_list[sta->u.ap.channel - 1]
2453 * 100000;
2454 iwe.u.freq.e = 1;
2455 current_ev = iwe_stream_add_event(
2456 current_ev, end_buf, &iwe,
2457 IW_EV_FREQ_LEN);
2458 }
2459
2460 memset(&iwe, 0, sizeof(iwe));
2461 iwe.cmd = IWEVCUSTOM;
2462 sprintf(buf, "beacon_interval=%d",
2463 sta->listen_interval);
2464 iwe.u.data.length = strlen(buf);
2465 current_ev = iwe_stream_add_point(current_ev, end_buf,
2466 &iwe, buf);
2467 }
2468#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
2469
2470 sta->last_rx_updated = 0;
2471
2472 /* To be continued, we should make good use of IWEVCUSTOM */
2473 }
2474
2475 spin_unlock_bh(&ap->sta_table_lock);
2476
2477 return current_ev - buffer;
2478}
2479
2480
2481static int prism2_hostapd_add_sta(struct ap_data *ap,
2482 struct prism2_hostapd_param *param)
2483{
2484 struct sta_info *sta;
2485
2486 spin_lock_bh(&ap->sta_table_lock);
2487 sta = ap_get_sta(ap, param->sta_addr);
2488 if (sta)
2489 atomic_inc(&sta->users);
2490 spin_unlock_bh(&ap->sta_table_lock);
2491
2492 if (sta == NULL) {
2493 sta = ap_add_sta(ap, param->sta_addr);
2494 if (sta == NULL)
2495 return -1;
2496 }
2497
2498 if (!(sta->flags & WLAN_STA_ASSOC) && !sta->ap && sta->local)
2499 hostap_event_new_sta(sta->local->dev, sta);
2500
2501 sta->flags |= WLAN_STA_AUTH | WLAN_STA_ASSOC;
2502 sta->last_rx = jiffies;
2503 sta->aid = param->u.add_sta.aid;
2504 sta->capability = param->u.add_sta.capability;
2505 sta->tx_supp_rates = param->u.add_sta.tx_supp_rates;
2506 if (sta->tx_supp_rates & WLAN_RATE_1M)
2507 sta->supported_rates[0] = 2;
2508 if (sta->tx_supp_rates & WLAN_RATE_2M)
2509 sta->supported_rates[1] = 4;
2510 if (sta->tx_supp_rates & WLAN_RATE_5M5)
2511 sta->supported_rates[2] = 11;
2512 if (sta->tx_supp_rates & WLAN_RATE_11M)
2513 sta->supported_rates[3] = 22;
2514 prism2_check_tx_rates(sta);
2515 atomic_dec(&sta->users);
2516 return 0;
2517}
2518
2519
2520static int prism2_hostapd_remove_sta(struct ap_data *ap,
2521 struct prism2_hostapd_param *param)
2522{
2523 struct sta_info *sta;
2524
2525 spin_lock_bh(&ap->sta_table_lock);
2526 sta = ap_get_sta(ap, param->sta_addr);
2527 if (sta) {
2528 ap_sta_hash_del(ap, sta);
2529 list_del(&sta->list);
2530 }
2531 spin_unlock_bh(&ap->sta_table_lock);
2532
2533 if (!sta)
2534 return -ENOENT;
2535
2536 if ((sta->flags & WLAN_STA_ASSOC) && !sta->ap && sta->local)
2537 hostap_event_expired_sta(sta->local->dev, sta);
2538 ap_free_sta(ap, sta);
2539
2540 return 0;
2541}
2542
2543
2544static int prism2_hostapd_get_info_sta(struct ap_data *ap,
2545 struct prism2_hostapd_param *param)
2546{
2547 struct sta_info *sta;
2548
2549 spin_lock_bh(&ap->sta_table_lock);
2550 sta = ap_get_sta(ap, param->sta_addr);
2551 if (sta)
2552 atomic_inc(&sta->users);
2553 spin_unlock_bh(&ap->sta_table_lock);
2554
2555 if (!sta)
2556 return -ENOENT;
2557
2558 param->u.get_info_sta.inactive_sec = (jiffies - sta->last_rx) / HZ;
2559
2560 atomic_dec(&sta->users);
2561
2562 return 1;
2563}
2564
2565
2566static int prism2_hostapd_set_flags_sta(struct ap_data *ap,
2567 struct prism2_hostapd_param *param)
2568{
2569 struct sta_info *sta;
2570
2571 spin_lock_bh(&ap->sta_table_lock);
2572 sta = ap_get_sta(ap, param->sta_addr);
2573 if (sta) {
2574 sta->flags |= param->u.set_flags_sta.flags_or;
2575 sta->flags &= param->u.set_flags_sta.flags_and;
2576 }
2577 spin_unlock_bh(&ap->sta_table_lock);
2578
2579 if (!sta)
2580 return -ENOENT;
2581
2582 return 0;
2583}
2584
2585
2586static int prism2_hostapd_sta_clear_stats(struct ap_data *ap,
2587 struct prism2_hostapd_param *param)
2588{
2589 struct sta_info *sta;
2590 int rate;
2591
2592 spin_lock_bh(&ap->sta_table_lock);
2593 sta = ap_get_sta(ap, param->sta_addr);
2594 if (sta) {
2595 sta->rx_packets = sta->tx_packets = 0;
2596 sta->rx_bytes = sta->tx_bytes = 0;
2597 for (rate = 0; rate < WLAN_RATE_COUNT; rate++) {
2598 sta->tx_count[rate] = 0;
2599 sta->rx_count[rate] = 0;
2600 }
2601 }
2602 spin_unlock_bh(&ap->sta_table_lock);
2603
2604 if (!sta)
2605 return -ENOENT;
2606
2607 return 0;
2608}
2609
2610
2611static int prism2_hostapd(struct ap_data *ap,
2612 struct prism2_hostapd_param *param)
2613{
2614 switch (param->cmd) {
2615 case PRISM2_HOSTAPD_FLUSH:
2616 ap_control_kickall(ap);
2617 return 0;
2618 case PRISM2_HOSTAPD_ADD_STA:
2619 return prism2_hostapd_add_sta(ap, param);
2620 case PRISM2_HOSTAPD_REMOVE_STA:
2621 return prism2_hostapd_remove_sta(ap, param);
2622 case PRISM2_HOSTAPD_GET_INFO_STA:
2623 return prism2_hostapd_get_info_sta(ap, param);
2624 case PRISM2_HOSTAPD_SET_FLAGS_STA:
2625 return prism2_hostapd_set_flags_sta(ap, param);
2626 case PRISM2_HOSTAPD_STA_CLEAR_STATS:
2627 return prism2_hostapd_sta_clear_stats(ap, param);
2628 default:
2629 printk(KERN_WARNING "prism2_hostapd: unknown cmd=%d\n",
2630 param->cmd);
2631 return -EOPNOTSUPP;
2632 }
2633}
2634
2635
2636/* Update station info for host-based TX rate control and return current
2637 * TX rate */
2638static int ap_update_sta_tx_rate(struct sta_info *sta, struct net_device *dev)
2639{
2640 int ret = sta->tx_rate;
2641 struct hostap_interface *iface;
2642 local_info_t *local;
2643
2644 iface = netdev_priv(dev);
2645 local = iface->local;
2646
2647 sta->tx_count[sta->tx_rate_idx]++;
2648 sta->tx_since_last_failure++;
2649 sta->tx_consecutive_exc = 0;
2650 if (sta->tx_since_last_failure >= WLAN_RATE_UPDATE_COUNT &&
2651 sta->tx_rate_idx < sta->tx_max_rate) {
2652 /* use next higher rate */
2653 int old_rate, new_rate;
2654 old_rate = new_rate = sta->tx_rate_idx;
2655 while (new_rate < sta->tx_max_rate) {
2656 new_rate++;
2657 if (ap_tx_rate_ok(new_rate, sta, local)) {
2658 sta->tx_rate_idx = new_rate;
2659 break;
2660 }
2661 }
2662 if (old_rate != sta->tx_rate_idx) {
2663 switch (sta->tx_rate_idx) {
2664 case 0: sta->tx_rate = 10; break;
2665 case 1: sta->tx_rate = 20; break;
2666 case 2: sta->tx_rate = 55; break;
2667 case 3: sta->tx_rate = 110; break;
2668 default: sta->tx_rate = 0; break;
2669 }
2670 PDEBUG(DEBUG_AP, "%s: STA " MACSTR " TX rate raised to"
2671 " %d\n", dev->name, MAC2STR(sta->addr),
2672 sta->tx_rate);
2673 }
2674 sta->tx_since_last_failure = 0;
2675 }
2676
2677 return ret;
2678}
2679
2680
2681/* Called only from software IRQ. Called for each TX frame prior possible
2682 * encryption and transmit. */
2683ap_tx_ret hostap_handle_sta_tx(local_info_t *local, struct hostap_tx_data *tx)
2684{
2685 struct sta_info *sta = NULL;
2686 struct sk_buff *skb = tx->skb;
2687 int set_tim, ret;
2688 struct ieee80211_hdr *hdr;
2689 struct hostap_skb_tx_data *meta;
2690
2691 meta = (struct hostap_skb_tx_data *) skb->cb;
2692 ret = AP_TX_CONTINUE;
2693 if (local->ap == NULL || skb->len < 10 ||
2694 meta->iface->type == HOSTAP_INTERFACE_STA)
2695 goto out;
2696
2697 hdr = (struct ieee80211_hdr *) skb->data;
2698
2699 if (hdr->addr1[0] & 0x01) {
2700 /* broadcast/multicast frame - no AP related processing */
2701 goto out;
2702 }
2703
2704 /* unicast packet - check whether destination STA is associated */
2705 spin_lock(&local->ap->sta_table_lock);
2706 sta = ap_get_sta(local->ap, hdr->addr1);
2707 if (sta)
2708 atomic_inc(&sta->users);
2709 spin_unlock(&local->ap->sta_table_lock);
2710
2711 if (local->iw_mode == IW_MODE_MASTER && sta == NULL &&
2712 !(meta->flags & HOSTAP_TX_FLAGS_WDS) &&
2713 meta->iface->type != HOSTAP_INTERFACE_MASTER &&
2714 meta->iface->type != HOSTAP_INTERFACE_AP) {
2715#if 0
2716 /* This can happen, e.g., when wlan0 is added to a bridge and
2717 * bridging code does not know which port is the correct target
2718 * for a unicast frame. In this case, the packet is send to all
2719 * ports of the bridge. Since this is a valid scenario, do not
2720 * print out any errors here. */
2721 if (net_ratelimit()) {
2722 printk(KERN_DEBUG "AP: drop packet to non-associated "
2723 "STA " MACSTR "\n", MAC2STR(hdr->addr1));
2724 }
2725#endif
2726 local->ap->tx_drop_nonassoc++;
2727 ret = AP_TX_DROP;
2728 goto out;
2729 }
2730
2731 if (sta == NULL)
2732 goto out;
2733
2734 if (!(sta->flags & WLAN_STA_AUTHORIZED))
2735 ret = AP_TX_CONTINUE_NOT_AUTHORIZED;
2736
2737 /* Set tx_rate if using host-based TX rate control */
2738 if (!local->fw_tx_rate_control)
2739 local->ap->last_tx_rate = meta->rate =
2740 ap_update_sta_tx_rate(sta, local->dev);
2741
2742 if (local->iw_mode != IW_MODE_MASTER)
2743 goto out;
2744
2745 if (!(sta->flags & WLAN_STA_PS))
2746 goto out;
2747
2748 if (meta->flags & HOSTAP_TX_FLAGS_ADD_MOREDATA) {
2749 /* indicate to STA that more frames follow */
2750 hdr->frame_ctl |=
2751 __constant_cpu_to_le16(IEEE80211_FCTL_MOREDATA);
2752 }
2753
2754 if (meta->flags & HOSTAP_TX_FLAGS_BUFFERED_FRAME) {
2755 /* packet was already buffered and now send due to
2756 * PS poll, so do not rebuffer it */
2757 goto out;
2758 }
2759
2760 if (skb_queue_len(&sta->tx_buf) >= STA_MAX_TX_BUFFER) {
2761 PDEBUG(DEBUG_PS, "%s: No more space in STA (" MACSTR ")'s PS "
2762 "mode buffer\n", local->dev->name, MAC2STR(sta->addr));
2763 /* Make sure that TIM is set for the station (it might not be
2764 * after AP wlan hw reset). */
2765 /* FIX: should fix hw reset to restore bits based on STA
2766 * buffer state.. */
2767 hostap_set_tim(local, sta->aid, 1);
2768 sta->flags |= WLAN_STA_TIM;
2769 ret = AP_TX_DROP;
2770 goto out;
2771 }
2772
2773 /* STA in PS mode, buffer frame for later delivery */
2774 set_tim = skb_queue_empty(&sta->tx_buf);
2775 skb_queue_tail(&sta->tx_buf, skb);
2776 /* FIX: could save RX time to skb and expire buffered frames after
2777 * some time if STA does not poll for them */
2778
2779 if (set_tim) {
2780 if (sta->flags & WLAN_STA_TIM)
2781 PDEBUG(DEBUG_PS2, "Re-setting TIM for aid %d\n",
2782 sta->aid);
2783 hostap_set_tim(local, sta->aid, 1);
2784 sta->flags |= WLAN_STA_TIM;
2785 }
2786
2787 ret = AP_TX_BUFFERED;
2788
2789 out:
2790 if (sta != NULL) {
2791 if (ret == AP_TX_CONTINUE ||
2792 ret == AP_TX_CONTINUE_NOT_AUTHORIZED) {
2793 sta->tx_packets++;
2794 sta->tx_bytes += skb->len;
2795 sta->last_tx = jiffies;
2796 }
2797
2798 if ((ret == AP_TX_CONTINUE ||
2799 ret == AP_TX_CONTINUE_NOT_AUTHORIZED) &&
2800 sta->crypt && tx->host_encrypt) {
2801 tx->crypt = sta->crypt;
2802 tx->sta_ptr = sta; /* hostap_handle_sta_release() will
2803 * be called to release sta info
2804 * later */
2805 } else
2806 atomic_dec(&sta->users);
2807 }
2808
2809 return ret;
2810}
2811
2812
2813void hostap_handle_sta_release(void *ptr)
2814{
2815 struct sta_info *sta = ptr;
2816 atomic_dec(&sta->users);
2817}
2818
2819
2820/* Called only as a tasklet (software IRQ) */
2821void hostap_handle_sta_tx_exc(local_info_t *local, struct sk_buff *skb)
2822{
2823 struct sta_info *sta;
2824 struct ieee80211_hdr *hdr;
2825 struct hostap_skb_tx_data *meta;
2826
2827 hdr = (struct ieee80211_hdr *) skb->data;
2828 meta = (struct hostap_skb_tx_data *) skb->cb;
2829
2830 spin_lock(&local->ap->sta_table_lock);
2831 sta = ap_get_sta(local->ap, hdr->addr1);
2832 if (!sta) {
2833 spin_unlock(&local->ap->sta_table_lock);
2834 PDEBUG(DEBUG_AP, "%s: Could not find STA " MACSTR " for this "
2835 "TX error (@%lu)\n",
2836 local->dev->name, MAC2STR(hdr->addr1), jiffies);
2837 return;
2838 }
2839
2840 sta->tx_since_last_failure = 0;
2841 sta->tx_consecutive_exc++;
2842
2843 if (sta->tx_consecutive_exc >= WLAN_RATE_DECREASE_THRESHOLD &&
2844 sta->tx_rate_idx > 0 && meta->rate <= sta->tx_rate) {
2845 /* use next lower rate */
2846 int old, rate;
2847 old = rate = sta->tx_rate_idx;
2848 while (rate > 0) {
2849 rate--;
2850 if (ap_tx_rate_ok(rate, sta, local)) {
2851 sta->tx_rate_idx = rate;
2852 break;
2853 }
2854 }
2855 if (old != sta->tx_rate_idx) {
2856 switch (sta->tx_rate_idx) {
2857 case 0: sta->tx_rate = 10; break;
2858 case 1: sta->tx_rate = 20; break;
2859 case 2: sta->tx_rate = 55; break;
2860 case 3: sta->tx_rate = 110; break;
2861 default: sta->tx_rate = 0; break;
2862 }
2863 PDEBUG(DEBUG_AP, "%s: STA " MACSTR " TX rate lowered "
2864 "to %d\n", local->dev->name, MAC2STR(sta->addr),
2865 sta->tx_rate);
2866 }
2867 sta->tx_consecutive_exc = 0;
2868 }
2869 spin_unlock(&local->ap->sta_table_lock);
2870}
2871
2872
2873static void hostap_update_sta_ps2(local_info_t *local, struct sta_info *sta,
2874 int pwrmgt, int type, int stype)
2875{
2876 if (pwrmgt && !(sta->flags & WLAN_STA_PS)) {
2877 sta->flags |= WLAN_STA_PS;
2878 PDEBUG(DEBUG_PS2, "STA " MACSTR " changed to use PS "
2879 "mode (type=0x%02X, stype=0x%02X)\n",
2880 MAC2STR(sta->addr), type >> 2, stype >> 4);
2881 } else if (!pwrmgt && (sta->flags & WLAN_STA_PS)) {
2882 sta->flags &= ~WLAN_STA_PS;
2883 PDEBUG(DEBUG_PS2, "STA " MACSTR " changed to not use "
2884 "PS mode (type=0x%02X, stype=0x%02X)\n",
2885 MAC2STR(sta->addr), type >> 2, stype >> 4);
2886 if (type != IEEE80211_FTYPE_CTL ||
2887 stype != IEEE80211_STYPE_PSPOLL)
2888 schedule_packet_send(local, sta);
2889 }
2890}
2891
2892
2893/* Called only as a tasklet (software IRQ). Called for each RX frame to update
2894 * STA power saving state. pwrmgt is a flag from 802.11 frame_ctl field. */
2895int hostap_update_sta_ps(local_info_t *local, struct ieee80211_hdr *hdr)
2896{
2897 struct sta_info *sta;
2898 u16 fc;
2899
2900 spin_lock(&local->ap->sta_table_lock);
2901 sta = ap_get_sta(local->ap, hdr->addr2);
2902 if (sta)
2903 atomic_inc(&sta->users);
2904 spin_unlock(&local->ap->sta_table_lock);
2905
2906 if (!sta)
2907 return -1;
2908
2909 fc = le16_to_cpu(hdr->frame_ctl);
2910 hostap_update_sta_ps2(local, sta, fc & IEEE80211_FCTL_PM,
2911 WLAN_FC_GET_TYPE(fc), WLAN_FC_GET_STYPE(fc));
2912
2913 atomic_dec(&sta->users);
2914 return 0;
2915}
2916
2917
2918/* Called only as a tasklet (software IRQ). Called for each RX frame after
2919 * getting RX header and payload from hardware. */
2920ap_rx_ret hostap_handle_sta_rx(local_info_t *local, struct net_device *dev,
2921 struct sk_buff *skb,
2922 struct hostap_80211_rx_status *rx_stats,
2923 int wds)
2924{
2925 int ret;
2926 struct sta_info *sta;
2927 u16 fc, type, stype;
2928 struct ieee80211_hdr *hdr;
2929
2930 if (local->ap == NULL)
2931 return AP_RX_CONTINUE;
2932
2933 hdr = (struct ieee80211_hdr *) skb->data;
2934
2935 fc = le16_to_cpu(hdr->frame_ctl);
2936 type = WLAN_FC_GET_TYPE(fc);
2937 stype = WLAN_FC_GET_STYPE(fc);
2938
2939 spin_lock(&local->ap->sta_table_lock);
2940 sta = ap_get_sta(local->ap, hdr->addr2);
2941 if (sta)
2942 atomic_inc(&sta->users);
2943 spin_unlock(&local->ap->sta_table_lock);
2944
2945 if (sta && !(sta->flags & WLAN_STA_AUTHORIZED))
2946 ret = AP_RX_CONTINUE_NOT_AUTHORIZED;
2947 else
2948 ret = AP_RX_CONTINUE;
2949
2950
2951 if (fc & IEEE80211_FCTL_TODS) {
2952 if (!wds && (sta == NULL || !(sta->flags & WLAN_STA_ASSOC))) {
2953 if (local->hostapd) {
2954 prism2_rx_80211(local->apdev, skb, rx_stats,
2955 PRISM2_RX_NON_ASSOC);
2956#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
2957 } else {
2958 printk(KERN_DEBUG "%s: dropped received packet"
2959 " from non-associated STA " MACSTR
2960 " (type=0x%02x, subtype=0x%02x)\n",
2961 dev->name, MAC2STR(hdr->addr2),
2962 type >> 2, stype >> 4);
2963 hostap_rx(dev, skb, rx_stats);
2964#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
2965 }
2966 ret = AP_RX_EXIT;
2967 goto out;
2968 }
2969 } else if (fc & IEEE80211_FCTL_FROMDS) {
2970 if (!wds) {
2971 /* FromDS frame - not for us; probably
2972 * broadcast/multicast in another BSS - drop */
2973 if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
2974 printk(KERN_DEBUG "Odd.. FromDS packet "
2975 "received with own BSSID\n");
2976 hostap_dump_rx_80211(dev->name, skb, rx_stats);
2977 }
2978 ret = AP_RX_DROP;
2979 goto out;
2980 }
2981 } else if (stype == IEEE80211_STYPE_NULLFUNC && sta == NULL &&
2982 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
2983
2984 if (local->hostapd) {
2985 prism2_rx_80211(local->apdev, skb, rx_stats,
2986 PRISM2_RX_NON_ASSOC);
2987#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
2988 } else {
2989 /* At least Lucent f/w seems to send data::nullfunc
2990 * frames with no ToDS flag when the current AP returns
2991 * after being unavailable for some time. Speed up
2992 * re-association by informing the station about it not
2993 * being associated. */
2994 printk(KERN_DEBUG "%s: rejected received nullfunc "
2995 "frame without ToDS from not associated STA "
2996 MACSTR "\n",
2997 dev->name, MAC2STR(hdr->addr2));
2998 hostap_rx(dev, skb, rx_stats);
2999#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
3000 }
3001 ret = AP_RX_EXIT;
3002 goto out;
3003 } else if (stype == IEEE80211_STYPE_NULLFUNC) {
3004 /* At least Lucent cards seem to send periodic nullfunc
3005 * frames with ToDS. Let these through to update SQ
3006 * stats and PS state. Nullfunc frames do not contain
3007 * any data and they will be dropped below. */
3008 } else {
3009 /* If BSSID (Addr3) is foreign, this frame is a normal
3010 * broadcast frame from an IBSS network. Drop it silently.
3011 * If BSSID is own, report the dropping of this frame. */
3012 if (memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
3013 printk(KERN_DEBUG "%s: dropped received packet from "
3014 MACSTR " with no ToDS flag (type=0x%02x, "
3015 "subtype=0x%02x)\n", dev->name,
3016 MAC2STR(hdr->addr2), type >> 2, stype >> 4);
3017 hostap_dump_rx_80211(dev->name, skb, rx_stats);
3018 }
3019 ret = AP_RX_DROP;
3020 goto out;
3021 }
3022
3023 if (sta) {
3024 hostap_update_sta_ps2(local, sta, fc & IEEE80211_FCTL_PM,
3025 type, stype);
3026
3027 sta->rx_packets++;
3028 sta->rx_bytes += skb->len;
3029 sta->last_rx = jiffies;
3030 }
3031
3032 if (local->ap->nullfunc_ack && stype == IEEE80211_STYPE_NULLFUNC &&
3033 fc & IEEE80211_FCTL_TODS) {
3034 if (local->hostapd) {
3035 prism2_rx_80211(local->apdev, skb, rx_stats,
3036 PRISM2_RX_NULLFUNC_ACK);
3037#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
3038 } else {
3039 /* some STA f/w's seem to require control::ACK frame
3040 * for data::nullfunc, but Prism2 f/w 0.8.0 (at least
3041 * from Compaq) does not send this.. Try to generate
3042 * ACK for these frames from the host driver to make
3043 * power saving work with, e.g., Lucent WaveLAN f/w */
3044 hostap_rx(dev, skb, rx_stats);
3045#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
3046 }
3047 ret = AP_RX_EXIT;
3048 goto out;
3049 }
3050
3051 out:
3052 if (sta)
3053 atomic_dec(&sta->users);
3054
3055 return ret;
3056}
3057
3058
3059/* Called only as a tasklet (software IRQ) */
3060int hostap_handle_sta_crypto(local_info_t *local,
3061 struct ieee80211_hdr *hdr,
3062 struct ieee80211_crypt_data **crypt,
3063 void **sta_ptr)
3064{
3065 struct sta_info *sta;
3066
3067 spin_lock(&local->ap->sta_table_lock);
3068 sta = ap_get_sta(local->ap, hdr->addr2);
3069 if (sta)
3070 atomic_inc(&sta->users);
3071 spin_unlock(&local->ap->sta_table_lock);
3072
3073 if (!sta)
3074 return -1;
3075
3076 if (sta->crypt) {
3077 *crypt = sta->crypt;
3078 *sta_ptr = sta;
3079 /* hostap_handle_sta_release() will be called to release STA
3080 * info */
3081 } else
3082 atomic_dec(&sta->users);
3083
3084 return 0;
3085}
3086
3087
3088/* Called only as a tasklet (software IRQ) */
3089int hostap_is_sta_assoc(struct ap_data *ap, u8 *sta_addr)
3090{
3091 struct sta_info *sta;
3092 int ret = 0;
3093
3094 spin_lock(&ap->sta_table_lock);
3095 sta = ap_get_sta(ap, sta_addr);
3096 if (sta != NULL && (sta->flags & WLAN_STA_ASSOC) && !sta->ap)
3097 ret = 1;
3098 spin_unlock(&ap->sta_table_lock);
3099
3100 return ret;
3101}
3102
3103
3104/* Called only as a tasklet (software IRQ) */
3105int hostap_is_sta_authorized(struct ap_data *ap, u8 *sta_addr)
3106{
3107 struct sta_info *sta;
3108 int ret = 0;
3109
3110 spin_lock(&ap->sta_table_lock);
3111 sta = ap_get_sta(ap, sta_addr);
3112 if (sta != NULL && (sta->flags & WLAN_STA_ASSOC) && !sta->ap &&
3113 ((sta->flags & WLAN_STA_AUTHORIZED) ||
3114 ap->local->ieee_802_1x == 0))
3115 ret = 1;
3116 spin_unlock(&ap->sta_table_lock);
3117
3118 return ret;
3119}
3120
3121
3122/* Called only as a tasklet (software IRQ) */
3123int hostap_add_sta(struct ap_data *ap, u8 *sta_addr)
3124{
3125 struct sta_info *sta;
3126 int ret = 1;
3127
3128 if (!ap)
3129 return -1;
3130
3131 spin_lock(&ap->sta_table_lock);
3132 sta = ap_get_sta(ap, sta_addr);
3133 if (sta)
3134 ret = 0;
3135 spin_unlock(&ap->sta_table_lock);
3136
3137 if (ret == 1) {
3138 sta = ap_add_sta(ap, sta_addr);
3139 if (!sta)
3140 ret = -1;
3141 sta->flags = WLAN_STA_AUTH | WLAN_STA_ASSOC;
3142 sta->ap = 1;
3143 memset(sta->supported_rates, 0, sizeof(sta->supported_rates));
3144 /* No way of knowing which rates are supported since we did not
3145 * get supported rates element from beacon/assoc req. Assume
3146 * that remote end supports all 802.11b rates. */
3147 sta->supported_rates[0] = 0x82;
3148 sta->supported_rates[1] = 0x84;
3149 sta->supported_rates[2] = 0x0b;
3150 sta->supported_rates[3] = 0x16;
3151 sta->tx_supp_rates = WLAN_RATE_1M | WLAN_RATE_2M |
3152 WLAN_RATE_5M5 | WLAN_RATE_11M;
3153 sta->tx_rate = 110;
3154 sta->tx_max_rate = sta->tx_rate_idx = 3;
3155 }
3156
3157 return ret;
3158}
3159
3160
3161/* Called only as a tasklet (software IRQ) */
3162int hostap_update_rx_stats(struct ap_data *ap,
3163 struct ieee80211_hdr *hdr,
3164 struct hostap_80211_rx_status *rx_stats)
3165{
3166 struct sta_info *sta;
3167
3168 if (!ap)
3169 return -1;
3170
3171 spin_lock(&ap->sta_table_lock);
3172 sta = ap_get_sta(ap, hdr->addr2);
3173 if (sta) {
3174 sta->last_rx_silence = rx_stats->noise;
3175 sta->last_rx_signal = rx_stats->signal;
3176 sta->last_rx_rate = rx_stats->rate;
3177 sta->last_rx_updated = 7;
3178 if (rx_stats->rate == 10)
3179 sta->rx_count[0]++;
3180 else if (rx_stats->rate == 20)
3181 sta->rx_count[1]++;
3182 else if (rx_stats->rate == 55)
3183 sta->rx_count[2]++;
3184 else if (rx_stats->rate == 110)
3185 sta->rx_count[3]++;
3186 }
3187 spin_unlock(&ap->sta_table_lock);
3188
3189 return sta ? 0 : -1;
3190}
3191
3192
3193void hostap_update_rates(local_info_t *local)
3194{
3195 struct list_head *ptr;
3196 struct ap_data *ap = local->ap;
3197
3198 if (!ap)
3199 return;
3200
3201 spin_lock_bh(&ap->sta_table_lock);
3202 for (ptr = ap->sta_list.next; ptr != &ap->sta_list; ptr = ptr->next) {
3203 struct sta_info *sta = (struct sta_info *) ptr;
3204 prism2_check_tx_rates(sta);
3205 }
3206 spin_unlock_bh(&ap->sta_table_lock);
3207}
3208
3209
3210static void * ap_crypt_get_ptrs(struct ap_data *ap, u8 *addr, int permanent,
3211 struct ieee80211_crypt_data ***crypt)
3212{
3213 struct sta_info *sta;
3214
3215 spin_lock_bh(&ap->sta_table_lock);
3216 sta = ap_get_sta(ap, addr);
3217 if (sta)
3218 atomic_inc(&sta->users);
3219 spin_unlock_bh(&ap->sta_table_lock);
3220
3221 if (!sta && permanent)
3222 sta = ap_add_sta(ap, addr);
3223
3224 if (!sta)
3225 return NULL;
3226
3227 if (permanent)
3228 sta->flags |= WLAN_STA_PERM;
3229
3230 *crypt = &sta->crypt;
3231
3232 return sta;
3233}
3234
3235
3236void hostap_add_wds_links(local_info_t *local)
3237{
3238 struct ap_data *ap = local->ap;
3239 struct list_head *ptr;
3240
3241 spin_lock_bh(&ap->sta_table_lock);
3242 list_for_each(ptr, &ap->sta_list) {
3243 struct sta_info *sta = list_entry(ptr, struct sta_info, list);
3244 if (sta->ap)
3245 hostap_wds_link_oper(local, sta->addr, WDS_ADD);
3246 }
3247 spin_unlock_bh(&ap->sta_table_lock);
3248
3249 schedule_work(&local->ap->wds_oper_queue);
3250}
3251
3252
3253void hostap_wds_link_oper(local_info_t *local, u8 *addr, wds_oper_type type)
3254{
3255 struct wds_oper_data *entry;
3256
3257 entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
3258 if (!entry)
3259 return;
3260 memcpy(entry->addr, addr, ETH_ALEN);
3261 entry->type = type;
3262 spin_lock_bh(&local->lock);
3263 entry->next = local->ap->wds_oper_entries;
3264 local->ap->wds_oper_entries = entry;
3265 spin_unlock_bh(&local->lock);
3266
3267 schedule_work(&local->ap->wds_oper_queue);
3268}
3269
3270
3271EXPORT_SYMBOL(hostap_init_data);
3272EXPORT_SYMBOL(hostap_init_ap_proc);
3273EXPORT_SYMBOL(hostap_free_data);
3274EXPORT_SYMBOL(hostap_check_sta_fw_version);
3275EXPORT_SYMBOL(hostap_handle_sta_tx);
3276EXPORT_SYMBOL(hostap_handle_sta_release);
3277EXPORT_SYMBOL(hostap_handle_sta_tx_exc);
3278EXPORT_SYMBOL(hostap_update_sta_ps);
3279EXPORT_SYMBOL(hostap_handle_sta_rx);
3280EXPORT_SYMBOL(hostap_is_sta_assoc);
3281EXPORT_SYMBOL(hostap_is_sta_authorized);
3282EXPORT_SYMBOL(hostap_add_sta);
3283EXPORT_SYMBOL(hostap_update_rates);
3284EXPORT_SYMBOL(hostap_add_wds_links);
3285EXPORT_SYMBOL(hostap_wds_link_oper);
3286#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
3287EXPORT_SYMBOL(hostap_deauth_all_stas);
3288#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
diff --git a/drivers/net/wireless/hostap/hostap_ap.h b/drivers/net/wireless/hostap/hostap_ap.h
new file mode 100644
index 000000000000..816a52bcea8f
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_ap.h
@@ -0,0 +1,261 @@
1#ifndef HOSTAP_AP_H
2#define HOSTAP_AP_H
3
4/* AP data structures for STAs */
5
6/* maximum number of frames to buffer per STA */
7#define STA_MAX_TX_BUFFER 32
8
9/* STA flags */
10#define WLAN_STA_AUTH BIT(0)
11#define WLAN_STA_ASSOC BIT(1)
12#define WLAN_STA_PS BIT(2)
13#define WLAN_STA_TIM BIT(3) /* TIM bit is on for PS stations */
14#define WLAN_STA_PERM BIT(4) /* permanent; do not remove entry on expiration */
15#define WLAN_STA_AUTHORIZED BIT(5) /* If 802.1X is used, this flag is
16 * controlling whether STA is authorized to
17 * send and receive non-IEEE 802.1X frames
18 */
19#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */
20
21#define WLAN_RATE_1M BIT(0)
22#define WLAN_RATE_2M BIT(1)
23#define WLAN_RATE_5M5 BIT(2)
24#define WLAN_RATE_11M BIT(3)
25#define WLAN_RATE_COUNT 4
26
27/* Maximum size of Supported Rates info element. IEEE 802.11 has a limit of 8,
28 * but some pre-standard IEEE 802.11g products use longer elements. */
29#define WLAN_SUPP_RATES_MAX 32
30
31/* Try to increase TX rate after # successfully sent consecutive packets */
32#define WLAN_RATE_UPDATE_COUNT 50
33
34/* Decrease TX rate after # consecutive dropped packets */
35#define WLAN_RATE_DECREASE_THRESHOLD 2
36
37struct sta_info {
38 struct list_head list;
39 struct sta_info *hnext; /* next entry in hash table list */
40 atomic_t users; /* number of users (do not remove if > 0) */
41 struct proc_dir_entry *proc;
42
43 u8 addr[6];
44 u16 aid; /* STA's unique AID (1 .. 2007) or 0 if not yet assigned */
45 u32 flags;
46 u16 capability;
47 u16 listen_interval; /* or beacon_int for APs */
48 u8 supported_rates[WLAN_SUPP_RATES_MAX];
49
50 unsigned long last_auth;
51 unsigned long last_assoc;
52 unsigned long last_rx;
53 unsigned long last_tx;
54 unsigned long rx_packets, tx_packets;
55 unsigned long rx_bytes, tx_bytes;
56 struct sk_buff_head tx_buf;
57 /* FIX: timeout buffers with an expiry time somehow derived from
58 * listen_interval */
59
60 s8 last_rx_silence; /* Noise in dBm */
61 s8 last_rx_signal; /* Signal strength in dBm */
62 u8 last_rx_rate; /* TX rate in 0.1 Mbps */
63 u8 last_rx_updated; /* IWSPY's struct iw_quality::updated */
64
65 u8 tx_supp_rates; /* bit field of supported TX rates */
66 u8 tx_rate; /* current TX rate (in 0.1 Mbps) */
67 u8 tx_rate_idx; /* current TX rate (WLAN_RATE_*) */
68 u8 tx_max_rate; /* max TX rate (WLAN_RATE_*) */
69 u32 tx_count[WLAN_RATE_COUNT]; /* number of frames sent (per rate) */
70 u32 rx_count[WLAN_RATE_COUNT]; /* number of frames received (per rate)
71 */
72 u32 tx_since_last_failure;
73 u32 tx_consecutive_exc;
74
75 struct ieee80211_crypt_data *crypt;
76
77 int ap; /* whether this station is an AP */
78
79 local_info_t *local;
80
81#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
82 union {
83 struct {
84 char *challenge; /* shared key authentication
85 * challenge */
86 } sta;
87 struct {
88 int ssid_len;
89 unsigned char ssid[MAX_SSID_LEN + 1]; /* AP's ssid */
90 int channel;
91 unsigned long last_beacon; /* last RX beacon time */
92 } ap;
93 } u;
94
95 struct timer_list timer;
96 enum { STA_NULLFUNC = 0, STA_DISASSOC, STA_DEAUTH } timeout_next;
97#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
98};
99
100
101#define MAX_STA_COUNT 1024
102
103/* Maximum number of AIDs to use for STAs; must be 2007 or lower
104 * (8802.11 limitation) */
105#define MAX_AID_TABLE_SIZE 128
106
107#define STA_HASH_SIZE 256
108#define STA_HASH(sta) (sta[5])
109
110
111/* Default value for maximum station inactivity. After AP_MAX_INACTIVITY_SEC
112 * has passed since last received frame from the station, a nullfunc data
113 * frame is sent to the station. If this frame is not acknowledged and no other
114 * frames have been received, the station will be disassociated after
115 * AP_DISASSOC_DELAY. Similarily, a the station will be deauthenticated after
116 * AP_DEAUTH_DELAY. AP_TIMEOUT_RESOLUTION is the resolution that is used with
117 * max inactivity timer. */
118#define AP_MAX_INACTIVITY_SEC (5 * 60)
119#define AP_DISASSOC_DELAY (HZ)
120#define AP_DEAUTH_DELAY (HZ)
121
122/* ap_policy: whether to accept frames to/from other APs/IBSS */
123typedef enum {
124 AP_OTHER_AP_SKIP_ALL = 0,
125 AP_OTHER_AP_SAME_SSID = 1,
126 AP_OTHER_AP_ALL = 2,
127 AP_OTHER_AP_EVEN_IBSS = 3
128} ap_policy_enum;
129
130#define PRISM2_AUTH_OPEN BIT(0)
131#define PRISM2_AUTH_SHARED_KEY BIT(1)
132
133
134/* MAC address-based restrictions */
135struct mac_entry {
136 struct list_head list;
137 u8 addr[6];
138};
139
140struct mac_restrictions {
141 enum { MAC_POLICY_OPEN = 0, MAC_POLICY_ALLOW, MAC_POLICY_DENY } policy;
142 unsigned int entries;
143 struct list_head mac_list;
144 spinlock_t lock;
145};
146
147
148struct add_sta_proc_data {
149 u8 addr[ETH_ALEN];
150 struct add_sta_proc_data *next;
151};
152
153
154typedef enum { WDS_ADD, WDS_DEL } wds_oper_type;
155struct wds_oper_data {
156 wds_oper_type type;
157 u8 addr[ETH_ALEN];
158 struct wds_oper_data *next;
159};
160
161
162struct ap_data {
163 int initialized; /* whether ap_data has been initialized */
164 local_info_t *local;
165 int bridge_packets; /* send packet to associated STAs directly to the
166 * wireless media instead of higher layers in the
167 * kernel */
168 unsigned int bridged_unicast; /* number of unicast frames bridged on
169 * wireless media */
170 unsigned int bridged_multicast; /* number of non-unicast frames
171 * bridged on wireless media */
172 unsigned int tx_drop_nonassoc; /* number of unicast TX packets dropped
173 * because they were to an address that
174 * was not associated */
175 int nullfunc_ack; /* use workaround for nullfunc frame ACKs */
176
177 spinlock_t sta_table_lock;
178 int num_sta; /* number of entries in sta_list */
179 struct list_head sta_list; /* STA info list head */
180 struct sta_info *sta_hash[STA_HASH_SIZE];
181
182 struct proc_dir_entry *proc;
183
184 ap_policy_enum ap_policy;
185 unsigned int max_inactivity;
186 int autom_ap_wds;
187
188 struct mac_restrictions mac_restrictions; /* MAC-based auth */
189 int last_tx_rate;
190
191 struct work_struct add_sta_proc_queue;
192 struct add_sta_proc_data *add_sta_proc_entries;
193
194 struct work_struct wds_oper_queue;
195 struct wds_oper_data *wds_oper_entries;
196
197 u16 tx_callback_idx;
198
199#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
200 /* pointers to STA info; based on allocated AID or NULL if AID free
201 * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1
202 * and so on
203 */
204 struct sta_info *sta_aid[MAX_AID_TABLE_SIZE];
205
206 u16 tx_callback_auth, tx_callback_assoc, tx_callback_poll;
207
208 /* WEP operations for generating challenges to be used with shared key
209 * authentication */
210 struct ieee80211_crypto_ops *crypt;
211 void *crypt_priv;
212#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
213};
214
215
216void hostap_rx(struct net_device *dev, struct sk_buff *skb,
217 struct hostap_80211_rx_status *rx_stats);
218void hostap_init_data(local_info_t *local);
219void hostap_init_ap_proc(local_info_t *local);
220void hostap_free_data(struct ap_data *ap);
221void hostap_check_sta_fw_version(struct ap_data *ap, int sta_fw_ver);
222
223typedef enum {
224 AP_TX_CONTINUE, AP_TX_DROP, AP_TX_RETRY, AP_TX_BUFFERED,
225 AP_TX_CONTINUE_NOT_AUTHORIZED
226} ap_tx_ret;
227struct hostap_tx_data {
228 struct sk_buff *skb;
229 int host_encrypt;
230 struct ieee80211_crypt_data *crypt;
231 void *sta_ptr;
232};
233ap_tx_ret hostap_handle_sta_tx(local_info_t *local, struct hostap_tx_data *tx);
234void hostap_handle_sta_release(void *ptr);
235void hostap_handle_sta_tx_exc(local_info_t *local, struct sk_buff *skb);
236int hostap_update_sta_ps(local_info_t *local, struct ieee80211_hdr *hdr);
237typedef enum {
238 AP_RX_CONTINUE, AP_RX_DROP, AP_RX_EXIT, AP_RX_CONTINUE_NOT_AUTHORIZED
239} ap_rx_ret;
240ap_rx_ret hostap_handle_sta_rx(local_info_t *local, struct net_device *dev,
241 struct sk_buff *skb,
242 struct hostap_80211_rx_status *rx_stats,
243 int wds);
244int hostap_handle_sta_crypto(local_info_t *local, struct ieee80211_hdr *hdr,
245 struct ieee80211_crypt_data **crypt,
246 void **sta_ptr);
247int hostap_is_sta_assoc(struct ap_data *ap, u8 *sta_addr);
248int hostap_is_sta_authorized(struct ap_data *ap, u8 *sta_addr);
249int hostap_add_sta(struct ap_data *ap, u8 *sta_addr);
250int hostap_update_rx_stats(struct ap_data *ap, struct ieee80211_hdr *hdr,
251 struct hostap_80211_rx_status *rx_stats);
252void hostap_update_rates(local_info_t *local);
253void hostap_add_wds_links(local_info_t *local);
254void hostap_wds_link_oper(local_info_t *local, u8 *addr, wds_oper_type type);
255
256#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
257void hostap_deauth_all_stas(struct net_device *dev, struct ap_data *ap,
258 int resend);
259#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
260
261#endif /* HOSTAP_AP_H */
diff --git a/drivers/net/wireless/hostap/hostap_common.h b/drivers/net/wireless/hostap/hostap_common.h
new file mode 100644
index 000000000000..6f4fa9dc308f
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_common.h
@@ -0,0 +1,435 @@
1#ifndef HOSTAP_COMMON_H
2#define HOSTAP_COMMON_H
3
4#define BIT(x) (1 << (x))
5
6#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
7#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
8
9
10/* IEEE 802.11 defines */
11
12/* Information Element IDs */
13#define WLAN_EID_SSID 0
14#define WLAN_EID_SUPP_RATES 1
15#define WLAN_EID_FH_PARAMS 2
16#define WLAN_EID_DS_PARAMS 3
17#define WLAN_EID_CF_PARAMS 4
18#define WLAN_EID_TIM 5
19#define WLAN_EID_IBSS_PARAMS 6
20#define WLAN_EID_CHALLENGE 16
21#define WLAN_EID_RSN 48
22#define WLAN_EID_GENERIC 221
23
24
25/* HFA384X Configuration RIDs */
26#define HFA384X_RID_CNFPORTTYPE 0xFC00
27#define HFA384X_RID_CNFOWNMACADDR 0xFC01
28#define HFA384X_RID_CNFDESIREDSSID 0xFC02
29#define HFA384X_RID_CNFOWNCHANNEL 0xFC03
30#define HFA384X_RID_CNFOWNSSID 0xFC04
31#define HFA384X_RID_CNFOWNATIMWINDOW 0xFC05
32#define HFA384X_RID_CNFSYSTEMSCALE 0xFC06
33#define HFA384X_RID_CNFMAXDATALEN 0xFC07
34#define HFA384X_RID_CNFWDSADDRESS 0xFC08
35#define HFA384X_RID_CNFPMENABLED 0xFC09
36#define HFA384X_RID_CNFPMEPS 0xFC0A
37#define HFA384X_RID_CNFMULTICASTRECEIVE 0xFC0B
38#define HFA384X_RID_CNFMAXSLEEPDURATION 0xFC0C
39#define HFA384X_RID_CNFPMHOLDOVERDURATION 0xFC0D
40#define HFA384X_RID_CNFOWNNAME 0xFC0E
41#define HFA384X_RID_CNFOWNDTIMPERIOD 0xFC10
42#define HFA384X_RID_CNFWDSADDRESS1 0xFC11 /* AP f/w only */
43#define HFA384X_RID_CNFWDSADDRESS2 0xFC12 /* AP f/w only */
44#define HFA384X_RID_CNFWDSADDRESS3 0xFC13 /* AP f/w only */
45#define HFA384X_RID_CNFWDSADDRESS4 0xFC14 /* AP f/w only */
46#define HFA384X_RID_CNFWDSADDRESS5 0xFC15 /* AP f/w only */
47#define HFA384X_RID_CNFWDSADDRESS6 0xFC16 /* AP f/w only */
48#define HFA384X_RID_CNFMULTICASTPMBUFFERING 0xFC17 /* AP f/w only */
49#define HFA384X_RID_UNKNOWN1 0xFC20
50#define HFA384X_RID_UNKNOWN2 0xFC21
51#define HFA384X_RID_CNFWEPDEFAULTKEYID 0xFC23
52#define HFA384X_RID_CNFDEFAULTKEY0 0xFC24
53#define HFA384X_RID_CNFDEFAULTKEY1 0xFC25
54#define HFA384X_RID_CNFDEFAULTKEY2 0xFC26
55#define HFA384X_RID_CNFDEFAULTKEY3 0xFC27
56#define HFA384X_RID_CNFWEPFLAGS 0xFC28
57#define HFA384X_RID_CNFWEPKEYMAPPINGTABLE 0xFC29
58#define HFA384X_RID_CNFAUTHENTICATION 0xFC2A
59#define HFA384X_RID_CNFMAXASSOCSTA 0xFC2B /* AP f/w only */
60#define HFA384X_RID_CNFTXCONTROL 0xFC2C
61#define HFA384X_RID_CNFROAMINGMODE 0xFC2D
62#define HFA384X_RID_CNFHOSTAUTHENTICATION 0xFC2E /* AP f/w only */
63#define HFA384X_RID_CNFRCVCRCERROR 0xFC30
64#define HFA384X_RID_CNFMMLIFE 0xFC31
65#define HFA384X_RID_CNFALTRETRYCOUNT 0xFC32
66#define HFA384X_RID_CNFBEACONINT 0xFC33
67#define HFA384X_RID_CNFAPPCFINFO 0xFC34 /* AP f/w only */
68#define HFA384X_RID_CNFSTAPCFINFO 0xFC35
69#define HFA384X_RID_CNFPRIORITYQUSAGE 0xFC37
70#define HFA384X_RID_CNFTIMCTRL 0xFC40
71#define HFA384X_RID_UNKNOWN3 0xFC41 /* added in STA f/w 0.7.x */
72#define HFA384X_RID_CNFTHIRTY2TALLY 0xFC42 /* added in STA f/w 0.8.0 */
73#define HFA384X_RID_CNFENHSECURITY 0xFC43 /* AP f/w or STA f/w >= 1.6.3 */
74#define HFA384X_RID_CNFDBMADJUST 0xFC46 /* added in STA f/w 1.3.1 */
75#define HFA384X_RID_GENERICELEMENT 0xFC48 /* added in STA f/w 1.7.0;
76 * write only */
77#define HFA384X_RID_PROPAGATIONDELAY 0xFC49 /* added in STA f/w 1.7.6 */
78#define HFA384X_RID_GROUPADDRESSES 0xFC80
79#define HFA384X_RID_CREATEIBSS 0xFC81
80#define HFA384X_RID_FRAGMENTATIONTHRESHOLD 0xFC82
81#define HFA384X_RID_RTSTHRESHOLD 0xFC83
82#define HFA384X_RID_TXRATECONTROL 0xFC84
83#define HFA384X_RID_PROMISCUOUSMODE 0xFC85
84#define HFA384X_RID_FRAGMENTATIONTHRESHOLD0 0xFC90 /* AP f/w only */
85#define HFA384X_RID_FRAGMENTATIONTHRESHOLD1 0xFC91 /* AP f/w only */
86#define HFA384X_RID_FRAGMENTATIONTHRESHOLD2 0xFC92 /* AP f/w only */
87#define HFA384X_RID_FRAGMENTATIONTHRESHOLD3 0xFC93 /* AP f/w only */
88#define HFA384X_RID_FRAGMENTATIONTHRESHOLD4 0xFC94 /* AP f/w only */
89#define HFA384X_RID_FRAGMENTATIONTHRESHOLD5 0xFC95 /* AP f/w only */
90#define HFA384X_RID_FRAGMENTATIONTHRESHOLD6 0xFC96 /* AP f/w only */
91#define HFA384X_RID_RTSTHRESHOLD0 0xFC97 /* AP f/w only */
92#define HFA384X_RID_RTSTHRESHOLD1 0xFC98 /* AP f/w only */
93#define HFA384X_RID_RTSTHRESHOLD2 0xFC99 /* AP f/w only */
94#define HFA384X_RID_RTSTHRESHOLD3 0xFC9A /* AP f/w only */
95#define HFA384X_RID_RTSTHRESHOLD4 0xFC9B /* AP f/w only */
96#define HFA384X_RID_RTSTHRESHOLD5 0xFC9C /* AP f/w only */
97#define HFA384X_RID_RTSTHRESHOLD6 0xFC9D /* AP f/w only */
98#define HFA384X_RID_TXRATECONTROL0 0xFC9E /* AP f/w only */
99#define HFA384X_RID_TXRATECONTROL1 0xFC9F /* AP f/w only */
100#define HFA384X_RID_TXRATECONTROL2 0xFCA0 /* AP f/w only */
101#define HFA384X_RID_TXRATECONTROL3 0xFCA1 /* AP f/w only */
102#define HFA384X_RID_TXRATECONTROL4 0xFCA2 /* AP f/w only */
103#define HFA384X_RID_TXRATECONTROL5 0xFCA3 /* AP f/w only */
104#define HFA384X_RID_TXRATECONTROL6 0xFCA4 /* AP f/w only */
105#define HFA384X_RID_CNFSHORTPREAMBLE 0xFCB0
106#define HFA384X_RID_CNFEXCLUDELONGPREAMBLE 0xFCB1
107#define HFA384X_RID_CNFAUTHENTICATIONRSPTO 0xFCB2
108#define HFA384X_RID_CNFBASICRATES 0xFCB3
109#define HFA384X_RID_CNFSUPPORTEDRATES 0xFCB4
110#define HFA384X_RID_CNFFALLBACKCTRL 0xFCB5 /* added in STA f/w 1.3.1 */
111#define HFA384X_RID_WEPKEYDISABLE 0xFCB6 /* added in STA f/w 1.3.1 */
112#define HFA384X_RID_WEPKEYMAPINDEX 0xFCB7 /* ? */
113#define HFA384X_RID_BROADCASTKEYID 0xFCB8 /* ? */
114#define HFA384X_RID_ENTSECFLAGEYID 0xFCB9 /* ? */
115#define HFA384X_RID_CNFPASSIVESCANCTRL 0xFCBA /* added in STA f/w 1.5.0 */
116#define HFA384X_RID_SSNHANDLINGMODE 0xFCBB /* added in STA f/w 1.7.0 */
117#define HFA384X_RID_MDCCONTROL 0xFCBC /* added in STA f/w 1.7.0 */
118#define HFA384X_RID_MDCCOUNTRY 0xFCBD /* added in STA f/w 1.7.0 */
119#define HFA384X_RID_TXPOWERMAX 0xFCBE /* added in STA f/w 1.7.0 */
120#define HFA384X_RID_CNFLFOENABLED 0xFCBF /* added in STA f/w 1.6.3 */
121#define HFA384X_RID_CAPINFO 0xFCC0 /* added in STA f/w 1.7.0 */
122#define HFA384X_RID_LISTENINTERVAL 0xFCC1 /* added in STA f/w 1.7.0 */
123#define HFA384X_RID_SW_ANT_DIV 0xFCC2 /* added in STA f/w 1.7.0; Prism3 */
124#define HFA384X_RID_LED_CTRL 0xFCC4 /* added in STA f/w 1.7.6 */
125#define HFA384X_RID_HFODELAY 0xFCC5 /* added in STA f/w 1.7.6 */
126#define HFA384X_RID_DISALLOWEDBSSID 0xFCC6 /* added in STA f/w 1.8.0 */
127#define HFA384X_RID_TICKTIME 0xFCE0
128#define HFA384X_RID_SCANREQUEST 0xFCE1
129#define HFA384X_RID_JOINREQUEST 0xFCE2
130#define HFA384X_RID_AUTHENTICATESTATION 0xFCE3 /* AP f/w only */
131#define HFA384X_RID_CHANNELINFOREQUEST 0xFCE4 /* AP f/w only */
132#define HFA384X_RID_HOSTSCAN 0xFCE5 /* added in STA f/w 1.3.1 */
133
134/* HFA384X Information RIDs */
135#define HFA384X_RID_MAXLOADTIME 0xFD00
136#define HFA384X_RID_DOWNLOADBUFFER 0xFD01
137#define HFA384X_RID_PRIID 0xFD02
138#define HFA384X_RID_PRISUPRANGE 0xFD03
139#define HFA384X_RID_CFIACTRANGES 0xFD04
140#define HFA384X_RID_NICSERNUM 0xFD0A
141#define HFA384X_RID_NICID 0xFD0B
142#define HFA384X_RID_MFISUPRANGE 0xFD0C
143#define HFA384X_RID_CFISUPRANGE 0xFD0D
144#define HFA384X_RID_CHANNELLIST 0xFD10
145#define HFA384X_RID_REGULATORYDOMAINS 0xFD11
146#define HFA384X_RID_TEMPTYPE 0xFD12
147#define HFA384X_RID_CIS 0xFD13
148#define HFA384X_RID_STAID 0xFD20
149#define HFA384X_RID_STASUPRANGE 0xFD21
150#define HFA384X_RID_MFIACTRANGES 0xFD22
151#define HFA384X_RID_CFIACTRANGES2 0xFD23
152#define HFA384X_RID_PRODUCTNAME 0xFD24 /* added in STA f/w 1.3.1;
153 * only Prism2.5(?) */
154#define HFA384X_RID_PORTSTATUS 0xFD40
155#define HFA384X_RID_CURRENTSSID 0xFD41
156#define HFA384X_RID_CURRENTBSSID 0xFD42
157#define HFA384X_RID_COMMSQUALITY 0xFD43
158#define HFA384X_RID_CURRENTTXRATE 0xFD44
159#define HFA384X_RID_CURRENTBEACONINTERVAL 0xFD45
160#define HFA384X_RID_CURRENTSCALETHRESHOLDS 0xFD46
161#define HFA384X_RID_PROTOCOLRSPTIME 0xFD47
162#define HFA384X_RID_SHORTRETRYLIMIT 0xFD48
163#define HFA384X_RID_LONGRETRYLIMIT 0xFD49
164#define HFA384X_RID_MAXTRANSMITLIFETIME 0xFD4A
165#define HFA384X_RID_MAXRECEIVELIFETIME 0xFD4B
166#define HFA384X_RID_CFPOLLABLE 0xFD4C
167#define HFA384X_RID_AUTHENTICATIONALGORITHMS 0xFD4D
168#define HFA384X_RID_PRIVACYOPTIONIMPLEMENTED 0xFD4F
169#define HFA384X_RID_DBMCOMMSQUALITY 0xFD51 /* added in STA f/w 1.3.1 */
170#define HFA384X_RID_CURRENTTXRATE1 0xFD80 /* AP f/w only */
171#define HFA384X_RID_CURRENTTXRATE2 0xFD81 /* AP f/w only */
172#define HFA384X_RID_CURRENTTXRATE3 0xFD82 /* AP f/w only */
173#define HFA384X_RID_CURRENTTXRATE4 0xFD83 /* AP f/w only */
174#define HFA384X_RID_CURRENTTXRATE5 0xFD84 /* AP f/w only */
175#define HFA384X_RID_CURRENTTXRATE6 0xFD85 /* AP f/w only */
176#define HFA384X_RID_OWNMACADDR 0xFD86 /* AP f/w only */
177#define HFA384X_RID_SCANRESULTSTABLE 0xFD88 /* added in STA f/w 0.8.3 */
178#define HFA384X_RID_HOSTSCANRESULTS 0xFD89 /* added in STA f/w 1.3.1 */
179#define HFA384X_RID_AUTHENTICATIONUSED 0xFD8A /* added in STA f/w 1.3.4 */
180#define HFA384X_RID_CNFFAASWITCHCTRL 0xFD8B /* added in STA f/w 1.6.3 */
181#define HFA384X_RID_ASSOCIATIONFAILURE 0xFD8D /* added in STA f/w 1.8.0 */
182#define HFA384X_RID_PHYTYPE 0xFDC0
183#define HFA384X_RID_CURRENTCHANNEL 0xFDC1
184#define HFA384X_RID_CURRENTPOWERSTATE 0xFDC2
185#define HFA384X_RID_CCAMODE 0xFDC3
186#define HFA384X_RID_SUPPORTEDDATARATES 0xFDC6
187#define HFA384X_RID_LFO_VOLT_REG_TEST_RES 0xFDC7 /* added in STA f/w 1.7.1 */
188#define HFA384X_RID_BUILDSEQ 0xFFFE
189#define HFA384X_RID_FWID 0xFFFF
190
191
192struct hfa384x_comp_ident
193{
194 u16 id;
195 u16 variant;
196 u16 major;
197 u16 minor;
198} __attribute__ ((packed));
199
200#define HFA384X_COMP_ID_PRI 0x15
201#define HFA384X_COMP_ID_STA 0x1f
202#define HFA384X_COMP_ID_FW_AP 0x14b
203
204struct hfa384x_sup_range
205{
206 u16 role;
207 u16 id;
208 u16 variant;
209 u16 bottom;
210 u16 top;
211} __attribute__ ((packed));
212
213
214struct hfa384x_build_id
215{
216 u16 pri_seq;
217 u16 sec_seq;
218} __attribute__ ((packed));
219
220/* FD01 - Download Buffer */
221struct hfa384x_rid_download_buffer
222{
223 u16 page;
224 u16 offset;
225 u16 length;
226} __attribute__ ((packed));
227
228/* BSS connection quality (RID FD43 range, RID FD51 dBm-normalized) */
229struct hfa384x_comms_quality {
230 u16 comm_qual; /* 0 .. 92 */
231 u16 signal_level; /* 27 .. 154 */
232 u16 noise_level; /* 27 .. 154 */
233} __attribute__ ((packed));
234
235
236/* netdevice private ioctls (used, e.g., with iwpriv from user space) */
237
238/* New wireless extensions API - SET/GET convention (even ioctl numbers are
239 * root only)
240 */
241#define PRISM2_IOCTL_PRISM2_PARAM (SIOCIWFIRSTPRIV + 0)
242#define PRISM2_IOCTL_GET_PRISM2_PARAM (SIOCIWFIRSTPRIV + 1)
243#define PRISM2_IOCTL_WRITEMIF (SIOCIWFIRSTPRIV + 2)
244#define PRISM2_IOCTL_READMIF (SIOCIWFIRSTPRIV + 3)
245#define PRISM2_IOCTL_MONITOR (SIOCIWFIRSTPRIV + 4)
246#define PRISM2_IOCTL_RESET (SIOCIWFIRSTPRIV + 6)
247#define PRISM2_IOCTL_INQUIRE (SIOCIWFIRSTPRIV + 8)
248#define PRISM2_IOCTL_WDS_ADD (SIOCIWFIRSTPRIV + 10)
249#define PRISM2_IOCTL_WDS_DEL (SIOCIWFIRSTPRIV + 12)
250#define PRISM2_IOCTL_SET_RID_WORD (SIOCIWFIRSTPRIV + 14)
251#define PRISM2_IOCTL_MACCMD (SIOCIWFIRSTPRIV + 16)
252#define PRISM2_IOCTL_ADDMAC (SIOCIWFIRSTPRIV + 18)
253#define PRISM2_IOCTL_DELMAC (SIOCIWFIRSTPRIV + 20)
254#define PRISM2_IOCTL_KICKMAC (SIOCIWFIRSTPRIV + 22)
255
256/* following are not in SIOCGIWPRIV list; check permission in the driver code
257 */
258#define PRISM2_IOCTL_DOWNLOAD (SIOCDEVPRIVATE + 13)
259#define PRISM2_IOCTL_HOSTAPD (SIOCDEVPRIVATE + 14)
260
261
262/* PRISM2_IOCTL_PRISM2_PARAM ioctl() subtypes: */
263enum {
264 /* PRISM2_PARAM_PTYPE = 1, */ /* REMOVED 2003-10-22 */
265 PRISM2_PARAM_TXRATECTRL = 2,
266 PRISM2_PARAM_BEACON_INT = 3,
267 PRISM2_PARAM_PSEUDO_IBSS = 4,
268 PRISM2_PARAM_ALC = 5,
269 /* PRISM2_PARAM_TXPOWER = 6, */ /* REMOVED 2003-10-22 */
270 PRISM2_PARAM_DUMP = 7,
271 PRISM2_PARAM_OTHER_AP_POLICY = 8,
272 PRISM2_PARAM_AP_MAX_INACTIVITY = 9,
273 PRISM2_PARAM_AP_BRIDGE_PACKETS = 10,
274 PRISM2_PARAM_DTIM_PERIOD = 11,
275 PRISM2_PARAM_AP_NULLFUNC_ACK = 12,
276 PRISM2_PARAM_MAX_WDS = 13,
277 PRISM2_PARAM_AP_AUTOM_AP_WDS = 14,
278 PRISM2_PARAM_AP_AUTH_ALGS = 15,
279 PRISM2_PARAM_MONITOR_ALLOW_FCSERR = 16,
280 PRISM2_PARAM_HOST_ENCRYPT = 17,
281 PRISM2_PARAM_HOST_DECRYPT = 18,
282 /* PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX = 19, REMOVED 2005-08-14 */
283 /* PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX = 20, REMOVED 2005-08-14 */
284 PRISM2_PARAM_HOST_ROAMING = 21,
285 PRISM2_PARAM_BCRX_STA_KEY = 22,
286 PRISM2_PARAM_IEEE_802_1X = 23,
287 PRISM2_PARAM_ANTSEL_TX = 24,
288 PRISM2_PARAM_ANTSEL_RX = 25,
289 PRISM2_PARAM_MONITOR_TYPE = 26,
290 PRISM2_PARAM_WDS_TYPE = 27,
291 PRISM2_PARAM_HOSTSCAN = 28,
292 PRISM2_PARAM_AP_SCAN = 29,
293 PRISM2_PARAM_ENH_SEC = 30,
294 PRISM2_PARAM_IO_DEBUG = 31,
295 PRISM2_PARAM_BASIC_RATES = 32,
296 PRISM2_PARAM_OPER_RATES = 33,
297 PRISM2_PARAM_HOSTAPD = 34,
298 PRISM2_PARAM_HOSTAPD_STA = 35,
299 PRISM2_PARAM_WPA = 36,
300 PRISM2_PARAM_PRIVACY_INVOKED = 37,
301 PRISM2_PARAM_TKIP_COUNTERMEASURES = 38,
302 PRISM2_PARAM_DROP_UNENCRYPTED = 39,
303 PRISM2_PARAM_SCAN_CHANNEL_MASK = 40,
304};
305
306enum { HOSTAP_ANTSEL_DO_NOT_TOUCH = 0, HOSTAP_ANTSEL_DIVERSITY = 1,
307 HOSTAP_ANTSEL_LOW = 2, HOSTAP_ANTSEL_HIGH = 3 };
308
309
310/* PRISM2_IOCTL_MACCMD ioctl() subcommands: */
311enum { AP_MAC_CMD_POLICY_OPEN = 0, AP_MAC_CMD_POLICY_ALLOW = 1,
312 AP_MAC_CMD_POLICY_DENY = 2, AP_MAC_CMD_FLUSH = 3,
313 AP_MAC_CMD_KICKALL = 4 };
314
315
316/* PRISM2_IOCTL_DOWNLOAD ioctl() dl_cmd: */
317enum {
318 PRISM2_DOWNLOAD_VOLATILE = 1 /* RAM */,
319 /* Note! Old versions of prism2_srec have a fatal error in CRC-16
320 * calculation, which will corrupt all non-volatile downloads.
321 * PRISM2_DOWNLOAD_NON_VOLATILE used to be 2, but it is now 3 to
322 * prevent use of old versions of prism2_srec for non-volatile
323 * download. */
324 PRISM2_DOWNLOAD_NON_VOLATILE = 3 /* FLASH */,
325 PRISM2_DOWNLOAD_VOLATILE_GENESIS = 4 /* RAM in Genesis mode */,
326 /* Persistent versions of volatile download commands (keep firmware
327 * data in memory and automatically re-download after hw_reset */
328 PRISM2_DOWNLOAD_VOLATILE_PERSISTENT = 5,
329 PRISM2_DOWNLOAD_VOLATILE_GENESIS_PERSISTENT = 6,
330};
331
332struct prism2_download_param {
333 u32 dl_cmd;
334 u32 start_addr;
335 u32 num_areas;
336 struct prism2_download_area {
337 u32 addr; /* wlan card address */
338 u32 len;
339 void __user *ptr; /* pointer to data in user space */
340 } data[0];
341};
342
343#define PRISM2_MAX_DOWNLOAD_AREA_LEN 131072
344#define PRISM2_MAX_DOWNLOAD_LEN 262144
345
346
347/* PRISM2_IOCTL_HOSTAPD ioctl() cmd: */
348enum {
349 PRISM2_HOSTAPD_FLUSH = 1,
350 PRISM2_HOSTAPD_ADD_STA = 2,
351 PRISM2_HOSTAPD_REMOVE_STA = 3,
352 PRISM2_HOSTAPD_GET_INFO_STA = 4,
353 /* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */
354 PRISM2_SET_ENCRYPTION = 6,
355 PRISM2_GET_ENCRYPTION = 7,
356 PRISM2_HOSTAPD_SET_FLAGS_STA = 8,
357 PRISM2_HOSTAPD_GET_RID = 9,
358 PRISM2_HOSTAPD_SET_RID = 10,
359 PRISM2_HOSTAPD_SET_ASSOC_AP_ADDR = 11,
360 PRISM2_HOSTAPD_SET_GENERIC_ELEMENT = 12,
361 PRISM2_HOSTAPD_MLME = 13,
362 PRISM2_HOSTAPD_SCAN_REQ = 14,
363 PRISM2_HOSTAPD_STA_CLEAR_STATS = 15,
364};
365
366#define PRISM2_HOSTAPD_MAX_BUF_SIZE 1024
367#define PRISM2_HOSTAPD_RID_HDR_LEN \
368((int) (&((struct prism2_hostapd_param *) 0)->u.rid.data))
369#define PRISM2_HOSTAPD_GENERIC_ELEMENT_HDR_LEN \
370((int) (&((struct prism2_hostapd_param *) 0)->u.generic_elem.data))
371
372/* Maximum length for algorithm names (-1 for nul termination) used in ioctl()
373 */
374#define HOSTAP_CRYPT_ALG_NAME_LEN 16
375
376
377struct prism2_hostapd_param {
378 u32 cmd;
379 u8 sta_addr[ETH_ALEN];
380 union {
381 struct {
382 u16 aid;
383 u16 capability;
384 u8 tx_supp_rates;
385 } add_sta;
386 struct {
387 u32 inactive_sec;
388 } get_info_sta;
389 struct {
390 u8 alg[HOSTAP_CRYPT_ALG_NAME_LEN];
391 u32 flags;
392 u32 err;
393 u8 idx;
394 u8 seq[8]; /* sequence counter (set: RX, get: TX) */
395 u16 key_len;
396 u8 key[0];
397 } crypt;
398 struct {
399 u32 flags_and;
400 u32 flags_or;
401 } set_flags_sta;
402 struct {
403 u16 rid;
404 u16 len;
405 u8 data[0];
406 } rid;
407 struct {
408 u8 len;
409 u8 data[0];
410 } generic_elem;
411 struct {
412#define MLME_STA_DEAUTH 0
413#define MLME_STA_DISASSOC 1
414 u16 cmd;
415 u16 reason_code;
416 } mlme;
417 struct {
418 u8 ssid_len;
419 u8 ssid[32];
420 } scan_req;
421 } u;
422};
423
424#define HOSTAP_CRYPT_FLAG_SET_TX_KEY BIT(0)
425#define HOSTAP_CRYPT_FLAG_PERMANENT BIT(1)
426
427#define HOSTAP_CRYPT_ERR_UNKNOWN_ALG 2
428#define HOSTAP_CRYPT_ERR_UNKNOWN_ADDR 3
429#define HOSTAP_CRYPT_ERR_CRYPT_INIT_FAILED 4
430#define HOSTAP_CRYPT_ERR_KEY_SET_FAILED 5
431#define HOSTAP_CRYPT_ERR_TX_KEY_SET_FAILED 6
432#define HOSTAP_CRYPT_ERR_CARD_CONF_FAILED 7
433
434
435#endif /* HOSTAP_COMMON_H */
diff --git a/drivers/net/wireless/hostap/hostap_config.h b/drivers/net/wireless/hostap/hostap_config.h
new file mode 100644
index 000000000000..7ed3425d08c1
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_config.h
@@ -0,0 +1,55 @@
1#ifndef HOSTAP_CONFIG_H
2#define HOSTAP_CONFIG_H
3
4#define PRISM2_VERSION "0.4.4-kernel"
5
6/* In the previous versions of Host AP driver, support for user space version
7 * of IEEE 802.11 management (hostapd) used to be disabled in the default
8 * configuration. From now on, support for hostapd is always included and it is
9 * possible to disable kernel driver version of IEEE 802.11 management with a
10 * separate define, PRISM2_NO_KERNEL_IEEE80211_MGMT. */
11/* #define PRISM2_NO_KERNEL_IEEE80211_MGMT */
12
13/* Maximum number of events handler per one interrupt */
14#define PRISM2_MAX_INTERRUPT_EVENTS 20
15
16/* Include code for downloading firmware images into volatile RAM. */
17#define PRISM2_DOWNLOAD_SUPPORT
18
19/* Allow kernel configuration to enable download support. */
20#if !defined(PRISM2_DOWNLOAD_SUPPORT) && defined(CONFIG_HOSTAP_FIRMWARE)
21#define PRISM2_DOWNLOAD_SUPPORT
22#endif
23
24#ifdef PRISM2_DOWNLOAD_SUPPORT
25/* Allow writing firmware images into flash, i.e., to non-volatile storage.
26 * Before you enable this option, you should make absolutely sure that you are
27 * using prism2_srec utility that comes with THIS version of the driver!
28 * In addition, please note that it is possible to kill your card with
29 * non-volatile download if you are using incorrect image. This feature has not
30 * been fully tested, so please be careful with it. */
31/* #define PRISM2_NON_VOLATILE_DOWNLOAD */
32#endif /* PRISM2_DOWNLOAD_SUPPORT */
33
34/* Save low-level I/O for debugging. This should not be enabled in normal use.
35 */
36/* #define PRISM2_IO_DEBUG */
37
38/* Following defines can be used to remove unneeded parts of the driver, e.g.,
39 * to limit the size of the kernel module. Definitions can be added here in
40 * hostap_config.h or they can be added to make command with EXTRA_CFLAGS,
41 * e.g.,
42 * 'make pccard EXTRA_CFLAGS="-DPRISM2_NO_DEBUG -DPRISM2_NO_PROCFS_DEBUG"'
43 */
44
45/* Do not include debug messages into the driver */
46/* #define PRISM2_NO_DEBUG */
47
48/* Do not include /proc/net/prism2/wlan#/{registers,debug} */
49/* #define PRISM2_NO_PROCFS_DEBUG */
50
51/* Do not include station functionality (i.e., allow only Master (Host AP) mode
52 */
53/* #define PRISM2_NO_STATION_MODES */
54
55#endif /* HOSTAP_CONFIG_H */
diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c
new file mode 100644
index 000000000000..faa83badf0a1
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_cs.c
@@ -0,0 +1,1030 @@
1#define PRISM2_PCCARD
2
3#include <linux/config.h>
4#include <linux/module.h>
5#include <linux/init.h>
6#include <linux/if.h>
7#include <linux/wait.h>
8#include <linux/timer.h>
9#include <linux/skbuff.h>
10#include <linux/netdevice.h>
11#include <linux/workqueue.h>
12#include <linux/wireless.h>
13#include <net/iw_handler.h>
14
15#include <pcmcia/cs_types.h>
16#include <pcmcia/cs.h>
17#include <pcmcia/cistpl.h>
18#include <pcmcia/cisreg.h>
19#include <pcmcia/ds.h>
20
21#include <asm/io.h>
22
23#include "hostap_wlan.h"
24
25
26static char *version = PRISM2_VERSION " (Jouni Malinen <jkmaline@cc.hut.fi>)";
27static dev_info_t dev_info = "hostap_cs";
28static dev_link_t *dev_list = NULL;
29
30MODULE_AUTHOR("Jouni Malinen");
31MODULE_DESCRIPTION("Support for Intersil Prism2-based 802.11 wireless LAN "
32 "cards (PC Card).");
33MODULE_SUPPORTED_DEVICE("Intersil Prism2-based WLAN cards (PC Card)");
34MODULE_LICENSE("GPL");
35MODULE_VERSION(PRISM2_VERSION);
36
37
38static int ignore_cis_vcc;
39module_param(ignore_cis_vcc, int, 0444);
40MODULE_PARM_DESC(ignore_cis_vcc, "Ignore broken CIS VCC entry");
41
42
43/* struct local_info::hw_priv */
44struct hostap_cs_priv {
45 dev_node_t node;
46 dev_link_t *link;
47 int sandisk_connectplus;
48};
49
50
51#ifdef PRISM2_IO_DEBUG
52
53static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v)
54{
55 struct hostap_interface *iface;
56 local_info_t *local;
57 unsigned long flags;
58
59 iface = netdev_priv(dev);
60 local = iface->local;
61 spin_lock_irqsave(&local->lock, flags);
62 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v);
63 outb(v, dev->base_addr + a);
64 spin_unlock_irqrestore(&local->lock, flags);
65}
66
67static inline u8 hfa384x_inb_debug(struct net_device *dev, int a)
68{
69 struct hostap_interface *iface;
70 local_info_t *local;
71 unsigned long flags;
72 u8 v;
73
74 iface = netdev_priv(dev);
75 local = iface->local;
76 spin_lock_irqsave(&local->lock, flags);
77 v = inb(dev->base_addr + a);
78 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v);
79 spin_unlock_irqrestore(&local->lock, flags);
80 return v;
81}
82
83static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v)
84{
85 struct hostap_interface *iface;
86 local_info_t *local;
87 unsigned long flags;
88
89 iface = netdev_priv(dev);
90 local = iface->local;
91 spin_lock_irqsave(&local->lock, flags);
92 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v);
93 outw(v, dev->base_addr + a);
94 spin_unlock_irqrestore(&local->lock, flags);
95}
96
97static inline u16 hfa384x_inw_debug(struct net_device *dev, int a)
98{
99 struct hostap_interface *iface;
100 local_info_t *local;
101 unsigned long flags;
102 u16 v;
103
104 iface = netdev_priv(dev);
105 local = iface->local;
106 spin_lock_irqsave(&local->lock, flags);
107 v = inw(dev->base_addr + a);
108 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v);
109 spin_unlock_irqrestore(&local->lock, flags);
110 return v;
111}
112
113static inline void hfa384x_outsw_debug(struct net_device *dev, int a,
114 u8 *buf, int wc)
115{
116 struct hostap_interface *iface;
117 local_info_t *local;
118 unsigned long flags;
119
120 iface = netdev_priv(dev);
121 local = iface->local;
122 spin_lock_irqsave(&local->lock, flags);
123 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTSW, a, wc);
124 outsw(dev->base_addr + a, buf, wc);
125 spin_unlock_irqrestore(&local->lock, flags);
126}
127
128static inline void hfa384x_insw_debug(struct net_device *dev, int a,
129 u8 *buf, int wc)
130{
131 struct hostap_interface *iface;
132 local_info_t *local;
133 unsigned long flags;
134
135 iface = netdev_priv(dev);
136 local = iface->local;
137 spin_lock_irqsave(&local->lock, flags);
138 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INSW, a, wc);
139 insw(dev->base_addr + a, buf, wc);
140 spin_unlock_irqrestore(&local->lock, flags);
141}
142
143#define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v))
144#define HFA384X_INB(a) hfa384x_inb_debug(dev, (a))
145#define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v))
146#define HFA384X_INW(a) hfa384x_inw_debug(dev, (a))
147#define HFA384X_OUTSW(a, buf, wc) hfa384x_outsw_debug(dev, (a), (buf), (wc))
148#define HFA384X_INSW(a, buf, wc) hfa384x_insw_debug(dev, (a), (buf), (wc))
149
150#else /* PRISM2_IO_DEBUG */
151
152#define HFA384X_OUTB(v,a) outb((v), dev->base_addr + (a))
153#define HFA384X_INB(a) inb(dev->base_addr + (a))
154#define HFA384X_OUTW(v,a) outw((v), dev->base_addr + (a))
155#define HFA384X_INW(a) inw(dev->base_addr + (a))
156#define HFA384X_INSW(a, buf, wc) insw(dev->base_addr + (a), buf, wc)
157#define HFA384X_OUTSW(a, buf, wc) outsw(dev->base_addr + (a), buf, wc)
158
159#endif /* PRISM2_IO_DEBUG */
160
161
162static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf,
163 int len)
164{
165 u16 d_off;
166 u16 *pos;
167
168 d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
169 pos = (u16 *) buf;
170
171 if (len / 2)
172 HFA384X_INSW(d_off, buf, len / 2);
173 pos += len / 2;
174
175 if (len & 1)
176 *((char *) pos) = HFA384X_INB(d_off);
177
178 return 0;
179}
180
181
182static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len)
183{
184 u16 d_off;
185 u16 *pos;
186
187 d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
188 pos = (u16 *) buf;
189
190 if (len / 2)
191 HFA384X_OUTSW(d_off, buf, len / 2);
192 pos += len / 2;
193
194 if (len & 1)
195 HFA384X_OUTB(*((char *) pos), d_off);
196
197 return 0;
198}
199
200
201/* FIX: This might change at some point.. */
202#include "hostap_hw.c"
203
204
205
206static void prism2_detach(dev_link_t *link);
207static void prism2_release(u_long arg);
208static int prism2_event(event_t event, int priority,
209 event_callback_args_t *args);
210
211
212static int prism2_pccard_card_present(local_info_t *local)
213{
214 struct hostap_cs_priv *hw_priv = local->hw_priv;
215 if (hw_priv != NULL && hw_priv->link != NULL &&
216 ((hw_priv->link->state & (DEV_PRESENT | DEV_CONFIG)) ==
217 (DEV_PRESENT | DEV_CONFIG)))
218 return 1;
219 return 0;
220}
221
222
223/*
224 * SanDisk CompactFlash WLAN Flashcard - Product Manual v1.0
225 * Document No. 20-10-00058, January 2004
226 * http://www.sandisk.com/pdf/industrial/ProdManualCFWLANv1.0.pdf
227 */
228#define SANDISK_WLAN_ACTIVATION_OFF 0x40
229#define SANDISK_HCR_OFF 0x42
230
231
232static void sandisk_set_iobase(local_info_t *local)
233{
234 int res;
235 conf_reg_t reg;
236 struct hostap_cs_priv *hw_priv = local->hw_priv;
237
238 reg.Function = 0;
239 reg.Action = CS_WRITE;
240 reg.Offset = 0x10; /* 0x3f0 IO base 1 */
241 reg.Value = hw_priv->link->io.BasePort1 & 0x00ff;
242 res = pcmcia_access_configuration_register(hw_priv->link->handle,
243 &reg);
244 if (res != CS_SUCCESS) {
245 printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 0 -"
246 " res=%d\n", res);
247 }
248 udelay(10);
249
250 reg.Function = 0;
251 reg.Action = CS_WRITE;
252 reg.Offset = 0x12; /* 0x3f2 IO base 2 */
253 reg.Value = (hw_priv->link->io.BasePort1 & 0xff00) >> 8;
254 res = pcmcia_access_configuration_register(hw_priv->link->handle,
255 &reg);
256 if (res != CS_SUCCESS) {
257 printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 1 -"
258 " res=%d\n", res);
259 }
260}
261
262
263static void sandisk_write_hcr(local_info_t *local, int hcr)
264{
265 struct net_device *dev = local->dev;
266 int i;
267
268 HFA384X_OUTB(0x80, SANDISK_WLAN_ACTIVATION_OFF);
269 udelay(50);
270 for (i = 0; i < 10; i++) {
271 HFA384X_OUTB(hcr, SANDISK_HCR_OFF);
272 }
273 udelay(55);
274 HFA384X_OUTB(0x45, SANDISK_WLAN_ACTIVATION_OFF);
275}
276
277
278static int sandisk_enable_wireless(struct net_device *dev)
279{
280 int res, ret = 0;
281 conf_reg_t reg;
282 struct hostap_interface *iface = dev->priv;
283 local_info_t *local = iface->local;
284 tuple_t tuple;
285 cisparse_t *parse = NULL;
286 u_char buf[64];
287 struct hostap_cs_priv *hw_priv = local->hw_priv;
288
289 if (hw_priv->link->io.NumPorts1 < 0x42) {
290 /* Not enough ports to be SanDisk multi-function card */
291 ret = -ENODEV;
292 goto done;
293 }
294
295 parse = kmalloc(sizeof(cisparse_t), GFP_KERNEL);
296 if (parse == NULL) {
297 ret = -ENOMEM;
298 goto done;
299 }
300
301 tuple.DesiredTuple = CISTPL_MANFID;
302 tuple.Attributes = TUPLE_RETURN_COMMON;
303 tuple.TupleData = buf;
304 tuple.TupleDataMax = sizeof(buf);
305 tuple.TupleOffset = 0;
306 if (pcmcia_get_first_tuple(hw_priv->link->handle, &tuple) ||
307 pcmcia_get_tuple_data(hw_priv->link->handle, &tuple) ||
308 pcmcia_parse_tuple(hw_priv->link->handle, &tuple, parse) ||
309 parse->manfid.manf != 0xd601 || parse->manfid.card != 0x0101) {
310 /* No SanDisk manfid found */
311 ret = -ENODEV;
312 goto done;
313 }
314
315 tuple.DesiredTuple = CISTPL_LONGLINK_MFC;
316 if (pcmcia_get_first_tuple(hw_priv->link->handle, &tuple) ||
317 pcmcia_get_tuple_data(hw_priv->link->handle, &tuple) ||
318 pcmcia_parse_tuple(hw_priv->link->handle, &tuple, parse) ||
319 parse->longlink_mfc.nfn < 2) {
320 /* No multi-function links found */
321 ret = -ENODEV;
322 goto done;
323 }
324
325 printk(KERN_DEBUG "%s: Multi-function SanDisk ConnectPlus detected"
326 " - using vendor-specific initialization\n", dev->name);
327 hw_priv->sandisk_connectplus = 1;
328
329 reg.Function = 0;
330 reg.Action = CS_WRITE;
331 reg.Offset = CISREG_COR;
332 reg.Value = COR_SOFT_RESET;
333 res = pcmcia_access_configuration_register(hw_priv->link->handle,
334 &reg);
335 if (res != CS_SUCCESS) {
336 printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",
337 dev->name, res);
338 goto done;
339 }
340 mdelay(5);
341
342 reg.Function = 0;
343 reg.Action = CS_WRITE;
344 reg.Offset = CISREG_COR;
345 /*
346 * Do not enable interrupts here to avoid some bogus events. Interrupts
347 * will be enabled during the first cor_sreset call.
348 */
349 reg.Value = COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE | COR_FUNC_ENA;
350 res = pcmcia_access_configuration_register(hw_priv->link->handle,
351 &reg);
352 if (res != CS_SUCCESS) {
353 printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",
354 dev->name, res);
355 goto done;
356 }
357 mdelay(5);
358
359 sandisk_set_iobase(local);
360
361 HFA384X_OUTB(0xc5, SANDISK_WLAN_ACTIVATION_OFF);
362 udelay(10);
363 HFA384X_OUTB(0x4b, SANDISK_WLAN_ACTIVATION_OFF);
364 udelay(10);
365
366done:
367 kfree(parse);
368 return ret;
369}
370
371
372static void prism2_pccard_cor_sreset(local_info_t *local)
373{
374 int res;
375 conf_reg_t reg;
376 struct hostap_cs_priv *hw_priv = local->hw_priv;
377
378 if (!prism2_pccard_card_present(local))
379 return;
380
381 reg.Function = 0;
382 reg.Action = CS_READ;
383 reg.Offset = CISREG_COR;
384 reg.Value = 0;
385 res = pcmcia_access_configuration_register(hw_priv->link->handle,
386 &reg);
387 if (res != CS_SUCCESS) {
388 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 1 (%d)\n",
389 res);
390 return;
391 }
392 printk(KERN_DEBUG "prism2_pccard_cor_sreset: original COR %02x\n",
393 reg.Value);
394
395 reg.Action = CS_WRITE;
396 reg.Value |= COR_SOFT_RESET;
397 res = pcmcia_access_configuration_register(hw_priv->link->handle,
398 &reg);
399 if (res != CS_SUCCESS) {
400 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 2 (%d)\n",
401 res);
402 return;
403 }
404
405 mdelay(hw_priv->sandisk_connectplus ? 5 : 2);
406
407 reg.Value &= ~COR_SOFT_RESET;
408 if (hw_priv->sandisk_connectplus)
409 reg.Value |= COR_IREQ_ENA;
410 res = pcmcia_access_configuration_register(hw_priv->link->handle,
411 &reg);
412 if (res != CS_SUCCESS) {
413 printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 3 (%d)\n",
414 res);
415 return;
416 }
417
418 mdelay(hw_priv->sandisk_connectplus ? 5 : 2);
419
420 if (hw_priv->sandisk_connectplus)
421 sandisk_set_iobase(local);
422}
423
424
425static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
426{
427 int res;
428 conf_reg_t reg;
429 int old_cor;
430 struct hostap_cs_priv *hw_priv = local->hw_priv;
431
432 if (!prism2_pccard_card_present(local))
433 return;
434
435 if (hw_priv->sandisk_connectplus) {
436 sandisk_write_hcr(local, hcr);
437 return;
438 }
439
440 reg.Function = 0;
441 reg.Action = CS_READ;
442 reg.Offset = CISREG_COR;
443 reg.Value = 0;
444 res = pcmcia_access_configuration_register(hw_priv->link->handle,
445 &reg);
446 if (res != CS_SUCCESS) {
447 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 1 "
448 "(%d)\n", res);
449 return;
450 }
451 printk(KERN_DEBUG "prism2_pccard_genesis_sreset: original COR %02x\n",
452 reg.Value);
453 old_cor = reg.Value;
454
455 reg.Action = CS_WRITE;
456 reg.Value |= COR_SOFT_RESET;
457 res = pcmcia_access_configuration_register(hw_priv->link->handle,
458 &reg);
459 if (res != CS_SUCCESS) {
460 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 2 "
461 "(%d)\n", res);
462 return;
463 }
464
465 mdelay(10);
466
467 /* Setup Genesis mode */
468 reg.Action = CS_WRITE;
469 reg.Value = hcr;
470 reg.Offset = CISREG_CCSR;
471 res = pcmcia_access_configuration_register(hw_priv->link->handle,
472 &reg);
473 if (res != CS_SUCCESS) {
474 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 3 "
475 "(%d)\n", res);
476 return;
477 }
478 mdelay(10);
479
480 reg.Action = CS_WRITE;
481 reg.Offset = CISREG_COR;
482 reg.Value = old_cor & ~COR_SOFT_RESET;
483 res = pcmcia_access_configuration_register(hw_priv->link->handle,
484 &reg);
485 if (res != CS_SUCCESS) {
486 printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 4 "
487 "(%d)\n", res);
488 return;
489 }
490
491 mdelay(10);
492}
493
494
495static int prism2_pccard_dev_open(local_info_t *local)
496{
497 struct hostap_cs_priv *hw_priv = local->hw_priv;
498 hw_priv->link->open++;
499 return 0;
500}
501
502
503static int prism2_pccard_dev_close(local_info_t *local)
504{
505 struct hostap_cs_priv *hw_priv;
506
507 if (local == NULL || local->hw_priv == NULL)
508 return 1;
509 hw_priv = local->hw_priv;
510 if (hw_priv->link == NULL)
511 return 1;
512
513 if (!hw_priv->link->open) {
514 printk(KERN_WARNING "%s: prism2_pccard_dev_close(): "
515 "link not open?!\n", local->dev->name);
516 return 1;
517 }
518
519 hw_priv->link->open--;
520
521 return 0;
522}
523
524
525static struct prism2_helper_functions prism2_pccard_funcs =
526{
527 .card_present = prism2_pccard_card_present,
528 .cor_sreset = prism2_pccard_cor_sreset,
529 .dev_open = prism2_pccard_dev_open,
530 .dev_close = prism2_pccard_dev_close,
531 .genesis_reset = prism2_pccard_genesis_reset,
532 .hw_type = HOSTAP_HW_PCCARD,
533};
534
535
536/* allocate local data and register with CardServices
537 * initialize dev_link structure, but do not configure the card yet */
538static dev_link_t *prism2_attach(void)
539{
540 dev_link_t *link;
541 client_reg_t client_reg;
542 int ret;
543
544 link = kmalloc(sizeof(dev_link_t), GFP_KERNEL);
545 if (link == NULL)
546 return NULL;
547
548 memset(link, 0, sizeof(dev_link_t));
549
550 PDEBUG(DEBUG_HW, "%s: setting Vcc=33 (constant)\n", dev_info);
551 link->conf.Vcc = 33;
552 link->conf.IntType = INT_MEMORY_AND_IO;
553
554 /* register with CardServices */
555 link->next = dev_list;
556 dev_list = link;
557 client_reg.dev_info = &dev_info;
558 client_reg.Version = 0x0210;
559 client_reg.event_callback_args.client_data = link;
560 ret = pcmcia_register_client(&link->handle, &client_reg);
561 if (ret != CS_SUCCESS) {
562 cs_error(link->handle, RegisterClient, ret);
563 prism2_detach(link);
564 return NULL;
565 }
566 return link;
567}
568
569
570static void prism2_detach(dev_link_t *link)
571{
572 dev_link_t **linkp;
573
574 PDEBUG(DEBUG_FLOW, "prism2_detach\n");
575
576 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
577 if (*linkp == link)
578 break;
579 if (*linkp == NULL) {
580 printk(KERN_WARNING "%s: Attempt to detach non-existing "
581 "PCMCIA client\n", dev_info);
582 return;
583 }
584
585 if (link->state & DEV_CONFIG) {
586 prism2_release((u_long)link);
587 }
588
589 if (link->handle) {
590 int res = pcmcia_deregister_client(link->handle);
591 if (res) {
592 printk("CardService(DeregisterClient) => %d\n", res);
593 cs_error(link->handle, DeregisterClient, res);
594 }
595 }
596
597 *linkp = link->next;
598 /* release net devices */
599 if (link->priv) {
600 struct net_device *dev;
601 struct hostap_interface *iface;
602 dev = link->priv;
603 iface = netdev_priv(dev);
604 kfree(iface->local->hw_priv);
605 iface->local->hw_priv = NULL;
606 prism2_free_local_data(dev);
607 }
608 kfree(link);
609}
610
611
612#define CS_CHECK(fn, ret) \
613do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
614
615#define CFG_CHECK2(fn, retf) \
616do { int ret = (retf); \
617if (ret != 0) { \
618 PDEBUG(DEBUG_EXTRA, "CardServices(" #fn ") returned %d\n", ret); \
619 cs_error(link->handle, fn, ret); \
620 goto next_entry; \
621} \
622} while (0)
623
624
625/* run after a CARD_INSERTION event is received to configure the PCMCIA
626 * socket and make the device available to the system */
627static int prism2_config(dev_link_t *link)
628{
629 struct net_device *dev;
630 struct hostap_interface *iface;
631 local_info_t *local;
632 int ret = 1;
633 tuple_t tuple;
634 cisparse_t *parse;
635 int last_fn, last_ret;
636 u_char buf[64];
637 config_info_t conf;
638 cistpl_cftable_entry_t dflt = { 0 };
639 struct hostap_cs_priv *hw_priv;
640
641 PDEBUG(DEBUG_FLOW, "prism2_config()\n");
642
643 parse = kmalloc(sizeof(cisparse_t), GFP_KERNEL);
644 hw_priv = kmalloc(sizeof(*hw_priv), GFP_KERNEL);
645 if (parse == NULL || hw_priv == NULL) {
646 kfree(parse);
647 kfree(hw_priv);
648 ret = -ENOMEM;
649 goto failed;
650 }
651 memset(hw_priv, 0, sizeof(*hw_priv));
652
653 tuple.DesiredTuple = CISTPL_CONFIG;
654 tuple.Attributes = 0;
655 tuple.TupleData = buf;
656 tuple.TupleDataMax = sizeof(buf);
657 tuple.TupleOffset = 0;
658 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link->handle, &tuple));
659 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link->handle, &tuple));
660 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link->handle, &tuple, parse));
661 link->conf.ConfigBase = parse->config.base;
662 link->conf.Present = parse->config.rmask[0];
663
664 CS_CHECK(GetConfigurationInfo,
665 pcmcia_get_configuration_info(link->handle, &conf));
666 PDEBUG(DEBUG_HW, "%s: %s Vcc=%d (from config)\n", dev_info,
667 ignore_cis_vcc ? "ignoring" : "setting", conf.Vcc);
668 link->conf.Vcc = conf.Vcc;
669
670 /* Look for an appropriate configuration table entry in the CIS */
671 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
672 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link->handle, &tuple));
673 for (;;) {
674 cistpl_cftable_entry_t *cfg = &(parse->cftable_entry);
675 CFG_CHECK2(GetTupleData,
676 pcmcia_get_tuple_data(link->handle, &tuple));
677 CFG_CHECK2(ParseTuple,
678 pcmcia_parse_tuple(link->handle, &tuple, parse));
679
680 if (cfg->flags & CISTPL_CFTABLE_DEFAULT)
681 dflt = *cfg;
682 if (cfg->index == 0)
683 goto next_entry;
684 link->conf.ConfigIndex = cfg->index;
685 PDEBUG(DEBUG_EXTRA, "Checking CFTABLE_ENTRY 0x%02X "
686 "(default 0x%02X)\n", cfg->index, dflt.index);
687
688 /* Does this card need audio output? */
689 if (cfg->flags & CISTPL_CFTABLE_AUDIO) {
690 link->conf.Attributes |= CONF_ENABLE_SPKR;
691 link->conf.Status = CCSR_AUDIO_ENA;
692 }
693
694 /* Use power settings for Vcc and Vpp if present */
695 /* Note that the CIS values need to be rescaled */
696 if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) {
697 if (conf.Vcc != cfg->vcc.param[CISTPL_POWER_VNOM] /
698 10000 && !ignore_cis_vcc) {
699 PDEBUG(DEBUG_EXTRA, " Vcc mismatch - skipping"
700 " this entry\n");
701 goto next_entry;
702 }
703 } else if (dflt.vcc.present & (1 << CISTPL_POWER_VNOM)) {
704 if (conf.Vcc != dflt.vcc.param[CISTPL_POWER_VNOM] /
705 10000 && !ignore_cis_vcc) {
706 PDEBUG(DEBUG_EXTRA, " Vcc (default) mismatch "
707 "- skipping this entry\n");
708 goto next_entry;
709 }
710 }
711
712 if (cfg->vpp1.present & (1 << CISTPL_POWER_VNOM))
713 link->conf.Vpp1 = link->conf.Vpp2 =
714 cfg->vpp1.param[CISTPL_POWER_VNOM] / 10000;
715 else if (dflt.vpp1.present & (1 << CISTPL_POWER_VNOM))
716 link->conf.Vpp1 = link->conf.Vpp2 =
717 dflt.vpp1.param[CISTPL_POWER_VNOM] / 10000;
718
719 /* Do we need to allocate an interrupt? */
720 if (cfg->irq.IRQInfo1 || dflt.irq.IRQInfo1)
721 link->conf.Attributes |= CONF_ENABLE_IRQ;
722 else if (!(link->conf.Attributes & CONF_ENABLE_IRQ)) {
723 /* At least Compaq WL200 does not have IRQInfo1 set,
724 * but it does not work without interrupts.. */
725 printk("Config has no IRQ info, but trying to enable "
726 "IRQ anyway..\n");
727 link->conf.Attributes |= CONF_ENABLE_IRQ;
728 }
729
730 /* IO window settings */
731 PDEBUG(DEBUG_EXTRA, "IO window settings: cfg->io.nwin=%d "
732 "dflt.io.nwin=%d\n",
733 cfg->io.nwin, dflt.io.nwin);
734 link->io.NumPorts1 = link->io.NumPorts2 = 0;
735 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
736 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
737 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
738 PDEBUG(DEBUG_EXTRA, "io->flags = 0x%04X, "
739 "io.base=0x%04x, len=%d\n", io->flags,
740 io->win[0].base, io->win[0].len);
741 if (!(io->flags & CISTPL_IO_8BIT))
742 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
743 if (!(io->flags & CISTPL_IO_16BIT))
744 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
745 link->io.IOAddrLines = io->flags &
746 CISTPL_IO_LINES_MASK;
747 link->io.BasePort1 = io->win[0].base;
748 link->io.NumPorts1 = io->win[0].len;
749 if (io->nwin > 1) {
750 link->io.Attributes2 = link->io.Attributes1;
751 link->io.BasePort2 = io->win[1].base;
752 link->io.NumPorts2 = io->win[1].len;
753 }
754 }
755
756 /* This reserves IO space but doesn't actually enable it */
757 CFG_CHECK2(RequestIO,
758 pcmcia_request_io(link->handle, &link->io));
759
760 /* This configuration table entry is OK */
761 break;
762
763 next_entry:
764 CS_CHECK(GetNextTuple,
765 pcmcia_get_next_tuple(link->handle, &tuple));
766 }
767
768 /* Need to allocate net_device before requesting IRQ handler */
769 dev = prism2_init_local_data(&prism2_pccard_funcs, 0,
770 &handle_to_dev(link->handle));
771 if (dev == NULL)
772 goto failed;
773 link->priv = dev;
774
775 iface = netdev_priv(dev);
776 local = iface->local;
777 local->hw_priv = hw_priv;
778 hw_priv->link = link;
779 strcpy(hw_priv->node.dev_name, dev->name);
780 link->dev = &hw_priv->node;
781
782 /*
783 * Allocate an interrupt line. Note that this does not assign a
784 * handler to the interrupt, unless the 'Handler' member of the
785 * irq structure is initialized.
786 */
787 if (link->conf.Attributes & CONF_ENABLE_IRQ) {
788 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
789 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
790 link->irq.Handler = prism2_interrupt;
791 link->irq.Instance = dev;
792 CS_CHECK(RequestIRQ,
793 pcmcia_request_irq(link->handle, &link->irq));
794 }
795
796 /*
797 * This actually configures the PCMCIA socket -- setting up
798 * the I/O windows and the interrupt mapping, and putting the
799 * card and host interface into "Memory and IO" mode.
800 */
801 CS_CHECK(RequestConfiguration,
802 pcmcia_request_configuration(link->handle, &link->conf));
803
804 dev->irq = link->irq.AssignedIRQ;
805 dev->base_addr = link->io.BasePort1;
806
807 /* Finally, report what we've done */
808 printk(KERN_INFO "%s: index 0x%02x: Vcc %d.%d",
809 dev_info, link->conf.ConfigIndex,
810 link->conf.Vcc / 10, link->conf.Vcc % 10);
811 if (link->conf.Vpp1)
812 printk(", Vpp %d.%d", link->conf.Vpp1 / 10,
813 link->conf.Vpp1 % 10);
814 if (link->conf.Attributes & CONF_ENABLE_IRQ)
815 printk(", irq %d", link->irq.AssignedIRQ);
816 if (link->io.NumPorts1)
817 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
818 link->io.BasePort1+link->io.NumPorts1-1);
819 if (link->io.NumPorts2)
820 printk(" & 0x%04x-0x%04x", link->io.BasePort2,
821 link->io.BasePort2+link->io.NumPorts2-1);
822 printk("\n");
823
824 link->state |= DEV_CONFIG;
825 link->state &= ~DEV_CONFIG_PENDING;
826
827 local->shutdown = 0;
828
829 sandisk_enable_wireless(dev);
830
831 ret = prism2_hw_config(dev, 1);
832 if (!ret) {
833 ret = hostap_hw_ready(dev);
834 if (ret == 0 && local->ddev)
835 strcpy(hw_priv->node.dev_name, local->ddev->name);
836 }
837 kfree(parse);
838 return ret;
839
840 cs_failed:
841 cs_error(link->handle, last_fn, last_ret);
842
843 failed:
844 kfree(parse);
845 kfree(hw_priv);
846 prism2_release((u_long)link);
847 return ret;
848}
849
850
851static void prism2_release(u_long arg)
852{
853 dev_link_t *link = (dev_link_t *)arg;
854
855 PDEBUG(DEBUG_FLOW, "prism2_release\n");
856
857 if (link->priv) {
858 struct net_device *dev = link->priv;
859 struct hostap_interface *iface;
860
861 iface = netdev_priv(dev);
862 if (link->state & DEV_CONFIG)
863 prism2_hw_shutdown(dev, 0);
864 iface->local->shutdown = 1;
865 }
866
867 if (link->win)
868 pcmcia_release_window(link->win);
869 pcmcia_release_configuration(link->handle);
870 if (link->io.NumPorts1)
871 pcmcia_release_io(link->handle, &link->io);
872 if (link->irq.AssignedIRQ)
873 pcmcia_release_irq(link->handle, &link->irq);
874
875 link->state &= ~DEV_CONFIG;
876
877 PDEBUG(DEBUG_FLOW, "release - done\n");
878}
879
880
881static int prism2_event(event_t event, int priority,
882 event_callback_args_t *args)
883{
884 dev_link_t *link = args->client_data;
885 struct net_device *dev = (struct net_device *) link->priv;
886
887 switch (event) {
888 case CS_EVENT_CARD_INSERTION:
889 PDEBUG(DEBUG_EXTRA, "%s: CS_EVENT_CARD_INSERTION\n", dev_info);
890 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
891 if (prism2_config(link)) {
892 PDEBUG(DEBUG_EXTRA, "prism2_config() failed\n");
893 }
894 break;
895
896 case CS_EVENT_CARD_REMOVAL:
897 PDEBUG(DEBUG_EXTRA, "%s: CS_EVENT_CARD_REMOVAL\n", dev_info);
898 link->state &= ~DEV_PRESENT;
899 if (link->state & DEV_CONFIG) {
900 netif_stop_queue(dev);
901 netif_device_detach(dev);
902 prism2_release((u_long) link);
903 }
904 break;
905
906 case CS_EVENT_PM_SUSPEND:
907 PDEBUG(DEBUG_EXTRA, "%s: CS_EVENT_PM_SUSPEND\n", dev_info);
908 link->state |= DEV_SUSPEND;
909 /* fall through */
910
911 case CS_EVENT_RESET_PHYSICAL:
912 PDEBUG(DEBUG_EXTRA, "%s: CS_EVENT_RESET_PHYSICAL\n", dev_info);
913 if (link->state & DEV_CONFIG) {
914 if (link->open) {
915 netif_stop_queue(dev);
916 netif_device_detach(dev);
917 }
918 prism2_suspend(dev);
919 pcmcia_release_configuration(link->handle);
920 }
921 break;
922
923 case CS_EVENT_PM_RESUME:
924 PDEBUG(DEBUG_EXTRA, "%s: CS_EVENT_PM_RESUME\n", dev_info);
925 link->state &= ~DEV_SUSPEND;
926 /* fall through */
927
928 case CS_EVENT_CARD_RESET:
929 PDEBUG(DEBUG_EXTRA, "%s: CS_EVENT_CARD_RESET\n", dev_info);
930 if (link->state & DEV_CONFIG) {
931 pcmcia_request_configuration(link->handle,
932 &link->conf);
933 prism2_hw_shutdown(dev, 1);
934 prism2_hw_config(dev, link->open ? 0 : 1);
935 if (link->open) {
936 netif_device_attach(dev);
937 netif_start_queue(dev);
938 }
939 }
940 break;
941
942 default:
943 PDEBUG(DEBUG_EXTRA, "%s: prism2_event() - unknown event %d\n",
944 dev_info, event);
945 break;
946 }
947 return 0;
948}
949
950
951static struct pcmcia_device_id hostap_cs_ids[] = {
952 PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7100),
953 PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7300),
954 PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0777),
955 PCMCIA_DEVICE_MANF_CARD(0x0126, 0x8000),
956 PCMCIA_DEVICE_MANF_CARD(0x0138, 0x0002),
957 PCMCIA_DEVICE_MANF_CARD(0x0156, 0x0002),
958 PCMCIA_DEVICE_MANF_CARD(0x0250, 0x0002),
959 PCMCIA_DEVICE_MANF_CARD(0x026f, 0x030b),
960 PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1612),
961 PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1613),
962 PCMCIA_DEVICE_MANF_CARD(0x028a, 0x0002),
963 PCMCIA_DEVICE_MANF_CARD(0x02aa, 0x0002),
964 PCMCIA_DEVICE_MANF_CARD(0x02d2, 0x0001),
965 PCMCIA_DEVICE_MANF_CARD(0x50c2, 0x0001),
966 PCMCIA_DEVICE_MANF_CARD(0x50c2, 0x7300),
967 PCMCIA_DEVICE_MANF_CARD(0xc00f, 0x0000),
968 PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0002),
969 PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0005),
970 PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0010),
971 PCMCIA_MFC_DEVICE_PROD_ID12(0, "SanDisk", "ConnectPlus",
972 0x7a954bd9, 0x74be00c6),
973 PCMCIA_DEVICE_PROD_ID1234(
974 "Intersil", "PRISM 2_5 PCMCIA ADAPTER", "ISL37300P",
975 "Eval-RevA",
976 0x4b801a17, 0x6345a0bf, 0xc9049a39, 0xc23adc0e),
977 PCMCIA_DEVICE_PROD_ID123(
978 "Addtron", "AWP-100 Wireless PCMCIA", "Version 01.02",
979 0xe6ec52ce, 0x08649af2, 0x4b74baa0),
980 PCMCIA_DEVICE_PROD_ID123(
981 "D", "Link DWL-650 11Mbps WLAN Card", "Version 01.02",
982 0x71b18589, 0xb6f1b0ab, 0x4b74baa0),
983 PCMCIA_DEVICE_PROD_ID123(
984 "Instant Wireless ", " Network PC CARD", "Version 01.02",
985 0x11d901af, 0x6e9bd926, 0x4b74baa0),
986 PCMCIA_DEVICE_PROD_ID123(
987 "SMC", "SMC2632W", "Version 01.02",
988 0xc4f8b18b, 0x474a1f2a, 0x4b74baa0),
989 PCMCIA_DEVICE_PROD_ID12("BUFFALO", "WLI-CF-S11G",
990 0x2decece3, 0x82067c18),
991 PCMCIA_DEVICE_PROD_ID12("Compaq", "WL200_11Mbps_Wireless_PCI_Card",
992 0x54f7c49c, 0x15a75e5b),
993 PCMCIA_DEVICE_PROD_ID12("INTERSIL", "HFA384x/IEEE",
994 0x74c5e40d, 0xdb472a18),
995 PCMCIA_DEVICE_PROD_ID12("Linksys", "Wireless CompactFlash Card",
996 0x0733cc81, 0x0c52f395),
997 PCMCIA_DEVICE_PROD_ID12(
998 "ZoomAir 11Mbps High", "Rate wireless Networking",
999 0x273fe3db, 0x32a1eaee),
1000 PCMCIA_DEVICE_NULL
1001};
1002MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids);
1003
1004
1005static struct pcmcia_driver hostap_driver = {
1006 .drv = {
1007 .name = "hostap_cs",
1008 },
1009 .attach = prism2_attach,
1010 .detach = prism2_detach,
1011 .owner = THIS_MODULE,
1012 .event = prism2_event,
1013 .id_table = hostap_cs_ids,
1014};
1015
1016static int __init init_prism2_pccard(void)
1017{
1018 printk(KERN_INFO "%s: %s\n", dev_info, version);
1019 return pcmcia_register_driver(&hostap_driver);
1020}
1021
1022static void __exit exit_prism2_pccard(void)
1023{
1024 pcmcia_unregister_driver(&hostap_driver);
1025 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
1026}
1027
1028
1029module_init(init_prism2_pccard);
1030module_exit(exit_prism2_pccard);
diff --git a/drivers/net/wireless/hostap/hostap_download.c b/drivers/net/wireless/hostap/hostap_download.c
new file mode 100644
index 000000000000..ab26b52b3e76
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_download.c
@@ -0,0 +1,766 @@
1static int prism2_enable_aux_port(struct net_device *dev, int enable)
2{
3 u16 val, reg;
4 int i, tries;
5 unsigned long flags;
6 struct hostap_interface *iface;
7 local_info_t *local;
8
9 iface = netdev_priv(dev);
10 local = iface->local;
11
12 if (local->no_pri) {
13 if (enable) {
14 PDEBUG(DEBUG_EXTRA2, "%s: no PRI f/w - assuming Aux "
15 "port is already enabled\n", dev->name);
16 }
17 return 0;
18 }
19
20 spin_lock_irqsave(&local->cmdlock, flags);
21
22 /* wait until busy bit is clear */
23 tries = HFA384X_CMD_BUSY_TIMEOUT;
24 while (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY && tries > 0) {
25 tries--;
26 udelay(1);
27 }
28 if (tries == 0) {
29 reg = HFA384X_INW(HFA384X_CMD_OFF);
30 spin_unlock_irqrestore(&local->cmdlock, flags);
31 printk("%s: prism2_enable_aux_port - timeout - reg=0x%04x\n",
32 dev->name, reg);
33 return -ETIMEDOUT;
34 }
35
36 val = HFA384X_INW(HFA384X_CONTROL_OFF);
37
38 if (enable) {
39 HFA384X_OUTW(HFA384X_AUX_MAGIC0, HFA384X_PARAM0_OFF);
40 HFA384X_OUTW(HFA384X_AUX_MAGIC1, HFA384X_PARAM1_OFF);
41 HFA384X_OUTW(HFA384X_AUX_MAGIC2, HFA384X_PARAM2_OFF);
42
43 if ((val & HFA384X_AUX_PORT_MASK) != HFA384X_AUX_PORT_DISABLED)
44 printk("prism2_enable_aux_port: was not disabled!?\n");
45 val &= ~HFA384X_AUX_PORT_MASK;
46 val |= HFA384X_AUX_PORT_ENABLE;
47 } else {
48 HFA384X_OUTW(0, HFA384X_PARAM0_OFF);
49 HFA384X_OUTW(0, HFA384X_PARAM1_OFF);
50 HFA384X_OUTW(0, HFA384X_PARAM2_OFF);
51
52 if ((val & HFA384X_AUX_PORT_MASK) != HFA384X_AUX_PORT_ENABLED)
53 printk("prism2_enable_aux_port: was not enabled!?\n");
54 val &= ~HFA384X_AUX_PORT_MASK;
55 val |= HFA384X_AUX_PORT_DISABLE;
56 }
57 HFA384X_OUTW(val, HFA384X_CONTROL_OFF);
58
59 udelay(5);
60
61 i = 10000;
62 while (i > 0) {
63 val = HFA384X_INW(HFA384X_CONTROL_OFF);
64 val &= HFA384X_AUX_PORT_MASK;
65
66 if ((enable && val == HFA384X_AUX_PORT_ENABLED) ||
67 (!enable && val == HFA384X_AUX_PORT_DISABLED))
68 break;
69
70 udelay(10);
71 i--;
72 }
73
74 spin_unlock_irqrestore(&local->cmdlock, flags);
75
76 if (i == 0) {
77 printk("prism2_enable_aux_port(%d) timed out\n",
78 enable);
79 return -ETIMEDOUT;
80 }
81
82 return 0;
83}
84
85
86static int hfa384x_from_aux(struct net_device *dev, unsigned int addr, int len,
87 void *buf)
88{
89 u16 page, offset;
90 if (addr & 1 || len & 1)
91 return -1;
92
93 page = addr >> 7;
94 offset = addr & 0x7f;
95
96 HFA384X_OUTW(page, HFA384X_AUXPAGE_OFF);
97 HFA384X_OUTW(offset, HFA384X_AUXOFFSET_OFF);
98
99 udelay(5);
100
101#ifdef PRISM2_PCI
102 {
103 u16 *pos = (u16 *) buf;
104 while (len > 0) {
105 *pos++ = HFA384X_INW_DATA(HFA384X_AUXDATA_OFF);
106 len -= 2;
107 }
108 }
109#else /* PRISM2_PCI */
110 HFA384X_INSW(HFA384X_AUXDATA_OFF, buf, len / 2);
111#endif /* PRISM2_PCI */
112
113 return 0;
114}
115
116
117static int hfa384x_to_aux(struct net_device *dev, unsigned int addr, int len,
118 void *buf)
119{
120 u16 page, offset;
121 if (addr & 1 || len & 1)
122 return -1;
123
124 page = addr >> 7;
125 offset = addr & 0x7f;
126
127 HFA384X_OUTW(page, HFA384X_AUXPAGE_OFF);
128 HFA384X_OUTW(offset, HFA384X_AUXOFFSET_OFF);
129
130 udelay(5);
131
132#ifdef PRISM2_PCI
133 {
134 u16 *pos = (u16 *) buf;
135 while (len > 0) {
136 HFA384X_OUTW_DATA(*pos++, HFA384X_AUXDATA_OFF);
137 len -= 2;
138 }
139 }
140#else /* PRISM2_PCI */
141 HFA384X_OUTSW(HFA384X_AUXDATA_OFF, buf, len / 2);
142#endif /* PRISM2_PCI */
143
144 return 0;
145}
146
147
148static int prism2_pda_ok(u8 *buf)
149{
150 u16 *pda = (u16 *) buf;
151 int pos;
152 u16 len, pdr;
153
154 if (buf[0] == 0xff && buf[1] == 0x00 && buf[2] == 0xff &&
155 buf[3] == 0x00)
156 return 0;
157
158 pos = 0;
159 while (pos + 1 < PRISM2_PDA_SIZE / 2) {
160 len = le16_to_cpu(pda[pos]);
161 pdr = le16_to_cpu(pda[pos + 1]);
162 if (len == 0 || pos + len > PRISM2_PDA_SIZE / 2)
163 return 0;
164
165 if (pdr == 0x0000 && len == 2) {
166 /* PDA end found */
167 return 1;
168 }
169
170 pos += len + 1;
171 }
172
173 return 0;
174}
175
176
177static int prism2_download_aux_dump(struct net_device *dev,
178 unsigned int addr, int len, u8 *buf)
179{
180 int res;
181
182 prism2_enable_aux_port(dev, 1);
183 res = hfa384x_from_aux(dev, addr, len, buf);
184 prism2_enable_aux_port(dev, 0);
185 if (res)
186 return -1;
187
188 return 0;
189}
190
191
192static u8 * prism2_read_pda(struct net_device *dev)
193{
194 u8 *buf;
195 int res, i, found = 0;
196#define NUM_PDA_ADDRS 4
197 unsigned int pda_addr[NUM_PDA_ADDRS] = {
198 0x7f0000 /* others than HFA3841 */,
199 0x3f0000 /* HFA3841 */,
200 0x390000 /* apparently used in older cards */,
201 0x7f0002 /* Intel PRO/Wireless 2011B (PCI) */,
202 };
203
204 buf = (u8 *) kmalloc(PRISM2_PDA_SIZE, GFP_KERNEL);
205 if (buf == NULL)
206 return NULL;
207
208 /* Note: wlan card should be in initial state (just after init cmd)
209 * and no other operations should be performed concurrently. */
210
211 prism2_enable_aux_port(dev, 1);
212
213 for (i = 0; i < NUM_PDA_ADDRS; i++) {
214 PDEBUG(DEBUG_EXTRA2, "%s: trying to read PDA from 0x%08x",
215 dev->name, pda_addr[i]);
216 res = hfa384x_from_aux(dev, pda_addr[i], PRISM2_PDA_SIZE, buf);
217 if (res)
218 continue;
219 if (res == 0 && prism2_pda_ok(buf)) {
220 PDEBUG2(DEBUG_EXTRA2, ": OK\n");
221 found = 1;
222 break;
223 } else {
224 PDEBUG2(DEBUG_EXTRA2, ": failed\n");
225 }
226 }
227
228 prism2_enable_aux_port(dev, 0);
229
230 if (!found) {
231 printk(KERN_DEBUG "%s: valid PDA not found\n", dev->name);
232 kfree(buf);
233 buf = NULL;
234 }
235
236 return buf;
237}
238
239
240static int prism2_download_volatile(local_info_t *local,
241 struct prism2_download_data *param)
242{
243 struct net_device *dev = local->dev;
244 int ret = 0, i;
245 u16 param0, param1;
246
247 if (local->hw_downloading) {
248 printk(KERN_WARNING "%s: Already downloading - aborting new "
249 "request\n", dev->name);
250 return -1;
251 }
252
253 local->hw_downloading = 1;
254 if (local->pri_only) {
255 hfa384x_disable_interrupts(dev);
256 } else {
257 prism2_hw_shutdown(dev, 0);
258
259 if (prism2_hw_init(dev, 0)) {
260 printk(KERN_WARNING "%s: Could not initialize card for"
261 " download\n", dev->name);
262 ret = -1;
263 goto out;
264 }
265 }
266
267 if (prism2_enable_aux_port(dev, 1)) {
268 printk(KERN_WARNING "%s: Could not enable AUX port\n",
269 dev->name);
270 ret = -1;
271 goto out;
272 }
273
274 param0 = param->start_addr & 0xffff;
275 param1 = param->start_addr >> 16;
276
277 HFA384X_OUTW(0, HFA384X_PARAM2_OFF);
278 HFA384X_OUTW(param1, HFA384X_PARAM1_OFF);
279 if (hfa384x_cmd_wait(dev, HFA384X_CMDCODE_DOWNLOAD |
280 (HFA384X_PROGMODE_ENABLE_VOLATILE << 8),
281 param0)) {
282 printk(KERN_WARNING "%s: Download command execution failed\n",
283 dev->name);
284 ret = -1;
285 goto out;
286 }
287
288 for (i = 0; i < param->num_areas; i++) {
289 PDEBUG(DEBUG_EXTRA2, "%s: Writing %d bytes at 0x%08x\n",
290 dev->name, param->data[i].len, param->data[i].addr);
291 if (hfa384x_to_aux(dev, param->data[i].addr,
292 param->data[i].len, param->data[i].data)) {
293 printk(KERN_WARNING "%s: RAM download at 0x%08x "
294 "(len=%d) failed\n", dev->name,
295 param->data[i].addr, param->data[i].len);
296 ret = -1;
297 goto out;
298 }
299 }
300
301 HFA384X_OUTW(param1, HFA384X_PARAM1_OFF);
302 HFA384X_OUTW(0, HFA384X_PARAM2_OFF);
303 if (hfa384x_cmd_no_wait(dev, HFA384X_CMDCODE_DOWNLOAD |
304 (HFA384X_PROGMODE_DISABLE << 8), param0)) {
305 printk(KERN_WARNING "%s: Download command execution failed\n",
306 dev->name);
307 ret = -1;
308 goto out;
309 }
310 /* ProgMode disable causes the hardware to restart itself from the
311 * given starting address. Give hw some time and ACK command just in
312 * case restart did not happen. */
313 mdelay(5);
314 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_EVACK_OFF);
315
316 if (prism2_enable_aux_port(dev, 0)) {
317 printk(KERN_DEBUG "%s: Disabling AUX port failed\n",
318 dev->name);
319 /* continue anyway.. restart should have taken care of this */
320 }
321
322 mdelay(5);
323 local->hw_downloading = 0;
324 if (prism2_hw_config(dev, 2)) {
325 printk(KERN_WARNING "%s: Card configuration after RAM "
326 "download failed\n", dev->name);
327 ret = -1;
328 goto out;
329 }
330
331 out:
332 local->hw_downloading = 0;
333 return ret;
334}
335
336
337static int prism2_enable_genesis(local_info_t *local, int hcr)
338{
339 struct net_device *dev = local->dev;
340 u8 initseq[4] = { 0x00, 0xe1, 0xa1, 0xff };
341 u8 readbuf[4];
342
343 printk(KERN_DEBUG "%s: test Genesis mode with HCR 0x%02x\n",
344 dev->name, hcr);
345 local->func->cor_sreset(local);
346 hfa384x_to_aux(dev, 0x7e0038, sizeof(initseq), initseq);
347 local->func->genesis_reset(local, hcr);
348
349 /* Readback test */
350 hfa384x_from_aux(dev, 0x7e0038, sizeof(readbuf), readbuf);
351 hfa384x_to_aux(dev, 0x7e0038, sizeof(initseq), initseq);
352 hfa384x_from_aux(dev, 0x7e0038, sizeof(readbuf), readbuf);
353
354 if (memcmp(initseq, readbuf, sizeof(initseq)) == 0) {
355 printk(KERN_DEBUG "Readback test succeeded, HCR 0x%02x\n",
356 hcr);
357 return 0;
358 } else {
359 printk(KERN_DEBUG "Readback test failed, HCR 0x%02x "
360 "write %02x %02x %02x %02x read %02x %02x %02x %02x\n",
361 hcr, initseq[0], initseq[1], initseq[2], initseq[3],
362 readbuf[0], readbuf[1], readbuf[2], readbuf[3]);
363 return 1;
364 }
365}
366
367
368static int prism2_get_ram_size(local_info_t *local)
369{
370 int ret;
371
372 /* Try to enable genesis mode; 0x1F for x8 SRAM or 0x0F for x16 SRAM */
373 if (prism2_enable_genesis(local, 0x1f) == 0)
374 ret = 8;
375 else if (prism2_enable_genesis(local, 0x0f) == 0)
376 ret = 16;
377 else
378 ret = -1;
379
380 /* Disable genesis mode */
381 local->func->genesis_reset(local, ret == 16 ? 0x07 : 0x17);
382
383 return ret;
384}
385
386
387static int prism2_download_genesis(local_info_t *local,
388 struct prism2_download_data *param)
389{
390 struct net_device *dev = local->dev;
391 int ram16 = 0, i;
392 int ret = 0;
393
394 if (local->hw_downloading) {
395 printk(KERN_WARNING "%s: Already downloading - aborting new "
396 "request\n", dev->name);
397 return -EBUSY;
398 }
399
400 if (!local->func->genesis_reset || !local->func->cor_sreset) {
401 printk(KERN_INFO "%s: Genesis mode downloading not supported "
402 "with this hwmodel\n", dev->name);
403 return -EOPNOTSUPP;
404 }
405
406 local->hw_downloading = 1;
407
408 if (prism2_enable_aux_port(dev, 1)) {
409 printk(KERN_DEBUG "%s: failed to enable AUX port\n",
410 dev->name);
411 ret = -EIO;
412 goto out;
413 }
414
415 if (local->sram_type == -1) {
416 /* 0x1F for x8 SRAM or 0x0F for x16 SRAM */
417 if (prism2_enable_genesis(local, 0x1f) == 0) {
418 ram16 = 0;
419 PDEBUG(DEBUG_EXTRA2, "%s: Genesis mode OK using x8 "
420 "SRAM\n", dev->name);
421 } else if (prism2_enable_genesis(local, 0x0f) == 0) {
422 ram16 = 1;
423 PDEBUG(DEBUG_EXTRA2, "%s: Genesis mode OK using x16 "
424 "SRAM\n", dev->name);
425 } else {
426 printk(KERN_DEBUG "%s: Could not initiate genesis "
427 "mode\n", dev->name);
428 ret = -EIO;
429 goto out;
430 }
431 } else {
432 if (prism2_enable_genesis(local, local->sram_type == 8 ?
433 0x1f : 0x0f)) {
434 printk(KERN_DEBUG "%s: Failed to set Genesis "
435 "mode (sram_type=%d)\n", dev->name,
436 local->sram_type);
437 ret = -EIO;
438 goto out;
439 }
440 ram16 = local->sram_type != 8;
441 }
442
443 for (i = 0; i < param->num_areas; i++) {
444 PDEBUG(DEBUG_EXTRA2, "%s: Writing %d bytes at 0x%08x\n",
445 dev->name, param->data[i].len, param->data[i].addr);
446 if (hfa384x_to_aux(dev, param->data[i].addr,
447 param->data[i].len, param->data[i].data)) {
448 printk(KERN_WARNING "%s: RAM download at 0x%08x "
449 "(len=%d) failed\n", dev->name,
450 param->data[i].addr, param->data[i].len);
451 ret = -EIO;
452 goto out;
453 }
454 }
455
456 PDEBUG(DEBUG_EXTRA2, "Disable genesis mode\n");
457 local->func->genesis_reset(local, ram16 ? 0x07 : 0x17);
458 if (prism2_enable_aux_port(dev, 0)) {
459 printk(KERN_DEBUG "%s: Failed to disable AUX port\n",
460 dev->name);
461 }
462
463 mdelay(5);
464 local->hw_downloading = 0;
465
466 PDEBUG(DEBUG_EXTRA2, "Trying to initialize card\n");
467 /*
468 * Make sure the INIT command does not generate a command completion
469 * event by disabling interrupts.
470 */
471 hfa384x_disable_interrupts(dev);
472 if (prism2_hw_init(dev, 1)) {
473 printk(KERN_DEBUG "%s: Initialization after genesis mode "
474 "download failed\n", dev->name);
475 ret = -EIO;
476 goto out;
477 }
478
479 PDEBUG(DEBUG_EXTRA2, "Card initialized - running PRI only\n");
480 if (prism2_hw_init2(dev, 1)) {
481 printk(KERN_DEBUG "%s: Initialization(2) after genesis mode "
482 "download failed\n", dev->name);
483 ret = -EIO;
484 goto out;
485 }
486
487 out:
488 local->hw_downloading = 0;
489 return ret;
490}
491
492
493#ifdef PRISM2_NON_VOLATILE_DOWNLOAD
494/* Note! Non-volatile downloading functionality has not yet been tested
495 * thoroughly and it may corrupt flash image and effectively kill the card that
496 * is being updated. You have been warned. */
497
498static inline int prism2_download_block(struct net_device *dev,
499 u32 addr, u8 *data,
500 u32 bufaddr, int rest_len)
501{
502 u16 param0, param1;
503 int block_len;
504
505 block_len = rest_len < 4096 ? rest_len : 4096;
506
507 param0 = addr & 0xffff;
508 param1 = addr >> 16;
509
510 HFA384X_OUTW(block_len, HFA384X_PARAM2_OFF);
511 HFA384X_OUTW(param1, HFA384X_PARAM1_OFF);
512
513 if (hfa384x_cmd_wait(dev, HFA384X_CMDCODE_DOWNLOAD |
514 (HFA384X_PROGMODE_ENABLE_NON_VOLATILE << 8),
515 param0)) {
516 printk(KERN_WARNING "%s: Flash download command execution "
517 "failed\n", dev->name);
518 return -1;
519 }
520
521 if (hfa384x_to_aux(dev, bufaddr, block_len, data)) {
522 printk(KERN_WARNING "%s: flash download at 0x%08x "
523 "(len=%d) failed\n", dev->name, addr, block_len);
524 return -1;
525 }
526
527 HFA384X_OUTW(0, HFA384X_PARAM2_OFF);
528 HFA384X_OUTW(0, HFA384X_PARAM1_OFF);
529 if (hfa384x_cmd_wait(dev, HFA384X_CMDCODE_DOWNLOAD |
530 (HFA384X_PROGMODE_PROGRAM_NON_VOLATILE << 8),
531 0)) {
532 printk(KERN_WARNING "%s: Flash write command execution "
533 "failed\n", dev->name);
534 return -1;
535 }
536
537 return block_len;
538}
539
540
541static int prism2_download_nonvolatile(local_info_t *local,
542 struct prism2_download_data *dl)
543{
544 struct net_device *dev = local->dev;
545 int ret = 0, i;
546 struct {
547 u16 page;
548 u16 offset;
549 u16 len;
550 } dlbuffer;
551 u32 bufaddr;
552
553 if (local->hw_downloading) {
554 printk(KERN_WARNING "%s: Already downloading - aborting new "
555 "request\n", dev->name);
556 return -1;
557 }
558
559 ret = local->func->get_rid(dev, HFA384X_RID_DOWNLOADBUFFER,
560 &dlbuffer, 6, 0);
561
562 if (ret < 0) {
563 printk(KERN_WARNING "%s: Could not read download buffer "
564 "parameters\n", dev->name);
565 goto out;
566 }
567
568 dlbuffer.page = le16_to_cpu(dlbuffer.page);
569 dlbuffer.offset = le16_to_cpu(dlbuffer.offset);
570 dlbuffer.len = le16_to_cpu(dlbuffer.len);
571
572 printk(KERN_DEBUG "Download buffer: %d bytes at 0x%04x:0x%04x\n",
573 dlbuffer.len, dlbuffer.page, dlbuffer.offset);
574
575 bufaddr = (dlbuffer.page << 7) + dlbuffer.offset;
576
577 local->hw_downloading = 1;
578
579 if (!local->pri_only) {
580 prism2_hw_shutdown(dev, 0);
581
582 if (prism2_hw_init(dev, 0)) {
583 printk(KERN_WARNING "%s: Could not initialize card for"
584 " download\n", dev->name);
585 ret = -1;
586 goto out;
587 }
588 }
589
590 hfa384x_disable_interrupts(dev);
591
592 if (prism2_enable_aux_port(dev, 1)) {
593 printk(KERN_WARNING "%s: Could not enable AUX port\n",
594 dev->name);
595 ret = -1;
596 goto out;
597 }
598
599 printk(KERN_DEBUG "%s: starting flash download\n", dev->name);
600 for (i = 0; i < dl->num_areas; i++) {
601 int rest_len = dl->data[i].len;
602 int data_off = 0;
603
604 while (rest_len > 0) {
605 int block_len;
606
607 block_len = prism2_download_block(
608 dev, dl->data[i].addr + data_off,
609 dl->data[i].data + data_off, bufaddr,
610 rest_len);
611
612 if (block_len < 0) {
613 ret = -1;
614 goto out;
615 }
616
617 rest_len -= block_len;
618 data_off += block_len;
619 }
620 }
621
622 HFA384X_OUTW(0, HFA384X_PARAM1_OFF);
623 HFA384X_OUTW(0, HFA384X_PARAM2_OFF);
624 if (hfa384x_cmd_wait(dev, HFA384X_CMDCODE_DOWNLOAD |
625 (HFA384X_PROGMODE_DISABLE << 8), 0)) {
626 printk(KERN_WARNING "%s: Download command execution failed\n",
627 dev->name);
628 ret = -1;
629 goto out;
630 }
631
632 if (prism2_enable_aux_port(dev, 0)) {
633 printk(KERN_DEBUG "%s: Disabling AUX port failed\n",
634 dev->name);
635 /* continue anyway.. restart should have taken care of this */
636 }
637
638 mdelay(5);
639
640 local->func->hw_reset(dev);
641 local->hw_downloading = 0;
642 if (prism2_hw_config(dev, 2)) {
643 printk(KERN_WARNING "%s: Card configuration after flash "
644 "download failed\n", dev->name);
645 ret = -1;
646 } else {
647 printk(KERN_INFO "%s: Card initialized successfully after "
648 "flash download\n", dev->name);
649 }
650
651 out:
652 local->hw_downloading = 0;
653 return ret;
654}
655#endif /* PRISM2_NON_VOLATILE_DOWNLOAD */
656
657
658static void prism2_download_free_data(struct prism2_download_data *dl)
659{
660 int i;
661
662 if (dl == NULL)
663 return;
664
665 for (i = 0; i < dl->num_areas; i++)
666 kfree(dl->data[i].data);
667 kfree(dl);
668}
669
670
671static int prism2_download(local_info_t *local,
672 struct prism2_download_param *param)
673{
674 int ret = 0;
675 int i;
676 u32 total_len = 0;
677 struct prism2_download_data *dl = NULL;
678
679 printk(KERN_DEBUG "prism2_download: dl_cmd=%d start_addr=0x%08x "
680 "num_areas=%d\n",
681 param->dl_cmd, param->start_addr, param->num_areas);
682
683 if (param->num_areas > 100) {
684 ret = -EINVAL;
685 goto out;
686 }
687
688 dl = kmalloc(sizeof(*dl) + param->num_areas *
689 sizeof(struct prism2_download_data_area), GFP_KERNEL);
690 if (dl == NULL) {
691 ret = -ENOMEM;
692 goto out;
693 }
694 memset(dl, 0, sizeof(*dl) + param->num_areas *
695 sizeof(struct prism2_download_data_area));
696 dl->dl_cmd = param->dl_cmd;
697 dl->start_addr = param->start_addr;
698 dl->num_areas = param->num_areas;
699 for (i = 0; i < param->num_areas; i++) {
700 PDEBUG(DEBUG_EXTRA2,
701 " area %d: addr=0x%08x len=%d ptr=0x%p\n",
702 i, param->data[i].addr, param->data[i].len,
703 param->data[i].ptr);
704
705 dl->data[i].addr = param->data[i].addr;
706 dl->data[i].len = param->data[i].len;
707
708 total_len += param->data[i].len;
709 if (param->data[i].len > PRISM2_MAX_DOWNLOAD_AREA_LEN ||
710 total_len > PRISM2_MAX_DOWNLOAD_LEN) {
711 ret = -E2BIG;
712 goto out;
713 }
714
715 dl->data[i].data = kmalloc(dl->data[i].len, GFP_KERNEL);
716 if (dl->data[i].data == NULL) {
717 ret = -ENOMEM;
718 goto out;
719 }
720
721 if (copy_from_user(dl->data[i].data, param->data[i].ptr,
722 param->data[i].len)) {
723 ret = -EFAULT;
724 goto out;
725 }
726 }
727
728 switch (param->dl_cmd) {
729 case PRISM2_DOWNLOAD_VOLATILE:
730 case PRISM2_DOWNLOAD_VOLATILE_PERSISTENT:
731 ret = prism2_download_volatile(local, dl);
732 break;
733 case PRISM2_DOWNLOAD_VOLATILE_GENESIS:
734 case PRISM2_DOWNLOAD_VOLATILE_GENESIS_PERSISTENT:
735 ret = prism2_download_genesis(local, dl);
736 break;
737 case PRISM2_DOWNLOAD_NON_VOLATILE:
738#ifdef PRISM2_NON_VOLATILE_DOWNLOAD
739 ret = prism2_download_nonvolatile(local, dl);
740#else /* PRISM2_NON_VOLATILE_DOWNLOAD */
741 printk(KERN_INFO "%s: non-volatile downloading not enabled\n",
742 local->dev->name);
743 ret = -EOPNOTSUPP;
744#endif /* PRISM2_NON_VOLATILE_DOWNLOAD */
745 break;
746 default:
747 printk(KERN_DEBUG "%s: unsupported download command %d\n",
748 local->dev->name, param->dl_cmd);
749 ret = -EINVAL;
750 break;
751 };
752
753 out:
754 if (ret == 0 && dl &&
755 param->dl_cmd == PRISM2_DOWNLOAD_VOLATILE_GENESIS_PERSISTENT) {
756 prism2_download_free_data(local->dl_pri);
757 local->dl_pri = dl;
758 } else if (ret == 0 && dl &&
759 param->dl_cmd == PRISM2_DOWNLOAD_VOLATILE_PERSISTENT) {
760 prism2_download_free_data(local->dl_sec);
761 local->dl_sec = dl;
762 } else
763 prism2_download_free_data(dl);
764
765 return ret;
766}
diff --git a/drivers/net/wireless/hostap/hostap_hw.c b/drivers/net/wireless/hostap/hostap_hw.c
new file mode 100644
index 000000000000..e533a663deda
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_hw.c
@@ -0,0 +1,3445 @@
1/*
2 * Host AP (software wireless LAN access point) driver for
3 * Intersil Prism2/2.5/3.
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2005, Jouni Malinen <jkmaline@cc.hut.fi>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. See README and COPYING for
12 * more details.
13 *
14 * FIX:
15 * - there is currently no way of associating TX packets to correct wds device
16 * when TX Exc/OK event occurs, so all tx_packets and some
17 * tx_errors/tx_dropped are added to the main netdevice; using sw_support
18 * field in txdesc might be used to fix this (using Alloc event to increment
19 * tx_packets would need some further info in txfid table)
20 *
21 * Buffer Access Path (BAP) usage:
22 * Prism2 cards have two separate BAPs for accessing the card memory. These
23 * should allow concurrent access to two different frames and the driver
24 * previously used BAP0 for sending data and BAP1 for receiving data.
25 * However, there seems to be number of issues with concurrent access and at
26 * least one know hardware bug in using BAP0 and BAP1 concurrently with PCI
27 * Prism2.5. Therefore, the driver now only uses BAP0 for moving data between
28 * host and card memories. BAP0 accesses are protected with local->baplock
29 * (spin_lock_bh) to prevent concurrent use.
30 */
31
32
33#include <linux/config.h>
34#include <linux/version.h>
35
36#include <asm/delay.h>
37#include <asm/uaccess.h>
38
39#include <linux/slab.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/proc_fs.h>
43#include <linux/if_arp.h>
44#include <linux/delay.h>
45#include <linux/random.h>
46#include <linux/wait.h>
47#include <linux/sched.h>
48#include <linux/rtnetlink.h>
49#include <linux/wireless.h>
50#include <net/iw_handler.h>
51#include <net/ieee80211.h>
52#include <net/ieee80211_crypt.h>
53#include <asm/irq.h>
54
55#include "hostap_80211.h"
56#include "hostap.h"
57#include "hostap_ap.h"
58
59
60/* #define final_version */
61
62static int mtu = 1500;
63module_param(mtu, int, 0444);
64MODULE_PARM_DESC(mtu, "Maximum transfer unit");
65
66static int channel[MAX_PARM_DEVICES] = { 3, DEF_INTS };
67module_param_array(channel, int, NULL, 0444);
68MODULE_PARM_DESC(channel, "Initial channel");
69
70static char essid[33] = "test";
71module_param_string(essid, essid, sizeof(essid), 0444);
72MODULE_PARM_DESC(essid, "Host AP's ESSID");
73
74static int iw_mode[MAX_PARM_DEVICES] = { IW_MODE_MASTER, DEF_INTS };
75module_param_array(iw_mode, int, NULL, 0444);
76MODULE_PARM_DESC(iw_mode, "Initial operation mode");
77
78static int beacon_int[MAX_PARM_DEVICES] = { 100, DEF_INTS };
79module_param_array(beacon_int, int, NULL, 0444);
80MODULE_PARM_DESC(beacon_int, "Beacon interval (1 = 1024 usec)");
81
82static int dtim_period[MAX_PARM_DEVICES] = { 1, DEF_INTS };
83module_param_array(dtim_period, int, NULL, 0444);
84MODULE_PARM_DESC(dtim_period, "DTIM period");
85
86static char dev_template[16] = "wlan%d";
87module_param_string(dev_template, dev_template, sizeof(dev_template), 0444);
88MODULE_PARM_DESC(dev_template, "Prefix for network device name (default: "
89 "wlan%d)");
90
91#ifdef final_version
92#define EXTRA_EVENTS_WTERR 0
93#else
94/* check WTERR events (Wait Time-out) in development versions */
95#define EXTRA_EVENTS_WTERR HFA384X_EV_WTERR
96#endif
97
98/* Events that will be using BAP0 */
99#define HFA384X_BAP0_EVENTS \
100 (HFA384X_EV_TXEXC | HFA384X_EV_RX | HFA384X_EV_INFO | HFA384X_EV_TX)
101
102/* event mask, i.e., events that will result in an interrupt */
103#define HFA384X_EVENT_MASK \
104 (HFA384X_BAP0_EVENTS | HFA384X_EV_ALLOC | HFA384X_EV_INFDROP | \
105 HFA384X_EV_CMD | HFA384X_EV_TICK | \
106 EXTRA_EVENTS_WTERR)
107
108/* Default TX control flags: use 802.11 headers and request interrupt for
109 * failed transmits. Frames that request ACK callback, will add
110 * _TX_OK flag and _ALT_RTRY flag may be used to select different retry policy.
111 */
112#define HFA384X_TX_CTRL_FLAGS \
113 (HFA384X_TX_CTRL_802_11 | HFA384X_TX_CTRL_TX_EX)
114
115
116/* ca. 1 usec */
117#define HFA384X_CMD_BUSY_TIMEOUT 5000
118#define HFA384X_BAP_BUSY_TIMEOUT 50000
119
120/* ca. 10 usec */
121#define HFA384X_CMD_COMPL_TIMEOUT 20000
122#define HFA384X_DL_COMPL_TIMEOUT 1000000
123
124/* Wait times for initialization; yield to other processes to avoid busy
125 * waiting for long time. */
126#define HFA384X_INIT_TIMEOUT (HZ / 2) /* 500 ms */
127#define HFA384X_ALLOC_COMPL_TIMEOUT (HZ / 20) /* 50 ms */
128
129
130static void prism2_hw_reset(struct net_device *dev);
131static void prism2_check_sta_fw_version(local_info_t *local);
132
133#ifdef PRISM2_DOWNLOAD_SUPPORT
134/* hostap_download.c */
135static int prism2_download_aux_dump(struct net_device *dev,
136 unsigned int addr, int len, u8 *buf);
137static u8 * prism2_read_pda(struct net_device *dev);
138static int prism2_download(local_info_t *local,
139 struct prism2_download_param *param);
140static void prism2_download_free_data(struct prism2_download_data *dl);
141static int prism2_download_volatile(local_info_t *local,
142 struct prism2_download_data *param);
143static int prism2_download_genesis(local_info_t *local,
144 struct prism2_download_data *param);
145static int prism2_get_ram_size(local_info_t *local);
146#endif /* PRISM2_DOWNLOAD_SUPPORT */
147
148
149
150
151#ifndef final_version
152/* magic value written to SWSUPPORT0 reg. for detecting whether card is still
153 * present */
154#define HFA384X_MAGIC 0x8A32
155#endif
156
157
158static u16 hfa384x_read_reg(struct net_device *dev, u16 reg)
159{
160 return HFA384X_INW(reg);
161}
162
163
164static void hfa384x_read_regs(struct net_device *dev,
165 struct hfa384x_regs *regs)
166{
167 regs->cmd = HFA384X_INW(HFA384X_CMD_OFF);
168 regs->evstat = HFA384X_INW(HFA384X_EVSTAT_OFF);
169 regs->offset0 = HFA384X_INW(HFA384X_OFFSET0_OFF);
170 regs->offset1 = HFA384X_INW(HFA384X_OFFSET1_OFF);
171 regs->swsupport0 = HFA384X_INW(HFA384X_SWSUPPORT0_OFF);
172}
173
174
175/**
176 * __hostap_cmd_queue_free - Free Prism2 command queue entry (private)
177 * @local: pointer to private Host AP driver data
178 * @entry: Prism2 command queue entry to be freed
179 * @del_req: request the entry to be removed
180 *
181 * Internal helper function for freeing Prism2 command queue entries.
182 * Caller must have acquired local->cmdlock before calling this function.
183 */
184static inline void __hostap_cmd_queue_free(local_info_t *local,
185 struct hostap_cmd_queue *entry,
186 int del_req)
187{
188 if (del_req) {
189 entry->del_req = 1;
190 if (!list_empty(&entry->list)) {
191 list_del_init(&entry->list);
192 local->cmd_queue_len--;
193 }
194 }
195
196 if (atomic_dec_and_test(&entry->usecnt) && entry->del_req)
197 kfree(entry);
198}
199
200
201/**
202 * hostap_cmd_queue_free - Free Prism2 command queue entry
203 * @local: pointer to private Host AP driver data
204 * @entry: Prism2 command queue entry to be freed
205 * @del_req: request the entry to be removed
206 *
207 * Free a Prism2 command queue entry.
208 */
209static inline void hostap_cmd_queue_free(local_info_t *local,
210 struct hostap_cmd_queue *entry,
211 int del_req)
212{
213 unsigned long flags;
214
215 spin_lock_irqsave(&local->cmdlock, flags);
216 __hostap_cmd_queue_free(local, entry, del_req);
217 spin_unlock_irqrestore(&local->cmdlock, flags);
218}
219
220
221/**
222 * prism2_clear_cmd_queue - Free all pending Prism2 command queue entries
223 * @local: pointer to private Host AP driver data
224 */
225static void prism2_clear_cmd_queue(local_info_t *local)
226{
227 struct list_head *ptr, *n;
228 unsigned long flags;
229 struct hostap_cmd_queue *entry;
230
231 spin_lock_irqsave(&local->cmdlock, flags);
232 list_for_each_safe(ptr, n, &local->cmd_queue) {
233 entry = list_entry(ptr, struct hostap_cmd_queue, list);
234 atomic_inc(&entry->usecnt);
235 printk(KERN_DEBUG "%s: removed pending cmd_queue entry "
236 "(type=%d, cmd=0x%04x, param0=0x%04x)\n",
237 local->dev->name, entry->type, entry->cmd,
238 entry->param0);
239 __hostap_cmd_queue_free(local, entry, 1);
240 }
241 if (local->cmd_queue_len) {
242 /* This should not happen; print debug message and clear
243 * queue length. */
244 printk(KERN_DEBUG "%s: cmd_queue_len (%d) not zero after "
245 "flush\n", local->dev->name, local->cmd_queue_len);
246 local->cmd_queue_len = 0;
247 }
248 spin_unlock_irqrestore(&local->cmdlock, flags);
249}
250
251
252/**
253 * hfa384x_cmd_issue - Issue a Prism2 command to the hardware
254 * @dev: pointer to net_device
255 * @entry: Prism2 command queue entry to be issued
256 */
257static inline int hfa384x_cmd_issue(struct net_device *dev,
258 struct hostap_cmd_queue *entry)
259{
260 struct hostap_interface *iface;
261 local_info_t *local;
262 int tries;
263 u16 reg;
264 unsigned long flags;
265
266 iface = netdev_priv(dev);
267 local = iface->local;
268
269 if (local->func->card_present && !local->func->card_present(local))
270 return -ENODEV;
271
272 if (entry->issued) {
273 printk(KERN_DEBUG "%s: driver bug - re-issuing command @%p\n",
274 dev->name, entry);
275 }
276
277 /* wait until busy bit is clear; this should always be clear since the
278 * commands are serialized */
279 tries = HFA384X_CMD_BUSY_TIMEOUT;
280 while (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY && tries > 0) {
281 tries--;
282 udelay(1);
283 }
284#ifndef final_version
285 if (tries != HFA384X_CMD_BUSY_TIMEOUT) {
286 prism2_io_debug_error(dev, 1);
287 printk(KERN_DEBUG "%s: hfa384x_cmd_issue: cmd reg was busy "
288 "for %d usec\n", dev->name,
289 HFA384X_CMD_BUSY_TIMEOUT - tries);
290 }
291#endif
292 if (tries == 0) {
293 reg = HFA384X_INW(HFA384X_CMD_OFF);
294 prism2_io_debug_error(dev, 2);
295 printk(KERN_DEBUG "%s: hfa384x_cmd_issue - timeout - "
296 "reg=0x%04x\n", dev->name, reg);
297 return -ETIMEDOUT;
298 }
299
300 /* write command */
301 spin_lock_irqsave(&local->cmdlock, flags);
302 HFA384X_OUTW(entry->param0, HFA384X_PARAM0_OFF);
303 HFA384X_OUTW(entry->param1, HFA384X_PARAM1_OFF);
304 HFA384X_OUTW(entry->cmd, HFA384X_CMD_OFF);
305 entry->issued = 1;
306 spin_unlock_irqrestore(&local->cmdlock, flags);
307
308 return 0;
309}
310
311
312/**
313 * hfa384x_cmd - Issue a Prism2 command and wait (sleep) for completion
314 * @dev: pointer to net_device
315 * @cmd: Prism2 command code (HFA384X_CMD_CODE_*)
316 * @param0: value for Param0 register
317 * @param1: value for Param1 register (pointer; %NULL if not used)
318 * @resp0: pointer for Resp0 data or %NULL if Resp0 is not needed
319 *
320 * Issue given command (possibly after waiting in command queue) and sleep
321 * until the command is completed (or timed out or interrupted). This can be
322 * called only from user process context.
323 */
324static int hfa384x_cmd(struct net_device *dev, u16 cmd, u16 param0,
325 u16 *param1, u16 *resp0)
326{
327 struct hostap_interface *iface;
328 local_info_t *local;
329 int err, res, issue, issued = 0;
330 unsigned long flags;
331 struct hostap_cmd_queue *entry;
332 DECLARE_WAITQUEUE(wait, current);
333
334 iface = netdev_priv(dev);
335 local = iface->local;
336
337 if (in_interrupt()) {
338 printk(KERN_DEBUG "%s: hfa384x_cmd called from interrupt "
339 "context\n", dev->name);
340 return -1;
341 }
342
343 if (local->cmd_queue_len >= HOSTAP_CMD_QUEUE_MAX_LEN) {
344 printk(KERN_DEBUG "%s: hfa384x_cmd: cmd_queue full\n",
345 dev->name);
346 return -1;
347 }
348
349 if (signal_pending(current))
350 return -EINTR;
351
352 entry = (struct hostap_cmd_queue *)
353 kmalloc(sizeof(*entry), GFP_ATOMIC);
354 if (entry == NULL) {
355 printk(KERN_DEBUG "%s: hfa384x_cmd - kmalloc failed\n",
356 dev->name);
357 return -ENOMEM;
358 }
359 memset(entry, 0, sizeof(*entry));
360 atomic_set(&entry->usecnt, 1);
361 entry->type = CMD_SLEEP;
362 entry->cmd = cmd;
363 entry->param0 = param0;
364 if (param1)
365 entry->param1 = *param1;
366 init_waitqueue_head(&entry->compl);
367
368 /* prepare to wait for command completion event, but do not sleep yet
369 */
370 add_wait_queue(&entry->compl, &wait);
371 set_current_state(TASK_INTERRUPTIBLE);
372
373 spin_lock_irqsave(&local->cmdlock, flags);
374 issue = list_empty(&local->cmd_queue);
375 if (issue)
376 entry->issuing = 1;
377 list_add_tail(&entry->list, &local->cmd_queue);
378 local->cmd_queue_len++;
379 spin_unlock_irqrestore(&local->cmdlock, flags);
380
381 err = 0;
382 if (!issue)
383 goto wait_completion;
384
385 if (signal_pending(current))
386 err = -EINTR;
387
388 if (!err) {
389 if (hfa384x_cmd_issue(dev, entry))
390 err = -ETIMEDOUT;
391 else
392 issued = 1;
393 }
394
395 wait_completion:
396 if (!err && entry->type != CMD_COMPLETED) {
397 /* sleep until command is completed or timed out */
398 res = schedule_timeout(2 * HZ);
399 } else
400 res = -1;
401
402 if (!err && signal_pending(current))
403 err = -EINTR;
404
405 if (err && issued) {
406 /* the command was issued, so a CmdCompl event should occur
407 * soon; however, there's a pending signal and
408 * schedule_timeout() would be interrupted; wait a short period
409 * of time to avoid removing entry from the list before
410 * CmdCompl event */
411 udelay(300);
412 }
413
414 set_current_state(TASK_RUNNING);
415 remove_wait_queue(&entry->compl, &wait);
416
417 /* If entry->list is still in the list, it must be removed
418 * first and in this case prism2_cmd_ev() does not yet have
419 * local reference to it, and the data can be kfree()'d
420 * here. If the command completion event is still generated,
421 * it will be assigned to next (possibly) pending command, but
422 * the driver will reset the card anyway due to timeout
423 *
424 * If the entry is not in the list prism2_cmd_ev() has a local
425 * reference to it, but keeps cmdlock as long as the data is
426 * needed, so the data can be kfree()'d here. */
427
428 /* FIX: if the entry->list is in the list, it has not been completed
429 * yet, so removing it here is somewhat wrong.. this could cause
430 * references to freed memory and next list_del() causing NULL pointer
431 * dereference.. it would probably be better to leave the entry in the
432 * list and the list should be emptied during hw reset */
433
434 spin_lock_irqsave(&local->cmdlock, flags);
435 if (!list_empty(&entry->list)) {
436 printk(KERN_DEBUG "%s: hfa384x_cmd: entry still in list? "
437 "(entry=%p, type=%d, res=%d)\n", dev->name, entry,
438 entry->type, res);
439 list_del_init(&entry->list);
440 local->cmd_queue_len--;
441 }
442 spin_unlock_irqrestore(&local->cmdlock, flags);
443
444 if (err) {
445 printk(KERN_DEBUG "%s: hfa384x_cmd: interrupted; err=%d\n",
446 dev->name, err);
447 res = err;
448 goto done;
449 }
450
451 if (entry->type != CMD_COMPLETED) {
452 u16 reg = HFA384X_INW(HFA384X_EVSTAT_OFF);
453 printk(KERN_DEBUG "%s: hfa384x_cmd: command was not "
454 "completed (res=%d, entry=%p, type=%d, cmd=0x%04x, "
455 "param0=0x%04x, EVSTAT=%04x INTEN=%04x)\n", dev->name,
456 res, entry, entry->type, entry->cmd, entry->param0, reg,
457 HFA384X_INW(HFA384X_INTEN_OFF));
458 if (reg & HFA384X_EV_CMD) {
459 /* Command completion event is pending, but the
460 * interrupt was not delivered - probably an issue
461 * with pcmcia-cs configuration. */
462 printk(KERN_WARNING "%s: interrupt delivery does not "
463 "seem to work\n", dev->name);
464 }
465 prism2_io_debug_error(dev, 3);
466 res = -ETIMEDOUT;
467 goto done;
468 }
469
470 if (resp0 != NULL)
471 *resp0 = entry->resp0;
472#ifndef final_version
473 if (entry->res) {
474 printk(KERN_DEBUG "%s: CMD=0x%04x => res=0x%02x, "
475 "resp0=0x%04x\n",
476 dev->name, cmd, entry->res, entry->resp0);
477 }
478#endif /* final_version */
479
480 res = entry->res;
481 done:
482 hostap_cmd_queue_free(local, entry, 1);
483 return res;
484}
485
486
487/**
488 * hfa384x_cmd_callback - Issue a Prism2 command; callback when completed
489 * @dev: pointer to net_device
490 * @cmd: Prism2 command code (HFA384X_CMD_CODE_*)
491 * @param0: value for Param0 register
492 * @callback: command completion callback function (%NULL = no callback)
493 * @context: context data to be given to the callback function
494 *
495 * Issue given command (possibly after waiting in command queue) and use
496 * callback function to indicate command completion. This can be called both
497 * from user and interrupt context. The callback function will be called in
498 * hardware IRQ context. It can be %NULL, when no function is called when
499 * command is completed.
500 */
501static int hfa384x_cmd_callback(struct net_device *dev, u16 cmd, u16 param0,
502 void (*callback)(struct net_device *dev,
503 long context, u16 resp0,
504 u16 status),
505 long context)
506{
507 struct hostap_interface *iface;
508 local_info_t *local;
509 int issue, ret;
510 unsigned long flags;
511 struct hostap_cmd_queue *entry;
512
513 iface = netdev_priv(dev);
514 local = iface->local;
515
516 if (local->cmd_queue_len >= HOSTAP_CMD_QUEUE_MAX_LEN + 2) {
517 printk(KERN_DEBUG "%s: hfa384x_cmd: cmd_queue full\n",
518 dev->name);
519 return -1;
520 }
521
522 entry = (struct hostap_cmd_queue *)
523 kmalloc(sizeof(*entry), GFP_ATOMIC);
524 if (entry == NULL) {
525 printk(KERN_DEBUG "%s: hfa384x_cmd_callback - kmalloc "
526 "failed\n", dev->name);
527 return -ENOMEM;
528 }
529 memset(entry, 0, sizeof(*entry));
530 atomic_set(&entry->usecnt, 1);
531 entry->type = CMD_CALLBACK;
532 entry->cmd = cmd;
533 entry->param0 = param0;
534 entry->callback = callback;
535 entry->context = context;
536
537 spin_lock_irqsave(&local->cmdlock, flags);
538 issue = list_empty(&local->cmd_queue);
539 if (issue)
540 entry->issuing = 1;
541 list_add_tail(&entry->list, &local->cmd_queue);
542 local->cmd_queue_len++;
543 spin_unlock_irqrestore(&local->cmdlock, flags);
544
545 if (issue && hfa384x_cmd_issue(dev, entry))
546 ret = -ETIMEDOUT;
547 else
548 ret = 0;
549
550 hostap_cmd_queue_free(local, entry, ret);
551
552 return ret;
553}
554
555
556/**
557 * __hfa384x_cmd_no_wait - Issue a Prism2 command (private)
558 * @dev: pointer to net_device
559 * @cmd: Prism2 command code (HFA384X_CMD_CODE_*)
560 * @param0: value for Param0 register
561 * @io_debug_num: I/O debug error number
562 *
563 * Shared helper function for hfa384x_cmd_wait() and hfa384x_cmd_no_wait().
564 */
565static int __hfa384x_cmd_no_wait(struct net_device *dev, u16 cmd, u16 param0,
566 int io_debug_num)
567{
568 int tries;
569 u16 reg;
570
571 /* wait until busy bit is clear; this should always be clear since the
572 * commands are serialized */
573 tries = HFA384X_CMD_BUSY_TIMEOUT;
574 while (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY && tries > 0) {
575 tries--;
576 udelay(1);
577 }
578 if (tries == 0) {
579 reg = HFA384X_INW(HFA384X_CMD_OFF);
580 prism2_io_debug_error(dev, io_debug_num);
581 printk(KERN_DEBUG "%s: __hfa384x_cmd_no_wait(%d) - timeout - "
582 "reg=0x%04x\n", dev->name, io_debug_num, reg);
583 return -ETIMEDOUT;
584 }
585
586 /* write command */
587 HFA384X_OUTW(param0, HFA384X_PARAM0_OFF);
588 HFA384X_OUTW(cmd, HFA384X_CMD_OFF);
589
590 return 0;
591}
592
593
594/**
595 * hfa384x_cmd_wait - Issue a Prism2 command and busy wait for completion
596 * @dev: pointer to net_device
597 * @cmd: Prism2 command code (HFA384X_CMD_CODE_*)
598 * @param0: value for Param0 register
599 */
600static int hfa384x_cmd_wait(struct net_device *dev, u16 cmd, u16 param0)
601{
602 int res, tries;
603 u16 reg;
604
605 res = __hfa384x_cmd_no_wait(dev, cmd, param0, 4);
606 if (res)
607 return res;
608
609 /* wait for command completion */
610 if ((cmd & HFA384X_CMDCODE_MASK) == HFA384X_CMDCODE_DOWNLOAD)
611 tries = HFA384X_DL_COMPL_TIMEOUT;
612 else
613 tries = HFA384X_CMD_COMPL_TIMEOUT;
614
615 while (!(HFA384X_INW(HFA384X_EVSTAT_OFF) & HFA384X_EV_CMD) &&
616 tries > 0) {
617 tries--;
618 udelay(10);
619 }
620 if (tries == 0) {
621 reg = HFA384X_INW(HFA384X_EVSTAT_OFF);
622 prism2_io_debug_error(dev, 5);
623 printk(KERN_DEBUG "%s: hfa384x_cmd_wait - timeout2 - "
624 "reg=0x%04x\n", dev->name, reg);
625 return -ETIMEDOUT;
626 }
627
628 res = (HFA384X_INW(HFA384X_STATUS_OFF) &
629 (BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9) |
630 BIT(8))) >> 8;
631#ifndef final_version
632 if (res) {
633 printk(KERN_DEBUG "%s: CMD=0x%04x => res=0x%02x\n",
634 dev->name, cmd, res);
635 }
636#endif
637
638 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_EVACK_OFF);
639
640 return res;
641}
642
643
644/**
645 * hfa384x_cmd_no_wait - Issue a Prism2 command; do not wait for completion
646 * @dev: pointer to net_device
647 * @cmd: Prism2 command code (HFA384X_CMD_CODE_*)
648 * @param0: value for Param0 register
649 */
650static inline int hfa384x_cmd_no_wait(struct net_device *dev, u16 cmd,
651 u16 param0)
652{
653 return __hfa384x_cmd_no_wait(dev, cmd, param0, 6);
654}
655
656
657/**
658 * prism2_cmd_ev - Prism2 command completion event handler
659 * @dev: pointer to net_device
660 *
661 * Interrupt handler for command completion events. Called by the main
662 * interrupt handler in hardware IRQ context. Read Resp0 and status registers
663 * from the hardware and ACK the event. Depending on the issued command type
664 * either wake up the sleeping process that is waiting for command completion
665 * or call the callback function. Issue the next command, if one is pending.
666 */
667static void prism2_cmd_ev(struct net_device *dev)
668{
669 struct hostap_interface *iface;
670 local_info_t *local;
671 struct hostap_cmd_queue *entry = NULL;
672
673 iface = netdev_priv(dev);
674 local = iface->local;
675
676 spin_lock(&local->cmdlock);
677 if (!list_empty(&local->cmd_queue)) {
678 entry = list_entry(local->cmd_queue.next,
679 struct hostap_cmd_queue, list);
680 atomic_inc(&entry->usecnt);
681 list_del_init(&entry->list);
682 local->cmd_queue_len--;
683
684 if (!entry->issued) {
685 printk(KERN_DEBUG "%s: Command completion event, but "
686 "cmd not issued\n", dev->name);
687 __hostap_cmd_queue_free(local, entry, 1);
688 entry = NULL;
689 }
690 }
691 spin_unlock(&local->cmdlock);
692
693 if (!entry) {
694 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_EVACK_OFF);
695 printk(KERN_DEBUG "%s: Command completion event, but no "
696 "pending commands\n", dev->name);
697 return;
698 }
699
700 entry->resp0 = HFA384X_INW(HFA384X_RESP0_OFF);
701 entry->res = (HFA384X_INW(HFA384X_STATUS_OFF) &
702 (BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) |
703 BIT(9) | BIT(8))) >> 8;
704 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_EVACK_OFF);
705
706 /* TODO: rest of the CmdEv handling could be moved to tasklet */
707 if (entry->type == CMD_SLEEP) {
708 entry->type = CMD_COMPLETED;
709 wake_up_interruptible(&entry->compl);
710 } else if (entry->type == CMD_CALLBACK) {
711 if (entry->callback)
712 entry->callback(dev, entry->context, entry->resp0,
713 entry->res);
714 } else {
715 printk(KERN_DEBUG "%s: Invalid command completion type %d\n",
716 dev->name, entry->type);
717 }
718 hostap_cmd_queue_free(local, entry, 1);
719
720 /* issue next command, if pending */
721 entry = NULL;
722 spin_lock(&local->cmdlock);
723 if (!list_empty(&local->cmd_queue)) {
724 entry = list_entry(local->cmd_queue.next,
725 struct hostap_cmd_queue, list);
726 if (entry->issuing) {
727 /* hfa384x_cmd() has already started issuing this
728 * command, so do not start here */
729 entry = NULL;
730 }
731 if (entry)
732 atomic_inc(&entry->usecnt);
733 }
734 spin_unlock(&local->cmdlock);
735
736 if (entry) {
737 /* issue next command; if command issuing fails, remove the
738 * entry from cmd_queue */
739 int res = hfa384x_cmd_issue(dev, entry);
740 spin_lock(&local->cmdlock);
741 __hostap_cmd_queue_free(local, entry, res);
742 spin_unlock(&local->cmdlock);
743 }
744}
745
746
747static inline int hfa384x_wait_offset(struct net_device *dev, u16 o_off)
748{
749 int tries = HFA384X_BAP_BUSY_TIMEOUT;
750 int res = HFA384X_INW(o_off) & HFA384X_OFFSET_BUSY;
751
752 while (res && tries > 0) {
753 tries--;
754 udelay(1);
755 res = HFA384X_INW(o_off) & HFA384X_OFFSET_BUSY;
756 }
757 return res;
758}
759
760
761/* Offset must be even */
762static int hfa384x_setup_bap(struct net_device *dev, u16 bap, u16 id,
763 int offset)
764{
765 u16 o_off, s_off;
766 int ret = 0;
767
768 if (offset % 2 || bap > 1)
769 return -EINVAL;
770
771 if (bap == BAP1) {
772 o_off = HFA384X_OFFSET1_OFF;
773 s_off = HFA384X_SELECT1_OFF;
774 } else {
775 o_off = HFA384X_OFFSET0_OFF;
776 s_off = HFA384X_SELECT0_OFF;
777 }
778
779 if (hfa384x_wait_offset(dev, o_off)) {
780 prism2_io_debug_error(dev, 7);
781 printk(KERN_DEBUG "%s: hfa384x_setup_bap - timeout before\n",
782 dev->name);
783 ret = -ETIMEDOUT;
784 goto out;
785 }
786
787 HFA384X_OUTW(id, s_off);
788 HFA384X_OUTW(offset, o_off);
789
790 if (hfa384x_wait_offset(dev, o_off)) {
791 prism2_io_debug_error(dev, 8);
792 printk(KERN_DEBUG "%s: hfa384x_setup_bap - timeout after\n",
793 dev->name);
794 ret = -ETIMEDOUT;
795 goto out;
796 }
797#ifndef final_version
798 if (HFA384X_INW(o_off) & HFA384X_OFFSET_ERR) {
799 prism2_io_debug_error(dev, 9);
800 printk(KERN_DEBUG "%s: hfa384x_setup_bap - offset error "
801 "(%d,0x04%x,%d); reg=0x%04x\n",
802 dev->name, bap, id, offset, HFA384X_INW(o_off));
803 ret = -EINVAL;
804 }
805#endif
806
807 out:
808 return ret;
809}
810
811
812static int hfa384x_get_rid(struct net_device *dev, u16 rid, void *buf, int len,
813 int exact_len)
814{
815 struct hostap_interface *iface;
816 local_info_t *local;
817 int res, rlen = 0;
818 struct hfa384x_rid_hdr rec;
819
820 iface = netdev_priv(dev);
821 local = iface->local;
822
823 if (local->no_pri) {
824 printk(KERN_DEBUG "%s: cannot get RID %04x (len=%d) - no PRI "
825 "f/w\n", dev->name, rid, len);
826 return -ENOTTY; /* Well.. not really correct, but return
827 * something unique enough.. */
828 }
829
830 if ((local->func->card_present && !local->func->card_present(local)) ||
831 local->hw_downloading)
832 return -ENODEV;
833
834 res = down_interruptible(&local->rid_bap_sem);
835 if (res)
836 return res;
837
838 res = hfa384x_cmd(dev, HFA384X_CMDCODE_ACCESS, rid, NULL, NULL);
839 if (res) {
840 printk(KERN_DEBUG "%s: hfa384x_get_rid: CMDCODE_ACCESS failed "
841 "(res=%d, rid=%04x, len=%d)\n",
842 dev->name, res, rid, len);
843 up(&local->rid_bap_sem);
844 return res;
845 }
846
847 spin_lock_bh(&local->baplock);
848
849 res = hfa384x_setup_bap(dev, BAP0, rid, 0);
850 if (!res)
851 res = hfa384x_from_bap(dev, BAP0, &rec, sizeof(rec));
852
853 if (le16_to_cpu(rec.len) == 0) {
854 /* RID not available */
855 res = -ENODATA;
856 }
857
858 rlen = (le16_to_cpu(rec.len) - 1) * 2;
859 if (!res && exact_len && rlen != len) {
860 printk(KERN_DEBUG "%s: hfa384x_get_rid - RID len mismatch: "
861 "rid=0x%04x, len=%d (expected %d)\n",
862 dev->name, rid, rlen, len);
863 res = -ENODATA;
864 }
865
866 if (!res)
867 res = hfa384x_from_bap(dev, BAP0, buf, len);
868
869 spin_unlock_bh(&local->baplock);
870 up(&local->rid_bap_sem);
871
872 if (res) {
873 if (res != -ENODATA)
874 printk(KERN_DEBUG "%s: hfa384x_get_rid (rid=%04x, "
875 "len=%d) - failed - res=%d\n", dev->name, rid,
876 len, res);
877 if (res == -ETIMEDOUT)
878 prism2_hw_reset(dev);
879 return res;
880 }
881
882 return rlen;
883}
884
885
886static int hfa384x_set_rid(struct net_device *dev, u16 rid, void *buf, int len)
887{
888 struct hostap_interface *iface;
889 local_info_t *local;
890 struct hfa384x_rid_hdr rec;
891 int res;
892
893 iface = netdev_priv(dev);
894 local = iface->local;
895
896 if (local->no_pri) {
897 printk(KERN_DEBUG "%s: cannot set RID %04x (len=%d) - no PRI "
898 "f/w\n", dev->name, rid, len);
899 return -ENOTTY; /* Well.. not really correct, but return
900 * something unique enough.. */
901 }
902
903 if ((local->func->card_present && !local->func->card_present(local)) ||
904 local->hw_downloading)
905 return -ENODEV;
906
907 rec.rid = cpu_to_le16(rid);
908 /* RID len in words and +1 for rec.rid */
909 rec.len = cpu_to_le16(len / 2 + len % 2 + 1);
910
911 res = down_interruptible(&local->rid_bap_sem);
912 if (res)
913 return res;
914
915 spin_lock_bh(&local->baplock);
916 res = hfa384x_setup_bap(dev, BAP0, rid, 0);
917 if (!res)
918 res = hfa384x_to_bap(dev, BAP0, &rec, sizeof(rec));
919 if (!res)
920 res = hfa384x_to_bap(dev, BAP0, buf, len);
921 spin_unlock_bh(&local->baplock);
922
923 if (res) {
924 printk(KERN_DEBUG "%s: hfa384x_set_rid (rid=%04x, len=%d) - "
925 "failed - res=%d\n", dev->name, rid, len, res);
926 up(&local->rid_bap_sem);
927 return res;
928 }
929
930 res = hfa384x_cmd(dev, HFA384X_CMDCODE_ACCESS_WRITE, rid, NULL, NULL);
931 up(&local->rid_bap_sem);
932 if (res) {
933 printk(KERN_DEBUG "%s: hfa384x_set_rid: CMDCODE_ACCESS_WRITE "
934 "failed (res=%d, rid=%04x, len=%d)\n",
935 dev->name, res, rid, len);
936 return res;
937 }
938
939 if (res == -ETIMEDOUT)
940 prism2_hw_reset(dev);
941
942 return res;
943}
944
945
946static void hfa384x_disable_interrupts(struct net_device *dev)
947{
948 /* disable interrupts and clear event status */
949 HFA384X_OUTW(0, HFA384X_INTEN_OFF);
950 HFA384X_OUTW(0xffff, HFA384X_EVACK_OFF);
951}
952
953
954static void hfa384x_enable_interrupts(struct net_device *dev)
955{
956 /* ack pending events and enable interrupts from selected events */
957 HFA384X_OUTW(0xffff, HFA384X_EVACK_OFF);
958 HFA384X_OUTW(HFA384X_EVENT_MASK, HFA384X_INTEN_OFF);
959}
960
961
962static void hfa384x_events_no_bap0(struct net_device *dev)
963{
964 HFA384X_OUTW(HFA384X_EVENT_MASK & ~HFA384X_BAP0_EVENTS,
965 HFA384X_INTEN_OFF);
966}
967
968
969static void hfa384x_events_all(struct net_device *dev)
970{
971 HFA384X_OUTW(HFA384X_EVENT_MASK, HFA384X_INTEN_OFF);
972}
973
974
975static void hfa384x_events_only_cmd(struct net_device *dev)
976{
977 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_INTEN_OFF);
978}
979
980
981static u16 hfa384x_allocate_fid(struct net_device *dev, int len)
982{
983 u16 fid;
984 unsigned long delay;
985
986 /* FIX: this could be replace with hfa384x_cmd() if the Alloc event
987 * below would be handled like CmdCompl event (sleep here, wake up from
988 * interrupt handler */
989 if (hfa384x_cmd_wait(dev, HFA384X_CMDCODE_ALLOC, len)) {
990 printk(KERN_DEBUG "%s: cannot allocate fid, len=%d\n",
991 dev->name, len);
992 return 0xffff;
993 }
994
995 delay = jiffies + HFA384X_ALLOC_COMPL_TIMEOUT;
996 while (!(HFA384X_INW(HFA384X_EVSTAT_OFF) & HFA384X_EV_ALLOC) &&
997 time_before(jiffies, delay))
998 yield();
999 if (!(HFA384X_INW(HFA384X_EVSTAT_OFF) & HFA384X_EV_ALLOC)) {
1000 printk("%s: fid allocate, len=%d - timeout\n", dev->name, len);
1001 return 0xffff;
1002 }
1003
1004 fid = HFA384X_INW(HFA384X_ALLOCFID_OFF);
1005 HFA384X_OUTW(HFA384X_EV_ALLOC, HFA384X_EVACK_OFF);
1006
1007 return fid;
1008}
1009
1010
1011static int prism2_reset_port(struct net_device *dev)
1012{
1013 struct hostap_interface *iface;
1014 local_info_t *local;
1015 int res;
1016
1017 iface = netdev_priv(dev);
1018 local = iface->local;
1019
1020 if (!local->dev_enabled)
1021 return 0;
1022
1023 res = hfa384x_cmd(dev, HFA384X_CMDCODE_DISABLE, 0,
1024 NULL, NULL);
1025 if (res)
1026 printk(KERN_DEBUG "%s: reset port failed to disable port\n",
1027 dev->name);
1028 else {
1029 res = hfa384x_cmd(dev, HFA384X_CMDCODE_ENABLE, 0,
1030 NULL, NULL);
1031 if (res)
1032 printk(KERN_DEBUG "%s: reset port failed to enable "
1033 "port\n", dev->name);
1034 }
1035
1036 /* It looks like at least some STA firmware versions reset
1037 * fragmentation threshold back to 2346 after enable command. Restore
1038 * the configured value, if it differs from this default. */
1039 if (local->fragm_threshold != 2346 &&
1040 hostap_set_word(dev, HFA384X_RID_FRAGMENTATIONTHRESHOLD,
1041 local->fragm_threshold)) {
1042 printk(KERN_DEBUG "%s: failed to restore fragmentation "
1043 "threshold (%d) after Port0 enable\n",
1044 dev->name, local->fragm_threshold);
1045 }
1046
1047 return res;
1048}
1049
1050
1051static int prism2_get_version_info(struct net_device *dev, u16 rid,
1052 const char *txt)
1053{
1054 struct hfa384x_comp_ident comp;
1055 struct hostap_interface *iface;
1056 local_info_t *local;
1057
1058 iface = netdev_priv(dev);
1059 local = iface->local;
1060
1061 if (local->no_pri) {
1062 /* PRI f/w not yet available - cannot read RIDs */
1063 return -1;
1064 }
1065 if (hfa384x_get_rid(dev, rid, &comp, sizeof(comp), 1) < 0) {
1066 printk(KERN_DEBUG "Could not get RID for component %s\n", txt);
1067 return -1;
1068 }
1069
1070 printk(KERN_INFO "%s: %s: id=0x%02x v%d.%d.%d\n", dev->name, txt,
1071 __le16_to_cpu(comp.id), __le16_to_cpu(comp.major),
1072 __le16_to_cpu(comp.minor), __le16_to_cpu(comp.variant));
1073 return 0;
1074}
1075
1076
1077static int prism2_setup_rids(struct net_device *dev)
1078{
1079 struct hostap_interface *iface;
1080 local_info_t *local;
1081 u16 tmp;
1082 int ret = 0;
1083
1084 iface = netdev_priv(dev);
1085 local = iface->local;
1086
1087 hostap_set_word(dev, HFA384X_RID_TICKTIME, 2000);
1088
1089 if (!local->fw_ap) {
1090 tmp = hostap_get_porttype(local);
1091 ret = hostap_set_word(dev, HFA384X_RID_CNFPORTTYPE, tmp);
1092 if (ret) {
1093 printk("%s: Port type setting to %d failed\n",
1094 dev->name, tmp);
1095 goto fail;
1096 }
1097 }
1098
1099 /* Setting SSID to empty string seems to kill the card in Host AP mode
1100 */
1101 if (local->iw_mode != IW_MODE_MASTER || local->essid[0] != '\0') {
1102 ret = hostap_set_string(dev, HFA384X_RID_CNFOWNSSID,
1103 local->essid);
1104 if (ret) {
1105 printk("%s: AP own SSID setting failed\n", dev->name);
1106 goto fail;
1107 }
1108 }
1109
1110 ret = hostap_set_word(dev, HFA384X_RID_CNFMAXDATALEN,
1111 PRISM2_DATA_MAXLEN);
1112 if (ret) {
1113 printk("%s: MAC data length setting to %d failed\n",
1114 dev->name, PRISM2_DATA_MAXLEN);
1115 goto fail;
1116 }
1117
1118 if (hfa384x_get_rid(dev, HFA384X_RID_CHANNELLIST, &tmp, 2, 1) < 0) {
1119 printk("%s: Channel list read failed\n", dev->name);
1120 ret = -EINVAL;
1121 goto fail;
1122 }
1123 local->channel_mask = __le16_to_cpu(tmp);
1124
1125 if (local->channel < 1 || local->channel > 14 ||
1126 !(local->channel_mask & (1 << (local->channel - 1)))) {
1127 printk(KERN_WARNING "%s: Channel setting out of range "
1128 "(%d)!\n", dev->name, local->channel);
1129 ret = -EBUSY;
1130 goto fail;
1131 }
1132
1133 ret = hostap_set_word(dev, HFA384X_RID_CNFOWNCHANNEL, local->channel);
1134 if (ret) {
1135 printk("%s: Channel setting to %d failed\n",
1136 dev->name, local->channel);
1137 goto fail;
1138 }
1139
1140 ret = hostap_set_word(dev, HFA384X_RID_CNFBEACONINT,
1141 local->beacon_int);
1142 if (ret) {
1143 printk("%s: Beacon interval setting to %d failed\n",
1144 dev->name, local->beacon_int);
1145 /* this may fail with Symbol/Lucent firmware */
1146 if (ret == -ETIMEDOUT)
1147 goto fail;
1148 }
1149
1150 ret = hostap_set_word(dev, HFA384X_RID_CNFOWNDTIMPERIOD,
1151 local->dtim_period);
1152 if (ret) {
1153 printk("%s: DTIM period setting to %d failed\n",
1154 dev->name, local->dtim_period);
1155 /* this may fail with Symbol/Lucent firmware */
1156 if (ret == -ETIMEDOUT)
1157 goto fail;
1158 }
1159
1160 ret = hostap_set_word(dev, HFA384X_RID_PROMISCUOUSMODE,
1161 local->is_promisc);
1162 if (ret)
1163 printk(KERN_INFO "%s: Setting promiscuous mode (%d) failed\n",
1164 dev->name, local->is_promisc);
1165
1166 if (!local->fw_ap) {
1167 ret = hostap_set_string(dev, HFA384X_RID_CNFDESIREDSSID,
1168 local->essid);
1169 if (ret) {
1170 printk("%s: Desired SSID setting failed\n", dev->name);
1171 goto fail;
1172 }
1173 }
1174
1175 /* Setup TXRateControl, defaults to allow use of 1, 2, 5.5, and
1176 * 11 Mbps in automatic TX rate fallback and 1 and 2 Mbps as basic
1177 * rates */
1178 if (local->tx_rate_control == 0) {
1179 local->tx_rate_control =
1180 HFA384X_RATES_1MBPS |
1181 HFA384X_RATES_2MBPS |
1182 HFA384X_RATES_5MBPS |
1183 HFA384X_RATES_11MBPS;
1184 }
1185 if (local->basic_rates == 0)
1186 local->basic_rates = HFA384X_RATES_1MBPS | HFA384X_RATES_2MBPS;
1187
1188 if (!local->fw_ap) {
1189 ret = hostap_set_word(dev, HFA384X_RID_TXRATECONTROL,
1190 local->tx_rate_control);
1191 if (ret) {
1192 printk("%s: TXRateControl setting to %d failed\n",
1193 dev->name, local->tx_rate_control);
1194 goto fail;
1195 }
1196
1197 ret = hostap_set_word(dev, HFA384X_RID_CNFSUPPORTEDRATES,
1198 local->tx_rate_control);
1199 if (ret) {
1200 printk("%s: cnfSupportedRates setting to %d failed\n",
1201 dev->name, local->tx_rate_control);
1202 }
1203
1204 ret = hostap_set_word(dev, HFA384X_RID_CNFBASICRATES,
1205 local->basic_rates);
1206 if (ret) {
1207 printk("%s: cnfBasicRates setting to %d failed\n",
1208 dev->name, local->basic_rates);
1209 }
1210
1211 ret = hostap_set_word(dev, HFA384X_RID_CREATEIBSS, 1);
1212 if (ret) {
1213 printk("%s: Create IBSS setting to 1 failed\n",
1214 dev->name);
1215 }
1216 }
1217
1218 if (local->name_set)
1219 (void) hostap_set_string(dev, HFA384X_RID_CNFOWNNAME,
1220 local->name);
1221
1222 if (hostap_set_encryption(local)) {
1223 printk(KERN_INFO "%s: could not configure encryption\n",
1224 dev->name);
1225 }
1226
1227 (void) hostap_set_antsel(local);
1228
1229 if (hostap_set_roaming(local)) {
1230 printk(KERN_INFO "%s: could not set host roaming\n",
1231 dev->name);
1232 }
1233
1234 if (local->sta_fw_ver >= PRISM2_FW_VER(1,6,3) &&
1235 hostap_set_word(dev, HFA384X_RID_CNFENHSECURITY, local->enh_sec))
1236 printk(KERN_INFO "%s: cnfEnhSecurity setting to 0x%x failed\n",
1237 dev->name, local->enh_sec);
1238
1239 /* 32-bit tallies were added in STA f/w 0.8.0, but they were apparently
1240 * not working correctly (last seven counters report bogus values).
1241 * This has been fixed in 0.8.2, so enable 32-bit tallies only
1242 * beginning with that firmware version. Another bug fix for 32-bit
1243 * tallies in 1.4.0; should 16-bit tallies be used for some other
1244 * versions, too? */
1245 if (local->sta_fw_ver >= PRISM2_FW_VER(0,8,2)) {
1246 if (hostap_set_word(dev, HFA384X_RID_CNFTHIRTY2TALLY, 1)) {
1247 printk(KERN_INFO "%s: cnfThirty2Tally setting "
1248 "failed\n", dev->name);
1249 local->tallies32 = 0;
1250 } else
1251 local->tallies32 = 1;
1252 } else
1253 local->tallies32 = 0;
1254
1255 hostap_set_auth_algs(local);
1256
1257 if (hostap_set_word(dev, HFA384X_RID_FRAGMENTATIONTHRESHOLD,
1258 local->fragm_threshold)) {
1259 printk(KERN_INFO "%s: setting FragmentationThreshold to %d "
1260 "failed\n", dev->name, local->fragm_threshold);
1261 }
1262
1263 if (hostap_set_word(dev, HFA384X_RID_RTSTHRESHOLD,
1264 local->rts_threshold)) {
1265 printk(KERN_INFO "%s: setting RTSThreshold to %d failed\n",
1266 dev->name, local->rts_threshold);
1267 }
1268
1269 if (local->manual_retry_count >= 0 &&
1270 hostap_set_word(dev, HFA384X_RID_CNFALTRETRYCOUNT,
1271 local->manual_retry_count)) {
1272 printk(KERN_INFO "%s: setting cnfAltRetryCount to %d failed\n",
1273 dev->name, local->manual_retry_count);
1274 }
1275
1276 if (local->sta_fw_ver >= PRISM2_FW_VER(1,3,1) &&
1277 hfa384x_get_rid(dev, HFA384X_RID_CNFDBMADJUST, &tmp, 2, 1) == 2) {
1278 local->rssi_to_dBm = le16_to_cpu(tmp);
1279 }
1280
1281 if (local->sta_fw_ver >= PRISM2_FW_VER(1,7,0) && local->wpa &&
1282 hostap_set_word(dev, HFA384X_RID_SSNHANDLINGMODE, 1)) {
1283 printk(KERN_INFO "%s: setting ssnHandlingMode to 1 failed\n",
1284 dev->name);
1285 }
1286
1287 if (local->sta_fw_ver >= PRISM2_FW_VER(1,7,0) && local->generic_elem &&
1288 hfa384x_set_rid(dev, HFA384X_RID_GENERICELEMENT,
1289 local->generic_elem, local->generic_elem_len)) {
1290 printk(KERN_INFO "%s: setting genericElement failed\n",
1291 dev->name);
1292 }
1293
1294 fail:
1295 return ret;
1296}
1297
1298
1299static int prism2_hw_init(struct net_device *dev, int initial)
1300{
1301 struct hostap_interface *iface;
1302 local_info_t *local;
1303 int ret, first = 1;
1304 unsigned long start, delay;
1305
1306 PDEBUG(DEBUG_FLOW, "prism2_hw_init()\n");
1307
1308 iface = netdev_priv(dev);
1309 local = iface->local;
1310
1311 clear_bit(HOSTAP_BITS_TRANSMIT, &local->bits);
1312
1313 init:
1314 /* initialize HFA 384x */
1315 ret = hfa384x_cmd_no_wait(dev, HFA384X_CMDCODE_INIT, 0);
1316 if (ret) {
1317 printk(KERN_INFO "%s: first command failed - assuming card "
1318 "does not have primary firmware\n", dev_info);
1319 }
1320
1321 if (first && (HFA384X_INW(HFA384X_EVSTAT_OFF) & HFA384X_EV_CMD)) {
1322 /* EvStat has Cmd bit set in some cases, so retry once if no
1323 * wait was needed */
1324 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_EVACK_OFF);
1325 printk(KERN_DEBUG "%s: init command completed too quickly - "
1326 "retrying\n", dev->name);
1327 first = 0;
1328 goto init;
1329 }
1330
1331 start = jiffies;
1332 delay = jiffies + HFA384X_INIT_TIMEOUT;
1333 while (!(HFA384X_INW(HFA384X_EVSTAT_OFF) & HFA384X_EV_CMD) &&
1334 time_before(jiffies, delay))
1335 yield();
1336 if (!(HFA384X_INW(HFA384X_EVSTAT_OFF) & HFA384X_EV_CMD)) {
1337 printk(KERN_DEBUG "%s: assuming no Primary image in "
1338 "flash - card initialization not completed\n",
1339 dev_info);
1340 local->no_pri = 1;
1341#ifdef PRISM2_DOWNLOAD_SUPPORT
1342 if (local->sram_type == -1)
1343 local->sram_type = prism2_get_ram_size(local);
1344#endif /* PRISM2_DOWNLOAD_SUPPORT */
1345 return 1;
1346 }
1347 local->no_pri = 0;
1348 printk(KERN_DEBUG "prism2_hw_init: initialized in %lu ms\n",
1349 (jiffies - start) * 1000 / HZ);
1350 HFA384X_OUTW(HFA384X_EV_CMD, HFA384X_EVACK_OFF);
1351 return 0;
1352}
1353
1354
1355static int prism2_hw_init2(struct net_device *dev, int initial)
1356{
1357 struct hostap_interface *iface;
1358 local_info_t *local;
1359 int i;
1360
1361 iface = netdev_priv(dev);
1362 local = iface->local;
1363
1364#ifdef PRISM2_DOWNLOAD_SUPPORT
1365 kfree(local->pda);
1366 if (local->no_pri)
1367 local->pda = NULL;
1368 else
1369 local->pda = prism2_read_pda(dev);
1370#endif /* PRISM2_DOWNLOAD_SUPPORT */
1371
1372 hfa384x_disable_interrupts(dev);
1373
1374#ifndef final_version
1375 HFA384X_OUTW(HFA384X_MAGIC, HFA384X_SWSUPPORT0_OFF);
1376 if (HFA384X_INW(HFA384X_SWSUPPORT0_OFF) != HFA384X_MAGIC) {
1377 printk("SWSUPPORT0 write/read failed: %04X != %04X\n",
1378 HFA384X_INW(HFA384X_SWSUPPORT0_OFF), HFA384X_MAGIC);
1379 goto failed;
1380 }
1381#endif
1382
1383 if (initial || local->pri_only) {
1384 hfa384x_events_only_cmd(dev);
1385 /* get card version information */
1386 if (prism2_get_version_info(dev, HFA384X_RID_NICID, "NIC") ||
1387 prism2_get_version_info(dev, HFA384X_RID_PRIID, "PRI")) {
1388 hfa384x_disable_interrupts(dev);
1389 goto failed;
1390 }
1391
1392 if (prism2_get_version_info(dev, HFA384X_RID_STAID, "STA")) {
1393 printk(KERN_DEBUG "%s: Failed to read STA f/w version "
1394 "- only Primary f/w present\n", dev->name);
1395 local->pri_only = 1;
1396 return 0;
1397 }
1398 local->pri_only = 0;
1399 hfa384x_disable_interrupts(dev);
1400 }
1401
1402 /* FIX: could convert allocate_fid to use sleeping CmdCompl wait and
1403 * enable interrupts before this. This would also require some sort of
1404 * sleeping AllocEv waiting */
1405
1406 /* allocate TX FIDs */
1407 local->txfid_len = PRISM2_TXFID_LEN;
1408 for (i = 0; i < PRISM2_TXFID_COUNT; i++) {
1409 local->txfid[i] = hfa384x_allocate_fid(dev, local->txfid_len);
1410 if (local->txfid[i] == 0xffff && local->txfid_len > 1600) {
1411 local->txfid[i] = hfa384x_allocate_fid(dev, 1600);
1412 if (local->txfid[i] != 0xffff) {
1413 printk(KERN_DEBUG "%s: Using shorter TX FID "
1414 "(1600 bytes)\n", dev->name);
1415 local->txfid_len = 1600;
1416 }
1417 }
1418 if (local->txfid[i] == 0xffff)
1419 goto failed;
1420 local->intransmitfid[i] = PRISM2_TXFID_EMPTY;
1421 }
1422
1423 hfa384x_events_only_cmd(dev);
1424
1425 if (initial) {
1426 struct list_head *ptr;
1427 prism2_check_sta_fw_version(local);
1428
1429 if (hfa384x_get_rid(dev, HFA384X_RID_CNFOWNMACADDR,
1430 &dev->dev_addr, 6, 1) < 0) {
1431 printk("%s: could not get own MAC address\n",
1432 dev->name);
1433 }
1434 list_for_each(ptr, &local->hostap_interfaces) {
1435 iface = list_entry(ptr, struct hostap_interface, list);
1436 memcpy(iface->dev->dev_addr, dev->dev_addr, ETH_ALEN);
1437 }
1438 } else if (local->fw_ap)
1439 prism2_check_sta_fw_version(local);
1440
1441 prism2_setup_rids(dev);
1442
1443 /* MAC is now configured, but port 0 is not yet enabled */
1444 return 0;
1445
1446 failed:
1447 if (!local->no_pri)
1448 printk(KERN_WARNING "%s: Initialization failed\n", dev_info);
1449 return 1;
1450}
1451
1452
1453static int prism2_hw_enable(struct net_device *dev, int initial)
1454{
1455 struct hostap_interface *iface;
1456 local_info_t *local;
1457 int was_resetting;
1458
1459 iface = netdev_priv(dev);
1460 local = iface->local;
1461 was_resetting = local->hw_resetting;
1462
1463 if (hfa384x_cmd(dev, HFA384X_CMDCODE_ENABLE, 0, NULL, NULL)) {
1464 printk("%s: MAC port 0 enabling failed\n", dev->name);
1465 return 1;
1466 }
1467
1468 local->hw_ready = 1;
1469 local->hw_reset_tries = 0;
1470 local->hw_resetting = 0;
1471 hfa384x_enable_interrupts(dev);
1472
1473 /* at least D-Link DWL-650 seems to require additional port reset
1474 * before it starts acting as an AP, so reset port automatically
1475 * here just in case */
1476 if (initial && prism2_reset_port(dev)) {
1477 printk("%s: MAC port 0 reseting failed\n", dev->name);
1478 return 1;
1479 }
1480
1481 if (was_resetting && netif_queue_stopped(dev)) {
1482 /* If hw_reset() was called during pending transmit, netif
1483 * queue was stopped. Wake it up now since the wlan card has
1484 * been resetted. */
1485 netif_wake_queue(dev);
1486 }
1487
1488 return 0;
1489}
1490
1491
1492static int prism2_hw_config(struct net_device *dev, int initial)
1493{
1494 struct hostap_interface *iface;
1495 local_info_t *local;
1496
1497 iface = netdev_priv(dev);
1498 local = iface->local;
1499
1500 if (local->hw_downloading)
1501 return 1;
1502
1503 if (prism2_hw_init(dev, initial)) {
1504 return local->no_pri ? 0 : 1;
1505 }
1506
1507 if (prism2_hw_init2(dev, initial))
1508 return 1;
1509
1510 /* Enable firmware if secondary image is loaded and at least one of the
1511 * netdevices is up. */
1512 if (!local->pri_only &&
1513 (initial == 0 || (initial == 2 && local->num_dev_open > 0))) {
1514 if (!local->dev_enabled)
1515 prism2_callback(local, PRISM2_CALLBACK_ENABLE);
1516 local->dev_enabled = 1;
1517 return prism2_hw_enable(dev, initial);
1518 }
1519
1520 return 0;
1521}
1522
1523
1524static void prism2_hw_shutdown(struct net_device *dev, int no_disable)
1525{
1526 struct hostap_interface *iface;
1527 local_info_t *local;
1528
1529 iface = netdev_priv(dev);
1530 local = iface->local;
1531
1532 /* Allow only command completion events during disable */
1533 hfa384x_events_only_cmd(dev);
1534
1535 local->hw_ready = 0;
1536 if (local->dev_enabled)
1537 prism2_callback(local, PRISM2_CALLBACK_DISABLE);
1538 local->dev_enabled = 0;
1539
1540 if (local->func->card_present && !local->func->card_present(local)) {
1541 printk(KERN_DEBUG "%s: card already removed or not configured "
1542 "during shutdown\n", dev->name);
1543 return;
1544 }
1545
1546 if ((no_disable & HOSTAP_HW_NO_DISABLE) == 0 &&
1547 hfa384x_cmd(dev, HFA384X_CMDCODE_DISABLE, 0, NULL, NULL))
1548 printk(KERN_WARNING "%s: Shutdown failed\n", dev_info);
1549
1550 hfa384x_disable_interrupts(dev);
1551
1552 if (no_disable & HOSTAP_HW_ENABLE_CMDCOMPL)
1553 hfa384x_events_only_cmd(dev);
1554 else
1555 prism2_clear_cmd_queue(local);
1556}
1557
1558
1559static void prism2_hw_reset(struct net_device *dev)
1560{
1561 struct hostap_interface *iface;
1562 local_info_t *local;
1563
1564#if 0
1565 static long last_reset = 0;
1566
1567 /* do not reset card more than once per second to avoid ending up in a
1568 * busy loop reseting the card */
1569 if (time_before_eq(jiffies, last_reset + HZ))
1570 return;
1571 last_reset = jiffies;
1572#endif
1573
1574 iface = netdev_priv(dev);
1575 local = iface->local;
1576
1577 if (in_interrupt()) {
1578 printk(KERN_DEBUG "%s: driver bug - prism2_hw_reset() called "
1579 "in interrupt context\n", dev->name);
1580 return;
1581 }
1582
1583 if (local->hw_downloading)
1584 return;
1585
1586 if (local->hw_resetting) {
1587 printk(KERN_WARNING "%s: %s: already resetting card - "
1588 "ignoring reset request\n", dev_info, dev->name);
1589 return;
1590 }
1591
1592 local->hw_reset_tries++;
1593 if (local->hw_reset_tries > 10) {
1594 printk(KERN_WARNING "%s: too many reset tries, skipping\n",
1595 dev->name);
1596 return;
1597 }
1598
1599 printk(KERN_WARNING "%s: %s: resetting card\n", dev_info, dev->name);
1600 hfa384x_disable_interrupts(dev);
1601 local->hw_resetting = 1;
1602 if (local->func->cor_sreset) {
1603 /* Host system seems to hang in some cases with high traffic
1604 * load or shared interrupts during COR sreset. Disable shared
1605 * interrupts during reset to avoid these crashes. COS sreset
1606 * takes quite a long time, so it is unfortunate that this
1607 * seems to be needed. Anyway, I do not know of any better way
1608 * of avoiding the crash. */
1609 disable_irq(dev->irq);
1610 local->func->cor_sreset(local);
1611 enable_irq(dev->irq);
1612 }
1613 prism2_hw_shutdown(dev, 1);
1614 prism2_hw_config(dev, 0);
1615 local->hw_resetting = 0;
1616
1617#ifdef PRISM2_DOWNLOAD_SUPPORT
1618 if (local->dl_pri) {
1619 printk(KERN_DEBUG "%s: persistent download of primary "
1620 "firmware\n", dev->name);
1621 if (prism2_download_genesis(local, local->dl_pri) < 0)
1622 printk(KERN_WARNING "%s: download (PRI) failed\n",
1623 dev->name);
1624 }
1625
1626 if (local->dl_sec) {
1627 printk(KERN_DEBUG "%s: persistent download of secondary "
1628 "firmware\n", dev->name);
1629 if (prism2_download_volatile(local, local->dl_sec) < 0)
1630 printk(KERN_WARNING "%s: download (SEC) failed\n",
1631 dev->name);
1632 }
1633#endif /* PRISM2_DOWNLOAD_SUPPORT */
1634
1635 /* TODO: restore beacon TIM bits for STAs that have buffered frames */
1636}
1637
1638
1639static void prism2_schedule_reset(local_info_t *local)
1640{
1641 schedule_work(&local->reset_queue);
1642}
1643
1644
1645/* Called only as scheduled task after noticing card timeout in interrupt
1646 * context */
1647static void handle_reset_queue(void *data)
1648{
1649 local_info_t *local = (local_info_t *) data;
1650
1651 printk(KERN_DEBUG "%s: scheduled card reset\n", local->dev->name);
1652 prism2_hw_reset(local->dev);
1653
1654 if (netif_queue_stopped(local->dev)) {
1655 int i;
1656
1657 for (i = 0; i < PRISM2_TXFID_COUNT; i++)
1658 if (local->intransmitfid[i] == PRISM2_TXFID_EMPTY) {
1659 PDEBUG(DEBUG_EXTRA, "prism2_tx_timeout: "
1660 "wake up queue\n");
1661 netif_wake_queue(local->dev);
1662 break;
1663 }
1664 }
1665}
1666
1667
1668static int prism2_get_txfid_idx(local_info_t *local)
1669{
1670 int idx, end;
1671 unsigned long flags;
1672
1673 spin_lock_irqsave(&local->txfidlock, flags);
1674 end = idx = local->next_txfid;
1675 do {
1676 if (local->intransmitfid[idx] == PRISM2_TXFID_EMPTY) {
1677 local->intransmitfid[idx] = PRISM2_TXFID_RESERVED;
1678 spin_unlock_irqrestore(&local->txfidlock, flags);
1679 return idx;
1680 }
1681 idx++;
1682 if (idx >= PRISM2_TXFID_COUNT)
1683 idx = 0;
1684 } while (idx != end);
1685 spin_unlock_irqrestore(&local->txfidlock, flags);
1686
1687 PDEBUG(DEBUG_EXTRA2, "prism2_get_txfid_idx: no room in txfid buf: "
1688 "packet dropped\n");
1689 local->stats.tx_dropped++;
1690
1691 return -1;
1692}
1693
1694
1695/* Called only from hardware IRQ */
1696static void prism2_transmit_cb(struct net_device *dev, long context,
1697 u16 resp0, u16 res)
1698{
1699 struct hostap_interface *iface;
1700 local_info_t *local;
1701 int idx = (int) context;
1702
1703 iface = netdev_priv(dev);
1704 local = iface->local;
1705
1706 if (res) {
1707 printk(KERN_DEBUG "%s: prism2_transmit_cb - res=0x%02x\n",
1708 dev->name, res);
1709 return;
1710 }
1711
1712 if (idx < 0 || idx >= PRISM2_TXFID_COUNT) {
1713 printk(KERN_DEBUG "%s: prism2_transmit_cb called with invalid "
1714 "idx=%d\n", dev->name, idx);
1715 return;
1716 }
1717
1718 if (!test_and_clear_bit(HOSTAP_BITS_TRANSMIT, &local->bits)) {
1719 printk(KERN_DEBUG "%s: driver bug: prism2_transmit_cb called "
1720 "with no pending transmit\n", dev->name);
1721 }
1722
1723 if (netif_queue_stopped(dev)) {
1724 /* ready for next TX, so wake up queue that was stopped in
1725 * prism2_transmit() */
1726 netif_wake_queue(dev);
1727 }
1728
1729 spin_lock(&local->txfidlock);
1730
1731 /* With reclaim, Resp0 contains new txfid for transmit; the old txfid
1732 * will be automatically allocated for the next TX frame */
1733 local->intransmitfid[idx] = resp0;
1734
1735 PDEBUG(DEBUG_FID, "%s: prism2_transmit_cb: txfid[%d]=0x%04x, "
1736 "resp0=0x%04x, transmit_txfid=0x%04x\n",
1737 dev->name, idx, local->txfid[idx],
1738 resp0, local->intransmitfid[local->next_txfid]);
1739
1740 idx++;
1741 if (idx >= PRISM2_TXFID_COUNT)
1742 idx = 0;
1743 local->next_txfid = idx;
1744
1745 /* check if all TX buffers are occupied */
1746 do {
1747 if (local->intransmitfid[idx] == PRISM2_TXFID_EMPTY) {
1748 spin_unlock(&local->txfidlock);
1749 return;
1750 }
1751 idx++;
1752 if (idx >= PRISM2_TXFID_COUNT)
1753 idx = 0;
1754 } while (idx != local->next_txfid);
1755 spin_unlock(&local->txfidlock);
1756
1757 /* no empty TX buffers, stop queue */
1758 netif_stop_queue(dev);
1759}
1760
1761
1762/* Called only from software IRQ if PCI bus master is not used (with bus master
1763 * this can be called both from software and hardware IRQ) */
1764static int prism2_transmit(struct net_device *dev, int idx)
1765{
1766 struct hostap_interface *iface;
1767 local_info_t *local;
1768 int res;
1769
1770 iface = netdev_priv(dev);
1771 local = iface->local;
1772
1773 /* The driver tries to stop netif queue so that there would not be
1774 * more than one attempt to transmit frames going on; check that this
1775 * is really the case */
1776
1777 if (test_and_set_bit(HOSTAP_BITS_TRANSMIT, &local->bits)) {
1778 printk(KERN_DEBUG "%s: driver bug - prism2_transmit() called "
1779 "when previous TX was pending\n", dev->name);
1780 return -1;
1781 }
1782
1783 /* stop the queue for the time that transmit is pending */
1784 netif_stop_queue(dev);
1785
1786 /* transmit packet */
1787 res = hfa384x_cmd_callback(
1788 dev,
1789 HFA384X_CMDCODE_TRANSMIT | HFA384X_CMD_TX_RECLAIM,
1790 local->txfid[idx],
1791 prism2_transmit_cb, (long) idx);
1792
1793 if (res) {
1794 struct net_device_stats *stats;
1795 printk(KERN_DEBUG "%s: prism2_transmit: CMDCODE_TRANSMIT "
1796 "failed (res=%d)\n", dev->name, res);
1797 stats = hostap_get_stats(dev);
1798 stats->tx_dropped++;
1799 netif_wake_queue(dev);
1800 return -1;
1801 }
1802 dev->trans_start = jiffies;
1803
1804 /* Since we did not wait for command completion, the card continues
1805 * to process on the background and we will finish handling when
1806 * command completion event is handled (prism2_cmd_ev() function) */
1807
1808 return 0;
1809}
1810
1811
1812/* Send IEEE 802.11 frame (convert the header into Prism2 TX descriptor and
1813 * send the payload with this descriptor) */
1814/* Called only from software IRQ */
1815static int prism2_tx_80211(struct sk_buff *skb, struct net_device *dev)
1816{
1817 struct hostap_interface *iface;
1818 local_info_t *local;
1819 struct hfa384x_tx_frame txdesc;
1820 struct hostap_skb_tx_data *meta;
1821 int hdr_len, data_len, idx, res, ret = -1;
1822 u16 tx_control, fc;
1823
1824 iface = netdev_priv(dev);
1825 local = iface->local;
1826
1827 meta = (struct hostap_skb_tx_data *) skb->cb;
1828
1829 prism2_callback(local, PRISM2_CALLBACK_TX_START);
1830
1831 if ((local->func->card_present && !local->func->card_present(local)) ||
1832 !local->hw_ready || local->hw_downloading || local->pri_only) {
1833 if (net_ratelimit()) {
1834 printk(KERN_DEBUG "%s: prism2_tx_80211: hw not ready -"
1835 " skipping\n", dev->name);
1836 }
1837 goto fail;
1838 }
1839
1840 memset(&txdesc, 0, sizeof(txdesc));
1841
1842 /* skb->data starts with txdesc->frame_control */
1843 hdr_len = 24;
1844 memcpy(&txdesc.frame_control, skb->data, hdr_len);
1845 fc = le16_to_cpu(txdesc.frame_control);
1846 if (WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA &&
1847 (fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS) &&
1848 skb->len >= 30) {
1849 /* Addr4 */
1850 memcpy(txdesc.addr4, skb->data + hdr_len, ETH_ALEN);
1851 hdr_len += ETH_ALEN;
1852 }
1853
1854 tx_control = local->tx_control;
1855 if (meta->tx_cb_idx) {
1856 tx_control |= HFA384X_TX_CTRL_TX_OK;
1857 txdesc.sw_support = cpu_to_le16(meta->tx_cb_idx);
1858 }
1859 txdesc.tx_control = cpu_to_le16(tx_control);
1860 txdesc.tx_rate = meta->rate;
1861
1862 data_len = skb->len - hdr_len;
1863 txdesc.data_len = cpu_to_le16(data_len);
1864 txdesc.len = cpu_to_be16(data_len);
1865
1866 idx = prism2_get_txfid_idx(local);
1867 if (idx < 0)
1868 goto fail;
1869
1870 if (local->frame_dump & PRISM2_DUMP_TX_HDR)
1871 hostap_dump_tx_header(dev->name, &txdesc);
1872
1873 spin_lock(&local->baplock);
1874 res = hfa384x_setup_bap(dev, BAP0, local->txfid[idx], 0);
1875
1876 if (!res)
1877 res = hfa384x_to_bap(dev, BAP0, &txdesc, sizeof(txdesc));
1878 if (!res)
1879 res = hfa384x_to_bap(dev, BAP0, skb->data + hdr_len,
1880 skb->len - hdr_len);
1881 spin_unlock(&local->baplock);
1882
1883 if (!res)
1884 res = prism2_transmit(dev, idx);
1885 if (res) {
1886 printk(KERN_DEBUG "%s: prism2_tx_80211 - to BAP0 failed\n",
1887 dev->name);
1888 local->intransmitfid[idx] = PRISM2_TXFID_EMPTY;
1889 schedule_work(&local->reset_queue);
1890 goto fail;
1891 }
1892
1893 ret = 0;
1894
1895fail:
1896 prism2_callback(local, PRISM2_CALLBACK_TX_END);
1897 return ret;
1898}
1899
1900
1901/* Some SMP systems have reported number of odd errors with hostap_pci. fid
1902 * register has changed values between consecutive reads for an unknown reason.
1903 * This should really not happen, so more debugging is needed. This test
1904 * version is a big slower, but it will detect most of such register changes
1905 * and will try to get the correct fid eventually. */
1906#define EXTRA_FID_READ_TESTS
1907
1908static inline u16 prism2_read_fid_reg(struct net_device *dev, u16 reg)
1909{
1910#ifdef EXTRA_FID_READ_TESTS
1911 u16 val, val2, val3;
1912 int i;
1913
1914 for (i = 0; i < 10; i++) {
1915 val = HFA384X_INW(reg);
1916 val2 = HFA384X_INW(reg);
1917 val3 = HFA384X_INW(reg);
1918
1919 if (val == val2 && val == val3)
1920 return val;
1921
1922 printk(KERN_DEBUG "%s: detected fid change (try=%d, reg=%04x):"
1923 " %04x %04x %04x\n",
1924 dev->name, i, reg, val, val2, val3);
1925 if ((val == val2 || val == val3) && val != 0)
1926 return val;
1927 if (val2 == val3 && val2 != 0)
1928 return val2;
1929 }
1930 printk(KERN_WARNING "%s: Uhhuh.. could not read good fid from reg "
1931 "%04x (%04x %04x %04x)\n", dev->name, reg, val, val2, val3);
1932 return val;
1933#else /* EXTRA_FID_READ_TESTS */
1934 return HFA384X_INW(reg);
1935#endif /* EXTRA_FID_READ_TESTS */
1936}
1937
1938
1939/* Called only as a tasklet (software IRQ) */
1940static void prism2_rx(local_info_t *local)
1941{
1942 struct net_device *dev = local->dev;
1943 int res, rx_pending = 0;
1944 u16 len, hdr_len, rxfid, status, macport;
1945 struct net_device_stats *stats;
1946 struct hfa384x_rx_frame rxdesc;
1947 struct sk_buff *skb = NULL;
1948
1949 prism2_callback(local, PRISM2_CALLBACK_RX_START);
1950 stats = hostap_get_stats(dev);
1951
1952 rxfid = prism2_read_fid_reg(dev, HFA384X_RXFID_OFF);
1953#ifndef final_version
1954 if (rxfid == 0) {
1955 rxfid = HFA384X_INW(HFA384X_RXFID_OFF);
1956 printk(KERN_DEBUG "prism2_rx: rxfid=0 (next 0x%04x)\n",
1957 rxfid);
1958 if (rxfid == 0) {
1959 schedule_work(&local->reset_queue);
1960 goto rx_dropped;
1961 }
1962 /* try to continue with the new rxfid value */
1963 }
1964#endif
1965
1966 spin_lock(&local->baplock);
1967 res = hfa384x_setup_bap(dev, BAP0, rxfid, 0);
1968 if (!res)
1969 res = hfa384x_from_bap(dev, BAP0, &rxdesc, sizeof(rxdesc));
1970
1971 if (res) {
1972 spin_unlock(&local->baplock);
1973 printk(KERN_DEBUG "%s: copy from BAP0 failed %d\n", dev->name,
1974 res);
1975 if (res == -ETIMEDOUT) {
1976 schedule_work(&local->reset_queue);
1977 }
1978 goto rx_dropped;
1979 }
1980
1981 len = le16_to_cpu(rxdesc.data_len);
1982 hdr_len = sizeof(rxdesc);
1983 status = le16_to_cpu(rxdesc.status);
1984 macport = (status >> 8) & 0x07;
1985
1986 /* Drop frames with too large reported payload length. Monitor mode
1987 * seems to sometimes pass frames (e.g., ctrl::ack) with signed and
1988 * negative value, so allow also values 65522 .. 65534 (-14 .. -2) for
1989 * macport 7 */
1990 if (len > PRISM2_DATA_MAXLEN + 8 /* WEP */) {
1991 if (macport == 7 && local->iw_mode == IW_MODE_MONITOR) {
1992 if (len >= (u16) -14) {
1993 hdr_len -= 65535 - len;
1994 hdr_len--;
1995 }
1996 len = 0;
1997 } else {
1998 spin_unlock(&local->baplock);
1999 printk(KERN_DEBUG "%s: Received frame with invalid "
2000 "length 0x%04x\n", dev->name, len);
2001 hostap_dump_rx_header(dev->name, &rxdesc);
2002 goto rx_dropped;
2003 }
2004 }
2005
2006 skb = dev_alloc_skb(len + hdr_len);
2007 if (!skb) {
2008 spin_unlock(&local->baplock);
2009 printk(KERN_DEBUG "%s: RX failed to allocate skb\n",
2010 dev->name);
2011 goto rx_dropped;
2012 }
2013 skb->dev = dev;
2014 memcpy(skb_put(skb, hdr_len), &rxdesc, hdr_len);
2015
2016 if (len > 0)
2017 res = hfa384x_from_bap(dev, BAP0, skb_put(skb, len), len);
2018 spin_unlock(&local->baplock);
2019 if (res) {
2020 printk(KERN_DEBUG "%s: RX failed to read "
2021 "frame data\n", dev->name);
2022 goto rx_dropped;
2023 }
2024
2025 skb_queue_tail(&local->rx_list, skb);
2026 tasklet_schedule(&local->rx_tasklet);
2027
2028 rx_exit:
2029 prism2_callback(local, PRISM2_CALLBACK_RX_END);
2030 if (!rx_pending) {
2031 HFA384X_OUTW(HFA384X_EV_RX, HFA384X_EVACK_OFF);
2032 }
2033
2034 return;
2035
2036 rx_dropped:
2037 stats->rx_dropped++;
2038 if (skb)
2039 dev_kfree_skb(skb);
2040 goto rx_exit;
2041}
2042
2043
2044/* Called only as a tasklet (software IRQ) */
2045static void hostap_rx_skb(local_info_t *local, struct sk_buff *skb)
2046{
2047 struct hfa384x_rx_frame *rxdesc;
2048 struct net_device *dev = skb->dev;
2049 struct hostap_80211_rx_status stats;
2050 int hdrlen, rx_hdrlen;
2051
2052 rx_hdrlen = sizeof(*rxdesc);
2053 if (skb->len < sizeof(*rxdesc)) {
2054 /* Allow monitor mode to receive shorter frames */
2055 if (local->iw_mode == IW_MODE_MONITOR &&
2056 skb->len >= sizeof(*rxdesc) - 30) {
2057 rx_hdrlen = skb->len;
2058 } else {
2059 dev_kfree_skb(skb);
2060 return;
2061 }
2062 }
2063
2064 rxdesc = (struct hfa384x_rx_frame *) skb->data;
2065
2066 if (local->frame_dump & PRISM2_DUMP_RX_HDR &&
2067 skb->len >= sizeof(*rxdesc))
2068 hostap_dump_rx_header(dev->name, rxdesc);
2069
2070 if (le16_to_cpu(rxdesc->status) & HFA384X_RX_STATUS_FCSERR &&
2071 (!local->monitor_allow_fcserr ||
2072 local->iw_mode != IW_MODE_MONITOR))
2073 goto drop;
2074
2075 if (skb->len > PRISM2_DATA_MAXLEN) {
2076 printk(KERN_DEBUG "%s: RX: len(%d) > MAX(%d)\n",
2077 dev->name, skb->len, PRISM2_DATA_MAXLEN);
2078 goto drop;
2079 }
2080
2081 stats.mac_time = le32_to_cpu(rxdesc->time);
2082 stats.signal = rxdesc->signal - local->rssi_to_dBm;
2083 stats.noise = rxdesc->silence - local->rssi_to_dBm;
2084 stats.rate = rxdesc->rate;
2085
2086 /* Convert Prism2 RX structure into IEEE 802.11 header */
2087 hdrlen = hostap_80211_get_hdrlen(le16_to_cpu(rxdesc->frame_control));
2088 if (hdrlen > rx_hdrlen)
2089 hdrlen = rx_hdrlen;
2090
2091 memmove(skb_pull(skb, rx_hdrlen - hdrlen),
2092 &rxdesc->frame_control, hdrlen);
2093
2094 hostap_80211_rx(dev, skb, &stats);
2095 return;
2096
2097 drop:
2098 dev_kfree_skb(skb);
2099}
2100
2101
2102/* Called only as a tasklet (software IRQ) */
2103static void hostap_rx_tasklet(unsigned long data)
2104{
2105 local_info_t *local = (local_info_t *) data;
2106 struct sk_buff *skb;
2107
2108 while ((skb = skb_dequeue(&local->rx_list)) != NULL)
2109 hostap_rx_skb(local, skb);
2110}
2111
2112
2113/* Called only from hardware IRQ */
2114static void prism2_alloc_ev(struct net_device *dev)
2115{
2116 struct hostap_interface *iface;
2117 local_info_t *local;
2118 int idx;
2119 u16 fid;
2120
2121 iface = netdev_priv(dev);
2122 local = iface->local;
2123
2124 fid = prism2_read_fid_reg(dev, HFA384X_ALLOCFID_OFF);
2125
2126 PDEBUG(DEBUG_FID, "FID: interrupt: ALLOC - fid=0x%04x\n", fid);
2127
2128 spin_lock(&local->txfidlock);
2129 idx = local->next_alloc;
2130
2131 do {
2132 if (local->txfid[idx] == fid) {
2133 PDEBUG(DEBUG_FID, "FID: found matching txfid[%d]\n",
2134 idx);
2135
2136#ifndef final_version
2137 if (local->intransmitfid[idx] == PRISM2_TXFID_EMPTY)
2138 printk("Already released txfid found at idx "
2139 "%d\n", idx);
2140 if (local->intransmitfid[idx] == PRISM2_TXFID_RESERVED)
2141 printk("Already reserved txfid found at idx "
2142 "%d\n", idx);
2143#endif
2144 local->intransmitfid[idx] = PRISM2_TXFID_EMPTY;
2145 idx++;
2146 local->next_alloc = idx >= PRISM2_TXFID_COUNT ? 0 :
2147 idx;
2148
2149 if (!test_bit(HOSTAP_BITS_TRANSMIT, &local->bits) &&
2150 netif_queue_stopped(dev))
2151 netif_wake_queue(dev);
2152
2153 spin_unlock(&local->txfidlock);
2154 return;
2155 }
2156
2157 idx++;
2158 if (idx >= PRISM2_TXFID_COUNT)
2159 idx = 0;
2160 } while (idx != local->next_alloc);
2161
2162 printk(KERN_WARNING "%s: could not find matching txfid (0x%04x, new "
2163 "read 0x%04x) for alloc event\n", dev->name, fid,
2164 HFA384X_INW(HFA384X_ALLOCFID_OFF));
2165 printk(KERN_DEBUG "TXFIDs:");
2166 for (idx = 0; idx < PRISM2_TXFID_COUNT; idx++)
2167 printk(" %04x[%04x]", local->txfid[idx],
2168 local->intransmitfid[idx]);
2169 printk("\n");
2170 spin_unlock(&local->txfidlock);
2171
2172 /* FIX: should probably schedule reset; reference to one txfid was lost
2173 * completely.. Bad things will happen if we run out of txfids
2174 * Actually, this will cause netdev watchdog to notice TX timeout and
2175 * then card reset after all txfids have been leaked. */
2176}
2177
2178
2179/* Called only as a tasklet (software IRQ) */
2180static void hostap_tx_callback(local_info_t *local,
2181 struct hfa384x_tx_frame *txdesc, int ok,
2182 char *payload)
2183{
2184 u16 sw_support, hdrlen, len;
2185 struct sk_buff *skb;
2186 struct hostap_tx_callback_info *cb;
2187
2188 /* Make sure that frame was from us. */
2189 if (memcmp(txdesc->addr2, local->dev->dev_addr, ETH_ALEN)) {
2190 printk(KERN_DEBUG "%s: TX callback - foreign frame\n",
2191 local->dev->name);
2192 return;
2193 }
2194
2195 sw_support = le16_to_cpu(txdesc->sw_support);
2196
2197 spin_lock(&local->lock);
2198 cb = local->tx_callback;
2199 while (cb != NULL && cb->idx != sw_support)
2200 cb = cb->next;
2201 spin_unlock(&local->lock);
2202
2203 if (cb == NULL) {
2204 printk(KERN_DEBUG "%s: could not find TX callback (idx %d)\n",
2205 local->dev->name, sw_support);
2206 return;
2207 }
2208
2209 hdrlen = hostap_80211_get_hdrlen(le16_to_cpu(txdesc->frame_control));
2210 len = le16_to_cpu(txdesc->data_len);
2211 skb = dev_alloc_skb(hdrlen + len);
2212 if (skb == NULL) {
2213 printk(KERN_DEBUG "%s: hostap_tx_callback failed to allocate "
2214 "skb\n", local->dev->name);
2215 return;
2216 }
2217
2218 memcpy(skb_put(skb, hdrlen), (void *) &txdesc->frame_control, hdrlen);
2219 if (payload)
2220 memcpy(skb_put(skb, len), payload, len);
2221
2222 skb->dev = local->dev;
2223 skb->mac.raw = skb->data;
2224
2225 cb->func(skb, ok, cb->data);
2226}
2227
2228
2229/* Called only as a tasklet (software IRQ) */
2230static int hostap_tx_compl_read(local_info_t *local, int error,
2231 struct hfa384x_tx_frame *txdesc,
2232 char **payload)
2233{
2234 u16 fid, len;
2235 int res, ret = 0;
2236 struct net_device *dev = local->dev;
2237
2238 fid = prism2_read_fid_reg(dev, HFA384X_TXCOMPLFID_OFF);
2239
2240 PDEBUG(DEBUG_FID, "interrupt: TX (err=%d) - fid=0x%04x\n", fid, error);
2241
2242 spin_lock(&local->baplock);
2243 res = hfa384x_setup_bap(dev, BAP0, fid, 0);
2244 if (!res)
2245 res = hfa384x_from_bap(dev, BAP0, txdesc, sizeof(*txdesc));
2246 if (res) {
2247 PDEBUG(DEBUG_EXTRA, "%s: TX (err=%d) - fid=0x%04x - could not "
2248 "read txdesc\n", dev->name, error, fid);
2249 if (res == -ETIMEDOUT) {
2250 schedule_work(&local->reset_queue);
2251 }
2252 ret = -1;
2253 goto fail;
2254 }
2255 if (txdesc->sw_support) {
2256 len = le16_to_cpu(txdesc->data_len);
2257 if (len < PRISM2_DATA_MAXLEN) {
2258 *payload = (char *) kmalloc(len, GFP_ATOMIC);
2259 if (*payload == NULL ||
2260 hfa384x_from_bap(dev, BAP0, *payload, len)) {
2261 PDEBUG(DEBUG_EXTRA, "%s: could not read TX "
2262 "frame payload\n", dev->name);
2263 kfree(*payload);
2264 *payload = NULL;
2265 ret = -1;
2266 goto fail;
2267 }
2268 }
2269 }
2270
2271 fail:
2272 spin_unlock(&local->baplock);
2273
2274 return ret;
2275}
2276
2277
2278/* Called only as a tasklet (software IRQ) */
2279static void prism2_tx_ev(local_info_t *local)
2280{
2281 struct net_device *dev = local->dev;
2282 char *payload = NULL;
2283 struct hfa384x_tx_frame txdesc;
2284
2285 if (hostap_tx_compl_read(local, 0, &txdesc, &payload))
2286 goto fail;
2287
2288 if (local->frame_dump & PRISM2_DUMP_TX_HDR) {
2289 PDEBUG(DEBUG_EXTRA, "%s: TX - status=0x%04x "
2290 "retry_count=%d tx_rate=%d seq_ctrl=%d "
2291 "duration_id=%d\n",
2292 dev->name, le16_to_cpu(txdesc.status),
2293 txdesc.retry_count, txdesc.tx_rate,
2294 le16_to_cpu(txdesc.seq_ctrl),
2295 le16_to_cpu(txdesc.duration_id));
2296 }
2297
2298 if (txdesc.sw_support)
2299 hostap_tx_callback(local, &txdesc, 1, payload);
2300 kfree(payload);
2301
2302 fail:
2303 HFA384X_OUTW(HFA384X_EV_TX, HFA384X_EVACK_OFF);
2304}
2305
2306
2307/* Called only as a tasklet (software IRQ) */
2308static void hostap_sta_tx_exc_tasklet(unsigned long data)
2309{
2310 local_info_t *local = (local_info_t *) data;
2311 struct sk_buff *skb;
2312
2313 while ((skb = skb_dequeue(&local->sta_tx_exc_list)) != NULL) {
2314 struct hfa384x_tx_frame *txdesc =
2315 (struct hfa384x_tx_frame *) skb->data;
2316
2317 if (skb->len >= sizeof(*txdesc)) {
2318 /* Convert Prism2 RX structure into IEEE 802.11 header
2319 */
2320 u16 fc = le16_to_cpu(txdesc->frame_control);
2321 int hdrlen = hostap_80211_get_hdrlen(fc);
2322 memmove(skb_pull(skb, sizeof(*txdesc) - hdrlen),
2323 &txdesc->frame_control, hdrlen);
2324
2325 hostap_handle_sta_tx_exc(local, skb);
2326 }
2327 dev_kfree_skb(skb);
2328 }
2329}
2330
2331
2332/* Called only as a tasklet (software IRQ) */
2333static void prism2_txexc(local_info_t *local)
2334{
2335 struct net_device *dev = local->dev;
2336 u16 status, fc;
2337 int show_dump, res;
2338 char *payload = NULL;
2339 struct hfa384x_tx_frame txdesc;
2340
2341 show_dump = local->frame_dump & PRISM2_DUMP_TXEXC_HDR;
2342 local->stats.tx_errors++;
2343
2344 res = hostap_tx_compl_read(local, 1, &txdesc, &payload);
2345 HFA384X_OUTW(HFA384X_EV_TXEXC, HFA384X_EVACK_OFF);
2346 if (res)
2347 return;
2348
2349 status = le16_to_cpu(txdesc.status);
2350
2351 /* We produce a TXDROP event only for retry or lifetime
2352 * exceeded, because that's the only status that really mean
2353 * that this particular node went away.
2354 * Other errors means that *we* screwed up. - Jean II */
2355 if (status & (HFA384X_TX_STATUS_RETRYERR | HFA384X_TX_STATUS_AGEDERR))
2356 {
2357 union iwreq_data wrqu;
2358
2359 /* Copy 802.11 dest address. */
2360 memcpy(wrqu.addr.sa_data, txdesc.addr1, ETH_ALEN);
2361 wrqu.addr.sa_family = ARPHRD_ETHER;
2362 wireless_send_event(dev, IWEVTXDROP, &wrqu, NULL);
2363 } else
2364 show_dump = 1;
2365
2366 if (local->iw_mode == IW_MODE_MASTER ||
2367 local->iw_mode == IW_MODE_REPEAT ||
2368 local->wds_type & HOSTAP_WDS_AP_CLIENT) {
2369 struct sk_buff *skb;
2370 skb = dev_alloc_skb(sizeof(txdesc));
2371 if (skb) {
2372 memcpy(skb_put(skb, sizeof(txdesc)), &txdesc,
2373 sizeof(txdesc));
2374 skb_queue_tail(&local->sta_tx_exc_list, skb);
2375 tasklet_schedule(&local->sta_tx_exc_tasklet);
2376 }
2377 }
2378
2379 if (txdesc.sw_support)
2380 hostap_tx_callback(local, &txdesc, 0, payload);
2381 kfree(payload);
2382
2383 if (!show_dump)
2384 return;
2385
2386 PDEBUG(DEBUG_EXTRA, "%s: TXEXC - status=0x%04x (%s%s%s%s)"
2387 " tx_control=%04x\n",
2388 dev->name, status,
2389 status & HFA384X_TX_STATUS_RETRYERR ? "[RetryErr]" : "",
2390 status & HFA384X_TX_STATUS_AGEDERR ? "[AgedErr]" : "",
2391 status & HFA384X_TX_STATUS_DISCON ? "[Discon]" : "",
2392 status & HFA384X_TX_STATUS_FORMERR ? "[FormErr]" : "",
2393 le16_to_cpu(txdesc.tx_control));
2394
2395 fc = le16_to_cpu(txdesc.frame_control);
2396 PDEBUG(DEBUG_EXTRA, " retry_count=%d tx_rate=%d fc=0x%04x "
2397 "(%s%s%s::%d%s%s)\n",
2398 txdesc.retry_count, txdesc.tx_rate, fc,
2399 WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_MGMT ? "Mgmt" : "",
2400 WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_CTL ? "Ctrl" : "",
2401 WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA ? "Data" : "",
2402 WLAN_FC_GET_STYPE(fc) >> 4,
2403 fc & IEEE80211_FCTL_TODS ? " ToDS" : "",
2404 fc & IEEE80211_FCTL_FROMDS ? " FromDS" : "");
2405 PDEBUG(DEBUG_EXTRA, " A1=" MACSTR " A2=" MACSTR " A3="
2406 MACSTR " A4=" MACSTR "\n",
2407 MAC2STR(txdesc.addr1), MAC2STR(txdesc.addr2),
2408 MAC2STR(txdesc.addr3), MAC2STR(txdesc.addr4));
2409}
2410
2411
2412/* Called only as a tasklet (software IRQ) */
2413static void hostap_info_tasklet(unsigned long data)
2414{
2415 local_info_t *local = (local_info_t *) data;
2416 struct sk_buff *skb;
2417
2418 while ((skb = skb_dequeue(&local->info_list)) != NULL) {
2419 hostap_info_process(local, skb);
2420 dev_kfree_skb(skb);
2421 }
2422}
2423
2424
2425/* Called only as a tasklet (software IRQ) */
2426static void prism2_info(local_info_t *local)
2427{
2428 struct net_device *dev = local->dev;
2429 u16 fid;
2430 int res, left;
2431 struct hfa384x_info_frame info;
2432 struct sk_buff *skb;
2433
2434 fid = HFA384X_INW(HFA384X_INFOFID_OFF);
2435
2436 spin_lock(&local->baplock);
2437 res = hfa384x_setup_bap(dev, BAP0, fid, 0);
2438 if (!res)
2439 res = hfa384x_from_bap(dev, BAP0, &info, sizeof(info));
2440 if (res) {
2441 spin_unlock(&local->baplock);
2442 printk(KERN_DEBUG "Could not get info frame (fid=0x%04x)\n",
2443 fid);
2444 if (res == -ETIMEDOUT) {
2445 schedule_work(&local->reset_queue);
2446 }
2447 goto out;
2448 }
2449
2450 le16_to_cpus(&info.len);
2451 le16_to_cpus(&info.type);
2452 left = (info.len - 1) * 2;
2453
2454 if (info.len & 0x8000 || info.len == 0 || left > 2060) {
2455 /* data register seems to give 0x8000 in some error cases even
2456 * though busy bit is not set in offset register;
2457 * in addition, length must be at least 1 due to type field */
2458 spin_unlock(&local->baplock);
2459 printk(KERN_DEBUG "%s: Received info frame with invalid "
2460 "length 0x%04x (type 0x%04x)\n", dev->name, info.len,
2461 info.type);
2462 goto out;
2463 }
2464
2465 skb = dev_alloc_skb(sizeof(info) + left);
2466 if (skb == NULL) {
2467 spin_unlock(&local->baplock);
2468 printk(KERN_DEBUG "%s: Could not allocate skb for info "
2469 "frame\n", dev->name);
2470 goto out;
2471 }
2472
2473 memcpy(skb_put(skb, sizeof(info)), &info, sizeof(info));
2474 if (left > 0 && hfa384x_from_bap(dev, BAP0, skb_put(skb, left), left))
2475 {
2476 spin_unlock(&local->baplock);
2477 printk(KERN_WARNING "%s: Info frame read failed (fid=0x%04x, "
2478 "len=0x%04x, type=0x%04x\n",
2479 dev->name, fid, info.len, info.type);
2480 dev_kfree_skb(skb);
2481 goto out;
2482 }
2483 spin_unlock(&local->baplock);
2484
2485 skb_queue_tail(&local->info_list, skb);
2486 tasklet_schedule(&local->info_tasklet);
2487
2488 out:
2489 HFA384X_OUTW(HFA384X_EV_INFO, HFA384X_EVACK_OFF);
2490}
2491
2492
2493/* Called only as a tasklet (software IRQ) */
2494static void hostap_bap_tasklet(unsigned long data)
2495{
2496 local_info_t *local = (local_info_t *) data;
2497 struct net_device *dev = local->dev;
2498 u16 ev;
2499 int frames = 30;
2500
2501 if (local->func->card_present && !local->func->card_present(local))
2502 return;
2503
2504 set_bit(HOSTAP_BITS_BAP_TASKLET, &local->bits);
2505
2506 /* Process all pending BAP events without generating new interrupts
2507 * for them */
2508 while (frames-- > 0) {
2509 ev = HFA384X_INW(HFA384X_EVSTAT_OFF);
2510 if (ev == 0xffff || !(ev & HFA384X_BAP0_EVENTS))
2511 break;
2512 if (ev & HFA384X_EV_RX)
2513 prism2_rx(local);
2514 if (ev & HFA384X_EV_INFO)
2515 prism2_info(local);
2516 if (ev & HFA384X_EV_TX)
2517 prism2_tx_ev(local);
2518 if (ev & HFA384X_EV_TXEXC)
2519 prism2_txexc(local);
2520 }
2521
2522 set_bit(HOSTAP_BITS_BAP_TASKLET2, &local->bits);
2523 clear_bit(HOSTAP_BITS_BAP_TASKLET, &local->bits);
2524
2525 /* Enable interrupts for new BAP events */
2526 hfa384x_events_all(dev);
2527 clear_bit(HOSTAP_BITS_BAP_TASKLET2, &local->bits);
2528}
2529
2530
2531/* Called only from hardware IRQ */
2532static void prism2_infdrop(struct net_device *dev)
2533{
2534 static unsigned long last_inquire = 0;
2535
2536 PDEBUG(DEBUG_EXTRA, "%s: INFDROP event\n", dev->name);
2537
2538 /* some firmware versions seem to get stuck with
2539 * full CommTallies in high traffic load cases; every
2540 * packet will then cause INFDROP event and CommTallies
2541 * info frame will not be sent automatically. Try to
2542 * get out of this state by inquiring CommTallies. */
2543 if (!last_inquire || time_after(jiffies, last_inquire + HZ)) {
2544 hfa384x_cmd_callback(dev, HFA384X_CMDCODE_INQUIRE,
2545 HFA384X_INFO_COMMTALLIES, NULL, 0);
2546 last_inquire = jiffies;
2547 }
2548}
2549
2550
2551/* Called only from hardware IRQ */
2552static void prism2_ev_tick(struct net_device *dev)
2553{
2554 struct hostap_interface *iface;
2555 local_info_t *local;
2556 u16 evstat, inten;
2557 static int prev_stuck = 0;
2558
2559 iface = netdev_priv(dev);
2560 local = iface->local;
2561
2562 if (time_after(jiffies, local->last_tick_timer + 5 * HZ) &&
2563 local->last_tick_timer) {
2564 evstat = HFA384X_INW(HFA384X_EVSTAT_OFF);
2565 inten = HFA384X_INW(HFA384X_INTEN_OFF);
2566 if (!prev_stuck) {
2567 printk(KERN_INFO "%s: SW TICK stuck? "
2568 "bits=0x%lx EvStat=%04x IntEn=%04x\n",
2569 dev->name, local->bits, evstat, inten);
2570 }
2571 local->sw_tick_stuck++;
2572 if ((evstat & HFA384X_BAP0_EVENTS) &&
2573 (inten & HFA384X_BAP0_EVENTS)) {
2574 printk(KERN_INFO "%s: trying to recover from IRQ "
2575 "hang\n", dev->name);
2576 hfa384x_events_no_bap0(dev);
2577 }
2578 prev_stuck = 1;
2579 } else
2580 prev_stuck = 0;
2581}
2582
2583
2584/* Called only from hardware IRQ */
2585static inline void prism2_check_magic(local_info_t *local)
2586{
2587 /* at least PCI Prism2.5 with bus mastering seems to sometimes
2588 * return 0x0000 in SWSUPPORT0 for unknown reason, but re-reading the
2589 * register once or twice seems to get the correct value.. PCI cards
2590 * cannot anyway be removed during normal operation, so there is not
2591 * really any need for this verification with them. */
2592
2593#ifndef PRISM2_PCI
2594#ifndef final_version
2595 static unsigned long last_magic_err = 0;
2596 struct net_device *dev = local->dev;
2597
2598 if (HFA384X_INW(HFA384X_SWSUPPORT0_OFF) != HFA384X_MAGIC) {
2599 if (!local->hw_ready)
2600 return;
2601 HFA384X_OUTW(0xffff, HFA384X_EVACK_OFF);
2602 if (time_after(jiffies, last_magic_err + 10 * HZ)) {
2603 printk("%s: Interrupt, but SWSUPPORT0 does not match: "
2604 "%04X != %04X - card removed?\n", dev->name,
2605 HFA384X_INW(HFA384X_SWSUPPORT0_OFF),
2606 HFA384X_MAGIC);
2607 last_magic_err = jiffies;
2608 } else if (net_ratelimit()) {
2609 printk(KERN_DEBUG "%s: interrupt - SWSUPPORT0=%04x "
2610 "MAGIC=%04x\n", dev->name,
2611 HFA384X_INW(HFA384X_SWSUPPORT0_OFF),
2612 HFA384X_MAGIC);
2613 }
2614 if (HFA384X_INW(HFA384X_SWSUPPORT0_OFF) != 0xffff)
2615 schedule_work(&local->reset_queue);
2616 return;
2617 }
2618#endif /* final_version */
2619#endif /* !PRISM2_PCI */
2620}
2621
2622
2623/* Called only from hardware IRQ */
2624static irqreturn_t prism2_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2625{
2626 struct net_device *dev = (struct net_device *) dev_id;
2627 struct hostap_interface *iface;
2628 local_info_t *local;
2629 int events = 0;
2630 u16 ev;
2631
2632 iface = netdev_priv(dev);
2633 local = iface->local;
2634
2635 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INTERRUPT, 0, 0);
2636
2637 if (local->func->card_present && !local->func->card_present(local)) {
2638 if (net_ratelimit()) {
2639 printk(KERN_DEBUG "%s: Interrupt, but dev not OK\n",
2640 dev->name);
2641 }
2642 return IRQ_HANDLED;
2643 }
2644
2645 prism2_check_magic(local);
2646
2647 for (;;) {
2648 ev = HFA384X_INW(HFA384X_EVSTAT_OFF);
2649 if (ev == 0xffff) {
2650 if (local->shutdown)
2651 return IRQ_HANDLED;
2652 HFA384X_OUTW(0xffff, HFA384X_EVACK_OFF);
2653 printk(KERN_DEBUG "%s: prism2_interrupt: ev=0xffff\n",
2654 dev->name);
2655 return IRQ_HANDLED;
2656 }
2657
2658 ev &= HFA384X_INW(HFA384X_INTEN_OFF);
2659 if (ev == 0)
2660 break;
2661
2662 if (ev & HFA384X_EV_CMD) {
2663 prism2_cmd_ev(dev);
2664 }
2665
2666 /* Above events are needed even before hw is ready, but other
2667 * events should be skipped during initialization. This may
2668 * change for AllocEv if allocate_fid is implemented without
2669 * busy waiting. */
2670 if (!local->hw_ready || local->hw_resetting ||
2671 !local->dev_enabled) {
2672 ev = HFA384X_INW(HFA384X_EVSTAT_OFF);
2673 if (ev & HFA384X_EV_CMD)
2674 goto next_event;
2675 if ((ev & HFA384X_EVENT_MASK) == 0)
2676 return IRQ_HANDLED;
2677 if (local->dev_enabled && (ev & ~HFA384X_EV_TICK) &&
2678 net_ratelimit()) {
2679 printk(KERN_DEBUG "%s: prism2_interrupt: hw "
2680 "not ready; skipping events 0x%04x "
2681 "(IntEn=0x%04x)%s%s%s\n",
2682 dev->name, ev,
2683 HFA384X_INW(HFA384X_INTEN_OFF),
2684 !local->hw_ready ? " (!hw_ready)" : "",
2685 local->hw_resetting ?
2686 " (hw_resetting)" : "",
2687 !local->dev_enabled ?
2688 " (!dev_enabled)" : "");
2689 }
2690 HFA384X_OUTW(ev, HFA384X_EVACK_OFF);
2691 return IRQ_HANDLED;
2692 }
2693
2694 if (ev & HFA384X_EV_TICK) {
2695 prism2_ev_tick(dev);
2696 HFA384X_OUTW(HFA384X_EV_TICK, HFA384X_EVACK_OFF);
2697 }
2698
2699 if (ev & HFA384X_EV_ALLOC) {
2700 prism2_alloc_ev(dev);
2701 HFA384X_OUTW(HFA384X_EV_ALLOC, HFA384X_EVACK_OFF);
2702 }
2703
2704 /* Reading data from the card is quite time consuming, so do it
2705 * in tasklets. TX, TXEXC, RX, and INFO events will be ACKed
2706 * and unmasked after needed data has been read completely. */
2707 if (ev & HFA384X_BAP0_EVENTS) {
2708 hfa384x_events_no_bap0(dev);
2709 tasklet_schedule(&local->bap_tasklet);
2710 }
2711
2712#ifndef final_version
2713 if (ev & HFA384X_EV_WTERR) {
2714 PDEBUG(DEBUG_EXTRA, "%s: WTERR event\n", dev->name);
2715 HFA384X_OUTW(HFA384X_EV_WTERR, HFA384X_EVACK_OFF);
2716 }
2717#endif /* final_version */
2718
2719 if (ev & HFA384X_EV_INFDROP) {
2720 prism2_infdrop(dev);
2721 HFA384X_OUTW(HFA384X_EV_INFDROP, HFA384X_EVACK_OFF);
2722 }
2723
2724 next_event:
2725 events++;
2726 if (events >= PRISM2_MAX_INTERRUPT_EVENTS) {
2727 PDEBUG(DEBUG_EXTRA, "prism2_interrupt: >%d events "
2728 "(EvStat=0x%04x)\n",
2729 PRISM2_MAX_INTERRUPT_EVENTS,
2730 HFA384X_INW(HFA384X_EVSTAT_OFF));
2731 break;
2732 }
2733 }
2734 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INTERRUPT, 0, 1);
2735 return IRQ_RETVAL(events);
2736}
2737
2738
2739static void prism2_check_sta_fw_version(local_info_t *local)
2740{
2741 struct hfa384x_comp_ident comp;
2742 int id, variant, major, minor;
2743
2744 if (hfa384x_get_rid(local->dev, HFA384X_RID_STAID,
2745 &comp, sizeof(comp), 1) < 0)
2746 return;
2747
2748 local->fw_ap = 0;
2749 id = le16_to_cpu(comp.id);
2750 if (id != HFA384X_COMP_ID_STA) {
2751 if (id == HFA384X_COMP_ID_FW_AP)
2752 local->fw_ap = 1;
2753 return;
2754 }
2755
2756 major = __le16_to_cpu(comp.major);
2757 minor = __le16_to_cpu(comp.minor);
2758 variant = __le16_to_cpu(comp.variant);
2759 local->sta_fw_ver = PRISM2_FW_VER(major, minor, variant);
2760
2761 /* Station firmware versions before 1.4.x seem to have a bug in
2762 * firmware-based WEP encryption when using Host AP mode, so use
2763 * host_encrypt as a default for them. Firmware version 1.4.9 is the
2764 * first one that has been seen to produce correct encryption, but the
2765 * bug might be fixed before that (although, at least 1.4.2 is broken).
2766 */
2767 local->fw_encrypt_ok = local->sta_fw_ver >= PRISM2_FW_VER(1,4,9);
2768
2769 if (local->iw_mode == IW_MODE_MASTER && !local->host_encrypt &&
2770 !local->fw_encrypt_ok) {
2771 printk(KERN_DEBUG "%s: defaulting to host-based encryption as "
2772 "a workaround for firmware bug in Host AP mode WEP\n",
2773 local->dev->name);
2774 local->host_encrypt = 1;
2775 }
2776
2777 /* IEEE 802.11 standard compliant WDS frames (4 addresses) were broken
2778 * in station firmware versions before 1.5.x. With these versions, the
2779 * driver uses a workaround with bogus frame format (4th address after
2780 * the payload). This is not compatible with other AP devices. Since
2781 * the firmware bug is fixed in the latest station firmware versions,
2782 * automatically enable standard compliant mode for cards using station
2783 * firmware version 1.5.0 or newer. */
2784 if (local->sta_fw_ver >= PRISM2_FW_VER(1,5,0))
2785 local->wds_type |= HOSTAP_WDS_STANDARD_FRAME;
2786 else {
2787 printk(KERN_DEBUG "%s: defaulting to bogus WDS frame as a "
2788 "workaround for firmware bug in Host AP mode WDS\n",
2789 local->dev->name);
2790 }
2791
2792 hostap_check_sta_fw_version(local->ap, local->sta_fw_ver);
2793}
2794
2795
2796static void prism2_crypt_deinit_entries(local_info_t *local, int force)
2797{
2798 struct list_head *ptr, *n;
2799 struct ieee80211_crypt_data *entry;
2800
2801 for (ptr = local->crypt_deinit_list.next, n = ptr->next;
2802 ptr != &local->crypt_deinit_list; ptr = n, n = ptr->next) {
2803 entry = list_entry(ptr, struct ieee80211_crypt_data, list);
2804
2805 if (atomic_read(&entry->refcnt) != 0 && !force)
2806 continue;
2807
2808 list_del(ptr);
2809
2810 if (entry->ops)
2811 entry->ops->deinit(entry->priv);
2812 kfree(entry);
2813 }
2814}
2815
2816
2817static void prism2_crypt_deinit_handler(unsigned long data)
2818{
2819 local_info_t *local = (local_info_t *) data;
2820 unsigned long flags;
2821
2822 spin_lock_irqsave(&local->lock, flags);
2823 prism2_crypt_deinit_entries(local, 0);
2824 if (!list_empty(&local->crypt_deinit_list)) {
2825 printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
2826 "deletion list\n", local->dev->name);
2827 local->crypt_deinit_timer.expires = jiffies + HZ;
2828 add_timer(&local->crypt_deinit_timer);
2829 }
2830 spin_unlock_irqrestore(&local->lock, flags);
2831
2832}
2833
2834
2835static void hostap_passive_scan(unsigned long data)
2836{
2837 local_info_t *local = (local_info_t *) data;
2838 struct net_device *dev = local->dev;
2839 u16 channel;
2840
2841 if (local->passive_scan_interval <= 0)
2842 return;
2843
2844 if (local->passive_scan_state == PASSIVE_SCAN_LISTEN) {
2845 int max_tries = 16;
2846
2847 /* Even though host system does not really know when the WLAN
2848 * MAC is sending frames, try to avoid changing channels for
2849 * passive scanning when a host-generated frame is being
2850 * transmitted */
2851 if (test_bit(HOSTAP_BITS_TRANSMIT, &local->bits)) {
2852 printk(KERN_DEBUG "%s: passive scan detected pending "
2853 "TX - delaying\n", dev->name);
2854 local->passive_scan_timer.expires = jiffies + HZ / 10;
2855 add_timer(&local->passive_scan_timer);
2856 return;
2857 }
2858
2859 do {
2860 local->passive_scan_channel++;
2861 if (local->passive_scan_channel > 14)
2862 local->passive_scan_channel = 1;
2863 max_tries--;
2864 } while (!(local->channel_mask &
2865 (1 << (local->passive_scan_channel - 1))) &&
2866 max_tries > 0);
2867
2868 if (max_tries == 0) {
2869 printk(KERN_INFO "%s: no allowed passive scan channels"
2870 " found\n", dev->name);
2871 return;
2872 }
2873
2874 printk(KERN_DEBUG "%s: passive scan channel %d\n",
2875 dev->name, local->passive_scan_channel);
2876 channel = local->passive_scan_channel;
2877 local->passive_scan_state = PASSIVE_SCAN_WAIT;
2878 local->passive_scan_timer.expires = jiffies + HZ / 10;
2879 } else {
2880 channel = local->channel;
2881 local->passive_scan_state = PASSIVE_SCAN_LISTEN;
2882 local->passive_scan_timer.expires = jiffies +
2883 local->passive_scan_interval * HZ;
2884 }
2885
2886 if (hfa384x_cmd_callback(dev, HFA384X_CMDCODE_TEST |
2887 (HFA384X_TEST_CHANGE_CHANNEL << 8),
2888 channel, NULL, 0))
2889 printk(KERN_ERR "%s: passive scan channel set %d "
2890 "failed\n", dev->name, channel);
2891
2892 add_timer(&local->passive_scan_timer);
2893}
2894
2895
2896/* Called only as a scheduled task when communications quality values should
2897 * be updated. */
2898static void handle_comms_qual_update(void *data)
2899{
2900 local_info_t *local = data;
2901 prism2_update_comms_qual(local->dev);
2902}
2903
2904
2905/* Software watchdog - called as a timer. Hardware interrupt (Tick event) is
2906 * used to monitor that local->last_tick_timer is being updated. If not,
2907 * interrupt busy-loop is assumed and driver tries to recover by masking out
2908 * some events. */
2909static void hostap_tick_timer(unsigned long data)
2910{
2911 static unsigned long last_inquire = 0;
2912 local_info_t *local = (local_info_t *) data;
2913 local->last_tick_timer = jiffies;
2914
2915 /* Inquire CommTallies every 10 seconds to keep the statistics updated
2916 * more often during low load and when using 32-bit tallies. */
2917 if ((!last_inquire || time_after(jiffies, last_inquire + 10 * HZ)) &&
2918 !local->hw_downloading && local->hw_ready &&
2919 !local->hw_resetting && local->dev_enabled) {
2920 hfa384x_cmd_callback(local->dev, HFA384X_CMDCODE_INQUIRE,
2921 HFA384X_INFO_COMMTALLIES, NULL, 0);
2922 last_inquire = jiffies;
2923 }
2924
2925 if ((local->last_comms_qual_update == 0 ||
2926 time_after(jiffies, local->last_comms_qual_update + 10 * HZ)) &&
2927 (local->iw_mode == IW_MODE_INFRA ||
2928 local->iw_mode == IW_MODE_ADHOC)) {
2929 schedule_work(&local->comms_qual_update);
2930 }
2931
2932 local->tick_timer.expires = jiffies + 2 * HZ;
2933 add_timer(&local->tick_timer);
2934}
2935
2936
2937#ifndef PRISM2_NO_PROCFS_DEBUG
2938static int prism2_registers_proc_read(char *page, char **start, off_t off,
2939 int count, int *eof, void *data)
2940{
2941 char *p = page;
2942 local_info_t *local = (local_info_t *) data;
2943
2944 if (off != 0) {
2945 *eof = 1;
2946 return 0;
2947 }
2948
2949#define SHOW_REG(n) \
2950p += sprintf(p, #n "=%04x\n", hfa384x_read_reg(local->dev, HFA384X_##n##_OFF))
2951
2952 SHOW_REG(CMD);
2953 SHOW_REG(PARAM0);
2954 SHOW_REG(PARAM1);
2955 SHOW_REG(PARAM2);
2956 SHOW_REG(STATUS);
2957 SHOW_REG(RESP0);
2958 SHOW_REG(RESP1);
2959 SHOW_REG(RESP2);
2960 SHOW_REG(INFOFID);
2961 SHOW_REG(CONTROL);
2962 SHOW_REG(SELECT0);
2963 SHOW_REG(SELECT1);
2964 SHOW_REG(OFFSET0);
2965 SHOW_REG(OFFSET1);
2966 SHOW_REG(RXFID);
2967 SHOW_REG(ALLOCFID);
2968 SHOW_REG(TXCOMPLFID);
2969 SHOW_REG(SWSUPPORT0);
2970 SHOW_REG(SWSUPPORT1);
2971 SHOW_REG(SWSUPPORT2);
2972 SHOW_REG(EVSTAT);
2973 SHOW_REG(INTEN);
2974 SHOW_REG(EVACK);
2975 /* Do not read data registers, because they change the state of the
2976 * MAC (offset += 2) */
2977 /* SHOW_REG(DATA0); */
2978 /* SHOW_REG(DATA1); */
2979 SHOW_REG(AUXPAGE);
2980 SHOW_REG(AUXOFFSET);
2981 /* SHOW_REG(AUXDATA); */
2982#ifdef PRISM2_PCI
2983 SHOW_REG(PCICOR);
2984 SHOW_REG(PCIHCR);
2985 SHOW_REG(PCI_M0_ADDRH);
2986 SHOW_REG(PCI_M0_ADDRL);
2987 SHOW_REG(PCI_M0_LEN);
2988 SHOW_REG(PCI_M0_CTL);
2989 SHOW_REG(PCI_STATUS);
2990 SHOW_REG(PCI_M1_ADDRH);
2991 SHOW_REG(PCI_M1_ADDRL);
2992 SHOW_REG(PCI_M1_LEN);
2993 SHOW_REG(PCI_M1_CTL);
2994#endif /* PRISM2_PCI */
2995
2996 return (p - page);
2997}
2998#endif /* PRISM2_NO_PROCFS_DEBUG */
2999
3000
3001struct set_tim_data {
3002 struct list_head list;
3003 int aid;
3004 int set;
3005};
3006
3007static int prism2_set_tim(struct net_device *dev, int aid, int set)
3008{
3009 struct list_head *ptr;
3010 struct set_tim_data *new_entry;
3011 struct hostap_interface *iface;
3012 local_info_t *local;
3013
3014 iface = netdev_priv(dev);
3015 local = iface->local;
3016
3017 new_entry = (struct set_tim_data *)
3018 kmalloc(sizeof(*new_entry), GFP_ATOMIC);
3019 if (new_entry == NULL) {
3020 printk(KERN_DEBUG "%s: prism2_set_tim: kmalloc failed\n",
3021 local->dev->name);
3022 return -ENOMEM;
3023 }
3024 memset(new_entry, 0, sizeof(*new_entry));
3025 new_entry->aid = aid;
3026 new_entry->set = set;
3027
3028 spin_lock_bh(&local->set_tim_lock);
3029 list_for_each(ptr, &local->set_tim_list) {
3030 struct set_tim_data *entry =
3031 list_entry(ptr, struct set_tim_data, list);
3032 if (entry->aid == aid) {
3033 PDEBUG(DEBUG_PS2, "%s: prism2_set_tim: aid=%d "
3034 "set=%d ==> %d\n",
3035 local->dev->name, aid, entry->set, set);
3036 entry->set = set;
3037 kfree(new_entry);
3038 new_entry = NULL;
3039 break;
3040 }
3041 }
3042 if (new_entry)
3043 list_add_tail(&new_entry->list, &local->set_tim_list);
3044 spin_unlock_bh(&local->set_tim_lock);
3045
3046 schedule_work(&local->set_tim_queue);
3047
3048 return 0;
3049}
3050
3051
3052static void handle_set_tim_queue(void *data)
3053{
3054 local_info_t *local = (local_info_t *) data;
3055 struct set_tim_data *entry;
3056 u16 val;
3057
3058 for (;;) {
3059 entry = NULL;
3060 spin_lock_bh(&local->set_tim_lock);
3061 if (!list_empty(&local->set_tim_list)) {
3062 entry = list_entry(local->set_tim_list.next,
3063 struct set_tim_data, list);
3064 list_del(&entry->list);
3065 }
3066 spin_unlock_bh(&local->set_tim_lock);
3067 if (!entry)
3068 break;
3069
3070 PDEBUG(DEBUG_PS2, "%s: handle_set_tim_queue: aid=%d set=%d\n",
3071 local->dev->name, entry->aid, entry->set);
3072
3073 val = entry->aid;
3074 if (entry->set)
3075 val |= 0x8000;
3076 if (hostap_set_word(local->dev, HFA384X_RID_CNFTIMCTRL, val)) {
3077 printk(KERN_DEBUG "%s: set_tim failed (aid=%d "
3078 "set=%d)\n",
3079 local->dev->name, entry->aid, entry->set);
3080 }
3081
3082 kfree(entry);
3083 }
3084}
3085
3086
3087static void prism2_clear_set_tim_queue(local_info_t *local)
3088{
3089 struct list_head *ptr, *n;
3090
3091 list_for_each_safe(ptr, n, &local->set_tim_list) {
3092 struct set_tim_data *entry;
3093 entry = list_entry(ptr, struct set_tim_data, list);
3094 list_del(&entry->list);
3095 kfree(entry);
3096 }
3097}
3098
3099
3100static struct net_device *
3101prism2_init_local_data(struct prism2_helper_functions *funcs, int card_idx,
3102 struct device *sdev)
3103{
3104 struct net_device *dev;
3105 struct hostap_interface *iface;
3106 struct local_info *local;
3107 int len, i, ret;
3108
3109 if (funcs == NULL)
3110 return NULL;
3111
3112 len = strlen(dev_template);
3113 if (len >= IFNAMSIZ || strstr(dev_template, "%d") == NULL) {
3114 printk(KERN_WARNING "hostap: Invalid dev_template='%s'\n",
3115 dev_template);
3116 return NULL;
3117 }
3118
3119 len = sizeof(struct hostap_interface) +
3120 3 + sizeof(struct local_info) +
3121 3 + sizeof(struct ap_data);
3122
3123 dev = alloc_etherdev(len);
3124 if (dev == NULL)
3125 return NULL;
3126
3127 iface = netdev_priv(dev);
3128 local = (struct local_info *) ((((long) (iface + 1)) + 3) & ~3);
3129 local->ap = (struct ap_data *) ((((long) (local + 1)) + 3) & ~3);
3130 local->dev = iface->dev = dev;
3131 iface->local = local;
3132 iface->type = HOSTAP_INTERFACE_MASTER;
3133 INIT_LIST_HEAD(&local->hostap_interfaces);
3134
3135 local->hw_module = THIS_MODULE;
3136
3137#ifdef PRISM2_IO_DEBUG
3138 local->io_debug_enabled = 1;
3139#endif /* PRISM2_IO_DEBUG */
3140
3141 local->func = funcs;
3142 local->func->cmd = hfa384x_cmd;
3143 local->func->read_regs = hfa384x_read_regs;
3144 local->func->get_rid = hfa384x_get_rid;
3145 local->func->set_rid = hfa384x_set_rid;
3146 local->func->hw_enable = prism2_hw_enable;
3147 local->func->hw_config = prism2_hw_config;
3148 local->func->hw_reset = prism2_hw_reset;
3149 local->func->hw_shutdown = prism2_hw_shutdown;
3150 local->func->reset_port = prism2_reset_port;
3151 local->func->schedule_reset = prism2_schedule_reset;
3152#ifdef PRISM2_DOWNLOAD_SUPPORT
3153 local->func->read_aux = prism2_download_aux_dump;
3154 local->func->download = prism2_download;
3155#endif /* PRISM2_DOWNLOAD_SUPPORT */
3156 local->func->tx = prism2_tx_80211;
3157 local->func->set_tim = prism2_set_tim;
3158 local->func->need_tx_headroom = 0; /* no need to add txdesc in
3159 * skb->data (FIX: maybe for DMA bus
3160 * mastering? */
3161
3162 local->mtu = mtu;
3163
3164 rwlock_init(&local->iface_lock);
3165 spin_lock_init(&local->txfidlock);
3166 spin_lock_init(&local->cmdlock);
3167 spin_lock_init(&local->baplock);
3168 spin_lock_init(&local->lock);
3169 init_MUTEX(&local->rid_bap_sem);
3170
3171 if (card_idx < 0 || card_idx >= MAX_PARM_DEVICES)
3172 card_idx = 0;
3173 local->card_idx = card_idx;
3174
3175 len = strlen(essid);
3176 memcpy(local->essid, essid,
3177 len > MAX_SSID_LEN ? MAX_SSID_LEN : len);
3178 local->essid[MAX_SSID_LEN] = '\0';
3179 i = GET_INT_PARM(iw_mode, card_idx);
3180 if ((i >= IW_MODE_ADHOC && i <= IW_MODE_REPEAT) ||
3181 i == IW_MODE_MONITOR) {
3182 local->iw_mode = i;
3183 } else {
3184 printk(KERN_WARNING "prism2: Unknown iw_mode %d; using "
3185 "IW_MODE_MASTER\n", i);
3186 local->iw_mode = IW_MODE_MASTER;
3187 }
3188 local->channel = GET_INT_PARM(channel, card_idx);
3189 local->beacon_int = GET_INT_PARM(beacon_int, card_idx);
3190 local->dtim_period = GET_INT_PARM(dtim_period, card_idx);
3191 local->wds_max_connections = 16;
3192 local->tx_control = HFA384X_TX_CTRL_FLAGS;
3193 local->manual_retry_count = -1;
3194 local->rts_threshold = 2347;
3195 local->fragm_threshold = 2346;
3196 local->rssi_to_dBm = 100; /* default; to be overriden by
3197 * cnfDbmAdjust, if available */
3198 local->auth_algs = PRISM2_AUTH_OPEN | PRISM2_AUTH_SHARED_KEY;
3199 local->sram_type = -1;
3200 local->scan_channel_mask = 0xffff;
3201
3202 /* Initialize task queue structures */
3203 INIT_WORK(&local->reset_queue, handle_reset_queue, local);
3204 INIT_WORK(&local->set_multicast_list_queue,
3205 hostap_set_multicast_list_queue, local->dev);
3206
3207 INIT_WORK(&local->set_tim_queue, handle_set_tim_queue, local);
3208 INIT_LIST_HEAD(&local->set_tim_list);
3209 spin_lock_init(&local->set_tim_lock);
3210
3211 INIT_WORK(&local->comms_qual_update, handle_comms_qual_update, local);
3212
3213 /* Initialize tasklets for handling hardware IRQ related operations
3214 * outside hw IRQ handler */
3215#define HOSTAP_TASKLET_INIT(q, f, d) \
3216do { memset((q), 0, sizeof(*(q))); (q)->func = (f); (q)->data = (d); } \
3217while (0)
3218 HOSTAP_TASKLET_INIT(&local->bap_tasklet, hostap_bap_tasklet,
3219 (unsigned long) local);
3220
3221 HOSTAP_TASKLET_INIT(&local->info_tasklet, hostap_info_tasklet,
3222 (unsigned long) local);
3223 hostap_info_init(local);
3224
3225 HOSTAP_TASKLET_INIT(&local->rx_tasklet,
3226 hostap_rx_tasklet, (unsigned long) local);
3227 skb_queue_head_init(&local->rx_list);
3228
3229 HOSTAP_TASKLET_INIT(&local->sta_tx_exc_tasklet,
3230 hostap_sta_tx_exc_tasklet, (unsigned long) local);
3231 skb_queue_head_init(&local->sta_tx_exc_list);
3232
3233 INIT_LIST_HEAD(&local->cmd_queue);
3234 init_waitqueue_head(&local->hostscan_wq);
3235 INIT_LIST_HEAD(&local->crypt_deinit_list);
3236 init_timer(&local->crypt_deinit_timer);
3237 local->crypt_deinit_timer.data = (unsigned long) local;
3238 local->crypt_deinit_timer.function = prism2_crypt_deinit_handler;
3239
3240 init_timer(&local->passive_scan_timer);
3241 local->passive_scan_timer.data = (unsigned long) local;
3242 local->passive_scan_timer.function = hostap_passive_scan;
3243
3244 init_timer(&local->tick_timer);
3245 local->tick_timer.data = (unsigned long) local;
3246 local->tick_timer.function = hostap_tick_timer;
3247 local->tick_timer.expires = jiffies + 2 * HZ;
3248 add_timer(&local->tick_timer);
3249
3250 INIT_LIST_HEAD(&local->bss_list);
3251
3252 hostap_setup_dev(dev, local, 1);
3253 local->saved_eth_header_parse = dev->hard_header_parse;
3254
3255 dev->hard_start_xmit = hostap_master_start_xmit;
3256 dev->type = ARPHRD_IEEE80211;
3257 dev->hard_header_parse = hostap_80211_header_parse;
3258
3259 rtnl_lock();
3260 ret = dev_alloc_name(dev, "wifi%d");
3261 SET_NETDEV_DEV(dev, sdev);
3262 if (ret >= 0)
3263 ret = register_netdevice(dev);
3264 rtnl_unlock();
3265 if (ret < 0) {
3266 printk(KERN_WARNING "%s: register netdevice failed!\n",
3267 dev_info);
3268 goto fail;
3269 }
3270 printk(KERN_INFO "%s: Registered netdevice %s\n", dev_info, dev->name);
3271
3272#ifndef PRISM2_NO_PROCFS_DEBUG
3273 create_proc_read_entry("registers", 0, local->proc,
3274 prism2_registers_proc_read, local);
3275#endif /* PRISM2_NO_PROCFS_DEBUG */
3276
3277 hostap_init_data(local);
3278 return dev;
3279
3280 fail:
3281 free_netdev(dev);
3282 return NULL;
3283}
3284
3285
3286static int hostap_hw_ready(struct net_device *dev)
3287{
3288 struct hostap_interface *iface;
3289 struct local_info *local;
3290
3291 iface = netdev_priv(dev);
3292 local = iface->local;
3293 local->ddev = hostap_add_interface(local, HOSTAP_INTERFACE_MAIN, 0,
3294 "", dev_template);
3295
3296 if (local->ddev) {
3297 if (local->iw_mode == IW_MODE_INFRA ||
3298 local->iw_mode == IW_MODE_ADHOC) {
3299 netif_carrier_off(local->dev);
3300 netif_carrier_off(local->ddev);
3301 }
3302 hostap_init_proc(local);
3303 hostap_init_ap_proc(local);
3304 return 0;
3305 }
3306
3307 return -1;
3308}
3309
3310
3311static void prism2_free_local_data(struct net_device *dev)
3312{
3313 struct hostap_tx_callback_info *tx_cb, *tx_cb_prev;
3314 int i;
3315 struct hostap_interface *iface;
3316 struct local_info *local;
3317 struct list_head *ptr, *n;
3318
3319 if (dev == NULL)
3320 return;
3321
3322 iface = netdev_priv(dev);
3323 local = iface->local;
3324
3325 flush_scheduled_work();
3326
3327 if (timer_pending(&local->crypt_deinit_timer))
3328 del_timer(&local->crypt_deinit_timer);
3329 prism2_crypt_deinit_entries(local, 1);
3330
3331 if (timer_pending(&local->passive_scan_timer))
3332 del_timer(&local->passive_scan_timer);
3333
3334 if (timer_pending(&local->tick_timer))
3335 del_timer(&local->tick_timer);
3336
3337 prism2_clear_cmd_queue(local);
3338
3339 skb_queue_purge(&local->info_list);
3340 skb_queue_purge(&local->rx_list);
3341 skb_queue_purge(&local->sta_tx_exc_list);
3342
3343 if (local->dev_enabled)
3344 prism2_callback(local, PRISM2_CALLBACK_DISABLE);
3345
3346 for (i = 0; i < WEP_KEYS; i++) {
3347 struct ieee80211_crypt_data *crypt = local->crypt[i];
3348 if (crypt) {
3349 if (crypt->ops)
3350 crypt->ops->deinit(crypt->priv);
3351 kfree(crypt);
3352 local->crypt[i] = NULL;
3353 }
3354 }
3355
3356 if (local->ap != NULL)
3357 hostap_free_data(local->ap);
3358
3359#ifndef PRISM2_NO_PROCFS_DEBUG
3360 if (local->proc != NULL)
3361 remove_proc_entry("registers", local->proc);
3362#endif /* PRISM2_NO_PROCFS_DEBUG */
3363 hostap_remove_proc(local);
3364
3365 tx_cb = local->tx_callback;
3366 while (tx_cb != NULL) {
3367 tx_cb_prev = tx_cb;
3368 tx_cb = tx_cb->next;
3369 kfree(tx_cb_prev);
3370 }
3371
3372 hostap_set_hostapd(local, 0, 0);
3373 hostap_set_hostapd_sta(local, 0, 0);
3374
3375 for (i = 0; i < PRISM2_FRAG_CACHE_LEN; i++) {
3376 if (local->frag_cache[i].skb != NULL)
3377 dev_kfree_skb(local->frag_cache[i].skb);
3378 }
3379
3380#ifdef PRISM2_DOWNLOAD_SUPPORT
3381 prism2_download_free_data(local->dl_pri);
3382 prism2_download_free_data(local->dl_sec);
3383#endif /* PRISM2_DOWNLOAD_SUPPORT */
3384
3385 list_for_each_safe(ptr, n, &local->hostap_interfaces) {
3386 iface = list_entry(ptr, struct hostap_interface, list);
3387 if (iface->type == HOSTAP_INTERFACE_MASTER) {
3388 /* special handling for this interface below */
3389 continue;
3390 }
3391 hostap_remove_interface(iface->dev, 0, 1);
3392 }
3393
3394 prism2_clear_set_tim_queue(local);
3395
3396 list_for_each_safe(ptr, n, &local->bss_list) {
3397 struct hostap_bss_info *bss =
3398 list_entry(ptr, struct hostap_bss_info, list);
3399 kfree(bss);
3400 }
3401
3402 kfree(local->pda);
3403 kfree(local->last_scan_results);
3404 kfree(local->generic_elem);
3405
3406 unregister_netdev(local->dev);
3407 free_netdev(local->dev);
3408}
3409
3410
3411#ifndef PRISM2_PLX
3412static void prism2_suspend(struct net_device *dev)
3413{
3414 struct hostap_interface *iface;
3415 struct local_info *local;
3416 union iwreq_data wrqu;
3417
3418 iface = dev->priv;
3419 local = iface->local;
3420
3421 /* Send disconnect event, e.g., to trigger reassociation after resume
3422 * if wpa_supplicant is used. */
3423 memset(&wrqu, 0, sizeof(wrqu));
3424 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3425 wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL);
3426
3427 /* Disable hardware and firmware */
3428 prism2_hw_shutdown(dev, 0);
3429}
3430#endif /* PRISM2_PLX */
3431
3432
3433/* These might at some point be compiled separately and used as separate
3434 * kernel modules or linked into one */
3435#ifdef PRISM2_DOWNLOAD_SUPPORT
3436#include "hostap_download.c"
3437#endif /* PRISM2_DOWNLOAD_SUPPORT */
3438
3439#ifdef PRISM2_CALLBACK
3440/* External hostap_callback.c file can be used to, e.g., blink activity led.
3441 * This can use platform specific code and must define prism2_callback()
3442 * function (if PRISM2_CALLBACK is not defined, these function calls are not
3443 * used. */
3444#include "hostap_callback.c"
3445#endif /* PRISM2_CALLBACK */
diff --git a/drivers/net/wireless/hostap/hostap_info.c b/drivers/net/wireless/hostap/hostap_info.c
new file mode 100644
index 000000000000..5aa998fdf1c4
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_info.c
@@ -0,0 +1,499 @@
1/* Host AP driver Info Frame processing (part of hostap.o module) */
2
3
4/* Called only as a tasklet (software IRQ) */
5static void prism2_info_commtallies16(local_info_t *local, unsigned char *buf,
6 int left)
7{
8 struct hfa384x_comm_tallies *tallies;
9
10 if (left < sizeof(struct hfa384x_comm_tallies)) {
11 printk(KERN_DEBUG "%s: too short (len=%d) commtallies "
12 "info frame\n", local->dev->name, left);
13 return;
14 }
15
16 tallies = (struct hfa384x_comm_tallies *) buf;
17#define ADD_COMM_TALLIES(name) \
18local->comm_tallies.name += le16_to_cpu(tallies->name)
19 ADD_COMM_TALLIES(tx_unicast_frames);
20 ADD_COMM_TALLIES(tx_multicast_frames);
21 ADD_COMM_TALLIES(tx_fragments);
22 ADD_COMM_TALLIES(tx_unicast_octets);
23 ADD_COMM_TALLIES(tx_multicast_octets);
24 ADD_COMM_TALLIES(tx_deferred_transmissions);
25 ADD_COMM_TALLIES(tx_single_retry_frames);
26 ADD_COMM_TALLIES(tx_multiple_retry_frames);
27 ADD_COMM_TALLIES(tx_retry_limit_exceeded);
28 ADD_COMM_TALLIES(tx_discards);
29 ADD_COMM_TALLIES(rx_unicast_frames);
30 ADD_COMM_TALLIES(rx_multicast_frames);
31 ADD_COMM_TALLIES(rx_fragments);
32 ADD_COMM_TALLIES(rx_unicast_octets);
33 ADD_COMM_TALLIES(rx_multicast_octets);
34 ADD_COMM_TALLIES(rx_fcs_errors);
35 ADD_COMM_TALLIES(rx_discards_no_buffer);
36 ADD_COMM_TALLIES(tx_discards_wrong_sa);
37 ADD_COMM_TALLIES(rx_discards_wep_undecryptable);
38 ADD_COMM_TALLIES(rx_message_in_msg_fragments);
39 ADD_COMM_TALLIES(rx_message_in_bad_msg_fragments);
40#undef ADD_COMM_TALLIES
41}
42
43
44/* Called only as a tasklet (software IRQ) */
45static void prism2_info_commtallies32(local_info_t *local, unsigned char *buf,
46 int left)
47{
48 struct hfa384x_comm_tallies32 *tallies;
49
50 if (left < sizeof(struct hfa384x_comm_tallies32)) {
51 printk(KERN_DEBUG "%s: too short (len=%d) commtallies32 "
52 "info frame\n", local->dev->name, left);
53 return;
54 }
55
56 tallies = (struct hfa384x_comm_tallies32 *) buf;
57#define ADD_COMM_TALLIES(name) \
58local->comm_tallies.name += le32_to_cpu(tallies->name)
59 ADD_COMM_TALLIES(tx_unicast_frames);
60 ADD_COMM_TALLIES(tx_multicast_frames);
61 ADD_COMM_TALLIES(tx_fragments);
62 ADD_COMM_TALLIES(tx_unicast_octets);
63 ADD_COMM_TALLIES(tx_multicast_octets);
64 ADD_COMM_TALLIES(tx_deferred_transmissions);
65 ADD_COMM_TALLIES(tx_single_retry_frames);
66 ADD_COMM_TALLIES(tx_multiple_retry_frames);
67 ADD_COMM_TALLIES(tx_retry_limit_exceeded);
68 ADD_COMM_TALLIES(tx_discards);
69 ADD_COMM_TALLIES(rx_unicast_frames);
70 ADD_COMM_TALLIES(rx_multicast_frames);
71 ADD_COMM_TALLIES(rx_fragments);
72 ADD_COMM_TALLIES(rx_unicast_octets);
73 ADD_COMM_TALLIES(rx_multicast_octets);
74 ADD_COMM_TALLIES(rx_fcs_errors);
75 ADD_COMM_TALLIES(rx_discards_no_buffer);
76 ADD_COMM_TALLIES(tx_discards_wrong_sa);
77 ADD_COMM_TALLIES(rx_discards_wep_undecryptable);
78 ADD_COMM_TALLIES(rx_message_in_msg_fragments);
79 ADD_COMM_TALLIES(rx_message_in_bad_msg_fragments);
80#undef ADD_COMM_TALLIES
81}
82
83
84/* Called only as a tasklet (software IRQ) */
85static void prism2_info_commtallies(local_info_t *local, unsigned char *buf,
86 int left)
87{
88 if (local->tallies32)
89 prism2_info_commtallies32(local, buf, left);
90 else
91 prism2_info_commtallies16(local, buf, left);
92}
93
94
95#ifndef PRISM2_NO_STATION_MODES
96#ifndef PRISM2_NO_DEBUG
97static const char* hfa384x_linkstatus_str(u16 linkstatus)
98{
99 switch (linkstatus) {
100 case HFA384X_LINKSTATUS_CONNECTED:
101 return "Connected";
102 case HFA384X_LINKSTATUS_DISCONNECTED:
103 return "Disconnected";
104 case HFA384X_LINKSTATUS_AP_CHANGE:
105 return "Access point change";
106 case HFA384X_LINKSTATUS_AP_OUT_OF_RANGE:
107 return "Access point out of range";
108 case HFA384X_LINKSTATUS_AP_IN_RANGE:
109 return "Access point in range";
110 case HFA384X_LINKSTATUS_ASSOC_FAILED:
111 return "Association failed";
112 default:
113 return "Unknown";
114 }
115}
116#endif /* PRISM2_NO_DEBUG */
117
118
119/* Called only as a tasklet (software IRQ) */
120static void prism2_info_linkstatus(local_info_t *local, unsigned char *buf,
121 int left)
122{
123 u16 val;
124 int non_sta_mode;
125
126 /* Alloc new JoinRequests to occur since LinkStatus for the previous
127 * has been received */
128 local->last_join_time = 0;
129
130 if (left != 2) {
131 printk(KERN_DEBUG "%s: invalid linkstatus info frame "
132 "length %d\n", local->dev->name, left);
133 return;
134 }
135
136 non_sta_mode = local->iw_mode == IW_MODE_MASTER ||
137 local->iw_mode == IW_MODE_REPEAT ||
138 local->iw_mode == IW_MODE_MONITOR;
139
140 val = buf[0] | (buf[1] << 8);
141 if (!non_sta_mode || val != HFA384X_LINKSTATUS_DISCONNECTED) {
142 PDEBUG(DEBUG_EXTRA, "%s: LinkStatus=%d (%s)\n",
143 local->dev->name, val, hfa384x_linkstatus_str(val));
144 }
145
146 if (non_sta_mode) {
147 netif_carrier_on(local->dev);
148 netif_carrier_on(local->ddev);
149 return;
150 }
151
152 /* Get current BSSID later in scheduled task */
153 set_bit(PRISM2_INFO_PENDING_LINKSTATUS, &local->pending_info);
154 local->prev_link_status = val;
155 schedule_work(&local->info_queue);
156}
157
158
159static void prism2_host_roaming(local_info_t *local)
160{
161 struct hfa384x_join_request req;
162 struct net_device *dev = local->dev;
163 struct hfa384x_hostscan_result *selected, *entry;
164 int i;
165 unsigned long flags;
166
167 if (local->last_join_time &&
168 time_before(jiffies, local->last_join_time + 10 * HZ)) {
169 PDEBUG(DEBUG_EXTRA, "%s: last join request has not yet been "
170 "completed - waiting for it before issuing new one\n",
171 dev->name);
172 return;
173 }
174
175 /* ScanResults are sorted: first ESS results in decreasing signal
176 * quality then IBSS results in similar order.
177 * Trivial roaming policy: just select the first entry.
178 * This could probably be improved by adding hysteresis to limit
179 * number of handoffs, etc.
180 *
181 * Could do periodic RID_SCANREQUEST or Inquire F101 to get new
182 * ScanResults */
183 spin_lock_irqsave(&local->lock, flags);
184 if (local->last_scan_results == NULL ||
185 local->last_scan_results_count == 0) {
186 spin_unlock_irqrestore(&local->lock, flags);
187 PDEBUG(DEBUG_EXTRA, "%s: no scan results for host roaming\n",
188 dev->name);
189 return;
190 }
191
192 selected = &local->last_scan_results[0];
193
194 if (local->preferred_ap[0] || local->preferred_ap[1] ||
195 local->preferred_ap[2] || local->preferred_ap[3] ||
196 local->preferred_ap[4] || local->preferred_ap[5]) {
197 /* Try to find preferred AP */
198 PDEBUG(DEBUG_EXTRA, "%s: Preferred AP BSSID " MACSTR "\n",
199 dev->name, MAC2STR(local->preferred_ap));
200 for (i = 0; i < local->last_scan_results_count; i++) {
201 entry = &local->last_scan_results[i];
202 if (memcmp(local->preferred_ap, entry->bssid, 6) == 0)
203 {
204 PDEBUG(DEBUG_EXTRA, "%s: using preferred AP "
205 "selection\n", dev->name);
206 selected = entry;
207 break;
208 }
209 }
210 }
211
212 memcpy(req.bssid, selected->bssid, 6);
213 req.channel = selected->chid;
214 spin_unlock_irqrestore(&local->lock, flags);
215
216 PDEBUG(DEBUG_EXTRA, "%s: JoinRequest: BSSID=" MACSTR " channel=%d\n",
217 dev->name, MAC2STR(req.bssid), le16_to_cpu(req.channel));
218 if (local->func->set_rid(dev, HFA384X_RID_JOINREQUEST, &req,
219 sizeof(req))) {
220 printk(KERN_DEBUG "%s: JoinRequest failed\n", dev->name);
221 }
222 local->last_join_time = jiffies;
223}
224
225
226static void hostap_report_scan_complete(local_info_t *local)
227{
228 union iwreq_data wrqu;
229
230 /* Inform user space about new scan results (just empty event,
231 * SIOCGIWSCAN can be used to fetch data */
232 wrqu.data.length = 0;
233 wrqu.data.flags = 0;
234 wireless_send_event(local->dev, SIOCGIWSCAN, &wrqu, NULL);
235
236 /* Allow SIOCGIWSCAN handling to occur since we have received
237 * scanning result */
238 local->scan_timestamp = 0;
239}
240
241
242/* Called only as a tasklet (software IRQ) */
243static void prism2_info_scanresults(local_info_t *local, unsigned char *buf,
244 int left)
245{
246 u16 *pos;
247 int new_count, i;
248 unsigned long flags;
249 struct hfa384x_scan_result *res;
250 struct hfa384x_hostscan_result *results, *prev;
251
252 if (left < 4) {
253 printk(KERN_DEBUG "%s: invalid scanresult info frame "
254 "length %d\n", local->dev->name, left);
255 return;
256 }
257
258 pos = (u16 *) buf;
259 pos++;
260 pos++;
261 left -= 4;
262
263 new_count = left / sizeof(struct hfa384x_scan_result);
264 results = kmalloc(new_count * sizeof(struct hfa384x_hostscan_result),
265 GFP_ATOMIC);
266 if (results == NULL)
267 return;
268
269 /* Convert to hostscan result format. */
270 res = (struct hfa384x_scan_result *) pos;
271 for (i = 0; i < new_count; i++) {
272 memcpy(&results[i], &res[i],
273 sizeof(struct hfa384x_scan_result));
274 results[i].atim = 0;
275 }
276
277 spin_lock_irqsave(&local->lock, flags);
278 local->last_scan_type = PRISM2_SCAN;
279 prev = local->last_scan_results;
280 local->last_scan_results = results;
281 local->last_scan_results_count = new_count;
282 spin_unlock_irqrestore(&local->lock, flags);
283 kfree(prev);
284
285 hostap_report_scan_complete(local);
286
287 /* Perform rest of ScanResults handling later in scheduled task */
288 set_bit(PRISM2_INFO_PENDING_SCANRESULTS, &local->pending_info);
289 schedule_work(&local->info_queue);
290}
291
292
293/* Called only as a tasklet (software IRQ) */
294static void prism2_info_hostscanresults(local_info_t *local,
295 unsigned char *buf, int left)
296{
297 int i, result_size, copy_len, new_count;
298 struct hfa384x_hostscan_result *results, *prev;
299 unsigned long flags;
300 u16 *pos;
301 u8 *ptr;
302
303 wake_up_interruptible(&local->hostscan_wq);
304
305 if (left < 4) {
306 printk(KERN_DEBUG "%s: invalid hostscanresult info frame "
307 "length %d\n", local->dev->name, left);
308 return;
309 }
310
311 pos = (u16 *) buf;
312 copy_len = result_size = le16_to_cpu(*pos);
313 if (result_size == 0) {
314 printk(KERN_DEBUG "%s: invalid result_size (0) in "
315 "hostscanresults\n", local->dev->name);
316 return;
317 }
318 if (copy_len > sizeof(struct hfa384x_hostscan_result))
319 copy_len = sizeof(struct hfa384x_hostscan_result);
320
321 pos++;
322 pos++;
323 left -= 4;
324 ptr = (u8 *) pos;
325
326 new_count = left / result_size;
327 results = kmalloc(new_count * sizeof(struct hfa384x_hostscan_result),
328 GFP_ATOMIC);
329 if (results == NULL)
330 return;
331 memset(results, 0, new_count * sizeof(struct hfa384x_hostscan_result));
332
333 for (i = 0; i < new_count; i++) {
334 memcpy(&results[i], ptr, copy_len);
335 ptr += result_size;
336 left -= result_size;
337 }
338
339 if (left) {
340 printk(KERN_DEBUG "%s: short HostScan result entry (%d/%d)\n",
341 local->dev->name, left, result_size);
342 }
343
344 spin_lock_irqsave(&local->lock, flags);
345 local->last_scan_type = PRISM2_HOSTSCAN;
346 prev = local->last_scan_results;
347 local->last_scan_results = results;
348 local->last_scan_results_count = new_count;
349 spin_unlock_irqrestore(&local->lock, flags);
350 kfree(prev);
351
352 hostap_report_scan_complete(local);
353}
354#endif /* PRISM2_NO_STATION_MODES */
355
356
357/* Called only as a tasklet (software IRQ) */
358void hostap_info_process(local_info_t *local, struct sk_buff *skb)
359{
360 struct hfa384x_info_frame *info;
361 unsigned char *buf;
362 int left;
363#ifndef PRISM2_NO_DEBUG
364 int i;
365#endif /* PRISM2_NO_DEBUG */
366
367 info = (struct hfa384x_info_frame *) skb->data;
368 buf = skb->data + sizeof(*info);
369 left = skb->len - sizeof(*info);
370
371 switch (info->type) {
372 case HFA384X_INFO_COMMTALLIES:
373 prism2_info_commtallies(local, buf, left);
374 break;
375
376#ifndef PRISM2_NO_STATION_MODES
377 case HFA384X_INFO_LINKSTATUS:
378 prism2_info_linkstatus(local, buf, left);
379 break;
380
381 case HFA384X_INFO_SCANRESULTS:
382 prism2_info_scanresults(local, buf, left);
383 break;
384
385 case HFA384X_INFO_HOSTSCANRESULTS:
386 prism2_info_hostscanresults(local, buf, left);
387 break;
388#endif /* PRISM2_NO_STATION_MODES */
389
390#ifndef PRISM2_NO_DEBUG
391 default:
392 PDEBUG(DEBUG_EXTRA, "%s: INFO - len=%d type=0x%04x\n",
393 local->dev->name, info->len, info->type);
394 PDEBUG(DEBUG_EXTRA, "Unknown info frame:");
395 for (i = 0; i < (left < 100 ? left : 100); i++)
396 PDEBUG2(DEBUG_EXTRA, " %02x", buf[i]);
397 PDEBUG2(DEBUG_EXTRA, "\n");
398 break;
399#endif /* PRISM2_NO_DEBUG */
400 }
401}
402
403
404#ifndef PRISM2_NO_STATION_MODES
405static void handle_info_queue_linkstatus(local_info_t *local)
406{
407 int val = local->prev_link_status;
408 int connected;
409 union iwreq_data wrqu;
410
411 connected =
412 val == HFA384X_LINKSTATUS_CONNECTED ||
413 val == HFA384X_LINKSTATUS_AP_CHANGE ||
414 val == HFA384X_LINKSTATUS_AP_IN_RANGE;
415
416 if (local->func->get_rid(local->dev, HFA384X_RID_CURRENTBSSID,
417 local->bssid, ETH_ALEN, 1) < 0) {
418 printk(KERN_DEBUG "%s: could not read CURRENTBSSID after "
419 "LinkStatus event\n", local->dev->name);
420 } else {
421 PDEBUG(DEBUG_EXTRA, "%s: LinkStatus: BSSID=" MACSTR "\n",
422 local->dev->name,
423 MAC2STR((unsigned char *) local->bssid));
424 if (local->wds_type & HOSTAP_WDS_AP_CLIENT)
425 hostap_add_sta(local->ap, local->bssid);
426 }
427
428 /* Get BSSID if we have a valid AP address */
429 if (connected) {
430 netif_carrier_on(local->dev);
431 netif_carrier_on(local->ddev);
432 memcpy(wrqu.ap_addr.sa_data, local->bssid, ETH_ALEN);
433 } else {
434 netif_carrier_off(local->dev);
435 netif_carrier_off(local->ddev);
436 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
437 }
438 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
439
440 /*
441 * Filter out sequential disconnect events in order not to cause a
442 * flood of SIOCGIWAP events that have a race condition with EAPOL
443 * frames and can confuse wpa_supplicant about the current association
444 * status.
445 */
446 if (connected || local->prev_linkstatus_connected)
447 wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL);
448 local->prev_linkstatus_connected = connected;
449}
450
451
452static void handle_info_queue_scanresults(local_info_t *local)
453{
454 if (local->host_roaming == 1 && local->iw_mode == IW_MODE_INFRA)
455 prism2_host_roaming(local);
456
457 if (local->host_roaming == 2 && local->iw_mode == IW_MODE_INFRA &&
458 memcmp(local->preferred_ap, "\x00\x00\x00\x00\x00\x00",
459 ETH_ALEN) != 0) {
460 /*
461 * Firmware seems to be getting into odd state in host_roaming
462 * mode 2 when hostscan is used without join command, so try
463 * to fix this by re-joining the current AP. This does not
464 * actually trigger a new association if the current AP is
465 * still in the scan results.
466 */
467 prism2_host_roaming(local);
468 }
469}
470
471
472/* Called only as scheduled task after receiving info frames (used to avoid
473 * pending too much time in HW IRQ handler). */
474static void handle_info_queue(void *data)
475{
476 local_info_t *local = (local_info_t *) data;
477
478 if (test_and_clear_bit(PRISM2_INFO_PENDING_LINKSTATUS,
479 &local->pending_info))
480 handle_info_queue_linkstatus(local);
481
482 if (test_and_clear_bit(PRISM2_INFO_PENDING_SCANRESULTS,
483 &local->pending_info))
484 handle_info_queue_scanresults(local);
485}
486#endif /* PRISM2_NO_STATION_MODES */
487
488
489void hostap_info_init(local_info_t *local)
490{
491 skb_queue_head_init(&local->info_list);
492#ifndef PRISM2_NO_STATION_MODES
493 INIT_WORK(&local->info_queue, handle_info_queue, local);
494#endif /* PRISM2_NO_STATION_MODES */
495}
496
497
498EXPORT_SYMBOL(hostap_info_init);
499EXPORT_SYMBOL(hostap_info_process);
diff --git a/drivers/net/wireless/hostap/hostap_ioctl.c b/drivers/net/wireless/hostap/hostap_ioctl.c
new file mode 100644
index 000000000000..e720369a3515
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_ioctl.c
@@ -0,0 +1,4102 @@
1/* ioctl() (mostly Linux Wireless Extensions) routines for Host AP driver */
2
3#ifdef in_atomic
4/* Get kernel_locked() for in_atomic() */
5#include <linux/smp_lock.h>
6#endif
7#include <linux/ethtool.h>
8
9
10static struct iw_statistics *hostap_get_wireless_stats(struct net_device *dev)
11{
12 struct hostap_interface *iface;
13 local_info_t *local;
14 struct iw_statistics *wstats;
15
16 iface = netdev_priv(dev);
17 local = iface->local;
18
19 /* Why are we doing that ? Jean II */
20 if (iface->type != HOSTAP_INTERFACE_MAIN)
21 return NULL;
22
23 wstats = &local->wstats;
24
25 wstats->status = 0;
26 wstats->discard.code =
27 local->comm_tallies.rx_discards_wep_undecryptable;
28 wstats->discard.misc =
29 local->comm_tallies.rx_fcs_errors +
30 local->comm_tallies.rx_discards_no_buffer +
31 local->comm_tallies.tx_discards_wrong_sa;
32
33 wstats->discard.retries =
34 local->comm_tallies.tx_retry_limit_exceeded;
35 wstats->discard.fragment =
36 local->comm_tallies.rx_message_in_bad_msg_fragments;
37
38 if (local->iw_mode != IW_MODE_MASTER &&
39 local->iw_mode != IW_MODE_REPEAT) {
40 int update = 1;
41#ifdef in_atomic
42 /* RID reading might sleep and it must not be called in
43 * interrupt context or while atomic. However, this
44 * function seems to be called while atomic (at least in Linux
45 * 2.5.59). Update signal quality values only if in suitable
46 * context. Otherwise, previous values read from tick timer
47 * will be used. */
48 if (in_atomic())
49 update = 0;
50#endif /* in_atomic */
51
52 if (update && prism2_update_comms_qual(dev) == 0)
53 wstats->qual.updated = 7;
54
55 wstats->qual.qual = local->comms_qual;
56 wstats->qual.level = local->avg_signal;
57 wstats->qual.noise = local->avg_noise;
58 } else {
59 wstats->qual.qual = 0;
60 wstats->qual.level = 0;
61 wstats->qual.noise = 0;
62 wstats->qual.updated = 0;
63 }
64
65 return wstats;
66}
67
68
69static int prism2_get_datarates(struct net_device *dev, u8 *rates)
70{
71 struct hostap_interface *iface;
72 local_info_t *local;
73 u8 buf[12];
74 int len;
75 u16 val;
76
77 iface = netdev_priv(dev);
78 local = iface->local;
79
80 len = local->func->get_rid(dev, HFA384X_RID_SUPPORTEDDATARATES, buf,
81 sizeof(buf), 0);
82 if (len < 2)
83 return 0;
84
85 val = le16_to_cpu(*(u16 *) buf); /* string length */
86
87 if (len - 2 < val || val > 10)
88 return 0;
89
90 memcpy(rates, buf + 2, val);
91 return val;
92}
93
94
95static int prism2_get_name(struct net_device *dev,
96 struct iw_request_info *info,
97 char *name, char *extra)
98{
99 u8 rates[10];
100 int len, i, over2 = 0;
101
102 len = prism2_get_datarates(dev, rates);
103
104 for (i = 0; i < len; i++) {
105 if (rates[i] == 0x0b || rates[i] == 0x16) {
106 over2 = 1;
107 break;
108 }
109 }
110
111 strcpy(name, over2 ? "IEEE 802.11b" : "IEEE 802.11-DS");
112
113 return 0;
114}
115
116
117static void prism2_crypt_delayed_deinit(local_info_t *local,
118 struct ieee80211_crypt_data **crypt)
119{
120 struct ieee80211_crypt_data *tmp;
121 unsigned long flags;
122
123 tmp = *crypt;
124 *crypt = NULL;
125
126 if (tmp == NULL)
127 return;
128
129 /* must not run ops->deinit() while there may be pending encrypt or
130 * decrypt operations. Use a list of delayed deinits to avoid needing
131 * locking. */
132
133 spin_lock_irqsave(&local->lock, flags);
134 list_add(&tmp->list, &local->crypt_deinit_list);
135 if (!timer_pending(&local->crypt_deinit_timer)) {
136 local->crypt_deinit_timer.expires = jiffies + HZ;
137 add_timer(&local->crypt_deinit_timer);
138 }
139 spin_unlock_irqrestore(&local->lock, flags);
140}
141
142
143static int prism2_ioctl_siwencode(struct net_device *dev,
144 struct iw_request_info *info,
145 struct iw_point *erq, char *keybuf)
146{
147 struct hostap_interface *iface;
148 local_info_t *local;
149 int i;
150 struct ieee80211_crypt_data **crypt;
151
152 iface = netdev_priv(dev);
153 local = iface->local;
154
155 i = erq->flags & IW_ENCODE_INDEX;
156 if (i < 1 || i > 4)
157 i = local->tx_keyidx;
158 else
159 i--;
160 if (i < 0 || i >= WEP_KEYS)
161 return -EINVAL;
162
163 crypt = &local->crypt[i];
164
165 if (erq->flags & IW_ENCODE_DISABLED) {
166 if (*crypt)
167 prism2_crypt_delayed_deinit(local, crypt);
168 goto done;
169 }
170
171 if (*crypt != NULL && (*crypt)->ops != NULL &&
172 strcmp((*crypt)->ops->name, "WEP") != 0) {
173 /* changing to use WEP; deinit previously used algorithm */
174 prism2_crypt_delayed_deinit(local, crypt);
175 }
176
177 if (*crypt == NULL) {
178 struct ieee80211_crypt_data *new_crypt;
179
180 /* take WEP into use */
181 new_crypt = (struct ieee80211_crypt_data *)
182 kmalloc(sizeof(struct ieee80211_crypt_data),
183 GFP_KERNEL);
184 if (new_crypt == NULL)
185 return -ENOMEM;
186 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
187 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
188 if (!new_crypt->ops) {
189 request_module("ieee80211_crypt_wep");
190 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
191 }
192 if (new_crypt->ops)
193 new_crypt->priv = new_crypt->ops->init(i);
194 if (!new_crypt->ops || !new_crypt->priv) {
195 kfree(new_crypt);
196 new_crypt = NULL;
197
198 printk(KERN_WARNING "%s: could not initialize WEP: "
199 "load module hostap_crypt_wep.o\n",
200 dev->name);
201 return -EOPNOTSUPP;
202 }
203 *crypt = new_crypt;
204 }
205
206 if (erq->length > 0) {
207 int len = erq->length <= 5 ? 5 : 13;
208 int first = 1, j;
209 if (len > erq->length)
210 memset(keybuf + erq->length, 0, len - erq->length);
211 (*crypt)->ops->set_key(keybuf, len, NULL, (*crypt)->priv);
212 for (j = 0; j < WEP_KEYS; j++) {
213 if (j != i && local->crypt[j]) {
214 first = 0;
215 break;
216 }
217 }
218 if (first)
219 local->tx_keyidx = i;
220 } else {
221 /* No key data - just set the default TX key index */
222 local->tx_keyidx = i;
223 }
224
225 done:
226 local->open_wep = erq->flags & IW_ENCODE_OPEN;
227
228 if (hostap_set_encryption(local)) {
229 printk(KERN_DEBUG "%s: set_encryption failed\n", dev->name);
230 return -EINVAL;
231 }
232
233 /* Do not reset port0 if card is in Managed mode since resetting will
234 * generate new IEEE 802.11 authentication which may end up in looping
235 * with IEEE 802.1X. Prism2 documentation seem to require port reset
236 * after WEP configuration. However, keys are apparently changed at
237 * least in Managed mode. */
238 if (local->iw_mode != IW_MODE_INFRA && local->func->reset_port(dev)) {
239 printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
240 return -EINVAL;
241 }
242
243 return 0;
244}
245
246
247static int prism2_ioctl_giwencode(struct net_device *dev,
248 struct iw_request_info *info,
249 struct iw_point *erq, char *key)
250{
251 struct hostap_interface *iface;
252 local_info_t *local;
253 int i, len;
254 u16 val;
255 struct ieee80211_crypt_data *crypt;
256
257 iface = netdev_priv(dev);
258 local = iface->local;
259
260 i = erq->flags & IW_ENCODE_INDEX;
261 if (i < 1 || i > 4)
262 i = local->tx_keyidx;
263 else
264 i--;
265 if (i < 0 || i >= WEP_KEYS)
266 return -EINVAL;
267
268 crypt = local->crypt[i];
269 erq->flags = i + 1;
270
271 if (crypt == NULL || crypt->ops == NULL) {
272 erq->length = 0;
273 erq->flags |= IW_ENCODE_DISABLED;
274 return 0;
275 }
276
277 if (strcmp(crypt->ops->name, "WEP") != 0) {
278 /* only WEP is supported with wireless extensions, so just
279 * report that encryption is used */
280 erq->length = 0;
281 erq->flags |= IW_ENCODE_ENABLED;
282 return 0;
283 }
284
285 /* Reads from HFA384X_RID_CNFDEFAULTKEY* return bogus values, so show
286 * the keys from driver buffer */
287 len = crypt->ops->get_key(key, WEP_KEY_LEN, NULL, crypt->priv);
288 erq->length = (len >= 0 ? len : 0);
289
290 if (local->func->get_rid(dev, HFA384X_RID_CNFWEPFLAGS, &val, 2, 1) < 0)
291 {
292 printk("CNFWEPFLAGS reading failed\n");
293 return -EOPNOTSUPP;
294 }
295 le16_to_cpus(&val);
296 if (val & HFA384X_WEPFLAGS_PRIVACYINVOKED)
297 erq->flags |= IW_ENCODE_ENABLED;
298 else
299 erq->flags |= IW_ENCODE_DISABLED;
300 if (val & HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED)
301 erq->flags |= IW_ENCODE_RESTRICTED;
302 else
303 erq->flags |= IW_ENCODE_OPEN;
304
305 return 0;
306}
307
308
309static int hostap_set_rate(struct net_device *dev)
310{
311 struct hostap_interface *iface;
312 local_info_t *local;
313 int ret, basic_rates;
314
315 iface = netdev_priv(dev);
316 local = iface->local;
317
318 basic_rates = local->basic_rates & local->tx_rate_control;
319 if (!basic_rates || basic_rates != local->basic_rates) {
320 printk(KERN_INFO "%s: updating basic rate set automatically "
321 "to match with the new supported rate set\n",
322 dev->name);
323 if (!basic_rates)
324 basic_rates = local->tx_rate_control;
325
326 local->basic_rates = basic_rates;
327 if (hostap_set_word(dev, HFA384X_RID_CNFBASICRATES,
328 basic_rates))
329 printk(KERN_WARNING "%s: failed to set "
330 "cnfBasicRates\n", dev->name);
331 }
332
333 ret = (hostap_set_word(dev, HFA384X_RID_TXRATECONTROL,
334 local->tx_rate_control) ||
335 hostap_set_word(dev, HFA384X_RID_CNFSUPPORTEDRATES,
336 local->tx_rate_control) ||
337 local->func->reset_port(dev));
338
339 if (ret) {
340 printk(KERN_WARNING "%s: TXRateControl/cnfSupportedRates "
341 "setting to 0x%x failed\n",
342 dev->name, local->tx_rate_control);
343 }
344
345 /* Update TX rate configuration for all STAs based on new operational
346 * rate set. */
347 hostap_update_rates(local);
348
349 return ret;
350}
351
352
353static int prism2_ioctl_siwrate(struct net_device *dev,
354 struct iw_request_info *info,
355 struct iw_param *rrq, char *extra)
356{
357 struct hostap_interface *iface;
358 local_info_t *local;
359
360 iface = netdev_priv(dev);
361 local = iface->local;
362
363 if (rrq->fixed) {
364 switch (rrq->value) {
365 case 11000000:
366 local->tx_rate_control = HFA384X_RATES_11MBPS;
367 break;
368 case 5500000:
369 local->tx_rate_control = HFA384X_RATES_5MBPS;
370 break;
371 case 2000000:
372 local->tx_rate_control = HFA384X_RATES_2MBPS;
373 break;
374 case 1000000:
375 local->tx_rate_control = HFA384X_RATES_1MBPS;
376 break;
377 default:
378 local->tx_rate_control = HFA384X_RATES_1MBPS |
379 HFA384X_RATES_2MBPS | HFA384X_RATES_5MBPS |
380 HFA384X_RATES_11MBPS;
381 break;
382 }
383 } else {
384 switch (rrq->value) {
385 case 11000000:
386 local->tx_rate_control = HFA384X_RATES_1MBPS |
387 HFA384X_RATES_2MBPS | HFA384X_RATES_5MBPS |
388 HFA384X_RATES_11MBPS;
389 break;
390 case 5500000:
391 local->tx_rate_control = HFA384X_RATES_1MBPS |
392 HFA384X_RATES_2MBPS | HFA384X_RATES_5MBPS;
393 break;
394 case 2000000:
395 local->tx_rate_control = HFA384X_RATES_1MBPS |
396 HFA384X_RATES_2MBPS;
397 break;
398 case 1000000:
399 local->tx_rate_control = HFA384X_RATES_1MBPS;
400 break;
401 default:
402 local->tx_rate_control = HFA384X_RATES_1MBPS |
403 HFA384X_RATES_2MBPS | HFA384X_RATES_5MBPS |
404 HFA384X_RATES_11MBPS;
405 break;
406 }
407 }
408
409 return hostap_set_rate(dev);
410}
411
412
413static int prism2_ioctl_giwrate(struct net_device *dev,
414 struct iw_request_info *info,
415 struct iw_param *rrq, char *extra)
416{
417 u16 val;
418 struct hostap_interface *iface;
419 local_info_t *local;
420 int ret = 0;
421
422 iface = netdev_priv(dev);
423 local = iface->local;
424
425 if (local->func->get_rid(dev, HFA384X_RID_TXRATECONTROL, &val, 2, 1) <
426 0)
427 return -EINVAL;
428
429 if ((val & 0x1) && (val > 1))
430 rrq->fixed = 0;
431 else
432 rrq->fixed = 1;
433
434 if (local->iw_mode == IW_MODE_MASTER && local->ap != NULL &&
435 !local->fw_tx_rate_control) {
436 /* HFA384X_RID_CURRENTTXRATE seems to always be 2 Mbps in
437 * Host AP mode, so use the recorded TX rate of the last sent
438 * frame */
439 rrq->value = local->ap->last_tx_rate > 0 ?
440 local->ap->last_tx_rate * 100000 : 11000000;
441 return 0;
442 }
443
444 if (local->func->get_rid(dev, HFA384X_RID_CURRENTTXRATE, &val, 2, 1) <
445 0)
446 return -EINVAL;
447
448 switch (val) {
449 case HFA384X_RATES_1MBPS:
450 rrq->value = 1000000;
451 break;
452 case HFA384X_RATES_2MBPS:
453 rrq->value = 2000000;
454 break;
455 case HFA384X_RATES_5MBPS:
456 rrq->value = 5500000;
457 break;
458 case HFA384X_RATES_11MBPS:
459 rrq->value = 11000000;
460 break;
461 default:
462 /* should not happen */
463 rrq->value = 11000000;
464 ret = -EINVAL;
465 break;
466 }
467
468 return ret;
469}
470
471
472static int prism2_ioctl_siwsens(struct net_device *dev,
473 struct iw_request_info *info,
474 struct iw_param *sens, char *extra)
475{
476 struct hostap_interface *iface;
477 local_info_t *local;
478
479 iface = netdev_priv(dev);
480 local = iface->local;
481
482 /* Set the desired AP density */
483 if (sens->value < 1 || sens->value > 3)
484 return -EINVAL;
485
486 if (hostap_set_word(dev, HFA384X_RID_CNFSYSTEMSCALE, sens->value) ||
487 local->func->reset_port(dev))
488 return -EINVAL;
489
490 return 0;
491}
492
493static int prism2_ioctl_giwsens(struct net_device *dev,
494 struct iw_request_info *info,
495 struct iw_param *sens, char *extra)
496{
497 struct hostap_interface *iface;
498 local_info_t *local;
499 u16 val;
500
501 iface = netdev_priv(dev);
502 local = iface->local;
503
504 /* Get the current AP density */
505 if (local->func->get_rid(dev, HFA384X_RID_CNFSYSTEMSCALE, &val, 2, 1) <
506 0)
507 return -EINVAL;
508
509 sens->value = __le16_to_cpu(val);
510 sens->fixed = 1;
511
512 return 0;
513}
514
515
516/* Deprecated in new wireless extension API */
517static int prism2_ioctl_giwaplist(struct net_device *dev,
518 struct iw_request_info *info,
519 struct iw_point *data, char *extra)
520{
521 struct hostap_interface *iface;
522 local_info_t *local;
523 struct sockaddr *addr;
524 struct iw_quality *qual;
525
526 iface = netdev_priv(dev);
527 local = iface->local;
528
529 if (local->iw_mode != IW_MODE_MASTER) {
530 printk(KERN_DEBUG "SIOCGIWAPLIST is currently only supported "
531 "in Host AP mode\n");
532 data->length = 0;
533 return -EOPNOTSUPP;
534 }
535
536 addr = kmalloc(sizeof(struct sockaddr) * IW_MAX_AP, GFP_KERNEL);
537 qual = kmalloc(sizeof(struct iw_quality) * IW_MAX_AP, GFP_KERNEL);
538 if (addr == NULL || qual == NULL) {
539 kfree(addr);
540 kfree(qual);
541 data->length = 0;
542 return -ENOMEM;
543 }
544
545 data->length = prism2_ap_get_sta_qual(local, addr, qual, IW_MAX_AP, 1);
546
547 memcpy(extra, &addr, sizeof(struct sockaddr) * data->length);
548 data->flags = 1; /* has quality information */
549 memcpy(extra + sizeof(struct sockaddr) * data->length, &qual,
550 sizeof(struct iw_quality) * data->length);
551
552 kfree(addr);
553 kfree(qual);
554
555 return 0;
556}
557
558
559static int prism2_ioctl_siwrts(struct net_device *dev,
560 struct iw_request_info *info,
561 struct iw_param *rts, char *extra)
562{
563 struct hostap_interface *iface;
564 local_info_t *local;
565 u16 val;
566
567 iface = netdev_priv(dev);
568 local = iface->local;
569
570 if (rts->disabled)
571 val = __constant_cpu_to_le16(2347);
572 else if (rts->value < 0 || rts->value > 2347)
573 return -EINVAL;
574 else
575 val = __cpu_to_le16(rts->value);
576
577 if (local->func->set_rid(dev, HFA384X_RID_RTSTHRESHOLD, &val, 2) ||
578 local->func->reset_port(dev))
579 return -EINVAL;
580
581 local->rts_threshold = rts->value;
582
583 return 0;
584}
585
586static int prism2_ioctl_giwrts(struct net_device *dev,
587 struct iw_request_info *info,
588 struct iw_param *rts, char *extra)
589{
590 struct hostap_interface *iface;
591 local_info_t *local;
592 u16 val;
593
594 iface = netdev_priv(dev);
595 local = iface->local;
596
597 if (local->func->get_rid(dev, HFA384X_RID_RTSTHRESHOLD, &val, 2, 1) <
598 0)
599 return -EINVAL;
600
601 rts->value = __le16_to_cpu(val);
602 rts->disabled = (rts->value == 2347);
603 rts->fixed = 1;
604
605 return 0;
606}
607
608
609static int prism2_ioctl_siwfrag(struct net_device *dev,
610 struct iw_request_info *info,
611 struct iw_param *rts, char *extra)
612{
613 struct hostap_interface *iface;
614 local_info_t *local;
615 u16 val;
616
617 iface = netdev_priv(dev);
618 local = iface->local;
619
620 if (rts->disabled)
621 val = __constant_cpu_to_le16(2346);
622 else if (rts->value < 256 || rts->value > 2346)
623 return -EINVAL;
624 else
625 val = __cpu_to_le16(rts->value & ~0x1); /* even numbers only */
626
627 local->fragm_threshold = rts->value & ~0x1;
628 if (local->func->set_rid(dev, HFA384X_RID_FRAGMENTATIONTHRESHOLD, &val,
629 2)
630 || local->func->reset_port(dev))
631 return -EINVAL;
632
633 return 0;
634}
635
636static int prism2_ioctl_giwfrag(struct net_device *dev,
637 struct iw_request_info *info,
638 struct iw_param *rts, char *extra)
639{
640 struct hostap_interface *iface;
641 local_info_t *local;
642 u16 val;
643
644 iface = netdev_priv(dev);
645 local = iface->local;
646
647 if (local->func->get_rid(dev, HFA384X_RID_FRAGMENTATIONTHRESHOLD,
648 &val, 2, 1) < 0)
649 return -EINVAL;
650
651 rts->value = __le16_to_cpu(val);
652 rts->disabled = (rts->value == 2346);
653 rts->fixed = 1;
654
655 return 0;
656}
657
658
659#ifndef PRISM2_NO_STATION_MODES
660static int hostap_join_ap(struct net_device *dev)
661{
662 struct hostap_interface *iface;
663 local_info_t *local;
664 struct hfa384x_join_request req;
665 unsigned long flags;
666 int i;
667 struct hfa384x_hostscan_result *entry;
668
669 iface = netdev_priv(dev);
670 local = iface->local;
671
672 memcpy(req.bssid, local->preferred_ap, ETH_ALEN);
673 req.channel = 0;
674
675 spin_lock_irqsave(&local->lock, flags);
676 for (i = 0; i < local->last_scan_results_count; i++) {
677 if (!local->last_scan_results)
678 break;
679 entry = &local->last_scan_results[i];
680 if (memcmp(local->preferred_ap, entry->bssid, ETH_ALEN) == 0) {
681 req.channel = entry->chid;
682 break;
683 }
684 }
685 spin_unlock_irqrestore(&local->lock, flags);
686
687 if (local->func->set_rid(dev, HFA384X_RID_JOINREQUEST, &req,
688 sizeof(req))) {
689 printk(KERN_DEBUG "%s: JoinRequest " MACSTR
690 " failed\n",
691 dev->name, MAC2STR(local->preferred_ap));
692 return -1;
693 }
694
695 printk(KERN_DEBUG "%s: Trying to join BSSID " MACSTR "\n",
696 dev->name, MAC2STR(local->preferred_ap));
697
698 return 0;
699}
700#endif /* PRISM2_NO_STATION_MODES */
701
702
703static int prism2_ioctl_siwap(struct net_device *dev,
704 struct iw_request_info *info,
705 struct sockaddr *ap_addr, char *extra)
706{
707#ifdef PRISM2_NO_STATION_MODES
708 return -EOPNOTSUPP;
709#else /* PRISM2_NO_STATION_MODES */
710 struct hostap_interface *iface;
711 local_info_t *local;
712
713 iface = netdev_priv(dev);
714 local = iface->local;
715
716 memcpy(local->preferred_ap, &ap_addr->sa_data, ETH_ALEN);
717
718 if (local->host_roaming == 1 && local->iw_mode == IW_MODE_INFRA) {
719 struct hfa384x_scan_request scan_req;
720 memset(&scan_req, 0, sizeof(scan_req));
721 scan_req.channel_list = __constant_cpu_to_le16(0x3fff);
722 scan_req.txrate = __constant_cpu_to_le16(HFA384X_RATES_1MBPS);
723 if (local->func->set_rid(dev, HFA384X_RID_SCANREQUEST,
724 &scan_req, sizeof(scan_req))) {
725 printk(KERN_DEBUG "%s: ScanResults request failed - "
726 "preferred AP delayed to next unsolicited "
727 "scan\n", dev->name);
728 }
729 } else if (local->host_roaming == 2 &&
730 local->iw_mode == IW_MODE_INFRA) {
731 if (hostap_join_ap(dev))
732 return -EINVAL;
733 } else {
734 printk(KERN_DEBUG "%s: Preferred AP (SIOCSIWAP) is used only "
735 "in Managed mode when host_roaming is enabled\n",
736 dev->name);
737 }
738
739 return 0;
740#endif /* PRISM2_NO_STATION_MODES */
741}
742
743static int prism2_ioctl_giwap(struct net_device *dev,
744 struct iw_request_info *info,
745 struct sockaddr *ap_addr, char *extra)
746{
747 struct hostap_interface *iface;
748 local_info_t *local;
749
750 iface = netdev_priv(dev);
751 local = iface->local;
752
753 ap_addr->sa_family = ARPHRD_ETHER;
754 switch (iface->type) {
755 case HOSTAP_INTERFACE_AP:
756 memcpy(&ap_addr->sa_data, dev->dev_addr, ETH_ALEN);
757 break;
758 case HOSTAP_INTERFACE_STA:
759 memcpy(&ap_addr->sa_data, local->assoc_ap_addr, ETH_ALEN);
760 break;
761 case HOSTAP_INTERFACE_WDS:
762 memcpy(&ap_addr->sa_data, iface->u.wds.remote_addr, ETH_ALEN);
763 break;
764 default:
765 if (local->func->get_rid(dev, HFA384X_RID_CURRENTBSSID,
766 &ap_addr->sa_data, ETH_ALEN, 1) < 0)
767 return -EOPNOTSUPP;
768
769 /* local->bssid is also updated in LinkStatus handler when in
770 * station mode */
771 memcpy(local->bssid, &ap_addr->sa_data, ETH_ALEN);
772 break;
773 }
774
775 return 0;
776}
777
778
779static int prism2_ioctl_siwnickn(struct net_device *dev,
780 struct iw_request_info *info,
781 struct iw_point *data, char *nickname)
782{
783 struct hostap_interface *iface;
784 local_info_t *local;
785
786 iface = netdev_priv(dev);
787 local = iface->local;
788
789 memset(local->name, 0, sizeof(local->name));
790 memcpy(local->name, nickname, data->length);
791 local->name_set = 1;
792
793 if (hostap_set_string(dev, HFA384X_RID_CNFOWNNAME, local->name) ||
794 local->func->reset_port(dev))
795 return -EINVAL;
796
797 return 0;
798}
799
800static int prism2_ioctl_giwnickn(struct net_device *dev,
801 struct iw_request_info *info,
802 struct iw_point *data, char *nickname)
803{
804 struct hostap_interface *iface;
805 local_info_t *local;
806 int len;
807 char name[MAX_NAME_LEN + 3];
808 u16 val;
809
810 iface = netdev_priv(dev);
811 local = iface->local;
812
813 len = local->func->get_rid(dev, HFA384X_RID_CNFOWNNAME,
814 &name, MAX_NAME_LEN + 2, 0);
815 val = __le16_to_cpu(*(u16 *) name);
816 if (len > MAX_NAME_LEN + 2 || len < 0 || val > MAX_NAME_LEN)
817 return -EOPNOTSUPP;
818
819 name[val + 2] = '\0';
820 data->length = val + 1;
821 memcpy(nickname, name + 2, val + 1);
822
823 return 0;
824}
825
826
827static int prism2_ioctl_siwfreq(struct net_device *dev,
828 struct iw_request_info *info,
829 struct iw_freq *freq, char *extra)
830{
831 struct hostap_interface *iface;
832 local_info_t *local;
833
834 iface = netdev_priv(dev);
835 local = iface->local;
836
837 /* freq => chan. */
838 if (freq->e == 1 &&
839 freq->m / 100000 >= freq_list[0] &&
840 freq->m / 100000 <= freq_list[FREQ_COUNT - 1]) {
841 int ch;
842 int fr = freq->m / 100000;
843 for (ch = 0; ch < FREQ_COUNT; ch++) {
844 if (fr == freq_list[ch]) {
845 freq->e = 0;
846 freq->m = ch + 1;
847 break;
848 }
849 }
850 }
851
852 if (freq->e != 0 || freq->m < 1 || freq->m > FREQ_COUNT ||
853 !(local->channel_mask & (1 << (freq->m - 1))))
854 return -EINVAL;
855
856 local->channel = freq->m; /* channel is used in prism2_setup_rids() */
857 if (hostap_set_word(dev, HFA384X_RID_CNFOWNCHANNEL, local->channel) ||
858 local->func->reset_port(dev))
859 return -EINVAL;
860
861 return 0;
862}
863
864static int prism2_ioctl_giwfreq(struct net_device *dev,
865 struct iw_request_info *info,
866 struct iw_freq *freq, char *extra)
867{
868 struct hostap_interface *iface;
869 local_info_t *local;
870 u16 val;
871
872 iface = netdev_priv(dev);
873 local = iface->local;
874
875 if (local->func->get_rid(dev, HFA384X_RID_CURRENTCHANNEL, &val, 2, 1) <
876 0)
877 return -EINVAL;
878
879 le16_to_cpus(&val);
880 if (val < 1 || val > FREQ_COUNT)
881 return -EINVAL;
882
883 freq->m = freq_list[val - 1] * 100000;
884 freq->e = 1;
885
886 return 0;
887}
888
889
890static void hostap_monitor_set_type(local_info_t *local)
891{
892 struct net_device *dev = local->ddev;
893
894 if (dev == NULL)
895 return;
896
897 if (local->monitor_type == PRISM2_MONITOR_PRISM ||
898 local->monitor_type == PRISM2_MONITOR_CAPHDR) {
899 dev->type = ARPHRD_IEEE80211_PRISM;
900 dev->hard_header_parse =
901 hostap_80211_prism_header_parse;
902 } else {
903 dev->type = ARPHRD_IEEE80211;
904 dev->hard_header_parse = hostap_80211_header_parse;
905 }
906}
907
908
909static int prism2_ioctl_siwessid(struct net_device *dev,
910 struct iw_request_info *info,
911 struct iw_point *data, char *ssid)
912{
913 struct hostap_interface *iface;
914 local_info_t *local;
915
916 iface = netdev_priv(dev);
917 local = iface->local;
918
919 if (iface->type == HOSTAP_INTERFACE_WDS)
920 return -EOPNOTSUPP;
921
922 if (data->flags == 0)
923 ssid[0] = '\0'; /* ANY */
924
925 if (local->iw_mode == IW_MODE_MASTER && ssid[0] == '\0') {
926 /* Setting SSID to empty string seems to kill the card in
927 * Host AP mode */
928 printk(KERN_DEBUG "%s: Host AP mode does not support "
929 "'Any' essid\n", dev->name);
930 return -EINVAL;
931 }
932
933 memcpy(local->essid, ssid, data->length);
934 local->essid[data->length] = '\0';
935
936 if ((!local->fw_ap &&
937 hostap_set_string(dev, HFA384X_RID_CNFDESIREDSSID, local->essid))
938 || hostap_set_string(dev, HFA384X_RID_CNFOWNSSID, local->essid) ||
939 local->func->reset_port(dev))
940 return -EINVAL;
941
942 return 0;
943}
944
945static int prism2_ioctl_giwessid(struct net_device *dev,
946 struct iw_request_info *info,
947 struct iw_point *data, char *essid)
948{
949 struct hostap_interface *iface;
950 local_info_t *local;
951 u16 val;
952
953 iface = netdev_priv(dev);
954 local = iface->local;
955
956 if (iface->type == HOSTAP_INTERFACE_WDS)
957 return -EOPNOTSUPP;
958
959 data->flags = 1; /* active */
960 if (local->iw_mode == IW_MODE_MASTER) {
961 data->length = strlen(local->essid);
962 memcpy(essid, local->essid, IW_ESSID_MAX_SIZE);
963 } else {
964 int len;
965 char ssid[MAX_SSID_LEN + 2];
966 memset(ssid, 0, sizeof(ssid));
967 len = local->func->get_rid(dev, HFA384X_RID_CURRENTSSID,
968 &ssid, MAX_SSID_LEN + 2, 0);
969 val = __le16_to_cpu(*(u16 *) ssid);
970 if (len > MAX_SSID_LEN + 2 || len < 0 || val > MAX_SSID_LEN) {
971 return -EOPNOTSUPP;
972 }
973 data->length = val;
974 memcpy(essid, ssid + 2, IW_ESSID_MAX_SIZE);
975 }
976
977 return 0;
978}
979
980
981static int prism2_ioctl_giwrange(struct net_device *dev,
982 struct iw_request_info *info,
983 struct iw_point *data, char *extra)
984{
985 struct hostap_interface *iface;
986 local_info_t *local;
987 struct iw_range *range = (struct iw_range *) extra;
988 u8 rates[10];
989 u16 val;
990 int i, len, over2;
991
992 iface = netdev_priv(dev);
993 local = iface->local;
994
995 data->length = sizeof(struct iw_range);
996 memset(range, 0, sizeof(struct iw_range));
997
998 /* TODO: could fill num_txpower and txpower array with
999 * something; however, there are 128 different values.. */
1000
1001 range->txpower_capa = IW_TXPOW_DBM;
1002
1003 if (local->iw_mode == IW_MODE_INFRA || local->iw_mode == IW_MODE_ADHOC)
1004 {
1005 range->min_pmp = 1 * 1024;
1006 range->max_pmp = 65535 * 1024;
1007 range->min_pmt = 1 * 1024;
1008 range->max_pmt = 1000 * 1024;
1009 range->pmp_flags = IW_POWER_PERIOD;
1010 range->pmt_flags = IW_POWER_TIMEOUT;
1011 range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT |
1012 IW_POWER_UNICAST_R | IW_POWER_ALL_R;
1013 }
1014
1015 range->we_version_compiled = WIRELESS_EXT;
1016 range->we_version_source = 18;
1017
1018 range->retry_capa = IW_RETRY_LIMIT;
1019 range->retry_flags = IW_RETRY_LIMIT;
1020 range->min_retry = 0;
1021 range->max_retry = 255;
1022
1023 range->num_channels = FREQ_COUNT;
1024
1025 val = 0;
1026 for (i = 0; i < FREQ_COUNT; i++) {
1027 if (local->channel_mask & (1 << i)) {
1028 range->freq[val].i = i + 1;
1029 range->freq[val].m = freq_list[i] * 100000;
1030 range->freq[val].e = 1;
1031 val++;
1032 }
1033 if (val == IW_MAX_FREQUENCIES)
1034 break;
1035 }
1036 range->num_frequency = val;
1037
1038 if (local->sta_fw_ver >= PRISM2_FW_VER(1,3,1)) {
1039 range->max_qual.qual = 70; /* what is correct max? This was not
1040 * documented exactly. At least
1041 * 69 has been observed. */
1042 range->max_qual.level = 0; /* dB */
1043 range->max_qual.noise = 0; /* dB */
1044
1045 /* What would be suitable values for "average/typical" qual? */
1046 range->avg_qual.qual = 20;
1047 range->avg_qual.level = -60;
1048 range->avg_qual.noise = -95;
1049 } else {
1050 range->max_qual.qual = 92; /* 0 .. 92 */
1051 range->max_qual.level = 154; /* 27 .. 154 */
1052 range->max_qual.noise = 154; /* 27 .. 154 */
1053 }
1054 range->sensitivity = 3;
1055
1056 range->max_encoding_tokens = WEP_KEYS;
1057 range->num_encoding_sizes = 2;
1058 range->encoding_size[0] = 5;
1059 range->encoding_size[1] = 13;
1060
1061 over2 = 0;
1062 len = prism2_get_datarates(dev, rates);
1063 range->num_bitrates = 0;
1064 for (i = 0; i < len; i++) {
1065 if (range->num_bitrates < IW_MAX_BITRATES) {
1066 range->bitrate[range->num_bitrates] =
1067 rates[i] * 500000;
1068 range->num_bitrates++;
1069 }
1070 if (rates[i] == 0x0b || rates[i] == 0x16)
1071 over2 = 1;
1072 }
1073 /* estimated maximum TCP throughput values (bps) */
1074 range->throughput = over2 ? 5500000 : 1500000;
1075
1076 range->min_rts = 0;
1077 range->max_rts = 2347;
1078 range->min_frag = 256;
1079 range->max_frag = 2346;
1080
1081 /* Event capability (kernel + driver) */
1082 range->event_capa[0] = (IW_EVENT_CAPA_K_0 |
1083 IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) |
1084 IW_EVENT_CAPA_MASK(SIOCGIWAP) |
1085 IW_EVENT_CAPA_MASK(SIOCGIWSCAN));
1086 range->event_capa[1] = IW_EVENT_CAPA_K_1;
1087 range->event_capa[4] = (IW_EVENT_CAPA_MASK(IWEVTXDROP) |
1088 IW_EVENT_CAPA_MASK(IWEVCUSTOM) |
1089 IW_EVENT_CAPA_MASK(IWEVREGISTERED) |
1090 IW_EVENT_CAPA_MASK(IWEVEXPIRED));
1091
1092 range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 |
1093 IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
1094
1095 return 0;
1096}
1097
1098
1099static int hostap_monitor_mode_enable(local_info_t *local)
1100{
1101 struct net_device *dev = local->dev;
1102
1103 printk(KERN_DEBUG "Enabling monitor mode\n");
1104 hostap_monitor_set_type(local);
1105
1106 if (hostap_set_word(dev, HFA384X_RID_CNFPORTTYPE,
1107 HFA384X_PORTTYPE_PSEUDO_IBSS)) {
1108 printk(KERN_DEBUG "Port type setting for monitor mode "
1109 "failed\n");
1110 return -EOPNOTSUPP;
1111 }
1112
1113 /* Host decrypt is needed to get the IV and ICV fields;
1114 * however, monitor mode seems to remove WEP flag from frame
1115 * control field */
1116 if (hostap_set_word(dev, HFA384X_RID_CNFWEPFLAGS,
1117 HFA384X_WEPFLAGS_HOSTENCRYPT |
1118 HFA384X_WEPFLAGS_HOSTDECRYPT)) {
1119 printk(KERN_DEBUG "WEP flags setting failed\n");
1120 return -EOPNOTSUPP;
1121 }
1122
1123 if (local->func->reset_port(dev) ||
1124 local->func->cmd(dev, HFA384X_CMDCODE_TEST |
1125 (HFA384X_TEST_MONITOR << 8),
1126 0, NULL, NULL)) {
1127 printk(KERN_DEBUG "Setting monitor mode failed\n");
1128 return -EOPNOTSUPP;
1129 }
1130
1131 return 0;
1132}
1133
1134
1135static int hostap_monitor_mode_disable(local_info_t *local)
1136{
1137 struct net_device *dev = local->ddev;
1138
1139 if (dev == NULL)
1140 return -1;
1141
1142 printk(KERN_DEBUG "%s: Disabling monitor mode\n", dev->name);
1143 dev->type = ARPHRD_ETHER;
1144 dev->hard_header_parse = local->saved_eth_header_parse;
1145 if (local->func->cmd(dev, HFA384X_CMDCODE_TEST |
1146 (HFA384X_TEST_STOP << 8),
1147 0, NULL, NULL))
1148 return -1;
1149 return hostap_set_encryption(local);
1150}
1151
1152
1153static int prism2_ioctl_siwmode(struct net_device *dev,
1154 struct iw_request_info *info,
1155 __u32 *mode, char *extra)
1156{
1157 struct hostap_interface *iface;
1158 local_info_t *local;
1159 int double_reset = 0;
1160
1161 iface = netdev_priv(dev);
1162 local = iface->local;
1163
1164 if (*mode != IW_MODE_ADHOC && *mode != IW_MODE_INFRA &&
1165 *mode != IW_MODE_MASTER && *mode != IW_MODE_REPEAT &&
1166 *mode != IW_MODE_MONITOR)
1167 return -EOPNOTSUPP;
1168
1169#ifdef PRISM2_NO_STATION_MODES
1170 if (*mode == IW_MODE_ADHOC || *mode == IW_MODE_INFRA)
1171 return -EOPNOTSUPP;
1172#endif /* PRISM2_NO_STATION_MODES */
1173
1174 if (*mode == local->iw_mode)
1175 return 0;
1176
1177 if (*mode == IW_MODE_MASTER && local->essid[0] == '\0') {
1178 printk(KERN_WARNING "%s: empty SSID not allowed in Master "
1179 "mode\n", dev->name);
1180 return -EINVAL;
1181 }
1182
1183 if (local->iw_mode == IW_MODE_MONITOR)
1184 hostap_monitor_mode_disable(local);
1185
1186 if ((local->iw_mode == IW_MODE_ADHOC ||
1187 local->iw_mode == IW_MODE_MONITOR) && *mode == IW_MODE_MASTER) {
1188 /* There seems to be a firmware bug in at least STA f/w v1.5.6
1189 * that leaves beacon frames to use IBSS type when moving from
1190 * IBSS to Host AP mode. Doing double Port0 reset seems to be
1191 * enough to workaround this. */
1192 double_reset = 1;
1193 }
1194
1195 printk(KERN_DEBUG "prism2: %s: operating mode changed "
1196 "%d -> %d\n", dev->name, local->iw_mode, *mode);
1197 local->iw_mode = *mode;
1198
1199 if (local->iw_mode == IW_MODE_MONITOR)
1200 hostap_monitor_mode_enable(local);
1201 else if (local->iw_mode == IW_MODE_MASTER && !local->host_encrypt &&
1202 !local->fw_encrypt_ok) {
1203 printk(KERN_DEBUG "%s: defaulting to host-based encryption as "
1204 "a workaround for firmware bug in Host AP mode WEP\n",
1205 dev->name);
1206 local->host_encrypt = 1;
1207 }
1208
1209 if (hostap_set_word(dev, HFA384X_RID_CNFPORTTYPE,
1210 hostap_get_porttype(local)))
1211 return -EOPNOTSUPP;
1212
1213 if (local->func->reset_port(dev))
1214 return -EINVAL;
1215 if (double_reset && local->func->reset_port(dev))
1216 return -EINVAL;
1217
1218 if (local->iw_mode != IW_MODE_INFRA && local->iw_mode != IW_MODE_ADHOC)
1219 {
1220 /* netif_carrier is used only in client modes for now, so make
1221 * sure carrier is on when moving to non-client modes. */
1222 netif_carrier_on(local->dev);
1223 netif_carrier_on(local->ddev);
1224 }
1225 return 0;
1226}
1227
1228
1229static int prism2_ioctl_giwmode(struct net_device *dev,
1230 struct iw_request_info *info,
1231 __u32 *mode, char *extra)
1232{
1233 struct hostap_interface *iface;
1234 local_info_t *local;
1235
1236 iface = netdev_priv(dev);
1237 local = iface->local;
1238
1239 switch (iface->type) {
1240 case HOSTAP_INTERFACE_STA:
1241 *mode = IW_MODE_INFRA;
1242 break;
1243 case HOSTAP_INTERFACE_WDS:
1244 *mode = IW_MODE_REPEAT;
1245 break;
1246 default:
1247 *mode = local->iw_mode;
1248 break;
1249 }
1250 return 0;
1251}
1252
1253
1254static int prism2_ioctl_siwpower(struct net_device *dev,
1255 struct iw_request_info *info,
1256 struct iw_param *wrq, char *extra)
1257{
1258#ifdef PRISM2_NO_STATION_MODES
1259 return -EOPNOTSUPP;
1260#else /* PRISM2_NO_STATION_MODES */
1261 int ret = 0;
1262
1263 if (wrq->disabled)
1264 return hostap_set_word(dev, HFA384X_RID_CNFPMENABLED, 0);
1265
1266 switch (wrq->flags & IW_POWER_MODE) {
1267 case IW_POWER_UNICAST_R:
1268 ret = hostap_set_word(dev, HFA384X_RID_CNFMULTICASTRECEIVE, 0);
1269 if (ret)
1270 return ret;
1271 ret = hostap_set_word(dev, HFA384X_RID_CNFPMENABLED, 1);
1272 if (ret)
1273 return ret;
1274 break;
1275 case IW_POWER_ALL_R:
1276 ret = hostap_set_word(dev, HFA384X_RID_CNFMULTICASTRECEIVE, 1);
1277 if (ret)
1278 return ret;
1279 ret = hostap_set_word(dev, HFA384X_RID_CNFPMENABLED, 1);
1280 if (ret)
1281 return ret;
1282 break;
1283 case IW_POWER_ON:
1284 break;
1285 default:
1286 return -EINVAL;
1287 }
1288
1289 if (wrq->flags & IW_POWER_TIMEOUT) {
1290 ret = hostap_set_word(dev, HFA384X_RID_CNFPMENABLED, 1);
1291 if (ret)
1292 return ret;
1293 ret = hostap_set_word(dev, HFA384X_RID_CNFPMHOLDOVERDURATION,
1294 wrq->value / 1024);
1295 if (ret)
1296 return ret;
1297 }
1298 if (wrq->flags & IW_POWER_PERIOD) {
1299 ret = hostap_set_word(dev, HFA384X_RID_CNFPMENABLED, 1);
1300 if (ret)
1301 return ret;
1302 ret = hostap_set_word(dev, HFA384X_RID_CNFMAXSLEEPDURATION,
1303 wrq->value / 1024);
1304 if (ret)
1305 return ret;
1306 }
1307
1308 return ret;
1309#endif /* PRISM2_NO_STATION_MODES */
1310}
1311
1312
1313static int prism2_ioctl_giwpower(struct net_device *dev,
1314 struct iw_request_info *info,
1315 struct iw_param *rrq, char *extra)
1316{
1317#ifdef PRISM2_NO_STATION_MODES
1318 return -EOPNOTSUPP;
1319#else /* PRISM2_NO_STATION_MODES */
1320 struct hostap_interface *iface;
1321 local_info_t *local;
1322 u16 enable, mcast;
1323
1324 iface = netdev_priv(dev);
1325 local = iface->local;
1326
1327 if (local->func->get_rid(dev, HFA384X_RID_CNFPMENABLED, &enable, 2, 1)
1328 < 0)
1329 return -EINVAL;
1330
1331 if (!__le16_to_cpu(enable)) {
1332 rrq->disabled = 1;
1333 return 0;
1334 }
1335
1336 rrq->disabled = 0;
1337
1338 if ((rrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
1339 u16 timeout;
1340 if (local->func->get_rid(dev,
1341 HFA384X_RID_CNFPMHOLDOVERDURATION,
1342 &timeout, 2, 1) < 0)
1343 return -EINVAL;
1344
1345 rrq->flags = IW_POWER_TIMEOUT;
1346 rrq->value = __le16_to_cpu(timeout) * 1024;
1347 } else {
1348 u16 period;
1349 if (local->func->get_rid(dev, HFA384X_RID_CNFMAXSLEEPDURATION,
1350 &period, 2, 1) < 0)
1351 return -EINVAL;
1352
1353 rrq->flags = IW_POWER_PERIOD;
1354 rrq->value = __le16_to_cpu(period) * 1024;
1355 }
1356
1357 if (local->func->get_rid(dev, HFA384X_RID_CNFMULTICASTRECEIVE, &mcast,
1358 2, 1) < 0)
1359 return -EINVAL;
1360
1361 if (__le16_to_cpu(mcast))
1362 rrq->flags |= IW_POWER_ALL_R;
1363 else
1364 rrq->flags |= IW_POWER_UNICAST_R;
1365
1366 return 0;
1367#endif /* PRISM2_NO_STATION_MODES */
1368}
1369
1370
1371static int prism2_ioctl_siwretry(struct net_device *dev,
1372 struct iw_request_info *info,
1373 struct iw_param *rrq, char *extra)
1374{
1375 struct hostap_interface *iface;
1376 local_info_t *local;
1377
1378 iface = netdev_priv(dev);
1379 local = iface->local;
1380
1381 if (rrq->disabled)
1382 return -EINVAL;
1383
1384 /* setting retry limits is not supported with the current station
1385 * firmware code; simulate this with alternative retry count for now */
1386 if (rrq->flags == IW_RETRY_LIMIT) {
1387 if (rrq->value < 0) {
1388 /* disable manual retry count setting and use firmware
1389 * defaults */
1390 local->manual_retry_count = -1;
1391 local->tx_control &= ~HFA384X_TX_CTRL_ALT_RTRY;
1392 } else {
1393 if (hostap_set_word(dev, HFA384X_RID_CNFALTRETRYCOUNT,
1394 rrq->value)) {
1395 printk(KERN_DEBUG "%s: Alternate retry count "
1396 "setting to %d failed\n",
1397 dev->name, rrq->value);
1398 return -EOPNOTSUPP;
1399 }
1400
1401 local->manual_retry_count = rrq->value;
1402 local->tx_control |= HFA384X_TX_CTRL_ALT_RTRY;
1403 }
1404 return 0;
1405 }
1406
1407 return -EOPNOTSUPP;
1408
1409#if 0
1410 /* what could be done, if firmware would support this.. */
1411
1412 if (rrq->flags & IW_RETRY_LIMIT) {
1413 if (rrq->flags & IW_RETRY_MAX)
1414 HFA384X_RID_LONGRETRYLIMIT = rrq->value;
1415 else if (rrq->flags & IW_RETRY_MIN)
1416 HFA384X_RID_SHORTRETRYLIMIT = rrq->value;
1417 else {
1418 HFA384X_RID_LONGRETRYLIMIT = rrq->value;
1419 HFA384X_RID_SHORTRETRYLIMIT = rrq->value;
1420 }
1421
1422 }
1423
1424 if (rrq->flags & IW_RETRY_LIFETIME) {
1425 HFA384X_RID_MAXTRANSMITLIFETIME = rrq->value / 1024;
1426 }
1427
1428 return 0;
1429#endif /* 0 */
1430}
1431
1432static int prism2_ioctl_giwretry(struct net_device *dev,
1433 struct iw_request_info *info,
1434 struct iw_param *rrq, char *extra)
1435{
1436 struct hostap_interface *iface;
1437 local_info_t *local;
1438 u16 shortretry, longretry, lifetime, altretry;
1439
1440 iface = netdev_priv(dev);
1441 local = iface->local;
1442
1443 if (local->func->get_rid(dev, HFA384X_RID_SHORTRETRYLIMIT, &shortretry,
1444 2, 1) < 0 ||
1445 local->func->get_rid(dev, HFA384X_RID_LONGRETRYLIMIT, &longretry,
1446 2, 1) < 0 ||
1447 local->func->get_rid(dev, HFA384X_RID_MAXTRANSMITLIFETIME,
1448 &lifetime, 2, 1) < 0)
1449 return -EINVAL;
1450
1451 le16_to_cpus(&shortretry);
1452 le16_to_cpus(&longretry);
1453 le16_to_cpus(&lifetime);
1454
1455 rrq->disabled = 0;
1456
1457 if ((rrq->flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME) {
1458 rrq->flags = IW_RETRY_LIFETIME;
1459 rrq->value = lifetime * 1024;
1460 } else {
1461 if (local->manual_retry_count >= 0) {
1462 rrq->flags = IW_RETRY_LIMIT;
1463 if (local->func->get_rid(dev,
1464 HFA384X_RID_CNFALTRETRYCOUNT,
1465 &altretry, 2, 1) >= 0)
1466 rrq->value = le16_to_cpu(altretry);
1467 else
1468 rrq->value = local->manual_retry_count;
1469 } else if ((rrq->flags & IW_RETRY_MAX)) {
1470 rrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
1471 rrq->value = longretry;
1472 } else {
1473 rrq->flags = IW_RETRY_LIMIT;
1474 rrq->value = shortretry;
1475 if (shortretry != longretry)
1476 rrq->flags |= IW_RETRY_MIN;
1477 }
1478 }
1479 return 0;
1480}
1481
1482
1483/* Note! This TX power controlling is experimental and should not be used in
1484 * production use. It just sets raw power register and does not use any kind of
1485 * feedback information from the measured TX power (CR58). This is now
1486 * commented out to make sure that it is not used by accident. TX power
1487 * configuration will be enabled again after proper algorithm using feedback
1488 * has been implemented. */
1489
1490#ifdef RAW_TXPOWER_SETTING
1491/* Map HFA386x's CR31 to and from dBm with some sort of ad hoc mapping..
1492 * This version assumes following mapping:
1493 * CR31 is 7-bit value with -64 to +63 range.
1494 * -64 is mapped into +20dBm and +63 into -43dBm.
1495 * This is certainly not an exact mapping for every card, but at least
1496 * increasing dBm value should correspond to increasing TX power.
1497 */
1498
1499static int prism2_txpower_hfa386x_to_dBm(u16 val)
1500{
1501 signed char tmp;
1502
1503 if (val > 255)
1504 val = 255;
1505
1506 tmp = val;
1507 tmp >>= 2;
1508
1509 return -12 - tmp;
1510}
1511
1512static u16 prism2_txpower_dBm_to_hfa386x(int val)
1513{
1514 signed char tmp;
1515
1516 if (val > 20)
1517 return 128;
1518 else if (val < -43)
1519 return 127;
1520
1521 tmp = val;
1522 tmp = -12 - tmp;
1523 tmp <<= 2;
1524
1525 return (unsigned char) tmp;
1526}
1527#endif /* RAW_TXPOWER_SETTING */
1528
1529
1530static int prism2_ioctl_siwtxpow(struct net_device *dev,
1531 struct iw_request_info *info,
1532 struct iw_param *rrq, char *extra)
1533{
1534 struct hostap_interface *iface;
1535 local_info_t *local;
1536#ifdef RAW_TXPOWER_SETTING
1537 char *tmp;
1538#endif
1539 u16 val;
1540 int ret = 0;
1541
1542 iface = netdev_priv(dev);
1543 local = iface->local;
1544
1545 if (rrq->disabled) {
1546 if (local->txpower_type != PRISM2_TXPOWER_OFF) {
1547 val = 0xff; /* use all standby and sleep modes */
1548 ret = local->func->cmd(dev, HFA384X_CMDCODE_WRITEMIF,
1549 HFA386X_CR_A_D_TEST_MODES2,
1550 &val, NULL);
1551 printk(KERN_DEBUG "%s: Turning radio off: %s\n",
1552 dev->name, ret ? "failed" : "OK");
1553 local->txpower_type = PRISM2_TXPOWER_OFF;
1554 }
1555 return (ret ? -EOPNOTSUPP : 0);
1556 }
1557
1558 if (local->txpower_type == PRISM2_TXPOWER_OFF) {
1559 val = 0; /* disable all standby and sleep modes */
1560 ret = local->func->cmd(dev, HFA384X_CMDCODE_WRITEMIF,
1561 HFA386X_CR_A_D_TEST_MODES2, &val, NULL);
1562 printk(KERN_DEBUG "%s: Turning radio on: %s\n",
1563 dev->name, ret ? "failed" : "OK");
1564 local->txpower_type = PRISM2_TXPOWER_UNKNOWN;
1565 }
1566
1567#ifdef RAW_TXPOWER_SETTING
1568 if (!rrq->fixed && local->txpower_type != PRISM2_TXPOWER_AUTO) {
1569 printk(KERN_DEBUG "Setting ALC on\n");
1570 val = HFA384X_TEST_CFG_BIT_ALC;
1571 local->func->cmd(dev, HFA384X_CMDCODE_TEST |
1572 (HFA384X_TEST_CFG_BITS << 8), 1, &val, NULL);
1573 local->txpower_type = PRISM2_TXPOWER_AUTO;
1574 return 0;
1575 }
1576
1577 if (local->txpower_type != PRISM2_TXPOWER_FIXED) {
1578 printk(KERN_DEBUG "Setting ALC off\n");
1579 val = HFA384X_TEST_CFG_BIT_ALC;
1580 local->func->cmd(dev, HFA384X_CMDCODE_TEST |
1581 (HFA384X_TEST_CFG_BITS << 8), 0, &val, NULL);
1582 local->txpower_type = PRISM2_TXPOWER_FIXED;
1583 }
1584
1585 if (rrq->flags == IW_TXPOW_DBM)
1586 tmp = "dBm";
1587 else if (rrq->flags == IW_TXPOW_MWATT)
1588 tmp = "mW";
1589 else
1590 tmp = "UNKNOWN";
1591 printk(KERN_DEBUG "Setting TX power to %d %s\n", rrq->value, tmp);
1592
1593 if (rrq->flags != IW_TXPOW_DBM) {
1594 printk("SIOCSIWTXPOW with mW is not supported; use dBm\n");
1595 return -EOPNOTSUPP;
1596 }
1597
1598 local->txpower = rrq->value;
1599 val = prism2_txpower_dBm_to_hfa386x(local->txpower);
1600 if (local->func->cmd(dev, HFA384X_CMDCODE_WRITEMIF,
1601 HFA386X_CR_MANUAL_TX_POWER, &val, NULL))
1602 ret = -EOPNOTSUPP;
1603#else /* RAW_TXPOWER_SETTING */
1604 if (rrq->fixed)
1605 ret = -EOPNOTSUPP;
1606#endif /* RAW_TXPOWER_SETTING */
1607
1608 return ret;
1609}
1610
1611static int prism2_ioctl_giwtxpow(struct net_device *dev,
1612 struct iw_request_info *info,
1613 struct iw_param *rrq, char *extra)
1614{
1615#ifdef RAW_TXPOWER_SETTING
1616 struct hostap_interface *iface;
1617 local_info_t *local;
1618 u16 resp0;
1619
1620 iface = netdev_priv(dev);
1621 local = iface->local;
1622
1623 rrq->flags = IW_TXPOW_DBM;
1624 rrq->disabled = 0;
1625 rrq->fixed = 0;
1626
1627 if (local->txpower_type == PRISM2_TXPOWER_AUTO) {
1628 if (local->func->cmd(dev, HFA384X_CMDCODE_READMIF,
1629 HFA386X_CR_MANUAL_TX_POWER,
1630 NULL, &resp0) == 0) {
1631 rrq->value = prism2_txpower_hfa386x_to_dBm(resp0);
1632 } else {
1633 /* Could not get real txpower; guess 15 dBm */
1634 rrq->value = 15;
1635 }
1636 } else if (local->txpower_type == PRISM2_TXPOWER_OFF) {
1637 rrq->value = 0;
1638 rrq->disabled = 1;
1639 } else if (local->txpower_type == PRISM2_TXPOWER_FIXED) {
1640 rrq->value = local->txpower;
1641 rrq->fixed = 1;
1642 } else {
1643 printk("SIOCGIWTXPOW - unknown txpower_type=%d\n",
1644 local->txpower_type);
1645 }
1646 return 0;
1647#else /* RAW_TXPOWER_SETTING */
1648 return -EOPNOTSUPP;
1649#endif /* RAW_TXPOWER_SETTING */
1650}
1651
1652
1653#ifndef PRISM2_NO_STATION_MODES
1654
1655/* HostScan request works with and without host_roaming mode. In addition, it
1656 * does not break current association. However, it requires newer station
1657 * firmware version (>= 1.3.1) than scan request. */
1658static int prism2_request_hostscan(struct net_device *dev,
1659 u8 *ssid, u8 ssid_len)
1660{
1661 struct hostap_interface *iface;
1662 local_info_t *local;
1663 struct hfa384x_hostscan_request scan_req;
1664
1665 iface = netdev_priv(dev);
1666 local = iface->local;
1667
1668 memset(&scan_req, 0, sizeof(scan_req));
1669 scan_req.channel_list = cpu_to_le16(local->channel_mask &
1670 local->scan_channel_mask);
1671 scan_req.txrate = __constant_cpu_to_le16(HFA384X_RATES_1MBPS);
1672 if (ssid) {
1673 if (ssid_len > 32)
1674 return -EINVAL;
1675 scan_req.target_ssid_len = cpu_to_le16(ssid_len);
1676 memcpy(scan_req.target_ssid, ssid, ssid_len);
1677 }
1678
1679 if (local->func->set_rid(dev, HFA384X_RID_HOSTSCAN, &scan_req,
1680 sizeof(scan_req))) {
1681 printk(KERN_DEBUG "%s: HOSTSCAN failed\n", dev->name);
1682 return -EINVAL;
1683 }
1684 return 0;
1685}
1686
1687
1688static int prism2_request_scan(struct net_device *dev)
1689{
1690 struct hostap_interface *iface;
1691 local_info_t *local;
1692 struct hfa384x_scan_request scan_req;
1693 int ret = 0;
1694
1695 iface = netdev_priv(dev);
1696 local = iface->local;
1697
1698 memset(&scan_req, 0, sizeof(scan_req));
1699 scan_req.channel_list = cpu_to_le16(local->channel_mask &
1700 local->scan_channel_mask);
1701 scan_req.txrate = __constant_cpu_to_le16(HFA384X_RATES_1MBPS);
1702
1703 /* FIX:
1704 * It seems to be enough to set roaming mode for a short moment to
1705 * host-based and then setup scanrequest data and return the mode to
1706 * firmware-based.
1707 *
1708 * Master mode would need to drop to Managed mode for a short while
1709 * to make scanning work.. Or sweep through the different channels and
1710 * use passive scan based on beacons. */
1711
1712 if (!local->host_roaming)
1713 hostap_set_word(dev, HFA384X_RID_CNFROAMINGMODE,
1714 HFA384X_ROAMING_HOST);
1715
1716 if (local->func->set_rid(dev, HFA384X_RID_SCANREQUEST, &scan_req,
1717 sizeof(scan_req))) {
1718 printk(KERN_DEBUG "SCANREQUEST failed\n");
1719 ret = -EINVAL;
1720 }
1721
1722 if (!local->host_roaming)
1723 hostap_set_word(dev, HFA384X_RID_CNFROAMINGMODE,
1724 HFA384X_ROAMING_FIRMWARE);
1725
1726 return 0;
1727}
1728
1729#else /* !PRISM2_NO_STATION_MODES */
1730
1731static inline int prism2_request_hostscan(struct net_device *dev,
1732 u8 *ssid, u8 ssid_len)
1733{
1734 return -EOPNOTSUPP;
1735}
1736
1737
1738static inline int prism2_request_scan(struct net_device *dev)
1739{
1740 return -EOPNOTSUPP;
1741}
1742
1743#endif /* !PRISM2_NO_STATION_MODES */
1744
1745
1746static int prism2_ioctl_siwscan(struct net_device *dev,
1747 struct iw_request_info *info,
1748 struct iw_point *data, char *extra)
1749{
1750 struct hostap_interface *iface;
1751 local_info_t *local;
1752 int ret;
1753 u8 *ssid = NULL, ssid_len = 0;
1754 struct iw_scan_req *req = (struct iw_scan_req *) extra;
1755
1756 iface = netdev_priv(dev);
1757 local = iface->local;
1758
1759 if (data->length < sizeof(struct iw_scan_req))
1760 req = NULL;
1761
1762 if (local->iw_mode == IW_MODE_MASTER) {
1763 /* In master mode, we just return the results of our local
1764 * tables, so we don't need to start anything...
1765 * Jean II */
1766 data->length = 0;
1767 return 0;
1768 }
1769
1770 if (!local->dev_enabled)
1771 return -ENETDOWN;
1772
1773 if (req && data->flags & IW_SCAN_THIS_ESSID) {
1774 ssid = req->essid;
1775 ssid_len = req->essid_len;
1776
1777 if (ssid_len &&
1778 ((local->iw_mode != IW_MODE_INFRA &&
1779 local->iw_mode != IW_MODE_ADHOC) ||
1780 (local->sta_fw_ver < PRISM2_FW_VER(1,3,1))))
1781 return -EOPNOTSUPP;
1782 }
1783
1784 if (local->sta_fw_ver >= PRISM2_FW_VER(1,3,1))
1785 ret = prism2_request_hostscan(dev, ssid, ssid_len);
1786 else
1787 ret = prism2_request_scan(dev);
1788
1789 if (ret == 0)
1790 local->scan_timestamp = jiffies;
1791
1792 /* Could inquire F101, F103 or wait for SIOCGIWSCAN and read RID */
1793
1794 return ret;
1795}
1796
1797
1798#ifndef PRISM2_NO_STATION_MODES
1799static char * __prism2_translate_scan(local_info_t *local,
1800 struct hfa384x_hostscan_result *scan,
1801 struct hostap_bss_info *bss,
1802 char *current_ev, char *end_buf)
1803{
1804 int i, chan;
1805 struct iw_event iwe;
1806 char *current_val;
1807 u16 capabilities;
1808 u8 *pos;
1809 u8 *ssid, *bssid;
1810 size_t ssid_len;
1811 char *buf;
1812
1813 if (bss) {
1814 ssid = bss->ssid;
1815 ssid_len = bss->ssid_len;
1816 bssid = bss->bssid;
1817 } else {
1818 ssid = scan->ssid;
1819 ssid_len = le16_to_cpu(scan->ssid_len);
1820 bssid = scan->bssid;
1821 }
1822 if (ssid_len > 32)
1823 ssid_len = 32;
1824
1825 /* First entry *MUST* be the AP MAC address */
1826 memset(&iwe, 0, sizeof(iwe));
1827 iwe.cmd = SIOCGIWAP;
1828 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
1829 memcpy(iwe.u.ap_addr.sa_data, bssid, ETH_ALEN);
1830 /* FIX:
1831 * I do not know how this is possible, but iwe_stream_add_event
1832 * seems to re-order memcpy execution so that len is set only
1833 * after copying.. Pre-setting len here "fixes" this, but real
1834 * problems should be solved (after which these iwe.len
1835 * settings could be removed from this function). */
1836 iwe.len = IW_EV_ADDR_LEN;
1837 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
1838 IW_EV_ADDR_LEN);
1839
1840 /* Other entries will be displayed in the order we give them */
1841
1842 memset(&iwe, 0, sizeof(iwe));
1843 iwe.cmd = SIOCGIWESSID;
1844 iwe.u.data.length = ssid_len;
1845 iwe.u.data.flags = 1;
1846 iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
1847 current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, ssid);
1848
1849 memset(&iwe, 0, sizeof(iwe));
1850 iwe.cmd = SIOCGIWMODE;
1851 if (bss) {
1852 capabilities = bss->capab_info;
1853 } else {
1854 capabilities = le16_to_cpu(scan->capability);
1855 }
1856 if (capabilities & (WLAN_CAPABILITY_ESS |
1857 WLAN_CAPABILITY_IBSS)) {
1858 if (capabilities & WLAN_CAPABILITY_ESS)
1859 iwe.u.mode = IW_MODE_MASTER;
1860 else
1861 iwe.u.mode = IW_MODE_ADHOC;
1862 iwe.len = IW_EV_UINT_LEN;
1863 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
1864 IW_EV_UINT_LEN);
1865 }
1866
1867 memset(&iwe, 0, sizeof(iwe));
1868 iwe.cmd = SIOCGIWFREQ;
1869 if (scan) {
1870 chan = scan->chid;
1871 } else if (bss) {
1872 chan = bss->chan;
1873 } else {
1874 chan = 0;
1875 }
1876
1877 if (chan > 0) {
1878 iwe.u.freq.m = freq_list[le16_to_cpu(chan - 1)] * 100000;
1879 iwe.u.freq.e = 1;
1880 iwe.len = IW_EV_FREQ_LEN;
1881 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
1882 IW_EV_FREQ_LEN);
1883 }
1884
1885 if (scan) {
1886 memset(&iwe, 0, sizeof(iwe));
1887 iwe.cmd = IWEVQUAL;
1888 if (local->last_scan_type == PRISM2_HOSTSCAN) {
1889 iwe.u.qual.level = le16_to_cpu(scan->sl);
1890 iwe.u.qual.noise = le16_to_cpu(scan->anl);
1891 } else {
1892 iwe.u.qual.level =
1893 HFA384X_LEVEL_TO_dBm(le16_to_cpu(scan->sl));
1894 iwe.u.qual.noise =
1895 HFA384X_LEVEL_TO_dBm(le16_to_cpu(scan->anl));
1896 }
1897 iwe.len = IW_EV_QUAL_LEN;
1898 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
1899 IW_EV_QUAL_LEN);
1900 }
1901
1902 memset(&iwe, 0, sizeof(iwe));
1903 iwe.cmd = SIOCGIWENCODE;
1904 if (capabilities & WLAN_CAPABILITY_PRIVACY)
1905 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
1906 else
1907 iwe.u.data.flags = IW_ENCODE_DISABLED;
1908 iwe.u.data.length = 0;
1909 iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
1910 current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, "");
1911
1912 /* TODO: add SuppRates into BSS table */
1913 if (scan) {
1914 memset(&iwe, 0, sizeof(iwe));
1915 iwe.cmd = SIOCGIWRATE;
1916 current_val = current_ev + IW_EV_LCP_LEN;
1917 pos = scan->sup_rates;
1918 for (i = 0; i < sizeof(scan->sup_rates); i++) {
1919 if (pos[i] == 0)
1920 break;
1921 /* Bit rate given in 500 kb/s units (+ 0x80) */
1922 iwe.u.bitrate.value = ((pos[i] & 0x7f) * 500000);
1923 current_val = iwe_stream_add_value(
1924 current_ev, current_val, end_buf, &iwe,
1925 IW_EV_PARAM_LEN);
1926 }
1927 /* Check if we added any event */
1928 if ((current_val - current_ev) > IW_EV_LCP_LEN)
1929 current_ev = current_val;
1930 }
1931
1932 /* TODO: add BeaconInt,resp_rate,atim into BSS table */
1933 buf = kmalloc(MAX_WPA_IE_LEN * 2 + 30, GFP_KERNEL);
1934 if (buf && scan) {
1935 memset(&iwe, 0, sizeof(iwe));
1936 iwe.cmd = IWEVCUSTOM;
1937 sprintf(buf, "bcn_int=%d", le16_to_cpu(scan->beacon_interval));
1938 iwe.u.data.length = strlen(buf);
1939 current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe,
1940 buf);
1941
1942 memset(&iwe, 0, sizeof(iwe));
1943 iwe.cmd = IWEVCUSTOM;
1944 sprintf(buf, "resp_rate=%d", le16_to_cpu(scan->rate));
1945 iwe.u.data.length = strlen(buf);
1946 current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe,
1947 buf);
1948
1949 if (local->last_scan_type == PRISM2_HOSTSCAN &&
1950 (capabilities & WLAN_CAPABILITY_IBSS)) {
1951 memset(&iwe, 0, sizeof(iwe));
1952 iwe.cmd = IWEVCUSTOM;
1953 sprintf(buf, "atim=%d", le16_to_cpu(scan->atim));
1954 iwe.u.data.length = strlen(buf);
1955 current_ev = iwe_stream_add_point(current_ev, end_buf,
1956 &iwe, buf);
1957 }
1958 }
1959 kfree(buf);
1960
1961 if (bss && bss->wpa_ie_len > 0 && bss->wpa_ie_len <= MAX_WPA_IE_LEN) {
1962 memset(&iwe, 0, sizeof(iwe));
1963 iwe.cmd = IWEVGENIE;
1964 iwe.u.data.length = bss->wpa_ie_len;
1965 current_ev = iwe_stream_add_point(
1966 current_ev, end_buf, &iwe, bss->wpa_ie);
1967 }
1968
1969 if (bss && bss->rsn_ie_len > 0 && bss->rsn_ie_len <= MAX_WPA_IE_LEN) {
1970 memset(&iwe, 0, sizeof(iwe));
1971 iwe.cmd = IWEVGENIE;
1972 iwe.u.data.length = bss->rsn_ie_len;
1973 current_ev = iwe_stream_add_point(
1974 current_ev, end_buf, &iwe, bss->rsn_ie);
1975 }
1976
1977 return current_ev;
1978}
1979
1980
1981/* Translate scan data returned from the card to a card independant
1982 * format that the Wireless Tools will understand - Jean II */
1983static inline int prism2_translate_scan(local_info_t *local,
1984 char *buffer, int buflen)
1985{
1986 struct hfa384x_hostscan_result *scan;
1987 int entry, hostscan;
1988 char *current_ev = buffer;
1989 char *end_buf = buffer + buflen;
1990 struct list_head *ptr;
1991
1992 spin_lock_bh(&local->lock);
1993
1994 list_for_each(ptr, &local->bss_list) {
1995 struct hostap_bss_info *bss;
1996 bss = list_entry(ptr, struct hostap_bss_info, list);
1997 bss->included = 0;
1998 }
1999
2000 hostscan = local->last_scan_type == PRISM2_HOSTSCAN;
2001 for (entry = 0; entry < local->last_scan_results_count; entry++) {
2002 int found = 0;
2003 scan = &local->last_scan_results[entry];
2004
2005 /* Report every SSID if the AP is using multiple SSIDs. If no
2006 * BSS record is found (e.g., when WPA mode is disabled),
2007 * report the AP once. */
2008 list_for_each(ptr, &local->bss_list) {
2009 struct hostap_bss_info *bss;
2010 bss = list_entry(ptr, struct hostap_bss_info, list);
2011 if (memcmp(bss->bssid, scan->bssid, ETH_ALEN) == 0) {
2012 bss->included = 1;
2013 current_ev = __prism2_translate_scan(
2014 local, scan, bss, current_ev, end_buf);
2015 found++;
2016 }
2017 }
2018 if (!found) {
2019 current_ev = __prism2_translate_scan(
2020 local, scan, NULL, current_ev, end_buf);
2021 }
2022 /* Check if there is space for one more entry */
2023 if ((end_buf - current_ev) <= IW_EV_ADDR_LEN) {
2024 /* Ask user space to try again with a bigger buffer */
2025 spin_unlock_bh(&local->lock);
2026 return -E2BIG;
2027 }
2028 }
2029
2030 /* Prism2 firmware has limits (32 at least in some versions) for number
2031 * of BSSes in scan results. Extend this limit by using local BSS list.
2032 */
2033 list_for_each(ptr, &local->bss_list) {
2034 struct hostap_bss_info *bss;
2035 bss = list_entry(ptr, struct hostap_bss_info, list);
2036 if (bss->included)
2037 continue;
2038 current_ev = __prism2_translate_scan(local, NULL, bss,
2039 current_ev, end_buf);
2040 /* Check if there is space for one more entry */
2041 if ((end_buf - current_ev) <= IW_EV_ADDR_LEN) {
2042 /* Ask user space to try again with a bigger buffer */
2043 spin_unlock_bh(&local->lock);
2044 return -E2BIG;
2045 }
2046 }
2047
2048 spin_unlock_bh(&local->lock);
2049
2050 return current_ev - buffer;
2051}
2052#endif /* PRISM2_NO_STATION_MODES */
2053
2054
2055static inline int prism2_ioctl_giwscan_sta(struct net_device *dev,
2056 struct iw_request_info *info,
2057 struct iw_point *data, char *extra)
2058{
2059#ifdef PRISM2_NO_STATION_MODES
2060 return -EOPNOTSUPP;
2061#else /* PRISM2_NO_STATION_MODES */
2062 struct hostap_interface *iface;
2063 local_info_t *local;
2064 int res;
2065
2066 iface = netdev_priv(dev);
2067 local = iface->local;
2068
2069 /* Wait until the scan is finished. We can probably do better
2070 * than that - Jean II */
2071 if (local->scan_timestamp &&
2072 time_before(jiffies, local->scan_timestamp + 3 * HZ)) {
2073 /* Important note : we don't want to block the caller
2074 * until results are ready for various reasons.
2075 * First, managing wait queues is complex and racy
2076 * (there may be multiple simultaneous callers).
2077 * Second, we grab some rtnetlink lock before comming
2078 * here (in dev_ioctl()).
2079 * Third, the caller can wait on the Wireless Event
2080 * - Jean II */
2081 return -EAGAIN;
2082 }
2083 local->scan_timestamp = 0;
2084
2085 res = prism2_translate_scan(local, extra, data->length);
2086
2087 if (res >= 0) {
2088 data->length = res;
2089 return 0;
2090 } else {
2091 data->length = 0;
2092 return res;
2093 }
2094#endif /* PRISM2_NO_STATION_MODES */
2095}
2096
2097
2098static int prism2_ioctl_giwscan(struct net_device *dev,
2099 struct iw_request_info *info,
2100 struct iw_point *data, char *extra)
2101{
2102 struct hostap_interface *iface;
2103 local_info_t *local;
2104 int res;
2105
2106 iface = netdev_priv(dev);
2107 local = iface->local;
2108
2109 if (local->iw_mode == IW_MODE_MASTER) {
2110 /* In MASTER mode, it doesn't make sense to go around
2111 * scanning the frequencies and make the stations we serve
2112 * wait when what the user is really interested about is the
2113 * list of stations and access points we are talking to.
2114 * So, just extract results from our cache...
2115 * Jean II */
2116
2117 /* Translate to WE format */
2118 res = prism2_ap_translate_scan(dev, extra);
2119 if (res >= 0) {
2120 printk(KERN_DEBUG "Scan result translation succeeded "
2121 "(length=%d)\n", res);
2122 data->length = res;
2123 return 0;
2124 } else {
2125 printk(KERN_DEBUG
2126 "Scan result translation failed (res=%d)\n",
2127 res);
2128 data->length = 0;
2129 return res;
2130 }
2131 } else {
2132 /* Station mode */
2133 return prism2_ioctl_giwscan_sta(dev, info, data, extra);
2134 }
2135}
2136
2137
2138static const struct iw_priv_args prism2_priv[] = {
2139 { PRISM2_IOCTL_MONITOR,
2140 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "monitor" },
2141 { PRISM2_IOCTL_READMIF,
2142 IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1,
2143 IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "readmif" },
2144 { PRISM2_IOCTL_WRITEMIF,
2145 IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 2, 0, "writemif" },
2146 { PRISM2_IOCTL_RESET,
2147 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "reset" },
2148 { PRISM2_IOCTL_INQUIRE,
2149 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "inquire" },
2150 { PRISM2_IOCTL_SET_RID_WORD,
2151 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "set_rid_word" },
2152 { PRISM2_IOCTL_MACCMD,
2153 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "maccmd" },
2154 { PRISM2_IOCTL_WDS_ADD,
2155 IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, 0, "wds_add" },
2156 { PRISM2_IOCTL_WDS_DEL,
2157 IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, 0, "wds_del" },
2158 { PRISM2_IOCTL_ADDMAC,
2159 IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, 0, "addmac" },
2160 { PRISM2_IOCTL_DELMAC,
2161 IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, 0, "delmac" },
2162 { PRISM2_IOCTL_KICKMAC,
2163 IW_PRIV_TYPE_ADDR | IW_PRIV_SIZE_FIXED | 1, 0, "kickmac" },
2164 /* --- raw access to sub-ioctls --- */
2165 { PRISM2_IOCTL_PRISM2_PARAM,
2166 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "prism2_param" },
2167 { PRISM2_IOCTL_GET_PRISM2_PARAM,
2168 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2169 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getprism2_param" },
2170 /* --- sub-ioctls handlers --- */
2171 { PRISM2_IOCTL_PRISM2_PARAM,
2172 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "" },
2173 { PRISM2_IOCTL_GET_PRISM2_PARAM,
2174 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "" },
2175 /* --- sub-ioctls definitions --- */
2176 { PRISM2_PARAM_TXRATECTRL,
2177 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "txratectrl" },
2178 { PRISM2_PARAM_TXRATECTRL,
2179 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gettxratectrl" },
2180 { PRISM2_PARAM_BEACON_INT,
2181 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "beacon_int" },
2182 { PRISM2_PARAM_BEACON_INT,
2183 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getbeacon_int" },
2184#ifndef PRISM2_NO_STATION_MODES
2185 { PRISM2_PARAM_PSEUDO_IBSS,
2186 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "pseudo_ibss" },
2187 { PRISM2_PARAM_PSEUDO_IBSS,
2188 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getpseudo_ibss" },
2189#endif /* PRISM2_NO_STATION_MODES */
2190 { PRISM2_PARAM_ALC,
2191 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "alc" },
2192 { PRISM2_PARAM_ALC,
2193 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getalc" },
2194 { PRISM2_PARAM_DUMP,
2195 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "dump" },
2196 { PRISM2_PARAM_DUMP,
2197 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getdump" },
2198 { PRISM2_PARAM_OTHER_AP_POLICY,
2199 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "other_ap_policy" },
2200 { PRISM2_PARAM_OTHER_AP_POLICY,
2201 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getother_ap_pol" },
2202 { PRISM2_PARAM_AP_MAX_INACTIVITY,
2203 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "max_inactivity" },
2204 { PRISM2_PARAM_AP_MAX_INACTIVITY,
2205 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getmax_inactivi" },
2206 { PRISM2_PARAM_AP_BRIDGE_PACKETS,
2207 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "bridge_packets" },
2208 { PRISM2_PARAM_AP_BRIDGE_PACKETS,
2209 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getbridge_packe" },
2210 { PRISM2_PARAM_DTIM_PERIOD,
2211 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "dtim_period" },
2212 { PRISM2_PARAM_DTIM_PERIOD,
2213 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getdtim_period" },
2214 { PRISM2_PARAM_AP_NULLFUNC_ACK,
2215 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "nullfunc_ack" },
2216 { PRISM2_PARAM_AP_NULLFUNC_ACK,
2217 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getnullfunc_ack" },
2218 { PRISM2_PARAM_MAX_WDS,
2219 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "max_wds" },
2220 { PRISM2_PARAM_MAX_WDS,
2221 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getmax_wds" },
2222 { PRISM2_PARAM_AP_AUTOM_AP_WDS,
2223 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "autom_ap_wds" },
2224 { PRISM2_PARAM_AP_AUTOM_AP_WDS,
2225 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getautom_ap_wds" },
2226 { PRISM2_PARAM_AP_AUTH_ALGS,
2227 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "ap_auth_algs" },
2228 { PRISM2_PARAM_AP_AUTH_ALGS,
2229 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getap_auth_algs" },
2230 { PRISM2_PARAM_MONITOR_ALLOW_FCSERR,
2231 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "allow_fcserr" },
2232 { PRISM2_PARAM_MONITOR_ALLOW_FCSERR,
2233 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getallow_fcserr" },
2234 { PRISM2_PARAM_HOST_ENCRYPT,
2235 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "host_encrypt" },
2236 { PRISM2_PARAM_HOST_ENCRYPT,
2237 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethost_encrypt" },
2238 { PRISM2_PARAM_HOST_DECRYPT,
2239 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "host_decrypt" },
2240 { PRISM2_PARAM_HOST_DECRYPT,
2241 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethost_decrypt" },
2242#ifndef PRISM2_NO_STATION_MODES
2243 { PRISM2_PARAM_HOST_ROAMING,
2244 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "host_roaming" },
2245 { PRISM2_PARAM_HOST_ROAMING,
2246 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethost_roaming" },
2247#endif /* PRISM2_NO_STATION_MODES */
2248 { PRISM2_PARAM_BCRX_STA_KEY,
2249 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "bcrx_sta_key" },
2250 { PRISM2_PARAM_BCRX_STA_KEY,
2251 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getbcrx_sta_key" },
2252 { PRISM2_PARAM_IEEE_802_1X,
2253 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "ieee_802_1x" },
2254 { PRISM2_PARAM_IEEE_802_1X,
2255 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getieee_802_1x" },
2256 { PRISM2_PARAM_ANTSEL_TX,
2257 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "antsel_tx" },
2258 { PRISM2_PARAM_ANTSEL_TX,
2259 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getantsel_tx" },
2260 { PRISM2_PARAM_ANTSEL_RX,
2261 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "antsel_rx" },
2262 { PRISM2_PARAM_ANTSEL_RX,
2263 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getantsel_rx" },
2264 { PRISM2_PARAM_MONITOR_TYPE,
2265 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "monitor_type" },
2266 { PRISM2_PARAM_MONITOR_TYPE,
2267 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getmonitor_type" },
2268 { PRISM2_PARAM_WDS_TYPE,
2269 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wds_type" },
2270 { PRISM2_PARAM_WDS_TYPE,
2271 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getwds_type" },
2272 { PRISM2_PARAM_HOSTSCAN,
2273 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "hostscan" },
2274 { PRISM2_PARAM_HOSTSCAN,
2275 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethostscan" },
2276 { PRISM2_PARAM_AP_SCAN,
2277 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "ap_scan" },
2278 { PRISM2_PARAM_AP_SCAN,
2279 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getap_scan" },
2280 { PRISM2_PARAM_ENH_SEC,
2281 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "enh_sec" },
2282 { PRISM2_PARAM_ENH_SEC,
2283 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getenh_sec" },
2284#ifdef PRISM2_IO_DEBUG
2285 { PRISM2_PARAM_IO_DEBUG,
2286 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "io_debug" },
2287 { PRISM2_PARAM_IO_DEBUG,
2288 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getio_debug" },
2289#endif /* PRISM2_IO_DEBUG */
2290 { PRISM2_PARAM_BASIC_RATES,
2291 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "basic_rates" },
2292 { PRISM2_PARAM_BASIC_RATES,
2293 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getbasic_rates" },
2294 { PRISM2_PARAM_OPER_RATES,
2295 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "oper_rates" },
2296 { PRISM2_PARAM_OPER_RATES,
2297 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getoper_rates" },
2298 { PRISM2_PARAM_HOSTAPD,
2299 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "hostapd" },
2300 { PRISM2_PARAM_HOSTAPD,
2301 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethostapd" },
2302 { PRISM2_PARAM_HOSTAPD_STA,
2303 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "hostapd_sta" },
2304 { PRISM2_PARAM_HOSTAPD_STA,
2305 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethostapd_sta" },
2306 { PRISM2_PARAM_WPA,
2307 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wpa" },
2308 { PRISM2_PARAM_WPA,
2309 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getwpa" },
2310 { PRISM2_PARAM_PRIVACY_INVOKED,
2311 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "privacy_invoked" },
2312 { PRISM2_PARAM_PRIVACY_INVOKED,
2313 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getprivacy_invo" },
2314 { PRISM2_PARAM_TKIP_COUNTERMEASURES,
2315 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "tkip_countermea" },
2316 { PRISM2_PARAM_TKIP_COUNTERMEASURES,
2317 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gettkip_counter" },
2318 { PRISM2_PARAM_DROP_UNENCRYPTED,
2319 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "drop_unencrypte" },
2320 { PRISM2_PARAM_DROP_UNENCRYPTED,
2321 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getdrop_unencry" },
2322 { PRISM2_PARAM_SCAN_CHANNEL_MASK,
2323 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "scan_channels" },
2324 { PRISM2_PARAM_SCAN_CHANNEL_MASK,
2325 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getscan_channel" },
2326};
2327
2328
2329static int prism2_ioctl_priv_inquire(struct net_device *dev, int *i)
2330{
2331 struct hostap_interface *iface;
2332 local_info_t *local;
2333
2334 iface = netdev_priv(dev);
2335 local = iface->local;
2336
2337 if (local->func->cmd(dev, HFA384X_CMDCODE_INQUIRE, *i, NULL, NULL))
2338 return -EOPNOTSUPP;
2339
2340 return 0;
2341}
2342
2343
2344static int prism2_ioctl_priv_prism2_param(struct net_device *dev,
2345 struct iw_request_info *info,
2346 void *wrqu, char *extra)
2347{
2348 struct hostap_interface *iface;
2349 local_info_t *local;
2350 int *i = (int *) extra;
2351 int param = *i;
2352 int value = *(i + 1);
2353 int ret = 0;
2354 u16 val;
2355
2356 iface = netdev_priv(dev);
2357 local = iface->local;
2358
2359 switch (param) {
2360 case PRISM2_PARAM_TXRATECTRL:
2361 local->fw_tx_rate_control = value;
2362 break;
2363
2364 case PRISM2_PARAM_BEACON_INT:
2365 if (hostap_set_word(dev, HFA384X_RID_CNFBEACONINT, value) ||
2366 local->func->reset_port(dev))
2367 ret = -EINVAL;
2368 else
2369 local->beacon_int = value;
2370 break;
2371
2372#ifndef PRISM2_NO_STATION_MODES
2373 case PRISM2_PARAM_PSEUDO_IBSS:
2374 if (value == local->pseudo_adhoc)
2375 break;
2376
2377 if (value != 0 && value != 1) {
2378 ret = -EINVAL;
2379 break;
2380 }
2381
2382 printk(KERN_DEBUG "prism2: %s: pseudo IBSS change %d -> %d\n",
2383 dev->name, local->pseudo_adhoc, value);
2384 local->pseudo_adhoc = value;
2385 if (local->iw_mode != IW_MODE_ADHOC)
2386 break;
2387
2388 if (hostap_set_word(dev, HFA384X_RID_CNFPORTTYPE,
2389 hostap_get_porttype(local))) {
2390 ret = -EOPNOTSUPP;
2391 break;
2392 }
2393
2394 if (local->func->reset_port(dev))
2395 ret = -EINVAL;
2396 break;
2397#endif /* PRISM2_NO_STATION_MODES */
2398
2399 case PRISM2_PARAM_ALC:
2400 printk(KERN_DEBUG "%s: %s ALC\n", dev->name,
2401 value == 0 ? "Disabling" : "Enabling");
2402 val = HFA384X_TEST_CFG_BIT_ALC;
2403 local->func->cmd(dev, HFA384X_CMDCODE_TEST |
2404 (HFA384X_TEST_CFG_BITS << 8),
2405 value == 0 ? 0 : 1, &val, NULL);
2406 break;
2407
2408 case PRISM2_PARAM_DUMP:
2409 local->frame_dump = value;
2410 break;
2411
2412 case PRISM2_PARAM_OTHER_AP_POLICY:
2413 if (value < 0 || value > 3) {
2414 ret = -EINVAL;
2415 break;
2416 }
2417 if (local->ap != NULL)
2418 local->ap->ap_policy = value;
2419 break;
2420
2421 case PRISM2_PARAM_AP_MAX_INACTIVITY:
2422 if (value < 0 || value > 7 * 24 * 60 * 60) {
2423 ret = -EINVAL;
2424 break;
2425 }
2426 if (local->ap != NULL)
2427 local->ap->max_inactivity = value * HZ;
2428 break;
2429
2430 case PRISM2_PARAM_AP_BRIDGE_PACKETS:
2431 if (local->ap != NULL)
2432 local->ap->bridge_packets = value;
2433 break;
2434
2435 case PRISM2_PARAM_DTIM_PERIOD:
2436 if (value < 0 || value > 65535) {
2437 ret = -EINVAL;
2438 break;
2439 }
2440 if (hostap_set_word(dev, HFA384X_RID_CNFOWNDTIMPERIOD, value)
2441 || local->func->reset_port(dev))
2442 ret = -EINVAL;
2443 else
2444 local->dtim_period = value;
2445 break;
2446
2447 case PRISM2_PARAM_AP_NULLFUNC_ACK:
2448 if (local->ap != NULL)
2449 local->ap->nullfunc_ack = value;
2450 break;
2451
2452 case PRISM2_PARAM_MAX_WDS:
2453 local->wds_max_connections = value;
2454 break;
2455
2456 case PRISM2_PARAM_AP_AUTOM_AP_WDS:
2457 if (local->ap != NULL) {
2458 if (!local->ap->autom_ap_wds && value) {
2459 /* add WDS link to all APs in STA table */
2460 hostap_add_wds_links(local);
2461 }
2462 local->ap->autom_ap_wds = value;
2463 }
2464 break;
2465
2466 case PRISM2_PARAM_AP_AUTH_ALGS:
2467 local->auth_algs = value;
2468 if (hostap_set_auth_algs(local))
2469 ret = -EINVAL;
2470 break;
2471
2472 case PRISM2_PARAM_MONITOR_ALLOW_FCSERR:
2473 local->monitor_allow_fcserr = value;
2474 break;
2475
2476 case PRISM2_PARAM_HOST_ENCRYPT:
2477 local->host_encrypt = value;
2478 if (hostap_set_encryption(local) ||
2479 local->func->reset_port(dev))
2480 ret = -EINVAL;
2481 break;
2482
2483 case PRISM2_PARAM_HOST_DECRYPT:
2484 local->host_decrypt = value;
2485 if (hostap_set_encryption(local) ||
2486 local->func->reset_port(dev))
2487 ret = -EINVAL;
2488 break;
2489
2490#ifndef PRISM2_NO_STATION_MODES
2491 case PRISM2_PARAM_HOST_ROAMING:
2492 if (value < 0 || value > 2) {
2493 ret = -EINVAL;
2494 break;
2495 }
2496 local->host_roaming = value;
2497 if (hostap_set_roaming(local) || local->func->reset_port(dev))
2498 ret = -EINVAL;
2499 break;
2500#endif /* PRISM2_NO_STATION_MODES */
2501
2502 case PRISM2_PARAM_BCRX_STA_KEY:
2503 local->bcrx_sta_key = value;
2504 break;
2505
2506 case PRISM2_PARAM_IEEE_802_1X:
2507 local->ieee_802_1x = value;
2508 break;
2509
2510 case PRISM2_PARAM_ANTSEL_TX:
2511 if (value < 0 || value > HOSTAP_ANTSEL_HIGH) {
2512 ret = -EINVAL;
2513 break;
2514 }
2515 local->antsel_tx = value;
2516 hostap_set_antsel(local);
2517 break;
2518
2519 case PRISM2_PARAM_ANTSEL_RX:
2520 if (value < 0 || value > HOSTAP_ANTSEL_HIGH) {
2521 ret = -EINVAL;
2522 break;
2523 }
2524 local->antsel_rx = value;
2525 hostap_set_antsel(local);
2526 break;
2527
2528 case PRISM2_PARAM_MONITOR_TYPE:
2529 if (value != PRISM2_MONITOR_80211 &&
2530 value != PRISM2_MONITOR_CAPHDR &&
2531 value != PRISM2_MONITOR_PRISM) {
2532 ret = -EINVAL;
2533 break;
2534 }
2535 local->monitor_type = value;
2536 if (local->iw_mode == IW_MODE_MONITOR)
2537 hostap_monitor_set_type(local);
2538 break;
2539
2540 case PRISM2_PARAM_WDS_TYPE:
2541 local->wds_type = value;
2542 break;
2543
2544 case PRISM2_PARAM_HOSTSCAN:
2545 {
2546 struct hfa384x_hostscan_request scan_req;
2547 u16 rate;
2548
2549 memset(&scan_req, 0, sizeof(scan_req));
2550 scan_req.channel_list = __constant_cpu_to_le16(0x3fff);
2551 switch (value) {
2552 case 1: rate = HFA384X_RATES_1MBPS; break;
2553 case 2: rate = HFA384X_RATES_2MBPS; break;
2554 case 3: rate = HFA384X_RATES_5MBPS; break;
2555 case 4: rate = HFA384X_RATES_11MBPS; break;
2556 default: rate = HFA384X_RATES_1MBPS; break;
2557 }
2558 scan_req.txrate = cpu_to_le16(rate);
2559 /* leave SSID empty to accept all SSIDs */
2560
2561 if (local->iw_mode == IW_MODE_MASTER) {
2562 if (hostap_set_word(dev, HFA384X_RID_CNFPORTTYPE,
2563 HFA384X_PORTTYPE_BSS) ||
2564 local->func->reset_port(dev))
2565 printk(KERN_DEBUG "Leaving Host AP mode "
2566 "for HostScan failed\n");
2567 }
2568
2569 if (local->func->set_rid(dev, HFA384X_RID_HOSTSCAN, &scan_req,
2570 sizeof(scan_req))) {
2571 printk(KERN_DEBUG "HOSTSCAN failed\n");
2572 ret = -EINVAL;
2573 }
2574 if (local->iw_mode == IW_MODE_MASTER) {
2575 wait_queue_t __wait;
2576 init_waitqueue_entry(&__wait, current);
2577 add_wait_queue(&local->hostscan_wq, &__wait);
2578 set_current_state(TASK_INTERRUPTIBLE);
2579 schedule_timeout(HZ);
2580 if (signal_pending(current))
2581 ret = -EINTR;
2582 set_current_state(TASK_RUNNING);
2583 remove_wait_queue(&local->hostscan_wq, &__wait);
2584
2585 if (hostap_set_word(dev, HFA384X_RID_CNFPORTTYPE,
2586 HFA384X_PORTTYPE_HOSTAP) ||
2587 local->func->reset_port(dev))
2588 printk(KERN_DEBUG "Returning to Host AP mode "
2589 "after HostScan failed\n");
2590 }
2591 break;
2592 }
2593
2594 case PRISM2_PARAM_AP_SCAN:
2595 local->passive_scan_interval = value;
2596 if (timer_pending(&local->passive_scan_timer))
2597 del_timer(&local->passive_scan_timer);
2598 if (value > 0) {
2599 local->passive_scan_timer.expires = jiffies +
2600 local->passive_scan_interval * HZ;
2601 add_timer(&local->passive_scan_timer);
2602 }
2603 break;
2604
2605 case PRISM2_PARAM_ENH_SEC:
2606 if (value < 0 || value > 3) {
2607 ret = -EINVAL;
2608 break;
2609 }
2610 local->enh_sec = value;
2611 if (hostap_set_word(dev, HFA384X_RID_CNFENHSECURITY,
2612 local->enh_sec) ||
2613 local->func->reset_port(dev)) {
2614 printk(KERN_INFO "%s: cnfEnhSecurity requires STA f/w "
2615 "1.6.3 or newer\n", dev->name);
2616 ret = -EOPNOTSUPP;
2617 }
2618 break;
2619
2620#ifdef PRISM2_IO_DEBUG
2621 case PRISM2_PARAM_IO_DEBUG:
2622 local->io_debug_enabled = value;
2623 break;
2624#endif /* PRISM2_IO_DEBUG */
2625
2626 case PRISM2_PARAM_BASIC_RATES:
2627 if ((value & local->tx_rate_control) != value || value == 0) {
2628 printk(KERN_INFO "%s: invalid basic rate set - basic "
2629 "rates must be in supported rate set\n",
2630 dev->name);
2631 ret = -EINVAL;
2632 break;
2633 }
2634 local->basic_rates = value;
2635 if (hostap_set_word(dev, HFA384X_RID_CNFBASICRATES,
2636 local->basic_rates) ||
2637 local->func->reset_port(dev))
2638 ret = -EINVAL;
2639 break;
2640
2641 case PRISM2_PARAM_OPER_RATES:
2642 local->tx_rate_control = value;
2643 if (hostap_set_rate(dev))
2644 ret = -EINVAL;
2645 break;
2646
2647 case PRISM2_PARAM_HOSTAPD:
2648 ret = hostap_set_hostapd(local, value, 1);
2649 break;
2650
2651 case PRISM2_PARAM_HOSTAPD_STA:
2652 ret = hostap_set_hostapd_sta(local, value, 1);
2653 break;
2654
2655 case PRISM2_PARAM_WPA:
2656 local->wpa = value;
2657 if (local->sta_fw_ver < PRISM2_FW_VER(1,7,0))
2658 ret = -EOPNOTSUPP;
2659 else if (hostap_set_word(dev, HFA384X_RID_SSNHANDLINGMODE,
2660 value ? 1 : 0))
2661 ret = -EINVAL;
2662 break;
2663
2664 case PRISM2_PARAM_PRIVACY_INVOKED:
2665 local->privacy_invoked = value;
2666 if (hostap_set_encryption(local) ||
2667 local->func->reset_port(dev))
2668 ret = -EINVAL;
2669 break;
2670
2671 case PRISM2_PARAM_TKIP_COUNTERMEASURES:
2672 local->tkip_countermeasures = value;
2673 break;
2674
2675 case PRISM2_PARAM_DROP_UNENCRYPTED:
2676 local->drop_unencrypted = value;
2677 break;
2678
2679 case PRISM2_PARAM_SCAN_CHANNEL_MASK:
2680 local->scan_channel_mask = value;
2681 break;
2682
2683 default:
2684 printk(KERN_DEBUG "%s: prism2_param: unknown param %d\n",
2685 dev->name, param);
2686 ret = -EOPNOTSUPP;
2687 break;
2688 }
2689
2690 return ret;
2691}
2692
2693
2694static int prism2_ioctl_priv_get_prism2_param(struct net_device *dev,
2695 struct iw_request_info *info,
2696 void *wrqu, char *extra)
2697{
2698 struct hostap_interface *iface;
2699 local_info_t *local;
2700 int *param = (int *) extra;
2701 int ret = 0;
2702
2703 iface = netdev_priv(dev);
2704 local = iface->local;
2705
2706 switch (*param) {
2707 case PRISM2_PARAM_TXRATECTRL:
2708 *param = local->fw_tx_rate_control;
2709 break;
2710
2711 case PRISM2_PARAM_BEACON_INT:
2712 *param = local->beacon_int;
2713 break;
2714
2715 case PRISM2_PARAM_PSEUDO_IBSS:
2716 *param = local->pseudo_adhoc;
2717 break;
2718
2719 case PRISM2_PARAM_ALC:
2720 ret = -EOPNOTSUPP; /* FIX */
2721 break;
2722
2723 case PRISM2_PARAM_DUMP:
2724 *param = local->frame_dump;
2725 break;
2726
2727 case PRISM2_PARAM_OTHER_AP_POLICY:
2728 if (local->ap != NULL)
2729 *param = local->ap->ap_policy;
2730 else
2731 ret = -EOPNOTSUPP;
2732 break;
2733
2734 case PRISM2_PARAM_AP_MAX_INACTIVITY:
2735 if (local->ap != NULL)
2736 *param = local->ap->max_inactivity / HZ;
2737 else
2738 ret = -EOPNOTSUPP;
2739 break;
2740
2741 case PRISM2_PARAM_AP_BRIDGE_PACKETS:
2742 if (local->ap != NULL)
2743 *param = local->ap->bridge_packets;
2744 else
2745 ret = -EOPNOTSUPP;
2746 break;
2747
2748 case PRISM2_PARAM_DTIM_PERIOD:
2749 *param = local->dtim_period;
2750 break;
2751
2752 case PRISM2_PARAM_AP_NULLFUNC_ACK:
2753 if (local->ap != NULL)
2754 *param = local->ap->nullfunc_ack;
2755 else
2756 ret = -EOPNOTSUPP;
2757 break;
2758
2759 case PRISM2_PARAM_MAX_WDS:
2760 *param = local->wds_max_connections;
2761 break;
2762
2763 case PRISM2_PARAM_AP_AUTOM_AP_WDS:
2764 if (local->ap != NULL)
2765 *param = local->ap->autom_ap_wds;
2766 else
2767 ret = -EOPNOTSUPP;
2768 break;
2769
2770 case PRISM2_PARAM_AP_AUTH_ALGS:
2771 *param = local->auth_algs;
2772 break;
2773
2774 case PRISM2_PARAM_MONITOR_ALLOW_FCSERR:
2775 *param = local->monitor_allow_fcserr;
2776 break;
2777
2778 case PRISM2_PARAM_HOST_ENCRYPT:
2779 *param = local->host_encrypt;
2780 break;
2781
2782 case PRISM2_PARAM_HOST_DECRYPT:
2783 *param = local->host_decrypt;
2784 break;
2785
2786 case PRISM2_PARAM_HOST_ROAMING:
2787 *param = local->host_roaming;
2788 break;
2789
2790 case PRISM2_PARAM_BCRX_STA_KEY:
2791 *param = local->bcrx_sta_key;
2792 break;
2793
2794 case PRISM2_PARAM_IEEE_802_1X:
2795 *param = local->ieee_802_1x;
2796 break;
2797
2798 case PRISM2_PARAM_ANTSEL_TX:
2799 *param = local->antsel_tx;
2800 break;
2801
2802 case PRISM2_PARAM_ANTSEL_RX:
2803 *param = local->antsel_rx;
2804 break;
2805
2806 case PRISM2_PARAM_MONITOR_TYPE:
2807 *param = local->monitor_type;
2808 break;
2809
2810 case PRISM2_PARAM_WDS_TYPE:
2811 *param = local->wds_type;
2812 break;
2813
2814 case PRISM2_PARAM_HOSTSCAN:
2815 ret = -EOPNOTSUPP;
2816 break;
2817
2818 case PRISM2_PARAM_AP_SCAN:
2819 *param = local->passive_scan_interval;
2820 break;
2821
2822 case PRISM2_PARAM_ENH_SEC:
2823 *param = local->enh_sec;
2824 break;
2825
2826#ifdef PRISM2_IO_DEBUG
2827 case PRISM2_PARAM_IO_DEBUG:
2828 *param = local->io_debug_enabled;
2829 break;
2830#endif /* PRISM2_IO_DEBUG */
2831
2832 case PRISM2_PARAM_BASIC_RATES:
2833 *param = local->basic_rates;
2834 break;
2835
2836 case PRISM2_PARAM_OPER_RATES:
2837 *param = local->tx_rate_control;
2838 break;
2839
2840 case PRISM2_PARAM_HOSTAPD:
2841 *param = local->hostapd;
2842 break;
2843
2844 case PRISM2_PARAM_HOSTAPD_STA:
2845 *param = local->hostapd_sta;
2846 break;
2847
2848 case PRISM2_PARAM_WPA:
2849 if (local->sta_fw_ver < PRISM2_FW_VER(1,7,0))
2850 ret = -EOPNOTSUPP;
2851 *param = local->wpa;
2852 break;
2853
2854 case PRISM2_PARAM_PRIVACY_INVOKED:
2855 *param = local->privacy_invoked;
2856 break;
2857
2858 case PRISM2_PARAM_TKIP_COUNTERMEASURES:
2859 *param = local->tkip_countermeasures;
2860 break;
2861
2862 case PRISM2_PARAM_DROP_UNENCRYPTED:
2863 *param = local->drop_unencrypted;
2864 break;
2865
2866 case PRISM2_PARAM_SCAN_CHANNEL_MASK:
2867 *param = local->scan_channel_mask;
2868 break;
2869
2870 default:
2871 printk(KERN_DEBUG "%s: get_prism2_param: unknown param %d\n",
2872 dev->name, *param);
2873 ret = -EOPNOTSUPP;
2874 break;
2875 }
2876
2877 return ret;
2878}
2879
2880
2881static int prism2_ioctl_priv_readmif(struct net_device *dev,
2882 struct iw_request_info *info,
2883 void *wrqu, char *extra)
2884{
2885 struct hostap_interface *iface;
2886 local_info_t *local;
2887 u16 resp0;
2888
2889 iface = netdev_priv(dev);
2890 local = iface->local;
2891
2892 if (local->func->cmd(dev, HFA384X_CMDCODE_READMIF, *extra, NULL,
2893 &resp0))
2894 return -EOPNOTSUPP;
2895 else
2896 *extra = resp0;
2897
2898 return 0;
2899}
2900
2901
2902static int prism2_ioctl_priv_writemif(struct net_device *dev,
2903 struct iw_request_info *info,
2904 void *wrqu, char *extra)
2905{
2906 struct hostap_interface *iface;
2907 local_info_t *local;
2908 u16 cr, val;
2909
2910 iface = netdev_priv(dev);
2911 local = iface->local;
2912
2913 cr = *extra;
2914 val = *(extra + 1);
2915 if (local->func->cmd(dev, HFA384X_CMDCODE_WRITEMIF, cr, &val, NULL))
2916 return -EOPNOTSUPP;
2917
2918 return 0;
2919}
2920
2921
2922static int prism2_ioctl_priv_monitor(struct net_device *dev, int *i)
2923{
2924 struct hostap_interface *iface;
2925 local_info_t *local;
2926 int ret = 0;
2927 u32 mode;
2928
2929 iface = netdev_priv(dev);
2930 local = iface->local;
2931
2932 printk(KERN_DEBUG "%s: process %d (%s) used deprecated iwpriv monitor "
2933 "- update software to use iwconfig mode monitor\n",
2934 dev->name, current->pid, current->comm);
2935
2936 /* Backward compatibility code - this can be removed at some point */
2937
2938 if (*i == 0) {
2939 /* Disable monitor mode - old mode was not saved, so go to
2940 * Master mode */
2941 mode = IW_MODE_MASTER;
2942 ret = prism2_ioctl_siwmode(dev, NULL, &mode, NULL);
2943 } else if (*i == 1) {
2944 /* netlink socket mode is not supported anymore since it did
2945 * not separate different devices from each other and was not
2946 * best method for delivering large amount of packets to
2947 * user space */
2948 ret = -EOPNOTSUPP;
2949 } else if (*i == 2 || *i == 3) {
2950 switch (*i) {
2951 case 2:
2952 local->monitor_type = PRISM2_MONITOR_80211;
2953 break;
2954 case 3:
2955 local->monitor_type = PRISM2_MONITOR_PRISM;
2956 break;
2957 }
2958 mode = IW_MODE_MONITOR;
2959 ret = prism2_ioctl_siwmode(dev, NULL, &mode, NULL);
2960 hostap_monitor_mode_enable(local);
2961 } else
2962 ret = -EINVAL;
2963
2964 return ret;
2965}
2966
2967
2968static int prism2_ioctl_priv_reset(struct net_device *dev, int *i)
2969{
2970 struct hostap_interface *iface;
2971 local_info_t *local;
2972
2973 iface = netdev_priv(dev);
2974 local = iface->local;
2975
2976 printk(KERN_DEBUG "%s: manual reset request(%d)\n", dev->name, *i);
2977 switch (*i) {
2978 case 0:
2979 /* Disable and enable card */
2980 local->func->hw_shutdown(dev, 1);
2981 local->func->hw_config(dev, 0);
2982 break;
2983
2984 case 1:
2985 /* COR sreset */
2986 local->func->hw_reset(dev);
2987 break;
2988
2989 case 2:
2990 /* Disable and enable port 0 */
2991 local->func->reset_port(dev);
2992 break;
2993
2994 case 3:
2995 prism2_sta_deauth(local, WLAN_REASON_DEAUTH_LEAVING);
2996 if (local->func->cmd(dev, HFA384X_CMDCODE_DISABLE, 0, NULL,
2997 NULL))
2998 return -EINVAL;
2999 break;
3000
3001 case 4:
3002 if (local->func->cmd(dev, HFA384X_CMDCODE_ENABLE, 0, NULL,
3003 NULL))
3004 return -EINVAL;
3005 break;
3006
3007 default:
3008 printk(KERN_DEBUG "Unknown reset request %d\n", *i);
3009 return -EOPNOTSUPP;
3010 }
3011
3012 return 0;
3013}
3014
3015
3016static int prism2_ioctl_priv_set_rid_word(struct net_device *dev, int *i)
3017{
3018 int rid = *i;
3019 int value = *(i + 1);
3020
3021 printk(KERN_DEBUG "%s: Set RID[0x%X] = %d\n", dev->name, rid, value);
3022
3023 if (hostap_set_word(dev, rid, value))
3024 return -EINVAL;
3025
3026 return 0;
3027}
3028
3029
3030#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
3031static int ap_mac_cmd_ioctl(local_info_t *local, int *cmd)
3032{
3033 int ret = 0;
3034
3035 switch (*cmd) {
3036 case AP_MAC_CMD_POLICY_OPEN:
3037 local->ap->mac_restrictions.policy = MAC_POLICY_OPEN;
3038 break;
3039 case AP_MAC_CMD_POLICY_ALLOW:
3040 local->ap->mac_restrictions.policy = MAC_POLICY_ALLOW;
3041 break;
3042 case AP_MAC_CMD_POLICY_DENY:
3043 local->ap->mac_restrictions.policy = MAC_POLICY_DENY;
3044 break;
3045 case AP_MAC_CMD_FLUSH:
3046 ap_control_flush_macs(&local->ap->mac_restrictions);
3047 break;
3048 case AP_MAC_CMD_KICKALL:
3049 ap_control_kickall(local->ap);
3050 hostap_deauth_all_stas(local->dev, local->ap, 0);
3051 break;
3052 default:
3053 ret = -EOPNOTSUPP;
3054 break;
3055 }
3056
3057 return ret;
3058}
3059#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
3060
3061
3062#ifdef PRISM2_DOWNLOAD_SUPPORT
3063static int prism2_ioctl_priv_download(local_info_t *local, struct iw_point *p)
3064{
3065 struct prism2_download_param *param;
3066 int ret = 0;
3067
3068 if (p->length < sizeof(struct prism2_download_param) ||
3069 p->length > 1024 || !p->pointer)
3070 return -EINVAL;
3071
3072 param = (struct prism2_download_param *)
3073 kmalloc(p->length, GFP_KERNEL);
3074 if (param == NULL)
3075 return -ENOMEM;
3076
3077 if (copy_from_user(param, p->pointer, p->length)) {
3078 ret = -EFAULT;
3079 goto out;
3080 }
3081
3082 if (p->length < sizeof(struct prism2_download_param) +
3083 param->num_areas * sizeof(struct prism2_download_area)) {
3084 ret = -EINVAL;
3085 goto out;
3086 }
3087
3088 ret = local->func->download(local, param);
3089
3090 out:
3091 if (param != NULL)
3092 kfree(param);
3093
3094 return ret;
3095}
3096#endif /* PRISM2_DOWNLOAD_SUPPORT */
3097
3098
3099static int prism2_set_genericelement(struct net_device *dev, u8 *elem,
3100 size_t len)
3101{
3102 struct hostap_interface *iface = dev->priv;
3103 local_info_t *local = iface->local;
3104 u8 *buf;
3105
3106 /*
3107 * Add 16-bit length in the beginning of the buffer because Prism2 RID
3108 * includes it.
3109 */
3110 buf = kmalloc(len + 2, GFP_KERNEL);
3111 if (buf == NULL)
3112 return -ENOMEM;
3113
3114 *((u16 *) buf) = cpu_to_le16(len);
3115 memcpy(buf + 2, elem, len);
3116
3117 kfree(local->generic_elem);
3118 local->generic_elem = buf;
3119 local->generic_elem_len = len + 2;
3120
3121 return local->func->set_rid(local->dev, HFA384X_RID_GENERICELEMENT,
3122 buf, len + 2);
3123}
3124
3125
3126static int prism2_ioctl_siwauth(struct net_device *dev,
3127 struct iw_request_info *info,
3128 struct iw_param *data, char *extra)
3129{
3130 struct hostap_interface *iface = dev->priv;
3131 local_info_t *local = iface->local;
3132
3133 switch (data->flags & IW_AUTH_INDEX) {
3134 case IW_AUTH_WPA_VERSION:
3135 case IW_AUTH_CIPHER_PAIRWISE:
3136 case IW_AUTH_CIPHER_GROUP:
3137 case IW_AUTH_KEY_MGMT:
3138 /*
3139 * Host AP driver does not use these parameters and allows
3140 * wpa_supplicant to control them internally.
3141 */
3142 break;
3143 case IW_AUTH_TKIP_COUNTERMEASURES:
3144 local->tkip_countermeasures = data->value;
3145 break;
3146 case IW_AUTH_DROP_UNENCRYPTED:
3147 local->drop_unencrypted = data->value;
3148 break;
3149 case IW_AUTH_80211_AUTH_ALG:
3150 local->auth_algs = data->value;
3151 break;
3152 case IW_AUTH_WPA_ENABLED:
3153 if (data->value == 0) {
3154 local->wpa = 0;
3155 if (local->sta_fw_ver < PRISM2_FW_VER(1,7,0))
3156 break;
3157 prism2_set_genericelement(dev, "", 0);
3158 local->host_roaming = 0;
3159 local->privacy_invoked = 0;
3160 if (hostap_set_word(dev, HFA384X_RID_SSNHANDLINGMODE,
3161 0) ||
3162 hostap_set_roaming(local) ||
3163 hostap_set_encryption(local) ||
3164 local->func->reset_port(dev))
3165 return -EINVAL;
3166 break;
3167 }
3168 if (local->sta_fw_ver < PRISM2_FW_VER(1,7,0))
3169 return -EOPNOTSUPP;
3170 local->host_roaming = 2;
3171 local->privacy_invoked = 1;
3172 local->wpa = 1;
3173 if (hostap_set_word(dev, HFA384X_RID_SSNHANDLINGMODE, 1) ||
3174 hostap_set_roaming(local) ||
3175 hostap_set_encryption(local) ||
3176 local->func->reset_port(dev))
3177 return -EINVAL;
3178 break;
3179 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
3180 local->ieee_802_1x = data->value;
3181 break;
3182 case IW_AUTH_PRIVACY_INVOKED:
3183 local->privacy_invoked = data->value;
3184 break;
3185 default:
3186 return -EOPNOTSUPP;
3187 }
3188 return 0;
3189}
3190
3191
3192static int prism2_ioctl_giwauth(struct net_device *dev,
3193 struct iw_request_info *info,
3194 struct iw_param *data, char *extra)
3195{
3196 struct hostap_interface *iface = dev->priv;
3197 local_info_t *local = iface->local;
3198
3199 switch (data->flags & IW_AUTH_INDEX) {
3200 case IW_AUTH_WPA_VERSION:
3201 case IW_AUTH_CIPHER_PAIRWISE:
3202 case IW_AUTH_CIPHER_GROUP:
3203 case IW_AUTH_KEY_MGMT:
3204 /*
3205 * Host AP driver does not use these parameters and allows
3206 * wpa_supplicant to control them internally.
3207 */
3208 return -EOPNOTSUPP;
3209 case IW_AUTH_TKIP_COUNTERMEASURES:
3210 data->value = local->tkip_countermeasures;
3211 break;
3212 case IW_AUTH_DROP_UNENCRYPTED:
3213 data->value = local->drop_unencrypted;
3214 break;
3215 case IW_AUTH_80211_AUTH_ALG:
3216 data->value = local->auth_algs;
3217 break;
3218 case IW_AUTH_WPA_ENABLED:
3219 data->value = local->wpa;
3220 break;
3221 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
3222 data->value = local->ieee_802_1x;
3223 break;
3224 default:
3225 return -EOPNOTSUPP;
3226 }
3227 return 0;
3228}
3229
3230
3231static int prism2_ioctl_siwencodeext(struct net_device *dev,
3232 struct iw_request_info *info,
3233 struct iw_point *erq, char *extra)
3234{
3235 struct hostap_interface *iface = dev->priv;
3236 local_info_t *local = iface->local;
3237 struct iw_encode_ext *ext = (struct iw_encode_ext *) extra;
3238 int i, ret = 0;
3239 struct ieee80211_crypto_ops *ops;
3240 struct ieee80211_crypt_data **crypt;
3241 void *sta_ptr;
3242 u8 *addr;
3243 const char *alg, *module;
3244
3245 i = erq->flags & IW_ENCODE_INDEX;
3246 if (i > WEP_KEYS)
3247 return -EINVAL;
3248 if (i < 1 || i > WEP_KEYS)
3249 i = local->tx_keyidx;
3250 else
3251 i--;
3252 if (i < 0 || i >= WEP_KEYS)
3253 return -EINVAL;
3254
3255 addr = ext->addr.sa_data;
3256 if (addr[0] == 0xff && addr[1] == 0xff && addr[2] == 0xff &&
3257 addr[3] == 0xff && addr[4] == 0xff && addr[5] == 0xff) {
3258 sta_ptr = NULL;
3259 crypt = &local->crypt[i];
3260 } else {
3261 if (i != 0)
3262 return -EINVAL;
3263 sta_ptr = ap_crypt_get_ptrs(local->ap, addr, 0, &crypt);
3264 if (sta_ptr == NULL) {
3265 if (local->iw_mode == IW_MODE_INFRA) {
3266 /*
3267 * TODO: add STA entry for the current AP so
3268 * that unicast key can be used. For now, this
3269 * is emulated by using default key idx 0.
3270 */
3271 i = 0;
3272 crypt = &local->crypt[i];
3273 } else
3274 return -EINVAL;
3275 }
3276 }
3277
3278 if ((erq->flags & IW_ENCODE_DISABLED) ||
3279 ext->alg == IW_ENCODE_ALG_NONE) {
3280 if (*crypt)
3281 prism2_crypt_delayed_deinit(local, crypt);
3282 goto done;
3283 }
3284
3285 switch (ext->alg) {
3286 case IW_ENCODE_ALG_WEP:
3287 alg = "WEP";
3288 module = "ieee80211_crypt_wep";
3289 break;
3290 case IW_ENCODE_ALG_TKIP:
3291 alg = "TKIP";
3292 module = "ieee80211_crypt_tkip";
3293 break;
3294 case IW_ENCODE_ALG_CCMP:
3295 alg = "CCMP";
3296 module = "ieee80211_crypt_ccmp";
3297 break;
3298 default:
3299 printk(KERN_DEBUG "%s: unsupported algorithm %d\n",
3300 local->dev->name, ext->alg);
3301 ret = -EOPNOTSUPP;
3302 goto done;
3303 }
3304
3305 ops = ieee80211_get_crypto_ops(alg);
3306 if (ops == NULL) {
3307 request_module(module);
3308 ops = ieee80211_get_crypto_ops(alg);
3309 }
3310 if (ops == NULL) {
3311 printk(KERN_DEBUG "%s: unknown crypto alg '%s'\n",
3312 local->dev->name, alg);
3313 ret = -EOPNOTSUPP;
3314 goto done;
3315 }
3316
3317 if (sta_ptr || ext->alg != IW_ENCODE_ALG_WEP) {
3318 /*
3319 * Per station encryption and other than WEP algorithms
3320 * require host-based encryption, so force them on
3321 * automatically.
3322 */
3323 local->host_decrypt = local->host_encrypt = 1;
3324 }
3325
3326 if (*crypt == NULL || (*crypt)->ops != ops) {
3327 struct ieee80211_crypt_data *new_crypt;
3328
3329 prism2_crypt_delayed_deinit(local, crypt);
3330
3331 new_crypt = (struct ieee80211_crypt_data *)
3332 kmalloc(sizeof(struct ieee80211_crypt_data),
3333 GFP_KERNEL);
3334 if (new_crypt == NULL) {
3335 ret = -ENOMEM;
3336 goto done;
3337 }
3338 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
3339 new_crypt->ops = ops;
3340 new_crypt->priv = new_crypt->ops->init(i);
3341 if (new_crypt->priv == NULL) {
3342 kfree(new_crypt);
3343 ret = -EINVAL;
3344 goto done;
3345 }
3346
3347 *crypt = new_crypt;
3348 }
3349
3350 /*
3351 * TODO: if ext_flags does not have IW_ENCODE_EXT_RX_SEQ_VALID, the
3352 * existing seq# should not be changed.
3353 * TODO: if ext_flags has IW_ENCODE_EXT_TX_SEQ_VALID, next TX seq#
3354 * should be changed to something else than zero.
3355 */
3356 if ((!(ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) || ext->key_len > 0)
3357 && (*crypt)->ops->set_key &&
3358 (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
3359 (*crypt)->priv) < 0) {
3360 printk(KERN_DEBUG "%s: key setting failed\n",
3361 local->dev->name);
3362 ret = -EINVAL;
3363 goto done;
3364 }
3365
3366 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
3367 if (!sta_ptr)
3368 local->tx_keyidx = i;
3369 else if (i) {
3370 ret = -EINVAL;
3371 goto done;
3372 }
3373 }
3374
3375
3376 if (sta_ptr == NULL && ext->key_len > 0) {
3377 int first = 1, j;
3378 for (j = 0; j < WEP_KEYS; j++) {
3379 if (j != i && local->crypt[j]) {
3380 first = 0;
3381 break;
3382 }
3383 }
3384 if (first)
3385 local->tx_keyidx = i;
3386 }
3387
3388 done:
3389 if (sta_ptr)
3390 hostap_handle_sta_release(sta_ptr);
3391
3392 local->open_wep = erq->flags & IW_ENCODE_OPEN;
3393
3394 /*
3395 * Do not reset port0 if card is in Managed mode since resetting will
3396 * generate new IEEE 802.11 authentication which may end up in looping
3397 * with IEEE 802.1X. Prism2 documentation seem to require port reset
3398 * after WEP configuration. However, keys are apparently changed at
3399 * least in Managed mode.
3400 */
3401 if (ret == 0 &&
3402 (hostap_set_encryption(local) ||
3403 (local->iw_mode != IW_MODE_INFRA &&
3404 local->func->reset_port(local->dev))))
3405 ret = -EINVAL;
3406
3407 return ret;
3408}
3409
3410
3411static int prism2_ioctl_giwencodeext(struct net_device *dev,
3412 struct iw_request_info *info,
3413 struct iw_point *erq, char *extra)
3414{
3415 struct hostap_interface *iface = dev->priv;
3416 local_info_t *local = iface->local;
3417 struct ieee80211_crypt_data **crypt;
3418 void *sta_ptr;
3419 int max_key_len, i;
3420 struct iw_encode_ext *ext = (struct iw_encode_ext *) extra;
3421 u8 *addr;
3422
3423 max_key_len = erq->length - sizeof(*ext);
3424 if (max_key_len < 0)
3425 return -EINVAL;
3426
3427 i = erq->flags & IW_ENCODE_INDEX;
3428 if (i < 1 || i > WEP_KEYS)
3429 i = local->tx_keyidx;
3430 else
3431 i--;
3432
3433 addr = ext->addr.sa_data;
3434 if (addr[0] == 0xff && addr[1] == 0xff && addr[2] == 0xff &&
3435 addr[3] == 0xff && addr[4] == 0xff && addr[5] == 0xff) {
3436 sta_ptr = NULL;
3437 crypt = &local->crypt[i];
3438 } else {
3439 i = 0;
3440 sta_ptr = ap_crypt_get_ptrs(local->ap, addr, 0, &crypt);
3441 if (sta_ptr == NULL)
3442 return -EINVAL;
3443 }
3444 erq->flags = i + 1;
3445 memset(ext, 0, sizeof(*ext));
3446
3447 if (*crypt == NULL || (*crypt)->ops == NULL) {
3448 ext->alg = IW_ENCODE_ALG_NONE;
3449 ext->key_len = 0;
3450 erq->flags |= IW_ENCODE_DISABLED;
3451 } else {
3452 if (strcmp((*crypt)->ops->name, "WEP") == 0)
3453 ext->alg = IW_ENCODE_ALG_WEP;
3454 else if (strcmp((*crypt)->ops->name, "TKIP") == 0)
3455 ext->alg = IW_ENCODE_ALG_TKIP;
3456 else if (strcmp((*crypt)->ops->name, "CCMP") == 0)
3457 ext->alg = IW_ENCODE_ALG_CCMP;
3458 else
3459 return -EINVAL;
3460
3461 if ((*crypt)->ops->get_key) {
3462 ext->key_len =
3463 (*crypt)->ops->get_key(ext->key,
3464 max_key_len,
3465 ext->tx_seq,
3466 (*crypt)->priv);
3467 if (ext->key_len &&
3468 (ext->alg == IW_ENCODE_ALG_TKIP ||
3469 ext->alg == IW_ENCODE_ALG_CCMP))
3470 ext->ext_flags |= IW_ENCODE_EXT_TX_SEQ_VALID;
3471 }
3472 }
3473
3474 if (sta_ptr)
3475 hostap_handle_sta_release(sta_ptr);
3476
3477 return 0;
3478}
3479
3480
3481static int prism2_ioctl_set_encryption(local_info_t *local,
3482 struct prism2_hostapd_param *param,
3483 int param_len)
3484{
3485 int ret = 0;
3486 struct ieee80211_crypto_ops *ops;
3487 struct ieee80211_crypt_data **crypt;
3488 void *sta_ptr;
3489
3490 param->u.crypt.err = 0;
3491 param->u.crypt.alg[HOSTAP_CRYPT_ALG_NAME_LEN - 1] = '\0';
3492
3493 if (param_len !=
3494 (int) ((char *) param->u.crypt.key - (char *) param) +
3495 param->u.crypt.key_len)
3496 return -EINVAL;
3497
3498 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
3499 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
3500 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
3501 if (param->u.crypt.idx >= WEP_KEYS)
3502 return -EINVAL;
3503 sta_ptr = NULL;
3504 crypt = &local->crypt[param->u.crypt.idx];
3505 } else {
3506 if (param->u.crypt.idx)
3507 return -EINVAL;
3508 sta_ptr = ap_crypt_get_ptrs(
3509 local->ap, param->sta_addr,
3510 (param->u.crypt.flags & HOSTAP_CRYPT_FLAG_PERMANENT),
3511 &crypt);
3512
3513 if (sta_ptr == NULL) {
3514 param->u.crypt.err = HOSTAP_CRYPT_ERR_UNKNOWN_ADDR;
3515 return -EINVAL;
3516 }
3517 }
3518
3519 if (strcmp(param->u.crypt.alg, "none") == 0) {
3520 if (crypt)
3521 prism2_crypt_delayed_deinit(local, crypt);
3522 goto done;
3523 }
3524
3525 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3526 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
3527 request_module("ieee80211_crypt_wep");
3528 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3529 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
3530 request_module("ieee80211_crypt_tkip");
3531 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3532 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
3533 request_module("ieee80211_crypt_ccmp");
3534 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3535 }
3536 if (ops == NULL) {
3537 printk(KERN_DEBUG "%s: unknown crypto alg '%s'\n",
3538 local->dev->name, param->u.crypt.alg);
3539 param->u.crypt.err = HOSTAP_CRYPT_ERR_UNKNOWN_ALG;
3540 ret = -EINVAL;
3541 goto done;
3542 }
3543
3544 /* station based encryption and other than WEP algorithms require
3545 * host-based encryption, so force them on automatically */
3546 local->host_decrypt = local->host_encrypt = 1;
3547
3548 if (*crypt == NULL || (*crypt)->ops != ops) {
3549 struct ieee80211_crypt_data *new_crypt;
3550
3551 prism2_crypt_delayed_deinit(local, crypt);
3552
3553 new_crypt = (struct ieee80211_crypt_data *)
3554 kmalloc(sizeof(struct ieee80211_crypt_data),
3555 GFP_KERNEL);
3556 if (new_crypt == NULL) {
3557 ret = -ENOMEM;
3558 goto done;
3559 }
3560 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
3561 new_crypt->ops = ops;
3562 new_crypt->priv = new_crypt->ops->init(param->u.crypt.idx);
3563 if (new_crypt->priv == NULL) {
3564 kfree(new_crypt);
3565 param->u.crypt.err =
3566 HOSTAP_CRYPT_ERR_CRYPT_INIT_FAILED;
3567 ret = -EINVAL;
3568 goto done;
3569 }
3570
3571 *crypt = new_crypt;
3572 }
3573
3574 if ((!(param->u.crypt.flags & HOSTAP_CRYPT_FLAG_SET_TX_KEY) ||
3575 param->u.crypt.key_len > 0) && (*crypt)->ops->set_key &&
3576 (*crypt)->ops->set_key(param->u.crypt.key,
3577 param->u.crypt.key_len, param->u.crypt.seq,
3578 (*crypt)->priv) < 0) {
3579 printk(KERN_DEBUG "%s: key setting failed\n",
3580 local->dev->name);
3581 param->u.crypt.err = HOSTAP_CRYPT_ERR_KEY_SET_FAILED;
3582 ret = -EINVAL;
3583 goto done;
3584 }
3585
3586 if (param->u.crypt.flags & HOSTAP_CRYPT_FLAG_SET_TX_KEY) {
3587 if (!sta_ptr)
3588 local->tx_keyidx = param->u.crypt.idx;
3589 else if (param->u.crypt.idx) {
3590 printk(KERN_DEBUG "%s: TX key idx setting failed\n",
3591 local->dev->name);
3592 param->u.crypt.err =
3593 HOSTAP_CRYPT_ERR_TX_KEY_SET_FAILED;
3594 ret = -EINVAL;
3595 goto done;
3596 }
3597 }
3598
3599 done:
3600 if (sta_ptr)
3601 hostap_handle_sta_release(sta_ptr);
3602
3603 /* Do not reset port0 if card is in Managed mode since resetting will
3604 * generate new IEEE 802.11 authentication which may end up in looping
3605 * with IEEE 802.1X. Prism2 documentation seem to require port reset
3606 * after WEP configuration. However, keys are apparently changed at
3607 * least in Managed mode. */
3608 if (ret == 0 &&
3609 (hostap_set_encryption(local) ||
3610 (local->iw_mode != IW_MODE_INFRA &&
3611 local->func->reset_port(local->dev)))) {
3612 param->u.crypt.err = HOSTAP_CRYPT_ERR_CARD_CONF_FAILED;
3613 return -EINVAL;
3614 }
3615
3616 return ret;
3617}
3618
3619
3620static int prism2_ioctl_get_encryption(local_info_t *local,
3621 struct prism2_hostapd_param *param,
3622 int param_len)
3623{
3624 struct ieee80211_crypt_data **crypt;
3625 void *sta_ptr;
3626 int max_key_len;
3627
3628 param->u.crypt.err = 0;
3629
3630 max_key_len = param_len -
3631 (int) ((char *) param->u.crypt.key - (char *) param);
3632 if (max_key_len < 0)
3633 return -EINVAL;
3634
3635 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
3636 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
3637 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
3638 sta_ptr = NULL;
3639 if (param->u.crypt.idx >= WEP_KEYS)
3640 param->u.crypt.idx = local->tx_keyidx;
3641 crypt = &local->crypt[param->u.crypt.idx];
3642 } else {
3643 param->u.crypt.idx = 0;
3644 sta_ptr = ap_crypt_get_ptrs(local->ap, param->sta_addr, 0,
3645 &crypt);
3646
3647 if (sta_ptr == NULL) {
3648 param->u.crypt.err = HOSTAP_CRYPT_ERR_UNKNOWN_ADDR;
3649 return -EINVAL;
3650 }
3651 }
3652
3653 if (*crypt == NULL || (*crypt)->ops == NULL) {
3654 memcpy(param->u.crypt.alg, "none", 5);
3655 param->u.crypt.key_len = 0;
3656 param->u.crypt.idx = 0xff;
3657 } else {
3658 strncpy(param->u.crypt.alg, (*crypt)->ops->name,
3659 HOSTAP_CRYPT_ALG_NAME_LEN);
3660 param->u.crypt.key_len = 0;
3661
3662 memset(param->u.crypt.seq, 0, 8);
3663 if ((*crypt)->ops->get_key) {
3664 param->u.crypt.key_len =
3665 (*crypt)->ops->get_key(param->u.crypt.key,
3666 max_key_len,
3667 param->u.crypt.seq,
3668 (*crypt)->priv);
3669 }
3670 }
3671
3672 if (sta_ptr)
3673 hostap_handle_sta_release(sta_ptr);
3674
3675 return 0;
3676}
3677
3678
3679static int prism2_ioctl_get_rid(local_info_t *local,
3680 struct prism2_hostapd_param *param,
3681 int param_len)
3682{
3683 int max_len, res;
3684
3685 max_len = param_len - PRISM2_HOSTAPD_RID_HDR_LEN;
3686 if (max_len < 0)
3687 return -EINVAL;
3688
3689 res = local->func->get_rid(local->dev, param->u.rid.rid,
3690 param->u.rid.data, param->u.rid.len, 0);
3691 if (res >= 0) {
3692 param->u.rid.len = res;
3693 return 0;
3694 }
3695
3696 return res;
3697}
3698
3699
3700static int prism2_ioctl_set_rid(local_info_t *local,
3701 struct prism2_hostapd_param *param,
3702 int param_len)
3703{
3704 int max_len;
3705
3706 max_len = param_len - PRISM2_HOSTAPD_RID_HDR_LEN;
3707 if (max_len < 0 || max_len < param->u.rid.len)
3708 return -EINVAL;
3709
3710 return local->func->set_rid(local->dev, param->u.rid.rid,
3711 param->u.rid.data, param->u.rid.len);
3712}
3713
3714
3715static int prism2_ioctl_set_assoc_ap_addr(local_info_t *local,
3716 struct prism2_hostapd_param *param,
3717 int param_len)
3718{
3719 printk(KERN_DEBUG "%ssta: associated as client with AP " MACSTR "\n",
3720 local->dev->name, MAC2STR(param->sta_addr));
3721 memcpy(local->assoc_ap_addr, param->sta_addr, ETH_ALEN);
3722 return 0;
3723}
3724
3725
3726static int prism2_ioctl_siwgenie(struct net_device *dev,
3727 struct iw_request_info *info,
3728 struct iw_point *data, char *extra)
3729{
3730 return prism2_set_genericelement(dev, extra, data->length);
3731}
3732
3733
3734static int prism2_ioctl_giwgenie(struct net_device *dev,
3735 struct iw_request_info *info,
3736 struct iw_point *data, char *extra)
3737{
3738 struct hostap_interface *iface = dev->priv;
3739 local_info_t *local = iface->local;
3740 int len = local->generic_elem_len - 2;
3741
3742 if (len <= 0 || local->generic_elem == NULL) {
3743 data->length = 0;
3744 return 0;
3745 }
3746
3747 if (data->length < len)
3748 return -E2BIG;
3749
3750 data->length = len;
3751 memcpy(extra, local->generic_elem + 2, len);
3752
3753 return 0;
3754}
3755
3756
3757static int prism2_ioctl_set_generic_element(local_info_t *local,
3758 struct prism2_hostapd_param *param,
3759 int param_len)
3760{
3761 int max_len, len;
3762
3763 len = param->u.generic_elem.len;
3764 max_len = param_len - PRISM2_HOSTAPD_GENERIC_ELEMENT_HDR_LEN;
3765 if (max_len < 0 || max_len < len)
3766 return -EINVAL;
3767
3768 return prism2_set_genericelement(local->dev,
3769 param->u.generic_elem.data, len);
3770}
3771
3772
3773static int prism2_ioctl_siwmlme(struct net_device *dev,
3774 struct iw_request_info *info,
3775 struct iw_point *data, char *extra)
3776{
3777 struct hostap_interface *iface = dev->priv;
3778 local_info_t *local = iface->local;
3779 struct iw_mlme *mlme = (struct iw_mlme *) extra;
3780 u16 reason;
3781
3782 reason = cpu_to_le16(mlme->reason_code);
3783
3784 switch (mlme->cmd) {
3785 case IW_MLME_DEAUTH:
3786 return prism2_sta_send_mgmt(local, mlme->addr.sa_data,
3787 IEEE80211_STYPE_DEAUTH,
3788 (u8 *) &reason, 2);
3789 case IW_MLME_DISASSOC:
3790 return prism2_sta_send_mgmt(local, mlme->addr.sa_data,
3791 IEEE80211_STYPE_DISASSOC,
3792 (u8 *) &reason, 2);
3793 default:
3794 return -EOPNOTSUPP;
3795 }
3796}
3797
3798
3799static int prism2_ioctl_mlme(local_info_t *local,
3800 struct prism2_hostapd_param *param)
3801{
3802 u16 reason;
3803
3804 reason = cpu_to_le16(param->u.mlme.reason_code);
3805 switch (param->u.mlme.cmd) {
3806 case MLME_STA_DEAUTH:
3807 return prism2_sta_send_mgmt(local, param->sta_addr,
3808 IEEE80211_STYPE_DEAUTH,
3809 (u8 *) &reason, 2);
3810 case MLME_STA_DISASSOC:
3811 return prism2_sta_send_mgmt(local, param->sta_addr,
3812 IEEE80211_STYPE_DISASSOC,
3813 (u8 *) &reason, 2);
3814 default:
3815 return -EOPNOTSUPP;
3816 }
3817}
3818
3819
3820static int prism2_ioctl_scan_req(local_info_t *local,
3821 struct prism2_hostapd_param *param)
3822{
3823#ifndef PRISM2_NO_STATION_MODES
3824 if ((local->iw_mode != IW_MODE_INFRA &&
3825 local->iw_mode != IW_MODE_ADHOC) ||
3826 (local->sta_fw_ver < PRISM2_FW_VER(1,3,1)))
3827 return -EOPNOTSUPP;
3828
3829 if (!local->dev_enabled)
3830 return -ENETDOWN;
3831
3832 return prism2_request_hostscan(local->dev, param->u.scan_req.ssid,
3833 param->u.scan_req.ssid_len);
3834#else /* PRISM2_NO_STATION_MODES */
3835 return -EOPNOTSUPP;
3836#endif /* PRISM2_NO_STATION_MODES */
3837}
3838
3839
3840static int prism2_ioctl_priv_hostapd(local_info_t *local, struct iw_point *p)
3841{
3842 struct prism2_hostapd_param *param;
3843 int ret = 0;
3844 int ap_ioctl = 0;
3845
3846 if (p->length < sizeof(struct prism2_hostapd_param) ||
3847 p->length > PRISM2_HOSTAPD_MAX_BUF_SIZE || !p->pointer)
3848 return -EINVAL;
3849
3850 param = (struct prism2_hostapd_param *) kmalloc(p->length, GFP_KERNEL);
3851 if (param == NULL)
3852 return -ENOMEM;
3853
3854 if (copy_from_user(param, p->pointer, p->length)) {
3855 ret = -EFAULT;
3856 goto out;
3857 }
3858
3859 switch (param->cmd) {
3860 case PRISM2_SET_ENCRYPTION:
3861 ret = prism2_ioctl_set_encryption(local, param, p->length);
3862 break;
3863 case PRISM2_GET_ENCRYPTION:
3864 ret = prism2_ioctl_get_encryption(local, param, p->length);
3865 break;
3866 case PRISM2_HOSTAPD_GET_RID:
3867 ret = prism2_ioctl_get_rid(local, param, p->length);
3868 break;
3869 case PRISM2_HOSTAPD_SET_RID:
3870 ret = prism2_ioctl_set_rid(local, param, p->length);
3871 break;
3872 case PRISM2_HOSTAPD_SET_ASSOC_AP_ADDR:
3873 ret = prism2_ioctl_set_assoc_ap_addr(local, param, p->length);
3874 break;
3875 case PRISM2_HOSTAPD_SET_GENERIC_ELEMENT:
3876 ret = prism2_ioctl_set_generic_element(local, param,
3877 p->length);
3878 break;
3879 case PRISM2_HOSTAPD_MLME:
3880 ret = prism2_ioctl_mlme(local, param);
3881 break;
3882 case PRISM2_HOSTAPD_SCAN_REQ:
3883 ret = prism2_ioctl_scan_req(local, param);
3884 break;
3885 default:
3886 ret = prism2_hostapd(local->ap, param);
3887 ap_ioctl = 1;
3888 break;
3889 }
3890
3891 if (ret == 1 || !ap_ioctl) {
3892 if (copy_to_user(p->pointer, param, p->length)) {
3893 ret = -EFAULT;
3894 goto out;
3895 } else if (ap_ioctl)
3896 ret = 0;
3897 }
3898
3899 out:
3900 if (param != NULL)
3901 kfree(param);
3902
3903 return ret;
3904}
3905
3906
3907static void prism2_get_drvinfo(struct net_device *dev,
3908 struct ethtool_drvinfo *info)
3909{
3910 struct hostap_interface *iface;
3911 local_info_t *local;
3912
3913 iface = netdev_priv(dev);
3914 local = iface->local;
3915
3916 strncpy(info->driver, "hostap", sizeof(info->driver) - 1);
3917 strncpy(info->version, PRISM2_VERSION,
3918 sizeof(info->version) - 1);
3919 snprintf(info->fw_version, sizeof(info->fw_version) - 1,
3920 "%d.%d.%d", (local->sta_fw_ver >> 16) & 0xff,
3921 (local->sta_fw_ver >> 8) & 0xff,
3922 local->sta_fw_ver & 0xff);
3923}
3924
3925static struct ethtool_ops prism2_ethtool_ops = {
3926 .get_drvinfo = prism2_get_drvinfo
3927};
3928
3929
3930/* Structures to export the Wireless Handlers */
3931
3932static const iw_handler prism2_handler[] =
3933{
3934 (iw_handler) NULL, /* SIOCSIWCOMMIT */
3935 (iw_handler) prism2_get_name, /* SIOCGIWNAME */
3936 (iw_handler) NULL, /* SIOCSIWNWID */
3937 (iw_handler) NULL, /* SIOCGIWNWID */
3938 (iw_handler) prism2_ioctl_siwfreq, /* SIOCSIWFREQ */
3939 (iw_handler) prism2_ioctl_giwfreq, /* SIOCGIWFREQ */
3940 (iw_handler) prism2_ioctl_siwmode, /* SIOCSIWMODE */
3941 (iw_handler) prism2_ioctl_giwmode, /* SIOCGIWMODE */
3942 (iw_handler) prism2_ioctl_siwsens, /* SIOCSIWSENS */
3943 (iw_handler) prism2_ioctl_giwsens, /* SIOCGIWSENS */
3944 (iw_handler) NULL /* not used */, /* SIOCSIWRANGE */
3945 (iw_handler) prism2_ioctl_giwrange, /* SIOCGIWRANGE */
3946 (iw_handler) NULL /* not used */, /* SIOCSIWPRIV */
3947 (iw_handler) NULL /* kernel code */, /* SIOCGIWPRIV */
3948 (iw_handler) NULL /* not used */, /* SIOCSIWSTATS */
3949 (iw_handler) NULL /* kernel code */, /* SIOCGIWSTATS */
3950 iw_handler_set_spy, /* SIOCSIWSPY */
3951 iw_handler_get_spy, /* SIOCGIWSPY */
3952 iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
3953 iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
3954 (iw_handler) prism2_ioctl_siwap, /* SIOCSIWAP */
3955 (iw_handler) prism2_ioctl_giwap, /* SIOCGIWAP */
3956 (iw_handler) prism2_ioctl_siwmlme, /* SIOCSIWMLME */
3957 (iw_handler) prism2_ioctl_giwaplist, /* SIOCGIWAPLIST */
3958 (iw_handler) prism2_ioctl_siwscan, /* SIOCSIWSCAN */
3959 (iw_handler) prism2_ioctl_giwscan, /* SIOCGIWSCAN */
3960 (iw_handler) prism2_ioctl_siwessid, /* SIOCSIWESSID */
3961 (iw_handler) prism2_ioctl_giwessid, /* SIOCGIWESSID */
3962 (iw_handler) prism2_ioctl_siwnickn, /* SIOCSIWNICKN */
3963 (iw_handler) prism2_ioctl_giwnickn, /* SIOCGIWNICKN */
3964 (iw_handler) NULL, /* -- hole -- */
3965 (iw_handler) NULL, /* -- hole -- */
3966 (iw_handler) prism2_ioctl_siwrate, /* SIOCSIWRATE */
3967 (iw_handler) prism2_ioctl_giwrate, /* SIOCGIWRATE */
3968 (iw_handler) prism2_ioctl_siwrts, /* SIOCSIWRTS */
3969 (iw_handler) prism2_ioctl_giwrts, /* SIOCGIWRTS */
3970 (iw_handler) prism2_ioctl_siwfrag, /* SIOCSIWFRAG */
3971 (iw_handler) prism2_ioctl_giwfrag, /* SIOCGIWFRAG */
3972 (iw_handler) prism2_ioctl_siwtxpow, /* SIOCSIWTXPOW */
3973 (iw_handler) prism2_ioctl_giwtxpow, /* SIOCGIWTXPOW */
3974 (iw_handler) prism2_ioctl_siwretry, /* SIOCSIWRETRY */
3975 (iw_handler) prism2_ioctl_giwretry, /* SIOCGIWRETRY */
3976 (iw_handler) prism2_ioctl_siwencode, /* SIOCSIWENCODE */
3977 (iw_handler) prism2_ioctl_giwencode, /* SIOCGIWENCODE */
3978 (iw_handler) prism2_ioctl_siwpower, /* SIOCSIWPOWER */
3979 (iw_handler) prism2_ioctl_giwpower, /* SIOCGIWPOWER */
3980 (iw_handler) NULL, /* -- hole -- */
3981 (iw_handler) NULL, /* -- hole -- */
3982 (iw_handler) prism2_ioctl_siwgenie, /* SIOCSIWGENIE */
3983 (iw_handler) prism2_ioctl_giwgenie, /* SIOCGIWGENIE */
3984 (iw_handler) prism2_ioctl_siwauth, /* SIOCSIWAUTH */
3985 (iw_handler) prism2_ioctl_giwauth, /* SIOCGIWAUTH */
3986 (iw_handler) prism2_ioctl_siwencodeext, /* SIOCSIWENCODEEXT */
3987 (iw_handler) prism2_ioctl_giwencodeext, /* SIOCGIWENCODEEXT */
3988 (iw_handler) NULL, /* SIOCSIWPMKSA */
3989 (iw_handler) NULL, /* -- hole -- */
3990};
3991
3992static const iw_handler prism2_private_handler[] =
3993{ /* SIOCIWFIRSTPRIV + */
3994 (iw_handler) prism2_ioctl_priv_prism2_param, /* 0 */
3995 (iw_handler) prism2_ioctl_priv_get_prism2_param, /* 1 */
3996 (iw_handler) prism2_ioctl_priv_writemif, /* 2 */
3997 (iw_handler) prism2_ioctl_priv_readmif, /* 3 */
3998};
3999
4000static const struct iw_handler_def hostap_iw_handler_def =
4001{
4002 .num_standard = sizeof(prism2_handler) / sizeof(iw_handler),
4003 .num_private = sizeof(prism2_private_handler) / sizeof(iw_handler),
4004 .num_private_args = sizeof(prism2_priv) / sizeof(struct iw_priv_args),
4005 .standard = (iw_handler *) prism2_handler,
4006 .private = (iw_handler *) prism2_private_handler,
4007 .private_args = (struct iw_priv_args *) prism2_priv,
4008 .get_wireless_stats = hostap_get_wireless_stats,
4009};
4010
4011
4012int hostap_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4013{
4014 struct iwreq *wrq = (struct iwreq *) ifr;
4015 struct hostap_interface *iface;
4016 local_info_t *local;
4017 int ret = 0;
4018
4019 iface = netdev_priv(dev);
4020 local = iface->local;
4021
4022 switch (cmd) {
4023 /* Private ioctls (iwpriv) that have not yet been converted
4024 * into new wireless extensions API */
4025
4026 case PRISM2_IOCTL_INQUIRE:
4027 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4028 else ret = prism2_ioctl_priv_inquire(dev, (int *) wrq->u.name);
4029 break;
4030
4031 case PRISM2_IOCTL_MONITOR:
4032 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4033 else ret = prism2_ioctl_priv_monitor(dev, (int *) wrq->u.name);
4034 break;
4035
4036 case PRISM2_IOCTL_RESET:
4037 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4038 else ret = prism2_ioctl_priv_reset(dev, (int *) wrq->u.name);
4039 break;
4040
4041 case PRISM2_IOCTL_WDS_ADD:
4042 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4043 else ret = prism2_wds_add(local, wrq->u.ap_addr.sa_data, 1);
4044 break;
4045
4046 case PRISM2_IOCTL_WDS_DEL:
4047 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4048 else ret = prism2_wds_del(local, wrq->u.ap_addr.sa_data, 1, 0);
4049 break;
4050
4051 case PRISM2_IOCTL_SET_RID_WORD:
4052 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4053 else ret = prism2_ioctl_priv_set_rid_word(dev,
4054 (int *) wrq->u.name);
4055 break;
4056
4057#ifndef PRISM2_NO_KERNEL_IEEE80211_MGMT
4058 case PRISM2_IOCTL_MACCMD:
4059 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4060 else ret = ap_mac_cmd_ioctl(local, (int *) wrq->u.name);
4061 break;
4062
4063 case PRISM2_IOCTL_ADDMAC:
4064 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4065 else ret = ap_control_add_mac(&local->ap->mac_restrictions,
4066 wrq->u.ap_addr.sa_data);
4067 break;
4068 case PRISM2_IOCTL_DELMAC:
4069 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4070 else ret = ap_control_del_mac(&local->ap->mac_restrictions,
4071 wrq->u.ap_addr.sa_data);
4072 break;
4073 case PRISM2_IOCTL_KICKMAC:
4074 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4075 else ret = ap_control_kick_mac(local->ap, local->dev,
4076 wrq->u.ap_addr.sa_data);
4077 break;
4078#endif /* PRISM2_NO_KERNEL_IEEE80211_MGMT */
4079
4080
4081 /* Private ioctls that are not used with iwpriv;
4082 * in SIOCDEVPRIVATE range */
4083
4084#ifdef PRISM2_DOWNLOAD_SUPPORT
4085 case PRISM2_IOCTL_DOWNLOAD:
4086 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4087 else ret = prism2_ioctl_priv_download(local, &wrq->u.data);
4088 break;
4089#endif /* PRISM2_DOWNLOAD_SUPPORT */
4090
4091 case PRISM2_IOCTL_HOSTAPD:
4092 if (!capable(CAP_NET_ADMIN)) ret = -EPERM;
4093 else ret = prism2_ioctl_priv_hostapd(local, &wrq->u.data);
4094 break;
4095
4096 default:
4097 ret = -EOPNOTSUPP;
4098 break;
4099 }
4100
4101 return ret;
4102}
diff --git a/drivers/net/wireless/hostap/hostap_pci.c b/drivers/net/wireless/hostap/hostap_pci.c
new file mode 100644
index 000000000000..025f8cdb5566
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_pci.c
@@ -0,0 +1,473 @@
1#define PRISM2_PCI
2
3/* Host AP driver's support for Intersil Prism2.5 PCI cards is based on
4 * driver patches from Reyk Floeter <reyk@vantronix.net> and
5 * Andy Warner <andyw@pobox.com> */
6
7#include <linux/config.h>
8#include <linux/version.h>
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/if.h>
12#include <linux/skbuff.h>
13#include <linux/netdevice.h>
14#include <linux/workqueue.h>
15#include <linux/wireless.h>
16#include <net/iw_handler.h>
17
18#include <linux/ioport.h>
19#include <linux/pci.h>
20#include <asm/io.h>
21
22#include "hostap_wlan.h"
23
24
25static char *version = PRISM2_VERSION " (Jouni Malinen <jkmaline@cc.hut.fi>)";
26static char *dev_info = "hostap_pci";
27
28
29MODULE_AUTHOR("Jouni Malinen");
30MODULE_DESCRIPTION("Support for Intersil Prism2.5-based 802.11 wireless LAN "
31 "PCI cards.");
32MODULE_SUPPORTED_DEVICE("Intersil Prism2.5-based WLAN PCI cards");
33MODULE_LICENSE("GPL");
34MODULE_VERSION(PRISM2_VERSION);
35
36
37/* struct local_info::hw_priv */
38struct hostap_pci_priv {
39 void __iomem *mem_start;
40};
41
42
43/* FIX: do we need mb/wmb/rmb with memory operations? */
44
45
46static struct pci_device_id prism2_pci_id_table[] __devinitdata = {
47 /* Intersil Prism3 ISL3872 11Mb/s WLAN Controller */
48 { 0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID },
49 /* Intersil Prism2.5 ISL3874 11Mb/s WLAN Controller */
50 { 0x1260, 0x3873, PCI_ANY_ID, PCI_ANY_ID },
51 /* Samsung MagicLAN SWL-2210P */
52 { 0x167d, 0xa000, PCI_ANY_ID, PCI_ANY_ID },
53 { 0 }
54};
55
56
57#ifdef PRISM2_IO_DEBUG
58
59static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v)
60{
61 struct hostap_interface *iface;
62 local_info_t *local;
63 unsigned long flags;
64
65 iface = netdev_priv(dev);
66 local = iface->local;
67
68 spin_lock_irqsave(&local->lock, flags);
69 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v);
70 writeb(v, hw_priv->mem_start + a);
71 spin_unlock_irqrestore(&local->lock, flags);
72}
73
74static inline u8 hfa384x_inb_debug(struct net_device *dev, int a)
75{
76 struct hostap_interface *iface;
77 local_info_t *local;
78 unsigned long flags;
79 u8 v;
80
81 iface = netdev_priv(dev);
82 local = iface->local;
83
84 spin_lock_irqsave(&local->lock, flags);
85 v = readb(hw_priv->mem_start + a);
86 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v);
87 spin_unlock_irqrestore(&local->lock, flags);
88 return v;
89}
90
91static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v)
92{
93 struct hostap_interface *iface;
94 local_info_t *local;
95 unsigned long flags;
96
97 iface = netdev_priv(dev);
98 local = iface->local;
99
100 spin_lock_irqsave(&local->lock, flags);
101 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v);
102 writew(v, hw_priv->mem_start + a);
103 spin_unlock_irqrestore(&local->lock, flags);
104}
105
106static inline u16 hfa384x_inw_debug(struct net_device *dev, int a)
107{
108 struct hostap_interface *iface;
109 local_info_t *local;
110 unsigned long flags;
111 u16 v;
112
113 iface = netdev_priv(dev);
114 local = iface->local;
115
116 spin_lock_irqsave(&local->lock, flags);
117 v = readw(hw_priv->mem_start + a);
118 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v);
119 spin_unlock_irqrestore(&local->lock, flags);
120 return v;
121}
122
123#define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v))
124#define HFA384X_INB(a) hfa384x_inb_debug(dev, (a))
125#define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v))
126#define HFA384X_INW(a) hfa384x_inw_debug(dev, (a))
127#define HFA384X_OUTW_DATA(v,a) hfa384x_outw_debug(dev, (a), cpu_to_le16((v)))
128#define HFA384X_INW_DATA(a) (u16) le16_to_cpu(hfa384x_inw_debug(dev, (a)))
129
130#else /* PRISM2_IO_DEBUG */
131
132static inline void hfa384x_outb(struct net_device *dev, int a, u8 v)
133{
134 struct hostap_interface *iface;
135 struct hostap_pci_priv *hw_priv;
136 iface = netdev_priv(dev);
137 hw_priv = iface->local->hw_priv;
138 writeb(v, hw_priv->mem_start + a);
139}
140
141static inline u8 hfa384x_inb(struct net_device *dev, int a)
142{
143 struct hostap_interface *iface;
144 struct hostap_pci_priv *hw_priv;
145 iface = netdev_priv(dev);
146 hw_priv = iface->local->hw_priv;
147 return readb(hw_priv->mem_start + a);
148}
149
150static inline void hfa384x_outw(struct net_device *dev, int a, u16 v)
151{
152 struct hostap_interface *iface;
153 struct hostap_pci_priv *hw_priv;
154 iface = netdev_priv(dev);
155 hw_priv = iface->local->hw_priv;
156 writew(v, hw_priv->mem_start + a);
157}
158
159static inline u16 hfa384x_inw(struct net_device *dev, int a)
160{
161 struct hostap_interface *iface;
162 struct hostap_pci_priv *hw_priv;
163 iface = netdev_priv(dev);
164 hw_priv = iface->local->hw_priv;
165 return readw(hw_priv->mem_start + a);
166}
167
168#define HFA384X_OUTB(v,a) hfa384x_outb(dev, (a), (v))
169#define HFA384X_INB(a) hfa384x_inb(dev, (a))
170#define HFA384X_OUTW(v,a) hfa384x_outw(dev, (a), (v))
171#define HFA384X_INW(a) hfa384x_inw(dev, (a))
172#define HFA384X_OUTW_DATA(v,a) hfa384x_outw(dev, (a), cpu_to_le16((v)))
173#define HFA384X_INW_DATA(a) (u16) le16_to_cpu(hfa384x_inw(dev, (a)))
174
175#endif /* PRISM2_IO_DEBUG */
176
177
178static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf,
179 int len)
180{
181 u16 d_off;
182 u16 *pos;
183
184 d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
185 pos = (u16 *) buf;
186
187 for ( ; len > 1; len -= 2)
188 *pos++ = HFA384X_INW_DATA(d_off);
189
190 if (len & 1)
191 *((char *) pos) = HFA384X_INB(d_off);
192
193 return 0;
194}
195
196
197static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len)
198{
199 u16 d_off;
200 u16 *pos;
201
202 d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
203 pos = (u16 *) buf;
204
205 for ( ; len > 1; len -= 2)
206 HFA384X_OUTW_DATA(*pos++, d_off);
207
208 if (len & 1)
209 HFA384X_OUTB(*((char *) pos), d_off);
210
211 return 0;
212}
213
214
215/* FIX: This might change at some point.. */
216#include "hostap_hw.c"
217
218static void prism2_pci_cor_sreset(local_info_t *local)
219{
220 struct net_device *dev = local->dev;
221 u16 reg;
222
223 reg = HFA384X_INB(HFA384X_PCICOR_OFF);
224 printk(KERN_DEBUG "%s: Original COR value: 0x%0x\n", dev->name, reg);
225
226 /* linux-wlan-ng uses extremely long hold and settle times for
227 * COR sreset. A comment in the driver code mentions that the long
228 * delays appear to be necessary. However, at least IBM 22P6901 seems
229 * to work fine with shorter delays.
230 *
231 * Longer delays can be configured by uncommenting following line: */
232/* #define PRISM2_PCI_USE_LONG_DELAYS */
233
234#ifdef PRISM2_PCI_USE_LONG_DELAYS
235 int i;
236
237 HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF);
238 mdelay(250);
239
240 HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF);
241 mdelay(500);
242
243 /* Wait for f/w to complete initialization (CMD:BUSY == 0) */
244 i = 2000000 / 10;
245 while ((HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) && --i)
246 udelay(10);
247
248#else /* PRISM2_PCI_USE_LONG_DELAYS */
249
250 HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF);
251 mdelay(2);
252 HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF);
253 mdelay(2);
254
255#endif /* PRISM2_PCI_USE_LONG_DELAYS */
256
257 if (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) {
258 printk(KERN_DEBUG "%s: COR sreset timeout\n", dev->name);
259 }
260}
261
262
263static void prism2_pci_genesis_reset(local_info_t *local, int hcr)
264{
265 struct net_device *dev = local->dev;
266
267 HFA384X_OUTW(0x00C5, HFA384X_PCICOR_OFF);
268 mdelay(10);
269 HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF);
270 mdelay(10);
271 HFA384X_OUTW(0x0045, HFA384X_PCICOR_OFF);
272 mdelay(10);
273}
274
275
276static struct prism2_helper_functions prism2_pci_funcs =
277{
278 .card_present = NULL,
279 .cor_sreset = prism2_pci_cor_sreset,
280 .dev_open = NULL,
281 .dev_close = NULL,
282 .genesis_reset = prism2_pci_genesis_reset,
283 .hw_type = HOSTAP_HW_PCI,
284};
285
286
287static int prism2_pci_probe(struct pci_dev *pdev,
288 const struct pci_device_id *id)
289{
290 unsigned long phymem;
291 void __iomem *mem = NULL;
292 local_info_t *local = NULL;
293 struct net_device *dev = NULL;
294 static int cards_found /* = 0 */;
295 int irq_registered = 0;
296 struct hostap_interface *iface;
297 struct hostap_pci_priv *hw_priv;
298
299 hw_priv = kmalloc(sizeof(*hw_priv), GFP_KERNEL);
300 if (hw_priv == NULL)
301 return -ENOMEM;
302 memset(hw_priv, 0, sizeof(*hw_priv));
303
304 if (pci_enable_device(pdev))
305 return -EIO;
306
307 phymem = pci_resource_start(pdev, 0);
308
309 if (!request_mem_region(phymem, pci_resource_len(pdev, 0), "Prism2")) {
310 printk(KERN_ERR "prism2: Cannot reserve PCI memory region\n");
311 goto err_out_disable;
312 }
313
314 mem = ioremap(phymem, pci_resource_len(pdev, 0));
315 if (mem == NULL) {
316 printk(KERN_ERR "prism2: Cannot remap PCI memory region\n") ;
317 goto fail;
318 }
319
320 dev = prism2_init_local_data(&prism2_pci_funcs, cards_found,
321 &pdev->dev);
322 if (dev == NULL)
323 goto fail;
324 iface = netdev_priv(dev);
325 local = iface->local;
326 local->hw_priv = hw_priv;
327 cards_found++;
328
329 dev->irq = pdev->irq;
330 hw_priv->mem_start = mem;
331
332 prism2_pci_cor_sreset(local);
333
334 pci_set_drvdata(pdev, dev);
335
336 if (request_irq(dev->irq, prism2_interrupt, SA_SHIRQ, dev->name,
337 dev)) {
338 printk(KERN_WARNING "%s: request_irq failed\n", dev->name);
339 goto fail;
340 } else
341 irq_registered = 1;
342
343 if (!local->pri_only && prism2_hw_config(dev, 1)) {
344 printk(KERN_DEBUG "%s: hardware initialization failed\n",
345 dev_info);
346 goto fail;
347 }
348
349 printk(KERN_INFO "%s: Intersil Prism2.5 PCI: "
350 "mem=0x%lx, irq=%d\n", dev->name, phymem, dev->irq);
351
352 return hostap_hw_ready(dev);
353
354 fail:
355 kfree(hw_priv);
356
357 if (irq_registered && dev)
358 free_irq(dev->irq, dev);
359
360 if (mem)
361 iounmap(mem);
362
363 release_mem_region(phymem, pci_resource_len(pdev, 0));
364
365 err_out_disable:
366 pci_disable_device(pdev);
367 kfree(hw_priv);
368 if (local)
369 local->hw_priv = NULL;
370 prism2_free_local_data(dev);
371
372 return -ENODEV;
373}
374
375
376static void prism2_pci_remove(struct pci_dev *pdev)
377{
378 struct net_device *dev;
379 struct hostap_interface *iface;
380 void __iomem *mem_start;
381 struct hostap_pci_priv *hw_priv;
382
383 dev = pci_get_drvdata(pdev);
384 iface = netdev_priv(dev);
385 hw_priv = iface->local->hw_priv;
386
387 /* Reset the hardware, and ensure interrupts are disabled. */
388 prism2_pci_cor_sreset(iface->local);
389 hfa384x_disable_interrupts(dev);
390
391 if (dev->irq)
392 free_irq(dev->irq, dev);
393
394 mem_start = hw_priv->mem_start;
395 kfree(hw_priv);
396 iface->local->hw_priv = NULL;
397 prism2_free_local_data(dev);
398
399 iounmap(mem_start);
400
401 release_mem_region(pci_resource_start(pdev, 0),
402 pci_resource_len(pdev, 0));
403 pci_disable_device(pdev);
404}
405
406
407#ifdef CONFIG_PM
408static int prism2_pci_suspend(struct pci_dev *pdev, pm_message_t state)
409{
410 struct net_device *dev = pci_get_drvdata(pdev);
411
412 if (netif_running(dev)) {
413 netif_stop_queue(dev);
414 netif_device_detach(dev);
415 }
416 prism2_suspend(dev);
417 pci_save_state(pdev);
418 pci_disable_device(pdev);
419 pci_set_power_state(pdev, PCI_D3hot);
420
421 return 0;
422}
423
424static int prism2_pci_resume(struct pci_dev *pdev)
425{
426 struct net_device *dev = pci_get_drvdata(pdev);
427
428 pci_enable_device(pdev);
429 pci_restore_state(pdev);
430 prism2_hw_config(dev, 0);
431 if (netif_running(dev)) {
432 netif_device_attach(dev);
433 netif_start_queue(dev);
434 }
435
436 return 0;
437}
438#endif /* CONFIG_PM */
439
440
441MODULE_DEVICE_TABLE(pci, prism2_pci_id_table);
442
443static struct pci_driver prism2_pci_drv_id = {
444 .name = "prism2_pci",
445 .id_table = prism2_pci_id_table,
446 .probe = prism2_pci_probe,
447 .remove = prism2_pci_remove,
448#ifdef CONFIG_PM
449 .suspend = prism2_pci_suspend,
450 .resume = prism2_pci_resume,
451#endif /* CONFIG_PM */
452 /* Linux 2.4.6 added save_state and enable_wake that are not used here
453 */
454};
455
456
457static int __init init_prism2_pci(void)
458{
459 printk(KERN_INFO "%s: %s\n", dev_info, version);
460
461 return pci_register_driver(&prism2_pci_drv_id);
462}
463
464
465static void __exit exit_prism2_pci(void)
466{
467 pci_unregister_driver(&prism2_pci_drv_id);
468 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
469}
470
471
472module_init(init_prism2_pci);
473module_exit(exit_prism2_pci);
diff --git a/drivers/net/wireless/hostap/hostap_plx.c b/drivers/net/wireless/hostap/hostap_plx.c
new file mode 100644
index 000000000000..474ef83d813e
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_plx.c
@@ -0,0 +1,645 @@
1#define PRISM2_PLX
2
3/* Host AP driver's support for PC Cards on PCI adapters using PLX9052 is
4 * based on:
5 * - Host AP driver patch from james@madingley.org
6 * - linux-wlan-ng driver, Copyright (C) AbsoluteValue Systems, Inc.
7 */
8
9
10#include <linux/config.h>
11#include <linux/version.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/if.h>
15#include <linux/skbuff.h>
16#include <linux/netdevice.h>
17#include <linux/workqueue.h>
18#include <linux/wireless.h>
19#include <net/iw_handler.h>
20
21#include <linux/ioport.h>
22#include <linux/pci.h>
23#include <asm/io.h>
24
25#include "hostap_wlan.h"
26
27
28static char *version = PRISM2_VERSION " (Jouni Malinen <jkmaline@cc.hut.fi>)";
29static char *dev_info = "hostap_plx";
30
31
32MODULE_AUTHOR("Jouni Malinen");
33MODULE_DESCRIPTION("Support for Intersil Prism2-based 802.11 wireless LAN "
34 "cards (PLX).");
35MODULE_SUPPORTED_DEVICE("Intersil Prism2-based WLAN cards (PLX)");
36MODULE_LICENSE("GPL");
37MODULE_VERSION(PRISM2_VERSION);
38
39
40static int ignore_cis;
41module_param(ignore_cis, int, 0444);
42MODULE_PARM_DESC(ignore_cis, "Do not verify manfid information in CIS");
43
44
45/* struct local_info::hw_priv */
46struct hostap_plx_priv {
47 void __iomem *attr_mem;
48 unsigned int cor_offset;
49};
50
51
52#define PLX_MIN_ATTR_LEN 512 /* at least 2 x 256 is needed for CIS */
53#define COR_SRESET 0x80
54#define COR_LEVLREQ 0x40
55#define COR_ENABLE_FUNC 0x01
56/* PCI Configuration Registers */
57#define PLX_PCIIPR 0x3d /* PCI Interrupt Pin */
58/* Local Configuration Registers */
59#define PLX_INTCSR 0x4c /* Interrupt Control/Status Register */
60#define PLX_INTCSR_PCI_INTEN BIT(6) /* PCI Interrupt Enable */
61#define PLX_CNTRL 0x50
62#define PLX_CNTRL_SERIAL_EEPROM_PRESENT BIT(28)
63
64
65#define PLXDEV(vendor,dev,str) { vendor, dev, PCI_ANY_ID, PCI_ANY_ID }
66
67static struct pci_device_id prism2_plx_id_table[] __devinitdata = {
68 PLXDEV(0x10b7, 0x7770, "3Com AirConnect PCI 777A"),
69 PLXDEV(0x111a, 0x1023, "Siemens SpeedStream SS1023"),
70 PLXDEV(0x126c, 0x8030, "Nortel emobility"),
71 PLXDEV(0x1385, 0x4100, "Netgear MA301"),
72 PLXDEV(0x15e8, 0x0130, "National Datacomm NCP130 (PLX9052)"),
73 PLXDEV(0x15e8, 0x0131, "National Datacomm NCP130 (TMD7160)"),
74 PLXDEV(0x1638, 0x1100, "Eumitcom WL11000"),
75 PLXDEV(0x16ab, 0x1101, "Global Sun Tech GL24110P (?)"),
76 PLXDEV(0x16ab, 0x1102, "Linksys WPC11 with WDT11"),
77 PLXDEV(0x16ab, 0x1103, "Longshine 8031"),
78 PLXDEV(0x16ec, 0x3685, "US Robotics USR2415"),
79 PLXDEV(0xec80, 0xec00, "Belkin F5D6000"),
80 { 0 }
81};
82
83
84/* Array of known Prism2/2.5 PC Card manufactured ids. If your card's manfid
85 * is not listed here, you will need to add it here to get the driver
86 * initialized. */
87static struct prism2_plx_manfid {
88 u16 manfid1, manfid2;
89} prism2_plx_known_manfids[] = {
90 { 0x000b, 0x7110 } /* D-Link DWL-650 Rev. P1 */,
91 { 0x000b, 0x7300 } /* Philips 802.11b WLAN PCMCIA */,
92 { 0x0101, 0x0777 } /* 3Com AirConnect PCI 777A */,
93 { 0x0126, 0x8000 } /* Proxim RangeLAN */,
94 { 0x0138, 0x0002 } /* Compaq WL100 */,
95 { 0x0156, 0x0002 } /* Intersil Prism II Ref. Design (and others) */,
96 { 0x026f, 0x030b } /* Buffalo WLI-CF-S11G */,
97 { 0x0274, 0x1612 } /* Linksys WPC11 Ver 2.5 */,
98 { 0x0274, 0x1613 } /* Linksys WPC11 Ver 3 */,
99 { 0x028a, 0x0002 } /* D-Link DRC-650 */,
100 { 0x0250, 0x0002 } /* Samsung SWL2000-N */,
101 { 0xc250, 0x0002 } /* EMTAC A2424i */,
102 { 0xd601, 0x0002 } /* Z-Com XI300 */,
103 { 0xd601, 0x0005 } /* Zcomax XI-325H 200mW */,
104 { 0, 0}
105};
106
107
108#ifdef PRISM2_IO_DEBUG
109
110static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v)
111{
112 struct hostap_interface *iface;
113 local_info_t *local;
114 unsigned long flags;
115
116 iface = netdev_priv(dev);
117 local = iface->local;
118
119 spin_lock_irqsave(&local->lock, flags);
120 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v);
121 outb(v, dev->base_addr + a);
122 spin_unlock_irqrestore(&local->lock, flags);
123}
124
125static inline u8 hfa384x_inb_debug(struct net_device *dev, int a)
126{
127 struct hostap_interface *iface;
128 local_info_t *local;
129 unsigned long flags;
130 u8 v;
131
132 iface = netdev_priv(dev);
133 local = iface->local;
134
135 spin_lock_irqsave(&local->lock, flags);
136 v = inb(dev->base_addr + a);
137 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v);
138 spin_unlock_irqrestore(&local->lock, flags);
139 return v;
140}
141
142static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v)
143{
144 struct hostap_interface *iface;
145 local_info_t *local;
146 unsigned long flags;
147
148 iface = netdev_priv(dev);
149 local = iface->local;
150
151 spin_lock_irqsave(&local->lock, flags);
152 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v);
153 outw(v, dev->base_addr + a);
154 spin_unlock_irqrestore(&local->lock, flags);
155}
156
157static inline u16 hfa384x_inw_debug(struct net_device *dev, int a)
158{
159 struct hostap_interface *iface;
160 local_info_t *local;
161 unsigned long flags;
162 u16 v;
163
164 iface = netdev_priv(dev);
165 local = iface->local;
166
167 spin_lock_irqsave(&local->lock, flags);
168 v = inw(dev->base_addr + a);
169 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v);
170 spin_unlock_irqrestore(&local->lock, flags);
171 return v;
172}
173
174static inline void hfa384x_outsw_debug(struct net_device *dev, int a,
175 u8 *buf, int wc)
176{
177 struct hostap_interface *iface;
178 local_info_t *local;
179 unsigned long flags;
180
181 iface = netdev_priv(dev);
182 local = iface->local;
183
184 spin_lock_irqsave(&local->lock, flags);
185 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTSW, a, wc);
186 outsw(dev->base_addr + a, buf, wc);
187 spin_unlock_irqrestore(&local->lock, flags);
188}
189
190static inline void hfa384x_insw_debug(struct net_device *dev, int a,
191 u8 *buf, int wc)
192{
193 struct hostap_interface *iface;
194 local_info_t *local;
195 unsigned long flags;
196
197 iface = netdev_priv(dev);
198 local = iface->local;
199
200 spin_lock_irqsave(&local->lock, flags);
201 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INSW, a, wc);
202 insw(dev->base_addr + a, buf, wc);
203 spin_unlock_irqrestore(&local->lock, flags);
204}
205
206#define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v))
207#define HFA384X_INB(a) hfa384x_inb_debug(dev, (a))
208#define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v))
209#define HFA384X_INW(a) hfa384x_inw_debug(dev, (a))
210#define HFA384X_OUTSW(a, buf, wc) hfa384x_outsw_debug(dev, (a), (buf), (wc))
211#define HFA384X_INSW(a, buf, wc) hfa384x_insw_debug(dev, (a), (buf), (wc))
212
213#else /* PRISM2_IO_DEBUG */
214
215#define HFA384X_OUTB(v,a) outb((v), dev->base_addr + (a))
216#define HFA384X_INB(a) inb(dev->base_addr + (a))
217#define HFA384X_OUTW(v,a) outw((v), dev->base_addr + (a))
218#define HFA384X_INW(a) inw(dev->base_addr + (a))
219#define HFA384X_INSW(a, buf, wc) insw(dev->base_addr + (a), buf, wc)
220#define HFA384X_OUTSW(a, buf, wc) outsw(dev->base_addr + (a), buf, wc)
221
222#endif /* PRISM2_IO_DEBUG */
223
224
225static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf,
226 int len)
227{
228 u16 d_off;
229 u16 *pos;
230
231 d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
232 pos = (u16 *) buf;
233
234 if (len / 2)
235 HFA384X_INSW(d_off, buf, len / 2);
236 pos += len / 2;
237
238 if (len & 1)
239 *((char *) pos) = HFA384X_INB(d_off);
240
241 return 0;
242}
243
244
245static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len)
246{
247 u16 d_off;
248 u16 *pos;
249
250 d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
251 pos = (u16 *) buf;
252
253 if (len / 2)
254 HFA384X_OUTSW(d_off, buf, len / 2);
255 pos += len / 2;
256
257 if (len & 1)
258 HFA384X_OUTB(*((char *) pos), d_off);
259
260 return 0;
261}
262
263
264/* FIX: This might change at some point.. */
265#include "hostap_hw.c"
266
267
268static void prism2_plx_cor_sreset(local_info_t *local)
269{
270 unsigned char corsave;
271 struct hostap_plx_priv *hw_priv = local->hw_priv;
272
273 printk(KERN_DEBUG "%s: Doing reset via direct COR access.\n",
274 dev_info);
275
276 /* Set sreset bit of COR and clear it after hold time */
277
278 if (hw_priv->attr_mem == NULL) {
279 /* TMD7160 - COR at card's first I/O addr */
280 corsave = inb(hw_priv->cor_offset);
281 outb(corsave | COR_SRESET, hw_priv->cor_offset);
282 mdelay(2);
283 outb(corsave & ~COR_SRESET, hw_priv->cor_offset);
284 mdelay(2);
285 } else {
286 /* PLX9052 */
287 corsave = readb(hw_priv->attr_mem + hw_priv->cor_offset);
288 writeb(corsave | COR_SRESET,
289 hw_priv->attr_mem + hw_priv->cor_offset);
290 mdelay(2);
291 writeb(corsave & ~COR_SRESET,
292 hw_priv->attr_mem + hw_priv->cor_offset);
293 mdelay(2);
294 }
295}
296
297
298static void prism2_plx_genesis_reset(local_info_t *local, int hcr)
299{
300 unsigned char corsave;
301 struct hostap_plx_priv *hw_priv = local->hw_priv;
302
303 if (hw_priv->attr_mem == NULL) {
304 /* TMD7160 - COR at card's first I/O addr */
305 corsave = inb(hw_priv->cor_offset);
306 outb(corsave | COR_SRESET, hw_priv->cor_offset);
307 mdelay(10);
308 outb(hcr, hw_priv->cor_offset + 2);
309 mdelay(10);
310 outb(corsave & ~COR_SRESET, hw_priv->cor_offset);
311 mdelay(10);
312 } else {
313 /* PLX9052 */
314 corsave = readb(hw_priv->attr_mem + hw_priv->cor_offset);
315 writeb(corsave | COR_SRESET,
316 hw_priv->attr_mem + hw_priv->cor_offset);
317 mdelay(10);
318 writeb(hcr, hw_priv->attr_mem + hw_priv->cor_offset + 2);
319 mdelay(10);
320 writeb(corsave & ~COR_SRESET,
321 hw_priv->attr_mem + hw_priv->cor_offset);
322 mdelay(10);
323 }
324}
325
326
327static struct prism2_helper_functions prism2_plx_funcs =
328{
329 .card_present = NULL,
330 .cor_sreset = prism2_plx_cor_sreset,
331 .dev_open = NULL,
332 .dev_close = NULL,
333 .genesis_reset = prism2_plx_genesis_reset,
334 .hw_type = HOSTAP_HW_PLX,
335};
336
337
338static int prism2_plx_check_cis(void __iomem *attr_mem, int attr_len,
339 unsigned int *cor_offset,
340 unsigned int *cor_index)
341{
342#define CISTPL_CONFIG 0x1A
343#define CISTPL_MANFID 0x20
344#define CISTPL_END 0xFF
345#define CIS_MAX_LEN 256
346 u8 *cis;
347 int i, pos;
348 unsigned int rmsz, rasz, manfid1, manfid2;
349 struct prism2_plx_manfid *manfid;
350
351 cis = kmalloc(CIS_MAX_LEN, GFP_KERNEL);
352 if (cis == NULL)
353 return -ENOMEM;
354
355 /* read CIS; it is in even offsets in the beginning of attr_mem */
356 for (i = 0; i < CIS_MAX_LEN; i++)
357 cis[i] = readb(attr_mem + 2 * i);
358 printk(KERN_DEBUG "%s: CIS: %02x %02x %02x %02x %02x %02x ...\n",
359 dev_info, cis[0], cis[1], cis[2], cis[3], cis[4], cis[5]);
360
361 /* set reasonable defaults for Prism2 cards just in case CIS parsing
362 * fails */
363 *cor_offset = 0x3e0;
364 *cor_index = 0x01;
365 manfid1 = manfid2 = 0;
366
367 pos = 0;
368 while (pos < CIS_MAX_LEN - 1 && cis[pos] != CISTPL_END) {
369 if (pos + cis[pos + 1] >= CIS_MAX_LEN)
370 goto cis_error;
371
372 switch (cis[pos]) {
373 case CISTPL_CONFIG:
374 if (cis[pos + 1] < 1)
375 goto cis_error;
376 rmsz = (cis[pos + 2] & 0x3c) >> 2;
377 rasz = cis[pos + 2] & 0x03;
378 if (4 + rasz + rmsz > cis[pos + 1])
379 goto cis_error;
380 *cor_index = cis[pos + 3] & 0x3F;
381 *cor_offset = 0;
382 for (i = 0; i <= rasz; i++)
383 *cor_offset += cis[pos + 4 + i] << (8 * i);
384 printk(KERN_DEBUG "%s: cor_index=0x%x "
385 "cor_offset=0x%x\n", dev_info,
386 *cor_index, *cor_offset);
387 if (*cor_offset > attr_len) {
388 printk(KERN_ERR "%s: COR offset not within "
389 "attr_mem\n", dev_info);
390 kfree(cis);
391 return -1;
392 }
393 break;
394
395 case CISTPL_MANFID:
396 if (cis[pos + 1] < 4)
397 goto cis_error;
398 manfid1 = cis[pos + 2] + (cis[pos + 3] << 8);
399 manfid2 = cis[pos + 4] + (cis[pos + 5] << 8);
400 printk(KERN_DEBUG "%s: manfid=0x%04x, 0x%04x\n",
401 dev_info, manfid1, manfid2);
402 break;
403 }
404
405 pos += cis[pos + 1] + 2;
406 }
407
408 if (pos >= CIS_MAX_LEN || cis[pos] != CISTPL_END)
409 goto cis_error;
410
411 for (manfid = prism2_plx_known_manfids; manfid->manfid1 != 0; manfid++)
412 if (manfid1 == manfid->manfid1 && manfid2 == manfid->manfid2) {
413 kfree(cis);
414 return 0;
415 }
416
417 printk(KERN_INFO "%s: unknown manfid 0x%04x, 0x%04x - assuming this is"
418 " not supported card\n", dev_info, manfid1, manfid2);
419 goto fail;
420
421 cis_error:
422 printk(KERN_WARNING "%s: invalid CIS data\n", dev_info);
423
424 fail:
425 kfree(cis);
426 if (ignore_cis) {
427 printk(KERN_INFO "%s: ignore_cis parameter set - ignoring "
428 "errors during CIS verification\n", dev_info);
429 return 0;
430 }
431 return -1;
432}
433
434
435static int prism2_plx_probe(struct pci_dev *pdev,
436 const struct pci_device_id *id)
437{
438 unsigned int pccard_ioaddr, plx_ioaddr;
439 unsigned long pccard_attr_mem;
440 unsigned int pccard_attr_len;
441 void __iomem *attr_mem = NULL;
442 unsigned int cor_offset, cor_index;
443 u32 reg;
444 local_info_t *local = NULL;
445 struct net_device *dev = NULL;
446 struct hostap_interface *iface;
447 static int cards_found /* = 0 */;
448 int irq_registered = 0;
449 int tmd7160;
450 struct hostap_plx_priv *hw_priv;
451
452 hw_priv = kmalloc(sizeof(*hw_priv), GFP_KERNEL);
453 if (hw_priv == NULL)
454 return -ENOMEM;
455 memset(hw_priv, 0, sizeof(*hw_priv));
456
457 if (pci_enable_device(pdev))
458 return -EIO;
459
460 /* National Datacomm NCP130 based on TMD7160, not PLX9052. */
461 tmd7160 = (pdev->vendor == 0x15e8) && (pdev->device == 0x0131);
462
463 plx_ioaddr = pci_resource_start(pdev, 1);
464 pccard_ioaddr = pci_resource_start(pdev, tmd7160 ? 2 : 3);
465
466 if (tmd7160) {
467 /* TMD7160 */
468 attr_mem = NULL; /* no access to PC Card attribute memory */
469
470 printk(KERN_INFO "TMD7160 PCI/PCMCIA adapter: io=0x%x, "
471 "irq=%d, pccard_io=0x%x\n",
472 plx_ioaddr, pdev->irq, pccard_ioaddr);
473
474 cor_offset = plx_ioaddr;
475 cor_index = 0x04;
476
477 outb(cor_index | COR_LEVLREQ | COR_ENABLE_FUNC, plx_ioaddr);
478 mdelay(1);
479 reg = inb(plx_ioaddr);
480 if (reg != (cor_index | COR_LEVLREQ | COR_ENABLE_FUNC)) {
481 printk(KERN_ERR "%s: Error setting COR (expected="
482 "0x%02x, was=0x%02x)\n", dev_info,
483 cor_index | COR_LEVLREQ | COR_ENABLE_FUNC, reg);
484 goto fail;
485 }
486 } else {
487 /* PLX9052 */
488 pccard_attr_mem = pci_resource_start(pdev, 2);
489 pccard_attr_len = pci_resource_len(pdev, 2);
490 if (pccard_attr_len < PLX_MIN_ATTR_LEN)
491 goto fail;
492
493
494 attr_mem = ioremap(pccard_attr_mem, pccard_attr_len);
495 if (attr_mem == NULL) {
496 printk(KERN_ERR "%s: cannot remap attr_mem\n",
497 dev_info);
498 goto fail;
499 }
500
501 printk(KERN_INFO "PLX9052 PCI/PCMCIA adapter: "
502 "mem=0x%lx, plx_io=0x%x, irq=%d, pccard_io=0x%x\n",
503 pccard_attr_mem, plx_ioaddr, pdev->irq, pccard_ioaddr);
504
505 if (prism2_plx_check_cis(attr_mem, pccard_attr_len,
506 &cor_offset, &cor_index)) {
507 printk(KERN_INFO "Unknown PC Card CIS - not a "
508 "Prism2/2.5 card?\n");
509 goto fail;
510 }
511
512 printk(KERN_DEBUG "Prism2/2.5 PC Card detected in PLX9052 "
513 "adapter\n");
514
515 /* Write COR to enable PC Card */
516 writeb(cor_index | COR_LEVLREQ | COR_ENABLE_FUNC,
517 attr_mem + cor_offset);
518
519 /* Enable PCI interrupts if they are not already enabled */
520 reg = inl(plx_ioaddr + PLX_INTCSR);
521 printk(KERN_DEBUG "PLX_INTCSR=0x%x\n", reg);
522 if (!(reg & PLX_INTCSR_PCI_INTEN)) {
523 outl(reg | PLX_INTCSR_PCI_INTEN,
524 plx_ioaddr + PLX_INTCSR);
525 if (!(inl(plx_ioaddr + PLX_INTCSR) &
526 PLX_INTCSR_PCI_INTEN)) {
527 printk(KERN_WARNING "%s: Could not enable "
528 "Local Interrupts\n", dev_info);
529 goto fail;
530 }
531 }
532
533 reg = inl(plx_ioaddr + PLX_CNTRL);
534 printk(KERN_DEBUG "PLX_CNTRL=0x%x (Serial EEPROM "
535 "present=%d)\n",
536 reg, (reg & PLX_CNTRL_SERIAL_EEPROM_PRESENT) != 0);
537 /* should set PLX_PCIIPR to 0x01 (INTA#) if Serial EEPROM is
538 * not present; but are there really such cards in use(?) */
539 }
540
541 dev = prism2_init_local_data(&prism2_plx_funcs, cards_found,
542 &pdev->dev);
543 if (dev == NULL)
544 goto fail;
545 iface = netdev_priv(dev);
546 local = iface->local;
547 local->hw_priv = hw_priv;
548 cards_found++;
549
550 dev->irq = pdev->irq;
551 dev->base_addr = pccard_ioaddr;
552 hw_priv->attr_mem = attr_mem;
553 hw_priv->cor_offset = cor_offset;
554
555 pci_set_drvdata(pdev, dev);
556
557 if (request_irq(dev->irq, prism2_interrupt, SA_SHIRQ, dev->name,
558 dev)) {
559 printk(KERN_WARNING "%s: request_irq failed\n", dev->name);
560 goto fail;
561 } else
562 irq_registered = 1;
563
564 if (prism2_hw_config(dev, 1)) {
565 printk(KERN_DEBUG "%s: hardware initialization failed\n",
566 dev_info);
567 goto fail;
568 }
569
570 return hostap_hw_ready(dev);
571
572 fail:
573 kfree(hw_priv);
574 if (local)
575 local->hw_priv = NULL;
576 prism2_free_local_data(dev);
577
578 if (irq_registered && dev)
579 free_irq(dev->irq, dev);
580
581 if (attr_mem)
582 iounmap(attr_mem);
583
584 pci_disable_device(pdev);
585
586 return -ENODEV;
587}
588
589
590static void prism2_plx_remove(struct pci_dev *pdev)
591{
592 struct net_device *dev;
593 struct hostap_interface *iface;
594 struct hostap_plx_priv *hw_priv;
595
596 dev = pci_get_drvdata(pdev);
597 iface = netdev_priv(dev);
598 hw_priv = iface->local->hw_priv;
599
600 /* Reset the hardware, and ensure interrupts are disabled. */
601 prism2_plx_cor_sreset(iface->local);
602 hfa384x_disable_interrupts(dev);
603
604 if (hw_priv->attr_mem)
605 iounmap(hw_priv->attr_mem);
606 if (dev->irq)
607 free_irq(dev->irq, dev);
608
609 kfree(iface->local->hw_priv);
610 iface->local->hw_priv = NULL;
611 prism2_free_local_data(dev);
612 pci_disable_device(pdev);
613}
614
615
616MODULE_DEVICE_TABLE(pci, prism2_plx_id_table);
617
618static struct pci_driver prism2_plx_drv_id = {
619 .name = "prism2_plx",
620 .id_table = prism2_plx_id_table,
621 .probe = prism2_plx_probe,
622 .remove = prism2_plx_remove,
623 .suspend = NULL,
624 .resume = NULL,
625 .enable_wake = NULL
626};
627
628
629static int __init init_prism2_plx(void)
630{
631 printk(KERN_INFO "%s: %s\n", dev_info, version);
632
633 return pci_register_driver(&prism2_plx_drv_id);
634}
635
636
637static void __exit exit_prism2_plx(void)
638{
639 pci_unregister_driver(&prism2_plx_drv_id);
640 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
641}
642
643
644module_init(init_prism2_plx);
645module_exit(exit_prism2_plx);
diff --git a/drivers/net/wireless/hostap/hostap_proc.c b/drivers/net/wireless/hostap/hostap_proc.c
new file mode 100644
index 000000000000..a0a4cbd4937a
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_proc.c
@@ -0,0 +1,448 @@
1/* /proc routines for Host AP driver */
2
3#define PROC_LIMIT (PAGE_SIZE - 80)
4
5
6#ifndef PRISM2_NO_PROCFS_DEBUG
7static int prism2_debug_proc_read(char *page, char **start, off_t off,
8 int count, int *eof, void *data)
9{
10 char *p = page;
11 local_info_t *local = (local_info_t *) data;
12 int i;
13
14 if (off != 0) {
15 *eof = 1;
16 return 0;
17 }
18
19 p += sprintf(p, "next_txfid=%d next_alloc=%d\n",
20 local->next_txfid, local->next_alloc);
21 for (i = 0; i < PRISM2_TXFID_COUNT; i++)
22 p += sprintf(p, "FID: tx=%04X intransmit=%04X\n",
23 local->txfid[i], local->intransmitfid[i]);
24 p += sprintf(p, "FW TX rate control: %d\n", local->fw_tx_rate_control);
25 p += sprintf(p, "beacon_int=%d\n", local->beacon_int);
26 p += sprintf(p, "dtim_period=%d\n", local->dtim_period);
27 p += sprintf(p, "wds_max_connections=%d\n",
28 local->wds_max_connections);
29 p += sprintf(p, "dev_enabled=%d\n", local->dev_enabled);
30 p += sprintf(p, "sw_tick_stuck=%d\n", local->sw_tick_stuck);
31 for (i = 0; i < WEP_KEYS; i++) {
32 if (local->crypt[i] && local->crypt[i]->ops) {
33 p += sprintf(p, "crypt[%d]=%s\n",
34 i, local->crypt[i]->ops->name);
35 }
36 }
37 p += sprintf(p, "pri_only=%d\n", local->pri_only);
38 p += sprintf(p, "pci=%d\n", local->func->hw_type == HOSTAP_HW_PCI);
39 p += sprintf(p, "sram_type=%d\n", local->sram_type);
40 p += sprintf(p, "no_pri=%d\n", local->no_pri);
41
42 return (p - page);
43}
44#endif /* PRISM2_NO_PROCFS_DEBUG */
45
46
47static int prism2_stats_proc_read(char *page, char **start, off_t off,
48 int count, int *eof, void *data)
49{
50 char *p = page;
51 local_info_t *local = (local_info_t *) data;
52 struct comm_tallies_sums *sums = (struct comm_tallies_sums *)
53 &local->comm_tallies;
54
55 if (off != 0) {
56 *eof = 1;
57 return 0;
58 }
59
60 p += sprintf(p, "TxUnicastFrames=%u\n", sums->tx_unicast_frames);
61 p += sprintf(p, "TxMulticastframes=%u\n", sums->tx_multicast_frames);
62 p += sprintf(p, "TxFragments=%u\n", sums->tx_fragments);
63 p += sprintf(p, "TxUnicastOctets=%u\n", sums->tx_unicast_octets);
64 p += sprintf(p, "TxMulticastOctets=%u\n", sums->tx_multicast_octets);
65 p += sprintf(p, "TxDeferredTransmissions=%u\n",
66 sums->tx_deferred_transmissions);
67 p += sprintf(p, "TxSingleRetryFrames=%u\n",
68 sums->tx_single_retry_frames);
69 p += sprintf(p, "TxMultipleRetryFrames=%u\n",
70 sums->tx_multiple_retry_frames);
71 p += sprintf(p, "TxRetryLimitExceeded=%u\n",
72 sums->tx_retry_limit_exceeded);
73 p += sprintf(p, "TxDiscards=%u\n", sums->tx_discards);
74 p += sprintf(p, "RxUnicastFrames=%u\n", sums->rx_unicast_frames);
75 p += sprintf(p, "RxMulticastFrames=%u\n", sums->rx_multicast_frames);
76 p += sprintf(p, "RxFragments=%u\n", sums->rx_fragments);
77 p += sprintf(p, "RxUnicastOctets=%u\n", sums->rx_unicast_octets);
78 p += sprintf(p, "RxMulticastOctets=%u\n", sums->rx_multicast_octets);
79 p += sprintf(p, "RxFCSErrors=%u\n", sums->rx_fcs_errors);
80 p += sprintf(p, "RxDiscardsNoBuffer=%u\n",
81 sums->rx_discards_no_buffer);
82 p += sprintf(p, "TxDiscardsWrongSA=%u\n", sums->tx_discards_wrong_sa);
83 p += sprintf(p, "RxDiscardsWEPUndecryptable=%u\n",
84 sums->rx_discards_wep_undecryptable);
85 p += sprintf(p, "RxMessageInMsgFragments=%u\n",
86 sums->rx_message_in_msg_fragments);
87 p += sprintf(p, "RxMessageInBadMsgFragments=%u\n",
88 sums->rx_message_in_bad_msg_fragments);
89 /* FIX: this may grow too long for one page(?) */
90
91 return (p - page);
92}
93
94
95static int prism2_wds_proc_read(char *page, char **start, off_t off,
96 int count, int *eof, void *data)
97{
98 char *p = page;
99 local_info_t *local = (local_info_t *) data;
100 struct list_head *ptr;
101 struct hostap_interface *iface;
102
103 if (off > PROC_LIMIT) {
104 *eof = 1;
105 return 0;
106 }
107
108 read_lock_bh(&local->iface_lock);
109 list_for_each(ptr, &local->hostap_interfaces) {
110 iface = list_entry(ptr, struct hostap_interface, list);
111 if (iface->type != HOSTAP_INTERFACE_WDS)
112 continue;
113 p += sprintf(p, "%s\t" MACSTR "\n",
114 iface->dev->name,
115 MAC2STR(iface->u.wds.remote_addr));
116 if ((p - page) > PROC_LIMIT) {
117 printk(KERN_DEBUG "%s: wds proc did not fit\n",
118 local->dev->name);
119 break;
120 }
121 }
122 read_unlock_bh(&local->iface_lock);
123
124 if ((p - page) <= off) {
125 *eof = 1;
126 return 0;
127 }
128
129 *start = page + off;
130
131 return (p - page - off);
132}
133
134
135static int prism2_bss_list_proc_read(char *page, char **start, off_t off,
136 int count, int *eof, void *data)
137{
138 char *p = page;
139 local_info_t *local = (local_info_t *) data;
140 struct list_head *ptr;
141 struct hostap_bss_info *bss;
142 int i;
143
144 if (off > PROC_LIMIT) {
145 *eof = 1;
146 return 0;
147 }
148
149 p += sprintf(p, "#BSSID\tlast_update\tcount\tcapab_info\tSSID(txt)\t"
150 "SSID(hex)\tWPA IE\n");
151 spin_lock_bh(&local->lock);
152 list_for_each(ptr, &local->bss_list) {
153 bss = list_entry(ptr, struct hostap_bss_info, list);
154 p += sprintf(p, MACSTR "\t%lu\t%u\t0x%x\t",
155 MAC2STR(bss->bssid), bss->last_update,
156 bss->count, bss->capab_info);
157 for (i = 0; i < bss->ssid_len; i++) {
158 p += sprintf(p, "%c",
159 bss->ssid[i] >= 32 && bss->ssid[i] < 127 ?
160 bss->ssid[i] : '_');
161 }
162 p += sprintf(p, "\t");
163 for (i = 0; i < bss->ssid_len; i++) {
164 p += sprintf(p, "%02x", bss->ssid[i]);
165 }
166 p += sprintf(p, "\t");
167 for (i = 0; i < bss->wpa_ie_len; i++) {
168 p += sprintf(p, "%02x", bss->wpa_ie[i]);
169 }
170 p += sprintf(p, "\n");
171 if ((p - page) > PROC_LIMIT) {
172 printk(KERN_DEBUG "%s: BSS proc did not fit\n",
173 local->dev->name);
174 break;
175 }
176 }
177 spin_unlock_bh(&local->lock);
178
179 if ((p - page) <= off) {
180 *eof = 1;
181 return 0;
182 }
183
184 *start = page + off;
185
186 return (p - page - off);
187}
188
189
190static int prism2_crypt_proc_read(char *page, char **start, off_t off,
191 int count, int *eof, void *data)
192{
193 char *p = page;
194 local_info_t *local = (local_info_t *) data;
195 int i;
196
197 if (off > PROC_LIMIT) {
198 *eof = 1;
199 return 0;
200 }
201
202 p += sprintf(p, "tx_keyidx=%d\n", local->tx_keyidx);
203 for (i = 0; i < WEP_KEYS; i++) {
204 if (local->crypt[i] && local->crypt[i]->ops &&
205 local->crypt[i]->ops->print_stats) {
206 p = local->crypt[i]->ops->print_stats(
207 p, local->crypt[i]->priv);
208 }
209 }
210
211 if ((p - page) <= off) {
212 *eof = 1;
213 return 0;
214 }
215
216 *start = page + off;
217
218 return (p - page - off);
219}
220
221
222static int prism2_pda_proc_read(char *page, char **start, off_t off,
223 int count, int *eof, void *data)
224{
225 local_info_t *local = (local_info_t *) data;
226
227 if (local->pda == NULL || off >= PRISM2_PDA_SIZE) {
228 *eof = 1;
229 return 0;
230 }
231
232 if (off + count > PRISM2_PDA_SIZE)
233 count = PRISM2_PDA_SIZE - off;
234
235 memcpy(page, local->pda + off, count);
236 return count;
237}
238
239
240static int prism2_aux_dump_proc_read(char *page, char **start, off_t off,
241 int count, int *eof, void *data)
242{
243 local_info_t *local = (local_info_t *) data;
244
245 if (local->func->read_aux == NULL) {
246 *eof = 1;
247 return 0;
248 }
249
250 if (local->func->read_aux(local->dev, off, count, page)) {
251 *eof = 1;
252 return 0;
253 }
254 *start = page;
255
256 return count;
257}
258
259
260#ifdef PRISM2_IO_DEBUG
261static int prism2_io_debug_proc_read(char *page, char **start, off_t off,
262 int count, int *eof, void *data)
263{
264 local_info_t *local = (local_info_t *) data;
265 int head = local->io_debug_head;
266 int start_bytes, left, copy, copied;
267
268 if (off + count > PRISM2_IO_DEBUG_SIZE * 4) {
269 *eof = 1;
270 if (off >= PRISM2_IO_DEBUG_SIZE * 4)
271 return 0;
272 count = PRISM2_IO_DEBUG_SIZE * 4 - off;
273 }
274
275 copied = 0;
276 start_bytes = (PRISM2_IO_DEBUG_SIZE - head) * 4;
277 left = count;
278
279 if (off < start_bytes) {
280 copy = start_bytes - off;
281 if (copy > count)
282 copy = count;
283 memcpy(page, ((u8 *) &local->io_debug[head]) + off, copy);
284 left -= copy;
285 if (left > 0)
286 memcpy(&page[copy], local->io_debug, left);
287 } else {
288 memcpy(page, ((u8 *) local->io_debug) + (off - start_bytes),
289 left);
290 }
291
292 *start = page;
293
294 return count;
295}
296#endif /* PRISM2_IO_DEBUG */
297
298
299#ifndef PRISM2_NO_STATION_MODES
300static int prism2_scan_results_proc_read(char *page, char **start, off_t off,
301 int count, int *eof, void *data)
302{
303 char *p = page;
304 local_info_t *local = (local_info_t *) data;
305 int entry, i, len, total = 0;
306 struct hfa384x_hostscan_result *scanres;
307 u8 *pos;
308
309 p += sprintf(p, "CHID ANL SL BcnInt Capab Rate BSSID ATIM SupRates "
310 "SSID\n");
311
312 spin_lock_bh(&local->lock);
313 for (entry = 0; entry < local->last_scan_results_count; entry++) {
314 scanres = &local->last_scan_results[entry];
315
316 if (total + (p - page) <= off) {
317 total += p - page;
318 p = page;
319 }
320 if (total + (p - page) > off + count)
321 break;
322 if ((p - page) > (PAGE_SIZE - 200))
323 break;
324
325 p += sprintf(p, "%d %d %d %d 0x%02x %d " MACSTR " %d ",
326 le16_to_cpu(scanres->chid),
327 (s16) le16_to_cpu(scanres->anl),
328 (s16) le16_to_cpu(scanres->sl),
329 le16_to_cpu(scanres->beacon_interval),
330 le16_to_cpu(scanres->capability),
331 le16_to_cpu(scanres->rate),
332 MAC2STR(scanres->bssid),
333 le16_to_cpu(scanres->atim));
334
335 pos = scanres->sup_rates;
336 for (i = 0; i < sizeof(scanres->sup_rates); i++) {
337 if (pos[i] == 0)
338 break;
339 p += sprintf(p, "<%02x>", pos[i]);
340 }
341 p += sprintf(p, " ");
342
343 pos = scanres->ssid;
344 len = le16_to_cpu(scanres->ssid_len);
345 if (len > 32)
346 len = 32;
347 for (i = 0; i < len; i++) {
348 unsigned char c = pos[i];
349 if (c >= 32 && c < 127)
350 p += sprintf(p, "%c", c);
351 else
352 p += sprintf(p, "<%02x>", c);
353 }
354 p += sprintf(p, "\n");
355 }
356 spin_unlock_bh(&local->lock);
357
358 total += (p - page);
359 if (total >= off + count)
360 *eof = 1;
361
362 if (total < off) {
363 *eof = 1;
364 return 0;
365 }
366
367 len = total - off;
368 if (len > (p - page))
369 len = p - page;
370 *start = p - len;
371 if (len > count)
372 len = count;
373
374 return len;
375}
376#endif /* PRISM2_NO_STATION_MODES */
377
378
379void hostap_init_proc(local_info_t *local)
380{
381 local->proc = NULL;
382
383 if (hostap_proc == NULL) {
384 printk(KERN_WARNING "%s: hostap proc directory not created\n",
385 local->dev->name);
386 return;
387 }
388
389 local->proc = proc_mkdir(local->ddev->name, hostap_proc);
390 if (local->proc == NULL) {
391 printk(KERN_INFO "/proc/net/hostap/%s creation failed\n",
392 local->ddev->name);
393 return;
394 }
395
396#ifndef PRISM2_NO_PROCFS_DEBUG
397 create_proc_read_entry("debug", 0, local->proc,
398 prism2_debug_proc_read, local);
399#endif /* PRISM2_NO_PROCFS_DEBUG */
400 create_proc_read_entry("stats", 0, local->proc,
401 prism2_stats_proc_read, local);
402 create_proc_read_entry("wds", 0, local->proc,
403 prism2_wds_proc_read, local);
404 create_proc_read_entry("pda", 0, local->proc,
405 prism2_pda_proc_read, local);
406 create_proc_read_entry("aux_dump", 0, local->proc,
407 prism2_aux_dump_proc_read, local);
408 create_proc_read_entry("bss_list", 0, local->proc,
409 prism2_bss_list_proc_read, local);
410 create_proc_read_entry("crypt", 0, local->proc,
411 prism2_crypt_proc_read, local);
412#ifdef PRISM2_IO_DEBUG
413 create_proc_read_entry("io_debug", 0, local->proc,
414 prism2_io_debug_proc_read, local);
415#endif /* PRISM2_IO_DEBUG */
416#ifndef PRISM2_NO_STATION_MODES
417 create_proc_read_entry("scan_results", 0, local->proc,
418 prism2_scan_results_proc_read, local);
419#endif /* PRISM2_NO_STATION_MODES */
420}
421
422
423void hostap_remove_proc(local_info_t *local)
424{
425 if (local->proc != NULL) {
426#ifndef PRISM2_NO_STATION_MODES
427 remove_proc_entry("scan_results", local->proc);
428#endif /* PRISM2_NO_STATION_MODES */
429#ifdef PRISM2_IO_DEBUG
430 remove_proc_entry("io_debug", local->proc);
431#endif /* PRISM2_IO_DEBUG */
432 remove_proc_entry("pda", local->proc);
433 remove_proc_entry("aux_dump", local->proc);
434 remove_proc_entry("wds", local->proc);
435 remove_proc_entry("stats", local->proc);
436 remove_proc_entry("bss_list", local->proc);
437 remove_proc_entry("crypt", local->proc);
438#ifndef PRISM2_NO_PROCFS_DEBUG
439 remove_proc_entry("debug", local->proc);
440#endif /* PRISM2_NO_PROCFS_DEBUG */
441 if (hostap_proc != NULL)
442 remove_proc_entry(local->proc->name, hostap_proc);
443 }
444}
445
446
447EXPORT_SYMBOL(hostap_init_proc);
448EXPORT_SYMBOL(hostap_remove_proc);
diff --git a/drivers/net/wireless/hostap/hostap_wlan.h b/drivers/net/wireless/hostap/hostap_wlan.h
new file mode 100644
index 000000000000..cc061e1560d3
--- /dev/null
+++ b/drivers/net/wireless/hostap/hostap_wlan.h
@@ -0,0 +1,1033 @@
1#ifndef HOSTAP_WLAN_H
2#define HOSTAP_WLAN_H
3
4#include "hostap_config.h"
5#include "hostap_common.h"
6
7#define MAX_PARM_DEVICES 8
8#define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES)
9#define DEF_INTS -1, -1, -1, -1, -1, -1, -1
10#define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
11
12
13/* Specific skb->protocol value that indicates that the packet already contains
14 * txdesc header.
15 * FIX: This might need own value that would be allocated especially for Prism2
16 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames".
17 * However, these skb's should have only minimal path in the kernel side since
18 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */
19#define ETH_P_HOSTAP ETH_P_CONTROL
20
21/* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header
22 * (from linux-wlan-ng) */
23struct linux_wlan_ng_val {
24 u32 did;
25 u16 status, len;
26 u32 data;
27} __attribute__ ((packed));
28
29struct linux_wlan_ng_prism_hdr {
30 u32 msgcode, msglen;
31 char devname[16];
32 struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal,
33 noise, rate, istx, frmlen;
34} __attribute__ ((packed));
35
36struct linux_wlan_ng_cap_hdr {
37 u32 version;
38 u32 length;
39 u64 mactime;
40 u64 hosttime;
41 u32 phytype;
42 u32 channel;
43 u32 datarate;
44 u32 antenna;
45 u32 priority;
46 u32 ssi_type;
47 s32 ssi_signal;
48 s32 ssi_noise;
49 u32 preamble;
50 u32 encoding;
51} __attribute__ ((packed));
52
53#define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */
54#define LWNG_CAPHDR_VERSION 0x80211001
55
56struct hfa384x_rx_frame {
57 /* HFA384X RX frame descriptor */
58 u16 status; /* HFA384X_RX_STATUS_ flags */
59 u32 time; /* timestamp, 1 microsecond resolution */
60 u8 silence; /* 27 .. 154; seems to be 0 */
61 u8 signal; /* 27 .. 154 */
62 u8 rate; /* 10, 20, 55, or 110 */
63 u8 rxflow;
64 u32 reserved;
65
66 /* 802.11 */
67 u16 frame_control;
68 u16 duration_id;
69 u8 addr1[6];
70 u8 addr2[6];
71 u8 addr3[6];
72 u16 seq_ctrl;
73 u8 addr4[6];
74 u16 data_len;
75
76 /* 802.3 */
77 u8 dst_addr[6];
78 u8 src_addr[6];
79 u16 len;
80
81 /* followed by frame data; max 2304 bytes */
82} __attribute__ ((packed));
83
84
85struct hfa384x_tx_frame {
86 /* HFA384X TX frame descriptor */
87 u16 status; /* HFA384X_TX_STATUS_ flags */
88 u16 reserved1;
89 u16 reserved2;
90 u32 sw_support;
91 u8 retry_count; /* not yet implemented */
92 u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
93 u16 tx_control; /* HFA384X_TX_CTRL_ flags */
94
95 /* 802.11 */
96 u16 frame_control; /* parts not used */
97 u16 duration_id;
98 u8 addr1[6];
99 u8 addr2[6]; /* filled by firmware */
100 u8 addr3[6];
101 u16 seq_ctrl; /* filled by firmware */
102 u8 addr4[6];
103 u16 data_len;
104
105 /* 802.3 */
106 u8 dst_addr[6];
107 u8 src_addr[6];
108 u16 len;
109
110 /* followed by frame data; max 2304 bytes */
111} __attribute__ ((packed));
112
113
114struct hfa384x_rid_hdr
115{
116 u16 len;
117 u16 rid;
118} __attribute__ ((packed));
119
120
121/* Macro for converting signal levels (range 27 .. 154) to wireless ext
122 * dBm value with some accuracy */
123#define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
124
125#define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100
126
127struct hfa384x_scan_request {
128 u16 channel_list;
129 u16 txrate; /* HFA384X_RATES_* */
130} __attribute__ ((packed));
131
132struct hfa384x_hostscan_request {
133 u16 channel_list;
134 u16 txrate;
135 u16 target_ssid_len;
136 u8 target_ssid[32];
137} __attribute__ ((packed));
138
139struct hfa384x_join_request {
140 u8 bssid[6];
141 u16 channel;
142} __attribute__ ((packed));
143
144struct hfa384x_info_frame {
145 u16 len;
146 u16 type;
147} __attribute__ ((packed));
148
149struct hfa384x_comm_tallies {
150 u16 tx_unicast_frames;
151 u16 tx_multicast_frames;
152 u16 tx_fragments;
153 u16 tx_unicast_octets;
154 u16 tx_multicast_octets;
155 u16 tx_deferred_transmissions;
156 u16 tx_single_retry_frames;
157 u16 tx_multiple_retry_frames;
158 u16 tx_retry_limit_exceeded;
159 u16 tx_discards;
160 u16 rx_unicast_frames;
161 u16 rx_multicast_frames;
162 u16 rx_fragments;
163 u16 rx_unicast_octets;
164 u16 rx_multicast_octets;
165 u16 rx_fcs_errors;
166 u16 rx_discards_no_buffer;
167 u16 tx_discards_wrong_sa;
168 u16 rx_discards_wep_undecryptable;
169 u16 rx_message_in_msg_fragments;
170 u16 rx_message_in_bad_msg_fragments;
171} __attribute__ ((packed));
172
173struct hfa384x_comm_tallies32 {
174 u32 tx_unicast_frames;
175 u32 tx_multicast_frames;
176 u32 tx_fragments;
177 u32 tx_unicast_octets;
178 u32 tx_multicast_octets;
179 u32 tx_deferred_transmissions;
180 u32 tx_single_retry_frames;
181 u32 tx_multiple_retry_frames;
182 u32 tx_retry_limit_exceeded;
183 u32 tx_discards;
184 u32 rx_unicast_frames;
185 u32 rx_multicast_frames;
186 u32 rx_fragments;
187 u32 rx_unicast_octets;
188 u32 rx_multicast_octets;
189 u32 rx_fcs_errors;
190 u32 rx_discards_no_buffer;
191 u32 tx_discards_wrong_sa;
192 u32 rx_discards_wep_undecryptable;
193 u32 rx_message_in_msg_fragments;
194 u32 rx_message_in_bad_msg_fragments;
195} __attribute__ ((packed));
196
197struct hfa384x_scan_result_hdr {
198 u16 reserved;
199 u16 scan_reason;
200#define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
201#define HFA384X_SCAN_HOST_INITIATED 1
202#define HFA384X_SCAN_FIRMWARE_INITIATED 2
203#define HFA384X_SCAN_INQUIRY_FROM_HOST 3
204} __attribute__ ((packed));
205
206#define HFA384X_SCAN_MAX_RESULTS 32
207
208struct hfa384x_scan_result {
209 u16 chid;
210 u16 anl;
211 u16 sl;
212 u8 bssid[6];
213 u16 beacon_interval;
214 u16 capability;
215 u16 ssid_len;
216 u8 ssid[32];
217 u8 sup_rates[10];
218 u16 rate;
219} __attribute__ ((packed));
220
221struct hfa384x_hostscan_result {
222 u16 chid;
223 u16 anl;
224 u16 sl;
225 u8 bssid[6];
226 u16 beacon_interval;
227 u16 capability;
228 u16 ssid_len;
229 u8 ssid[32];
230 u8 sup_rates[10];
231 u16 rate;
232 u16 atim;
233} __attribute__ ((packed));
234
235struct comm_tallies_sums {
236 unsigned int tx_unicast_frames;
237 unsigned int tx_multicast_frames;
238 unsigned int tx_fragments;
239 unsigned int tx_unicast_octets;
240 unsigned int tx_multicast_octets;
241 unsigned int tx_deferred_transmissions;
242 unsigned int tx_single_retry_frames;
243 unsigned int tx_multiple_retry_frames;
244 unsigned int tx_retry_limit_exceeded;
245 unsigned int tx_discards;
246 unsigned int rx_unicast_frames;
247 unsigned int rx_multicast_frames;
248 unsigned int rx_fragments;
249 unsigned int rx_unicast_octets;
250 unsigned int rx_multicast_octets;
251 unsigned int rx_fcs_errors;
252 unsigned int rx_discards_no_buffer;
253 unsigned int tx_discards_wrong_sa;
254 unsigned int rx_discards_wep_undecryptable;
255 unsigned int rx_message_in_msg_fragments;
256 unsigned int rx_message_in_bad_msg_fragments;
257};
258
259
260struct hfa384x_regs {
261 u16 cmd;
262 u16 evstat;
263 u16 offset0;
264 u16 offset1;
265 u16 swsupport0;
266};
267
268
269#if defined(PRISM2_PCCARD) || defined(PRISM2_PLX)
270/* I/O ports for HFA384X Controller access */
271#define HFA384X_CMD_OFF 0x00
272#define HFA384X_PARAM0_OFF 0x02
273#define HFA384X_PARAM1_OFF 0x04
274#define HFA384X_PARAM2_OFF 0x06
275#define HFA384X_STATUS_OFF 0x08
276#define HFA384X_RESP0_OFF 0x0A
277#define HFA384X_RESP1_OFF 0x0C
278#define HFA384X_RESP2_OFF 0x0E
279#define HFA384X_INFOFID_OFF 0x10
280#define HFA384X_CONTROL_OFF 0x14
281#define HFA384X_SELECT0_OFF 0x18
282#define HFA384X_SELECT1_OFF 0x1A
283#define HFA384X_OFFSET0_OFF 0x1C
284#define HFA384X_OFFSET1_OFF 0x1E
285#define HFA384X_RXFID_OFF 0x20
286#define HFA384X_ALLOCFID_OFF 0x22
287#define HFA384X_TXCOMPLFID_OFF 0x24
288#define HFA384X_SWSUPPORT0_OFF 0x28
289#define HFA384X_SWSUPPORT1_OFF 0x2A
290#define HFA384X_SWSUPPORT2_OFF 0x2C
291#define HFA384X_EVSTAT_OFF 0x30
292#define HFA384X_INTEN_OFF 0x32
293#define HFA384X_EVACK_OFF 0x34
294#define HFA384X_DATA0_OFF 0x36
295#define HFA384X_DATA1_OFF 0x38
296#define HFA384X_AUXPAGE_OFF 0x3A
297#define HFA384X_AUXOFFSET_OFF 0x3C
298#define HFA384X_AUXDATA_OFF 0x3E
299#endif /* PRISM2_PCCARD || PRISM2_PLX */
300
301#ifdef PRISM2_PCI
302/* Memory addresses for ISL3874 controller access */
303#define HFA384X_CMD_OFF 0x00
304#define HFA384X_PARAM0_OFF 0x04
305#define HFA384X_PARAM1_OFF 0x08
306#define HFA384X_PARAM2_OFF 0x0C
307#define HFA384X_STATUS_OFF 0x10
308#define HFA384X_RESP0_OFF 0x14
309#define HFA384X_RESP1_OFF 0x18
310#define HFA384X_RESP2_OFF 0x1C
311#define HFA384X_INFOFID_OFF 0x20
312#define HFA384X_CONTROL_OFF 0x28
313#define HFA384X_SELECT0_OFF 0x30
314#define HFA384X_SELECT1_OFF 0x34
315#define HFA384X_OFFSET0_OFF 0x38
316#define HFA384X_OFFSET1_OFF 0x3C
317#define HFA384X_RXFID_OFF 0x40
318#define HFA384X_ALLOCFID_OFF 0x44
319#define HFA384X_TXCOMPLFID_OFF 0x48
320#define HFA384X_PCICOR_OFF 0x4C
321#define HFA384X_SWSUPPORT0_OFF 0x50
322#define HFA384X_SWSUPPORT1_OFF 0x54
323#define HFA384X_SWSUPPORT2_OFF 0x58
324#define HFA384X_PCIHCR_OFF 0x5C
325#define HFA384X_EVSTAT_OFF 0x60
326#define HFA384X_INTEN_OFF 0x64
327#define HFA384X_EVACK_OFF 0x68
328#define HFA384X_DATA0_OFF 0x6C
329#define HFA384X_DATA1_OFF 0x70
330#define HFA384X_AUXPAGE_OFF 0x74
331#define HFA384X_AUXOFFSET_OFF 0x78
332#define HFA384X_AUXDATA_OFF 0x7C
333#define HFA384X_PCI_M0_ADDRH_OFF 0x80
334#define HFA384X_PCI_M0_ADDRL_OFF 0x84
335#define HFA384X_PCI_M0_LEN_OFF 0x88
336#define HFA384X_PCI_M0_CTL_OFF 0x8C
337#define HFA384X_PCI_STATUS_OFF 0x98
338#define HFA384X_PCI_M1_ADDRH_OFF 0xA0
339#define HFA384X_PCI_M1_ADDRL_OFF 0xA4
340#define HFA384X_PCI_M1_LEN_OFF 0xA8
341#define HFA384X_PCI_M1_CTL_OFF 0xAC
342
343/* PCI bus master control bits (these are undocumented; based on guessing and
344 * experimenting..) */
345#define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
346#define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
347
348#endif /* PRISM2_PCI */
349
350
351/* Command codes for CMD reg. */
352#define HFA384X_CMDCODE_INIT 0x00
353#define HFA384X_CMDCODE_ENABLE 0x01
354#define HFA384X_CMDCODE_DISABLE 0x02
355#define HFA384X_CMDCODE_ALLOC 0x0A
356#define HFA384X_CMDCODE_TRANSMIT 0x0B
357#define HFA384X_CMDCODE_INQUIRE 0x11
358#define HFA384X_CMDCODE_ACCESS 0x21
359#define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
360#define HFA384X_CMDCODE_DOWNLOAD 0x22
361#define HFA384X_CMDCODE_READMIF 0x30
362#define HFA384X_CMDCODE_WRITEMIF 0x31
363#define HFA384X_CMDCODE_TEST 0x38
364
365#define HFA384X_CMDCODE_MASK 0x3F
366
367/* Test mode operations */
368#define HFA384X_TEST_CHANGE_CHANNEL 0x08
369#define HFA384X_TEST_MONITOR 0x0B
370#define HFA384X_TEST_STOP 0x0F
371#define HFA384X_TEST_CFG_BITS 0x15
372#define HFA384X_TEST_CFG_BIT_ALC BIT(3)
373
374#define HFA384X_CMD_BUSY BIT(15)
375
376#define HFA384X_CMD_TX_RECLAIM BIT(8)
377
378#define HFA384X_OFFSET_ERR BIT(14)
379#define HFA384X_OFFSET_BUSY BIT(15)
380
381
382/* ProgMode for download command */
383#define HFA384X_PROGMODE_DISABLE 0
384#define HFA384X_PROGMODE_ENABLE_VOLATILE 1
385#define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2
386#define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3
387
388#define HFA384X_AUX_MAGIC0 0xfe01
389#define HFA384X_AUX_MAGIC1 0xdc23
390#define HFA384X_AUX_MAGIC2 0xba45
391
392#define HFA384X_AUX_PORT_DISABLED 0
393#define HFA384X_AUX_PORT_DISABLE BIT(14)
394#define HFA384X_AUX_PORT_ENABLE BIT(15)
395#define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15))
396#define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15))
397
398#define PRISM2_PDA_SIZE 1024
399
400
401/* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */
402#define HFA384X_EV_TICK BIT(15)
403#define HFA384X_EV_WTERR BIT(14)
404#define HFA384X_EV_INFDROP BIT(13)
405#ifdef PRISM2_PCI
406#define HFA384X_EV_PCI_M1 BIT(9)
407#define HFA384X_EV_PCI_M0 BIT(8)
408#endif /* PRISM2_PCI */
409#define HFA384X_EV_INFO BIT(7)
410#define HFA384X_EV_DTIM BIT(5)
411#define HFA384X_EV_CMD BIT(4)
412#define HFA384X_EV_ALLOC BIT(3)
413#define HFA384X_EV_TXEXC BIT(2)
414#define HFA384X_EV_TX BIT(1)
415#define HFA384X_EV_RX BIT(0)
416
417
418/* HFA384X Information frames */
419#define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
420#define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
421#define HFA384X_INFO_COMMTALLIES 0xF100
422#define HFA384X_INFO_SCANRESULTS 0xF101
423#define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
424#define HFA384X_INFO_HOSTSCANRESULTS 0xF103
425#define HFA384X_INFO_LINKSTATUS 0xF200
426#define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
427#define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
428#define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
429#define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
430
431enum { HFA384X_LINKSTATUS_CONNECTED = 1,
432 HFA384X_LINKSTATUS_DISCONNECTED = 2,
433 HFA384X_LINKSTATUS_AP_CHANGE = 3,
434 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4,
435 HFA384X_LINKSTATUS_AP_IN_RANGE = 5,
436 HFA384X_LINKSTATUS_ASSOC_FAILED = 6 };
437
438enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2,
439 HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
440 HFA384X_PORTTYPE_HOSTAP = 6 };
441
442#define HFA384X_RATES_1MBPS BIT(0)
443#define HFA384X_RATES_2MBPS BIT(1)
444#define HFA384X_RATES_5MBPS BIT(2)
445#define HFA384X_RATES_11MBPS BIT(3)
446
447#define HFA384X_ROAMING_FIRMWARE 1
448#define HFA384X_ROAMING_HOST 2
449#define HFA384X_ROAMING_DISABLED 3
450
451#define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
452#define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1)
453#define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4)
454#define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7)
455
456#define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13))
457#define HFA384X_RX_STATUS_PCF BIT(12)
458#define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8))
459#define HFA384X_RX_STATUS_UNDECR BIT(1)
460#define HFA384X_RX_STATUS_FCSERR BIT(0)
461
462#define HFA384X_RX_STATUS_GET_MSGTYPE(s) \
463(((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13)
464#define HFA384X_RX_STATUS_GET_MACPORT(s) \
465(((s) & HFA384X_RX_STATUS_MACPORT) >> 8)
466
467enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1,
468 HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 };
469
470
471#define HFA384X_TX_CTRL_ALT_RTRY BIT(5)
472#define HFA384X_TX_CTRL_802_11 BIT(3)
473#define HFA384X_TX_CTRL_802_3 0
474#define HFA384X_TX_CTRL_TX_EX BIT(2)
475#define HFA384X_TX_CTRL_TX_OK BIT(1)
476
477#define HFA384X_TX_STATUS_RETRYERR BIT(0)
478#define HFA384X_TX_STATUS_AGEDERR BIT(1)
479#define HFA384X_TX_STATUS_DISCON BIT(2)
480#define HFA384X_TX_STATUS_FORMERR BIT(3)
481
482/* HFA3861/3863 (BBP) Control Registers */
483#define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
484#define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
485#define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
486#define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
487#define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
488
489
490#ifdef __KERNEL__
491
492#define PRISM2_TXFID_COUNT 8
493#define PRISM2_DATA_MAXLEN 2304
494#define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame))
495#define PRISM2_TXFID_EMPTY 0xffff
496#define PRISM2_TXFID_RESERVED 0xfffe
497#define PRISM2_DUMMY_FID 0xffff
498#define MAX_SSID_LEN 32
499#define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */
500
501#define PRISM2_DUMP_RX_HDR BIT(0)
502#define PRISM2_DUMP_TX_HDR BIT(1)
503#define PRISM2_DUMP_TXEXC_HDR BIT(2)
504
505struct hostap_tx_callback_info {
506 u16 idx;
507 void (*func)(struct sk_buff *, int ok, void *);
508 void *data;
509 struct hostap_tx_callback_info *next;
510};
511
512
513/* IEEE 802.11 requires that STA supports concurrent reception of at least
514 * three fragmented frames. This define can be increased to support more
515 * concurrent frames, but it should be noted that each entry can consume about
516 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
517#define PRISM2_FRAG_CACHE_LEN 4
518
519struct prism2_frag_entry {
520 unsigned long first_frag_time;
521 unsigned int seq;
522 unsigned int last_frag;
523 struct sk_buff *skb;
524 u8 src_addr[ETH_ALEN];
525 u8 dst_addr[ETH_ALEN];
526};
527
528
529struct hostap_cmd_queue {
530 struct list_head list;
531 wait_queue_head_t compl;
532 volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type;
533 void (*callback)(struct net_device *dev, long context, u16 resp0,
534 u16 res);
535 long context;
536 u16 cmd, param0, param1;
537 u16 resp0, res;
538 volatile int issued, issuing;
539
540 atomic_t usecnt;
541 int del_req;
542};
543
544/* options for hw_shutdown */
545#define HOSTAP_HW_NO_DISABLE BIT(0)
546#define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1)
547
548typedef struct local_info local_info_t;
549
550struct prism2_helper_functions {
551 /* these functions are defined in hardware model specific files
552 * (hostap_{cs,plx,pci}.c */
553 int (*card_present)(local_info_t *local);
554 void (*cor_sreset)(local_info_t *local);
555 int (*dev_open)(local_info_t *local);
556 int (*dev_close)(local_info_t *local);
557 void (*genesis_reset)(local_info_t *local, int hcr);
558
559 /* the following functions are from hostap_hw.c, but they may have some
560 * hardware model specific code */
561
562 /* FIX: low-level commands like cmd might disappear at some point to
563 * make it easier to change them if needed (e.g., cmd would be replaced
564 * with write_mif/read_mif/testcmd/inquire); at least get_rid and
565 * set_rid might move to hostap_{cs,plx,pci}.c */
566 int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1,
567 u16 *resp0);
568 void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs);
569 int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len,
570 int exact_len);
571 int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len);
572 int (*hw_enable)(struct net_device *dev, int initial);
573 int (*hw_config)(struct net_device *dev, int initial);
574 void (*hw_reset)(struct net_device *dev);
575 void (*hw_shutdown)(struct net_device *dev, int no_disable);
576 int (*reset_port)(struct net_device *dev);
577 void (*schedule_reset)(local_info_t *local);
578 int (*download)(local_info_t *local,
579 struct prism2_download_param *param);
580 int (*tx)(struct sk_buff *skb, struct net_device *dev);
581 int (*set_tim)(struct net_device *dev, int aid, int set);
582 int (*read_aux)(struct net_device *dev, unsigned addr, int len,
583 u8 *buf);
584
585 int need_tx_headroom; /* number of bytes of headroom needed before
586 * IEEE 802.11 header */
587 enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type;
588};
589
590
591struct prism2_download_data {
592 u32 dl_cmd;
593 u32 start_addr;
594 u32 num_areas;
595 struct prism2_download_data_area {
596 u32 addr; /* wlan card address */
597 u32 len;
598 u8 *data; /* allocated data */
599 } data[0];
600};
601
602
603#define HOSTAP_MAX_BSS_COUNT 64
604#define MAX_WPA_IE_LEN 64
605
606struct hostap_bss_info {
607 struct list_head list;
608 unsigned long last_update;
609 unsigned int count;
610 u8 bssid[ETH_ALEN];
611 u16 capab_info;
612 u8 ssid[32];
613 size_t ssid_len;
614 u8 wpa_ie[MAX_WPA_IE_LEN];
615 size_t wpa_ie_len;
616 u8 rsn_ie[MAX_WPA_IE_LEN];
617 size_t rsn_ie_len;
618 int chan;
619 int included;
620};
621
622
623/* Per radio private Host AP data - shared by all net devices interfaces used
624 * by each radio (wlan#, wlan#ap, wlan#sta, WDS).
625 * ((struct hostap_interface *) netdev_priv(dev))->local points to this
626 * structure. */
627struct local_info {
628 struct module *hw_module;
629 int card_idx;
630 int dev_enabled;
631 int master_dev_auto_open; /* was master device opened automatically */
632 int num_dev_open; /* number of open devices */
633 struct net_device *dev; /* master radio device */
634 struct net_device *ddev; /* main data device */
635 struct list_head hostap_interfaces; /* Host AP interface list (contains
636 * struct hostap_interface entries)
637 */
638 rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock
639 * when removing entries from the list.
640 * TX and RX paths can use read lock. */
641 spinlock_t cmdlock, baplock, lock;
642 struct semaphore rid_bap_sem;
643 u16 infofid; /* MAC buffer id for info frame */
644 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by
645 * txfidlock */
646 spinlock_t txfidlock;
647 int txfid_len; /* length of allocated TX buffers */
648 u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */
649 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if
650 * corresponding txfid is free for next TX frame */
651 u16 intransmitfid[PRISM2_TXFID_COUNT];
652 int next_txfid; /* index to the next txfid to be checked for
653 * availability */
654 int next_alloc; /* index to the next intransmitfid to be checked for
655 * allocation events */
656
657 /* bitfield for atomic bitops */
658#define HOSTAP_BITS_TRANSMIT 0
659#define HOSTAP_BITS_BAP_TASKLET 1
660#define HOSTAP_BITS_BAP_TASKLET2 2
661 long bits;
662
663 struct ap_data *ap;
664
665 char essid[MAX_SSID_LEN + 1];
666 char name[MAX_NAME_LEN + 1];
667 int name_set;
668 u16 channel_mask; /* mask of allowed channels */
669 u16 scan_channel_mask; /* mask of channels to be scanned */
670 struct comm_tallies_sums comm_tallies;
671 struct net_device_stats stats;
672 struct proc_dir_entry *proc;
673 int iw_mode; /* operating mode (IW_MODE_*) */
674 int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
675 * 1: IW_MODE_ADHOC is "pseudo IBSS" */
676 char bssid[ETH_ALEN];
677 int channel;
678 int beacon_int;
679 int dtim_period;
680 int mtu;
681 int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */
682 int fw_tx_rate_control;
683 u16 tx_rate_control;
684 u16 basic_rates;
685 int hw_resetting;
686 int hw_ready;
687 int hw_reset_tries; /* how many times reset has been tried */
688 int hw_downloading;
689 int shutdown;
690 int pri_only;
691 int no_pri; /* no PRI f/w present */
692 int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */
693
694 enum {
695 PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF,
696 PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN
697 } txpower_type;
698 int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */
699
700 /* command queue for hfa384x_cmd(); protected with cmdlock */
701 struct list_head cmd_queue;
702 /* max_len for cmd_queue; in addition, cmd_callback can use two
703 * additional entries to prevent sleeping commands from stopping
704 * transmits */
705#define HOSTAP_CMD_QUEUE_MAX_LEN 16
706 int cmd_queue_len; /* number of entries in cmd_queue */
707
708 /* if card timeout is detected in interrupt context, reset_queue is
709 * used to schedule card reseting to be done in user context */
710 struct work_struct reset_queue;
711
712 /* For scheduling a change of the promiscuous mode RID */
713 int is_promisc;
714 struct work_struct set_multicast_list_queue;
715
716 struct work_struct set_tim_queue;
717 struct list_head set_tim_list;
718 spinlock_t set_tim_lock;
719
720 int wds_max_connections;
721 int wds_connections;
722#define HOSTAP_WDS_BROADCAST_RA BIT(0)
723#define HOSTAP_WDS_AP_CLIENT BIT(1)
724#define HOSTAP_WDS_STANDARD_FRAME BIT(2)
725 u32 wds_type;
726 u16 tx_control; /* flags to be used in TX description */
727 int manual_retry_count; /* -1 = use f/w default; otherwise retry count
728 * to be used with all frames */
729
730 struct iw_statistics wstats;
731 unsigned long scan_timestamp; /* Time started to scan */
732 enum {
733 PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1,
734 PRISM2_MONITOR_CAPHDR = 2
735 } monitor_type;
736 int (*saved_eth_header_parse)(struct sk_buff *skb,
737 unsigned char *haddr);
738 int monitor_allow_fcserr;
739
740 int hostapd; /* whether user space daemon, hostapd, is used for AP
741 * management */
742 int hostapd_sta; /* whether hostapd is used with an extra STA interface
743 */
744 struct net_device *apdev;
745 struct net_device_stats apdevstats;
746
747 char assoc_ap_addr[ETH_ALEN];
748 struct net_device *stadev;
749 struct net_device_stats stadevstats;
750
751#define WEP_KEYS 4
752#define WEP_KEY_LEN 13
753 struct ieee80211_crypt_data *crypt[WEP_KEYS];
754 int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
755 struct timer_list crypt_deinit_timer;
756 struct list_head crypt_deinit_list;
757
758 int open_wep; /* allow unencrypted frames */
759 int host_encrypt;
760 int host_decrypt;
761 int privacy_invoked; /* force privacy invoked flag even if no keys are
762 * configured */
763 int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working
764 * in Host AP mode (STA f/w 1.4.9 or newer) */
765 int bcrx_sta_key; /* use individual keys to override default keys even
766 * with RX of broad/multicast frames */
767
768 struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN];
769 unsigned int frag_next_idx;
770
771 int ieee_802_1x; /* is IEEE 802.1X used */
772
773 int antsel_tx, antsel_rx;
774 int rts_threshold; /* dot11RTSThreshold */
775 int fragm_threshold; /* dot11FragmentationThreshold */
776 int auth_algs; /* PRISM2_AUTH_ flags */
777
778 int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */
779 int tallies32; /* 32-bit tallies in use */
780
781 struct prism2_helper_functions *func;
782
783 u8 *pda;
784 int fw_ap;
785#define PRISM2_FW_VER(major, minor, variant) \
786(((major) << 16) | ((minor) << 8) | variant)
787 u32 sta_fw_ver;
788
789 /* Tasklets for handling hardware IRQ related operations outside hw IRQ
790 * handler */
791 struct tasklet_struct bap_tasklet;
792
793 struct tasklet_struct info_tasklet;
794 struct sk_buff_head info_list; /* info frames as skb's for
795 * info_tasklet */
796
797 struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks
798 */
799
800 struct tasklet_struct rx_tasklet;
801 struct sk_buff_head rx_list;
802
803 struct tasklet_struct sta_tx_exc_tasklet;
804 struct sk_buff_head sta_tx_exc_list;
805
806 int host_roaming;
807 unsigned long last_join_time; /* time of last JoinRequest */
808 struct hfa384x_hostscan_result *last_scan_results;
809 int last_scan_results_count;
810 enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type;
811 struct work_struct info_queue;
812 long pending_info; /* bit field of pending info_queue items */
813#define PRISM2_INFO_PENDING_LINKSTATUS 0
814#define PRISM2_INFO_PENDING_SCANRESULTS 1
815 int prev_link_status; /* previous received LinkStatus info */
816 int prev_linkstatus_connected;
817 u8 preferred_ap[6]; /* use this AP if possible */
818
819#ifdef PRISM2_CALLBACK
820 void *callback_data; /* Can be used in callbacks; e.g., allocate
821 * on enable event and free on disable event.
822 * Host AP driver code does not touch this. */
823#endif /* PRISM2_CALLBACK */
824
825 wait_queue_head_t hostscan_wq;
826
827 /* Passive scan in Host AP mode */
828 struct timer_list passive_scan_timer;
829 int passive_scan_interval; /* in seconds, 0 = disabled */
830 int passive_scan_channel;
831 enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state;
832
833 struct timer_list tick_timer;
834 unsigned long last_tick_timer;
835 unsigned int sw_tick_stuck;
836
837 /* commsQuality / dBmCommsQuality data from periodic polling; only
838 * valid for Managed and Ad-hoc modes */
839 unsigned long last_comms_qual_update;
840 int comms_qual; /* in some odd unit.. */
841 int avg_signal; /* in dB (note: negative) */
842 int avg_noise; /* in dB (note: negative) */
843 struct work_struct comms_qual_update;
844
845 /* RSSI to dBm adjustment (for RX descriptor fields) */
846 int rssi_to_dBm; /* substract from RSSI to get approximate dBm value */
847
848 /* BSS list / protected by local->lock */
849 struct list_head bss_list;
850 int num_bss_info;
851 int wpa; /* WPA support enabled */
852 int tkip_countermeasures;
853 int drop_unencrypted;
854 /* Generic IEEE 802.11 info element to be added to
855 * ProbeResp/Beacon/(Re)AssocReq */
856 u8 *generic_elem;
857 size_t generic_elem_len;
858
859#ifdef PRISM2_DOWNLOAD_SUPPORT
860 /* Persistent volatile download data */
861 struct prism2_download_data *dl_pri;
862 struct prism2_download_data *dl_sec;
863#endif /* PRISM2_DOWNLOAD_SUPPORT */
864
865#ifdef PRISM2_IO_DEBUG
866#define PRISM2_IO_DEBUG_SIZE 10000
867 u32 io_debug[PRISM2_IO_DEBUG_SIZE];
868 int io_debug_head;
869 int io_debug_enabled;
870#endif /* PRISM2_IO_DEBUG */
871
872 /* Pointer to hardware model specific (cs,pci,plx) private data. */
873 void *hw_priv;
874};
875
876
877/* Per interface private Host AP data
878 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta,
879 * WDS) and netdev_priv(dev) points to this structure. */
880struct hostap_interface {
881 struct list_head list; /* list entry in Host AP interface list */
882 struct net_device *dev; /* pointer to this device */
883 struct local_info *local; /* pointer to shared private data */
884 struct net_device_stats stats;
885 struct iw_spy_data spy_data; /* iwspy support */
886 struct iw_public_data wireless_data;
887
888 enum {
889 HOSTAP_INTERFACE_MASTER,
890 HOSTAP_INTERFACE_MAIN,
891 HOSTAP_INTERFACE_AP,
892 HOSTAP_INTERFACE_STA,
893 HOSTAP_INTERFACE_WDS,
894 } type;
895
896 union {
897 struct hostap_interface_wds {
898 u8 remote_addr[ETH_ALEN];
899 } wds;
900 } u;
901};
902
903
904#define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
905
906/*
907 * TX meta data - stored in skb->cb buffer, so this must not be increased over
908 * the 40-byte limit
909 */
910struct hostap_skb_tx_data {
911 u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */
912 u8 rate; /* transmit rate */
913#define HOSTAP_TX_FLAGS_WDS BIT(0)
914#define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1)
915#define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2)
916 u8 flags; /* HOSTAP_TX_FLAGS_* */
917 u16 tx_cb_idx;
918 struct hostap_interface *iface;
919 unsigned long jiffies; /* queueing timestamp */
920 unsigned short ethertype;
921};
922
923
924#ifndef PRISM2_NO_DEBUG
925
926#define DEBUG_FID BIT(0)
927#define DEBUG_PS BIT(1)
928#define DEBUG_FLOW BIT(2)
929#define DEBUG_AP BIT(3)
930#define DEBUG_HW BIT(4)
931#define DEBUG_EXTRA BIT(5)
932#define DEBUG_EXTRA2 BIT(6)
933#define DEBUG_PS2 BIT(7)
934#define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA)
935#define PDEBUG(n, args...) \
936do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
937#define PDEBUG2(n, args...) \
938do { if ((n) & DEBUG_MASK) printk(args); } while (0)
939
940#else /* PRISM2_NO_DEBUG */
941
942#define PDEBUG(n, args...)
943#define PDEBUG2(n, args...)
944
945#endif /* PRISM2_NO_DEBUG */
946
947enum { BAP0 = 0, BAP1 = 1 };
948
949#define PRISM2_IO_DEBUG_CMD_INB 0
950#define PRISM2_IO_DEBUG_CMD_INW 1
951#define PRISM2_IO_DEBUG_CMD_INSW 2
952#define PRISM2_IO_DEBUG_CMD_OUTB 3
953#define PRISM2_IO_DEBUG_CMD_OUTW 4
954#define PRISM2_IO_DEBUG_CMD_OUTSW 5
955#define PRISM2_IO_DEBUG_CMD_ERROR 6
956#define PRISM2_IO_DEBUG_CMD_INTERRUPT 7
957
958#ifdef PRISM2_IO_DEBUG
959
960#define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \
961(((cmd) << 24) | ((reg) << 16) | value)
962
963static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
964 int reg, int value)
965{
966 struct hostap_interface *iface = netdev_priv(dev);
967 local_info_t *local = iface->local;
968
969 if (!local->io_debug_enabled)
970 return;
971
972 local->io_debug[local->io_debug_head] = jiffies & 0xffffffff;
973 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
974 local->io_debug_head = 0;
975 local->io_debug[local->io_debug_head] =
976 PRISM2_IO_DEBUG_ENTRY(cmd, reg, value);
977 if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
978 local->io_debug_head = 0;
979}
980
981
982static inline void prism2_io_debug_error(struct net_device *dev, int err)
983{
984 struct hostap_interface *iface = netdev_priv(dev);
985 local_info_t *local = iface->local;
986 unsigned long flags;
987
988 if (!local->io_debug_enabled)
989 return;
990
991 spin_lock_irqsave(&local->lock, flags);
992 prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err);
993 if (local->io_debug_enabled == 1) {
994 local->io_debug_enabled = 0;
995 printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name);
996 }
997 spin_unlock_irqrestore(&local->lock, flags);
998}
999
1000#else /* PRISM2_IO_DEBUG */
1001
1002static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
1003 int reg, int value)
1004{
1005}
1006
1007static inline void prism2_io_debug_error(struct net_device *dev, int err)
1008{
1009}
1010
1011#endif /* PRISM2_IO_DEBUG */
1012
1013
1014#ifdef PRISM2_CALLBACK
1015enum {
1016 /* Called when card is enabled */
1017 PRISM2_CALLBACK_ENABLE,
1018
1019 /* Called when card is disabled */
1020 PRISM2_CALLBACK_DISABLE,
1021
1022 /* Called when RX/TX starts/ends */
1023 PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END,
1024 PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END
1025};
1026void prism2_callback(local_info_t *local, int event);
1027#else /* PRISM2_CALLBACK */
1028#define prism2_callback(d, e) do { } while (0)
1029#endif /* PRISM2_CALLBACK */
1030
1031#endif /* __KERNEL__ */
1032
1033#endif /* HOSTAP_WLAN_H */
diff --git a/drivers/net/wireless/ieee802_11.h b/drivers/net/wireless/ieee802_11.h
deleted file mode 100644
index 53dd5248f9f1..000000000000
--- a/drivers/net/wireless/ieee802_11.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef _IEEE802_11_H
2#define _IEEE802_11_H
3
4#define IEEE802_11_DATA_LEN 2304
5/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
6 6.2.1.1.2.
7
8 The figure in section 7.1.2 suggests a body size of up to 2312
9 bytes is allowed, which is a bit confusing, I suspect this
10 represents the 2304 bytes of real data, plus a possible 8 bytes of
11 WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
12
13
14#define IEEE802_11_HLEN 30
15#define IEEE802_11_FRAME_LEN (IEEE802_11_DATA_LEN + IEEE802_11_HLEN)
16
17struct ieee802_11_hdr {
18 u16 frame_ctl;
19 u16 duration_id;
20 u8 addr1[ETH_ALEN];
21 u8 addr2[ETH_ALEN];
22 u8 addr3[ETH_ALEN];
23 u16 seq_ctl;
24 u8 addr4[ETH_ALEN];
25} __attribute__ ((packed));
26
27/* Frame control field constants */
28#define IEEE802_11_FCTL_VERS 0x0002
29#define IEEE802_11_FCTL_FTYPE 0x000c
30#define IEEE802_11_FCTL_STYPE 0x00f0
31#define IEEE802_11_FCTL_TODS 0x0100
32#define IEEE802_11_FCTL_FROMDS 0x0200
33#define IEEE802_11_FCTL_MOREFRAGS 0x0400
34#define IEEE802_11_FCTL_RETRY 0x0800
35#define IEEE802_11_FCTL_PM 0x1000
36#define IEEE802_11_FCTL_MOREDATA 0x2000
37#define IEEE802_11_FCTL_WEP 0x4000
38#define IEEE802_11_FCTL_ORDER 0x8000
39
40#define IEEE802_11_FTYPE_MGMT 0x0000
41#define IEEE802_11_FTYPE_CTL 0x0004
42#define IEEE802_11_FTYPE_DATA 0x0008
43
44/* management */
45#define IEEE802_11_STYPE_ASSOC_REQ 0x0000
46#define IEEE802_11_STYPE_ASSOC_RESP 0x0010
47#define IEEE802_11_STYPE_REASSOC_REQ 0x0020
48#define IEEE802_11_STYPE_REASSOC_RESP 0x0030
49#define IEEE802_11_STYPE_PROBE_REQ 0x0040
50#define IEEE802_11_STYPE_PROBE_RESP 0x0050
51#define IEEE802_11_STYPE_BEACON 0x0080
52#define IEEE802_11_STYPE_ATIM 0x0090
53#define IEEE802_11_STYPE_DISASSOC 0x00A0
54#define IEEE802_11_STYPE_AUTH 0x00B0
55#define IEEE802_11_STYPE_DEAUTH 0x00C0
56
57/* control */
58#define IEEE802_11_STYPE_PSPOLL 0x00A0
59#define IEEE802_11_STYPE_RTS 0x00B0
60#define IEEE802_11_STYPE_CTS 0x00C0
61#define IEEE802_11_STYPE_ACK 0x00D0
62#define IEEE802_11_STYPE_CFEND 0x00E0
63#define IEEE802_11_STYPE_CFENDACK 0x00F0
64
65/* data */
66#define IEEE802_11_STYPE_DATA 0x0000
67#define IEEE802_11_STYPE_DATA_CFACK 0x0010
68#define IEEE802_11_STYPE_DATA_CFPOLL 0x0020
69#define IEEE802_11_STYPE_DATA_CFACKPOLL 0x0030
70#define IEEE802_11_STYPE_NULLFUNC 0x0040
71#define IEEE802_11_STYPE_CFACK 0x0050
72#define IEEE802_11_STYPE_CFPOLL 0x0060
73#define IEEE802_11_STYPE_CFACKPOLL 0x0070
74
75#define IEEE802_11_SCTL_FRAG 0x000F
76#define IEEE802_11_SCTL_SEQ 0xFFF0
77
78#endif /* _IEEE802_11_H */
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c
new file mode 100644
index 000000000000..a47fce4beadf
--- /dev/null
+++ b/drivers/net/wireless/ipw2100.c
@@ -0,0 +1,8679 @@
1/******************************************************************************
2
3 Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25 Portions of this file are based on the sample_* files provided by Wireless
26 Extensions 0.26 package and copyright (c) 1997-2003 Jean Tourrilhes
27 <jt@hpl.hp.com>
28
29 Portions of this file are based on the Host AP project,
30 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
31 <jkmaline@cc.hut.fi>
32 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
33
34 Portions of ipw2100_mod_firmware_load, ipw2100_do_mod_firmware_load, and
35 ipw2100_fw_load are loosely based on drivers/sound/sound_firmware.c
36 available in the 2.4.25 kernel sources, and are copyright (c) Alan Cox
37
38******************************************************************************/
39/*
40
41 Initial driver on which this is based was developed by Janusz Gorycki,
42 Maciej Urbaniak, and Maciej Sosnowski.
43
44 Promiscuous mode support added by Jacek Wysoczynski and Maciej Urbaniak.
45
46Theory of Operation
47
48Tx - Commands and Data
49
50Firmware and host share a circular queue of Transmit Buffer Descriptors (TBDs)
51Each TBD contains a pointer to the physical (dma_addr_t) address of data being
52sent to the firmware as well as the length of the data.
53
54The host writes to the TBD queue at the WRITE index. The WRITE index points
55to the _next_ packet to be written and is advanced when after the TBD has been
56filled.
57
58The firmware pulls from the TBD queue at the READ index. The READ index points
59to the currently being read entry, and is advanced once the firmware is
60done with a packet.
61
62When data is sent to the firmware, the first TBD is used to indicate to the
63firmware if a Command or Data is being sent. If it is Command, all of the
64command information is contained within the physical address referred to by the
65TBD. If it is Data, the first TBD indicates the type of data packet, number
66of fragments, etc. The next TBD then referrs to the actual packet location.
67
68The Tx flow cycle is as follows:
69
701) ipw2100_tx() is called by kernel with SKB to transmit
712) Packet is move from the tx_free_list and appended to the transmit pending
72 list (tx_pend_list)
733) work is scheduled to move pending packets into the shared circular queue.
744) when placing packet in the circular queue, the incoming SKB is DMA mapped
75 to a physical address. That address is entered into a TBD. Two TBDs are
76 filled out. The first indicating a data packet, the second referring to the
77 actual payload data.
785) the packet is removed from tx_pend_list and placed on the end of the
79 firmware pending list (fw_pend_list)
806) firmware is notified that the WRITE index has
817) Once the firmware has processed the TBD, INTA is triggered.
828) For each Tx interrupt received from the firmware, the READ index is checked
83 to see which TBDs are done being processed.
849) For each TBD that has been processed, the ISR pulls the oldest packet
85 from the fw_pend_list.
8610)The packet structure contained in the fw_pend_list is then used
87 to unmap the DMA address and to free the SKB originally passed to the driver
88 from the kernel.
8911)The packet structure is placed onto the tx_free_list
90
91The above steps are the same for commands, only the msg_free_list/msg_pend_list
92are used instead of tx_free_list/tx_pend_list
93
94...
95
96Critical Sections / Locking :
97
98There are two locks utilized. The first is the low level lock (priv->low_lock)
99that protects the following:
100
101- Access to the Tx/Rx queue lists via priv->low_lock. The lists are as follows:
102
103 tx_free_list : Holds pre-allocated Tx buffers.
104 TAIL modified in __ipw2100_tx_process()
105 HEAD modified in ipw2100_tx()
106
107 tx_pend_list : Holds used Tx buffers waiting to go into the TBD ring
108 TAIL modified ipw2100_tx()
109 HEAD modified by ipw2100_tx_send_data()
110
111 msg_free_list : Holds pre-allocated Msg (Command) buffers
112 TAIL modified in __ipw2100_tx_process()
113 HEAD modified in ipw2100_hw_send_command()
114
115 msg_pend_list : Holds used Msg buffers waiting to go into the TBD ring
116 TAIL modified in ipw2100_hw_send_command()
117 HEAD modified in ipw2100_tx_send_commands()
118
119 The flow of data on the TX side is as follows:
120
121 MSG_FREE_LIST + COMMAND => MSG_PEND_LIST => TBD => MSG_FREE_LIST
122 TX_FREE_LIST + DATA => TX_PEND_LIST => TBD => TX_FREE_LIST
123
124 The methods that work on the TBD ring are protected via priv->low_lock.
125
126- The internal data state of the device itself
127- Access to the firmware read/write indexes for the BD queues
128 and associated logic
129
130All external entry functions are locked with the priv->action_lock to ensure
131that only one external action is invoked at a time.
132
133
134*/
135
136#include <linux/compiler.h>
137#include <linux/config.h>
138#include <linux/errno.h>
139#include <linux/if_arp.h>
140#include <linux/in6.h>
141#include <linux/in.h>
142#include <linux/ip.h>
143#include <linux/kernel.h>
144#include <linux/kmod.h>
145#include <linux/module.h>
146#include <linux/netdevice.h>
147#include <linux/ethtool.h>
148#include <linux/pci.h>
149#include <linux/dma-mapping.h>
150#include <linux/proc_fs.h>
151#include <linux/skbuff.h>
152#include <asm/uaccess.h>
153#include <asm/io.h>
154#define __KERNEL_SYSCALLS__
155#include <linux/fs.h>
156#include <linux/mm.h>
157#include <linux/slab.h>
158#include <linux/unistd.h>
159#include <linux/stringify.h>
160#include <linux/tcp.h>
161#include <linux/types.h>
162#include <linux/version.h>
163#include <linux/time.h>
164#include <linux/firmware.h>
165#include <linux/acpi.h>
166#include <linux/ctype.h>
167
168#include "ipw2100.h"
169
170#define IPW2100_VERSION "1.1.0"
171
172#define DRV_NAME "ipw2100"
173#define DRV_VERSION IPW2100_VERSION
174#define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2100 Network Driver"
175#define DRV_COPYRIGHT "Copyright(c) 2003-2004 Intel Corporation"
176
177
178/* Debugging stuff */
179#ifdef CONFIG_IPW_DEBUG
180#define CONFIG_IPW2100_RX_DEBUG /* Reception debugging */
181#endif
182
183MODULE_DESCRIPTION(DRV_DESCRIPTION);
184MODULE_VERSION(DRV_VERSION);
185MODULE_AUTHOR(DRV_COPYRIGHT);
186MODULE_LICENSE("GPL");
187
188static int debug = 0;
189static int mode = 0;
190static int channel = 0;
191static int associate = 1;
192static int disable = 0;
193#ifdef CONFIG_PM
194static struct ipw2100_fw ipw2100_firmware;
195#endif
196
197#include <linux/moduleparam.h>
198module_param(debug, int, 0444);
199module_param(mode, int, 0444);
200module_param(channel, int, 0444);
201module_param(associate, int, 0444);
202module_param(disable, int, 0444);
203
204MODULE_PARM_DESC(debug, "debug level");
205MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS,2=Monitor)");
206MODULE_PARM_DESC(channel, "channel");
207MODULE_PARM_DESC(associate, "auto associate when scanning (default on)");
208MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
209
210static u32 ipw2100_debug_level = IPW_DL_NONE;
211
212#ifdef CONFIG_IPW_DEBUG
213#define IPW_DEBUG(level, message...) \
214do { \
215 if (ipw2100_debug_level & (level)) { \
216 printk(KERN_DEBUG "ipw2100: %c %s ", \
217 in_interrupt() ? 'I' : 'U', __FUNCTION__); \
218 printk(message); \
219 } \
220} while (0)
221#else
222#define IPW_DEBUG(level, message...) do {} while (0)
223#endif /* CONFIG_IPW_DEBUG */
224
225#ifdef CONFIG_IPW_DEBUG
226static const char *command_types[] = {
227 "undefined",
228 "unused", /* HOST_ATTENTION */
229 "HOST_COMPLETE",
230 "unused", /* SLEEP */
231 "unused", /* HOST_POWER_DOWN */
232 "unused",
233 "SYSTEM_CONFIG",
234 "unused", /* SET_IMR */
235 "SSID",
236 "MANDATORY_BSSID",
237 "AUTHENTICATION_TYPE",
238 "ADAPTER_ADDRESS",
239 "PORT_TYPE",
240 "INTERNATIONAL_MODE",
241 "CHANNEL",
242 "RTS_THRESHOLD",
243 "FRAG_THRESHOLD",
244 "POWER_MODE",
245 "TX_RATES",
246 "BASIC_TX_RATES",
247 "WEP_KEY_INFO",
248 "unused",
249 "unused",
250 "unused",
251 "unused",
252 "WEP_KEY_INDEX",
253 "WEP_FLAGS",
254 "ADD_MULTICAST",
255 "CLEAR_ALL_MULTICAST",
256 "BEACON_INTERVAL",
257 "ATIM_WINDOW",
258 "CLEAR_STATISTICS",
259 "undefined",
260 "undefined",
261 "undefined",
262 "undefined",
263 "TX_POWER_INDEX",
264 "undefined",
265 "undefined",
266 "undefined",
267 "undefined",
268 "undefined",
269 "undefined",
270 "BROADCAST_SCAN",
271 "CARD_DISABLE",
272 "PREFERRED_BSSID",
273 "SET_SCAN_OPTIONS",
274 "SCAN_DWELL_TIME",
275 "SWEEP_TABLE",
276 "AP_OR_STATION_TABLE",
277 "GROUP_ORDINALS",
278 "SHORT_RETRY_LIMIT",
279 "LONG_RETRY_LIMIT",
280 "unused", /* SAVE_CALIBRATION */
281 "unused", /* RESTORE_CALIBRATION */
282 "undefined",
283 "undefined",
284 "undefined",
285 "HOST_PRE_POWER_DOWN",
286 "unused", /* HOST_INTERRUPT_COALESCING */
287 "undefined",
288 "CARD_DISABLE_PHY_OFF",
289 "MSDU_TX_RATES"
290 "undefined",
291 "undefined",
292 "SET_STATION_STAT_BITS",
293 "CLEAR_STATIONS_STAT_BITS",
294 "LEAP_ROGUE_MODE",
295 "SET_SECURITY_INFORMATION",
296 "DISASSOCIATION_BSSID",
297 "SET_WPA_ASS_IE"
298};
299#endif
300
301
302/* Pre-decl until we get the code solid and then we can clean it up */
303static void ipw2100_tx_send_commands(struct ipw2100_priv *priv);
304static void ipw2100_tx_send_data(struct ipw2100_priv *priv);
305static int ipw2100_adapter_setup(struct ipw2100_priv *priv);
306
307static void ipw2100_queues_initialize(struct ipw2100_priv *priv);
308static void ipw2100_queues_free(struct ipw2100_priv *priv);
309static int ipw2100_queues_allocate(struct ipw2100_priv *priv);
310
311static int ipw2100_fw_download(struct ipw2100_priv *priv,
312 struct ipw2100_fw *fw);
313static int ipw2100_get_firmware(struct ipw2100_priv *priv,
314 struct ipw2100_fw *fw);
315static int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf,
316 size_t max);
317static int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf,
318 size_t max);
319static void ipw2100_release_firmware(struct ipw2100_priv *priv,
320 struct ipw2100_fw *fw);
321static int ipw2100_ucode_download(struct ipw2100_priv *priv,
322 struct ipw2100_fw *fw);
323static void ipw2100_wx_event_work(struct ipw2100_priv *priv);
324static struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev);
325static struct iw_handler_def ipw2100_wx_handler_def;
326
327
328static inline void read_register(struct net_device *dev, u32 reg, u32 *val)
329{
330 *val = readl((void *)(dev->base_addr + reg));
331 IPW_DEBUG_IO("r: 0x%08X => 0x%08X\n", reg, *val);
332}
333
334static inline void write_register(struct net_device *dev, u32 reg, u32 val)
335{
336 writel(val, (void *)(dev->base_addr + reg));
337 IPW_DEBUG_IO("w: 0x%08X <= 0x%08X\n", reg, val);
338}
339
340static inline void read_register_word(struct net_device *dev, u32 reg, u16 *val)
341{
342 *val = readw((void *)(dev->base_addr + reg));
343 IPW_DEBUG_IO("r: 0x%08X => %04X\n", reg, *val);
344}
345
346static inline void read_register_byte(struct net_device *dev, u32 reg, u8 *val)
347{
348 *val = readb((void *)(dev->base_addr + reg));
349 IPW_DEBUG_IO("r: 0x%08X => %02X\n", reg, *val);
350}
351
352static inline void write_register_word(struct net_device *dev, u32 reg, u16 val)
353{
354 writew(val, (void *)(dev->base_addr + reg));
355 IPW_DEBUG_IO("w: 0x%08X <= %04X\n", reg, val);
356}
357
358
359static inline void write_register_byte(struct net_device *dev, u32 reg, u8 val)
360{
361 writeb(val, (void *)(dev->base_addr + reg));
362 IPW_DEBUG_IO("w: 0x%08X =< %02X\n", reg, val);
363}
364
365static inline void read_nic_dword(struct net_device *dev, u32 addr, u32 *val)
366{
367 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
368 addr & IPW_REG_INDIRECT_ADDR_MASK);
369 read_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
370}
371
372static inline void write_nic_dword(struct net_device *dev, u32 addr, u32 val)
373{
374 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
375 addr & IPW_REG_INDIRECT_ADDR_MASK);
376 write_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
377}
378
379static inline void read_nic_word(struct net_device *dev, u32 addr, u16 *val)
380{
381 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
382 addr & IPW_REG_INDIRECT_ADDR_MASK);
383 read_register_word(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
384}
385
386static inline void write_nic_word(struct net_device *dev, u32 addr, u16 val)
387{
388 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
389 addr & IPW_REG_INDIRECT_ADDR_MASK);
390 write_register_word(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
391}
392
393static inline void read_nic_byte(struct net_device *dev, u32 addr, u8 *val)
394{
395 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
396 addr & IPW_REG_INDIRECT_ADDR_MASK);
397 read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
398}
399
400static inline void write_nic_byte(struct net_device *dev, u32 addr, u8 val)
401{
402 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
403 addr & IPW_REG_INDIRECT_ADDR_MASK);
404 write_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA, val);
405}
406
407static inline void write_nic_auto_inc_address(struct net_device *dev, u32 addr)
408{
409 write_register(dev, IPW_REG_AUTOINCREMENT_ADDRESS,
410 addr & IPW_REG_INDIRECT_ADDR_MASK);
411}
412
413static inline void write_nic_dword_auto_inc(struct net_device *dev, u32 val)
414{
415 write_register(dev, IPW_REG_AUTOINCREMENT_DATA, val);
416}
417
418static inline void write_nic_memory(struct net_device *dev, u32 addr, u32 len,
419 const u8 *buf)
420{
421 u32 aligned_addr;
422 u32 aligned_len;
423 u32 dif_len;
424 u32 i;
425
426 /* read first nibble byte by byte */
427 aligned_addr = addr & (~0x3);
428 dif_len = addr - aligned_addr;
429 if (dif_len) {
430 /* Start reading at aligned_addr + dif_len */
431 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
432 aligned_addr);
433 for (i = dif_len; i < 4; i++, buf++)
434 write_register_byte(
435 dev, IPW_REG_INDIRECT_ACCESS_DATA + i,
436 *buf);
437
438 len -= dif_len;
439 aligned_addr += 4;
440 }
441
442 /* read DWs through autoincrement registers */
443 write_register(dev, IPW_REG_AUTOINCREMENT_ADDRESS,
444 aligned_addr);
445 aligned_len = len & (~0x3);
446 for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
447 write_register(
448 dev, IPW_REG_AUTOINCREMENT_DATA, *(u32 *)buf);
449
450 /* copy the last nibble */
451 dif_len = len - aligned_len;
452 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, aligned_addr);
453 for (i = 0; i < dif_len; i++, buf++)
454 write_register_byte(
455 dev, IPW_REG_INDIRECT_ACCESS_DATA + i, *buf);
456}
457
458static inline void read_nic_memory(struct net_device *dev, u32 addr, u32 len,
459 u8 *buf)
460{
461 u32 aligned_addr;
462 u32 aligned_len;
463 u32 dif_len;
464 u32 i;
465
466 /* read first nibble byte by byte */
467 aligned_addr = addr & (~0x3);
468 dif_len = addr - aligned_addr;
469 if (dif_len) {
470 /* Start reading at aligned_addr + dif_len */
471 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
472 aligned_addr);
473 for (i = dif_len; i < 4; i++, buf++)
474 read_register_byte(
475 dev, IPW_REG_INDIRECT_ACCESS_DATA + i, buf);
476
477 len -= dif_len;
478 aligned_addr += 4;
479 }
480
481 /* read DWs through autoincrement registers */
482 write_register(dev, IPW_REG_AUTOINCREMENT_ADDRESS,
483 aligned_addr);
484 aligned_len = len & (~0x3);
485 for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
486 read_register(dev, IPW_REG_AUTOINCREMENT_DATA,
487 (u32 *)buf);
488
489 /* copy the last nibble */
490 dif_len = len - aligned_len;
491 write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS,
492 aligned_addr);
493 for (i = 0; i < dif_len; i++, buf++)
494 read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA +
495 i, buf);
496}
497
498static inline int ipw2100_hw_is_adapter_in_system(struct net_device *dev)
499{
500 return (dev->base_addr &&
501 (readl((void *)(dev->base_addr + IPW_REG_DOA_DEBUG_AREA_START))
502 == IPW_DATA_DOA_DEBUG_VALUE));
503}
504
505static int ipw2100_get_ordinal(struct ipw2100_priv *priv, u32 ord,
506 void *val, u32 *len)
507{
508 struct ipw2100_ordinals *ordinals = &priv->ordinals;
509 u32 addr;
510 u32 field_info;
511 u16 field_len;
512 u16 field_count;
513 u32 total_length;
514
515 if (ordinals->table1_addr == 0) {
516 printk(KERN_WARNING DRV_NAME ": attempt to use fw ordinals "
517 "before they have been loaded.\n");
518 return -EINVAL;
519 }
520
521 if (IS_ORDINAL_TABLE_ONE(ordinals, ord)) {
522 if (*len < IPW_ORD_TAB_1_ENTRY_SIZE) {
523 *len = IPW_ORD_TAB_1_ENTRY_SIZE;
524
525 printk(KERN_WARNING DRV_NAME
526 ": ordinal buffer length too small, need %zd\n",
527 IPW_ORD_TAB_1_ENTRY_SIZE);
528
529 return -EINVAL;
530 }
531
532 read_nic_dword(priv->net_dev, ordinals->table1_addr + (ord << 2),
533 &addr);
534 read_nic_dword(priv->net_dev, addr, val);
535
536 *len = IPW_ORD_TAB_1_ENTRY_SIZE;
537
538 return 0;
539 }
540
541 if (IS_ORDINAL_TABLE_TWO(ordinals, ord)) {
542
543 ord -= IPW_START_ORD_TAB_2;
544
545 /* get the address of statistic */
546 read_nic_dword(priv->net_dev, ordinals->table2_addr + (ord << 3),
547 &addr);
548
549 /* get the second DW of statistics ;
550 * two 16-bit words - first is length, second is count */
551 read_nic_dword(priv->net_dev,
552 ordinals->table2_addr + (ord << 3) + sizeof(u32),
553 &field_info);
554
555 /* get each entry length */
556 field_len = *((u16 *)&field_info);
557
558 /* get number of entries */
559 field_count = *(((u16 *)&field_info) + 1);
560
561 /* abort if no enought memory */
562 total_length = field_len * field_count;
563 if (total_length > *len) {
564 *len = total_length;
565 return -EINVAL;
566 }
567
568 *len = total_length;
569 if (!total_length)
570 return 0;
571
572 /* read the ordinal data from the SRAM */
573 read_nic_memory(priv->net_dev, addr, total_length, val);
574
575 return 0;
576 }
577
578 printk(KERN_WARNING DRV_NAME ": ordinal %d neither in table 1 nor "
579 "in table 2\n", ord);
580
581 return -EINVAL;
582}
583
584static int ipw2100_set_ordinal(struct ipw2100_priv *priv, u32 ord, u32 *val,
585 u32 *len)
586{
587 struct ipw2100_ordinals *ordinals = &priv->ordinals;
588 u32 addr;
589
590 if (IS_ORDINAL_TABLE_ONE(ordinals, ord)) {
591 if (*len != IPW_ORD_TAB_1_ENTRY_SIZE) {
592 *len = IPW_ORD_TAB_1_ENTRY_SIZE;
593 IPW_DEBUG_INFO("wrong size\n");
594 return -EINVAL;
595 }
596
597 read_nic_dword(priv->net_dev, ordinals->table1_addr + (ord << 2),
598 &addr);
599
600 write_nic_dword(priv->net_dev, addr, *val);
601
602 *len = IPW_ORD_TAB_1_ENTRY_SIZE;
603
604 return 0;
605 }
606
607 IPW_DEBUG_INFO("wrong table\n");
608 if (IS_ORDINAL_TABLE_TWO(ordinals, ord))
609 return -EINVAL;
610
611 return -EINVAL;
612}
613
614static char *snprint_line(char *buf, size_t count,
615 const u8 *data, u32 len, u32 ofs)
616{
617 int out, i, j, l;
618 char c;
619
620 out = snprintf(buf, count, "%08X", ofs);
621
622 for (l = 0, i = 0; i < 2; i++) {
623 out += snprintf(buf + out, count - out, " ");
624 for (j = 0; j < 8 && l < len; j++, l++)
625 out += snprintf(buf + out, count - out, "%02X ",
626 data[(i * 8 + j)]);
627 for (; j < 8; j++)
628 out += snprintf(buf + out, count - out, " ");
629 }
630
631 out += snprintf(buf + out, count - out, " ");
632 for (l = 0, i = 0; i < 2; i++) {
633 out += snprintf(buf + out, count - out, " ");
634 for (j = 0; j < 8 && l < len; j++, l++) {
635 c = data[(i * 8 + j)];
636 if (!isascii(c) || !isprint(c))
637 c = '.';
638
639 out += snprintf(buf + out, count - out, "%c", c);
640 }
641
642 for (; j < 8; j++)
643 out += snprintf(buf + out, count - out, " ");
644 }
645
646 return buf;
647}
648
649static void printk_buf(int level, const u8 *data, u32 len)
650{
651 char line[81];
652 u32 ofs = 0;
653 if (!(ipw2100_debug_level & level))
654 return;
655
656 while (len) {
657 printk(KERN_DEBUG "%s\n",
658 snprint_line(line, sizeof(line), &data[ofs],
659 min(len, 16U), ofs));
660 ofs += 16;
661 len -= min(len, 16U);
662 }
663}
664
665
666
667#define MAX_RESET_BACKOFF 10
668
669static inline void schedule_reset(struct ipw2100_priv *priv)
670{
671 unsigned long now = get_seconds();
672
673 /* If we haven't received a reset request within the backoff period,
674 * then we can reset the backoff interval so this reset occurs
675 * immediately */
676 if (priv->reset_backoff &&
677 (now - priv->last_reset > priv->reset_backoff))
678 priv->reset_backoff = 0;
679
680 priv->last_reset = get_seconds();
681
682 if (!(priv->status & STATUS_RESET_PENDING)) {
683 IPW_DEBUG_INFO("%s: Scheduling firmware restart (%ds).\n",
684 priv->net_dev->name, priv->reset_backoff);
685 netif_carrier_off(priv->net_dev);
686 netif_stop_queue(priv->net_dev);
687 priv->status |= STATUS_RESET_PENDING;
688 if (priv->reset_backoff)
689 queue_delayed_work(priv->workqueue, &priv->reset_work,
690 priv->reset_backoff * HZ);
691 else
692 queue_work(priv->workqueue, &priv->reset_work);
693
694 if (priv->reset_backoff < MAX_RESET_BACKOFF)
695 priv->reset_backoff++;
696
697 wake_up_interruptible(&priv->wait_command_queue);
698 } else
699 IPW_DEBUG_INFO("%s: Firmware restart already in progress.\n",
700 priv->net_dev->name);
701
702}
703
704#define HOST_COMPLETE_TIMEOUT (2 * HZ)
705static int ipw2100_hw_send_command(struct ipw2100_priv *priv,
706 struct host_command * cmd)
707{
708 struct list_head *element;
709 struct ipw2100_tx_packet *packet;
710 unsigned long flags;
711 int err = 0;
712
713 IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n",
714 command_types[cmd->host_command], cmd->host_command,
715 cmd->host_command_length);
716 printk_buf(IPW_DL_HC, (u8*)cmd->host_command_parameters,
717 cmd->host_command_length);
718
719 spin_lock_irqsave(&priv->low_lock, flags);
720
721 if (priv->fatal_error) {
722 IPW_DEBUG_INFO("Attempt to send command while hardware in fatal error condition.\n");
723 err = -EIO;
724 goto fail_unlock;
725 }
726
727 if (!(priv->status & STATUS_RUNNING)) {
728 IPW_DEBUG_INFO("Attempt to send command while hardware is not running.\n");
729 err = -EIO;
730 goto fail_unlock;
731 }
732
733 if (priv->status & STATUS_CMD_ACTIVE) {
734 IPW_DEBUG_INFO("Attempt to send command while another command is pending.\n");
735 err = -EBUSY;
736 goto fail_unlock;
737 }
738
739 if (list_empty(&priv->msg_free_list)) {
740 IPW_DEBUG_INFO("no available msg buffers\n");
741 goto fail_unlock;
742 }
743
744 priv->status |= STATUS_CMD_ACTIVE;
745 priv->messages_sent++;
746
747 element = priv->msg_free_list.next;
748
749 packet = list_entry(element, struct ipw2100_tx_packet, list);
750 packet->jiffy_start = jiffies;
751
752 /* initialize the firmware command packet */
753 packet->info.c_struct.cmd->host_command_reg = cmd->host_command;
754 packet->info.c_struct.cmd->host_command_reg1 = cmd->host_command1;
755 packet->info.c_struct.cmd->host_command_len_reg = cmd->host_command_length;
756 packet->info.c_struct.cmd->sequence = cmd->host_command_sequence;
757
758 memcpy(packet->info.c_struct.cmd->host_command_params_reg,
759 cmd->host_command_parameters,
760 sizeof(packet->info.c_struct.cmd->host_command_params_reg));
761
762 list_del(element);
763 DEC_STAT(&priv->msg_free_stat);
764
765 list_add_tail(element, &priv->msg_pend_list);
766 INC_STAT(&priv->msg_pend_stat);
767
768 ipw2100_tx_send_commands(priv);
769 ipw2100_tx_send_data(priv);
770
771 spin_unlock_irqrestore(&priv->low_lock, flags);
772
773 /*
774 * We must wait for this command to complete before another
775 * command can be sent... but if we wait more than 3 seconds
776 * then there is a problem.
777 */
778
779 err = wait_event_interruptible_timeout(
780 priv->wait_command_queue, !(priv->status & STATUS_CMD_ACTIVE),
781 HOST_COMPLETE_TIMEOUT);
782
783 if (err == 0) {
784 IPW_DEBUG_INFO("Command completion failed out after %dms.\n",
785 HOST_COMPLETE_TIMEOUT / (HZ / 100));
786 priv->fatal_error = IPW2100_ERR_MSG_TIMEOUT;
787 priv->status &= ~STATUS_CMD_ACTIVE;
788 schedule_reset(priv);
789 return -EIO;
790 }
791
792 if (priv->fatal_error) {
793 printk(KERN_WARNING DRV_NAME ": %s: firmware fatal error\n",
794 priv->net_dev->name);
795 return -EIO;
796 }
797
798 /* !!!!! HACK TEST !!!!!
799 * When lots of debug trace statements are enabled, the driver
800 * doesn't seem to have as many firmware restart cycles...
801 *
802 * As a test, we're sticking in a 1/100s delay here */
803 set_current_state(TASK_UNINTERRUPTIBLE);
804 schedule_timeout(HZ / 100);
805
806 return 0;
807
808 fail_unlock:
809 spin_unlock_irqrestore(&priv->low_lock, flags);
810
811 return err;
812}
813
814
815/*
816 * Verify the values and data access of the hardware
817 * No locks needed or used. No functions called.
818 */
819static int ipw2100_verify(struct ipw2100_priv *priv)
820{
821 u32 data1, data2;
822 u32 address;
823
824 u32 val1 = 0x76543210;
825 u32 val2 = 0xFEDCBA98;
826
827 /* Domain 0 check - all values should be DOA_DEBUG */
828 for (address = IPW_REG_DOA_DEBUG_AREA_START;
829 address < IPW_REG_DOA_DEBUG_AREA_END;
830 address += sizeof(u32)) {
831 read_register(priv->net_dev, address, &data1);
832 if (data1 != IPW_DATA_DOA_DEBUG_VALUE)
833 return -EIO;
834 }
835
836 /* Domain 1 check - use arbitrary read/write compare */
837 for (address = 0; address < 5; address++) {
838 /* The memory area is not used now */
839 write_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x32,
840 val1);
841 write_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x36,
842 val2);
843 read_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x32,
844 &data1);
845 read_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x36,
846 &data2);
847 if (val1 == data1 && val2 == data2)
848 return 0;
849 }
850
851 return -EIO;
852}
853
854/*
855 *
856 * Loop until the CARD_DISABLED bit is the same value as the
857 * supplied parameter
858 *
859 * TODO: See if it would be more efficient to do a wait/wake
860 * cycle and have the completion event trigger the wakeup
861 *
862 */
863#define IPW_CARD_DISABLE_COMPLETE_WAIT 100 // 100 milli
864static int ipw2100_wait_for_card_state(struct ipw2100_priv *priv, int state)
865{
866 int i;
867 u32 card_state;
868 u32 len = sizeof(card_state);
869 int err;
870
871 for (i = 0; i <= IPW_CARD_DISABLE_COMPLETE_WAIT * 1000; i += 50) {
872 err = ipw2100_get_ordinal(priv, IPW_ORD_CARD_DISABLED,
873 &card_state, &len);
874 if (err) {
875 IPW_DEBUG_INFO("Query of CARD_DISABLED ordinal "
876 "failed.\n");
877 return 0;
878 }
879
880 /* We'll break out if either the HW state says it is
881 * in the state we want, or if HOST_COMPLETE command
882 * finishes */
883 if ((card_state == state) ||
884 ((priv->status & STATUS_ENABLED) ?
885 IPW_HW_STATE_ENABLED : IPW_HW_STATE_DISABLED) == state) {
886 if (state == IPW_HW_STATE_ENABLED)
887 priv->status |= STATUS_ENABLED;
888 else
889 priv->status &= ~STATUS_ENABLED;
890
891 return 0;
892 }
893
894 udelay(50);
895 }
896
897 IPW_DEBUG_INFO("ipw2100_wait_for_card_state to %s state timed out\n",
898 state ? "DISABLED" : "ENABLED");
899 return -EIO;
900}
901
902
903/*********************************************************************
904 Procedure : sw_reset_and_clock
905 Purpose : Asserts s/w reset, asserts clock initialization
906 and waits for clock stabilization
907 ********************************************************************/
908static int sw_reset_and_clock(struct ipw2100_priv *priv)
909{
910 int i;
911 u32 r;
912
913 // assert s/w reset
914 write_register(priv->net_dev, IPW_REG_RESET_REG,
915 IPW_AUX_HOST_RESET_REG_SW_RESET);
916
917 // wait for clock stabilization
918 for (i = 0; i < 1000; i++) {
919 udelay(IPW_WAIT_RESET_ARC_COMPLETE_DELAY);
920
921 // check clock ready bit
922 read_register(priv->net_dev, IPW_REG_RESET_REG, &r);
923 if (r & IPW_AUX_HOST_RESET_REG_PRINCETON_RESET)
924 break;
925 }
926
927 if (i == 1000)
928 return -EIO; // TODO: better error value
929
930 /* set "initialization complete" bit to move adapter to
931 * D0 state */
932 write_register(priv->net_dev, IPW_REG_GP_CNTRL,
933 IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE);
934
935 /* wait for clock stabilization */
936 for (i = 0; i < 10000; i++) {
937 udelay(IPW_WAIT_CLOCK_STABILIZATION_DELAY * 4);
938
939 /* check clock ready bit */
940 read_register(priv->net_dev, IPW_REG_GP_CNTRL, &r);
941 if (r & IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY)
942 break;
943 }
944
945 if (i == 10000)
946 return -EIO; /* TODO: better error value */
947
948 /* set D0 standby bit */
949 read_register(priv->net_dev, IPW_REG_GP_CNTRL, &r);
950 write_register(priv->net_dev, IPW_REG_GP_CNTRL,
951 r | IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY);
952
953 return 0;
954}
955
956/*********************************************************************
957 Procedure : ipw2100_download_firmware
958 Purpose : Initiaze adapter after power on.
959 The sequence is:
960 1. assert s/w reset first!
961 2. awake clocks & wait for clock stabilization
962 3. hold ARC (don't ask me why...)
963 4. load Dino ucode and reset/clock init again
964 5. zero-out shared mem
965 6. download f/w
966 *******************************************************************/
967static int ipw2100_download_firmware(struct ipw2100_priv *priv)
968{
969 u32 address;
970 int err;
971
972#ifndef CONFIG_PM
973 /* Fetch the firmware and microcode */
974 struct ipw2100_fw ipw2100_firmware;
975#endif
976
977 if (priv->fatal_error) {
978 IPW_DEBUG_ERROR("%s: ipw2100_download_firmware called after "
979 "fatal error %d. Interface must be brought down.\n",
980 priv->net_dev->name, priv->fatal_error);
981 return -EINVAL;
982 }
983
984#ifdef CONFIG_PM
985 if (!ipw2100_firmware.version) {
986 err = ipw2100_get_firmware(priv, &ipw2100_firmware);
987 if (err) {
988 IPW_DEBUG_ERROR("%s: ipw2100_get_firmware failed: %d\n",
989 priv->net_dev->name, err);
990 priv->fatal_error = IPW2100_ERR_FW_LOAD;
991 goto fail;
992 }
993 }
994#else
995 err = ipw2100_get_firmware(priv, &ipw2100_firmware);
996 if (err) {
997 IPW_DEBUG_ERROR("%s: ipw2100_get_firmware failed: %d\n",
998 priv->net_dev->name, err);
999 priv->fatal_error = IPW2100_ERR_FW_LOAD;
1000 goto fail;
1001 }
1002#endif
1003 priv->firmware_version = ipw2100_firmware.version;
1004
1005 /* s/w reset and clock stabilization */
1006 err = sw_reset_and_clock(priv);
1007 if (err) {
1008 IPW_DEBUG_ERROR("%s: sw_reset_and_clock failed: %d\n",
1009 priv->net_dev->name, err);
1010 goto fail;
1011 }
1012
1013 err = ipw2100_verify(priv);
1014 if (err) {
1015 IPW_DEBUG_ERROR("%s: ipw2100_verify failed: %d\n",
1016 priv->net_dev->name, err);
1017 goto fail;
1018 }
1019
1020 /* Hold ARC */
1021 write_nic_dword(priv->net_dev,
1022 IPW_INTERNAL_REGISTER_HALT_AND_RESET,
1023 0x80000000);
1024
1025 /* allow ARC to run */
1026 write_register(priv->net_dev, IPW_REG_RESET_REG, 0);
1027
1028 /* load microcode */
1029 err = ipw2100_ucode_download(priv, &ipw2100_firmware);
1030 if (err) {
1031 printk(KERN_ERR DRV_NAME ": %s: Error loading microcode: %d\n",
1032 priv->net_dev->name, err);
1033 goto fail;
1034 }
1035
1036 /* release ARC */
1037 write_nic_dword(priv->net_dev,
1038 IPW_INTERNAL_REGISTER_HALT_AND_RESET,
1039 0x00000000);
1040
1041 /* s/w reset and clock stabilization (again!!!) */
1042 err = sw_reset_and_clock(priv);
1043 if (err) {
1044 printk(KERN_ERR DRV_NAME ": %s: sw_reset_and_clock failed: %d\n",
1045 priv->net_dev->name, err);
1046 goto fail;
1047 }
1048
1049 /* load f/w */
1050 err = ipw2100_fw_download(priv, &ipw2100_firmware);
1051 if (err) {
1052 IPW_DEBUG_ERROR("%s: Error loading firmware: %d\n",
1053 priv->net_dev->name, err);
1054 goto fail;
1055 }
1056
1057#ifndef CONFIG_PM
1058 /*
1059 * When the .resume method of the driver is called, the other
1060 * part of the system, i.e. the ide driver could still stay in
1061 * the suspend stage. This prevents us from loading the firmware
1062 * from the disk. --YZ
1063 */
1064
1065 /* free any storage allocated for firmware image */
1066 ipw2100_release_firmware(priv, &ipw2100_firmware);
1067#endif
1068
1069 /* zero out Domain 1 area indirectly (Si requirement) */
1070 for (address = IPW_HOST_FW_SHARED_AREA0;
1071 address < IPW_HOST_FW_SHARED_AREA0_END; address += 4)
1072 write_nic_dword(priv->net_dev, address, 0);
1073 for (address = IPW_HOST_FW_SHARED_AREA1;
1074 address < IPW_HOST_FW_SHARED_AREA1_END; address += 4)
1075 write_nic_dword(priv->net_dev, address, 0);
1076 for (address = IPW_HOST_FW_SHARED_AREA2;
1077 address < IPW_HOST_FW_SHARED_AREA2_END; address += 4)
1078 write_nic_dword(priv->net_dev, address, 0);
1079 for (address = IPW_HOST_FW_SHARED_AREA3;
1080 address < IPW_HOST_FW_SHARED_AREA3_END; address += 4)
1081 write_nic_dword(priv->net_dev, address, 0);
1082 for (address = IPW_HOST_FW_INTERRUPT_AREA;
1083 address < IPW_HOST_FW_INTERRUPT_AREA_END; address += 4)
1084 write_nic_dword(priv->net_dev, address, 0);
1085
1086 return 0;
1087
1088 fail:
1089 ipw2100_release_firmware(priv, &ipw2100_firmware);
1090 return err;
1091}
1092
1093static inline void ipw2100_enable_interrupts(struct ipw2100_priv *priv)
1094{
1095 if (priv->status & STATUS_INT_ENABLED)
1096 return;
1097 priv->status |= STATUS_INT_ENABLED;
1098 write_register(priv->net_dev, IPW_REG_INTA_MASK, IPW_INTERRUPT_MASK);
1099}
1100
1101static inline void ipw2100_disable_interrupts(struct ipw2100_priv *priv)
1102{
1103 if (!(priv->status & STATUS_INT_ENABLED))
1104 return;
1105 priv->status &= ~STATUS_INT_ENABLED;
1106 write_register(priv->net_dev, IPW_REG_INTA_MASK, 0x0);
1107}
1108
1109
1110static void ipw2100_initialize_ordinals(struct ipw2100_priv *priv)
1111{
1112 struct ipw2100_ordinals *ord = &priv->ordinals;
1113
1114 IPW_DEBUG_INFO("enter\n");
1115
1116 read_register(priv->net_dev, IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1,
1117 &ord->table1_addr);
1118
1119 read_register(priv->net_dev, IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2,
1120 &ord->table2_addr);
1121
1122 read_nic_dword(priv->net_dev, ord->table1_addr, &ord->table1_size);
1123 read_nic_dword(priv->net_dev, ord->table2_addr, &ord->table2_size);
1124
1125 ord->table2_size &= 0x0000FFFF;
1126
1127 IPW_DEBUG_INFO("table 1 size: %d\n", ord->table1_size);
1128 IPW_DEBUG_INFO("table 2 size: %d\n", ord->table2_size);
1129 IPW_DEBUG_INFO("exit\n");
1130}
1131
1132static inline void ipw2100_hw_set_gpio(struct ipw2100_priv *priv)
1133{
1134 u32 reg = 0;
1135 /*
1136 * Set GPIO 3 writable by FW; GPIO 1 writable
1137 * by driver and enable clock
1138 */
1139 reg = (IPW_BIT_GPIO_GPIO3_MASK | IPW_BIT_GPIO_GPIO1_ENABLE |
1140 IPW_BIT_GPIO_LED_OFF);
1141 write_register(priv->net_dev, IPW_REG_GPIO, reg);
1142}
1143
1144static inline int rf_kill_active(struct ipw2100_priv *priv)
1145{
1146#define MAX_RF_KILL_CHECKS 5
1147#define RF_KILL_CHECK_DELAY 40
1148
1149 unsigned short value = 0;
1150 u32 reg = 0;
1151 int i;
1152
1153 if (!(priv->hw_features & HW_FEATURE_RFKILL)) {
1154 priv->status &= ~STATUS_RF_KILL_HW;
1155 return 0;
1156 }
1157
1158 for (i = 0; i < MAX_RF_KILL_CHECKS; i++) {
1159 udelay(RF_KILL_CHECK_DELAY);
1160 read_register(priv->net_dev, IPW_REG_GPIO, &reg);
1161 value = (value << 1) | ((reg & IPW_BIT_GPIO_RF_KILL) ? 0 : 1);
1162 }
1163
1164 if (value == 0)
1165 priv->status |= STATUS_RF_KILL_HW;
1166 else
1167 priv->status &= ~STATUS_RF_KILL_HW;
1168
1169 return (value == 0);
1170}
1171
1172static int ipw2100_get_hw_features(struct ipw2100_priv *priv)
1173{
1174 u32 addr, len;
1175 u32 val;
1176
1177 /*
1178 * EEPROM_SRAM_DB_START_ADDRESS using ordinal in ordinal table 1
1179 */
1180 len = sizeof(addr);
1181 if (ipw2100_get_ordinal(
1182 priv, IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS,
1183 &addr, &len)) {
1184 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
1185 __LINE__);
1186 return -EIO;
1187 }
1188
1189 IPW_DEBUG_INFO("EEPROM address: %08X\n", addr);
1190
1191 /*
1192 * EEPROM version is the byte at offset 0xfd in firmware
1193 * We read 4 bytes, then shift out the byte we actually want */
1194 read_nic_dword(priv->net_dev, addr + 0xFC, &val);
1195 priv->eeprom_version = (val >> 24) & 0xFF;
1196 IPW_DEBUG_INFO("EEPROM version: %d\n", priv->eeprom_version);
1197
1198 /*
1199 * HW RF Kill enable is bit 0 in byte at offset 0x21 in firmware
1200 *
1201 * notice that the EEPROM bit is reverse polarity, i.e.
1202 * bit = 0 signifies HW RF kill switch is supported
1203 * bit = 1 signifies HW RF kill switch is NOT supported
1204 */
1205 read_nic_dword(priv->net_dev, addr + 0x20, &val);
1206 if (!((val >> 24) & 0x01))
1207 priv->hw_features |= HW_FEATURE_RFKILL;
1208
1209 IPW_DEBUG_INFO("HW RF Kill: %ssupported.\n",
1210 (priv->hw_features & HW_FEATURE_RFKILL) ?
1211 "" : "not ");
1212
1213 return 0;
1214}
1215
1216/*
1217 * Start firmware execution after power on and intialization
1218 * The sequence is:
1219 * 1. Release ARC
1220 * 2. Wait for f/w initialization completes;
1221 */
1222static int ipw2100_start_adapter(struct ipw2100_priv *priv)
1223{
1224 int i;
1225 u32 inta, inta_mask, gpio;
1226
1227 IPW_DEBUG_INFO("enter\n");
1228
1229 if (priv->status & STATUS_RUNNING)
1230 return 0;
1231
1232 /*
1233 * Initialize the hw - drive adapter to DO state by setting
1234 * init_done bit. Wait for clk_ready bit and Download
1235 * fw & dino ucode
1236 */
1237 if (ipw2100_download_firmware(priv)) {
1238 printk(KERN_ERR DRV_NAME ": %s: Failed to power on the adapter.\n",
1239 priv->net_dev->name);
1240 return -EIO;
1241 }
1242
1243 /* Clear the Tx, Rx and Msg queues and the r/w indexes
1244 * in the firmware RBD and TBD ring queue */
1245 ipw2100_queues_initialize(priv);
1246
1247 ipw2100_hw_set_gpio(priv);
1248
1249 /* TODO -- Look at disabling interrupts here to make sure none
1250 * get fired during FW initialization */
1251
1252 /* Release ARC - clear reset bit */
1253 write_register(priv->net_dev, IPW_REG_RESET_REG, 0);
1254
1255 /* wait for f/w intialization complete */
1256 IPW_DEBUG_FW("Waiting for f/w initialization to complete...\n");
1257 i = 5000;
1258 do {
1259 set_current_state(TASK_UNINTERRUPTIBLE);
1260 schedule_timeout(40 * HZ / 1000);
1261 /* Todo... wait for sync command ... */
1262
1263 read_register(priv->net_dev, IPW_REG_INTA, &inta);
1264
1265 /* check "init done" bit */
1266 if (inta & IPW2100_INTA_FW_INIT_DONE) {
1267 /* reset "init done" bit */
1268 write_register(priv->net_dev, IPW_REG_INTA,
1269 IPW2100_INTA_FW_INIT_DONE);
1270 break;
1271 }
1272
1273 /* check error conditions : we check these after the firmware
1274 * check so that if there is an error, the interrupt handler
1275 * will see it and the adapter will be reset */
1276 if (inta &
1277 (IPW2100_INTA_FATAL_ERROR | IPW2100_INTA_PARITY_ERROR)) {
1278 /* clear error conditions */
1279 write_register(priv->net_dev, IPW_REG_INTA,
1280 IPW2100_INTA_FATAL_ERROR |
1281 IPW2100_INTA_PARITY_ERROR);
1282 }
1283 } while (i--);
1284
1285 /* Clear out any pending INTAs since we aren't supposed to have
1286 * interrupts enabled at this point... */
1287 read_register(priv->net_dev, IPW_REG_INTA, &inta);
1288 read_register(priv->net_dev, IPW_REG_INTA_MASK, &inta_mask);
1289 inta &= IPW_INTERRUPT_MASK;
1290 /* Clear out any pending interrupts */
1291 if (inta & inta_mask)
1292 write_register(priv->net_dev, IPW_REG_INTA, inta);
1293
1294 IPW_DEBUG_FW("f/w initialization complete: %s\n",
1295 i ? "SUCCESS" : "FAILED");
1296
1297 if (!i) {
1298 printk(KERN_WARNING DRV_NAME ": %s: Firmware did not initialize.\n",
1299 priv->net_dev->name);
1300 return -EIO;
1301 }
1302
1303 /* allow firmware to write to GPIO1 & GPIO3 */
1304 read_register(priv->net_dev, IPW_REG_GPIO, &gpio);
1305
1306 gpio |= (IPW_BIT_GPIO_GPIO1_MASK | IPW_BIT_GPIO_GPIO3_MASK);
1307
1308 write_register(priv->net_dev, IPW_REG_GPIO, gpio);
1309
1310 /* Ready to receive commands */
1311 priv->status |= STATUS_RUNNING;
1312
1313 /* The adapter has been reset; we are not associated */
1314 priv->status &= ~(STATUS_ASSOCIATING | STATUS_ASSOCIATED);
1315
1316 IPW_DEBUG_INFO("exit\n");
1317
1318 return 0;
1319}
1320
1321static inline void ipw2100_reset_fatalerror(struct ipw2100_priv *priv)
1322{
1323 if (!priv->fatal_error)
1324 return;
1325
1326 priv->fatal_errors[priv->fatal_index++] = priv->fatal_error;
1327 priv->fatal_index %= IPW2100_ERROR_QUEUE;
1328 priv->fatal_error = 0;
1329}
1330
1331
1332/* NOTE: Our interrupt is disabled when this method is called */
1333static int ipw2100_power_cycle_adapter(struct ipw2100_priv *priv)
1334{
1335 u32 reg;
1336 int i;
1337
1338 IPW_DEBUG_INFO("Power cycling the hardware.\n");
1339
1340 ipw2100_hw_set_gpio(priv);
1341
1342 /* Step 1. Stop Master Assert */
1343 write_register(priv->net_dev, IPW_REG_RESET_REG,
1344 IPW_AUX_HOST_RESET_REG_STOP_MASTER);
1345
1346 /* Step 2. Wait for stop Master Assert
1347 * (not more then 50us, otherwise ret error */
1348 i = 5;
1349 do {
1350 udelay(IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY);
1351 read_register(priv->net_dev, IPW_REG_RESET_REG, &reg);
1352
1353 if (reg & IPW_AUX_HOST_RESET_REG_MASTER_DISABLED)
1354 break;
1355 } while(i--);
1356
1357 priv->status &= ~STATUS_RESET_PENDING;
1358
1359 if (!i) {
1360 IPW_DEBUG_INFO("exit - waited too long for master assert stop\n");
1361 return -EIO;
1362 }
1363
1364 write_register(priv->net_dev, IPW_REG_RESET_REG,
1365 IPW_AUX_HOST_RESET_REG_SW_RESET);
1366
1367
1368 /* Reset any fatal_error conditions */
1369 ipw2100_reset_fatalerror(priv);
1370
1371 /* At this point, the adapter is now stopped and disabled */
1372 priv->status &= ~(STATUS_RUNNING | STATUS_ASSOCIATING |
1373 STATUS_ASSOCIATED | STATUS_ENABLED);
1374
1375 return 0;
1376}
1377
1378/*
1379 * Send the CARD_DISABLE_PHY_OFF comamnd to the card to disable it
1380 *
1381 * After disabling, if the card was associated, a STATUS_ASSN_LOST will be sent.
1382 *
1383 * STATUS_CARD_DISABLE_NOTIFICATION will be sent regardless of
1384 * if STATUS_ASSN_LOST is sent.
1385 */
1386static int ipw2100_hw_phy_off(struct ipw2100_priv *priv)
1387{
1388
1389#define HW_PHY_OFF_LOOP_DELAY (HZ / 5000)
1390
1391 struct host_command cmd = {
1392 .host_command = CARD_DISABLE_PHY_OFF,
1393 .host_command_sequence = 0,
1394 .host_command_length = 0,
1395 };
1396 int err, i;
1397 u32 val1, val2;
1398
1399 IPW_DEBUG_HC("CARD_DISABLE_PHY_OFF\n");
1400
1401 /* Turn off the radio */
1402 err = ipw2100_hw_send_command(priv, &cmd);
1403 if (err)
1404 return err;
1405
1406 for (i = 0; i < 2500; i++) {
1407 read_nic_dword(priv->net_dev, IPW2100_CONTROL_REG, &val1);
1408 read_nic_dword(priv->net_dev, IPW2100_COMMAND, &val2);
1409
1410 if ((val1 & IPW2100_CONTROL_PHY_OFF) &&
1411 (val2 & IPW2100_COMMAND_PHY_OFF))
1412 return 0;
1413
1414 set_current_state(TASK_UNINTERRUPTIBLE);
1415 schedule_timeout(HW_PHY_OFF_LOOP_DELAY);
1416 }
1417
1418 return -EIO;
1419}
1420
1421
1422static int ipw2100_enable_adapter(struct ipw2100_priv *priv)
1423{
1424 struct host_command cmd = {
1425 .host_command = HOST_COMPLETE,
1426 .host_command_sequence = 0,
1427 .host_command_length = 0
1428 };
1429 int err = 0;
1430
1431 IPW_DEBUG_HC("HOST_COMPLETE\n");
1432
1433 if (priv->status & STATUS_ENABLED)
1434 return 0;
1435
1436 down(&priv->adapter_sem);
1437
1438 if (rf_kill_active(priv)) {
1439 IPW_DEBUG_HC("Command aborted due to RF kill active.\n");
1440 goto fail_up;
1441 }
1442
1443 err = ipw2100_hw_send_command(priv, &cmd);
1444 if (err) {
1445 IPW_DEBUG_INFO("Failed to send HOST_COMPLETE command\n");
1446 goto fail_up;
1447 }
1448
1449 err = ipw2100_wait_for_card_state(priv, IPW_HW_STATE_ENABLED);
1450 if (err) {
1451 IPW_DEBUG_INFO(
1452 "%s: card not responding to init command.\n",
1453 priv->net_dev->name);
1454 goto fail_up;
1455 }
1456
1457 if (priv->stop_hang_check) {
1458 priv->stop_hang_check = 0;
1459 queue_delayed_work(priv->workqueue, &priv->hang_check, HZ / 2);
1460 }
1461
1462fail_up:
1463 up(&priv->adapter_sem);
1464 return err;
1465}
1466
1467static int ipw2100_hw_stop_adapter(struct ipw2100_priv *priv)
1468{
1469#define HW_POWER_DOWN_DELAY (HZ / 10)
1470
1471 struct host_command cmd = {
1472 .host_command = HOST_PRE_POWER_DOWN,
1473 .host_command_sequence = 0,
1474 .host_command_length = 0,
1475 };
1476 int err, i;
1477 u32 reg;
1478
1479 if (!(priv->status & STATUS_RUNNING))
1480 return 0;
1481
1482 priv->status |= STATUS_STOPPING;
1483
1484 /* We can only shut down the card if the firmware is operational. So,
1485 * if we haven't reset since a fatal_error, then we can not send the
1486 * shutdown commands. */
1487 if (!priv->fatal_error) {
1488 /* First, make sure the adapter is enabled so that the PHY_OFF
1489 * command can shut it down */
1490 ipw2100_enable_adapter(priv);
1491
1492 err = ipw2100_hw_phy_off(priv);
1493 if (err)
1494 printk(KERN_WARNING DRV_NAME ": Error disabling radio %d\n", err);
1495
1496 /*
1497 * If in D0-standby mode going directly to D3 may cause a
1498 * PCI bus violation. Therefore we must change out of the D0
1499 * state.
1500 *
1501 * Sending the PREPARE_FOR_POWER_DOWN will restrict the
1502 * hardware from going into standby mode and will transition
1503 * out of D0-standy if it is already in that state.
1504 *
1505 * STATUS_PREPARE_POWER_DOWN_COMPLETE will be sent by the
1506 * driver upon completion. Once received, the driver can
1507 * proceed to the D3 state.
1508 *
1509 * Prepare for power down command to fw. This command would
1510 * take HW out of D0-standby and prepare it for D3 state.
1511 *
1512 * Currently FW does not support event notification for this
1513 * event. Therefore, skip waiting for it. Just wait a fixed
1514 * 100ms
1515 */
1516 IPW_DEBUG_HC("HOST_PRE_POWER_DOWN\n");
1517
1518 err = ipw2100_hw_send_command(priv, &cmd);
1519 if (err)
1520 printk(KERN_WARNING DRV_NAME ": "
1521 "%s: Power down command failed: Error %d\n",
1522 priv->net_dev->name, err);
1523 else {
1524 set_current_state(TASK_UNINTERRUPTIBLE);
1525 schedule_timeout(HW_POWER_DOWN_DELAY);
1526 }
1527 }
1528
1529 priv->status &= ~STATUS_ENABLED;
1530
1531 /*
1532 * Set GPIO 3 writable by FW; GPIO 1 writable
1533 * by driver and enable clock
1534 */
1535 ipw2100_hw_set_gpio(priv);
1536
1537 /*
1538 * Power down adapter. Sequence:
1539 * 1. Stop master assert (RESET_REG[9]=1)
1540 * 2. Wait for stop master (RESET_REG[8]==1)
1541 * 3. S/w reset assert (RESET_REG[7] = 1)
1542 */
1543
1544 /* Stop master assert */
1545 write_register(priv->net_dev, IPW_REG_RESET_REG,
1546 IPW_AUX_HOST_RESET_REG_STOP_MASTER);
1547
1548 /* wait stop master not more than 50 usec.
1549 * Otherwise return error. */
1550 for (i = 5; i > 0; i--) {
1551 udelay(10);
1552
1553 /* Check master stop bit */
1554 read_register(priv->net_dev, IPW_REG_RESET_REG, &reg);
1555
1556 if (reg & IPW_AUX_HOST_RESET_REG_MASTER_DISABLED)
1557 break;
1558 }
1559
1560 if (i == 0)
1561 printk(KERN_WARNING DRV_NAME
1562 ": %s: Could now power down adapter.\n",
1563 priv->net_dev->name);
1564
1565 /* assert s/w reset */
1566 write_register(priv->net_dev, IPW_REG_RESET_REG,
1567 IPW_AUX_HOST_RESET_REG_SW_RESET);
1568
1569 priv->status &= ~(STATUS_RUNNING | STATUS_STOPPING);
1570
1571 return 0;
1572}
1573
1574
1575static int ipw2100_disable_adapter(struct ipw2100_priv *priv)
1576{
1577 struct host_command cmd = {
1578 .host_command = CARD_DISABLE,
1579 .host_command_sequence = 0,
1580 .host_command_length = 0
1581 };
1582 int err = 0;
1583
1584 IPW_DEBUG_HC("CARD_DISABLE\n");
1585
1586 if (!(priv->status & STATUS_ENABLED))
1587 return 0;
1588
1589 /* Make sure we clear the associated state */
1590 priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING);
1591
1592 if (!priv->stop_hang_check) {
1593 priv->stop_hang_check = 1;
1594 cancel_delayed_work(&priv->hang_check);
1595 }
1596
1597 down(&priv->adapter_sem);
1598
1599 err = ipw2100_hw_send_command(priv, &cmd);
1600 if (err) {
1601 printk(KERN_WARNING DRV_NAME ": exit - failed to send CARD_DISABLE command\n");
1602 goto fail_up;
1603 }
1604
1605 err = ipw2100_wait_for_card_state(priv, IPW_HW_STATE_DISABLED);
1606 if (err) {
1607 printk(KERN_WARNING DRV_NAME ": exit - card failed to change to DISABLED\n");
1608 goto fail_up;
1609 }
1610
1611 IPW_DEBUG_INFO("TODO: implement scan state machine\n");
1612
1613fail_up:
1614 up(&priv->adapter_sem);
1615 return err;
1616}
1617
1618static int ipw2100_set_scan_options(struct ipw2100_priv *priv)
1619{
1620 struct host_command cmd = {
1621 .host_command = SET_SCAN_OPTIONS,
1622 .host_command_sequence = 0,
1623 .host_command_length = 8
1624 };
1625 int err;
1626
1627 IPW_DEBUG_INFO("enter\n");
1628
1629 IPW_DEBUG_SCAN("setting scan options\n");
1630
1631 cmd.host_command_parameters[0] = 0;
1632
1633 if (!(priv->config & CFG_ASSOCIATE))
1634 cmd.host_command_parameters[0] |= IPW_SCAN_NOASSOCIATE;
1635 if ((priv->sec.flags & SEC_ENABLED) && priv->sec.enabled)
1636 cmd.host_command_parameters[0] |= IPW_SCAN_MIXED_CELL;
1637 if (priv->config & CFG_PASSIVE_SCAN)
1638 cmd.host_command_parameters[0] |= IPW_SCAN_PASSIVE;
1639
1640 cmd.host_command_parameters[1] = priv->channel_mask;
1641
1642 err = ipw2100_hw_send_command(priv, &cmd);
1643
1644 IPW_DEBUG_HC("SET_SCAN_OPTIONS 0x%04X\n",
1645 cmd.host_command_parameters[0]);
1646
1647 return err;
1648}
1649
1650static int ipw2100_start_scan(struct ipw2100_priv *priv)
1651{
1652 struct host_command cmd = {
1653 .host_command = BROADCAST_SCAN,
1654 .host_command_sequence = 0,
1655 .host_command_length = 4
1656 };
1657 int err;
1658
1659 IPW_DEBUG_HC("START_SCAN\n");
1660
1661 cmd.host_command_parameters[0] = 0;
1662
1663 /* No scanning if in monitor mode */
1664 if (priv->ieee->iw_mode == IW_MODE_MONITOR)
1665 return 1;
1666
1667 if (priv->status & STATUS_SCANNING) {
1668 IPW_DEBUG_SCAN("Scan requested while already in scan...\n");
1669 return 0;
1670 }
1671
1672 IPW_DEBUG_INFO("enter\n");
1673
1674 /* Not clearing here; doing so makes iwlist always return nothing...
1675 *
1676 * We should modify the table logic to use aging tables vs. clearing
1677 * the table on each scan start.
1678 */
1679 IPW_DEBUG_SCAN("starting scan\n");
1680
1681 priv->status |= STATUS_SCANNING;
1682 err = ipw2100_hw_send_command(priv, &cmd);
1683 if (err)
1684 priv->status &= ~STATUS_SCANNING;
1685
1686 IPW_DEBUG_INFO("exit\n");
1687
1688 return err;
1689}
1690
1691static int ipw2100_up(struct ipw2100_priv *priv, int deferred)
1692{
1693 unsigned long flags;
1694 int rc = 0;
1695 u32 lock;
1696 u32 ord_len = sizeof(lock);
1697
1698 /* Quite if manually disabled. */
1699 if (priv->status & STATUS_RF_KILL_SW) {
1700 IPW_DEBUG_INFO("%s: Radio is disabled by Manual Disable "
1701 "switch\n", priv->net_dev->name);
1702 return 0;
1703 }
1704
1705 /* If the interrupt is enabled, turn it off... */
1706 spin_lock_irqsave(&priv->low_lock, flags);
1707 ipw2100_disable_interrupts(priv);
1708
1709 /* Reset any fatal_error conditions */
1710 ipw2100_reset_fatalerror(priv);
1711 spin_unlock_irqrestore(&priv->low_lock, flags);
1712
1713 if (priv->status & STATUS_POWERED ||
1714 (priv->status & STATUS_RESET_PENDING)) {
1715 /* Power cycle the card ... */
1716 if (ipw2100_power_cycle_adapter(priv)) {
1717 printk(KERN_WARNING DRV_NAME ": %s: Could not cycle adapter.\n",
1718 priv->net_dev->name);
1719 rc = 1;
1720 goto exit;
1721 }
1722 } else
1723 priv->status |= STATUS_POWERED;
1724
1725 /* Load the firmware, start the clocks, etc. */
1726 if (ipw2100_start_adapter(priv)) {
1727 printk(KERN_ERR DRV_NAME ": %s: Failed to start the firmware.\n",
1728 priv->net_dev->name);
1729 rc = 1;
1730 goto exit;
1731 }
1732
1733 ipw2100_initialize_ordinals(priv);
1734
1735 /* Determine capabilities of this particular HW configuration */
1736 if (ipw2100_get_hw_features(priv)) {
1737 printk(KERN_ERR DRV_NAME ": %s: Failed to determine HW features.\n",
1738 priv->net_dev->name);
1739 rc = 1;
1740 goto exit;
1741 }
1742
1743 lock = LOCK_NONE;
1744 if (ipw2100_set_ordinal(priv, IPW_ORD_PERS_DB_LOCK, &lock, &ord_len)) {
1745 printk(KERN_ERR DRV_NAME ": %s: Failed to clear ordinal lock.\n",
1746 priv->net_dev->name);
1747 rc = 1;
1748 goto exit;
1749 }
1750
1751 priv->status &= ~STATUS_SCANNING;
1752
1753 if (rf_kill_active(priv)) {
1754 printk(KERN_INFO "%s: Radio is disabled by RF switch.\n",
1755 priv->net_dev->name);
1756
1757 if (priv->stop_rf_kill) {
1758 priv->stop_rf_kill = 0;
1759 queue_delayed_work(priv->workqueue, &priv->rf_kill, HZ);
1760 }
1761
1762 deferred = 1;
1763 }
1764
1765 /* Turn on the interrupt so that commands can be processed */
1766 ipw2100_enable_interrupts(priv);
1767
1768 /* Send all of the commands that must be sent prior to
1769 * HOST_COMPLETE */
1770 if (ipw2100_adapter_setup(priv)) {
1771 printk(KERN_ERR DRV_NAME ": %s: Failed to start the card.\n",
1772 priv->net_dev->name);
1773 rc = 1;
1774 goto exit;
1775 }
1776
1777 if (!deferred) {
1778 /* Enable the adapter - sends HOST_COMPLETE */
1779 if (ipw2100_enable_adapter(priv)) {
1780 printk(KERN_ERR DRV_NAME ": "
1781 "%s: failed in call to enable adapter.\n",
1782 priv->net_dev->name);
1783 ipw2100_hw_stop_adapter(priv);
1784 rc = 1;
1785 goto exit;
1786 }
1787
1788
1789 /* Start a scan . . . */
1790 ipw2100_set_scan_options(priv);
1791 ipw2100_start_scan(priv);
1792 }
1793
1794 exit:
1795 return rc;
1796}
1797
1798/* Called by register_netdev() */
1799static int ipw2100_net_init(struct net_device *dev)
1800{
1801 struct ipw2100_priv *priv = ieee80211_priv(dev);
1802 return ipw2100_up(priv, 1);
1803}
1804
1805static void ipw2100_down(struct ipw2100_priv *priv)
1806{
1807 unsigned long flags;
1808 union iwreq_data wrqu = {
1809 .ap_addr = {
1810 .sa_family = ARPHRD_ETHER
1811 }
1812 };
1813 int associated = priv->status & STATUS_ASSOCIATED;
1814
1815 /* Kill the RF switch timer */
1816 if (!priv->stop_rf_kill) {
1817 priv->stop_rf_kill = 1;
1818 cancel_delayed_work(&priv->rf_kill);
1819 }
1820
1821 /* Kill the firmare hang check timer */
1822 if (!priv->stop_hang_check) {
1823 priv->stop_hang_check = 1;
1824 cancel_delayed_work(&priv->hang_check);
1825 }
1826
1827 /* Kill any pending resets */
1828 if (priv->status & STATUS_RESET_PENDING)
1829 cancel_delayed_work(&priv->reset_work);
1830
1831 /* Make sure the interrupt is on so that FW commands will be
1832 * processed correctly */
1833 spin_lock_irqsave(&priv->low_lock, flags);
1834 ipw2100_enable_interrupts(priv);
1835 spin_unlock_irqrestore(&priv->low_lock, flags);
1836
1837 if (ipw2100_hw_stop_adapter(priv))
1838 printk(KERN_ERR DRV_NAME ": %s: Error stopping adapter.\n",
1839 priv->net_dev->name);
1840
1841 /* Do not disable the interrupt until _after_ we disable
1842 * the adaptor. Otherwise the CARD_DISABLE command will never
1843 * be ack'd by the firmware */
1844 spin_lock_irqsave(&priv->low_lock, flags);
1845 ipw2100_disable_interrupts(priv);
1846 spin_unlock_irqrestore(&priv->low_lock, flags);
1847
1848#ifdef ACPI_CSTATE_LIMIT_DEFINED
1849 if (priv->config & CFG_C3_DISABLED) {
1850 IPW_DEBUG_INFO(DRV_NAME ": Resetting C3 transitions.\n");
1851 acpi_set_cstate_limit(priv->cstate_limit);
1852 priv->config &= ~CFG_C3_DISABLED;
1853 }
1854#endif
1855
1856 /* We have to signal any supplicant if we are disassociating */
1857 if (associated)
1858 wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL);
1859
1860 priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING);
1861 netif_carrier_off(priv->net_dev);
1862 netif_stop_queue(priv->net_dev);
1863}
1864
1865static void ipw2100_reset_adapter(struct ipw2100_priv *priv)
1866{
1867 unsigned long flags;
1868 union iwreq_data wrqu = {
1869 .ap_addr = {
1870 .sa_family = ARPHRD_ETHER
1871 }
1872 };
1873 int associated = priv->status & STATUS_ASSOCIATED;
1874
1875 spin_lock_irqsave(&priv->low_lock, flags);
1876 IPW_DEBUG_INFO(DRV_NAME ": %s: Restarting adapter.\n",
1877 priv->net_dev->name);
1878 priv->resets++;
1879 priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING);
1880 priv->status |= STATUS_SECURITY_UPDATED;
1881
1882 /* Force a power cycle even if interface hasn't been opened
1883 * yet */
1884 cancel_delayed_work(&priv->reset_work);
1885 priv->status |= STATUS_RESET_PENDING;
1886 spin_unlock_irqrestore(&priv->low_lock, flags);
1887
1888 down(&priv->action_sem);
1889 /* stop timed checks so that they don't interfere with reset */
1890 priv->stop_hang_check = 1;
1891 cancel_delayed_work(&priv->hang_check);
1892
1893 /* We have to signal any supplicant if we are disassociating */
1894 if (associated)
1895 wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL);
1896
1897 ipw2100_up(priv, 0);
1898 up(&priv->action_sem);
1899
1900}
1901
1902
1903static void isr_indicate_associated(struct ipw2100_priv *priv, u32 status)
1904{
1905
1906#define MAC_ASSOCIATION_READ_DELAY (HZ)
1907 int ret, len, essid_len;
1908 char essid[IW_ESSID_MAX_SIZE];
1909 u32 txrate;
1910 u32 chan;
1911 char *txratename;
1912 u8 bssid[ETH_ALEN];
1913
1914 /*
1915 * TBD: BSSID is usually 00:00:00:00:00:00 here and not
1916 * an actual MAC of the AP. Seems like FW sets this
1917 * address too late. Read it later and expose through
1918 * /proc or schedule a later task to query and update
1919 */
1920
1921 essid_len = IW_ESSID_MAX_SIZE;
1922 ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_SSID,
1923 essid, &essid_len);
1924 if (ret) {
1925 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
1926 __LINE__);
1927 return;
1928 }
1929
1930 len = sizeof(u32);
1931 ret = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE,
1932 &txrate, &len);
1933 if (ret) {
1934 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
1935 __LINE__);
1936 return;
1937 }
1938
1939 len = sizeof(u32);
1940 ret = ipw2100_get_ordinal(priv, IPW_ORD_OUR_FREQ, &chan, &len);
1941 if (ret) {
1942 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
1943 __LINE__);
1944 return;
1945 }
1946 len = ETH_ALEN;
1947 ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, &bssid, &len);
1948 if (ret) {
1949 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
1950 __LINE__);
1951 return;
1952 }
1953 memcpy(priv->ieee->bssid, bssid, ETH_ALEN);
1954
1955
1956 switch (txrate) {
1957 case TX_RATE_1_MBIT:
1958 txratename = "1Mbps";
1959 break;
1960 case TX_RATE_2_MBIT:
1961 txratename = "2Mbsp";
1962 break;
1963 case TX_RATE_5_5_MBIT:
1964 txratename = "5.5Mbps";
1965 break;
1966 case TX_RATE_11_MBIT:
1967 txratename = "11Mbps";
1968 break;
1969 default:
1970 IPW_DEBUG_INFO("Unknown rate: %d\n", txrate);
1971 txratename = "unknown rate";
1972 break;
1973 }
1974
1975 IPW_DEBUG_INFO("%s: Associated with '%s' at %s, channel %d (BSSID="
1976 MAC_FMT ")\n",
1977 priv->net_dev->name, escape_essid(essid, essid_len),
1978 txratename, chan, MAC_ARG(bssid));
1979
1980 /* now we copy read ssid into dev */
1981 if (!(priv->config & CFG_STATIC_ESSID)) {
1982 priv->essid_len = min((u8)essid_len, (u8)IW_ESSID_MAX_SIZE);
1983 memcpy(priv->essid, essid, priv->essid_len);
1984 }
1985 priv->channel = chan;
1986 memcpy(priv->bssid, bssid, ETH_ALEN);
1987
1988 priv->status |= STATUS_ASSOCIATING;
1989 priv->connect_start = get_seconds();
1990
1991 queue_delayed_work(priv->workqueue, &priv->wx_event_work, HZ / 10);
1992}
1993
1994
1995static int ipw2100_set_essid(struct ipw2100_priv *priv, char *essid,
1996 int length, int batch_mode)
1997{
1998 int ssid_len = min(length, IW_ESSID_MAX_SIZE);
1999 struct host_command cmd = {
2000 .host_command = SSID,
2001 .host_command_sequence = 0,
2002 .host_command_length = ssid_len
2003 };
2004 int err;
2005
2006 IPW_DEBUG_HC("SSID: '%s'\n", escape_essid(essid, ssid_len));
2007
2008 if (ssid_len)
2009 memcpy((char*)cmd.host_command_parameters,
2010 essid, ssid_len);
2011
2012 if (!batch_mode) {
2013 err = ipw2100_disable_adapter(priv);
2014 if (err)
2015 return err;
2016 }
2017
2018 /* Bug in FW currently doesn't honor bit 0 in SET_SCAN_OPTIONS to
2019 * disable auto association -- so we cheat by setting a bogus SSID */
2020 if (!ssid_len && !(priv->config & CFG_ASSOCIATE)) {
2021 int i;
2022 u8 *bogus = (u8*)cmd.host_command_parameters;
2023 for (i = 0; i < IW_ESSID_MAX_SIZE; i++)
2024 bogus[i] = 0x18 + i;
2025 cmd.host_command_length = IW_ESSID_MAX_SIZE;
2026 }
2027
2028 /* NOTE: We always send the SSID command even if the provided ESSID is
2029 * the same as what we currently think is set. */
2030
2031 err = ipw2100_hw_send_command(priv, &cmd);
2032 if (!err) {
2033 memset(priv->essid + ssid_len, 0,
2034 IW_ESSID_MAX_SIZE - ssid_len);
2035 memcpy(priv->essid, essid, ssid_len);
2036 priv->essid_len = ssid_len;
2037 }
2038
2039 if (!batch_mode) {
2040 if (ipw2100_enable_adapter(priv))
2041 err = -EIO;
2042 }
2043
2044 return err;
2045}
2046
2047static void isr_indicate_association_lost(struct ipw2100_priv *priv, u32 status)
2048{
2049 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
2050 "disassociated: '%s' " MAC_FMT " \n",
2051 escape_essid(priv->essid, priv->essid_len),
2052 MAC_ARG(priv->bssid));
2053
2054 priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING);
2055
2056 if (priv->status & STATUS_STOPPING) {
2057 IPW_DEBUG_INFO("Card is stopping itself, discard ASSN_LOST.\n");
2058 return;
2059 }
2060
2061 memset(priv->bssid, 0, ETH_ALEN);
2062 memset(priv->ieee->bssid, 0, ETH_ALEN);
2063
2064 netif_carrier_off(priv->net_dev);
2065 netif_stop_queue(priv->net_dev);
2066
2067 if (!(priv->status & STATUS_RUNNING))
2068 return;
2069
2070 if (priv->status & STATUS_SECURITY_UPDATED)
2071 queue_work(priv->workqueue, &priv->security_work);
2072
2073 queue_work(priv->workqueue, &priv->wx_event_work);
2074}
2075
2076static void isr_indicate_rf_kill(struct ipw2100_priv *priv, u32 status)
2077{
2078 IPW_DEBUG_INFO("%s: RF Kill state changed to radio OFF.\n",
2079 priv->net_dev->name);
2080
2081 /* RF_KILL is now enabled (else we wouldn't be here) */
2082 priv->status |= STATUS_RF_KILL_HW;
2083
2084#ifdef ACPI_CSTATE_LIMIT_DEFINED
2085 if (priv->config & CFG_C3_DISABLED) {
2086 IPW_DEBUG_INFO(DRV_NAME ": Resetting C3 transitions.\n");
2087 acpi_set_cstate_limit(priv->cstate_limit);
2088 priv->config &= ~CFG_C3_DISABLED;
2089 }
2090#endif
2091
2092 /* Make sure the RF Kill check timer is running */
2093 priv->stop_rf_kill = 0;
2094 cancel_delayed_work(&priv->rf_kill);
2095 queue_delayed_work(priv->workqueue, &priv->rf_kill, HZ);
2096}
2097
2098static void isr_scan_complete(struct ipw2100_priv *priv, u32 status)
2099{
2100 IPW_DEBUG_SCAN("scan complete\n");
2101 /* Age the scan results... */
2102 priv->ieee->scans++;
2103 priv->status &= ~STATUS_SCANNING;
2104}
2105
2106#ifdef CONFIG_IPW_DEBUG
2107#define IPW2100_HANDLER(v, f) { v, f, # v }
2108struct ipw2100_status_indicator {
2109 int status;
2110 void (*cb)(struct ipw2100_priv *priv, u32 status);
2111 char *name;
2112};
2113#else
2114#define IPW2100_HANDLER(v, f) { v, f }
2115struct ipw2100_status_indicator {
2116 int status;
2117 void (*cb)(struct ipw2100_priv *priv, u32 status);
2118};
2119#endif /* CONFIG_IPW_DEBUG */
2120
2121static void isr_indicate_scanning(struct ipw2100_priv *priv, u32 status)
2122{
2123 IPW_DEBUG_SCAN("Scanning...\n");
2124 priv->status |= STATUS_SCANNING;
2125}
2126
2127static const struct ipw2100_status_indicator status_handlers[] = {
2128 IPW2100_HANDLER(IPW_STATE_INITIALIZED, 0),
2129 IPW2100_HANDLER(IPW_STATE_COUNTRY_FOUND, 0),
2130 IPW2100_HANDLER(IPW_STATE_ASSOCIATED, isr_indicate_associated),
2131 IPW2100_HANDLER(IPW_STATE_ASSN_LOST, isr_indicate_association_lost),
2132 IPW2100_HANDLER(IPW_STATE_ASSN_CHANGED, 0),
2133 IPW2100_HANDLER(IPW_STATE_SCAN_COMPLETE, isr_scan_complete),
2134 IPW2100_HANDLER(IPW_STATE_ENTERED_PSP, 0),
2135 IPW2100_HANDLER(IPW_STATE_LEFT_PSP, 0),
2136 IPW2100_HANDLER(IPW_STATE_RF_KILL, isr_indicate_rf_kill),
2137 IPW2100_HANDLER(IPW_STATE_DISABLED, 0),
2138 IPW2100_HANDLER(IPW_STATE_POWER_DOWN, 0),
2139 IPW2100_HANDLER(IPW_STATE_SCANNING, isr_indicate_scanning),
2140 IPW2100_HANDLER(-1, 0)
2141};
2142
2143
2144static void isr_status_change(struct ipw2100_priv *priv, int status)
2145{
2146 int i;
2147
2148 if (status == IPW_STATE_SCANNING &&
2149 priv->status & STATUS_ASSOCIATED &&
2150 !(priv->status & STATUS_SCANNING)) {
2151 IPW_DEBUG_INFO("Scan detected while associated, with "
2152 "no scan request. Restarting firmware.\n");
2153
2154 /* Wake up any sleeping jobs */
2155 schedule_reset(priv);
2156 }
2157
2158 for (i = 0; status_handlers[i].status != -1; i++) {
2159 if (status == status_handlers[i].status) {
2160 IPW_DEBUG_NOTIF("Status change: %s\n",
2161 status_handlers[i].name);
2162 if (status_handlers[i].cb)
2163 status_handlers[i].cb(priv, status);
2164 priv->wstats.status = status;
2165 return;
2166 }
2167 }
2168
2169 IPW_DEBUG_NOTIF("unknown status received: %04x\n", status);
2170}
2171
2172static void isr_rx_complete_command(
2173 struct ipw2100_priv *priv,
2174 struct ipw2100_cmd_header *cmd)
2175{
2176#ifdef CONFIG_IPW_DEBUG
2177 if (cmd->host_command_reg < ARRAY_SIZE(command_types)) {
2178 IPW_DEBUG_HC("Command completed '%s (%d)'\n",
2179 command_types[cmd->host_command_reg],
2180 cmd->host_command_reg);
2181 }
2182#endif
2183 if (cmd->host_command_reg == HOST_COMPLETE)
2184 priv->status |= STATUS_ENABLED;
2185
2186 if (cmd->host_command_reg == CARD_DISABLE)
2187 priv->status &= ~STATUS_ENABLED;
2188
2189 priv->status &= ~STATUS_CMD_ACTIVE;
2190
2191 wake_up_interruptible(&priv->wait_command_queue);
2192}
2193
2194#ifdef CONFIG_IPW_DEBUG
2195static const char *frame_types[] = {
2196 "COMMAND_STATUS_VAL",
2197 "STATUS_CHANGE_VAL",
2198 "P80211_DATA_VAL",
2199 "P8023_DATA_VAL",
2200 "HOST_NOTIFICATION_VAL"
2201};
2202#endif
2203
2204
2205static inline int ipw2100_alloc_skb(
2206 struct ipw2100_priv *priv,
2207 struct ipw2100_rx_packet *packet)
2208{
2209 packet->skb = dev_alloc_skb(sizeof(struct ipw2100_rx));
2210 if (!packet->skb)
2211 return -ENOMEM;
2212
2213 packet->rxp = (struct ipw2100_rx *)packet->skb->data;
2214 packet->dma_addr = pci_map_single(priv->pci_dev, packet->skb->data,
2215 sizeof(struct ipw2100_rx),
2216 PCI_DMA_FROMDEVICE);
2217 /* NOTE: pci_map_single does not return an error code, and 0 is a valid
2218 * dma_addr */
2219
2220 return 0;
2221}
2222
2223
2224#define SEARCH_ERROR 0xffffffff
2225#define SEARCH_FAIL 0xfffffffe
2226#define SEARCH_SUCCESS 0xfffffff0
2227#define SEARCH_DISCARD 0
2228#define SEARCH_SNAPSHOT 1
2229
2230#define SNAPSHOT_ADDR(ofs) (priv->snapshot[((ofs) >> 12) & 0xff] + ((ofs) & 0xfff))
2231static inline int ipw2100_snapshot_alloc(struct ipw2100_priv *priv)
2232{
2233 int i;
2234 if (priv->snapshot[0])
2235 return 1;
2236 for (i = 0; i < 0x30; i++) {
2237 priv->snapshot[i] = (u8*)kmalloc(0x1000, GFP_ATOMIC);
2238 if (!priv->snapshot[i]) {
2239 IPW_DEBUG_INFO("%s: Error allocating snapshot "
2240 "buffer %d\n", priv->net_dev->name, i);
2241 while (i > 0)
2242 kfree(priv->snapshot[--i]);
2243 priv->snapshot[0] = NULL;
2244 return 0;
2245 }
2246 }
2247
2248 return 1;
2249}
2250
2251static inline void ipw2100_snapshot_free(struct ipw2100_priv *priv)
2252{
2253 int i;
2254 if (!priv->snapshot[0])
2255 return;
2256 for (i = 0; i < 0x30; i++)
2257 kfree(priv->snapshot[i]);
2258 priv->snapshot[0] = NULL;
2259}
2260
2261static inline u32 ipw2100_match_buf(struct ipw2100_priv *priv, u8 *in_buf,
2262 size_t len, int mode)
2263{
2264 u32 i, j;
2265 u32 tmp;
2266 u8 *s, *d;
2267 u32 ret;
2268
2269 s = in_buf;
2270 if (mode == SEARCH_SNAPSHOT) {
2271 if (!ipw2100_snapshot_alloc(priv))
2272 mode = SEARCH_DISCARD;
2273 }
2274
2275 for (ret = SEARCH_FAIL, i = 0; i < 0x30000; i += 4) {
2276 read_nic_dword(priv->net_dev, i, &tmp);
2277 if (mode == SEARCH_SNAPSHOT)
2278 *(u32 *)SNAPSHOT_ADDR(i) = tmp;
2279 if (ret == SEARCH_FAIL) {
2280 d = (u8*)&tmp;
2281 for (j = 0; j < 4; j++) {
2282 if (*s != *d) {
2283 s = in_buf;
2284 continue;
2285 }
2286
2287 s++;
2288 d++;
2289
2290 if ((s - in_buf) == len)
2291 ret = (i + j) - len + 1;
2292 }
2293 } else if (mode == SEARCH_DISCARD)
2294 return ret;
2295 }
2296
2297 return ret;
2298}
2299
2300/*
2301 *
2302 * 0) Disconnect the SKB from the firmware (just unmap)
2303 * 1) Pack the ETH header into the SKB
2304 * 2) Pass the SKB to the network stack
2305 *
2306 * When packet is provided by the firmware, it contains the following:
2307 *
2308 * . ieee80211_hdr
2309 * . ieee80211_snap_hdr
2310 *
2311 * The size of the constructed ethernet
2312 *
2313 */
2314#ifdef CONFIG_IPW2100_RX_DEBUG
2315static u8 packet_data[IPW_RX_NIC_BUFFER_LENGTH];
2316#endif
2317
2318static inline void ipw2100_corruption_detected(struct ipw2100_priv *priv,
2319 int i)
2320{
2321#ifdef CONFIG_IPW_DEBUG_C3
2322 struct ipw2100_status *status = &priv->status_queue.drv[i];
2323 u32 match, reg;
2324 int j;
2325#endif
2326#ifdef ACPI_CSTATE_LIMIT_DEFINED
2327 int limit;
2328#endif
2329
2330 IPW_DEBUG_INFO(DRV_NAME ": PCI latency error detected at "
2331 "0x%04zX.\n", i * sizeof(struct ipw2100_status));
2332
2333#ifdef ACPI_CSTATE_LIMIT_DEFINED
2334 IPW_DEBUG_INFO(DRV_NAME ": Disabling C3 transitions.\n");
2335 limit = acpi_get_cstate_limit();
2336 if (limit > 2) {
2337 priv->cstate_limit = limit;
2338 acpi_set_cstate_limit(2);
2339 priv->config |= CFG_C3_DISABLED;
2340 }
2341#endif
2342
2343#ifdef CONFIG_IPW_DEBUG_C3
2344 /* Halt the fimrware so we can get a good image */
2345 write_register(priv->net_dev, IPW_REG_RESET_REG,
2346 IPW_AUX_HOST_RESET_REG_STOP_MASTER);
2347 j = 5;
2348 do {
2349 udelay(IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY);
2350 read_register(priv->net_dev, IPW_REG_RESET_REG, &reg);
2351
2352 if (reg & IPW_AUX_HOST_RESET_REG_MASTER_DISABLED)
2353 break;
2354 } while (j--);
2355
2356 match = ipw2100_match_buf(priv, (u8*)status,
2357 sizeof(struct ipw2100_status),
2358 SEARCH_SNAPSHOT);
2359 if (match < SEARCH_SUCCESS)
2360 IPW_DEBUG_INFO("%s: DMA status match in Firmware at "
2361 "offset 0x%06X, length %d:\n",
2362 priv->net_dev->name, match,
2363 sizeof(struct ipw2100_status));
2364 else
2365 IPW_DEBUG_INFO("%s: No DMA status match in "
2366 "Firmware.\n", priv->net_dev->name);
2367
2368 printk_buf((u8*)priv->status_queue.drv,
2369 sizeof(struct ipw2100_status) * RX_QUEUE_LENGTH);
2370#endif
2371
2372 priv->fatal_error = IPW2100_ERR_C3_CORRUPTION;
2373 priv->ieee->stats.rx_errors++;
2374 schedule_reset(priv);
2375}
2376
2377static inline void isr_rx(struct ipw2100_priv *priv, int i,
2378 struct ieee80211_rx_stats *stats)
2379{
2380 struct ipw2100_status *status = &priv->status_queue.drv[i];
2381 struct ipw2100_rx_packet *packet = &priv->rx_buffers[i];
2382
2383 IPW_DEBUG_RX("Handler...\n");
2384
2385 if (unlikely(status->frame_size > skb_tailroom(packet->skb))) {
2386 IPW_DEBUG_INFO("%s: frame_size (%u) > skb_tailroom (%u)!"
2387 " Dropping.\n",
2388 priv->net_dev->name,
2389 status->frame_size, skb_tailroom(packet->skb));
2390 priv->ieee->stats.rx_errors++;
2391 return;
2392 }
2393
2394 if (unlikely(!netif_running(priv->net_dev))) {
2395 priv->ieee->stats.rx_errors++;
2396 priv->wstats.discard.misc++;
2397 IPW_DEBUG_DROP("Dropping packet while interface is not up.\n");
2398 return;
2399 }
2400
2401 if (unlikely(priv->ieee->iw_mode == IW_MODE_MONITOR &&
2402 status->flags & IPW_STATUS_FLAG_CRC_ERROR)) {
2403 IPW_DEBUG_RX("CRC error in packet. Dropping.\n");
2404 priv->ieee->stats.rx_errors++;
2405 return;
2406 }
2407
2408 if (unlikely(priv->ieee->iw_mode != IW_MODE_MONITOR &&
2409 !(priv->status & STATUS_ASSOCIATED))) {
2410 IPW_DEBUG_DROP("Dropping packet while not associated.\n");
2411 priv->wstats.discard.misc++;
2412 return;
2413 }
2414
2415
2416 pci_unmap_single(priv->pci_dev,
2417 packet->dma_addr,
2418 sizeof(struct ipw2100_rx),
2419 PCI_DMA_FROMDEVICE);
2420
2421 skb_put(packet->skb, status->frame_size);
2422
2423#ifdef CONFIG_IPW2100_RX_DEBUG
2424 /* Make a copy of the frame so we can dump it to the logs if
2425 * ieee80211_rx fails */
2426 memcpy(packet_data, packet->skb->data,
2427 min_t(u32, status->frame_size, IPW_RX_NIC_BUFFER_LENGTH));
2428#endif
2429
2430 if (!ieee80211_rx(priv->ieee, packet->skb, stats)) {
2431#ifdef CONFIG_IPW2100_RX_DEBUG
2432 IPW_DEBUG_DROP("%s: Non consumed packet:\n",
2433 priv->net_dev->name);
2434 printk_buf(IPW_DL_DROP, packet_data, status->frame_size);
2435#endif
2436 priv->ieee->stats.rx_errors++;
2437
2438 /* ieee80211_rx failed, so it didn't free the SKB */
2439 dev_kfree_skb_any(packet->skb);
2440 packet->skb = NULL;
2441 }
2442
2443 /* We need to allocate a new SKB and attach it to the RDB. */
2444 if (unlikely(ipw2100_alloc_skb(priv, packet))) {
2445 printk(KERN_WARNING DRV_NAME ": "
2446 "%s: Unable to allocate SKB onto RBD ring - disabling "
2447 "adapter.\n", priv->net_dev->name);
2448 /* TODO: schedule adapter shutdown */
2449 IPW_DEBUG_INFO("TODO: Shutdown adapter...\n");
2450 }
2451
2452 /* Update the RDB entry */
2453 priv->rx_queue.drv[i].host_addr = packet->dma_addr;
2454}
2455
2456static inline int ipw2100_corruption_check(struct ipw2100_priv *priv, int i)
2457{
2458 struct ipw2100_status *status = &priv->status_queue.drv[i];
2459 struct ipw2100_rx *u = priv->rx_buffers[i].rxp;
2460 u16 frame_type = status->status_fields & STATUS_TYPE_MASK;
2461
2462 switch (frame_type) {
2463 case COMMAND_STATUS_VAL:
2464 return (status->frame_size != sizeof(u->rx_data.command));
2465 case STATUS_CHANGE_VAL:
2466 return (status->frame_size != sizeof(u->rx_data.status));
2467 case HOST_NOTIFICATION_VAL:
2468 return (status->frame_size < sizeof(u->rx_data.notification));
2469 case P80211_DATA_VAL:
2470 case P8023_DATA_VAL:
2471#ifdef CONFIG_IPW2100_MONITOR
2472 return 0;
2473#else
2474 switch (WLAN_FC_GET_TYPE(u->rx_data.header.frame_ctl)) {
2475 case IEEE80211_FTYPE_MGMT:
2476 case IEEE80211_FTYPE_CTL:
2477 return 0;
2478 case IEEE80211_FTYPE_DATA:
2479 return (status->frame_size >
2480 IPW_MAX_802_11_PAYLOAD_LENGTH);
2481 }
2482#endif
2483 }
2484
2485 return 1;
2486}
2487
2488/*
2489 * ipw2100 interrupts are disabled at this point, and the ISR
2490 * is the only code that calls this method. So, we do not need
2491 * to play with any locks.
2492 *
2493 * RX Queue works as follows:
2494 *
2495 * Read index - firmware places packet in entry identified by the
2496 * Read index and advances Read index. In this manner,
2497 * Read index will always point to the next packet to
2498 * be filled--but not yet valid.
2499 *
2500 * Write index - driver fills this entry with an unused RBD entry.
2501 * This entry has not filled by the firmware yet.
2502 *
2503 * In between the W and R indexes are the RBDs that have been received
2504 * but not yet processed.
2505 *
2506 * The process of handling packets will start at WRITE + 1 and advance
2507 * until it reaches the READ index.
2508 *
2509 * The WRITE index is cached in the variable 'priv->rx_queue.next'.
2510 *
2511 */
2512static inline void __ipw2100_rx_process(struct ipw2100_priv *priv)
2513{
2514 struct ipw2100_bd_queue *rxq = &priv->rx_queue;
2515 struct ipw2100_status_queue *sq = &priv->status_queue;
2516 struct ipw2100_rx_packet *packet;
2517 u16 frame_type;
2518 u32 r, w, i, s;
2519 struct ipw2100_rx *u;
2520 struct ieee80211_rx_stats stats = {
2521 .mac_time = jiffies,
2522 };
2523
2524 read_register(priv->net_dev, IPW_MEM_HOST_SHARED_RX_READ_INDEX, &r);
2525 read_register(priv->net_dev, IPW_MEM_HOST_SHARED_RX_WRITE_INDEX, &w);
2526
2527 if (r >= rxq->entries) {
2528 IPW_DEBUG_RX("exit - bad read index\n");
2529 return;
2530 }
2531
2532 i = (rxq->next + 1) % rxq->entries;
2533 s = i;
2534 while (i != r) {
2535 /* IPW_DEBUG_RX("r = %d : w = %d : processing = %d\n",
2536 r, rxq->next, i); */
2537
2538 packet = &priv->rx_buffers[i];
2539
2540 /* Sync the DMA for the STATUS buffer so CPU is sure to get
2541 * the correct values */
2542 pci_dma_sync_single_for_cpu(
2543 priv->pci_dev,
2544 sq->nic + sizeof(struct ipw2100_status) * i,
2545 sizeof(struct ipw2100_status),
2546 PCI_DMA_FROMDEVICE);
2547
2548 /* Sync the DMA for the RX buffer so CPU is sure to get
2549 * the correct values */
2550 pci_dma_sync_single_for_cpu(priv->pci_dev, packet->dma_addr,
2551 sizeof(struct ipw2100_rx),
2552 PCI_DMA_FROMDEVICE);
2553
2554 if (unlikely(ipw2100_corruption_check(priv, i))) {
2555 ipw2100_corruption_detected(priv, i);
2556 goto increment;
2557 }
2558
2559 u = packet->rxp;
2560 frame_type = sq->drv[i].status_fields &
2561 STATUS_TYPE_MASK;
2562 stats.rssi = sq->drv[i].rssi + IPW2100_RSSI_TO_DBM;
2563 stats.len = sq->drv[i].frame_size;
2564
2565 stats.mask = 0;
2566 if (stats.rssi != 0)
2567 stats.mask |= IEEE80211_STATMASK_RSSI;
2568 stats.freq = IEEE80211_24GHZ_BAND;
2569
2570 IPW_DEBUG_RX(
2571 "%s: '%s' frame type received (%d).\n",
2572 priv->net_dev->name, frame_types[frame_type],
2573 stats.len);
2574
2575 switch (frame_type) {
2576 case COMMAND_STATUS_VAL:
2577 /* Reset Rx watchdog */
2578 isr_rx_complete_command(
2579 priv, &u->rx_data.command);
2580 break;
2581
2582 case STATUS_CHANGE_VAL:
2583 isr_status_change(priv, u->rx_data.status);
2584 break;
2585
2586 case P80211_DATA_VAL:
2587 case P8023_DATA_VAL:
2588#ifdef CONFIG_IPW2100_MONITOR
2589 if (priv->ieee->iw_mode == IW_MODE_MONITOR) {
2590 isr_rx(priv, i, &stats);
2591 break;
2592 }
2593#endif
2594 if (stats.len < sizeof(u->rx_data.header))
2595 break;
2596 switch (WLAN_FC_GET_TYPE(u->rx_data.header.
2597 frame_ctl)) {
2598 case IEEE80211_FTYPE_MGMT:
2599 ieee80211_rx_mgt(priv->ieee,
2600 &u->rx_data.header,
2601 &stats);
2602 break;
2603
2604 case IEEE80211_FTYPE_CTL:
2605 break;
2606
2607 case IEEE80211_FTYPE_DATA:
2608 isr_rx(priv, i, &stats);
2609 break;
2610
2611 }
2612 break;
2613 }
2614
2615 increment:
2616 /* clear status field associated with this RBD */
2617 rxq->drv[i].status.info.field = 0;
2618
2619 i = (i + 1) % rxq->entries;
2620 }
2621
2622 if (i != s) {
2623 /* backtrack one entry, wrapping to end if at 0 */
2624 rxq->next = (i ? i : rxq->entries) - 1;
2625
2626 write_register(priv->net_dev,
2627 IPW_MEM_HOST_SHARED_RX_WRITE_INDEX,
2628 rxq->next);
2629 }
2630}
2631
2632
2633/*
2634 * __ipw2100_tx_process
2635 *
2636 * This routine will determine whether the next packet on
2637 * the fw_pend_list has been processed by the firmware yet.
2638 *
2639 * If not, then it does nothing and returns.
2640 *
2641 * If so, then it removes the item from the fw_pend_list, frees
2642 * any associated storage, and places the item back on the
2643 * free list of its source (either msg_free_list or tx_free_list)
2644 *
2645 * TX Queue works as follows:
2646 *
2647 * Read index - points to the next TBD that the firmware will
2648 * process. The firmware will read the data, and once
2649 * done processing, it will advance the Read index.
2650 *
2651 * Write index - driver fills this entry with an constructed TBD
2652 * entry. The Write index is not advanced until the
2653 * packet has been configured.
2654 *
2655 * In between the W and R indexes are the TBDs that have NOT been
2656 * processed. Lagging behind the R index are packets that have
2657 * been processed but have not been freed by the driver.
2658 *
2659 * In order to free old storage, an internal index will be maintained
2660 * that points to the next packet to be freed. When all used
2661 * packets have been freed, the oldest index will be the same as the
2662 * firmware's read index.
2663 *
2664 * The OLDEST index is cached in the variable 'priv->tx_queue.oldest'
2665 *
2666 * Because the TBD structure can not contain arbitrary data, the
2667 * driver must keep an internal queue of cached allocations such that
2668 * it can put that data back into the tx_free_list and msg_free_list
2669 * for use by future command and data packets.
2670 *
2671 */
2672static inline int __ipw2100_tx_process(struct ipw2100_priv *priv)
2673{
2674 struct ipw2100_bd_queue *txq = &priv->tx_queue;
2675 struct ipw2100_bd *tbd;
2676 struct list_head *element;
2677 struct ipw2100_tx_packet *packet;
2678 int descriptors_used;
2679 int e, i;
2680 u32 r, w, frag_num = 0;
2681
2682 if (list_empty(&priv->fw_pend_list))
2683 return 0;
2684
2685 element = priv->fw_pend_list.next;
2686
2687 packet = list_entry(element, struct ipw2100_tx_packet, list);
2688 tbd = &txq->drv[packet->index];
2689
2690 /* Determine how many TBD entries must be finished... */
2691 switch (packet->type) {
2692 case COMMAND:
2693 /* COMMAND uses only one slot; don't advance */
2694 descriptors_used = 1;
2695 e = txq->oldest;
2696 break;
2697
2698 case DATA:
2699 /* DATA uses two slots; advance and loop position. */
2700 descriptors_used = tbd->num_fragments;
2701 frag_num = tbd->num_fragments - 1;
2702 e = txq->oldest + frag_num;
2703 e %= txq->entries;
2704 break;
2705
2706 default:
2707 printk(KERN_WARNING DRV_NAME ": %s: Bad fw_pend_list entry!\n",
2708 priv->net_dev->name);
2709 return 0;
2710 }
2711
2712 /* if the last TBD is not done by NIC yet, then packet is
2713 * not ready to be released.
2714 *
2715 */
2716 read_register(priv->net_dev, IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX,
2717 &r);
2718 read_register(priv->net_dev, IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX,
2719 &w);
2720 if (w != txq->next)
2721 printk(KERN_WARNING DRV_NAME ": %s: write index mismatch\n",
2722 priv->net_dev->name);
2723
2724 /*
2725 * txq->next is the index of the last packet written txq->oldest is
2726 * the index of the r is the index of the next packet to be read by
2727 * firmware
2728 */
2729
2730
2731 /*
2732 * Quick graphic to help you visualize the following
2733 * if / else statement
2734 *
2735 * ===>| s---->|===============
2736 * e>|
2737 * | a | b | c | d | e | f | g | h | i | j | k | l
2738 * r---->|
2739 * w
2740 *
2741 * w - updated by driver
2742 * r - updated by firmware
2743 * s - start of oldest BD entry (txq->oldest)
2744 * e - end of oldest BD entry
2745 *
2746 */
2747 if (!((r <= w && (e < r || e >= w)) || (e < r && e >= w))) {
2748 IPW_DEBUG_TX("exit - no processed packets ready to release.\n");
2749 return 0;
2750 }
2751
2752 list_del(element);
2753 DEC_STAT(&priv->fw_pend_stat);
2754
2755#ifdef CONFIG_IPW_DEBUG
2756 {
2757 int i = txq->oldest;
2758 IPW_DEBUG_TX(
2759 "TX%d V=%p P=%04X T=%04X L=%d\n", i,
2760 &txq->drv[i],
2761 (u32)(txq->nic + i * sizeof(struct ipw2100_bd)),
2762 txq->drv[i].host_addr,
2763 txq->drv[i].buf_length);
2764
2765 if (packet->type == DATA) {
2766 i = (i + 1) % txq->entries;
2767
2768 IPW_DEBUG_TX(
2769 "TX%d V=%p P=%04X T=%04X L=%d\n", i,
2770 &txq->drv[i],
2771 (u32)(txq->nic + i *
2772 sizeof(struct ipw2100_bd)),
2773 (u32)txq->drv[i].host_addr,
2774 txq->drv[i].buf_length);
2775 }
2776 }
2777#endif
2778
2779 switch (packet->type) {
2780 case DATA:
2781 if (txq->drv[txq->oldest].status.info.fields.txType != 0)
2782 printk(KERN_WARNING DRV_NAME ": %s: Queue mismatch. "
2783 "Expecting DATA TBD but pulled "
2784 "something else: ids %d=%d.\n",
2785 priv->net_dev->name, txq->oldest, packet->index);
2786
2787 /* DATA packet; we have to unmap and free the SKB */
2788 priv->ieee->stats.tx_packets++;
2789 for (i = 0; i < frag_num; i++) {
2790 tbd = &txq->drv[(packet->index + 1 + i) %
2791 txq->entries];
2792
2793 IPW_DEBUG_TX(
2794 "TX%d P=%08x L=%d\n",
2795 (packet->index + 1 + i) % txq->entries,
2796 tbd->host_addr, tbd->buf_length);
2797
2798 pci_unmap_single(priv->pci_dev,
2799 tbd->host_addr,
2800 tbd->buf_length,
2801 PCI_DMA_TODEVICE);
2802 }
2803
2804 priv->ieee->stats.tx_bytes += packet->info.d_struct.txb->payload_size;
2805 ieee80211_txb_free(packet->info.d_struct.txb);
2806 packet->info.d_struct.txb = NULL;
2807
2808 list_add_tail(element, &priv->tx_free_list);
2809 INC_STAT(&priv->tx_free_stat);
2810
2811 /* We have a free slot in the Tx queue, so wake up the
2812 * transmit layer if it is stopped. */
2813 if (priv->status & STATUS_ASSOCIATED &&
2814 netif_queue_stopped(priv->net_dev)) {
2815 IPW_DEBUG_INFO(KERN_INFO
2816 "%s: Waking net queue.\n",
2817 priv->net_dev->name);
2818 netif_wake_queue(priv->net_dev);
2819 }
2820
2821 /* A packet was processed by the hardware, so update the
2822 * watchdog */
2823 priv->net_dev->trans_start = jiffies;
2824
2825 break;
2826
2827 case COMMAND:
2828 if (txq->drv[txq->oldest].status.info.fields.txType != 1)
2829 printk(KERN_WARNING DRV_NAME ": %s: Queue mismatch. "
2830 "Expecting COMMAND TBD but pulled "
2831 "something else: ids %d=%d.\n",
2832 priv->net_dev->name, txq->oldest, packet->index);
2833
2834#ifdef CONFIG_IPW_DEBUG
2835 if (packet->info.c_struct.cmd->host_command_reg <
2836 sizeof(command_types) / sizeof(*command_types))
2837 IPW_DEBUG_TX(
2838 "Command '%s (%d)' processed: %d.\n",
2839 command_types[packet->info.c_struct.cmd->host_command_reg],
2840 packet->info.c_struct.cmd->host_command_reg,
2841 packet->info.c_struct.cmd->cmd_status_reg);
2842#endif
2843
2844 list_add_tail(element, &priv->msg_free_list);
2845 INC_STAT(&priv->msg_free_stat);
2846 break;
2847 }
2848
2849 /* advance oldest used TBD pointer to start of next entry */
2850 txq->oldest = (e + 1) % txq->entries;
2851 /* increase available TBDs number */
2852 txq->available += descriptors_used;
2853 SET_STAT(&priv->txq_stat, txq->available);
2854
2855 IPW_DEBUG_TX("packet latency (send to process) %ld jiffies\n",
2856 jiffies - packet->jiffy_start);
2857
2858 return (!list_empty(&priv->fw_pend_list));
2859}
2860
2861
2862static inline void __ipw2100_tx_complete(struct ipw2100_priv *priv)
2863{
2864 int i = 0;
2865
2866 while (__ipw2100_tx_process(priv) && i < 200) i++;
2867
2868 if (i == 200) {
2869 printk(KERN_WARNING DRV_NAME ": "
2870 "%s: Driver is running slow (%d iters).\n",
2871 priv->net_dev->name, i);
2872 }
2873}
2874
2875
2876static void ipw2100_tx_send_commands(struct ipw2100_priv *priv)
2877{
2878 struct list_head *element;
2879 struct ipw2100_tx_packet *packet;
2880 struct ipw2100_bd_queue *txq = &priv->tx_queue;
2881 struct ipw2100_bd *tbd;
2882 int next = txq->next;
2883
2884 while (!list_empty(&priv->msg_pend_list)) {
2885 /* if there isn't enough space in TBD queue, then
2886 * don't stuff a new one in.
2887 * NOTE: 3 are needed as a command will take one,
2888 * and there is a minimum of 2 that must be
2889 * maintained between the r and w indexes
2890 */
2891 if (txq->available <= 3) {
2892 IPW_DEBUG_TX("no room in tx_queue\n");
2893 break;
2894 }
2895
2896 element = priv->msg_pend_list.next;
2897 list_del(element);
2898 DEC_STAT(&priv->msg_pend_stat);
2899
2900 packet = list_entry(element,
2901 struct ipw2100_tx_packet, list);
2902
2903 IPW_DEBUG_TX("using TBD at virt=%p, phys=%p\n",
2904 &txq->drv[txq->next],
2905 (void*)(txq->nic + txq->next *
2906 sizeof(struct ipw2100_bd)));
2907
2908 packet->index = txq->next;
2909
2910 tbd = &txq->drv[txq->next];
2911
2912 /* initialize TBD */
2913 tbd->host_addr = packet->info.c_struct.cmd_phys;
2914 tbd->buf_length = sizeof(struct ipw2100_cmd_header);
2915 /* not marking number of fragments causes problems
2916 * with f/w debug version */
2917 tbd->num_fragments = 1;
2918 tbd->status.info.field =
2919 IPW_BD_STATUS_TX_FRAME_COMMAND |
2920 IPW_BD_STATUS_TX_INTERRUPT_ENABLE;
2921
2922 /* update TBD queue counters */
2923 txq->next++;
2924 txq->next %= txq->entries;
2925 txq->available--;
2926 DEC_STAT(&priv->txq_stat);
2927
2928 list_add_tail(element, &priv->fw_pend_list);
2929 INC_STAT(&priv->fw_pend_stat);
2930 }
2931
2932 if (txq->next != next) {
2933 /* kick off the DMA by notifying firmware the
2934 * write index has moved; make sure TBD stores are sync'd */
2935 wmb();
2936 write_register(priv->net_dev,
2937 IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX,
2938 txq->next);
2939 }
2940}
2941
2942
2943/*
2944 * ipw2100_tx_send_data
2945 *
2946 */
2947static void ipw2100_tx_send_data(struct ipw2100_priv *priv)
2948{
2949 struct list_head *element;
2950 struct ipw2100_tx_packet *packet;
2951 struct ipw2100_bd_queue *txq = &priv->tx_queue;
2952 struct ipw2100_bd *tbd;
2953 int next = txq->next;
2954 int i = 0;
2955 struct ipw2100_data_header *ipw_hdr;
2956 struct ieee80211_hdr *hdr;
2957
2958 while (!list_empty(&priv->tx_pend_list)) {
2959 /* if there isn't enough space in TBD queue, then
2960 * don't stuff a new one in.
2961 * NOTE: 4 are needed as a data will take two,
2962 * and there is a minimum of 2 that must be
2963 * maintained between the r and w indexes
2964 */
2965 element = priv->tx_pend_list.next;
2966 packet = list_entry(element, struct ipw2100_tx_packet, list);
2967
2968 if (unlikely(1 + packet->info.d_struct.txb->nr_frags >
2969 IPW_MAX_BDS)) {
2970 /* TODO: Support merging buffers if more than
2971 * IPW_MAX_BDS are used */
2972 IPW_DEBUG_INFO(
2973 "%s: Maximum BD theshold exceeded. "
2974 "Increase fragmentation level.\n",
2975 priv->net_dev->name);
2976 }
2977
2978 if (txq->available <= 3 +
2979 packet->info.d_struct.txb->nr_frags) {
2980 IPW_DEBUG_TX("no room in tx_queue\n");
2981 break;
2982 }
2983
2984 list_del(element);
2985 DEC_STAT(&priv->tx_pend_stat);
2986
2987 tbd = &txq->drv[txq->next];
2988
2989 packet->index = txq->next;
2990
2991 ipw_hdr = packet->info.d_struct.data;
2992 hdr = (struct ieee80211_hdr *)packet->info.d_struct.txb->
2993 fragments[0]->data;
2994
2995 if (priv->ieee->iw_mode == IW_MODE_INFRA) {
2996 /* To DS: Addr1 = BSSID, Addr2 = SA,
2997 Addr3 = DA */
2998 memcpy(ipw_hdr->src_addr, hdr->addr2, ETH_ALEN);
2999 memcpy(ipw_hdr->dst_addr, hdr->addr3, ETH_ALEN);
3000 } else if (priv->ieee->iw_mode == IW_MODE_ADHOC) {
3001 /* not From/To DS: Addr1 = DA, Addr2 = SA,
3002 Addr3 = BSSID */
3003 memcpy(ipw_hdr->src_addr, hdr->addr2, ETH_ALEN);
3004 memcpy(ipw_hdr->dst_addr, hdr->addr1, ETH_ALEN);
3005 }
3006
3007 ipw_hdr->host_command_reg = SEND;
3008 ipw_hdr->host_command_reg1 = 0;
3009
3010 /* For now we only support host based encryption */
3011 ipw_hdr->needs_encryption = 0;
3012 ipw_hdr->encrypted = packet->info.d_struct.txb->encrypted;
3013 if (packet->info.d_struct.txb->nr_frags > 1)
3014 ipw_hdr->fragment_size =
3015 packet->info.d_struct.txb->frag_size - IEEE80211_3ADDR_LEN;
3016 else
3017 ipw_hdr->fragment_size = 0;
3018
3019 tbd->host_addr = packet->info.d_struct.data_phys;
3020 tbd->buf_length = sizeof(struct ipw2100_data_header);
3021 tbd->num_fragments = 1 + packet->info.d_struct.txb->nr_frags;
3022 tbd->status.info.field =
3023 IPW_BD_STATUS_TX_FRAME_802_3 |
3024 IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT;
3025 txq->next++;
3026 txq->next %= txq->entries;
3027
3028 IPW_DEBUG_TX(
3029 "data header tbd TX%d P=%08x L=%d\n",
3030 packet->index, tbd->host_addr,
3031 tbd->buf_length);
3032#ifdef CONFIG_IPW_DEBUG
3033 if (packet->info.d_struct.txb->nr_frags > 1)
3034 IPW_DEBUG_FRAG("fragment Tx: %d frames\n",
3035 packet->info.d_struct.txb->nr_frags);
3036#endif
3037
3038 for (i = 0; i < packet->info.d_struct.txb->nr_frags; i++) {
3039 tbd = &txq->drv[txq->next];
3040 if (i == packet->info.d_struct.txb->nr_frags - 1)
3041 tbd->status.info.field =
3042 IPW_BD_STATUS_TX_FRAME_802_3 |
3043 IPW_BD_STATUS_TX_INTERRUPT_ENABLE;
3044 else
3045 tbd->status.info.field =
3046 IPW_BD_STATUS_TX_FRAME_802_3 |
3047 IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT;
3048
3049 tbd->buf_length = packet->info.d_struct.txb->
3050 fragments[i]->len - IEEE80211_3ADDR_LEN;
3051
3052 tbd->host_addr = pci_map_single(
3053 priv->pci_dev,
3054 packet->info.d_struct.txb->fragments[i]->data +
3055 IEEE80211_3ADDR_LEN,
3056 tbd->buf_length,
3057 PCI_DMA_TODEVICE);
3058
3059 IPW_DEBUG_TX(
3060 "data frag tbd TX%d P=%08x L=%d\n",
3061 txq->next, tbd->host_addr, tbd->buf_length);
3062
3063 pci_dma_sync_single_for_device(
3064 priv->pci_dev, tbd->host_addr,
3065 tbd->buf_length,
3066 PCI_DMA_TODEVICE);
3067
3068 txq->next++;
3069 txq->next %= txq->entries;
3070 }
3071
3072 txq->available -= 1 + packet->info.d_struct.txb->nr_frags;
3073 SET_STAT(&priv->txq_stat, txq->available);
3074
3075 list_add_tail(element, &priv->fw_pend_list);
3076 INC_STAT(&priv->fw_pend_stat);
3077 }
3078
3079 if (txq->next != next) {
3080 /* kick off the DMA by notifying firmware the
3081 * write index has moved; make sure TBD stores are sync'd */
3082 write_register(priv->net_dev,
3083 IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX,
3084 txq->next);
3085 }
3086 return;
3087}
3088
3089static void ipw2100_irq_tasklet(struct ipw2100_priv *priv)
3090{
3091 struct net_device *dev = priv->net_dev;
3092 unsigned long flags;
3093 u32 inta, tmp;
3094
3095 spin_lock_irqsave(&priv->low_lock, flags);
3096 ipw2100_disable_interrupts(priv);
3097
3098 read_register(dev, IPW_REG_INTA, &inta);
3099
3100 IPW_DEBUG_ISR("enter - INTA: 0x%08lX\n",
3101 (unsigned long)inta & IPW_INTERRUPT_MASK);
3102
3103 priv->in_isr++;
3104 priv->interrupts++;
3105
3106 /* We do not loop and keep polling for more interrupts as this
3107 * is frowned upon and doesn't play nicely with other potentially
3108 * chained IRQs */
3109 IPW_DEBUG_ISR("INTA: 0x%08lX\n",
3110 (unsigned long)inta & IPW_INTERRUPT_MASK);
3111
3112 if (inta & IPW2100_INTA_FATAL_ERROR) {
3113 printk(KERN_WARNING DRV_NAME
3114 ": Fatal interrupt. Scheduling firmware restart.\n");
3115 priv->inta_other++;
3116 write_register(
3117 dev, IPW_REG_INTA,
3118 IPW2100_INTA_FATAL_ERROR);
3119
3120 read_nic_dword(dev, IPW_NIC_FATAL_ERROR, &priv->fatal_error);
3121 IPW_DEBUG_INFO("%s: Fatal error value: 0x%08X\n",
3122 priv->net_dev->name, priv->fatal_error);
3123
3124 read_nic_dword(dev, IPW_ERROR_ADDR(priv->fatal_error), &tmp);
3125 IPW_DEBUG_INFO("%s: Fatal error address value: 0x%08X\n",
3126 priv->net_dev->name, tmp);
3127
3128 /* Wake up any sleeping jobs */
3129 schedule_reset(priv);
3130 }
3131
3132 if (inta & IPW2100_INTA_PARITY_ERROR) {
3133 printk(KERN_ERR DRV_NAME ": ***** PARITY ERROR INTERRUPT !!!! \n");
3134 priv->inta_other++;
3135 write_register(
3136 dev, IPW_REG_INTA,
3137 IPW2100_INTA_PARITY_ERROR);
3138 }
3139
3140 if (inta & IPW2100_INTA_RX_TRANSFER) {
3141 IPW_DEBUG_ISR("RX interrupt\n");
3142
3143 priv->rx_interrupts++;
3144
3145 write_register(
3146 dev, IPW_REG_INTA,
3147 IPW2100_INTA_RX_TRANSFER);
3148
3149 __ipw2100_rx_process(priv);
3150 __ipw2100_tx_complete(priv);
3151 }
3152
3153 if (inta & IPW2100_INTA_TX_TRANSFER) {
3154 IPW_DEBUG_ISR("TX interrupt\n");
3155
3156 priv->tx_interrupts++;
3157
3158 write_register(dev, IPW_REG_INTA,
3159 IPW2100_INTA_TX_TRANSFER);
3160
3161 __ipw2100_tx_complete(priv);
3162 ipw2100_tx_send_commands(priv);
3163 ipw2100_tx_send_data(priv);
3164 }
3165
3166 if (inta & IPW2100_INTA_TX_COMPLETE) {
3167 IPW_DEBUG_ISR("TX complete\n");
3168 priv->inta_other++;
3169 write_register(
3170 dev, IPW_REG_INTA,
3171 IPW2100_INTA_TX_COMPLETE);
3172
3173 __ipw2100_tx_complete(priv);
3174 }
3175
3176 if (inta & IPW2100_INTA_EVENT_INTERRUPT) {
3177 /* ipw2100_handle_event(dev); */
3178 priv->inta_other++;
3179 write_register(
3180 dev, IPW_REG_INTA,
3181 IPW2100_INTA_EVENT_INTERRUPT);
3182 }
3183
3184 if (inta & IPW2100_INTA_FW_INIT_DONE) {
3185 IPW_DEBUG_ISR("FW init done interrupt\n");
3186 priv->inta_other++;
3187
3188 read_register(dev, IPW_REG_INTA, &tmp);
3189 if (tmp & (IPW2100_INTA_FATAL_ERROR |
3190 IPW2100_INTA_PARITY_ERROR)) {
3191 write_register(
3192 dev, IPW_REG_INTA,
3193 IPW2100_INTA_FATAL_ERROR |
3194 IPW2100_INTA_PARITY_ERROR);
3195 }
3196
3197 write_register(dev, IPW_REG_INTA,
3198 IPW2100_INTA_FW_INIT_DONE);
3199 }
3200
3201 if (inta & IPW2100_INTA_STATUS_CHANGE) {
3202 IPW_DEBUG_ISR("Status change interrupt\n");
3203 priv->inta_other++;
3204 write_register(
3205 dev, IPW_REG_INTA,
3206 IPW2100_INTA_STATUS_CHANGE);
3207 }
3208
3209 if (inta & IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE) {
3210 IPW_DEBUG_ISR("slave host mode interrupt\n");
3211 priv->inta_other++;
3212 write_register(
3213 dev, IPW_REG_INTA,
3214 IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE);
3215 }
3216
3217 priv->in_isr--;
3218 ipw2100_enable_interrupts(priv);
3219
3220 spin_unlock_irqrestore(&priv->low_lock, flags);
3221
3222 IPW_DEBUG_ISR("exit\n");
3223}
3224
3225
3226static irqreturn_t ipw2100_interrupt(int irq, void *data,
3227 struct pt_regs *regs)
3228{
3229 struct ipw2100_priv *priv = data;
3230 u32 inta, inta_mask;
3231
3232 if (!data)
3233 return IRQ_NONE;
3234
3235 spin_lock(&priv->low_lock);
3236
3237 /* We check to see if we should be ignoring interrupts before
3238 * we touch the hardware. During ucode load if we try and handle
3239 * an interrupt we can cause keyboard problems as well as cause
3240 * the ucode to fail to initialize */
3241 if (!(priv->status & STATUS_INT_ENABLED)) {
3242 /* Shared IRQ */
3243 goto none;
3244 }
3245
3246 read_register(priv->net_dev, IPW_REG_INTA_MASK, &inta_mask);
3247 read_register(priv->net_dev, IPW_REG_INTA, &inta);
3248
3249 if (inta == 0xFFFFFFFF) {
3250 /* Hardware disappeared */
3251 printk(KERN_WARNING DRV_NAME ": IRQ INTA == 0xFFFFFFFF\n");
3252 goto none;
3253 }
3254
3255 inta &= IPW_INTERRUPT_MASK;
3256
3257 if (!(inta & inta_mask)) {
3258 /* Shared interrupt */
3259 goto none;
3260 }
3261
3262 /* We disable the hardware interrupt here just to prevent unneeded
3263 * calls to be made. We disable this again within the actual
3264 * work tasklet, so if another part of the code re-enables the
3265 * interrupt, that is fine */
3266 ipw2100_disable_interrupts(priv);
3267
3268 tasklet_schedule(&priv->irq_tasklet);
3269 spin_unlock(&priv->low_lock);
3270
3271 return IRQ_HANDLED;
3272 none:
3273 spin_unlock(&priv->low_lock);
3274 return IRQ_NONE;
3275}
3276
3277static int ipw2100_tx(struct ieee80211_txb *txb, struct net_device *dev)
3278{
3279 struct ipw2100_priv *priv = ieee80211_priv(dev);
3280 struct list_head *element;
3281 struct ipw2100_tx_packet *packet;
3282 unsigned long flags;
3283
3284 spin_lock_irqsave(&priv->low_lock, flags);
3285
3286 if (!(priv->status & STATUS_ASSOCIATED)) {
3287 IPW_DEBUG_INFO("Can not transmit when not connected.\n");
3288 priv->ieee->stats.tx_carrier_errors++;
3289 netif_stop_queue(dev);
3290 goto fail_unlock;
3291 }
3292
3293 if (list_empty(&priv->tx_free_list))
3294 goto fail_unlock;
3295
3296 element = priv->tx_free_list.next;
3297 packet = list_entry(element, struct ipw2100_tx_packet, list);
3298
3299 packet->info.d_struct.txb = txb;
3300
3301 IPW_DEBUG_TX("Sending fragment (%d bytes):\n",
3302 txb->fragments[0]->len);
3303 printk_buf(IPW_DL_TX, txb->fragments[0]->data,
3304 txb->fragments[0]->len);
3305
3306 packet->jiffy_start = jiffies;
3307
3308 list_del(element);
3309 DEC_STAT(&priv->tx_free_stat);
3310
3311 list_add_tail(element, &priv->tx_pend_list);
3312 INC_STAT(&priv->tx_pend_stat);
3313
3314 ipw2100_tx_send_data(priv);
3315
3316 spin_unlock_irqrestore(&priv->low_lock, flags);
3317 return 0;
3318
3319 fail_unlock:
3320 netif_stop_queue(dev);
3321 spin_unlock_irqrestore(&priv->low_lock, flags);
3322 return 1;
3323}
3324
3325
3326static int ipw2100_msg_allocate(struct ipw2100_priv *priv)
3327{
3328 int i, j, err = -EINVAL;
3329 void *v;
3330 dma_addr_t p;
3331
3332 priv->msg_buffers = (struct ipw2100_tx_packet *)kmalloc(
3333 IPW_COMMAND_POOL_SIZE * sizeof(struct ipw2100_tx_packet),
3334 GFP_KERNEL);
3335 if (!priv->msg_buffers) {
3336 printk(KERN_ERR DRV_NAME ": %s: PCI alloc failed for msg "
3337 "buffers.\n", priv->net_dev->name);
3338 return -ENOMEM;
3339 }
3340
3341 for (i = 0; i < IPW_COMMAND_POOL_SIZE; i++) {
3342 v = pci_alloc_consistent(
3343 priv->pci_dev,
3344 sizeof(struct ipw2100_cmd_header),
3345 &p);
3346 if (!v) {
3347 printk(KERN_ERR DRV_NAME ": "
3348 "%s: PCI alloc failed for msg "
3349 "buffers.\n",
3350 priv->net_dev->name);
3351 err = -ENOMEM;
3352 break;
3353 }
3354
3355 memset(v, 0, sizeof(struct ipw2100_cmd_header));
3356
3357 priv->msg_buffers[i].type = COMMAND;
3358 priv->msg_buffers[i].info.c_struct.cmd =
3359 (struct ipw2100_cmd_header*)v;
3360 priv->msg_buffers[i].info.c_struct.cmd_phys = p;
3361 }
3362
3363 if (i == IPW_COMMAND_POOL_SIZE)
3364 return 0;
3365
3366 for (j = 0; j < i; j++) {
3367 pci_free_consistent(
3368 priv->pci_dev,
3369 sizeof(struct ipw2100_cmd_header),
3370 priv->msg_buffers[j].info.c_struct.cmd,
3371 priv->msg_buffers[j].info.c_struct.cmd_phys);
3372 }
3373
3374 kfree(priv->msg_buffers);
3375 priv->msg_buffers = NULL;
3376
3377 return err;
3378}
3379
3380static int ipw2100_msg_initialize(struct ipw2100_priv *priv)
3381{
3382 int i;
3383
3384 INIT_LIST_HEAD(&priv->msg_free_list);
3385 INIT_LIST_HEAD(&priv->msg_pend_list);
3386
3387 for (i = 0; i < IPW_COMMAND_POOL_SIZE; i++)
3388 list_add_tail(&priv->msg_buffers[i].list, &priv->msg_free_list);
3389 SET_STAT(&priv->msg_free_stat, i);
3390
3391 return 0;
3392}
3393
3394static void ipw2100_msg_free(struct ipw2100_priv *priv)
3395{
3396 int i;
3397
3398 if (!priv->msg_buffers)
3399 return;
3400
3401 for (i = 0; i < IPW_COMMAND_POOL_SIZE; i++) {
3402 pci_free_consistent(priv->pci_dev,
3403 sizeof(struct ipw2100_cmd_header),
3404 priv->msg_buffers[i].info.c_struct.cmd,
3405 priv->msg_buffers[i].info.c_struct.cmd_phys);
3406 }
3407
3408 kfree(priv->msg_buffers);
3409 priv->msg_buffers = NULL;
3410}
3411
3412static ssize_t show_pci(struct device *d, struct device_attribute *attr,
3413 char *buf)
3414{
3415 struct pci_dev *pci_dev = container_of(d, struct pci_dev, dev);
3416 char *out = buf;
3417 int i, j;
3418 u32 val;
3419
3420 for (i = 0; i < 16; i++) {
3421 out += sprintf(out, "[%08X] ", i * 16);
3422 for (j = 0; j < 16; j += 4) {
3423 pci_read_config_dword(pci_dev, i * 16 + j, &val);
3424 out += sprintf(out, "%08X ", val);
3425 }
3426 out += sprintf(out, "\n");
3427 }
3428
3429 return out - buf;
3430}
3431static DEVICE_ATTR(pci, S_IRUGO, show_pci, NULL);
3432
3433static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
3434 char *buf)
3435{
3436 struct ipw2100_priv *p = d->driver_data;
3437 return sprintf(buf, "0x%08x\n", (int)p->config);
3438}
3439static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL);
3440
3441static ssize_t show_status(struct device *d, struct device_attribute *attr,
3442 char *buf)
3443{
3444 struct ipw2100_priv *p = d->driver_data;
3445 return sprintf(buf, "0x%08x\n", (int)p->status);
3446}
3447static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3448
3449static ssize_t show_capability(struct device *d, struct device_attribute *attr,
3450 char *buf)
3451{
3452 struct ipw2100_priv *p = d->driver_data;
3453 return sprintf(buf, "0x%08x\n", (int)p->capability);
3454}
3455static DEVICE_ATTR(capability, S_IRUGO, show_capability, NULL);
3456
3457
3458#define IPW2100_REG(x) { IPW_ ##x, #x }
3459static const struct {
3460 u32 addr;
3461 const char *name;
3462} hw_data[] = {
3463 IPW2100_REG(REG_GP_CNTRL),
3464 IPW2100_REG(REG_GPIO),
3465 IPW2100_REG(REG_INTA),
3466 IPW2100_REG(REG_INTA_MASK),
3467 IPW2100_REG(REG_RESET_REG),
3468};
3469#define IPW2100_NIC(x, s) { x, #x, s }
3470static const struct {
3471 u32 addr;
3472 const char *name;
3473 size_t size;
3474} nic_data[] = {
3475 IPW2100_NIC(IPW2100_CONTROL_REG, 2),
3476 IPW2100_NIC(0x210014, 1),
3477 IPW2100_NIC(0x210000, 1),
3478};
3479#define IPW2100_ORD(x, d) { IPW_ORD_ ##x, #x, d }
3480static const struct {
3481 u8 index;
3482 const char *name;
3483 const char *desc;
3484} ord_data[] = {
3485 IPW2100_ORD(STAT_TX_HOST_REQUESTS, "requested Host Tx's (MSDU)"),
3486 IPW2100_ORD(STAT_TX_HOST_COMPLETE, "successful Host Tx's (MSDU)"),
3487 IPW2100_ORD(STAT_TX_DIR_DATA, "successful Directed Tx's (MSDU)"),
3488 IPW2100_ORD(STAT_TX_DIR_DATA1, "successful Directed Tx's (MSDU) @ 1MB"),
3489 IPW2100_ORD(STAT_TX_DIR_DATA2, "successful Directed Tx's (MSDU) @ 2MB"),
3490 IPW2100_ORD(STAT_TX_DIR_DATA5_5, "successful Directed Tx's (MSDU) @ 5_5MB"),
3491 IPW2100_ORD(STAT_TX_DIR_DATA11, "successful Directed Tx's (MSDU) @ 11MB"),
3492 IPW2100_ORD(STAT_TX_NODIR_DATA1, "successful Non_Directed Tx's (MSDU) @ 1MB"),
3493 IPW2100_ORD(STAT_TX_NODIR_DATA2, "successful Non_Directed Tx's (MSDU) @ 2MB"),
3494 IPW2100_ORD(STAT_TX_NODIR_DATA5_5, "successful Non_Directed Tx's (MSDU) @ 5.5MB"),
3495 IPW2100_ORD(STAT_TX_NODIR_DATA11, "successful Non_Directed Tx's (MSDU) @ 11MB"),
3496 IPW2100_ORD(STAT_NULL_DATA, "successful NULL data Tx's"),
3497 IPW2100_ORD(STAT_TX_RTS, "successful Tx RTS"),
3498 IPW2100_ORD(STAT_TX_CTS, "successful Tx CTS"),
3499 IPW2100_ORD(STAT_TX_ACK, "successful Tx ACK"),
3500 IPW2100_ORD(STAT_TX_ASSN, "successful Association Tx's"),
3501 IPW2100_ORD(STAT_TX_ASSN_RESP, "successful Association response Tx's"),
3502 IPW2100_ORD(STAT_TX_REASSN, "successful Reassociation Tx's"),
3503 IPW2100_ORD(STAT_TX_REASSN_RESP, "successful Reassociation response Tx's"),
3504 IPW2100_ORD(STAT_TX_PROBE, "probes successfully transmitted"),
3505 IPW2100_ORD(STAT_TX_PROBE_RESP, "probe responses successfully transmitted"),
3506 IPW2100_ORD(STAT_TX_BEACON, "tx beacon"),
3507 IPW2100_ORD(STAT_TX_ATIM, "Tx ATIM"),
3508 IPW2100_ORD(STAT_TX_DISASSN, "successful Disassociation TX"),
3509 IPW2100_ORD(STAT_TX_AUTH, "successful Authentication Tx"),
3510 IPW2100_ORD(STAT_TX_DEAUTH, "successful Deauthentication TX"),
3511 IPW2100_ORD(STAT_TX_TOTAL_BYTES, "Total successful Tx data bytes"),
3512 IPW2100_ORD(STAT_TX_RETRIES, "Tx retries"),
3513 IPW2100_ORD(STAT_TX_RETRY1, "Tx retries at 1MBPS"),
3514 IPW2100_ORD(STAT_TX_RETRY2, "Tx retries at 2MBPS"),
3515 IPW2100_ORD(STAT_TX_RETRY5_5, "Tx retries at 5.5MBPS"),
3516 IPW2100_ORD(STAT_TX_RETRY11, "Tx retries at 11MBPS"),
3517 IPW2100_ORD(STAT_TX_FAILURES, "Tx Failures"),
3518 IPW2100_ORD(STAT_TX_MAX_TRIES_IN_HOP,"times max tries in a hop failed"),
3519 IPW2100_ORD(STAT_TX_DISASSN_FAIL, "times disassociation failed"),
3520 IPW2100_ORD(STAT_TX_ERR_CTS, "missed/bad CTS frames"),
3521 IPW2100_ORD(STAT_TX_ERR_ACK, "tx err due to acks"),
3522 IPW2100_ORD(STAT_RX_HOST, "packets passed to host"),
3523 IPW2100_ORD(STAT_RX_DIR_DATA, "directed packets"),
3524 IPW2100_ORD(STAT_RX_DIR_DATA1, "directed packets at 1MB"),
3525 IPW2100_ORD(STAT_RX_DIR_DATA2, "directed packets at 2MB"),
3526 IPW2100_ORD(STAT_RX_DIR_DATA5_5, "directed packets at 5.5MB"),
3527 IPW2100_ORD(STAT_RX_DIR_DATA11, "directed packets at 11MB"),
3528 IPW2100_ORD(STAT_RX_NODIR_DATA,"nondirected packets"),
3529 IPW2100_ORD(STAT_RX_NODIR_DATA1, "nondirected packets at 1MB"),
3530 IPW2100_ORD(STAT_RX_NODIR_DATA2, "nondirected packets at 2MB"),
3531 IPW2100_ORD(STAT_RX_NODIR_DATA5_5, "nondirected packets at 5.5MB"),
3532 IPW2100_ORD(STAT_RX_NODIR_DATA11, "nondirected packets at 11MB"),
3533 IPW2100_ORD(STAT_RX_NULL_DATA, "null data rx's"),
3534 IPW2100_ORD(STAT_RX_RTS, "Rx RTS"),
3535 IPW2100_ORD(STAT_RX_CTS, "Rx CTS"),
3536 IPW2100_ORD(STAT_RX_ACK, "Rx ACK"),
3537 IPW2100_ORD(STAT_RX_CFEND, "Rx CF End"),
3538 IPW2100_ORD(STAT_RX_CFEND_ACK, "Rx CF End + CF Ack"),
3539 IPW2100_ORD(STAT_RX_ASSN, "Association Rx's"),
3540 IPW2100_ORD(STAT_RX_ASSN_RESP, "Association response Rx's"),
3541 IPW2100_ORD(STAT_RX_REASSN, "Reassociation Rx's"),
3542 IPW2100_ORD(STAT_RX_REASSN_RESP, "Reassociation response Rx's"),
3543 IPW2100_ORD(STAT_RX_PROBE, "probe Rx's"),
3544 IPW2100_ORD(STAT_RX_PROBE_RESP, "probe response Rx's"),
3545 IPW2100_ORD(STAT_RX_BEACON, "Rx beacon"),
3546 IPW2100_ORD(STAT_RX_ATIM, "Rx ATIM"),
3547 IPW2100_ORD(STAT_RX_DISASSN, "disassociation Rx"),
3548 IPW2100_ORD(STAT_RX_AUTH, "authentication Rx"),
3549 IPW2100_ORD(STAT_RX_DEAUTH, "deauthentication Rx"),
3550 IPW2100_ORD(STAT_RX_TOTAL_BYTES,"Total rx data bytes received"),
3551 IPW2100_ORD(STAT_RX_ERR_CRC, "packets with Rx CRC error"),
3552 IPW2100_ORD(STAT_RX_ERR_CRC1, "Rx CRC errors at 1MB"),
3553 IPW2100_ORD(STAT_RX_ERR_CRC2, "Rx CRC errors at 2MB"),
3554 IPW2100_ORD(STAT_RX_ERR_CRC5_5, "Rx CRC errors at 5.5MB"),
3555 IPW2100_ORD(STAT_RX_ERR_CRC11, "Rx CRC errors at 11MB"),
3556 IPW2100_ORD(STAT_RX_DUPLICATE1, "duplicate rx packets at 1MB"),
3557 IPW2100_ORD(STAT_RX_DUPLICATE2, "duplicate rx packets at 2MB"),
3558 IPW2100_ORD(STAT_RX_DUPLICATE5_5, "duplicate rx packets at 5.5MB"),
3559 IPW2100_ORD(STAT_RX_DUPLICATE11, "duplicate rx packets at 11MB"),
3560 IPW2100_ORD(STAT_RX_DUPLICATE, "duplicate rx packets"),
3561 IPW2100_ORD(PERS_DB_LOCK, "locking fw permanent db"),
3562 IPW2100_ORD(PERS_DB_SIZE, "size of fw permanent db"),
3563 IPW2100_ORD(PERS_DB_ADDR, "address of fw permanent db"),
3564 IPW2100_ORD(STAT_RX_INVALID_PROTOCOL, "rx frames with invalid protocol"),
3565 IPW2100_ORD(SYS_BOOT_TIME, "Boot time"),
3566 IPW2100_ORD(STAT_RX_NO_BUFFER, "rx frames rejected due to no buffer"),
3567 IPW2100_ORD(STAT_RX_MISSING_FRAG, "rx frames dropped due to missing fragment"),
3568 IPW2100_ORD(STAT_RX_ORPHAN_FRAG, "rx frames dropped due to non-sequential fragment"),
3569 IPW2100_ORD(STAT_RX_ORPHAN_FRAME, "rx frames dropped due to unmatched 1st frame"),
3570 IPW2100_ORD(STAT_RX_FRAG_AGEOUT, "rx frames dropped due to uncompleted frame"),
3571 IPW2100_ORD(STAT_RX_ICV_ERRORS, "ICV errors during decryption"),
3572 IPW2100_ORD(STAT_PSP_SUSPENSION,"times adapter suspended"),
3573 IPW2100_ORD(STAT_PSP_BCN_TIMEOUT, "beacon timeout"),
3574 IPW2100_ORD(STAT_PSP_POLL_TIMEOUT, "poll response timeouts"),
3575 IPW2100_ORD(STAT_PSP_NONDIR_TIMEOUT, "timeouts waiting for last {broad,multi}cast pkt"),
3576 IPW2100_ORD(STAT_PSP_RX_DTIMS, "PSP DTIMs received"),
3577 IPW2100_ORD(STAT_PSP_RX_TIMS, "PSP TIMs received"),
3578 IPW2100_ORD(STAT_PSP_STATION_ID,"PSP Station ID"),
3579 IPW2100_ORD(LAST_ASSN_TIME, "RTC time of last association"),
3580 IPW2100_ORD(STAT_PERCENT_MISSED_BCNS,"current calculation of % missed beacons"),
3581 IPW2100_ORD(STAT_PERCENT_RETRIES,"current calculation of % missed tx retries"),
3582 IPW2100_ORD(ASSOCIATED_AP_PTR, "0 if not associated, else pointer to AP table entry"),
3583 IPW2100_ORD(AVAILABLE_AP_CNT, "AP's decsribed in the AP table"),
3584 IPW2100_ORD(AP_LIST_PTR, "Ptr to list of available APs"),
3585 IPW2100_ORD(STAT_AP_ASSNS, "associations"),
3586 IPW2100_ORD(STAT_ASSN_FAIL, "association failures"),
3587 IPW2100_ORD(STAT_ASSN_RESP_FAIL,"failures due to response fail"),
3588 IPW2100_ORD(STAT_FULL_SCANS, "full scans"),
3589 IPW2100_ORD(CARD_DISABLED, "Card Disabled"),
3590 IPW2100_ORD(STAT_ROAM_INHIBIT, "times roaming was inhibited due to activity"),
3591 IPW2100_ORD(RSSI_AT_ASSN, "RSSI of associated AP at time of association"),
3592 IPW2100_ORD(STAT_ASSN_CAUSE1, "reassociation: no probe response or TX on hop"),
3593 IPW2100_ORD(STAT_ASSN_CAUSE2, "reassociation: poor tx/rx quality"),
3594 IPW2100_ORD(STAT_ASSN_CAUSE3, "reassociation: tx/rx quality (excessive AP load"),
3595 IPW2100_ORD(STAT_ASSN_CAUSE4, "reassociation: AP RSSI level"),
3596 IPW2100_ORD(STAT_ASSN_CAUSE5, "reassociations due to load leveling"),
3597 IPW2100_ORD(STAT_AUTH_FAIL, "times authentication failed"),
3598 IPW2100_ORD(STAT_AUTH_RESP_FAIL,"times authentication response failed"),
3599 IPW2100_ORD(STATION_TABLE_CNT, "entries in association table"),
3600 IPW2100_ORD(RSSI_AVG_CURR, "Current avg RSSI"),
3601 IPW2100_ORD(POWER_MGMT_MODE, "Power mode - 0=CAM, 1=PSP"),
3602 IPW2100_ORD(COUNTRY_CODE, "IEEE country code as recv'd from beacon"),
3603 IPW2100_ORD(COUNTRY_CHANNELS, "channels suported by country"),
3604 IPW2100_ORD(RESET_CNT, "adapter resets (warm)"),
3605 IPW2100_ORD(BEACON_INTERVAL, "Beacon interval"),
3606 IPW2100_ORD(ANTENNA_DIVERSITY, "TRUE if antenna diversity is disabled"),
3607 IPW2100_ORD(DTIM_PERIOD, "beacon intervals between DTIMs"),
3608 IPW2100_ORD(OUR_FREQ, "current radio freq lower digits - channel ID"),
3609 IPW2100_ORD(RTC_TIME, "current RTC time"),
3610 IPW2100_ORD(PORT_TYPE, "operating mode"),
3611 IPW2100_ORD(CURRENT_TX_RATE, "current tx rate"),
3612 IPW2100_ORD(SUPPORTED_RATES, "supported tx rates"),
3613 IPW2100_ORD(ATIM_WINDOW, "current ATIM Window"),
3614 IPW2100_ORD(BASIC_RATES, "basic tx rates"),
3615 IPW2100_ORD(NIC_HIGHEST_RATE, "NIC highest tx rate"),
3616 IPW2100_ORD(AP_HIGHEST_RATE, "AP highest tx rate"),
3617 IPW2100_ORD(CAPABILITIES, "Management frame capability field"),
3618 IPW2100_ORD(AUTH_TYPE, "Type of authentication"),
3619 IPW2100_ORD(RADIO_TYPE, "Adapter card platform type"),
3620 IPW2100_ORD(RTS_THRESHOLD, "Min packet length for RTS handshaking"),
3621 IPW2100_ORD(INT_MODE, "International mode"),
3622 IPW2100_ORD(FRAGMENTATION_THRESHOLD, "protocol frag threshold"),
3623 IPW2100_ORD(EEPROM_SRAM_DB_BLOCK_START_ADDRESS, "EEPROM offset in SRAM"),
3624 IPW2100_ORD(EEPROM_SRAM_DB_BLOCK_SIZE, "EEPROM size in SRAM"),
3625 IPW2100_ORD(EEPROM_SKU_CAPABILITY, "EEPROM SKU Capability"),
3626 IPW2100_ORD(EEPROM_IBSS_11B_CHANNELS, "EEPROM IBSS 11b channel set"),
3627 IPW2100_ORD(MAC_VERSION, "MAC Version"),
3628 IPW2100_ORD(MAC_REVISION, "MAC Revision"),
3629 IPW2100_ORD(RADIO_VERSION, "Radio Version"),
3630 IPW2100_ORD(NIC_MANF_DATE_TIME, "MANF Date/Time STAMP"),
3631 IPW2100_ORD(UCODE_VERSION, "Ucode Version"),
3632};
3633
3634
3635static ssize_t show_registers(struct device *d, struct device_attribute *attr,
3636 char *buf)
3637{
3638 int i;
3639 struct ipw2100_priv *priv = dev_get_drvdata(d);
3640 struct net_device *dev = priv->net_dev;
3641 char * out = buf;
3642 u32 val = 0;
3643
3644 out += sprintf(out, "%30s [Address ] : Hex\n", "Register");
3645
3646 for (i = 0; i < (sizeof(hw_data) / sizeof(*hw_data)); i++) {
3647 read_register(dev, hw_data[i].addr, &val);
3648 out += sprintf(out, "%30s [%08X] : %08X\n",
3649 hw_data[i].name, hw_data[i].addr, val);
3650 }
3651
3652 return out - buf;
3653}
3654static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL);
3655
3656
3657static ssize_t show_hardware(struct device *d, struct device_attribute *attr,
3658 char *buf)
3659{
3660 struct ipw2100_priv *priv = dev_get_drvdata(d);
3661 struct net_device *dev = priv->net_dev;
3662 char * out = buf;
3663 int i;
3664
3665 out += sprintf(out, "%30s [Address ] : Hex\n", "NIC entry");
3666
3667 for (i = 0; i < (sizeof(nic_data) / sizeof(*nic_data)); i++) {
3668 u8 tmp8;
3669 u16 tmp16;
3670 u32 tmp32;
3671
3672 switch (nic_data[i].size) {
3673 case 1:
3674 read_nic_byte(dev, nic_data[i].addr, &tmp8);
3675 out += sprintf(out, "%30s [%08X] : %02X\n",
3676 nic_data[i].name, nic_data[i].addr,
3677 tmp8);
3678 break;
3679 case 2:
3680 read_nic_word(dev, nic_data[i].addr, &tmp16);
3681 out += sprintf(out, "%30s [%08X] : %04X\n",
3682 nic_data[i].name, nic_data[i].addr,
3683 tmp16);
3684 break;
3685 case 4:
3686 read_nic_dword(dev, nic_data[i].addr, &tmp32);
3687 out += sprintf(out, "%30s [%08X] : %08X\n",
3688 nic_data[i].name, nic_data[i].addr,
3689 tmp32);
3690 break;
3691 }
3692 }
3693 return out - buf;
3694}
3695static DEVICE_ATTR(hardware, S_IRUGO, show_hardware, NULL);
3696
3697
3698static ssize_t show_memory(struct device *d, struct device_attribute *attr,
3699 char *buf)
3700{
3701 struct ipw2100_priv *priv = dev_get_drvdata(d);
3702 struct net_device *dev = priv->net_dev;
3703 static unsigned long loop = 0;
3704 int len = 0;
3705 u32 buffer[4];
3706 int i;
3707 char line[81];
3708
3709 if (loop >= 0x30000)
3710 loop = 0;
3711
3712 /* sysfs provides us PAGE_SIZE buffer */
3713 while (len < PAGE_SIZE - 128 && loop < 0x30000) {
3714
3715 if (priv->snapshot[0]) for (i = 0; i < 4; i++)
3716 buffer[i] = *(u32 *)SNAPSHOT_ADDR(loop + i * 4);
3717 else for (i = 0; i < 4; i++)
3718 read_nic_dword(dev, loop + i * 4, &buffer[i]);
3719
3720 if (priv->dump_raw)
3721 len += sprintf(buf + len,
3722 "%c%c%c%c"
3723 "%c%c%c%c"
3724 "%c%c%c%c"
3725 "%c%c%c%c",
3726 ((u8*)buffer)[0x0],
3727 ((u8*)buffer)[0x1],
3728 ((u8*)buffer)[0x2],
3729 ((u8*)buffer)[0x3],
3730 ((u8*)buffer)[0x4],
3731 ((u8*)buffer)[0x5],
3732 ((u8*)buffer)[0x6],
3733 ((u8*)buffer)[0x7],
3734 ((u8*)buffer)[0x8],
3735 ((u8*)buffer)[0x9],
3736 ((u8*)buffer)[0xa],
3737 ((u8*)buffer)[0xb],
3738 ((u8*)buffer)[0xc],
3739 ((u8*)buffer)[0xd],
3740 ((u8*)buffer)[0xe],
3741 ((u8*)buffer)[0xf]);
3742 else
3743 len += sprintf(buf + len, "%s\n",
3744 snprint_line(line, sizeof(line),
3745 (u8*)buffer, 16, loop));
3746 loop += 16;
3747 }
3748
3749 return len;
3750}
3751
3752static ssize_t store_memory(struct device *d, struct device_attribute *attr,
3753 const char *buf, size_t count)
3754{
3755 struct ipw2100_priv *priv = dev_get_drvdata(d);
3756 struct net_device *dev = priv->net_dev;
3757 const char *p = buf;
3758
3759 if (count < 1)
3760 return count;
3761
3762 if (p[0] == '1' ||
3763 (count >= 2 && tolower(p[0]) == 'o' && tolower(p[1]) == 'n')) {
3764 IPW_DEBUG_INFO("%s: Setting memory dump to RAW mode.\n",
3765 dev->name);
3766 priv->dump_raw = 1;
3767
3768 } else if (p[0] == '0' || (count >= 2 && tolower(p[0]) == 'o' &&
3769 tolower(p[1]) == 'f')) {
3770 IPW_DEBUG_INFO("%s: Setting memory dump to HEX mode.\n",
3771 dev->name);
3772 priv->dump_raw = 0;
3773
3774 } else if (tolower(p[0]) == 'r') {
3775 IPW_DEBUG_INFO("%s: Resetting firmware snapshot.\n",
3776 dev->name);
3777 ipw2100_snapshot_free(priv);
3778
3779 } else
3780 IPW_DEBUG_INFO("%s: Usage: 0|on = HEX, 1|off = RAW, "
3781 "reset = clear memory snapshot\n",
3782 dev->name);
3783
3784 return count;
3785}
3786static DEVICE_ATTR(memory, S_IWUSR|S_IRUGO, show_memory, store_memory);
3787
3788
3789static ssize_t show_ordinals(struct device *d, struct device_attribute *attr,
3790 char *buf)
3791{
3792 struct ipw2100_priv *priv = dev_get_drvdata(d);
3793 u32 val = 0;
3794 int len = 0;
3795 u32 val_len;
3796 static int loop = 0;
3797
3798 if (loop >= sizeof(ord_data) / sizeof(*ord_data))
3799 loop = 0;
3800
3801 /* sysfs provides us PAGE_SIZE buffer */
3802 while (len < PAGE_SIZE - 128 &&
3803 loop < (sizeof(ord_data) / sizeof(*ord_data))) {
3804
3805 val_len = sizeof(u32);
3806
3807 if (ipw2100_get_ordinal(priv, ord_data[loop].index, &val,
3808 &val_len))
3809 len += sprintf(buf + len, "[0x%02X] = ERROR %s\n",
3810 ord_data[loop].index,
3811 ord_data[loop].desc);
3812 else
3813 len += sprintf(buf + len, "[0x%02X] = 0x%08X %s\n",
3814 ord_data[loop].index, val,
3815 ord_data[loop].desc);
3816 loop++;
3817 }
3818
3819 return len;
3820}
3821static DEVICE_ATTR(ordinals, S_IRUGO, show_ordinals, NULL);
3822
3823
3824static ssize_t show_stats(struct device *d, struct device_attribute *attr,
3825 char *buf)
3826{
3827 struct ipw2100_priv *priv = dev_get_drvdata(d);
3828 char * out = buf;
3829
3830 out += sprintf(out, "interrupts: %d {tx: %d, rx: %d, other: %d}\n",
3831 priv->interrupts, priv->tx_interrupts,
3832 priv->rx_interrupts, priv->inta_other);
3833 out += sprintf(out, "firmware resets: %d\n", priv->resets);
3834 out += sprintf(out, "firmware hangs: %d\n", priv->hangs);
3835#ifdef CONFIG_IPW_DEBUG
3836 out += sprintf(out, "packet mismatch image: %s\n",
3837 priv->snapshot[0] ? "YES" : "NO");
3838#endif
3839
3840 return out - buf;
3841}
3842static DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
3843
3844
3845static int ipw2100_switch_mode(struct ipw2100_priv *priv, u32 mode)
3846{
3847 int err;
3848
3849 if (mode == priv->ieee->iw_mode)
3850 return 0;
3851
3852 err = ipw2100_disable_adapter(priv);
3853 if (err) {
3854 printk(KERN_ERR DRV_NAME ": %s: Could not disable adapter %d\n",
3855 priv->net_dev->name, err);
3856 return err;
3857 }
3858
3859 switch (mode) {
3860 case IW_MODE_INFRA:
3861 priv->net_dev->type = ARPHRD_ETHER;
3862 break;
3863 case IW_MODE_ADHOC:
3864 priv->net_dev->type = ARPHRD_ETHER;
3865 break;
3866#ifdef CONFIG_IPW2100_MONITOR
3867 case IW_MODE_MONITOR:
3868 priv->last_mode = priv->ieee->iw_mode;
3869 priv->net_dev->type = ARPHRD_IEEE80211;
3870 break;
3871#endif /* CONFIG_IPW2100_MONITOR */
3872 }
3873
3874 priv->ieee->iw_mode = mode;
3875
3876#ifdef CONFIG_PM
3877 /* Indicate ipw2100_download_firmware download firmware
3878 * from disk instead of memory. */
3879 ipw2100_firmware.version = 0;
3880#endif
3881
3882 printk(KERN_INFO "%s: Reseting on mode change.\n",
3883 priv->net_dev->name);
3884 priv->reset_backoff = 0;
3885 schedule_reset(priv);
3886
3887 return 0;
3888}
3889
3890static ssize_t show_internals(struct device *d, struct device_attribute *attr,
3891 char *buf)
3892{
3893 struct ipw2100_priv *priv = dev_get_drvdata(d);
3894 int len = 0;
3895
3896#define DUMP_VAR(x,y) len += sprintf(buf + len, # x ": %" # y "\n", priv-> x)
3897
3898 if (priv->status & STATUS_ASSOCIATED)
3899 len += sprintf(buf + len, "connected: %lu\n",
3900 get_seconds() - priv->connect_start);
3901 else
3902 len += sprintf(buf + len, "not connected\n");
3903
3904 DUMP_VAR(ieee->crypt[priv->ieee->tx_keyidx], p);
3905 DUMP_VAR(status, 08lx);
3906 DUMP_VAR(config, 08lx);
3907 DUMP_VAR(capability, 08lx);
3908
3909 len += sprintf(buf + len, "last_rtc: %lu\n", (unsigned long)priv->last_rtc);
3910
3911 DUMP_VAR(fatal_error, d);
3912 DUMP_VAR(stop_hang_check, d);
3913 DUMP_VAR(stop_rf_kill, d);
3914 DUMP_VAR(messages_sent, d);
3915
3916 DUMP_VAR(tx_pend_stat.value, d);
3917 DUMP_VAR(tx_pend_stat.hi, d);
3918
3919 DUMP_VAR(tx_free_stat.value, d);
3920 DUMP_VAR(tx_free_stat.lo, d);
3921
3922 DUMP_VAR(msg_free_stat.value, d);
3923 DUMP_VAR(msg_free_stat.lo, d);
3924
3925 DUMP_VAR(msg_pend_stat.value, d);
3926 DUMP_VAR(msg_pend_stat.hi, d);
3927
3928 DUMP_VAR(fw_pend_stat.value, d);
3929 DUMP_VAR(fw_pend_stat.hi, d);
3930
3931 DUMP_VAR(txq_stat.value, d);
3932 DUMP_VAR(txq_stat.lo, d);
3933
3934 DUMP_VAR(ieee->scans, d);
3935 DUMP_VAR(reset_backoff, d);
3936
3937 return len;
3938}
3939static DEVICE_ATTR(internals, S_IRUGO, show_internals, NULL);
3940
3941
3942static ssize_t show_bssinfo(struct device *d, struct device_attribute *attr,
3943 char *buf)
3944{
3945 struct ipw2100_priv *priv = dev_get_drvdata(d);
3946 char essid[IW_ESSID_MAX_SIZE + 1];
3947 u8 bssid[ETH_ALEN];
3948 u32 chan = 0;
3949 char * out = buf;
3950 int length;
3951 int ret;
3952
3953 memset(essid, 0, sizeof(essid));
3954 memset(bssid, 0, sizeof(bssid));
3955
3956 length = IW_ESSID_MAX_SIZE;
3957 ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_SSID, essid, &length);
3958 if (ret)
3959 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
3960 __LINE__);
3961
3962 length = sizeof(bssid);
3963 ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID,
3964 bssid, &length);
3965 if (ret)
3966 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
3967 __LINE__);
3968
3969 length = sizeof(u32);
3970 ret = ipw2100_get_ordinal(priv, IPW_ORD_OUR_FREQ, &chan, &length);
3971 if (ret)
3972 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
3973 __LINE__);
3974
3975 out += sprintf(out, "ESSID: %s\n", essid);
3976 out += sprintf(out, "BSSID: %02x:%02x:%02x:%02x:%02x:%02x\n",
3977 bssid[0], bssid[1], bssid[2],
3978 bssid[3], bssid[4], bssid[5]);
3979 out += sprintf(out, "Channel: %d\n", chan);
3980
3981 return out - buf;
3982}
3983static DEVICE_ATTR(bssinfo, S_IRUGO, show_bssinfo, NULL);
3984
3985
3986#ifdef CONFIG_IPW_DEBUG
3987static ssize_t show_debug_level(struct device_driver *d, char *buf)
3988{
3989 return sprintf(buf, "0x%08X\n", ipw2100_debug_level);
3990}
3991
3992static ssize_t store_debug_level(struct device_driver *d, const char *buf,
3993 size_t count)
3994{
3995 char *p = (char *)buf;
3996 u32 val;
3997
3998 if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
3999 p++;
4000 if (p[0] == 'x' || p[0] == 'X')
4001 p++;
4002 val = simple_strtoul(p, &p, 16);
4003 } else
4004 val = simple_strtoul(p, &p, 10);
4005 if (p == buf)
4006 IPW_DEBUG_INFO(DRV_NAME
4007 ": %s is not in hex or decimal form.\n", buf);
4008 else
4009 ipw2100_debug_level = val;
4010
4011 return strnlen(buf, count);
4012}
4013static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, show_debug_level,
4014 store_debug_level);
4015#endif /* CONFIG_IPW_DEBUG */
4016
4017
4018static ssize_t show_fatal_error(struct device *d,
4019 struct device_attribute *attr, char *buf)
4020{
4021 struct ipw2100_priv *priv = dev_get_drvdata(d);
4022 char *out = buf;
4023 int i;
4024
4025 if (priv->fatal_error)
4026 out += sprintf(out, "0x%08X\n",
4027 priv->fatal_error);
4028 else
4029 out += sprintf(out, "0\n");
4030
4031 for (i = 1; i <= IPW2100_ERROR_QUEUE; i++) {
4032 if (!priv->fatal_errors[(priv->fatal_index - i) %
4033 IPW2100_ERROR_QUEUE])
4034 continue;
4035
4036 out += sprintf(out, "%d. 0x%08X\n", i,
4037 priv->fatal_errors[(priv->fatal_index - i) %
4038 IPW2100_ERROR_QUEUE]);
4039 }
4040
4041 return out - buf;
4042}
4043
4044static ssize_t store_fatal_error(struct device *d,
4045 struct device_attribute *attr, const char *buf, size_t count)
4046{
4047 struct ipw2100_priv *priv = dev_get_drvdata(d);
4048 schedule_reset(priv);
4049 return count;
4050}
4051static DEVICE_ATTR(fatal_error, S_IWUSR|S_IRUGO, show_fatal_error, store_fatal_error);
4052
4053
4054static ssize_t show_scan_age(struct device *d, struct device_attribute *attr,
4055 char *buf)
4056{
4057 struct ipw2100_priv *priv = dev_get_drvdata(d);
4058 return sprintf(buf, "%d\n", priv->ieee->scan_age);
4059}
4060
4061static ssize_t store_scan_age(struct device *d, struct device_attribute *attr,
4062 const char *buf, size_t count)
4063{
4064 struct ipw2100_priv *priv = dev_get_drvdata(d);
4065 struct net_device *dev = priv->net_dev;
4066 char buffer[] = "00000000";
4067 unsigned long len =
4068 (sizeof(buffer) - 1) > count ? count : sizeof(buffer) - 1;
4069 unsigned long val;
4070 char *p = buffer;
4071
4072 IPW_DEBUG_INFO("enter\n");
4073
4074 strncpy(buffer, buf, len);
4075 buffer[len] = 0;
4076
4077 if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
4078 p++;
4079 if (p[0] == 'x' || p[0] == 'X')
4080 p++;
4081 val = simple_strtoul(p, &p, 16);
4082 } else
4083 val = simple_strtoul(p, &p, 10);
4084 if (p == buffer) {
4085 IPW_DEBUG_INFO("%s: user supplied invalid value.\n",
4086 dev->name);
4087 } else {
4088 priv->ieee->scan_age = val;
4089 IPW_DEBUG_INFO("set scan_age = %u\n", priv->ieee->scan_age);
4090 }
4091
4092 IPW_DEBUG_INFO("exit\n");
4093 return len;
4094}
4095static DEVICE_ATTR(scan_age, S_IWUSR | S_IRUGO, show_scan_age, store_scan_age);
4096
4097
4098static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
4099 char *buf)
4100{
4101 /* 0 - RF kill not enabled
4102 1 - SW based RF kill active (sysfs)
4103 2 - HW based RF kill active
4104 3 - Both HW and SW baed RF kill active */
4105 struct ipw2100_priv *priv = (struct ipw2100_priv *)d->driver_data;
4106 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
4107 (rf_kill_active(priv) ? 0x2 : 0x0);
4108 return sprintf(buf, "%i\n", val);
4109}
4110
4111static int ipw_radio_kill_sw(struct ipw2100_priv *priv, int disable_radio)
4112{
4113 if ((disable_radio ? 1 : 0) ==
4114 (priv->status & STATUS_RF_KILL_SW ? 1 : 0))
4115 return 0 ;
4116
4117 IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n",
4118 disable_radio ? "OFF" : "ON");
4119
4120 down(&priv->action_sem);
4121
4122 if (disable_radio) {
4123 priv->status |= STATUS_RF_KILL_SW;
4124 ipw2100_down(priv);
4125 } else {
4126 priv->status &= ~STATUS_RF_KILL_SW;
4127 if (rf_kill_active(priv)) {
4128 IPW_DEBUG_RF_KILL("Can not turn radio back on - "
4129 "disabled by HW switch\n");
4130 /* Make sure the RF_KILL check timer is running */
4131 priv->stop_rf_kill = 0;
4132 cancel_delayed_work(&priv->rf_kill);
4133 queue_delayed_work(priv->workqueue, &priv->rf_kill,
4134 HZ);
4135 } else
4136 schedule_reset(priv);
4137 }
4138
4139 up(&priv->action_sem);
4140 return 1;
4141}
4142
4143static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr,
4144 const char *buf, size_t count)
4145{
4146 struct ipw2100_priv *priv = dev_get_drvdata(d);
4147 ipw_radio_kill_sw(priv, buf[0] == '1');
4148 return count;
4149}
4150static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill);
4151
4152
4153static struct attribute *ipw2100_sysfs_entries[] = {
4154 &dev_attr_hardware.attr,
4155 &dev_attr_registers.attr,
4156 &dev_attr_ordinals.attr,
4157 &dev_attr_pci.attr,
4158 &dev_attr_stats.attr,
4159 &dev_attr_internals.attr,
4160 &dev_attr_bssinfo.attr,
4161 &dev_attr_memory.attr,
4162 &dev_attr_scan_age.attr,
4163 &dev_attr_fatal_error.attr,
4164 &dev_attr_rf_kill.attr,
4165 &dev_attr_cfg.attr,
4166 &dev_attr_status.attr,
4167 &dev_attr_capability.attr,
4168 NULL,
4169};
4170
4171static struct attribute_group ipw2100_attribute_group = {
4172 .attrs = ipw2100_sysfs_entries,
4173};
4174
4175
4176static int status_queue_allocate(struct ipw2100_priv *priv, int entries)
4177{
4178 struct ipw2100_status_queue *q = &priv->status_queue;
4179
4180 IPW_DEBUG_INFO("enter\n");
4181
4182 q->size = entries * sizeof(struct ipw2100_status);
4183 q->drv = (struct ipw2100_status *)pci_alloc_consistent(
4184 priv->pci_dev, q->size, &q->nic);
4185 if (!q->drv) {
4186 IPW_DEBUG_WARNING(
4187 "Can not allocate status queue.\n");
4188 return -ENOMEM;
4189 }
4190
4191 memset(q->drv, 0, q->size);
4192
4193 IPW_DEBUG_INFO("exit\n");
4194
4195 return 0;
4196}
4197
4198static void status_queue_free(struct ipw2100_priv *priv)
4199{
4200 IPW_DEBUG_INFO("enter\n");
4201
4202 if (priv->status_queue.drv) {
4203 pci_free_consistent(
4204 priv->pci_dev, priv->status_queue.size,
4205 priv->status_queue.drv, priv->status_queue.nic);
4206 priv->status_queue.drv = NULL;
4207 }
4208
4209 IPW_DEBUG_INFO("exit\n");
4210}
4211
4212static int bd_queue_allocate(struct ipw2100_priv *priv,
4213 struct ipw2100_bd_queue *q, int entries)
4214{
4215 IPW_DEBUG_INFO("enter\n");
4216
4217 memset(q, 0, sizeof(struct ipw2100_bd_queue));
4218
4219 q->entries = entries;
4220 q->size = entries * sizeof(struct ipw2100_bd);
4221 q->drv = pci_alloc_consistent(priv->pci_dev, q->size, &q->nic);
4222 if (!q->drv) {
4223 IPW_DEBUG_INFO("can't allocate shared memory for buffer descriptors\n");
4224 return -ENOMEM;
4225 }
4226 memset(q->drv, 0, q->size);
4227
4228 IPW_DEBUG_INFO("exit\n");
4229
4230 return 0;
4231}
4232
4233static void bd_queue_free(struct ipw2100_priv *priv,
4234 struct ipw2100_bd_queue *q)
4235{
4236 IPW_DEBUG_INFO("enter\n");
4237
4238 if (!q)
4239 return;
4240
4241 if (q->drv) {
4242 pci_free_consistent(priv->pci_dev,
4243 q->size, q->drv, q->nic);
4244 q->drv = NULL;
4245 }
4246
4247 IPW_DEBUG_INFO("exit\n");
4248}
4249
4250static void bd_queue_initialize(
4251 struct ipw2100_priv *priv, struct ipw2100_bd_queue * q,
4252 u32 base, u32 size, u32 r, u32 w)
4253{
4254 IPW_DEBUG_INFO("enter\n");
4255
4256 IPW_DEBUG_INFO("initializing bd queue at virt=%p, phys=%08x\n", q->drv, (u32)q->nic);
4257
4258 write_register(priv->net_dev, base, q->nic);
4259 write_register(priv->net_dev, size, q->entries);
4260 write_register(priv->net_dev, r, q->oldest);
4261 write_register(priv->net_dev, w, q->next);
4262
4263 IPW_DEBUG_INFO("exit\n");
4264}
4265
4266static void ipw2100_kill_workqueue(struct ipw2100_priv *priv)
4267{
4268 if (priv->workqueue) {
4269 priv->stop_rf_kill = 1;
4270 priv->stop_hang_check = 1;
4271 cancel_delayed_work(&priv->reset_work);
4272 cancel_delayed_work(&priv->security_work);
4273 cancel_delayed_work(&priv->wx_event_work);
4274 cancel_delayed_work(&priv->hang_check);
4275 cancel_delayed_work(&priv->rf_kill);
4276 destroy_workqueue(priv->workqueue);
4277 priv->workqueue = NULL;
4278 }
4279}
4280
4281static int ipw2100_tx_allocate(struct ipw2100_priv *priv)
4282{
4283 int i, j, err = -EINVAL;
4284 void *v;
4285 dma_addr_t p;
4286
4287 IPW_DEBUG_INFO("enter\n");
4288
4289 err = bd_queue_allocate(priv, &priv->tx_queue, TX_QUEUE_LENGTH);
4290 if (err) {
4291 IPW_DEBUG_ERROR("%s: failed bd_queue_allocate\n",
4292 priv->net_dev->name);
4293 return err;
4294 }
4295
4296 priv->tx_buffers = (struct ipw2100_tx_packet *)kmalloc(
4297 TX_PENDED_QUEUE_LENGTH * sizeof(struct ipw2100_tx_packet),
4298 GFP_ATOMIC);
4299 if (!priv->tx_buffers) {
4300 printk(KERN_ERR DRV_NAME ": %s: alloc failed form tx buffers.\n",
4301 priv->net_dev->name);
4302 bd_queue_free(priv, &priv->tx_queue);
4303 return -ENOMEM;
4304 }
4305
4306 for (i = 0; i < TX_PENDED_QUEUE_LENGTH; i++) {
4307 v = pci_alloc_consistent(
4308 priv->pci_dev, sizeof(struct ipw2100_data_header), &p);
4309 if (!v) {
4310 printk(KERN_ERR DRV_NAME ": %s: PCI alloc failed for tx "
4311 "buffers.\n", priv->net_dev->name);
4312 err = -ENOMEM;
4313 break;
4314 }
4315
4316 priv->tx_buffers[i].type = DATA;
4317 priv->tx_buffers[i].info.d_struct.data = (struct ipw2100_data_header*)v;
4318 priv->tx_buffers[i].info.d_struct.data_phys = p;
4319 priv->tx_buffers[i].info.d_struct.txb = NULL;
4320 }
4321
4322 if (i == TX_PENDED_QUEUE_LENGTH)
4323 return 0;
4324
4325 for (j = 0; j < i; j++) {
4326 pci_free_consistent(
4327 priv->pci_dev,
4328 sizeof(struct ipw2100_data_header),
4329 priv->tx_buffers[j].info.d_struct.data,
4330 priv->tx_buffers[j].info.d_struct.data_phys);
4331 }
4332
4333 kfree(priv->tx_buffers);
4334 priv->tx_buffers = NULL;
4335
4336 return err;
4337}
4338
4339static void ipw2100_tx_initialize(struct ipw2100_priv *priv)
4340{
4341 int i;
4342
4343 IPW_DEBUG_INFO("enter\n");
4344
4345 /*
4346 * reinitialize packet info lists
4347 */
4348 INIT_LIST_HEAD(&priv->fw_pend_list);
4349 INIT_STAT(&priv->fw_pend_stat);
4350
4351 /*
4352 * reinitialize lists
4353 */
4354 INIT_LIST_HEAD(&priv->tx_pend_list);
4355 INIT_LIST_HEAD(&priv->tx_free_list);
4356 INIT_STAT(&priv->tx_pend_stat);
4357 INIT_STAT(&priv->tx_free_stat);
4358
4359 for (i = 0; i < TX_PENDED_QUEUE_LENGTH; i++) {
4360 /* We simply drop any SKBs that have been queued for
4361 * transmit */
4362 if (priv->tx_buffers[i].info.d_struct.txb) {
4363 ieee80211_txb_free(priv->tx_buffers[i].info.d_struct.txb);
4364 priv->tx_buffers[i].info.d_struct.txb = NULL;
4365 }
4366
4367 list_add_tail(&priv->tx_buffers[i].list, &priv->tx_free_list);
4368 }
4369
4370 SET_STAT(&priv->tx_free_stat, i);
4371
4372 priv->tx_queue.oldest = 0;
4373 priv->tx_queue.available = priv->tx_queue.entries;
4374 priv->tx_queue.next = 0;
4375 INIT_STAT(&priv->txq_stat);
4376 SET_STAT(&priv->txq_stat, priv->tx_queue.available);
4377
4378 bd_queue_initialize(priv, &priv->tx_queue,
4379 IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE,
4380 IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE,
4381 IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX,
4382 IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX);
4383
4384 IPW_DEBUG_INFO("exit\n");
4385
4386}
4387
4388static void ipw2100_tx_free(struct ipw2100_priv *priv)
4389{
4390 int i;
4391
4392 IPW_DEBUG_INFO("enter\n");
4393
4394 bd_queue_free(priv, &priv->tx_queue);
4395
4396 if (!priv->tx_buffers)
4397 return;
4398
4399 for (i = 0; i < TX_PENDED_QUEUE_LENGTH; i++) {
4400 if (priv->tx_buffers[i].info.d_struct.txb) {
4401 ieee80211_txb_free(priv->tx_buffers[i].info.d_struct.txb);
4402 priv->tx_buffers[i].info.d_struct.txb = NULL;
4403 }
4404 if (priv->tx_buffers[i].info.d_struct.data)
4405 pci_free_consistent(
4406 priv->pci_dev,
4407 sizeof(struct ipw2100_data_header),
4408 priv->tx_buffers[i].info.d_struct.data,
4409 priv->tx_buffers[i].info.d_struct.data_phys);
4410 }
4411
4412 kfree(priv->tx_buffers);
4413 priv->tx_buffers = NULL;
4414
4415 IPW_DEBUG_INFO("exit\n");
4416}
4417
4418
4419
4420static int ipw2100_rx_allocate(struct ipw2100_priv *priv)
4421{
4422 int i, j, err = -EINVAL;
4423
4424 IPW_DEBUG_INFO("enter\n");
4425
4426 err = bd_queue_allocate(priv, &priv->rx_queue, RX_QUEUE_LENGTH);
4427 if (err) {
4428 IPW_DEBUG_INFO("failed bd_queue_allocate\n");
4429 return err;
4430 }
4431
4432 err = status_queue_allocate(priv, RX_QUEUE_LENGTH);
4433 if (err) {
4434 IPW_DEBUG_INFO("failed status_queue_allocate\n");
4435 bd_queue_free(priv, &priv->rx_queue);
4436 return err;
4437 }
4438
4439 /*
4440 * allocate packets
4441 */
4442 priv->rx_buffers = (struct ipw2100_rx_packet *)
4443 kmalloc(RX_QUEUE_LENGTH * sizeof(struct ipw2100_rx_packet),
4444 GFP_KERNEL);
4445 if (!priv->rx_buffers) {
4446 IPW_DEBUG_INFO("can't allocate rx packet buffer table\n");
4447
4448 bd_queue_free(priv, &priv->rx_queue);
4449
4450 status_queue_free(priv);
4451
4452 return -ENOMEM;
4453 }
4454
4455 for (i = 0; i < RX_QUEUE_LENGTH; i++) {
4456 struct ipw2100_rx_packet *packet = &priv->rx_buffers[i];
4457
4458 err = ipw2100_alloc_skb(priv, packet);
4459 if (unlikely(err)) {
4460 err = -ENOMEM;
4461 break;
4462 }
4463
4464 /* The BD holds the cache aligned address */
4465 priv->rx_queue.drv[i].host_addr = packet->dma_addr;
4466 priv->rx_queue.drv[i].buf_length = IPW_RX_NIC_BUFFER_LENGTH;
4467 priv->status_queue.drv[i].status_fields = 0;
4468 }
4469
4470 if (i == RX_QUEUE_LENGTH)
4471 return 0;
4472
4473 for (j = 0; j < i; j++) {
4474 pci_unmap_single(priv->pci_dev, priv->rx_buffers[j].dma_addr,
4475 sizeof(struct ipw2100_rx_packet),
4476 PCI_DMA_FROMDEVICE);
4477 dev_kfree_skb(priv->rx_buffers[j].skb);
4478 }
4479
4480 kfree(priv->rx_buffers);
4481 priv->rx_buffers = NULL;
4482
4483 bd_queue_free(priv, &priv->rx_queue);
4484
4485 status_queue_free(priv);
4486
4487 return err;
4488}
4489
4490static void ipw2100_rx_initialize(struct ipw2100_priv *priv)
4491{
4492 IPW_DEBUG_INFO("enter\n");
4493
4494 priv->rx_queue.oldest = 0;
4495 priv->rx_queue.available = priv->rx_queue.entries - 1;
4496 priv->rx_queue.next = priv->rx_queue.entries - 1;
4497
4498 INIT_STAT(&priv->rxq_stat);
4499 SET_STAT(&priv->rxq_stat, priv->rx_queue.available);
4500
4501 bd_queue_initialize(priv, &priv->rx_queue,
4502 IPW_MEM_HOST_SHARED_RX_BD_BASE,
4503 IPW_MEM_HOST_SHARED_RX_BD_SIZE,
4504 IPW_MEM_HOST_SHARED_RX_READ_INDEX,
4505 IPW_MEM_HOST_SHARED_RX_WRITE_INDEX);
4506
4507 /* set up the status queue */
4508 write_register(priv->net_dev, IPW_MEM_HOST_SHARED_RX_STATUS_BASE,
4509 priv->status_queue.nic);
4510
4511 IPW_DEBUG_INFO("exit\n");
4512}
4513
4514static void ipw2100_rx_free(struct ipw2100_priv *priv)
4515{
4516 int i;
4517
4518 IPW_DEBUG_INFO("enter\n");
4519
4520 bd_queue_free(priv, &priv->rx_queue);
4521 status_queue_free(priv);
4522
4523 if (!priv->rx_buffers)
4524 return;
4525
4526 for (i = 0; i < RX_QUEUE_LENGTH; i++) {
4527 if (priv->rx_buffers[i].rxp) {
4528 pci_unmap_single(priv->pci_dev,
4529 priv->rx_buffers[i].dma_addr,
4530 sizeof(struct ipw2100_rx),
4531 PCI_DMA_FROMDEVICE);
4532 dev_kfree_skb(priv->rx_buffers[i].skb);
4533 }
4534 }
4535
4536 kfree(priv->rx_buffers);
4537 priv->rx_buffers = NULL;
4538
4539 IPW_DEBUG_INFO("exit\n");
4540}
4541
4542static int ipw2100_read_mac_address(struct ipw2100_priv *priv)
4543{
4544 u32 length = ETH_ALEN;
4545 u8 mac[ETH_ALEN];
4546
4547 int err;
4548
4549 err = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ADAPTER_MAC,
4550 mac, &length);
4551 if (err) {
4552 IPW_DEBUG_INFO("MAC address read failed\n");
4553 return -EIO;
4554 }
4555 IPW_DEBUG_INFO("card MAC is %02X:%02X:%02X:%02X:%02X:%02X\n",
4556 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
4557
4558 memcpy(priv->net_dev->dev_addr, mac, ETH_ALEN);
4559
4560 return 0;
4561}
4562
4563/********************************************************************
4564 *
4565 * Firmware Commands
4566 *
4567 ********************************************************************/
4568
4569static int ipw2100_set_mac_address(struct ipw2100_priv *priv, int batch_mode)
4570{
4571 struct host_command cmd = {
4572 .host_command = ADAPTER_ADDRESS,
4573 .host_command_sequence = 0,
4574 .host_command_length = ETH_ALEN
4575 };
4576 int err;
4577
4578 IPW_DEBUG_HC("SET_MAC_ADDRESS\n");
4579
4580 IPW_DEBUG_INFO("enter\n");
4581
4582 if (priv->config & CFG_CUSTOM_MAC) {
4583 memcpy(cmd.host_command_parameters, priv->mac_addr,
4584 ETH_ALEN);
4585 memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN);
4586 } else
4587 memcpy(cmd.host_command_parameters, priv->net_dev->dev_addr,
4588 ETH_ALEN);
4589
4590 err = ipw2100_hw_send_command(priv, &cmd);
4591
4592 IPW_DEBUG_INFO("exit\n");
4593 return err;
4594}
4595
4596static int ipw2100_set_port_type(struct ipw2100_priv *priv, u32 port_type,
4597 int batch_mode)
4598{
4599 struct host_command cmd = {
4600 .host_command = PORT_TYPE,
4601 .host_command_sequence = 0,
4602 .host_command_length = sizeof(u32)
4603 };
4604 int err;
4605
4606 switch (port_type) {
4607 case IW_MODE_INFRA:
4608 cmd.host_command_parameters[0] = IPW_BSS;
4609 break;
4610 case IW_MODE_ADHOC:
4611 cmd.host_command_parameters[0] = IPW_IBSS;
4612 break;
4613 }
4614
4615 IPW_DEBUG_HC("PORT_TYPE: %s\n",
4616 port_type == IPW_IBSS ? "Ad-Hoc" : "Managed");
4617
4618 if (!batch_mode) {
4619 err = ipw2100_disable_adapter(priv);
4620 if (err) {
4621 printk(KERN_ERR DRV_NAME ": %s: Could not disable adapter %d\n",
4622 priv->net_dev->name, err);
4623 return err;
4624 }
4625 }
4626
4627 /* send cmd to firmware */
4628 err = ipw2100_hw_send_command(priv, &cmd);
4629
4630 if (!batch_mode)
4631 ipw2100_enable_adapter(priv);
4632
4633 return err;
4634}
4635
4636
4637static int ipw2100_set_channel(struct ipw2100_priv *priv, u32 channel,
4638 int batch_mode)
4639{
4640 struct host_command cmd = {
4641 .host_command = CHANNEL,
4642 .host_command_sequence = 0,
4643 .host_command_length = sizeof(u32)
4644 };
4645 int err;
4646
4647 cmd.host_command_parameters[0] = channel;
4648
4649 IPW_DEBUG_HC("CHANNEL: %d\n", channel);
4650
4651 /* If BSS then we don't support channel selection */
4652 if (priv->ieee->iw_mode == IW_MODE_INFRA)
4653 return 0;
4654
4655 if ((channel != 0) &&
4656 ((channel < REG_MIN_CHANNEL) || (channel > REG_MAX_CHANNEL)))
4657 return -EINVAL;
4658
4659 if (!batch_mode) {
4660 err = ipw2100_disable_adapter(priv);
4661 if (err)
4662 return err;
4663 }
4664
4665 err = ipw2100_hw_send_command(priv, &cmd);
4666 if (err) {
4667 IPW_DEBUG_INFO("Failed to set channel to %d",
4668 channel);
4669 return err;
4670 }
4671
4672 if (channel)
4673 priv->config |= CFG_STATIC_CHANNEL;
4674 else
4675 priv->config &= ~CFG_STATIC_CHANNEL;
4676
4677 priv->channel = channel;
4678
4679 if (!batch_mode) {
4680 err = ipw2100_enable_adapter(priv);
4681 if (err)
4682 return err;
4683 }
4684
4685 return 0;
4686}
4687
4688static int ipw2100_system_config(struct ipw2100_priv *priv, int batch_mode)
4689{
4690 struct host_command cmd = {
4691 .host_command = SYSTEM_CONFIG,
4692 .host_command_sequence = 0,
4693 .host_command_length = 12,
4694 };
4695 u32 ibss_mask, len = sizeof(u32);
4696 int err;
4697
4698 /* Set system configuration */
4699
4700 if (!batch_mode) {
4701 err = ipw2100_disable_adapter(priv);
4702 if (err)
4703 return err;
4704 }
4705
4706 if (priv->ieee->iw_mode == IW_MODE_ADHOC)
4707 cmd.host_command_parameters[0] |= IPW_CFG_IBSS_AUTO_START;
4708
4709 cmd.host_command_parameters[0] |= IPW_CFG_IBSS_MASK |
4710 IPW_CFG_BSS_MASK |
4711 IPW_CFG_802_1x_ENABLE;
4712
4713 if (!(priv->config & CFG_LONG_PREAMBLE))
4714 cmd.host_command_parameters[0] |= IPW_CFG_PREAMBLE_AUTO;
4715
4716 err = ipw2100_get_ordinal(priv,
4717 IPW_ORD_EEPROM_IBSS_11B_CHANNELS,
4718 &ibss_mask, &len);
4719 if (err)
4720 ibss_mask = IPW_IBSS_11B_DEFAULT_MASK;
4721
4722 cmd.host_command_parameters[1] = REG_CHANNEL_MASK;
4723 cmd.host_command_parameters[2] = REG_CHANNEL_MASK & ibss_mask;
4724
4725 /* 11b only */
4726 /*cmd.host_command_parameters[0] |= DIVERSITY_ANTENNA_A;*/
4727
4728 err = ipw2100_hw_send_command(priv, &cmd);
4729 if (err)
4730 return err;
4731
4732/* If IPv6 is configured in the kernel then we don't want to filter out all
4733 * of the multicast packets as IPv6 needs some. */
4734#if !defined(CONFIG_IPV6) && !defined(CONFIG_IPV6_MODULE)
4735 cmd.host_command = ADD_MULTICAST;
4736 cmd.host_command_sequence = 0;
4737 cmd.host_command_length = 0;
4738
4739 ipw2100_hw_send_command(priv, &cmd);
4740#endif
4741 if (!batch_mode) {
4742 err = ipw2100_enable_adapter(priv);
4743 if (err)
4744 return err;
4745 }
4746
4747 return 0;
4748}
4749
4750static int ipw2100_set_tx_rates(struct ipw2100_priv *priv, u32 rate,
4751 int batch_mode)
4752{
4753 struct host_command cmd = {
4754 .host_command = BASIC_TX_RATES,
4755 .host_command_sequence = 0,
4756 .host_command_length = 4
4757 };
4758 int err;
4759
4760 cmd.host_command_parameters[0] = rate & TX_RATE_MASK;
4761
4762 if (!batch_mode) {
4763 err = ipw2100_disable_adapter(priv);
4764 if (err)
4765 return err;
4766 }
4767
4768 /* Set BASIC TX Rate first */
4769 ipw2100_hw_send_command(priv, &cmd);
4770
4771 /* Set TX Rate */
4772 cmd.host_command = TX_RATES;
4773 ipw2100_hw_send_command(priv, &cmd);
4774
4775 /* Set MSDU TX Rate */
4776 cmd.host_command = MSDU_TX_RATES;
4777 ipw2100_hw_send_command(priv, &cmd);
4778
4779 if (!batch_mode) {
4780 err = ipw2100_enable_adapter(priv);
4781 if (err)
4782 return err;
4783 }
4784
4785 priv->tx_rates = rate;
4786
4787 return 0;
4788}
4789
4790static int ipw2100_set_power_mode(struct ipw2100_priv *priv,
4791 int power_level)
4792{
4793 struct host_command cmd = {
4794 .host_command = POWER_MODE,
4795 .host_command_sequence = 0,
4796 .host_command_length = 4
4797 };
4798 int err;
4799
4800 cmd.host_command_parameters[0] = power_level;
4801
4802 err = ipw2100_hw_send_command(priv, &cmd);
4803 if (err)
4804 return err;
4805
4806 if (power_level == IPW_POWER_MODE_CAM)
4807 priv->power_mode = IPW_POWER_LEVEL(priv->power_mode);
4808 else
4809 priv->power_mode = IPW_POWER_ENABLED | power_level;
4810
4811#ifdef CONFIG_IPW2100_TX_POWER
4812 if (priv->port_type == IBSS &&
4813 priv->adhoc_power != DFTL_IBSS_TX_POWER) {
4814 /* Set beacon interval */
4815 cmd.host_command = TX_POWER_INDEX;
4816 cmd.host_command_parameters[0] = (u32)priv->adhoc_power;
4817
4818 err = ipw2100_hw_send_command(priv, &cmd);
4819 if (err)
4820 return err;
4821 }
4822#endif
4823
4824 return 0;
4825}
4826
4827
4828static int ipw2100_set_rts_threshold(struct ipw2100_priv *priv, u32 threshold)
4829{
4830 struct host_command cmd = {
4831 .host_command = RTS_THRESHOLD,
4832 .host_command_sequence = 0,
4833 .host_command_length = 4
4834 };
4835 int err;
4836
4837 if (threshold & RTS_DISABLED)
4838 cmd.host_command_parameters[0] = MAX_RTS_THRESHOLD;
4839 else
4840 cmd.host_command_parameters[0] = threshold & ~RTS_DISABLED;
4841
4842 err = ipw2100_hw_send_command(priv, &cmd);
4843 if (err)
4844 return err;
4845
4846 priv->rts_threshold = threshold;
4847
4848 return 0;
4849}
4850
4851#if 0
4852int ipw2100_set_fragmentation_threshold(struct ipw2100_priv *priv,
4853 u32 threshold, int batch_mode)
4854{
4855 struct host_command cmd = {
4856 .host_command = FRAG_THRESHOLD,
4857 .host_command_sequence = 0,
4858 .host_command_length = 4,
4859 .host_command_parameters[0] = 0,
4860 };
4861 int err;
4862
4863 if (!batch_mode) {
4864 err = ipw2100_disable_adapter(priv);
4865 if (err)
4866 return err;
4867 }
4868
4869 if (threshold == 0)
4870 threshold = DEFAULT_FRAG_THRESHOLD;
4871 else {
4872 threshold = max(threshold, MIN_FRAG_THRESHOLD);
4873 threshold = min(threshold, MAX_FRAG_THRESHOLD);
4874 }
4875
4876 cmd.host_command_parameters[0] = threshold;
4877
4878 IPW_DEBUG_HC("FRAG_THRESHOLD: %u\n", threshold);
4879
4880 err = ipw2100_hw_send_command(priv, &cmd);
4881
4882 if (!batch_mode)
4883 ipw2100_enable_adapter(priv);
4884
4885 if (!err)
4886 priv->frag_threshold = threshold;
4887
4888 return err;
4889}
4890#endif
4891
4892static int ipw2100_set_short_retry(struct ipw2100_priv *priv, u32 retry)
4893{
4894 struct host_command cmd = {
4895 .host_command = SHORT_RETRY_LIMIT,
4896 .host_command_sequence = 0,
4897 .host_command_length = 4
4898 };
4899 int err;
4900
4901 cmd.host_command_parameters[0] = retry;
4902
4903 err = ipw2100_hw_send_command(priv, &cmd);
4904 if (err)
4905 return err;
4906
4907 priv->short_retry_limit = retry;
4908
4909 return 0;
4910}
4911
4912static int ipw2100_set_long_retry(struct ipw2100_priv *priv, u32 retry)
4913{
4914 struct host_command cmd = {
4915 .host_command = LONG_RETRY_LIMIT,
4916 .host_command_sequence = 0,
4917 .host_command_length = 4
4918 };
4919 int err;
4920
4921 cmd.host_command_parameters[0] = retry;
4922
4923 err = ipw2100_hw_send_command(priv, &cmd);
4924 if (err)
4925 return err;
4926
4927 priv->long_retry_limit = retry;
4928
4929 return 0;
4930}
4931
4932
4933static int ipw2100_set_mandatory_bssid(struct ipw2100_priv *priv, u8 *bssid,
4934 int batch_mode)
4935{
4936 struct host_command cmd = {
4937 .host_command = MANDATORY_BSSID,
4938 .host_command_sequence = 0,
4939 .host_command_length = (bssid == NULL) ? 0 : ETH_ALEN
4940 };
4941 int err;
4942
4943#ifdef CONFIG_IPW_DEBUG
4944 if (bssid != NULL)
4945 IPW_DEBUG_HC(
4946 "MANDATORY_BSSID: %02X:%02X:%02X:%02X:%02X:%02X\n",
4947 bssid[0], bssid[1], bssid[2], bssid[3], bssid[4],
4948 bssid[5]);
4949 else
4950 IPW_DEBUG_HC("MANDATORY_BSSID: <clear>\n");
4951#endif
4952 /* if BSSID is empty then we disable mandatory bssid mode */
4953 if (bssid != NULL)
4954 memcpy((u8 *)cmd.host_command_parameters, bssid, ETH_ALEN);
4955
4956 if (!batch_mode) {
4957 err = ipw2100_disable_adapter(priv);
4958 if (err)
4959 return err;
4960 }
4961
4962 err = ipw2100_hw_send_command(priv, &cmd);
4963
4964 if (!batch_mode)
4965 ipw2100_enable_adapter(priv);
4966
4967 return err;
4968}
4969
4970#ifdef CONFIG_IEEE80211_WPA
4971static int ipw2100_disassociate_bssid(struct ipw2100_priv *priv)
4972{
4973 struct host_command cmd = {
4974 .host_command = DISASSOCIATION_BSSID,
4975 .host_command_sequence = 0,
4976 .host_command_length = ETH_ALEN
4977 };
4978 int err;
4979 int len;
4980
4981 IPW_DEBUG_HC("DISASSOCIATION_BSSID\n");
4982
4983 len = ETH_ALEN;
4984 /* The Firmware currently ignores the BSSID and just disassociates from
4985 * the currently associated AP -- but in the off chance that a future
4986 * firmware does use the BSSID provided here, we go ahead and try and
4987 * set it to the currently associated AP's BSSID */
4988 memcpy(cmd.host_command_parameters, priv->bssid, ETH_ALEN);
4989
4990 err = ipw2100_hw_send_command(priv, &cmd);
4991
4992 return err;
4993}
4994#endif
4995
4996/*
4997 * Pseudo code for setting up wpa_frame:
4998 */
4999#if 0
5000void x(struct ieee80211_assoc_frame *wpa_assoc)
5001{
5002 struct ipw2100_wpa_assoc_frame frame;
5003 frame->fixed_ie_mask = IPW_WPA_CAPABILTIES |
5004 IPW_WPA_LISTENINTERVAL |
5005 IPW_WPA_AP_ADDRESS;
5006 frame->capab_info = wpa_assoc->capab_info;
5007 frame->lisen_interval = wpa_assoc->listent_interval;
5008 memcpy(frame->current_ap, wpa_assoc->current_ap, ETH_ALEN);
5009
5010 /* UNKNOWN -- I'm not postivive about this part; don't have any WPA
5011 * setup here to test it with.
5012 *
5013 * Walk the IEs in the wpa_assoc and figure out the total size of all
5014 * that data. Stick that into frame->var_ie_len. Then memcpy() all of
5015 * the IEs from wpa_frame into frame.
5016 */
5017 frame->var_ie_len = calculate_ie_len(wpa_assoc);
5018 memcpy(frame->var_ie, wpa_assoc->variable, frame->var_ie_len);
5019
5020 ipw2100_set_wpa_ie(priv, &frame, 0);
5021}
5022#endif
5023
5024
5025
5026
5027static int ipw2100_set_wpa_ie(struct ipw2100_priv *,
5028 struct ipw2100_wpa_assoc_frame *, int)
5029__attribute__ ((unused));
5030
5031static int ipw2100_set_wpa_ie(struct ipw2100_priv *priv,
5032 struct ipw2100_wpa_assoc_frame *wpa_frame,
5033 int batch_mode)
5034{
5035 struct host_command cmd = {
5036 .host_command = SET_WPA_IE,
5037 .host_command_sequence = 0,
5038 .host_command_length = sizeof(struct ipw2100_wpa_assoc_frame),
5039 };
5040 int err;
5041
5042 IPW_DEBUG_HC("SET_WPA_IE\n");
5043
5044 if (!batch_mode) {
5045 err = ipw2100_disable_adapter(priv);
5046 if (err)
5047 return err;
5048 }
5049
5050 memcpy(cmd.host_command_parameters, wpa_frame,
5051 sizeof(struct ipw2100_wpa_assoc_frame));
5052
5053 err = ipw2100_hw_send_command(priv, &cmd);
5054
5055 if (!batch_mode) {
5056 if (ipw2100_enable_adapter(priv))
5057 err = -EIO;
5058 }
5059
5060 return err;
5061}
5062
5063struct security_info_params {
5064 u32 allowed_ciphers;
5065 u16 version;
5066 u8 auth_mode;
5067 u8 replay_counters_number;
5068 u8 unicast_using_group;
5069} __attribute__ ((packed));
5070
5071static int ipw2100_set_security_information(struct ipw2100_priv *priv,
5072 int auth_mode,
5073 int security_level,
5074 int unicast_using_group,
5075 int batch_mode)
5076{
5077 struct host_command cmd = {
5078 .host_command = SET_SECURITY_INFORMATION,
5079 .host_command_sequence = 0,
5080 .host_command_length = sizeof(struct security_info_params)
5081 };
5082 struct security_info_params *security =
5083 (struct security_info_params *)&cmd.host_command_parameters;
5084 int err;
5085 memset(security, 0, sizeof(*security));
5086
5087 /* If shared key AP authentication is turned on, then we need to
5088 * configure the firmware to try and use it.
5089 *
5090 * Actual data encryption/decryption is handled by the host. */
5091 security->auth_mode = auth_mode;
5092 security->unicast_using_group = unicast_using_group;
5093
5094 switch (security_level) {
5095 default:
5096 case SEC_LEVEL_0:
5097 security->allowed_ciphers = IPW_NONE_CIPHER;
5098 break;
5099 case SEC_LEVEL_1:
5100 security->allowed_ciphers = IPW_WEP40_CIPHER |
5101 IPW_WEP104_CIPHER;
5102 break;
5103 case SEC_LEVEL_2:
5104 security->allowed_ciphers = IPW_WEP40_CIPHER |
5105 IPW_WEP104_CIPHER | IPW_TKIP_CIPHER;
5106 break;
5107 case SEC_LEVEL_2_CKIP:
5108 security->allowed_ciphers = IPW_WEP40_CIPHER |
5109 IPW_WEP104_CIPHER | IPW_CKIP_CIPHER;
5110 break;
5111 case SEC_LEVEL_3:
5112 security->allowed_ciphers = IPW_WEP40_CIPHER |
5113 IPW_WEP104_CIPHER | IPW_TKIP_CIPHER | IPW_CCMP_CIPHER;
5114 break;
5115 }
5116
5117 IPW_DEBUG_HC(
5118 "SET_SECURITY_INFORMATION: auth:%d cipher:0x%02X (level %d)\n",
5119 security->auth_mode, security->allowed_ciphers, security_level);
5120
5121 security->replay_counters_number = 0;
5122
5123 if (!batch_mode) {
5124 err = ipw2100_disable_adapter(priv);
5125 if (err)
5126 return err;
5127 }
5128
5129 err = ipw2100_hw_send_command(priv, &cmd);
5130
5131 if (!batch_mode)
5132 ipw2100_enable_adapter(priv);
5133
5134 return err;
5135}
5136
5137static int ipw2100_set_tx_power(struct ipw2100_priv *priv,
5138 u32 tx_power)
5139{
5140 struct host_command cmd = {
5141 .host_command = TX_POWER_INDEX,
5142 .host_command_sequence = 0,
5143 .host_command_length = 4
5144 };
5145 int err = 0;
5146
5147 cmd.host_command_parameters[0] = tx_power;
5148
5149 if (priv->ieee->iw_mode == IW_MODE_ADHOC)
5150 err = ipw2100_hw_send_command(priv, &cmd);
5151 if (!err)
5152 priv->tx_power = tx_power;
5153
5154 return 0;
5155}
5156
5157static int ipw2100_set_ibss_beacon_interval(struct ipw2100_priv *priv,
5158 u32 interval, int batch_mode)
5159{
5160 struct host_command cmd = {
5161 .host_command = BEACON_INTERVAL,
5162 .host_command_sequence = 0,
5163 .host_command_length = 4
5164 };
5165 int err;
5166
5167 cmd.host_command_parameters[0] = interval;
5168
5169 IPW_DEBUG_INFO("enter\n");
5170
5171 if (priv->ieee->iw_mode == IW_MODE_ADHOC) {
5172 if (!batch_mode) {
5173 err = ipw2100_disable_adapter(priv);
5174 if (err)
5175 return err;
5176 }
5177
5178 ipw2100_hw_send_command(priv, &cmd);
5179
5180 if (!batch_mode) {
5181 err = ipw2100_enable_adapter(priv);
5182 if (err)
5183 return err;
5184 }
5185 }
5186
5187 IPW_DEBUG_INFO("exit\n");
5188
5189 return 0;
5190}
5191
5192
5193void ipw2100_queues_initialize(struct ipw2100_priv *priv)
5194{
5195 ipw2100_tx_initialize(priv);
5196 ipw2100_rx_initialize(priv);
5197 ipw2100_msg_initialize(priv);
5198}
5199
5200void ipw2100_queues_free(struct ipw2100_priv *priv)
5201{
5202 ipw2100_tx_free(priv);
5203 ipw2100_rx_free(priv);
5204 ipw2100_msg_free(priv);
5205}
5206
5207int ipw2100_queues_allocate(struct ipw2100_priv *priv)
5208{
5209 if (ipw2100_tx_allocate(priv) ||
5210 ipw2100_rx_allocate(priv) ||
5211 ipw2100_msg_allocate(priv))
5212 goto fail;
5213
5214 return 0;
5215
5216 fail:
5217 ipw2100_tx_free(priv);
5218 ipw2100_rx_free(priv);
5219 ipw2100_msg_free(priv);
5220 return -ENOMEM;
5221}
5222
5223#define IPW_PRIVACY_CAPABLE 0x0008
5224
5225static int ipw2100_set_wep_flags(struct ipw2100_priv *priv, u32 flags,
5226 int batch_mode)
5227{
5228 struct host_command cmd = {
5229 .host_command = WEP_FLAGS,
5230 .host_command_sequence = 0,
5231 .host_command_length = 4
5232 };
5233 int err;
5234
5235 cmd.host_command_parameters[0] = flags;
5236
5237 IPW_DEBUG_HC("WEP_FLAGS: flags = 0x%08X\n", flags);
5238
5239 if (!batch_mode) {
5240 err = ipw2100_disable_adapter(priv);
5241 if (err) {
5242 printk(KERN_ERR DRV_NAME ": %s: Could not disable adapter %d\n",
5243 priv->net_dev->name, err);
5244 return err;
5245 }
5246 }
5247
5248 /* send cmd to firmware */
5249 err = ipw2100_hw_send_command(priv, &cmd);
5250
5251 if (!batch_mode)
5252 ipw2100_enable_adapter(priv);
5253
5254 return err;
5255}
5256
5257struct ipw2100_wep_key {
5258 u8 idx;
5259 u8 len;
5260 u8 key[13];
5261};
5262
5263/* Macros to ease up priting WEP keys */
5264#define WEP_FMT_64 "%02X%02X%02X%02X-%02X"
5265#define WEP_FMT_128 "%02X%02X%02X%02X-%02X%02X%02X%02X-%02X%02X%02X"
5266#define WEP_STR_64(x) x[0],x[1],x[2],x[3],x[4]
5267#define WEP_STR_128(x) x[0],x[1],x[2],x[3],x[4],x[5],x[6],x[7],x[8],x[9],x[10]
5268
5269
5270/**
5271 * Set a the wep key
5272 *
5273 * @priv: struct to work on
5274 * @idx: index of the key we want to set
5275 * @key: ptr to the key data to set
5276 * @len: length of the buffer at @key
5277 * @batch_mode: FIXME perform the operation in batch mode, not
5278 * disabling the device.
5279 *
5280 * @returns 0 if OK, < 0 errno code on error.
5281 *
5282 * Fill out a command structure with the new wep key, length an
5283 * index and send it down the wire.
5284 */
5285static int ipw2100_set_key(struct ipw2100_priv *priv,
5286 int idx, char *key, int len, int batch_mode)
5287{
5288 int keylen = len ? (len <= 5 ? 5 : 13) : 0;
5289 struct host_command cmd = {
5290 .host_command = WEP_KEY_INFO,
5291 .host_command_sequence = 0,
5292 .host_command_length = sizeof(struct ipw2100_wep_key),
5293 };
5294 struct ipw2100_wep_key *wep_key = (void*)cmd.host_command_parameters;
5295 int err;
5296
5297 IPW_DEBUG_HC("WEP_KEY_INFO: index = %d, len = %d/%d\n",
5298 idx, keylen, len);
5299
5300 /* NOTE: We don't check cached values in case the firmware was reset
5301 * or some other problem is occuring. If the user is setting the key,
5302 * then we push the change */
5303
5304 wep_key->idx = idx;
5305 wep_key->len = keylen;
5306
5307 if (keylen) {
5308 memcpy(wep_key->key, key, len);
5309 memset(wep_key->key + len, 0, keylen - len);
5310 }
5311
5312 /* Will be optimized out on debug not being configured in */
5313 if (keylen == 0)
5314 IPW_DEBUG_WEP("%s: Clearing key %d\n",
5315 priv->net_dev->name, wep_key->idx);
5316 else if (keylen == 5)
5317 IPW_DEBUG_WEP("%s: idx: %d, len: %d key: " WEP_FMT_64 "\n",
5318 priv->net_dev->name, wep_key->idx, wep_key->len,
5319 WEP_STR_64(wep_key->key));
5320 else
5321 IPW_DEBUG_WEP("%s: idx: %d, len: %d key: " WEP_FMT_128
5322 "\n",
5323 priv->net_dev->name, wep_key->idx, wep_key->len,
5324 WEP_STR_128(wep_key->key));
5325
5326 if (!batch_mode) {
5327 err = ipw2100_disable_adapter(priv);
5328 /* FIXME: IPG: shouldn't this prink be in _disable_adapter()? */
5329 if (err) {
5330 printk(KERN_ERR DRV_NAME ": %s: Could not disable adapter %d\n",
5331 priv->net_dev->name, err);
5332 return err;
5333 }
5334 }
5335
5336 /* send cmd to firmware */
5337 err = ipw2100_hw_send_command(priv, &cmd);
5338
5339 if (!batch_mode) {
5340 int err2 = ipw2100_enable_adapter(priv);
5341 if (err == 0)
5342 err = err2;
5343 }
5344 return err;
5345}
5346
5347static int ipw2100_set_key_index(struct ipw2100_priv *priv,
5348 int idx, int batch_mode)
5349{
5350 struct host_command cmd = {
5351 .host_command = WEP_KEY_INDEX,
5352 .host_command_sequence = 0,
5353 .host_command_length = 4,
5354 .host_command_parameters = { idx },
5355 };
5356 int err;
5357
5358 IPW_DEBUG_HC("WEP_KEY_INDEX: index = %d\n", idx);
5359
5360 if (idx < 0 || idx > 3)
5361 return -EINVAL;
5362
5363 if (!batch_mode) {
5364 err = ipw2100_disable_adapter(priv);
5365 if (err) {
5366 printk(KERN_ERR DRV_NAME ": %s: Could not disable adapter %d\n",
5367 priv->net_dev->name, err);
5368 return err;
5369 }
5370 }
5371
5372 /* send cmd to firmware */
5373 err = ipw2100_hw_send_command(priv, &cmd);
5374
5375 if (!batch_mode)
5376 ipw2100_enable_adapter(priv);
5377
5378 return err;
5379}
5380
5381
5382static int ipw2100_configure_security(struct ipw2100_priv *priv,
5383 int batch_mode)
5384{
5385 int i, err, auth_mode, sec_level, use_group;
5386
5387 if (!(priv->status & STATUS_RUNNING))
5388 return 0;
5389
5390 if (!batch_mode) {
5391 err = ipw2100_disable_adapter(priv);
5392 if (err)
5393 return err;
5394 }
5395
5396 if (!priv->sec.enabled) {
5397 err = ipw2100_set_security_information(
5398 priv, IPW_AUTH_OPEN, SEC_LEVEL_0, 0, 1);
5399 } else {
5400 auth_mode = IPW_AUTH_OPEN;
5401 if ((priv->sec.flags & SEC_AUTH_MODE) &&
5402 (priv->sec.auth_mode == WLAN_AUTH_SHARED_KEY))
5403 auth_mode = IPW_AUTH_SHARED;
5404
5405 sec_level = SEC_LEVEL_0;
5406 if (priv->sec.flags & SEC_LEVEL)
5407 sec_level = priv->sec.level;
5408
5409 use_group = 0;
5410 if (priv->sec.flags & SEC_UNICAST_GROUP)
5411 use_group = priv->sec.unicast_uses_group;
5412
5413 err = ipw2100_set_security_information(
5414 priv, auth_mode, sec_level, use_group, 1);
5415 }
5416
5417 if (err)
5418 goto exit;
5419
5420 if (priv->sec.enabled) {
5421 for (i = 0; i < 4; i++) {
5422 if (!(priv->sec.flags & (1 << i))) {
5423 memset(priv->sec.keys[i], 0, WEP_KEY_LEN);
5424 priv->sec.key_sizes[i] = 0;
5425 } else {
5426 err = ipw2100_set_key(priv, i,
5427 priv->sec.keys[i],
5428 priv->sec.key_sizes[i],
5429 1);
5430 if (err)
5431 goto exit;
5432 }
5433 }
5434
5435 ipw2100_set_key_index(priv, priv->ieee->tx_keyidx, 1);
5436 }
5437
5438 /* Always enable privacy so the Host can filter WEP packets if
5439 * encrypted data is sent up */
5440 err = ipw2100_set_wep_flags(
5441 priv, priv->sec.enabled ? IPW_PRIVACY_CAPABLE : 0, 1);
5442 if (err)
5443 goto exit;
5444
5445 priv->status &= ~STATUS_SECURITY_UPDATED;
5446
5447 exit:
5448 if (!batch_mode)
5449 ipw2100_enable_adapter(priv);
5450
5451 return err;
5452}
5453
5454static void ipw2100_security_work(struct ipw2100_priv *priv)
5455{
5456 /* If we happen to have reconnected before we get a chance to
5457 * process this, then update the security settings--which causes
5458 * a disassociation to occur */
5459 if (!(priv->status & STATUS_ASSOCIATED) &&
5460 priv->status & STATUS_SECURITY_UPDATED)
5461 ipw2100_configure_security(priv, 0);
5462}
5463
5464static void shim__set_security(struct net_device *dev,
5465 struct ieee80211_security *sec)
5466{
5467 struct ipw2100_priv *priv = ieee80211_priv(dev);
5468 int i, force_update = 0;
5469
5470 down(&priv->action_sem);
5471 if (!(priv->status & STATUS_INITIALIZED))
5472 goto done;
5473
5474 for (i = 0; i < 4; i++) {
5475 if (sec->flags & (1 << i)) {
5476 priv->sec.key_sizes[i] = sec->key_sizes[i];
5477 if (sec->key_sizes[i] == 0)
5478 priv->sec.flags &= ~(1 << i);
5479 else
5480 memcpy(priv->sec.keys[i], sec->keys[i],
5481 sec->key_sizes[i]);
5482 priv->sec.flags |= (1 << i);
5483 priv->status |= STATUS_SECURITY_UPDATED;
5484 }
5485 }
5486
5487 if ((sec->flags & SEC_ACTIVE_KEY) &&
5488 priv->sec.active_key != sec->active_key) {
5489 if (sec->active_key <= 3) {
5490 priv->sec.active_key = sec->active_key;
5491 priv->sec.flags |= SEC_ACTIVE_KEY;
5492 } else
5493 priv->sec.flags &= ~SEC_ACTIVE_KEY;
5494
5495 priv->status |= STATUS_SECURITY_UPDATED;
5496 }
5497
5498 if ((sec->flags & SEC_AUTH_MODE) &&
5499 (priv->sec.auth_mode != sec->auth_mode)) {
5500 priv->sec.auth_mode = sec->auth_mode;
5501 priv->sec.flags |= SEC_AUTH_MODE;
5502 priv->status |= STATUS_SECURITY_UPDATED;
5503 }
5504
5505 if (sec->flags & SEC_ENABLED &&
5506 priv->sec.enabled != sec->enabled) {
5507 priv->sec.flags |= SEC_ENABLED;
5508 priv->sec.enabled = sec->enabled;
5509 priv->status |= STATUS_SECURITY_UPDATED;
5510 force_update = 1;
5511 }
5512
5513 if (sec->flags & SEC_LEVEL &&
5514 priv->sec.level != sec->level) {
5515 priv->sec.level = sec->level;
5516 priv->sec.flags |= SEC_LEVEL;
5517 priv->status |= STATUS_SECURITY_UPDATED;
5518 }
5519
5520 IPW_DEBUG_WEP("Security flags: %c %c%c%c%c %c%c%c%c\n",
5521 priv->sec.flags & (1<<8) ? '1' : '0',
5522 priv->sec.flags & (1<<7) ? '1' : '0',
5523 priv->sec.flags & (1<<6) ? '1' : '0',
5524 priv->sec.flags & (1<<5) ? '1' : '0',
5525 priv->sec.flags & (1<<4) ? '1' : '0',
5526 priv->sec.flags & (1<<3) ? '1' : '0',
5527 priv->sec.flags & (1<<2) ? '1' : '0',
5528 priv->sec.flags & (1<<1) ? '1' : '0',
5529 priv->sec.flags & (1<<0) ? '1' : '0');
5530
5531/* As a temporary work around to enable WPA until we figure out why
5532 * wpa_supplicant toggles the security capability of the driver, which
5533 * forces a disassocation with force_update...
5534 *
5535 * if (force_update || !(priv->status & STATUS_ASSOCIATED))*/
5536 if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)))
5537 ipw2100_configure_security(priv, 0);
5538done:
5539 up(&priv->action_sem);
5540}
5541
5542static int ipw2100_adapter_setup(struct ipw2100_priv *priv)
5543{
5544 int err;
5545 int batch_mode = 1;
5546 u8 *bssid;
5547
5548 IPW_DEBUG_INFO("enter\n");
5549
5550 err = ipw2100_disable_adapter(priv);
5551 if (err)
5552 return err;
5553#ifdef CONFIG_IPW2100_MONITOR
5554 if (priv->ieee->iw_mode == IW_MODE_MONITOR) {
5555 err = ipw2100_set_channel(priv, priv->channel, batch_mode);
5556 if (err)
5557 return err;
5558
5559 IPW_DEBUG_INFO("exit\n");
5560
5561 return 0;
5562 }
5563#endif /* CONFIG_IPW2100_MONITOR */
5564
5565 err = ipw2100_read_mac_address(priv);
5566 if (err)
5567 return -EIO;
5568
5569 err = ipw2100_set_mac_address(priv, batch_mode);
5570 if (err)
5571 return err;
5572
5573 err = ipw2100_set_port_type(priv, priv->ieee->iw_mode, batch_mode);
5574 if (err)
5575 return err;
5576
5577 if (priv->ieee->iw_mode == IW_MODE_ADHOC) {
5578 err = ipw2100_set_channel(priv, priv->channel, batch_mode);
5579 if (err)
5580 return err;
5581 }
5582
5583 err = ipw2100_system_config(priv, batch_mode);
5584 if (err)
5585 return err;
5586
5587 err = ipw2100_set_tx_rates(priv, priv->tx_rates, batch_mode);
5588 if (err)
5589 return err;
5590
5591 /* Default to power mode OFF */
5592 err = ipw2100_set_power_mode(priv, IPW_POWER_MODE_CAM);
5593 if (err)
5594 return err;
5595
5596 err = ipw2100_set_rts_threshold(priv, priv->rts_threshold);
5597 if (err)
5598 return err;
5599
5600 if (priv->config & CFG_STATIC_BSSID)
5601 bssid = priv->bssid;
5602 else
5603 bssid = NULL;
5604 err = ipw2100_set_mandatory_bssid(priv, bssid, batch_mode);
5605 if (err)
5606 return err;
5607
5608 if (priv->config & CFG_STATIC_ESSID)
5609 err = ipw2100_set_essid(priv, priv->essid, priv->essid_len,
5610 batch_mode);
5611 else
5612 err = ipw2100_set_essid(priv, NULL, 0, batch_mode);
5613 if (err)
5614 return err;
5615
5616 err = ipw2100_configure_security(priv, batch_mode);
5617 if (err)
5618 return err;
5619
5620 if (priv->ieee->iw_mode == IW_MODE_ADHOC) {
5621 err = ipw2100_set_ibss_beacon_interval(
5622 priv, priv->beacon_interval, batch_mode);
5623 if (err)
5624 return err;
5625
5626 err = ipw2100_set_tx_power(priv, priv->tx_power);
5627 if (err)
5628 return err;
5629 }
5630
5631 /*
5632 err = ipw2100_set_fragmentation_threshold(
5633 priv, priv->frag_threshold, batch_mode);
5634 if (err)
5635 return err;
5636 */
5637
5638 IPW_DEBUG_INFO("exit\n");
5639
5640 return 0;
5641}
5642
5643
5644/*************************************************************************
5645 *
5646 * EXTERNALLY CALLED METHODS
5647 *
5648 *************************************************************************/
5649
5650/* This method is called by the network layer -- not to be confused with
5651 * ipw2100_set_mac_address() declared above called by this driver (and this
5652 * method as well) to talk to the firmware */
5653static int ipw2100_set_address(struct net_device *dev, void *p)
5654{
5655 struct ipw2100_priv *priv = ieee80211_priv(dev);
5656 struct sockaddr *addr = p;
5657 int err = 0;
5658
5659 if (!is_valid_ether_addr(addr->sa_data))
5660 return -EADDRNOTAVAIL;
5661
5662 down(&priv->action_sem);
5663
5664 priv->config |= CFG_CUSTOM_MAC;
5665 memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN);
5666
5667 err = ipw2100_set_mac_address(priv, 0);
5668 if (err)
5669 goto done;
5670
5671 priv->reset_backoff = 0;
5672 up(&priv->action_sem);
5673 ipw2100_reset_adapter(priv);
5674 return 0;
5675
5676 done:
5677 up(&priv->action_sem);
5678 return err;
5679}
5680
5681static int ipw2100_open(struct net_device *dev)
5682{
5683 struct ipw2100_priv *priv = ieee80211_priv(dev);
5684 unsigned long flags;
5685 IPW_DEBUG_INFO("dev->open\n");
5686
5687 spin_lock_irqsave(&priv->low_lock, flags);
5688 if (priv->status & STATUS_ASSOCIATED) {
5689 netif_carrier_on(dev);
5690 netif_start_queue(dev);
5691 }
5692 spin_unlock_irqrestore(&priv->low_lock, flags);
5693
5694 return 0;
5695}
5696
5697static int ipw2100_close(struct net_device *dev)
5698{
5699 struct ipw2100_priv *priv = ieee80211_priv(dev);
5700 unsigned long flags;
5701 struct list_head *element;
5702 struct ipw2100_tx_packet *packet;
5703
5704 IPW_DEBUG_INFO("enter\n");
5705
5706 spin_lock_irqsave(&priv->low_lock, flags);
5707
5708 if (priv->status & STATUS_ASSOCIATED)
5709 netif_carrier_off(dev);
5710 netif_stop_queue(dev);
5711
5712 /* Flush the TX queue ... */
5713 while (!list_empty(&priv->tx_pend_list)) {
5714 element = priv->tx_pend_list.next;
5715 packet = list_entry(element, struct ipw2100_tx_packet, list);
5716
5717 list_del(element);
5718 DEC_STAT(&priv->tx_pend_stat);
5719
5720 ieee80211_txb_free(packet->info.d_struct.txb);
5721 packet->info.d_struct.txb = NULL;
5722
5723 list_add_tail(element, &priv->tx_free_list);
5724 INC_STAT(&priv->tx_free_stat);
5725 }
5726 spin_unlock_irqrestore(&priv->low_lock, flags);
5727
5728 IPW_DEBUG_INFO("exit\n");
5729
5730 return 0;
5731}
5732
5733
5734
5735/*
5736 * TODO: Fix this function... its just wrong
5737 */
5738static void ipw2100_tx_timeout(struct net_device *dev)
5739{
5740 struct ipw2100_priv *priv = ieee80211_priv(dev);
5741
5742 priv->ieee->stats.tx_errors++;
5743
5744#ifdef CONFIG_IPW2100_MONITOR
5745 if (priv->ieee->iw_mode == IW_MODE_MONITOR)
5746 return;
5747#endif
5748
5749 IPW_DEBUG_INFO("%s: TX timed out. Scheduling firmware restart.\n",
5750 dev->name);
5751 schedule_reset(priv);
5752}
5753
5754
5755/*
5756 * TODO: reimplement it so that it reads statistics
5757 * from the adapter using ordinal tables
5758 * instead of/in addition to collecting them
5759 * in the driver
5760 */
5761static struct net_device_stats *ipw2100_stats(struct net_device *dev)
5762{
5763 struct ipw2100_priv *priv = ieee80211_priv(dev);
5764
5765 return &priv->ieee->stats;
5766}
5767
5768/* Support for wpa_supplicant. Will be replaced with WEXT once
5769 * they get WPA support. */
5770#ifdef CONFIG_IEEE80211_WPA
5771
5772/* following definitions must match definitions in driver_ipw2100.c */
5773
5774#define IPW2100_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
5775
5776#define IPW2100_CMD_SET_WPA_PARAM 1
5777#define IPW2100_CMD_SET_WPA_IE 2
5778#define IPW2100_CMD_SET_ENCRYPTION 3
5779#define IPW2100_CMD_MLME 4
5780
5781#define IPW2100_PARAM_WPA_ENABLED 1
5782#define IPW2100_PARAM_TKIP_COUNTERMEASURES 2
5783#define IPW2100_PARAM_DROP_UNENCRYPTED 3
5784#define IPW2100_PARAM_PRIVACY_INVOKED 4
5785#define IPW2100_PARAM_AUTH_ALGS 5
5786#define IPW2100_PARAM_IEEE_802_1X 6
5787
5788#define IPW2100_MLME_STA_DEAUTH 1
5789#define IPW2100_MLME_STA_DISASSOC 2
5790
5791#define IPW2100_CRYPT_ERR_UNKNOWN_ALG 2
5792#define IPW2100_CRYPT_ERR_UNKNOWN_ADDR 3
5793#define IPW2100_CRYPT_ERR_CRYPT_INIT_FAILED 4
5794#define IPW2100_CRYPT_ERR_KEY_SET_FAILED 5
5795#define IPW2100_CRYPT_ERR_TX_KEY_SET_FAILED 6
5796#define IPW2100_CRYPT_ERR_CARD_CONF_FAILED 7
5797
5798#define IPW2100_CRYPT_ALG_NAME_LEN 16
5799
5800struct ipw2100_param {
5801 u32 cmd;
5802 u8 sta_addr[ETH_ALEN];
5803 union {
5804 struct {
5805 u8 name;
5806 u32 value;
5807 } wpa_param;
5808 struct {
5809 u32 len;
5810 u8 *data;
5811 } wpa_ie;
5812 struct{
5813 int command;
5814 int reason_code;
5815 } mlme;
5816 struct {
5817 u8 alg[IPW2100_CRYPT_ALG_NAME_LEN];
5818 u8 set_tx;
5819 u32 err;
5820 u8 idx;
5821 u8 seq[8]; /* sequence counter (set: RX, get: TX) */
5822 u16 key_len;
5823 u8 key[0];
5824 } crypt;
5825
5826 } u;
5827};
5828
5829/* end of driver_ipw2100.c code */
5830
5831static int ipw2100_wpa_enable(struct ipw2100_priv *priv, int value){
5832
5833 struct ieee80211_device *ieee = priv->ieee;
5834 struct ieee80211_security sec = {
5835 .flags = SEC_LEVEL | SEC_ENABLED,
5836 };
5837 int ret = 0;
5838
5839 ieee->wpa_enabled = value;
5840
5841 if (value){
5842 sec.level = SEC_LEVEL_3;
5843 sec.enabled = 1;
5844 } else {
5845 sec.level = SEC_LEVEL_0;
5846 sec.enabled = 0;
5847 }
5848
5849 if (ieee->set_security)
5850 ieee->set_security(ieee->dev, &sec);
5851 else
5852 ret = -EOPNOTSUPP;
5853
5854 return ret;
5855}
5856
5857#define AUTH_ALG_OPEN_SYSTEM 0x1
5858#define AUTH_ALG_SHARED_KEY 0x2
5859
5860static int ipw2100_wpa_set_auth_algs(struct ipw2100_priv *priv, int value){
5861
5862 struct ieee80211_device *ieee = priv->ieee;
5863 struct ieee80211_security sec = {
5864 .flags = SEC_AUTH_MODE,
5865 };
5866 int ret = 0;
5867
5868 if (value & AUTH_ALG_SHARED_KEY){
5869 sec.auth_mode = WLAN_AUTH_SHARED_KEY;
5870 ieee->open_wep = 0;
5871 } else {
5872 sec.auth_mode = WLAN_AUTH_OPEN;
5873 ieee->open_wep = 1;
5874 }
5875
5876 if (ieee->set_security)
5877 ieee->set_security(ieee->dev, &sec);
5878 else
5879 ret = -EOPNOTSUPP;
5880
5881 return ret;
5882}
5883
5884
5885static int ipw2100_wpa_set_param(struct net_device *dev, u8 name, u32 value){
5886
5887 struct ipw2100_priv *priv = ieee80211_priv(dev);
5888 int ret=0;
5889
5890 switch(name){
5891 case IPW2100_PARAM_WPA_ENABLED:
5892 ret = ipw2100_wpa_enable(priv, value);
5893 break;
5894
5895 case IPW2100_PARAM_TKIP_COUNTERMEASURES:
5896 priv->ieee->tkip_countermeasures=value;
5897 break;
5898
5899 case IPW2100_PARAM_DROP_UNENCRYPTED:
5900 priv->ieee->drop_unencrypted=value;
5901 break;
5902
5903 case IPW2100_PARAM_PRIVACY_INVOKED:
5904 priv->ieee->privacy_invoked=value;
5905 break;
5906
5907 case IPW2100_PARAM_AUTH_ALGS:
5908 ret = ipw2100_wpa_set_auth_algs(priv, value);
5909 break;
5910
5911 case IPW2100_PARAM_IEEE_802_1X:
5912 priv->ieee->ieee802_1x=value;
5913 break;
5914
5915 default:
5916 printk(KERN_ERR DRV_NAME ": %s: Unknown WPA param: %d\n",
5917 dev->name, name);
5918 ret = -EOPNOTSUPP;
5919 }
5920
5921 return ret;
5922}
5923
5924static int ipw2100_wpa_mlme(struct net_device *dev, int command, int reason){
5925
5926 struct ipw2100_priv *priv = ieee80211_priv(dev);
5927 int ret=0;
5928
5929 switch(command){
5930 case IPW2100_MLME_STA_DEAUTH:
5931 // silently ignore
5932 break;
5933
5934 case IPW2100_MLME_STA_DISASSOC:
5935 ipw2100_disassociate_bssid(priv);
5936 break;
5937
5938 default:
5939 printk(KERN_ERR DRV_NAME ": %s: Unknown MLME request: %d\n",
5940 dev->name, command);
5941 ret = -EOPNOTSUPP;
5942 }
5943
5944 return ret;
5945}
5946
5947
5948void ipw2100_wpa_assoc_frame(struct ipw2100_priv *priv,
5949 char *wpa_ie, int wpa_ie_len){
5950
5951 struct ipw2100_wpa_assoc_frame frame;
5952
5953 frame.fixed_ie_mask = 0;
5954
5955 /* copy WPA IE */
5956 memcpy(frame.var_ie, wpa_ie, wpa_ie_len);
5957 frame.var_ie_len = wpa_ie_len;
5958
5959 /* make sure WPA is enabled */
5960 ipw2100_wpa_enable(priv, 1);
5961 ipw2100_set_wpa_ie(priv, &frame, 0);
5962}
5963
5964
5965static int ipw2100_wpa_set_wpa_ie(struct net_device *dev,
5966 struct ipw2100_param *param, int plen){
5967
5968 struct ipw2100_priv *priv = ieee80211_priv(dev);
5969 struct ieee80211_device *ieee = priv->ieee;
5970 u8 *buf;
5971
5972 if (! ieee->wpa_enabled)
5973 return -EOPNOTSUPP;
5974
5975 if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
5976 (param->u.wpa_ie.len &&
5977 param->u.wpa_ie.data==NULL))
5978 return -EINVAL;
5979
5980 if (param->u.wpa_ie.len){
5981 buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
5982 if (buf == NULL)
5983 return -ENOMEM;
5984
5985 memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
5986
5987 kfree(ieee->wpa_ie);
5988 ieee->wpa_ie = buf;
5989 ieee->wpa_ie_len = param->u.wpa_ie.len;
5990
5991 } else {
5992 kfree(ieee->wpa_ie);
5993 ieee->wpa_ie = NULL;
5994 ieee->wpa_ie_len = 0;
5995 }
5996
5997 ipw2100_wpa_assoc_frame(priv, ieee->wpa_ie, ieee->wpa_ie_len);
5998
5999 return 0;
6000}
6001
6002/* implementation borrowed from hostap driver */
6003
6004static int ipw2100_wpa_set_encryption(struct net_device *dev,
6005 struct ipw2100_param *param, int param_len){
6006
6007 int ret = 0;
6008 struct ipw2100_priv *priv = ieee80211_priv(dev);
6009 struct ieee80211_device *ieee = priv->ieee;
6010 struct ieee80211_crypto_ops *ops;
6011 struct ieee80211_crypt_data **crypt;
6012
6013 struct ieee80211_security sec = {
6014 .flags = 0,
6015 };
6016
6017 param->u.crypt.err = 0;
6018 param->u.crypt.alg[IPW2100_CRYPT_ALG_NAME_LEN - 1] = '\0';
6019
6020 if (param_len !=
6021 (int) ((char *) param->u.crypt.key - (char *) param) +
6022 param->u.crypt.key_len){
6023 IPW_DEBUG_INFO("Len mismatch %d, %d\n", param_len, param->u.crypt.key_len);
6024 return -EINVAL;
6025 }
6026 if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
6027 param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
6028 param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
6029 if (param->u.crypt.idx >= WEP_KEYS)
6030 return -EINVAL;
6031 crypt = &ieee->crypt[param->u.crypt.idx];
6032 } else {
6033 return -EINVAL;
6034 }
6035
6036 if (strcmp(param->u.crypt.alg, "none") == 0) {
6037 if (crypt){
6038 sec.enabled = 0;
6039 sec.level = SEC_LEVEL_0;
6040 sec.flags |= SEC_ENABLED | SEC_LEVEL;
6041 ieee80211_crypt_delayed_deinit(ieee, crypt);
6042 }
6043 goto done;
6044 }
6045 sec.enabled = 1;
6046 sec.flags |= SEC_ENABLED;
6047
6048 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
6049 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
6050 request_module("ieee80211_crypt_wep");
6051 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
6052 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
6053 request_module("ieee80211_crypt_tkip");
6054 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
6055 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
6056 request_module("ieee80211_crypt_ccmp");
6057 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
6058 }
6059 if (ops == NULL) {
6060 IPW_DEBUG_INFO("%s: unknown crypto alg '%s'\n",
6061 dev->name, param->u.crypt.alg);
6062 param->u.crypt.err = IPW2100_CRYPT_ERR_UNKNOWN_ALG;
6063 ret = -EINVAL;
6064 goto done;
6065 }
6066
6067 if (*crypt == NULL || (*crypt)->ops != ops) {
6068 struct ieee80211_crypt_data *new_crypt;
6069
6070 ieee80211_crypt_delayed_deinit(ieee, crypt);
6071
6072 new_crypt = (struct ieee80211_crypt_data *)
6073 kmalloc(sizeof(struct ieee80211_crypt_data), GFP_KERNEL);
6074 if (new_crypt == NULL) {
6075 ret = -ENOMEM;
6076 goto done;
6077 }
6078 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
6079 new_crypt->ops = ops;
6080 if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
6081 new_crypt->priv = new_crypt->ops->init(param->u.crypt.idx);
6082
6083 if (new_crypt->priv == NULL) {
6084 kfree(new_crypt);
6085 param->u.crypt.err =
6086 IPW2100_CRYPT_ERR_CRYPT_INIT_FAILED;
6087 ret = -EINVAL;
6088 goto done;
6089 }
6090
6091 *crypt = new_crypt;
6092 }
6093
6094 if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
6095 (*crypt)->ops->set_key(param->u.crypt.key,
6096 param->u.crypt.key_len, param->u.crypt.seq,
6097 (*crypt)->priv) < 0) {
6098 IPW_DEBUG_INFO("%s: key setting failed\n",
6099 dev->name);
6100 param->u.crypt.err = IPW2100_CRYPT_ERR_KEY_SET_FAILED;
6101 ret = -EINVAL;
6102 goto done;
6103 }
6104
6105 if (param->u.crypt.set_tx){
6106 ieee->tx_keyidx = param->u.crypt.idx;
6107 sec.active_key = param->u.crypt.idx;
6108 sec.flags |= SEC_ACTIVE_KEY;
6109 }
6110
6111 if (ops->name != NULL){
6112
6113 if (strcmp(ops->name, "WEP") == 0) {
6114 memcpy(sec.keys[param->u.crypt.idx], param->u.crypt.key, param->u.crypt.key_len);
6115 sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
6116 sec.flags |= (1 << param->u.crypt.idx);
6117 sec.flags |= SEC_LEVEL;
6118 sec.level = SEC_LEVEL_1;
6119 } else if (strcmp(ops->name, "TKIP") == 0) {
6120 sec.flags |= SEC_LEVEL;
6121 sec.level = SEC_LEVEL_2;
6122 } else if (strcmp(ops->name, "CCMP") == 0) {
6123 sec.flags |= SEC_LEVEL;
6124 sec.level = SEC_LEVEL_3;
6125 }
6126 }
6127 done:
6128 if (ieee->set_security)
6129 ieee->set_security(ieee->dev, &sec);
6130
6131 /* Do not reset port if card is in Managed mode since resetting will
6132 * generate new IEEE 802.11 authentication which may end up in looping
6133 * with IEEE 802.1X. If your hardware requires a reset after WEP
6134 * configuration (for example... Prism2), implement the reset_port in
6135 * the callbacks structures used to initialize the 802.11 stack. */
6136 if (ieee->reset_on_keychange &&
6137 ieee->iw_mode != IW_MODE_INFRA &&
6138 ieee->reset_port &&
6139 ieee->reset_port(dev)) {
6140 IPW_DEBUG_INFO("%s: reset_port failed\n", dev->name);
6141 param->u.crypt.err = IPW2100_CRYPT_ERR_CARD_CONF_FAILED;
6142 return -EINVAL;
6143 }
6144
6145 return ret;
6146}
6147
6148
6149static int ipw2100_wpa_supplicant(struct net_device *dev, struct iw_point *p){
6150
6151 struct ipw2100_param *param;
6152 int ret=0;
6153
6154 IPW_DEBUG_IOCTL("wpa_supplicant: len=%d\n", p->length);
6155
6156 if (p->length < sizeof(struct ipw2100_param) || !p->pointer)
6157 return -EINVAL;
6158
6159 param = (struct ipw2100_param *)kmalloc(p->length, GFP_KERNEL);
6160 if (param == NULL)
6161 return -ENOMEM;
6162
6163 if (copy_from_user(param, p->pointer, p->length)){
6164 kfree(param);
6165 return -EFAULT;
6166 }
6167
6168 switch (param->cmd){
6169
6170 case IPW2100_CMD_SET_WPA_PARAM:
6171 ret = ipw2100_wpa_set_param(dev, param->u.wpa_param.name,
6172 param->u.wpa_param.value);
6173 break;
6174
6175 case IPW2100_CMD_SET_WPA_IE:
6176 ret = ipw2100_wpa_set_wpa_ie(dev, param, p->length);
6177 break;
6178
6179 case IPW2100_CMD_SET_ENCRYPTION:
6180 ret = ipw2100_wpa_set_encryption(dev, param, p->length);
6181 break;
6182
6183 case IPW2100_CMD_MLME:
6184 ret = ipw2100_wpa_mlme(dev, param->u.mlme.command,
6185 param->u.mlme.reason_code);
6186 break;
6187
6188 default:
6189 printk(KERN_ERR DRV_NAME ": %s: Unknown WPA supplicant request: %d\n",
6190 dev->name, param->cmd);
6191 ret = -EOPNOTSUPP;
6192
6193 }
6194
6195 if (ret == 0 && copy_to_user(p->pointer, param, p->length))
6196 ret = -EFAULT;
6197
6198 kfree(param);
6199 return ret;
6200}
6201#endif /* CONFIG_IEEE80211_WPA */
6202
6203static int ipw2100_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
6204{
6205#ifdef CONFIG_IEEE80211_WPA
6206 struct iwreq *wrq = (struct iwreq *) rq;
6207 int ret=-1;
6208 switch (cmd){
6209 case IPW2100_IOCTL_WPA_SUPPLICANT:
6210 ret = ipw2100_wpa_supplicant(dev, &wrq->u.data);
6211 return ret;
6212
6213 default:
6214 return -EOPNOTSUPP;
6215 }
6216
6217#endif /* CONFIG_IEEE80211_WPA */
6218
6219 return -EOPNOTSUPP;
6220}
6221
6222
6223static void ipw_ethtool_get_drvinfo(struct net_device *dev,
6224 struct ethtool_drvinfo *info)
6225{
6226 struct ipw2100_priv *priv = ieee80211_priv(dev);
6227 char fw_ver[64], ucode_ver[64];
6228
6229 strcpy(info->driver, DRV_NAME);
6230 strcpy(info->version, DRV_VERSION);
6231
6232 ipw2100_get_fwversion(priv, fw_ver, sizeof(fw_ver));
6233 ipw2100_get_ucodeversion(priv, ucode_ver, sizeof(ucode_ver));
6234
6235 snprintf(info->fw_version, sizeof(info->fw_version), "%s:%d:%s",
6236 fw_ver, priv->eeprom_version, ucode_ver);
6237
6238 strcpy(info->bus_info, pci_name(priv->pci_dev));
6239}
6240
6241static u32 ipw2100_ethtool_get_link(struct net_device *dev)
6242{
6243 struct ipw2100_priv *priv = ieee80211_priv(dev);
6244 return (priv->status & STATUS_ASSOCIATED) ? 1 : 0;
6245}
6246
6247
6248static struct ethtool_ops ipw2100_ethtool_ops = {
6249 .get_link = ipw2100_ethtool_get_link,
6250 .get_drvinfo = ipw_ethtool_get_drvinfo,
6251};
6252
6253static void ipw2100_hang_check(void *adapter)
6254{
6255 struct ipw2100_priv *priv = adapter;
6256 unsigned long flags;
6257 u32 rtc = 0xa5a5a5a5;
6258 u32 len = sizeof(rtc);
6259 int restart = 0;
6260
6261 spin_lock_irqsave(&priv->low_lock, flags);
6262
6263 if (priv->fatal_error != 0) {
6264 /* If fatal_error is set then we need to restart */
6265 IPW_DEBUG_INFO("%s: Hardware fatal error detected.\n",
6266 priv->net_dev->name);
6267
6268 restart = 1;
6269 } else if (ipw2100_get_ordinal(priv, IPW_ORD_RTC_TIME, &rtc, &len) ||
6270 (rtc == priv->last_rtc)) {
6271 /* Check if firmware is hung */
6272 IPW_DEBUG_INFO("%s: Firmware RTC stalled.\n",
6273 priv->net_dev->name);
6274
6275 restart = 1;
6276 }
6277
6278 if (restart) {
6279 /* Kill timer */
6280 priv->stop_hang_check = 1;
6281 priv->hangs++;
6282
6283 /* Restart the NIC */
6284 schedule_reset(priv);
6285 }
6286
6287 priv->last_rtc = rtc;
6288
6289 if (!priv->stop_hang_check)
6290 queue_delayed_work(priv->workqueue, &priv->hang_check, HZ / 2);
6291
6292 spin_unlock_irqrestore(&priv->low_lock, flags);
6293}
6294
6295
6296static void ipw2100_rf_kill(void *adapter)
6297{
6298 struct ipw2100_priv *priv = adapter;
6299 unsigned long flags;
6300
6301 spin_lock_irqsave(&priv->low_lock, flags);
6302
6303 if (rf_kill_active(priv)) {
6304 IPW_DEBUG_RF_KILL("RF Kill active, rescheduling GPIO check\n");
6305 if (!priv->stop_rf_kill)
6306 queue_delayed_work(priv->workqueue, &priv->rf_kill, HZ);
6307 goto exit_unlock;
6308 }
6309
6310 /* RF Kill is now disabled, so bring the device back up */
6311
6312 if (!(priv->status & STATUS_RF_KILL_MASK)) {
6313 IPW_DEBUG_RF_KILL("HW RF Kill no longer active, restarting "
6314 "device\n");
6315 schedule_reset(priv);
6316 } else
6317 IPW_DEBUG_RF_KILL("HW RF Kill deactivated. SW RF Kill still "
6318 "enabled\n");
6319
6320 exit_unlock:
6321 spin_unlock_irqrestore(&priv->low_lock, flags);
6322}
6323
6324static void ipw2100_irq_tasklet(struct ipw2100_priv *priv);
6325
6326/* Look into using netdev destructor to shutdown ieee80211? */
6327
6328static struct net_device *ipw2100_alloc_device(
6329 struct pci_dev *pci_dev,
6330 char *base_addr,
6331 unsigned long mem_start,
6332 unsigned long mem_len)
6333{
6334 struct ipw2100_priv *priv;
6335 struct net_device *dev;
6336
6337 dev = alloc_ieee80211(sizeof(struct ipw2100_priv));
6338 if (!dev)
6339 return NULL;
6340 priv = ieee80211_priv(dev);
6341 priv->ieee = netdev_priv(dev);
6342 priv->pci_dev = pci_dev;
6343 priv->net_dev = dev;
6344
6345 priv->ieee->hard_start_xmit = ipw2100_tx;
6346 priv->ieee->set_security = shim__set_security;
6347
6348 dev->open = ipw2100_open;
6349 dev->stop = ipw2100_close;
6350 dev->init = ipw2100_net_init;
6351 dev->do_ioctl = ipw2100_ioctl;
6352 dev->get_stats = ipw2100_stats;
6353 dev->ethtool_ops = &ipw2100_ethtool_ops;
6354 dev->tx_timeout = ipw2100_tx_timeout;
6355 dev->wireless_handlers = &ipw2100_wx_handler_def;
6356 dev->get_wireless_stats = ipw2100_wx_wireless_stats;
6357 dev->set_mac_address = ipw2100_set_address;
6358 dev->watchdog_timeo = 3*HZ;
6359 dev->irq = 0;
6360
6361 dev->base_addr = (unsigned long)base_addr;
6362 dev->mem_start = mem_start;
6363 dev->mem_end = dev->mem_start + mem_len - 1;
6364
6365 /* NOTE: We don't use the wireless_handlers hook
6366 * in dev as the system will start throwing WX requests
6367 * to us before we're actually initialized and it just
6368 * ends up causing problems. So, we just handle
6369 * the WX extensions through the ipw2100_ioctl interface */
6370
6371
6372 /* memset() puts everything to 0, so we only have explicitely set
6373 * those values that need to be something else */
6374
6375 /* If power management is turned on, default to AUTO mode */
6376 priv->power_mode = IPW_POWER_AUTO;
6377
6378
6379
6380#ifdef CONFIG_IEEE80211_WPA
6381 priv->ieee->wpa_enabled = 0;
6382 priv->ieee->tkip_countermeasures = 0;
6383 priv->ieee->drop_unencrypted = 0;
6384 priv->ieee->privacy_invoked = 0;
6385 priv->ieee->ieee802_1x = 1;
6386#endif /* CONFIG_IEEE80211_WPA */
6387
6388 /* Set module parameters */
6389 switch (mode) {
6390 case 1:
6391 priv->ieee->iw_mode = IW_MODE_ADHOC;
6392 break;
6393#ifdef CONFIG_IPW2100_MONITOR
6394 case 2:
6395 priv->ieee->iw_mode = IW_MODE_MONITOR;
6396 break;
6397#endif
6398 default:
6399 case 0:
6400 priv->ieee->iw_mode = IW_MODE_INFRA;
6401 break;
6402 }
6403
6404 if (disable == 1)
6405 priv->status |= STATUS_RF_KILL_SW;
6406
6407 if (channel != 0 &&
6408 ((channel >= REG_MIN_CHANNEL) &&
6409 (channel <= REG_MAX_CHANNEL))) {
6410 priv->config |= CFG_STATIC_CHANNEL;
6411 priv->channel = channel;
6412 }
6413
6414 if (associate)
6415 priv->config |= CFG_ASSOCIATE;
6416
6417 priv->beacon_interval = DEFAULT_BEACON_INTERVAL;
6418 priv->short_retry_limit = DEFAULT_SHORT_RETRY_LIMIT;
6419 priv->long_retry_limit = DEFAULT_LONG_RETRY_LIMIT;
6420 priv->rts_threshold = DEFAULT_RTS_THRESHOLD | RTS_DISABLED;
6421 priv->frag_threshold = DEFAULT_FTS | FRAG_DISABLED;
6422 priv->tx_power = IPW_TX_POWER_DEFAULT;
6423 priv->tx_rates = DEFAULT_TX_RATES;
6424
6425 strcpy(priv->nick, "ipw2100");
6426
6427 spin_lock_init(&priv->low_lock);
6428 sema_init(&priv->action_sem, 1);
6429 sema_init(&priv->adapter_sem, 1);
6430
6431 init_waitqueue_head(&priv->wait_command_queue);
6432
6433 netif_carrier_off(dev);
6434
6435 INIT_LIST_HEAD(&priv->msg_free_list);
6436 INIT_LIST_HEAD(&priv->msg_pend_list);
6437 INIT_STAT(&priv->msg_free_stat);
6438 INIT_STAT(&priv->msg_pend_stat);
6439
6440 INIT_LIST_HEAD(&priv->tx_free_list);
6441 INIT_LIST_HEAD(&priv->tx_pend_list);
6442 INIT_STAT(&priv->tx_free_stat);
6443 INIT_STAT(&priv->tx_pend_stat);
6444
6445 INIT_LIST_HEAD(&priv->fw_pend_list);
6446 INIT_STAT(&priv->fw_pend_stat);
6447
6448
6449#ifdef CONFIG_SOFTWARE_SUSPEND2
6450 priv->workqueue = create_workqueue(DRV_NAME, 0);
6451#else
6452 priv->workqueue = create_workqueue(DRV_NAME);
6453#endif
6454 INIT_WORK(&priv->reset_work,
6455 (void (*)(void *))ipw2100_reset_adapter, priv);
6456 INIT_WORK(&priv->security_work,
6457 (void (*)(void *))ipw2100_security_work, priv);
6458 INIT_WORK(&priv->wx_event_work,
6459 (void (*)(void *))ipw2100_wx_event_work, priv);
6460 INIT_WORK(&priv->hang_check, ipw2100_hang_check, priv);
6461 INIT_WORK(&priv->rf_kill, ipw2100_rf_kill, priv);
6462
6463 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
6464 ipw2100_irq_tasklet, (unsigned long)priv);
6465
6466 /* NOTE: We do not start the deferred work for status checks yet */
6467 priv->stop_rf_kill = 1;
6468 priv->stop_hang_check = 1;
6469
6470 return dev;
6471}
6472
6473static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6474 const struct pci_device_id *ent)
6475{
6476 unsigned long mem_start, mem_len, mem_flags;
6477 char *base_addr = NULL;
6478 struct net_device *dev = NULL;
6479 struct ipw2100_priv *priv = NULL;
6480 int err = 0;
6481 int registered = 0;
6482 u32 val;
6483
6484 IPW_DEBUG_INFO("enter\n");
6485
6486 mem_start = pci_resource_start(pci_dev, 0);
6487 mem_len = pci_resource_len(pci_dev, 0);
6488 mem_flags = pci_resource_flags(pci_dev, 0);
6489
6490 if ((mem_flags & IORESOURCE_MEM) != IORESOURCE_MEM) {
6491 IPW_DEBUG_INFO("weird - resource type is not memory\n");
6492 err = -ENODEV;
6493 goto fail;
6494 }
6495
6496 base_addr = ioremap_nocache(mem_start, mem_len);
6497 if (!base_addr) {
6498 printk(KERN_WARNING DRV_NAME
6499 "Error calling ioremap_nocache.\n");
6500 err = -EIO;
6501 goto fail;
6502 }
6503
6504 /* allocate and initialize our net_device */
6505 dev = ipw2100_alloc_device(pci_dev, base_addr, mem_start, mem_len);
6506 if (!dev) {
6507 printk(KERN_WARNING DRV_NAME
6508 "Error calling ipw2100_alloc_device.\n");
6509 err = -ENOMEM;
6510 goto fail;
6511 }
6512
6513 /* set up PCI mappings for device */
6514 err = pci_enable_device(pci_dev);
6515 if (err) {
6516 printk(KERN_WARNING DRV_NAME
6517 "Error calling pci_enable_device.\n");
6518 return err;
6519 }
6520
6521 priv = ieee80211_priv(dev);
6522
6523 pci_set_master(pci_dev);
6524 pci_set_drvdata(pci_dev, priv);
6525
6526 err = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
6527 if (err) {
6528 printk(KERN_WARNING DRV_NAME
6529 "Error calling pci_set_dma_mask.\n");
6530 pci_disable_device(pci_dev);
6531 return err;
6532 }
6533
6534 err = pci_request_regions(pci_dev, DRV_NAME);
6535 if (err) {
6536 printk(KERN_WARNING DRV_NAME
6537 "Error calling pci_request_regions.\n");
6538 pci_disable_device(pci_dev);
6539 return err;
6540 }
6541
6542 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6543 * PCI Tx retries from interfering with C3 CPU state */
6544 pci_read_config_dword(pci_dev, 0x40, &val);
6545 if ((val & 0x0000ff00) != 0)
6546 pci_write_config_dword(pci_dev, 0x40, val & 0xffff00ff);
6547
6548 pci_set_power_state(pci_dev, PCI_D0);
6549
6550 if (!ipw2100_hw_is_adapter_in_system(dev)) {
6551 printk(KERN_WARNING DRV_NAME
6552 "Device not found via register read.\n");
6553 err = -ENODEV;
6554 goto fail;
6555 }
6556
6557 SET_NETDEV_DEV(dev, &pci_dev->dev);
6558
6559 /* Force interrupts to be shut off on the device */
6560 priv->status |= STATUS_INT_ENABLED;
6561 ipw2100_disable_interrupts(priv);
6562
6563 /* Allocate and initialize the Tx/Rx queues and lists */
6564 if (ipw2100_queues_allocate(priv)) {
6565 printk(KERN_WARNING DRV_NAME
6566 "Error calilng ipw2100_queues_allocate.\n");
6567 err = -ENOMEM;
6568 goto fail;
6569 }
6570 ipw2100_queues_initialize(priv);
6571
6572 err = request_irq(pci_dev->irq,
6573 ipw2100_interrupt, SA_SHIRQ,
6574 dev->name, priv);
6575 if (err) {
6576 printk(KERN_WARNING DRV_NAME
6577 "Error calling request_irq: %d.\n",
6578 pci_dev->irq);
6579 goto fail;
6580 }
6581 dev->irq = pci_dev->irq;
6582
6583 IPW_DEBUG_INFO("Attempting to register device...\n");
6584
6585 SET_MODULE_OWNER(dev);
6586
6587 printk(KERN_INFO DRV_NAME
6588 ": Detected Intel PRO/Wireless 2100 Network Connection\n");
6589
6590 /* Bring up the interface. Pre 0.46, after we registered the
6591 * network device we would call ipw2100_up. This introduced a race
6592 * condition with newer hotplug configurations (network was coming
6593 * up and making calls before the device was initialized).
6594 *
6595 * If we called ipw2100_up before we registered the device, then the
6596 * device name wasn't registered. So, we instead use the net_dev->init
6597 * member to call a function that then just turns and calls ipw2100_up.
6598 * net_dev->init is called after name allocation but before the
6599 * notifier chain is called */
6600 down(&priv->action_sem);
6601 err = register_netdev(dev);
6602 if (err) {
6603 printk(KERN_WARNING DRV_NAME
6604 "Error calling register_netdev.\n");
6605 goto fail_unlock;
6606 }
6607 registered = 1;
6608
6609 IPW_DEBUG_INFO("%s: Bound to %s\n", dev->name, pci_name(pci_dev));
6610
6611 /* perform this after register_netdev so that dev->name is set */
6612 sysfs_create_group(&pci_dev->dev.kobj, &ipw2100_attribute_group);
6613 netif_carrier_off(dev);
6614
6615 /* If the RF Kill switch is disabled, go ahead and complete the
6616 * startup sequence */
6617 if (!(priv->status & STATUS_RF_KILL_MASK)) {
6618 /* Enable the adapter - sends HOST_COMPLETE */
6619 if (ipw2100_enable_adapter(priv)) {
6620 printk(KERN_WARNING DRV_NAME
6621 ": %s: failed in call to enable adapter.\n",
6622 priv->net_dev->name);
6623 ipw2100_hw_stop_adapter(priv);
6624 err = -EIO;
6625 goto fail_unlock;
6626 }
6627
6628 /* Start a scan . . . */
6629 ipw2100_set_scan_options(priv);
6630 ipw2100_start_scan(priv);
6631 }
6632
6633 IPW_DEBUG_INFO("exit\n");
6634
6635 priv->status |= STATUS_INITIALIZED;
6636
6637 up(&priv->action_sem);
6638
6639 return 0;
6640
6641 fail_unlock:
6642 up(&priv->action_sem);
6643
6644 fail:
6645 if (dev) {
6646 if (registered)
6647 unregister_netdev(dev);
6648
6649 ipw2100_hw_stop_adapter(priv);
6650
6651 ipw2100_disable_interrupts(priv);
6652
6653 if (dev->irq)
6654 free_irq(dev->irq, priv);
6655
6656 ipw2100_kill_workqueue(priv);
6657
6658 /* These are safe to call even if they weren't allocated */
6659 ipw2100_queues_free(priv);
6660 sysfs_remove_group(&pci_dev->dev.kobj, &ipw2100_attribute_group);
6661
6662 free_ieee80211(dev);
6663 pci_set_drvdata(pci_dev, NULL);
6664 }
6665
6666 if (base_addr)
6667 iounmap((char*)base_addr);
6668
6669 pci_release_regions(pci_dev);
6670 pci_disable_device(pci_dev);
6671
6672 return err;
6673}
6674
6675static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6676{
6677 struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);
6678 struct net_device *dev;
6679
6680 if (priv) {
6681 down(&priv->action_sem);
6682
6683 priv->status &= ~STATUS_INITIALIZED;
6684
6685 dev = priv->net_dev;
6686 sysfs_remove_group(&pci_dev->dev.kobj, &ipw2100_attribute_group);
6687
6688#ifdef CONFIG_PM
6689 if (ipw2100_firmware.version)
6690 ipw2100_release_firmware(priv, &ipw2100_firmware);
6691#endif
6692 /* Take down the hardware */
6693 ipw2100_down(priv);
6694
6695 /* Release the semaphore so that the network subsystem can
6696 * complete any needed calls into the driver... */
6697 up(&priv->action_sem);
6698
6699 /* Unregister the device first - this results in close()
6700 * being called if the device is open. If we free storage
6701 * first, then close() will crash. */
6702 unregister_netdev(dev);
6703
6704 /* ipw2100_down will ensure that there is no more pending work
6705 * in the workqueue's, so we can safely remove them now. */
6706 ipw2100_kill_workqueue(priv);
6707
6708 ipw2100_queues_free(priv);
6709
6710 /* Free potential debugging firmware snapshot */
6711 ipw2100_snapshot_free(priv);
6712
6713 if (dev->irq)
6714 free_irq(dev->irq, priv);
6715
6716 if (dev->base_addr)
6717 iounmap((unsigned char *)dev->base_addr);
6718
6719 free_ieee80211(dev);
6720 }
6721
6722 pci_release_regions(pci_dev);
6723 pci_disable_device(pci_dev);
6724
6725 IPW_DEBUG_INFO("exit\n");
6726}
6727
6728
6729#ifdef CONFIG_PM
6730#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
6731static int ipw2100_suspend(struct pci_dev *pci_dev, u32 state)
6732#else
6733static int ipw2100_suspend(struct pci_dev *pci_dev, pm_message_t state)
6734#endif
6735{
6736 struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);
6737 struct net_device *dev = priv->net_dev;
6738
6739 IPW_DEBUG_INFO("%s: Going into suspend...\n",
6740 dev->name);
6741
6742 down(&priv->action_sem);
6743 if (priv->status & STATUS_INITIALIZED) {
6744 /* Take down the device; powers it off, etc. */
6745 ipw2100_down(priv);
6746 }
6747
6748 /* Remove the PRESENT state of the device */
6749 netif_device_detach(dev);
6750
6751 pci_save_state(pci_dev);
6752 pci_disable_device (pci_dev);
6753 pci_set_power_state(pci_dev, PCI_D3hot);
6754
6755 up(&priv->action_sem);
6756
6757 return 0;
6758}
6759
6760static int ipw2100_resume(struct pci_dev *pci_dev)
6761{
6762 struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);
6763 struct net_device *dev = priv->net_dev;
6764 u32 val;
6765
6766 if (IPW2100_PM_DISABLED)
6767 return 0;
6768
6769 down(&priv->action_sem);
6770
6771 IPW_DEBUG_INFO("%s: Coming out of suspend...\n",
6772 dev->name);
6773
6774 pci_set_power_state(pci_dev, PCI_D0);
6775 pci_enable_device(pci_dev);
6776 pci_restore_state(pci_dev);
6777
6778 /*
6779 * Suspend/Resume resets the PCI configuration space, so we have to
6780 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
6781 * from interfering with C3 CPU state. pci_restore_state won't help
6782 * here since it only restores the first 64 bytes pci config header.
6783 */
6784 pci_read_config_dword(pci_dev, 0x40, &val);
6785 if ((val & 0x0000ff00) != 0)
6786 pci_write_config_dword(pci_dev, 0x40, val & 0xffff00ff);
6787
6788 /* Set the device back into the PRESENT state; this will also wake
6789 * the queue of needed */
6790 netif_device_attach(dev);
6791
6792 /* Bring the device back up */
6793 if (!(priv->status & STATUS_RF_KILL_SW))
6794 ipw2100_up(priv, 0);
6795
6796 up(&priv->action_sem);
6797
6798 return 0;
6799}
6800#endif
6801
6802
6803#define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x }
6804
6805static struct pci_device_id ipw2100_pci_id_table[] __devinitdata = {
6806 IPW2100_DEV_ID(0x2520), /* IN 2100A mPCI 3A */
6807 IPW2100_DEV_ID(0x2521), /* IN 2100A mPCI 3B */
6808 IPW2100_DEV_ID(0x2524), /* IN 2100A mPCI 3B */
6809 IPW2100_DEV_ID(0x2525), /* IN 2100A mPCI 3B */
6810 IPW2100_DEV_ID(0x2526), /* IN 2100A mPCI Gen A3 */
6811 IPW2100_DEV_ID(0x2522), /* IN 2100 mPCI 3B */
6812 IPW2100_DEV_ID(0x2523), /* IN 2100 mPCI 3A */
6813 IPW2100_DEV_ID(0x2527), /* IN 2100 mPCI 3B */
6814 IPW2100_DEV_ID(0x2528), /* IN 2100 mPCI 3B */
6815 IPW2100_DEV_ID(0x2529), /* IN 2100 mPCI 3B */
6816 IPW2100_DEV_ID(0x252B), /* IN 2100 mPCI 3A */
6817 IPW2100_DEV_ID(0x252C), /* IN 2100 mPCI 3A */
6818 IPW2100_DEV_ID(0x252D), /* IN 2100 mPCI 3A */
6819
6820 IPW2100_DEV_ID(0x2550), /* IB 2100A mPCI 3B */
6821 IPW2100_DEV_ID(0x2551), /* IB 2100 mPCI 3B */
6822 IPW2100_DEV_ID(0x2553), /* IB 2100 mPCI 3B */
6823 IPW2100_DEV_ID(0x2554), /* IB 2100 mPCI 3B */
6824 IPW2100_DEV_ID(0x2555), /* IB 2100 mPCI 3B */
6825
6826 IPW2100_DEV_ID(0x2560), /* DE 2100A mPCI 3A */
6827 IPW2100_DEV_ID(0x2562), /* DE 2100A mPCI 3A */
6828 IPW2100_DEV_ID(0x2563), /* DE 2100A mPCI 3A */
6829 IPW2100_DEV_ID(0x2561), /* DE 2100 mPCI 3A */
6830 IPW2100_DEV_ID(0x2565), /* DE 2100 mPCI 3A */
6831 IPW2100_DEV_ID(0x2566), /* DE 2100 mPCI 3A */
6832 IPW2100_DEV_ID(0x2567), /* DE 2100 mPCI 3A */
6833
6834 IPW2100_DEV_ID(0x2570), /* GA 2100 mPCI 3B */
6835
6836 IPW2100_DEV_ID(0x2580), /* TO 2100A mPCI 3B */
6837 IPW2100_DEV_ID(0x2582), /* TO 2100A mPCI 3B */
6838 IPW2100_DEV_ID(0x2583), /* TO 2100A mPCI 3B */
6839 IPW2100_DEV_ID(0x2581), /* TO 2100 mPCI 3B */
6840 IPW2100_DEV_ID(0x2585), /* TO 2100 mPCI 3B */
6841 IPW2100_DEV_ID(0x2586), /* TO 2100 mPCI 3B */
6842 IPW2100_DEV_ID(0x2587), /* TO 2100 mPCI 3B */
6843
6844 IPW2100_DEV_ID(0x2590), /* SO 2100A mPCI 3B */
6845 IPW2100_DEV_ID(0x2592), /* SO 2100A mPCI 3B */
6846 IPW2100_DEV_ID(0x2591), /* SO 2100 mPCI 3B */
6847 IPW2100_DEV_ID(0x2593), /* SO 2100 mPCI 3B */
6848 IPW2100_DEV_ID(0x2596), /* SO 2100 mPCI 3B */
6849 IPW2100_DEV_ID(0x2598), /* SO 2100 mPCI 3B */
6850
6851 IPW2100_DEV_ID(0x25A0), /* HP 2100 mPCI 3B */
6852 {0,},
6853};
6854
6855MODULE_DEVICE_TABLE(pci, ipw2100_pci_id_table);
6856
6857static struct pci_driver ipw2100_pci_driver = {
6858 .name = DRV_NAME,
6859 .id_table = ipw2100_pci_id_table,
6860 .probe = ipw2100_pci_init_one,
6861 .remove = __devexit_p(ipw2100_pci_remove_one),
6862#ifdef CONFIG_PM
6863 .suspend = ipw2100_suspend,
6864 .resume = ipw2100_resume,
6865#endif
6866};
6867
6868
6869/**
6870 * Initialize the ipw2100 driver/module
6871 *
6872 * @returns 0 if ok, < 0 errno node con error.
6873 *
6874 * Note: we cannot init the /proc stuff until the PCI driver is there,
6875 * or we risk an unlikely race condition on someone accessing
6876 * uninitialized data in the PCI dev struct through /proc.
6877 */
6878static int __init ipw2100_init(void)
6879{
6880 int ret;
6881
6882 printk(KERN_INFO DRV_NAME ": %s, %s\n", DRV_DESCRIPTION, DRV_VERSION);
6883 printk(KERN_INFO DRV_NAME ": %s\n", DRV_COPYRIGHT);
6884
6885#ifdef CONFIG_IEEE80211_NOWEP
6886 IPW_DEBUG_INFO(DRV_NAME ": Compiled with WEP disabled.\n");
6887#endif
6888
6889 ret = pci_module_init(&ipw2100_pci_driver);
6890
6891#ifdef CONFIG_IPW_DEBUG
6892 ipw2100_debug_level = debug;
6893 driver_create_file(&ipw2100_pci_driver.driver,
6894 &driver_attr_debug_level);
6895#endif
6896
6897 return ret;
6898}
6899
6900
6901/**
6902 * Cleanup ipw2100 driver registration
6903 */
6904static void __exit ipw2100_exit(void)
6905{
6906 /* FIXME: IPG: check that we have no instances of the devices open */
6907#ifdef CONFIG_IPW_DEBUG
6908 driver_remove_file(&ipw2100_pci_driver.driver,
6909 &driver_attr_debug_level);
6910#endif
6911 pci_unregister_driver(&ipw2100_pci_driver);
6912}
6913
6914module_init(ipw2100_init);
6915module_exit(ipw2100_exit);
6916
6917#define WEXT_USECHANNELS 1
6918
6919static const long ipw2100_frequencies[] = {
6920 2412, 2417, 2422, 2427,
6921 2432, 2437, 2442, 2447,
6922 2452, 2457, 2462, 2467,
6923 2472, 2484
6924};
6925
6926#define FREQ_COUNT (sizeof(ipw2100_frequencies) / \
6927 sizeof(ipw2100_frequencies[0]))
6928
6929static const long ipw2100_rates_11b[] = {
6930 1000000,
6931 2000000,
6932 5500000,
6933 11000000
6934};
6935
6936#define RATE_COUNT (sizeof(ipw2100_rates_11b) / sizeof(ipw2100_rates_11b[0]))
6937
6938static int ipw2100_wx_get_name(struct net_device *dev,
6939 struct iw_request_info *info,
6940 union iwreq_data *wrqu, char *extra)
6941{
6942 /*
6943 * This can be called at any time. No action lock required
6944 */
6945
6946 struct ipw2100_priv *priv = ieee80211_priv(dev);
6947 if (!(priv->status & STATUS_ASSOCIATED))
6948 strcpy(wrqu->name, "unassociated");
6949 else
6950 snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b");
6951
6952 IPW_DEBUG_WX("Name: %s\n", wrqu->name);
6953 return 0;
6954}
6955
6956
6957static int ipw2100_wx_set_freq(struct net_device *dev,
6958 struct iw_request_info *info,
6959 union iwreq_data *wrqu, char *extra)
6960{
6961 struct ipw2100_priv *priv = ieee80211_priv(dev);
6962 struct iw_freq *fwrq = &wrqu->freq;
6963 int err = 0;
6964
6965 if (priv->ieee->iw_mode == IW_MODE_INFRA)
6966 return -EOPNOTSUPP;
6967
6968 down(&priv->action_sem);
6969 if (!(priv->status & STATUS_INITIALIZED)) {
6970 err = -EIO;
6971 goto done;
6972 }
6973
6974 /* if setting by freq convert to channel */
6975 if (fwrq->e == 1) {
6976 if ((fwrq->m >= (int) 2.412e8 &&
6977 fwrq->m <= (int) 2.487e8)) {
6978 int f = fwrq->m / 100000;
6979 int c = 0;
6980
6981 while ((c < REG_MAX_CHANNEL) &&
6982 (f != ipw2100_frequencies[c]))
6983 c++;
6984
6985 /* hack to fall through */
6986 fwrq->e = 0;
6987 fwrq->m = c + 1;
6988 }
6989 }
6990
6991 if (fwrq->e > 0 || fwrq->m > 1000)
6992 return -EOPNOTSUPP;
6993 else { /* Set the channel */
6994 IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m);
6995 err = ipw2100_set_channel(priv, fwrq->m, 0);
6996 }
6997
6998 done:
6999 up(&priv->action_sem);
7000 return err;
7001}
7002
7003
7004static int ipw2100_wx_get_freq(struct net_device *dev,
7005 struct iw_request_info *info,
7006 union iwreq_data *wrqu, char *extra)
7007{
7008 /*
7009 * This can be called at any time. No action lock required
7010 */
7011
7012 struct ipw2100_priv *priv = ieee80211_priv(dev);
7013
7014 wrqu->freq.e = 0;
7015
7016 /* If we are associated, trying to associate, or have a statically
7017 * configured CHANNEL then return that; otherwise return ANY */
7018 if (priv->config & CFG_STATIC_CHANNEL ||
7019 priv->status & STATUS_ASSOCIATED)
7020 wrqu->freq.m = priv->channel;
7021 else
7022 wrqu->freq.m = 0;
7023
7024 IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel);
7025 return 0;
7026
7027}
7028
7029static int ipw2100_wx_set_mode(struct net_device *dev,
7030 struct iw_request_info *info,
7031 union iwreq_data *wrqu, char *extra)
7032{
7033 struct ipw2100_priv *priv = ieee80211_priv(dev);
7034 int err = 0;
7035
7036 IPW_DEBUG_WX("SET Mode -> %d \n", wrqu->mode);
7037
7038 if (wrqu->mode == priv->ieee->iw_mode)
7039 return 0;
7040
7041 down(&priv->action_sem);
7042 if (!(priv->status & STATUS_INITIALIZED)) {
7043 err = -EIO;
7044 goto done;
7045 }
7046
7047 switch (wrqu->mode) {
7048#ifdef CONFIG_IPW2100_MONITOR
7049 case IW_MODE_MONITOR:
7050 err = ipw2100_switch_mode(priv, IW_MODE_MONITOR);
7051 break;
7052#endif /* CONFIG_IPW2100_MONITOR */
7053 case IW_MODE_ADHOC:
7054 err = ipw2100_switch_mode(priv, IW_MODE_ADHOC);
7055 break;
7056 case IW_MODE_INFRA:
7057 case IW_MODE_AUTO:
7058 default:
7059 err = ipw2100_switch_mode(priv, IW_MODE_INFRA);
7060 break;
7061 }
7062
7063done:
7064 up(&priv->action_sem);
7065 return err;
7066}
7067
7068static int ipw2100_wx_get_mode(struct net_device *dev,
7069 struct iw_request_info *info,
7070 union iwreq_data *wrqu, char *extra)
7071{
7072 /*
7073 * This can be called at any time. No action lock required
7074 */
7075
7076 struct ipw2100_priv *priv = ieee80211_priv(dev);
7077
7078 wrqu->mode = priv->ieee->iw_mode;
7079 IPW_DEBUG_WX("GET Mode -> %d\n", wrqu->mode);
7080
7081 return 0;
7082}
7083
7084
7085#define POWER_MODES 5
7086
7087/* Values are in microsecond */
7088static const s32 timeout_duration[POWER_MODES] = {
7089 350000,
7090 250000,
7091 75000,
7092 37000,
7093 25000,
7094};
7095
7096static const s32 period_duration[POWER_MODES] = {
7097 400000,
7098 700000,
7099 1000000,
7100 1000000,
7101 1000000
7102};
7103
7104static int ipw2100_wx_get_range(struct net_device *dev,
7105 struct iw_request_info *info,
7106 union iwreq_data *wrqu, char *extra)
7107{
7108 /*
7109 * This can be called at any time. No action lock required
7110 */
7111
7112 struct ipw2100_priv *priv = ieee80211_priv(dev);
7113 struct iw_range *range = (struct iw_range *)extra;
7114 u16 val;
7115 int i, level;
7116
7117 wrqu->data.length = sizeof(*range);
7118 memset(range, 0, sizeof(*range));
7119
7120 /* Let's try to keep this struct in the same order as in
7121 * linux/include/wireless.h
7122 */
7123
7124 /* TODO: See what values we can set, and remove the ones we can't
7125 * set, or fill them with some default data.
7126 */
7127
7128 /* ~5 Mb/s real (802.11b) */
7129 range->throughput = 5 * 1000 * 1000;
7130
7131// range->sensitivity; /* signal level threshold range */
7132
7133 range->max_qual.qual = 100;
7134 /* TODO: Find real max RSSI and stick here */
7135 range->max_qual.level = 0;
7136 range->max_qual.noise = 0;
7137 range->max_qual.updated = 7; /* Updated all three */
7138
7139 range->avg_qual.qual = 70; /* > 8% missed beacons is 'bad' */
7140 /* TODO: Find real 'good' to 'bad' threshol value for RSSI */
7141 range->avg_qual.level = 20 + IPW2100_RSSI_TO_DBM;
7142 range->avg_qual.noise = 0;
7143 range->avg_qual.updated = 7; /* Updated all three */
7144
7145 range->num_bitrates = RATE_COUNT;
7146
7147 for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) {
7148 range->bitrate[i] = ipw2100_rates_11b[i];
7149 }
7150
7151 range->min_rts = MIN_RTS_THRESHOLD;
7152 range->max_rts = MAX_RTS_THRESHOLD;
7153 range->min_frag = MIN_FRAG_THRESHOLD;
7154 range->max_frag = MAX_FRAG_THRESHOLD;
7155
7156 range->min_pmp = period_duration[0]; /* Minimal PM period */
7157 range->max_pmp = period_duration[POWER_MODES-1];/* Maximal PM period */
7158 range->min_pmt = timeout_duration[POWER_MODES-1]; /* Minimal PM timeout */
7159 range->max_pmt = timeout_duration[0];/* Maximal PM timeout */
7160
7161 /* How to decode max/min PM period */
7162 range->pmp_flags = IW_POWER_PERIOD;
7163 /* How to decode max/min PM period */
7164 range->pmt_flags = IW_POWER_TIMEOUT;
7165 /* What PM options are supported */
7166 range->pm_capa = IW_POWER_TIMEOUT | IW_POWER_PERIOD;
7167
7168 range->encoding_size[0] = 5;
7169 range->encoding_size[1] = 13; /* Different token sizes */
7170 range->num_encoding_sizes = 2; /* Number of entry in the list */
7171 range->max_encoding_tokens = WEP_KEYS; /* Max number of tokens */
7172// range->encoding_login_index; /* token index for login token */
7173
7174 if (priv->ieee->iw_mode == IW_MODE_ADHOC) {
7175 range->txpower_capa = IW_TXPOW_DBM;
7176 range->num_txpower = IW_MAX_TXPOWER;
7177 for (i = 0, level = (IPW_TX_POWER_MAX_DBM * 16); i < IW_MAX_TXPOWER;
7178 i++, level -= ((IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM) * 16) /
7179 (IW_MAX_TXPOWER - 1))
7180 range->txpower[i] = level / 16;
7181 } else {
7182 range->txpower_capa = 0;
7183 range->num_txpower = 0;
7184 }
7185
7186
7187 /* Set the Wireless Extension versions */
7188 range->we_version_compiled = WIRELESS_EXT;
7189 range->we_version_source = 16;
7190
7191// range->retry_capa; /* What retry options are supported */
7192// range->retry_flags; /* How to decode max/min retry limit */
7193// range->r_time_flags; /* How to decode max/min retry life */
7194// range->min_retry; /* Minimal number of retries */
7195// range->max_retry; /* Maximal number of retries */
7196// range->min_r_time; /* Minimal retry lifetime */
7197// range->max_r_time; /* Maximal retry lifetime */
7198
7199 range->num_channels = FREQ_COUNT;
7200
7201 val = 0;
7202 for (i = 0; i < FREQ_COUNT; i++) {
7203 // TODO: Include only legal frequencies for some countries
7204// if (local->channel_mask & (1 << i)) {
7205 range->freq[val].i = i + 1;
7206 range->freq[val].m = ipw2100_frequencies[i] * 100000;
7207 range->freq[val].e = 1;
7208 val++;
7209// }
7210 if (val == IW_MAX_FREQUENCIES)
7211 break;
7212 }
7213 range->num_frequency = val;
7214
7215 IPW_DEBUG_WX("GET Range\n");
7216
7217 return 0;
7218}
7219
7220static int ipw2100_wx_set_wap(struct net_device *dev,
7221 struct iw_request_info *info,
7222 union iwreq_data *wrqu, char *extra)
7223{
7224 struct ipw2100_priv *priv = ieee80211_priv(dev);
7225 int err = 0;
7226
7227 static const unsigned char any[] = {
7228 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
7229 };
7230 static const unsigned char off[] = {
7231 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
7232 };
7233
7234 // sanity checks
7235 if (wrqu->ap_addr.sa_family != ARPHRD_ETHER)
7236 return -EINVAL;
7237
7238 down(&priv->action_sem);
7239 if (!(priv->status & STATUS_INITIALIZED)) {
7240 err = -EIO;
7241 goto done;
7242 }
7243
7244 if (!memcmp(any, wrqu->ap_addr.sa_data, ETH_ALEN) ||
7245 !memcmp(off, wrqu->ap_addr.sa_data, ETH_ALEN)) {
7246 /* we disable mandatory BSSID association */
7247 IPW_DEBUG_WX("exit - disable mandatory BSSID\n");
7248 priv->config &= ~CFG_STATIC_BSSID;
7249 err = ipw2100_set_mandatory_bssid(priv, NULL, 0);
7250 goto done;
7251 }
7252
7253 priv->config |= CFG_STATIC_BSSID;
7254 memcpy(priv->mandatory_bssid_mac, wrqu->ap_addr.sa_data, ETH_ALEN);
7255
7256 err = ipw2100_set_mandatory_bssid(priv, wrqu->ap_addr.sa_data, 0);
7257
7258 IPW_DEBUG_WX("SET BSSID -> %02X:%02X:%02X:%02X:%02X:%02X\n",
7259 wrqu->ap_addr.sa_data[0] & 0xff,
7260 wrqu->ap_addr.sa_data[1] & 0xff,
7261 wrqu->ap_addr.sa_data[2] & 0xff,
7262 wrqu->ap_addr.sa_data[3] & 0xff,
7263 wrqu->ap_addr.sa_data[4] & 0xff,
7264 wrqu->ap_addr.sa_data[5] & 0xff);
7265
7266 done:
7267 up(&priv->action_sem);
7268 return err;
7269}
7270
7271static int ipw2100_wx_get_wap(struct net_device *dev,
7272 struct iw_request_info *info,
7273 union iwreq_data *wrqu, char *extra)
7274{
7275 /*
7276 * This can be called at any time. No action lock required
7277 */
7278
7279 struct ipw2100_priv *priv = ieee80211_priv(dev);
7280
7281 /* If we are associated, trying to associate, or have a statically
7282 * configured BSSID then return that; otherwise return ANY */
7283 if (priv->config & CFG_STATIC_BSSID ||
7284 priv->status & STATUS_ASSOCIATED) {
7285 wrqu->ap_addr.sa_family = ARPHRD_ETHER;
7286 memcpy(wrqu->ap_addr.sa_data, &priv->bssid, ETH_ALEN);
7287 } else
7288 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
7289
7290 IPW_DEBUG_WX("Getting WAP BSSID: " MAC_FMT "\n",
7291 MAC_ARG(wrqu->ap_addr.sa_data));
7292 return 0;
7293}
7294
7295static int ipw2100_wx_set_essid(struct net_device *dev,
7296 struct iw_request_info *info,
7297 union iwreq_data *wrqu, char *extra)
7298{
7299 struct ipw2100_priv *priv = ieee80211_priv(dev);
7300 char *essid = ""; /* ANY */
7301 int length = 0;
7302 int err = 0;
7303
7304 down(&priv->action_sem);
7305 if (!(priv->status & STATUS_INITIALIZED)) {
7306 err = -EIO;
7307 goto done;
7308 }
7309
7310 if (wrqu->essid.flags && wrqu->essid.length) {
7311 length = wrqu->essid.length - 1;
7312 essid = extra;
7313 }
7314
7315 if (length == 0) {
7316 IPW_DEBUG_WX("Setting ESSID to ANY\n");
7317 priv->config &= ~CFG_STATIC_ESSID;
7318 err = ipw2100_set_essid(priv, NULL, 0, 0);
7319 goto done;
7320 }
7321
7322 length = min(length, IW_ESSID_MAX_SIZE);
7323
7324 priv->config |= CFG_STATIC_ESSID;
7325
7326 if (priv->essid_len == length && !memcmp(priv->essid, extra, length)) {
7327 IPW_DEBUG_WX("ESSID set to current ESSID.\n");
7328 err = 0;
7329 goto done;
7330 }
7331
7332 IPW_DEBUG_WX("Setting ESSID: '%s' (%d)\n", escape_essid(essid, length),
7333 length);
7334
7335 priv->essid_len = length;
7336 memcpy(priv->essid, essid, priv->essid_len);
7337
7338 err = ipw2100_set_essid(priv, essid, length, 0);
7339
7340 done:
7341 up(&priv->action_sem);
7342 return err;
7343}
7344
7345static int ipw2100_wx_get_essid(struct net_device *dev,
7346 struct iw_request_info *info,
7347 union iwreq_data *wrqu, char *extra)
7348{
7349 /*
7350 * This can be called at any time. No action lock required
7351 */
7352
7353 struct ipw2100_priv *priv = ieee80211_priv(dev);
7354
7355 /* If we are associated, trying to associate, or have a statically
7356 * configured ESSID then return that; otherwise return ANY */
7357 if (priv->config & CFG_STATIC_ESSID ||
7358 priv->status & STATUS_ASSOCIATED) {
7359 IPW_DEBUG_WX("Getting essid: '%s'\n",
7360 escape_essid(priv->essid, priv->essid_len));
7361 memcpy(extra, priv->essid, priv->essid_len);
7362 wrqu->essid.length = priv->essid_len;
7363 wrqu->essid.flags = 1; /* active */
7364 } else {
7365 IPW_DEBUG_WX("Getting essid: ANY\n");
7366 wrqu->essid.length = 0;
7367 wrqu->essid.flags = 0; /* active */
7368 }
7369
7370 return 0;
7371}
7372
7373static int ipw2100_wx_set_nick(struct net_device *dev,
7374 struct iw_request_info *info,
7375 union iwreq_data *wrqu, char *extra)
7376{
7377 /*
7378 * This can be called at any time. No action lock required
7379 */
7380
7381 struct ipw2100_priv *priv = ieee80211_priv(dev);
7382
7383 if (wrqu->data.length > IW_ESSID_MAX_SIZE)
7384 return -E2BIG;
7385
7386 wrqu->data.length = min((size_t)wrqu->data.length, sizeof(priv->nick));
7387 memset(priv->nick, 0, sizeof(priv->nick));
7388 memcpy(priv->nick, extra, wrqu->data.length);
7389
7390 IPW_DEBUG_WX("SET Nickname -> %s \n", priv->nick);
7391
7392 return 0;
7393}
7394
7395static int ipw2100_wx_get_nick(struct net_device *dev,
7396 struct iw_request_info *info,
7397 union iwreq_data *wrqu, char *extra)
7398{
7399 /*
7400 * This can be called at any time. No action lock required
7401 */
7402
7403 struct ipw2100_priv *priv = ieee80211_priv(dev);
7404
7405 wrqu->data.length = strlen(priv->nick) + 1;
7406 memcpy(extra, priv->nick, wrqu->data.length);
7407 wrqu->data.flags = 1; /* active */
7408
7409 IPW_DEBUG_WX("GET Nickname -> %s \n", extra);
7410
7411 return 0;
7412}
7413
7414static int ipw2100_wx_set_rate(struct net_device *dev,
7415 struct iw_request_info *info,
7416 union iwreq_data *wrqu, char *extra)
7417{
7418 struct ipw2100_priv *priv = ieee80211_priv(dev);
7419 u32 target_rate = wrqu->bitrate.value;
7420 u32 rate;
7421 int err = 0;
7422
7423 down(&priv->action_sem);
7424 if (!(priv->status & STATUS_INITIALIZED)) {
7425 err = -EIO;
7426 goto done;
7427 }
7428
7429 rate = 0;
7430
7431 if (target_rate == 1000000 ||
7432 (!wrqu->bitrate.fixed && target_rate > 1000000))
7433 rate |= TX_RATE_1_MBIT;
7434 if (target_rate == 2000000 ||
7435 (!wrqu->bitrate.fixed && target_rate > 2000000))
7436 rate |= TX_RATE_2_MBIT;
7437 if (target_rate == 5500000 ||
7438 (!wrqu->bitrate.fixed && target_rate > 5500000))
7439 rate |= TX_RATE_5_5_MBIT;
7440 if (target_rate == 11000000 ||
7441 (!wrqu->bitrate.fixed && target_rate > 11000000))
7442 rate |= TX_RATE_11_MBIT;
7443 if (rate == 0)
7444 rate = DEFAULT_TX_RATES;
7445
7446 err = ipw2100_set_tx_rates(priv, rate, 0);
7447
7448 IPW_DEBUG_WX("SET Rate -> %04X \n", rate);
7449 done:
7450 up(&priv->action_sem);
7451 return err;
7452}
7453
7454
7455static int ipw2100_wx_get_rate(struct net_device *dev,
7456 struct iw_request_info *info,
7457 union iwreq_data *wrqu, char *extra)
7458{
7459 struct ipw2100_priv *priv = ieee80211_priv(dev);
7460 int val;
7461 int len = sizeof(val);
7462 int err = 0;
7463
7464 if (!(priv->status & STATUS_ENABLED) ||
7465 priv->status & STATUS_RF_KILL_MASK ||
7466 !(priv->status & STATUS_ASSOCIATED)) {
7467 wrqu->bitrate.value = 0;
7468 return 0;
7469 }
7470
7471 down(&priv->action_sem);
7472 if (!(priv->status & STATUS_INITIALIZED)) {
7473 err = -EIO;
7474 goto done;
7475 }
7476
7477 err = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE, &val, &len);
7478 if (err) {
7479 IPW_DEBUG_WX("failed querying ordinals.\n");
7480 return err;
7481 }
7482
7483 switch (val & TX_RATE_MASK) {
7484 case TX_RATE_1_MBIT:
7485 wrqu->bitrate.value = 1000000;
7486 break;
7487 case TX_RATE_2_MBIT:
7488 wrqu->bitrate.value = 2000000;
7489 break;
7490 case TX_RATE_5_5_MBIT:
7491 wrqu->bitrate.value = 5500000;
7492 break;
7493 case TX_RATE_11_MBIT:
7494 wrqu->bitrate.value = 11000000;
7495 break;
7496 default:
7497 wrqu->bitrate.value = 0;
7498 }
7499
7500 IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value);
7501
7502 done:
7503 up(&priv->action_sem);
7504 return err;
7505}
7506
7507static int ipw2100_wx_set_rts(struct net_device *dev,
7508 struct iw_request_info *info,
7509 union iwreq_data *wrqu, char *extra)
7510{
7511 struct ipw2100_priv *priv = ieee80211_priv(dev);
7512 int value, err;
7513
7514 /* Auto RTS not yet supported */
7515 if (wrqu->rts.fixed == 0)
7516 return -EINVAL;
7517
7518 down(&priv->action_sem);
7519 if (!(priv->status & STATUS_INITIALIZED)) {
7520 err = -EIO;
7521 goto done;
7522 }
7523
7524 if (wrqu->rts.disabled)
7525 value = priv->rts_threshold | RTS_DISABLED;
7526 else {
7527 if (wrqu->rts.value < 1 ||
7528 wrqu->rts.value > 2304) {
7529 err = -EINVAL;
7530 goto done;
7531 }
7532 value = wrqu->rts.value;
7533 }
7534
7535 err = ipw2100_set_rts_threshold(priv, value);
7536
7537 IPW_DEBUG_WX("SET RTS Threshold -> 0x%08X \n", value);
7538 done:
7539 up(&priv->action_sem);
7540 return err;
7541}
7542
7543static int ipw2100_wx_get_rts(struct net_device *dev,
7544 struct iw_request_info *info,
7545 union iwreq_data *wrqu, char *extra)
7546{
7547 /*
7548 * This can be called at any time. No action lock required
7549 */
7550
7551 struct ipw2100_priv *priv = ieee80211_priv(dev);
7552
7553 wrqu->rts.value = priv->rts_threshold & ~RTS_DISABLED;
7554 wrqu->rts.fixed = 1; /* no auto select */
7555
7556 /* If RTS is set to the default value, then it is disabled */
7557 wrqu->rts.disabled = (priv->rts_threshold & RTS_DISABLED) ? 1 : 0;
7558
7559 IPW_DEBUG_WX("GET RTS Threshold -> 0x%08X \n", wrqu->rts.value);
7560
7561 return 0;
7562}
7563
7564static int ipw2100_wx_set_txpow(struct net_device *dev,
7565 struct iw_request_info *info,
7566 union iwreq_data *wrqu, char *extra)
7567{
7568 struct ipw2100_priv *priv = ieee80211_priv(dev);
7569 int err = 0, value;
7570
7571 if (priv->ieee->iw_mode != IW_MODE_ADHOC)
7572 return -EINVAL;
7573
7574 if (wrqu->txpower.disabled == 1 || wrqu->txpower.fixed == 0)
7575 value = IPW_TX_POWER_DEFAULT;
7576 else {
7577 if (wrqu->txpower.value < IPW_TX_POWER_MIN_DBM ||
7578 wrqu->txpower.value > IPW_TX_POWER_MAX_DBM)
7579 return -EINVAL;
7580
7581 value = (wrqu->txpower.value - IPW_TX_POWER_MIN_DBM) * 16 /
7582 (IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM);
7583 }
7584
7585 down(&priv->action_sem);
7586 if (!(priv->status & STATUS_INITIALIZED)) {
7587 err = -EIO;
7588 goto done;
7589 }
7590
7591 err = ipw2100_set_tx_power(priv, value);
7592
7593 IPW_DEBUG_WX("SET TX Power -> %d \n", value);
7594
7595 done:
7596 up(&priv->action_sem);
7597 return err;
7598}
7599
7600static int ipw2100_wx_get_txpow(struct net_device *dev,
7601 struct iw_request_info *info,
7602 union iwreq_data *wrqu, char *extra)
7603{
7604 /*
7605 * This can be called at any time. No action lock required
7606 */
7607
7608 struct ipw2100_priv *priv = ieee80211_priv(dev);
7609
7610 if (priv->ieee->iw_mode != IW_MODE_ADHOC) {
7611 wrqu->power.disabled = 1;
7612 return 0;
7613 }
7614
7615 if (priv->tx_power == IPW_TX_POWER_DEFAULT) {
7616 wrqu->power.fixed = 0;
7617 wrqu->power.value = IPW_TX_POWER_MAX_DBM;
7618 wrqu->power.disabled = 1;
7619 } else {
7620 wrqu->power.disabled = 0;
7621 wrqu->power.fixed = 1;
7622 wrqu->power.value =
7623 (priv->tx_power *
7624 (IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM)) /
7625 (IPW_TX_POWER_MAX - IPW_TX_POWER_MIN) +
7626 IPW_TX_POWER_MIN_DBM;
7627 }
7628
7629 wrqu->power.flags = IW_TXPOW_DBM;
7630
7631 IPW_DEBUG_WX("GET TX Power -> %d \n", wrqu->power.value);
7632
7633 return 0;
7634}
7635
7636static int ipw2100_wx_set_frag(struct net_device *dev,
7637 struct iw_request_info *info,
7638 union iwreq_data *wrqu, char *extra)
7639{
7640 /*
7641 * This can be called at any time. No action lock required
7642 */
7643
7644 struct ipw2100_priv *priv = ieee80211_priv(dev);
7645
7646 if (!wrqu->frag.fixed)
7647 return -EINVAL;
7648
7649 if (wrqu->frag.disabled) {
7650 priv->frag_threshold |= FRAG_DISABLED;
7651 priv->ieee->fts = DEFAULT_FTS;
7652 } else {
7653 if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
7654 wrqu->frag.value > MAX_FRAG_THRESHOLD)
7655 return -EINVAL;
7656
7657 priv->ieee->fts = wrqu->frag.value & ~0x1;
7658 priv->frag_threshold = priv->ieee->fts;
7659 }
7660
7661 IPW_DEBUG_WX("SET Frag Threshold -> %d \n", priv->ieee->fts);
7662
7663 return 0;
7664}
7665
7666static int ipw2100_wx_get_frag(struct net_device *dev,
7667 struct iw_request_info *info,
7668 union iwreq_data *wrqu, char *extra)
7669{
7670 /*
7671 * This can be called at any time. No action lock required
7672 */
7673
7674 struct ipw2100_priv *priv = ieee80211_priv(dev);
7675 wrqu->frag.value = priv->frag_threshold & ~FRAG_DISABLED;
7676 wrqu->frag.fixed = 0; /* no auto select */
7677 wrqu->frag.disabled = (priv->frag_threshold & FRAG_DISABLED) ? 1 : 0;
7678
7679 IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value);
7680
7681 return 0;
7682}
7683
7684static int ipw2100_wx_set_retry(struct net_device *dev,
7685 struct iw_request_info *info,
7686 union iwreq_data *wrqu, char *extra)
7687{
7688 struct ipw2100_priv *priv = ieee80211_priv(dev);
7689 int err = 0;
7690
7691 if (wrqu->retry.flags & IW_RETRY_LIFETIME ||
7692 wrqu->retry.disabled)
7693 return -EINVAL;
7694
7695 if (!(wrqu->retry.flags & IW_RETRY_LIMIT))
7696 return 0;
7697
7698 down(&priv->action_sem);
7699 if (!(priv->status & STATUS_INITIALIZED)) {
7700 err = -EIO;
7701 goto done;
7702 }
7703
7704 if (wrqu->retry.flags & IW_RETRY_MIN) {
7705 err = ipw2100_set_short_retry(priv, wrqu->retry.value);
7706 IPW_DEBUG_WX("SET Short Retry Limit -> %d \n",
7707 wrqu->retry.value);
7708 goto done;
7709 }
7710
7711 if (wrqu->retry.flags & IW_RETRY_MAX) {
7712 err = ipw2100_set_long_retry(priv, wrqu->retry.value);
7713 IPW_DEBUG_WX("SET Long Retry Limit -> %d \n",
7714 wrqu->retry.value);
7715 goto done;
7716 }
7717
7718 err = ipw2100_set_short_retry(priv, wrqu->retry.value);
7719 if (!err)
7720 err = ipw2100_set_long_retry(priv, wrqu->retry.value);
7721
7722 IPW_DEBUG_WX("SET Both Retry Limits -> %d \n", wrqu->retry.value);
7723
7724 done:
7725 up(&priv->action_sem);
7726 return err;
7727}
7728
7729static int ipw2100_wx_get_retry(struct net_device *dev,
7730 struct iw_request_info *info,
7731 union iwreq_data *wrqu, char *extra)
7732{
7733 /*
7734 * This can be called at any time. No action lock required
7735 */
7736
7737 struct ipw2100_priv *priv = ieee80211_priv(dev);
7738
7739 wrqu->retry.disabled = 0; /* can't be disabled */
7740
7741 if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
7742 IW_RETRY_LIFETIME)
7743 return -EINVAL;
7744
7745 if (wrqu->retry.flags & IW_RETRY_MAX) {
7746 wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX;
7747 wrqu->retry.value = priv->long_retry_limit;
7748 } else {
7749 wrqu->retry.flags =
7750 (priv->short_retry_limit !=
7751 priv->long_retry_limit) ?
7752 IW_RETRY_LIMIT & IW_RETRY_MIN : IW_RETRY_LIMIT;
7753
7754 wrqu->retry.value = priv->short_retry_limit;
7755 }
7756
7757 IPW_DEBUG_WX("GET Retry -> %d \n", wrqu->retry.value);
7758
7759 return 0;
7760}
7761
7762static int ipw2100_wx_set_scan(struct net_device *dev,
7763 struct iw_request_info *info,
7764 union iwreq_data *wrqu, char *extra)
7765{
7766 struct ipw2100_priv *priv = ieee80211_priv(dev);
7767 int err = 0;
7768
7769 down(&priv->action_sem);
7770 if (!(priv->status & STATUS_INITIALIZED)) {
7771 err = -EIO;
7772 goto done;
7773 }
7774
7775 IPW_DEBUG_WX("Initiating scan...\n");
7776 if (ipw2100_set_scan_options(priv) ||
7777 ipw2100_start_scan(priv)) {
7778 IPW_DEBUG_WX("Start scan failed.\n");
7779
7780 /* TODO: Mark a scan as pending so when hardware initialized
7781 * a scan starts */
7782 }
7783
7784 done:
7785 up(&priv->action_sem);
7786 return err;
7787}
7788
7789static int ipw2100_wx_get_scan(struct net_device *dev,
7790 struct iw_request_info *info,
7791 union iwreq_data *wrqu, char *extra)
7792{
7793 /*
7794 * This can be called at any time. No action lock required
7795 */
7796
7797 struct ipw2100_priv *priv = ieee80211_priv(dev);
7798 return ieee80211_wx_get_scan(priv->ieee, info, wrqu, extra);
7799}
7800
7801
7802/*
7803 * Implementation based on code in hostap-driver v0.1.3 hostap_ioctl.c
7804 */
7805static int ipw2100_wx_set_encode(struct net_device *dev,
7806 struct iw_request_info *info,
7807 union iwreq_data *wrqu, char *key)
7808{
7809 /*
7810 * No check of STATUS_INITIALIZED required
7811 */
7812
7813 struct ipw2100_priv *priv = ieee80211_priv(dev);
7814 return ieee80211_wx_set_encode(priv->ieee, info, wrqu, key);
7815}
7816
7817static int ipw2100_wx_get_encode(struct net_device *dev,
7818 struct iw_request_info *info,
7819 union iwreq_data *wrqu, char *key)
7820{
7821 /*
7822 * This can be called at any time. No action lock required
7823 */
7824
7825 struct ipw2100_priv *priv = ieee80211_priv(dev);
7826 return ieee80211_wx_get_encode(priv->ieee, info, wrqu, key);
7827}
7828
7829static int ipw2100_wx_set_power(struct net_device *dev,
7830 struct iw_request_info *info,
7831 union iwreq_data *wrqu, char *extra)
7832{
7833 struct ipw2100_priv *priv = ieee80211_priv(dev);
7834 int err = 0;
7835
7836 down(&priv->action_sem);
7837 if (!(priv->status & STATUS_INITIALIZED)) {
7838 err = -EIO;
7839 goto done;
7840 }
7841
7842 if (wrqu->power.disabled) {
7843 priv->power_mode = IPW_POWER_LEVEL(priv->power_mode);
7844 err = ipw2100_set_power_mode(priv, IPW_POWER_MODE_CAM);
7845 IPW_DEBUG_WX("SET Power Management Mode -> off\n");
7846 goto done;
7847 }
7848
7849 switch (wrqu->power.flags & IW_POWER_MODE) {
7850 case IW_POWER_ON: /* If not specified */
7851 case IW_POWER_MODE: /* If set all mask */
7852 case IW_POWER_ALL_R: /* If explicitely state all */
7853 break;
7854 default: /* Otherwise we don't support it */
7855 IPW_DEBUG_WX("SET PM Mode: %X not supported.\n",
7856 wrqu->power.flags);
7857 err = -EOPNOTSUPP;
7858 goto done;
7859 }
7860
7861 /* If the user hasn't specified a power management mode yet, default
7862 * to BATTERY */
7863 priv->power_mode = IPW_POWER_ENABLED | priv->power_mode;
7864 err = ipw2100_set_power_mode(priv, IPW_POWER_LEVEL(priv->power_mode));
7865
7866 IPW_DEBUG_WX("SET Power Management Mode -> 0x%02X\n",
7867 priv->power_mode);
7868
7869 done:
7870 up(&priv->action_sem);
7871 return err;
7872
7873}
7874
7875static int ipw2100_wx_get_power(struct net_device *dev,
7876 struct iw_request_info *info,
7877 union iwreq_data *wrqu, char *extra)
7878{
7879 /*
7880 * This can be called at any time. No action lock required
7881 */
7882
7883 struct ipw2100_priv *priv = ieee80211_priv(dev);
7884
7885 if (!(priv->power_mode & IPW_POWER_ENABLED)) {
7886 wrqu->power.disabled = 1;
7887 } else {
7888 wrqu->power.disabled = 0;
7889 wrqu->power.flags = 0;
7890 }
7891
7892 IPW_DEBUG_WX("GET Power Management Mode -> %02X\n", priv->power_mode);
7893
7894 return 0;
7895}
7896
7897
7898/*
7899 *
7900 * IWPRIV handlers
7901 *
7902 */
7903#ifdef CONFIG_IPW2100_MONITOR
7904static int ipw2100_wx_set_promisc(struct net_device *dev,
7905 struct iw_request_info *info,
7906 union iwreq_data *wrqu, char *extra)
7907{
7908 struct ipw2100_priv *priv = ieee80211_priv(dev);
7909 int *parms = (int *)extra;
7910 int enable = (parms[0] > 0);
7911 int err = 0;
7912
7913 down(&priv->action_sem);
7914 if (!(priv->status & STATUS_INITIALIZED)) {
7915 err = -EIO;
7916 goto done;
7917 }
7918
7919 if (enable) {
7920 if (priv->ieee->iw_mode == IW_MODE_MONITOR) {
7921 err = ipw2100_set_channel(priv, parms[1], 0);
7922 goto done;
7923 }
7924 priv->channel = parms[1];
7925 err = ipw2100_switch_mode(priv, IW_MODE_MONITOR);
7926 } else {
7927 if (priv->ieee->iw_mode == IW_MODE_MONITOR)
7928 err = ipw2100_switch_mode(priv, priv->last_mode);
7929 }
7930 done:
7931 up(&priv->action_sem);
7932 return err;
7933}
7934
7935static int ipw2100_wx_reset(struct net_device *dev,
7936 struct iw_request_info *info,
7937 union iwreq_data *wrqu, char *extra)
7938{
7939 struct ipw2100_priv *priv = ieee80211_priv(dev);
7940 if (priv->status & STATUS_INITIALIZED)
7941 schedule_reset(priv);
7942 return 0;
7943}
7944
7945#endif
7946
7947static int ipw2100_wx_set_powermode(struct net_device *dev,
7948 struct iw_request_info *info,
7949 union iwreq_data *wrqu, char *extra)
7950{
7951 struct ipw2100_priv *priv = ieee80211_priv(dev);
7952 int err = 0, mode = *(int *)extra;
7953
7954 down(&priv->action_sem);
7955 if (!(priv->status & STATUS_INITIALIZED)) {
7956 err = -EIO;
7957 goto done;
7958 }
7959
7960 if ((mode < 1) || (mode > POWER_MODES))
7961 mode = IPW_POWER_AUTO;
7962
7963 if (priv->power_mode != mode)
7964 err = ipw2100_set_power_mode(priv, mode);
7965 done:
7966 up(&priv->action_sem);
7967 return err;
7968}
7969
7970#define MAX_POWER_STRING 80
7971static int ipw2100_wx_get_powermode(struct net_device *dev,
7972 struct iw_request_info *info,
7973 union iwreq_data *wrqu, char *extra)
7974{
7975 /*
7976 * This can be called at any time. No action lock required
7977 */
7978
7979 struct ipw2100_priv *priv = ieee80211_priv(dev);
7980 int level = IPW_POWER_LEVEL(priv->power_mode);
7981 s32 timeout, period;
7982
7983 if (!(priv->power_mode & IPW_POWER_ENABLED)) {
7984 snprintf(extra, MAX_POWER_STRING,
7985 "Power save level: %d (Off)", level);
7986 } else {
7987 switch (level) {
7988 case IPW_POWER_MODE_CAM:
7989 snprintf(extra, MAX_POWER_STRING,
7990 "Power save level: %d (None)", level);
7991 break;
7992 case IPW_POWER_AUTO:
7993 snprintf(extra, MAX_POWER_STRING,
7994 "Power save level: %d (Auto)", 0);
7995 break;
7996 default:
7997 timeout = timeout_duration[level - 1] / 1000;
7998 period = period_duration[level - 1] / 1000;
7999 snprintf(extra, MAX_POWER_STRING,
8000 "Power save level: %d "
8001 "(Timeout %dms, Period %dms)",
8002 level, timeout, period);
8003 }
8004 }
8005
8006 wrqu->data.length = strlen(extra) + 1;
8007
8008 return 0;
8009}
8010
8011
8012static int ipw2100_wx_set_preamble(struct net_device *dev,
8013 struct iw_request_info *info,
8014 union iwreq_data *wrqu, char *extra)
8015{
8016 struct ipw2100_priv *priv = ieee80211_priv(dev);
8017 int err, mode = *(int *)extra;
8018
8019 down(&priv->action_sem);
8020 if (!(priv->status & STATUS_INITIALIZED)) {
8021 err = -EIO;
8022 goto done;
8023 }
8024
8025 if (mode == 1)
8026 priv->config |= CFG_LONG_PREAMBLE;
8027 else if (mode == 0)
8028 priv->config &= ~CFG_LONG_PREAMBLE;
8029 else {
8030 err = -EINVAL;
8031 goto done;
8032 }
8033
8034 err = ipw2100_system_config(priv, 0);
8035
8036done:
8037 up(&priv->action_sem);
8038 return err;
8039}
8040
8041static int ipw2100_wx_get_preamble(struct net_device *dev,
8042 struct iw_request_info *info,
8043 union iwreq_data *wrqu, char *extra)
8044{
8045 /*
8046 * This can be called at any time. No action lock required
8047 */
8048
8049 struct ipw2100_priv *priv = ieee80211_priv(dev);
8050
8051 if (priv->config & CFG_LONG_PREAMBLE)
8052 snprintf(wrqu->name, IFNAMSIZ, "long (1)");
8053 else
8054 snprintf(wrqu->name, IFNAMSIZ, "auto (0)");
8055
8056 return 0;
8057}
8058
8059static iw_handler ipw2100_wx_handlers[] =
8060{
8061 NULL, /* SIOCSIWCOMMIT */
8062 ipw2100_wx_get_name, /* SIOCGIWNAME */
8063 NULL, /* SIOCSIWNWID */
8064 NULL, /* SIOCGIWNWID */
8065 ipw2100_wx_set_freq, /* SIOCSIWFREQ */
8066 ipw2100_wx_get_freq, /* SIOCGIWFREQ */
8067 ipw2100_wx_set_mode, /* SIOCSIWMODE */
8068 ipw2100_wx_get_mode, /* SIOCGIWMODE */
8069 NULL, /* SIOCSIWSENS */
8070 NULL, /* SIOCGIWSENS */
8071 NULL, /* SIOCSIWRANGE */
8072 ipw2100_wx_get_range, /* SIOCGIWRANGE */
8073 NULL, /* SIOCSIWPRIV */
8074 NULL, /* SIOCGIWPRIV */
8075 NULL, /* SIOCSIWSTATS */
8076 NULL, /* SIOCGIWSTATS */
8077 NULL, /* SIOCSIWSPY */
8078 NULL, /* SIOCGIWSPY */
8079 NULL, /* SIOCGIWTHRSPY */
8080 NULL, /* SIOCWIWTHRSPY */
8081 ipw2100_wx_set_wap, /* SIOCSIWAP */
8082 ipw2100_wx_get_wap, /* SIOCGIWAP */
8083 NULL, /* -- hole -- */
8084 NULL, /* SIOCGIWAPLIST -- deprecated */
8085 ipw2100_wx_set_scan, /* SIOCSIWSCAN */
8086 ipw2100_wx_get_scan, /* SIOCGIWSCAN */
8087 ipw2100_wx_set_essid, /* SIOCSIWESSID */
8088 ipw2100_wx_get_essid, /* SIOCGIWESSID */
8089 ipw2100_wx_set_nick, /* SIOCSIWNICKN */
8090 ipw2100_wx_get_nick, /* SIOCGIWNICKN */
8091 NULL, /* -- hole -- */
8092 NULL, /* -- hole -- */
8093 ipw2100_wx_set_rate, /* SIOCSIWRATE */
8094 ipw2100_wx_get_rate, /* SIOCGIWRATE */
8095 ipw2100_wx_set_rts, /* SIOCSIWRTS */
8096 ipw2100_wx_get_rts, /* SIOCGIWRTS */
8097 ipw2100_wx_set_frag, /* SIOCSIWFRAG */
8098 ipw2100_wx_get_frag, /* SIOCGIWFRAG */
8099 ipw2100_wx_set_txpow, /* SIOCSIWTXPOW */
8100 ipw2100_wx_get_txpow, /* SIOCGIWTXPOW */
8101 ipw2100_wx_set_retry, /* SIOCSIWRETRY */
8102 ipw2100_wx_get_retry, /* SIOCGIWRETRY */
8103 ipw2100_wx_set_encode, /* SIOCSIWENCODE */
8104 ipw2100_wx_get_encode, /* SIOCGIWENCODE */
8105 ipw2100_wx_set_power, /* SIOCSIWPOWER */
8106 ipw2100_wx_get_power, /* SIOCGIWPOWER */
8107};
8108
8109#define IPW2100_PRIV_SET_MONITOR SIOCIWFIRSTPRIV
8110#define IPW2100_PRIV_RESET SIOCIWFIRSTPRIV+1
8111#define IPW2100_PRIV_SET_POWER SIOCIWFIRSTPRIV+2
8112#define IPW2100_PRIV_GET_POWER SIOCIWFIRSTPRIV+3
8113#define IPW2100_PRIV_SET_LONGPREAMBLE SIOCIWFIRSTPRIV+4
8114#define IPW2100_PRIV_GET_LONGPREAMBLE SIOCIWFIRSTPRIV+5
8115
8116static const struct iw_priv_args ipw2100_private_args[] = {
8117
8118#ifdef CONFIG_IPW2100_MONITOR
8119 {
8120 IPW2100_PRIV_SET_MONITOR,
8121 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "monitor"
8122 },
8123 {
8124 IPW2100_PRIV_RESET,
8125 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 0, 0, "reset"
8126 },
8127#endif /* CONFIG_IPW2100_MONITOR */
8128
8129 {
8130 IPW2100_PRIV_SET_POWER,
8131 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "set_power"
8132 },
8133 {
8134 IPW2100_PRIV_GET_POWER,
8135 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_POWER_STRING, "get_power"
8136 },
8137 {
8138 IPW2100_PRIV_SET_LONGPREAMBLE,
8139 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "set_preamble"
8140 },
8141 {
8142 IPW2100_PRIV_GET_LONGPREAMBLE,
8143 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "get_preamble"
8144 },
8145};
8146
8147static iw_handler ipw2100_private_handler[] = {
8148#ifdef CONFIG_IPW2100_MONITOR
8149 ipw2100_wx_set_promisc,
8150 ipw2100_wx_reset,
8151#else /* CONFIG_IPW2100_MONITOR */
8152 NULL,
8153 NULL,
8154#endif /* CONFIG_IPW2100_MONITOR */
8155 ipw2100_wx_set_powermode,
8156 ipw2100_wx_get_powermode,
8157 ipw2100_wx_set_preamble,
8158 ipw2100_wx_get_preamble,
8159};
8160
8161static struct iw_handler_def ipw2100_wx_handler_def =
8162{
8163 .standard = ipw2100_wx_handlers,
8164 .num_standard = sizeof(ipw2100_wx_handlers) / sizeof(iw_handler),
8165 .num_private = sizeof(ipw2100_private_handler) / sizeof(iw_handler),
8166 .num_private_args = sizeof(ipw2100_private_args) /
8167 sizeof(struct iw_priv_args),
8168 .private = (iw_handler *)ipw2100_private_handler,
8169 .private_args = (struct iw_priv_args *)ipw2100_private_args,
8170};
8171
8172/*
8173 * Get wireless statistics.
8174 * Called by /proc/net/wireless
8175 * Also called by SIOCGIWSTATS
8176 */
8177static struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev)
8178{
8179 enum {
8180 POOR = 30,
8181 FAIR = 60,
8182 GOOD = 80,
8183 VERY_GOOD = 90,
8184 EXCELLENT = 95,
8185 PERFECT = 100
8186 };
8187 int rssi_qual;
8188 int tx_qual;
8189 int beacon_qual;
8190
8191 struct ipw2100_priv *priv = ieee80211_priv(dev);
8192 struct iw_statistics *wstats;
8193 u32 rssi, quality, tx_retries, missed_beacons, tx_failures;
8194 u32 ord_len = sizeof(u32);
8195
8196 if (!priv)
8197 return (struct iw_statistics *) NULL;
8198
8199 wstats = &priv->wstats;
8200
8201 /* if hw is disabled, then ipw2100_get_ordinal() can't be called.
8202 * ipw2100_wx_wireless_stats seems to be called before fw is
8203 * initialized. STATUS_ASSOCIATED will only be set if the hw is up
8204 * and associated; if not associcated, the values are all meaningless
8205 * anyway, so set them all to NULL and INVALID */
8206 if (!(priv->status & STATUS_ASSOCIATED)) {
8207 wstats->miss.beacon = 0;
8208 wstats->discard.retries = 0;
8209 wstats->qual.qual = 0;
8210 wstats->qual.level = 0;
8211 wstats->qual.noise = 0;
8212 wstats->qual.updated = 7;
8213 wstats->qual.updated |= IW_QUAL_NOISE_INVALID |
8214 IW_QUAL_QUAL_INVALID | IW_QUAL_LEVEL_INVALID;
8215 return wstats;
8216 }
8217
8218 if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_PERCENT_MISSED_BCNS,
8219 &missed_beacons, &ord_len))
8220 goto fail_get_ordinal;
8221
8222 /* If we don't have a connection the quality and level is 0*/
8223 if (!(priv->status & STATUS_ASSOCIATED)) {
8224 wstats->qual.qual = 0;
8225 wstats->qual.level = 0;
8226 } else {
8227 if (ipw2100_get_ordinal(priv, IPW_ORD_RSSI_AVG_CURR,
8228 &rssi, &ord_len))
8229 goto fail_get_ordinal;
8230 wstats->qual.level = rssi + IPW2100_RSSI_TO_DBM;
8231 if (rssi < 10)
8232 rssi_qual = rssi * POOR / 10;
8233 else if (rssi < 15)
8234 rssi_qual = (rssi - 10) * (FAIR - POOR) / 5 + POOR;
8235 else if (rssi < 20)
8236 rssi_qual = (rssi - 15) * (GOOD - FAIR) / 5 + FAIR;
8237 else if (rssi < 30)
8238 rssi_qual = (rssi - 20) * (VERY_GOOD - GOOD) /
8239 10 + GOOD;
8240 else
8241 rssi_qual = (rssi - 30) * (PERFECT - VERY_GOOD) /
8242 10 + VERY_GOOD;
8243
8244 if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_PERCENT_RETRIES,
8245 &tx_retries, &ord_len))
8246 goto fail_get_ordinal;
8247
8248 if (tx_retries > 75)
8249 tx_qual = (90 - tx_retries) * POOR / 15;
8250 else if (tx_retries > 70)
8251 tx_qual = (75 - tx_retries) * (FAIR - POOR) / 5 + POOR;
8252 else if (tx_retries > 65)
8253 tx_qual = (70 - tx_retries) * (GOOD - FAIR) / 5 + FAIR;
8254 else if (tx_retries > 50)
8255 tx_qual = (65 - tx_retries) * (VERY_GOOD - GOOD) /
8256 15 + GOOD;
8257 else
8258 tx_qual = (50 - tx_retries) *
8259 (PERFECT - VERY_GOOD) / 50 + VERY_GOOD;
8260
8261 if (missed_beacons > 50)
8262 beacon_qual = (60 - missed_beacons) * POOR / 10;
8263 else if (missed_beacons > 40)
8264 beacon_qual = (50 - missed_beacons) * (FAIR - POOR) /
8265 10 + POOR;
8266 else if (missed_beacons > 32)
8267 beacon_qual = (40 - missed_beacons) * (GOOD - FAIR) /
8268 18 + FAIR;
8269 else if (missed_beacons > 20)
8270 beacon_qual = (32 - missed_beacons) *
8271 (VERY_GOOD - GOOD) / 20 + GOOD;
8272 else
8273 beacon_qual = (20 - missed_beacons) *
8274 (PERFECT - VERY_GOOD) / 20 + VERY_GOOD;
8275
8276 quality = min(beacon_qual, min(tx_qual, rssi_qual));
8277
8278#ifdef CONFIG_IPW_DEBUG
8279 if (beacon_qual == quality)
8280 IPW_DEBUG_WX("Quality clamped by Missed Beacons\n");
8281 else if (tx_qual == quality)
8282 IPW_DEBUG_WX("Quality clamped by Tx Retries\n");
8283 else if (quality != 100)
8284 IPW_DEBUG_WX("Quality clamped by Signal Strength\n");
8285 else
8286 IPW_DEBUG_WX("Quality not clamped.\n");
8287#endif
8288
8289 wstats->qual.qual = quality;
8290 wstats->qual.level = rssi + IPW2100_RSSI_TO_DBM;
8291 }
8292
8293 wstats->qual.noise = 0;
8294 wstats->qual.updated = 7;
8295 wstats->qual.updated |= IW_QUAL_NOISE_INVALID;
8296
8297 /* FIXME: this is percent and not a # */
8298 wstats->miss.beacon = missed_beacons;
8299
8300 if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURES,
8301 &tx_failures, &ord_len))
8302 goto fail_get_ordinal;
8303 wstats->discard.retries = tx_failures;
8304
8305 return wstats;
8306
8307 fail_get_ordinal:
8308 IPW_DEBUG_WX("failed querying ordinals.\n");
8309
8310 return (struct iw_statistics *) NULL;
8311}
8312
8313static void ipw2100_wx_event_work(struct ipw2100_priv *priv)
8314{
8315 union iwreq_data wrqu;
8316 int len = ETH_ALEN;
8317
8318 if (priv->status & STATUS_STOPPING)
8319 return;
8320
8321 down(&priv->action_sem);
8322
8323 IPW_DEBUG_WX("enter\n");
8324
8325 up(&priv->action_sem);
8326
8327 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
8328
8329 /* Fetch BSSID from the hardware */
8330 if (!(priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED)) ||
8331 priv->status & STATUS_RF_KILL_MASK ||
8332 ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID,
8333 &priv->bssid, &len)) {
8334 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
8335 } else {
8336 /* We now have the BSSID, so can finish setting to the full
8337 * associated state */
8338 memcpy(wrqu.ap_addr.sa_data, priv->bssid, ETH_ALEN);
8339 memcpy(&priv->ieee->bssid, priv->bssid, ETH_ALEN);
8340 priv->status &= ~STATUS_ASSOCIATING;
8341 priv->status |= STATUS_ASSOCIATED;
8342 netif_carrier_on(priv->net_dev);
8343 if (netif_queue_stopped(priv->net_dev)) {
8344 IPW_DEBUG_INFO("Waking net queue.\n");
8345 netif_wake_queue(priv->net_dev);
8346 } else {
8347 IPW_DEBUG_INFO("Starting net queue.\n");
8348 netif_start_queue(priv->net_dev);
8349 }
8350 }
8351
8352 if (!(priv->status & STATUS_ASSOCIATED)) {
8353 IPW_DEBUG_WX("Configuring ESSID\n");
8354 down(&priv->action_sem);
8355 /* This is a disassociation event, so kick the firmware to
8356 * look for another AP */
8357 if (priv->config & CFG_STATIC_ESSID)
8358 ipw2100_set_essid(priv, priv->essid, priv->essid_len, 0);
8359 else
8360 ipw2100_set_essid(priv, NULL, 0, 0);
8361 up(&priv->action_sem);
8362 }
8363
8364 wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL);
8365}
8366
8367#define IPW2100_FW_MAJOR_VERSION 1
8368#define IPW2100_FW_MINOR_VERSION 3
8369
8370#define IPW2100_FW_MINOR(x) ((x & 0xff) >> 8)
8371#define IPW2100_FW_MAJOR(x) (x & 0xff)
8372
8373#define IPW2100_FW_VERSION ((IPW2100_FW_MINOR_VERSION << 8) | \
8374 IPW2100_FW_MAJOR_VERSION)
8375
8376#define IPW2100_FW_PREFIX "ipw2100-" __stringify(IPW2100_FW_MAJOR_VERSION) \
8377"." __stringify(IPW2100_FW_MINOR_VERSION)
8378
8379#define IPW2100_FW_NAME(x) IPW2100_FW_PREFIX "" x ".fw"
8380
8381
8382/*
8383
8384BINARY FIRMWARE HEADER FORMAT
8385
8386offset length desc
83870 2 version
83882 2 mode == 0:BSS,1:IBSS,2:MONITOR
83894 4 fw_len
83908 4 uc_len
8391C fw_len firmware data
839212 + fw_len uc_len microcode data
8393
8394*/
8395
8396struct ipw2100_fw_header {
8397 short version;
8398 short mode;
8399 unsigned int fw_size;
8400 unsigned int uc_size;
8401} __attribute__ ((packed));
8402
8403
8404
8405static int ipw2100_mod_firmware_load(struct ipw2100_fw *fw)
8406{
8407 struct ipw2100_fw_header *h =
8408 (struct ipw2100_fw_header *)fw->fw_entry->data;
8409
8410 if (IPW2100_FW_MAJOR(h->version) != IPW2100_FW_MAJOR_VERSION) {
8411 printk(KERN_WARNING DRV_NAME ": Firmware image not compatible "
8412 "(detected version id of %u). "
8413 "See Documentation/networking/README.ipw2100\n",
8414 h->version);
8415 return 1;
8416 }
8417
8418 fw->version = h->version;
8419 fw->fw.data = fw->fw_entry->data + sizeof(struct ipw2100_fw_header);
8420 fw->fw.size = h->fw_size;
8421 fw->uc.data = fw->fw.data + h->fw_size;
8422 fw->uc.size = h->uc_size;
8423
8424 return 0;
8425}
8426
8427
8428static int ipw2100_get_firmware(struct ipw2100_priv *priv,
8429 struct ipw2100_fw *fw)
8430{
8431 char *fw_name;
8432 int rc;
8433
8434 IPW_DEBUG_INFO("%s: Using hotplug firmware load.\n",
8435 priv->net_dev->name);
8436
8437 switch (priv->ieee->iw_mode) {
8438 case IW_MODE_ADHOC:
8439 fw_name = IPW2100_FW_NAME("-i");
8440 break;
8441#ifdef CONFIG_IPW2100_MONITOR
8442 case IW_MODE_MONITOR:
8443 fw_name = IPW2100_FW_NAME("-p");
8444 break;
8445#endif
8446 case IW_MODE_INFRA:
8447 default:
8448 fw_name = IPW2100_FW_NAME("");
8449 break;
8450 }
8451
8452 rc = request_firmware(&fw->fw_entry, fw_name, &priv->pci_dev->dev);
8453
8454 if (rc < 0) {
8455 printk(KERN_ERR DRV_NAME ": "
8456 "%s: Firmware '%s' not available or load failed.\n",
8457 priv->net_dev->name, fw_name);
8458 return rc;
8459 }
8460 IPW_DEBUG_INFO("firmware data %p size %zd\n", fw->fw_entry->data,
8461 fw->fw_entry->size);
8462
8463 ipw2100_mod_firmware_load(fw);
8464
8465 return 0;
8466}
8467
8468static void ipw2100_release_firmware(struct ipw2100_priv *priv,
8469 struct ipw2100_fw *fw)
8470{
8471 fw->version = 0;
8472 if (fw->fw_entry)
8473 release_firmware(fw->fw_entry);
8474 fw->fw_entry = NULL;
8475}
8476
8477
8478static int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf,
8479 size_t max)
8480{
8481 char ver[MAX_FW_VERSION_LEN];
8482 u32 len = MAX_FW_VERSION_LEN;
8483 u32 tmp;
8484 int i;
8485 /* firmware version is an ascii string (max len of 14) */
8486 if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_FW_VER_NUM,
8487 ver, &len))
8488 return -EIO;
8489 tmp = max;
8490 if (len >= max)
8491 len = max - 1;
8492 for (i = 0; i < len; i++)
8493 buf[i] = ver[i];
8494 buf[i] = '\0';
8495 return tmp;
8496}
8497
8498static int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf,
8499 size_t max)
8500{
8501 u32 ver;
8502 u32 len = sizeof(ver);
8503 /* microcode version is a 32 bit integer */
8504 if (ipw2100_get_ordinal(priv, IPW_ORD_UCODE_VERSION,
8505 &ver, &len))
8506 return -EIO;
8507 return snprintf(buf, max, "%08X", ver);
8508}
8509
8510/*
8511 * On exit, the firmware will have been freed from the fw list
8512 */
8513static int ipw2100_fw_download(struct ipw2100_priv *priv,
8514 struct ipw2100_fw *fw)
8515{
8516 /* firmware is constructed of N contiguous entries, each entry is
8517 * structured as:
8518 *
8519 * offset sie desc
8520 * 0 4 address to write to
8521 * 4 2 length of data run
8522 * 6 length data
8523 */
8524 unsigned int addr;
8525 unsigned short len;
8526
8527 const unsigned char *firmware_data = fw->fw.data;
8528 unsigned int firmware_data_left = fw->fw.size;
8529
8530 while (firmware_data_left > 0) {
8531 addr = *(u32 *)(firmware_data);
8532 firmware_data += 4;
8533 firmware_data_left -= 4;
8534
8535 len = *(u16 *)(firmware_data);
8536 firmware_data += 2;
8537 firmware_data_left -= 2;
8538
8539 if (len > 32) {
8540 printk(KERN_ERR DRV_NAME ": "
8541 "Invalid firmware run-length of %d bytes\n",
8542 len);
8543 return -EINVAL;
8544 }
8545
8546 write_nic_memory(priv->net_dev, addr, len, firmware_data);
8547 firmware_data += len;
8548 firmware_data_left -= len;
8549 }
8550
8551 return 0;
8552}
8553
8554struct symbol_alive_response {
8555 u8 cmd_id;
8556 u8 seq_num;
8557 u8 ucode_rev;
8558 u8 eeprom_valid;
8559 u16 valid_flags;
8560 u8 IEEE_addr[6];
8561 u16 flags;
8562 u16 pcb_rev;
8563 u16 clock_settle_time; // 1us LSB
8564 u16 powerup_settle_time; // 1us LSB
8565 u16 hop_settle_time; // 1us LSB
8566 u8 date[3]; // month, day, year
8567 u8 time[2]; // hours, minutes
8568 u8 ucode_valid;
8569};
8570
8571static int ipw2100_ucode_download(struct ipw2100_priv *priv,
8572 struct ipw2100_fw *fw)
8573{
8574 struct net_device *dev = priv->net_dev;
8575 const unsigned char *microcode_data = fw->uc.data;
8576 unsigned int microcode_data_left = fw->uc.size;
8577
8578 struct symbol_alive_response response;
8579 int i, j;
8580 u8 data;
8581
8582 /* Symbol control */
8583 write_nic_word(dev, IPW2100_CONTROL_REG, 0x703);
8584 readl((void *)(dev->base_addr));
8585 write_nic_word(dev, IPW2100_CONTROL_REG, 0x707);
8586 readl((void *)(dev->base_addr));
8587
8588 /* HW config */
8589 write_nic_byte(dev, 0x210014, 0x72); /* fifo width =16 */
8590 readl((void *)(dev->base_addr));
8591 write_nic_byte(dev, 0x210014, 0x72); /* fifo width =16 */
8592 readl((void *)(dev->base_addr));
8593
8594 /* EN_CS_ACCESS bit to reset control store pointer */
8595 write_nic_byte(dev, 0x210000, 0x40);
8596 readl((void *)(dev->base_addr));
8597 write_nic_byte(dev, 0x210000, 0x0);
8598 readl((void *)(dev->base_addr));
8599 write_nic_byte(dev, 0x210000, 0x40);
8600 readl((void *)(dev->base_addr));
8601
8602 /* copy microcode from buffer into Symbol */
8603
8604 while (microcode_data_left > 0) {
8605 write_nic_byte(dev, 0x210010, *microcode_data++);
8606 write_nic_byte(dev, 0x210010, *microcode_data++);
8607 microcode_data_left -= 2;
8608 }
8609
8610 /* EN_CS_ACCESS bit to reset the control store pointer */
8611 write_nic_byte(dev, 0x210000, 0x0);
8612 readl((void *)(dev->base_addr));
8613
8614 /* Enable System (Reg 0)
8615 * first enable causes garbage in RX FIFO */
8616 write_nic_byte(dev, 0x210000, 0x0);
8617 readl((void *)(dev->base_addr));
8618 write_nic_byte(dev, 0x210000, 0x80);
8619 readl((void *)(dev->base_addr));
8620
8621 /* Reset External Baseband Reg */
8622 write_nic_word(dev, IPW2100_CONTROL_REG, 0x703);
8623 readl((void *)(dev->base_addr));
8624 write_nic_word(dev, IPW2100_CONTROL_REG, 0x707);
8625 readl((void *)(dev->base_addr));
8626
8627 /* HW Config (Reg 5) */
8628 write_nic_byte(dev, 0x210014, 0x72); // fifo width =16
8629 readl((void *)(dev->base_addr));
8630 write_nic_byte(dev, 0x210014, 0x72); // fifo width =16
8631 readl((void *)(dev->base_addr));
8632
8633 /* Enable System (Reg 0)
8634 * second enable should be OK */
8635 write_nic_byte(dev, 0x210000, 0x00); // clear enable system
8636 readl((void *)(dev->base_addr));
8637 write_nic_byte(dev, 0x210000, 0x80); // set enable system
8638
8639 /* check Symbol is enabled - upped this from 5 as it wasn't always
8640 * catching the update */
8641 for (i = 0; i < 10; i++) {
8642 udelay(10);
8643
8644 /* check Dino is enabled bit */
8645 read_nic_byte(dev, 0x210000, &data);
8646 if (data & 0x1)
8647 break;
8648 }
8649
8650 if (i == 10) {
8651 printk(KERN_ERR DRV_NAME ": %s: Error initializing Symbol\n",
8652 dev->name);
8653 return -EIO;
8654 }
8655
8656 /* Get Symbol alive response */
8657 for (i = 0; i < 30; i++) {
8658 /* Read alive response structure */
8659 for (j = 0;
8660 j < (sizeof(struct symbol_alive_response) >> 1);
8661 j++)
8662 read_nic_word(dev, 0x210004,
8663 ((u16 *)&response) + j);
8664
8665 if ((response.cmd_id == 1) &&
8666 (response.ucode_valid == 0x1))
8667 break;
8668 udelay(10);
8669 }
8670
8671 if (i == 30) {
8672 printk(KERN_ERR DRV_NAME ": %s: No response from Symbol - hw not alive\n",
8673 dev->name);
8674 printk_buf(IPW_DL_ERROR, (u8*)&response, sizeof(response));
8675 return -EIO;
8676 }
8677
8678 return 0;
8679}
diff --git a/drivers/net/wireless/ipw2100.h b/drivers/net/wireless/ipw2100.h
new file mode 100644
index 000000000000..2a3cdbd50168
--- /dev/null
+++ b/drivers/net/wireless/ipw2100.h
@@ -0,0 +1,1167 @@
1/******************************************************************************
2
3 Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************/
26#ifndef _IPW2100_H
27#define _IPW2100_H
28
29#include <linux/sched.h>
30#include <linux/interrupt.h>
31#include <linux/netdevice.h>
32#include <linux/etherdevice.h>
33#include <linux/list.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <asm/io.h>
37#include <linux/socket.h>
38#include <linux/if_arp.h>
39#include <linux/wireless.h>
40#include <linux/version.h>
41#include <net/iw_handler.h> // new driver API
42
43#include <net/ieee80211.h>
44
45#include <linux/workqueue.h>
46
47struct ipw2100_priv;
48struct ipw2100_tx_packet;
49struct ipw2100_rx_packet;
50
51#define IPW_DL_UNINIT 0x80000000
52#define IPW_DL_NONE 0x00000000
53#define IPW_DL_ALL 0x7FFFFFFF
54
55/*
56 * To use the debug system;
57 *
58 * If you are defining a new debug classification, simply add it to the #define
59 * list here in the form of:
60 *
61 * #define IPW_DL_xxxx VALUE
62 *
63 * shifting value to the left one bit from the previous entry. xxxx should be
64 * the name of the classification (for example, WEP)
65 *
66 * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
67 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
68 * to send output to that classification.
69 *
70 * To add your debug level to the list of levels seen when you perform
71 *
72 * % cat /proc/net/ipw2100/debug_level
73 *
74 * you simply need to add your entry to the ipw2100_debug_levels array.
75 *
76 * If you do not see debug_level in /proc/net/ipw2100 then you do not have
77 * CONFIG_IPW_DEBUG defined in your kernel configuration
78 *
79 */
80
81#define IPW_DL_ERROR (1<<0)
82#define IPW_DL_WARNING (1<<1)
83#define IPW_DL_INFO (1<<2)
84#define IPW_DL_WX (1<<3)
85#define IPW_DL_HC (1<<5)
86#define IPW_DL_STATE (1<<6)
87
88#define IPW_DL_NOTIF (1<<10)
89#define IPW_DL_SCAN (1<<11)
90#define IPW_DL_ASSOC (1<<12)
91#define IPW_DL_DROP (1<<13)
92
93#define IPW_DL_IOCTL (1<<14)
94#define IPW_DL_RF_KILL (1<<17)
95
96
97#define IPW_DL_MANAGE (1<<15)
98#define IPW_DL_FW (1<<16)
99
100#define IPW_DL_FRAG (1<<21)
101#define IPW_DL_WEP (1<<22)
102#define IPW_DL_TX (1<<23)
103#define IPW_DL_RX (1<<24)
104#define IPW_DL_ISR (1<<25)
105#define IPW_DL_IO (1<<26)
106#define IPW_DL_TRACE (1<<28)
107
108#define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
109#define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
110#define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
111#define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
112#define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
113#define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
114#define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
115#define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
116#define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
117#define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
118#define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
119#define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
120#define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
121#define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
122#define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
123#define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
124#define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
125#define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
126#define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
127#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
128#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
129
130enum {
131 IPW_HW_STATE_DISABLED = 1,
132 IPW_HW_STATE_ENABLED = 0
133};
134
135struct ssid_context {
136 char ssid[IW_ESSID_MAX_SIZE + 1];
137 int ssid_len;
138 unsigned char bssid[ETH_ALEN];
139 int port_type;
140 int channel;
141
142};
143
144extern const char *port_type_str[];
145extern const char *band_str[];
146
147#define NUMBER_OF_BD_PER_COMMAND_PACKET 1
148#define NUMBER_OF_BD_PER_DATA_PACKET 2
149
150#define IPW_MAX_BDS 6
151#define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
152#define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
153
154#define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
155 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
156
157struct bd_status {
158 union {
159 struct { u8 nlf:1, txType:2, intEnabled:1, reserved:4;} fields;
160 u8 field;
161 } info;
162} __attribute__ ((packed));
163
164struct ipw2100_bd {
165 u32 host_addr;
166 u32 buf_length;
167 struct bd_status status;
168 /* number of fragments for frame (should be set only for
169 * 1st TBD) */
170 u8 num_fragments;
171 u8 reserved[6];
172} __attribute__ ((packed));
173
174#define IPW_BD_QUEUE_LENGTH(n) (1<<n)
175#define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
176
177#define IPW_BD_STATUS_TX_FRAME_802_3 0x00
178#define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
179#define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
180#define IPW_BD_STATUS_TX_FRAME_802_11 0x04
181#define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
182
183struct ipw2100_bd_queue {
184 /* driver (virtual) pointer to queue */
185 struct ipw2100_bd *drv;
186
187 /* firmware (physical) pointer to queue */
188 dma_addr_t nic;
189
190 /* Length of phy memory allocated for BDs */
191 u32 size;
192
193 /* Number of BDs in queue (and in array) */
194 u32 entries;
195
196 /* Number of available BDs (invalid for NIC BDs) */
197 u32 available;
198
199 /* Offset of oldest used BD in array (next one to
200 * check for completion) */
201 u32 oldest;
202
203 /* Offset of next available (unused) BD */
204 u32 next;
205};
206
207#define RX_QUEUE_LENGTH 256
208#define TX_QUEUE_LENGTH 256
209#define HW_QUEUE_LENGTH 256
210
211#define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
212
213#define STATUS_TYPE_MASK 0x0000000f
214#define COMMAND_STATUS_VAL 0
215#define STATUS_CHANGE_VAL 1
216#define P80211_DATA_VAL 2
217#define P8023_DATA_VAL 3
218#define HOST_NOTIFICATION_VAL 4
219
220#define IPW2100_RSSI_TO_DBM (-98)
221
222struct ipw2100_status {
223 u32 frame_size;
224 u16 status_fields;
225 u8 flags;
226#define IPW_STATUS_FLAG_DECRYPTED (1<<0)
227#define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
228#define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
229 u8 rssi;
230} __attribute__ ((packed));
231
232struct ipw2100_status_queue {
233 /* driver (virtual) pointer to queue */
234 struct ipw2100_status *drv;
235
236 /* firmware (physical) pointer to queue */
237 dma_addr_t nic;
238
239 /* Length of phy memory allocated for BDs */
240 u32 size;
241};
242
243#define HOST_COMMAND_PARAMS_REG_LEN 100
244#define CMD_STATUS_PARAMS_REG_LEN 3
245
246#define IPW_WPA_CAPABILITIES 0x1
247#define IPW_WPA_LISTENINTERVAL 0x2
248#define IPW_WPA_AP_ADDRESS 0x4
249
250#define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
251
252struct ipw2100_wpa_assoc_frame {
253 u16 fixed_ie_mask;
254 struct {
255 u16 capab_info;
256 u16 listen_interval;
257 u8 current_ap[ETH_ALEN];
258 } fixed_ies;
259 u32 var_ie_len;
260 u8 var_ie[IPW_MAX_VAR_IE_LEN];
261};
262
263#define IPW_BSS 1
264#define IPW_MONITOR 2
265#define IPW_IBSS 3
266
267/**
268 * @struct _tx_cmd - HWCommand
269 * @brief H/W command structure.
270 */
271struct ipw2100_cmd_header {
272 u32 host_command_reg;
273 u32 host_command_reg1;
274 u32 sequence;
275 u32 host_command_len_reg;
276 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
277 u32 cmd_status_reg;
278 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
279 u32 rxq_base_ptr;
280 u32 rxq_next_ptr;
281 u32 rxq_host_ptr;
282 u32 txq_base_ptr;
283 u32 txq_next_ptr;
284 u32 txq_host_ptr;
285 u32 tx_status_reg;
286 u32 reserved;
287 u32 status_change_reg;
288 u32 reserved1[3];
289 u32 *ordinal1_ptr;
290 u32 *ordinal2_ptr;
291} __attribute__ ((packed));
292
293struct ipw2100_data_header {
294 u32 host_command_reg;
295 u32 host_command_reg1;
296 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
297 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
298 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
299 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
300 u8 key[16];
301 u8 reserved[10]; // f/w reserved
302 u8 src_addr[ETH_ALEN];
303 u8 dst_addr[ETH_ALEN];
304 u16 fragment_size;
305} __attribute__ ((packed));
306
307/* Host command data structure */
308struct host_command {
309 u32 host_command; // COMMAND ID
310 u32 host_command1; // COMMAND ID
311 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
312 u32 host_command_length; // LENGTH
313 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
314} __attribute__ ((packed));
315
316
317typedef enum {
318 POWER_ON_RESET,
319 EXIT_POWER_DOWN_RESET,
320 SW_RESET,
321 EEPROM_RW,
322 SW_RE_INIT
323} ipw2100_reset_event;
324
325enum {
326 COMMAND = 0xCAFE,
327 DATA,
328 RX
329};
330
331
332struct ipw2100_tx_packet {
333 int type;
334 int index;
335 union {
336 struct { /* COMMAND */
337 struct ipw2100_cmd_header* cmd;
338 dma_addr_t cmd_phys;
339 } c_struct;
340 struct { /* DATA */
341 struct ipw2100_data_header* data;
342 dma_addr_t data_phys;
343 struct ieee80211_txb *txb;
344 } d_struct;
345 } info;
346 int jiffy_start;
347
348 struct list_head list;
349};
350
351
352struct ipw2100_rx_packet {
353 struct ipw2100_rx *rxp;
354 dma_addr_t dma_addr;
355 int jiffy_start;
356 struct sk_buff *skb;
357 struct list_head list;
358};
359
360#define FRAG_DISABLED (1<<31)
361#define RTS_DISABLED (1<<31)
362#define MAX_RTS_THRESHOLD 2304U
363#define MIN_RTS_THRESHOLD 1U
364#define DEFAULT_RTS_THRESHOLD 1000U
365
366#define DEFAULT_BEACON_INTERVAL 100U
367#define DEFAULT_SHORT_RETRY_LIMIT 7U
368#define DEFAULT_LONG_RETRY_LIMIT 4U
369
370struct ipw2100_ordinals {
371 u32 table1_addr;
372 u32 table2_addr;
373 u32 table1_size;
374 u32 table2_size;
375};
376
377/* Host Notification header */
378struct ipw2100_notification {
379 u32 hnhdr_subtype; /* type of host notification */
380 u32 hnhdr_size; /* size in bytes of data
381 or number of entries, if table.
382 Does NOT include header */
383} __attribute__ ((packed));
384
385#define MAX_KEY_SIZE 16
386#define MAX_KEYS 8
387
388#define IPW2100_WEP_ENABLE (1<<1)
389#define IPW2100_WEP_DROP_CLEAR (1<<2)
390
391#define IPW_NONE_CIPHER (1<<0)
392#define IPW_WEP40_CIPHER (1<<1)
393#define IPW_TKIP_CIPHER (1<<2)
394#define IPW_CCMP_CIPHER (1<<4)
395#define IPW_WEP104_CIPHER (1<<5)
396#define IPW_CKIP_CIPHER (1<<6)
397
398#define IPW_AUTH_OPEN 0
399#define IPW_AUTH_SHARED 1
400
401struct statistic {
402 int value;
403 int hi;
404 int lo;
405};
406
407#define INIT_STAT(x) do { \
408 (x)->value = (x)->hi = 0; \
409 (x)->lo = 0x7fffffff; \
410} while (0)
411#define SET_STAT(x,y) do { \
412 (x)->value = y; \
413 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
414 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
415} while (0)
416#define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
417while (0)
418#define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
419while (0)
420
421#define IPW2100_ERROR_QUEUE 5
422
423/* Power management code: enable or disable? */
424enum {
425#ifdef CONFIG_PM
426 IPW2100_PM_DISABLED = 0,
427 PM_STATE_SIZE = 16,
428#else
429 IPW2100_PM_DISABLED = 1,
430 PM_STATE_SIZE = 0,
431#endif
432};
433
434#define STATUS_POWERED (1<<0)
435#define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
436#define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
437#define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
438#define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
439#define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
440#define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
441#define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
442#define STATUS_INT_ENABLED (1<<11)
443#define STATUS_RF_KILL_HW (1<<12)
444#define STATUS_RF_KILL_SW (1<<13)
445#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
446#define STATUS_EXIT_PENDING (1<<14)
447
448#define STATUS_SCAN_PENDING (1<<23)
449#define STATUS_SCANNING (1<<24)
450#define STATUS_SCAN_ABORTING (1<<25)
451#define STATUS_SCAN_COMPLETE (1<<26)
452#define STATUS_WX_EVENT_PENDING (1<<27)
453#define STATUS_RESET_PENDING (1<<29)
454#define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
455
456
457
458/* Internal NIC states */
459#define IPW_STATE_INITIALIZED (1<<0)
460#define IPW_STATE_COUNTRY_FOUND (1<<1)
461#define IPW_STATE_ASSOCIATED (1<<2)
462#define IPW_STATE_ASSN_LOST (1<<3)
463#define IPW_STATE_ASSN_CHANGED (1<<4)
464#define IPW_STATE_SCAN_COMPLETE (1<<5)
465#define IPW_STATE_ENTERED_PSP (1<<6)
466#define IPW_STATE_LEFT_PSP (1<<7)
467#define IPW_STATE_RF_KILL (1<<8)
468#define IPW_STATE_DISABLED (1<<9)
469#define IPW_STATE_POWER_DOWN (1<<10)
470#define IPW_STATE_SCANNING (1<<11)
471
472
473
474#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
475#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
476#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
477#define CFG_CUSTOM_MAC (1<<3)
478#define CFG_LONG_PREAMBLE (1<<4)
479#define CFG_ASSOCIATE (1<<6)
480#define CFG_FIXED_RATE (1<<7)
481#define CFG_ADHOC_CREATE (1<<8)
482#define CFG_C3_DISABLED (1<<9)
483#define CFG_PASSIVE_SCAN (1<<10)
484
485#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
486#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
487
488struct ipw2100_priv {
489
490 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
491 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
492
493 struct ieee80211_device *ieee;
494 unsigned long status;
495 unsigned long config;
496 unsigned long capability;
497
498 /* Statistics */
499 int resets;
500 int reset_backoff;
501
502 /* Context */
503 u8 essid[IW_ESSID_MAX_SIZE];
504 u8 essid_len;
505 u8 bssid[ETH_ALEN];
506 u8 channel;
507 int last_mode;
508 int cstate_limit;
509
510 unsigned long connect_start;
511 unsigned long last_reset;
512
513 u32 channel_mask;
514 u32 fatal_error;
515 u32 fatal_errors[IPW2100_ERROR_QUEUE];
516 u32 fatal_index;
517 int eeprom_version;
518 int firmware_version;
519 unsigned long hw_features;
520 int hangs;
521 u32 last_rtc;
522 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
523 u8* snapshot[0x30];
524
525 u8 mandatory_bssid_mac[ETH_ALEN];
526 u8 mac_addr[ETH_ALEN];
527
528 int power_mode;
529
530 /* WEP data */
531 struct ieee80211_security sec;
532 int messages_sent;
533
534
535 int short_retry_limit;
536 int long_retry_limit;
537
538 u32 rts_threshold;
539 u32 frag_threshold;
540
541 int in_isr;
542
543 u32 tx_rates;
544 int tx_power;
545 u32 beacon_interval;
546
547 char nick[IW_ESSID_MAX_SIZE + 1];
548
549 struct ipw2100_status_queue status_queue;
550
551 struct statistic txq_stat;
552 struct statistic rxq_stat;
553 struct ipw2100_bd_queue rx_queue;
554 struct ipw2100_bd_queue tx_queue;
555 struct ipw2100_rx_packet *rx_buffers;
556
557 struct statistic fw_pend_stat;
558 struct list_head fw_pend_list;
559
560 struct statistic msg_free_stat;
561 struct statistic msg_pend_stat;
562 struct list_head msg_free_list;
563 struct list_head msg_pend_list;
564 struct ipw2100_tx_packet *msg_buffers;
565
566 struct statistic tx_free_stat;
567 struct statistic tx_pend_stat;
568 struct list_head tx_free_list;
569 struct list_head tx_pend_list;
570 struct ipw2100_tx_packet *tx_buffers;
571
572 struct ipw2100_ordinals ordinals;
573
574 struct pci_dev *pci_dev;
575
576 struct proc_dir_entry *dir_dev;
577
578 struct net_device *net_dev;
579 struct iw_statistics wstats;
580
581 struct tasklet_struct irq_tasklet;
582
583 struct workqueue_struct *workqueue;
584 struct work_struct reset_work;
585 struct work_struct security_work;
586 struct work_struct wx_event_work;
587 struct work_struct hang_check;
588 struct work_struct rf_kill;
589
590 u32 interrupts;
591 int tx_interrupts;
592 int rx_interrupts;
593 int inta_other;
594
595 spinlock_t low_lock;
596 struct semaphore action_sem;
597 struct semaphore adapter_sem;
598
599 wait_queue_head_t wait_command_queue;
600};
601
602
603/*********************************************************
604 * Host Command -> From Driver to FW
605 *********************************************************/
606
607/**
608 * Host command identifiers
609 */
610#define HOST_COMPLETE 2
611#define SYSTEM_CONFIG 6
612#define SSID 8
613#define MANDATORY_BSSID 9
614#define AUTHENTICATION_TYPE 10
615#define ADAPTER_ADDRESS 11
616#define PORT_TYPE 12
617#define INTERNATIONAL_MODE 13
618#define CHANNEL 14
619#define RTS_THRESHOLD 15
620#define FRAG_THRESHOLD 16
621#define POWER_MODE 17
622#define TX_RATES 18
623#define BASIC_TX_RATES 19
624#define WEP_KEY_INFO 20
625#define WEP_KEY_INDEX 25
626#define WEP_FLAGS 26
627#define ADD_MULTICAST 27
628#define CLEAR_ALL_MULTICAST 28
629#define BEACON_INTERVAL 29
630#define ATIM_WINDOW 30
631#define CLEAR_STATISTICS 31
632#define SEND 33
633#define TX_POWER_INDEX 36
634#define BROADCAST_SCAN 43
635#define CARD_DISABLE 44
636#define PREFERRED_BSSID 45
637#define SET_SCAN_OPTIONS 46
638#define SCAN_DWELL_TIME 47
639#define SWEEP_TABLE 48
640#define AP_OR_STATION_TABLE 49
641#define GROUP_ORDINALS 50
642#define SHORT_RETRY_LIMIT 51
643#define LONG_RETRY_LIMIT 52
644
645#define HOST_PRE_POWER_DOWN 58
646#define CARD_DISABLE_PHY_OFF 61
647#define MSDU_TX_RATES 62
648
649
650/* Rogue AP Detection */
651#define SET_STATION_STAT_BITS 64
652#define CLEAR_STATIONS_STAT_BITS 65
653#define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
654#define SET_SECURITY_INFORMATION 67
655#define DISASSOCIATION_BSSID 68
656#define SET_WPA_IE 69
657
658
659
660/* system configuration bit mask: */
661#define IPW_CFG_MONITOR 0x00004
662#define IPW_CFG_PREAMBLE_AUTO 0x00010
663#define IPW_CFG_IBSS_AUTO_START 0x00020
664#define IPW_CFG_LOOPBACK 0x00100
665#define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
666#define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
667#define IPW_CFG_802_1x_ENABLE 0x04000
668#define IPW_CFG_BSS_MASK 0x08000
669#define IPW_CFG_IBSS_MASK 0x10000
670
671#define IPW_SCAN_NOASSOCIATE (1<<0)
672#define IPW_SCAN_MIXED_CELL (1<<1)
673/* RESERVED (1<<2) */
674#define IPW_SCAN_PASSIVE (1<<3)
675
676#define IPW_NIC_FATAL_ERROR 0x2A7F0
677#define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
678#define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
679#define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
680#define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
681#define IPW2100_ERR_FW_LOAD (0x12 << 24)
682
683#define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
684#define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
685
686#define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
687#define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
688#define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
689#define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
690
691#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
692#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
693#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
694
695#define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
696 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
697
698#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
699 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
700
701#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
702#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
703
704#define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
705#define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
706#define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
707#define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
708#define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
709#define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
710#define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
711#define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
712#define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
713#define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
714#define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
715
716#define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
717#define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
718#define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
719#define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
720#define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
721#define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
722#define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
723
724#define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
725#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
726#define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
727#define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
728#define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
729#define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
730#define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
731#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
732#define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
733
734#define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
735#define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
736#define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
737#define IPW_BIT_GPIO_RF_KILL 0x00010000
738
739#define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
740
741#define IPW_REG_DOMAIN_0_OFFSET 0x0000
742#define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
743
744#define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
745#define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
746#define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
747#define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
748#define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
749#define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
750#define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
751#define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
752#define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
753#define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
754#define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
755#define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
756
757#define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
758
759#define IPW_INTERRUPT_MASK 0xC1010013
760
761#define IPW2100_CONTROL_REG 0x220000
762#define IPW2100_CONTROL_PHY_OFF 0x8
763
764#define IPW2100_COMMAND 0x00300004
765#define IPW2100_COMMAND_PHY_ON 0x0
766#define IPW2100_COMMAND_PHY_OFF 0x1
767
768/* in DEBUG_AREA, values of memory always 0xd55555d5 */
769#define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
770#define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
771#define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
772
773#define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
774
775#define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
776#define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
777#define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
778
779// BD ring queue read/write difference
780#define IPW_BD_QUEUE_W_R_MIN_SPARE 2
781
782#define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
783
784#define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
785#define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
786
787
788
789
790#define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_hdr_3addr)
791#define IPW_MAX_80211_PAYLOAD_SIZE 2304U
792#define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
793#define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
794#define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
795#define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
796 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
797 sizeof(struct ethhdr))
798
799#define IPW_802_11_FCS_LENGTH 4
800#define IPW_RX_NIC_BUFFER_LENGTH \
801 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
802 IPW_802_11_FCS_LENGTH)
803
804#define IPW_802_11_PAYLOAD_OFFSET \
805 (sizeof(struct ieee80211_hdr_3addr) + \
806 sizeof(struct ieee80211_snap_hdr))
807
808struct ipw2100_rx {
809 union {
810 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
811 struct ieee80211_hdr header;
812 u32 status;
813 struct ipw2100_notification notification;
814 struct ipw2100_cmd_header command;
815 } rx_data;
816} __attribute__ ((packed));
817
818/* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */
819#define TX_RATE_1_MBIT 0x0001
820#define TX_RATE_2_MBIT 0x0002
821#define TX_RATE_5_5_MBIT 0x0004
822#define TX_RATE_11_MBIT 0x0008
823#define TX_RATE_MASK 0x000F
824#define DEFAULT_TX_RATES 0x000F
825
826#define IPW_POWER_MODE_CAM 0x00 //(always on)
827#define IPW_POWER_INDEX_1 0x01
828#define IPW_POWER_INDEX_2 0x02
829#define IPW_POWER_INDEX_3 0x03
830#define IPW_POWER_INDEX_4 0x04
831#define IPW_POWER_INDEX_5 0x05
832#define IPW_POWER_AUTO 0x06
833#define IPW_POWER_MASK 0x0F
834#define IPW_POWER_ENABLED 0x10
835#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
836
837#define IPW_TX_POWER_AUTO 0
838#define IPW_TX_POWER_ENHANCED 1
839
840#define IPW_TX_POWER_DEFAULT 32
841#define IPW_TX_POWER_MIN 0
842#define IPW_TX_POWER_MAX 16
843#define IPW_TX_POWER_MIN_DBM (-12)
844#define IPW_TX_POWER_MAX_DBM 16
845
846#define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
847#define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
848
849#define REG_MIN_CHANNEL 0
850#define REG_MAX_CHANNEL 14
851
852#define REG_CHANNEL_MASK 0x00003FFF
853#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
854
855#define DIVERSITY_EITHER 0 // Use both antennas
856#define DIVERSITY_ANTENNA_A 1 // Use antenna A
857#define DIVERSITY_ANTENNA_B 2 // Use antenna B
858
859
860#define HOST_COMMAND_WAIT 0
861#define HOST_COMMAND_NO_WAIT 1
862
863#define LOCK_NONE 0
864#define LOCK_DRIVER 1
865#define LOCK_FW 2
866
867#define TYPE_SWEEP_ORD 0x000D
868#define TYPE_IBSS_STTN_ORD 0x000E
869#define TYPE_BSS_AP_ORD 0x000F
870#define TYPE_RAW_BEACON_ENTRY 0x0010
871#define TYPE_CALIBRATION_DATA 0x0011
872#define TYPE_ROGUE_AP_DATA 0x0012
873#define TYPE_ASSOCIATION_REQUEST 0x0013
874#define TYPE_REASSOCIATION_REQUEST 0x0014
875
876
877#define HW_FEATURE_RFKILL (0x0001)
878#define RF_KILLSWITCH_OFF (1)
879#define RF_KILLSWITCH_ON (0)
880
881#define IPW_COMMAND_POOL_SIZE 40
882
883#define IPW_START_ORD_TAB_1 1
884#define IPW_START_ORD_TAB_2 1000
885
886#define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
887
888#define IS_ORDINAL_TABLE_ONE(mgr,id) \
889 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
890#define IS_ORDINAL_TABLE_TWO(mgr,id) \
891 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
892
893#define BSS_ID_LENGTH 6
894
895// Fixed size data: Ordinal Table 1
896typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
897// Transmit statistics
898 IPW_ORD_STAT_TX_HOST_REQUESTS = 1,// # of requested Host Tx's (MSDU)
899 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
900 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
901
902 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
903 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
904 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
905 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
906 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
907
908 IPW_ORD_STAT_TX_NODIR_DATA1 = 13,// # of successful Non_Directed Tx's (MSDU) @ 1MB
909 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
910 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
911 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
912
913 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
914 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
915 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
916 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
917 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
918 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
919 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
920 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
921 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
922 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
923 IPW_ORD_STAT_TX_BEACON, // # of tx beacon
924 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
925 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
926 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
927 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
928
929 IPW_ORD_STAT_TX_TOTAL_BYTES = 41,// Total successful Tx data bytes
930 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
931 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
932 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
933 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
934 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
935
936 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
937 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
938 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,// # of times max tries in a hop failed
939 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
940 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
941 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
942 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
943 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
944 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
945
946 // Receive statistics
947 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
948 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
949 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
950 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
951 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
952 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
953 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
954
955 IPW_ORD_STAT_RX_NODIR_DATA = 71,// # of nondirected packets
956 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
957 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
958 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
959 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
960
961 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
962 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
963 IPW_ORD_STAT_RX_RTS, // # of Rx RTS
964 IPW_ORD_STAT_RX_CTS, // # of Rx CTS
965 IPW_ORD_STAT_RX_ACK, // # of Rx ACK
966 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
967 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
968 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
969 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
970 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
971 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
972 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
973 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
974 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
975 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
976 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
977 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
978 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
979
980 IPW_ORD_STAT_RX_TOTAL_BYTES = 101,// Total rx data bytes received
981 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
982 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
983 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
984 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
985 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
986
987 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
988 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
989 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
990 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
991 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
992
993 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
994 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
995 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
996 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
997 IPW_ORD_SYS_BOOT_TIME, // # Boot time
998 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
999 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
1000 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
1001 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
1002 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
1003 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
1004 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
1005 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
1006 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
1007
1008// PSP Statistics
1009 IPW_ORD_STAT_PSP_SUSPENSION = 137,// # of times adapter suspended
1010 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
1011 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
1012 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,// # of timeouts waiting for last broadcast/muticast pkt
1013 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
1014 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
1015 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
1016
1017// Association and roaming
1018 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
1019 IPW_ORD_STAT_PERCENT_MISSED_BCNS,// current calculation of % missed beacons
1020 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
1021 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
1022 // AP table entry. set to 0 if not associated
1023 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
1024 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
1025 IPW_ORD_STAT_AP_ASSNS, // # of associations
1026 IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1027 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
1028 IPW_ORD_STAT_FULL_SCANS, // # of full scans
1029
1030 IPW_ORD_CARD_DISABLED, // # Card Disabled
1031 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
1032 IPW_FILLER_40,
1033 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1034 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
1035 // hops or no prob_ responses in last 3 minutes
1036 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
1037 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
1038 // load at the AP
1039 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
1040 // eligible group
1041 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
1042 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
1043 IPW_FILLER_41,
1044 IPW_FILLER_42,
1045 IPW_FILLER_43,
1046 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1047 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
1048 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
1049
1050// Other statistics
1051 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
1052 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1053 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
1054 IPW_ORD_SELF_TEST_STATUS, //NS //
1055 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
1056 IPW_ORD_POWER_MGMT_INDEX, //NS //
1057 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
1058 IPW_ORD_COUNTRY_CHANNELS, // channels suported by country
1059// IPW_ORD_COUNTRY_CHANNELS:
1060// For 11b the lower 2-byte are used for channels from 1-14
1061// and the higher 2-byte are not used.
1062 IPW_ORD_RESET_CNT, // # of adapter resets (warm)
1063 IPW_ORD_BEACON_INTERVAL, // Beacon interval
1064
1065 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
1066 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
1067 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
1068 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1069 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
1070 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
1071
1072 IPW_ORD_RTC_TIME = 190, // current RTC time
1073 IPW_ORD_PORT_TYPE, // operating mode
1074 IPW_ORD_CURRENT_TX_RATE, // current tx rate
1075 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
1076 IPW_ORD_ATIM_WINDOW, // current ATIM Window
1077 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
1078 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
1079 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
1080 IPW_ORD_CAPABILITIES, // Management frame capability field
1081 IPW_ORD_AUTH_TYPE, // Type of authentication
1082 IPW_ORD_RADIO_TYPE, // Adapter card platform type
1083 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
1084 IPW_ORD_INT_MODE, // International mode
1085 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
1086 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1087 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
1088 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
1089 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
1090
1091 IPW_ORD_MAC_VERSION = 209, // MAC Version
1092 IPW_ORD_MAC_REVISION, // MAC Revision
1093 IPW_ORD_RADIO_VERSION, // Radio Version
1094 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1095 IPW_ORD_UCODE_VERSION, // Ucode Version
1096 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
1097} ORDINALTABLE1;
1098
1099// ordinal table 2
1100// Variable length data:
1101#define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
1102
1103typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1104 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
1105 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
1106 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
1107 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
1108 IPW_FILL_1, //NS //
1109 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
1110 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
1111 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
1112 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1113 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
1114 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
1115 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
1116 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1117 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1118 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
1119 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
1120 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
1121 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1122 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1123} ORDINALTABLE2; // NS - means Not Supported by FW
1124
1125#define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
1126
1127#ifndef WIRELESS_SPY
1128#define WIRELESS_SPY // enable iwspy support
1129#endif
1130
1131#define IPW_HOST_FW_SHARED_AREA0 0x0002f200
1132#define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
1133
1134#define IPW_HOST_FW_SHARED_AREA1 0x0002f610
1135#define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
1136
1137#define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
1138#define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
1139
1140#define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
1141#define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
1142
1143#define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
1144#define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
1145
1146struct ipw2100_fw_chunk {
1147 unsigned char *buf;
1148 long len;
1149 long pos;
1150 struct list_head list;
1151};
1152
1153struct ipw2100_fw_chunk_set {
1154 const void *data;
1155 unsigned long size;
1156};
1157
1158struct ipw2100_fw {
1159 int version;
1160 struct ipw2100_fw_chunk_set fw;
1161 struct ipw2100_fw_chunk_set uc;
1162 const struct firmware *fw_entry;
1163};
1164
1165#define MAX_FW_VERSION_LEN 14
1166
1167#endif /* _IPW2100_H */
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c
new file mode 100644
index 000000000000..2a3bd607a5cd
--- /dev/null
+++ b/drivers/net/wireless/ipw2200.c
@@ -0,0 +1,7353 @@
1/******************************************************************************
2
3 Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
4
5 802.11 status code portion of this file from ethereal-0.10.6:
6 Copyright 2000, Axis Communications AB
7 Ethereal - Network traffic analyzer
8 By Gerald Combs <gerald@ethereal.com>
9 Copyright 1998 Gerald Combs
10
11 This program is free software; you can redistribute it and/or modify it
12 under the terms of version 2 of the GNU General Public License as
13 published by the Free Software Foundation.
14
15 This program is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 more details.
19
20 You should have received a copy of the GNU General Public License along with
21 this program; if not, write to the Free Software Foundation, Inc., 59
22 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
24 The full GNU General Public License is included in this distribution in the
25 file called LICENSE.
26
27 Contact Information:
28 James P. Ketrenos <ipw2100-admin@linux.intel.com>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30
31******************************************************************************/
32
33#include "ipw2200.h"
34
35#define IPW2200_VERSION "1.0.0"
36#define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2200/2915 Network Driver"
37#define DRV_COPYRIGHT "Copyright(c) 2003-2004 Intel Corporation"
38#define DRV_VERSION IPW2200_VERSION
39
40MODULE_DESCRIPTION(DRV_DESCRIPTION);
41MODULE_VERSION(DRV_VERSION);
42MODULE_AUTHOR(DRV_COPYRIGHT);
43MODULE_LICENSE("GPL");
44
45static int debug = 0;
46static int channel = 0;
47static char *ifname;
48static int mode = 0;
49
50static u32 ipw_debug_level;
51static int associate = 1;
52static int auto_create = 1;
53static int disable = 0;
54static const char ipw_modes[] = {
55 'a', 'b', 'g', '?'
56};
57
58static void ipw_rx(struct ipw_priv *priv);
59static int ipw_queue_tx_reclaim(struct ipw_priv *priv,
60 struct clx2_tx_queue *txq, int qindex);
61static int ipw_queue_reset(struct ipw_priv *priv);
62
63static int ipw_queue_tx_hcmd(struct ipw_priv *priv, int hcmd, void *buf,
64 int len, int sync);
65
66static void ipw_tx_queue_free(struct ipw_priv *);
67
68static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *);
69static void ipw_rx_queue_free(struct ipw_priv *, struct ipw_rx_queue *);
70static void ipw_rx_queue_replenish(void *);
71
72static int ipw_up(struct ipw_priv *);
73static void ipw_down(struct ipw_priv *);
74static int ipw_config(struct ipw_priv *);
75static int init_supported_rates(struct ipw_priv *priv, struct ipw_supported_rates *prates);
76
77static u8 band_b_active_channel[MAX_B_CHANNELS] = {
78 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0
79};
80static u8 band_a_active_channel[MAX_A_CHANNELS] = {
81 36, 40, 44, 48, 149, 153, 157, 161, 165, 52, 56, 60, 64, 0
82};
83
84static int is_valid_channel(int mode_mask, int channel)
85{
86 int i;
87
88 if (!channel)
89 return 0;
90
91 if (mode_mask & IEEE_A)
92 for (i = 0; i < MAX_A_CHANNELS; i++)
93 if (band_a_active_channel[i] == channel)
94 return IEEE_A;
95
96 if (mode_mask & (IEEE_B | IEEE_G))
97 for (i = 0; i < MAX_B_CHANNELS; i++)
98 if (band_b_active_channel[i] == channel)
99 return mode_mask & (IEEE_B | IEEE_G);
100
101 return 0;
102}
103
104static char *snprint_line(char *buf, size_t count,
105 const u8 *data, u32 len, u32 ofs)
106{
107 int out, i, j, l;
108 char c;
109
110 out = snprintf(buf, count, "%08X", ofs);
111
112 for (l = 0, i = 0; i < 2; i++) {
113 out += snprintf(buf + out, count - out, " ");
114 for (j = 0; j < 8 && l < len; j++, l++)
115 out += snprintf(buf + out, count - out, "%02X ",
116 data[(i * 8 + j)]);
117 for (; j < 8; j++)
118 out += snprintf(buf + out, count - out, " ");
119 }
120
121 out += snprintf(buf + out, count - out, " ");
122 for (l = 0, i = 0; i < 2; i++) {
123 out += snprintf(buf + out, count - out, " ");
124 for (j = 0; j < 8 && l < len; j++, l++) {
125 c = data[(i * 8 + j)];
126 if (!isascii(c) || !isprint(c))
127 c = '.';
128
129 out += snprintf(buf + out, count - out, "%c", c);
130 }
131
132 for (; j < 8; j++)
133 out += snprintf(buf + out, count - out, " ");
134 }
135
136 return buf;
137}
138
139static void printk_buf(int level, const u8 *data, u32 len)
140{
141 char line[81];
142 u32 ofs = 0;
143 if (!(ipw_debug_level & level))
144 return;
145
146 while (len) {
147 printk(KERN_DEBUG "%s\n",
148 snprint_line(line, sizeof(line), &data[ofs],
149 min(len, 16U), ofs));
150 ofs += 16;
151 len -= min(len, 16U);
152 }
153}
154
155static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg);
156#define ipw_read_reg32(a, b) _ipw_read_reg32(a, b)
157
158static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg);
159#define ipw_read_reg8(a, b) _ipw_read_reg8(a, b)
160
161static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value);
162static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c)
163{
164 IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
165 _ipw_write_reg8(a, b, c);
166}
167
168static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value);
169static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c)
170{
171 IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
172 _ipw_write_reg16(a, b, c);
173}
174
175static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value);
176static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
177{
178 IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
179 _ipw_write_reg32(a, b, c);
180}
181
182#define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs))
183#define ipw_write8(ipw, ofs, val) \
184 IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
185 _ipw_write8(ipw, ofs, val)
186
187#define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs))
188#define ipw_write16(ipw, ofs, val) \
189 IPW_DEBUG_IO("%s %d: write_direct16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
190 _ipw_write16(ipw, ofs, val)
191
192#define _ipw_write32(ipw, ofs, val) writel((val), (ipw)->hw_base + (ofs))
193#define ipw_write32(ipw, ofs, val) \
194 IPW_DEBUG_IO("%s %d: write_direct32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
195 _ipw_write32(ipw, ofs, val)
196
197#define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs))
198static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
199 IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32)(ofs));
200 return _ipw_read8(ipw, ofs);
201}
202#define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs)
203
204#define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs))
205static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
206 IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32)(ofs));
207 return _ipw_read16(ipw, ofs);
208}
209#define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs)
210
211#define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs))
212static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
213 IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32)(ofs));
214 return _ipw_read32(ipw, ofs);
215}
216#define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs)
217
218static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
219#define ipw_read_indirect(a, b, c, d) \
220 IPW_DEBUG_IO("%s %d: read_inddirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
221 _ipw_read_indirect(a, b, c, d)
222
223static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *data, int num);
224#define ipw_write_indirect(a, b, c, d) \
225 IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
226 _ipw_write_indirect(a, b, c, d)
227
228/* indirect write s */
229static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg,
230 u32 value)
231{
232 IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n",
233 priv, reg, value);
234 _ipw_write32(priv, CX2_INDIRECT_ADDR, reg);
235 _ipw_write32(priv, CX2_INDIRECT_DATA, value);
236}
237
238
239static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value)
240{
241 IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
242 _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
243 _ipw_write8(priv, CX2_INDIRECT_DATA, value);
244 IPW_DEBUG_IO(" reg = 0x%8lX : value = 0x%8X\n",
245 (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA),
246 value);
247}
248
249static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg,
250 u16 value)
251{
252 IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
253 _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
254 _ipw_write16(priv, CX2_INDIRECT_DATA, value);
255}
256
257/* indirect read s */
258
259static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg)
260{
261 u32 word;
262 _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
263 IPW_DEBUG_IO(" reg = 0x%8X : \n", reg);
264 word = _ipw_read32(priv, CX2_INDIRECT_DATA);
265 return (word >> ((reg & 0x3)*8)) & 0xff;
266}
267
268static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg)
269{
270 u32 value;
271
272 IPW_DEBUG_IO("%p : reg = 0x%08x\n", priv, reg);
273
274 _ipw_write32(priv, CX2_INDIRECT_ADDR, reg);
275 value = _ipw_read32(priv, CX2_INDIRECT_DATA);
276 IPW_DEBUG_IO(" reg = 0x%4X : value = 0x%4x \n", reg, value);
277 return value;
278}
279
280/* iterative/auto-increment 32 bit reads and writes */
281static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
282 int num)
283{
284 u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK;
285 u32 dif_len = addr - aligned_addr;
286 u32 aligned_len;
287 u32 i;
288
289 IPW_DEBUG_IO("addr = %i, buf = %p, num = %i\n", addr, buf, num);
290
291 /* Read the first nibble byte by byte */
292 if (unlikely(dif_len)) {
293 /* Start reading at aligned_addr + dif_len */
294 _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr);
295 for (i = dif_len; i < 4; i++, buf++)
296 *buf = _ipw_read8(priv, CX2_INDIRECT_DATA + i);
297 num -= dif_len;
298 aligned_addr += 4;
299 }
300
301 /* Read DWs through autoinc register */
302 _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr);
303 aligned_len = num & CX2_INDIRECT_ADDR_MASK;
304 for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
305 *(u32*)buf = ipw_read32(priv, CX2_AUTOINC_DATA);
306
307 /* Copy the last nibble */
308 dif_len = num - aligned_len;
309 _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr);
310 for (i = 0; i < dif_len; i++, buf++)
311 *buf = ipw_read8(priv, CX2_INDIRECT_DATA + i);
312}
313
314static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf,
315 int num)
316{
317 u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK;
318 u32 dif_len = addr - aligned_addr;
319 u32 aligned_len;
320 u32 i;
321
322 IPW_DEBUG_IO("addr = %i, buf = %p, num = %i\n", addr, buf, num);
323
324 /* Write the first nibble byte by byte */
325 if (unlikely(dif_len)) {
326 /* Start writing at aligned_addr + dif_len */
327 _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr);
328 for (i = dif_len; i < 4; i++, buf++)
329 _ipw_write8(priv, CX2_INDIRECT_DATA + i, *buf);
330 num -= dif_len;
331 aligned_addr += 4;
332 }
333
334 /* Write DWs through autoinc register */
335 _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr);
336 aligned_len = num & CX2_INDIRECT_ADDR_MASK;
337 for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
338 _ipw_write32(priv, CX2_AUTOINC_DATA, *(u32*)buf);
339
340 /* Copy the last nibble */
341 dif_len = num - aligned_len;
342 _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr);
343 for (i = 0; i < dif_len; i++, buf++)
344 _ipw_write8(priv, CX2_INDIRECT_DATA + i, *buf);
345}
346
347static void ipw_write_direct(struct ipw_priv *priv, u32 addr, void *buf,
348 int num)
349{
350 memcpy_toio((priv->hw_base + addr), buf, num);
351}
352
353static inline void ipw_set_bit(struct ipw_priv *priv, u32 reg, u32 mask)
354{
355 ipw_write32(priv, reg, ipw_read32(priv, reg) | mask);
356}
357
358static inline void ipw_clear_bit(struct ipw_priv *priv, u32 reg, u32 mask)
359{
360 ipw_write32(priv, reg, ipw_read32(priv, reg) & ~mask);
361}
362
363static inline void ipw_enable_interrupts(struct ipw_priv *priv)
364{
365 if (priv->status & STATUS_INT_ENABLED)
366 return;
367 priv->status |= STATUS_INT_ENABLED;
368 ipw_write32(priv, CX2_INTA_MASK_R, CX2_INTA_MASK_ALL);
369}
370
371static inline void ipw_disable_interrupts(struct ipw_priv *priv)
372{
373 if (!(priv->status & STATUS_INT_ENABLED))
374 return;
375 priv->status &= ~STATUS_INT_ENABLED;
376 ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL);
377}
378
379static char *ipw_error_desc(u32 val)
380{
381 switch (val) {
382 case IPW_FW_ERROR_OK:
383 return "ERROR_OK";
384 case IPW_FW_ERROR_FAIL:
385 return "ERROR_FAIL";
386 case IPW_FW_ERROR_MEMORY_UNDERFLOW:
387 return "MEMORY_UNDERFLOW";
388 case IPW_FW_ERROR_MEMORY_OVERFLOW:
389 return "MEMORY_OVERFLOW";
390 case IPW_FW_ERROR_BAD_PARAM:
391 return "ERROR_BAD_PARAM";
392 case IPW_FW_ERROR_BAD_CHECKSUM:
393 return "ERROR_BAD_CHECKSUM";
394 case IPW_FW_ERROR_NMI_INTERRUPT:
395 return "ERROR_NMI_INTERRUPT";
396 case IPW_FW_ERROR_BAD_DATABASE:
397 return "ERROR_BAD_DATABASE";
398 case IPW_FW_ERROR_ALLOC_FAIL:
399 return "ERROR_ALLOC_FAIL";
400 case IPW_FW_ERROR_DMA_UNDERRUN:
401 return "ERROR_DMA_UNDERRUN";
402 case IPW_FW_ERROR_DMA_STATUS:
403 return "ERROR_DMA_STATUS";
404 case IPW_FW_ERROR_DINOSTATUS_ERROR:
405 return "ERROR_DINOSTATUS_ERROR";
406 case IPW_FW_ERROR_EEPROMSTATUS_ERROR:
407 return "ERROR_EEPROMSTATUS_ERROR";
408 case IPW_FW_ERROR_SYSASSERT:
409 return "ERROR_SYSASSERT";
410 case IPW_FW_ERROR_FATAL_ERROR:
411 return "ERROR_FATALSTATUS_ERROR";
412 default:
413 return "UNKNOWNSTATUS_ERROR";
414 }
415}
416
417static void ipw_dump_nic_error_log(struct ipw_priv *priv)
418{
419 u32 desc, time, blink1, blink2, ilink1, ilink2, idata, i, count, base;
420
421 base = ipw_read32(priv, IPWSTATUS_ERROR_LOG);
422 count = ipw_read_reg32(priv, base);
423
424 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
425 IPW_ERROR("Start IPW Error Log Dump:\n");
426 IPW_ERROR("Status: 0x%08X, Config: %08X\n",
427 priv->status, priv->config);
428 }
429
430 for (i = ERROR_START_OFFSET;
431 i <= count * ERROR_ELEM_SIZE;
432 i += ERROR_ELEM_SIZE) {
433 desc = ipw_read_reg32(priv, base + i);
434 time = ipw_read_reg32(priv, base + i + 1*sizeof(u32));
435 blink1 = ipw_read_reg32(priv, base + i + 2*sizeof(u32));
436 blink2 = ipw_read_reg32(priv, base + i + 3*sizeof(u32));
437 ilink1 = ipw_read_reg32(priv, base + i + 4*sizeof(u32));
438 ilink2 = ipw_read_reg32(priv, base + i + 5*sizeof(u32));
439 idata = ipw_read_reg32(priv, base + i + 6*sizeof(u32));
440
441 IPW_ERROR(
442 "%s %i 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
443 ipw_error_desc(desc), time, blink1, blink2,
444 ilink1, ilink2, idata);
445 }
446}
447
448static void ipw_dump_nic_event_log(struct ipw_priv *priv)
449{
450 u32 ev, time, data, i, count, base;
451
452 base = ipw_read32(priv, IPW_EVENT_LOG);
453 count = ipw_read_reg32(priv, base);
454
455 if (EVENT_START_OFFSET <= count * EVENT_ELEM_SIZE)
456 IPW_ERROR("Start IPW Event Log Dump:\n");
457
458 for (i = EVENT_START_OFFSET;
459 i <= count * EVENT_ELEM_SIZE;
460 i += EVENT_ELEM_SIZE) {
461 ev = ipw_read_reg32(priv, base + i);
462 time = ipw_read_reg32(priv, base + i + 1*sizeof(u32));
463 data = ipw_read_reg32(priv, base + i + 2*sizeof(u32));
464
465#ifdef CONFIG_IPW_DEBUG
466 IPW_ERROR("%i\t0x%08x\t%i\n", time, data, ev);
467#endif
468 }
469}
470
471static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
472 u32 *len)
473{
474 u32 addr, field_info, field_len, field_count, total_len;
475
476 IPW_DEBUG_ORD("ordinal = %i\n", ord);
477
478 if (!priv || !val || !len) {
479 IPW_DEBUG_ORD("Invalid argument\n");
480 return -EINVAL;
481 }
482
483 /* verify device ordinal tables have been initialized */
484 if (!priv->table0_addr || !priv->table1_addr || !priv->table2_addr) {
485 IPW_DEBUG_ORD("Access ordinals before initialization\n");
486 return -EINVAL;
487 }
488
489 switch (IPW_ORD_TABLE_ID_MASK & ord) {
490 case IPW_ORD_TABLE_0_MASK:
491 /*
492 * TABLE 0: Direct access to a table of 32 bit values
493 *
494 * This is a very simple table with the data directly
495 * read from the table
496 */
497
498 /* remove the table id from the ordinal */
499 ord &= IPW_ORD_TABLE_VALUE_MASK;
500
501 /* boundary check */
502 if (ord > priv->table0_len) {
503 IPW_DEBUG_ORD("ordinal value (%i) longer then "
504 "max (%i)\n", ord, priv->table0_len);
505 return -EINVAL;
506 }
507
508 /* verify we have enough room to store the value */
509 if (*len < sizeof(u32)) {
510 IPW_DEBUG_ORD("ordinal buffer length too small, "
511 "need %zd\n", sizeof(u32));
512 return -EINVAL;
513 }
514
515 IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n",
516 ord, priv->table0_addr + (ord << 2));
517
518 *len = sizeof(u32);
519 ord <<= 2;
520 *((u32 *)val) = ipw_read32(priv, priv->table0_addr + ord);
521 break;
522
523 case IPW_ORD_TABLE_1_MASK:
524 /*
525 * TABLE 1: Indirect access to a table of 32 bit values
526 *
527 * This is a fairly large table of u32 values each
528 * representing starting addr for the data (which is
529 * also a u32)
530 */
531
532 /* remove the table id from the ordinal */
533 ord &= IPW_ORD_TABLE_VALUE_MASK;
534
535 /* boundary check */
536 if (ord > priv->table1_len) {
537 IPW_DEBUG_ORD("ordinal value too long\n");
538 return -EINVAL;
539 }
540
541 /* verify we have enough room to store the value */
542 if (*len < sizeof(u32)) {
543 IPW_DEBUG_ORD("ordinal buffer length too small, "
544 "need %zd\n", sizeof(u32));
545 return -EINVAL;
546 }
547
548 *((u32 *)val) = ipw_read_reg32(priv, (priv->table1_addr + (ord << 2)));
549 *len = sizeof(u32);
550 break;
551
552 case IPW_ORD_TABLE_2_MASK:
553 /*
554 * TABLE 2: Indirect access to a table of variable sized values
555 *
556 * This table consist of six values, each containing
557 * - dword containing the starting offset of the data
558 * - dword containing the lengh in the first 16bits
559 * and the count in the second 16bits
560 */
561
562 /* remove the table id from the ordinal */
563 ord &= IPW_ORD_TABLE_VALUE_MASK;
564
565 /* boundary check */
566 if (ord > priv->table2_len) {
567 IPW_DEBUG_ORD("ordinal value too long\n");
568 return -EINVAL;
569 }
570
571 /* get the address of statistic */
572 addr = ipw_read_reg32(priv, priv->table2_addr + (ord << 3));
573
574 /* get the second DW of statistics ;
575 * two 16-bit words - first is length, second is count */
576 field_info = ipw_read_reg32(priv, priv->table2_addr + (ord << 3) + sizeof(u32));
577
578 /* get each entry length */
579 field_len = *((u16 *)&field_info);
580
581 /* get number of entries */
582 field_count = *(((u16 *)&field_info) + 1);
583
584 /* abort if not enought memory */
585 total_len = field_len * field_count;
586 if (total_len > *len) {
587 *len = total_len;
588 return -EINVAL;
589 }
590
591 *len = total_len;
592 if (!total_len)
593 return 0;
594
595 IPW_DEBUG_ORD("addr = 0x%08x, total_len = %i, "
596 "field_info = 0x%08x\n",
597 addr, total_len, field_info);
598 ipw_read_indirect(priv, addr, val, total_len);
599 break;
600
601 default:
602 IPW_DEBUG_ORD("Invalid ordinal!\n");
603 return -EINVAL;
604
605 }
606
607
608 return 0;
609}
610
611static void ipw_init_ordinals(struct ipw_priv *priv)
612{
613 priv->table0_addr = IPW_ORDINALS_TABLE_LOWER;
614 priv->table0_len = ipw_read32(priv, priv->table0_addr);
615
616 IPW_DEBUG_ORD("table 0 offset at 0x%08x, len = %i\n",
617 priv->table0_addr, priv->table0_len);
618
619 priv->table1_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_1);
620 priv->table1_len = ipw_read_reg32(priv, priv->table1_addr);
621
622 IPW_DEBUG_ORD("table 1 offset at 0x%08x, len = %i\n",
623 priv->table1_addr, priv->table1_len);
624
625 priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2);
626 priv->table2_len = ipw_read_reg32(priv, priv->table2_addr);
627 priv->table2_len &= 0x0000ffff; /* use first two bytes */
628
629 IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n",
630 priv->table2_addr, priv->table2_len);
631
632}
633
634/*
635 * The following adds a new attribute to the sysfs representation
636 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/ipw/)
637 * used for controling the debug level.
638 *
639 * See the level definitions in ipw for details.
640 */
641static ssize_t show_debug_level(struct device_driver *d, char *buf)
642{
643 return sprintf(buf, "0x%08X\n", ipw_debug_level);
644}
645static ssize_t store_debug_level(struct device_driver *d,
646 const char *buf, size_t count)
647{
648 char *p = (char *)buf;
649 u32 val;
650
651 if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
652 p++;
653 if (p[0] == 'x' || p[0] == 'X')
654 p++;
655 val = simple_strtoul(p, &p, 16);
656 } else
657 val = simple_strtoul(p, &p, 10);
658 if (p == buf)
659 printk(KERN_INFO DRV_NAME
660 ": %s is not in hex or decimal form.\n", buf);
661 else
662 ipw_debug_level = val;
663
664 return strnlen(buf, count);
665}
666
667static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
668 show_debug_level, store_debug_level);
669
670static ssize_t show_status(struct device *d,
671 struct device_attribute *attr, char *buf)
672{
673 struct ipw_priv *p = d->driver_data;
674 return sprintf(buf, "0x%08x\n", (int)p->status);
675}
676static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
677
678static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
679 char *buf)
680{
681 struct ipw_priv *p = d->driver_data;
682 return sprintf(buf, "0x%08x\n", (int)p->config);
683}
684static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL);
685
686static ssize_t show_nic_type(struct device *d,
687 struct device_attribute *attr, char *buf)
688{
689 struct ipw_priv *p = d->driver_data;
690 u8 type = p->eeprom[EEPROM_NIC_TYPE];
691
692 switch (type) {
693 case EEPROM_NIC_TYPE_STANDARD:
694 return sprintf(buf, "STANDARD\n");
695 case EEPROM_NIC_TYPE_DELL:
696 return sprintf(buf, "DELL\n");
697 case EEPROM_NIC_TYPE_FUJITSU:
698 return sprintf(buf, "FUJITSU\n");
699 case EEPROM_NIC_TYPE_IBM:
700 return sprintf(buf, "IBM\n");
701 case EEPROM_NIC_TYPE_HP:
702 return sprintf(buf, "HP\n");
703 }
704
705 return sprintf(buf, "UNKNOWN\n");
706}
707static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL);
708
709static ssize_t dump_error_log(struct device *d,
710 struct device_attribute *attr, const char *buf, size_t count)
711{
712 char *p = (char *)buf;
713
714 if (p[0] == '1')
715 ipw_dump_nic_error_log((struct ipw_priv*)d->driver_data);
716
717 return strnlen(buf, count);
718}
719static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
720
721static ssize_t dump_event_log(struct device *d,
722 struct device_attribute *attr, const char *buf, size_t count)
723{
724 char *p = (char *)buf;
725
726 if (p[0] == '1')
727 ipw_dump_nic_event_log((struct ipw_priv*)d->driver_data);
728
729 return strnlen(buf, count);
730}
731static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
732
733static ssize_t show_ucode_version(struct device *d,
734 struct device_attribute *attr, char *buf)
735{
736 u32 len = sizeof(u32), tmp = 0;
737 struct ipw_priv *p = d->driver_data;
738
739 if(ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len))
740 return 0;
741
742 return sprintf(buf, "0x%08x\n", tmp);
743}
744static DEVICE_ATTR(ucode_version, S_IWUSR|S_IRUGO, show_ucode_version, NULL);
745
746static ssize_t show_rtc(struct device *d, struct device_attribute *attr,
747 char *buf)
748{
749 u32 len = sizeof(u32), tmp = 0;
750 struct ipw_priv *p = d->driver_data;
751
752 if(ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len))
753 return 0;
754
755 return sprintf(buf, "0x%08x\n", tmp);
756}
757static DEVICE_ATTR(rtc, S_IWUSR|S_IRUGO, show_rtc, NULL);
758
759/*
760 * Add a device attribute to view/control the delay between eeprom
761 * operations.
762 */
763static ssize_t show_eeprom_delay(struct device *d,
764 struct device_attribute *attr, char *buf)
765{
766 int n = ((struct ipw_priv*)d->driver_data)->eeprom_delay;
767 return sprintf(buf, "%i\n", n);
768}
769static ssize_t store_eeprom_delay(struct device *d,
770 struct device_attribute *attr, const char *buf,
771 size_t count)
772{
773 struct ipw_priv *p = d->driver_data;
774 sscanf(buf, "%i", &p->eeprom_delay);
775 return strnlen(buf, count);
776}
777static DEVICE_ATTR(eeprom_delay, S_IWUSR|S_IRUGO,
778 show_eeprom_delay,store_eeprom_delay);
779
780static ssize_t show_command_event_reg(struct device *d,
781 struct device_attribute *attr, char *buf)
782{
783 u32 reg = 0;
784 struct ipw_priv *p = d->driver_data;
785
786 reg = ipw_read_reg32(p, CX2_INTERNAL_CMD_EVENT);
787 return sprintf(buf, "0x%08x\n", reg);
788}
789static ssize_t store_command_event_reg(struct device *d,
790 struct device_attribute *attr, const char *buf,
791 size_t count)
792{
793 u32 reg;
794 struct ipw_priv *p = d->driver_data;
795
796 sscanf(buf, "%x", &reg);
797 ipw_write_reg32(p, CX2_INTERNAL_CMD_EVENT, reg);
798 return strnlen(buf, count);
799}
800static DEVICE_ATTR(command_event_reg, S_IWUSR|S_IRUGO,
801 show_command_event_reg,store_command_event_reg);
802
803static ssize_t show_mem_gpio_reg(struct device *d,
804 struct device_attribute *attr, char *buf)
805{
806 u32 reg = 0;
807 struct ipw_priv *p = d->driver_data;
808
809 reg = ipw_read_reg32(p, 0x301100);
810 return sprintf(buf, "0x%08x\n", reg);
811}
812static ssize_t store_mem_gpio_reg(struct device *d,
813 struct device_attribute *attr, const char *buf,
814 size_t count)
815{
816 u32 reg;
817 struct ipw_priv *p = d->driver_data;
818
819 sscanf(buf, "%x", &reg);
820 ipw_write_reg32(p, 0x301100, reg);
821 return strnlen(buf, count);
822}
823static DEVICE_ATTR(mem_gpio_reg, S_IWUSR|S_IRUGO,
824 show_mem_gpio_reg,store_mem_gpio_reg);
825
826static ssize_t show_indirect_dword(struct device *d,
827 struct device_attribute *attr, char *buf)
828{
829 u32 reg = 0;
830 struct ipw_priv *priv = d->driver_data;
831 if (priv->status & STATUS_INDIRECT_DWORD)
832 reg = ipw_read_reg32(priv, priv->indirect_dword);
833 else
834 reg = 0;
835
836 return sprintf(buf, "0x%08x\n", reg);
837}
838static ssize_t store_indirect_dword(struct device *d,
839 struct device_attribute *attr, const char *buf,
840 size_t count)
841{
842 struct ipw_priv *priv = d->driver_data;
843
844 sscanf(buf, "%x", &priv->indirect_dword);
845 priv->status |= STATUS_INDIRECT_DWORD;
846 return strnlen(buf, count);
847}
848static DEVICE_ATTR(indirect_dword, S_IWUSR|S_IRUGO,
849 show_indirect_dword,store_indirect_dword);
850
851static ssize_t show_indirect_byte(struct device *d,
852 struct device_attribute *attr, char *buf)
853{
854 u8 reg = 0;
855 struct ipw_priv *priv = d->driver_data;
856 if (priv->status & STATUS_INDIRECT_BYTE)
857 reg = ipw_read_reg8(priv, priv->indirect_byte);
858 else
859 reg = 0;
860
861 return sprintf(buf, "0x%02x\n", reg);
862}
863static ssize_t store_indirect_byte(struct device *d,
864 struct device_attribute *attr, const char *buf,
865 size_t count)
866{
867 struct ipw_priv *priv = d->driver_data;
868
869 sscanf(buf, "%x", &priv->indirect_byte);
870 priv->status |= STATUS_INDIRECT_BYTE;
871 return strnlen(buf, count);
872}
873static DEVICE_ATTR(indirect_byte, S_IWUSR|S_IRUGO,
874 show_indirect_byte, store_indirect_byte);
875
876static ssize_t show_direct_dword(struct device *d,
877 struct device_attribute *attr, char *buf)
878{
879 u32 reg = 0;
880 struct ipw_priv *priv = d->driver_data;
881
882 if (priv->status & STATUS_DIRECT_DWORD)
883 reg = ipw_read32(priv, priv->direct_dword);
884 else
885 reg = 0;
886
887 return sprintf(buf, "0x%08x\n", reg);
888}
889static ssize_t store_direct_dword(struct device *d,
890 struct device_attribute *attr, const char *buf,
891 size_t count)
892{
893 struct ipw_priv *priv = d->driver_data;
894
895 sscanf(buf, "%x", &priv->direct_dword);
896 priv->status |= STATUS_DIRECT_DWORD;
897 return strnlen(buf, count);
898}
899static DEVICE_ATTR(direct_dword, S_IWUSR|S_IRUGO,
900 show_direct_dword,store_direct_dword);
901
902
903static inline int rf_kill_active(struct ipw_priv *priv)
904{
905 if (0 == (ipw_read32(priv, 0x30) & 0x10000))
906 priv->status |= STATUS_RF_KILL_HW;
907 else
908 priv->status &= ~STATUS_RF_KILL_HW;
909
910 return (priv->status & STATUS_RF_KILL_HW) ? 1 : 0;
911}
912
913static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
914 char *buf)
915{
916 /* 0 - RF kill not enabled
917 1 - SW based RF kill active (sysfs)
918 2 - HW based RF kill active
919 3 - Both HW and SW baed RF kill active */
920 struct ipw_priv *priv = d->driver_data;
921 int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
922 (rf_kill_active(priv) ? 0x2 : 0x0);
923 return sprintf(buf, "%i\n", val);
924}
925
926static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio)
927{
928 if ((disable_radio ? 1 : 0) ==
929 (priv->status & STATUS_RF_KILL_SW ? 1 : 0))
930 return 0 ;
931
932 IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n",
933 disable_radio ? "OFF" : "ON");
934
935 if (disable_radio) {
936 priv->status |= STATUS_RF_KILL_SW;
937
938 if (priv->workqueue) {
939 cancel_delayed_work(&priv->request_scan);
940 }
941 wake_up_interruptible(&priv->wait_command_queue);
942 queue_work(priv->workqueue, &priv->down);
943 } else {
944 priv->status &= ~STATUS_RF_KILL_SW;
945 if (rf_kill_active(priv)) {
946 IPW_DEBUG_RF_KILL("Can not turn radio back on - "
947 "disabled by HW switch\n");
948 /* Make sure the RF_KILL check timer is running */
949 cancel_delayed_work(&priv->rf_kill);
950 queue_delayed_work(priv->workqueue, &priv->rf_kill,
951 2 * HZ);
952 } else
953 queue_work(priv->workqueue, &priv->up);
954 }
955
956 return 1;
957}
958
959static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr,
960 const char *buf, size_t count)
961{
962 struct ipw_priv *priv = d->driver_data;
963
964 ipw_radio_kill_sw(priv, buf[0] == '1');
965
966 return count;
967}
968static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill);
969
970static void ipw_irq_tasklet(struct ipw_priv *priv)
971{
972 u32 inta, inta_mask, handled = 0;
973 unsigned long flags;
974 int rc = 0;
975
976 spin_lock_irqsave(&priv->lock, flags);
977
978 inta = ipw_read32(priv, CX2_INTA_RW);
979 inta_mask = ipw_read32(priv, CX2_INTA_MASK_R);
980 inta &= (CX2_INTA_MASK_ALL & inta_mask);
981
982 /* Add any cached INTA values that need to be handled */
983 inta |= priv->isr_inta;
984
985 /* handle all the justifications for the interrupt */
986 if (inta & CX2_INTA_BIT_RX_TRANSFER) {
987 ipw_rx(priv);
988 handled |= CX2_INTA_BIT_RX_TRANSFER;
989 }
990
991 if (inta & CX2_INTA_BIT_TX_CMD_QUEUE) {
992 IPW_DEBUG_HC("Command completed.\n");
993 rc = ipw_queue_tx_reclaim( priv, &priv->txq_cmd, -1);
994 priv->status &= ~STATUS_HCMD_ACTIVE;
995 wake_up_interruptible(&priv->wait_command_queue);
996 handled |= CX2_INTA_BIT_TX_CMD_QUEUE;
997 }
998
999 if (inta & CX2_INTA_BIT_TX_QUEUE_1) {
1000 IPW_DEBUG_TX("TX_QUEUE_1\n");
1001 rc = ipw_queue_tx_reclaim( priv, &priv->txq[0], 0);
1002 handled |= CX2_INTA_BIT_TX_QUEUE_1;
1003 }
1004
1005 if (inta & CX2_INTA_BIT_TX_QUEUE_2) {
1006 IPW_DEBUG_TX("TX_QUEUE_2\n");
1007 rc = ipw_queue_tx_reclaim( priv, &priv->txq[1], 1);
1008 handled |= CX2_INTA_BIT_TX_QUEUE_2;
1009 }
1010
1011 if (inta & CX2_INTA_BIT_TX_QUEUE_3) {
1012 IPW_DEBUG_TX("TX_QUEUE_3\n");
1013 rc = ipw_queue_tx_reclaim( priv, &priv->txq[2], 2);
1014 handled |= CX2_INTA_BIT_TX_QUEUE_3;
1015 }
1016
1017 if (inta & CX2_INTA_BIT_TX_QUEUE_4) {
1018 IPW_DEBUG_TX("TX_QUEUE_4\n");
1019 rc = ipw_queue_tx_reclaim( priv, &priv->txq[3], 3);
1020 handled |= CX2_INTA_BIT_TX_QUEUE_4;
1021 }
1022
1023 if (inta & CX2_INTA_BIT_STATUS_CHANGE) {
1024 IPW_WARNING("STATUS_CHANGE\n");
1025 handled |= CX2_INTA_BIT_STATUS_CHANGE;
1026 }
1027
1028 if (inta & CX2_INTA_BIT_BEACON_PERIOD_EXPIRED) {
1029 IPW_WARNING("TX_PERIOD_EXPIRED\n");
1030 handled |= CX2_INTA_BIT_BEACON_PERIOD_EXPIRED;
1031 }
1032
1033 if (inta & CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE) {
1034 IPW_WARNING("HOST_CMD_DONE\n");
1035 handled |= CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE;
1036 }
1037
1038 if (inta & CX2_INTA_BIT_FW_INITIALIZATION_DONE) {
1039 IPW_WARNING("FW_INITIALIZATION_DONE\n");
1040 handled |= CX2_INTA_BIT_FW_INITIALIZATION_DONE;
1041 }
1042
1043 if (inta & CX2_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE) {
1044 IPW_WARNING("PHY_OFF_DONE\n");
1045 handled |= CX2_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE;
1046 }
1047
1048 if (inta & CX2_INTA_BIT_RF_KILL_DONE) {
1049 IPW_DEBUG_RF_KILL("RF_KILL_DONE\n");
1050 priv->status |= STATUS_RF_KILL_HW;
1051 wake_up_interruptible(&priv->wait_command_queue);
1052 netif_carrier_off(priv->net_dev);
1053 netif_stop_queue(priv->net_dev);
1054 cancel_delayed_work(&priv->request_scan);
1055 queue_delayed_work(priv->workqueue, &priv->rf_kill, 2 * HZ);
1056 handled |= CX2_INTA_BIT_RF_KILL_DONE;
1057 }
1058
1059 if (inta & CX2_INTA_BIT_FATAL_ERROR) {
1060 IPW_ERROR("Firmware error detected. Restarting.\n");
1061#ifdef CONFIG_IPW_DEBUG
1062 if (ipw_debug_level & IPW_DL_FW_ERRORS) {
1063 ipw_dump_nic_error_log(priv);
1064 ipw_dump_nic_event_log(priv);
1065 }
1066#endif
1067 queue_work(priv->workqueue, &priv->adapter_restart);
1068 handled |= CX2_INTA_BIT_FATAL_ERROR;
1069 }
1070
1071 if (inta & CX2_INTA_BIT_PARITY_ERROR) {
1072 IPW_ERROR("Parity error\n");
1073 handled |= CX2_INTA_BIT_PARITY_ERROR;
1074 }
1075
1076 if (handled != inta) {
1077 IPW_ERROR("Unhandled INTA bits 0x%08x\n",
1078 inta & ~handled);
1079 }
1080
1081 /* enable all interrupts */
1082 ipw_enable_interrupts(priv);
1083
1084 spin_unlock_irqrestore(&priv->lock, flags);
1085}
1086
1087#ifdef CONFIG_IPW_DEBUG
1088#define IPW_CMD(x) case IPW_CMD_ ## x : return #x
1089static char *get_cmd_string(u8 cmd)
1090{
1091 switch (cmd) {
1092 IPW_CMD(HOST_COMPLETE);
1093 IPW_CMD(POWER_DOWN);
1094 IPW_CMD(SYSTEM_CONFIG);
1095 IPW_CMD(MULTICAST_ADDRESS);
1096 IPW_CMD(SSID);
1097 IPW_CMD(ADAPTER_ADDRESS);
1098 IPW_CMD(PORT_TYPE);
1099 IPW_CMD(RTS_THRESHOLD);
1100 IPW_CMD(FRAG_THRESHOLD);
1101 IPW_CMD(POWER_MODE);
1102 IPW_CMD(WEP_KEY);
1103 IPW_CMD(TGI_TX_KEY);
1104 IPW_CMD(SCAN_REQUEST);
1105 IPW_CMD(SCAN_REQUEST_EXT);
1106 IPW_CMD(ASSOCIATE);
1107 IPW_CMD(SUPPORTED_RATES);
1108 IPW_CMD(SCAN_ABORT);
1109 IPW_CMD(TX_FLUSH);
1110 IPW_CMD(QOS_PARAMETERS);
1111 IPW_CMD(DINO_CONFIG);
1112 IPW_CMD(RSN_CAPABILITIES);
1113 IPW_CMD(RX_KEY);
1114 IPW_CMD(CARD_DISABLE);
1115 IPW_CMD(SEED_NUMBER);
1116 IPW_CMD(TX_POWER);
1117 IPW_CMD(COUNTRY_INFO);
1118 IPW_CMD(AIRONET_INFO);
1119 IPW_CMD(AP_TX_POWER);
1120 IPW_CMD(CCKM_INFO);
1121 IPW_CMD(CCX_VER_INFO);
1122 IPW_CMD(SET_CALIBRATION);
1123 IPW_CMD(SENSITIVITY_CALIB);
1124 IPW_CMD(RETRY_LIMIT);
1125 IPW_CMD(IPW_PRE_POWER_DOWN);
1126 IPW_CMD(VAP_BEACON_TEMPLATE);
1127 IPW_CMD(VAP_DTIM_PERIOD);
1128 IPW_CMD(EXT_SUPPORTED_RATES);
1129 IPW_CMD(VAP_LOCAL_TX_PWR_CONSTRAINT);
1130 IPW_CMD(VAP_QUIET_INTERVALS);
1131 IPW_CMD(VAP_CHANNEL_SWITCH);
1132 IPW_CMD(VAP_MANDATORY_CHANNELS);
1133 IPW_CMD(VAP_CELL_PWR_LIMIT);
1134 IPW_CMD(VAP_CF_PARAM_SET);
1135 IPW_CMD(VAP_SET_BEACONING_STATE);
1136 IPW_CMD(MEASUREMENT);
1137 IPW_CMD(POWER_CAPABILITY);
1138 IPW_CMD(SUPPORTED_CHANNELS);
1139 IPW_CMD(TPC_REPORT);
1140 IPW_CMD(WME_INFO);
1141 IPW_CMD(PRODUCTION_COMMAND);
1142 default:
1143 return "UNKNOWN";
1144 }
1145}
1146#endif /* CONFIG_IPW_DEBUG */
1147
1148#define HOST_COMPLETE_TIMEOUT HZ
1149static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
1150{
1151 int rc = 0;
1152
1153 if (priv->status & STATUS_HCMD_ACTIVE) {
1154 IPW_ERROR("Already sending a command\n");
1155 return -1;
1156 }
1157
1158 priv->status |= STATUS_HCMD_ACTIVE;
1159
1160 IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n",
1161 get_cmd_string(cmd->cmd), cmd->cmd, cmd->len);
1162 printk_buf(IPW_DL_HOST_COMMAND, (u8*)cmd->param, cmd->len);
1163
1164 rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0);
1165 if (rc)
1166 return rc;
1167
1168 rc = wait_event_interruptible_timeout(
1169 priv->wait_command_queue, !(priv->status & STATUS_HCMD_ACTIVE),
1170 HOST_COMPLETE_TIMEOUT);
1171 if (rc == 0) {
1172 IPW_DEBUG_INFO("Command completion failed out after %dms.\n",
1173 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
1174 priv->status &= ~STATUS_HCMD_ACTIVE;
1175 return -EIO;
1176 }
1177 if (priv->status & STATUS_RF_KILL_MASK) {
1178 IPW_DEBUG_INFO("Command aborted due to RF Kill Switch\n");
1179 return -EIO;
1180 }
1181
1182 return 0;
1183}
1184
1185static int ipw_send_host_complete(struct ipw_priv *priv)
1186{
1187 struct host_cmd cmd = {
1188 .cmd = IPW_CMD_HOST_COMPLETE,
1189 .len = 0
1190 };
1191
1192 if (!priv) {
1193 IPW_ERROR("Invalid args\n");
1194 return -1;
1195 }
1196
1197 if (ipw_send_cmd(priv, &cmd)) {
1198 IPW_ERROR("failed to send HOST_COMPLETE command\n");
1199 return -1;
1200 }
1201
1202 return 0;
1203}
1204
1205static int ipw_send_system_config(struct ipw_priv *priv,
1206 struct ipw_sys_config *config)
1207{
1208 struct host_cmd cmd = {
1209 .cmd = IPW_CMD_SYSTEM_CONFIG,
1210 .len = sizeof(*config)
1211 };
1212
1213 if (!priv || !config) {
1214 IPW_ERROR("Invalid args\n");
1215 return -1;
1216 }
1217
1218 memcpy(&cmd.param,config,sizeof(*config));
1219 if (ipw_send_cmd(priv, &cmd)) {
1220 IPW_ERROR("failed to send SYSTEM_CONFIG command\n");
1221 return -1;
1222 }
1223
1224 return 0;
1225}
1226
1227static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len)
1228{
1229 struct host_cmd cmd = {
1230 .cmd = IPW_CMD_SSID,
1231 .len = min(len, IW_ESSID_MAX_SIZE)
1232 };
1233
1234 if (!priv || !ssid) {
1235 IPW_ERROR("Invalid args\n");
1236 return -1;
1237 }
1238
1239 memcpy(&cmd.param, ssid, cmd.len);
1240 if (ipw_send_cmd(priv, &cmd)) {
1241 IPW_ERROR("failed to send SSID command\n");
1242 return -1;
1243 }
1244
1245 return 0;
1246}
1247
1248static int ipw_send_adapter_address(struct ipw_priv *priv, u8 *mac)
1249{
1250 struct host_cmd cmd = {
1251 .cmd = IPW_CMD_ADAPTER_ADDRESS,
1252 .len = ETH_ALEN
1253 };
1254
1255 if (!priv || !mac) {
1256 IPW_ERROR("Invalid args\n");
1257 return -1;
1258 }
1259
1260 IPW_DEBUG_INFO("%s: Setting MAC to " MAC_FMT "\n",
1261 priv->net_dev->name, MAC_ARG(mac));
1262
1263 memcpy(&cmd.param, mac, ETH_ALEN);
1264
1265 if (ipw_send_cmd(priv, &cmd)) {
1266 IPW_ERROR("failed to send ADAPTER_ADDRESS command\n");
1267 return -1;
1268 }
1269
1270 return 0;
1271}
1272
1273static void ipw_adapter_restart(void *adapter)
1274{
1275 struct ipw_priv *priv = adapter;
1276
1277 if (priv->status & STATUS_RF_KILL_MASK)
1278 return;
1279
1280 ipw_down(priv);
1281 if (ipw_up(priv)) {
1282 IPW_ERROR("Failed to up device\n");
1283 return;
1284 }
1285}
1286
1287
1288
1289
1290#define IPW_SCAN_CHECK_WATCHDOG (5 * HZ)
1291
1292static void ipw_scan_check(void *data)
1293{
1294 struct ipw_priv *priv = data;
1295 if (priv->status & (STATUS_SCANNING | STATUS_SCAN_ABORTING)) {
1296 IPW_DEBUG_SCAN("Scan completion watchdog resetting "
1297 "adapter (%dms).\n",
1298 IPW_SCAN_CHECK_WATCHDOG / 100);
1299 ipw_adapter_restart(priv);
1300 }
1301}
1302
1303static int ipw_send_scan_request_ext(struct ipw_priv *priv,
1304 struct ipw_scan_request_ext *request)
1305{
1306 struct host_cmd cmd = {
1307 .cmd = IPW_CMD_SCAN_REQUEST_EXT,
1308 .len = sizeof(*request)
1309 };
1310
1311 if (!priv || !request) {
1312 IPW_ERROR("Invalid args\n");
1313 return -1;
1314 }
1315
1316 memcpy(&cmd.param,request,sizeof(*request));
1317 if (ipw_send_cmd(priv, &cmd)) {
1318 IPW_ERROR("failed to send SCAN_REQUEST_EXT command\n");
1319 return -1;
1320 }
1321
1322 queue_delayed_work(priv->workqueue, &priv->scan_check,
1323 IPW_SCAN_CHECK_WATCHDOG);
1324 return 0;
1325}
1326
1327static int ipw_send_scan_abort(struct ipw_priv *priv)
1328{
1329 struct host_cmd cmd = {
1330 .cmd = IPW_CMD_SCAN_ABORT,
1331 .len = 0
1332 };
1333
1334 if (!priv) {
1335 IPW_ERROR("Invalid args\n");
1336 return -1;
1337 }
1338
1339 if (ipw_send_cmd(priv, &cmd)) {
1340 IPW_ERROR("failed to send SCAN_ABORT command\n");
1341 return -1;
1342 }
1343
1344 return 0;
1345}
1346
1347static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens)
1348{
1349 struct host_cmd cmd = {
1350 .cmd = IPW_CMD_SENSITIVITY_CALIB,
1351 .len = sizeof(struct ipw_sensitivity_calib)
1352 };
1353 struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *)
1354 &cmd.param;
1355 calib->beacon_rssi_raw = sens;
1356 if (ipw_send_cmd(priv, &cmd)) {
1357 IPW_ERROR("failed to send SENSITIVITY CALIB command\n");
1358 return -1;
1359 }
1360
1361 return 0;
1362}
1363
1364static int ipw_send_associate(struct ipw_priv *priv,
1365 struct ipw_associate *associate)
1366{
1367 struct host_cmd cmd = {
1368 .cmd = IPW_CMD_ASSOCIATE,
1369 .len = sizeof(*associate)
1370 };
1371
1372 if (!priv || !associate) {
1373 IPW_ERROR("Invalid args\n");
1374 return -1;
1375 }
1376
1377 memcpy(&cmd.param,associate,sizeof(*associate));
1378 if (ipw_send_cmd(priv, &cmd)) {
1379 IPW_ERROR("failed to send ASSOCIATE command\n");
1380 return -1;
1381 }
1382
1383 return 0;
1384}
1385
1386static int ipw_send_supported_rates(struct ipw_priv *priv,
1387 struct ipw_supported_rates *rates)
1388{
1389 struct host_cmd cmd = {
1390 .cmd = IPW_CMD_SUPPORTED_RATES,
1391 .len = sizeof(*rates)
1392 };
1393
1394 if (!priv || !rates) {
1395 IPW_ERROR("Invalid args\n");
1396 return -1;
1397 }
1398
1399 memcpy(&cmd.param,rates,sizeof(*rates));
1400 if (ipw_send_cmd(priv, &cmd)) {
1401 IPW_ERROR("failed to send SUPPORTED_RATES command\n");
1402 return -1;
1403 }
1404
1405 return 0;
1406}
1407
1408static int ipw_set_random_seed(struct ipw_priv *priv)
1409{
1410 struct host_cmd cmd = {
1411 .cmd = IPW_CMD_SEED_NUMBER,
1412 .len = sizeof(u32)
1413 };
1414
1415 if (!priv) {
1416 IPW_ERROR("Invalid args\n");
1417 return -1;
1418 }
1419
1420 get_random_bytes(&cmd.param, sizeof(u32));
1421
1422 if (ipw_send_cmd(priv, &cmd)) {
1423 IPW_ERROR("failed to send SEED_NUMBER command\n");
1424 return -1;
1425 }
1426
1427 return 0;
1428}
1429
1430#if 0
1431static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off)
1432{
1433 struct host_cmd cmd = {
1434 .cmd = IPW_CMD_CARD_DISABLE,
1435 .len = sizeof(u32)
1436 };
1437
1438 if (!priv) {
1439 IPW_ERROR("Invalid args\n");
1440 return -1;
1441 }
1442
1443 *((u32*)&cmd.param) = phy_off;
1444
1445 if (ipw_send_cmd(priv, &cmd)) {
1446 IPW_ERROR("failed to send CARD_DISABLE command\n");
1447 return -1;
1448 }
1449
1450 return 0;
1451}
1452#endif
1453
1454static int ipw_send_tx_power(struct ipw_priv *priv,
1455 struct ipw_tx_power *power)
1456{
1457 struct host_cmd cmd = {
1458 .cmd = IPW_CMD_TX_POWER,
1459 .len = sizeof(*power)
1460 };
1461
1462 if (!priv || !power) {
1463 IPW_ERROR("Invalid args\n");
1464 return -1;
1465 }
1466
1467 memcpy(&cmd.param,power,sizeof(*power));
1468 if (ipw_send_cmd(priv, &cmd)) {
1469 IPW_ERROR("failed to send TX_POWER command\n");
1470 return -1;
1471 }
1472
1473 return 0;
1474}
1475
1476static int ipw_send_rts_threshold(struct ipw_priv *priv, u16 rts)
1477{
1478 struct ipw_rts_threshold rts_threshold = {
1479 .rts_threshold = rts,
1480 };
1481 struct host_cmd cmd = {
1482 .cmd = IPW_CMD_RTS_THRESHOLD,
1483 .len = sizeof(rts_threshold)
1484 };
1485
1486 if (!priv) {
1487 IPW_ERROR("Invalid args\n");
1488 return -1;
1489 }
1490
1491 memcpy(&cmd.param, &rts_threshold, sizeof(rts_threshold));
1492 if (ipw_send_cmd(priv, &cmd)) {
1493 IPW_ERROR("failed to send RTS_THRESHOLD command\n");
1494 return -1;
1495 }
1496
1497 return 0;
1498}
1499
1500static int ipw_send_frag_threshold(struct ipw_priv *priv, u16 frag)
1501{
1502 struct ipw_frag_threshold frag_threshold = {
1503 .frag_threshold = frag,
1504 };
1505 struct host_cmd cmd = {
1506 .cmd = IPW_CMD_FRAG_THRESHOLD,
1507 .len = sizeof(frag_threshold)
1508 };
1509
1510 if (!priv) {
1511 IPW_ERROR("Invalid args\n");
1512 return -1;
1513 }
1514
1515 memcpy(&cmd.param, &frag_threshold, sizeof(frag_threshold));
1516 if (ipw_send_cmd(priv, &cmd)) {
1517 IPW_ERROR("failed to send FRAG_THRESHOLD command\n");
1518 return -1;
1519 }
1520
1521 return 0;
1522}
1523
1524static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode)
1525{
1526 struct host_cmd cmd = {
1527 .cmd = IPW_CMD_POWER_MODE,
1528 .len = sizeof(u32)
1529 };
1530 u32 *param = (u32*)(&cmd.param);
1531
1532 if (!priv) {
1533 IPW_ERROR("Invalid args\n");
1534 return -1;
1535 }
1536
1537 /* If on battery, set to 3, if AC set to CAM, else user
1538 * level */
1539 switch (mode) {
1540 case IPW_POWER_BATTERY:
1541 *param = IPW_POWER_INDEX_3;
1542 break;
1543 case IPW_POWER_AC:
1544 *param = IPW_POWER_MODE_CAM;
1545 break;
1546 default:
1547 *param = mode;
1548 break;
1549 }
1550
1551 if (ipw_send_cmd(priv, &cmd)) {
1552 IPW_ERROR("failed to send POWER_MODE command\n");
1553 return -1;
1554 }
1555
1556 return 0;
1557}
1558
1559/*
1560 * The IPW device contains a Microwire compatible EEPROM that stores
1561 * various data like the MAC address. Usually the firmware has exclusive
1562 * access to the eeprom, but during device initialization (before the
1563 * device driver has sent the HostComplete command to the firmware) the
1564 * device driver has read access to the EEPROM by way of indirect addressing
1565 * through a couple of memory mapped registers.
1566 *
1567 * The following is a simplified implementation for pulling data out of the
1568 * the eeprom, along with some helper functions to find information in
1569 * the per device private data's copy of the eeprom.
1570 *
1571 * NOTE: To better understand how these functions work (i.e what is a chip
1572 * select and why do have to keep driving the eeprom clock?), read
1573 * just about any data sheet for a Microwire compatible EEPROM.
1574 */
1575
1576/* write a 32 bit value into the indirect accessor register */
1577static inline void eeprom_write_reg(struct ipw_priv *p, u32 data)
1578{
1579 ipw_write_reg32(p, FW_MEM_REG_EEPROM_ACCESS, data);
1580
1581 /* the eeprom requires some time to complete the operation */
1582 udelay(p->eeprom_delay);
1583
1584 return;
1585}
1586
1587/* perform a chip select operation */
1588static inline void eeprom_cs(struct ipw_priv* priv)
1589{
1590 eeprom_write_reg(priv,0);
1591 eeprom_write_reg(priv,EEPROM_BIT_CS);
1592 eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK);
1593 eeprom_write_reg(priv,EEPROM_BIT_CS);
1594}
1595
1596/* perform a chip select operation */
1597static inline void eeprom_disable_cs(struct ipw_priv* priv)
1598{
1599 eeprom_write_reg(priv,EEPROM_BIT_CS);
1600 eeprom_write_reg(priv,0);
1601 eeprom_write_reg(priv,EEPROM_BIT_SK);
1602}
1603
1604/* push a single bit down to the eeprom */
1605static inline void eeprom_write_bit(struct ipw_priv *p,u8 bit)
1606{
1607 int d = ( bit ? EEPROM_BIT_DI : 0);
1608 eeprom_write_reg(p,EEPROM_BIT_CS|d);
1609 eeprom_write_reg(p,EEPROM_BIT_CS|d|EEPROM_BIT_SK);
1610}
1611
1612/* push an opcode followed by an address down to the eeprom */
1613static void eeprom_op(struct ipw_priv* priv, u8 op, u8 addr)
1614{
1615 int i;
1616
1617 eeprom_cs(priv);
1618 eeprom_write_bit(priv,1);
1619 eeprom_write_bit(priv,op&2);
1620 eeprom_write_bit(priv,op&1);
1621 for ( i=7; i>=0; i-- ) {
1622 eeprom_write_bit(priv,addr&(1<<i));
1623 }
1624}
1625
1626/* pull 16 bits off the eeprom, one bit at a time */
1627static u16 eeprom_read_u16(struct ipw_priv* priv, u8 addr)
1628{
1629 int i;
1630 u16 r=0;
1631
1632 /* Send READ Opcode */
1633 eeprom_op(priv,EEPROM_CMD_READ,addr);
1634
1635 /* Send dummy bit */
1636 eeprom_write_reg(priv,EEPROM_BIT_CS);
1637
1638 /* Read the byte off the eeprom one bit at a time */
1639 for ( i=0; i<16; i++ ) {
1640 u32 data = 0;
1641 eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK);
1642 eeprom_write_reg(priv,EEPROM_BIT_CS);
1643 data = ipw_read_reg32(priv,FW_MEM_REG_EEPROM_ACCESS);
1644 r = (r<<1) | ((data & EEPROM_BIT_DO)?1:0);
1645 }
1646
1647 /* Send another dummy bit */
1648 eeprom_write_reg(priv,0);
1649 eeprom_disable_cs(priv);
1650
1651 return r;
1652}
1653
1654/* helper function for pulling the mac address out of the private */
1655/* data's copy of the eeprom data */
1656static void eeprom_parse_mac(struct ipw_priv* priv, u8* mac)
1657{
1658 u8* ee = (u8*)priv->eeprom;
1659 memcpy(mac, &ee[EEPROM_MAC_ADDRESS], 6);
1660}
1661
1662/*
1663 * Either the device driver (i.e. the host) or the firmware can
1664 * load eeprom data into the designated region in SRAM. If neither
1665 * happens then the FW will shutdown with a fatal error.
1666 *
1667 * In order to signal the FW to load the EEPROM, the EEPROM_LOAD_DISABLE
1668 * bit needs region of shared SRAM needs to be non-zero.
1669 */
1670static void ipw_eeprom_init_sram(struct ipw_priv *priv)
1671{
1672 int i;
1673 u16 *eeprom = (u16 *)priv->eeprom;
1674
1675 IPW_DEBUG_TRACE(">>\n");
1676
1677 /* read entire contents of eeprom into private buffer */
1678 for ( i=0; i<128; i++ )
1679 eeprom[i] = eeprom_read_u16(priv,(u8)i);
1680
1681 /*
1682 If the data looks correct, then copy it to our private
1683 copy. Otherwise let the firmware know to perform the operation
1684 on it's own
1685 */
1686 if ((priv->eeprom + EEPROM_VERSION) != 0) {
1687 IPW_DEBUG_INFO("Writing EEPROM data into SRAM\n");
1688
1689 /* write the eeprom data to sram */
1690 for( i=0; i<CX2_EEPROM_IMAGE_SIZE; i++ )
1691 ipw_write8(priv, IPW_EEPROM_DATA + i,
1692 priv->eeprom[i]);
1693
1694 /* Do not load eeprom data on fatal error or suspend */
1695 ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0);
1696 } else {
1697 IPW_DEBUG_INFO("Enabling FW initializationg of SRAM\n");
1698
1699 /* Load eeprom data on fatal error or suspend */
1700 ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 1);
1701 }
1702
1703 IPW_DEBUG_TRACE("<<\n");
1704}
1705
1706
1707static inline void ipw_zero_memory(struct ipw_priv *priv, u32 start, u32 count)
1708{
1709 count >>= 2;
1710 if (!count) return;
1711 _ipw_write32(priv, CX2_AUTOINC_ADDR, start);
1712 while (count--)
1713 _ipw_write32(priv, CX2_AUTOINC_DATA, 0);
1714}
1715
1716static inline void ipw_fw_dma_reset_command_blocks(struct ipw_priv *priv)
1717{
1718 ipw_zero_memory(priv, CX2_SHARED_SRAM_DMA_CONTROL,
1719 CB_NUMBER_OF_ELEMENTS_SMALL *
1720 sizeof(struct command_block));
1721}
1722
1723static int ipw_fw_dma_enable(struct ipw_priv *priv)
1724{ /* start dma engine but no transfers yet*/
1725
1726 IPW_DEBUG_FW(">> : \n");
1727
1728 /* Start the dma */
1729 ipw_fw_dma_reset_command_blocks(priv);
1730
1731 /* Write CB base address */
1732 ipw_write_reg32(priv, CX2_DMA_I_CB_BASE, CX2_SHARED_SRAM_DMA_CONTROL);
1733
1734 IPW_DEBUG_FW("<< : \n");
1735 return 0;
1736}
1737
1738static void ipw_fw_dma_abort(struct ipw_priv *priv)
1739{
1740 u32 control = 0;
1741
1742 IPW_DEBUG_FW(">> :\n");
1743
1744 //set the Stop and Abort bit
1745 control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_STOP_AND_ABORT;
1746 ipw_write_reg32(priv, CX2_DMA_I_DMA_CONTROL, control);
1747 priv->sram_desc.last_cb_index = 0;
1748
1749 IPW_DEBUG_FW("<< \n");
1750}
1751
1752static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, struct command_block *cb)
1753{
1754 u32 address = CX2_SHARED_SRAM_DMA_CONTROL + (sizeof(struct command_block) * index);
1755 IPW_DEBUG_FW(">> :\n");
1756
1757 ipw_write_indirect(priv, address, (u8*)cb, (int)sizeof(struct command_block));
1758
1759 IPW_DEBUG_FW("<< :\n");
1760 return 0;
1761
1762}
1763
1764static int ipw_fw_dma_kick(struct ipw_priv *priv)
1765{
1766 u32 control = 0;
1767 u32 index=0;
1768
1769 IPW_DEBUG_FW(">> :\n");
1770
1771 for (index = 0; index < priv->sram_desc.last_cb_index; index++)
1772 ipw_fw_dma_write_command_block(priv, index, &priv->sram_desc.cb_list[index]);
1773
1774 /* Enable the DMA in the CSR register */
1775 ipw_clear_bit(priv, CX2_RESET_REG,CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER);
1776
1777 /* Set the Start bit. */
1778 control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_START;
1779 ipw_write_reg32(priv, CX2_DMA_I_DMA_CONTROL, control);
1780
1781 IPW_DEBUG_FW("<< :\n");
1782 return 0;
1783}
1784
1785static void ipw_fw_dma_dump_command_block(struct ipw_priv *priv)
1786{
1787 u32 address;
1788 u32 register_value=0;
1789 u32 cb_fields_address=0;
1790
1791 IPW_DEBUG_FW(">> :\n");
1792 address = ipw_read_reg32(priv,CX2_DMA_I_CURRENT_CB);
1793 IPW_DEBUG_FW_INFO("Current CB is 0x%x \n",address);
1794
1795 /* Read the DMA Controlor register */
1796 register_value = ipw_read_reg32(priv, CX2_DMA_I_DMA_CONTROL);
1797 IPW_DEBUG_FW_INFO("CX2_DMA_I_DMA_CONTROL is 0x%x \n",register_value);
1798
1799 /* Print the CB values*/
1800 cb_fields_address = address;
1801 register_value = ipw_read_reg32(priv, cb_fields_address);
1802 IPW_DEBUG_FW_INFO("Current CB ControlField is 0x%x \n",register_value);
1803
1804 cb_fields_address += sizeof(u32);
1805 register_value = ipw_read_reg32(priv, cb_fields_address);
1806 IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x \n",register_value);
1807
1808 cb_fields_address += sizeof(u32);
1809 register_value = ipw_read_reg32(priv, cb_fields_address);
1810 IPW_DEBUG_FW_INFO("Current CB Destination Field is 0x%x \n",
1811 register_value);
1812
1813 cb_fields_address += sizeof(u32);
1814 register_value = ipw_read_reg32(priv, cb_fields_address);
1815 IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x \n",register_value);
1816
1817 IPW_DEBUG_FW(">> :\n");
1818}
1819
1820static int ipw_fw_dma_command_block_index(struct ipw_priv *priv)
1821{
1822 u32 current_cb_address = 0;
1823 u32 current_cb_index = 0;
1824
1825 IPW_DEBUG_FW("<< :\n");
1826 current_cb_address= ipw_read_reg32(priv, CX2_DMA_I_CURRENT_CB);
1827
1828 current_cb_index = (current_cb_address - CX2_SHARED_SRAM_DMA_CONTROL )/
1829 sizeof (struct command_block);
1830
1831 IPW_DEBUG_FW_INFO("Current CB index 0x%x address = 0x%X \n",
1832 current_cb_index, current_cb_address );
1833
1834 IPW_DEBUG_FW(">> :\n");
1835 return current_cb_index;
1836
1837}
1838
1839static int ipw_fw_dma_add_command_block(struct ipw_priv *priv,
1840 u32 src_address,
1841 u32 dest_address,
1842 u32 length,
1843 int interrupt_enabled,
1844 int is_last)
1845{
1846
1847 u32 control = CB_VALID | CB_SRC_LE | CB_DEST_LE | CB_SRC_AUTOINC |
1848 CB_SRC_IO_GATED | CB_DEST_AUTOINC | CB_SRC_SIZE_LONG |
1849 CB_DEST_SIZE_LONG;
1850 struct command_block *cb;
1851 u32 last_cb_element=0;
1852
1853 IPW_DEBUG_FW_INFO("src_address=0x%x dest_address=0x%x length=0x%x\n",
1854 src_address, dest_address, length);
1855
1856 if (priv->sram_desc.last_cb_index >= CB_NUMBER_OF_ELEMENTS_SMALL)
1857 return -1;
1858
1859 last_cb_element = priv->sram_desc.last_cb_index;
1860 cb = &priv->sram_desc.cb_list[last_cb_element];
1861 priv->sram_desc.last_cb_index++;
1862
1863 /* Calculate the new CB control word */
1864 if (interrupt_enabled )
1865 control |= CB_INT_ENABLED;
1866
1867 if (is_last)
1868 control |= CB_LAST_VALID;
1869
1870 control |= length;
1871
1872 /* Calculate the CB Element's checksum value */
1873 cb->status = control ^src_address ^dest_address;
1874
1875 /* Copy the Source and Destination addresses */
1876 cb->dest_addr = dest_address;
1877 cb->source_addr = src_address;
1878
1879 /* Copy the Control Word last */
1880 cb->control = control;
1881
1882 return 0;
1883}
1884
1885static int ipw_fw_dma_add_buffer(struct ipw_priv *priv,
1886 u32 src_phys,
1887 u32 dest_address,
1888 u32 length)
1889{
1890 u32 bytes_left = length;
1891 u32 src_offset=0;
1892 u32 dest_offset=0;
1893 int status = 0;
1894 IPW_DEBUG_FW(">> \n");
1895 IPW_DEBUG_FW_INFO("src_phys=0x%x dest_address=0x%x length=0x%x\n",
1896 src_phys, dest_address, length);
1897 while (bytes_left > CB_MAX_LENGTH) {
1898 status = ipw_fw_dma_add_command_block( priv,
1899 src_phys + src_offset,
1900 dest_address + dest_offset,
1901 CB_MAX_LENGTH, 0, 0);
1902 if (status) {
1903 IPW_DEBUG_FW_INFO(": Failed\n");
1904 return -1;
1905 } else
1906 IPW_DEBUG_FW_INFO(": Added new cb\n");
1907
1908 src_offset += CB_MAX_LENGTH;
1909 dest_offset += CB_MAX_LENGTH;
1910 bytes_left -= CB_MAX_LENGTH;
1911 }
1912
1913 /* add the buffer tail */
1914 if (bytes_left > 0) {
1915 status = ipw_fw_dma_add_command_block(
1916 priv, src_phys + src_offset,
1917 dest_address + dest_offset,
1918 bytes_left, 0, 0);
1919 if (status) {
1920 IPW_DEBUG_FW_INFO(": Failed on the buffer tail\n");
1921 return -1;
1922 } else
1923 IPW_DEBUG_FW_INFO(": Adding new cb - the buffer tail\n");
1924 }
1925
1926
1927 IPW_DEBUG_FW("<< \n");
1928 return 0;
1929}
1930
1931static int ipw_fw_dma_wait(struct ipw_priv *priv)
1932{
1933 u32 current_index = 0;
1934 u32 watchdog = 0;
1935
1936 IPW_DEBUG_FW(">> : \n");
1937
1938 current_index = ipw_fw_dma_command_block_index(priv);
1939 IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%8X\n",
1940 (int) priv->sram_desc.last_cb_index);
1941
1942 while (current_index < priv->sram_desc.last_cb_index) {
1943 udelay(50);
1944 current_index = ipw_fw_dma_command_block_index(priv);
1945
1946 watchdog++;
1947
1948 if (watchdog > 400) {
1949 IPW_DEBUG_FW_INFO("Timeout\n");
1950 ipw_fw_dma_dump_command_block(priv);
1951 ipw_fw_dma_abort(priv);
1952 return -1;
1953 }
1954 }
1955
1956 ipw_fw_dma_abort(priv);
1957
1958 /*Disable the DMA in the CSR register*/
1959 ipw_set_bit(priv, CX2_RESET_REG,
1960 CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER);
1961
1962 IPW_DEBUG_FW("<< dmaWaitSync \n");
1963 return 0;
1964}
1965
1966static void ipw_remove_current_network(struct ipw_priv *priv)
1967{
1968 struct list_head *element, *safe;
1969 struct ieee80211_network *network = NULL;
1970 list_for_each_safe(element, safe, &priv->ieee->network_list) {
1971 network = list_entry(element, struct ieee80211_network, list);
1972 if (!memcmp(network->bssid, priv->bssid, ETH_ALEN)) {
1973 list_del(element);
1974 list_add_tail(&network->list,
1975 &priv->ieee->network_free_list);
1976 }
1977 }
1978}
1979
1980/**
1981 * Check that card is still alive.
1982 * Reads debug register from domain0.
1983 * If card is present, pre-defined value should
1984 * be found there.
1985 *
1986 * @param priv
1987 * @return 1 if card is present, 0 otherwise
1988 */
1989static inline int ipw_alive(struct ipw_priv *priv)
1990{
1991 return ipw_read32(priv, 0x90) == 0xd55555d5;
1992}
1993
1994static inline int ipw_poll_bit(struct ipw_priv *priv, u32 addr, u32 mask,
1995 int timeout)
1996{
1997 int i = 0;
1998
1999 do {
2000 if ((ipw_read32(priv, addr) & mask) == mask)
2001 return i;
2002 mdelay(10);
2003 i += 10;
2004 } while (i < timeout);
2005
2006 return -ETIME;
2007}
2008
2009/* These functions load the firmware and micro code for the operation of
2010 * the ipw hardware. It assumes the buffer has all the bits for the
2011 * image and the caller is handling the memory allocation and clean up.
2012 */
2013
2014
2015static int ipw_stop_master(struct ipw_priv * priv)
2016{
2017 int rc;
2018
2019 IPW_DEBUG_TRACE(">> \n");
2020 /* stop master. typical delay - 0 */
2021 ipw_set_bit(priv, CX2_RESET_REG, CX2_RESET_REG_STOP_MASTER);
2022
2023 rc = ipw_poll_bit(priv, CX2_RESET_REG,
2024 CX2_RESET_REG_MASTER_DISABLED, 100);
2025 if (rc < 0) {
2026 IPW_ERROR("stop master failed in 10ms\n");
2027 return -1;
2028 }
2029
2030 IPW_DEBUG_INFO("stop master %dms\n", rc);
2031
2032 return rc;
2033}
2034
2035static void ipw_arc_release(struct ipw_priv *priv)
2036{
2037 IPW_DEBUG_TRACE(">> \n");
2038 mdelay(5);
2039
2040 ipw_clear_bit(priv, CX2_RESET_REG, CBD_RESET_REG_PRINCETON_RESET);
2041
2042 /* no one knows timing, for safety add some delay */
2043 mdelay(5);
2044}
2045
2046struct fw_header {
2047 u32 version;
2048 u32 mode;
2049};
2050
2051struct fw_chunk {
2052 u32 address;
2053 u32 length;
2054};
2055
2056#define IPW_FW_MAJOR_VERSION 2
2057#define IPW_FW_MINOR_VERSION 2
2058
2059#define IPW_FW_MINOR(x) ((x & 0xff) >> 8)
2060#define IPW_FW_MAJOR(x) (x & 0xff)
2061
2062#define IPW_FW_VERSION ((IPW_FW_MINOR_VERSION << 8) | \
2063 IPW_FW_MAJOR_VERSION)
2064
2065#define IPW_FW_PREFIX "ipw-" __stringify(IPW_FW_MAJOR_VERSION) \
2066"." __stringify(IPW_FW_MINOR_VERSION) "-"
2067
2068#if IPW_FW_MAJOR_VERSION >= 2 && IPW_FW_MINOR_VERSION > 0
2069#define IPW_FW_NAME(x) IPW_FW_PREFIX "" x ".fw"
2070#else
2071#define IPW_FW_NAME(x) "ipw2200_" x ".fw"
2072#endif
2073
2074static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
2075 size_t len)
2076{
2077 int rc = 0, i, addr;
2078 u8 cr = 0;
2079 u16 *image;
2080
2081 image = (u16 *)data;
2082
2083 IPW_DEBUG_TRACE(">> \n");
2084
2085 rc = ipw_stop_master(priv);
2086
2087 if (rc < 0)
2088 return rc;
2089
2090// spin_lock_irqsave(&priv->lock, flags);
2091
2092 for (addr = CX2_SHARED_LOWER_BOUND;
2093 addr < CX2_REGISTER_DOMAIN1_END; addr += 4) {
2094 ipw_write32(priv, addr, 0);
2095 }
2096
2097 /* no ucode (yet) */
2098 memset(&priv->dino_alive, 0, sizeof(priv->dino_alive));
2099 /* destroy DMA queues */
2100 /* reset sequence */
2101
2102 ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET ,CX2_BIT_HALT_RESET_ON);
2103 ipw_arc_release(priv);
2104 ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET, CX2_BIT_HALT_RESET_OFF);
2105 mdelay(1);
2106
2107 /* reset PHY */
2108 ipw_write_reg32(priv, CX2_INTERNAL_CMD_EVENT, CX2_BASEBAND_POWER_DOWN);
2109 mdelay(1);
2110
2111 ipw_write_reg32(priv, CX2_INTERNAL_CMD_EVENT, 0);
2112 mdelay(1);
2113
2114 /* enable ucode store */
2115 ipw_write_reg8(priv, DINO_CONTROL_REG, 0x0);
2116 ipw_write_reg8(priv, DINO_CONTROL_REG, DINO_ENABLE_CS);
2117 mdelay(1);
2118
2119 /* write ucode */
2120 /**
2121 * @bug
2122 * Do NOT set indirect address register once and then
2123 * store data to indirect data register in the loop.
2124 * It seems very reasonable, but in this case DINO do not
2125 * accept ucode. It is essential to set address each time.
2126 */
2127 /* load new ipw uCode */
2128 for (i = 0; i < len / 2; i++)
2129 ipw_write_reg16(priv, CX2_BASEBAND_CONTROL_STORE, image[i]);
2130
2131
2132 /* enable DINO */
2133 ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, 0);
2134 ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS,
2135 DINO_ENABLE_SYSTEM );
2136
2137 /* this is where the igx / win driver deveates from the VAP driver.*/
2138
2139 /* wait for alive response */
2140 for (i = 0; i < 100; i++) {
2141 /* poll for incoming data */
2142 cr = ipw_read_reg8(priv, CX2_BASEBAND_CONTROL_STATUS);
2143 if (cr & DINO_RXFIFO_DATA)
2144 break;
2145 mdelay(1);
2146 }
2147
2148 if (cr & DINO_RXFIFO_DATA) {
2149 /* alive_command_responce size is NOT multiple of 4 */
2150 u32 response_buffer[(sizeof(priv->dino_alive) + 3) / 4];
2151
2152 for (i = 0; i < ARRAY_SIZE(response_buffer); i++)
2153 response_buffer[i] =
2154 ipw_read_reg32(priv,
2155 CX2_BASEBAND_RX_FIFO_READ);
2156 memcpy(&priv->dino_alive, response_buffer,
2157 sizeof(priv->dino_alive));
2158 if (priv->dino_alive.alive_command == 1
2159 && priv->dino_alive.ucode_valid == 1) {
2160 rc = 0;
2161 IPW_DEBUG_INFO(
2162 "Microcode OK, rev. %d (0x%x) dev. %d (0x%x) "
2163 "of %02d/%02d/%02d %02d:%02d\n",
2164 priv->dino_alive.software_revision,
2165 priv->dino_alive.software_revision,
2166 priv->dino_alive.device_identifier,
2167 priv->dino_alive.device_identifier,
2168 priv->dino_alive.time_stamp[0],
2169 priv->dino_alive.time_stamp[1],
2170 priv->dino_alive.time_stamp[2],
2171 priv->dino_alive.time_stamp[3],
2172 priv->dino_alive.time_stamp[4]);
2173 } else {
2174 IPW_DEBUG_INFO("Microcode is not alive\n");
2175 rc = -EINVAL;
2176 }
2177 } else {
2178 IPW_DEBUG_INFO("No alive response from DINO\n");
2179 rc = -ETIME;
2180 }
2181
2182 /* disable DINO, otherwise for some reason
2183 firmware have problem getting alive resp. */
2184 ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, 0);
2185
2186// spin_unlock_irqrestore(&priv->lock, flags);
2187
2188 return rc;
2189}
2190
2191static int ipw_load_firmware(struct ipw_priv *priv, u8 * data,
2192 size_t len)
2193{
2194 int rc = -1;
2195 int offset = 0;
2196 struct fw_chunk *chunk;
2197 dma_addr_t shared_phys;
2198 u8 *shared_virt;
2199
2200 IPW_DEBUG_TRACE("<< : \n");
2201 shared_virt = pci_alloc_consistent(priv->pci_dev, len, &shared_phys);
2202
2203 if (!shared_virt)
2204 return -ENOMEM;
2205
2206 memmove(shared_virt, data, len);
2207
2208 /* Start the Dma */
2209 rc = ipw_fw_dma_enable(priv);
2210
2211 if (priv->sram_desc.last_cb_index > 0) {
2212 /* the DMA is already ready this would be a bug. */
2213 BUG();
2214 goto out;
2215 }
2216
2217 do {
2218 chunk = (struct fw_chunk *)(data + offset);
2219 offset += sizeof(struct fw_chunk);
2220 /* build DMA packet and queue up for sending */
2221 /* dma to chunk->address, the chunk->length bytes from data +
2222 * offeset*/
2223 /* Dma loading */
2224 rc = ipw_fw_dma_add_buffer(priv, shared_phys + offset,
2225 chunk->address, chunk->length);
2226 if (rc) {
2227 IPW_DEBUG_INFO("dmaAddBuffer Failed\n");
2228 goto out;
2229 }
2230
2231 offset += chunk->length;
2232 } while (offset < len);
2233
2234 /* Run the DMA and wait for the answer*/
2235 rc = ipw_fw_dma_kick(priv);
2236 if (rc) {
2237 IPW_ERROR("dmaKick Failed\n");
2238 goto out;
2239 }
2240
2241 rc = ipw_fw_dma_wait(priv);
2242 if (rc) {
2243 IPW_ERROR("dmaWaitSync Failed\n");
2244 goto out;
2245 }
2246 out:
2247 pci_free_consistent( priv->pci_dev, len, shared_virt, shared_phys);
2248 return rc;
2249}
2250
2251/* stop nic */
2252static int ipw_stop_nic(struct ipw_priv *priv)
2253{
2254 int rc = 0;
2255
2256 /* stop*/
2257 ipw_write32(priv, CX2_RESET_REG, CX2_RESET_REG_STOP_MASTER);
2258
2259 rc = ipw_poll_bit(priv, CX2_RESET_REG,
2260 CX2_RESET_REG_MASTER_DISABLED, 500);
2261 if (rc < 0) {
2262 IPW_ERROR("wait for reg master disabled failed\n");
2263 return rc;
2264 }
2265
2266 ipw_set_bit(priv, CX2_RESET_REG, CBD_RESET_REG_PRINCETON_RESET);
2267
2268 return rc;
2269}
2270
2271static void ipw_start_nic(struct ipw_priv *priv)
2272{
2273 IPW_DEBUG_TRACE(">>\n");
2274
2275 /* prvHwStartNic release ARC*/
2276 ipw_clear_bit(priv, CX2_RESET_REG,
2277 CX2_RESET_REG_MASTER_DISABLED |
2278 CX2_RESET_REG_STOP_MASTER |
2279 CBD_RESET_REG_PRINCETON_RESET);
2280
2281 /* enable power management */
2282 ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY);
2283
2284 IPW_DEBUG_TRACE("<<\n");
2285}
2286
2287static int ipw_init_nic(struct ipw_priv *priv)
2288{
2289 int rc;
2290
2291 IPW_DEBUG_TRACE(">>\n");
2292 /* reset */
2293 /*prvHwInitNic */
2294 /* set "initialization complete" bit to move adapter to D0 state */
2295 ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_INIT_DONE);
2296
2297 /* low-level PLL activation */
2298 ipw_write32(priv, CX2_READ_INT_REGISTER, CX2_BIT_INT_HOST_SRAM_READ_INT_REGISTER);
2299
2300 /* wait for clock stabilization */
2301 rc = ipw_poll_bit(priv, CX2_GP_CNTRL_RW,
2302 CX2_GP_CNTRL_BIT_CLOCK_READY, 250);
2303 if (rc < 0 )
2304 IPW_DEBUG_INFO("FAILED wait for clock stablization\n");
2305
2306 /* assert SW reset */
2307 ipw_set_bit(priv, CX2_RESET_REG, CX2_RESET_REG_SW_RESET);
2308
2309 udelay(10);
2310
2311 /* set "initialization complete" bit to move adapter to D0 state */
2312 ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_INIT_DONE);
2313
2314 IPW_DEBUG_TRACE(">>\n");
2315 return 0;
2316}
2317
2318
2319/* Call this function from process context, it will sleep in request_firmware.
2320 * Probe is an ok place to call this from.
2321 */
2322static int ipw_reset_nic(struct ipw_priv *priv)
2323{
2324 int rc = 0;
2325
2326 IPW_DEBUG_TRACE(">>\n");
2327
2328 rc = ipw_init_nic(priv);
2329
2330 /* Clear the 'host command active' bit... */
2331 priv->status &= ~STATUS_HCMD_ACTIVE;
2332 wake_up_interruptible(&priv->wait_command_queue);
2333
2334 IPW_DEBUG_TRACE("<<\n");
2335 return rc;
2336}
2337
2338static int ipw_get_fw(struct ipw_priv *priv,
2339 const struct firmware **fw, const char *name)
2340{
2341 struct fw_header *header;
2342 int rc;
2343
2344 /* ask firmware_class module to get the boot firmware off disk */
2345 rc = request_firmware(fw, name, &priv->pci_dev->dev);
2346 if (rc < 0) {
2347 IPW_ERROR("%s load failed: Reason %d\n", name, rc);
2348 return rc;
2349 }
2350
2351 header = (struct fw_header *)(*fw)->data;
2352 if (IPW_FW_MAJOR(header->version) != IPW_FW_MAJOR_VERSION) {
2353 IPW_ERROR("'%s' firmware version not compatible (%d != %d)\n",
2354 name,
2355 IPW_FW_MAJOR(header->version), IPW_FW_MAJOR_VERSION);
2356 return -EINVAL;
2357 }
2358
2359 IPW_DEBUG_INFO("Loading firmware '%s' file v%d.%d (%zd bytes)\n",
2360 name,
2361 IPW_FW_MAJOR(header->version),
2362 IPW_FW_MINOR(header->version),
2363 (*fw)->size - sizeof(struct fw_header));
2364 return 0;
2365}
2366
2367#define CX2_RX_BUF_SIZE (3000)
2368
2369static inline void ipw_rx_queue_reset(struct ipw_priv *priv,
2370 struct ipw_rx_queue *rxq)
2371{
2372 unsigned long flags;
2373 int i;
2374
2375 spin_lock_irqsave(&rxq->lock, flags);
2376
2377 INIT_LIST_HEAD(&rxq->rx_free);
2378 INIT_LIST_HEAD(&rxq->rx_used);
2379
2380 /* Fill the rx_used queue with _all_ of the Rx buffers */
2381 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
2382 /* In the reset function, these buffers may have been allocated
2383 * to an SKB, so we need to unmap and free potential storage */
2384 if (rxq->pool[i].skb != NULL) {
2385 pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr,
2386 CX2_RX_BUF_SIZE,
2387 PCI_DMA_FROMDEVICE);
2388 dev_kfree_skb(rxq->pool[i].skb);
2389 }
2390 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2391 }
2392
2393 /* Set us so that we have processed and used all buffers, but have
2394 * not restocked the Rx queue with fresh buffers */
2395 rxq->read = rxq->write = 0;
2396 rxq->processed = RX_QUEUE_SIZE - 1;
2397 rxq->free_count = 0;
2398 spin_unlock_irqrestore(&rxq->lock, flags);
2399}
2400
2401#ifdef CONFIG_PM
2402static int fw_loaded = 0;
2403static const struct firmware *bootfw = NULL;
2404static const struct firmware *firmware = NULL;
2405static const struct firmware *ucode = NULL;
2406#endif
2407
2408static int ipw_load(struct ipw_priv *priv)
2409{
2410#ifndef CONFIG_PM
2411 const struct firmware *bootfw = NULL;
2412 const struct firmware *firmware = NULL;
2413 const struct firmware *ucode = NULL;
2414#endif
2415 int rc = 0, retries = 3;
2416
2417#ifdef CONFIG_PM
2418 if (!fw_loaded) {
2419#endif
2420 rc = ipw_get_fw(priv, &bootfw, IPW_FW_NAME("boot"));
2421 if (rc)
2422 goto error;
2423
2424 switch (priv->ieee->iw_mode) {
2425 case IW_MODE_ADHOC:
2426 rc = ipw_get_fw(priv, &ucode,
2427 IPW_FW_NAME("ibss_ucode"));
2428 if (rc)
2429 goto error;
2430
2431 rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("ibss"));
2432 break;
2433
2434#ifdef CONFIG_IPW_PROMISC
2435 case IW_MODE_MONITOR:
2436 rc = ipw_get_fw(priv, &ucode,
2437 IPW_FW_NAME("ibss_ucode"));
2438 if (rc)
2439 goto error;
2440
2441 rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("sniffer"));
2442 break;
2443#endif
2444 case IW_MODE_INFRA:
2445 rc = ipw_get_fw(priv, &ucode,
2446 IPW_FW_NAME("bss_ucode"));
2447 if (rc)
2448 goto error;
2449
2450 rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("bss"));
2451 break;
2452
2453 default:
2454 rc = -EINVAL;
2455 }
2456
2457 if (rc)
2458 goto error;
2459
2460#ifdef CONFIG_PM
2461 fw_loaded = 1;
2462 }
2463#endif
2464
2465 if (!priv->rxq)
2466 priv->rxq = ipw_rx_queue_alloc(priv);
2467 else
2468 ipw_rx_queue_reset(priv, priv->rxq);
2469 if (!priv->rxq) {
2470 IPW_ERROR("Unable to initialize Rx queue\n");
2471 goto error;
2472 }
2473
2474 retry:
2475 /* Ensure interrupts are disabled */
2476 ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL);
2477 priv->status &= ~STATUS_INT_ENABLED;
2478
2479 /* ack pending interrupts */
2480 ipw_write32(priv, CX2_INTA_RW, CX2_INTA_MASK_ALL);
2481
2482 ipw_stop_nic(priv);
2483
2484 rc = ipw_reset_nic(priv);
2485 if (rc) {
2486 IPW_ERROR("Unable to reset NIC\n");
2487 goto error;
2488 }
2489
2490 ipw_zero_memory(priv, CX2_NIC_SRAM_LOWER_BOUND,
2491 CX2_NIC_SRAM_UPPER_BOUND - CX2_NIC_SRAM_LOWER_BOUND);
2492
2493 /* DMA the initial boot firmware into the device */
2494 rc = ipw_load_firmware(priv, bootfw->data + sizeof(struct fw_header),
2495 bootfw->size - sizeof(struct fw_header));
2496 if (rc < 0) {
2497 IPW_ERROR("Unable to load boot firmware\n");
2498 goto error;
2499 }
2500
2501 /* kick start the device */
2502 ipw_start_nic(priv);
2503
2504 /* wait for the device to finish it's initial startup sequence */
2505 rc = ipw_poll_bit(priv, CX2_INTA_RW,
2506 CX2_INTA_BIT_FW_INITIALIZATION_DONE, 500);
2507 if (rc < 0) {
2508 IPW_ERROR("device failed to boot initial fw image\n");
2509 goto error;
2510 }
2511 IPW_DEBUG_INFO("initial device response after %dms\n", rc);
2512
2513 /* ack fw init done interrupt */
2514 ipw_write32(priv, CX2_INTA_RW, CX2_INTA_BIT_FW_INITIALIZATION_DONE);
2515
2516 /* DMA the ucode into the device */
2517 rc = ipw_load_ucode(priv, ucode->data + sizeof(struct fw_header),
2518 ucode->size - sizeof(struct fw_header));
2519 if (rc < 0) {
2520 IPW_ERROR("Unable to load ucode\n");
2521 goto error;
2522 }
2523
2524 /* stop nic */
2525 ipw_stop_nic(priv);
2526
2527 /* DMA bss firmware into the device */
2528 rc = ipw_load_firmware(priv, firmware->data +
2529 sizeof(struct fw_header),
2530 firmware->size - sizeof(struct fw_header));
2531 if (rc < 0 ) {
2532 IPW_ERROR("Unable to load firmware\n");
2533 goto error;
2534 }
2535
2536 ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0);
2537
2538 rc = ipw_queue_reset(priv);
2539 if (rc) {
2540 IPW_ERROR("Unable to initialize queues\n");
2541 goto error;
2542 }
2543
2544 /* Ensure interrupts are disabled */
2545 ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL);
2546
2547 /* kick start the device */
2548 ipw_start_nic(priv);
2549
2550 if (ipw_read32(priv, CX2_INTA_RW) & CX2_INTA_BIT_PARITY_ERROR) {
2551 if (retries > 0) {
2552 IPW_WARNING("Parity error. Retrying init.\n");
2553 retries--;
2554 goto retry;
2555 }
2556
2557 IPW_ERROR("TODO: Handle parity error -- schedule restart?\n");
2558 rc = -EIO;
2559 goto error;
2560 }
2561
2562 /* wait for the device */
2563 rc = ipw_poll_bit(priv, CX2_INTA_RW,
2564 CX2_INTA_BIT_FW_INITIALIZATION_DONE, 500);
2565 if (rc < 0) {
2566 IPW_ERROR("device failed to start after 500ms\n");
2567 goto error;
2568 }
2569 IPW_DEBUG_INFO("device response after %dms\n", rc);
2570
2571 /* ack fw init done interrupt */
2572 ipw_write32(priv, CX2_INTA_RW, CX2_INTA_BIT_FW_INITIALIZATION_DONE);
2573
2574 /* read eeprom data and initialize the eeprom region of sram */
2575 priv->eeprom_delay = 1;
2576 ipw_eeprom_init_sram(priv);
2577
2578 /* enable interrupts */
2579 ipw_enable_interrupts(priv);
2580
2581 /* Ensure our queue has valid packets */
2582 ipw_rx_queue_replenish(priv);
2583
2584 ipw_write32(priv, CX2_RX_READ_INDEX, priv->rxq->read);
2585
2586 /* ack pending interrupts */
2587 ipw_write32(priv, CX2_INTA_RW, CX2_INTA_MASK_ALL);
2588
2589#ifndef CONFIG_PM
2590 release_firmware(bootfw);
2591 release_firmware(ucode);
2592 release_firmware(firmware);
2593#endif
2594 return 0;
2595
2596 error:
2597 if (priv->rxq) {
2598 ipw_rx_queue_free(priv, priv->rxq);
2599 priv->rxq = NULL;
2600 }
2601 ipw_tx_queue_free(priv);
2602 if (bootfw)
2603 release_firmware(bootfw);
2604 if (ucode)
2605 release_firmware(ucode);
2606 if (firmware)
2607 release_firmware(firmware);
2608#ifdef CONFIG_PM
2609 fw_loaded = 0;
2610 bootfw = ucode = firmware = NULL;
2611#endif
2612
2613 return rc;
2614}
2615
2616/**
2617 * DMA services
2618 *
2619 * Theory of operation
2620 *
2621 * A queue is a circular buffers with 'Read' and 'Write' pointers.
2622 * 2 empty entries always kept in the buffer to protect from overflow.
2623 *
2624 * For Tx queue, there are low mark and high mark limits. If, after queuing
2625 * the packet for Tx, free space become < low mark, Tx queue stopped. When
2626 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2627 * Tx queue resumed.
2628 *
2629 * The IPW operates with six queues, one receive queue in the device's
2630 * sram, one transmit queue for sending commands to the device firmware,
2631 * and four transmit queues for data.
2632 *
2633 * The four transmit queues allow for performing quality of service (qos)
2634 * transmissions as per the 802.11 protocol. Currently Linux does not
2635 * provide a mechanism to the user for utilizing prioritized queues, so
2636 * we only utilize the first data transmit queue (queue1).
2637 */
2638
2639/**
2640 * Driver allocates buffers of this size for Rx
2641 */
2642
2643static inline int ipw_queue_space(const struct clx2_queue *q)
2644{
2645 int s = q->last_used - q->first_empty;
2646 if (s <= 0)
2647 s += q->n_bd;
2648 s -= 2; /* keep some reserve to not confuse empty and full situations */
2649 if (s < 0)
2650 s = 0;
2651 return s;
2652}
2653
2654static inline int ipw_queue_inc_wrap(int index, int n_bd)
2655{
2656 return (++index == n_bd) ? 0 : index;
2657}
2658
2659/**
2660 * Initialize common DMA queue structure
2661 *
2662 * @param q queue to init
2663 * @param count Number of BD's to allocate. Should be power of 2
2664 * @param read_register Address for 'read' register
2665 * (not offset within BAR, full address)
2666 * @param write_register Address for 'write' register
2667 * (not offset within BAR, full address)
2668 * @param base_register Address for 'base' register
2669 * (not offset within BAR, full address)
2670 * @param size Address for 'size' register
2671 * (not offset within BAR, full address)
2672 */
2673static void ipw_queue_init(struct ipw_priv *priv, struct clx2_queue *q,
2674 int count, u32 read, u32 write,
2675 u32 base, u32 size)
2676{
2677 q->n_bd = count;
2678
2679 q->low_mark = q->n_bd / 4;
2680 if (q->low_mark < 4)
2681 q->low_mark = 4;
2682
2683 q->high_mark = q->n_bd / 8;
2684 if (q->high_mark < 2)
2685 q->high_mark = 2;
2686
2687 q->first_empty = q->last_used = 0;
2688 q->reg_r = read;
2689 q->reg_w = write;
2690
2691 ipw_write32(priv, base, q->dma_addr);
2692 ipw_write32(priv, size, count);
2693 ipw_write32(priv, read, 0);
2694 ipw_write32(priv, write, 0);
2695
2696 _ipw_read32(priv, 0x90);
2697}
2698
2699static int ipw_queue_tx_init(struct ipw_priv *priv,
2700 struct clx2_tx_queue *q,
2701 int count, u32 read, u32 write,
2702 u32 base, u32 size)
2703{
2704 struct pci_dev *dev = priv->pci_dev;
2705
2706 q->txb = kmalloc(sizeof(q->txb[0]) * count, GFP_KERNEL);
2707 if (!q->txb) {
2708 IPW_ERROR("vmalloc for auxilary BD structures failed\n");
2709 return -ENOMEM;
2710 }
2711
2712 q->bd = pci_alloc_consistent(dev,sizeof(q->bd[0])*count, &q->q.dma_addr);
2713 if (!q->bd) {
2714 IPW_ERROR("pci_alloc_consistent(%zd) failed\n",
2715 sizeof(q->bd[0]) * count);
2716 kfree(q->txb);
2717 q->txb = NULL;
2718 return -ENOMEM;
2719 }
2720
2721 ipw_queue_init(priv, &q->q, count, read, write, base, size);
2722 return 0;
2723}
2724
2725/**
2726 * Free one TFD, those at index [txq->q.last_used].
2727 * Do NOT advance any indexes
2728 *
2729 * @param dev
2730 * @param txq
2731 */
2732static void ipw_queue_tx_free_tfd(struct ipw_priv *priv,
2733 struct clx2_tx_queue *txq)
2734{
2735 struct tfd_frame *bd = &txq->bd[txq->q.last_used];
2736 struct pci_dev *dev = priv->pci_dev;
2737 int i;
2738
2739 /* classify bd */
2740 if (bd->control_flags.message_type == TX_HOST_COMMAND_TYPE)
2741 /* nothing to cleanup after for host commands */
2742 return;
2743
2744 /* sanity check */
2745 if (bd->u.data.num_chunks > NUM_TFD_CHUNKS) {
2746 IPW_ERROR("Too many chunks: %i\n", bd->u.data.num_chunks);
2747 /** @todo issue fatal error, it is quite serious situation */
2748 return;
2749 }
2750
2751 /* unmap chunks if any */
2752 for (i = 0; i < bd->u.data.num_chunks; i++) {
2753 pci_unmap_single(dev, bd->u.data.chunk_ptr[i],
2754 bd->u.data.chunk_len[i], PCI_DMA_TODEVICE);
2755 if (txq->txb[txq->q.last_used]) {
2756 ieee80211_txb_free(txq->txb[txq->q.last_used]);
2757 txq->txb[txq->q.last_used] = NULL;
2758 }
2759 }
2760}
2761
2762/**
2763 * Deallocate DMA queue.
2764 *
2765 * Empty queue by removing and destroying all BD's.
2766 * Free all buffers.
2767 *
2768 * @param dev
2769 * @param q
2770 */
2771static void ipw_queue_tx_free(struct ipw_priv *priv,
2772 struct clx2_tx_queue *txq)
2773{
2774 struct clx2_queue *q = &txq->q;
2775 struct pci_dev *dev = priv->pci_dev;
2776
2777 if (q->n_bd == 0)
2778 return;
2779
2780 /* first, empty all BD's */
2781 for (; q->first_empty != q->last_used;
2782 q->last_used = ipw_queue_inc_wrap(q->last_used, q->n_bd)) {
2783 ipw_queue_tx_free_tfd(priv, txq);
2784 }
2785
2786 /* free buffers belonging to queue itself */
2787 pci_free_consistent(dev, sizeof(txq->bd[0])*q->n_bd, txq->bd,
2788 q->dma_addr);
2789 kfree(txq->txb);
2790
2791 /* 0 fill whole structure */
2792 memset(txq, 0, sizeof(*txq));
2793}
2794
2795
2796/**
2797 * Destroy all DMA queues and structures
2798 *
2799 * @param priv
2800 */
2801static void ipw_tx_queue_free(struct ipw_priv *priv)
2802{
2803 /* Tx CMD queue */
2804 ipw_queue_tx_free(priv, &priv->txq_cmd);
2805
2806 /* Tx queues */
2807 ipw_queue_tx_free(priv, &priv->txq[0]);
2808 ipw_queue_tx_free(priv, &priv->txq[1]);
2809 ipw_queue_tx_free(priv, &priv->txq[2]);
2810 ipw_queue_tx_free(priv, &priv->txq[3]);
2811}
2812
2813static void inline __maybe_wake_tx(struct ipw_priv *priv)
2814{
2815 if (netif_running(priv->net_dev)) {
2816 switch (priv->port_type) {
2817 case DCR_TYPE_MU_BSS:
2818 case DCR_TYPE_MU_IBSS:
2819 if (!(priv->status & STATUS_ASSOCIATED)) {
2820 return;
2821 }
2822 }
2823 netif_wake_queue(priv->net_dev);
2824 }
2825
2826}
2827
2828static inline void ipw_create_bssid(struct ipw_priv *priv, u8 *bssid)
2829{
2830 /* First 3 bytes are manufacturer */
2831 bssid[0] = priv->mac_addr[0];
2832 bssid[1] = priv->mac_addr[1];
2833 bssid[2] = priv->mac_addr[2];
2834
2835 /* Last bytes are random */
2836 get_random_bytes(&bssid[3], ETH_ALEN-3);
2837
2838 bssid[0] &= 0xfe; /* clear multicast bit */
2839 bssid[0] |= 0x02; /* set local assignment bit (IEEE802) */
2840}
2841
2842static inline u8 ipw_add_station(struct ipw_priv *priv, u8 *bssid)
2843{
2844 struct ipw_station_entry entry;
2845 int i;
2846
2847 for (i = 0; i < priv->num_stations; i++) {
2848 if (!memcmp(priv->stations[i], bssid, ETH_ALEN)) {
2849 /* Another node is active in network */
2850 priv->missed_adhoc_beacons = 0;
2851 if (!(priv->config & CFG_STATIC_CHANNEL))
2852 /* when other nodes drop out, we drop out */
2853 priv->config &= ~CFG_ADHOC_PERSIST;
2854
2855 return i;
2856 }
2857 }
2858
2859 if (i == MAX_STATIONS)
2860 return IPW_INVALID_STATION;
2861
2862 IPW_DEBUG_SCAN("Adding AdHoc station: " MAC_FMT "\n", MAC_ARG(bssid));
2863
2864 entry.reserved = 0;
2865 entry.support_mode = 0;
2866 memcpy(entry.mac_addr, bssid, ETH_ALEN);
2867 memcpy(priv->stations[i], bssid, ETH_ALEN);
2868 ipw_write_direct(priv, IPW_STATION_TABLE_LOWER + i * sizeof(entry),
2869 &entry,
2870 sizeof(entry));
2871 priv->num_stations++;
2872
2873 return i;
2874}
2875
2876static inline u8 ipw_find_station(struct ipw_priv *priv, u8 *bssid)
2877{
2878 int i;
2879
2880 for (i = 0; i < priv->num_stations; i++)
2881 if (!memcmp(priv->stations[i], bssid, ETH_ALEN))
2882 return i;
2883
2884 return IPW_INVALID_STATION;
2885}
2886
2887static void ipw_send_disassociate(struct ipw_priv *priv, int quiet)
2888{
2889 int err;
2890
2891 if (!(priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED))) {
2892 IPW_DEBUG_ASSOC("Disassociating while not associated.\n");
2893 return;
2894 }
2895
2896 IPW_DEBUG_ASSOC("Disassocation attempt from " MAC_FMT " "
2897 "on channel %d.\n",
2898 MAC_ARG(priv->assoc_request.bssid),
2899 priv->assoc_request.channel);
2900
2901 priv->status &= ~(STATUS_ASSOCIATING | STATUS_ASSOCIATED);
2902 priv->status |= STATUS_DISASSOCIATING;
2903
2904 if (quiet)
2905 priv->assoc_request.assoc_type = HC_DISASSOC_QUIET;
2906 else
2907 priv->assoc_request.assoc_type = HC_DISASSOCIATE;
2908 err = ipw_send_associate(priv, &priv->assoc_request);
2909 if (err) {
2910 IPW_DEBUG_HC("Attempt to send [dis]associate command "
2911 "failed.\n");
2912 return;
2913 }
2914
2915}
2916
2917static void ipw_disassociate(void *data)
2918{
2919 ipw_send_disassociate(data, 0);
2920}
2921
2922static void notify_wx_assoc_event(struct ipw_priv *priv)
2923{
2924 union iwreq_data wrqu;
2925 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
2926 if (priv->status & STATUS_ASSOCIATED)
2927 memcpy(wrqu.ap_addr.sa_data, priv->bssid, ETH_ALEN);
2928 else
2929 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
2930 wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL);
2931}
2932
2933struct ipw_status_code {
2934 u16 status;
2935 const char *reason;
2936};
2937
2938static const struct ipw_status_code ipw_status_codes[] = {
2939 {0x00, "Successful"},
2940 {0x01, "Unspecified failure"},
2941 {0x0A, "Cannot support all requested capabilities in the "
2942 "Capability information field"},
2943 {0x0B, "Reassociation denied due to inability to confirm that "
2944 "association exists"},
2945 {0x0C, "Association denied due to reason outside the scope of this "
2946 "standard"},
2947 {0x0D, "Responding station does not support the specified authentication "
2948 "algorithm"},
2949 {0x0E, "Received an Authentication frame with authentication sequence "
2950 "transaction sequence number out of expected sequence"},
2951 {0x0F, "Authentication rejected because of challenge failure"},
2952 {0x10, "Authentication rejected due to timeout waiting for next "
2953 "frame in sequence"},
2954 {0x11, "Association denied because AP is unable to handle additional "
2955 "associated stations"},
2956 {0x12, "Association denied due to requesting station not supporting all "
2957 "of the datarates in the BSSBasicServiceSet Parameter"},
2958 {0x13, "Association denied due to requesting station not supporting "
2959 "short preamble operation"},
2960 {0x14, "Association denied due to requesting station not supporting "
2961 "PBCC encoding"},
2962 {0x15, "Association denied due to requesting station not supporting "
2963 "channel agility"},
2964 {0x19, "Association denied due to requesting station not supporting "
2965 "short slot operation"},
2966 {0x1A, "Association denied due to requesting station not supporting "
2967 "DSSS-OFDM operation"},
2968 {0x28, "Invalid Information Element"},
2969 {0x29, "Group Cipher is not valid"},
2970 {0x2A, "Pairwise Cipher is not valid"},
2971 {0x2B, "AKMP is not valid"},
2972 {0x2C, "Unsupported RSN IE version"},
2973 {0x2D, "Invalid RSN IE Capabilities"},
2974 {0x2E, "Cipher suite is rejected per security policy"},
2975};
2976
2977#ifdef CONFIG_IPW_DEBUG
2978static const char *ipw_get_status_code(u16 status)
2979{
2980 int i;
2981 for (i = 0; i < ARRAY_SIZE(ipw_status_codes); i++)
2982 if (ipw_status_codes[i].status == status)
2983 return ipw_status_codes[i].reason;
2984 return "Unknown status value.";
2985}
2986#endif
2987
2988static void inline average_init(struct average *avg)
2989{
2990 memset(avg, 0, sizeof(*avg));
2991}
2992
2993static void inline average_add(struct average *avg, s16 val)
2994{
2995 avg->sum -= avg->entries[avg->pos];
2996 avg->sum += val;
2997 avg->entries[avg->pos++] = val;
2998 if (unlikely(avg->pos == AVG_ENTRIES)) {
2999 avg->init = 1;
3000 avg->pos = 0;
3001 }
3002}
3003
3004static s16 inline average_value(struct average *avg)
3005{
3006 if (!unlikely(avg->init)) {
3007 if (avg->pos)
3008 return avg->sum / avg->pos;
3009 return 0;
3010 }
3011
3012 return avg->sum / AVG_ENTRIES;
3013}
3014
3015static void ipw_reset_stats(struct ipw_priv *priv)
3016{
3017 u32 len = sizeof(u32);
3018
3019 priv->quality = 0;
3020
3021 average_init(&priv->average_missed_beacons);
3022 average_init(&priv->average_rssi);
3023 average_init(&priv->average_noise);
3024
3025 priv->last_rate = 0;
3026 priv->last_missed_beacons = 0;
3027 priv->last_rx_packets = 0;
3028 priv->last_tx_packets = 0;
3029 priv->last_tx_failures = 0;
3030
3031 /* Firmware managed, reset only when NIC is restarted, so we have to
3032 * normalize on the current value */
3033 ipw_get_ordinal(priv, IPW_ORD_STAT_RX_ERR_CRC,
3034 &priv->last_rx_err, &len);
3035 ipw_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURE,
3036 &priv->last_tx_failures, &len);
3037
3038 /* Driver managed, reset with each association */
3039 priv->missed_adhoc_beacons = 0;
3040 priv->missed_beacons = 0;
3041 priv->tx_packets = 0;
3042 priv->rx_packets = 0;
3043
3044}
3045
3046
3047static inline u32 ipw_get_max_rate(struct ipw_priv *priv)
3048{
3049 u32 i = 0x80000000;
3050 u32 mask = priv->rates_mask;
3051 /* If currently associated in B mode, restrict the maximum
3052 * rate match to B rates */
3053 if (priv->assoc_request.ieee_mode == IPW_B_MODE)
3054 mask &= IEEE80211_CCK_RATES_MASK;
3055
3056 /* TODO: Verify that the rate is supported by the current rates
3057 * list. */
3058
3059 while (i && !(mask & i)) i >>= 1;
3060 switch (i) {
3061 case IEEE80211_CCK_RATE_1MB_MASK: return 1000000;
3062 case IEEE80211_CCK_RATE_2MB_MASK: return 2000000;
3063 case IEEE80211_CCK_RATE_5MB_MASK: return 5500000;
3064 case IEEE80211_OFDM_RATE_6MB_MASK: return 6000000;
3065 case IEEE80211_OFDM_RATE_9MB_MASK: return 9000000;
3066 case IEEE80211_CCK_RATE_11MB_MASK: return 11000000;
3067 case IEEE80211_OFDM_RATE_12MB_MASK: return 12000000;
3068 case IEEE80211_OFDM_RATE_18MB_MASK: return 18000000;
3069 case IEEE80211_OFDM_RATE_24MB_MASK: return 24000000;
3070 case IEEE80211_OFDM_RATE_36MB_MASK: return 36000000;
3071 case IEEE80211_OFDM_RATE_48MB_MASK: return 48000000;
3072 case IEEE80211_OFDM_RATE_54MB_MASK: return 54000000;
3073 }
3074
3075 if (priv->ieee->mode == IEEE_B)
3076 return 11000000;
3077 else
3078 return 54000000;
3079}
3080
3081static u32 ipw_get_current_rate(struct ipw_priv *priv)
3082{
3083 u32 rate, len = sizeof(rate);
3084 int err;
3085
3086 if (!(priv->status & STATUS_ASSOCIATED))
3087 return 0;
3088
3089 if (priv->tx_packets > IPW_REAL_RATE_RX_PACKET_THRESHOLD) {
3090 err = ipw_get_ordinal(priv, IPW_ORD_STAT_TX_CURR_RATE, &rate,
3091 &len);
3092 if (err) {
3093 IPW_DEBUG_INFO("failed querying ordinals.\n");
3094 return 0;
3095 }
3096 } else
3097 return ipw_get_max_rate(priv);
3098
3099 switch (rate) {
3100 case IPW_TX_RATE_1MB: return 1000000;
3101 case IPW_TX_RATE_2MB: return 2000000;
3102 case IPW_TX_RATE_5MB: return 5500000;
3103 case IPW_TX_RATE_6MB: return 6000000;
3104 case IPW_TX_RATE_9MB: return 9000000;
3105 case IPW_TX_RATE_11MB: return 11000000;
3106 case IPW_TX_RATE_12MB: return 12000000;
3107 case IPW_TX_RATE_18MB: return 18000000;
3108 case IPW_TX_RATE_24MB: return 24000000;
3109 case IPW_TX_RATE_36MB: return 36000000;
3110 case IPW_TX_RATE_48MB: return 48000000;
3111 case IPW_TX_RATE_54MB: return 54000000;
3112 }
3113
3114 return 0;
3115}
3116
3117#define PERFECT_RSSI (-50)
3118#define WORST_RSSI (-85)
3119#define IPW_STATS_INTERVAL (2 * HZ)
3120static void ipw_gather_stats(struct ipw_priv *priv)
3121{
3122 u32 rx_err, rx_err_delta, rx_packets_delta;
3123 u32 tx_failures, tx_failures_delta, tx_packets_delta;
3124 u32 missed_beacons_percent, missed_beacons_delta;
3125 u32 quality = 0;
3126 u32 len = sizeof(u32);
3127 s16 rssi;
3128 u32 beacon_quality, signal_quality, tx_quality, rx_quality,
3129 rate_quality;
3130
3131 if (!(priv->status & STATUS_ASSOCIATED)) {
3132 priv->quality = 0;
3133 return;
3134 }
3135
3136 /* Update the statistics */
3137 ipw_get_ordinal(priv, IPW_ORD_STAT_MISSED_BEACONS,
3138 &priv->missed_beacons, &len);
3139 missed_beacons_delta = priv->missed_beacons -
3140 priv->last_missed_beacons;
3141 priv->last_missed_beacons = priv->missed_beacons;
3142 if (priv->assoc_request.beacon_interval) {
3143 missed_beacons_percent = missed_beacons_delta *
3144 (HZ * priv->assoc_request.beacon_interval) /
3145 (IPW_STATS_INTERVAL * 10);
3146 } else {
3147 missed_beacons_percent = 0;
3148 }
3149 average_add(&priv->average_missed_beacons, missed_beacons_percent);
3150
3151 ipw_get_ordinal(priv, IPW_ORD_STAT_RX_ERR_CRC, &rx_err, &len);
3152 rx_err_delta = rx_err - priv->last_rx_err;
3153 priv->last_rx_err = rx_err;
3154
3155 ipw_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURE, &tx_failures, &len);
3156 tx_failures_delta = tx_failures - priv->last_tx_failures;
3157 priv->last_tx_failures = tx_failures;
3158
3159 rx_packets_delta = priv->rx_packets - priv->last_rx_packets;
3160 priv->last_rx_packets = priv->rx_packets;
3161
3162 tx_packets_delta = priv->tx_packets - priv->last_tx_packets;
3163 priv->last_tx_packets = priv->tx_packets;
3164
3165 /* Calculate quality based on the following:
3166 *
3167 * Missed beacon: 100% = 0, 0% = 70% missed
3168 * Rate: 60% = 1Mbs, 100% = Max
3169 * Rx and Tx errors represent a straight % of total Rx/Tx
3170 * RSSI: 100% = > -50, 0% = < -80
3171 * Rx errors: 100% = 0, 0% = 50% missed
3172 *
3173 * The lowest computed quality is used.
3174 *
3175 */
3176#define BEACON_THRESHOLD 5
3177 beacon_quality = 100 - missed_beacons_percent;
3178 if (beacon_quality < BEACON_THRESHOLD)
3179 beacon_quality = 0;
3180 else
3181 beacon_quality = (beacon_quality - BEACON_THRESHOLD) * 100 /
3182 (100 - BEACON_THRESHOLD);
3183 IPW_DEBUG_STATS("Missed beacon: %3d%% (%d%%)\n",
3184 beacon_quality, missed_beacons_percent);
3185
3186 priv->last_rate = ipw_get_current_rate(priv);
3187 rate_quality = priv->last_rate * 40 / priv->last_rate + 60;
3188 IPW_DEBUG_STATS("Rate quality : %3d%% (%dMbs)\n",
3189 rate_quality, priv->last_rate / 1000000);
3190
3191 if (rx_packets_delta > 100 &&
3192 rx_packets_delta + rx_err_delta)
3193 rx_quality = 100 - (rx_err_delta * 100) /
3194 (rx_packets_delta + rx_err_delta);
3195 else
3196 rx_quality = 100;
3197 IPW_DEBUG_STATS("Rx quality : %3d%% (%u errors, %u packets)\n",
3198 rx_quality, rx_err_delta, rx_packets_delta);
3199
3200 if (tx_packets_delta > 100 &&
3201 tx_packets_delta + tx_failures_delta)
3202 tx_quality = 100 - (tx_failures_delta * 100) /
3203 (tx_packets_delta + tx_failures_delta);
3204 else
3205 tx_quality = 100;
3206 IPW_DEBUG_STATS("Tx quality : %3d%% (%u errors, %u packets)\n",
3207 tx_quality, tx_failures_delta, tx_packets_delta);
3208
3209 rssi = average_value(&priv->average_rssi);
3210 if (rssi > PERFECT_RSSI)
3211 signal_quality = 100;
3212 else if (rssi < WORST_RSSI)
3213 signal_quality = 0;
3214 else
3215 signal_quality = (rssi - WORST_RSSI) * 100 /
3216 (PERFECT_RSSI - WORST_RSSI);
3217 IPW_DEBUG_STATS("Signal level : %3d%% (%d dBm)\n",
3218 signal_quality, rssi);
3219
3220 quality = min(beacon_quality,
3221 min(rate_quality,
3222 min(tx_quality, min(rx_quality, signal_quality))));
3223 if (quality == beacon_quality)
3224 IPW_DEBUG_STATS(
3225 "Quality (%d%%): Clamped to missed beacons.\n",
3226 quality);
3227 if (quality == rate_quality)
3228 IPW_DEBUG_STATS(
3229 "Quality (%d%%): Clamped to rate quality.\n",
3230 quality);
3231 if (quality == tx_quality)
3232 IPW_DEBUG_STATS(
3233 "Quality (%d%%): Clamped to Tx quality.\n",
3234 quality);
3235 if (quality == rx_quality)
3236 IPW_DEBUG_STATS(
3237 "Quality (%d%%): Clamped to Rx quality.\n",
3238 quality);
3239 if (quality == signal_quality)
3240 IPW_DEBUG_STATS(
3241 "Quality (%d%%): Clamped to signal quality.\n",
3242 quality);
3243
3244 priv->quality = quality;
3245
3246 queue_delayed_work(priv->workqueue, &priv->gather_stats,
3247 IPW_STATS_INTERVAL);
3248}
3249
3250/**
3251 * Handle host notification packet.
3252 * Called from interrupt routine
3253 */
3254static inline void ipw_rx_notification(struct ipw_priv* priv,
3255 struct ipw_rx_notification *notif)
3256{
3257 IPW_DEBUG_NOTIF("type = %i (%d bytes)\n",
3258 notif->subtype, notif->size);
3259
3260 switch (notif->subtype) {
3261 case HOST_NOTIFICATION_STATUS_ASSOCIATED: {
3262 struct notif_association *assoc = &notif->u.assoc;
3263
3264 switch (assoc->state) {
3265 case CMAS_ASSOCIATED: {
3266 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3267 "associated: '%s' " MAC_FMT " \n",
3268 escape_essid(priv->essid, priv->essid_len),
3269 MAC_ARG(priv->bssid));
3270
3271 switch (priv->ieee->iw_mode) {
3272 case IW_MODE_INFRA:
3273 memcpy(priv->ieee->bssid, priv->bssid,
3274 ETH_ALEN);
3275 break;
3276
3277 case IW_MODE_ADHOC:
3278 memcpy(priv->ieee->bssid, priv->bssid,
3279 ETH_ALEN);
3280
3281 /* clear out the station table */
3282 priv->num_stations = 0;
3283
3284 IPW_DEBUG_ASSOC("queueing adhoc check\n");
3285 queue_delayed_work(priv->workqueue,
3286 &priv->adhoc_check,
3287 priv->assoc_request.beacon_interval);
3288 break;
3289 }
3290
3291 priv->status &= ~STATUS_ASSOCIATING;
3292 priv->status |= STATUS_ASSOCIATED;
3293
3294 netif_carrier_on(priv->net_dev);
3295 if (netif_queue_stopped(priv->net_dev)) {
3296 IPW_DEBUG_NOTIF("waking queue\n");
3297 netif_wake_queue(priv->net_dev);
3298 } else {
3299 IPW_DEBUG_NOTIF("starting queue\n");
3300 netif_start_queue(priv->net_dev);
3301 }
3302
3303 ipw_reset_stats(priv);
3304 /* Ensure the rate is updated immediately */
3305 priv->last_rate = ipw_get_current_rate(priv);
3306 schedule_work(&priv->gather_stats);
3307 notify_wx_assoc_event(priv);
3308
3309/* queue_delayed_work(priv->workqueue,
3310 &priv->request_scan,
3311 SCAN_ASSOCIATED_INTERVAL);
3312*/
3313 break;
3314 }
3315
3316 case CMAS_AUTHENTICATED: {
3317 if (priv->status & (STATUS_ASSOCIATED | STATUS_AUTH)) {
3318#ifdef CONFIG_IPW_DEBUG
3319 struct notif_authenticate *auth = &notif->u.auth;
3320 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3321 "deauthenticated: '%s' " MAC_FMT ": (0x%04X) - %s \n",
3322 escape_essid(priv->essid, priv->essid_len),
3323 MAC_ARG(priv->bssid),
3324 ntohs(auth->status),
3325 ipw_get_status_code(ntohs(auth->status)));
3326#endif
3327
3328 priv->status &= ~(STATUS_ASSOCIATING |
3329 STATUS_AUTH |
3330 STATUS_ASSOCIATED);
3331
3332 netif_carrier_off(priv->net_dev);
3333 netif_stop_queue(priv->net_dev);
3334 queue_work(priv->workqueue, &priv->request_scan);
3335 notify_wx_assoc_event(priv);
3336 break;
3337 }
3338
3339 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3340 "authenticated: '%s' " MAC_FMT "\n",
3341 escape_essid(priv->essid, priv->essid_len),
3342 MAC_ARG(priv->bssid));
3343 break;
3344 }
3345
3346 case CMAS_INIT: {
3347 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3348 "disassociated: '%s' " MAC_FMT " \n",
3349 escape_essid(priv->essid, priv->essid_len),
3350 MAC_ARG(priv->bssid));
3351
3352 priv->status &= ~(
3353 STATUS_DISASSOCIATING |
3354 STATUS_ASSOCIATING |
3355 STATUS_ASSOCIATED |
3356 STATUS_AUTH);
3357
3358 netif_stop_queue(priv->net_dev);
3359 if (!(priv->status & STATUS_ROAMING)) {
3360 netif_carrier_off(priv->net_dev);
3361 notify_wx_assoc_event(priv);
3362
3363 /* Cancel any queued work ... */
3364 cancel_delayed_work(&priv->request_scan);
3365 cancel_delayed_work(&priv->adhoc_check);
3366
3367 /* Queue up another scan... */
3368 queue_work(priv->workqueue,
3369 &priv->request_scan);
3370
3371 cancel_delayed_work(&priv->gather_stats);
3372 } else {
3373 priv->status |= STATUS_ROAMING;
3374 queue_work(priv->workqueue,
3375 &priv->request_scan);
3376 }
3377
3378 ipw_reset_stats(priv);
3379 break;
3380 }
3381
3382 default:
3383 IPW_ERROR("assoc: unknown (%d)\n",
3384 assoc->state);
3385 break;
3386 }
3387
3388 break;
3389 }
3390
3391 case HOST_NOTIFICATION_STATUS_AUTHENTICATE: {
3392 struct notif_authenticate *auth = &notif->u.auth;
3393 switch (auth->state) {
3394 case CMAS_AUTHENTICATED:
3395 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE,
3396 "authenticated: '%s' " MAC_FMT " \n",
3397 escape_essid(priv->essid, priv->essid_len),
3398 MAC_ARG(priv->bssid));
3399 priv->status |= STATUS_AUTH;
3400 break;
3401
3402 case CMAS_INIT:
3403 if (priv->status & STATUS_AUTH) {
3404 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3405 "authentication failed (0x%04X): %s\n",
3406 ntohs(auth->status),
3407 ipw_get_status_code(ntohs(auth->status)));
3408 }
3409 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3410 "deauthenticated: '%s' " MAC_FMT "\n",
3411 escape_essid(priv->essid, priv->essid_len),
3412 MAC_ARG(priv->bssid));
3413
3414 priv->status &= ~(STATUS_ASSOCIATING |
3415 STATUS_AUTH |
3416 STATUS_ASSOCIATED);
3417
3418 netif_carrier_off(priv->net_dev);
3419 netif_stop_queue(priv->net_dev);
3420 queue_work(priv->workqueue, &priv->request_scan);
3421 notify_wx_assoc_event(priv);
3422 break;
3423
3424 case CMAS_TX_AUTH_SEQ_1:
3425 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3426 "AUTH_SEQ_1\n");
3427 break;
3428 case CMAS_RX_AUTH_SEQ_2:
3429 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3430 "AUTH_SEQ_2\n");
3431 break;
3432 case CMAS_AUTH_SEQ_1_PASS:
3433 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3434 "AUTH_SEQ_1_PASS\n");
3435 break;
3436 case CMAS_AUTH_SEQ_1_FAIL:
3437 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3438 "AUTH_SEQ_1_FAIL\n");
3439 break;
3440 case CMAS_TX_AUTH_SEQ_3:
3441 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3442 "AUTH_SEQ_3\n");
3443 break;
3444 case CMAS_RX_AUTH_SEQ_4:
3445 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3446 "RX_AUTH_SEQ_4\n");
3447 break;
3448 case CMAS_AUTH_SEQ_2_PASS:
3449 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3450 "AUTH_SEQ_2_PASS\n");
3451 break;
3452 case CMAS_AUTH_SEQ_2_FAIL:
3453 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3454 "AUT_SEQ_2_FAIL\n");
3455 break;
3456 case CMAS_TX_ASSOC:
3457 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3458 "TX_ASSOC\n");
3459 break;
3460 case CMAS_RX_ASSOC_RESP:
3461 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3462 "RX_ASSOC_RESP\n");
3463 break;
3464 case CMAS_ASSOCIATED:
3465 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
3466 "ASSOCIATED\n");
3467 break;
3468 default:
3469 IPW_DEBUG_NOTIF("auth: failure - %d\n", auth->state);
3470 break;
3471 }
3472 break;
3473 }
3474
3475 case HOST_NOTIFICATION_STATUS_SCAN_CHANNEL_RESULT: {
3476 struct notif_channel_result *x = &notif->u.channel_result;
3477
3478 if (notif->size == sizeof(*x)) {
3479 IPW_DEBUG_SCAN("Scan result for channel %d\n",
3480 x->channel_num);
3481 } else {
3482 IPW_DEBUG_SCAN("Scan result of wrong size %d "
3483 "(should be %zd)\n",
3484 notif->size, sizeof(*x));
3485 }
3486 break;
3487 }
3488
3489 case HOST_NOTIFICATION_STATUS_SCAN_COMPLETED: {
3490 struct notif_scan_complete* x = &notif->u.scan_complete;
3491 if (notif->size == sizeof(*x)) {
3492 IPW_DEBUG_SCAN("Scan completed: type %d, %d channels, "
3493 "%d status\n",
3494 x->scan_type,
3495 x->num_channels,
3496 x->status);
3497 } else {
3498 IPW_ERROR("Scan completed of wrong size %d "
3499 "(should be %zd)\n",
3500 notif->size, sizeof(*x));
3501 }
3502
3503 priv->status &= ~(STATUS_SCANNING | STATUS_SCAN_ABORTING);
3504
3505 cancel_delayed_work(&priv->scan_check);
3506
3507 if (!(priv->status & (STATUS_ASSOCIATED |
3508 STATUS_ASSOCIATING |
3509 STATUS_ROAMING |
3510 STATUS_DISASSOCIATING)))
3511 queue_work(priv->workqueue, &priv->associate);
3512 else if (priv->status & STATUS_ROAMING) {
3513 /* If a scan completed and we are in roam mode, then
3514 * the scan that completed was the one requested as a
3515 * result of entering roam... so, schedule the
3516 * roam work */
3517 queue_work(priv->workqueue, &priv->roam);
3518 } else if (priv->status & STATUS_SCAN_PENDING)
3519 queue_work(priv->workqueue, &priv->request_scan);
3520
3521 priv->ieee->scans++;
3522 break;
3523 }
3524
3525 case HOST_NOTIFICATION_STATUS_FRAG_LENGTH: {
3526 struct notif_frag_length *x = &notif->u.frag_len;
3527
3528 if (notif->size == sizeof(*x)) {
3529 IPW_ERROR("Frag length: %d\n", x->frag_length);
3530 } else {
3531 IPW_ERROR("Frag length of wrong size %d "
3532 "(should be %zd)\n",
3533 notif->size, sizeof(*x));
3534 }
3535 break;
3536 }
3537
3538 case HOST_NOTIFICATION_STATUS_LINK_DETERIORATION: {
3539 struct notif_link_deterioration *x =
3540 &notif->u.link_deterioration;
3541 if (notif->size==sizeof(*x)) {
3542 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE,
3543 "link deterioration: '%s' " MAC_FMT " \n",
3544 escape_essid(priv->essid, priv->essid_len),
3545 MAC_ARG(priv->bssid));
3546 memcpy(&priv->last_link_deterioration, x, sizeof(*x));
3547 } else {
3548 IPW_ERROR("Link Deterioration of wrong size %d "
3549 "(should be %zd)\n",
3550 notif->size, sizeof(*x));
3551 }
3552 break;
3553 }
3554
3555 case HOST_NOTIFICATION_DINO_CONFIG_RESPONSE: {
3556 IPW_ERROR("Dino config\n");
3557 if (priv->hcmd && priv->hcmd->cmd == HOST_CMD_DINO_CONFIG) {
3558 /* TODO: Do anything special? */
3559 } else {
3560 IPW_ERROR("Unexpected DINO_CONFIG_RESPONSE\n");
3561 }
3562 break;
3563 }
3564
3565 case HOST_NOTIFICATION_STATUS_BEACON_STATE: {
3566 struct notif_beacon_state *x = &notif->u.beacon_state;
3567 if (notif->size != sizeof(*x)) {
3568 IPW_ERROR("Beacon state of wrong size %d (should "
3569 "be %zd)\n", notif->size, sizeof(*x));
3570 break;
3571 }
3572
3573 if (x->state == HOST_NOTIFICATION_STATUS_BEACON_MISSING) {
3574 if (priv->status & STATUS_SCANNING) {
3575 /* Stop scan to keep fw from getting
3576 * stuck... */
3577 queue_work(priv->workqueue,
3578 &priv->abort_scan);
3579 }
3580
3581 if (x->number > priv->missed_beacon_threshold &&
3582 priv->status & STATUS_ASSOCIATED) {
3583 IPW_DEBUG(IPW_DL_INFO | IPW_DL_NOTIF |
3584 IPW_DL_STATE,
3585 "Missed beacon: %d - disassociate\n",
3586 x->number);
3587 queue_work(priv->workqueue,
3588 &priv->disassociate);
3589 } else if (x->number > priv->roaming_threshold) {
3590 IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE,
3591 "Missed beacon: %d - initiate "
3592 "roaming\n",
3593 x->number);
3594 queue_work(priv->workqueue,
3595 &priv->roam);
3596 } else {
3597 IPW_DEBUG_NOTIF("Missed beacon: %d\n",
3598 x->number);
3599 }
3600
3601 priv->notif_missed_beacons = x->number;
3602
3603 }
3604
3605
3606 break;
3607 }
3608
3609 case HOST_NOTIFICATION_STATUS_TGI_TX_KEY: {
3610 struct notif_tgi_tx_key *x = &notif->u.tgi_tx_key;
3611 if (notif->size==sizeof(*x)) {
3612 IPW_ERROR("TGi Tx Key: state 0x%02x sec type "
3613 "0x%02x station %d\n",
3614 x->key_state,x->security_type,
3615 x->station_index);
3616 break;
3617 }
3618
3619 IPW_ERROR("TGi Tx Key of wrong size %d (should be %zd)\n",
3620 notif->size, sizeof(*x));
3621 break;
3622 }
3623
3624 case HOST_NOTIFICATION_CALIB_KEEP_RESULTS: {
3625 struct notif_calibration *x = &notif->u.calibration;
3626
3627 if (notif->size == sizeof(*x)) {
3628 memcpy(&priv->calib, x, sizeof(*x));
3629 IPW_DEBUG_INFO("TODO: Calibration\n");
3630 break;
3631 }
3632
3633 IPW_ERROR("Calibration of wrong size %d (should be %zd)\n",
3634 notif->size, sizeof(*x));
3635 break;
3636 }
3637
3638 case HOST_NOTIFICATION_NOISE_STATS: {
3639 if (notif->size == sizeof(u32)) {
3640 priv->last_noise = (u8)(notif->u.noise.value & 0xff);
3641 average_add(&priv->average_noise, priv->last_noise);
3642 break;
3643 }
3644
3645 IPW_ERROR("Noise stat is wrong size %d (should be %zd)\n",
3646 notif->size, sizeof(u32));
3647 break;
3648 }
3649
3650 default:
3651 IPW_ERROR("Unknown notification: "
3652 "subtype=%d,flags=0x%2x,size=%d\n",
3653 notif->subtype, notif->flags, notif->size);
3654 }
3655}
3656
3657/**
3658 * Destroys all DMA structures and initialise them again
3659 *
3660 * @param priv
3661 * @return error code
3662 */
3663static int ipw_queue_reset(struct ipw_priv *priv)
3664{
3665 int rc = 0;
3666 /** @todo customize queue sizes */
3667 int nTx = 64, nTxCmd = 8;
3668 ipw_tx_queue_free(priv);
3669 /* Tx CMD queue */
3670 rc = ipw_queue_tx_init(priv, &priv->txq_cmd, nTxCmd,
3671 CX2_TX_CMD_QUEUE_READ_INDEX,
3672 CX2_TX_CMD_QUEUE_WRITE_INDEX,
3673 CX2_TX_CMD_QUEUE_BD_BASE,
3674 CX2_TX_CMD_QUEUE_BD_SIZE);
3675 if (rc) {
3676 IPW_ERROR("Tx Cmd queue init failed\n");
3677 goto error;
3678 }
3679 /* Tx queue(s) */
3680 rc = ipw_queue_tx_init(priv, &priv->txq[0], nTx,
3681 CX2_TX_QUEUE_0_READ_INDEX,
3682 CX2_TX_QUEUE_0_WRITE_INDEX,
3683 CX2_TX_QUEUE_0_BD_BASE,
3684 CX2_TX_QUEUE_0_BD_SIZE);
3685 if (rc) {
3686 IPW_ERROR("Tx 0 queue init failed\n");
3687 goto error;
3688 }
3689 rc = ipw_queue_tx_init(priv, &priv->txq[1], nTx,
3690 CX2_TX_QUEUE_1_READ_INDEX,
3691 CX2_TX_QUEUE_1_WRITE_INDEX,
3692 CX2_TX_QUEUE_1_BD_BASE,
3693 CX2_TX_QUEUE_1_BD_SIZE);
3694 if (rc) {
3695 IPW_ERROR("Tx 1 queue init failed\n");
3696 goto error;
3697 }
3698 rc = ipw_queue_tx_init(priv, &priv->txq[2], nTx,
3699 CX2_TX_QUEUE_2_READ_INDEX,
3700 CX2_TX_QUEUE_2_WRITE_INDEX,
3701 CX2_TX_QUEUE_2_BD_BASE,
3702 CX2_TX_QUEUE_2_BD_SIZE);
3703 if (rc) {
3704 IPW_ERROR("Tx 2 queue init failed\n");
3705 goto error;
3706 }
3707 rc = ipw_queue_tx_init(priv, &priv->txq[3], nTx,
3708 CX2_TX_QUEUE_3_READ_INDEX,
3709 CX2_TX_QUEUE_3_WRITE_INDEX,
3710 CX2_TX_QUEUE_3_BD_BASE,
3711 CX2_TX_QUEUE_3_BD_SIZE);
3712 if (rc) {
3713 IPW_ERROR("Tx 3 queue init failed\n");
3714 goto error;
3715 }
3716 /* statistics */
3717 priv->rx_bufs_min = 0;
3718 priv->rx_pend_max = 0;
3719 return rc;
3720
3721 error:
3722 ipw_tx_queue_free(priv);
3723 return rc;
3724}
3725
3726/**
3727 * Reclaim Tx queue entries no more used by NIC.
3728 *
3729 * When FW adwances 'R' index, all entries between old and
3730 * new 'R' index need to be reclaimed. As result, some free space
3731 * forms. If there is enough free space (> low mark), wake Tx queue.
3732 *
3733 * @note Need to protect against garbage in 'R' index
3734 * @param priv
3735 * @param txq
3736 * @param qindex
3737 * @return Number of used entries remains in the queue
3738 */
3739static int ipw_queue_tx_reclaim(struct ipw_priv *priv,
3740 struct clx2_tx_queue *txq, int qindex)
3741{
3742 u32 hw_tail;
3743 int used;
3744 struct clx2_queue *q = &txq->q;
3745
3746 hw_tail = ipw_read32(priv, q->reg_r);
3747 if (hw_tail >= q->n_bd) {
3748 IPW_ERROR
3749 ("Read index for DMA queue (%d) is out of range [0-%d)\n",
3750 hw_tail, q->n_bd);
3751 goto done;
3752 }
3753 for (; q->last_used != hw_tail;
3754 q->last_used = ipw_queue_inc_wrap(q->last_used, q->n_bd)) {
3755 ipw_queue_tx_free_tfd(priv, txq);
3756 priv->tx_packets++;
3757 }
3758 done:
3759 if (ipw_queue_space(q) > q->low_mark && qindex >= 0) {
3760 __maybe_wake_tx(priv);
3761 }
3762 used = q->first_empty - q->last_used;
3763 if (used < 0)
3764 used += q->n_bd;
3765
3766 return used;
3767}
3768
3769static int ipw_queue_tx_hcmd(struct ipw_priv *priv, int hcmd, void *buf,
3770 int len, int sync)
3771{
3772 struct clx2_tx_queue *txq = &priv->txq_cmd;
3773 struct clx2_queue *q = &txq->q;
3774 struct tfd_frame *tfd;
3775
3776 if (ipw_queue_space(q) < (sync ? 1 : 2)) {
3777 IPW_ERROR("No space for Tx\n");
3778 return -EBUSY;
3779 }
3780
3781 tfd = &txq->bd[q->first_empty];
3782 txq->txb[q->first_empty] = NULL;
3783
3784 memset(tfd, 0, sizeof(*tfd));
3785 tfd->control_flags.message_type = TX_HOST_COMMAND_TYPE;
3786 tfd->control_flags.control_bits = TFD_NEED_IRQ_MASK;
3787 priv->hcmd_seq++;
3788 tfd->u.cmd.index = hcmd;
3789 tfd->u.cmd.length = len;
3790 memcpy(tfd->u.cmd.payload, buf, len);
3791 q->first_empty = ipw_queue_inc_wrap(q->first_empty, q->n_bd);
3792 ipw_write32(priv, q->reg_w, q->first_empty);
3793 _ipw_read32(priv, 0x90);
3794
3795 return 0;
3796}
3797
3798
3799
3800/*
3801 * Rx theory of operation
3802 *
3803 * The host allocates 32 DMA target addresses and passes the host address
3804 * to the firmware at register CX2_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3805 * 0 to 31
3806 *
3807 * Rx Queue Indexes
3808 * The host/firmware share two index registers for managing the Rx buffers.
3809 *
3810 * The READ index maps to the first position that the firmware may be writing
3811 * to -- the driver can read up to (but not including) this position and get
3812 * good data.
3813 * The READ index is managed by the firmware once the card is enabled.
3814 *
3815 * The WRITE index maps to the last position the driver has read from -- the
3816 * position preceding WRITE is the last slot the firmware can place a packet.
3817 *
3818 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3819 * WRITE = READ.
3820 *
3821 * During initialization the host sets up the READ queue position to the first
3822 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3823 *
3824 * When the firmware places a packet in a buffer it will advance the READ index
3825 * and fire the RX interrupt. The driver can then query the READ index and
3826 * process as many packets as possible, moving the WRITE index forward as it
3827 * resets the Rx queue buffers with new memory.
3828 *
3829 * The management in the driver is as follows:
3830 * + A list of pre-allocated SKBs is stored in ipw->rxq->rx_free. When
3831 * ipw->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3832 * to replensish the ipw->rxq->rx_free.
3833 * + In ipw_rx_queue_replenish (scheduled) if 'processed' != 'read' then the
3834 * ipw->rxq is replenished and the READ INDEX is updated (updating the
3835 * 'processed' and 'read' driver indexes as well)
3836 * + A received packet is processed and handed to the kernel network stack,
3837 * detached from the ipw->rxq. The driver 'processed' index is updated.
3838 * + The Host/Firmware ipw->rxq is replenished at tasklet time from the rx_free
3839 * list. If there are no allocated buffers in ipw->rxq->rx_free, the READ
3840 * INDEX is not incremented and ipw->status(RX_STALLED) is set. If there
3841 * were enough free buffers and RX_STALLED is set it is cleared.
3842 *
3843 *
3844 * Driver sequence:
3845 *
3846 * ipw_rx_queue_alloc() Allocates rx_free
3847 * ipw_rx_queue_replenish() Replenishes rx_free list from rx_used, and calls
3848 * ipw_rx_queue_restock
3849 * ipw_rx_queue_restock() Moves available buffers from rx_free into Rx
3850 * queue, updates firmware pointers, and updates
3851 * the WRITE index. If insufficient rx_free buffers
3852 * are available, schedules ipw_rx_queue_replenish
3853 *
3854 * -- enable interrupts --
3855 * ISR - ipw_rx() Detach ipw_rx_mem_buffers from pool up to the
3856 * READ INDEX, detaching the SKB from the pool.
3857 * Moves the packet buffer from queue to rx_used.
3858 * Calls ipw_rx_queue_restock to refill any empty
3859 * slots.
3860 * ...
3861 *
3862 */
3863
3864/*
3865 * If there are slots in the RX queue that need to be restocked,
3866 * and we have free pre-allocated buffers, fill the ranks as much
3867 * as we can pulling from rx_free.
3868 *
3869 * This moves the 'write' index forward to catch up with 'processed', and
3870 * also updates the memory address in the firmware to reference the new
3871 * target buffer.
3872 */
3873static void ipw_rx_queue_restock(struct ipw_priv *priv)
3874{
3875 struct ipw_rx_queue *rxq = priv->rxq;
3876 struct list_head *element;
3877 struct ipw_rx_mem_buffer *rxb;
3878 unsigned long flags;
3879 int write;
3880
3881 spin_lock_irqsave(&rxq->lock, flags);
3882 write = rxq->write;
3883 while ((rxq->write != rxq->processed) && (rxq->free_count)) {
3884 element = rxq->rx_free.next;
3885 rxb = list_entry(element, struct ipw_rx_mem_buffer, list);
3886 list_del(element);
3887
3888 ipw_write32(priv, CX2_RFDS_TABLE_LOWER + rxq->write * RFD_SIZE,
3889 rxb->dma_addr);
3890 rxq->queue[rxq->write] = rxb;
3891 rxq->write = (rxq->write + 1) % RX_QUEUE_SIZE;
3892 rxq->free_count--;
3893 }
3894 spin_unlock_irqrestore(&rxq->lock, flags);
3895
3896 /* If the pre-allocated buffer pool is dropping low, schedule to
3897 * refill it */
3898 if (rxq->free_count <= RX_LOW_WATERMARK)
3899 queue_work(priv->workqueue, &priv->rx_replenish);
3900
3901 /* If we've added more space for the firmware to place data, tell it */
3902 if (write != rxq->write)
3903 ipw_write32(priv, CX2_RX_WRITE_INDEX, rxq->write);
3904}
3905
3906/*
3907 * Move all used packet from rx_used to rx_free, allocating a new SKB for each.
3908 * Also restock the Rx queue via ipw_rx_queue_restock.
3909 *
3910 * This is called as a scheduled work item (except for during intialization)
3911 */
3912static void ipw_rx_queue_replenish(void *data)
3913{
3914 struct ipw_priv *priv = data;
3915 struct ipw_rx_queue *rxq = priv->rxq;
3916 struct list_head *element;
3917 struct ipw_rx_mem_buffer *rxb;
3918 unsigned long flags;
3919
3920 spin_lock_irqsave(&rxq->lock, flags);
3921 while (!list_empty(&rxq->rx_used)) {
3922 element = rxq->rx_used.next;
3923 rxb = list_entry(element, struct ipw_rx_mem_buffer, list);
3924 rxb->skb = alloc_skb(CX2_RX_BUF_SIZE, GFP_ATOMIC);
3925 if (!rxb->skb) {
3926 printk(KERN_CRIT "%s: Can not allocate SKB buffers.\n",
3927 priv->net_dev->name);
3928 /* We don't reschedule replenish work here -- we will
3929 * call the restock method and if it still needs
3930 * more buffers it will schedule replenish */
3931 break;
3932 }
3933 list_del(element);
3934
3935 rxb->rxb = (struct ipw_rx_buffer *)rxb->skb->data;
3936 rxb->dma_addr = pci_map_single(
3937 priv->pci_dev, rxb->skb->data, CX2_RX_BUF_SIZE,
3938 PCI_DMA_FROMDEVICE);
3939
3940 list_add_tail(&rxb->list, &rxq->rx_free);
3941 rxq->free_count++;
3942 }
3943 spin_unlock_irqrestore(&rxq->lock, flags);
3944
3945 ipw_rx_queue_restock(priv);
3946}
3947
3948/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3949 * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
3950 * This free routine walks the list of POOL entries and if SKB is set to
3951 * non NULL it is unmapped and freed
3952 */
3953static void ipw_rx_queue_free(struct ipw_priv *priv,
3954 struct ipw_rx_queue *rxq)
3955{
3956 int i;
3957
3958 if (!rxq)
3959 return;
3960
3961 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3962 if (rxq->pool[i].skb != NULL) {
3963 pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr,
3964 CX2_RX_BUF_SIZE,
3965 PCI_DMA_FROMDEVICE);
3966 dev_kfree_skb(rxq->pool[i].skb);
3967 }
3968 }
3969
3970 kfree(rxq);
3971}
3972
3973static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *priv)
3974{
3975 struct ipw_rx_queue *rxq;
3976 int i;
3977
3978 rxq = (struct ipw_rx_queue *)kmalloc(sizeof(*rxq), GFP_KERNEL);
3979 memset(rxq, 0, sizeof(*rxq));
3980 spin_lock_init(&rxq->lock);
3981 INIT_LIST_HEAD(&rxq->rx_free);
3982 INIT_LIST_HEAD(&rxq->rx_used);
3983
3984 /* Fill the rx_used queue with _all_ of the Rx buffers */
3985 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3986 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3987
3988 /* Set us so that we have processed and used all buffers, but have
3989 * not restocked the Rx queue with fresh buffers */
3990 rxq->read = rxq->write = 0;
3991 rxq->processed = RX_QUEUE_SIZE - 1;
3992 rxq->free_count = 0;
3993
3994 return rxq;
3995}
3996
3997static int ipw_is_rate_in_mask(struct ipw_priv *priv, int ieee_mode, u8 rate)
3998{
3999 rate &= ~IEEE80211_BASIC_RATE_MASK;
4000 if (ieee_mode == IEEE_A) {
4001 switch (rate) {
4002 case IEEE80211_OFDM_RATE_6MB:
4003 return priv->rates_mask & IEEE80211_OFDM_RATE_6MB_MASK ?
4004 1 : 0;
4005 case IEEE80211_OFDM_RATE_9MB:
4006 return priv->rates_mask & IEEE80211_OFDM_RATE_9MB_MASK ?
4007 1 : 0;
4008 case IEEE80211_OFDM_RATE_12MB:
4009 return priv->rates_mask & IEEE80211_OFDM_RATE_12MB_MASK ?
4010 1 : 0;
4011 case IEEE80211_OFDM_RATE_18MB:
4012 return priv->rates_mask & IEEE80211_OFDM_RATE_18MB_MASK ?
4013 1 : 0;
4014 case IEEE80211_OFDM_RATE_24MB:
4015 return priv->rates_mask & IEEE80211_OFDM_RATE_24MB_MASK ?
4016 1 : 0;
4017 case IEEE80211_OFDM_RATE_36MB:
4018 return priv->rates_mask & IEEE80211_OFDM_RATE_36MB_MASK ?
4019 1 : 0;
4020 case IEEE80211_OFDM_RATE_48MB:
4021 return priv->rates_mask & IEEE80211_OFDM_RATE_48MB_MASK ?
4022 1 : 0;
4023 case IEEE80211_OFDM_RATE_54MB:
4024 return priv->rates_mask & IEEE80211_OFDM_RATE_54MB_MASK ?
4025 1 : 0;
4026 default:
4027 return 0;
4028 }
4029 }
4030
4031 /* B and G mixed */
4032 switch (rate) {
4033 case IEEE80211_CCK_RATE_1MB:
4034 return priv->rates_mask & IEEE80211_CCK_RATE_1MB_MASK ? 1 : 0;
4035 case IEEE80211_CCK_RATE_2MB:
4036 return priv->rates_mask & IEEE80211_CCK_RATE_2MB_MASK ? 1 : 0;
4037 case IEEE80211_CCK_RATE_5MB:
4038 return priv->rates_mask & IEEE80211_CCK_RATE_5MB_MASK ? 1 : 0;
4039 case IEEE80211_CCK_RATE_11MB:
4040 return priv->rates_mask & IEEE80211_CCK_RATE_11MB_MASK ? 1 : 0;
4041 }
4042
4043 /* If we are limited to B modulations, bail at this point */
4044 if (ieee_mode == IEEE_B)
4045 return 0;
4046
4047 /* G */
4048 switch (rate) {
4049 case IEEE80211_OFDM_RATE_6MB:
4050 return priv->rates_mask & IEEE80211_OFDM_RATE_6MB_MASK ? 1 : 0;
4051 case IEEE80211_OFDM_RATE_9MB:
4052 return priv->rates_mask & IEEE80211_OFDM_RATE_9MB_MASK ? 1 : 0;
4053 case IEEE80211_OFDM_RATE_12MB:
4054 return priv->rates_mask & IEEE80211_OFDM_RATE_12MB_MASK ? 1 : 0;
4055 case IEEE80211_OFDM_RATE_18MB:
4056 return priv->rates_mask & IEEE80211_OFDM_RATE_18MB_MASK ? 1 : 0;
4057 case IEEE80211_OFDM_RATE_24MB:
4058 return priv->rates_mask & IEEE80211_OFDM_RATE_24MB_MASK ? 1 : 0;
4059 case IEEE80211_OFDM_RATE_36MB:
4060 return priv->rates_mask & IEEE80211_OFDM_RATE_36MB_MASK ? 1 : 0;
4061 case IEEE80211_OFDM_RATE_48MB:
4062 return priv->rates_mask & IEEE80211_OFDM_RATE_48MB_MASK ? 1 : 0;
4063 case IEEE80211_OFDM_RATE_54MB:
4064 return priv->rates_mask & IEEE80211_OFDM_RATE_54MB_MASK ? 1 : 0;
4065 }
4066
4067 return 0;
4068}
4069
4070static int ipw_compatible_rates(struct ipw_priv *priv,
4071 const struct ieee80211_network *network,
4072 struct ipw_supported_rates *rates)
4073{
4074 int num_rates, i;
4075
4076 memset(rates, 0, sizeof(*rates));
4077 num_rates = min(network->rates_len, (u8)IPW_MAX_RATES);
4078 rates->num_rates = 0;
4079 for (i = 0; i < num_rates; i++) {
4080 if (!ipw_is_rate_in_mask(priv, network->mode, network->rates[i])) {
4081 IPW_DEBUG_SCAN("Rate %02X masked : 0x%08X\n",
4082 network->rates[i], priv->rates_mask);
4083 continue;
4084 }
4085
4086 rates->supported_rates[rates->num_rates++] = network->rates[i];
4087 }
4088
4089 num_rates = min(network->rates_ex_len, (u8)(IPW_MAX_RATES - num_rates));
4090 for (i = 0; i < num_rates; i++) {
4091 if (!ipw_is_rate_in_mask(priv, network->mode, network->rates_ex[i])) {
4092 IPW_DEBUG_SCAN("Rate %02X masked : 0x%08X\n",
4093 network->rates_ex[i], priv->rates_mask);
4094 continue;
4095 }
4096
4097 rates->supported_rates[rates->num_rates++] = network->rates_ex[i];
4098 }
4099
4100 return rates->num_rates;
4101}
4102
4103static inline void ipw_copy_rates(struct ipw_supported_rates *dest,
4104 const struct ipw_supported_rates *src)
4105{
4106 u8 i;
4107 for (i = 0; i < src->num_rates; i++)
4108 dest->supported_rates[i] = src->supported_rates[i];
4109 dest->num_rates = src->num_rates;
4110}
4111
4112/* TODO: Look at sniffed packets in the air to determine if the basic rate
4113 * mask should ever be used -- right now all callers to add the scan rates are
4114 * set with the modulation = CCK, so BASIC_RATE_MASK is never set... */
4115static void ipw_add_cck_scan_rates(struct ipw_supported_rates *rates,
4116 u8 modulation, u32 rate_mask)
4117{
4118 u8 basic_mask = (IEEE80211_OFDM_MODULATION == modulation) ?
4119 IEEE80211_BASIC_RATE_MASK : 0;
4120
4121 if (rate_mask & IEEE80211_CCK_RATE_1MB_MASK)
4122 rates->supported_rates[rates->num_rates++] =
4123 IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
4124
4125 if (rate_mask & IEEE80211_CCK_RATE_2MB_MASK)
4126 rates->supported_rates[rates->num_rates++] =
4127 IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
4128
4129 if (rate_mask & IEEE80211_CCK_RATE_5MB_MASK)
4130 rates->supported_rates[rates->num_rates++] = basic_mask |
4131 IEEE80211_CCK_RATE_5MB;
4132
4133 if (rate_mask & IEEE80211_CCK_RATE_11MB_MASK)
4134 rates->supported_rates[rates->num_rates++] = basic_mask |
4135 IEEE80211_CCK_RATE_11MB;
4136}
4137
4138static void ipw_add_ofdm_scan_rates(struct ipw_supported_rates *rates,
4139 u8 modulation, u32 rate_mask)
4140{
4141 u8 basic_mask = (IEEE80211_OFDM_MODULATION == modulation) ?
4142 IEEE80211_BASIC_RATE_MASK : 0;
4143
4144 if (rate_mask & IEEE80211_OFDM_RATE_6MB_MASK)
4145 rates->supported_rates[rates->num_rates++] = basic_mask |
4146 IEEE80211_OFDM_RATE_6MB;
4147
4148 if (rate_mask & IEEE80211_OFDM_RATE_9MB_MASK)
4149 rates->supported_rates[rates->num_rates++] =
4150 IEEE80211_OFDM_RATE_9MB;
4151
4152 if (rate_mask & IEEE80211_OFDM_RATE_12MB_MASK)
4153 rates->supported_rates[rates->num_rates++] = basic_mask |
4154 IEEE80211_OFDM_RATE_12MB;
4155
4156 if (rate_mask & IEEE80211_OFDM_RATE_18MB_MASK)
4157 rates->supported_rates[rates->num_rates++] =
4158 IEEE80211_OFDM_RATE_18MB;
4159
4160 if (rate_mask & IEEE80211_OFDM_RATE_24MB_MASK)
4161 rates->supported_rates[rates->num_rates++] = basic_mask |
4162 IEEE80211_OFDM_RATE_24MB;
4163
4164 if (rate_mask & IEEE80211_OFDM_RATE_36MB_MASK)
4165 rates->supported_rates[rates->num_rates++] =
4166 IEEE80211_OFDM_RATE_36MB;
4167
4168 if (rate_mask & IEEE80211_OFDM_RATE_48MB_MASK)
4169 rates->supported_rates[rates->num_rates++] =
4170 IEEE80211_OFDM_RATE_48MB;
4171
4172 if (rate_mask & IEEE80211_OFDM_RATE_54MB_MASK)
4173 rates->supported_rates[rates->num_rates++] =
4174 IEEE80211_OFDM_RATE_54MB;
4175}
4176
4177struct ipw_network_match {
4178 struct ieee80211_network *network;
4179 struct ipw_supported_rates rates;
4180};
4181
4182static int ipw_best_network(
4183 struct ipw_priv *priv,
4184 struct ipw_network_match *match,
4185 struct ieee80211_network *network,
4186 int roaming)
4187{
4188 struct ipw_supported_rates rates;
4189
4190 /* Verify that this network's capability is compatible with the
4191 * current mode (AdHoc or Infrastructure) */
4192 if ((priv->ieee->iw_mode == IW_MODE_INFRA &&
4193 !(network->capability & WLAN_CAPABILITY_ESS)) ||
4194 (priv->ieee->iw_mode == IW_MODE_ADHOC &&
4195 !(network->capability & WLAN_CAPABILITY_IBSS))) {
4196 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded due to "
4197 "capability mismatch.\n",
4198 escape_essid(network->ssid, network->ssid_len),
4199 MAC_ARG(network->bssid));
4200 return 0;
4201 }
4202
4203 /* If we do not have an ESSID for this AP, we can not associate with
4204 * it */
4205 if (network->flags & NETWORK_EMPTY_ESSID) {
4206 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4207 "because of hidden ESSID.\n",
4208 escape_essid(network->ssid, network->ssid_len),
4209 MAC_ARG(network->bssid));
4210 return 0;
4211 }
4212
4213 if (unlikely(roaming)) {
4214 /* If we are roaming, then ensure check if this is a valid
4215 * network to try and roam to */
4216 if ((network->ssid_len != match->network->ssid_len) ||
4217 memcmp(network->ssid, match->network->ssid,
4218 network->ssid_len)) {
4219 IPW_DEBUG_ASSOC("Netowrk '%s (" MAC_FMT ")' excluded "
4220 "because of non-network ESSID.\n",
4221 escape_essid(network->ssid,
4222 network->ssid_len),
4223 MAC_ARG(network->bssid));
4224 return 0;
4225 }
4226 } else {
4227 /* If an ESSID has been configured then compare the broadcast
4228 * ESSID to ours */
4229 if ((priv->config & CFG_STATIC_ESSID) &&
4230 ((network->ssid_len != priv->essid_len) ||
4231 memcmp(network->ssid, priv->essid,
4232 min(network->ssid_len, priv->essid_len)))) {
4233 char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
4234 strncpy(escaped, escape_essid(
4235 network->ssid, network->ssid_len),
4236 sizeof(escaped));
4237 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4238 "because of ESSID mismatch: '%s'.\n",
4239 escaped, MAC_ARG(network->bssid),
4240 escape_essid(priv->essid, priv->essid_len));
4241 return 0;
4242 }
4243 }
4244
4245 /* If the old network rate is better than this one, don't bother
4246 * testing everything else. */
4247 if (match->network && match->network->stats.rssi >
4248 network->stats.rssi) {
4249 char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
4250 strncpy(escaped,
4251 escape_essid(network->ssid, network->ssid_len),
4252 sizeof(escaped));
4253 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded because "
4254 "'%s (" MAC_FMT ")' has a stronger signal.\n",
4255 escaped, MAC_ARG(network->bssid),
4256 escape_essid(match->network->ssid,
4257 match->network->ssid_len),
4258 MAC_ARG(match->network->bssid));
4259 return 0;
4260 }
4261
4262 /* If this network has already had an association attempt within the
4263 * last 3 seconds, do not try and associate again... */
4264 if (network->last_associate &&
4265 time_after(network->last_associate + (HZ * 5UL), jiffies)) {
4266 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4267 "because of storming (%lu since last "
4268 "assoc attempt).\n",
4269 escape_essid(network->ssid, network->ssid_len),
4270 MAC_ARG(network->bssid),
4271 (jiffies - network->last_associate) / HZ);
4272 return 0;
4273 }
4274
4275 /* Now go through and see if the requested network is valid... */
4276 if (priv->ieee->scan_age != 0 &&
4277 jiffies - network->last_scanned > priv->ieee->scan_age) {
4278 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4279 "because of age: %lums.\n",
4280 escape_essid(network->ssid, network->ssid_len),
4281 MAC_ARG(network->bssid),
4282 (jiffies - network->last_scanned) / (HZ / 100));
4283 return 0;
4284 }
4285
4286 if ((priv->config & CFG_STATIC_CHANNEL) &&
4287 (network->channel != priv->channel)) {
4288 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4289 "because of channel mismatch: %d != %d.\n",
4290 escape_essid(network->ssid, network->ssid_len),
4291 MAC_ARG(network->bssid),
4292 network->channel, priv->channel);
4293 return 0;
4294 }
4295
4296 /* Verify privacy compatability */
4297 if (((priv->capability & CAP_PRIVACY_ON) ? 1 : 0) !=
4298 ((network->capability & WLAN_CAPABILITY_PRIVACY) ? 1 : 0)) {
4299 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4300 "because of privacy mismatch: %s != %s.\n",
4301 escape_essid(network->ssid, network->ssid_len),
4302 MAC_ARG(network->bssid),
4303 priv->capability & CAP_PRIVACY_ON ? "on" :
4304 "off",
4305 network->capability &
4306 WLAN_CAPABILITY_PRIVACY ?"on" : "off");
4307 return 0;
4308 }
4309
4310 if ((priv->config & CFG_STATIC_BSSID) &&
4311 memcmp(network->bssid, priv->bssid, ETH_ALEN)) {
4312 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4313 "because of BSSID mismatch: " MAC_FMT ".\n",
4314 escape_essid(network->ssid, network->ssid_len),
4315 MAC_ARG(network->bssid),
4316 MAC_ARG(priv->bssid));
4317 return 0;
4318 }
4319
4320 /* Filter out any incompatible freq / mode combinations */
4321 if (!ieee80211_is_valid_mode(priv->ieee, network->mode)) {
4322 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4323 "because of invalid frequency/mode "
4324 "combination.\n",
4325 escape_essid(network->ssid, network->ssid_len),
4326 MAC_ARG(network->bssid));
4327 return 0;
4328 }
4329
4330 ipw_compatible_rates(priv, network, &rates);
4331 if (rates.num_rates == 0) {
4332 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
4333 "because of no compatible rates.\n",
4334 escape_essid(network->ssid, network->ssid_len),
4335 MAC_ARG(network->bssid));
4336 return 0;
4337 }
4338
4339 /* TODO: Perform any further minimal comparititive tests. We do not
4340 * want to put too much policy logic here; intelligent scan selection
4341 * should occur within a generic IEEE 802.11 user space tool. */
4342
4343 /* Set up 'new' AP to this network */
4344 ipw_copy_rates(&match->rates, &rates);
4345 match->network = network;
4346
4347 IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' is a viable match.\n",
4348 escape_essid(network->ssid, network->ssid_len),
4349 MAC_ARG(network->bssid));
4350
4351 return 1;
4352}
4353
4354
4355static void ipw_adhoc_create(struct ipw_priv *priv,
4356 struct ieee80211_network *network)
4357{
4358 /*
4359 * For the purposes of scanning, we can set our wireless mode
4360 * to trigger scans across combinations of bands, but when it
4361 * comes to creating a new ad-hoc network, we have tell the FW
4362 * exactly which band to use.
4363 *
4364 * We also have the possibility of an invalid channel for the
4365 * chossen band. Attempting to create a new ad-hoc network
4366 * with an invalid channel for wireless mode will trigger a
4367 * FW fatal error.
4368 */
4369 network->mode = is_valid_channel(priv->ieee->mode, priv->channel);
4370 if (network->mode) {
4371 network->channel = priv->channel;
4372 } else {
4373 IPW_WARNING("Overriding invalid channel\n");
4374 if (priv->ieee->mode & IEEE_A) {
4375 network->mode = IEEE_A;
4376 priv->channel = band_a_active_channel[0];
4377 } else if (priv->ieee->mode & IEEE_G) {
4378 network->mode = IEEE_G;
4379 priv->channel = band_b_active_channel[0];
4380 } else {
4381 network->mode = IEEE_B;
4382 priv->channel = band_b_active_channel[0];
4383 }
4384 }
4385
4386 network->channel = priv->channel;
4387 priv->config |= CFG_ADHOC_PERSIST;
4388 ipw_create_bssid(priv, network->bssid);
4389 network->ssid_len = priv->essid_len;
4390 memcpy(network->ssid, priv->essid, priv->essid_len);
4391 memset(&network->stats, 0, sizeof(network->stats));
4392 network->capability = WLAN_CAPABILITY_IBSS;
4393 if (priv->capability & CAP_PRIVACY_ON)
4394 network->capability |= WLAN_CAPABILITY_PRIVACY;
4395 network->rates_len = min(priv->rates.num_rates, MAX_RATES_LENGTH);
4396 memcpy(network->rates, priv->rates.supported_rates,
4397 network->rates_len);
4398 network->rates_ex_len = priv->rates.num_rates - network->rates_len;
4399 memcpy(network->rates_ex,
4400 &priv->rates.supported_rates[network->rates_len],
4401 network->rates_ex_len);
4402 network->last_scanned = 0;
4403 network->flags = 0;
4404 network->last_associate = 0;
4405 network->time_stamp[0] = 0;
4406 network->time_stamp[1] = 0;
4407 network->beacon_interval = 100; /* Default */
4408 network->listen_interval = 10; /* Default */
4409 network->atim_window = 0; /* Default */
4410#ifdef CONFIG_IEEE80211_WPA
4411 network->wpa_ie_len = 0;
4412 network->rsn_ie_len = 0;
4413#endif /* CONFIG_IEEE80211_WPA */
4414}
4415
4416static void ipw_send_wep_keys(struct ipw_priv *priv)
4417{
4418 struct ipw_wep_key *key;
4419 int i;
4420 struct host_cmd cmd = {
4421 .cmd = IPW_CMD_WEP_KEY,
4422 .len = sizeof(*key)
4423 };
4424
4425 key = (struct ipw_wep_key *)&cmd.param;
4426 key->cmd_id = DINO_CMD_WEP_KEY;
4427 key->seq_num = 0;
4428
4429 for (i = 0; i < 4; i++) {
4430 key->key_index = i;
4431 if (!(priv->sec.flags & (1 << i))) {
4432 key->key_size = 0;
4433 } else {
4434 key->key_size = priv->sec.key_sizes[i];
4435 memcpy(key->key, priv->sec.keys[i], key->key_size);
4436 }
4437
4438 if (ipw_send_cmd(priv, &cmd)) {
4439 IPW_ERROR("failed to send WEP_KEY command\n");
4440 return;
4441 }
4442 }
4443}
4444
4445static void ipw_adhoc_check(void *data)
4446{
4447 struct ipw_priv *priv = data;
4448
4449 if (priv->missed_adhoc_beacons++ > priv->missed_beacon_threshold &&
4450 !(priv->config & CFG_ADHOC_PERSIST)) {
4451 IPW_DEBUG_SCAN("Disassociating due to missed beacons\n");
4452 ipw_remove_current_network(priv);
4453 ipw_disassociate(priv);
4454 return;
4455 }
4456
4457 queue_delayed_work(priv->workqueue, &priv->adhoc_check,
4458 priv->assoc_request.beacon_interval);
4459}
4460
4461#ifdef CONFIG_IPW_DEBUG
4462static void ipw_debug_config(struct ipw_priv *priv)
4463{
4464 IPW_DEBUG_INFO("Scan completed, no valid APs matched "
4465 "[CFG 0x%08X]\n", priv->config);
4466 if (priv->config & CFG_STATIC_CHANNEL)
4467 IPW_DEBUG_INFO("Channel locked to %d\n",
4468 priv->channel);
4469 else
4470 IPW_DEBUG_INFO("Channel unlocked.\n");
4471 if (priv->config & CFG_STATIC_ESSID)
4472 IPW_DEBUG_INFO("ESSID locked to '%s'\n",
4473 escape_essid(priv->essid,
4474 priv->essid_len));
4475 else
4476 IPW_DEBUG_INFO("ESSID unlocked.\n");
4477 if (priv->config & CFG_STATIC_BSSID)
4478 IPW_DEBUG_INFO("BSSID locked to %d\n", priv->channel);
4479 else
4480 IPW_DEBUG_INFO("BSSID unlocked.\n");
4481 if (priv->capability & CAP_PRIVACY_ON)
4482 IPW_DEBUG_INFO("PRIVACY on\n");
4483 else
4484 IPW_DEBUG_INFO("PRIVACY off\n");
4485 IPW_DEBUG_INFO("RATE MASK: 0x%08X\n", priv->rates_mask);
4486}
4487#else
4488#define ipw_debug_config(x) do {} while (0)
4489#endif
4490
4491static inline void ipw_set_fixed_rate(struct ipw_priv *priv,
4492 struct ieee80211_network *network)
4493{
4494 /* TODO: Verify that this works... */
4495 struct ipw_fixed_rate fr = {
4496 .tx_rates = priv->rates_mask
4497 };
4498 u32 reg;
4499 u16 mask = 0;
4500
4501 /* Identify 'current FW band' and match it with the fixed
4502 * Tx rates */
4503
4504 switch (priv->ieee->freq_band) {
4505 case IEEE80211_52GHZ_BAND: /* A only */
4506 /* IEEE_A */
4507 if (priv->rates_mask & ~IEEE80211_OFDM_RATES_MASK) {
4508 /* Invalid fixed rate mask */
4509 fr.tx_rates = 0;
4510 break;
4511 }
4512
4513 fr.tx_rates >>= IEEE80211_OFDM_SHIFT_MASK_A;
4514 break;
4515
4516 default: /* 2.4Ghz or Mixed */
4517 /* IEEE_B */
4518 if (network->mode == IEEE_B) {
4519 if (fr.tx_rates & ~IEEE80211_CCK_RATES_MASK) {
4520 /* Invalid fixed rate mask */
4521 fr.tx_rates = 0;
4522 }
4523 break;
4524 }
4525
4526 /* IEEE_G */
4527 if (fr.tx_rates & ~(IEEE80211_CCK_RATES_MASK |
4528 IEEE80211_OFDM_RATES_MASK)) {
4529 /* Invalid fixed rate mask */
4530 fr.tx_rates = 0;
4531 break;
4532 }
4533
4534 if (IEEE80211_OFDM_RATE_6MB_MASK & fr.tx_rates) {
4535 mask |= (IEEE80211_OFDM_RATE_6MB_MASK >> 1);
4536 fr.tx_rates &= ~IEEE80211_OFDM_RATE_6MB_MASK;
4537 }
4538
4539 if (IEEE80211_OFDM_RATE_9MB_MASK & fr.tx_rates) {
4540 mask |= (IEEE80211_OFDM_RATE_9MB_MASK >> 1);
4541 fr.tx_rates &= ~IEEE80211_OFDM_RATE_9MB_MASK;
4542 }
4543
4544 if (IEEE80211_OFDM_RATE_12MB_MASK & fr.tx_rates) {
4545 mask |= (IEEE80211_OFDM_RATE_12MB_MASK >> 1);
4546 fr.tx_rates &= ~IEEE80211_OFDM_RATE_12MB_MASK;
4547 }
4548
4549 fr.tx_rates |= mask;
4550 break;
4551 }
4552
4553 reg = ipw_read32(priv, IPW_MEM_FIXED_OVERRIDE);
4554 ipw_write_reg32(priv, reg, *(u32*)&fr);
4555}
4556
4557static int ipw_associate_network(struct ipw_priv *priv,
4558 struct ieee80211_network *network,
4559 struct ipw_supported_rates *rates,
4560 int roaming)
4561{
4562 int err;
4563
4564 if (priv->config & CFG_FIXED_RATE)
4565 ipw_set_fixed_rate(priv, network);
4566
4567 if (!(priv->config & CFG_STATIC_ESSID)) {
4568 priv->essid_len = min(network->ssid_len,
4569 (u8)IW_ESSID_MAX_SIZE);
4570 memcpy(priv->essid, network->ssid, priv->essid_len);
4571 }
4572
4573 network->last_associate = jiffies;
4574
4575 memset(&priv->assoc_request, 0, sizeof(priv->assoc_request));
4576 priv->assoc_request.channel = network->channel;
4577 if ((priv->capability & CAP_PRIVACY_ON) &&
4578 (priv->capability & CAP_SHARED_KEY)) {
4579 priv->assoc_request.auth_type = AUTH_SHARED_KEY;
4580 priv->assoc_request.auth_key = priv->sec.active_key;
4581 } else {
4582 priv->assoc_request.auth_type = AUTH_OPEN;
4583 priv->assoc_request.auth_key = 0;
4584 }
4585
4586 if (priv->capability & CAP_PRIVACY_ON)
4587 ipw_send_wep_keys(priv);
4588
4589 /*
4590 * It is valid for our ieee device to support multiple modes, but
4591 * when it comes to associating to a given network we have to choose
4592 * just one mode.
4593 */
4594 if (network->mode & priv->ieee->mode & IEEE_A)
4595 priv->assoc_request.ieee_mode = IPW_A_MODE;
4596 else if (network->mode & priv->ieee->mode & IEEE_G)
4597 priv->assoc_request.ieee_mode = IPW_G_MODE;
4598 else if (network->mode & priv->ieee->mode & IEEE_B)
4599 priv->assoc_request.ieee_mode = IPW_B_MODE;
4600
4601 IPW_DEBUG_ASSOC("%sssocation attempt: '%s', channel %d, "
4602 "802.11%c [%d], enc=%s%s%s%c%c\n",
4603 roaming ? "Rea" : "A",
4604 escape_essid(priv->essid, priv->essid_len),
4605 network->channel,
4606 ipw_modes[priv->assoc_request.ieee_mode],
4607 rates->num_rates,
4608 priv->capability & CAP_PRIVACY_ON ? "on " : "off",
4609 priv->capability & CAP_PRIVACY_ON ?
4610 (priv->capability & CAP_SHARED_KEY ? "(shared)" :
4611 "(open)") : "",
4612 priv->capability & CAP_PRIVACY_ON ? " key=" : "",
4613 priv->capability & CAP_PRIVACY_ON ?
4614 '1' + priv->sec.active_key : '.',
4615 priv->capability & CAP_PRIVACY_ON ?
4616 '.' : ' ');
4617
4618 priv->assoc_request.beacon_interval = network->beacon_interval;
4619 if ((priv->ieee->iw_mode == IW_MODE_ADHOC) &&
4620 (network->time_stamp[0] == 0) &&
4621 (network->time_stamp[1] == 0)) {
4622 priv->assoc_request.assoc_type = HC_IBSS_START;
4623 priv->assoc_request.assoc_tsf_msw = 0;
4624 priv->assoc_request.assoc_tsf_lsw = 0;
4625 } else {
4626 if (unlikely(roaming))
4627 priv->assoc_request.assoc_type = HC_REASSOCIATE;
4628 else
4629 priv->assoc_request.assoc_type = HC_ASSOCIATE;
4630 priv->assoc_request.assoc_tsf_msw = network->time_stamp[1];
4631 priv->assoc_request.assoc_tsf_lsw = network->time_stamp[0];
4632 }
4633
4634 memcpy(&priv->assoc_request.bssid, network->bssid, ETH_ALEN);
4635
4636 if (priv->ieee->iw_mode == IW_MODE_ADHOC) {
4637 memset(&priv->assoc_request.dest, 0xFF, ETH_ALEN);
4638 priv->assoc_request.atim_window = network->atim_window;
4639 } else {
4640 memcpy(&priv->assoc_request.dest, network->bssid,
4641 ETH_ALEN);
4642 priv->assoc_request.atim_window = 0;
4643 }
4644
4645 priv->assoc_request.capability = network->capability;
4646 priv->assoc_request.listen_interval = network->listen_interval;
4647
4648 err = ipw_send_ssid(priv, priv->essid, priv->essid_len);
4649 if (err) {
4650 IPW_DEBUG_HC("Attempt to send SSID command failed.\n");
4651 return err;
4652 }
4653
4654 rates->ieee_mode = priv->assoc_request.ieee_mode;
4655 rates->purpose = IPW_RATE_CONNECT;
4656 ipw_send_supported_rates(priv, rates);
4657
4658 if (priv->assoc_request.ieee_mode == IPW_G_MODE)
4659 priv->sys_config.dot11g_auto_detection = 1;
4660 else
4661 priv->sys_config.dot11g_auto_detection = 0;
4662 err = ipw_send_system_config(priv, &priv->sys_config);
4663 if (err) {
4664 IPW_DEBUG_HC("Attempt to send sys config command failed.\n");
4665 return err;
4666 }
4667
4668 IPW_DEBUG_ASSOC("Association sensitivity: %d\n", network->stats.rssi);
4669 err = ipw_set_sensitivity(priv, network->stats.rssi);
4670 if (err) {
4671 IPW_DEBUG_HC("Attempt to send associate command failed.\n");
4672 return err;
4673 }
4674
4675 /*
4676 * If preemption is enabled, it is possible for the association
4677 * to complete before we return from ipw_send_associate. Therefore
4678 * we have to be sure and update our priviate data first.
4679 */
4680 priv->channel = network->channel;
4681 memcpy(priv->bssid, network->bssid, ETH_ALEN);
4682 priv->status |= STATUS_ASSOCIATING;
4683 priv->status &= ~STATUS_SECURITY_UPDATED;
4684
4685 priv->assoc_network = network;
4686
4687 err = ipw_send_associate(priv, &priv->assoc_request);
4688 if (err) {
4689 IPW_DEBUG_HC("Attempt to send associate command failed.\n");
4690 return err;
4691 }
4692
4693 IPW_DEBUG(IPW_DL_STATE, "associating: '%s' " MAC_FMT " \n",
4694 escape_essid(priv->essid, priv->essid_len),
4695 MAC_ARG(priv->bssid));
4696
4697 return 0;
4698}
4699
4700static void ipw_roam(void *data)
4701{
4702 struct ipw_priv *priv = data;
4703 struct ieee80211_network *network = NULL;
4704 struct ipw_network_match match = {
4705 .network = priv->assoc_network
4706 };
4707
4708 /* The roaming process is as follows:
4709 *
4710 * 1. Missed beacon threshold triggers the roaming process by
4711 * setting the status ROAM bit and requesting a scan.
4712 * 2. When the scan completes, it schedules the ROAM work
4713 * 3. The ROAM work looks at all of the known networks for one that
4714 * is a better network than the currently associated. If none
4715 * found, the ROAM process is over (ROAM bit cleared)
4716 * 4. If a better network is found, a disassociation request is
4717 * sent.
4718 * 5. When the disassociation completes, the roam work is again
4719 * scheduled. The second time through, the driver is no longer
4720 * associated, and the newly selected network is sent an
4721 * association request.
4722 * 6. At this point ,the roaming process is complete and the ROAM
4723 * status bit is cleared.
4724 */
4725
4726 /* If we are no longer associated, and the roaming bit is no longer
4727 * set, then we are not actively roaming, so just return */
4728 if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ROAMING)))
4729 return;
4730
4731 if (priv->status & STATUS_ASSOCIATED) {
4732 /* First pass through ROAM process -- look for a better
4733 * network */
4734 u8 rssi = priv->assoc_network->stats.rssi;
4735 priv->assoc_network->stats.rssi = -128;
4736 list_for_each_entry(network, &priv->ieee->network_list, list) {
4737 if (network != priv->assoc_network)
4738 ipw_best_network(priv, &match, network, 1);
4739 }
4740 priv->assoc_network->stats.rssi = rssi;
4741
4742 if (match.network == priv->assoc_network) {
4743 IPW_DEBUG_ASSOC("No better APs in this network to "
4744 "roam to.\n");
4745 priv->status &= ~STATUS_ROAMING;
4746 ipw_debug_config(priv);
4747 return;
4748 }
4749
4750 ipw_send_disassociate(priv, 1);
4751 priv->assoc_network = match.network;
4752
4753 return;
4754 }
4755
4756 /* Second pass through ROAM process -- request association */
4757 ipw_compatible_rates(priv, priv->assoc_network, &match.rates);
4758 ipw_associate_network(priv, priv->assoc_network, &match.rates, 1);
4759 priv->status &= ~STATUS_ROAMING;
4760}
4761
4762static void ipw_associate(void *data)
4763{
4764 struct ipw_priv *priv = data;
4765
4766 struct ieee80211_network *network = NULL;
4767 struct ipw_network_match match = {
4768 .network = NULL
4769 };
4770 struct ipw_supported_rates *rates;
4771 struct list_head *element;
4772
4773 if (!(priv->config & CFG_ASSOCIATE) &&
4774 !(priv->config & (CFG_STATIC_ESSID |
4775 CFG_STATIC_CHANNEL |
4776 CFG_STATIC_BSSID))) {
4777 IPW_DEBUG_ASSOC("Not attempting association (associate=0)\n");
4778 return;
4779 }
4780
4781 list_for_each_entry(network, &priv->ieee->network_list, list)
4782 ipw_best_network(priv, &match, network, 0);
4783
4784 network = match.network;
4785 rates = &match.rates;
4786
4787 if (network == NULL &&
4788 priv->ieee->iw_mode == IW_MODE_ADHOC &&
4789 priv->config & CFG_ADHOC_CREATE &&
4790 priv->config & CFG_STATIC_ESSID &&
4791 !list_empty(&priv->ieee->network_free_list)) {
4792 element = priv->ieee->network_free_list.next;
4793 network = list_entry(element, struct ieee80211_network,
4794 list);
4795 ipw_adhoc_create(priv, network);
4796 rates = &priv->rates;
4797 list_del(element);
4798 list_add_tail(&network->list, &priv->ieee->network_list);
4799 }
4800
4801 /* If we reached the end of the list, then we don't have any valid
4802 * matching APs */
4803 if (!network) {
4804 ipw_debug_config(priv);
4805
4806 queue_delayed_work(priv->workqueue, &priv->request_scan,
4807 SCAN_INTERVAL);
4808
4809 return;
4810 }
4811
4812 ipw_associate_network(priv, network, rates, 0);
4813}
4814
4815static inline void ipw_handle_data_packet(struct ipw_priv *priv,
4816 struct ipw_rx_mem_buffer *rxb,
4817 struct ieee80211_rx_stats *stats)
4818{
4819 struct ipw_rx_packet *pkt = (struct ipw_rx_packet *)rxb->skb->data;
4820
4821 /* We received data from the HW, so stop the watchdog */
4822 priv->net_dev->trans_start = jiffies;
4823
4824 /* We only process data packets if the
4825 * interface is open */
4826 if (unlikely((pkt->u.frame.length + IPW_RX_FRAME_SIZE) >
4827 skb_tailroom(rxb->skb))) {
4828 priv->ieee->stats.rx_errors++;
4829 priv->wstats.discard.misc++;
4830 IPW_DEBUG_DROP("Corruption detected! Oh no!\n");
4831 return;
4832 } else if (unlikely(!netif_running(priv->net_dev))) {
4833 priv->ieee->stats.rx_dropped++;
4834 priv->wstats.discard.misc++;
4835 IPW_DEBUG_DROP("Dropping packet while interface is not up.\n");
4836 return;
4837 }
4838
4839 /* Advance skb->data to the start of the actual payload */
4840 skb_reserve(rxb->skb, offsetof(struct ipw_rx_packet, u.frame.data));
4841
4842 /* Set the size of the skb to the size of the frame */
4843 skb_put(rxb->skb, pkt->u.frame.length);
4844
4845 IPW_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
4846
4847 if (!ieee80211_rx(priv->ieee, rxb->skb, stats))
4848 priv->ieee->stats.rx_errors++;
4849 else /* ieee80211_rx succeeded, so it now owns the SKB */
4850 rxb->skb = NULL;
4851}
4852
4853
4854/*
4855 * Main entry function for recieving a packet with 80211 headers. This
4856 * should be called when ever the FW has notified us that there is a new
4857 * skb in the recieve queue.
4858 */
4859static void ipw_rx(struct ipw_priv *priv)
4860{
4861 struct ipw_rx_mem_buffer *rxb;
4862 struct ipw_rx_packet *pkt;
4863 struct ieee80211_hdr *header;
4864 u32 r, w, i;
4865 u8 network_packet;
4866
4867 r = ipw_read32(priv, CX2_RX_READ_INDEX);
4868 w = ipw_read32(priv, CX2_RX_WRITE_INDEX);
4869 i = (priv->rxq->processed + 1) % RX_QUEUE_SIZE;
4870
4871 while (i != r) {
4872 rxb = priv->rxq->queue[i];
4873#ifdef CONFIG_IPW_DEBUG
4874 if (unlikely(rxb == NULL)) {
4875 printk(KERN_CRIT "Queue not allocated!\n");
4876 break;
4877 }
4878#endif
4879 priv->rxq->queue[i] = NULL;
4880
4881 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4882 CX2_RX_BUF_SIZE,
4883 PCI_DMA_FROMDEVICE);
4884
4885 pkt = (struct ipw_rx_packet *)rxb->skb->data;
4886 IPW_DEBUG_RX("Packet: type=%02X seq=%02X bits=%02X\n",
4887 pkt->header.message_type,
4888 pkt->header.rx_seq_num,
4889 pkt->header.control_bits);
4890
4891 switch (pkt->header.message_type) {
4892 case RX_FRAME_TYPE: /* 802.11 frame */ {
4893 struct ieee80211_rx_stats stats = {
4894 .rssi = pkt->u.frame.rssi_dbm -
4895 IPW_RSSI_TO_DBM,
4896 .signal = pkt->u.frame.signal,
4897 .rate = pkt->u.frame.rate,
4898 .mac_time = jiffies,
4899 .received_channel =
4900 pkt->u.frame.received_channel,
4901 .freq = (pkt->u.frame.control & (1<<0)) ?
4902 IEEE80211_24GHZ_BAND : IEEE80211_52GHZ_BAND,
4903 .len = pkt->u.frame.length,
4904 };
4905
4906 if (stats.rssi != 0)
4907 stats.mask |= IEEE80211_STATMASK_RSSI;
4908 if (stats.signal != 0)
4909 stats.mask |= IEEE80211_STATMASK_SIGNAL;
4910 if (stats.rate != 0)
4911 stats.mask |= IEEE80211_STATMASK_RATE;
4912
4913 priv->rx_packets++;
4914
4915#ifdef CONFIG_IPW_PROMISC
4916 if (priv->ieee->iw_mode == IW_MODE_MONITOR) {
4917 ipw_handle_data_packet(priv, rxb, &stats);
4918 break;
4919 }
4920#endif
4921
4922 header = (struct ieee80211_hdr *)(rxb->skb->data +
4923 IPW_RX_FRAME_SIZE);
4924 /* TODO: Check Ad-Hoc dest/source and make sure
4925 * that we are actually parsing these packets
4926 * correctly -- we should probably use the
4927 * frame control of the packet and disregard
4928 * the current iw_mode */
4929 switch (priv->ieee->iw_mode) {
4930 case IW_MODE_ADHOC:
4931 network_packet =
4932 !memcmp(header->addr1,
4933 priv->net_dev->dev_addr,
4934 ETH_ALEN) ||
4935 !memcmp(header->addr3,
4936 priv->bssid, ETH_ALEN) ||
4937 is_broadcast_ether_addr(header->addr1) ||
4938 is_multicast_ether_addr(header->addr1);
4939 break;
4940
4941 case IW_MODE_INFRA:
4942 default:
4943 network_packet =
4944 !memcmp(header->addr3,
4945 priv->bssid, ETH_ALEN) ||
4946 !memcmp(header->addr1,
4947 priv->net_dev->dev_addr,
4948 ETH_ALEN) ||
4949 is_broadcast_ether_addr(header->addr1) ||
4950 is_multicast_ether_addr(header->addr1);
4951 break;
4952 }
4953
4954 if (network_packet && priv->assoc_network) {
4955 priv->assoc_network->stats.rssi = stats.rssi;
4956 average_add(&priv->average_rssi,
4957 stats.rssi);
4958 priv->last_rx_rssi = stats.rssi;
4959 }
4960
4961 IPW_DEBUG_RX("Frame: len=%u\n", pkt->u.frame.length);
4962
4963 if (pkt->u.frame.length < frame_hdr_len(header)) {
4964 IPW_DEBUG_DROP("Received packet is too small. "
4965 "Dropping.\n");
4966 priv->ieee->stats.rx_errors++;
4967 priv->wstats.discard.misc++;
4968 break;
4969 }
4970
4971 switch (WLAN_FC_GET_TYPE(header->frame_ctl)) {
4972 case IEEE80211_FTYPE_MGMT:
4973 ieee80211_rx_mgt(priv->ieee, header, &stats);
4974 if (priv->ieee->iw_mode == IW_MODE_ADHOC &&
4975 ((WLAN_FC_GET_STYPE(header->frame_ctl) ==
4976 IEEE80211_STYPE_PROBE_RESP) ||
4977 (WLAN_FC_GET_STYPE(header->frame_ctl) ==
4978 IEEE80211_STYPE_BEACON)) &&
4979 !memcmp(header->addr3, priv->bssid, ETH_ALEN))
4980 ipw_add_station(priv, header->addr2);
4981 break;
4982
4983 case IEEE80211_FTYPE_CTL:
4984 break;
4985
4986 case IEEE80211_FTYPE_DATA:
4987 if (network_packet)
4988 ipw_handle_data_packet(priv, rxb, &stats);
4989 else
4990 IPW_DEBUG_DROP("Dropping: " MAC_FMT
4991 ", " MAC_FMT ", " MAC_FMT "\n",
4992 MAC_ARG(header->addr1), MAC_ARG(header->addr2),
4993 MAC_ARG(header->addr3));
4994 break;
4995 }
4996 break;
4997 }
4998
4999 case RX_HOST_NOTIFICATION_TYPE: {
5000 IPW_DEBUG_RX("Notification: subtype=%02X flags=%02X size=%d\n",
5001 pkt->u.notification.subtype,
5002 pkt->u.notification.flags,
5003 pkt->u.notification.size);
5004 ipw_rx_notification(priv, &pkt->u.notification);
5005 break;
5006 }
5007
5008 default:
5009 IPW_DEBUG_RX("Bad Rx packet of type %d\n",
5010 pkt->header.message_type);
5011 break;
5012 }
5013
5014 /* For now we just don't re-use anything. We can tweak this
5015 * later to try and re-use notification packets and SKBs that
5016 * fail to Rx correctly */
5017 if (rxb->skb != NULL) {
5018 dev_kfree_skb_any(rxb->skb);
5019 rxb->skb = NULL;
5020 }
5021
5022 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
5023 CX2_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
5024 list_add_tail(&rxb->list, &priv->rxq->rx_used);
5025
5026 i = (i + 1) % RX_QUEUE_SIZE;
5027 }
5028
5029 /* Backtrack one entry */
5030 priv->rxq->processed = (i ? i : RX_QUEUE_SIZE) - 1;
5031
5032 ipw_rx_queue_restock(priv);
5033}
5034
5035static void ipw_abort_scan(struct ipw_priv *priv)
5036{
5037 int err;
5038
5039 if (priv->status & STATUS_SCAN_ABORTING) {
5040 IPW_DEBUG_HC("Ignoring concurrent scan abort request.\n");
5041 return;
5042 }
5043 priv->status |= STATUS_SCAN_ABORTING;
5044
5045 err = ipw_send_scan_abort(priv);
5046 if (err)
5047 IPW_DEBUG_HC("Request to abort scan failed.\n");
5048}
5049
5050static int ipw_request_scan(struct ipw_priv *priv)
5051{
5052 struct ipw_scan_request_ext scan;
5053 int channel_index = 0;
5054 int i, err, scan_type;
5055
5056 if (priv->status & STATUS_EXIT_PENDING) {
5057 IPW_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5058 priv->status |= STATUS_SCAN_PENDING;
5059 return 0;
5060 }
5061
5062 if (priv->status & STATUS_SCANNING) {
5063 IPW_DEBUG_HC("Concurrent scan requested. Aborting first.\n");
5064 priv->status |= STATUS_SCAN_PENDING;
5065 ipw_abort_scan(priv);
5066 return 0;
5067 }
5068
5069 if (priv->status & STATUS_SCAN_ABORTING) {
5070 IPW_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5071 priv->status |= STATUS_SCAN_PENDING;
5072 return 0;
5073 }
5074
5075 if (priv->status & STATUS_RF_KILL_MASK) {
5076 IPW_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5077 priv->status |= STATUS_SCAN_PENDING;
5078 return 0;
5079 }
5080
5081 memset(&scan, 0, sizeof(scan));
5082
5083 scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_SCAN] = 20;
5084 scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN] = 20;
5085 scan.dwell_time[IPW_SCAN_PASSIVE_FULL_DWELL_SCAN] = 20;
5086
5087 scan.full_scan_index = ieee80211_get_scans(priv->ieee);
5088 /* If we are roaming, then make this a directed scan for the current
5089 * network. Otherwise, ensure that every other scan is a fast
5090 * channel hop scan */
5091 if ((priv->status & STATUS_ROAMING) || (
5092 !(priv->status & STATUS_ASSOCIATED) &&
5093 (priv->config & CFG_STATIC_ESSID) &&
5094 (scan.full_scan_index % 2))) {
5095 err = ipw_send_ssid(priv, priv->essid, priv->essid_len);
5096 if (err) {
5097 IPW_DEBUG_HC("Attempt to send SSID command failed.\n");
5098 return err;
5099 }
5100
5101 scan_type = IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN;
5102 } else {
5103 scan_type = IPW_SCAN_ACTIVE_BROADCAST_SCAN;
5104 }
5105
5106 if (priv->ieee->freq_band & IEEE80211_52GHZ_BAND) {
5107 int start = channel_index;
5108 for (i = 0; i < MAX_A_CHANNELS; i++) {
5109 if (band_a_active_channel[i] == 0)
5110 break;
5111 if ((priv->status & STATUS_ASSOCIATED) &&
5112 band_a_active_channel[i] == priv->channel)
5113 continue;
5114 channel_index++;
5115 scan.channels_list[channel_index] =
5116 band_a_active_channel[i];
5117 ipw_set_scan_type(&scan, channel_index, scan_type);
5118 }
5119
5120 if (start != channel_index) {
5121 scan.channels_list[start] = (u8)(IPW_A_MODE << 6) |
5122 (channel_index - start);
5123 channel_index++;
5124 }
5125 }
5126
5127 if (priv->ieee->freq_band & IEEE80211_24GHZ_BAND) {
5128 int start = channel_index;
5129 for (i = 0; i < MAX_B_CHANNELS; i++) {
5130 if (band_b_active_channel[i] == 0)
5131 break;
5132 if ((priv->status & STATUS_ASSOCIATED) &&
5133 band_b_active_channel[i] == priv->channel)
5134 continue;
5135 channel_index++;
5136 scan.channels_list[channel_index] =
5137 band_b_active_channel[i];
5138 ipw_set_scan_type(&scan, channel_index, scan_type);
5139 }
5140
5141 if (start != channel_index) {
5142 scan.channels_list[start] = (u8)(IPW_B_MODE << 6) |
5143 (channel_index - start);
5144 }
5145 }
5146
5147 err = ipw_send_scan_request_ext(priv, &scan);
5148 if (err) {
5149 IPW_DEBUG_HC("Sending scan command failed: %08X\n",
5150 err);
5151 return -EIO;
5152 }
5153
5154 priv->status |= STATUS_SCANNING;
5155 priv->status &= ~STATUS_SCAN_PENDING;
5156
5157 return 0;
5158}
5159
5160/*
5161 * This file defines the Wireless Extension handlers. It does not
5162 * define any methods of hardware manipulation and relies on the
5163 * functions defined in ipw_main to provide the HW interaction.
5164 *
5165 * The exception to this is the use of the ipw_get_ordinal()
5166 * function used to poll the hardware vs. making unecessary calls.
5167 *
5168 */
5169
5170static int ipw_wx_get_name(struct net_device *dev,
5171 struct iw_request_info *info,
5172 union iwreq_data *wrqu, char *extra)
5173{
5174 struct ipw_priv *priv = ieee80211_priv(dev);
5175 if (!(priv->status & STATUS_ASSOCIATED))
5176 strcpy(wrqu->name, "unassociated");
5177 else
5178 snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c",
5179 ipw_modes[priv->assoc_request.ieee_mode]);
5180 IPW_DEBUG_WX("Name: %s\n", wrqu->name);
5181 return 0;
5182}
5183
5184static int ipw_set_channel(struct ipw_priv *priv, u8 channel)
5185{
5186 if (channel == 0) {
5187 IPW_DEBUG_INFO("Setting channel to ANY (0)\n");
5188 priv->config &= ~CFG_STATIC_CHANNEL;
5189 if (!(priv->status & (STATUS_SCANNING | STATUS_ASSOCIATED |
5190 STATUS_ASSOCIATING))) {
5191 IPW_DEBUG_ASSOC("Attempting to associate with new "
5192 "parameters.\n");
5193 ipw_associate(priv);
5194 }
5195
5196 return 0;
5197 }
5198
5199 priv->config |= CFG_STATIC_CHANNEL;
5200
5201 if (priv->channel == channel) {
5202 IPW_DEBUG_INFO(
5203 "Request to set channel to current value (%d)\n",
5204 channel);
5205 return 0;
5206 }
5207
5208 IPW_DEBUG_INFO("Setting channel to %i\n", (int)channel);
5209 priv->channel = channel;
5210
5211 /* If we are currently associated, or trying to associate
5212 * then see if this is a new channel (causing us to disassociate) */
5213 if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
5214 IPW_DEBUG_ASSOC("Disassociating due to channel change.\n");
5215 ipw_disassociate(priv);
5216 } else {
5217 ipw_associate(priv);
5218 }
5219
5220 return 0;
5221}
5222
5223static int ipw_wx_set_freq(struct net_device *dev,
5224 struct iw_request_info *info,
5225 union iwreq_data *wrqu, char *extra)
5226{
5227 struct ipw_priv *priv = ieee80211_priv(dev);
5228 struct iw_freq *fwrq = &wrqu->freq;
5229
5230 /* if setting by freq convert to channel */
5231 if (fwrq->e == 1) {
5232 if ((fwrq->m >= (int) 2.412e8 &&
5233 fwrq->m <= (int) 2.487e8)) {
5234 int f = fwrq->m / 100000;
5235 int c = 0;
5236
5237 while ((c < REG_MAX_CHANNEL) &&
5238 (f != ipw_frequencies[c]))
5239 c++;
5240
5241 /* hack to fall through */
5242 fwrq->e = 0;
5243 fwrq->m = c + 1;
5244 }
5245 }
5246
5247 if (fwrq->e > 0 || fwrq->m > 1000)
5248 return -EOPNOTSUPP;
5249
5250 IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m);
5251 return ipw_set_channel(priv, (u8)fwrq->m);
5252
5253 return 0;
5254}
5255
5256
5257static int ipw_wx_get_freq(struct net_device *dev,
5258 struct iw_request_info *info,
5259 union iwreq_data *wrqu, char *extra)
5260{
5261 struct ipw_priv *priv = ieee80211_priv(dev);
5262
5263 wrqu->freq.e = 0;
5264
5265 /* If we are associated, trying to associate, or have a statically
5266 * configured CHANNEL then return that; otherwise return ANY */
5267 if (priv->config & CFG_STATIC_CHANNEL ||
5268 priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED))
5269 wrqu->freq.m = priv->channel;
5270 else
5271 wrqu->freq.m = 0;
5272
5273 IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel);
5274 return 0;
5275}
5276
5277static int ipw_wx_set_mode(struct net_device *dev,
5278 struct iw_request_info *info,
5279 union iwreq_data *wrqu, char *extra)
5280{
5281 struct ipw_priv *priv = ieee80211_priv(dev);
5282 int err = 0;
5283
5284 IPW_DEBUG_WX("Set MODE: %d\n", wrqu->mode);
5285
5286 if (wrqu->mode == priv->ieee->iw_mode)
5287 return 0;
5288
5289 switch (wrqu->mode) {
5290#ifdef CONFIG_IPW_PROMISC
5291 case IW_MODE_MONITOR:
5292#endif
5293 case IW_MODE_ADHOC:
5294 case IW_MODE_INFRA:
5295 break;
5296 case IW_MODE_AUTO:
5297 wrqu->mode = IW_MODE_INFRA;
5298 break;
5299 default:
5300 return -EINVAL;
5301 }
5302
5303#ifdef CONFIG_IPW_PROMISC
5304 if (priv->ieee->iw_mode == IW_MODE_MONITOR)
5305 priv->net_dev->type = ARPHRD_ETHER;
5306
5307 if (wrqu->mode == IW_MODE_MONITOR)
5308 priv->net_dev->type = ARPHRD_IEEE80211;
5309#endif /* CONFIG_IPW_PROMISC */
5310
5311#ifdef CONFIG_PM
5312 /* Free the existing firmware and reset the fw_loaded
5313 * flag so ipw_load() will bring in the new firmawre */
5314 if (fw_loaded) {
5315 fw_loaded = 0;
5316 }
5317
5318 release_firmware(bootfw);
5319 release_firmware(ucode);
5320 release_firmware(firmware);
5321 bootfw = ucode = firmware = NULL;
5322#endif
5323
5324 priv->ieee->iw_mode = wrqu->mode;
5325 ipw_adapter_restart(priv);
5326
5327 return err;
5328}
5329
5330static int ipw_wx_get_mode(struct net_device *dev,
5331 struct iw_request_info *info,
5332 union iwreq_data *wrqu, char *extra)
5333{
5334 struct ipw_priv *priv = ieee80211_priv(dev);
5335
5336 wrqu->mode = priv->ieee->iw_mode;
5337 IPW_DEBUG_WX("Get MODE -> %d\n", wrqu->mode);
5338
5339 return 0;
5340}
5341
5342
5343#define DEFAULT_RTS_THRESHOLD 2304U
5344#define MIN_RTS_THRESHOLD 1U
5345#define MAX_RTS_THRESHOLD 2304U
5346#define DEFAULT_BEACON_INTERVAL 100U
5347#define DEFAULT_SHORT_RETRY_LIMIT 7U
5348#define DEFAULT_LONG_RETRY_LIMIT 4U
5349
5350/* Values are in microsecond */
5351static const s32 timeout_duration[] = {
5352 350000,
5353 250000,
5354 75000,
5355 37000,
5356 25000,
5357};
5358
5359static const s32 period_duration[] = {
5360 400000,
5361 700000,
5362 1000000,
5363 1000000,
5364 1000000
5365};
5366
5367static int ipw_wx_get_range(struct net_device *dev,
5368 struct iw_request_info *info,
5369 union iwreq_data *wrqu, char *extra)
5370{
5371 struct ipw_priv *priv = ieee80211_priv(dev);
5372 struct iw_range *range = (struct iw_range *)extra;
5373 u16 val;
5374 int i;
5375
5376 wrqu->data.length = sizeof(*range);
5377 memset(range, 0, sizeof(*range));
5378
5379 /* 54Mbs == ~27 Mb/s real (802.11g) */
5380 range->throughput = 27 * 1000 * 1000;
5381
5382 range->max_qual.qual = 100;
5383 /* TODO: Find real max RSSI and stick here */
5384 range->max_qual.level = 0;
5385 range->max_qual.noise = 0;
5386 range->max_qual.updated = 7; /* Updated all three */
5387
5388 range->avg_qual.qual = 70;
5389 /* TODO: Find real 'good' to 'bad' threshol value for RSSI */
5390 range->avg_qual.level = 0; /* FIXME to real average level */
5391 range->avg_qual.noise = 0;
5392 range->avg_qual.updated = 7; /* Updated all three */
5393
5394 range->num_bitrates = min(priv->rates.num_rates, (u8)IW_MAX_BITRATES);
5395
5396 for (i = 0; i < range->num_bitrates; i++)
5397 range->bitrate[i] = (priv->rates.supported_rates[i] & 0x7F) *
5398 500000;
5399
5400 range->max_rts = DEFAULT_RTS_THRESHOLD;
5401 range->min_frag = MIN_FRAG_THRESHOLD;
5402 range->max_frag = MAX_FRAG_THRESHOLD;
5403
5404 range->encoding_size[0] = 5;
5405 range->encoding_size[1] = 13;
5406 range->num_encoding_sizes = 2;
5407 range->max_encoding_tokens = WEP_KEYS;
5408
5409 /* Set the Wireless Extension versions */
5410 range->we_version_compiled = WIRELESS_EXT;
5411 range->we_version_source = 16;
5412
5413 range->num_channels = FREQ_COUNT;
5414
5415 val = 0;
5416 for (i = 0; i < FREQ_COUNT; i++) {
5417 range->freq[val].i = i + 1;
5418 range->freq[val].m = ipw_frequencies[i] * 100000;
5419 range->freq[val].e = 1;
5420 val++;
5421
5422 if (val == IW_MAX_FREQUENCIES)
5423 break;
5424 }
5425 range->num_frequency = val;
5426
5427 IPW_DEBUG_WX("GET Range\n");
5428 return 0;
5429}
5430
5431static int ipw_wx_set_wap(struct net_device *dev,
5432 struct iw_request_info *info,
5433 union iwreq_data *wrqu, char *extra)
5434{
5435 struct ipw_priv *priv = ieee80211_priv(dev);
5436
5437 static const unsigned char any[] = {
5438 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
5439 };
5440 static const unsigned char off[] = {
5441 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5442 };
5443
5444 if (wrqu->ap_addr.sa_family != ARPHRD_ETHER)
5445 return -EINVAL;
5446
5447 if (!memcmp(any, wrqu->ap_addr.sa_data, ETH_ALEN) ||
5448 !memcmp(off, wrqu->ap_addr.sa_data, ETH_ALEN)) {
5449 /* we disable mandatory BSSID association */
5450 IPW_DEBUG_WX("Setting AP BSSID to ANY\n");
5451 priv->config &= ~CFG_STATIC_BSSID;
5452 if (!(priv->status & (STATUS_SCANNING | STATUS_ASSOCIATED |
5453 STATUS_ASSOCIATING))) {
5454 IPW_DEBUG_ASSOC("Attempting to associate with new "
5455 "parameters.\n");
5456 ipw_associate(priv);
5457 }
5458
5459 return 0;
5460 }
5461
5462 priv->config |= CFG_STATIC_BSSID;
5463 if (!memcmp(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN)) {
5464 IPW_DEBUG_WX("BSSID set to current BSSID.\n");
5465 return 0;
5466 }
5467
5468 IPW_DEBUG_WX("Setting mandatory BSSID to " MAC_FMT "\n",
5469 MAC_ARG(wrqu->ap_addr.sa_data));
5470
5471 memcpy(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN);
5472
5473 /* If we are currently associated, or trying to associate
5474 * then see if this is a new BSSID (causing us to disassociate) */
5475 if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
5476 IPW_DEBUG_ASSOC("Disassociating due to BSSID change.\n");
5477 ipw_disassociate(priv);
5478 } else {
5479 ipw_associate(priv);
5480 }
5481
5482 return 0;
5483}
5484
5485static int ipw_wx_get_wap(struct net_device *dev,
5486 struct iw_request_info *info,
5487 union iwreq_data *wrqu, char *extra)
5488{
5489 struct ipw_priv *priv = ieee80211_priv(dev);
5490 /* If we are associated, trying to associate, or have a statically
5491 * configured BSSID then return that; otherwise return ANY */
5492 if (priv->config & CFG_STATIC_BSSID ||
5493 priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
5494 wrqu->ap_addr.sa_family = ARPHRD_ETHER;
5495 memcpy(wrqu->ap_addr.sa_data, &priv->bssid, ETH_ALEN);
5496 } else
5497 memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
5498
5499 IPW_DEBUG_WX("Getting WAP BSSID: " MAC_FMT "\n",
5500 MAC_ARG(wrqu->ap_addr.sa_data));
5501 return 0;
5502}
5503
5504static int ipw_wx_set_essid(struct net_device *dev,
5505 struct iw_request_info *info,
5506 union iwreq_data *wrqu, char *extra)
5507{
5508 struct ipw_priv *priv = ieee80211_priv(dev);
5509 char *essid = ""; /* ANY */
5510 int length = 0;
5511
5512 if (wrqu->essid.flags && wrqu->essid.length) {
5513 length = wrqu->essid.length - 1;
5514 essid = extra;
5515 }
5516 if (length == 0) {
5517 IPW_DEBUG_WX("Setting ESSID to ANY\n");
5518 priv->config &= ~CFG_STATIC_ESSID;
5519 if (!(priv->status & (STATUS_SCANNING | STATUS_ASSOCIATED |
5520 STATUS_ASSOCIATING))) {
5521 IPW_DEBUG_ASSOC("Attempting to associate with new "
5522 "parameters.\n");
5523 ipw_associate(priv);
5524 }
5525
5526 return 0;
5527 }
5528
5529 length = min(length, IW_ESSID_MAX_SIZE);
5530
5531 priv->config |= CFG_STATIC_ESSID;
5532
5533 if (priv->essid_len == length && !memcmp(priv->essid, extra, length)) {
5534 IPW_DEBUG_WX("ESSID set to current ESSID.\n");
5535 return 0;
5536 }
5537
5538 IPW_DEBUG_WX("Setting ESSID: '%s' (%d)\n", escape_essid(essid, length),
5539 length);
5540
5541 priv->essid_len = length;
5542 memcpy(priv->essid, essid, priv->essid_len);
5543
5544 /* If we are currently associated, or trying to associate
5545 * then see if this is a new ESSID (causing us to disassociate) */
5546 if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
5547 IPW_DEBUG_ASSOC("Disassociating due to ESSID change.\n");
5548 ipw_disassociate(priv);
5549 } else {
5550 ipw_associate(priv);
5551 }
5552
5553 return 0;
5554}
5555
5556static int ipw_wx_get_essid(struct net_device *dev,
5557 struct iw_request_info *info,
5558 union iwreq_data *wrqu, char *extra)
5559{
5560 struct ipw_priv *priv = ieee80211_priv(dev);
5561
5562 /* If we are associated, trying to associate, or have a statically
5563 * configured ESSID then return that; otherwise return ANY */
5564 if (priv->config & CFG_STATIC_ESSID ||
5565 priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
5566 IPW_DEBUG_WX("Getting essid: '%s'\n",
5567 escape_essid(priv->essid, priv->essid_len));
5568 memcpy(extra, priv->essid, priv->essid_len);
5569 wrqu->essid.length = priv->essid_len;
5570 wrqu->essid.flags = 1; /* active */
5571 } else {
5572 IPW_DEBUG_WX("Getting essid: ANY\n");
5573 wrqu->essid.length = 0;
5574 wrqu->essid.flags = 0; /* active */
5575 }
5576
5577 return 0;
5578}
5579
5580static int ipw_wx_set_nick(struct net_device *dev,
5581 struct iw_request_info *info,
5582 union iwreq_data *wrqu, char *extra)
5583{
5584 struct ipw_priv *priv = ieee80211_priv(dev);
5585
5586 IPW_DEBUG_WX("Setting nick to '%s'\n", extra);
5587 if (wrqu->data.length > IW_ESSID_MAX_SIZE)
5588 return -E2BIG;
5589
5590 wrqu->data.length = min((size_t)wrqu->data.length, sizeof(priv->nick));
5591 memset(priv->nick, 0, sizeof(priv->nick));
5592 memcpy(priv->nick, extra, wrqu->data.length);
5593 IPW_DEBUG_TRACE("<<\n");
5594 return 0;
5595
5596}
5597
5598
5599static int ipw_wx_get_nick(struct net_device *dev,
5600 struct iw_request_info *info,
5601 union iwreq_data *wrqu, char *extra)
5602{
5603 struct ipw_priv *priv = ieee80211_priv(dev);
5604 IPW_DEBUG_WX("Getting nick\n");
5605 wrqu->data.length = strlen(priv->nick) + 1;
5606 memcpy(extra, priv->nick, wrqu->data.length);
5607 wrqu->data.flags = 1; /* active */
5608 return 0;
5609}
5610
5611
5612static int ipw_wx_set_rate(struct net_device *dev,
5613 struct iw_request_info *info,
5614 union iwreq_data *wrqu, char *extra)
5615{
5616 IPW_DEBUG_WX("0x%p, 0x%p, 0x%p\n", dev, info, wrqu);
5617 return -EOPNOTSUPP;
5618}
5619
5620static int ipw_wx_get_rate(struct net_device *dev,
5621 struct iw_request_info *info,
5622 union iwreq_data *wrqu, char *extra)
5623{
5624 struct ipw_priv * priv = ieee80211_priv(dev);
5625 wrqu->bitrate.value = priv->last_rate;
5626
5627 IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value);
5628 return 0;
5629}
5630
5631
5632static int ipw_wx_set_rts(struct net_device *dev,
5633 struct iw_request_info *info,
5634 union iwreq_data *wrqu, char *extra)
5635{
5636 struct ipw_priv *priv = ieee80211_priv(dev);
5637
5638 if (wrqu->rts.disabled)
5639 priv->rts_threshold = DEFAULT_RTS_THRESHOLD;
5640 else {
5641 if (wrqu->rts.value < MIN_RTS_THRESHOLD ||
5642 wrqu->rts.value > MAX_RTS_THRESHOLD)
5643 return -EINVAL;
5644
5645 priv->rts_threshold = wrqu->rts.value;
5646 }
5647
5648 ipw_send_rts_threshold(priv, priv->rts_threshold);
5649 IPW_DEBUG_WX("SET RTS Threshold -> %d \n", priv->rts_threshold);
5650 return 0;
5651}
5652
5653static int ipw_wx_get_rts(struct net_device *dev,
5654 struct iw_request_info *info,
5655 union iwreq_data *wrqu, char *extra)
5656{
5657 struct ipw_priv *priv = ieee80211_priv(dev);
5658 wrqu->rts.value = priv->rts_threshold;
5659 wrqu->rts.fixed = 0; /* no auto select */
5660 wrqu->rts.disabled =
5661 (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
5662
5663 IPW_DEBUG_WX("GET RTS Threshold -> %d \n", wrqu->rts.value);
5664 return 0;
5665}
5666
5667
5668static int ipw_wx_set_txpow(struct net_device *dev,
5669 struct iw_request_info *info,
5670 union iwreq_data *wrqu, char *extra)
5671{
5672 struct ipw_priv *priv = ieee80211_priv(dev);
5673 struct ipw_tx_power tx_power;
5674 int i;
5675
5676 if (ipw_radio_kill_sw(priv, wrqu->power.disabled))
5677 return -EINPROGRESS;
5678
5679 if (wrqu->power.flags != IW_TXPOW_DBM)
5680 return -EINVAL;
5681
5682 if ((wrqu->power.value > 20) ||
5683 (wrqu->power.value < -12))
5684 return -EINVAL;
5685
5686 priv->tx_power = wrqu->power.value;
5687
5688 memset(&tx_power, 0, sizeof(tx_power));
5689
5690 /* configure device for 'G' band */
5691 tx_power.ieee_mode = IPW_G_MODE;
5692 tx_power.num_channels = 11;
5693 for (i = 0; i < 11; i++) {
5694 tx_power.channels_tx_power[i].channel_number = i + 1;
5695 tx_power.channels_tx_power[i].tx_power = priv->tx_power;
5696 }
5697 if (ipw_send_tx_power(priv, &tx_power))
5698 goto error;
5699
5700 /* configure device to also handle 'B' band */
5701 tx_power.ieee_mode = IPW_B_MODE;
5702 if (ipw_send_tx_power(priv, &tx_power))
5703 goto error;
5704
5705 return 0;
5706
5707 error:
5708 return -EIO;
5709}
5710
5711
5712static int ipw_wx_get_txpow(struct net_device *dev,
5713 struct iw_request_info *info,
5714 union iwreq_data *wrqu, char *extra)
5715{
5716 struct ipw_priv *priv = ieee80211_priv(dev);
5717
5718 wrqu->power.value = priv->tx_power;
5719 wrqu->power.fixed = 1;
5720 wrqu->power.flags = IW_TXPOW_DBM;
5721 wrqu->power.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0;
5722
5723 IPW_DEBUG_WX("GET TX Power -> %s %d \n",
5724 wrqu->power.disabled ? "ON" : "OFF",
5725 wrqu->power.value);
5726
5727 return 0;
5728}
5729
5730static int ipw_wx_set_frag(struct net_device *dev,
5731 struct iw_request_info *info,
5732 union iwreq_data *wrqu, char *extra)
5733{
5734 struct ipw_priv *priv = ieee80211_priv(dev);
5735
5736 if (wrqu->frag.disabled)
5737 priv->ieee->fts = DEFAULT_FTS;
5738 else {
5739 if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
5740 wrqu->frag.value > MAX_FRAG_THRESHOLD)
5741 return -EINVAL;
5742
5743 priv->ieee->fts = wrqu->frag.value & ~0x1;
5744 }
5745
5746 ipw_send_frag_threshold(priv, wrqu->frag.value);
5747 IPW_DEBUG_WX("SET Frag Threshold -> %d \n", wrqu->frag.value);
5748 return 0;
5749}
5750
5751static int ipw_wx_get_frag(struct net_device *dev,
5752 struct iw_request_info *info,
5753 union iwreq_data *wrqu, char *extra)
5754{
5755 struct ipw_priv *priv = ieee80211_priv(dev);
5756 wrqu->frag.value = priv->ieee->fts;
5757 wrqu->frag.fixed = 0; /* no auto select */
5758 wrqu->frag.disabled =
5759 (wrqu->frag.value == DEFAULT_FTS);
5760
5761 IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value);
5762
5763 return 0;
5764}
5765
5766static int ipw_wx_set_retry(struct net_device *dev,
5767 struct iw_request_info *info,
5768 union iwreq_data *wrqu, char *extra)
5769{
5770 IPW_DEBUG_WX("0x%p, 0x%p, 0x%p\n", dev, info, wrqu);
5771 return -EOPNOTSUPP;
5772}
5773
5774
5775static int ipw_wx_get_retry(struct net_device *dev,
5776 struct iw_request_info *info,
5777 union iwreq_data *wrqu, char *extra)
5778{
5779 IPW_DEBUG_WX("0x%p, 0x%p, 0x%p\n", dev, info, wrqu);
5780 return -EOPNOTSUPP;
5781}
5782
5783
5784static int ipw_wx_set_scan(struct net_device *dev,
5785 struct iw_request_info *info,
5786 union iwreq_data *wrqu, char *extra)
5787{
5788 struct ipw_priv *priv = ieee80211_priv(dev);
5789 IPW_DEBUG_WX("Start scan\n");
5790 if (ipw_request_scan(priv))
5791 return -EIO;
5792 return 0;
5793}
5794
5795static int ipw_wx_get_scan(struct net_device *dev,
5796 struct iw_request_info *info,
5797 union iwreq_data *wrqu, char *extra)
5798{
5799 struct ipw_priv *priv = ieee80211_priv(dev);
5800 return ieee80211_wx_get_scan(priv->ieee, info, wrqu, extra);
5801}
5802
5803static int ipw_wx_set_encode(struct net_device *dev,
5804 struct iw_request_info *info,
5805 union iwreq_data *wrqu, char *key)
5806{
5807 struct ipw_priv *priv = ieee80211_priv(dev);
5808 return ieee80211_wx_set_encode(priv->ieee, info, wrqu, key);
5809}
5810
5811static int ipw_wx_get_encode(struct net_device *dev,
5812 struct iw_request_info *info,
5813 union iwreq_data *wrqu, char *key)
5814{
5815 struct ipw_priv *priv = ieee80211_priv(dev);
5816 return ieee80211_wx_get_encode(priv->ieee, info, wrqu, key);
5817}
5818
5819static int ipw_wx_set_power(struct net_device *dev,
5820 struct iw_request_info *info,
5821 union iwreq_data *wrqu, char *extra)
5822{
5823 struct ipw_priv *priv = ieee80211_priv(dev);
5824 int err;
5825
5826 if (wrqu->power.disabled) {
5827 priv->power_mode = IPW_POWER_LEVEL(priv->power_mode);
5828 err = ipw_send_power_mode(priv, IPW_POWER_MODE_CAM);
5829 if (err) {
5830 IPW_DEBUG_WX("failed setting power mode.\n");
5831 return err;
5832 }
5833
5834 IPW_DEBUG_WX("SET Power Management Mode -> off\n");
5835
5836 return 0;
5837 }
5838
5839 switch (wrqu->power.flags & IW_POWER_MODE) {
5840 case IW_POWER_ON: /* If not specified */
5841 case IW_POWER_MODE: /* If set all mask */
5842 case IW_POWER_ALL_R: /* If explicitely state all */
5843 break;
5844 default: /* Otherwise we don't support it */
5845 IPW_DEBUG_WX("SET PM Mode: %X not supported.\n",
5846 wrqu->power.flags);
5847 return -EOPNOTSUPP;
5848 }
5849
5850 /* If the user hasn't specified a power management mode yet, default
5851 * to BATTERY */
5852 if (IPW_POWER_LEVEL(priv->power_mode) == IPW_POWER_AC)
5853 priv->power_mode = IPW_POWER_ENABLED | IPW_POWER_BATTERY;
5854 else
5855 priv->power_mode = IPW_POWER_ENABLED | priv->power_mode;
5856 err = ipw_send_power_mode(priv, IPW_POWER_LEVEL(priv->power_mode));
5857 if (err) {
5858 IPW_DEBUG_WX("failed setting power mode.\n");
5859 return err;
5860 }
5861
5862 IPW_DEBUG_WX("SET Power Management Mode -> 0x%02X\n",
5863 priv->power_mode);
5864
5865 return 0;
5866}
5867
5868static int ipw_wx_get_power(struct net_device *dev,
5869 struct iw_request_info *info,
5870 union iwreq_data *wrqu, char *extra)
5871{
5872 struct ipw_priv *priv = ieee80211_priv(dev);
5873
5874 if (!(priv->power_mode & IPW_POWER_ENABLED)) {
5875 wrqu->power.disabled = 1;
5876 } else {
5877 wrqu->power.disabled = 0;
5878 }
5879
5880 IPW_DEBUG_WX("GET Power Management Mode -> %02X\n", priv->power_mode);
5881
5882 return 0;
5883}
5884
5885static int ipw_wx_set_powermode(struct net_device *dev,
5886 struct iw_request_info *info,
5887 union iwreq_data *wrqu, char *extra)
5888{
5889 struct ipw_priv *priv = ieee80211_priv(dev);
5890 int mode = *(int *)extra;
5891 int err;
5892
5893 if ((mode < 1) || (mode > IPW_POWER_LIMIT)) {
5894 mode = IPW_POWER_AC;
5895 priv->power_mode = mode;
5896 } else {
5897 priv->power_mode = IPW_POWER_ENABLED | mode;
5898 }
5899
5900 if (priv->power_mode != mode) {
5901 err = ipw_send_power_mode(priv, mode);
5902
5903 if (err) {
5904 IPW_DEBUG_WX("failed setting power mode.\n");
5905 return err;
5906 }
5907 }
5908
5909 return 0;
5910}
5911
5912#define MAX_WX_STRING 80
5913static int ipw_wx_get_powermode(struct net_device *dev,
5914 struct iw_request_info *info,
5915 union iwreq_data *wrqu, char *extra)
5916{
5917 struct ipw_priv *priv = ieee80211_priv(dev);
5918 int level = IPW_POWER_LEVEL(priv->power_mode);
5919 char *p = extra;
5920
5921 p += snprintf(p, MAX_WX_STRING, "Power save level: %d ", level);
5922
5923 switch (level) {
5924 case IPW_POWER_AC:
5925 p += snprintf(p, MAX_WX_STRING - (p - extra), "(AC)");
5926 break;
5927 case IPW_POWER_BATTERY:
5928 p += snprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)");
5929 break;
5930 default:
5931 p += snprintf(p, MAX_WX_STRING - (p - extra),
5932 "(Timeout %dms, Period %dms)",
5933 timeout_duration[level - 1] / 1000,
5934 period_duration[level - 1] / 1000);
5935 }
5936
5937 if (!(priv->power_mode & IPW_POWER_ENABLED))
5938 p += snprintf(p, MAX_WX_STRING - (p - extra)," OFF");
5939
5940 wrqu->data.length = p - extra + 1;
5941
5942 return 0;
5943}
5944
5945static int ipw_wx_set_wireless_mode(struct net_device *dev,
5946 struct iw_request_info *info,
5947 union iwreq_data *wrqu, char *extra)
5948{
5949 struct ipw_priv *priv = ieee80211_priv(dev);
5950 int mode = *(int *)extra;
5951 u8 band = 0, modulation = 0;
5952
5953 if (mode == 0 || mode & ~IEEE_MODE_MASK) {
5954 IPW_WARNING("Attempt to set invalid wireless mode: %d\n",
5955 mode);
5956 return -EINVAL;
5957 }
5958
5959 if (priv->adapter == IPW_2915ABG) {
5960 priv->ieee->abg_ture = 1;
5961 if (mode & IEEE_A) {
5962 band |= IEEE80211_52GHZ_BAND;
5963 modulation |= IEEE80211_OFDM_MODULATION;
5964 } else
5965 priv->ieee->abg_ture = 0;
5966 } else {
5967 if (mode & IEEE_A) {
5968 IPW_WARNING("Attempt to set 2200BG into "
5969 "802.11a mode\n");
5970 return -EINVAL;
5971 }
5972
5973 priv->ieee->abg_ture = 0;
5974 }
5975
5976 if (mode & IEEE_B) {
5977 band |= IEEE80211_24GHZ_BAND;
5978 modulation |= IEEE80211_CCK_MODULATION;
5979 } else
5980 priv->ieee->abg_ture = 0;
5981
5982 if (mode & IEEE_G) {
5983 band |= IEEE80211_24GHZ_BAND;
5984 modulation |= IEEE80211_OFDM_MODULATION;
5985 } else
5986 priv->ieee->abg_ture = 0;
5987
5988 priv->ieee->mode = mode;
5989 priv->ieee->freq_band = band;
5990 priv->ieee->modulation = modulation;
5991 init_supported_rates(priv, &priv->rates);
5992
5993 /* If we are currently associated, or trying to associate
5994 * then see if this is a new configuration (causing us to
5995 * disassociate) */
5996 if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
5997 /* The resulting association will trigger
5998 * the new rates to be sent to the device */
5999 IPW_DEBUG_ASSOC("Disassociating due to mode change.\n");
6000 ipw_disassociate(priv);
6001 } else
6002 ipw_send_supported_rates(priv, &priv->rates);
6003
6004 IPW_DEBUG_WX("PRIV SET MODE: %c%c%c\n",
6005 mode & IEEE_A ? 'a' : '.',
6006 mode & IEEE_B ? 'b' : '.',
6007 mode & IEEE_G ? 'g' : '.');
6008 return 0;
6009}
6010
6011static int ipw_wx_get_wireless_mode(struct net_device *dev,
6012 struct iw_request_info *info,
6013 union iwreq_data *wrqu, char *extra)
6014{
6015 struct ipw_priv *priv = ieee80211_priv(dev);
6016
6017 switch (priv->ieee->freq_band) {
6018 case IEEE80211_24GHZ_BAND:
6019 switch (priv->ieee->modulation) {
6020 case IEEE80211_CCK_MODULATION:
6021 strncpy(extra, "802.11b (2)", MAX_WX_STRING);
6022 break;
6023 case IEEE80211_OFDM_MODULATION:
6024 strncpy(extra, "802.11g (4)", MAX_WX_STRING);
6025 break;
6026 default:
6027 strncpy(extra, "802.11bg (6)", MAX_WX_STRING);
6028 break;
6029 }
6030 break;
6031
6032 case IEEE80211_52GHZ_BAND:
6033 strncpy(extra, "802.11a (1)", MAX_WX_STRING);
6034 break;
6035
6036 default: /* Mixed Band */
6037 switch (priv->ieee->modulation) {
6038 case IEEE80211_CCK_MODULATION:
6039 strncpy(extra, "802.11ab (3)", MAX_WX_STRING);
6040 break;
6041 case IEEE80211_OFDM_MODULATION:
6042 strncpy(extra, "802.11ag (5)", MAX_WX_STRING);
6043 break;
6044 default:
6045 strncpy(extra, "802.11abg (7)", MAX_WX_STRING);
6046 break;
6047 }
6048 break;
6049 }
6050
6051 IPW_DEBUG_WX("PRIV GET MODE: %s\n", extra);
6052
6053 wrqu->data.length = strlen(extra) + 1;
6054
6055 return 0;
6056}
6057
6058#ifdef CONFIG_IPW_PROMISC
6059static int ipw_wx_set_promisc(struct net_device *dev,
6060 struct iw_request_info *info,
6061 union iwreq_data *wrqu, char *extra)
6062{
6063 struct ipw_priv *priv = ieee80211_priv(dev);
6064 int *parms = (int *)extra;
6065 int enable = (parms[0] > 0);
6066
6067 IPW_DEBUG_WX("SET PROMISC: %d %d\n", enable, parms[1]);
6068 if (enable) {
6069 if (priv->ieee->iw_mode != IW_MODE_MONITOR) {
6070 priv->net_dev->type = ARPHRD_IEEE80211;
6071 ipw_adapter_restart(priv);
6072 }
6073
6074 ipw_set_channel(priv, parms[1]);
6075 } else {
6076 if (priv->ieee->iw_mode != IW_MODE_MONITOR)
6077 return 0;
6078 priv->net_dev->type = ARPHRD_ETHER;
6079 ipw_adapter_restart(priv);
6080 }
6081 return 0;
6082}
6083
6084
6085static int ipw_wx_reset(struct net_device *dev,
6086 struct iw_request_info *info,
6087 union iwreq_data *wrqu, char *extra)
6088{
6089 struct ipw_priv *priv = ieee80211_priv(dev);
6090 IPW_DEBUG_WX("RESET\n");
6091 ipw_adapter_restart(priv);
6092 return 0;
6093}
6094#endif // CONFIG_IPW_PROMISC
6095
6096/* Rebase the WE IOCTLs to zero for the handler array */
6097#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
6098static iw_handler ipw_wx_handlers[] =
6099{
6100 IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name,
6101 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq,
6102 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq,
6103 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode,
6104 IW_IOCTL(SIOCGIWMODE) = ipw_wx_get_mode,
6105 IW_IOCTL(SIOCGIWRANGE) = ipw_wx_get_range,
6106 IW_IOCTL(SIOCSIWAP) = ipw_wx_set_wap,
6107 IW_IOCTL(SIOCGIWAP) = ipw_wx_get_wap,
6108 IW_IOCTL(SIOCSIWSCAN) = ipw_wx_set_scan,
6109 IW_IOCTL(SIOCGIWSCAN) = ipw_wx_get_scan,
6110 IW_IOCTL(SIOCSIWESSID) = ipw_wx_set_essid,
6111 IW_IOCTL(SIOCGIWESSID) = ipw_wx_get_essid,
6112 IW_IOCTL(SIOCSIWNICKN) = ipw_wx_set_nick,
6113 IW_IOCTL(SIOCGIWNICKN) = ipw_wx_get_nick,
6114 IW_IOCTL(SIOCSIWRATE) = ipw_wx_set_rate,
6115 IW_IOCTL(SIOCGIWRATE) = ipw_wx_get_rate,
6116 IW_IOCTL(SIOCSIWRTS) = ipw_wx_set_rts,
6117 IW_IOCTL(SIOCGIWRTS) = ipw_wx_get_rts,
6118 IW_IOCTL(SIOCSIWFRAG) = ipw_wx_set_frag,
6119 IW_IOCTL(SIOCGIWFRAG) = ipw_wx_get_frag,
6120 IW_IOCTL(SIOCSIWTXPOW) = ipw_wx_set_txpow,
6121 IW_IOCTL(SIOCGIWTXPOW) = ipw_wx_get_txpow,
6122 IW_IOCTL(SIOCSIWRETRY) = ipw_wx_set_retry,
6123 IW_IOCTL(SIOCGIWRETRY) = ipw_wx_get_retry,
6124 IW_IOCTL(SIOCSIWENCODE) = ipw_wx_set_encode,
6125 IW_IOCTL(SIOCGIWENCODE) = ipw_wx_get_encode,
6126 IW_IOCTL(SIOCSIWPOWER) = ipw_wx_set_power,
6127 IW_IOCTL(SIOCGIWPOWER) = ipw_wx_get_power,
6128};
6129
6130#define IPW_PRIV_SET_POWER SIOCIWFIRSTPRIV
6131#define IPW_PRIV_GET_POWER SIOCIWFIRSTPRIV+1
6132#define IPW_PRIV_SET_MODE SIOCIWFIRSTPRIV+2
6133#define IPW_PRIV_GET_MODE SIOCIWFIRSTPRIV+3
6134#define IPW_PRIV_SET_PROMISC SIOCIWFIRSTPRIV+4
6135#define IPW_PRIV_RESET SIOCIWFIRSTPRIV+5
6136
6137
6138static struct iw_priv_args ipw_priv_args[] = {
6139 {
6140 .cmd = IPW_PRIV_SET_POWER,
6141 .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
6142 .name = "set_power"
6143 },
6144 {
6145 .cmd = IPW_PRIV_GET_POWER,
6146 .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING,
6147 .name = "get_power"
6148 },
6149 {
6150 .cmd = IPW_PRIV_SET_MODE,
6151 .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
6152 .name = "set_mode"
6153 },
6154 {
6155 .cmd = IPW_PRIV_GET_MODE,
6156 .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING,
6157 .name = "get_mode"
6158 },
6159#ifdef CONFIG_IPW_PROMISC
6160 {
6161 IPW_PRIV_SET_PROMISC,
6162 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "monitor"
6163 },
6164 {
6165 IPW_PRIV_RESET,
6166 IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 0, 0, "reset"
6167 },
6168#endif /* CONFIG_IPW_PROMISC */
6169};
6170
6171static iw_handler ipw_priv_handler[] = {
6172 ipw_wx_set_powermode,
6173 ipw_wx_get_powermode,
6174 ipw_wx_set_wireless_mode,
6175 ipw_wx_get_wireless_mode,
6176#ifdef CONFIG_IPW_PROMISC
6177 ipw_wx_set_promisc,
6178 ipw_wx_reset,
6179#endif
6180};
6181
6182static struct iw_handler_def ipw_wx_handler_def =
6183{
6184 .standard = ipw_wx_handlers,
6185 .num_standard = ARRAY_SIZE(ipw_wx_handlers),
6186 .num_private = ARRAY_SIZE(ipw_priv_handler),
6187 .num_private_args = ARRAY_SIZE(ipw_priv_args),
6188 .private = ipw_priv_handler,
6189 .private_args = ipw_priv_args,
6190};
6191
6192
6193
6194
6195/*
6196 * Get wireless statistics.
6197 * Called by /proc/net/wireless
6198 * Also called by SIOCGIWSTATS
6199 */
6200static struct iw_statistics *ipw_get_wireless_stats(struct net_device * dev)
6201{
6202 struct ipw_priv *priv = ieee80211_priv(dev);
6203 struct iw_statistics *wstats;
6204
6205 wstats = &priv->wstats;
6206
6207 /* if hw is disabled, then ipw2100_get_ordinal() can't be called.
6208 * ipw2100_wx_wireless_stats seems to be called before fw is
6209 * initialized. STATUS_ASSOCIATED will only be set if the hw is up
6210 * and associated; if not associcated, the values are all meaningless
6211 * anyway, so set them all to NULL and INVALID */
6212 if (!(priv->status & STATUS_ASSOCIATED)) {
6213 wstats->miss.beacon = 0;
6214 wstats->discard.retries = 0;
6215 wstats->qual.qual = 0;
6216 wstats->qual.level = 0;
6217 wstats->qual.noise = 0;
6218 wstats->qual.updated = 7;
6219 wstats->qual.updated |= IW_QUAL_NOISE_INVALID |
6220 IW_QUAL_QUAL_INVALID | IW_QUAL_LEVEL_INVALID;
6221 return wstats;
6222 }
6223
6224 wstats->qual.qual = priv->quality;
6225 wstats->qual.level = average_value(&priv->average_rssi);
6226 wstats->qual.noise = average_value(&priv->average_noise);
6227 wstats->qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED |
6228 IW_QUAL_NOISE_UPDATED;
6229
6230 wstats->miss.beacon = average_value(&priv->average_missed_beacons);
6231 wstats->discard.retries = priv->last_tx_failures;
6232 wstats->discard.code = priv->ieee->ieee_stats.rx_discards_undecryptable;
6233
6234/* if (ipw_get_ordinal(priv, IPW_ORD_STAT_TX_RETRY, &tx_retry, &len))
6235 goto fail_get_ordinal;
6236 wstats->discard.retries += tx_retry; */
6237
6238 return wstats;
6239}
6240
6241
6242/* net device stuff */
6243
6244static inline void init_sys_config(struct ipw_sys_config *sys_config)
6245{
6246 memset(sys_config, 0, sizeof(struct ipw_sys_config));
6247 sys_config->bt_coexistence = 1; /* We may need to look into prvStaBtConfig */
6248 sys_config->answer_broadcast_ssid_probe = 0;
6249 sys_config->accept_all_data_frames = 0;
6250 sys_config->accept_non_directed_frames = 1;
6251 sys_config->exclude_unicast_unencrypted = 0;
6252 sys_config->disable_unicast_decryption = 1;
6253 sys_config->exclude_multicast_unencrypted = 0;
6254 sys_config->disable_multicast_decryption = 1;
6255 sys_config->antenna_diversity = CFG_SYS_ANTENNA_BOTH;
6256 sys_config->pass_crc_to_host = 0; /* TODO: See if 1 gives us FCS */
6257 sys_config->dot11g_auto_detection = 0;
6258 sys_config->enable_cts_to_self = 0;
6259 sys_config->bt_coexist_collision_thr = 0;
6260 sys_config->pass_noise_stats_to_host = 1;
6261}
6262
6263static int ipw_net_open(struct net_device *dev)
6264{
6265 struct ipw_priv *priv = ieee80211_priv(dev);
6266 IPW_DEBUG_INFO("dev->open\n");
6267 /* we should be verifying the device is ready to be opened */
6268 if (!(priv->status & STATUS_RF_KILL_MASK) &&
6269 (priv->status & STATUS_ASSOCIATED))
6270 netif_start_queue(dev);
6271 return 0;
6272}
6273
6274static int ipw_net_stop(struct net_device *dev)
6275{
6276 IPW_DEBUG_INFO("dev->close\n");
6277 netif_stop_queue(dev);
6278 return 0;
6279}
6280
6281/*
6282todo:
6283
6284modify to send one tfd per fragment instead of using chunking. otherwise
6285we need to heavily modify the ieee80211_skb_to_txb.
6286*/
6287
6288static inline void ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb)
6289{
6290 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)
6291 txb->fragments[0]->data;
6292 int i = 0;
6293 struct tfd_frame *tfd;
6294 struct clx2_tx_queue *txq = &priv->txq[0];
6295 struct clx2_queue *q = &txq->q;
6296 u8 id, hdr_len, unicast;
6297 u16 remaining_bytes;
6298
6299 switch (priv->ieee->iw_mode) {
6300 case IW_MODE_ADHOC:
6301 hdr_len = IEEE80211_3ADDR_LEN;
6302 unicast = !is_broadcast_ether_addr(hdr->addr1) &&
6303 !is_multicast_ether_addr(hdr->addr1);
6304 id = ipw_find_station(priv, hdr->addr1);
6305 if (id == IPW_INVALID_STATION) {
6306 id = ipw_add_station(priv, hdr->addr1);
6307 if (id == IPW_INVALID_STATION) {
6308 IPW_WARNING("Attempt to send data to "
6309 "invalid cell: " MAC_FMT "\n",
6310 MAC_ARG(hdr->addr1));
6311 goto drop;
6312 }
6313 }
6314 break;
6315
6316 case IW_MODE_INFRA:
6317 default:
6318 unicast = !is_broadcast_ether_addr(hdr->addr3) &&
6319 !is_multicast_ether_addr(hdr->addr3);
6320 hdr_len = IEEE80211_3ADDR_LEN;
6321 id = 0;
6322 break;
6323 }
6324
6325 tfd = &txq->bd[q->first_empty];
6326 txq->txb[q->first_empty] = txb;
6327 memset(tfd, 0, sizeof(*tfd));
6328 tfd->u.data.station_number = id;
6329
6330 tfd->control_flags.message_type = TX_FRAME_TYPE;
6331 tfd->control_flags.control_bits = TFD_NEED_IRQ_MASK;
6332
6333 tfd->u.data.cmd_id = DINO_CMD_TX;
6334 tfd->u.data.len = txb->payload_size;
6335 remaining_bytes = txb->payload_size;
6336 if (unlikely(!unicast))
6337 tfd->u.data.tx_flags = DCT_FLAG_NO_WEP;
6338 else
6339 tfd->u.data.tx_flags = DCT_FLAG_NO_WEP | DCT_FLAG_ACK_REQD;
6340
6341 if (priv->assoc_request.ieee_mode == IPW_B_MODE)
6342 tfd->u.data.tx_flags_ext = DCT_FLAG_EXT_MODE_CCK;
6343 else
6344 tfd->u.data.tx_flags_ext = DCT_FLAG_EXT_MODE_OFDM;
6345
6346 if (priv->config & CFG_PREAMBLE)
6347 tfd->u.data.tx_flags |= DCT_FLAG_SHORT_PREMBL;
6348
6349 memcpy(&tfd->u.data.tfd.tfd_24.mchdr, hdr, hdr_len);
6350
6351 /* payload */
6352 tfd->u.data.num_chunks = min((u8)(NUM_TFD_CHUNKS - 2), txb->nr_frags);
6353 for (i = 0; i < tfd->u.data.num_chunks; i++) {
6354 IPW_DEBUG_TX("Dumping TX packet frag %i of %i (%d bytes):\n",
6355 i, tfd->u.data.num_chunks,
6356 txb->fragments[i]->len - hdr_len);
6357 printk_buf(IPW_DL_TX, txb->fragments[i]->data + hdr_len,
6358 txb->fragments[i]->len - hdr_len);
6359
6360 tfd->u.data.chunk_ptr[i] = pci_map_single(
6361 priv->pci_dev, txb->fragments[i]->data + hdr_len,
6362 txb->fragments[i]->len - hdr_len, PCI_DMA_TODEVICE);
6363 tfd->u.data.chunk_len[i] = txb->fragments[i]->len - hdr_len;
6364 }
6365
6366 if (i != txb->nr_frags) {
6367 struct sk_buff *skb;
6368 u16 remaining_bytes = 0;
6369 int j;
6370
6371 for (j = i; j < txb->nr_frags; j++)
6372 remaining_bytes += txb->fragments[j]->len - hdr_len;
6373
6374 printk(KERN_INFO "Trying to reallocate for %d bytes\n",
6375 remaining_bytes);
6376 skb = alloc_skb(remaining_bytes, GFP_ATOMIC);
6377 if (skb != NULL) {
6378 tfd->u.data.chunk_len[i] = remaining_bytes;
6379 for (j = i; j < txb->nr_frags; j++) {
6380 int size = txb->fragments[j]->len - hdr_len;
6381 printk(KERN_INFO "Adding frag %d %d...\n",
6382 j, size);
6383 memcpy(skb_put(skb, size),
6384 txb->fragments[j]->data + hdr_len,
6385 size);
6386 }
6387 dev_kfree_skb_any(txb->fragments[i]);
6388 txb->fragments[i] = skb;
6389 tfd->u.data.chunk_ptr[i] = pci_map_single(
6390 priv->pci_dev, skb->data,
6391 tfd->u.data.chunk_len[i], PCI_DMA_TODEVICE);
6392 tfd->u.data.num_chunks++;
6393 }
6394 }
6395
6396 /* kick DMA */
6397 q->first_empty = ipw_queue_inc_wrap(q->first_empty, q->n_bd);
6398 ipw_write32(priv, q->reg_w, q->first_empty);
6399
6400 if (ipw_queue_space(q) < q->high_mark)
6401 netif_stop_queue(priv->net_dev);
6402
6403 return;
6404
6405 drop:
6406 IPW_DEBUG_DROP("Silently dropping Tx packet.\n");
6407 ieee80211_txb_free(txb);
6408}
6409
6410static int ipw_net_hard_start_xmit(struct ieee80211_txb *txb,
6411 struct net_device *dev)
6412{
6413 struct ipw_priv *priv = ieee80211_priv(dev);
6414 unsigned long flags;
6415
6416 IPW_DEBUG_TX("dev->xmit(%d bytes)\n", txb->payload_size);
6417
6418 spin_lock_irqsave(&priv->lock, flags);
6419
6420 if (!(priv->status & STATUS_ASSOCIATED)) {
6421 IPW_DEBUG_INFO("Tx attempt while not associated.\n");
6422 priv->ieee->stats.tx_carrier_errors++;
6423 netif_stop_queue(dev);
6424 goto fail_unlock;
6425 }
6426
6427 ipw_tx_skb(priv, txb);
6428
6429 spin_unlock_irqrestore(&priv->lock, flags);
6430 return 0;
6431
6432 fail_unlock:
6433 spin_unlock_irqrestore(&priv->lock, flags);
6434 return 1;
6435}
6436
6437static struct net_device_stats *ipw_net_get_stats(struct net_device *dev)
6438{
6439 struct ipw_priv *priv = ieee80211_priv(dev);
6440
6441 priv->ieee->stats.tx_packets = priv->tx_packets;
6442 priv->ieee->stats.rx_packets = priv->rx_packets;
6443 return &priv->ieee->stats;
6444}
6445
6446static void ipw_net_set_multicast_list(struct net_device *dev)
6447{
6448
6449}
6450
6451static int ipw_net_set_mac_address(struct net_device *dev, void *p)
6452{
6453 struct ipw_priv *priv = ieee80211_priv(dev);
6454 struct sockaddr *addr = p;
6455 if (!is_valid_ether_addr(addr->sa_data))
6456 return -EADDRNOTAVAIL;
6457 priv->config |= CFG_CUSTOM_MAC;
6458 memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN);
6459 printk(KERN_INFO "%s: Setting MAC to " MAC_FMT "\n",
6460 priv->net_dev->name, MAC_ARG(priv->mac_addr));
6461 ipw_adapter_restart(priv);
6462 return 0;
6463}
6464
6465static void ipw_ethtool_get_drvinfo(struct net_device *dev,
6466 struct ethtool_drvinfo *info)
6467{
6468 struct ipw_priv *p = ieee80211_priv(dev);
6469 char vers[64];
6470 char date[32];
6471 u32 len;
6472
6473 strcpy(info->driver, DRV_NAME);
6474 strcpy(info->version, DRV_VERSION);
6475
6476 len = sizeof(vers);
6477 ipw_get_ordinal(p, IPW_ORD_STAT_FW_VERSION, vers, &len);
6478 len = sizeof(date);
6479 ipw_get_ordinal(p, IPW_ORD_STAT_FW_DATE, date, &len);
6480
6481 snprintf(info->fw_version, sizeof(info->fw_version),"%s (%s)",
6482 vers, date);
6483 strcpy(info->bus_info, pci_name(p->pci_dev));
6484 info->eedump_len = CX2_EEPROM_IMAGE_SIZE;
6485}
6486
6487static u32 ipw_ethtool_get_link(struct net_device *dev)
6488{
6489 struct ipw_priv *priv = ieee80211_priv(dev);
6490 return (priv->status & STATUS_ASSOCIATED) != 0;
6491}
6492
6493static int ipw_ethtool_get_eeprom_len(struct net_device *dev)
6494{
6495 return CX2_EEPROM_IMAGE_SIZE;
6496}
6497
6498static int ipw_ethtool_get_eeprom(struct net_device *dev,
6499 struct ethtool_eeprom *eeprom, u8 *bytes)
6500{
6501 struct ipw_priv *p = ieee80211_priv(dev);
6502
6503 if (eeprom->offset + eeprom->len > CX2_EEPROM_IMAGE_SIZE)
6504 return -EINVAL;
6505
6506 memcpy(bytes, &((u8 *)p->eeprom)[eeprom->offset], eeprom->len);
6507 return 0;
6508}
6509
6510static int ipw_ethtool_set_eeprom(struct net_device *dev,
6511 struct ethtool_eeprom *eeprom, u8 *bytes)
6512{
6513 struct ipw_priv *p = ieee80211_priv(dev);
6514 int i;
6515
6516 if (eeprom->offset + eeprom->len > CX2_EEPROM_IMAGE_SIZE)
6517 return -EINVAL;
6518
6519 memcpy(&((u8 *)p->eeprom)[eeprom->offset], bytes, eeprom->len);
6520 for (i = IPW_EEPROM_DATA;
6521 i < IPW_EEPROM_DATA + CX2_EEPROM_IMAGE_SIZE;
6522 i++)
6523 ipw_write8(p, i, p->eeprom[i]);
6524
6525 return 0;
6526}
6527
6528static struct ethtool_ops ipw_ethtool_ops = {
6529 .get_link = ipw_ethtool_get_link,
6530 .get_drvinfo = ipw_ethtool_get_drvinfo,
6531 .get_eeprom_len = ipw_ethtool_get_eeprom_len,
6532 .get_eeprom = ipw_ethtool_get_eeprom,
6533 .set_eeprom = ipw_ethtool_set_eeprom,
6534};
6535
6536static irqreturn_t ipw_isr(int irq, void *data, struct pt_regs *regs)
6537{
6538 struct ipw_priv *priv = data;
6539 u32 inta, inta_mask;
6540
6541 if (!priv)
6542 return IRQ_NONE;
6543
6544 spin_lock(&priv->lock);
6545
6546 if (!(priv->status & STATUS_INT_ENABLED)) {
6547 /* Shared IRQ */
6548 goto none;
6549 }
6550
6551 inta = ipw_read32(priv, CX2_INTA_RW);
6552 inta_mask = ipw_read32(priv, CX2_INTA_MASK_R);
6553
6554 if (inta == 0xFFFFFFFF) {
6555 /* Hardware disappeared */
6556 IPW_WARNING("IRQ INTA == 0xFFFFFFFF\n");
6557 goto none;
6558 }
6559
6560 if (!(inta & (CX2_INTA_MASK_ALL & inta_mask))) {
6561 /* Shared interrupt */
6562 goto none;
6563 }
6564
6565 /* tell the device to stop sending interrupts */
6566 ipw_disable_interrupts(priv);
6567
6568 /* ack current interrupts */
6569 inta &= (CX2_INTA_MASK_ALL & inta_mask);
6570 ipw_write32(priv, CX2_INTA_RW, inta);
6571
6572 /* Cache INTA value for our tasklet */
6573 priv->isr_inta = inta;
6574
6575 tasklet_schedule(&priv->irq_tasklet);
6576
6577 spin_unlock(&priv->lock);
6578
6579 return IRQ_HANDLED;
6580 none:
6581 spin_unlock(&priv->lock);
6582 return IRQ_NONE;
6583}
6584
6585static void ipw_rf_kill(void *adapter)
6586{
6587 struct ipw_priv *priv = adapter;
6588 unsigned long flags;
6589
6590 spin_lock_irqsave(&priv->lock, flags);
6591
6592 if (rf_kill_active(priv)) {
6593 IPW_DEBUG_RF_KILL("RF Kill active, rescheduling GPIO check\n");
6594 if (priv->workqueue)
6595 queue_delayed_work(priv->workqueue,
6596 &priv->rf_kill, 2 * HZ);
6597 goto exit_unlock;
6598 }
6599
6600 /* RF Kill is now disabled, so bring the device back up */
6601
6602 if (!(priv->status & STATUS_RF_KILL_MASK)) {
6603 IPW_DEBUG_RF_KILL("HW RF Kill no longer active, restarting "
6604 "device\n");
6605
6606 /* we can not do an adapter restart while inside an irq lock */
6607 queue_work(priv->workqueue, &priv->adapter_restart);
6608 } else
6609 IPW_DEBUG_RF_KILL("HW RF Kill deactivated. SW RF Kill still "
6610 "enabled\n");
6611
6612 exit_unlock:
6613 spin_unlock_irqrestore(&priv->lock, flags);
6614}
6615
6616static int ipw_setup_deferred_work(struct ipw_priv *priv)
6617{
6618 int ret = 0;
6619
6620 priv->workqueue = create_workqueue(DRV_NAME);
6621 init_waitqueue_head(&priv->wait_command_queue);
6622
6623 INIT_WORK(&priv->adhoc_check, ipw_adhoc_check, priv);
6624 INIT_WORK(&priv->associate, ipw_associate, priv);
6625 INIT_WORK(&priv->disassociate, ipw_disassociate, priv);
6626 INIT_WORK(&priv->rx_replenish, ipw_rx_queue_replenish, priv);
6627 INIT_WORK(&priv->adapter_restart, ipw_adapter_restart, priv);
6628 INIT_WORK(&priv->rf_kill, ipw_rf_kill, priv);
6629 INIT_WORK(&priv->up, (void (*)(void *))ipw_up, priv);
6630 INIT_WORK(&priv->down, (void (*)(void *))ipw_down, priv);
6631 INIT_WORK(&priv->request_scan,
6632 (void (*)(void *))ipw_request_scan, priv);
6633 INIT_WORK(&priv->gather_stats,
6634 (void (*)(void *))ipw_gather_stats, priv);
6635 INIT_WORK(&priv->abort_scan, (void (*)(void *))ipw_abort_scan, priv);
6636 INIT_WORK(&priv->roam, ipw_roam, priv);
6637 INIT_WORK(&priv->scan_check, ipw_scan_check, priv);
6638
6639 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
6640 ipw_irq_tasklet, (unsigned long)priv);
6641
6642 return ret;
6643}
6644
6645
6646static void shim__set_security(struct net_device *dev,
6647 struct ieee80211_security *sec)
6648{
6649 struct ipw_priv *priv = ieee80211_priv(dev);
6650 int i;
6651
6652 for (i = 0; i < 4; i++) {
6653 if (sec->flags & (1 << i)) {
6654 priv->sec.key_sizes[i] = sec->key_sizes[i];
6655 if (sec->key_sizes[i] == 0)
6656 priv->sec.flags &= ~(1 << i);
6657 else
6658 memcpy(priv->sec.keys[i], sec->keys[i],
6659 sec->key_sizes[i]);
6660 priv->sec.flags |= (1 << i);
6661 priv->status |= STATUS_SECURITY_UPDATED;
6662 }
6663 }
6664
6665 if ((sec->flags & SEC_ACTIVE_KEY) &&
6666 priv->sec.active_key != sec->active_key) {
6667 if (sec->active_key <= 3) {
6668 priv->sec.active_key = sec->active_key;
6669 priv->sec.flags |= SEC_ACTIVE_KEY;
6670 } else
6671 priv->sec.flags &= ~SEC_ACTIVE_KEY;
6672 priv->status |= STATUS_SECURITY_UPDATED;
6673 }
6674
6675 if ((sec->flags & SEC_AUTH_MODE) &&
6676 (priv->sec.auth_mode != sec->auth_mode)) {
6677 priv->sec.auth_mode = sec->auth_mode;
6678 priv->sec.flags |= SEC_AUTH_MODE;
6679 if (sec->auth_mode == WLAN_AUTH_SHARED_KEY)
6680 priv->capability |= CAP_SHARED_KEY;
6681 else
6682 priv->capability &= ~CAP_SHARED_KEY;
6683 priv->status |= STATUS_SECURITY_UPDATED;
6684 }
6685
6686 if (sec->flags & SEC_ENABLED &&
6687 priv->sec.enabled != sec->enabled) {
6688 priv->sec.flags |= SEC_ENABLED;
6689 priv->sec.enabled = sec->enabled;
6690 priv->status |= STATUS_SECURITY_UPDATED;
6691 if (sec->enabled)
6692 priv->capability |= CAP_PRIVACY_ON;
6693 else
6694 priv->capability &= ~CAP_PRIVACY_ON;
6695 }
6696
6697 if (sec->flags & SEC_LEVEL &&
6698 priv->sec.level != sec->level) {
6699 priv->sec.level = sec->level;
6700 priv->sec.flags |= SEC_LEVEL;
6701 priv->status |= STATUS_SECURITY_UPDATED;
6702 }
6703
6704 /* To match current functionality of ipw2100 (which works well w/
6705 * various supplicants, we don't force a disassociate if the
6706 * privacy capability changes ... */
6707#if 0
6708 if ((priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) &&
6709 (((priv->assoc_request.capability &
6710 WLAN_CAPABILITY_PRIVACY) && !sec->enabled) ||
6711 (!(priv->assoc_request.capability &
6712 WLAN_CAPABILITY_PRIVACY) && sec->enabled))) {
6713 IPW_DEBUG_ASSOC("Disassociating due to capability "
6714 "change.\n");
6715 ipw_disassociate(priv);
6716 }
6717#endif
6718}
6719
6720static int init_supported_rates(struct ipw_priv *priv,
6721 struct ipw_supported_rates *rates)
6722{
6723 /* TODO: Mask out rates based on priv->rates_mask */
6724
6725 memset(rates, 0, sizeof(*rates));
6726 /* configure supported rates */
6727 switch (priv->ieee->freq_band) {
6728 case IEEE80211_52GHZ_BAND:
6729 rates->ieee_mode = IPW_A_MODE;
6730 rates->purpose = IPW_RATE_CAPABILITIES;
6731 ipw_add_ofdm_scan_rates(rates, IEEE80211_CCK_MODULATION,
6732 IEEE80211_OFDM_DEFAULT_RATES_MASK);
6733 break;
6734
6735 default: /* Mixed or 2.4Ghz */
6736 rates->ieee_mode = IPW_G_MODE;
6737 rates->purpose = IPW_RATE_CAPABILITIES;
6738 ipw_add_cck_scan_rates(rates, IEEE80211_CCK_MODULATION,
6739 IEEE80211_CCK_DEFAULT_RATES_MASK);
6740 if (priv->ieee->modulation & IEEE80211_OFDM_MODULATION) {
6741 ipw_add_ofdm_scan_rates(rates, IEEE80211_CCK_MODULATION,
6742 IEEE80211_OFDM_DEFAULT_RATES_MASK);
6743 }
6744 break;
6745 }
6746
6747 return 0;
6748}
6749
6750static int ipw_config(struct ipw_priv *priv)
6751{
6752 int i;
6753 struct ipw_tx_power tx_power;
6754
6755 memset(&priv->sys_config, 0, sizeof(priv->sys_config));
6756 memset(&tx_power, 0, sizeof(tx_power));
6757
6758 /* This is only called from ipw_up, which resets/reloads the firmware
6759 so, we don't need to first disable the card before we configure
6760 it */
6761
6762 /* configure device for 'G' band */
6763 tx_power.ieee_mode = IPW_G_MODE;
6764 tx_power.num_channels = 11;
6765 for (i = 0; i < 11; i++) {
6766 tx_power.channels_tx_power[i].channel_number = i + 1;
6767 tx_power.channels_tx_power[i].tx_power = priv->tx_power;
6768 }
6769 if (ipw_send_tx_power(priv, &tx_power))
6770 goto error;
6771
6772 /* configure device to also handle 'B' band */
6773 tx_power.ieee_mode = IPW_B_MODE;
6774 if (ipw_send_tx_power(priv, &tx_power))
6775 goto error;
6776
6777 /* initialize adapter address */
6778 if (ipw_send_adapter_address(priv, priv->net_dev->dev_addr))
6779 goto error;
6780
6781 /* set basic system config settings */
6782 init_sys_config(&priv->sys_config);
6783 if (ipw_send_system_config(priv, &priv->sys_config))
6784 goto error;
6785
6786 init_supported_rates(priv, &priv->rates);
6787 if (ipw_send_supported_rates(priv, &priv->rates))
6788 goto error;
6789
6790 /* Set request-to-send threshold */
6791 if (priv->rts_threshold) {
6792 if (ipw_send_rts_threshold(priv, priv->rts_threshold))
6793 goto error;
6794 }
6795
6796 if (ipw_set_random_seed(priv))
6797 goto error;
6798
6799 /* final state transition to the RUN state */
6800 if (ipw_send_host_complete(priv))
6801 goto error;
6802
6803 /* If configured to try and auto-associate, kick off a scan */
6804 if ((priv->config & CFG_ASSOCIATE) && ipw_request_scan(priv))
6805 goto error;
6806
6807 return 0;
6808
6809 error:
6810 return -EIO;
6811}
6812
6813#define MAX_HW_RESTARTS 5
6814static int ipw_up(struct ipw_priv *priv)
6815{
6816 int rc, i;
6817
6818 if (priv->status & STATUS_EXIT_PENDING)
6819 return -EIO;
6820
6821 for (i = 0; i < MAX_HW_RESTARTS; i++ ) {
6822 /* Load the microcode, firmware, and eeprom.
6823 * Also start the clocks. */
6824 rc = ipw_load(priv);
6825 if (rc) {
6826 IPW_ERROR("Unable to load firmware: 0x%08X\n",
6827 rc);
6828 return rc;
6829 }
6830
6831 ipw_init_ordinals(priv);
6832 if (!(priv->config & CFG_CUSTOM_MAC))
6833 eeprom_parse_mac(priv, priv->mac_addr);
6834 memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN);
6835
6836 if (priv->status & STATUS_RF_KILL_MASK)
6837 return 0;
6838
6839 rc = ipw_config(priv);
6840 if (!rc) {
6841 IPW_DEBUG_INFO("Configured device on count %i\n", i);
6842 priv->notif_missed_beacons = 0;
6843 netif_start_queue(priv->net_dev);
6844 return 0;
6845 } else {
6846 IPW_DEBUG_INFO("Device configuration failed: 0x%08X\n",
6847 rc);
6848 }
6849
6850 IPW_DEBUG_INFO("Failed to config device on retry %d of %d\n",
6851 i, MAX_HW_RESTARTS);
6852
6853 /* We had an error bringing up the hardware, so take it
6854 * all the way back down so we can try again */
6855 ipw_down(priv);
6856 }
6857
6858 /* tried to restart and config the device for as long as our
6859 * patience could withstand */
6860 IPW_ERROR("Unable to initialize device after %d attempts.\n",
6861 i);
6862 return -EIO;
6863}
6864
6865static void ipw_down(struct ipw_priv *priv)
6866{
6867 /* Attempt to disable the card */
6868#if 0
6869 ipw_send_card_disable(priv, 0);
6870#endif
6871
6872 /* tell the device to stop sending interrupts */
6873 ipw_disable_interrupts(priv);
6874
6875 /* Clear all bits but the RF Kill */
6876 priv->status &= STATUS_RF_KILL_MASK;
6877
6878 netif_carrier_off(priv->net_dev);
6879 netif_stop_queue(priv->net_dev);
6880
6881 ipw_stop_nic(priv);
6882}
6883
6884/* Called by register_netdev() */
6885static int ipw_net_init(struct net_device *dev)
6886{
6887 struct ipw_priv *priv = ieee80211_priv(dev);
6888
6889 if (priv->status & STATUS_RF_KILL_SW) {
6890 IPW_WARNING("Radio disabled by module parameter.\n");
6891 return 0;
6892 } else if (rf_kill_active(priv)) {
6893 IPW_WARNING("Radio Frequency Kill Switch is On:\n"
6894 "Kill switch must be turned off for "
6895 "wireless networking to work.\n");
6896 queue_delayed_work(priv->workqueue, &priv->rf_kill, 2 * HZ);
6897 return 0;
6898 }
6899
6900 if (ipw_up(priv))
6901 return -EIO;
6902
6903 return 0;
6904}
6905
6906/* PCI driver stuff */
6907static struct pci_device_id card_ids[] = {
6908 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2701, 0, 0, 0},
6909 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2702, 0, 0, 0},
6910 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2711, 0, 0, 0},
6911 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2712, 0, 0, 0},
6912 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2721, 0, 0, 0},
6913 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2722, 0, 0, 0},
6914 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2731, 0, 0, 0},
6915 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2732, 0, 0, 0},
6916 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2741, 0, 0, 0},
6917 {PCI_VENDOR_ID_INTEL, 0x1043, 0x103c, 0x2741, 0, 0, 0},
6918 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2742, 0, 0, 0},
6919 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2751, 0, 0, 0},
6920 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2752, 0, 0, 0},
6921 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2753, 0, 0, 0},
6922 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2754, 0, 0, 0},
6923 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2761, 0, 0, 0},
6924 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2762, 0, 0, 0},
6925 {PCI_VENDOR_ID_INTEL, 0x104f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
6926 {PCI_VENDOR_ID_INTEL, 0x4220, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* BG */
6927 {PCI_VENDOR_ID_INTEL, 0x4221, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 2225BG */
6928 {PCI_VENDOR_ID_INTEL, 0x4223, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* ABG */
6929 {PCI_VENDOR_ID_INTEL, 0x4224, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* ABG */
6930
6931 /* required last entry */
6932 {0,}
6933};
6934
6935MODULE_DEVICE_TABLE(pci, card_ids);
6936
6937static struct attribute *ipw_sysfs_entries[] = {
6938 &dev_attr_rf_kill.attr,
6939 &dev_attr_direct_dword.attr,
6940 &dev_attr_indirect_byte.attr,
6941 &dev_attr_indirect_dword.attr,
6942 &dev_attr_mem_gpio_reg.attr,
6943 &dev_attr_command_event_reg.attr,
6944 &dev_attr_nic_type.attr,
6945 &dev_attr_status.attr,
6946 &dev_attr_cfg.attr,
6947 &dev_attr_dump_errors.attr,
6948 &dev_attr_dump_events.attr,
6949 &dev_attr_eeprom_delay.attr,
6950 &dev_attr_ucode_version.attr,
6951 &dev_attr_rtc.attr,
6952 NULL
6953};
6954
6955static struct attribute_group ipw_attribute_group = {
6956 .name = NULL, /* put in device directory */
6957 .attrs = ipw_sysfs_entries,
6958};
6959
6960static int ipw_pci_probe(struct pci_dev *pdev,
6961 const struct pci_device_id *ent)
6962{
6963 int err = 0;
6964 struct net_device *net_dev;
6965 void __iomem *base;
6966 u32 length, val;
6967 struct ipw_priv *priv;
6968 int band, modulation;
6969
6970 net_dev = alloc_ieee80211(sizeof(struct ipw_priv));
6971 if (net_dev == NULL) {
6972 err = -ENOMEM;
6973 goto out;
6974 }
6975
6976 priv = ieee80211_priv(net_dev);
6977 priv->ieee = netdev_priv(net_dev);
6978 priv->net_dev = net_dev;
6979 priv->pci_dev = pdev;
6980#ifdef CONFIG_IPW_DEBUG
6981 ipw_debug_level = debug;
6982#endif
6983 spin_lock_init(&priv->lock);
6984
6985 if (pci_enable_device(pdev)) {
6986 err = -ENODEV;
6987 goto out_free_ieee80211;
6988 }
6989
6990 pci_set_master(pdev);
6991
6992 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
6993 if (!err)
6994 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
6995 if (err) {
6996 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
6997 goto out_pci_disable_device;
6998 }
6999
7000 pci_set_drvdata(pdev, priv);
7001
7002 err = pci_request_regions(pdev, DRV_NAME);
7003 if (err)
7004 goto out_pci_disable_device;
7005
7006 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7007 * PCI Tx retries from interfering with C3 CPU state */
7008 pci_read_config_dword(pdev, 0x40, &val);
7009 if ((val & 0x0000ff00) != 0)
7010 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
7011
7012 length = pci_resource_len(pdev, 0);
7013 priv->hw_len = length;
7014
7015 base = ioremap_nocache(pci_resource_start(pdev, 0), length);
7016 if (!base) {
7017 err = -ENODEV;
7018 goto out_pci_release_regions;
7019 }
7020
7021 priv->hw_base = base;
7022 IPW_DEBUG_INFO("pci_resource_len = 0x%08x\n", length);
7023 IPW_DEBUG_INFO("pci_resource_base = %p\n", base);
7024
7025 err = ipw_setup_deferred_work(priv);
7026 if (err) {
7027 IPW_ERROR("Unable to setup deferred work\n");
7028 goto out_iounmap;
7029 }
7030
7031 /* Initialize module parameter values here */
7032 if (ifname)
7033 strncpy(net_dev->name, ifname, IFNAMSIZ);
7034
7035 if (associate)
7036 priv->config |= CFG_ASSOCIATE;
7037 else
7038 IPW_DEBUG_INFO("Auto associate disabled.\n");
7039
7040 if (auto_create)
7041 priv->config |= CFG_ADHOC_CREATE;
7042 else
7043 IPW_DEBUG_INFO("Auto adhoc creation disabled.\n");
7044
7045 if (disable) {
7046 priv->status |= STATUS_RF_KILL_SW;
7047 IPW_DEBUG_INFO("Radio disabled.\n");
7048 }
7049
7050 if (channel != 0) {
7051 priv->config |= CFG_STATIC_CHANNEL;
7052 priv->channel = channel;
7053 IPW_DEBUG_INFO("Bind to static channel %d\n", channel);
7054 IPW_DEBUG_INFO("Bind to static channel %d\n", channel);
7055 /* TODO: Validate that provided channel is in range */
7056 }
7057
7058 switch (mode) {
7059 case 1:
7060 priv->ieee->iw_mode = IW_MODE_ADHOC;
7061 break;
7062#ifdef CONFIG_IPW_PROMISC
7063 case 2:
7064 priv->ieee->iw_mode = IW_MODE_MONITOR;
7065 break;
7066#endif
7067 default:
7068 case 0:
7069 priv->ieee->iw_mode = IW_MODE_INFRA;
7070 break;
7071 }
7072
7073 if ((priv->pci_dev->device == 0x4223) ||
7074 (priv->pci_dev->device == 0x4224)) {
7075 printk(KERN_INFO DRV_NAME
7076 ": Detected Intel PRO/Wireless 2915ABG Network "
7077 "Connection\n");
7078 priv->ieee->abg_ture = 1;
7079 band = IEEE80211_52GHZ_BAND | IEEE80211_24GHZ_BAND;
7080 modulation = IEEE80211_OFDM_MODULATION |
7081 IEEE80211_CCK_MODULATION;
7082 priv->adapter = IPW_2915ABG;
7083 priv->ieee->mode = IEEE_A|IEEE_G|IEEE_B;
7084 } else {
7085 if (priv->pci_dev->device == 0x4221)
7086 printk(KERN_INFO DRV_NAME
7087 ": Detected Intel PRO/Wireless 2225BG Network "
7088 "Connection\n");
7089 else
7090 printk(KERN_INFO DRV_NAME
7091 ": Detected Intel PRO/Wireless 2200BG Network "
7092 "Connection\n");
7093
7094 priv->ieee->abg_ture = 0;
7095 band = IEEE80211_24GHZ_BAND;
7096 modulation = IEEE80211_OFDM_MODULATION |
7097 IEEE80211_CCK_MODULATION;
7098 priv->adapter = IPW_2200BG;
7099 priv->ieee->mode = IEEE_G|IEEE_B;
7100 }
7101
7102 priv->ieee->freq_band = band;
7103 priv->ieee->modulation = modulation;
7104
7105 priv->rates_mask = IEEE80211_DEFAULT_RATES_MASK;
7106
7107 priv->missed_beacon_threshold = IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT;
7108 priv->roaming_threshold = IPW_MB_ROAMING_THRESHOLD_DEFAULT;
7109
7110 priv->rts_threshold = DEFAULT_RTS_THRESHOLD;
7111
7112 /* If power management is turned on, default to AC mode */
7113 priv->power_mode = IPW_POWER_AC;
7114 priv->tx_power = IPW_DEFAULT_TX_POWER;
7115
7116 err = request_irq(pdev->irq, ipw_isr, SA_SHIRQ, DRV_NAME,
7117 priv);
7118 if (err) {
7119 IPW_ERROR("Error allocating IRQ %d\n", pdev->irq);
7120 goto out_destroy_workqueue;
7121 }
7122
7123 SET_MODULE_OWNER(net_dev);
7124 SET_NETDEV_DEV(net_dev, &pdev->dev);
7125
7126 priv->ieee->hard_start_xmit = ipw_net_hard_start_xmit;
7127 priv->ieee->set_security = shim__set_security;
7128
7129 net_dev->open = ipw_net_open;
7130 net_dev->stop = ipw_net_stop;
7131 net_dev->init = ipw_net_init;
7132 net_dev->get_stats = ipw_net_get_stats;
7133 net_dev->set_multicast_list = ipw_net_set_multicast_list;
7134 net_dev->set_mac_address = ipw_net_set_mac_address;
7135 net_dev->get_wireless_stats = ipw_get_wireless_stats;
7136 net_dev->wireless_handlers = &ipw_wx_handler_def;
7137 net_dev->ethtool_ops = &ipw_ethtool_ops;
7138 net_dev->irq = pdev->irq;
7139 net_dev->base_addr = (unsigned long )priv->hw_base;
7140 net_dev->mem_start = pci_resource_start(pdev, 0);
7141 net_dev->mem_end = net_dev->mem_start + pci_resource_len(pdev, 0) - 1;
7142
7143 err = sysfs_create_group(&pdev->dev.kobj, &ipw_attribute_group);
7144 if (err) {
7145 IPW_ERROR("failed to create sysfs device attributes\n");
7146 goto out_release_irq;
7147 }
7148
7149 err = register_netdev(net_dev);
7150 if (err) {
7151 IPW_ERROR("failed to register network device\n");
7152 goto out_remove_group;
7153 }
7154
7155 return 0;
7156
7157 out_remove_group:
7158 sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group);
7159 out_release_irq:
7160 free_irq(pdev->irq, priv);
7161 out_destroy_workqueue:
7162 destroy_workqueue(priv->workqueue);
7163 priv->workqueue = NULL;
7164 out_iounmap:
7165 iounmap(priv->hw_base);
7166 out_pci_release_regions:
7167 pci_release_regions(pdev);
7168 out_pci_disable_device:
7169 pci_disable_device(pdev);
7170 pci_set_drvdata(pdev, NULL);
7171 out_free_ieee80211:
7172 free_ieee80211(priv->net_dev);
7173 out:
7174 return err;
7175}
7176
7177static void ipw_pci_remove(struct pci_dev *pdev)
7178{
7179 struct ipw_priv *priv = pci_get_drvdata(pdev);
7180 if (!priv)
7181 return;
7182
7183 priv->status |= STATUS_EXIT_PENDING;
7184
7185 sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group);
7186
7187 ipw_down(priv);
7188
7189 unregister_netdev(priv->net_dev);
7190
7191 if (priv->rxq) {
7192 ipw_rx_queue_free(priv, priv->rxq);
7193 priv->rxq = NULL;
7194 }
7195 ipw_tx_queue_free(priv);
7196
7197 /* ipw_down will ensure that there is no more pending work
7198 * in the workqueue's, so we can safely remove them now. */
7199 if (priv->workqueue) {
7200 cancel_delayed_work(&priv->adhoc_check);
7201 cancel_delayed_work(&priv->gather_stats);
7202 cancel_delayed_work(&priv->request_scan);
7203 cancel_delayed_work(&priv->rf_kill);
7204 cancel_delayed_work(&priv->scan_check);
7205 destroy_workqueue(priv->workqueue);
7206 priv->workqueue = NULL;
7207 }
7208
7209 free_irq(pdev->irq, priv);
7210 iounmap(priv->hw_base);
7211 pci_release_regions(pdev);
7212 pci_disable_device(pdev);
7213 pci_set_drvdata(pdev, NULL);
7214 free_ieee80211(priv->net_dev);
7215
7216#ifdef CONFIG_PM
7217 if (fw_loaded) {
7218 release_firmware(bootfw);
7219 release_firmware(ucode);
7220 release_firmware(firmware);
7221 fw_loaded = 0;
7222 }
7223#endif
7224}
7225
7226
7227#ifdef CONFIG_PM
7228static int ipw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
7229{
7230 struct ipw_priv *priv = pci_get_drvdata(pdev);
7231 struct net_device *dev = priv->net_dev;
7232
7233 printk(KERN_INFO "%s: Going into suspend...\n", dev->name);
7234
7235 /* Take down the device; powers it off, etc. */
7236 ipw_down(priv);
7237
7238 /* Remove the PRESENT state of the device */
7239 netif_device_detach(dev);
7240
7241 pci_save_state(pdev);
7242 pci_disable_device(pdev);
7243 pci_set_power_state(pdev, pci_choose_state(pdev, state));
7244
7245 return 0;
7246}
7247
7248static int ipw_pci_resume(struct pci_dev *pdev)
7249{
7250 struct ipw_priv *priv = pci_get_drvdata(pdev);
7251 struct net_device *dev = priv->net_dev;
7252 u32 val;
7253
7254 printk(KERN_INFO "%s: Coming out of suspend...\n", dev->name);
7255
7256 pci_set_power_state(pdev, 0);
7257 pci_enable_device(pdev);
7258#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
7259 pci_restore_state(pdev, priv->pm_state);
7260#else
7261 pci_restore_state(pdev);
7262#endif
7263 /*
7264 * Suspend/Resume resets the PCI configuration space, so we have to
7265 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
7266 * from interfering with C3 CPU state. pci_restore_state won't help
7267 * here since it only restores the first 64 bytes pci config header.
7268 */
7269 pci_read_config_dword(pdev, 0x40, &val);
7270 if ((val & 0x0000ff00) != 0)
7271 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
7272
7273 /* Set the device back into the PRESENT state; this will also wake
7274 * the queue of needed */
7275 netif_device_attach(dev);
7276
7277 /* Bring the device back up */
7278 queue_work(priv->workqueue, &priv->up);
7279
7280 return 0;
7281}
7282#endif
7283
7284/* driver initialization stuff */
7285static struct pci_driver ipw_driver = {
7286 .name = DRV_NAME,
7287 .id_table = card_ids,
7288 .probe = ipw_pci_probe,
7289 .remove = __devexit_p(ipw_pci_remove),
7290#ifdef CONFIG_PM
7291 .suspend = ipw_pci_suspend,
7292 .resume = ipw_pci_resume,
7293#endif
7294};
7295
7296static int __init ipw_init(void)
7297{
7298 int ret;
7299
7300 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7301 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
7302
7303 ret = pci_module_init(&ipw_driver);
7304 if (ret) {
7305 IPW_ERROR("Unable to initialize PCI module\n");
7306 return ret;
7307 }
7308
7309 ret = driver_create_file(&ipw_driver.driver,
7310 &driver_attr_debug_level);
7311 if (ret) {
7312 IPW_ERROR("Unable to create driver sysfs file\n");
7313 pci_unregister_driver(&ipw_driver);
7314 return ret;
7315 }
7316
7317 return ret;
7318}
7319
7320static void __exit ipw_exit(void)
7321{
7322 driver_remove_file(&ipw_driver.driver, &driver_attr_debug_level);
7323 pci_unregister_driver(&ipw_driver);
7324}
7325
7326module_param(disable, int, 0444);
7327MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
7328
7329module_param(associate, int, 0444);
7330MODULE_PARM_DESC(associate, "auto associate when scanning (default on)");
7331
7332module_param(auto_create, int, 0444);
7333MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)");
7334
7335module_param(debug, int, 0444);
7336MODULE_PARM_DESC(debug, "debug output mask");
7337
7338module_param(channel, int, 0444);
7339MODULE_PARM_DESC(channel, "channel to limit associate to (default 0 [ANY])");
7340
7341module_param(ifname, charp, 0444);
7342MODULE_PARM_DESC(ifname, "network device name (default eth%d)");
7343
7344#ifdef CONFIG_IPW_PROMISC
7345module_param(mode, int, 0444);
7346MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS,2=Monitor)");
7347#else
7348module_param(mode, int, 0444);
7349MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS)");
7350#endif
7351
7352module_exit(ipw_exit);
7353module_init(ipw_init);
diff --git a/drivers/net/wireless/ipw2200.h b/drivers/net/wireless/ipw2200.h
new file mode 100644
index 000000000000..3bff09d93154
--- /dev/null
+++ b/drivers/net/wireless/ipw2200.h
@@ -0,0 +1,1742 @@
1/******************************************************************************
2
3 Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************/
26
27#ifndef __ipw2200_h__
28#define __ipw2200_h__
29
30#define WEXT_USECHANNELS 1
31
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/config.h>
35#include <linux/init.h>
36
37#include <linux/version.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/ethtool.h>
41#include <linux/skbuff.h>
42#include <linux/etherdevice.h>
43#include <linux/delay.h>
44#include <linux/random.h>
45
46#include <linux/firmware.h>
47#include <linux/wireless.h>
48#include <asm/io.h>
49
50#include <net/ieee80211.h>
51
52#define DRV_NAME "ipw2200"
53
54#include <linux/workqueue.h>
55
56/* Authentication and Association States */
57enum connection_manager_assoc_states
58{
59 CMAS_INIT = 0,
60 CMAS_TX_AUTH_SEQ_1,
61 CMAS_RX_AUTH_SEQ_2,
62 CMAS_AUTH_SEQ_1_PASS,
63 CMAS_AUTH_SEQ_1_FAIL,
64 CMAS_TX_AUTH_SEQ_3,
65 CMAS_RX_AUTH_SEQ_4,
66 CMAS_AUTH_SEQ_2_PASS,
67 CMAS_AUTH_SEQ_2_FAIL,
68 CMAS_AUTHENTICATED,
69 CMAS_TX_ASSOC,
70 CMAS_RX_ASSOC_RESP,
71 CMAS_ASSOCIATED,
72 CMAS_LAST
73};
74
75
76#define IPW_WAIT (1<<0)
77#define IPW_QUIET (1<<1)
78#define IPW_ROAMING (1<<2)
79
80#define IPW_POWER_MODE_CAM 0x00 //(always on)
81#define IPW_POWER_INDEX_1 0x01
82#define IPW_POWER_INDEX_2 0x02
83#define IPW_POWER_INDEX_3 0x03
84#define IPW_POWER_INDEX_4 0x04
85#define IPW_POWER_INDEX_5 0x05
86#define IPW_POWER_AC 0x06
87#define IPW_POWER_BATTERY 0x07
88#define IPW_POWER_LIMIT 0x07
89#define IPW_POWER_MASK 0x0F
90#define IPW_POWER_ENABLED 0x10
91#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
92
93#define IPW_CMD_HOST_COMPLETE 2
94#define IPW_CMD_POWER_DOWN 4
95#define IPW_CMD_SYSTEM_CONFIG 6
96#define IPW_CMD_MULTICAST_ADDRESS 7
97#define IPW_CMD_SSID 8
98#define IPW_CMD_ADAPTER_ADDRESS 11
99#define IPW_CMD_PORT_TYPE 12
100#define IPW_CMD_RTS_THRESHOLD 15
101#define IPW_CMD_FRAG_THRESHOLD 16
102#define IPW_CMD_POWER_MODE 17
103#define IPW_CMD_WEP_KEY 18
104#define IPW_CMD_TGI_TX_KEY 19
105#define IPW_CMD_SCAN_REQUEST 20
106#define IPW_CMD_ASSOCIATE 21
107#define IPW_CMD_SUPPORTED_RATES 22
108#define IPW_CMD_SCAN_ABORT 23
109#define IPW_CMD_TX_FLUSH 24
110#define IPW_CMD_QOS_PARAMETERS 25
111#define IPW_CMD_SCAN_REQUEST_EXT 26
112#define IPW_CMD_DINO_CONFIG 30
113#define IPW_CMD_RSN_CAPABILITIES 31
114#define IPW_CMD_RX_KEY 32
115#define IPW_CMD_CARD_DISABLE 33
116#define IPW_CMD_SEED_NUMBER 34
117#define IPW_CMD_TX_POWER 35
118#define IPW_CMD_COUNTRY_INFO 36
119#define IPW_CMD_AIRONET_INFO 37
120#define IPW_CMD_AP_TX_POWER 38
121#define IPW_CMD_CCKM_INFO 39
122#define IPW_CMD_CCX_VER_INFO 40
123#define IPW_CMD_SET_CALIBRATION 41
124#define IPW_CMD_SENSITIVITY_CALIB 42
125#define IPW_CMD_RETRY_LIMIT 51
126#define IPW_CMD_IPW_PRE_POWER_DOWN 58
127#define IPW_CMD_VAP_BEACON_TEMPLATE 60
128#define IPW_CMD_VAP_DTIM_PERIOD 61
129#define IPW_CMD_EXT_SUPPORTED_RATES 62
130#define IPW_CMD_VAP_LOCAL_TX_PWR_CONSTRAINT 63
131#define IPW_CMD_VAP_QUIET_INTERVALS 64
132#define IPW_CMD_VAP_CHANNEL_SWITCH 65
133#define IPW_CMD_VAP_MANDATORY_CHANNELS 66
134#define IPW_CMD_VAP_CELL_PWR_LIMIT 67
135#define IPW_CMD_VAP_CF_PARAM_SET 68
136#define IPW_CMD_VAP_SET_BEACONING_STATE 69
137#define IPW_CMD_MEASUREMENT 80
138#define IPW_CMD_POWER_CAPABILITY 81
139#define IPW_CMD_SUPPORTED_CHANNELS 82
140#define IPW_CMD_TPC_REPORT 83
141#define IPW_CMD_WME_INFO 84
142#define IPW_CMD_PRODUCTION_COMMAND 85
143#define IPW_CMD_LINKSYS_EOU_INFO 90
144
145#define RFD_SIZE 4
146#define NUM_TFD_CHUNKS 6
147
148#define TX_QUEUE_SIZE 32
149#define RX_QUEUE_SIZE 32
150
151#define DINO_CMD_WEP_KEY 0x08
152#define DINO_CMD_TX 0x0B
153#define DCT_ANTENNA_A 0x01
154#define DCT_ANTENNA_B 0x02
155
156#define IPW_A_MODE 0
157#define IPW_B_MODE 1
158#define IPW_G_MODE 2
159
160/*
161 * TX Queue Flag Definitions
162 */
163
164/* abort attempt if mgmt frame is rx'd */
165#define DCT_FLAG_ABORT_MGMT 0x01
166
167/* require CTS */
168#define DCT_FLAG_CTS_REQUIRED 0x02
169
170/* use short preamble */
171#define DCT_FLAG_SHORT_PREMBL 0x04
172
173/* RTS/CTS first */
174#define DCT_FLAG_RTS_REQD 0x08
175
176/* dont calculate duration field */
177#define DCT_FLAG_DUR_SET 0x10
178
179/* even if MAC WEP set (allows pre-encrypt) */
180#define DCT_FLAG_NO_WEP 0x20
181
182/* overwrite TSF field */
183#define DCT_FLAG_TSF_REQD 0x40
184
185/* ACK rx is expected to follow */
186#define DCT_FLAG_ACK_REQD 0x80
187
188#define DCT_FLAG_EXT_MODE_CCK 0x01
189#define DCT_FLAG_EXT_MODE_OFDM 0x00
190
191
192#define TX_RX_TYPE_MASK 0xFF
193#define TX_FRAME_TYPE 0x00
194#define TX_HOST_COMMAND_TYPE 0x01
195#define RX_FRAME_TYPE 0x09
196#define RX_HOST_NOTIFICATION_TYPE 0x03
197#define RX_HOST_CMD_RESPONSE_TYPE 0x04
198#define RX_TX_FRAME_RESPONSE_TYPE 0x05
199#define TFD_NEED_IRQ_MASK 0x04
200
201#define HOST_CMD_DINO_CONFIG 30
202
203#define HOST_NOTIFICATION_STATUS_ASSOCIATED 10
204#define HOST_NOTIFICATION_STATUS_AUTHENTICATE 11
205#define HOST_NOTIFICATION_STATUS_SCAN_CHANNEL_RESULT 12
206#define HOST_NOTIFICATION_STATUS_SCAN_COMPLETED 13
207#define HOST_NOTIFICATION_STATUS_FRAG_LENGTH 14
208#define HOST_NOTIFICATION_STATUS_LINK_DETERIORATION 15
209#define HOST_NOTIFICATION_DINO_CONFIG_RESPONSE 16
210#define HOST_NOTIFICATION_STATUS_BEACON_STATE 17
211#define HOST_NOTIFICATION_STATUS_TGI_TX_KEY 18
212#define HOST_NOTIFICATION_TX_STATUS 19
213#define HOST_NOTIFICATION_CALIB_KEEP_RESULTS 20
214#define HOST_NOTIFICATION_MEASUREMENT_STARTED 21
215#define HOST_NOTIFICATION_MEASUREMENT_ENDED 22
216#define HOST_NOTIFICATION_CHANNEL_SWITCHED 23
217#define HOST_NOTIFICATION_RX_DURING_QUIET_PERIOD 24
218#define HOST_NOTIFICATION_NOISE_STATS 25
219#define HOST_NOTIFICATION_S36_MEASUREMENT_ACCEPTED 30
220#define HOST_NOTIFICATION_S36_MEASUREMENT_REFUSED 31
221
222#define HOST_NOTIFICATION_STATUS_BEACON_MISSING 1
223#define IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT 24
224#define IPW_MB_ROAMING_THRESHOLD_DEFAULT 8
225#define IPW_REAL_RATE_RX_PACKET_THRESHOLD 300
226
227#define MACADRR_BYTE_LEN 6
228
229#define DCR_TYPE_AP 0x01
230#define DCR_TYPE_WLAP 0x02
231#define DCR_TYPE_MU_ESS 0x03
232#define DCR_TYPE_MU_IBSS 0x04
233#define DCR_TYPE_MU_PIBSS 0x05
234#define DCR_TYPE_SNIFFER 0x06
235#define DCR_TYPE_MU_BSS DCR_TYPE_MU_ESS
236
237/**
238 * Generic queue structure
239 *
240 * Contains common data for Rx and Tx queues
241 */
242struct clx2_queue {
243 int n_bd; /**< number of BDs in this queue */
244 int first_empty; /**< 1-st empty entry (index) */
245 int last_used; /**< last used entry (index) */
246 u32 reg_w; /**< 'write' reg (queue head), addr in domain 1 */
247 u32 reg_r; /**< 'read' reg (queue tail), addr in domain 1 */
248 dma_addr_t dma_addr; /**< physical addr for BD's */
249 int low_mark; /**< low watermark, resume queue if free space more than this */
250 int high_mark; /**< high watermark, stop queue if free space less than this */
251} __attribute__ ((packed));
252
253struct machdr32
254{
255 u16 frame_ctl;
256 u16 duration; // watch out for endians!
257 u8 addr1[ MACADRR_BYTE_LEN ];
258 u8 addr2[ MACADRR_BYTE_LEN ];
259 u8 addr3[ MACADRR_BYTE_LEN ];
260 u16 seq_ctrl; // more endians!
261 u8 addr4[ MACADRR_BYTE_LEN ];
262 u16 qos_ctrl;
263} __attribute__ ((packed)) ;
264
265struct machdr30
266{
267 u16 frame_ctl;
268 u16 duration; // watch out for endians!
269 u8 addr1[ MACADRR_BYTE_LEN ];
270 u8 addr2[ MACADRR_BYTE_LEN ];
271 u8 addr3[ MACADRR_BYTE_LEN ];
272 u16 seq_ctrl; // more endians!
273 u8 addr4[ MACADRR_BYTE_LEN ];
274} __attribute__ ((packed)) ;
275
276struct machdr26
277{
278 u16 frame_ctl;
279 u16 duration; // watch out for endians!
280 u8 addr1[ MACADRR_BYTE_LEN ];
281 u8 addr2[ MACADRR_BYTE_LEN ];
282 u8 addr3[ MACADRR_BYTE_LEN ];
283 u16 seq_ctrl; // more endians!
284 u16 qos_ctrl;
285} __attribute__ ((packed)) ;
286
287struct machdr24
288{
289 u16 frame_ctl;
290 u16 duration; // watch out for endians!
291 u8 addr1[ MACADRR_BYTE_LEN ];
292 u8 addr2[ MACADRR_BYTE_LEN ];
293 u8 addr3[ MACADRR_BYTE_LEN ];
294 u16 seq_ctrl; // more endians!
295} __attribute__ ((packed)) ;
296
297// TX TFD with 32 byte MAC Header
298struct tx_tfd_32
299{
300 struct machdr32 mchdr; // 32
301 u32 uivplaceholder[2]; // 8
302} __attribute__ ((packed)) ;
303
304// TX TFD with 30 byte MAC Header
305struct tx_tfd_30
306{
307 struct machdr30 mchdr; // 30
308 u8 reserved[2]; // 2
309 u32 uivplaceholder[2]; // 8
310} __attribute__ ((packed)) ;
311
312// tx tfd with 26 byte mac header
313struct tx_tfd_26
314{
315 struct machdr26 mchdr; // 26
316 u8 reserved1[2]; // 2
317 u32 uivplaceholder[2]; // 8
318 u8 reserved2[4]; // 4
319} __attribute__ ((packed)) ;
320
321// tx tfd with 24 byte mac header
322struct tx_tfd_24
323{
324 struct machdr24 mchdr; // 24
325 u32 uivplaceholder[2]; // 8
326 u8 reserved[8]; // 8
327} __attribute__ ((packed)) ;
328
329
330#define DCT_WEP_KEY_FIELD_LENGTH 16
331
332struct tfd_command
333{
334 u8 index;
335 u8 length;
336 u16 reserved;
337 u8 payload[0];
338} __attribute__ ((packed)) ;
339
340struct tfd_data {
341 /* Header */
342 u32 work_area_ptr;
343 u8 station_number; /* 0 for BSS */
344 u8 reserved1;
345 u16 reserved2;
346
347 /* Tx Parameters */
348 u8 cmd_id;
349 u8 seq_num;
350 u16 len;
351 u8 priority;
352 u8 tx_flags;
353 u8 tx_flags_ext;
354 u8 key_index;
355 u8 wepkey[DCT_WEP_KEY_FIELD_LENGTH];
356 u8 rate;
357 u8 antenna;
358 u16 next_packet_duration;
359 u16 next_frag_len;
360 u16 back_off_counter; //////txop;
361 u8 retrylimit;
362 u16 cwcurrent;
363 u8 reserved3;
364
365 /* 802.11 MAC Header */
366 union
367 {
368 struct tx_tfd_24 tfd_24;
369 struct tx_tfd_26 tfd_26;
370 struct tx_tfd_30 tfd_30;
371 struct tx_tfd_32 tfd_32;
372 } tfd;
373
374 /* Payload DMA info */
375 u32 num_chunks;
376 u32 chunk_ptr[NUM_TFD_CHUNKS];
377 u16 chunk_len[NUM_TFD_CHUNKS];
378} __attribute__ ((packed));
379
380struct txrx_control_flags
381{
382 u8 message_type;
383 u8 rx_seq_num;
384 u8 control_bits;
385 u8 reserved;
386} __attribute__ ((packed));
387
388#define TFD_SIZE 128
389#define TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH (TFD_SIZE - sizeof(struct txrx_control_flags))
390
391struct tfd_frame
392{
393 struct txrx_control_flags control_flags;
394 union {
395 struct tfd_data data;
396 struct tfd_command cmd;
397 u8 raw[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH];
398 } u;
399} __attribute__ ((packed)) ;
400
401typedef void destructor_func(const void*);
402
403/**
404 * Tx Queue for DMA. Queue consists of circular buffer of
405 * BD's and required locking structures.
406 */
407struct clx2_tx_queue {
408 struct clx2_queue q;
409 struct tfd_frame* bd;
410 struct ieee80211_txb **txb;
411};
412
413/*
414 * RX related structures and functions
415 */
416#define RX_FREE_BUFFERS 32
417#define RX_LOW_WATERMARK 8
418
419#define SUP_RATE_11A_MAX_NUM_CHANNELS (8)
420#define SUP_RATE_11B_MAX_NUM_CHANNELS (4)
421#define SUP_RATE_11G_MAX_NUM_CHANNELS (12)
422
423// Used for passing to driver number of successes and failures per rate
424struct rate_histogram
425{
426 union {
427 u32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
428 u32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
429 u32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
430 } success;
431 union {
432 u32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
433 u32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
434 u32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
435 } failed;
436} __attribute__ ((packed));
437
438/* statistics command response */
439struct ipw_cmd_stats {
440 u8 cmd_id;
441 u8 seq_num;
442 u16 good_sfd;
443 u16 bad_plcp;
444 u16 wrong_bssid;
445 u16 valid_mpdu;
446 u16 bad_mac_header;
447 u16 reserved_frame_types;
448 u16 rx_ina;
449 u16 bad_crc32;
450 u16 invalid_cts;
451 u16 invalid_acks;
452 u16 long_distance_ina_fina;
453 u16 dsp_silence_unreachable;
454 u16 accumulated_rssi;
455 u16 rx_ovfl_frame_tossed;
456 u16 rssi_silence_threshold;
457 u16 rx_ovfl_frame_supplied;
458 u16 last_rx_frame_signal;
459 u16 last_rx_frame_noise;
460 u16 rx_autodetec_no_ofdm;
461 u16 rx_autodetec_no_barker;
462 u16 reserved;
463} __attribute__ ((packed));
464
465struct notif_channel_result {
466 u8 channel_num;
467 struct ipw_cmd_stats stats;
468 u8 uReserved;
469} __attribute__ ((packed));
470
471struct notif_scan_complete {
472 u8 scan_type;
473 u8 num_channels;
474 u8 status;
475 u8 reserved;
476} __attribute__ ((packed));
477
478struct notif_frag_length {
479 u16 frag_length;
480 u16 reserved;
481} __attribute__ ((packed));
482
483struct notif_beacon_state {
484 u32 state;
485 u32 number;
486} __attribute__ ((packed));
487
488struct notif_tgi_tx_key {
489 u8 key_state;
490 u8 security_type;
491 u8 station_index;
492 u8 reserved;
493} __attribute__ ((packed));
494
495struct notif_link_deterioration {
496 struct ipw_cmd_stats stats;
497 u8 rate;
498 u8 modulation;
499 struct rate_histogram histogram;
500 u8 reserved1;
501 u16 reserved2;
502} __attribute__ ((packed));
503
504struct notif_association {
505 u8 state;
506} __attribute__ ((packed));
507
508struct notif_authenticate {
509 u8 state;
510 struct machdr24 addr;
511 u16 status;
512} __attribute__ ((packed));
513
514struct notif_calibration {
515 u8 data[104];
516} __attribute__ ((packed));
517
518struct notif_noise {
519 u32 value;
520} __attribute__ ((packed));
521
522struct ipw_rx_notification {
523 u8 reserved[8];
524 u8 subtype;
525 u8 flags;
526 u16 size;
527 union {
528 struct notif_association assoc;
529 struct notif_authenticate auth;
530 struct notif_channel_result channel_result;
531 struct notif_scan_complete scan_complete;
532 struct notif_frag_length frag_len;
533 struct notif_beacon_state beacon_state;
534 struct notif_tgi_tx_key tgi_tx_key;
535 struct notif_link_deterioration link_deterioration;
536 struct notif_calibration calibration;
537 struct notif_noise noise;
538 u8 raw[0];
539 } u;
540} __attribute__ ((packed));
541
542struct ipw_rx_frame {
543 u32 reserved1;
544 u8 parent_tsf[4]; // fw_use[0] is boolean for OUR_TSF_IS_GREATER
545 u8 received_channel; // The channel that this frame was received on.
546 // Note that for .11b this does not have to be
547 // the same as the channel that it was sent.
548 // Filled by LMAC
549 u8 frameStatus;
550 u8 rate;
551 u8 rssi;
552 u8 agc;
553 u8 rssi_dbm;
554 u16 signal;
555 u16 noise;
556 u8 antennaAndPhy;
557 u8 control; // control bit should be on in bg
558 u8 rtscts_rate; // rate of rts or cts (in rts cts sequence rate
559 // is identical)
560 u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen
561 u16 length;
562 u8 data[0];
563} __attribute__ ((packed));
564
565struct ipw_rx_header {
566 u8 message_type;
567 u8 rx_seq_num;
568 u8 control_bits;
569 u8 reserved;
570} __attribute__ ((packed));
571
572struct ipw_rx_packet
573{
574 struct ipw_rx_header header;
575 union {
576 struct ipw_rx_frame frame;
577 struct ipw_rx_notification notification;
578 } u;
579} __attribute__ ((packed));
580
581#define IPW_RX_NOTIFICATION_SIZE sizeof(struct ipw_rx_header) + 12
582#define IPW_RX_FRAME_SIZE sizeof(struct ipw_rx_header) + \
583 sizeof(struct ipw_rx_frame)
584
585struct ipw_rx_mem_buffer {
586 dma_addr_t dma_addr;
587 struct ipw_rx_buffer *rxb;
588 struct sk_buff *skb;
589 struct list_head list;
590}; /* Not transferred over network, so not __attribute__ ((packed)) */
591
592struct ipw_rx_queue {
593 struct ipw_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
594 struct ipw_rx_mem_buffer *queue[RX_QUEUE_SIZE];
595 u32 processed; /* Internal index to last handled Rx packet */
596 u32 read; /* Shared index to newest available Rx buffer */
597 u32 write; /* Shared index to oldest written Rx packet */
598 u32 free_count;/* Number of pre-allocated buffers in rx_free */
599 /* Each of these lists is used as a FIFO for ipw_rx_mem_buffers */
600 struct list_head rx_free; /* Own an SKBs */
601 struct list_head rx_used; /* No SKB allocated */
602 spinlock_t lock;
603}; /* Not transferred over network, so not __attribute__ ((packed)) */
604
605
606struct alive_command_responce {
607 u8 alive_command;
608 u8 sequence_number;
609 u16 software_revision;
610 u8 device_identifier;
611 u8 reserved1[5];
612 u16 reserved2;
613 u16 reserved3;
614 u16 clock_settle_time;
615 u16 powerup_settle_time;
616 u16 reserved4;
617 u8 time_stamp[5]; /* month, day, year, hours, minutes */
618 u8 ucode_valid;
619} __attribute__ ((packed));
620
621#define IPW_MAX_RATES 12
622
623struct ipw_rates {
624 u8 num_rates;
625 u8 rates[IPW_MAX_RATES];
626} __attribute__ ((packed));
627
628struct command_block
629{
630 unsigned int control;
631 u32 source_addr;
632 u32 dest_addr;
633 unsigned int status;
634} __attribute__ ((packed));
635
636#define CB_NUMBER_OF_ELEMENTS_SMALL 64
637struct fw_image_desc
638{
639 unsigned long last_cb_index;
640 unsigned long current_cb_index;
641 struct command_block cb_list[CB_NUMBER_OF_ELEMENTS_SMALL];
642 void * v_addr;
643 unsigned long p_addr;
644 unsigned long len;
645};
646
647struct ipw_sys_config
648{
649 u8 bt_coexistence;
650 u8 reserved1;
651 u8 answer_broadcast_ssid_probe;
652 u8 accept_all_data_frames;
653 u8 accept_non_directed_frames;
654 u8 exclude_unicast_unencrypted;
655 u8 disable_unicast_decryption;
656 u8 exclude_multicast_unencrypted;
657 u8 disable_multicast_decryption;
658 u8 antenna_diversity;
659 u8 pass_crc_to_host;
660 u8 dot11g_auto_detection;
661 u8 enable_cts_to_self;
662 u8 enable_multicast_filtering;
663 u8 bt_coexist_collision_thr;
664 u8 reserved2;
665 u8 accept_all_mgmt_bcpr;
666 u8 accept_all_mgtm_frames;
667 u8 pass_noise_stats_to_host;
668 u8 reserved3;
669} __attribute__ ((packed));
670
671struct ipw_multicast_addr
672{
673 u8 num_of_multicast_addresses;
674 u8 reserved[3];
675 u8 mac1[6];
676 u8 mac2[6];
677 u8 mac3[6];
678 u8 mac4[6];
679} __attribute__ ((packed));
680
681struct ipw_wep_key
682{
683 u8 cmd_id;
684 u8 seq_num;
685 u8 key_index;
686 u8 key_size;
687 u8 key[16];
688} __attribute__ ((packed));
689
690struct ipw_tgi_tx_key
691{
692 u8 key_id;
693 u8 security_type;
694 u8 station_index;
695 u8 flags;
696 u8 key[16];
697 u32 tx_counter[2];
698} __attribute__ ((packed));
699
700#define IPW_SCAN_CHANNELS 54
701
702struct ipw_scan_request
703{
704 u8 scan_type;
705 u16 dwell_time;
706 u8 channels_list[IPW_SCAN_CHANNELS];
707 u8 channels_reserved[3];
708} __attribute__ ((packed));
709
710enum {
711 IPW_SCAN_PASSIVE_TILL_FIRST_BEACON_SCAN = 0,
712 IPW_SCAN_PASSIVE_FULL_DWELL_SCAN,
713 IPW_SCAN_ACTIVE_DIRECT_SCAN,
714 IPW_SCAN_ACTIVE_BROADCAST_SCAN,
715 IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN,
716 IPW_SCAN_TYPES
717};
718
719struct ipw_scan_request_ext
720{
721 u32 full_scan_index;
722 u8 channels_list[IPW_SCAN_CHANNELS];
723 u8 scan_type[IPW_SCAN_CHANNELS / 2];
724 u8 reserved;
725 u16 dwell_time[IPW_SCAN_TYPES];
726} __attribute__ ((packed));
727
728extern inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index)
729{
730 if (index % 2)
731 return scan->scan_type[index / 2] & 0x0F;
732 else
733 return (scan->scan_type[index / 2] & 0xF0) >> 4;
734}
735
736extern inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan,
737 u8 index, u8 scan_type)
738{
739 if (index % 2)
740 scan->scan_type[index / 2] =
741 (scan->scan_type[index / 2] & 0xF0) |
742 (scan_type & 0x0F);
743 else
744 scan->scan_type[index / 2] =
745 (scan->scan_type[index / 2] & 0x0F) |
746 ((scan_type & 0x0F) << 4);
747}
748
749struct ipw_associate
750{
751 u8 channel;
752 u8 auth_type:4,
753 auth_key:4;
754 u8 assoc_type;
755 u8 reserved;
756 u16 policy_support;
757 u8 preamble_length;
758 u8 ieee_mode;
759 u8 bssid[ETH_ALEN];
760 u32 assoc_tsf_msw;
761 u32 assoc_tsf_lsw;
762 u16 capability;
763 u16 listen_interval;
764 u16 beacon_interval;
765 u8 dest[ETH_ALEN];
766 u16 atim_window;
767 u8 smr;
768 u8 reserved1;
769 u16 reserved2;
770} __attribute__ ((packed));
771
772struct ipw_supported_rates
773{
774 u8 ieee_mode;
775 u8 num_rates;
776 u8 purpose;
777 u8 reserved;
778 u8 supported_rates[IPW_MAX_RATES];
779} __attribute__ ((packed));
780
781struct ipw_rts_threshold
782{
783 u16 rts_threshold;
784 u16 reserved;
785} __attribute__ ((packed));
786
787struct ipw_frag_threshold
788{
789 u16 frag_threshold;
790 u16 reserved;
791} __attribute__ ((packed));
792
793struct ipw_retry_limit
794{
795 u8 short_retry_limit;
796 u8 long_retry_limit;
797 u16 reserved;
798} __attribute__ ((packed));
799
800struct ipw_dino_config
801{
802 u32 dino_config_addr;
803 u16 dino_config_size;
804 u8 dino_response;
805 u8 reserved;
806} __attribute__ ((packed));
807
808struct ipw_aironet_info
809{
810 u8 id;
811 u8 length;
812 u16 reserved;
813} __attribute__ ((packed));
814
815struct ipw_rx_key
816{
817 u8 station_index;
818 u8 key_type;
819 u8 key_id;
820 u8 key_flag;
821 u8 key[16];
822 u8 station_address[6];
823 u8 key_index;
824 u8 reserved;
825} __attribute__ ((packed));
826
827struct ipw_country_channel_info
828{
829 u8 first_channel;
830 u8 no_channels;
831 s8 max_tx_power;
832} __attribute__ ((packed));
833
834struct ipw_country_info
835{
836 u8 id;
837 u8 length;
838 u8 country_str[3];
839 struct ipw_country_channel_info groups[7];
840} __attribute__ ((packed));
841
842struct ipw_channel_tx_power
843{
844 u8 channel_number;
845 s8 tx_power;
846} __attribute__ ((packed));
847
848#define SCAN_ASSOCIATED_INTERVAL (HZ)
849#define SCAN_INTERVAL (HZ / 10)
850#define MAX_A_CHANNELS 37
851#define MAX_B_CHANNELS 14
852
853struct ipw_tx_power
854{
855 u8 num_channels;
856 u8 ieee_mode;
857 struct ipw_channel_tx_power channels_tx_power[MAX_A_CHANNELS];
858} __attribute__ ((packed));
859
860struct ipw_qos_parameters
861{
862 u16 cw_min[4];
863 u16 cw_max[4];
864 u8 aifs[4];
865 u8 flag[4];
866 u16 tx_op_limit[4];
867} __attribute__ ((packed));
868
869struct ipw_rsn_capabilities
870{
871 u8 id;
872 u8 length;
873 u16 version;
874} __attribute__ ((packed));
875
876struct ipw_sensitivity_calib
877{
878 u16 beacon_rssi_raw;
879 u16 reserved;
880} __attribute__ ((packed));
881
882/**
883 * Host command structure.
884 *
885 * On input, the following fields should be filled:
886 * - cmd
887 * - len
888 * - status_len
889 * - param (if needed)
890 *
891 * On output,
892 * - \a status contains status;
893 * - \a param filled with status parameters.
894 */
895struct ipw_cmd {
896 u32 cmd; /**< Host command */
897 u32 status; /**< Status */
898 u32 status_len; /**< How many 32 bit parameters in the status */
899 u32 len; /**< incoming parameters length, bytes */
900 /**
901 * command parameters.
902 * There should be enough space for incoming and
903 * outcoming parameters.
904 * Incoming parameters listed 1-st, followed by outcoming params.
905 * nParams=(len+3)/4+status_len
906 */
907 u32 param[0];
908} __attribute__ ((packed));
909
910#define STATUS_HCMD_ACTIVE (1<<0) /**< host command in progress */
911
912#define STATUS_INT_ENABLED (1<<1)
913#define STATUS_RF_KILL_HW (1<<2)
914#define STATUS_RF_KILL_SW (1<<3)
915#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
916
917#define STATUS_INIT (1<<5)
918#define STATUS_AUTH (1<<6)
919#define STATUS_ASSOCIATED (1<<7)
920#define STATUS_STATE_MASK (STATUS_INIT | STATUS_AUTH | STATUS_ASSOCIATED)
921
922#define STATUS_ASSOCIATING (1<<8)
923#define STATUS_DISASSOCIATING (1<<9)
924#define STATUS_ROAMING (1<<10)
925#define STATUS_EXIT_PENDING (1<<11)
926#define STATUS_DISASSOC_PENDING (1<<12)
927#define STATUS_STATE_PENDING (1<<13)
928
929#define STATUS_SCAN_PENDING (1<<20)
930#define STATUS_SCANNING (1<<21)
931#define STATUS_SCAN_ABORTING (1<<22)
932
933#define STATUS_INDIRECT_BYTE (1<<28) /* sysfs entry configured for access */
934#define STATUS_INDIRECT_DWORD (1<<29) /* sysfs entry configured for access */
935#define STATUS_DIRECT_DWORD (1<<30) /* sysfs entry configured for access */
936
937#define STATUS_SECURITY_UPDATED (1<<31) /* Security sync needed */
938
939#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
940#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
941#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
942#define CFG_CUSTOM_MAC (1<<3)
943#define CFG_PREAMBLE (1<<4)
944#define CFG_ADHOC_PERSIST (1<<5)
945#define CFG_ASSOCIATE (1<<6)
946#define CFG_FIXED_RATE (1<<7)
947#define CFG_ADHOC_CREATE (1<<8)
948
949#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
950#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
951
952#define MAX_STATIONS 32
953#define IPW_INVALID_STATION (0xff)
954
955struct ipw_station_entry {
956 u8 mac_addr[ETH_ALEN];
957 u8 reserved;
958 u8 support_mode;
959};
960
961#define AVG_ENTRIES 8
962struct average {
963 s16 entries[AVG_ENTRIES];
964 u8 pos;
965 u8 init;
966 s32 sum;
967};
968
969struct ipw_priv {
970 /* ieee device used by generic ieee processing code */
971 struct ieee80211_device *ieee;
972 struct ieee80211_security sec;
973
974 /* spinlock */
975 spinlock_t lock;
976
977 /* basic pci-network driver stuff */
978 struct pci_dev *pci_dev;
979 struct net_device *net_dev;
980
981 /* pci hardware address support */
982 void __iomem *hw_base;
983 unsigned long hw_len;
984
985 struct fw_image_desc sram_desc;
986
987 /* result of ucode download */
988 struct alive_command_responce dino_alive;
989
990 wait_queue_head_t wait_command_queue;
991 wait_queue_head_t wait_state;
992
993 /* Rx and Tx DMA processing queues */
994 struct ipw_rx_queue *rxq;
995 struct clx2_tx_queue txq_cmd;
996 struct clx2_tx_queue txq[4];
997 u32 status;
998 u32 config;
999 u32 capability;
1000
1001 u8 last_rx_rssi;
1002 u8 last_noise;
1003 struct average average_missed_beacons;
1004 struct average average_rssi;
1005 struct average average_noise;
1006 u32 port_type;
1007 int rx_bufs_min; /**< minimum number of bufs in Rx queue */
1008 int rx_pend_max; /**< maximum pending buffers for one IRQ */
1009 u32 hcmd_seq; /**< sequence number for hcmd */
1010 u32 missed_beacon_threshold;
1011 u32 roaming_threshold;
1012
1013 struct ipw_associate assoc_request;
1014 struct ieee80211_network *assoc_network;
1015
1016 unsigned long ts_scan_abort;
1017 struct ipw_supported_rates rates;
1018 struct ipw_rates phy[3]; /**< PHY restrictions, per band */
1019 struct ipw_rates supp; /**< software defined */
1020 struct ipw_rates extended; /**< use for corresp. IE, AP only */
1021
1022 struct notif_link_deterioration last_link_deterioration; /** for statistics */
1023 struct ipw_cmd* hcmd; /**< host command currently executed */
1024
1025 wait_queue_head_t hcmd_wq; /**< host command waits for execution */
1026 u32 tsf_bcn[2]; /**< TSF from latest beacon */
1027
1028 struct notif_calibration calib; /**< last calibration */
1029
1030 /* ordinal interface with firmware */
1031 u32 table0_addr;
1032 u32 table0_len;
1033 u32 table1_addr;
1034 u32 table1_len;
1035 u32 table2_addr;
1036 u32 table2_len;
1037
1038 /* context information */
1039 u8 essid[IW_ESSID_MAX_SIZE];
1040 u8 essid_len;
1041 u8 nick[IW_ESSID_MAX_SIZE];
1042 u16 rates_mask;
1043 u8 channel;
1044 struct ipw_sys_config sys_config;
1045 u32 power_mode;
1046 u8 bssid[ETH_ALEN];
1047 u16 rts_threshold;
1048 u8 mac_addr[ETH_ALEN];
1049 u8 num_stations;
1050 u8 stations[MAX_STATIONS][ETH_ALEN];
1051
1052 u32 notif_missed_beacons;
1053
1054 /* Statistics and counters normalized with each association */
1055 u32 last_missed_beacons;
1056 u32 last_tx_packets;
1057 u32 last_rx_packets;
1058 u32 last_tx_failures;
1059 u32 last_rx_err;
1060 u32 last_rate;
1061
1062 u32 missed_adhoc_beacons;
1063 u32 missed_beacons;
1064 u32 rx_packets;
1065 u32 tx_packets;
1066 u32 quality;
1067
1068 /* eeprom */
1069 u8 eeprom[0x100]; /* 256 bytes of eeprom */
1070 int eeprom_delay;
1071
1072 struct iw_statistics wstats;
1073
1074 struct workqueue_struct *workqueue;
1075
1076 struct work_struct adhoc_check;
1077 struct work_struct associate;
1078 struct work_struct disassociate;
1079 struct work_struct rx_replenish;
1080 struct work_struct request_scan;
1081 struct work_struct adapter_restart;
1082 struct work_struct rf_kill;
1083 struct work_struct up;
1084 struct work_struct down;
1085 struct work_struct gather_stats;
1086 struct work_struct abort_scan;
1087 struct work_struct roam;
1088 struct work_struct scan_check;
1089
1090 struct tasklet_struct irq_tasklet;
1091
1092
1093#define IPW_2200BG 1
1094#define IPW_2915ABG 2
1095 u8 adapter;
1096
1097#define IPW_DEFAULT_TX_POWER 0x14
1098 u8 tx_power;
1099
1100#ifdef CONFIG_PM
1101 u32 pm_state[16];
1102#endif
1103
1104 /* network state */
1105
1106 /* Used to pass the current INTA value from ISR to Tasklet */
1107 u32 isr_inta;
1108
1109 /* debugging info */
1110 u32 indirect_dword;
1111 u32 direct_dword;
1112 u32 indirect_byte;
1113}; /*ipw_priv */
1114
1115
1116/* debug macros */
1117
1118#ifdef CONFIG_IPW_DEBUG
1119#define IPW_DEBUG(level, fmt, args...) \
1120do { if (ipw_debug_level & (level)) \
1121 printk(KERN_DEBUG DRV_NAME": %c %s " fmt, \
1122 in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
1123#else
1124#define IPW_DEBUG(level, fmt, args...) do {} while (0)
1125#endif /* CONFIG_IPW_DEBUG */
1126
1127/*
1128 * To use the debug system;
1129 *
1130 * If you are defining a new debug classification, simply add it to the #define
1131 * list here in the form of:
1132 *
1133 * #define IPW_DL_xxxx VALUE
1134 *
1135 * shifting value to the left one bit from the previous entry. xxxx should be
1136 * the name of the classification (for example, WEP)
1137 *
1138 * You then need to either add a IPW_xxxx_DEBUG() macro definition for your
1139 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
1140 * to send output to that classification.
1141 *
1142 * To add your debug level to the list of levels seen when you perform
1143 *
1144 * % cat /proc/net/ipw/debug_level
1145 *
1146 * you simply need to add your entry to the ipw_debug_levels array.
1147 *
1148 * If you do not see debug_level in /proc/net/ipw then you do not have
1149 * CONFIG_IPW_DEBUG defined in your kernel configuration
1150 *
1151 */
1152
1153#define IPW_DL_ERROR (1<<0)
1154#define IPW_DL_WARNING (1<<1)
1155#define IPW_DL_INFO (1<<2)
1156#define IPW_DL_WX (1<<3)
1157#define IPW_DL_HOST_COMMAND (1<<5)
1158#define IPW_DL_STATE (1<<6)
1159
1160#define IPW_DL_NOTIF (1<<10)
1161#define IPW_DL_SCAN (1<<11)
1162#define IPW_DL_ASSOC (1<<12)
1163#define IPW_DL_DROP (1<<13)
1164#define IPW_DL_IOCTL (1<<14)
1165
1166#define IPW_DL_MANAGE (1<<15)
1167#define IPW_DL_FW (1<<16)
1168#define IPW_DL_RF_KILL (1<<17)
1169#define IPW_DL_FW_ERRORS (1<<18)
1170
1171
1172#define IPW_DL_ORD (1<<20)
1173
1174#define IPW_DL_FRAG (1<<21)
1175#define IPW_DL_WEP (1<<22)
1176#define IPW_DL_TX (1<<23)
1177#define IPW_DL_RX (1<<24)
1178#define IPW_DL_ISR (1<<25)
1179#define IPW_DL_FW_INFO (1<<26)
1180#define IPW_DL_IO (1<<27)
1181#define IPW_DL_TRACE (1<<28)
1182
1183#define IPW_DL_STATS (1<<29)
1184
1185
1186#define IPW_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
1187#define IPW_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
1188#define IPW_DEBUG_INFO(f, a...) IPW_DEBUG(IPW_DL_INFO, f, ## a)
1189
1190#define IPW_DEBUG_WX(f, a...) IPW_DEBUG(IPW_DL_WX, f, ## a)
1191#define IPW_DEBUG_SCAN(f, a...) IPW_DEBUG(IPW_DL_SCAN, f, ## a)
1192#define IPW_DEBUG_STATUS(f, a...) IPW_DEBUG(IPW_DL_STATUS, f, ## a)
1193#define IPW_DEBUG_TRACE(f, a...) IPW_DEBUG(IPW_DL_TRACE, f, ## a)
1194#define IPW_DEBUG_RX(f, a...) IPW_DEBUG(IPW_DL_RX, f, ## a)
1195#define IPW_DEBUG_TX(f, a...) IPW_DEBUG(IPW_DL_TX, f, ## a)
1196#define IPW_DEBUG_ISR(f, a...) IPW_DEBUG(IPW_DL_ISR, f, ## a)
1197#define IPW_DEBUG_MANAGEMENT(f, a...) IPW_DEBUG(IPW_DL_MANAGE, f, ## a)
1198#define IPW_DEBUG_WEP(f, a...) IPW_DEBUG(IPW_DL_WEP, f, ## a)
1199#define IPW_DEBUG_HC(f, a...) IPW_DEBUG(IPW_DL_HOST_COMMAND, f, ## a)
1200#define IPW_DEBUG_FRAG(f, a...) IPW_DEBUG(IPW_DL_FRAG, f, ## a)
1201#define IPW_DEBUG_FW(f, a...) IPW_DEBUG(IPW_DL_FW, f, ## a)
1202#define IPW_DEBUG_RF_KILL(f, a...) IPW_DEBUG(IPW_DL_RF_KILL, f, ## a)
1203#define IPW_DEBUG_DROP(f, a...) IPW_DEBUG(IPW_DL_DROP, f, ## a)
1204#define IPW_DEBUG_IO(f, a...) IPW_DEBUG(IPW_DL_IO, f, ## a)
1205#define IPW_DEBUG_ORD(f, a...) IPW_DEBUG(IPW_DL_ORD, f, ## a)
1206#define IPW_DEBUG_FW_INFO(f, a...) IPW_DEBUG(IPW_DL_FW_INFO, f, ## a)
1207#define IPW_DEBUG_NOTIF(f, a...) IPW_DEBUG(IPW_DL_NOTIF, f, ## a)
1208#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
1209#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
1210#define IPW_DEBUG_STATS(f, a...) IPW_DEBUG(IPW_DL_STATS, f, ## a)
1211
1212#include <linux/ctype.h>
1213
1214/*
1215* Register bit definitions
1216*/
1217
1218/* Dino control registers bits */
1219
1220#define DINO_ENABLE_SYSTEM 0x80
1221#define DINO_ENABLE_CS 0x40
1222#define DINO_RXFIFO_DATA 0x01
1223#define DINO_CONTROL_REG 0x00200000
1224
1225#define CX2_INTA_RW 0x00000008
1226#define CX2_INTA_MASK_R 0x0000000C
1227#define CX2_INDIRECT_ADDR 0x00000010
1228#define CX2_INDIRECT_DATA 0x00000014
1229#define CX2_AUTOINC_ADDR 0x00000018
1230#define CX2_AUTOINC_DATA 0x0000001C
1231#define CX2_RESET_REG 0x00000020
1232#define CX2_GP_CNTRL_RW 0x00000024
1233
1234#define CX2_READ_INT_REGISTER 0xFF4
1235
1236#define CX2_GP_CNTRL_BIT_INIT_DONE 0x00000004
1237
1238#define CX2_REGISTER_DOMAIN1_END 0x00001000
1239#define CX2_SRAM_READ_INT_REGISTER 0x00000ff4
1240
1241#define CX2_SHARED_LOWER_BOUND 0x00000200
1242#define CX2_INTERRUPT_AREA_LOWER_BOUND 0x00000f80
1243
1244#define CX2_NIC_SRAM_LOWER_BOUND 0x00000000
1245#define CX2_NIC_SRAM_UPPER_BOUND 0x00030000
1246
1247#define CX2_BIT_INT_HOST_SRAM_READ_INT_REGISTER (1 << 29)
1248#define CX2_GP_CNTRL_BIT_CLOCK_READY 0x00000001
1249#define CX2_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY 0x00000002
1250
1251/*
1252 * RESET Register Bit Indexes
1253 */
1254#define CBD_RESET_REG_PRINCETON_RESET 0x00000001 /* Bit 0 (LSB) */
1255#define CX2_RESET_REG_SW_RESET 0x00000080 /* Bit 7 */
1256#define CX2_RESET_REG_MASTER_DISABLED 0x00000100 /* Bit 8 */
1257#define CX2_RESET_REG_STOP_MASTER 0x00000200 /* Bit 9 */
1258#define CX2_ARC_KESHET_CONFIG 0x08000000 /* Bit 27 */
1259#define CX2_START_STANDBY 0x00000004 /* Bit 2 */
1260
1261#define CX2_CSR_CIS_UPPER_BOUND 0x00000200
1262#define CX2_DOMAIN_0_END 0x1000
1263#define CLX_MEM_BAR_SIZE 0x1000
1264
1265#define CX2_BASEBAND_CONTROL_STATUS 0X00200000
1266#define CX2_BASEBAND_TX_FIFO_WRITE 0X00200004
1267#define CX2_BASEBAND_RX_FIFO_READ 0X00200004
1268#define CX2_BASEBAND_CONTROL_STORE 0X00200010
1269
1270#define CX2_INTERNAL_CMD_EVENT 0X00300004
1271#define CX2_BASEBAND_POWER_DOWN 0x00000001
1272
1273#define CX2_MEM_HALT_AND_RESET 0x003000e0
1274
1275/* defgroup bits_halt_reset MEM_HALT_AND_RESET register bits */
1276#define CX2_BIT_HALT_RESET_ON 0x80000000
1277#define CX2_BIT_HALT_RESET_OFF 0x00000000
1278
1279#define CB_LAST_VALID 0x20000000
1280#define CB_INT_ENABLED 0x40000000
1281#define CB_VALID 0x80000000
1282#define CB_SRC_LE 0x08000000
1283#define CB_DEST_LE 0x04000000
1284#define CB_SRC_AUTOINC 0x00800000
1285#define CB_SRC_IO_GATED 0x00400000
1286#define CB_DEST_AUTOINC 0x00080000
1287#define CB_SRC_SIZE_LONG 0x00200000
1288#define CB_DEST_SIZE_LONG 0x00020000
1289
1290
1291/* DMA DEFINES */
1292
1293#define DMA_CONTROL_SMALL_CB_CONST_VALUE 0x00540000
1294#define DMA_CB_STOP_AND_ABORT 0x00000C00
1295#define DMA_CB_START 0x00000100
1296
1297
1298#define CX2_SHARED_SRAM_SIZE 0x00030000
1299#define CX2_SHARED_SRAM_DMA_CONTROL 0x00027000
1300#define CB_MAX_LENGTH 0x1FFF
1301
1302#define CX2_HOST_EEPROM_DATA_SRAM_SIZE 0xA18
1303#define CX2_EEPROM_IMAGE_SIZE 0x100
1304
1305
1306/* DMA defs */
1307#define CX2_DMA_I_CURRENT_CB 0x003000D0
1308#define CX2_DMA_O_CURRENT_CB 0x003000D4
1309#define CX2_DMA_I_DMA_CONTROL 0x003000A4
1310#define CX2_DMA_I_CB_BASE 0x003000A0
1311
1312#define CX2_TX_CMD_QUEUE_BD_BASE (0x00000200)
1313#define CX2_TX_CMD_QUEUE_BD_SIZE (0x00000204)
1314#define CX2_TX_QUEUE_0_BD_BASE (0x00000208)
1315#define CX2_TX_QUEUE_0_BD_SIZE (0x0000020C)
1316#define CX2_TX_QUEUE_1_BD_BASE (0x00000210)
1317#define CX2_TX_QUEUE_1_BD_SIZE (0x00000214)
1318#define CX2_TX_QUEUE_2_BD_BASE (0x00000218)
1319#define CX2_TX_QUEUE_2_BD_SIZE (0x0000021C)
1320#define CX2_TX_QUEUE_3_BD_BASE (0x00000220)
1321#define CX2_TX_QUEUE_3_BD_SIZE (0x00000224)
1322#define CX2_RX_BD_BASE (0x00000240)
1323#define CX2_RX_BD_SIZE (0x00000244)
1324#define CX2_RFDS_TABLE_LOWER (0x00000500)
1325
1326#define CX2_TX_CMD_QUEUE_READ_INDEX (0x00000280)
1327#define CX2_TX_QUEUE_0_READ_INDEX (0x00000284)
1328#define CX2_TX_QUEUE_1_READ_INDEX (0x00000288)
1329#define CX2_TX_QUEUE_2_READ_INDEX (0x0000028C)
1330#define CX2_TX_QUEUE_3_READ_INDEX (0x00000290)
1331#define CX2_RX_READ_INDEX (0x000002A0)
1332
1333#define CX2_TX_CMD_QUEUE_WRITE_INDEX (0x00000F80)
1334#define CX2_TX_QUEUE_0_WRITE_INDEX (0x00000F84)
1335#define CX2_TX_QUEUE_1_WRITE_INDEX (0x00000F88)
1336#define CX2_TX_QUEUE_2_WRITE_INDEX (0x00000F8C)
1337#define CX2_TX_QUEUE_3_WRITE_INDEX (0x00000F90)
1338#define CX2_RX_WRITE_INDEX (0x00000FA0)
1339
1340/*
1341 * EEPROM Related Definitions
1342 */
1343
1344#define IPW_EEPROM_DATA_SRAM_ADDRESS (CX2_SHARED_LOWER_BOUND + 0x814)
1345#define IPW_EEPROM_DATA_SRAM_SIZE (CX2_SHARED_LOWER_BOUND + 0x818)
1346#define IPW_EEPROM_LOAD_DISABLE (CX2_SHARED_LOWER_BOUND + 0x81C)
1347#define IPW_EEPROM_DATA (CX2_SHARED_LOWER_BOUND + 0x820)
1348#define IPW_EEPROM_UPPER_ADDRESS (CX2_SHARED_LOWER_BOUND + 0x9E0)
1349
1350#define IPW_STATION_TABLE_LOWER (CX2_SHARED_LOWER_BOUND + 0xA0C)
1351#define IPW_STATION_TABLE_UPPER (CX2_SHARED_LOWER_BOUND + 0xB0C)
1352#define IPW_REQUEST_ATIM (CX2_SHARED_LOWER_BOUND + 0xB0C)
1353#define IPW_ATIM_SENT (CX2_SHARED_LOWER_BOUND + 0xB10)
1354#define IPW_WHO_IS_AWAKE (CX2_SHARED_LOWER_BOUND + 0xB14)
1355#define IPW_DURING_ATIM_WINDOW (CX2_SHARED_LOWER_BOUND + 0xB18)
1356
1357
1358#define MSB 1
1359#define LSB 0
1360#define WORD_TO_BYTE(_word) ((_word) * sizeof(u16))
1361
1362#define GET_EEPROM_ADDR(_wordoffset,_byteoffset) \
1363 ( WORD_TO_BYTE(_wordoffset) + (_byteoffset) )
1364
1365/* EEPROM access by BYTE */
1366#define EEPROM_PME_CAPABILITY (GET_EEPROM_ADDR(0x09,MSB)) /* 1 byte */
1367#define EEPROM_MAC_ADDRESS (GET_EEPROM_ADDR(0x21,LSB)) /* 6 byte */
1368#define EEPROM_VERSION (GET_EEPROM_ADDR(0x24,MSB)) /* 1 byte */
1369#define EEPROM_NIC_TYPE (GET_EEPROM_ADDR(0x25,LSB)) /* 1 byte */
1370#define EEPROM_SKU_CAPABILITY (GET_EEPROM_ADDR(0x25,MSB)) /* 1 byte */
1371#define EEPROM_COUNTRY_CODE (GET_EEPROM_ADDR(0x26,LSB)) /* 3 bytes */
1372#define EEPROM_IBSS_CHANNELS_BG (GET_EEPROM_ADDR(0x28,LSB)) /* 2 bytes */
1373#define EEPROM_IBSS_CHANNELS_A (GET_EEPROM_ADDR(0x29,MSB)) /* 5 bytes */
1374#define EEPROM_BSS_CHANNELS_BG (GET_EEPROM_ADDR(0x2c,LSB)) /* 2 bytes */
1375#define EEPROM_HW_VERSION (GET_EEPROM_ADDR(0x72,LSB)) /* 2 bytes */
1376
1377/* NIC type as found in the one byte EEPROM_NIC_TYPE offset*/
1378#define EEPROM_NIC_TYPE_STANDARD 0
1379#define EEPROM_NIC_TYPE_DELL 1
1380#define EEPROM_NIC_TYPE_FUJITSU 2
1381#define EEPROM_NIC_TYPE_IBM 3
1382#define EEPROM_NIC_TYPE_HP 4
1383
1384#define FW_MEM_REG_LOWER_BOUND 0x00300000
1385#define FW_MEM_REG_EEPROM_ACCESS (FW_MEM_REG_LOWER_BOUND + 0x40)
1386
1387#define EEPROM_BIT_SK (1<<0)
1388#define EEPROM_BIT_CS (1<<1)
1389#define EEPROM_BIT_DI (1<<2)
1390#define EEPROM_BIT_DO (1<<4)
1391
1392#define EEPROM_CMD_READ 0x2
1393
1394/* Interrupts masks */
1395#define CX2_INTA_NONE 0x00000000
1396
1397#define CX2_INTA_BIT_RX_TRANSFER 0x00000002
1398#define CX2_INTA_BIT_STATUS_CHANGE 0x00000010
1399#define CX2_INTA_BIT_BEACON_PERIOD_EXPIRED 0x00000020
1400
1401//Inta Bits for CF
1402#define CX2_INTA_BIT_TX_CMD_QUEUE 0x00000800
1403#define CX2_INTA_BIT_TX_QUEUE_1 0x00001000
1404#define CX2_INTA_BIT_TX_QUEUE_2 0x00002000
1405#define CX2_INTA_BIT_TX_QUEUE_3 0x00004000
1406#define CX2_INTA_BIT_TX_QUEUE_4 0x00008000
1407
1408#define CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE 0x00010000
1409
1410#define CX2_INTA_BIT_PREPARE_FOR_POWER_DOWN 0x00100000
1411#define CX2_INTA_BIT_POWER_DOWN 0x00200000
1412
1413#define CX2_INTA_BIT_FW_INITIALIZATION_DONE 0x01000000
1414#define CX2_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE 0x02000000
1415#define CX2_INTA_BIT_RF_KILL_DONE 0x04000000
1416#define CX2_INTA_BIT_FATAL_ERROR 0x40000000
1417#define CX2_INTA_BIT_PARITY_ERROR 0x80000000
1418
1419/* Interrupts enabled at init time. */
1420#define CX2_INTA_MASK_ALL \
1421 (CX2_INTA_BIT_TX_QUEUE_1 | \
1422 CX2_INTA_BIT_TX_QUEUE_2 | \
1423 CX2_INTA_BIT_TX_QUEUE_3 | \
1424 CX2_INTA_BIT_TX_QUEUE_4 | \
1425 CX2_INTA_BIT_TX_CMD_QUEUE | \
1426 CX2_INTA_BIT_RX_TRANSFER | \
1427 CX2_INTA_BIT_FATAL_ERROR | \
1428 CX2_INTA_BIT_PARITY_ERROR | \
1429 CX2_INTA_BIT_STATUS_CHANGE | \
1430 CX2_INTA_BIT_FW_INITIALIZATION_DONE | \
1431 CX2_INTA_BIT_BEACON_PERIOD_EXPIRED | \
1432 CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE | \
1433 CX2_INTA_BIT_PREPARE_FOR_POWER_DOWN | \
1434 CX2_INTA_BIT_POWER_DOWN | \
1435 CX2_INTA_BIT_RF_KILL_DONE )
1436
1437#define IPWSTATUS_ERROR_LOG (CX2_SHARED_LOWER_BOUND + 0x410)
1438#define IPW_EVENT_LOG (CX2_SHARED_LOWER_BOUND + 0x414)
1439
1440/* FW event log definitions */
1441#define EVENT_ELEM_SIZE (3 * sizeof(u32))
1442#define EVENT_START_OFFSET (1 * sizeof(u32) + 2 * sizeof(u16))
1443
1444/* FW error log definitions */
1445#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1446#define ERROR_START_OFFSET (1 * sizeof(u32))
1447
1448enum {
1449 IPW_FW_ERROR_OK = 0,
1450 IPW_FW_ERROR_FAIL,
1451 IPW_FW_ERROR_MEMORY_UNDERFLOW,
1452 IPW_FW_ERROR_MEMORY_OVERFLOW,
1453 IPW_FW_ERROR_BAD_PARAM,
1454 IPW_FW_ERROR_BAD_CHECKSUM,
1455 IPW_FW_ERROR_NMI_INTERRUPT,
1456 IPW_FW_ERROR_BAD_DATABASE,
1457 IPW_FW_ERROR_ALLOC_FAIL,
1458 IPW_FW_ERROR_DMA_UNDERRUN,
1459 IPW_FW_ERROR_DMA_STATUS,
1460 IPW_FW_ERROR_DINOSTATUS_ERROR,
1461 IPW_FW_ERROR_EEPROMSTATUS_ERROR,
1462 IPW_FW_ERROR_SYSASSERT,
1463 IPW_FW_ERROR_FATAL_ERROR
1464};
1465
1466#define AUTH_OPEN 0
1467#define AUTH_SHARED_KEY 1
1468#define AUTH_IGNORE 3
1469
1470#define HC_ASSOCIATE 0
1471#define HC_REASSOCIATE 1
1472#define HC_DISASSOCIATE 2
1473#define HC_IBSS_START 3
1474#define HC_IBSS_RECONF 4
1475#define HC_DISASSOC_QUIET 5
1476
1477#define IPW_RATE_CAPABILITIES 1
1478#define IPW_RATE_CONNECT 0
1479
1480
1481/*
1482 * Rate values and masks
1483 */
1484#define IPW_TX_RATE_1MB 0x0A
1485#define IPW_TX_RATE_2MB 0x14
1486#define IPW_TX_RATE_5MB 0x37
1487#define IPW_TX_RATE_6MB 0x0D
1488#define IPW_TX_RATE_9MB 0x0F
1489#define IPW_TX_RATE_11MB 0x6E
1490#define IPW_TX_RATE_12MB 0x05
1491#define IPW_TX_RATE_18MB 0x07
1492#define IPW_TX_RATE_24MB 0x09
1493#define IPW_TX_RATE_36MB 0x0B
1494#define IPW_TX_RATE_48MB 0x01
1495#define IPW_TX_RATE_54MB 0x03
1496
1497#define IPW_ORD_TABLE_ID_MASK 0x0000FF00
1498#define IPW_ORD_TABLE_VALUE_MASK 0x000000FF
1499
1500#define IPW_ORD_TABLE_0_MASK 0x0000F000
1501#define IPW_ORD_TABLE_1_MASK 0x0000F100
1502#define IPW_ORD_TABLE_2_MASK 0x0000F200
1503#define IPW_ORD_TABLE_3_MASK 0x0000F300
1504#define IPW_ORD_TABLE_4_MASK 0x0000F400
1505#define IPW_ORD_TABLE_5_MASK 0x0000F500
1506#define IPW_ORD_TABLE_6_MASK 0x0000F600
1507#define IPW_ORD_TABLE_7_MASK 0x0000F700
1508
1509/*
1510 * Table 0 Entries (all entries are 32 bits)
1511 */
1512enum {
1513 IPW_ORD_STAT_TX_CURR_RATE = IPW_ORD_TABLE_0_MASK + 1,
1514 IPW_ORD_STAT_FRAG_TRESHOLD,
1515 IPW_ORD_STAT_RTS_THRESHOLD,
1516 IPW_ORD_STAT_TX_HOST_REQUESTS,
1517 IPW_ORD_STAT_TX_HOST_COMPLETE,
1518 IPW_ORD_STAT_TX_DIR_DATA,
1519 IPW_ORD_STAT_TX_DIR_DATA_B_1,
1520 IPW_ORD_STAT_TX_DIR_DATA_B_2,
1521 IPW_ORD_STAT_TX_DIR_DATA_B_5_5,
1522 IPW_ORD_STAT_TX_DIR_DATA_B_11,
1523 /* Hole */
1524
1525
1526
1527
1528
1529
1530
1531 IPW_ORD_STAT_TX_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 19,
1532 IPW_ORD_STAT_TX_DIR_DATA_G_2,
1533 IPW_ORD_STAT_TX_DIR_DATA_G_5_5,
1534 IPW_ORD_STAT_TX_DIR_DATA_G_6,
1535 IPW_ORD_STAT_TX_DIR_DATA_G_9,
1536 IPW_ORD_STAT_TX_DIR_DATA_G_11,
1537 IPW_ORD_STAT_TX_DIR_DATA_G_12,
1538 IPW_ORD_STAT_TX_DIR_DATA_G_18,
1539 IPW_ORD_STAT_TX_DIR_DATA_G_24,
1540 IPW_ORD_STAT_TX_DIR_DATA_G_36,
1541 IPW_ORD_STAT_TX_DIR_DATA_G_48,
1542 IPW_ORD_STAT_TX_DIR_DATA_G_54,
1543 IPW_ORD_STAT_TX_NON_DIR_DATA,
1544 IPW_ORD_STAT_TX_NON_DIR_DATA_B_1,
1545 IPW_ORD_STAT_TX_NON_DIR_DATA_B_2,
1546 IPW_ORD_STAT_TX_NON_DIR_DATA_B_5_5,
1547 IPW_ORD_STAT_TX_NON_DIR_DATA_B_11,
1548 /* Hole */
1549
1550
1551
1552
1553
1554
1555
1556 IPW_ORD_STAT_TX_NON_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 44,
1557 IPW_ORD_STAT_TX_NON_DIR_DATA_G_2,
1558 IPW_ORD_STAT_TX_NON_DIR_DATA_G_5_5,
1559 IPW_ORD_STAT_TX_NON_DIR_DATA_G_6,
1560 IPW_ORD_STAT_TX_NON_DIR_DATA_G_9,
1561 IPW_ORD_STAT_TX_NON_DIR_DATA_G_11,
1562 IPW_ORD_STAT_TX_NON_DIR_DATA_G_12,
1563 IPW_ORD_STAT_TX_NON_DIR_DATA_G_18,
1564 IPW_ORD_STAT_TX_NON_DIR_DATA_G_24,
1565 IPW_ORD_STAT_TX_NON_DIR_DATA_G_36,
1566 IPW_ORD_STAT_TX_NON_DIR_DATA_G_48,
1567 IPW_ORD_STAT_TX_NON_DIR_DATA_G_54,
1568 IPW_ORD_STAT_TX_RETRY,
1569 IPW_ORD_STAT_TX_FAILURE,
1570 IPW_ORD_STAT_RX_ERR_CRC,
1571 IPW_ORD_STAT_RX_ERR_ICV,
1572 IPW_ORD_STAT_RX_NO_BUFFER,
1573 IPW_ORD_STAT_FULL_SCANS,
1574 IPW_ORD_STAT_PARTIAL_SCANS,
1575 IPW_ORD_STAT_TGH_ABORTED_SCANS,
1576 IPW_ORD_STAT_TX_TOTAL_BYTES,
1577 IPW_ORD_STAT_CURR_RSSI_RAW,
1578 IPW_ORD_STAT_RX_BEACON,
1579 IPW_ORD_STAT_MISSED_BEACONS,
1580 IPW_ORD_TABLE_0_LAST
1581};
1582
1583#define IPW_RSSI_TO_DBM 112
1584
1585/* Table 1 Entries
1586 */
1587enum {
1588 IPW_ORD_TABLE_1_LAST = IPW_ORD_TABLE_1_MASK | 1,
1589};
1590
1591/*
1592 * Table 2 Entries
1593 *
1594 * FW_VERSION: 16 byte string
1595 * FW_DATE: 16 byte string (only 14 bytes used)
1596 * UCODE_VERSION: 4 byte version code
1597 * UCODE_DATE: 5 bytes code code
1598 * ADDAPTER_MAC: 6 byte MAC address
1599 * RTC: 4 byte clock
1600 */
1601enum {
1602 IPW_ORD_STAT_FW_VERSION = IPW_ORD_TABLE_2_MASK | 1,
1603 IPW_ORD_STAT_FW_DATE,
1604 IPW_ORD_STAT_UCODE_VERSION,
1605 IPW_ORD_STAT_UCODE_DATE,
1606 IPW_ORD_STAT_ADAPTER_MAC,
1607 IPW_ORD_STAT_RTC,
1608 IPW_ORD_TABLE_2_LAST
1609};
1610
1611/* Table 3 */
1612enum {
1613 IPW_ORD_STAT_TX_PACKET = IPW_ORD_TABLE_3_MASK | 0,
1614 IPW_ORD_STAT_TX_PACKET_FAILURE,
1615 IPW_ORD_STAT_TX_PACKET_SUCCESS,
1616 IPW_ORD_STAT_TX_PACKET_ABORTED,
1617 IPW_ORD_TABLE_3_LAST
1618};
1619
1620/* Table 4 */
1621enum {
1622 IPW_ORD_TABLE_4_LAST = IPW_ORD_TABLE_4_MASK
1623};
1624
1625/* Table 5 */
1626enum {
1627 IPW_ORD_STAT_AVAILABLE_AP_COUNT = IPW_ORD_TABLE_5_MASK,
1628 IPW_ORD_STAT_AP_ASSNS,
1629 IPW_ORD_STAT_ROAM,
1630 IPW_ORD_STAT_ROAM_CAUSE_MISSED_BEACONS,
1631 IPW_ORD_STAT_ROAM_CAUSE_UNASSOC,
1632 IPW_ORD_STAT_ROAM_CAUSE_RSSI,
1633 IPW_ORD_STAT_ROAM_CAUSE_LINK_QUALITY,
1634 IPW_ORD_STAT_ROAM_CAUSE_AP_LOAD_BALANCE,
1635 IPW_ORD_STAT_ROAM_CAUSE_AP_NO_TX,
1636 IPW_ORD_STAT_LINK_UP,
1637 IPW_ORD_STAT_LINK_DOWN,
1638 IPW_ORD_ANTENNA_DIVERSITY,
1639 IPW_ORD_CURR_FREQ,
1640 IPW_ORD_TABLE_5_LAST
1641};
1642
1643/* Table 6 */
1644enum {
1645 IPW_ORD_COUNTRY_CODE = IPW_ORD_TABLE_6_MASK,
1646 IPW_ORD_CURR_BSSID,
1647 IPW_ORD_CURR_SSID,
1648 IPW_ORD_TABLE_6_LAST
1649};
1650
1651/* Table 7 */
1652enum {
1653 IPW_ORD_STAT_PERCENT_MISSED_BEACONS = IPW_ORD_TABLE_7_MASK,
1654 IPW_ORD_STAT_PERCENT_TX_RETRIES,
1655 IPW_ORD_STAT_PERCENT_LINK_QUALITY,
1656 IPW_ORD_STAT_CURR_RSSI_DBM,
1657 IPW_ORD_TABLE_7_LAST
1658};
1659
1660#define IPW_ORDINALS_TABLE_LOWER (CX2_SHARED_LOWER_BOUND + 0x500)
1661#define IPW_ORDINALS_TABLE_0 (CX2_SHARED_LOWER_BOUND + 0x180)
1662#define IPW_ORDINALS_TABLE_1 (CX2_SHARED_LOWER_BOUND + 0x184)
1663#define IPW_ORDINALS_TABLE_2 (CX2_SHARED_LOWER_BOUND + 0x188)
1664#define IPW_MEM_FIXED_OVERRIDE (CX2_SHARED_LOWER_BOUND + 0x41C)
1665
1666struct ipw_fixed_rate {
1667 u16 tx_rates;
1668 u16 reserved;
1669} __attribute__ ((packed));
1670
1671#define CX2_INDIRECT_ADDR_MASK (~0x3ul)
1672
1673struct host_cmd {
1674 u8 cmd;
1675 u8 len;
1676 u16 reserved;
1677 u32 param[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH];
1678} __attribute__ ((packed));
1679
1680#define CFG_BT_COEXISTENCE_MIN 0x00
1681#define CFG_BT_COEXISTENCE_DEFER 0x02
1682#define CFG_BT_COEXISTENCE_KILL 0x04
1683#define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08
1684#define CFG_BT_COEXISTENCE_OOB 0x10
1685#define CFG_BT_COEXISTENCE_MAX 0xFF
1686#define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM*/
1687
1688#define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x0
1689#define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x1
1690#define CFG_CTS_TO_ITSELF_ENABLED_DEF CFG_CTS_TO_ITSELF_ENABLED_MIN
1691
1692#define CFG_SYS_ANTENNA_BOTH 0x000
1693#define CFG_SYS_ANTENNA_A 0x001
1694#define CFG_SYS_ANTENNA_B 0x003
1695
1696/*
1697 * The definitions below were lifted off the ipw2100 driver, which only
1698 * supports 'b' mode, so I'm sure these are not exactly correct.
1699 *
1700 * Somebody fix these!!
1701 */
1702#define REG_MIN_CHANNEL 0
1703#define REG_MAX_CHANNEL 14
1704
1705#define REG_CHANNEL_MASK 0x00003FFF
1706#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
1707
1708static const long ipw_frequencies[] = {
1709 2412, 2417, 2422, 2427,
1710 2432, 2437, 2442, 2447,
1711 2452, 2457, 2462, 2467,
1712 2472, 2484
1713};
1714
1715#define FREQ_COUNT ARRAY_SIZE(ipw_frequencies)
1716
1717#define IPW_MAX_CONFIG_RETRIES 10
1718
1719static inline u32 frame_hdr_len(struct ieee80211_hdr *hdr)
1720{
1721 u32 retval;
1722 u16 fc;
1723
1724 retval = sizeof(struct ieee80211_hdr);
1725 fc = le16_to_cpu(hdr->frame_ctl);
1726
1727 /*
1728 * Function ToDS FromDS
1729 * IBSS 0 0
1730 * To AP 1 0
1731 * From AP 0 1
1732 * WDS (bridge) 1 1
1733 *
1734 * Only WDS frames use Address4 among them. --YZ
1735 */
1736 if (!(fc & IEEE80211_FCTL_TODS) || !(fc & IEEE80211_FCTL_FROMDS))
1737 retval -= ETH_ALEN;
1738
1739 return retval;
1740}
1741
1742#endif /* __ipw2200_h__ */
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c
index 9c2d07cde010..d7947358e49d 100644
--- a/drivers/net/wireless/orinoco.c
+++ b/drivers/net/wireless/orinoco.c
@@ -94,6 +94,8 @@
94#include <net/iw_handler.h> 94#include <net/iw_handler.h>
95#include <net/ieee80211.h> 95#include <net/ieee80211.h>
96 96
97#include <net/ieee80211.h>
98
97#include <asm/uaccess.h> 99#include <asm/uaccess.h>
98#include <asm/io.h> 100#include <asm/io.h>
99#include <asm/system.h> 101#include <asm/system.h>
@@ -101,7 +103,6 @@
101#include "hermes.h" 103#include "hermes.h"
102#include "hermes_rid.h" 104#include "hermes_rid.h"
103#include "orinoco.h" 105#include "orinoco.h"
104#include "ieee802_11.h"
105 106
106/********************************************************************/ 107/********************************************************************/
107/* Module information */ 108/* Module information */
@@ -150,7 +151,7 @@ static const u8 encaps_hdr[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
150#define ENCAPS_OVERHEAD (sizeof(encaps_hdr) + 2) 151#define ENCAPS_OVERHEAD (sizeof(encaps_hdr) + 2)
151 152
152#define ORINOCO_MIN_MTU 256 153#define ORINOCO_MIN_MTU 256
153#define ORINOCO_MAX_MTU (IEEE802_11_DATA_LEN - ENCAPS_OVERHEAD) 154#define ORINOCO_MAX_MTU (IEEE80211_DATA_LEN - ENCAPS_OVERHEAD)
154 155
155#define SYMBOL_MAX_VER_LEN (14) 156#define SYMBOL_MAX_VER_LEN (14)
156#define USER_BAP 0 157#define USER_BAP 0
@@ -442,7 +443,7 @@ static int orinoco_change_mtu(struct net_device *dev, int new_mtu)
442 if ( (new_mtu < ORINOCO_MIN_MTU) || (new_mtu > ORINOCO_MAX_MTU) ) 443 if ( (new_mtu < ORINOCO_MIN_MTU) || (new_mtu > ORINOCO_MAX_MTU) )
443 return -EINVAL; 444 return -EINVAL;
444 445
445 if ( (new_mtu + ENCAPS_OVERHEAD + IEEE802_11_HLEN) > 446 if ( (new_mtu + ENCAPS_OVERHEAD + IEEE80211_HLEN) >
446 (priv->nicbuf_size - ETH_HLEN) ) 447 (priv->nicbuf_size - ETH_HLEN) )
447 return -EINVAL; 448 return -EINVAL;
448 449
@@ -918,7 +919,7 @@ static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw)
918 data. */ 919 data. */
919 return; 920 return;
920 } 921 }
921 if (length > IEEE802_11_DATA_LEN) { 922 if (length > IEEE80211_DATA_LEN) {
922 printk(KERN_WARNING "%s: Oversized frame received (%d bytes)\n", 923 printk(KERN_WARNING "%s: Oversized frame received (%d bytes)\n",
923 dev->name, length); 924 dev->name, length);
924 stats->rx_length_errors++; 925 stats->rx_length_errors++;
@@ -2272,7 +2273,7 @@ static int orinoco_init(struct net_device *dev)
2272 2273
2273 /* No need to lock, the hw_unavailable flag is already set in 2274 /* No need to lock, the hw_unavailable flag is already set in
2274 * alloc_orinocodev() */ 2275 * alloc_orinocodev() */
2275 priv->nicbuf_size = IEEE802_11_FRAME_LEN + ETH_HLEN; 2276 priv->nicbuf_size = IEEE80211_FRAME_LEN + ETH_HLEN;
2276 2277
2277 /* Initialize the firmware */ 2278 /* Initialize the firmware */
2278 err = orinoco_reinit_firmware(dev); 2279 err = orinoco_reinit_firmware(dev);
diff --git a/drivers/net/wireless/orinoco_pci.c b/drivers/net/wireless/orinoco_pci.c
index 7a6f52ea7faa..42e03438291b 100644
--- a/drivers/net/wireless/orinoco_pci.c
+++ b/drivers/net/wireless/orinoco_pci.c
@@ -301,8 +301,6 @@ static int orinoco_pci_suspend(struct pci_dev *pdev, pm_message_t state)
301 unsigned long flags; 301 unsigned long flags;
302 int err; 302 int err;
303 303
304 printk(KERN_DEBUG "%s: Orinoco-PCI entering sleep mode (state=%d)\n",
305 dev->name, state);
306 304
307 err = orinoco_lock(priv, &flags); 305 err = orinoco_lock(priv, &flags);
308 if (err) { 306 if (err) {
diff --git a/drivers/net/wireless/prism54/islpci_hotplug.c b/drivers/net/wireless/prism54/islpci_hotplug.c
index c17391d947f3..dc040caab7d7 100644
--- a/drivers/net/wireless/prism54/islpci_hotplug.c
+++ b/drivers/net/wireless/prism54/islpci_hotplug.c
@@ -267,8 +267,6 @@ prism54_suspend(struct pci_dev *pdev, pm_message_t state)
267 islpci_private *priv = ndev ? netdev_priv(ndev) : NULL; 267 islpci_private *priv = ndev ? netdev_priv(ndev) : NULL;
268 BUG_ON(!priv); 268 BUG_ON(!priv);
269 269
270 printk(KERN_NOTICE "%s: got suspend request (state %d)\n",
271 ndev->name, state);
272 270
273 pci_save_state(pdev); 271 pci_save_state(pdev);
274 272
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c
index 6c42b573a95a..4b0acae22b0d 100644
--- a/drivers/net/wireless/strip.c
+++ b/drivers/net/wireless/strip.c
@@ -209,7 +209,7 @@ enum {
209 NoStructure = 0, /* Really old firmware */ 209 NoStructure = 0, /* Really old firmware */
210 StructuredMessages = 1, /* Parsable AT response msgs */ 210 StructuredMessages = 1, /* Parsable AT response msgs */
211 ChecksummedMessages = 2 /* Parsable AT response msgs with checksums */ 211 ChecksummedMessages = 2 /* Parsable AT response msgs with checksums */
212} FirmwareLevel; 212};
213 213
214struct strip { 214struct strip {
215 int magic; 215 int magic;
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
index f6130a53b796..183c4732ef65 100644
--- a/drivers/net/wireless/wavelan_cs.c
+++ b/drivers/net/wireless/wavelan_cs.c
@@ -59,6 +59,12 @@
59/* Do *NOT* add other headers here, you are guaranteed to be wrong - Jean II */ 59/* Do *NOT* add other headers here, you are guaranteed to be wrong - Jean II */
60#include "wavelan_cs.p.h" /* Private header */ 60#include "wavelan_cs.p.h" /* Private header */
61 61
62#ifdef WAVELAN_ROAMING
63static void wl_cell_expiry(unsigned long data);
64static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp);
65static void wv_nwid_filter(unsigned char mode, net_local *lp);
66#endif /* WAVELAN_ROAMING */
67
62/************************* MISC SUBROUTINES **************************/ 68/************************* MISC SUBROUTINES **************************/
63/* 69/*
64 * Subroutines which won't fit in one of the following category 70 * Subroutines which won't fit in one of the following category
@@ -500,9 +506,9 @@ fee_write(u_long base, /* i/o port of the card */
500 506
501#ifdef WAVELAN_ROAMING /* Conditional compile, see wavelan_cs.h */ 507#ifdef WAVELAN_ROAMING /* Conditional compile, see wavelan_cs.h */
502 508
503unsigned char WAVELAN_BEACON_ADDRESS[]= {0x09,0x00,0x0e,0x20,0x03,0x00}; 509static unsigned char WAVELAN_BEACON_ADDRESS[] = {0x09,0x00,0x0e,0x20,0x03,0x00};
504 510
505void wv_roam_init(struct net_device *dev) 511static void wv_roam_init(struct net_device *dev)
506{ 512{
507 net_local *lp= netdev_priv(dev); 513 net_local *lp= netdev_priv(dev);
508 514
@@ -531,7 +537,7 @@ void wv_roam_init(struct net_device *dev)
531 printk(KERN_DEBUG "WaveLAN: Roaming enabled on device %s\n",dev->name); 537 printk(KERN_DEBUG "WaveLAN: Roaming enabled on device %s\n",dev->name);
532} 538}
533 539
534void wv_roam_cleanup(struct net_device *dev) 540static void wv_roam_cleanup(struct net_device *dev)
535{ 541{
536 wavepoint_history *ptr,*old_ptr; 542 wavepoint_history *ptr,*old_ptr;
537 net_local *lp= netdev_priv(dev); 543 net_local *lp= netdev_priv(dev);
@@ -550,7 +556,7 @@ void wv_roam_cleanup(struct net_device *dev)
550} 556}
551 557
552/* Enable/Disable NWID promiscuous mode on a given device */ 558/* Enable/Disable NWID promiscuous mode on a given device */
553void wv_nwid_filter(unsigned char mode, net_local *lp) 559static void wv_nwid_filter(unsigned char mode, net_local *lp)
554{ 560{
555 mm_t m; 561 mm_t m;
556 unsigned long flags; 562 unsigned long flags;
@@ -575,7 +581,7 @@ void wv_nwid_filter(unsigned char mode, net_local *lp)
575} 581}
576 582
577/* Find a record in the WavePoint table matching a given NWID */ 583/* Find a record in the WavePoint table matching a given NWID */
578wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp) 584static wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp)
579{ 585{
580 wavepoint_history *ptr=lp->wavepoint_table.head; 586 wavepoint_history *ptr=lp->wavepoint_table.head;
581 587
@@ -588,7 +594,7 @@ wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp)
588} 594}
589 595
590/* Create a new wavepoint table entry */ 596/* Create a new wavepoint table entry */
591wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_local* lp) 597static wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_local* lp)
592{ 598{
593 wavepoint_history *new_wavepoint; 599 wavepoint_history *new_wavepoint;
594 600
@@ -624,7 +630,7 @@ wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_
624} 630}
625 631
626/* Remove a wavepoint entry from WavePoint table */ 632/* Remove a wavepoint entry from WavePoint table */
627void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp) 633static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp)
628{ 634{
629 if(wavepoint==NULL) 635 if(wavepoint==NULL)
630 return; 636 return;
@@ -646,7 +652,7 @@ void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp)
646} 652}
647 653
648/* Timer callback function - checks WavePoint table for stale entries */ 654/* Timer callback function - checks WavePoint table for stale entries */
649void wl_cell_expiry(unsigned long data) 655static void wl_cell_expiry(unsigned long data)
650{ 656{
651 net_local *lp=(net_local *)data; 657 net_local *lp=(net_local *)data;
652 wavepoint_history *wavepoint=lp->wavepoint_table.head,*old_point; 658 wavepoint_history *wavepoint=lp->wavepoint_table.head,*old_point;
@@ -686,7 +692,7 @@ void wl_cell_expiry(unsigned long data)
686} 692}
687 693
688/* Update SNR history of a wavepoint */ 694/* Update SNR history of a wavepoint */
689void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsigned char seq) 695static void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsigned char seq)
690{ 696{
691 int i=0,num_missed=0,ptr=0; 697 int i=0,num_missed=0,ptr=0;
692 int average_fast=0,average_slow=0; 698 int average_fast=0,average_slow=0;
@@ -723,7 +729,7 @@ void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsi
723} 729}
724 730
725/* Perform a handover to a new WavePoint */ 731/* Perform a handover to a new WavePoint */
726void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp) 732static void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp)
727{ 733{
728 kio_addr_t base = lp->dev->base_addr; 734 kio_addr_t base = lp->dev->base_addr;
729 mm_t m; 735 mm_t m;
diff --git a/drivers/net/wireless/wavelan_cs.h b/drivers/net/wireless/wavelan_cs.h
index 29cff6daf860..fabc63ee153c 100644
--- a/drivers/net/wireless/wavelan_cs.h
+++ b/drivers/net/wireless/wavelan_cs.h
@@ -62,7 +62,7 @@
62 * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this 62 * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this
63 * part to accommodate your hardware... 63 * part to accommodate your hardware...
64 */ 64 */
65const unsigned char MAC_ADDRESSES[][3] = 65static const unsigned char MAC_ADDRESSES[][3] =
66{ 66{
67 { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */ 67 { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */
68 { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */ 68 { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */
@@ -79,14 +79,14 @@ const unsigned char MAC_ADDRESSES[][3] =
79 * (as read in the offset register of the dac area). 79 * (as read in the offset register of the dac area).
80 * Used to map channel numbers used by `wfreqsel' to frequencies 80 * Used to map channel numbers used by `wfreqsel' to frequencies
81 */ 81 */
82const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8, 82static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
83 0xD0, 0xF0, 0xF8, 0x150 }; 83 0xD0, 0xF0, 0xF8, 0x150 };
84 84
85/* Frequencies of the 1.0 modem (fixed frequencies). 85/* Frequencies of the 1.0 modem (fixed frequencies).
86 * Use to map the PSA `subband' to a frequency 86 * Use to map the PSA `subband' to a frequency
87 * Note : all frequencies apart from the first one need to be multiplied by 10 87 * Note : all frequencies apart from the first one need to be multiplied by 10
88 */ 88 */
89const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 }; 89static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
90 90
91 91
92/*************************** PC INTERFACE ****************************/ 92/*************************** PC INTERFACE ****************************/
diff --git a/drivers/net/wireless/wavelan_cs.p.h b/drivers/net/wireless/wavelan_cs.p.h
index 677ff71883cb..01d882be8790 100644
--- a/drivers/net/wireless/wavelan_cs.p.h
+++ b/drivers/net/wireless/wavelan_cs.p.h
@@ -647,23 +647,6 @@ struct net_local
647 void __iomem *mem; 647 void __iomem *mem;
648}; 648};
649 649
650/**************************** PROTOTYPES ****************************/
651
652#ifdef WAVELAN_ROAMING
653/* ---------------------- ROAMING SUBROUTINES -----------------------*/
654
655wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp);
656wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_local *lp);
657void wl_del_wavepoint(wavepoint_history *wavepoint, net_local *lp);
658void wl_cell_expiry(unsigned long data);
659wavepoint_history *wl_best_sigqual(int fast_search, net_local *lp);
660void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsigned char seq);
661void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp);
662void wv_nwid_filter(unsigned char mode, net_local *lp);
663void wv_roam_init(struct net_device *dev);
664void wv_roam_cleanup(struct net_device *dev);
665#endif /* WAVELAN_ROAMING */
666
667/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */ 650/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
668static inline u_char /* data */ 651static inline u_char /* data */
669 hasr_read(u_long); /* Read the host interface : base address */ 652 hasr_read(u_long); /* Read the host interface : base address */
diff --git a/drivers/net/wireless/wl3501.h b/drivers/net/wireless/wl3501.h
index 8636d9306785..b5719437e981 100644
--- a/drivers/net/wireless/wl3501.h
+++ b/drivers/net/wireless/wl3501.h
@@ -2,7 +2,7 @@
2#define __WL3501_H__ 2#define __WL3501_H__
3 3
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5#include "ieee802_11.h" 5#include <net/ieee80211.h>
6 6
7/* define for WLA 2.0 */ 7/* define for WLA 2.0 */
8#define WL3501_BLKSZ 256 8#define WL3501_BLKSZ 256
@@ -548,7 +548,7 @@ struct wl3501_80211_tx_plcp_hdr {
548 548
549struct wl3501_80211_tx_hdr { 549struct wl3501_80211_tx_hdr {
550 struct wl3501_80211_tx_plcp_hdr pclp_hdr; 550 struct wl3501_80211_tx_plcp_hdr pclp_hdr;
551 struct ieee802_11_hdr mac_hdr; 551 struct ieee80211_hdr mac_hdr;
552} __attribute__ ((packed)); 552} __attribute__ ((packed));
553 553
554/* 554/*
diff --git a/drivers/net/wireless/wl3501_cs.c b/drivers/net/wireless/wl3501_cs.c
index dd902126d018..7cc5edbf6ede 100644
--- a/drivers/net/wireless/wl3501_cs.c
+++ b/drivers/net/wireless/wl3501_cs.c
@@ -296,7 +296,8 @@ static int wl3501_get_flash_mac_addr(struct wl3501_card *this)
296 * 296 *
297 * Move 'size' bytes from PC to card. (Shouldn't be interrupted) 297 * Move 'size' bytes from PC to card. (Shouldn't be interrupted)
298 */ 298 */
299void wl3501_set_to_wla(struct wl3501_card *this, u16 dest, void *src, int size) 299static void wl3501_set_to_wla(struct wl3501_card *this, u16 dest, void *src,
300 int size)
300{ 301{
301 /* switch to SRAM Page 0 */ 302 /* switch to SRAM Page 0 */
302 wl3501_switch_page(this, (dest & 0x8000) ? WL3501_BSS_SPAGE1 : 303 wl3501_switch_page(this, (dest & 0x8000) ? WL3501_BSS_SPAGE1 :
@@ -317,8 +318,8 @@ void wl3501_set_to_wla(struct wl3501_card *this, u16 dest, void *src, int size)
317 * 318 *
318 * Move 'size' bytes from card to PC. (Shouldn't be interrupted) 319 * Move 'size' bytes from card to PC. (Shouldn't be interrupted)
319 */ 320 */
320void wl3501_get_from_wla(struct wl3501_card *this, u16 src, void *dest, 321static void wl3501_get_from_wla(struct wl3501_card *this, u16 src, void *dest,
321 int size) 322 int size)
322{ 323{
323 /* switch to SRAM Page 0 */ 324 /* switch to SRAM Page 0 */
324 wl3501_switch_page(this, (src & 0x8000) ? WL3501_BSS_SPAGE1 : 325 wl3501_switch_page(this, (src & 0x8000) ? WL3501_BSS_SPAGE1 :
@@ -1438,14 +1439,14 @@ fail:
1438 goto out; 1439 goto out;
1439} 1440}
1440 1441
1441struct net_device_stats *wl3501_get_stats(struct net_device *dev) 1442static struct net_device_stats *wl3501_get_stats(struct net_device *dev)
1442{ 1443{
1443 struct wl3501_card *this = dev->priv; 1444 struct wl3501_card *this = dev->priv;
1444 1445
1445 return &this->stats; 1446 return &this->stats;
1446} 1447}
1447 1448
1448struct iw_statistics *wl3501_get_wireless_stats(struct net_device *dev) 1449static struct iw_statistics *wl3501_get_wireless_stats(struct net_device *dev)
1449{ 1450{
1450 struct wl3501_card *this = dev->priv; 1451 struct wl3501_card *this = dev->priv;
1451 struct iw_statistics *wstats = &this->wstats; 1452 struct iw_statistics *wstats = &this->wstats;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1b34fc56067e..c62d2f043397 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -333,13 +333,17 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
333 if (platform_pci_choose_state) { 333 if (platform_pci_choose_state) {
334 ret = platform_pci_choose_state(dev, state); 334 ret = platform_pci_choose_state(dev, state);
335 if (ret >= 0) 335 if (ret >= 0)
336 state = ret; 336 state.event = ret;
337 } 337 }
338 switch (state) { 338
339 case 0: return PCI_D0; 339 switch (state.event) {
340 case 3: return PCI_D3hot; 340 case PM_EVENT_ON:
341 return PCI_D0;
342 case PM_EVENT_FREEZE:
343 case PM_EVENT_SUSPEND:
344 return PCI_D3hot;
341 default: 345 default:
342 printk("They asked me for state %d\n", state); 346 printk("They asked me for state %d\n", state.event);
343 BUG(); 347 BUG();
344 } 348 }
345 return PCI_D0; 349 return PCI_D0;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index bb36bb69803f..140354a2aa72 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -422,6 +422,25 @@ static void __devinit quirk_via_ioapic(struct pci_dev *dev)
422DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic ); 422DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic );
423 423
424/* 424/*
425 * VIA 8237: Some BIOSs don't set the 'Bypass APIC De-Assert Message' Bit.
426 * This leads to doubled level interrupt rates.
427 * Set this bit to get rid of cycle wastage.
428 * Otherwise uncritical.
429 */
430static void __devinit quirk_via_vt8237_bypass_apic_deassert(struct pci_dev *dev)
431{
432 u8 misc_control2;
433#define BYPASS_APIC_DEASSERT 8
434
435 pci_read_config_byte(dev, 0x5B, &misc_control2);
436 if (!(misc_control2 & BYPASS_APIC_DEASSERT)) {
437 printk(KERN_INFO "PCI: Bypassing VIA 8237 APIC De-Assert Message\n");
438 pci_write_config_byte(dev, 0x5B, misc_control2|BYPASS_APIC_DEASSERT);
439 }
440}
441DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_vt8237_bypass_apic_deassert);
442
443/*
425 * The AMD io apic can hang the box when an apic irq is masked. 444 * The AMD io apic can hang the box when an apic irq is masked.
426 * We check all revs >= B0 (yet not in the pre production!) as the bug 445 * We check all revs >= B0 (yet not in the pre production!) as the bug
427 * is currently marked NoFix 446 * is currently marked NoFix
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index 713c78f3a65d..49bd21702314 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -21,13 +21,21 @@
21 * between the ROM and other resources, so enabling it may disable access 21 * between the ROM and other resources, so enabling it may disable access
22 * to MMIO registers or other card memory. 22 * to MMIO registers or other card memory.
23 */ 23 */
24static void pci_enable_rom(struct pci_dev *pdev) 24static int pci_enable_rom(struct pci_dev *pdev)
25{ 25{
26 struct resource *res = pdev->resource + PCI_ROM_RESOURCE;
27 struct pci_bus_region region;
26 u32 rom_addr; 28 u32 rom_addr;
27 29
30 if (!res->flags)
31 return -1;
32
33 pcibios_resource_to_bus(pdev, &region, res);
28 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); 34 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
29 rom_addr |= PCI_ROM_ADDRESS_ENABLE; 35 rom_addr &= ~PCI_ROM_ADDRESS_MASK;
36 rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
30 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); 37 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
38 return 0;
31} 39}
32 40
33/** 41/**
@@ -71,19 +79,21 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
71 } else { 79 } else {
72 if (res->flags & IORESOURCE_ROM_COPY) { 80 if (res->flags & IORESOURCE_ROM_COPY) {
73 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 81 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
74 return (void __iomem *)pci_resource_start(pdev, PCI_ROM_RESOURCE); 82 return (void __iomem *)pci_resource_start(pdev,
83 PCI_ROM_RESOURCE);
75 } else { 84 } else {
76 /* assign the ROM an address if it doesn't have one */ 85 /* assign the ROM an address if it doesn't have one */
77 if (res->parent == NULL) 86 if (res->parent == NULL &&
78 pci_assign_resource(pdev, PCI_ROM_RESOURCE); 87 pci_assign_resource(pdev,PCI_ROM_RESOURCE))
79 88 return NULL;
80 start = pci_resource_start(pdev, PCI_ROM_RESOURCE); 89 start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
81 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 90 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
82 if (*size == 0) 91 if (*size == 0)
83 return NULL; 92 return NULL;
84 93
85 /* Enable ROM space decodes */ 94 /* Enable ROM space decodes */
86 pci_enable_rom(pdev); 95 if (pci_enable_rom(pdev))
96 return NULL;
87 } 97 }
88 } 98 }
89 99
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 3e23cd461fb1..325c992f7d8f 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -246,7 +246,7 @@ static void __exit pxa2xx_pcmcia_exit(void)
246 driver_unregister(&pxa2xx_pcmcia_driver); 246 driver_unregister(&pxa2xx_pcmcia_driver);
247} 247}
248 248
249module_init(pxa2xx_pcmcia_init); 249fs_initcall(pxa2xx_pcmcia_init);
250module_exit(pxa2xx_pcmcia_exit); 250module_exit(pxa2xx_pcmcia_exit);
251 251
252MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>"); 252MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c
index 5309734e1687..bbe69b07ce50 100644
--- a/drivers/pcmcia/pxa2xx_mainstone.c
+++ b/drivers/pcmcia/pxa2xx_mainstone.c
@@ -196,7 +196,7 @@ static void __exit mst_pcmcia_exit(void)
196 platform_device_unregister(mst_pcmcia_device); 196 platform_device_unregister(mst_pcmcia_device);
197} 197}
198 198
199module_init(mst_pcmcia_init); 199fs_initcall(mst_pcmcia_init);
200module_exit(mst_pcmcia_exit); 200module_exit(mst_pcmcia_exit);
201 201
202MODULE_LICENSE("GPL"); 202MODULE_LICENSE("GPL");
diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c
index 42efe218867a..7bac2f7d8b3f 100644
--- a/drivers/pcmcia/pxa2xx_sharpsl.c
+++ b/drivers/pcmcia/pxa2xx_sharpsl.c
@@ -257,7 +257,7 @@ static void __exit sharpsl_pcmcia_exit(void)
257 platform_device_unregister(sharpsl_pcmcia_device); 257 platform_device_unregister(sharpsl_pcmcia_device);
258} 258}
259 259
260module_init(sharpsl_pcmcia_init); 260fs_initcall(sharpsl_pcmcia_init);
261module_exit(sharpsl_pcmcia_exit); 261module_exit(sharpsl_pcmcia_exit);
262 262
263MODULE_DESCRIPTION("Sharp SL Series PCMCIA Support"); 263MODULE_DESCRIPTION("Sharp SL Series PCMCIA Support");
diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c
index e98bb3d80e7c..d4ed508b38be 100644
--- a/drivers/pcmcia/sa1100_generic.c
+++ b/drivers/pcmcia/sa1100_generic.c
@@ -126,5 +126,5 @@ MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>");
126MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11x0 Socket Controller"); 126MODULE_DESCRIPTION("Linux PCMCIA Card Services: SA-11x0 Socket Controller");
127MODULE_LICENSE("Dual MPL/GPL"); 127MODULE_LICENSE("Dual MPL/GPL");
128 128
129module_init(sa11x0_pcmcia_init); 129fs_initcall(sa11x0_pcmcia_init);
130module_exit(sa11x0_pcmcia_exit); 130module_exit(sa11x0_pcmcia_exit);
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index b441f43a6a55..bb90a1448a53 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -189,7 +189,7 @@ static void __exit sa1111_drv_pcmcia_exit(void)
189 sa1111_driver_unregister(&pcmcia_driver); 189 sa1111_driver_unregister(&pcmcia_driver);
190} 190}
191 191
192module_init(sa1111_drv_pcmcia_init); 192fs_initcall(sa1111_drv_pcmcia_init);
193module_exit(sa1111_drv_pcmcia_exit); 193module_exit(sa1111_drv_pcmcia_exit);
194 194
195MODULE_DESCRIPTION("SA1111 PCMCIA card socket driver"); 195MODULE_DESCRIPTION("SA1111 PCMCIA card socket driver");
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index db04ffb6f68c..59c5d968e9f6 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -189,7 +189,7 @@ static int __init sa11xx_pcmcia_init(void)
189{ 189{
190 return 0; 190 return 0;
191} 191}
192module_init(sa11xx_pcmcia_init); 192fs_initcall(sa11xx_pcmcia_init);
193 193
194static void __exit sa11xx_pcmcia_exit(void) {} 194static void __exit sa11xx_pcmcia_exit(void) {}
195 195
diff --git a/drivers/s390/block/Kconfig b/drivers/s390/block/Kconfig
index dc1c89dbdb8f..6e7d7b06421d 100644
--- a/drivers/s390/block/Kconfig
+++ b/drivers/s390/block/Kconfig
@@ -49,7 +49,7 @@ config DASD_FBA
49 49
50config DASD_DIAG 50config DASD_DIAG
51 tristate "Support for DIAG access to Disks" 51 tristate "Support for DIAG access to Disks"
52 depends on DASD && ARCH_S390X = 'n' 52 depends on DASD && ( ARCH_S390X = 'n' || EXPERIMENTAL)
53 help 53 help
54 Select this option if you want to use Diagnose250 command to access 54 Select this option if you want to use Diagnose250 command to access
55 Disks under VM. If you are not running under VM or unsure what it is, 55 Disks under VM. If you are not running under VM or unsure what it is,
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index d5f53980749b..8fc891a9d47f 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -7,7 +7,7 @@
7 * Bugreports.to..: <Linux390@de.ibm.com> 7 * Bugreports.to..: <Linux390@de.ibm.com>
8 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999-2001 8 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999-2001
9 * 9 *
10 * $Revision: 1.165 $ 10 * $Revision: 1.167 $
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
@@ -1131,17 +1131,13 @@ __dasd_process_blk_queue(struct dasd_device * device)
1131 request_queue_t *queue; 1131 request_queue_t *queue;
1132 struct request *req; 1132 struct request *req;
1133 struct dasd_ccw_req *cqr; 1133 struct dasd_ccw_req *cqr;
1134 int nr_queued, feature_ro; 1134 int nr_queued;
1135 1135
1136 queue = device->request_queue; 1136 queue = device->request_queue;
1137 /* No queue ? Then there is nothing to do. */ 1137 /* No queue ? Then there is nothing to do. */
1138 if (queue == NULL) 1138 if (queue == NULL)
1139 return; 1139 return;
1140 1140
1141 feature_ro = dasd_get_feature(device->cdev, DASD_FEATURE_READONLY);
1142 if (feature_ro < 0) /* no devmap */
1143 return;
1144
1145 /* 1141 /*
1146 * We requeue request from the block device queue to the ccw 1142 * We requeue request from the block device queue to the ccw
1147 * queue only in two states. In state DASD_STATE_READY the 1143 * queue only in two states. In state DASD_STATE_READY the
@@ -1162,7 +1158,8 @@ __dasd_process_blk_queue(struct dasd_device * device)
1162 nr_queued < DASD_CHANQ_MAX_SIZE) { 1158 nr_queued < DASD_CHANQ_MAX_SIZE) {
1163 req = elv_next_request(queue); 1159 req = elv_next_request(queue);
1164 1160
1165 if (feature_ro && rq_data_dir(req) == WRITE) { 1161 if (device->features & DASD_FEATURE_READONLY &&
1162 rq_data_dir(req) == WRITE) {
1166 DBF_DEV_EVENT(DBF_ERR, device, 1163 DBF_DEV_EVENT(DBF_ERR, device,
1167 "Rejecting write request %p", 1164 "Rejecting write request %p",
1168 req); 1165 req);
@@ -1814,17 +1811,13 @@ dasd_generic_set_online (struct ccw_device *cdev,
1814 1811
1815{ 1812{
1816 struct dasd_device *device; 1813 struct dasd_device *device;
1817 int feature_diag, rc; 1814 int rc;
1818 1815
1819 device = dasd_create_device(cdev); 1816 device = dasd_create_device(cdev);
1820 if (IS_ERR(device)) 1817 if (IS_ERR(device))
1821 return PTR_ERR(device); 1818 return PTR_ERR(device);
1822 1819
1823 feature_diag = dasd_get_feature(cdev, DASD_FEATURE_USEDIAG); 1820 if (device->features & DASD_FEATURE_USEDIAG) {
1824 if (feature_diag < 0)
1825 return feature_diag;
1826
1827 if (feature_diag) {
1828 if (!dasd_diag_discipline_pointer) { 1821 if (!dasd_diag_discipline_pointer) {
1829 printk (KERN_WARNING 1822 printk (KERN_WARNING
1830 "dasd_generic couldn't online device %s " 1823 "dasd_generic couldn't online device %s "
diff --git a/drivers/s390/block/dasd_devmap.c b/drivers/s390/block/dasd_devmap.c
index d948566bb24a..bda896d9d788 100644
--- a/drivers/s390/block/dasd_devmap.c
+++ b/drivers/s390/block/dasd_devmap.c
@@ -11,7 +11,7 @@
11 * functions may not be called from interrupt context. In particular 11 * functions may not be called from interrupt context. In particular
12 * dasd_get_device is a no-no from interrupt context. 12 * dasd_get_device is a no-no from interrupt context.
13 * 13 *
14 * $Revision: 1.40 $ 14 * $Revision: 1.43 $
15 */ 15 */
16 16
17#include <linux/config.h> 17#include <linux/config.h>
@@ -513,6 +513,7 @@ dasd_create_device(struct ccw_device *cdev)
513 if (!devmap->device) { 513 if (!devmap->device) {
514 devmap->device = device; 514 devmap->device = device;
515 device->devindex = devmap->devindex; 515 device->devindex = devmap->devindex;
516 device->features = devmap->features;
516 get_device(&cdev->dev); 517 get_device(&cdev->dev);
517 device->cdev = cdev; 518 device->cdev = cdev;
518 rc = 0; 519 rc = 0;
@@ -643,6 +644,8 @@ dasd_ro_store(struct device *dev, struct device_attribute *attr, const char *buf
643 devmap->features |= DASD_FEATURE_READONLY; 644 devmap->features |= DASD_FEATURE_READONLY;
644 else 645 else
645 devmap->features &= ~DASD_FEATURE_READONLY; 646 devmap->features &= ~DASD_FEATURE_READONLY;
647 if (devmap->device)
648 devmap->device->features = devmap->features;
646 if (devmap->device && devmap->device->gdp) 649 if (devmap->device && devmap->device->gdp)
647 set_disk_ro(devmap->device->gdp, ro_flag); 650 set_disk_ro(devmap->device->gdp, ro_flag);
648 spin_unlock(&dasd_devmap_lock); 651 spin_unlock(&dasd_devmap_lock);
@@ -758,7 +761,8 @@ dasd_set_feature(struct ccw_device *cdev, int feature, int flag)
758 devmap->features |= feature; 761 devmap->features |= feature;
759 else 762 else
760 devmap->features &= ~feature; 763 devmap->features &= ~feature;
761 764 if (devmap->device)
765 devmap->device->features = devmap->features;
762 spin_unlock(&dasd_devmap_lock); 766 spin_unlock(&dasd_devmap_lock);
763 return 0; 767 return 0;
764} 768}
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c
index 127699830fa1..7478423b53bb 100644
--- a/drivers/s390/block/dasd_diag.c
+++ b/drivers/s390/block/dasd_diag.c
@@ -6,17 +6,18 @@
6 * Bugreports.to..: <Linux390@de.ibm.com> 6 * Bugreports.to..: <Linux390@de.ibm.com>
7 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 7 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
8 * 8 *
9 * $Revision: 1.42 $ 9 * $Revision: 1.49 $
10 */ 10 */
11 11
12#include <linux/config.h> 12#include <linux/config.h>
13#include <linux/stddef.h> 13#include <linux/stddef.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/hdreg.h> /* HDIO_GETGEO */ 16#include <linux/hdreg.h>
17#include <linux/bio.h> 17#include <linux/bio.h>
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/jiffies.h>
20 21
21#include <asm/dasd.h> 22#include <asm/dasd.h>
22#include <asm/debug.h> 23#include <asm/debug.h>
@@ -28,58 +29,89 @@
28#include "dasd_int.h" 29#include "dasd_int.h"
29#include "dasd_diag.h" 30#include "dasd_diag.h"
30 31
31#ifdef PRINTK_HEADER
32#undef PRINTK_HEADER
33#endif /* PRINTK_HEADER */
34#define PRINTK_HEADER "dasd(diag):" 32#define PRINTK_HEADER "dasd(diag):"
35 33
36MODULE_LICENSE("GPL"); 34MODULE_LICENSE("GPL");
37 35
36/* The maximum number of blocks per request (max_blocks) is dependent on the
37 * amount of storage that is available in the static I/O buffer for each
38 * device. Currently each device gets 2 pages. We want to fit two requests
39 * into the available memory so that we can immediately start the next if one
40 * finishes. */
41#define DIAG_MAX_BLOCKS (((2 * PAGE_SIZE - sizeof(struct dasd_ccw_req) - \
42 sizeof(struct dasd_diag_req)) / \
43 sizeof(struct dasd_diag_bio)) / 2)
44#define DIAG_MAX_RETRIES 32
45#define DIAG_TIMEOUT 50 * HZ
46
38struct dasd_discipline dasd_diag_discipline; 47struct dasd_discipline dasd_diag_discipline;
39 48
40struct dasd_diag_private { 49struct dasd_diag_private {
41 struct dasd_diag_characteristics rdc_data; 50 struct dasd_diag_characteristics rdc_data;
42 struct dasd_diag_rw_io iob; 51 struct dasd_diag_rw_io iob;
43 struct dasd_diag_init_io iib; 52 struct dasd_diag_init_io iib;
44 unsigned int pt_block; 53 blocknum_t pt_block;
45}; 54};
46 55
47struct dasd_diag_req { 56struct dasd_diag_req {
48 int block_count; 57 unsigned int block_count;
49 struct dasd_diag_bio bio[0]; 58 struct dasd_diag_bio bio[0];
50}; 59};
51 60
61static const u8 DASD_DIAG_CMS1[] = { 0xc3, 0xd4, 0xe2, 0xf1 };/* EBCDIC CMS1 */
62
63/* Perform DIAG250 call with block I/O parameter list iob (input and output)
64 * and function code cmd.
65 * In case of an exception return 3. Otherwise return result of bitwise OR of
66 * resulting condition code and DIAG return code. */
52static __inline__ int 67static __inline__ int
53dia250(void *iob, int cmd) 68dia250(void *iob, int cmd)
54{ 69{
70 typedef struct {
71 char _[max(sizeof (struct dasd_diag_init_io),
72 sizeof (struct dasd_diag_rw_io))];
73 } addr_type;
55 int rc; 74 int rc;
56 75
57 __asm__ __volatile__(" lhi %0,3\n" 76 __asm__ __volatile__(
58 " lr 0,%2\n" 77#ifdef CONFIG_ARCH_S390X
59 " diag 0,%1,0x250\n" 78 " lghi %0,3\n"
60 "0: ipm %0\n" 79 " lgr 0,%3\n"
61 " srl %0,28\n" 80 " diag 0,%2,0x250\n"
62 " or %0,1\n" 81 "0: ipm %0\n"
63 "1:\n" 82 " srl %0,28\n"
64#ifndef CONFIG_ARCH_S390X 83 " or %0,1\n"
65 ".section __ex_table,\"a\"\n" 84 "1:\n"
66 " .align 4\n" 85 ".section __ex_table,\"a\"\n"
67 " .long 0b,1b\n" 86 " .align 8\n"
68 ".previous\n" 87 " .quad 0b,1b\n"
88 ".previous\n"
69#else 89#else
70 ".section __ex_table,\"a\"\n" 90 " lhi %0,3\n"
71 " .align 8\n" 91 " lr 0,%3\n"
72 " .quad 0b,1b\n" 92 " diag 0,%2,0x250\n"
73 ".previous\n" 93 "0: ipm %0\n"
94 " srl %0,28\n"
95 " or %0,1\n"
96 "1:\n"
97 ".section __ex_table,\"a\"\n"
98 " .align 4\n"
99 " .long 0b,1b\n"
100 ".previous\n"
74#endif 101#endif
75 : "=&d" (rc) 102 : "=&d" (rc), "=m" (*(addr_type *) iob)
76 : "d" (cmd), "d" ((void *) __pa(iob)) 103 : "d" (cmd), "d" (iob), "m" (*(addr_type *) iob)
77 : "0", "1", "cc"); 104 : "0", "1", "cc");
78 return rc; 105 return rc;
79} 106}
80 107
108/* Initialize block I/O to DIAG device using the specified blocksize and
109 * block offset. On success, return zero and set end_block to contain the
110 * number of blocks on the device minus the specified offset. Return non-zero
111 * otherwise. */
81static __inline__ int 112static __inline__ int
82mdsk_init_io(struct dasd_device * device, int blocksize, int offset, int size) 113mdsk_init_io(struct dasd_device *device, unsigned int blocksize,
114 blocknum_t offset, blocknum_t *end_block)
83{ 115{
84 struct dasd_diag_private *private; 116 struct dasd_diag_private *private;
85 struct dasd_diag_init_io *iib; 117 struct dasd_diag_init_io *iib;
@@ -92,14 +124,18 @@ mdsk_init_io(struct dasd_device * device, int blocksize, int offset, int size)
92 iib->dev_nr = _ccw_device_get_device_number(device->cdev); 124 iib->dev_nr = _ccw_device_get_device_number(device->cdev);
93 iib->block_size = blocksize; 125 iib->block_size = blocksize;
94 iib->offset = offset; 126 iib->offset = offset;
95 iib->start_block = 0; 127 iib->flaga = DASD_DIAG_FLAGA_DEFAULT;
96 iib->end_block = size;
97 128
98 rc = dia250(iib, INIT_BIO); 129 rc = dia250(iib, INIT_BIO);
99 130
100 return rc & 3; 131 if ((rc & 3) == 0 && end_block)
132 *end_block = iib->end_block;
133
134 return rc;
101} 135}
102 136
137/* Remove block I/O environment for device. Return zero on success, non-zero
138 * otherwise. */
103static __inline__ int 139static __inline__ int
104mdsk_term_io(struct dasd_device * device) 140mdsk_term_io(struct dasd_device * device)
105{ 141{
@@ -112,9 +148,25 @@ mdsk_term_io(struct dasd_device * device)
112 memset(iib, 0, sizeof (struct dasd_diag_init_io)); 148 memset(iib, 0, sizeof (struct dasd_diag_init_io));
113 iib->dev_nr = _ccw_device_get_device_number(device->cdev); 149 iib->dev_nr = _ccw_device_get_device_number(device->cdev);
114 rc = dia250(iib, TERM_BIO); 150 rc = dia250(iib, TERM_BIO);
115 return rc & 3; 151 return rc;
152}
153
154/* Error recovery for failed DIAG requests - try to reestablish the DIAG
155 * environment. */
156static void
157dasd_diag_erp(struct dasd_device *device)
158{
159 int rc;
160
161 mdsk_term_io(device);
162 rc = mdsk_init_io(device, device->bp_block, 0, NULL);
163 if (rc)
164 DEV_MESSAGE(KERN_WARNING, device, "DIAG ERP unsuccessful, "
165 "rc=%d", rc);
116} 166}
117 167
168/* Start a given request at the device. Return zero on success, non-zero
169 * otherwise. */
118static int 170static int
119dasd_start_diag(struct dasd_ccw_req * cqr) 171dasd_start_diag(struct dasd_ccw_req * cqr)
120{ 172{
@@ -124,32 +176,66 @@ dasd_start_diag(struct dasd_ccw_req * cqr)
124 int rc; 176 int rc;
125 177
126 device = cqr->device; 178 device = cqr->device;
179 if (cqr->retries < 0) {
180 DEV_MESSAGE(KERN_WARNING, device, "DIAG start_IO: request %p "
181 "- no retry left)", cqr);
182 cqr->status = DASD_CQR_FAILED;
183 return -EIO;
184 }
127 private = (struct dasd_diag_private *) device->private; 185 private = (struct dasd_diag_private *) device->private;
128 dreq = (struct dasd_diag_req *) cqr->data; 186 dreq = (struct dasd_diag_req *) cqr->data;
129 187
130 private->iob.dev_nr = _ccw_device_get_device_number(device->cdev); 188 private->iob.dev_nr = _ccw_device_get_device_number(device->cdev);
131 private->iob.key = 0; 189 private->iob.key = 0;
132 private->iob.flags = 2; /* do asynchronous io */ 190 private->iob.flags = DASD_DIAG_RWFLAG_ASYNC;
133 private->iob.block_count = dreq->block_count; 191 private->iob.block_count = dreq->block_count;
134 private->iob.interrupt_params = (u32)(addr_t) cqr; 192 private->iob.interrupt_params = (addr_t) cqr;
135 private->iob.bio_list = __pa(dreq->bio); 193 private->iob.bio_list = __pa(dreq->bio);
194 private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT;
136 195
137 cqr->startclk = get_clock(); 196 cqr->startclk = get_clock();
197 cqr->starttime = jiffies;
198 cqr->retries--;
138 199
139 rc = dia250(&private->iob, RW_BIO); 200 rc = dia250(&private->iob, RW_BIO);
140 if (rc > 8) { 201 switch (rc) {
141 DEV_MESSAGE(KERN_WARNING, device, "dia250 returned CC %d", rc); 202 case 0: /* Synchronous I/O finished successfully */
142 cqr->status = DASD_CQR_ERROR; 203 cqr->stopclk = get_clock();
143 } else if (rc == 0) {
144 cqr->status = DASD_CQR_DONE; 204 cqr->status = DASD_CQR_DONE;
145 dasd_schedule_bh(device); 205 /* Indicate to calling function that only a dasd_schedule_bh()
146 } else { 206 and no timer is needed */
207 rc = -EACCES;
208 break;
209 case 8: /* Asynchronous I/O was started */
147 cqr->status = DASD_CQR_IN_IO; 210 cqr->status = DASD_CQR_IN_IO;
148 rc = 0; 211 rc = 0;
212 break;
213 default: /* Error condition */
214 cqr->status = DASD_CQR_QUEUED;
215 DEV_MESSAGE(KERN_WARNING, device, "dia250 returned rc=%d", rc);
216 dasd_diag_erp(device);
217 rc = -EIO;
218 break;
149 } 219 }
150 return rc; 220 return rc;
151} 221}
152 222
223/* Terminate given request at the device. */
224static int
225dasd_diag_term_IO(struct dasd_ccw_req * cqr)
226{
227 struct dasd_device *device;
228
229 device = cqr->device;
230 mdsk_term_io(device);
231 mdsk_init_io(device, device->bp_block, 0, NULL);
232 cqr->status = DASD_CQR_CLEAR;
233 cqr->stopclk = get_clock();
234 dasd_schedule_bh(device);
235 return 0;
236}
237
238/* Handle external interruption. */
153static void 239static void
154dasd_ext_handler(struct pt_regs *regs, __u16 code) 240dasd_ext_handler(struct pt_regs *regs, __u16 code)
155{ 241{
@@ -157,25 +243,27 @@ dasd_ext_handler(struct pt_regs *regs, __u16 code)
157 struct dasd_device *device; 243 struct dasd_device *device;
158 unsigned long long expires; 244 unsigned long long expires;
159 unsigned long flags; 245 unsigned long flags;
160 char status; 246 u8 int_code, status;
161 int ip; 247 addr_t ip;
162 248 int rc;
163 /*
164 * Get the external interruption subcode. VM stores
165 * this in the 'cpu address' field associated with
166 * the external interrupt. For diag 250 the subcode
167 * needs to be 3.
168 */
169 if ((S390_lowcore.cpu_addr & 0xff00) != 0x0300)
170 return;
171 status = *((char *) &S390_lowcore.ext_params + 5);
172 ip = S390_lowcore.ext_params;
173 249
250 int_code = *((u8 *) DASD_DIAG_LC_INT_CODE);
251 status = *((u8 *) DASD_DIAG_LC_INT_STATUS);
252 switch (int_code) {
253 case DASD_DIAG_CODE_31BIT:
254 ip = (addr_t) *((u32 *) DASD_DIAG_LC_INT_PARM_31BIT);
255 break;
256 case DASD_DIAG_CODE_64BIT:
257 ip = (addr_t) *((u64 *) DASD_DIAG_LC_INT_PARM_64BIT);
258 break;
259 default:
260 return;
261 }
174 if (!ip) { /* no intparm: unsolicited interrupt */ 262 if (!ip) { /* no intparm: unsolicited interrupt */
175 MESSAGE(KERN_DEBUG, "%s", "caught unsolicited interrupt"); 263 MESSAGE(KERN_DEBUG, "%s", "caught unsolicited interrupt");
176 return; 264 return;
177 } 265 }
178 cqr = (struct dasd_ccw_req *)(addr_t) ip; 266 cqr = (struct dasd_ccw_req *) ip;
179 device = (struct dasd_device *) cqr->device; 267 device = (struct dasd_device *) cqr->device;
180 if (strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) { 268 if (strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) {
181 DEV_MESSAGE(KERN_WARNING, device, 269 DEV_MESSAGE(KERN_WARNING, device,
@@ -188,6 +276,15 @@ dasd_ext_handler(struct pt_regs *regs, __u16 code)
188 /* get irq lock to modify request queue */ 276 /* get irq lock to modify request queue */
189 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags); 277 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
190 278
279 /* Check for a pending clear operation */
280 if (cqr->status == DASD_CQR_CLEAR) {
281 cqr->status = DASD_CQR_QUEUED;
282 dasd_clear_timer(device);
283 dasd_schedule_bh(device);
284 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
285 return;
286 }
287
191 cqr->stopclk = get_clock(); 288 cqr->stopclk = get_clock();
192 289
193 expires = 0; 290 expires = 0;
@@ -198,16 +295,22 @@ dasd_ext_handler(struct pt_regs *regs, __u16 code)
198 next = list_entry(device->ccw_queue.next, 295 next = list_entry(device->ccw_queue.next,
199 struct dasd_ccw_req, list); 296 struct dasd_ccw_req, list);
200 if (next->status == DASD_CQR_QUEUED) { 297 if (next->status == DASD_CQR_QUEUED) {
201 if (dasd_start_diag(next) == 0) 298 rc = dasd_start_diag(next);
299 if (rc == 0)
202 expires = next->expires; 300 expires = next->expires;
203 else 301 else if (rc != -EACCES)
204 DEV_MESSAGE(KERN_WARNING, device, "%s", 302 DEV_MESSAGE(KERN_WARNING, device, "%s",
205 "Interrupt fastpath " 303 "Interrupt fastpath "
206 "failed!"); 304 "failed!");
207 } 305 }
208 } 306 }
209 } else 307 } else {
210 cqr->status = DASD_CQR_FAILED; 308 cqr->status = DASD_CQR_QUEUED;
309 DEV_MESSAGE(KERN_WARNING, device, "interrupt status for "
310 "request %p was %d (%d retries left)", cqr, status,
311 cqr->retries);
312 dasd_diag_erp(device);
313 }
211 314
212 if (expires != 0) 315 if (expires != 0)
213 dasd_set_timer(device, expires); 316 dasd_set_timer(device, expires);
@@ -218,14 +321,17 @@ dasd_ext_handler(struct pt_regs *regs, __u16 code)
218 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags); 321 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
219} 322}
220 323
324/* Check whether device can be controlled by DIAG discipline. Return zero on
325 * success, non-zero otherwise. */
221static int 326static int
222dasd_diag_check_device(struct dasd_device *device) 327dasd_diag_check_device(struct dasd_device *device)
223{ 328{
224 struct dasd_diag_private *private; 329 struct dasd_diag_private *private;
225 struct dasd_diag_characteristics *rdc_data; 330 struct dasd_diag_characteristics *rdc_data;
226 struct dasd_diag_bio bio; 331 struct dasd_diag_bio bio;
227 long *label; 332 struct dasd_diag_cms_label *label;
228 int sb, bsize; 333 blocknum_t end_block;
334 unsigned int sb, bsize;
229 int rc; 335 int rc;
230 336
231 private = (struct dasd_diag_private *) device->private; 337 private = (struct dasd_diag_private *) device->private;
@@ -244,8 +350,11 @@ dasd_diag_check_device(struct dasd_device *device)
244 rdc_data->rdc_len = sizeof (struct dasd_diag_characteristics); 350 rdc_data->rdc_len = sizeof (struct dasd_diag_characteristics);
245 351
246 rc = diag210((struct diag210 *) rdc_data); 352 rc = diag210((struct diag210 *) rdc_data);
247 if (rc) 353 if (rc) {
354 DEV_MESSAGE(KERN_WARNING, device, "failed to retrieve device "
355 "information (rc=%d)", rc);
248 return -ENOTSUPP; 356 return -ENOTSUPP;
357 }
249 358
250 /* Figure out position of label block */ 359 /* Figure out position of label block */
251 switch (private->rdc_data.vdev_class) { 360 switch (private->rdc_data.vdev_class) {
@@ -256,6 +365,8 @@ dasd_diag_check_device(struct dasd_device *device)
256 private->pt_block = 2; 365 private->pt_block = 2;
257 break; 366 break;
258 default: 367 default:
368 DEV_MESSAGE(KERN_WARNING, device, "unsupported device class "
369 "(class=%d)", private->rdc_data.vdev_class);
259 return -ENOTSUPP; 370 return -ENOTSUPP;
260 } 371 }
261 372
@@ -269,15 +380,17 @@ dasd_diag_check_device(struct dasd_device *device)
269 mdsk_term_io(device); 380 mdsk_term_io(device);
270 381
271 /* figure out blocksize of device */ 382 /* figure out blocksize of device */
272 label = (long *) get_zeroed_page(GFP_KERNEL); 383 label = (struct dasd_diag_cms_label *) get_zeroed_page(GFP_KERNEL);
273 if (label == NULL) { 384 if (label == NULL) {
274 DEV_MESSAGE(KERN_WARNING, device, "%s", 385 DEV_MESSAGE(KERN_WARNING, device, "%s",
275 "No memory to allocate initialization request"); 386 "No memory to allocate initialization request");
276 return -ENOMEM; 387 return -ENOMEM;
277 } 388 }
389 rc = 0;
390 end_block = 0;
278 /* try all sizes - needed for ECKD devices */ 391 /* try all sizes - needed for ECKD devices */
279 for (bsize = 512; bsize <= PAGE_SIZE; bsize <<= 1) { 392 for (bsize = 512; bsize <= PAGE_SIZE; bsize <<= 1) {
280 mdsk_init_io(device, bsize, 0, 64); 393 mdsk_init_io(device, bsize, 0, &end_block);
281 memset(&bio, 0, sizeof (struct dasd_diag_bio)); 394 memset(&bio, 0, sizeof (struct dasd_diag_bio));
282 bio.type = MDSK_READ_REQ; 395 bio.type = MDSK_READ_REQ;
283 bio.block_number = private->pt_block + 1; 396 bio.block_number = private->pt_block + 1;
@@ -289,37 +402,45 @@ dasd_diag_check_device(struct dasd_device *device)
289 private->iob.block_count = 1; 402 private->iob.block_count = 1;
290 private->iob.interrupt_params = 0; 403 private->iob.interrupt_params = 0;
291 private->iob.bio_list = __pa(&bio); 404 private->iob.bio_list = __pa(&bio);
292 if (dia250(&private->iob, RW_BIO) == 0) 405 private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT;
406 rc = dia250(&private->iob, RW_BIO);
407 if (rc == 0 || rc == 3)
293 break; 408 break;
294 mdsk_term_io(device); 409 mdsk_term_io(device);
295 } 410 }
296 if (bsize <= PAGE_SIZE && label[0] == 0xc3d4e2f1) { 411 if (rc == 3) {
297 /* get formatted blocksize from label block */ 412 DEV_MESSAGE(KERN_WARNING, device, "%s", "DIAG call failed");
298 bsize = (int) label[3]; 413 rc = -EOPNOTSUPP;
299 device->blocks = label[7]; 414 } else if (rc != 0) {
415 DEV_MESSAGE(KERN_WARNING, device, "device access failed "
416 "(rc=%d)", rc);
417 rc = -EIO;
418 } else {
419 if (memcmp(label->label_id, DASD_DIAG_CMS1,
420 sizeof(DASD_DIAG_CMS1)) == 0) {
421 /* get formatted blocksize from label block */
422 bsize = (unsigned int) label->block_size;
423 device->blocks = (unsigned long) label->block_count;
424 } else
425 device->blocks = end_block;
300 device->bp_block = bsize; 426 device->bp_block = bsize;
301 device->s2b_shift = 0; /* bits to shift 512 to get a block */ 427 device->s2b_shift = 0; /* bits to shift 512 to get a block */
302 for (sb = 512; sb < bsize; sb = sb << 1) 428 for (sb = 512; sb < bsize; sb = sb << 1)
303 device->s2b_shift++; 429 device->s2b_shift++;
304 430
305 DEV_MESSAGE(KERN_INFO, device, 431 DEV_MESSAGE(KERN_INFO, device,
306 "capacity (%dkB blks): %ldkB", 432 "(%ld B/blk): %ldkB",
307 (device->bp_block >> 10), 433 (unsigned long) device->bp_block,
308 (device->blocks << device->s2b_shift) >> 1); 434 (unsigned long) (device->blocks <<
435 device->s2b_shift) >> 1);
309 rc = 0; 436 rc = 0;
310 } else {
311 if (bsize > PAGE_SIZE)
312 DEV_MESSAGE(KERN_WARNING, device, "%s",
313 "DIAG access failed");
314 else
315 DEV_MESSAGE(KERN_WARNING, device, "%s",
316 "volume is not CMS formatted");
317 rc = -EMEDIUMTYPE;
318 } 437 }
319 free_page((long) label); 438 free_page((long) label);
320 return rc; 439 return rc;
321} 440}
322 441
442/* Fill in virtual disk geometry for device. Return zero on success, non-zero
443 * otherwise. */
323static int 444static int
324dasd_diag_fill_geometry(struct dasd_device *device, struct hd_geometry *geo) 445dasd_diag_fill_geometry(struct dasd_device *device, struct hd_geometry *geo)
325{ 446{
@@ -349,6 +470,8 @@ dasd_diag_erp_postaction(struct dasd_ccw_req * cqr)
349 return dasd_default_erp_postaction; 470 return dasd_default_erp_postaction;
350} 471}
351 472
473/* Create DASD request from block device request. Return pointer to new
474 * request on success, ERR_PTR otherwise. */
352static struct dasd_ccw_req * 475static struct dasd_ccw_req *
353dasd_diag_build_cp(struct dasd_device * device, struct request *req) 476dasd_diag_build_cp(struct dasd_device * device, struct request *req)
354{ 477{
@@ -358,9 +481,9 @@ dasd_diag_build_cp(struct dasd_device * device, struct request *req)
358 struct bio *bio; 481 struct bio *bio;
359 struct bio_vec *bv; 482 struct bio_vec *bv;
360 char *dst; 483 char *dst;
361 int count, datasize; 484 unsigned int count, datasize;
362 sector_t recid, first_rec, last_rec; 485 sector_t recid, first_rec, last_rec;
363 unsigned blksize, off; 486 unsigned int blksize, off;
364 unsigned char rw_cmd; 487 unsigned char rw_cmd;
365 int i; 488 int i;
366 489
@@ -413,13 +536,16 @@ dasd_diag_build_cp(struct dasd_device * device, struct request *req)
413 } 536 }
414 } 537 }
415 } 538 }
539 cqr->retries = DIAG_MAX_RETRIES;
416 cqr->buildclk = get_clock(); 540 cqr->buildclk = get_clock();
417 cqr->device = device; 541 cqr->device = device;
418 cqr->expires = 50 * HZ; /* 50 seconds */ 542 cqr->expires = DIAG_TIMEOUT;
419 cqr->status = DASD_CQR_FILLED; 543 cqr->status = DASD_CQR_FILLED;
420 return cqr; 544 return cqr;
421} 545}
422 546
547/* Release DASD request. Return non-zero if request was successful, zero
548 * otherwise. */
423static int 549static int
424dasd_diag_free_cp(struct dasd_ccw_req *cqr, struct request *req) 550dasd_diag_free_cp(struct dasd_ccw_req *cqr, struct request *req)
425{ 551{
@@ -430,6 +556,7 @@ dasd_diag_free_cp(struct dasd_ccw_req *cqr, struct request *req)
430 return status; 556 return status;
431} 557}
432 558
559/* Fill in IOCTL data for device. */
433static int 560static int
434dasd_diag_fill_info(struct dasd_device * device, 561dasd_diag_fill_info(struct dasd_device * device,
435 struct dasd_information2_t * info) 562 struct dasd_information2_t * info)
@@ -437,7 +564,7 @@ dasd_diag_fill_info(struct dasd_device * device,
437 struct dasd_diag_private *private; 564 struct dasd_diag_private *private;
438 565
439 private = (struct dasd_diag_private *) device->private; 566 private = (struct dasd_diag_private *) device->private;
440 info->label_block = private->pt_block; 567 info->label_block = (unsigned int) private->pt_block;
441 info->FBA_layout = 1; 568 info->FBA_layout = 1;
442 info->format = DASD_FORMAT_LDL; 569 info->format = DASD_FORMAT_LDL;
443 info->characteristics_size = sizeof (struct dasd_diag_characteristics); 570 info->characteristics_size = sizeof (struct dasd_diag_characteristics);
@@ -456,26 +583,15 @@ dasd_diag_dump_sense(struct dasd_device *device, struct dasd_ccw_req * req,
456 "dump sense not available for DIAG data"); 583 "dump sense not available for DIAG data");
457} 584}
458 585
459/*
460 * max_blocks is dependent on the amount of storage that is available
461 * in the static io buffer for each device. Currently each device has
462 * 8192 bytes (=2 pages). dasd diag is only relevant for 31 bit.
463 * The struct dasd_ccw_req has 96 bytes, the struct dasd_diag_req has
464 * 8 bytes and the struct dasd_diag_bio for each block has 16 bytes.
465 * That makes:
466 * (8192 - 96 - 8) / 16 = 505.5 blocks at maximum.
467 * We want to fit two into the available memory so that we can immediately
468 * start the next request if one finishes off. That makes 252.75 blocks
469 * for one request. Give a little safety and the result is 240.
470 */
471struct dasd_discipline dasd_diag_discipline = { 586struct dasd_discipline dasd_diag_discipline = {
472 .owner = THIS_MODULE, 587 .owner = THIS_MODULE,
473 .name = "DIAG", 588 .name = "DIAG",
474 .ebcname = "DIAG", 589 .ebcname = "DIAG",
475 .max_blocks = 240, 590 .max_blocks = DIAG_MAX_BLOCKS,
476 .check_device = dasd_diag_check_device, 591 .check_device = dasd_diag_check_device,
477 .fill_geometry = dasd_diag_fill_geometry, 592 .fill_geometry = dasd_diag_fill_geometry,
478 .start_IO = dasd_start_diag, 593 .start_IO = dasd_start_diag,
594 .term_IO = dasd_diag_term_IO,
479 .examine_error = dasd_diag_examine_error, 595 .examine_error = dasd_diag_examine_error,
480 .erp_action = dasd_diag_erp_action, 596 .erp_action = dasd_diag_erp_action,
481 .erp_postaction = dasd_diag_erp_postaction, 597 .erp_postaction = dasd_diag_erp_postaction,
@@ -493,7 +609,7 @@ dasd_diag_init(void)
493 "Machine is not VM: %s " 609 "Machine is not VM: %s "
494 "discipline not initializing", 610 "discipline not initializing",
495 dasd_diag_discipline.name); 611 dasd_diag_discipline.name);
496 return -EINVAL; 612 return -ENODEV;
497 } 613 }
498 ASCEBC(dasd_diag_discipline.ebcname, 4); 614 ASCEBC(dasd_diag_discipline.ebcname, 4);
499 615
@@ -506,13 +622,6 @@ dasd_diag_init(void)
506static void __exit 622static void __exit
507dasd_diag_cleanup(void) 623dasd_diag_cleanup(void)
508{ 624{
509 if (!MACHINE_IS_VM) {
510 MESSAGE_LOG(KERN_INFO,
511 "Machine is not VM: %s "
512 "discipline not cleaned",
513 dasd_diag_discipline.name);
514 return;
515 }
516 unregister_external_interrupt(0x2603, dasd_ext_handler); 625 unregister_external_interrupt(0x2603, dasd_ext_handler);
517 ctl_clear_bit(0, 9); 626 ctl_clear_bit(0, 9);
518 dasd_diag_discipline_pointer = NULL; 627 dasd_diag_discipline_pointer = NULL;
@@ -520,22 +629,3 @@ dasd_diag_cleanup(void)
520 629
521module_init(dasd_diag_init); 630module_init(dasd_diag_init);
522module_exit(dasd_diag_cleanup); 631module_exit(dasd_diag_cleanup);
523
524/*
525 * Overrides for Emacs so that we follow Linus's tabbing style.
526 * Emacs will notice this stuff at the end of the file and automatically
527 * adjust the settings for this buffer only. This must remain at the end
528 * of the file.
529 * ---------------------------------------------------------------------------
530 * Local variables:
531 * c-indent-level: 4
532 * c-brace-imaginary-offset: 0
533 * c-brace-offset: -4
534 * c-argdecl-indent: 4
535 * c-label-offset: -4
536 * c-continued-statement-offset: 4
537 * c-continued-brace-offset: 0
538 * indent-tabs-mode: 1
539 * tab-width: 8
540 * End:
541 */
diff --git a/drivers/s390/block/dasd_diag.h b/drivers/s390/block/dasd_diag.h
index a0c38e303979..b26eb28df4bf 100644
--- a/drivers/s390/block/dasd_diag.h
+++ b/drivers/s390/block/dasd_diag.h
@@ -6,7 +6,7 @@
6 * Bugreports.to..: <Linux390@de.ibm.com> 6 * Bugreports.to..: <Linux390@de.ibm.com>
7 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 7 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
8 * 8 *
9 * $Revision: 1.6 $ 9 * $Revision: 1.7 $
10 */ 10 */
11 11
12#define MDSK_WRITE_REQ 0x01 12#define MDSK_WRITE_REQ 0x01
@@ -19,6 +19,18 @@
19#define DEV_CLASS_FBA 0x01 19#define DEV_CLASS_FBA 0x01
20#define DEV_CLASS_ECKD 0x04 20#define DEV_CLASS_ECKD 0x04
21 21
22#define DASD_DIAG_LC_INT_CODE 132
23#define DASD_DIAG_LC_INT_STATUS 133
24#define DASD_DIAG_LC_INT_PARM_31BIT 128
25#define DASD_DIAG_LC_INT_PARM_64BIT 4536
26#define DASD_DIAG_CODE_31BIT 0x03
27#define DASD_DIAG_CODE_64BIT 0x07
28
29#define DASD_DIAG_RWFLAG_ASYNC 0x02
30#define DASD_DIAG_RWFLAG_NOCACHE 0x01
31
32#define DASD_DIAG_FLAGA_FORMAT_64BIT 0x80
33
22struct dasd_diag_characteristics { 34struct dasd_diag_characteristics {
23 u16 dev_nr; 35 u16 dev_nr;
24 u16 rdc_len; 36 u16 rdc_len;
@@ -32,35 +44,106 @@ struct dasd_diag_characteristics {
32 u8 rdev_features; 44 u8 rdev_features;
33} __attribute__ ((packed, aligned(4))); 45} __attribute__ ((packed, aligned(4)));
34 46
47struct dasd_diag_cms_label {
48 u8 label_id[4];
49 u8 vol_id[6];
50 u16 version_id;
51 u32 block_size;
52 u32 origin_ptr;
53 u32 usable_count;
54 u32 formatted_count;
55 u32 block_count;
56 u32 used_count;
57 u32 fst_size;
58 u32 fst_count;
59 u8 format_date[6];
60 u8 reserved1[2];
61 u32 disk_offset;
62 u32 map_block;
63 u32 hblk_disp;
64 u32 user_disp;
65 u8 reserved2[4];
66 u8 segment_name[8];
67} __attribute__ ((packed));
68
69#ifdef CONFIG_ARCH_S390X
70#define DASD_DIAG_FLAGA_DEFAULT DASD_DIAG_FLAGA_FORMAT_64BIT
71
72typedef u64 blocknum_t;
73typedef s64 sblocknum_t;
74
75struct dasd_diag_bio {
76 u8 type;
77 u8 status;
78 u8 spare1[2];
79 u32 alet;
80 blocknum_t block_number;
81 u64 buffer;
82} __attribute__ ((packed, aligned(8)));
83
84struct dasd_diag_init_io {
85 u16 dev_nr;
86 u8 flaga;
87 u8 spare1[21];
88 u32 block_size;
89 u8 spare2[4];
90 blocknum_t offset;
91 sblocknum_t start_block;
92 blocknum_t end_block;
93 u8 spare3[8];
94} __attribute__ ((packed, aligned(8)));
95
96struct dasd_diag_rw_io {
97 u16 dev_nr;
98 u8 flaga;
99 u8 spare1[21];
100 u8 key;
101 u8 flags;
102 u8 spare2[2];
103 u32 block_count;
104 u32 alet;
105 u8 spare3[4];
106 u64 interrupt_params;
107 u64 bio_list;
108 u8 spare4[8];
109} __attribute__ ((packed, aligned(8)));
110#else /* CONFIG_ARCH_S390X */
111#define DASD_DIAG_FLAGA_DEFAULT 0x0
112
113typedef u32 blocknum_t;
114typedef s32 sblocknum_t;
115
35struct dasd_diag_bio { 116struct dasd_diag_bio {
36 u8 type; 117 u8 type;
37 u8 status; 118 u8 status;
38 u16 spare1; 119 u16 spare1;
39 u32 block_number; 120 blocknum_t block_number;
40 u32 alet; 121 u32 alet;
41 u32 buffer; 122 u32 buffer;
42} __attribute__ ((packed, aligned(8))); 123} __attribute__ ((packed, aligned(8)));
43 124
44struct dasd_diag_init_io { 125struct dasd_diag_init_io {
45 u16 dev_nr; 126 u16 dev_nr;
46 u16 spare1[11]; 127 u8 flaga;
128 u8 spare1[21];
47 u32 block_size; 129 u32 block_size;
48 u32 offset; 130 blocknum_t offset;
49 u32 start_block; 131 sblocknum_t start_block;
50 u32 end_block; 132 blocknum_t end_block;
51 u32 spare2[6]; 133 u8 spare2[24];
52} __attribute__ ((packed, aligned(8))); 134} __attribute__ ((packed, aligned(8)));
53 135
54struct dasd_diag_rw_io { 136struct dasd_diag_rw_io {
55 u16 dev_nr; 137 u16 dev_nr;
56 u16 spare1[11]; 138 u8 flaga;
139 u8 spare1[21];
57 u8 key; 140 u8 key;
58 u8 flags; 141 u8 flags;
59 u16 spare2; 142 u8 spare2[2];
60 u32 block_count; 143 u32 block_count;
61 u32 alet; 144 u32 alet;
62 u32 bio_list; 145 u32 bio_list;
63 u32 interrupt_params; 146 u32 interrupt_params;
64 u32 spare3[5]; 147 u8 spare3[20];
65} __attribute__ ((packed, aligned(8))); 148} __attribute__ ((packed, aligned(8)));
66 149#endif /* CONFIG_ARCH_S390X */
diff --git a/drivers/s390/block/dasd_genhd.c b/drivers/s390/block/dasd_genhd.c
index 96c49349701f..a601c9a33541 100644
--- a/drivers/s390/block/dasd_genhd.c
+++ b/drivers/s390/block/dasd_genhd.c
@@ -9,7 +9,7 @@
9 * 9 *
10 * gendisk related functions for the dasd driver. 10 * gendisk related functions for the dasd driver.
11 * 11 *
12 * $Revision: 1.50 $ 12 * $Revision: 1.51 $
13 */ 13 */
14 14
15#include <linux/config.h> 15#include <linux/config.h>
@@ -31,16 +31,12 @@ int
31dasd_gendisk_alloc(struct dasd_device *device) 31dasd_gendisk_alloc(struct dasd_device *device)
32{ 32{
33 struct gendisk *gdp; 33 struct gendisk *gdp;
34 int len, feature_ro; 34 int len;
35 35
36 /* Make sure the minor for this device exists. */ 36 /* Make sure the minor for this device exists. */
37 if (device->devindex >= DASD_PER_MAJOR) 37 if (device->devindex >= DASD_PER_MAJOR)
38 return -EBUSY; 38 return -EBUSY;
39 39
40 feature_ro = dasd_get_feature(device->cdev, DASD_FEATURE_READONLY);
41 if (feature_ro < 0)
42 return feature_ro;
43
44 gdp = alloc_disk(1 << DASD_PARTN_BITS); 40 gdp = alloc_disk(1 << DASD_PARTN_BITS);
45 if (!gdp) 41 if (!gdp)
46 return -ENOMEM; 42 return -ENOMEM;
@@ -75,7 +71,7 @@ dasd_gendisk_alloc(struct dasd_device *device)
75 71
76 sprintf(gdp->devfs_name, "dasd/%s", device->cdev->dev.bus_id); 72 sprintf(gdp->devfs_name, "dasd/%s", device->cdev->dev.bus_id);
77 73
78 if (feature_ro) 74 if (device->features & DASD_FEATURE_READONLY)
79 set_disk_ro(gdp, 1); 75 set_disk_ro(gdp, 1);
80 gdp->private_data = device; 76 gdp->private_data = device;
81 gdp->queue = device->request_queue; 77 gdp->queue = device->request_queue;
diff --git a/drivers/s390/block/dasd_int.h b/drivers/s390/block/dasd_int.h
index a9f38b235981..9fab04f3056d 100644
--- a/drivers/s390/block/dasd_int.h
+++ b/drivers/s390/block/dasd_int.h
@@ -6,7 +6,7 @@
6 * Bugreports.to..: <Linux390@de.ibm.com> 6 * Bugreports.to..: <Linux390@de.ibm.com>
7 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 7 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
8 * 8 *
9 * $Revision: 1.64 $ 9 * $Revision: 1.65 $
10 */ 10 */
11 11
12#ifndef DASD_INT_H 12#ifndef DASD_INT_H
@@ -286,6 +286,7 @@ struct dasd_device {
286 unsigned int bp_block; /* bytes per block */ 286 unsigned int bp_block; /* bytes per block */
287 unsigned int s2b_shift; /* log2 (bp_block/512) */ 287 unsigned int s2b_shift; /* log2 (bp_block/512) */
288 unsigned long flags; /* per device flags */ 288 unsigned long flags; /* per device flags */
289 unsigned short features; /* copy of devmap-features (read-only!) */
289 290
290 /* Device discipline stuff. */ 291 /* Device discipline stuff. */
291 struct dasd_discipline *discipline; 292 struct dasd_discipline *discipline;
diff --git a/drivers/s390/block/dasd_ioctl.c b/drivers/s390/block/dasd_ioctl.c
index 980c555aa538..789595b3fa09 100644
--- a/drivers/s390/block/dasd_ioctl.c
+++ b/drivers/s390/block/dasd_ioctl.c
@@ -7,7 +7,7 @@
7 * Bugreports.to..: <Linux390@de.ibm.com> 7 * Bugreports.to..: <Linux390@de.ibm.com>
8 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999-2001 8 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999-2001
9 * 9 *
10 * $Revision: 1.45 $ 10 * $Revision: 1.47 $
11 * 11 *
12 * i/o controls for the dasd driver. 12 * i/o controls for the dasd driver.
13 */ 13 */
@@ -296,7 +296,6 @@ dasd_ioctl_format(struct block_device *bdev, int no, long args)
296{ 296{
297 struct dasd_device *device; 297 struct dasd_device *device;
298 struct format_data_t fdata; 298 struct format_data_t fdata;
299 int feature_ro;
300 299
301 if (!capable(CAP_SYS_ADMIN)) 300 if (!capable(CAP_SYS_ADMIN))
302 return -EACCES; 301 return -EACCES;
@@ -308,10 +307,7 @@ dasd_ioctl_format(struct block_device *bdev, int no, long args)
308 if (device == NULL) 307 if (device == NULL)
309 return -ENODEV; 308 return -ENODEV;
310 309
311 feature_ro = dasd_get_feature(device->cdev, DASD_FEATURE_READONLY); 310 if (device->features & DASD_FEATURE_READONLY)
312 if (feature_ro < 0)
313 return feature_ro;
314 if (feature_ro)
315 return -EROFS; 311 return -EROFS;
316 if (copy_from_user(&fdata, (void __user *) args, 312 if (copy_from_user(&fdata, (void __user *) args,
317 sizeof (struct format_data_t))) 313 sizeof (struct format_data_t)))
@@ -384,7 +380,7 @@ dasd_ioctl_information(struct block_device *bdev, int no, long args)
384 struct dasd_device *device; 380 struct dasd_device *device;
385 struct dasd_information2_t *dasd_info; 381 struct dasd_information2_t *dasd_info;
386 unsigned long flags; 382 unsigned long flags;
387 int rc, feature_ro; 383 int rc;
388 struct ccw_device *cdev; 384 struct ccw_device *cdev;
389 385
390 device = bdev->bd_disk->private_data; 386 device = bdev->bd_disk->private_data;
@@ -394,10 +390,6 @@ dasd_ioctl_information(struct block_device *bdev, int no, long args)
394 if (!device->discipline->fill_info) 390 if (!device->discipline->fill_info)
395 return -EINVAL; 391 return -EINVAL;
396 392
397 feature_ro = dasd_get_feature(device->cdev, DASD_FEATURE_READONLY);
398 if (feature_ro < 0)
399 return feature_ro;
400
401 dasd_info = kmalloc(sizeof(struct dasd_information2_t), GFP_KERNEL); 393 dasd_info = kmalloc(sizeof(struct dasd_information2_t), GFP_KERNEL);
402 if (dasd_info == NULL) 394 if (dasd_info == NULL)
403 return -ENOMEM; 395 return -ENOMEM;
@@ -427,7 +419,8 @@ dasd_ioctl_information(struct block_device *bdev, int no, long args)
427 (dasd_check_blocksize(device->bp_block))) 419 (dasd_check_blocksize(device->bp_block)))
428 dasd_info->format = DASD_FORMAT_NONE; 420 dasd_info->format = DASD_FORMAT_NONE;
429 421
430 dasd_info->features |= feature_ro; 422 dasd_info->features |=
423 ((device->features & DASD_FEATURE_READONLY) != 0);
431 424
432 if (device->discipline) 425 if (device->discipline)
433 memcpy(dasd_info->type, device->discipline->name, 4); 426 memcpy(dasd_info->type, device->discipline->name, 4);
diff --git a/drivers/s390/block/dasd_proc.c b/drivers/s390/block/dasd_proc.c
index 43c34f8c5e68..fff9020d4886 100644
--- a/drivers/s390/block/dasd_proc.c
+++ b/drivers/s390/block/dasd_proc.c
@@ -9,7 +9,7 @@
9 * 9 *
10 * /proc interface for the dasd driver. 10 * /proc interface for the dasd driver.
11 * 11 *
12 * $Revision: 1.32 $ 12 * $Revision: 1.33 $
13 */ 13 */
14 14
15#include <linux/config.h> 15#include <linux/config.h>
@@ -55,7 +55,6 @@ dasd_devices_show(struct seq_file *m, void *v)
55{ 55{
56 struct dasd_device *device; 56 struct dasd_device *device;
57 char *substr; 57 char *substr;
58 int feature;
59 58
60 device = dasd_device_from_devindex((unsigned long) v - 1); 59 device = dasd_device_from_devindex((unsigned long) v - 1);
61 if (IS_ERR(device)) 60 if (IS_ERR(device))
@@ -79,10 +78,7 @@ dasd_devices_show(struct seq_file *m, void *v)
79 else 78 else
80 seq_printf(m, " is ????????"); 79 seq_printf(m, " is ????????");
81 /* Print devices features. */ 80 /* Print devices features. */
82 feature = dasd_get_feature(device->cdev, DASD_FEATURE_READONLY); 81 substr = (device->features & DASD_FEATURE_READONLY) ? "(ro)" : " ";
83 if (feature < 0)
84 return 0;
85 substr = feature ? "(ro)" : " ";
86 seq_printf(m, "%4s: ", substr); 82 seq_printf(m, "%4s: ", substr);
87 /* Print device status information. */ 83 /* Print device status information. */
88 switch ((device != NULL) ? device->state : -1) { 84 switch ((device != NULL) ? device->state : -1) {
diff --git a/drivers/s390/char/raw3270.c b/drivers/s390/char/raw3270.c
index d5eefeaba50c..328d9cbc56a3 100644
--- a/drivers/s390/char/raw3270.c
+++ b/drivers/s390/char/raw3270.c
@@ -632,12 +632,9 @@ __raw3270_size_device(struct raw3270 *rp)
632 raw3270_init_request.ccw.cda = (__u32) __pa(raw3270_init_data); 632 raw3270_init_request.ccw.cda = (__u32) __pa(raw3270_init_data);
633 633
634 rc = raw3270_start_init(rp, &raw3270_init_view, &raw3270_init_request); 634 rc = raw3270_start_init(rp, &raw3270_init_view, &raw3270_init_request);
635 if (rc) { 635 if (rc)
636 /* Check error cases: -ERESTARTSYS, -EIO and -EOPNOTSUPP */ 636 /* Check error cases: -ERESTARTSYS, -EIO and -EOPNOTSUPP */
637 if (rc == -EOPNOTSUPP && MACHINE_IS_VM)
638 return __raw3270_size_device_vm(rp);
639 return rc; 637 return rc;
640 }
641 638
642 /* Wait for attention interrupt. */ 639 /* Wait for attention interrupt. */
643#ifdef CONFIG_TN3270_CONSOLE 640#ifdef CONFIG_TN3270_CONSOLE
@@ -695,7 +692,10 @@ raw3270_size_device(struct raw3270 *rp)
695 down(&raw3270_init_sem); 692 down(&raw3270_init_sem);
696 rp->view = &raw3270_init_view; 693 rp->view = &raw3270_init_view;
697 raw3270_init_view.dev = rp; 694 raw3270_init_view.dev = rp;
698 rc = __raw3270_size_device(rp); 695 if (MACHINE_IS_VM)
696 rc = __raw3270_size_device_vm(rp);
697 else
698 rc = __raw3270_size_device(rp);
699 raw3270_init_view.dev = 0; 699 raw3270_init_view.dev = 0;
700 rp->view = 0; 700 rp->view = 0;
701 up(&raw3270_init_sem); 701 up(&raw3270_init_sem);
@@ -710,6 +710,12 @@ raw3270_size_device(struct raw3270 *rp)
710 rp->model = 4; 710 rp->model = 4;
711 if (rp->rows == 27 && rp->cols == 132) 711 if (rp->rows == 27 && rp->cols == 132)
712 rp->model = 5; 712 rp->model = 5;
713 } else {
714 /* Couldn't detect size. Use default model 2. */
715 rp->model = 2;
716 rp->rows = 24;
717 rp->cols = 80;
718 return 0;
713 } 719 }
714 return rc; 720 return rc;
715} 721}
diff --git a/drivers/s390/cio/cio.c b/drivers/s390/cio/cio.c
index ea813bdce1d6..185bc73c3ecd 100644
--- a/drivers/s390/cio/cio.c
+++ b/drivers/s390/cio/cio.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/s390/cio/cio.c 2 * drivers/s390/cio/cio.c
3 * S/390 common I/O routines -- low level i/o calls 3 * S/390 common I/O routines -- low level i/o calls
4 * $Revision: 1.134 $ 4 * $Revision: 1.135 $
5 * 5 *
6 * Copyright (C) 1999-2002 IBM Deutschland Entwicklung GmbH, 6 * Copyright (C) 1999-2002 IBM Deutschland Entwicklung GmbH,
7 * IBM Corporation 7 * IBM Corporation
@@ -815,8 +815,9 @@ __clear_subchannel_easy(unsigned int schid)
815 struct tpi_info ti; 815 struct tpi_info ti;
816 816
817 if (tpi(&ti)) { 817 if (tpi(&ti)) {
818 tsch(schid, (struct irb *)__LC_IRB); 818 tsch(ti.irq, (struct irb *)__LC_IRB);
819 return 0; 819 if (ti.irq == schid)
820 return 0;
820 } 821 }
821 udelay(100); 822 udelay(100);
822 } 823 }
diff --git a/drivers/s390/cio/device_fsm.c b/drivers/s390/cio/device_fsm.c
index ee7a05e0c3ba..fbe4202a3f6f 100644
--- a/drivers/s390/cio/device_fsm.c
+++ b/drivers/s390/cio/device_fsm.c
@@ -13,7 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14 14
15#include <asm/ccwdev.h> 15#include <asm/ccwdev.h>
16#include <asm/qdio.h> 16#include <asm/cio.h>
17 17
18#include "cio.h" 18#include "cio.h"
19#include "cio_debug.h" 19#include "cio_debug.h"
@@ -21,7 +21,6 @@
21#include "device.h" 21#include "device.h"
22#include "chsc.h" 22#include "chsc.h"
23#include "ioasm.h" 23#include "ioasm.h"
24#include "qdio.h"
25 24
26int 25int
27device_is_online(struct subchannel *sch) 26device_is_online(struct subchannel *sch)
diff --git a/drivers/s390/cio/device_ops.c b/drivers/s390/cio/device_ops.c
index 02d01a0de16c..ad3fe5aeb663 100644
--- a/drivers/s390/cio/device_ops.c
+++ b/drivers/s390/cio/device_ops.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/s390/cio/device_ops.c 2 * drivers/s390/cio/device_ops.c
3 * 3 *
4 * $Revision: 1.56 $ 4 * $Revision: 1.57 $
5 * 5 *
6 * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, 6 * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH,
7 * IBM Corporation 7 * IBM Corporation
@@ -19,14 +19,12 @@
19 19
20#include <asm/ccwdev.h> 20#include <asm/ccwdev.h>
21#include <asm/idals.h> 21#include <asm/idals.h>
22#include <asm/qdio.h>
23 22
24#include "cio.h" 23#include "cio.h"
25#include "cio_debug.h" 24#include "cio_debug.h"
26#include "css.h" 25#include "css.h"
27#include "chsc.h" 26#include "chsc.h"
28#include "device.h" 27#include "device.h"
29#include "qdio.h"
30 28
31int 29int
32ccw_device_set_options(struct ccw_device *cdev, unsigned long flags) 30ccw_device_set_options(struct ccw_device *cdev, unsigned long flags)
diff --git a/drivers/s390/cio/ioasm.h b/drivers/s390/cio/ioasm.h
index c874607d9a80..45480a2bc4c0 100644
--- a/drivers/s390/cio/ioasm.h
+++ b/drivers/s390/cio/ioasm.h
@@ -21,7 +21,7 @@ struct tpi_info {
21 * Some S390 specific IO instructions as inline 21 * Some S390 specific IO instructions as inline
22 */ 22 */
23 23
24extern __inline__ int stsch(int irq, volatile struct schib *addr) 24static inline int stsch(int irq, volatile struct schib *addr)
25{ 25{
26 int ccode; 26 int ccode;
27 27
@@ -36,7 +36,7 @@ extern __inline__ int stsch(int irq, volatile struct schib *addr)
36 return ccode; 36 return ccode;
37} 37}
38 38
39extern __inline__ int msch(int irq, volatile struct schib *addr) 39static inline int msch(int irq, volatile struct schib *addr)
40{ 40{
41 int ccode; 41 int ccode;
42 42
@@ -51,7 +51,7 @@ extern __inline__ int msch(int irq, volatile struct schib *addr)
51 return ccode; 51 return ccode;
52} 52}
53 53
54extern __inline__ int msch_err(int irq, volatile struct schib *addr) 54static inline int msch_err(int irq, volatile struct schib *addr)
55{ 55{
56 int ccode; 56 int ccode;
57 57
@@ -79,7 +79,7 @@ extern __inline__ int msch_err(int irq, volatile struct schib *addr)
79 return ccode; 79 return ccode;
80} 80}
81 81
82extern __inline__ int tsch(int irq, volatile struct irb *addr) 82static inline int tsch(int irq, volatile struct irb *addr)
83{ 83{
84 int ccode; 84 int ccode;
85 85
@@ -94,7 +94,7 @@ extern __inline__ int tsch(int irq, volatile struct irb *addr)
94 return ccode; 94 return ccode;
95} 95}
96 96
97extern __inline__ int tpi( volatile struct tpi_info *addr) 97static inline int tpi( volatile struct tpi_info *addr)
98{ 98{
99 int ccode; 99 int ccode;
100 100
@@ -108,7 +108,7 @@ extern __inline__ int tpi( volatile struct tpi_info *addr)
108 return ccode; 108 return ccode;
109} 109}
110 110
111extern __inline__ int ssch(int irq, volatile struct orb *addr) 111static inline int ssch(int irq, volatile struct orb *addr)
112{ 112{
113 int ccode; 113 int ccode;
114 114
@@ -123,7 +123,7 @@ extern __inline__ int ssch(int irq, volatile struct orb *addr)
123 return ccode; 123 return ccode;
124} 124}
125 125
126extern __inline__ int rsch(int irq) 126static inline int rsch(int irq)
127{ 127{
128 int ccode; 128 int ccode;
129 129
@@ -138,7 +138,7 @@ extern __inline__ int rsch(int irq)
138 return ccode; 138 return ccode;
139} 139}
140 140
141extern __inline__ int csch(int irq) 141static inline int csch(int irq)
142{ 142{
143 int ccode; 143 int ccode;
144 144
@@ -153,7 +153,7 @@ extern __inline__ int csch(int irq)
153 return ccode; 153 return ccode;
154} 154}
155 155
156extern __inline__ int hsch(int irq) 156static inline int hsch(int irq)
157{ 157{
158 int ccode; 158 int ccode;
159 159
@@ -168,7 +168,7 @@ extern __inline__ int hsch(int irq)
168 return ccode; 168 return ccode;
169} 169}
170 170
171extern __inline__ int xsch(int irq) 171static inline int xsch(int irq)
172{ 172{
173 int ccode; 173 int ccode;
174 174
@@ -183,7 +183,7 @@ extern __inline__ int xsch(int irq)
183 return ccode; 183 return ccode;
184} 184}
185 185
186extern __inline__ int chsc(void *chsc_area) 186static inline int chsc(void *chsc_area)
187{ 187{
188 int cc; 188 int cc;
189 189
@@ -198,7 +198,7 @@ extern __inline__ int chsc(void *chsc_area)
198 return cc; 198 return cc;
199} 199}
200 200
201extern __inline__ int iac( void) 201static inline int iac( void)
202{ 202{
203 int ccode; 203 int ccode;
204 204
@@ -210,7 +210,7 @@ extern __inline__ int iac( void)
210 return ccode; 210 return ccode;
211} 211}
212 212
213extern __inline__ int rchp(int chpid) 213static inline int rchp(int chpid)
214{ 214{
215 int ccode; 215 int ccode;
216 216
diff --git a/drivers/s390/crypto/z90common.h b/drivers/s390/crypto/z90common.h
index bcabac7a7c46..e319e78b5ea2 100644
--- a/drivers/s390/crypto/z90common.h
+++ b/drivers/s390/crypto/z90common.h
@@ -27,7 +27,7 @@
27#ifndef _Z90COMMON_H_ 27#ifndef _Z90COMMON_H_
28#define _Z90COMMON_H_ 28#define _Z90COMMON_H_
29 29
30#define VERSION_Z90COMMON_H "$Revision: 1.16 $" 30#define VERSION_Z90COMMON_H "$Revision: 1.17 $"
31 31
32 32
33#define RESPBUFFSIZE 256 33#define RESPBUFFSIZE 256
@@ -164,5 +164,4 @@ struct CPRBX {
164#define UMIN(a,b) ((a) < (b) ? (a) : (b)) 164#define UMIN(a,b) ((a) < (b) ? (a) : (b))
165#define IS_EVEN(x) ((x) == (2 * ((x) / 2))) 165#define IS_EVEN(x) ((x) == (2 * ((x) / 2)))
166 166
167
168#endif 167#endif
diff --git a/drivers/s390/crypto/z90hardware.c b/drivers/s390/crypto/z90hardware.c
index beb6a5e0da22..c215e0889736 100644
--- a/drivers/s390/crypto/z90hardware.c
+++ b/drivers/s390/crypto/z90hardware.c
@@ -32,7 +32,7 @@
32#include "z90crypt.h" 32#include "z90crypt.h"
33#include "z90common.h" 33#include "z90common.h"
34 34
35#define VERSION_Z90HARDWARE_C "$Revision: 1.33 $" 35#define VERSION_Z90HARDWARE_C "$Revision: 1.34 $"
36 36
37char z90hardware_version[] __initdata = 37char z90hardware_version[] __initdata =
38 "z90hardware.o (" VERSION_Z90HARDWARE_C "/" 38 "z90hardware.o (" VERSION_Z90HARDWARE_C "/"
@@ -283,48 +283,6 @@ struct type6_msg {
283 struct CPRB CPRB; 283 struct CPRB CPRB;
284}; 284};
285 285
286union request_msg {
287 union type4_msg t4msg;
288 struct type6_msg t6msg;
289};
290
291struct request_msg_ext {
292 int q_nr;
293 unsigned char *psmid;
294 union request_msg reqMsg;
295};
296
297struct type82_hdr {
298 unsigned char reserved1;
299 unsigned char type;
300 unsigned char reserved2[2];
301 unsigned char reply_code;
302 unsigned char reserved3[3];
303};
304
305#define TYPE82_RSP_CODE 0x82
306
307#define REPLY_ERROR_MACHINE_FAILURE 0x10
308#define REPLY_ERROR_PREEMPT_FAILURE 0x12
309#define REPLY_ERROR_CHECKPT_FAILURE 0x14
310#define REPLY_ERROR_MESSAGE_TYPE 0x20
311#define REPLY_ERROR_INVALID_COMM_CD 0x21
312#define REPLY_ERROR_INVALID_MSG_LEN 0x23
313#define REPLY_ERROR_RESERVD_FIELD 0x24
314#define REPLY_ERROR_FORMAT_FIELD 0x29
315#define REPLY_ERROR_INVALID_COMMAND 0x30
316#define REPLY_ERROR_MALFORMED_MSG 0x40
317#define REPLY_ERROR_RESERVED_FIELDO 0x50
318#define REPLY_ERROR_WORD_ALIGNMENT 0x60
319#define REPLY_ERROR_MESSAGE_LENGTH 0x80
320#define REPLY_ERROR_OPERAND_INVALID 0x82
321#define REPLY_ERROR_OPERAND_SIZE 0x84
322#define REPLY_ERROR_EVEN_MOD_IN_OPND 0x85
323#define REPLY_ERROR_RESERVED_FIELD 0x88
324#define REPLY_ERROR_TRANSPORT_FAIL 0x90
325#define REPLY_ERROR_PACKET_TRUNCATED 0xA0
326#define REPLY_ERROR_ZERO_BUFFER_LEN 0xB0
327
328struct type86_hdr { 286struct type86_hdr {
329 unsigned char reserved1; 287 unsigned char reserved1;
330 unsigned char type; 288 unsigned char type;
@@ -338,7 +296,7 @@ struct type86_hdr {
338#define TYPE86_FMT2 0x02 296#define TYPE86_FMT2 0x02
339 297
340struct type86_fmt2_msg { 298struct type86_fmt2_msg {
341 struct type86_hdr hdr; 299 struct type86_hdr header;
342 unsigned char reserved[4]; 300 unsigned char reserved[4];
343 unsigned char apfs[4]; 301 unsigned char apfs[4];
344 unsigned int count1; 302 unsigned int count1;
@@ -538,6 +496,8 @@ static struct function_and_rules_block static_pke_function_and_rulesX = {
538 {'M','R','P',' ',' ',' ',' ',' '} 496 {'M','R','P',' ',' ',' ',' ',' '}
539}; 497};
540 498
499static unsigned char static_PKE_function_code[2] = {0x50, 0x4B};
500
541struct T6_keyBlock_hdrX { 501struct T6_keyBlock_hdrX {
542 unsigned short blen; 502 unsigned short blen;
543 unsigned short ulen; 503 unsigned short ulen;
@@ -688,9 +648,38 @@ static struct cca_public_sec static_cca_pub_sec = {
688#define RESPONSE_CPRB_SIZE 0x000006B8 648#define RESPONSE_CPRB_SIZE 0x000006B8
689#define RESPONSE_CPRBX_SIZE 0x00000724 649#define RESPONSE_CPRBX_SIZE 0x00000724
690 650
691#define CALLER_HEADER 12 651struct error_hdr {
652 unsigned char reserved1;
653 unsigned char type;
654 unsigned char reserved2[2];
655 unsigned char reply_code;
656 unsigned char reserved3[3];
657};
692 658
693static unsigned char static_PKE_function_code[2] = {0x50, 0x4B}; 659#define TYPE82_RSP_CODE 0x82
660
661#define REP82_ERROR_MACHINE_FAILURE 0x10
662#define REP82_ERROR_PREEMPT_FAILURE 0x12
663#define REP82_ERROR_CHECKPT_FAILURE 0x14
664#define REP82_ERROR_MESSAGE_TYPE 0x20
665#define REP82_ERROR_INVALID_COMM_CD 0x21
666#define REP82_ERROR_INVALID_MSG_LEN 0x23
667#define REP82_ERROR_RESERVD_FIELD 0x24
668#define REP82_ERROR_FORMAT_FIELD 0x29
669#define REP82_ERROR_INVALID_COMMAND 0x30
670#define REP82_ERROR_MALFORMED_MSG 0x40
671#define REP82_ERROR_RESERVED_FIELDO 0x50
672#define REP82_ERROR_WORD_ALIGNMENT 0x60
673#define REP82_ERROR_MESSAGE_LENGTH 0x80
674#define REP82_ERROR_OPERAND_INVALID 0x82
675#define REP82_ERROR_OPERAND_SIZE 0x84
676#define REP82_ERROR_EVEN_MOD_IN_OPND 0x85
677#define REP82_ERROR_RESERVED_FIELD 0x88
678#define REP82_ERROR_TRANSPORT_FAIL 0x90
679#define REP82_ERROR_PACKET_TRUNCATED 0xA0
680#define REP82_ERROR_ZERO_BUFFER_LEN 0xB0
681
682#define CALLER_HEADER 12
694 683
695static inline int 684static inline int
696testq(int q_nr, int *q_depth, int *dev_type, struct ap_status_word *stat) 685testq(int q_nr, int *q_depth, int *dev_type, struct ap_status_word *stat)
@@ -1212,9 +1201,9 @@ send_to_AP(int dev_nr, int cdx, int msg_len, unsigned char *msg_ext)
1212 struct ap_status_word stat_word; 1201 struct ap_status_word stat_word;
1213 enum devstat stat; 1202 enum devstat stat;
1214 int ccode; 1203 int ccode;
1204 u32 *q_nr_p = (u32 *)msg_ext;
1215 1205
1216 ((struct request_msg_ext *) msg_ext)->q_nr = 1206 *q_nr_p = (dev_nr << SKIP_BITL) + cdx;
1217 (dev_nr << SKIP_BITL) + cdx;
1218 PDEBUG("msg_len passed to sen: %d\n", msg_len); 1207 PDEBUG("msg_len passed to sen: %d\n", msg_len);
1219 PDEBUG("q number passed to sen: %02x%02x%02x%02x\n", 1208 PDEBUG("q number passed to sen: %02x%02x%02x%02x\n",
1220 msg_ext[0], msg_ext[1], msg_ext[2], msg_ext[3]); 1209 msg_ext[0], msg_ext[1], msg_ext[2], msg_ext[3]);
@@ -2104,7 +2093,7 @@ convert_response(unsigned char *response, unsigned char *buffer,
2104 int *respbufflen_p, unsigned char *resp_buff) 2093 int *respbufflen_p, unsigned char *resp_buff)
2105{ 2094{
2106 struct ica_rsa_modexpo *icaMsg_p = (struct ica_rsa_modexpo *) buffer; 2095 struct ica_rsa_modexpo *icaMsg_p = (struct ica_rsa_modexpo *) buffer;
2107 struct type82_hdr *t82h_p = (struct type82_hdr *) response; 2096 struct error_hdr *errh_p = (struct error_hdr *) response;
2108 struct type84_hdr *t84h_p = (struct type84_hdr *) response; 2097 struct type84_hdr *t84h_p = (struct type84_hdr *) response;
2109 struct type86_fmt2_msg *t86m_p = (struct type86_fmt2_msg *) response; 2098 struct type86_fmt2_msg *t86m_p = (struct type86_fmt2_msg *) response;
2110 int reply_code, service_rc, service_rs, src_l; 2099 int reply_code, service_rc, service_rs, src_l;
@@ -2117,12 +2106,13 @@ convert_response(unsigned char *response, unsigned char *buffer,
2117 service_rc = 0; 2106 service_rc = 0;
2118 service_rs = 0; 2107 service_rs = 0;
2119 src_l = 0; 2108 src_l = 0;
2120 switch (t82h_p->type) { 2109 switch (errh_p->type) {
2121 case TYPE82_RSP_CODE: 2110 case TYPE82_RSP_CODE:
2122 reply_code = t82h_p->reply_code; 2111 reply_code = errh_p->reply_code;
2123 src_p = (unsigned char *)t82h_p; 2112 src_p = (unsigned char *)errh_p;
2124 PRINTK("Hardware error: Type 82 Message Header: " 2113 PRINTK("Hardware error: Type %02X Message Header: "
2125 "%02x%02x%02x%02x%02x%02x%02x%02x\n", 2114 "%02x%02x%02x%02x%02x%02x%02x%02x\n",
2115 errh_p->type,
2126 src_p[0], src_p[1], src_p[2], src_p[3], 2116 src_p[0], src_p[1], src_p[2], src_p[3],
2127 src_p[4], src_p[5], src_p[6], src_p[7]); 2117 src_p[4], src_p[5], src_p[6], src_p[7]);
2128 break; 2118 break;
@@ -2131,7 +2121,7 @@ convert_response(unsigned char *response, unsigned char *buffer,
2131 src_p = response + (int)t84h_p->len - src_l; 2121 src_p = response + (int)t84h_p->len - src_l;
2132 break; 2122 break;
2133 case TYPE86_RSP_CODE: 2123 case TYPE86_RSP_CODE:
2134 reply_code = t86m_p->hdr.reply_code; 2124 reply_code = t86m_p->header.reply_code;
2135 if (reply_code != 0) 2125 if (reply_code != 0)
2136 break; 2126 break;
2137 cprb_p = (struct CPRB *) 2127 cprb_p = (struct CPRB *)
@@ -2143,6 +2133,9 @@ convert_response(unsigned char *response, unsigned char *buffer,
2143 le2toI(cprb_p->ccp_rscode, &service_rs); 2133 le2toI(cprb_p->ccp_rscode, &service_rs);
2144 if ((service_rc == 8) && (service_rs == 66)) 2134 if ((service_rc == 8) && (service_rs == 66))
2145 PDEBUG("Bad block format on PCICC\n"); 2135 PDEBUG("Bad block format on PCICC\n");
2136 else if ((service_rc == 8) && (service_rs == 65))
2137 PDEBUG("Probably an even modulus on "
2138 "PCICC\n");
2146 else if ((service_rc == 8) && (service_rs == 770)) { 2139 else if ((service_rc == 8) && (service_rs == 770)) {
2147 PDEBUG("Invalid key length on PCICC\n"); 2140 PDEBUG("Invalid key length on PCICC\n");
2148 unset_ext_bitlens(); 2141 unset_ext_bitlens();
@@ -2155,7 +2148,7 @@ convert_response(unsigned char *response, unsigned char *buffer,
2155 return REC_USE_PCICA; 2148 return REC_USE_PCICA;
2156 } 2149 }
2157 else 2150 else
2158 PRINTK("service rc/rs: %d/%d\n", 2151 PRINTK("service rc/rs (PCICC): %d/%d\n",
2159 service_rc, service_rs); 2152 service_rc, service_rs);
2160 return REC_OPERAND_INV; 2153 return REC_OPERAND_INV;
2161 } 2154 }
@@ -2169,7 +2162,10 @@ convert_response(unsigned char *response, unsigned char *buffer,
2169 if (service_rc != 0) { 2162 if (service_rc != 0) {
2170 service_rs = (int) cprbx_p->ccp_rscode; 2163 service_rs = (int) cprbx_p->ccp_rscode;
2171 if ((service_rc == 8) && (service_rs == 66)) 2164 if ((service_rc == 8) && (service_rs == 66))
2172 PDEBUG("Bad block format on PCXICC\n"); 2165 PDEBUG("Bad block format on PCIXCC\n");
2166 else if ((service_rc == 8) && (service_rs == 65))
2167 PDEBUG("Probably an even modulus on "
2168 "PCIXCC\n");
2173 else if ((service_rc == 8) && (service_rs == 770)) { 2169 else if ((service_rc == 8) && (service_rs == 770)) {
2174 PDEBUG("Invalid key length on PCIXCC\n"); 2170 PDEBUG("Invalid key length on PCIXCC\n");
2175 unset_ext_bitlens(); 2171 unset_ext_bitlens();
@@ -2182,7 +2178,7 @@ convert_response(unsigned char *response, unsigned char *buffer,
2182 return REC_USE_PCICA; 2178 return REC_USE_PCICA;
2183 } 2179 }
2184 else 2180 else
2185 PRINTK("service rc/rs: %d/%d\n", 2181 PRINTK("service rc/rs (PCIXCC): %d/%d\n",
2186 service_rc, service_rs); 2182 service_rc, service_rs);
2187 return REC_OPERAND_INV; 2183 return REC_OPERAND_INV;
2188 } 2184 }
@@ -2195,20 +2191,25 @@ convert_response(unsigned char *response, unsigned char *buffer,
2195 } 2191 }
2196 break; 2192 break;
2197 default: 2193 default:
2194 src_p = (unsigned char *)errh_p;
2195 PRINTK("Unrecognized Message Header: "
2196 "%02x%02x%02x%02x%02x%02x%02x%02x\n",
2197 src_p[0], src_p[1], src_p[2], src_p[3],
2198 src_p[4], src_p[5], src_p[6], src_p[7]);
2198 return REC_BAD_MESSAGE; 2199 return REC_BAD_MESSAGE;
2199 } 2200 }
2200 2201
2201 if (reply_code) 2202 if (reply_code)
2202 switch (reply_code) { 2203 switch (reply_code) {
2203 case REPLY_ERROR_OPERAND_INVALID: 2204 case REP82_ERROR_OPERAND_INVALID:
2204 return REC_OPERAND_INV; 2205 return REC_OPERAND_INV;
2205 case REPLY_ERROR_OPERAND_SIZE: 2206 case REP82_ERROR_OPERAND_SIZE:
2206 return REC_OPERAND_SIZE; 2207 return REC_OPERAND_SIZE;
2207 case REPLY_ERROR_EVEN_MOD_IN_OPND: 2208 case REP82_ERROR_EVEN_MOD_IN_OPND:
2208 return REC_EVEN_MOD; 2209 return REC_EVEN_MOD;
2209 case REPLY_ERROR_MESSAGE_TYPE: 2210 case REP82_ERROR_MESSAGE_TYPE:
2210 return WRONG_DEVICE_TYPE; 2211 return WRONG_DEVICE_TYPE;
2211 case REPLY_ERROR_TRANSPORT_FAIL: 2212 case REP82_ERROR_TRANSPORT_FAIL:
2212 PRINTKW("Transport failed (APFS = %02X%02X%02X%02X)\n", 2213 PRINTKW("Transport failed (APFS = %02X%02X%02X%02X)\n",
2213 t86m_p->apfs[0], t86m_p->apfs[1], 2214 t86m_p->apfs[0], t86m_p->apfs[1],
2214 t86m_p->apfs[2], t86m_p->apfs[3]); 2215 t86m_p->apfs[2], t86m_p->apfs[3]);
@@ -2229,7 +2230,7 @@ convert_response(unsigned char *response, unsigned char *buffer,
2229 PDEBUG("Length returned = %d\n", src_l); 2230 PDEBUG("Length returned = %d\n", src_l);
2230 tgt_p = resp_buff + icaMsg_p->outputdatalength - src_l; 2231 tgt_p = resp_buff + icaMsg_p->outputdatalength - src_l;
2231 memcpy(tgt_p, src_p, src_l); 2232 memcpy(tgt_p, src_p, src_l);
2232 if ((t82h_p->type == TYPE86_RSP_CODE) && (resp_buff < tgt_p)) { 2233 if ((errh_p->type == TYPE86_RSP_CODE) && (resp_buff < tgt_p)) {
2233 memset(resp_buff, 0, icaMsg_p->outputdatalength - src_l); 2234 memset(resp_buff, 0, icaMsg_p->outputdatalength - src_l);
2234 if (pad_msg(resp_buff, icaMsg_p->outputdatalength, src_l)) 2235 if (pad_msg(resp_buff, icaMsg_p->outputdatalength, src_l))
2235 return REC_INVALID_PAD; 2236 return REC_INVALID_PAD;
diff --git a/drivers/s390/crypto/z90main.c b/drivers/s390/crypto/z90main.c
index 9ec29bb41b28..6aeef3bacc33 100644
--- a/drivers/s390/crypto/z90main.c
+++ b/drivers/s390/crypto/z90main.c
@@ -31,6 +31,7 @@
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/interrupt.h> // for tasklets 32#include <linux/interrupt.h> // for tasklets
33#include <linux/ioctl32.h> 33#include <linux/ioctl32.h>
34#include <linux/miscdevice.h>
34#include <linux/module.h> 35#include <linux/module.h>
35#include <linux/moduleparam.h> 36#include <linux/moduleparam.h>
36#include <linux/kobject_uevent.h> 37#include <linux/kobject_uevent.h>
@@ -39,19 +40,8 @@
39#include <linux/version.h> 40#include <linux/version.h>
40#include "z90crypt.h" 41#include "z90crypt.h"
41#include "z90common.h" 42#include "z90common.h"
42#ifndef Z90CRYPT_USE_HOTPLUG
43#include <linux/miscdevice.h>
44#endif
45
46#define VERSION_CODE(vers, rel, seq) (((vers)<<16) | ((rel)<<8) | (seq))
47#if LINUX_VERSION_CODE < VERSION_CODE(2,4,0) /* version < 2.4 */
48# error "This kernel is too old: not supported"
49#endif
50#if LINUX_VERSION_CODE > VERSION_CODE(2,7,0) /* version > 2.6 */
51# error "This kernel is too recent: not supported by this file"
52#endif
53 43
54#define VERSION_Z90MAIN_C "$Revision: 1.57 $" 44#define VERSION_Z90MAIN_C "$Revision: 1.62 $"
55 45
56static char z90main_version[] __initdata = 46static char z90main_version[] __initdata =
57 "z90main.o (" VERSION_Z90MAIN_C "/" 47 "z90main.o (" VERSION_Z90MAIN_C "/"
@@ -63,21 +53,12 @@ extern char z90hardware_version[];
63 * Defaults that may be modified. 53 * Defaults that may be modified.
64 */ 54 */
65 55
66#ifndef Z90CRYPT_USE_HOTPLUG
67/** 56/**
68 * You can specify a different minor at compile time. 57 * You can specify a different minor at compile time.
69 */ 58 */
70#ifndef Z90CRYPT_MINOR 59#ifndef Z90CRYPT_MINOR
71#define Z90CRYPT_MINOR MISC_DYNAMIC_MINOR 60#define Z90CRYPT_MINOR MISC_DYNAMIC_MINOR
72#endif 61#endif
73#else
74/**
75 * You can specify a different major at compile time.
76 */
77#ifndef Z90CRYPT_MAJOR
78#define Z90CRYPT_MAJOR 0
79#endif
80#endif
81 62
82/** 63/**
83 * You can specify a different domain at compile time or on the insmod 64 * You can specify a different domain at compile time or on the insmod
@@ -97,7 +78,7 @@ extern char z90hardware_version[];
97 * older than CLEANUPTIME seconds in the past. 78 * older than CLEANUPTIME seconds in the past.
98 */ 79 */
99#ifndef CLEANUPTIME 80#ifndef CLEANUPTIME
100#define CLEANUPTIME 20 81#define CLEANUPTIME 15
101#endif 82#endif
102 83
103/** 84/**
@@ -298,6 +279,10 @@ struct z90crypt {
298 * it contains the request; at READ, the response. The function 279 * it contains the request; at READ, the response. The function
299 * send_to_crypto_device converts the request to device-dependent 280 * send_to_crypto_device converts the request to device-dependent
300 * form and use the caller's OPEN-allocated buffer for the response. 281 * form and use the caller's OPEN-allocated buffer for the response.
282 *
283 * For the contents of caller_dev_dep_req and caller_dev_dep_req_p
284 * because that points to it, see the discussion in z90hardware.c.
285 * Search for "extended request message block".
301 */ 286 */
302struct caller { 287struct caller {
303 int caller_buf_l; // length of original request 288 int caller_buf_l; // length of original request
@@ -398,24 +383,9 @@ static int z90crypt_status_write(struct file *, const char __user *,
398 unsigned long, void *); 383 unsigned long, void *);
399 384
400/** 385/**
401 * Hotplug support
402 */
403
404#ifdef Z90CRYPT_USE_HOTPLUG
405#define Z90CRYPT_HOTPLUG_ADD 1
406#define Z90CRYPT_HOTPLUG_REMOVE 2
407
408static void z90crypt_hotplug_event(int, int, int);
409#endif
410
411/**
412 * Storage allocated at initialization and used throughout the life of 386 * Storage allocated at initialization and used throughout the life of
413 * this insmod 387 * this insmod
414 */ 388 */
415#ifdef Z90CRYPT_USE_HOTPLUG
416static int z90crypt_major = Z90CRYPT_MAJOR;
417#endif
418
419static int domain = DOMAIN_INDEX; 389static int domain = DOMAIN_INDEX;
420static struct z90crypt z90crypt; 390static struct z90crypt z90crypt;
421static int quiesce_z90crypt; 391static int quiesce_z90crypt;
@@ -444,14 +414,12 @@ static struct file_operations z90crypt_fops = {
444 .release = z90crypt_release 414 .release = z90crypt_release
445}; 415};
446 416
447#ifndef Z90CRYPT_USE_HOTPLUG
448static struct miscdevice z90crypt_misc_device = { 417static struct miscdevice z90crypt_misc_device = {
449 .minor = Z90CRYPT_MINOR, 418 .minor = Z90CRYPT_MINOR,
450 .name = DEV_NAME, 419 .name = DEV_NAME,
451 .fops = &z90crypt_fops, 420 .fops = &z90crypt_fops,
452 .devfs_name = DEV_NAME 421 .devfs_name = DEV_NAME
453}; 422};
454#endif
455 423
456/** 424/**
457 * Documentation values. 425 * Documentation values.
@@ -603,7 +571,6 @@ z90crypt_init_module(void)
603 return -EINVAL; 571 return -EINVAL;
604 } 572 }
605 573
606#ifndef Z90CRYPT_USE_HOTPLUG
607 /* Register as misc device with given minor (or get a dynamic one). */ 574 /* Register as misc device with given minor (or get a dynamic one). */
608 result = misc_register(&z90crypt_misc_device); 575 result = misc_register(&z90crypt_misc_device);
609 if (result < 0) { 576 if (result < 0) {
@@ -611,18 +578,6 @@ z90crypt_init_module(void)
611 z90crypt_misc_device.minor, result); 578 z90crypt_misc_device.minor, result);
612 return result; 579 return result;
613 } 580 }
614#else
615 /* Register the major (or get a dynamic one). */
616 result = register_chrdev(z90crypt_major, REG_NAME, &z90crypt_fops);
617 if (result < 0) {
618 PRINTKW("register_chrdev (major %d) failed with %d.\n",
619 z90crypt_major, result);
620 return result;
621 }
622
623 if (z90crypt_major == 0)
624 z90crypt_major = result;
625#endif
626 581
627 PDEBUG("Registered " DEV_NAME " with result %d\n", result); 582 PDEBUG("Registered " DEV_NAME " with result %d\n", result);
628 583
@@ -645,11 +600,6 @@ z90crypt_init_module(void)
645 } else 600 } else
646 PRINTK("No devices at startup\n"); 601 PRINTK("No devices at startup\n");
647 602
648#ifdef Z90CRYPT_USE_HOTPLUG
649 /* generate hotplug event for device node generation */
650 z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_ADD);
651#endif
652
653 /* Initialize globals. */ 603 /* Initialize globals. */
654 spin_lock_init(&queuespinlock); 604 spin_lock_init(&queuespinlock);
655 605
@@ -701,17 +651,10 @@ z90crypt_init_module(void)
701 return 0; // success 651 return 0; // success
702 652
703init_module_cleanup: 653init_module_cleanup:
704#ifndef Z90CRYPT_USE_HOTPLUG
705 if ((nresult = misc_deregister(&z90crypt_misc_device))) 654 if ((nresult = misc_deregister(&z90crypt_misc_device)))
706 PRINTK("misc_deregister failed with %d.\n", nresult); 655 PRINTK("misc_deregister failed with %d.\n", nresult);
707 else 656 else
708 PDEBUG("misc_deregister successful.\n"); 657 PDEBUG("misc_deregister successful.\n");
709#else
710 if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME)))
711 PRINTK("unregister_chrdev failed with %d.\n", nresult);
712 else
713 PDEBUG("unregister_chrdev successful.\n");
714#endif
715 658
716 return result; // failure 659 return result; // failure
717} 660}
@@ -728,19 +671,10 @@ z90crypt_cleanup_module(void)
728 671
729 remove_proc_entry("driver/z90crypt", 0); 672 remove_proc_entry("driver/z90crypt", 0);
730 673
731#ifndef Z90CRYPT_USE_HOTPLUG
732 if ((nresult = misc_deregister(&z90crypt_misc_device))) 674 if ((nresult = misc_deregister(&z90crypt_misc_device)))
733 PRINTK("misc_deregister failed with %d.\n", nresult); 675 PRINTK("misc_deregister failed with %d.\n", nresult);
734 else 676 else
735 PDEBUG("misc_deregister successful.\n"); 677 PDEBUG("misc_deregister successful.\n");
736#else
737 z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_REMOVE);
738
739 if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME)))
740 PRINTK("unregister_chrdev failed with %d.\n", nresult);
741 else
742 PDEBUG("unregister_chrdev successful.\n");
743#endif
744 678
745 /* Remove the tasks */ 679 /* Remove the tasks */
746 tasklet_kill(&reader_tasklet); 680 tasklet_kill(&reader_tasklet);
@@ -748,6 +682,9 @@ z90crypt_cleanup_module(void)
748 del_timer(&config_timer); 682 del_timer(&config_timer);
749 del_timer(&cleanup_timer); 683 del_timer(&cleanup_timer);
750 684
685 if (z90_device_work)
686 destroy_workqueue(z90_device_work);
687
751 destroy_z90crypt(); 688 destroy_z90crypt();
752 689
753 PRINTKN("Unloaded.\n"); 690 PRINTKN("Unloaded.\n");
@@ -766,8 +703,6 @@ z90crypt_cleanup_module(void)
766 * z90crypt_status_write 703 * z90crypt_status_write
767 * disable_card 704 * disable_card
768 * enable_card 705 * enable_card
769 * scan_char
770 * scan_string
771 * 706 *
772 * Helper functions: 707 * Helper functions:
773 * z90crypt_rsa 708 * z90crypt_rsa
@@ -1057,9 +992,10 @@ remove_device(struct device *device_p)
1057 * The MCL must be applied and the newer bitlengths enabled for these to work. 992 * The MCL must be applied and the newer bitlengths enabled for these to work.
1058 * 993 *
1059 * Card Type Old limit New limit 994 * Card Type Old limit New limit
995 * PCICA ??-2048 same (the lower limit is less than 128 bit...)
1060 * PCICC 512-1024 512-2048 996 * PCICC 512-1024 512-2048
1061 * PCIXCC_MCL2 512-2048 no change (applying this MCL == card is MCL3+) 997 * PCIXCC_MCL2 512-2048 ----- (applying any GA LIC will make an MCL3 card)
1062 * PCIXCC_MCL3 512-2048 128-2048 998 * PCIXCC_MCL3 ----- 128-2048
1063 * CEX2C 512-2048 128-2048 999 * CEX2C 512-2048 128-2048
1064 * 1000 *
1065 * ext_bitlens (extended bitlengths) is a global, since you should not apply an 1001 * ext_bitlens (extended bitlengths) is a global, since you should not apply an
@@ -1104,7 +1040,7 @@ select_device_type(int *dev_type_p, int bytelength)
1104 if (PCICA_avail || PCIXCC_MCL3_avail || CEX2C_avail) { 1040 if (PCICA_avail || PCIXCC_MCL3_avail || CEX2C_avail) {
1105 /** 1041 /**
1106 * bitlength is a factor, PCICA is the most capable, even with 1042 * bitlength is a factor, PCICA is the most capable, even with
1107 * the new MCL. 1043 * the new MCL for PCIXCC.
1108 */ 1044 */
1109 if ((bytelength < PCIXCC_MIN_MOD_SIZE) || 1045 if ((bytelength < PCIXCC_MIN_MOD_SIZE) ||
1110 (!ext_bitlens && (bytelength < OLD_PCIXCC_MIN_MOD_SIZE))) { 1046 (!ext_bitlens && (bytelength < OLD_PCIXCC_MIN_MOD_SIZE))) {
@@ -2144,73 +2080,15 @@ enable_card(int card_index)
2144 z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count--; 2080 z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count--;
2145} 2081}
2146 2082
2147static inline int
2148scan_char(unsigned char *bf, unsigned int len,
2149 unsigned int *offs, unsigned int *p_eof, unsigned char c)
2150{
2151 unsigned int i, found;
2152
2153 found = 0;
2154 for (i = 0; i < len; i++) {
2155 if (bf[i] == c) {
2156 found = 1;
2157 break;
2158 }
2159 if (bf[i] == '\0') {
2160 *p_eof = 1;
2161 break;
2162 }
2163 if (bf[i] == '\n') {
2164 break;
2165 }
2166 }
2167 *offs = i+1;
2168 return found;
2169}
2170
2171static inline int
2172scan_string(unsigned char *bf, unsigned int len,
2173 unsigned int *offs, unsigned int *p_eof, unsigned char *s)
2174{
2175 unsigned int temp_len, temp_offs, found, eof;
2176
2177 temp_len = temp_offs = found = eof = 0;
2178 while (!eof && !found) {
2179 found = scan_char(bf+temp_len, len-temp_len,
2180 &temp_offs, &eof, *s);
2181
2182 temp_len += temp_offs;
2183 if (eof) {
2184 found = 0;
2185 break;
2186 }
2187
2188 if (found) {
2189 if (len >= temp_offs+strlen(s)) {
2190 found = !strncmp(bf+temp_len-1, s, strlen(s));
2191 if (found) {
2192 *offs = temp_len+strlen(s)-1;
2193 break;
2194 }
2195 } else {
2196 found = 0;
2197 *p_eof = 1;
2198 break;
2199 }
2200 }
2201 }
2202 return found;
2203}
2204
2205static int 2083static int
2206z90crypt_status_write(struct file *file, const char __user *buffer, 2084z90crypt_status_write(struct file *file, const char __user *buffer,
2207 unsigned long count, void *data) 2085 unsigned long count, void *data)
2208{ 2086{
2209 int i, j, len, offs, found, eof; 2087 int j, eol;
2210 unsigned char *lbuf; 2088 unsigned char *lbuf, *ptr;
2211 unsigned int local_count; 2089 unsigned int local_count;
2212 2090
2213#define LBUFSIZE 600 2091#define LBUFSIZE 1200
2214 lbuf = kmalloc(LBUFSIZE, GFP_KERNEL); 2092 lbuf = kmalloc(LBUFSIZE, GFP_KERNEL);
2215 if (!lbuf) { 2093 if (!lbuf) {
2216 PRINTK("kmalloc failed!\n"); 2094 PRINTK("kmalloc failed!\n");
@@ -2227,49 +2105,46 @@ z90crypt_status_write(struct file *file, const char __user *buffer,
2227 return -EFAULT; 2105 return -EFAULT;
2228 } 2106 }
2229 2107
2230 lbuf[local_count-1] = '\0'; 2108 lbuf[local_count] = '\0';
2231 2109
2232 len = 0; 2110 ptr = strstr(lbuf, "Online devices");
2233 eof = 0; 2111 if (ptr == 0) {
2234 found = 0; 2112 PRINTK("Unable to parse data (missing \"Online devices\")\n");
2235 while (!eof) { 2113 kfree(lbuf);
2236 found = scan_string(lbuf+len, local_count-len, &offs, &eof, 2114 return count;
2237 "Online devices");
2238 len += offs;
2239 if (found == 1)
2240 break;
2241 } 2115 }
2242 2116
2243 if (eof) { 2117 ptr = strstr(ptr, "\n");
2118 if (ptr == 0) {
2119 PRINTK("Unable to parse data (missing newline after \"Online devices\")\n");
2244 kfree(lbuf); 2120 kfree(lbuf);
2245 return count; 2121 return count;
2246 } 2122 }
2123 ptr++;
2247 2124
2248 if (found) 2125 if (strstr(ptr, "Waiting work element counts") == NULL) {
2249 found = scan_char(lbuf+len, local_count-len, &offs, &eof, '\n'); 2126 PRINTK("Unable to parse data (missing \"Waiting work element counts\")\n");
2250
2251 if (!found || eof) {
2252 kfree(lbuf); 2127 kfree(lbuf);
2253 return count; 2128 return count;
2254 } 2129 }
2255 2130
2256 len += offs;
2257 j = 0; 2131 j = 0;
2258 for (i = 0; i < 80; i++) { 2132 eol = 0;
2259 switch (*(lbuf+len+i)) { 2133 while ((j < 64) && (*ptr != '\0')) {
2134 switch (*ptr) {
2260 case '\t': 2135 case '\t':
2261 case ' ': 2136 case ' ':
2262 break; 2137 break;
2263 case '\n': 2138 case '\n':
2264 default: 2139 default:
2265 eof = 1; 2140 eol = 1;
2266 break; 2141 break;
2267 case '0': 2142 case '0': // no device
2268 case '1': 2143 case '1': // PCICA
2269 case '2': 2144 case '2': // PCICC
2270 case '3': 2145 case '3': // PCIXCC_MCL2
2271 case '4': 2146 case '4': // PCIXCC_MCL3
2272 case '5': 2147 case '5': // CEX2C
2273 j++; 2148 j++;
2274 break; 2149 break;
2275 case 'd': 2150 case 'd':
@@ -2283,8 +2158,9 @@ z90crypt_status_write(struct file *file, const char __user *buffer,
2283 j++; 2158 j++;
2284 break; 2159 break;
2285 } 2160 }
2286 if (eof) 2161 if (eol)
2287 break; 2162 break;
2163 ptr++;
2288 } 2164 }
2289 2165
2290 kfree(lbuf); 2166 kfree(lbuf);
@@ -3479,45 +3355,5 @@ probe_PCIXCC_type(struct device *devPtr)
3479 return rv; 3355 return rv;
3480} 3356}
3481 3357
3482#ifdef Z90CRYPT_USE_HOTPLUG
3483static void
3484z90crypt_hotplug_event(int dev_major, int dev_minor, int action)
3485{
3486#ifdef CONFIG_HOTPLUG
3487 char *argv[3];
3488 char *envp[6];
3489 char major[20];
3490 char minor[20];
3491
3492 sprintf(major, "MAJOR=%d", dev_major);
3493 sprintf(minor, "MINOR=%d", dev_minor);
3494
3495 argv[0] = hotplug_path;
3496 argv[1] = "z90crypt";
3497 argv[2] = 0;
3498
3499 envp[0] = "HOME=/";
3500 envp[1] = "PATH=/sbin:/bin:/usr/sbin:/usr/bin";
3501
3502 switch (action) {
3503 case Z90CRYPT_HOTPLUG_ADD:
3504 envp[2] = "ACTION=add";
3505 break;
3506 case Z90CRYPT_HOTPLUG_REMOVE:
3507 envp[2] = "ACTION=remove";
3508 break;
3509 default:
3510 BUG();
3511 break;
3512 }
3513 envp[3] = major;
3514 envp[4] = minor;
3515 envp[5] = 0;
3516
3517 call_usermodehelper(argv[0], argv, envp, 0);
3518#endif
3519}
3520#endif
3521
3522module_init(z90crypt_init_module); 3358module_init(z90crypt_init_module);
3523module_exit(z90crypt_cleanup_module); 3359module_exit(z90crypt_cleanup_module);
diff --git a/drivers/s390/s390mach.c b/drivers/s390/s390mach.c
index 5bb255e02acc..4191fd9d4d11 100644
--- a/drivers/s390/s390mach.c
+++ b/drivers/s390/s390mach.c
@@ -240,7 +240,7 @@ s390_revalidate_registers(struct mci *mci)
240 * Floating point control register can't be restored. 240 * Floating point control register can't be restored.
241 * Task will be terminated. 241 * Task will be terminated.
242 */ 242 */
243 asm volatile ("lfpc 0(%0)" : : "a" (&zero)); 243 asm volatile ("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
244 kill_task = 1; 244 kill_task = 1;
245 245
246 } 246 }
diff --git a/drivers/sbus/char/Kconfig b/drivers/sbus/char/Kconfig
index a41778a490d6..3a8152906bf6 100644
--- a/drivers/sbus/char/Kconfig
+++ b/drivers/sbus/char/Kconfig
@@ -69,11 +69,40 @@ config SUN_JSFLASH
69 If you say Y here, you will be able to boot from your JavaStation's 69 If you say Y here, you will be able to boot from your JavaStation's
70 Flash memory. 70 Flash memory.
71 71
72# XXX Why don't we do "source drivers/char/Config.in" somewhere? 72config BBC_I2C
73# no shit 73 tristate "UltraSPARC-III bootbus i2c controller driver"
74config RTC 74 depends on PCI && SPARC64
75 tristate "PC-style Real Time Clock Support" 75 help
76 depends on PCI && EXPERIMENTAL && SPARC32 76 The BBC devices on the UltraSPARC III have two I2C controllers. The
77 first I2C controller connects mainly to configuration PROMs (NVRAM,
78 CPU configuration, DIMM types, etc.). The second I2C controller
79 connects to environmental control devices such as fans and
80 temperature sensors. The second controller also connects to the
81 smartcard reader, if present. Say Y to enable support for these.
82
83config ENVCTRL
84 tristate "SUNW, envctrl support"
85 depends on PCI && SPARC64
86 help
87 Kernel support for temperature and fan monitoring on Sun SME
88 machines.
89
90 To compile this driver as a module, choose M here: the
91 module will be called envctrl.
92
93config DISPLAY7SEG
94 tristate "7-Segment Display support"
95 depends on PCI && SPARC64
96 ---help---
97 This is the driver for the 7-segment display and LED present on
98 Sun Microsystems CompactPCI models CP1400 and CP1500.
99
100 To compile this driver as a module, choose M here: the
101 module will be called display7seg.
102
103 If you do not have a CompactPCI model CP1400 or CP1500, or
104 another UltraSPARC-IIi-cEngine boardset with a 7-segment display,
105 you should say N to this option.
77 106
78endmenu 107endmenu
79 108
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 12c208fb18c5..787ad00a2b73 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -250,7 +250,7 @@ config SCSI_DECNCR
250 250
251config SCSI_DECSII 251config SCSI_DECSII
252 tristate "DEC SII Scsi Driver" 252 tristate "DEC SII Scsi Driver"
253 depends on MACH_DECSTATION && SCSI && MIPS32 253 depends on MACH_DECSTATION && SCSI && 32BIT
254 254
255config BLK_DEV_3W_XXXX_RAID 255config BLK_DEV_3W_XXXX_RAID
256 tristate "3ware 5/6/7/8xxx ATA-RAID support" 256 tristate "3ware 5/6/7/8xxx ATA-RAID support"
diff --git a/drivers/scsi/mesh.c b/drivers/scsi/mesh.c
index ff1933298da6..a4857db4f9b8 100644
--- a/drivers/scsi/mesh.c
+++ b/drivers/scsi/mesh.c
@@ -1766,7 +1766,7 @@ static int mesh_suspend(struct macio_dev *mdev, pm_message_t state)
1766 struct mesh_state *ms = (struct mesh_state *)macio_get_drvdata(mdev); 1766 struct mesh_state *ms = (struct mesh_state *)macio_get_drvdata(mdev);
1767 unsigned long flags; 1767 unsigned long flags;
1768 1768
1769 if (state == mdev->ofdev.dev.power.power_state || state < 2) 1769 if (state.event == mdev->ofdev.dev.power.power_state.event || state.event < 2)
1770 return 0; 1770 return 0;
1771 1771
1772 scsi_block_requests(ms->host); 1772 scsi_block_requests(ms->host);
@@ -1791,7 +1791,7 @@ static int mesh_resume(struct macio_dev *mdev)
1791 struct mesh_state *ms = (struct mesh_state *)macio_get_drvdata(mdev); 1791 struct mesh_state *ms = (struct mesh_state *)macio_get_drvdata(mdev);
1792 unsigned long flags; 1792 unsigned long flags;
1793 1793
1794 if (mdev->ofdev.dev.power.power_state == 0) 1794 if (mdev->ofdev.dev.power.power_state.event == PM_EVENT_ON)
1795 return 0; 1795 return 0;
1796 1796
1797 set_mesh_power(ms, 1); 1797 set_mesh_power(ms, 1);
@@ -1802,7 +1802,7 @@ static int mesh_resume(struct macio_dev *mdev)
1802 enable_irq(ms->meshintr); 1802 enable_irq(ms->meshintr);
1803 scsi_unblock_requests(ms->host); 1803 scsi_unblock_requests(ms->host);
1804 1804
1805 mdev->ofdev.dev.power.power_state = 0; 1805 mdev->ofdev.dev.power.power_state.event = PM_EVENT_ON;
1806 1806
1807 return 0; 1807 return 0;
1808} 1808}
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 0b10169961eb..aec39fb261ca 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -58,8 +58,7 @@ static const char serial21285_name[] = "Footbridge UART";
58 * int((BAUD_BASE - (baud >> 1)) / baud) 58 * int((BAUD_BASE - (baud >> 1)) / baud)
59 */ 59 */
60 60
61static void 61static void serial21285_stop_tx(struct uart_port *port)
62serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop)
63{ 62{
64 if (tx_enabled(port)) { 63 if (tx_enabled(port)) {
65 disable_irq(IRQ_CONTX); 64 disable_irq(IRQ_CONTX);
@@ -67,8 +66,7 @@ serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop)
67 } 66 }
68} 67}
69 68
70static void 69static void serial21285_start_tx(struct uart_port *port)
71serial21285_start_tx(struct uart_port *port, unsigned int tty_start)
72{ 70{
73 if (!tx_enabled(port)) { 71 if (!tx_enabled(port)) {
74 enable_irq(IRQ_CONTX); 72 enable_irq(IRQ_CONTX);
@@ -148,7 +146,7 @@ static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *r
148 goto out; 146 goto out;
149 } 147 }
150 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 148 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
151 serial21285_stop_tx(port, 0); 149 serial21285_stop_tx(port);
152 goto out; 150 goto out;
153 } 151 }
154 152
@@ -164,7 +162,7 @@ static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *r
164 uart_write_wakeup(port); 162 uart_write_wakeup(port);
165 163
166 if (uart_circ_empty(xmit)) 164 if (uart_circ_empty(xmit))
167 serial21285_stop_tx(port, 0); 165 serial21285_stop_tx(port);
168 166
169 out: 167 out:
170 return IRQ_HANDLED; 168 return IRQ_HANDLED;
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 7e8fc7c1d4cc..30a0a3d10145 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1001,7 +1001,7 @@ static inline void __stop_tx(struct uart_8250_port *p)
1001 } 1001 }
1002} 1002}
1003 1003
1004static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop) 1004static void serial8250_stop_tx(struct uart_port *port)
1005{ 1005{
1006 struct uart_8250_port *up = (struct uart_8250_port *)port; 1006 struct uart_8250_port *up = (struct uart_8250_port *)port;
1007 1007
@@ -1018,7 +1018,7 @@ static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
1018 1018
1019static void transmit_chars(struct uart_8250_port *up); 1019static void transmit_chars(struct uart_8250_port *up);
1020 1020
1021static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start) 1021static void serial8250_start_tx(struct uart_port *port)
1022{ 1022{
1023 struct uart_8250_port *up = (struct uart_8250_port *)port; 1023 struct uart_8250_port *up = (struct uart_8250_port *)port;
1024 1024
@@ -1158,7 +1158,11 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up)
1158 up->port.x_char = 0; 1158 up->port.x_char = 0;
1159 return; 1159 return;
1160 } 1160 }
1161 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 1161 if (uart_tx_stopped(&up->port)) {
1162 serial8250_stop_tx(&up->port);
1163 return;
1164 }
1165 if (uart_circ_empty(xmit)) {
1162 __stop_tx(up); 1166 __stop_tx(up);
1163 return; 1167 return;
1164 } 1168 }
@@ -2586,82 +2590,3 @@ module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
2586MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA"); 2590MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2587#endif 2591#endif
2588MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR); 2592MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
2589
2590/**
2591 * register_serial - configure a 16x50 serial port at runtime
2592 * @req: request structure
2593 *
2594 * Configure the serial port specified by the request. If the
2595 * port exists and is in use an error is returned. If the port
2596 * is not currently in the table it is added.
2597 *
2598 * The port is then probed and if necessary the IRQ is autodetected
2599 * If this fails an error is returned.
2600 *
2601 * On success the port is ready to use and the line number is returned.
2602 *
2603 * Note: this function is deprecated - use serial8250_register_port
2604 * instead.
2605 */
2606int register_serial(struct serial_struct *req)
2607{
2608 struct uart_port port;
2609
2610 port.iobase = req->port;
2611 port.membase = req->iomem_base;
2612 port.irq = req->irq;
2613 port.uartclk = req->baud_base * 16;
2614 port.fifosize = req->xmit_fifo_size;
2615 port.regshift = req->iomem_reg_shift;
2616 port.iotype = req->io_type;
2617 port.flags = req->flags | UPF_BOOT_AUTOCONF;
2618 port.mapbase = req->iomap_base;
2619 port.dev = NULL;
2620
2621 if (share_irqs)
2622 port.flags |= UPF_SHARE_IRQ;
2623
2624 if (HIGH_BITS_OFFSET)
2625 port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET;
2626
2627 /*
2628 * If a clock rate wasn't specified by the low level driver, then
2629 * default to the standard clock rate. This should be 115200 (*16)
2630 * and should not depend on the architecture's BASE_BAUD definition.
2631 * However, since this API will be deprecated, it's probably a
2632 * better idea to convert the drivers to use the new API
2633 * (serial8250_register_port and serial8250_unregister_port).
2634 */
2635 if (port.uartclk == 0) {
2636 printk(KERN_WARNING
2637 "Serial: registering port at [%08x,%08lx,%p] irq %d with zero baud_base\n",
2638 port.iobase, port.mapbase, port.membase, port.irq);
2639 printk(KERN_WARNING "Serial: see %s:%d for more information\n",
2640 __FILE__, __LINE__);
2641 dump_stack();
2642
2643 /*
2644 * Fix it up for now, but this is only a temporary measure.
2645 */
2646 port.uartclk = BASE_BAUD * 16;
2647 }
2648
2649 return serial8250_register_port(&port);
2650}
2651EXPORT_SYMBOL(register_serial);
2652
2653/**
2654 * unregister_serial - remove a 16x50 serial port at runtime
2655 * @line: serial line number
2656 *
2657 * Remove one serial port. This may not be called from interrupt
2658 * context. We hand the port back to our local PM control.
2659 *
2660 * Note: this function is deprecated - use serial8250_unregister_port
2661 * instead.
2662 */
2663void unregister_serial(int line)
2664{
2665 serial8250_unregister_port(line);
2666}
2667EXPORT_SYMBOL(unregister_serial);
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h
index 9225c82faeb8..b1b459efda52 100644
--- a/drivers/serial/8250.h
+++ b/drivers/serial/8250.h
@@ -16,11 +16,7 @@
16 */ 16 */
17 17
18#include <linux/config.h> 18#include <linux/config.h>
19 19#include <linux/serial_8250.h>
20int serial8250_register_port(struct uart_port *);
21void serial8250_unregister_port(int line);
22void serial8250_suspend_port(int line);
23void serial8250_resume_port(int line);
24 20
25struct old_serial_port { 21struct old_serial_port {
26 unsigned int uart; 22 unsigned int uart;
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index d5797618a3b9..e39818a34a07 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -308,7 +308,7 @@ config SERIAL_S3C2410_CONSOLE
308 308
309config SERIAL_DZ 309config SERIAL_DZ
310 bool "DECstation DZ serial driver" 310 bool "DECstation DZ serial driver"
311 depends on MACH_DECSTATION && MIPS32 311 depends on MACH_DECSTATION && 32BIT
312 select SERIAL_CORE 312 select SERIAL_CORE
313 help 313 help
314 DZ11-family serial controllers for VAXstations, including the 314 DZ11-family serial controllers for VAXstations, including the
@@ -830,7 +830,7 @@ config SERIAL_M32R_PLDSIO
830 830
831config SERIAL_TXX9 831config SERIAL_TXX9
832 bool "TMPTX39XX/49XX SIO support" 832 bool "TMPTX39XX/49XX SIO support"
833 depends HAS_TXX9_SERIAL 833 depends HAS_TXX9_SERIAL && BROKEN
834 select SERIAL_CORE 834 select SERIAL_CORE
835 default y 835 default y
836 836
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 2884b310e54d..978e12437e61 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -105,7 +105,7 @@ struct uart_amba_port {
105 unsigned int old_status; 105 unsigned int old_status;
106}; 106};
107 107
108static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop) 108static void pl010_stop_tx(struct uart_port *port)
109{ 109{
110 unsigned int cr; 110 unsigned int cr;
111 111
@@ -114,7 +114,7 @@ static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop)
114 UART_PUT_CR(port, cr); 114 UART_PUT_CR(port, cr);
115} 115}
116 116
117static void pl010_start_tx(struct uart_port *port, unsigned int tty_start) 117static void pl010_start_tx(struct uart_port *port)
118{ 118{
119 unsigned int cr; 119 unsigned int cr;
120 120
@@ -219,7 +219,7 @@ static void pl010_tx_chars(struct uart_port *port)
219 return; 219 return;
220 } 220 }
221 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 221 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
222 pl010_stop_tx(port, 0); 222 pl010_stop_tx(port);
223 return; 223 return;
224 } 224 }
225 225
@@ -236,7 +236,7 @@ static void pl010_tx_chars(struct uart_port *port)
236 uart_write_wakeup(port); 236 uart_write_wakeup(port);
237 237
238 if (uart_circ_empty(xmit)) 238 if (uart_circ_empty(xmit))
239 pl010_stop_tx(port, 0); 239 pl010_stop_tx(port);
240} 240}
241 241
242static void pl010_modem_status(struct uart_port *port) 242static void pl010_modem_status(struct uart_port *port)
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index 7db88ee18f75..56071309744c 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -74,7 +74,7 @@ struct uart_amba_port {
74 unsigned int old_status; 74 unsigned int old_status;
75}; 75};
76 76
77static void pl011_stop_tx(struct uart_port *port, unsigned int tty_stop) 77static void pl011_stop_tx(struct uart_port *port)
78{ 78{
79 struct uart_amba_port *uap = (struct uart_amba_port *)port; 79 struct uart_amba_port *uap = (struct uart_amba_port *)port;
80 80
@@ -82,7 +82,7 @@ static void pl011_stop_tx(struct uart_port *port, unsigned int tty_stop)
82 writew(uap->im, uap->port.membase + UART011_IMSC); 82 writew(uap->im, uap->port.membase + UART011_IMSC);
83} 83}
84 84
85static void pl011_start_tx(struct uart_port *port, unsigned int tty_start) 85static void pl011_start_tx(struct uart_port *port)
86{ 86{
87 struct uart_amba_port *uap = (struct uart_amba_port *)port; 87 struct uart_amba_port *uap = (struct uart_amba_port *)port;
88 88
@@ -184,7 +184,7 @@ static void pl011_tx_chars(struct uart_amba_port *uap)
184 return; 184 return;
185 } 185 }
186 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { 186 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
187 pl011_stop_tx(&uap->port, 0); 187 pl011_stop_tx(&uap->port);
188 return; 188 return;
189 } 189 }
190 190
@@ -201,7 +201,7 @@ static void pl011_tx_chars(struct uart_amba_port *uap)
201 uart_write_wakeup(&uap->port); 201 uart_write_wakeup(&uap->port);
202 202
203 if (uart_circ_empty(xmit)) 203 if (uart_circ_empty(xmit))
204 pl011_stop_tx(&uap->port, 0); 204 pl011_stop_tx(&uap->port);
205} 205}
206 206
207static void pl011_modem_status(struct uart_amba_port *uap) 207static void pl011_modem_status(struct uart_amba_port *uap)
diff --git a/drivers/serial/au1x00_uart.c b/drivers/serial/au1x00_uart.c
index 6104aeef1243..a274ebf256a1 100644
--- a/drivers/serial/au1x00_uart.c
+++ b/drivers/serial/au1x00_uart.c
@@ -200,7 +200,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
200 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name); 200 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
201} 201}
202 202
203static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop) 203static void serial8250_stop_tx(struct uart_port *port)
204{ 204{
205 struct uart_8250_port *up = (struct uart_8250_port *)port; 205 struct uart_8250_port *up = (struct uart_8250_port *)port;
206 206
@@ -210,7 +210,7 @@ static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
210 } 210 }
211} 211}
212 212
213static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start) 213static void serial8250_start_tx(struct uart_port *port)
214{ 214{
215 struct uart_8250_port *up = (struct uart_8250_port *)port; 215 struct uart_8250_port *up = (struct uart_8250_port *)port;
216 216
@@ -337,7 +337,7 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up)
337 return; 337 return;
338 } 338 }
339 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 339 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
340 serial8250_stop_tx(&up->port, 0); 340 serial8250_stop_tx(&up->port);
341 return; 341 return;
342 } 342 }
343 343
@@ -356,7 +356,7 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up)
356 DEBUG_INTR("THRE..."); 356 DEBUG_INTR("THRE...");
357 357
358 if (uart_circ_empty(xmit)) 358 if (uart_circ_empty(xmit))
359 serial8250_stop_tx(&up->port, 0); 359 serial8250_stop_tx(&up->port);
360} 360}
361 361
362static _INLINE_ void check_modem_status(struct uart_8250_port *up) 362static _INLINE_ void check_modem_status(struct uart_8250_port *up)
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c
index e92522b33c48..d822896b488c 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/serial/clps711x.c
@@ -69,8 +69,7 @@
69 69
70#define tx_enabled(port) ((port)->unused[0]) 70#define tx_enabled(port) ((port)->unused[0])
71 71
72static void 72static void clps711xuart_stop_tx(struct uart_port *port)
73clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop)
74{ 73{
75 if (tx_enabled(port)) { 74 if (tx_enabled(port)) {
76 disable_irq(TX_IRQ(port)); 75 disable_irq(TX_IRQ(port));
@@ -78,8 +77,7 @@ clps711xuart_stop_tx(struct uart_port *port, unsigned int tty_stop)
78 } 77 }
79} 78}
80 79
81static void 80static void clps711xuart_start_tx(struct uart_port *port)
82clps711xuart_start_tx(struct uart_port *port, unsigned int tty_start)
83{ 81{
84 if (!tx_enabled(port)) { 82 if (!tx_enabled(port)) {
85 enable_irq(TX_IRQ(port)); 83 enable_irq(TX_IRQ(port));
@@ -165,7 +163,7 @@ static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *re
165 return IRQ_HANDLED; 163 return IRQ_HANDLED;
166 } 164 }
167 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 165 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
168 clps711xuart_stop_tx(port, 0); 166 clps711xuart_stop_tx(port);
169 return IRQ_HANDLED; 167 return IRQ_HANDLED;
170 } 168 }
171 169
@@ -182,7 +180,7 @@ static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id, struct pt_regs *re
182 uart_write_wakeup(port); 180 uart_write_wakeup(port);
183 181
184 if (uart_circ_empty(xmit)) 182 if (uart_circ_empty(xmit))
185 clps711xuart_stop_tx(port, 0); 183 clps711xuart_stop_tx(port);
186 184
187 return IRQ_HANDLED; 185 return IRQ_HANDLED;
188} 186}
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index d639ac92a117..25825f2aba22 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -124,7 +124,7 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
124/* 124/*
125 * Stop transmitter 125 * Stop transmitter
126 */ 126 */
127static void cpm_uart_stop_tx(struct uart_port *port, unsigned int tty_stop) 127static void cpm_uart_stop_tx(struct uart_port *port)
128{ 128{
129 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; 129 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
130 volatile smc_t *smcp = pinfo->smcp; 130 volatile smc_t *smcp = pinfo->smcp;
@@ -141,7 +141,7 @@ static void cpm_uart_stop_tx(struct uart_port *port, unsigned int tty_stop)
141/* 141/*
142 * Start transmitter 142 * Start transmitter
143 */ 143 */
144static void cpm_uart_start_tx(struct uart_port *port, unsigned int tty_start) 144static void cpm_uart_start_tx(struct uart_port *port)
145{ 145{
146 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; 146 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
147 volatile smc_t *smcp = pinfo->smcp; 147 volatile smc_t *smcp = pinfo->smcp;
@@ -403,10 +403,8 @@ static int cpm_uart_startup(struct uart_port *port)
403 403
404inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo) 404inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
405{ 405{
406 unsigned long target_jiffies = jiffies + pinfo->wait_closing; 406 set_current_state(TASK_UNINTERRUPTIBLE);
407 407 schedule_timeout(pinfo->wait_closing);
408 while (!time_after(jiffies, target_jiffies))
409 schedule();
410} 408}
411 409
412/* 410/*
@@ -425,9 +423,12 @@ static void cpm_uart_shutdown(struct uart_port *port)
425 /* If the port is not the console, disable Rx and Tx. */ 423 /* If the port is not the console, disable Rx and Tx. */
426 if (!(pinfo->flags & FLAG_CONSOLE)) { 424 if (!(pinfo->flags & FLAG_CONSOLE)) {
427 /* Wait for all the BDs marked sent */ 425 /* Wait for all the BDs marked sent */
428 while(!cpm_uart_tx_empty(port)) 426 while(!cpm_uart_tx_empty(port)) {
427 set_current_state(TASK_UNINTERRUPTIBLE);
429 schedule_timeout(2); 428 schedule_timeout(2);
430 if(pinfo->wait_closing) 429 }
430
431 if (pinfo->wait_closing)
431 cpm_uart_wait_until_send(pinfo); 432 cpm_uart_wait_until_send(pinfo);
432 433
433 /* Stop uarts */ 434 /* Stop uarts */
@@ -623,7 +624,7 @@ static int cpm_uart_tx_pump(struct uart_port *port)
623 } 624 }
624 625
625 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 626 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
626 cpm_uart_stop_tx(port, 0); 627 cpm_uart_stop_tx(port);
627 return 0; 628 return 0;
628 } 629 }
629 630
@@ -656,7 +657,7 @@ static int cpm_uart_tx_pump(struct uart_port *port)
656 uart_write_wakeup(port); 657 uart_write_wakeup(port);
657 658
658 if (uart_circ_empty(xmit)) { 659 if (uart_circ_empty(xmit)) {
659 cpm_uart_stop_tx(port, 0); 660 cpm_uart_stop_tx(port);
660 return 0; 661 return 0;
661 } 662 }
662 663
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index c4c8f4b44f53..15ad58d94889 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -142,6 +142,14 @@ void scc2_lineif(struct uart_cpm_port *pinfo)
142 * be supported in a sane fashion. 142 * be supported in a sane fashion.
143 */ 143 */
144#ifndef CONFIG_STX_GP3 144#ifndef CONFIG_STX_GP3
145#ifdef CONFIG_MPC8560_ADS
146 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport;
147 io->iop_ppard |= 0x00000018;
148 io->iop_psord &= ~0x00000008; /* Rx */
149 io->iop_psord &= ~0x00000010; /* Tx */
150 io->iop_pdird &= ~0x00000008; /* Rx */
151 io->iop_pdird |= 0x00000010; /* Tx */
152#else
145 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 153 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport;
146 io->iop_pparb |= 0x008b0000; 154 io->iop_pparb |= 0x008b0000;
147 io->iop_pdirb |= 0x00880000; 155 io->iop_pdirb |= 0x00880000;
@@ -149,6 +157,7 @@ void scc2_lineif(struct uart_cpm_port *pinfo)
149 io->iop_pdirb &= ~0x00030000; 157 io->iop_pdirb &= ~0x00030000;
150 io->iop_psorb &= ~0x00030000; 158 io->iop_psorb &= ~0x00030000;
151#endif 159#endif
160#endif
152 cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; 161 cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff;
153 cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; 162 cpm2_immr->im_cpmux.cmx_scr |= 0x00090000;
154 pinfo->brg = 2; 163 pinfo->brg = 2;
@@ -257,6 +266,7 @@ int cpm_uart_init_portdesc(void)
257 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0]; 266 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0];
258 cpm_uart_ports[UART_SMC1].smcup = 267 cpm_uart_ports[UART_SMC1].smcup =
259 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1]; 268 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1];
269 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
260 cpm_uart_ports[UART_SMC1].port.mapbase = 270 cpm_uart_ports[UART_SMC1].port.mapbase =
261 (unsigned long)&cpm2_immr->im_smc[0]; 271 (unsigned long)&cpm2_immr->im_smc[0];
262 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 272 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
@@ -269,6 +279,7 @@ int cpm_uart_init_portdesc(void)
269 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1]; 279 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1];
270 cpm_uart_ports[UART_SMC2].smcup = 280 cpm_uart_ports[UART_SMC2].smcup =
271 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2]; 281 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2];
282 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;
272 cpm_uart_ports[UART_SMC2].port.mapbase = 283 cpm_uart_ports[UART_SMC2].port.mapbase =
273 (unsigned long)&cpm2_immr->im_smc[1]; 284 (unsigned long)&cpm2_immr->im_smc[1];
274 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 285 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
diff --git a/drivers/serial/crisv10.c b/drivers/serial/crisv10.c
index 23b8871e74cc..5690594b257b 100644
--- a/drivers/serial/crisv10.c
+++ b/drivers/serial/crisv10.c
@@ -5041,17 +5041,3 @@ rs_init(void)
5041/* this makes sure that rs_init is called during kernel boot */ 5041/* this makes sure that rs_init is called during kernel boot */
5042 5042
5043module_init(rs_init); 5043module_init(rs_init);
5044
5045/*
5046 * register_serial and unregister_serial allows for serial ports to be
5047 * configured at run-time, to support PCMCIA modems.
5048 */
5049int
5050register_serial(struct serial_struct *req)
5051{
5052 return -1;
5053}
5054
5055void unregister_serial(int line)
5056{
5057}
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c
index 97824eeeafae..e63b9dffc8d7 100644
--- a/drivers/serial/dz.c
+++ b/drivers/serial/dz.c
@@ -112,7 +112,7 @@ static inline void dz_out(struct dz_port *dport, unsigned offset,
112 * ------------------------------------------------------------ 112 * ------------------------------------------------------------
113 */ 113 */
114 114
115static void dz_stop_tx(struct uart_port *uport, unsigned int tty_stop) 115static void dz_stop_tx(struct uart_port *uport)
116{ 116{
117 struct dz_port *dport = (struct dz_port *)uport; 117 struct dz_port *dport = (struct dz_port *)uport;
118 unsigned short tmp, mask = 1 << dport->port.line; 118 unsigned short tmp, mask = 1 << dport->port.line;
@@ -125,7 +125,7 @@ static void dz_stop_tx(struct uart_port *uport, unsigned int tty_stop)
125 spin_unlock_irqrestore(&dport->port.lock, flags); 125 spin_unlock_irqrestore(&dport->port.lock, flags);
126} 126}
127 127
128static void dz_start_tx(struct uart_port *uport, unsigned int tty_start) 128static void dz_start_tx(struct uart_port *uport)
129{ 129{
130 struct dz_port *dport = (struct dz_port *)uport; 130 struct dz_port *dport = (struct dz_port *)uport;
131 unsigned short tmp, mask = 1 << dport->port.line; 131 unsigned short tmp, mask = 1 << dport->port.line;
@@ -290,7 +290,7 @@ static inline void dz_transmit_chars(struct dz_port *dport)
290 } 290 }
291 /* if nothing to do or stopped or hardware stopped */ 291 /* if nothing to do or stopped or hardware stopped */
292 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { 292 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
293 dz_stop_tx(&dport->port, 0); 293 dz_stop_tx(&dport->port);
294 return; 294 return;
295 } 295 }
296 296
@@ -308,7 +308,7 @@ static inline void dz_transmit_chars(struct dz_port *dport)
308 308
309 /* Are we done */ 309 /* Are we done */
310 if (uart_circ_empty(xmit)) 310 if (uart_circ_empty(xmit))
311 dz_stop_tx(&dport->port, 0); 311 dz_stop_tx(&dport->port);
312} 312}
313 313
314/* 314/*
@@ -440,7 +440,7 @@ static int dz_startup(struct uart_port *uport)
440 */ 440 */
441static void dz_shutdown(struct uart_port *uport) 441static void dz_shutdown(struct uart_port *uport)
442{ 442{
443 dz_stop_tx(uport, 0); 443 dz_stop_tx(uport);
444} 444}
445 445
446/* 446/*
diff --git a/drivers/serial/icom.c b/drivers/serial/icom.c
index c112b32764e8..79f8df4d66b7 100644
--- a/drivers/serial/icom.c
+++ b/drivers/serial/icom.c
@@ -989,18 +989,16 @@ static unsigned int icom_get_mctrl(struct uart_port *port)
989 return result; 989 return result;
990} 990}
991 991
992static void icom_stop_tx(struct uart_port *port, unsigned int tty_stop) 992static void icom_stop_tx(struct uart_port *port)
993{ 993{
994 unsigned char cmdReg; 994 unsigned char cmdReg;
995 995
996 if (tty_stop) { 996 trace(ICOM_PORT, "STOP", 0);
997 trace(ICOM_PORT, "STOP", 0); 997 cmdReg = readb(&ICOM_PORT->dram->CmdReg);
998 cmdReg = readb(&ICOM_PORT->dram->CmdReg); 998 writeb(cmdReg | CMD_HOLD_XMIT, &ICOM_PORT->dram->CmdReg);
999 writeb(cmdReg | CMD_HOLD_XMIT, &ICOM_PORT->dram->CmdReg);
1000 }
1001} 999}
1002 1000
1003static void icom_start_tx(struct uart_port *port, unsigned int tty_start) 1001static void icom_start_tx(struct uart_port *port)
1004{ 1002{
1005 unsigned char cmdReg; 1003 unsigned char cmdReg;
1006 1004
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 01a8726a3f97..4c985e6b3784 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -124,7 +124,7 @@ static void imx_timeout(unsigned long data)
124/* 124/*
125 * interrupts disabled on entry 125 * interrupts disabled on entry
126 */ 126 */
127static void imx_stop_tx(struct uart_port *port, unsigned int tty_stop) 127static void imx_stop_tx(struct uart_port *port)
128{ 128{
129 struct imx_port *sport = (struct imx_port *)port; 129 struct imx_port *sport = (struct imx_port *)port;
130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN; 130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
@@ -165,13 +165,13 @@ static inline void imx_transmit_buffer(struct imx_port *sport)
165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)); 165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
166 166
167 if (uart_circ_empty(xmit)) 167 if (uart_circ_empty(xmit))
168 imx_stop_tx(&sport->port, 0); 168 imx_stop_tx(&sport->port);
169} 169}
170 170
171/* 171/*
172 * interrupts disabled on entry 172 * interrupts disabled on entry
173 */ 173 */
174static void imx_start_tx(struct uart_port *port, unsigned int tty_start) 174static void imx_start_tx(struct uart_port *port)
175{ 175{
176 struct imx_port *sport = (struct imx_port *)port; 176 struct imx_port *sport = (struct imx_port *)port;
177 177
@@ -196,7 +196,7 @@ static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
196 } 196 }
197 197
198 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 198 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
199 imx_stop_tx(&sport->port, 0); 199 imx_stop_tx(&sport->port);
200 goto out; 200 goto out;
201 } 201 }
202 202
@@ -291,13 +291,31 @@ static unsigned int imx_tx_empty(struct uart_port *port)
291 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0; 291 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
292} 292}
293 293
294/*
295 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
296 */
294static unsigned int imx_get_mctrl(struct uart_port *port) 297static unsigned int imx_get_mctrl(struct uart_port *port)
295{ 298{
296 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 299 struct imx_port *sport = (struct imx_port *)port;
300 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
301
302 if (USR1((u32)sport->port.membase) & USR1_RTSS)
303 tmp |= TIOCM_CTS;
304
305 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
306 tmp |= TIOCM_RTS;
307
308 return tmp;
297} 309}
298 310
299static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 311static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
300{ 312{
313 struct imx_port *sport = (struct imx_port *)port;
314
315 if (mctrl & TIOCM_RTS)
316 UCR2((u32)sport->port.membase) |= UCR2_CTS;
317 else
318 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
301} 319}
302 320
303/* 321/*
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c
index 793c3a7cbe47..0c5c96a582b3 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/serial/ioc4_serial.c
@@ -2373,10 +2373,9 @@ static unsigned int ic4_tx_empty(struct uart_port *the_port)
2373/** 2373/**
2374 * ic4_stop_tx - stop the transmitter 2374 * ic4_stop_tx - stop the transmitter
2375 * @port: Port to operate on 2375 * @port: Port to operate on
2376 * @tty_stop: Set to 1 if called via uart_stop
2377 * 2376 *
2378 */ 2377 */
2379static void ic4_stop_tx(struct uart_port *the_port, unsigned int tty_stop) 2378static void ic4_stop_tx(struct uart_port *the_port)
2380{ 2379{
2381} 2380}
2382 2381
@@ -2471,10 +2470,9 @@ static unsigned int ic4_get_mctrl(struct uart_port *the_port)
2471/** 2470/**
2472 * ic4_start_tx - Start transmitter, flush any output 2471 * ic4_start_tx - Start transmitter, flush any output
2473 * @port: Port to operate on 2472 * @port: Port to operate on
2474 * @tty_stop: Set to 1 if called via uart_start
2475 * 2473 *
2476 */ 2474 */
2477static void ic4_start_tx(struct uart_port *the_port, unsigned int tty_stop) 2475static void ic4_start_tx(struct uart_port *the_port)
2478{ 2476{
2479 struct ioc4_port *port = get_ioc4_port(the_port); 2477 struct ioc4_port *port = get_ioc4_port(the_port);
2480 unsigned long flags; 2478 unsigned long flags;
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c
index ea5bf4d4daa3..ef132349f310 100644
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/serial/ip22zilog.c
@@ -592,7 +592,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
592} 592}
593 593
594/* The port lock is held and interrupts are disabled. */ 594/* The port lock is held and interrupts are disabled. */
595static void ip22zilog_stop_tx(struct uart_port *port, unsigned int tty_stop) 595static void ip22zilog_stop_tx(struct uart_port *port)
596{ 596{
597 struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; 597 struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
598 598
@@ -600,7 +600,7 @@ static void ip22zilog_stop_tx(struct uart_port *port, unsigned int tty_stop)
600} 600}
601 601
602/* The port lock is held and interrupts are disabled. */ 602/* The port lock is held and interrupts are disabled. */
603static void ip22zilog_start_tx(struct uart_port *port, unsigned int tty_start) 603static void ip22zilog_start_tx(struct uart_port *port)
604{ 604{
605 struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port; 605 struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
606 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port); 606 struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 98de2258fd06..6fa0d62d6f68 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -113,7 +113,7 @@ static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl)
113 udelay(10); 113 udelay(10);
114} 114}
115 115
116static void jsm_tty_start_tx(struct uart_port *port, unsigned int tty_start) 116static void jsm_tty_start_tx(struct uart_port *port)
117{ 117{
118 struct jsm_channel *channel = (struct jsm_channel *)port; 118 struct jsm_channel *channel = (struct jsm_channel *)port;
119 119
@@ -125,7 +125,7 @@ static void jsm_tty_start_tx(struct uart_port *port, unsigned int tty_start)
125 jsm_printk(IOCTL, INFO, &channel->ch_bd->pci_dev, "finish\n"); 125 jsm_printk(IOCTL, INFO, &channel->ch_bd->pci_dev, "finish\n");
126} 126}
127 127
128static void jsm_tty_stop_tx(struct uart_port *port, unsigned int tty_stop) 128static void jsm_tty_stop_tx(struct uart_port *port)
129{ 129{
130 struct jsm_channel *channel = (struct jsm_channel *)port; 130 struct jsm_channel *channel = (struct jsm_channel *)port;
131 131
diff --git a/drivers/serial/m32r_sio.c b/drivers/serial/m32r_sio.c
index 9b50560b9d16..b0ecc7537ce5 100644
--- a/drivers/serial/m32r_sio.c
+++ b/drivers/serial/m32r_sio.c
@@ -275,7 +275,7 @@ serial_out(struct uart_sio_port *up, int offset, int value)
275 __sio_out(value, offset); 275 __sio_out(value, offset);
276} 276}
277 277
278static void m32r_sio_stop_tx(struct uart_port *port, unsigned int tty_stop) 278static void m32r_sio_stop_tx(struct uart_port *port)
279{ 279{
280 struct uart_sio_port *up = (struct uart_sio_port *)port; 280 struct uart_sio_port *up = (struct uart_sio_port *)port;
281 281
@@ -285,7 +285,7 @@ static void m32r_sio_stop_tx(struct uart_port *port, unsigned int tty_stop)
285 } 285 }
286} 286}
287 287
288static void m32r_sio_start_tx(struct uart_port *port, unsigned int tty_start) 288static void m32r_sio_start_tx(struct uart_port *port)
289{ 289{
290#ifdef CONFIG_SERIAL_M32R_PLDSIO 290#ifdef CONFIG_SERIAL_M32R_PLDSIO
291 struct uart_sio_port *up = (struct uart_sio_port *)port; 291 struct uart_sio_port *up = (struct uart_sio_port *)port;
@@ -425,7 +425,7 @@ static _INLINE_ void transmit_chars(struct uart_sio_port *up)
425 return; 425 return;
426 } 426 }
427 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 427 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
428 m32r_sio_stop_tx(&up->port, 0); 428 m32r_sio_stop_tx(&up->port);
429 return; 429 return;
430 } 430 }
431 431
@@ -446,7 +446,7 @@ static _INLINE_ void transmit_chars(struct uart_sio_port *up)
446 DEBUG_INTR("THRE..."); 446 DEBUG_INTR("THRE...");
447 447
448 if (uart_circ_empty(xmit)) 448 if (uart_circ_empty(xmit))
449 m32r_sio_stop_tx(&up->port, 0); 449 m32r_sio_stop_tx(&up->port);
450} 450}
451 451
452/* 452/*
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 2a5cf174ca30..a3cd0ee8486d 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -119,7 +119,7 @@ mpc52xx_uart_get_mctrl(struct uart_port *port)
119} 119}
120 120
121static void 121static void
122mpc52xx_uart_stop_tx(struct uart_port *port, unsigned int tty_stop) 122mpc52xx_uart_stop_tx(struct uart_port *port)
123{ 123{
124 /* port->lock taken by caller */ 124 /* port->lock taken by caller */
125 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY; 125 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
@@ -127,7 +127,7 @@ mpc52xx_uart_stop_tx(struct uart_port *port, unsigned int tty_stop)
127} 127}
128 128
129static void 129static void
130mpc52xx_uart_start_tx(struct uart_port *port, unsigned int tty_start) 130mpc52xx_uart_start_tx(struct uart_port *port)
131{ 131{
132 /* port->lock taken by caller */ 132 /* port->lock taken by caller */
133 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; 133 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
@@ -485,7 +485,7 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
485 485
486 /* Nothing to do ? */ 486 /* Nothing to do ? */
487 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 487 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
488 mpc52xx_uart_stop_tx(port,0); 488 mpc52xx_uart_stop_tx(port);
489 return 0; 489 return 0;
490 } 490 }
491 491
@@ -504,7 +504,7 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port)
504 504
505 /* Maybe we're done after all */ 505 /* Maybe we're done after all */
506 if (uart_circ_empty(xmit)) { 506 if (uart_circ_empty(xmit)) {
507 mpc52xx_uart_stop_tx(port,0); 507 mpc52xx_uart_stop_tx(port);
508 return 0; 508 return 0;
509 } 509 }
510 510
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
index e43276c6a954..efe79b1fd431 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/serial/mpsc.c
@@ -1072,18 +1072,18 @@ mpsc_get_mctrl(struct uart_port *port)
1072} 1072}
1073 1073
1074static void 1074static void
1075mpsc_stop_tx(struct uart_port *port, uint tty_start) 1075mpsc_stop_tx(struct uart_port *port)
1076{ 1076{
1077 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1077 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1078 1078
1079 pr_debug("mpsc_stop_tx[%d]: tty_start: %d\n", port->line, tty_start); 1079 pr_debug("mpsc_stop_tx[%d]\n", port->line);
1080 1080
1081 mpsc_freeze(pi); 1081 mpsc_freeze(pi);
1082 return; 1082 return;
1083} 1083}
1084 1084
1085static void 1085static void
1086mpsc_start_tx(struct uart_port *port, uint tty_start) 1086mpsc_start_tx(struct uart_port *port)
1087{ 1087{
1088 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1088 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1089 1089
@@ -1091,7 +1091,7 @@ mpsc_start_tx(struct uart_port *port, uint tty_start)
1091 mpsc_copy_tx_data(pi); 1091 mpsc_copy_tx_data(pi);
1092 mpsc_sdma_start_tx(pi); 1092 mpsc_sdma_start_tx(pi);
1093 1093
1094 pr_debug("mpsc_start_tx[%d]: tty_start: %d\n", port->line, tty_start); 1094 pr_debug("mpsc_start_tx[%d]\n", port->line);
1095 return; 1095 return;
1096} 1096}
1097 1097
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c
index dadd7e19714e..189064607709 100644
--- a/drivers/serial/mux.c
+++ b/drivers/serial/mux.c
@@ -111,22 +111,20 @@ static unsigned int mux_get_mctrl(struct uart_port *port)
111/** 111/**
112 * mux_stop_tx - Stop transmitting characters. 112 * mux_stop_tx - Stop transmitting characters.
113 * @port: Ptr to the uart_port. 113 * @port: Ptr to the uart_port.
114 * @tty_stop: tty layer issue this command?
115 * 114 *
116 * The Serial MUX does not support this function. 115 * The Serial MUX does not support this function.
117 */ 116 */
118static void mux_stop_tx(struct uart_port *port, unsigned int tty_stop) 117static void mux_stop_tx(struct uart_port *port)
119{ 118{
120} 119}
121 120
122/** 121/**
123 * mux_start_tx - Start transmitting characters. 122 * mux_start_tx - Start transmitting characters.
124 * @port: Ptr to the uart_port. 123 * @port: Ptr to the uart_port.
125 * @tty_start: tty layer issue this command?
126 * 124 *
127 * The Serial Mux does not support this function. 125 * The Serial Mux does not support this function.
128 */ 126 */
129static void mux_start_tx(struct uart_port *port, unsigned int tty_start) 127static void mux_start_tx(struct uart_port *port)
130{ 128{
131} 129}
132 130
@@ -181,7 +179,7 @@ static void mux_write(struct uart_port *port)
181 } 179 }
182 180
183 if(uart_circ_empty(xmit) || uart_tx_stopped(port)) { 181 if(uart_circ_empty(xmit) || uart_tx_stopped(port)) {
184 mux_stop_tx(port, 0); 182 mux_stop_tx(port);
185 return; 183 return;
186 } 184 }
187 185
@@ -202,7 +200,7 @@ static void mux_write(struct uart_port *port)
202 uart_write_wakeup(port); 200 uart_write_wakeup(port);
203 201
204 if (uart_circ_empty(xmit)) 202 if (uart_circ_empty(xmit))
205 mux_stop_tx(port, 0); 203 mux_stop_tx(port);
206} 204}
207 205
208/** 206/**
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 7db2f37532cf..5ddd8ab1f108 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -630,11 +630,10 @@ static unsigned int pmz_get_mctrl(struct uart_port *port)
630 630
631/* 631/*
632 * Stop TX side. Dealt like sunzilog at next Tx interrupt, 632 * Stop TX side. Dealt like sunzilog at next Tx interrupt,
633 * though for DMA, we will have to do a bit more. What is 633 * though for DMA, we will have to do a bit more.
634 * the meaning of the tty_stop bit ? XXX
635 * The port lock is held and interrupts are disabled. 634 * The port lock is held and interrupts are disabled.
636 */ 635 */
637static void pmz_stop_tx(struct uart_port *port, unsigned int tty_stop) 636static void pmz_stop_tx(struct uart_port *port)
638{ 637{
639 to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED; 638 to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
640} 639}
@@ -643,7 +642,7 @@ static void pmz_stop_tx(struct uart_port *port, unsigned int tty_stop)
643 * Kick the Tx side. 642 * Kick the Tx side.
644 * The port lock is held and interrupts are disabled. 643 * The port lock is held and interrupts are disabled.
645 */ 644 */
646static void pmz_start_tx(struct uart_port *port, unsigned int tty_start) 645static void pmz_start_tx(struct uart_port *port)
647{ 646{
648 struct uart_pmac_port *uap = to_pmz(port); 647 struct uart_pmac_port *uap = to_pmz(port);
649 unsigned char status; 648 unsigned char status;
@@ -1601,7 +1600,7 @@ static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
1601 return 0; 1600 return 0;
1602 } 1601 }
1603 1602
1604 if (pm_state == mdev->ofdev.dev.power.power_state || pm_state < 2) 1603 if (pm_state.event == mdev->ofdev.dev.power.power_state.event)
1605 return 0; 1604 return 0;
1606 1605
1607 pmz_debug("suspend, switching to state %d\n", pm_state); 1606 pmz_debug("suspend, switching to state %d\n", pm_state);
@@ -1661,7 +1660,7 @@ static int pmz_resume(struct macio_dev *mdev)
1661 if (uap == NULL) 1660 if (uap == NULL)
1662 return 0; 1661 return 0;
1663 1662
1664 if (mdev->ofdev.dev.power.power_state == 0) 1663 if (mdev->ofdev.dev.power.power_state.event == PM_EVENT_ON)
1665 return 0; 1664 return 0;
1666 1665
1667 pmz_debug("resume, switching to state 0\n"); 1666 pmz_debug("resume, switching to state 0\n");
@@ -1714,7 +1713,7 @@ static int pmz_resume(struct macio_dev *mdev)
1714 1713
1715 pmz_debug("resume, switching complete\n"); 1714 pmz_debug("resume, switching complete\n");
1716 1715
1717 mdev->ofdev.dev.power.power_state = 0; 1716 mdev->ofdev.dev.power.power_state.event = PM_EVENT_ON;
1718 1717
1719 return 0; 1718 return 0;
1720} 1719}
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index 461c81c93207..eaa0af835290 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -80,7 +80,7 @@ static void serial_pxa_enable_ms(struct uart_port *port)
80 serial_out(up, UART_IER, up->ier); 80 serial_out(up, UART_IER, up->ier);
81} 81}
82 82
83static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop) 83static void serial_pxa_stop_tx(struct uart_port *port)
84{ 84{
85 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 85 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
86 86
@@ -185,7 +185,7 @@ static void transmit_chars(struct uart_pxa_port *up)
185 return; 185 return;
186 } 186 }
187 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 187 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
188 serial_pxa_stop_tx(&up->port, 0); 188 serial_pxa_stop_tx(&up->port);
189 return; 189 return;
190 } 190 }
191 191
@@ -203,10 +203,10 @@ static void transmit_chars(struct uart_pxa_port *up)
203 203
204 204
205 if (uart_circ_empty(xmit)) 205 if (uart_circ_empty(xmit))
206 serial_pxa_stop_tx(&up->port, 0); 206 serial_pxa_stop_tx(&up->port);
207} 207}
208 208
209static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start) 209static void serial_pxa_start_tx(struct uart_port *port)
210{ 210{
211 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 211 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
212 212
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index 7365d4b50b95..c361c6fb0809 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -246,8 +246,7 @@ static void s3c24xx_serial_rx_disable(struct uart_port *port)
246 spin_unlock_irqrestore(&port->lock, flags); 246 spin_unlock_irqrestore(&port->lock, flags);
247} 247}
248 248
249static void 249static void s3c24xx_serial_stop_tx(struct uart_port *port)
250s3c24xx_serial_stop_tx(struct uart_port *port, unsigned int tty_stop)
251{ 250{
252 if (tx_enabled(port)) { 251 if (tx_enabled(port)) {
253 disable_irq(TX_IRQ(port)); 252 disable_irq(TX_IRQ(port));
@@ -257,8 +256,7 @@ s3c24xx_serial_stop_tx(struct uart_port *port, unsigned int tty_stop)
257 } 256 }
258} 257}
259 258
260static void 259static void s3c24xx_serial_start_tx(struct uart_port *port)
261s3c24xx_serial_start_tx(struct uart_port *port, unsigned int tty_start)
262{ 260{
263 if (!tx_enabled(port)) { 261 if (!tx_enabled(port)) {
264 if (port->flags & UPF_CONS_FLOW) 262 if (port->flags & UPF_CONS_FLOW)
@@ -424,7 +422,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id, struct pt_regs *re
424 */ 422 */
425 423
426 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 424 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
427 s3c24xx_serial_stop_tx(port, 0); 425 s3c24xx_serial_stop_tx(port);
428 goto out; 426 goto out;
429 } 427 }
430 428
@@ -443,7 +441,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id, struct pt_regs *re
443 uart_write_wakeup(port); 441 uart_write_wakeup(port);
444 442
445 if (uart_circ_empty(xmit)) 443 if (uart_circ_empty(xmit))
446 s3c24xx_serial_stop_tx(port, 0); 444 s3c24xx_serial_stop_tx(port);
447 445
448 out: 446 out:
449 return IRQ_HANDLED; 447 return IRQ_HANDLED;
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c
index 98641c3f5ab9..1225b14f6e9d 100644
--- a/drivers/serial/sa1100.c
+++ b/drivers/serial/sa1100.c
@@ -145,7 +145,7 @@ static void sa1100_timeout(unsigned long data)
145/* 145/*
146 * interrupts disabled on entry 146 * interrupts disabled on entry
147 */ 147 */
148static void sa1100_stop_tx(struct uart_port *port, unsigned int tty_stop) 148static void sa1100_stop_tx(struct uart_port *port)
149{ 149{
150 struct sa1100_port *sport = (struct sa1100_port *)port; 150 struct sa1100_port *sport = (struct sa1100_port *)port;
151 u32 utcr3; 151 u32 utcr3;
@@ -158,7 +158,7 @@ static void sa1100_stop_tx(struct uart_port *port, unsigned int tty_stop)
158/* 158/*
159 * interrupts may not be disabled on entry 159 * interrupts may not be disabled on entry
160 */ 160 */
161static void sa1100_start_tx(struct uart_port *port, unsigned int tty_start) 161static void sa1100_start_tx(struct uart_port *port)
162{ 162{
163 struct sa1100_port *sport = (struct sa1100_port *)port; 163 struct sa1100_port *sport = (struct sa1100_port *)port;
164 unsigned long flags; 164 unsigned long flags;
@@ -264,7 +264,7 @@ static void sa1100_tx_chars(struct sa1100_port *sport)
264 sa1100_mctrl_check(sport); 264 sa1100_mctrl_check(sport);
265 265
266 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 266 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
267 sa1100_stop_tx(&sport->port, 0); 267 sa1100_stop_tx(&sport->port);
268 return; 268 return;
269 } 269 }
270 270
@@ -284,7 +284,7 @@ static void sa1100_tx_chars(struct sa1100_port *sport)
284 uart_write_wakeup(&sport->port); 284 uart_write_wakeup(&sport->port);
285 285
286 if (uart_circ_empty(xmit)) 286 if (uart_circ_empty(xmit))
287 sa1100_stop_tx(&sport->port, 0); 287 sa1100_stop_tx(&sport->port);
288} 288}
289 289
290static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs) 290static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs)
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 54699c3a00ab..2d8622eef701 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -80,7 +80,7 @@ static void uart_stop(struct tty_struct *tty)
80 unsigned long flags; 80 unsigned long flags;
81 81
82 spin_lock_irqsave(&port->lock, flags); 82 spin_lock_irqsave(&port->lock, flags);
83 port->ops->stop_tx(port, 1); 83 port->ops->stop_tx(port);
84 spin_unlock_irqrestore(&port->lock, flags); 84 spin_unlock_irqrestore(&port->lock, flags);
85} 85}
86 86
@@ -91,7 +91,7 @@ static void __uart_start(struct tty_struct *tty)
91 91
92 if (!uart_circ_empty(&state->info->xmit) && state->info->xmit.buf && 92 if (!uart_circ_empty(&state->info->xmit) && state->info->xmit.buf &&
93 !tty->stopped && !tty->hw_stopped) 93 !tty->stopped && !tty->hw_stopped)
94 port->ops->start_tx(port, 1); 94 port->ops->start_tx(port);
95} 95}
96 96
97static void uart_start(struct tty_struct *tty) 97static void uart_start(struct tty_struct *tty)
@@ -542,7 +542,7 @@ static void uart_send_xchar(struct tty_struct *tty, char ch)
542 port->x_char = ch; 542 port->x_char = ch;
543 if (ch) { 543 if (ch) {
544 spin_lock_irqsave(&port->lock, flags); 544 spin_lock_irqsave(&port->lock, flags);
545 port->ops->start_tx(port, 0); 545 port->ops->start_tx(port);
546 spin_unlock_irqrestore(&port->lock, flags); 546 spin_unlock_irqrestore(&port->lock, flags);
547 } 547 }
548 } 548 }
@@ -1146,7 +1146,7 @@ static void uart_set_termios(struct tty_struct *tty, struct termios *old_termios
1146 spin_lock_irqsave(&state->port->lock, flags); 1146 spin_lock_irqsave(&state->port->lock, flags);
1147 if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) { 1147 if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) {
1148 tty->hw_stopped = 1; 1148 tty->hw_stopped = 1;
1149 state->port->ops->stop_tx(state->port, 0); 1149 state->port->ops->stop_tx(state->port);
1150 } 1150 }
1151 spin_unlock_irqrestore(&state->port->lock, flags); 1151 spin_unlock_irqrestore(&state->port->lock, flags);
1152 } 1152 }
@@ -1869,7 +1869,7 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
1869 struct uart_ops *ops = port->ops; 1869 struct uart_ops *ops = port->ops;
1870 1870
1871 spin_lock_irq(&port->lock); 1871 spin_lock_irq(&port->lock);
1872 ops->stop_tx(port, 0); 1872 ops->stop_tx(port);
1873 ops->set_mctrl(port, 0); 1873 ops->set_mctrl(port, 0);
1874 ops->stop_rx(port); 1874 ops->stop_rx(port);
1875 spin_unlock_irq(&port->lock); 1875 spin_unlock_irq(&port->lock);
@@ -1935,7 +1935,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
1935 uart_change_speed(state, NULL); 1935 uart_change_speed(state, NULL);
1936 spin_lock_irq(&port->lock); 1936 spin_lock_irq(&port->lock);
1937 ops->set_mctrl(port, port->mctrl); 1937 ops->set_mctrl(port, port->mctrl);
1938 ops->start_tx(port, 0); 1938 ops->start_tx(port);
1939 spin_unlock_irq(&port->lock); 1939 spin_unlock_irq(&port->lock);
1940 } 1940 }
1941 1941
@@ -1947,21 +1947,29 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
1947static inline void 1947static inline void
1948uart_report_port(struct uart_driver *drv, struct uart_port *port) 1948uart_report_port(struct uart_driver *drv, struct uart_port *port)
1949{ 1949{
1950 printk("%s%d", drv->dev_name, port->line); 1950 char address[64];
1951 printk(" at "); 1951
1952 switch (port->iotype) { 1952 switch (port->iotype) {
1953 case UPIO_PORT: 1953 case UPIO_PORT:
1954 printk("I/O 0x%x", port->iobase); 1954 snprintf(address, sizeof(address),
1955 "I/O 0x%x", port->iobase);
1955 break; 1956 break;
1956 case UPIO_HUB6: 1957 case UPIO_HUB6:
1957 printk("I/O 0x%x offset 0x%x", port->iobase, port->hub6); 1958 snprintf(address, sizeof(address),
1959 "I/O 0x%x offset 0x%x", port->iobase, port->hub6);
1958 break; 1960 break;
1959 case UPIO_MEM: 1961 case UPIO_MEM:
1960 case UPIO_MEM32: 1962 case UPIO_MEM32:
1961 printk("MMIO 0x%lx", port->mapbase); 1963 snprintf(address, sizeof(address),
1964 "MMIO 0x%lx", port->mapbase);
1965 break;
1966 default:
1967 strlcpy(address, "*unknown*", sizeof(address));
1962 break; 1968 break;
1963 } 1969 }
1964 printk(" (irq = %d) is a %s\n", port->irq, uart_type(port)); 1970
1971 printk(KERN_INFO "%s%d at %s (irq = %d) is a %s\n",
1972 drv->dev_name, port->line, address, port->irq, uart_type(port));
1965} 1973}
1966 1974
1967static void 1975static void
@@ -2289,143 +2297,11 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
2289} 2297}
2290EXPORT_SYMBOL(uart_match_port); 2298EXPORT_SYMBOL(uart_match_port);
2291 2299
2292/*
2293 * Try to find an unused uart_state slot for a port.
2294 */
2295static struct uart_state *
2296uart_find_match_or_unused(struct uart_driver *drv, struct uart_port *port)
2297{
2298 int i;
2299
2300 /*
2301 * First, find a port entry which matches. Note: if we do
2302 * find a matching entry, and it has a non-zero use count,
2303 * then we can't register the port.
2304 */
2305 for (i = 0; i < drv->nr; i++)
2306 if (uart_match_port(drv->state[i].port, port))
2307 return &drv->state[i];
2308
2309 /*
2310 * We didn't find a matching entry, so look for the first
2311 * free entry. We look for one which hasn't been previously
2312 * used (indicated by zero iobase).
2313 */
2314 for (i = 0; i < drv->nr; i++)
2315 if (drv->state[i].port->type == PORT_UNKNOWN &&
2316 drv->state[i].port->iobase == 0 &&
2317 drv->state[i].count == 0)
2318 return &drv->state[i];
2319
2320 /*
2321 * That also failed. Last resort is to find any currently
2322 * entry which doesn't have a real port associated with it.
2323 */
2324 for (i = 0; i < drv->nr; i++)
2325 if (drv->state[i].port->type == PORT_UNKNOWN &&
2326 drv->state[i].count == 0)
2327 return &drv->state[i];
2328
2329 return NULL;
2330}
2331
2332/**
2333 * uart_register_port: register uart settings with a port
2334 * @drv: pointer to the uart low level driver structure for this port
2335 * @port: uart port structure describing the port
2336 *
2337 * Register UART settings with the specified low level driver. Detect
2338 * the type of the port if UPF_BOOT_AUTOCONF is set, and detect the
2339 * IRQ if UPF_AUTO_IRQ is set.
2340 *
2341 * We try to pick the same port for the same IO base address, so that
2342 * when a modem is plugged in, unplugged and plugged back in, it gets
2343 * allocated the same port.
2344 *
2345 * Returns negative error, or positive line number.
2346 */
2347int uart_register_port(struct uart_driver *drv, struct uart_port *port)
2348{
2349 struct uart_state *state;
2350 int ret;
2351
2352 down(&port_sem);
2353
2354 state = uart_find_match_or_unused(drv, port);
2355
2356 if (state) {
2357 /*
2358 * Ok, we've found a line that we can use.
2359 *
2360 * If we find a port that matches this one, and it appears
2361 * to be in-use (even if it doesn't have a type) we shouldn't
2362 * alter it underneath itself - the port may be open and
2363 * trying to do useful work.
2364 */
2365 if (uart_users(state) != 0) {
2366 ret = -EBUSY;
2367 goto out;
2368 }
2369
2370 /*
2371 * If the port is already initialised, don't touch it.
2372 */
2373 if (state->port->type == PORT_UNKNOWN) {
2374 state->port->iobase = port->iobase;
2375 state->port->membase = port->membase;
2376 state->port->irq = port->irq;
2377 state->port->uartclk = port->uartclk;
2378 state->port->fifosize = port->fifosize;
2379 state->port->regshift = port->regshift;
2380 state->port->iotype = port->iotype;
2381 state->port->flags = port->flags;
2382 state->port->line = state - drv->state;
2383 state->port->mapbase = port->mapbase;
2384
2385 uart_configure_port(drv, state, state->port);
2386 }
2387
2388 ret = state->port->line;
2389 } else
2390 ret = -ENOSPC;
2391 out:
2392 up(&port_sem);
2393 return ret;
2394}
2395
2396/**
2397 * uart_unregister_port - de-allocate a port
2398 * @drv: pointer to the uart low level driver structure for this port
2399 * @line: line index previously returned from uart_register_port()
2400 *
2401 * Hang up the specified line associated with the low level driver,
2402 * and mark the port as unused.
2403 */
2404void uart_unregister_port(struct uart_driver *drv, int line)
2405{
2406 struct uart_state *state;
2407
2408 if (line < 0 || line >= drv->nr) {
2409 printk(KERN_ERR "Attempt to unregister ");
2410 printk("%s%d", drv->dev_name, line);
2411 printk("\n");
2412 return;
2413 }
2414
2415 state = drv->state + line;
2416
2417 down(&port_sem);
2418 uart_unconfigure_port(drv, state);
2419 up(&port_sem);
2420}
2421
2422EXPORT_SYMBOL(uart_write_wakeup); 2300EXPORT_SYMBOL(uart_write_wakeup);
2423EXPORT_SYMBOL(uart_register_driver); 2301EXPORT_SYMBOL(uart_register_driver);
2424EXPORT_SYMBOL(uart_unregister_driver); 2302EXPORT_SYMBOL(uart_unregister_driver);
2425EXPORT_SYMBOL(uart_suspend_port); 2303EXPORT_SYMBOL(uart_suspend_port);
2426EXPORT_SYMBOL(uart_resume_port); 2304EXPORT_SYMBOL(uart_resume_port);
2427EXPORT_SYMBOL(uart_register_port);
2428EXPORT_SYMBOL(uart_unregister_port);
2429EXPORT_SYMBOL(uart_add_one_port); 2305EXPORT_SYMBOL(uart_add_one_port);
2430EXPORT_SYMBOL(uart_remove_one_port); 2306EXPORT_SYMBOL(uart_remove_one_port);
2431 2307
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c
index 56f269b6bfb1..32f808d157a1 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/serial/serial_lh7a40x.c
@@ -112,13 +112,12 @@ struct uart_port_lh7a40x {
112 unsigned int statusPrev; /* Most recently read modem status */ 112 unsigned int statusPrev; /* Most recently read modem status */
113}; 113};
114 114
115static void lh7a40xuart_stop_tx (struct uart_port* port, unsigned int tty_stop) 115static void lh7a40xuart_stop_tx (struct uart_port* port)
116{ 116{
117 BIT_CLR (port, UART_R_INTEN, TxInt); 117 BIT_CLR (port, UART_R_INTEN, TxInt);
118} 118}
119 119
120static void lh7a40xuart_start_tx (struct uart_port* port, 120static void lh7a40xuart_start_tx (struct uart_port* port)
121 unsigned int tty_start)
122{ 121{
123 BIT_SET (port, UART_R_INTEN, TxInt); 122 BIT_SET (port, UART_R_INTEN, TxInt);
124 123
diff --git a/drivers/serial/serial_txx9.c b/drivers/serial/serial_txx9.c
index d085030df70b..49afadbe461b 100644
--- a/drivers/serial/serial_txx9.c
+++ b/drivers/serial/serial_txx9.c
@@ -253,7 +253,7 @@ sio_quot_set(struct uart_txx9_port *up, int quot)
253 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); 253 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
254} 254}
255 255
256static void serial_txx9_stop_tx(struct uart_port *port, unsigned int tty_stop) 256static void serial_txx9_stop_tx(struct uart_port *port)
257{ 257{
258 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 258 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
259 unsigned long flags; 259 unsigned long flags;
@@ -263,7 +263,7 @@ static void serial_txx9_stop_tx(struct uart_port *port, unsigned int tty_stop)
263 spin_unlock_irqrestore(&up->port.lock, flags); 263 spin_unlock_irqrestore(&up->port.lock, flags);
264} 264}
265 265
266static void serial_txx9_start_tx(struct uart_port *port, unsigned int tty_start) 266static void serial_txx9_start_tx(struct uart_port *port)
267{ 267{
268 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 268 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
269 unsigned long flags; 269 unsigned long flags;
@@ -372,7 +372,7 @@ static inline void transmit_chars(struct uart_txx9_port *up)
372 return; 372 return;
373 } 373 }
374 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 374 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
375 serial_txx9_stop_tx(&up->port, 0); 375 serial_txx9_stop_tx(&up->port);
376 return; 376 return;
377 } 377 }
378 378
@@ -389,7 +389,7 @@ static inline void transmit_chars(struct uart_txx9_port *up)
389 uart_write_wakeup(&up->port); 389 uart_write_wakeup(&up->port);
390 390
391 if (uart_circ_empty(xmit)) 391 if (uart_circ_empty(xmit))
392 serial_txx9_stop_tx(&up->port, 0); 392 serial_txx9_stop_tx(&up->port);
393} 393}
394 394
395static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs) 395static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs)
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index ad5b776d779b..512266307866 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -79,8 +79,8 @@ static struct sci_port *serial_console_port = 0;
79#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 79#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
80 80
81/* Function prototypes */ 81/* Function prototypes */
82static void sci_stop_tx(struct uart_port *port, unsigned int tty_stop); 82static void sci_stop_tx(struct uart_port *port);
83static void sci_start_tx(struct uart_port *port, unsigned int tty_start); 83static void sci_start_tx(struct uart_port *port);
84static void sci_start_rx(struct uart_port *port, unsigned int tty_start); 84static void sci_start_rx(struct uart_port *port, unsigned int tty_start);
85static void sci_stop_rx(struct uart_port *port); 85static void sci_stop_rx(struct uart_port *port);
86static int sci_request_irq(struct sci_port *port); 86static int sci_request_irq(struct sci_port *port);
@@ -455,7 +455,7 @@ static void sci_transmit_chars(struct uart_port *port)
455 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 455 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
456 uart_write_wakeup(port); 456 uart_write_wakeup(port);
457 if (uart_circ_empty(xmit)) { 457 if (uart_circ_empty(xmit)) {
458 sci_stop_tx(port, 0); 458 sci_stop_tx(port);
459 } else { 459 } else {
460 local_irq_save(flags); 460 local_irq_save(flags);
461 ctrl = sci_in(port, SCSCR); 461 ctrl = sci_in(port, SCSCR);
@@ -900,7 +900,7 @@ static unsigned int sci_get_mctrl(struct uart_port *port)
900 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; 900 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
901} 901}
902 902
903static void sci_start_tx(struct uart_port *port, unsigned int tty_start) 903static void sci_start_tx(struct uart_port *port)
904{ 904{
905 struct sci_port *s = &sci_ports[port->line]; 905 struct sci_port *s = &sci_ports[port->line];
906 906
@@ -909,7 +909,7 @@ static void sci_start_tx(struct uart_port *port, unsigned int tty_start)
909 enable_irq(s->irqs[SCIx_TXI_IRQ]); 909 enable_irq(s->irqs[SCIx_TXI_IRQ]);
910} 910}
911 911
912static void sci_stop_tx(struct uart_port *port, unsigned int tty_stop) 912static void sci_stop_tx(struct uart_port *port)
913{ 913{
914 unsigned long flags; 914 unsigned long flags;
915 unsigned short ctrl; 915 unsigned short ctrl;
@@ -978,7 +978,7 @@ static void sci_shutdown(struct uart_port *port)
978 struct sci_port *s = &sci_ports[port->line]; 978 struct sci_port *s = &sci_ports[port->line];
979 979
980 sci_stop_rx(port); 980 sci_stop_rx(port);
981 sci_stop_tx(port, 1); 981 sci_stop_tx(port);
982 sci_free_irq(s); 982 sci_free_irq(s);
983 983
984#if defined(__H8300S__) 984#if defined(__H8300S__)
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c
index 12d1f14e78ce..313f9df24a2d 100644
--- a/drivers/serial/sn_console.c
+++ b/drivers/serial/sn_console.c
@@ -259,10 +259,9 @@ static unsigned int snp_tx_empty(struct uart_port *port)
259/** 259/**
260 * snp_stop_tx - stop the transmitter - no-op for us 260 * snp_stop_tx - stop the transmitter - no-op for us
261 * @port: Port to operat eon - we ignore - no-op function 261 * @port: Port to operat eon - we ignore - no-op function
262 * @tty_stop: Set to 1 if called via uart_stop
263 * 262 *
264 */ 263 */
265static void snp_stop_tx(struct uart_port *port, unsigned int tty_stop) 264static void snp_stop_tx(struct uart_port *port)
266{ 265{
267} 266}
268 267
@@ -325,10 +324,9 @@ static void snp_stop_rx(struct uart_port *port)
325/** 324/**
326 * snp_start_tx - Start transmitter 325 * snp_start_tx - Start transmitter
327 * @port: Port to operate on 326 * @port: Port to operate on
328 * @tty_stop: Set to 1 if called via uart_start
329 * 327 *
330 */ 328 */
331static void snp_start_tx(struct uart_port *port, unsigned int tty_stop) 329static void snp_start_tx(struct uart_port *port)
332{ 330{
333 if (sal_console_port.sc_ops->sal_wakeup_transmit) 331 if (sal_console_port.sc_ops->sal_wakeup_transmit)
334 sal_console_port.sc_ops->sal_wakeup_transmit(&sal_console_port, 332 sal_console_port.sc_ops->sal_wakeup_transmit(&sal_console_port,
@@ -615,7 +613,7 @@ static void sn_transmit_chars(struct sn_cons_port *port, int raw)
615 uart_write_wakeup(&port->sc_port); 613 uart_write_wakeup(&port->sc_port);
616 614
617 if (uart_circ_empty(xmit)) 615 if (uart_circ_empty(xmit))
618 snp_stop_tx(&port->sc_port, 0); /* no-op for us */ 616 snp_stop_tx(&port->sc_port); /* no-op for us */
619} 617}
620 618
621/** 619/**
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 8d198880756a..e971156daa60 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -245,7 +245,7 @@ receive_chars(struct uart_sunsab_port *up,
245 return tty; 245 return tty;
246} 246}
247 247
248static void sunsab_stop_tx(struct uart_port *, unsigned int); 248static void sunsab_stop_tx(struct uart_port *);
249static void sunsab_tx_idle(struct uart_sunsab_port *); 249static void sunsab_tx_idle(struct uart_sunsab_port *);
250 250
251static void transmit_chars(struct uart_sunsab_port *up, 251static void transmit_chars(struct uart_sunsab_port *up,
@@ -301,7 +301,7 @@ static void transmit_chars(struct uart_sunsab_port *up,
301 uart_write_wakeup(&up->port); 301 uart_write_wakeup(&up->port);
302 302
303 if (uart_circ_empty(xmit)) 303 if (uart_circ_empty(xmit))
304 sunsab_stop_tx(&up->port, 0); 304 sunsab_stop_tx(&up->port);
305} 305}
306 306
307static void check_status(struct uart_sunsab_port *up, 307static void check_status(struct uart_sunsab_port *up,
@@ -448,7 +448,7 @@ static unsigned int sunsab_get_mctrl(struct uart_port *port)
448} 448}
449 449
450/* port->lock held by caller. */ 450/* port->lock held by caller. */
451static void sunsab_stop_tx(struct uart_port *port, unsigned int tty_stop) 451static void sunsab_stop_tx(struct uart_port *port)
452{ 452{
453 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; 453 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
454 454
@@ -476,7 +476,7 @@ static void sunsab_tx_idle(struct uart_sunsab_port *up)
476} 476}
477 477
478/* port->lock held by caller. */ 478/* port->lock held by caller. */
479static void sunsab_start_tx(struct uart_port *port, unsigned int tty_start) 479static void sunsab_start_tx(struct uart_port *port)
480{ 480{
481 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; 481 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
482 struct circ_buf *xmit = &up->port.info->xmit; 482 struct circ_buf *xmit = &up->port.info->xmit;
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index d57a3553aea3..0cc879eb1c02 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -255,21 +255,27 @@ static void disable_rsa(struct uart_sunsu_port *up)
255} 255}
256#endif /* CONFIG_SERIAL_8250_RSA */ 256#endif /* CONFIG_SERIAL_8250_RSA */
257 257
258static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop) 258static inline void __stop_tx(struct uart_sunsu_port *p)
259{
260 if (p->ier & UART_IER_THRI) {
261 p->ier &= ~UART_IER_THRI;
262 serial_out(p, UART_IER, p->ier);
263 }
264}
265
266static void sunsu_stop_tx(struct uart_port *port)
259{ 267{
260 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; 268 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
261 269
262 if (up->ier & UART_IER_THRI) { 270 __stop_tx(up);
263 up->ier &= ~UART_IER_THRI; 271
264 serial_out(up, UART_IER, up->ier); 272 if (up->port.type == PORT_16C950 && tty_stop /*FIXME*/) {
265 }
266 if (up->port.type == PORT_16C950 && tty_stop) {
267 up->acr |= UART_ACR_TXDIS; 273 up->acr |= UART_ACR_TXDIS;
268 serial_icr_write(up, UART_ACR, up->acr); 274 serial_icr_write(up, UART_ACR, up->acr);
269 } 275 }
270} 276}
271 277
272static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start) 278static void sunsu_start_tx(struct uart_port *port)
273{ 279{
274 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port; 280 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
275 281
@@ -280,7 +286,7 @@ static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
280 /* 286 /*
281 * We only do this from uart_start 287 * We only do this from uart_start
282 */ 288 */
283 if (tty_start && up->port.type == PORT_16C950) { 289 if (tty_start && up->port.type == PORT_16C950 /*FIXME*/) {
284 up->acr &= ~UART_ACR_TXDIS; 290 up->acr &= ~UART_ACR_TXDIS;
285 serial_icr_write(up, UART_ACR, up->acr); 291 serial_icr_write(up, UART_ACR, up->acr);
286 } 292 }
@@ -413,8 +419,12 @@ static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
413 up->port.x_char = 0; 419 up->port.x_char = 0;
414 return; 420 return;
415 } 421 }
416 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 422 if (uart_tx_stopped(&up->port)) {
417 sunsu_stop_tx(&up->port, 0); 423 sunsu_stop_tx(&up->port);
424 return;
425 }
426 if (uart_circ_empty(xmit)) {
427 __stop_tx(up);
418 return; 428 return;
419 } 429 }
420 430
@@ -431,7 +441,7 @@ static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
431 uart_write_wakeup(&up->port); 441 uart_write_wakeup(&up->port);
432 442
433 if (uart_circ_empty(xmit)) 443 if (uart_circ_empty(xmit))
434 sunsu_stop_tx(&up->port, 0); 444 __stop_tx(up);
435} 445}
436 446
437static _INLINE_ void check_modem_status(struct uart_sunsu_port *up) 447static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index bff42a7b89d0..d75445738c88 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -684,7 +684,7 @@ static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
684} 684}
685 685
686/* The port lock is held and interrupts are disabled. */ 686/* The port lock is held and interrupts are disabled. */
687static void sunzilog_stop_tx(struct uart_port *port, unsigned int tty_stop) 687static void sunzilog_stop_tx(struct uart_port *port)
688{ 688{
689 struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; 689 struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port;
690 690
@@ -692,7 +692,7 @@ static void sunzilog_stop_tx(struct uart_port *port, unsigned int tty_stop)
692} 692}
693 693
694/* The port lock is held and interrupts are disabled. */ 694/* The port lock is held and interrupts are disabled. */
695static void sunzilog_start_tx(struct uart_port *port, unsigned int tty_start) 695static void sunzilog_start_tx(struct uart_port *port)
696{ 696{
697 struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; 697 struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port;
698 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); 698 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port);
diff --git a/drivers/serial/uart00.c b/drivers/serial/uart00.c
index 186f1300cead..47b504ff38b2 100644
--- a/drivers/serial/uart00.c
+++ b/drivers/serial/uart00.c
@@ -87,7 +87,7 @@
87#define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15) 87#define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15)
88//#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0) 88//#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0)
89 89
90static void uart00_stop_tx(struct uart_port *port, unsigned int tty_stop) 90static void uart00_stop_tx(struct uart_port *port)
91{ 91{
92 UART_PUT_IEC(port, UART_IEC_TIE_MSK); 92 UART_PUT_IEC(port, UART_IEC_TIE_MSK);
93} 93}
@@ -199,7 +199,7 @@ static void uart00_tx_chars(struct uart_port *port)
199 return; 199 return;
200 } 200 }
201 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 201 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
202 uart00_stop_tx(port, 0); 202 uart00_stop_tx(port);
203 return; 203 return;
204 } 204 }
205 205
@@ -218,10 +218,10 @@ static void uart00_tx_chars(struct uart_port *port)
218 uart_write_wakeup(port); 218 uart_write_wakeup(port);
219 219
220 if (uart_circ_empty(xmit)) 220 if (uart_circ_empty(xmit))
221 uart00_stop_tx(port, 0); 221 uart00_stop_tx(port);
222} 222}
223 223
224static void uart00_start_tx(struct uart_port *port, unsigned int tty_start) 224static void uart00_start_tx(struct uart_port *port)
225{ 225{
226 UART_PUT_IES(port, UART_IES_TIE_MSK); 226 UART_PUT_IES(port, UART_IES_TIE_MSK);
227 uart00_tx_chars(port); 227 uart00_tx_chars(port);
diff --git a/drivers/serial/v850e_uart.c b/drivers/serial/v850e_uart.c
index bb482780a41d..9378895a8d56 100644
--- a/drivers/serial/v850e_uart.c
+++ b/drivers/serial/v850e_uart.c
@@ -240,7 +240,7 @@ console_initcall(v850e_uart_console_init);
240 240
241/* TX/RX interrupt handlers. */ 241/* TX/RX interrupt handlers. */
242 242
243static void v850e_uart_stop_tx (struct uart_port *port, unsigned tty_stop); 243static void v850e_uart_stop_tx (struct uart_port *port);
244 244
245void v850e_uart_tx (struct uart_port *port) 245void v850e_uart_tx (struct uart_port *port)
246{ 246{
@@ -339,14 +339,14 @@ static unsigned v850e_uart_get_mctrl (struct uart_port *port)
339 return mctrl; 339 return mctrl;
340} 340}
341 341
342static void v850e_uart_start_tx (struct uart_port *port, unsigned tty_start) 342static void v850e_uart_start_tx (struct uart_port *port)
343{ 343{
344 v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line)); 344 v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line));
345 v850e_uart_tx (port); 345 v850e_uart_tx (port);
346 v850e_intc_enable_irq (V850E_UART_TX_IRQ (port->line)); 346 v850e_intc_enable_irq (V850E_UART_TX_IRQ (port->line));
347} 347}
348 348
349static void v850e_uart_stop_tx (struct uart_port *port, unsigned tty_stop) 349static void v850e_uart_stop_tx (struct uart_port *port)
350{ 350{
351 v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line)); 351 v850e_intc_disable_irq (V850E_UART_TX_IRQ (port->line));
352} 352}
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c
index 1f985327b0d4..0c5d65a08f6e 100644
--- a/drivers/serial/vr41xx_siu.c
+++ b/drivers/serial/vr41xx_siu.c
@@ -284,7 +284,7 @@ static unsigned int siu_get_mctrl(struct uart_port *port)
284 return mctrl; 284 return mctrl;
285} 285}
286 286
287static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop) 287static void siu_stop_tx(struct uart_port *port)
288{ 288{
289 unsigned long flags; 289 unsigned long flags;
290 uint8_t ier; 290 uint8_t ier;
@@ -298,7 +298,7 @@ static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop)
298 spin_unlock_irqrestore(&port->lock, flags); 298 spin_unlock_irqrestore(&port->lock, flags);
299} 299}
300 300
301static void siu_start_tx(struct uart_port *port, unsigned int tty_start) 301static void siu_start_tx(struct uart_port *port)
302{ 302{
303 unsigned long flags; 303 unsigned long flags;
304 uint8_t ier; 304 uint8_t ier;
@@ -458,7 +458,7 @@ static inline void transmit_chars(struct uart_port *port)
458 } 458 }
459 459
460 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 460 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
461 siu_stop_tx(port, 0); 461 siu_stop_tx(port);
462 return; 462 return;
463 } 463 }
464 464
@@ -474,7 +474,7 @@ static inline void transmit_chars(struct uart_port *port)
474 uart_write_wakeup(port); 474 uart_write_wakeup(port);
475 475
476 if (uart_circ_empty(xmit)) 476 if (uart_circ_empty(xmit))
477 siu_stop_tx(port, 0); 477 siu_stop_tx(port);
478} 478}
479 479
480static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs) 480static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs)
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index c3e46d24a37e..c9412daff682 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1570,7 +1570,7 @@ static int __usb_suspend_device (struct usb_device *udev, int port1,
1570 struct usb_driver *driver; 1570 struct usb_driver *driver;
1571 1571
1572 intf = udev->actconfig->interface[i]; 1572 intf = udev->actconfig->interface[i];
1573 if (state <= intf->dev.power.power_state) 1573 if (state.event <= intf->dev.power.power_state.event)
1574 continue; 1574 continue;
1575 if (!intf->dev.driver) 1575 if (!intf->dev.driver)
1576 continue; 1576 continue;
@@ -1578,11 +1578,11 @@ static int __usb_suspend_device (struct usb_device *udev, int port1,
1578 1578
1579 if (driver->suspend) { 1579 if (driver->suspend) {
1580 status = driver->suspend(intf, state); 1580 status = driver->suspend(intf, state);
1581 if (intf->dev.power.power_state != state 1581 if (intf->dev.power.power_state.event != state.event
1582 || status) 1582 || status)
1583 dev_err(&intf->dev, 1583 dev_err(&intf->dev,
1584 "suspend %d fail, code %d\n", 1584 "suspend %d fail, code %d\n",
1585 state, status); 1585 state.event, status);
1586 } 1586 }
1587 1587
1588 /* only drivers with suspend() can ever resume(); 1588 /* only drivers with suspend() can ever resume();
@@ -1595,7 +1595,7 @@ static int __usb_suspend_device (struct usb_device *udev, int port1,
1595 * since we know every driver's probe/disconnect works 1595 * since we know every driver's probe/disconnect works
1596 * even for drivers that can't suspend. 1596 * even for drivers that can't suspend.
1597 */ 1597 */
1598 if (!driver->suspend || state > PM_SUSPEND_MEM) { 1598 if (!driver->suspend || state.event > PM_EVENT_FREEZE) {
1599#if 1 1599#if 1
1600 dev_warn(&intf->dev, "resume is unsafe!\n"); 1600 dev_warn(&intf->dev, "resume is unsafe!\n");
1601#else 1601#else
@@ -1616,7 +1616,7 @@ static int __usb_suspend_device (struct usb_device *udev, int port1,
1616 * policies (when HNP doesn't apply) once we have mechanisms to 1616 * policies (when HNP doesn't apply) once we have mechanisms to
1617 * turn power back on! (Likely not before 2.7...) 1617 * turn power back on! (Likely not before 2.7...)
1618 */ 1618 */
1619 if (state > PM_SUSPEND_MEM) { 1619 if (state.event > PM_EVENT_FREEZE) {
1620 dev_warn(&udev->dev, "no poweroff yet, suspending instead\n"); 1620 dev_warn(&udev->dev, "no poweroff yet, suspending instead\n");
1621 } 1621 }
1622 1622
@@ -1733,7 +1733,7 @@ static int finish_port_resume(struct usb_device *udev)
1733 struct usb_driver *driver; 1733 struct usb_driver *driver;
1734 1734
1735 intf = udev->actconfig->interface[i]; 1735 intf = udev->actconfig->interface[i];
1736 if (intf->dev.power.power_state == PMSG_ON) 1736 if (intf->dev.power.power_state.event == PM_EVENT_ON)
1737 continue; 1737 continue;
1738 if (!intf->dev.driver) { 1738 if (!intf->dev.driver) {
1739 /* FIXME maybe force to alt 0 */ 1739 /* FIXME maybe force to alt 0 */
@@ -1747,11 +1747,11 @@ static int finish_port_resume(struct usb_device *udev)
1747 1747
1748 /* can we do better than just logging errors? */ 1748 /* can we do better than just logging errors? */
1749 status = driver->resume(intf); 1749 status = driver->resume(intf);
1750 if (intf->dev.power.power_state != PMSG_ON 1750 if (intf->dev.power.power_state.event != PM_EVENT_ON
1751 || status) 1751 || status)
1752 dev_dbg(&intf->dev, 1752 dev_dbg(&intf->dev,
1753 "resume fail, state %d code %d\n", 1753 "resume fail, state %d code %d\n",
1754 intf->dev.power.power_state, status); 1754 intf->dev.power.power_state.event, status);
1755 } 1755 }
1756 status = 0; 1756 status = 0;
1757 1757
@@ -1934,7 +1934,7 @@ static int hub_resume(struct usb_interface *intf)
1934 unsigned port1; 1934 unsigned port1;
1935 int status; 1935 int status;
1936 1936
1937 if (intf->dev.power.power_state == PM_SUSPEND_ON) 1937 if (intf->dev.power.power_state.event == PM_EVENT_ON)
1938 return 0; 1938 return 0;
1939 1939
1940 for (port1 = 1; port1 <= hdev->maxchild; port1++) { 1940 for (port1 = 1; port1 <= hdev->maxchild; port1++) {
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index 99c85d2f92da..2cddd8a00437 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -1400,7 +1400,7 @@ static int usb_generic_suspend(struct device *dev, pm_message_t message)
1400 driver = to_usb_driver(dev->driver); 1400 driver = to_usb_driver(dev->driver);
1401 1401
1402 /* there's only one USB suspend state */ 1402 /* there's only one USB suspend state */
1403 if (intf->dev.power.power_state) 1403 if (intf->dev.power.power_state.event)
1404 return 0; 1404 return 0;
1405 1405
1406 if (driver->suspend) 1406 if (driver->suspend)
diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
index b01efb6b36f6..65ac9fef3a7c 100644
--- a/drivers/usb/host/ehci-dbg.c
+++ b/drivers/usb/host/ehci-dbg.c
@@ -641,7 +641,7 @@ show_registers (struct class_device *class_dev, char *buf)
641 641
642 spin_lock_irqsave (&ehci->lock, flags); 642 spin_lock_irqsave (&ehci->lock, flags);
643 643
644 if (bus->controller->power.power_state) { 644 if (bus->controller->power.power_state.event) {
645 size = scnprintf (next, size, 645 size = scnprintf (next, size,
646 "bus %s, device %s (driver " DRIVER_VERSION ")\n" 646 "bus %s, device %s (driver " DRIVER_VERSION ")\n"
647 "%s\n" 647 "%s\n"
diff --git a/drivers/usb/host/ohci-dbg.c b/drivers/usb/host/ohci-dbg.c
index c58408c95c3d..447f488f5d93 100644
--- a/drivers/usb/host/ohci-dbg.c
+++ b/drivers/usb/host/ohci-dbg.c
@@ -631,7 +631,7 @@ show_registers (struct class_device *class_dev, char *buf)
631 hcd->product_desc, 631 hcd->product_desc,
632 hcd_name); 632 hcd_name);
633 633
634 if (bus->controller->power.power_state) { 634 if (bus->controller->power.power_state.event) {
635 size -= scnprintf (next, size, 635 size -= scnprintf (next, size,
636 "SUSPENDED (no register access)\n"); 636 "SUSPENDED (no register access)\n");
637 goto done; 637 goto done;
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
index 7a890a65f55d..80eaf659c198 100644
--- a/drivers/usb/host/sl811-hcd.c
+++ b/drivers/usb/host/sl811-hcd.c
@@ -1781,9 +1781,9 @@ sl811h_suspend(struct device *dev, pm_message_t state, u32 phase)
1781 if (phase != SUSPEND_POWER_DOWN) 1781 if (phase != SUSPEND_POWER_DOWN)
1782 return retval; 1782 return retval;
1783 1783
1784 if (state <= PM_SUSPEND_MEM) 1784 if (state.event == PM_EVENT_FREEZE)
1785 retval = sl811h_hub_suspend(hcd); 1785 retval = sl811h_hub_suspend(hcd);
1786 else 1786 else if (state.event == PM_EVENT_SUSPEND)
1787 port_power(sl811, 0); 1787 port_power(sl811, 0);
1788 if (retval == 0) 1788 if (retval == 0)
1789 dev->power.power_state = state; 1789 dev->power.power_state = state;
@@ -1802,7 +1802,7 @@ sl811h_resume(struct device *dev, u32 phase)
1802 /* with no "check to see if VBUS is still powered" board hook, 1802 /* with no "check to see if VBUS is still powered" board hook,
1803 * let's assume it'd only be powered to enable remote wakeup. 1803 * let's assume it'd only be powered to enable remote wakeup.
1804 */ 1804 */
1805 if (dev->power.power_state > PM_SUSPEND_MEM 1805 if (dev->power.power_state.event == PM_EVENT_SUSPEND
1806 || !hcd->can_wakeup) { 1806 || !hcd->can_wakeup) {
1807 sl811->port1 = 0; 1807 sl811->port1 = 0;
1808 port_power(sl811, 1); 1808 port_power(sl811, 1);
diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
index cda7249a90b2..fd7fb98e4b20 100644
--- a/drivers/usb/misc/usbtest.c
+++ b/drivers/usb/misc/usbtest.c
@@ -1533,7 +1533,7 @@ usbtest_ioctl (struct usb_interface *intf, unsigned int code, void *buf)
1533 if (down_interruptible (&dev->sem)) 1533 if (down_interruptible (&dev->sem))
1534 return -ERESTARTSYS; 1534 return -ERESTARTSYS;
1535 1535
1536 if (intf->dev.power.power_state != PMSG_ON) { 1536 if (intf->dev.power.power_state.event != PM_EVENT_ON) {
1537 up (&dev->sem); 1537 up (&dev->sem);
1538 return -EHOSTUNREACH; 1538 return -EHOSTUNREACH;
1539 } 1539 }
diff --git a/drivers/usb/net/Makefile b/drivers/usb/net/Makefile
index 16f352195512..fe3fd4115e1e 100644
--- a/drivers/usb/net/Makefile
+++ b/drivers/usb/net/Makefile
@@ -8,5 +8,3 @@ obj-$(CONFIG_USB_PEGASUS) += pegasus.o
8obj-$(CONFIG_USB_RTL8150) += rtl8150.o 8obj-$(CONFIG_USB_RTL8150) += rtl8150.o
9obj-$(CONFIG_USB_USBNET) += usbnet.o 9obj-$(CONFIG_USB_USBNET) += usbnet.o
10obj-$(CONFIG_USB_ZD1201) += zd1201.o 10obj-$(CONFIG_USB_ZD1201) += zd1201.o
11
12CFLAGS_zd1201.o = -Idrivers/net/wireless/
diff --git a/drivers/usb/net/zd1201.c b/drivers/usb/net/zd1201.c
index e32a80b39182..fc013978837e 100644
--- a/drivers/usb/net/zd1201.c
+++ b/drivers/usb/net/zd1201.c
@@ -21,7 +21,7 @@
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/if_arp.h> 22#include <linux/if_arp.h>
23#include <linux/firmware.h> 23#include <linux/firmware.h>
24#include <ieee802_11.h> 24#include <net/ieee80211.h>
25#include "zd1201.h" 25#include "zd1201.h"
26 26
27static struct usb_device_id zd1201_table[] = { 27static struct usb_device_id zd1201_table[] = {
@@ -338,24 +338,24 @@ static void zd1201_usbrx(struct urb *urb, struct pt_regs *regs)
338 goto resubmit; 338 goto resubmit;
339 } 339 }
340 340
341 if ((seq & IEEE802_11_SCTL_FRAG) || 341 if ((seq & IEEE80211_SCTL_FRAG) ||
342 (fc & IEEE802_11_FCTL_MOREFRAGS)) { 342 (fc & IEEE80211_FCTL_MOREFRAGS)) {
343 struct zd1201_frag *frag = NULL; 343 struct zd1201_frag *frag = NULL;
344 char *ptr; 344 char *ptr;
345 345
346 if (datalen<14) 346 if (datalen<14)
347 goto resubmit; 347 goto resubmit;
348 if ((seq & IEEE802_11_SCTL_FRAG) == 0) { 348 if ((seq & IEEE80211_SCTL_FRAG) == 0) {
349 frag = kmalloc(sizeof(*frag), GFP_ATOMIC); 349 frag = kmalloc(sizeof(*frag), GFP_ATOMIC);
350 if (!frag) 350 if (!frag)
351 goto resubmit; 351 goto resubmit;
352 skb = dev_alloc_skb(IEEE802_11_DATA_LEN +14+2); 352 skb = dev_alloc_skb(IEEE80211_DATA_LEN +14+2);
353 if (!skb) { 353 if (!skb) {
354 kfree(frag); 354 kfree(frag);
355 goto resubmit; 355 goto resubmit;
356 } 356 }
357 frag->skb = skb; 357 frag->skb = skb;
358 frag->seq = seq & IEEE802_11_SCTL_SEQ; 358 frag->seq = seq & IEEE80211_SCTL_SEQ;
359 skb_reserve(skb, 2); 359 skb_reserve(skb, 2);
360 memcpy(skb_put(skb, 12), &data[datalen-14], 12); 360 memcpy(skb_put(skb, 12), &data[datalen-14], 12);
361 memcpy(skb_put(skb, 2), &data[6], 2); 361 memcpy(skb_put(skb, 2), &data[6], 2);
@@ -364,7 +364,7 @@ static void zd1201_usbrx(struct urb *urb, struct pt_regs *regs)
364 goto resubmit; 364 goto resubmit;
365 } 365 }
366 hlist_for_each_entry(frag, node, &zd->fraglist, fnode) 366 hlist_for_each_entry(frag, node, &zd->fraglist, fnode)
367 if(frag->seq == (seq&IEEE802_11_SCTL_SEQ)) 367 if(frag->seq == (seq&IEEE80211_SCTL_SEQ))
368 break; 368 break;
369 if (!frag) 369 if (!frag)
370 goto resubmit; 370 goto resubmit;
@@ -372,7 +372,7 @@ static void zd1201_usbrx(struct urb *urb, struct pt_regs *regs)
372 ptr = skb_put(skb, len); 372 ptr = skb_put(skb, len);
373 if (ptr) 373 if (ptr)
374 memcpy(ptr, data+8, len); 374 memcpy(ptr, data+8, len);
375 if (fc & IEEE802_11_FCTL_MOREFRAGS) 375 if (fc & IEEE80211_FCTL_MOREFRAGS)
376 goto resubmit; 376 goto resubmit;
377 hlist_del_init(&frag->fnode); 377 hlist_del_init(&frag->fnode);
378 kfree(frag); 378 kfree(frag);
diff --git a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c
index 7bc1d44d8814..b0eba3ac6420 100644
--- a/drivers/video/aty/aty128fb.c
+++ b/drivers/video/aty/aty128fb.c
@@ -2323,17 +2323,16 @@ static int aty128_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2323 * can properly take care of D3 ? Also, with swsusp, we 2323 * can properly take care of D3 ? Also, with swsusp, we
2324 * know we'll be rebooted, ... 2324 * know we'll be rebooted, ...
2325 */ 2325 */
2326#ifdef CONFIG_PPC_PMAC 2326#ifndef CONFIG_PPC_PMAC
2327 /* HACK ALERT ! Once I find a proper way to say to each driver 2327 /* HACK ALERT ! Once I find a proper way to say to each driver
2328 * individually what will happen with it's PCI slot, I'll change 2328 * individually what will happen with it's PCI slot, I'll change
2329 * that. On laptops, the AGP slot is just unclocked, so D2 is 2329 * that. On laptops, the AGP slot is just unclocked, so D2 is
2330 * expected, while on desktops, the card is powered off 2330 * expected, while on desktops, the card is powered off
2331 */ 2331 */
2332 if (state >= 3) 2332 return 0;
2333 state = 2;
2334#endif /* CONFIG_PPC_PMAC */ 2333#endif /* CONFIG_PPC_PMAC */
2335 2334
2336 if (state != 2 || state == pdev->dev.power.power_state) 2335 if (state.event == pdev->dev.power.power_state.event)
2337 return 0; 2336 return 0;
2338 2337
2339 printk(KERN_DEBUG "aty128fb: suspending...\n"); 2338 printk(KERN_DEBUG "aty128fb: suspending...\n");
@@ -2367,7 +2366,7 @@ static int aty128_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2367 * used dummy fb ops, 2.5 need proper support for this at the 2366 * used dummy fb ops, 2.5 need proper support for this at the
2368 * fbdev level 2367 * fbdev level
2369 */ 2368 */
2370 if (state == 2) 2369 if (state.event != PM_EVENT_ON)
2371 aty128_set_suspend(par, 1); 2370 aty128_set_suspend(par, 1);
2372 2371
2373 release_console_sem(); 2372 release_console_sem();
@@ -2382,12 +2381,11 @@ static int aty128_do_resume(struct pci_dev *pdev)
2382 struct fb_info *info = pci_get_drvdata(pdev); 2381 struct fb_info *info = pci_get_drvdata(pdev);
2383 struct aty128fb_par *par = info->par; 2382 struct aty128fb_par *par = info->par;
2384 2383
2385 if (pdev->dev.power.power_state == 0) 2384 if (pdev->dev.power.power_state.event == PM_EVENT_ON)
2386 return 0; 2385 return 0;
2387 2386
2388 /* Wakeup chip */ 2387 /* Wakeup chip */
2389 if (pdev->dev.power.power_state == 2) 2388 aty128_set_suspend(par, 0);
2390 aty128_set_suspend(par, 0);
2391 par->asleep = 0; 2389 par->asleep = 0;
2392 2390
2393 /* Restore display & engine */ 2391 /* Restore display & engine */
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c
index 8c42538dc8c1..3e10bd837d9e 100644
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/aty/atyfb_base.c
@@ -2022,17 +2022,16 @@ static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2022 struct fb_info *info = pci_get_drvdata(pdev); 2022 struct fb_info *info = pci_get_drvdata(pdev);
2023 struct atyfb_par *par = (struct atyfb_par *) info->par; 2023 struct atyfb_par *par = (struct atyfb_par *) info->par;
2024 2024
2025#ifdef CONFIG_PPC_PMAC 2025#ifndef CONFIG_PPC_PMAC
2026 /* HACK ALERT ! Once I find a proper way to say to each driver 2026 /* HACK ALERT ! Once I find a proper way to say to each driver
2027 * individually what will happen with it's PCI slot, I'll change 2027 * individually what will happen with it's PCI slot, I'll change
2028 * that. On laptops, the AGP slot is just unclocked, so D2 is 2028 * that. On laptops, the AGP slot is just unclocked, so D2 is
2029 * expected, while on desktops, the card is powered off 2029 * expected, while on desktops, the card is powered off
2030 */ 2030 */
2031 if (state >= 3) 2031 return 0;
2032 state = 2;
2033#endif /* CONFIG_PPC_PMAC */ 2032#endif /* CONFIG_PPC_PMAC */
2034 2033
2035 if (state != 2 || state == pdev->dev.power.power_state) 2034 if (state.event == pdev->dev.power.power_state.event)
2036 return 0; 2035 return 0;
2037 2036
2038 acquire_console_sem(); 2037 acquire_console_sem();
@@ -2071,12 +2070,12 @@ static int atyfb_pci_resume(struct pci_dev *pdev)
2071 struct fb_info *info = pci_get_drvdata(pdev); 2070 struct fb_info *info = pci_get_drvdata(pdev);
2072 struct atyfb_par *par = (struct atyfb_par *) info->par; 2071 struct atyfb_par *par = (struct atyfb_par *) info->par;
2073 2072
2074 if (pdev->dev.power.power_state == 0) 2073 if (pdev->dev.power.power_state.event == PM_EVENT_ON)
2075 return 0; 2074 return 0;
2076 2075
2077 acquire_console_sem(); 2076 acquire_console_sem();
2078 2077
2079 if (pdev->dev.power.power_state == 2) 2078 if (pdev->dev.power.power_state.event == 2)
2080 aty_power_mgmt(0, par); 2079 aty_power_mgmt(0, par);
2081 par->asleep = 0; 2080 par->asleep = 0;
2082 2081
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 98352af39325..59a1b6f85067 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -2526,18 +2526,18 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2526 struct radeonfb_info *rinfo = info->par; 2526 struct radeonfb_info *rinfo = info->par;
2527 int i; 2527 int i;
2528 2528
2529 if (state == pdev->dev.power.power_state) 2529 if (state.event == pdev->dev.power.power_state.event)
2530 return 0; 2530 return 0;
2531 2531
2532 printk(KERN_DEBUG "radeonfb (%s): suspending to state: %d...\n", 2532 printk(KERN_DEBUG "radeonfb (%s): suspending to state: %d...\n",
2533 pci_name(pdev), state); 2533 pci_name(pdev), state.event);
2534 2534
2535 /* For suspend-to-disk, we cheat here. We don't suspend anything and 2535 /* For suspend-to-disk, we cheat here. We don't suspend anything and
2536 * let fbcon continue drawing until we are all set. That shouldn't 2536 * let fbcon continue drawing until we are all set. That shouldn't
2537 * really cause any problem at this point, provided that the wakeup 2537 * really cause any problem at this point, provided that the wakeup
2538 * code knows that any state in memory may not match the HW 2538 * code knows that any state in memory may not match the HW
2539 */ 2539 */
2540 if (state != PM_SUSPEND_MEM) 2540 if (state.event == PM_EVENT_FREEZE)
2541 goto done; 2541 goto done;
2542 2542
2543 acquire_console_sem(); 2543 acquire_console_sem();
@@ -2616,7 +2616,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
2616 struct radeonfb_info *rinfo = info->par; 2616 struct radeonfb_info *rinfo = info->par;
2617 int rc = 0; 2617 int rc = 0;
2618 2618
2619 if (pdev->dev.power.power_state == 0) 2619 if (pdev->dev.power.power_state.event == PM_EVENT_ON)
2620 return 0; 2620 return 0;
2621 2621
2622 if (rinfo->no_schedule) { 2622 if (rinfo->no_schedule) {
@@ -2626,7 +2626,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
2626 acquire_console_sem(); 2626 acquire_console_sem();
2627 2627
2628 printk(KERN_DEBUG "radeonfb (%s): resuming from state: %d...\n", 2628 printk(KERN_DEBUG "radeonfb (%s): resuming from state: %d...\n",
2629 pci_name(pdev), pdev->dev.power.power_state); 2629 pci_name(pdev), pdev->dev.power.power_state.event);
2630 2630
2631 2631
2632 if (pci_enable_device(pdev)) { 2632 if (pci_enable_device(pdev)) {
@@ -2637,7 +2637,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
2637 } 2637 }
2638 pci_set_master(pdev); 2638 pci_set_master(pdev);
2639 2639
2640 if (pdev->dev.power.power_state == PM_SUSPEND_MEM) { 2640 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
2641 /* Wakeup chip. Check from config space if we were powered off 2641 /* Wakeup chip. Check from config space if we were powered off
2642 * (todo: additionally, check CLK_PIN_CNTL too) 2642 * (todo: additionally, check CLK_PIN_CNTL too)
2643 */ 2643 */
diff --git a/drivers/video/chipsfb.c b/drivers/video/chipsfb.c
index e75a965ec760..4131243cfdf8 100644
--- a/drivers/video/chipsfb.c
+++ b/drivers/video/chipsfb.c
@@ -462,9 +462,9 @@ static int chipsfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
462{ 462{
463 struct fb_info *p = pci_get_drvdata(pdev); 463 struct fb_info *p = pci_get_drvdata(pdev);
464 464
465 if (state == pdev->dev.power.power_state) 465 if (state.event == pdev->dev.power.power_state.event)
466 return 0; 466 return 0;
467 if (state != PM_SUSPEND_MEM) 467 if (state.event != PM_SUSPEND_MEM)
468 goto done; 468 goto done;
469 469
470 acquire_console_sem(); 470 acquire_console_sem();
diff --git a/drivers/video/i810/i810_main.c b/drivers/video/i810/i810_main.c
index 7513fb9b19cf..6db183462b92 100644
--- a/drivers/video/i810/i810_main.c
+++ b/drivers/video/i810/i810_main.c
@@ -1506,12 +1506,12 @@ static int i810fb_suspend(struct pci_dev *dev, pm_message_t state)
1506 struct i810fb_par *par = (struct i810fb_par *) info->par; 1506 struct i810fb_par *par = (struct i810fb_par *) info->par;
1507 int blank = 0, prev_state = par->cur_state; 1507 int blank = 0, prev_state = par->cur_state;
1508 1508
1509 if (state == prev_state) 1509 if (state.event == prev_state)
1510 return 0; 1510 return 0;
1511 1511
1512 par->cur_state = state; 1512 par->cur_state = state.event;
1513 1513
1514 switch (state) { 1514 switch (state.event) {
1515 case 1: 1515 case 1:
1516 blank = VESA_VSYNC_SUSPEND; 1516 blank = VESA_VSYNC_SUSPEND;
1517 break; 1517 break;
diff --git a/drivers/video/pmag-aa-fb.c b/drivers/video/pmag-aa-fb.c
index 3e00ad7f2e31..28d1fe5fe340 100644
--- a/drivers/video/pmag-aa-fb.c
+++ b/drivers/video/pmag-aa-fb.c
@@ -413,7 +413,7 @@ static struct fb_ops aafb_ops = {
413 413
414static int __init init_one(int slot) 414static int __init init_one(int slot)
415{ 415{
416 unsigned long base_addr = get_tc_base_addr(slot); 416 unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot));
417 struct aafb_info *ip = &my_fb_info[slot]; 417 struct aafb_info *ip = &my_fb_info[slot];
418 418
419 memset(ip, 0, sizeof(struct aafb_info)); 419 memset(ip, 0, sizeof(struct aafb_info));
diff --git a/drivers/video/pmag-ba-fb.c b/drivers/video/pmag-ba-fb.c
index f8095588e99d..c98f1c8d7dc2 100644
--- a/drivers/video/pmag-ba-fb.c
+++ b/drivers/video/pmag-ba-fb.c
@@ -1,57 +1,55 @@
1/* 1/*
2 * linux/drivers/video/pmag-ba-fb.c 2 * linux/drivers/video/pmag-ba-fb.c
3 * 3 *
4 * PMAG-BA TurboChannel framebuffer card support ... derived from: 4 * PMAG-BA TURBOchannel Color Frame Buffer (CFB) card support,
5 * derived from:
5 * "HP300 Topcat framebuffer support (derived from macfb of all things) 6 * "HP300 Topcat framebuffer support (derived from macfb of all things)
6 * Phil Blundell <philb@gnu.org> 1998", the original code can be 7 * Phil Blundell <philb@gnu.org> 1998", the original code can be
7 * found in the file hpfb.c in the same directory. 8 * found in the file hpfb.c in the same directory.
8 * 9 *
9 * Based on digital document: 10 * Based on digital document:
10 * "PMAG-BA TURBOchannel Color Frame Buffer 11 * "PMAG-BA TURBOchannel Color Frame Buffer
11 * Functional Specification", Revision 1.2, August 27, 1990 12 * Functional Specification", Revision 1.2, August 27, 1990
12 * 13 *
13 * DECstation related code Copyright (C) 1999, 2000, 2001 by 14 * DECstation related code Copyright (C) 1999, 2000, 2001 by
14 * Michael Engel <engel@unix-ag.org>, 15 * Michael Engel <engel@unix-ag.org>,
15 * Karsten Merker <merker@linuxtag.org> and 16 * Karsten Merker <merker@linuxtag.org> and
16 * Harald Koerfgen. 17 * Harald Koerfgen.
17 * This file is subject to the terms and conditions of the GNU General 18 * Copyright (c) 2005 Maciej W. Rozycki
18 * Public License. See the file COPYING in the main directory of this
19 * archive for more details.
20 * 19 *
20 * This file is subject to the terms and conditions of the GNU General
21 * Public License. See the file COPYING in the main directory of this
22 * archive for more details.
21 */ 23 */
22#include <linux/module.h> 24
23#include <linux/kernel.h> 25#include <linux/compiler.h>
24#include <linux/sched.h>
25#include <linux/errno.h> 26#include <linux/errno.h>
26#include <linux/string.h>
27#include <linux/timer.h>
28#include <linux/mm.h>
29#include <linux/tty.h>
30#include <linux/slab.h>
31#include <linux/delay.h>
32#include <linux/init.h>
33#include <linux/fb.h> 27#include <linux/fb.h>
34#include <asm/bootinfo.h> 28#include <linux/init.h>
35#include <asm/dec/machtype.h> 29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/types.h>
32
33#include <asm/bug.h>
34#include <asm/io.h>
35#include <asm/system.h>
36
36#include <asm/dec/tc.h> 37#include <asm/dec/tc.h>
38
37#include <video/pmag-ba-fb.h> 39#include <video/pmag-ba-fb.h>
38 40
39struct pmag_ba_ramdac_regs { 41
40 unsigned char addr_low; 42struct pmagbafb_par {
41 unsigned char pad0[3]; 43 struct fb_info *next;
42 unsigned char addr_hi; 44 volatile void __iomem *mmio;
43 unsigned char pad1[3]; 45 volatile u32 __iomem *dac;
44 unsigned char data; 46 int slot;
45 unsigned char pad2[3];
46 unsigned char cmap;
47}; 47};
48 48
49/*
50 * Max 3 TURBOchannel slots -> max 3 PMAG-BA :)
51 */
52static struct fb_info pmagba_fb_info[3];
53 49
54static struct fb_var_screeninfo pmagbafb_defined = { 50static struct fb_info *root_pmagbafb_dev;
51
52static struct fb_var_screeninfo pmagbafb_defined __initdata = {
55 .xres = 1024, 53 .xres = 1024,
56 .yres = 864, 54 .yres = 864,
57 .xres_virtual = 1024, 55 .xres_virtual = 1024,
@@ -61,58 +59,71 @@ static struct fb_var_screeninfo pmagbafb_defined = {
61 .green.length = 8, 59 .green.length = 8,
62 .blue.length = 8, 60 .blue.length = 8,
63 .activate = FB_ACTIVATE_NOW, 61 .activate = FB_ACTIVATE_NOW,
64 .height = 274, 62 .height = -1,
65 .width = 195, 63 .width = -1,
66 .accel = FB_ACCEL_NONE, 64 .accel_flags = FB_ACCEL_NONE,
65 .pixclock = 14452,
66 .left_margin = 116,
67 .right_margin = 12,
68 .upper_margin = 34,
69 .lower_margin = 12,
70 .hsync_len = 128,
71 .vsync_len = 3,
72 .sync = FB_SYNC_ON_GREEN,
67 .vmode = FB_VMODE_NONINTERLACED, 73 .vmode = FB_VMODE_NONINTERLACED,
68}; 74};
69 75
70static struct fb_fix_screeninfo pmagbafb_fix = { 76static struct fb_fix_screeninfo pmagbafb_fix __initdata = {
71 .id = "PMAG-BA", 77 .id = "PMAG-BA",
72 .smem_len = (1024 * 864), 78 .smem_len = (1024 * 1024),
73 .type = FB_TYPE_PACKED_PIXELS, 79 .type = FB_TYPE_PACKED_PIXELS,
74 .visual = FB_VISUAL_PSEUDOCOLOR, 80 .visual = FB_VISUAL_PSEUDOCOLOR,
75 .line_length = 1024, 81 .line_length = 1024,
82 .mmio_len = PMAG_BA_SIZE - PMAG_BA_BT459,
76}; 83};
77 84
78/* 85
79 * Turn hardware cursor off 86static inline void dac_write(struct pmagbafb_par *par, unsigned int reg, u8 v)
80 */
81void pmagbafb_erase_cursor(struct pmag_ba_ramdac_regs *bt459_regs)
82{ 87{
83 bt459_regs->addr_low = 0; 88 writeb(v, par->dac + reg / 4);
84 bt459_regs->addr_hi = 3;
85 bt459_regs->data = 0;
86} 89}
87 90
91static inline u8 dac_read(struct pmagbafb_par *par, unsigned int reg)
92{
93 return readb(par->dac + reg / 4);
94}
95
96
88/* 97/*
89 * Set the palette. 98 * Set the palette.
90 */ 99 */
91static int pmagbafb_setcolreg(unsigned regno, unsigned red, unsigned green, 100static int pmagbafb_setcolreg(unsigned int regno, unsigned int red,
92 unsigned blue, unsigned transp, 101 unsigned int green, unsigned int blue,
93 struct fb_info *info) 102 unsigned int transp, struct fb_info *info)
94{ 103{
95 struct pmag_ba_ramdac_regs *bt459_regs = (struct pmag_ba_ramdac_regs *) info->par; 104 struct pmagbafb_par *par = info->par;
96 105
97 if (regno >= info->cmap.len) 106 BUG_ON(regno >= info->cmap.len);
98 return 1;
99 107
100 red >>= 8; /* The cmap fields are 16 bits */ 108 red >>= 8; /* The cmap fields are 16 bits */
101 green >>= 8; /* wide, but the harware colormap */ 109 green >>= 8; /* wide, but the hardware colormap */
102 blue >>= 8; /* registers are only 8 bits wide */ 110 blue >>= 8; /* registers are only 8 bits wide */
103 111
104 bt459_regs->addr_low = (__u8) regno; 112 mb();
105 bt459_regs->addr_hi = 0; 113 dac_write(par, BT459_ADDR_LO, regno);
106 bt459_regs->cmap = red; 114 dac_write(par, BT459_ADDR_HI, 0x00);
107 bt459_regs->cmap = green; 115 wmb();
108 bt459_regs->cmap = blue; 116 dac_write(par, BT459_CMAP, red);
117 wmb();
118 dac_write(par, BT459_CMAP, green);
119 wmb();
120 dac_write(par, BT459_CMAP, blue);
121
109 return 0; 122 return 0;
110} 123}
111 124
112static struct fb_ops pmagbafb_ops = { 125static struct fb_ops pmagbafb_ops = {
113 .owner = THIS_MODULE, 126 .owner = THIS_MODULE,
114 .fb_get_fix = gen_get_fix,
115 .fb_get_var = gen_get_var,
116 .fb_setcolreg = pmagbafb_setcolreg, 127 .fb_setcolreg = pmagbafb_setcolreg,
117 .fb_fillrect = cfb_fillrect, 128 .fb_fillrect = cfb_fillrect,
118 .fb_copyarea = cfb_copyarea, 129 .fb_copyarea = cfb_copyarea,
@@ -120,63 +131,133 @@ static struct fb_ops pmagbafb_ops = {
120 .fb_cursor = soft_cursor, 131 .fb_cursor = soft_cursor,
121}; 132};
122 133
123int __init pmagbafb_init_one(int slot) 134
135/*
136 * Turn the hardware cursor off.
137 */
138static void __init pmagbafb_erase_cursor(struct fb_info *info)
139{
140 struct pmagbafb_par *par = info->par;
141
142 mb();
143 dac_write(par, BT459_ADDR_LO, 0x00);
144 dac_write(par, BT459_ADDR_HI, 0x03);
145 wmb();
146 dac_write(par, BT459_DATA, 0x00);
147}
148
149
150static int __init pmagbafb_init_one(int slot)
124{ 151{
125 unsigned long base_addr = get_tc_base_addr(slot); 152 struct fb_info *info;
126 struct fb_info *info = &pmagba_fb_info[slot]; 153 struct pmagbafb_par *par;
127 struct display *disp = &pmagba_disp[slot]; 154 unsigned long base_addr;
128 155
129 printk("PMAG-BA framebuffer in slot %d\n", slot); 156 info = framebuffer_alloc(sizeof(struct pmagbafb_par), NULL);
130 /* 157 if (!info)
131 * Framebuffer display memory base address and friends 158 return -ENOMEM;
132 */ 159
133 pmagbafb_fix.smem_start = base_addr + PMAG_BA_ONBOARD_FBMEM_OFFSET; 160 par = info->par;
134 info->par = (base_addr + PMAG_BA_BT459_OFFSET); 161 par->slot = slot;
135 162 claim_tc_card(par->slot);
136 /* 163
137 * Configure the Bt459 RAM DAC 164 base_addr = get_tc_base_addr(par->slot);
138 */ 165
139 pmagbafb_erase_cursor((struct pmag_ba_ramdac_regs *) info->par); 166 par->next = root_pmagbafb_dev;
140 167 root_pmagbafb_dev = info;
141 /* 168
142 * Let there be consoles.. 169 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
143 */ 170 goto err_alloc;
171
144 info->fbops = &pmagbafb_ops; 172 info->fbops = &pmagbafb_ops;
173 info->fix = pmagbafb_fix;
145 info->var = pmagbafb_defined; 174 info->var = pmagbafb_defined;
146 info->fix = pmagbafb_fix;
147 info->screen_base = pmagbafb_fix.smem_start;
148 info->flags = FBINFO_DEFAULT; 175 info->flags = FBINFO_DEFAULT;
149 176
150 fb_alloc_cmap(&fb_info.cmap, 256, 0); 177 /* MMIO mapping setup. */
178 info->fix.mmio_start = base_addr;
179 par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
180 if (!par->mmio)
181 goto err_cmap;
182 par->dac = par->mmio + PMAG_BA_BT459;
183
184 /* Frame buffer mapping setup. */
185 info->fix.smem_start = base_addr + PMAG_BA_FBMEM;
186 info->screen_base = ioremap_nocache(info->fix.smem_start,
187 info->fix.smem_len);
188 if (!info->screen_base)
189 goto err_mmio_map;
190 info->screen_size = info->fix.smem_len;
191
192 pmagbafb_erase_cursor(info);
151 193
152 if (register_framebuffer(info) < 0) 194 if (register_framebuffer(info) < 0)
153 return 1; 195 goto err_smem_map;
196
197 pr_info("fb%d: %s frame buffer device in slot %d\n",
198 info->node, info->fix.id, par->slot);
199
154 return 0; 200 return 0;
201
202
203err_smem_map:
204 iounmap(info->screen_base);
205
206err_mmio_map:
207 iounmap(par->mmio);
208
209err_cmap:
210 fb_dealloc_cmap(&info->cmap);
211
212err_alloc:
213 root_pmagbafb_dev = par->next;
214 release_tc_card(par->slot);
215 framebuffer_release(info);
216 return -ENXIO;
155} 217}
156 218
157/* 219static void __exit pmagbafb_exit_one(void)
158 * Initialise the framebuffer 220{
159 */ 221 struct fb_info *info = root_pmagbafb_dev;
222 struct pmagbafb_par *par = info->par;
160 223
161int __init pmagbafb_init(void) 224 unregister_framebuffer(info);
225 iounmap(info->screen_base);
226 iounmap(par->mmio);
227 fb_dealloc_cmap(&info->cmap);
228 root_pmagbafb_dev = par->next;
229 release_tc_card(par->slot);
230 framebuffer_release(info);
231}
232
233
234/*
235 * Initialise the framebuffer.
236 */
237static int __init pmagbafb_init(void)
162{ 238{
163 int sid; 239 int count = 0;
164 int found = 0; 240 int slot;
165 241
166 if (fb_get_options("pmagbafb", NULL)) 242 if (fb_get_options("pmagbafb", NULL))
167 return -ENODEV; 243 return -ENXIO;
168 244
169 if (TURBOCHANNEL) { 245 while ((slot = search_tc_card("PMAG-BA")) >= 0) {
170 while ((sid = search_tc_card("PMAG-BA")) >= 0) { 246 if (pmagbafb_init_one(slot) < 0)
171 found = 1; 247 break;
172 claim_tc_card(sid); 248 count++;
173 pmagbafb_init_one(sid);
174 }
175 return found ? 0 : -ENODEV;
176 } else {
177 return -ENODEV;
178 } 249 }
250 return (count > 0) ? 0 : -ENXIO;
179} 251}
180 252
253static void __exit pmagbafb_exit(void)
254{
255 while (root_pmagbafb_dev)
256 pmagbafb_exit_one();
257}
258
259
181module_init(pmagbafb_init); 260module_init(pmagbafb_init);
261module_exit(pmagbafb_exit);
262
182MODULE_LICENSE("GPL"); 263MODULE_LICENSE("GPL");
diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/pmagb-b-fb.c
index d14eaee91cff..a483b13e117b 100644
--- a/drivers/video/pmagb-b-fb.c
+++ b/drivers/video/pmagb-b-fb.c
@@ -1,114 +1,128 @@
1/* 1/*
2 * linux/drivers/video/pmagb-b-fb.c 2 * linux/drivers/video/pmagb-b-fb.c
3 * 3 *
4 * PMAGB-B TurboChannel framebuffer card support ... derived from: 4 * PMAGB-B TURBOchannel Smart Frame Buffer (SFB) card support,
5 * derived from:
5 * "HP300 Topcat framebuffer support (derived from macfb of all things) 6 * "HP300 Topcat framebuffer support (derived from macfb of all things)
6 * Phil Blundell <philb@gnu.org> 1998", the original code can be 7 * Phil Blundell <philb@gnu.org> 1998", the original code can be
7 * found in the file hpfb.c in the same directory. 8 * found in the file hpfb.c in the same directory.
8 * 9 *
9 * DECstation related code Copyright (C) 1999, 2000, 2001 by 10 * DECstation related code Copyright (C) 1999, 2000, 2001 by
10 * Michael Engel <engel@unix-ag.org>, 11 * Michael Engel <engel@unix-ag.org>,
11 * Karsten Merker <merker@linuxtag.org> and 12 * Karsten Merker <merker@linuxtag.org> and
12 * Harald Koerfgen. 13 * Harald Koerfgen.
13 * This file is subject to the terms and conditions of the GNU General 14 * Copyright (c) 2005 Maciej W. Rozycki
14 * Public License. See the file COPYING in the main directory of this
15 * archive for more details.
16 * 15 *
16 * This file is subject to the terms and conditions of the GNU General
17 * Public License. See the file COPYING in the main directory of this
18 * archive for more details.
17 */ 19 */
18 20
19/* 21#include <linux/compiler.h>
20 * We currently only support the PMAGB-B in high resolution mode
21 * as I know of no way to detect low resolution mode set via jumper.
22 * KM, 2001/01/07
23 */
24
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/sched.h>
28#include <linux/errno.h>
29#include <linux/string.h>
30#include <linux/timer.h>
31#include <linux/mm.h>
32#include <linux/tty.h>
33#include <linux/slab.h>
34#include <linux/delay.h> 22#include <linux/delay.h>
35#include <linux/init.h> 23#include <linux/errno.h>
36#include <linux/fb.h> 24#include <linux/fb.h>
37#include <asm/bootinfo.h> 25#include <linux/init.h>
38#include <asm/dec/machtype.h> 26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/types.h>
29
30#include <asm/bug.h>
31#include <asm/io.h>
32#include <asm/system.h>
33
39#include <asm/dec/tc.h> 34#include <asm/dec/tc.h>
35
40#include <video/pmagb-b-fb.h> 36#include <video/pmagb-b-fb.h>
41 37
42struct pmagb_b_ramdac_regs { 38
43 unsigned char addr_low; 39struct pmagbbfb_par {
44 unsigned char pad0[3]; 40 struct fb_info *next;
45 unsigned char addr_hi; 41 volatile void __iomem *mmio;
46 unsigned char pad1[3]; 42 volatile void __iomem *smem;
47 unsigned char data; 43 volatile u32 __iomem *sfb;
48 unsigned char pad2[3]; 44 volatile u32 __iomem *dac;
49 unsigned char cmap; 45 unsigned int osc0;
46 unsigned int osc1;
47 int slot;
50}; 48};
51 49
52/*
53 * Max 3 TURBOchannel slots -> max 3 PMAGB-B :)
54 */
55static struct fb_info pmagbb_fb_info[3];
56 50
57static struct fb_var_screeninfo pmagbbfb_defined = { 51static struct fb_info *root_pmagbbfb_dev;
58 .xres = 1280, 52
59 .yres = 1024, 53static struct fb_var_screeninfo pmagbbfb_defined __initdata = {
60 .xres_virtual = 1280,
61 .yres_virtual = 1024,
62 .bits_per_pixel = 8, 54 .bits_per_pixel = 8,
63 .red.length = 8, 55 .red.length = 8,
64 .green.length = 8, 56 .green.length = 8,
65 .blue.length = 8, 57 .blue.length = 8,
66 .activate = FB_ACTIVATE_NOW, 58 .activate = FB_ACTIVATE_NOW,
67 .height = 274, 59 .height = -1,
68 .width = 195, 60 .width = -1,
69 .accel_flags = FB_ACCEL_NONE, 61 .accel_flags = FB_ACCEL_NONE,
62 .sync = FB_SYNC_ON_GREEN,
70 .vmode = FB_VMODE_NONINTERLACED, 63 .vmode = FB_VMODE_NONINTERLACED,
71}; 64};
72 65
73static struct fb_fix_screeninfo pmagbafb_fix = { 66static struct fb_fix_screeninfo pmagbbfb_fix __initdata = {
74 .id = "PMAGB-BA", 67 .id = "PMAGB-BA",
75 .smem_len = (1280 * 1024), 68 .smem_len = (2048 * 1024),
76 .type = FB_TYPE_PACKED_PIXELS, 69 .type = FB_TYPE_PACKED_PIXELS,
77 .visual = FB_VISUAL_PSEUDOCOLOR, 70 .visual = FB_VISUAL_PSEUDOCOLOR,
78 .line_length = 1280, 71 .mmio_len = PMAGB_B_FBMEM,
72};
73
74
75static inline void sfb_write(struct pmagbbfb_par *par, unsigned int reg, u32 v)
76{
77 writel(v, par->sfb + reg / 4);
79} 78}
80 79
81/* 80static inline u32 sfb_read(struct pmagbbfb_par *par, unsigned int reg)
82 * Turn hardware cursor off 81{
83 */ 82 return readl(par->sfb + reg / 4);
84void pmagbbfb_erase_cursor(struct pmagb_b_ramdac_regs *bt459_regs) 83}
84
85static inline void dac_write(struct pmagbbfb_par *par, unsigned int reg, u8 v)
85{ 86{
86 bt459_regs->addr_low = 0; 87 writeb(v, par->dac + reg / 4);
87 bt459_regs->addr_hi = 3;
88 bt459_regs->data = 0;
89} 88}
90 89
90static inline u8 dac_read(struct pmagbbfb_par *par, unsigned int reg)
91{
92 return readb(par->dac + reg / 4);
93}
94
95static inline void gp0_write(struct pmagbbfb_par *par, u32 v)
96{
97 writel(v, par->mmio + PMAGB_B_GP0);
98}
99
100
91/* 101/*
92 * Set the palette. 102 * Set the palette.
93 */ 103 */
94static int pmagbbfb_setcolreg(unsigned regno, unsigned red, unsigned green, 104static int pmagbbfb_setcolreg(unsigned int regno, unsigned int red,
95 unsigned blue, unsigned transp, 105 unsigned int green, unsigned int blue,
96 struct fb_info *info) 106 unsigned int transp, struct fb_info *info)
97{ 107{
98 struct pmagb_b_ramdac_regs *bt459_regs = (struct pmagb_b_ramdac_regs *) info->par; 108 struct pmagbbfb_par *par = info->par;
99 109
100 if (regno >= info->cmap.len) 110 BUG_ON(regno >= info->cmap.len);
101 return 1;
102 111
103 red >>= 8; /* The cmap fields are 16 bits */ 112 red >>= 8; /* The cmap fields are 16 bits */
104 green >>= 8; /* wide, but the harware colormap */ 113 green >>= 8; /* wide, but the hardware colormap */
105 blue >>= 8; /* registers are only 8 bits wide */ 114 blue >>= 8; /* registers are only 8 bits wide */
106 115
107 bt459_regs->addr_low = (__u8) regno; 116 mb();
108 bt459_regs->addr_hi = 0; 117 dac_write(par, BT459_ADDR_LO, regno);
109 bt459_regs->cmap = red; 118 dac_write(par, BT459_ADDR_HI, 0x00);
110 bt459_regs->cmap = green; 119 wmb();
111 bt459_regs->cmap = blue; 120 dac_write(par, BT459_CMAP, red);
121 wmb();
122 dac_write(par, BT459_CMAP, green);
123 wmb();
124 dac_write(par, BT459_CMAP, blue);
125
112 return 0; 126 return 0;
113} 127}
114 128
@@ -121,62 +135,247 @@ static struct fb_ops pmagbbfb_ops = {
121 .fb_cursor = soft_cursor, 135 .fb_cursor = soft_cursor,
122}; 136};
123 137
124int __init pmagbbfb_init_one(int slot) 138
139/*
140 * Turn the hardware cursor off.
141 */
142static void __init pmagbbfb_erase_cursor(struct fb_info *info)
143{
144 struct pmagbbfb_par *par = info->par;
145
146 mb();
147 dac_write(par, BT459_ADDR_LO, 0x00);
148 dac_write(par, BT459_ADDR_HI, 0x03);
149 wmb();
150 dac_write(par, BT459_DATA, 0x00);
151}
152
153/*
154 * Set up screen parameters.
155 */
156static void __init pmagbbfb_screen_setup(struct fb_info *info)
157{
158 struct pmagbbfb_par *par = info->par;
159
160 info->var.xres = ((sfb_read(par, SFB_REG_VID_HOR) >>
161 SFB_VID_HOR_PIX_SHIFT) & SFB_VID_HOR_PIX_MASK) * 4;
162 info->var.xres_virtual = info->var.xres;
163 info->var.yres = (sfb_read(par, SFB_REG_VID_VER) >>
164 SFB_VID_VER_SL_SHIFT) & SFB_VID_VER_SL_MASK;
165 info->var.yres_virtual = info->var.yres;
166 info->var.left_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
167 SFB_VID_HOR_BP_SHIFT) &
168 SFB_VID_HOR_BP_MASK) * 4;
169 info->var.right_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
170 SFB_VID_HOR_FP_SHIFT) &
171 SFB_VID_HOR_FP_MASK) * 4;
172 info->var.upper_margin = (sfb_read(par, SFB_REG_VID_VER) >>
173 SFB_VID_VER_BP_SHIFT) & SFB_VID_VER_BP_MASK;
174 info->var.lower_margin = (sfb_read(par, SFB_REG_VID_VER) >>
175 SFB_VID_VER_FP_SHIFT) & SFB_VID_VER_FP_MASK;
176 info->var.hsync_len = ((sfb_read(par, SFB_REG_VID_HOR) >>
177 SFB_VID_HOR_SYN_SHIFT) &
178 SFB_VID_HOR_SYN_MASK) * 4;
179 info->var.vsync_len = (sfb_read(par, SFB_REG_VID_VER) >>
180 SFB_VID_VER_SYN_SHIFT) & SFB_VID_VER_SYN_MASK;
181
182 info->fix.line_length = info->var.xres;
183};
184
185/*
186 * Determine oscillator configuration.
187 */
188static void __init pmagbbfb_osc_setup(struct fb_info *info)
125{ 189{
126 unsigned long base_addr = get_tc_base_addr(slot); 190 static unsigned int pmagbbfb_freqs[] __initdata = {
127 struct fb_info *info = &pmagbb_fb_info[slot]; 191 130808, 119843, 104000, 92980, 74367, 72800,
128 192 69197, 66000, 65000, 50350, 36000, 32000, 25175
129 printk("PMAGB-BA framebuffer in slot %d\n", slot); 193 };
130 /* 194 struct pmagbbfb_par *par = info->par;
131 * Framebuffer display memory base address and friends 195 u32 count0 = 8, count1 = 8, counttc = 16 * 256 + 8;
132 */ 196 u32 freq0, freq1, freqtc = get_tc_speed() / 250;
133 pmagbbfb_fix.smem_start = base_addr + PMAGB_B_ONBOARD_FBMEM_OFFSET; 197 int i, j;
134 info->par = (base_addr + PMAGB_B_BT459_OFFSET); 198
135 199 gp0_write(par, 0); /* select Osc0 */
136 /* 200 for (j = 0; j < 16; j++) {
137 * Configure the Bt459 RAM DAC 201 mb();
138 */ 202 sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
139 pmagbbfb_erase_cursor((struct pmagb_b_ramdac_regs *) info->par); 203 mb();
140 204 for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
141 /* 205 if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
142 * Let there be consoles.. 206 break;
143 */ 207 udelay(1);
208 }
209 count0 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
210 }
211
212 gp0_write(par, 1); /* select Osc1 */
213 for (j = 0; j < 16; j++) {
214 mb();
215 sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
216
217 for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
218 if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
219 break;
220 udelay(1);
221 }
222 count1 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
223 }
224
225 freq0 = (freqtc * count0 + counttc / 2) / counttc;
226 par->osc0 = freq0;
227 if (freq0 >= pmagbbfb_freqs[0] - (pmagbbfb_freqs[0] + 32) / 64 &&
228 freq0 <= pmagbbfb_freqs[0] + (pmagbbfb_freqs[0] + 32) / 64)
229 par->osc0 = pmagbbfb_freqs[0];
230
231 freq1 = (par->osc0 * count1 + count0 / 2) / count0;
232 par->osc1 = freq1;
233 for (i = 0; i < sizeof(pmagbbfb_freqs) / sizeof(*pmagbbfb_freqs); i++)
234 if (freq1 >= pmagbbfb_freqs[i] -
235 (pmagbbfb_freqs[i] + 128) / 256 &&
236 freq1 <= pmagbbfb_freqs[i] +
237 (pmagbbfb_freqs[i] + 128) / 256) {
238 par->osc1 = pmagbbfb_freqs[i];
239 break;
240 }
241
242 if (par->osc0 - par->osc1 <= (par->osc0 + par->osc1 + 256) / 512 ||
243 par->osc1 - par->osc0 <= (par->osc0 + par->osc1 + 256) / 512)
244 par->osc1 = 0;
245
246 gp0_write(par, par->osc1 != 0); /* reselect OscX */
247
248 info->var.pixclock = par->osc1 ?
249 (1000000000 + par->osc1 / 2) / par->osc1 :
250 (1000000000 + par->osc0 / 2) / par->osc0;
251};
252
253
254static int __init pmagbbfb_init_one(int slot)
255{
256 char freq0[12], freq1[12];
257 struct fb_info *info;
258 struct pmagbbfb_par *par;
259 unsigned long base_addr;
260 u32 vid_base;
261
262 info = framebuffer_alloc(sizeof(struct pmagbbfb_par), NULL);
263 if (!info)
264 return -ENOMEM;
265
266 par = info->par;
267 par->slot = slot;
268 claim_tc_card(par->slot);
269
270 base_addr = get_tc_base_addr(par->slot);
271
272 par->next = root_pmagbbfb_dev;
273 root_pmagbbfb_dev = info;
274
275 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
276 goto err_alloc;
277
144 info->fbops = &pmagbbfb_ops; 278 info->fbops = &pmagbbfb_ops;
145 info->var = pmagbbfb_defined;
146 info->fix = pmagbbfb_fix; 279 info->fix = pmagbbfb_fix;
147 info->screen_base = pmagbbfb_fix.smem_start; 280 info->var = pmagbbfb_defined;
148 info->flags = FBINFO_DEFAULT; 281 info->flags = FBINFO_DEFAULT;
149 282
150 fb_alloc_cmap(&fb_info.cmap, 256, 0); 283 /* MMIO mapping setup. */
284 info->fix.mmio_start = base_addr;
285 par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
286 if (!par->mmio)
287 goto err_cmap;
288 par->sfb = par->mmio + PMAGB_B_SFB;
289 par->dac = par->mmio + PMAGB_B_BT459;
290
291 /* Frame buffer mapping setup. */
292 info->fix.smem_start = base_addr + PMAGB_B_FBMEM;
293 par->smem = ioremap_nocache(info->fix.smem_start, info->fix.smem_len);
294 if (!par->smem)
295 goto err_mmio_map;
296 vid_base = sfb_read(par, SFB_REG_VID_BASE);
297 info->screen_base = (void __iomem *)par->smem + vid_base * 0x1000;
298 info->screen_size = info->fix.smem_len - 2 * vid_base * 0x1000;
299
300 pmagbbfb_erase_cursor(info);
301 pmagbbfb_screen_setup(info);
302 pmagbbfb_osc_setup(info);
151 303
152 if (register_framebuffer(info) < 0) 304 if (register_framebuffer(info) < 0)
153 return 1; 305 goto err_smem_map;
306
307 snprintf(freq0, sizeof(freq0), "%u.%03uMHz",
308 par->osc0 / 1000, par->osc0 % 1000);
309 snprintf(freq1, sizeof(freq1), "%u.%03uMHz",
310 par->osc1 / 1000, par->osc1 % 1000);
311
312 pr_info("fb%d: %s frame buffer device in slot %d\n",
313 info->node, info->fix.id, par->slot);
314 pr_info("fb%d: Osc0: %s, Osc1: %s, Osc%u selected\n",
315 info->node, freq0, par->osc1 ? freq1 : "disabled",
316 par->osc1 != 0);
317
154 return 0; 318 return 0;
319
320
321err_smem_map:
322 iounmap(par->smem);
323
324err_mmio_map:
325 iounmap(par->mmio);
326
327err_cmap:
328 fb_dealloc_cmap(&info->cmap);
329
330err_alloc:
331 root_pmagbbfb_dev = par->next;
332 release_tc_card(par->slot);
333 framebuffer_release(info);
334 return -ENXIO;
155} 335}
156 336
157/* 337static void __exit pmagbbfb_exit_one(void)
158 * Initialise the framebuffer 338{
159 */ 339 struct fb_info *info = root_pmagbbfb_dev;
340 struct pmagbbfb_par *par = info->par;
341
342 unregister_framebuffer(info);
343 iounmap(par->smem);
344 iounmap(par->mmio);
345 fb_dealloc_cmap(&info->cmap);
346 root_pmagbbfb_dev = par->next;
347 release_tc_card(par->slot);
348 framebuffer_release(info);
349}
160 350
161int __init pmagbbfb_init(void) 351
352/*
353 * Initialise the framebuffer.
354 */
355static int __init pmagbbfb_init(void)
162{ 356{
163 int sid; 357 int count = 0;
164 int found = 0; 358 int slot;
165 359
166 if (fb_get_options("pmagbbfb", NULL)) 360 if (fb_get_options("pmagbbfb", NULL))
167 return -ENODEV; 361 return -ENXIO;
168 362
169 if (TURBOCHANNEL) { 363 while ((slot = search_tc_card("PMAGB-BA")) >= 0) {
170 while ((sid = search_tc_card("PMAGB-BA")) >= 0) { 364 if (pmagbbfb_init_one(slot) < 0)
171 found = 1; 365 break;
172 claim_tc_card(sid); 366 count++;
173 pmagbbfb_init_one(sid);
174 }
175 return found ? 0 : -ENODEV;
176 } else {
177 return -ENODEV;
178 } 367 }
368 return (count > 0) ? 0 : -ENXIO;
369}
370
371static void __exit pmagbbfb_exit(void)
372{
373 while (root_pmagbbfb_dev)
374 pmagbbfb_exit_one();
179} 375}
180 376
377
181module_init(pmagbbfb_init); 378module_init(pmagbbfb_init);
379module_exit(pmagbbfb_exit);
380
182MODULE_LICENSE("GPL"); 381MODULE_LICENSE("GPL");
diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/s1d13xxxfb.c
index 3848be2b9d2d..fa98d91c42eb 100644
--- a/drivers/video/s1d13xxxfb.c
+++ b/drivers/video/s1d13xxxfb.c
@@ -655,7 +655,7 @@ bail:
655} 655}
656 656
657#ifdef CONFIG_PM 657#ifdef CONFIG_PM
658static int s1d13xxxfb_suspend(struct device *dev, u32 state, u32 level) 658static int s1d13xxxfb_suspend(struct device *dev, pm_message_t state, u32 level)
659{ 659{
660 struct fb_info *info = dev_get_drvdata(dev); 660 struct fb_info *info = dev_get_drvdata(dev);
661 struct s1d13xxxfb_par *s1dfb = info->par; 661 struct s1d13xxxfb_par *s1dfb = info->par;
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c
index f4633d1891f1..117ad42f120d 100644
--- a/drivers/video/savage/savagefb_driver.c
+++ b/drivers/video/savage/savagefb_driver.c
@@ -2110,7 +2110,6 @@ static int savagefb_suspend (struct pci_dev* dev, pm_message_t state)
2110 struct savagefb_par *par = (struct savagefb_par *)info->par; 2110 struct savagefb_par *par = (struct savagefb_par *)info->par;
2111 2111
2112 DBG("savagefb_suspend"); 2112 DBG("savagefb_suspend");
2113 printk(KERN_DEBUG "state: %u\n", state);
2114 2113
2115 acquire_console_sem(); 2114 acquire_console_sem();
2116 fb_set_suspend(info, pci_choose_state(dev, state)); 2115 fb_set_suspend(info, pci_choose_state(dev, state));
diff --git a/fs/Kconfig b/fs/Kconfig
index e54be7058359..ed78d24ee426 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -783,28 +783,6 @@ config SYSFS
783 783
784 Designers of embedded systems may wish to say N here to conserve space. 784 Designers of embedded systems may wish to say N here to conserve space.
785 785
786config DEVPTS_FS_XATTR
787 bool "/dev/pts Extended Attributes"
788 depends on UNIX98_PTYS
789 help
790 Extended attributes are name:value pairs associated with inodes by
791 the kernel or by users (see the attr(5) manual page, or visit
792 <http://acl.bestbits.at/> for details).
793
794 If unsure, say N.
795
796config DEVPTS_FS_SECURITY
797 bool "/dev/pts Security Labels"
798 depends on DEVPTS_FS_XATTR
799 help
800 Security labels support alternative access control models
801 implemented by security modules like SELinux. This option
802 enables an extended attribute handler for file security
803 labels in the /dev/pts filesystem.
804
805 If you are not using a security module that requires using
806 extended attributes for file security labels, say N.
807
808config TMPFS 786config TMPFS
809 bool "Virtual memory file system support (former shm fs)" 787 bool "Virtual memory file system support (former shm fs)"
810 help 788 help
@@ -817,27 +795,6 @@ config TMPFS
817 795
818 See <file:Documentation/filesystems/tmpfs.txt> for details. 796 See <file:Documentation/filesystems/tmpfs.txt> for details.
819 797
820config TMPFS_XATTR
821 bool "tmpfs Extended Attributes"
822 depends on TMPFS
823 help
824 Extended attributes are name:value pairs associated with inodes by
825 the kernel or by users (see the attr(5) manual page, or visit
826 <http://acl.bestbits.at/> for details).
827
828 If unsure, say N.
829
830config TMPFS_SECURITY
831 bool "tmpfs Security Labels"
832 depends on TMPFS_XATTR
833 help
834 Security labels support alternative access control models
835 implemented by security modules like SELinux. This option
836 enables an extended attribute handler for file security
837 labels in the tmpfs filesystem.
838 If you are not using a security module that requires using
839 extended attributes for file security labels, say N.
840
841config HUGETLBFS 798config HUGETLBFS
842 bool "HugeTLB file system support" 799 bool "HugeTLB file system support"
843 depends X86 || IA64 || PPC64 || SPARC64 || SUPERH || X86_64 || BROKEN 800 depends X86 || IA64 || PPC64 || SPARC64 || SUPERH || X86_64 || BROKEN
diff --git a/fs/aio.c b/fs/aio.c
index 06d7d4390fe7..4f641abac3c0 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -567,6 +567,10 @@ static void use_mm(struct mm_struct *mm)
567 atomic_inc(&mm->mm_count); 567 atomic_inc(&mm->mm_count);
568 tsk->mm = mm; 568 tsk->mm = mm;
569 tsk->active_mm = mm; 569 tsk->active_mm = mm;
570 /*
571 * Note that on UML this *requires* PF_BORROWED_MM to be set, otherwise
572 * it won't work. Update it accordingly if you change it here
573 */
570 activate_mm(active_mm, mm); 574 activate_mm(active_mm, mm);
571 task_unlock(tsk); 575 task_unlock(tsk);
572 576
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index c8998dc66882..7974efa107bc 100644
--- a/fs/binfmt_flat.c
+++ b/fs/binfmt_flat.c
@@ -520,7 +520,7 @@ static int load_flat_file(struct linux_binprm * bprm,
520 DBG_FLT("BINFMT_FLAT: ROM mapping of file (we hope)\n"); 520 DBG_FLT("BINFMT_FLAT: ROM mapping of file (we hope)\n");
521 521
522 down_write(&current->mm->mmap_sem); 522 down_write(&current->mm->mmap_sem);
523 textpos = do_mmap(bprm->file, 0, text_len, PROT_READ|PROT_EXEC, MAP_SHARED, 0); 523 textpos = do_mmap(bprm->file, 0, text_len, PROT_READ|PROT_EXEC, MAP_PRIVATE, 0);
524 up_write(&current->mm->mmap_sem); 524 up_write(&current->mm->mmap_sem);
525 if (!textpos || textpos >= (unsigned long) -4096) { 525 if (!textpos || textpos >= (unsigned long) -4096) {
526 if (!textpos) 526 if (!textpos)
diff --git a/fs/devpts/Makefile b/fs/devpts/Makefile
index 5800df2e50c8..236696efcbac 100644
--- a/fs/devpts/Makefile
+++ b/fs/devpts/Makefile
@@ -5,4 +5,3 @@
5obj-$(CONFIG_UNIX98_PTYS) += devpts.o 5obj-$(CONFIG_UNIX98_PTYS) += devpts.o
6 6
7devpts-$(CONFIG_UNIX98_PTYS) := inode.o 7devpts-$(CONFIG_UNIX98_PTYS) := inode.o
8devpts-$(CONFIG_DEVPTS_FS_SECURITY) += xattr_security.o
diff --git a/fs/devpts/inode.c b/fs/devpts/inode.c
index 1571c8d6c232..f2be44d4491f 100644
--- a/fs/devpts/inode.c
+++ b/fs/devpts/inode.c
@@ -18,28 +18,9 @@
18#include <linux/mount.h> 18#include <linux/mount.h>
19#include <linux/tty.h> 19#include <linux/tty.h>
20#include <linux/devpts_fs.h> 20#include <linux/devpts_fs.h>
21#include <linux/xattr.h>
22 21
23#define DEVPTS_SUPER_MAGIC 0x1cd1 22#define DEVPTS_SUPER_MAGIC 0x1cd1
24 23
25extern struct xattr_handler devpts_xattr_security_handler;
26
27static struct xattr_handler *devpts_xattr_handlers[] = {
28#ifdef CONFIG_DEVPTS_FS_SECURITY
29 &devpts_xattr_security_handler,
30#endif
31 NULL
32};
33
34static struct inode_operations devpts_file_inode_operations = {
35#ifdef CONFIG_DEVPTS_FS_XATTR
36 .setxattr = generic_setxattr,
37 .getxattr = generic_getxattr,
38 .listxattr = generic_listxattr,
39 .removexattr = generic_removexattr,
40#endif
41};
42
43static struct vfsmount *devpts_mnt; 24static struct vfsmount *devpts_mnt;
44static struct dentry *devpts_root; 25static struct dentry *devpts_root;
45 26
@@ -102,7 +83,6 @@ devpts_fill_super(struct super_block *s, void *data, int silent)
102 s->s_blocksize_bits = 10; 83 s->s_blocksize_bits = 10;
103 s->s_magic = DEVPTS_SUPER_MAGIC; 84 s->s_magic = DEVPTS_SUPER_MAGIC;
104 s->s_op = &devpts_sops; 85 s->s_op = &devpts_sops;
105 s->s_xattr = devpts_xattr_handlers;
106 s->s_time_gran = 1; 86 s->s_time_gran = 1;
107 87
108 inode = new_inode(s); 88 inode = new_inode(s);
@@ -175,7 +155,6 @@ int devpts_pty_new(struct tty_struct *tty)
175 inode->i_gid = config.setgid ? config.gid : current->fsgid; 155 inode->i_gid = config.setgid ? config.gid : current->fsgid;
176 inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME; 156 inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
177 init_special_inode(inode, S_IFCHR|config.mode, device); 157 init_special_inode(inode, S_IFCHR|config.mode, device);
178 inode->i_op = &devpts_file_inode_operations;
179 inode->u.generic_ip = tty; 158 inode->u.generic_ip = tty;
180 159
181 dentry = get_node(number); 160 dentry = get_node(number);
diff --git a/fs/devpts/xattr_security.c b/fs/devpts/xattr_security.c
deleted file mode 100644
index 864cb5c79baa..000000000000
--- a/fs/devpts/xattr_security.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Security xattr support for devpts.
3 *
4 * Author: Stephen Smalley <sds@epoch.ncsc.mil>
5 * Copyright (c) 2004 Red Hat, Inc., James Morris <jmorris@redhat.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 */
12#include <linux/string.h>
13#include <linux/fs.h>
14#include <linux/security.h>
15#include <linux/xattr.h>
16
17static size_t
18devpts_xattr_security_list(struct inode *inode, char *list, size_t list_len,
19 const char *name, size_t name_len)
20{
21 return security_inode_listsecurity(inode, list, list_len);
22}
23
24static int
25devpts_xattr_security_get(struct inode *inode, const char *name,
26 void *buffer, size_t size)
27{
28 if (strcmp(name, "") == 0)
29 return -EINVAL;
30 return security_inode_getsecurity(inode, name, buffer, size);
31}
32
33static int
34devpts_xattr_security_set(struct inode *inode, const char *name,
35 const void *value, size_t size, int flags)
36{
37 if (strcmp(name, "") == 0)
38 return -EINVAL;
39 return security_inode_setsecurity(inode, name, value, size, flags);
40}
41
42struct xattr_handler devpts_xattr_security_handler = {
43 .prefix = XATTR_SECURITY_PREFIX,
44 .list = devpts_xattr_security_list,
45 .get = devpts_xattr_security_get,
46 .set = devpts_xattr_security_set,
47};
diff --git a/fs/nfsd/nfs4recover.c b/fs/nfsd/nfs4recover.c
index 57ed50fe7f85..954cf893d50c 100644
--- a/fs/nfsd/nfs4recover.c
+++ b/fs/nfsd/nfs4recover.c
@@ -93,7 +93,7 @@ nfs4_make_rec_clidname(char *dname, struct xdr_netobj *clname)
93 93
94 dprintk("NFSD: nfs4_make_rec_clidname for %.*s\n", 94 dprintk("NFSD: nfs4_make_rec_clidname for %.*s\n",
95 clname->len, clname->data); 95 clname->len, clname->data);
96 tfm = crypto_alloc_tfm("md5", 0); 96 tfm = crypto_alloc_tfm("md5", CRYPTO_TFM_REQ_MAY_SLEEP);
97 if (tfm == NULL) 97 if (tfm == NULL)
98 goto out; 98 goto out;
99 cksum.len = crypto_tfm_alg_digestsize(tfm); 99 cksum.len = crypto_tfm_alg_digestsize(tfm);
@@ -114,8 +114,7 @@ nfs4_make_rec_clidname(char *dname, struct xdr_netobj *clname)
114 kfree(cksum.data); 114 kfree(cksum.data);
115 status = nfs_ok; 115 status = nfs_ok;
116out: 116out:
117 if (tfm) 117 crypto_free_tfm(tfm);
118 crypto_free_tfm(tfm);
119 return status; 118 return status;
120} 119}
121 120
diff --git a/fs/proc/base.c b/fs/proc/base.c
index 491f2d9f89ac..520978e49e92 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -11,6 +11,40 @@
11 * go into icache. We cache the reference to task_struct upon lookup too. 11 * go into icache. We cache the reference to task_struct upon lookup too.
12 * Eventually it should become a filesystem in its own. We don't use the 12 * Eventually it should become a filesystem in its own. We don't use the
13 * rest of procfs anymore. 13 * rest of procfs anymore.
14 *
15 *
16 * Changelog:
17 * 17-Jan-2005
18 * Allan Bezerra
19 * Bruna Moreira <bruna.moreira@indt.org.br>
20 * Edjard Mota <edjard.mota@indt.org.br>
21 * Ilias Biris <ilias.biris@indt.org.br>
22 * Mauricio Lin <mauricio.lin@indt.org.br>
23 *
24 * Embedded Linux Lab - 10LE Instituto Nokia de Tecnologia - INdT
25 *
26 * A new process specific entry (smaps) included in /proc. It shows the
27 * size of rss for each memory area. The maps entry lacks information
28 * about physical memory size (rss) for each mapped file, i.e.,
29 * rss information for executables and library files.
30 * This additional information is useful for any tools that need to know
31 * about physical memory consumption for a process specific library.
32 *
33 * Changelog:
34 * 21-Feb-2005
35 * Embedded Linux Lab - 10LE Instituto Nokia de Tecnologia - INdT
36 * Pud inclusion in the page table walking.
37 *
38 * ChangeLog:
39 * 10-Mar-2005
40 * 10LE Instituto Nokia de Tecnologia - INdT:
41 * A better way to walks through the page table as suggested by Hugh Dickins.
42 *
43 * Simo Piiroinen <simo.piiroinen@nokia.com>:
44 * Smaps information related to shared, private, clean and dirty pages.
45 *
46 * Paul Mundt <paul.mundt@nokia.com>:
47 * Overall revision about smaps.
14 */ 48 */
15 49
16#include <asm/uaccess.h> 50#include <asm/uaccess.h>
@@ -65,8 +99,10 @@ enum pid_directory_inos {
65 PROC_TGID_STAT, 99 PROC_TGID_STAT,
66 PROC_TGID_STATM, 100 PROC_TGID_STATM,
67 PROC_TGID_MAPS, 101 PROC_TGID_MAPS,
102 PROC_TGID_NUMA_MAPS,
68 PROC_TGID_MOUNTS, 103 PROC_TGID_MOUNTS,
69 PROC_TGID_WCHAN, 104 PROC_TGID_WCHAN,
105 PROC_TGID_SMAPS,
70#ifdef CONFIG_SCHEDSTATS 106#ifdef CONFIG_SCHEDSTATS
71 PROC_TGID_SCHEDSTAT, 107 PROC_TGID_SCHEDSTAT,
72#endif 108#endif
@@ -102,8 +138,10 @@ enum pid_directory_inos {
102 PROC_TID_STAT, 138 PROC_TID_STAT,
103 PROC_TID_STATM, 139 PROC_TID_STATM,
104 PROC_TID_MAPS, 140 PROC_TID_MAPS,
141 PROC_TID_NUMA_MAPS,
105 PROC_TID_MOUNTS, 142 PROC_TID_MOUNTS,
106 PROC_TID_WCHAN, 143 PROC_TID_WCHAN,
144 PROC_TID_SMAPS,
107#ifdef CONFIG_SCHEDSTATS 145#ifdef CONFIG_SCHEDSTATS
108 PROC_TID_SCHEDSTAT, 146 PROC_TID_SCHEDSTAT,
109#endif 147#endif
@@ -144,6 +182,9 @@ static struct pid_entry tgid_base_stuff[] = {
144 E(PROC_TGID_STAT, "stat", S_IFREG|S_IRUGO), 182 E(PROC_TGID_STAT, "stat", S_IFREG|S_IRUGO),
145 E(PROC_TGID_STATM, "statm", S_IFREG|S_IRUGO), 183 E(PROC_TGID_STATM, "statm", S_IFREG|S_IRUGO),
146 E(PROC_TGID_MAPS, "maps", S_IFREG|S_IRUGO), 184 E(PROC_TGID_MAPS, "maps", S_IFREG|S_IRUGO),
185#ifdef CONFIG_NUMA
186 E(PROC_TGID_NUMA_MAPS, "numa_maps", S_IFREG|S_IRUGO),
187#endif
147 E(PROC_TGID_MEM, "mem", S_IFREG|S_IRUSR|S_IWUSR), 188 E(PROC_TGID_MEM, "mem", S_IFREG|S_IRUSR|S_IWUSR),
148#ifdef CONFIG_SECCOMP 189#ifdef CONFIG_SECCOMP
149 E(PROC_TGID_SECCOMP, "seccomp", S_IFREG|S_IRUSR|S_IWUSR), 190 E(PROC_TGID_SECCOMP, "seccomp", S_IFREG|S_IRUSR|S_IWUSR),
@@ -152,6 +193,7 @@ static struct pid_entry tgid_base_stuff[] = {
152 E(PROC_TGID_ROOT, "root", S_IFLNK|S_IRWXUGO), 193 E(PROC_TGID_ROOT, "root", S_IFLNK|S_IRWXUGO),
153 E(PROC_TGID_EXE, "exe", S_IFLNK|S_IRWXUGO), 194 E(PROC_TGID_EXE, "exe", S_IFLNK|S_IRWXUGO),
154 E(PROC_TGID_MOUNTS, "mounts", S_IFREG|S_IRUGO), 195 E(PROC_TGID_MOUNTS, "mounts", S_IFREG|S_IRUGO),
196 E(PROC_TGID_SMAPS, "smaps", S_IFREG|S_IRUGO),
155#ifdef CONFIG_SECURITY 197#ifdef CONFIG_SECURITY
156 E(PROC_TGID_ATTR, "attr", S_IFDIR|S_IRUGO|S_IXUGO), 198 E(PROC_TGID_ATTR, "attr", S_IFDIR|S_IRUGO|S_IXUGO),
157#endif 199#endif
@@ -180,6 +222,9 @@ static struct pid_entry tid_base_stuff[] = {
180 E(PROC_TID_STAT, "stat", S_IFREG|S_IRUGO), 222 E(PROC_TID_STAT, "stat", S_IFREG|S_IRUGO),
181 E(PROC_TID_STATM, "statm", S_IFREG|S_IRUGO), 223 E(PROC_TID_STATM, "statm", S_IFREG|S_IRUGO),
182 E(PROC_TID_MAPS, "maps", S_IFREG|S_IRUGO), 224 E(PROC_TID_MAPS, "maps", S_IFREG|S_IRUGO),
225#ifdef CONFIG_NUMA
226 E(PROC_TID_NUMA_MAPS, "numa_maps", S_IFREG|S_IRUGO),
227#endif
183 E(PROC_TID_MEM, "mem", S_IFREG|S_IRUSR|S_IWUSR), 228 E(PROC_TID_MEM, "mem", S_IFREG|S_IRUSR|S_IWUSR),
184#ifdef CONFIG_SECCOMP 229#ifdef CONFIG_SECCOMP
185 E(PROC_TID_SECCOMP, "seccomp", S_IFREG|S_IRUSR|S_IWUSR), 230 E(PROC_TID_SECCOMP, "seccomp", S_IFREG|S_IRUSR|S_IWUSR),
@@ -188,6 +233,7 @@ static struct pid_entry tid_base_stuff[] = {
188 E(PROC_TID_ROOT, "root", S_IFLNK|S_IRWXUGO), 233 E(PROC_TID_ROOT, "root", S_IFLNK|S_IRWXUGO),
189 E(PROC_TID_EXE, "exe", S_IFLNK|S_IRWXUGO), 234 E(PROC_TID_EXE, "exe", S_IFLNK|S_IRWXUGO),
190 E(PROC_TID_MOUNTS, "mounts", S_IFREG|S_IRUGO), 235 E(PROC_TID_MOUNTS, "mounts", S_IFREG|S_IRUGO),
236 E(PROC_TID_SMAPS, "smaps", S_IFREG|S_IRUGO),
191#ifdef CONFIG_SECURITY 237#ifdef CONFIG_SECURITY
192 E(PROC_TID_ATTR, "attr", S_IFDIR|S_IRUGO|S_IXUGO), 238 E(PROC_TID_ATTR, "attr", S_IFDIR|S_IRUGO|S_IXUGO),
193#endif 239#endif
@@ -515,6 +561,46 @@ static struct file_operations proc_maps_operations = {
515 .release = seq_release, 561 .release = seq_release,
516}; 562};
517 563
564#ifdef CONFIG_NUMA
565extern struct seq_operations proc_pid_numa_maps_op;
566static int numa_maps_open(struct inode *inode, struct file *file)
567{
568 struct task_struct *task = proc_task(inode);
569 int ret = seq_open(file, &proc_pid_numa_maps_op);
570 if (!ret) {
571 struct seq_file *m = file->private_data;
572 m->private = task;
573 }
574 return ret;
575}
576
577static struct file_operations proc_numa_maps_operations = {
578 .open = numa_maps_open,
579 .read = seq_read,
580 .llseek = seq_lseek,
581 .release = seq_release,
582};
583#endif
584
585extern struct seq_operations proc_pid_smaps_op;
586static int smaps_open(struct inode *inode, struct file *file)
587{
588 struct task_struct *task = proc_task(inode);
589 int ret = seq_open(file, &proc_pid_smaps_op);
590 if (!ret) {
591 struct seq_file *m = file->private_data;
592 m->private = task;
593 }
594 return ret;
595}
596
597static struct file_operations proc_smaps_operations = {
598 .open = smaps_open,
599 .read = seq_read,
600 .llseek = seq_lseek,
601 .release = seq_release,
602};
603
518extern struct seq_operations mounts_op; 604extern struct seq_operations mounts_op;
519static int mounts_open(struct inode *inode, struct file *file) 605static int mounts_open(struct inode *inode, struct file *file)
520{ 606{
@@ -1524,6 +1610,12 @@ static struct dentry *proc_pident_lookup(struct inode *dir,
1524 case PROC_TGID_MAPS: 1610 case PROC_TGID_MAPS:
1525 inode->i_fop = &proc_maps_operations; 1611 inode->i_fop = &proc_maps_operations;
1526 break; 1612 break;
1613#ifdef CONFIG_NUMA
1614 case PROC_TID_NUMA_MAPS:
1615 case PROC_TGID_NUMA_MAPS:
1616 inode->i_fop = &proc_numa_maps_operations;
1617 break;
1618#endif
1527 case PROC_TID_MEM: 1619 case PROC_TID_MEM:
1528 case PROC_TGID_MEM: 1620 case PROC_TGID_MEM:
1529 inode->i_op = &proc_mem_inode_operations; 1621 inode->i_op = &proc_mem_inode_operations;
@@ -1539,6 +1631,10 @@ static struct dentry *proc_pident_lookup(struct inode *dir,
1539 case PROC_TGID_MOUNTS: 1631 case PROC_TGID_MOUNTS:
1540 inode->i_fop = &proc_mounts_operations; 1632 inode->i_fop = &proc_mounts_operations;
1541 break; 1633 break;
1634 case PROC_TID_SMAPS:
1635 case PROC_TGID_SMAPS:
1636 inode->i_fop = &proc_smaps_operations;
1637 break;
1542#ifdef CONFIG_SECURITY 1638#ifdef CONFIG_SECURITY
1543 case PROC_TID_ATTR: 1639 case PROC_TID_ATTR:
1544 inode->i_nlink = 2; 1640 inode->i_nlink = 2;
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index 28b4a0253a92..c7ef3e48e35b 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -2,8 +2,13 @@
2#include <linux/hugetlb.h> 2#include <linux/hugetlb.h>
3#include <linux/mount.h> 3#include <linux/mount.h>
4#include <linux/seq_file.h> 4#include <linux/seq_file.h>
5#include <linux/highmem.h>
6#include <linux/pagemap.h>
7#include <linux/mempolicy.h>
8
5#include <asm/elf.h> 9#include <asm/elf.h>
6#include <asm/uaccess.h> 10#include <asm/uaccess.h>
11#include <asm/tlbflush.h>
7#include "internal.h" 12#include "internal.h"
8 13
9char *task_mem(struct mm_struct *mm, char *buffer) 14char *task_mem(struct mm_struct *mm, char *buffer)
@@ -87,49 +92,58 @@ static void pad_len_spaces(struct seq_file *m, int len)
87 seq_printf(m, "%*c", len, ' '); 92 seq_printf(m, "%*c", len, ' ');
88} 93}
89 94
90static int show_map(struct seq_file *m, void *v) 95struct mem_size_stats
96{
97 unsigned long resident;
98 unsigned long shared_clean;
99 unsigned long shared_dirty;
100 unsigned long private_clean;
101 unsigned long private_dirty;
102};
103
104static int show_map_internal(struct seq_file *m, void *v, struct mem_size_stats *mss)
91{ 105{
92 struct task_struct *task = m->private; 106 struct task_struct *task = m->private;
93 struct vm_area_struct *map = v; 107 struct vm_area_struct *vma = v;
94 struct mm_struct *mm = map->vm_mm; 108 struct mm_struct *mm = vma->vm_mm;
95 struct file *file = map->vm_file; 109 struct file *file = vma->vm_file;
96 int flags = map->vm_flags; 110 int flags = vma->vm_flags;
97 unsigned long ino = 0; 111 unsigned long ino = 0;
98 dev_t dev = 0; 112 dev_t dev = 0;
99 int len; 113 int len;
100 114
101 if (file) { 115 if (file) {
102 struct inode *inode = map->vm_file->f_dentry->d_inode; 116 struct inode *inode = vma->vm_file->f_dentry->d_inode;
103 dev = inode->i_sb->s_dev; 117 dev = inode->i_sb->s_dev;
104 ino = inode->i_ino; 118 ino = inode->i_ino;
105 } 119 }
106 120
107 seq_printf(m, "%08lx-%08lx %c%c%c%c %08lx %02x:%02x %lu %n", 121 seq_printf(m, "%08lx-%08lx %c%c%c%c %08lx %02x:%02x %lu %n",
108 map->vm_start, 122 vma->vm_start,
109 map->vm_end, 123 vma->vm_end,
110 flags & VM_READ ? 'r' : '-', 124 flags & VM_READ ? 'r' : '-',
111 flags & VM_WRITE ? 'w' : '-', 125 flags & VM_WRITE ? 'w' : '-',
112 flags & VM_EXEC ? 'x' : '-', 126 flags & VM_EXEC ? 'x' : '-',
113 flags & VM_MAYSHARE ? 's' : 'p', 127 flags & VM_MAYSHARE ? 's' : 'p',
114 map->vm_pgoff << PAGE_SHIFT, 128 vma->vm_pgoff << PAGE_SHIFT,
115 MAJOR(dev), MINOR(dev), ino, &len); 129 MAJOR(dev), MINOR(dev), ino, &len);
116 130
117 /* 131 /*
118 * Print the dentry name for named mappings, and a 132 * Print the dentry name for named mappings, and a
119 * special [heap] marker for the heap: 133 * special [heap] marker for the heap:
120 */ 134 */
121 if (map->vm_file) { 135 if (file) {
122 pad_len_spaces(m, len); 136 pad_len_spaces(m, len);
123 seq_path(m, file->f_vfsmnt, file->f_dentry, ""); 137 seq_path(m, file->f_vfsmnt, file->f_dentry, "\n");
124 } else { 138 } else {
125 if (mm) { 139 if (mm) {
126 if (map->vm_start <= mm->start_brk && 140 if (vma->vm_start <= mm->start_brk &&
127 map->vm_end >= mm->brk) { 141 vma->vm_end >= mm->brk) {
128 pad_len_spaces(m, len); 142 pad_len_spaces(m, len);
129 seq_puts(m, "[heap]"); 143 seq_puts(m, "[heap]");
130 } else { 144 } else {
131 if (map->vm_start <= mm->start_stack && 145 if (vma->vm_start <= mm->start_stack &&
132 map->vm_end >= mm->start_stack) { 146 vma->vm_end >= mm->start_stack) {
133 147
134 pad_len_spaces(m, len); 148 pad_len_spaces(m, len);
135 seq_puts(m, "[stack]"); 149 seq_puts(m, "[stack]");
@@ -141,24 +155,146 @@ static int show_map(struct seq_file *m, void *v)
141 } 155 }
142 } 156 }
143 seq_putc(m, '\n'); 157 seq_putc(m, '\n');
144 if (m->count < m->size) /* map is copied successfully */ 158
145 m->version = (map != get_gate_vma(task))? map->vm_start: 0; 159 if (mss)
160 seq_printf(m,
161 "Size: %8lu kB\n"
162 "Rss: %8lu kB\n"
163 "Shared_Clean: %8lu kB\n"
164 "Shared_Dirty: %8lu kB\n"
165 "Private_Clean: %8lu kB\n"
166 "Private_Dirty: %8lu kB\n",
167 (vma->vm_end - vma->vm_start) >> 10,
168 mss->resident >> 10,
169 mss->shared_clean >> 10,
170 mss->shared_dirty >> 10,
171 mss->private_clean >> 10,
172 mss->private_dirty >> 10);
173
174 if (m->count < m->size) /* vma is copied successfully */
175 m->version = (vma != get_gate_vma(task))? vma->vm_start: 0;
146 return 0; 176 return 0;
147} 177}
148 178
179static int show_map(struct seq_file *m, void *v)
180{
181 return show_map_internal(m, v, 0);
182}
183
184static void smaps_pte_range(struct vm_area_struct *vma, pmd_t *pmd,
185 unsigned long addr, unsigned long end,
186 struct mem_size_stats *mss)
187{
188 pte_t *pte, ptent;
189 unsigned long pfn;
190 struct page *page;
191
192 pte = pte_offset_map(pmd, addr);
193 do {
194 ptent = *pte;
195 if (pte_none(ptent) || !pte_present(ptent))
196 continue;
197
198 mss->resident += PAGE_SIZE;
199 pfn = pte_pfn(ptent);
200 if (!pfn_valid(pfn))
201 continue;
202
203 page = pfn_to_page(pfn);
204 if (page_count(page) >= 2) {
205 if (pte_dirty(ptent))
206 mss->shared_dirty += PAGE_SIZE;
207 else
208 mss->shared_clean += PAGE_SIZE;
209 } else {
210 if (pte_dirty(ptent))
211 mss->private_dirty += PAGE_SIZE;
212 else
213 mss->private_clean += PAGE_SIZE;
214 }
215 } while (pte++, addr += PAGE_SIZE, addr != end);
216 pte_unmap(pte - 1);
217 cond_resched_lock(&vma->vm_mm->page_table_lock);
218}
219
220static inline void smaps_pmd_range(struct vm_area_struct *vma, pud_t *pud,
221 unsigned long addr, unsigned long end,
222 struct mem_size_stats *mss)
223{
224 pmd_t *pmd;
225 unsigned long next;
226
227 pmd = pmd_offset(pud, addr);
228 do {
229 next = pmd_addr_end(addr, end);
230 if (pmd_none_or_clear_bad(pmd))
231 continue;
232 smaps_pte_range(vma, pmd, addr, next, mss);
233 } while (pmd++, addr = next, addr != end);
234}
235
236static inline void smaps_pud_range(struct vm_area_struct *vma, pgd_t *pgd,
237 unsigned long addr, unsigned long end,
238 struct mem_size_stats *mss)
239{
240 pud_t *pud;
241 unsigned long next;
242
243 pud = pud_offset(pgd, addr);
244 do {
245 next = pud_addr_end(addr, end);
246 if (pud_none_or_clear_bad(pud))
247 continue;
248 smaps_pmd_range(vma, pud, addr, next, mss);
249 } while (pud++, addr = next, addr != end);
250}
251
252static inline void smaps_pgd_range(struct vm_area_struct *vma,
253 unsigned long addr, unsigned long end,
254 struct mem_size_stats *mss)
255{
256 pgd_t *pgd;
257 unsigned long next;
258
259 pgd = pgd_offset(vma->vm_mm, addr);
260 do {
261 next = pgd_addr_end(addr, end);
262 if (pgd_none_or_clear_bad(pgd))
263 continue;
264 smaps_pud_range(vma, pgd, addr, next, mss);
265 } while (pgd++, addr = next, addr != end);
266}
267
268static int show_smap(struct seq_file *m, void *v)
269{
270 struct vm_area_struct *vma = v;
271 struct mm_struct *mm = vma->vm_mm;
272 struct mem_size_stats mss;
273
274 memset(&mss, 0, sizeof mss);
275
276 if (mm) {
277 spin_lock(&mm->page_table_lock);
278 smaps_pgd_range(vma, vma->vm_start, vma->vm_end, &mss);
279 spin_unlock(&mm->page_table_lock);
280 }
281
282 return show_map_internal(m, v, &mss);
283}
284
149static void *m_start(struct seq_file *m, loff_t *pos) 285static void *m_start(struct seq_file *m, loff_t *pos)
150{ 286{
151 struct task_struct *task = m->private; 287 struct task_struct *task = m->private;
152 unsigned long last_addr = m->version; 288 unsigned long last_addr = m->version;
153 struct mm_struct *mm; 289 struct mm_struct *mm;
154 struct vm_area_struct *map, *tail_map; 290 struct vm_area_struct *vma, *tail_vma;
155 loff_t l = *pos; 291 loff_t l = *pos;
156 292
157 /* 293 /*
158 * We remember last_addr rather than next_addr to hit with 294 * We remember last_addr rather than next_addr to hit with
159 * mmap_cache most of the time. We have zero last_addr at 295 * mmap_cache most of the time. We have zero last_addr at
160 * the begining and also after lseek. We will have -1 last_addr 296 * the beginning and also after lseek. We will have -1 last_addr
161 * after the end of the maps. 297 * after the end of the vmas.
162 */ 298 */
163 299
164 if (last_addr == -1UL) 300 if (last_addr == -1UL)
@@ -168,47 +304,47 @@ static void *m_start(struct seq_file *m, loff_t *pos)
168 if (!mm) 304 if (!mm)
169 return NULL; 305 return NULL;
170 306
171 tail_map = get_gate_vma(task); 307 tail_vma = get_gate_vma(task);
172 down_read(&mm->mmap_sem); 308 down_read(&mm->mmap_sem);
173 309
174 /* Start with last addr hint */ 310 /* Start with last addr hint */
175 if (last_addr && (map = find_vma(mm, last_addr))) { 311 if (last_addr && (vma = find_vma(mm, last_addr))) {
176 map = map->vm_next; 312 vma = vma->vm_next;
177 goto out; 313 goto out;
178 } 314 }
179 315
180 /* 316 /*
181 * Check the map index is within the range and do 317 * Check the vma index is within the range and do
182 * sequential scan until m_index. 318 * sequential scan until m_index.
183 */ 319 */
184 map = NULL; 320 vma = NULL;
185 if ((unsigned long)l < mm->map_count) { 321 if ((unsigned long)l < mm->map_count) {
186 map = mm->mmap; 322 vma = mm->mmap;
187 while (l-- && map) 323 while (l-- && vma)
188 map = map->vm_next; 324 vma = vma->vm_next;
189 goto out; 325 goto out;
190 } 326 }
191 327
192 if (l != mm->map_count) 328 if (l != mm->map_count)
193 tail_map = NULL; /* After gate map */ 329 tail_vma = NULL; /* After gate vma */
194 330
195out: 331out:
196 if (map) 332 if (vma)
197 return map; 333 return vma;
198 334
199 /* End of maps has reached */ 335 /* End of vmas has been reached */
200 m->version = (tail_map != NULL)? 0: -1UL; 336 m->version = (tail_vma != NULL)? 0: -1UL;
201 up_read(&mm->mmap_sem); 337 up_read(&mm->mmap_sem);
202 mmput(mm); 338 mmput(mm);
203 return tail_map; 339 return tail_vma;
204} 340}
205 341
206static void m_stop(struct seq_file *m, void *v) 342static void m_stop(struct seq_file *m, void *v)
207{ 343{
208 struct task_struct *task = m->private; 344 struct task_struct *task = m->private;
209 struct vm_area_struct *map = v; 345 struct vm_area_struct *vma = v;
210 if (map && map != get_gate_vma(task)) { 346 if (vma && vma != get_gate_vma(task)) {
211 struct mm_struct *mm = map->vm_mm; 347 struct mm_struct *mm = vma->vm_mm;
212 up_read(&mm->mmap_sem); 348 up_read(&mm->mmap_sem);
213 mmput(mm); 349 mmput(mm);
214 } 350 }
@@ -217,14 +353,14 @@ static void m_stop(struct seq_file *m, void *v)
217static void *m_next(struct seq_file *m, void *v, loff_t *pos) 353static void *m_next(struct seq_file *m, void *v, loff_t *pos)
218{ 354{
219 struct task_struct *task = m->private; 355 struct task_struct *task = m->private;
220 struct vm_area_struct *map = v; 356 struct vm_area_struct *vma = v;
221 struct vm_area_struct *tail_map = get_gate_vma(task); 357 struct vm_area_struct *tail_vma = get_gate_vma(task);
222 358
223 (*pos)++; 359 (*pos)++;
224 if (map && (map != tail_map) && map->vm_next) 360 if (vma && (vma != tail_vma) && vma->vm_next)
225 return map->vm_next; 361 return vma->vm_next;
226 m_stop(m, v); 362 m_stop(m, v);
227 return (map != tail_map)? tail_map: NULL; 363 return (vma != tail_vma)? tail_vma: NULL;
228} 364}
229 365
230struct seq_operations proc_pid_maps_op = { 366struct seq_operations proc_pid_maps_op = {
@@ -233,3 +369,140 @@ struct seq_operations proc_pid_maps_op = {
233 .stop = m_stop, 369 .stop = m_stop,
234 .show = show_map 370 .show = show_map
235}; 371};
372
373struct seq_operations proc_pid_smaps_op = {
374 .start = m_start,
375 .next = m_next,
376 .stop = m_stop,
377 .show = show_smap
378};
379
380#ifdef CONFIG_NUMA
381
382struct numa_maps {
383 unsigned long pages;
384 unsigned long anon;
385 unsigned long mapped;
386 unsigned long mapcount_max;
387 unsigned long node[MAX_NUMNODES];
388};
389
390/*
391 * Calculate numa node maps for a vma
392 */
393static struct numa_maps *get_numa_maps(const struct vm_area_struct *vma)
394{
395 struct page *page;
396 unsigned long vaddr;
397 struct mm_struct *mm = vma->vm_mm;
398 int i;
399 struct numa_maps *md = kmalloc(sizeof(struct numa_maps), GFP_KERNEL);
400
401 if (!md)
402 return NULL;
403 md->pages = 0;
404 md->anon = 0;
405 md->mapped = 0;
406 md->mapcount_max = 0;
407 for_each_node(i)
408 md->node[i] =0;
409
410 spin_lock(&mm->page_table_lock);
411 for (vaddr = vma->vm_start; vaddr < vma->vm_end; vaddr += PAGE_SIZE) {
412 page = follow_page(mm, vaddr, 0);
413 if (page) {
414 int count = page_mapcount(page);
415
416 if (count)
417 md->mapped++;
418 if (count > md->mapcount_max)
419 md->mapcount_max = count;
420 md->pages++;
421 if (PageAnon(page))
422 md->anon++;
423 md->node[page_to_nid(page)]++;
424 }
425 }
426 spin_unlock(&mm->page_table_lock);
427 return md;
428}
429
430static int show_numa_map(struct seq_file *m, void *v)
431{
432 struct task_struct *task = m->private;
433 struct vm_area_struct *vma = v;
434 struct mempolicy *pol;
435 struct numa_maps *md;
436 struct zone **z;
437 int n;
438 int first;
439
440 if (!vma->vm_mm)
441 return 0;
442
443 md = get_numa_maps(vma);
444 if (!md)
445 return 0;
446
447 seq_printf(m, "%08lx", vma->vm_start);
448 pol = get_vma_policy(task, vma, vma->vm_start);
449 /* Print policy */
450 switch (pol->policy) {
451 case MPOL_PREFERRED:
452 seq_printf(m, " prefer=%d", pol->v.preferred_node);
453 break;
454 case MPOL_BIND:
455 seq_printf(m, " bind={");
456 first = 1;
457 for (z = pol->v.zonelist->zones; *z; z++) {
458
459 if (!first)
460 seq_putc(m, ',');
461 else
462 first = 0;
463 seq_printf(m, "%d/%s", (*z)->zone_pgdat->node_id,
464 (*z)->name);
465 }
466 seq_putc(m, '}');
467 break;
468 case MPOL_INTERLEAVE:
469 seq_printf(m, " interleave={");
470 first = 1;
471 for_each_node(n) {
472 if (test_bit(n, pol->v.nodes)) {
473 if (!first)
474 seq_putc(m,',');
475 else
476 first = 0;
477 seq_printf(m, "%d",n);
478 }
479 }
480 seq_putc(m, '}');
481 break;
482 default:
483 seq_printf(m," default");
484 break;
485 }
486 seq_printf(m, " MaxRef=%lu Pages=%lu Mapped=%lu",
487 md->mapcount_max, md->pages, md->mapped);
488 if (md->anon)
489 seq_printf(m," Anon=%lu",md->anon);
490
491 for_each_online_node(n) {
492 if (md->node[n])
493 seq_printf(m, " N%d=%lu", n, md->node[n]);
494 }
495 seq_putc(m, '\n');
496 kfree(md);
497 if (m->count < m->size) /* vma is copied successfully */
498 m->version = (vma != get_gate_vma(task)) ? vma->vm_start : 0;
499 return 0;
500}
501
502struct seq_operations proc_pid_numa_maps_op = {
503 .start = m_start,
504 .next = m_next,
505 .stop = m_stop,
506 .show = show_numa_map
507};
508#endif
diff --git a/fs/xattr.c b/fs/xattr.c
index 6acd5c63da91..dc8bc7624f26 100644
--- a/fs/xattr.c
+++ b/fs/xattr.c
@@ -51,20 +51,29 @@ setxattr(struct dentry *d, char __user *name, void __user *value,
51 } 51 }
52 } 52 }
53 53
54 down(&d->d_inode->i_sem);
55 error = security_inode_setxattr(d, kname, kvalue, size, flags);
56 if (error)
57 goto out;
54 error = -EOPNOTSUPP; 58 error = -EOPNOTSUPP;
55 if (d->d_inode->i_op && d->d_inode->i_op->setxattr) { 59 if (d->d_inode->i_op && d->d_inode->i_op->setxattr) {
56 down(&d->d_inode->i_sem); 60 error = d->d_inode->i_op->setxattr(d, kname, kvalue,
57 error = security_inode_setxattr(d, kname, kvalue, size, flags); 61 size, flags);
58 if (error)
59 goto out;
60 error = d->d_inode->i_op->setxattr(d, kname, kvalue, size, flags);
61 if (!error) { 62 if (!error) {
62 fsnotify_xattr(d); 63 fsnotify_xattr(d);
63 security_inode_post_setxattr(d, kname, kvalue, size, flags); 64 security_inode_post_setxattr(d, kname, kvalue,
65 size, flags);
64 } 66 }
65out: 67 } else if (!strncmp(kname, XATTR_SECURITY_PREFIX,
66 up(&d->d_inode->i_sem); 68 sizeof XATTR_SECURITY_PREFIX - 1)) {
69 const char *suffix = kname + sizeof XATTR_SECURITY_PREFIX - 1;
70 error = security_inode_setsecurity(d->d_inode, suffix, kvalue,
71 size, flags);
72 if (!error)
73 fsnotify_xattr(d);
67 } 74 }
75out:
76 up(&d->d_inode->i_sem);
68 if (kvalue) 77 if (kvalue)
69 kfree(kvalue); 78 kfree(kvalue);
70 return error; 79 return error;
@@ -139,20 +148,25 @@ getxattr(struct dentry *d, char __user *name, void __user *value, size_t size)
139 return -ENOMEM; 148 return -ENOMEM;
140 } 149 }
141 150
151 error = security_inode_getxattr(d, kname);
152 if (error)
153 goto out;
142 error = -EOPNOTSUPP; 154 error = -EOPNOTSUPP;
143 if (d->d_inode->i_op && d->d_inode->i_op->getxattr) { 155 if (d->d_inode->i_op && d->d_inode->i_op->getxattr)
144 error = security_inode_getxattr(d, kname);
145 if (error)
146 goto out;
147 error = d->d_inode->i_op->getxattr(d, kname, kvalue, size); 156 error = d->d_inode->i_op->getxattr(d, kname, kvalue, size);
148 if (error > 0) { 157 else if (!strncmp(kname, XATTR_SECURITY_PREFIX,
149 if (size && copy_to_user(value, kvalue, error)) 158 sizeof XATTR_SECURITY_PREFIX - 1)) {
150 error = -EFAULT; 159 const char *suffix = kname + sizeof XATTR_SECURITY_PREFIX - 1;
151 } else if (error == -ERANGE && size >= XATTR_SIZE_MAX) { 160 error = security_inode_getsecurity(d->d_inode, suffix, kvalue,
152 /* The file system tried to returned a value bigger 161 size);
153 than XATTR_SIZE_MAX bytes. Not possible. */ 162 }
154 error = -E2BIG; 163 if (error > 0) {
155 } 164 if (size && copy_to_user(value, kvalue, error))
165 error = -EFAULT;
166 } else if (error == -ERANGE && size >= XATTR_SIZE_MAX) {
167 /* The file system tried to returned a value bigger
168 than XATTR_SIZE_MAX bytes. Not possible. */
169 error = -E2BIG;
156 } 170 }
157out: 171out:
158 if (kvalue) 172 if (kvalue)
@@ -221,20 +235,24 @@ listxattr(struct dentry *d, char __user *list, size_t size)
221 return -ENOMEM; 235 return -ENOMEM;
222 } 236 }
223 237
238 error = security_inode_listxattr(d);
239 if (error)
240 goto out;
224 error = -EOPNOTSUPP; 241 error = -EOPNOTSUPP;
225 if (d->d_inode->i_op && d->d_inode->i_op->listxattr) { 242 if (d->d_inode->i_op && d->d_inode->i_op->listxattr) {
226 error = security_inode_listxattr(d);
227 if (error)
228 goto out;
229 error = d->d_inode->i_op->listxattr(d, klist, size); 243 error = d->d_inode->i_op->listxattr(d, klist, size);
230 if (error > 0) { 244 } else {
231 if (size && copy_to_user(list, klist, error)) 245 error = security_inode_listsecurity(d->d_inode, klist, size);
232 error = -EFAULT; 246 if (size && error >= size)
233 } else if (error == -ERANGE && size >= XATTR_LIST_MAX) { 247 error = -ERANGE;
234 /* The file system tried to returned a list bigger 248 }
235 than XATTR_LIST_MAX bytes. Not possible. */ 249 if (error > 0) {
236 error = -E2BIG; 250 if (size && copy_to_user(list, klist, error))
237 } 251 error = -EFAULT;
252 } else if (error == -ERANGE && size >= XATTR_LIST_MAX) {
253 /* The file system tried to returned a list bigger
254 than XATTR_LIST_MAX bytes. Not possible. */
255 error = -E2BIG;
238 } 256 }
239out: 257out:
240 if (klist) 258 if (klist)
diff --git a/include/asm-alpha/page.h b/include/asm-alpha/page.h
index 0577daffc720..fa0b41b164a7 100644
--- a/include/asm-alpha/page.h
+++ b/include/asm-alpha/page.h
@@ -63,20 +63,6 @@ typedef unsigned long pgprot_t;
63 63
64#endif /* STRICT_MM_TYPECHECKS */ 64#endif /* STRICT_MM_TYPECHECKS */
65 65
66/* Pure 2^n version of get_order */
67extern __inline__ int get_order(unsigned long size)
68{
69 int order;
70
71 size = (size-1) >> (PAGE_SHIFT-1);
72 order = -1;
73 do {
74 size >>= 1;
75 order++;
76 } while (size);
77 return order;
78}
79
80#ifdef USE_48_BIT_KSEG 66#ifdef USE_48_BIT_KSEG
81#define PAGE_OFFSET 0xffff800000000000UL 67#define PAGE_OFFSET 0xffff800000000000UL
82#else 68#else
@@ -112,4 +98,6 @@ extern __inline__ int get_order(unsigned long size)
112 98
113#endif /* __KERNEL__ */ 99#endif /* __KERNEL__ */
114 100
101#include <asm-generic/page.h>
102
115#endif /* _ALPHA_PAGE_H */ 103#endif /* _ALPHA_PAGE_H */
diff --git a/include/asm-alpha/types.h b/include/asm-alpha/types.h
index 43264d219246..f5716139ec89 100644
--- a/include/asm-alpha/types.h
+++ b/include/asm-alpha/types.h
@@ -56,8 +56,6 @@ typedef unsigned long u64;
56typedef u64 dma_addr_t; 56typedef u64 dma_addr_t;
57typedef u64 dma64_addr_t; 57typedef u64 dma64_addr_t;
58 58
59typedef unsigned short kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
62#endif /* __KERNEL__ */ 60#endif /* __KERNEL__ */
63#endif /* _ALPHA_TYPES_H */ 61#endif /* _ALPHA_TYPES_H */
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 7495026e2c18..e350dcb544e8 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -383,39 +383,45 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
383 *vaddr++ = inl(io_addr); 383 *vaddr++ = inl(io_addr);
384} 384}
385 385
386#define __is_io_address(p) (((unsigned long)p >= 0x0) && \ 386#define PIO_OFFSET 0x10000UL
387 ((unsigned long)p <= 0x0000ffff)) 387#define PIO_MASK 0x0ffffUL
388
389#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
390 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
388static inline unsigned int 391static inline unsigned int
389__ixp4xx_ioread8(void __iomem *port) 392__ixp4xx_ioread8(void __iomem *addr)
390{ 393{
394 unsigned long port = (unsigned long __force)addr;
391 if (__is_io_address(port)) 395 if (__is_io_address(port))
392 return (unsigned int)__ixp4xx_inb((unsigned int)port); 396 return (unsigned int)__ixp4xx_inb(port & PIO_MASK);
393 else 397 else
394#ifndef CONFIG_IXP4XX_INDIRECT_PCI 398#ifndef CONFIG_IXP4XX_INDIRECT_PCI
395 return (unsigned int)__raw_readb((u32)port); 399 return (unsigned int)__raw_readb(port);
396#else 400#else
397 return (unsigned int)__ixp4xx_readb((u32)port); 401 return (unsigned int)__ixp4xx_readb(port);
398#endif 402#endif
399} 403}
400 404
401static inline void 405static inline void
402__ixp4xx_ioread8_rep(u32 port, u8 *vaddr, u32 count) 406__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
403{ 407{
408 unsigned long port = (unsigned long __force)addr;
404 if (__is_io_address(port)) 409 if (__is_io_address(port))
405 __ixp4xx_insb(port, vaddr, count); 410 __ixp4xx_insb(port & PIO_MASK, vaddr, count);
406 else 411 else
407#ifndef CONFIG_IXP4XX_INDIRECT_PCI 412#ifndef CONFIG_IXP4XX_INDIRECT_PCI
408 __raw_readsb((void __iomem *)port, vaddr, count); 413 __raw_readsb(addr, vaddr, count);
409#else 414#else
410 __ixp4xx_readsb(port, vaddr, count); 415 __ixp4xx_readsb(port, vaddr, count);
411#endif 416#endif
412} 417}
413 418
414static inline unsigned int 419static inline unsigned int
415__ixp4xx_ioread16(void __iomem *port) 420__ixp4xx_ioread16(void __iomem *addr)
416{ 421{
422 unsigned long port = (unsigned long __force)addr;
417 if (__is_io_address(port)) 423 if (__is_io_address(port))
418 return (unsigned int)__ixp4xx_inw((unsigned int)port); 424 return (unsigned int)__ixp4xx_inw(port & PIO_MASK);
419 else 425 else
420#ifndef CONFIG_IXP4XX_INDIRECT_PCI 426#ifndef CONFIG_IXP4XX_INDIRECT_PCI
421 return le16_to_cpu(__raw_readw((u32)port)); 427 return le16_to_cpu(__raw_readw((u32)port));
@@ -425,23 +431,25 @@ __ixp4xx_ioread16(void __iomem *port)
425} 431}
426 432
427static inline void 433static inline void
428__ixp4xx_ioread16_rep(u32 port, u16 *vaddr, u32 count) 434__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
429{ 435{
436 unsigned long port = (unsigned long __force)addr;
430 if (__is_io_address(port)) 437 if (__is_io_address(port))
431 __ixp4xx_insw(port, vaddr, count); 438 __ixp4xx_insw(port & PIO_MASK, vaddr, count);
432 else 439 else
433#ifndef CONFIG_IXP4XX_INDIRECT_PCI 440#ifndef CONFIG_IXP4XX_INDIRECT_PCI
434 __raw_readsw((void __iomem *)port, vaddr, count); 441 __raw_readsw(addr, vaddr, count);
435#else 442#else
436 __ixp4xx_readsw(port, vaddr, count); 443 __ixp4xx_readsw(port, vaddr, count);
437#endif 444#endif
438} 445}
439 446
440static inline unsigned int 447static inline unsigned int
441__ixp4xx_ioread32(void __iomem *port) 448__ixp4xx_ioread32(void __iomem *addr)
442{ 449{
450 unsigned long port = (unsigned long __force)addr;
443 if (__is_io_address(port)) 451 if (__is_io_address(port))
444 return (unsigned int)__ixp4xx_inl((unsigned int)port); 452 return (unsigned int)__ixp4xx_inl(port & PIO_MASK);
445 else { 453 else {
446#ifndef CONFIG_IXP4XX_INDIRECT_PCI 454#ifndef CONFIG_IXP4XX_INDIRECT_PCI
447 return le32_to_cpu(__raw_readl((u32)port)); 455 return le32_to_cpu(__raw_readl((u32)port));
@@ -452,90 +460,100 @@ __ixp4xx_ioread32(void __iomem *port)
452} 460}
453 461
454static inline void 462static inline void
455__ixp4xx_ioread32_rep(u32 port, u32 *vaddr, u32 count) 463__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
456{ 464{
465 unsigned long port = (unsigned long __force)addr;
457 if (__is_io_address(port)) 466 if (__is_io_address(port))
458 __ixp4xx_insl(port, vaddr, count); 467 __ixp4xx_insl(port & PIO_MASK, vaddr, count);
459 else 468 else
460#ifndef CONFIG_IXP4XX_INDIRECT_PCI 469#ifndef CONFIG_IXP4XX_INDIRECT_PCI
461 __raw_readsl((void __iomem *)port, vaddr, count); 470 __raw_readsl(addr, vaddr, count);
462#else 471#else
463 __ixp4xx_readsl(port, vaddr, count); 472 __ixp4xx_readsl(port, vaddr, count);
464#endif 473#endif
465} 474}
466 475
467static inline void 476static inline void
468__ixp4xx_iowrite8(u8 value, void __iomem *port) 477__ixp4xx_iowrite8(u8 value, void __iomem *addr)
469{ 478{
479 unsigned long port = (unsigned long __force)addr;
470 if (__is_io_address(port)) 480 if (__is_io_address(port))
471 __ixp4xx_outb(value, (unsigned int)port); 481 __ixp4xx_outb(value, port & PIO_MASK);
472 else 482 else
473#ifndef CONFIG_IXP4XX_INDIRECT_PCI 483#ifndef CONFIG_IXP4XX_INDIRECT_PCI
474 __raw_writeb(value, (u32)port); 484 __raw_writeb(value, port);
475#else 485#else
476 __ixp4xx_writeb(value, (u32)port); 486 __ixp4xx_writeb(value, port);
477#endif 487#endif
478} 488}
479 489
480static inline void 490static inline void
481__ixp4xx_iowrite8_rep(u32 port, u8 *vaddr, u32 count) 491__ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
482{ 492{
493 unsigned long port = (unsigned long __force)addr;
483 if (__is_io_address(port)) 494 if (__is_io_address(port))
484 __ixp4xx_outsb(port, vaddr, count); 495 __ixp4xx_outsb(port & PIO_MASK, vaddr, count);
496 else
485#ifndef CONFIG_IXP4XX_INDIRECT_PCI 497#ifndef CONFIG_IXP4XX_INDIRECT_PCI
486 __raw_writesb((void __iomem *)port, vaddr, count); 498 __raw_writesb(addr, vaddr, count);
487#else 499#else
488 __ixp4xx_writesb(port, vaddr, count); 500 __ixp4xx_writesb(port, vaddr, count);
489#endif 501#endif
490} 502}
491 503
492static inline void 504static inline void
493__ixp4xx_iowrite16(u16 value, void __iomem *port) 505__ixp4xx_iowrite16(u16 value, void __iomem *addr)
494{ 506{
507 unsigned long port = (unsigned long __force)addr;
495 if (__is_io_address(port)) 508 if (__is_io_address(port))
496 __ixp4xx_outw(value, (unsigned int)port); 509 __ixp4xx_outw(value, port & PIO_MASK);
497 else 510 else
498#ifndef CONFIG_IXP4XX_INDIRECT_PCI 511#ifndef CONFIG_IXP4XX_INDIRECT_PCI
499 __raw_writew(cpu_to_le16(value), (u32)port); 512 __raw_writew(cpu_to_le16(value), addr);
500#else 513#else
501 __ixp4xx_writew(value, (u32)port); 514 __ixp4xx_writew(value, port);
502#endif 515#endif
503} 516}
504 517
505static inline void 518static inline void
506__ixp4xx_iowrite16_rep(u32 port, u16 *vaddr, u32 count) 519__ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
507{ 520{
521 unsigned long port = (unsigned long __force)addr;
508 if (__is_io_address(port)) 522 if (__is_io_address(port))
509 __ixp4xx_outsw(port, vaddr, count); 523 __ixp4xx_outsw(port & PIO_MASK, vaddr, count);
524 else
510#ifndef CONFIG_IXP4XX_INDIRECT_PCI 525#ifndef CONFIG_IXP4XX_INDIRECT_PCI
511 __raw_readsw((void __iomem *)port, vaddr, count); 526 __raw_writesw(addr, vaddr, count);
512#else 527#else
513 __ixp4xx_writesw(port, vaddr, count); 528 __ixp4xx_writesw(port, vaddr, count);
514#endif 529#endif
515} 530}
516 531
517static inline void 532static inline void
518__ixp4xx_iowrite32(u32 value, void __iomem *port) 533__ixp4xx_iowrite32(u32 value, void __iomem *addr)
519{ 534{
535 unsigned long port = (unsigned long __force)addr;
520 if (__is_io_address(port)) 536 if (__is_io_address(port))
521 __ixp4xx_outl(value, (unsigned int)port); 537 __ixp4xx_outl(value, port & PIO_MASK);
522 else 538 else
523#ifndef CONFIG_IXP4XX_INDIRECT_PCI 539#ifndef CONFIG_IXP4XX_INDIRECT_PCI
524 __raw_writel(cpu_to_le32(value), (u32)port); 540 __raw_writel(cpu_to_le32(value), port);
525#else 541#else
526 __ixp4xx_writel(value, (u32)port); 542 __ixp4xx_writel(value, port);
527#endif 543#endif
528} 544}
529 545
530static inline void 546static inline void
531__ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count) 547__ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
532{ 548{
549 unsigned long port = (unsigned long __force)addr;
533 if (__is_io_address(port)) 550 if (__is_io_address(port))
534 __ixp4xx_outsl(port, vaddr, count); 551 __ixp4xx_outsl(port & PIO_MASK, vaddr, count);
552 else
535#ifndef CONFIG_IXP4XX_INDIRECT_PCI 553#ifndef CONFIG_IXP4XX_INDIRECT_PCI
536 __raw_readsl((void __iomem *)port, vaddr, count); 554 __raw_writesl(addr, vaddr, count);
537#else 555#else
538 __ixp4xx_outsl(port, vaddr, count); 556 __ixp4xx_writesl(port, vaddr, count);
539#endif 557#endif
540} 558}
541 559
@@ -555,7 +573,7 @@ __ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count)
555#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c) 573#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c)
556#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c) 574#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c)
557 575
558#define ioport_map(port, nr) ((void __iomem*)port) 576#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET))
559#define ioport_unmap(addr) 577#define ioport_unmap(addr)
560 578
561#endif // __ASM_ARM_ARCH_IO_H 579#endif // __ASM_ARM_ARCH_IO_H
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index 3a626c03ea26..d13ee7f78c70 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -83,17 +83,6 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
83#define IXP4XX_GPIO_OUT 0x1 83#define IXP4XX_GPIO_OUT 0x1
84#define IXP4XX_GPIO_IN 0x2 84#define IXP4XX_GPIO_IN 0x2
85 85
86#define IXP4XX_GPIO_INTSTYLE_MASK 0x7C /* Bits [6:2] define interrupt style */
87
88/*
89 * GPIO interrupt types.
90 */
91#define IXP4XX_GPIO_ACTIVE_HIGH 0x4 /* Default */
92#define IXP4XX_GPIO_ACTIVE_LOW 0x8
93#define IXP4XX_GPIO_RISING_EDGE 0x10
94#define IXP4XX_GPIO_FALLING_EDGE 0x20
95#define IXP4XX_GPIO_TRANSITIONAL 0x40
96
97/* GPIO signal types */ 86/* GPIO signal types */
98#define IXP4XX_GPIO_LOW 0 87#define IXP4XX_GPIO_LOW 0
99#define IXP4XX_GPIO_HIGH 1 88#define IXP4XX_GPIO_HIGH 1
@@ -102,7 +91,13 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
102#define IXP4XX_GPIO_CLK_0 14 91#define IXP4XX_GPIO_CLK_0 14
103#define IXP4XX_GPIO_CLK_1 15 92#define IXP4XX_GPIO_CLK_1 15
104 93
105extern void gpio_line_config(u8 line, u32 style); 94static inline void gpio_line_config(u8 line, u32 direction)
95{
96 if (direction == IXP4XX_GPIO_OUT)
97 *IXP4XX_GPIO_GPOER |= (1 << line);
98 else
99 *IXP4XX_GPIO_GPOER &= ~(1 << line);
100}
106 101
107static inline void gpio_line_get(u8 line, int *value) 102static inline void gpio_line_get(u8 line, int *value)
108{ 103{
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 51f0fe0ac165..939d9e5020a0 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -818,6 +818,23 @@
818#define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge 818#define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge
819 Interrupt Enable */ 819 Interrupt Enable */
820 820
821#define UP2OCR __REG(0x40600020) /* USB Port 2 Output Control register */
822
823#define UP2OCR_CPVEN (1 << 0) /* Charge Pump Vbus Enable */
824#define UP2OCR_CPVPE (1 << 1) /* Charge Pump Vbus Pulse Enable */
825#define UP2OCR_DPPDE (1 << 2) /* Host Port 2 Transceiver D+ Pull Down Enable */
826#define UP2OCR_DMPDE (1 << 3) /* Host Port 2 Transceiver D- Pull Down Enable */
827#define UP2OCR_DPPUE (1 << 4) /* Host Port 2 Transceiver D+ Pull Up Enable */
828#define UP2OCR_DMPUE (1 << 5) /* Host Port 2 Transceiver D- Pull Up Enable */
829#define UP2OCR_DPPUBE (1 << 6) /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */
830#define UP2OCR_DMPUBE (1 << 7) /* Host Port 2 Transceiver D- Pull Up Bypass Enable */
831#define UP2OCR_EXSP (1 << 8) /* External Transceiver Speed Control */
832#define UP2OCR_EXSUS (1 << 9) /* External Transceiver Speed Enable */
833#define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */
834#define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */
835#define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */
836#define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */
837
821#define UDCCSN(x) __REG2(0x40600100, (x) << 2) 838#define UDCCSN(x) __REG2(0x40600100, (x) << 2)
822#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ 839#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */
823#define UDCCSR0_SA (1 << 7) /* Setup Active */ 840#define UDCCSR0_SA (1 << 7) /* Setup Active */
@@ -1423,6 +1440,7 @@
1423#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) 1440#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
1424#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) 1441#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
1425#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) 1442#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
1443#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
1426#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) 1444#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
1427#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) 1445#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)
1428#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT) 1446#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT)
@@ -1510,6 +1528,8 @@
1510#define PSSR_BFS (1 << 1) /* Battery Fault Status */ 1528#define PSSR_BFS (1 << 1) /* Battery Fault Status */
1511#define PSSR_SSS (1 << 0) /* Software Sleep Status */ 1529#define PSSR_SSS (1 << 0) /* Software Sleep Status */
1512 1530
1531#define PSLR_SL_ROD (1 << 20) /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */
1532
1513#define PCFR_RO (1 << 15) /* RDH Override */ 1533#define PCFR_RO (1 << 15) /* RDH Override */
1514#define PCFR_PO (1 << 14) /* PH Override */ 1534#define PCFR_PO (1 << 14) /* PH Override */
1515#define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ 1535#define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */
@@ -1517,6 +1537,7 @@
1517#define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ 1537#define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */
1518#define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */ 1538#define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */
1519#define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */ 1539#define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */
1540#define PCFR_GPR_EN (1 << 4) /* nRESET_GPIO Pin Enable */
1520#define PCFR_DS (1 << 3) /* Deep Sleep Mode */ 1541#define PCFR_DS (1 << 3) /* Deep Sleep Mode */
1521#define PCFR_FS (1 << 2) /* Float Static Chip Selects */ 1542#define PCFR_FS (1 << 2) /* Float Static Chip Selects */
1522#define PCFR_FP (1 << 1) /* Float PCMCIA controls */ 1543#define PCFR_FP (1 << 1) /* Float PCMCIA controls */
@@ -1810,6 +1831,11 @@
1810#define LCCR0_PDD_S 12 1831#define LCCR0_PDD_S 12
1811#define LCCR0_BM (1 << 20) /* Branch mask */ 1832#define LCCR0_BM (1 << 20) /* Branch mask */
1812#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ 1833#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
1834#define LCCR0_LCDT (1 << 22) /* LCD panel type */
1835#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */
1836#define LCCR0_CMDIM (1 << 24) /* Command interrupt mask */
1837#define LCCR0_OUC (1 << 25) /* Overlay Underlay control bit */
1838#define LCCR0_LDDALT (1 << 26) /* LDD alternate mapping control */
1813 1839
1814#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ 1840#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
1815#define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ 1841#define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \
@@ -2062,7 +2088,10 @@
2062#define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */ 2088#define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */
2063#define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */ 2089#define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */
2064#define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */ 2090#define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */
2091
2065#define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */ 2092#define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */
2093#define UHCRHDA_NOCP (1 << 12) /* No over current protection */
2094
2066#define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */ 2095#define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */
2067#define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */ 2096#define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */
2068#define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */ 2097#define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h
index e5e938b79acc..16f4c3cc1388 100644
--- a/include/asm-arm/arch-s3c2410/regs-clock.h
+++ b/include/asm-arm/arch-s3c2410/regs-clock.h
@@ -1,7 +1,7 @@
1/* linux/include/asm/arch-s3c2410/regs-clock.h 1/* linux/include/asm/arch-s3c2410/regs-clock.h
2 * 2 *
3 * Copyright (c) 2003,2004 Simtec Electronics <linux@simtec.co.uk> 3 * Copyright (c) 2003,2004,2005 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/ 4 * http://armlinux.simtec.co.uk/
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -17,6 +17,7 @@
17 * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion 17 * 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion
18 * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) 18 * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
19 * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA 19 * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA
20 * 27-Aug-2005 Ben Dooks Add clock-slow info
20 */ 21 */
21 22
22#ifndef __ASM_ARM_REGS_CLOCK 23#ifndef __ASM_ARM_REGS_CLOCK
@@ -74,6 +75,12 @@
74#define S3C2410_CLKDIVN_PDIVN (1<<0) 75#define S3C2410_CLKDIVN_PDIVN (1<<0)
75#define S3C2410_CLKDIVN_HDIVN (1<<1) 76#define S3C2410_CLKDIVN_HDIVN (1<<1)
76 77
78#define S3C2410_CLKSLOW_UCLK_OFF (1<<7)
79#define S3C2410_CLKSLOW_MPLL_OFF (1<<5)
80#define S3C2410_CLKSLOW_SLOW (1<<4)
81#define S3C2410_CLKSLOW_SLOWVAL(x) (x)
82#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7)
83
77#ifndef __ASSEMBLY__ 84#ifndef __ASSEMBLY__
78 85
79static inline unsigned int 86static inline unsigned int
diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h
index a43a353f6c7b..0ce6ca588d8c 100644
--- a/include/asm-arm/mach/irq.h
+++ b/include/asm-arm/mach/irq.h
@@ -42,11 +42,11 @@ struct irqchip {
42 /* 42 /*
43 * Set the type of the IRQ. 43 * Set the type of the IRQ.
44 */ 44 */
45 int (*type)(unsigned int, unsigned int); 45 int (*set_type)(unsigned int, unsigned int);
46 /* 46 /*
47 * Set wakeup-enable on the selected IRQ 47 * Set wakeup-enable on the selected IRQ
48 */ 48 */
49 int (*wake)(unsigned int, unsigned int); 49 int (*set_wake)(unsigned int, unsigned int);
50 50
51#ifdef CONFIG_SMP 51#ifdef CONFIG_SMP
52 /* 52 /*
@@ -92,6 +92,14 @@ struct irqdesc {
92extern struct irqdesc irq_desc[]; 92extern struct irqdesc irq_desc[];
93 93
94/* 94/*
95 * Helpful inline function for calling irq descriptor handlers.
96 */
97static inline void desc_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
98{
99 desc->handle(irq, desc, regs);
100}
101
102/*
95 * This is internal. Do not use it. 103 * This is internal. Do not use it.
96 */ 104 */
97extern void (*init_arch_irq)(void); 105extern void (*init_arch_irq)(void);
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 019c45d75730..4da1d532cbeb 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -163,20 +163,6 @@ typedef unsigned long pgprot_t;
163/* the upper-most page table pointer */ 163/* the upper-most page table pointer */
164extern pmd_t *top_pmd; 164extern pmd_t *top_pmd;
165 165
166/* Pure 2^n version of get_order */
167static inline int get_order(unsigned long size)
168{
169 int order;
170
171 size = (size-1) >> (PAGE_SHIFT-1);
172 order = -1;
173 do {
174 size >>= 1;
175 order++;
176 } while (size);
177 return order;
178}
179
180#include <asm/memory.h> 166#include <asm/memory.h>
181 167
182#endif /* !__ASSEMBLY__ */ 168#endif /* !__ASSEMBLY__ */
@@ -186,4 +172,6 @@ static inline int get_order(unsigned long size)
186 172
187#endif /* __KERNEL__ */ 173#endif /* __KERNEL__ */
188 174
175#include <asm-generic/page.h>
176
189#endif 177#endif
diff --git a/include/asm-arm/types.h b/include/asm-arm/types.h
index f4c92e4c8c02..22992ee0627a 100644
--- a/include/asm-arm/types.h
+++ b/include/asm-arm/types.h
@@ -52,8 +52,6 @@ typedef unsigned long long u64;
52typedef u32 dma_addr_t; 52typedef u32 dma_addr_t;
53typedef u32 dma64_addr_t; 53typedef u32 dma64_addr_t;
54 54
55typedef unsigned int kmem_bufctl_t;
56
57#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
58 56
59#endif /* __KERNEL__ */ 57#endif /* __KERNEL__ */
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index abb36e54c966..278de61224d1 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -295,7 +295,7 @@
295#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267) 295#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267)
296#define __NR_tgkill (__NR_SYSCALL_BASE+268) 296#define __NR_tgkill (__NR_SYSCALL_BASE+268)
297#define __NR_utimes (__NR_SYSCALL_BASE+269) 297#define __NR_utimes (__NR_SYSCALL_BASE+269)
298#define __NR_fadvise64_64 (__NR_SYSCALL_BASE+270) 298#define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270)
299#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271) 299#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271)
300#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272) 300#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272)
301#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273) 301#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273)
@@ -515,7 +515,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
515#define __ARCH_WANT_SYS_TIME 515#define __ARCH_WANT_SYS_TIME
516#define __ARCH_WANT_SYS_UTIME 516#define __ARCH_WANT_SYS_UTIME
517#define __ARCH_WANT_SYS_SOCKETCALL 517#define __ARCH_WANT_SYS_SOCKETCALL
518#define __ARCH_WANT_SYS_FADVISE64
519#define __ARCH_WANT_SYS_GETPGRP 518#define __ARCH_WANT_SYS_GETPGRP
520#define __ARCH_WANT_SYS_LLSEEK 519#define __ARCH_WANT_SYS_LLSEEK
521#define __ARCH_WANT_SYS_NICE 520#define __ARCH_WANT_SYS_NICE
diff --git a/include/asm-arm26/page.h b/include/asm-arm26/page.h
index c334079b082b..d3f23ac4d468 100644
--- a/include/asm-arm26/page.h
+++ b/include/asm-arm26/page.h
@@ -89,20 +89,6 @@ typedef unsigned long pgprot_t;
89#ifdef __KERNEL__ 89#ifdef __KERNEL__
90#ifndef __ASSEMBLY__ 90#ifndef __ASSEMBLY__
91 91
92/* Pure 2^n version of get_order */
93static inline int get_order(unsigned long size)
94{
95 int order;
96
97 size = (size-1) >> (PAGE_SHIFT-1);
98 order = -1;
99 do {
100 size >>= 1;
101 order++;
102 } while (size);
103 return order;
104}
105
106#include <asm/memory.h> 92#include <asm/memory.h>
107 93
108#endif /* !__ASSEMBLY__ */ 94#endif /* !__ASSEMBLY__ */
@@ -112,4 +98,6 @@ static inline int get_order(unsigned long size)
112 98
113#endif /* __KERNEL__ */ 99#endif /* __KERNEL__ */
114 100
101#include <asm-generic/page.h>
102
115#endif 103#endif
diff --git a/include/asm-arm26/types.h b/include/asm-arm26/types.h
index 56cbe573a234..81bd357ada02 100644
--- a/include/asm-arm26/types.h
+++ b/include/asm-arm26/types.h
@@ -52,8 +52,6 @@ typedef unsigned long long u64;
52typedef u32 dma_addr_t; 52typedef u32 dma_addr_t;
53typedef u32 dma64_addr_t; 53typedef u32 dma64_addr_t;
54 54
55typedef unsigned int kmem_bufctl_t;
56
57#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
58 56
59#endif /* __KERNEL__ */ 57#endif /* __KERNEL__ */
diff --git a/include/asm-cris/page.h b/include/asm-cris/page.h
index bbf17bd39385..c99c478c482f 100644
--- a/include/asm-cris/page.h
+++ b/include/asm-cris/page.h
@@ -70,19 +70,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
70 70
71#ifndef __ASSEMBLY__ 71#ifndef __ASSEMBLY__
72 72
73/* Pure 2^n version of get_order */
74static inline int get_order(unsigned long size)
75{
76 int order;
77
78 size = (size-1) >> (PAGE_SHIFT-1);
79 order = -1;
80 do {
81 size >>= 1;
82 order++;
83 } while (size);
84 return order;
85}
86#endif /* __ASSEMBLY__ */ 73#endif /* __ASSEMBLY__ */
87 74
88#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 75#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
@@ -90,5 +77,7 @@ static inline int get_order(unsigned long size)
90 77
91#endif /* __KERNEL__ */ 78#endif /* __KERNEL__ */
92 79
80#include <asm-generic/page.h>
81
93#endif /* _CRIS_PAGE_H */ 82#endif /* _CRIS_PAGE_H */
94 83
diff --git a/include/asm-cris/types.h b/include/asm-cris/types.h
index 8fa6d6c7afce..84557c9bac93 100644
--- a/include/asm-cris/types.h
+++ b/include/asm-cris/types.h
@@ -52,8 +52,6 @@ typedef unsigned long long u64;
52typedef u32 dma_addr_t; 52typedef u32 dma_addr_t;
53typedef u32 dma64_addr_t; 53typedef u32 dma64_addr_t;
54 54
55typedef unsigned short kmem_bufctl_t;
56
57#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
58 56
59#endif /* __KERNEL__ */ 57#endif /* __KERNEL__ */
diff --git a/include/asm-frv/page.h b/include/asm-frv/page.h
index f7914f1782b0..4feba567e7fd 100644
--- a/include/asm-frv/page.h
+++ b/include/asm-frv/page.h
@@ -45,21 +45,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
45/* to align the pointer to the (next) page boundary */ 45/* to align the pointer to the (next) page boundary */
46#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) 46#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
47 47
48/* Pure 2^n version of get_order */
49static inline int get_order(unsigned long size) __attribute_const__;
50static inline int get_order(unsigned long size)
51{
52 int order;
53
54 size = (size - 1) >> (PAGE_SHIFT - 1);
55 order = -1;
56 do {
57 size >>= 1;
58 order++;
59 } while (size);
60 return order;
61}
62
63#define devmem_is_allowed(pfn) 1 48#define devmem_is_allowed(pfn) 1
64 49
65#define __pa(vaddr) virt_to_phys((void *) vaddr) 50#define __pa(vaddr) virt_to_phys((void *) vaddr)
@@ -102,4 +87,6 @@ extern unsigned long max_pfn;
102#define WANT_PAGE_VIRTUAL 1 87#define WANT_PAGE_VIRTUAL 1
103#endif 88#endif
104 89
90#include <asm-generic/page.h>
91
105#endif /* _ASM_PAGE_H */ 92#endif /* _ASM_PAGE_H */
diff --git a/include/asm-frv/types.h b/include/asm-frv/types.h
index 1a5b6546bb41..50605df6d8ac 100644
--- a/include/asm-frv/types.h
+++ b/include/asm-frv/types.h
@@ -65,8 +65,6 @@ typedef u64 u_quad_t;
65 65
66typedef u32 dma_addr_t; 66typedef u32 dma_addr_t;
67 67
68typedef unsigned short kmem_bufctl_t;
69
70#endif /* __ASSEMBLY__ */ 68#endif /* __ASSEMBLY__ */
71 69
72#endif /* __KERNEL__ */ 70#endif /* __KERNEL__ */
diff --git a/include/asm-generic/page.h b/include/asm-generic/page.h
new file mode 100644
index 000000000000..a96b5d986b6e
--- /dev/null
+++ b/include/asm-generic/page.h
@@ -0,0 +1,26 @@
1#ifndef _ASM_GENERIC_PAGE_H
2#define _ASM_GENERIC_PAGE_H
3
4#ifdef __KERNEL__
5#ifndef __ASSEMBLY__
6
7#include <linux/compiler.h>
8
9/* Pure 2^n version of get_order */
10static __inline__ __attribute_const__ int get_order(unsigned long size)
11{
12 int order;
13
14 size = (size - 1) >> (PAGE_SHIFT - 1);
15 order = -1;
16 do {
17 size >>= 1;
18 order++;
19 } while (size);
20 return order;
21}
22
23#endif /* __ASSEMBLY__ */
24#endif /* __KERNEL__ */
25
26#endif /* _ASM_GENERIC_PAGE_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index f40593565173..f86c1e549466 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -101,6 +101,22 @@ do { \
101}) 101})
102#endif 102#endif
103 103
104#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
105#define ptep_get_and_clear_full(__mm, __address, __ptep, __full) \
106({ \
107 pte_t __pte; \
108 __pte = ptep_get_and_clear((__mm), (__address), (__ptep)); \
109 __pte; \
110})
111#endif
112
113#ifndef __HAVE_ARCH_PTE_CLEAR_FULL
114#define pte_clear_full(__mm, __address, __ptep, __full) \
115do { \
116 pte_clear((__mm), (__address), (__ptep)); \
117} while (0)
118#endif
119
104#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 120#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
105#define ptep_clear_flush(__vma, __address, __ptep) \ 121#define ptep_clear_flush(__vma, __address, __ptep) \
106({ \ 122({ \
diff --git a/include/asm-h8300/page.h b/include/asm-h8300/page.h
index e3b7960d445b..e8c02b8c2d99 100644
--- a/include/asm-h8300/page.h
+++ b/include/asm-h8300/page.h
@@ -54,20 +54,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
54/* to align the pointer to the (next) page boundary */ 54/* to align the pointer to the (next) page boundary */
55#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 55#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
56 56
57/* Pure 2^n version of get_order */
58extern __inline__ int get_order(unsigned long size)
59{
60 int order;
61
62 size = (size-1) >> (PAGE_SHIFT-1);
63 order = -1;
64 do {
65 size >>= 1;
66 order++;
67 } while (size);
68 return order;
69}
70
71extern unsigned long memory_start; 57extern unsigned long memory_start;
72extern unsigned long memory_end; 58extern unsigned long memory_end;
73 59
@@ -101,4 +87,6 @@ extern unsigned long memory_end;
101 87
102#endif /* __KERNEL__ */ 88#endif /* __KERNEL__ */
103 89
90#include <asm-generic/page.h>
91
104#endif /* _H8300_PAGE_H */ 92#endif /* _H8300_PAGE_H */
diff --git a/include/asm-h8300/types.h b/include/asm-h8300/types.h
index 21f4fc07ac0e..bf91e0d4dde7 100644
--- a/include/asm-h8300/types.h
+++ b/include/asm-h8300/types.h
@@ -58,8 +58,6 @@ typedef u32 dma_addr_t;
58#define HAVE_SECTOR_T 58#define HAVE_SECTOR_T
59typedef u64 sector_t; 59typedef u64 sector_t;
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
64 62
65#endif /* __ASSEMBLY__ */ 63#endif /* __ASSEMBLY__ */
diff --git a/include/asm-i386/agp.h b/include/asm-i386/agp.h
index b82f5f3ab887..9075083bab76 100644
--- a/include/asm-i386/agp.h
+++ b/include/asm-i386/agp.h
@@ -19,7 +19,7 @@ int unmap_page_from_agp(struct page *page);
19/* Could use CLFLUSH here if the cpu supports it. But then it would 19/* Could use CLFLUSH here if the cpu supports it. But then it would
20 need to be called for each cacheline of the whole page so it may not be 20 need to be called for each cacheline of the whole page so it may not be
21 worth it. Would need a page for it. */ 21 worth it. Would need a page for it. */
22#define flush_agp_cache() asm volatile("wbinvd":::"memory") 22#define flush_agp_cache() wbinvd()
23 23
24/* Convert a physical address to an address suitable for the GART. */ 24/* Convert a physical address to an address suitable for the GART. */
25#define phys_to_gart(x) (x) 25#define phys_to_gart(x) (x)
diff --git a/include/asm-i386/apicdef.h b/include/asm-i386/apicdef.h
index a96a8f48fbfc..03185cef8e0a 100644
--- a/include/asm-i386/apicdef.h
+++ b/include/asm-i386/apicdef.h
@@ -16,6 +16,7 @@
16#define GET_APIC_VERSION(x) ((x)&0xFF) 16#define GET_APIC_VERSION(x) ((x)&0xFF)
17#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF) 17#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF)
18#define APIC_INTEGRATED(x) ((x)&0xF0) 18#define APIC_INTEGRATED(x) ((x)&0xF0)
19#define APIC_XAPIC(x) ((x) >= 0x14)
19#define APIC_TASKPRI 0x80 20#define APIC_TASKPRI 0x80
20#define APIC_TPRI_MASK 0xFF 21#define APIC_TPRI_MASK 0xFF
21#define APIC_ARBPRI 0x90 22#define APIC_ARBPRI 0x90
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index 6789fc275da3..ea54540638d2 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -118,7 +118,10 @@ static void __init check_hlt(void)
118 printk("disabled\n"); 118 printk("disabled\n");
119 return; 119 return;
120 } 120 }
121 __asm__ __volatile__("hlt ; hlt ; hlt ; hlt"); 121 halt();
122 halt();
123 halt();
124 halt();
122 printk("OK.\n"); 125 printk("OK.\n");
123} 126}
124 127
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index 11e67811a990..6df1a53c190e 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -27,8 +27,18 @@ struct Xgt_desc_struct {
27 27
28extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; 28extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
29 29
30#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) 30#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
31#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) 31#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
32
33#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
34#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
35#define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr))
36#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt))
37
38#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
39#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
40#define store_tr(tr) __asm__ ("str %0":"=mr" (tr))
41#define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt))
32 42
33/* 43/*
34 * This is the ldt that every process will get unless we need 44 * This is the ldt that every process will get unless we need
@@ -39,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr);
39 49
40#define _set_tssldt_desc(n,addr,limit,type) \ 50#define _set_tssldt_desc(n,addr,limit,type) \
41__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ 51__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
42 "movw %%ax,2(%2)\n\t" \ 52 "movw %w1,2(%2)\n\t" \
43 "rorl $16,%%eax\n\t" \ 53 "rorl $16,%1\n\t" \
44 "movb %%al,4(%2)\n\t" \ 54 "movb %b1,4(%2)\n\t" \
45 "movb %4,5(%2)\n\t" \ 55 "movb %4,5(%2)\n\t" \
46 "movb $0,6(%2)\n\t" \ 56 "movb $0,6(%2)\n\t" \
47 "movb %%ah,7(%2)\n\t" \ 57 "movb %h1,7(%2)\n\t" \
48 "rorl $16,%%eax" \ 58 "rorl $16,%1" \
49 : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) 59 : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
50 60
51static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) 61static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
52{ 62{
@@ -86,6 +96,13 @@ static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
86 (info)->seg_not_present == 1 && \ 96 (info)->seg_not_present == 1 && \
87 (info)->useable == 0 ) 97 (info)->useable == 0 )
88 98
99static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b)
100{
101 __u32 *lp = (__u32 *)((char *)ldt + entry*8);
102 *lp = entry_a;
103 *(lp+1) = entry_b;
104}
105
89#if TLS_SIZE != 24 106#if TLS_SIZE != 24
90# error update this code. 107# error update this code.
91#endif 108#endif
diff --git a/include/asm-i386/kdebug.h b/include/asm-i386/kdebug.h
index b3f8d5f59d5d..316138e89910 100644
--- a/include/asm-i386/kdebug.h
+++ b/include/asm-i386/kdebug.h
@@ -41,9 +41,16 @@ enum die_val {
41 DIE_PAGE_FAULT, 41 DIE_PAGE_FAULT,
42}; 42};
43 43
44static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig) 44static inline int notify_die(enum die_val val, const char *str,
45 struct pt_regs *regs, long err, int trap, int sig)
45{ 46{
46 struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig }; 47 struct die_args args = {
48 .regs = regs,
49 .str = str,
50 .err = err,
51 .trapnr = trap,
52 .signr = sig
53 };
47 return notifier_call_chain(&i386die_chain, val, &args); 54 return notifier_call_chain(&i386die_chain, val, &args);
48} 55}
49 56
diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-i386/mach-es7000/mach_mpparse.h
index 85809e0898d7..28a84f6185a7 100644
--- a/include/asm-i386/mach-es7000/mach_mpparse.h
+++ b/include/asm-i386/mach-es7000/mach_mpparse.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_MACH_MPPARSE_H 1#ifndef __ASM_MACH_MPPARSE_H
2#define __ASM_MACH_MPPARSE_H 2#define __ASM_MACH_MPPARSE_H
3 3
4#include <linux/acpi.h>
5
4static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, 6static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name,
5 struct mpc_config_translation *translation) 7 struct mpc_config_translation *translation)
6{ 8{
@@ -12,8 +14,9 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
12{ 14{
13} 15}
14 16
15extern int parse_unisys_oem (char *oemptr, int oem_entries); 17extern int parse_unisys_oem (char *oemptr);
16extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length); 18extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
19extern void setup_unisys();
17 20
18static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 21static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
19 char *productid) 22 char *productid)
@@ -22,18 +25,33 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
22 struct mp_config_oemtable *oem_table = 25 struct mp_config_oemtable *oem_table =
23 (struct mp_config_oemtable *)mpc->mpc_oemptr; 26 (struct mp_config_oemtable *)mpc->mpc_oemptr;
24 if (!strncmp(oem, "UNISYS", 6)) 27 if (!strncmp(oem, "UNISYS", 6))
25 return parse_unisys_oem((char *)oem_table, oem_table->oem_length); 28 return parse_unisys_oem((char *)oem_table);
26 } 29 }
27 return 0; 30 return 0;
28} 31}
29 32
33static inline int es7000_check_dsdt()
34{
35 struct acpi_table_header *header = NULL;
36 if(!acpi_get_table_header_early(ACPI_DSDT, &header))
37 acpi_table_print(header, 0);
38 if (!strncmp(header->oem_id, "UNISYS", 6))
39 return 1;
40 return 0;
41}
42
30/* Hook from generic ACPI tables.c */ 43/* Hook from generic ACPI tables.c */
31static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) 44static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
32{ 45{
33 unsigned long oem_addr; 46 unsigned long oem_addr;
34 int oem_entries; 47 if (!find_unisys_acpi_oem_table(&oem_addr)) {
35 if (!find_unisys_acpi_oem_table(&oem_addr, &oem_entries)) 48 if (es7000_check_dsdt())
36 return parse_unisys_oem((char *)oem_addr, oem_entries); 49 return parse_unisys_oem((char *)oem_addr);
50 else {
51 setup_unisys();
52 return 1;
53 }
54 }
37 return 0; 55 return 0;
38} 56}
39 57
diff --git a/include/asm-i386/mach-generic/mach_apic.h b/include/asm-i386/mach-generic/mach_apic.h
index b13767a4e934..d9dc039da94a 100644
--- a/include/asm-i386/mach-generic/mach_apic.h
+++ b/include/asm-i386/mach-generic/mach_apic.h
@@ -28,4 +28,6 @@
28#define enable_apic_mode (genapic->enable_apic_mode) 28#define enable_apic_mode (genapic->enable_apic_mode)
29#define phys_pkg_id (genapic->phys_pkg_id) 29#define phys_pkg_id (genapic->phys_pkg_id)
30 30
31extern void generic_bigsmp_probe(void);
32
31#endif /* __ASM_MACH_APIC_H */ 33#endif /* __ASM_MACH_APIC_H */
diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h
index d9fafba075bc..d84a9c326c22 100644
--- a/include/asm-i386/mpspec.h
+++ b/include/asm-i386/mpspec.h
@@ -11,6 +11,7 @@ extern int mp_bus_id_to_local [MAX_MP_BUSSES];
11extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; 11extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
12extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES]; 12extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
13 13
14extern unsigned int def_to_bigsmp;
14extern unsigned int boot_cpu_physical_apicid; 15extern unsigned int boot_cpu_physical_apicid;
15extern int smp_found_config; 16extern int smp_found_config;
16extern void find_smp_config (void); 17extern void find_smp_config (void);
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h
index c76fce8badbb..62b76cd96957 100644
--- a/include/asm-i386/msr.h
+++ b/include/asm-i386/msr.h
@@ -47,6 +47,21 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
47 : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\ 47 : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\
48 ret__; }) 48 ret__; })
49 49
50/* rdmsr with exception handling */
51#define rdmsr_safe(msr,a,b) ({ int ret__; \
52 asm volatile("2: rdmsr ; xorl %0,%0\n" \
53 "1:\n\t" \
54 ".section .fixup,\"ax\"\n\t" \
55 "3: movl %4,%0 ; jmp 1b\n\t" \
56 ".previous\n\t" \
57 ".section __ex_table,\"a\"\n" \
58 " .align 4\n\t" \
59 " .long 2b,3b\n\t" \
60 ".previous" \
61 : "=r" (ret__), "=a" (*(a)), "=d" (*(b)) \
62 : "c" (msr), "i" (-EFAULT));\
63 ret__; })
64
50#define rdtsc(low,high) \ 65#define rdtsc(low,high) \
51 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) 66 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
52 67
diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h
index 8d93f732d72d..73296d9924fb 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-i386/page.h
@@ -68,7 +68,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
68#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 68#define HPAGE_MASK (~(HPAGE_SIZE - 1))
69#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 69#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
70#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 70#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
71#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
72#endif 71#endif
73 72
74#define pgd_val(x) ((x).pgd) 73#define pgd_val(x) ((x).pgd)
@@ -104,20 +103,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
104 */ 103 */
105extern unsigned int __VMALLOC_RESERVE; 104extern unsigned int __VMALLOC_RESERVE;
106 105
107/* Pure 2^n version of get_order */
108static __inline__ int get_order(unsigned long size)
109{
110 int order;
111
112 size = (size-1) >> (PAGE_SHIFT-1);
113 order = -1;
114 do {
115 size >>= 1;
116 order++;
117 } while (size);
118 return order;
119}
120
121extern int sysctl_legacy_va_layout; 106extern int sysctl_legacy_va_layout;
122 107
123extern int page_is_ram(unsigned long pagenr); 108extern int page_is_ram(unsigned long pagenr);
@@ -156,4 +141,6 @@ extern int page_is_ram(unsigned long pagenr);
156 141
157#endif /* __KERNEL__ */ 142#endif /* __KERNEL__ */
158 143
144#include <asm-generic/page.h>
145
159#endif /* _I386_PAGE_H */ 146#endif /* _I386_PAGE_H */
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index d609f9c2c1f0..2e3f4a344a2d 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -64,7 +64,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
64#define set_pmd(pmdptr,pmdval) \ 64#define set_pmd(pmdptr,pmdval) \
65 set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval)) 65 set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval))
66#define set_pud(pudptr,pudval) \ 66#define set_pud(pudptr,pudval) \
67 set_64bit((unsigned long long *)(pudptr),pud_val(pudval)) 67 (*(pudptr) = (pudval))
68 68
69/* 69/*
70 * Pentium-II erratum A13: in PAE mode we explicitly have to flush 70 * Pentium-II erratum A13: in PAE mode we explicitly have to flush
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 77c6497f416e..47bc1ffa3d4c 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -86,9 +86,7 @@ void paging_init(void);
86#endif 86#endif
87 87
88/* 88/*
89 * The 4MB page is guessing.. Detailed in the infamous "Chapter H" 89 * _PAGE_PSE set in the page directory entry just means that
90 * of the Pentium details, but assuming intel did the straightforward
91 * thing, this bit set in the page directory entry just means that
92 * the page directory entry points directly to a 4MB-aligned block of 90 * the page directory entry points directly to a 4MB-aligned block of
93 * memory. 91 * memory.
94 */ 92 */
@@ -119,8 +117,10 @@ void paging_init(void);
119#define _PAGE_UNUSED2 0x400 117#define _PAGE_UNUSED2 0x400
120#define _PAGE_UNUSED3 0x800 118#define _PAGE_UNUSED3 0x800
121 119
122#define _PAGE_FILE 0x040 /* set:pagecache unset:swap */ 120/* If _PAGE_PRESENT is clear, we use these: */
123#define _PAGE_PROTNONE 0x080 /* If not present */ 121#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
122#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
123 pte_present gives true */
124#ifdef CONFIG_X86_PAE 124#ifdef CONFIG_X86_PAE
125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX) 125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
126#else 126#else
@@ -215,11 +215,13 @@ extern unsigned long pg0[];
215 * The following only work if pte_present() is true. 215 * The following only work if pte_present() is true.
216 * Undefined behaviour if not.. 216 * Undefined behaviour if not..
217 */ 217 */
218#define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT)
218static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; } 219static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
219static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; } 220static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
220static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; } 221static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
221static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } 222static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
222static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; } 223static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
224static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }
223 225
224/* 226/*
225 * The following only works if pte_present() is not true. 227 * The following only works if pte_present() is not true.
@@ -236,7 +238,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return
236static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; } 238static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
237static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; } 239static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
238static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; } 240static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
239static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; } 241static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= __LARGE_PTE; return pte; }
240 242
241#ifdef CONFIG_X86_PAE 243#ifdef CONFIG_X86_PAE
242# include <asm/pgtable-3level.h> 244# include <asm/pgtable-3level.h>
@@ -258,12 +260,39 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned
258 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low); 260 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
259} 261}
260 262
263static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
264{
265 pte_t pte;
266 if (full) {
267 pte = *ptep;
268 *ptep = __pte(0);
269 } else {
270 pte = ptep_get_and_clear(mm, addr, ptep);
271 }
272 return pte;
273}
274
261static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 275static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
262{ 276{
263 clear_bit(_PAGE_BIT_RW, &ptep->pte_low); 277 clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
264} 278}
265 279
266/* 280/*
281 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
282 *
283 * dst - pointer to pgd range anwhere on a pgd page
284 * src - ""
285 * count - the number of pgds to copy.
286 *
287 * dst and src can be on the same page, but the range must not overlap,
288 * and must not cross a page boundary.
289 */
290static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
291{
292 memcpy(dst, src, count * sizeof(pgd_t));
293}
294
295/*
267 * Macro to mark a page protection value as "uncacheable". On processors which do not support 296 * Macro to mark a page protection value as "uncacheable". On processors which do not support
268 * it, this is a no-op. 297 * it, this is a no-op.
269 */ 298 */
@@ -415,6 +444,7 @@ extern void noexec_setup(const char *str);
415#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 444#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
416#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 445#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
417#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 446#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
447#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
418#define __HAVE_ARCH_PTEP_SET_WRPROTECT 448#define __HAVE_ARCH_PTEP_SET_WRPROTECT
419#define __HAVE_ARCH_PTE_SAME 449#define __HAVE_ARCH_PTE_SAME
420#include <asm-generic/pgtable.h> 450#include <asm-generic/pgtable.h>
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index d0d8b0160090..37bef8ed7bed 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -203,9 +203,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
203 return edx; 203 return edx;
204} 204}
205 205
206#define load_cr3(pgdir) \ 206#define load_cr3(pgdir) write_cr3(__pa(pgdir))
207 asm volatile("movl %0,%%cr3": :"r" (__pa(pgdir)))
208
209 207
210/* 208/*
211 * Intel CPU features in CR4 209 * Intel CPU features in CR4
@@ -232,22 +230,20 @@ extern unsigned long mmu_cr4_features;
232 230
233static inline void set_in_cr4 (unsigned long mask) 231static inline void set_in_cr4 (unsigned long mask)
234{ 232{
233 unsigned cr4;
235 mmu_cr4_features |= mask; 234 mmu_cr4_features |= mask;
236 __asm__("movl %%cr4,%%eax\n\t" 235 cr4 = read_cr4();
237 "orl %0,%%eax\n\t" 236 cr4 |= mask;
238 "movl %%eax,%%cr4\n" 237 write_cr4(cr4);
239 : : "irg" (mask)
240 :"ax");
241} 238}
242 239
243static inline void clear_in_cr4 (unsigned long mask) 240static inline void clear_in_cr4 (unsigned long mask)
244{ 241{
242 unsigned cr4;
245 mmu_cr4_features &= ~mask; 243 mmu_cr4_features &= ~mask;
246 __asm__("movl %%cr4,%%eax\n\t" 244 cr4 = read_cr4();
247 "andl %0,%%eax\n\t" 245 cr4 &= ~mask;
248 "movl %%eax,%%cr4\n" 246 write_cr4(cr4);
249 : : "irg" (~mask)
250 :"ax");
251} 247}
252 248
253/* 249/*
@@ -281,6 +277,11 @@ static inline void clear_in_cr4 (unsigned long mask)
281 outb((data), 0x23); \ 277 outb((data), 0x23); \
282} while (0) 278} while (0)
283 279
280static inline void serialize_cpu(void)
281{
282 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
283}
284
284static inline void __monitor(const void *eax, unsigned long ecx, 285static inline void __monitor(const void *eax, unsigned long ecx,
285 unsigned long edx) 286 unsigned long edx)
286{ 287{
@@ -454,6 +455,7 @@ struct thread_struct {
454 unsigned int saved_fs, saved_gs; 455 unsigned int saved_fs, saved_gs;
455/* IO permissions */ 456/* IO permissions */
456 unsigned long *io_bitmap_ptr; 457 unsigned long *io_bitmap_ptr;
458 unsigned long iopl;
457/* max allowed port in the bitmap, in bytes: */ 459/* max allowed port in the bitmap, in bytes: */
458 unsigned long io_bitmap_max; 460 unsigned long io_bitmap_max;
459}; 461};
@@ -474,7 +476,6 @@ struct thread_struct {
474 .esp0 = sizeof(init_stack) + (long)&init_stack, \ 476 .esp0 = sizeof(init_stack) + (long)&init_stack, \
475 .ss0 = __KERNEL_DS, \ 477 .ss0 = __KERNEL_DS, \
476 .ss1 = __KERNEL_CS, \ 478 .ss1 = __KERNEL_CS, \
477 .ldt = GDT_ENTRY_LDT, \
478 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \ 479 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
479 .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \ 480 .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \
480} 481}
@@ -511,6 +512,21 @@ static inline void load_esp0(struct tss_struct *tss, struct thread_struct *threa
511 : /* no output */ \ 512 : /* no output */ \
512 :"r" (value)) 513 :"r" (value))
513 514
515/*
516 * Set IOPL bits in EFLAGS from given mask
517 */
518static inline void set_iopl_mask(unsigned mask)
519{
520 unsigned int reg;
521 __asm__ __volatile__ ("pushfl;"
522 "popl %0;"
523 "andl %1, %0;"
524 "orl %2, %0;"
525 "pushl %0;"
526 "popfl"
527 : "=&r" (reg)
528 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
529}
514 530
515/* Forward declaration, a strange C thing */ 531/* Forward declaration, a strange C thing */
516struct task_struct; 532struct task_struct;
diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h
index 05532875e39e..7e0f2945d17d 100644
--- a/include/asm-i386/ptrace.h
+++ b/include/asm-i386/ptrace.h
@@ -61,6 +61,13 @@ struct pt_regs {
61struct task_struct; 61struct task_struct;
62extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code); 62extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code);
63 63
64/*
65 * user_mode_vm(regs) determines whether a register set came from user mode.
66 * This is true if V8086 mode was enabled OR if the register set was from
67 * protected mode with RPL-3 CS value. This tricky test checks that with
68 * one comparison. Many places in the kernel can bypass this full check
69 * if they have already ruled out V8086 mode, so user_mode(regs) can be used.
70 */
64static inline int user_mode(struct pt_regs *regs) 71static inline int user_mode(struct pt_regs *regs)
65{ 72{
66 return (regs->xcs & 3) != 0; 73 return (regs->xcs & 3) != 0;
diff --git a/include/asm-i386/setup.h b/include/asm-i386/setup.h
index 7a32184d54bf..826a8ca50ac8 100644
--- a/include/asm-i386/setup.h
+++ b/include/asm-i386/setup.h
@@ -44,7 +44,7 @@ extern unsigned char boot_params[PARAM_SIZE];
44#define EFI_SYSTAB ((efi_system_table_t *) *((unsigned long *)(PARAM+0x1c4))) 44#define EFI_SYSTAB ((efi_system_table_t *) *((unsigned long *)(PARAM+0x1c4)))
45#define EFI_MEMDESC_SIZE (*((unsigned long *) (PARAM+0x1c8))) 45#define EFI_MEMDESC_SIZE (*((unsigned long *) (PARAM+0x1c8)))
46#define EFI_MEMDESC_VERSION (*((unsigned long *) (PARAM+0x1cc))) 46#define EFI_MEMDESC_VERSION (*((unsigned long *) (PARAM+0x1cc)))
47#define EFI_MEMMAP ((efi_memory_desc_t *) *((unsigned long *)(PARAM+0x1d0))) 47#define EFI_MEMMAP ((void *) *((unsigned long *)(PARAM+0x1d0)))
48#define EFI_MEMMAP_SIZE (*((unsigned long *) (PARAM+0x1d4))) 48#define EFI_MEMMAP_SIZE (*((unsigned long *) (PARAM+0x1d4)))
49#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2)) 49#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2))
50#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8)) 50#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8))
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index a283738b80b3..13250199976d 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -59,7 +59,7 @@ extern void cpu_uninit(void);
59 59
60extern cpumask_t cpu_callout_map; 60extern cpumask_t cpu_callout_map;
61extern cpumask_t cpu_callin_map; 61extern cpumask_t cpu_callin_map;
62#define cpu_possible_map cpu_callout_map 62extern cpumask_t cpu_possible_map;
63 63
64/* We don't mark CPUs online until __cpu_up(), so we need another measure */ 64/* We don't mark CPUs online until __cpu_up(), so we need another measure */
65static inline int num_booting_cpus(void) 65static inline int num_booting_cpus(void)
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index 3db717a244f0..acd5c26b69ba 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -14,8 +14,7 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc
14 14
15#define switch_to(prev,next,last) do { \ 15#define switch_to(prev,next,last) do { \
16 unsigned long esi,edi; \ 16 unsigned long esi,edi; \
17 asm volatile("pushfl\n\t" \ 17 asm volatile("pushl %%ebp\n\t" \
18 "pushl %%ebp\n\t" \
19 "movl %%esp,%0\n\t" /* save ESP */ \ 18 "movl %%esp,%0\n\t" /* save ESP */ \
20 "movl %5,%%esp\n\t" /* restore ESP */ \ 19 "movl %5,%%esp\n\t" /* restore ESP */ \
21 "movl $1f,%1\n\t" /* save EIP */ \ 20 "movl $1f,%1\n\t" /* save EIP */ \
@@ -23,7 +22,6 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc
23 "jmp __switch_to\n" \ 22 "jmp __switch_to\n" \
24 "1:\t" \ 23 "1:\t" \
25 "popl %%ebp\n\t" \ 24 "popl %%ebp\n\t" \
26 "popfl" \
27 :"=m" (prev->thread.esp),"=m" (prev->thread.eip), \ 25 :"=m" (prev->thread.esp),"=m" (prev->thread.eip), \
28 "=a" (last),"=S" (esi),"=D" (edi) \ 26 "=a" (last),"=S" (esi),"=D" (edi) \
29 :"m" (next->thread.esp),"m" (next->thread.eip), \ 27 :"m" (next->thread.esp),"m" (next->thread.eip), \
@@ -93,13 +91,13 @@ static inline unsigned long _get_base(char * addr)
93 ".align 4\n\t" \ 91 ".align 4\n\t" \
94 ".long 1b,3b\n" \ 92 ".long 1b,3b\n" \
95 ".previous" \ 93 ".previous" \
96 : :"m" (value)) 94 : :"rm" (value))
97 95
98/* 96/*
99 * Save a segment register away 97 * Save a segment register away
100 */ 98 */
101#define savesegment(seg, value) \ 99#define savesegment(seg, value) \
102 asm volatile("mov %%" #seg ",%0":"=m" (value)) 100 asm volatile("mov %%" #seg ",%0":"=rm" (value))
103 101
104/* 102/*
105 * Clear and set 'TS' bit respectively 103 * Clear and set 'TS' bit respectively
@@ -107,13 +105,33 @@ static inline unsigned long _get_base(char * addr)
107#define clts() __asm__ __volatile__ ("clts") 105#define clts() __asm__ __volatile__ ("clts")
108#define read_cr0() ({ \ 106#define read_cr0() ({ \
109 unsigned int __dummy; \ 107 unsigned int __dummy; \
110 __asm__( \ 108 __asm__ __volatile__( \
111 "movl %%cr0,%0\n\t" \ 109 "movl %%cr0,%0\n\t" \
112 :"=r" (__dummy)); \ 110 :"=r" (__dummy)); \
113 __dummy; \ 111 __dummy; \
114}) 112})
115#define write_cr0(x) \ 113#define write_cr0(x) \
116 __asm__("movl %0,%%cr0": :"r" (x)); 114 __asm__ __volatile__("movl %0,%%cr0": :"r" (x));
115
116#define read_cr2() ({ \
117 unsigned int __dummy; \
118 __asm__ __volatile__( \
119 "movl %%cr2,%0\n\t" \
120 :"=r" (__dummy)); \
121 __dummy; \
122})
123#define write_cr2(x) \
124 __asm__ __volatile__("movl %0,%%cr2": :"r" (x));
125
126#define read_cr3() ({ \
127 unsigned int __dummy; \
128 __asm__ ( \
129 "movl %%cr3,%0\n\t" \
130 :"=r" (__dummy)); \
131 __dummy; \
132})
133#define write_cr3(x) \
134 __asm__ __volatile__("movl %0,%%cr3": :"r" (x));
117 135
118#define read_cr4() ({ \ 136#define read_cr4() ({ \
119 unsigned int __dummy; \ 137 unsigned int __dummy; \
@@ -123,7 +141,7 @@ static inline unsigned long _get_base(char * addr)
123 __dummy; \ 141 __dummy; \
124}) 142})
125#define write_cr4(x) \ 143#define write_cr4(x) \
126 __asm__("movl %0,%%cr4": :"r" (x)); 144 __asm__ __volatile__("movl %0,%%cr4": :"r" (x));
127#define stts() write_cr0(8 | read_cr0()) 145#define stts() write_cr0(8 | read_cr0())
128 146
129#endif /* __KERNEL__ */ 147#endif /* __KERNEL__ */
@@ -447,6 +465,8 @@ struct alt_instr {
447#define local_irq_enable() __asm__ __volatile__("sti": : :"memory") 465#define local_irq_enable() __asm__ __volatile__("sti": : :"memory")
448/* used in the idle loop; sti takes one instruction cycle to complete */ 466/* used in the idle loop; sti takes one instruction cycle to complete */
449#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") 467#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory")
468/* used when interrupts are already enabled or to shutdown the processor */
469#define halt() __asm__ __volatile__("hlt": : :"memory")
450 470
451#define irqs_disabled() \ 471#define irqs_disabled() \
452({ \ 472({ \
diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h
index 95add81237ea..e2cb9fa6f563 100644
--- a/include/asm-i386/thread_info.h
+++ b/include/asm-i386/thread_info.h
@@ -139,6 +139,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
139#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 139#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
140#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ 140#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
141#define TIF_IRET 5 /* return with iret */ 141#define TIF_IRET 5 /* return with iret */
142#define TIF_SYSCALL_EMU 6 /* syscall emulation active */
142#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ 143#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
143#define TIF_SECCOMP 8 /* secure computing */ 144#define TIF_SECCOMP 8 /* secure computing */
144#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 145#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
@@ -150,13 +151,15 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
150#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 151#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
151#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 152#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
152#define _TIF_IRET (1<<TIF_IRET) 153#define _TIF_IRET (1<<TIF_IRET)
154#define _TIF_SYSCALL_EMU (1<<TIF_SYSCALL_EMU)
153#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 155#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
154#define _TIF_SECCOMP (1<<TIF_SECCOMP) 156#define _TIF_SECCOMP (1<<TIF_SECCOMP)
155#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 157#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
156 158
157/* work to do on interrupt/exception return */ 159/* work to do on interrupt/exception return */
158#define _TIF_WORK_MASK \ 160#define _TIF_WORK_MASK \
159 (0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|_TIF_SECCOMP)) 161 (0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|\
162 _TIF_SECCOMP|_TIF_SYSCALL_EMU))
160/* work to do on any return to u-space */ 163/* work to do on any return to u-space */
161#define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP) 164#define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP)
162 165
diff --git a/include/asm-i386/timer.h b/include/asm-i386/timer.h
index dcf1e07db08a..aed16437479d 100644
--- a/include/asm-i386/timer.h
+++ b/include/asm-i386/timer.h
@@ -1,6 +1,7 @@
1#ifndef _ASMi386_TIMER_H 1#ifndef _ASMi386_TIMER_H
2#define _ASMi386_TIMER_H 2#define _ASMi386_TIMER_H
3#include <linux/init.h> 3#include <linux/init.h>
4#include <linux/pm.h>
4 5
5/** 6/**
6 * struct timer_ops - used to define a timer source 7 * struct timer_ops - used to define a timer source
@@ -23,6 +24,8 @@ struct timer_opts {
23 unsigned long long (*monotonic_clock)(void); 24 unsigned long long (*monotonic_clock)(void);
24 void (*delay)(unsigned long); 25 void (*delay)(unsigned long);
25 unsigned long (*read_timer)(void); 26 unsigned long (*read_timer)(void);
27 int (*suspend)(pm_message_t state);
28 int (*resume)(void);
26}; 29};
27 30
28struct init_timer_opts { 31struct init_timer_opts {
diff --git a/include/asm-i386/types.h b/include/asm-i386/types.h
index 901b77c42b8a..ced00fe8fe61 100644
--- a/include/asm-i386/types.h
+++ b/include/asm-i386/types.h
@@ -63,8 +63,6 @@ typedef u64 sector_t;
63#define HAVE_SECTOR_T 63#define HAVE_SECTOR_T
64#endif 64#endif
65 65
66typedef unsigned short kmem_bufctl_t;
67
68#endif /* __ASSEMBLY__ */ 66#endif /* __ASSEMBLY__ */
69 67
70#endif /* __KERNEL__ */ 68#endif /* __KERNEL__ */
diff --git a/include/asm-i386/xor.h b/include/asm-i386/xor.h
index f80e2dbe1b56..23c86cef3b25 100644
--- a/include/asm-i386/xor.h
+++ b/include/asm-i386/xor.h
@@ -535,14 +535,14 @@ static struct xor_block_template xor_block_p5_mmx = {
535 535
536#define XMMS_SAVE do { \ 536#define XMMS_SAVE do { \
537 preempt_disable(); \ 537 preempt_disable(); \
538 cr0 = read_cr0(); \
539 clts(); \
538 __asm__ __volatile__ ( \ 540 __asm__ __volatile__ ( \
539 "movl %%cr0,%0 ;\n\t" \ 541 "movups %%xmm0,(%0) ;\n\t" \
540 "clts ;\n\t" \ 542 "movups %%xmm1,0x10(%0) ;\n\t" \
541 "movups %%xmm0,(%1) ;\n\t" \ 543 "movups %%xmm2,0x20(%0) ;\n\t" \
542 "movups %%xmm1,0x10(%1) ;\n\t" \ 544 "movups %%xmm3,0x30(%0) ;\n\t" \
543 "movups %%xmm2,0x20(%1) ;\n\t" \ 545 : \
544 "movups %%xmm3,0x30(%1) ;\n\t" \
545 : "=&r" (cr0) \
546 : "r" (xmm_save) \ 546 : "r" (xmm_save) \
547 : "memory"); \ 547 : "memory"); \
548} while(0) 548} while(0)
@@ -550,14 +550,14 @@ static struct xor_block_template xor_block_p5_mmx = {
550#define XMMS_RESTORE do { \ 550#define XMMS_RESTORE do { \
551 __asm__ __volatile__ ( \ 551 __asm__ __volatile__ ( \
552 "sfence ;\n\t" \ 552 "sfence ;\n\t" \
553 "movups (%1),%%xmm0 ;\n\t" \ 553 "movups (%0),%%xmm0 ;\n\t" \
554 "movups 0x10(%1),%%xmm1 ;\n\t" \ 554 "movups 0x10(%0),%%xmm1 ;\n\t" \
555 "movups 0x20(%1),%%xmm2 ;\n\t" \ 555 "movups 0x20(%0),%%xmm2 ;\n\t" \
556 "movups 0x30(%1),%%xmm3 ;\n\t" \ 556 "movups 0x30(%0),%%xmm3 ;\n\t" \
557 "movl %0,%%cr0 ;\n\t" \
558 : \ 557 : \
559 : "r" (cr0), "r" (xmm_save) \ 558 : "r" (xmm_save) \
560 : "memory"); \ 559 : "memory"); \
560 write_cr0(cr0); \
561 preempt_enable(); \ 561 preempt_enable(); \
562} while(0) 562} while(0)
563 563
diff --git a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h
index 4c06d455139c..3a544ffc5008 100644
--- a/include/asm-ia64/acpi.h
+++ b/include/asm-ia64/acpi.h
@@ -116,6 +116,11 @@ extern int __initdata nid_to_pxm_map[MAX_NUMNODES];
116 116
117extern u16 ia64_acpiid_to_sapicid[]; 117extern u16 ia64_acpiid_to_sapicid[];
118 118
119/*
120 * Refer Intel ACPI _PDC support document for bit definitions
121 */
122#define ACPI_PDC_EST_CAPABILITY_SMP 0x8
123
119#endif /*__KERNEL__*/ 124#endif /*__KERNEL__*/
120 125
121#endif /*_ASM_ACPI_H*/ 126#endif /*_ASM_ACPI_H*/
diff --git a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h
index c9f8d835d0cc..cee16ea1780a 100644
--- a/include/asm-ia64/fcntl.h
+++ b/include/asm-ia64/fcntl.h
@@ -81,6 +81,7 @@ struct flock {
81 81
82#define F_LINUX_SPECIFIC_BASE 1024 82#define F_LINUX_SPECIFIC_BASE 1024
83 83
84#define force_o_largefile() ( ! (current->personality & PER_LINUX32) ) 84#define force_o_largefile() \
85 (personality(current->personality) != PER_LINUX32)
85 86
86#endif /* _ASM_IA64_FCNTL_H */ 87#endif /* _ASM_IA64_FCNTL_H */
diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h
index 54e7637a326c..cf772a67f858 100644
--- a/include/asm-ia64/io.h
+++ b/include/asm-ia64/io.h
@@ -23,7 +23,7 @@
23#define __SLOW_DOWN_IO do { } while (0) 23#define __SLOW_DOWN_IO do { } while (0)
24#define SLOW_DOWN_IO do { } while (0) 24#define SLOW_DOWN_IO do { } while (0)
25 25
26#define __IA64_UNCACHED_OFFSET 0xc000000000000000UL /* region 6 */ 26#define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED)
27 27
28/* 28/*
29 * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but 29 * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but
@@ -41,7 +41,7 @@
41#define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS) 41#define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS)
42#define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1)) 42#define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1))
43 43
44#define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | (p & 0xfff)) 44#define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | ((p) & 0xfff))
45 45
46struct io_space { 46struct io_space {
47 unsigned long mmio_base; /* base in MMIO space */ 47 unsigned long mmio_base; /* base in MMIO space */
diff --git a/include/asm-ia64/mmu.h b/include/asm-ia64/mmu.h
index ae1525352a25..611432ba579c 100644
--- a/include/asm-ia64/mmu.h
+++ b/include/asm-ia64/mmu.h
@@ -2,10 +2,12 @@
2#define __MMU_H 2#define __MMU_H
3 3
4/* 4/*
5 * Type for a context number. We declare it volatile to ensure proper ordering when it's 5 * Type for a context number. We declare it volatile to ensure proper
6 * accessed outside of spinlock'd critical sections (e.g., as done in activate_mm() and 6 * ordering when it's accessed outside of spinlock'd critical sections
7 * init_new_context()). 7 * (e.g., as done in activate_mm() and init_new_context()).
8 */ 8 */
9typedef volatile unsigned long mm_context_t; 9typedef volatile unsigned long mm_context_t;
10 10
11typedef unsigned long nv_mm_context_t;
12
11#endif 13#endif
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index e3e5fededb04..8d6e72f7b08e 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -19,6 +19,7 @@
19 19
20#define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) 20#define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61))
21 21
22# include <asm/page.h>
22# ifndef __ASSEMBLY__ 23# ifndef __ASSEMBLY__
23 24
24#include <linux/compiler.h> 25#include <linux/compiler.h>
@@ -55,34 +56,46 @@ static inline void
55delayed_tlb_flush (void) 56delayed_tlb_flush (void)
56{ 57{
57 extern void local_flush_tlb_all (void); 58 extern void local_flush_tlb_all (void);
59 unsigned long flags;
58 60
59 if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { 61 if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) {
60 local_flush_tlb_all(); 62 spin_lock_irqsave(&ia64_ctx.lock, flags);
61 __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; 63 {
64 if (__ia64_per_cpu_var(ia64_need_tlb_flush)) {
65 local_flush_tlb_all();
66 __ia64_per_cpu_var(ia64_need_tlb_flush) = 0;
67 }
68 }
69 spin_unlock_irqrestore(&ia64_ctx.lock, flags);
62 } 70 }
63} 71}
64 72
65static inline mm_context_t 73static inline nv_mm_context_t
66get_mmu_context (struct mm_struct *mm) 74get_mmu_context (struct mm_struct *mm)
67{ 75{
68 unsigned long flags; 76 unsigned long flags;
69 mm_context_t context = mm->context; 77 nv_mm_context_t context = mm->context;
70 78
71 if (context) 79 if (unlikely(!context)) {
72 return context; 80 spin_lock_irqsave(&ia64_ctx.lock, flags);
73 81 {
74 spin_lock_irqsave(&ia64_ctx.lock, flags); 82 /* re-check, now that we've got the lock: */
75 { 83 context = mm->context;
76 /* re-check, now that we've got the lock: */ 84 if (context == 0) {
77 context = mm->context; 85 cpus_clear(mm->cpu_vm_mask);
78 if (context == 0) { 86 if (ia64_ctx.next >= ia64_ctx.limit)
79 cpus_clear(mm->cpu_vm_mask); 87 wrap_mmu_context(mm);
80 if (ia64_ctx.next >= ia64_ctx.limit) 88 mm->context = context = ia64_ctx.next++;
81 wrap_mmu_context(mm); 89 }
82 mm->context = context = ia64_ctx.next++;
83 } 90 }
91 spin_unlock_irqrestore(&ia64_ctx.lock, flags);
84 } 92 }
85 spin_unlock_irqrestore(&ia64_ctx.lock, flags); 93 /*
94 * Ensure we're not starting to use "context" before any old
95 * uses of it are gone from our TLB.
96 */
97 delayed_tlb_flush();
98
86 return context; 99 return context;
87} 100}
88 101
@@ -104,13 +117,13 @@ destroy_context (struct mm_struct *mm)
104} 117}
105 118
106static inline void 119static inline void
107reload_context (mm_context_t context) 120reload_context (nv_mm_context_t context)
108{ 121{
109 unsigned long rid; 122 unsigned long rid;
110 unsigned long rid_incr = 0; 123 unsigned long rid_incr = 0;
111 unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; 124 unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4;
112 125
113 old_rr4 = ia64_get_rr(0x8000000000000000UL); 126 old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE));
114 rid = context << 3; /* make space for encoding the region number */ 127 rid = context << 3; /* make space for encoding the region number */
115 rid_incr = 1 << 8; 128 rid_incr = 1 << 8;
116 129
@@ -122,6 +135,10 @@ reload_context (mm_context_t context)
122 rr4 = rr0 + 4*rid_incr; 135 rr4 = rr0 + 4*rid_incr;
123#ifdef CONFIG_HUGETLB_PAGE 136#ifdef CONFIG_HUGETLB_PAGE
124 rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); 137 rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc);
138
139# if RGN_HPAGE != 4
140# error "reload_context assumes RGN_HPAGE is 4"
141# endif
125#endif 142#endif
126 143
127 ia64_set_rr(0x0000000000000000UL, rr0); 144 ia64_set_rr(0x0000000000000000UL, rr0);
@@ -138,7 +155,7 @@ reload_context (mm_context_t context)
138static inline void 155static inline void
139activate_context (struct mm_struct *mm) 156activate_context (struct mm_struct *mm)
140{ 157{
141 mm_context_t context; 158 nv_mm_context_t context;
142 159
143 do { 160 do {
144 context = get_mmu_context(mm); 161 context = get_mmu_context(mm);
@@ -157,8 +174,6 @@ activate_context (struct mm_struct *mm)
157static inline void 174static inline void
158activate_mm (struct mm_struct *prev, struct mm_struct *next) 175activate_mm (struct mm_struct *prev, struct mm_struct *next)
159{ 176{
160 delayed_tlb_flush();
161
162 /* 177 /*
163 * We may get interrupts here, but that's OK because interrupt handlers cannot 178 * We may get interrupts here, but that's OK because interrupt handlers cannot
164 * touch user-space. 179 * touch user-space.
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 08894f73abf0..9edffad8c28b 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -13,6 +13,19 @@
13#include <asm/types.h> 13#include <asm/types.h>
14 14
15/* 15/*
16 * The top three bits of an IA64 address are its Region Number.
17 * Different regions are assigned to different purposes.
18 */
19#define RGN_SHIFT (61)
20#define RGN_BASE(r) (__IA64_UL_CONST(r)<<RGN_SHIFT)
21#define RGN_BITS (RGN_BASE(-1))
22
23#define RGN_KERNEL 7 /* Identity mapped region */
24#define RGN_UNCACHED 6 /* Identity mapped I/O region */
25#define RGN_GATE 5 /* Gate page, Kernel text, etc */
26#define RGN_HPAGE 4 /* For Huge TLB pages */
27
28/*
16 * PAGE_SHIFT determines the actual kernel page size. 29 * PAGE_SHIFT determines the actual kernel page size.
17 */ 30 */
18#if defined(CONFIG_IA64_PAGE_SIZE_4KB) 31#if defined(CONFIG_IA64_PAGE_SIZE_4KB)
@@ -36,10 +49,9 @@
36 49
37#define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */ 50#define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */
38 51
52
39#ifdef CONFIG_HUGETLB_PAGE 53#ifdef CONFIG_HUGETLB_PAGE
40# define REGION_HPAGE (4UL) /* note: this is hardcoded in reload_context()!*/ 54# define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE)
41# define REGION_SHIFT 61
42# define HPAGE_REGION_BASE (REGION_HPAGE << REGION_SHIFT)
43# define HPAGE_SHIFT hpage_shift 55# define HPAGE_SHIFT hpage_shift
44# define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */ 56# define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */
45# define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT) 57# define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT)
@@ -130,16 +142,13 @@ typedef union ia64_va {
130#define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) 142#define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;})
131#define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) 143#define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;})
132 144
133#define REGION_SIZE REGION_NUMBER(1)
134#define REGION_KERNEL 7
135
136#ifdef CONFIG_HUGETLB_PAGE 145#ifdef CONFIG_HUGETLB_PAGE
137# define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ 146# define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \
138 | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) 147 | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT)))
139# define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 148# define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
140# define is_hugepage_only_range(mm, addr, len) \ 149# define is_hugepage_only_range(mm, addr, len) \
141 (REGION_NUMBER(addr) == REGION_HPAGE && \ 150 (REGION_NUMBER(addr) == RGN_HPAGE && \
142 REGION_NUMBER((addr)+(len)-1) == REGION_HPAGE) 151 REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE)
143extern unsigned int hpage_shift; 152extern unsigned int hpage_shift;
144#endif 153#endif
145 154
@@ -197,7 +206,7 @@ get_order (unsigned long size)
197# define __pgprot(x) (x) 206# define __pgprot(x) (x)
198#endif /* !STRICT_MM_TYPECHECKS */ 207#endif /* !STRICT_MM_TYPECHECKS */
199 208
200#define PAGE_OFFSET __IA64_UL_CONST(0xe000000000000000) 209#define PAGE_OFFSET RGN_BASE(RGN_KERNEL)
201 210
202#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ 211#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
203 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \ 212 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index 2303a10ee595..e828377ad295 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -75,6 +75,8 @@
75#define PAL_CACHE_READ 259 /* read tag & data of cacheline for diagnostic testing */ 75#define PAL_CACHE_READ 259 /* read tag & data of cacheline for diagnostic testing */
76#define PAL_CACHE_WRITE 260 /* write tag & data of cacheline for diagnostic testing */ 76#define PAL_CACHE_WRITE 260 /* write tag & data of cacheline for diagnostic testing */
77#define PAL_VM_TR_READ 261 /* read contents of translation register */ 77#define PAL_VM_TR_READ 261 /* read contents of translation register */
78#define PAL_GET_PSTATE 262 /* get the current P-state */
79#define PAL_SET_PSTATE 263 /* set the P-state */
78 80
79#ifndef __ASSEMBLY__ 81#ifndef __ASSEMBLY__
80 82
@@ -1111,6 +1113,25 @@ ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf)
1111 return iprv.status; 1113 return iprv.status;
1112} 1114}
1113 1115
1116/* Get the current P-state information */
1117static inline s64
1118ia64_pal_get_pstate (u64 *pstate_index)
1119{
1120 struct ia64_pal_retval iprv;
1121 PAL_CALL_STK(iprv, PAL_GET_PSTATE, 0, 0, 0);
1122 *pstate_index = iprv.v0;
1123 return iprv.status;
1124}
1125
1126/* Set the P-state */
1127static inline s64
1128ia64_pal_set_pstate (u64 pstate_index)
1129{
1130 struct ia64_pal_retval iprv;
1131 PAL_CALL_STK(iprv, PAL_SET_PSTATE, pstate_index, 0, 0);
1132 return iprv.status;
1133}
1134
1114/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are 1135/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
1115 * suspended, but cache and TLB coherency is maintained. 1136 * suspended, but cache and TLB coherency is maintained.
1116 */ 1137 */
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index 48586e08f432..2e34c06e6777 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -204,21 +204,18 @@ ia64_phys_addr_valid (unsigned long addr)
204#define set_pte(ptep, pteval) (*(ptep) = (pteval)) 204#define set_pte(ptep, pteval) (*(ptep) = (pteval))
205#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 205#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
206 206
207#define RGN_SIZE (1UL << 61) 207#define VMALLOC_START (RGN_BASE(RGN_GATE) + 0x200000000UL)
208#define RGN_KERNEL 7
209
210#define VMALLOC_START 0xa000000200000000UL
211#ifdef CONFIG_VIRTUAL_MEM_MAP 208#ifdef CONFIG_VIRTUAL_MEM_MAP
212# define VMALLOC_END_INIT (0xa000000000000000UL + (1UL << (4*PAGE_SHIFT - 9))) 209# define VMALLOC_END_INIT (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9)))
213# define VMALLOC_END vmalloc_end 210# define VMALLOC_END vmalloc_end
214 extern unsigned long vmalloc_end; 211 extern unsigned long vmalloc_end;
215#else 212#else
216# define VMALLOC_END (0xa000000000000000UL + (1UL << (4*PAGE_SHIFT - 9))) 213# define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9)))
217#endif 214#endif
218 215
219/* fs/proc/kcore.c */ 216/* fs/proc/kcore.c */
220#define kc_vaddr_to_offset(v) ((v) - 0xa000000000000000UL) 217#define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE))
221#define kc_offset_to_vaddr(o) ((o) + 0xa000000000000000UL) 218#define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE))
222 219
223/* 220/*
224 * Conversion functions: convert page frame number (pfn) and a protection value to a page 221 * Conversion functions: convert page frame number (pfn) and a protection value to a page
diff --git a/include/asm-ia64/rwsem.h b/include/asm-ia64/rwsem.h
index 6ece5061dc19..e18b5ab0cb75 100644
--- a/include/asm-ia64/rwsem.h
+++ b/include/asm-ia64/rwsem.h
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com> 4 * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com>
5 * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com> 5 * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com>
6 * Copyright (C) 2005 Christoph Lameter <clameter@sgi.com>
6 * 7 *
7 * Based on asm-i386/rwsem.h and other architecture implementation. 8 * Based on asm-i386/rwsem.h and other architecture implementation.
8 * 9 *
@@ -11,9 +12,9 @@
11 * 12 *
12 * The lock count is initialized to 0 (no active and no waiting lockers). 13 * The lock count is initialized to 0 (no active and no waiting lockers).
13 * 14 *
14 * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case 15 * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for
15 * of an uncontended lock. Readers increment by 1 and see a positive value 16 * the case of an uncontended lock. Readers increment by 1 and see a positive
16 * when uncontended, negative if there are writers (and maybe) readers 17 * value when uncontended, negative if there are writers (and maybe) readers
17 * waiting (in which case it goes to sleep). 18 * waiting (in which case it goes to sleep).
18 */ 19 */
19 20
@@ -29,7 +30,7 @@
29 * the semaphore definition 30 * the semaphore definition
30 */ 31 */
31struct rw_semaphore { 32struct rw_semaphore {
32 signed int count; 33 signed long count;
33 spinlock_t wait_lock; 34 spinlock_t wait_lock;
34 struct list_head wait_list; 35 struct list_head wait_list;
35#if RWSEM_DEBUG 36#if RWSEM_DEBUG
@@ -37,10 +38,10 @@ struct rw_semaphore {
37#endif 38#endif
38}; 39};
39 40
40#define RWSEM_UNLOCKED_VALUE 0x00000000 41#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
41#define RWSEM_ACTIVE_BIAS 0x00000001 42#define RWSEM_ACTIVE_BIAS __IA64_UL_CONST(0x0000000000000001)
42#define RWSEM_ACTIVE_MASK 0x0000ffff 43#define RWSEM_ACTIVE_MASK __IA64_UL_CONST(0x00000000ffffffff)
43#define RWSEM_WAITING_BIAS (-0x00010000) 44#define RWSEM_WAITING_BIAS -__IA64_UL_CONST(0x0000000100000000)
44#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS 45#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
45#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) 46#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
46 47
@@ -83,7 +84,7 @@ init_rwsem (struct rw_semaphore *sem)
83static inline void 84static inline void
84__down_read (struct rw_semaphore *sem) 85__down_read (struct rw_semaphore *sem)
85{ 86{
86 int result = ia64_fetchadd4_acq((unsigned int *)&sem->count, 1); 87 long result = ia64_fetchadd8_acq((unsigned long *)&sem->count, 1);
87 88
88 if (result < 0) 89 if (result < 0)
89 rwsem_down_read_failed(sem); 90 rwsem_down_read_failed(sem);
@@ -95,7 +96,7 @@ __down_read (struct rw_semaphore *sem)
95static inline void 96static inline void
96__down_write (struct rw_semaphore *sem) 97__down_write (struct rw_semaphore *sem)
97{ 98{
98 int old, new; 99 long old, new;
99 100
100 do { 101 do {
101 old = sem->count; 102 old = sem->count;
@@ -112,7 +113,7 @@ __down_write (struct rw_semaphore *sem)
112static inline void 113static inline void
113__up_read (struct rw_semaphore *sem) 114__up_read (struct rw_semaphore *sem)
114{ 115{
115 int result = ia64_fetchadd4_rel((unsigned int *)&sem->count, -1); 116 long result = ia64_fetchadd8_rel((unsigned long *)&sem->count, -1);
116 117
117 if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0) 118 if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
118 rwsem_wake(sem); 119 rwsem_wake(sem);
@@ -124,7 +125,7 @@ __up_read (struct rw_semaphore *sem)
124static inline void 125static inline void
125__up_write (struct rw_semaphore *sem) 126__up_write (struct rw_semaphore *sem)
126{ 127{
127 int old, new; 128 long old, new;
128 129
129 do { 130 do {
130 old = sem->count; 131 old = sem->count;
@@ -141,7 +142,7 @@ __up_write (struct rw_semaphore *sem)
141static inline int 142static inline int
142__down_read_trylock (struct rw_semaphore *sem) 143__down_read_trylock (struct rw_semaphore *sem)
143{ 144{
144 int tmp; 145 long tmp;
145 while ((tmp = sem->count) >= 0) { 146 while ((tmp = sem->count) >= 0) {
146 if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) { 147 if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) {
147 return 1; 148 return 1;
@@ -156,7 +157,7 @@ __down_read_trylock (struct rw_semaphore *sem)
156static inline int 157static inline int
157__down_write_trylock (struct rw_semaphore *sem) 158__down_write_trylock (struct rw_semaphore *sem)
158{ 159{
159 int tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE, 160 long tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE,
160 RWSEM_ACTIVE_WRITE_BIAS); 161 RWSEM_ACTIVE_WRITE_BIAS);
161 return tmp == RWSEM_UNLOCKED_VALUE; 162 return tmp == RWSEM_UNLOCKED_VALUE;
162} 163}
@@ -167,7 +168,7 @@ __down_write_trylock (struct rw_semaphore *sem)
167static inline void 168static inline void
168__downgrade_write (struct rw_semaphore *sem) 169__downgrade_write (struct rw_semaphore *sem)
169{ 170{
170 int old, new; 171 long old, new;
171 172
172 do { 173 do {
173 old = sem->count; 174 old = sem->count;
@@ -182,7 +183,7 @@ __downgrade_write (struct rw_semaphore *sem)
182 * Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1 183 * Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1
183 * doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd. 184 * doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd.
184 */ 185 */
185#define rwsem_atomic_add(delta, sem) atomic_add(delta, (atomic_t *)(&(sem)->count)) 186#define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count))
186#define rwsem_atomic_update(delta, sem) atomic_add_return(delta, (atomic_t *)(&(sem)->count)) 187#define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count))
187 188
188#endif /* _ASM_IA64_RWSEM_H */ 189#endif /* _ASM_IA64_RWSEM_H */
diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h
index 103d745dc5f2..2c32e4b77b54 100644
--- a/include/asm-ia64/sn/addrs.h
+++ b/include/asm-ia64/sn/addrs.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (c) 1992-1999,2001-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (c) 1992-1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#ifndef _ASM_IA64_SN_ADDRS_H 9#ifndef _ASM_IA64_SN_ADDRS_H
@@ -65,7 +65,6 @@
65 65
66#define NASID_MASK ((u64)NASID_BITMASK << NASID_SHIFT) 66#define NASID_MASK ((u64)NASID_BITMASK << NASID_SHIFT)
67#define AS_MASK ((u64)AS_BITMASK << AS_SHIFT) 67#define AS_MASK ((u64)AS_BITMASK << AS_SHIFT)
68#define REGION_BITS 0xe000000000000000UL
69 68
70 69
71/* 70/*
@@ -79,38 +78,30 @@
79#define AS_CAC_SPACE (AS_CAC_VAL << AS_SHIFT) 78#define AS_CAC_SPACE (AS_CAC_VAL << AS_SHIFT)
80 79
81 80
82/*
83 * Base addresses for various address ranges.
84 */
85#define CACHED 0xe000000000000000UL
86#define UNCACHED 0xc000000000000000UL
87#define UNCACHED_PHYS 0x8000000000000000UL
88
89
90/* 81/*
91 * Virtual Mode Local & Global MMR space. 82 * Virtual Mode Local & Global MMR space.
92 */ 83 */
93#define SH1_LOCAL_MMR_OFFSET 0x8000000000UL 84#define SH1_LOCAL_MMR_OFFSET 0x8000000000UL
94#define SH2_LOCAL_MMR_OFFSET 0x0200000000UL 85#define SH2_LOCAL_MMR_OFFSET 0x0200000000UL
95#define LOCAL_MMR_OFFSET (is_shub2() ? SH2_LOCAL_MMR_OFFSET : SH1_LOCAL_MMR_OFFSET) 86#define LOCAL_MMR_OFFSET (is_shub2() ? SH2_LOCAL_MMR_OFFSET : SH1_LOCAL_MMR_OFFSET)
96#define LOCAL_MMR_SPACE (UNCACHED | LOCAL_MMR_OFFSET) 87#define LOCAL_MMR_SPACE (__IA64_UNCACHED_OFFSET | LOCAL_MMR_OFFSET)
97#define LOCAL_PHYS_MMR_SPACE (UNCACHED_PHYS | LOCAL_MMR_OFFSET) 88#define LOCAL_PHYS_MMR_SPACE (RGN_BASE(RGN_HPAGE) | LOCAL_MMR_OFFSET)
98 89
99#define SH1_GLOBAL_MMR_OFFSET 0x0800000000UL 90#define SH1_GLOBAL_MMR_OFFSET 0x0800000000UL
100#define SH2_GLOBAL_MMR_OFFSET 0x0300000000UL 91#define SH2_GLOBAL_MMR_OFFSET 0x0300000000UL
101#define GLOBAL_MMR_OFFSET (is_shub2() ? SH2_GLOBAL_MMR_OFFSET : SH1_GLOBAL_MMR_OFFSET) 92#define GLOBAL_MMR_OFFSET (is_shub2() ? SH2_GLOBAL_MMR_OFFSET : SH1_GLOBAL_MMR_OFFSET)
102#define GLOBAL_MMR_SPACE (UNCACHED | GLOBAL_MMR_OFFSET) 93#define GLOBAL_MMR_SPACE (__IA64_UNCACHED_OFFSET | GLOBAL_MMR_OFFSET)
103 94
104/* 95/*
105 * Physical mode addresses 96 * Physical mode addresses
106 */ 97 */
107#define GLOBAL_PHYS_MMR_SPACE (UNCACHED_PHYS | GLOBAL_MMR_OFFSET) 98#define GLOBAL_PHYS_MMR_SPACE (RGN_BASE(RGN_HPAGE) | GLOBAL_MMR_OFFSET)
108 99
109 100
110/* 101/*
111 * Clear region & AS bits. 102 * Clear region & AS bits.
112 */ 103 */
113#define TO_PHYS_MASK (~(REGION_BITS | AS_MASK)) 104#define TO_PHYS_MASK (~(RGN_BITS | AS_MASK))
114 105
115 106
116/* 107/*
@@ -126,6 +117,7 @@
126#define GLOBAL_MMR_PHYS_ADDR(n,a) (GLOBAL_PHYS_MMR_SPACE | REMOTE_ADDR(n,a)) 117#define GLOBAL_MMR_PHYS_ADDR(n,a) (GLOBAL_PHYS_MMR_SPACE | REMOTE_ADDR(n,a))
127#define GLOBAL_CAC_ADDR(n,a) (CAC_BASE | REMOTE_ADDR(n,a)) 118#define GLOBAL_CAC_ADDR(n,a) (CAC_BASE | REMOTE_ADDR(n,a))
128#define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) 119#define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n)))
120#define IS_TIO_NASID(n) ((n) & 1)
129 121
130 122
131/* non-II mmr's start at top of big window space (4G) */ 123/* non-II mmr's start at top of big window space (4G) */
@@ -134,10 +126,10 @@
134/* 126/*
135 * general address defines 127 * general address defines
136 */ 128 */
137#define CAC_BASE (CACHED | AS_CAC_SPACE) 129#define CAC_BASE (PAGE_OFFSET | AS_CAC_SPACE)
138#define AMO_BASE (UNCACHED | AS_AMO_SPACE) 130#define AMO_BASE (__IA64_UNCACHED_OFFSET | AS_AMO_SPACE)
139#define AMO_PHYS_BASE (UNCACHED_PHYS | AS_AMO_SPACE) 131#define AMO_PHYS_BASE (RGN_BASE(RGN_HPAGE) | AS_AMO_SPACE)
140#define GET_BASE (CACHED | AS_GET_SPACE) 132#define GET_BASE (PAGE_OFFSET | AS_GET_SPACE)
141 133
142/* 134/*
143 * Convert Memory addresses between various addressing modes. 135 * Convert Memory addresses between various addressing modes.
@@ -155,17 +147,35 @@
155 * the chiplet id is zero. If we implement TIO-TIO dma, we might need 147 * the chiplet id is zero. If we implement TIO-TIO dma, we might need
156 * to insert a chiplet id into this macro. However, it is our belief 148 * to insert a chiplet id into this macro. However, it is our belief
157 * right now that this chiplet id will be ICE, which is also zero. 149 * right now that this chiplet id will be ICE, which is also zero.
158 * Nasid starts on bit 40.
159 */ 150 */
160#define PHYS_TO_TIODMA(x) ( (((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x)) 151#define SH1_TIO_PHYS_TO_DMA(x) \
161#define PHYS_TO_DMA(x) ( (((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x)) 152 ((((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x))
153
154#define SH2_NETWORK_BANK_OFFSET(x) \
155 ((u64)(x) & ((1UL << (sn_hub_info->nasid_shift - 4)) -1))
156
157#define SH2_NETWORK_BANK_SELECT(x) \
158 ((((u64)(x) & (0x3UL << (sn_hub_info->nasid_shift - 4))) \
159 >> (sn_hub_info->nasid_shift - 4)) << 36)
160
161#define SH2_NETWORK_ADDRESS(x) \
162 (SH2_NETWORK_BANK_OFFSET(x) | SH2_NETWORK_BANK_SELECT(x))
163
164#define SH2_TIO_PHYS_TO_DMA(x) \
165 (((u64)(NASID_GET(x)) << 40) | SH2_NETWORK_ADDRESS(x))
166
167#define PHYS_TO_TIODMA(x) \
168 (is_shub1() ? SH1_TIO_PHYS_TO_DMA(x) : SH2_TIO_PHYS_TO_DMA(x))
169
170#define PHYS_TO_DMA(x) \
171 ((((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x))
162 172
163 173
164/* 174/*
165 * Macros to test for address type. 175 * Macros to test for address type.
166 */ 176 */
167#define IS_AMO_ADDRESS(x) (((u64)(x) & (REGION_BITS | AS_MASK)) == AMO_BASE) 177#define IS_AMO_ADDRESS(x) (((u64)(x) & (RGN_BITS | AS_MASK)) == AMO_BASE)
168#define IS_AMO_PHYS_ADDRESS(x) (((u64)(x) & (REGION_BITS | AS_MASK)) == AMO_PHYS_BASE) 178#define IS_AMO_PHYS_ADDRESS(x) (((u64)(x) & (RGN_BITS | AS_MASK)) == AMO_PHYS_BASE)
169 179
170 180
171/* 181/*
@@ -180,18 +190,20 @@
180#define TIO_SWIN_BASE(n, w) (TIO_IO_BASE(n) + \ 190#define TIO_SWIN_BASE(n, w) (TIO_IO_BASE(n) + \
181 ((u64) (w) << TIO_SWIN_SIZE_BITS)) 191 ((u64) (w) << TIO_SWIN_SIZE_BITS))
182#define NODE_IO_BASE(n) (GLOBAL_MMR_SPACE | NASID_SPACE(n)) 192#define NODE_IO_BASE(n) (GLOBAL_MMR_SPACE | NASID_SPACE(n))
183#define TIO_IO_BASE(n) (UNCACHED | NASID_SPACE(n)) 193#define TIO_IO_BASE(n) (__IA64_UNCACHED_OFFSET | NASID_SPACE(n))
184#define BWIN_SIZE (1UL << BWIN_SIZE_BITS) 194#define BWIN_SIZE (1UL << BWIN_SIZE_BITS)
185#define NODE_BWIN_BASE0(n) (NODE_IO_BASE(n) + BWIN_SIZE) 195#define NODE_BWIN_BASE0(n) (NODE_IO_BASE(n) + BWIN_SIZE)
186#define NODE_BWIN_BASE(n, w) (NODE_BWIN_BASE0(n) + ((u64) (w) << BWIN_SIZE_BITS)) 196#define NODE_BWIN_BASE(n, w) (NODE_BWIN_BASE0(n) + ((u64) (w) << BWIN_SIZE_BITS))
187#define RAW_NODE_SWIN_BASE(n, w) (NODE_IO_BASE(n) + ((u64) (w) << SWIN_SIZE_BITS)) 197#define RAW_NODE_SWIN_BASE(n, w) (NODE_IO_BASE(n) + ((u64) (w) << SWIN_SIZE_BITS))
188#define BWIN_WIDGET_MASK 0x7 198#define BWIN_WIDGET_MASK 0x7
189#define BWIN_WINDOWNUM(x) (((x) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) 199#define BWIN_WINDOWNUM(x) (((x) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
200#define SH1_IS_BIG_WINDOW_ADDR(x) ((x) & BWIN_TOP)
190 201
191#define TIO_BWIN_WINDOW_SELECT_MASK 0x7 202#define TIO_BWIN_WINDOW_SELECT_MASK 0x7
192#define TIO_BWIN_WINDOWNUM(x) (((x) >> TIO_BWIN_SIZE_BITS) & TIO_BWIN_WINDOW_SELECT_MASK) 203#define TIO_BWIN_WINDOWNUM(x) (((x) >> TIO_BWIN_SIZE_BITS) & TIO_BWIN_WINDOW_SELECT_MASK)
193 204
194 205#define TIO_HWIN_SHIFT_BITS 33
206#define TIO_HWIN(x) (NODE_OFFSET(x) >> TIO_HWIN_SHIFT_BITS)
195 207
196/* 208/*
197 * The following definitions pertain to the IO special address 209 * The following definitions pertain to the IO special address
@@ -216,10 +228,6 @@
216#define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK) 228#define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK)
217 229
218 230
219#define TIO_IOSPACE_ADDR(n,x) \
220 /* Move in the Chiplet ID for TIO Local Block MMR */ \
221 (REMOTE_ADDR(n,x) | 1UL << (NASID_SHIFT - 2))
222
223/* 231/*
224 * The following macros produce the correct base virtual address for 232 * The following macros produce the correct base virtual address for
225 * the hub registers. The REMOTE_HUB_* macro produce 233 * the hub registers. The REMOTE_HUB_* macro produce
@@ -234,18 +242,40 @@
234 * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S(). 242 * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S().
235 * They're always safe. 243 * They're always safe.
236 */ 244 */
245/* Shub1 TIO & MMR addressing macros */
246#define SH1_TIO_IOSPACE_ADDR(n,x) \
247 GLOBAL_MMR_ADDR(n,x)
248
249#define SH1_REMOTE_BWIN_MMR(n,x) \
250 GLOBAL_MMR_ADDR(n,x)
251
252#define SH1_REMOTE_SWIN_MMR(n,x) \
253 (NODE_SWIN_BASE(n,1) + 0x800000UL + (x))
254
255#define SH1_REMOTE_MMR(n,x) \
256 (SH1_IS_BIG_WINDOW_ADDR(x) ? SH1_REMOTE_BWIN_MMR(n,x) : \
257 SH1_REMOTE_SWIN_MMR(n,x))
258
259/* Shub1 TIO & MMR addressing macros */
260#define SH2_TIO_IOSPACE_ADDR(n,x) \
261 ((__IA64_UNCACHED_OFFSET | REMOTE_ADDR(n,x) | 1UL << (NASID_SHIFT - 2)))
262
263#define SH2_REMOTE_MMR(n,x) \
264 GLOBAL_MMR_ADDR(n,x)
265
266
267/* TIO & MMR addressing macros that work on both shub1 & shub2 */
268#define TIO_IOSPACE_ADDR(n,x) \
269 ((u64 *)(is_shub1() ? SH1_TIO_IOSPACE_ADDR(n,x) : \
270 SH2_TIO_IOSPACE_ADDR(n,x)))
271
272#define SH_REMOTE_MMR(n,x) \
273 (is_shub1() ? SH1_REMOTE_MMR(n,x) : SH2_REMOTE_MMR(n,x))
274
237#define REMOTE_HUB_ADDR(n,x) \ 275#define REMOTE_HUB_ADDR(n,x) \
238 ((n & 1) ? \ 276 (IS_TIO_NASID(n) ? ((volatile u64*)TIO_IOSPACE_ADDR(n,x)) : \
239 /* TIO: */ \ 277 ((volatile u64*)SH_REMOTE_MMR(n,x)))
240 (is_shub2() ? \ 278
241 /* TIO on Shub2 */ \
242 (volatile u64 *)(TIO_IOSPACE_ADDR(n,x)) \
243 : /* TIO on shub1 */ \
244 (volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \
245 \
246 : /* SHUB1 and SHUB2 MMRs: */ \
247 (((x) & BWIN_TOP) ? ((volatile u64 *)(GLOBAL_MMR_ADDR(n,x))) \
248 : ((volatile u64 *)(NODE_SWIN_BASE(n,1) + 0x800000 + (x)))))
249 279
250#define HUB_L(x) (*((volatile typeof(*x) *)x)) 280#define HUB_L(x) (*((volatile typeof(*x) *)x))
251#define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d)) 281#define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d))
diff --git a/include/asm-ia64/sn/geo.h b/include/asm-ia64/sn/geo.h
index 84b254603b8d..f083c9434066 100644
--- a/include/asm-ia64/sn/geo.h
+++ b/include/asm-ia64/sn/geo.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#ifndef _ASM_IA64_SN_GEO_H 9#ifndef _ASM_IA64_SN_GEO_H
@@ -108,7 +108,6 @@ typedef union geoid_u {
108#define INVALID_SLAB (slabid_t)-1 108#define INVALID_SLAB (slabid_t)-1
109#define INVALID_SLOT (slotid_t)-1 109#define INVALID_SLOT (slotid_t)-1
110#define INVALID_MODULE ((moduleid_t)-1) 110#define INVALID_MODULE ((moduleid_t)-1)
111#define INVALID_PARTID ((partid_t)-1)
112 111
113static inline slabid_t geo_slab(geoid_t g) 112static inline slabid_t geo_slab(geoid_t g)
114{ 113{
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h
index e190dd4213d5..e35074f526d9 100644
--- a/include/asm-ia64/sn/intr.h
+++ b/include/asm-ia64/sn/intr.h
@@ -12,13 +12,12 @@
12#include <linux/rcupdate.h> 12#include <linux/rcupdate.h>
13 13
14#define SGI_UART_VECTOR (0xe9) 14#define SGI_UART_VECTOR (0xe9)
15#define SGI_PCIBR_ERROR (0x33)
16 15
17/* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */ 16/* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */
18#define SGI_XPC_ACTIVATE (0x30) 17#define SGI_XPC_ACTIVATE (0x30)
19#define SGI_II_ERROR (0x31) 18#define SGI_II_ERROR (0x31)
20#define SGI_XBOW_ERROR (0x32) 19#define SGI_XBOW_ERROR (0x32)
21#define SGI_PCIBR_ERROR (0x33) 20#define SGI_PCIASIC_ERROR (0x33)
22#define SGI_ACPI_SCI_INT (0x34) 21#define SGI_ACPI_SCI_INT (0x34)
23#define SGI_TIOCA_ERROR (0x35) 22#define SGI_TIOCA_ERROR (0x35)
24#define SGI_TIO_ERROR (0x36) 23#define SGI_TIO_ERROR (0x36)
diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h
index 7138b1eafd6b..47bb8100fd00 100644
--- a/include/asm-ia64/sn/nodepda.h
+++ b/include/asm-ia64/sn/nodepda.h
@@ -37,7 +37,6 @@ struct phys_cpuid {
37 37
38struct nodepda_s { 38struct nodepda_s {
39 void *pdinfo; /* Platform-dependent per-node info */ 39 void *pdinfo; /* Platform-dependent per-node info */
40 spinlock_t bist_lock;
41 40
42 /* 41 /*
43 * The BTEs on this node are shared by the local cpus 42 * The BTEs on this node are shared by the local cpus
@@ -55,6 +54,8 @@ struct nodepda_s {
55 * Array of physical cpu identifiers. Indexed by cpuid. 54 * Array of physical cpu identifiers. Indexed by cpuid.
56 */ 55 */
57 struct phys_cpuid phys_cpuid[NR_CPUS]; 56 struct phys_cpuid phys_cpuid[NR_CPUS];
57 spinlock_t ptc_lock ____cacheline_aligned_in_smp;
58 spinlock_t bist_lock;
58}; 59};
59 60
60typedef struct nodepda_s nodepda_t; 61typedef struct nodepda_s nodepda_t;
diff --git a/include/asm-ia64/sn/pcibus_provider_defs.h b/include/asm-ia64/sn/pcibus_provider_defs.h
index 976f5eff0539..ad0e8e8ae53f 100644
--- a/include/asm-ia64/sn/pcibus_provider_defs.h
+++ b/include/asm-ia64/sn/pcibus_provider_defs.h
@@ -18,8 +18,9 @@
18#define PCIIO_ASIC_TYPE_PIC 2 18#define PCIIO_ASIC_TYPE_PIC 2
19#define PCIIO_ASIC_TYPE_TIOCP 3 19#define PCIIO_ASIC_TYPE_TIOCP 3
20#define PCIIO_ASIC_TYPE_TIOCA 4 20#define PCIIO_ASIC_TYPE_TIOCA 4
21#define PCIIO_ASIC_TYPE_TIOCE 5
21 22
22#define PCIIO_ASIC_MAX_TYPES 5 23#define PCIIO_ASIC_MAX_TYPES 6
23 24
24/* 25/*
25 * Common pciio bus provider data. There should be one of these as the 26 * Common pciio bus provider data. There should be one of these as the
@@ -30,7 +31,8 @@
30struct pcibus_bussoft { 31struct pcibus_bussoft {
31 uint32_t bs_asic_type; /* chipset type */ 32 uint32_t bs_asic_type; /* chipset type */
32 uint32_t bs_xid; /* xwidget id */ 33 uint32_t bs_xid; /* xwidget id */
33 uint64_t bs_persist_busnum; /* Persistent Bus Number */ 34 uint32_t bs_persist_busnum; /* Persistent Bus Number */
35 uint32_t bs_persist_segment; /* Segment Number */
34 uint64_t bs_legacy_io; /* legacy io pio addr */ 36 uint64_t bs_legacy_io; /* legacy io pio addr */
35 uint64_t bs_legacy_mem; /* legacy mem pio addr */ 37 uint64_t bs_legacy_mem; /* legacy mem pio addr */
36 uint64_t bs_base; /* widget base */ 38 uint64_t bs_base; /* widget base */
@@ -47,6 +49,8 @@ struct sn_pcibus_provider {
47 dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t); 49 dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t);
48 void (*dma_unmap)(struct pci_dev *, dma_addr_t, int); 50 void (*dma_unmap)(struct pci_dev *, dma_addr_t, int);
49 void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *); 51 void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *);
52 void (*force_interrupt)(struct sn_irq_info *);
53 void (*target_interrupt)(struct sn_irq_info *);
50}; 54};
51 55
52extern struct sn_pcibus_provider *sn_pci_provider[]; 56extern struct sn_pcibus_provider *sn_pci_provider[];
diff --git a/include/asm-ia64/sn/pda.h b/include/asm-ia64/sn/pda.h
index ea5590c76ca4..1c5108d44d8b 100644
--- a/include/asm-ia64/sn/pda.h
+++ b/include/asm-ia64/sn/pda.h
@@ -39,7 +39,6 @@ typedef struct pda_s {
39 unsigned long pio_write_status_val; 39 unsigned long pio_write_status_val;
40 volatile unsigned long *pio_shub_war_cam_addr; 40 volatile unsigned long *pio_shub_war_cam_addr;
41 41
42 unsigned long sn_soft_irr[4];
43 unsigned long sn_in_service_ivecs[4]; 42 unsigned long sn_in_service_ivecs[4];
44 int sn_lb_int_war_ticks; 43 int sn_lb_int_war_ticks;
45 int sn_last_irq; 44 int sn_last_irq;
diff --git a/include/asm-ia64/sn/sn2/sn_hwperf.h b/include/asm-ia64/sn/sn2/sn_hwperf.h
index df75f4c4aec3..291ef3d69da2 100644
--- a/include/asm-ia64/sn/sn2/sn_hwperf.h
+++ b/include/asm-ia64/sn/sn2/sn_hwperf.h
@@ -43,6 +43,7 @@ struct sn_hwperf_object_info {
43 43
44/* macros for object classification */ 44/* macros for object classification */
45#define SN_HWPERF_IS_NODE(x) ((x) && strstr((x)->name, "SHub")) 45#define SN_HWPERF_IS_NODE(x) ((x) && strstr((x)->name, "SHub"))
46#define SN_HWPERF_IS_NODE_SHUB2(x) ((x) && strstr((x)->name, "SHub 2."))
46#define SN_HWPERF_IS_IONODE(x) ((x) && strstr((x)->name, "TIO")) 47#define SN_HWPERF_IS_IONODE(x) ((x) && strstr((x)->name, "TIO"))
47#define SN_HWPERF_IS_ROUTER(x) ((x) && strstr((x)->name, "Router")) 48#define SN_HWPERF_IS_ROUTER(x) ((x) && strstr((x)->name, "Router"))
48#define SN_HWPERF_IS_NL3ROUTER(x) ((x) && strstr((x)->name, "NL3Router")) 49#define SN_HWPERF_IS_NL3ROUTER(x) ((x) && strstr((x)->name, "NL3Router"))
@@ -214,6 +215,15 @@ struct sn_hwperf_ioctl_args {
214 */ 215 */
215#define SN_HWPERF_GET_NODE_NASID (102|SN_HWPERF_OP_MEM_COPYOUT) 216#define SN_HWPERF_GET_NODE_NASID (102|SN_HWPERF_OP_MEM_COPYOUT)
216 217
218/*
219 * Given a node id, determine the id of the nearest node with CPUs
220 * and the id of the nearest node that has memory. The argument
221 * node would normally be a "headless" node, e.g. an "IO node".
222 * Return 0 on success.
223 */
224extern int sn_hwperf_get_nearest_node(cnodeid_t node,
225 cnodeid_t *near_mem, cnodeid_t *near_cpu);
226
217/* return codes */ 227/* return codes */
218#define SN_HWPERF_OP_OK 0 228#define SN_HWPERF_OP_OK 0
219#define SN_HWPERF_OP_NOMEM 1 229#define SN_HWPERF_OP_NOMEM 1
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index 27976d223186..e67825ad1930 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -55,7 +55,6 @@
55#define SN_SAL_BUS_CONFIG 0x02000037 55#define SN_SAL_BUS_CONFIG 0x02000037
56#define SN_SAL_SYS_SERIAL_GET 0x02000038 56#define SN_SAL_SYS_SERIAL_GET 0x02000038
57#define SN_SAL_PARTITION_SERIAL_GET 0x02000039 57#define SN_SAL_PARTITION_SERIAL_GET 0x02000039
58#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
59#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b 58#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c 59#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61#define SN_SAL_COHERENCE 0x0200003d 60#define SN_SAL_COHERENCE 0x0200003d
@@ -78,7 +77,8 @@
78 77
79#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 78#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
80#define SN_SAL_BTE_RECOVER 0x02000061 79#define SN_SAL_BTE_RECOVER 0x02000061
81#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000062 80#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
81#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
82 82
83/* 83/*
84 * Service-specific constants 84 * Service-specific constants
@@ -586,35 +586,6 @@ sn_partition_serial_number_val(void) {
586} 586}
587 587
588/* 588/*
589 * Returns the partition id of the nasid passed in as an argument,
590 * or INVALID_PARTID if the partition id cannot be retrieved.
591 */
592static inline partid_t
593ia64_sn_sysctl_partition_get(nasid_t nasid)
594{
595 struct ia64_sal_retval ret_stuff;
596 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
597 0, 0, 0, 0, 0, 0);
598 if (ret_stuff.status != 0)
599 return INVALID_PARTID;
600 return ((partid_t)ret_stuff.v0);
601}
602
603/*
604 * Returns the partition id of the current processor.
605 */
606
607extern partid_t sn_partid;
608
609static inline partid_t
610sn_local_partid(void) {
611 if (unlikely(sn_partid < 0)) {
612 sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id()));
613 }
614 return sn_partid;
615}
616
617/*
618 * Returns the physical address of the partition's reserved page through 589 * Returns the physical address of the partition's reserved page through
619 * an iterative number of calls. 590 * an iterative number of calls.
620 * 591 *
@@ -749,7 +720,8 @@ ia64_sn_power_down(void)
749{ 720{
750 struct ia64_sal_retval ret_stuff; 721 struct ia64_sal_retval ret_stuff;
751 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); 722 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
752 while(1); 723 while(1)
724 cpu_relax();
753 /* never returns */ 725 /* never returns */
754} 726}
755 727
@@ -1018,24 +990,6 @@ ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1018 ret_stuff.v2 = 0; 990 ret_stuff.v2 = 0;
1019 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); 991 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1020 992
1021/***** BEGIN HACK - temp til old proms no longer supported ********/
1022 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
1023 int nasid = get_sapicid() & 0xfff;;
1024#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1025#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1026 if (shubtype) *shubtype = 0;
1027 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1028 if (nasid_shift) *nasid_shift = 38;
1029 if (systemsize) *systemsize = 11;
1030 if (sharing_domain_size) *sharing_domain_size = 9;
1031 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1032 if (coher) *coher = nasid >> 9;
1033 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1034 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1035 return 0;
1036 }
1037/***** END HACK *******/
1038
1039 if (ret_stuff.status < 0) 993 if (ret_stuff.status < 0)
1040 return ret_stuff.status; 994 return ret_stuff.status;
1041 995
@@ -1068,12 +1022,10 @@ ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
1068} 1022}
1069 1023
1070static inline int 1024static inline int
1071ia64_sn_ioif_get_pci_topology(u64 rack, u64 bay, u64 slot, u64 slab, 1025ia64_sn_ioif_get_pci_topology(u64 buf, u64 len)
1072 u64 buf, u64 len)
1073{ 1026{
1074 struct ia64_sal_retval rv; 1027 struct ia64_sal_retval rv;
1075 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, 1028 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0);
1076 rack, bay, slot, slab, buf, len, 0);
1077 return (int) rv.status; 1029 return (int) rv.status;
1078} 1030}
1079 1031
diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h
new file mode 100644
index 000000000000..22879853e46c
--- /dev/null
+++ b/include/asm-ia64/sn/tioce.h
@@ -0,0 +1,740 @@
1/**************************************************************************
2 * *
3 * Unpublished copyright (c) 2005, Silicon Graphics, Inc. *
4 * THIS IS UNPUBLISHED CONFIDENTIAL AND PROPRIETARY SOURCE CODE OF SGI. *
5 * *
6 * The copyright notice above does not evidence any actual or intended *
7 * publication or disclosure of this source code, which includes *
8 * information that is confidential and/or proprietary, and is a trade *
9 * secret, of Silicon Graphics, Inc. ANY REPRODUCTION, MODIFICATION, *
10 * DISTRIBUTION, PUBLIC PERFORMANCE, OR PUBLIC DISPLAY OF OR THROUGH *
11 * USE OF THIS SOURCE CODE WITHOUT THE EXPRESS WRITTEN CONSENT OF *
12 * SILICON GRAPHICS, INC. IS STRICTLY PROHIBITED, AND IN VIOLATION OF *
13 * APPLICABLE LAWS AND INTERNATIONAL TREATIES. THE RECEIPT OR *
14 * POSSESSION OF THIS SOURCE CODE AND/OR RELATED INFORMATION DOES NOT *
15 * CONVEY OR IMPLY ANY RIGHTS TO REPRODUCE, DISCLOSE OR DISTRIBUTE ITS *
16 * CONTENTS, OR TO MANUFACTURE, USE, OR SELL ANYTHING THAT IT MAY *
17 * DESCRIBE, IN WHOLE OR IN PART. *
18 * *
19 **************************************************************************/
20
21#ifndef __ASM_IA64_SN_TIOCE_H__
22#define __ASM_IA64_SN_TIOCE_H__
23
24/* CE ASIC part & mfgr information */
25#define TIOCE_PART_NUM 0xCE00
26#define TIOCE_MFGR_NUM 0x36
27#define TIOCE_REV_A 0x1
28
29/* CE Virtual PPB Vendor/Device IDs */
30#define CE_VIRT_PPB_VENDOR_ID 0x10a9
31#define CE_VIRT_PPB_DEVICE_ID 0x4002
32
33/* CE Host Bridge Vendor/Device IDs */
34#define CE_HOST_BRIDGE_VENDOR_ID 0x10a9
35#define CE_HOST_BRIDGE_DEVICE_ID 0x4003
36
37
38#define TIOCE_NUM_M40_ATES 4096
39#define TIOCE_NUM_M3240_ATES 2048
40#define TIOCE_NUM_PORTS 2
41
42/*
43 * Register layout for TIOCE. MMR offsets are shown at the far right of the
44 * structure definition.
45 */
46typedef volatile struct tioce {
47 /*
48 * ADMIN : Administration Registers
49 */
50 uint64_t ce_adm_id; /* 0x000000 */
51 uint64_t ce_pad_000008; /* 0x000008 */
52 uint64_t ce_adm_dyn_credit_status; /* 0x000010 */
53 uint64_t ce_adm_last_credit_status; /* 0x000018 */
54 uint64_t ce_adm_credit_limit; /* 0x000020 */
55 uint64_t ce_adm_force_credit; /* 0x000028 */
56 uint64_t ce_adm_control; /* 0x000030 */
57 uint64_t ce_adm_mmr_chn_timeout; /* 0x000038 */
58 uint64_t ce_adm_ssp_ure_timeout; /* 0x000040 */
59 uint64_t ce_adm_ssp_dre_timeout; /* 0x000048 */
60 uint64_t ce_adm_ssp_debug_sel; /* 0x000050 */
61 uint64_t ce_adm_int_status; /* 0x000058 */
62 uint64_t ce_adm_int_status_alias; /* 0x000060 */
63 uint64_t ce_adm_int_mask; /* 0x000068 */
64 uint64_t ce_adm_int_pending; /* 0x000070 */
65 uint64_t ce_adm_force_int; /* 0x000078 */
66 uint64_t ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */
67 uint64_t ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */
68 uint64_t ce_adm_error_summary; /* 0x000100 */
69 uint64_t ce_adm_error_summary_alias; /* 0x000108 */
70 uint64_t ce_adm_error_mask; /* 0x000110 */
71 uint64_t ce_adm_first_error; /* 0x000118 */
72 uint64_t ce_adm_error_overflow; /* 0x000120 */
73 uint64_t ce_adm_error_overflow_alias; /* 0x000128 */
74 uint64_t ce_pad_000130[2]; /* 0x000130 -- 0x000138 */
75 uint64_t ce_adm_tnum_error; /* 0x000140 */
76 uint64_t ce_adm_mmr_err_detail; /* 0x000148 */
77 uint64_t ce_adm_msg_sram_perr_detail; /* 0x000150 */
78 uint64_t ce_adm_bap_sram_perr_detail; /* 0x000158 */
79 uint64_t ce_adm_ce_sram_perr_detail; /* 0x000160 */
80 uint64_t ce_adm_ce_credit_oflow_detail; /* 0x000168 */
81 uint64_t ce_adm_tx_link_idle_max_timer; /* 0x000170 */
82 uint64_t ce_adm_pcie_debug_sel; /* 0x000178 */
83 uint64_t ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */
84
85 uint64_t ce_adm_pcie_debug_sel_top; /* 0x000200 */
86 uint64_t ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */
87 uint64_t ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */
88 uint64_t ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */
89 uint64_t ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */
90 uint64_t ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */
91 uint64_t ce_adm_pcie_trig_compare_top; /* 0x000230 */
92 uint64_t ce_adm_pcie_trig_compare_en_top; /* 0x000238 */
93 uint64_t ce_adm_ssp_debug_sel_top; /* 0x000240 */
94 uint64_t ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */
95 uint64_t ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */
96 uint64_t ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */
97 uint64_t ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */
98 uint64_t ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */
99 uint64_t ce_adm_ssp_trig_compare_top; /* 0x000270 */
100 uint64_t ce_adm_ssp_trig_compare_en_top; /* 0x000278 */
101 uint64_t ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */
102
103 uint64_t ce_adm_bap_ctrl; /* 0x000400 */
104 uint64_t ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */
105
106 uint64_t ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */
107 uint64_t ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */
108
109 uint64_t ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */
110 uint64_t ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */
111
112 uint64_t ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */
113 uint64_t ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */
114
115 uint64_t ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */
116
117 /*
118 * LSI : LSI's PCI Express Link Registers (Link#1 and Link#2)
119 * Link#1 MMRs at start at 0x002000, Link#2 MMRs at 0x003000
120 * NOTE: the comment offsets at far right: let 'z' = {2 or 3}
121 */
122 #define ce_lsi(link_num) ce_lsi[link_num-1]
123 struct ce_lsi_reg {
124 uint64_t ce_lsi_lpu_id; /* 0x00z000 */
125 uint64_t ce_lsi_rst; /* 0x00z008 */
126 uint64_t ce_lsi_dbg_stat; /* 0x00z010 */
127 uint64_t ce_lsi_dbg_cfg; /* 0x00z018 */
128 uint64_t ce_lsi_ltssm_ctrl; /* 0x00z020 */
129 uint64_t ce_lsi_lk_stat; /* 0x00z028 */
130 uint64_t ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */
131 uint64_t ce_lsi_int_and_stat; /* 0x00z040 */
132 uint64_t ce_lsi_int_mask; /* 0x00z048 */
133 uint64_t ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */
134 uint64_t ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */
135 uint64_t ce_pad_00z108; /* 0x00z108 */
136 uint64_t ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */
137 uint64_t ce_pad_00z118; /* 0x00z118 */
138 uint64_t ce_lsi_lk_perf_cnt1; /* 0x00z120 */
139 uint64_t ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */
140 uint64_t ce_lsi_lk_perf_cnt2; /* 0x00z130 */
141 uint64_t ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */
142 uint64_t ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */
143 uint64_t ce_lsi_lk_lyr_cfg; /* 0x00z200 */
144 uint64_t ce_lsi_lk_lyr_status; /* 0x00z208 */
145 uint64_t ce_lsi_lk_lyr_int_stat; /* 0x00z210 */
146 uint64_t ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */
147 uint64_t ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */
148 uint64_t ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */
149 uint64_t ce_lsi_fc_upd_ctl; /* 0x00z240 */
150 uint64_t ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */
151 uint64_t ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */
152 uint64_t ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */
153 uint64_t ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */
154 uint64_t ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */
155 uint64_t ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */
156 uint64_t ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */
157 uint64_t ce_lsi_rply_tmr_thr; /* 0x00z410 */
158 uint64_t ce_lsi_rply_tmr; /* 0x00z418 */
159 uint64_t ce_lsi_rply_num_stat; /* 0x00z420 */
160 uint64_t ce_lsi_rty_buf_max_addr; /* 0x00z428 */
161 uint64_t ce_lsi_rty_fifo_ptr; /* 0x00z430 */
162 uint64_t ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */
163 uint64_t ce_lsi_rty_fifo_cred; /* 0x00z440 */
164 uint64_t ce_lsi_seq_cnt; /* 0x00z448 */
165 uint64_t ce_lsi_ack_sent_seq_num; /* 0x00z450 */
166 uint64_t ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */
167 uint64_t ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */
168 uint64_t ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */
169 uint64_t ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */
170 uint64_t ce_pad_00z478; /* 0x00z478 */
171 uint64_t ce_lsi_mem_addr_ctl; /* 0x00z480 */
172 uint64_t ce_lsi_mem_d_ld0; /* 0x00z488 */
173 uint64_t ce_lsi_mem_d_ld1; /* 0x00z490 */
174 uint64_t ce_lsi_mem_d_ld2; /* 0x00z498 */
175 uint64_t ce_lsi_mem_d_ld3; /* 0x00z4A0 */
176 uint64_t ce_lsi_mem_d_ld4; /* 0x00z4A8 */
177 uint64_t ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */
178 uint64_t ce_lsi_rty_d_cnt; /* 0x00z4C0 */
179 uint64_t ce_lsi_seq_buf_cnt; /* 0x00z4C8 */
180 uint64_t ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */
181 uint64_t ce_pad_00z4D8; /* 0x00z4D8 */
182 uint64_t ce_lsi_ack_lat_thr; /* 0x00z4E0 */
183 uint64_t ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */
184 uint64_t ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */
185 uint64_t ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */
186 uint64_t ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */
187 uint64_t ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */
188 uint64_t ce_lsi_phy_lyr_cfg; /* 0x00z600 */
189 uint64_t ce_pad_00z608; /* 0x00z608 */
190 uint64_t ce_lsi_phy_lyr_int_stat; /* 0x00z610 */
191 uint64_t ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */
192 uint64_t ce_lsi_phy_lyr_int_mask; /* 0x00z620 */
193 uint64_t ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */
194 uint64_t ce_lsi_rcv_phy_cfg; /* 0x00z680 */
195 uint64_t ce_lsi_rcv_phy_stat1; /* 0x00z688 */
196 uint64_t ce_lsi_rcv_phy_stat2; /* 0x00z690 */
197 uint64_t ce_lsi_rcv_phy_stat3; /* 0x00z698 */
198 uint64_t ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */
199 uint64_t ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */
200 uint64_t ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */
201 uint64_t ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */
202 uint64_t ce_lsi_tx_phy_cfg; /* 0x00z700 */
203 uint64_t ce_lsi_tx_phy_stat; /* 0x00z708 */
204 uint64_t ce_lsi_tx_phy_int_stat; /* 0x00z710 */
205 uint64_t ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */
206 uint64_t ce_lsi_tx_phy_int_mask; /* 0x00z720 */
207 uint64_t ce_lsi_tx_phy_stat2; /* 0x00z728 */
208 uint64_t ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */
209 uint64_t ce_lsi_ltssm_cfg1; /* 0x00z780 */
210 uint64_t ce_lsi_ltssm_cfg2; /* 0x00z788 */
211 uint64_t ce_lsi_ltssm_cfg3; /* 0x00z790 */
212 uint64_t ce_lsi_ltssm_cfg4; /* 0x00z798 */
213 uint64_t ce_lsi_ltssm_cfg5; /* 0x00z7A0 */
214 uint64_t ce_lsi_ltssm_stat1; /* 0x00z7A8 */
215 uint64_t ce_lsi_ltssm_stat2; /* 0x00z7B0 */
216 uint64_t ce_lsi_ltssm_int_stat; /* 0x00z7B8 */
217 uint64_t ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */
218 uint64_t ce_lsi_ltssm_int_mask; /* 0x00z7C8 */
219 uint64_t ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */
220 uint64_t ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */
221 uint64_t ce_lsi_gb_cfg1; /* 0x00z800 */
222 uint64_t ce_lsi_gb_cfg2; /* 0x00z808 */
223 uint64_t ce_lsi_gb_cfg3; /* 0x00z810 */
224 uint64_t ce_lsi_gb_cfg4; /* 0x00z818 */
225 uint64_t ce_lsi_gb_stat; /* 0x00z820 */
226 uint64_t ce_lsi_gb_int_stat; /* 0x00z828 */
227 uint64_t ce_lsi_gb_int_stat_test; /* 0x00z830 */
228 uint64_t ce_lsi_gb_int_mask; /* 0x00z838 */
229 uint64_t ce_lsi_gb_pwr_dn1; /* 0x00z840 */
230 uint64_t ce_lsi_gb_pwr_dn2; /* 0x00z848 */
231 uint64_t ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */
232 } ce_lsi[2];
233
234 uint64_t ce_pad_004000[10]; /* 0x004000 -- 0x004048 */
235
236 /*
237 * CRM: Coretalk Receive Module Registers
238 */
239 uint64_t ce_crm_debug_mux; /* 0x004050 */
240 uint64_t ce_pad_004058; /* 0x004058 */
241 uint64_t ce_crm_ssp_err_cmd_wrd; /* 0x004060 */
242 uint64_t ce_crm_ssp_err_addr; /* 0x004068 */
243 uint64_t ce_crm_ssp_err_syn; /* 0x004070 */
244
245 uint64_t ce_pad_004078[499]; /* 0x004078 -- 0x005008 */
246
247 /*
248 * CXM: Coretalk Xmit Module Registers
249 */
250 uint64_t ce_cxm_dyn_credit_status; /* 0x005010 */
251 uint64_t ce_cxm_last_credit_status; /* 0x005018 */
252 uint64_t ce_cxm_credit_limit; /* 0x005020 */
253 uint64_t ce_cxm_force_credit; /* 0x005028 */
254 uint64_t ce_cxm_disable_bypass; /* 0x005030 */
255 uint64_t ce_pad_005038[3]; /* 0x005038 -- 0x005048 */
256 uint64_t ce_cxm_debug_mux; /* 0x005050 */
257
258 uint64_t ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */
259
260 /*
261 * DTL: Downstream Transaction Layer Regs (Link#1 and Link#2)
262 * DTL: Link#1 MMRs at start at 0x006000, Link#2 MMRs at 0x008000
263 * DTL: the comment offsets at far right: let 'y' = {6 or 8}
264 *
265 * UTL: Downstream Transaction Layer Regs (Link#1 and Link#2)
266 * UTL: Link#1 MMRs at start at 0x007000, Link#2 MMRs at 0x009000
267 * UTL: the comment offsets at far right: let 'z' = {7 or 9}
268 */
269 #define ce_dtl(link_num) ce_dtl_utl[link_num-1]
270 #define ce_utl(link_num) ce_dtl_utl[link_num-1]
271 struct ce_dtl_utl_reg {
272 /* DTL */
273 uint64_t ce_dtl_dtdr_credit_limit; /* 0x00y000 */
274 uint64_t ce_dtl_dtdr_credit_force; /* 0x00y008 */
275 uint64_t ce_dtl_dyn_credit_status; /* 0x00y010 */
276 uint64_t ce_dtl_dtl_last_credit_stat; /* 0x00y018 */
277 uint64_t ce_dtl_dtl_ctrl; /* 0x00y020 */
278 uint64_t ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */
279 uint64_t ce_dtl_debug_sel; /* 0x00y050 */
280 uint64_t ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */
281
282 /* UTL */
283 uint64_t ce_utl_utl_ctrl; /* 0x00z000 */
284 uint64_t ce_utl_debug_sel; /* 0x00z008 */
285 uint64_t ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */
286 } ce_dtl_utl[2];
287
288 uint64_t ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */
289
290 /*
291 * URE: Upstream Request Engine
292 */
293 uint64_t ce_ure_dyn_credit_status; /* 0x00B010 */
294 uint64_t ce_ure_last_credit_status; /* 0x00B018 */
295 uint64_t ce_ure_credit_limit; /* 0x00B020 */
296 uint64_t ce_pad_00B028; /* 0x00B028 */
297 uint64_t ce_ure_control; /* 0x00B030 */
298 uint64_t ce_ure_status; /* 0x00B038 */
299 uint64_t ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */
300 uint64_t ce_ure_debug_sel; /* 0x00B050 */
301 uint64_t ce_ure_pcie_debug_sel; /* 0x00B058 */
302 uint64_t ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */
303 uint64_t ce_ure_ssp_err_addr; /* 0x00B068 */
304 uint64_t ce_ure_page_map; /* 0x00B070 */
305 uint64_t ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */
306 uint64_t ce_ure_pipe_sel1; /* 0x00B088 */
307 uint64_t ce_ure_pipe_mask1; /* 0x00B090 */
308 uint64_t ce_ure_pipe_sel2; /* 0x00B098 */
309 uint64_t ce_ure_pipe_mask2; /* 0x00B0A0 */
310 uint64_t ce_ure_pcie1_credits_sent; /* 0x00B0A8 */
311 uint64_t ce_ure_pcie1_credits_used; /* 0x00B0B0 */
312 uint64_t ce_ure_pcie1_credit_limit; /* 0x00B0B8 */
313 uint64_t ce_ure_pcie2_credits_sent; /* 0x00B0C0 */
314 uint64_t ce_ure_pcie2_credits_used; /* 0x00B0C8 */
315 uint64_t ce_ure_pcie2_credit_limit; /* 0x00B0D0 */
316 uint64_t ce_ure_pcie_force_credit; /* 0x00B0D8 */
317 uint64_t ce_ure_rd_tnum_val; /* 0x00B0E0 */
318 uint64_t ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */
319 uint64_t ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */
320 uint64_t ce_ure_rd_tnum_error; /* 0x00B0F8 */
321 uint64_t ce_ure_rd_tnum_first_cl; /* 0x00B100 */
322 uint64_t ce_ure_rd_tnum_link_buf; /* 0x00B108 */
323 uint64_t ce_ure_wr_tnum_val; /* 0x00B110 */
324 uint64_t ce_ure_sram_err_addr0; /* 0x00B118 */
325 uint64_t ce_ure_sram_err_addr1; /* 0x00B120 */
326 uint64_t ce_ure_sram_err_addr2; /* 0x00B128 */
327 uint64_t ce_ure_sram_rd_addr0; /* 0x00B130 */
328 uint64_t ce_ure_sram_rd_addr1; /* 0x00B138 */
329 uint64_t ce_ure_sram_rd_addr2; /* 0x00B140 */
330 uint64_t ce_ure_sram_wr_addr0; /* 0x00B148 */
331 uint64_t ce_ure_sram_wr_addr1; /* 0x00B150 */
332 uint64_t ce_ure_sram_wr_addr2; /* 0x00B158 */
333 uint64_t ce_ure_buf_flush10; /* 0x00B160 */
334 uint64_t ce_ure_buf_flush11; /* 0x00B168 */
335 uint64_t ce_ure_buf_flush12; /* 0x00B170 */
336 uint64_t ce_ure_buf_flush13; /* 0x00B178 */
337 uint64_t ce_ure_buf_flush20; /* 0x00B180 */
338 uint64_t ce_ure_buf_flush21; /* 0x00B188 */
339 uint64_t ce_ure_buf_flush22; /* 0x00B190 */
340 uint64_t ce_ure_buf_flush23; /* 0x00B198 */
341 uint64_t ce_ure_pcie_control1; /* 0x00B1A0 */
342 uint64_t ce_ure_pcie_control2; /* 0x00B1A8 */
343
344 uint64_t ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */
345
346 /* Upstream Data Buffer, Port1 */
347 struct ce_ure_maint_ups_dat1_data {
348 uint64_t data63_0[512]; /* 0x00C000 -- 0x00CFF8 */
349 uint64_t data127_64[512]; /* 0x00D000 -- 0x00DFF8 */
350 uint64_t parity[512]; /* 0x00E000 -- 0x00EFF8 */
351 } ce_ure_maint_ups_dat1;
352
353 /* Upstream Header Buffer, Port1 */
354 struct ce_ure_maint_ups_hdr1_data {
355 uint64_t data63_0[512]; /* 0x00F000 -- 0x00FFF8 */
356 uint64_t data127_64[512]; /* 0x010000 -- 0x010FF8 */
357 uint64_t parity[512]; /* 0x011000 -- 0x011FF8 */
358 } ce_ure_maint_ups_hdr1;
359
360 /* Upstream Data Buffer, Port2 */
361 struct ce_ure_maint_ups_dat2_data {
362 uint64_t data63_0[512]; /* 0x012000 -- 0x012FF8 */
363 uint64_t data127_64[512]; /* 0x013000 -- 0x013FF8 */
364 uint64_t parity[512]; /* 0x014000 -- 0x014FF8 */
365 } ce_ure_maint_ups_dat2;
366
367 /* Upstream Header Buffer, Port2 */
368 struct ce_ure_maint_ups_hdr2_data {
369 uint64_t data63_0[512]; /* 0x015000 -- 0x015FF8 */
370 uint64_t data127_64[512]; /* 0x016000 -- 0x016FF8 */
371 uint64_t parity[512]; /* 0x017000 -- 0x017FF8 */
372 } ce_ure_maint_ups_hdr2;
373
374 /* Downstream Data Buffer */
375 struct ce_ure_maint_dns_dat_data {
376 uint64_t data63_0[512]; /* 0x018000 -- 0x018FF8 */
377 uint64_t data127_64[512]; /* 0x019000 -- 0x019FF8 */
378 uint64_t parity[512]; /* 0x01A000 -- 0x01AFF8 */
379 } ce_ure_maint_dns_dat;
380
381 /* Downstream Header Buffer */
382 struct ce_ure_maint_dns_hdr_data {
383 uint64_t data31_0[64]; /* 0x01B000 -- 0x01B1F8 */
384 uint64_t data95_32[64]; /* 0x01B200 -- 0x01B3F8 */
385 uint64_t parity[64]; /* 0x01B400 -- 0x01B5F8 */
386 } ce_ure_maint_dns_hdr;
387
388 /* RCI Buffer Data */
389 struct ce_ure_maint_rci_data {
390 uint64_t data41_0[64]; /* 0x01B600 -- 0x01B7F8 */
391 uint64_t data69_42[64]; /* 0x01B800 -- 0x01B9F8 */
392 } ce_ure_maint_rci;
393
394 /* Response Queue */
395 uint64_t ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */
396
397 uint64_t ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */
398
399 /* Admin Build-a-Packet Buffer */
400 struct ce_adm_maint_bap_buf_data {
401 uint64_t data63_0[258]; /* 0x024000 -- 0x024808 */
402 uint64_t data127_64[258]; /* 0x024810 -- 0x025018 */
403 uint64_t parity[258]; /* 0x025020 -- 0x025828 */
404 } ce_adm_maint_bap_buf;
405
406 uint64_t ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */
407
408 /* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */
409 uint64_t ce_ure_ate40[TIOCE_NUM_M40_ATES];
410
411 /* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */
412 uint64_t ce_ure_ate3240[TIOCE_NUM_M3240_ATES];
413
414 uint64_t ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */
415
416 /*
417 * DRE: Down Stream Request Engine
418 */
419 uint64_t ce_dre_dyn_credit_status1; /* 0x040010 */
420 uint64_t ce_dre_dyn_credit_status2; /* 0x040018 */
421 uint64_t ce_dre_last_credit_status1; /* 0x040020 */
422 uint64_t ce_dre_last_credit_status2; /* 0x040028 */
423 uint64_t ce_dre_credit_limit1; /* 0x040030 */
424 uint64_t ce_dre_credit_limit2; /* 0x040038 */
425 uint64_t ce_dre_force_credit1; /* 0x040040 */
426 uint64_t ce_dre_force_credit2; /* 0x040048 */
427 uint64_t ce_dre_debug_mux1; /* 0x040050 */
428 uint64_t ce_dre_debug_mux2; /* 0x040058 */
429 uint64_t ce_dre_ssp_err_cmd_wrd; /* 0x040060 */
430 uint64_t ce_dre_ssp_err_addr; /* 0x040068 */
431 uint64_t ce_dre_comp_err_cmd_wrd; /* 0x040070 */
432 uint64_t ce_dre_comp_err_addr; /* 0x040078 */
433 uint64_t ce_dre_req_status; /* 0x040080 */
434 uint64_t ce_dre_config1; /* 0x040088 */
435 uint64_t ce_dre_config2; /* 0x040090 */
436 uint64_t ce_dre_config_req_status; /* 0x040098 */
437 uint64_t ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */
438 uint64_t ce_dre_dyn_fifo; /* 0x040100 */
439 uint64_t ce_pad_040108[3]; /* 0x040108 -- 0x040118 */
440 uint64_t ce_dre_last_fifo; /* 0x040120 */
441
442 uint64_t ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */
443
444 /* DRE Downstream Head Queue */
445 struct ce_dre_maint_ds_head_queue {
446 uint64_t data63_0[32]; /* 0x040200 -- 0x0402F8 */
447 uint64_t data127_64[32]; /* 0x040300 -- 0x0403F8 */
448 uint64_t parity[32]; /* 0x040400 -- 0x0404F8 */
449 } ce_dre_maint_ds_head_q;
450
451 uint64_t ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */
452
453 /* DRE Downstream Data Queue */
454 struct ce_dre_maint_ds_data_queue {
455 uint64_t data63_0[256]; /* 0x041000 -- 0x0417F8 */
456 uint64_t ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */
457 uint64_t data127_64[256]; /* 0x042000 -- 0x0427F8 */
458 uint64_t ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */
459 uint64_t parity[256]; /* 0x043000 -- 0x0437F8 */
460 uint64_t ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */
461 } ce_dre_maint_ds_data_q;
462
463 /* DRE URE Upstream Response Queue */
464 struct ce_dre_maint_ure_us_rsp_queue {
465 uint64_t data63_0[8]; /* 0x044000 -- 0x044038 */
466 uint64_t ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */
467 uint64_t data127_64[8]; /* 0x044100 -- 0x044138 */
468 uint64_t ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */
469 uint64_t parity[8]; /* 0x044200 -- 0x044238 */
470 uint64_t ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */
471 } ce_dre_maint_ure_us_rsp_q;
472
473 uint64_t ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */
474
475 uint64_t ce_end_of_struct; /* 0x044400 */
476} tioce_t;
477
478
479/* ce_adm_int_mask/ce_adm_int_status register bit defines */
480#define CE_ADM_INT_CE_ERROR_SHFT 0
481#define CE_ADM_INT_LSI1_IP_ERROR_SHFT 1
482#define CE_ADM_INT_LSI2_IP_ERROR_SHFT 2
483#define CE_ADM_INT_PCIE_ERROR_SHFT 3
484#define CE_ADM_INT_PORT1_HOTPLUG_EVENT_SHFT 4
485#define CE_ADM_INT_PORT2_HOTPLUG_EVENT_SHFT 5
486#define CE_ADM_INT_PCIE_PORT1_DEV_A_SHFT 6
487#define CE_ADM_INT_PCIE_PORT1_DEV_B_SHFT 7
488#define CE_ADM_INT_PCIE_PORT1_DEV_C_SHFT 8
489#define CE_ADM_INT_PCIE_PORT1_DEV_D_SHFT 9
490#define CE_ADM_INT_PCIE_PORT2_DEV_A_SHFT 10
491#define CE_ADM_INT_PCIE_PORT2_DEV_B_SHFT 11
492#define CE_ADM_INT_PCIE_PORT2_DEV_C_SHFT 12
493#define CE_ADM_INT_PCIE_PORT2_DEV_D_SHFT 13
494#define CE_ADM_INT_PCIE_MSG_SHFT 14 /*see int_dest_14*/
495#define CE_ADM_INT_PCIE_MSG_SLOT_0_SHFT 14
496#define CE_ADM_INT_PCIE_MSG_SLOT_1_SHFT 15
497#define CE_ADM_INT_PCIE_MSG_SLOT_2_SHFT 16
498#define CE_ADM_INT_PCIE_MSG_SLOT_3_SHFT 17
499#define CE_ADM_INT_PORT1_PM_PME_MSG_SHFT 22
500#define CE_ADM_INT_PORT2_PM_PME_MSG_SHFT 23
501
502/* ce_adm_force_int register bit defines */
503#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_A_SHFT 0
504#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_B_SHFT 1
505#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_C_SHFT 2
506#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_D_SHFT 3
507#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_A_SHFT 4
508#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_B_SHFT 5
509#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_C_SHFT 6
510#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_D_SHFT 7
511#define CE_ADM_FORCE_INT_ALWAYS_SHFT 8
512
513/* ce_adm_int_dest register bit masks & shifts */
514#define INTR_VECTOR_SHFT 56
515
516/* ce_adm_error_mask and ce_adm_error_summary register bit masks */
517#define CE_ADM_ERR_CRM_SSP_REQ_INVALID (0x1ULL << 0)
518#define CE_ADM_ERR_SSP_REQ_HEADER (0x1ULL << 1)
519#define CE_ADM_ERR_SSP_RSP_HEADER (0x1ULL << 2)
520#define CE_ADM_ERR_SSP_PROTOCOL_ERROR (0x1ULL << 3)
521#define CE_ADM_ERR_SSP_SBE (0x1ULL << 4)
522#define CE_ADM_ERR_SSP_MBE (0x1ULL << 5)
523#define CE_ADM_ERR_CXM_CREDIT_OFLOW (0x1ULL << 6)
524#define CE_ADM_ERR_DRE_SSP_REQ_INVAL (0x1ULL << 7)
525#define CE_ADM_ERR_SSP_REQ_LONG (0x1ULL << 8)
526#define CE_ADM_ERR_SSP_REQ_OFLOW (0x1ULL << 9)
527#define CE_ADM_ERR_SSP_REQ_SHORT (0x1ULL << 10)
528#define CE_ADM_ERR_SSP_REQ_SIDEBAND (0x1ULL << 11)
529#define CE_ADM_ERR_SSP_REQ_ADDR_ERR (0x1ULL << 12)
530#define CE_ADM_ERR_SSP_REQ_BAD_BE (0x1ULL << 13)
531#define CE_ADM_ERR_PCIE_COMPL_TIMEOUT (0x1ULL << 14)
532#define CE_ADM_ERR_PCIE_UNEXP_COMPL (0x1ULL << 15)
533#define CE_ADM_ERR_PCIE_ERR_COMPL (0x1ULL << 16)
534#define CE_ADM_ERR_DRE_CREDIT_OFLOW (0x1ULL << 17)
535#define CE_ADM_ERR_DRE_SRAM_PE (0x1ULL << 18)
536#define CE_ADM_ERR_SSP_RSP_INVALID (0x1ULL << 19)
537#define CE_ADM_ERR_SSP_RSP_LONG (0x1ULL << 20)
538#define CE_ADM_ERR_SSP_RSP_SHORT (0x1ULL << 21)
539#define CE_ADM_ERR_SSP_RSP_SIDEBAND (0x1ULL << 22)
540#define CE_ADM_ERR_URE_SSP_RSP_UNEXP (0x1ULL << 23)
541#define CE_ADM_ERR_URE_SSP_WR_REQ_TIMEOUT (0x1ULL << 24)
542#define CE_ADM_ERR_URE_SSP_RD_REQ_TIMEOUT (0x1ULL << 25)
543#define CE_ADM_ERR_URE_ATE3240_PAGE_FAULT (0x1ULL << 26)
544#define CE_ADM_ERR_URE_ATE40_PAGE_FAULT (0x1ULL << 27)
545#define CE_ADM_ERR_URE_CREDIT_OFLOW (0x1ULL << 28)
546#define CE_ADM_ERR_URE_SRAM_PE (0x1ULL << 29)
547#define CE_ADM_ERR_ADM_SSP_RSP_UNEXP (0x1ULL << 30)
548#define CE_ADM_ERR_ADM_SSP_REQ_TIMEOUT (0x1ULL << 31)
549#define CE_ADM_ERR_MMR_ACCESS_ERROR (0x1ULL << 32)
550#define CE_ADM_ERR_MMR_ADDR_ERROR (0x1ULL << 33)
551#define CE_ADM_ERR_ADM_CREDIT_OFLOW (0x1ULL << 34)
552#define CE_ADM_ERR_ADM_SRAM_PE (0x1ULL << 35)
553#define CE_ADM_ERR_DTL1_MIN_PDATA_CREDIT_ERR (0x1ULL << 36)
554#define CE_ADM_ERR_DTL1_INF_COMPL_CRED_UPDT_ERR (0x1ULL << 37)
555#define CE_ADM_ERR_DTL1_INF_POSTED_CRED_UPDT_ERR (0x1ULL << 38)
556#define CE_ADM_ERR_DTL1_INF_NPOSTED_CRED_UPDT_ERR (0x1ULL << 39)
557#define CE_ADM_ERR_DTL1_COMP_HD_CRED_MAX_ERR (0x1ULL << 40)
558#define CE_ADM_ERR_DTL1_COMP_D_CRED_MAX_ERR (0x1ULL << 41)
559#define CE_ADM_ERR_DTL1_NPOSTED_HD_CRED_MAX_ERR (0x1ULL << 42)
560#define CE_ADM_ERR_DTL1_NPOSTED_D_CRED_MAX_ERR (0x1ULL << 43)
561#define CE_ADM_ERR_DTL1_POSTED_HD_CRED_MAX_ERR (0x1ULL << 44)
562#define CE_ADM_ERR_DTL1_POSTED_D_CRED_MAX_ERR (0x1ULL << 45)
563#define CE_ADM_ERR_DTL2_MIN_PDATA_CREDIT_ERR (0x1ULL << 46)
564#define CE_ADM_ERR_DTL2_INF_COMPL_CRED_UPDT_ERR (0x1ULL << 47)
565#define CE_ADM_ERR_DTL2_INF_POSTED_CRED_UPDT_ERR (0x1ULL << 48)
566#define CE_ADM_ERR_DTL2_INF_NPOSTED_CRED_UPDT_ERR (0x1ULL << 49)
567#define CE_ADM_ERR_DTL2_COMP_HD_CRED_MAX_ERR (0x1ULL << 50)
568#define CE_ADM_ERR_DTL2_COMP_D_CRED_MAX_ERR (0x1ULL << 51)
569#define CE_ADM_ERR_DTL2_NPOSTED_HD_CRED_MAX_ERR (0x1ULL << 52)
570#define CE_ADM_ERR_DTL2_NPOSTED_D_CRED_MAX_ERR (0x1ULL << 53)
571#define CE_ADM_ERR_DTL2_POSTED_HD_CRED_MAX_ERR (0x1ULL << 54)
572#define CE_ADM_ERR_DTL2_POSTED_D_CRED_MAX_ERR (0x1ULL << 55)
573#define CE_ADM_ERR_PORT1_PCIE_COR_ERR (0x1ULL << 56)
574#define CE_ADM_ERR_PORT1_PCIE_NFAT_ERR (0x1ULL << 57)
575#define CE_ADM_ERR_PORT1_PCIE_FAT_ERR (0x1ULL << 58)
576#define CE_ADM_ERR_PORT2_PCIE_COR_ERR (0x1ULL << 59)
577#define CE_ADM_ERR_PORT2_PCIE_NFAT_ERR (0x1ULL << 60)
578#define CE_ADM_ERR_PORT2_PCIE_FAT_ERR (0x1ULL << 61)
579
580/* ce_adm_ure_ups_buf_barrier_flush register bit masks and shifts */
581#define FLUSH_SEL_PORT1_PIPE0_SHFT 0
582#define FLUSH_SEL_PORT1_PIPE1_SHFT 4
583#define FLUSH_SEL_PORT1_PIPE2_SHFT 8
584#define FLUSH_SEL_PORT1_PIPE3_SHFT 12
585#define FLUSH_SEL_PORT2_PIPE0_SHFT 16
586#define FLUSH_SEL_PORT2_PIPE1_SHFT 20
587#define FLUSH_SEL_PORT2_PIPE2_SHFT 24
588#define FLUSH_SEL_PORT2_PIPE3_SHFT 28
589
590/* ce_dre_config1 register bit masks and shifts */
591#define CE_DRE_RO_ENABLE (0x1ULL << 0)
592#define CE_DRE_DYN_RO_ENABLE (0x1ULL << 1)
593#define CE_DRE_SUP_CONFIG_COMP_ERROR (0x1ULL << 2)
594#define CE_DRE_SUP_IO_COMP_ERROR (0x1ULL << 3)
595#define CE_DRE_ADDR_MODE_SHFT 4
596
597/* ce_dre_config_req_status register bit masks */
598#define CE_DRE_LAST_CONFIG_COMPLETION (0x7ULL << 0)
599#define CE_DRE_DOWNSTREAM_CONFIG_ERROR (0x1ULL << 3)
600#define CE_DRE_CONFIG_COMPLETION_VALID (0x1ULL << 4)
601#define CE_DRE_CONFIG_REQUEST_ACTIVE (0x1ULL << 5)
602
603/* ce_ure_control register bit masks & shifts */
604#define CE_URE_RD_MRG_ENABLE (0x1ULL << 0)
605#define CE_URE_WRT_MRG_ENABLE1 (0x1ULL << 4)
606#define CE_URE_WRT_MRG_ENABLE2 (0x1ULL << 5)
607#define CE_URE_RSPQ_BYPASS_DISABLE (0x1ULL << 24)
608#define CE_URE_UPS_DAT1_PAR_DISABLE (0x1ULL << 32)
609#define CE_URE_UPS_HDR1_PAR_DISABLE (0x1ULL << 33)
610#define CE_URE_UPS_DAT2_PAR_DISABLE (0x1ULL << 34)
611#define CE_URE_UPS_HDR2_PAR_DISABLE (0x1ULL << 35)
612#define CE_URE_ATE_PAR_DISABLE (0x1ULL << 36)
613#define CE_URE_RCI_PAR_DISABLE (0x1ULL << 37)
614#define CE_URE_RSPQ_PAR_DISABLE (0x1ULL << 38)
615#define CE_URE_DNS_DAT_PAR_DISABLE (0x1ULL << 39)
616#define CE_URE_DNS_HDR_PAR_DISABLE (0x1ULL << 40)
617#define CE_URE_MALFORM_DISABLE (0x1ULL << 44)
618#define CE_URE_UNSUP_DISABLE (0x1ULL << 45)
619
620/* ce_ure_page_map register bit masks & shifts */
621#define CE_URE_ATE3240_ENABLE (0x1ULL << 0)
622#define CE_URE_ATE40_ENABLE (0x1ULL << 1)
623#define CE_URE_PAGESIZE_SHFT 4
624#define CE_URE_PAGESIZE_MASK (0x7ULL << CE_URE_PAGESIZE_SHFT)
625#define CE_URE_4K_PAGESIZE (0x0ULL << CE_URE_PAGESIZE_SHFT)
626#define CE_URE_16K_PAGESIZE (0x1ULL << CE_URE_PAGESIZE_SHFT)
627#define CE_URE_64K_PAGESIZE (0x2ULL << CE_URE_PAGESIZE_SHFT)
628#define CE_URE_128K_PAGESIZE (0x3ULL << CE_URE_PAGESIZE_SHFT)
629#define CE_URE_256K_PAGESIZE (0x4ULL << CE_URE_PAGESIZE_SHFT)
630
631/* ce_ure_pipe_sel register bit masks & shifts */
632#define PKT_TRAFIC_SHRT 16
633#define BUS_SRC_ID_SHFT 8
634#define DEV_SRC_ID_SHFT 3
635#define FNC_SRC_ID_SHFT 0
636#define CE_URE_TC_MASK (0x07ULL << PKT_TRAFIC_SHRT)
637#define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT)
638#define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT)
639#define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT)
640#define CE_URE_PIPE_BUS(b) (((uint64_t)(b) << BUS_SRC_ID_SHFT) & \
641 CE_URE_BUS_MASK)
642#define CE_URE_PIPE_DEV(d) (((uint64_t)(d) << DEV_SRC_ID_SHFT) & \
643 CE_URE_DEV_MASK)
644#define CE_URE_PIPE_FNC(f) (((uint64_t)(f) << FNC_SRC_ID_SHFT) & \
645 CE_URE_FNC_MASK)
646
647#define CE_URE_SEL1_SHFT 0
648#define CE_URE_SEL2_SHFT 20
649#define CE_URE_SEL3_SHFT 40
650#define CE_URE_SEL1_MASK (0x7FFFFULL << CE_URE_SEL1_SHFT)
651#define CE_URE_SEL2_MASK (0x7FFFFULL << CE_URE_SEL2_SHFT)
652#define CE_URE_SEL3_MASK (0x7FFFFULL << CE_URE_SEL3_SHFT)
653
654
655/* ce_ure_pipe_mask register bit masks & shifts */
656#define CE_URE_MASK1_SHFT 0
657#define CE_URE_MASK2_SHFT 20
658#define CE_URE_MASK3_SHFT 40
659#define CE_URE_MASK1_MASK (0x7FFFFULL << CE_URE_MASK1_SHFT)
660#define CE_URE_MASK2_MASK (0x7FFFFULL << CE_URE_MASK2_SHFT)
661#define CE_URE_MASK3_MASK (0x7FFFFULL << CE_URE_MASK3_SHFT)
662
663
664/* ce_ure_pcie_control1 register bit masks & shifts */
665#define CE_URE_SI (0x1ULL << 0)
666#define CE_URE_ELAL_SHFT 4
667#define CE_URE_ELAL_MASK (0x7ULL << CE_URE_ELAL_SHFT)
668#define CE_URE_ELAL1_SHFT 8
669#define CE_URE_ELAL1_MASK (0x7ULL << CE_URE_ELAL1_SHFT)
670#define CE_URE_SCC (0x1ULL << 12)
671#define CE_URE_PN1_SHFT 16
672#define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT)
673#define CE_URE_PN2_SHFT 24
674#define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT)
675#define CE_URE_PN1_SET(n) (((uint64_t)(n) << CE_URE_PN1_SHFT) & \
676 CE_URE_PN1_MASK)
677#define CE_URE_PN2_SET(n) (((uint64_t)(n) << CE_URE_PN2_SHFT) & \
678 CE_URE_PN2_MASK)
679
680/* ce_ure_pcie_control2 register bit masks & shifts */
681#define CE_URE_ABP (0x1ULL << 0)
682#define CE_URE_PCP (0x1ULL << 1)
683#define CE_URE_MSP (0x1ULL << 2)
684#define CE_URE_AIP (0x1ULL << 3)
685#define CE_URE_PIP (0x1ULL << 4)
686#define CE_URE_HPS (0x1ULL << 5)
687#define CE_URE_HPC (0x1ULL << 6)
688#define CE_URE_SPLV_SHFT 7
689#define CE_URE_SPLV_MASK (0xFFULL << CE_URE_SPLV_SHFT)
690#define CE_URE_SPLS_SHFT 15
691#define CE_URE_SPLS_MASK (0x3ULL << CE_URE_SPLS_SHFT)
692#define CE_URE_PSN1_SHFT 19
693#define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT)
694#define CE_URE_PSN2_SHFT 32
695#define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT)
696#define CE_URE_PSN1_SET(n) (((uint64_t)(n) << CE_URE_PSN1_SHFT) & \
697 CE_URE_PSN1_MASK)
698#define CE_URE_PSN2_SET(n) (((uint64_t)(n) << CE_URE_PSN2_SHFT) & \
699 CE_URE_PSN2_MASK)
700
701/*
702 * PIO address space ranges for CE
703 */
704
705/* Local CE Registers Space */
706#define CE_PIO_MMR 0x00000000
707#define CE_PIO_MMR_LEN 0x04000000
708
709/* PCI Compatible Config Space */
710#define CE_PIO_CONFIG_SPACE 0x04000000
711#define CE_PIO_CONFIG_SPACE_LEN 0x04000000
712
713/* PCI I/O Space Alias */
714#define CE_PIO_IO_SPACE_ALIAS 0x08000000
715#define CE_PIO_IO_SPACE_ALIAS_LEN 0x08000000
716
717/* PCI Enhanced Config Space */
718#define CE_PIO_E_CONFIG_SPACE 0x10000000
719#define CE_PIO_E_CONFIG_SPACE_LEN 0x10000000
720
721/* PCI I/O Space */
722#define CE_PIO_IO_SPACE 0x100000000
723#define CE_PIO_IO_SPACE_LEN 0x100000000
724
725/* PCI MEM Space */
726#define CE_PIO_MEM_SPACE 0x200000000
727#define CE_PIO_MEM_SPACE_LEN TIO_HWIN_SIZE
728
729
730/*
731 * CE PCI Enhanced Config Space shifts & masks
732 */
733#define CE_E_CONFIG_BUS_SHFT 20
734#define CE_E_CONFIG_BUS_MASK (0xFF << CE_E_CONFIG_BUS_SHFT)
735#define CE_E_CONFIG_DEVICE_SHFT 15
736#define CE_E_CONFIG_DEVICE_MASK (0x1F << CE_E_CONFIG_DEVICE_SHFT)
737#define CE_E_CONFIG_FUNC_SHFT 12
738#define CE_E_CONFIG_FUNC_MASK (0x7 << CE_E_CONFIG_FUNC_SHFT)
739
740#endif /* __ASM_IA64_SN_TIOCE_H__ */
diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h
new file mode 100644
index 000000000000..7f63dec0a79a
--- /dev/null
+++ b/include/asm-ia64/sn/tioce_provider.h
@@ -0,0 +1,66 @@
1/**************************************************************************
2 * Copyright (C) 2005, Silicon Graphics, Inc. *
3 * *
4 * These coded instructions, statements, and computer programs contain *
5 * unpublished proprietary information of Silicon Graphics, Inc., and *
6 * are protected by Federal copyright law. They may not be disclosed *
7 * to third parties or copied or duplicated in any form, in whole or *
8 * in part, without the prior written consent of Silicon Graphics, Inc. *
9 * *
10 **************************************************************************/
11
12#ifndef _ASM_IA64_SN_CE_PROVIDER_H
13#define _ASM_IA64_SN_CE_PROVIDER_H
14
15#include <asm/sn/pcibus_provider_defs.h>
16#include <asm/sn/tioce.h>
17
18/*
19 * Common TIOCE structure shared between the prom and kernel
20 *
21 * DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES TO THE
22 * PROM VERSION.
23 */
24struct tioce_common {
25 struct pcibus_bussoft ce_pcibus; /* common pciio header */
26
27 uint32_t ce_rev;
28 uint64_t ce_kernel_private;
29 uint64_t ce_prom_private;
30};
31
32struct tioce_kernel {
33 struct tioce_common *ce_common;
34 spinlock_t ce_lock;
35 struct list_head ce_dmamap_list;
36
37 uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES];
38 uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES];
39 uint32_t ce_ate3240_pagesize;
40
41 uint8_t ce_port1_secondary;
42
43 /* per-port resources */
44 struct {
45 int dirmap_refcnt;
46 uint64_t dirmap_shadow;
47 } ce_port[TIOCE_NUM_PORTS];
48};
49
50struct tioce_dmamap {
51 struct list_head ce_dmamap_list; /* headed by tioce_kernel */
52 uint32_t refcnt;
53
54 uint64_t nbytes; /* # bytes mapped */
55
56 uint64_t ct_start; /* coretalk start address */
57 uint64_t pci_start; /* bus start address */
58
59 uint64_t *ate_hw; /* hw ptr of first ate in map */
60 uint64_t *ate_shadow; /* shadow ptr of firat ate */
61 uint16_t ate_count; /* # ate's in the map */
62};
63
64extern int tioce_init_provider(void);
65
66#endif /* __ASM_IA64_SN_CE_PROVIDER_H */
diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h
index 909936f25512..d2430aa0d49d 100644
--- a/include/asm-ia64/spinlock.h
+++ b/include/asm-ia64/spinlock.h
@@ -93,7 +93,15 @@ _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags)
93# endif /* CONFIG_MCKINLEY */ 93# endif /* CONFIG_MCKINLEY */
94#endif 94#endif
95} 95}
96
96#define _raw_spin_lock(lock) _raw_spin_lock_flags(lock, 0) 97#define _raw_spin_lock(lock) _raw_spin_lock_flags(lock, 0)
98
99/* Unlock by doing an ordered store and releasing the cacheline with nta */
100static inline void _raw_spin_unlock(spinlock_t *x) {
101 barrier();
102 asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(x));
103}
104
97#else /* !ASM_SUPPORTED */ 105#else /* !ASM_SUPPORTED */
98#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) 106#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
99# define _raw_spin_lock(x) \ 107# define _raw_spin_lock(x) \
@@ -109,16 +117,16 @@ do { \
109 } while (ia64_spinlock_val); \ 117 } while (ia64_spinlock_val); \
110 } \ 118 } \
111} while (0) 119} while (0)
120#define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0)
112#endif /* !ASM_SUPPORTED */ 121#endif /* !ASM_SUPPORTED */
113 122
114#define spin_is_locked(x) ((x)->lock != 0) 123#define spin_is_locked(x) ((x)->lock != 0)
115#define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0; } while (0)
116#define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) 124#define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0)
117#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) 125#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock)
118 126
119typedef struct { 127typedef struct {
120 volatile unsigned int read_counter : 31; 128 volatile unsigned int read_counter : 24;
121 volatile unsigned int write_lock : 1; 129 volatile unsigned int write_lock : 8;
122#ifdef CONFIG_PREEMPT 130#ifdef CONFIG_PREEMPT
123 unsigned int break_lock; 131 unsigned int break_lock;
124#endif 132#endif
@@ -174,6 +182,13 @@ do { \
174 (result == 0); \ 182 (result == 0); \
175}) 183})
176 184
185static inline void _raw_write_unlock(rwlock_t *x)
186{
187 u8 *y = (u8 *)x;
188 barrier();
189 asm volatile ("st1.rel.nta [%0] = r0\n\t" :: "r"(y+3) : "memory" );
190}
191
177#else /* !ASM_SUPPORTED */ 192#else /* !ASM_SUPPORTED */
178 193
179#define _raw_write_lock(l) \ 194#define _raw_write_lock(l) \
@@ -195,14 +210,14 @@ do { \
195 (ia64_val == 0); \ 210 (ia64_val == 0); \
196}) 211})
197 212
213static inline void _raw_write_unlock(rwlock_t *x)
214{
215 barrier();
216 x->write_lock = 0;
217}
218
198#endif /* !ASM_SUPPORTED */ 219#endif /* !ASM_SUPPORTED */
199 220
200#define _raw_read_trylock(lock) generic_raw_read_trylock(lock) 221#define _raw_read_trylock(lock) generic_raw_read_trylock(lock)
201 222
202#define _raw_write_unlock(x) \
203({ \
204 smp_mb__before_clear_bit(); /* need barrier before releasing lock... */ \
205 clear_bit(31, (x)); \
206})
207
208#endif /* _ASM_IA64_SPINLOCK_H */ 223#endif /* _ASM_IA64_SPINLOCK_H */
diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index cd2cf76b2db1..33256db4a7cf 100644
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -19,12 +19,13 @@
19#include <asm/pal.h> 19#include <asm/pal.h>
20#include <asm/percpu.h> 20#include <asm/percpu.h>
21 21
22#define GATE_ADDR __IA64_UL_CONST(0xa000000000000000) 22#define GATE_ADDR RGN_BASE(RGN_GATE)
23
23/* 24/*
24 * 0xa000000000000000+2*PERCPU_PAGE_SIZE 25 * 0xa000000000000000+2*PERCPU_PAGE_SIZE
25 * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page) 26 * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page)
26 */ 27 */
27#define KERNEL_START __IA64_UL_CONST(0xa000000100000000) 28#define KERNEL_START (GATE_ADDR+0x100000000)
28#define PERCPU_ADDR (-PERCPU_PAGE_SIZE) 29#define PERCPU_ADDR (-PERCPU_PAGE_SIZE)
29 30
30#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
diff --git a/include/asm-ia64/types.h b/include/asm-ia64/types.h
index a677565aa954..902850d12424 100644
--- a/include/asm-ia64/types.h
+++ b/include/asm-ia64/types.h
@@ -67,8 +67,6 @@ typedef __u64 u64;
67 67
68typedef u64 dma_addr_t; 68typedef u64 dma_addr_t;
69 69
70typedef unsigned short kmem_bufctl_t;
71
72# endif /* __KERNEL__ */ 70# endif /* __KERNEL__ */
73#endif /* !__ASSEMBLY__ */ 71#endif /* !__ASSEMBLY__ */
74 72
diff --git a/include/asm-m32r/page.h b/include/asm-m32r/page.h
index 1c6abb9f3f1f..4ab578876361 100644
--- a/include/asm-m32r/page.h
+++ b/include/asm-m32r/page.h
@@ -61,25 +61,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
61 61
62/* This handles the memory map.. */ 62/* This handles the memory map.. */
63 63
64#ifndef __ASSEMBLY__
65
66/* Pure 2^n version of get_order */
67static __inline__ int get_order(unsigned long size)
68{
69 int order;
70
71 size = (size - 1) >> (PAGE_SHIFT - 1);
72 order = -1;
73 do {
74 size >>= 1;
75 order++;
76 } while (size);
77
78 return order;
79}
80
81#endif /* __ASSEMBLY__ */
82
83#define __MEMORY_START CONFIG_MEMORY_START 64#define __MEMORY_START CONFIG_MEMORY_START
84#define __MEMORY_SIZE CONFIG_MEMORY_SIZE 65#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
85 66
@@ -111,5 +92,7 @@ static __inline__ int get_order(unsigned long size)
111 92
112#endif /* __KERNEL__ */ 93#endif /* __KERNEL__ */
113 94
95#include <asm-generic/page.h>
96
114#endif /* _ASM_M32R_PAGE_H */ 97#endif /* _ASM_M32R_PAGE_H */
115 98
diff --git a/include/asm-m32r/types.h b/include/asm-m32r/types.h
index ca0a887d2237..fcf24c64c3ba 100644
--- a/include/asm-m32r/types.h
+++ b/include/asm-m32r/types.h
@@ -55,8 +55,6 @@ typedef unsigned long long u64;
55typedef u32 dma_addr_t; 55typedef u32 dma_addr_t;
56typedef u64 dma64_addr_t; 56typedef u64 dma64_addr_t;
57 57
58typedef unsigned short kmem_bufctl_t;
59
60#endif /* __ASSEMBLY__ */ 58#endif /* __ASSEMBLY__ */
61 59
62#endif /* __KERNEL__ */ 60#endif /* __KERNEL__ */
diff --git a/include/asm-m68k/cacheflush.h b/include/asm-m68k/cacheflush.h
index e4773946f10d..8aba971b1368 100644
--- a/include/asm-m68k/cacheflush.h
+++ b/include/asm-m68k/cacheflush.h
@@ -130,20 +130,25 @@ static inline void __flush_page_to_ram(void *vaddr)
130#define flush_dcache_mmap_lock(mapping) do { } while (0) 130#define flush_dcache_mmap_lock(mapping) do { } while (0)
131#define flush_dcache_mmap_unlock(mapping) do { } while (0) 131#define flush_dcache_mmap_unlock(mapping) do { } while (0)
132#define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page)) 132#define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page))
133#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
134
135#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
136 do { \
137 flush_cache_page(vma, vaddr, page_to_pfn(page));\
138 memcpy(dst, src, len); \
139 } while (0)
140
141#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
142 do { \
143 flush_cache_page(vma, vaddr, page_to_pfn(page));\
144 memcpy(dst, src, len); \
145 } while (0)
146 133
134extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
135 unsigned long addr, int len);
147extern void flush_icache_range(unsigned long address, unsigned long endaddr); 136extern void flush_icache_range(unsigned long address, unsigned long endaddr);
148 137
138static inline void copy_to_user_page(struct vm_area_struct *vma,
139 struct page *page, unsigned long vaddr,
140 void *dst, void *src, int len)
141{
142 flush_cache_page(vma, vaddr, page_to_pfn(page));
143 memcpy(dst, src, len);
144 flush_icache_user_range(vma, page, vaddr, len);
145}
146static inline void copy_from_user_page(struct vm_area_struct *vma,
147 struct page *page, unsigned long vaddr,
148 void *dst, void *src, int len)
149{
150 flush_cache_page(vma, vaddr, page_to_pfn(page));
151 memcpy(dst, src, len);
152}
153
149#endif /* _M68K_CACHEFLUSH_H */ 154#endif /* _M68K_CACHEFLUSH_H */
diff --git a/include/asm-m68k/page.h b/include/asm-m68k/page.h
index 206313e2a817..f206dfbc1d48 100644
--- a/include/asm-m68k/page.h
+++ b/include/asm-m68k/page.h
@@ -107,20 +107,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
107/* to align the pointer to the (next) page boundary */ 107/* to align the pointer to the (next) page boundary */
108#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 108#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
109 109
110/* Pure 2^n version of get_order */
111static inline int get_order(unsigned long size)
112{
113 int order;
114
115 size = (size-1) >> (PAGE_SHIFT-1);
116 order = -1;
117 do {
118 size >>= 1;
119 order++;
120 } while (size);
121 return order;
122}
123
124#endif /* !__ASSEMBLY__ */ 110#endif /* !__ASSEMBLY__ */
125 111
126#include <asm/page_offset.h> 112#include <asm/page_offset.h>
@@ -192,4 +178,6 @@ static inline void *__va(unsigned long x)
192 178
193#endif /* __KERNEL__ */ 179#endif /* __KERNEL__ */
194 180
181#include <asm-generic/page.h>
182
195#endif /* _M68K_PAGE_H */ 183#endif /* _M68K_PAGE_H */
diff --git a/include/asm-m68k/string.h b/include/asm-m68k/string.h
index 44def078132a..6c59215b285e 100644
--- a/include/asm-m68k/string.h
+++ b/include/asm-m68k/string.h
@@ -80,43 +80,6 @@ static inline char * strchr(const char * s, int c)
80 return( (char *) s); 80 return( (char *) s);
81} 81}
82 82
83#if 0
84#define __HAVE_ARCH_STRPBRK
85static inline char *strpbrk(const char *cs,const char *ct)
86{
87 const char *sc1,*sc2;
88
89 for( sc1 = cs; *sc1 != '\0'; ++sc1)
90 for( sc2 = ct; *sc2 != '\0'; ++sc2)
91 if (*sc1 == *sc2)
92 return((char *) sc1);
93 return( NULL );
94}
95#endif
96
97#if 0
98#define __HAVE_ARCH_STRSPN
99static inline size_t strspn(const char *s, const char *accept)
100{
101 const char *p;
102 const char *a;
103 size_t count = 0;
104
105 for (p = s; *p != '\0'; ++p)
106 {
107 for (a = accept; *a != '\0'; ++a)
108 if (*p == *a)
109 break;
110 if (*a == '\0')
111 return count;
112 else
113 ++count;
114 }
115
116 return count;
117}
118#endif
119
120/* strstr !! */ 83/* strstr !! */
121 84
122#define __HAVE_ARCH_STRLEN 85#define __HAVE_ARCH_STRLEN
@@ -173,370 +136,18 @@ static inline int strncmp(const char * cs,const char * ct,size_t count)
173} 136}
174 137
175#define __HAVE_ARCH_MEMSET 138#define __HAVE_ARCH_MEMSET
176/* 139extern void *memset(void *, int, __kernel_size_t);
177 * This is really ugly, but its highly optimizatiable by the 140#define memset(d, c, n) __builtin_memset(d, c, n)
178 * compiler and is meant as compensation for gcc's missing
179 * __builtin_memset(). For the 680[23]0 it might be worth considering
180 * the optimal number of misaligned writes compared to the number of
181 * tests'n'branches needed to align the destination address. The
182 * 680[46]0 doesn't really care due to their copy-back caches.
183 * 10/09/96 - Jes Sorensen
184 */
185static inline void * __memset_g(void * s, int c, size_t count)
186{
187 void *xs = s;
188 size_t temp;
189
190 if (!count)
191 return xs;
192
193 c &= 0xff;
194 c |= c << 8;
195 c |= c << 16;
196
197 if (count < 36){
198 long *ls = s;
199
200 switch(count){
201 case 32: case 33: case 34: case 35:
202 *ls++ = c;
203 case 28: case 29: case 30: case 31:
204 *ls++ = c;
205 case 24: case 25: case 26: case 27:
206 *ls++ = c;
207 case 20: case 21: case 22: case 23:
208 *ls++ = c;
209 case 16: case 17: case 18: case 19:
210 *ls++ = c;
211 case 12: case 13: case 14: case 15:
212 *ls++ = c;
213 case 8: case 9: case 10: case 11:
214 *ls++ = c;
215 case 4: case 5: case 6: case 7:
216 *ls++ = c;
217 break;
218 default:
219 break;
220 }
221 s = ls;
222 if (count & 0x02){
223 short *ss = s;
224 *ss++ = c;
225 s = ss;
226 }
227 if (count & 0x01){
228 char *cs = s;
229 *cs++ = c;
230 s = cs;
231 }
232 return xs;
233 }
234
235 if ((long) s & 1)
236 {
237 char *cs = s;
238 *cs++ = c;
239 s = cs;
240 count--;
241 }
242 if (count > 2 && (long) s & 2)
243 {
244 short *ss = s;
245 *ss++ = c;
246 s = ss;
247 count -= 2;
248 }
249 temp = count >> 2;
250 if (temp)
251 {
252 long *ls = s;
253 temp--;
254 do
255 *ls++ = c;
256 while (temp--);
257 s = ls;
258 }
259 if (count & 2)
260 {
261 short *ss = s;
262 *ss++ = c;
263 s = ss;
264 }
265 if (count & 1)
266 {
267 char *cs = s;
268 *cs = c;
269 }
270 return xs;
271}
272
273/*
274 * __memset_page assumes that data is longword aligned. Most, if not
275 * all, of these page sized memsets are performed on page aligned
276 * areas, thus we do not need to check if the destination is longword
277 * aligned. Of course we suffer a serious performance loss if this is
278 * not the case but I think the risk of this ever happening is
279 * extremely small. We spend a lot of time clearing pages in
280 * get_empty_page() so I think it is worth it anyway. Besides, the
281 * 680[46]0 do not really care about misaligned writes due to their
282 * copy-back cache.
283 *
284 * The optimized case for the 680[46]0 is implemented using the move16
285 * instruction. My tests showed that this implementation is 35-45%
286 * faster than the original implementation using movel, the only
287 * caveat is that the destination address must be 16-byte aligned.
288 * 01/09/96 - Jes Sorensen
289 */
290static inline void * __memset_page(void * s,int c,size_t count)
291{
292 unsigned long data, tmp;
293 void *xs = s;
294
295 c = c & 255;
296 data = c | (c << 8);
297 data |= data << 16;
298
299#ifdef CPU_M68040_OR_M68060_ONLY
300
301 if (((unsigned long) s) & 0x0f)
302 __memset_g(s, c, count);
303 else{
304 unsigned long *sp = s;
305 *sp++ = data;
306 *sp++ = data;
307 *sp++ = data;
308 *sp++ = data;
309
310 __asm__ __volatile__("1:\t"
311 ".chip 68040\n\t"
312 "move16 %2@+,%0@+\n\t"
313 ".chip 68k\n\t"
314 "subqw #8,%2\n\t"
315 "subqw #8,%2\n\t"
316 "dbra %1,1b\n\t"
317 : "=a" (sp), "=d" (tmp)
318 : "a" (s), "0" (sp), "1" ((count - 16) / 16 - 1)
319 );
320 }
321
322#else
323 __asm__ __volatile__("1:\t"
324 "movel %2,%0@+\n\t"
325 "movel %2,%0@+\n\t"
326 "movel %2,%0@+\n\t"
327 "movel %2,%0@+\n\t"
328 "movel %2,%0@+\n\t"
329 "movel %2,%0@+\n\t"
330 "movel %2,%0@+\n\t"
331 "movel %2,%0@+\n\t"
332 "dbra %1,1b\n\t"
333 : "=a" (s), "=d" (tmp)
334 : "d" (data), "0" (s), "1" (count / 32 - 1)
335 );
336#endif
337
338 return xs;
339}
340
341extern void *memset(void *,int,__kernel_size_t);
342
343#define __memset_const(s,c,count) \
344((count==PAGE_SIZE) ? \
345 __memset_page((s),(c),(count)) : \
346 __memset_g((s),(c),(count)))
347
348#define memset(s, c, count) \
349(__builtin_constant_p(count) ? \
350 __memset_const((s),(c),(count)) : \
351 __memset_g((s),(c),(count)))
352 141
353#define __HAVE_ARCH_MEMCPY 142#define __HAVE_ARCH_MEMCPY
354extern void * memcpy(void *, const void *, size_t ); 143extern void *memcpy(void *, const void *, __kernel_size_t);
355/* 144#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
356 * __builtin_memcpy() does not handle page-sized memcpys very well,
357 * thus following the same assumptions as for page-sized memsets, this
358 * function copies page-sized areas using an unrolled loop, without
359 * considering alignment.
360 *
361 * For the 680[46]0 only kernels we use the move16 instruction instead
362 * as it writes through the data-cache, invalidating the cache-lines
363 * touched. In this way we do not use up the entire data-cache (well,
364 * half of it on the 68060) by copying a page. An unrolled loop of two
365 * move16 instructions seem to the fastest. The only caveat is that
366 * both source and destination must be 16-byte aligned, if not we fall
367 * back to the generic memcpy function. - Jes
368 */
369static inline void * __memcpy_page(void * to, const void * from, size_t count)
370{
371 unsigned long tmp;
372 void *xto = to;
373
374#ifdef CPU_M68040_OR_M68060_ONLY
375
376 if (((unsigned long) to | (unsigned long) from) & 0x0f)
377 return memcpy(to, from, count);
378
379 __asm__ __volatile__("1:\t"
380 ".chip 68040\n\t"
381 "move16 %1@+,%0@+\n\t"
382 "move16 %1@+,%0@+\n\t"
383 ".chip 68k\n\t"
384 "dbra %2,1b\n\t"
385 : "=a" (to), "=a" (from), "=d" (tmp)
386 : "0" (to), "1" (from) , "2" (count / 32 - 1)
387 );
388#else
389 __asm__ __volatile__("1:\t"
390 "movel %1@+,%0@+\n\t"
391 "movel %1@+,%0@+\n\t"
392 "movel %1@+,%0@+\n\t"
393 "movel %1@+,%0@+\n\t"
394 "movel %1@+,%0@+\n\t"
395 "movel %1@+,%0@+\n\t"
396 "movel %1@+,%0@+\n\t"
397 "movel %1@+,%0@+\n\t"
398 "dbra %2,1b\n\t"
399 : "=a" (to), "=a" (from), "=d" (tmp)
400 : "0" (to), "1" (from) , "2" (count / 32 - 1)
401 );
402#endif
403 return xto;
404}
405
406#define __memcpy_const(to, from, n) \
407((n==PAGE_SIZE) ? \
408 __memcpy_page((to),(from),(n)) : \
409 __builtin_memcpy((to),(from),(n)))
410
411#define memcpy(to, from, n) \
412(__builtin_constant_p(n) ? \
413 __memcpy_const((to),(from),(n)) : \
414 memcpy((to),(from),(n)))
415 145
416#define __HAVE_ARCH_MEMMOVE 146#define __HAVE_ARCH_MEMMOVE
417static inline void * memmove(void * dest,const void * src, size_t n) 147extern void *memmove(void *, const void *, __kernel_size_t);
418{
419 void *xdest = dest;
420 size_t temp;
421
422 if (!n)
423 return xdest;
424
425 if (dest < src)
426 {
427 if ((long) dest & 1)
428 {
429 char *cdest = dest;
430 const char *csrc = src;
431 *cdest++ = *csrc++;
432 dest = cdest;
433 src = csrc;
434 n--;
435 }
436 if (n > 2 && (long) dest & 2)
437 {
438 short *sdest = dest;
439 const short *ssrc = src;
440 *sdest++ = *ssrc++;
441 dest = sdest;
442 src = ssrc;
443 n -= 2;
444 }
445 temp = n >> 2;
446 if (temp)
447 {
448 long *ldest = dest;
449 const long *lsrc = src;
450 temp--;
451 do
452 *ldest++ = *lsrc++;
453 while (temp--);
454 dest = ldest;
455 src = lsrc;
456 }
457 if (n & 2)
458 {
459 short *sdest = dest;
460 const short *ssrc = src;
461 *sdest++ = *ssrc++;
462 dest = sdest;
463 src = ssrc;
464 }
465 if (n & 1)
466 {
467 char *cdest = dest;
468 const char *csrc = src;
469 *cdest = *csrc;
470 }
471 }
472 else
473 {
474 dest = (char *) dest + n;
475 src = (const char *) src + n;
476 if ((long) dest & 1)
477 {
478 char *cdest = dest;
479 const char *csrc = src;
480 *--cdest = *--csrc;
481 dest = cdest;
482 src = csrc;
483 n--;
484 }
485 if (n > 2 && (long) dest & 2)
486 {
487 short *sdest = dest;
488 const short *ssrc = src;
489 *--sdest = *--ssrc;
490 dest = sdest;
491 src = ssrc;
492 n -= 2;
493 }
494 temp = n >> 2;
495 if (temp)
496 {
497 long *ldest = dest;
498 const long *lsrc = src;
499 temp--;
500 do
501 *--ldest = *--lsrc;
502 while (temp--);
503 dest = ldest;
504 src = lsrc;
505 }
506 if (n & 2)
507 {
508 short *sdest = dest;
509 const short *ssrc = src;
510 *--sdest = *--ssrc;
511 dest = sdest;
512 src = ssrc;
513 }
514 if (n & 1)
515 {
516 char *cdest = dest;
517 const char *csrc = src;
518 *--cdest = *--csrc;
519 }
520 }
521 return xdest;
522}
523 148
524#define __HAVE_ARCH_MEMCMP 149#define __HAVE_ARCH_MEMCMP
525extern int memcmp(const void * ,const void * ,size_t ); 150extern int memcmp(const void *, const void *, __kernel_size_t);
526#define memcmp(cs, ct, n) \ 151#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
527(__builtin_constant_p(n) ? \
528 __builtin_memcmp((cs),(ct),(n)) : \
529 memcmp((cs),(ct),(n)))
530
531#define __HAVE_ARCH_MEMCHR
532static inline void *memchr(const void *cs, int c, size_t count)
533{
534 /* Someone else can optimize this, I don't care - tonym@mac.linux-m68k.org */
535 unsigned char *ret = (unsigned char *)cs;
536 for(;count>0;count--,ret++)
537 if(*ret == c) return ret;
538
539 return NULL;
540}
541 152
542#endif /* _M68K_STRING_H_ */ 153#endif /* _M68K_STRING_H_ */
diff --git a/include/asm-m68k/types.h b/include/asm-m68k/types.h
index f391cbe39b96..b5a1febc97d4 100644
--- a/include/asm-m68k/types.h
+++ b/include/asm-m68k/types.h
@@ -60,8 +60,6 @@ typedef unsigned long long u64;
60typedef u32 dma_addr_t; 60typedef u32 dma_addr_t;
61typedef u32 dma64_addr_t; 61typedef u32 dma64_addr_t;
62 62
63typedef unsigned short kmem_bufctl_t;
64
65#endif /* __ASSEMBLY__ */ 63#endif /* __ASSEMBLY__ */
66 64
67#endif /* __KERNEL__ */ 65#endif /* __KERNEL__ */
diff --git a/include/asm-m68knommu/page.h b/include/asm-m68knommu/page.h
index 05e03df0ec29..942dfbead27f 100644
--- a/include/asm-m68knommu/page.h
+++ b/include/asm-m68knommu/page.h
@@ -48,20 +48,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
48/* to align the pointer to the (next) page boundary */ 48/* to align the pointer to the (next) page boundary */
49#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 49#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
50 50
51/* Pure 2^n version of get_order */
52extern __inline__ int get_order(unsigned long size)
53{
54 int order;
55
56 size = (size-1) >> (PAGE_SHIFT-1);
57 order = -1;
58 do {
59 size >>= 1;
60 order++;
61 } while (size);
62 return order;
63}
64
65extern unsigned long memory_start; 51extern unsigned long memory_start;
66extern unsigned long memory_end; 52extern unsigned long memory_end;
67 53
@@ -73,8 +59,8 @@ extern unsigned long memory_end;
73 59
74#ifndef __ASSEMBLY__ 60#ifndef __ASSEMBLY__
75 61
76#define __pa(vaddr) virt_to_phys((void *)vaddr) 62#define __pa(vaddr) virt_to_phys((void *)(vaddr))
77#define __va(paddr) phys_to_virt((unsigned long)paddr) 63#define __va(paddr) phys_to_virt((unsigned long)(paddr))
78 64
79#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) 65#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
80#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT) 66#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
@@ -84,6 +70,7 @@ extern unsigned long memory_end;
84 70
85#define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn)) 71#define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn))
86#define page_to_pfn(page) virt_to_pfn(page_to_virt(page)) 72#define page_to_pfn(page) virt_to_pfn(page_to_virt(page))
73#define pfn_valid(pfn) ((pfn) < max_mapnr)
87 74
88#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \ 75#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
89 ((void *)(kaddr) < (void *)memory_end)) 76 ((void *)(kaddr) < (void *)memory_end))
@@ -92,4 +79,6 @@ extern unsigned long memory_end;
92 79
93#endif /* __KERNEL__ */ 80#endif /* __KERNEL__ */
94 81
82#include <asm-generic/page.h>
83
95#endif /* _M68KNOMMU_PAGE_H */ 84#endif /* _M68KNOMMU_PAGE_H */
diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
index e42b3093e903..2b3dc3bed4da 100644
--- a/include/asm-mips/a.out.h
+++ b/include/asm-mips/a.out.h
@@ -35,10 +35,10 @@ struct exec
35 35
36#ifdef __KERNEL__ 36#ifdef __KERNEL__
37 37
38#ifdef CONFIG_MIPS32 38#ifdef CONFIG_32BIT
39#define STACK_TOP TASK_SIZE 39#define STACK_TOP TASK_SIZE
40#endif 40#endif
41#ifdef CONFIG_MIPS64 41#ifdef CONFIG_64BIT
42#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE) 42#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE)
43#endif 43#endif
44 44
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 2caa8c427204..7dc2619f5006 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -48,7 +48,7 @@
48#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) 48#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
49#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff) 49#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
50 50
51#ifdef CONFIG_MIPS64 51#ifdef CONFIG_64BIT
52 52
53/* 53/*
54 * Memory segments (64bit kernel mode addresses) 54 * Memory segments (64bit kernel mode addresses)
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index 37a460aa0378..30b18ea6cb11 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -7,14 +7,14 @@
7 */ 7 */
8#ifndef _ASM_ASMMACRO_H 8#ifndef _ASM_ASMMACRO_H
9#define _ASM_ASMMACRO_H 9#define _ASM_ASMMACRO_H
10 10
11#include <linux/config.h> 11#include <linux/config.h>
12#include <asm/hazards.h> 12#include <asm/hazards.h>
13 13
14#ifdef CONFIG_MIPS32 14#ifdef CONFIG_32BIT
15#include <asm/asmmacro-32.h> 15#include <asm/asmmacro-32.h>
16#endif 16#endif
17#ifdef CONFIG_MIPS64 17#ifdef CONFIG_64BIT
18#include <asm/asmmacro-64.h> 18#include <asm/asmmacro-64.h>
19#endif 19#endif
20 20
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 7d89e87bc8c6..c0bd8d014e14 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -334,7 +334,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
334 */ 334 */
335#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0) 335#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
336 336
337#ifdef CONFIG_MIPS64 337#ifdef CONFIG_64BIT
338 338
339typedef struct { volatile __s64 counter; } atomic64_t; 339typedef struct { volatile __s64 counter; } atomic64_t;
340 340
@@ -639,7 +639,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
639 */ 639 */
640#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0) 640#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0)
641 641
642#endif /* CONFIG_MIPS64 */ 642#endif /* CONFIG_64BIT */
643 643
644/* 644/*
645 * atomic*_return operations are serializing but not the non-*_return 645 * atomic*_return operations are serializing but not the non-*_return
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 779d2187a6a4..eb8d79dba11c 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -20,13 +20,13 @@
20#define SZLONG_MASK 31UL 20#define SZLONG_MASK 31UL
21#define __LL "ll " 21#define __LL "ll "
22#define __SC "sc " 22#define __SC "sc "
23#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) 23#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
24#elif (_MIPS_SZLONG == 64) 24#elif (_MIPS_SZLONG == 64)
25#define SZLONG_LOG 6 25#define SZLONG_LOG 6
26#define SZLONG_MASK 63UL 26#define SZLONG_MASK 63UL
27#define __LL "lld " 27#define __LL "lld "
28#define __SC "scd " 28#define __SC "scd "
29#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) 29#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
30#endif 30#endif
31 31
32#ifdef __KERNEL__ 32#ifdef __KERNEL__
@@ -533,14 +533,14 @@ static inline unsigned long ffz(unsigned long word)
533 int b = 0, s; 533 int b = 0, s;
534 534
535 word = ~word; 535 word = ~word;
536#ifdef CONFIG_MIPS32 536#ifdef CONFIG_32BIT
537 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s; 537 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
538 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s; 538 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
539 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; 539 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
540 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; 540 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
541 s = 1; if (word << 31 != 0) s = 0; b += s; 541 s = 1; if (word << 31 != 0) s = 0; b += s;
542#endif 542#endif
543#ifdef CONFIG_MIPS64 543#ifdef CONFIG_64BIT
544 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; 544 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
545 s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s; 545 s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
546 s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s; 546 s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
@@ -683,7 +683,7 @@ found_middle:
683 */ 683 */
684static inline int sched_find_first_bit(const unsigned long *b) 684static inline int sched_find_first_bit(const unsigned long *b)
685{ 685{
686#ifdef CONFIG_MIPS32 686#ifdef CONFIG_32BIT
687 if (unlikely(b[0])) 687 if (unlikely(b[0]))
688 return __ffs(b[0]); 688 return __ffs(b[0]);
689 if (unlikely(b[1])) 689 if (unlikely(b[1]))
@@ -694,7 +694,7 @@ static inline int sched_find_first_bit(const unsigned long *b)
694 return __ffs(b[3]) + 96; 694 return __ffs(b[3]) + 96;
695 return __ffs(b[4]) + 128; 695 return __ffs(b[4]) + 128;
696#endif 696#endif
697#ifdef CONFIG_MIPS64 697#ifdef CONFIG_64BIT
698 if (unlikely(b[0])) 698 if (unlikely(b[0]))
699 return __ffs(b[0]); 699 return __ffs(b[0]);
700 if (unlikely(b[1])) 700 if (unlikely(b[1]))
diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
index 18cced19cca4..b14b961c2100 100644
--- a/include/asm-mips/bugs.h
+++ b/include/asm-mips/bugs.h
@@ -15,7 +15,7 @@ extern void check_bugs64(void);
15static inline void check_bugs(void) 15static inline void check_bugs(void)
16{ 16{
17 check_bugs32(); 17 check_bugs32();
18#ifdef CONFIG_MIPS64 18#ifdef CONFIG_64BIT
19 check_bugs64(); 19 check_bugs64();
20#endif 20#endif
21} 21}
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index c25cc92b9950..c1ea5a8714f3 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -128,7 +128,7 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr,
128{ 128{
129 __asm__( 129 __asm__(
130 ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t" 130 ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t"
131#ifdef CONFIG_MIPS32 131#ifdef CONFIG_32BIT
132 "addu\t%0, %2\n\t" 132 "addu\t%0, %2\n\t"
133 "sltu\t$1, %0, %2\n\t" 133 "sltu\t$1, %0, %2\n\t"
134 "addu\t%0, $1\n\t" 134 "addu\t%0, $1\n\t"
@@ -141,7 +141,7 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr,
141 "sltu\t$1, %0, %4\n\t" 141 "sltu\t$1, %0, %4\n\t"
142 "addu\t%0, $1\n\t" 142 "addu\t%0, $1\n\t"
143#endif 143#endif
144#ifdef CONFIG_MIPS64 144#ifdef CONFIG_64BIT
145 "daddu\t%0, %2\n\t" 145 "daddu\t%0, %2\n\t"
146 "daddu\t%0, %3\n\t" 146 "daddu\t%0, %3\n\t"
147 "daddu\t%0, %4\n\t" 147 "daddu\t%0, %4\n\t"
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 1df2c299de82..9a2de642eee6 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -106,7 +106,7 @@
106#define PLAT_TRAMPOLINE_STUFF_LINE 0UL 106#define PLAT_TRAMPOLINE_STUFF_LINE 0UL
107#endif 107#endif
108 108
109#ifdef CONFIG_MIPS32 109#ifdef CONFIG_32BIT
110# ifndef cpu_has_nofpuex 110# ifndef cpu_has_nofpuex
111# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX) 111# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
112# endif 112# endif
@@ -124,7 +124,7 @@
124# endif 124# endif
125#endif 125#endif
126 126
127#ifdef CONFIG_MIPS64 127#ifdef CONFIG_64BIT
128# ifndef cpu_has_nofpuex 128# ifndef cpu_has_nofpuex
129# define cpu_has_nofpuex 0 129# define cpu_has_nofpuex 0
130# endif 130# endif
diff --git a/include/asm-mips/ddb5xxx/ddb5477.h b/include/asm-mips/ddb5xxx/ddb5477.h
index ae3e2a38fd5f..a438548e6ef3 100644
--- a/include/asm-mips/ddb5xxx/ddb5477.h
+++ b/include/asm-mips/ddb5xxx/ddb5477.h
@@ -247,7 +247,7 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
247 * All PCI irq but INTC are active low. 247 * All PCI irq but INTC are active low.
248 */ 248 */
249 249
250/* 250/*
251 * irq number block assignment 251 * irq number block assignment
252 */ 252 */
253 253
@@ -285,7 +285,7 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
285#define VRC5477_IRQ_IOPCI_INTB (17 + VRC5477_IRQ_BASE) /* USB-P */ 285#define VRC5477_IRQ_IOPCI_INTB (17 + VRC5477_IRQ_BASE) /* USB-P */
286#define VRC5477_IRQ_IOPCI_INTC (18 + VRC5477_IRQ_BASE) /* AC97 */ 286#define VRC5477_IRQ_IOPCI_INTC (18 + VRC5477_IRQ_BASE) /* AC97 */
287#define VRC5477_IRQ_IOPCI_INTD (19 + VRC5477_IRQ_BASE) /* Reserved */ 287#define VRC5477_IRQ_IOPCI_INTD (19 + VRC5477_IRQ_BASE) /* Reserved */
288#define VRC5477_IRQ_UART1 (20 + VRC5477_IRQ_BASE) 288#define VRC5477_IRQ_UART1 (20 + VRC5477_IRQ_BASE)
289#define VRC5477_IRQ_SPT0 (21 + VRC5477_IRQ_BASE) /* special purpose timer 0 */ 289#define VRC5477_IRQ_SPT0 (21 + VRC5477_IRQ_BASE) /* special purpose timer 0 */
290#define VRC5477_IRQ_GPT0 (22 + VRC5477_IRQ_BASE) /* general purpose timer 0 */ 290#define VRC5477_IRQ_GPT0 (22 + VRC5477_IRQ_BASE) /* general purpose timer 0 */
291#define VRC5477_IRQ_GPT1 (23 + VRC5477_IRQ_BASE) /* general purpose timer 1 */ 291#define VRC5477_IRQ_GPT1 (23 + VRC5477_IRQ_BASE) /* general purpose timer 1 */
@@ -301,7 +301,7 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
301/* 301/*
302 * i2859 irq assignment 302 * i2859 irq assignment
303 */ 303 */
304#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) 304#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE)
305#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */ 305#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */
306#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE) 306#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE)
307#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ 307#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */
diff --git a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h
index b63e2f2317d1..a05d6d3395fe 100644
--- a/include/asm-mips/dec/prom.h
+++ b/include/asm-mips/dec/prom.h
@@ -48,15 +48,15 @@
48 */ 48 */
49#define REX_PROM_MAGIC 0x30464354 49#define REX_PROM_MAGIC 0x30464354
50 50
51#ifdef CONFIG_MIPS64 51#ifdef CONFIG_64BIT
52 52
53#define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */ 53#define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */
54 54
55#else /* !CONFIG_MIPS64 */ 55#else /* !CONFIG_64BIT */
56 56
57#define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC) 57#define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC)
58 58
59#endif /* !CONFIG_MIPS64 */ 59#endif /* !CONFIG_64BIT */
60 60
61 61
62/* 62/*
@@ -105,7 +105,7 @@ extern int (*__pmax_read)(int, void *, int);
105extern int (*__pmax_close)(int); 105extern int (*__pmax_close)(int);
106 106
107 107
108#ifdef CONFIG_MIPS64 108#ifdef CONFIG_64BIT
109 109
110/* 110/*
111 * On MIPS64 we have to call PROM functions via a helper 111 * On MIPS64 we have to call PROM functions via a helper
@@ -138,7 +138,7 @@ int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32;
138#define prom_getenv(x) _prom_getenv(__prom_getenv, x) 138#define prom_getenv(x) _prom_getenv(__prom_getenv, x)
139#define prom_printf(x...) _prom_printf(__prom_printf, x) 139#define prom_printf(x...) _prom_printf(__prom_printf, x)
140 140
141#else /* !CONFIG_MIPS64 */ 141#else /* !CONFIG_64BIT */
142 142
143/* 143/*
144 * On plain MIPS we just call PROM functions directly. 144 * On plain MIPS we just call PROM functions directly.
@@ -160,7 +160,7 @@ int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32;
160#define pmax_read __pmax_read 160#define pmax_read __pmax_read
161#define pmax_close __pmax_close 161#define pmax_close __pmax_close
162 162
163#endif /* !CONFIG_MIPS64 */ 163#endif /* !CONFIG_64BIT */
164 164
165 165
166extern void prom_meminit(u32); 166extern void prom_meminit(u32);
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index d0f68447e5a7..a606dbee0412 100644
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -57,11 +57,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
57 * The common rates of 1000 and 128 are rounded wrongly by the 57 * The common rates of 1000 and 128 are rounded wrongly by the
58 * catchall case for 64-bit. Excessive precission? Probably ... 58 * catchall case for 64-bit. Excessive precission? Probably ...
59 */ 59 */
60#if defined(CONFIG_MIPS64) && (HZ == 128) 60#if defined(CONFIG_64BIT) && (HZ == 128)
61 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ 61 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
62#elif defined(CONFIG_MIPS64) && (HZ == 1000) 62#elif defined(CONFIG_64BIT) && (HZ == 1000)
63 usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */ 63 usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */
64#elif defined(CONFIG_MIPS64) 64#elif defined(CONFIG_64BIT)
65 usecs *= (0x8000000000000000UL / (500000 / HZ)); 65 usecs *= (0x8000000000000000UL / (500000 / HZ));
66#else /* 32-bit junk follows here */ 66#else /* 32-bit junk follows here */
67 usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) + 67 usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index 7b92c8045cc2..e48811440015 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -125,7 +125,7 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];
125typedef double elf_fpreg_t; 125typedef double elf_fpreg_t;
126typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 126typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
127 127
128#ifdef CONFIG_MIPS32 128#ifdef CONFIG_32BIT
129 129
130/* 130/*
131 * This is used to ensure we don't load something for the wrong architecture. 131 * This is used to ensure we don't load something for the wrong architecture.
@@ -153,9 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
153 */ 153 */
154#define ELF_CLASS ELFCLASS32 154#define ELF_CLASS ELFCLASS32
155 155
156#endif /* CONFIG_MIPS32 */ 156#endif /* CONFIG_32BIT */
157 157
158#ifdef CONFIG_MIPS64 158#ifdef CONFIG_64BIT
159/* 159/*
160 * This is used to ensure we don't load something for the wrong architecture. 160 * This is used to ensure we don't load something for the wrong architecture.
161 */ 161 */
@@ -177,7 +177,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
177 */ 177 */
178#define ELF_CLASS ELFCLASS64 178#define ELF_CLASS ELFCLASS64
179 179
180#endif /* CONFIG_MIPS64 */ 180#endif /* CONFIG_64BIT */
181 181
182/* 182/*
183 * These are used to set parameters in the core dumps. 183 * These are used to set parameters in the core dumps.
@@ -193,7 +193,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
193 193
194#ifdef __KERNEL__ 194#ifdef __KERNEL__
195 195
196#ifdef CONFIG_MIPS32 196#ifdef CONFIG_32BIT
197 197
198#define SET_PERSONALITY(ex, ibcs2) \ 198#define SET_PERSONALITY(ex, ibcs2) \
199do { \ 199do { \
@@ -202,9 +202,9 @@ do { \
202 set_personality(PER_LINUX); \ 202 set_personality(PER_LINUX); \
203} while (0) 203} while (0)
204 204
205#endif /* CONFIG_MIPS32 */ 205#endif /* CONFIG_32BIT */
206 206
207#ifdef CONFIG_MIPS64 207#ifdef CONFIG_64BIT
208 208
209#define SET_PERSONALITY(ex, ibcs2) \ 209#define SET_PERSONALITY(ex, ibcs2) \
210do { current->thread.mflags &= ~MF_ABI_MASK; \ 210do { current->thread.mflags &= ~MF_ABI_MASK; \
@@ -222,7 +222,7 @@ do { current->thread.mflags &= ~MF_ABI_MASK; \
222 set_personality(PER_LINUX); \ 222 set_personality(PER_LINUX); \
223} while (0) 223} while (0)
224 224
225#endif /* CONFIG_MIPS64 */ 225#endif /* CONFIG_64BIT */
226 226
227extern void dump_regs(elf_greg_t *, struct pt_regs *regs); 227extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
228extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 228extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
diff --git a/include/asm-mips/fpregdef.h b/include/asm-mips/fpregdef.h
index 1d9aa0979181..2b5fddc8f487 100644
--- a/include/asm-mips/fpregdef.h
+++ b/include/asm-mips/fpregdef.h
@@ -13,7 +13,7 @@
13#define _ASM_FPREGDEF_H 13#define _ASM_FPREGDEF_H
14 14
15#include <asm/sgidefs.h> 15#include <asm/sgidefs.h>
16 16
17#if _MIPS_SIM == _MIPS_SIM_ABI32 17#if _MIPS_SIM == _MIPS_SIM_ABI32
18 18
19/* 19/*
@@ -56,7 +56,7 @@
56#define fcr31 $31 /* FPU status register */ 56#define fcr31 $31 /* FPU status register */
57 57
58#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 58#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
59 59
60#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 60#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
61 61
62#define fv0 $f0 /* return value */ 62#define fv0 $f0 /* return value */
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index 6cb38d5c0407..ea24e733b1bc 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -82,7 +82,7 @@ do { \
82 82
83static inline int is_fpu_owner(void) 83static inline int is_fpu_owner(void)
84{ 84{
85 return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); 85 return cpu_has_fpu && test_thread_flag(TIF_USEDFPU);
86} 86}
87 87
88static inline void own_fpu(void) 88static inline void own_fpu(void)
@@ -90,7 +90,7 @@ static inline void own_fpu(void)
90 if (cpu_has_fpu) { 90 if (cpu_has_fpu) {
91 __enable_fpu(); 91 __enable_fpu();
92 KSTK_STATUS(current) |= ST0_CU1; 92 KSTK_STATUS(current) |= ST0_CU1;
93 set_thread_flag(TIF_USEDFPU); 93 set_thread_flag(TIF_USEDFPU);
94 } 94 }
95} 95}
96 96
@@ -98,7 +98,7 @@ static inline void lose_fpu(void)
98{ 98{
99 if (cpu_has_fpu) { 99 if (cpu_has_fpu) {
100 KSTK_STATUS(current) &= ~ST0_CU1; 100 KSTK_STATUS(current) &= ~ST0_CU1;
101 clear_thread_flag(TIF_USEDFPU); 101 clear_thread_flag(TIF_USEDFPU);
102 __disable_fpu(); 102 __disable_fpu();
103 } 103 }
104} 104}
@@ -127,7 +127,7 @@ static inline void restore_fp(struct task_struct *tsk)
127static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) 127static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
128{ 128{
129 if (cpu_has_fpu) { 129 if (cpu_has_fpu) {
130 if ((tsk == current) && is_fpu_owner()) 130 if ((tsk == current) && is_fpu_owner())
131 _save_fp(current); 131 _save_fp(current);
132 return tsk->thread.fpu.hard.fpr; 132 return tsk->thread.fpu.hard.fpr;
133 } 133 }
diff --git a/include/asm-mips/hp-lj/asic.h b/include/asm-mips/hp-lj/asic.h
deleted file mode 100644
index fc2ca656da00..000000000000
--- a/include/asm-mips/hp-lj/asic.h
+++ /dev/null
@@ -1,7 +0,0 @@
1
2typedef enum { IllegalAsic, UnknownAsic, AndrosAsic, HarmonyAsic } AsicId;
3
4AsicId GetAsicId(void);
5
6const char* const GetAsicName(void);
7
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 2b7b0fdeac19..432011b16c26 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -94,7 +94,7 @@ struct mace_video {
94 unsigned long xxx; /* later... */ 94 unsigned long xxx; /* later... */
95}; 95};
96 96
97/* 97/*
98 * Ethernet interface 98 * Ethernet interface
99 */ 99 */
100struct mace_ethernet { 100struct mace_ethernet {
@@ -129,7 +129,7 @@ struct mace_ethernet {
129 volatile unsigned long rx_fifo; 129 volatile unsigned long rx_fifo;
130}; 130};
131 131
132/* 132/*
133 * Peripherals 133 * Peripherals
134 */ 134 */
135 135
@@ -251,7 +251,7 @@ struct mace_timers {
251 timer_reg audio_out2; 251 timer_reg audio_out2;
252 timer_reg video_in1; 252 timer_reg video_in1;
253 timer_reg video_in2; 253 timer_reg video_in2;
254 timer_reg video_out; 254 timer_reg video_out;
255}; 255};
256 256
257struct mace_perif { 257struct mace_perif {
@@ -272,7 +272,7 @@ struct mace_perif {
272}; 272};
273 273
274 274
275/* 275/*
276 * ISA peripherals 276 * ISA peripherals
277 */ 277 */
278 278
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
index 21d0fb7cee64..9e88c7669c7a 100644
--- a/include/asm-mips/lasat/serial.h
+++ b/include/asm-mips/lasat/serial.h
@@ -1,13 +1,13 @@
1#include <asm/lasat/lasat.h> 1#include <asm/lasat/lasat.h>
2 2
3/* Lasat 100 boards serial configuration */ 3/* Lasat 100 boards serial configuration */
4#define LASAT_BASE_BAUD_100 ( 7372800 / 16 ) 4#define LASAT_BASE_BAUD_100 ( 7372800 / 16 )
5#define LASAT_UART_REGS_BASE_100 0x1c8b0000 5#define LASAT_UART_REGS_BASE_100 0x1c8b0000
6#define LASAT_UART_REGS_SHIFT_100 2 6#define LASAT_UART_REGS_SHIFT_100 2
7#define LASATINT_UART_100 8 7#define LASATINT_UART_100 8
8 8
9/* * LASAT 200 boards serial configuration */ 9/* * LASAT 200 boards serial configuration */
10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12) 10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300) 11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
12#define LASAT_UART_REGS_SHIFT_200 3 12#define LASAT_UART_REGS_SHIFT_200 3
13#define LASATINT_UART_200 13 13#define LASATINT_UART_200 13
diff --git a/include/asm-mips/local.h b/include/asm-mips/local.h
index 7eb6bf661b80..c38844f615fc 100644
--- a/include/asm-mips/local.h
+++ b/include/asm-mips/local.h
@@ -5,7 +5,7 @@
5#include <linux/percpu.h> 5#include <linux/percpu.h>
6#include <asm/atomic.h> 6#include <asm/atomic.h>
7 7
8#ifdef CONFIG_MIPS32 8#ifdef CONFIG_32BIT
9 9
10typedef atomic_t local_t; 10typedef atomic_t local_t;
11 11
@@ -20,7 +20,7 @@ typedef atomic_t local_t;
20 20
21#endif 21#endif
22 22
23#ifdef CONFIG_MIPS64 23#ifdef CONFIG_64BIT
24 24
25typedef atomic64_t local_t; 25typedef atomic64_t local_t;
26 26
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 2b36ea346910..148bae2fa7d3 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -1383,7 +1383,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1383#define PCI_IO_START 0 1383#define PCI_IO_START 0
1384#define PCI_IO_END 0 1384#define PCI_IO_END 0
1385#define PCI_MEM_START 0 1385#define PCI_MEM_START 0
1386#define PCI_MEM_END 0 1386#define PCI_MEM_END 0
1387#define PCI_FIRST_DEVFN 0 1387#define PCI_FIRST_DEVFN 0
1388#define PCI_LAST_DEVFN 0 1388#define PCI_LAST_DEVFN 0
1389#endif 1389#endif
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 4691398a414f..efafe65258b6 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -23,7 +23,7 @@
23 * 23 *
24 * ######################################################################## 24 * ########################################################################
25 * 25 *
26 * 26 *
27 */ 27 */
28#ifndef __ASM_DB1X00_H 28#ifndef __ASM_DB1X00_H
29#define __ASM_DB1X00_H 29#define __ASM_DB1X00_H
diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h
index 63c0a81c7832..5a2c1efb4eb7 100644
--- a/include/asm-mips/mach-generic/spaces.h
+++ b/include/asm-mips/mach-generic/spaces.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14 14
15#ifdef CONFIG_MIPS32 15#ifdef CONFIG_32BIT
16 16
17#define CAC_BASE 0x80000000 17#define CAC_BASE 0x80000000
18#define IO_BASE 0xa0000000 18#define IO_BASE 0xa0000000
@@ -32,9 +32,9 @@
32#define HIGHMEM_START 0x20000000UL 32#define HIGHMEM_START 0x20000000UL
33#endif 33#endif
34 34
35#endif /* CONFIG_MIPS32 */ 35#endif /* CONFIG_32BIT */
36 36
37#ifdef CONFIG_MIPS64 37#ifdef CONFIG_64BIT
38 38
39/* 39/*
40 * This handles the memory map. 40 * This handles the memory map.
@@ -67,6 +67,6 @@
67#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 67#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
68#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) 68#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
69 69
70#endif /* CONFIG_MIPS64 */ 70#endif /* CONFIG_64BIT */
71 71
72#endif /* __ASM_MACH_GENERIC_SPACES_H */ 72#endif /* __ASM_MACH_GENERIC_SPACES_H */
diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
index 30d42fcafe3d..e96166f27c49 100644
--- a/include/asm-mips/mach-ip22/spaces.h
+++ b/include/asm-mips/mach-ip22/spaces.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14 14
15#ifdef CONFIG_MIPS32 15#ifdef CONFIG_32BIT
16 16
17#define CAC_BASE 0x80000000 17#define CAC_BASE 0x80000000
18#define IO_BASE 0xa0000000 18#define IO_BASE 0xa0000000
@@ -32,9 +32,9 @@
32#define HIGHMEM_START 0x20000000UL 32#define HIGHMEM_START 0x20000000UL
33#endif 33#endif
34 34
35#endif /* CONFIG_MIPS32 */ 35#endif /* CONFIG_32BIT */
36 36
37#ifdef CONFIG_MIPS64 37#ifdef CONFIG_64BIT
38#define PAGE_OFFSET 0xffffffff80000000UL 38#define PAGE_OFFSET 0xffffffff80000000UL
39 39
40#ifndef HIGHMEM_START 40#ifndef HIGHMEM_START
@@ -50,6 +50,6 @@
50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
51#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) 51#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
52 52
53#endif /* CONFIG_MIPS64 */ 53#endif /* CONFIG_64BIT */
54 54
55#endif /* __ASM_MACH_IP22_SPACES_H */ 55#endif /* __ASM_MACH_IP22_SPACES_H */
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
index b932237f2193..04713973c6c3 100644
--- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
@@ -18,7 +18,7 @@
18 * so, for 64bit IP32 kernel we just don't use ll/sc. 18 * so, for 64bit IP32 kernel we just don't use ll/sc.
19 * This does not affect luserland. 19 * This does not affect luserland.
20 */ 20 */
21#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64) 21#if defined(CONFIG_CPU_R5000) && defined(CONFIG_64BIT)
22#define cpu_has_llsc 0 22#define cpu_has_llsc 0
23#else 23#else
24#define cpu_has_llsc 1 24#define cpu_has_llsc 1
diff --git a/include/asm-mips/mach-jazz/floppy.h b/include/asm-mips/mach-jazz/floppy.h
index 8cf0d042c864..c9dad99b1232 100644
--- a/include/asm-mips/mach-jazz/floppy.h
+++ b/include/asm-mips/mach-jazz/floppy.h
@@ -92,7 +92,7 @@ static inline int fd_request_irq(void)
92 return request_irq(FLOPPY_IRQ, floppy_interrupt, 92 return request_irq(FLOPPY_IRQ, floppy_interrupt,
93 SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL); 93 SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL);
94} 94}
95 95
96static inline void fd_free_irq(void) 96static inline void fd_free_irq(void)
97{ 97{
98 free_irq(FLOPPY_IRQ, NULL); 98 free_irq(FLOPPY_IRQ, NULL);
diff --git a/include/asm-mips/mach-pb1x00/pb1500.h b/include/asm-mips/mach-pb1x00/pb1500.h
index d6c779747b3c..ff6d40c87a25 100644
--- a/include/asm-mips/mach-pb1x00/pb1500.h
+++ b/include/asm-mips/mach-pb1x00/pb1500.h
@@ -33,11 +33,11 @@
33#define PCI_BOARD_REG 0xAE000010 33#define PCI_BOARD_REG 0xAE000010
34#define PCMCIA_BOARD_REG 0xAE000010 34#define PCMCIA_BOARD_REG 0xAE000010
35 #define PC_DEASSERT_RST 0x80 35 #define PC_DEASSERT_RST 0x80
36 #define PC_DRV_EN 0x10 36 #define PC_DRV_EN 0x10
37#define PB1500_G_CONTROL 0xAE000014 37#define PB1500_G_CONTROL 0xAE000014
38#define PB1500_RST_VDDI 0xAE00001C 38#define PB1500_RST_VDDI 0xAE00001C
39#define PB1500_LEDS 0xAE000018 39#define PB1500_LEDS 0xAE000018
40 40
41#define PB1500_HEX_LED 0xAF000004 41#define PB1500_HEX_LED 0xAF000004
42#define PB1500_HEX_LED_BLANK 0xAF000008 42#define PB1500_HEX_LED_BLANK 0xAF000008
43 43
diff --git a/include/asm-mips/mach-qemu/cpu-feature-overrides.h b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
new file mode 100644
index 000000000000..f4e370e27168
--- /dev/null
+++ b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
@@ -0,0 +1,31 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H
10
11/*
12 * QEMU only comes with a hazard-free MIPS32 processor, so things are easy.
13 */
14#define cpu_has_mips16 0
15#define cpu_has_divec 0
16#define cpu_has_cache_cdex_p 0
17#define cpu_has_prefetch 0
18#define cpu_has_mcheck 0
19#define cpu_has_ejtag 0
20
21#define cpu_has_llsc 1
22#define cpu_has_vtag_icache 0
23#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
24#define cpu_has_ic_fills_f_dc 0
25
26#define cpu_has_dsp 0
27
28#define cpu_has_nofpuex 0
29#define cpu_has_64bits 0
30
31#endif /* __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-qemu/param.h b/include/asm-mips/mach-qemu/param.h
new file mode 100644
index 000000000000..cb30ee490ae6
--- /dev/null
+++ b/include/asm-mips/mach-qemu/param.h
@@ -0,0 +1,13 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 by Ralf Baechle
7 */
8#ifndef __ASM_MACH_QEMU_PARAM_H
9#define __ASM_MACH_QEMU_PARAM_H
10
11#define HZ 100 /* Internal kernel timer frequency */
12
13#endif /* __ASM_MACH_QEMU_PARAM_H */
diff --git a/include/asm-mips/mach-vr41xx/timex.h b/include/asm-mips/mach-vr41xx/timex.h
deleted file mode 100644
index 8d71485d003a..000000000000
--- a/include/asm-mips/mach-vr41xx/timex.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 by Ralf Baechle
7 */
8/*
9 * Changes:
10 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
11 * - CLOCK_TICK_RATE is changed into 32768 from 6144000.
12 */
13#ifndef __ASM_MACH_VR41XX_TIMEX_H
14#define __ASM_MACH_VR41XX_TIMEX_H
15
16#define CLOCK_TICK_RATE 32768
17
18#endif /* __ASM_MACH_VR41XX_TIMEX_H */
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 48b77c9fb4f2..45cd72d172e8 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -28,17 +28,17 @@ extern unsigned long pgd_current[];
28#define TLBMISS_HANDLER_SETUP_PGD(pgd) \ 28#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
29 pgd_current[smp_processor_id()] = (unsigned long)(pgd) 29 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
30 30
31#ifdef CONFIG_MIPS32 31#ifdef CONFIG_32BIT
32#define TLBMISS_HANDLER_SETUP() \ 32#define TLBMISS_HANDLER_SETUP() \
33 write_c0_context((unsigned long) smp_processor_id() << 23); \ 33 write_c0_context((unsigned long) smp_processor_id() << 23); \
34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
35#endif 35#endif
36#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 36#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
37#define TLBMISS_HANDLER_SETUP() \ 37#define TLBMISS_HANDLER_SETUP() \
38 write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \ 38 write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \
39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
40#endif 40#endif
41#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) 41#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
42#define TLBMISS_HANDLER_SETUP() \ 42#define TLBMISS_HANDLER_SETUP() \
43 write_c0_context((unsigned long) smp_processor_id() << 23); \ 43 write_c0_context((unsigned long) smp_processor_id() << 23); \
44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h
index 90ee24aad955..0be58b2aeb9f 100644
--- a/include/asm-mips/module.h
+++ b/include/asm-mips/module.h
@@ -25,7 +25,7 @@ typedef struct
25 Elf64_Sxword r_addend; /* Addend. */ 25 Elf64_Sxword r_addend; /* Addend. */
26} Elf64_Mips_Rela; 26} Elf64_Mips_Rela;
27 27
28#ifdef CONFIG_MIPS32 28#ifdef CONFIG_32BIT
29 29
30#define Elf_Shdr Elf32_Shdr 30#define Elf_Shdr Elf32_Shdr
31#define Elf_Sym Elf32_Sym 31#define Elf_Sym Elf32_Sym
@@ -33,7 +33,7 @@ typedef struct
33 33
34#endif 34#endif
35 35
36#ifdef CONFIG_MIPS64 36#ifdef CONFIG_64BIT
37 37
38#define Elf_Shdr Elf64_Shdr 38#define Elf_Shdr Elf64_Shdr
39#define Elf_Sym Elf64_Sym 39#define Elf_Sym Elf64_Sym
diff --git a/include/asm-mips/msgbuf.h b/include/asm-mips/msgbuf.h
index 513b2824838b..a1533959742e 100644
--- a/include/asm-mips/msgbuf.h
+++ b/include/asm-mips/msgbuf.h
@@ -15,25 +15,25 @@
15 15
16struct msqid64_ds { 16struct msqid64_ds {
17 struct ipc64_perm msg_perm; 17 struct ipc64_perm msg_perm;
18#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) 18#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
19 unsigned long __unused1; 19 unsigned long __unused1;
20#endif 20#endif
21 __kernel_time_t msg_stime; /* last msgsnd time */ 21 __kernel_time_t msg_stime; /* last msgsnd time */
22#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) 22#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
23 unsigned long __unused1; 23 unsigned long __unused1;
24#endif 24#endif
25#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) 25#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
26 unsigned long __unused2; 26 unsigned long __unused2;
27#endif 27#endif
28 __kernel_time_t msg_rtime; /* last msgrcv time */ 28 __kernel_time_t msg_rtime; /* last msgrcv time */
29#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) 29#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
30 unsigned long __unused2; 30 unsigned long __unused2;
31#endif 31#endif
32#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) 32#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
33 unsigned long __unused3; 33 unsigned long __unused3;
34#endif 34#endif
35 __kernel_time_t msg_ctime; /* last change time */ 35 __kernel_time_t msg_ctime; /* last change time */
36#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) 36#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
37 unsigned long __unused3; 37 unsigned long __unused3;
38#endif 38#endif
39 unsigned long msg_cbytes; /* current number of bytes on queue */ 39 unsigned long msg_cbytes; /* current number of bytes on queue */
diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h
index 36cec9e31696..309bc3099f68 100644
--- a/include/asm-mips/paccess.h
+++ b/include/asm-mips/paccess.h
@@ -16,10 +16,10 @@
16#include <linux/config.h> 16#include <linux/config.h>
17#include <linux/errno.h> 17#include <linux/errno.h>
18 18
19#ifdef CONFIG_MIPS32 19#ifdef CONFIG_32BIT
20#define __PA_ADDR ".word" 20#define __PA_ADDR ".word"
21#endif 21#endif
22#ifdef CONFIG_MIPS64 22#ifdef CONFIG_64BIT
23#define __PA_ADDR ".dword" 23#define __PA_ADDR ".dword"
24#endif 24#endif
25 25
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 5cae35cd9ba9..652b6d67a571 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -103,20 +103,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
103#define __pgd(x) ((pgd_t) { (x) } ) 103#define __pgd(x) ((pgd_t) { (x) } )
104#define __pgprot(x) ((pgprot_t) { (x) } ) 104#define __pgprot(x) ((pgprot_t) { (x) } )
105 105
106/* Pure 2^n version of get_order */
107static __inline__ int get_order(unsigned long size)
108{
109 int order;
110
111 size = (size-1) >> (PAGE_SHIFT-1);
112 order = -1;
113 do {
114 size >>= 1;
115 order++;
116 } while (size);
117 return order;
118}
119
120#endif /* !__ASSEMBLY__ */ 106#endif /* !__ASSEMBLY__ */
121 107
122/* to align the pointer to the (next) page boundary */ 108/* to align the pointer to the (next) page boundary */
@@ -148,4 +134,6 @@ static __inline__ int get_order(unsigned long size)
148#define WANT_PAGE_VIRTUAL 134#define WANT_PAGE_VIRTUAL
149#endif 135#endif
150 136
137#include <asm-generic/page.h>
138
151#endif /* _ASM_PAGE_H */ 139#endif /* _ASM_PAGE_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index d70dc355c1f3..c9a00ca1c012 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -94,7 +94,7 @@ struct pci_dev;
94 */ 94 */
95extern unsigned int PCI_DMA_BUS_IS_PHYS; 95extern unsigned int PCI_DMA_BUS_IS_PHYS;
96 96
97#ifdef CONFIG_MAPPED_DMA_IO 97#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
98 98
99/* pci_unmap_{single,page} is not a nop, thus... */ 99/* pci_unmap_{single,page} is not a nop, thus... */
100#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; 100#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
@@ -104,7 +104,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
104#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 104#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
105#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 105#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
106 106
107#else /* CONFIG_MAPPED_DMA_IO */ 107#else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
108 108
109/* pci_unmap_{page,single} is a nop so... */ 109/* pci_unmap_{page,single} is a nop so... */
110#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 110#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
@@ -114,7 +114,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
114#define pci_unmap_len(PTR, LEN_NAME) (0) 114#define pci_unmap_len(PTR, LEN_NAME) (0)
115#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 115#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
116 116
117#endif /* CONFIG_MAPPED_DMA_IO */ 117#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
118 118
119/* This is always fine. */ 119/* This is always fine. */
120#define pci_dac_dma_supported(pci_dev, mask) (1) 120#define pci_dac_dma_supported(pci_dev, mask) (1)
@@ -142,6 +142,8 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
142 142
143extern void pcibios_resource_to_bus(struct pci_dev *dev, 143extern void pcibios_resource_to_bus(struct pci_dev *dev,
144 struct pci_bus_region *region, struct resource *res); 144 struct pci_bus_region *region, struct resource *res);
145extern void pcibios_bus_to_resource(struct pci_dev *dev,
146 struct resource *res, struct pci_bus_region *region);
145 147
146#ifdef CONFIG_PCI_DOMAINS 148#ifdef CONFIG_PCI_DOMAINS
147 149
@@ -167,4 +169,17 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev)
167/* Do platform specific device initialization at pci_enable_device() time */ 169/* Do platform specific device initialization at pci_enable_device() time */
168extern int pcibios_plat_dev_init(struct pci_dev *dev); 170extern int pcibios_plat_dev_init(struct pci_dev *dev);
169 171
172static inline struct resource *
173pcibios_select_root(struct pci_dev *pdev, struct resource *res)
174{
175 struct resource *root = NULL;
176
177 if (res->flags & IORESOURCE_IO)
178 root = &ioport_resource;
179 if (res->flags & IORESOURCE_MEM)
180 root = &iomem_resource;
181
182 return root;
183}
184
170#endif /* _ASM_PCI_H */ 185#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index 2d63f5ba403f..ce57288d43bd 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -85,7 +85,7 @@ static inline void pte_free(struct page *pte)
85 85
86#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 86#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
87 87
88#ifdef CONFIG_MIPS32 88#ifdef CONFIG_32BIT
89#define pgd_populate(mm, pmd, pte) BUG() 89#define pgd_populate(mm, pmd, pte) BUG()
90 90
91/* 91/*
@@ -97,7 +97,7 @@ static inline void pte_free(struct page *pte)
97#define __pmd_free_tlb(tlb,x) do { } while (0) 97#define __pmd_free_tlb(tlb,x) do { } while (0)
98#endif 98#endif
99 99
100#ifdef CONFIG_MIPS64 100#ifdef CONFIG_64BIT
101 101
102#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd)) 102#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
103 103
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index e76ccd6e3a5d..dbe13da0bdad 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -11,10 +11,10 @@
11#include <asm-generic/4level-fixup.h> 11#include <asm-generic/4level-fixup.h>
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#ifdef CONFIG_MIPS32 14#ifdef CONFIG_32BIT
15#include <asm/pgtable-32.h> 15#include <asm/pgtable-32.h>
16#endif 16#endif
17#ifdef CONFIG_MIPS64 17#ifdef CONFIG_64BIT
18#include <asm/pgtable-64.h> 18#include <asm/pgtable-64.h>
19#endif 19#endif
20 20
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 13c54d5b3b48..d6466aa09fb7 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -33,7 +33,7 @@ extern void (*cpu_wait)(void);
33 33
34extern unsigned int vced_count, vcei_count; 34extern unsigned int vced_count, vcei_count;
35 35
36#ifdef CONFIG_MIPS32 36#ifdef CONFIG_32BIT
37/* 37/*
38 * User space process size: 2GB. This is hardcoded into a few places, 38 * User space process size: 2GB. This is hardcoded into a few places,
39 * so don't change it unless you know what you are doing. 39 * so don't change it unless you know what you are doing.
@@ -47,7 +47,7 @@ extern unsigned int vced_count, vcei_count;
47#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) 47#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
48#endif 48#endif
49 49
50#ifdef CONFIG_MIPS64 50#ifdef CONFIG_64BIT
51/* 51/*
52 * User space process size: 1TB. This is hardcoded into a few places, 52 * User space process size: 1TB. This is hardcoded into a few places,
53 * so don't change it unless you know what you are doing. TASK_SIZE 53 * so don't change it unless you know what you are doing. TASK_SIZE
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index d3c46d633826..2b5c624c3d4f 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -28,7 +28,7 @@
28 * system call/exception. As usual the registers k0/k1 aren't being saved. 28 * system call/exception. As usual the registers k0/k1 aren't being saved.
29 */ 29 */
30struct pt_regs { 30struct pt_regs {
31#ifdef CONFIG_MIPS32 31#ifdef CONFIG_32BIT
32 /* Pad bytes for argument save space on the stack. */ 32 /* Pad bytes for argument save space on the stack. */
33 unsigned long pad0[6]; 33 unsigned long pad0[6];
34#endif 34#endif
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h
new file mode 100644
index 000000000000..905c39585903
--- /dev/null
+++ b/include/asm-mips/qemu.h
@@ -0,0 +1,24 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 by Ralf Baechle (ralf@linux-mips.org)
7 */
8#ifndef __ASM_QEMU_H
9#define __ASM_QEMU_H
10
11/*
12 * Interrupt numbers
13 */
14#define Q_PIC_IRQ_BASE 0
15#define Q_COUNT_COMPARE_IRQ 16
16
17/*
18 * Qemu clock rate. Unlike on real MIPS this has no relation to the
19 * instruction issue rate, so the choosen value is pure fiction, just needs
20 * to match the value in Qemu itself.
21 */
22#define QEMU_C0_COUNTER_CLOCK 100000000
23
24#endif /* __ASM_QEMU_H */
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index da03a32c1ca7..5bea49feec66 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -171,11 +171,11 @@ static inline void blast_dcache16(void)
171 unsigned long start = INDEX_BASE; 171 unsigned long start = INDEX_BASE;
172 unsigned long end = start + current_cpu_data.dcache.waysize; 172 unsigned long end = start + current_cpu_data.dcache.waysize;
173 unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; 173 unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
174 unsigned long ws_end = current_cpu_data.dcache.ways << 174 unsigned long ws_end = current_cpu_data.dcache.ways <<
175 current_cpu_data.dcache.waybit; 175 current_cpu_data.dcache.waybit;
176 unsigned long ws, addr; 176 unsigned long ws, addr;
177 177
178 for (ws = 0; ws < ws_end; ws += ws_inc) 178 for (ws = 0; ws < ws_end; ws += ws_inc)
179 for (addr = start; addr < end; addr += 0x200) 179 for (addr = start; addr < end; addr += 0x200)
180 cache16_unroll32(addr|ws,Index_Writeback_Inv_D); 180 cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
181} 181}
@@ -200,8 +200,8 @@ static inline void blast_dcache16_page_indexed(unsigned long page)
200 current_cpu_data.dcache.waybit; 200 current_cpu_data.dcache.waybit;
201 unsigned long ws, addr; 201 unsigned long ws, addr;
202 202
203 for (ws = 0; ws < ws_end; ws += ws_inc) 203 for (ws = 0; ws < ws_end; ws += ws_inc)
204 for (addr = start; addr < end; addr += 0x200) 204 for (addr = start; addr < end; addr += 0x200)
205 cache16_unroll32(addr|ws,Index_Writeback_Inv_D); 205 cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
206} 206}
207 207
@@ -214,8 +214,8 @@ static inline void blast_icache16(void)
214 current_cpu_data.icache.waybit; 214 current_cpu_data.icache.waybit;
215 unsigned long ws, addr; 215 unsigned long ws, addr;
216 216
217 for (ws = 0; ws < ws_end; ws += ws_inc) 217 for (ws = 0; ws < ws_end; ws += ws_inc)
218 for (addr = start; addr < end; addr += 0x200) 218 for (addr = start; addr < end; addr += 0x200)
219 cache16_unroll32(addr|ws,Index_Invalidate_I); 219 cache16_unroll32(addr|ws,Index_Invalidate_I);
220} 220}
221 221
@@ -239,8 +239,8 @@ static inline void blast_icache16_page_indexed(unsigned long page)
239 current_cpu_data.icache.waybit; 239 current_cpu_data.icache.waybit;
240 unsigned long ws, addr; 240 unsigned long ws, addr;
241 241
242 for (ws = 0; ws < ws_end; ws += ws_inc) 242 for (ws = 0; ws < ws_end; ws += ws_inc)
243 for (addr = start; addr < end; addr += 0x200) 243 for (addr = start; addr < end; addr += 0x200)
244 cache16_unroll32(addr|ws,Index_Invalidate_I); 244 cache16_unroll32(addr|ws,Index_Invalidate_I);
245} 245}
246 246
@@ -249,11 +249,11 @@ static inline void blast_scache16(void)
249 unsigned long start = INDEX_BASE; 249 unsigned long start = INDEX_BASE;
250 unsigned long end = start + current_cpu_data.scache.waysize; 250 unsigned long end = start + current_cpu_data.scache.waysize;
251 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 251 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
252 unsigned long ws_end = current_cpu_data.scache.ways << 252 unsigned long ws_end = current_cpu_data.scache.ways <<
253 current_cpu_data.scache.waybit; 253 current_cpu_data.scache.waybit;
254 unsigned long ws, addr; 254 unsigned long ws, addr;
255 255
256 for (ws = 0; ws < ws_end; ws += ws_inc) 256 for (ws = 0; ws < ws_end; ws += ws_inc)
257 for (addr = start; addr < end; addr += 0x200) 257 for (addr = start; addr < end; addr += 0x200)
258 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); 258 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
259} 259}
@@ -278,8 +278,8 @@ static inline void blast_scache16_page_indexed(unsigned long page)
278 current_cpu_data.scache.waybit; 278 current_cpu_data.scache.waybit;
279 unsigned long ws, addr; 279 unsigned long ws, addr;
280 280
281 for (ws = 0; ws < ws_end; ws += ws_inc) 281 for (ws = 0; ws < ws_end; ws += ws_inc)
282 for (addr = start; addr < end; addr += 0x200) 282 for (addr = start; addr < end; addr += 0x200)
283 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); 283 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
284} 284}
285 285
@@ -318,8 +318,8 @@ static inline void blast_dcache32(void)
318 current_cpu_data.dcache.waybit; 318 current_cpu_data.dcache.waybit;
319 unsigned long ws, addr; 319 unsigned long ws, addr;
320 320
321 for (ws = 0; ws < ws_end; ws += ws_inc) 321 for (ws = 0; ws < ws_end; ws += ws_inc)
322 for (addr = start; addr < end; addr += 0x400) 322 for (addr = start; addr < end; addr += 0x400)
323 cache32_unroll32(addr|ws,Index_Writeback_Inv_D); 323 cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
324} 324}
325 325
@@ -343,8 +343,8 @@ static inline void blast_dcache32_page_indexed(unsigned long page)
343 current_cpu_data.dcache.waybit; 343 current_cpu_data.dcache.waybit;
344 unsigned long ws, addr; 344 unsigned long ws, addr;
345 345
346 for (ws = 0; ws < ws_end; ws += ws_inc) 346 for (ws = 0; ws < ws_end; ws += ws_inc)
347 for (addr = start; addr < end; addr += 0x400) 347 for (addr = start; addr < end; addr += 0x400)
348 cache32_unroll32(addr|ws,Index_Writeback_Inv_D); 348 cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
349} 349}
350 350
@@ -357,8 +357,8 @@ static inline void blast_icache32(void)
357 current_cpu_data.icache.waybit; 357 current_cpu_data.icache.waybit;
358 unsigned long ws, addr; 358 unsigned long ws, addr;
359 359
360 for (ws = 0; ws < ws_end; ws += ws_inc) 360 for (ws = 0; ws < ws_end; ws += ws_inc)
361 for (addr = start; addr < end; addr += 0x400) 361 for (addr = start; addr < end; addr += 0x400)
362 cache32_unroll32(addr|ws,Index_Invalidate_I); 362 cache32_unroll32(addr|ws,Index_Invalidate_I);
363} 363}
364 364
@@ -383,7 +383,7 @@ static inline void blast_icache32_page_indexed(unsigned long page)
383 unsigned long ws, addr; 383 unsigned long ws, addr;
384 384
385 for (ws = 0; ws < ws_end; ws += ws_inc) 385 for (ws = 0; ws < ws_end; ws += ws_inc)
386 for (addr = start; addr < end; addr += 0x400) 386 for (addr = start; addr < end; addr += 0x400)
387 cache32_unroll32(addr|ws,Index_Invalidate_I); 387 cache32_unroll32(addr|ws,Index_Invalidate_I);
388} 388}
389 389
@@ -392,11 +392,11 @@ static inline void blast_scache32(void)
392 unsigned long start = INDEX_BASE; 392 unsigned long start = INDEX_BASE;
393 unsigned long end = start + current_cpu_data.scache.waysize; 393 unsigned long end = start + current_cpu_data.scache.waysize;
394 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 394 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
395 unsigned long ws_end = current_cpu_data.scache.ways << 395 unsigned long ws_end = current_cpu_data.scache.ways <<
396 current_cpu_data.scache.waybit; 396 current_cpu_data.scache.waybit;
397 unsigned long ws, addr; 397 unsigned long ws, addr;
398 398
399 for (ws = 0; ws < ws_end; ws += ws_inc) 399 for (ws = 0; ws < ws_end; ws += ws_inc)
400 for (addr = start; addr < end; addr += 0x400) 400 for (addr = start; addr < end; addr += 0x400)
401 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); 401 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
402} 402}
@@ -421,8 +421,8 @@ static inline void blast_scache32_page_indexed(unsigned long page)
421 current_cpu_data.scache.waybit; 421 current_cpu_data.scache.waybit;
422 unsigned long ws, addr; 422 unsigned long ws, addr;
423 423
424 for (ws = 0; ws < ws_end; ws += ws_inc) 424 for (ws = 0; ws < ws_end; ws += ws_inc)
425 for (addr = start; addr < end; addr += 0x400) 425 for (addr = start; addr < end; addr += 0x400)
426 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); 426 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
427} 427}
428 428
@@ -461,8 +461,8 @@ static inline void blast_icache64(void)
461 current_cpu_data.icache.waybit; 461 current_cpu_data.icache.waybit;
462 unsigned long ws, addr; 462 unsigned long ws, addr;
463 463
464 for (ws = 0; ws < ws_end; ws += ws_inc) 464 for (ws = 0; ws < ws_end; ws += ws_inc)
465 for (addr = start; addr < end; addr += 0x800) 465 for (addr = start; addr < end; addr += 0x800)
466 cache64_unroll32(addr|ws,Index_Invalidate_I); 466 cache64_unroll32(addr|ws,Index_Invalidate_I);
467} 467}
468 468
@@ -487,7 +487,7 @@ static inline void blast_icache64_page_indexed(unsigned long page)
487 unsigned long ws, addr; 487 unsigned long ws, addr;
488 488
489 for (ws = 0; ws < ws_end; ws += ws_inc) 489 for (ws = 0; ws < ws_end; ws += ws_inc)
490 for (addr = start; addr < end; addr += 0x800) 490 for (addr = start; addr < end; addr += 0x800)
491 cache64_unroll32(addr|ws,Index_Invalidate_I); 491 cache64_unroll32(addr|ws,Index_Invalidate_I);
492} 492}
493 493
@@ -496,11 +496,11 @@ static inline void blast_scache64(void)
496 unsigned long start = INDEX_BASE; 496 unsigned long start = INDEX_BASE;
497 unsigned long end = start + current_cpu_data.scache.waysize; 497 unsigned long end = start + current_cpu_data.scache.waysize;
498 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 498 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
499 unsigned long ws_end = current_cpu_data.scache.ways << 499 unsigned long ws_end = current_cpu_data.scache.ways <<
500 current_cpu_data.scache.waybit; 500 current_cpu_data.scache.waybit;
501 unsigned long ws, addr; 501 unsigned long ws, addr;
502 502
503 for (ws = 0; ws < ws_end; ws += ws_inc) 503 for (ws = 0; ws < ws_end; ws += ws_inc)
504 for (addr = start; addr < end; addr += 0x800) 504 for (addr = start; addr < end; addr += 0x800)
505 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); 505 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
506} 506}
@@ -525,8 +525,8 @@ static inline void blast_scache64_page_indexed(unsigned long page)
525 current_cpu_data.scache.waybit; 525 current_cpu_data.scache.waybit;
526 unsigned long ws, addr; 526 unsigned long ws, addr;
527 527
528 for (ws = 0; ws < ws_end; ws += ws_inc) 528 for (ws = 0; ws < ws_end; ws += ws_inc)
529 for (addr = start; addr < end; addr += 0x800) 529 for (addr = start; addr < end; addr += 0x800)
530 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); 530 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
531} 531}
532 532
@@ -561,11 +561,11 @@ static inline void blast_scache128(void)
561 unsigned long start = INDEX_BASE; 561 unsigned long start = INDEX_BASE;
562 unsigned long end = start + current_cpu_data.scache.waysize; 562 unsigned long end = start + current_cpu_data.scache.waysize;
563 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 563 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
564 unsigned long ws_end = current_cpu_data.scache.ways << 564 unsigned long ws_end = current_cpu_data.scache.ways <<
565 current_cpu_data.scache.waybit; 565 current_cpu_data.scache.waybit;
566 unsigned long ws, addr; 566 unsigned long ws, addr;
567 567
568 for (ws = 0; ws < ws_end; ws += ws_inc) 568 for (ws = 0; ws < ws_end; ws += ws_inc)
569 for (addr = start; addr < end; addr += 0x1000) 569 for (addr = start; addr < end; addr += 0x1000)
570 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); 570 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
571} 571}
@@ -590,8 +590,8 @@ static inline void blast_scache128_page_indexed(unsigned long page)
590 current_cpu_data.scache.waybit; 590 current_cpu_data.scache.waybit;
591 unsigned long ws, addr; 591 unsigned long ws, addr;
592 592
593 for (ws = 0; ws < ws_end; ws += ws_inc) 593 for (ws = 0; ws < ws_end; ws += ws_inc)
594 for (addr = start; addr < end; addr += 0x1000) 594 for (addr = start; addr < end; addr += 0x1000)
595 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); 595 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
596} 596}
597 597
diff --git a/include/asm-mips/reg.h b/include/asm-mips/reg.h
index 7b33bbca9585..6173004cc88e 100644
--- a/include/asm-mips/reg.h
+++ b/include/asm-mips/reg.h
@@ -14,7 +14,7 @@
14 14
15#include <linux/config.h> 15#include <linux/config.h>
16 16
17#if defined(CONFIG_MIPS32) || defined(WANT_COMPAT_REG_H) 17#if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H)
18 18
19#define EF_R0 6 19#define EF_R0 6
20#define EF_R1 7 20#define EF_R1 7
@@ -70,7 +70,7 @@
70 70
71#endif 71#endif
72 72
73#if CONFIG_MIPS64 73#ifdef CONFIG_64BIT
74 74
75#define EF_R0 0 75#define EF_R0 0
76#define EF_R1 1 76#define EF_R1 1
@@ -124,6 +124,6 @@
124 124
125#define EF_SIZE 304 /* size in bytes */ 125#define EF_SIZE 304 /* size in bytes */
126 126
127#endif /* CONFIG_MIPS64 */ 127#endif /* CONFIG_64BIT */
128 128
129#endif /* __ASM_MIPS_REG_H */ 129#endif /* __ASM_MIPS_REG_H */
diff --git a/include/asm-mips/resource.h b/include/asm-mips/resource.h
index fd3c6d17a5f6..1fba00c22077 100644
--- a/include/asm-mips/resource.h
+++ b/include/asm-mips/resource.h
@@ -27,7 +27,7 @@
27 * but we keep the old value on MIPS32, 27 * but we keep the old value on MIPS32,
28 * for compatibility: 28 * for compatibility:
29 */ 29 */
30#ifdef CONFIG_MIPS32 30#ifdef CONFIG_32BIT
31# define RLIM_INFINITY 0x7fffffffUL 31# define RLIM_INFINITY 0x7fffffffUL
32#endif 32#endif
33 33
diff --git a/include/asm-mips/rtc.h b/include/asm-mips/rtc.h
index 31c0c2347f4f..3c4b637fd925 100644
--- a/include/asm-mips/rtc.h
+++ b/include/asm-mips/rtc.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-mips/rtc.h 2 * include/asm-mips/rtc.h
3 * 3 *
4 * (Really an interface for drivers/char/genrtc.c) 4 * (Really an interface for drivers/char/genrtc.c)
5 * 5 *
diff --git a/include/asm-mips/sgi/gio.h b/include/asm-mips/sgi/gio.h
index a38d66f99872..889cf028c95d 100644
--- a/include/asm-mips/sgi/gio.h
+++ b/include/asm-mips/sgi/gio.h
@@ -16,7 +16,7 @@
16 * 16 *
17 * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have 17 * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have
18 * three physical connectors, but only two slots, GFX and EXP0. 18 * three physical connectors, but only two slots, GFX and EXP0.
19 * 19 *
20 * There is 10MB of GIO address space for GIO64 slot devices 20 * There is 10MB of GIO address space for GIO64 slot devices
21 * slot# slot type address range size 21 * slot# slot type address range size
22 * ----- --------- ----------------------- ----- 22 * ----- --------- ----------------------- -----
diff --git a/include/asm-mips/sgi/hpc3.h b/include/asm-mips/sgi/hpc3.h
index a5b988d7327a..ac3dfc7af5b0 100644
--- a/include/asm-mips/sgi/hpc3.h
+++ b/include/asm-mips/sgi/hpc3.h
@@ -221,7 +221,7 @@ struct hpc3_regs {
221#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */ 221#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
222 222
223 u32 _unused1[0x14000/4 - 5]; /* padding */ 223 u32 _unused1[0x14000/4 - 5]; /* padding */
224 224
225 /* Now direct PIO per-HPC3 peripheral access to external regs. */ 225 /* Now direct PIO per-HPC3 peripheral access to external regs. */
226 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */ 226 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
227 u32 _unused2[0x7c00/4]; 227 u32 _unused2[0x7c00/4];
@@ -304,7 +304,7 @@ struct hpc3_regs {
304 volatile u32 bbram[8192-50-14]; /* Battery backed ram */ 304 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
305}; 305};
306 306
307/* 307/*
308 * It is possible to have two HPC3's within the address space on 308 * It is possible to have two HPC3's within the address space on
309 * one machine, though only having one is more likely on an Indy. 309 * one machine, though only having one is more likely on an Indy.
310 */ 310 */
diff --git a/include/asm-mips/sgi/ioc.h b/include/asm-mips/sgi/ioc.h
index 169187f53fbc..f3e3dc9bb732 100644
--- a/include/asm-mips/sgi/ioc.h
+++ b/include/asm-mips/sgi/ioc.h
@@ -16,7 +16,7 @@
16#include <linux/types.h> 16#include <linux/types.h>
17#include <asm/sgi/pi1.h> 17#include <asm/sgi/pi1.h>
18 18
19/* 19/*
20 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things 20 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things
21 * happen if you try word access them. You have been warned. 21 * happen if you try word access them. You have been warned.
22 */ 22 */
@@ -138,7 +138,7 @@ struct sgioc_regs {
138 u8 _sysid[3]; 138 u8 _sysid[3];
139 volatile u8 sysid; 139 volatile u8 sysid;
140#define SGIOC_SYSID_FULLHOUSE 0x01 140#define SGIOC_SYSID_FULLHOUSE 0x01
141#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5) 141#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5)
142#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1) 142#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1)
143 u32 _unused2; 143 u32 _unused2;
144 u8 _read[3]; 144 u8 _read[3];
diff --git a/include/asm-mips/sgi/ip22.h b/include/asm-mips/sgi/ip22.h
index 97d73adb4e40..bbfc05c3cab9 100644
--- a/include/asm-mips/sgi/ip22.h
+++ b/include/asm-mips/sgi/ip22.h
@@ -12,7 +12,7 @@
12#ifndef _SGI_IP22_H 12#ifndef _SGI_IP22_H
13#define _SGI_IP22_H 13#define _SGI_IP22_H
14 14
15/* 15/*
16 * These are the virtual IRQ numbers, we divide all IRQ's into 16 * These are the virtual IRQ numbers, we divide all IRQ's into
17 * 'spaces', the 'space' determines where and how to enable/disable 17 * 'spaces', the 'space' determines where and how to enable/disable
18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups 18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups
diff --git a/include/asm-mips/sgi/mc.h b/include/asm-mips/sgi/mc.h
index fd98f930607c..c52f7834c7c8 100644
--- a/include/asm-mips/sgi/mc.h
+++ b/include/asm-mips/sgi/mc.h
@@ -182,14 +182,14 @@ struct sgimc_regs {
182 volatile u32 dtlb_hi3; 182 volatile u32 dtlb_hi3;
183 u32 _unused33; 183 u32 _unused33;
184 volatile u32 dtlb_lo3; 184 volatile u32 dtlb_lo3;
185 185
186 u32 _unused34[0x0392]; 186 u32 _unused34[0x0392];
187 187
188 u32 _unused35; 188 u32 _unused35;
189 volatile u32 rpsscounter; /* Chirps at 100ns */ 189 volatile u32 rpsscounter; /* Chirps at 100ns */
190 190
191 u32 _unused36[0x1000/4-2*4]; 191 u32 _unused36[0x1000/4-2*4];
192 192
193 u32 _unused37; 193 u32 _unused37;
194 volatile u32 maddronly; /* Address DMA goes at */ 194 volatile u32 maddronly; /* Address DMA goes at */
195 u32 _unused38; 195 u32 _unused38;
diff --git a/include/asm-mips/sgiarcs.h b/include/asm-mips/sgiarcs.h
index 59450335f049..722b77a8c5e5 100644
--- a/include/asm-mips/sgiarcs.h
+++ b/include/asm-mips/sgiarcs.h
@@ -367,7 +367,7 @@ struct linux_smonblock {
367 * Macros for calling a 32-bit ARC implementation from 64-bit code 367 * Macros for calling a 32-bit ARC implementation from 64-bit code
368 */ 368 */
369 369
370#if defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) 370#if defined(CONFIG_64BIT) && defined(CONFIG_ARC32)
371 371
372#define __arc_clobbers \ 372#define __arc_clobbers \
373 "$2","$3" /* ... */, "$8","$9","$10","$11", \ 373 "$2","$3" /* ... */, "$8","$9","$10","$11", \
@@ -476,10 +476,10 @@ struct linux_smonblock {
476 __res; \ 476 __res; \
477}) 477})
478 478
479#endif /* defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) */ 479#endif /* defined(CONFIG_64BIT) && defined(CONFIG_ARC32) */
480 480
481#if (defined(CONFIG_MIPS32) && defined(CONFIG_ARC32)) || \ 481#if (defined(CONFIG_32BIT) && defined(CONFIG_ARC32)) || \
482 (defined(CONFIG_MIPS64) && defined(CONFIG_ARC64)) 482 (defined(CONFIG_64BIT) && defined(CONFIG_ARC64))
483 483
484#define ARC_CALL0(dest) \ 484#define ARC_CALL0(dest) \
485({ long __res; \ 485({ long __res; \
diff --git a/include/asm-mips/sibyte/carmel.h b/include/asm-mips/sibyte/carmel.h
index 7ac5da13ce8a..b5e7dae19f0f 100644
--- a/include/asm-mips/sibyte/carmel.h
+++ b/include/asm-mips/sibyte/carmel.h
@@ -25,12 +25,12 @@
25 25
26#define SIBYTE_BOARD_NAME "Carmel" 26#define SIBYTE_BOARD_NAME "Carmel"
27 27
28#define GPIO_PHY_INTERRUPT 2 28#define GPIO_PHY_INTERRUPT 2
29#define GPIO_NONMASKABLE_INT 3 29#define GPIO_NONMASKABLE_INT 3
30#define GPIO_CF_INSERTED 6 30#define GPIO_CF_INSERTED 6
31#define GPIO_MONTEREY_RESET 7 31#define GPIO_MONTEREY_RESET 7
32#define GPIO_QUADUART_INT 8 32#define GPIO_QUADUART_INT 8
33#define GPIO_CF_INT 9 33#define GPIO_CF_INT 9
34#define GPIO_FPGA_CCLK 10 34#define GPIO_FPGA_CCLK 10
35#define GPIO_FPGA_DOUT 11 35#define GPIO_FPGA_DOUT 11
36#define GPIO_FPGA_DIN 12 36#define GPIO_FPGA_DIN 12
diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h
index 96088fb074a4..40ef97c76c8b 100644
--- a/include/asm-mips/sibyte/sb1250_defs.h
+++ b/include/asm-mips/sibyte/sb1250_defs.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Global constants and macros File: sb1250_defs.h 4 * Global constants and macros File: sb1250_defs.h
5 * 5 *
6 * This file contains macros and definitions used by the other 6 * This file contains macros and definitions used by the other
7 * include files. 7 * include files.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -105,7 +105,7 @@
105#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00 105#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00
106#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100 106#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100
107 107
108/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ 108/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
109#define SIBYTE_HDR_FMASK(chip, pass) \ 109#define SIBYTE_HDR_FMASK(chip, pass) \
110 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass) 110 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
111#define SIBYTE_HDR_FMASK_ALLREVS(chip) \ 111#define SIBYTE_HDR_FMASK_ALLREVS(chip) \
@@ -150,31 +150,31 @@
150 150
151/* ********************************************************************* 151/* *********************************************************************
152 * Naming schemes for constants in these files: 152 * Naming schemes for constants in these files:
153 * 153 *
154 * M_xxx MASK constant (identifies bits in a register). 154 * M_xxx MASK constant (identifies bits in a register).
155 * For multi-bit fields, all bits in the field will 155 * For multi-bit fields, all bits in the field will
156 * be set. 156 * be set.
157 * 157 *
158 * K_xxx "Code" constant (value for data in a multi-bit 158 * K_xxx "Code" constant (value for data in a multi-bit
159 * field). The value is right justified. 159 * field). The value is right justified.
160 * 160 *
161 * V_xxx "Value" constant. This is the same as the 161 * V_xxx "Value" constant. This is the same as the
162 * corresponding "K_xxx" constant, except it is 162 * corresponding "K_xxx" constant, except it is
163 * shifted to the correct position in the register. 163 * shifted to the correct position in the register.
164 * 164 *
165 * S_xxx SHIFT constant. This is the number of bits that 165 * S_xxx SHIFT constant. This is the number of bits that
166 * a field value (code) needs to be shifted 166 * a field value (code) needs to be shifted
167 * (towards the left) to put the value in the right 167 * (towards the left) to put the value in the right
168 * position for the register. 168 * position for the register.
169 * 169 *
170 * A_xxx ADDRESS constant. This will be a physical 170 * A_xxx ADDRESS constant. This will be a physical
171 * address. Use the PHYS_TO_K1 macro to generate 171 * address. Use the PHYS_TO_K1 macro to generate
172 * a K1SEG address. 172 * a K1SEG address.
173 * 173 *
174 * R_xxx RELATIVE offset constant. This is an offset from 174 * R_xxx RELATIVE offset constant. This is an offset from
175 * an A_xxx constant (usually the first register in 175 * an A_xxx constant (usually the first register in
176 * a group). 176 * a group).
177 * 177 *
178 * G_xxx(X) GET value. This macro obtains a multi-bit field 178 * G_xxx(X) GET value. This macro obtains a multi-bit field
179 * from a register, masks it, and shifts it to 179 * from a register, masks it, and shifts it to
180 * the bottom of the register (retrieving a K_xxx 180 * the bottom of the register (retrieving a K_xxx
@@ -189,7 +189,7 @@
189 189
190 190
191/* 191/*
192 * Cast to 64-bit number. Presumably the syntax is different in 192 * Cast to 64-bit number. Presumably the syntax is different in
193 * assembly language. 193 * assembly language.
194 * 194 *
195 * Note: you'll need to define uint32_t and uint64_t in your headers. 195 * Note: you'll need to define uint32_t and uint64_t in your headers.
diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h
index f1b08d32338d..3cdb48f50ed0 100644
--- a/include/asm-mips/sibyte/sb1250_dma.h
+++ b/include/asm-mips/sibyte/sb1250_dma.h
@@ -1,24 +1,24 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * DMA definitions File: sb1250_dma.h 4 * DMA definitions File: sb1250_dma.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * programming the SB1250's DMA controllers, both the data mover 7 * programming the SB1250's DMA controllers, both the data mover
8 * and the Ethernet DMA. 8 * and the Ethernet DMA.
9 * 9 *
10 * SB1250 specification level: User's manual 1/02/02 10 * SB1250 specification level: User's manual 1/02/02
11 * 11 *
12 * Author: Mitch Lichtenberg 12 * Author: Mitch Lichtenberg
13 * 13 *
14 ********************************************************************* 14 *********************************************************************
15 * 15 *
16 * Copyright 2000,2001,2002,2003 16 * Copyright 2000,2001,2002,2003
17 * Broadcom Corporation. All rights reserved. 17 * Broadcom Corporation. All rights reserved.
18 * 18 *
19 * This program is free software; you can redistribute it and/or 19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as 20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of 21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version. 22 * the License, or (at your option) any later version.
23 * 23 *
24 * This program is distributed in the hope that it will be useful, 24 * This program is distributed in the hope that it will be useful,
@@ -28,7 +28,7 @@
28 * 28 *
29 * You should have received a copy of the GNU General Public License 29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software 30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA 32 * MA 02111-1307 USA
33 ********************************************************************* */ 33 ********************************************************************* */
34 34
@@ -43,9 +43,9 @@
43 * DMA Registers 43 * DMA Registers
44 ********************************************************************* */ 44 ********************************************************************* */
45 45
46/* 46/*
47 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4) 47 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4)
48 * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 48 * Registers: DMA_CONFIG0_MAC_x_RX_CH_0
49 * Registers: DMA_CONFIG0_MAC_x_TX_CH_0 49 * Registers: DMA_CONFIG0_MAC_x_TX_CH_0
50 * Registers: DMA_CONFIG0_SER_x_RX 50 * Registers: DMA_CONFIG0_SER_x_RX
51 * Registers: DMA_CONFIG0_SER_x_TX 51 * Registers: DMA_CONFIG0_SER_x_TX
@@ -98,7 +98,7 @@
98 98
99/* 99/*
100 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) 100 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5)
101 * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 101 * Registers: DMA_CONFIG1_MAC_x_RX_CH_0
102 * Registers: DMA_CONFIG1_DMA_x_TX_CH_0 102 * Registers: DMA_CONFIG1_DMA_x_TX_CH_0
103 * Registers: DMA_CONFIG1_SER_x_RX 103 * Registers: DMA_CONFIG1_SER_x_RX
104 * Registers: DMA_CONFIG1_SER_x_TX 104 * Registers: DMA_CONFIG1_SER_x_TX
@@ -152,11 +152,11 @@
152/* 152/*
153 * DMA Descriptor Count Registers (Table 7-8) 153 * DMA Descriptor Count Registers (Table 7-8)
154 */ 154 */
155 155
156/* No bitfields */ 156/* No bitfields */
157 157
158 158
159/* 159/*
160 * Current Descriptor Address Register (Table 7-11) 160 * Current Descriptor Address Register (Table 7-11)
161 */ 161 */
162 162
@@ -275,14 +275,14 @@
275#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) 275#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS)
276#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) 276#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS)
277 277
278/* 278/*
279 * Ethernet Descriptor Status Bits (Table 7-15) 279 * Ethernet Descriptor Status Bits (Table 7-15)
280 */ 280 */
281 281
282#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) 282#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51)
283#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) 283#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52)
284 284
285#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 285#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
286/* Note: BADTCPCS is actually in DSCR_B options field */ 286/* Note: BADTCPCS is actually in DSCR_B options field */
287#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) 287#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0)
288#endif /* 1250 PASS2 || 112x PASS1 */ 288#endif /* 1250 PASS2 || 112x PASS1 */
@@ -324,7 +324,7 @@
324 324
325#define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63) 325#define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63)
326 326
327/* 327/*
328 * Ethernet Transmit Options (Table 7-17) 328 * Ethernet Transmit Options (Table 7-17)
329 */ 329 */
330 330
@@ -377,7 +377,7 @@
377 * Data Mover Registers 377 * Data Mover Registers
378 ********************************************************************* */ 378 ********************************************************************* */
379 379
380/* 380/*
381 * Data Mover Descriptor Base Address Register (Table 7-22) 381 * Data Mover Descriptor Base Address Register (Table 7-22)
382 * Register: DM_DSCR_BASE_0 382 * Register: DM_DSCR_BASE_0
383 * Register: DM_DSCR_BASE_1 383 * Register: DM_DSCR_BASE_1
@@ -414,7 +414,7 @@
414#define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62) 414#define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62)
415#define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63) 415#define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63)
416 416
417/* 417/*
418 * Data Mover Descriptor Count Register (Table 7-25) 418 * Data Mover Descriptor Count Register (Table 7-25)
419 */ 419 */
420 420
diff --git a/include/asm-mips/sibyte/sb1250_genbus.h b/include/asm-mips/sibyte/sb1250_genbus.h
index 0d9dfac3d7db..f1f509f295c4 100644
--- a/include/asm-mips/sibyte/sb1250_genbus.h
+++ b/include/asm-mips/sibyte/sb1250_genbus.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Generic Bus Constants File: sb1250_genbus.h 4 * Generic Bus Constants File: sb1250_genbus.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's Generic Bus interface 7 * manipulating the SB1250's Generic Bus interface
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_int.h b/include/asm-mips/sibyte/sb1250_int.h
index c3f74df211f4..e173e2ea4c98 100644
--- a/include/asm-mips/sibyte/sb1250_int.h
+++ b/include/asm-mips/sibyte/sb1250_int.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Interrupt Mapper definitions File: sb1250_int.h 4 * Interrupt Mapper definitions File: sb1250_int.h
5 * 5 *
6 * This module contains constants for manipulating the SB1250's 6 * This module contains constants for manipulating the SB1250's
7 * interrupt mapper and definitions for the interrupt sources. 7 * interrupt mapper and definitions for the interrupt sources.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -43,7 +43,7 @@
43 43
44/* 44/*
45 * Interrupt sources (Table 4-8, UM 0.2) 45 * Interrupt sources (Table 4-8, UM 0.2)
46 * 46 *
47 * First, the interrupt numbers. 47 * First, the interrupt numbers.
48 */ 48 */
49 49
diff --git a/include/asm-mips/sibyte/sb1250_l2c.h b/include/asm-mips/sibyte/sb1250_l2c.h
index 799db828d963..8afe8e01581b 100644
--- a/include/asm-mips/sibyte/sb1250_l2c.h
+++ b/include/asm-mips/sibyte/sb1250_l2c.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * L2 Cache constants and macros File: sb1250_l2c.h 4 * L2 Cache constants and macros File: sb1250_l2c.h
5 * 5 *
6 * This module contains constants useful for manipulating the 6 * This module contains constants useful for manipulating the
7 * level 2 cache. 7 * level 2 cache.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_ldt.h b/include/asm-mips/sibyte/sb1250_ldt.h
index d8753885df17..f2617ded0a8f 100644
--- a/include/asm-mips/sibyte/sb1250_ldt.h
+++ b/include/asm-mips/sibyte/sb1250_ldt.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * LDT constants File: sb1250_ldt.h 4 * LDT constants File: sb1250_ldt.h
5 * 5 *
6 * This module contains constants and macros to describe 6 * This module contains constants and macros to describe
7 * the LDT interface on the SB1250. 7 * the LDT interface on the SB1250.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -155,7 +155,7 @@
155 155
156/* 156/*
157 * LDT Status Register (Table 8-14). Note that these constants 157 * LDT Status Register (Table 8-14). Note that these constants
158 * assume you've read the command and status register 158 * assume you've read the command and status register
159 * together (32-bit read at offset 0x04) 159 * together (32-bit read at offset 0x04)
160 * 160 *
161 * These bits also apply to the secondary status 161 * These bits also apply to the secondary status
@@ -183,8 +183,8 @@
183#define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31) 183#define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
184 184
185/* 185/*
186 * Bridge Control Register (Table 8-16). Note that these 186 * Bridge Control Register (Table 8-16). Note that these
187 * constants assume you've read the register as a 32-bit 187 * constants assume you've read the register as a 32-bit
188 * read (offset 0x3C) 188 * read (offset 0x3C)
189 */ 189 */
190 190
diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
index 81f603f03a98..18e74e43f4a2 100644
--- a/include/asm-mips/sibyte/sb1250_mac.h
+++ b/include/asm-mips/sibyte/sb1250_mac.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * MAC constants and macros File: sb1250_mac.h 4 * MAC constants and macros File: sb1250_mac.h
5 * 5 *
6 * This module contains constants and macros for the SB1250's 6 * This module contains constants and macros for the SB1250's
7 * ethernet controllers. 7 * ethernet controllers.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -311,7 +311,7 @@
311 311
312/* 312/*
313 * These constants are used to configure the fields within the Frame 313 * These constants are used to configure the fields within the Frame
314 * Configuration Register. 314 * Configuration Register.
315 */ 315 */
316 316
317#define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */ 317#define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */
@@ -393,7 +393,7 @@
393 * Register: MAC_INT_MASK_2 393 * Register: MAC_INT_MASK_2
394 */ 394 */
395 395
396/* 396/*
397 * Use these constants to shift the appropriate channel 397 * Use these constants to shift the appropriate channel
398 * into the CH0 position so the same tests can be used 398 * into the CH0 position so the same tests can be used
399 * on each channel. 399 * on each channel.
diff --git a/include/asm-mips/sibyte/sb1250_mc.h b/include/asm-mips/sibyte/sb1250_mc.h
index 93a48334b874..1dd41c927996 100644
--- a/include/asm-mips/sibyte/sb1250_mc.h
+++ b/include/asm-mips/sibyte/sb1250_mc.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Memory Controller constants File: sb1250_mc.h 4 * Memory Controller constants File: sb1250_mc.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * programming the memory controller. 7 * programming the memory controller.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -166,7 +166,7 @@
166 166
167#define K_MC_REF_RATE_100MHz 0x62 167#define K_MC_REF_RATE_100MHz 0x62
168#define K_MC_REF_RATE_133MHz 0x81 168#define K_MC_REF_RATE_133MHz 0x81
169#define K_MC_REF_RATE_200MHz 0xC4 169#define K_MC_REF_RATE_200MHz 0xC4
170 170
171#define V_MC_REF_RATE_100MHz V_MC_REF_RATE(K_MC_REF_RATE_100MHz) 171#define V_MC_REF_RATE_100MHz V_MC_REF_RATE(K_MC_REF_RATE_100MHz)
172#define V_MC_REF_RATE_133MHz V_MC_REF_RATE(K_MC_REF_RATE_133MHz) 172#define V_MC_REF_RATE_133MHz V_MC_REF_RATE(K_MC_REF_RATE_133MHz)
@@ -228,7 +228,7 @@
228 V_MC_ADDR_DRIVE_DEFAULT | \ 228 V_MC_ADDR_DRIVE_DEFAULT | \
229 V_MC_DATA_DRIVE_DEFAULT | \ 229 V_MC_DATA_DRIVE_DEFAULT | \
230 V_MC_CLOCK_DRIVE_DEFAULT | \ 230 V_MC_CLOCK_DRIVE_DEFAULT | \
231 V_MC_REF_RATE_DEFAULT 231 V_MC_REF_RATE_DEFAULT
232 232
233 233
234 234
diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
index 5d496c6faba6..9db80cd13a79 100644
--- a/include/asm-mips/sibyte/sb1250_regs.h
+++ b/include/asm-mips/sibyte/sb1250_regs.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Register Definitions File: sb1250_regs.h 4 * Register Definitions File: sb1250_regs.h
5 * 5 *
6 * This module contains the addresses of the on-chip peripherals 6 * This module contains the addresses of the on-chip peripherals
7 * on the SB1250. 7 * on the SB1250.
8 * 8 *
9 * SB1250 specification level: 01/02/2002 9 * SB1250 specification level: 01/02/2002
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -40,20 +40,20 @@
40 40
41/* ********************************************************************* 41/* *********************************************************************
42 * Some general notes: 42 * Some general notes:
43 * 43 *
44 * For the most part, when there is more than one peripheral 44 * For the most part, when there is more than one peripheral
45 * of the same type on the SOC, the constants below will be 45 * of the same type on the SOC, the constants below will be
46 * offsets from the base of each peripheral. For example, 46 * offsets from the base of each peripheral. For example,
47 * the MAC registers are described as offsets from the first 47 * the MAC registers are described as offsets from the first
48 * MAC register, and there will be a MAC_REGISTER() macro 48 * MAC register, and there will be a MAC_REGISTER() macro
49 * to calculate the base address of a given MAC. 49 * to calculate the base address of a given MAC.
50 * 50 *
51 * The information in this file is based on the SB1250 SOC 51 * The information in this file is based on the SB1250 SOC
52 * manual version 0.2, July 2000. 52 * manual version 0.2, July 2000.
53 ********************************************************************* */ 53 ********************************************************************* */
54 54
55 55
56/* ********************************************************************* 56/* *********************************************************************
57 * Memory Controller Registers 57 * Memory Controller Registers
58 ********************************************************************* */ 58 ********************************************************************* */
59 59
@@ -101,7 +101,7 @@
101#define R_MC_TEST_ECC 0x0000000420 101#define R_MC_TEST_ECC 0x0000000420
102#define R_MC_MCLK_CFG 0x0000000500 102#define R_MC_MCLK_CFG 0x0000000500
103 103
104/* ********************************************************************* 104/* *********************************************************************
105 * L2 Cache Control Registers 105 * L2 Cache Control Registers
106 ********************************************************************* */ 106 ********************************************************************* */
107 107
@@ -126,7 +126,7 @@
126#define A_L2_EEC_ADDRESS A_L2_ECC_TAG 126#define A_L2_EEC_ADDRESS A_L2_ECC_TAG
127 127
128 128
129/* ********************************************************************* 129/* *********************************************************************
130 * PCI Interface Registers 130 * PCI Interface Registers
131 ********************************************************************* */ 131 ********************************************************************* */
132 132
@@ -134,7 +134,7 @@
134#define A_PCI_TYPE01_HEADER 0x00DE000800 134#define A_PCI_TYPE01_HEADER 0x00DE000800
135 135
136 136
137/* ********************************************************************* 137/* *********************************************************************
138 * Ethernet DMA and MACs 138 * Ethernet DMA and MACs
139 ********************************************************************* */ 139 ********************************************************************* */
140 140
@@ -184,7 +184,7 @@
184 (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \ 184 (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \
185 (reg)) 185 (reg))
186 186
187/* 187/*
188 * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE 188 * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE
189 */ 189 */
190 190
@@ -259,7 +259,7 @@
259#define MAC_CHMAP_COUNT 4 259#define MAC_CHMAP_COUNT 4
260 260
261 261
262/* ********************************************************************* 262/* *********************************************************************
263 * DUART Registers 263 * DUART Registers
264 ********************************************************************* */ 264 ********************************************************************* */
265 265
@@ -363,7 +363,7 @@
363#endif /* 1250 PASS2 || 112x PASS1 */ 363#endif /* 1250 PASS2 || 112x PASS1 */
364 364
365 365
366/* ********************************************************************* 366/* *********************************************************************
367 * Synchronous Serial Registers 367 * Synchronous Serial Registers
368 ********************************************************************* */ 368 ********************************************************************* */
369 369
@@ -397,7 +397,7 @@
397 (reg)) 397 (reg))
398 398
399 399
400/* 400/*
401 * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE 401 * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE
402 */ 402 */
403 403
@@ -457,7 +457,7 @@
457#define R_SER_RMON_RX_ERRORS 0x000001F0 457#define R_SER_RMON_RX_ERRORS 0x000001F0
458#define R_SER_RMON_RX_BADADDR 0x000001F8 458#define R_SER_RMON_RX_BADADDR 0x000001F8
459 459
460/* ********************************************************************* 460/* *********************************************************************
461 * Generic Bus Registers 461 * Generic Bus Registers
462 ********************************************************************* */ 462 ********************************************************************* */
463 463
@@ -513,7 +513,7 @@
513#define R_IO_PCMCIA_CFG 0x0A60 513#define R_IO_PCMCIA_CFG 0x0A60
514#define R_IO_PCMCIA_STATUS 0x0A70 514#define R_IO_PCMCIA_STATUS 0x0A70
515 515
516/* ********************************************************************* 516/* *********************************************************************
517 * GPIO Registers 517 * GPIO Registers
518 ********************************************************************* */ 518 ********************************************************************* */
519 519
@@ -537,7 +537,7 @@
537#define R_GPIO_PIN_CLR 0x30 537#define R_GPIO_PIN_CLR 0x30
538#define R_GPIO_PIN_SET 0x38 538#define R_GPIO_PIN_SET 0x38
539 539
540/* ********************************************************************* 540/* *********************************************************************
541 * SMBus Registers 541 * SMBus Registers
542 ********************************************************************* */ 542 ********************************************************************* */
543 543
@@ -573,7 +573,7 @@
573#define R_SMB_CONTROL 0x0000000060 573#define R_SMB_CONTROL 0x0000000060
574#define R_SMB_PEC 0x0000000070 574#define R_SMB_PEC 0x0000000070
575 575
576/* ********************************************************************* 576/* *********************************************************************
577 * Timer Registers 577 * Timer Registers
578 ********************************************************************* */ 578 ********************************************************************* */
579 579
@@ -641,7 +641,7 @@
641#endif /* 1250 PASS2 || 112x PASS1 */ 641#endif /* 1250 PASS2 || 112x PASS1 */
642 642
643 643
644/* ********************************************************************* 644/* *********************************************************************
645 * System Control Registers 645 * System Control Registers
646 ********************************************************************* */ 646 ********************************************************************* */
647 647
@@ -649,7 +649,7 @@
649#define A_SCD_SYSTEM_CFG 0x0010020008 649#define A_SCD_SYSTEM_CFG 0x0010020008
650#define A_SCD_SYSTEM_MANUF 0x0010038000 650#define A_SCD_SYSTEM_MANUF 0x0010038000
651 651
652/* ********************************************************************* 652/* *********************************************************************
653 * System Address Trap Registers 653 * System Address Trap Registers
654 ********************************************************************* */ 654 ********************************************************************* */
655 655
@@ -672,7 +672,7 @@
672#endif /* 1250 PASS2 || 112x PASS1 */ 672#endif /* 1250 PASS2 || 112x PASS1 */
673 673
674 674
675/* ********************************************************************* 675/* *********************************************************************
676 * System Interrupt Mapper Registers 676 * System Interrupt Mapper Registers
677 ********************************************************************* */ 677 ********************************************************************* */
678 678
@@ -701,7 +701,7 @@
701#define R_IMR_INTERRUPT_MAP_BASE 0x0200 701#define R_IMR_INTERRUPT_MAP_BASE 0x0200
702#define R_IMR_INTERRUPT_MAP_COUNT 64 702#define R_IMR_INTERRUPT_MAP_COUNT 64
703 703
704/* ********************************************************************* 704/* *********************************************************************
705 * System Performance Counter Registers 705 * System Performance Counter Registers
706 ********************************************************************* */ 706 ********************************************************************* */
707 707
@@ -711,7 +711,7 @@
711#define A_SCD_PERF_CNT_2 0x00100204E0 711#define A_SCD_PERF_CNT_2 0x00100204E0
712#define A_SCD_PERF_CNT_3 0x00100204E8 712#define A_SCD_PERF_CNT_3 0x00100204E8
713 713
714/* ********************************************************************* 714/* *********************************************************************
715 * System Bus Watcher Registers 715 * System Bus Watcher Registers
716 ********************************************************************* */ 716 ********************************************************************* */
717 717
@@ -726,13 +726,13 @@
726#define A_BUS_L2_ERRORS 0x00100208C0 726#define A_BUS_L2_ERRORS 0x00100208C0
727#define A_BUS_MEM_IO_ERRORS 0x00100208C8 727#define A_BUS_MEM_IO_ERRORS 0x00100208C8
728 728
729/* ********************************************************************* 729/* *********************************************************************
730 * System Debug Controller Registers 730 * System Debug Controller Registers
731 ********************************************************************* */ 731 ********************************************************************* */
732 732
733#define A_SCD_JTAG_BASE 0x0010000000 733#define A_SCD_JTAG_BASE 0x0010000000
734 734
735/* ********************************************************************* 735/* *********************************************************************
736 * System Trace Buffer Registers 736 * System Trace Buffer Registers
737 ********************************************************************* */ 737 ********************************************************************* */
738 738
@@ -755,7 +755,7 @@
755#define A_SCD_TRACE_SEQUENCE_6 0x0010020A90 755#define A_SCD_TRACE_SEQUENCE_6 0x0010020A90
756#define A_SCD_TRACE_SEQUENCE_7 0x0010020A98 756#define A_SCD_TRACE_SEQUENCE_7 0x0010020A98
757 757
758/* ********************************************************************* 758/* *********************************************************************
759 * System Generic DMA Registers 759 * System Generic DMA Registers
760 ********************************************************************* */ 760 ********************************************************************* */
761 761
diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
index 22e8041959e2..dbbd682fb47e 100644
--- a/include/asm-mips/sibyte/sb1250_scd.h
+++ b/include/asm-mips/sibyte/sb1250_scd.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * SCD Constants and Macros File: sb1250_scd.h 4 * SCD Constants and Macros File: sb1250_scd.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the System Control and Debug module on the 1250. 7 * manipulating the System Control and Debug module on the 1250.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -130,40 +130,40 @@
130/* System Manufacturing Register 130/* System Manufacturing Register
131* Register: SCD_SYSTEM_MANUF 131* Register: SCD_SYSTEM_MANUF
132*/ 132*/
133 133
134/* Wafer ID: bits 31:0 */ 134/* Wafer ID: bits 31:0 */
135#define S_SYS_WAFERID1_200 _SB_MAKE64(0) 135#define S_SYS_WAFERID1_200 _SB_MAKE64(0)
136#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) 136#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200)
137#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200) 137#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200)
138#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200) 138#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200)
139 139
140#define S_SYS_BIN _SB_MAKE64(32) 140#define S_SYS_BIN _SB_MAKE64(32)
141#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) 141#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN)
142#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN) 142#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN)
143#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) 143#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN)
144 144
145/* Wafer ID: bits 39:36 */ 145/* Wafer ID: bits 39:36 */
146#define S_SYS_WAFERID2_200 _SB_MAKE64(36) 146#define S_SYS_WAFERID2_200 _SB_MAKE64(36)
147#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200) 147#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200)
148#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200) 148#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200)
149#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200) 149#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200)
150 150
151/* Wafer ID: bits 39:0 */ 151/* Wafer ID: bits 39:0 */
152#define S_SYS_WAFERID_300 _SB_MAKE64(0) 152#define S_SYS_WAFERID_300 _SB_MAKE64(0)
153#define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300) 153#define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300)
154#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300) 154#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300)
155#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300) 155#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300)
156 156
157#define S_SYS_XPOS _SB_MAKE64(40) 157#define S_SYS_XPOS _SB_MAKE64(40)
158#define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS) 158#define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS)
159#define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS) 159#define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS)
160#define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS) 160#define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS)
161 161
162#define S_SYS_YPOS _SB_MAKE64(46) 162#define S_SYS_YPOS _SB_MAKE64(46)
163#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS) 163#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS)
164#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS) 164#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS)
165#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS) 165#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS)
166 166
167/* 167/*
168 * System Config Register (Table 4-2) 168 * System Config Register (Table 4-2)
169 * Register: SCD_SYSTEM_CFG 169 * Register: SCD_SYSTEM_CFG
diff --git a/include/asm-mips/sibyte/sb1250_smbus.h b/include/asm-mips/sibyte/sb1250_smbus.h
index 287cbfe9efa2..335c53e92936 100644
--- a/include/asm-mips/sibyte/sb1250_smbus.h
+++ b/include/asm-mips/sibyte/sb1250_smbus.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * SMBUS Constants File: sb1250_smbus.h 4 * SMBUS Constants File: sb1250_smbus.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's SMbus devices. 7 * manipulating the SB1250's SMbus devices.
8 * 8 *
9 * SB1250 specification level: 01/02/2002 9 * SB1250 specification level: 01/02/2002
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_syncser.h b/include/asm-mips/sibyte/sb1250_syncser.h
index 8d5e8edd3c4b..fa2760d38b8b 100644
--- a/include/asm-mips/sibyte/sb1250_syncser.h
+++ b/include/asm-mips/sibyte/sb1250_syncser.h
@@ -7,17 +7,17 @@
7 * manipulating the SB1250's Synchronous Serial 7 * manipulating the SB1250's Synchronous Serial
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h
index 7655d6945cca..923ea4f44e0f 100644
--- a/include/asm-mips/sibyte/sb1250_uart.h
+++ b/include/asm-mips/sibyte/sb1250_uart.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * UART Constants File: sb1250_uart.h 4 * UART Constants File: sb1250_uart.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's UARTs 7 * manipulating the SB1250's UARTs
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -37,7 +37,7 @@
37 37
38#include "sb1250_defs.h" 38#include "sb1250_defs.h"
39 39
40/* ********************************************************************** 40/* **********************************************************************
41 * DUART Registers 41 * DUART Registers
42 ********************************************************************** */ 42 ********************************************************************** */
43 43
@@ -145,7 +145,7 @@
145#define V_DUART_MISC_CMD_START_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK) 145#define V_DUART_MISC_CMD_START_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
146#define V_DUART_MISC_CMD_STOP_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK) 146#define V_DUART_MISC_CMD_STOP_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
147 147
148#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7) 148#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7)
149 149
150/* 150/*
151 * DUART Status Register (Table 10-6) 151 * DUART Status Register (Table 10-6)
@@ -165,7 +165,7 @@
165 165
166/* 166/*
167 * DUART Baud Rate Register (Table 10-7) 167 * DUART Baud Rate Register (Table 10-7)
168 * Register: DUART_CLK_SEL_A 168 * Register: DUART_CLK_SEL_A
169 * Register: DUART_CLK_SEL_B 169 * Register: DUART_CLK_SEL_B
170 */ 170 */
171 171
@@ -332,7 +332,7 @@
332 (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1) 332 (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
333 333
334#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 334#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
335/* 335/*
336 * Full Interrupt Control Register 336 * Full Interrupt Control Register
337 */ 337 */
338 338
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index 18939e84b6f2..f7fbebaa0744 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -10,7 +10,7 @@
10#define _ASM_SIGCONTEXT_H 10#define _ASM_SIGCONTEXT_H
11 11
12#include <asm/sgidefs.h> 12#include <asm/sgidefs.h>
13 13
14#if _MIPS_SIM == _MIPS_SIM_ABI32 14#if _MIPS_SIM == _MIPS_SIM_ABI32
15 15
16/* 16/*
@@ -38,7 +38,7 @@ struct sigcontext {
38}; 38};
39 39
40#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 40#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
41 41
42#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 42#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
43 43
44/* 44/*
diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h
index a0e26e6c994d..698becab5a9e 100644
--- a/include/asm-mips/siginfo.h
+++ b/include/asm-mips/siginfo.h
@@ -25,10 +25,10 @@ struct siginfo;
25/* 25/*
26 * Careful to keep union _sifields from shifting ... 26 * Careful to keep union _sifields from shifting ...
27 */ 27 */
28#ifdef CONFIG_MIPS32 28#ifdef CONFIG_32BIT
29#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int)) 29#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
30#endif 30#endif
31#ifdef CONFIG_MIPS64 31#ifdef CONFIG_64BIT
32#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) 32#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
33#endif 33#endif
34 34
diff --git a/include/asm-mips/sim.h b/include/asm-mips/sim.h
index 6333169be329..3ccfe09fa744 100644
--- a/include/asm-mips/sim.h
+++ b/include/asm-mips/sim.h
@@ -16,7 +16,7 @@
16#define __str2(x) #x 16#define __str2(x) #x
17#define __str(x) __str2(x) 17#define __str(x) __str2(x)
18 18
19#ifdef CONFIG_MIPS32 19#ifdef CONFIG_32BIT
20 20
21#define save_static_function(symbol) \ 21#define save_static_function(symbol) \
22__asm__ ( \ 22__asm__ ( \
@@ -42,9 +42,9 @@ __asm__ ( \
42 42
43#define nabi_no_regargs 43#define nabi_no_regargs
44 44
45#endif /* CONFIG_MIPS32 */ 45#endif /* CONFIG_32BIT */
46 46
47#ifdef CONFIG_MIPS64 47#ifdef CONFIG_64BIT
48 48
49#define save_static_function(symbol) \ 49#define save_static_function(symbol) \
50__asm__ ( \ 50__asm__ ( \
@@ -78,6 +78,6 @@ __asm__ ( \
78 unsigned long __dummy6, \ 78 unsigned long __dummy6, \
79 unsigned long __dummy7, 79 unsigned long __dummy7,
80 80
81#endif /* CONFIG_MIPS64 */ 81#endif /* CONFIG_64BIT */
82 82
83#endif /* _ASM_SIM_H */ 83#endif /* _ASM_SIM_H */
diff --git a/include/asm-mips/socket.h b/include/asm-mips/socket.h
index d478a86294ee..753b6620e6fa 100644
--- a/include/asm-mips/socket.h
+++ b/include/asm-mips/socket.h
@@ -82,7 +82,7 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */
82 * @SOCK_STREAM - stream (connection) socket 82 * @SOCK_STREAM - stream (connection) socket
83 * @SOCK_RAW - raw socket 83 * @SOCK_RAW - raw socket
84 * @SOCK_RDM - reliably-delivered message 84 * @SOCK_RDM - reliably-delivered message
85 * @SOCK_SEQPACKET - sequential packet socket 85 * @SOCK_SEQPACKET - sequential packet socket
86 * @SOCK_PACKET - linux specific way of getting packets at the dev level. 86 * @SOCK_PACKET - linux specific way of getting packets at the dev level.
87 * For writing rarp and other similar things on the user level. 87 * For writing rarp and other similar things on the user level.
88 */ 88 */
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 86283c25fd5b..fb42f99f8527 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -26,7 +26,7 @@
26 26
27 .macro SAVE_TEMP 27 .macro SAVE_TEMP
28 mfhi v1 28 mfhi v1
29#ifdef CONFIG_MIPS32 29#ifdef CONFIG_32BIT
30 LONG_S $8, PT_R8(sp) 30 LONG_S $8, PT_R8(sp)
31 LONG_S $9, PT_R9(sp) 31 LONG_S $9, PT_R9(sp)
32#endif 32#endif
@@ -56,7 +56,7 @@
56 56
57#ifdef CONFIG_SMP 57#ifdef CONFIG_SMP
58 .macro get_saved_sp /* SMP variation */ 58 .macro get_saved_sp /* SMP variation */
59#ifdef CONFIG_MIPS32 59#ifdef CONFIG_32BIT
60 mfc0 k0, CP0_CONTEXT 60 mfc0 k0, CP0_CONTEXT
61 lui k1, %hi(kernelsp) 61 lui k1, %hi(kernelsp)
62 srl k0, k0, 23 62 srl k0, k0, 23
@@ -64,7 +64,7 @@
64 addu k1, k0 64 addu k1, k0
65 LONG_L k1, %lo(kernelsp)(k1) 65 LONG_L k1, %lo(kernelsp)(k1)
66#endif 66#endif
67#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 67#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
68 MFC0 k1, CP0_CONTEXT 68 MFC0 k1, CP0_CONTEXT
69 dsra k1, 23 69 dsra k1, 23
70 lui k0, %hi(pgd_current) 70 lui k0, %hi(pgd_current)
@@ -74,7 +74,7 @@
74 daddu k1, k0 74 daddu k1, k0
75 LONG_L k1, %lo(kernelsp)(k1) 75 LONG_L k1, %lo(kernelsp)(k1)
76#endif 76#endif
77#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) 77#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
78 MFC0 k1, CP0_CONTEXT 78 MFC0 k1, CP0_CONTEXT
79 dsrl k1, 23 79 dsrl k1, 23
80 dsll k1, k1, 3 80 dsll k1, k1, 3
@@ -83,20 +83,20 @@
83 .endm 83 .endm
84 84
85 .macro set_saved_sp stackp temp temp2 85 .macro set_saved_sp stackp temp temp2
86#ifdef CONFIG_MIPS32 86#ifdef CONFIG_32BIT
87 mfc0 \temp, CP0_CONTEXT 87 mfc0 \temp, CP0_CONTEXT
88 srl \temp, 23 88 srl \temp, 23
89 sll \temp, 2 89 sll \temp, 2
90 LONG_S \stackp, kernelsp(\temp) 90 LONG_S \stackp, kernelsp(\temp)
91#endif 91#endif
92#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 92#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
93 lw \temp, TI_CPU(gp) 93 lw \temp, TI_CPU(gp)
94 dsll \temp, 3 94 dsll \temp, 3
95 lui \temp2, %hi(kernelsp) 95 lui \temp2, %hi(kernelsp)
96 daddu \temp, \temp2 96 daddu \temp, \temp2
97 LONG_S \stackp, %lo(kernelsp)(\temp) 97 LONG_S \stackp, %lo(kernelsp)(\temp)
98#endif 98#endif
99#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) 99#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
100 lw \temp, TI_CPU(gp) 100 lw \temp, TI_CPU(gp)
101 dsll \temp, 3 101 dsll \temp, 3
102 LONG_S \stackp, kernelsp(\temp) 102 LONG_S \stackp, kernelsp(\temp)
@@ -140,7 +140,7 @@
140 LONG_S $6, PT_R6(sp) 140 LONG_S $6, PT_R6(sp)
141 MFC0 v1, CP0_EPC 141 MFC0 v1, CP0_EPC
142 LONG_S $7, PT_R7(sp) 142 LONG_S $7, PT_R7(sp)
143#ifdef CONFIG_MIPS64 143#ifdef CONFIG_64BIT
144 LONG_S $8, PT_R8(sp) 144 LONG_S $8, PT_R8(sp)
145 LONG_S $9, PT_R9(sp) 145 LONG_S $9, PT_R9(sp)
146#endif 146#endif
@@ -169,7 +169,7 @@
169 169
170 .macro RESTORE_TEMP 170 .macro RESTORE_TEMP
171 LONG_L $24, PT_LO(sp) 171 LONG_L $24, PT_LO(sp)
172#ifdef CONFIG_MIPS32 172#ifdef CONFIG_32BIT
173 LONG_L $8, PT_R8(sp) 173 LONG_L $8, PT_R8(sp)
174 LONG_L $9, PT_R9(sp) 174 LONG_L $9, PT_R9(sp)
175#endif 175#endif
@@ -217,7 +217,7 @@
217 LONG_L $31, PT_R31(sp) 217 LONG_L $31, PT_R31(sp)
218 LONG_L $28, PT_R28(sp) 218 LONG_L $28, PT_R28(sp)
219 LONG_L $25, PT_R25(sp) 219 LONG_L $25, PT_R25(sp)
220#ifdef CONFIG_MIPS64 220#ifdef CONFIG_64BIT
221 LONG_L $8, PT_R8(sp) 221 LONG_L $8, PT_R8(sp)
222 LONG_L $9, PT_R9(sp) 222 LONG_L $9, PT_R9(sp)
223#endif 223#endif
@@ -262,7 +262,7 @@
262 LONG_L $31, PT_R31(sp) 262 LONG_L $31, PT_R31(sp)
263 LONG_L $28, PT_R28(sp) 263 LONG_L $28, PT_R28(sp)
264 LONG_L $25, PT_R25(sp) 264 LONG_L $25, PT_R25(sp)
265#ifdef CONFIG_MIPS64 265#ifdef CONFIG_64BIT
266 LONG_L $8, PT_R8(sp) 266 LONG_L $8, PT_R8(sp)
267 LONG_L $9, PT_R9(sp) 267 LONG_L $9, PT_R9(sp)
268#endif 268#endif
diff --git a/include/asm-mips/statfs.h b/include/asm-mips/statfs.h
index 5076fec65780..c3ddf973c1c0 100644
--- a/include/asm-mips/statfs.h
+++ b/include/asm-mips/statfs.h
@@ -57,7 +57,7 @@ struct statfs64 {
57}; 57};
58 58
59#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 59#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
60 60
61#if _MIPS_SIM == _MIPS_SIM_ABI64 61#if _MIPS_SIM == _MIPS_SIM_ABI64
62 62
63struct statfs64 { /* Same as struct statfs */ 63struct statfs64 { /* Same as struct statfs */
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index b18345504f8a..5a06f6d13899 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -16,7 +16,7 @@
16 * Most of the inline functions are rather naive implementations so I just 16 * Most of the inline functions are rather naive implementations so I just
17 * didn't bother updating them for 64-bit ... 17 * didn't bother updating them for 64-bit ...
18 */ 18 */
19#ifdef CONFIG_MIPS32 19#ifdef CONFIG_32BIT
20 20
21#ifndef IN_STRING_C 21#ifndef IN_STRING_C
22 22
@@ -130,7 +130,7 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
130 130
131 return __res; 131 return __res;
132} 132}
133#endif /* CONFIG_MIPS32 */ 133#endif /* CONFIG_32BIT */
134 134
135#define __HAVE_ARCH_MEMSET 135#define __HAVE_ARCH_MEMSET
136extern void *memset(void *__s, int __c, size_t __count); 136extern void *memset(void *__s, int __c, size_t __count);
@@ -141,7 +141,7 @@ extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
141#define __HAVE_ARCH_MEMMOVE 141#define __HAVE_ARCH_MEMMOVE
142extern void *memmove(void *__dest, __const__ void *__src, size_t __n); 142extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
143 143
144#ifdef CONFIG_MIPS32 144#ifdef CONFIG_32BIT
145#define __HAVE_ARCH_MEMSCAN 145#define __HAVE_ARCH_MEMSCAN
146static __inline__ void *memscan(void *__addr, int __c, size_t __size) 146static __inline__ void *memscan(void *__addr, int __c, size_t __size)
147{ 147{
@@ -161,6 +161,6 @@ static __inline__ void *memscan(void *__addr, int __c, size_t __size)
161 161
162 return __addr; 162 return __addr;
163} 163}
164#endif /* CONFIG_MIPS32 */ 164#endif /* CONFIG_32BIT */
165 165
166#endif /* _ASM_STRING_H */ 166#endif /* _ASM_STRING_H */
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 169f3d4265b1..6663efd49b27 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -208,7 +208,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
208 return retval; 208 return retval;
209} 209}
210 210
211#ifdef CONFIG_MIPS64 211#ifdef CONFIG_64BIT
212static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) 212static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
213{ 213{
214 __u64 retval; 214 __u64 retval;
@@ -330,7 +330,7 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
330 return retval; 330 return retval;
331} 331}
332 332
333#ifdef CONFIG_MIPS64 333#ifdef CONFIG_64BIT
334static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, 334static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
335 unsigned long new) 335 unsigned long new)
336{ 336{
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index 42fcd6f2c206..a70cb0854c8a 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -62,10 +62,10 @@ register struct thread_info *__current_thread_info __asm__("$28");
62#define current_thread_info() __current_thread_info 62#define current_thread_info() __current_thread_info
63 63
64/* thread information allocation */ 64/* thread information allocation */
65#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS32) 65#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
66#define THREAD_SIZE_ORDER (1) 66#define THREAD_SIZE_ORDER (1)
67#endif 67#endif
68#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS64) 68#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
69#define THREAD_SIZE_ORDER (2) 69#define THREAD_SIZE_ORDER (2)
70#endif 70#endif
71#ifdef CONFIG_PAGE_SIZE_8KB 71#ifdef CONFIG_PAGE_SIZE_8KB
diff --git a/include/asm-mips/titan_dep.h b/include/asm-mips/titan_dep.h
index fd9599e40a0a..fee1908c65d2 100644
--- a/include/asm-mips/titan_dep.h
+++ b/include/asm-mips/titan_dep.h
@@ -228,4 +228,4 @@ extern unsigned long ocd_base;
228#define RM9K_READ_8(ofs, val) *(val) = *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs) 228#define RM9K_READ_8(ofs, val) *(val) = *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs)
229#define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs) 229#define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs)
230 230
231#endif 231#endif
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
index 5d939db6e220..3bb7f0087d68 100644
--- a/include/asm-mips/tx4927/tx4927.h
+++ b/include/asm-mips/tx4927/tx4927.h
@@ -45,14 +45,14 @@
45 45
46 46
47/* TX4927 SDRAM controller (64-bit registers) */ 47/* TX4927 SDRAM controller (64-bit registers) */
48#define TX4927_SDRAMC_BASE 0x8000 48#define TX4927_SDRAMC_BASE 0x8000
49#define TX4927_SDRAMC_SDCCR0 0x8000 49#define TX4927_SDRAMC_SDCCR0 0x8000
50#define TX4927_SDRAMC_SDCCR1 0x8008 50#define TX4927_SDRAMC_SDCCR1 0x8008
51#define TX4927_SDRAMC_SDCCR2 0x8010 51#define TX4927_SDRAMC_SDCCR2 0x8010
52#define TX4927_SDRAMC_SDCCR3 0x8018 52#define TX4927_SDRAMC_SDCCR3 0x8018
53#define TX4927_SDRAMC_SDCTR 0x8040 53#define TX4927_SDRAMC_SDCTR 0x8040
54#define TX4927_SDRAMC_SDCMD 0x8058 54#define TX4927_SDRAMC_SDCMD 0x8058
55#define TX4927_SDRAMC_LIMIT 0x8fff 55#define TX4927_SDRAMC_LIMIT 0x8fff
56 56
57 57
58/* TX4927 external bus controller (64-bit registers) */ 58/* TX4927 external bus controller (64-bit registers) */
@@ -289,8 +289,8 @@
289 289
290 290
291/* TX4927 serial port 0 (32-bit registers) */ 291/* TX4927 serial port 0 (32-bit registers) */
292#define TX4927_SIO0_BASE 0xf300 292#define TX4927_SIO0_BASE 0xf300
293#define TX4927_SIO0_SILCR0 0xf300 293#define TX4927_SIO0_SILCR0 0xf300
294#define TX4927_SIO0_SILCR0_RESERVED_16_31 BM_16_31 294#define TX4927_SIO0_SILCR0_RESERVED_16_31 BM_16_31
295#define TX4927_SIO0_SILCR0_RWUB BM_15_15 295#define TX4927_SIO0_SILCR0_RWUB BM_15_15
296#define TX4927_SIO0_SILCR0_TWUB BM_14_14 296#define TX4927_SIO0_SILCR0_TWUB BM_14_14
@@ -309,7 +309,7 @@
309#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT (~BM_00_01) 309#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT (~BM_00_01)
310#define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT_MC BM_01_01 310#define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT_MC BM_01_01
311#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT_MC BM_00_01 311#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT_MC BM_00_01
312#define TX4927_SIO0_SIDICR0 0xf304 312#define TX4927_SIO0_SIDICR0 0xf304
313#define TX4927_SIO0_SIDICR0_RESERVED_16_31 BM_16_31 313#define TX4927_SIO0_SIDICR0_RESERVED_16_31 BM_16_31
314#define TX4927_SIO0_SIDICR0_TDE BM_15_15 314#define TX4927_SIO0_SIDICR0_TDE BM_15_15
315#define TX4927_SIO0_SIDICR0_RDE BM_14_14 315#define TX4927_SIO0_SIDICR0_RDE BM_14_14
@@ -330,7 +330,7 @@
330#define TX4927_SIO0_SIDICR0_STIE_TRDY BM_02_02 330#define TX4927_SIO0_SIDICR0_STIE_TRDY BM_02_02
331#define TX4927_SIO0_SIDICR0_STIE_TXALS BM_01_01 331#define TX4927_SIO0_SIDICR0_STIE_TXALS BM_01_01
332#define TX4927_SIO0_SIDICR0_STIE_UBRKD BM_00_00 332#define TX4927_SIO0_SIDICR0_STIE_UBRKD BM_00_00
333#define TX4927_SIO0_SIDISR0 0xf308 333#define TX4927_SIO0_SIDISR0 0xf308
334#define TX4927_SIO0_SIDISR0_RESERVED_16_31 BM_16_31 334#define TX4927_SIO0_SIDISR0_RESERVED_16_31 BM_16_31
335#define TX4927_SIO0_SIDISR0_UBRK BM_15_15 335#define TX4927_SIO0_SIDISR0_UBRK BM_15_15
336#define TX4927_SIO0_SIDISR0_UVALID BM_14_14 336#define TX4927_SIO0_SIDISR0_UVALID BM_14_14
@@ -344,7 +344,7 @@
344#define TX4927_SIO0_SIDISR0_STIS BM_06_06 344#define TX4927_SIO0_SIDISR0_STIS BM_06_06
345#define TX4927_SIO0_SIDISR0_RESERVED_05_05 BM_05_05 345#define TX4927_SIO0_SIDISR0_RESERVED_05_05 BM_05_05
346#define TX4927_SIO0_SIDISR0_RFDN BM_00_04 346#define TX4927_SIO0_SIDISR0_RFDN BM_00_04
347#define TX4927_SIO0_SISCISR0 0xf30c 347#define TX4927_SIO0_SISCISR0 0xf30c
348#define TX4927_SIO0_SISCISR0_RESERVED_06_31 BM_06_31 348#define TX4927_SIO0_SISCISR0_RESERVED_06_31 BM_06_31
349#define TX4927_SIO0_SISCISR0_OERS BM_05_05 349#define TX4927_SIO0_SISCISR0_OERS BM_05_05
350#define TX4927_SIO0_SISCISR0_CTSS BM_04_04 350#define TX4927_SIO0_SISCISR0_CTSS BM_04_04
@@ -352,7 +352,7 @@
352#define TX4927_SIO0_SISCISR0_TRDY BM_02_02 352#define TX4927_SIO0_SISCISR0_TRDY BM_02_02
353#define TX4927_SIO0_SISCISR0_TXALS BM_01_01 353#define TX4927_SIO0_SISCISR0_TXALS BM_01_01
354#define TX4927_SIO0_SISCISR0_UBRKD BM_00_00 354#define TX4927_SIO0_SISCISR0_UBRKD BM_00_00
355#define TX4927_SIO0_SIFCR0 0xf310 355#define TX4927_SIO0_SIFCR0 0xf310
356#define TX4927_SIO0_SIFCR0_RESERVED_16_31 BM_16_31 356#define TX4927_SIO0_SIFCR0_RESERVED_16_31 BM_16_31
357#define TX4927_SIO0_SIFCR0_SWRST BM_16_31 357#define TX4927_SIO0_SIFCR0_SWRST BM_16_31
358#define TX4927_SIO0_SIFCR0_RESERVED_09_14 BM_09_14 358#define TX4927_SIO0_SIFCR0_RESERVED_09_14 BM_09_14
@@ -370,7 +370,7 @@
370#define TX4927_SIO0_SIFCR0_TFRST BM_02_02 370#define TX4927_SIO0_SIFCR0_TFRST BM_02_02
371#define TX4927_SIO0_SIFCR0_RFRST BM_01_01 371#define TX4927_SIO0_SIFCR0_RFRST BM_01_01
372#define TX4927_SIO0_SIFCR0_FRSTE BM_00_00 372#define TX4927_SIO0_SIFCR0_FRSTE BM_00_00
373#define TX4927_SIO0_SIFLCR0 0xf314 373#define TX4927_SIO0_SIFLCR0 0xf314
374#define TX4927_SIO0_SIFLCR0_RESERVED_13_31 BM_13_31 374#define TX4927_SIO0_SIFLCR0_RESERVED_13_31 BM_13_31
375#define TX4927_SIO0_SIFLCR0_RCS BM_12_12 375#define TX4927_SIO0_SIFLCR0_RCS BM_12_12
376#define TX4927_SIO0_SIFLCR0_TES BM_11_11 376#define TX4927_SIO0_SIFLCR0_TES BM_11_11
@@ -381,7 +381,7 @@
381#define TX4927_SIO0_SIFLCR0_RESERVED_05_06 BM_05_06 381#define TX4927_SIO0_SIFLCR0_RESERVED_05_06 BM_05_06
382#define TX4927_SIO0_SIFLCR0_RTSTL BM_01_04 382#define TX4927_SIO0_SIFLCR0_RTSTL BM_01_04
383#define TX4927_SIO0_SIFLCR0_TBRK BM_00_00 383#define TX4927_SIO0_SIFLCR0_TBRK BM_00_00
384#define TX4927_SIO0_SIBGR0 0xf318 384#define TX4927_SIO0_SIBGR0 0xf318
385#define TX4927_SIO0_SIBGR0_RESERVED_10_31 BM_10_31 385#define TX4927_SIO0_SIBGR0_RESERVED_10_31 BM_10_31
386#define TX4927_SIO0_SIBGR0_BCLK BM_08_09 386#define TX4927_SIO0_SIBGR0_BCLK BM_08_09
387#define TX4927_SIO0_SIBGR0_BCLK_T0 (~BM_08_09) 387#define TX4927_SIO0_SIBGR0_BCLK_T0 (~BM_08_09)
@@ -389,28 +389,28 @@
389#define TX4927_SIO0_SIBGR0_BCLK_T4 BM_09_09 389#define TX4927_SIO0_SIBGR0_BCLK_T4 BM_09_09
390#define TX4927_SIO0_SIBGR0_BCLK_T6 BM_08_09 390#define TX4927_SIO0_SIBGR0_BCLK_T6 BM_08_09
391#define TX4927_SIO0_SIBGR0_BRD BM_00_07 391#define TX4927_SIO0_SIBGR0_BRD BM_00_07
392#define TX4927_SIO0_SITFIF00 0xf31c 392#define TX4927_SIO0_SITFIF00 0xf31c
393#define TX4927_SIO0_SITFIF00_RESERVED_08_31 BM_08_31 393#define TX4927_SIO0_SITFIF00_RESERVED_08_31 BM_08_31
394#define TX4927_SIO0_SITFIF00_TXD BM_00_07 394#define TX4927_SIO0_SITFIF00_TXD BM_00_07
395#define TX4927_SIO0_SIRFIFO0 0xf320 395#define TX4927_SIO0_SIRFIFO0 0xf320
396#define TX4927_SIO0_SIRFIFO0_RESERVED_08_31 BM_08_31 396#define TX4927_SIO0_SIRFIFO0_RESERVED_08_31 BM_08_31
397#define TX4927_SIO0_SIRFIFO0_RXD BM_00_07 397#define TX4927_SIO0_SIRFIFO0_RXD BM_00_07
398#define TX4927_SIO0_SIRFIFO0 0xf320 398#define TX4927_SIO0_SIRFIFO0 0xf320
399#define TX4927_SIO0_LIMIT 0xf3ff 399#define TX4927_SIO0_LIMIT 0xf3ff
400 400
401 401
402/* TX4927 serial port 1 (32-bit registers) */ 402/* TX4927 serial port 1 (32-bit registers) */
403#define TX4927_SIO1_BASE 0xf400 403#define TX4927_SIO1_BASE 0xf400
404#define TX4927_SIO1_SILCR1 0xf400 404#define TX4927_SIO1_SILCR1 0xf400
405#define TX4927_SIO1_SIDICR1 0xf404 405#define TX4927_SIO1_SIDICR1 0xf404
406#define TX4927_SIO1_SIDISR1 0xf408 406#define TX4927_SIO1_SIDISR1 0xf408
407#define TX4927_SIO1_SISCISR1 0xf40c 407#define TX4927_SIO1_SISCISR1 0xf40c
408#define TX4927_SIO1_SIFCR1 0xf410 408#define TX4927_SIO1_SIFCR1 0xf410
409#define TX4927_SIO1_SIFLCR1 0xf414 409#define TX4927_SIO1_SIFLCR1 0xf414
410#define TX4927_SIO1_SIBGR1 0xf418 410#define TX4927_SIO1_SIBGR1 0xf418
411#define TX4927_SIO1_SITFIF01 0xf41c 411#define TX4927_SIO1_SITFIF01 0xf41c
412#define TX4927_SIO1_SIRFIFO1 0xf420 412#define TX4927_SIO1_SIRFIFO1 0xf420
413#define TX4927_SIO1_LIMIT 0xf4ff 413#define TX4927_SIO1_LIMIT 0xf4ff
414 414
415 415
416/* TX4927 parallel port (32-bit registers) */ 416/* TX4927 parallel port (32-bit registers) */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index 170433492246..165f6b8b217f 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2000-2001 Toshiba Corporation 6 * Copyright (C) 2000-2001 Toshiba Corporation
7 */ 7 */
8#ifndef __ASM_TX4927_TX4927_PCI_H 8#ifndef __ASM_TX4927_TX4927_PCI_H
9#define __ASM_TX4927_TX4927_PCI_H 9#define __ASM_TX4927_TX4927_PCI_H
10 10
11#define TX4927_CCFG_TOE 0x00004000 11#define TX4927_CCFG_TOE 0x00004000
12 12
diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h
index d2f0c76b00a9..421b3aea14cc 100644
--- a/include/asm-mips/types.h
+++ b/include/asm-mips/types.h
@@ -78,7 +78,7 @@ typedef unsigned long long u64;
78#endif 78#endif
79 79
80#if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \ 80#if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \
81 || defined(CONFIG_MIPS64) 81 || defined(CONFIG_64BIT)
82typedef u64 dma_addr_t; 82typedef u64 dma_addr_t;
83#else 83#else
84typedef u32 dma_addr_t; 84typedef u32 dma_addr_t;
@@ -99,8 +99,6 @@ typedef u64 sector_t;
99#define HAVE_SECTOR_T 99#define HAVE_SECTOR_T
100#endif 100#endif
101 101
102typedef unsigned short kmem_bufctl_t;
103
104#endif /* __ASSEMBLY__ */ 102#endif /* __ASSEMBLY__ */
105 103
106#endif /* __KERNEL__ */ 104#endif /* __KERNEL__ */
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 07114898e065..a543ead72ecf 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -22,7 +22,7 @@
22 * 22 *
23 * For historical reasons, these macros are grossly misnamed. 23 * For historical reasons, these macros are grossly misnamed.
24 */ 24 */
25#ifdef CONFIG_MIPS32 25#ifdef CONFIG_32BIT
26 26
27#define __UA_LIMIT 0x80000000UL 27#define __UA_LIMIT 0x80000000UL
28 28
@@ -32,9 +32,9 @@
32#define __UA_t0 "$8" 32#define __UA_t0 "$8"
33#define __UA_t1 "$9" 33#define __UA_t1 "$9"
34 34
35#endif /* CONFIG_MIPS32 */ 35#endif /* CONFIG_32BIT */
36 36
37#ifdef CONFIG_MIPS64 37#ifdef CONFIG_64BIT
38 38
39#define __UA_LIMIT (- TASK_SIZE) 39#define __UA_LIMIT (- TASK_SIZE)
40 40
@@ -44,7 +44,7 @@
44#define __UA_t0 "$12" 44#define __UA_t0 "$12"
45#define __UA_t1 "$13" 45#define __UA_t1 "$13"
46 46
47#endif /* CONFIG_MIPS64 */ 47#endif /* CONFIG_64BIT */
48 48
49/* 49/*
50 * USER_DS is a bitmask that has the bits set that may not be set in a valid 50 * USER_DS is a bitmask that has the bits set that may not be set in a valid
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 6d21cc964f76..ad4d48056307 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -1124,7 +1124,7 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
1124# ifndef __mips64 1124# ifndef __mips64
1125# define __ARCH_WANT_STAT64 1125# define __ARCH_WANT_STAT64
1126# endif 1126# endif
1127# ifdef CONFIG_MIPS32 1127# ifdef CONFIG_32BIT
1128# define __ARCH_WANT_SYS_TIME 1128# define __ARCH_WANT_SYS_TIME
1129# endif 1129# endif
1130# ifdef CONFIG_MIPS32_O32 1130# ifdef CONFIG_MIPS32_O32
diff --git a/include/asm-mips/vr4181/irq.h b/include/asm-mips/vr4181/irq.h
deleted file mode 100644
index 4bf0ea970ed0..000000000000
--- a/include/asm-mips/vr4181/irq.h
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * Macros for vr4181 IRQ numbers.
3 *
4 * Copyright (C) 2001 MontaVista Software Inc.
5 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14/*
15 * Strategy:
16 *
17 * Vr4181 has conceptually three levels of interrupt controllers:
18 * 1. the CPU itself with 8 intr level.
19 * 2. system interrupt controller, cascaded from int0 pin in CPU, 32 intrs
20 * 3. GPIO interrupts : forwarding external interrupts to sys intr controller
21 */
22
23/* decide the irq block assignment */
24#define VR4181_NUM_CPU_IRQ 8
25#define VR4181_NUM_SYS_IRQ 32
26#define VR4181_NUM_GPIO_IRQ 16
27
28#define VR4181_IRQ_BASE 0
29
30#define VR4181_CPU_IRQ_BASE VR4181_IRQ_BASE
31#define VR4181_SYS_IRQ_BASE (VR4181_CPU_IRQ_BASE + VR4181_NUM_CPU_IRQ)
32#define VR4181_GPIO_IRQ_BASE (VR4181_SYS_IRQ_BASE + VR4181_NUM_SYS_IRQ)
33
34/* CPU interrupts */
35
36/*
37 IP0 - Software interrupt
38 IP1 - Software interrupt
39 IP2 - All but battery, high speed modem, and real time clock
40 IP3 - RTC Long1 (system timer)
41 IP4 - RTC Long2
42 IP5 - High Speed Modem (unused on VR4181)
43 IP6 - Unused
44 IP7 - Timer interrupt from CPO_COMPARE
45*/
46
47#define VR4181_IRQ_SW1 (VR4181_CPU_IRQ_BASE + 0)
48#define VR4181_IRQ_SW2 (VR4181_CPU_IRQ_BASE + 1)
49#define VR4181_IRQ_INT0 (VR4181_CPU_IRQ_BASE + 2)
50#define VR4181_IRQ_INT1 (VR4181_CPU_IRQ_BASE + 3)
51#define VR4181_IRQ_INT2 (VR4181_CPU_IRQ_BASE + 4)
52#define VR4181_IRQ_INT3 (VR4181_CPU_IRQ_BASE + 5)
53#define VR4181_IRQ_INT4 (VR4181_CPU_IRQ_BASE + 6)
54#define VR4181_IRQ_TIMER (VR4181_CPU_IRQ_BASE + 7)
55
56
57/* Cascaded from VR4181_IRQ_INT0 (ICU mapped interrupts) */
58
59/*
60 IP2 - same as VR4181_IRQ_INT1
61 IP8 - This is a cascade to GPIO IRQ's. Do not use.
62 IP16 - same as VR4181_IRQ_INT2
63 IP18 - CompactFlash
64*/
65
66#define VR4181_IRQ_BATTERY (VR4181_SYS_IRQ_BASE + 0)
67#define VR4181_IRQ_POWER (VR4181_SYS_IRQ_BASE + 1)
68#define VR4181_IRQ_RTCL1 (VR4181_SYS_IRQ_BASE + 2)
69#define VR4181_IRQ_ETIMER (VR4181_SYS_IRQ_BASE + 3)
70#define VR4181_IRQ_RFU12 (VR4181_SYS_IRQ_BASE + 4)
71#define VR4181_IRQ_PIU (VR4181_SYS_IRQ_BASE + 5)
72#define VR4181_IRQ_AIU (VR4181_SYS_IRQ_BASE + 6)
73#define VR4181_IRQ_KIU (VR4181_SYS_IRQ_BASE + 7)
74#define VR4181_IRQ_GIU (VR4181_SYS_IRQ_BASE + 8)
75#define VR4181_IRQ_SIU (VR4181_SYS_IRQ_BASE + 9)
76#define VR4181_IRQ_RFU18 (VR4181_SYS_IRQ_BASE + 10)
77#define VR4181_IRQ_SOFT (VR4181_SYS_IRQ_BASE + 11)
78#define VR4181_IRQ_RFU20 (VR4181_SYS_IRQ_BASE + 12)
79#define VR4181_IRQ_DOZEPIU (VR4181_SYS_IRQ_BASE + 13)
80#define VR4181_IRQ_RFU22 (VR4181_SYS_IRQ_BASE + 14)
81#define VR4181_IRQ_RFU23 (VR4181_SYS_IRQ_BASE + 15)
82#define VR4181_IRQ_RTCL2 (VR4181_SYS_IRQ_BASE + 16)
83#define VR4181_IRQ_LED (VR4181_SYS_IRQ_BASE + 17)
84#define VR4181_IRQ_ECU (VR4181_SYS_IRQ_BASE + 18)
85#define VR4181_IRQ_CSU (VR4181_SYS_IRQ_BASE + 19)
86#define VR4181_IRQ_USB (VR4181_SYS_IRQ_BASE + 20)
87#define VR4181_IRQ_DMA (VR4181_SYS_IRQ_BASE + 21)
88#define VR4181_IRQ_LCD (VR4181_SYS_IRQ_BASE + 22)
89#define VR4181_IRQ_RFU31 (VR4181_SYS_IRQ_BASE + 23)
90#define VR4181_IRQ_RFU32 (VR4181_SYS_IRQ_BASE + 24)
91#define VR4181_IRQ_RFU33 (VR4181_SYS_IRQ_BASE + 25)
92#define VR4181_IRQ_RFU34 (VR4181_SYS_IRQ_BASE + 26)
93#define VR4181_IRQ_RFU35 (VR4181_SYS_IRQ_BASE + 27)
94#define VR4181_IRQ_RFU36 (VR4181_SYS_IRQ_BASE + 28)
95#define VR4181_IRQ_RFU37 (VR4181_SYS_IRQ_BASE + 29)
96#define VR4181_IRQ_RFU38 (VR4181_SYS_IRQ_BASE + 30)
97#define VR4181_IRQ_RFU39 (VR4181_SYS_IRQ_BASE + 31)
98
99/* Cascaded from VR4181_IRQ_GIU */
100#define VR4181_IRQ_GPIO0 (VR4181_GPIO_IRQ_BASE + 0)
101#define VR4181_IRQ_GPIO1 (VR4181_GPIO_IRQ_BASE + 1)
102#define VR4181_IRQ_GPIO2 (VR4181_GPIO_IRQ_BASE + 2)
103#define VR4181_IRQ_GPIO3 (VR4181_GPIO_IRQ_BASE + 3)
104#define VR4181_IRQ_GPIO4 (VR4181_GPIO_IRQ_BASE + 4)
105#define VR4181_IRQ_GPIO5 (VR4181_GPIO_IRQ_BASE + 5)
106#define VR4181_IRQ_GPIO6 (VR4181_GPIO_IRQ_BASE + 6)
107#define VR4181_IRQ_GPIO7 (VR4181_GPIO_IRQ_BASE + 7)
108#define VR4181_IRQ_GPIO8 (VR4181_GPIO_IRQ_BASE + 8)
109#define VR4181_IRQ_GPIO9 (VR4181_GPIO_IRQ_BASE + 9)
110#define VR4181_IRQ_GPIO10 (VR4181_GPIO_IRQ_BASE + 10)
111#define VR4181_IRQ_GPIO11 (VR4181_GPIO_IRQ_BASE + 11)
112#define VR4181_IRQ_GPIO12 (VR4181_GPIO_IRQ_BASE + 12)
113#define VR4181_IRQ_GPIO13 (VR4181_GPIO_IRQ_BASE + 13)
114#define VR4181_IRQ_GPIO14 (VR4181_GPIO_IRQ_BASE + 14)
115#define VR4181_IRQ_GPIO15 (VR4181_GPIO_IRQ_BASE + 15)
116
117
118// Alternative to above GPIO IRQ defines
119#define VR4181_IRQ_GPIO(pin) ((VR4181_IRQ_GPIO0) + (pin))
120
121#define VR4181_IRQ_MAX (VR4181_IRQ_BASE + VR4181_NUM_CPU_IRQ + \
122 VR4181_NUM_SYS_IRQ + VR4181_NUM_GPIO_IRQ)
diff --git a/include/asm-mips/vr4181/vr4181.h b/include/asm-mips/vr4181/vr4181.h
deleted file mode 100644
index 5c5d60741515..000000000000
--- a/include/asm-mips/vr4181/vr4181.h
+++ /dev/null
@@ -1,413 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999 by Michael Klar
7 *
8 * Copyright 2001 MontaVista Software Inc.
9 * Author: jsun@mvista.com or jsun@junsun.net
10 *
11 */
12#ifndef __ASM_VR4181_VR4181_H
13#define __ASM_VR4181_VR4181_H
14
15#include <asm/addrspace.h>
16
17#include <asm/vr4181/irq.h>
18
19#ifndef __ASSEMBLY__
20#define __preg8 (volatile unsigned char*)
21#define __preg16 (volatile unsigned short*)
22#define __preg32 (volatile unsigned int*)
23#else
24#define __preg8
25#define __preg16
26#define __preg32
27#endif
28
29// Embedded CPU peripheral registers
30// Note that many of the registers have different physical address for VR4181
31
32// Bus Control Unit (BCU)
33#define VR4181_BCUCNTREG1 __preg16(KSEG1 + 0x0A000000) /* BCU control register 1 (R/W) */
34#define VR4181_CMUCLKMSK __preg16(KSEG1 + 0x0A000004) /* Clock mask register (R/W) */
35#define VR4181_CMUCLKMSK_MSKCSUPCLK 0x0040
36#define VR4181_CMUCLKMSK_MSKAIUPCLK 0x0020
37#define VR4181_CMUCLKMSK_MSKPIUPCLK 0x0010
38#define VR4181_CMUCLKMSK_MSKADUPCLK 0x0008
39#define VR4181_CMUCLKMSK_MSKSIU18M 0x0004
40#define VR4181_CMUCLKMSK_MSKADU18M 0x0002
41#define VR4181_CMUCLKMSK_MSKUSB 0x0001
42#define VR4181_CMUCLKMSK_MSKSIU VR4181_CMUCLKMSK_MSKSIU18M
43#define VR4181_BCUSPEEDREG __preg16(KSEG1 + 0x0A00000C) /* BCU access time parameter (R/W) */
44#define VR4181_BCURFCNTREG __preg16(KSEG1 + 0x0A000010) /* BCU refresh control register (R/W) */
45#define VR4181_REVIDREG __preg16(KSEG1 + 0x0A000014) /* Revision ID register (R) */
46#define VR4181_CLKSPEEDREG __preg16(KSEG1 + 0x0A000018) /* Clock speed register (R) */
47#define VR4181_EDOMCYTREG __preg16(KSEG1 + 0x0A000300) /* Memory cycle timing register (R/W) */
48#define VR4181_MEMCFG_REG __preg16(KSEG1 + 0x0A000304) /* Memory configuration register (R/W) */
49#define VR4181_MODE_REG __preg16(KSEG1 + 0x0A000308) /* SDRAM mode register (R/W) */
50#define VR4181_SDTIMINGREG __preg16(KSEG1 + 0x0A00030C) /* SDRAM timing register (R/W) */
51
52// DMA Control Unit (DCU)
53#define VR4181_MICDEST1REG1 __preg16(KSEG1 + 0x0A000020) /* Microphone destination 1 address register 1 (R/W) */
54#define VR4181_MICDEST1REG2 __preg16(KSEG1 + 0x0A000022) /* Microphone destination 1 address register 2 (R/W) */
55#define VR4181_MICDEST2REG1 __preg16(KSEG1 + 0x0A000024) /* Microphone destination 2 address register 1 (R/W) */
56#define VR4181_MICDEST2REG2 __preg16(KSEG1 + 0x0A000026) /* Microphone destination 2 address register 2 (R/W) */
57#define VR4181_SPKRRC1REG1 __preg16(KSEG1 + 0x0A000028) /* Speaker Source 1 address register 1 (R/W) */
58#define VR4181_SPKRRC1REG2 __preg16(KSEG1 + 0x0A00002A) /* Speaker Source 1 address register 2 (R/W) */
59#define VR4181_SPKRRC2REG1 __preg16(KSEG1 + 0x0A00002C) /* Speaker Source 2 address register 1 (R/W) */
60#define VR4181_SPKRRC2REG2 __preg16(KSEG1 + 0x0A00002E) /* Speaker Source 2 address register 2 (R/W) */
61#define VR4181_DMARSTREG __preg16(KSEG1 + 0x0A000040) /* DMA Reset register (R/W) */
62#define VR4181_AIUDMAMSKREG __preg16(KSEG1 + 0x0A000046) /* Audio DMA mask register (R/W) */
63#define VR4181_USBDMAMSKREG __preg16(KSEG1 + 0x0A000600) /* USB DMA Mask register (R/W) */
64#define VR4181_USBRXS1AREG1 __preg16(KSEG1 + 0x0A000602) /* USB Rx source 1 address register 1 (R/W) */
65#define VR4181_USBRXS1AREG2 __preg16(KSEG1 + 0x0A000604) /* USB Rx source 1 address register 2 (R/W) */
66#define VR4181_USBRXS2AREG1 __preg16(KSEG1 + 0x0A000606) /* USB Rx source 2 address register 1 (R/W) */
67#define VR4181_USBRXS2AREG2 __preg16(KSEG1 + 0x0A000608) /* USB Rx source 2 address register 2 (R/W) */
68#define VR4181_USBTXS1AREG1 __preg16(KSEG1 + 0x0A00060A) /* USB Tx source 1 address register 1 (R/W) */
69#define VR4181_USBTXS1AREG2 __preg16(KSEG1 + 0x0A00060C) /* USB Tx source 1 address register 2 (R/W) */
70#define VR4181_USBTXS2AREG1 __preg16(KSEG1 + 0x0A00060E) /* USB Tx source 2 address register 1 (R/W) */
71#define VR4181_USBTXS2AREG2 __preg16(KSEG1 + 0x0A000610) /* USB Tx source 2 address register 2 (R/W) */
72#define VR4181_USBRXD1AREG1 __preg16(KSEG1 + 0x0A00062A) /* USB Rx destination 1 address register 1 (R/W) */
73#define VR4181_USBRXD1AREG2 __preg16(KSEG1 + 0x0A00062C) /* USB Rx destination 1 address register 2 (R/W) */
74#define VR4181_USBRXD2AREG1 __preg16(KSEG1 + 0x0A00062E) /* USB Rx destination 2 address register 1 (R/W) */
75#define VR4181_USBRXD2AREG2 __preg16(KSEG1 + 0x0A000630) /* USB Rx destination 2 address register 2 (R/W) */
76#define VR4181_USBTXD1AREG1 __preg16(KSEG1 + 0x0A000632) /* USB Tx destination 1 address register 1 (R/W) */
77#define VR4181_USBTXD1AREG2 __preg16(KSEG1 + 0x0A000634) /* USB Tx destination 1 address register 2 (R/W) */
78#define VR4181_USBTXD2AREG1 __preg16(KSEG1 + 0x0A000636) /* USB Tx destination 2 address register 1 (R/W) */
79#define VR4181_USBTXD2AREG2 __preg16(KSEG1 + 0x0A000638) /* USB Tx destination 2 address register 2 (R/W) */
80#define VR4181_RxRCLENREG __preg16(KSEG1 + 0x0A000652) /* USB Rx record length register (R/W) */
81#define VR4181_TxRCLENREG __preg16(KSEG1 + 0x0A000654) /* USB Tx record length register (R/W) */
82#define VR4181_MICRCLENREG __preg16(KSEG1 + 0x0A000658) /* Microphone record length register (R/W) */
83#define VR4181_SPKRCLENREG __preg16(KSEG1 + 0x0A00065A) /* Speaker record length register (R/W) */
84#define VR4181_USBCFGREG __preg16(KSEG1 + 0x0A00065C) /* USB configuration register (R/W) */
85#define VR4181_MICDMACFGREG __preg16(KSEG1 + 0x0A00065E) /* Microphone DMA configuration register (R/W) */
86#define VR4181_SPKDMACFGREG __preg16(KSEG1 + 0x0A000660) /* Speaker DMA configuration register (R/W) */
87#define VR4181_DMAITRQREG __preg16(KSEG1 + 0x0A000662) /* DMA interrupt request register (R/W) */
88#define VR4181_DMACLTREG __preg16(KSEG1 + 0x0A000664) /* DMA control register (R/W) */
89#define VR4181_DMAITMKREG __preg16(KSEG1 + 0x0A000666) /* DMA interrupt mask register (R/W) */
90
91// ISA Bridge
92#define VR4181_ISABRGCTL __preg16(KSEG1 + 0x0B0002C0) /* ISA Bridge Control Register (R/W) */
93#define VR4181_ISABRGSTS __preg16(KSEG1 + 0x0B0002C2) /* ISA Bridge Status Register (R/W) */
94#define VR4181_XISACTL __preg16(KSEG1 + 0x0B0002C4) /* External ISA Control Register (R/W) */
95
96// Clocked Serial Interface (CSI)
97#define VR4181_CSIMODE __preg16(KSEG1 + 0x0B000900) /* CSI Mode Register (R/W) */
98#define VR4181_CSIRXDATA __preg16(KSEG1 + 0x0B000902) /* CSI Receive Data Register (R) */
99#define VR4181_CSITXDATA __preg16(KSEG1 + 0x0B000904) /* CSI Transmit Data Register (R/W) */
100#define VR4181_CSILSTAT __preg16(KSEG1 + 0x0B000906) /* CSI Line Status Register (R/W) */
101#define VR4181_CSIINTMSK __preg16(KSEG1 + 0x0B000908) /* CSI Interrupt Mask Register (R/W) */
102#define VR4181_CSIINTSTAT __preg16(KSEG1 + 0x0B00090a) /* CSI Interrupt Status Register (R/W) */
103#define VR4181_CSITXBLEN __preg16(KSEG1 + 0x0B00090c) /* CSI Transmit Burst Length Register (R/W) */
104#define VR4181_CSIRXBLEN __preg16(KSEG1 + 0x0B00090e) /* CSI Receive Burst Length Register (R/W) */
105
106// Interrupt Control Unit (ICU)
107#define VR4181_SYSINT1REG __preg16(KSEG1 + 0x0A000080) /* Level 1 System interrupt register 1 (R) */
108#define VR4181_MSYSINT1REG __preg16(KSEG1 + 0x0A00008C) /* Level 1 mask system interrupt register 1 (R/W) */
109#define VR4181_NMIREG __preg16(KSEG1 + 0x0A000098) /* NMI register (R/W) */
110#define VR4181_SOFTINTREG __preg16(KSEG1 + 0x0A00009A) /* Software interrupt register (R/W) */
111#define VR4181_SYSINT2REG __preg16(KSEG1 + 0x0A000200) /* Level 1 System interrupt register 2 (R) */
112#define VR4181_MSYSINT2REG __preg16(KSEG1 + 0x0A000206) /* Level 1 mask system interrupt register 2 (R/W) */
113#define VR4181_PIUINTREGro __preg16(KSEG1 + 0x0B000082) /* Level 2 PIU interrupt register (R) */
114#define VR4181_AIUINTREG __preg16(KSEG1 + 0x0B000084) /* Level 2 AIU interrupt register (R) */
115#define VR4181_MPIUINTREG __preg16(KSEG1 + 0x0B00008E) /* Level 2 mask PIU interrupt register (R/W) */
116#define VR4181_MAIUINTREG __preg16(KSEG1 + 0x0B000090) /* Level 2 mask AIU interrupt register (R/W) */
117#define VR4181_MKIUINTREG __preg16(KSEG1 + 0x0B000092) /* Level 2 mask KIU interrupt register (R/W) */
118#define VR4181_KIUINTREG __preg16(KSEG1 + 0x0B000198) /* Level 2 KIU interrupt register (R) */
119
120// Power Management Unit (PMU)
121#define VR4181_PMUINTREG __preg16(KSEG1 + 0x0B0000A0) /* PMU Status Register (R/W) */
122#define VR4181_PMUINT_POWERSW 0x1 /* Power switch */
123#define VR4181_PMUINT_BATT 0x2 /* Low batt during normal operation */
124#define VR4181_PMUINT_DEADMAN 0x4 /* Deadman's switch */
125#define VR4181_PMUINT_RESET 0x8 /* Reset switch */
126#define VR4181_PMUINT_RTCRESET 0x10 /* RTC Reset */
127#define VR4181_PMUINT_TIMEOUT 0x20 /* HAL Timer Reset */
128#define VR4181_PMUINT_BATTLOW 0x100 /* Battery low */
129#define VR4181_PMUINT_RTC 0x200 /* RTC Alarm */
130#define VR4181_PMUINT_DCD 0x400 /* DCD# */
131#define VR4181_PMUINT_GPIO0 0x1000 /* GPIO0 */
132#define VR4181_PMUINT_GPIO1 0x2000 /* GPIO1 */
133#define VR4181_PMUINT_GPIO2 0x4000 /* GPIO2 */
134#define VR4181_PMUINT_GPIO3 0x8000 /* GPIO3 */
135
136#define VR4181_PMUCNTREG __preg16(KSEG1 + 0x0B0000A2) /* PMU Control Register (R/W) */
137#define VR4181_PMUWAITREG __preg16(KSEG1 + 0x0B0000A8) /* PMU Wait Counter Register (R/W) */
138#define VR4181_PMUDIVREG __preg16(KSEG1 + 0x0B0000AC) /* PMU Divide Mode Register (R/W) */
139#define VR4181_DRAMHIBCTL __preg16(KSEG1 + 0x0B0000B2) /* DRAM Hibernate Control Register (R/W) */
140
141// Real Time Clock Unit (RTC)
142#define VR4181_ETIMELREG __preg16(KSEG1 + 0x0B0000C0) /* Elapsed Time L Register (R/W) */
143#define VR4181_ETIMEMREG __preg16(KSEG1 + 0x0B0000C2) /* Elapsed Time M Register (R/W) */
144#define VR4181_ETIMEHREG __preg16(KSEG1 + 0x0B0000C4) /* Elapsed Time H Register (R/W) */
145#define VR4181_ECMPLREG __preg16(KSEG1 + 0x0B0000C8) /* Elapsed Compare L Register (R/W) */
146#define VR4181_ECMPMREG __preg16(KSEG1 + 0x0B0000CA) /* Elapsed Compare M Register (R/W) */
147#define VR4181_ECMPHREG __preg16(KSEG1 + 0x0B0000CC) /* Elapsed Compare H Register (R/W) */
148#define VR4181_RTCL1LREG __preg16(KSEG1 + 0x0B0000D0) /* RTC Long 1 L Register (R/W) */
149#define VR4181_RTCL1HREG __preg16(KSEG1 + 0x0B0000D2) /* RTC Long 1 H Register (R/W) */
150#define VR4181_RTCL1CNTLREG __preg16(KSEG1 + 0x0B0000D4) /* RTC Long 1 Count L Register (R) */
151#define VR4181_RTCL1CNTHREG __preg16(KSEG1 + 0x0B0000D6) /* RTC Long 1 Count H Register (R) */
152#define VR4181_RTCL2LREG __preg16(KSEG1 + 0x0B0000D8) /* RTC Long 2 L Register (R/W) */
153#define VR4181_RTCL2HREG __preg16(KSEG1 + 0x0B0000DA) /* RTC Long 2 H Register (R/W) */
154#define VR4181_RTCL2CNTLREG __preg16(KSEG1 + 0x0B0000DC) /* RTC Long 2 Count L Register (R) */
155#define VR4181_RTCL2CNTHREG __preg16(KSEG1 + 0x0B0000DE) /* RTC Long 2 Count H Register (R) */
156#define VR4181_RTCINTREG __preg16(KSEG1 + 0x0B0001DE) /* RTC Interrupt Register (R/W) */
157
158// Deadman's Switch Unit (DSU)
159#define VR4181_DSUCNTREG __preg16(KSEG1 + 0x0B0000E0) /* DSU Control Register (R/W) */
160#define VR4181_DSUSETREG __preg16(KSEG1 + 0x0B0000E2) /* DSU Dead Time Set Register (R/W) */
161#define VR4181_DSUCLRREG __preg16(KSEG1 + 0x0B0000E4) /* DSU Clear Register (W) */
162#define VR4181_DSUTIMREG __preg16(KSEG1 + 0x0B0000E6) /* DSU Elapsed Time Register (R/W) */
163
164// General Purpose I/O Unit (GIU)
165#define VR4181_GPMD0REG __preg16(KSEG1 + 0x0B000300) /* GPIO Mode 0 Register (R/W) */
166#define VR4181_GPMD1REG __preg16(KSEG1 + 0x0B000302) /* GPIO Mode 1 Register (R/W) */
167#define VR4181_GPMD2REG __preg16(KSEG1 + 0x0B000304) /* GPIO Mode 2 Register (R/W) */
168#define VR4181_GPMD3REG __preg16(KSEG1 + 0x0B000306) /* GPIO Mode 3 Register (R/W) */
169#define VR4181_GPDATHREG __preg16(KSEG1 + 0x0B000308) /* GPIO Data High Register (R/W) */
170#define VR4181_GPDATHREG_GPIO16 0x0001
171#define VR4181_GPDATHREG_GPIO17 0x0002
172#define VR4181_GPDATHREG_GPIO18 0x0004
173#define VR4181_GPDATHREG_GPIO19 0x0008
174#define VR4181_GPDATHREG_GPIO20 0x0010
175#define VR4181_GPDATHREG_GPIO21 0x0020
176#define VR4181_GPDATHREG_GPIO22 0x0040
177#define VR4181_GPDATHREG_GPIO23 0x0080
178#define VR4181_GPDATHREG_GPIO24 0x0100
179#define VR4181_GPDATHREG_GPIO25 0x0200
180#define VR4181_GPDATHREG_GPIO26 0x0400
181#define VR4181_GPDATHREG_GPIO27 0x0800
182#define VR4181_GPDATHREG_GPIO28 0x1000
183#define VR4181_GPDATHREG_GPIO29 0x2000
184#define VR4181_GPDATHREG_GPIO30 0x4000
185#define VR4181_GPDATHREG_GPIO31 0x8000
186#define VR4181_GPDATLREG __preg16(KSEG1 + 0x0B00030A) /* GPIO Data Low Register (R/W) */
187#define VR4181_GPDATLREG_GPIO0 0x0001
188#define VR4181_GPDATLREG_GPIO1 0x0002
189#define VR4181_GPDATLREG_GPIO2 0x0004
190#define VR4181_GPDATLREG_GPIO3 0x0008
191#define VR4181_GPDATLREG_GPIO4 0x0010
192#define VR4181_GPDATLREG_GPIO5 0x0020
193#define VR4181_GPDATLREG_GPIO6 0x0040
194#define VR4181_GPDATLREG_GPIO7 0x0080
195#define VR4181_GPDATLREG_GPIO8 0x0100
196#define VR4181_GPDATLREG_GPIO9 0x0200
197#define VR4181_GPDATLREG_GPIO10 0x0400
198#define VR4181_GPDATLREG_GPIO11 0x0800
199#define VR4181_GPDATLREG_GPIO12 0x1000
200#define VR4181_GPDATLREG_GPIO13 0x2000
201#define VR4181_GPDATLREG_GPIO14 0x4000
202#define VR4181_GPDATLREG_GPIO15 0x8000
203#define VR4181_GPINTEN __preg16(KSEG1 + 0x0B00030C) /* GPIO Interrupt Enable Register (R/W) */
204#define VR4181_GPINTMSK __preg16(KSEG1 + 0x0B00030E) /* GPIO Interrupt Mask Register (R/W) */
205#define VR4181_GPINTTYPH __preg16(KSEG1 + 0x0B000310) /* GPIO Interrupt Type High Register (R/W) */
206#define VR4181_GPINTTYPL __preg16(KSEG1 + 0x0B000312) /* GPIO Interrupt Type Low Register (R/W) */
207#define VR4181_GPINTSTAT __preg16(KSEG1 + 0x0B000314) /* GPIO Interrupt Status Register (R/W) */
208#define VR4181_GPHIBSTH __preg16(KSEG1 + 0x0B000316) /* GPIO Hibernate Pin State High Register (R/W) */
209#define VR4181_GPHIBSTL __preg16(KSEG1 + 0x0B000318) /* GPIO Hibernate Pin State Low Register (R/W) */
210#define VR4181_GPSICTL __preg16(KSEG1 + 0x0B00031A) /* GPIO Serial Interface Control Register (R/W) */
211#define VR4181_KEYEN __preg16(KSEG1 + 0x0B00031C) /* Keyboard Scan Pin Enable Register (R/W) */
212#define VR4181_PCS0STRA __preg16(KSEG1 + 0x0B000320) /* Programmable Chip Select [0] Start Address Register (R/W) */
213#define VR4181_PCS0STPA __preg16(KSEG1 + 0x0B000322) /* Programmable Chip Select [0] Stop Address Register (R/W) */
214#define VR4181_PCS0HIA __preg16(KSEG1 + 0x0B000324) /* Programmable Chip Select [0] High Address Register (R/W) */
215#define VR4181_PCS1STRA __preg16(KSEG1 + 0x0B000326) /* Programmable Chip Select [1] Start Address Register (R/W) */
216#define VR4181_PCS1STPA __preg16(KSEG1 + 0x0B000328) /* Programmable Chip Select [1] Stop Address Register (R/W) */
217#define VR4181_PCS1HIA __preg16(KSEG1 + 0x0B00032A) /* Programmable Chip Select [1] High Address Register (R/W) */
218#define VR4181_PCSMODE __preg16(KSEG1 + 0x0B00032C) /* Programmable Chip Select Mode Register (R/W) */
219#define VR4181_LCDGPMODE __preg16(KSEG1 + 0x0B00032E) /* LCD General Purpose Mode Register (R/W) */
220#define VR4181_MISCREG0 __preg16(KSEG1 + 0x0B000330) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
221#define VR4181_MISCREG1 __preg16(KSEG1 + 0x0B000332) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
222#define VR4181_MISCREG2 __preg16(KSEG1 + 0x0B000334) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
223#define VR4181_MISCREG3 __preg16(KSEG1 + 0x0B000336) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
224#define VR4181_MISCREG4 __preg16(KSEG1 + 0x0B000338) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
225#define VR4181_MISCREG5 __preg16(KSEG1 + 0x0B00033A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
226#define VR4181_MISCREG6 __preg16(KSEG1 + 0x0B00033C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
227#define VR4181_MISCREG7 __preg16(KSEG1 + 0x0B00033D) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
228#define VR4181_MISCREG8 __preg16(KSEG1 + 0x0B000340) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
229#define VR4181_MISCREG9 __preg16(KSEG1 + 0x0B000342) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
230#define VR4181_MISCREG10 __preg16(KSEG1 + 0x0B000344) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
231#define VR4181_MISCREG11 __preg16(KSEG1 + 0x0B000346) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
232#define VR4181_MISCREG12 __preg16(KSEG1 + 0x0B000348) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
233#define VR4181_MISCREG13 __preg16(KSEG1 + 0x0B00034A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
234#define VR4181_MISCREG14 __preg16(KSEG1 + 0x0B00034C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
235#define VR4181_MISCREG15 __preg16(KSEG1 + 0x0B00034E) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
236#define VR4181_SECIRQMASKL VR4181_GPINTEN
237// No SECIRQMASKH for VR4181
238
239// Touch Panel Interface Unit (PIU)
240#define VR4181_PIUCNTREG __preg16(KSEG1 + 0x0B000122) /* PIU Control register (R/W) */
241#define VR4181_PIUCNTREG_PIUSEQEN 0x0004
242#define VR4181_PIUCNTREG_PIUPWR 0x0002
243#define VR4181_PIUCNTREG_PADRST 0x0001
244
245#define VR4181_PIUINTREG __preg16(KSEG1 + 0x0B000124) /* PIU Interrupt cause register (R/W) */
246#define VR4181_PIUINTREG_OVP 0x8000
247#define VR4181_PIUINTREG_PADCMD 0x0040
248#define VR4181_PIUINTREG_PADADP 0x0020
249#define VR4181_PIUINTREG_PADPAGE1 0x0010
250#define VR4181_PIUINTREG_PADPAGE0 0x0008
251#define VR4181_PIUINTREG_PADDLOST 0x0004
252#define VR4181_PIUINTREG_PENCHG 0x0001
253
254#define VR4181_PIUSIVLREG __preg16(KSEG1 + 0x0B000126) /* PIU Data sampling interval register (R/W) */
255#define VR4181_PIUSTBLREG __preg16(KSEG1 + 0x0B000128) /* PIU A/D converter start delay register (R/W) */
256#define VR4181_PIUCMDREG __preg16(KSEG1 + 0x0B00012A) /* PIU A/D command register (R/W) */
257#define VR4181_PIUASCNREG __preg16(KSEG1 + 0x0B000130) /* PIU A/D port scan register (R/W) */
258#define VR4181_PIUAMSKREG __preg16(KSEG1 + 0x0B000132) /* PIU A/D scan mask register (R/W) */
259#define VR4181_PIUCIVLREG __preg16(KSEG1 + 0x0B00013E) /* PIU Check interval register (R) */
260#define VR4181_PIUPB00REG __preg16(KSEG1 + 0x0B0002A0) /* PIU Page 0 Buffer 0 register (R/W) */
261#define VR4181_PIUPB01REG __preg16(KSEG1 + 0x0B0002A2) /* PIU Page 0 Buffer 1 register (R/W) */
262#define VR4181_PIUPB02REG __preg16(KSEG1 + 0x0B0002A4) /* PIU Page 0 Buffer 2 register (R/W) */
263#define VR4181_PIUPB03REG __preg16(KSEG1 + 0x0B0002A6) /* PIU Page 0 Buffer 3 register (R/W) */
264#define VR4181_PIUPB10REG __preg16(KSEG1 + 0x0B0002A8) /* PIU Page 1 Buffer 0 register (R/W) */
265#define VR4181_PIUPB11REG __preg16(KSEG1 + 0x0B0002AA) /* PIU Page 1 Buffer 1 register (R/W) */
266#define VR4181_PIUPB12REG __preg16(KSEG1 + 0x0B0002AC) /* PIU Page 1 Buffer 2 register (R/W) */
267#define VR4181_PIUPB13REG __preg16(KSEG1 + 0x0B0002AE) /* PIU Page 1 Buffer 3 register (R/W) */
268#define VR4181_PIUAB0REG __preg16(KSEG1 + 0x0B0002B0) /* PIU A/D scan Buffer 0 register (R/W) */
269#define VR4181_PIUAB1REG __preg16(KSEG1 + 0x0B0002B2) /* PIU A/D scan Buffer 1 register (R/W) */
270#define VR4181_PIUAB2REG __preg16(KSEG1 + 0x0B0002B4) /* PIU A/D scan Buffer 2 register (R/W) */
271#define VR4181_PIUAB3REG __preg16(KSEG1 + 0x0B0002B6) /* PIU A/D scan Buffer 3 register (R/W) */
272#define VR4181_PIUPB04REG __preg16(KSEG1 + 0x0B0002BC) /* PIU Page 0 Buffer 4 register (R/W) */
273#define VR4181_PIUPB14REG __preg16(KSEG1 + 0x0B0002BE) /* PIU Page 1 Buffer 4 register (R/W) */
274
275// Audio Interface Unit (AIU)
276#define VR4181_SODATREG __preg16(KSEG1 + 0x0B000166) /* Speaker Output Data Register (R/W) */
277#define VR4181_SCNTREG __preg16(KSEG1 + 0x0B000168) /* Speaker Output Control Register (R/W) */
278#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Mike Input Data Register (R/W) */
279#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Mike Input Control Register (R/W) */
280#define VR4181_DVALIDREG __preg16(KSEG1 + 0x0B000178) /* Data Valid Register (R/W) */
281#define VR4181_SEQREG __preg16(KSEG1 + 0x0B00017A) /* Sequential Register (R/W) */
282#define VR4181_INTREG __preg16(KSEG1 + 0x0B00017C) /* Interrupt Register (R/W) */
283#define VR4181_SDMADATREG __preg16(KSEG1 + 0x0B000160) /* Speaker DMA Data Register (R/W) */
284#define VR4181_MDMADATREG __preg16(KSEG1 + 0x0B000162) /* Microphone DMA Data Register (R/W) */
285#define VR4181_DAVREF_SETUP __preg16(KSEG1 + 0x0B000164) /* DAC Vref setup register (R/W) */
286#define VR4181_SCNVC_END __preg16(KSEG1 + 0x0B00016E) /* Speaker sample rate control (R/W) */
287#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Microphone Input Data Register (R/W) */
288#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Microphone Input Control Register (R/W) */
289#define VR4181_MCNVC_END __preg16(KSEG1 + 0x0B00017E) /* Microphone sample rate control (R/W) */
290
291// Keyboard Interface Unit (KIU)
292#define VR4181_KIUDAT0 __preg16(KSEG1 + 0x0B000180) /* KIU Data0 Register (R/W) */
293#define VR4181_KIUDAT1 __preg16(KSEG1 + 0x0B000182) /* KIU Data1 Register (R/W) */
294#define VR4181_KIUDAT2 __preg16(KSEG1 + 0x0B000184) /* KIU Data2 Register (R/W) */
295#define VR4181_KIUDAT3 __preg16(KSEG1 + 0x0B000186) /* KIU Data3 Register (R/W) */
296#define VR4181_KIUDAT4 __preg16(KSEG1 + 0x0B000188) /* KIU Data4 Register (R/W) */
297#define VR4181_KIUDAT5 __preg16(KSEG1 + 0x0B00018A) /* KIU Data5 Register (R/W) */
298#define VR4181_KIUSCANREP __preg16(KSEG1 + 0x0B000190) /* KIU Scan/Repeat Register (R/W) */
299#define VR4181_KIUSCANREP_KEYEN 0x8000
300#define VR4181_KIUSCANREP_SCANSTP 0x0008
301#define VR4181_KIUSCANREP_SCANSTART 0x0004
302#define VR4181_KIUSCANREP_ATSTP 0x0002
303#define VR4181_KIUSCANREP_ATSCAN 0x0001
304#define VR4181_KIUSCANS __preg16(KSEG1 + 0x0B000192) /* KIU Scan Status Register (R) */
305#define VR4181_KIUWKS __preg16(KSEG1 + 0x0B000194) /* KIU Wait Keyscan Stable Register (R/W) */
306#define VR4181_KIUWKI __preg16(KSEG1 + 0x0B000196) /* KIU Wait Keyscan Interval Register (R/W) */
307#define VR4181_KIUINT __preg16(KSEG1 + 0x0B000198) /* KIU Interrupt Register (R/W) */
308#define VR4181_KIUINT_KDATLOST 0x0004
309#define VR4181_KIUINT_KDATRDY 0x0002
310#define VR4181_KIUINT_SCANINT 0x0001
311#define VR4181_KIUDAT6 __preg16(KSEG1 + 0x0B00018C) /* Scan Line 6 Key Data Register (R) */
312#define VR4181_KIUDAT7 __preg16(KSEG1 + 0x0B00018E) /* Scan Line 7 Key Data Register (R) */
313
314// CompactFlash Controller
315#define VR4181_PCCARDINDEX __preg8(KSEG1 + 0x0B0008E0) /* PC Card Controller Index Register */
316#define VR4181_PCCARDDATA __preg8(KSEG1 + 0x0B0008E1) /* PC Card Controller Data Register */
317#define VR4181_INTSTATREG __preg16(KSEG1 + 0x0B0008F8) /* Interrupt Status Register (R/W) */
318#define VR4181_INTMSKREG __preg16(KSEG1 + 0x0B0008FA) /* Interrupt Mask Register (R/W) */
319#define VR4181_CFG_REG_1 __preg16(KSEG1 + 0x0B0008FE) /* Configuration Register 1 */
320
321// LED Control Unit (LED)
322#define VR4181_LEDHTSREG __preg16(KSEG1 + 0x0B000240) /* LED H Time Set register (R/W) */
323#define VR4181_LEDLTSREG __preg16(KSEG1 + 0x0B000242) /* LED L Time Set register (R/W) */
324#define VR4181_LEDCNTREG __preg16(KSEG1 + 0x0B000248) /* LED Control register (R/W) */
325#define VR4181_LEDASTCREG __preg16(KSEG1 + 0x0B00024A) /* LED Auto Stop Time Count register (R/W) */
326#define VR4181_LEDINTREG __preg16(KSEG1 + 0x0B00024C) /* LED Interrupt register (R/W) */
327
328// Serial Interface Unit (SIU / SIU1 and SIU2)
329#define VR4181_SIURB __preg8(KSEG1 + 0x0C000010) /* Receiver Buffer Register (Read) DLAB = 0 (R) */
330#define VR4181_SIUTH __preg8(KSEG1 + 0x0C000010) /* Transmitter Holding Register (Write) DLAB = 0 (W) */
331#define VR4181_SIUDLL __preg8(KSEG1 + 0x0C000010) /* Divisor Latch (Least Significant Byte) DLAB = 1 (R/W) */
332#define VR4181_SIUIE __preg8(KSEG1 + 0x0C000011) /* Interrupt Enable DLAB = 0 (R/W) */
333#define VR4181_SIUDLM __preg8(KSEG1 + 0x0C000011) /* Divisor Latch (Most Significant Byte) DLAB = 1 (R/W) */
334#define VR4181_SIUIID __preg8(KSEG1 + 0x0C000012) /* Interrupt Identification Register (Read) (R) */
335#define VR4181_SIUFC __preg8(KSEG1 + 0x0C000012) /* FIFO Control Register (Write) (W) */
336#define VR4181_SIULC __preg8(KSEG1 + 0x0C000013) /* Line Control Register (R/W) */
337#define VR4181_SIUMC __preg8(KSEG1 + 0x0C000014) /* MODEM Control Register (R/W) */
338#define VR4181_SIULS __preg8(KSEG1 + 0x0C000015) /* Line Status Register (R/W) */
339#define VR4181_SIUMS __preg8(KSEG1 + 0x0C000016) /* MODEM Status Register (R/W) */
340#define VR4181_SIUSC __preg8(KSEG1 + 0x0C000017) /* Scratch Register (R/W) */
341#define VR4181_SIURESET __preg8(KSEG1 + 0x0C000019) /* SIU Reset Register (R/W) */
342#define VR4181_SIUACTMSK __preg8(KSEG1 + 0x0C00001C) /* SIU Activity Mask (R/W) */
343#define VR4181_SIUACTTMR __preg8(KSEG1 + 0x0C00001E) /* SIU Activity Timer (R/W) */
344#define VR4181_SIURB_2 __preg8(KSEG1 + 0x0C000000) /* Receive Buffer Register (Read) (R) */
345#define VR4181_SIUTH_2 __preg8(KSEG1 + 0x0C000000) /* Transmitter Holding Register (Write) (W) */
346#define VR4181_SIUDLL_2 __preg8(KSEG1 + 0x0C000000) /* Divisor Latch (Least Significant Byte) (R/W) */
347#define VR4181_SIUIE_2 __preg8(KSEG1 + 0x0C000001) /* Interrupt Enable (DLAB = 0) (R/W) */
348#define VR4181_SIUDLM_2 __preg8(KSEG1 + 0x0C000001) /* Divisor Latch (Most Significant Byte) (DLAB = 1) (R/W) */
349#define VR4181_SIUIID_2 __preg8(KSEG1 + 0x0C000002) /* Interrupt Identification Register (Read) (R) */
350#define VR4181_SIUFC_2 __preg8(KSEG1 + 0x0C000002) /* FIFO Control Register (Write) (W) */
351#define VR4181_SIULC_2 __preg8(KSEG1 + 0x0C000003) /* Line Control Register (R/W) */
352#define VR4181_SIUMC_2 __preg8(KSEG1 + 0x0C000004) /* Modem Control Register (R/W) */
353#define VR4181_SIULS_2 __preg8(KSEG1 + 0x0C000005) /* Line Status Register (R/W) */
354#define VR4181_SIUMS_2 __preg8(KSEG1 + 0x0C000006) /* Modem Status Register (R/W) */
355#define VR4181_SIUSC_2 __preg8(KSEG1 + 0x0C000007) /* Scratch Register (R/W) */
356#define VR4181_SIUIRSEL_2 __preg8(KSEG1 + 0x0C000008) /* SIU IrDA Selectot (R/W) */
357#define VR4181_SIURESET_2 __preg8(KSEG1 + 0x0C000009) /* SIU Reset Register (R/W) */
358#define VR4181_SIUCSEL_2 __preg8(KSEG1 + 0x0C00000A) /* IrDA Echo-back Control (R/W) */
359#define VR4181_SIUACTMSK_2 __preg8(KSEG1 + 0x0C00000C) /* SIU Activity Mask Register (R/W) */
360#define VR4181_SIUACTTMR_2 __preg8(KSEG1 + 0x0C00000E) /* SIU Activity Timer Register (R/W) */
361
362
363// USB Module
364#define VR4181_USBINFIFO __preg16(KSEG1 + 0x0B000780) /* USB Bulk Input FIFO (Bulk In End Point) (W) */
365#define VR4181_USBOUTFIFO __preg16(KSEG1 + 0x0B000782) /* USB Bulk Output FIFO (Bulk Out End Point) (R) */
366#define VR4181_USBCTLFIFO __preg16(KSEG1 + 0x0B000784) /* USB Control FIFO (Control End Point) (W) */
367#define VR4181_USBSTAT __preg16(KSEG1 + 0x0B000786) /* Interrupt Status Register (R/W) */
368#define VR4181_USBINTMSK __preg16(KSEG1 + 0x0B000788) /* Interrupt Mask Register (R/W) */
369#define VR4181_USBCTLREG __preg16(KSEG1 + 0x0B00078A) /* Control Register (R/W) */
370#define VR4181_USBSTPREG __preg16(KSEG1 + 0x0B00078C) /* USB Transfer Stop Register (R/W) */
371
372// LCD Controller
373#define VR4181_HRTOTALREG __preg16(KSEG1 + 0x0A000400) /* Horizontal total Register (R/W) */
374#define VR4181_HRVISIBREG __preg16(KSEG1 + 0x0A000402) /* Horizontal Visible Register (R/W) */
375#define VR4181_LDCLKSTREG __preg16(KSEG1 + 0x0A000404) /* Load clock start Register (R/W) */
376#define VR4181_LDCLKNDREG __preg16(KSEG1 + 0x0A000406) /* Load clock end Register (R/W) */
377#define VR4181_VRTOTALREG __preg16(KSEG1 + 0x0A000408) /* Vertical Total Register (R/W) */
378#define VR4181_VRVISIBREG __preg16(KSEG1 + 0x0A00040A) /* Vertical Visible Register (R/W) */
379#define VR4181_FVSTARTREG __preg16(KSEG1 + 0x0A00040C) /* FLM vertical start Register (R/W) */
380#define VR4181_FVENDREG __preg16(KSEG1 + 0x0A00040E) /* FLM vertical end Register (R/W) */
381#define VR4181_LCDCTRLREG __preg16(KSEG1 + 0x0A000410) /* LCD control Register (R/W) */
382#define VR4181_LCDINRQREG __preg16(KSEG1 + 0x0A000412) /* LCD Interrupt request Register (R/W) */
383#define VR4181_LCDCFGREG0 __preg16(KSEG1 + 0x0A000414) /* LCD Configuration Register 0 (R/W) */
384#define VR4181_LCDCFGREG1 __preg16(KSEG1 + 0x0A000416) /* LCD Configuration Register 1 (R/W) */
385#define VR4181_FBSTAD1REG __preg16(KSEG1 + 0x0A000418) /* Frame Buffer Start Address 1 Register (R/W) */
386#define VR4181_FBSTAD2REG __preg16(KSEG1 + 0x0A00041A) /* Frame Buffer Start Address 2 Register (R/W) */
387#define VR4181_FBNDAD1REG __preg16(KSEG1 + 0x0A000420) /* Frame Buffer End Address 1 Register (R/W) */
388#define VR4181_FBNDAD2REG __preg16(KSEG1 + 0x0A000422) /* Frame Buffer End Address 2 register (R/W) */
389#define VR4181_FHSTARTREG __preg16(KSEG1 + 0x0A000424) /* FLM horizontal Start Register (R/W) */
390#define VR4181_FHENDREG __preg16(KSEG1 + 0x0A000426) /* FLM horizontal End Register (R/W) */
391#define VR4181_PWRCONREG1 __preg16(KSEG1 + 0x0A000430) /* Power Control register 1 (R/W) */
392#define VR4181_PWRCONREG2 __preg16(KSEG1 + 0x0A000432) /* Power Control register 2 (R/W) */
393#define VR4181_LCDIMSKREG __preg16(KSEG1 + 0x0A000434) /* LCD Interrupt Mask register (R/W) */
394#define VR4181_CPINDCTREG __preg16(KSEG1 + 0x0A00047E) /* Color palette Index and control Register (R/W) */
395#define VR4181_CPALDATREG __preg32(KSEG1 + 0x0A000480) /* Color palette data register (32bits Register) (R/W) */
396
397// physical address spaces
398#define VR4181_LCD 0x0a000000
399#define VR4181_INTERNAL_IO_2 0x0b000000
400#define VR4181_INTERNAL_IO_1 0x0c000000
401#define VR4181_ISA_MEM 0x10000000
402#define VR4181_ISA_IO 0x14000000
403#define VR4181_ROM 0x18000000
404
405// This is the base address for IO port decoding to which the 16 bit IO port address
406// is added. Defining it to 0 will usually cause a kernel oops any time port IO is
407// attempted, which can be handy for turning up parts of the kernel that make
408// incorrect architecture assumptions (by assuming that everything acts like a PC),
409// but we need it correctly defined to use the PCMCIA/CF controller:
410#define VR4181_PORT_BASE (KSEG1 + VR4181_ISA_IO)
411#define VR4181_ISAMEM_BASE (KSEG1 + VR4181_ISA_MEM)
412
413#endif /* __ASM_VR4181_VR4181_H */
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index 7d41e44463f9..bd2723c30901 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -7,7 +7,7 @@
7 * Copyright (C) 2001, 2002 Paul Mundt 7 * Copyright (C) 2001, 2002 Paul Mundt
8 * Copyright (C) 2002 MontaVista Software, Inc. 8 * Copyright (C) 2002 MontaVista Software, Inc.
9 * Copyright (C) 2002 TimeSys Corp. 9 * Copyright (C) 2002 TimeSys Corp.
10 * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 10 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
@@ -79,11 +79,11 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
79#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) 79#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
80#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) 80#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
81#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) 81#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
82#define INT0_CASCADE_IRQ MIPS_CPU_IRQ(2) 82#define INT0_IRQ MIPS_CPU_IRQ(2)
83#define INT1_CASCADE_IRQ MIPS_CPU_IRQ(3) 83#define INT1_IRQ MIPS_CPU_IRQ(3)
84#define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4) 84#define INT2_IRQ MIPS_CPU_IRQ(4)
85#define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5) 85#define INT3_IRQ MIPS_CPU_IRQ(5)
86#define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6) 86#define INT4_IRQ MIPS_CPU_IRQ(6)
87#define TIMER_IRQ MIPS_CPU_IRQ(7) 87#define TIMER_IRQ MIPS_CPU_IRQ(7)
88 88
89/* SYINT1 Interrupt Numbers */ 89/* SYINT1 Interrupt Numbers */
@@ -97,7 +97,7 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
97#define PIU_IRQ SYSINT1_IRQ(5) 97#define PIU_IRQ SYSINT1_IRQ(5)
98#define AIU_IRQ SYSINT1_IRQ(6) 98#define AIU_IRQ SYSINT1_IRQ(6)
99#define KIU_IRQ SYSINT1_IRQ(7) 99#define KIU_IRQ SYSINT1_IRQ(7)
100#define GIUINT_CASCADE_IRQ SYSINT1_IRQ(8) 100#define GIUINT_IRQ SYSINT1_IRQ(8)
101#define SIU_IRQ SYSINT1_IRQ(9) 101#define SIU_IRQ SYSINT1_IRQ(9)
102#define BUSERR_IRQ SYSINT1_IRQ(10) 102#define BUSERR_IRQ SYSINT1_IRQ(10)
103#define SOFTINT_IRQ SYSINT1_IRQ(11) 103#define SOFTINT_IRQ SYSINT1_IRQ(11)
@@ -128,7 +128,7 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
128#define GIU_IRQ_LAST GIU_IRQ(31) 128#define GIU_IRQ_LAST GIU_IRQ(31)
129 129
130extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); 130extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
131extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); 131extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *));
132 132
133#define PIUINT_COMMAND 0x0040 133#define PIUINT_COMMAND 0x0040
134#define PIUINT_DATA 0x0020 134#define PIUINT_DATA 0x0020
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
index 58e193c51b45..bb7a85c186e4 100644
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ b/include/asm-mips/vr41xx/vrc4173.h
@@ -21,8 +21,8 @@
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */ 23 */
24#ifndef __NEC_VRC4173_H 24#ifndef __NEC_VRC4173_H
25#define __NEC_VRC4173_H 25#define __NEC_VRC4173_H
26 26
27#include <linux/config.h> 27#include <linux/config.h>
28#include <asm/io.h> 28#include <asm/io.h>
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index c4a704121343..04ee53b34c2e 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -113,7 +113,7 @@
113 */ 113 */
114#define BCM1250_M3_WAR 1 114#define BCM1250_M3_WAR 1
115 115
116/* 116/*
117 * This is a DUART workaround related to glitches around register accesses 117 * This is a DUART workaround related to glitches around register accesses
118 */ 118 */
119#define SIBYTE_1956_WAR 1 119#define SIBYTE_1956_WAR 1
@@ -122,7 +122,7 @@
122 122
123/* 123/*
124 * Fill buffers not flushed on CACHE instructions 124 * Fill buffers not flushed on CACHE instructions
125 * 125 *
126 * Hit_Invalidate_I cacheops invalidate an icache line but the refill 126 * Hit_Invalidate_I cacheops invalidate an icache line but the refill
127 * for that line can get stale data from the fill buffer instead of 127 * for that line can get stale data from the fill buffer instead of
128 * accessing memory if the previous icache miss was also to that line. 128 * accessing memory if the previous icache miss was also to that line.
diff --git a/include/asm-mips/xxs1500.h b/include/asm-mips/xxs1500.h
index 75c0ddfeca13..4d84a90b0f20 100644
--- a/include/asm-mips/xxs1500.h
+++ b/include/asm-mips/xxs1500.h
@@ -22,7 +22,7 @@
22 * 22 *
23 * ######################################################################## 23 * ########################################################################
24 * 24 *
25 * 25 *
26 */ 26 */
27#ifndef __ASM_XXS1500_H 27#ifndef __ASM_XXS1500_H
28#define __ASM_XXS1500_H 28#define __ASM_XXS1500_H
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
index 4a12692f94b4..44eae9f8274d 100644
--- a/include/asm-parisc/page.h
+++ b/include/asm-parisc/page.h
@@ -74,20 +74,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
74#define __pgd(x) ((pgd_t) { (x) } ) 74#define __pgd(x) ((pgd_t) { (x) } )
75#define __pgprot(x) ((pgprot_t) { (x) } ) 75#define __pgprot(x) ((pgprot_t) { (x) } )
76 76
77/* Pure 2^n version of get_order */
78extern __inline__ int get_order(unsigned long size)
79{
80 int order;
81
82 size = (size-1) >> (PAGE_SHIFT-1);
83 order = -1;
84 do {
85 size >>= 1;
86 order++;
87 } while (size);
88 return order;
89}
90
91typedef struct __physmem_range { 77typedef struct __physmem_range {
92 unsigned long start_pfn; 78 unsigned long start_pfn;
93 unsigned long pages; /* PAGE_SIZE pages */ 79 unsigned long pages; /* PAGE_SIZE pages */
@@ -159,4 +145,6 @@ extern int npmem_ranges;
159 145
160#endif /* __KERNEL__ */ 146#endif /* __KERNEL__ */
161 147
148#include <asm-generic/page.h>
149
162#endif /* _PARISC_PAGE_H */ 150#endif /* _PARISC_PAGE_H */
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
index 8fe7a44ea205..d21b9d0d63ea 100644
--- a/include/asm-parisc/types.h
+++ b/include/asm-parisc/types.h
@@ -56,8 +56,6 @@ typedef unsigned long long u64;
56typedef u32 dma_addr_t; 56typedef u32 dma_addr_t;
57typedef u64 dma64_addr_t; 57typedef u64 dma64_addr_t;
58 58
59typedef unsigned int kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
62 60
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-ppc/dma-mapping.h
index 6f74f59938d4..92b8ee78dcc2 100644
--- a/include/asm-ppc/dma-mapping.h
+++ b/include/asm-ppc/dma-mapping.h
@@ -60,7 +60,8 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
60} 60}
61 61
62static inline void *dma_alloc_coherent(struct device *dev, size_t size, 62static inline void *dma_alloc_coherent(struct device *dev, size_t size,
63 dma_addr_t * dma_handle, int gfp) 63 dma_addr_t * dma_handle,
64 unsigned int __nocast gfp)
64{ 65{
65#ifdef CONFIG_NOT_COHERENT_CACHE 66#ifdef CONFIG_NOT_COHERENT_CACHE
66 return __dma_alloc_coherent(size, dma_handle, gfp); 67 return __dma_alloc_coherent(size, dma_handle, gfp);
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
index e807be96e981..e992369cb8e9 100644
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -19,10 +19,6 @@
19 19
20#ifdef CONFIG_40x 20#ifdef CONFIG_40x
21 21
22#if defined(CONFIG_ASH)
23#include <platforms/4xx/ash.h>
24#endif
25
26#if defined(CONFIG_BUBINGA) 22#if defined(CONFIG_BUBINGA)
27#include <platforms/4xx/bubinga.h> 23#include <platforms/4xx/bubinga.h>
28#endif 24#endif
@@ -35,14 +31,6 @@
35#include <platforms/4xx/ep405.h> 31#include <platforms/4xx/ep405.h>
36#endif 32#endif
37 33
38#if defined(CONFIG_OAK)
39#include <platforms/4xx/oak.h>
40#endif
41
42#if defined(CONFIG_REDWOOD_4)
43#include <platforms/4xx/redwood.h>
44#endif
45
46#if defined(CONFIG_REDWOOD_5) 34#if defined(CONFIG_REDWOOD_5)
47#include <platforms/4xx/redwood5.h> 35#include <platforms/4xx/redwood5.h>
48#endif 36#endif
diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h
index 3f7b5669e6d5..bd7656fa2026 100644
--- a/include/asm-ppc/ibm_ocp.h
+++ b/include/asm-ppc/ibm_ocp.h
@@ -67,6 +67,7 @@ struct ocp_func_emac_data {
67 int phy_mode; /* PHY type or configurable mode */ 67 int phy_mode; /* PHY type or configurable mode */
68 u8 mac_addr[6]; /* EMAC mac address */ 68 u8 mac_addr[6]; /* EMAC mac address */
69 u32 phy_map; /* EMAC phy map */ 69 u32 phy_map; /* EMAC phy map */
70 u32 phy_feat_exc; /* Excluded PHY features */
70}; 71};
71 72
72/* Sysfs support */ 73/* Sysfs support */
@@ -100,6 +101,19 @@ void ocp_show_emac_data(struct device *dev) \
100 device_create_file(dev, &dev_attr_emac_phy_map); \ 101 device_create_file(dev, &dev_attr_emac_phy_map); \
101} 102}
102 103
104/*
105 * PHY mode settings (EMAC <-> ZMII/RGMII bridge <-> PHY)
106 */
107#define PHY_MODE_NA 0
108#define PHY_MODE_MII 1
109#define PHY_MODE_RMII 2
110#define PHY_MODE_SMII 3
111#define PHY_MODE_RGMII 4
112#define PHY_MODE_TBI 5
113#define PHY_MODE_GMII 6
114#define PHY_MODE_RTBI 7
115#define PHY_MODE_SGMII 8
116
103#ifdef CONFIG_40x 117#ifdef CONFIG_40x
104/* 118/*
105 * Helper function to copy MAC addresses from the bd_t to OCP EMAC 119 * Helper function to copy MAC addresses from the bd_t to OCP EMAC
@@ -133,6 +147,7 @@ struct ocp_func_mal_data {
133 int txde_irq; /* TX Descriptor Error IRQ */ 147 int txde_irq; /* TX Descriptor Error IRQ */
134 int rxde_irq; /* RX Descriptor Error IRQ */ 148 int rxde_irq; /* RX Descriptor Error IRQ */
135 int serr_irq; /* MAL System Error IRQ */ 149 int serr_irq; /* MAL System Error IRQ */
150 int dcr_base; /* MALx_CFG DCR number */
136}; 151};
137 152
138#define OCP_SYSFS_MAL_DATA() \ 153#define OCP_SYSFS_MAL_DATA() \
@@ -143,6 +158,7 @@ OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxeob_irq) \
143OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \ 158OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \
144OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \ 159OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \
145OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \ 160OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \
161OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, dcr_base) \
146 \ 162 \
147void ocp_show_mal_data(struct device *dev) \ 163void ocp_show_mal_data(struct device *dev) \
148{ \ 164{ \
@@ -153,6 +169,7 @@ void ocp_show_mal_data(struct device *dev) \
153 device_create_file(dev, &dev_attr_mal_txde_irq); \ 169 device_create_file(dev, &dev_attr_mal_txde_irq); \
154 device_create_file(dev, &dev_attr_mal_rxde_irq); \ 170 device_create_file(dev, &dev_attr_mal_rxde_irq); \
155 device_create_file(dev, &dev_attr_mal_serr_irq); \ 171 device_create_file(dev, &dev_attr_mal_serr_irq); \
172 device_create_file(dev, &dev_attr_mal_dcr_base); \
156} 173}
157 174
158/* 175/*
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index a9b33324f562..a244d93ca953 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -337,6 +337,7 @@ static __inline__ int irq_canonicalize(int irq)
337#define SIU_INT_IDMA3 ((uint)0x08 + CPM_IRQ_OFFSET) 337#define SIU_INT_IDMA3 ((uint)0x08 + CPM_IRQ_OFFSET)
338#define SIU_INT_IDMA4 ((uint)0x09 + CPM_IRQ_OFFSET) 338#define SIU_INT_IDMA4 ((uint)0x09 + CPM_IRQ_OFFSET)
339#define SIU_INT_SDMA ((uint)0x0a + CPM_IRQ_OFFSET) 339#define SIU_INT_SDMA ((uint)0x0a + CPM_IRQ_OFFSET)
340#define SIU_INT_USB ((uint)0x0b + CPM_IRQ_OFFSET)
340#define SIU_INT_TIMER1 ((uint)0x0c + CPM_IRQ_OFFSET) 341#define SIU_INT_TIMER1 ((uint)0x0c + CPM_IRQ_OFFSET)
341#define SIU_INT_TIMER2 ((uint)0x0d + CPM_IRQ_OFFSET) 342#define SIU_INT_TIMER2 ((uint)0x0d + CPM_IRQ_OFFSET)
342#define SIU_INT_TIMER3 ((uint)0x0e + CPM_IRQ_OFFSET) 343#define SIU_INT_TIMER3 ((uint)0x0e + CPM_IRQ_OFFSET)
diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
index 2589f182a6ad..6d6fc78731e5 100644
--- a/include/asm-ppc/kmap_types.h
+++ b/include/asm-ppc/kmap_types.h
@@ -17,6 +17,7 @@ enum km_type {
17 KM_SOFTIRQ0, 17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1, 18 KM_SOFTIRQ1,
19 KM_PPC_SYNC_PAGE, 19 KM_PPC_SYNC_PAGE,
20 KM_PPC_SYNC_ICACHE,
20 KM_TYPE_NR 21 KM_TYPE_NR
21}; 22};
22 23
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
index 89eb8a2ac693..9694eca16e92 100644
--- a/include/asm-ppc/mpc8260.h
+++ b/include/asm-ppc/mpc8260.h
@@ -67,6 +67,24 @@
67#define IO_VIRT_ADDR IO_PHYS_ADDR 67#define IO_VIRT_ADDR IO_PHYS_ADDR
68#endif 68#endif
69 69
70enum ppc_sys_devices {
71 MPC82xx_CPM_FCC1,
72 MPC82xx_CPM_FCC2,
73 MPC82xx_CPM_FCC3,
74 MPC82xx_CPM_I2C,
75 MPC82xx_CPM_SCC1,
76 MPC82xx_CPM_SCC2,
77 MPC82xx_CPM_SCC3,
78 MPC82xx_CPM_SCC4,
79 MPC82xx_CPM_SPI,
80 MPC82xx_CPM_MCC1,
81 MPC82xx_CPM_MCC2,
82 MPC82xx_CPM_SMC1,
83 MPC82xx_CPM_SMC2,
84 MPC82xx_CPM_USB,
85 MPC82xx_SEC1,
86};
87
70#ifndef __ASSEMBLY__ 88#ifndef __ASSEMBLY__
71/* The "residual" data board information structure the boot loader 89/* The "residual" data board information structure the boot loader
72 * hands to us. 90 * hands to us.
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 7c31f2d564a1..dc8e59896050 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -36,10 +36,6 @@
36#include <platforms/tqm8xx.h> 36#include <platforms/tqm8xx.h>
37#endif 37#endif
38 38
39#if defined(CONFIG_SPD823TS)
40#include <platforms/spd8xx.h>
41#endif
42
43#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) 39#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
44#include <platforms/ivms8.h> 40#include <platforms/ivms8.h>
45#endif 41#endif
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
index cc25b921ad4f..835930d6faa1 100644
--- a/include/asm-ppc/mv64x60.h
+++ b/include/asm-ppc/mv64x60.h
@@ -278,6 +278,13 @@ mv64x60_modify(struct mv64x60_handle *bh, u32 offs, u32 data, u32 mask)
278#define mv64x60_set_bits(bh, offs, bits) mv64x60_modify(bh, offs, ~0, bits) 278#define mv64x60_set_bits(bh, offs, bits) mv64x60_modify(bh, offs, ~0, bits)
279#define mv64x60_clr_bits(bh, offs, bits) mv64x60_modify(bh, offs, 0, bits) 279#define mv64x60_clr_bits(bh, offs, bits) mv64x60_modify(bh, offs, 0, bits)
280 280
281#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
282#define MV64XXX_DEV_NAME "mv64xxx"
283
284struct mv64xxx_pdata {
285 u32 hs_reg_valid;
286};
287#endif
281 288
282/* Externally visible function prototypes */ 289/* Externally visible function prototypes */
283int mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si); 290int mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si);
diff --git a/include/asm-ppc/mv64x60_defs.h b/include/asm-ppc/mv64x60_defs.h
index 2f428746c02b..f8f7f16b9b53 100644
--- a/include/asm-ppc/mv64x60_defs.h
+++ b/include/asm-ppc/mv64x60_defs.h
@@ -333,7 +333,7 @@
333/* 333/*
334 ***************************************************************************** 334 *****************************************************************************
335 * 335 *
336 * SRAM Cotnroller Registers 336 * SRAM Controller Registers
337 * 337 *
338 ***************************************************************************** 338 *****************************************************************************
339 */ 339 */
@@ -352,7 +352,7 @@
352/* 352/*
353 ***************************************************************************** 353 *****************************************************************************
354 * 354 *
355 * SDRAM/MEM Cotnroller Registers 355 * SDRAM/MEM Controller Registers
356 * 356 *
357 ***************************************************************************** 357 *****************************************************************************
358 */ 358 */
@@ -375,6 +375,7 @@
375/* SDRAM Control Registers */ 375/* SDRAM Control Registers */
376#define MV64360_D_UNIT_CONTROL_LOW 0x1404 376#define MV64360_D_UNIT_CONTROL_LOW 0x1404
377#define MV64360_D_UNIT_CONTROL_HIGH 0x1424 377#define MV64360_D_UNIT_CONTROL_HIGH 0x1424
378#define MV64460_D_UNIT_MMASK 0x14b0
378 379
379/* SDRAM Error Report Registers (64360) */ 380/* SDRAM Error Report Registers (64360) */
380#define MV64360_SDRAM_ERR_DATA_LO 0x1444 381#define MV64360_SDRAM_ERR_DATA_LO 0x1444
@@ -388,7 +389,7 @@
388/* 389/*
389 ***************************************************************************** 390 *****************************************************************************
390 * 391 *
391 * Device/BOOT Cotnroller Registers 392 * Device/BOOT Controller Registers
392 * 393 *
393 ***************************************************************************** 394 *****************************************************************************
394 */ 395 */
@@ -680,6 +681,8 @@
680#define MV64x60_PCI1_SLAVE_P2P_IO_REMAP 0x0dec 681#define MV64x60_PCI1_SLAVE_P2P_IO_REMAP 0x0dec
681#define MV64x60_PCI1_SLAVE_CPU_REMAP 0x0df0 682#define MV64x60_PCI1_SLAVE_CPU_REMAP 0x0df0
682 683
684#define MV64360_PCICFG_CPCI_HOTSWAP 0x68
685
683/* 686/*
684 ***************************************************************************** 687 *****************************************************************************
685 * 688 *
diff --git a/include/asm-ppc/param.h b/include/asm-ppc/param.h
index b24a4e37196a..6198b1657a45 100644
--- a/include/asm-ppc/param.h
+++ b/include/asm-ppc/param.h
@@ -1,8 +1,10 @@
1#ifndef _ASM_PPC_PARAM_H 1#ifndef _ASM_PPC_PARAM_H
2#define _ASM_PPC_PARAM_H 2#define _ASM_PPC_PARAM_H
3 3
4#include <linux/config.h>
5
4#ifdef __KERNEL__ 6#ifdef __KERNEL__
5#define HZ 1000 /* internal timer frequency */ 7#define HZ CONFIG_HZ /* internal timer frequency */
6#define USER_HZ 100 /* for user interfaces in "ticks" */ 8#define USER_HZ 100 /* for user interfaces in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ 9#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
8#endif /* __KERNEL__ */ 10#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 8ea624566231..048f7c8596ee 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -21,7 +21,9 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/types.h> 22#include <linux/types.h>
23 23
24#if defined(CONFIG_83xx) 24#if defined(CONFIG_8260)
25#include <asm/mpc8260.h>
26#elif defined(CONFIG_83xx)
25#include <asm/mpc83xx.h> 27#include <asm/mpc83xx.h>
26#elif defined(CONFIG_85xx) 28#elif defined(CONFIG_85xx)
27#include <asm/mpc85xx.h> 29#include <asm/mpc85xx.h>
@@ -50,6 +52,7 @@ extern struct ppc_sys_spec *cur_ppc_sys_spec;
50/* determine which specific SOC we are */ 52/* determine which specific SOC we are */
51extern void identify_ppc_sys_by_id(u32 id) __init; 53extern void identify_ppc_sys_by_id(u32 id) __init;
52extern void identify_ppc_sys_by_name(char *name) __init; 54extern void identify_ppc_sys_by_name(char *name) __init;
55extern void identify_ppc_sys_by_name_and_id(char *name, u32 id) __init;
53 56
54/* describes all devices that may exist in a given family of processors */ 57/* describes all devices that may exist in a given family of processors */
55extern struct platform_device ppc_sys_platform_devices[]; 58extern struct platform_device ppc_sys_platform_devices[];
diff --git a/include/asm-ppc/serial.h b/include/asm-ppc/serial.h
index 6d47438be58c..485a924e4d06 100644
--- a/include/asm-ppc/serial.h
+++ b/include/asm-ppc/serial.h
@@ -18,8 +18,6 @@
18#include <platforms/powerpmc250.h> 18#include <platforms/powerpmc250.h>
19#elif defined(CONFIG_LOPEC) 19#elif defined(CONFIG_LOPEC)
20#include <platforms/lopec.h> 20#include <platforms/lopec.h>
21#elif defined(CONFIG_MCPN765)
22#include <platforms/mcpn765.h>
23#elif defined(CONFIG_MVME5100) 21#elif defined(CONFIG_MVME5100)
24#include <platforms/mvme5100.h> 22#include <platforms/mvme5100.h>
25#elif defined(CONFIG_PAL4) 23#elif defined(CONFIG_PAL4)
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index 82395f30004b..513a334c5810 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -84,9 +84,14 @@ extern void cvt_fd(float *from, double *to, unsigned long *fpscr);
84extern void cvt_df(double *from, float *to, unsigned long *fpscr); 84extern void cvt_df(double *from, float *to, unsigned long *fpscr);
85extern int call_rtas(const char *, int, int, unsigned long *, ...); 85extern int call_rtas(const char *, int, int, unsigned long *, ...);
86extern void cacheable_memzero(void *p, unsigned int nb); 86extern void cacheable_memzero(void *p, unsigned int nb);
87extern void *cacheable_memcpy(void *, const void *, unsigned int);
87extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); 88extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
88extern void bad_page_fault(struct pt_regs *, unsigned long, int); 89extern void bad_page_fault(struct pt_regs *, unsigned long, int);
89extern void die(const char *, struct pt_regs *, long); 90extern void die(const char *, struct pt_regs *, long);
91#ifdef CONFIG_BOOKE_WDT
92extern u32 booke_wdt_enabled;
93extern u32 booke_wdt_period;
94#endif /* CONFIG_BOOKE_WDT */
90 95
91struct device_node; 96struct device_node;
92extern void note_scsi_host(struct device_node *, void *); 97extern void note_scsi_host(struct device_node *, void *);
diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h
index a787bc032587..77dc24d7d2ad 100644
--- a/include/asm-ppc/types.h
+++ b/include/asm-ppc/types.h
@@ -62,8 +62,6 @@ typedef u64 sector_t;
62#define HAVE_SECTOR_T 62#define HAVE_SECTOR_T
63#endif 63#endif
64 64
65typedef unsigned int kmem_bufctl_t;
66
67#endif /* __ASSEMBLY__ */ 65#endif /* __ASSEMBLY__ */
68 66
69#endif /* __KERNEL__ */ 67#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/lmb.h b/include/asm-ppc64/lmb.h
index cb368bf0f264..de91e034bd98 100644
--- a/include/asm-ppc64/lmb.h
+++ b/include/asm-ppc64/lmb.h
@@ -56,4 +56,26 @@ extern void lmb_dump_all(void);
56 56
57extern unsigned long io_hole_start; 57extern unsigned long io_hole_start;
58 58
59static inline unsigned long
60lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)
61{
62 return type->region[region_nr].size;
63}
64static inline unsigned long
65lmb_size_pages(struct lmb_region *type, unsigned long region_nr)
66{
67 return lmb_size_bytes(type, region_nr) >> PAGE_SHIFT;
68}
69static inline unsigned long
70lmb_start_pfn(struct lmb_region *type, unsigned long region_nr)
71{
72 return type->region[region_nr].base >> PAGE_SHIFT;
73}
74static inline unsigned long
75lmb_end_pfn(struct lmb_region *type, unsigned long region_nr)
76{
77 return lmb_start_pfn(type, region_nr) +
78 lmb_size_pages(type, region_nr);
79}
80
59#endif /* _PPC64_LMB_H */ 81#endif /* _PPC64_LMB_H */
diff --git a/include/asm-ppc64/lppaca.h b/include/asm-ppc64/lppaca.h
index 70766b5f26c1..9e2a6c0649a0 100644
--- a/include/asm-ppc64/lppaca.h
+++ b/include/asm-ppc64/lppaca.h
@@ -108,7 +108,7 @@ struct lppaca
108 volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B 108 volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B
109 u16 slb_count; // # of SLBs to maintain x7C-x7D 109 u16 slb_count; // # of SLBs to maintain x7C-x7D
110 u8 idle; // Indicate OS is idle x7E 110 u8 idle; // Indicate OS is idle x7E
111 u8 reserved5; // Reserved x7F 111 u8 vmxregs_in_use; // VMX registers in use x7F
112 112
113 113
114//============================================================================= 114//=============================================================================
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index a79a08df62bd..a15422bcf30d 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -172,20 +172,6 @@ typedef unsigned long pgprot_t;
172 172
173#endif 173#endif
174 174
175/* Pure 2^n version of get_order */
176static inline int get_order(unsigned long size)
177{
178 int order;
179
180 size = (size-1) >> (PAGE_SHIFT-1);
181 order = -1;
182 do {
183 size >>= 1;
184 order++;
185 } while (size);
186 return order;
187}
188
189#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) 175#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
190 176
191extern int page_is_ram(unsigned long pfn); 177extern int page_is_ram(unsigned long pfn);
@@ -270,4 +256,7 @@ extern u64 ppc64_pft_size; /* Log 2 of page table size */
270 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64) 256 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
271 257
272#endif /* __KERNEL__ */ 258#endif /* __KERNEL__ */
259
260#include <asm-generic/page.h>
261
273#endif /* _PPC64_PAGE_H */ 262#endif /* _PPC64_PAGE_H */
diff --git a/include/asm-ppc64/types.h b/include/asm-ppc64/types.h
index 5b8c2cfa1138..bf294c1761b2 100644
--- a/include/asm-ppc64/types.h
+++ b/include/asm-ppc64/types.h
@@ -72,7 +72,6 @@ typedef struct {
72 unsigned long env; 72 unsigned long env;
73} func_descr_t; 73} func_descr_t;
74 74
75typedef unsigned int kmem_bufctl_t;
76#endif /* __ASSEMBLY__ */ 75#endif /* __ASSEMBLY__ */
77 76
78#endif /* __KERNEL__ */ 77#endif /* __KERNEL__ */
diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h
index 92360d90144b..7127030ae162 100644
--- a/include/asm-s390/debug.h
+++ b/include/asm-s390/debug.h
@@ -52,8 +52,6 @@ struct __debug_entry{
52#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */ 52#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */
53 /* the entry information */ 53 /* the entry information */
54 54
55#define STCK(x) asm volatile ("STCK 0(%1)" : "=m" (x) : "a" (&(x)) : "cc")
56
57typedef struct __debug_entry debug_entry_t; 55typedef struct __debug_entry debug_entry_t;
58 56
59struct debug_view; 57struct debug_view;
diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h
index afe6a9f9b0ae..c6f51c9ce3ff 100644
--- a/include/asm-s390/lowcore.h
+++ b/include/asm-s390/lowcore.h
@@ -68,6 +68,7 @@
68#define __LC_SYSTEM_TIMER 0x270 68#define __LC_SYSTEM_TIMER 0x270
69#define __LC_LAST_UPDATE_CLOCK 0x278 69#define __LC_LAST_UPDATE_CLOCK 0x278
70#define __LC_STEAL_CLOCK 0x280 70#define __LC_STEAL_CLOCK 0x280
71#define __LC_RETURN_MCCK_PSW 0x288
71#define __LC_KERNEL_STACK 0xC40 72#define __LC_KERNEL_STACK 0xC40
72#define __LC_THREAD_INFO 0xC44 73#define __LC_THREAD_INFO 0xC44
73#define __LC_ASYNC_STACK 0xC48 74#define __LC_ASYNC_STACK 0xC48
@@ -90,6 +91,7 @@
90#define __LC_SYSTEM_TIMER 0x278 91#define __LC_SYSTEM_TIMER 0x278
91#define __LC_LAST_UPDATE_CLOCK 0x280 92#define __LC_LAST_UPDATE_CLOCK 0x280
92#define __LC_STEAL_CLOCK 0x288 93#define __LC_STEAL_CLOCK 0x288
94#define __LC_RETURN_MCCK_PSW 0x290
93#define __LC_KERNEL_STACK 0xD40 95#define __LC_KERNEL_STACK 0xD40
94#define __LC_THREAD_INFO 0xD48 96#define __LC_THREAD_INFO 0xD48
95#define __LC_ASYNC_STACK 0xD50 97#define __LC_ASYNC_STACK 0xD50
@@ -196,7 +198,8 @@ struct _lowcore
196 __u64 system_timer; /* 0x270 */ 198 __u64 system_timer; /* 0x270 */
197 __u64 last_update_clock; /* 0x278 */ 199 __u64 last_update_clock; /* 0x278 */
198 __u64 steal_clock; /* 0x280 */ 200 __u64 steal_clock; /* 0x280 */
199 __u8 pad8[0xc00-0x288]; /* 0x288 */ 201 psw_t return_mcck_psw; /* 0x288 */
202 __u8 pad8[0xc00-0x290]; /* 0x290 */
200 203
201 /* System info area */ 204 /* System info area */
202 __u32 save_area[16]; /* 0xc00 */ 205 __u32 save_area[16]; /* 0xc00 */
@@ -285,7 +288,8 @@ struct _lowcore
285 __u64 system_timer; /* 0x278 */ 288 __u64 system_timer; /* 0x278 */
286 __u64 last_update_clock; /* 0x280 */ 289 __u64 last_update_clock; /* 0x280 */
287 __u64 steal_clock; /* 0x288 */ 290 __u64 steal_clock; /* 0x288 */
288 __u8 pad8[0xc00-0x290]; /* 0x290 */ 291 psw_t return_mcck_psw; /* 0x290 */
292 __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */
289 /* System info area */ 293 /* System info area */
290 __u64 save_area[16]; /* 0xc00 */ 294 __u64 save_area[16]; /* 0xc00 */
291 __u8 pad9[0xd40-0xc80]; /* 0xc80 */ 295 __u8 pad9[0xd40-0xc80]; /* 0xc80 */
diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h
index 2be287b9df88..2430c561e021 100644
--- a/include/asm-s390/page.h
+++ b/include/asm-s390/page.h
@@ -111,20 +111,6 @@ static inline void copy_page(void *to, void *from)
111#define alloc_zeroed_user_highpage(vma, vaddr) alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO, vma, vaddr) 111#define alloc_zeroed_user_highpage(vma, vaddr) alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO, vma, vaddr)
112#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE 112#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
113 113
114/* Pure 2^n version of get_order */
115extern __inline__ int get_order(unsigned long size)
116{
117 int order;
118
119 size = (size-1) >> (PAGE_SHIFT-1);
120 order = -1;
121 do {
122 size >>= 1;
123 order++;
124 } while (size);
125 return order;
126}
127
128/* 114/*
129 * These are used to make use of C type-checking.. 115 * These are used to make use of C type-checking..
130 */ 116 */
@@ -207,4 +193,6 @@ page_get_storage_key(unsigned long addr)
207 193
208#endif /* __KERNEL__ */ 194#endif /* __KERNEL__ */
209 195
196#include <asm-generic/page.h>
197
210#endif /* _S390_PAGE_H */ 198#endif /* _S390_PAGE_H */
diff --git a/include/asm-s390/spinlock.h b/include/asm-s390/spinlock.h
index 8ff10300f7ee..321b23bba1ec 100644
--- a/include/asm-s390/spinlock.h
+++ b/include/asm-s390/spinlock.h
@@ -47,7 +47,7 @@ extern int _raw_spin_trylock_retry(spinlock_t *lp, unsigned int pc);
47 47
48static inline void _raw_spin_lock(spinlock_t *lp) 48static inline void _raw_spin_lock(spinlock_t *lp)
49{ 49{
50 unsigned long pc = (unsigned long) __builtin_return_address(0); 50 unsigned long pc = 1 | (unsigned long) __builtin_return_address(0);
51 51
52 if (unlikely(_raw_compare_and_swap(&lp->lock, 0, pc) != 0)) 52 if (unlikely(_raw_compare_and_swap(&lp->lock, 0, pc) != 0))
53 _raw_spin_lock_wait(lp, pc); 53 _raw_spin_lock_wait(lp, pc);
@@ -55,7 +55,7 @@ static inline void _raw_spin_lock(spinlock_t *lp)
55 55
56static inline int _raw_spin_trylock(spinlock_t *lp) 56static inline int _raw_spin_trylock(spinlock_t *lp)
57{ 57{
58 unsigned long pc = (unsigned long) __builtin_return_address(0); 58 unsigned long pc = 1 | (unsigned long) __builtin_return_address(0);
59 59
60 if (likely(_raw_compare_and_swap(&lp->lock, 0, pc) == 0)) 60 if (likely(_raw_compare_and_swap(&lp->lock, 0, pc) == 0))
61 return 1; 61 return 1;
diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h
index 3fefd61416a5..d0be3e477013 100644
--- a/include/asm-s390/types.h
+++ b/include/asm-s390/types.h
@@ -79,8 +79,6 @@ typedef unsigned long u64;
79 79
80typedef u32 dma_addr_t; 80typedef u32 dma_addr_t;
81 81
82typedef unsigned int kmem_bufctl_t;
83
84#ifndef __s390x__ 82#ifndef __s390x__
85typedef union { 83typedef union {
86 unsigned long long pair; 84 unsigned long long pair;
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 180467be8e7b..324e6cc5ecf7 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -122,24 +122,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
122#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 122#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
123 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 123 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
124 124
125#ifndef __ASSEMBLY__
126
127/* Pure 2^n version of get_order */
128static __inline__ int get_order(unsigned long size)
129{
130 int order;
131
132 size = (size-1) >> (PAGE_SHIFT-1);
133 order = -1;
134 do {
135 size >>= 1;
136 order++;
137 } while (size);
138 return order;
139}
140
141#endif
142
143#endif /* __KERNEL__ */ 125#endif /* __KERNEL__ */
144 126
127#include <asm-generic/page.h>
128
145#endif /* __ASM_SH_PAGE_H */ 129#endif /* __ASM_SH_PAGE_H */
diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h
index c4dc126c5621..cb7e183a0a6b 100644
--- a/include/asm-sh/types.h
+++ b/include/asm-sh/types.h
@@ -58,8 +58,6 @@ typedef u64 sector_t;
58#define HAVE_SECTOR_T 58#define HAVE_SECTOR_T
59#endif 59#endif
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __ASSEMBLY__ */ 61#endif /* __ASSEMBLY__ */
64 62
65#endif /* __KERNEL__ */ 63#endif /* __KERNEL__ */
diff --git a/include/asm-sh64/page.h b/include/asm-sh64/page.h
index d6167f1c0e99..c86df90f7cbd 100644
--- a/include/asm-sh64/page.h
+++ b/include/asm-sh64/page.h
@@ -115,24 +115,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
115#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 115#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
116 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 116 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
117 117
118#ifndef __ASSEMBLY__
119
120/* Pure 2^n version of get_order */
121extern __inline__ int get_order(unsigned long size)
122{
123 int order;
124
125 size = (size-1) >> (PAGE_SHIFT-1);
126 order = -1;
127 do {
128 size >>= 1;
129 order++;
130 } while (size);
131 return order;
132}
133
134#endif
135
136#endif /* __KERNEL__ */ 118#endif /* __KERNEL__ */
137 119
120#include <asm-generic/page.h>
121
138#endif /* __ASM_SH64_PAGE_H */ 122#endif /* __ASM_SH64_PAGE_H */
diff --git a/include/asm-sh64/types.h b/include/asm-sh64/types.h
index 41d4d2f82aa9..8d41db2153b5 100644
--- a/include/asm-sh64/types.h
+++ b/include/asm-sh64/types.h
@@ -65,8 +65,6 @@ typedef u32 dma_addr_t;
65#endif 65#endif
66typedef u64 dma64_addr_t; 66typedef u64 dma64_addr_t;
67 67
68typedef unsigned int kmem_bufctl_t;
69
70#endif /* __ASSEMBLY__ */ 68#endif /* __ASSEMBLY__ */
71 69
72#define BITS_PER_LONG 32 70#define BITS_PER_LONG 32
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h
index 383060e90d94..9122684f6c1e 100644
--- a/include/asm-sparc/page.h
+++ b/include/asm-sparc/page.h
@@ -132,20 +132,6 @@ BTFIXUPDEF_SETHI(sparc_unmapped_base)
132 132
133#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) 133#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base)
134 134
135/* Pure 2^n version of get_order */
136extern __inline__ int get_order(unsigned long size)
137{
138 int order;
139
140 size = (size-1) >> (PAGE_SHIFT-1);
141 order = -1;
142 do {
143 size >>= 1;
144 order++;
145 } while (size);
146 return order;
147}
148
149#else /* !(__ASSEMBLY__) */ 135#else /* !(__ASSEMBLY__) */
150 136
151#define __pgprot(x) (x) 137#define __pgprot(x) (x)
@@ -178,4 +164,6 @@ extern unsigned long pfn_base;
178 164
179#endif /* __KERNEL__ */ 165#endif /* __KERNEL__ */
180 166
167#include <asm-generic/page.h>
168
181#endif /* _SPARC_PAGE_H */ 169#endif /* _SPARC_PAGE_H */
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 40ed30a2b7c6..8f4f6a959651 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -435,9 +435,6 @@ extern unsigned long *sparc_valid_addr_bitmap;
435#define kern_addr_valid(addr) \ 435#define kern_addr_valid(addr) \
436 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) 436 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
437 437
438extern int io_remap_page_range(struct vm_area_struct *vma,
439 unsigned long from, unsigned long to,
440 unsigned long size, pgprot_t prot, int space);
441extern int io_remap_pfn_range(struct vm_area_struct *vma, 438extern int io_remap_pfn_range(struct vm_area_struct *vma,
442 unsigned long from, unsigned long pfn, 439 unsigned long from, unsigned long pfn,
443 unsigned long size, pgprot_t prot); 440 unsigned long size, pgprot_t prot);
diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h
index 9eabf6e61ccc..42fc6ed98156 100644
--- a/include/asm-sparc/types.h
+++ b/include/asm-sparc/types.h
@@ -54,8 +54,6 @@ typedef unsigned long long u64;
54typedef u32 dma_addr_t; 54typedef u32 dma_addr_t;
55typedef u32 dma64_addr_t; 55typedef u32 dma64_addr_t;
56 56
57typedef unsigned short kmem_bufctl_t;
58
59#endif /* __ASSEMBLY__ */ 57#endif /* __ASSEMBLY__ */
60 58
61#endif /* __KERNEL__ */ 59#endif /* __KERNEL__ */
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index cc7198aaac50..9a3a81f1cc58 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -1,6 +1,6 @@
1/* cpudata.h: Per-cpu parameters. 1/* cpudata.h: Per-cpu parameters.
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2005 David S. Miller (davem@redhat.com)
4 */ 4 */
5 5
6#ifndef _SPARC64_CPUDATA_H 6#ifndef _SPARC64_CPUDATA_H
@@ -10,7 +10,7 @@
10 10
11typedef struct { 11typedef struct {
12 /* Dcache line 1 */ 12 /* Dcache line 1 */
13 unsigned int __pad0; /* bh_count moved to irq_stat for consistency. KAO */ 13 unsigned int __softirq_pending; /* must be 1st, see rtrap.S */
14 unsigned int multiplier; 14 unsigned int multiplier;
15 unsigned int counter; 15 unsigned int counter;
16 unsigned int idle_volume; 16 unsigned int idle_volume;
diff --git a/include/asm-sparc64/hardirq.h b/include/asm-sparc64/hardirq.h
index d6db1aed7645..f0cf71376ec5 100644
--- a/include/asm-sparc64/hardirq.h
+++ b/include/asm-sparc64/hardirq.h
@@ -1,22 +1,16 @@
1/* hardirq.h: 64-bit Sparc hard IRQ support. 1/* hardirq.h: 64-bit Sparc hard IRQ support.
2 * 2 *
3 * Copyright (C) 1997, 1998 David S. Miller (davem@caip.rutgers.edu) 3 * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#ifndef __SPARC64_HARDIRQ_H 6#ifndef __SPARC64_HARDIRQ_H
7#define __SPARC64_HARDIRQ_H 7#define __SPARC64_HARDIRQ_H
8 8
9#include <linux/config.h> 9#include <asm/cpudata.h>
10#include <linux/threads.h>
11#include <linux/spinlock.h>
12#include <linux/cache.h>
13 10
14/* rtrap.S is sensitive to the offsets of these fields */ 11#define __ARCH_IRQ_STAT
15typedef struct { 12#define local_softirq_pending() \
16 unsigned int __softirq_pending; 13 (local_cpu_data().__softirq_pending)
17} ____cacheline_aligned irq_cpustat_t;
18
19#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
20 14
21#define HARDIRQ_BITS 8 15#define HARDIRQ_BITS 8
22 16
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h
index afdcea90707a..0056770e83ad 100644
--- a/include/asm-sparc64/io.h
+++ b/include/asm-sparc64/io.h
@@ -100,18 +100,41 @@ static __inline__ void _outl(u32 l, unsigned long addr)
100#define inl_p(__addr) inl(__addr) 100#define inl_p(__addr) inl(__addr)
101#define outl_p(__l, __addr) outl(__l, __addr) 101#define outl_p(__l, __addr) outl(__l, __addr)
102 102
103extern void outsb(void __iomem *addr, const void *src, unsigned long count); 103extern void outsb(unsigned long, const void *, unsigned long);
104extern void outsw(void __iomem *addr, const void *src, unsigned long count); 104extern void outsw(unsigned long, const void *, unsigned long);
105extern void outsl(void __iomem *addr, const void *src, unsigned long count); 105extern void outsl(unsigned long, const void *, unsigned long);
106extern void insb(void __iomem *addr, void *dst, unsigned long count); 106extern void insb(unsigned long, void *, unsigned long);
107extern void insw(void __iomem *addr, void *dst, unsigned long count); 107extern void insw(unsigned long, void *, unsigned long);
108extern void insl(void __iomem *addr, void *dst, unsigned long count); 108extern void insl(unsigned long, void *, unsigned long);
109#define ioread8_rep(a,d,c) insb(a,d,c) 109
110#define ioread16_rep(a,d,c) insw(a,d,c) 110static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
111#define ioread32_rep(a,d,c) insl(a,d,c) 111{
112#define iowrite8_rep(a,s,c) outsb(a,s,c) 112 insb((unsigned long __force)port, buf, count);
113#define iowrite16_rep(a,s,c) outsw(a,s,c) 113}
114#define iowrite32_rep(a,s,c) outsl(a,s,c) 114static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
115{
116 insw((unsigned long __force)port, buf, count);
117}
118
119static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
120{
121 insl((unsigned long __force)port, buf, count);
122}
123
124static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
125{
126 outsb((unsigned long __force)port, buf, count);
127}
128
129static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
130{
131 outsw((unsigned long __force)port, buf, count);
132}
133
134static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
135{
136 outsl((unsigned long __force)port, buf, count);
137}
115 138
116/* Memory functions, same as I/O accesses on Ultra. */ 139/* Memory functions, same as I/O accesses on Ultra. */
117static inline u8 _readb(const volatile void __iomem *addr) 140static inline u8 _readb(const volatile void __iomem *addr)
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index b87dbbd64bc9..c9f8ef208ea5 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -150,20 +150,6 @@ struct sparc_phys_banks {
150 150
151extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; 151extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
152 152
153/* Pure 2^n version of get_order */
154static __inline__ int get_order(unsigned long size)
155{
156 int order;
157
158 size = (size-1) >> (PAGE_SHIFT-1);
159 order = -1;
160 do {
161 size >>= 1;
162 order++;
163 } while (size);
164 return order;
165}
166
167#endif /* !(__ASSEMBLY__) */ 153#endif /* !(__ASSEMBLY__) */
168 154
169#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 155#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
@@ -171,4 +157,6 @@ static __inline__ int get_order(unsigned long size)
171 157
172#endif /* !(__KERNEL__) */ 158#endif /* !(__KERNEL__) */
173 159
160#include <asm-generic/page.h>
161
174#endif /* !(_SPARC64_PAGE_H) */ 162#endif /* !(_SPARC64_PAGE_H) */
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 1ae00c5087f1..a2b4f5ed4625 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -410,9 +410,6 @@ extern unsigned long *sparc64_valid_addr_bitmap;
410#define kern_addr_valid(addr) \ 410#define kern_addr_valid(addr) \
411 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) 411 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
412 412
413extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from,
414 unsigned long offset,
415 unsigned long size, pgprot_t prot, int space);
416extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 413extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
417 unsigned long pfn, 414 unsigned long pfn,
418 unsigned long size, pgprot_t prot); 415 unsigned long size, pgprot_t prot);
diff --git a/include/asm-sparc64/types.h b/include/asm-sparc64/types.h
index 6248ed1a9a7a..d0ee7f105838 100644
--- a/include/asm-sparc64/types.h
+++ b/include/asm-sparc64/types.h
@@ -56,8 +56,6 @@ typedef unsigned long u64;
56typedef u32 dma_addr_t; 56typedef u32 dma_addr_t;
57typedef u64 dma64_addr_t; 57typedef u64 dma64_addr_t;
58 58
59typedef unsigned short kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
62 60
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
diff --git a/include/asm-um/mmu_context.h b/include/asm-um/mmu_context.h
index 095bb627b96a..2edb4f1f789c 100644
--- a/include/asm-um/mmu_context.h
+++ b/include/asm-um/mmu_context.h
@@ -20,7 +20,15 @@ extern void force_flush_all(void);
20 20
21static inline void activate_mm(struct mm_struct *old, struct mm_struct *new) 21static inline void activate_mm(struct mm_struct *old, struct mm_struct *new)
22{ 22{
23 if (old != new) 23 /*
24 * This is called by fs/exec.c and fs/aio.c. In the first case, for an
25 * exec, we don't need to do anything as we're called from userspace
26 * and thus going to use a new host PID. In the second, we're called
27 * from a kernel thread, and thus need to go doing the mmap's on the
28 * host. Since they're very expensive, we want to avoid that as far as
29 * possible.
30 */
31 if (old != new && (current->flags & PF_BORROWED_MM))
24 force_flush_all(); 32 force_flush_all();
25} 33}
26 34
diff --git a/include/asm-um/page.h b/include/asm-um/page.h
index f58aedadeb4e..bd850a249183 100644
--- a/include/asm-um/page.h
+++ b/include/asm-um/page.h
@@ -116,24 +116,12 @@ extern void *to_virt(unsigned long phys);
116#define pfn_valid(pfn) ((pfn) < max_mapnr) 116#define pfn_valid(pfn) ((pfn) < max_mapnr)
117#define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v))) 117#define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v)))
118 118
119/* Pure 2^n version of get_order */
120static __inline__ int get_order(unsigned long size)
121{
122 int order;
123
124 size = (size-1) >> (PAGE_SHIFT-1);
125 order = -1;
126 do {
127 size >>= 1;
128 order++;
129 } while (size);
130 return order;
131}
132
133extern struct page *arch_validate(struct page *page, int mask, int order); 119extern struct page *arch_validate(struct page *page, int mask, int order);
134#define HAVE_ARCH_VALIDATE 120#define HAVE_ARCH_VALIDATE
135 121
136extern void arch_free_page(struct page *page, int order); 122extern void arch_free_page(struct page *page, int order);
137#define HAVE_ARCH_FREE_PAGE 123#define HAVE_ARCH_FREE_PAGE
138 124
125#include <asm-generic/page.h>
126
139#endif 127#endif
diff --git a/include/asm-um/pgalloc.h b/include/asm-um/pgalloc.h
index 8fcb2fc0a892..ea49411236dc 100644
--- a/include/asm-um/pgalloc.h
+++ b/include/asm-um/pgalloc.h
@@ -42,11 +42,13 @@ static inline void pte_free(struct page *pte)
42#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 42#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
43 43
44#ifdef CONFIG_3_LEVEL_PGTABLES 44#ifdef CONFIG_3_LEVEL_PGTABLES
45/* 45
46 * In the 3-level case we free the pmds as part of the pgd. 46extern __inline__ void pmd_free(pmd_t *pmd)
47 */ 47{
48#define pmd_free(x) do { } while (0) 48 free_page((unsigned long)pmd);
49#define __pmd_free_tlb(tlb,x) do { } while (0) 49}
50
51#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
50#endif 52#endif
51 53
52#define check_pgt_cache() do { } while (0) 54#define check_pgt_cache() do { } while (0)
diff --git a/include/asm-um/pgtable-2level.h b/include/asm-um/pgtable-2level.h
index 9b3abc01d60e..ffe017f6b64b 100644
--- a/include/asm-um/pgtable-2level.h
+++ b/include/asm-um/pgtable-2level.h
@@ -35,35 +35,8 @@
35static inline int pgd_newpage(pgd_t pgd) { return 0; } 35static inline int pgd_newpage(pgd_t pgd) { return 0; }
36static inline void pgd_mkuptodate(pgd_t pgd) { } 36static inline void pgd_mkuptodate(pgd_t pgd) { }
37 37
38#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
39
40static inline pte_t pte_mknewprot(pte_t pte)
41{
42 pte_val(pte) |= _PAGE_NEWPROT;
43 return(pte);
44}
45
46static inline pte_t pte_mknewpage(pte_t pte)
47{
48 pte_val(pte) |= _PAGE_NEWPAGE;
49 return(pte);
50}
51
52static inline void set_pte(pte_t *pteptr, pte_t pteval)
53{
54 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
55 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
56 * mapped pages.
57 */
58 *pteptr = pte_mknewpage(pteval);
59 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
60}
61#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
62
63#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) 38#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
64 39
65#define pte_page(x) pfn_to_page(pte_pfn(x))
66#define pte_none(x) !(pte_val(x) & ~_PAGE_NEWPAGE)
67#define pte_pfn(x) phys_to_pfn(pte_val(x)) 40#define pte_pfn(x) phys_to_pfn(pte_val(x))
68#define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot)) 41#define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot))
69#define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot)) 42#define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot))
diff --git a/include/asm-um/pgtable-3level.h b/include/asm-um/pgtable-3level.h
index 65e8bfc55fc4..786c25727289 100644
--- a/include/asm-um/pgtable-3level.h
+++ b/include/asm-um/pgtable-3level.h
@@ -57,35 +57,6 @@ static inline int pgd_newpage(pgd_t pgd)
57 57
58static inline void pgd_mkuptodate(pgd_t pgd) { pgd_val(pgd) &= ~_PAGE_NEWPAGE; } 58static inline void pgd_mkuptodate(pgd_t pgd) { pgd_val(pgd) &= ~_PAGE_NEWPAGE; }
59 59
60
61#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
62
63static inline pte_t pte_mknewprot(pte_t pte)
64{
65 pte_set_bits(pte, _PAGE_NEWPROT);
66 return(pte);
67}
68
69static inline pte_t pte_mknewpage(pte_t pte)
70{
71 pte_set_bits(pte, _PAGE_NEWPAGE);
72 return(pte);
73}
74
75static inline void set_pte(pte_t *pteptr, pte_t pteval)
76{
77 pte_copy(*pteptr, pteval);
78
79 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
80 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
81 * mapped pages.
82 */
83
84 *pteptr = pte_mknewpage(*pteptr);
85 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
86}
87#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
88
89#define set_pmd(pmdptr, pmdval) set_64bit((phys_t *) (pmdptr), pmd_val(pmdval)) 60#define set_pmd(pmdptr, pmdval) set_64bit((phys_t *) (pmdptr), pmd_val(pmdval))
90 61
91static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) 62static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
@@ -98,14 +69,11 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
98 return pmd; 69 return pmd;
99} 70}
100 71
101static inline void pmd_free(pmd_t *pmd){ 72extern inline void pud_clear (pud_t *pud)
102 free_page((unsigned long) pmd); 73{
74 set_pud(pud, __pud(0));
103} 75}
104 76
105#define __pmd_free_tlb(tlb,x) do { } while (0)
106
107static inline void pud_clear (pud_t * pud) { }
108
109#define pud_page(pud) \ 77#define pud_page(pud) \
110 ((struct page *) __va(pud_val(pud) & PAGE_MASK)) 78 ((struct page *) __va(pud_val(pud) & PAGE_MASK))
111 79
@@ -113,13 +81,6 @@ static inline void pud_clear (pud_t * pud) { }
113#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ 81#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
114 pmd_index(address)) 82 pmd_index(address))
115 83
116#define pte_page(x) pfn_to_page(pte_pfn(x))
117
118static inline int pte_none(pte_t pte)
119{
120 return pte_is_zero(pte);
121}
122
123static inline unsigned long pte_pfn(pte_t pte) 84static inline unsigned long pte_pfn(pte_t pte)
124{ 85{
125 return phys_to_pfn(pte_val(pte)); 86 return phys_to_pfn(pte_val(pte));
diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h
index a88040920311..b48e0966ecd7 100644
--- a/include/asm-um/pgtable.h
+++ b/include/asm-um/pgtable.h
@@ -16,13 +16,15 @@
16 16
17#define _PAGE_PRESENT 0x001 17#define _PAGE_PRESENT 0x001
18#define _PAGE_NEWPAGE 0x002 18#define _PAGE_NEWPAGE 0x002
19#define _PAGE_NEWPROT 0x004 19#define _PAGE_NEWPROT 0x004
20#define _PAGE_FILE 0x008 /* set:pagecache unset:swap */
21#define _PAGE_PROTNONE 0x010 /* If not present */
22#define _PAGE_RW 0x020 20#define _PAGE_RW 0x020
23#define _PAGE_USER 0x040 21#define _PAGE_USER 0x040
24#define _PAGE_ACCESSED 0x080 22#define _PAGE_ACCESSED 0x080
25#define _PAGE_DIRTY 0x100 23#define _PAGE_DIRTY 0x100
24/* If _PAGE_PRESENT is clear, we use these: */
25#define _PAGE_FILE 0x008 /* nonlinear file mapping, saved PTE; unset:swap */
26#define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE;
27 pte_present gives true */
26 28
27#ifdef CONFIG_3_LEVEL_PGTABLES 29#ifdef CONFIG_3_LEVEL_PGTABLES
28#include "asm/pgtable-3level.h" 30#include "asm/pgtable-3level.h"
@@ -151,10 +153,24 @@ extern unsigned long pg0[1024];
151 153
152#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK) 154#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
153 155
156#define pte_page(x) pfn_to_page(pte_pfn(x))
154#define pte_address(x) (__va(pte_val(x) & PAGE_MASK)) 157#define pte_address(x) (__va(pte_val(x) & PAGE_MASK))
155#define mk_phys(a, r) ((a) + (((unsigned long) r) << REGION_SHIFT)) 158#define mk_phys(a, r) ((a) + (((unsigned long) r) << REGION_SHIFT))
156#define phys_addr(p) ((p) & ~REGION_MASK) 159#define phys_addr(p) ((p) & ~REGION_MASK)
157 160
161#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
162
163/*
164 * =================================
165 * Flags checking section.
166 * =================================
167 */
168
169static inline int pte_none(pte_t pte)
170{
171 return pte_is_zero(pte);
172}
173
158/* 174/*
159 * The following only work if pte_present() is true. 175 * The following only work if pte_present() is true.
160 * Undefined behaviour if not.. 176 * Undefined behaviour if not..
@@ -210,6 +226,18 @@ static inline int pte_newprot(pte_t pte)
210 return(pte_present(pte) && (pte_get_bits(pte, _PAGE_NEWPROT))); 226 return(pte_present(pte) && (pte_get_bits(pte, _PAGE_NEWPROT)));
211} 227}
212 228
229/*
230 * =================================
231 * Flags setting section.
232 * =================================
233 */
234
235static inline pte_t pte_mknewprot(pte_t pte)
236{
237 pte_set_bits(pte, _PAGE_NEWPROT);
238 return(pte);
239}
240
213static inline pte_t pte_rdprotect(pte_t pte) 241static inline pte_t pte_rdprotect(pte_t pte)
214{ 242{
215 pte_clear_bits(pte, _PAGE_USER); 243 pte_clear_bits(pte, _PAGE_USER);
@@ -278,6 +306,26 @@ static inline pte_t pte_mkuptodate(pte_t pte)
278 return(pte); 306 return(pte);
279} 307}
280 308
309static inline pte_t pte_mknewpage(pte_t pte)
310{
311 pte_set_bits(pte, _PAGE_NEWPAGE);
312 return(pte);
313}
314
315static inline void set_pte(pte_t *pteptr, pte_t pteval)
316{
317 pte_copy(*pteptr, pteval);
318
319 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
320 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
321 * mapped pages.
322 */
323
324 *pteptr = pte_mknewpage(*pteptr);
325 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
326}
327#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
328
281extern phys_t page_to_phys(struct page *page); 329extern phys_t page_to_phys(struct page *page);
282 330
283/* 331/*
diff --git a/include/asm-v850/page.h b/include/asm-v850/page.h
index d6091622935d..b4bc85e7b91a 100644
--- a/include/asm-v850/page.h
+++ b/include/asm-v850/page.h
@@ -98,25 +98,6 @@ typedef unsigned long pgprot_t;
98#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) 98#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
99 99
100 100
101#ifndef __ASSEMBLY__
102
103/* Pure 2^n version of get_order */
104extern __inline__ int get_order (unsigned long size)
105{
106 int order;
107
108 size = (size-1) >> (PAGE_SHIFT-1);
109 order = -1;
110 do {
111 size >>= 1;
112 order++;
113 } while (size);
114 return order;
115}
116
117#endif /* !__ASSEMBLY__ */
118
119
120/* No current v850 processor has virtual memory. */ 101/* No current v850 processor has virtual memory. */
121#define __virt_to_phys(addr) (addr) 102#define __virt_to_phys(addr) (addr)
122#define __phys_to_virt(addr) (addr) 103#define __phys_to_virt(addr) (addr)
@@ -144,4 +125,6 @@ extern __inline__ int get_order (unsigned long size)
144 125
145#endif /* KERNEL */ 126#endif /* KERNEL */
146 127
128#include <asm-generic/page.h>
129
147#endif /* __V850_PAGE_H__ */ 130#endif /* __V850_PAGE_H__ */
diff --git a/include/asm-v850/types.h b/include/asm-v850/types.h
index e7cfe5b33a10..dcef57196875 100644
--- a/include/asm-v850/types.h
+++ b/include/asm-v850/types.h
@@ -59,8 +59,6 @@ typedef unsigned long long u64;
59 59
60typedef u32 dma_addr_t; 60typedef u32 dma_addr_t;
61 61
62typedef unsigned int kmem_bufctl_t;
63
64#endif /* !__ASSEMBLY__ */ 62#endif /* !__ASSEMBLY__ */
65 63
66#endif /* __KERNEL__ */ 64#endif /* __KERNEL__ */
diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h
index 431318764af6..135ffaa0393b 100644
--- a/include/asm-x86_64/page.h
+++ b/include/asm-x86_64/page.h
@@ -28,7 +28,6 @@
28#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) 28#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
29#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 29#define HPAGE_MASK (~(HPAGE_SIZE - 1))
30#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 30#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
31#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
32 31
33#ifdef __KERNEL__ 32#ifdef __KERNEL__
34#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
@@ -92,20 +91,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
92 91
93#include <asm/bug.h> 92#include <asm/bug.h>
94 93
95/* Pure 2^n version of get_order */
96extern __inline__ int get_order(unsigned long size)
97{
98 int order;
99
100 size = (size-1) >> (PAGE_SHIFT-1);
101 order = -1;
102 do {
103 size >>= 1;
104 order++;
105 } while (size);
106 return order;
107}
108
109#endif /* __ASSEMBLY__ */ 94#endif /* __ASSEMBLY__ */
110 95
111#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) 96#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
@@ -141,4 +126,6 @@ extern __inline__ int get_order(unsigned long size)
141 126
142#endif /* __KERNEL__ */ 127#endif /* __KERNEL__ */
143 128
129#include <asm-generic/page.h>
130
144#endif /* _X86_64_PAGE_H */ 131#endif /* _X86_64_PAGE_H */
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 4e167b5ea8f3..5e0f2fdab0d3 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -104,6 +104,19 @@ extern inline void pgd_clear (pgd_t * pgd)
104((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK)) 104((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
105 105
106#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0)) 106#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
107
108static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
109{
110 pte_t pte;
111 if (full) {
112 pte = *ptep;
113 *ptep = __pte(0);
114 } else {
115 pte = ptep_get_and_clear(mm, addr, ptep);
116 }
117 return pte;
118}
119
107#define pte_same(a, b) ((a).pte == (b).pte) 120#define pte_same(a, b) ((a).pte == (b).pte)
108 121
109#define PMD_SIZE (1UL << PMD_SHIFT) 122#define PMD_SIZE (1UL << PMD_SHIFT)
@@ -143,7 +156,7 @@ extern inline void pgd_clear (pgd_t * pgd)
143#define _PAGE_ACCESSED 0x020 156#define _PAGE_ACCESSED 0x020
144#define _PAGE_DIRTY 0x040 157#define _PAGE_DIRTY 0x040
145#define _PAGE_PSE 0x080 /* 2MB page */ 158#define _PAGE_PSE 0x080 /* 2MB page */
146#define _PAGE_FILE 0x040 /* set:pagecache, unset:swap */ 159#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
147#define _PAGE_GLOBAL 0x100 /* Global TLB entry */ 160#define _PAGE_GLOBAL 0x100 /* Global TLB entry */
148 161
149#define _PAGE_PROTNONE 0x080 /* If not present */ 162#define _PAGE_PROTNONE 0x080 /* If not present */
@@ -247,6 +260,7 @@ static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
247 * The following only work if pte_present() is true. 260 * The following only work if pte_present() is true.
248 * Undefined behaviour if not.. 261 * Undefined behaviour if not..
249 */ 262 */
263#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
250static inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 264static inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
251extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 265extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
252extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 266extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
@@ -254,8 +268,8 @@ extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
254extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 268extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
255extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } 269extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
256static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 270static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
271static inline int pte_huge(pte_t pte) { return (pte_val(pte) & __LARGE_PTE) == __LARGE_PTE; }
257 272
258#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
259extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 273extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
260extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 274extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
261extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } 275extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
@@ -433,6 +447,7 @@ extern int kern_addr_valid(unsigned long addr);
433#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 447#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
434#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 448#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
435#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 449#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
450#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
436#define __HAVE_ARCH_PTEP_SET_WRPROTECT 451#define __HAVE_ARCH_PTEP_SET_WRPROTECT
437#define __HAVE_ARCH_PTE_SAME 452#define __HAVE_ARCH_PTE_SAME
438#include <asm-generic/pgtable.h> 453#include <asm-generic/pgtable.h>
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 85549e656eeb..194160f6a43f 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -437,6 +437,11 @@ static inline void prefetchw(void *x)
437 outb((data), 0x23); \ 437 outb((data), 0x23); \
438} while (0) 438} while (0)
439 439
440static inline void serialize_cpu(void)
441{
442 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
443}
444
440static inline void __monitor(const void *eax, unsigned long ecx, 445static inline void __monitor(const void *eax, unsigned long ecx,
441 unsigned long edx) 446 unsigned long edx)
442{ 447{
diff --git a/include/asm-x86_64/types.h b/include/asm-x86_64/types.h
index 32bd1426b523..c86c2e6793e2 100644
--- a/include/asm-x86_64/types.h
+++ b/include/asm-x86_64/types.h
@@ -51,8 +51,6 @@ typedef u64 dma_addr_t;
51typedef u64 sector_t; 51typedef u64 sector_t;
52#define HAVE_SECTOR_T 52#define HAVE_SECTOR_T
53 53
54typedef unsigned short kmem_bufctl_t;
55
56#endif /* __ASSEMBLY__ */ 54#endif /* __ASSEMBLY__ */
57 55
58#endif /* __KERNEL__ */ 56#endif /* __KERNEL__ */
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
index d72bcb32ba4f..24f86f0e43cf 100644
--- a/include/asm-xtensa/atomic.h
+++ b/include/asm-xtensa/atomic.h
@@ -66,7 +66,7 @@ typedef struct { volatile int counter; } atomic_t;
66 * 66 *
67 * Atomically adds @i to @v. 67 * Atomically adds @i to @v.
68 */ 68 */
69extern __inline__ void atomic_add(int i, atomic_t * v) 69static inline void atomic_add(int i, atomic_t * v)
70{ 70{
71 unsigned int vval; 71 unsigned int vval;
72 72
@@ -90,7 +90,7 @@ extern __inline__ void atomic_add(int i, atomic_t * v)
90 * 90 *
91 * Atomically subtracts @i from @v. 91 * Atomically subtracts @i from @v.
92 */ 92 */
93extern __inline__ void atomic_sub(int i, atomic_t *v) 93static inline void atomic_sub(int i, atomic_t *v)
94{ 94{
95 unsigned int vval; 95 unsigned int vval;
96 96
@@ -111,7 +111,7 @@ extern __inline__ void atomic_sub(int i, atomic_t *v)
111 * We use atomic_{add|sub}_return to define other functions. 111 * We use atomic_{add|sub}_return to define other functions.
112 */ 112 */
113 113
114extern __inline__ int atomic_add_return(int i, atomic_t * v) 114static inline int atomic_add_return(int i, atomic_t * v)
115{ 115{
116 unsigned int vval; 116 unsigned int vval;
117 117
@@ -130,7 +130,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
130 return vval; 130 return vval;
131} 131}
132 132
133extern __inline__ int atomic_sub_return(int i, atomic_t * v) 133static inline int atomic_sub_return(int i, atomic_t * v)
134{ 134{
135 unsigned int vval; 135 unsigned int vval;
136 136
@@ -224,7 +224,7 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v)
224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) 224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
225 225
226 226
227extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) 227static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
228{ 228{
229 unsigned int all_f = -1; 229 unsigned int all_f = -1;
230 unsigned int vval; 230 unsigned int vval;
@@ -243,7 +243,7 @@ extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
243 ); 243 );
244} 244}
245 245
246extern __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v) 246static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
247{ 247{
248 unsigned int vval; 248 unsigned int vval;
249 249
diff --git a/include/asm-xtensa/checksum.h b/include/asm-xtensa/checksum.h
index 1a00fad19929..81a797ae3abe 100644
--- a/include/asm-xtensa/checksum.h
+++ b/include/asm-xtensa/checksum.h
@@ -47,14 +47,14 @@ asmlinkage unsigned int csum_partial_copy_generic( const char *src, char *dst, i
47 * If you use these functions directly please don't forget the 47 * If you use these functions directly please don't forget the
48 * verify_area(). 48 * verify_area().
49 */ 49 */
50extern __inline__ 50static inline
51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst, 51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst,
52 int len, int sum) 52 int len, int sum)
53{ 53{
54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL); 54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL);
55} 55}
56 56
57extern __inline__ 57static inline
58unsigned int csum_partial_copy_from_user ( const char *src, char *dst, 58unsigned int csum_partial_copy_from_user ( const char *src, char *dst,
59 int len, int sum, int *err_ptr) 59 int len, int sum, int *err_ptr)
60{ 60{
diff --git a/include/asm-xtensa/delay.h b/include/asm-xtensa/delay.h
index 0a123d53a636..1bc601ec3621 100644
--- a/include/asm-xtensa/delay.h
+++ b/include/asm-xtensa/delay.h
@@ -18,7 +18,7 @@
18 18
19extern unsigned long loops_per_jiffy; 19extern unsigned long loops_per_jiffy;
20 20
21extern __inline__ void __delay(unsigned long loops) 21static inline void __delay(unsigned long loops)
22{ 22{
23 /* 2 cycles per loop. */ 23 /* 2 cycles per loop. */
24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b" 24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b"
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h
index 2c471c42ecfc..c5c13985bbe1 100644
--- a/include/asm-xtensa/io.h
+++ b/include/asm-xtensa/io.h
@@ -41,12 +41,12 @@ static inline unsigned int _swapl (unsigned int v)
41 * These are trivial on the 1:1 Linux/Xtensa mapping 41 * These are trivial on the 1:1 Linux/Xtensa mapping
42 */ 42 */
43 43
44extern inline unsigned long virt_to_phys(volatile void * address) 44static inline unsigned long virt_to_phys(volatile void * address)
45{ 45{
46 return PHYSADDR((unsigned long)address); 46 return PHYSADDR((unsigned long)address);
47} 47}
48 48
49extern inline void * phys_to_virt(unsigned long address) 49static inline void * phys_to_virt(unsigned long address)
50{ 50{
51 return (void*) CACHED_ADDR(address); 51 return (void*) CACHED_ADDR(address);
52} 52}
@@ -55,12 +55,12 @@ extern inline void * phys_to_virt(unsigned long address)
55 * IO bus memory addresses are also 1:1 with the physical address 55 * IO bus memory addresses are also 1:1 with the physical address
56 */ 56 */
57 57
58extern inline unsigned long virt_to_bus(volatile void * address) 58static inline unsigned long virt_to_bus(volatile void * address)
59{ 59{
60 return PHYSADDR((unsigned long)address); 60 return PHYSADDR((unsigned long)address);
61} 61}
62 62
63extern inline void * bus_to_virt (unsigned long address) 63static inline void * bus_to_virt (unsigned long address)
64{ 64{
65 return (void *) CACHED_ADDR(address); 65 return (void *) CACHED_ADDR(address);
66} 66}
@@ -69,17 +69,17 @@ extern inline void * bus_to_virt (unsigned long address)
69 * Change "struct page" to physical address. 69 * Change "struct page" to physical address.
70 */ 70 */
71 71
72extern inline void *ioremap(unsigned long offset, unsigned long size) 72static inline void *ioremap(unsigned long offset, unsigned long size)
73{ 73{
74 return (void *) CACHED_ADDR_IO(offset); 74 return (void *) CACHED_ADDR_IO(offset);
75} 75}
76 76
77extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) 77static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
78{ 78{
79 return (void *) BYPASS_ADDR_IO(offset); 79 return (void *) BYPASS_ADDR_IO(offset);
80} 80}
81 81
82extern inline void iounmap(void *addr) 82static inline void iounmap(void *addr)
83{ 83{
84} 84}
85 85
diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h
index 1b0801548cd9..364a7b057bfa 100644
--- a/include/asm-xtensa/mmu_context.h
+++ b/include/asm-xtensa/mmu_context.h
@@ -199,13 +199,13 @@ extern pgd_t *current_pgd;
199#define ASID_FIRST_VERSION \ 199#define ASID_FIRST_VERSION \
200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED) 200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED)
201 201
202extern inline void set_rasid_register (unsigned long val) 202static inline void set_rasid_register (unsigned long val)
203{ 203{
204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t" 204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t"
205 " isync\n" : : "a" (val)); 205 " isync\n" : : "a" (val));
206} 206}
207 207
208extern inline unsigned long get_rasid_register (void) 208static inline unsigned long get_rasid_register (void)
209{ 209{
210 unsigned long tmp; 210 unsigned long tmp;
211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp)); 211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp));
@@ -215,7 +215,7 @@ extern inline unsigned long get_rasid_register (void)
215 215
216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1)) 216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1))
217 217
218extern inline void 218static inline void
219get_new_mmu_context(struct mm_struct *mm, unsigned long asid) 219get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
220{ 220{
221 extern void flush_tlb_all(void); 221 extern void flush_tlb_all(void);
@@ -234,7 +234,7 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are 234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are
235 really the best, but if you insist... */ 235 really the best, but if you insist... */
236 236
237extern inline int validate_asid (unsigned long asid) 237static inline int validate_asid (unsigned long asid)
238{ 238{
239 switch (asid) { 239 switch (asid) {
240 case XCHAL_MMU_ASID_INVALID: 240 case XCHAL_MMU_ASID_INVALID:
@@ -247,7 +247,7 @@ extern inline int validate_asid (unsigned long asid)
247 return 1; /* valid */ 247 return 1; /* valid */
248} 248}
249 249
250extern inline void 250static inline void
251get_new_mmu_context(struct mm_struct *mm, unsigned long asid) 251get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
252{ 252{
253 extern void flush_tlb_all(void); 253 extern void flush_tlb_all(void);
@@ -274,14 +274,14 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
274 * instance. 274 * instance.
275 */ 275 */
276 276
277extern inline int 277static inline int
278init_new_context(struct task_struct *tsk, struct mm_struct *mm) 278init_new_context(struct task_struct *tsk, struct mm_struct *mm)
279{ 279{
280 mm->context = NO_CONTEXT; 280 mm->context = NO_CONTEXT;
281 return 0; 281 return 0;
282} 282}
283 283
284extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 284static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
285 struct task_struct *tsk) 285 struct task_struct *tsk)
286{ 286{
287 unsigned long asid = asid_cache; 287 unsigned long asid = asid_cache;
@@ -301,7 +301,7 @@ extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
301 * Destroy context related info for an mm_struct that is about 301 * Destroy context related info for an mm_struct that is about
302 * to be put to rest. 302 * to be put to rest.
303 */ 303 */
304extern inline void destroy_context(struct mm_struct *mm) 304static inline void destroy_context(struct mm_struct *mm)
305{ 305{
306 /* Nothing to do. */ 306 /* Nothing to do. */
307} 307}
@@ -310,7 +310,7 @@ extern inline void destroy_context(struct mm_struct *mm)
310 * After we have set current->mm to a new value, this activates 310 * After we have set current->mm to a new value, this activates
311 * the context for the new mm so we see the new mappings. 311 * the context for the new mm so we see the new mappings.
312 */ 312 */
313extern inline void 313static inline void
314activate_mm(struct mm_struct *prev, struct mm_struct *next) 314activate_mm(struct mm_struct *prev, struct mm_struct *next)
315{ 315{
316 /* Unconditionally get a new ASID. */ 316 /* Unconditionally get a new ASID. */
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index b495e5b5a942..8ded36f255a2 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -55,7 +55,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
55 * Pure 2^n version of get_order 55 * Pure 2^n version of get_order
56 */ 56 */
57 57
58extern __inline__ int get_order(unsigned long size) 58static inline int get_order(unsigned long size)
59{ 59{
60 int order; 60 int order;
61#ifndef XCHAL_HAVE_NSU 61#ifndef XCHAL_HAVE_NSU
diff --git a/include/asm-xtensa/page.h.n b/include/asm-xtensa/page.h.n
deleted file mode 100644
index 546cc6624f24..000000000000
--- a/include/asm-xtensa/page.h.n
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * linux/include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/config.h>
18
19/*
20 * PAGE_SHIFT determines the page size
21 * PAGE_ALIGN(x) aligns the pointer to the (next) page boundary
22 */
23#define PAGE_SHIFT XCHAL_MMU_MIN_PTE_PAGE_SIZE
24#define PAGE_SIZE (1 << PAGE_SHIFT)
25#define PAGE_MASK (~(PAGE_SIZE-1))
26#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
27
28#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS)
29#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
30
31#ifdef __ASSEMBLY__
32
33#define __pgprot(x) (x)
34
35#else
36
37
38/*
39 * These are used to make use of C type-checking..
40 */
41typedef struct { unsigned long pte; } pte_t; /* page table entry */
42typedef struct { unsigned long pmd; } pmd_t; /* PMD table entry */
43typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */
44typedef struct { unsigned long pgprot; } pgprot_t;
45
46#define pte_val(x) ((x).pte)
47#define pmd_val(x) ((x).pmd)
48#define pgd_val(x) ((x).pgd)
49#define pgprot_val(x) ((x).pgprot)
50
51#define __pte(x) ((pte_t) { (x) } )
52#define __pmd(x) ((pmd_t) { (x) } )
53#define __pgd(x) ((pgd_t) { (x) } )
54#define __pgprot(x) ((pgprot_t) { (x) } )
55
56/*
57 * Pure 2^n version of get_order
58 */
59extern __inline__ int get_order(unsigned long size)
60{
61 int order;
62#ifndef XCHAL_HAVE_NSU
63 unsigned long x1, x2, x4, x8, x16;
64
65 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
66 x1 = size & 0xAAAAAAAA;
67 x2 = size & 0xCCCCCCCC;
68 x4 = size & 0xF0F0F0F0;
69 x8 = size & 0xFF00FF00;
70 x16 = size & 0xFFFF0000;
71 order = x2 ? 2 : 0;
72 order += (x16 != 0) * 16;
73 order += (x8 != 0) * 8;
74 order += (x4 != 0) * 4;
75 order += (x1 != 0);
76
77 return order;
78#else
79 size = (size - 1) >> PAGE_SHIFT;
80 asm ("nsau %0, %1" : "=r" (order) : "r" (size));
81 return 32 - order;
82#endif
83}
84
85
86struct page;
87extern void clear_page(void *page);
88extern void copy_page(void *to, void *from);
89
90/*
91 * If we have cache aliasing and writeback caches, we might have to do
92 * some extra work
93 */
94
95#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
96void clear_user_page(void *addr, unsigned long vaddr, struct page* page);
97void copy_user_page(void *to, void* from, unsigned long vaddr, struct page* page);
98#else
99# define clear_user_page(page,vaddr,pg) clear_page(page)
100# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
101#endif
102
103
104/*
105 * This handles the memory map. We handle pages at
106 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
107 * These macros are for conversion of kernel address, not user
108 * addresses.
109 */
110
111#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
112#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
113#define pfn_valid(pfn) ((unsigned long)pfn < max_mapnr)
114#ifndef CONFIG_DISCONTIGMEM
115# define pfn_to_page(pfn) (mem_map + (pfn))
116# define page_to_pfn(page) ((unsigned long)((page) - mem_map))
117#else
118# error CONFIG_DISCONTIGMEM not supported
119#endif
120
121#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
122#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
123#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
124#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
125
126#define WANT_PAGE_VIRTUAL
127
128
129#endif /* __ASSEMBLY__ */
130
131#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
132 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
133
134#endif /* __KERNEL__ */
135#endif /* _XTENSA_PAGE_H */
diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h
index 6817742301c2..24eb7fc25da8 100644
--- a/include/asm-xtensa/pci.h
+++ b/include/asm-xtensa/pci.h
@@ -22,12 +22,12 @@
22 22
23extern struct pci_controller* pcibios_alloc_controller(void); 23extern struct pci_controller* pcibios_alloc_controller(void);
24 24
25extern inline void pcibios_set_master(struct pci_dev *dev) 25static inline void pcibios_set_master(struct pci_dev *dev)
26{ 26{
27 /* No special bus mastering setup handling */ 27 /* No special bus mastering setup handling */
28} 28}
29 29
30extern inline void pcibios_penalize_isa_irq(int irq) 30static inline void pcibios_penalize_isa_irq(int irq)
31{ 31{
32 /* We don't do dynamic PCI IRQ allocation */ 32 /* We don't do dynamic PCI IRQ allocation */
33} 33}
diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h
index 0bb6416ae266..883ebc2d75d6 100644
--- a/include/asm-xtensa/pgtable.h
+++ b/include/asm-xtensa/pgtable.h
@@ -260,7 +260,7 @@ static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pt
260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
262 262
263extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 263static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
264{ 264{
265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
266} 266}
@@ -278,14 +278,14 @@ static inline void update_pte(pte_t *ptep, pte_t pteval)
278#endif 278#endif
279} 279}
280 280
281extern inline void 281static inline void
282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval) 282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)
283{ 283{
284 update_pte(ptep, pteval); 284 update_pte(ptep, pteval);
285} 285}
286 286
287 287
288extern inline void 288static inline void
289set_pmd(pmd_t *pmdp, pmd_t pmdval) 289set_pmd(pmd_t *pmdp, pmd_t pmdval)
290{ 290{
291 *pmdp = pmdval; 291 *pmdp = pmdval;
diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h
index c8a7574a9a57..db740b8bc6f0 100644
--- a/include/asm-xtensa/semaphore.h
+++ b/include/asm-xtensa/semaphore.h
@@ -47,7 +47,7 @@ struct semaphore {
47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) 48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
49 49
50extern inline void sema_init (struct semaphore *sem, int val) 50static inline void sema_init (struct semaphore *sem, int val)
51{ 51{
52/* 52/*
53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); 53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
@@ -79,7 +79,7 @@ asmlinkage void __up(struct semaphore * sem);
79 79
80extern spinlock_t semaphore_wake_lock; 80extern spinlock_t semaphore_wake_lock;
81 81
82extern __inline__ void down(struct semaphore * sem) 82static inline void down(struct semaphore * sem)
83{ 83{
84#if WAITQUEUE_DEBUG 84#if WAITQUEUE_DEBUG
85 CHECK_MAGIC(sem->__magic); 85 CHECK_MAGIC(sem->__magic);
@@ -89,7 +89,7 @@ extern __inline__ void down(struct semaphore * sem)
89 __down(sem); 89 __down(sem);
90} 90}
91 91
92extern __inline__ int down_interruptible(struct semaphore * sem) 92static inline int down_interruptible(struct semaphore * sem)
93{ 93{
94 int ret = 0; 94 int ret = 0;
95#if WAITQUEUE_DEBUG 95#if WAITQUEUE_DEBUG
@@ -101,7 +101,7 @@ extern __inline__ int down_interruptible(struct semaphore * sem)
101 return ret; 101 return ret;
102} 102}
103 103
104extern __inline__ int down_trylock(struct semaphore * sem) 104static inline int down_trylock(struct semaphore * sem)
105{ 105{
106 int ret = 0; 106 int ret = 0;
107#if WAITQUEUE_DEBUG 107#if WAITQUEUE_DEBUG
@@ -117,7 +117,7 @@ extern __inline__ int down_trylock(struct semaphore * sem)
117 * Note! This is subtle. We jump to wake people up only if 117 * Note! This is subtle. We jump to wake people up only if
118 * the semaphore was negative (== somebody was waiting on it). 118 * the semaphore was negative (== somebody was waiting on it).
119 */ 119 */
120extern __inline__ void up(struct semaphore * sem) 120static inline void up(struct semaphore * sem)
121{ 121{
122#if WAITQUEUE_DEBUG 122#if WAITQUEUE_DEBUG
123 CHECK_MAGIC(sem->__magic); 123 CHECK_MAGIC(sem->__magic);
diff --git a/include/asm-xtensa/string.h b/include/asm-xtensa/string.h
index 3f81b27d9809..5fb8c27cbef5 100644
--- a/include/asm-xtensa/string.h
+++ b/include/asm-xtensa/string.h
@@ -16,7 +16,7 @@
16#define _XTENSA_STRING_H 16#define _XTENSA_STRING_H
17 17
18#define __HAVE_ARCH_STRCPY 18#define __HAVE_ARCH_STRCPY
19extern __inline__ char *strcpy(char *__dest, const char *__src) 19static inline char *strcpy(char *__dest, const char *__src)
20{ 20{
21 register char *__xdest = __dest; 21 register char *__xdest = __dest;
22 unsigned long __dummy; 22 unsigned long __dummy;
@@ -35,7 +35,7 @@ extern __inline__ char *strcpy(char *__dest, const char *__src)
35} 35}
36 36
37#define __HAVE_ARCH_STRNCPY 37#define __HAVE_ARCH_STRNCPY
38extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n) 38static inline char *strncpy(char *__dest, const char *__src, size_t __n)
39{ 39{
40 register char *__xdest = __dest; 40 register char *__xdest = __dest;
41 unsigned long __dummy; 41 unsigned long __dummy;
@@ -60,7 +60,7 @@ extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n)
60} 60}
61 61
62#define __HAVE_ARCH_STRCMP 62#define __HAVE_ARCH_STRCMP
63extern __inline__ int strcmp(const char *__cs, const char *__ct) 63static inline int strcmp(const char *__cs, const char *__ct)
64{ 64{
65 register int __res; 65 register int __res;
66 unsigned long __dummy; 66 unsigned long __dummy;
@@ -82,7 +82,7 @@ extern __inline__ int strcmp(const char *__cs, const char *__ct)
82} 82}
83 83
84#define __HAVE_ARCH_STRNCMP 84#define __HAVE_ARCH_STRNCMP
85extern __inline__ int strncmp(const char *__cs, const char *__ct, size_t __n) 85static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
86{ 86{
87 register int __res; 87 register int __res;
88 unsigned long __dummy; 88 unsigned long __dummy;
diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h
index 690fe325e671..f09393232e5e 100644
--- a/include/asm-xtensa/system.h
+++ b/include/asm-xtensa/system.h
@@ -56,7 +56,7 @@ static inline int irqs_disabled(void)
56 56
57#define clear_cpenable() __clear_cpenable() 57#define clear_cpenable() __clear_cpenable()
58 58
59extern __inline__ void __clear_cpenable(void) 59static inline void __clear_cpenable(void)
60{ 60{
61#if XCHAL_HAVE_CP 61#if XCHAL_HAVE_CP
62 unsigned long i = 0; 62 unsigned long i = 0;
@@ -64,7 +64,7 @@ extern __inline__ void __clear_cpenable(void)
64#endif 64#endif
65} 65}
66 66
67extern __inline__ void enable_coprocessor(int i) 67static inline void enable_coprocessor(int i)
68{ 68{
69#if XCHAL_HAVE_CP 69#if XCHAL_HAVE_CP
70 int cp; 70 int cp;
@@ -74,7 +74,7 @@ extern __inline__ void enable_coprocessor(int i)
74#endif 74#endif
75} 75}
76 76
77extern __inline__ void disable_coprocessor(int i) 77static inline void disable_coprocessor(int i)
78{ 78{
79#if XCHAL_HAVE_CP 79#if XCHAL_HAVE_CP
80 int cp; 80 int cp;
@@ -123,7 +123,7 @@ do { \
123 * cmpxchg 123 * cmpxchg
124 */ 124 */
125 125
126extern __inline__ unsigned long 126static inline unsigned long
127__cmpxchg_u32(volatile int *p, int old, int new) 127__cmpxchg_u32(volatile int *p, int old, int new)
128{ 128{
129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
@@ -173,7 +173,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
173 * where no register reference will cause an overflow. 173 * where no register reference will cause an overflow.
174 */ 174 */
175 175
176extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) 176static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
177{ 177{
178 unsigned long tmp; 178 unsigned long tmp;
179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h
index 23bfe9db45f5..43f6ec859af9 100644
--- a/include/asm-xtensa/tlbflush.h
+++ b/include/asm-xtensa/tlbflush.h
@@ -39,7 +39,7 @@ extern void flush_tlb_range(struct vm_area_struct*,unsigned long,unsigned long);
39 * page-table pages. 39 * page-table pages.
40 */ 40 */
41 41
42extern inline void flush_tlb_pgtables(struct mm_struct *mm, 42static inline void flush_tlb_pgtables(struct mm_struct *mm,
43 unsigned long start, unsigned long end) 43 unsigned long start, unsigned long end)
44{ 44{
45} 45}
@@ -51,26 +51,26 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm,
51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2) 51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2)
52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2) 52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2)
53 53
54extern inline unsigned long itlb_probe(unsigned long addr) 54static inline unsigned long itlb_probe(unsigned long addr)
55{ 55{
56 unsigned long tmp; 56 unsigned long tmp;
57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); 57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
58 return tmp; 58 return tmp;
59} 59}
60 60
61extern inline unsigned long dtlb_probe(unsigned long addr) 61static inline unsigned long dtlb_probe(unsigned long addr)
62{ 62{
63 unsigned long tmp; 63 unsigned long tmp;
64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); 64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
65 return tmp; 65 return tmp;
66} 66}
67 67
68extern inline void invalidate_itlb_entry (unsigned long probe) 68static inline void invalidate_itlb_entry (unsigned long probe)
69{ 69{
70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe)); 70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
71} 71}
72 72
73extern inline void invalidate_dtlb_entry (unsigned long probe) 73static inline void invalidate_dtlb_entry (unsigned long probe)
74{ 74{
75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe)); 75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
76} 76}
@@ -80,68 +80,68 @@ extern inline void invalidate_dtlb_entry (unsigned long probe)
80 * caller must follow up with an 'isync', which can be relatively 80 * caller must follow up with an 'isync', which can be relatively
81 * expensive on some Xtensa implementations. 81 * expensive on some Xtensa implementations.
82 */ 82 */
83extern inline void invalidate_itlb_entry_no_isync (unsigned entry) 83static inline void invalidate_itlb_entry_no_isync (unsigned entry)
84{ 84{
85 /* Caller must follow up with 'isync'. */ 85 /* Caller must follow up with 'isync'. */
86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) ); 86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
87} 87}
88 88
89extern inline void invalidate_dtlb_entry_no_isync (unsigned entry) 89static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
90{ 90{
91 /* Caller must follow up with 'isync'. */ 91 /* Caller must follow up with 'isync'. */
92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) ); 92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
93} 93}
94 94
95extern inline void set_itlbcfg_register (unsigned long val) 95static inline void set_itlbcfg_register (unsigned long val)
96{ 96{
97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t" 97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t"
98 : : "a" (val)); 98 : : "a" (val));
99} 99}
100 100
101extern inline void set_dtlbcfg_register (unsigned long val) 101static inline void set_dtlbcfg_register (unsigned long val)
102{ 102{
103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t" 103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t"
104 : : "a" (val)); 104 : : "a" (val));
105} 105}
106 106
107extern inline void set_ptevaddr_register (unsigned long val) 107static inline void set_ptevaddr_register (unsigned long val)
108{ 108{
109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n" 109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n"
110 : : "a" (val)); 110 : : "a" (val));
111} 111}
112 112
113extern inline unsigned long read_ptevaddr_register (void) 113static inline unsigned long read_ptevaddr_register (void)
114{ 114{
115 unsigned long tmp; 115 unsigned long tmp;
116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp)); 116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp));
117 return tmp; 117 return tmp;
118} 118}
119 119
120extern inline void write_dtlb_entry (pte_t entry, int way) 120static inline void write_dtlb_entry (pte_t entry, int way)
121{ 121{
122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t" 122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
123 : : "r" (way), "r" (entry) ); 123 : : "r" (way), "r" (entry) );
124} 124}
125 125
126extern inline void write_itlb_entry (pte_t entry, int way) 126static inline void write_itlb_entry (pte_t entry, int way)
127{ 127{
128 __asm__ __volatile__("witlb %1, %0; isync\n\t" 128 __asm__ __volatile__("witlb %1, %0; isync\n\t"
129 : : "r" (way), "r" (entry) ); 129 : : "r" (way), "r" (entry) );
130} 130}
131 131
132extern inline void invalidate_page_directory (void) 132static inline void invalidate_page_directory (void)
133{ 133{
134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE); 134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE);
135} 135}
136 136
137extern inline void invalidate_itlb_mapping (unsigned address) 137static inline void invalidate_itlb_mapping (unsigned address)
138{ 138{
139 unsigned long tlb_entry; 139 unsigned long tlb_entry;
140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS) 140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS)
141 invalidate_itlb_entry (tlb_entry); 141 invalidate_itlb_entry (tlb_entry);
142} 142}
143 143
144extern inline void invalidate_dtlb_mapping (unsigned address) 144static inline void invalidate_dtlb_mapping (unsigned address)
145{ 145{
146 unsigned long tlb_entry; 146 unsigned long tlb_entry;
147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS) 147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS)
@@ -165,28 +165,28 @@ extern inline void invalidate_dtlb_mapping (unsigned address)
165 * as[07..00] contain the asid 165 * as[07..00] contain the asid
166 */ 166 */
167 167
168extern inline unsigned long read_dtlb_virtual (int way) 168static inline unsigned long read_dtlb_virtual (int way)
169{ 169{
170 unsigned long tmp; 170 unsigned long tmp;
171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
172 return tmp; 172 return tmp;
173} 173}
174 174
175extern inline unsigned long read_dtlb_translation (int way) 175static inline unsigned long read_dtlb_translation (int way)
176{ 176{
177 unsigned long tmp; 177 unsigned long tmp;
178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
179 return tmp; 179 return tmp;
180} 180}
181 181
182extern inline unsigned long read_itlb_virtual (int way) 182static inline unsigned long read_itlb_virtual (int way)
183{ 183{
184 unsigned long tmp; 184 unsigned long tmp;
185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
186 return tmp; 186 return tmp;
187} 187}
188 188
189extern inline unsigned long read_itlb_translation (int way) 189static inline unsigned long read_itlb_translation (int way)
190{ 190{
191 unsigned long tmp; 191 unsigned long tmp;
192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
diff --git a/include/asm-xtensa/types.h b/include/asm-xtensa/types.h
index ebac00469852..9d99a8e9e337 100644
--- a/include/asm-xtensa/types.h
+++ b/include/asm-xtensa/types.h
@@ -58,8 +58,6 @@ typedef unsigned long long u64;
58 58
59typedef u32 dma_addr_t; 59typedef u32 dma_addr_t;
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
64#endif 62#endif
65 63
diff --git a/include/asm-xtensa/uaccess.h b/include/asm-xtensa/uaccess.h
index 35576b25c7b2..fc268ac923c0 100644
--- a/include/asm-xtensa/uaccess.h
+++ b/include/asm-xtensa/uaccess.h
@@ -211,7 +211,7 @@
211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size))) 211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size)))
212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size)) 212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
213 213
214extern inline int verify_area(int type, const void * addr, unsigned long size) 214static inline int verify_area(int type, const void * addr, unsigned long size)
215{ 215{
216 return access_ok(type,addr,size) ? 0 : -EFAULT; 216 return access_ok(type,addr,size) ? 0 : -EFAULT;
217} 217}
@@ -464,7 +464,7 @@ __generic_copy_from_user(void *to, const void *from, unsigned long n)
464 * success. 464 * success.
465 */ 465 */
466 466
467extern inline unsigned long 467static inline unsigned long
468__xtensa_clear_user(void *addr, unsigned long size) 468__xtensa_clear_user(void *addr, unsigned long size)
469{ 469{
470 if ( ! memset(addr, 0, size) ) 470 if ( ! memset(addr, 0, size) )
@@ -472,7 +472,7 @@ __xtensa_clear_user(void *addr, unsigned long size)
472 return 0; 472 return 0;
473} 473}
474 474
475extern inline unsigned long 475static inline unsigned long
476clear_user(void *addr, unsigned long size) 476clear_user(void *addr, unsigned long size)
477{ 477{
478 if (access_ok(VERIFY_WRITE, addr, size)) 478 if (access_ok(VERIFY_WRITE, addr, size))
@@ -486,7 +486,7 @@ clear_user(void *addr, unsigned long size)
486extern long __strncpy_user(char *, const char *, long); 486extern long __strncpy_user(char *, const char *, long);
487#define __strncpy_from_user __strncpy_user 487#define __strncpy_from_user __strncpy_user
488 488
489extern inline long 489static inline long
490strncpy_from_user(char *dst, const char *src, long count) 490strncpy_from_user(char *dst, const char *src, long count)
491{ 491{
492 if (access_ok(VERIFY_READ, src, 1)) 492 if (access_ok(VERIFY_READ, src, 1))
@@ -502,7 +502,7 @@ strncpy_from_user(char *dst, const char *src, long count)
502 */ 502 */
503extern long __strnlen_user(const char *, long); 503extern long __strnlen_user(const char *, long);
504 504
505extern inline long strnlen_user(const char *str, long len) 505static inline long strnlen_user(const char *str, long len)
506{ 506{
507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1; 507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1;
508 508
diff --git a/include/linux/capability.h b/include/linux/capability.h
index 8d139f4acf23..6b4618902d3d 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -233,6 +233,7 @@ typedef __u32 kernel_cap_t;
233/* Allow enabling/disabling tagged queuing on SCSI controllers and sending 233/* Allow enabling/disabling tagged queuing on SCSI controllers and sending
234 arbitrary SCSI commands */ 234 arbitrary SCSI commands */
235/* Allow setting encryption key on loopback filesystem */ 235/* Allow setting encryption key on loopback filesystem */
236/* Allow setting zone reclaim policy */
236 237
237#define CAP_SYS_ADMIN 21 238#define CAP_SYS_ADMIN 21
238 239
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index e8904c0da686..86980c68234a 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -8,7 +8,7 @@
8 * Basic handling of the devices is done in drivers/base/cpu.c 8 * Basic handling of the devices is done in drivers/base/cpu.c
9 * and system devices are handled in drivers/base/sys.c. 9 * and system devices are handled in drivers/base/sys.c.
10 * 10 *
11 * CPUs are exported via driverfs in the class/cpu/devices/ 11 * CPUs are exported via sysfs in the class/cpu/devices/
12 * directory. 12 * directory.
13 * 13 *
14 * Per-cpu interfaces can be implemented using a struct device_interface. 14 * Per-cpu interfaces can be implemented using a struct device_interface.
diff --git a/include/linux/crypto.h b/include/linux/crypto.h
index 5e2bcc636a02..3c89df6e7768 100644
--- a/include/linux/crypto.h
+++ b/include/linux/crypto.h
@@ -45,6 +45,7 @@
45#define CRYPTO_TFM_MODE_CTR 0x00000008 45#define CRYPTO_TFM_MODE_CTR 0x00000008
46 46
47#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100 47#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100
48#define CRYPTO_TFM_REQ_MAY_SLEEP 0x00000200
48#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000 49#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000
49#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000 50#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000
50#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000 51#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 73781ec165b4..c7c5dd316182 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -91,11 +91,6 @@ typedef struct {
91 91
92#define EFI_PAGE_SHIFT 12 92#define EFI_PAGE_SHIFT 12
93 93
94/*
95 * For current x86 implementations of EFI, there is
96 * additional padding in the mem descriptors. This is not
97 * the case in ia64. Need to have this fixed in the f/w.
98 */
99typedef struct { 94typedef struct {
100 u32 type; 95 u32 type;
101 u32 pad; 96 u32 pad;
@@ -103,9 +98,6 @@ typedef struct {
103 u64 virt_addr; 98 u64 virt_addr;
104 u64 num_pages; 99 u64 num_pages;
105 u64 attribute; 100 u64 attribute;
106#if defined (__i386__)
107 u64 pad1;
108#endif
109} efi_memory_desc_t; 101} efi_memory_desc_t;
110 102
111typedef int (*efi_freemem_callback_t) (unsigned long start, unsigned long end, void *arg); 103typedef int (*efi_freemem_callback_t) (unsigned long start, unsigned long end, void *arg);
@@ -240,10 +232,12 @@ typedef struct {
240} efi_system_table_t; 232} efi_system_table_t;
241 233
242struct efi_memory_map { 234struct efi_memory_map {
243 efi_memory_desc_t *phys_map; 235 void *phys_map;
244 efi_memory_desc_t *map; 236 void *map;
237 void *map_end;
245 int nr_map; 238 int nr_map;
246 unsigned long desc_version; 239 unsigned long desc_version;
240 unsigned long desc_size;
247}; 241};
248 242
249/* 243/*
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index ce8518e658b6..4522c7186bf3 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -69,6 +69,12 @@ static inline int is_multicast_ether_addr(const u8 *addr)
69 return ((addr[0] != 0xff) && (0x01 & addr[0])); 69 return ((addr[0] != 0xff) && (0x01 & addr[0]));
70} 70}
71 71
72static inline int is_broadcast_ether_addr(const u8 *addr)
73{
74 return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) &&
75 (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
76}
77
72/** 78/**
73 * is_valid_ether_addr - Determine if the given Ethernet address is valid 79 * is_valid_ether_addr - Determine if the given Ethernet address is valid
74 * @addr: Pointer to a six-byte array containing the Ethernet address 80 * @addr: Pointer to a six-byte array containing the Ethernet address
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index f529d1442815..e670b0d13fe0 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -70,12 +70,6 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
70void hugetlb_prefault_arch_hook(struct mm_struct *mm); 70void hugetlb_prefault_arch_hook(struct mm_struct *mm);
71#endif 71#endif
72 72
73#ifndef ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
74#define hugetlb_clean_stale_pgtable(pte) BUG()
75#else
76void hugetlb_clean_stale_pgtable(pte_t *pte);
77#endif
78
79#else /* !CONFIG_HUGETLB_PAGE */ 73#else /* !CONFIG_HUGETLB_PAGE */
80 74
81static inline int is_vm_hugetlb_page(struct vm_area_struct *vma) 75static inline int is_vm_hugetlb_page(struct vm_area_struct *vma)
diff --git a/include/linux/if_tun.h b/include/linux/if_tun.h
index 096a85a58ae5..88aef7b86ef4 100644
--- a/include/linux/if_tun.h
+++ b/include/linux/if_tun.h
@@ -77,6 +77,7 @@ struct tun_struct {
77#define TUNSETIFF _IOW('T', 202, int) 77#define TUNSETIFF _IOW('T', 202, int)
78#define TUNSETPERSIST _IOW('T', 203, int) 78#define TUNSETPERSIST _IOW('T', 203, int)
79#define TUNSETOWNER _IOW('T', 204, int) 79#define TUNSETOWNER _IOW('T', 204, int)
80#define TUNSETLINK _IOW('T', 205, int)
80 81
81/* TUNSETIFF ifr flags */ 82/* TUNSETIFF ifr flags */
82#define IFF_TUN 0x0001 83#define IFF_TUN 0x0001
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 8480aef10e62..94a46f38c532 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -150,6 +150,9 @@ void mpol_free_shared_policy(struct shared_policy *p);
150struct mempolicy *mpol_shared_policy_lookup(struct shared_policy *sp, 150struct mempolicy *mpol_shared_policy_lookup(struct shared_policy *sp,
151 unsigned long idx); 151 unsigned long idx);
152 152
153struct mempolicy *get_vma_policy(struct task_struct *task,
154 struct vm_area_struct *vma, unsigned long addr);
155
153extern void numa_default_policy(void); 156extern void numa_default_policy(void);
154extern void numa_policy_init(void); 157extern void numa_policy_init(void);
155 158
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 9a0893f3249e..30f68c0c8c6e 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -46,6 +46,12 @@ struct mmc_ios {
46#define MMC_BUSMODE_OPENDRAIN 1 46#define MMC_BUSMODE_OPENDRAIN 1
47#define MMC_BUSMODE_PUSHPULL 2 47#define MMC_BUSMODE_PUSHPULL 2
48 48
49 unsigned char chip_select; /* SPI chip select */
50
51#define MMC_CS_DONTCARE 0
52#define MMC_CS_HIGH 1
53#define MMC_CS_LOW 2
54
49 unsigned char power_mode; /* power supply mode */ 55 unsigned char power_mode; /* power supply mode */
50 56
51#define MMC_POWER_OFF 0 57#define MMC_POWER_OFF 0
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 6c90461ed99f..5ed471b58f4f 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -487,11 +487,27 @@ struct mem_section {
487 unsigned long section_mem_map; 487 unsigned long section_mem_map;
488}; 488};
489 489
490extern struct mem_section mem_section[NR_MEM_SECTIONS]; 490#ifdef CONFIG_SPARSEMEM_EXTREME
491#define SECTIONS_PER_ROOT (PAGE_SIZE / sizeof (struct mem_section))
492#else
493#define SECTIONS_PER_ROOT 1
494#endif
495
496#define SECTION_NR_TO_ROOT(sec) ((sec) / SECTIONS_PER_ROOT)
497#define NR_SECTION_ROOTS (NR_MEM_SECTIONS / SECTIONS_PER_ROOT)
498#define SECTION_ROOT_MASK (SECTIONS_PER_ROOT - 1)
499
500#ifdef CONFIG_SPARSEMEM_EXTREME
501extern struct mem_section *mem_section[NR_SECTION_ROOTS];
502#else
503extern struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT];
504#endif
491 505
492static inline struct mem_section *__nr_to_section(unsigned long nr) 506static inline struct mem_section *__nr_to_section(unsigned long nr)
493{ 507{
494 return &mem_section[nr]; 508 if (!mem_section[SECTION_NR_TO_ROOT(nr)])
509 return NULL;
510 return &mem_section[SECTION_NR_TO_ROOT(nr)][nr & SECTION_ROOT_MASK];
495} 511}
496 512
497/* 513/*
@@ -513,12 +529,12 @@ static inline struct page *__section_mem_map_addr(struct mem_section *section)
513 529
514static inline int valid_section(struct mem_section *section) 530static inline int valid_section(struct mem_section *section)
515{ 531{
516 return (section->section_mem_map & SECTION_MARKED_PRESENT); 532 return (section && (section->section_mem_map & SECTION_MARKED_PRESENT));
517} 533}
518 534
519static inline int section_has_mem_map(struct mem_section *section) 535static inline int section_has_mem_map(struct mem_section *section)
520{ 536{
521 return (section->section_mem_map & SECTION_HAS_MEM_MAP); 537 return (section && (section->section_mem_map & SECTION_HAS_MEM_MAP));
522} 538}
523 539
524static inline int valid_section_nr(unsigned long nr) 540static inline int valid_section_nr(unsigned long nr)
@@ -572,6 +588,7 @@ static inline int pfn_valid(unsigned long pfn)
572void sparse_init(void); 588void sparse_init(void);
573#else 589#else
574#define sparse_init() do {} while (0) 590#define sparse_init() do {} while (0)
591#define sparse_index_init(_sec, _nid) do {} while (0)
575#endif /* CONFIG_SPARSEMEM */ 592#endif /* CONFIG_SPARSEMEM */
576 593
577#ifdef CONFIG_NODES_SPAN_OTHER_NODES 594#ifdef CONFIG_NODES_SPAN_OTHER_NODES
diff --git a/include/linux/mv643xx.h b/include/linux/mv643xx.h
index 5773ea42f6e4..0b08cd692201 100644
--- a/include/linux/mv643xx.h
+++ b/include/linux/mv643xx.h
@@ -980,7 +980,7 @@
980/* I2C Registers */ 980/* I2C Registers */
981/****************************************/ 981/****************************************/
982 982
983#define MV64XXX_I2C_CTLR_NAME "mv64xxx i2c" 983#define MV64XXX_I2C_CTLR_NAME "mv64xxx_i2c"
984#define MV64XXX_I2C_OFFSET 0xc000 984#define MV64XXX_I2C_OFFSET 0xc000
985#define MV64XXX_I2C_REG_BLOCK_SIZE 0x0020 985#define MV64XXX_I2C_REG_BLOCK_SIZE 0x0020
986 986
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index f5a6695d4d21..f34767c5fc79 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -134,6 +134,7 @@ struct page_state {
134}; 134};
135 135
136extern void get_page_state(struct page_state *ret); 136extern void get_page_state(struct page_state *ret);
137extern void get_page_state_node(struct page_state *ret, int node);
137extern void get_full_page_state(struct page_state *ret); 138extern void get_full_page_state(struct page_state *ret);
138extern unsigned long __read_page_state(unsigned long offset); 139extern unsigned long __read_page_state(unsigned long offset);
139extern void __mod_page_state(unsigned long offset, unsigned long delta); 140extern void __mod_page_state(unsigned long offset, unsigned long delta);
@@ -194,6 +195,7 @@ extern void __mod_page_state(unsigned long offset, unsigned long delta);
194#define SetPageDirty(page) set_bit(PG_dirty, &(page)->flags) 195#define SetPageDirty(page) set_bit(PG_dirty, &(page)->flags)
195#define TestSetPageDirty(page) test_and_set_bit(PG_dirty, &(page)->flags) 196#define TestSetPageDirty(page) test_and_set_bit(PG_dirty, &(page)->flags)
196#define ClearPageDirty(page) clear_bit(PG_dirty, &(page)->flags) 197#define ClearPageDirty(page) clear_bit(PG_dirty, &(page)->flags)
198#define __ClearPageDirty(page) __clear_bit(PG_dirty, &(page)->flags)
197#define TestClearPageDirty(page) test_and_clear_bit(PG_dirty, &(page)->flags) 199#define TestClearPageDirty(page) test_and_clear_bit(PG_dirty, &(page)->flags)
198 200
199#define SetPageLRU(page) set_bit(PG_lru, &(page)->flags) 201#define SetPageLRU(page) set_bit(PG_lru, &(page)->flags)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d513c1634006..95c941f8c747 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2147,6 +2147,9 @@
2147#define PCI_DEVICE_ID_ENE_1420 0x1420 2147#define PCI_DEVICE_ID_ENE_1420 0x1420
2148#define PCI_VENDOR_ID_CHELSIO 0x1425 2148#define PCI_VENDOR_ID_CHELSIO 0x1425
2149 2149
2150#define PCI_VENDOR_ID_MIPS 0x153f
2151#define PCI_DEVICE_ID_SOC_IT 0x0001
2152
2150#define PCI_VENDOR_ID_SYBA 0x1592 2153#define PCI_VENDOR_ID_SYBA 0x1592
2151#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 2154#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
2152#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 2155#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 7aeb208ed713..5cfb07648eca 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -186,7 +186,9 @@ extern int pm_suspend(suspend_state_t state);
186 186
187struct device; 187struct device;
188 188
189typedef u32 __bitwise pm_message_t; 189typedef struct pm_message {
190 int event;
191} pm_message_t;
190 192
191/* 193/*
192 * There are 4 important states driver can be in: 194 * There are 4 important states driver can be in:
@@ -207,9 +209,13 @@ typedef u32 __bitwise pm_message_t;
207 * or something similar soon. 209 * or something similar soon.
208 */ 210 */
209 211
210#define PMSG_FREEZE ((__force pm_message_t) 3) 212#define PM_EVENT_ON 0
211#define PMSG_SUSPEND ((__force pm_message_t) 3) 213#define PM_EVENT_FREEZE 1
212#define PMSG_ON ((__force pm_message_t) 0) 214#define PM_EVENT_SUSPEND 2
215
216#define PMSG_FREEZE ((struct pm_message){ .event = PM_EVENT_FREEZE, })
217#define PMSG_SUSPEND ((struct pm_message){ .event = PM_EVENT_SUSPEND, })
218#define PMSG_ON ((struct pm_message){ .event = PM_EVENT_ON, })
213 219
214struct dev_pm_info { 220struct dev_pm_info {
215 pm_message_t power_state; 221 pm_message_t power_state;
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index a373fc254df2..2afdafb62123 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -20,6 +20,8 @@
20#define PTRACE_DETACH 0x11 20#define PTRACE_DETACH 0x11
21 21
22#define PTRACE_SYSCALL 24 22#define PTRACE_SYSCALL 24
23#define PTRACE_SYSEMU 31
24#define PTRACE_SYSEMU_SINGLESTEP 32
23 25
24/* 0x4200-0x4300 are reserved for architecture-independent additions. */ 26/* 0x4200-0x4300 are reserved for architecture-independent additions. */
25#define PTRACE_SETOPTIONS 0x4200 27#define PTRACE_SETOPTIONS 0x4200
diff --git a/include/linux/serial.h b/include/linux/serial.h
index 9f2d85284d0b..12cd9cf65e8f 100644
--- a/include/linux/serial.h
+++ b/include/linux/serial.h
@@ -176,10 +176,6 @@ struct serial_icounter_struct {
176#ifdef __KERNEL__ 176#ifdef __KERNEL__
177#include <linux/compiler.h> 177#include <linux/compiler.h>
178 178
179/* Export to allow PCMCIA to use this - Dave Hinds */
180extern int __deprecated register_serial(struct serial_struct *req);
181extern void __deprecated unregister_serial(int line);
182
183/* Allow architectures to override entries in serial8250_ports[] at run time: */ 179/* Allow architectures to override entries in serial8250_ports[] at run time: */
184struct uart_port; /* forward declaration */ 180struct uart_port; /* forward declaration */
185extern int early_serial_setup(struct uart_port *port); 181extern int early_serial_setup(struct uart_port *port);
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 3e3c1fa35b06..d8a023d804d4 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -14,6 +14,9 @@
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/device.h> 15#include <linux/device.h>
16 16
17/*
18 * This is the platform device platform_data structure
19 */
17struct plat_serial8250_port { 20struct plat_serial8250_port {
18 unsigned long iobase; /* io base address */ 21 unsigned long iobase; /* io base address */
19 void __iomem *membase; /* ioremap cookie or NULL */ 22 void __iomem *membase; /* ioremap cookie or NULL */
@@ -26,4 +29,17 @@ struct plat_serial8250_port {
26 unsigned int flags; /* UPF_* flags */ 29 unsigned int flags; /* UPF_* flags */
27}; 30};
28 31
32/*
33 * This should be used by drivers which want to register
34 * their own 8250 ports without registering their own
35 * platform device. Using these will make your driver
36 * dependent on the 8250 driver.
37 */
38struct uart_port;
39
40int serial8250_register_port(struct uart_port *);
41void serial8250_unregister_port(int line);
42void serial8250_suspend_port(int line);
43void serial8250_resume_port(int line);
44
29#endif 45#endif
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index f6fca8f2f3ca..cf0f64ea2bc0 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -142,8 +142,8 @@ struct uart_ops {
142 unsigned int (*tx_empty)(struct uart_port *); 142 unsigned int (*tx_empty)(struct uart_port *);
143 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 143 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
144 unsigned int (*get_mctrl)(struct uart_port *); 144 unsigned int (*get_mctrl)(struct uart_port *);
145 void (*stop_tx)(struct uart_port *, unsigned int tty_stop); 145 void (*stop_tx)(struct uart_port *);
146 void (*start_tx)(struct uart_port *, unsigned int tty_start); 146 void (*start_tx)(struct uart_port *);
147 void (*send_xchar)(struct uart_port *, char ch); 147 void (*send_xchar)(struct uart_port *, char ch);
148 void (*stop_rx)(struct uart_port *); 148 void (*stop_rx)(struct uart_port *);
149 void (*enable_ms)(struct uart_port *); 149 void (*enable_ms)(struct uart_port *);
@@ -360,8 +360,6 @@ struct tty_driver *uart_console_device(struct console *co, int *index);
360 */ 360 */
361int uart_register_driver(struct uart_driver *uart); 361int uart_register_driver(struct uart_driver *uart);
362void uart_unregister_driver(struct uart_driver *uart); 362void uart_unregister_driver(struct uart_driver *uart);
363void __deprecated uart_unregister_port(struct uart_driver *reg, int line);
364int __deprecated uart_register_port(struct uart_driver *reg, struct uart_port *port);
365int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 363int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
366int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 364int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
367int uart_match_port(struct uart_port *port1, struct uart_port *port2); 365int uart_match_port(struct uart_port *port1, struct uart_port *port2);
@@ -468,13 +466,13 @@ uart_handle_cts_change(struct uart_port *port, unsigned int status)
468 if (tty->hw_stopped) { 466 if (tty->hw_stopped) {
469 if (status) { 467 if (status) {
470 tty->hw_stopped = 0; 468 tty->hw_stopped = 0;
471 port->ops->start_tx(port, 0); 469 port->ops->start_tx(port);
472 uart_write_wakeup(port); 470 uart_write_wakeup(port);
473 } 471 }
474 } else { 472 } else {
475 if (!status) { 473 if (!status) {
476 tty->hw_stopped = 1; 474 tty->hw_stopped = 1;
477 port->ops->stop_tx(port, 0); 475 port->ops->stop_tx(port);
478 } 476 }
479 } 477 }
480 } 478 }
diff --git a/include/linux/swap.h b/include/linux/swap.h
index bfe3e763ccf2..3c9ff0048153 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -107,6 +107,8 @@ enum {
107 SWP_USED = (1 << 0), /* is slot in swap_info[] used? */ 107 SWP_USED = (1 << 0), /* is slot in swap_info[] used? */
108 SWP_WRITEOK = (1 << 1), /* ok to write to this swap? */ 108 SWP_WRITEOK = (1 << 1), /* ok to write to this swap? */
109 SWP_ACTIVE = (SWP_USED | SWP_WRITEOK), 109 SWP_ACTIVE = (SWP_USED | SWP_WRITEOK),
110 /* add others here before... */
111 SWP_SCANNING = (1 << 8), /* refcount in scan_swap_map */
110}; 112};
111 113
112#define SWAP_CLUSTER_MAX 32 114#define SWAP_CLUSTER_MAX 32
@@ -116,16 +118,13 @@ enum {
116 118
117/* 119/*
118 * The in-memory structure used to track swap areas. 120 * The in-memory structure used to track swap areas.
119 * extent_list.prev points at the lowest-index extent. That list is
120 * sorted.
121 */ 121 */
122struct swap_info_struct { 122struct swap_info_struct {
123 unsigned int flags; 123 unsigned int flags;
124 spinlock_t sdev_lock; 124 int prio; /* swap priority */
125 struct file *swap_file; 125 struct file *swap_file;
126 struct block_device *bdev; 126 struct block_device *bdev;
127 struct list_head extent_list; 127 struct list_head extent_list;
128 int nr_extents;
129 struct swap_extent *curr_swap_extent; 128 struct swap_extent *curr_swap_extent;
130 unsigned old_block_size; 129 unsigned old_block_size;
131 unsigned short * swap_map; 130 unsigned short * swap_map;
@@ -133,10 +132,9 @@ struct swap_info_struct {
133 unsigned int highest_bit; 132 unsigned int highest_bit;
134 unsigned int cluster_next; 133 unsigned int cluster_next;
135 unsigned int cluster_nr; 134 unsigned int cluster_nr;
136 int prio; /* swap priority */ 135 unsigned int pages;
137 int pages; 136 unsigned int max;
138 unsigned long max; 137 unsigned int inuse_pages;
139 unsigned long inuse_pages;
140 int next; /* next entry on swap list */ 138 int next; /* next entry on swap list */
141}; 139};
142 140
@@ -222,13 +220,7 @@ extern int can_share_swap_page(struct page *);
222extern int remove_exclusive_swap_page(struct page *); 220extern int remove_exclusive_swap_page(struct page *);
223struct backing_dev_info; 221struct backing_dev_info;
224 222
225extern struct swap_list_t swap_list; 223extern spinlock_t swap_lock;
226extern spinlock_t swaplock;
227
228#define swap_list_lock() spin_lock(&swaplock)
229#define swap_list_unlock() spin_unlock(&swaplock)
230#define swap_device_lock(p) spin_lock(&p->sdev_lock)
231#define swap_device_unlock(p) spin_unlock(&p->sdev_lock)
232 224
233/* linux/mm/thrash.c */ 225/* linux/mm/thrash.c */
234extern struct mm_struct * swap_token_mm; 226extern struct mm_struct * swap_token_mm;
diff --git a/include/linux/swapops.h b/include/linux/swapops.h
index d4c7db35e708..87b9d14c710d 100644
--- a/include/linux/swapops.h
+++ b/include/linux/swapops.h
@@ -4,7 +4,7 @@
4 * the low-order bits. 4 * the low-order bits.
5 * 5 *
6 * We arrange the `type' and `offset' fields so that `type' is at the five 6 * We arrange the `type' and `offset' fields so that `type' is at the five
7 * high-order bits of the smp_entry_t and `offset' is right-aligned in the 7 * high-order bits of the swp_entry_t and `offset' is right-aligned in the
8 * remaining bits. 8 * remaining bits.
9 * 9 *
10 * swp_entry_t's are *never* stored anywhere in their arch-dependent format. 10 * swp_entry_t's are *never* stored anywhere in their arch-dependent format.
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 6409d9cf5965..b244f69ef682 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -10,6 +10,14 @@
10#define VM_MAP 0x00000004 /* vmap()ed pages */ 10#define VM_MAP 0x00000004 /* vmap()ed pages */
11/* bits [20..32] reserved for arch specific ioremap internals */ 11/* bits [20..32] reserved for arch specific ioremap internals */
12 12
13/*
14 * Maximum alignment for ioremap() regions.
15 * Can be overriden by arch-specific value.
16 */
17#ifndef IOREMAP_MAX_ORDER
18#define IOREMAP_MAX_ORDER (7 + PAGE_SHIFT) /* 128 pages */
19#endif
20
13struct vm_struct { 21struct vm_struct {
14 void *addr; 22 void *addr;
15 unsigned long size; 23 unsigned long size;
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
index db09580ad14b..dc36b1be6745 100644
--- a/include/net/ieee80211.h
+++ b/include/net/ieee80211.h
@@ -20,18 +20,9 @@
20 */ 20 */
21#ifndef IEEE80211_H 21#ifndef IEEE80211_H
22#define IEEE80211_H 22#define IEEE80211_H
23
24#include <linux/if_ether.h> /* ETH_ALEN */ 23#include <linux/if_ether.h> /* ETH_ALEN */
25#include <linux/kernel.h> /* ARRAY_SIZE */ 24#include <linux/kernel.h> /* ARRAY_SIZE */
26 25#include <linux/wireless.h>
27#if WIRELESS_EXT < 17
28#define IW_QUAL_QUAL_INVALID 0x10
29#define IW_QUAL_LEVEL_INVALID 0x20
30#define IW_QUAL_NOISE_INVALID 0x40
31#define IW_QUAL_QUAL_UPDATED 0x1
32#define IW_QUAL_LEVEL_UPDATED 0x2
33#define IW_QUAL_NOISE_UPDATED 0x4
34#endif
35 26
36#define IEEE80211_DATA_LEN 2304 27#define IEEE80211_DATA_LEN 2304
37/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section 28/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
@@ -47,51 +38,22 @@
47#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) 38#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
48 39
49struct ieee80211_hdr { 40struct ieee80211_hdr {
50 u16 frame_ctl; 41 __le16 frame_ctl;
51 u16 duration_id; 42 __le16 duration_id;
52 u8 addr1[ETH_ALEN]; 43 u8 addr1[ETH_ALEN];
53 u8 addr2[ETH_ALEN]; 44 u8 addr2[ETH_ALEN];
54 u8 addr3[ETH_ALEN]; 45 u8 addr3[ETH_ALEN];
55 u16 seq_ctl; 46 __le16 seq_ctl;
56 u8 addr4[ETH_ALEN]; 47 u8 addr4[ETH_ALEN];
57} __attribute__ ((packed)); 48} __attribute__ ((packed));
58 49
59struct ieee80211_hdr_3addr { 50struct ieee80211_hdr_3addr {
60 u16 frame_ctl; 51 __le16 frame_ctl;
61 u16 duration_id; 52 __le16 duration_id;
62 u8 addr1[ETH_ALEN]; 53 u8 addr1[ETH_ALEN];
63 u8 addr2[ETH_ALEN]; 54 u8 addr2[ETH_ALEN];
64 u8 addr3[ETH_ALEN]; 55 u8 addr3[ETH_ALEN];
65 u16 seq_ctl; 56 __le16 seq_ctl;
66} __attribute__ ((packed));
67
68enum eap_type {
69 EAP_PACKET = 0,
70 EAPOL_START,
71 EAPOL_LOGOFF,
72 EAPOL_KEY,
73 EAPOL_ENCAP_ASF_ALERT
74};
75
76static const char *eap_types[] = {
77 [EAP_PACKET] = "EAP-Packet",
78 [EAPOL_START] = "EAPOL-Start",
79 [EAPOL_LOGOFF] = "EAPOL-Logoff",
80 [EAPOL_KEY] = "EAPOL-Key",
81 [EAPOL_ENCAP_ASF_ALERT] = "EAPOL-Encap-ASF-Alert"
82};
83
84static inline const char *eap_get_type(int type)
85{
86 return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
87}
88
89struct eapol {
90 u8 snap[6];
91 u16 ethertype;
92 u8 version;
93 u8 type;
94 u16 length;
95} __attribute__ ((packed)); 57} __attribute__ ((packed));
96 58
97#define IEEE80211_1ADDR_LEN 10 59#define IEEE80211_1ADDR_LEN 10
@@ -104,7 +66,7 @@ struct eapol {
104#define MAX_FRAG_THRESHOLD 2346U 66#define MAX_FRAG_THRESHOLD 2346U
105 67
106/* Frame control field constants */ 68/* Frame control field constants */
107#define IEEE80211_FCTL_VERS 0x0002 69#define IEEE80211_FCTL_VERS 0x0003
108#define IEEE80211_FCTL_FTYPE 0x000c 70#define IEEE80211_FCTL_FTYPE 0x000c
109#define IEEE80211_FCTL_STYPE 0x00f0 71#define IEEE80211_FCTL_STYPE 0x00f0
110#define IEEE80211_FCTL_TODS 0x0100 72#define IEEE80211_FCTL_TODS 0x0100
@@ -112,8 +74,8 @@ struct eapol {
112#define IEEE80211_FCTL_MOREFRAGS 0x0400 74#define IEEE80211_FCTL_MOREFRAGS 0x0400
113#define IEEE80211_FCTL_RETRY 0x0800 75#define IEEE80211_FCTL_RETRY 0x0800
114#define IEEE80211_FCTL_PM 0x1000 76#define IEEE80211_FCTL_PM 0x1000
115#define IEEE80211_FCTL_MOREDATA 0x2000 77#define IEEE80211_FCTL_MOREDATA 0x2000
116#define IEEE80211_FCTL_WEP 0x4000 78#define IEEE80211_FCTL_PROTECTED 0x4000
117#define IEEE80211_FCTL_ORDER 0x8000 79#define IEEE80211_FCTL_ORDER 0x8000
118 80
119#define IEEE80211_FTYPE_MGMT 0x0000 81#define IEEE80211_FTYPE_MGMT 0x0000
@@ -132,6 +94,7 @@ struct eapol {
132#define IEEE80211_STYPE_DISASSOC 0x00A0 94#define IEEE80211_STYPE_DISASSOC 0x00A0
133#define IEEE80211_STYPE_AUTH 0x00B0 95#define IEEE80211_STYPE_AUTH 0x00B0
134#define IEEE80211_STYPE_DEAUTH 0x00C0 96#define IEEE80211_STYPE_DEAUTH 0x00C0
97#define IEEE80211_STYPE_ACTION 0x00D0
135 98
136/* control */ 99/* control */
137#define IEEE80211_STYPE_PSPOLL 0x00A0 100#define IEEE80211_STYPE_PSPOLL 0x00A0
@@ -167,8 +130,19 @@ do { if (ieee80211_debug_level & (level)) \
167#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0) 130#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
168#endif /* CONFIG_IEEE80211_DEBUG */ 131#endif /* CONFIG_IEEE80211_DEBUG */
169 132
133
134/* debug macros not dependent on CONFIG_IEEE80211_DEBUG */
135
136#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
137#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
138
139/* escape_essid() is intended to be used in debug (and possibly error)
140 * messages. It should never be used for passing essid to user space. */
141const char *escape_essid(const char *essid, u8 essid_len);
142
143
170/* 144/*
171 * To use the debug system; 145 * To use the debug system:
172 * 146 *
173 * If you are defining a new debug classification, simply add it to the #define 147 * If you are defining a new debug classification, simply add it to the #define
174 * list here in the form of: 148 * list here in the form of:
@@ -184,11 +158,11 @@ do { if (ieee80211_debug_level & (level)) \
184 * 158 *
185 * To add your debug level to the list of levels seen when you perform 159 * To add your debug level to the list of levels seen when you perform
186 * 160 *
187 * % cat /proc/net/ipw/debug_level 161 * % cat /proc/net/ieee80211/debug_level
188 * 162 *
189 * you simply need to add your entry to the ipw_debug_levels array. 163 * you simply need to add your entry to the ieee80211_debug_level array.
190 * 164 *
191 * If you do not see debug_level in /proc/net/ipw then you do not have 165 * If you do not see debug_level in /proc/net/ieee80211 then you do not have
192 * CONFIG_IEEE80211_DEBUG defined in your kernel configuration 166 * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
193 * 167 *
194 */ 168 */
@@ -199,7 +173,6 @@ do { if (ieee80211_debug_level & (level)) \
199#define IEEE80211_DL_STATE (1<<3) 173#define IEEE80211_DL_STATE (1<<3)
200#define IEEE80211_DL_MGMT (1<<4) 174#define IEEE80211_DL_MGMT (1<<4)
201#define IEEE80211_DL_FRAG (1<<5) 175#define IEEE80211_DL_FRAG (1<<5)
202#define IEEE80211_DL_EAP (1<<6)
203#define IEEE80211_DL_DROP (1<<7) 176#define IEEE80211_DL_DROP (1<<7)
204 177
205#define IEEE80211_DL_TX (1<<8) 178#define IEEE80211_DL_TX (1<<8)
@@ -214,7 +187,6 @@ do { if (ieee80211_debug_level & (level)) \
214#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a) 187#define IEEE80211_DEBUG_STATE(f, a...) IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
215#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a) 188#define IEEE80211_DEBUG_MGMT(f, a...) IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
216#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a) 189#define IEEE80211_DEBUG_FRAG(f, a...) IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
217#define IEEE80211_DEBUG_EAP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
218#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a) 190#define IEEE80211_DEBUG_DROP(f, a...) IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
219#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a) 191#define IEEE80211_DEBUG_TX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
220#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a) 192#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
@@ -223,9 +195,9 @@ do { if (ieee80211_debug_level & (level)) \
223#include <linux/if_arp.h> /* ARPHRD_ETHER */ 195#include <linux/if_arp.h> /* ARPHRD_ETHER */
224 196
225#ifndef WIRELESS_SPY 197#ifndef WIRELESS_SPY
226#define WIRELESS_SPY // enable iwspy support 198#define WIRELESS_SPY /* enable iwspy support */
227#endif 199#endif
228#include <net/iw_handler.h> // new driver API 200#include <net/iw_handler.h> /* new driver API */
229 201
230#ifndef ETH_P_PAE 202#ifndef ETH_P_PAE
231#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ 203#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
@@ -252,6 +224,7 @@ struct ieee80211_snap_hdr {
252 224
253#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) 225#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
254 226
227#define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS)
255#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE) 228#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
256#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE) 229#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
257 230
@@ -264,7 +237,7 @@ struct ieee80211_snap_hdr {
264 237
265#define WLAN_AUTH_CHALLENGE_LEN 128 238#define WLAN_AUTH_CHALLENGE_LEN 128
266 239
267#define WLAN_CAPABILITY_BSS (1<<0) 240#define WLAN_CAPABILITY_ESS (1<<0)
268#define WLAN_CAPABILITY_IBSS (1<<1) 241#define WLAN_CAPABILITY_IBSS (1<<1)
269#define WLAN_CAPABILITY_CF_POLLABLE (1<<2) 242#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
270#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3) 243#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
@@ -272,34 +245,72 @@ struct ieee80211_snap_hdr {
272#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5) 245#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
273#define WLAN_CAPABILITY_PBCC (1<<6) 246#define WLAN_CAPABILITY_PBCC (1<<6)
274#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7) 247#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
248#define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8)
249#define WLAN_CAPABILITY_SHORT_SLOT_TIME (1<<10)
250#define WLAN_CAPABILITY_OSSS_OFDM (1<<13)
275 251
276/* Status codes */ 252/* Status codes */
277#define WLAN_STATUS_SUCCESS 0 253enum ieee80211_statuscode {
278#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 254 WLAN_STATUS_SUCCESS = 0,
279#define WLAN_STATUS_CAPS_UNSUPPORTED 10 255 WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
280#define WLAN_STATUS_REASSOC_NO_ASSOC 11 256 WLAN_STATUS_CAPS_UNSUPPORTED = 10,
281#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 257 WLAN_STATUS_REASSOC_NO_ASSOC = 11,
282#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 258 WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
283#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 259 WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
284#define WLAN_STATUS_CHALLENGE_FAIL 15 260 WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
285#define WLAN_STATUS_AUTH_TIMEOUT 16 261 WLAN_STATUS_CHALLENGE_FAIL = 15,
286#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 262 WLAN_STATUS_AUTH_TIMEOUT = 16,
287#define WLAN_STATUS_ASSOC_DENIED_RATES 18 263 WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
288/* 802.11b */ 264 WLAN_STATUS_ASSOC_DENIED_RATES = 18,
289#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 265 /* 802.11b */
290#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 266 WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
291#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 267 WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
268 WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
269 /* 802.11h */
270 WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
271 WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
272 WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
273 /* 802.11g */
274 WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
275 WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
276 /* 802.11i */
277 WLAN_STATUS_INVALID_IE = 40,
278 WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
279 WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
280 WLAN_STATUS_INVALID_AKMP = 43,
281 WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
282 WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
283 WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
284};
292 285
293/* Reason codes */ 286/* Reason codes */
294#define WLAN_REASON_UNSPECIFIED 1 287enum ieee80211_reasoncode {
295#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 288 WLAN_REASON_UNSPECIFIED = 1,
296#define WLAN_REASON_DEAUTH_LEAVING 3 289 WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
297#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 290 WLAN_REASON_DEAUTH_LEAVING = 3,
298#define WLAN_REASON_DISASSOC_AP_BUSY 5 291 WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
299#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 292 WLAN_REASON_DISASSOC_AP_BUSY = 5,
300#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 293 WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
301#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 294 WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
302#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 295 WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
296 WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
297 /* 802.11h */
298 WLAN_REASON_DISASSOC_BAD_POWER = 10,
299 WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
300 /* 802.11i */
301 WLAN_REASON_INVALID_IE = 13,
302 WLAN_REASON_MIC_FAILURE = 14,
303 WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
304 WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
305 WLAN_REASON_IE_DIFFERENT = 17,
306 WLAN_REASON_INVALID_GROUP_CIPHER = 18,
307 WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
308 WLAN_REASON_INVALID_AKMP = 20,
309 WLAN_REASON_UNSUPP_RSN_VERSION = 21,
310 WLAN_REASON_INVALID_RSN_IE_CAP = 22,
311 WLAN_REASON_IEEE8021X_FAILED = 23,
312 WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
313};
303 314
304 315
305#define IEEE80211_STATMASK_SIGNAL (1<<0) 316#define IEEE80211_STATMASK_SIGNAL (1<<0)
@@ -426,9 +437,7 @@ struct ieee80211_stats {
426 437
427struct ieee80211_device; 438struct ieee80211_device;
428 439
429#if 0 /* for later */
430#include "ieee80211_crypt.h" 440#include "ieee80211_crypt.h"
431#endif
432 441
433#define SEC_KEY_1 (1<<0) 442#define SEC_KEY_1 (1<<0)
434#define SEC_KEY_2 (1<<1) 443#define SEC_KEY_2 (1<<1)
@@ -480,17 +489,34 @@ Total: 28-2340 bytes
480#define BEACON_PROBE_SSID_ID_POSITION 12 489#define BEACON_PROBE_SSID_ID_POSITION 12
481 490
482/* Management Frame Information Element Types */ 491/* Management Frame Information Element Types */
483#define MFIE_TYPE_SSID 0 492enum ieee80211_mfie {
484#define MFIE_TYPE_RATES 1 493 MFIE_TYPE_SSID = 0,
485#define MFIE_TYPE_FH_SET 2 494 MFIE_TYPE_RATES = 1,
486#define MFIE_TYPE_DS_SET 3 495 MFIE_TYPE_FH_SET = 2,
487#define MFIE_TYPE_CF_SET 4 496 MFIE_TYPE_DS_SET = 3,
488#define MFIE_TYPE_TIM 5 497 MFIE_TYPE_CF_SET = 4,
489#define MFIE_TYPE_IBSS_SET 6 498 MFIE_TYPE_TIM = 5,
490#define MFIE_TYPE_CHALLENGE 16 499 MFIE_TYPE_IBSS_SET = 6,
491#define MFIE_TYPE_RSN 48 500 MFIE_TYPE_COUNTRY = 7,
492#define MFIE_TYPE_RATES_EX 50 501 MFIE_TYPE_HOP_PARAMS = 8,
493#define MFIE_TYPE_GENERIC 221 502 MFIE_TYPE_HOP_TABLE = 9,
503 MFIE_TYPE_REQUEST = 10,
504 MFIE_TYPE_CHALLENGE = 16,
505 MFIE_TYPE_POWER_CONSTRAINT = 32,
506 MFIE_TYPE_POWER_CAPABILITY = 33,
507 MFIE_TYPE_TPC_REQUEST = 34,
508 MFIE_TYPE_TPC_REPORT = 35,
509 MFIE_TYPE_SUPP_CHANNELS = 36,
510 MFIE_TYPE_CSA = 37,
511 MFIE_TYPE_MEASURE_REQUEST = 38,
512 MFIE_TYPE_MEASURE_REPORT = 39,
513 MFIE_TYPE_QUIET = 40,
514 MFIE_TYPE_IBSS_DFS = 41,
515 MFIE_TYPE_ERP_INFO = 42,
516 MFIE_TYPE_RSN = 48,
517 MFIE_TYPE_RATES_EX = 50,
518 MFIE_TYPE_GENERIC = 221,
519};
494 520
495struct ieee80211_info_element_hdr { 521struct ieee80211_info_element_hdr {
496 u8 id; 522 u8 id;
@@ -522,9 +548,9 @@ struct ieee80211_info_element {
522 548
523struct ieee80211_authentication { 549struct ieee80211_authentication {
524 struct ieee80211_hdr_3addr header; 550 struct ieee80211_hdr_3addr header;
525 u16 algorithm; 551 __le16 algorithm;
526 u16 transaction; 552 __le16 transaction;
527 u16 status; 553 __le16 status;
528 struct ieee80211_info_element info_element; 554 struct ieee80211_info_element info_element;
529} __attribute__ ((packed)); 555} __attribute__ ((packed));
530 556
@@ -532,23 +558,23 @@ struct ieee80211_authentication {
532struct ieee80211_probe_response { 558struct ieee80211_probe_response {
533 struct ieee80211_hdr_3addr header; 559 struct ieee80211_hdr_3addr header;
534 u32 time_stamp[2]; 560 u32 time_stamp[2];
535 u16 beacon_interval; 561 __le16 beacon_interval;
536 u16 capability; 562 __le16 capability;
537 struct ieee80211_info_element info_element; 563 struct ieee80211_info_element info_element;
538} __attribute__ ((packed)); 564} __attribute__ ((packed));
539 565
540struct ieee80211_assoc_request_frame { 566struct ieee80211_assoc_request_frame {
541 u16 capability; 567 __le16 capability;
542 u16 listen_interval; 568 __le16 listen_interval;
543 u8 current_ap[ETH_ALEN]; 569 u8 current_ap[ETH_ALEN];
544 struct ieee80211_info_element info_element; 570 struct ieee80211_info_element info_element;
545} __attribute__ ((packed)); 571} __attribute__ ((packed));
546 572
547struct ieee80211_assoc_response_frame { 573struct ieee80211_assoc_response_frame {
548 struct ieee80211_hdr_3addr header; 574 struct ieee80211_hdr_3addr header;
549 u16 capability; 575 __le16 capability;
550 u16 status; 576 __le16 status;
551 u16 aid; 577 __le16 aid;
552 struct ieee80211_info_element info_element; /* supported rates */ 578 struct ieee80211_info_element info_element; /* supported rates */
553} __attribute__ ((packed)); 579} __attribute__ ((packed));
554 580
@@ -563,7 +589,7 @@ struct ieee80211_txb {
563}; 589};
564 590
565 591
566/* SWEEP TABLE ENTRIES NUMBER*/ 592/* SWEEP TABLE ENTRIES NUMBER */
567#define MAX_SWEEP_TAB_ENTRIES 42 593#define MAX_SWEEP_TAB_ENTRIES 42
568#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 594#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
569/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs 595/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
@@ -624,8 +650,6 @@ enum ieee80211_state {
624 650
625#define DEFAULT_MAX_SCAN_AGE (15 * HZ) 651#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
626#define DEFAULT_FTS 2346 652#define DEFAULT_FTS 2346
627#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
628#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
629 653
630 654
631#define CFG_IEEE80211_RESERVE_FCS (1<<0) 655#define CFG_IEEE80211_RESERVE_FCS (1<<0)
@@ -793,8 +817,6 @@ extern struct net_device *alloc_ieee80211(int sizeof_priv);
793extern int ieee80211_set_encryption(struct ieee80211_device *ieee); 817extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
794 818
795/* ieee80211_tx.c */ 819/* ieee80211_tx.c */
796
797
798extern int ieee80211_xmit(struct sk_buff *skb, 820extern int ieee80211_xmit(struct sk_buff *skb,
799 struct net_device *dev); 821 struct net_device *dev);
800extern void ieee80211_txb_free(struct ieee80211_txb *); 822extern void ieee80211_txb_free(struct ieee80211_txb *);
@@ -807,7 +829,7 @@ extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
807 struct ieee80211_hdr *header, 829 struct ieee80211_hdr *header,
808 struct ieee80211_rx_stats *stats); 830 struct ieee80211_rx_stats *stats);
809 831
810/* iee80211_wx.c */ 832/* ieee80211_wx.c */
811extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee, 833extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
812 struct iw_request_info *info, 834 struct iw_request_info *info,
813 union iwreq_data *wrqu, char *key); 835 union iwreq_data *wrqu, char *key);
@@ -829,28 +851,5 @@ extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
829 return ieee->scans; 851 return ieee->scans;
830} 852}
831 853
832static inline const char *escape_essid(const char *essid, u8 essid_len) {
833 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
834 const char *s = essid;
835 char *d = escaped;
836
837 if (ieee80211_is_empty_essid(essid, essid_len)) {
838 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
839 return escaped;
840 }
841
842 essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
843 while (essid_len--) {
844 if (*s == '\0') {
845 *d++ = '\\';
846 *d++ = '0';
847 s++;
848 } else {
849 *d++ = *s++;
850 }
851 }
852 *d = '\0';
853 return escaped;
854}
855 854
856#endif /* IEEE80211_H */ 855#endif /* IEEE80211_H */
diff --git a/include/net/ieee80211_crypt.h b/include/net/ieee80211_crypt.h
new file mode 100644
index 000000000000..b58a3bcc0dc0
--- /dev/null
+++ b/include/net/ieee80211_crypt.h
@@ -0,0 +1,86 @@
1/*
2 * Original code based on Host AP (software wireless LAN access point) driver
3 * for Intersil Prism2/2.5/3.
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8 *
9 * Adaption to a generic IEEE 802.11 stack by James Ketrenos
10 * <jketreno@linux.intel.com>
11 *
12 * Copyright (c) 2004, Intel Corporation
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation. See README and COPYING for
17 * more details.
18 */
19
20/*
21 * This file defines the interface to the ieee80211 crypto module.
22 */
23#ifndef IEEE80211_CRYPT_H
24#define IEEE80211_CRYPT_H
25
26#include <linux/skbuff.h>
27
28struct ieee80211_crypto_ops {
29 const char *name;
30
31 /* init new crypto context (e.g., allocate private data space,
32 * select IV, etc.); returns NULL on failure or pointer to allocated
33 * private data on success */
34 void * (*init)(int keyidx);
35
36 /* deinitialize crypto context and free allocated private data */
37 void (*deinit)(void *priv);
38
39 /* encrypt/decrypt return < 0 on error or >= 0 on success. The return
40 * value from decrypt_mpdu is passed as the keyidx value for
41 * decrypt_msdu. skb must have enough head and tail room for the
42 * encryption; if not, error will be returned; these functions are
43 * called for all MPDUs (i.e., fragments).
44 */
45 int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
46 int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
47
48 /* These functions are called for full MSDUs, i.e. full frames.
49 * These can be NULL if full MSDU operations are not needed. */
50 int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
51 int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
52 void *priv);
53
54 int (*set_key)(void *key, int len, u8 *seq, void *priv);
55 int (*get_key)(void *key, int len, u8 *seq, void *priv);
56
57 /* procfs handler for printing out key information and possible
58 * statistics */
59 char * (*print_stats)(char *p, void *priv);
60
61 /* maximum number of bytes added by encryption; encrypt buf is
62 * allocated with extra_prefix_len bytes, copy of in_buf, and
63 * extra_postfix_len; encrypt need not use all this space, but
64 * the result must start at the beginning of the buffer and correct
65 * length must be returned */
66 int extra_prefix_len, extra_postfix_len;
67
68 struct module *owner;
69};
70
71struct ieee80211_crypt_data {
72 struct list_head list; /* delayed deletion list */
73 struct ieee80211_crypto_ops *ops;
74 void *priv;
75 atomic_t refcnt;
76};
77
78int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
79int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
80struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name);
81void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
82void ieee80211_crypt_deinit_handler(unsigned long);
83void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
84 struct ieee80211_crypt_data **crypt);
85
86#endif
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 7a3c43711a17..e426641c519f 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -958,7 +958,7 @@ static __inline__ int ip_vs_todrop(void)
958 */ 958 */
959#define IP_VS_FWD_METHOD(cp) (cp->flags & IP_VS_CONN_F_FWD_MASK) 959#define IP_VS_FWD_METHOD(cp) (cp->flags & IP_VS_CONN_F_FWD_MASK)
960 960
961extern __inline__ char ip_vs_fwd_tag(struct ip_vs_conn *cp) 961static inline char ip_vs_fwd_tag(struct ip_vs_conn *cp)
962{ 962{
963 char fwd; 963 char fwd;
964 964
diff --git a/include/net/sock.h b/include/net/sock.h
index 312cb25cbd18..cf628261da52 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -709,6 +709,12 @@ static inline int sk_stream_rmem_schedule(struct sock *sk, struct sk_buff *skb)
709 sk_stream_mem_schedule(sk, skb->truesize, 1); 709 sk_stream_mem_schedule(sk, skb->truesize, 1);
710} 710}
711 711
712static inline int sk_stream_wmem_schedule(struct sock *sk, int size)
713{
714 return size <= sk->sk_forward_alloc ||
715 sk_stream_mem_schedule(sk, size, 0);
716}
717
712/* Used by processes to "lock" a socket state, so that 718/* Used by processes to "lock" a socket state, so that
713 * interrupts and bottom half handlers won't change it 719 * interrupts and bottom half handlers won't change it
714 * from under us. It essentially blocks any incoming 720 * from under us. It essentially blocks any incoming
@@ -1203,8 +1209,7 @@ static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk,
1203 skb = alloc_skb_fclone(size + hdr_len, gfp); 1209 skb = alloc_skb_fclone(size + hdr_len, gfp);
1204 if (skb) { 1210 if (skb) {
1205 skb->truesize += mem; 1211 skb->truesize += mem;
1206 if (sk->sk_forward_alloc >= (int)skb->truesize || 1212 if (sk_stream_wmem_schedule(sk, skb->truesize)) {
1207 sk_stream_mem_schedule(sk, skb->truesize, 0)) {
1208 skb_reserve(skb, hdr_len); 1213 skb_reserve(skb, hdr_len);
1209 return skb; 1214 return skb;
1210 } 1215 }
@@ -1227,10 +1232,8 @@ static inline struct page *sk_stream_alloc_page(struct sock *sk)
1227{ 1232{
1228 struct page *page = NULL; 1233 struct page *page = NULL;
1229 1234
1230 if (sk->sk_forward_alloc >= (int)PAGE_SIZE || 1235 page = alloc_pages(sk->sk_allocation, 0);
1231 sk_stream_mem_schedule(sk, PAGE_SIZE, 0)) 1236 if (!page) {
1232 page = alloc_pages(sk->sk_allocation, 0);
1233 else {
1234 sk->sk_prot->enter_memory_pressure(); 1237 sk->sk_prot->enter_memory_pressure();
1235 sk_stream_moderate_sndbuf(sk); 1238 sk_stream_moderate_sndbuf(sk);
1236 } 1239 }
diff --git a/include/net/tcp.h b/include/net/tcp.h
index d6bcf1317a6a..97af77c4d096 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -454,6 +454,7 @@ extern int tcp_retransmit_skb(struct sock *, struct sk_buff *);
454extern void tcp_xmit_retransmit_queue(struct sock *); 454extern void tcp_xmit_retransmit_queue(struct sock *);
455extern void tcp_simple_retransmit(struct sock *); 455extern void tcp_simple_retransmit(struct sock *);
456extern int tcp_trim_head(struct sock *, struct sk_buff *, u32); 456extern int tcp_trim_head(struct sock *, struct sk_buff *, u32);
457extern int tcp_fragment(struct sock *, struct sk_buff *, u32, unsigned int);
457 458
458extern void tcp_send_probe0(struct sock *); 459extern void tcp_send_probe0(struct sock *);
459extern void tcp_send_partial(struct sock *); 460extern void tcp_send_partial(struct sock *);
diff --git a/include/video/pmag-ba-fb.h b/include/video/pmag-ba-fb.h
index cebef073b9a3..fceb6c0f6583 100644
--- a/include/video/pmag-ba-fb.h
+++ b/include/video/pmag-ba-fb.h
@@ -1,24 +1,27 @@
1/* 1/*
2 * linux/drivers/video/pmag-ba-fb.h 2 * linux/include/video/pmag-ba-fb.h
3 * 3 *
4 * TurboChannel PMAG-BA framebuffer card support, 4 * TURBOchannel PMAG-BA Color Frame Buffer (CFB) card support,
5 * Copyright (C) 1999,2000,2001 by 5 * Copyright (C) 1999, 2000, 2001 by
6 * Michael Engel <engel@unix-ag.org>, 6 * Michael Engel <engel@unix-ag.org>,
7 * Karsten Merker <merker@linuxtag.org> 7 * Karsten Merker <merker@linuxtag.org>
8 * This file is subject to the terms and conditions of the GNU General 8 * Copyright (c) 2005 Maciej W. Rozycki
9 * Public License. See the file COPYING in the main directory of this 9 *
10 * archive for more details. 10 * This file is subject to the terms and conditions of the GNU General
11 */ 11 * Public License. See the file COPYING in the main directory of this
12 12 * archive for more details.
13/*
14 * Bt459 RAM DAC register base offset (rel. to TC slot base address)
15 */ 13 */
16 14
17#define PMAG_BA_BT459_OFFSET 0x00200000 15/* IOmem resource offsets. */
18 16#define PMAG_BA_FBMEM 0x000000 /* frame buffer */
19/* 17#define PMAG_BA_BT459 0x200000 /* Bt459 RAMDAC */
20 * Begin of PMAG-BA framebuffer memory relative to TC slot address, 18#define PMAG_BA_IRQ 0x300000 /* IRQ acknowledge */
21 * resolution is 1024x864x8 19#define PMAG_BA_ROM 0x380000 /* REX option ROM */
22 */ 20#define PMAG_BA_BT438 0x380000 /* Bt438 clock chip reset */
21#define PMAG_BA_SIZE 0x400000 /* address space size */
23 22
24#define PMAG_BA_ONBOARD_FBMEM_OFFSET 0x00000000 23/* Bt459 register offsets, byte-wide registers. */
24#define BT459_ADDR_LO 0x0 /* address low */
25#define BT459_ADDR_HI 0x4 /* address high */
26#define BT459_DATA 0x8 /* data window register */
27#define BT459_CMAP 0xc /* color map window register */
diff --git a/include/video/pmagb-b-fb.h b/include/video/pmagb-b-fb.h
index 87b81a555139..7539b9087a80 100644
--- a/include/video/pmagb-b-fb.h
+++ b/include/video/pmagb-b-fb.h
@@ -1,32 +1,58 @@
1/* 1/*
2 * linux/drivers/video/pmagb-b-fb.h 2 * linux/include/video/pmagb-b-fb.h
3 * 3 *
4 * TurboChannel PMAGB-B framebuffer card support, 4 * TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
5 * Copyright (C) 1999, 2000, 2001 by 5 * Copyright (C) 1999, 2000, 2001 by
6 * Michael Engel <engel@unix-ag.org> and 6 * Michael Engel <engel@unix-ag.org> and
7 * Karsten Merker <merker@linuxtag.org> 7 * Karsten Merker <merker@linuxtag.org>
8 * This file is subject to the terms and conditions of the GNU General 8 * Copyright (c) 2005 Maciej W. Rozycki
9 * Public License. See the file COPYING in the main directory of this 9 *
10 * archive for more details. 10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
11 */ 13 */
12 14
15/* IOmem resource offsets. */
16#define PMAGB_B_ROM 0x000000 /* REX option ROM */
17#define PMAGB_B_SFB 0x100000 /* SFB ASIC */
18#define PMAGB_B_GP0 0x140000 /* general purpose output 0 */
19#define PMAGB_B_GP1 0x180000 /* general purpose output 1 */
20#define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */
21#define PMAGB_B_FBMEM 0x200000 /* frame buffer */
22#define PMAGB_B_SIZE 0x400000 /* address space size */
13 23
14/* 24/* IOmem register offsets. */
15 * Bt459 RAM DAC register base offset (rel. to TC slot base address) 25#define SFB_REG_VID_HOR 0x64 /* video horizontal setup */
16 */ 26#define SFB_REG_VID_VER 0x68 /* video vertical setup */
17#define PMAGB_B_BT459_OFFSET 0x001C0000 27#define SFB_REG_VID_BASE 0x6c /* video base address */
28#define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */
29#define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */
18 30
19/* 31/* Video horizontal setup register constants. All bits are r/w. */
20 * Begin of PMAGB-B framebuffer memory, resolution is configurable: 32#define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */
21 * 1024x864x8 or 1280x1024x8, settable by jumper on the card 33#define SFB_VID_HOR_BP_MASK 0x7f
22 */ 34#define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */
23#define PMAGB_B_ONBOARD_FBMEM_OFFSET 0x00201000 35#define SFB_VID_HOR_SYN_MASK 0x7f
36#define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */
37#define SFB_VID_HOR_FP_MASK 0x1f
38#define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */
39#define SFB_VID_HOR_PIX_MASK 0x1ff
24 40
25/* 41/* Video vertical setup register constants. All bits are r/w. */
26 * Bt459 register offsets, byte-wide registers 42#define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */
27 */ 43#define SFB_VID_VER_BP_MASK 0x3f
44#define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */
45#define SFB_VID_VER_SYN_MASK 0x3f
46#define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */
47#define SFB_VID_VER_FP_MASK 0x1f
48#define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */
49#define SFB_VID_VER_SL_MASK 0x7ff
50
51/* Video base address register constants. All bits are r/w. */
52#define SFB_VID_BASE_MASK 0x1ff /* video base row address */
28 53
29#define BT459_ADR_LOW BT459_OFFSET + 0x00 /* addr. low */ 54/* Bt459 register offsets, byte-wide registers. */
30#define BT459_ADR_HIGH BT459_OFFSET + 0x04 /* addr. high */ 55#define BT459_ADDR_LO 0x0 /* address low */
31#define BT459_DATA BT459_OFFSET + 0x08 /* r/w data */ 56#define BT459_ADDR_HI 0x4 /* address high */
32#define BT459_CMAP BT459_OFFSET + 0x0C /* color map */ 57#define BT459_DATA 0x8 /* data window register */
58#define BT459_CMAP 0xc /* color map window register */
diff --git a/init/do_mounts.c b/init/do_mounts.c
index 4e11a9aaf14a..b27c11064409 100644
--- a/init/do_mounts.c
+++ b/init/do_mounts.c
@@ -127,10 +127,10 @@ fail:
127 * used when disk name of partitioned disk ends on a digit. 127 * used when disk name of partitioned disk ends on a digit.
128 * 128 *
129 * If name doesn't have fall into the categories above, we return 0. 129 * If name doesn't have fall into the categories above, we return 0.
130 * Driverfs is used to check if something is a disk name - it has 130 * Sysfs is used to check if something is a disk name - it has
131 * all known disks under bus/block/devices. If the disk name 131 * all known disks under bus/block/devices. If the disk name
132 * contains slashes, name of driverfs node has them replaced with 132 * contains slashes, name of sysfs node has them replaced with
133 * bangs. try_name() does the actual checks, assuming that driverfs 133 * bangs. try_name() does the actual checks, assuming that sysfs
134 * is mounted on rootfs /sys. 134 * is mounted on rootfs /sys.
135 */ 135 */
136 136
diff --git a/kernel/fork.c b/kernel/fork.c
index b65187f0c74e..7e1ead9a6ba4 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -994,6 +994,9 @@ static task_t *copy_process(unsigned long clone_flags,
994 * of CLONE_PTRACE. 994 * of CLONE_PTRACE.
995 */ 995 */
996 clear_tsk_thread_flag(p, TIF_SYSCALL_TRACE); 996 clear_tsk_thread_flag(p, TIF_SYSCALL_TRACE);
997#ifdef TIF_SYSCALL_EMU
998 clear_tsk_thread_flag(p, TIF_SYSCALL_EMU);
999#endif
997 1000
998 /* Our parent execution domain becomes current domain 1001 /* Our parent execution domain becomes current domain
999 These must match for thread signalling to apply */ 1002 These must match for thread signalling to apply */
diff --git a/kernel/power/Kconfig b/kernel/power/Kconfig
index 2c7121d9bff1..917066a5767c 100644
--- a/kernel/power/Kconfig
+++ b/kernel/power/Kconfig
@@ -72,6 +72,18 @@ config PM_STD_PARTITION
72 suspended image to. It will simply pick the first available swap 72 suspended image to. It will simply pick the first available swap
73 device. 73 device.
74 74
75config SWSUSP_ENCRYPT
76 bool "Encrypt suspend image"
77 depends on SOFTWARE_SUSPEND && CRYPTO=y && (CRYPTO_AES=y || CRYPTO_AES_586=y || CRYPTO_AES_X86_64=y)
78 default ""
79 ---help---
80 To prevent data gathering from swap after resume you can encrypt
81 the suspend image with a temporary key that is deleted on
82 resume.
83
84 Note that the temporary key is stored unencrypted on disk while the
85 system is suspended.
86
75config SUSPEND_SMP 87config SUSPEND_SMP
76 bool 88 bool
77 depends on HOTPLUG_CPU && X86 && PM 89 depends on HOTPLUG_CPU && X86 && PM
diff --git a/kernel/power/disk.c b/kernel/power/disk.c
index 664eb0469b6e..2d8bf054d036 100644
--- a/kernel/power/disk.c
+++ b/kernel/power/disk.c
@@ -112,24 +112,12 @@ static inline void platform_finish(void)
112 } 112 }
113} 113}
114 114
115static void finish(void)
116{
117 device_resume();
118 platform_finish();
119 thaw_processes();
120 enable_nonboot_cpus();
121 pm_restore_console();
122}
123
124
125static int prepare_processes(void) 115static int prepare_processes(void)
126{ 116{
127 int error; 117 int error;
128 118
129 pm_prepare_console(); 119 pm_prepare_console();
130
131 sys_sync(); 120 sys_sync();
132
133 disable_nonboot_cpus(); 121 disable_nonboot_cpus();
134 122
135 if (freeze_processes()) { 123 if (freeze_processes()) {
@@ -162,15 +150,6 @@ static void unprepare_processes(void)
162 pm_restore_console(); 150 pm_restore_console();
163} 151}
164 152
165static int prepare_devices(void)
166{
167 int error;
168
169 if ((error = device_suspend(PMSG_FREEZE)))
170 printk("Some devices failed to suspend\n");
171 return error;
172}
173
174/** 153/**
175 * pm_suspend_disk - The granpappy of power management. 154 * pm_suspend_disk - The granpappy of power management.
176 * 155 *
@@ -187,17 +166,14 @@ int pm_suspend_disk(void)
187 error = prepare_processes(); 166 error = prepare_processes();
188 if (error) 167 if (error)
189 return error; 168 return error;
190 error = prepare_devices();
191 169
170 error = device_suspend(PMSG_FREEZE);
192 if (error) { 171 if (error) {
172 printk("Some devices failed to suspend\n");
193 unprepare_processes(); 173 unprepare_processes();
194 return error; 174 return error;
195 } 175 }
196 176
197 pr_debug("PM: Attempting to suspend to disk.\n");
198 if (pm_disk_mode == PM_DISK_FIRMWARE)
199 return pm_ops->enter(PM_SUSPEND_DISK);
200
201 pr_debug("PM: snapshotting memory.\n"); 177 pr_debug("PM: snapshotting memory.\n");
202 in_suspend = 1; 178 in_suspend = 1;
203 if ((error = swsusp_suspend())) 179 if ((error = swsusp_suspend()))
@@ -208,11 +184,20 @@ int pm_suspend_disk(void)
208 error = swsusp_write(); 184 error = swsusp_write();
209 if (!error) 185 if (!error)
210 power_down(pm_disk_mode); 186 power_down(pm_disk_mode);
187 else {
188 /* swsusp_write can not fail in device_resume,
189 no need to do second device_resume */
190 swsusp_free();
191 unprepare_processes();
192 return error;
193 }
211 } else 194 } else
212 pr_debug("PM: Image restored successfully.\n"); 195 pr_debug("PM: Image restored successfully.\n");
196
213 swsusp_free(); 197 swsusp_free();
214 Done: 198 Done:
215 finish(); 199 device_resume();
200 unprepare_processes();
216 return error; 201 return error;
217} 202}
218 203
@@ -233,9 +218,12 @@ static int software_resume(void)
233{ 218{
234 int error; 219 int error;
235 220
221 down(&pm_sem);
236 if (!swsusp_resume_device) { 222 if (!swsusp_resume_device) {
237 if (!strlen(resume_file)) 223 if (!strlen(resume_file)) {
224 up(&pm_sem);
238 return -ENOENT; 225 return -ENOENT;
226 }
239 swsusp_resume_device = name_to_dev_t(resume_file); 227 swsusp_resume_device = name_to_dev_t(resume_file);
240 pr_debug("swsusp: Resume From Partition %s\n", resume_file); 228 pr_debug("swsusp: Resume From Partition %s\n", resume_file);
241 } else { 229 } else {
@@ -248,6 +236,7 @@ static int software_resume(void)
248 * FIXME: If noresume is specified, we need to find the partition 236 * FIXME: If noresume is specified, we need to find the partition
249 * and reset it back to normal swap space. 237 * and reset it back to normal swap space.
250 */ 238 */
239 up(&pm_sem);
251 return 0; 240 return 0;
252 } 241 }
253 242
@@ -270,20 +259,24 @@ static int software_resume(void)
270 259
271 pr_debug("PM: Preparing devices for restore.\n"); 260 pr_debug("PM: Preparing devices for restore.\n");
272 261
273 if ((error = prepare_devices())) 262 if ((error = device_suspend(PMSG_FREEZE))) {
263 printk("Some devices failed to suspend\n");
274 goto Free; 264 goto Free;
265 }
275 266
276 mb(); 267 mb();
277 268
278 pr_debug("PM: Restoring saved image.\n"); 269 pr_debug("PM: Restoring saved image.\n");
279 swsusp_resume(); 270 swsusp_resume();
280 pr_debug("PM: Restore failed, recovering.n"); 271 pr_debug("PM: Restore failed, recovering.n");
281 finish(); 272 device_resume();
282 Free: 273 Free:
283 swsusp_free(); 274 swsusp_free();
284 Cleanup: 275 Cleanup:
285 unprepare_processes(); 276 unprepare_processes();
286 Done: 277 Done:
278 /* For success case, the suspend path will release the lock */
279 up(&pm_sem);
287 pr_debug("PM: Resume from disk failed.\n"); 280 pr_debug("PM: Resume from disk failed.\n");
288 return 0; 281 return 0;
289} 282}
@@ -390,7 +383,9 @@ static ssize_t resume_store(struct subsystem * subsys, const char * buf, size_t
390 if (sscanf(buf, "%u:%u", &maj, &min) == 2) { 383 if (sscanf(buf, "%u:%u", &maj, &min) == 2) {
391 res = MKDEV(maj,min); 384 res = MKDEV(maj,min);
392 if (maj == MAJOR(res) && min == MINOR(res)) { 385 if (maj == MAJOR(res) && min == MINOR(res)) {
386 down(&pm_sem);
393 swsusp_resume_device = res; 387 swsusp_resume_device = res;
388 up(&pm_sem);
394 printk("Attempting manual resume\n"); 389 printk("Attempting manual resume\n");
395 noresume = 0; 390 noresume = 0;
396 software_resume(); 391 software_resume();
diff --git a/kernel/power/main.c b/kernel/power/main.c
index 71aa0fd22007..22bdc93cc038 100644
--- a/kernel/power/main.c
+++ b/kernel/power/main.c
@@ -143,11 +143,12 @@ static void suspend_finish(suspend_state_t state)
143 143
144 144
145 145
146static char * pm_states[] = { 146static char *pm_states[PM_SUSPEND_MAX] = {
147 [PM_SUSPEND_STANDBY] = "standby", 147 [PM_SUSPEND_STANDBY] = "standby",
148 [PM_SUSPEND_MEM] = "mem", 148 [PM_SUSPEND_MEM] = "mem",
149#ifdef CONFIG_SOFTWARE_SUSPEND
149 [PM_SUSPEND_DISK] = "disk", 150 [PM_SUSPEND_DISK] = "disk",
150 NULL, 151#endif
151}; 152};
152 153
153 154
diff --git a/kernel/power/process.c b/kernel/power/process.c
index 3bd0d261818f..28de118f7a0b 100644
--- a/kernel/power/process.c
+++ b/kernel/power/process.c
@@ -38,7 +38,6 @@ void refrigerator(void)
38 processes around? */ 38 processes around? */
39 long save; 39 long save;
40 save = current->state; 40 save = current->state;
41 current->state = TASK_UNINTERRUPTIBLE;
42 pr_debug("%s entered refrigerator\n", current->comm); 41 pr_debug("%s entered refrigerator\n", current->comm);
43 printk("="); 42 printk("=");
44 43
@@ -47,8 +46,10 @@ void refrigerator(void)
47 recalc_sigpending(); /* We sent fake signal, clean it up */ 46 recalc_sigpending(); /* We sent fake signal, clean it up */
48 spin_unlock_irq(&current->sighand->siglock); 47 spin_unlock_irq(&current->sighand->siglock);
49 48
50 while (frozen(current)) 49 while (frozen(current)) {
50 current->state = TASK_UNINTERRUPTIBLE;
51 schedule(); 51 schedule();
52 }
52 pr_debug("%s left refrigerator\n", current->comm); 53 pr_debug("%s left refrigerator\n", current->comm);
53 current->state = save; 54 current->state = save;
54} 55}
@@ -80,13 +81,33 @@ int freeze_processes(void)
80 } while_each_thread(g, p); 81 } while_each_thread(g, p);
81 read_unlock(&tasklist_lock); 82 read_unlock(&tasklist_lock);
82 yield(); /* Yield is okay here */ 83 yield(); /* Yield is okay here */
83 if (time_after(jiffies, start_time + TIMEOUT)) { 84 if (todo && time_after(jiffies, start_time + TIMEOUT)) {
84 printk( "\n" ); 85 printk( "\n" );
85 printk(KERN_ERR " stopping tasks failed (%d tasks remaining)\n", todo ); 86 printk(KERN_ERR " stopping tasks failed (%d tasks remaining)\n", todo );
86 return todo; 87 break;
87 } 88 }
88 } while(todo); 89 } while(todo);
89 90
91 /* This does not unfreeze processes that are already frozen
92 * (we have slightly ugly calling convention in that respect,
93 * and caller must call thaw_processes() if something fails),
94 * but it cleans up leftover PF_FREEZE requests.
95 */
96 if (todo) {
97 read_lock(&tasklist_lock);
98 do_each_thread(g, p)
99 if (freezing(p)) {
100 pr_debug(" clean up: %s\n", p->comm);
101 p->flags &= ~PF_FREEZE;
102 spin_lock_irqsave(&p->sighand->siglock, flags);
103 recalc_sigpending_tsk(p);
104 spin_unlock_irqrestore(&p->sighand->siglock, flags);
105 }
106 while_each_thread(g, p);
107 read_unlock(&tasklist_lock);
108 return todo;
109 }
110
90 printk( "|\n" ); 111 printk( "|\n" );
91 BUG_ON(in_atomic()); 112 BUG_ON(in_atomic());
92 return 0; 113 return 0;
diff --git a/kernel/power/swsusp.c b/kernel/power/swsusp.c
index f2bc71b9fe8b..eaacd5cb5889 100644
--- a/kernel/power/swsusp.c
+++ b/kernel/power/swsusp.c
@@ -31,6 +31,9 @@
31 * Alex Badea <vampire@go.ro>: 31 * Alex Badea <vampire@go.ro>:
32 * Fixed runaway init 32 * Fixed runaway init
33 * 33 *
34 * Andreas Steinmetz <ast@domdv.de>:
35 * Added encrypted suspend option
36 *
34 * More state savers are welcome. Especially for the scsi layer... 37 * More state savers are welcome. Especially for the scsi layer...
35 * 38 *
36 * For TODOs,FIXMEs also look in Documentation/power/swsusp.txt 39 * For TODOs,FIXMEs also look in Documentation/power/swsusp.txt
@@ -71,8 +74,16 @@
71#include <asm/tlbflush.h> 74#include <asm/tlbflush.h>
72#include <asm/io.h> 75#include <asm/io.h>
73 76
77#include <linux/random.h>
78#include <linux/crypto.h>
79#include <asm/scatterlist.h>
80
74#include "power.h" 81#include "power.h"
75 82
83#define CIPHER "aes"
84#define MAXKEY 32
85#define MAXIV 32
86
76/* References to section boundaries */ 87/* References to section boundaries */
77extern const void __nosave_begin, __nosave_end; 88extern const void __nosave_begin, __nosave_end;
78 89
@@ -103,7 +114,8 @@ static suspend_pagedir_t *pagedir_save;
103#define SWSUSP_SIG "S1SUSPEND" 114#define SWSUSP_SIG "S1SUSPEND"
104 115
105static struct swsusp_header { 116static struct swsusp_header {
106 char reserved[PAGE_SIZE - 20 - sizeof(swp_entry_t)]; 117 char reserved[PAGE_SIZE - 20 - MAXKEY - MAXIV - sizeof(swp_entry_t)];
118 u8 key_iv[MAXKEY+MAXIV];
107 swp_entry_t swsusp_info; 119 swp_entry_t swsusp_info;
108 char orig_sig[10]; 120 char orig_sig[10];
109 char sig[10]; 121 char sig[10];
@@ -129,6 +141,131 @@ static struct swsusp_info swsusp_info;
129static unsigned short swapfile_used[MAX_SWAPFILES]; 141static unsigned short swapfile_used[MAX_SWAPFILES];
130static unsigned short root_swap; 142static unsigned short root_swap;
131 143
144static int write_page(unsigned long addr, swp_entry_t * loc);
145static int bio_read_page(pgoff_t page_off, void * page);
146
147static u8 key_iv[MAXKEY+MAXIV];
148
149#ifdef CONFIG_SWSUSP_ENCRYPT
150
151static int crypto_init(int mode, void **mem)
152{
153 int error = 0;
154 int len;
155 char *modemsg;
156 struct crypto_tfm *tfm;
157
158 modemsg = mode ? "suspend not possible" : "resume not possible";
159
160 tfm = crypto_alloc_tfm(CIPHER, CRYPTO_TFM_MODE_CBC);
161 if(!tfm) {
162 printk(KERN_ERR "swsusp: no tfm, %s\n", modemsg);
163 error = -EINVAL;
164 goto out;
165 }
166
167 if(MAXKEY < crypto_tfm_alg_min_keysize(tfm)) {
168 printk(KERN_ERR "swsusp: key buffer too small, %s\n", modemsg);
169 error = -ENOKEY;
170 goto fail;
171 }
172
173 if (mode)
174 get_random_bytes(key_iv, MAXKEY+MAXIV);
175
176 len = crypto_tfm_alg_max_keysize(tfm);
177 if (len > MAXKEY)
178 len = MAXKEY;
179
180 if (crypto_cipher_setkey(tfm, key_iv, len)) {
181 printk(KERN_ERR "swsusp: key setup failure, %s\n", modemsg);
182 error = -EKEYREJECTED;
183 goto fail;
184 }
185
186 len = crypto_tfm_alg_ivsize(tfm);
187
188 if (MAXIV < len) {
189 printk(KERN_ERR "swsusp: iv buffer too small, %s\n", modemsg);
190 error = -EOVERFLOW;
191 goto fail;
192 }
193
194 crypto_cipher_set_iv(tfm, key_iv+MAXKEY, len);
195
196 *mem=(void *)tfm;
197
198 goto out;
199
200fail: crypto_free_tfm(tfm);
201out: return error;
202}
203
204static __inline__ void crypto_exit(void *mem)
205{
206 crypto_free_tfm((struct crypto_tfm *)mem);
207}
208
209static __inline__ int crypto_write(struct pbe *p, void *mem)
210{
211 int error = 0;
212 struct scatterlist src, dst;
213
214 src.page = virt_to_page(p->address);
215 src.offset = 0;
216 src.length = PAGE_SIZE;
217 dst.page = virt_to_page((void *)&swsusp_header);
218 dst.offset = 0;
219 dst.length = PAGE_SIZE;
220
221 error = crypto_cipher_encrypt((struct crypto_tfm *)mem, &dst, &src,
222 PAGE_SIZE);
223
224 if (!error)
225 error = write_page((unsigned long)&swsusp_header,
226 &(p->swap_address));
227 return error;
228}
229
230static __inline__ int crypto_read(struct pbe *p, void *mem)
231{
232 int error = 0;
233 struct scatterlist src, dst;
234
235 error = bio_read_page(swp_offset(p->swap_address), (void *)p->address);
236 if (!error) {
237 src.offset = 0;
238 src.length = PAGE_SIZE;
239 dst.offset = 0;
240 dst.length = PAGE_SIZE;
241 src.page = dst.page = virt_to_page((void *)p->address);
242
243 error = crypto_cipher_decrypt((struct crypto_tfm *)mem, &dst,
244 &src, PAGE_SIZE);
245 }
246 return error;
247}
248#else
249static __inline__ int crypto_init(int mode, void *mem)
250{
251 return 0;
252}
253
254static __inline__ void crypto_exit(void *mem)
255{
256}
257
258static __inline__ int crypto_write(struct pbe *p, void *mem)
259{
260 return write_page(p->address, &(p->swap_address));
261}
262
263static __inline__ int crypto_read(struct pbe *p, void *mem)
264{
265 return bio_read_page(swp_offset(p->swap_address), (void *)p->address);
266}
267#endif
268
132static int mark_swapfiles(swp_entry_t prev) 269static int mark_swapfiles(swp_entry_t prev)
133{ 270{
134 int error; 271 int error;
@@ -140,6 +277,7 @@ static int mark_swapfiles(swp_entry_t prev)
140 !memcmp("SWAPSPACE2",swsusp_header.sig, 10)) { 277 !memcmp("SWAPSPACE2",swsusp_header.sig, 10)) {
141 memcpy(swsusp_header.orig_sig,swsusp_header.sig, 10); 278 memcpy(swsusp_header.orig_sig,swsusp_header.sig, 10);
142 memcpy(swsusp_header.sig,SWSUSP_SIG, 10); 279 memcpy(swsusp_header.sig,SWSUSP_SIG, 10);
280 memcpy(swsusp_header.key_iv, key_iv, MAXKEY+MAXIV);
143 swsusp_header.swsusp_info = prev; 281 swsusp_header.swsusp_info = prev;
144 error = rw_swap_page_sync(WRITE, 282 error = rw_swap_page_sync(WRITE,
145 swp_entry(root_swap, 0), 283 swp_entry(root_swap, 0),
@@ -179,9 +317,9 @@ static int swsusp_swap_check(void) /* This is called before saving image */
179 len=strlen(resume_file); 317 len=strlen(resume_file);
180 root_swap = 0xFFFF; 318 root_swap = 0xFFFF;
181 319
182 swap_list_lock(); 320 spin_lock(&swap_lock);
183 for (i=0; i<MAX_SWAPFILES; i++) { 321 for (i=0; i<MAX_SWAPFILES; i++) {
184 if (swap_info[i].flags == 0) { 322 if (!(swap_info[i].flags & SWP_WRITEOK)) {
185 swapfile_used[i]=SWAPFILE_UNUSED; 323 swapfile_used[i]=SWAPFILE_UNUSED;
186 } else { 324 } else {
187 if (!len) { 325 if (!len) {
@@ -202,7 +340,7 @@ static int swsusp_swap_check(void) /* This is called before saving image */
202 } 340 }
203 } 341 }
204 } 342 }
205 swap_list_unlock(); 343 spin_unlock(&swap_lock);
206 return (root_swap != 0xffff) ? 0 : -ENODEV; 344 return (root_swap != 0xffff) ? 0 : -ENODEV;
207} 345}
208 346
@@ -216,12 +354,12 @@ static void lock_swapdevices(void)
216{ 354{
217 int i; 355 int i;
218 356
219 swap_list_lock(); 357 spin_lock(&swap_lock);
220 for (i = 0; i< MAX_SWAPFILES; i++) 358 for (i = 0; i< MAX_SWAPFILES; i++)
221 if (swapfile_used[i] == SWAPFILE_IGNORED) { 359 if (swapfile_used[i] == SWAPFILE_IGNORED) {
222 swap_info[i].flags ^= 0xFF; 360 swap_info[i].flags ^= SWP_WRITEOK;
223 } 361 }
224 swap_list_unlock(); 362 spin_unlock(&swap_lock);
225} 363}
226 364
227/** 365/**
@@ -286,6 +424,10 @@ static int data_write(void)
286 int error = 0, i = 0; 424 int error = 0, i = 0;
287 unsigned int mod = nr_copy_pages / 100; 425 unsigned int mod = nr_copy_pages / 100;
288 struct pbe *p; 426 struct pbe *p;
427 void *tfm;
428
429 if ((error = crypto_init(1, &tfm)))
430 return error;
289 431
290 if (!mod) 432 if (!mod)
291 mod = 1; 433 mod = 1;
@@ -294,11 +436,14 @@ static int data_write(void)
294 for_each_pbe (p, pagedir_nosave) { 436 for_each_pbe (p, pagedir_nosave) {
295 if (!(i%mod)) 437 if (!(i%mod))
296 printk( "\b\b\b\b%3d%%", i / mod ); 438 printk( "\b\b\b\b%3d%%", i / mod );
297 if ((error = write_page(p->address, &(p->swap_address)))) 439 if ((error = crypto_write(p, tfm))) {
440 crypto_exit(tfm);
298 return error; 441 return error;
442 }
299 i++; 443 i++;
300 } 444 }
301 printk("\b\b\b\bdone\n"); 445 printk("\b\b\b\bdone\n");
446 crypto_exit(tfm);
302 return error; 447 return error;
303} 448}
304 449
@@ -385,7 +530,6 @@ static int write_pagedir(void)
385 * write_suspend_image - Write entire image and metadata. 530 * write_suspend_image - Write entire image and metadata.
386 * 531 *
387 */ 532 */
388
389static int write_suspend_image(void) 533static int write_suspend_image(void)
390{ 534{
391 int error; 535 int error;
@@ -400,6 +544,7 @@ static int write_suspend_image(void)
400 if ((error = close_swap())) 544 if ((error = close_swap()))
401 goto FreePagedir; 545 goto FreePagedir;
402 Done: 546 Done:
547 memset(key_iv, 0, MAXKEY+MAXIV);
403 return error; 548 return error;
404 FreePagedir: 549 FreePagedir:
405 free_pagedir_entries(); 550 free_pagedir_entries();
@@ -591,18 +736,7 @@ static void copy_data_pages(void)
591 736
592static int calc_nr(int nr_copy) 737static int calc_nr(int nr_copy)
593{ 738{
594 int extra = 0; 739 return nr_copy + (nr_copy+PBES_PER_PAGE-2)/(PBES_PER_PAGE-1);
595 int mod = !!(nr_copy % PBES_PER_PAGE);
596 int diff = (nr_copy / PBES_PER_PAGE) + mod;
597
598 do {
599 extra += diff;
600 nr_copy += diff;
601 mod = !!(nr_copy % PBES_PER_PAGE);
602 diff = (nr_copy / PBES_PER_PAGE) + mod - extra;
603 } while (diff > 0);
604
605 return nr_copy;
606} 740}
607 741
608/** 742/**
@@ -886,20 +1020,21 @@ int swsusp_suspend(void)
886 * at resume time, and evil weirdness ensues. 1020 * at resume time, and evil weirdness ensues.
887 */ 1021 */
888 if ((error = device_power_down(PMSG_FREEZE))) { 1022 if ((error = device_power_down(PMSG_FREEZE))) {
1023 printk(KERN_ERR "Some devices failed to power down, aborting suspend\n");
889 local_irq_enable(); 1024 local_irq_enable();
890 return error; 1025 return error;
891 } 1026 }
892 1027
893 if ((error = swsusp_swap_check())) { 1028 if ((error = swsusp_swap_check())) {
894 printk(KERN_ERR "swsusp: FATAL: cannot find swap device, try " 1029 printk(KERN_ERR "swsusp: cannot find swap device, try swapon -a.\n");
895 "swapon -a!\n"); 1030 device_power_up();
896 local_irq_enable(); 1031 local_irq_enable();
897 return error; 1032 return error;
898 } 1033 }
899 1034
900 save_processor_state(); 1035 save_processor_state();
901 if ((error = swsusp_arch_suspend())) 1036 if ((error = swsusp_arch_suspend()))
902 printk("Error %d suspending\n", error); 1037 printk(KERN_ERR "Error %d suspending\n", error);
903 /* Restore control flow magically appears here */ 1038 /* Restore control flow magically appears here */
904 restore_processor_state(); 1039 restore_processor_state();
905 BUG_ON (nr_copy_pages_check != nr_copy_pages); 1040 BUG_ON (nr_copy_pages_check != nr_copy_pages);
@@ -1179,7 +1314,8 @@ static const char * sanity_check(void)
1179 if (strcmp(swsusp_info.uts.machine,system_utsname.machine)) 1314 if (strcmp(swsusp_info.uts.machine,system_utsname.machine))
1180 return "machine"; 1315 return "machine";
1181#if 0 1316#if 0
1182 if(swsusp_info.cpus != num_online_cpus()) 1317 /* We can't use number of online CPUs when we use hotplug to remove them ;-))) */
1318 if (swsusp_info.cpus != num_possible_cpus())
1183 return "number of cpus"; 1319 return "number of cpus";
1184#endif 1320#endif
1185 return NULL; 1321 return NULL;
@@ -1212,13 +1348,14 @@ static int check_sig(void)
1212 return error; 1348 return error;
1213 if (!memcmp(SWSUSP_SIG, swsusp_header.sig, 10)) { 1349 if (!memcmp(SWSUSP_SIG, swsusp_header.sig, 10)) {
1214 memcpy(swsusp_header.sig, swsusp_header.orig_sig, 10); 1350 memcpy(swsusp_header.sig, swsusp_header.orig_sig, 10);
1351 memcpy(key_iv, swsusp_header.key_iv, MAXKEY+MAXIV);
1352 memset(swsusp_header.key_iv, 0, MAXKEY+MAXIV);
1215 1353
1216 /* 1354 /*
1217 * Reset swap signature now. 1355 * Reset swap signature now.
1218 */ 1356 */
1219 error = bio_write_page(0, &swsusp_header); 1357 error = bio_write_page(0, &swsusp_header);
1220 } else { 1358 } else {
1221 printk(KERN_ERR "swsusp: Suspend partition has wrong signature?\n");
1222 return -EINVAL; 1359 return -EINVAL;
1223 } 1360 }
1224 if (!error) 1361 if (!error)
@@ -1239,6 +1376,10 @@ static int data_read(struct pbe *pblist)
1239 int error = 0; 1376 int error = 0;
1240 int i = 0; 1377 int i = 0;
1241 int mod = swsusp_info.image_pages / 100; 1378 int mod = swsusp_info.image_pages / 100;
1379 void *tfm;
1380
1381 if ((error = crypto_init(0, &tfm)))
1382 return error;
1242 1383
1243 if (!mod) 1384 if (!mod)
1244 mod = 1; 1385 mod = 1;
@@ -1250,14 +1391,15 @@ static int data_read(struct pbe *pblist)
1250 if (!(i % mod)) 1391 if (!(i % mod))
1251 printk("\b\b\b\b%3d%%", i / mod); 1392 printk("\b\b\b\b%3d%%", i / mod);
1252 1393
1253 error = bio_read_page(swp_offset(p->swap_address), 1394 if ((error = crypto_read(p, tfm))) {
1254 (void *)p->address); 1395 crypto_exit(tfm);
1255 if (error)
1256 return error; 1396 return error;
1397 }
1257 1398
1258 i++; 1399 i++;
1259 } 1400 }
1260 printk("\b\b\b\bdone\n"); 1401 printk("\b\b\b\bdone\n");
1402 crypto_exit(tfm);
1261 return error; 1403 return error;
1262} 1404}
1263 1405
@@ -1385,6 +1527,7 @@ int swsusp_read(void)
1385 1527
1386 error = read_suspend_image(); 1528 error = read_suspend_image();
1387 blkdev_put(resume_bdev); 1529 blkdev_put(resume_bdev);
1530 memset(key_iv, 0, MAXKEY+MAXIV);
1388 1531
1389 if (!error) 1532 if (!error)
1390 pr_debug("swsusp: Reading resume file was successful\n"); 1533 pr_debug("swsusp: Reading resume file was successful\n");
diff --git a/lib/Makefile b/lib/Makefile
index 52f83380f704..3e2bd0df23bb 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -18,6 +18,7 @@ endif
18 18
19lib-$(CONFIG_RWSEM_GENERIC_SPINLOCK) += rwsem-spinlock.o 19lib-$(CONFIG_RWSEM_GENERIC_SPINLOCK) += rwsem-spinlock.o
20lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem.o 20lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem.o
21lib-$(CONFIG_SEMAPHORE_SLEEPERS) += semaphore-sleepers.o
21lib-$(CONFIG_GENERIC_FIND_NEXT_BIT) += find_next_bit.o 22lib-$(CONFIG_GENERIC_FIND_NEXT_BIT) += find_next_bit.o
22obj-$(CONFIG_LOCK_KERNEL) += kernel_lock.o 23obj-$(CONFIG_LOCK_KERNEL) += kernel_lock.o
23obj-$(CONFIG_DEBUG_PREEMPT) += smp_processor_id.o 24obj-$(CONFIG_DEBUG_PREEMPT) += smp_processor_id.o
diff --git a/arch/x86_64/kernel/semaphore.c b/lib/semaphore-sleepers.c
index 48f7c18172b9..4d5f18889fa5 100644
--- a/arch/x86_64/kernel/semaphore.c
+++ b/lib/semaphore-sleepers.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * x86_64 semaphore implementation. 2 * i386 and x86-64 semaphore implementation.
3 * 3 *
4 * (C) Copyright 1999 Linus Torvalds 4 * (C) Copyright 1999 Linus Torvalds
5 * 5 *
@@ -14,9 +14,8 @@
14 */ 14 */
15#include <linux/config.h> 15#include <linux/config.h>
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/err.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <asm/errno.h>
19
20#include <asm/semaphore.h> 19#include <asm/semaphore.h>
21 20
22/* 21/*
@@ -50,12 +49,12 @@
50 * we cannot lose wakeup events. 49 * we cannot lose wakeup events.
51 */ 50 */
52 51
53void __up(struct semaphore *sem) 52fastcall void __up(struct semaphore *sem)
54{ 53{
55 wake_up(&sem->wait); 54 wake_up(&sem->wait);
56} 55}
57 56
58void __sched __down(struct semaphore * sem) 57fastcall void __sched __down(struct semaphore * sem)
59{ 58{
60 struct task_struct *tsk = current; 59 struct task_struct *tsk = current;
61 DECLARE_WAITQUEUE(wait, tsk); 60 DECLARE_WAITQUEUE(wait, tsk);
@@ -92,7 +91,7 @@ void __sched __down(struct semaphore * sem)
92 tsk->state = TASK_RUNNING; 91 tsk->state = TASK_RUNNING;
93} 92}
94 93
95int __sched __down_interruptible(struct semaphore * sem) 94fastcall int __sched __down_interruptible(struct semaphore * sem)
96{ 95{
97 int retval = 0; 96 int retval = 0;
98 struct task_struct *tsk = current; 97 struct task_struct *tsk = current;
@@ -155,7 +154,7 @@ int __sched __down_interruptible(struct semaphore * sem)
155 * single "cmpxchg" without failure cases, 154 * single "cmpxchg" without failure cases,
156 * but then it wouldn't work on a 386. 155 * but then it wouldn't work on a 386.
157 */ 156 */
158int __down_trylock(struct semaphore * sem) 157fastcall int __down_trylock(struct semaphore * sem)
159{ 158{
160 int sleepers; 159 int sleepers;
161 unsigned long flags; 160 unsigned long flags;
@@ -176,5 +175,3 @@ int __down_trylock(struct semaphore * sem)
176 spin_unlock_irqrestore(&sem->wait.lock, flags); 175 spin_unlock_irqrestore(&sem->wait.lock, flags);
177 return 1; 176 return 1;
178} 177}
179
180
diff --git a/mm/Kconfig b/mm/Kconfig
index cd379936cac6..4e9937ac3529 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -89,3 +89,25 @@ config NEED_MULTIPLE_NODES
89config HAVE_MEMORY_PRESENT 89config HAVE_MEMORY_PRESENT
90 def_bool y 90 def_bool y
91 depends on ARCH_HAVE_MEMORY_PRESENT || SPARSEMEM 91 depends on ARCH_HAVE_MEMORY_PRESENT || SPARSEMEM
92
93#
94# SPARSEMEM_EXTREME (which is the default) does some bootmem
95# allocations when memory_present() is called. If this can not
96# be done on your architecture, select this option. However,
97# statically allocating the mem_section[] array can potentially
98# consume vast quantities of .bss, so be careful.
99#
100# This option will also potentially produce smaller runtime code
101# with gcc 3.4 and later.
102#
103config SPARSEMEM_STATIC
104 def_bool n
105
106#
107# Architectecture platforms which require a two level mem_section in SPARSEMEM
108# must select this option. This is usually for architecture platforms with
109# an extremely sparse physical address space.
110#
111config SPARSEMEM_EXTREME
112 def_bool y
113 depends on SPARSEMEM && !SPARSEMEM_STATIC
diff --git a/mm/filemap.c b/mm/filemap.c
index c11418dd94e8..88611928e71f 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -54,9 +54,8 @@
54 * 54 *
55 * ->i_mmap_lock (vmtruncate) 55 * ->i_mmap_lock (vmtruncate)
56 * ->private_lock (__free_pte->__set_page_dirty_buffers) 56 * ->private_lock (__free_pte->__set_page_dirty_buffers)
57 * ->swap_list_lock 57 * ->swap_lock (exclusive_swap_page, others)
58 * ->swap_device_lock (exclusive_swap_page, others) 58 * ->mapping->tree_lock
59 * ->mapping->tree_lock
60 * 59 *
61 * ->i_sem 60 * ->i_sem
62 * ->i_mmap_lock (truncate->unmap_mapping_range) 61 * ->i_mmap_lock (truncate->unmap_mapping_range)
@@ -86,7 +85,7 @@
86 * ->page_table_lock (anon_vma_prepare and various) 85 * ->page_table_lock (anon_vma_prepare and various)
87 * 86 *
88 * ->page_table_lock 87 * ->page_table_lock
89 * ->swap_device_lock (try_to_unmap_one) 88 * ->swap_lock (try_to_unmap_one)
90 * ->private_lock (try_to_unmap_one) 89 * ->private_lock (try_to_unmap_one)
91 * ->tree_lock (try_to_unmap_one) 90 * ->tree_lock (try_to_unmap_one)
92 * ->zone.lru_lock (follow_page->mark_page_accessed) 91 * ->zone.lru_lock (follow_page->mark_page_accessed)
@@ -1505,8 +1504,12 @@ repeat:
1505 return -EINVAL; 1504 return -EINVAL;
1506 1505
1507 page = filemap_getpage(file, pgoff, nonblock); 1506 page = filemap_getpage(file, pgoff, nonblock);
1507
1508 /* XXX: This is wrong, a filesystem I/O error may have happened. Fix that as
1509 * done in shmem_populate calling shmem_getpage */
1508 if (!page && !nonblock) 1510 if (!page && !nonblock)
1509 return -ENOMEM; 1511 return -ENOMEM;
1512
1510 if (page) { 1513 if (page) {
1511 err = install_page(mm, vma, addr, page, prot); 1514 err = install_page(mm, vma, addr, page, prot);
1512 if (err) { 1515 if (err) {
@@ -1514,6 +1517,9 @@ repeat:
1514 return err; 1517 return err;
1515 } 1518 }
1516 } else { 1519 } else {
1520 /* No page was found just because we can't read it in now (being
1521 * here implies nonblock != 0), but the page may exist, so set
1522 * the PTE to fault it in later. */
1517 err = install_file_pte(mm, vma, addr, pgoff, prot); 1523 err = install_file_pte(mm, vma, addr, pgoff, prot);
1518 if (err) 1524 if (err)
1519 return err; 1525 return err;
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 6bf720bc662c..901ac523a1c3 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -360,8 +360,6 @@ int hugetlb_prefault(struct address_space *mapping, struct vm_area_struct *vma)
360 ret = -ENOMEM; 360 ret = -ENOMEM;
361 goto out; 361 goto out;
362 } 362 }
363 if (! pte_none(*pte))
364 hugetlb_clean_stale_pgtable(pte);
365 363
366 idx = ((addr - vma->vm_start) >> HPAGE_SHIFT) 364 idx = ((addr - vma->vm_start) >> HPAGE_SHIFT)
367 + (vma->vm_pgoff >> (HPAGE_SHIFT - PAGE_SHIFT)); 365 + (vma->vm_pgoff >> (HPAGE_SHIFT - PAGE_SHIFT));
diff --git a/mm/madvise.c b/mm/madvise.c
index c8c01a12fea4..4454936f87d1 100644
--- a/mm/madvise.c
+++ b/mm/madvise.c
@@ -37,7 +37,7 @@ static long madvise_behavior(struct vm_area_struct * vma,
37 37
38 if (new_flags == vma->vm_flags) { 38 if (new_flags == vma->vm_flags) {
39 *prev = vma; 39 *prev = vma;
40 goto success; 40 goto out;
41 } 41 }
42 42
43 pgoff = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT); 43 pgoff = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
@@ -62,6 +62,7 @@ static long madvise_behavior(struct vm_area_struct * vma,
62 goto out; 62 goto out;
63 } 63 }
64 64
65success:
65 /* 66 /*
66 * vm_flags is protected by the mmap_sem held in write mode. 67 * vm_flags is protected by the mmap_sem held in write mode.
67 */ 68 */
@@ -70,7 +71,6 @@ static long madvise_behavior(struct vm_area_struct * vma,
70out: 71out:
71 if (error == -ENOMEM) 72 if (error == -ENOMEM)
72 error = -EAGAIN; 73 error = -EAGAIN;
73success:
74 return error; 74 return error;
75} 75}
76 76
@@ -237,8 +237,9 @@ asmlinkage long sys_madvise(unsigned long start, size_t len_in, int behavior)
237 * - different from the way of handling in mlock etc. 237 * - different from the way of handling in mlock etc.
238 */ 238 */
239 vma = find_vma_prev(current->mm, start, &prev); 239 vma = find_vma_prev(current->mm, start, &prev);
240 if (!vma && prev) 240 if (vma && start > vma->vm_start)
241 vma = prev->vm_next; 241 prev = vma;
242
242 for (;;) { 243 for (;;) {
243 /* Still start < end. */ 244 /* Still start < end. */
244 error = -ENOMEM; 245 error = -ENOMEM;
diff --git a/mm/memory.c b/mm/memory.c
index a596c1172248..788a62810340 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -562,7 +562,8 @@ static void zap_pte_range(struct mmu_gather *tlb, pmd_t *pmd,
562 page->index > details->last_index)) 562 page->index > details->last_index))
563 continue; 563 continue;
564 } 564 }
565 ptent = ptep_get_and_clear(tlb->mm, addr, pte); 565 ptent = ptep_get_and_clear_full(tlb->mm, addr, pte,
566 tlb->fullmm);
566 tlb_remove_tlb_entry(tlb, pte, addr); 567 tlb_remove_tlb_entry(tlb, pte, addr);
567 if (unlikely(!page)) 568 if (unlikely(!page))
568 continue; 569 continue;
@@ -590,7 +591,7 @@ static void zap_pte_range(struct mmu_gather *tlb, pmd_t *pmd,
590 continue; 591 continue;
591 if (!pte_file(ptent)) 592 if (!pte_file(ptent))
592 free_swap_and_cache(pte_to_swp_entry(ptent)); 593 free_swap_and_cache(pte_to_swp_entry(ptent));
593 pte_clear(tlb->mm, addr, pte); 594 pte_clear_full(tlb->mm, addr, pte, tlb->fullmm);
594 } while (pte++, addr += PAGE_SIZE, addr != end); 595 } while (pte++, addr += PAGE_SIZE, addr != end);
595 pte_unmap(pte - 1); 596 pte_unmap(pte - 1);
596} 597}
@@ -1955,7 +1956,7 @@ static int do_file_page(struct mm_struct * mm, struct vm_area_struct * vma,
1955 * Fall back to the linear mapping if the fs does not support 1956 * Fall back to the linear mapping if the fs does not support
1956 * ->populate: 1957 * ->populate:
1957 */ 1958 */
1958 if (!vma->vm_ops || !vma->vm_ops->populate || 1959 if (!vma->vm_ops->populate ||
1959 (write_access && !(vma->vm_flags & VM_SHARED))) { 1960 (write_access && !(vma->vm_flags & VM_SHARED))) {
1960 pte_clear(mm, address, pte); 1961 pte_clear(mm, address, pte);
1961 return do_no_page(mm, vma, address, write_access, pte, pmd); 1962 return do_no_page(mm, vma, address, write_access, pte, pmd);
diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index b4eababc8198..13492d66b7c8 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -664,10 +664,10 @@ asmlinkage long compat_sys_mbind(compat_ulong_t start, compat_ulong_t len,
664#endif 664#endif
665 665
666/* Return effective policy for a VMA */ 666/* Return effective policy for a VMA */
667static struct mempolicy * 667struct mempolicy *
668get_vma_policy(struct vm_area_struct *vma, unsigned long addr) 668get_vma_policy(struct task_struct *task, struct vm_area_struct *vma, unsigned long addr)
669{ 669{
670 struct mempolicy *pol = current->mempolicy; 670 struct mempolicy *pol = task->mempolicy;
671 671
672 if (vma) { 672 if (vma) {
673 if (vma->vm_ops && vma->vm_ops->get_policy) 673 if (vma->vm_ops && vma->vm_ops->get_policy)
@@ -786,7 +786,7 @@ static struct page *alloc_page_interleave(unsigned int __nocast gfp, unsigned or
786struct page * 786struct page *
787alloc_page_vma(unsigned int __nocast gfp, struct vm_area_struct *vma, unsigned long addr) 787alloc_page_vma(unsigned int __nocast gfp, struct vm_area_struct *vma, unsigned long addr)
788{ 788{
789 struct mempolicy *pol = get_vma_policy(vma, addr); 789 struct mempolicy *pol = get_vma_policy(current, vma, addr);
790 790
791 cpuset_update_current_mems_allowed(); 791 cpuset_update_current_mems_allowed();
792 792
@@ -908,7 +908,7 @@ void __mpol_free(struct mempolicy *p)
908/* Find first node suitable for an allocation */ 908/* Find first node suitable for an allocation */
909int mpol_first_node(struct vm_area_struct *vma, unsigned long addr) 909int mpol_first_node(struct vm_area_struct *vma, unsigned long addr)
910{ 910{
911 struct mempolicy *pol = get_vma_policy(vma, addr); 911 struct mempolicy *pol = get_vma_policy(current, vma, addr);
912 912
913 switch (pol->policy) { 913 switch (pol->policy) {
914 case MPOL_DEFAULT: 914 case MPOL_DEFAULT:
@@ -928,7 +928,7 @@ int mpol_first_node(struct vm_area_struct *vma, unsigned long addr)
928/* Find secondary valid nodes for an allocation */ 928/* Find secondary valid nodes for an allocation */
929int mpol_node_valid(int nid, struct vm_area_struct *vma, unsigned long addr) 929int mpol_node_valid(int nid, struct vm_area_struct *vma, unsigned long addr)
930{ 930{
931 struct mempolicy *pol = get_vma_policy(vma, addr); 931 struct mempolicy *pol = get_vma_policy(current, vma, addr);
932 932
933 switch (pol->policy) { 933 switch (pol->policy) {
934 case MPOL_PREFERRED: 934 case MPOL_PREFERRED:
diff --git a/mm/mremap.c b/mm/mremap.c
index fc45dc9a617b..a32fed454bd7 100644
--- a/mm/mremap.c
+++ b/mm/mremap.c
@@ -141,6 +141,10 @@ move_one_page(struct vm_area_struct *vma, unsigned long old_addr,
141 if (dst) { 141 if (dst) {
142 pte_t pte; 142 pte_t pte;
143 pte = ptep_clear_flush(vma, old_addr, src); 143 pte = ptep_clear_flush(vma, old_addr, src);
144 /* ZERO_PAGE can be dependant on virtual addr */
145 if (pfn_valid(pte_pfn(pte)) &&
146 pte_page(pte) == ZERO_PAGE(old_addr))
147 pte = pte_wrprotect(mk_pte(ZERO_PAGE(new_addr), new_vma->vm_page_prot));
144 set_pte_at(mm, new_addr, dst, pte); 148 set_pte_at(mm, new_addr, dst, pte);
145 } else 149 } else
146 error = -ENOMEM; 150 error = -ENOMEM;
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 8d088371196a..b06a9636d971 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -329,7 +329,7 @@ static inline void free_pages_check(const char *function, struct page *page)
329 1 << PG_writeback ))) 329 1 << PG_writeback )))
330 bad_page(function, page); 330 bad_page(function, page);
331 if (PageDirty(page)) 331 if (PageDirty(page))
332 ClearPageDirty(page); 332 __ClearPageDirty(page);
333} 333}
334 334
335/* 335/*
@@ -1130,19 +1130,20 @@ EXPORT_SYMBOL(nr_pagecache);
1130DEFINE_PER_CPU(long, nr_pagecache_local) = 0; 1130DEFINE_PER_CPU(long, nr_pagecache_local) = 0;
1131#endif 1131#endif
1132 1132
1133void __get_page_state(struct page_state *ret, int nr) 1133void __get_page_state(struct page_state *ret, int nr, cpumask_t *cpumask)
1134{ 1134{
1135 int cpu = 0; 1135 int cpu = 0;
1136 1136
1137 memset(ret, 0, sizeof(*ret)); 1137 memset(ret, 0, sizeof(*ret));
1138 cpus_and(*cpumask, *cpumask, cpu_online_map);
1138 1139
1139 cpu = first_cpu(cpu_online_map); 1140 cpu = first_cpu(*cpumask);
1140 while (cpu < NR_CPUS) { 1141 while (cpu < NR_CPUS) {
1141 unsigned long *in, *out, off; 1142 unsigned long *in, *out, off;
1142 1143
1143 in = (unsigned long *)&per_cpu(page_states, cpu); 1144 in = (unsigned long *)&per_cpu(page_states, cpu);
1144 1145
1145 cpu = next_cpu(cpu, cpu_online_map); 1146 cpu = next_cpu(cpu, *cpumask);
1146 1147
1147 if (cpu < NR_CPUS) 1148 if (cpu < NR_CPUS)
1148 prefetch(&per_cpu(page_states, cpu)); 1149 prefetch(&per_cpu(page_states, cpu));
@@ -1153,19 +1154,33 @@ void __get_page_state(struct page_state *ret, int nr)
1153 } 1154 }
1154} 1155}
1155 1156
1157void get_page_state_node(struct page_state *ret, int node)
1158{
1159 int nr;
1160 cpumask_t mask = node_to_cpumask(node);
1161
1162 nr = offsetof(struct page_state, GET_PAGE_STATE_LAST);
1163 nr /= sizeof(unsigned long);
1164
1165 __get_page_state(ret, nr+1, &mask);
1166}
1167
1156void get_page_state(struct page_state *ret) 1168void get_page_state(struct page_state *ret)
1157{ 1169{
1158 int nr; 1170 int nr;
1171 cpumask_t mask = CPU_MASK_ALL;
1159 1172
1160 nr = offsetof(struct page_state, GET_PAGE_STATE_LAST); 1173 nr = offsetof(struct page_state, GET_PAGE_STATE_LAST);
1161 nr /= sizeof(unsigned long); 1174 nr /= sizeof(unsigned long);
1162 1175
1163 __get_page_state(ret, nr + 1); 1176 __get_page_state(ret, nr + 1, &mask);
1164} 1177}
1165 1178
1166void get_full_page_state(struct page_state *ret) 1179void get_full_page_state(struct page_state *ret)
1167{ 1180{
1168 __get_page_state(ret, sizeof(*ret) / sizeof(unsigned long)); 1181 cpumask_t mask = CPU_MASK_ALL;
1182
1183 __get_page_state(ret, sizeof(*ret) / sizeof(unsigned long), &mask);
1169} 1184}
1170 1185
1171unsigned long __read_page_state(unsigned long offset) 1186unsigned long __read_page_state(unsigned long offset)
@@ -1909,7 +1924,7 @@ static void __init free_area_init_core(struct pglist_data *pgdat,
1909 zone->nr_scan_inactive = 0; 1924 zone->nr_scan_inactive = 0;
1910 zone->nr_active = 0; 1925 zone->nr_active = 0;
1911 zone->nr_inactive = 0; 1926 zone->nr_inactive = 0;
1912 atomic_set(&zone->reclaim_in_progress, -1); 1927 atomic_set(&zone->reclaim_in_progress, 0);
1913 if (!size) 1928 if (!size)
1914 continue; 1929 continue;
1915 1930
diff --git a/mm/rmap.c b/mm/rmap.c
index 08ac5c7fa91f..450f5241b5a5 100644
--- a/mm/rmap.c
+++ b/mm/rmap.c
@@ -34,9 +34,8 @@
34 * anon_vma->lock 34 * anon_vma->lock
35 * mm->page_table_lock 35 * mm->page_table_lock
36 * zone->lru_lock (in mark_page_accessed) 36 * zone->lru_lock (in mark_page_accessed)
37 * swap_list_lock (in swap_free etc's swap_info_get) 37 * swap_lock (in swap_duplicate, swap_info_get)
38 * mmlist_lock (in mmput, drain_mmlist and others) 38 * mmlist_lock (in mmput, drain_mmlist and others)
39 * swap_device_lock (in swap_duplicate, swap_info_get)
40 * mapping->private_lock (in __set_page_dirty_buffers) 39 * mapping->private_lock (in __set_page_dirty_buffers)
41 * inode_lock (in set_page_dirty's __mark_inode_dirty) 40 * inode_lock (in set_page_dirty's __mark_inode_dirty)
42 * sb_lock (within inode_lock in fs/fs-writeback.c) 41 * sb_lock (within inode_lock in fs/fs-writeback.c)
@@ -290,8 +289,6 @@ static int page_referenced_one(struct page *page,
290 pte_t *pte; 289 pte_t *pte;
291 int referenced = 0; 290 int referenced = 0;
292 291
293 if (!get_mm_counter(mm, rss))
294 goto out;
295 address = vma_address(page, vma); 292 address = vma_address(page, vma);
296 if (address == -EFAULT) 293 if (address == -EFAULT)
297 goto out; 294 goto out;
@@ -442,22 +439,19 @@ int page_referenced(struct page *page, int is_locked, int ignore_token)
442void page_add_anon_rmap(struct page *page, 439void page_add_anon_rmap(struct page *page,
443 struct vm_area_struct *vma, unsigned long address) 440 struct vm_area_struct *vma, unsigned long address)
444{ 441{
445 struct anon_vma *anon_vma = vma->anon_vma;
446 pgoff_t index;
447
448 BUG_ON(PageReserved(page)); 442 BUG_ON(PageReserved(page));
449 BUG_ON(!anon_vma);
450 443
451 inc_mm_counter(vma->vm_mm, anon_rss); 444 inc_mm_counter(vma->vm_mm, anon_rss);
452 445
453 anon_vma = (void *) anon_vma + PAGE_MAPPING_ANON;
454 index = (address - vma->vm_start) >> PAGE_SHIFT;
455 index += vma->vm_pgoff;
456 index >>= PAGE_CACHE_SHIFT - PAGE_SHIFT;
457
458 if (atomic_inc_and_test(&page->_mapcount)) { 446 if (atomic_inc_and_test(&page->_mapcount)) {
459 page->index = index; 447 struct anon_vma *anon_vma = vma->anon_vma;
448
449 BUG_ON(!anon_vma);
450 anon_vma = (void *) anon_vma + PAGE_MAPPING_ANON;
460 page->mapping = (struct address_space *) anon_vma; 451 page->mapping = (struct address_space *) anon_vma;
452
453 page->index = linear_page_index(vma, address);
454
461 inc_page_state(nr_mapped); 455 inc_page_state(nr_mapped);
462 } 456 }
463 /* else checking page index and mapping is racy */ 457 /* else checking page index and mapping is racy */
@@ -518,8 +512,6 @@ static int try_to_unmap_one(struct page *page, struct vm_area_struct *vma)
518 pte_t pteval; 512 pte_t pteval;
519 int ret = SWAP_AGAIN; 513 int ret = SWAP_AGAIN;
520 514
521 if (!get_mm_counter(mm, rss))
522 goto out;
523 address = vma_address(page, vma); 515 address = vma_address(page, vma);
524 if (address == -EFAULT) 516 if (address == -EFAULT)
525 goto out; 517 goto out;
@@ -532,6 +524,8 @@ static int try_to_unmap_one(struct page *page, struct vm_area_struct *vma)
532 * If the page is mlock()d, we cannot swap it out. 524 * If the page is mlock()d, we cannot swap it out.
533 * If it's recently referenced (perhaps page_referenced 525 * If it's recently referenced (perhaps page_referenced
534 * skipped over this mm) then we should reactivate it. 526 * skipped over this mm) then we should reactivate it.
527 *
528 * Pages belonging to VM_RESERVED regions should not happen here.
535 */ 529 */
536 if ((vma->vm_flags & (VM_LOCKED|VM_RESERVED)) || 530 if ((vma->vm_flags & (VM_LOCKED|VM_RESERVED)) ||
537 ptep_clear_flush_young(vma, address, pte)) { 531 ptep_clear_flush_young(vma, address, pte)) {
@@ -767,8 +761,7 @@ static int try_to_unmap_file(struct page *page)
767 if (vma->vm_flags & (VM_LOCKED|VM_RESERVED)) 761 if (vma->vm_flags & (VM_LOCKED|VM_RESERVED))
768 continue; 762 continue;
769 cursor = (unsigned long) vma->vm_private_data; 763 cursor = (unsigned long) vma->vm_private_data;
770 while (get_mm_counter(vma->vm_mm, rss) && 764 while ( cursor < max_nl_cursor &&
771 cursor < max_nl_cursor &&
772 cursor < vma->vm_end - vma->vm_start) { 765 cursor < vma->vm_end - vma->vm_start) {
773 try_to_unmap_cluster(cursor, &mapcount, vma); 766 try_to_unmap_cluster(cursor, &mapcount, vma);
774 cursor += CLUSTER_SIZE; 767 cursor += CLUSTER_SIZE;
diff --git a/mm/shmem.c b/mm/shmem.c
index 5a81b1ee4f7a..bdc4bbb6ddbb 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -45,7 +45,6 @@
45#include <linux/swapops.h> 45#include <linux/swapops.h>
46#include <linux/mempolicy.h> 46#include <linux/mempolicy.h>
47#include <linux/namei.h> 47#include <linux/namei.h>
48#include <linux/xattr.h>
49#include <asm/uaccess.h> 48#include <asm/uaccess.h>
50#include <asm/div64.h> 49#include <asm/div64.h>
51#include <asm/pgtable.h> 50#include <asm/pgtable.h>
@@ -179,7 +178,6 @@ static struct address_space_operations shmem_aops;
179static struct file_operations shmem_file_operations; 178static struct file_operations shmem_file_operations;
180static struct inode_operations shmem_inode_operations; 179static struct inode_operations shmem_inode_operations;
181static struct inode_operations shmem_dir_inode_operations; 180static struct inode_operations shmem_dir_inode_operations;
182static struct inode_operations shmem_special_inode_operations;
183static struct vm_operations_struct shmem_vm_ops; 181static struct vm_operations_struct shmem_vm_ops;
184 182
185static struct backing_dev_info shmem_backing_dev_info = { 183static struct backing_dev_info shmem_backing_dev_info = {
@@ -1195,6 +1193,7 @@ static int shmem_populate(struct vm_area_struct *vma,
1195 err = shmem_getpage(inode, pgoff, &page, sgp, NULL); 1193 err = shmem_getpage(inode, pgoff, &page, sgp, NULL);
1196 if (err) 1194 if (err)
1197 return err; 1195 return err;
1196 /* Page may still be null, but only if nonblock was set. */
1198 if (page) { 1197 if (page) {
1199 mark_page_accessed(page); 1198 mark_page_accessed(page);
1200 err = install_page(mm, vma, addr, page, prot); 1199 err = install_page(mm, vma, addr, page, prot);
@@ -1202,7 +1201,10 @@ static int shmem_populate(struct vm_area_struct *vma,
1202 page_cache_release(page); 1201 page_cache_release(page);
1203 return err; 1202 return err;
1204 } 1203 }
1205 } else if (nonblock) { 1204 } else {
1205 /* No page was found just because we can't read it in
1206 * now (being here implies nonblock != 0), but the page
1207 * may exist, so set the PTE to fault it in later. */
1206 err = install_file_pte(mm, vma, addr, pgoff, prot); 1208 err = install_file_pte(mm, vma, addr, pgoff, prot);
1207 if (err) 1209 if (err)
1208 return err; 1210 return err;
@@ -1296,7 +1298,6 @@ shmem_get_inode(struct super_block *sb, int mode, dev_t dev)
1296 1298
1297 switch (mode & S_IFMT) { 1299 switch (mode & S_IFMT) {
1298 default: 1300 default:
1299 inode->i_op = &shmem_special_inode_operations;
1300 init_special_inode(inode, mode, dev); 1301 init_special_inode(inode, mode, dev);
1301 break; 1302 break;
1302 case S_IFREG: 1303 case S_IFREG:
@@ -1800,12 +1801,6 @@ static void shmem_put_link(struct dentry *dentry, struct nameidata *nd, void *co
1800static struct inode_operations shmem_symlink_inline_operations = { 1801static struct inode_operations shmem_symlink_inline_operations = {
1801 .readlink = generic_readlink, 1802 .readlink = generic_readlink,
1802 .follow_link = shmem_follow_link_inline, 1803 .follow_link = shmem_follow_link_inline,
1803#ifdef CONFIG_TMPFS_XATTR
1804 .setxattr = generic_setxattr,
1805 .getxattr = generic_getxattr,
1806 .listxattr = generic_listxattr,
1807 .removexattr = generic_removexattr,
1808#endif
1809}; 1804};
1810 1805
1811static struct inode_operations shmem_symlink_inode_operations = { 1806static struct inode_operations shmem_symlink_inode_operations = {
@@ -1813,12 +1808,6 @@ static struct inode_operations shmem_symlink_inode_operations = {
1813 .readlink = generic_readlink, 1808 .readlink = generic_readlink,
1814 .follow_link = shmem_follow_link, 1809 .follow_link = shmem_follow_link,
1815 .put_link = shmem_put_link, 1810 .put_link = shmem_put_link,
1816#ifdef CONFIG_TMPFS_XATTR
1817 .setxattr = generic_setxattr,
1818 .getxattr = generic_getxattr,
1819 .listxattr = generic_listxattr,
1820 .removexattr = generic_removexattr,
1821#endif
1822}; 1811};
1823 1812
1824static int shmem_parse_options(char *options, int *mode, uid_t *uid, gid_t *gid, unsigned long *blocks, unsigned long *inodes) 1813static int shmem_parse_options(char *options, int *mode, uid_t *uid, gid_t *gid, unsigned long *blocks, unsigned long *inodes)
@@ -1938,12 +1927,6 @@ static void shmem_put_super(struct super_block *sb)
1938 sb->s_fs_info = NULL; 1927 sb->s_fs_info = NULL;
1939} 1928}
1940 1929
1941#ifdef CONFIG_TMPFS_XATTR
1942static struct xattr_handler *shmem_xattr_handlers[];
1943#else
1944#define shmem_xattr_handlers NULL
1945#endif
1946
1947static int shmem_fill_super(struct super_block *sb, 1930static int shmem_fill_super(struct super_block *sb,
1948 void *data, int silent) 1931 void *data, int silent)
1949{ 1932{
@@ -1994,7 +1977,6 @@ static int shmem_fill_super(struct super_block *sb,
1994 sb->s_blocksize_bits = PAGE_CACHE_SHIFT; 1977 sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
1995 sb->s_magic = TMPFS_MAGIC; 1978 sb->s_magic = TMPFS_MAGIC;
1996 sb->s_op = &shmem_ops; 1979 sb->s_op = &shmem_ops;
1997 sb->s_xattr = shmem_xattr_handlers;
1998 1980
1999 inode = shmem_get_inode(sb, S_IFDIR | mode, 0); 1981 inode = shmem_get_inode(sb, S_IFDIR | mode, 0);
2000 if (!inode) 1982 if (!inode)
@@ -2083,12 +2065,6 @@ static struct file_operations shmem_file_operations = {
2083static struct inode_operations shmem_inode_operations = { 2065static struct inode_operations shmem_inode_operations = {
2084 .truncate = shmem_truncate, 2066 .truncate = shmem_truncate,
2085 .setattr = shmem_notify_change, 2067 .setattr = shmem_notify_change,
2086#ifdef CONFIG_TMPFS_XATTR
2087 .setxattr = generic_setxattr,
2088 .getxattr = generic_getxattr,
2089 .listxattr = generic_listxattr,
2090 .removexattr = generic_removexattr,
2091#endif
2092}; 2068};
2093 2069
2094static struct inode_operations shmem_dir_inode_operations = { 2070static struct inode_operations shmem_dir_inode_operations = {
@@ -2102,21 +2078,6 @@ static struct inode_operations shmem_dir_inode_operations = {
2102 .rmdir = shmem_rmdir, 2078 .rmdir = shmem_rmdir,
2103 .mknod = shmem_mknod, 2079 .mknod = shmem_mknod,
2104 .rename = shmem_rename, 2080 .rename = shmem_rename,
2105#ifdef CONFIG_TMPFS_XATTR
2106 .setxattr = generic_setxattr,
2107 .getxattr = generic_getxattr,
2108 .listxattr = generic_listxattr,
2109 .removexattr = generic_removexattr,
2110#endif
2111#endif
2112};
2113
2114static struct inode_operations shmem_special_inode_operations = {
2115#ifdef CONFIG_TMPFS_XATTR
2116 .setxattr = generic_setxattr,
2117 .getxattr = generic_getxattr,
2118 .listxattr = generic_listxattr,
2119 .removexattr = generic_removexattr,
2120#endif 2081#endif
2121}; 2082};
2122 2083
@@ -2142,48 +2103,6 @@ static struct vm_operations_struct shmem_vm_ops = {
2142}; 2103};
2143 2104
2144 2105
2145#ifdef CONFIG_TMPFS_SECURITY
2146
2147static size_t shmem_xattr_security_list(struct inode *inode, char *list, size_t list_len,
2148 const char *name, size_t name_len)
2149{
2150 return security_inode_listsecurity(inode, list, list_len);
2151}
2152
2153static int shmem_xattr_security_get(struct inode *inode, const char *name, void *buffer, size_t size)
2154{
2155 if (strcmp(name, "") == 0)
2156 return -EINVAL;
2157 return security_inode_getsecurity(inode, name, buffer, size);
2158}
2159
2160static int shmem_xattr_security_set(struct inode *inode, const char *name, const void *value, size_t size, int flags)
2161{
2162 if (strcmp(name, "") == 0)
2163 return -EINVAL;
2164 return security_inode_setsecurity(inode, name, value, size, flags);
2165}
2166
2167static struct xattr_handler shmem_xattr_security_handler = {
2168 .prefix = XATTR_SECURITY_PREFIX,
2169 .list = shmem_xattr_security_list,
2170 .get = shmem_xattr_security_get,
2171 .set = shmem_xattr_security_set,
2172};
2173
2174#endif /* CONFIG_TMPFS_SECURITY */
2175
2176#ifdef CONFIG_TMPFS_XATTR
2177
2178static struct xattr_handler *shmem_xattr_handlers[] = {
2179#ifdef CONFIG_TMPFS_SECURITY
2180 &shmem_xattr_security_handler,
2181#endif
2182 NULL
2183};
2184
2185#endif /* CONFIG_TMPFS_XATTR */
2186
2187static struct super_block *shmem_get_sb(struct file_system_type *fs_type, 2106static struct super_block *shmem_get_sb(struct file_system_type *fs_type,
2188 int flags, const char *dev_name, void *data) 2107 int flags, const char *dev_name, void *data)
2189{ 2108{
diff --git a/mm/slab.c b/mm/slab.c
index c9e706db4634..a9ff4f7f9860 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -189,6 +189,7 @@
189 * is less than 512 (PAGE_SIZE<<3), but greater than 256. 189 * is less than 512 (PAGE_SIZE<<3), but greater than 256.
190 */ 190 */
191 191
192typedef unsigned int kmem_bufctl_t;
192#define BUFCTL_END (((kmem_bufctl_t)(~0U))-0) 193#define BUFCTL_END (((kmem_bufctl_t)(~0U))-0)
193#define BUFCTL_FREE (((kmem_bufctl_t)(~0U))-1) 194#define BUFCTL_FREE (((kmem_bufctl_t)(~0U))-1)
194#define SLAB_LIMIT (((kmem_bufctl_t)(~0U))-2) 195#define SLAB_LIMIT (((kmem_bufctl_t)(~0U))-2)
@@ -600,7 +601,7 @@ static inline kmem_cache_t *__find_general_cachep(size_t size,
600 csizep++; 601 csizep++;
601 602
602 /* 603 /*
603 * Really subtile: The last entry with cs->cs_size==ULONG_MAX 604 * Really subtle: The last entry with cs->cs_size==ULONG_MAX
604 * has cs_{dma,}cachep==NULL. Thus no special case 605 * has cs_{dma,}cachep==NULL. Thus no special case
605 * for large kmalloc calls required. 606 * for large kmalloc calls required.
606 */ 607 */
@@ -2165,7 +2166,9 @@ static inline void *__cache_alloc(kmem_cache_t *cachep, unsigned int __nocast fl
2165 objp = cache_alloc_refill(cachep, flags); 2166 objp = cache_alloc_refill(cachep, flags);
2166 } 2167 }
2167 local_irq_restore(save_flags); 2168 local_irq_restore(save_flags);
2168 objp = cache_alloc_debugcheck_after(cachep, flags, objp, __builtin_return_address(0)); 2169 objp = cache_alloc_debugcheck_after(cachep, flags, objp,
2170 __builtin_return_address(0));
2171 prefetchw(objp);
2169 return objp; 2172 return objp;
2170} 2173}
2171 2174
@@ -3073,20 +3076,24 @@ ssize_t slabinfo_write(struct file *file, const char __user *buffer,
3073} 3076}
3074#endif 3077#endif
3075 3078
3079/**
3080 * ksize - get the actual amount of memory allocated for a given object
3081 * @objp: Pointer to the object
3082 *
3083 * kmalloc may internally round up allocations and return more memory
3084 * than requested. ksize() can be used to determine the actual amount of
3085 * memory allocated. The caller may use this additional memory, even though
3086 * a smaller amount of memory was initially specified with the kmalloc call.
3087 * The caller must guarantee that objp points to a valid object previously
3088 * allocated with either kmalloc() or kmem_cache_alloc(). The object
3089 * must not be freed during the duration of the call.
3090 */
3076unsigned int ksize(const void *objp) 3091unsigned int ksize(const void *objp)
3077{ 3092{
3078 kmem_cache_t *c; 3093 if (unlikely(objp == NULL))
3079 unsigned long flags; 3094 return 0;
3080 unsigned int size = 0;
3081
3082 if (likely(objp != NULL)) {
3083 local_irq_save(flags);
3084 c = GET_PAGE_CACHE(virt_to_page(objp));
3085 size = kmem_cache_size(c);
3086 local_irq_restore(flags);
3087 }
3088 3095
3089 return size; 3096 return obj_reallen(GET_PAGE_CACHE(virt_to_page(objp)));
3090} 3097}
3091 3098
3092 3099
diff --git a/mm/sparse.c b/mm/sparse.c
index b54e304df4a7..347249a4917a 100644
--- a/mm/sparse.c
+++ b/mm/sparse.c
@@ -6,6 +6,7 @@
6#include <linux/mmzone.h> 6#include <linux/mmzone.h>
7#include <linux/bootmem.h> 7#include <linux/bootmem.h>
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/spinlock.h>
9#include <asm/dma.h> 10#include <asm/dma.h>
10 11
11/* 12/*
@@ -13,9 +14,64 @@
13 * 14 *
14 * 1) mem_section - memory sections, mem_map's for valid memory 15 * 1) mem_section - memory sections, mem_map's for valid memory
15 */ 16 */
16struct mem_section mem_section[NR_MEM_SECTIONS]; 17#ifdef CONFIG_SPARSEMEM_EXTREME
18struct mem_section *mem_section[NR_SECTION_ROOTS]
19 ____cacheline_maxaligned_in_smp;
20#else
21struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT]
22 ____cacheline_maxaligned_in_smp;
23#endif
17EXPORT_SYMBOL(mem_section); 24EXPORT_SYMBOL(mem_section);
18 25
26#ifdef CONFIG_SPARSEMEM_EXTREME
27static struct mem_section *sparse_index_alloc(int nid)
28{
29 struct mem_section *section = NULL;
30 unsigned long array_size = SECTIONS_PER_ROOT *
31 sizeof(struct mem_section);
32
33 section = alloc_bootmem_node(NODE_DATA(nid), array_size);
34
35 if (section)
36 memset(section, 0, array_size);
37
38 return section;
39}
40
41static int sparse_index_init(unsigned long section_nr, int nid)
42{
43 static spinlock_t index_init_lock = SPIN_LOCK_UNLOCKED;
44 unsigned long root = SECTION_NR_TO_ROOT(section_nr);
45 struct mem_section *section;
46 int ret = 0;
47
48 if (mem_section[root])
49 return -EEXIST;
50
51 section = sparse_index_alloc(nid);
52 /*
53 * This lock keeps two different sections from
54 * reallocating for the same index
55 */
56 spin_lock(&index_init_lock);
57
58 if (mem_section[root]) {
59 ret = -EEXIST;
60 goto out;
61 }
62
63 mem_section[root] = section;
64out:
65 spin_unlock(&index_init_lock);
66 return ret;
67}
68#else /* !SPARSEMEM_EXTREME */
69static inline int sparse_index_init(unsigned long section_nr, int nid)
70{
71 return 0;
72}
73#endif
74
19/* Record a memory area against a node. */ 75/* Record a memory area against a node. */
20void memory_present(int nid, unsigned long start, unsigned long end) 76void memory_present(int nid, unsigned long start, unsigned long end)
21{ 77{
@@ -24,8 +80,13 @@ void memory_present(int nid, unsigned long start, unsigned long end)
24 start &= PAGE_SECTION_MASK; 80 start &= PAGE_SECTION_MASK;
25 for (pfn = start; pfn < end; pfn += PAGES_PER_SECTION) { 81 for (pfn = start; pfn < end; pfn += PAGES_PER_SECTION) {
26 unsigned long section = pfn_to_section_nr(pfn); 82 unsigned long section = pfn_to_section_nr(pfn);
27 if (!mem_section[section].section_mem_map) 83 struct mem_section *ms;
28 mem_section[section].section_mem_map = SECTION_MARKED_PRESENT; 84
85 sparse_index_init(section, nid);
86
87 ms = __nr_to_section(section);
88 if (!ms->section_mem_map)
89 ms->section_mem_map = SECTION_MARKED_PRESENT;
29 } 90 }
30} 91}
31 92
@@ -85,6 +146,7 @@ static struct page *sparse_early_mem_map_alloc(unsigned long pnum)
85{ 146{
86 struct page *map; 147 struct page *map;
87 int nid = early_pfn_to_nid(section_nr_to_pfn(pnum)); 148 int nid = early_pfn_to_nid(section_nr_to_pfn(pnum));
149 struct mem_section *ms = __nr_to_section(pnum);
88 150
89 map = alloc_remap(nid, sizeof(struct page) * PAGES_PER_SECTION); 151 map = alloc_remap(nid, sizeof(struct page) * PAGES_PER_SECTION);
90 if (map) 152 if (map)
@@ -96,7 +158,7 @@ static struct page *sparse_early_mem_map_alloc(unsigned long pnum)
96 return map; 158 return map;
97 159
98 printk(KERN_WARNING "%s: allocation failed\n", __FUNCTION__); 160 printk(KERN_WARNING "%s: allocation failed\n", __FUNCTION__);
99 mem_section[pnum].section_mem_map = 0; 161 ms->section_mem_map = 0;
100 return NULL; 162 return NULL;
101} 163}
102 164
@@ -114,8 +176,9 @@ void sparse_init(void)
114 continue; 176 continue;
115 177
116 map = sparse_early_mem_map_alloc(pnum); 178 map = sparse_early_mem_map_alloc(pnum);
117 if (map) 179 if (!map)
118 sparse_init_one_section(&mem_section[pnum], pnum, map); 180 continue;
181 sparse_init_one_section(__nr_to_section(pnum), pnum, map);
119 } 182 }
120} 183}
121 184
diff --git a/mm/swap_state.c b/mm/swap_state.c
index 4f251775ef90..029e56eb5e77 100644
--- a/mm/swap_state.c
+++ b/mm/swap_state.c
@@ -124,6 +124,7 @@ void __delete_from_swap_cache(struct page *page)
124 BUG_ON(!PageLocked(page)); 124 BUG_ON(!PageLocked(page));
125 BUG_ON(!PageSwapCache(page)); 125 BUG_ON(!PageSwapCache(page));
126 BUG_ON(PageWriteback(page)); 126 BUG_ON(PageWriteback(page));
127 BUG_ON(PagePrivate(page));
127 128
128 radix_tree_delete(&swapper_space.page_tree, page->private); 129 radix_tree_delete(&swapper_space.page_tree, page->private);
129 page->private = 0; 130 page->private = 0;
@@ -196,11 +197,6 @@ void delete_from_swap_cache(struct page *page)
196{ 197{
197 swp_entry_t entry; 198 swp_entry_t entry;
198 199
199 BUG_ON(!PageSwapCache(page));
200 BUG_ON(!PageLocked(page));
201 BUG_ON(PageWriteback(page));
202 BUG_ON(PagePrivate(page));
203
204 entry.val = page->private; 200 entry.val = page->private;
205 201
206 write_lock_irq(&swapper_space.tree_lock); 202 write_lock_irq(&swapper_space.tree_lock);
diff --git a/mm/swapfile.c b/mm/swapfile.c
index 60cd24a55204..4b6e8bf986bc 100644
--- a/mm/swapfile.c
+++ b/mm/swapfile.c
@@ -31,7 +31,7 @@
31#include <asm/tlbflush.h> 31#include <asm/tlbflush.h>
32#include <linux/swapops.h> 32#include <linux/swapops.h>
33 33
34DEFINE_SPINLOCK(swaplock); 34DEFINE_SPINLOCK(swap_lock);
35unsigned int nr_swapfiles; 35unsigned int nr_swapfiles;
36long total_swap_pages; 36long total_swap_pages;
37static int swap_overflow; 37static int swap_overflow;
@@ -51,13 +51,11 @@ static DECLARE_MUTEX(swapon_sem);
51 51
52/* 52/*
53 * We need this because the bdev->unplug_fn can sleep and we cannot 53 * We need this because the bdev->unplug_fn can sleep and we cannot
54 * hold swap_list_lock while calling the unplug_fn. And swap_list_lock 54 * hold swap_lock while calling the unplug_fn. And swap_lock
55 * cannot be turned into a semaphore. 55 * cannot be turned into a semaphore.
56 */ 56 */
57static DECLARE_RWSEM(swap_unplug_sem); 57static DECLARE_RWSEM(swap_unplug_sem);
58 58
59#define SWAPFILE_CLUSTER 256
60
61void swap_unplug_io_fn(struct backing_dev_info *unused_bdi, struct page *page) 59void swap_unplug_io_fn(struct backing_dev_info *unused_bdi, struct page *page)
62{ 60{
63 swp_entry_t entry; 61 swp_entry_t entry;
@@ -84,116 +82,135 @@ void swap_unplug_io_fn(struct backing_dev_info *unused_bdi, struct page *page)
84 up_read(&swap_unplug_sem); 82 up_read(&swap_unplug_sem);
85} 83}
86 84
87static inline int scan_swap_map(struct swap_info_struct *si) 85#define SWAPFILE_CLUSTER 256
86#define LATENCY_LIMIT 256
87
88static inline unsigned long scan_swap_map(struct swap_info_struct *si)
88{ 89{
89 unsigned long offset; 90 unsigned long offset, last_in_cluster;
91 int latency_ration = LATENCY_LIMIT;
92
90 /* 93 /*
91 * We try to cluster swap pages by allocating them 94 * We try to cluster swap pages by allocating them sequentially
92 * sequentially in swap. Once we've allocated 95 * in swap. Once we've allocated SWAPFILE_CLUSTER pages this
93 * SWAPFILE_CLUSTER pages this way, however, we resort to 96 * way, however, we resort to first-free allocation, starting
94 * first-free allocation, starting a new cluster. This 97 * a new cluster. This prevents us from scattering swap pages
95 * prevents us from scattering swap pages all over the entire 98 * all over the entire swap partition, so that we reduce
96 * swap partition, so that we reduce overall disk seek times 99 * overall disk seek times between swap pages. -- sct
97 * between swap pages. -- sct */ 100 * But we do now try to find an empty cluster. -Andrea
98 if (si->cluster_nr) { 101 */
99 while (si->cluster_next <= si->highest_bit) { 102
100 offset = si->cluster_next++; 103 si->flags += SWP_SCANNING;
104 if (unlikely(!si->cluster_nr)) {
105 si->cluster_nr = SWAPFILE_CLUSTER - 1;
106 if (si->pages - si->inuse_pages < SWAPFILE_CLUSTER)
107 goto lowest;
108 spin_unlock(&swap_lock);
109
110 offset = si->lowest_bit;
111 last_in_cluster = offset + SWAPFILE_CLUSTER - 1;
112
113 /* Locate the first empty (unaligned) cluster */
114 for (; last_in_cluster <= si->highest_bit; offset++) {
101 if (si->swap_map[offset]) 115 if (si->swap_map[offset])
102 continue; 116 last_in_cluster = offset + SWAPFILE_CLUSTER;
103 si->cluster_nr--; 117 else if (offset == last_in_cluster) {
104 goto got_page; 118 spin_lock(&swap_lock);
105 } 119 si->cluster_next = offset-SWAPFILE_CLUSTER-1;
106 } 120 goto cluster;
107 si->cluster_nr = SWAPFILE_CLUSTER;
108
109 /* try to find an empty (even not aligned) cluster. */
110 offset = si->lowest_bit;
111 check_next_cluster:
112 if (offset+SWAPFILE_CLUSTER-1 <= si->highest_bit)
113 {
114 unsigned long nr;
115 for (nr = offset; nr < offset+SWAPFILE_CLUSTER; nr++)
116 if (si->swap_map[nr])
117 {
118 offset = nr+1;
119 goto check_next_cluster;
120 } 121 }
121 /* We found a completly empty cluster, so start 122 if (unlikely(--latency_ration < 0)) {
122 * using it. 123 cond_resched();
123 */ 124 latency_ration = LATENCY_LIMIT;
124 goto got_page; 125 }
126 }
127 spin_lock(&swap_lock);
128 goto lowest;
125 } 129 }
126 /* No luck, so now go finegrined as usual. -Andrea */ 130
127 for (offset = si->lowest_bit; offset <= si->highest_bit ; offset++) { 131 si->cluster_nr--;
128 if (si->swap_map[offset]) 132cluster:
129 continue; 133 offset = si->cluster_next;
130 si->lowest_bit = offset+1; 134 if (offset > si->highest_bit)
131 got_page: 135lowest: offset = si->lowest_bit;
136checks: if (!(si->flags & SWP_WRITEOK))
137 goto no_page;
138 if (!si->highest_bit)
139 goto no_page;
140 if (!si->swap_map[offset]) {
132 if (offset == si->lowest_bit) 141 if (offset == si->lowest_bit)
133 si->lowest_bit++; 142 si->lowest_bit++;
134 if (offset == si->highest_bit) 143 if (offset == si->highest_bit)
135 si->highest_bit--; 144 si->highest_bit--;
136 if (si->lowest_bit > si->highest_bit) { 145 si->inuse_pages++;
146 if (si->inuse_pages == si->pages) {
137 si->lowest_bit = si->max; 147 si->lowest_bit = si->max;
138 si->highest_bit = 0; 148 si->highest_bit = 0;
139 } 149 }
140 si->swap_map[offset] = 1; 150 si->swap_map[offset] = 1;
141 si->inuse_pages++; 151 si->cluster_next = offset + 1;
142 nr_swap_pages--; 152 si->flags -= SWP_SCANNING;
143 si->cluster_next = offset+1;
144 return offset; 153 return offset;
145 } 154 }
146 si->lowest_bit = si->max; 155
147 si->highest_bit = 0; 156 spin_unlock(&swap_lock);
157 while (++offset <= si->highest_bit) {
158 if (!si->swap_map[offset]) {
159 spin_lock(&swap_lock);
160 goto checks;
161 }
162 if (unlikely(--latency_ration < 0)) {
163 cond_resched();
164 latency_ration = LATENCY_LIMIT;
165 }
166 }
167 spin_lock(&swap_lock);
168 goto lowest;
169
170no_page:
171 si->flags -= SWP_SCANNING;
148 return 0; 172 return 0;
149} 173}
150 174
151swp_entry_t get_swap_page(void) 175swp_entry_t get_swap_page(void)
152{ 176{
153 struct swap_info_struct * p; 177 struct swap_info_struct *si;
154 unsigned long offset; 178 pgoff_t offset;
155 swp_entry_t entry; 179 int type, next;
156 int type, wrapped = 0; 180 int wrapped = 0;
157 181
158 entry.val = 0; /* Out of memory */ 182 spin_lock(&swap_lock);
159 swap_list_lock();
160 type = swap_list.next;
161 if (type < 0)
162 goto out;
163 if (nr_swap_pages <= 0) 183 if (nr_swap_pages <= 0)
164 goto out; 184 goto noswap;
185 nr_swap_pages--;
186
187 for (type = swap_list.next; type >= 0 && wrapped < 2; type = next) {
188 si = swap_info + type;
189 next = si->next;
190 if (next < 0 ||
191 (!wrapped && si->prio != swap_info[next].prio)) {
192 next = swap_list.head;
193 wrapped++;
194 }
165 195
166 while (1) { 196 if (!si->highest_bit)
167 p = &swap_info[type]; 197 continue;
168 if ((p->flags & SWP_ACTIVE) == SWP_ACTIVE) { 198 if (!(si->flags & SWP_WRITEOK))
169 swap_device_lock(p); 199 continue;
170 offset = scan_swap_map(p); 200
171 swap_device_unlock(p); 201 swap_list.next = next;
172 if (offset) { 202 offset = scan_swap_map(si);
173 entry = swp_entry(type,offset); 203 if (offset) {
174 type = swap_info[type].next; 204 spin_unlock(&swap_lock);
175 if (type < 0 || 205 return swp_entry(type, offset);
176 p->prio != swap_info[type].prio) {
177 swap_list.next = swap_list.head;
178 } else {
179 swap_list.next = type;
180 }
181 goto out;
182 }
183 } 206 }
184 type = p->next; 207 next = swap_list.next;
185 if (!wrapped) {
186 if (type < 0 || p->prio != swap_info[type].prio) {
187 type = swap_list.head;
188 wrapped = 1;
189 }
190 } else
191 if (type < 0)
192 goto out; /* out of swap space */
193 } 208 }
194out: 209
195 swap_list_unlock(); 210 nr_swap_pages++;
196 return entry; 211noswap:
212 spin_unlock(&swap_lock);
213 return (swp_entry_t) {0};
197} 214}
198 215
199static struct swap_info_struct * swap_info_get(swp_entry_t entry) 216static struct swap_info_struct * swap_info_get(swp_entry_t entry)
@@ -214,10 +231,7 @@ static struct swap_info_struct * swap_info_get(swp_entry_t entry)
214 goto bad_offset; 231 goto bad_offset;
215 if (!p->swap_map[offset]) 232 if (!p->swap_map[offset])
216 goto bad_free; 233 goto bad_free;
217 swap_list_lock(); 234 spin_lock(&swap_lock);
218 if (p->prio > swap_info[swap_list.next].prio)
219 swap_list.next = type;
220 swap_device_lock(p);
221 return p; 235 return p;
222 236
223bad_free: 237bad_free:
@@ -235,12 +249,6 @@ out:
235 return NULL; 249 return NULL;
236} 250}
237 251
238static void swap_info_put(struct swap_info_struct * p)
239{
240 swap_device_unlock(p);
241 swap_list_unlock();
242}
243
244static int swap_entry_free(struct swap_info_struct *p, unsigned long offset) 252static int swap_entry_free(struct swap_info_struct *p, unsigned long offset)
245{ 253{
246 int count = p->swap_map[offset]; 254 int count = p->swap_map[offset];
@@ -253,6 +261,8 @@ static int swap_entry_free(struct swap_info_struct *p, unsigned long offset)
253 p->lowest_bit = offset; 261 p->lowest_bit = offset;
254 if (offset > p->highest_bit) 262 if (offset > p->highest_bit)
255 p->highest_bit = offset; 263 p->highest_bit = offset;
264 if (p->prio > swap_info[swap_list.next].prio)
265 swap_list.next = p - swap_info;
256 nr_swap_pages++; 266 nr_swap_pages++;
257 p->inuse_pages--; 267 p->inuse_pages--;
258 } 268 }
@@ -271,7 +281,7 @@ void swap_free(swp_entry_t entry)
271 p = swap_info_get(entry); 281 p = swap_info_get(entry);
272 if (p) { 282 if (p) {
273 swap_entry_free(p, swp_offset(entry)); 283 swap_entry_free(p, swp_offset(entry));
274 swap_info_put(p); 284 spin_unlock(&swap_lock);
275 } 285 }
276} 286}
277 287
@@ -289,7 +299,7 @@ static inline int page_swapcount(struct page *page)
289 if (p) { 299 if (p) {
290 /* Subtract the 1 for the swap cache itself */ 300 /* Subtract the 1 for the swap cache itself */
291 count = p->swap_map[swp_offset(entry)] - 1; 301 count = p->swap_map[swp_offset(entry)] - 1;
292 swap_info_put(p); 302 spin_unlock(&swap_lock);
293 } 303 }
294 return count; 304 return count;
295} 305}
@@ -346,7 +356,7 @@ int remove_exclusive_swap_page(struct page *page)
346 } 356 }
347 write_unlock_irq(&swapper_space.tree_lock); 357 write_unlock_irq(&swapper_space.tree_lock);
348 } 358 }
349 swap_info_put(p); 359 spin_unlock(&swap_lock);
350 360
351 if (retval) { 361 if (retval) {
352 swap_free(entry); 362 swap_free(entry);
@@ -369,7 +379,7 @@ void free_swap_and_cache(swp_entry_t entry)
369 if (p) { 379 if (p) {
370 if (swap_entry_free(p, swp_offset(entry)) == 1) 380 if (swap_entry_free(p, swp_offset(entry)) == 1)
371 page = find_trylock_page(&swapper_space, entry.val); 381 page = find_trylock_page(&swapper_space, entry.val);
372 swap_info_put(p); 382 spin_unlock(&swap_lock);
373 } 383 }
374 if (page) { 384 if (page) {
375 int one_user; 385 int one_user;
@@ -531,17 +541,18 @@ static int unuse_mm(struct mm_struct *mm,
531 * Scan swap_map from current position to next entry still in use. 541 * Scan swap_map from current position to next entry still in use.
532 * Recycle to start on reaching the end, returning 0 when empty. 542 * Recycle to start on reaching the end, returning 0 when empty.
533 */ 543 */
534static int find_next_to_unuse(struct swap_info_struct *si, int prev) 544static unsigned int find_next_to_unuse(struct swap_info_struct *si,
545 unsigned int prev)
535{ 546{
536 int max = si->max; 547 unsigned int max = si->max;
537 int i = prev; 548 unsigned int i = prev;
538 int count; 549 int count;
539 550
540 /* 551 /*
541 * No need for swap_device_lock(si) here: we're just looking 552 * No need for swap_lock here: we're just looking
542 * for whether an entry is in use, not modifying it; false 553 * for whether an entry is in use, not modifying it; false
543 * hits are okay, and sys_swapoff() has already prevented new 554 * hits are okay, and sys_swapoff() has already prevented new
544 * allocations from this area (while holding swap_list_lock()). 555 * allocations from this area (while holding swap_lock).
545 */ 556 */
546 for (;;) { 557 for (;;) {
547 if (++i >= max) { 558 if (++i >= max) {
@@ -577,7 +588,7 @@ static int try_to_unuse(unsigned int type)
577 unsigned short swcount; 588 unsigned short swcount;
578 struct page *page; 589 struct page *page;
579 swp_entry_t entry; 590 swp_entry_t entry;
580 int i = 0; 591 unsigned int i = 0;
581 int retval = 0; 592 int retval = 0;
582 int reset_overflow = 0; 593 int reset_overflow = 0;
583 int shmem; 594 int shmem;
@@ -731,9 +742,9 @@ static int try_to_unuse(unsigned int type)
731 * report them; but do report if we reset SWAP_MAP_MAX. 742 * report them; but do report if we reset SWAP_MAP_MAX.
732 */ 743 */
733 if (*swap_map == SWAP_MAP_MAX) { 744 if (*swap_map == SWAP_MAP_MAX) {
734 swap_device_lock(si); 745 spin_lock(&swap_lock);
735 *swap_map = 1; 746 *swap_map = 1;
736 swap_device_unlock(si); 747 spin_unlock(&swap_lock);
737 reset_overflow = 1; 748 reset_overflow = 1;
738 } 749 }
739 750
@@ -797,9 +808,9 @@ static int try_to_unuse(unsigned int type)
797} 808}
798 809
799/* 810/*
800 * After a successful try_to_unuse, if no swap is now in use, we know we 811 * After a successful try_to_unuse, if no swap is now in use, we know
801 * can empty the mmlist. swap_list_lock must be held on entry and exit. 812 * we can empty the mmlist. swap_lock must be held on entry and exit.
802 * Note that mmlist_lock nests inside swap_list_lock, and an mm must be 813 * Note that mmlist_lock nests inside swap_lock, and an mm must be
803 * added to the mmlist just after page_duplicate - before would be racy. 814 * added to the mmlist just after page_duplicate - before would be racy.
804 */ 815 */
805static void drain_mmlist(void) 816static void drain_mmlist(void)
@@ -832,9 +843,9 @@ sector_t map_swap_page(struct swap_info_struct *sis, pgoff_t offset)
832 offset < (se->start_page + se->nr_pages)) { 843 offset < (se->start_page + se->nr_pages)) {
833 return se->start_block + (offset - se->start_page); 844 return se->start_block + (offset - se->start_page);
834 } 845 }
835 lh = se->list.prev; 846 lh = se->list.next;
836 if (lh == &sis->extent_list) 847 if (lh == &sis->extent_list)
837 lh = lh->prev; 848 lh = lh->next;
838 se = list_entry(lh, struct swap_extent, list); 849 se = list_entry(lh, struct swap_extent, list);
839 sis->curr_swap_extent = se; 850 sis->curr_swap_extent = se;
840 BUG_ON(se == start_se); /* It *must* be present */ 851 BUG_ON(se == start_se); /* It *must* be present */
@@ -854,15 +865,13 @@ static void destroy_swap_extents(struct swap_info_struct *sis)
854 list_del(&se->list); 865 list_del(&se->list);
855 kfree(se); 866 kfree(se);
856 } 867 }
857 sis->nr_extents = 0;
858} 868}
859 869
860/* 870/*
861 * Add a block range (and the corresponding page range) into this swapdev's 871 * Add a block range (and the corresponding page range) into this swapdev's
862 * extent list. The extent list is kept sorted in block order. 872 * extent list. The extent list is kept sorted in page order.
863 * 873 *
864 * This function rather assumes that it is called in ascending sector_t order. 874 * This function rather assumes that it is called in ascending page order.
865 * It doesn't look for extent coalescing opportunities.
866 */ 875 */
867static int 876static int
868add_swap_extent(struct swap_info_struct *sis, unsigned long start_page, 877add_swap_extent(struct swap_info_struct *sis, unsigned long start_page,
@@ -872,16 +881,15 @@ add_swap_extent(struct swap_info_struct *sis, unsigned long start_page,
872 struct swap_extent *new_se; 881 struct swap_extent *new_se;
873 struct list_head *lh; 882 struct list_head *lh;
874 883
875 lh = sis->extent_list.next; /* The highest-addressed block */ 884 lh = sis->extent_list.prev; /* The highest page extent */
876 while (lh != &sis->extent_list) { 885 if (lh != &sis->extent_list) {
877 se = list_entry(lh, struct swap_extent, list); 886 se = list_entry(lh, struct swap_extent, list);
878 if (se->start_block + se->nr_pages == start_block && 887 BUG_ON(se->start_page + se->nr_pages != start_page);
879 se->start_page + se->nr_pages == start_page) { 888 if (se->start_block + se->nr_pages == start_block) {
880 /* Merge it */ 889 /* Merge it */
881 se->nr_pages += nr_pages; 890 se->nr_pages += nr_pages;
882 return 0; 891 return 0;
883 } 892 }
884 lh = lh->next;
885 } 893 }
886 894
887 /* 895 /*
@@ -894,16 +902,8 @@ add_swap_extent(struct swap_info_struct *sis, unsigned long start_page,
894 new_se->nr_pages = nr_pages; 902 new_se->nr_pages = nr_pages;
895 new_se->start_block = start_block; 903 new_se->start_block = start_block;
896 904
897 lh = sis->extent_list.prev; /* The lowest block */ 905 list_add_tail(&new_se->list, &sis->extent_list);
898 while (lh != &sis->extent_list) { 906 return 1;
899 se = list_entry(lh, struct swap_extent, list);
900 if (se->start_block > start_block)
901 break;
902 lh = lh->prev;
903 }
904 list_add_tail(&new_se->list, lh);
905 sis->nr_extents++;
906 return 0;
907} 907}
908 908
909/* 909/*
@@ -926,7 +926,7 @@ add_swap_extent(struct swap_info_struct *sis, unsigned long start_page,
926 * requirements, they are simply tossed out - we will never use those blocks 926 * requirements, they are simply tossed out - we will never use those blocks
927 * for swapping. 927 * for swapping.
928 * 928 *
929 * For S_ISREG swapfiles we hold i_sem across the life of the swapon. This 929 * For S_ISREG swapfiles we set S_SWAPFILE across the life of the swapon. This
930 * prevents root from shooting her foot off by ftruncating an in-use swapfile, 930 * prevents root from shooting her foot off by ftruncating an in-use swapfile,
931 * which will scribble on the fs. 931 * which will scribble on the fs.
932 * 932 *
@@ -937,7 +937,7 @@ add_swap_extent(struct swap_info_struct *sis, unsigned long start_page,
937 * This is extremely effective. The average number of iterations in 937 * This is extremely effective. The average number of iterations in
938 * map_swap_page() has been measured at about 0.3 per page. - akpm. 938 * map_swap_page() has been measured at about 0.3 per page. - akpm.
939 */ 939 */
940static int setup_swap_extents(struct swap_info_struct *sis) 940static int setup_swap_extents(struct swap_info_struct *sis, sector_t *span)
941{ 941{
942 struct inode *inode; 942 struct inode *inode;
943 unsigned blocks_per_page; 943 unsigned blocks_per_page;
@@ -945,11 +945,15 @@ static int setup_swap_extents(struct swap_info_struct *sis)
945 unsigned blkbits; 945 unsigned blkbits;
946 sector_t probe_block; 946 sector_t probe_block;
947 sector_t last_block; 947 sector_t last_block;
948 sector_t lowest_block = -1;
949 sector_t highest_block = 0;
950 int nr_extents = 0;
948 int ret; 951 int ret;
949 952
950 inode = sis->swap_file->f_mapping->host; 953 inode = sis->swap_file->f_mapping->host;
951 if (S_ISBLK(inode->i_mode)) { 954 if (S_ISBLK(inode->i_mode)) {
952 ret = add_swap_extent(sis, 0, sis->max, 0); 955 ret = add_swap_extent(sis, 0, sis->max, 0);
956 *span = sis->pages;
953 goto done; 957 goto done;
954 } 958 }
955 959
@@ -994,22 +998,32 @@ static int setup_swap_extents(struct swap_info_struct *sis)
994 } 998 }
995 } 999 }
996 1000
1001 first_block >>= (PAGE_SHIFT - blkbits);
1002 if (page_no) { /* exclude the header page */
1003 if (first_block < lowest_block)
1004 lowest_block = first_block;
1005 if (first_block > highest_block)
1006 highest_block = first_block;
1007 }
1008
997 /* 1009 /*
998 * We found a PAGE_SIZE-length, PAGE_SIZE-aligned run of blocks 1010 * We found a PAGE_SIZE-length, PAGE_SIZE-aligned run of blocks
999 */ 1011 */
1000 ret = add_swap_extent(sis, page_no, 1, 1012 ret = add_swap_extent(sis, page_no, 1, first_block);
1001 first_block >> (PAGE_SHIFT - blkbits)); 1013 if (ret < 0)
1002 if (ret)
1003 goto out; 1014 goto out;
1015 nr_extents += ret;
1004 page_no++; 1016 page_no++;
1005 probe_block += blocks_per_page; 1017 probe_block += blocks_per_page;
1006reprobe: 1018reprobe:
1007 continue; 1019 continue;
1008 } 1020 }
1009 ret = 0; 1021 ret = nr_extents;
1022 *span = 1 + highest_block - lowest_block;
1010 if (page_no == 0) 1023 if (page_no == 0)
1011 ret = -EINVAL; 1024 page_no = 1; /* force Empty message */
1012 sis->max = page_no; 1025 sis->max = page_no;
1026 sis->pages = page_no - 1;
1013 sis->highest_bit = page_no - 1; 1027 sis->highest_bit = page_no - 1;
1014done: 1028done:
1015 sis->curr_swap_extent = list_entry(sis->extent_list.prev, 1029 sis->curr_swap_extent = list_entry(sis->extent_list.prev,
@@ -1069,7 +1083,7 @@ asmlinkage long sys_swapoff(const char __user * specialfile)
1069 1083
1070 mapping = victim->f_mapping; 1084 mapping = victim->f_mapping;
1071 prev = -1; 1085 prev = -1;
1072 swap_list_lock(); 1086 spin_lock(&swap_lock);
1073 for (type = swap_list.head; type >= 0; type = swap_info[type].next) { 1087 for (type = swap_list.head; type >= 0; type = swap_info[type].next) {
1074 p = swap_info + type; 1088 p = swap_info + type;
1075 if ((p->flags & SWP_ACTIVE) == SWP_ACTIVE) { 1089 if ((p->flags & SWP_ACTIVE) == SWP_ACTIVE) {
@@ -1080,14 +1094,14 @@ asmlinkage long sys_swapoff(const char __user * specialfile)
1080 } 1094 }
1081 if (type < 0) { 1095 if (type < 0) {
1082 err = -EINVAL; 1096 err = -EINVAL;
1083 swap_list_unlock(); 1097 spin_unlock(&swap_lock);
1084 goto out_dput; 1098 goto out_dput;
1085 } 1099 }
1086 if (!security_vm_enough_memory(p->pages)) 1100 if (!security_vm_enough_memory(p->pages))
1087 vm_unacct_memory(p->pages); 1101 vm_unacct_memory(p->pages);
1088 else { 1102 else {
1089 err = -ENOMEM; 1103 err = -ENOMEM;
1090 swap_list_unlock(); 1104 spin_unlock(&swap_lock);
1091 goto out_dput; 1105 goto out_dput;
1092 } 1106 }
1093 if (prev < 0) { 1107 if (prev < 0) {
@@ -1102,18 +1116,15 @@ asmlinkage long sys_swapoff(const char __user * specialfile)
1102 nr_swap_pages -= p->pages; 1116 nr_swap_pages -= p->pages;
1103 total_swap_pages -= p->pages; 1117 total_swap_pages -= p->pages;
1104 p->flags &= ~SWP_WRITEOK; 1118 p->flags &= ~SWP_WRITEOK;
1105 swap_list_unlock(); 1119 spin_unlock(&swap_lock);
1120
1106 current->flags |= PF_SWAPOFF; 1121 current->flags |= PF_SWAPOFF;
1107 err = try_to_unuse(type); 1122 err = try_to_unuse(type);
1108 current->flags &= ~PF_SWAPOFF; 1123 current->flags &= ~PF_SWAPOFF;
1109 1124
1110 /* wait for any unplug function to finish */
1111 down_write(&swap_unplug_sem);
1112 up_write(&swap_unplug_sem);
1113
1114 if (err) { 1125 if (err) {
1115 /* re-insert swap space back into swap_list */ 1126 /* re-insert swap space back into swap_list */
1116 swap_list_lock(); 1127 spin_lock(&swap_lock);
1117 for (prev = -1, i = swap_list.head; i >= 0; prev = i, i = swap_info[i].next) 1128 for (prev = -1, i = swap_list.head; i >= 0; prev = i, i = swap_info[i].next)
1118 if (p->prio >= swap_info[i].prio) 1129 if (p->prio >= swap_info[i].prio)
1119 break; 1130 break;
@@ -1125,22 +1136,35 @@ asmlinkage long sys_swapoff(const char __user * specialfile)
1125 nr_swap_pages += p->pages; 1136 nr_swap_pages += p->pages;
1126 total_swap_pages += p->pages; 1137 total_swap_pages += p->pages;
1127 p->flags |= SWP_WRITEOK; 1138 p->flags |= SWP_WRITEOK;
1128 swap_list_unlock(); 1139 spin_unlock(&swap_lock);
1129 goto out_dput; 1140 goto out_dput;
1130 } 1141 }
1142
1143 /* wait for any unplug function to finish */
1144 down_write(&swap_unplug_sem);
1145 up_write(&swap_unplug_sem);
1146
1147 destroy_swap_extents(p);
1131 down(&swapon_sem); 1148 down(&swapon_sem);
1132 swap_list_lock(); 1149 spin_lock(&swap_lock);
1133 drain_mmlist(); 1150 drain_mmlist();
1134 swap_device_lock(p); 1151
1152 /* wait for anyone still in scan_swap_map */
1153 p->highest_bit = 0; /* cuts scans short */
1154 while (p->flags >= SWP_SCANNING) {
1155 spin_unlock(&swap_lock);
1156 set_current_state(TASK_UNINTERRUPTIBLE);
1157 schedule_timeout(1);
1158 spin_lock(&swap_lock);
1159 }
1160
1135 swap_file = p->swap_file; 1161 swap_file = p->swap_file;
1136 p->swap_file = NULL; 1162 p->swap_file = NULL;
1137 p->max = 0; 1163 p->max = 0;
1138 swap_map = p->swap_map; 1164 swap_map = p->swap_map;
1139 p->swap_map = NULL; 1165 p->swap_map = NULL;
1140 p->flags = 0; 1166 p->flags = 0;
1141 destroy_swap_extents(p); 1167 spin_unlock(&swap_lock);
1142 swap_device_unlock(p);
1143 swap_list_unlock();
1144 up(&swapon_sem); 1168 up(&swapon_sem);
1145 vfree(swap_map); 1169 vfree(swap_map);
1146 inode = mapping->host; 1170 inode = mapping->host;
@@ -1213,7 +1237,7 @@ static int swap_show(struct seq_file *swap, void *v)
1213 1237
1214 file = ptr->swap_file; 1238 file = ptr->swap_file;
1215 len = seq_path(swap, file->f_vfsmnt, file->f_dentry, " \t\n\\"); 1239 len = seq_path(swap, file->f_vfsmnt, file->f_dentry, " \t\n\\");
1216 seq_printf(swap, "%*s%s\t%d\t%ld\t%d\n", 1240 seq_printf(swap, "%*s%s\t%u\t%u\t%d\n",
1217 len < 40 ? 40 - len : 1, " ", 1241 len < 40 ? 40 - len : 1, " ",
1218 S_ISBLK(file->f_dentry->d_inode->i_mode) ? 1242 S_ISBLK(file->f_dentry->d_inode->i_mode) ?
1219 "partition" : "file\t", 1243 "partition" : "file\t",
@@ -1272,7 +1296,9 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1272 static int least_priority; 1296 static int least_priority;
1273 union swap_header *swap_header = NULL; 1297 union swap_header *swap_header = NULL;
1274 int swap_header_version; 1298 int swap_header_version;
1275 int nr_good_pages = 0; 1299 unsigned int nr_good_pages = 0;
1300 int nr_extents = 0;
1301 sector_t span;
1276 unsigned long maxpages = 1; 1302 unsigned long maxpages = 1;
1277 int swapfilesize; 1303 int swapfilesize;
1278 unsigned short *swap_map; 1304 unsigned short *swap_map;
@@ -1282,7 +1308,7 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1282 1308
1283 if (!capable(CAP_SYS_ADMIN)) 1309 if (!capable(CAP_SYS_ADMIN))
1284 return -EPERM; 1310 return -EPERM;
1285 swap_list_lock(); 1311 spin_lock(&swap_lock);
1286 p = swap_info; 1312 p = swap_info;
1287 for (type = 0 ; type < nr_swapfiles ; type++,p++) 1313 for (type = 0 ; type < nr_swapfiles ; type++,p++)
1288 if (!(p->flags & SWP_USED)) 1314 if (!(p->flags & SWP_USED))
@@ -1301,14 +1327,13 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1301 * swp_entry_t or the architecture definition of a swap pte. 1327 * swp_entry_t or the architecture definition of a swap pte.
1302 */ 1328 */
1303 if (type > swp_type(pte_to_swp_entry(swp_entry_to_pte(swp_entry(~0UL,0))))) { 1329 if (type > swp_type(pte_to_swp_entry(swp_entry_to_pte(swp_entry(~0UL,0))))) {
1304 swap_list_unlock(); 1330 spin_unlock(&swap_lock);
1305 goto out; 1331 goto out;
1306 } 1332 }
1307 if (type >= nr_swapfiles) 1333 if (type >= nr_swapfiles)
1308 nr_swapfiles = type+1; 1334 nr_swapfiles = type+1;
1309 INIT_LIST_HEAD(&p->extent_list); 1335 INIT_LIST_HEAD(&p->extent_list);
1310 p->flags = SWP_USED; 1336 p->flags = SWP_USED;
1311 p->nr_extents = 0;
1312 p->swap_file = NULL; 1337 p->swap_file = NULL;
1313 p->old_block_size = 0; 1338 p->old_block_size = 0;
1314 p->swap_map = NULL; 1339 p->swap_map = NULL;
@@ -1316,7 +1341,6 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1316 p->highest_bit = 0; 1341 p->highest_bit = 0;
1317 p->cluster_nr = 0; 1342 p->cluster_nr = 0;
1318 p->inuse_pages = 0; 1343 p->inuse_pages = 0;
1319 spin_lock_init(&p->sdev_lock);
1320 p->next = -1; 1344 p->next = -1;
1321 if (swap_flags & SWAP_FLAG_PREFER) { 1345 if (swap_flags & SWAP_FLAG_PREFER) {
1322 p->prio = 1346 p->prio =
@@ -1324,7 +1348,7 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1324 } else { 1348 } else {
1325 p->prio = --least_priority; 1349 p->prio = --least_priority;
1326 } 1350 }
1327 swap_list_unlock(); 1351 spin_unlock(&swap_lock);
1328 name = getname(specialfile); 1352 name = getname(specialfile);
1329 error = PTR_ERR(name); 1353 error = PTR_ERR(name);
1330 if (IS_ERR(name)) { 1354 if (IS_ERR(name)) {
@@ -1426,6 +1450,8 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1426 } 1450 }
1427 1451
1428 p->lowest_bit = 1; 1452 p->lowest_bit = 1;
1453 p->cluster_next = 1;
1454
1429 /* 1455 /*
1430 * Find out how many pages are allowed for a single swap 1456 * Find out how many pages are allowed for a single swap
1431 * device. There are two limiting factors: 1) the number of 1457 * device. There are two limiting factors: 1) the number of
@@ -1446,6 +1472,10 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1446 p->highest_bit = maxpages - 1; 1472 p->highest_bit = maxpages - 1;
1447 1473
1448 error = -EINVAL; 1474 error = -EINVAL;
1475 if (!maxpages)
1476 goto bad_swap;
1477 if (swap_header->info.nr_badpages && S_ISREG(inode->i_mode))
1478 goto bad_swap;
1449 if (swap_header->info.nr_badpages > MAX_SWAP_BADPAGES) 1479 if (swap_header->info.nr_badpages > MAX_SWAP_BADPAGES)
1450 goto bad_swap; 1480 goto bad_swap;
1451 1481
@@ -1470,35 +1500,40 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1470 if (error) 1500 if (error)
1471 goto bad_swap; 1501 goto bad_swap;
1472 } 1502 }
1473 1503
1474 if (swapfilesize && maxpages > swapfilesize) { 1504 if (swapfilesize && maxpages > swapfilesize) {
1475 printk(KERN_WARNING 1505 printk(KERN_WARNING
1476 "Swap area shorter than signature indicates\n"); 1506 "Swap area shorter than signature indicates\n");
1477 error = -EINVAL; 1507 error = -EINVAL;
1478 goto bad_swap; 1508 goto bad_swap;
1479 } 1509 }
1510 if (nr_good_pages) {
1511 p->swap_map[0] = SWAP_MAP_BAD;
1512 p->max = maxpages;
1513 p->pages = nr_good_pages;
1514 nr_extents = setup_swap_extents(p, &span);
1515 if (nr_extents < 0) {
1516 error = nr_extents;
1517 goto bad_swap;
1518 }
1519 nr_good_pages = p->pages;
1520 }
1480 if (!nr_good_pages) { 1521 if (!nr_good_pages) {
1481 printk(KERN_WARNING "Empty swap-file\n"); 1522 printk(KERN_WARNING "Empty swap-file\n");
1482 error = -EINVAL; 1523 error = -EINVAL;
1483 goto bad_swap; 1524 goto bad_swap;
1484 } 1525 }
1485 p->swap_map[0] = SWAP_MAP_BAD;
1486 p->max = maxpages;
1487 p->pages = nr_good_pages;
1488
1489 error = setup_swap_extents(p);
1490 if (error)
1491 goto bad_swap;
1492 1526
1493 down(&swapon_sem); 1527 down(&swapon_sem);
1494 swap_list_lock(); 1528 spin_lock(&swap_lock);
1495 swap_device_lock(p);
1496 p->flags = SWP_ACTIVE; 1529 p->flags = SWP_ACTIVE;
1497 nr_swap_pages += nr_good_pages; 1530 nr_swap_pages += nr_good_pages;
1498 total_swap_pages += nr_good_pages; 1531 total_swap_pages += nr_good_pages;
1499 printk(KERN_INFO "Adding %dk swap on %s. Priority:%d extents:%d\n", 1532
1500 nr_good_pages<<(PAGE_SHIFT-10), name, 1533 printk(KERN_INFO "Adding %uk swap on %s. "
1501 p->prio, p->nr_extents); 1534 "Priority:%d extents:%d across:%lluk\n",
1535 nr_good_pages<<(PAGE_SHIFT-10), name, p->prio,
1536 nr_extents, (unsigned long long)span<<(PAGE_SHIFT-10));
1502 1537
1503 /* insert swap space into swap_list: */ 1538 /* insert swap space into swap_list: */
1504 prev = -1; 1539 prev = -1;
@@ -1514,8 +1549,7 @@ asmlinkage long sys_swapon(const char __user * specialfile, int swap_flags)
1514 } else { 1549 } else {
1515 swap_info[prev].next = p - swap_info; 1550 swap_info[prev].next = p - swap_info;
1516 } 1551 }
1517 swap_device_unlock(p); 1552 spin_unlock(&swap_lock);
1518 swap_list_unlock();
1519 up(&swapon_sem); 1553 up(&swapon_sem);
1520 error = 0; 1554 error = 0;
1521 goto out; 1555 goto out;
@@ -1524,16 +1558,16 @@ bad_swap:
1524 set_blocksize(bdev, p->old_block_size); 1558 set_blocksize(bdev, p->old_block_size);
1525 bd_release(bdev); 1559 bd_release(bdev);
1526 } 1560 }
1561 destroy_swap_extents(p);
1527bad_swap_2: 1562bad_swap_2:
1528 swap_list_lock(); 1563 spin_lock(&swap_lock);
1529 swap_map = p->swap_map; 1564 swap_map = p->swap_map;
1530 p->swap_file = NULL; 1565 p->swap_file = NULL;
1531 p->swap_map = NULL; 1566 p->swap_map = NULL;
1532 p->flags = 0; 1567 p->flags = 0;
1533 if (!(swap_flags & SWAP_FLAG_PREFER)) 1568 if (!(swap_flags & SWAP_FLAG_PREFER))
1534 ++least_priority; 1569 ++least_priority;
1535 swap_list_unlock(); 1570 spin_unlock(&swap_lock);
1536 destroy_swap_extents(p);
1537 vfree(swap_map); 1571 vfree(swap_map);
1538 if (swap_file) 1572 if (swap_file)
1539 filp_close(swap_file, NULL); 1573 filp_close(swap_file, NULL);
@@ -1557,7 +1591,7 @@ void si_swapinfo(struct sysinfo *val)
1557 unsigned int i; 1591 unsigned int i;
1558 unsigned long nr_to_be_unused = 0; 1592 unsigned long nr_to_be_unused = 0;
1559 1593
1560 swap_list_lock(); 1594 spin_lock(&swap_lock);
1561 for (i = 0; i < nr_swapfiles; i++) { 1595 for (i = 0; i < nr_swapfiles; i++) {
1562 if (!(swap_info[i].flags & SWP_USED) || 1596 if (!(swap_info[i].flags & SWP_USED) ||
1563 (swap_info[i].flags & SWP_WRITEOK)) 1597 (swap_info[i].flags & SWP_WRITEOK))
@@ -1566,7 +1600,7 @@ void si_swapinfo(struct sysinfo *val)
1566 } 1600 }
1567 val->freeswap = nr_swap_pages + nr_to_be_unused; 1601 val->freeswap = nr_swap_pages + nr_to_be_unused;
1568 val->totalswap = total_swap_pages + nr_to_be_unused; 1602 val->totalswap = total_swap_pages + nr_to_be_unused;
1569 swap_list_unlock(); 1603 spin_unlock(&swap_lock);
1570} 1604}
1571 1605
1572/* 1606/*
@@ -1587,7 +1621,7 @@ int swap_duplicate(swp_entry_t entry)
1587 p = type + swap_info; 1621 p = type + swap_info;
1588 offset = swp_offset(entry); 1622 offset = swp_offset(entry);
1589 1623
1590 swap_device_lock(p); 1624 spin_lock(&swap_lock);
1591 if (offset < p->max && p->swap_map[offset]) { 1625 if (offset < p->max && p->swap_map[offset]) {
1592 if (p->swap_map[offset] < SWAP_MAP_MAX - 1) { 1626 if (p->swap_map[offset] < SWAP_MAP_MAX - 1) {
1593 p->swap_map[offset]++; 1627 p->swap_map[offset]++;
@@ -1599,7 +1633,7 @@ int swap_duplicate(swp_entry_t entry)
1599 result = 1; 1633 result = 1;
1600 } 1634 }
1601 } 1635 }
1602 swap_device_unlock(p); 1636 spin_unlock(&swap_lock);
1603out: 1637out:
1604 return result; 1638 return result;
1605 1639
@@ -1615,7 +1649,7 @@ get_swap_info_struct(unsigned type)
1615} 1649}
1616 1650
1617/* 1651/*
1618 * swap_device_lock prevents swap_map being freed. Don't grab an extra 1652 * swap_lock prevents swap_map being freed. Don't grab an extra
1619 * reference on the swaphandle, it doesn't matter if it becomes unused. 1653 * reference on the swaphandle, it doesn't matter if it becomes unused.
1620 */ 1654 */
1621int valid_swaphandles(swp_entry_t entry, unsigned long *offset) 1655int valid_swaphandles(swp_entry_t entry, unsigned long *offset)
@@ -1631,7 +1665,7 @@ int valid_swaphandles(swp_entry_t entry, unsigned long *offset)
1631 toff++, i--; 1665 toff++, i--;
1632 *offset = toff; 1666 *offset = toff;
1633 1667
1634 swap_device_lock(swapdev); 1668 spin_lock(&swap_lock);
1635 do { 1669 do {
1636 /* Don't read-ahead past the end of the swap area */ 1670 /* Don't read-ahead past the end of the swap area */
1637 if (toff >= swapdev->max) 1671 if (toff >= swapdev->max)
@@ -1644,6 +1678,6 @@ int valid_swaphandles(swp_entry_t entry, unsigned long *offset)
1644 toff++; 1678 toff++;
1645 ret++; 1679 ret++;
1646 } while (--i); 1680 } while (--i);
1647 swap_device_unlock(swapdev); 1681 spin_unlock(&swap_lock);
1648 return ret; 1682 return ret;
1649} 1683}
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 8ff16a1eee6a..67b358e57ef6 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -158,8 +158,6 @@ int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages)
158 return err; 158 return err;
159} 159}
160 160
161#define IOREMAP_MAX_ORDER (7 + PAGE_SHIFT) /* 128 pages */
162
163struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags, 161struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags,
164 unsigned long start, unsigned long end) 162 unsigned long start, unsigned long end)
165{ 163{
diff --git a/mm/vmscan.c b/mm/vmscan.c
index cfffe5098d53..0095533cdde9 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -822,6 +822,8 @@ shrink_zone(struct zone *zone, struct scan_control *sc)
822 unsigned long nr_active; 822 unsigned long nr_active;
823 unsigned long nr_inactive; 823 unsigned long nr_inactive;
824 824
825 atomic_inc(&zone->reclaim_in_progress);
826
825 /* 827 /*
826 * Add one to `nr_to_scan' just to make sure that the kernel will 828 * Add one to `nr_to_scan' just to make sure that the kernel will
827 * slowly sift through the active list. 829 * slowly sift through the active list.
@@ -861,6 +863,8 @@ shrink_zone(struct zone *zone, struct scan_control *sc)
861 } 863 }
862 864
863 throttle_vm_writeout(); 865 throttle_vm_writeout();
866
867 atomic_dec(&zone->reclaim_in_progress);
864} 868}
865 869
866/* 870/*
@@ -900,9 +904,7 @@ shrink_caches(struct zone **zones, struct scan_control *sc)
900 if (zone->all_unreclaimable && sc->priority != DEF_PRIORITY) 904 if (zone->all_unreclaimable && sc->priority != DEF_PRIORITY)
901 continue; /* Let kswapd poll it */ 905 continue; /* Let kswapd poll it */
902 906
903 atomic_inc(&zone->reclaim_in_progress);
904 shrink_zone(zone, sc); 907 shrink_zone(zone, sc);
905 atomic_dec(&zone->reclaim_in_progress);
906 } 908 }
907} 909}
908 910
@@ -1358,14 +1360,13 @@ int zone_reclaim(struct zone *zone, unsigned int gfp_mask, unsigned int order)
1358 sc.swap_cluster_max = SWAP_CLUSTER_MAX; 1360 sc.swap_cluster_max = SWAP_CLUSTER_MAX;
1359 1361
1360 /* Don't reclaim the zone if there are other reclaimers active */ 1362 /* Don't reclaim the zone if there are other reclaimers active */
1361 if (!atomic_inc_and_test(&zone->reclaim_in_progress)) 1363 if (atomic_read(&zone->reclaim_in_progress) > 0)
1362 goto out; 1364 goto out;
1363 1365
1364 shrink_zone(zone, &sc); 1366 shrink_zone(zone, &sc);
1365 total_reclaimed = sc.nr_reclaimed; 1367 total_reclaimed = sc.nr_reclaimed;
1366 1368
1367 out: 1369 out:
1368 atomic_dec(&zone->reclaim_in_progress);
1369 return total_reclaimed; 1370 return total_reclaimed;
1370} 1371}
1371 1372
@@ -1375,6 +1376,9 @@ asmlinkage long sys_set_zone_reclaim(unsigned int node, unsigned int zone,
1375 struct zone *z; 1376 struct zone *z;
1376 int i; 1377 int i;
1377 1378
1379 if (!capable(CAP_SYS_ADMIN))
1380 return -EACCES;
1381
1378 if (node >= MAX_NUMNODES || !node_online(node)) 1382 if (node >= MAX_NUMNODES || !node_online(node))
1379 return -EINVAL; 1383 return -EINVAL;
1380 1384
diff --git a/net/Kconfig b/net/Kconfig
index c07aafb59a0f..2bdd5623fdd5 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -215,6 +215,7 @@ endmenu
215source "net/ax25/Kconfig" 215source "net/ax25/Kconfig"
216source "net/irda/Kconfig" 216source "net/irda/Kconfig"
217source "net/bluetooth/Kconfig" 217source "net/bluetooth/Kconfig"
218source "net/ieee80211/Kconfig"
218 219
219endif # if NET 220endif # if NET
220endmenu # Networking 221endmenu # Networking
diff --git a/net/Makefile b/net/Makefile
index 7e6eff206c81..4aa2f46d2a56 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_ECONET) += econet/
44obj-$(CONFIG_VLAN_8021Q) += 8021q/ 44obj-$(CONFIG_VLAN_8021Q) += 8021q/
45obj-$(CONFIG_IP_DCCP) += dccp/ 45obj-$(CONFIG_IP_DCCP) += dccp/
46obj-$(CONFIG_IP_SCTP) += sctp/ 46obj-$(CONFIG_IP_SCTP) += sctp/
47obj-$(CONFIG_IEEE80211) += ieee80211/
47 48
48ifeq ($(CONFIG_NET),y) 49ifeq ($(CONFIG_NET),y)
49obj-$(CONFIG_SYSCTL) += sysctl_net.o 50obj-$(CONFIG_SYSCTL) += sysctl_net.o
diff --git a/net/decnet/af_decnet.c b/net/decnet/af_decnet.c
index 621680f127af..348f36b529f7 100644
--- a/net/decnet/af_decnet.c
+++ b/net/decnet/af_decnet.c
@@ -1876,8 +1876,27 @@ static inline unsigned int dn_current_mss(struct sock *sk, int flags)
1876 return mss_now; 1876 return mss_now;
1877} 1877}
1878 1878
1879/*
1880 * N.B. We get the timeout wrong here, but then we always did get it
1881 * wrong before and this is another step along the road to correcting
1882 * it. It ought to get updated each time we pass through the routine,
1883 * but in practise it probably doesn't matter too much for now.
1884 */
1885static inline struct sk_buff *dn_alloc_send_pskb(struct sock *sk,
1886 unsigned long datalen, int noblock,
1887 int *errcode)
1888{
1889 struct sk_buff *skb = sock_alloc_send_skb(sk, datalen,
1890 noblock, errcode);
1891 if (skb) {
1892 skb->protocol = __constant_htons(ETH_P_DNA_RT);
1893 skb->pkt_type = PACKET_OUTGOING;
1894 }
1895 return skb;
1896}
1897
1879static int dn_sendmsg(struct kiocb *iocb, struct socket *sock, 1898static int dn_sendmsg(struct kiocb *iocb, struct socket *sock,
1880 struct msghdr *msg, size_t size) 1899 struct msghdr *msg, size_t size)
1881{ 1900{
1882 struct sock *sk = sock->sk; 1901 struct sock *sk = sock->sk;
1883 struct dn_scp *scp = DN_SK(sk); 1902 struct dn_scp *scp = DN_SK(sk);
@@ -1892,7 +1911,7 @@ static int dn_sendmsg(struct kiocb *iocb, struct socket *sock,
1892 struct dn_skb_cb *cb; 1911 struct dn_skb_cb *cb;
1893 size_t len; 1912 size_t len;
1894 unsigned char fctype; 1913 unsigned char fctype;
1895 long timeo = sock_sndtimeo(sk, flags & MSG_DONTWAIT); 1914 long timeo;
1896 1915
1897 if (flags & ~(MSG_TRYHARD|MSG_OOB|MSG_DONTWAIT|MSG_EOR|MSG_NOSIGNAL|MSG_MORE|MSG_CMSG_COMPAT)) 1916 if (flags & ~(MSG_TRYHARD|MSG_OOB|MSG_DONTWAIT|MSG_EOR|MSG_NOSIGNAL|MSG_MORE|MSG_CMSG_COMPAT))
1898 return -EOPNOTSUPP; 1917 return -EOPNOTSUPP;
@@ -1900,18 +1919,21 @@ static int dn_sendmsg(struct kiocb *iocb, struct socket *sock,
1900 if (addr_len && (addr_len != sizeof(struct sockaddr_dn))) 1919 if (addr_len && (addr_len != sizeof(struct sockaddr_dn)))
1901 return -EINVAL; 1920 return -EINVAL;
1902 1921
1922 lock_sock(sk);
1923 timeo = sock_sndtimeo(sk, flags & MSG_DONTWAIT);
1903 /* 1924 /*
1904 * The only difference between stream sockets and sequenced packet 1925 * The only difference between stream sockets and sequenced packet
1905 * sockets is that the stream sockets always behave as if MSG_EOR 1926 * sockets is that the stream sockets always behave as if MSG_EOR
1906 * has been set. 1927 * has been set.
1907 */ 1928 */
1908 if (sock->type == SOCK_STREAM) { 1929 if (sock->type == SOCK_STREAM) {
1909 if (flags & MSG_EOR) 1930 if (flags & MSG_EOR) {
1910 return -EINVAL; 1931 err = -EINVAL;
1932 goto out;
1933 }
1911 flags |= MSG_EOR; 1934 flags |= MSG_EOR;
1912 } 1935 }
1913 1936
1914 lock_sock(sk);
1915 1937
1916 err = dn_check_state(sk, addr, addr_len, &timeo, flags); 1938 err = dn_check_state(sk, addr, addr_len, &timeo, flags);
1917 if (err) 1939 if (err)
@@ -1980,8 +2002,12 @@ static int dn_sendmsg(struct kiocb *iocb, struct socket *sock,
1980 2002
1981 /* 2003 /*
1982 * Get a suitably sized skb. 2004 * Get a suitably sized skb.
2005 * 64 is a bit of a hack really, but its larger than any
2006 * link-layer headers and has served us well as a good
2007 * guess as to their real length.
1983 */ 2008 */
1984 skb = dn_alloc_send_skb(sk, &len, flags & MSG_DONTWAIT, timeo, &err); 2009 skb = dn_alloc_send_pskb(sk, len + 64 + DN_MAX_NSP_DATA_HEADER,
2010 flags & MSG_DONTWAIT, &err);
1985 2011
1986 if (err) 2012 if (err)
1987 break; 2013 break;
@@ -1991,7 +2017,7 @@ static int dn_sendmsg(struct kiocb *iocb, struct socket *sock,
1991 2017
1992 cb = DN_SKB_CB(skb); 2018 cb = DN_SKB_CB(skb);
1993 2019
1994 skb_reserve(skb, DN_MAX_NSP_DATA_HEADER); 2020 skb_reserve(skb, 64 + DN_MAX_NSP_DATA_HEADER);
1995 2021
1996 if (memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len)) { 2022 if (memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len)) {
1997 err = -EFAULT; 2023 err = -EFAULT;
diff --git a/net/decnet/dn_nsp_out.c b/net/decnet/dn_nsp_out.c
index e0bebf4bbcad..53633d352868 100644
--- a/net/decnet/dn_nsp_out.c
+++ b/net/decnet/dn_nsp_out.c
@@ -137,69 +137,6 @@ struct sk_buff *dn_alloc_skb(struct sock *sk, int size, int pri)
137} 137}
138 138
139/* 139/*
140 * Wrapper for the above, for allocs of data skbs. We try and get the
141 * whole size thats been asked for (plus 11 bytes of header). If this
142 * fails, then we try for any size over 16 bytes for SOCK_STREAMS.
143 */
144struct sk_buff *dn_alloc_send_skb(struct sock *sk, size_t *size, int noblock, long timeo, int *err)
145{
146 int space;
147 int len;
148 struct sk_buff *skb = NULL;
149
150 *err = 0;
151
152 while(skb == NULL) {
153 if (signal_pending(current)) {
154 *err = sock_intr_errno(timeo);
155 break;
156 }
157
158 if (sk->sk_shutdown & SEND_SHUTDOWN) {
159 *err = EINVAL;
160 break;
161 }
162
163 if (sk->sk_err)
164 break;
165
166 len = *size + 11;
167 space = sk->sk_sndbuf - atomic_read(&sk->sk_wmem_alloc);
168
169 if (space < len) {
170 if ((sk->sk_socket->type == SOCK_STREAM) &&
171 (space >= (16 + 11)))
172 len = space;
173 }
174
175 if (space < len) {
176 set_bit(SOCK_ASYNC_NOSPACE, &sk->sk_socket->flags);
177 if (noblock) {
178 *err = EWOULDBLOCK;
179 break;
180 }
181
182 clear_bit(SOCK_ASYNC_WAITDATA, &sk->sk_socket->flags);
183 SOCK_SLEEP_PRE(sk)
184
185 if ((sk->sk_sndbuf - atomic_read(&sk->sk_wmem_alloc)) <
186 len)
187 schedule();
188
189 SOCK_SLEEP_POST(sk)
190 continue;
191 }
192
193 if ((skb = dn_alloc_skb(sk, len, sk->sk_allocation)) == NULL)
194 continue;
195
196 *size = len - 11;
197 }
198
199 return skb;
200}
201
202/*
203 * Calculate persist timer based upon the smoothed round 140 * Calculate persist timer based upon the smoothed round
204 * trip time and the variance. Backoff according to the 141 * trip time and the variance. Backoff according to the
205 * nsp_backoff[] array. 142 * nsp_backoff[] array.
diff --git a/net/ieee80211/Kconfig b/net/ieee80211/Kconfig
new file mode 100644
index 000000000000..58ed4319e693
--- /dev/null
+++ b/net/ieee80211/Kconfig
@@ -0,0 +1,69 @@
1config IEEE80211
2 tristate "Generic IEEE 802.11 Networking Stack"
3 select NET_RADIO
4 ---help---
5 This option enables the hardware independent IEEE 802.11
6 networking stack.
7
8config IEEE80211_DEBUG
9 bool "Enable full debugging output"
10 depends on IEEE80211
11 ---help---
12 This option will enable debug tracing output for the
13 ieee80211 network stack.
14
15 This will result in the kernel module being ~70k larger. You
16 can control which debug output is sent to the kernel log by
17 setting the value in
18
19 /proc/net/ieee80211/debug_level
20
21 For example:
22
23 % echo 0x00000FFO > /proc/net/ieee80211/debug_level
24
25 For a list of values you can assign to debug_level, you
26 can look at the bit mask values in <net/ieee80211.h>
27
28 If you are not trying to debug or develop the ieee80211
29 subsystem, you most likely want to say N here.
30
31config IEEE80211_CRYPT_WEP
32 tristate "IEEE 802.11 WEP encryption (802.1x)"
33 depends on IEEE80211
34 select CRYPTO
35 select CRYPTO_ARC4
36 select CRC32
37 ---help---
38 Include software based cipher suites in support of IEEE
39 802.11's WEP. This is needed for WEP as well as 802.1x.
40
41 This can be compiled as a modules and it will be called
42 "ieee80211_crypt_wep".
43
44config IEEE80211_CRYPT_CCMP
45 tristate "IEEE 802.11i CCMP support"
46 depends on IEEE80211
47 select CRYPTO
48 select CRYPTO_AES
49 ---help---
50 Include software based cipher suites in support of IEEE 802.11i
51 (aka TGi, WPA, WPA2, WPA-PSK, etc.) for use with CCMP enabled
52 networks.
53
54 This can be compiled as a modules and it will be called
55 "ieee80211_crypt_ccmp".
56
57config IEEE80211_CRYPT_TKIP
58 tristate "IEEE 802.11i TKIP encryption"
59 depends on IEEE80211
60 select CRYPTO
61 select CRYPTO_MICHAEL_MIC
62 ---help---
63 Include software based cipher suites in support of IEEE 802.11i
64 (aka TGi, WPA, WPA2, WPA-PSK, etc.) for use with TKIP enabled
65 networks.
66
67 This can be compiled as a modules and it will be called
68 "ieee80211_crypt_tkip".
69
diff --git a/net/ieee80211/Makefile b/net/ieee80211/Makefile
new file mode 100644
index 000000000000..a6ccac5baea8
--- /dev/null
+++ b/net/ieee80211/Makefile
@@ -0,0 +1,11 @@
1obj-$(CONFIG_IEEE80211) += ieee80211.o
2obj-$(CONFIG_IEEE80211) += ieee80211_crypt.o
3obj-$(CONFIG_IEEE80211_CRYPT_WEP) += ieee80211_crypt_wep.o
4obj-$(CONFIG_IEEE80211_CRYPT_CCMP) += ieee80211_crypt_ccmp.o
5obj-$(CONFIG_IEEE80211_CRYPT_TKIP) += ieee80211_crypt_tkip.o
6ieee80211-objs := \
7 ieee80211_module.o \
8 ieee80211_tx.o \
9 ieee80211_rx.o \
10 ieee80211_wx.o
11
diff --git a/net/ieee80211/ieee80211_crypt.c b/net/ieee80211/ieee80211_crypt.c
new file mode 100644
index 000000000000..05a6f2f298db
--- /dev/null
+++ b/net/ieee80211/ieee80211_crypt.c
@@ -0,0 +1,259 @@
1/*
2 * Host AP crypto routines
3 *
4 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
5 * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. See README and COPYING for
10 * more details.
11 *
12 */
13
14#include <linux/config.h>
15#include <linux/version.h>
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/slab.h>
19#include <asm/string.h>
20#include <asm/errno.h>
21
22#include <net/ieee80211.h>
23
24MODULE_AUTHOR("Jouni Malinen");
25MODULE_DESCRIPTION("HostAP crypto");
26MODULE_LICENSE("GPL");
27
28struct ieee80211_crypto_alg {
29 struct list_head list;
30 struct ieee80211_crypto_ops *ops;
31};
32
33
34struct ieee80211_crypto {
35 struct list_head algs;
36 spinlock_t lock;
37};
38
39static struct ieee80211_crypto *hcrypt;
40
41void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
42 int force)
43{
44 struct list_head *ptr, *n;
45 struct ieee80211_crypt_data *entry;
46
47 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
48 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
49 entry = list_entry(ptr, struct ieee80211_crypt_data, list);
50
51 if (atomic_read(&entry->refcnt) != 0 && !force)
52 continue;
53
54 list_del(ptr);
55
56 if (entry->ops) {
57 entry->ops->deinit(entry->priv);
58 module_put(entry->ops->owner);
59 }
60 kfree(entry);
61 }
62}
63
64void ieee80211_crypt_deinit_handler(unsigned long data)
65{
66 struct ieee80211_device *ieee = (struct ieee80211_device *)data;
67 unsigned long flags;
68
69 spin_lock_irqsave(&ieee->lock, flags);
70 ieee80211_crypt_deinit_entries(ieee, 0);
71 if (!list_empty(&ieee->crypt_deinit_list)) {
72 printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
73 "deletion list\n", ieee->dev->name);
74 ieee->crypt_deinit_timer.expires = jiffies + HZ;
75 add_timer(&ieee->crypt_deinit_timer);
76 }
77 spin_unlock_irqrestore(&ieee->lock, flags);
78
79}
80
81void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
82 struct ieee80211_crypt_data **crypt)
83{
84 struct ieee80211_crypt_data *tmp;
85 unsigned long flags;
86
87 if (*crypt == NULL)
88 return;
89
90 tmp = *crypt;
91 *crypt = NULL;
92
93 /* must not run ops->deinit() while there may be pending encrypt or
94 * decrypt operations. Use a list of delayed deinits to avoid needing
95 * locking. */
96
97 spin_lock_irqsave(&ieee->lock, flags);
98 list_add(&tmp->list, &ieee->crypt_deinit_list);
99 if (!timer_pending(&ieee->crypt_deinit_timer)) {
100 ieee->crypt_deinit_timer.expires = jiffies + HZ;
101 add_timer(&ieee->crypt_deinit_timer);
102 }
103 spin_unlock_irqrestore(&ieee->lock, flags);
104}
105
106int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
107{
108 unsigned long flags;
109 struct ieee80211_crypto_alg *alg;
110
111 if (hcrypt == NULL)
112 return -1;
113
114 alg = kmalloc(sizeof(*alg), GFP_KERNEL);
115 if (alg == NULL)
116 return -ENOMEM;
117
118 memset(alg, 0, sizeof(*alg));
119 alg->ops = ops;
120
121 spin_lock_irqsave(&hcrypt->lock, flags);
122 list_add(&alg->list, &hcrypt->algs);
123 spin_unlock_irqrestore(&hcrypt->lock, flags);
124
125 printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
126 ops->name);
127
128 return 0;
129}
130
131int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
132{
133 unsigned long flags;
134 struct list_head *ptr;
135 struct ieee80211_crypto_alg *del_alg = NULL;
136
137 if (hcrypt == NULL)
138 return -1;
139
140 spin_lock_irqsave(&hcrypt->lock, flags);
141 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
142 struct ieee80211_crypto_alg *alg =
143 (struct ieee80211_crypto_alg *) ptr;
144 if (alg->ops == ops) {
145 list_del(&alg->list);
146 del_alg = alg;
147 break;
148 }
149 }
150 spin_unlock_irqrestore(&hcrypt->lock, flags);
151
152 if (del_alg) {
153 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
154 "'%s'\n", ops->name);
155 kfree(del_alg);
156 }
157
158 return del_alg ? 0 : -1;
159}
160
161
162struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
163{
164 unsigned long flags;
165 struct list_head *ptr;
166 struct ieee80211_crypto_alg *found_alg = NULL;
167
168 if (hcrypt == NULL)
169 return NULL;
170
171 spin_lock_irqsave(&hcrypt->lock, flags);
172 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
173 struct ieee80211_crypto_alg *alg =
174 (struct ieee80211_crypto_alg *) ptr;
175 if (strcmp(alg->ops->name, name) == 0) {
176 found_alg = alg;
177 break;
178 }
179 }
180 spin_unlock_irqrestore(&hcrypt->lock, flags);
181
182 if (found_alg)
183 return found_alg->ops;
184 else
185 return NULL;
186}
187
188
189static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
190static void ieee80211_crypt_null_deinit(void *priv) {}
191
192static struct ieee80211_crypto_ops ieee80211_crypt_null = {
193 .name = "NULL",
194 .init = ieee80211_crypt_null_init,
195 .deinit = ieee80211_crypt_null_deinit,
196 .encrypt_mpdu = NULL,
197 .decrypt_mpdu = NULL,
198 .encrypt_msdu = NULL,
199 .decrypt_msdu = NULL,
200 .set_key = NULL,
201 .get_key = NULL,
202 .extra_prefix_len = 0,
203 .extra_postfix_len = 0,
204 .owner = THIS_MODULE,
205};
206
207
208static int __init ieee80211_crypto_init(void)
209{
210 int ret = -ENOMEM;
211
212 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
213 if (!hcrypt)
214 goto out;
215
216 memset(hcrypt, 0, sizeof(*hcrypt));
217 INIT_LIST_HEAD(&hcrypt->algs);
218 spin_lock_init(&hcrypt->lock);
219
220 ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
221 if (ret < 0) {
222 kfree(hcrypt);
223 hcrypt = NULL;
224 }
225out:
226 return ret;
227}
228
229
230static void __exit ieee80211_crypto_deinit(void)
231{
232 struct list_head *ptr, *n;
233
234 if (hcrypt == NULL)
235 return;
236
237 for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs;
238 ptr = n, n = ptr->next) {
239 struct ieee80211_crypto_alg *alg =
240 (struct ieee80211_crypto_alg *) ptr;
241 list_del(ptr);
242 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
243 "'%s' (deinit)\n", alg->ops->name);
244 kfree(alg);
245 }
246
247 kfree(hcrypt);
248}
249
250EXPORT_SYMBOL(ieee80211_crypt_deinit_entries);
251EXPORT_SYMBOL(ieee80211_crypt_deinit_handler);
252EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit);
253
254EXPORT_SYMBOL(ieee80211_register_crypto_ops);
255EXPORT_SYMBOL(ieee80211_unregister_crypto_ops);
256EXPORT_SYMBOL(ieee80211_get_crypto_ops);
257
258module_init(ieee80211_crypto_init);
259module_exit(ieee80211_crypto_deinit);
diff --git a/net/ieee80211/ieee80211_crypt_ccmp.c b/net/ieee80211/ieee80211_crypt_ccmp.c
new file mode 100644
index 000000000000..11d15573b26a
--- /dev/null
+++ b/net/ieee80211/ieee80211_crypt_ccmp.c
@@ -0,0 +1,470 @@
1/*
2 * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
3 *
4 * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. See README and COPYING for
9 * more details.
10 */
11
12#include <linux/config.h>
13#include <linux/version.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/slab.h>
17#include <linux/random.h>
18#include <linux/skbuff.h>
19#include <linux/netdevice.h>
20#include <linux/if_ether.h>
21#include <linux/if_arp.h>
22#include <asm/string.h>
23#include <linux/wireless.h>
24
25#include <net/ieee80211.h>
26
27
28#include <linux/crypto.h>
29#include <asm/scatterlist.h>
30
31MODULE_AUTHOR("Jouni Malinen");
32MODULE_DESCRIPTION("Host AP crypt: CCMP");
33MODULE_LICENSE("GPL");
34
35#define AES_BLOCK_LEN 16
36#define CCMP_HDR_LEN 8
37#define CCMP_MIC_LEN 8
38#define CCMP_TK_LEN 16
39#define CCMP_PN_LEN 6
40
41struct ieee80211_ccmp_data {
42 u8 key[CCMP_TK_LEN];
43 int key_set;
44
45 u8 tx_pn[CCMP_PN_LEN];
46 u8 rx_pn[CCMP_PN_LEN];
47
48 u32 dot11RSNAStatsCCMPFormatErrors;
49 u32 dot11RSNAStatsCCMPReplays;
50 u32 dot11RSNAStatsCCMPDecryptErrors;
51
52 int key_idx;
53
54 struct crypto_tfm *tfm;
55
56 /* scratch buffers for virt_to_page() (crypto API) */
57 u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
58 tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
59 u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
60};
61
62static void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
63 const u8 pt[16], u8 ct[16])
64{
65 struct scatterlist src, dst;
66
67 src.page = virt_to_page(pt);
68 src.offset = offset_in_page(pt);
69 src.length = AES_BLOCK_LEN;
70
71 dst.page = virt_to_page(ct);
72 dst.offset = offset_in_page(ct);
73 dst.length = AES_BLOCK_LEN;
74
75 crypto_cipher_encrypt(tfm, &dst, &src, AES_BLOCK_LEN);
76}
77
78static void * ieee80211_ccmp_init(int key_idx)
79{
80 struct ieee80211_ccmp_data *priv;
81
82 priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
83 if (priv == NULL)
84 goto fail;
85 memset(priv, 0, sizeof(*priv));
86 priv->key_idx = key_idx;
87
88 priv->tfm = crypto_alloc_tfm("aes", 0);
89 if (priv->tfm == NULL) {
90 printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
91 "crypto API aes\n");
92 goto fail;
93 }
94
95 return priv;
96
97fail:
98 if (priv) {
99 if (priv->tfm)
100 crypto_free_tfm(priv->tfm);
101 kfree(priv);
102 }
103
104 return NULL;
105}
106
107
108static void ieee80211_ccmp_deinit(void *priv)
109{
110 struct ieee80211_ccmp_data *_priv = priv;
111 if (_priv && _priv->tfm)
112 crypto_free_tfm(_priv->tfm);
113 kfree(priv);
114}
115
116
117static inline void xor_block(u8 *b, u8 *a, size_t len)
118{
119 int i;
120 for (i = 0; i < len; i++)
121 b[i] ^= a[i];
122}
123
124
125static void ccmp_init_blocks(struct crypto_tfm *tfm,
126 struct ieee80211_hdr *hdr,
127 u8 *pn, size_t dlen, u8 *b0, u8 *auth,
128 u8 *s0)
129{
130 u8 *pos, qc = 0;
131 size_t aad_len;
132 u16 fc;
133 int a4_included, qc_included;
134 u8 aad[2 * AES_BLOCK_LEN];
135
136 fc = le16_to_cpu(hdr->frame_ctl);
137 a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
138 (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
139 qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
140 (WLAN_FC_GET_STYPE(fc) & 0x08));
141 aad_len = 22;
142 if (a4_included)
143 aad_len += 6;
144 if (qc_included) {
145 pos = (u8 *) &hdr->addr4;
146 if (a4_included)
147 pos += 6;
148 qc = *pos & 0x0f;
149 aad_len += 2;
150 }
151
152 /* CCM Initial Block:
153 * Flag (Include authentication header, M=3 (8-octet MIC),
154 * L=1 (2-octet Dlen))
155 * Nonce: 0x00 | A2 | PN
156 * Dlen */
157 b0[0] = 0x59;
158 b0[1] = qc;
159 memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
160 memcpy(b0 + 8, pn, CCMP_PN_LEN);
161 b0[14] = (dlen >> 8) & 0xff;
162 b0[15] = dlen & 0xff;
163
164 /* AAD:
165 * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
166 * A1 | A2 | A3
167 * SC with bits 4..15 (seq#) masked to zero
168 * A4 (if present)
169 * QC (if present)
170 */
171 pos = (u8 *) hdr;
172 aad[0] = 0; /* aad_len >> 8 */
173 aad[1] = aad_len & 0xff;
174 aad[2] = pos[0] & 0x8f;
175 aad[3] = pos[1] & 0xc7;
176 memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
177 pos = (u8 *) &hdr->seq_ctl;
178 aad[22] = pos[0] & 0x0f;
179 aad[23] = 0; /* all bits masked */
180 memset(aad + 24, 0, 8);
181 if (a4_included)
182 memcpy(aad + 24, hdr->addr4, ETH_ALEN);
183 if (qc_included) {
184 aad[a4_included ? 30 : 24] = qc;
185 /* rest of QC masked */
186 }
187
188 /* Start with the first block and AAD */
189 ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
190 xor_block(auth, aad, AES_BLOCK_LEN);
191 ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
192 xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
193 ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
194 b0[0] &= 0x07;
195 b0[14] = b0[15] = 0;
196 ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
197}
198
199
200static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
201{
202 struct ieee80211_ccmp_data *key = priv;
203 int data_len, i, blocks, last, len;
204 u8 *pos, *mic;
205 struct ieee80211_hdr *hdr;
206 u8 *b0 = key->tx_b0;
207 u8 *b = key->tx_b;
208 u8 *e = key->tx_e;
209 u8 *s0 = key->tx_s0;
210
211 if (skb_headroom(skb) < CCMP_HDR_LEN ||
212 skb_tailroom(skb) < CCMP_MIC_LEN ||
213 skb->len < hdr_len)
214 return -1;
215
216 data_len = skb->len - hdr_len;
217 pos = skb_push(skb, CCMP_HDR_LEN);
218 memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
219 pos += hdr_len;
220 mic = skb_put(skb, CCMP_MIC_LEN);
221
222 i = CCMP_PN_LEN - 1;
223 while (i >= 0) {
224 key->tx_pn[i]++;
225 if (key->tx_pn[i] != 0)
226 break;
227 i--;
228 }
229
230 *pos++ = key->tx_pn[5];
231 *pos++ = key->tx_pn[4];
232 *pos++ = 0;
233 *pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
234 *pos++ = key->tx_pn[3];
235 *pos++ = key->tx_pn[2];
236 *pos++ = key->tx_pn[1];
237 *pos++ = key->tx_pn[0];
238
239 hdr = (struct ieee80211_hdr *) skb->data;
240 ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
241
242 blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
243 last = data_len % AES_BLOCK_LEN;
244
245 for (i = 1; i <= blocks; i++) {
246 len = (i == blocks && last) ? last : AES_BLOCK_LEN;
247 /* Authentication */
248 xor_block(b, pos, len);
249 ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
250 /* Encryption, with counter */
251 b0[14] = (i >> 8) & 0xff;
252 b0[15] = i & 0xff;
253 ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
254 xor_block(pos, e, len);
255 pos += len;
256 }
257
258 for (i = 0; i < CCMP_MIC_LEN; i++)
259 mic[i] = b[i] ^ s0[i];
260
261 return 0;
262}
263
264
265static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
266{
267 struct ieee80211_ccmp_data *key = priv;
268 u8 keyidx, *pos;
269 struct ieee80211_hdr *hdr;
270 u8 *b0 = key->rx_b0;
271 u8 *b = key->rx_b;
272 u8 *a = key->rx_a;
273 u8 pn[6];
274 int i, blocks, last, len;
275 size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
276 u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
277
278 if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
279 key->dot11RSNAStatsCCMPFormatErrors++;
280 return -1;
281 }
282
283 hdr = (struct ieee80211_hdr *) skb->data;
284 pos = skb->data + hdr_len;
285 keyidx = pos[3];
286 if (!(keyidx & (1 << 5))) {
287 if (net_ratelimit()) {
288 printk(KERN_DEBUG "CCMP: received packet without ExtIV"
289 " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
290 }
291 key->dot11RSNAStatsCCMPFormatErrors++;
292 return -2;
293 }
294 keyidx >>= 6;
295 if (key->key_idx != keyidx) {
296 printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
297 "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
298 return -6;
299 }
300 if (!key->key_set) {
301 if (net_ratelimit()) {
302 printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT
303 " with keyid=%d that does not have a configured"
304 " key\n", MAC_ARG(hdr->addr2), keyidx);
305 }
306 return -3;
307 }
308
309 pn[0] = pos[7];
310 pn[1] = pos[6];
311 pn[2] = pos[5];
312 pn[3] = pos[4];
313 pn[4] = pos[1];
314 pn[5] = pos[0];
315 pos += 8;
316
317 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
318 if (net_ratelimit()) {
319 printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT
320 " previous PN %02x%02x%02x%02x%02x%02x "
321 "received PN %02x%02x%02x%02x%02x%02x\n",
322 MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn),
323 MAC_ARG(pn));
324 }
325 key->dot11RSNAStatsCCMPReplays++;
326 return -4;
327 }
328
329 ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
330 xor_block(mic, b, CCMP_MIC_LEN);
331
332 blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
333 last = data_len % AES_BLOCK_LEN;
334
335 for (i = 1; i <= blocks; i++) {
336 len = (i == blocks && last) ? last : AES_BLOCK_LEN;
337 /* Decrypt, with counter */
338 b0[14] = (i >> 8) & 0xff;
339 b0[15] = i & 0xff;
340 ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
341 xor_block(pos, b, len);
342 /* Authentication */
343 xor_block(a, pos, len);
344 ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
345 pos += len;
346 }
347
348 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
349 if (net_ratelimit()) {
350 printk(KERN_DEBUG "CCMP: decrypt failed: STA="
351 MAC_FMT "\n", MAC_ARG(hdr->addr2));
352 }
353 key->dot11RSNAStatsCCMPDecryptErrors++;
354 return -5;
355 }
356
357 memcpy(key->rx_pn, pn, CCMP_PN_LEN);
358
359 /* Remove hdr and MIC */
360 memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
361 skb_pull(skb, CCMP_HDR_LEN);
362 skb_trim(skb, skb->len - CCMP_MIC_LEN);
363
364 return keyidx;
365}
366
367
368static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
369{
370 struct ieee80211_ccmp_data *data = priv;
371 int keyidx;
372 struct crypto_tfm *tfm = data->tfm;
373
374 keyidx = data->key_idx;
375 memset(data, 0, sizeof(*data));
376 data->key_idx = keyidx;
377 data->tfm = tfm;
378 if (len == CCMP_TK_LEN) {
379 memcpy(data->key, key, CCMP_TK_LEN);
380 data->key_set = 1;
381 if (seq) {
382 data->rx_pn[0] = seq[5];
383 data->rx_pn[1] = seq[4];
384 data->rx_pn[2] = seq[3];
385 data->rx_pn[3] = seq[2];
386 data->rx_pn[4] = seq[1];
387 data->rx_pn[5] = seq[0];
388 }
389 crypto_cipher_setkey(data->tfm, data->key, CCMP_TK_LEN);
390 } else if (len == 0)
391 data->key_set = 0;
392 else
393 return -1;
394
395 return 0;
396}
397
398
399static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
400{
401 struct ieee80211_ccmp_data *data = priv;
402
403 if (len < CCMP_TK_LEN)
404 return -1;
405
406 if (!data->key_set)
407 return 0;
408 memcpy(key, data->key, CCMP_TK_LEN);
409
410 if (seq) {
411 seq[0] = data->tx_pn[5];
412 seq[1] = data->tx_pn[4];
413 seq[2] = data->tx_pn[3];
414 seq[3] = data->tx_pn[2];
415 seq[4] = data->tx_pn[1];
416 seq[5] = data->tx_pn[0];
417 }
418
419 return CCMP_TK_LEN;
420}
421
422
423static char * ieee80211_ccmp_print_stats(char *p, void *priv)
424{
425 struct ieee80211_ccmp_data *ccmp = priv;
426 p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
427 "tx_pn=%02x%02x%02x%02x%02x%02x "
428 "rx_pn=%02x%02x%02x%02x%02x%02x "
429 "format_errors=%d replays=%d decrypt_errors=%d\n",
430 ccmp->key_idx, ccmp->key_set,
431 MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn),
432 ccmp->dot11RSNAStatsCCMPFormatErrors,
433 ccmp->dot11RSNAStatsCCMPReplays,
434 ccmp->dot11RSNAStatsCCMPDecryptErrors);
435
436 return p;
437}
438
439
440static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
441 .name = "CCMP",
442 .init = ieee80211_ccmp_init,
443 .deinit = ieee80211_ccmp_deinit,
444 .encrypt_mpdu = ieee80211_ccmp_encrypt,
445 .decrypt_mpdu = ieee80211_ccmp_decrypt,
446 .encrypt_msdu = NULL,
447 .decrypt_msdu = NULL,
448 .set_key = ieee80211_ccmp_set_key,
449 .get_key = ieee80211_ccmp_get_key,
450 .print_stats = ieee80211_ccmp_print_stats,
451 .extra_prefix_len = CCMP_HDR_LEN,
452 .extra_postfix_len = CCMP_MIC_LEN,
453 .owner = THIS_MODULE,
454};
455
456
457static int __init ieee80211_crypto_ccmp_init(void)
458{
459 return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
460}
461
462
463static void __exit ieee80211_crypto_ccmp_exit(void)
464{
465 ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
466}
467
468
469module_init(ieee80211_crypto_ccmp_init);
470module_exit(ieee80211_crypto_ccmp_exit);
diff --git a/net/ieee80211/ieee80211_crypt_tkip.c b/net/ieee80211/ieee80211_crypt_tkip.c
new file mode 100644
index 000000000000..f91d92c6df25
--- /dev/null
+++ b/net/ieee80211/ieee80211_crypt_tkip.c
@@ -0,0 +1,708 @@
1/*
2 * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
3 *
4 * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. See README and COPYING for
9 * more details.
10 */
11
12#include <linux/config.h>
13#include <linux/version.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/slab.h>
17#include <linux/random.h>
18#include <linux/skbuff.h>
19#include <linux/netdevice.h>
20#include <linux/if_ether.h>
21#include <linux/if_arp.h>
22#include <asm/string.h>
23
24#include <net/ieee80211.h>
25
26
27#include <linux/crypto.h>
28#include <asm/scatterlist.h>
29#include <linux/crc32.h>
30
31MODULE_AUTHOR("Jouni Malinen");
32MODULE_DESCRIPTION("Host AP crypt: TKIP");
33MODULE_LICENSE("GPL");
34
35struct ieee80211_tkip_data {
36#define TKIP_KEY_LEN 32
37 u8 key[TKIP_KEY_LEN];
38 int key_set;
39
40 u32 tx_iv32;
41 u16 tx_iv16;
42 u16 tx_ttak[5];
43 int tx_phase1_done;
44
45 u32 rx_iv32;
46 u16 rx_iv16;
47 u16 rx_ttak[5];
48 int rx_phase1_done;
49 u32 rx_iv32_new;
50 u16 rx_iv16_new;
51
52 u32 dot11RSNAStatsTKIPReplays;
53 u32 dot11RSNAStatsTKIPICVErrors;
54 u32 dot11RSNAStatsTKIPLocalMICFailures;
55
56 int key_idx;
57
58 struct crypto_tfm *tfm_arc4;
59 struct crypto_tfm *tfm_michael;
60
61 /* scratch buffers for virt_to_page() (crypto API) */
62 u8 rx_hdr[16], tx_hdr[16];
63};
64
65static void * ieee80211_tkip_init(int key_idx)
66{
67 struct ieee80211_tkip_data *priv;
68
69 priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
70 if (priv == NULL)
71 goto fail;
72 memset(priv, 0, sizeof(*priv));
73 priv->key_idx = key_idx;
74
75 priv->tfm_arc4 = crypto_alloc_tfm("arc4", 0);
76 if (priv->tfm_arc4 == NULL) {
77 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
78 "crypto API arc4\n");
79 goto fail;
80 }
81
82 priv->tfm_michael = crypto_alloc_tfm("michael_mic", 0);
83 if (priv->tfm_michael == NULL) {
84 printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
85 "crypto API michael_mic\n");
86 goto fail;
87 }
88
89 return priv;
90
91fail:
92 if (priv) {
93 if (priv->tfm_michael)
94 crypto_free_tfm(priv->tfm_michael);
95 if (priv->tfm_arc4)
96 crypto_free_tfm(priv->tfm_arc4);
97 kfree(priv);
98 }
99
100 return NULL;
101}
102
103
104static void ieee80211_tkip_deinit(void *priv)
105{
106 struct ieee80211_tkip_data *_priv = priv;
107 if (_priv && _priv->tfm_michael)
108 crypto_free_tfm(_priv->tfm_michael);
109 if (_priv && _priv->tfm_arc4)
110 crypto_free_tfm(_priv->tfm_arc4);
111 kfree(priv);
112}
113
114
115static inline u16 RotR1(u16 val)
116{
117 return (val >> 1) | (val << 15);
118}
119
120
121static inline u8 Lo8(u16 val)
122{
123 return val & 0xff;
124}
125
126
127static inline u8 Hi8(u16 val)
128{
129 return val >> 8;
130}
131
132
133static inline u16 Lo16(u32 val)
134{
135 return val & 0xffff;
136}
137
138
139static inline u16 Hi16(u32 val)
140{
141 return val >> 16;
142}
143
144
145static inline u16 Mk16(u8 hi, u8 lo)
146{
147 return lo | (((u16) hi) << 8);
148}
149
150
151static inline u16 Mk16_le(u16 *v)
152{
153 return le16_to_cpu(*v);
154}
155
156
157static const u16 Sbox[256] =
158{
159 0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
160 0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
161 0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
162 0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
163 0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
164 0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
165 0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
166 0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
167 0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
168 0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
169 0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
170 0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
171 0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
172 0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
173 0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
174 0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
175 0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
176 0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
177 0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
178 0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
179 0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
180 0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
181 0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
182 0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
183 0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
184 0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
185 0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
186 0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
187 0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
188 0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
189 0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
190 0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
191};
192
193
194static inline u16 _S_(u16 v)
195{
196 u16 t = Sbox[Hi8(v)];
197 return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
198}
199
200
201#define PHASE1_LOOP_COUNT 8
202
203static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
204{
205 int i, j;
206
207 /* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
208 TTAK[0] = Lo16(IV32);
209 TTAK[1] = Hi16(IV32);
210 TTAK[2] = Mk16(TA[1], TA[0]);
211 TTAK[3] = Mk16(TA[3], TA[2]);
212 TTAK[4] = Mk16(TA[5], TA[4]);
213
214 for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
215 j = 2 * (i & 1);
216 TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
217 TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
218 TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
219 TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
220 TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
221 }
222}
223
224
225static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
226 u16 IV16)
227{
228 /* Make temporary area overlap WEP seed so that the final copy can be
229 * avoided on little endian hosts. */
230 u16 *PPK = (u16 *) &WEPSeed[4];
231
232 /* Step 1 - make copy of TTAK and bring in TSC */
233 PPK[0] = TTAK[0];
234 PPK[1] = TTAK[1];
235 PPK[2] = TTAK[2];
236 PPK[3] = TTAK[3];
237 PPK[4] = TTAK[4];
238 PPK[5] = TTAK[4] + IV16;
239
240 /* Step 2 - 96-bit bijective mixing using S-box */
241 PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
242 PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
243 PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
244 PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
245 PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
246 PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
247
248 PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
249 PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
250 PPK[2] += RotR1(PPK[1]);
251 PPK[3] += RotR1(PPK[2]);
252 PPK[4] += RotR1(PPK[3]);
253 PPK[5] += RotR1(PPK[4]);
254
255 /* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
256 * WEPSeed[0..2] is transmitted as WEP IV */
257 WEPSeed[0] = Hi8(IV16);
258 WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
259 WEPSeed[2] = Lo8(IV16);
260 WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
261
262#ifdef __BIG_ENDIAN
263 {
264 int i;
265 for (i = 0; i < 6; i++)
266 PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
267 }
268#endif
269}
270
271static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
272{
273 struct ieee80211_tkip_data *tkey = priv;
274 int len;
275 u8 rc4key[16], *pos, *icv;
276 struct ieee80211_hdr *hdr;
277 u32 crc;
278 struct scatterlist sg;
279
280 if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
281 skb->len < hdr_len)
282 return -1;
283
284 hdr = (struct ieee80211_hdr *) skb->data;
285 if (!tkey->tx_phase1_done) {
286 tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
287 tkey->tx_iv32);
288 tkey->tx_phase1_done = 1;
289 }
290 tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
291
292 len = skb->len - hdr_len;
293 pos = skb_push(skb, 8);
294 memmove(pos, pos + 8, hdr_len);
295 pos += hdr_len;
296 icv = skb_put(skb, 4);
297
298 *pos++ = rc4key[0];
299 *pos++ = rc4key[1];
300 *pos++ = rc4key[2];
301 *pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
302 *pos++ = tkey->tx_iv32 & 0xff;
303 *pos++ = (tkey->tx_iv32 >> 8) & 0xff;
304 *pos++ = (tkey->tx_iv32 >> 16) & 0xff;
305 *pos++ = (tkey->tx_iv32 >> 24) & 0xff;
306
307 crc = ~crc32_le(~0, pos, len);
308 icv[0] = crc;
309 icv[1] = crc >> 8;
310 icv[2] = crc >> 16;
311 icv[3] = crc >> 24;
312
313 crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
314 sg.page = virt_to_page(pos);
315 sg.offset = offset_in_page(pos);
316 sg.length = len + 4;
317 crypto_cipher_encrypt(tkey->tfm_arc4, &sg, &sg, len + 4);
318
319 tkey->tx_iv16++;
320 if (tkey->tx_iv16 == 0) {
321 tkey->tx_phase1_done = 0;
322 tkey->tx_iv32++;
323 }
324
325 return 0;
326}
327
328static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
329{
330 struct ieee80211_tkip_data *tkey = priv;
331 u8 rc4key[16];
332 u8 keyidx, *pos;
333 u32 iv32;
334 u16 iv16;
335 struct ieee80211_hdr *hdr;
336 u8 icv[4];
337 u32 crc;
338 struct scatterlist sg;
339 int plen;
340
341 if (skb->len < hdr_len + 8 + 4)
342 return -1;
343
344 hdr = (struct ieee80211_hdr *) skb->data;
345 pos = skb->data + hdr_len;
346 keyidx = pos[3];
347 if (!(keyidx & (1 << 5))) {
348 if (net_ratelimit()) {
349 printk(KERN_DEBUG "TKIP: received packet without ExtIV"
350 " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
351 }
352 return -2;
353 }
354 keyidx >>= 6;
355 if (tkey->key_idx != keyidx) {
356 printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
357 "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
358 return -6;
359 }
360 if (!tkey->key_set) {
361 if (net_ratelimit()) {
362 printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT
363 " with keyid=%d that does not have a configured"
364 " key\n", MAC_ARG(hdr->addr2), keyidx);
365 }
366 return -3;
367 }
368 iv16 = (pos[0] << 8) | pos[2];
369 iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
370 pos += 8;
371
372 if (iv32 < tkey->rx_iv32 ||
373 (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
374 if (net_ratelimit()) {
375 printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT
376 " previous TSC %08x%04x received TSC "
377 "%08x%04x\n", MAC_ARG(hdr->addr2),
378 tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
379 }
380 tkey->dot11RSNAStatsTKIPReplays++;
381 return -4;
382 }
383
384 if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
385 tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
386 tkey->rx_phase1_done = 1;
387 }
388 tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
389
390 plen = skb->len - hdr_len - 12;
391
392 crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
393 sg.page = virt_to_page(pos);
394 sg.offset = offset_in_page(pos);
395 sg.length = plen + 4;
396 crypto_cipher_decrypt(tkey->tfm_arc4, &sg, &sg, plen + 4);
397
398 crc = ~crc32_le(~0, pos, plen);
399 icv[0] = crc;
400 icv[1] = crc >> 8;
401 icv[2] = crc >> 16;
402 icv[3] = crc >> 24;
403 if (memcmp(icv, pos + plen, 4) != 0) {
404 if (iv32 != tkey->rx_iv32) {
405 /* Previously cached Phase1 result was already lost, so
406 * it needs to be recalculated for the next packet. */
407 tkey->rx_phase1_done = 0;
408 }
409 if (net_ratelimit()) {
410 printk(KERN_DEBUG "TKIP: ICV error detected: STA="
411 MAC_FMT "\n", MAC_ARG(hdr->addr2));
412 }
413 tkey->dot11RSNAStatsTKIPICVErrors++;
414 return -5;
415 }
416
417 /* Update real counters only after Michael MIC verification has
418 * completed */
419 tkey->rx_iv32_new = iv32;
420 tkey->rx_iv16_new = iv16;
421
422 /* Remove IV and ICV */
423 memmove(skb->data + 8, skb->data, hdr_len);
424 skb_pull(skb, 8);
425 skb_trim(skb, skb->len - 4);
426
427 return keyidx;
428}
429
430
431static int michael_mic(struct ieee80211_tkip_data *tkey, u8 *key, u8 *hdr,
432 u8 *data, size_t data_len, u8 *mic)
433{
434 struct scatterlist sg[2];
435
436 if (tkey->tfm_michael == NULL) {
437 printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
438 return -1;
439 }
440 sg[0].page = virt_to_page(hdr);
441 sg[0].offset = offset_in_page(hdr);
442 sg[0].length = 16;
443
444 sg[1].page = virt_to_page(data);
445 sg[1].offset = offset_in_page(data);
446 sg[1].length = data_len;
447
448 crypto_digest_init(tkey->tfm_michael);
449 crypto_digest_setkey(tkey->tfm_michael, key, 8);
450 crypto_digest_update(tkey->tfm_michael, sg, 2);
451 crypto_digest_final(tkey->tfm_michael, mic);
452
453 return 0;
454}
455
456static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
457{
458 struct ieee80211_hdr *hdr11;
459
460 hdr11 = (struct ieee80211_hdr *) skb->data;
461 switch (le16_to_cpu(hdr11->frame_ctl) &
462 (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
463 case IEEE80211_FCTL_TODS:
464 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
465 memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
466 break;
467 case IEEE80211_FCTL_FROMDS:
468 memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
469 memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
470 break;
471 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
472 memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
473 memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
474 break;
475 case 0:
476 memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
477 memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
478 break;
479 }
480
481 hdr[12] = 0; /* priority */
482 hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
483}
484
485
486static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)
487{
488 struct ieee80211_tkip_data *tkey = priv;
489 u8 *pos;
490
491 if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
492 printk(KERN_DEBUG "Invalid packet for Michael MIC add "
493 "(tailroom=%d hdr_len=%d skb->len=%d)\n",
494 skb_tailroom(skb), hdr_len, skb->len);
495 return -1;
496 }
497
498 michael_mic_hdr(skb, tkey->tx_hdr);
499 pos = skb_put(skb, 8);
500 if (michael_mic(tkey, &tkey->key[16], tkey->tx_hdr,
501 skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
502 return -1;
503
504 return 0;
505}
506
507
508#if WIRELESS_EXT >= 18
509static void ieee80211_michael_mic_failure(struct net_device *dev,
510 struct ieee80211_hdr *hdr,
511 int keyidx)
512{
513 union iwreq_data wrqu;
514 struct iw_michaelmicfailure ev;
515
516 /* TODO: needed parameters: count, keyid, key type, TSC */
517 memset(&ev, 0, sizeof(ev));
518 ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
519 if (hdr->addr1[0] & 0x01)
520 ev.flags |= IW_MICFAILURE_GROUP;
521 else
522 ev.flags |= IW_MICFAILURE_PAIRWISE;
523 ev.src_addr.sa_family = ARPHRD_ETHER;
524 memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
525 memset(&wrqu, 0, sizeof(wrqu));
526 wrqu.data.length = sizeof(ev);
527 wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
528}
529#elif WIRELESS_EXT >= 15
530static void ieee80211_michael_mic_failure(struct net_device *dev,
531 struct ieee80211_hdr *hdr,
532 int keyidx)
533{
534 union iwreq_data wrqu;
535 char buf[128];
536
537 /* TODO: needed parameters: count, keyid, key type, TSC */
538 sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr="
539 MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni",
540 MAC_ARG(hdr->addr2));
541 memset(&wrqu, 0, sizeof(wrqu));
542 wrqu.data.length = strlen(buf);
543 wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf);
544}
545#else /* WIRELESS_EXT >= 15 */
546static inline void ieee80211_michael_mic_failure(struct net_device *dev,
547 struct ieee80211_hdr *hdr,
548 int keyidx)
549{
550}
551#endif /* WIRELESS_EXT >= 15 */
552
553
554static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
555 int hdr_len, void *priv)
556{
557 struct ieee80211_tkip_data *tkey = priv;
558 u8 mic[8];
559
560 if (!tkey->key_set)
561 return -1;
562
563 michael_mic_hdr(skb, tkey->rx_hdr);
564 if (michael_mic(tkey, &tkey->key[24], tkey->rx_hdr,
565 skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
566 return -1;
567 if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
568 struct ieee80211_hdr *hdr;
569 hdr = (struct ieee80211_hdr *) skb->data;
570 printk(KERN_DEBUG "%s: Michael MIC verification failed for "
571 "MSDU from " MAC_FMT " keyidx=%d\n",
572 skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2),
573 keyidx);
574 if (skb->dev)
575 ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
576 tkey->dot11RSNAStatsTKIPLocalMICFailures++;
577 return -1;
578 }
579
580 /* Update TSC counters for RX now that the packet verification has
581 * completed. */
582 tkey->rx_iv32 = tkey->rx_iv32_new;
583 tkey->rx_iv16 = tkey->rx_iv16_new;
584
585 skb_trim(skb, skb->len - 8);
586
587 return 0;
588}
589
590
591static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
592{
593 struct ieee80211_tkip_data *tkey = priv;
594 int keyidx;
595 struct crypto_tfm *tfm = tkey->tfm_michael;
596 struct crypto_tfm *tfm2 = tkey->tfm_arc4;
597
598 keyidx = tkey->key_idx;
599 memset(tkey, 0, sizeof(*tkey));
600 tkey->key_idx = keyidx;
601 tkey->tfm_michael = tfm;
602 tkey->tfm_arc4 = tfm2;
603 if (len == TKIP_KEY_LEN) {
604 memcpy(tkey->key, key, TKIP_KEY_LEN);
605 tkey->key_set = 1;
606 tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
607 if (seq) {
608 tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
609 (seq[3] << 8) | seq[2];
610 tkey->rx_iv16 = (seq[1] << 8) | seq[0];
611 }
612 } else if (len == 0)
613 tkey->key_set = 0;
614 else
615 return -1;
616
617 return 0;
618}
619
620
621static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
622{
623 struct ieee80211_tkip_data *tkey = priv;
624
625 if (len < TKIP_KEY_LEN)
626 return -1;
627
628 if (!tkey->key_set)
629 return 0;
630 memcpy(key, tkey->key, TKIP_KEY_LEN);
631
632 if (seq) {
633 /* Return the sequence number of the last transmitted frame. */
634 u16 iv16 = tkey->tx_iv16;
635 u32 iv32 = tkey->tx_iv32;
636 if (iv16 == 0)
637 iv32--;
638 iv16--;
639 seq[0] = tkey->tx_iv16;
640 seq[1] = tkey->tx_iv16 >> 8;
641 seq[2] = tkey->tx_iv32;
642 seq[3] = tkey->tx_iv32 >> 8;
643 seq[4] = tkey->tx_iv32 >> 16;
644 seq[5] = tkey->tx_iv32 >> 24;
645 }
646
647 return TKIP_KEY_LEN;
648}
649
650
651static char * ieee80211_tkip_print_stats(char *p, void *priv)
652{
653 struct ieee80211_tkip_data *tkip = priv;
654 p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
655 "tx_pn=%02x%02x%02x%02x%02x%02x "
656 "rx_pn=%02x%02x%02x%02x%02x%02x "
657 "replays=%d icv_errors=%d local_mic_failures=%d\n",
658 tkip->key_idx, tkip->key_set,
659 (tkip->tx_iv32 >> 24) & 0xff,
660 (tkip->tx_iv32 >> 16) & 0xff,
661 (tkip->tx_iv32 >> 8) & 0xff,
662 tkip->tx_iv32 & 0xff,
663 (tkip->tx_iv16 >> 8) & 0xff,
664 tkip->tx_iv16 & 0xff,
665 (tkip->rx_iv32 >> 24) & 0xff,
666 (tkip->rx_iv32 >> 16) & 0xff,
667 (tkip->rx_iv32 >> 8) & 0xff,
668 tkip->rx_iv32 & 0xff,
669 (tkip->rx_iv16 >> 8) & 0xff,
670 tkip->rx_iv16 & 0xff,
671 tkip->dot11RSNAStatsTKIPReplays,
672 tkip->dot11RSNAStatsTKIPICVErrors,
673 tkip->dot11RSNAStatsTKIPLocalMICFailures);
674 return p;
675}
676
677
678static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {
679 .name = "TKIP",
680 .init = ieee80211_tkip_init,
681 .deinit = ieee80211_tkip_deinit,
682 .encrypt_mpdu = ieee80211_tkip_encrypt,
683 .decrypt_mpdu = ieee80211_tkip_decrypt,
684 .encrypt_msdu = ieee80211_michael_mic_add,
685 .decrypt_msdu = ieee80211_michael_mic_verify,
686 .set_key = ieee80211_tkip_set_key,
687 .get_key = ieee80211_tkip_get_key,
688 .print_stats = ieee80211_tkip_print_stats,
689 .extra_prefix_len = 4 + 4, /* IV + ExtIV */
690 .extra_postfix_len = 8 + 4, /* MIC + ICV */
691 .owner = THIS_MODULE,
692};
693
694
695static int __init ieee80211_crypto_tkip_init(void)
696{
697 return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip);
698}
699
700
701static void __exit ieee80211_crypto_tkip_exit(void)
702{
703 ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip);
704}
705
706
707module_init(ieee80211_crypto_tkip_init);
708module_exit(ieee80211_crypto_tkip_exit);
diff --git a/net/ieee80211/ieee80211_crypt_wep.c b/net/ieee80211/ieee80211_crypt_wep.c
new file mode 100644
index 000000000000..bec1d3470d39
--- /dev/null
+++ b/net/ieee80211/ieee80211_crypt_wep.c
@@ -0,0 +1,272 @@
1/*
2 * Host AP crypt: host-based WEP encryption implementation for Host AP driver
3 *
4 * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. See README and COPYING for
9 * more details.
10 */
11
12#include <linux/config.h>
13#include <linux/version.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/slab.h>
17#include <linux/random.h>
18#include <linux/skbuff.h>
19#include <asm/string.h>
20
21#include <net/ieee80211.h>
22
23
24#include <linux/crypto.h>
25#include <asm/scatterlist.h>
26#include <linux/crc32.h>
27
28MODULE_AUTHOR("Jouni Malinen");
29MODULE_DESCRIPTION("Host AP crypt: WEP");
30MODULE_LICENSE("GPL");
31
32
33struct prism2_wep_data {
34 u32 iv;
35#define WEP_KEY_LEN 13
36 u8 key[WEP_KEY_LEN + 1];
37 u8 key_len;
38 u8 key_idx;
39 struct crypto_tfm *tfm;
40};
41
42
43static void * prism2_wep_init(int keyidx)
44{
45 struct prism2_wep_data *priv;
46
47 priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
48 if (priv == NULL)
49 goto fail;
50 memset(priv, 0, sizeof(*priv));
51 priv->key_idx = keyidx;
52
53 priv->tfm = crypto_alloc_tfm("arc4", 0);
54 if (priv->tfm == NULL) {
55 printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
56 "crypto API arc4\n");
57 goto fail;
58 }
59
60 /* start WEP IV from a random value */
61 get_random_bytes(&priv->iv, 4);
62
63 return priv;
64
65fail:
66 if (priv) {
67 if (priv->tfm)
68 crypto_free_tfm(priv->tfm);
69 kfree(priv);
70 }
71 return NULL;
72}
73
74
75static void prism2_wep_deinit(void *priv)
76{
77 struct prism2_wep_data *_priv = priv;
78 if (_priv && _priv->tfm)
79 crypto_free_tfm(_priv->tfm);
80 kfree(priv);
81}
82
83
84/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
85 * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
86 * so the payload length increases with 8 bytes.
87 *
88 * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
89 */
90static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
91{
92 struct prism2_wep_data *wep = priv;
93 u32 crc, klen, len;
94 u8 key[WEP_KEY_LEN + 3];
95 u8 *pos, *icv;
96 struct scatterlist sg;
97
98 if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
99 skb->len < hdr_len)
100 return -1;
101
102 len = skb->len - hdr_len;
103 pos = skb_push(skb, 4);
104 memmove(pos, pos + 4, hdr_len);
105 pos += hdr_len;
106
107 klen = 3 + wep->key_len;
108
109 wep->iv++;
110
111 /* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
112 * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
113 * can be used to speedup attacks, so avoid using them. */
114 if ((wep->iv & 0xff00) == 0xff00) {
115 u8 B = (wep->iv >> 16) & 0xff;
116 if (B >= 3 && B < klen)
117 wep->iv += 0x0100;
118 }
119
120 /* Prepend 24-bit IV to RC4 key and TX frame */
121 *pos++ = key[0] = (wep->iv >> 16) & 0xff;
122 *pos++ = key[1] = (wep->iv >> 8) & 0xff;
123 *pos++ = key[2] = wep->iv & 0xff;
124 *pos++ = wep->key_idx << 6;
125
126 /* Copy rest of the WEP key (the secret part) */
127 memcpy(key + 3, wep->key, wep->key_len);
128
129 /* Append little-endian CRC32 and encrypt it to produce ICV */
130 crc = ~crc32_le(~0, pos, len);
131 icv = skb_put(skb, 4);
132 icv[0] = crc;
133 icv[1] = crc >> 8;
134 icv[2] = crc >> 16;
135 icv[3] = crc >> 24;
136
137 crypto_cipher_setkey(wep->tfm, key, klen);
138 sg.page = virt_to_page(pos);
139 sg.offset = offset_in_page(pos);
140 sg.length = len + 4;
141 crypto_cipher_encrypt(wep->tfm, &sg, &sg, len + 4);
142
143 return 0;
144}
145
146
147/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
148 * the frame: IV (4 bytes), encrypted payload (including SNAP header),
149 * ICV (4 bytes). len includes both IV and ICV.
150 *
151 * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
152 * failure. If frame is OK, IV and ICV will be removed.
153 */
154static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
155{
156 struct prism2_wep_data *wep = priv;
157 u32 crc, klen, plen;
158 u8 key[WEP_KEY_LEN + 3];
159 u8 keyidx, *pos, icv[4];
160 struct scatterlist sg;
161
162 if (skb->len < hdr_len + 8)
163 return -1;
164
165 pos = skb->data + hdr_len;
166 key[0] = *pos++;
167 key[1] = *pos++;
168 key[2] = *pos++;
169 keyidx = *pos++ >> 6;
170 if (keyidx != wep->key_idx)
171 return -1;
172
173 klen = 3 + wep->key_len;
174
175 /* Copy rest of the WEP key (the secret part) */
176 memcpy(key + 3, wep->key, wep->key_len);
177
178 /* Apply RC4 to data and compute CRC32 over decrypted data */
179 plen = skb->len - hdr_len - 8;
180
181 crypto_cipher_setkey(wep->tfm, key, klen);
182 sg.page = virt_to_page(pos);
183 sg.offset = offset_in_page(pos);
184 sg.length = plen + 4;
185 crypto_cipher_decrypt(wep->tfm, &sg, &sg, plen + 4);
186
187 crc = ~crc32_le(~0, pos, plen);
188 icv[0] = crc;
189 icv[1] = crc >> 8;
190 icv[2] = crc >> 16;
191 icv[3] = crc >> 24;
192 if (memcmp(icv, pos + plen, 4) != 0) {
193 /* ICV mismatch - drop frame */
194 return -2;
195 }
196
197 /* Remove IV and ICV */
198 memmove(skb->data + 4, skb->data, hdr_len);
199 skb_pull(skb, 4);
200 skb_trim(skb, skb->len - 4);
201
202 return 0;
203}
204
205
206static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
207{
208 struct prism2_wep_data *wep = priv;
209
210 if (len < 0 || len > WEP_KEY_LEN)
211 return -1;
212
213 memcpy(wep->key, key, len);
214 wep->key_len = len;
215
216 return 0;
217}
218
219
220static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
221{
222 struct prism2_wep_data *wep = priv;
223
224 if (len < wep->key_len)
225 return -1;
226
227 memcpy(key, wep->key, wep->key_len);
228
229 return wep->key_len;
230}
231
232
233static char * prism2_wep_print_stats(char *p, void *priv)
234{
235 struct prism2_wep_data *wep = priv;
236 p += sprintf(p, "key[%d] alg=WEP len=%d\n",
237 wep->key_idx, wep->key_len);
238 return p;
239}
240
241
242static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
243 .name = "WEP",
244 .init = prism2_wep_init,
245 .deinit = prism2_wep_deinit,
246 .encrypt_mpdu = prism2_wep_encrypt,
247 .decrypt_mpdu = prism2_wep_decrypt,
248 .encrypt_msdu = NULL,
249 .decrypt_msdu = NULL,
250 .set_key = prism2_wep_set_key,
251 .get_key = prism2_wep_get_key,
252 .print_stats = prism2_wep_print_stats,
253 .extra_prefix_len = 4, /* IV */
254 .extra_postfix_len = 4, /* ICV */
255 .owner = THIS_MODULE,
256};
257
258
259static int __init ieee80211_crypto_wep_init(void)
260{
261 return ieee80211_register_crypto_ops(&ieee80211_crypt_wep);
262}
263
264
265static void __exit ieee80211_crypto_wep_exit(void)
266{
267 ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep);
268}
269
270
271module_init(ieee80211_crypto_wep_init);
272module_exit(ieee80211_crypto_wep_exit);
diff --git a/net/ieee80211/ieee80211_module.c b/net/ieee80211/ieee80211_module.c
new file mode 100644
index 000000000000..553acb2e93d5
--- /dev/null
+++ b/net/ieee80211/ieee80211_module.c
@@ -0,0 +1,299 @@
1/*******************************************************************************
2
3 Copyright(c) 2004 Intel Corporation. All rights reserved.
4
5 Portions of this file are based on the WEP enablement code provided by the
6 Host AP project hostap-drivers v0.1.3
7 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
8 <jkmaline@cc.hut.fi>
9 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10
11 This program is free software; you can redistribute it and/or modify it
12 under the terms of version 2 of the GNU General Public License as
13 published by the Free Software Foundation.
14
15 This program is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 more details.
19
20 You should have received a copy of the GNU General Public License along with
21 this program; if not, write to the Free Software Foundation, Inc., 59
22 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
24 The full GNU General Public License is included in this distribution in the
25 file called LICENSE.
26
27 Contact Information:
28 James P. Ketrenos <ipw2100-admin@linux.intel.com>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30
31*******************************************************************************/
32
33#include <linux/compiler.h>
34#include <linux/config.h>
35#include <linux/errno.h>
36#include <linux/if_arp.h>
37#include <linux/in6.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/netdevice.h>
43#include <linux/proc_fs.h>
44#include <linux/skbuff.h>
45#include <linux/slab.h>
46#include <linux/tcp.h>
47#include <linux/types.h>
48#include <linux/version.h>
49#include <linux/wireless.h>
50#include <linux/etherdevice.h>
51#include <asm/uaccess.h>
52#include <net/arp.h>
53
54#include <net/ieee80211.h>
55
56MODULE_DESCRIPTION("802.11 data/management/control stack");
57MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
58MODULE_LICENSE("GPL");
59
60#define DRV_NAME "ieee80211"
61
62static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
63{
64 if (ieee->networks)
65 return 0;
66
67 ieee->networks = kmalloc(
68 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network),
69 GFP_KERNEL);
70 if (!ieee->networks) {
71 printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
72 ieee->dev->name);
73 return -ENOMEM;
74 }
75
76 memset(ieee->networks, 0,
77 MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
78
79 return 0;
80}
81
82static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
83{
84 if (!ieee->networks)
85 return;
86 kfree(ieee->networks);
87 ieee->networks = NULL;
88}
89
90static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
91{
92 int i;
93
94 INIT_LIST_HEAD(&ieee->network_free_list);
95 INIT_LIST_HEAD(&ieee->network_list);
96 for (i = 0; i < MAX_NETWORK_COUNT; i++)
97 list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
98}
99
100
101struct net_device *alloc_ieee80211(int sizeof_priv)
102{
103 struct ieee80211_device *ieee;
104 struct net_device *dev;
105 int err;
106
107 IEEE80211_DEBUG_INFO("Initializing...\n");
108
109 dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
110 if (!dev) {
111 IEEE80211_ERROR("Unable to network device.\n");
112 goto failed;
113 }
114 ieee = netdev_priv(dev);
115 dev->hard_start_xmit = ieee80211_xmit;
116
117 ieee->dev = dev;
118
119 err = ieee80211_networks_allocate(ieee);
120 if (err) {
121 IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
122 err);
123 goto failed;
124 }
125 ieee80211_networks_initialize(ieee);
126
127 /* Default fragmentation threshold is maximum payload size */
128 ieee->fts = DEFAULT_FTS;
129 ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
130 ieee->open_wep = 1;
131
132 /* Default to enabling full open WEP with host based encrypt/decrypt */
133 ieee->host_encrypt = 1;
134 ieee->host_decrypt = 1;
135 ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
136
137 INIT_LIST_HEAD(&ieee->crypt_deinit_list);
138 init_timer(&ieee->crypt_deinit_timer);
139 ieee->crypt_deinit_timer.data = (unsigned long)ieee;
140 ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
141
142 spin_lock_init(&ieee->lock);
143
144 ieee->wpa_enabled = 0;
145 ieee->tkip_countermeasures = 0;
146 ieee->drop_unencrypted = 0;
147 ieee->privacy_invoked = 0;
148 ieee->ieee802_1x = 1;
149
150 return dev;
151
152 failed:
153 if (dev)
154 free_netdev(dev);
155 return NULL;
156}
157
158
159void free_ieee80211(struct net_device *dev)
160{
161 struct ieee80211_device *ieee = netdev_priv(dev);
162
163 int i;
164
165 del_timer_sync(&ieee->crypt_deinit_timer);
166 ieee80211_crypt_deinit_entries(ieee, 1);
167
168 for (i = 0; i < WEP_KEYS; i++) {
169 struct ieee80211_crypt_data *crypt = ieee->crypt[i];
170 if (crypt) {
171 if (crypt->ops) {
172 crypt->ops->deinit(crypt->priv);
173 module_put(crypt->ops->owner);
174 }
175 kfree(crypt);
176 ieee->crypt[i] = NULL;
177 }
178 }
179
180 ieee80211_networks_free(ieee);
181 free_netdev(dev);
182}
183
184#ifdef CONFIG_IEEE80211_DEBUG
185
186static int debug = 0;
187u32 ieee80211_debug_level = 0;
188struct proc_dir_entry *ieee80211_proc = NULL;
189
190static int show_debug_level(char *page, char **start, off_t offset,
191 int count, int *eof, void *data)
192{
193 return snprintf(page, count, "0x%08X\n", ieee80211_debug_level);
194}
195
196static int store_debug_level(struct file *file, const char __user *buffer,
197 unsigned long count, void *data)
198{
199 char buf[] = "0x00000000";
200 char *p = (char *)buf;
201 unsigned long val;
202
203 if (count > sizeof(buf) - 1)
204 count = sizeof(buf) - 1;
205
206 if (copy_from_user(buf, buffer, count))
207 return count;
208 buf[count] = 0;
209 /*
210 * what a FPOS... What, sscanf(buf, "%i", &val) would be too
211 * scary?
212 */
213 if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
214 p++;
215 if (p[0] == 'x' || p[0] == 'X')
216 p++;
217 val = simple_strtoul(p, &p, 16);
218 } else
219 val = simple_strtoul(p, &p, 10);
220 if (p == buf)
221 printk(KERN_INFO DRV_NAME
222 ": %s is not in hex or decimal form.\n", buf);
223 else
224 ieee80211_debug_level = val;
225
226 return strlen(buf);
227}
228
229static int __init ieee80211_init(void)
230{
231 struct proc_dir_entry *e;
232
233 ieee80211_debug_level = debug;
234 ieee80211_proc = create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
235 if (ieee80211_proc == NULL) {
236 IEEE80211_ERROR("Unable to create " DRV_NAME
237 " proc directory\n");
238 return -EIO;
239 }
240 e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
241 ieee80211_proc);
242 if (!e) {
243 remove_proc_entry(DRV_NAME, proc_net);
244 ieee80211_proc = NULL;
245 return -EIO;
246 }
247 e->read_proc = show_debug_level;
248 e->write_proc = store_debug_level;
249 e->data = NULL;
250
251 return 0;
252}
253
254static void __exit ieee80211_exit(void)
255{
256 if (ieee80211_proc) {
257 remove_proc_entry("debug_level", ieee80211_proc);
258 remove_proc_entry(DRV_NAME, proc_net);
259 ieee80211_proc = NULL;
260 }
261}
262
263#include <linux/moduleparam.h>
264module_param(debug, int, 0444);
265MODULE_PARM_DESC(debug, "debug output mask");
266
267
268module_exit(ieee80211_exit);
269module_init(ieee80211_init);
270#endif
271
272
273const char *escape_essid(const char *essid, u8 essid_len) {
274 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
275 const char *s = essid;
276 char *d = escaped;
277
278 if (ieee80211_is_empty_essid(essid, essid_len)) {
279 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
280 return escaped;
281 }
282
283 essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
284 while (essid_len--) {
285 if (*s == '\0') {
286 *d++ = '\\';
287 *d++ = '0';
288 s++;
289 } else {
290 *d++ = *s++;
291 }
292 }
293 *d = '\0';
294 return escaped;
295}
296
297EXPORT_SYMBOL(alloc_ieee80211);
298EXPORT_SYMBOL(free_ieee80211);
299EXPORT_SYMBOL(escape_essid);
diff --git a/net/ieee80211/ieee80211_rx.c b/net/ieee80211/ieee80211_rx.c
new file mode 100644
index 000000000000..d582faa6447d
--- /dev/null
+++ b/net/ieee80211/ieee80211_rx.c
@@ -0,0 +1,1189 @@
1/*
2 * Original code based Host AP (software wireless LAN access point) driver
3 * for Intersil Prism2/2.5/3 - hostap.o module, common routines
4 *
5 * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
6 * <jkmaline@cc.hut.fi>
7 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
8 * Copyright (c) 2004, Intel Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. See README and COPYING for
13 * more details.
14 */
15
16#include <linux/compiler.h>
17#include <linux/config.h>
18#include <linux/errno.h>
19#include <linux/if_arp.h>
20#include <linux/in6.h>
21#include <linux/in.h>
22#include <linux/ip.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/netdevice.h>
26#include <linux/proc_fs.h>
27#include <linux/skbuff.h>
28#include <linux/slab.h>
29#include <linux/tcp.h>
30#include <linux/types.h>
31#include <linux/version.h>
32#include <linux/wireless.h>
33#include <linux/etherdevice.h>
34#include <asm/uaccess.h>
35#include <linux/ctype.h>
36
37#include <net/ieee80211.h>
38
39static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
40 struct sk_buff *skb,
41 struct ieee80211_rx_stats *rx_stats)
42{
43 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
44 u16 fc = le16_to_cpu(hdr->frame_ctl);
45
46 skb->dev = ieee->dev;
47 skb->mac.raw = skb->data;
48 skb_pull(skb, ieee80211_get_hdrlen(fc));
49 skb->pkt_type = PACKET_OTHERHOST;
50 skb->protocol = __constant_htons(ETH_P_80211_RAW);
51 memset(skb->cb, 0, sizeof(skb->cb));
52 netif_rx(skb);
53}
54
55
56/* Called only as a tasklet (software IRQ) */
57static struct ieee80211_frag_entry *
58ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
59 unsigned int frag, u8 *src, u8 *dst)
60{
61 struct ieee80211_frag_entry *entry;
62 int i;
63
64 for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
65 entry = &ieee->frag_cache[i];
66 if (entry->skb != NULL &&
67 time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
68 IEEE80211_DEBUG_FRAG(
69 "expiring fragment cache entry "
70 "seq=%u last_frag=%u\n",
71 entry->seq, entry->last_frag);
72 dev_kfree_skb_any(entry->skb);
73 entry->skb = NULL;
74 }
75
76 if (entry->skb != NULL && entry->seq == seq &&
77 (entry->last_frag + 1 == frag || frag == -1) &&
78 memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
79 memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
80 return entry;
81 }
82
83 return NULL;
84}
85
86/* Called only as a tasklet (software IRQ) */
87static struct sk_buff *
88ieee80211_frag_cache_get(struct ieee80211_device *ieee,
89 struct ieee80211_hdr *hdr)
90{
91 struct sk_buff *skb = NULL;
92 u16 sc;
93 unsigned int frag, seq;
94 struct ieee80211_frag_entry *entry;
95
96 sc = le16_to_cpu(hdr->seq_ctl);
97 frag = WLAN_GET_SEQ_FRAG(sc);
98 seq = WLAN_GET_SEQ_SEQ(sc);
99
100 if (frag == 0) {
101 /* Reserve enough space to fit maximum frame length */
102 skb = dev_alloc_skb(ieee->dev->mtu +
103 sizeof(struct ieee80211_hdr) +
104 8 /* LLC */ +
105 2 /* alignment */ +
106 8 /* WEP */ + ETH_ALEN /* WDS */);
107 if (skb == NULL)
108 return NULL;
109
110 entry = &ieee->frag_cache[ieee->frag_next_idx];
111 ieee->frag_next_idx++;
112 if (ieee->frag_next_idx >= IEEE80211_FRAG_CACHE_LEN)
113 ieee->frag_next_idx = 0;
114
115 if (entry->skb != NULL)
116 dev_kfree_skb_any(entry->skb);
117
118 entry->first_frag_time = jiffies;
119 entry->seq = seq;
120 entry->last_frag = frag;
121 entry->skb = skb;
122 memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
123 memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
124 } else {
125 /* received a fragment of a frame for which the head fragment
126 * should have already been received */
127 entry = ieee80211_frag_cache_find(ieee, seq, frag, hdr->addr2,
128 hdr->addr1);
129 if (entry != NULL) {
130 entry->last_frag = frag;
131 skb = entry->skb;
132 }
133 }
134
135 return skb;
136}
137
138
139/* Called only as a tasklet (software IRQ) */
140static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
141 struct ieee80211_hdr *hdr)
142{
143 u16 sc;
144 unsigned int seq;
145 struct ieee80211_frag_entry *entry;
146
147 sc = le16_to_cpu(hdr->seq_ctl);
148 seq = WLAN_GET_SEQ_SEQ(sc);
149
150 entry = ieee80211_frag_cache_find(ieee, seq, -1, hdr->addr2,
151 hdr->addr1);
152
153 if (entry == NULL) {
154 IEEE80211_DEBUG_FRAG(
155 "could not invalidate fragment cache "
156 "entry (seq=%u)\n", seq);
157 return -1;
158 }
159
160 entry->skb = NULL;
161 return 0;
162}
163
164
165#ifdef NOT_YET
166/* ieee80211_rx_frame_mgtmt
167 *
168 * Responsible for handling management control frames
169 *
170 * Called by ieee80211_rx */
171static inline int
172ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
173 struct ieee80211_rx_stats *rx_stats, u16 type,
174 u16 stype)
175{
176 if (ieee->iw_mode == IW_MODE_MASTER) {
177 printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
178 ieee->dev->name);
179 return 0;
180/*
181 hostap_update_sta_ps(ieee, (struct hostap_ieee80211_hdr *)
182 skb->data);*/
183 }
184
185 if (ieee->hostapd && type == WLAN_FC_TYPE_MGMT) {
186 if (stype == WLAN_FC_STYPE_BEACON &&
187 ieee->iw_mode == IW_MODE_MASTER) {
188 struct sk_buff *skb2;
189 /* Process beacon frames also in kernel driver to
190 * update STA(AP) table statistics */
191 skb2 = skb_clone(skb, GFP_ATOMIC);
192 if (skb2)
193 hostap_rx(skb2->dev, skb2, rx_stats);
194 }
195
196 /* send management frames to the user space daemon for
197 * processing */
198 ieee->apdevstats.rx_packets++;
199 ieee->apdevstats.rx_bytes += skb->len;
200 prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
201 return 0;
202 }
203
204 if (ieee->iw_mode == IW_MODE_MASTER) {
205 if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
206 printk(KERN_DEBUG "%s: unknown management frame "
207 "(type=0x%02x, stype=0x%02x) dropped\n",
208 skb->dev->name, type, stype);
209 return -1;
210 }
211
212 hostap_rx(skb->dev, skb, rx_stats);
213 return 0;
214 }
215
216 printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
217 "received in non-Host AP mode\n", skb->dev->name);
218 return -1;
219}
220#endif
221
222
223/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
224/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
225static unsigned char rfc1042_header[] =
226{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
227/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
228static unsigned char bridge_tunnel_header[] =
229{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
230/* No encapsulation header if EtherType < 0x600 (=length) */
231
232/* Called by ieee80211_rx_frame_decrypt */
233static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
234 struct sk_buff *skb)
235{
236 struct net_device *dev = ieee->dev;
237 u16 fc, ethertype;
238 struct ieee80211_hdr *hdr;
239 u8 *pos;
240
241 if (skb->len < 24)
242 return 0;
243
244 hdr = (struct ieee80211_hdr *) skb->data;
245 fc = le16_to_cpu(hdr->frame_ctl);
246
247 /* check that the frame is unicast frame to us */
248 if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
249 IEEE80211_FCTL_TODS &&
250 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
251 memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
252 /* ToDS frame with own addr BSSID and DA */
253 } else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
254 IEEE80211_FCTL_FROMDS &&
255 memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
256 /* FromDS frame with own addr as DA */
257 } else
258 return 0;
259
260 if (skb->len < 24 + 8)
261 return 0;
262
263 /* check for port access entity Ethernet type */
264 pos = skb->data + 24;
265 ethertype = (pos[6] << 8) | pos[7];
266 if (ethertype == ETH_P_PAE)
267 return 1;
268
269 return 0;
270}
271
272/* Called only as a tasklet (software IRQ), by ieee80211_rx */
273static inline int
274ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
275 struct ieee80211_crypt_data *crypt)
276{
277 struct ieee80211_hdr *hdr;
278 int res, hdrlen;
279
280 if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
281 return 0;
282
283 hdr = (struct ieee80211_hdr *) skb->data;
284 hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
285
286#ifdef CONFIG_IEEE80211_CRYPT_TKIP
287 if (ieee->tkip_countermeasures &&
288 strcmp(crypt->ops->name, "TKIP") == 0) {
289 if (net_ratelimit()) {
290 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
291 "received packet from " MAC_FMT "\n",
292 ieee->dev->name, MAC_ARG(hdr->addr2));
293 }
294 return -1;
295 }
296#endif
297
298 atomic_inc(&crypt->refcnt);
299 res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
300 atomic_dec(&crypt->refcnt);
301 if (res < 0) {
302 IEEE80211_DEBUG_DROP(
303 "decryption failed (SA=" MAC_FMT
304 ") res=%d\n", MAC_ARG(hdr->addr2), res);
305 if (res == -2)
306 IEEE80211_DEBUG_DROP("Decryption failed ICV "
307 "mismatch (key %d)\n",
308 skb->data[hdrlen + 3] >> 6);
309 ieee->ieee_stats.rx_discards_undecryptable++;
310 return -1;
311 }
312
313 return res;
314}
315
316
317/* Called only as a tasklet (software IRQ), by ieee80211_rx */
318static inline int
319ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb,
320 int keyidx, struct ieee80211_crypt_data *crypt)
321{
322 struct ieee80211_hdr *hdr;
323 int res, hdrlen;
324
325 if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
326 return 0;
327
328 hdr = (struct ieee80211_hdr *) skb->data;
329 hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
330
331 atomic_inc(&crypt->refcnt);
332 res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
333 atomic_dec(&crypt->refcnt);
334 if (res < 0) {
335 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
336 " (SA=" MAC_FMT " keyidx=%d)\n",
337 ieee->dev->name, MAC_ARG(hdr->addr2), keyidx);
338 return -1;
339 }
340
341 return 0;
342}
343
344
345/* All received frames are sent to this function. @skb contains the frame in
346 * IEEE 802.11 format, i.e., in the format it was sent over air.
347 * This function is called only as a tasklet (software IRQ). */
348int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
349 struct ieee80211_rx_stats *rx_stats)
350{
351 struct net_device *dev = ieee->dev;
352 struct ieee80211_hdr *hdr;
353 size_t hdrlen;
354 u16 fc, type, stype, sc;
355 struct net_device_stats *stats;
356 unsigned int frag;
357 u8 *payload;
358 u16 ethertype;
359#ifdef NOT_YET
360 struct net_device *wds = NULL;
361 struct sk_buff *skb2 = NULL;
362 struct net_device *wds = NULL;
363 int frame_authorized = 0;
364 int from_assoc_ap = 0;
365 void *sta = NULL;
366#endif
367 u8 dst[ETH_ALEN];
368 u8 src[ETH_ALEN];
369 struct ieee80211_crypt_data *crypt = NULL;
370 int keyidx = 0;
371
372 hdr = (struct ieee80211_hdr *)skb->data;
373 stats = &ieee->stats;
374
375 if (skb->len < 10) {
376 printk(KERN_INFO "%s: SKB length < 10\n",
377 dev->name);
378 goto rx_dropped;
379 }
380
381 fc = le16_to_cpu(hdr->frame_ctl);
382 type = WLAN_FC_GET_TYPE(fc);
383 stype = WLAN_FC_GET_STYPE(fc);
384 sc = le16_to_cpu(hdr->seq_ctl);
385 frag = WLAN_GET_SEQ_FRAG(sc);
386 hdrlen = ieee80211_get_hdrlen(fc);
387
388#ifdef NOT_YET
389#if WIRELESS_EXT > 15
390 /* Put this code here so that we avoid duplicating it in all
391 * Rx paths. - Jean II */
392#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
393 /* If spy monitoring on */
394 if (iface->spy_data.spy_number > 0) {
395 struct iw_quality wstats;
396 wstats.level = rx_stats->signal;
397 wstats.noise = rx_stats->noise;
398 wstats.updated = 6; /* No qual value */
399 /* Update spy records */
400 wireless_spy_update(dev, hdr->addr2, &wstats);
401 }
402#endif /* IW_WIRELESS_SPY */
403#endif /* WIRELESS_EXT > 15 */
404 hostap_update_rx_stats(local->ap, hdr, rx_stats);
405#endif
406
407#if WIRELESS_EXT > 15
408 if (ieee->iw_mode == IW_MODE_MONITOR) {
409 ieee80211_monitor_rx(ieee, skb, rx_stats);
410 stats->rx_packets++;
411 stats->rx_bytes += skb->len;
412 return 1;
413 }
414#endif
415
416 if (ieee->host_decrypt) {
417 int idx = 0;
418 if (skb->len >= hdrlen + 3)
419 idx = skb->data[hdrlen + 3] >> 6;
420 crypt = ieee->crypt[idx];
421#ifdef NOT_YET
422 sta = NULL;
423
424 /* Use station specific key to override default keys if the
425 * receiver address is a unicast address ("individual RA"). If
426 * bcrx_sta_key parameter is set, station specific key is used
427 * even with broad/multicast targets (this is against IEEE
428 * 802.11, but makes it easier to use different keys with
429 * stations that do not support WEP key mapping). */
430
431 if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
432 (void) hostap_handle_sta_crypto(local, hdr, &crypt,
433 &sta);
434#endif
435
436 /* allow NULL decrypt to indicate an station specific override
437 * for default encryption */
438 if (crypt && (crypt->ops == NULL ||
439 crypt->ops->decrypt_mpdu == NULL))
440 crypt = NULL;
441
442 if (!crypt && (fc & IEEE80211_FCTL_PROTECTED)) {
443 /* This seems to be triggered by some (multicast?)
444 * frames from other than current BSS, so just drop the
445 * frames silently instead of filling system log with
446 * these reports. */
447 IEEE80211_DEBUG_DROP("Decryption failed (not set)"
448 " (SA=" MAC_FMT ")\n",
449 MAC_ARG(hdr->addr2));
450 ieee->ieee_stats.rx_discards_undecryptable++;
451 goto rx_dropped;
452 }
453 }
454
455#ifdef NOT_YET
456 if (type != WLAN_FC_TYPE_DATA) {
457 if (type == WLAN_FC_TYPE_MGMT && stype == WLAN_FC_STYPE_AUTH &&
458 fc & IEEE80211_FCTL_PROTECTED && ieee->host_decrypt &&
459 (keyidx = hostap_rx_frame_decrypt(ieee, skb, crypt)) < 0)
460 {
461 printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth "
462 "from " MAC_FMT "\n", dev->name,
463 MAC_ARG(hdr->addr2));
464 /* TODO: could inform hostapd about this so that it
465 * could send auth failure report */
466 goto rx_dropped;
467 }
468
469 if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
470 goto rx_dropped;
471 else
472 goto rx_exit;
473 }
474#endif
475
476 /* Data frame - extract src/dst addresses */
477 if (skb->len < IEEE80211_3ADDR_LEN)
478 goto rx_dropped;
479
480 switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
481 case IEEE80211_FCTL_FROMDS:
482 memcpy(dst, hdr->addr1, ETH_ALEN);
483 memcpy(src, hdr->addr3, ETH_ALEN);
484 break;
485 case IEEE80211_FCTL_TODS:
486 memcpy(dst, hdr->addr3, ETH_ALEN);
487 memcpy(src, hdr->addr2, ETH_ALEN);
488 break;
489 case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
490 if (skb->len < IEEE80211_4ADDR_LEN)
491 goto rx_dropped;
492 memcpy(dst, hdr->addr3, ETH_ALEN);
493 memcpy(src, hdr->addr4, ETH_ALEN);
494 break;
495 case 0:
496 memcpy(dst, hdr->addr1, ETH_ALEN);
497 memcpy(src, hdr->addr2, ETH_ALEN);
498 break;
499 }
500
501#ifdef NOT_YET
502 if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
503 goto rx_dropped;
504 if (wds) {
505 skb->dev = dev = wds;
506 stats = hostap_get_stats(dev);
507 }
508
509 if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
510 (fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS &&
511 ieee->stadev &&
512 memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
513 /* Frame from BSSID of the AP for which we are a client */
514 skb->dev = dev = ieee->stadev;
515 stats = hostap_get_stats(dev);
516 from_assoc_ap = 1;
517 }
518#endif
519
520 dev->last_rx = jiffies;
521
522#ifdef NOT_YET
523 if ((ieee->iw_mode == IW_MODE_MASTER ||
524 ieee->iw_mode == IW_MODE_REPEAT) &&
525 !from_assoc_ap) {
526 switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
527 wds != NULL)) {
528 case AP_RX_CONTINUE_NOT_AUTHORIZED:
529 frame_authorized = 0;
530 break;
531 case AP_RX_CONTINUE:
532 frame_authorized = 1;
533 break;
534 case AP_RX_DROP:
535 goto rx_dropped;
536 case AP_RX_EXIT:
537 goto rx_exit;
538 }
539 }
540#endif
541
542 /* Nullfunc frames may have PS-bit set, so they must be passed to
543 * hostap_handle_sta_rx() before being dropped here. */
544 if (stype != IEEE80211_STYPE_DATA &&
545 stype != IEEE80211_STYPE_DATA_CFACK &&
546 stype != IEEE80211_STYPE_DATA_CFPOLL &&
547 stype != IEEE80211_STYPE_DATA_CFACKPOLL) {
548 if (stype != IEEE80211_STYPE_NULLFUNC)
549 IEEE80211_DEBUG_DROP(
550 "RX: dropped data frame "
551 "with no data (type=0x%02x, "
552 "subtype=0x%02x, len=%d)\n",
553 type, stype, skb->len);
554 goto rx_dropped;
555 }
556
557 /* skb: hdr + (possibly fragmented, possibly encrypted) payload */
558
559 if (ieee->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
560 (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
561 goto rx_dropped;
562
563 hdr = (struct ieee80211_hdr *) skb->data;
564
565 /* skb: hdr + (possibly fragmented) plaintext payload */
566 // PR: FIXME: hostap has additional conditions in the "if" below:
567 // ieee->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
568 if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
569 int flen;
570 struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
571 IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
572
573 if (!frag_skb) {
574 IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
575 "Rx cannot get skb from fragment "
576 "cache (morefrag=%d seq=%u frag=%u)\n",
577 (fc & IEEE80211_FCTL_MOREFRAGS) != 0,
578 WLAN_GET_SEQ_SEQ(sc), frag);
579 goto rx_dropped;
580 }
581
582 flen = skb->len;
583 if (frag != 0)
584 flen -= hdrlen;
585
586 if (frag_skb->tail + flen > frag_skb->end) {
587 printk(KERN_WARNING "%s: host decrypted and "
588 "reassembled frame did not fit skb\n",
589 dev->name);
590 ieee80211_frag_cache_invalidate(ieee, hdr);
591 goto rx_dropped;
592 }
593
594 if (frag == 0) {
595 /* copy first fragment (including full headers) into
596 * beginning of the fragment cache skb */
597 memcpy(skb_put(frag_skb, flen), skb->data, flen);
598 } else {
599 /* append frame payload to the end of the fragment
600 * cache skb */
601 memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
602 flen);
603 }
604 dev_kfree_skb_any(skb);
605 skb = NULL;
606
607 if (fc & IEEE80211_FCTL_MOREFRAGS) {
608 /* more fragments expected - leave the skb in fragment
609 * cache for now; it will be delivered to upper layers
610 * after all fragments have been received */
611 goto rx_exit;
612 }
613
614 /* this was the last fragment and the frame will be
615 * delivered, so remove skb from fragment cache */
616 skb = frag_skb;
617 hdr = (struct ieee80211_hdr *) skb->data;
618 ieee80211_frag_cache_invalidate(ieee, hdr);
619 }
620
621 /* skb: hdr + (possible reassembled) full MSDU payload; possibly still
622 * encrypted/authenticated */
623 if (ieee->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
624 ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
625 goto rx_dropped;
626
627 hdr = (struct ieee80211_hdr *) skb->data;
628 if (crypt && !(fc & IEEE80211_FCTL_PROTECTED) && !ieee->open_wep) {
629 if (/*ieee->ieee802_1x &&*/
630 ieee80211_is_eapol_frame(ieee, skb)) {
631 /* pass unencrypted EAPOL frames even if encryption is
632 * configured */
633 } else {
634 IEEE80211_DEBUG_DROP(
635 "encryption configured, but RX "
636 "frame not encrypted (SA=" MAC_FMT ")\n",
637 MAC_ARG(hdr->addr2));
638 goto rx_dropped;
639 }
640 }
641
642 if (crypt && !(fc & IEEE80211_FCTL_PROTECTED) && !ieee->open_wep &&
643 !ieee80211_is_eapol_frame(ieee, skb)) {
644 IEEE80211_DEBUG_DROP(
645 "dropped unencrypted RX data "
646 "frame from " MAC_FMT
647 " (drop_unencrypted=1)\n",
648 MAC_ARG(hdr->addr2));
649 goto rx_dropped;
650 }
651
652 /* skb: hdr + (possible reassembled) full plaintext payload */
653
654 payload = skb->data + hdrlen;
655 ethertype = (payload[6] << 8) | payload[7];
656
657#ifdef NOT_YET
658 /* If IEEE 802.1X is used, check whether the port is authorized to send
659 * the received frame. */
660 if (ieee->ieee802_1x && ieee->iw_mode == IW_MODE_MASTER) {
661 if (ethertype == ETH_P_PAE) {
662 printk(KERN_DEBUG "%s: RX: IEEE 802.1X frame\n",
663 dev->name);
664 if (ieee->hostapd && ieee->apdev) {
665 /* Send IEEE 802.1X frames to the user
666 * space daemon for processing */
667 prism2_rx_80211(ieee->apdev, skb, rx_stats,
668 PRISM2_RX_MGMT);
669 ieee->apdevstats.rx_packets++;
670 ieee->apdevstats.rx_bytes += skb->len;
671 goto rx_exit;
672 }
673 } else if (!frame_authorized) {
674 printk(KERN_DEBUG "%s: dropped frame from "
675 "unauthorized port (IEEE 802.1X): "
676 "ethertype=0x%04x\n",
677 dev->name, ethertype);
678 goto rx_dropped;
679 }
680 }
681#endif
682
683 /* convert hdr + possible LLC headers into Ethernet header */
684 if (skb->len - hdrlen >= 8 &&
685 ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
686 ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
687 memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
688 /* remove RFC1042 or Bridge-Tunnel encapsulation and
689 * replace EtherType */
690 skb_pull(skb, hdrlen + SNAP_SIZE);
691 memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
692 memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
693 } else {
694 u16 len;
695 /* Leave Ethernet header part of hdr and full payload */
696 skb_pull(skb, hdrlen);
697 len = htons(skb->len);
698 memcpy(skb_push(skb, 2), &len, 2);
699 memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
700 memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
701 }
702
703#ifdef NOT_YET
704 if (wds && ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
705 IEEE80211_FCTL_TODS) &&
706 skb->len >= ETH_HLEN + ETH_ALEN) {
707 /* Non-standard frame: get addr4 from its bogus location after
708 * the payload */
709 memcpy(skb->data + ETH_ALEN,
710 skb->data + skb->len - ETH_ALEN, ETH_ALEN);
711 skb_trim(skb, skb->len - ETH_ALEN);
712 }
713#endif
714
715 stats->rx_packets++;
716 stats->rx_bytes += skb->len;
717
718#ifdef NOT_YET
719 if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
720 ieee->ap->bridge_packets) {
721 if (dst[0] & 0x01) {
722 /* copy multicast frame both to the higher layers and
723 * to the wireless media */
724 ieee->ap->bridged_multicast++;
725 skb2 = skb_clone(skb, GFP_ATOMIC);
726 if (skb2 == NULL)
727 printk(KERN_DEBUG "%s: skb_clone failed for "
728 "multicast frame\n", dev->name);
729 } else if (hostap_is_sta_assoc(ieee->ap, dst)) {
730 /* send frame directly to the associated STA using
731 * wireless media and not passing to higher layers */
732 ieee->ap->bridged_unicast++;
733 skb2 = skb;
734 skb = NULL;
735 }
736 }
737
738 if (skb2 != NULL) {
739 /* send to wireless media */
740 skb2->protocol = __constant_htons(ETH_P_802_3);
741 skb2->mac.raw = skb2->nh.raw = skb2->data;
742 /* skb2->nh.raw = skb2->data + ETH_HLEN; */
743 skb2->dev = dev;
744 dev_queue_xmit(skb2);
745 }
746
747#endif
748
749 if (skb) {
750 skb->protocol = eth_type_trans(skb, dev);
751 memset(skb->cb, 0, sizeof(skb->cb));
752 skb->dev = dev;
753 skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
754 netif_rx(skb);
755 }
756
757 rx_exit:
758#ifdef NOT_YET
759 if (sta)
760 hostap_handle_sta_release(sta);
761#endif
762 return 1;
763
764 rx_dropped:
765 stats->rx_dropped++;
766
767 /* Returning 0 indicates to caller that we have not handled the SKB--
768 * so it is still allocated and can be used again by underlying
769 * hardware as a DMA target */
770 return 0;
771}
772
773#define MGMT_FRAME_FIXED_PART_LENGTH 0x24
774
775static inline int ieee80211_is_ofdm_rate(u8 rate)
776{
777 switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
778 case IEEE80211_OFDM_RATE_6MB:
779 case IEEE80211_OFDM_RATE_9MB:
780 case IEEE80211_OFDM_RATE_12MB:
781 case IEEE80211_OFDM_RATE_18MB:
782 case IEEE80211_OFDM_RATE_24MB:
783 case IEEE80211_OFDM_RATE_36MB:
784 case IEEE80211_OFDM_RATE_48MB:
785 case IEEE80211_OFDM_RATE_54MB:
786 return 1;
787 }
788 return 0;
789}
790
791
792static inline int ieee80211_network_init(
793 struct ieee80211_device *ieee,
794 struct ieee80211_probe_response *beacon,
795 struct ieee80211_network *network,
796 struct ieee80211_rx_stats *stats)
797{
798#ifdef CONFIG_IEEE80211_DEBUG
799 char rates_str[64];
800 char *p;
801#endif
802 struct ieee80211_info_element *info_element;
803 u16 left;
804 u8 i;
805
806 /* Pull out fixed field data */
807 memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
808 network->capability = beacon->capability;
809 network->last_scanned = jiffies;
810 network->time_stamp[0] = beacon->time_stamp[0];
811 network->time_stamp[1] = beacon->time_stamp[1];
812 network->beacon_interval = beacon->beacon_interval;
813 /* Where to pull this? beacon->listen_interval;*/
814 network->listen_interval = 0x0A;
815 network->rates_len = network->rates_ex_len = 0;
816 network->last_associate = 0;
817 network->ssid_len = 0;
818 network->flags = 0;
819 network->atim_window = 0;
820
821 if (stats->freq == IEEE80211_52GHZ_BAND) {
822 /* for A band (No DS info) */
823 network->channel = stats->received_channel;
824 } else
825 network->flags |= NETWORK_HAS_CCK;
826
827 network->wpa_ie_len = 0;
828 network->rsn_ie_len = 0;
829
830 info_element = &beacon->info_element;
831 left = stats->len - ((void *)info_element - (void *)beacon);
832 while (left >= sizeof(struct ieee80211_info_element_hdr)) {
833 if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
834 IEEE80211_DEBUG_SCAN("SCAN: parse failed: info_element->len + 2 > left : info_element->len+2=%d left=%d.\n",
835 info_element->len + sizeof(struct ieee80211_info_element),
836 left);
837 return 1;
838 }
839
840 switch (info_element->id) {
841 case MFIE_TYPE_SSID:
842 if (ieee80211_is_empty_essid(info_element->data,
843 info_element->len)) {
844 network->flags |= NETWORK_EMPTY_ESSID;
845 break;
846 }
847
848 network->ssid_len = min(info_element->len,
849 (u8)IW_ESSID_MAX_SIZE);
850 memcpy(network->ssid, info_element->data, network->ssid_len);
851 if (network->ssid_len < IW_ESSID_MAX_SIZE)
852 memset(network->ssid + network->ssid_len, 0,
853 IW_ESSID_MAX_SIZE - network->ssid_len);
854
855 IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n",
856 network->ssid, network->ssid_len);
857 break;
858
859 case MFIE_TYPE_RATES:
860#ifdef CONFIG_IEEE80211_DEBUG
861 p = rates_str;
862#endif
863 network->rates_len = min(info_element->len, MAX_RATES_LENGTH);
864 for (i = 0; i < network->rates_len; i++) {
865 network->rates[i] = info_element->data[i];
866#ifdef CONFIG_IEEE80211_DEBUG
867 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
868#endif
869 if (ieee80211_is_ofdm_rate(info_element->data[i])) {
870 network->flags |= NETWORK_HAS_OFDM;
871 if (info_element->data[i] &
872 IEEE80211_BASIC_RATE_MASK)
873 network->flags &=
874 ~NETWORK_HAS_CCK;
875 }
876 }
877
878 IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES: '%s' (%d)\n",
879 rates_str, network->rates_len);
880 break;
881
882 case MFIE_TYPE_RATES_EX:
883#ifdef CONFIG_IEEE80211_DEBUG
884 p = rates_str;
885#endif
886 network->rates_ex_len = min(info_element->len, MAX_RATES_EX_LENGTH);
887 for (i = 0; i < network->rates_ex_len; i++) {
888 network->rates_ex[i] = info_element->data[i];
889#ifdef CONFIG_IEEE80211_DEBUG
890 p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
891#endif
892 if (ieee80211_is_ofdm_rate(info_element->data[i])) {
893 network->flags |= NETWORK_HAS_OFDM;
894 if (info_element->data[i] &
895 IEEE80211_BASIC_RATE_MASK)
896 network->flags &=
897 ~NETWORK_HAS_CCK;
898 }
899 }
900
901 IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
902 rates_str, network->rates_ex_len);
903 break;
904
905 case MFIE_TYPE_DS_SET:
906 IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n",
907 info_element->data[0]);
908 if (stats->freq == IEEE80211_24GHZ_BAND)
909 network->channel = info_element->data[0];
910 break;
911
912 case MFIE_TYPE_FH_SET:
913 IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n");
914 break;
915
916 case MFIE_TYPE_CF_SET:
917 IEEE80211_DEBUG_SCAN("MFIE_TYPE_CF_SET: ignored\n");
918 break;
919
920 case MFIE_TYPE_TIM:
921 IEEE80211_DEBUG_SCAN("MFIE_TYPE_TIM: ignored\n");
922 break;
923
924 case MFIE_TYPE_IBSS_SET:
925 IEEE80211_DEBUG_SCAN("MFIE_TYPE_IBSS_SET: ignored\n");
926 break;
927
928 case MFIE_TYPE_CHALLENGE:
929 IEEE80211_DEBUG_SCAN("MFIE_TYPE_CHALLENGE: ignored\n");
930 break;
931
932 case MFIE_TYPE_GENERIC:
933 IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n",
934 info_element->len);
935 if (info_element->len >= 4 &&
936 info_element->data[0] == 0x00 &&
937 info_element->data[1] == 0x50 &&
938 info_element->data[2] == 0xf2 &&
939 info_element->data[3] == 0x01) {
940 network->wpa_ie_len = min(info_element->len + 2,
941 MAX_WPA_IE_LEN);
942 memcpy(network->wpa_ie, info_element,
943 network->wpa_ie_len);
944 }
945 break;
946
947 case MFIE_TYPE_RSN:
948 IEEE80211_DEBUG_SCAN("MFIE_TYPE_RSN: %d bytes\n",
949 info_element->len);
950 network->rsn_ie_len = min(info_element->len + 2,
951 MAX_WPA_IE_LEN);
952 memcpy(network->rsn_ie, info_element,
953 network->rsn_ie_len);
954 break;
955
956 default:
957 IEEE80211_DEBUG_SCAN("unsupported IE %d\n",
958 info_element->id);
959 break;
960 }
961
962 left -= sizeof(struct ieee80211_info_element_hdr) +
963 info_element->len;
964 info_element = (struct ieee80211_info_element *)
965 &info_element->data[info_element->len];
966 }
967
968 network->mode = 0;
969 if (stats->freq == IEEE80211_52GHZ_BAND)
970 network->mode = IEEE_A;
971 else {
972 if (network->flags & NETWORK_HAS_OFDM)
973 network->mode |= IEEE_G;
974 if (network->flags & NETWORK_HAS_CCK)
975 network->mode |= IEEE_B;
976 }
977
978 if (network->mode == 0) {
979 IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' "
980 "network.\n",
981 escape_essid(network->ssid,
982 network->ssid_len),
983 MAC_ARG(network->bssid));
984 return 1;
985 }
986
987 if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
988 network->flags |= NETWORK_EMPTY_ESSID;
989
990 memcpy(&network->stats, stats, sizeof(network->stats));
991
992 return 0;
993}
994
995static inline int is_same_network(struct ieee80211_network *src,
996 struct ieee80211_network *dst)
997{
998 /* A network is only a duplicate if the channel, BSSID, and ESSID
999 * all match. We treat all <hidden> with the same BSSID and channel
1000 * as one network */
1001 return ((src->ssid_len == dst->ssid_len) &&
1002 (src->channel == dst->channel) &&
1003 !memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
1004 !memcmp(src->ssid, dst->ssid, src->ssid_len));
1005}
1006
1007static inline void update_network(struct ieee80211_network *dst,
1008 struct ieee80211_network *src)
1009{
1010 memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
1011 dst->capability = src->capability;
1012 memcpy(dst->rates, src->rates, src->rates_len);
1013 dst->rates_len = src->rates_len;
1014 memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
1015 dst->rates_ex_len = src->rates_ex_len;
1016
1017 dst->mode = src->mode;
1018 dst->flags = src->flags;
1019 dst->time_stamp[0] = src->time_stamp[0];
1020 dst->time_stamp[1] = src->time_stamp[1];
1021
1022 dst->beacon_interval = src->beacon_interval;
1023 dst->listen_interval = src->listen_interval;
1024 dst->atim_window = src->atim_window;
1025
1026 memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
1027 dst->wpa_ie_len = src->wpa_ie_len;
1028 memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
1029 dst->rsn_ie_len = src->rsn_ie_len;
1030
1031 dst->last_scanned = jiffies;
1032 /* dst->last_associate is not overwritten */
1033}
1034
1035static inline void ieee80211_process_probe_response(
1036 struct ieee80211_device *ieee,
1037 struct ieee80211_probe_response *beacon,
1038 struct ieee80211_rx_stats *stats)
1039{
1040 struct ieee80211_network network;
1041 struct ieee80211_network *target;
1042 struct ieee80211_network *oldest = NULL;
1043#ifdef CONFIG_IEEE80211_DEBUG
1044 struct ieee80211_info_element *info_element = &beacon->info_element;
1045#endif
1046 unsigned long flags;
1047
1048 IEEE80211_DEBUG_SCAN(
1049 "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
1050 escape_essid(info_element->data, info_element->len),
1051 MAC_ARG(beacon->header.addr3),
1052 (beacon->capability & (1<<0xf)) ? '1' : '0',
1053 (beacon->capability & (1<<0xe)) ? '1' : '0',
1054 (beacon->capability & (1<<0xd)) ? '1' : '0',
1055 (beacon->capability & (1<<0xc)) ? '1' : '0',
1056 (beacon->capability & (1<<0xb)) ? '1' : '0',
1057 (beacon->capability & (1<<0xa)) ? '1' : '0',
1058 (beacon->capability & (1<<0x9)) ? '1' : '0',
1059 (beacon->capability & (1<<0x8)) ? '1' : '0',
1060 (beacon->capability & (1<<0x7)) ? '1' : '0',
1061 (beacon->capability & (1<<0x6)) ? '1' : '0',
1062 (beacon->capability & (1<<0x5)) ? '1' : '0',
1063 (beacon->capability & (1<<0x4)) ? '1' : '0',
1064 (beacon->capability & (1<<0x3)) ? '1' : '0',
1065 (beacon->capability & (1<<0x2)) ? '1' : '0',
1066 (beacon->capability & (1<<0x1)) ? '1' : '0',
1067 (beacon->capability & (1<<0x0)) ? '1' : '0');
1068
1069 if (ieee80211_network_init(ieee, beacon, &network, stats)) {
1070 IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n",
1071 escape_essid(info_element->data,
1072 info_element->len),
1073 MAC_ARG(beacon->header.addr3),
1074 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1075 IEEE80211_STYPE_PROBE_RESP ?
1076 "PROBE RESPONSE" : "BEACON");
1077 return;
1078 }
1079
1080 /* The network parsed correctly -- so now we scan our known networks
1081 * to see if we can find it in our list.
1082 *
1083 * NOTE: This search is definitely not optimized. Once its doing
1084 * the "right thing" we'll optimize it for efficiency if
1085 * necessary */
1086
1087 /* Search for this entry in the list and update it if it is
1088 * already there. */
1089
1090 spin_lock_irqsave(&ieee->lock, flags);
1091
1092 list_for_each_entry(target, &ieee->network_list, list) {
1093 if (is_same_network(target, &network))
1094 break;
1095
1096 if ((oldest == NULL) ||
1097 (target->last_scanned < oldest->last_scanned))
1098 oldest = target;
1099 }
1100
1101 /* If we didn't find a match, then get a new network slot to initialize
1102 * with this beacon's information */
1103 if (&target->list == &ieee->network_list) {
1104 if (list_empty(&ieee->network_free_list)) {
1105 /* If there are no more slots, expire the oldest */
1106 list_del(&oldest->list);
1107 target = oldest;
1108 IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from "
1109 "network list.\n",
1110 escape_essid(target->ssid,
1111 target->ssid_len),
1112 MAC_ARG(target->bssid));
1113 } else {
1114 /* Otherwise just pull from the free list */
1115 target = list_entry(ieee->network_free_list.next,
1116 struct ieee80211_network, list);
1117 list_del(ieee->network_free_list.next);
1118 }
1119
1120
1121#ifdef CONFIG_IEEE80211_DEBUG
1122 IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n",
1123 escape_essid(network.ssid,
1124 network.ssid_len),
1125 MAC_ARG(network.bssid),
1126 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1127 IEEE80211_STYPE_PROBE_RESP ?
1128 "PROBE RESPONSE" : "BEACON");
1129#endif
1130 memcpy(target, &network, sizeof(*target));
1131 list_add_tail(&target->list, &ieee->network_list);
1132 } else {
1133 IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
1134 escape_essid(target->ssid,
1135 target->ssid_len),
1136 MAC_ARG(target->bssid),
1137 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1138 IEEE80211_STYPE_PROBE_RESP ?
1139 "PROBE RESPONSE" : "BEACON");
1140 update_network(target, &network);
1141 }
1142
1143 spin_unlock_irqrestore(&ieee->lock, flags);
1144}
1145
1146void ieee80211_rx_mgt(struct ieee80211_device *ieee,
1147 struct ieee80211_hdr *header,
1148 struct ieee80211_rx_stats *stats)
1149{
1150 switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
1151 case IEEE80211_STYPE_ASSOC_RESP:
1152 IEEE80211_DEBUG_MGMT("received ASSOCIATION RESPONSE (%d)\n",
1153 WLAN_FC_GET_STYPE(header->frame_ctl));
1154 break;
1155
1156 case IEEE80211_STYPE_REASSOC_RESP:
1157 IEEE80211_DEBUG_MGMT("received REASSOCIATION RESPONSE (%d)\n",
1158 WLAN_FC_GET_STYPE(header->frame_ctl));
1159 break;
1160
1161 case IEEE80211_STYPE_PROBE_RESP:
1162 IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
1163 WLAN_FC_GET_STYPE(header->frame_ctl));
1164 IEEE80211_DEBUG_SCAN("Probe response\n");
1165 ieee80211_process_probe_response(
1166 ieee, (struct ieee80211_probe_response *)header, stats);
1167 break;
1168
1169 case IEEE80211_STYPE_BEACON:
1170 IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
1171 WLAN_FC_GET_STYPE(header->frame_ctl));
1172 IEEE80211_DEBUG_SCAN("Beacon\n");
1173 ieee80211_process_probe_response(
1174 ieee, (struct ieee80211_probe_response *)header, stats);
1175 break;
1176
1177 default:
1178 IEEE80211_DEBUG_MGMT("received UNKNOWN (%d)\n",
1179 WLAN_FC_GET_STYPE(header->frame_ctl));
1180 IEEE80211_WARNING("%s: Unknown management packet: %d\n",
1181 ieee->dev->name,
1182 WLAN_FC_GET_STYPE(header->frame_ctl));
1183 break;
1184 }
1185}
1186
1187
1188EXPORT_SYMBOL(ieee80211_rx_mgt);
1189EXPORT_SYMBOL(ieee80211_rx);
diff --git a/net/ieee80211/ieee80211_tx.c b/net/ieee80211/ieee80211_tx.c
new file mode 100644
index 000000000000..b7ea3e25e25d
--- /dev/null
+++ b/net/ieee80211/ieee80211_tx.c
@@ -0,0 +1,438 @@
1/******************************************************************************
2
3 Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************/
26#include <linux/compiler.h>
27#include <linux/config.h>
28#include <linux/errno.h>
29#include <linux/if_arp.h>
30#include <linux/in6.h>
31#include <linux/in.h>
32#include <linux/ip.h>
33#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/netdevice.h>
36#include <linux/proc_fs.h>
37#include <linux/skbuff.h>
38#include <linux/slab.h>
39#include <linux/tcp.h>
40#include <linux/types.h>
41#include <linux/version.h>
42#include <linux/wireless.h>
43#include <linux/etherdevice.h>
44#include <asm/uaccess.h>
45
46#include <net/ieee80211.h>
47
48
49/*
50
51
52802.11 Data Frame
53
54 ,-------------------------------------------------------------------.
55Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 |
56 |------|------|---------|---------|---------|------|---------|------|
57Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
58 | | tion | (BSSID) | | | ence | data | |
59 `--------------------------------------------------| |------'
60Total: 28 non-data bytes `----.----'
61 |
62 .- 'Frame data' expands to <---------------------------'
63 |
64 V
65 ,---------------------------------------------------.
66Bytes | 1 | 1 | 1 | 3 | 2 | 0-2304 |
67 |------|------|---------|----------|------|---------|
68Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
69 | DSAP | SSAP | | | | Packet |
70 | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
71 `-----------------------------------------| |
72Total: 8 non-data bytes `----.----'
73 |
74 .- 'IP Packet' expands, if WEP enabled, to <--'
75 |
76 V
77 ,-----------------------.
78Bytes | 4 | 0-2296 | 4 |
79 |-----|-----------|-----|
80Desc. | IV | Encrypted | ICV |
81 | | IP Packet | |
82 `-----------------------'
83Total: 8 non-data bytes
84
85
86802.3 Ethernet Data Frame
87
88 ,-----------------------------------------.
89Bytes | 6 | 6 | 2 | Variable | 4 |
90 |-------|-------|------|-----------|------|
91Desc. | Dest. | Source| Type | IP Packet | fcs |
92 | MAC | MAC | | | |
93 `-----------------------------------------'
94Total: 18 non-data bytes
95
96In the event that fragmentation is required, the incoming payload is split into
97N parts of size ieee->fts. The first fragment contains the SNAP header and the
98remaining packets are just data.
99
100If encryption is enabled, each fragment payload size is reduced by enough space
101to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
102So if you have 1500 bytes of payload with ieee->fts set to 500 without
103encryption it will take 3 frames. With WEP it will take 4 frames as the
104payload of each frame is reduced to 492 bytes.
105
106* SKB visualization
107*
108* ,- skb->data
109* |
110* | ETHERNET HEADER ,-<-- PAYLOAD
111* | | 14 bytes from skb->data
112* | 2 bytes for Type --> ,T. | (sizeof ethhdr)
113* | | | |
114* |,-Dest.--. ,--Src.---. | | |
115* | 6 bytes| | 6 bytes | | | |
116* v | | | | | |
117* 0 | v 1 | v | v 2
118* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
119* ^ | ^ | ^ |
120* | | | | | |
121* | | | | `T' <---- 2 bytes for Type
122* | | | |
123* | | '---SNAP--' <-------- 6 bytes for SNAP
124* | |
125* `-IV--' <-------------------- 4 bytes for IV (WEP)
126*
127* SNAP HEADER
128*
129*/
130
131static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
132static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
133
134static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
135{
136 struct ieee80211_snap_hdr *snap;
137 u8 *oui;
138
139 snap = (struct ieee80211_snap_hdr *)data;
140 snap->dsap = 0xaa;
141 snap->ssap = 0xaa;
142 snap->ctrl = 0x03;
143
144 if (h_proto == 0x8137 || h_proto == 0x80f3)
145 oui = P802_1H_OUI;
146 else
147 oui = RFC1042_OUI;
148 snap->oui[0] = oui[0];
149 snap->oui[1] = oui[1];
150 snap->oui[2] = oui[2];
151
152 *(u16 *)(data + SNAP_SIZE) = htons(h_proto);
153
154 return SNAP_SIZE + sizeof(u16);
155}
156
157static inline int ieee80211_encrypt_fragment(
158 struct ieee80211_device *ieee,
159 struct sk_buff *frag,
160 int hdr_len)
161{
162 struct ieee80211_crypt_data* crypt = ieee->crypt[ieee->tx_keyidx];
163 int res;
164
165#ifdef CONFIG_IEEE80211_CRYPT_TKIP
166 struct ieee80211_hdr *header;
167
168 if (ieee->tkip_countermeasures &&
169 crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
170 header = (struct ieee80211_hdr *) frag->data;
171 if (net_ratelimit()) {
172 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
173 "TX packet to " MAC_FMT "\n",
174 ieee->dev->name, MAC_ARG(header->addr1));
175 }
176 return -1;
177 }
178#endif
179 /* To encrypt, frame format is:
180 * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
181
182 // PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU encryption.
183 /* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
184 * call both MSDU and MPDU encryption functions from here. */
185 atomic_inc(&crypt->refcnt);
186 res = 0;
187 if (crypt->ops->encrypt_msdu)
188 res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
189 if (res == 0 && crypt->ops->encrypt_mpdu)
190 res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
191
192 atomic_dec(&crypt->refcnt);
193 if (res < 0) {
194 printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
195 ieee->dev->name, frag->len);
196 ieee->ieee_stats.tx_discards++;
197 return -1;
198 }
199
200 return 0;
201}
202
203
204void ieee80211_txb_free(struct ieee80211_txb *txb) {
205 int i;
206 if (unlikely(!txb))
207 return;
208 for (i = 0; i < txb->nr_frags; i++)
209 if (txb->fragments[i])
210 dev_kfree_skb_any(txb->fragments[i]);
211 kfree(txb);
212}
213
214static struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
215 int gfp_mask)
216{
217 struct ieee80211_txb *txb;
218 int i;
219 txb = kmalloc(
220 sizeof(struct ieee80211_txb) + (sizeof(u8*) * nr_frags),
221 gfp_mask);
222 if (!txb)
223 return NULL;
224
225 memset(txb, 0, sizeof(struct ieee80211_txb));
226 txb->nr_frags = nr_frags;
227 txb->frag_size = txb_size;
228
229 for (i = 0; i < nr_frags; i++) {
230 txb->fragments[i] = dev_alloc_skb(txb_size);
231 if (unlikely(!txb->fragments[i])) {
232 i--;
233 break;
234 }
235 }
236 if (unlikely(i != nr_frags)) {
237 while (i >= 0)
238 dev_kfree_skb_any(txb->fragments[i--]);
239 kfree(txb);
240 return NULL;
241 }
242 return txb;
243}
244
245/* SKBs are added to the ieee->tx_queue. */
246int ieee80211_xmit(struct sk_buff *skb,
247 struct net_device *dev)
248{
249 struct ieee80211_device *ieee = netdev_priv(dev);
250 struct ieee80211_txb *txb = NULL;
251 struct ieee80211_hdr *frag_hdr;
252 int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
253 unsigned long flags;
254 struct net_device_stats *stats = &ieee->stats;
255 int ether_type, encrypt;
256 int bytes, fc, hdr_len;
257 struct sk_buff *skb_frag;
258 struct ieee80211_hdr header = { /* Ensure zero initialized */
259 .duration_id = 0,
260 .seq_ctl = 0
261 };
262 u8 dest[ETH_ALEN], src[ETH_ALEN];
263
264 struct ieee80211_crypt_data* crypt;
265
266 spin_lock_irqsave(&ieee->lock, flags);
267
268 /* If there is no driver handler to take the TXB, dont' bother
269 * creating it... */
270 if (!ieee->hard_start_xmit) {
271 printk(KERN_WARNING "%s: No xmit handler.\n",
272 ieee->dev->name);
273 goto success;
274 }
275
276 if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
277 printk(KERN_WARNING "%s: skb too small (%d).\n",
278 ieee->dev->name, skb->len);
279 goto success;
280 }
281
282 ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
283
284 crypt = ieee->crypt[ieee->tx_keyidx];
285
286 encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
287 ieee->host_encrypt && crypt && crypt->ops;
288
289 if (!encrypt && ieee->ieee802_1x &&
290 ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
291 stats->tx_dropped++;
292 goto success;
293 }
294
295 /* Save source and destination addresses */
296 memcpy(&dest, skb->data, ETH_ALEN);
297 memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN);
298
299 /* Advance the SKB to the start of the payload */
300 skb_pull(skb, sizeof(struct ethhdr));
301
302 /* Determine total amount of storage required for TXB packets */
303 bytes = skb->len + SNAP_SIZE + sizeof(u16);
304
305 if (encrypt)
306 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA |
307 IEEE80211_FCTL_PROTECTED;
308 else
309 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA;
310
311 if (ieee->iw_mode == IW_MODE_INFRA) {
312 fc |= IEEE80211_FCTL_TODS;
313 /* To DS: Addr1 = BSSID, Addr2 = SA,
314 Addr3 = DA */
315 memcpy(&header.addr1, ieee->bssid, ETH_ALEN);
316 memcpy(&header.addr2, &src, ETH_ALEN);
317 memcpy(&header.addr3, &dest, ETH_ALEN);
318 } else if (ieee->iw_mode == IW_MODE_ADHOC) {
319 /* not From/To DS: Addr1 = DA, Addr2 = SA,
320 Addr3 = BSSID */
321 memcpy(&header.addr1, dest, ETH_ALEN);
322 memcpy(&header.addr2, src, ETH_ALEN);
323 memcpy(&header.addr3, ieee->bssid, ETH_ALEN);
324 }
325 header.frame_ctl = cpu_to_le16(fc);
326 hdr_len = IEEE80211_3ADDR_LEN;
327
328 /* Determine fragmentation size based on destination (multicast
329 * and broadcast are not fragmented) */
330 if (is_multicast_ether_addr(dest) ||
331 is_broadcast_ether_addr(dest))
332 frag_size = MAX_FRAG_THRESHOLD;
333 else
334 frag_size = ieee->fts;
335
336 /* Determine amount of payload per fragment. Regardless of if
337 * this stack is providing the full 802.11 header, one will
338 * eventually be affixed to this fragment -- so we must account for
339 * it when determining the amount of payload space. */
340 bytes_per_frag = frag_size - IEEE80211_3ADDR_LEN;
341 if (ieee->config &
342 (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
343 bytes_per_frag -= IEEE80211_FCS_LEN;
344
345 /* Each fragment may need to have room for encryptiong pre/postfix */
346 if (encrypt)
347 bytes_per_frag -= crypt->ops->extra_prefix_len +
348 crypt->ops->extra_postfix_len;
349
350 /* Number of fragments is the total bytes_per_frag /
351 * payload_per_fragment */
352 nr_frags = bytes / bytes_per_frag;
353 bytes_last_frag = bytes % bytes_per_frag;
354 if (bytes_last_frag)
355 nr_frags++;
356 else
357 bytes_last_frag = bytes_per_frag;
358
359 /* When we allocate the TXB we allocate enough space for the reserve
360 * and full fragment bytes (bytes_per_frag doesn't include prefix,
361 * postfix, header, FCS, etc.) */
362 txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
363 if (unlikely(!txb)) {
364 printk(KERN_WARNING "%s: Could not allocate TXB\n",
365 ieee->dev->name);
366 goto failed;
367 }
368 txb->encrypted = encrypt;
369 txb->payload_size = bytes;
370
371 for (i = 0; i < nr_frags; i++) {
372 skb_frag = txb->fragments[i];
373
374 if (encrypt)
375 skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
376
377 frag_hdr = (struct ieee80211_hdr *)skb_put(skb_frag, hdr_len);
378 memcpy(frag_hdr, &header, hdr_len);
379
380 /* If this is not the last fragment, then add the MOREFRAGS
381 * bit to the frame control */
382 if (i != nr_frags - 1) {
383 frag_hdr->frame_ctl = cpu_to_le16(
384 fc | IEEE80211_FCTL_MOREFRAGS);
385 bytes = bytes_per_frag;
386 } else {
387 /* The last fragment takes the remaining length */
388 bytes = bytes_last_frag;
389 }
390
391 /* Put a SNAP header on the first fragment */
392 if (i == 0) {
393 ieee80211_put_snap(
394 skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
395 ether_type);
396 bytes -= SNAP_SIZE + sizeof(u16);
397 }
398
399 memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
400
401 /* Advance the SKB... */
402 skb_pull(skb, bytes);
403
404 /* Encryption routine will move the header forward in order
405 * to insert the IV between the header and the payload */
406 if (encrypt)
407 ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
408 if (ieee->config &
409 (CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
410 skb_put(skb_frag, 4);
411 }
412
413
414 success:
415 spin_unlock_irqrestore(&ieee->lock, flags);
416
417 dev_kfree_skb_any(skb);
418
419 if (txb) {
420 if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
421 stats->tx_packets++;
422 stats->tx_bytes += txb->payload_size;
423 return 0;
424 }
425 ieee80211_txb_free(txb);
426 }
427
428 return 0;
429
430 failed:
431 spin_unlock_irqrestore(&ieee->lock, flags);
432 netif_stop_queue(dev);
433 stats->tx_errors++;
434 return 1;
435
436}
437
438EXPORT_SYMBOL(ieee80211_txb_free);
diff --git a/net/ieee80211/ieee80211_wx.c b/net/ieee80211/ieee80211_wx.c
new file mode 100644
index 000000000000..2cd571c525a9
--- /dev/null
+++ b/net/ieee80211/ieee80211_wx.c
@@ -0,0 +1,471 @@
1/******************************************************************************
2
3 Copyright(c) 2004 Intel Corporation. All rights reserved.
4
5 Portions of this file are based on the WEP enablement code provided by the
6 Host AP project hostap-drivers v0.1.3
7 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
8 <jkmaline@cc.hut.fi>
9 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
10
11 This program is free software; you can redistribute it and/or modify it
12 under the terms of version 2 of the GNU General Public License as
13 published by the Free Software Foundation.
14
15 This program is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 more details.
19
20 You should have received a copy of the GNU General Public License along with
21 this program; if not, write to the Free Software Foundation, Inc., 59
22 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23
24 The full GNU General Public License is included in this distribution in the
25 file called LICENSE.
26
27 Contact Information:
28 James P. Ketrenos <ipw2100-admin@linux.intel.com>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30
31******************************************************************************/
32#include <linux/wireless.h>
33#include <linux/version.h>
34#include <linux/kmod.h>
35#include <linux/module.h>
36
37#include <net/ieee80211.h>
38static const char *ieee80211_modes[] = {
39 "?", "a", "b", "ab", "g", "ag", "bg", "abg"
40};
41
42#define MAX_CUSTOM_LEN 64
43static inline char *ipw2100_translate_scan(struct ieee80211_device *ieee,
44 char *start, char *stop,
45 struct ieee80211_network *network)
46{
47 char custom[MAX_CUSTOM_LEN];
48 char *p;
49 struct iw_event iwe;
50 int i, j;
51 u8 max_rate, rate;
52
53 /* First entry *MUST* be the AP MAC address */
54 iwe.cmd = SIOCGIWAP;
55 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
56 memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
57 start = iwe_stream_add_event(start, stop, &iwe, IW_EV_ADDR_LEN);
58
59 /* Remaining entries will be displayed in the order we provide them */
60
61 /* Add the ESSID */
62 iwe.cmd = SIOCGIWESSID;
63 iwe.u.data.flags = 1;
64 if (network->flags & NETWORK_EMPTY_ESSID) {
65 iwe.u.data.length = sizeof("<hidden>");
66 start = iwe_stream_add_point(start, stop, &iwe, "<hidden>");
67 } else {
68 iwe.u.data.length = min(network->ssid_len, (u8)32);
69 start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
70 }
71
72 /* Add the protocol name */
73 iwe.cmd = SIOCGIWNAME;
74 snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11%s", ieee80211_modes[network->mode]);
75 start = iwe_stream_add_event(start, stop, &iwe, IW_EV_CHAR_LEN);
76
77 /* Add mode */
78 iwe.cmd = SIOCGIWMODE;
79 if (network->capability &
80 (WLAN_CAPABILITY_ESS | WLAN_CAPABILITY_IBSS)) {
81 if (network->capability & WLAN_CAPABILITY_ESS)
82 iwe.u.mode = IW_MODE_MASTER;
83 else
84 iwe.u.mode = IW_MODE_ADHOC;
85
86 start = iwe_stream_add_event(start, stop, &iwe,
87 IW_EV_UINT_LEN);
88 }
89
90 /* Add frequency/channel */
91 iwe.cmd = SIOCGIWFREQ;
92/* iwe.u.freq.m = ieee80211_frequency(network->channel, network->mode);
93 iwe.u.freq.e = 3; */
94 iwe.u.freq.m = network->channel;
95 iwe.u.freq.e = 0;
96 iwe.u.freq.i = 0;
97 start = iwe_stream_add_event(start, stop, &iwe, IW_EV_FREQ_LEN);
98
99 /* Add encryption capability */
100 iwe.cmd = SIOCGIWENCODE;
101 if (network->capability & WLAN_CAPABILITY_PRIVACY)
102 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
103 else
104 iwe.u.data.flags = IW_ENCODE_DISABLED;
105 iwe.u.data.length = 0;
106 start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
107
108 /* Add basic and extended rates */
109 max_rate = 0;
110 p = custom;
111 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
112 for (i = 0, j = 0; i < network->rates_len; ) {
113 if (j < network->rates_ex_len &&
114 ((network->rates_ex[j] & 0x7F) <
115 (network->rates[i] & 0x7F)))
116 rate = network->rates_ex[j++] & 0x7F;
117 else
118 rate = network->rates[i++] & 0x7F;
119 if (rate > max_rate)
120 max_rate = rate;
121 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
122 "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
123 }
124 for (; j < network->rates_ex_len; j++) {
125 rate = network->rates_ex[j] & 0x7F;
126 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
127 "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
128 if (rate > max_rate)
129 max_rate = rate;
130 }
131
132 iwe.cmd = SIOCGIWRATE;
133 iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
134 iwe.u.bitrate.value = max_rate * 500000;
135 start = iwe_stream_add_event(start, stop, &iwe,
136 IW_EV_PARAM_LEN);
137
138 iwe.cmd = IWEVCUSTOM;
139 iwe.u.data.length = p - custom;
140 if (iwe.u.data.length)
141 start = iwe_stream_add_point(start, stop, &iwe, custom);
142
143 /* Add quality statistics */
144 /* TODO: Fix these values... */
145 iwe.cmd = IWEVQUAL;
146 iwe.u.qual.qual = network->stats.signal;
147 iwe.u.qual.level = network->stats.rssi;
148 iwe.u.qual.noise = network->stats.noise;
149 iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK;
150 if (!(network->stats.mask & IEEE80211_STATMASK_RSSI))
151 iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
152 if (!(network->stats.mask & IEEE80211_STATMASK_NOISE))
153 iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
154 if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL))
155 iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
156
157 start = iwe_stream_add_event(start, stop, &iwe, IW_EV_QUAL_LEN);
158
159 iwe.cmd = IWEVCUSTOM;
160 p = custom;
161
162 iwe.u.data.length = p - custom;
163 if (iwe.u.data.length)
164 start = iwe_stream_add_point(start, stop, &iwe, custom);
165
166 if (ieee->wpa_enabled && network->wpa_ie_len){
167 char buf[MAX_WPA_IE_LEN * 2 + 30];
168
169 u8 *p = buf;
170 p += sprintf(p, "wpa_ie=");
171 for (i = 0; i < network->wpa_ie_len; i++) {
172 p += sprintf(p, "%02x", network->wpa_ie[i]);
173 }
174
175 memset(&iwe, 0, sizeof(iwe));
176 iwe.cmd = IWEVCUSTOM;
177 iwe.u.data.length = strlen(buf);
178 start = iwe_stream_add_point(start, stop, &iwe, buf);
179 }
180
181 if (ieee->wpa_enabled && network->rsn_ie_len){
182 char buf[MAX_WPA_IE_LEN * 2 + 30];
183
184 u8 *p = buf;
185 p += sprintf(p, "rsn_ie=");
186 for (i = 0; i < network->rsn_ie_len; i++) {
187 p += sprintf(p, "%02x", network->rsn_ie[i]);
188 }
189
190 memset(&iwe, 0, sizeof(iwe));
191 iwe.cmd = IWEVCUSTOM;
192 iwe.u.data.length = strlen(buf);
193 start = iwe_stream_add_point(start, stop, &iwe, buf);
194 }
195
196 /* Add EXTRA: Age to display seconds since last beacon/probe response
197 * for given network. */
198 iwe.cmd = IWEVCUSTOM;
199 p = custom;
200 p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
201 " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
202 iwe.u.data.length = p - custom;
203 if (iwe.u.data.length)
204 start = iwe_stream_add_point(start, stop, &iwe, custom);
205
206
207 return start;
208}
209
210int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
211 struct iw_request_info *info,
212 union iwreq_data *wrqu, char *extra)
213{
214 struct ieee80211_network *network;
215 unsigned long flags;
216
217 char *ev = extra;
218 char *stop = ev + IW_SCAN_MAX_DATA;
219 int i = 0;
220
221 IEEE80211_DEBUG_WX("Getting scan\n");
222
223 spin_lock_irqsave(&ieee->lock, flags);
224
225 list_for_each_entry(network, &ieee->network_list, list) {
226 i++;
227 if (ieee->scan_age == 0 ||
228 time_after(network->last_scanned + ieee->scan_age, jiffies))
229 ev = ipw2100_translate_scan(ieee, ev, stop, network);
230 else
231 IEEE80211_DEBUG_SCAN(
232 "Not showing network '%s ("
233 MAC_FMT ")' due to age (%lums).\n",
234 escape_essid(network->ssid,
235 network->ssid_len),
236 MAC_ARG(network->bssid),
237 (jiffies - network->last_scanned) / (HZ / 100));
238 }
239
240 spin_unlock_irqrestore(&ieee->lock, flags);
241
242 wrqu->data.length = ev - extra;
243 wrqu->data.flags = 0;
244
245 IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
246
247 return 0;
248}
249
250int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
251 struct iw_request_info *info,
252 union iwreq_data *wrqu, char *keybuf)
253{
254 struct iw_point *erq = &(wrqu->encoding);
255 struct net_device *dev = ieee->dev;
256 struct ieee80211_security sec = {
257 .flags = 0
258 };
259 int i, key, key_provided, len;
260 struct ieee80211_crypt_data **crypt;
261
262 IEEE80211_DEBUG_WX("SET_ENCODE\n");
263
264 key = erq->flags & IW_ENCODE_INDEX;
265 if (key) {
266 if (key > WEP_KEYS)
267 return -EINVAL;
268 key--;
269 key_provided = 1;
270 } else {
271 key_provided = 0;
272 key = ieee->tx_keyidx;
273 }
274
275 IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
276 "provided" : "default");
277
278 crypt = &ieee->crypt[key];
279
280 if (erq->flags & IW_ENCODE_DISABLED) {
281 if (key_provided && *crypt) {
282 IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n",
283 key);
284 ieee80211_crypt_delayed_deinit(ieee, crypt);
285 } else
286 IEEE80211_DEBUG_WX("Disabling encryption.\n");
287
288 /* Check all the keys to see if any are still configured,
289 * and if no key index was provided, de-init them all */
290 for (i = 0; i < WEP_KEYS; i++) {
291 if (ieee->crypt[i] != NULL) {
292 if (key_provided)
293 break;
294 ieee80211_crypt_delayed_deinit(
295 ieee, &ieee->crypt[i]);
296 }
297 }
298
299 if (i == WEP_KEYS) {
300 sec.enabled = 0;
301 sec.level = SEC_LEVEL_0;
302 sec.flags |= SEC_ENABLED | SEC_LEVEL;
303 }
304
305 goto done;
306 }
307
308
309
310 sec.enabled = 1;
311 sec.flags |= SEC_ENABLED;
312
313 if (*crypt != NULL && (*crypt)->ops != NULL &&
314 strcmp((*crypt)->ops->name, "WEP") != 0) {
315 /* changing to use WEP; deinit previously used algorithm
316 * on this key */
317 ieee80211_crypt_delayed_deinit(ieee, crypt);
318 }
319
320 if (*crypt == NULL) {
321 struct ieee80211_crypt_data *new_crypt;
322
323 /* take WEP into use */
324 new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data),
325 GFP_KERNEL);
326 if (new_crypt == NULL)
327 return -ENOMEM;
328 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
329 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
330 if (!new_crypt->ops) {
331 request_module("ieee80211_crypt_wep");
332 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
333 }
334
335 if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
336 new_crypt->priv = new_crypt->ops->init(key);
337
338 if (!new_crypt->ops || !new_crypt->priv) {
339 kfree(new_crypt);
340 new_crypt = NULL;
341
342 printk(KERN_WARNING "%s: could not initialize WEP: "
343 "load module ieee80211_crypt_wep\n",
344 dev->name);
345 return -EOPNOTSUPP;
346 }
347 *crypt = new_crypt;
348 }
349
350 /* If a new key was provided, set it up */
351 if (erq->length > 0) {
352 len = erq->length <= 5 ? 5 : 13;
353 memcpy(sec.keys[key], keybuf, erq->length);
354 if (len > erq->length)
355 memset(sec.keys[key] + erq->length, 0,
356 len - erq->length);
357 IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
358 key, escape_essid(sec.keys[key], len),
359 erq->length, len);
360 sec.key_sizes[key] = len;
361 (*crypt)->ops->set_key(sec.keys[key], len, NULL,
362 (*crypt)->priv);
363 sec.flags |= (1 << key);
364 /* This ensures a key will be activated if no key is
365 * explicitely set */
366 if (key == sec.active_key)
367 sec.flags |= SEC_ACTIVE_KEY;
368 } else {
369 len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
370 NULL, (*crypt)->priv);
371 if (len == 0) {
372 /* Set a default key of all 0 */
373 IEEE80211_DEBUG_WX("Setting key %d to all zero.\n",
374 key);
375 memset(sec.keys[key], 0, 13);
376 (*crypt)->ops->set_key(sec.keys[key], 13, NULL,
377 (*crypt)->priv);
378 sec.key_sizes[key] = 13;
379 sec.flags |= (1 << key);
380 }
381
382 /* No key data - just set the default TX key index */
383 if (key_provided) {
384 IEEE80211_DEBUG_WX(
385 "Setting key %d to default Tx key.\n", key);
386 ieee->tx_keyidx = key;
387 sec.active_key = key;
388 sec.flags |= SEC_ACTIVE_KEY;
389 }
390 }
391
392 done:
393 ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
394 sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
395 sec.flags |= SEC_AUTH_MODE;
396 IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
397 "OPEN" : "SHARED KEY");
398
399 /* For now we just support WEP, so only set that security level...
400 * TODO: When WPA is added this is one place that needs to change */
401 sec.flags |= SEC_LEVEL;
402 sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
403
404 if (ieee->set_security)
405 ieee->set_security(dev, &sec);
406
407 /* Do not reset port if card is in Managed mode since resetting will
408 * generate new IEEE 802.11 authentication which may end up in looping
409 * with IEEE 802.1X. If your hardware requires a reset after WEP
410 * configuration (for example... Prism2), implement the reset_port in
411 * the callbacks structures used to initialize the 802.11 stack. */
412 if (ieee->reset_on_keychange &&
413 ieee->iw_mode != IW_MODE_INFRA &&
414 ieee->reset_port && ieee->reset_port(dev)) {
415 printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
416 return -EINVAL;
417 }
418 return 0;
419}
420
421int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
422 struct iw_request_info *info,
423 union iwreq_data *wrqu, char *keybuf)
424{
425 struct iw_point *erq = &(wrqu->encoding);
426 int len, key;
427 struct ieee80211_crypt_data *crypt;
428
429 IEEE80211_DEBUG_WX("GET_ENCODE\n");
430
431 key = erq->flags & IW_ENCODE_INDEX;
432 if (key) {
433 if (key > WEP_KEYS)
434 return -EINVAL;
435 key--;
436 } else
437 key = ieee->tx_keyidx;
438
439 crypt = ieee->crypt[key];
440 erq->flags = key + 1;
441
442 if (crypt == NULL || crypt->ops == NULL) {
443 erq->length = 0;
444 erq->flags |= IW_ENCODE_DISABLED;
445 return 0;
446 }
447
448 if (strcmp(crypt->ops->name, "WEP") != 0) {
449 /* only WEP is supported with wireless extensions, so just
450 * report that encryption is used */
451 erq->length = 0;
452 erq->flags |= IW_ENCODE_ENABLED;
453 return 0;
454 }
455
456 len = crypt->ops->get_key(keybuf, WEP_KEY_LEN, NULL, crypt->priv);
457 erq->length = (len >= 0 ? len : 0);
458
459 erq->flags |= IW_ENCODE_ENABLED;
460
461 if (ieee->open_wep)
462 erq->flags |= IW_ENCODE_OPEN;
463 else
464 erq->flags |= IW_ENCODE_RESTRICTED;
465
466 return 0;
467}
468
469EXPORT_SYMBOL(ieee80211_wx_get_scan);
470EXPORT_SYMBOL(ieee80211_wx_set_encode);
471EXPORT_SYMBOL(ieee80211_wx_get_encode);
diff --git a/net/ipv4/ah4.c b/net/ipv4/ah4.c
index 514c85b2631a..035ad2c9e1ba 100644
--- a/net/ipv4/ah4.c
+++ b/net/ipv4/ah4.c
@@ -263,10 +263,8 @@ static int ah_init_state(struct xfrm_state *x)
263 263
264error: 264error:
265 if (ahp) { 265 if (ahp) {
266 if (ahp->work_icv) 266 kfree(ahp->work_icv);
267 kfree(ahp->work_icv); 267 crypto_free_tfm(ahp->tfm);
268 if (ahp->tfm)
269 crypto_free_tfm(ahp->tfm);
270 kfree(ahp); 268 kfree(ahp);
271 } 269 }
272 return -EINVAL; 270 return -EINVAL;
@@ -279,14 +277,10 @@ static void ah_destroy(struct xfrm_state *x)
279 if (!ahp) 277 if (!ahp)
280 return; 278 return;
281 279
282 if (ahp->work_icv) { 280 kfree(ahp->work_icv);
283 kfree(ahp->work_icv); 281 ahp->work_icv = NULL;
284 ahp->work_icv = NULL; 282 crypto_free_tfm(ahp->tfm);
285 } 283 ahp->tfm = NULL;
286 if (ahp->tfm) {
287 crypto_free_tfm(ahp->tfm);
288 ahp->tfm = NULL;
289 }
290 kfree(ahp); 284 kfree(ahp);
291} 285}
292 286
diff --git a/net/ipv4/esp4.c b/net/ipv4/esp4.c
index b31ffc5053d2..1b5a09d1b90b 100644
--- a/net/ipv4/esp4.c
+++ b/net/ipv4/esp4.c
@@ -343,22 +343,14 @@ static void esp_destroy(struct xfrm_state *x)
343 if (!esp) 343 if (!esp)
344 return; 344 return;
345 345
346 if (esp->conf.tfm) { 346 crypto_free_tfm(esp->conf.tfm);
347 crypto_free_tfm(esp->conf.tfm); 347 esp->conf.tfm = NULL;
348 esp->conf.tfm = NULL; 348 kfree(esp->conf.ivec);
349 } 349 esp->conf.ivec = NULL;
350 if (esp->conf.ivec) { 350 crypto_free_tfm(esp->auth.tfm);
351 kfree(esp->conf.ivec); 351 esp->auth.tfm = NULL;
352 esp->conf.ivec = NULL; 352 kfree(esp->auth.work_icv);
353 } 353 esp->auth.work_icv = NULL;
354 if (esp->auth.tfm) {
355 crypto_free_tfm(esp->auth.tfm);
356 esp->auth.tfm = NULL;
357 }
358 if (esp->auth.work_icv) {
359 kfree(esp->auth.work_icv);
360 esp->auth.work_icv = NULL;
361 }
362 kfree(esp); 354 kfree(esp);
363} 355}
364 356
diff --git a/net/ipv4/ipcomp.c b/net/ipv4/ipcomp.c
index dcb7ee6c4858..fc718df17b40 100644
--- a/net/ipv4/ipcomp.c
+++ b/net/ipv4/ipcomp.c
@@ -345,8 +345,7 @@ static void ipcomp_free_tfms(struct crypto_tfm **tfms)
345 345
346 for_each_cpu(cpu) { 346 for_each_cpu(cpu) {
347 struct crypto_tfm *tfm = *per_cpu_ptr(tfms, cpu); 347 struct crypto_tfm *tfm = *per_cpu_ptr(tfms, cpu);
348 if (tfm) 348 crypto_free_tfm(tfm);
349 crypto_free_tfm(tfm);
350 } 349 }
351 free_percpu(tfms); 350 free_percpu(tfms);
352} 351}
diff --git a/net/ipv4/netfilter/ipt_CLUSTERIP.c b/net/ipv4/netfilter/ipt_CLUSTERIP.c
index 2d05cafec221..7d38913754b1 100644
--- a/net/ipv4/netfilter/ipt_CLUSTERIP.c
+++ b/net/ipv4/netfilter/ipt_CLUSTERIP.c
@@ -144,7 +144,7 @@ clusterip_config_init(struct ipt_clusterip_tgt_info *i, u_int32_t ip,
144 memcpy(&c->clustermac, &i->clustermac, ETH_ALEN); 144 memcpy(&c->clustermac, &i->clustermac, ETH_ALEN);
145 c->num_total_nodes = i->num_total_nodes; 145 c->num_total_nodes = i->num_total_nodes;
146 c->num_local_nodes = i->num_local_nodes; 146 c->num_local_nodes = i->num_local_nodes;
147 memcpy(&c->local_nodes, &i->local_nodes, sizeof(&c->local_nodes)); 147 memcpy(&c->local_nodes, &i->local_nodes, sizeof(c->local_nodes));
148 c->hash_mode = i->hash_mode; 148 c->hash_mode = i->hash_mode;
149 c->hash_initval = i->hash_initval; 149 c->hash_initval = i->hash_initval;
150 atomic_set(&c->refcount, 1); 150 atomic_set(&c->refcount, 1);
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 02fdda68718d..cbcc9fc47783 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -552,8 +552,7 @@ new_segment:
552 tcp_mark_push(tp, skb); 552 tcp_mark_push(tp, skb);
553 goto new_segment; 553 goto new_segment;
554 } 554 }
555 if (sk->sk_forward_alloc < copy && 555 if (!sk_stream_wmem_schedule(sk, copy))
556 !sk_stream_mem_schedule(sk, copy, 0))
557 goto wait_for_memory; 556 goto wait_for_memory;
558 557
559 if (can_coalesce) { 558 if (can_coalesce) {
@@ -770,19 +769,23 @@ new_segment:
770 if (off == PAGE_SIZE) { 769 if (off == PAGE_SIZE) {
771 put_page(page); 770 put_page(page);
772 TCP_PAGE(sk) = page = NULL; 771 TCP_PAGE(sk) = page = NULL;
772 TCP_OFF(sk) = off = 0;
773 } 773 }
774 } 774 } else
775 BUG_ON(off);
776
777 if (copy > PAGE_SIZE - off)
778 copy = PAGE_SIZE - off;
779
780 if (!sk_stream_wmem_schedule(sk, copy))
781 goto wait_for_memory;
775 782
776 if (!page) { 783 if (!page) {
777 /* Allocate new cache page. */ 784 /* Allocate new cache page. */
778 if (!(page = sk_stream_alloc_page(sk))) 785 if (!(page = sk_stream_alloc_page(sk)))
779 goto wait_for_memory; 786 goto wait_for_memory;
780 off = 0;
781 } 787 }
782 788
783 if (copy > PAGE_SIZE - off)
784 copy = PAGE_SIZE - off;
785
786 /* Time to copy data. We are close to 789 /* Time to copy data. We are close to
787 * the end! */ 790 * the end! */
788 err = skb_copy_to_page(sk, from, skb, page, 791 err = skb_copy_to_page(sk, from, skb, page,
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 1afb080bdf0c..29222b964951 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -923,14 +923,6 @@ tcp_sacktag_write_queue(struct sock *sk, struct sk_buff *ack_skb, u32 prior_snd_
923 int flag = 0; 923 int flag = 0;
924 int i; 924 int i;
925 925
926 /* So, SACKs for already sent large segments will be lost.
927 * Not good, but alternative is to resegment the queue. */
928 if (sk->sk_route_caps & NETIF_F_TSO) {
929 sk->sk_route_caps &= ~NETIF_F_TSO;
930 sock_set_flag(sk, SOCK_NO_LARGESEND);
931 tp->mss_cache = tp->mss_cache;
932 }
933
934 if (!tp->sacked_out) 926 if (!tp->sacked_out)
935 tp->fackets_out = 0; 927 tp->fackets_out = 0;
936 prior_fackets = tp->fackets_out; 928 prior_fackets = tp->fackets_out;
@@ -978,20 +970,40 @@ tcp_sacktag_write_queue(struct sock *sk, struct sk_buff *ack_skb, u32 prior_snd_
978 flag |= FLAG_DATA_LOST; 970 flag |= FLAG_DATA_LOST;
979 971
980 sk_stream_for_retrans_queue(skb, sk) { 972 sk_stream_for_retrans_queue(skb, sk) {
981 u8 sacked = TCP_SKB_CB(skb)->sacked; 973 int in_sack, pcount;
982 int in_sack; 974 u8 sacked;
983 975
984 /* The retransmission queue is always in order, so 976 /* The retransmission queue is always in order, so
985 * we can short-circuit the walk early. 977 * we can short-circuit the walk early.
986 */ 978 */
987 if(!before(TCP_SKB_CB(skb)->seq, end_seq)) 979 if (!before(TCP_SKB_CB(skb)->seq, end_seq))
988 break; 980 break;
989 981
990 fack_count += tcp_skb_pcount(skb); 982 pcount = tcp_skb_pcount(skb);
983
984 if (pcount > 1 &&
985 (after(start_seq, TCP_SKB_CB(skb)->seq) ||
986 before(end_seq, TCP_SKB_CB(skb)->end_seq))) {
987 unsigned int pkt_len;
988
989 if (after(start_seq, TCP_SKB_CB(skb)->seq))
990 pkt_len = (start_seq -
991 TCP_SKB_CB(skb)->seq);
992 else
993 pkt_len = (end_seq -
994 TCP_SKB_CB(skb)->seq);
995 if (tcp_fragment(sk, skb, pkt_len, skb_shinfo(skb)->tso_size))
996 break;
997 pcount = tcp_skb_pcount(skb);
998 }
999
1000 fack_count += pcount;
991 1001
992 in_sack = !after(start_seq, TCP_SKB_CB(skb)->seq) && 1002 in_sack = !after(start_seq, TCP_SKB_CB(skb)->seq) &&
993 !before(end_seq, TCP_SKB_CB(skb)->end_seq); 1003 !before(end_seq, TCP_SKB_CB(skb)->end_seq);
994 1004
1005 sacked = TCP_SKB_CB(skb)->sacked;
1006
995 /* Account D-SACK for retransmitted packet. */ 1007 /* Account D-SACK for retransmitted packet. */
996 if ((dup_sack && in_sack) && 1008 if ((dup_sack && in_sack) &&
997 (sacked & TCPCB_RETRANS) && 1009 (sacked & TCPCB_RETRANS) &&
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 75b68116682a..6094db5e11be 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -428,11 +428,11 @@ static void tcp_set_skb_tso_segs(struct sock *sk, struct sk_buff *skb, unsigned
428 * packet to the list. This won't be called frequently, I hope. 428 * packet to the list. This won't be called frequently, I hope.
429 * Remember, these are still headerless SKBs at this point. 429 * Remember, these are still headerless SKBs at this point.
430 */ 430 */
431static int tcp_fragment(struct sock *sk, struct sk_buff *skb, u32 len, unsigned int mss_now) 431int tcp_fragment(struct sock *sk, struct sk_buff *skb, u32 len, unsigned int mss_now)
432{ 432{
433 struct tcp_sock *tp = tcp_sk(sk); 433 struct tcp_sock *tp = tcp_sk(sk);
434 struct sk_buff *buff; 434 struct sk_buff *buff;
435 int nsize; 435 int nsize, old_factor;
436 u16 flags; 436 u16 flags;
437 437
438 nsize = skb_headlen(skb) - len; 438 nsize = skb_headlen(skb) - len;
@@ -490,18 +490,29 @@ static int tcp_fragment(struct sock *sk, struct sk_buff *skb, u32 len, unsigned
490 tp->left_out -= tcp_skb_pcount(skb); 490 tp->left_out -= tcp_skb_pcount(skb);
491 } 491 }
492 492
493 old_factor = tcp_skb_pcount(skb);
494
493 /* Fix up tso_factor for both original and new SKB. */ 495 /* Fix up tso_factor for both original and new SKB. */
494 tcp_set_skb_tso_segs(sk, skb, mss_now); 496 tcp_set_skb_tso_segs(sk, skb, mss_now);
495 tcp_set_skb_tso_segs(sk, buff, mss_now); 497 tcp_set_skb_tso_segs(sk, buff, mss_now);
496 498
497 if (TCP_SKB_CB(skb)->sacked & TCPCB_LOST) { 499 /* If this packet has been sent out already, we must
498 tp->lost_out += tcp_skb_pcount(skb); 500 * adjust the various packet counters.
499 tp->left_out += tcp_skb_pcount(skb); 501 */
500 } 502 if (after(tp->snd_nxt, TCP_SKB_CB(buff)->end_seq)) {
503 int diff = old_factor - tcp_skb_pcount(skb) -
504 tcp_skb_pcount(buff);
501 505
502 if (TCP_SKB_CB(buff)->sacked&TCPCB_LOST) { 506 tp->packets_out -= diff;
503 tp->lost_out += tcp_skb_pcount(buff); 507 if (TCP_SKB_CB(skb)->sacked & TCPCB_LOST) {
504 tp->left_out += tcp_skb_pcount(buff); 508 tp->lost_out -= diff;
509 tp->left_out -= diff;
510 }
511 if (diff > 0) {
512 tp->fackets_out -= diff;
513 if ((int)tp->fackets_out < 0)
514 tp->fackets_out = 0;
515 }
505 } 516 }
506 517
507 /* Link BUFF into the send queue. */ 518 /* Link BUFF into the send queue. */
@@ -1350,12 +1361,6 @@ int tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb)
1350 if (before(TCP_SKB_CB(skb)->seq, tp->snd_una)) { 1361 if (before(TCP_SKB_CB(skb)->seq, tp->snd_una)) {
1351 if (before(TCP_SKB_CB(skb)->end_seq, tp->snd_una)) 1362 if (before(TCP_SKB_CB(skb)->end_seq, tp->snd_una))
1352 BUG(); 1363 BUG();
1353
1354 if (sk->sk_route_caps & NETIF_F_TSO) {
1355 sk->sk_route_caps &= ~NETIF_F_TSO;
1356 sock_set_flag(sk, SOCK_NO_LARGESEND);
1357 }
1358
1359 if (tcp_trim_head(sk, skb, tp->snd_una - TCP_SKB_CB(skb)->seq)) 1364 if (tcp_trim_head(sk, skb, tp->snd_una - TCP_SKB_CB(skb)->seq))
1360 return -ENOMEM; 1365 return -ENOMEM;
1361 } 1366 }
@@ -1370,22 +1375,8 @@ int tcp_retransmit_skb(struct sock *sk, struct sk_buff *skb)
1370 return -EAGAIN; 1375 return -EAGAIN;
1371 1376
1372 if (skb->len > cur_mss) { 1377 if (skb->len > cur_mss) {
1373 int old_factor = tcp_skb_pcount(skb);
1374 int diff;
1375
1376 if (tcp_fragment(sk, skb, cur_mss, cur_mss)) 1378 if (tcp_fragment(sk, skb, cur_mss, cur_mss))
1377 return -ENOMEM; /* We'll try again later. */ 1379 return -ENOMEM; /* We'll try again later. */
1378
1379 /* New SKB created, account for it. */
1380 diff = old_factor - tcp_skb_pcount(skb) -
1381 tcp_skb_pcount(skb->next);
1382 tp->packets_out -= diff;
1383
1384 if (diff > 0) {
1385 tp->fackets_out -= diff;
1386 if ((int)tp->fackets_out < 0)
1387 tp->fackets_out = 0;
1388 }
1389 } 1380 }
1390 1381
1391 /* Collapse two adjacent packets if worthwhile and we can. */ 1382 /* Collapse two adjacent packets if worthwhile and we can. */
@@ -1993,12 +1984,6 @@ int tcp_write_wakeup(struct sock *sk)
1993 TCP_SKB_CB(skb)->flags |= TCPCB_FLAG_PSH; 1984 TCP_SKB_CB(skb)->flags |= TCPCB_FLAG_PSH;
1994 if (tcp_fragment(sk, skb, seg_size, mss)) 1985 if (tcp_fragment(sk, skb, seg_size, mss))
1995 return -1; 1986 return -1;
1996 /* SWS override triggered forced fragmentation.
1997 * Disable TSO, the connection is too sick. */
1998 if (sk->sk_route_caps & NETIF_F_TSO) {
1999 sock_set_flag(sk, SOCK_NO_LARGESEND);
2000 sk->sk_route_caps &= ~NETIF_F_TSO;
2001 }
2002 } else if (!tcp_skb_pcount(skb)) 1987 } else if (!tcp_skb_pcount(skb))
2003 tcp_set_skb_tso_segs(sk, skb, mss); 1988 tcp_set_skb_tso_segs(sk, skb, mss);
2004 1989
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 937ad32db77c..6d6fb74f3b52 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -3593,10 +3593,8 @@ void __exit addrconf_cleanup(void)
3593 rtnl_unlock(); 3593 rtnl_unlock();
3594 3594
3595#ifdef CONFIG_IPV6_PRIVACY 3595#ifdef CONFIG_IPV6_PRIVACY
3596 if (likely(md5_tfm != NULL)) { 3596 crypto_free_tfm(md5_tfm);
3597 crypto_free_tfm(md5_tfm); 3597 md5_tfm = NULL;
3598 md5_tfm = NULL;
3599 }
3600#endif 3598#endif
3601 3599
3602#ifdef CONFIG_PROC_FS 3600#ifdef CONFIG_PROC_FS
diff --git a/net/ipv6/ah6.c b/net/ipv6/ah6.c
index 0ebfad907a03..f3629730eb15 100644
--- a/net/ipv6/ah6.c
+++ b/net/ipv6/ah6.c
@@ -401,10 +401,8 @@ static int ah6_init_state(struct xfrm_state *x)
401 401
402error: 402error:
403 if (ahp) { 403 if (ahp) {
404 if (ahp->work_icv) 404 kfree(ahp->work_icv);
405 kfree(ahp->work_icv); 405 crypto_free_tfm(ahp->tfm);
406 if (ahp->tfm)
407 crypto_free_tfm(ahp->tfm);
408 kfree(ahp); 406 kfree(ahp);
409 } 407 }
410 return -EINVAL; 408 return -EINVAL;
@@ -417,14 +415,10 @@ static void ah6_destroy(struct xfrm_state *x)
417 if (!ahp) 415 if (!ahp)
418 return; 416 return;
419 417
420 if (ahp->work_icv) { 418 kfree(ahp->work_icv);
421 kfree(ahp->work_icv); 419 ahp->work_icv = NULL;
422 ahp->work_icv = NULL; 420 crypto_free_tfm(ahp->tfm);
423 } 421 ahp->tfm = NULL;
424 if (ahp->tfm) {
425 crypto_free_tfm(ahp->tfm);
426 ahp->tfm = NULL;
427 }
428 kfree(ahp); 422 kfree(ahp);
429} 423}
430 424
diff --git a/net/ipv6/esp6.c b/net/ipv6/esp6.c
index e8bff9d3d96c..9b27460f0cc7 100644
--- a/net/ipv6/esp6.c
+++ b/net/ipv6/esp6.c
@@ -276,22 +276,14 @@ static void esp6_destroy(struct xfrm_state *x)
276 if (!esp) 276 if (!esp)
277 return; 277 return;
278 278
279 if (esp->conf.tfm) { 279 crypto_free_tfm(esp->conf.tfm);
280 crypto_free_tfm(esp->conf.tfm); 280 esp->conf.tfm = NULL;
281 esp->conf.tfm = NULL; 281 kfree(esp->conf.ivec);
282 } 282 esp->conf.ivec = NULL;
283 if (esp->conf.ivec) { 283 crypto_free_tfm(esp->auth.tfm);
284 kfree(esp->conf.ivec); 284 esp->auth.tfm = NULL;
285 esp->conf.ivec = NULL; 285 kfree(esp->auth.work_icv);
286 } 286 esp->auth.work_icv = NULL;
287 if (esp->auth.tfm) {
288 crypto_free_tfm(esp->auth.tfm);
289 esp->auth.tfm = NULL;
290 }
291 if (esp->auth.work_icv) {
292 kfree(esp->auth.work_icv);
293 esp->auth.work_icv = NULL;
294 }
295 kfree(esp); 287 kfree(esp);
296} 288}
297 289
diff --git a/net/ipv6/icmp.c b/net/ipv6/icmp.c
index 5176fc655ea9..fa8f1bb0aa52 100644
--- a/net/ipv6/icmp.c
+++ b/net/ipv6/icmp.c
@@ -549,7 +549,7 @@ static void icmpv6_notify(struct sk_buff *skb, int type, int code, u32 info)
549 read_lock(&raw_v6_lock); 549 read_lock(&raw_v6_lock);
550 if ((sk = sk_head(&raw_v6_htable[hash])) != NULL) { 550 if ((sk = sk_head(&raw_v6_htable[hash])) != NULL) {
551 while((sk = __raw_v6_lookup(sk, nexthdr, daddr, saddr, 551 while((sk = __raw_v6_lookup(sk, nexthdr, daddr, saddr,
552 skb->dev->ifindex))) { 552 IP6CB(skb)->iif))) {
553 rawv6_err(sk, skb, NULL, type, code, inner_offset, info); 553 rawv6_err(sk, skb, NULL, type, code, inner_offset, info);
554 sk = sk_next(sk); 554 sk = sk_next(sk);
555 } 555 }
diff --git a/net/ipv6/ipcomp6.c b/net/ipv6/ipcomp6.c
index 135383ef538f..85bfbc69b2c3 100644
--- a/net/ipv6/ipcomp6.c
+++ b/net/ipv6/ipcomp6.c
@@ -341,8 +341,7 @@ static void ipcomp6_free_tfms(struct crypto_tfm **tfms)
341 341
342 for_each_cpu(cpu) { 342 for_each_cpu(cpu) {
343 struct crypto_tfm *tfm = *per_cpu_ptr(tfms, cpu); 343 struct crypto_tfm *tfm = *per_cpu_ptr(tfms, cpu);
344 if (tfm) 344 crypto_free_tfm(tfm);
345 crypto_free_tfm(tfm);
346 } 345 }
347 free_percpu(tfms); 346 free_percpu(tfms);
348} 347}
diff --git a/net/ipv6/raw.c b/net/ipv6/raw.c
index 7a5863298f3f..ed3a76b30fd9 100644
--- a/net/ipv6/raw.c
+++ b/net/ipv6/raw.c
@@ -166,7 +166,7 @@ int ipv6_raw_deliver(struct sk_buff *skb, int nexthdr)
166 if (sk == NULL) 166 if (sk == NULL)
167 goto out; 167 goto out;
168 168
169 sk = __raw_v6_lookup(sk, nexthdr, daddr, saddr, skb->dev->ifindex); 169 sk = __raw_v6_lookup(sk, nexthdr, daddr, saddr, IP6CB(skb)->iif);
170 170
171 while (sk) { 171 while (sk) {
172 delivered = 1; 172 delivered = 1;
@@ -178,7 +178,7 @@ int ipv6_raw_deliver(struct sk_buff *skb, int nexthdr)
178 rawv6_rcv(sk, clone); 178 rawv6_rcv(sk, clone);
179 } 179 }
180 sk = __raw_v6_lookup(sk_next(sk), nexthdr, daddr, saddr, 180 sk = __raw_v6_lookup(sk_next(sk), nexthdr, daddr, saddr,
181 skb->dev->ifindex); 181 IP6CB(skb)->iif);
182 } 182 }
183out: 183out:
184 read_unlock(&raw_v6_lock); 184 read_unlock(&raw_v6_lock);
diff --git a/net/sctp/endpointola.c b/net/sctp/endpointola.c
index e47ac0d1a6d6..e22ccd655965 100644
--- a/net/sctp/endpointola.c
+++ b/net/sctp/endpointola.c
@@ -193,8 +193,7 @@ static void sctp_endpoint_destroy(struct sctp_endpoint *ep)
193 sctp_unhash_endpoint(ep); 193 sctp_unhash_endpoint(ep);
194 194
195 /* Free up the HMAC transform. */ 195 /* Free up the HMAC transform. */
196 if (sctp_sk(ep->base.sk)->hmac) 196 sctp_crypto_free_tfm(sctp_sk(ep->base.sk)->hmac);
197 sctp_crypto_free_tfm(sctp_sk(ep->base.sk)->hmac);
198 197
199 /* Cleanup. */ 198 /* Cleanup. */
200 sctp_inq_free(&ep->base.inqueue); 199 sctp_inq_free(&ep->base.inqueue);
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index 4454afe4727e..91ec8c936913 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -4194,8 +4194,7 @@ out:
4194 sctp_release_sock(sk); 4194 sctp_release_sock(sk);
4195 return err; 4195 return err;
4196cleanup: 4196cleanup:
4197 if (tfm) 4197 sctp_crypto_free_tfm(tfm);
4198 sctp_crypto_free_tfm(tfm);
4199 goto out; 4198 goto out;
4200} 4199}
4201 4200
diff --git a/net/sunrpc/auth_gss/gss_krb5_crypto.c b/net/sunrpc/auth_gss/gss_krb5_crypto.c
index 5a7265aeaf83..ee6ae74cd1b2 100644
--- a/net/sunrpc/auth_gss/gss_krb5_crypto.c
+++ b/net/sunrpc/auth_gss/gss_krb5_crypto.c
@@ -160,7 +160,7 @@ make_checksum(s32 cksumtype, char *header, int hdrlen, struct xdr_buf *body,
160 " unsupported checksum %d", cksumtype); 160 " unsupported checksum %d", cksumtype);
161 goto out; 161 goto out;
162 } 162 }
163 if (!(tfm = crypto_alloc_tfm(cksumname, 0))) 163 if (!(tfm = crypto_alloc_tfm(cksumname, CRYPTO_TFM_REQ_MAY_SLEEP)))
164 goto out; 164 goto out;
165 cksum->len = crypto_tfm_alg_digestsize(tfm); 165 cksum->len = crypto_tfm_alg_digestsize(tfm);
166 if ((cksum->data = kmalloc(cksum->len, GFP_KERNEL)) == NULL) 166 if ((cksum->data = kmalloc(cksum->len, GFP_KERNEL)) == NULL)
@@ -199,8 +199,7 @@ make_checksum(s32 cksumtype, char *header, int hdrlen, struct xdr_buf *body,
199 crypto_digest_final(tfm, cksum->data); 199 crypto_digest_final(tfm, cksum->data);
200 code = 0; 200 code = 0;
201out: 201out:
202 if (tfm) 202 crypto_free_tfm(tfm);
203 crypto_free_tfm(tfm);
204 return code; 203 return code;
205} 204}
206 205
diff --git a/net/sunrpc/auth_gss/gss_krb5_mech.c b/net/sunrpc/auth_gss/gss_krb5_mech.c
index cf726510df8e..606a8a82cafb 100644
--- a/net/sunrpc/auth_gss/gss_krb5_mech.c
+++ b/net/sunrpc/auth_gss/gss_krb5_mech.c
@@ -185,12 +185,9 @@ static void
185gss_delete_sec_context_kerberos(void *internal_ctx) { 185gss_delete_sec_context_kerberos(void *internal_ctx) {
186 struct krb5_ctx *kctx = internal_ctx; 186 struct krb5_ctx *kctx = internal_ctx;
187 187
188 if (kctx->seq) 188 crypto_free_tfm(kctx->seq);
189 crypto_free_tfm(kctx->seq); 189 crypto_free_tfm(kctx->enc);
190 if (kctx->enc) 190 kfree(kctx->mech_used.data);
191 crypto_free_tfm(kctx->enc);
192 if (kctx->mech_used.data)
193 kfree(kctx->mech_used.data);
194 kfree(kctx); 191 kfree(kctx);
195} 192}
196 193
diff --git a/net/sunrpc/auth_gss/gss_spkm3_mech.c b/net/sunrpc/auth_gss/gss_spkm3_mech.c
index dad05994c3eb..6c97d61baa9b 100644
--- a/net/sunrpc/auth_gss/gss_spkm3_mech.c
+++ b/net/sunrpc/auth_gss/gss_spkm3_mech.c
@@ -214,14 +214,10 @@ static void
214gss_delete_sec_context_spkm3(void *internal_ctx) { 214gss_delete_sec_context_spkm3(void *internal_ctx) {
215 struct spkm3_ctx *sctx = internal_ctx; 215 struct spkm3_ctx *sctx = internal_ctx;
216 216
217 if(sctx->derived_integ_key) 217 crypto_free_tfm(sctx->derived_integ_key);
218 crypto_free_tfm(sctx->derived_integ_key); 218 crypto_free_tfm(sctx->derived_conf_key);
219 if(sctx->derived_conf_key) 219 kfree(sctx->share_key.data);
220 crypto_free_tfm(sctx->derived_conf_key); 220 kfree(sctx->mech_used.data);
221 if(sctx->share_key.data)
222 kfree(sctx->share_key.data);
223 if(sctx->mech_used.data)
224 kfree(sctx->mech_used.data);
225 kfree(sctx); 221 kfree(sctx);
226} 222}
227 223
diff --git a/net/sunrpc/rpc_pipe.c b/net/sunrpc/rpc_pipe.c
index fe1a73ce6cff..ded6c63f11ec 100644
--- a/net/sunrpc/rpc_pipe.c
+++ b/net/sunrpc/rpc_pipe.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Userland/kernel interface for rpcauth_gss. 4 * Userland/kernel interface for rpcauth_gss.
5 * Code shamelessly plagiarized from fs/nfsd/nfsctl.c 5 * Code shamelessly plagiarized from fs/nfsd/nfsctl.c
6 * and fs/driverfs/inode.c 6 * and fs/sysfs/inode.c
7 * 7 *
8 * Copyright (c) 2002, Trond Myklebust <trond.myklebust@fys.uio.no> 8 * Copyright (c) 2002, Trond Myklebust <trond.myklebust@fys.uio.no>
9 * 9 *
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index 09abb891d11f..2fcb244a9e18 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -27,8 +27,20 @@ update-po-config: $(obj)/kxgettext
27 xgettext --default-domain=linux \ 27 xgettext --default-domain=linux \
28 --add-comments --keyword=_ --keyword=N_ \ 28 --add-comments --keyword=_ --keyword=N_ \
29 --files-from=scripts/kconfig/POTFILES.in \ 29 --files-from=scripts/kconfig/POTFILES.in \
30 -o scripts/kconfig/linux.pot 30 --output scripts/kconfig/config.pot
31 scripts/kconfig/kxgettext arch/$(ARCH)/Kconfig >> scripts/kconfig/linux.pot 31 $(Q)ln -fs Kconfig_i386 arch/um/Kconfig_arch
32 $(Q)for i in `ls arch/`; \
33 do \
34 scripts/kconfig/kxgettext arch/$$i/Kconfig \
35 | msguniq -o scripts/kconfig/linux_$${i}.pot; \
36 done
37 $(Q)msgcat scripts/kconfig/config.pot \
38 `find scripts/kconfig/ -type f -name linux_*.pot` \
39 --output scripts/kconfig/linux_raw.pot
40 $(Q)msguniq --sort-by-file scripts/kconfig/linux_raw.pot \
41 --output scripts/kconfig/linux.pot
42 $(Q)rm -f arch/um/Kconfig_arch
43 $(Q)rm -f scripts/kconfig/linux_*.pot scripts/kconfig/config.pot
32 44
33.PHONY: randconfig allyesconfig allnoconfig allmodconfig defconfig 45.PHONY: randconfig allyesconfig allnoconfig allmodconfig defconfig
34 46
diff --git a/scripts/kconfig/kxgettext.c b/scripts/kconfig/kxgettext.c
index 1c88d7c6d5a7..abee55ca6174 100644
--- a/scripts/kconfig/kxgettext.c
+++ b/scripts/kconfig/kxgettext.c
@@ -14,6 +14,11 @@ static char *escape(const char* text, char *bf, int len)
14{ 14{
15 char *bfp = bf; 15 char *bfp = bf;
16 int multiline = strchr(text, '\n') != NULL; 16 int multiline = strchr(text, '\n') != NULL;
17 int eol = 0;
18 int textlen = strlen(text);
19
20 if ((textlen > 0) && (text[textlen-1] == '\n'))
21 eol = 1;
17 22
18 *bfp++ = '"'; 23 *bfp++ = '"';
19 --len; 24 --len;
@@ -43,7 +48,7 @@ next:
43 --len; 48 --len;
44 } 49 }
45 50
46 if (multiline) 51 if (multiline && eol)
47 bfp -= 3; 52 bfp -= 3;
48 53
49 *bfp++ = '"'; 54 *bfp++ = '"';
@@ -179,7 +184,11 @@ static void message__print_file_lineno(struct message *self)
179{ 184{
180 struct file_line *fl = self->files; 185 struct file_line *fl = self->files;
181 186
182 printf("\n#: %s:%d", fl->file, fl->lineno); 187 putchar('\n');
188 if (self->option != NULL)
189 printf("# %s:00000\n", self->option);
190
191 printf("#: %s:%d", fl->file, fl->lineno);
183 fl = fl->next; 192 fl = fl->next;
184 193
185 while (fl != NULL) { 194 while (fl != NULL) {
@@ -187,9 +196,6 @@ static void message__print_file_lineno(struct message *self)
187 fl = fl->next; 196 fl = fl->next;
188 } 197 }
189 198
190 if (self->option != NULL)
191 printf(", %s:00000", self->option);
192
193 putchar('\n'); 199 putchar('\n');
194} 200}
195 201
diff --git a/security/seclvl.c b/security/seclvl.c
index c8e87b22c9bd..96b1f2122f67 100644
--- a/security/seclvl.c
+++ b/security/seclvl.c
@@ -321,7 +321,7 @@ plaintext_to_sha1(unsigned char *hash, const char *plaintext, int len)
321 "bytes.\n", len, PAGE_SIZE); 321 "bytes.\n", len, PAGE_SIZE);
322 return -ENOMEM; 322 return -ENOMEM;
323 } 323 }
324 tfm = crypto_alloc_tfm("sha1", 0); 324 tfm = crypto_alloc_tfm("sha1", CRYPTO_TFM_REQ_MAY_SLEEP);
325 if (tfm == NULL) { 325 if (tfm == NULL) {
326 seclvl_printk(0, KERN_ERR, 326 seclvl_printk(0, KERN_ERR,
327 "Failed to load transform for SHA1\n"); 327 "Failed to load transform for SHA1\n");
diff --git a/security/selinux/avc.c b/security/selinux/avc.c
index 451502467a9b..cf6020f85403 100644
--- a/security/selinux/avc.c
+++ b/security/selinux/avc.c
@@ -490,7 +490,7 @@ out:
490} 490}
491 491
492static inline void avc_print_ipv6_addr(struct audit_buffer *ab, 492static inline void avc_print_ipv6_addr(struct audit_buffer *ab,
493 struct in6_addr *addr, u16 port, 493 struct in6_addr *addr, __be16 port,
494 char *name1, char *name2) 494 char *name1, char *name2)
495{ 495{
496 if (!ipv6_addr_any(addr)) 496 if (!ipv6_addr_any(addr))
@@ -501,7 +501,7 @@ static inline void avc_print_ipv6_addr(struct audit_buffer *ab,
501} 501}
502 502
503static inline void avc_print_ipv4_addr(struct audit_buffer *ab, u32 addr, 503static inline void avc_print_ipv4_addr(struct audit_buffer *ab, u32 addr,
504 u16 port, char *name1, char *name2) 504 __be16 port, char *name1, char *name2)
505{ 505{
506 if (addr) 506 if (addr)
507 audit_log_format(ab, " %s=%d.%d.%d.%d", name1, NIPQUAD(addr)); 507 audit_log_format(ab, " %s=%d.%d.%d.%d", name1, NIPQUAD(addr));
diff --git a/security/selinux/include/security.h b/security/selinux/include/security.h
index 71c0a19c9753..5f016c98056f 100644
--- a/security/selinux/include/security.h
+++ b/security/selinux/include/security.h
@@ -23,10 +23,11 @@
23#define POLICYDB_VERSION_NLCLASS 18 23#define POLICYDB_VERSION_NLCLASS 18
24#define POLICYDB_VERSION_VALIDATETRANS 19 24#define POLICYDB_VERSION_VALIDATETRANS 19
25#define POLICYDB_VERSION_MLS 19 25#define POLICYDB_VERSION_MLS 19
26#define POLICYDB_VERSION_AVTAB 20
26 27
27/* Range of policy versions we understand*/ 28/* Range of policy versions we understand*/
28#define POLICYDB_VERSION_MIN POLICYDB_VERSION_BASE 29#define POLICYDB_VERSION_MIN POLICYDB_VERSION_BASE
29#define POLICYDB_VERSION_MAX POLICYDB_VERSION_MLS 30#define POLICYDB_VERSION_MAX POLICYDB_VERSION_AVTAB
30 31
31#ifdef CONFIG_SECURITY_SELINUX_BOOTPARAM 32#ifdef CONFIG_SECURITY_SELINUX_BOOTPARAM
32extern int selinux_enabled; 33extern int selinux_enabled;
diff --git a/security/selinux/ss/avtab.c b/security/selinux/ss/avtab.c
index f238c034c44e..dde094feb20d 100644
--- a/security/selinux/ss/avtab.c
+++ b/security/selinux/ss/avtab.c
@@ -58,6 +58,7 @@ static int avtab_insert(struct avtab *h, struct avtab_key *key, struct avtab_dat
58{ 58{
59 int hvalue; 59 int hvalue;
60 struct avtab_node *prev, *cur, *newnode; 60 struct avtab_node *prev, *cur, *newnode;
61 u16 specified = key->specified & ~(AVTAB_ENABLED|AVTAB_ENABLED_OLD);
61 62
62 if (!h) 63 if (!h)
63 return -EINVAL; 64 return -EINVAL;
@@ -69,7 +70,7 @@ static int avtab_insert(struct avtab *h, struct avtab_key *key, struct avtab_dat
69 if (key->source_type == cur->key.source_type && 70 if (key->source_type == cur->key.source_type &&
70 key->target_type == cur->key.target_type && 71 key->target_type == cur->key.target_type &&
71 key->target_class == cur->key.target_class && 72 key->target_class == cur->key.target_class &&
72 (datum->specified & cur->datum.specified)) 73 (specified & cur->key.specified))
73 return -EEXIST; 74 return -EEXIST;
74 if (key->source_type < cur->key.source_type) 75 if (key->source_type < cur->key.source_type)
75 break; 76 break;
@@ -98,6 +99,7 @@ avtab_insert_nonunique(struct avtab * h, struct avtab_key * key, struct avtab_da
98{ 99{
99 int hvalue; 100 int hvalue;
100 struct avtab_node *prev, *cur, *newnode; 101 struct avtab_node *prev, *cur, *newnode;
102 u16 specified = key->specified & ~(AVTAB_ENABLED|AVTAB_ENABLED_OLD);
101 103
102 if (!h) 104 if (!h)
103 return NULL; 105 return NULL;
@@ -108,7 +110,7 @@ avtab_insert_nonunique(struct avtab * h, struct avtab_key * key, struct avtab_da
108 if (key->source_type == cur->key.source_type && 110 if (key->source_type == cur->key.source_type &&
109 key->target_type == cur->key.target_type && 111 key->target_type == cur->key.target_type &&
110 key->target_class == cur->key.target_class && 112 key->target_class == cur->key.target_class &&
111 (datum->specified & cur->datum.specified)) 113 (specified & cur->key.specified))
112 break; 114 break;
113 if (key->source_type < cur->key.source_type) 115 if (key->source_type < cur->key.source_type)
114 break; 116 break;
@@ -125,10 +127,11 @@ avtab_insert_nonunique(struct avtab * h, struct avtab_key * key, struct avtab_da
125 return newnode; 127 return newnode;
126} 128}
127 129
128struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *key, int specified) 130struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *key)
129{ 131{
130 int hvalue; 132 int hvalue;
131 struct avtab_node *cur; 133 struct avtab_node *cur;
134 u16 specified = key->specified & ~(AVTAB_ENABLED|AVTAB_ENABLED_OLD);
132 135
133 if (!h) 136 if (!h)
134 return NULL; 137 return NULL;
@@ -138,7 +141,7 @@ struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *key, int spe
138 if (key->source_type == cur->key.source_type && 141 if (key->source_type == cur->key.source_type &&
139 key->target_type == cur->key.target_type && 142 key->target_type == cur->key.target_type &&
140 key->target_class == cur->key.target_class && 143 key->target_class == cur->key.target_class &&
141 (specified & cur->datum.specified)) 144 (specified & cur->key.specified))
142 return &cur->datum; 145 return &cur->datum;
143 146
144 if (key->source_type < cur->key.source_type) 147 if (key->source_type < cur->key.source_type)
@@ -159,10 +162,11 @@ struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *key, int spe
159 * conjunction with avtab_search_next_node() 162 * conjunction with avtab_search_next_node()
160 */ 163 */
161struct avtab_node* 164struct avtab_node*
162avtab_search_node(struct avtab *h, struct avtab_key *key, int specified) 165avtab_search_node(struct avtab *h, struct avtab_key *key)
163{ 166{
164 int hvalue; 167 int hvalue;
165 struct avtab_node *cur; 168 struct avtab_node *cur;
169 u16 specified = key->specified & ~(AVTAB_ENABLED|AVTAB_ENABLED_OLD);
166 170
167 if (!h) 171 if (!h)
168 return NULL; 172 return NULL;
@@ -172,7 +176,7 @@ avtab_search_node(struct avtab *h, struct avtab_key *key, int specified)
172 if (key->source_type == cur->key.source_type && 176 if (key->source_type == cur->key.source_type &&
173 key->target_type == cur->key.target_type && 177 key->target_type == cur->key.target_type &&
174 key->target_class == cur->key.target_class && 178 key->target_class == cur->key.target_class &&
175 (specified & cur->datum.specified)) 179 (specified & cur->key.specified))
176 return cur; 180 return cur;
177 181
178 if (key->source_type < cur->key.source_type) 182 if (key->source_type < cur->key.source_type)
@@ -196,11 +200,12 @@ avtab_search_node_next(struct avtab_node *node, int specified)
196 if (!node) 200 if (!node)
197 return NULL; 201 return NULL;
198 202
203 specified &= ~(AVTAB_ENABLED|AVTAB_ENABLED_OLD);
199 for (cur = node->next; cur; cur = cur->next) { 204 for (cur = node->next; cur; cur = cur->next) {
200 if (node->key.source_type == cur->key.source_type && 205 if (node->key.source_type == cur->key.source_type &&
201 node->key.target_type == cur->key.target_type && 206 node->key.target_type == cur->key.target_type &&
202 node->key.target_class == cur->key.target_class && 207 node->key.target_class == cur->key.target_class &&
203 (specified & cur->datum.specified)) 208 (specified & cur->key.specified))
204 return cur; 209 return cur;
205 210
206 if (node->key.source_type < cur->key.source_type) 211 if (node->key.source_type < cur->key.source_type)
@@ -278,76 +283,129 @@ void avtab_hash_eval(struct avtab *h, char *tag)
278 max_chain_len); 283 max_chain_len);
279} 284}
280 285
281int avtab_read_item(void *fp, struct avtab_datum *avdatum, struct avtab_key *avkey) 286static uint16_t spec_order[] = {
287 AVTAB_ALLOWED,
288 AVTAB_AUDITDENY,
289 AVTAB_AUDITALLOW,
290 AVTAB_TRANSITION,
291 AVTAB_CHANGE,
292 AVTAB_MEMBER
293};
294
295int avtab_read_item(void *fp, u32 vers, struct avtab *a,
296 int (*insertf)(struct avtab *a, struct avtab_key *k,
297 struct avtab_datum *d, void *p),
298 void *p)
282{ 299{
283 u32 buf[7]; 300 __le16 buf16[4];
284 u32 items, items2; 301 u16 enabled;
285 int rc; 302 __le32 buf32[7];
303 u32 items, items2, val;
304 struct avtab_key key;
305 struct avtab_datum datum;
306 int i, rc;
307
308 memset(&key, 0, sizeof(struct avtab_key));
309 memset(&datum, 0, sizeof(struct avtab_datum));
310
311 if (vers < POLICYDB_VERSION_AVTAB) {
312 rc = next_entry(buf32, fp, sizeof(u32));
313 if (rc < 0) {
314 printk(KERN_ERR "security: avtab: truncated entry\n");
315 return -1;
316 }
317 items2 = le32_to_cpu(buf32[0]);
318 if (items2 > ARRAY_SIZE(buf32)) {
319 printk(KERN_ERR "security: avtab: entry overflow\n");
320 return -1;
286 321
287 memset(avkey, 0, sizeof(struct avtab_key)); 322 }
288 memset(avdatum, 0, sizeof(struct avtab_datum)); 323 rc = next_entry(buf32, fp, sizeof(u32)*items2);
324 if (rc < 0) {
325 printk(KERN_ERR "security: avtab: truncated entry\n");
326 return -1;
327 }
328 items = 0;
289 329
290 rc = next_entry(buf, fp, sizeof(u32)); 330 val = le32_to_cpu(buf32[items++]);
291 if (rc < 0) { 331 key.source_type = (u16)val;
292 printk(KERN_ERR "security: avtab: truncated entry\n"); 332 if (key.source_type != val) {
293 goto bad; 333 printk("security: avtab: truncated source type\n");
294 } 334 return -1;
295 items2 = le32_to_cpu(buf[0]); 335 }
296 if (items2 > ARRAY_SIZE(buf)) { 336 val = le32_to_cpu(buf32[items++]);
297 printk(KERN_ERR "security: avtab: entry overflow\n"); 337 key.target_type = (u16)val;
298 goto bad; 338 if (key.target_type != val) {
339 printk("security: avtab: truncated target type\n");
340 return -1;
341 }
342 val = le32_to_cpu(buf32[items++]);
343 key.target_class = (u16)val;
344 if (key.target_class != val) {
345 printk("security: avtab: truncated target class\n");
346 return -1;
347 }
348
349 val = le32_to_cpu(buf32[items++]);
350 enabled = (val & AVTAB_ENABLED_OLD) ? AVTAB_ENABLED : 0;
351
352 if (!(val & (AVTAB_AV | AVTAB_TYPE))) {
353 printk("security: avtab: null entry\n");
354 return -1;
355 }
356 if ((val & AVTAB_AV) &&
357 (val & AVTAB_TYPE)) {
358 printk("security: avtab: entry has both access vectors and types\n");
359 return -1;
360 }
361
362 for (i = 0; i < sizeof(spec_order)/sizeof(u16); i++) {
363 if (val & spec_order[i]) {
364 key.specified = spec_order[i] | enabled;
365 datum.data = le32_to_cpu(buf32[items++]);
366 rc = insertf(a, &key, &datum, p);
367 if (rc) return rc;
368 }
369 }
370
371 if (items != items2) {
372 printk("security: avtab: entry only had %d items, expected %d\n", items2, items);
373 return -1;
374 }
375 return 0;
299 } 376 }
300 rc = next_entry(buf, fp, sizeof(u32)*items2); 377
378 rc = next_entry(buf16, fp, sizeof(u16)*4);
301 if (rc < 0) { 379 if (rc < 0) {
302 printk(KERN_ERR "security: avtab: truncated entry\n"); 380 printk("security: avtab: truncated entry\n");
303 goto bad; 381 return -1;
304 } 382 }
383
305 items = 0; 384 items = 0;
306 avkey->source_type = le32_to_cpu(buf[items++]); 385 key.source_type = le16_to_cpu(buf16[items++]);
307 avkey->target_type = le32_to_cpu(buf[items++]); 386 key.target_type = le16_to_cpu(buf16[items++]);
308 avkey->target_class = le32_to_cpu(buf[items++]); 387 key.target_class = le16_to_cpu(buf16[items++]);
309 avdatum->specified = le32_to_cpu(buf[items++]); 388 key.specified = le16_to_cpu(buf16[items++]);
310 if (!(avdatum->specified & (AVTAB_AV | AVTAB_TYPE))) { 389
311 printk(KERN_ERR "security: avtab: null entry\n"); 390 rc = next_entry(buf32, fp, sizeof(u32));
312 goto bad; 391 if (rc < 0) {
313 } 392 printk("security: avtab: truncated entry\n");
314 if ((avdatum->specified & AVTAB_AV) && 393 return -1;
315 (avdatum->specified & AVTAB_TYPE)) {
316 printk(KERN_ERR "security: avtab: entry has both access vectors and types\n");
317 goto bad;
318 }
319 if (avdatum->specified & AVTAB_AV) {
320 if (avdatum->specified & AVTAB_ALLOWED)
321 avtab_allowed(avdatum) = le32_to_cpu(buf[items++]);
322 if (avdatum->specified & AVTAB_AUDITDENY)
323 avtab_auditdeny(avdatum) = le32_to_cpu(buf[items++]);
324 if (avdatum->specified & AVTAB_AUDITALLOW)
325 avtab_auditallow(avdatum) = le32_to_cpu(buf[items++]);
326 } else {
327 if (avdatum->specified & AVTAB_TRANSITION)
328 avtab_transition(avdatum) = le32_to_cpu(buf[items++]);
329 if (avdatum->specified & AVTAB_CHANGE)
330 avtab_change(avdatum) = le32_to_cpu(buf[items++]);
331 if (avdatum->specified & AVTAB_MEMBER)
332 avtab_member(avdatum) = le32_to_cpu(buf[items++]);
333 }
334 if (items != items2) {
335 printk(KERN_ERR "security: avtab: entry only had %d items, expected %d\n",
336 items2, items);
337 goto bad;
338 } 394 }
395 datum.data = le32_to_cpu(*buf32);
396 return insertf(a, &key, &datum, p);
397}
339 398
340 return 0; 399static int avtab_insertf(struct avtab *a, struct avtab_key *k,
341bad: 400 struct avtab_datum *d, void *p)
342 return -1; 401{
402 return avtab_insert(a, k, d);
343} 403}
344 404
345int avtab_read(struct avtab *a, void *fp, u32 config) 405int avtab_read(struct avtab *a, void *fp, u32 vers)
346{ 406{
347 int rc; 407 int rc;
348 struct avtab_key avkey; 408 __le32 buf[1];
349 struct avtab_datum avdatum;
350 u32 buf[1];
351 u32 nel, i; 409 u32 nel, i;
352 410
353 411
@@ -363,16 +421,14 @@ int avtab_read(struct avtab *a, void *fp, u32 config)
363 goto bad; 421 goto bad;
364 } 422 }
365 for (i = 0; i < nel; i++) { 423 for (i = 0; i < nel; i++) {
366 if (avtab_read_item(fp, &avdatum, &avkey)) { 424 rc = avtab_read_item(fp,vers, a, avtab_insertf, NULL);
367 rc = -EINVAL;
368 goto bad;
369 }
370 rc = avtab_insert(a, &avkey, &avdatum);
371 if (rc) { 425 if (rc) {
372 if (rc == -ENOMEM) 426 if (rc == -ENOMEM)
373 printk(KERN_ERR "security: avtab: out of memory\n"); 427 printk(KERN_ERR "security: avtab: out of memory\n");
374 if (rc == -EEXIST) 428 else if (rc == -EEXIST)
375 printk(KERN_ERR "security: avtab: duplicate entry\n"); 429 printk(KERN_ERR "security: avtab: duplicate entry\n");
430 else
431 rc = -EINVAL;
376 goto bad; 432 goto bad;
377 } 433 }
378 } 434 }
diff --git a/security/selinux/ss/avtab.h b/security/selinux/ss/avtab.h
index 519d4f6dc655..0a90d939af93 100644
--- a/security/selinux/ss/avtab.h
+++ b/security/selinux/ss/avtab.h
@@ -21,12 +21,9 @@
21#define _SS_AVTAB_H_ 21#define _SS_AVTAB_H_
22 22
23struct avtab_key { 23struct avtab_key {
24 u32 source_type; /* source type */ 24 u16 source_type; /* source type */
25 u32 target_type; /* target type */ 25 u16 target_type; /* target type */
26 u32 target_class; /* target object class */ 26 u16 target_class; /* target object class */
27};
28
29struct avtab_datum {
30#define AVTAB_ALLOWED 1 27#define AVTAB_ALLOWED 1
31#define AVTAB_AUDITALLOW 2 28#define AVTAB_AUDITALLOW 2
32#define AVTAB_AUDITDENY 4 29#define AVTAB_AUDITDENY 4
@@ -35,15 +32,13 @@ struct avtab_datum {
35#define AVTAB_MEMBER 32 32#define AVTAB_MEMBER 32
36#define AVTAB_CHANGE 64 33#define AVTAB_CHANGE 64
37#define AVTAB_TYPE (AVTAB_TRANSITION | AVTAB_MEMBER | AVTAB_CHANGE) 34#define AVTAB_TYPE (AVTAB_TRANSITION | AVTAB_MEMBER | AVTAB_CHANGE)
38#define AVTAB_ENABLED 0x80000000 /* reserved for used in cond_avtab */ 35#define AVTAB_ENABLED_OLD 0x80000000 /* reserved for used in cond_avtab */
39 u32 specified; /* what fields are specified */ 36#define AVTAB_ENABLED 0x8000 /* reserved for used in cond_avtab */
40 u32 data[3]; /* access vectors or types */ 37 u16 specified; /* what field is specified */
41#define avtab_allowed(x) (x)->data[0] 38};
42#define avtab_auditdeny(x) (x)->data[1] 39
43#define avtab_auditallow(x) (x)->data[2] 40struct avtab_datum {
44#define avtab_transition(x) (x)->data[0] 41 u32 data; /* access vector or type value */
45#define avtab_change(x) (x)->data[1]
46#define avtab_member(x) (x)->data[2]
47}; 42};
48 43
49struct avtab_node { 44struct avtab_node {
@@ -58,17 +53,21 @@ struct avtab {
58}; 53};
59 54
60int avtab_init(struct avtab *); 55int avtab_init(struct avtab *);
61struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *k, int specified); 56struct avtab_datum *avtab_search(struct avtab *h, struct avtab_key *k);
62void avtab_destroy(struct avtab *h); 57void avtab_destroy(struct avtab *h);
63void avtab_hash_eval(struct avtab *h, char *tag); 58void avtab_hash_eval(struct avtab *h, char *tag);
64 59
65int avtab_read_item(void *fp, struct avtab_datum *avdatum, struct avtab_key *avkey); 60int avtab_read_item(void *fp, uint32_t vers, struct avtab *a,
66int avtab_read(struct avtab *a, void *fp, u32 config); 61 int (*insert)(struct avtab *a, struct avtab_key *k,
62 struct avtab_datum *d, void *p),
63 void *p);
64
65int avtab_read(struct avtab *a, void *fp, u32 vers);
67 66
68struct avtab_node *avtab_insert_nonunique(struct avtab *h, struct avtab_key *key, 67struct avtab_node *avtab_insert_nonunique(struct avtab *h, struct avtab_key *key,
69 struct avtab_datum *datum); 68 struct avtab_datum *datum);
70 69
71struct avtab_node *avtab_search_node(struct avtab *h, struct avtab_key *key, int specified); 70struct avtab_node *avtab_search_node(struct avtab *h, struct avtab_key *key);
72 71
73struct avtab_node *avtab_search_node_next(struct avtab_node *node, int specified); 72struct avtab_node *avtab_search_node_next(struct avtab_node *node, int specified);
74 73
diff --git a/security/selinux/ss/conditional.c b/security/selinux/ss/conditional.c
index e2057f5a411a..daf288007460 100644
--- a/security/selinux/ss/conditional.c
+++ b/security/selinux/ss/conditional.c
@@ -100,18 +100,18 @@ int evaluate_cond_node(struct policydb *p, struct cond_node *node)
100 /* turn the rules on or off */ 100 /* turn the rules on or off */
101 for (cur = node->true_list; cur != NULL; cur = cur->next) { 101 for (cur = node->true_list; cur != NULL; cur = cur->next) {
102 if (new_state <= 0) { 102 if (new_state <= 0) {
103 cur->node->datum.specified &= ~AVTAB_ENABLED; 103 cur->node->key.specified &= ~AVTAB_ENABLED;
104 } else { 104 } else {
105 cur->node->datum.specified |= AVTAB_ENABLED; 105 cur->node->key.specified |= AVTAB_ENABLED;
106 } 106 }
107 } 107 }
108 108
109 for (cur = node->false_list; cur != NULL; cur = cur->next) { 109 for (cur = node->false_list; cur != NULL; cur = cur->next) {
110 /* -1 or 1 */ 110 /* -1 or 1 */
111 if (new_state) { 111 if (new_state) {
112 cur->node->datum.specified &= ~AVTAB_ENABLED; 112 cur->node->key.specified &= ~AVTAB_ENABLED;
113 } else { 113 } else {
114 cur->node->datum.specified |= AVTAB_ENABLED; 114 cur->node->key.specified |= AVTAB_ENABLED;
115 } 115 }
116 } 116 }
117 } 117 }
@@ -216,7 +216,8 @@ int cond_read_bool(struct policydb *p, struct hashtab *h, void *fp)
216{ 216{
217 char *key = NULL; 217 char *key = NULL;
218 struct cond_bool_datum *booldatum; 218 struct cond_bool_datum *booldatum;
219 u32 buf[3], len; 219 __le32 buf[3];
220 u32 len;
220 int rc; 221 int rc;
221 222
222 booldatum = kmalloc(sizeof(struct cond_bool_datum), GFP_KERNEL); 223 booldatum = kmalloc(sizeof(struct cond_bool_datum), GFP_KERNEL);
@@ -252,104 +253,127 @@ err:
252 return -1; 253 return -1;
253} 254}
254 255
255static int cond_read_av_list(struct policydb *p, void *fp, struct cond_av_list **ret_list, 256struct cond_insertf_data
256 struct cond_av_list *other)
257{ 257{
258 struct cond_av_list *list, *last = NULL, *cur; 258 struct policydb *p;
259 struct avtab_key key; 259 struct cond_av_list *other;
260 struct avtab_datum datum; 260 struct cond_av_list *head;
261 struct cond_av_list *tail;
262};
263
264static int cond_insertf(struct avtab *a, struct avtab_key *k, struct avtab_datum *d, void *ptr)
265{
266 struct cond_insertf_data *data = ptr;
267 struct policydb *p = data->p;
268 struct cond_av_list *other = data->other, *list, *cur;
261 struct avtab_node *node_ptr; 269 struct avtab_node *node_ptr;
262 int rc;
263 u32 buf[1], i, len;
264 u8 found; 270 u8 found;
265 271
266 *ret_list = NULL;
267
268 len = 0;
269 rc = next_entry(buf, fp, sizeof buf);
270 if (rc < 0)
271 return -1;
272
273 len = le32_to_cpu(buf[0]);
274 if (len == 0) {
275 return 0;
276 }
277 272
278 for (i = 0; i < len; i++) { 273 /*
279 if (avtab_read_item(fp, &datum, &key)) 274 * For type rules we have to make certain there aren't any
275 * conflicting rules by searching the te_avtab and the
276 * cond_te_avtab.
277 */
278 if (k->specified & AVTAB_TYPE) {
279 if (avtab_search(&p->te_avtab, k)) {
280 printk("security: type rule already exists outside of a conditional.");
280 goto err; 281 goto err;
281 282 }
282 /* 283 /*
283 * For type rules we have to make certain there aren't any 284 * If we are reading the false list other will be a pointer to
284 * conflicting rules by searching the te_avtab and the 285 * the true list. We can have duplicate entries if there is only
285 * cond_te_avtab. 286 * 1 other entry and it is in our true list.
287 *
288 * If we are reading the true list (other == NULL) there shouldn't
289 * be any other entries.
286 */ 290 */
287 if (datum.specified & AVTAB_TYPE) { 291 if (other) {
288 if (avtab_search(&p->te_avtab, &key, AVTAB_TYPE)) { 292 node_ptr = avtab_search_node(&p->te_cond_avtab, k);
289 printk("security: type rule already exists outside of a conditional."); 293 if (node_ptr) {
290 goto err; 294 if (avtab_search_node_next(node_ptr, k->specified)) {
291 } 295 printk("security: too many conflicting type rules.");
292 /* 296 goto err;
293 * If we are reading the false list other will be a pointer to 297 }
294 * the true list. We can have duplicate entries if there is only 298 found = 0;
295 * 1 other entry and it is in our true list. 299 for (cur = other; cur != NULL; cur = cur->next) {
296 * 300 if (cur->node == node_ptr) {
297 * If we are reading the true list (other == NULL) there shouldn't 301 found = 1;
298 * be any other entries. 302 break;
299 */
300 if (other) {
301 node_ptr = avtab_search_node(&p->te_cond_avtab, &key, AVTAB_TYPE);
302 if (node_ptr) {
303 if (avtab_search_node_next(node_ptr, AVTAB_TYPE)) {
304 printk("security: too many conflicting type rules.");
305 goto err;
306 }
307 found = 0;
308 for (cur = other; cur != NULL; cur = cur->next) {
309 if (cur->node == node_ptr) {
310 found = 1;
311 break;
312 }
313 }
314 if (!found) {
315 printk("security: conflicting type rules.");
316 goto err;
317 } 303 }
318 } 304 }
319 } else { 305 if (!found) {
320 if (avtab_search(&p->te_cond_avtab, &key, AVTAB_TYPE)) { 306 printk("security: conflicting type rules.\n");
321 printk("security: conflicting type rules when adding type rule for true.");
322 goto err; 307 goto err;
323 } 308 }
324 } 309 }
310 } else {
311 if (avtab_search(&p->te_cond_avtab, k)) {
312 printk("security: conflicting type rules when adding type rule for true.\n");
313 goto err;
314 }
325 } 315 }
326 node_ptr = avtab_insert_nonunique(&p->te_cond_avtab, &key, &datum); 316 }
327 if (!node_ptr) {
328 printk("security: could not insert rule.");
329 goto err;
330 }
331
332 list = kmalloc(sizeof(struct cond_av_list), GFP_KERNEL);
333 if (!list)
334 goto err;
335 memset(list, 0, sizeof(struct cond_av_list));
336
337 list->node = node_ptr;
338 if (i == 0)
339 *ret_list = list;
340 else
341 last->next = list;
342 last = list;
343 317
318 node_ptr = avtab_insert_nonunique(&p->te_cond_avtab, k, d);
319 if (!node_ptr) {
320 printk("security: could not insert rule.");
321 goto err;
344 } 322 }
345 323
324 list = kmalloc(sizeof(struct cond_av_list), GFP_KERNEL);
325 if (!list)
326 goto err;
327 memset(list, 0, sizeof(*list));
328
329 list->node = node_ptr;
330 if (!data->head)
331 data->head = list;
332 else
333 data->tail->next = list;
334 data->tail = list;
346 return 0; 335 return 0;
336
347err: 337err:
348 cond_av_list_destroy(*ret_list); 338 cond_av_list_destroy(data->head);
349 *ret_list = NULL; 339 data->head = NULL;
350 return -1; 340 return -1;
351} 341}
352 342
343static int cond_read_av_list(struct policydb *p, void *fp, struct cond_av_list **ret_list, struct cond_av_list *other)
344{
345 int i, rc;
346 __le32 buf[1];
347 u32 len;
348 struct cond_insertf_data data;
349
350 *ret_list = NULL;
351
352 len = 0;
353 rc = next_entry(buf, fp, sizeof(u32));
354 if (rc < 0)
355 return -1;
356
357 len = le32_to_cpu(buf[0]);
358 if (len == 0) {
359 return 0;
360 }
361
362 data.p = p;
363 data.other = other;
364 data.head = NULL;
365 data.tail = NULL;
366 for (i = 0; i < len; i++) {
367 rc = avtab_read_item(fp, p->policyvers, &p->te_cond_avtab, cond_insertf, &data);
368 if (rc)
369 return rc;
370
371 }
372
373 *ret_list = data.head;
374 return 0;
375}
376
353static int expr_isvalid(struct policydb *p, struct cond_expr *expr) 377static int expr_isvalid(struct policydb *p, struct cond_expr *expr)
354{ 378{
355 if (expr->expr_type <= 0 || expr->expr_type > COND_LAST) { 379 if (expr->expr_type <= 0 || expr->expr_type > COND_LAST) {
@@ -366,7 +390,8 @@ static int expr_isvalid(struct policydb *p, struct cond_expr *expr)
366 390
367static int cond_read_node(struct policydb *p, struct cond_node *node, void *fp) 391static int cond_read_node(struct policydb *p, struct cond_node *node, void *fp)
368{ 392{
369 u32 buf[2], len, i; 393 __le32 buf[2];
394 u32 len, i;
370 int rc; 395 int rc;
371 struct cond_expr *expr = NULL, *last = NULL; 396 struct cond_expr *expr = NULL, *last = NULL;
372 397
@@ -424,7 +449,8 @@ err:
424int cond_read_list(struct policydb *p, void *fp) 449int cond_read_list(struct policydb *p, void *fp)
425{ 450{
426 struct cond_node *node, *last = NULL; 451 struct cond_node *node, *last = NULL;
427 u32 buf[1], i, len; 452 __le32 buf[1];
453 u32 i, len;
428 int rc; 454 int rc;
429 455
430 rc = next_entry(buf, fp, sizeof buf); 456 rc = next_entry(buf, fp, sizeof buf);
@@ -452,6 +478,7 @@ int cond_read_list(struct policydb *p, void *fp)
452 return 0; 478 return 0;
453err: 479err:
454 cond_list_destroy(p->cond_list); 480 cond_list_destroy(p->cond_list);
481 p->cond_list = NULL;
455 return -1; 482 return -1;
456} 483}
457 484
@@ -465,22 +492,22 @@ void cond_compute_av(struct avtab *ctab, struct avtab_key *key, struct av_decisi
465 if(!ctab || !key || !avd) 492 if(!ctab || !key || !avd)
466 return; 493 return;
467 494
468 for(node = avtab_search_node(ctab, key, AVTAB_AV); node != NULL; 495 for(node = avtab_search_node(ctab, key); node != NULL;
469 node = avtab_search_node_next(node, AVTAB_AV)) { 496 node = avtab_search_node_next(node, key->specified)) {
470 if ( (__u32) (AVTAB_ALLOWED|AVTAB_ENABLED) == 497 if ( (u16) (AVTAB_ALLOWED|AVTAB_ENABLED) ==
471 (node->datum.specified & (AVTAB_ALLOWED|AVTAB_ENABLED))) 498 (node->key.specified & (AVTAB_ALLOWED|AVTAB_ENABLED)))
472 avd->allowed |= avtab_allowed(&node->datum); 499 avd->allowed |= node->datum.data;
473 if ( (__u32) (AVTAB_AUDITDENY|AVTAB_ENABLED) == 500 if ( (u16) (AVTAB_AUDITDENY|AVTAB_ENABLED) ==
474 (node->datum.specified & (AVTAB_AUDITDENY|AVTAB_ENABLED))) 501 (node->key.specified & (AVTAB_AUDITDENY|AVTAB_ENABLED)))
475 /* Since a '0' in an auditdeny mask represents a 502 /* Since a '0' in an auditdeny mask represents a
476 * permission we do NOT want to audit (dontaudit), we use 503 * permission we do NOT want to audit (dontaudit), we use
477 * the '&' operand to ensure that all '0's in the mask 504 * the '&' operand to ensure that all '0's in the mask
478 * are retained (much unlike the allow and auditallow cases). 505 * are retained (much unlike the allow and auditallow cases).
479 */ 506 */
480 avd->auditdeny &= avtab_auditdeny(&node->datum); 507 avd->auditdeny &= node->datum.data;
481 if ( (__u32) (AVTAB_AUDITALLOW|AVTAB_ENABLED) == 508 if ( (u16) (AVTAB_AUDITALLOW|AVTAB_ENABLED) ==
482 (node->datum.specified & (AVTAB_AUDITALLOW|AVTAB_ENABLED))) 509 (node->key.specified & (AVTAB_AUDITALLOW|AVTAB_ENABLED)))
483 avd->auditallow |= avtab_auditallow(&node->datum); 510 avd->auditallow |= node->datum.data;
484 } 511 }
485 return; 512 return;
486} 513}
diff --git a/security/selinux/ss/ebitmap.c b/security/selinux/ss/ebitmap.c
index d8ce9cc0b9f1..d515154128cc 100644
--- a/security/selinux/ss/ebitmap.c
+++ b/security/selinux/ss/ebitmap.c
@@ -196,8 +196,9 @@ int ebitmap_read(struct ebitmap *e, void *fp)
196{ 196{
197 int rc; 197 int rc;
198 struct ebitmap_node *n, *l; 198 struct ebitmap_node *n, *l;
199 u32 buf[3], mapsize, count, i; 199 __le32 buf[3];
200 u64 map; 200 u32 mapsize, count, i;
201 __le64 map;
201 202
202 ebitmap_init(e); 203 ebitmap_init(e);
203 204
diff --git a/security/selinux/ss/ebitmap.h b/security/selinux/ss/ebitmap.h
index 471370233fd9..8bf41055a6cb 100644
--- a/security/selinux/ss/ebitmap.h
+++ b/security/selinux/ss/ebitmap.h
@@ -32,11 +32,41 @@ struct ebitmap {
32#define ebitmap_length(e) ((e)->highbit) 32#define ebitmap_length(e) ((e)->highbit)
33#define ebitmap_startbit(e) ((e)->node ? (e)->node->startbit : 0) 33#define ebitmap_startbit(e) ((e)->node ? (e)->node->startbit : 0)
34 34
35static inline unsigned int ebitmap_start(struct ebitmap *e,
36 struct ebitmap_node **n)
37{
38 *n = e->node;
39 return ebitmap_startbit(e);
40}
41
35static inline void ebitmap_init(struct ebitmap *e) 42static inline void ebitmap_init(struct ebitmap *e)
36{ 43{
37 memset(e, 0, sizeof(*e)); 44 memset(e, 0, sizeof(*e));
38} 45}
39 46
47static inline unsigned int ebitmap_next(struct ebitmap_node **n,
48 unsigned int bit)
49{
50 if ((bit == ((*n)->startbit + MAPSIZE - 1)) &&
51 (*n)->next) {
52 *n = (*n)->next;
53 return (*n)->startbit;
54 }
55
56 return (bit+1);
57}
58
59static inline int ebitmap_node_get_bit(struct ebitmap_node * n,
60 unsigned int bit)
61{
62 if (n->map & (MAPBIT << (bit - n->startbit)))
63 return 1;
64 return 0;
65}
66
67#define ebitmap_for_each_bit(e, n, bit) \
68 for (bit = ebitmap_start(e, &n); bit < ebitmap_length(e); bit = ebitmap_next(&n, bit)) \
69
40int ebitmap_cmp(struct ebitmap *e1, struct ebitmap *e2); 70int ebitmap_cmp(struct ebitmap *e1, struct ebitmap *e2);
41int ebitmap_cpy(struct ebitmap *dst, struct ebitmap *src); 71int ebitmap_cpy(struct ebitmap *dst, struct ebitmap *src);
42int ebitmap_contains(struct ebitmap *e1, struct ebitmap *e2); 72int ebitmap_contains(struct ebitmap *e1, struct ebitmap *e2);
diff --git a/security/selinux/ss/mls.c b/security/selinux/ss/mls.c
index d4c32c39ccc9..aaefac2921f1 100644
--- a/security/selinux/ss/mls.c
+++ b/security/selinux/ss/mls.c
@@ -27,6 +27,7 @@
27int mls_compute_context_len(struct context * context) 27int mls_compute_context_len(struct context * context)
28{ 28{
29 int i, l, len, range; 29 int i, l, len, range;
30 struct ebitmap_node *node;
30 31
31 if (!selinux_mls_enabled) 32 if (!selinux_mls_enabled)
32 return 0; 33 return 0;
@@ -36,24 +37,24 @@ int mls_compute_context_len(struct context * context)
36 range = 0; 37 range = 0;
37 len += strlen(policydb.p_sens_val_to_name[context->range.level[l].sens - 1]); 38 len += strlen(policydb.p_sens_val_to_name[context->range.level[l].sens - 1]);
38 39
39 for (i = 1; i <= ebitmap_length(&context->range.level[l].cat); i++) { 40 ebitmap_for_each_bit(&context->range.level[l].cat, node, i) {
40 if (ebitmap_get_bit(&context->range.level[l].cat, i - 1)) { 41 if (ebitmap_node_get_bit(node, i)) {
41 if (range) { 42 if (range) {
42 range++; 43 range++;
43 continue; 44 continue;
44 } 45 }
45 46
46 len += strlen(policydb.p_cat_val_to_name[i - 1]) + 1; 47 len += strlen(policydb.p_cat_val_to_name[i]) + 1;
47 range++; 48 range++;
48 } else { 49 } else {
49 if (range > 1) 50 if (range > 1)
50 len += strlen(policydb.p_cat_val_to_name[i - 2]) + 1; 51 len += strlen(policydb.p_cat_val_to_name[i - 1]) + 1;
51 range = 0; 52 range = 0;
52 } 53 }
53 } 54 }
54 /* Handle case where last category is the end of range */ 55 /* Handle case where last category is the end of range */
55 if (range > 1) 56 if (range > 1)
56 len += strlen(policydb.p_cat_val_to_name[i - 2]) + 1; 57 len += strlen(policydb.p_cat_val_to_name[i - 1]) + 1;
57 58
58 if (l == 0) { 59 if (l == 0) {
59 if (mls_level_eq(&context->range.level[0], 60 if (mls_level_eq(&context->range.level[0],
@@ -77,6 +78,7 @@ void mls_sid_to_context(struct context *context,
77{ 78{
78 char *scontextp; 79 char *scontextp;
79 int i, l, range, wrote_sep; 80 int i, l, range, wrote_sep;
81 struct ebitmap_node *node;
80 82
81 if (!selinux_mls_enabled) 83 if (!selinux_mls_enabled)
82 return; 84 return;
@@ -94,8 +96,8 @@ void mls_sid_to_context(struct context *context,
94 scontextp += strlen(policydb.p_sens_val_to_name[context->range.level[l].sens - 1]); 96 scontextp += strlen(policydb.p_sens_val_to_name[context->range.level[l].sens - 1]);
95 97
96 /* categories */ 98 /* categories */
97 for (i = 1; i <= ebitmap_length(&context->range.level[l].cat); i++) { 99 ebitmap_for_each_bit(&context->range.level[l].cat, node, i) {
98 if (ebitmap_get_bit(&context->range.level[l].cat, i - 1)) { 100 if (ebitmap_node_get_bit(node, i)) {
99 if (range) { 101 if (range) {
100 range++; 102 range++;
101 continue; 103 continue;
@@ -106,8 +108,8 @@ void mls_sid_to_context(struct context *context,
106 wrote_sep = 1; 108 wrote_sep = 1;
107 } else 109 } else
108 *scontextp++ = ','; 110 *scontextp++ = ',';
109 strcpy(scontextp, policydb.p_cat_val_to_name[i - 1]); 111 strcpy(scontextp, policydb.p_cat_val_to_name[i]);
110 scontextp += strlen(policydb.p_cat_val_to_name[i - 1]); 112 scontextp += strlen(policydb.p_cat_val_to_name[i]);
111 range++; 113 range++;
112 } else { 114 } else {
113 if (range > 1) { 115 if (range > 1) {
@@ -116,8 +118,8 @@ void mls_sid_to_context(struct context *context,
116 else 118 else
117 *scontextp++ = ','; 119 *scontextp++ = ',';
118 120
119 strcpy(scontextp, policydb.p_cat_val_to_name[i - 2]); 121 strcpy(scontextp, policydb.p_cat_val_to_name[i - 1]);
120 scontextp += strlen(policydb.p_cat_val_to_name[i - 2]); 122 scontextp += strlen(policydb.p_cat_val_to_name[i - 1]);
121 } 123 }
122 range = 0; 124 range = 0;
123 } 125 }
@@ -130,8 +132,8 @@ void mls_sid_to_context(struct context *context,
130 else 132 else
131 *scontextp++ = ','; 133 *scontextp++ = ',';
132 134
133 strcpy(scontextp, policydb.p_cat_val_to_name[i - 2]); 135 strcpy(scontextp, policydb.p_cat_val_to_name[i - 1]);
134 scontextp += strlen(policydb.p_cat_val_to_name[i - 2]); 136 scontextp += strlen(policydb.p_cat_val_to_name[i - 1]);
135 } 137 }
136 138
137 if (l == 0) { 139 if (l == 0) {
@@ -157,6 +159,7 @@ int mls_context_isvalid(struct policydb *p, struct context *c)
157{ 159{
158 struct level_datum *levdatum; 160 struct level_datum *levdatum;
159 struct user_datum *usrdatum; 161 struct user_datum *usrdatum;
162 struct ebitmap_node *node;
160 int i, l; 163 int i, l;
161 164
162 if (!selinux_mls_enabled) 165 if (!selinux_mls_enabled)
@@ -179,11 +182,11 @@ int mls_context_isvalid(struct policydb *p, struct context *c)
179 if (!levdatum) 182 if (!levdatum)
180 return 0; 183 return 0;
181 184
182 for (i = 1; i <= ebitmap_length(&c->range.level[l].cat); i++) { 185 ebitmap_for_each_bit(&c->range.level[l].cat, node, i) {
183 if (ebitmap_get_bit(&c->range.level[l].cat, i - 1)) { 186 if (ebitmap_node_get_bit(node, i)) {
184 if (i > p->p_cats.nprim) 187 if (i > p->p_cats.nprim)
185 return 0; 188 return 0;
186 if (!ebitmap_get_bit(&levdatum->level->cat, i - 1)) 189 if (!ebitmap_get_bit(&levdatum->level->cat, i))
187 /* 190 /*
188 * Category may not be associated with 191 * Category may not be associated with
189 * sensitivity in low level. 192 * sensitivity in low level.
@@ -468,6 +471,7 @@ int mls_convert_context(struct policydb *oldp,
468 struct level_datum *levdatum; 471 struct level_datum *levdatum;
469 struct cat_datum *catdatum; 472 struct cat_datum *catdatum;
470 struct ebitmap bitmap; 473 struct ebitmap bitmap;
474 struct ebitmap_node *node;
471 int l, i; 475 int l, i;
472 476
473 if (!selinux_mls_enabled) 477 if (!selinux_mls_enabled)
@@ -482,12 +486,12 @@ int mls_convert_context(struct policydb *oldp,
482 c->range.level[l].sens = levdatum->level->sens; 486 c->range.level[l].sens = levdatum->level->sens;
483 487
484 ebitmap_init(&bitmap); 488 ebitmap_init(&bitmap);
485 for (i = 1; i <= ebitmap_length(&c->range.level[l].cat); i++) { 489 ebitmap_for_each_bit(&c->range.level[l].cat, node, i) {
486 if (ebitmap_get_bit(&c->range.level[l].cat, i - 1)) { 490 if (ebitmap_node_get_bit(node, i)) {
487 int rc; 491 int rc;
488 492
489 catdatum = hashtab_search(newp->p_cats.table, 493 catdatum = hashtab_search(newp->p_cats.table,
490 oldp->p_cat_val_to_name[i - 1]); 494 oldp->p_cat_val_to_name[i]);
491 if (!catdatum) 495 if (!catdatum)
492 return -EINVAL; 496 return -EINVAL;
493 rc = ebitmap_set_bit(&bitmap, catdatum->value - 1, 1); 497 rc = ebitmap_set_bit(&bitmap, catdatum->value - 1, 1);
diff --git a/security/selinux/ss/policydb.c b/security/selinux/ss/policydb.c
index 785c33cf4864..0a758323a9cf 100644
--- a/security/selinux/ss/policydb.c
+++ b/security/selinux/ss/policydb.c
@@ -91,6 +91,11 @@ static struct policydb_compat_info policydb_compat[] = {
91 .sym_num = SYM_NUM, 91 .sym_num = SYM_NUM,
92 .ocon_num = OCON_NUM, 92 .ocon_num = OCON_NUM,
93 }, 93 },
94 {
95 .version = POLICYDB_VERSION_AVTAB,
96 .sym_num = SYM_NUM,
97 .ocon_num = OCON_NUM,
98 },
94}; 99};
95 100
96static struct policydb_compat_info *policydb_lookup_compat(int version) 101static struct policydb_compat_info *policydb_lookup_compat(int version)
@@ -584,6 +589,9 @@ void policydb_destroy(struct policydb *p)
584 struct ocontext *c, *ctmp; 589 struct ocontext *c, *ctmp;
585 struct genfs *g, *gtmp; 590 struct genfs *g, *gtmp;
586 int i; 591 int i;
592 struct role_allow *ra, *lra = NULL;
593 struct role_trans *tr, *ltr = NULL;
594 struct range_trans *rt, *lrt = NULL;
587 595
588 for (i = 0; i < SYM_NUM; i++) { 596 for (i = 0; i < SYM_NUM; i++) {
589 hashtab_map(p->symtab[i].table, destroy_f[i], NULL); 597 hashtab_map(p->symtab[i].table, destroy_f[i], NULL);
@@ -624,6 +632,28 @@ void policydb_destroy(struct policydb *p)
624 632
625 cond_policydb_destroy(p); 633 cond_policydb_destroy(p);
626 634
635 for (tr = p->role_tr; tr; tr = tr->next) {
636 if (ltr) kfree(ltr);
637 ltr = tr;
638 }
639 if (ltr) kfree(ltr);
640
641 for (ra = p->role_allow; ra; ra = ra -> next) {
642 if (lra) kfree(lra);
643 lra = ra;
644 }
645 if (lra) kfree(lra);
646
647 for (rt = p->range_tr; rt; rt = rt -> next) {
648 if (lrt) kfree(lrt);
649 lrt = rt;
650 }
651 if (lrt) kfree(lrt);
652
653 for (i = 0; i < p->p_types.nprim; i++)
654 ebitmap_destroy(&p->type_attr_map[i]);
655 kfree(p->type_attr_map);
656
627 return; 657 return;
628} 658}
629 659
@@ -714,7 +744,8 @@ int policydb_context_isvalid(struct policydb *p, struct context *c)
714 */ 744 */
715static int mls_read_range_helper(struct mls_range *r, void *fp) 745static int mls_read_range_helper(struct mls_range *r, void *fp)
716{ 746{
717 u32 buf[2], items; 747 __le32 buf[2];
748 u32 items;
718 int rc; 749 int rc;
719 750
720 rc = next_entry(buf, fp, sizeof(u32)); 751 rc = next_entry(buf, fp, sizeof(u32));
@@ -775,7 +806,7 @@ static int context_read_and_validate(struct context *c,
775 struct policydb *p, 806 struct policydb *p,
776 void *fp) 807 void *fp)
777{ 808{
778 u32 buf[3]; 809 __le32 buf[3];
779 int rc; 810 int rc;
780 811
781 rc = next_entry(buf, fp, sizeof buf); 812 rc = next_entry(buf, fp, sizeof buf);
@@ -815,7 +846,8 @@ static int perm_read(struct policydb *p, struct hashtab *h, void *fp)
815 char *key = NULL; 846 char *key = NULL;
816 struct perm_datum *perdatum; 847 struct perm_datum *perdatum;
817 int rc; 848 int rc;
818 u32 buf[2], len; 849 __le32 buf[2];
850 u32 len;
819 851
820 perdatum = kmalloc(sizeof(*perdatum), GFP_KERNEL); 852 perdatum = kmalloc(sizeof(*perdatum), GFP_KERNEL);
821 if (!perdatum) { 853 if (!perdatum) {
@@ -855,7 +887,8 @@ static int common_read(struct policydb *p, struct hashtab *h, void *fp)
855{ 887{
856 char *key = NULL; 888 char *key = NULL;
857 struct common_datum *comdatum; 889 struct common_datum *comdatum;
858 u32 buf[4], len, nel; 890 __le32 buf[4];
891 u32 len, nel;
859 int i, rc; 892 int i, rc;
860 893
861 comdatum = kmalloc(sizeof(*comdatum), GFP_KERNEL); 894 comdatum = kmalloc(sizeof(*comdatum), GFP_KERNEL);
@@ -909,7 +942,8 @@ static int read_cons_helper(struct constraint_node **nodep, int ncons,
909{ 942{
910 struct constraint_node *c, *lc; 943 struct constraint_node *c, *lc;
911 struct constraint_expr *e, *le; 944 struct constraint_expr *e, *le;
912 u32 buf[3], nexpr; 945 __le32 buf[3];
946 u32 nexpr;
913 int rc, i, j, depth; 947 int rc, i, j, depth;
914 948
915 lc = NULL; 949 lc = NULL;
@@ -993,7 +1027,8 @@ static int class_read(struct policydb *p, struct hashtab *h, void *fp)
993{ 1027{
994 char *key = NULL; 1028 char *key = NULL;
995 struct class_datum *cladatum; 1029 struct class_datum *cladatum;
996 u32 buf[6], len, len2, ncons, nel; 1030 __le32 buf[6];
1031 u32 len, len2, ncons, nel;
997 int i, rc; 1032 int i, rc;
998 1033
999 cladatum = kmalloc(sizeof(*cladatum), GFP_KERNEL); 1034 cladatum = kmalloc(sizeof(*cladatum), GFP_KERNEL);
@@ -1087,7 +1122,8 @@ static int role_read(struct policydb *p, struct hashtab *h, void *fp)
1087 char *key = NULL; 1122 char *key = NULL;
1088 struct role_datum *role; 1123 struct role_datum *role;
1089 int rc; 1124 int rc;
1090 u32 buf[2], len; 1125 __le32 buf[2];
1126 u32 len;
1091 1127
1092 role = kmalloc(sizeof(*role), GFP_KERNEL); 1128 role = kmalloc(sizeof(*role), GFP_KERNEL);
1093 if (!role) { 1129 if (!role) {
@@ -1147,7 +1183,8 @@ static int type_read(struct policydb *p, struct hashtab *h, void *fp)
1147 char *key = NULL; 1183 char *key = NULL;
1148 struct type_datum *typdatum; 1184 struct type_datum *typdatum;
1149 int rc; 1185 int rc;
1150 u32 buf[3], len; 1186 __le32 buf[3];
1187 u32 len;
1151 1188
1152 typdatum = kmalloc(sizeof(*typdatum),GFP_KERNEL); 1189 typdatum = kmalloc(sizeof(*typdatum),GFP_KERNEL);
1153 if (!typdatum) { 1190 if (!typdatum) {
@@ -1191,7 +1228,7 @@ bad:
1191 */ 1228 */
1192static int mls_read_level(struct mls_level *lp, void *fp) 1229static int mls_read_level(struct mls_level *lp, void *fp)
1193{ 1230{
1194 u32 buf[1]; 1231 __le32 buf[1];
1195 int rc; 1232 int rc;
1196 1233
1197 memset(lp, 0, sizeof(*lp)); 1234 memset(lp, 0, sizeof(*lp));
@@ -1219,7 +1256,8 @@ static int user_read(struct policydb *p, struct hashtab *h, void *fp)
1219 char *key = NULL; 1256 char *key = NULL;
1220 struct user_datum *usrdatum; 1257 struct user_datum *usrdatum;
1221 int rc; 1258 int rc;
1222 u32 buf[2], len; 1259 __le32 buf[2];
1260 u32 len;
1223 1261
1224 usrdatum = kmalloc(sizeof(*usrdatum), GFP_KERNEL); 1262 usrdatum = kmalloc(sizeof(*usrdatum), GFP_KERNEL);
1225 if (!usrdatum) { 1263 if (!usrdatum) {
@@ -1273,7 +1311,8 @@ static int sens_read(struct policydb *p, struct hashtab *h, void *fp)
1273 char *key = NULL; 1311 char *key = NULL;
1274 struct level_datum *levdatum; 1312 struct level_datum *levdatum;
1275 int rc; 1313 int rc;
1276 u32 buf[2], len; 1314 __le32 buf[2];
1315 u32 len;
1277 1316
1278 levdatum = kmalloc(sizeof(*levdatum), GFP_ATOMIC); 1317 levdatum = kmalloc(sizeof(*levdatum), GFP_ATOMIC);
1279 if (!levdatum) { 1318 if (!levdatum) {
@@ -1324,7 +1363,8 @@ static int cat_read(struct policydb *p, struct hashtab *h, void *fp)
1324 char *key = NULL; 1363 char *key = NULL;
1325 struct cat_datum *catdatum; 1364 struct cat_datum *catdatum;
1326 int rc; 1365 int rc;
1327 u32 buf[3], len; 1366 __le32 buf[3];
1367 u32 len;
1328 1368
1329 catdatum = kmalloc(sizeof(*catdatum), GFP_ATOMIC); 1369 catdatum = kmalloc(sizeof(*catdatum), GFP_ATOMIC);
1330 if (!catdatum) { 1370 if (!catdatum) {
@@ -1387,7 +1427,8 @@ int policydb_read(struct policydb *p, void *fp)
1387 struct ocontext *l, *c, *newc; 1427 struct ocontext *l, *c, *newc;
1388 struct genfs *genfs_p, *genfs, *newgenfs; 1428 struct genfs *genfs_p, *genfs, *newgenfs;
1389 int i, j, rc; 1429 int i, j, rc;
1390 u32 buf[8], len, len2, config, nprim, nel, nel2; 1430 __le32 buf[8];
1431 u32 len, len2, config, nprim, nel, nel2;
1391 char *policydb_str; 1432 char *policydb_str;
1392 struct policydb_compat_info *info; 1433 struct policydb_compat_info *info;
1393 struct range_trans *rt, *lrt; 1434 struct range_trans *rt, *lrt;
@@ -1403,17 +1444,14 @@ int policydb_read(struct policydb *p, void *fp)
1403 if (rc < 0) 1444 if (rc < 0)
1404 goto bad; 1445 goto bad;
1405 1446
1406 for (i = 0; i < 2; i++) 1447 if (le32_to_cpu(buf[0]) != POLICYDB_MAGIC) {
1407 buf[i] = le32_to_cpu(buf[i]);
1408
1409 if (buf[0] != POLICYDB_MAGIC) {
1410 printk(KERN_ERR "security: policydb magic number 0x%x does " 1448 printk(KERN_ERR "security: policydb magic number 0x%x does "
1411 "not match expected magic number 0x%x\n", 1449 "not match expected magic number 0x%x\n",
1412 buf[0], POLICYDB_MAGIC); 1450 le32_to_cpu(buf[0]), POLICYDB_MAGIC);
1413 goto bad; 1451 goto bad;
1414 } 1452 }
1415 1453
1416 len = buf[1]; 1454 len = le32_to_cpu(buf[1]);
1417 if (len != strlen(POLICYDB_STRING)) { 1455 if (len != strlen(POLICYDB_STRING)) {
1418 printk(KERN_ERR "security: policydb string length %d does not " 1456 printk(KERN_ERR "security: policydb string length %d does not "
1419 "match expected length %Zu\n", 1457 "match expected length %Zu\n",
@@ -1448,19 +1486,17 @@ int policydb_read(struct policydb *p, void *fp)
1448 rc = next_entry(buf, fp, sizeof(u32)*4); 1486 rc = next_entry(buf, fp, sizeof(u32)*4);
1449 if (rc < 0) 1487 if (rc < 0)
1450 goto bad; 1488 goto bad;
1451 for (i = 0; i < 4; i++)
1452 buf[i] = le32_to_cpu(buf[i]);
1453 1489
1454 p->policyvers = buf[0]; 1490 p->policyvers = le32_to_cpu(buf[0]);
1455 if (p->policyvers < POLICYDB_VERSION_MIN || 1491 if (p->policyvers < POLICYDB_VERSION_MIN ||
1456 p->policyvers > POLICYDB_VERSION_MAX) { 1492 p->policyvers > POLICYDB_VERSION_MAX) {
1457 printk(KERN_ERR "security: policydb version %d does not match " 1493 printk(KERN_ERR "security: policydb version %d does not match "
1458 "my version range %d-%d\n", 1494 "my version range %d-%d\n",
1459 buf[0], POLICYDB_VERSION_MIN, POLICYDB_VERSION_MAX); 1495 le32_to_cpu(buf[0]), POLICYDB_VERSION_MIN, POLICYDB_VERSION_MAX);
1460 goto bad; 1496 goto bad;
1461 } 1497 }
1462 1498
1463 if ((buf[1] & POLICYDB_CONFIG_MLS)) { 1499 if ((le32_to_cpu(buf[1]) & POLICYDB_CONFIG_MLS)) {
1464 if (ss_initialized && !selinux_mls_enabled) { 1500 if (ss_initialized && !selinux_mls_enabled) {
1465 printk(KERN_ERR "Cannot switch between non-MLS and MLS " 1501 printk(KERN_ERR "Cannot switch between non-MLS and MLS "
1466 "policies\n"); 1502 "policies\n");
@@ -1489,9 +1525,11 @@ int policydb_read(struct policydb *p, void *fp)
1489 goto bad; 1525 goto bad;
1490 } 1526 }
1491 1527
1492 if (buf[2] != info->sym_num || buf[3] != info->ocon_num) { 1528 if (le32_to_cpu(buf[2]) != info->sym_num ||
1529 le32_to_cpu(buf[3]) != info->ocon_num) {
1493 printk(KERN_ERR "security: policydb table sizes (%d,%d) do " 1530 printk(KERN_ERR "security: policydb table sizes (%d,%d) do "
1494 "not match mine (%d,%d)\n", buf[2], buf[3], 1531 "not match mine (%d,%d)\n", le32_to_cpu(buf[2]),
1532 le32_to_cpu(buf[3]),
1495 info->sym_num, info->ocon_num); 1533 info->sym_num, info->ocon_num);
1496 goto bad; 1534 goto bad;
1497 } 1535 }
@@ -1511,7 +1549,7 @@ int policydb_read(struct policydb *p, void *fp)
1511 p->symtab[i].nprim = nprim; 1549 p->symtab[i].nprim = nprim;
1512 } 1550 }
1513 1551
1514 rc = avtab_read(&p->te_avtab, fp, config); 1552 rc = avtab_read(&p->te_avtab, fp, p->policyvers);
1515 if (rc) 1553 if (rc)
1516 goto bad; 1554 goto bad;
1517 1555
@@ -1825,6 +1863,21 @@ int policydb_read(struct policydb *p, void *fp)
1825 } 1863 }
1826 } 1864 }
1827 1865
1866 p->type_attr_map = kmalloc(p->p_types.nprim*sizeof(struct ebitmap), GFP_KERNEL);
1867 if (!p->type_attr_map)
1868 goto bad;
1869
1870 for (i = 0; i < p->p_types.nprim; i++) {
1871 ebitmap_init(&p->type_attr_map[i]);
1872 if (p->policyvers >= POLICYDB_VERSION_AVTAB) {
1873 if (ebitmap_read(&p->type_attr_map[i], fp))
1874 goto bad;
1875 }
1876 /* add the type itself as the degenerate case */
1877 if (ebitmap_set_bit(&p->type_attr_map[i], i, 1))
1878 goto bad;
1879 }
1880
1828 rc = 0; 1881 rc = 0;
1829out: 1882out:
1830 return rc; 1883 return rc;
diff --git a/security/selinux/ss/policydb.h b/security/selinux/ss/policydb.h
index 2470e2a1a1c3..b1340711f721 100644
--- a/security/selinux/ss/policydb.h
+++ b/security/selinux/ss/policydb.h
@@ -237,6 +237,9 @@ struct policydb {
237 /* range transitions */ 237 /* range transitions */
238 struct range_trans *range_tr; 238 struct range_trans *range_tr;
239 239
240 /* type -> attribute reverse mapping */
241 struct ebitmap *type_attr_map;
242
240 unsigned int policyvers; 243 unsigned int policyvers;
241}; 244};
242 245
diff --git a/security/selinux/ss/services.c b/security/selinux/ss/services.c
index 014120474e69..92b89dc99bcd 100644
--- a/security/selinux/ss/services.c
+++ b/security/selinux/ss/services.c
@@ -266,8 +266,11 @@ static int context_struct_compute_av(struct context *scontext,
266 struct constraint_node *constraint; 266 struct constraint_node *constraint;
267 struct role_allow *ra; 267 struct role_allow *ra;
268 struct avtab_key avkey; 268 struct avtab_key avkey;
269 struct avtab_datum *avdatum; 269 struct avtab_node *node;
270 struct class_datum *tclass_datum; 270 struct class_datum *tclass_datum;
271 struct ebitmap *sattr, *tattr;
272 struct ebitmap_node *snode, *tnode;
273 unsigned int i, j;
271 274
272 /* 275 /*
273 * Remap extended Netlink classes for old policy versions. 276 * Remap extended Netlink classes for old policy versions.
@@ -300,21 +303,34 @@ static int context_struct_compute_av(struct context *scontext,
300 * If a specific type enforcement rule was defined for 303 * If a specific type enforcement rule was defined for
301 * this permission check, then use it. 304 * this permission check, then use it.
302 */ 305 */
303 avkey.source_type = scontext->type;
304 avkey.target_type = tcontext->type;
305 avkey.target_class = tclass; 306 avkey.target_class = tclass;
306 avdatum = avtab_search(&policydb.te_avtab, &avkey, AVTAB_AV); 307 avkey.specified = AVTAB_AV;
307 if (avdatum) { 308 sattr = &policydb.type_attr_map[scontext->type - 1];
308 if (avdatum->specified & AVTAB_ALLOWED) 309 tattr = &policydb.type_attr_map[tcontext->type - 1];
309 avd->allowed = avtab_allowed(avdatum); 310 ebitmap_for_each_bit(sattr, snode, i) {
310 if (avdatum->specified & AVTAB_AUDITDENY) 311 if (!ebitmap_node_get_bit(snode, i))
311 avd->auditdeny = avtab_auditdeny(avdatum); 312 continue;
312 if (avdatum->specified & AVTAB_AUDITALLOW) 313 ebitmap_for_each_bit(tattr, tnode, j) {
313 avd->auditallow = avtab_auditallow(avdatum); 314 if (!ebitmap_node_get_bit(tnode, j))
314 } 315 continue;
316 avkey.source_type = i + 1;
317 avkey.target_type = j + 1;
318 for (node = avtab_search_node(&policydb.te_avtab, &avkey);
319 node != NULL;
320 node = avtab_search_node_next(node, avkey.specified)) {
321 if (node->key.specified == AVTAB_ALLOWED)
322 avd->allowed |= node->datum.data;
323 else if (node->key.specified == AVTAB_AUDITALLOW)
324 avd->auditallow |= node->datum.data;
325 else if (node->key.specified == AVTAB_AUDITDENY)
326 avd->auditdeny &= node->datum.data;
327 }
315 328
316 /* Check conditional av table for additional permissions */ 329 /* Check conditional av table for additional permissions */
317 cond_compute_av(&policydb.te_cond_avtab, &avkey, avd); 330 cond_compute_av(&policydb.te_cond_avtab, &avkey, avd);
331
332 }
333 }
318 334
319 /* 335 /*
320 * Remove any permissions prohibited by a constraint (this includes 336 * Remove any permissions prohibited by a constraint (this includes
@@ -797,7 +813,6 @@ static int security_compute_sid(u32 ssid,
797 struct avtab_key avkey; 813 struct avtab_key avkey;
798 struct avtab_datum *avdatum; 814 struct avtab_datum *avdatum;
799 struct avtab_node *node; 815 struct avtab_node *node;
800 unsigned int type_change = 0;
801 int rc = 0; 816 int rc = 0;
802 817
803 if (!ss_initialized) { 818 if (!ss_initialized) {
@@ -862,33 +877,23 @@ static int security_compute_sid(u32 ssid,
862 avkey.source_type = scontext->type; 877 avkey.source_type = scontext->type;
863 avkey.target_type = tcontext->type; 878 avkey.target_type = tcontext->type;
864 avkey.target_class = tclass; 879 avkey.target_class = tclass;
865 avdatum = avtab_search(&policydb.te_avtab, &avkey, AVTAB_TYPE); 880 avkey.specified = specified;
881 avdatum = avtab_search(&policydb.te_avtab, &avkey);
866 882
867 /* If no permanent rule, also check for enabled conditional rules */ 883 /* If no permanent rule, also check for enabled conditional rules */
868 if(!avdatum) { 884 if(!avdatum) {
869 node = avtab_search_node(&policydb.te_cond_avtab, &avkey, specified); 885 node = avtab_search_node(&policydb.te_cond_avtab, &avkey);
870 for (; node != NULL; node = avtab_search_node_next(node, specified)) { 886 for (; node != NULL; node = avtab_search_node_next(node, specified)) {
871 if (node->datum.specified & AVTAB_ENABLED) { 887 if (node->key.specified & AVTAB_ENABLED) {
872 avdatum = &node->datum; 888 avdatum = &node->datum;
873 break; 889 break;
874 } 890 }
875 } 891 }
876 } 892 }
877 893
878 type_change = (avdatum && (avdatum->specified & specified)); 894 if (avdatum) {
879 if (type_change) {
880 /* Use the type from the type transition/member/change rule. */ 895 /* Use the type from the type transition/member/change rule. */
881 switch (specified) { 896 newcontext.type = avdatum->data;
882 case AVTAB_TRANSITION:
883 newcontext.type = avtab_transition(avdatum);
884 break;
885 case AVTAB_MEMBER:
886 newcontext.type = avtab_member(avdatum);
887 break;
888 case AVTAB_CHANGE:
889 newcontext.type = avtab_change(avdatum);
890 break;
891 }
892 } 897 }
893 898
894 /* Check for class-specific changes. */ 899 /* Check for class-specific changes. */
@@ -1502,6 +1507,7 @@ int security_get_user_sids(u32 fromsid,
1502 struct user_datum *user; 1507 struct user_datum *user;
1503 struct role_datum *role; 1508 struct role_datum *role;
1504 struct av_decision avd; 1509 struct av_decision avd;
1510 struct ebitmap_node *rnode, *tnode;
1505 int rc = 0, i, j; 1511 int rc = 0, i, j;
1506 1512
1507 if (!ss_initialized) { 1513 if (!ss_initialized) {
@@ -1532,13 +1538,13 @@ int security_get_user_sids(u32 fromsid,
1532 } 1538 }
1533 memset(mysids, 0, maxnel*sizeof(*mysids)); 1539 memset(mysids, 0, maxnel*sizeof(*mysids));
1534 1540
1535 for (i = ebitmap_startbit(&user->roles); i < ebitmap_length(&user->roles); i++) { 1541 ebitmap_for_each_bit(&user->roles, rnode, i) {
1536 if (!ebitmap_get_bit(&user->roles, i)) 1542 if (!ebitmap_node_get_bit(rnode, i))
1537 continue; 1543 continue;
1538 role = policydb.role_val_to_struct[i]; 1544 role = policydb.role_val_to_struct[i];
1539 usercon.role = i+1; 1545 usercon.role = i+1;
1540 for (j = ebitmap_startbit(&role->types); j < ebitmap_length(&role->types); j++) { 1546 ebitmap_for_each_bit(&role->types, tnode, j) {
1541 if (!ebitmap_get_bit(&role->types, j)) 1547 if (!ebitmap_node_get_bit(tnode, j))
1542 continue; 1548 continue;
1543 usercon.type = j+1; 1549 usercon.type = j+1;
1544 1550
diff --git a/sound/pci/atiixp.c b/sound/pci/atiixp.c
index 904d17394e1c..188df085b7ee 100644
--- a/sound/pci/atiixp.c
+++ b/sound/pci/atiixp.c
@@ -1427,7 +1427,7 @@ static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1427 snd_atiixp_aclink_down(chip); 1427 snd_atiixp_aclink_down(chip);
1428 snd_atiixp_chip_stop(chip); 1428 snd_atiixp_chip_stop(chip);
1429 1429
1430 pci_set_power_state(chip->pci, 3); 1430 pci_set_power_state(chip->pci, PCI_D3hot);
1431 pci_disable_device(chip->pci); 1431 pci_disable_device(chip->pci);
1432 return 0; 1432 return 0;
1433} 1433}
@@ -1438,7 +1438,7 @@ static int snd_atiixp_resume(snd_card_t *card)
1438 int i; 1438 int i;
1439 1439
1440 pci_enable_device(chip->pci); 1440 pci_enable_device(chip->pci);
1441 pci_set_power_state(chip->pci, 0); 1441 pci_set_power_state(chip->pci, PCI_D0);
1442 pci_set_master(chip->pci); 1442 pci_set_master(chip->pci);
1443 1443
1444 snd_atiixp_aclink_reset(chip); 1444 snd_atiixp_aclink_reset(chip);