diff options
195 files changed, 9330 insertions, 2564 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index de1e4e6f3bd6..90f81283b722 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
| @@ -3363,6 +3363,16 @@ F: drivers/serial/kgdboc.c | |||
| 3363 | F: include/linux/kgdb.h | 3363 | F: include/linux/kgdb.h |
| 3364 | F: kernel/kgdb.c | 3364 | F: kernel/kgdb.c |
| 3365 | 3365 | ||
| 3366 | KMEMLEAK | ||
| 3367 | P: Catalin Marinas | ||
| 3368 | M: catalin.marinas@arm.com | ||
| 3369 | L: linux-kernel@vger.kernel.org | ||
| 3370 | S: Maintained | ||
| 3371 | F: Documentation/kmemleak.txt | ||
| 3372 | F: include/linux/kmemleak.h | ||
| 3373 | F: mm/kmemleak.c | ||
| 3374 | F: mm/kmemleak-test.c | ||
| 3375 | |||
| 3366 | KMEMTRACE | 3376 | KMEMTRACE |
| 3367 | P: Eduard - Gabriel Munteanu | 3377 | P: Eduard - Gabriel Munteanu |
| 3368 | M: eduard.munteanu@linux360.ro | 3378 | M: eduard.munteanu@linux360.ro |
| @@ -3372,12 +3382,6 @@ F: Documentation/trace/kmemtrace.txt | |||
| 3372 | F: include/trace/kmemtrace.h | 3382 | F: include/trace/kmemtrace.h |
| 3373 | F: kernel/trace/kmemtrace.c | 3383 | F: kernel/trace/kmemtrace.c |
| 3374 | 3384 | ||
| 3375 | KMEMLEAK | ||
| 3376 | P: Catalin Marinas | ||
| 3377 | M: catalin.marinas@arm.com | ||
| 3378 | L: linux-kernel@vger.kernel.org | ||
| 3379 | S: Maintained | ||
| 3380 | |||
| 3381 | KPROBES | 3385 | KPROBES |
| 3382 | P: Ananth N Mavinakayanahalli | 3386 | P: Ananth N Mavinakayanahalli |
| 3383 | M: ananth@in.ibm.com | 3387 | M: ananth@in.ibm.com |
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 3640cdc38aac..c56fd3eb7c10 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig | |||
| @@ -223,6 +223,7 @@ endchoice | |||
| 223 | 223 | ||
| 224 | config SMP | 224 | config SMP |
| 225 | depends on BF561 | 225 | depends on BF561 |
| 226 | select GENERIC_TIME | ||
| 226 | bool "Symmetric multi-processing support" | 227 | bool "Symmetric multi-processing support" |
| 227 | ---help--- | 228 | ---help--- |
| 228 | This enables support for systems with more than one CPU, | 229 | This enables support for systems with more than one CPU, |
| @@ -241,12 +242,6 @@ config IRQ_PER_CPU | |||
| 241 | depends on SMP | 242 | depends on SMP |
| 242 | default y | 243 | default y |
| 243 | 244 | ||
| 244 | config TICK_SOURCE_SYSTMR0 | ||
| 245 | bool | ||
| 246 | select BFIN_GPTIMERS | ||
| 247 | depends on SMP | ||
| 248 | default y | ||
| 249 | |||
| 250 | config BF_REV_MIN | 245 | config BF_REV_MIN |
| 251 | int | 246 | int |
| 252 | default 0 if (BF51x || BF52x || (BF54x && !BF54xM)) | 247 | default 0 if (BF51x || BF52x || (BF54x && !BF54xM)) |
| @@ -263,8 +258,8 @@ config BF_REV_MAX | |||
| 263 | 258 | ||
| 264 | choice | 259 | choice |
| 265 | prompt "Silicon Rev" | 260 | prompt "Silicon Rev" |
| 266 | default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM)) | 261 | default BF_REV_0_0 if (BF51x || BF52x) |
| 267 | default BF_REV_0_2 if (BF534 || BF536 || BF537) | 262 | default BF_REV_0_2 if (BF534 || BF536 || BF537 || (BF54x && !BF54xM)) |
| 268 | default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561) | 263 | default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561) |
| 269 | 264 | ||
| 270 | config BF_REV_0_0 | 265 | config BF_REV_0_0 |
| @@ -607,7 +602,6 @@ source kernel/Kconfig.hz | |||
| 607 | 602 | ||
| 608 | config GENERIC_TIME | 603 | config GENERIC_TIME |
| 609 | bool "Generic time" | 604 | bool "Generic time" |
| 610 | depends on !SMP | ||
| 611 | default y | 605 | default y |
| 612 | 606 | ||
| 613 | config GENERIC_CLOCKEVENTS | 607 | config GENERIC_CLOCKEVENTS |
| @@ -615,12 +609,26 @@ config GENERIC_CLOCKEVENTS | |||
| 615 | depends on GENERIC_TIME | 609 | depends on GENERIC_TIME |
| 616 | default y | 610 | default y |
| 617 | 611 | ||
| 612 | choice | ||
| 613 | prompt "Kernel Tick Source" | ||
| 614 | depends on GENERIC_CLOCKEVENTS | ||
| 615 | default TICKSOURCE_CORETMR | ||
| 616 | |||
| 617 | config TICKSOURCE_GPTMR0 | ||
| 618 | bool "Gptimer0 (SCLK domain)" | ||
| 619 | select BFIN_GPTIMERS | ||
| 620 | depends on !IPIPE | ||
| 621 | |||
| 622 | config TICKSOURCE_CORETMR | ||
| 623 | bool "Core timer (CCLK domain)" | ||
| 624 | |||
| 625 | endchoice | ||
| 626 | |||
| 618 | config CYCLES_CLOCKSOURCE | 627 | config CYCLES_CLOCKSOURCE |
| 619 | bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)" | 628 | bool "Use 'CYCLES' as a clocksource" |
| 620 | depends on EXPERIMENTAL | ||
| 621 | depends on GENERIC_CLOCKEVENTS | 629 | depends on GENERIC_CLOCKEVENTS |
| 622 | depends on !BFIN_SCRATCH_REG_CYCLES | 630 | depends on !BFIN_SCRATCH_REG_CYCLES |
| 623 | default n | 631 | depends on !SMP |
| 624 | help | 632 | help |
| 625 | If you say Y here, you will enable support for using the 'cycles' | 633 | If you say Y here, you will enable support for using the 'cycles' |
| 626 | registers as a clock source. Doing so means you will be unable to | 634 | registers as a clock source. Doing so means you will be unable to |
| @@ -628,6 +636,11 @@ config CYCLES_CLOCKSOURCE | |||
| 628 | still be able to read it (such as for performance monitoring), but | 636 | still be able to read it (such as for performance monitoring), but |
| 629 | writing the registers will most likely crash the kernel. | 637 | writing the registers will most likely crash the kernel. |
| 630 | 638 | ||
| 639 | config GPTMR0_CLOCKSOURCE | ||
| 640 | bool "Use GPTimer0 as a clocksource (higher rating)" | ||
| 641 | depends on GENERIC_CLOCKEVENTS | ||
| 642 | depends on !TICKSOURCE_GPTMR0 | ||
| 643 | |||
| 631 | source kernel/time/Kconfig | 644 | source kernel/time/Kconfig |
| 632 | 645 | ||
| 633 | comment "Misc" | 646 | comment "Misc" |
| @@ -808,7 +821,7 @@ config APP_STACK_L1 | |||
| 808 | config EXCEPTION_L1_SCRATCH | 821 | config EXCEPTION_L1_SCRATCH |
| 809 | bool "Locate exception stack in L1 Scratch Memory" | 822 | bool "Locate exception stack in L1 Scratch Memory" |
| 810 | default n | 823 | default n |
| 811 | depends on !APP_STACK_L1 && !SYSCALL_TAB_L1 | 824 | depends on !APP_STACK_L1 |
| 812 | help | 825 | help |
| 813 | Whenever an exception occurs, use the L1 Scratch memory for | 826 | Whenever an exception occurs, use the L1 Scratch memory for |
| 814 | stack storage. You cannot place the stacks of FLAT binaries | 827 | stack storage. You cannot place the stacks of FLAT binaries |
| @@ -901,7 +914,7 @@ config BFIN_ICACHE_LOCK | |||
| 901 | bool "Enable Instruction Cache Locking" | 914 | bool "Enable Instruction Cache Locking" |
| 902 | 915 | ||
| 903 | choice | 916 | choice |
| 904 | prompt "Policy" | 917 | prompt "External memory cache policy" |
| 905 | depends on BFIN_DCACHE | 918 | depends on BFIN_DCACHE |
| 906 | default BFIN_WB if !SMP | 919 | default BFIN_WB if !SMP |
| 907 | default BFIN_WT if SMP | 920 | default BFIN_WT if SMP |
| @@ -942,12 +955,22 @@ config BFIN_WT | |||
| 942 | 955 | ||
| 943 | endchoice | 956 | endchoice |
| 944 | 957 | ||
| 945 | config BFIN_L2_CACHEABLE | 958 | choice |
| 946 | bool "Cache L2 SRAM" | 959 | prompt "L2 SRAM cache policy" |
| 947 | depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP)) | 960 | depends on (BF54x || BF561) |
| 948 | default n | 961 | default BFIN_L2_WT |
| 949 | help | 962 | config BFIN_L2_WB |
| 950 | Select to make L2 SRAM cacheable in L1 data and instruction cache. | 963 | bool "Write back" |
| 964 | depends on !SMP | ||
| 965 | |||
| 966 | config BFIN_L2_WT | ||
| 967 | bool "Write through" | ||
| 968 | depends on !SMP | ||
| 969 | |||
| 970 | config BFIN_L2_NOT_CACHED | ||
| 971 | bool "Not cached" | ||
| 972 | |||
| 973 | endchoice | ||
| 951 | 974 | ||
| 952 | config MPU | 975 | config MPU |
| 953 | bool "Enable the memory protection unit (EXPERIMENTAL)" | 976 | bool "Enable the memory protection unit (EXPERIMENTAL)" |
| @@ -1011,21 +1034,34 @@ endmenu | |||
| 1011 | 1034 | ||
| 1012 | menu "EBIU_AMBCTL Control" | 1035 | menu "EBIU_AMBCTL Control" |
| 1013 | config BANK_0 | 1036 | config BANK_0 |
| 1014 | hex "Bank 0" | 1037 | hex "Bank 0 (AMBCTL0.L)" |
| 1015 | default 0x7BB0 | 1038 | default 0x7BB0 |
| 1039 | help | ||
| 1040 | These are the low 16 bits of the EBIU_AMBCTL0 MMR which are | ||
| 1041 | used to control the Asynchronous Memory Bank 0 settings. | ||
| 1016 | 1042 | ||
| 1017 | config BANK_1 | 1043 | config BANK_1 |
| 1018 | hex "Bank 1" | 1044 | hex "Bank 1 (AMBCTL0.H)" |
| 1019 | default 0x7BB0 | 1045 | default 0x7BB0 |
| 1020 | default 0x5558 if BF54x | 1046 | default 0x5558 if BF54x |
| 1047 | help | ||
| 1048 | These are the high 16 bits of the EBIU_AMBCTL0 MMR which are | ||
| 1049 | used to control the Asynchronous Memory Bank 1 settings. | ||
| 1021 | 1050 | ||
| 1022 | config BANK_2 | 1051 | config BANK_2 |
| 1023 | hex "Bank 2" | 1052 | hex "Bank 2 (AMBCTL1.L)" |
| 1024 | default 0x7BB0 | 1053 | default 0x7BB0 |
| 1054 | help | ||
| 1055 | These are the low 16 bits of the EBIU_AMBCTL1 MMR which are | ||
| 1056 | used to control the Asynchronous Memory Bank 2 settings. | ||
| 1025 | 1057 | ||
| 1026 | config BANK_3 | 1058 | config BANK_3 |
| 1027 | hex "Bank 3" | 1059 | hex "Bank 3 (AMBCTL1.H)" |
| 1028 | default 0x99B3 | 1060 | default 0x99B3 |
| 1061 | help | ||
| 1062 | These are the high 16 bits of the EBIU_AMBCTL1 MMR which are | ||
| 1063 | used to control the Asynchronous Memory Bank 3 settings. | ||
| 1064 | |||
| 1029 | endmenu | 1065 | endmenu |
| 1030 | 1066 | ||
| 1031 | config EBIU_MBSCTLVAL | 1067 | config EBIU_MBSCTLVAL |
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug index 79e7e63ab709..1fc4981d486f 100644 --- a/arch/blackfin/Kconfig.debug +++ b/arch/blackfin/Kconfig.debug | |||
| @@ -54,6 +54,19 @@ config DEBUG_HWERR | |||
| 54 | hardware error interrupts and need to know where they are coming | 54 | hardware error interrupts and need to know where they are coming |
| 55 | from. | 55 | from. |
| 56 | 56 | ||
| 57 | config EXACT_HWERR | ||
| 58 | bool "Try to make Hardware errors exact" | ||
| 59 | depends on DEBUG_HWERR | ||
| 60 | help | ||
| 61 | By default, the Blackfin hardware errors are not exact - the error | ||
| 62 | be reported multiple cycles after the error happens. This delay | ||
| 63 | can cause the wrong application, or even the kernel to receive a | ||
| 64 | signal to be killed. If you are getting HW errors in your system, | ||
| 65 | try turning this on to ensure they are at least comming from the | ||
| 66 | proper thread. | ||
| 67 | |||
| 68 | On production systems, it is safe (and a small optimization) to say N. | ||
| 69 | |||
| 57 | config DEBUG_DOUBLEFAULT | 70 | config DEBUG_DOUBLEFAULT |
| 58 | bool "Debug Double Faults" | 71 | bool "Debug Double Faults" |
| 59 | default n | 72 | default n |
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig index c121d6e6e2b8..baec1337f282 100644 --- a/arch/blackfin/configs/BF518F-EZBRD_defconfig +++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -259,7 +259,10 @@ CONFIG_HZ=250 | |||
| 259 | # CONFIG_SCHED_HRTICK is not set | 259 | # CONFIG_SCHED_HRTICK is not set |
| 260 | CONFIG_GENERIC_TIME=y | 260 | CONFIG_GENERIC_TIME=y |
| 261 | CONFIG_GENERIC_CLOCKEVENTS=y | 261 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 262 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 263 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 262 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 264 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 265 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 263 | # CONFIG_NO_HZ is not set | 266 | # CONFIG_NO_HZ is not set |
| 264 | # CONFIG_HIGH_RES_TIMERS is not set | 267 | # CONFIG_HIGH_RES_TIMERS is not set |
| 265 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 268 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| @@ -404,7 +407,7 @@ CONFIG_IP_PNP=y | |||
| 404 | # CONFIG_NET_IPIP is not set | 407 | # CONFIG_NET_IPIP is not set |
| 405 | # CONFIG_NET_IPGRE is not set | 408 | # CONFIG_NET_IPGRE is not set |
| 406 | # CONFIG_ARPD is not set | 409 | # CONFIG_ARPD is not set |
| 407 | CONFIG_SYN_COOKIES=y | 410 | # CONFIG_SYN_COOKIES is not set |
| 408 | # CONFIG_INET_AH is not set | 411 | # CONFIG_INET_AH is not set |
| 409 | # CONFIG_INET_ESP is not set | 412 | # CONFIG_INET_ESP is not set |
| 410 | # CONFIG_INET_IPCOMP is not set | 413 | # CONFIG_INET_IPCOMP is not set |
| @@ -688,14 +691,14 @@ CONFIG_INPUT_MISC=y | |||
| 688 | # Character devices | 691 | # Character devices |
| 689 | # | 692 | # |
| 690 | # CONFIG_AD9960 is not set | 693 | # CONFIG_AD9960 is not set |
| 691 | # CONFIG_SPI_ADC_BF533 is not set | 694 | CONFIG_BFIN_DMA_INTERFACE=m |
| 692 | # CONFIG_BF5xx_PPIFCD is not set | 695 | # CONFIG_BFIN_PPI is not set |
| 696 | # CONFIG_BFIN_PPIFCD is not set | ||
| 693 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 697 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 694 | # CONFIG_BF5xx_PPI is not set | 698 | # CONFIG_BFIN_SPI_ADC is not set |
| 695 | # CONFIG_BFIN_SPORT is not set | 699 | # CONFIG_BFIN_SPORT is not set |
| 696 | # CONFIG_BFIN_TIMER_LATENCY is not set | 700 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 697 | # CONFIG_TWI_LCD is not set | 701 | # CONFIG_BFIN_TWI_LCD is not set |
| 698 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 699 | CONFIG_SIMPLE_GPIO=m | 702 | CONFIG_SIMPLE_GPIO=m |
| 700 | CONFIG_VT=y | 703 | CONFIG_VT=y |
| 701 | CONFIG_CONSOLE_TRANSLATIONS=y | 704 | CONFIG_CONSOLE_TRANSLATIONS=y |
| @@ -802,7 +805,30 @@ CONFIG_SPI_BFIN=y | |||
| 802 | # CONFIG_SPI_SPIDEV is not set | 805 | # CONFIG_SPI_SPIDEV is not set |
| 803 | # CONFIG_SPI_TLE62X0 is not set | 806 | # CONFIG_SPI_TLE62X0 is not set |
| 804 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 807 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 805 | # CONFIG_GPIOLIB is not set | 808 | CONFIG_GPIOLIB=y |
| 809 | # CONFIG_DEBUG_GPIO is not set | ||
| 810 | CONFIG_GPIO_SYSFS=y | ||
| 811 | |||
| 812 | # | ||
| 813 | # Memory mapped GPIO expanders: | ||
| 814 | # | ||
| 815 | |||
| 816 | # | ||
| 817 | # I2C GPIO expanders: | ||
| 818 | # | ||
| 819 | # CONFIG_GPIO_MAX732X is not set | ||
| 820 | # CONFIG_GPIO_PCA953X is not set | ||
| 821 | # CONFIG_GPIO_PCF857X is not set | ||
| 822 | |||
| 823 | # | ||
| 824 | # PCI GPIO expanders: | ||
| 825 | # | ||
| 826 | |||
| 827 | # | ||
| 828 | # SPI GPIO expanders: | ||
| 829 | # | ||
| 830 | # CONFIG_GPIO_MAX7301 is not set | ||
| 831 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 806 | # CONFIG_W1 is not set | 832 | # CONFIG_W1 is not set |
| 807 | # CONFIG_POWER_SUPPLY is not set | 833 | # CONFIG_POWER_SUPPLY is not set |
| 808 | # CONFIG_HWMON is not set | 834 | # CONFIG_HWMON is not set |
| @@ -831,6 +857,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 831 | # CONFIG_HTC_PASIC3 is not set | 857 | # CONFIG_HTC_PASIC3 is not set |
| 832 | # CONFIG_MFD_TMIO is not set | 858 | # CONFIG_MFD_TMIO is not set |
| 833 | # CONFIG_PMIC_DA903X is not set | 859 | # CONFIG_PMIC_DA903X is not set |
| 860 | # CONFIG_PMIC_ADP5520 is not set | ||
| 834 | # CONFIG_MFD_WM8400 is not set | 861 | # CONFIG_MFD_WM8400 is not set |
| 835 | # CONFIG_MFD_WM8350_I2C is not set | 862 | # CONFIG_MFD_WM8350_I2C is not set |
| 836 | # CONFIG_REGULATOR is not set | 863 | # CONFIG_REGULATOR is not set |
| @@ -962,7 +989,8 @@ CONFIG_RTC_DRV_BFIN=y | |||
| 962 | # | 989 | # |
| 963 | # File systems | 990 | # File systems |
| 964 | # | 991 | # |
| 965 | # CONFIG_EXT2_FS is not set | 992 | CONFIG_EXT2_FS=m |
| 993 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 966 | # CONFIG_EXT3_FS is not set | 994 | # CONFIG_EXT3_FS is not set |
| 967 | # CONFIG_EXT4_FS is not set | 995 | # CONFIG_EXT4_FS is not set |
| 968 | # CONFIG_REISERFS_FS is not set | 996 | # CONFIG_REISERFS_FS is not set |
| @@ -988,8 +1016,11 @@ CONFIG_INOTIFY_USER=y | |||
| 988 | # | 1016 | # |
| 989 | # DOS/FAT/NT Filesystems | 1017 | # DOS/FAT/NT Filesystems |
| 990 | # | 1018 | # |
| 1019 | CONFIG_FAT_FS=m | ||
| 991 | # CONFIG_MSDOS_FS is not set | 1020 | # CONFIG_MSDOS_FS is not set |
| 992 | # CONFIG_VFAT_FS is not set | 1021 | CONFIG_VFAT_FS=m |
| 1022 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1023 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 993 | # CONFIG_NTFS_FS is not set | 1024 | # CONFIG_NTFS_FS is not set |
| 994 | 1025 | ||
| 995 | # | 1026 | # |
| @@ -1012,8 +1043,8 @@ CONFIG_SYSFS=y | |||
| 1012 | # CONFIG_BEFS_FS is not set | 1043 | # CONFIG_BEFS_FS is not set |
| 1013 | # CONFIG_BFS_FS is not set | 1044 | # CONFIG_BFS_FS is not set |
| 1014 | # CONFIG_EFS_FS is not set | 1045 | # CONFIG_EFS_FS is not set |
| 1015 | # CONFIG_YAFFS_FS is not set | ||
| 1016 | # CONFIG_JFFS2_FS is not set | 1046 | # CONFIG_JFFS2_FS is not set |
| 1047 | # CONFIG_YAFFS_FS is not set | ||
| 1017 | # CONFIG_CRAMFS is not set | 1048 | # CONFIG_CRAMFS is not set |
| 1018 | # CONFIG_VXFS_FS is not set | 1049 | # CONFIG_VXFS_FS is not set |
| 1019 | # CONFIG_MINIX_FS is not set | 1050 | # CONFIG_MINIX_FS is not set |
| @@ -1048,9 +1079,9 @@ CONFIG_SMB_FS=m | |||
| 1048 | # | 1079 | # |
| 1049 | # CONFIG_PARTITION_ADVANCED is not set | 1080 | # CONFIG_PARTITION_ADVANCED is not set |
| 1050 | CONFIG_MSDOS_PARTITION=y | 1081 | CONFIG_MSDOS_PARTITION=y |
| 1051 | CONFIG_NLS=y | 1082 | CONFIG_NLS=m |
| 1052 | CONFIG_NLS_DEFAULT="iso8859-1" | 1083 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 1053 | CONFIG_NLS_CODEPAGE_437=y | 1084 | CONFIG_NLS_CODEPAGE_437=m |
| 1054 | # CONFIG_NLS_CODEPAGE_737 is not set | 1085 | # CONFIG_NLS_CODEPAGE_737 is not set |
| 1055 | # CONFIG_NLS_CODEPAGE_775 is not set | 1086 | # CONFIG_NLS_CODEPAGE_775 is not set |
| 1056 | # CONFIG_NLS_CODEPAGE_850 is not set | 1087 | # CONFIG_NLS_CODEPAGE_850 is not set |
| @@ -1065,7 +1096,7 @@ CONFIG_NLS_CODEPAGE_437=y | |||
| 1065 | # CONFIG_NLS_CODEPAGE_865 is not set | 1096 | # CONFIG_NLS_CODEPAGE_865 is not set |
| 1066 | # CONFIG_NLS_CODEPAGE_866 is not set | 1097 | # CONFIG_NLS_CODEPAGE_866 is not set |
| 1067 | # CONFIG_NLS_CODEPAGE_869 is not set | 1098 | # CONFIG_NLS_CODEPAGE_869 is not set |
| 1068 | # CONFIG_NLS_CODEPAGE_936 is not set | 1099 | CONFIG_NLS_CODEPAGE_936=m |
| 1069 | # CONFIG_NLS_CODEPAGE_950 is not set | 1100 | # CONFIG_NLS_CODEPAGE_950 is not set |
| 1070 | # CONFIG_NLS_CODEPAGE_932 is not set | 1101 | # CONFIG_NLS_CODEPAGE_932 is not set |
| 1071 | # CONFIG_NLS_CODEPAGE_949 is not set | 1102 | # CONFIG_NLS_CODEPAGE_949 is not set |
| @@ -1074,7 +1105,7 @@ CONFIG_NLS_CODEPAGE_437=y | |||
| 1074 | # CONFIG_NLS_CODEPAGE_1250 is not set | 1105 | # CONFIG_NLS_CODEPAGE_1250 is not set |
| 1075 | # CONFIG_NLS_CODEPAGE_1251 is not set | 1106 | # CONFIG_NLS_CODEPAGE_1251 is not set |
| 1076 | # CONFIG_NLS_ASCII is not set | 1107 | # CONFIG_NLS_ASCII is not set |
| 1077 | CONFIG_NLS_ISO8859_1=y | 1108 | CONFIG_NLS_ISO8859_1=m |
| 1078 | # CONFIG_NLS_ISO8859_2 is not set | 1109 | # CONFIG_NLS_ISO8859_2 is not set |
| 1079 | # CONFIG_NLS_ISO8859_3 is not set | 1110 | # CONFIG_NLS_ISO8859_3 is not set |
| 1080 | # CONFIG_NLS_ISO8859_4 is not set | 1111 | # CONFIG_NLS_ISO8859_4 is not set |
| @@ -1087,7 +1118,7 @@ CONFIG_NLS_ISO8859_1=y | |||
| 1087 | # CONFIG_NLS_ISO8859_15 is not set | 1118 | # CONFIG_NLS_ISO8859_15 is not set |
| 1088 | # CONFIG_NLS_KOI8_R is not set | 1119 | # CONFIG_NLS_KOI8_R is not set |
| 1089 | # CONFIG_NLS_KOI8_U is not set | 1120 | # CONFIG_NLS_KOI8_U is not set |
| 1090 | # CONFIG_NLS_UTF8 is not set | 1121 | CONFIG_NLS_UTF8=m |
| 1091 | # CONFIG_DLM is not set | 1122 | # CONFIG_DLM is not set |
| 1092 | 1123 | ||
| 1093 | # | 1124 | # |
| @@ -1102,7 +1133,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1102 | CONFIG_DEBUG_FS=y | 1133 | CONFIG_DEBUG_FS=y |
| 1103 | # CONFIG_HEADERS_CHECK is not set | 1134 | # CONFIG_HEADERS_CHECK is not set |
| 1104 | CONFIG_DEBUG_KERNEL=y | 1135 | CONFIG_DEBUG_KERNEL=y |
| 1105 | # CONFIG_DEBUG_SHIRQ is not set | 1136 | CONFIG_DEBUG_SHIRQ=y |
| 1106 | CONFIG_DETECT_SOFTLOCKUP=y | 1137 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1107 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1138 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1108 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1139 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1111,8 +1142,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1111 | # CONFIG_TIMER_STATS is not set | 1142 | # CONFIG_TIMER_STATS is not set |
| 1112 | # CONFIG_DEBUG_OBJECTS is not set | 1143 | # CONFIG_DEBUG_OBJECTS is not set |
| 1113 | # CONFIG_DEBUG_SLAB is not set | 1144 | # CONFIG_DEBUG_SLAB is not set |
| 1114 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1115 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1116 | # CONFIG_DEBUG_SPINLOCK is not set | 1145 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1117 | # CONFIG_DEBUG_MUTEXES is not set | 1146 | # CONFIG_DEBUG_MUTEXES is not set |
| 1118 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1147 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1132,7 +1161,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1132 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1161 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1133 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1162 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1134 | # CONFIG_FAULT_INJECTION is not set | 1163 | # CONFIG_FAULT_INJECTION is not set |
| 1135 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1136 | 1164 | ||
| 1137 | # | 1165 | # |
| 1138 | # Tracers | 1166 | # Tracers |
| @@ -1148,16 +1176,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1148 | # CONFIG_DEBUG_STACK_USAGE is not set | 1176 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1149 | CONFIG_DEBUG_VERBOSE=y | 1177 | CONFIG_DEBUG_VERBOSE=y |
| 1150 | CONFIG_DEBUG_MMRS=y | 1178 | CONFIG_DEBUG_MMRS=y |
| 1151 | # CONFIG_DEBUG_HWERR is not set | 1179 | CONFIG_DEBUG_HWERR=y |
| 1152 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1180 | CONFIG_EXACT_HWERR=y |
| 1181 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1182 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1183 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1184 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1153 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1185 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1154 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1186 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1155 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1187 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1156 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1188 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1157 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1189 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1158 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1190 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1159 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1191 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1160 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1192 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1161 | CONFIG_EARLY_PRINTK=y | 1193 | CONFIG_EARLY_PRINTK=y |
| 1162 | CONFIG_CPLB_INFO=y | 1194 | CONFIG_CPLB_INFO=y |
| 1163 | CONFIG_ACCESS_CHECK=y | 1195 | CONFIG_ACCESS_CHECK=y |
| @@ -1269,7 +1301,6 @@ CONFIG_CRC32=y | |||
| 1269 | # CONFIG_CRC7 is not set | 1301 | # CONFIG_CRC7 is not set |
| 1270 | # CONFIG_LIBCRC32C is not set | 1302 | # CONFIG_LIBCRC32C is not set |
| 1271 | CONFIG_ZLIB_INFLATE=y | 1303 | CONFIG_ZLIB_INFLATE=y |
| 1272 | CONFIG_PLIST=y | ||
| 1273 | CONFIG_HAS_IOMEM=y | 1304 | CONFIG_HAS_IOMEM=y |
| 1274 | CONFIG_HAS_IOPORT=y | 1305 | CONFIG_HAS_IOPORT=y |
| 1275 | CONFIG_HAS_DMA=y | 1306 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig index 3e562b2775d4..c06262e41f7c 100644 --- a/arch/blackfin/configs/BF526-EZBRD_defconfig +++ b/arch/blackfin/configs/BF526-EZBRD_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -144,8 +144,8 @@ CONFIG_BF526=y | |||
| 144 | # CONFIG_BF561 is not set | 144 | # CONFIG_BF561 is not set |
| 145 | CONFIG_BF_REV_MIN=0 | 145 | CONFIG_BF_REV_MIN=0 |
| 146 | CONFIG_BF_REV_MAX=2 | 146 | CONFIG_BF_REV_MAX=2 |
| 147 | # CONFIG_BF_REV_0_0 is not set | 147 | CONFIG_BF_REV_0_0=y |
| 148 | CONFIG_BF_REV_0_1=y | 148 | # CONFIG_BF_REV_0_1 is not set |
| 149 | # CONFIG_BF_REV_0_2 is not set | 149 | # CONFIG_BF_REV_0_2 is not set |
| 150 | # CONFIG_BF_REV_0_3 is not set | 150 | # CONFIG_BF_REV_0_3 is not set |
| 151 | # CONFIG_BF_REV_0_4 is not set | 151 | # CONFIG_BF_REV_0_4 is not set |
| @@ -264,7 +264,10 @@ CONFIG_HZ=250 | |||
| 264 | # CONFIG_SCHED_HRTICK is not set | 264 | # CONFIG_SCHED_HRTICK is not set |
| 265 | CONFIG_GENERIC_TIME=y | 265 | CONFIG_GENERIC_TIME=y |
| 266 | CONFIG_GENERIC_CLOCKEVENTS=y | 266 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 267 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 268 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 267 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 269 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 270 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 268 | # CONFIG_NO_HZ is not set | 271 | # CONFIG_NO_HZ is not set |
| 269 | # CONFIG_HIGH_RES_TIMERS is not set | 272 | # CONFIG_HIGH_RES_TIMERS is not set |
| 270 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 273 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| @@ -409,7 +412,7 @@ CONFIG_IP_PNP=y | |||
| 409 | # CONFIG_NET_IPIP is not set | 412 | # CONFIG_NET_IPIP is not set |
| 410 | # CONFIG_NET_IPGRE is not set | 413 | # CONFIG_NET_IPGRE is not set |
| 411 | # CONFIG_ARPD is not set | 414 | # CONFIG_ARPD is not set |
| 412 | CONFIG_SYN_COOKIES=y | 415 | # CONFIG_SYN_COOKIES is not set |
| 413 | # CONFIG_INET_AH is not set | 416 | # CONFIG_INET_AH is not set |
| 414 | # CONFIG_INET_ESP is not set | 417 | # CONFIG_INET_ESP is not set |
| 415 | # CONFIG_INET_IPCOMP is not set | 418 | # CONFIG_INET_IPCOMP is not set |
| @@ -491,7 +494,7 @@ CONFIG_MTD_PARTITIONS=y | |||
| 491 | # | 494 | # |
| 492 | # User Modules And Translation Layers | 495 | # User Modules And Translation Layers |
| 493 | # | 496 | # |
| 494 | CONFIG_MTD_CHAR=m | 497 | CONFIG_MTD_CHAR=y |
| 495 | CONFIG_MTD_BLKDEVS=y | 498 | CONFIG_MTD_BLKDEVS=y |
| 496 | CONFIG_MTD_BLOCK=y | 499 | CONFIG_MTD_BLOCK=y |
| 497 | # CONFIG_FTL is not set | 500 | # CONFIG_FTL is not set |
| @@ -504,9 +507,9 @@ CONFIG_MTD_BLOCK=y | |||
| 504 | # | 507 | # |
| 505 | # RAM/ROM/Flash chip drivers | 508 | # RAM/ROM/Flash chip drivers |
| 506 | # | 509 | # |
| 507 | # CONFIG_MTD_CFI is not set | 510 | CONFIG_MTD_CFI=y |
| 508 | CONFIG_MTD_JEDECPROBE=m | 511 | # CONFIG_MTD_JEDECPROBE is not set |
| 509 | CONFIG_MTD_GEN_PROBE=m | 512 | CONFIG_MTD_GEN_PROBE=y |
| 510 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | 513 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set |
| 511 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 514 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
| 512 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 515 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
| @@ -518,9 +521,10 @@ CONFIG_MTD_CFI_I1=y | |||
| 518 | CONFIG_MTD_CFI_I2=y | 521 | CONFIG_MTD_CFI_I2=y |
| 519 | # CONFIG_MTD_CFI_I4 is not set | 522 | # CONFIG_MTD_CFI_I4 is not set |
| 520 | # CONFIG_MTD_CFI_I8 is not set | 523 | # CONFIG_MTD_CFI_I8 is not set |
| 521 | # CONFIG_MTD_CFI_INTELEXT is not set | 524 | CONFIG_MTD_CFI_INTELEXT=y |
| 522 | # CONFIG_MTD_CFI_AMDSTD is not set | 525 | # CONFIG_MTD_CFI_AMDSTD is not set |
| 523 | # CONFIG_MTD_CFI_STAA is not set | 526 | # CONFIG_MTD_CFI_STAA is not set |
| 527 | CONFIG_MTD_CFI_UTIL=y | ||
| 524 | CONFIG_MTD_RAM=y | 528 | CONFIG_MTD_RAM=y |
| 525 | CONFIG_MTD_ROM=m | 529 | CONFIG_MTD_ROM=m |
| 526 | # CONFIG_MTD_ABSENT is not set | 530 | # CONFIG_MTD_ABSENT is not set |
| @@ -529,7 +533,8 @@ CONFIG_MTD_ROM=m | |||
| 529 | # Mapping drivers for chip access | 533 | # Mapping drivers for chip access |
| 530 | # | 534 | # |
| 531 | CONFIG_MTD_COMPLEX_MAPPINGS=y | 535 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
| 532 | # CONFIG_MTD_PHYSMAP is not set | 536 | CONFIG_MTD_PHYSMAP=y |
| 537 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 533 | # CONFIG_MTD_GPIO_ADDR is not set | 538 | # CONFIG_MTD_GPIO_ADDR is not set |
| 534 | # CONFIG_MTD_UCLINUX is not set | 539 | # CONFIG_MTD_UCLINUX is not set |
| 535 | # CONFIG_MTD_PLATRAM is not set | 540 | # CONFIG_MTD_PLATRAM is not set |
| @@ -597,9 +602,42 @@ CONFIG_HAVE_IDE=y | |||
| 597 | # SCSI device support | 602 | # SCSI device support |
| 598 | # | 603 | # |
| 599 | # CONFIG_RAID_ATTRS is not set | 604 | # CONFIG_RAID_ATTRS is not set |
| 600 | # CONFIG_SCSI is not set | 605 | CONFIG_SCSI=y |
| 601 | # CONFIG_SCSI_DMA is not set | 606 | CONFIG_SCSI_DMA=y |
| 607 | # CONFIG_SCSI_TGT is not set | ||
| 602 | # CONFIG_SCSI_NETLINK is not set | 608 | # CONFIG_SCSI_NETLINK is not set |
| 609 | # CONFIG_SCSI_PROC_FS is not set | ||
| 610 | |||
| 611 | # | ||
| 612 | # SCSI support type (disk, tape, CD-ROM) | ||
| 613 | # | ||
| 614 | CONFIG_BLK_DEV_SD=y | ||
| 615 | # CONFIG_CHR_DEV_ST is not set | ||
| 616 | # CONFIG_CHR_DEV_OSST is not set | ||
| 617 | CONFIG_BLK_DEV_SR=m | ||
| 618 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
| 619 | # CONFIG_CHR_DEV_SG is not set | ||
| 620 | # CONFIG_CHR_DEV_SCH is not set | ||
| 621 | |||
| 622 | # | ||
| 623 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 624 | # | ||
| 625 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 626 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 627 | # CONFIG_SCSI_LOGGING is not set | ||
| 628 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 629 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 630 | |||
| 631 | # | ||
| 632 | # SCSI Transports | ||
| 633 | # | ||
| 634 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 635 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 636 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 637 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 638 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 639 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 640 | # CONFIG_SCSI_DH is not set | ||
| 603 | # CONFIG_ATA is not set | 641 | # CONFIG_ATA is not set |
| 604 | # CONFIG_MD is not set | 642 | # CONFIG_MD is not set |
| 605 | CONFIG_NETDEVICES=y | 643 | CONFIG_NETDEVICES=y |
| @@ -644,9 +682,8 @@ CONFIG_BFIN_MAC_RMII=y | |||
| 644 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 682 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 645 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 683 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 646 | # CONFIG_B44 is not set | 684 | # CONFIG_B44 is not set |
| 647 | CONFIG_NETDEV_1000=y | 685 | # CONFIG_NETDEV_1000 is not set |
| 648 | # CONFIG_AX88180 is not set | 686 | # CONFIG_NETDEV_10000 is not set |
| 649 | CONFIG_NETDEV_10000=y | ||
| 650 | 687 | ||
| 651 | # | 688 | # |
| 652 | # Wireless LAN | 689 | # Wireless LAN |
| @@ -715,14 +752,14 @@ CONFIG_INPUT_MISC=y | |||
| 715 | # Character devices | 752 | # Character devices |
| 716 | # | 753 | # |
| 717 | # CONFIG_AD9960 is not set | 754 | # CONFIG_AD9960 is not set |
| 718 | # CONFIG_SPI_ADC_BF533 is not set | 755 | CONFIG_BFIN_DMA_INTERFACE=m |
| 719 | # CONFIG_BF5xx_PPIFCD is not set | 756 | # CONFIG_BFIN_PPI is not set |
| 757 | # CONFIG_BFIN_PPIFCD is not set | ||
| 720 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 758 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 721 | # CONFIG_BF5xx_PPI is not set | 759 | # CONFIG_BFIN_SPI_ADC is not set |
| 722 | # CONFIG_BFIN_SPORT is not set | 760 | # CONFIG_BFIN_SPORT is not set |
| 723 | # CONFIG_BFIN_TIMER_LATENCY is not set | 761 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 724 | # CONFIG_TWI_LCD is not set | 762 | # CONFIG_BFIN_TWI_LCD is not set |
| 725 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 726 | CONFIG_SIMPLE_GPIO=m | 763 | CONFIG_SIMPLE_GPIO=m |
| 727 | CONFIG_VT=y | 764 | CONFIG_VT=y |
| 728 | CONFIG_CONSOLE_TRANSLATIONS=y | 765 | CONFIG_CONSOLE_TRANSLATIONS=y |
| @@ -832,11 +869,35 @@ CONFIG_SPI_BFIN=y | |||
| 832 | # CONFIG_SPI_SPIDEV is not set | 869 | # CONFIG_SPI_SPIDEV is not set |
| 833 | # CONFIG_SPI_TLE62X0 is not set | 870 | # CONFIG_SPI_TLE62X0 is not set |
| 834 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 871 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 835 | # CONFIG_GPIOLIB is not set | 872 | CONFIG_GPIOLIB=y |
| 873 | # CONFIG_DEBUG_GPIO is not set | ||
| 874 | CONFIG_GPIO_SYSFS=y | ||
| 875 | |||
| 876 | # | ||
| 877 | # Memory mapped GPIO expanders: | ||
| 878 | # | ||
| 879 | |||
| 880 | # | ||
| 881 | # I2C GPIO expanders: | ||
| 882 | # | ||
| 883 | # CONFIG_GPIO_MAX732X is not set | ||
| 884 | # CONFIG_GPIO_PCA953X is not set | ||
| 885 | # CONFIG_GPIO_PCF857X is not set | ||
| 886 | |||
| 887 | # | ||
| 888 | # PCI GPIO expanders: | ||
| 889 | # | ||
| 890 | |||
| 891 | # | ||
| 892 | # SPI GPIO expanders: | ||
| 893 | # | ||
| 894 | # CONFIG_GPIO_MAX7301 is not set | ||
| 895 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 836 | # CONFIG_W1 is not set | 896 | # CONFIG_W1 is not set |
| 837 | # CONFIG_POWER_SUPPLY is not set | 897 | # CONFIG_POWER_SUPPLY is not set |
| 838 | CONFIG_HWMON=y | 898 | CONFIG_HWMON=y |
| 839 | # CONFIG_HWMON_VID is not set | 899 | # CONFIG_HWMON_VID is not set |
| 900 | # CONFIG_SENSORS_AD5252 is not set | ||
| 840 | # CONFIG_SENSORS_AD7414 is not set | 901 | # CONFIG_SENSORS_AD7414 is not set |
| 841 | # CONFIG_SENSORS_AD7418 is not set | 902 | # CONFIG_SENSORS_AD7418 is not set |
| 842 | # CONFIG_SENSORS_ADCXX is not set | 903 | # CONFIG_SENSORS_ADCXX is not set |
| @@ -920,6 +981,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 920 | # CONFIG_HTC_PASIC3 is not set | 981 | # CONFIG_HTC_PASIC3 is not set |
| 921 | # CONFIG_MFD_TMIO is not set | 982 | # CONFIG_MFD_TMIO is not set |
| 922 | # CONFIG_PMIC_DA903X is not set | 983 | # CONFIG_PMIC_DA903X is not set |
| 984 | # CONFIG_PMIC_ADP5520 is not set | ||
| 923 | # CONFIG_MFD_WM8400 is not set | 985 | # CONFIG_MFD_WM8400 is not set |
| 924 | # CONFIG_MFD_WM8350_I2C is not set | 986 | # CONFIG_MFD_WM8350_I2C is not set |
| 925 | # CONFIG_REGULATOR is not set | 987 | # CONFIG_REGULATOR is not set |
| @@ -1008,8 +1070,8 @@ CONFIG_USB=y | |||
| 1008 | # | 1070 | # |
| 1009 | # Miscellaneous USB options | 1071 | # Miscellaneous USB options |
| 1010 | # | 1072 | # |
| 1011 | # CONFIG_USB_DEVICEFS is not set | 1073 | CONFIG_USB_DEVICEFS=y |
| 1012 | CONFIG_USB_DEVICE_CLASS=y | 1074 | # CONFIG_USB_DEVICE_CLASS is not set |
| 1013 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1075 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1014 | # CONFIG_USB_OTG is not set | 1076 | # CONFIG_USB_OTG is not set |
| 1015 | # CONFIG_USB_OTG_WHITELIST is not set | 1077 | # CONFIG_USB_OTG_WHITELIST is not set |
| @@ -1037,10 +1099,10 @@ CONFIG_USB_MUSB_SOC=y | |||
| 1037 | CONFIG_USB_MUSB_HOST=y | 1099 | CONFIG_USB_MUSB_HOST=y |
| 1038 | # CONFIG_USB_MUSB_PERIPHERAL is not set | 1100 | # CONFIG_USB_MUSB_PERIPHERAL is not set |
| 1039 | # CONFIG_USB_MUSB_OTG is not set | 1101 | # CONFIG_USB_MUSB_OTG is not set |
| 1040 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1041 | CONFIG_USB_MUSB_HDRC_HCD=y | 1102 | CONFIG_USB_MUSB_HDRC_HCD=y |
| 1042 | CONFIG_MUSB_PIO_ONLY=y | 1103 | # CONFIG_MUSB_PIO_ONLY is not set |
| 1043 | CONFIG_MUSB_DMA_POLL=y | 1104 | CONFIG_USB_INVENTRA_DMA=y |
| 1105 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1044 | # CONFIG_USB_MUSB_DEBUG is not set | 1106 | # CONFIG_USB_MUSB_DEBUG is not set |
| 1045 | 1107 | ||
| 1046 | # | 1108 | # |
| @@ -1058,7 +1120,7 @@ CONFIG_MUSB_DMA_POLL=y | |||
| 1058 | # | 1120 | # |
| 1059 | # see USB_STORAGE Help for more information | 1121 | # see USB_STORAGE Help for more information |
| 1060 | # | 1122 | # |
| 1061 | CONFIG_USB_STORAGE=m | 1123 | CONFIG_USB_STORAGE=y |
| 1062 | # CONFIG_USB_STORAGE_DEBUG is not set | 1124 | # CONFIG_USB_STORAGE_DEBUG is not set |
| 1063 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1125 | # CONFIG_USB_STORAGE_DATAFAB is not set |
| 1064 | # CONFIG_USB_STORAGE_FREECOM is not set | 1126 | # CONFIG_USB_STORAGE_FREECOM is not set |
| @@ -1107,33 +1169,10 @@ CONFIG_USB_STORAGE=m | |||
| 1107 | # CONFIG_USB_LD is not set | 1169 | # CONFIG_USB_LD is not set |
| 1108 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1170 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1109 | # CONFIG_USB_IOWARRIOR is not set | 1171 | # CONFIG_USB_IOWARRIOR is not set |
| 1172 | # CONFIG_USB_TEST is not set | ||
| 1110 | # CONFIG_USB_ISIGHTFW is not set | 1173 | # CONFIG_USB_ISIGHTFW is not set |
| 1111 | # CONFIG_USB_VST is not set | 1174 | # CONFIG_USB_VST is not set |
| 1112 | # CONFIG_USB_GADGET is not set | 1175 | # CONFIG_USB_GADGET is not set |
| 1113 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1114 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1115 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1116 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1117 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1118 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1119 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1120 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1121 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1122 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1123 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1124 | # CONFIG_USB_GADGET_NET2272 is not set | ||
| 1125 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1126 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1127 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1128 | # CONFIG_USB_ZERO is not set | ||
| 1129 | # CONFIG_USB_AUDIO is not set | ||
| 1130 | # CONFIG_USB_ETH is not set | ||
| 1131 | # CONFIG_USB_GADGETFS is not set | ||
| 1132 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1133 | # CONFIG_USB_G_SERIAL is not set | ||
| 1134 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1135 | # CONFIG_USB_G_PRINTER is not set | ||
| 1136 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1137 | # CONFIG_MMC is not set | 1176 | # CONFIG_MMC is not set |
| 1138 | # CONFIG_MEMSTICK is not set | 1177 | # CONFIG_MEMSTICK is not set |
| 1139 | # CONFIG_NEW_LEDS is not set | 1178 | # CONFIG_NEW_LEDS is not set |
| @@ -1206,7 +1245,8 @@ CONFIG_RTC_DRV_BFIN=y | |||
| 1206 | # | 1245 | # |
| 1207 | # File systems | 1246 | # File systems |
| 1208 | # | 1247 | # |
| 1209 | # CONFIG_EXT2_FS is not set | 1248 | CONFIG_EXT2_FS=m |
| 1249 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1210 | # CONFIG_EXT3_FS is not set | 1250 | # CONFIG_EXT3_FS is not set |
| 1211 | # CONFIG_EXT4_FS is not set | 1251 | # CONFIG_EXT4_FS is not set |
| 1212 | # CONFIG_REISERFS_FS is not set | 1252 | # CONFIG_REISERFS_FS is not set |
| @@ -1226,14 +1266,19 @@ CONFIG_INOTIFY_USER=y | |||
| 1226 | # | 1266 | # |
| 1227 | # CD-ROM/DVD Filesystems | 1267 | # CD-ROM/DVD Filesystems |
| 1228 | # | 1268 | # |
| 1229 | # CONFIG_ISO9660_FS is not set | 1269 | CONFIG_ISO9660_FS=m |
| 1270 | CONFIG_JOLIET=y | ||
| 1271 | # CONFIG_ZISOFS is not set | ||
| 1230 | # CONFIG_UDF_FS is not set | 1272 | # CONFIG_UDF_FS is not set |
| 1231 | 1273 | ||
| 1232 | # | 1274 | # |
| 1233 | # DOS/FAT/NT Filesystems | 1275 | # DOS/FAT/NT Filesystems |
| 1234 | # | 1276 | # |
| 1277 | CONFIG_FAT_FS=m | ||
| 1235 | # CONFIG_MSDOS_FS is not set | 1278 | # CONFIG_MSDOS_FS is not set |
| 1236 | # CONFIG_VFAT_FS is not set | 1279 | CONFIG_VFAT_FS=m |
| 1280 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1281 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1237 | # CONFIG_NTFS_FS is not set | 1282 | # CONFIG_NTFS_FS is not set |
| 1238 | 1283 | ||
| 1239 | # | 1284 | # |
| @@ -1256,16 +1301,6 @@ CONFIG_SYSFS=y | |||
| 1256 | # CONFIG_BEFS_FS is not set | 1301 | # CONFIG_BEFS_FS is not set |
| 1257 | # CONFIG_BFS_FS is not set | 1302 | # CONFIG_BFS_FS is not set |
| 1258 | # CONFIG_EFS_FS is not set | 1303 | # CONFIG_EFS_FS is not set |
| 1259 | CONFIG_YAFFS_FS=m | ||
| 1260 | CONFIG_YAFFS_YAFFS1=y | ||
| 1261 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1262 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1263 | CONFIG_YAFFS_YAFFS2=y | ||
| 1264 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1265 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1266 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1267 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1268 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1269 | CONFIG_JFFS2_FS=m | 1304 | CONFIG_JFFS2_FS=m |
| 1270 | CONFIG_JFFS2_FS_DEBUG=0 | 1305 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1271 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1306 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -1277,6 +1312,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1277 | # CONFIG_JFFS2_LZO is not set | 1312 | # CONFIG_JFFS2_LZO is not set |
| 1278 | CONFIG_JFFS2_RTIME=y | 1313 | CONFIG_JFFS2_RTIME=y |
| 1279 | # CONFIG_JFFS2_RUBIN is not set | 1314 | # CONFIG_JFFS2_RUBIN is not set |
| 1315 | CONFIG_YAFFS_FS=m | ||
| 1316 | CONFIG_YAFFS_YAFFS1=y | ||
| 1317 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1318 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1319 | CONFIG_YAFFS_YAFFS2=y | ||
| 1320 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1321 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1322 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1323 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1324 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1280 | # CONFIG_CRAMFS is not set | 1325 | # CONFIG_CRAMFS is not set |
| 1281 | # CONFIG_VXFS_FS is not set | 1326 | # CONFIG_VXFS_FS is not set |
| 1282 | # CONFIG_MINIX_FS is not set | 1327 | # CONFIG_MINIX_FS is not set |
| @@ -1313,7 +1358,7 @@ CONFIG_SMB_FS=m | |||
| 1313 | CONFIG_MSDOS_PARTITION=y | 1358 | CONFIG_MSDOS_PARTITION=y |
| 1314 | CONFIG_NLS=m | 1359 | CONFIG_NLS=m |
| 1315 | CONFIG_NLS_DEFAULT="iso8859-1" | 1360 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 1316 | # CONFIG_NLS_CODEPAGE_437 is not set | 1361 | CONFIG_NLS_CODEPAGE_437=m |
| 1317 | # CONFIG_NLS_CODEPAGE_737 is not set | 1362 | # CONFIG_NLS_CODEPAGE_737 is not set |
| 1318 | # CONFIG_NLS_CODEPAGE_775 is not set | 1363 | # CONFIG_NLS_CODEPAGE_775 is not set |
| 1319 | # CONFIG_NLS_CODEPAGE_850 is not set | 1364 | # CONFIG_NLS_CODEPAGE_850 is not set |
| @@ -1328,7 +1373,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 1328 | # CONFIG_NLS_CODEPAGE_865 is not set | 1373 | # CONFIG_NLS_CODEPAGE_865 is not set |
| 1329 | # CONFIG_NLS_CODEPAGE_866 is not set | 1374 | # CONFIG_NLS_CODEPAGE_866 is not set |
| 1330 | # CONFIG_NLS_CODEPAGE_869 is not set | 1375 | # CONFIG_NLS_CODEPAGE_869 is not set |
| 1331 | # CONFIG_NLS_CODEPAGE_936 is not set | 1376 | CONFIG_NLS_CODEPAGE_936=m |
| 1332 | # CONFIG_NLS_CODEPAGE_950 is not set | 1377 | # CONFIG_NLS_CODEPAGE_950 is not set |
| 1333 | # CONFIG_NLS_CODEPAGE_932 is not set | 1378 | # CONFIG_NLS_CODEPAGE_932 is not set |
| 1334 | # CONFIG_NLS_CODEPAGE_949 is not set | 1379 | # CONFIG_NLS_CODEPAGE_949 is not set |
| @@ -1337,7 +1382,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 1337 | # CONFIG_NLS_CODEPAGE_1250 is not set | 1382 | # CONFIG_NLS_CODEPAGE_1250 is not set |
| 1338 | # CONFIG_NLS_CODEPAGE_1251 is not set | 1383 | # CONFIG_NLS_CODEPAGE_1251 is not set |
| 1339 | # CONFIG_NLS_ASCII is not set | 1384 | # CONFIG_NLS_ASCII is not set |
| 1340 | # CONFIG_NLS_ISO8859_1 is not set | 1385 | CONFIG_NLS_ISO8859_1=m |
| 1341 | # CONFIG_NLS_ISO8859_2 is not set | 1386 | # CONFIG_NLS_ISO8859_2 is not set |
| 1342 | # CONFIG_NLS_ISO8859_3 is not set | 1387 | # CONFIG_NLS_ISO8859_3 is not set |
| 1343 | # CONFIG_NLS_ISO8859_4 is not set | 1388 | # CONFIG_NLS_ISO8859_4 is not set |
| @@ -1350,7 +1395,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 1350 | # CONFIG_NLS_ISO8859_15 is not set | 1395 | # CONFIG_NLS_ISO8859_15 is not set |
| 1351 | # CONFIG_NLS_KOI8_R is not set | 1396 | # CONFIG_NLS_KOI8_R is not set |
| 1352 | # CONFIG_NLS_KOI8_U is not set | 1397 | # CONFIG_NLS_KOI8_U is not set |
| 1353 | # CONFIG_NLS_UTF8 is not set | 1398 | CONFIG_NLS_UTF8=m |
| 1354 | # CONFIG_DLM is not set | 1399 | # CONFIG_DLM is not set |
| 1355 | 1400 | ||
| 1356 | # | 1401 | # |
| @@ -1365,7 +1410,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1365 | CONFIG_DEBUG_FS=y | 1410 | CONFIG_DEBUG_FS=y |
| 1366 | # CONFIG_HEADERS_CHECK is not set | 1411 | # CONFIG_HEADERS_CHECK is not set |
| 1367 | CONFIG_DEBUG_KERNEL=y | 1412 | CONFIG_DEBUG_KERNEL=y |
| 1368 | # CONFIG_DEBUG_SHIRQ is not set | 1413 | CONFIG_DEBUG_SHIRQ=y |
| 1369 | CONFIG_DETECT_SOFTLOCKUP=y | 1414 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1370 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1415 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1371 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1416 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1374,8 +1419,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1374 | # CONFIG_TIMER_STATS is not set | 1419 | # CONFIG_TIMER_STATS is not set |
| 1375 | # CONFIG_DEBUG_OBJECTS is not set | 1420 | # CONFIG_DEBUG_OBJECTS is not set |
| 1376 | # CONFIG_DEBUG_SLAB is not set | 1421 | # CONFIG_DEBUG_SLAB is not set |
| 1377 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1378 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1379 | # CONFIG_DEBUG_SPINLOCK is not set | 1422 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1380 | # CONFIG_DEBUG_MUTEXES is not set | 1423 | # CONFIG_DEBUG_MUTEXES is not set |
| 1381 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1424 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1395,7 +1438,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1395 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1438 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1396 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1439 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1397 | # CONFIG_FAULT_INJECTION is not set | 1440 | # CONFIG_FAULT_INJECTION is not set |
| 1398 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1399 | 1441 | ||
| 1400 | # | 1442 | # |
| 1401 | # Tracers | 1443 | # Tracers |
| @@ -1411,16 +1453,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1411 | # CONFIG_DEBUG_STACK_USAGE is not set | 1453 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1412 | CONFIG_DEBUG_VERBOSE=y | 1454 | CONFIG_DEBUG_VERBOSE=y |
| 1413 | CONFIG_DEBUG_MMRS=y | 1455 | CONFIG_DEBUG_MMRS=y |
| 1414 | # CONFIG_DEBUG_HWERR is not set | 1456 | CONFIG_DEBUG_HWERR=y |
| 1415 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1457 | CONFIG_EXACT_HWERR=y |
| 1458 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1459 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1460 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1461 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1416 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1462 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1417 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1463 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1418 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1464 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1419 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1465 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1420 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1466 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1421 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1467 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1422 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1468 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1423 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1469 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1424 | CONFIG_EARLY_PRINTK=y | 1470 | CONFIG_EARLY_PRINTK=y |
| 1425 | CONFIG_CPLB_INFO=y | 1471 | CONFIG_CPLB_INFO=y |
| 1426 | CONFIG_ACCESS_CHECK=y | 1472 | CONFIG_ACCESS_CHECK=y |
| @@ -1534,7 +1580,6 @@ CONFIG_CRC32=y | |||
| 1534 | # CONFIG_LIBCRC32C is not set | 1580 | # CONFIG_LIBCRC32C is not set |
| 1535 | CONFIG_ZLIB_INFLATE=y | 1581 | CONFIG_ZLIB_INFLATE=y |
| 1536 | CONFIG_ZLIB_DEFLATE=m | 1582 | CONFIG_ZLIB_DEFLATE=m |
| 1537 | CONFIG_PLIST=y | ||
| 1538 | CONFIG_HAS_IOMEM=y | 1583 | CONFIG_HAS_IOMEM=y |
| 1539 | CONFIG_HAS_IOPORT=y | 1584 | CONFIG_HAS_IOPORT=y |
| 1540 | CONFIG_HAS_DMA=y | 1585 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index 911b5dba1dbc..e9175c608aa7 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -145,8 +145,8 @@ CONFIG_BF527=y | |||
| 145 | CONFIG_BF_REV_MIN=0 | 145 | CONFIG_BF_REV_MIN=0 |
| 146 | CONFIG_BF_REV_MAX=2 | 146 | CONFIG_BF_REV_MAX=2 |
| 147 | # CONFIG_BF_REV_0_0 is not set | 147 | # CONFIG_BF_REV_0_0 is not set |
| 148 | CONFIG_BF_REV_0_1=y | 148 | # CONFIG_BF_REV_0_1 is not set |
| 149 | # CONFIG_BF_REV_0_2 is not set | 149 | CONFIG_BF_REV_0_2=y |
| 150 | # CONFIG_BF_REV_0_3 is not set | 150 | # CONFIG_BF_REV_0_3 is not set |
| 151 | # CONFIG_BF_REV_0_4 is not set | 151 | # CONFIG_BF_REV_0_4 is not set |
| 152 | # CONFIG_BF_REV_0_5 is not set | 152 | # CONFIG_BF_REV_0_5 is not set |
| @@ -264,7 +264,10 @@ CONFIG_HZ=250 | |||
| 264 | # CONFIG_SCHED_HRTICK is not set | 264 | # CONFIG_SCHED_HRTICK is not set |
| 265 | CONFIG_GENERIC_TIME=y | 265 | CONFIG_GENERIC_TIME=y |
| 266 | CONFIG_GENERIC_CLOCKEVENTS=y | 266 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 267 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 268 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 267 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 269 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 270 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 268 | # CONFIG_NO_HZ is not set | 271 | # CONFIG_NO_HZ is not set |
| 269 | # CONFIG_HIGH_RES_TIMERS is not set | 272 | # CONFIG_HIGH_RES_TIMERS is not set |
| 270 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 273 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| @@ -318,7 +321,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
| 318 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 321 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 319 | CONFIG_ZONE_DMA_FLAG=1 | 322 | CONFIG_ZONE_DMA_FLAG=1 |
| 320 | CONFIG_VIRT_TO_BUS=y | 323 | CONFIG_VIRT_TO_BUS=y |
| 321 | CONFIG_BFIN_GPTIMERS=m | 324 | CONFIG_BFIN_GPTIMERS=y |
| 322 | # CONFIG_DMA_UNCACHED_4M is not set | 325 | # CONFIG_DMA_UNCACHED_4M is not set |
| 323 | # CONFIG_DMA_UNCACHED_2M is not set | 326 | # CONFIG_DMA_UNCACHED_2M is not set |
| 324 | CONFIG_DMA_UNCACHED_1M=y | 327 | CONFIG_DMA_UNCACHED_1M=y |
| @@ -409,7 +412,7 @@ CONFIG_IP_PNP=y | |||
| 409 | # CONFIG_NET_IPIP is not set | 412 | # CONFIG_NET_IPIP is not set |
| 410 | # CONFIG_NET_IPGRE is not set | 413 | # CONFIG_NET_IPGRE is not set |
| 411 | # CONFIG_ARPD is not set | 414 | # CONFIG_ARPD is not set |
| 412 | CONFIG_SYN_COOKIES=y | 415 | # CONFIG_SYN_COOKIES is not set |
| 413 | # CONFIG_INET_AH is not set | 416 | # CONFIG_INET_AH is not set |
| 414 | # CONFIG_INET_ESP is not set | 417 | # CONFIG_INET_ESP is not set |
| 415 | # CONFIG_INET_IPCOMP is not set | 418 | # CONFIG_INET_IPCOMP is not set |
| @@ -639,9 +642,42 @@ CONFIG_HAVE_IDE=y | |||
| 639 | # SCSI device support | 642 | # SCSI device support |
| 640 | # | 643 | # |
| 641 | # CONFIG_RAID_ATTRS is not set | 644 | # CONFIG_RAID_ATTRS is not set |
| 642 | # CONFIG_SCSI is not set | 645 | CONFIG_SCSI=y |
| 643 | # CONFIG_SCSI_DMA is not set | 646 | CONFIG_SCSI_DMA=y |
| 647 | # CONFIG_SCSI_TGT is not set | ||
| 644 | # CONFIG_SCSI_NETLINK is not set | 648 | # CONFIG_SCSI_NETLINK is not set |
| 649 | # CONFIG_SCSI_PROC_FS is not set | ||
| 650 | |||
| 651 | # | ||
| 652 | # SCSI support type (disk, tape, CD-ROM) | ||
| 653 | # | ||
| 654 | CONFIG_BLK_DEV_SD=y | ||
| 655 | # CONFIG_CHR_DEV_ST is not set | ||
| 656 | # CONFIG_CHR_DEV_OSST is not set | ||
| 657 | CONFIG_BLK_DEV_SR=m | ||
| 658 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
| 659 | # CONFIG_CHR_DEV_SG is not set | ||
| 660 | # CONFIG_CHR_DEV_SCH is not set | ||
| 661 | |||
| 662 | # | ||
| 663 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 664 | # | ||
| 665 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 666 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 667 | # CONFIG_SCSI_LOGGING is not set | ||
| 668 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 669 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 670 | |||
| 671 | # | ||
| 672 | # SCSI Transports | ||
| 673 | # | ||
| 674 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 675 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 676 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 677 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 678 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 679 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 680 | # CONFIG_SCSI_DH is not set | ||
| 645 | # CONFIG_ATA is not set | 681 | # CONFIG_ATA is not set |
| 646 | # CONFIG_MD is not set | 682 | # CONFIG_MD is not set |
| 647 | CONFIG_NETDEVICES=y | 683 | CONFIG_NETDEVICES=y |
| @@ -687,9 +723,8 @@ CONFIG_BFIN_MAC_RMII=y | |||
| 687 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 723 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 688 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 724 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 689 | # CONFIG_B44 is not set | 725 | # CONFIG_B44 is not set |
| 690 | CONFIG_NETDEV_1000=y | 726 | # CONFIG_NETDEV_1000 is not set |
| 691 | # CONFIG_AX88180 is not set | 727 | # CONFIG_NETDEV_10000 is not set |
| 692 | CONFIG_NETDEV_10000=y | ||
| 693 | 728 | ||
| 694 | # | 729 | # |
| 695 | # Wireless LAN | 730 | # Wireless LAN |
| @@ -758,14 +793,14 @@ CONFIG_INPUT_MISC=y | |||
| 758 | # Character devices | 793 | # Character devices |
| 759 | # | 794 | # |
| 760 | # CONFIG_AD9960 is not set | 795 | # CONFIG_AD9960 is not set |
| 761 | # CONFIG_SPI_ADC_BF533 is not set | 796 | CONFIG_BFIN_DMA_INTERFACE=m |
| 762 | # CONFIG_BF5xx_PPIFCD is not set | 797 | # CONFIG_BFIN_PPI is not set |
| 798 | # CONFIG_BFIN_PPIFCD is not set | ||
| 763 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 799 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 764 | CONFIG_BF5xx_PPI=m | 800 | # CONFIG_BFIN_SPI_ADC is not set |
| 765 | CONFIG_BFIN_SPORT=m | 801 | CONFIG_BFIN_SPORT=m |
| 766 | # CONFIG_BFIN_TIMER_LATENCY is not set | 802 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 767 | # CONFIG_TWI_LCD is not set | 803 | # CONFIG_BFIN_TWI_LCD is not set |
| 768 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 769 | CONFIG_SIMPLE_GPIO=m | 804 | CONFIG_SIMPLE_GPIO=m |
| 770 | CONFIG_VT=y | 805 | CONFIG_VT=y |
| 771 | CONFIG_CONSOLE_TRANSLATIONS=y | 806 | CONFIG_CONSOLE_TRANSLATIONS=y |
| @@ -875,7 +910,30 @@ CONFIG_SPI_BFIN=y | |||
| 875 | # CONFIG_SPI_SPIDEV is not set | 910 | # CONFIG_SPI_SPIDEV is not set |
| 876 | # CONFIG_SPI_TLE62X0 is not set | 911 | # CONFIG_SPI_TLE62X0 is not set |
| 877 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 912 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 878 | # CONFIG_GPIOLIB is not set | 913 | CONFIG_GPIOLIB=y |
| 914 | # CONFIG_DEBUG_GPIO is not set | ||
| 915 | CONFIG_GPIO_SYSFS=y | ||
| 916 | |||
| 917 | # | ||
| 918 | # Memory mapped GPIO expanders: | ||
| 919 | # | ||
| 920 | |||
| 921 | # | ||
| 922 | # I2C GPIO expanders: | ||
| 923 | # | ||
| 924 | # CONFIG_GPIO_MAX732X is not set | ||
| 925 | # CONFIG_GPIO_PCA953X is not set | ||
| 926 | # CONFIG_GPIO_PCF857X is not set | ||
| 927 | |||
| 928 | # | ||
| 929 | # PCI GPIO expanders: | ||
| 930 | # | ||
| 931 | |||
| 932 | # | ||
| 933 | # SPI GPIO expanders: | ||
| 934 | # | ||
| 935 | # CONFIG_GPIO_MAX7301 is not set | ||
| 936 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 879 | # CONFIG_W1 is not set | 937 | # CONFIG_W1 is not set |
| 880 | # CONFIG_POWER_SUPPLY is not set | 938 | # CONFIG_POWER_SUPPLY is not set |
| 881 | # CONFIG_HWMON is not set | 939 | # CONFIG_HWMON is not set |
| @@ -909,6 +967,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 909 | # CONFIG_HTC_PASIC3 is not set | 967 | # CONFIG_HTC_PASIC3 is not set |
| 910 | # CONFIG_MFD_TMIO is not set | 968 | # CONFIG_MFD_TMIO is not set |
| 911 | # CONFIG_PMIC_DA903X is not set | 969 | # CONFIG_PMIC_DA903X is not set |
| 970 | # CONFIG_PMIC_ADP5520 is not set | ||
| 912 | # CONFIG_MFD_WM8400 is not set | 971 | # CONFIG_MFD_WM8400 is not set |
| 913 | # CONFIG_MFD_WM8350_I2C is not set | 972 | # CONFIG_MFD_WM8350_I2C is not set |
| 914 | # CONFIG_REGULATOR is not set | 973 | # CONFIG_REGULATOR is not set |
| @@ -1091,8 +1150,8 @@ CONFIG_USB=y | |||
| 1091 | # | 1150 | # |
| 1092 | # Miscellaneous USB options | 1151 | # Miscellaneous USB options |
| 1093 | # | 1152 | # |
| 1094 | # CONFIG_USB_DEVICEFS is not set | 1153 | CONFIG_USB_DEVICEFS=y |
| 1095 | CONFIG_USB_DEVICE_CLASS=y | 1154 | # CONFIG_USB_DEVICE_CLASS is not set |
| 1096 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1155 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1097 | # CONFIG_USB_OTG is not set | 1156 | # CONFIG_USB_OTG is not set |
| 1098 | # CONFIG_USB_OTG_WHITELIST is not set | 1157 | # CONFIG_USB_OTG_WHITELIST is not set |
| @@ -1120,10 +1179,10 @@ CONFIG_USB_MUSB_SOC=y | |||
| 1120 | CONFIG_USB_MUSB_HOST=y | 1179 | CONFIG_USB_MUSB_HOST=y |
| 1121 | # CONFIG_USB_MUSB_PERIPHERAL is not set | 1180 | # CONFIG_USB_MUSB_PERIPHERAL is not set |
| 1122 | # CONFIG_USB_MUSB_OTG is not set | 1181 | # CONFIG_USB_MUSB_OTG is not set |
| 1123 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1124 | CONFIG_USB_MUSB_HDRC_HCD=y | 1182 | CONFIG_USB_MUSB_HDRC_HCD=y |
| 1125 | CONFIG_MUSB_PIO_ONLY=y | 1183 | # CONFIG_MUSB_PIO_ONLY is not set |
| 1126 | CONFIG_MUSB_DMA_POLL=y | 1184 | CONFIG_USB_INVENTRA_DMA=y |
| 1185 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1127 | # CONFIG_USB_MUSB_DEBUG is not set | 1186 | # CONFIG_USB_MUSB_DEBUG is not set |
| 1128 | 1187 | ||
| 1129 | # | 1188 | # |
| @@ -1141,7 +1200,7 @@ CONFIG_MUSB_DMA_POLL=y | |||
| 1141 | # | 1200 | # |
| 1142 | # see USB_STORAGE Help for more information | 1201 | # see USB_STORAGE Help for more information |
| 1143 | # | 1202 | # |
| 1144 | CONFIG_USB_STORAGE=m | 1203 | CONFIG_USB_STORAGE=y |
| 1145 | # CONFIG_USB_STORAGE_DEBUG is not set | 1204 | # CONFIG_USB_STORAGE_DEBUG is not set |
| 1146 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1205 | # CONFIG_USB_STORAGE_DATAFAB is not set |
| 1147 | # CONFIG_USB_STORAGE_FREECOM is not set | 1206 | # CONFIG_USB_STORAGE_FREECOM is not set |
| @@ -1190,33 +1249,10 @@ CONFIG_USB_STORAGE=m | |||
| 1190 | # CONFIG_USB_LD is not set | 1249 | # CONFIG_USB_LD is not set |
| 1191 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1250 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1192 | # CONFIG_USB_IOWARRIOR is not set | 1251 | # CONFIG_USB_IOWARRIOR is not set |
| 1252 | # CONFIG_USB_TEST is not set | ||
| 1193 | # CONFIG_USB_ISIGHTFW is not set | 1253 | # CONFIG_USB_ISIGHTFW is not set |
| 1194 | # CONFIG_USB_VST is not set | 1254 | # CONFIG_USB_VST is not set |
| 1195 | # CONFIG_USB_GADGET is not set | 1255 | # CONFIG_USB_GADGET is not set |
| 1196 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1197 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1198 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1199 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1200 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1201 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1202 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1203 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1204 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1205 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1206 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1207 | # CONFIG_USB_GADGET_NET2272 is not set | ||
| 1208 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1209 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1210 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1211 | # CONFIG_USB_ZERO is not set | ||
| 1212 | # CONFIG_USB_AUDIO is not set | ||
| 1213 | # CONFIG_USB_ETH is not set | ||
| 1214 | # CONFIG_USB_GADGETFS is not set | ||
| 1215 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1216 | # CONFIG_USB_G_SERIAL is not set | ||
| 1217 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1218 | # CONFIG_USB_G_PRINTER is not set | ||
| 1219 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1220 | # CONFIG_MMC is not set | 1256 | # CONFIG_MMC is not set |
| 1221 | # CONFIG_MEMSTICK is not set | 1257 | # CONFIG_MEMSTICK is not set |
| 1222 | # CONFIG_NEW_LEDS is not set | 1258 | # CONFIG_NEW_LEDS is not set |
| @@ -1289,7 +1325,8 @@ CONFIG_RTC_DRV_BFIN=y | |||
| 1289 | # | 1325 | # |
| 1290 | # File systems | 1326 | # File systems |
| 1291 | # | 1327 | # |
| 1292 | # CONFIG_EXT2_FS is not set | 1328 | CONFIG_EXT2_FS=m |
| 1329 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1293 | # CONFIG_EXT3_FS is not set | 1330 | # CONFIG_EXT3_FS is not set |
| 1294 | # CONFIG_EXT4_FS is not set | 1331 | # CONFIG_EXT4_FS is not set |
| 1295 | # CONFIG_REISERFS_FS is not set | 1332 | # CONFIG_REISERFS_FS is not set |
| @@ -1309,14 +1346,20 @@ CONFIG_INOTIFY_USER=y | |||
| 1309 | # | 1346 | # |
| 1310 | # CD-ROM/DVD Filesystems | 1347 | # CD-ROM/DVD Filesystems |
| 1311 | # | 1348 | # |
| 1312 | # CONFIG_ISO9660_FS is not set | 1349 | CONFIG_ISO9660_FS=m |
| 1313 | # CONFIG_UDF_FS is not set | 1350 | CONFIG_JOLIET=y |
| 1351 | # CONFIG_ZISOFS is not set | ||
| 1352 | CONFIG_UDF_FS=m | ||
| 1353 | CONFIG_UDF_NLS=y | ||
| 1314 | 1354 | ||
| 1315 | # | 1355 | # |
| 1316 | # DOS/FAT/NT Filesystems | 1356 | # DOS/FAT/NT Filesystems |
| 1317 | # | 1357 | # |
| 1358 | CONFIG_FAT_FS=m | ||
| 1318 | # CONFIG_MSDOS_FS is not set | 1359 | # CONFIG_MSDOS_FS is not set |
| 1319 | # CONFIG_VFAT_FS is not set | 1360 | CONFIG_VFAT_FS=m |
| 1361 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1362 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1320 | # CONFIG_NTFS_FS is not set | 1363 | # CONFIG_NTFS_FS is not set |
| 1321 | 1364 | ||
| 1322 | # | 1365 | # |
| @@ -1339,16 +1382,6 @@ CONFIG_SYSFS=y | |||
| 1339 | # CONFIG_BEFS_FS is not set | 1382 | # CONFIG_BEFS_FS is not set |
| 1340 | # CONFIG_BFS_FS is not set | 1383 | # CONFIG_BFS_FS is not set |
| 1341 | # CONFIG_EFS_FS is not set | 1384 | # CONFIG_EFS_FS is not set |
| 1342 | CONFIG_YAFFS_FS=m | ||
| 1343 | CONFIG_YAFFS_YAFFS1=y | ||
| 1344 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1345 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1346 | CONFIG_YAFFS_YAFFS2=y | ||
| 1347 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1348 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1349 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1350 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1351 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1352 | CONFIG_JFFS2_FS=m | 1385 | CONFIG_JFFS2_FS=m |
| 1353 | CONFIG_JFFS2_FS_DEBUG=0 | 1386 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1354 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1387 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -1360,6 +1393,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1360 | # CONFIG_JFFS2_LZO is not set | 1393 | # CONFIG_JFFS2_LZO is not set |
| 1361 | CONFIG_JFFS2_RTIME=y | 1394 | CONFIG_JFFS2_RTIME=y |
| 1362 | # CONFIG_JFFS2_RUBIN is not set | 1395 | # CONFIG_JFFS2_RUBIN is not set |
| 1396 | CONFIG_YAFFS_FS=m | ||
| 1397 | CONFIG_YAFFS_YAFFS1=y | ||
| 1398 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1399 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1400 | CONFIG_YAFFS_YAFFS2=y | ||
| 1401 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1402 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1403 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1404 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1405 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1363 | # CONFIG_CRAMFS is not set | 1406 | # CONFIG_CRAMFS is not set |
| 1364 | # CONFIG_VXFS_FS is not set | 1407 | # CONFIG_VXFS_FS is not set |
| 1365 | # CONFIG_MINIX_FS is not set | 1408 | # CONFIG_MINIX_FS is not set |
| @@ -1396,7 +1439,7 @@ CONFIG_SMB_FS=m | |||
| 1396 | CONFIG_MSDOS_PARTITION=y | 1439 | CONFIG_MSDOS_PARTITION=y |
| 1397 | CONFIG_NLS=m | 1440 | CONFIG_NLS=m |
| 1398 | CONFIG_NLS_DEFAULT="iso8859-1" | 1441 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 1399 | # CONFIG_NLS_CODEPAGE_437 is not set | 1442 | CONFIG_NLS_CODEPAGE_437=m |
| 1400 | # CONFIG_NLS_CODEPAGE_737 is not set | 1443 | # CONFIG_NLS_CODEPAGE_737 is not set |
| 1401 | # CONFIG_NLS_CODEPAGE_775 is not set | 1444 | # CONFIG_NLS_CODEPAGE_775 is not set |
| 1402 | # CONFIG_NLS_CODEPAGE_850 is not set | 1445 | # CONFIG_NLS_CODEPAGE_850 is not set |
| @@ -1411,7 +1454,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 1411 | # CONFIG_NLS_CODEPAGE_865 is not set | 1454 | # CONFIG_NLS_CODEPAGE_865 is not set |
| 1412 | # CONFIG_NLS_CODEPAGE_866 is not set | 1455 | # CONFIG_NLS_CODEPAGE_866 is not set |
| 1413 | # CONFIG_NLS_CODEPAGE_869 is not set | 1456 | # CONFIG_NLS_CODEPAGE_869 is not set |
| 1414 | # CONFIG_NLS_CODEPAGE_936 is not set | 1457 | CONFIG_NLS_CODEPAGE_936=m |
| 1415 | # CONFIG_NLS_CODEPAGE_950 is not set | 1458 | # CONFIG_NLS_CODEPAGE_950 is not set |
| 1416 | # CONFIG_NLS_CODEPAGE_932 is not set | 1459 | # CONFIG_NLS_CODEPAGE_932 is not set |
| 1417 | # CONFIG_NLS_CODEPAGE_949 is not set | 1460 | # CONFIG_NLS_CODEPAGE_949 is not set |
| @@ -1420,7 +1463,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 1420 | # CONFIG_NLS_CODEPAGE_1250 is not set | 1463 | # CONFIG_NLS_CODEPAGE_1250 is not set |
| 1421 | # CONFIG_NLS_CODEPAGE_1251 is not set | 1464 | # CONFIG_NLS_CODEPAGE_1251 is not set |
| 1422 | # CONFIG_NLS_ASCII is not set | 1465 | # CONFIG_NLS_ASCII is not set |
| 1423 | # CONFIG_NLS_ISO8859_1 is not set | 1466 | CONFIG_NLS_ISO8859_1=m |
| 1424 | # CONFIG_NLS_ISO8859_2 is not set | 1467 | # CONFIG_NLS_ISO8859_2 is not set |
| 1425 | # CONFIG_NLS_ISO8859_3 is not set | 1468 | # CONFIG_NLS_ISO8859_3 is not set |
| 1426 | # CONFIG_NLS_ISO8859_4 is not set | 1469 | # CONFIG_NLS_ISO8859_4 is not set |
| @@ -1433,7 +1476,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 1433 | # CONFIG_NLS_ISO8859_15 is not set | 1476 | # CONFIG_NLS_ISO8859_15 is not set |
| 1434 | # CONFIG_NLS_KOI8_R is not set | 1477 | # CONFIG_NLS_KOI8_R is not set |
| 1435 | # CONFIG_NLS_KOI8_U is not set | 1478 | # CONFIG_NLS_KOI8_U is not set |
| 1436 | # CONFIG_NLS_UTF8 is not set | 1479 | CONFIG_NLS_UTF8=m |
| 1437 | # CONFIG_DLM is not set | 1480 | # CONFIG_DLM is not set |
| 1438 | 1481 | ||
| 1439 | # | 1482 | # |
| @@ -1448,7 +1491,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1448 | CONFIG_DEBUG_FS=y | 1491 | CONFIG_DEBUG_FS=y |
| 1449 | # CONFIG_HEADERS_CHECK is not set | 1492 | # CONFIG_HEADERS_CHECK is not set |
| 1450 | CONFIG_DEBUG_KERNEL=y | 1493 | CONFIG_DEBUG_KERNEL=y |
| 1451 | # CONFIG_DEBUG_SHIRQ is not set | 1494 | CONFIG_DEBUG_SHIRQ=y |
| 1452 | CONFIG_DETECT_SOFTLOCKUP=y | 1495 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1453 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1496 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1454 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1497 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1457,8 +1500,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1457 | # CONFIG_TIMER_STATS is not set | 1500 | # CONFIG_TIMER_STATS is not set |
| 1458 | # CONFIG_DEBUG_OBJECTS is not set | 1501 | # CONFIG_DEBUG_OBJECTS is not set |
| 1459 | # CONFIG_DEBUG_SLAB is not set | 1502 | # CONFIG_DEBUG_SLAB is not set |
| 1460 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1461 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1462 | # CONFIG_DEBUG_SPINLOCK is not set | 1503 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1463 | # CONFIG_DEBUG_MUTEXES is not set | 1504 | # CONFIG_DEBUG_MUTEXES is not set |
| 1464 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1505 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1478,7 +1519,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1478 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1519 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1479 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1520 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1480 | # CONFIG_FAULT_INJECTION is not set | 1521 | # CONFIG_FAULT_INJECTION is not set |
| 1481 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1482 | 1522 | ||
| 1483 | # | 1523 | # |
| 1484 | # Tracers | 1524 | # Tracers |
| @@ -1494,16 +1534,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1494 | # CONFIG_DEBUG_STACK_USAGE is not set | 1534 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1495 | CONFIG_DEBUG_VERBOSE=y | 1535 | CONFIG_DEBUG_VERBOSE=y |
| 1496 | CONFIG_DEBUG_MMRS=y | 1536 | CONFIG_DEBUG_MMRS=y |
| 1497 | # CONFIG_DEBUG_HWERR is not set | 1537 | CONFIG_DEBUG_HWERR=y |
| 1498 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1538 | CONFIG_EXACT_HWERR=y |
| 1539 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1540 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1541 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1542 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1499 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1543 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1500 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1544 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1501 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1545 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1502 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1546 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1503 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1547 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1504 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1548 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1505 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1549 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1506 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1550 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1507 | CONFIG_EARLY_PRINTK=y | 1551 | CONFIG_EARLY_PRINTK=y |
| 1508 | CONFIG_CPLB_INFO=y | 1552 | CONFIG_CPLB_INFO=y |
| 1509 | CONFIG_ACCESS_CHECK=y | 1553 | CONFIG_ACCESS_CHECK=y |
| @@ -1611,13 +1655,12 @@ CONFIG_BITREVERSE=y | |||
| 1611 | CONFIG_CRC_CCITT=m | 1655 | CONFIG_CRC_CCITT=m |
| 1612 | # CONFIG_CRC16 is not set | 1656 | # CONFIG_CRC16 is not set |
| 1613 | # CONFIG_CRC_T10DIF is not set | 1657 | # CONFIG_CRC_T10DIF is not set |
| 1614 | # CONFIG_CRC_ITU_T is not set | 1658 | CONFIG_CRC_ITU_T=m |
| 1615 | CONFIG_CRC32=y | 1659 | CONFIG_CRC32=y |
| 1616 | # CONFIG_CRC7 is not set | 1660 | # CONFIG_CRC7 is not set |
| 1617 | # CONFIG_LIBCRC32C is not set | 1661 | # CONFIG_LIBCRC32C is not set |
| 1618 | CONFIG_ZLIB_INFLATE=y | 1662 | CONFIG_ZLIB_INFLATE=y |
| 1619 | CONFIG_ZLIB_DEFLATE=m | 1663 | CONFIG_ZLIB_DEFLATE=m |
| 1620 | CONFIG_PLIST=y | ||
| 1621 | CONFIG_HAS_IOMEM=y | 1664 | CONFIG_HAS_IOMEM=y |
| 1622 | CONFIG_HAS_IOPORT=y | 1665 | CONFIG_HAS_IOPORT=y |
| 1623 | CONFIG_HAS_DMA=y | 1666 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 4c41e03efe0f..5aa63bafdd62 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -225,7 +225,10 @@ CONFIG_HZ=250 | |||
| 225 | CONFIG_SCHED_HRTICK=y | 225 | CONFIG_SCHED_HRTICK=y |
| 226 | CONFIG_GENERIC_TIME=y | 226 | CONFIG_GENERIC_TIME=y |
| 227 | CONFIG_GENERIC_CLOCKEVENTS=y | 227 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 228 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 229 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 228 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 230 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 231 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 229 | CONFIG_TICK_ONESHOT=y | 232 | CONFIG_TICK_ONESHOT=y |
| 230 | # CONFIG_NO_HZ is not set | 233 | # CONFIG_NO_HZ is not set |
| 231 | CONFIG_HIGH_RES_TIMERS=y | 234 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -382,7 +385,7 @@ CONFIG_IP_PNP=y | |||
| 382 | # CONFIG_NET_IPIP is not set | 385 | # CONFIG_NET_IPIP is not set |
| 383 | # CONFIG_NET_IPGRE is not set | 386 | # CONFIG_NET_IPGRE is not set |
| 384 | # CONFIG_ARPD is not set | 387 | # CONFIG_ARPD is not set |
| 385 | CONFIG_SYN_COOKIES=y | 388 | # CONFIG_SYN_COOKIES is not set |
| 386 | # CONFIG_INET_AH is not set | 389 | # CONFIG_INET_AH is not set |
| 387 | # CONFIG_INET_ESP is not set | 390 | # CONFIG_INET_ESP is not set |
| 388 | # CONFIG_INET_IPCOMP is not set | 391 | # CONFIG_INET_IPCOMP is not set |
| @@ -613,9 +616,8 @@ CONFIG_SMC91X=y | |||
| 613 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 616 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 614 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 617 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 615 | # CONFIG_B44 is not set | 618 | # CONFIG_B44 is not set |
| 616 | CONFIG_NETDEV_1000=y | 619 | # CONFIG_NETDEV_1000 is not set |
| 617 | # CONFIG_AX88180 is not set | 620 | # CONFIG_NETDEV_10000 is not set |
| 618 | CONFIG_NETDEV_10000=y | ||
| 619 | 621 | ||
| 620 | # | 622 | # |
| 621 | # Wireless LAN | 623 | # Wireless LAN |
| @@ -667,13 +669,13 @@ CONFIG_INPUT_EVDEV=m | |||
| 667 | # Character devices | 669 | # Character devices |
| 668 | # | 670 | # |
| 669 | # CONFIG_AD9960 is not set | 671 | # CONFIG_AD9960 is not set |
| 670 | # CONFIG_SPI_ADC_BF533 is not set | 672 | CONFIG_BFIN_DMA_INTERFACE=m |
| 671 | # CONFIG_BF5xx_PPIFCD is not set | 673 | # CONFIG_BFIN_PPI is not set |
| 674 | # CONFIG_BFIN_PPIFCD is not set | ||
| 672 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 675 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 673 | # CONFIG_BF5xx_PPI is not set | 676 | # CONFIG_BFIN_SPI_ADC is not set |
| 674 | CONFIG_BFIN_SPORT=y | 677 | CONFIG_BFIN_SPORT=y |
| 675 | # CONFIG_BFIN_TIMER_LATENCY is not set | 678 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 676 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 677 | CONFIG_SIMPLE_GPIO=m | 679 | CONFIG_SIMPLE_GPIO=m |
| 678 | # CONFIG_VT is not set | 680 | # CONFIG_VT is not set |
| 679 | # CONFIG_DEVKMEM is not set | 681 | # CONFIG_DEVKMEM is not set |
| @@ -729,7 +731,30 @@ CONFIG_SPI_BFIN=y | |||
| 729 | # CONFIG_SPI_SPIDEV is not set | 731 | # CONFIG_SPI_SPIDEV is not set |
| 730 | # CONFIG_SPI_TLE62X0 is not set | 732 | # CONFIG_SPI_TLE62X0 is not set |
| 731 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 733 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 732 | # CONFIG_GPIOLIB is not set | 734 | CONFIG_GPIOLIB=y |
| 735 | # CONFIG_DEBUG_GPIO is not set | ||
| 736 | CONFIG_GPIO_SYSFS=y | ||
| 737 | |||
| 738 | # | ||
| 739 | # Memory mapped GPIO expanders: | ||
| 740 | # | ||
| 741 | |||
| 742 | # | ||
| 743 | # I2C GPIO expanders: | ||
| 744 | # | ||
| 745 | # CONFIG_GPIO_MAX732X is not set | ||
| 746 | # CONFIG_GPIO_PCA953X is not set | ||
| 747 | # CONFIG_GPIO_PCF857X is not set | ||
| 748 | |||
| 749 | # | ||
| 750 | # PCI GPIO expanders: | ||
| 751 | # | ||
| 752 | |||
| 753 | # | ||
| 754 | # SPI GPIO expanders: | ||
| 755 | # | ||
| 756 | # CONFIG_GPIO_MAX7301 is not set | ||
| 757 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 733 | # CONFIG_W1 is not set | 758 | # CONFIG_W1 is not set |
| 734 | # CONFIG_POWER_SUPPLY is not set | 759 | # CONFIG_POWER_SUPPLY is not set |
| 735 | # CONFIG_HWMON is not set | 760 | # CONFIG_HWMON is not set |
| @@ -904,16 +929,6 @@ CONFIG_SYSFS=y | |||
| 904 | # CONFIG_BEFS_FS is not set | 929 | # CONFIG_BEFS_FS is not set |
| 905 | # CONFIG_BFS_FS is not set | 930 | # CONFIG_BFS_FS is not set |
| 906 | # CONFIG_EFS_FS is not set | 931 | # CONFIG_EFS_FS is not set |
| 907 | CONFIG_YAFFS_FS=m | ||
| 908 | CONFIG_YAFFS_YAFFS1=y | ||
| 909 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 910 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 911 | CONFIG_YAFFS_YAFFS2=y | ||
| 912 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 913 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 914 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 915 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 916 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 917 | CONFIG_JFFS2_FS=m | 932 | CONFIG_JFFS2_FS=m |
| 918 | CONFIG_JFFS2_FS_DEBUG=0 | 933 | CONFIG_JFFS2_FS_DEBUG=0 |
| 919 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 934 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -925,6 +940,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 925 | # CONFIG_JFFS2_LZO is not set | 940 | # CONFIG_JFFS2_LZO is not set |
| 926 | CONFIG_JFFS2_RTIME=y | 941 | CONFIG_JFFS2_RTIME=y |
| 927 | # CONFIG_JFFS2_RUBIN is not set | 942 | # CONFIG_JFFS2_RUBIN is not set |
| 943 | CONFIG_YAFFS_FS=m | ||
| 944 | CONFIG_YAFFS_YAFFS1=y | ||
| 945 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 946 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 947 | CONFIG_YAFFS_YAFFS2=y | ||
| 948 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 949 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 950 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 951 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 952 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 928 | # CONFIG_CRAMFS is not set | 953 | # CONFIG_CRAMFS is not set |
| 929 | # CONFIG_VXFS_FS is not set | 954 | # CONFIG_VXFS_FS is not set |
| 930 | # CONFIG_MINIX_FS is not set | 955 | # CONFIG_MINIX_FS is not set |
| @@ -1013,7 +1038,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1013 | CONFIG_DEBUG_FS=y | 1038 | CONFIG_DEBUG_FS=y |
| 1014 | # CONFIG_HEADERS_CHECK is not set | 1039 | # CONFIG_HEADERS_CHECK is not set |
| 1015 | CONFIG_DEBUG_KERNEL=y | 1040 | CONFIG_DEBUG_KERNEL=y |
| 1016 | # CONFIG_DEBUG_SHIRQ is not set | 1041 | CONFIG_DEBUG_SHIRQ=y |
| 1017 | CONFIG_DETECT_SOFTLOCKUP=y | 1042 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1018 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1043 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1019 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1044 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1022,8 +1047,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1022 | # CONFIG_TIMER_STATS is not set | 1047 | # CONFIG_TIMER_STATS is not set |
| 1023 | # CONFIG_DEBUG_OBJECTS is not set | 1048 | # CONFIG_DEBUG_OBJECTS is not set |
| 1024 | # CONFIG_DEBUG_SLAB is not set | 1049 | # CONFIG_DEBUG_SLAB is not set |
| 1025 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1026 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1027 | # CONFIG_DEBUG_SPINLOCK is not set | 1050 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1028 | # CONFIG_DEBUG_MUTEXES is not set | 1051 | # CONFIG_DEBUG_MUTEXES is not set |
| 1029 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1052 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1043,7 +1066,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1043 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1066 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1044 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1067 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1045 | # CONFIG_FAULT_INJECTION is not set | 1068 | # CONFIG_FAULT_INJECTION is not set |
| 1046 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1047 | 1069 | ||
| 1048 | # | 1070 | # |
| 1049 | # Tracers | 1071 | # Tracers |
| @@ -1059,16 +1081,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1059 | # CONFIG_DEBUG_STACK_USAGE is not set | 1081 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1060 | CONFIG_DEBUG_VERBOSE=y | 1082 | CONFIG_DEBUG_VERBOSE=y |
| 1061 | CONFIG_DEBUG_MMRS=y | 1083 | CONFIG_DEBUG_MMRS=y |
| 1062 | # CONFIG_DEBUG_HWERR is not set | 1084 | CONFIG_DEBUG_HWERR=y |
| 1063 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1085 | CONFIG_EXACT_HWERR=y |
| 1086 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1087 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1088 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1089 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1064 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1090 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1065 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1091 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1066 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1092 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1067 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1093 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1068 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1094 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1069 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1095 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1070 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1096 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1071 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1097 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1072 | CONFIG_EARLY_PRINTK=y | 1098 | CONFIG_EARLY_PRINTK=y |
| 1073 | CONFIG_CPLB_INFO=y | 1099 | CONFIG_CPLB_INFO=y |
| 1074 | CONFIG_ACCESS_CHECK=y | 1100 | CONFIG_ACCESS_CHECK=y |
| @@ -1181,7 +1207,6 @@ CONFIG_CRC32=y | |||
| 1181 | # CONFIG_LIBCRC32C is not set | 1207 | # CONFIG_LIBCRC32C is not set |
| 1182 | CONFIG_ZLIB_INFLATE=y | 1208 | CONFIG_ZLIB_INFLATE=y |
| 1183 | CONFIG_ZLIB_DEFLATE=m | 1209 | CONFIG_ZLIB_DEFLATE=m |
| 1184 | CONFIG_PLIST=y | ||
| 1185 | CONFIG_HAS_IOMEM=y | 1210 | CONFIG_HAS_IOMEM=y |
| 1186 | CONFIG_HAS_IOPORT=y | 1211 | CONFIG_HAS_IOPORT=y |
| 1187 | CONFIG_HAS_DMA=y | 1212 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index 9c482cd1b343..fed25329e13c 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -225,7 +225,10 @@ CONFIG_HZ=250 | |||
| 225 | CONFIG_SCHED_HRTICK=y | 225 | CONFIG_SCHED_HRTICK=y |
| 226 | CONFIG_GENERIC_TIME=y | 226 | CONFIG_GENERIC_TIME=y |
| 227 | CONFIG_GENERIC_CLOCKEVENTS=y | 227 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 228 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 229 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 228 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 230 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 231 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 229 | CONFIG_TICK_ONESHOT=y | 232 | CONFIG_TICK_ONESHOT=y |
| 230 | # CONFIG_NO_HZ is not set | 233 | # CONFIG_NO_HZ is not set |
| 231 | CONFIG_HIGH_RES_TIMERS=y | 234 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -382,7 +385,7 @@ CONFIG_IP_PNP=y | |||
| 382 | # CONFIG_NET_IPIP is not set | 385 | # CONFIG_NET_IPIP is not set |
| 383 | # CONFIG_NET_IPGRE is not set | 386 | # CONFIG_NET_IPGRE is not set |
| 384 | # CONFIG_ARPD is not set | 387 | # CONFIG_ARPD is not set |
| 385 | CONFIG_SYN_COOKIES=y | 388 | # CONFIG_SYN_COOKIES is not set |
| 386 | # CONFIG_INET_AH is not set | 389 | # CONFIG_INET_AH is not set |
| 387 | # CONFIG_INET_ESP is not set | 390 | # CONFIG_INET_ESP is not set |
| 388 | # CONFIG_INET_IPCOMP is not set | 391 | # CONFIG_INET_IPCOMP is not set |
| @@ -618,9 +621,8 @@ CONFIG_SMC91X=y | |||
| 618 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 621 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 619 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 622 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 620 | # CONFIG_B44 is not set | 623 | # CONFIG_B44 is not set |
| 621 | CONFIG_NETDEV_1000=y | 624 | # CONFIG_NETDEV_1000 is not set |
| 622 | # CONFIG_AX88180 is not set | 625 | # CONFIG_NETDEV_10000 is not set |
| 623 | CONFIG_NETDEV_10000=y | ||
| 624 | 626 | ||
| 625 | # | 627 | # |
| 626 | # Wireless LAN | 628 | # Wireless LAN |
| @@ -674,14 +676,14 @@ CONFIG_CONFIG_INPUT_PCF8574=m | |||
| 674 | # Character devices | 676 | # Character devices |
| 675 | # | 677 | # |
| 676 | # CONFIG_AD9960 is not set | 678 | # CONFIG_AD9960 is not set |
| 677 | # CONFIG_SPI_ADC_BF533 is not set | 679 | CONFIG_BFIN_DMA_INTERFACE=m |
| 678 | # CONFIG_BF5xx_PPIFCD is not set | 680 | # CONFIG_BFIN_PPI is not set |
| 681 | # CONFIG_BFIN_PPIFCD is not set | ||
| 679 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 682 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 680 | CONFIG_BF5xx_PPI=m | 683 | # CONFIG_BFIN_SPI_ADC is not set |
| 681 | CONFIG_BFIN_SPORT=m | 684 | CONFIG_BFIN_SPORT=m |
| 682 | # CONFIG_BFIN_TIMER_LATENCY is not set | 685 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 683 | # CONFIG_TWI_LCD is not set | 686 | # CONFIG_BFIN_TWI_LCD is not set |
| 684 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 685 | CONFIG_SIMPLE_GPIO=m | 687 | CONFIG_SIMPLE_GPIO=m |
| 686 | # CONFIG_VT is not set | 688 | # CONFIG_VT is not set |
| 687 | # CONFIG_DEVKMEM is not set | 689 | # CONFIG_DEVKMEM is not set |
| @@ -781,7 +783,30 @@ CONFIG_SPI_BFIN=y | |||
| 781 | # CONFIG_SPI_SPIDEV is not set | 783 | # CONFIG_SPI_SPIDEV is not set |
| 782 | # CONFIG_SPI_TLE62X0 is not set | 784 | # CONFIG_SPI_TLE62X0 is not set |
| 783 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 785 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 784 | # CONFIG_GPIOLIB is not set | 786 | CONFIG_GPIOLIB=y |
| 787 | # CONFIG_DEBUG_GPIO is not set | ||
| 788 | CONFIG_GPIO_SYSFS=y | ||
| 789 | |||
| 790 | # | ||
| 791 | # Memory mapped GPIO expanders: | ||
| 792 | # | ||
| 793 | |||
| 794 | # | ||
| 795 | # I2C GPIO expanders: | ||
| 796 | # | ||
| 797 | # CONFIG_GPIO_MAX732X is not set | ||
| 798 | # CONFIG_GPIO_PCA953X is not set | ||
| 799 | # CONFIG_GPIO_PCF857X is not set | ||
| 800 | |||
| 801 | # | ||
| 802 | # PCI GPIO expanders: | ||
| 803 | # | ||
| 804 | |||
| 805 | # | ||
| 806 | # SPI GPIO expanders: | ||
| 807 | # | ||
| 808 | # CONFIG_GPIO_MAX7301 is not set | ||
| 809 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 785 | # CONFIG_W1 is not set | 810 | # CONFIG_W1 is not set |
| 786 | # CONFIG_POWER_SUPPLY is not set | 811 | # CONFIG_POWER_SUPPLY is not set |
| 787 | # CONFIG_HWMON is not set | 812 | # CONFIG_HWMON is not set |
| @@ -1068,16 +1093,6 @@ CONFIG_SYSFS=y | |||
| 1068 | # CONFIG_BEFS_FS is not set | 1093 | # CONFIG_BEFS_FS is not set |
| 1069 | # CONFIG_BFS_FS is not set | 1094 | # CONFIG_BFS_FS is not set |
| 1070 | # CONFIG_EFS_FS is not set | 1095 | # CONFIG_EFS_FS is not set |
| 1071 | CONFIG_YAFFS_FS=m | ||
| 1072 | CONFIG_YAFFS_YAFFS1=y | ||
| 1073 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1074 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1075 | CONFIG_YAFFS_YAFFS2=y | ||
| 1076 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1077 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1078 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1079 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1080 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1081 | CONFIG_JFFS2_FS=m | 1096 | CONFIG_JFFS2_FS=m |
| 1082 | CONFIG_JFFS2_FS_DEBUG=0 | 1097 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1083 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1098 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -1089,6 +1104,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1089 | # CONFIG_JFFS2_LZO is not set | 1104 | # CONFIG_JFFS2_LZO is not set |
| 1090 | CONFIG_JFFS2_RTIME=y | 1105 | CONFIG_JFFS2_RTIME=y |
| 1091 | # CONFIG_JFFS2_RUBIN is not set | 1106 | # CONFIG_JFFS2_RUBIN is not set |
| 1107 | CONFIG_YAFFS_FS=m | ||
| 1108 | CONFIG_YAFFS_YAFFS1=y | ||
| 1109 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1110 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1111 | CONFIG_YAFFS_YAFFS2=y | ||
| 1112 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1113 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1114 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1115 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1116 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1092 | # CONFIG_CRAMFS is not set | 1117 | # CONFIG_CRAMFS is not set |
| 1093 | # CONFIG_VXFS_FS is not set | 1118 | # CONFIG_VXFS_FS is not set |
| 1094 | # CONFIG_MINIX_FS is not set | 1119 | # CONFIG_MINIX_FS is not set |
| @@ -1177,7 +1202,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1177 | CONFIG_DEBUG_FS=y | 1202 | CONFIG_DEBUG_FS=y |
| 1178 | # CONFIG_HEADERS_CHECK is not set | 1203 | # CONFIG_HEADERS_CHECK is not set |
| 1179 | CONFIG_DEBUG_KERNEL=y | 1204 | CONFIG_DEBUG_KERNEL=y |
| 1180 | # CONFIG_DEBUG_SHIRQ is not set | 1205 | CONFIG_DEBUG_SHIRQ=y |
| 1181 | CONFIG_DETECT_SOFTLOCKUP=y | 1206 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1182 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1207 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1183 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1208 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1186,8 +1211,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1186 | # CONFIG_TIMER_STATS is not set | 1211 | # CONFIG_TIMER_STATS is not set |
| 1187 | # CONFIG_DEBUG_OBJECTS is not set | 1212 | # CONFIG_DEBUG_OBJECTS is not set |
| 1188 | # CONFIG_DEBUG_SLAB is not set | 1213 | # CONFIG_DEBUG_SLAB is not set |
| 1189 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1190 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1191 | # CONFIG_DEBUG_SPINLOCK is not set | 1214 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1192 | # CONFIG_DEBUG_MUTEXES is not set | 1215 | # CONFIG_DEBUG_MUTEXES is not set |
| 1193 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1216 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1207,7 +1230,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1207 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1230 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1208 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1231 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1209 | # CONFIG_FAULT_INJECTION is not set | 1232 | # CONFIG_FAULT_INJECTION is not set |
| 1210 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1211 | 1233 | ||
| 1212 | # | 1234 | # |
| 1213 | # Tracers | 1235 | # Tracers |
| @@ -1223,16 +1245,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1223 | # CONFIG_DEBUG_STACK_USAGE is not set | 1245 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1224 | CONFIG_DEBUG_VERBOSE=y | 1246 | CONFIG_DEBUG_VERBOSE=y |
| 1225 | CONFIG_DEBUG_MMRS=y | 1247 | CONFIG_DEBUG_MMRS=y |
| 1226 | # CONFIG_DEBUG_HWERR is not set | 1248 | CONFIG_DEBUG_HWERR=y |
| 1227 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1249 | CONFIG_EXACT_HWERR=y |
| 1250 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1251 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1252 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1253 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1228 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1254 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1229 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1255 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1230 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1256 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1231 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1257 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1232 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1258 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1233 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1259 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1234 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1260 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1235 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1261 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1236 | CONFIG_EARLY_PRINTK=y | 1262 | CONFIG_EARLY_PRINTK=y |
| 1237 | CONFIG_CPLB_INFO=y | 1263 | CONFIG_CPLB_INFO=y |
| 1238 | CONFIG_ACCESS_CHECK=y | 1264 | CONFIG_ACCESS_CHECK=y |
| @@ -1345,7 +1371,6 @@ CONFIG_CRC32=y | |||
| 1345 | # CONFIG_LIBCRC32C is not set | 1371 | # CONFIG_LIBCRC32C is not set |
| 1346 | CONFIG_ZLIB_INFLATE=y | 1372 | CONFIG_ZLIB_INFLATE=y |
| 1347 | CONFIG_ZLIB_DEFLATE=m | 1373 | CONFIG_ZLIB_DEFLATE=m |
| 1348 | CONFIG_PLIST=y | ||
| 1349 | CONFIG_HAS_IOMEM=y | 1374 | CONFIG_HAS_IOMEM=y |
| 1350 | CONFIG_HAS_IOPORT=y | 1375 | CONFIG_HAS_IOPORT=y |
| 1351 | CONFIG_HAS_DMA=y | 1376 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index 591f6edda4f7..f9ac20d55799 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -232,7 +232,10 @@ CONFIG_HZ=250 | |||
| 232 | CONFIG_SCHED_HRTICK=y | 232 | CONFIG_SCHED_HRTICK=y |
| 233 | CONFIG_GENERIC_TIME=y | 233 | CONFIG_GENERIC_TIME=y |
| 234 | CONFIG_GENERIC_CLOCKEVENTS=y | 234 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 235 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 236 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 235 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 237 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 238 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 236 | CONFIG_TICK_ONESHOT=y | 239 | CONFIG_TICK_ONESHOT=y |
| 237 | # CONFIG_NO_HZ is not set | 240 | # CONFIG_NO_HZ is not set |
| 238 | CONFIG_HIGH_RES_TIMERS=y | 241 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -390,7 +393,7 @@ CONFIG_IP_PNP=y | |||
| 390 | # CONFIG_NET_IPIP is not set | 393 | # CONFIG_NET_IPIP is not set |
| 391 | # CONFIG_NET_IPGRE is not set | 394 | # CONFIG_NET_IPGRE is not set |
| 392 | # CONFIG_ARPD is not set | 395 | # CONFIG_ARPD is not set |
| 393 | CONFIG_SYN_COOKIES=y | 396 | # CONFIG_SYN_COOKIES is not set |
| 394 | # CONFIG_INET_AH is not set | 397 | # CONFIG_INET_AH is not set |
| 395 | # CONFIG_INET_ESP is not set | 398 | # CONFIG_INET_ESP is not set |
| 396 | # CONFIG_INET_IPCOMP is not set | 399 | # CONFIG_INET_IPCOMP is not set |
| @@ -548,9 +551,7 @@ CONFIG_MTD_ROM=m | |||
| 548 | # | 551 | # |
| 549 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 552 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 550 | CONFIG_MTD_PHYSMAP=m | 553 | CONFIG_MTD_PHYSMAP=m |
| 551 | CONFIG_MTD_PHYSMAP_START=0x20000000 | 554 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 552 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
| 553 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 554 | # CONFIG_MTD_UCLINUX is not set | 555 | # CONFIG_MTD_UCLINUX is not set |
| 555 | # CONFIG_MTD_PLATRAM is not set | 556 | # CONFIG_MTD_PLATRAM is not set |
| 556 | 557 | ||
| @@ -649,9 +650,8 @@ CONFIG_BFIN_RX_DESC_NUM=20 | |||
| 649 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 650 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 650 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 651 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 651 | # CONFIG_B44 is not set | 652 | # CONFIG_B44 is not set |
| 652 | CONFIG_NETDEV_1000=y | 653 | # CONFIG_NETDEV_1000 is not set |
| 653 | # CONFIG_AX88180 is not set | 654 | # CONFIG_NETDEV_10000 is not set |
| 654 | CONFIG_NETDEV_10000=y | ||
| 655 | 655 | ||
| 656 | # | 656 | # |
| 657 | # Wireless LAN | 657 | # Wireless LAN |
| @@ -708,14 +708,14 @@ CONFIG_SERIO_LIBPS2=y | |||
| 708 | # Character devices | 708 | # Character devices |
| 709 | # | 709 | # |
| 710 | # CONFIG_AD9960 is not set | 710 | # CONFIG_AD9960 is not set |
| 711 | # CONFIG_SPI_ADC_BF533 is not set | 711 | CONFIG_BFIN_DMA_INTERFACE=m |
| 712 | # CONFIG_BF5xx_PPIFCD is not set | 712 | # CONFIG_BFIN_PPI is not set |
| 713 | # CONFIG_BFIN_PPIFCD is not set | ||
| 713 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 714 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 714 | CONFIG_BF5xx_PPI=m | 715 | # CONFIG_BFIN_SPI_ADC is not set |
| 715 | CONFIG_BFIN_SPORT=m | 716 | CONFIG_BFIN_SPORT=m |
| 716 | # CONFIG_BFIN_TIMER_LATENCY is not set | 717 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 717 | # CONFIG_TWI_LCD is not set | 718 | # CONFIG_BFIN_TWI_LCD is not set |
| 718 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 719 | CONFIG_SIMPLE_GPIO=m | 719 | CONFIG_SIMPLE_GPIO=m |
| 720 | # CONFIG_VT is not set | 720 | # CONFIG_VT is not set |
| 721 | # CONFIG_DEVKMEM is not set | 721 | # CONFIG_DEVKMEM is not set |
| @@ -823,7 +823,30 @@ CONFIG_SPI_BFIN=y | |||
| 823 | # CONFIG_SPI_SPIDEV is not set | 823 | # CONFIG_SPI_SPIDEV is not set |
| 824 | # CONFIG_SPI_TLE62X0 is not set | 824 | # CONFIG_SPI_TLE62X0 is not set |
| 825 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 825 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 826 | # CONFIG_GPIOLIB is not set | 826 | CONFIG_GPIOLIB=y |
| 827 | # CONFIG_DEBUG_GPIO is not set | ||
| 828 | CONFIG_GPIO_SYSFS=y | ||
| 829 | |||
| 830 | # | ||
| 831 | # Memory mapped GPIO expanders: | ||
| 832 | # | ||
| 833 | |||
| 834 | # | ||
| 835 | # I2C GPIO expanders: | ||
| 836 | # | ||
| 837 | # CONFIG_GPIO_MAX732X is not set | ||
| 838 | # CONFIG_GPIO_PCA953X is not set | ||
| 839 | # CONFIG_GPIO_PCF857X is not set | ||
| 840 | |||
| 841 | # | ||
| 842 | # PCI GPIO expanders: | ||
| 843 | # | ||
| 844 | |||
| 845 | # | ||
| 846 | # SPI GPIO expanders: | ||
| 847 | # | ||
| 848 | # CONFIG_GPIO_MAX7301 is not set | ||
| 849 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 827 | # CONFIG_W1 is not set | 850 | # CONFIG_W1 is not set |
| 828 | # CONFIG_POWER_SUPPLY is not set | 851 | # CONFIG_POWER_SUPPLY is not set |
| 829 | # CONFIG_HWMON is not set | 852 | # CONFIG_HWMON is not set |
| @@ -1123,16 +1146,6 @@ CONFIG_SYSFS=y | |||
| 1123 | # CONFIG_BEFS_FS is not set | 1146 | # CONFIG_BEFS_FS is not set |
| 1124 | # CONFIG_BFS_FS is not set | 1147 | # CONFIG_BFS_FS is not set |
| 1125 | # CONFIG_EFS_FS is not set | 1148 | # CONFIG_EFS_FS is not set |
| 1126 | CONFIG_YAFFS_FS=m | ||
| 1127 | CONFIG_YAFFS_YAFFS1=y | ||
| 1128 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1129 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1130 | CONFIG_YAFFS_YAFFS2=y | ||
| 1131 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1132 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1133 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1134 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1135 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1136 | CONFIG_JFFS2_FS=m | 1149 | CONFIG_JFFS2_FS=m |
| 1137 | CONFIG_JFFS2_FS_DEBUG=0 | 1150 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1138 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1151 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -1144,6 +1157,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1144 | # CONFIG_JFFS2_LZO is not set | 1157 | # CONFIG_JFFS2_LZO is not set |
| 1145 | CONFIG_JFFS2_RTIME=y | 1158 | CONFIG_JFFS2_RTIME=y |
| 1146 | # CONFIG_JFFS2_RUBIN is not set | 1159 | # CONFIG_JFFS2_RUBIN is not set |
| 1160 | CONFIG_YAFFS_FS=m | ||
| 1161 | CONFIG_YAFFS_YAFFS1=y | ||
| 1162 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1163 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1164 | CONFIG_YAFFS_YAFFS2=y | ||
| 1165 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1166 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1167 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1168 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1169 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1147 | # CONFIG_CRAMFS is not set | 1170 | # CONFIG_CRAMFS is not set |
| 1148 | # CONFIG_VXFS_FS is not set | 1171 | # CONFIG_VXFS_FS is not set |
| 1149 | # CONFIG_MINIX_FS is not set | 1172 | # CONFIG_MINIX_FS is not set |
| @@ -1232,7 +1255,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1232 | CONFIG_DEBUG_FS=y | 1255 | CONFIG_DEBUG_FS=y |
| 1233 | # CONFIG_HEADERS_CHECK is not set | 1256 | # CONFIG_HEADERS_CHECK is not set |
| 1234 | CONFIG_DEBUG_KERNEL=y | 1257 | CONFIG_DEBUG_KERNEL=y |
| 1235 | # CONFIG_DEBUG_SHIRQ is not set | 1258 | CONFIG_DEBUG_SHIRQ=y |
| 1236 | CONFIG_DETECT_SOFTLOCKUP=y | 1259 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1237 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1260 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1238 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1261 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1241,8 +1264,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1241 | # CONFIG_TIMER_STATS is not set | 1264 | # CONFIG_TIMER_STATS is not set |
| 1242 | # CONFIG_DEBUG_OBJECTS is not set | 1265 | # CONFIG_DEBUG_OBJECTS is not set |
| 1243 | # CONFIG_DEBUG_SLAB is not set | 1266 | # CONFIG_DEBUG_SLAB is not set |
| 1244 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1245 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1246 | # CONFIG_DEBUG_SPINLOCK is not set | 1267 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1247 | # CONFIG_DEBUG_MUTEXES is not set | 1268 | # CONFIG_DEBUG_MUTEXES is not set |
| 1248 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1269 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1262,7 +1283,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1262 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1283 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1263 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1284 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1264 | # CONFIG_FAULT_INJECTION is not set | 1285 | # CONFIG_FAULT_INJECTION is not set |
| 1265 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1266 | 1286 | ||
| 1267 | # | 1287 | # |
| 1268 | # Tracers | 1288 | # Tracers |
| @@ -1278,16 +1298,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1278 | # CONFIG_DEBUG_STACK_USAGE is not set | 1298 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1279 | CONFIG_DEBUG_VERBOSE=y | 1299 | CONFIG_DEBUG_VERBOSE=y |
| 1280 | CONFIG_DEBUG_MMRS=y | 1300 | CONFIG_DEBUG_MMRS=y |
| 1281 | # CONFIG_DEBUG_HWERR is not set | 1301 | CONFIG_DEBUG_HWERR=y |
| 1282 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1302 | CONFIG_EXACT_HWERR=y |
| 1303 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1304 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1305 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1306 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1283 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1307 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1284 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1308 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1285 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1309 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1286 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1310 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1287 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1311 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1288 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1312 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1289 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1313 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1290 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1314 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1291 | CONFIG_EARLY_PRINTK=y | 1315 | CONFIG_EARLY_PRINTK=y |
| 1292 | CONFIG_CPLB_INFO=y | 1316 | CONFIG_CPLB_INFO=y |
| 1293 | CONFIG_ACCESS_CHECK=y | 1317 | CONFIG_ACCESS_CHECK=y |
| @@ -1400,7 +1424,6 @@ CONFIG_CRC32=y | |||
| 1400 | # CONFIG_LIBCRC32C is not set | 1424 | # CONFIG_LIBCRC32C is not set |
| 1401 | CONFIG_ZLIB_INFLATE=y | 1425 | CONFIG_ZLIB_INFLATE=y |
| 1402 | CONFIG_ZLIB_DEFLATE=m | 1426 | CONFIG_ZLIB_DEFLATE=m |
| 1403 | CONFIG_PLIST=y | ||
| 1404 | CONFIG_HAS_IOMEM=y | 1427 | CONFIG_HAS_IOMEM=y |
| 1405 | CONFIG_HAS_IOPORT=y | 1428 | CONFIG_HAS_IOPORT=y |
| 1406 | CONFIG_HAS_DMA=y | 1429 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig index 1a8e8c3adf98..ee98e227b887 100644 --- a/arch/blackfin/configs/BF538-EZKIT_defconfig +++ b/arch/blackfin/configs/BF538-EZKIT_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -243,7 +243,10 @@ CONFIG_HZ=250 | |||
| 243 | CONFIG_SCHED_HRTICK=y | 243 | CONFIG_SCHED_HRTICK=y |
| 244 | CONFIG_GENERIC_TIME=y | 244 | CONFIG_GENERIC_TIME=y |
| 245 | CONFIG_GENERIC_CLOCKEVENTS=y | 245 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 246 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 247 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 246 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 248 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 249 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 247 | CONFIG_TICK_ONESHOT=y | 250 | CONFIG_TICK_ONESHOT=y |
| 248 | # CONFIG_NO_HZ is not set | 251 | # CONFIG_NO_HZ is not set |
| 249 | CONFIG_HIGH_RES_TIMERS=y | 252 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -389,7 +392,7 @@ CONFIG_IP_PNP=y | |||
| 389 | # CONFIG_NET_IPIP is not set | 392 | # CONFIG_NET_IPIP is not set |
| 390 | # CONFIG_NET_IPGRE is not set | 393 | # CONFIG_NET_IPGRE is not set |
| 391 | # CONFIG_ARPD is not set | 394 | # CONFIG_ARPD is not set |
| 392 | CONFIG_SYN_COOKIES=y | 395 | # CONFIG_SYN_COOKIES is not set |
| 393 | # CONFIG_INET_AH is not set | 396 | # CONFIG_INET_AH is not set |
| 394 | # CONFIG_INET_ESP is not set | 397 | # CONFIG_INET_ESP is not set |
| 395 | # CONFIG_INET_IPCOMP is not set | 398 | # CONFIG_INET_IPCOMP is not set |
| @@ -546,9 +549,7 @@ CONFIG_MTD_ROM=m | |||
| 546 | # | 549 | # |
| 547 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 550 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 548 | CONFIG_MTD_PHYSMAP=m | 551 | CONFIG_MTD_PHYSMAP=m |
| 549 | CONFIG_MTD_PHYSMAP_START=0x20000000 | 552 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 550 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
| 551 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 552 | # CONFIG_MTD_UCLINUX is not set | 553 | # CONFIG_MTD_UCLINUX is not set |
| 553 | # CONFIG_MTD_PLATRAM is not set | 554 | # CONFIG_MTD_PLATRAM is not set |
| 554 | 555 | ||
| @@ -691,11 +692,11 @@ CONFIG_INPUT_EVDEV=m | |||
| 691 | # CONFIG_INPUT_JOYSTICK is not set | 692 | # CONFIG_INPUT_JOYSTICK is not set |
| 692 | # CONFIG_INPUT_TABLET is not set | 693 | # CONFIG_INPUT_TABLET is not set |
| 693 | CONFIG_INPUT_TOUCHSCREEN=y | 694 | CONFIG_INPUT_TOUCHSCREEN=y |
| 694 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 695 | # CONFIG_TOUCHSCREEN_AD7877 is not set | 695 | # CONFIG_TOUCHSCREEN_AD7877 is not set |
| 696 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 696 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 697 | CONFIG_TOUCHSCREEN_AD7879_SPI=y | 697 | CONFIG_TOUCHSCREEN_AD7879_SPI=y |
| 698 | CONFIG_TOUCHSCREEN_AD7879=y | 698 | CONFIG_TOUCHSCREEN_AD7879=y |
| 699 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 699 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 700 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 700 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 701 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 701 | # CONFIG_TOUCHSCREEN_ELO is not set | 702 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -720,14 +721,14 @@ CONFIG_INPUT_MISC=y | |||
| 720 | # Character devices | 721 | # Character devices |
| 721 | # | 722 | # |
| 722 | # CONFIG_AD9960 is not set | 723 | # CONFIG_AD9960 is not set |
| 723 | # CONFIG_SPI_ADC_BF533 is not set | 724 | CONFIG_BFIN_DMA_INTERFACE=m |
| 724 | # CONFIG_BF5xx_PPIFCD is not set | 725 | # CONFIG_BFIN_PPI is not set |
| 726 | # CONFIG_BFIN_PPIFCD is not set | ||
| 725 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 727 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 726 | CONFIG_BF5xx_PPI=m | 728 | # CONFIG_BFIN_SPI_ADC is not set |
| 727 | CONFIG_BFIN_SPORT=m | 729 | CONFIG_BFIN_SPORT=m |
| 728 | # CONFIG_BFIN_TIMER_LATENCY is not set | 730 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 729 | # CONFIG_TWI_LCD is not set | 731 | # CONFIG_BFIN_TWI_LCD is not set |
| 730 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 731 | CONFIG_SIMPLE_GPIO=m | 732 | CONFIG_SIMPLE_GPIO=m |
| 732 | # CONFIG_VT is not set | 733 | # CONFIG_VT is not set |
| 733 | # CONFIG_DEVKMEM is not set | 734 | # CONFIG_DEVKMEM is not set |
| @@ -833,7 +834,30 @@ CONFIG_SPI_BFIN=y | |||
| 833 | # CONFIG_SPI_SPIDEV is not set | 834 | # CONFIG_SPI_SPIDEV is not set |
| 834 | # CONFIG_SPI_TLE62X0 is not set | 835 | # CONFIG_SPI_TLE62X0 is not set |
| 835 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 836 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 836 | # CONFIG_GPIOLIB is not set | 837 | CONFIG_GPIOLIB=y |
| 838 | # CONFIG_DEBUG_GPIO is not set | ||
| 839 | CONFIG_GPIO_SYSFS=y | ||
| 840 | |||
| 841 | # | ||
| 842 | # Memory mapped GPIO expanders: | ||
| 843 | # | ||
| 844 | |||
| 845 | # | ||
| 846 | # I2C GPIO expanders: | ||
| 847 | # | ||
| 848 | # CONFIG_GPIO_MAX732X is not set | ||
| 849 | # CONFIG_GPIO_PCA953X is not set | ||
| 850 | # CONFIG_GPIO_PCF857X is not set | ||
| 851 | |||
| 852 | # | ||
| 853 | # PCI GPIO expanders: | ||
| 854 | # | ||
| 855 | |||
| 856 | # | ||
| 857 | # SPI GPIO expanders: | ||
| 858 | # | ||
| 859 | # CONFIG_GPIO_MAX7301 is not set | ||
| 860 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 837 | # CONFIG_W1 is not set | 861 | # CONFIG_W1 is not set |
| 838 | # CONFIG_POWER_SUPPLY is not set | 862 | # CONFIG_POWER_SUPPLY is not set |
| 839 | # CONFIG_HWMON is not set | 863 | # CONFIG_HWMON is not set |
| @@ -1056,16 +1080,6 @@ CONFIG_SYSFS=y | |||
| 1056 | # CONFIG_BEFS_FS is not set | 1080 | # CONFIG_BEFS_FS is not set |
| 1057 | # CONFIG_BFS_FS is not set | 1081 | # CONFIG_BFS_FS is not set |
| 1058 | # CONFIG_EFS_FS is not set | 1082 | # CONFIG_EFS_FS is not set |
| 1059 | CONFIG_YAFFS_FS=m | ||
| 1060 | CONFIG_YAFFS_YAFFS1=y | ||
| 1061 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1062 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1063 | CONFIG_YAFFS_YAFFS2=y | ||
| 1064 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1065 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1066 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1067 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1068 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1069 | CONFIG_JFFS2_FS=m | 1083 | CONFIG_JFFS2_FS=m |
| 1070 | CONFIG_JFFS2_FS_DEBUG=0 | 1084 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1071 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1085 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -1077,6 +1091,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1077 | # CONFIG_JFFS2_LZO is not set | 1091 | # CONFIG_JFFS2_LZO is not set |
| 1078 | CONFIG_JFFS2_RTIME=y | 1092 | CONFIG_JFFS2_RTIME=y |
| 1079 | # CONFIG_JFFS2_RUBIN is not set | 1093 | # CONFIG_JFFS2_RUBIN is not set |
| 1094 | CONFIG_YAFFS_FS=m | ||
| 1095 | CONFIG_YAFFS_YAFFS1=y | ||
| 1096 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1097 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1098 | CONFIG_YAFFS_YAFFS2=y | ||
| 1099 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1100 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1101 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1102 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1103 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1080 | # CONFIG_CRAMFS is not set | 1104 | # CONFIG_CRAMFS is not set |
| 1081 | # CONFIG_VXFS_FS is not set | 1105 | # CONFIG_VXFS_FS is not set |
| 1082 | # CONFIG_MINIX_FS is not set | 1106 | # CONFIG_MINIX_FS is not set |
| @@ -1165,7 +1189,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1165 | CONFIG_DEBUG_FS=y | 1189 | CONFIG_DEBUG_FS=y |
| 1166 | # CONFIG_HEADERS_CHECK is not set | 1190 | # CONFIG_HEADERS_CHECK is not set |
| 1167 | CONFIG_DEBUG_KERNEL=y | 1191 | CONFIG_DEBUG_KERNEL=y |
| 1168 | # CONFIG_DEBUG_SHIRQ is not set | 1192 | CONFIG_DEBUG_SHIRQ=y |
| 1169 | CONFIG_DETECT_SOFTLOCKUP=y | 1193 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1170 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1194 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1171 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1195 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1174,8 +1198,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1174 | # CONFIG_TIMER_STATS is not set | 1198 | # CONFIG_TIMER_STATS is not set |
| 1175 | # CONFIG_DEBUG_OBJECTS is not set | 1199 | # CONFIG_DEBUG_OBJECTS is not set |
| 1176 | # CONFIG_DEBUG_SLAB is not set | 1200 | # CONFIG_DEBUG_SLAB is not set |
| 1177 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1178 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1179 | # CONFIG_DEBUG_SPINLOCK is not set | 1201 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1180 | # CONFIG_DEBUG_MUTEXES is not set | 1202 | # CONFIG_DEBUG_MUTEXES is not set |
| 1181 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1203 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1195,7 +1217,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1195 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1217 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1196 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1218 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1197 | # CONFIG_FAULT_INJECTION is not set | 1219 | # CONFIG_FAULT_INJECTION is not set |
| 1198 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1199 | 1220 | ||
| 1200 | # | 1221 | # |
| 1201 | # Tracers | 1222 | # Tracers |
| @@ -1211,16 +1232,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1211 | # CONFIG_DEBUG_STACK_USAGE is not set | 1232 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1212 | CONFIG_DEBUG_VERBOSE=y | 1233 | CONFIG_DEBUG_VERBOSE=y |
| 1213 | CONFIG_DEBUG_MMRS=y | 1234 | CONFIG_DEBUG_MMRS=y |
| 1214 | # CONFIG_DEBUG_HWERR is not set | 1235 | CONFIG_DEBUG_HWERR=y |
| 1215 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1236 | CONFIG_EXACT_HWERR=y |
| 1237 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1238 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1239 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1240 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1216 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1241 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1217 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1242 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1218 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1243 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1219 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1244 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1220 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1245 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1221 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1246 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1222 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1247 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1223 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1248 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1224 | CONFIG_EARLY_PRINTK=y | 1249 | CONFIG_EARLY_PRINTK=y |
| 1225 | CONFIG_CPLB_INFO=y | 1250 | CONFIG_CPLB_INFO=y |
| 1226 | CONFIG_ACCESS_CHECK=y | 1251 | CONFIG_ACCESS_CHECK=y |
| @@ -1333,7 +1358,6 @@ CONFIG_CRC32=y | |||
| 1333 | # CONFIG_LIBCRC32C is not set | 1358 | # CONFIG_LIBCRC32C is not set |
| 1334 | CONFIG_ZLIB_INFLATE=y | 1359 | CONFIG_ZLIB_INFLATE=y |
| 1335 | CONFIG_ZLIB_DEFLATE=m | 1360 | CONFIG_ZLIB_DEFLATE=m |
| 1336 | CONFIG_PLIST=y | ||
| 1337 | CONFIG_HAS_IOMEM=y | 1361 | CONFIG_HAS_IOMEM=y |
| 1338 | CONFIG_HAS_IOPORT=y | 1362 | CONFIG_HAS_IOPORT=y |
| 1339 | CONFIG_HAS_DMA=y | 1363 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index 2cd1c2b218d7..deeabef8ab80 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -196,6 +196,7 @@ CONFIG_BFIN548_EZKIT=y | |||
| 196 | # BF548 Specific Configuration | 196 | # BF548 Specific Configuration |
| 197 | # | 197 | # |
| 198 | # CONFIG_DEB_DMA_URGENT is not set | 198 | # CONFIG_DEB_DMA_URGENT is not set |
| 199 | # CONFIG_BF548_ATAPI_ALTERNATIVE_PORT is not set | ||
| 199 | 200 | ||
| 200 | # | 201 | # |
| 201 | # Interrupt Priority Assignment | 202 | # Interrupt Priority Assignment |
| @@ -298,7 +299,10 @@ CONFIG_HZ=250 | |||
| 298 | # CONFIG_SCHED_HRTICK is not set | 299 | # CONFIG_SCHED_HRTICK is not set |
| 299 | CONFIG_GENERIC_TIME=y | 300 | CONFIG_GENERIC_TIME=y |
| 300 | CONFIG_GENERIC_CLOCKEVENTS=y | 301 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 302 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 303 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 301 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 304 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 305 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 302 | # CONFIG_NO_HZ is not set | 306 | # CONFIG_NO_HZ is not set |
| 303 | # CONFIG_HIGH_RES_TIMERS is not set | 307 | # CONFIG_HIGH_RES_TIMERS is not set |
| 304 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 308 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| @@ -367,7 +371,9 @@ CONFIG_BFIN_DCACHE=y | |||
| 367 | # CONFIG_BFIN_ICACHE_LOCK is not set | 371 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 368 | CONFIG_BFIN_WB=y | 372 | CONFIG_BFIN_WB=y |
| 369 | # CONFIG_BFIN_WT is not set | 373 | # CONFIG_BFIN_WT is not set |
| 370 | # CONFIG_BFIN_L2_CACHEABLE is not set | 374 | # CONFIG_BFIN_L2_WB is not set |
| 375 | CONFIG_BFIN_L2_WT=y | ||
| 376 | # CONFIG_BFIN_L2_NOT_CACHED is not set | ||
| 371 | # CONFIG_MPU is not set | 377 | # CONFIG_MPU is not set |
| 372 | 378 | ||
| 373 | # | 379 | # |
| @@ -447,7 +453,7 @@ CONFIG_IP_PNP=y | |||
| 447 | # CONFIG_NET_IPIP is not set | 453 | # CONFIG_NET_IPIP is not set |
| 448 | # CONFIG_NET_IPGRE is not set | 454 | # CONFIG_NET_IPGRE is not set |
| 449 | # CONFIG_ARPD is not set | 455 | # CONFIG_ARPD is not set |
| 450 | CONFIG_SYN_COOKIES=y | 456 | # CONFIG_SYN_COOKIES is not set |
| 451 | # CONFIG_INET_AH is not set | 457 | # CONFIG_INET_AH is not set |
| 452 | # CONFIG_INET_ESP is not set | 458 | # CONFIG_INET_ESP is not set |
| 453 | # CONFIG_INET_IPCOMP is not set | 459 | # CONFIG_INET_IPCOMP is not set |
| @@ -616,9 +622,7 @@ CONFIG_MTD_RAM=y | |||
| 616 | # | 622 | # |
| 617 | CONFIG_MTD_COMPLEX_MAPPINGS=y | 623 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
| 618 | CONFIG_MTD_PHYSMAP=y | 624 | CONFIG_MTD_PHYSMAP=y |
| 619 | CONFIG_MTD_PHYSMAP_START=0x20000000 | 625 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 620 | CONFIG_MTD_PHYSMAP_LEN=0 | ||
| 621 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 622 | # CONFIG_MTD_GPIO_ADDR is not set | 626 | # CONFIG_MTD_GPIO_ADDR is not set |
| 623 | # CONFIG_MTD_UCLINUX is not set | 627 | # CONFIG_MTD_UCLINUX is not set |
| 624 | # CONFIG_MTD_PLATRAM is not set | 628 | # CONFIG_MTD_PLATRAM is not set |
| @@ -696,7 +700,7 @@ CONFIG_SCSI_DMA=y | |||
| 696 | CONFIG_BLK_DEV_SD=y | 700 | CONFIG_BLK_DEV_SD=y |
| 697 | # CONFIG_CHR_DEV_ST is not set | 701 | # CONFIG_CHR_DEV_ST is not set |
| 698 | # CONFIG_CHR_DEV_OSST is not set | 702 | # CONFIG_CHR_DEV_OSST is not set |
| 699 | CONFIG_BLK_DEV_SR=y | 703 | CONFIG_BLK_DEV_SR=m |
| 700 | # CONFIG_BLK_DEV_SR_VENDOR is not set | 704 | # CONFIG_BLK_DEV_SR_VENDOR is not set |
| 701 | # CONFIG_CHR_DEV_SG is not set | 705 | # CONFIG_CHR_DEV_SG is not set |
| 702 | # CONFIG_CHR_DEV_SCH is not set | 706 | # CONFIG_CHR_DEV_SCH is not set |
| @@ -718,9 +722,7 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
| 718 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 722 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
| 719 | # CONFIG_SCSI_SAS_LIBSAS is not set | 723 | # CONFIG_SCSI_SAS_LIBSAS is not set |
| 720 | # CONFIG_SCSI_SRP_ATTRS is not set | 724 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 721 | CONFIG_SCSI_LOWLEVEL=y | 725 | # CONFIG_SCSI_LOWLEVEL is not set |
| 722 | # CONFIG_ISCSI_TCP is not set | ||
| 723 | # CONFIG_SCSI_DEBUG is not set | ||
| 724 | # CONFIG_SCSI_DH is not set | 726 | # CONFIG_SCSI_DH is not set |
| 725 | CONFIG_ATA=y | 727 | CONFIG_ATA=y |
| 726 | # CONFIG_ATA_NONSTANDARD is not set | 728 | # CONFIG_ATA_NONSTANDARD is not set |
| @@ -752,9 +754,8 @@ CONFIG_SMSC911X=y | |||
| 752 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 754 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 753 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 755 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 754 | # CONFIG_B44 is not set | 756 | # CONFIG_B44 is not set |
| 755 | CONFIG_NETDEV_1000=y | 757 | # CONFIG_NETDEV_1000 is not set |
| 756 | # CONFIG_AX88180 is not set | 758 | # CONFIG_NETDEV_10000 is not set |
| 757 | CONFIG_NETDEV_10000=y | ||
| 758 | 759 | ||
| 759 | # | 760 | # |
| 760 | # Wireless LAN | 761 | # Wireless LAN |
| @@ -821,11 +822,11 @@ CONFIG_KEYBOARD_BFIN=y | |||
| 821 | # CONFIG_INPUT_JOYSTICK is not set | 822 | # CONFIG_INPUT_JOYSTICK is not set |
| 822 | # CONFIG_INPUT_TABLET is not set | 823 | # CONFIG_INPUT_TABLET is not set |
| 823 | CONFIG_INPUT_TOUCHSCREEN=y | 824 | CONFIG_INPUT_TOUCHSCREEN=y |
| 824 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 825 | CONFIG_TOUCHSCREEN_AD7877=m | 825 | CONFIG_TOUCHSCREEN_AD7877=m |
| 826 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 826 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 827 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | 827 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set |
| 828 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 828 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 829 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 829 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 830 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 830 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 831 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 831 | # CONFIG_TOUCHSCREEN_ELO is not set | 832 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -858,14 +859,14 @@ CONFIG_INPUT_MISC=y | |||
| 858 | # Character devices | 859 | # Character devices |
| 859 | # | 860 | # |
| 860 | # CONFIG_AD9960 is not set | 861 | # CONFIG_AD9960 is not set |
| 861 | # CONFIG_SPI_ADC_BF533 is not set | 862 | CONFIG_BFIN_DMA_INTERFACE=m |
| 862 | # CONFIG_BF5xx_PPIFCD is not set | 863 | # CONFIG_BFIN_PPI is not set |
| 864 | # CONFIG_BFIN_PPIFCD is not set | ||
| 863 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 865 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 864 | CONFIG_BF5xx_PPI=m | 866 | # CONFIG_BFIN_SPI_ADC is not set |
| 865 | CONFIG_BFIN_SPORT=m | 867 | CONFIG_BFIN_SPORT=m |
| 866 | # CONFIG_BFIN_TIMER_LATENCY is not set | 868 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 867 | # CONFIG_TWI_LCD is not set | 869 | # CONFIG_BFIN_TWI_LCD is not set |
| 868 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 869 | CONFIG_SIMPLE_GPIO=m | 870 | CONFIG_SIMPLE_GPIO=m |
| 870 | CONFIG_VT=y | 871 | CONFIG_VT=y |
| 871 | CONFIG_CONSOLE_TRANSLATIONS=y | 872 | CONFIG_CONSOLE_TRANSLATIONS=y |
| @@ -977,7 +978,30 @@ CONFIG_SPI_BFIN=y | |||
| 977 | # CONFIG_SPI_SPIDEV is not set | 978 | # CONFIG_SPI_SPIDEV is not set |
| 978 | # CONFIG_SPI_TLE62X0 is not set | 979 | # CONFIG_SPI_TLE62X0 is not set |
| 979 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 980 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 980 | # CONFIG_GPIOLIB is not set | 981 | CONFIG_GPIOLIB=y |
| 982 | # CONFIG_DEBUG_GPIO is not set | ||
| 983 | CONFIG_GPIO_SYSFS=y | ||
| 984 | |||
| 985 | # | ||
| 986 | # Memory mapped GPIO expanders: | ||
| 987 | # | ||
| 988 | |||
| 989 | # | ||
| 990 | # I2C GPIO expanders: | ||
| 991 | # | ||
| 992 | # CONFIG_GPIO_MAX732X is not set | ||
| 993 | # CONFIG_GPIO_PCA953X is not set | ||
| 994 | # CONFIG_GPIO_PCF857X is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # PCI GPIO expanders: | ||
| 998 | # | ||
| 999 | |||
| 1000 | # | ||
| 1001 | # SPI GPIO expanders: | ||
| 1002 | # | ||
| 1003 | # CONFIG_GPIO_MAX7301 is not set | ||
| 1004 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 981 | # CONFIG_W1 is not set | 1005 | # CONFIG_W1 is not set |
| 982 | # CONFIG_POWER_SUPPLY is not set | 1006 | # CONFIG_POWER_SUPPLY is not set |
| 983 | # CONFIG_HWMON is not set | 1007 | # CONFIG_HWMON is not set |
| @@ -1011,6 +1035,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1011 | # CONFIG_HTC_PASIC3 is not set | 1035 | # CONFIG_HTC_PASIC3 is not set |
| 1012 | # CONFIG_MFD_TMIO is not set | 1036 | # CONFIG_MFD_TMIO is not set |
| 1013 | # CONFIG_PMIC_DA903X is not set | 1037 | # CONFIG_PMIC_DA903X is not set |
| 1038 | # CONFIG_PMIC_ADP5520 is not set | ||
| 1014 | # CONFIG_MFD_WM8400 is not set | 1039 | # CONFIG_MFD_WM8400 is not set |
| 1015 | # CONFIG_MFD_WM8350_I2C is not set | 1040 | # CONFIG_MFD_WM8350_I2C is not set |
| 1016 | # CONFIG_REGULATOR is not set | 1041 | # CONFIG_REGULATOR is not set |
| @@ -1193,8 +1218,8 @@ CONFIG_USB=y | |||
| 1193 | # | 1218 | # |
| 1194 | # Miscellaneous USB options | 1219 | # Miscellaneous USB options |
| 1195 | # | 1220 | # |
| 1196 | # CONFIG_USB_DEVICEFS is not set | 1221 | CONFIG_USB_DEVICEFS=y |
| 1197 | CONFIG_USB_DEVICE_CLASS=y | 1222 | # CONFIG_USB_DEVICE_CLASS is not set |
| 1198 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1223 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1199 | # CONFIG_USB_OTG is not set | 1224 | # CONFIG_USB_OTG is not set |
| 1200 | # CONFIG_USB_OTG_WHITELIST is not set | 1225 | # CONFIG_USB_OTG_WHITELIST is not set |
| @@ -1222,10 +1247,10 @@ CONFIG_USB_MUSB_SOC=y | |||
| 1222 | CONFIG_USB_MUSB_HOST=y | 1247 | CONFIG_USB_MUSB_HOST=y |
| 1223 | # CONFIG_USB_MUSB_PERIPHERAL is not set | 1248 | # CONFIG_USB_MUSB_PERIPHERAL is not set |
| 1224 | # CONFIG_USB_MUSB_OTG is not set | 1249 | # CONFIG_USB_MUSB_OTG is not set |
| 1225 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 1226 | CONFIG_USB_MUSB_HDRC_HCD=y | 1250 | CONFIG_USB_MUSB_HDRC_HCD=y |
| 1227 | CONFIG_MUSB_PIO_ONLY=y | 1251 | # CONFIG_MUSB_PIO_ONLY is not set |
| 1228 | CONFIG_MUSB_DMA_POLL=y | 1252 | CONFIG_USB_INVENTRA_DMA=y |
| 1253 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 1229 | # CONFIG_USB_MUSB_DEBUG is not set | 1254 | # CONFIG_USB_MUSB_DEBUG is not set |
| 1230 | 1255 | ||
| 1231 | # | 1256 | # |
| @@ -1243,7 +1268,7 @@ CONFIG_MUSB_DMA_POLL=y | |||
| 1243 | # | 1268 | # |
| 1244 | # see USB_STORAGE Help for more information | 1269 | # see USB_STORAGE Help for more information |
| 1245 | # | 1270 | # |
| 1246 | CONFIG_USB_STORAGE=m | 1271 | CONFIG_USB_STORAGE=y |
| 1247 | # CONFIG_USB_STORAGE_DEBUG is not set | 1272 | # CONFIG_USB_STORAGE_DEBUG is not set |
| 1248 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1273 | # CONFIG_USB_STORAGE_DATAFAB is not set |
| 1249 | # CONFIG_USB_STORAGE_FREECOM is not set | 1274 | # CONFIG_USB_STORAGE_FREECOM is not set |
| @@ -1292,33 +1317,10 @@ CONFIG_USB_STORAGE=m | |||
| 1292 | # CONFIG_USB_LD is not set | 1317 | # CONFIG_USB_LD is not set |
| 1293 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1318 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1294 | # CONFIG_USB_IOWARRIOR is not set | 1319 | # CONFIG_USB_IOWARRIOR is not set |
| 1320 | # CONFIG_USB_TEST is not set | ||
| 1295 | # CONFIG_USB_ISIGHTFW is not set | 1321 | # CONFIG_USB_ISIGHTFW is not set |
| 1296 | # CONFIG_USB_VST is not set | 1322 | # CONFIG_USB_VST is not set |
| 1297 | # CONFIG_USB_GADGET is not set | 1323 | # CONFIG_USB_GADGET is not set |
| 1298 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1299 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1300 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1301 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1302 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1303 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1304 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1305 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1306 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1307 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1308 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1309 | # CONFIG_USB_GADGET_NET2272 is not set | ||
| 1310 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1311 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1312 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1313 | # CONFIG_USB_ZERO is not set | ||
| 1314 | # CONFIG_USB_AUDIO is not set | ||
| 1315 | # CONFIG_USB_ETH is not set | ||
| 1316 | # CONFIG_USB_GADGETFS is not set | ||
| 1317 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1318 | # CONFIG_USB_G_SERIAL is not set | ||
| 1319 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1320 | # CONFIG_USB_G_PRINTER is not set | ||
| 1321 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1322 | CONFIG_MMC=y | 1324 | CONFIG_MMC=y |
| 1323 | # CONFIG_MMC_DEBUG is not set | 1325 | # CONFIG_MMC_DEBUG is not set |
| 1324 | # CONFIG_MMC_UNSAFE_RESUME is not set | 1326 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| @@ -1414,13 +1416,8 @@ CONFIG_EXT2_FS=y | |||
| 1414 | CONFIG_EXT2_FS_XATTR=y | 1416 | CONFIG_EXT2_FS_XATTR=y |
| 1415 | # CONFIG_EXT2_FS_POSIX_ACL is not set | 1417 | # CONFIG_EXT2_FS_POSIX_ACL is not set |
| 1416 | # CONFIG_EXT2_FS_SECURITY is not set | 1418 | # CONFIG_EXT2_FS_SECURITY is not set |
| 1417 | CONFIG_EXT3_FS=y | 1419 | # CONFIG_EXT3_FS is not set |
| 1418 | CONFIG_EXT3_FS_XATTR=y | ||
| 1419 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 1420 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 1421 | # CONFIG_EXT4_FS is not set | 1420 | # CONFIG_EXT4_FS is not set |
| 1422 | CONFIG_JBD=y | ||
| 1423 | # CONFIG_JBD_DEBUG is not set | ||
| 1424 | CONFIG_FS_MBCACHE=y | 1421 | CONFIG_FS_MBCACHE=y |
| 1425 | # CONFIG_REISERFS_FS is not set | 1422 | # CONFIG_REISERFS_FS is not set |
| 1426 | # CONFIG_JFS_FS is not set | 1423 | # CONFIG_JFS_FS is not set |
| @@ -1476,16 +1473,6 @@ CONFIG_SYSFS=y | |||
| 1476 | # CONFIG_BEFS_FS is not set | 1473 | # CONFIG_BEFS_FS is not set |
| 1477 | # CONFIG_BFS_FS is not set | 1474 | # CONFIG_BFS_FS is not set |
| 1478 | # CONFIG_EFS_FS is not set | 1475 | # CONFIG_EFS_FS is not set |
| 1479 | CONFIG_YAFFS_FS=m | ||
| 1480 | CONFIG_YAFFS_YAFFS1=y | ||
| 1481 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1482 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1483 | CONFIG_YAFFS_YAFFS2=y | ||
| 1484 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1485 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1486 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1487 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1488 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1489 | CONFIG_JFFS2_FS=m | 1476 | CONFIG_JFFS2_FS=m |
| 1490 | CONFIG_JFFS2_FS_DEBUG=0 | 1477 | CONFIG_JFFS2_FS_DEBUG=0 |
| 1491 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1478 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -1497,6 +1484,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 1497 | # CONFIG_JFFS2_LZO is not set | 1484 | # CONFIG_JFFS2_LZO is not set |
| 1498 | CONFIG_JFFS2_RTIME=y | 1485 | CONFIG_JFFS2_RTIME=y |
| 1499 | # CONFIG_JFFS2_RUBIN is not set | 1486 | # CONFIG_JFFS2_RUBIN is not set |
| 1487 | CONFIG_YAFFS_FS=m | ||
| 1488 | CONFIG_YAFFS_YAFFS1=y | ||
| 1489 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 1490 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 1491 | CONFIG_YAFFS_YAFFS2=y | ||
| 1492 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 1493 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 1494 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 1495 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 1496 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 1500 | # CONFIG_CRAMFS is not set | 1497 | # CONFIG_CRAMFS is not set |
| 1501 | # CONFIG_VXFS_FS is not set | 1498 | # CONFIG_VXFS_FS is not set |
| 1502 | # CONFIG_MINIX_FS is not set | 1499 | # CONFIG_MINIX_FS is not set |
| @@ -1539,63 +1536,47 @@ CONFIG_CIFS=y | |||
| 1539 | # | 1536 | # |
| 1540 | # Partition Types | 1537 | # Partition Types |
| 1541 | # | 1538 | # |
| 1542 | CONFIG_PARTITION_ADVANCED=y | 1539 | # CONFIG_PARTITION_ADVANCED is not set |
| 1543 | # CONFIG_ACORN_PARTITION is not set | ||
| 1544 | # CONFIG_OSF_PARTITION is not set | ||
| 1545 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1546 | # CONFIG_ATARI_PARTITION is not set | ||
| 1547 | # CONFIG_MAC_PARTITION is not set | ||
| 1548 | CONFIG_MSDOS_PARTITION=y | 1540 | CONFIG_MSDOS_PARTITION=y |
| 1549 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1550 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1551 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1552 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1553 | # CONFIG_LDM_PARTITION is not set | ||
| 1554 | # CONFIG_SGI_PARTITION is not set | ||
| 1555 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1556 | # CONFIG_SUN_PARTITION is not set | ||
| 1557 | # CONFIG_KARMA_PARTITION is not set | ||
| 1558 | # CONFIG_EFI_PARTITION is not set | ||
| 1559 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1560 | CONFIG_NLS=y | 1541 | CONFIG_NLS=y |
| 1561 | CONFIG_NLS_DEFAULT="iso8859-1" | 1542 | CONFIG_NLS_DEFAULT="iso8859-1" |
| 1562 | CONFIG_NLS_CODEPAGE_437=m | 1543 | CONFIG_NLS_CODEPAGE_437=m |
| 1563 | CONFIG_NLS_CODEPAGE_737=m | 1544 | # CONFIG_NLS_CODEPAGE_737 is not set |
| 1564 | CONFIG_NLS_CODEPAGE_775=m | 1545 | # CONFIG_NLS_CODEPAGE_775 is not set |
| 1565 | CONFIG_NLS_CODEPAGE_850=m | 1546 | # CONFIG_NLS_CODEPAGE_850 is not set |
| 1566 | CONFIG_NLS_CODEPAGE_852=m | 1547 | # CONFIG_NLS_CODEPAGE_852 is not set |
| 1567 | CONFIG_NLS_CODEPAGE_855=m | 1548 | # CONFIG_NLS_CODEPAGE_855 is not set |
| 1568 | CONFIG_NLS_CODEPAGE_857=m | 1549 | # CONFIG_NLS_CODEPAGE_857 is not set |
| 1569 | CONFIG_NLS_CODEPAGE_860=m | 1550 | # CONFIG_NLS_CODEPAGE_860 is not set |
| 1570 | CONFIG_NLS_CODEPAGE_861=m | 1551 | # CONFIG_NLS_CODEPAGE_861 is not set |
| 1571 | CONFIG_NLS_CODEPAGE_862=m | 1552 | # CONFIG_NLS_CODEPAGE_862 is not set |
| 1572 | CONFIG_NLS_CODEPAGE_863=m | 1553 | # CONFIG_NLS_CODEPAGE_863 is not set |
| 1573 | CONFIG_NLS_CODEPAGE_864=m | 1554 | # CONFIG_NLS_CODEPAGE_864 is not set |
| 1574 | CONFIG_NLS_CODEPAGE_865=m | 1555 | # CONFIG_NLS_CODEPAGE_865 is not set |
| 1575 | CONFIG_NLS_CODEPAGE_866=m | 1556 | # CONFIG_NLS_CODEPAGE_866 is not set |
| 1576 | CONFIG_NLS_CODEPAGE_869=m | 1557 | # CONFIG_NLS_CODEPAGE_869 is not set |
| 1577 | CONFIG_NLS_CODEPAGE_936=m | 1558 | CONFIG_NLS_CODEPAGE_936=m |
| 1578 | CONFIG_NLS_CODEPAGE_950=m | 1559 | # CONFIG_NLS_CODEPAGE_950 is not set |
| 1579 | CONFIG_NLS_CODEPAGE_932=m | 1560 | # CONFIG_NLS_CODEPAGE_932 is not set |
| 1580 | CONFIG_NLS_CODEPAGE_949=m | 1561 | # CONFIG_NLS_CODEPAGE_949 is not set |
| 1581 | CONFIG_NLS_CODEPAGE_874=m | 1562 | # CONFIG_NLS_CODEPAGE_874 is not set |
| 1582 | CONFIG_NLS_ISO8859_8=m | 1563 | # CONFIG_NLS_ISO8859_8 is not set |
| 1583 | CONFIG_NLS_CODEPAGE_1250=m | 1564 | # CONFIG_NLS_CODEPAGE_1250 is not set |
| 1584 | CONFIG_NLS_CODEPAGE_1251=m | 1565 | # CONFIG_NLS_CODEPAGE_1251 is not set |
| 1585 | CONFIG_NLS_ASCII=m | 1566 | # CONFIG_NLS_ASCII is not set |
| 1586 | CONFIG_NLS_ISO8859_1=m | 1567 | CONFIG_NLS_ISO8859_1=m |
| 1587 | CONFIG_NLS_ISO8859_2=m | 1568 | # CONFIG_NLS_ISO8859_2 is not set |
| 1588 | CONFIG_NLS_ISO8859_3=m | 1569 | # CONFIG_NLS_ISO8859_3 is not set |
| 1589 | CONFIG_NLS_ISO8859_4=m | 1570 | # CONFIG_NLS_ISO8859_4 is not set |
| 1590 | CONFIG_NLS_ISO8859_5=m | 1571 | # CONFIG_NLS_ISO8859_5 is not set |
| 1591 | CONFIG_NLS_ISO8859_6=m | 1572 | # CONFIG_NLS_ISO8859_6 is not set |
| 1592 | CONFIG_NLS_ISO8859_7=m | 1573 | # CONFIG_NLS_ISO8859_7 is not set |
| 1593 | CONFIG_NLS_ISO8859_9=m | 1574 | # CONFIG_NLS_ISO8859_9 is not set |
| 1594 | CONFIG_NLS_ISO8859_13=m | 1575 | # CONFIG_NLS_ISO8859_13 is not set |
| 1595 | CONFIG_NLS_ISO8859_14=m | 1576 | # CONFIG_NLS_ISO8859_14 is not set |
| 1596 | CONFIG_NLS_ISO8859_15=m | 1577 | # CONFIG_NLS_ISO8859_15 is not set |
| 1597 | CONFIG_NLS_KOI8_R=m | 1578 | # CONFIG_NLS_KOI8_R is not set |
| 1598 | CONFIG_NLS_KOI8_U=m | 1579 | # CONFIG_NLS_KOI8_U is not set |
| 1599 | CONFIG_NLS_UTF8=m | 1580 | CONFIG_NLS_UTF8=m |
| 1600 | # CONFIG_DLM is not set | 1581 | # CONFIG_DLM is not set |
| 1601 | 1582 | ||
| @@ -1611,7 +1592,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1611 | CONFIG_DEBUG_FS=y | 1592 | CONFIG_DEBUG_FS=y |
| 1612 | # CONFIG_HEADERS_CHECK is not set | 1593 | # CONFIG_HEADERS_CHECK is not set |
| 1613 | CONFIG_DEBUG_KERNEL=y | 1594 | CONFIG_DEBUG_KERNEL=y |
| 1614 | # CONFIG_DEBUG_SHIRQ is not set | 1595 | CONFIG_DEBUG_SHIRQ=y |
| 1615 | CONFIG_DETECT_SOFTLOCKUP=y | 1596 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1616 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1597 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1617 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1598 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1620,8 +1601,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1620 | # CONFIG_TIMER_STATS is not set | 1601 | # CONFIG_TIMER_STATS is not set |
| 1621 | # CONFIG_DEBUG_OBJECTS is not set | 1602 | # CONFIG_DEBUG_OBJECTS is not set |
| 1622 | # CONFIG_DEBUG_SLAB is not set | 1603 | # CONFIG_DEBUG_SLAB is not set |
| 1623 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1624 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1625 | # CONFIG_DEBUG_SPINLOCK is not set | 1604 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1626 | # CONFIG_DEBUG_MUTEXES is not set | 1605 | # CONFIG_DEBUG_MUTEXES is not set |
| 1627 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1606 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1641,7 +1620,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1641 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1620 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1642 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1621 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1643 | # CONFIG_FAULT_INJECTION is not set | 1622 | # CONFIG_FAULT_INJECTION is not set |
| 1644 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1645 | 1623 | ||
| 1646 | # | 1624 | # |
| 1647 | # Tracers | 1625 | # Tracers |
| @@ -1657,16 +1635,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1657 | # CONFIG_DEBUG_STACK_USAGE is not set | 1635 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1658 | CONFIG_DEBUG_VERBOSE=y | 1636 | CONFIG_DEBUG_VERBOSE=y |
| 1659 | CONFIG_DEBUG_MMRS=y | 1637 | CONFIG_DEBUG_MMRS=y |
| 1660 | # CONFIG_DEBUG_HWERR is not set | 1638 | CONFIG_DEBUG_HWERR=y |
| 1661 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1639 | CONFIG_EXACT_HWERR=y |
| 1640 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1641 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1642 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1643 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1662 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1644 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1663 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1645 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1664 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1646 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1665 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1647 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1666 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1648 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1667 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1649 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1668 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1650 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1669 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1651 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1670 | CONFIG_EARLY_PRINTK=y | 1652 | CONFIG_EARLY_PRINTK=y |
| 1671 | CONFIG_CPLB_INFO=y | 1653 | CONFIG_CPLB_INFO=y |
| 1672 | CONFIG_ACCESS_CHECK=y | 1654 | CONFIG_ACCESS_CHECK=y |
| @@ -1780,7 +1762,6 @@ CONFIG_CRC32=y | |||
| 1780 | # CONFIG_LIBCRC32C is not set | 1762 | # CONFIG_LIBCRC32C is not set |
| 1781 | CONFIG_ZLIB_INFLATE=y | 1763 | CONFIG_ZLIB_INFLATE=y |
| 1782 | CONFIG_ZLIB_DEFLATE=m | 1764 | CONFIG_ZLIB_DEFLATE=m |
| 1783 | CONFIG_PLIST=y | ||
| 1784 | CONFIG_HAS_IOMEM=y | 1765 | CONFIG_HAS_IOMEM=y |
| 1785 | CONFIG_HAS_IOPORT=y | 1766 | CONFIG_HAS_IOPORT=y |
| 1786 | CONFIG_HAS_DMA=y | 1767 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index 4a6ea8e31df7..dcfbe2e2931e 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Thu May 21 05:50:01 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | CONFIG_BLK_DEV_INITRD=y | 43 | CONFIG_BLK_DEV_INITRD=y |
| 43 | CONFIG_INITRAMFS_SOURCE="" | 44 | CONFIG_INITRAMFS_SOURCE="" |
| 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 45 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 45 | # CONFIG_SYSCTL is not set | 46 | CONFIG_SYSCTL=y |
| 47 | CONFIG_ANON_INODES=y | ||
| 46 | CONFIG_EMBEDDED=y | 48 | CONFIG_EMBEDDED=y |
| 47 | CONFIG_UID16=y | 49 | CONFIG_UID16=y |
| 48 | CONFIG_SYSCTL_SYSCALL=y | 50 | # CONFIG_SYSCTL_SYSCALL is not set |
| 49 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 50 | # CONFIG_KALLSYMS_ALL is not set | 52 | # CONFIG_KALLSYMS_ALL is not set |
| 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y | |||
| 53 | CONFIG_PRINTK=y | 55 | CONFIG_PRINTK=y |
| 54 | CONFIG_BUG=y | 56 | CONFIG_BUG=y |
| 55 | # CONFIG_ELF_CORE is not set | 57 | # CONFIG_ELF_CORE is not set |
| 56 | CONFIG_COMPAT_BRK=y | ||
| 57 | CONFIG_BASE_FULL=y | 58 | CONFIG_BASE_FULL=y |
| 58 | # CONFIG_FUTEX is not set | 59 | # CONFIG_FUTEX is not set |
| 59 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EPOLL=y | 60 | CONFIG_EPOLL=y |
| 61 | CONFIG_SIGNALFD=y | 61 | # CONFIG_SIGNALFD is not set |
| 62 | CONFIG_TIMERFD=y | 62 | # CONFIG_TIMERFD is not set |
| 63 | CONFIG_EVENTFD=y | 63 | # CONFIG_EVENTFD is not set |
| 64 | # CONFIG_AIO is not set | 64 | # CONFIG_AIO is not set |
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 65 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_COMPAT_BRK=y | ||
| 66 | CONFIG_SLAB=y | 67 | CONFIG_SLAB=y |
| 67 | # CONFIG_SLUB is not set | 68 | # CONFIG_SLUB is not set |
| 68 | # CONFIG_SLOB is not set | 69 | # CONFIG_SLOB is not set |
| @@ -71,7 +72,6 @@ CONFIG_SLAB=y | |||
| 71 | CONFIG_HAVE_OPROFILE=y | 72 | CONFIG_HAVE_OPROFILE=y |
| 72 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 73 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 73 | CONFIG_SLABINFO=y | 74 | CONFIG_SLABINFO=y |
| 74 | CONFIG_RT_MUTEXES=y | ||
| 75 | CONFIG_TINY_SHMEM=y | 75 | CONFIG_TINY_SHMEM=y |
| 76 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 77 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| @@ -148,9 +148,9 @@ CONFIG_BF_REV_MAX=5 | |||
| 148 | # CONFIG_BF_REV_0_0 is not set | 148 | # CONFIG_BF_REV_0_0 is not set |
| 149 | # CONFIG_BF_REV_0_1 is not set | 149 | # CONFIG_BF_REV_0_1 is not set |
| 150 | # CONFIG_BF_REV_0_2 is not set | 150 | # CONFIG_BF_REV_0_2 is not set |
| 151 | CONFIG_BF_REV_0_3=y | 151 | # CONFIG_BF_REV_0_3 is not set |
| 152 | # CONFIG_BF_REV_0_4 is not set | 152 | # CONFIG_BF_REV_0_4 is not set |
| 153 | # CONFIG_BF_REV_0_5 is not set | 153 | CONFIG_BF_REV_0_5=y |
| 154 | # CONFIG_BF_REV_0_6 is not set | 154 | # CONFIG_BF_REV_0_6 is not set |
| 155 | # CONFIG_BF_REV_ANY is not set | 155 | # CONFIG_BF_REV_ANY is not set |
| 156 | # CONFIG_BF_REV_NONE is not set | 156 | # CONFIG_BF_REV_NONE is not set |
| @@ -179,7 +179,6 @@ CONFIG_BFIN561_EZKIT=y | |||
| 179 | # Core B Support | 179 | # Core B Support |
| 180 | # | 180 | # |
| 181 | CONFIG_BF561_COREB=y | 181 | CONFIG_BF561_COREB=y |
| 182 | CONFIG_BF561_COREB_RESET=y | ||
| 183 | 182 | ||
| 184 | # | 183 | # |
| 185 | # Interrupt Priority Assignment | 184 | # Interrupt Priority Assignment |
| @@ -264,7 +263,10 @@ CONFIG_HZ=250 | |||
| 264 | CONFIG_SCHED_HRTICK=y | 263 | CONFIG_SCHED_HRTICK=y |
| 265 | CONFIG_GENERIC_TIME=y | 264 | CONFIG_GENERIC_TIME=y |
| 266 | CONFIG_GENERIC_CLOCKEVENTS=y | 265 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 266 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 267 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 267 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 268 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 269 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 268 | CONFIG_TICK_ONESHOT=y | 270 | CONFIG_TICK_ONESHOT=y |
| 269 | # CONFIG_NO_HZ is not set | 271 | # CONFIG_NO_HZ is not set |
| 270 | CONFIG_HIGH_RES_TIMERS=y | 272 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -334,7 +336,9 @@ CONFIG_BFIN_DCACHE=y | |||
| 334 | # CONFIG_BFIN_ICACHE_LOCK is not set | 336 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 335 | CONFIG_BFIN_WB=y | 337 | CONFIG_BFIN_WB=y |
| 336 | # CONFIG_BFIN_WT is not set | 338 | # CONFIG_BFIN_WT is not set |
| 337 | # CONFIG_BFIN_L2_CACHEABLE is not set | 339 | # CONFIG_BFIN_L2_WB is not set |
| 340 | CONFIG_BFIN_L2_WT=y | ||
| 341 | # CONFIG_BFIN_L2_NOT_CACHED is not set | ||
| 338 | # CONFIG_MPU is not set | 342 | # CONFIG_MPU is not set |
| 339 | 343 | ||
| 340 | # | 344 | # |
| @@ -415,7 +419,7 @@ CONFIG_IP_PNP=y | |||
| 415 | # CONFIG_NET_IPIP is not set | 419 | # CONFIG_NET_IPIP is not set |
| 416 | # CONFIG_NET_IPGRE is not set | 420 | # CONFIG_NET_IPGRE is not set |
| 417 | # CONFIG_ARPD is not set | 421 | # CONFIG_ARPD is not set |
| 418 | CONFIG_SYN_COOKIES=y | 422 | # CONFIG_SYN_COOKIES is not set |
| 419 | # CONFIG_INET_AH is not set | 423 | # CONFIG_INET_AH is not set |
| 420 | # CONFIG_INET_ESP is not set | 424 | # CONFIG_INET_ESP is not set |
| 421 | # CONFIG_INET_IPCOMP is not set | 425 | # CONFIG_INET_IPCOMP is not set |
| @@ -570,9 +574,7 @@ CONFIG_MTD_ROM=m | |||
| 570 | # | 574 | # |
| 571 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 575 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
| 572 | CONFIG_MTD_PHYSMAP=m | 576 | CONFIG_MTD_PHYSMAP=m |
| 573 | CONFIG_MTD_PHYSMAP_START=0x20000000 | 577 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
| 574 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
| 575 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
| 576 | # CONFIG_MTD_UCLINUX is not set | 578 | # CONFIG_MTD_UCLINUX is not set |
| 577 | # CONFIG_MTD_PLATRAM is not set | 579 | # CONFIG_MTD_PLATRAM is not set |
| 578 | 580 | ||
| @@ -649,9 +651,8 @@ CONFIG_SMC91X=y | |||
| 649 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 651 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 650 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 652 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 651 | # CONFIG_B44 is not set | 653 | # CONFIG_B44 is not set |
| 652 | CONFIG_NETDEV_1000=y | 654 | # CONFIG_NETDEV_1000 is not set |
| 653 | # CONFIG_AX88180 is not set | 655 | # CONFIG_NETDEV_10000 is not set |
| 654 | CONFIG_NETDEV_10000=y | ||
| 655 | 656 | ||
| 656 | # | 657 | # |
| 657 | # Wireless LAN | 658 | # Wireless LAN |
| @@ -703,13 +704,13 @@ CONFIG_INPUT_EVDEV=m | |||
| 703 | # Character devices | 704 | # Character devices |
| 704 | # | 705 | # |
| 705 | # CONFIG_AD9960 is not set | 706 | # CONFIG_AD9960 is not set |
| 706 | # CONFIG_SPI_ADC_BF533 is not set | 707 | CONFIG_BFIN_DMA_INTERFACE=m |
| 707 | # CONFIG_BF5xx_PPIFCD is not set | 708 | # CONFIG_BFIN_PPI is not set |
| 709 | # CONFIG_BFIN_PPIFCD is not set | ||
| 708 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 710 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 709 | # CONFIG_BF5xx_PPI is not set | 711 | # CONFIG_BFIN_SPI_ADC is not set |
| 710 | # CONFIG_BFIN_SPORT is not set | 712 | # CONFIG_BFIN_SPORT is not set |
| 711 | # CONFIG_BFIN_TIMER_LATENCY is not set | 713 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 712 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 713 | CONFIG_SIMPLE_GPIO=m | 714 | CONFIG_SIMPLE_GPIO=m |
| 714 | # CONFIG_VT is not set | 715 | # CONFIG_VT is not set |
| 715 | # CONFIG_DEVKMEM is not set | 716 | # CONFIG_DEVKMEM is not set |
| @@ -765,7 +766,30 @@ CONFIG_SPI_BFIN=y | |||
| 765 | # CONFIG_SPI_SPIDEV is not set | 766 | # CONFIG_SPI_SPIDEV is not set |
| 766 | # CONFIG_SPI_TLE62X0 is not set | 767 | # CONFIG_SPI_TLE62X0 is not set |
| 767 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 768 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 768 | # CONFIG_GPIOLIB is not set | 769 | CONFIG_GPIOLIB=y |
| 770 | # CONFIG_DEBUG_GPIO is not set | ||
| 771 | CONFIG_GPIO_SYSFS=y | ||
| 772 | |||
| 773 | # | ||
| 774 | # Memory mapped GPIO expanders: | ||
| 775 | # | ||
| 776 | |||
| 777 | # | ||
| 778 | # I2C GPIO expanders: | ||
| 779 | # | ||
| 780 | # CONFIG_GPIO_MAX732X is not set | ||
| 781 | # CONFIG_GPIO_PCA953X is not set | ||
| 782 | # CONFIG_GPIO_PCF857X is not set | ||
| 783 | |||
| 784 | # | ||
| 785 | # PCI GPIO expanders: | ||
| 786 | # | ||
| 787 | |||
| 788 | # | ||
| 789 | # SPI GPIO expanders: | ||
| 790 | # | ||
| 791 | # CONFIG_GPIO_MAX7301 is not set | ||
| 792 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 769 | # CONFIG_W1 is not set | 793 | # CONFIG_W1 is not set |
| 770 | # CONFIG_POWER_SUPPLY is not set | 794 | # CONFIG_POWER_SUPPLY is not set |
| 771 | # CONFIG_HWMON is not set | 795 | # CONFIG_HWMON is not set |
| @@ -897,16 +921,6 @@ CONFIG_SYSFS=y | |||
| 897 | # CONFIG_BEFS_FS is not set | 921 | # CONFIG_BEFS_FS is not set |
| 898 | # CONFIG_BFS_FS is not set | 922 | # CONFIG_BFS_FS is not set |
| 899 | # CONFIG_EFS_FS is not set | 923 | # CONFIG_EFS_FS is not set |
| 900 | CONFIG_YAFFS_FS=m | ||
| 901 | CONFIG_YAFFS_YAFFS1=y | ||
| 902 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 903 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 904 | CONFIG_YAFFS_YAFFS2=y | ||
| 905 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 906 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 907 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 908 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 909 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 910 | CONFIG_JFFS2_FS=m | 924 | CONFIG_JFFS2_FS=m |
| 911 | CONFIG_JFFS2_FS_DEBUG=0 | 925 | CONFIG_JFFS2_FS_DEBUG=0 |
| 912 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 926 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
| @@ -918,6 +932,16 @@ CONFIG_JFFS2_ZLIB=y | |||
| 918 | # CONFIG_JFFS2_LZO is not set | 932 | # CONFIG_JFFS2_LZO is not set |
| 919 | CONFIG_JFFS2_RTIME=y | 933 | CONFIG_JFFS2_RTIME=y |
| 920 | # CONFIG_JFFS2_RUBIN is not set | 934 | # CONFIG_JFFS2_RUBIN is not set |
| 935 | CONFIG_YAFFS_FS=m | ||
| 936 | CONFIG_YAFFS_YAFFS1=y | ||
| 937 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
| 938 | # CONFIG_YAFFS_DOES_ECC is not set | ||
| 939 | CONFIG_YAFFS_YAFFS2=y | ||
| 940 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
| 941 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
| 942 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
| 943 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
| 944 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
| 921 | # CONFIG_CRAMFS is not set | 945 | # CONFIG_CRAMFS is not set |
| 922 | # CONFIG_VXFS_FS is not set | 946 | # CONFIG_VXFS_FS is not set |
| 923 | # CONFIG_MINIX_FS is not set | 947 | # CONFIG_MINIX_FS is not set |
| @@ -1006,7 +1030,7 @@ CONFIG_FRAME_WARN=1024 | |||
| 1006 | CONFIG_DEBUG_FS=y | 1030 | CONFIG_DEBUG_FS=y |
| 1007 | # CONFIG_HEADERS_CHECK is not set | 1031 | # CONFIG_HEADERS_CHECK is not set |
| 1008 | CONFIG_DEBUG_KERNEL=y | 1032 | CONFIG_DEBUG_KERNEL=y |
| 1009 | # CONFIG_DEBUG_SHIRQ is not set | 1033 | CONFIG_DEBUG_SHIRQ=y |
| 1010 | CONFIG_DETECT_SOFTLOCKUP=y | 1034 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1011 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1035 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1012 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1036 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| @@ -1015,8 +1039,6 @@ CONFIG_SCHED_DEBUG=y | |||
| 1015 | # CONFIG_TIMER_STATS is not set | 1039 | # CONFIG_TIMER_STATS is not set |
| 1016 | # CONFIG_DEBUG_OBJECTS is not set | 1040 | # CONFIG_DEBUG_OBJECTS is not set |
| 1017 | # CONFIG_DEBUG_SLAB is not set | 1041 | # CONFIG_DEBUG_SLAB is not set |
| 1018 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1019 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1020 | # CONFIG_DEBUG_SPINLOCK is not set | 1042 | # CONFIG_DEBUG_SPINLOCK is not set |
| 1021 | # CONFIG_DEBUG_MUTEXES is not set | 1043 | # CONFIG_DEBUG_MUTEXES is not set |
| 1022 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1044 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
| @@ -1036,7 +1058,6 @@ CONFIG_DEBUG_INFO=y | |||
| 1036 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1058 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1037 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 1059 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1038 | # CONFIG_FAULT_INJECTION is not set | 1060 | # CONFIG_FAULT_INJECTION is not set |
| 1039 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1040 | 1061 | ||
| 1041 | # | 1062 | # |
| 1042 | # Tracers | 1063 | # Tracers |
| @@ -1052,16 +1073,20 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
| 1052 | # CONFIG_DEBUG_STACK_USAGE is not set | 1073 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1053 | CONFIG_DEBUG_VERBOSE=y | 1074 | CONFIG_DEBUG_VERBOSE=y |
| 1054 | CONFIG_DEBUG_MMRS=y | 1075 | CONFIG_DEBUG_MMRS=y |
| 1055 | # CONFIG_DEBUG_HWERR is not set | 1076 | CONFIG_DEBUG_HWERR=y |
| 1056 | # CONFIG_DEBUG_DOUBLEFAULT is not set | 1077 | CONFIG_EXACT_HWERR=y |
| 1078 | CONFIG_DEBUG_DOUBLEFAULT=y | ||
| 1079 | CONFIG_DEBUG_DOUBLEFAULT_PRINT=y | ||
| 1080 | # CONFIG_DEBUG_DOUBLEFAULT_RESET is not set | ||
| 1081 | # CONFIG_DEBUG_ICACHE_CHECK is not set | ||
| 1057 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 1082 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 1058 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 1083 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 1059 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 1084 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set |
| 1060 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set | 1085 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y |
| 1061 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set | 1086 | # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set |
| 1062 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0 | 1087 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1 |
| 1063 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set | 1088 | # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set |
| 1064 | # CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set | 1089 | CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y |
| 1065 | CONFIG_EARLY_PRINTK=y | 1090 | CONFIG_EARLY_PRINTK=y |
| 1066 | CONFIG_CPLB_INFO=y | 1091 | CONFIG_CPLB_INFO=y |
| 1067 | CONFIG_ACCESS_CHECK=y | 1092 | CONFIG_ACCESS_CHECK=y |
| @@ -1174,7 +1199,6 @@ CONFIG_CRC32=y | |||
| 1174 | # CONFIG_LIBCRC32C is not set | 1199 | # CONFIG_LIBCRC32C is not set |
| 1175 | CONFIG_ZLIB_INFLATE=y | 1200 | CONFIG_ZLIB_INFLATE=y |
| 1176 | CONFIG_ZLIB_DEFLATE=m | 1201 | CONFIG_ZLIB_DEFLATE=m |
| 1177 | CONFIG_PLIST=y | ||
| 1178 | CONFIG_HAS_IOMEM=y | 1202 | CONFIG_HAS_IOMEM=y |
| 1179 | CONFIG_HAS_IOPORT=y | 1203 | CONFIG_HAS_IOPORT=y |
| 1180 | CONFIG_HAS_DMA=y | 1204 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig index ef1a2c84ace1..174c578b8ec4 100644 --- a/arch/blackfin/configs/BlackStamp_defconfig +++ b/arch/blackfin/configs/BlackStamp_defconfig | |||
| @@ -46,7 +46,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 46 | # CONFIG_SYSCTL is not set | 46 | # CONFIG_SYSCTL is not set |
| 47 | CONFIG_EMBEDDED=y | 47 | CONFIG_EMBEDDED=y |
| 48 | CONFIG_UID16=y | 48 | CONFIG_UID16=y |
| 49 | CONFIG_SYSCTL_SYSCALL=y | 49 | # CONFIG_SYSCTL_SYSCALL is not set |
| 50 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 50 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 51 | CONFIG_KALLSYMS=y | 51 | CONFIG_KALLSYMS=y |
| 52 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 52 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -381,7 +381,7 @@ CONFIG_IP_PNP=y | |||
| 381 | # CONFIG_NET_IPIP is not set | 381 | # CONFIG_NET_IPIP is not set |
| 382 | # CONFIG_NET_IPGRE is not set | 382 | # CONFIG_NET_IPGRE is not set |
| 383 | # CONFIG_ARPD is not set | 383 | # CONFIG_ARPD is not set |
| 384 | CONFIG_SYN_COOKIES=y | 384 | # CONFIG_SYN_COOKIES is not set |
| 385 | # CONFIG_INET_AH is not set | 385 | # CONFIG_INET_AH is not set |
| 386 | # CONFIG_INET_ESP is not set | 386 | # CONFIG_INET_ESP is not set |
| 387 | # CONFIG_INET_IPCOMP is not set | 387 | # CONFIG_INET_IPCOMP is not set |
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig index e2fc588e4336..e17875e8abe8 100644 --- a/arch/blackfin/configs/CM-BF527_defconfig +++ b/arch/blackfin/configs/CM-BF527_defconfig | |||
| @@ -46,7 +46,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 46 | # CONFIG_SYSCTL is not set | 46 | # CONFIG_SYSCTL is not set |
| 47 | CONFIG_EMBEDDED=y | 47 | CONFIG_EMBEDDED=y |
| 48 | CONFIG_UID16=y | 48 | CONFIG_UID16=y |
| 49 | CONFIG_SYSCTL_SYSCALL=y | 49 | # CONFIG_SYSCTL_SYSCALL is not set |
| 50 | CONFIG_KALLSYMS=y | 50 | CONFIG_KALLSYMS=y |
| 51 | # CONFIG_KALLSYMS_ALL is not set | 51 | # CONFIG_KALLSYMS_ALL is not set |
| 52 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 52 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -411,7 +411,7 @@ CONFIG_IP_PNP=y | |||
| 411 | # CONFIG_NET_IPIP is not set | 411 | # CONFIG_NET_IPIP is not set |
| 412 | # CONFIG_NET_IPGRE is not set | 412 | # CONFIG_NET_IPGRE is not set |
| 413 | # CONFIG_ARPD is not set | 413 | # CONFIG_ARPD is not set |
| 414 | CONFIG_SYN_COOKIES=y | 414 | # CONFIG_SYN_COOKIES is not set |
| 415 | # CONFIG_INET_AH is not set | 415 | # CONFIG_INET_AH is not set |
| 416 | # CONFIG_INET_ESP is not set | 416 | # CONFIG_INET_ESP is not set |
| 417 | # CONFIG_INET_IPCOMP is not set | 417 | # CONFIG_INET_IPCOMP is not set |
| @@ -783,7 +783,30 @@ CONFIG_SPI_BFIN=y | |||
| 783 | # CONFIG_SPI_SPIDEV is not set | 783 | # CONFIG_SPI_SPIDEV is not set |
| 784 | # CONFIG_SPI_TLE62X0 is not set | 784 | # CONFIG_SPI_TLE62X0 is not set |
| 785 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 785 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 786 | # CONFIG_GPIOLIB is not set | 786 | CONFIG_GPIOLIB=y |
| 787 | # CONFIG_DEBUG_GPIO is not set | ||
| 788 | CONFIG_GPIO_SYSFS=y | ||
| 789 | |||
| 790 | # | ||
| 791 | # Memory mapped GPIO expanders: | ||
| 792 | # | ||
| 793 | |||
| 794 | # | ||
| 795 | # I2C GPIO expanders: | ||
| 796 | # | ||
| 797 | # CONFIG_GPIO_MAX732X is not set | ||
| 798 | # CONFIG_GPIO_PCA953X is not set | ||
| 799 | # CONFIG_GPIO_PCF857X is not set | ||
| 800 | |||
| 801 | # | ||
| 802 | # PCI GPIO expanders: | ||
| 803 | # | ||
| 804 | |||
| 805 | # | ||
| 806 | # SPI GPIO expanders: | ||
| 807 | # | ||
| 808 | # CONFIG_GPIO_MAX7301 is not set | ||
| 809 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 787 | # CONFIG_W1 is not set | 810 | # CONFIG_W1 is not set |
| 788 | # CONFIG_POWER_SUPPLY is not set | 811 | # CONFIG_POWER_SUPPLY is not set |
| 789 | CONFIG_HWMON=y | 812 | CONFIG_HWMON=y |
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig index 65a8bbb8d647..fafd95e84b28 100644 --- a/arch/blackfin/configs/CM-BF533_defconfig +++ b/arch/blackfin/configs/CM-BF533_defconfig | |||
| @@ -49,7 +49,7 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 49 | # CONFIG_SYSCTL is not set | 49 | # CONFIG_SYSCTL is not set |
| 50 | CONFIG_EMBEDDED=y | 50 | CONFIG_EMBEDDED=y |
| 51 | # CONFIG_UID16 is not set | 51 | # CONFIG_UID16 is not set |
| 52 | CONFIG_SYSCTL_SYSCALL=y | 52 | # CONFIG_SYSCTL_SYSCALL is not set |
| 53 | CONFIG_KALLSYMS=y | 53 | CONFIG_KALLSYMS=y |
| 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 55 | # CONFIG_HOTPLUG is not set | 55 | # CONFIG_HOTPLUG is not set |
| @@ -347,7 +347,7 @@ CONFIG_IP_FIB_HASH=y | |||
| 347 | # CONFIG_NET_IPIP is not set | 347 | # CONFIG_NET_IPIP is not set |
| 348 | # CONFIG_NET_IPGRE is not set | 348 | # CONFIG_NET_IPGRE is not set |
| 349 | # CONFIG_ARPD is not set | 349 | # CONFIG_ARPD is not set |
| 350 | CONFIG_SYN_COOKIES=y | 350 | # CONFIG_SYN_COOKIES is not set |
| 351 | # CONFIG_INET_AH is not set | 351 | # CONFIG_INET_AH is not set |
| 352 | # CONFIG_INET_ESP is not set | 352 | # CONFIG_INET_ESP is not set |
| 353 | # CONFIG_INET_IPCOMP is not set | 353 | # CONFIG_INET_IPCOMP is not set |
| @@ -547,9 +547,9 @@ CONFIG_MII=y | |||
| 547 | CONFIG_SMC91X=y | 547 | CONFIG_SMC91X=y |
| 548 | # CONFIG_SMSC911X is not set | 548 | # CONFIG_SMSC911X is not set |
| 549 | # CONFIG_DM9000 is not set | 549 | # CONFIG_DM9000 is not set |
| 550 | CONFIG_NETDEV_1000=y | 550 | # CONFIG_NETDEV_1000 is not set |
| 551 | # CONFIG_AX88180 is not set | 551 | # CONFIG_AX88180 is not set |
| 552 | CONFIG_NETDEV_10000=y | 552 | # CONFIG_NETDEV_10000 is not set |
| 553 | 553 | ||
| 554 | # | 554 | # |
| 555 | # Wireless LAN | 555 | # Wireless LAN |
| @@ -641,6 +641,10 @@ CONFIG_UNIX98_PTYS=y | |||
| 641 | # CONFIG_TCG_TPM is not set | 641 | # CONFIG_TCG_TPM is not set |
| 642 | # CONFIG_I2C is not set | 642 | # CONFIG_I2C is not set |
| 643 | 643 | ||
| 644 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 645 | CONFIG_GPIOLIB=y | ||
| 646 | CONFIG_GPIO_SYSFS=y | ||
| 647 | |||
| 644 | # | 648 | # |
| 645 | # SPI support | 649 | # SPI support |
| 646 | # | 650 | # |
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig index 9b7e9d781145..e73aa5af58b9 100644 --- a/arch/blackfin/configs/CM-BF537E_defconfig +++ b/arch/blackfin/configs/CM-BF537E_defconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.22.16 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # Wed Jun 3 06:27:41 2009 | ||
| 4 | # | 5 | # |
| 5 | # CONFIG_MMU is not set | 6 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 7 | # CONFIG_FPU is not set |
| @@ -8,48 +9,44 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
| 8 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | 9 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set |
| 9 | CONFIG_BLACKFIN=y | 10 | CONFIG_BLACKFIN=y |
| 10 | CONFIG_ZONE_DMA=y | 11 | CONFIG_ZONE_DMA=y |
| 11 | CONFIG_SEMAPHORE_SLEEPERS=y | ||
| 12 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 12 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
| 13 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
| 14 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 15 | CONFIG_GENERIC_IRQ_PROBE=y | 15 | CONFIG_GENERIC_IRQ_PROBE=y |
| 16 | CONFIG_GENERIC_TIME=y | ||
| 17 | CONFIG_GENERIC_GPIO=y | 16 | CONFIG_GENERIC_GPIO=y |
| 18 | CONFIG_FORCE_MAX_ZONEORDER=14 | 17 | CONFIG_FORCE_MAX_ZONEORDER=14 |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 18 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 20 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 19 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 21 | 20 | ||
| 22 | # | 21 | # |
| 23 | # Code maturity level options | 22 | # General setup |
| 24 | # | 23 | # |
| 25 | CONFIG_EXPERIMENTAL=y | 24 | CONFIG_EXPERIMENTAL=y |
| 26 | CONFIG_BROKEN_ON_SMP=y | 25 | CONFIG_BROKEN_ON_SMP=y |
| 27 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 26 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 28 | |||
| 29 | # | ||
| 30 | # General setup | ||
| 31 | # | ||
| 32 | CONFIG_LOCALVERSION="" | 27 | CONFIG_LOCALVERSION="" |
| 33 | CONFIG_LOCALVERSION_AUTO=y | 28 | CONFIG_LOCALVERSION_AUTO=y |
| 34 | CONFIG_SYSVIPC=y | 29 | CONFIG_SYSVIPC=y |
| 35 | # CONFIG_IPC_NS is not set | ||
| 36 | CONFIG_SYSVIPC_SYSCTL=y | 30 | CONFIG_SYSVIPC_SYSCTL=y |
| 37 | # CONFIG_POSIX_MQUEUE is not set | 31 | # CONFIG_POSIX_MQUEUE is not set |
| 38 | # CONFIG_BSD_PROCESS_ACCT is not set | 32 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 39 | # CONFIG_TASKSTATS is not set | 33 | # CONFIG_TASKSTATS is not set |
| 40 | # CONFIG_UTS_NS is not set | ||
| 41 | # CONFIG_AUDIT is not set | 34 | # CONFIG_AUDIT is not set |
| 42 | CONFIG_IKCONFIG=y | 35 | CONFIG_IKCONFIG=y |
| 43 | CONFIG_IKCONFIG_PROC=y | 36 | CONFIG_IKCONFIG_PROC=y |
| 44 | CONFIG_LOG_BUF_SHIFT=14 | 37 | CONFIG_LOG_BUF_SHIFT=14 |
| 45 | # CONFIG_SYSFS_DEPRECATED is not set | 38 | # CONFIG_CGROUPS is not set |
| 39 | # CONFIG_GROUP_SCHED is not set | ||
| 40 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 46 | # CONFIG_RELAY is not set | 41 | # CONFIG_RELAY is not set |
| 42 | # CONFIG_NAMESPACES is not set | ||
| 47 | # CONFIG_BLK_DEV_INITRD is not set | 43 | # CONFIG_BLK_DEV_INITRD is not set |
| 48 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 44 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 49 | # CONFIG_SYSCTL is not set | 45 | CONFIG_SYSCTL=y |
| 46 | CONFIG_ANON_INODES=y | ||
| 50 | CONFIG_EMBEDDED=y | 47 | CONFIG_EMBEDDED=y |
| 51 | # CONFIG_UID16 is not set | 48 | # CONFIG_UID16 is not set |
| 52 | CONFIG_SYSCTL_SYSCALL=y | 49 | # CONFIG_SYSCTL_SYSCALL is not set |
| 53 | CONFIG_KALLSYMS=y | 50 | CONFIG_KALLSYMS=y |
| 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 51 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 55 | # CONFIG_HOTPLUG is not set | 52 | # CONFIG_HOTPLUG is not set |
| @@ -58,37 +55,36 @@ CONFIG_BUG=y | |||
| 58 | # CONFIG_ELF_CORE is not set | 55 | # CONFIG_ELF_CORE is not set |
| 59 | CONFIG_BASE_FULL=y | 56 | CONFIG_BASE_FULL=y |
| 60 | # CONFIG_FUTEX is not set | 57 | # CONFIG_FUTEX is not set |
| 61 | CONFIG_ANON_INODES=y | ||
| 62 | CONFIG_EPOLL=y | 58 | CONFIG_EPOLL=y |
| 63 | CONFIG_SIGNALFD=y | 59 | # CONFIG_SIGNALFD is not set |
| 64 | CONFIG_EVENTFD=y | 60 | # CONFIG_TIMERFD is not set |
| 61 | # CONFIG_EVENTFD is not set | ||
| 62 | # CONFIG_AIO is not set | ||
| 65 | CONFIG_VM_EVENT_COUNTERS=y | 63 | CONFIG_VM_EVENT_COUNTERS=y |
| 66 | CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3 | 64 | CONFIG_COMPAT_BRK=y |
| 67 | # CONFIG_NP2 is not set | ||
| 68 | CONFIG_SLAB=y | 65 | CONFIG_SLAB=y |
| 69 | # CONFIG_SLUB is not set | 66 | # CONFIG_SLUB is not set |
| 70 | # CONFIG_SLOB is not set | 67 | # CONFIG_SLOB is not set |
| 71 | CONFIG_RT_MUTEXES=y | 68 | # CONFIG_PROFILING is not set |
| 69 | # CONFIG_MARKERS is not set | ||
| 70 | CONFIG_HAVE_OPROFILE=y | ||
| 71 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
| 72 | CONFIG_SLABINFO=y | ||
| 72 | CONFIG_TINY_SHMEM=y | 73 | CONFIG_TINY_SHMEM=y |
| 73 | CONFIG_BASE_SMALL=0 | 74 | CONFIG_BASE_SMALL=0 |
| 74 | |||
| 75 | # | ||
| 76 | # Loadable module support | ||
| 77 | # | ||
| 78 | CONFIG_MODULES=y | 75 | CONFIG_MODULES=y |
| 76 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 79 | CONFIG_MODULE_UNLOAD=y | 77 | CONFIG_MODULE_UNLOAD=y |
| 80 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 78 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 81 | # CONFIG_MODVERSIONS is not set | 79 | # CONFIG_MODVERSIONS is not set |
| 82 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 80 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 83 | CONFIG_KMOD=y | 81 | CONFIG_KMOD=y |
| 84 | |||
| 85 | # | ||
| 86 | # Block layer | ||
| 87 | # | ||
| 88 | CONFIG_BLOCK=y | 82 | CONFIG_BLOCK=y |
| 89 | # CONFIG_LBD is not set | 83 | # CONFIG_LBD is not set |
| 90 | # CONFIG_BLK_DEV_IO_TRACE is not set | 84 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 91 | # CONFIG_LSF is not set | 85 | # CONFIG_LSF is not set |
| 86 | # CONFIG_BLK_DEV_BSG is not set | ||
| 87 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 92 | 88 | ||
| 93 | # | 89 | # |
| 94 | # IO Schedulers | 90 | # IO Schedulers |
| @@ -102,9 +98,11 @@ CONFIG_IOSCHED_CFQ=y | |||
| 102 | # CONFIG_DEFAULT_CFQ is not set | 98 | # CONFIG_DEFAULT_CFQ is not set |
| 103 | CONFIG_DEFAULT_NOOP=y | 99 | CONFIG_DEFAULT_NOOP=y |
| 104 | CONFIG_DEFAULT_IOSCHED="noop" | 100 | CONFIG_DEFAULT_IOSCHED="noop" |
| 101 | CONFIG_CLASSIC_RCU=y | ||
| 105 | CONFIG_PREEMPT_NONE=y | 102 | CONFIG_PREEMPT_NONE=y |
| 106 | # CONFIG_PREEMPT_VOLUNTARY is not set | 103 | # CONFIG_PREEMPT_VOLUNTARY is not set |
| 107 | # CONFIG_PREEMPT is not set | 104 | # CONFIG_PREEMPT is not set |
| 105 | # CONFIG_FREEZER is not set | ||
| 108 | 106 | ||
| 109 | # | 107 | # |
| 110 | # Blackfin Processor Options | 108 | # Blackfin Processor Options |
| @@ -113,6 +111,10 @@ CONFIG_PREEMPT_NONE=y | |||
| 113 | # | 111 | # |
| 114 | # Processor and Board Settings | 112 | # Processor and Board Settings |
| 115 | # | 113 | # |
| 114 | # CONFIG_BF512 is not set | ||
| 115 | # CONFIG_BF514 is not set | ||
| 116 | # CONFIG_BF516 is not set | ||
| 117 | # CONFIG_BF518 is not set | ||
| 116 | # CONFIG_BF522 is not set | 118 | # CONFIG_BF522 is not set |
| 117 | # CONFIG_BF523 is not set | 119 | # CONFIG_BF523 is not set |
| 118 | # CONFIG_BF524 is not set | 120 | # CONFIG_BF524 is not set |
| @@ -125,22 +127,31 @@ CONFIG_PREEMPT_NONE=y | |||
| 125 | # CONFIG_BF534 is not set | 127 | # CONFIG_BF534 is not set |
| 126 | # CONFIG_BF536 is not set | 128 | # CONFIG_BF536 is not set |
| 127 | CONFIG_BF537=y | 129 | CONFIG_BF537=y |
| 130 | # CONFIG_BF538 is not set | ||
| 131 | # CONFIG_BF539 is not set | ||
| 128 | # CONFIG_BF542 is not set | 132 | # CONFIG_BF542 is not set |
| 133 | # CONFIG_BF542M is not set | ||
| 129 | # CONFIG_BF544 is not set | 134 | # CONFIG_BF544 is not set |
| 135 | # CONFIG_BF544M is not set | ||
| 130 | # CONFIG_BF547 is not set | 136 | # CONFIG_BF547 is not set |
| 137 | # CONFIG_BF547M is not set | ||
| 131 | # CONFIG_BF548 is not set | 138 | # CONFIG_BF548 is not set |
| 139 | # CONFIG_BF548M is not set | ||
| 132 | # CONFIG_BF549 is not set | 140 | # CONFIG_BF549 is not set |
| 141 | # CONFIG_BF549M is not set | ||
| 133 | # CONFIG_BF561 is not set | 142 | # CONFIG_BF561 is not set |
| 143 | CONFIG_BF_REV_MIN=2 | ||
| 144 | CONFIG_BF_REV_MAX=3 | ||
| 134 | # CONFIG_BF_REV_0_0 is not set | 145 | # CONFIG_BF_REV_0_0 is not set |
| 135 | # CONFIG_BF_REV_0_1 is not set | 146 | # CONFIG_BF_REV_0_1 is not set |
| 136 | CONFIG_BF_REV_0_2=y | 147 | CONFIG_BF_REV_0_2=y |
| 137 | # CONFIG_BF_REV_0_3 is not set | 148 | # CONFIG_BF_REV_0_3 is not set |
| 138 | # CONFIG_BF_REV_0_4 is not set | 149 | # CONFIG_BF_REV_0_4 is not set |
| 139 | # CONFIG_BF_REV_0_5 is not set | 150 | # CONFIG_BF_REV_0_5 is not set |
| 151 | # CONFIG_BF_REV_0_6 is not set | ||
| 140 | # CONFIG_BF_REV_ANY is not set | 152 | # CONFIG_BF_REV_ANY is not set |
| 141 | # CONFIG_BF_REV_NONE is not set | 153 | # CONFIG_BF_REV_NONE is not set |
| 142 | CONFIG_BF53x=y | 154 | CONFIG_BF53x=y |
| 143 | CONFIG_BFIN_SINGLE_CORE=y | ||
| 144 | CONFIG_MEM_MT48LC16M16A2TG_75=y | 155 | CONFIG_MEM_MT48LC16M16A2TG_75=y |
| 145 | CONFIG_IRQ_PLL_WAKEUP=7 | 156 | CONFIG_IRQ_PLL_WAKEUP=7 |
| 146 | CONFIG_IRQ_RTC=8 | 157 | CONFIG_IRQ_RTC=8 |
| @@ -150,7 +161,6 @@ CONFIG_IRQ_SPORT0_TX=9 | |||
| 150 | CONFIG_IRQ_SPORT1_RX=9 | 161 | CONFIG_IRQ_SPORT1_RX=9 |
| 151 | CONFIG_IRQ_SPORT1_TX=9 | 162 | CONFIG_IRQ_SPORT1_TX=9 |
| 152 | CONFIG_IRQ_TWI=10 | 163 | CONFIG_IRQ_TWI=10 |
| 153 | CONFIG_IRQ_SPI=10 | ||
| 154 | CONFIG_IRQ_UART0_RX=10 | 164 | CONFIG_IRQ_UART0_RX=10 |
| 155 | CONFIG_IRQ_UART0_TX=10 | 165 | CONFIG_IRQ_UART0_TX=10 |
| 156 | CONFIG_IRQ_UART1_RX=10 | 166 | CONFIG_IRQ_UART1_RX=10 |
| @@ -169,11 +179,12 @@ CONFIG_IRQ_PORTG_INTB=12 | |||
| 169 | CONFIG_IRQ_MEM_DMA0=13 | 179 | CONFIG_IRQ_MEM_DMA0=13 |
| 170 | CONFIG_IRQ_MEM_DMA1=13 | 180 | CONFIG_IRQ_MEM_DMA1=13 |
| 171 | CONFIG_IRQ_WATCH=13 | 181 | CONFIG_IRQ_WATCH=13 |
| 182 | CONFIG_IRQ_SPI=10 | ||
| 172 | # CONFIG_BFIN537_STAMP is not set | 183 | # CONFIG_BFIN537_STAMP is not set |
| 173 | CONFIG_BFIN537_BLUETECHNIX_CM=y | 184 | CONFIG_BFIN537_BLUETECHNIX_CM=y |
| 185 | # CONFIG_BFIN537_BLUETECHNIX_TCM is not set | ||
| 174 | # CONFIG_PNAV10 is not set | 186 | # CONFIG_PNAV10 is not set |
| 175 | # CONFIG_CAMSIG_MINOTAUR is not set | 187 | # CONFIG_CAMSIG_MINOTAUR is not set |
| 176 | # CONFIG_GENERIC_BF537_BOARD is not set | ||
| 177 | 188 | ||
| 178 | # | 189 | # |
| 179 | # BF537 Specific Configuration | 190 | # BF537 Specific Configuration |
| @@ -196,6 +207,7 @@ CONFIG_IRQ_PROG_INTA=12 | |||
| 196 | # Board customizations | 207 | # Board customizations |
| 197 | # | 208 | # |
| 198 | # CONFIG_CMDLINE_BOOL is not set | 209 | # CONFIG_CMDLINE_BOOL is not set |
| 210 | CONFIG_BOOT_LOAD=0x1000 | ||
| 199 | 211 | ||
| 200 | # | 212 | # |
| 201 | # Clock/PLL Setup | 213 | # Clock/PLL Setup |
| @@ -215,13 +227,20 @@ CONFIG_HZ_250=y | |||
| 215 | # CONFIG_HZ_300 is not set | 227 | # CONFIG_HZ_300 is not set |
| 216 | # CONFIG_HZ_1000 is not set | 228 | # CONFIG_HZ_1000 is not set |
| 217 | CONFIG_HZ=250 | 229 | CONFIG_HZ=250 |
| 230 | # CONFIG_SCHED_HRTICK is not set | ||
| 231 | CONFIG_GENERIC_TIME=y | ||
| 232 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 233 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 234 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 235 | # CONFIG_CYCLES_CLOCKSOURCE is not set | ||
| 236 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 237 | # CONFIG_NO_HZ is not set | ||
| 238 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 239 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 218 | 240 | ||
| 219 | # | 241 | # |
| 220 | # Memory Setup | 242 | # Misc |
| 221 | # | 243 | # |
| 222 | CONFIG_MAX_MEM_SIZE=32 | ||
| 223 | CONFIG_MEM_ADD_WIDTH=9 | ||
| 224 | CONFIG_BOOT_LOAD=0x1000 | ||
| 225 | CONFIG_BFIN_SCRATCH_REG_RETN=y | 244 | CONFIG_BFIN_SCRATCH_REG_RETN=y |
| 226 | # CONFIG_BFIN_SCRATCH_REG_RETE is not set | 245 | # CONFIG_BFIN_SCRATCH_REG_RETE is not set |
| 227 | # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set | 246 | # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set |
| @@ -248,6 +267,12 @@ CONFIG_IP_CHECKSUM_L1=y | |||
| 248 | CONFIG_CACHELINE_ALIGNED_L1=y | 267 | CONFIG_CACHELINE_ALIGNED_L1=y |
| 249 | CONFIG_SYSCALL_TAB_L1=y | 268 | CONFIG_SYSCALL_TAB_L1=y |
| 250 | CONFIG_CPLB_SWITCH_TAB_L1=y | 269 | CONFIG_CPLB_SWITCH_TAB_L1=y |
| 270 | CONFIG_APP_STACK_L1=y | ||
| 271 | |||
| 272 | # | ||
| 273 | # Speed Optimizations | ||
| 274 | # | ||
| 275 | CONFIG_BFIN_INS_LOWOVERHEAD=y | ||
| 251 | CONFIG_RAMKERNEL=y | 276 | CONFIG_RAMKERNEL=y |
| 252 | # CONFIG_ROMKERNEL is not set | 277 | # CONFIG_ROMKERNEL is not set |
| 253 | CONFIG_SELECT_MEMORY_MODEL=y | 278 | CONFIG_SELECT_MEMORY_MODEL=y |
| @@ -256,12 +281,14 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 256 | # CONFIG_SPARSEMEM_MANUAL is not set | 281 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 257 | CONFIG_FLATMEM=y | 282 | CONFIG_FLATMEM=y |
| 258 | CONFIG_FLAT_NODE_MEM_MAP=y | 283 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 259 | # CONFIG_SPARSEMEM_STATIC is not set | 284 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 260 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 285 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 261 | # CONFIG_RESOURCES_64BIT is not set | 286 | # CONFIG_RESOURCES_64BIT is not set |
| 287 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 262 | CONFIG_ZONE_DMA_FLAG=1 | 288 | CONFIG_ZONE_DMA_FLAG=1 |
| 263 | CONFIG_LARGE_ALLOCS=y | 289 | CONFIG_VIRT_TO_BUS=y |
| 264 | # CONFIG_BFIN_GPTIMERS is not set | 290 | # CONFIG_BFIN_GPTIMERS is not set |
| 291 | # CONFIG_DMA_UNCACHED_4M is not set | ||
| 265 | # CONFIG_DMA_UNCACHED_2M is not set | 292 | # CONFIG_DMA_UNCACHED_2M is not set |
| 266 | CONFIG_DMA_UNCACHED_1M=y | 293 | CONFIG_DMA_UNCACHED_1M=y |
| 267 | # CONFIG_DMA_UNCACHED_NONE is not set | 294 | # CONFIG_DMA_UNCACHED_NONE is not set |
| @@ -275,7 +302,6 @@ CONFIG_BFIN_DCACHE=y | |||
| 275 | # CONFIG_BFIN_ICACHE_LOCK is not set | 302 | # CONFIG_BFIN_ICACHE_LOCK is not set |
| 276 | CONFIG_BFIN_WB=y | 303 | CONFIG_BFIN_WB=y |
| 277 | # CONFIG_BFIN_WT is not set | 304 | # CONFIG_BFIN_WT is not set |
| 278 | CONFIG_L1_MAX_PIECE=16 | ||
| 279 | # CONFIG_MPU is not set | 305 | # CONFIG_MPU is not set |
| 280 | 306 | ||
| 281 | # | 307 | # |
| @@ -304,36 +330,28 @@ CONFIG_BANK_3=0xFFC2 | |||
| 304 | # | 330 | # |
| 305 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | 331 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) |
| 306 | # | 332 | # |
| 307 | # CONFIG_PCI is not set | ||
| 308 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 333 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 309 | 334 | ||
| 310 | # | 335 | # |
| 311 | # PCCARD (PCMCIA/CardBus) support | ||
| 312 | # | ||
| 313 | |||
| 314 | # | ||
| 315 | # Executable file formats | 336 | # Executable file formats |
| 316 | # | 337 | # |
| 317 | CONFIG_BINFMT_ELF_FDPIC=y | 338 | CONFIG_BINFMT_ELF_FDPIC=y |
| 318 | CONFIG_BINFMT_FLAT=y | 339 | CONFIG_BINFMT_FLAT=y |
| 319 | CONFIG_BINFMT_ZFLAT=y | 340 | CONFIG_BINFMT_ZFLAT=y |
| 320 | CONFIG_BINFMT_SHARED_FLAT=y | 341 | CONFIG_BINFMT_SHARED_FLAT=y |
| 342 | # CONFIG_HAVE_AOUT is not set | ||
| 321 | # CONFIG_BINFMT_MISC is not set | 343 | # CONFIG_BINFMT_MISC is not set |
| 322 | 344 | ||
| 323 | # | 345 | # |
| 324 | # Power management options | 346 | # Power management options |
| 325 | # | 347 | # |
| 326 | # CONFIG_PM is not set | 348 | # CONFIG_PM is not set |
| 327 | # CONFIG_PM_WAKEUP_BY_GPIO is not set | 349 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 328 | 350 | ||
| 329 | # | 351 | # |
| 330 | # CPU Frequency scaling | 352 | # CPU Frequency scaling |
| 331 | # | 353 | # |
| 332 | # CONFIG_CPU_FREQ is not set | 354 | # CONFIG_CPU_FREQ is not set |
| 333 | |||
| 334 | # | ||
| 335 | # Networking | ||
| 336 | # | ||
| 337 | CONFIG_NET=y | 355 | CONFIG_NET=y |
| 338 | 356 | ||
| 339 | # | 357 | # |
| @@ -346,6 +364,7 @@ CONFIG_XFRM=y | |||
| 346 | # CONFIG_XFRM_USER is not set | 364 | # CONFIG_XFRM_USER is not set |
| 347 | # CONFIG_XFRM_SUB_POLICY is not set | 365 | # CONFIG_XFRM_SUB_POLICY is not set |
| 348 | # CONFIG_XFRM_MIGRATE is not set | 366 | # CONFIG_XFRM_MIGRATE is not set |
| 367 | # CONFIG_XFRM_STATISTICS is not set | ||
| 349 | # CONFIG_NET_KEY is not set | 368 | # CONFIG_NET_KEY is not set |
| 350 | CONFIG_INET=y | 369 | CONFIG_INET=y |
| 351 | # CONFIG_IP_MULTICAST is not set | 370 | # CONFIG_IP_MULTICAST is not set |
| @@ -358,7 +377,7 @@ CONFIG_IP_PNP=y | |||
| 358 | # CONFIG_NET_IPIP is not set | 377 | # CONFIG_NET_IPIP is not set |
| 359 | # CONFIG_NET_IPGRE is not set | 378 | # CONFIG_NET_IPGRE is not set |
| 360 | # CONFIG_ARPD is not set | 379 | # CONFIG_ARPD is not set |
| 361 | CONFIG_SYN_COOKIES=y | 380 | # CONFIG_SYN_COOKIES is not set |
| 362 | # CONFIG_INET_AH is not set | 381 | # CONFIG_INET_AH is not set |
| 363 | # CONFIG_INET_ESP is not set | 382 | # CONFIG_INET_ESP is not set |
| 364 | # CONFIG_INET_IPCOMP is not set | 383 | # CONFIG_INET_IPCOMP is not set |
| @@ -367,6 +386,7 @@ CONFIG_SYN_COOKIES=y | |||
| 367 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 386 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
| 368 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 387 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
| 369 | CONFIG_INET_XFRM_MODE_BEET=y | 388 | CONFIG_INET_XFRM_MODE_BEET=y |
| 389 | # CONFIG_INET_LRO is not set | ||
| 370 | CONFIG_INET_DIAG=y | 390 | CONFIG_INET_DIAG=y |
| 371 | CONFIG_INET_TCP_DIAG=y | 391 | CONFIG_INET_TCP_DIAG=y |
| 372 | # CONFIG_TCP_CONG_ADVANCED is not set | 392 | # CONFIG_TCP_CONG_ADVANCED is not set |
| @@ -374,8 +394,6 @@ CONFIG_TCP_CONG_CUBIC=y | |||
| 374 | CONFIG_DEFAULT_TCP_CONG="cubic" | 394 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| 375 | # CONFIG_TCP_MD5SIG is not set | 395 | # CONFIG_TCP_MD5SIG is not set |
| 376 | # CONFIG_IPV6 is not set | 396 | # CONFIG_IPV6 is not set |
| 377 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 378 | # CONFIG_INET6_TUNNEL is not set | ||
| 379 | # CONFIG_NETLABEL is not set | 397 | # CONFIG_NETLABEL is not set |
| 380 | # CONFIG_NETWORK_SECMARK is not set | 398 | # CONFIG_NETWORK_SECMARK is not set |
| 381 | # CONFIG_NETFILTER is not set | 399 | # CONFIG_NETFILTER is not set |
| @@ -384,6 +402,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 384 | # CONFIG_TIPC is not set | 402 | # CONFIG_TIPC is not set |
| 385 | # CONFIG_ATM is not set | 403 | # CONFIG_ATM is not set |
| 386 | # CONFIG_BRIDGE is not set | 404 | # CONFIG_BRIDGE is not set |
| 405 | # CONFIG_NET_DSA is not set | ||
| 387 | # CONFIG_VLAN_8021Q is not set | 406 | # CONFIG_VLAN_8021Q is not set |
| 388 | # CONFIG_DECNET is not set | 407 | # CONFIG_DECNET is not set |
| 389 | # CONFIG_LLC2 is not set | 408 | # CONFIG_LLC2 is not set |
| @@ -393,10 +412,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 393 | # CONFIG_LAPB is not set | 412 | # CONFIG_LAPB is not set |
| 394 | # CONFIG_ECONET is not set | 413 | # CONFIG_ECONET is not set |
| 395 | # CONFIG_WAN_ROUTER is not set | 414 | # CONFIG_WAN_ROUTER is not set |
| 396 | |||
| 397 | # | ||
| 398 | # QoS and/or fair queueing | ||
| 399 | # | ||
| 400 | # CONFIG_NET_SCHED is not set | 415 | # CONFIG_NET_SCHED is not set |
| 401 | 416 | ||
| 402 | # | 417 | # |
| @@ -404,18 +419,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 404 | # | 419 | # |
| 405 | # CONFIG_NET_PKTGEN is not set | 420 | # CONFIG_NET_PKTGEN is not set |
| 406 | # CONFIG_HAMRADIO is not set | 421 | # CONFIG_HAMRADIO is not set |
| 422 | # CONFIG_CAN is not set | ||
| 407 | # CONFIG_IRDA is not set | 423 | # CONFIG_IRDA is not set |
| 408 | # CONFIG_BT is not set | 424 | # CONFIG_BT is not set |
| 409 | # CONFIG_AF_RXRPC is not set | 425 | # CONFIG_AF_RXRPC is not set |
| 410 | 426 | # CONFIG_PHONET is not set | |
| 411 | # | 427 | # CONFIG_WIRELESS is not set |
| 412 | # Wireless | ||
| 413 | # | ||
| 414 | # CONFIG_CFG80211 is not set | ||
| 415 | # CONFIG_WIRELESS_EXT is not set | ||
| 416 | # CONFIG_MAC80211 is not set | ||
| 417 | # CONFIG_IEEE80211 is not set | ||
| 418 | # CONFIG_RFKILL is not set | 428 | # CONFIG_RFKILL is not set |
| 429 | # CONFIG_NET_9P is not set | ||
| 419 | 430 | ||
| 420 | # | 431 | # |
| 421 | # Device Drivers | 432 | # Device Drivers |
| @@ -427,10 +438,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 427 | CONFIG_STANDALONE=y | 438 | CONFIG_STANDALONE=y |
| 428 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 439 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 429 | # CONFIG_SYS_HYPERVISOR is not set | 440 | # CONFIG_SYS_HYPERVISOR is not set |
| 430 | |||
| 431 | # | ||
| 432 | # Connector - unified userspace <-> kernelspace linker | ||
| 433 | # | ||
| 434 | # CONFIG_CONNECTOR is not set | 441 | # CONFIG_CONNECTOR is not set |
| 435 | CONFIG_MTD=y | 442 | CONFIG_MTD=y |
| 436 | # CONFIG_MTD_DEBUG is not set | 443 | # CONFIG_MTD_DEBUG is not set |
| @@ -438,6 +445,7 @@ CONFIG_MTD=y | |||
| 438 | CONFIG_MTD_PARTITIONS=y | 445 | CONFIG_MTD_PARTITIONS=y |
| 439 | # CONFIG_MTD_REDBOOT_PARTS is not set | 446 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| 440 | # CONFIG_MTD_CMDLINE_PARTS is not set | 447 | # CONFIG_MTD_CMDLINE_PARTS is not set |
| 448 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 441 | 449 | ||
| 442 | # | 450 | # |
| 443 | # User Modules And Translation Layers | 451 | # User Modules And Translation Layers |
| @@ -450,12 +458,15 @@ CONFIG_MTD_BLOCK=y | |||
| 450 | # CONFIG_INFTL is not set | 458 | # CONFIG_INFTL is not set |
| 451 | # CONFIG_RFD_FTL is not set | 459 | # CONFIG_RFD_FTL is not set |
| 452 | # CONFIG_SSFDC is not set | 460 | # CONFIG_SSFDC is not set |
| 461 | # CONFIG_MTD_OOPS is not set | ||
| 453 | 462 | ||
| 454 | # | 463 | # |
| 455 | # RAM/ROM/Flash chip drivers | 464 | # RAM/ROM/Flash chip drivers |
| 456 | # | 465 | # |
| 457 | # CONFIG_MTD_CFI is not set | 466 | CONFIG_MTD_CFI=y |
| 458 | # CONFIG_MTD_JEDECPROBE is not set | 467 | # CONFIG_MTD_JEDECPROBE is not set |
| 468 | CONFIG_MTD_GEN_PROBE=y | ||
| 469 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 459 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 470 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
| 460 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 471 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
| 461 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | 472 | CONFIG_MTD_MAP_BANK_WIDTH_4=y |
| @@ -466,6 +477,10 @@ CONFIG_MTD_CFI_I1=y | |||
| 466 | CONFIG_MTD_CFI_I2=y | 477 | CONFIG_MTD_CFI_I2=y |
| 467 | # CONFIG_MTD_CFI_I4 is not set | 478 | # CONFIG_MTD_CFI_I4 is not set |
| 468 | # CONFIG_MTD_CFI_I8 is not set | 479 | # CONFIG_MTD_CFI_I8 is not set |
| 480 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 481 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 482 | # CONFIG_MTD_CFI_STAA is not set | ||
| 483 | CONFIG_MTD_CFI_UTIL=y | ||
| 469 | CONFIG_MTD_RAM=y | 484 | CONFIG_MTD_RAM=y |
| 470 | # CONFIG_MTD_ROM is not set | 485 | # CONFIG_MTD_ROM is not set |
| 471 | # CONFIG_MTD_ABSENT is not set | 486 | # CONFIG_MTD_ABSENT is not set |
| @@ -473,7 +488,8 @@ CONFIG_MTD_RAM=y | |||
| 473 | # | 488 | # |
| 474 | # Mapping drivers for chip access | 489 | # Mapping drivers for chip access |
| 475 | # | 490 | # |
| 476 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 491 | CONFIG_MTD_COMPLEX_MAPPINGS=y |
| 492 | CONFIG_MTD_GPIO_ADDR=y | ||
| 477 | CONFIG_MTD_UCLINUX=y | 493 | CONFIG_MTD_UCLINUX=y |
| 478 | # CONFIG_MTD_PLATRAM is not set | 494 | # CONFIG_MTD_PLATRAM is not set |
| 479 | 495 | ||
| @@ -498,33 +514,23 @@ CONFIG_MTD_UCLINUX=y | |||
| 498 | # UBI - Unsorted block images | 514 | # UBI - Unsorted block images |
| 499 | # | 515 | # |
| 500 | # CONFIG_MTD_UBI is not set | 516 | # CONFIG_MTD_UBI is not set |
| 501 | |||
| 502 | # | ||
| 503 | # Parallel port support | ||
| 504 | # | ||
| 505 | # CONFIG_PARPORT is not set | 517 | # CONFIG_PARPORT is not set |
| 506 | 518 | CONFIG_BLK_DEV=y | |
| 507 | # | ||
| 508 | # Plug and Play support | ||
| 509 | # | ||
| 510 | # CONFIG_PNPACPI is not set | ||
| 511 | |||
| 512 | # | ||
| 513 | # Block devices | ||
| 514 | # | ||
| 515 | # CONFIG_BLK_DEV_COW_COMMON is not set | 519 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 516 | # CONFIG_BLK_DEV_LOOP is not set | 520 | # CONFIG_BLK_DEV_LOOP is not set |
| 517 | # CONFIG_BLK_DEV_NBD is not set | 521 | # CONFIG_BLK_DEV_NBD is not set |
| 518 | CONFIG_BLK_DEV_RAM=y | 522 | CONFIG_BLK_DEV_RAM=y |
| 519 | CONFIG_BLK_DEV_RAM_COUNT=16 | 523 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 520 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 524 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
| 521 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 525 | # CONFIG_BLK_DEV_XIP is not set |
| 522 | # CONFIG_CDROM_PKTCDVD is not set | 526 | # CONFIG_CDROM_PKTCDVD is not set |
| 523 | # CONFIG_ATA_OVER_ETH is not set | 527 | # CONFIG_ATA_OVER_ETH is not set |
| 524 | 528 | # CONFIG_BLK_DEV_HD is not set | |
| 525 | # | 529 | CONFIG_MISC_DEVICES=y |
| 526 | # Misc devices | 530 | # CONFIG_EEPROM_93CX6 is not set |
| 527 | # | 531 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 532 | # CONFIG_C2PORT is not set | ||
| 533 | CONFIG_HAVE_IDE=y | ||
| 528 | # CONFIG_IDE is not set | 534 | # CONFIG_IDE is not set |
| 529 | 535 | ||
| 530 | # | 536 | # |
| @@ -532,22 +538,17 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | |||
| 532 | # | 538 | # |
| 533 | # CONFIG_RAID_ATTRS is not set | 539 | # CONFIG_RAID_ATTRS is not set |
| 534 | # CONFIG_SCSI is not set | 540 | # CONFIG_SCSI is not set |
| 541 | # CONFIG_SCSI_DMA is not set | ||
| 535 | # CONFIG_SCSI_NETLINK is not set | 542 | # CONFIG_SCSI_NETLINK is not set |
| 536 | # CONFIG_ATA is not set | 543 | # CONFIG_ATA is not set |
| 537 | |||
| 538 | # | ||
| 539 | # Multi-device support (RAID and LVM) | ||
| 540 | # | ||
| 541 | # CONFIG_MD is not set | 544 | # CONFIG_MD is not set |
| 542 | |||
| 543 | # | ||
| 544 | # Network device support | ||
| 545 | # | ||
| 546 | CONFIG_NETDEVICES=y | 545 | CONFIG_NETDEVICES=y |
| 547 | # CONFIG_DUMMY is not set | 546 | # CONFIG_DUMMY is not set |
| 548 | # CONFIG_BONDING is not set | 547 | # CONFIG_BONDING is not set |
| 548 | # CONFIG_MACVLAN is not set | ||
| 549 | # CONFIG_EQUALIZER is not set | 549 | # CONFIG_EQUALIZER is not set |
| 550 | # CONFIG_TUN is not set | 550 | # CONFIG_TUN is not set |
| 551 | # CONFIG_VETH is not set | ||
| 551 | CONFIG_PHYLIB=y | 552 | CONFIG_PHYLIB=y |
| 552 | 553 | ||
| 553 | # | 554 | # |
| @@ -561,46 +562,44 @@ CONFIG_PHYLIB=y | |||
| 561 | # CONFIG_VITESSE_PHY is not set | 562 | # CONFIG_VITESSE_PHY is not set |
| 562 | # CONFIG_SMSC_PHY is not set | 563 | # CONFIG_SMSC_PHY is not set |
| 563 | # CONFIG_BROADCOM_PHY is not set | 564 | # CONFIG_BROADCOM_PHY is not set |
| 565 | # CONFIG_ICPLUS_PHY is not set | ||
| 566 | # CONFIG_REALTEK_PHY is not set | ||
| 564 | # CONFIG_FIXED_PHY is not set | 567 | # CONFIG_FIXED_PHY is not set |
| 565 | 568 | # CONFIG_MDIO_BITBANG is not set | |
| 566 | # | ||
| 567 | # Ethernet (10 or 100Mbit) | ||
| 568 | # | ||
| 569 | CONFIG_NET_ETHERNET=y | 569 | CONFIG_NET_ETHERNET=y |
| 570 | CONFIG_MII=y | 570 | CONFIG_MII=y |
| 571 | # CONFIG_SMC91X is not set | ||
| 572 | CONFIG_BFIN_MAC=y | 571 | CONFIG_BFIN_MAC=y |
| 573 | CONFIG_BFIN_MAC_USE_L1=y | 572 | CONFIG_BFIN_MAC_USE_L1=y |
| 574 | CONFIG_BFIN_TX_DESC_NUM=10 | 573 | CONFIG_BFIN_TX_DESC_NUM=10 |
| 575 | CONFIG_BFIN_RX_DESC_NUM=20 | 574 | CONFIG_BFIN_RX_DESC_NUM=20 |
| 576 | # CONFIG_BFIN_MAC_RMII is not set | 575 | # CONFIG_BFIN_MAC_RMII is not set |
| 576 | # CONFIG_SMC91X is not set | ||
| 577 | # CONFIG_SMSC911X is not set | 577 | # CONFIG_SMSC911X is not set |
| 578 | # CONFIG_DM9000 is not set | 578 | # CONFIG_DM9000 is not set |
| 579 | CONFIG_NETDEV_1000=y | 579 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 580 | # CONFIG_AX88180 is not set | 580 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 581 | CONFIG_NETDEV_10000=y | 581 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| 582 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 583 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 584 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 585 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 586 | # CONFIG_B44 is not set | ||
| 587 | # CONFIG_NETDEV_1000 is not set | ||
| 588 | # CONFIG_NETDEV_10000 is not set | ||
| 582 | 589 | ||
| 583 | # | 590 | # |
| 584 | # Wireless LAN | 591 | # Wireless LAN |
| 585 | # | 592 | # |
| 586 | # CONFIG_WLAN_PRE80211 is not set | 593 | # CONFIG_WLAN_PRE80211 is not set |
| 587 | # CONFIG_WLAN_80211 is not set | 594 | # CONFIG_WLAN_80211 is not set |
| 595 | # CONFIG_IWLWIFI_LEDS is not set | ||
| 588 | # CONFIG_WAN is not set | 596 | # CONFIG_WAN is not set |
| 589 | # CONFIG_PPP is not set | 597 | # CONFIG_PPP is not set |
| 590 | # CONFIG_SLIP is not set | 598 | # CONFIG_SLIP is not set |
| 591 | # CONFIG_SHAPER is not set | ||
| 592 | # CONFIG_NETCONSOLE is not set | 599 | # CONFIG_NETCONSOLE is not set |
| 593 | # CONFIG_NETPOLL is not set | 600 | # CONFIG_NETPOLL is not set |
| 594 | # CONFIG_NET_POLL_CONTROLLER is not set | 601 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 595 | |||
| 596 | # | ||
| 597 | # ISDN subsystem | ||
| 598 | # | ||
| 599 | # CONFIG_ISDN is not set | 602 | # CONFIG_ISDN is not set |
| 600 | |||
| 601 | # | ||
| 602 | # Telephony Support | ||
| 603 | # | ||
| 604 | # CONFIG_PHONE is not set | 603 | # CONFIG_PHONE is not set |
| 605 | 604 | ||
| 606 | # | 605 | # |
| @@ -618,15 +617,17 @@ CONFIG_NETDEV_10000=y | |||
| 618 | # Character devices | 617 | # Character devices |
| 619 | # | 618 | # |
| 620 | # CONFIG_AD9960 is not set | 619 | # CONFIG_AD9960 is not set |
| 621 | # CONFIG_SPI_ADC_BF533 is not set | 620 | CONFIG_BFIN_DMA_INTERFACE=m |
| 622 | # CONFIG_BF5xx_PFLAGS is not set | 621 | # CONFIG_BFIN_PPI is not set |
| 623 | # CONFIG_BF5xx_PPIFCD is not set | 622 | # CONFIG_BFIN_PPIFCD is not set |
| 624 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 623 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 625 | # CONFIG_BF5xx_PPI is not set | 624 | # CONFIG_BFIN_SPI_ADC is not set |
| 626 | CONFIG_BFIN_SPORT=y | 625 | CONFIG_BFIN_SPORT=y |
| 627 | # CONFIG_BFIN_TIMER_LATENCY is not set | 626 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 627 | # CONFIG_SIMPLE_GPIO is not set | ||
| 628 | # CONFIG_VT is not set | 628 | # CONFIG_VT is not set |
| 629 | # CONFIG_DEVKMEM is not set | 629 | # CONFIG_DEVKMEM is not set |
| 630 | # CONFIG_BFIN_JTAG_COMM is not set | ||
| 630 | # CONFIG_SERIAL_NONSTANDARD is not set | 631 | # CONFIG_SERIAL_NONSTANDARD is not set |
| 631 | 632 | ||
| 632 | # | 633 | # |
| @@ -655,138 +656,119 @@ CONFIG_UNIX98_PTYS=y | |||
| 655 | # CAN, the car bus and industrial fieldbus | 656 | # CAN, the car bus and industrial fieldbus |
| 656 | # | 657 | # |
| 657 | # CONFIG_CAN4LINUX is not set | 658 | # CONFIG_CAN4LINUX is not set |
| 658 | |||
| 659 | # | ||
| 660 | # IPMI | ||
| 661 | # | ||
| 662 | # CONFIG_IPMI_HANDLER is not set | 659 | # CONFIG_IPMI_HANDLER is not set |
| 663 | # CONFIG_WATCHDOG is not set | ||
| 664 | # CONFIG_HW_RANDOM is not set | 660 | # CONFIG_HW_RANDOM is not set |
| 665 | # CONFIG_GEN_RTC is not set | ||
| 666 | # CONFIG_R3964 is not set | 661 | # CONFIG_R3964 is not set |
| 667 | # CONFIG_RAW_DRIVER is not set | 662 | # CONFIG_RAW_DRIVER is not set |
| 663 | # CONFIG_TCG_TPM is not set | ||
| 664 | # CONFIG_I2C is not set | ||
| 665 | # CONFIG_SPI is not set | ||
| 666 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 667 | CONFIG_GPIOLIB=y | ||
| 668 | CONFIG_GPIO_SYSFS=y | ||
| 668 | 669 | ||
| 669 | # | 670 | # |
| 670 | # TPM devices | 671 | # Memory mapped GPIO expanders: |
| 671 | # | 672 | # |
| 672 | # CONFIG_TCG_TPM is not set | ||
| 673 | # CONFIG_I2C is not set | ||
| 674 | 673 | ||
| 675 | # | 674 | # |
| 676 | # SPI support | 675 | # I2C GPIO expanders: |
| 676 | # | ||
| 677 | |||
| 678 | # | ||
| 679 | # PCI GPIO expanders: | ||
| 677 | # | 680 | # |
| 678 | # CONFIG_SPI is not set | ||
| 679 | # CONFIG_SPI_MASTER is not set | ||
| 680 | 681 | ||
| 681 | # | 682 | # |
| 682 | # Dallas's 1-wire bus | 683 | # SPI GPIO expanders: |
| 683 | # | 684 | # |
| 684 | # CONFIG_W1 is not set | 685 | # CONFIG_W1 is not set |
| 686 | # CONFIG_POWER_SUPPLY is not set | ||
| 685 | CONFIG_HWMON=y | 687 | CONFIG_HWMON=y |
| 686 | # CONFIG_HWMON_VID is not set | 688 | # CONFIG_HWMON_VID is not set |
| 687 | # CONFIG_SENSORS_ABITUGURU is not set | ||
| 688 | # CONFIG_SENSORS_F71805F is not set | 689 | # CONFIG_SENSORS_F71805F is not set |
| 690 | # CONFIG_SENSORS_F71882FG is not set | ||
| 691 | # CONFIG_SENSORS_IT87 is not set | ||
| 692 | # CONFIG_SENSORS_PC87360 is not set | ||
| 689 | # CONFIG_SENSORS_PC87427 is not set | 693 | # CONFIG_SENSORS_PC87427 is not set |
| 690 | # CONFIG_SENSORS_SMSC47M1 is not set | 694 | # CONFIG_SENSORS_SMSC47M1 is not set |
| 691 | # CONFIG_SENSORS_SMSC47B397 is not set | 695 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 692 | # CONFIG_SENSORS_VT1211 is not set | 696 | # CONFIG_SENSORS_VT1211 is not set |
| 693 | # CONFIG_SENSORS_W83627HF is not set | 697 | # CONFIG_SENSORS_W83627HF is not set |
| 698 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 694 | # CONFIG_HWMON_DEBUG_CHIP is not set | 699 | # CONFIG_HWMON_DEBUG_CHIP is not set |
| 700 | # CONFIG_THERMAL is not set | ||
| 701 | # CONFIG_THERMAL_HWMON is not set | ||
| 702 | # CONFIG_WATCHDOG is not set | ||
| 703 | CONFIG_SSB_POSSIBLE=y | ||
| 704 | |||
| 705 | # | ||
| 706 | # Sonics Silicon Backplane | ||
| 707 | # | ||
| 708 | # CONFIG_SSB is not set | ||
| 695 | 709 | ||
| 696 | # | 710 | # |
| 697 | # Multifunction device drivers | 711 | # Multifunction device drivers |
| 698 | # | 712 | # |
| 713 | # CONFIG_MFD_CORE is not set | ||
| 699 | # CONFIG_MFD_SM501 is not set | 714 | # CONFIG_MFD_SM501 is not set |
| 715 | # CONFIG_HTC_PASIC3 is not set | ||
| 716 | # CONFIG_MFD_TMIO is not set | ||
| 717 | # CONFIG_REGULATOR is not set | ||
| 700 | 718 | ||
| 701 | # | 719 | # |
| 702 | # Multimedia devices | 720 | # Multimedia devices |
| 703 | # | 721 | # |
| 722 | |||
| 723 | # | ||
| 724 | # Multimedia core support | ||
| 725 | # | ||
| 704 | # CONFIG_VIDEO_DEV is not set | 726 | # CONFIG_VIDEO_DEV is not set |
| 705 | # CONFIG_DVB_CORE is not set | 727 | # CONFIG_DVB_CORE is not set |
| 706 | # CONFIG_DAB is not set | 728 | # CONFIG_VIDEO_MEDIA is not set |
| 707 | 729 | ||
| 708 | # | 730 | # |
| 709 | # Graphics support | 731 | # Multimedia drivers |
| 710 | # | 732 | # |
| 711 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 733 | # CONFIG_DAB is not set |
| 712 | 734 | ||
| 713 | # | 735 | # |
| 714 | # Display device support | 736 | # Graphics support |
| 715 | # | 737 | # |
| 716 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 717 | # CONFIG_VGASTATE is not set | 738 | # CONFIG_VGASTATE is not set |
| 739 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 718 | # CONFIG_FB is not set | 740 | # CONFIG_FB is not set |
| 741 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 719 | 742 | ||
| 720 | # | 743 | # |
| 721 | # Sound | 744 | # Display device support |
| 722 | # | 745 | # |
| 746 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 723 | # CONFIG_SOUND is not set | 747 | # CONFIG_SOUND is not set |
| 724 | 748 | CONFIG_USB_SUPPORT=y | |
| 725 | # | ||
| 726 | # USB support | ||
| 727 | # | ||
| 728 | CONFIG_USB_ARCH_HAS_HCD=y | 749 | CONFIG_USB_ARCH_HAS_HCD=y |
| 729 | # CONFIG_USB_ARCH_HAS_OHCI is not set | 750 | # CONFIG_USB_ARCH_HAS_OHCI is not set |
| 730 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 751 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
| 731 | # CONFIG_USB is not set | 752 | # CONFIG_USB is not set |
| 753 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 754 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 732 | 755 | ||
| 733 | # | 756 | # |
| 734 | # Enable Host or Gadget support to see Inventra options | 757 | # Enable Host or Gadget support to see Inventra options |
| 735 | # | 758 | # |
| 736 | 759 | ||
| 737 | # | 760 | # |
| 738 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 761 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
| 739 | # | ||
| 740 | |||
| 741 | # | ||
| 742 | # USB Gadget Support | ||
| 743 | # | 762 | # |
| 744 | # CONFIG_USB_GADGET is not set | 763 | # CONFIG_USB_GADGET is not set |
| 745 | # CONFIG_MMC is not set | 764 | # CONFIG_MMC is not set |
| 746 | 765 | # CONFIG_MEMSTICK is not set | |
| 747 | # | ||
| 748 | # LED devices | ||
| 749 | # | ||
| 750 | # CONFIG_NEW_LEDS is not set | 766 | # CONFIG_NEW_LEDS is not set |
| 751 | 767 | # CONFIG_ACCESSIBILITY is not set | |
| 752 | # | ||
| 753 | # LED drivers | ||
| 754 | # | ||
| 755 | |||
| 756 | # | ||
| 757 | # LED Triggers | ||
| 758 | # | ||
| 759 | |||
| 760 | # | ||
| 761 | # InfiniBand support | ||
| 762 | # | ||
| 763 | |||
| 764 | # | ||
| 765 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
| 766 | # | ||
| 767 | |||
| 768 | # | ||
| 769 | # Real Time Clock | ||
| 770 | # | ||
| 771 | # CONFIG_RTC_CLASS is not set | 768 | # CONFIG_RTC_CLASS is not set |
| 772 | 769 | # CONFIG_DMADEVICES is not set | |
| 773 | # | 770 | # CONFIG_UIO is not set |
| 774 | # DMA Engine support | 771 | # CONFIG_STAGING is not set |
| 775 | # | ||
| 776 | # CONFIG_DMA_ENGINE is not set | ||
| 777 | |||
| 778 | # | ||
| 779 | # DMA Clients | ||
| 780 | # | ||
| 781 | |||
| 782 | # | ||
| 783 | # DMA Devices | ||
| 784 | # | ||
| 785 | |||
| 786 | # | ||
| 787 | # PBX support | ||
| 788 | # | ||
| 789 | # CONFIG_PBX is not set | ||
| 790 | 772 | ||
| 791 | # | 773 | # |
| 792 | # File systems | 774 | # File systems |
| @@ -796,20 +778,18 @@ CONFIG_EXT2_FS_XATTR=y | |||
| 796 | # CONFIG_EXT2_FS_POSIX_ACL is not set | 778 | # CONFIG_EXT2_FS_POSIX_ACL is not set |
| 797 | # CONFIG_EXT2_FS_SECURITY is not set | 779 | # CONFIG_EXT2_FS_SECURITY is not set |
| 798 | # CONFIG_EXT3_FS is not set | 780 | # CONFIG_EXT3_FS is not set |
| 799 | # CONFIG_EXT4DEV_FS is not set | 781 | # CONFIG_EXT4_FS is not set |
| 800 | CONFIG_FS_MBCACHE=y | 782 | CONFIG_FS_MBCACHE=y |
| 801 | # CONFIG_REISERFS_FS is not set | 783 | # CONFIG_REISERFS_FS is not set |
| 802 | # CONFIG_JFS_FS is not set | 784 | # CONFIG_JFS_FS is not set |
| 803 | # CONFIG_FS_POSIX_ACL is not set | 785 | # CONFIG_FS_POSIX_ACL is not set |
| 786 | CONFIG_FILE_LOCKING=y | ||
| 804 | # CONFIG_XFS_FS is not set | 787 | # CONFIG_XFS_FS is not set |
| 805 | # CONFIG_GFS2_FS is not set | ||
| 806 | # CONFIG_OCFS2_FS is not set | 788 | # CONFIG_OCFS2_FS is not set |
| 807 | # CONFIG_MINIX_FS is not set | 789 | # CONFIG_DNOTIFY is not set |
| 808 | # CONFIG_ROMFS_FS is not set | ||
| 809 | CONFIG_INOTIFY=y | 790 | CONFIG_INOTIFY=y |
| 810 | CONFIG_INOTIFY_USER=y | 791 | CONFIG_INOTIFY_USER=y |
| 811 | # CONFIG_QUOTA is not set | 792 | # CONFIG_QUOTA is not set |
| 812 | # CONFIG_DNOTIFY is not set | ||
| 813 | # CONFIG_AUTOFS_FS is not set | 793 | # CONFIG_AUTOFS_FS is not set |
| 814 | # CONFIG_AUTOFS4_FS is not set | 794 | # CONFIG_AUTOFS4_FS is not set |
| 815 | # CONFIG_FUSE_FS is not set | 795 | # CONFIG_FUSE_FS is not set |
| @@ -835,7 +815,6 @@ CONFIG_PROC_SYSCTL=y | |||
| 835 | CONFIG_SYSFS=y | 815 | CONFIG_SYSFS=y |
| 836 | # CONFIG_TMPFS is not set | 816 | # CONFIG_TMPFS is not set |
| 837 | # CONFIG_HUGETLB_PAGE is not set | 817 | # CONFIG_HUGETLB_PAGE is not set |
| 838 | CONFIG_RAMFS=y | ||
| 839 | # CONFIG_CONFIGFS_FS is not set | 818 | # CONFIG_CONFIGFS_FS is not set |
| 840 | 819 | ||
| 841 | # | 820 | # |
| @@ -848,60 +827,53 @@ CONFIG_RAMFS=y | |||
| 848 | # CONFIG_BEFS_FS is not set | 827 | # CONFIG_BEFS_FS is not set |
| 849 | # CONFIG_BFS_FS is not set | 828 | # CONFIG_BFS_FS is not set |
| 850 | # CONFIG_EFS_FS is not set | 829 | # CONFIG_EFS_FS is not set |
| 851 | # CONFIG_YAFFS_FS is not set | ||
| 852 | # CONFIG_JFFS2_FS is not set | 830 | # CONFIG_JFFS2_FS is not set |
| 831 | # CONFIG_YAFFS_FS is not set | ||
| 853 | # CONFIG_CRAMFS is not set | 832 | # CONFIG_CRAMFS is not set |
| 854 | # CONFIG_VXFS_FS is not set | 833 | # CONFIG_VXFS_FS is not set |
| 834 | # CONFIG_MINIX_FS is not set | ||
| 835 | # CONFIG_OMFS_FS is not set | ||
| 855 | # CONFIG_HPFS_FS is not set | 836 | # CONFIG_HPFS_FS is not set |
| 856 | # CONFIG_QNX4FS_FS is not set | 837 | # CONFIG_QNX4FS_FS is not set |
| 838 | # CONFIG_ROMFS_FS is not set | ||
| 857 | # CONFIG_SYSV_FS is not set | 839 | # CONFIG_SYSV_FS is not set |
| 858 | # CONFIG_UFS_FS is not set | 840 | # CONFIG_UFS_FS is not set |
| 859 | 841 | # CONFIG_NETWORK_FILESYSTEMS is not set | |
| 860 | # | ||
| 861 | # Network File Systems | ||
| 862 | # | ||
| 863 | # CONFIG_NFS_FS is not set | ||
| 864 | # CONFIG_NFSD is not set | ||
| 865 | # CONFIG_SMB_FS is not set | ||
| 866 | # CONFIG_CIFS is not set | ||
| 867 | # CONFIG_NCP_FS is not set | ||
| 868 | # CONFIG_CODA_FS is not set | ||
| 869 | # CONFIG_AFS_FS is not set | ||
| 870 | # CONFIG_9P_FS is not set | ||
| 871 | 842 | ||
| 872 | # | 843 | # |
| 873 | # Partition Types | 844 | # Partition Types |
| 874 | # | 845 | # |
| 875 | # CONFIG_PARTITION_ADVANCED is not set | 846 | # CONFIG_PARTITION_ADVANCED is not set |
| 876 | CONFIG_MSDOS_PARTITION=y | 847 | CONFIG_MSDOS_PARTITION=y |
| 877 | |||
| 878 | # | ||
| 879 | # Native Language Support | ||
| 880 | # | ||
| 881 | # CONFIG_NLS is not set | 848 | # CONFIG_NLS is not set |
| 882 | |||
| 883 | # | ||
| 884 | # Distributed Lock Manager | ||
| 885 | # | ||
| 886 | # CONFIG_DLM is not set | 849 | # CONFIG_DLM is not set |
| 887 | 850 | ||
| 888 | # | 851 | # |
| 889 | # Profiling support | ||
| 890 | # | ||
| 891 | # CONFIG_PROFILING is not set | ||
| 892 | |||
| 893 | # | ||
| 894 | # Kernel hacking | 852 | # Kernel hacking |
| 895 | # | 853 | # |
| 896 | # CONFIG_PRINTK_TIME is not set | 854 | # CONFIG_PRINTK_TIME is not set |
| 855 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 897 | CONFIG_ENABLE_MUST_CHECK=y | 856 | CONFIG_ENABLE_MUST_CHECK=y |
| 857 | CONFIG_FRAME_WARN=1024 | ||
| 898 | # CONFIG_MAGIC_SYSRQ is not set | 858 | # CONFIG_MAGIC_SYSRQ is not set |
| 899 | # CONFIG_UNUSED_SYMBOLS is not set | 859 | # CONFIG_UNUSED_SYMBOLS is not set |
| 900 | CONFIG_DEBUG_FS=y | 860 | CONFIG_DEBUG_FS=y |
| 901 | # CONFIG_HEADERS_CHECK is not set | 861 | # CONFIG_HEADERS_CHECK is not set |
| 862 | CONFIG_DEBUG_SECTION_MISMATCH=y | ||
| 902 | # CONFIG_DEBUG_KERNEL is not set | 863 | # CONFIG_DEBUG_KERNEL is not set |
| 903 | # CONFIG_DEBUG_BUGVERBOSE is not set | 864 | # CONFIG_DEBUG_BUGVERBOSE is not set |
| 865 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 866 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 867 | |||
| 868 | # | ||
| 869 | # Tracers | ||
| 870 | # | ||
| 871 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
| 872 | # CONFIG_SAMPLES is not set | ||
| 873 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 874 | CONFIG_DEBUG_VERBOSE=y | ||
| 904 | CONFIG_DEBUG_MMRS=y | 875 | CONFIG_DEBUG_MMRS=y |
| 876 | # CONFIG_DEBUG_DOUBLEFAULT is not set | ||
| 905 | CONFIG_DEBUG_HUNT_FOR_ZERO=y | 877 | CONFIG_DEBUG_HUNT_FOR_ZERO=y |
| 906 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y | 878 | CONFIG_DEBUG_BFIN_HWTRACE_ON=y |
| 907 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y | 879 | CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y |
| @@ -919,13 +891,95 @@ CONFIG_ACCESS_CHECK=y | |||
| 919 | # | 891 | # |
| 920 | # CONFIG_KEYS is not set | 892 | # CONFIG_KEYS is not set |
| 921 | CONFIG_SECURITY=y | 893 | CONFIG_SECURITY=y |
| 894 | # CONFIG_SECURITYFS is not set | ||
| 922 | # CONFIG_SECURITY_NETWORK is not set | 895 | # CONFIG_SECURITY_NETWORK is not set |
| 923 | CONFIG_SECURITY_CAPABILITIES=y | 896 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 897 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 | ||
| 898 | CONFIG_CRYPTO=y | ||
| 899 | |||
| 900 | # | ||
| 901 | # Crypto core or helper | ||
| 902 | # | ||
| 903 | # CONFIG_CRYPTO_FIPS is not set | ||
| 904 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 905 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 906 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 907 | # CONFIG_CRYPTO_NULL is not set | ||
| 908 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 909 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 910 | # CONFIG_CRYPTO_TEST is not set | ||
| 911 | |||
| 912 | # | ||
| 913 | # Authenticated Encryption with Associated Data | ||
| 914 | # | ||
| 915 | # CONFIG_CRYPTO_CCM is not set | ||
| 916 | # CONFIG_CRYPTO_GCM is not set | ||
| 917 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 918 | |||
| 919 | # | ||
| 920 | # Block modes | ||
| 921 | # | ||
| 922 | # CONFIG_CRYPTO_CBC is not set | ||
| 923 | # CONFIG_CRYPTO_CTR is not set | ||
| 924 | # CONFIG_CRYPTO_CTS is not set | ||
| 925 | # CONFIG_CRYPTO_ECB is not set | ||
| 926 | # CONFIG_CRYPTO_LRW is not set | ||
| 927 | # CONFIG_CRYPTO_PCBC is not set | ||
| 928 | # CONFIG_CRYPTO_XTS is not set | ||
| 929 | |||
| 930 | # | ||
| 931 | # Hash modes | ||
| 932 | # | ||
| 933 | # CONFIG_CRYPTO_HMAC is not set | ||
| 934 | # CONFIG_CRYPTO_XCBC is not set | ||
| 935 | |||
| 936 | # | ||
| 937 | # Digest | ||
| 938 | # | ||
| 939 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 940 | # CONFIG_CRYPTO_MD4 is not set | ||
| 941 | # CONFIG_CRYPTO_MD5 is not set | ||
| 942 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 943 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 944 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 945 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 946 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 947 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 948 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 949 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 950 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 951 | # CONFIG_CRYPTO_WP512 is not set | ||
| 952 | |||
| 953 | # | ||
| 954 | # Ciphers | ||
| 955 | # | ||
| 956 | # CONFIG_CRYPTO_AES is not set | ||
| 957 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 958 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 959 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 960 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 961 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 962 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 963 | # CONFIG_CRYPTO_DES is not set | ||
| 964 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 965 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 966 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 967 | # CONFIG_CRYPTO_SEED is not set | ||
| 968 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 969 | # CONFIG_CRYPTO_TEA is not set | ||
| 970 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 971 | |||
| 972 | # | ||
| 973 | # Compression | ||
| 974 | # | ||
| 975 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 976 | # CONFIG_CRYPTO_LZO is not set | ||
| 924 | 977 | ||
| 925 | # | 978 | # |
| 926 | # Cryptographic options | 979 | # Random Number Generation |
| 927 | # | 980 | # |
| 928 | # CONFIG_CRYPTO is not set | 981 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| 982 | CONFIG_CRYPTO_HW=y | ||
| 929 | 983 | ||
| 930 | # | 984 | # |
| 931 | # Library routines | 985 | # Library routines |
| @@ -933,11 +987,12 @@ CONFIG_SECURITY_CAPABILITIES=y | |||
| 933 | CONFIG_BITREVERSE=y | 987 | CONFIG_BITREVERSE=y |
| 934 | CONFIG_CRC_CCITT=m | 988 | CONFIG_CRC_CCITT=m |
| 935 | # CONFIG_CRC16 is not set | 989 | # CONFIG_CRC16 is not set |
| 990 | # CONFIG_CRC_T10DIF is not set | ||
| 936 | # CONFIG_CRC_ITU_T is not set | 991 | # CONFIG_CRC_ITU_T is not set |
| 937 | CONFIG_CRC32=y | 992 | CONFIG_CRC32=y |
| 993 | # CONFIG_CRC7 is not set | ||
| 938 | # CONFIG_LIBCRC32C is not set | 994 | # CONFIG_LIBCRC32C is not set |
| 939 | CONFIG_ZLIB_INFLATE=y | 995 | CONFIG_ZLIB_INFLATE=y |
| 940 | CONFIG_PLIST=y | ||
| 941 | CONFIG_HAS_IOMEM=y | 996 | CONFIG_HAS_IOMEM=y |
| 942 | CONFIG_HAS_IOPORT=y | 997 | CONFIG_HAS_IOPORT=y |
| 943 | CONFIG_HAS_DMA=y | 998 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig index 569523c1c034..80211303f6b9 100644 --- a/arch/blackfin/configs/CM-BF537U_defconfig +++ b/arch/blackfin/configs/CM-BF537U_defconfig | |||
| @@ -49,7 +49,7 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 49 | # CONFIG_SYSCTL is not set | 49 | # CONFIG_SYSCTL is not set |
| 50 | CONFIG_EMBEDDED=y | 50 | CONFIG_EMBEDDED=y |
| 51 | # CONFIG_UID16 is not set | 51 | # CONFIG_UID16 is not set |
| 52 | CONFIG_SYSCTL_SYSCALL=y | 52 | # CONFIG_SYSCTL_SYSCALL is not set |
| 53 | CONFIG_KALLSYMS=y | 53 | CONFIG_KALLSYMS=y |
| 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 55 | # CONFIG_HOTPLUG is not set | 55 | # CONFIG_HOTPLUG is not set |
| @@ -355,7 +355,7 @@ CONFIG_IP_FIB_HASH=y | |||
| 355 | # CONFIG_NET_IPIP is not set | 355 | # CONFIG_NET_IPIP is not set |
| 356 | # CONFIG_NET_IPGRE is not set | 356 | # CONFIG_NET_IPGRE is not set |
| 357 | # CONFIG_ARPD is not set | 357 | # CONFIG_ARPD is not set |
| 358 | CONFIG_SYN_COOKIES=y | 358 | # CONFIG_SYN_COOKIES is not set |
| 359 | # CONFIG_INET_AH is not set | 359 | # CONFIG_INET_AH is not set |
| 360 | # CONFIG_INET_ESP is not set | 360 | # CONFIG_INET_ESP is not set |
| 361 | # CONFIG_INET_IPCOMP is not set | 361 | # CONFIG_INET_IPCOMP is not set |
| @@ -556,9 +556,9 @@ CONFIG_SMC91X=y | |||
| 556 | # CONFIG_BFIN_MAC is not set | 556 | # CONFIG_BFIN_MAC is not set |
| 557 | # CONFIG_SMSC911X is not set | 557 | # CONFIG_SMSC911X is not set |
| 558 | # CONFIG_DM9000 is not set | 558 | # CONFIG_DM9000 is not set |
| 559 | CONFIG_NETDEV_1000=y | 559 | # CONFIG_NETDEV_1000 is not set |
| 560 | # CONFIG_AX88180 is not set | 560 | # CONFIG_AX88180 is not set |
| 561 | CONFIG_NETDEV_10000=y | 561 | # CONFIG_NETDEV_10000 is not set |
| 562 | 562 | ||
| 563 | # | 563 | # |
| 564 | # Wireless LAN | 564 | # Wireless LAN |
| @@ -652,6 +652,10 @@ CONFIG_UNIX98_PTYS=y | |||
| 652 | # CONFIG_TCG_TPM is not set | 652 | # CONFIG_TCG_TPM is not set |
| 653 | # CONFIG_I2C is not set | 653 | # CONFIG_I2C is not set |
| 654 | 654 | ||
| 655 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 656 | CONFIG_GPIOLIB=y | ||
| 657 | CONFIG_GPIO_SYSFS=y | ||
| 658 | |||
| 655 | # | 659 | # |
| 656 | # SPI support | 660 | # SPI support |
| 657 | # | 661 | # |
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig index 035b635e599c..dd815f0d1517 100644 --- a/arch/blackfin/configs/CM-BF548_defconfig +++ b/arch/blackfin/configs/CM-BF548_defconfig | |||
| @@ -49,7 +49,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 49 | # CONFIG_SYSCTL is not set | 49 | # CONFIG_SYSCTL is not set |
| 50 | CONFIG_EMBEDDED=y | 50 | CONFIG_EMBEDDED=y |
| 51 | CONFIG_UID16=y | 51 | CONFIG_UID16=y |
| 52 | CONFIG_SYSCTL_SYSCALL=y | 52 | # CONFIG_SYSCTL_SYSCALL is not set |
| 53 | CONFIG_KALLSYMS=y | 53 | CONFIG_KALLSYMS=y |
| 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 55 | CONFIG_HOTPLUG=y | 55 | CONFIG_HOTPLUG=y |
| @@ -125,9 +125,9 @@ CONFIG_PREEMPT_VOLUNTARY=y | |||
| 125 | CONFIG_BF548=y | 125 | CONFIG_BF548=y |
| 126 | # CONFIG_BF549 is not set | 126 | # CONFIG_BF549 is not set |
| 127 | # CONFIG_BF561 is not set | 127 | # CONFIG_BF561 is not set |
| 128 | CONFIG_BF_REV_0_0=y | 128 | # CONFIG_BF_REV_0_0 is not set |
| 129 | # CONFIG_BF_REV_0_1 is not set | 129 | # CONFIG_BF_REV_0_1 is not set |
| 130 | # CONFIG_BF_REV_0_2 is not set | 130 | CONFIG_BF_REV_0_2=y |
| 131 | # CONFIG_BF_REV_0_3 is not set | 131 | # CONFIG_BF_REV_0_3 is not set |
| 132 | # CONFIG_BF_REV_0_4 is not set | 132 | # CONFIG_BF_REV_0_4 is not set |
| 133 | # CONFIG_BF_REV_0_5 is not set | 133 | # CONFIG_BF_REV_0_5 is not set |
| @@ -422,7 +422,7 @@ CONFIG_IP_PNP=y | |||
| 422 | # CONFIG_NET_IPIP is not set | 422 | # CONFIG_NET_IPIP is not set |
| 423 | # CONFIG_NET_IPGRE is not set | 423 | # CONFIG_NET_IPGRE is not set |
| 424 | # CONFIG_ARPD is not set | 424 | # CONFIG_ARPD is not set |
| 425 | CONFIG_SYN_COOKIES=y | 425 | # CONFIG_SYN_COOKIES is not set |
| 426 | # CONFIG_INET_AH is not set | 426 | # CONFIG_INET_AH is not set |
| 427 | # CONFIG_INET_ESP is not set | 427 | # CONFIG_INET_ESP is not set |
| 428 | # CONFIG_INET_IPCOMP is not set | 428 | # CONFIG_INET_IPCOMP is not set |
| @@ -811,6 +811,10 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 | |||
| 811 | # CONFIG_I2C_DEBUG_BUS is not set | 811 | # CONFIG_I2C_DEBUG_BUS is not set |
| 812 | # CONFIG_I2C_DEBUG_CHIP is not set | 812 | # CONFIG_I2C_DEBUG_CHIP is not set |
| 813 | 813 | ||
| 814 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 815 | CONFIG_GPIOLIB=y | ||
| 816 | CONFIG_GPIO_SYSFS=y | ||
| 817 | |||
| 814 | # | 818 | # |
| 815 | # SPI support | 819 | # SPI support |
| 816 | # | 820 | # |
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig index 7015e42ccce5..16c198bd40c5 100644 --- a/arch/blackfin/configs/CM-BF561_defconfig +++ b/arch/blackfin/configs/CM-BF561_defconfig | |||
| @@ -49,7 +49,7 @@ CONFIG_FAIR_USER_SCHED=y | |||
| 49 | # CONFIG_SYSCTL is not set | 49 | # CONFIG_SYSCTL is not set |
| 50 | CONFIG_EMBEDDED=y | 50 | CONFIG_EMBEDDED=y |
| 51 | # CONFIG_UID16 is not set | 51 | # CONFIG_UID16 is not set |
| 52 | CONFIG_SYSCTL_SYSCALL=y | 52 | # CONFIG_SYSCTL_SYSCALL is not set |
| 53 | CONFIG_KALLSYMS=y | 53 | CONFIG_KALLSYMS=y |
| 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 55 | # CONFIG_HOTPLUG is not set | 55 | # CONFIG_HOTPLUG is not set |
| @@ -389,7 +389,7 @@ CONFIG_IP_FIB_HASH=y | |||
| 389 | # CONFIG_NET_IPIP is not set | 389 | # CONFIG_NET_IPIP is not set |
| 390 | # CONFIG_NET_IPGRE is not set | 390 | # CONFIG_NET_IPGRE is not set |
| 391 | # CONFIG_ARPD is not set | 391 | # CONFIG_ARPD is not set |
| 392 | CONFIG_SYN_COOKIES=y | 392 | # CONFIG_SYN_COOKIES is not set |
| 393 | # CONFIG_INET_AH is not set | 393 | # CONFIG_INET_AH is not set |
| 394 | # CONFIG_INET_ESP is not set | 394 | # CONFIG_INET_ESP is not set |
| 395 | # CONFIG_INET_IPCOMP is not set | 395 | # CONFIG_INET_IPCOMP is not set |
| @@ -569,9 +569,9 @@ CONFIG_SMC91X=y | |||
| 569 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 569 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| 570 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 570 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
| 571 | # CONFIG_B44 is not set | 571 | # CONFIG_B44 is not set |
| 572 | CONFIG_NETDEV_1000=y | 572 | # CONFIG_NETDEV_1000 is not set |
| 573 | # CONFIG_AX88180 is not set | 573 | # CONFIG_AX88180 is not set |
| 574 | CONFIG_NETDEV_10000=y | 574 | # CONFIG_NETDEV_10000 is not set |
| 575 | 575 | ||
| 576 | # | 576 | # |
| 577 | # Wireless LAN | 577 | # Wireless LAN |
| @@ -646,6 +646,10 @@ CONFIG_UNIX98_PTYS=y | |||
| 646 | # CONFIG_TCG_TPM is not set | 646 | # CONFIG_TCG_TPM is not set |
| 647 | # CONFIG_I2C is not set | 647 | # CONFIG_I2C is not set |
| 648 | 648 | ||
| 649 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 650 | CONFIG_GPIOLIB=y | ||
| 651 | CONFIG_GPIO_SYSFS=y | ||
| 652 | |||
| 649 | # | 653 | # |
| 650 | # SPI support | 654 | # SPI support |
| 651 | # | 655 | # |
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig index dfc8e1ddd77a..6b4c1a982383 100644 --- a/arch/blackfin/configs/H8606_defconfig +++ b/arch/blackfin/configs/H8606_defconfig | |||
| @@ -48,7 +48,7 @@ CONFIG_SYSFS_DEPRECATED=y | |||
| 48 | # CONFIG_SYSCTL is not set | 48 | # CONFIG_SYSCTL is not set |
| 49 | CONFIG_EMBEDDED=y | 49 | CONFIG_EMBEDDED=y |
| 50 | CONFIG_UID16=y | 50 | CONFIG_UID16=y |
| 51 | CONFIG_SYSCTL_SYSCALL=y | 51 | # CONFIG_SYSCTL_SYSCALL is not set |
| 52 | CONFIG_KALLSYMS=y | 52 | CONFIG_KALLSYMS=y |
| 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 53 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 54 | CONFIG_HOTPLUG=y | 54 | CONFIG_HOTPLUG=y |
| @@ -347,7 +347,7 @@ CONFIG_IP_PNP=y | |||
| 347 | # CONFIG_NET_IPIP is not set | 347 | # CONFIG_NET_IPIP is not set |
| 348 | # CONFIG_NET_IPGRE is not set | 348 | # CONFIG_NET_IPGRE is not set |
| 349 | # CONFIG_ARPD is not set | 349 | # CONFIG_ARPD is not set |
| 350 | CONFIG_SYN_COOKIES=y | 350 | # CONFIG_SYN_COOKIES is not set |
| 351 | # CONFIG_INET_AH is not set | 351 | # CONFIG_INET_AH is not set |
| 352 | # CONFIG_INET_ESP is not set | 352 | # CONFIG_INET_ESP is not set |
| 353 | # CONFIG_INET_IPCOMP is not set | 353 | # CONFIG_INET_IPCOMP is not set |
| @@ -594,8 +594,8 @@ CONFIG_MII=y | |||
| 594 | # CONFIG_SMC91X is not set | 594 | # CONFIG_SMC91X is not set |
| 595 | # CONFIG_SMSC911X is not set | 595 | # CONFIG_SMSC911X is not set |
| 596 | CONFIG_DM9000=y | 596 | CONFIG_DM9000=y |
| 597 | CONFIG_NETDEV_1000=y | 597 | # CONFIG_NETDEV_1000 is not set |
| 598 | CONFIG_NETDEV_10000=y | 598 | # CONFIG_NETDEV_10000 is not set |
| 599 | # CONFIG_AX88180 is not set | 599 | # CONFIG_AX88180 is not set |
| 600 | 600 | ||
| 601 | # | 601 | # |
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig index 95a5f91aebaa..1ec9ae2e964b 100644 --- a/arch/blackfin/configs/IP0X_defconfig +++ b/arch/blackfin/configs/IP0X_defconfig | |||
| @@ -49,7 +49,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 49 | # CONFIG_SYSCTL is not set | 49 | # CONFIG_SYSCTL is not set |
| 50 | CONFIG_EMBEDDED=y | 50 | CONFIG_EMBEDDED=y |
| 51 | CONFIG_UID16=y | 51 | CONFIG_UID16=y |
| 52 | CONFIG_SYSCTL_SYSCALL=y | 52 | # CONFIG_SYSCTL_SYSCALL is not set |
| 53 | CONFIG_KALLSYMS=y | 53 | CONFIG_KALLSYMS=y |
| 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 54 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 55 | # CONFIG_HOTPLUG is not set | 55 | # CONFIG_HOTPLUG is not set |
| @@ -355,7 +355,7 @@ CONFIG_IP_PNP=y | |||
| 355 | # CONFIG_NET_IPIP is not set | 355 | # CONFIG_NET_IPIP is not set |
| 356 | # CONFIG_NET_IPGRE is not set | 356 | # CONFIG_NET_IPGRE is not set |
| 357 | # CONFIG_ARPD is not set | 357 | # CONFIG_ARPD is not set |
| 358 | CONFIG_SYN_COOKIES=y | 358 | # CONFIG_SYN_COOKIES is not set |
| 359 | # CONFIG_INET_AH is not set | 359 | # CONFIG_INET_AH is not set |
| 360 | # CONFIG_INET_ESP is not set | 360 | # CONFIG_INET_ESP is not set |
| 361 | # CONFIG_INET_IPCOMP is not set | 361 | # CONFIG_INET_IPCOMP is not set |
| @@ -672,9 +672,9 @@ CONFIG_MII=y | |||
| 672 | # CONFIG_SMC91X is not set | 672 | # CONFIG_SMC91X is not set |
| 673 | # CONFIG_SMSC911X is not set | 673 | # CONFIG_SMSC911X is not set |
| 674 | CONFIG_DM9000=y | 674 | CONFIG_DM9000=y |
| 675 | CONFIG_NETDEV_1000=y | 675 | # CONFIG_NETDEV_1000 is not set |
| 676 | # CONFIG_AX88180 is not set | 676 | # CONFIG_AX88180 is not set |
| 677 | CONFIG_NETDEV_10000=y | 677 | # CONFIG_NETDEV_10000 is not set |
| 678 | 678 | ||
| 679 | # | 679 | # |
| 680 | # Wireless LAN | 680 | # Wireless LAN |
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig index 78e24080e7f1..09701f907e9b 100644 --- a/arch/blackfin/configs/PNAV-10_defconfig +++ b/arch/blackfin/configs/PNAV-10_defconfig | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.28.7 | 3 | # Linux kernel version: 2.6.28.10 |
| 4 | # | 4 | # |
| 5 | # CONFIG_MMU is not set | 5 | # CONFIG_MMU is not set |
| 6 | # CONFIG_FPU is not set | 6 | # CONFIG_FPU is not set |
| @@ -40,26 +40,26 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 40 | # CONFIG_NAMESPACES is not set | 40 | # CONFIG_NAMESPACES is not set |
| 41 | # CONFIG_BLK_DEV_INITRD is not set | 41 | # CONFIG_BLK_DEV_INITRD is not set |
| 42 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 42 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
| 43 | # CONFIG_SYSCTL is not set | 43 | CONFIG_SYSCTL=y |
| 44 | CONFIG_ANON_INODES=y | ||
| 44 | CONFIG_EMBEDDED=y | 45 | CONFIG_EMBEDDED=y |
| 45 | CONFIG_UID16=y | 46 | CONFIG_UID16=y |
| 46 | CONFIG_SYSCTL_SYSCALL=y | 47 | # CONFIG_SYSCTL_SYSCALL is not set |
| 47 | CONFIG_KALLSYMS=y | 48 | CONFIG_KALLSYMS=y |
| 48 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 49 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 49 | CONFIG_HOTPLUG=y | 50 | CONFIG_HOTPLUG=y |
| 50 | CONFIG_PRINTK=y | 51 | CONFIG_PRINTK=y |
| 51 | CONFIG_BUG=y | 52 | CONFIG_BUG=y |
| 52 | # CONFIG_ELF_CORE is not set | 53 | # CONFIG_ELF_CORE is not set |
| 53 | CONFIG_COMPAT_BRK=y | ||
| 54 | CONFIG_BASE_FULL=y | 54 | CONFIG_BASE_FULL=y |
| 55 | # CONFIG_FUTEX is not set | 55 | # CONFIG_FUTEX is not set |
| 56 | CONFIG_ANON_INODES=y | ||
| 57 | CONFIG_EPOLL=y | 56 | CONFIG_EPOLL=y |
| 58 | CONFIG_SIGNALFD=y | 57 | CONFIG_SIGNALFD=y |
| 59 | CONFIG_TIMERFD=y | 58 | CONFIG_TIMERFD=y |
| 60 | CONFIG_EVENTFD=y | 59 | CONFIG_EVENTFD=y |
| 61 | # CONFIG_AIO is not set | 60 | # CONFIG_AIO is not set |
| 62 | CONFIG_VM_EVENT_COUNTERS=y | 61 | CONFIG_VM_EVENT_COUNTERS=y |
| 62 | CONFIG_COMPAT_BRK=y | ||
| 63 | CONFIG_SLAB=y | 63 | CONFIG_SLAB=y |
| 64 | # CONFIG_SLUB is not set | 64 | # CONFIG_SLUB is not set |
| 65 | # CONFIG_SLOB is not set | 65 | # CONFIG_SLOB is not set |
| @@ -68,7 +68,6 @@ CONFIG_SLAB=y | |||
| 68 | CONFIG_HAVE_OPROFILE=y | 68 | CONFIG_HAVE_OPROFILE=y |
| 69 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 69 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
| 70 | CONFIG_SLABINFO=y | 70 | CONFIG_SLABINFO=y |
| 71 | CONFIG_RT_MUTEXES=y | ||
| 72 | CONFIG_TINY_SHMEM=y | 71 | CONFIG_TINY_SHMEM=y |
| 73 | CONFIG_BASE_SMALL=0 | 72 | CONFIG_BASE_SMALL=0 |
| 74 | CONFIG_MODULES=y | 73 | CONFIG_MODULES=y |
| @@ -229,7 +228,10 @@ CONFIG_HZ=250 | |||
| 229 | # CONFIG_SCHED_HRTICK is not set | 228 | # CONFIG_SCHED_HRTICK is not set |
| 230 | CONFIG_GENERIC_TIME=y | 229 | CONFIG_GENERIC_TIME=y |
| 231 | CONFIG_GENERIC_CLOCKEVENTS=y | 230 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 231 | # CONFIG_TICKSOURCE_GPTMR0 is not set | ||
| 232 | CONFIG_TICKSOURCE_CORETMR=y | ||
| 232 | # CONFIG_CYCLES_CLOCKSOURCE is not set | 233 | # CONFIG_CYCLES_CLOCKSOURCE is not set |
| 234 | # CONFIG_GPTMR0_CLOCKSOURCE is not set | ||
| 233 | # CONFIG_NO_HZ is not set | 235 | # CONFIG_NO_HZ is not set |
| 234 | # CONFIG_HIGH_RES_TIMERS is not set | 236 | # CONFIG_HIGH_RES_TIMERS is not set |
| 235 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 237 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| @@ -374,7 +376,7 @@ CONFIG_IP_PNP=y | |||
| 374 | # CONFIG_NET_IPIP is not set | 376 | # CONFIG_NET_IPIP is not set |
| 375 | # CONFIG_NET_IPGRE is not set | 377 | # CONFIG_NET_IPGRE is not set |
| 376 | # CONFIG_ARPD is not set | 378 | # CONFIG_ARPD is not set |
| 377 | CONFIG_SYN_COOKIES=y | 379 | # CONFIG_SYN_COOKIES is not set |
| 378 | # CONFIG_INET_AH is not set | 380 | # CONFIG_INET_AH is not set |
| 379 | # CONFIG_INET_ESP is not set | 381 | # CONFIG_INET_ESP is not set |
| 380 | # CONFIG_INET_IPCOMP is not set | 382 | # CONFIG_INET_IPCOMP is not set |
| @@ -598,9 +600,8 @@ CONFIG_BFIN_MAC_RMII=y | |||
| 598 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 600 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 599 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 601 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 600 | # CONFIG_B44 is not set | 602 | # CONFIG_B44 is not set |
| 601 | CONFIG_NETDEV_1000=y | 603 | # CONFIG_NETDEV_1000 is not set |
| 602 | # CONFIG_AX88180 is not set | 604 | # CONFIG_NETDEV_10000 is not set |
| 603 | CONFIG_NETDEV_10000=y | ||
| 604 | 605 | ||
| 605 | # | 606 | # |
| 606 | # Wireless LAN | 607 | # Wireless LAN |
| @@ -640,11 +641,11 @@ CONFIG_INPUT_EVDEV=y | |||
| 640 | # CONFIG_INPUT_JOYSTICK is not set | 641 | # CONFIG_INPUT_JOYSTICK is not set |
| 641 | # CONFIG_INPUT_TABLET is not set | 642 | # CONFIG_INPUT_TABLET is not set |
| 642 | CONFIG_INPUT_TOUCHSCREEN=y | 643 | CONFIG_INPUT_TOUCHSCREEN=y |
| 643 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 644 | CONFIG_TOUCHSCREEN_AD7877=y | 644 | CONFIG_TOUCHSCREEN_AD7877=y |
| 645 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 645 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 646 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | 646 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set |
| 647 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 647 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 648 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 648 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 649 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 649 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 650 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 650 | # CONFIG_TOUCHSCREEN_ELO is not set | 651 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -676,14 +677,14 @@ CONFIG_INPUT_UINPUT=y | |||
| 676 | # Character devices | 677 | # Character devices |
| 677 | # | 678 | # |
| 678 | # CONFIG_AD9960 is not set | 679 | # CONFIG_AD9960 is not set |
| 679 | # CONFIG_SPI_ADC_BF533 is not set | 680 | CONFIG_BFIN_DMA_INTERFACE=m |
| 680 | # CONFIG_BF5xx_PPIFCD is not set | 681 | # CONFIG_BFIN_PPI is not set |
| 682 | # CONFIG_BFIN_PPIFCD is not set | ||
| 681 | # CONFIG_BFIN_SIMPLE_TIMER is not set | 683 | # CONFIG_BFIN_SIMPLE_TIMER is not set |
| 682 | # CONFIG_BF5xx_PPI is not set | 684 | # CONFIG_BFIN_SPI_ADC is not set |
| 683 | CONFIG_BFIN_SPORT=y | 685 | CONFIG_BFIN_SPORT=y |
| 684 | # CONFIG_BFIN_TIMER_LATENCY is not set | 686 | # CONFIG_BFIN_TIMER_LATENCY is not set |
| 685 | CONFIG_TWI_LCD=m | 687 | # CONFIG_BFIN_TWI_LCD is not set |
| 686 | CONFIG_BFIN_DMA_INTERFACE=m | ||
| 687 | # CONFIG_SIMPLE_GPIO is not set | 688 | # CONFIG_SIMPLE_GPIO is not set |
| 688 | # CONFIG_VT is not set | 689 | # CONFIG_VT is not set |
| 689 | CONFIG_DEVKMEM=y | 690 | CONFIG_DEVKMEM=y |
| @@ -796,6 +797,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | |||
| 796 | # CONFIG_POWER_SUPPLY is not set | 797 | # CONFIG_POWER_SUPPLY is not set |
| 797 | CONFIG_HWMON=y | 798 | CONFIG_HWMON=y |
| 798 | # CONFIG_HWMON_VID is not set | 799 | # CONFIG_HWMON_VID is not set |
| 800 | # CONFIG_SENSORS_AD5252 is not set | ||
| 799 | # CONFIG_SENSORS_AD7414 is not set | 801 | # CONFIG_SENSORS_AD7414 is not set |
| 800 | # CONFIG_SENSORS_AD7418 is not set | 802 | # CONFIG_SENSORS_AD7418 is not set |
| 801 | # CONFIG_SENSORS_ADCXX is not set | 803 | # CONFIG_SENSORS_ADCXX is not set |
| @@ -867,6 +869,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 867 | # CONFIG_HTC_PASIC3 is not set | 869 | # CONFIG_HTC_PASIC3 is not set |
| 868 | # CONFIG_MFD_TMIO is not set | 870 | # CONFIG_MFD_TMIO is not set |
| 869 | # CONFIG_PMIC_DA903X is not set | 871 | # CONFIG_PMIC_DA903X is not set |
| 872 | # CONFIG_PMIC_ADP5520 is not set | ||
| 870 | # CONFIG_MFD_WM8400 is not set | 873 | # CONFIG_MFD_WM8400 is not set |
| 871 | # CONFIG_MFD_WM8350_I2C is not set | 874 | # CONFIG_MFD_WM8350_I2C is not set |
| 872 | # CONFIG_REGULATOR is not set | 875 | # CONFIG_REGULATOR is not set |
| @@ -1111,6 +1114,7 @@ CONFIG_SYSFS=y | |||
| 1111 | # CONFIG_BEFS_FS is not set | 1114 | # CONFIG_BEFS_FS is not set |
| 1112 | # CONFIG_BFS_FS is not set | 1115 | # CONFIG_BFS_FS is not set |
| 1113 | # CONFIG_EFS_FS is not set | 1116 | # CONFIG_EFS_FS is not set |
| 1117 | # CONFIG_JFFS2_FS is not set | ||
| 1114 | CONFIG_YAFFS_FS=y | 1118 | CONFIG_YAFFS_FS=y |
| 1115 | CONFIG_YAFFS_YAFFS1=y | 1119 | CONFIG_YAFFS_YAFFS1=y |
| 1116 | # CONFIG_YAFFS_9BYTE_TAGS is not set | 1120 | # CONFIG_YAFFS_9BYTE_TAGS is not set |
| @@ -1121,7 +1125,6 @@ CONFIG_YAFFS_AUTO_YAFFS2=y | |||
| 1121 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | 1125 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set |
| 1122 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | 1126 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set |
| 1123 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | 1127 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y |
| 1124 | # CONFIG_JFFS2_FS is not set | ||
| 1125 | # CONFIG_CRAMFS is not set | 1128 | # CONFIG_CRAMFS is not set |
| 1126 | # CONFIG_VXFS_FS is not set | 1129 | # CONFIG_VXFS_FS is not set |
| 1127 | # CONFIG_MINIX_FS is not set | 1130 | # CONFIG_MINIX_FS is not set |
| @@ -1213,7 +1216,6 @@ CONFIG_FRAME_WARN=1024 | |||
| 1213 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1216 | # CONFIG_DEBUG_BUGVERBOSE is not set |
| 1214 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1217 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 1215 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 1218 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 1216 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1217 | 1219 | ||
| 1218 | # | 1220 | # |
| 1219 | # Tracers | 1221 | # Tracers |
| @@ -1343,7 +1345,6 @@ CONFIG_CRC32=y | |||
| 1343 | # CONFIG_CRC7 is not set | 1345 | # CONFIG_CRC7 is not set |
| 1344 | # CONFIG_LIBCRC32C is not set | 1346 | # CONFIG_LIBCRC32C is not set |
| 1345 | CONFIG_ZLIB_INFLATE=y | 1347 | CONFIG_ZLIB_INFLATE=y |
| 1346 | CONFIG_PLIST=y | ||
| 1347 | CONFIG_HAS_IOMEM=y | 1348 | CONFIG_HAS_IOMEM=y |
| 1348 | CONFIG_HAS_IOPORT=y | 1349 | CONFIG_HAS_IOPORT=y |
| 1349 | CONFIG_HAS_DMA=y | 1350 | CONFIG_HAS_DMA=y |
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig index 2bc0779d22ea..ec84a53daae9 100644 --- a/arch/blackfin/configs/SRV1_defconfig +++ b/arch/blackfin/configs/SRV1_defconfig | |||
| @@ -52,7 +52,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 52 | # CONFIG_SYSCTL is not set | 52 | # CONFIG_SYSCTL is not set |
| 53 | CONFIG_EMBEDDED=y | 53 | CONFIG_EMBEDDED=y |
| 54 | CONFIG_UID16=y | 54 | CONFIG_UID16=y |
| 55 | CONFIG_SYSCTL_SYSCALL=y | 55 | # CONFIG_SYSCTL_SYSCALL is not set |
| 56 | CONFIG_KALLSYMS=y | 56 | CONFIG_KALLSYMS=y |
| 57 | CONFIG_KALLSYMS_ALL=y | 57 | CONFIG_KALLSYMS_ALL=y |
| 58 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 58 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| @@ -373,7 +373,7 @@ CONFIG_IP_PNP=y | |||
| 373 | # CONFIG_NET_IPIP is not set | 373 | # CONFIG_NET_IPIP is not set |
| 374 | # CONFIG_NET_IPGRE is not set | 374 | # CONFIG_NET_IPGRE is not set |
| 375 | # CONFIG_ARPD is not set | 375 | # CONFIG_ARPD is not set |
| 376 | CONFIG_SYN_COOKIES=y | 376 | # CONFIG_SYN_COOKIES is not set |
| 377 | # CONFIG_INET_AH is not set | 377 | # CONFIG_INET_AH is not set |
| 378 | # CONFIG_INET_ESP is not set | 378 | # CONFIG_INET_ESP is not set |
| 379 | # CONFIG_INET_IPCOMP is not set | 379 | # CONFIG_INET_IPCOMP is not set |
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig index e65b3a49214f..6e2796240fdc 100644 --- a/arch/blackfin/configs/TCM-BF537_defconfig +++ b/arch/blackfin/configs/TCM-BF537_defconfig | |||
| @@ -42,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
| 42 | # CONFIG_SYSCTL is not set | 42 | # CONFIG_SYSCTL is not set |
| 43 | CONFIG_EMBEDDED=y | 43 | CONFIG_EMBEDDED=y |
| 44 | # CONFIG_UID16 is not set | 44 | # CONFIG_UID16 is not set |
| 45 | CONFIG_SYSCTL_SYSCALL=y | 45 | # CONFIG_SYSCTL_SYSCALL is not set |
| 46 | CONFIG_KALLSYMS=y | 46 | CONFIG_KALLSYMS=y |
| 47 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 47 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 48 | # CONFIG_HOTPLUG is not set | 48 | # CONFIG_HOTPLUG is not set |
| @@ -537,7 +537,30 @@ CONFIG_SPI_BFIN=y | |||
| 537 | # CONFIG_SPI_SPIDEV is not set | 537 | # CONFIG_SPI_SPIDEV is not set |
| 538 | # CONFIG_SPI_TLE62X0 is not set | 538 | # CONFIG_SPI_TLE62X0 is not set |
| 539 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 539 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
| 540 | # CONFIG_GPIOLIB is not set | 540 | CONFIG_GPIOLIB=y |
| 541 | # CONFIG_DEBUG_GPIO is not set | ||
| 542 | CONFIG_GPIO_SYSFS=y | ||
| 543 | |||
| 544 | # | ||
| 545 | # Memory mapped GPIO expanders: | ||
| 546 | # | ||
| 547 | |||
| 548 | # | ||
| 549 | # I2C GPIO expanders: | ||
| 550 | # | ||
| 551 | # CONFIG_GPIO_MAX732X is not set | ||
| 552 | # CONFIG_GPIO_PCA953X is not set | ||
| 553 | # CONFIG_GPIO_PCF857X is not set | ||
| 554 | |||
| 555 | # | ||
| 556 | # PCI GPIO expanders: | ||
| 557 | # | ||
| 558 | |||
| 559 | # | ||
| 560 | # SPI GPIO expanders: | ||
| 561 | # | ||
| 562 | # CONFIG_GPIO_MAX7301 is not set | ||
| 563 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 541 | # CONFIG_W1 is not set | 564 | # CONFIG_W1 is not set |
| 542 | # CONFIG_POWER_SUPPLY is not set | 565 | # CONFIG_POWER_SUPPLY is not set |
| 543 | # CONFIG_HWMON is not set | 566 | # CONFIG_HWMON is not set |
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index 1b040f5b4feb..94697f0f6f40 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h | |||
| @@ -30,7 +30,8 @@ | |||
| 30 | #ifndef _BLACKFIN_CACHEFLUSH_H | 30 | #ifndef _BLACKFIN_CACHEFLUSH_H |
| 31 | #define _BLACKFIN_CACHEFLUSH_H | 31 | #define _BLACKFIN_CACHEFLUSH_H |
| 32 | 32 | ||
| 33 | extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address); | 33 | #include <asm/blackfin.h> /* for SSYNC() */ |
| 34 | |||
| 34 | extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); | 35 | extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); |
| 35 | extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); | 36 | extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); |
| 36 | extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address); | 37 | extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address); |
| @@ -54,32 +55,28 @@ extern void blackfin_invalidate_entire_dcache(void); | |||
| 54 | 55 | ||
| 55 | static inline void flush_icache_range(unsigned start, unsigned end) | 56 | static inline void flush_icache_range(unsigned start, unsigned end) |
| 56 | { | 57 | { |
| 57 | #if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE) | 58 | #if defined(CONFIG_BFIN_WB) |
| 58 | 59 | blackfin_dcache_flush_range(start, end); | |
| 59 | # if defined(CONFIG_BFIN_WT) | 60 | #endif |
| 60 | blackfin_icache_flush_range((start), (end)); | ||
| 61 | flush_icache_range_others(start, end); | ||
| 62 | # else | ||
| 63 | blackfin_icache_dcache_flush_range((start), (end)); | ||
| 64 | # endif | ||
| 65 | |||
| 66 | #else | ||
| 67 | 61 | ||
| 68 | # if defined(CONFIG_BFIN_ICACHE) | 62 | /* Make sure all write buffers in the data side of the core |
| 69 | blackfin_icache_flush_range((start), (end)); | 63 | * are flushed before trying to invalidate the icache. This |
| 64 | * needs to be after the data flush and before the icache | ||
| 65 | * flush so that the SSYNC does the right thing in preventing | ||
| 66 | * the instruction prefetcher from hitting things in cached | ||
| 67 | * memory at the wrong time -- it runs much further ahead than | ||
| 68 | * the pipeline. | ||
| 69 | */ | ||
| 70 | SSYNC(); | ||
| 71 | #if defined(CONFIG_BFIN_ICACHE) | ||
| 72 | blackfin_icache_flush_range(start, end); | ||
| 70 | flush_icache_range_others(start, end); | 73 | flush_icache_range_others(start, end); |
| 71 | # endif | ||
| 72 | # if defined(CONFIG_BFIN_DCACHE) | ||
| 73 | blackfin_dcache_flush_range((start), (end)); | ||
| 74 | # endif | ||
| 75 | |||
| 76 | #endif | 74 | #endif |
| 77 | } | 75 | } |
| 78 | 76 | ||
| 79 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | 77 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
| 80 | do { memcpy(dst, src, len); \ | 78 | do { memcpy(dst, src, len); \ |
| 81 | flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ | 79 | flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ |
| 82 | flush_icache_range_others((unsigned long) (dst), (unsigned long) (dst) + (len));\ | ||
| 83 | } while (0) | 80 | } while (0) |
| 84 | 81 | ||
| 85 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len) | 82 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len) |
| @@ -111,6 +108,11 @@ static inline int bfin_addr_dcachable(unsigned long addr) | |||
| 111 | addr >= _ramend && addr < physical_mem_end) | 108 | addr >= _ramend && addr < physical_mem_end) |
| 112 | return 1; | 109 | return 1; |
| 113 | 110 | ||
| 111 | #ifndef CONFIG_BFIN_L2_NOT_CACHED | ||
| 112 | if (addr >= L2_START && addr < L2_START + L2_LENGTH) | ||
| 113 | return 1; | ||
| 114 | #endif | ||
| 115 | |||
| 114 | return 0; | 116 | return 0; |
| 115 | } | 117 | } |
| 116 | 118 | ||
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h index ad566ff9ad16..a75a6a9f0949 100644 --- a/arch/blackfin/include/asm/cplb.h +++ b/arch/blackfin/include/asm/cplb.h | |||
| @@ -53,29 +53,32 @@ | |||
| 53 | #define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON) | 53 | #define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON) |
| 54 | #endif | 54 | #endif |
| 55 | 55 | ||
| 56 | #define SDRAM_DNON_CHBL (CPLB_COMMON) | ||
| 57 | #define SDRAM_EBIU (CPLB_COMMON) | ||
| 58 | #define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) | ||
| 59 | |||
| 56 | #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) | 60 | #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) |
| 57 | 61 | ||
| 58 | #ifdef CONFIG_SMP | 62 | #ifdef CONFIG_SMP |
| 59 | #define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB) | 63 | #define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB) |
| 60 | #define L2_IMEMORY (CPLB_COMMON | CPLB_LOCK) | 64 | #define L2_IMEMORY (CPLB_COMMON) |
| 61 | #define L2_DMEMORY (CPLB_COMMON | CPLB_LOCK) | 65 | #define L2_DMEMORY (CPLB_LOCK | CPLB_COMMON) |
| 62 | 66 | ||
| 63 | #else | 67 | #else |
| 64 | #ifdef CONFIG_BFIN_L2_CACHEABLE | 68 | #define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB) |
| 65 | #define L2_IMEMORY (SDRAM_IGENERIC) | 69 | #define L2_IMEMORY (SDRAM_IGENERIC) |
| 66 | #define L2_DMEMORY (SDRAM_DGENERIC) | 70 | |
| 67 | #else | 71 | # if defined(CONFIG_BFIN_L2_WB) |
| 68 | #define L2_IMEMORY (CPLB_COMMON) | 72 | # define L2_DMEMORY (CPLB_L1_CHBL | CPLB_COMMON) |
| 69 | #define L2_DMEMORY (CPLB_COMMON) | 73 | # elif defined(CONFIG_BFIN_L2_WT) |
| 70 | #endif /* CONFIG_BFIN_L2_CACHEABLE */ | 74 | # define L2_DMEMORY (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON) |
| 71 | 75 | # elif defined(CONFIG_BFIN_L2_NOT_CACHED) | |
| 72 | #define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB) | 76 | # define L2_DMEMORY (CPLB_COMMON) |
| 77 | # else | ||
| 78 | # define L2_DMEMORY (0) | ||
| 79 | # endif | ||
| 73 | #endif /* CONFIG_SMP */ | 80 | #endif /* CONFIG_SMP */ |
| 74 | 81 | ||
| 75 | #define SDRAM_DNON_CHBL (CPLB_COMMON) | ||
| 76 | #define SDRAM_EBIU (CPLB_COMMON) | ||
| 77 | #define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) | ||
| 78 | |||
| 79 | #define SIZE_1K 0x00000400 /* 1K */ | 82 | #define SIZE_1K 0x00000400 /* 1K */ |
| 80 | #define SIZE_4K 0x00001000 /* 4K */ | 83 | #define SIZE_4K 0x00001000 /* 4K */ |
| 81 | #define SIZE_1M 0x00100000 /* 1M */ | 84 | #define SIZE_1M 0x00100000 /* 1M */ |
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h index e4f7b8043f02..c9a59622e23f 100644 --- a/arch/blackfin/include/asm/dma.h +++ b/arch/blackfin/include/asm/dma.h | |||
| @@ -206,10 +206,16 @@ static inline unsigned long get_dma_curr_addr(unsigned int channel) | |||
| 206 | 206 | ||
| 207 | static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize) | 207 | static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize) |
| 208 | { | 208 | { |
| 209 | /* Make sure the internal data buffers in the core are drained | ||
| 210 | * so that the DMA descriptors are completely written when the | ||
| 211 | * DMA engine goes to fetch them below. | ||
| 212 | */ | ||
| 213 | SSYNC(); | ||
| 214 | |||
| 215 | dma_ch[channel].regs->next_desc_ptr = sg; | ||
| 209 | dma_ch[channel].regs->cfg = | 216 | dma_ch[channel].regs->cfg = |
| 210 | (dma_ch[channel].regs->cfg & ~(0xf << 8)) | | 217 | (dma_ch[channel].regs->cfg & ~(0xf << 8)) | |
| 211 | ((ndsize & 0xf) << 8); | 218 | ((ndsize & 0xf) << 8); |
| 212 | dma_ch[channel].regs->next_desc_ptr = sg; | ||
| 213 | } | 219 | } |
| 214 | 220 | ||
| 215 | static inline int dma_channel_active(unsigned int channel) | 221 | static inline int dma_channel_active(unsigned int channel) |
| @@ -253,5 +259,7 @@ static inline void clear_dma_irqstat(unsigned int channel) | |||
| 253 | void *dma_memcpy(void *dest, const void *src, size_t count); | 259 | void *dma_memcpy(void *dest, const void *src, size_t count); |
| 254 | void *safe_dma_memcpy(void *dest, const void *src, size_t count); | 260 | void *safe_dma_memcpy(void *dest, const void *src, size_t count); |
| 255 | void blackfin_dma_early_init(void); | 261 | void blackfin_dma_early_init(void); |
| 262 | void early_dma_memcpy(void *dest, const void *src, size_t count); | ||
| 263 | void early_dma_memcpy_done(void); | ||
| 256 | 264 | ||
| 257 | #endif | 265 | #endif |
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h index cdbfcfc30f6a..230e1605d3fb 100644 --- a/arch/blackfin/include/asm/elf.h +++ b/arch/blackfin/include/asm/elf.h | |||
| @@ -55,50 +55,50 @@ do { \ | |||
| 55 | #define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC | 55 | #define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC |
| 56 | #define ELF_EXEC_PAGESIZE 4096 | 56 | #define ELF_EXEC_PAGESIZE 4096 |
| 57 | 57 | ||
| 58 | #define R_unused0 0 /* relocation type 0 is not defined */ | 58 | #define R_BFIN_UNUSED0 0 /* relocation type 0 is not defined */ |
| 59 | #define R_pcrel5m2 1 /*LSETUP part a */ | 59 | #define R_BFIN_PCREL5M2 1 /* LSETUP part a */ |
| 60 | #define R_unused1 2 /* relocation type 2 is not defined */ | 60 | #define R_BFIN_UNUSED1 2 /* relocation type 2 is not defined */ |
| 61 | #define R_pcrel10 3 /* type 3, if cc jump <target> */ | 61 | #define R_BFIN_PCREL10 3 /* type 3, if cc jump <target> */ |
| 62 | #define R_pcrel12_jump 4 /* type 4, jump <target> */ | 62 | #define R_BFIN_PCREL12_JUMP 4 /* type 4, jump <target> */ |
| 63 | #define R_rimm16 5 /* type 0x5, rN = <target> */ | 63 | #define R_BFIN_RIMM16 5 /* type 0x5, rN = <target> */ |
| 64 | #define R_luimm16 6 /* # 0x6, preg.l=<target> Load imm 16 to lower half */ | 64 | #define R_BFIN_LUIMM16 6 /* # 0x6, preg.l=<target> Load imm 16 to lower half */ |
| 65 | #define R_huimm16 7 /* # 0x7, preg.h=<target> Load imm 16 to upper half */ | 65 | #define R_BFIN_HUIMM16 7 /* # 0x7, preg.h=<target> Load imm 16 to upper half */ |
| 66 | #define R_pcrel12_jump_s 8 /* # 0x8 jump.s <target> */ | 66 | #define R_BFIN_PCREL12_JUMP_S 8 /* # 0x8 jump.s <target> */ |
| 67 | #define R_pcrel24_jump_x 9 /* # 0x9 jump.x <target> */ | 67 | #define R_BFIN_PCREL24_JUMP_X 9 /* # 0x9 jump.x <target> */ |
| 68 | #define R_pcrel24 10 /* # 0xa call <target> , not expandable */ | 68 | #define R_BFIN_PCREL24 10 /* # 0xa call <target> , not expandable */ |
| 69 | #define R_unusedb 11 /* # 0xb not generated */ | 69 | #define R_BFIN_UNUSEDB 11 /* # 0xb not generated */ |
| 70 | #define R_unusedc 12 /* # 0xc not used */ | 70 | #define R_BFIN_UNUSEDC 12 /* # 0xc not used */ |
| 71 | #define R_pcrel24_jump_l 13 /*0xd jump.l <target> */ | 71 | #define R_BFIN_PCREL24_JUMP_L 13 /* 0xd jump.l <target> */ |
| 72 | #define R_pcrel24_call_x 14 /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */ | 72 | #define R_BFIN_PCREL24_CALL_X 14 /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */ |
| 73 | #define R_var_eq_symb 15 /* 0xf, linker should treat it same as 0x12 */ | 73 | #define R_BFIN_VAR_EQ_SYMB 15 /* 0xf, linker should treat it same as 0x12 */ |
| 74 | #define R_byte_data 16 /* 0x10, .byte var = symbol */ | 74 | #define R_BFIN_BYTE_DATA 16 /* 0x10, .byte var = symbol */ |
| 75 | #define R_byte2_data 17 /* 0x11, .byte2 var = symbol */ | 75 | #define R_BFIN_BYTE2_DATA 17 /* 0x11, .byte2 var = symbol */ |
| 76 | #define R_byte4_data 18 /* 0x12, .byte4 var = symbol and .var var=symbol */ | 76 | #define R_BFIN_BYTE4_DATA 18 /* 0x12, .byte4 var = symbol and .var var=symbol */ |
| 77 | #define R_pcrel11 19 /* 0x13, lsetup part b */ | 77 | #define R_BFIN_PCREL11 19 /* 0x13, lsetup part b */ |
| 78 | #define R_unused14 20 /* 0x14, undefined */ | 78 | #define R_BFIN_UNUSED14 20 /* 0x14, undefined */ |
| 79 | #define R_unused15 21 /* not generated by VDSP 3.5 */ | 79 | #define R_BFIN_UNUSED15 21 /* not generated by VDSP 3.5 */ |
| 80 | 80 | ||
| 81 | /* arithmetic relocations */ | 81 | /* arithmetic relocations */ |
| 82 | #define R_push 0xE0 | 82 | #define R_BFIN_PUSH 0xE0 |
| 83 | #define R_const 0xE1 | 83 | #define R_BFIN_CONST 0xE1 |
| 84 | #define R_add 0xE2 | 84 | #define R_BFIN_ADD 0xE2 |
| 85 | #define R_sub 0xE3 | 85 | #define R_BFIN_SUB 0xE3 |
| 86 | #define R_mult 0xE4 | 86 | #define R_BFIN_MULT 0xE4 |
| 87 | #define R_div 0xE5 | 87 | #define R_BFIN_DIV 0xE5 |
| 88 | #define R_mod 0xE6 | 88 | #define R_BFIN_MOD 0xE6 |
| 89 | #define R_lshift 0xE7 | 89 | #define R_BFIN_LSHIFT 0xE7 |
| 90 | #define R_rshift 0xE8 | 90 | #define R_BFIN_RSHIFT 0xE8 |
| 91 | #define R_and 0xE9 | 91 | #define R_BFIN_AND 0xE9 |
| 92 | #define R_or 0xEA | 92 | #define R_BFIN_OR 0xEA |
| 93 | #define R_xor 0xEB | 93 | #define R_BFIN_XOR 0xEB |
| 94 | #define R_land 0xEC | 94 | #define R_BFIN_LAND 0xEC |
| 95 | #define R_lor 0xED | 95 | #define R_BFIN_LOR 0xED |
| 96 | #define R_len 0xEE | 96 | #define R_BFIN_LEN 0xEE |
| 97 | #define R_neg 0xEF | 97 | #define R_BFIN_NEG 0xEF |
| 98 | #define R_comp 0xF0 | 98 | #define R_BFIN_COMP 0xF0 |
| 99 | #define R_page 0xF1 | 99 | #define R_BFIN_PAGE 0xF1 |
| 100 | #define R_hwpage 0xF2 | 100 | #define R_BFIN_HWPAGE 0xF2 |
| 101 | #define R_addr 0xF3 | 101 | #define R_BFIN_ADDR 0xF3 |
| 102 | 102 | ||
| 103 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | 103 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical |
| 104 | use of this is to invoke "./ld.so someprog" to test out a new version of | 104 | use of this is to invoke "./ld.so someprog" to test out a new version of |
diff --git a/arch/blackfin/include/asm/entry.h b/arch/blackfin/include/asm/entry.h index b30a2968e274..ec58efc130e6 100644 --- a/arch/blackfin/include/asm/entry.h +++ b/arch/blackfin/include/asm/entry.h | |||
| @@ -35,21 +35,39 @@ | |||
| 35 | #else | 35 | #else |
| 36 | # define LOAD_IPIPE_IPEND | 36 | # define LOAD_IPIPE_IPEND |
| 37 | #endif | 37 | #endif |
| 38 | |||
| 39 | #ifndef CONFIG_EXACT_HWERR | ||
| 40 | /* As a debugging aid - we save IPEND when DEBUG_KERNEL is on, | ||
| 41 | * otherwise it is a waste of cycles. | ||
| 42 | */ | ||
| 43 | # ifndef CONFIG_DEBUG_KERNEL | ||
| 44 | #define INTERRUPT_ENTRY(N) \ | ||
| 45 | [--sp] = SYSCFG; \ | ||
| 46 | [--sp] = P0; /*orig_p0*/ \ | ||
| 47 | [--sp] = R0; /*orig_r0*/ \ | ||
| 48 | [--sp] = (R7:0,P5:0); \ | ||
| 49 | R0 = (N); \ | ||
| 50 | LOAD_IPIPE_IPEND \ | ||
| 51 | jump __common_int_entry; | ||
| 52 | # else /* CONFIG_DEBUG_KERNEL */ | ||
| 38 | #define INTERRUPT_ENTRY(N) \ | 53 | #define INTERRUPT_ENTRY(N) \ |
| 39 | [--sp] = SYSCFG; \ | 54 | [--sp] = SYSCFG; \ |
| 40 | \ | ||
| 41 | [--sp] = P0; /*orig_p0*/ \ | 55 | [--sp] = P0; /*orig_p0*/ \ |
| 42 | [--sp] = R0; /*orig_r0*/ \ | 56 | [--sp] = R0; /*orig_r0*/ \ |
| 43 | [--sp] = (R7:0,P5:0); \ | 57 | [--sp] = (R7:0,P5:0); \ |
| 58 | p0.l = lo(IPEND); \ | ||
| 59 | p0.h = hi(IPEND); \ | ||
| 60 | r1 = [p0]; \ | ||
| 44 | R0 = (N); \ | 61 | R0 = (N); \ |
| 45 | LOAD_IPIPE_IPEND \ | 62 | LOAD_IPIPE_IPEND \ |
| 46 | jump __common_int_entry; | 63 | jump __common_int_entry; |
| 64 | # endif /* CONFIG_DEBUG_KERNEL */ | ||
| 47 | 65 | ||
| 48 | /* For timer interrupts, we need to save IPEND, since the user_mode | 66 | /* For timer interrupts, we need to save IPEND, since the user_mode |
| 49 | macro accesses it to determine where to account time. */ | 67 | *macro accesses it to determine where to account time. |
| 68 | */ | ||
| 50 | #define TIMER_INTERRUPT_ENTRY(N) \ | 69 | #define TIMER_INTERRUPT_ENTRY(N) \ |
| 51 | [--sp] = SYSCFG; \ | 70 | [--sp] = SYSCFG; \ |
| 52 | \ | ||
| 53 | [--sp] = P0; /*orig_p0*/ \ | 71 | [--sp] = P0; /*orig_p0*/ \ |
| 54 | [--sp] = R0; /*orig_r0*/ \ | 72 | [--sp] = R0; /*orig_r0*/ \ |
| 55 | [--sp] = (R7:0,P5:0); \ | 73 | [--sp] = (R7:0,P5:0); \ |
| @@ -58,6 +76,74 @@ | |||
| 58 | r1 = [p0]; \ | 76 | r1 = [p0]; \ |
| 59 | R0 = (N); \ | 77 | R0 = (N); \ |
| 60 | jump __common_int_entry; | 78 | jump __common_int_entry; |
| 79 | #else /* CONFIG_EXACT_HWERR is defined */ | ||
| 80 | |||
| 81 | /* if we want hardware error to be exact, we need to do a SSYNC (which forces | ||
| 82 | * read/writes to complete to the memory controllers), and check to see that | ||
| 83 | * caused a pending HW error condition. If so, we assume it was caused by user | ||
| 84 | * space, by setting the same interrupt that we are in (so it goes off again) | ||
| 85 | * and context restore, and a RTI (without servicing anything). This should | ||
| 86 | * cause the pending HWERR to fire, and when that is done, this interrupt will | ||
| 87 | * be re-serviced properly. | ||
| 88 | * As you can see by the code - we actually need to do two SSYNCS - one to | ||
| 89 | * make sure the read/writes complete, and another to make sure the hardware | ||
| 90 | * error is recognized by the core. | ||
| 91 | */ | ||
| 92 | #define INTERRUPT_ENTRY(N) \ | ||
| 93 | SSYNC; \ | ||
| 94 | SSYNC; \ | ||
| 95 | [--sp] = SYSCFG; \ | ||
| 96 | [--sp] = P0; /*orig_p0*/ \ | ||
| 97 | [--sp] = R0; /*orig_r0*/ \ | ||
| 98 | [--sp] = (R7:0,P5:0); \ | ||
| 99 | R1 = ASTAT; \ | ||
| 100 | P0.L = LO(ILAT); \ | ||
| 101 | P0.H = HI(ILAT); \ | ||
| 102 | R0 = [P0]; \ | ||
| 103 | CC = BITTST(R0, EVT_IVHW_P); \ | ||
| 104 | IF CC JUMP 1f; \ | ||
| 105 | ASTAT = R1; \ | ||
| 106 | p0.l = lo(IPEND); \ | ||
| 107 | p0.h = hi(IPEND); \ | ||
| 108 | r1 = [p0]; \ | ||
| 109 | R0 = (N); \ | ||
| 110 | LOAD_IPIPE_IPEND \ | ||
| 111 | jump __common_int_entry; \ | ||
| 112 | 1: ASTAT = R1; \ | ||
| 113 | RAISE N; \ | ||
| 114 | (R7:0, P5:0) = [SP++]; \ | ||
| 115 | SP += 0x8; \ | ||
| 116 | SYSCFG = [SP++]; \ | ||
| 117 | CSYNC; \ | ||
| 118 | RTI; | ||
| 119 | |||
| 120 | #define TIMER_INTERRUPT_ENTRY(N) \ | ||
| 121 | SSYNC; \ | ||
| 122 | SSYNC; \ | ||
| 123 | [--sp] = SYSCFG; \ | ||
| 124 | [--sp] = P0; /*orig_p0*/ \ | ||
| 125 | [--sp] = R0; /*orig_r0*/ \ | ||
| 126 | [--sp] = (R7:0,P5:0); \ | ||
| 127 | R1 = ASTAT; \ | ||
| 128 | P0.L = LO(ILAT); \ | ||
| 129 | P0.H = HI(ILAT); \ | ||
| 130 | R0 = [P0]; \ | ||
| 131 | CC = BITTST(R0, EVT_IVHW_P); \ | ||
| 132 | IF CC JUMP 1f; \ | ||
| 133 | ASTAT = R1; \ | ||
| 134 | p0.l = lo(IPEND); \ | ||
| 135 | p0.h = hi(IPEND); \ | ||
| 136 | r1 = [p0]; \ | ||
| 137 | R0 = (N); \ | ||
| 138 | jump __common_int_entry; \ | ||
| 139 | 1: ASTAT = R1; \ | ||
| 140 | RAISE N; \ | ||
| 141 | (R7:0, P5:0) = [SP++]; \ | ||
| 142 | SP += 0x8; \ | ||
| 143 | SYSCFG = [SP++]; \ | ||
| 144 | CSYNC; \ | ||
| 145 | RTI; | ||
| 146 | #endif /* CONFIG_EXACT_HWERR */ | ||
| 61 | 147 | ||
| 62 | /* This one pushes RETI without using CLI. Interrupts are enabled. */ | 148 | /* This one pushes RETI without using CLI. Interrupts are enabled. */ |
| 63 | #define SAVE_CONTEXT_SYSCALL save_context_syscall | 149 | #define SAVE_CONTEXT_SYSCALL save_context_syscall |
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h index b0f847ae4bf4..89f08decb8e0 100644 --- a/arch/blackfin/include/asm/gptimers.h +++ b/arch/blackfin/include/asm/gptimers.h | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | # else | 30 | # else |
| 31 | # define MAX_BLACKFIN_GPTIMERS 11 | 31 | # define MAX_BLACKFIN_GPTIMERS 11 |
| 32 | # define TIMER8_GROUP_REG TIMER_ENABLE1 | 32 | # define TIMER8_GROUP_REG TIMER_ENABLE1 |
| 33 | # define TIMER_GROUP2 1 | ||
| 33 | # endif | 34 | # endif |
| 34 | # define TIMER0_GROUP_REG TIMER_ENABLE0 | 35 | # define TIMER0_GROUP_REG TIMER_ENABLE0 |
| 35 | #endif | 36 | #endif |
| @@ -40,10 +41,12 @@ | |||
| 40 | # define MAX_BLACKFIN_GPTIMERS 12 | 41 | # define MAX_BLACKFIN_GPTIMERS 12 |
| 41 | # define TIMER0_GROUP_REG TMRS8_ENABLE | 42 | # define TIMER0_GROUP_REG TMRS8_ENABLE |
| 42 | # define TIMER8_GROUP_REG TMRS4_ENABLE | 43 | # define TIMER8_GROUP_REG TMRS4_ENABLE |
| 44 | # define TIMER_GROUP2 1 | ||
| 43 | #endif | 45 | #endif |
| 44 | /* | 46 | /* |
| 45 | * All others: 3 timers: | 47 | * All others: 3 timers: |
| 46 | */ | 48 | */ |
| 49 | #define TIMER_GROUP1 0 | ||
| 47 | #if !defined(MAX_BLACKFIN_GPTIMERS) | 50 | #if !defined(MAX_BLACKFIN_GPTIMERS) |
| 48 | # define MAX_BLACKFIN_GPTIMERS 3 | 51 | # define MAX_BLACKFIN_GPTIMERS 3 |
| 49 | # define TIMER0_GROUP_REG TIMER_ENABLE | 52 | # define TIMER0_GROUP_REG TIMER_ENABLE |
| @@ -109,8 +112,8 @@ | |||
| 109 | #define TIMER_ERR_PROG_PER 0x8000 | 112 | #define TIMER_ERR_PROG_PER 0x8000 |
| 110 | #define TIMER_ERR_PROG_PW 0xC000 | 113 | #define TIMER_ERR_PROG_PW 0xC000 |
| 111 | #define TIMER_EMU_RUN 0x0200 | 114 | #define TIMER_EMU_RUN 0x0200 |
| 112 | #define TIMER_TOGGLE_HI 0x0100 | 115 | #define TIMER_TOGGLE_HI 0x0100 |
| 113 | #define TIMER_CLK_SEL 0x0080 | 116 | #define TIMER_CLK_SEL 0x0080 |
| 114 | #define TIMER_OUT_DIS 0x0040 | 117 | #define TIMER_OUT_DIS 0x0040 |
| 115 | #define TIMER_TIN_SEL 0x0020 | 118 | #define TIMER_TIN_SEL 0x0020 |
| 116 | #define TIMER_IRQ_ENA 0x0010 | 119 | #define TIMER_IRQ_ENA 0x0010 |
| @@ -169,23 +172,25 @@ | |||
| 169 | 172 | ||
| 170 | /* The actual gptimer API */ | 173 | /* The actual gptimer API */ |
| 171 | 174 | ||
| 172 | void set_gptimer_pwidth (int timer_id, uint32_t width); | 175 | void set_gptimer_pwidth(int timer_id, uint32_t width); |
| 173 | uint32_t get_gptimer_pwidth (int timer_id); | 176 | uint32_t get_gptimer_pwidth(int timer_id); |
| 174 | void set_gptimer_period (int timer_id, uint32_t period); | 177 | void set_gptimer_period(int timer_id, uint32_t period); |
| 175 | uint32_t get_gptimer_period (int timer_id); | 178 | uint32_t get_gptimer_period(int timer_id); |
| 176 | uint32_t get_gptimer_count (int timer_id); | 179 | uint32_t get_gptimer_count(int timer_id); |
| 177 | uint16_t get_gptimer_intr (int timer_id); | 180 | int get_gptimer_intr(int timer_id); |
| 178 | void clear_gptimer_intr (int timer_id); | 181 | void clear_gptimer_intr(int timer_id); |
| 179 | uint16_t get_gptimer_over (int timer_id); | 182 | int get_gptimer_over(int timer_id); |
| 180 | void clear_gptimer_over (int timer_id); | 183 | void clear_gptimer_over(int timer_id); |
| 181 | void set_gptimer_config (int timer_id, uint16_t config); | 184 | void set_gptimer_config(int timer_id, uint16_t config); |
| 182 | uint16_t get_gptimer_config (int timer_id); | 185 | uint16_t get_gptimer_config(int timer_id); |
| 183 | void set_gptimer_pulse_hi (int timer_id); | 186 | int get_gptimer_run(int timer_id); |
| 187 | void set_gptimer_pulse_hi(int timer_id); | ||
| 184 | void clear_gptimer_pulse_hi(int timer_id); | 188 | void clear_gptimer_pulse_hi(int timer_id); |
| 185 | void enable_gptimers (uint16_t mask); | 189 | void enable_gptimers(uint16_t mask); |
| 186 | void disable_gptimers (uint16_t mask); | 190 | void disable_gptimers(uint16_t mask); |
| 187 | uint16_t get_enabled_gptimers (void); | 191 | void disable_gptimers_sync(uint16_t mask); |
| 188 | uint32_t get_gptimer_status (int group); | 192 | uint16_t get_enabled_gptimers(void); |
| 189 | void set_gptimer_status (int group, uint32_t value); | 193 | uint32_t get_gptimer_status(int group); |
| 194 | void set_gptimer_status(int group, uint32_t value); | ||
| 190 | 195 | ||
| 191 | #endif | 196 | #endif |
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h index 63b2d8c78570..3022b5c96b37 100644 --- a/arch/blackfin/include/asm/io.h +++ b/arch/blackfin/include/asm/io.h | |||
| @@ -80,19 +80,22 @@ static inline unsigned int readl(const volatile void __iomem *addr) | |||
| 80 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | 80 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) |
| 81 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | 81 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) |
| 82 | 82 | ||
| 83 | #define inb(addr) readb(addr) | 83 | /* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */ |
| 84 | #define inw(addr) readw(addr) | 84 | #define __io(port) ((void *)(unsigned long)(port)) |
| 85 | #define inl(addr) readl(addr) | 85 | |
| 86 | #define outb(x,addr) ((void) writeb(x,addr)) | 86 | #define inb(port) readb(__io(port)) |
| 87 | #define outw(x,addr) ((void) writew(x,addr)) | 87 | #define inw(port) readw(__io(port)) |
| 88 | #define outl(x,addr) ((void) writel(x,addr)) | 88 | #define inl(port) readl(__io(port)) |
| 89 | 89 | #define outb(x,port) writeb(x,__io(port)) | |
| 90 | #define inb_p(addr) inb(addr) | 90 | #define outw(x,port) writew(x,__io(port)) |
| 91 | #define inw_p(addr) inw(addr) | 91 | #define outl(x,port) writel(x,__io(port)) |
| 92 | #define inl_p(addr) inl(addr) | 92 | |
| 93 | #define outb_p(x,addr) outb(x,addr) | 93 | #define inb_p(port) inb(__io(port)) |
| 94 | #define outw_p(x,addr) outw(x,addr) | 94 | #define inw_p(port) inw(__io(port)) |
| 95 | #define outl_p(x,addr) outl(x,addr) | 95 | #define inl_p(port) inl(__io(port)) |
| 96 | #define outb_p(x,port) outb(x,__io(port)) | ||
| 97 | #define outw_p(x,port) outw(x,__io(port)) | ||
| 98 | #define outl_p(x,port) outl(x,__io(port)) | ||
| 96 | 99 | ||
| 97 | #define ioread8_rep(a,d,c) readsb(a,d,c) | 100 | #define ioread8_rep(a,d,c) readsb(a,d,c) |
| 98 | #define ioread16_rep(a,d,c) readsw(a,d,c) | 101 | #define ioread16_rep(a,d,c) readsw(a,d,c) |
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h index 343b56361ec9..51d0bf5e2899 100644 --- a/arch/blackfin/include/asm/ipipe.h +++ b/arch/blackfin/include/asm/ipipe.h | |||
| @@ -35,10 +35,10 @@ | |||
| 35 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
| 36 | #include <asm/traps.h> | 36 | #include <asm/traps.h> |
| 37 | 37 | ||
| 38 | #define IPIPE_ARCH_STRING "1.9-00" | 38 | #define IPIPE_ARCH_STRING "1.9-01" |
| 39 | #define IPIPE_MAJOR_NUMBER 1 | 39 | #define IPIPE_MAJOR_NUMBER 1 |
| 40 | #define IPIPE_MINOR_NUMBER 9 | 40 | #define IPIPE_MINOR_NUMBER 9 |
| 41 | #define IPIPE_PATCH_NUMBER 0 | 41 | #define IPIPE_PATCH_NUMBER 1 |
| 42 | 42 | ||
| 43 | #ifdef CONFIG_SMP | 43 | #ifdef CONFIG_SMP |
| 44 | #error "I-pipe/blackfin: SMP not implemented" | 44 | #error "I-pipe/blackfin: SMP not implemented" |
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h index a67142740df0..b42555c1431c 100644 --- a/arch/blackfin/include/asm/pda.h +++ b/arch/blackfin/include/asm/pda.h | |||
| @@ -64,8 +64,6 @@ struct blackfin_pda { /* Per-processor Data Area */ | |||
| 64 | 64 | ||
| 65 | extern struct blackfin_pda cpu_pda[]; | 65 | extern struct blackfin_pda cpu_pda[]; |
| 66 | 66 | ||
| 67 | void reserve_pda(void); | ||
| 68 | |||
| 69 | #endif /* __ASSEMBLY__ */ | 67 | #endif /* __ASSEMBLY__ */ |
| 70 | 68 | ||
| 71 | #endif /* _ASM_BLACKFIN_PDA_H */ | 69 | #endif /* _ASM_BLACKFIN_PDA_H */ |
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h index 0eece23b41c7..3040415523b2 100644 --- a/arch/blackfin/include/asm/processor.h +++ b/arch/blackfin/include/asm/processor.h | |||
| @@ -131,8 +131,8 @@ unsigned long get_wchan(struct task_struct *p); | |||
| 131 | /* Get the Silicon Revision of the chip */ | 131 | /* Get the Silicon Revision of the chip */ |
| 132 | static inline uint32_t __pure bfin_revid(void) | 132 | static inline uint32_t __pure bfin_revid(void) |
| 133 | { | 133 | { |
| 134 | /* stored in the upper 4 bits */ | 134 | /* Always use CHIPID, to work around ANOMALY_05000234 */ |
| 135 | uint32_t revid = bfin_read_CHIPID() >> 28; | 135 | uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28; |
| 136 | 136 | ||
| 137 | #ifdef CONFIG_BF52x | 137 | #ifdef CONFIG_BF52x |
| 138 | /* ANOMALY_05000357 | 138 | /* ANOMALY_05000357 |
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h index ddc43ce38533..589e937ed1eb 100644 --- a/arch/blackfin/include/asm/time.h +++ b/arch/blackfin/include/asm/time.h | |||
| @@ -37,4 +37,5 @@ extern unsigned long long __bfin_cycles_off; | |||
| 37 | extern unsigned int __bfin_cycles_mod; | 37 | extern unsigned int __bfin_cycles_mod; |
| 38 | #endif | 38 | #endif |
| 39 | 39 | ||
| 40 | extern void __init setup_core_timer(void); | ||
| 40 | #endif | 41 | #endif |
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h index 3248033531e6..8894e9ffbb57 100644 --- a/arch/blackfin/include/asm/uaccess.h +++ b/arch/blackfin/include/asm/uaccess.h | |||
| @@ -59,12 +59,8 @@ static inline int is_in_rom(unsigned long addr) | |||
| 59 | #ifndef CONFIG_ACCESS_CHECK | 59 | #ifndef CONFIG_ACCESS_CHECK |
| 60 | static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; } | 60 | static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; } |
| 61 | #else | 61 | #else |
| 62 | #ifdef CONFIG_ACCESS_OK_L1 | ||
| 63 | extern int _access_ok(unsigned long addr, unsigned long size)__attribute__((l1_text)); | ||
| 64 | #else | ||
| 65 | extern int _access_ok(unsigned long addr, unsigned long size); | 62 | extern int _access_ok(unsigned long addr, unsigned long size); |
| 66 | #endif | 63 | #endif |
| 67 | #endif | ||
| 68 | 64 | ||
| 69 | /* | 65 | /* |
| 70 | * The exception table consists of pairs of addresses: the first is the | 66 | * The exception table consists of pairs of addresses: the first is the |
| @@ -83,9 +79,6 @@ struct exception_table_entry { | |||
| 83 | unsigned long insn, fixup; | 79 | unsigned long insn, fixup; |
| 84 | }; | 80 | }; |
| 85 | 81 | ||
| 86 | /* Returns 0 if exception not found and fixup otherwise. */ | ||
| 87 | extern unsigned long search_exception_table(unsigned long); | ||
| 88 | |||
| 89 | /* | 82 | /* |
| 90 | * These are the main single-value transfer routines. They automatically | 83 | * These are the main single-value transfer routines. They automatically |
| 91 | * use the right size if we just have the right pointer type. | 84 | * use the right size if we just have the right pointer type. |
| @@ -233,16 +226,29 @@ strncpy_from_user(char *dst, const char *src, long count) | |||
| 233 | } | 226 | } |
| 234 | 227 | ||
| 235 | /* | 228 | /* |
| 236 | * Return the size of a string (including the ending 0) | 229 | * Get the size of a string in user space. |
| 230 | * src: The string to measure | ||
| 231 | * n: The maximum valid length | ||
| 237 | * | 232 | * |
| 238 | * Return 0 on exception, a value greater than N if too long | 233 | * Get the size of a NUL-terminated string in user space. |
| 234 | * | ||
| 235 | * Returns the size of the string INCLUDING the terminating NUL. | ||
| 236 | * On exception, returns 0. | ||
| 237 | * If the string is too long, returns a value greater than n. | ||
| 239 | */ | 238 | */ |
| 240 | static inline long strnlen_user(const char *src, long n) | 239 | static inline long __must_check strnlen_user(const char *src, long n) |
| 241 | { | 240 | { |
| 242 | return (strlen(src) + 1); | 241 | if (!access_ok(VERIFY_READ, src, 1)) |
| 242 | return 0; | ||
| 243 | return strnlen(src, n) + 1; | ||
| 243 | } | 244 | } |
| 244 | 245 | ||
| 245 | #define strlen_user(str) strnlen_user(str, 32767) | 246 | static inline long __must_check strlen_user(const char *src) |
| 247 | { | ||
| 248 | if (!access_ok(VERIFY_READ, src, 1)) | ||
| 249 | return 0; | ||
| 250 | return strlen(src) + 1; | ||
| 251 | } | ||
| 246 | 252 | ||
| 247 | /* | 253 | /* |
| 248 | * Zero Userspace | 254 | * Zero Userspace |
| @@ -251,6 +257,8 @@ static inline long strnlen_user(const char *src, long n) | |||
| 251 | static inline unsigned long __must_check | 257 | static inline unsigned long __must_check |
| 252 | __clear_user(void *to, unsigned long n) | 258 | __clear_user(void *to, unsigned long n) |
| 253 | { | 259 | { |
| 260 | if (!access_ok(VERIFY_WRITE, to, n)) | ||
| 261 | return n; | ||
| 254 | memset(to, 0, n); | 262 | memset(to, 0, n); |
| 255 | return 0; | 263 | return 0; |
| 256 | } | 264 | } |
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index 8531693fb48d..763ed84ba459 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c | |||
| @@ -20,6 +20,11 @@ | |||
| 20 | #include <asm/dma.h> | 20 | #include <asm/dma.h> |
| 21 | #include <asm/uaccess.h> | 21 | #include <asm/uaccess.h> |
| 22 | 22 | ||
| 23 | /* | ||
| 24 | * To make sure we work around 05000119 - we always check DMA_DONE bit, | ||
| 25 | * never the DMA_RUN bit | ||
| 26 | */ | ||
| 27 | |||
| 23 | struct dma_channel dma_ch[MAX_DMA_CHANNELS]; | 28 | struct dma_channel dma_ch[MAX_DMA_CHANNELS]; |
| 24 | EXPORT_SYMBOL(dma_ch); | 29 | EXPORT_SYMBOL(dma_ch); |
| 25 | 30 | ||
| @@ -232,6 +237,87 @@ void blackfin_dma_resume(void) | |||
| 232 | void __init blackfin_dma_early_init(void) | 237 | void __init blackfin_dma_early_init(void) |
| 233 | { | 238 | { |
| 234 | bfin_write_MDMA_S0_CONFIG(0); | 239 | bfin_write_MDMA_S0_CONFIG(0); |
| 240 | bfin_write_MDMA_S1_CONFIG(0); | ||
| 241 | } | ||
| 242 | |||
| 243 | void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size) | ||
| 244 | { | ||
| 245 | unsigned long dst = (unsigned long)pdst; | ||
| 246 | unsigned long src = (unsigned long)psrc; | ||
| 247 | struct dma_register *dst_ch, *src_ch; | ||
| 248 | |||
| 249 | /* We assume that everything is 4 byte aligned, so include | ||
| 250 | * a basic sanity check | ||
| 251 | */ | ||
| 252 | BUG_ON(dst % 4); | ||
| 253 | BUG_ON(src % 4); | ||
| 254 | BUG_ON(size % 4); | ||
| 255 | |||
| 256 | /* Force a sync in case a previous config reset on this channel | ||
| 257 | * occurred. This is needed so subsequent writes to DMA registers | ||
| 258 | * are not spuriously lost/corrupted. | ||
| 259 | */ | ||
| 260 | __builtin_bfin_ssync(); | ||
| 261 | |||
| 262 | src_ch = 0; | ||
| 263 | /* Find an avalible memDMA channel */ | ||
| 264 | while (1) { | ||
| 265 | if (!src_ch || src_ch == (struct dma_register *)MDMA_S1_NEXT_DESC_PTR) { | ||
| 266 | dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR; | ||
| 267 | src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR; | ||
| 268 | } else { | ||
| 269 | dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR; | ||
| 270 | src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR; | ||
| 271 | } | ||
| 272 | |||
| 273 | if (!bfin_read16(&src_ch->cfg)) { | ||
| 274 | break; | ||
| 275 | } else { | ||
| 276 | if (bfin_read16(&src_ch->irq_status) & DMA_DONE) | ||
| 277 | bfin_write16(&src_ch->cfg, 0); | ||
| 278 | } | ||
| 279 | |||
| 280 | } | ||
| 281 | |||
| 282 | /* Destination */ | ||
| 283 | bfin_write32(&dst_ch->start_addr, dst); | ||
| 284 | bfin_write16(&dst_ch->x_count, size >> 2); | ||
| 285 | bfin_write16(&dst_ch->x_modify, 1 << 2); | ||
| 286 | bfin_write16(&dst_ch->irq_status, DMA_DONE | DMA_ERR); | ||
| 287 | |||
| 288 | /* Source */ | ||
| 289 | bfin_write32(&src_ch->start_addr, src); | ||
| 290 | bfin_write16(&src_ch->x_count, size >> 2); | ||
| 291 | bfin_write16(&src_ch->x_modify, 1 << 2); | ||
| 292 | bfin_write16(&src_ch->irq_status, DMA_DONE | DMA_ERR); | ||
| 293 | |||
| 294 | /* Enable */ | ||
| 295 | bfin_write16(&src_ch->cfg, DMAEN | WDSIZE_32); | ||
| 296 | bfin_write16(&dst_ch->cfg, WNR | DI_EN | DMAEN | WDSIZE_32); | ||
| 297 | |||
| 298 | /* Since we are atomic now, don't use the workaround ssync */ | ||
| 299 | __builtin_bfin_ssync(); | ||
| 300 | } | ||
| 301 | |||
| 302 | void __init early_dma_memcpy_done(void) | ||
| 303 | { | ||
| 304 | while ((bfin_read_MDMA_S0_CONFIG() && !(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) || | ||
| 305 | (bfin_read_MDMA_S1_CONFIG() && !(bfin_read_MDMA_D1_IRQ_STATUS() & DMA_DONE))) | ||
| 306 | continue; | ||
| 307 | |||
| 308 | bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); | ||
| 309 | bfin_write_MDMA_D1_IRQ_STATUS(DMA_DONE | DMA_ERR); | ||
| 310 | /* | ||
| 311 | * Now that DMA is done, we would normally flush cache, but | ||
| 312 | * i/d cache isn't running this early, so we don't bother, | ||
| 313 | * and just clear out the DMA channel for next time | ||
| 314 | */ | ||
| 315 | bfin_write_MDMA_S0_CONFIG(0); | ||
| 316 | bfin_write_MDMA_S1_CONFIG(0); | ||
| 317 | bfin_write_MDMA_D0_CONFIG(0); | ||
| 318 | bfin_write_MDMA_D1_CONFIG(0); | ||
| 319 | |||
| 320 | __builtin_bfin_ssync(); | ||
| 235 | } | 321 | } |
| 236 | 322 | ||
| 237 | /** | 323 | /** |
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index a0678da40532..beffa00a93c3 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c | |||
| @@ -313,15 +313,6 @@ inline void portmux_setup(unsigned short per) | |||
| 313 | # define portmux_setup(...) do { } while (0) | 313 | # define portmux_setup(...) do { } while (0) |
| 314 | #endif | 314 | #endif |
| 315 | 315 | ||
| 316 | static int __init bfin_gpio_init(void) | ||
| 317 | { | ||
| 318 | printk(KERN_INFO "Blackfin GPIO Controller\n"); | ||
| 319 | |||
| 320 | return 0; | ||
| 321 | } | ||
| 322 | arch_initcall(bfin_gpio_init); | ||
| 323 | |||
| 324 | |||
| 325 | #ifndef CONFIG_BF54x | 316 | #ifndef CONFIG_BF54x |
| 326 | /*********************************************************** | 317 | /*********************************************************** |
| 327 | * | 318 | * |
| @@ -1021,15 +1012,6 @@ int bfin_gpio_irq_request(unsigned gpio, const char *label) | |||
| 1021 | 1012 | ||
| 1022 | local_irq_save_hw(flags); | 1013 | local_irq_save_hw(flags); |
| 1023 | 1014 | ||
| 1024 | if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) { | ||
| 1025 | if (system_state == SYSTEM_BOOTING) | ||
| 1026 | dump_stack(); | ||
| 1027 | printk(KERN_ERR | ||
| 1028 | "bfin-gpio: GPIO %d is already reserved as gpio-irq !\n", | ||
| 1029 | gpio); | ||
| 1030 | local_irq_restore_hw(flags); | ||
| 1031 | return -EBUSY; | ||
| 1032 | } | ||
| 1033 | if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) { | 1015 | if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) { |
| 1034 | if (system_state == SYSTEM_BOOTING) | 1016 | if (system_state == SYSTEM_BOOTING) |
| 1035 | dump_stack(); | 1017 | dump_stack(); |
diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c index 01f917d58b59..53e893ff708a 100644 --- a/arch/blackfin/kernel/bfin_ksyms.c +++ b/arch/blackfin/kernel/bfin_ksyms.c | |||
| @@ -16,7 +16,6 @@ EXPORT_SYMBOL(bfin_return_from_exception); | |||
| 16 | 16 | ||
| 17 | /* All the Blackfin cache functions: mach-common/cache.S */ | 17 | /* All the Blackfin cache functions: mach-common/cache.S */ |
| 18 | EXPORT_SYMBOL(blackfin_dcache_invalidate_range); | 18 | EXPORT_SYMBOL(blackfin_dcache_invalidate_range); |
| 19 | EXPORT_SYMBOL(blackfin_icache_dcache_flush_range); | ||
| 20 | EXPORT_SYMBOL(blackfin_icache_flush_range); | 19 | EXPORT_SYMBOL(blackfin_icache_flush_range); |
| 21 | EXPORT_SYMBOL(blackfin_dcache_flush_range); | 20 | EXPORT_SYMBOL(blackfin_dcache_flush_range); |
| 22 | EXPORT_SYMBOL(blackfin_dflush_page); | 21 | EXPORT_SYMBOL(blackfin_dflush_page); |
diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c index c6ff947f9d37..d5a86c3017f7 100644 --- a/arch/blackfin/kernel/cplb-mpu/cacheinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cacheinit.c | |||
| @@ -55,7 +55,14 @@ void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl) | |||
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | ctrl = bfin_read_DMEM_CONTROL(); | 57 | ctrl = bfin_read_DMEM_CONTROL(); |
| 58 | ctrl |= DMEM_CNTR; | 58 | |
| 59 | /* | ||
| 60 | * Anomaly notes: | ||
| 61 | * 05000287 - We implement workaround #2 - Change the DMEM_CONTROL | ||
| 62 | * register, so that the port preferences for DAG0 and DAG1 are set | ||
| 63 | * to port B | ||
| 64 | */ | ||
| 65 | ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0); | ||
| 59 | bfin_write_DMEM_CONTROL(ctrl); | 66 | bfin_write_DMEM_CONTROL(ctrl); |
| 60 | SSYNC(); | 67 | SSYNC(); |
| 61 | } | 68 | } |
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index 3e329a6ce041..c006a44527bf 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c | |||
| @@ -64,7 +64,7 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
| 64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | 64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
| 65 | 65 | ||
| 66 | icplb_tbl[cpu][i_i].addr = 0; | 66 | icplb_tbl[cpu][i_i].addr = 0; |
| 67 | icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; | 67 | icplb_tbl[cpu][i_i++].data = CPLB_VALID | i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; |
| 68 | 68 | ||
| 69 | /* Cover kernel memory with 4M pages. */ | 69 | /* Cover kernel memory with 4M pages. */ |
| 70 | addr = 0; | 70 | addr = 0; |
diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c index c6ff947f9d37..d5a86c3017f7 100644 --- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c | |||
| @@ -55,7 +55,14 @@ void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl) | |||
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | ctrl = bfin_read_DMEM_CONTROL(); | 57 | ctrl = bfin_read_DMEM_CONTROL(); |
| 58 | ctrl |= DMEM_CNTR; | 58 | |
| 59 | /* | ||
| 60 | * Anomaly notes: | ||
| 61 | * 05000287 - We implement workaround #2 - Change the DMEM_CONTROL | ||
| 62 | * register, so that the port preferences for DAG0 and DAG1 are set | ||
| 63 | * to port B | ||
| 64 | */ | ||
| 65 | ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0); | ||
| 59 | bfin_write_DMEM_CONTROL(ctrl); | 66 | bfin_write_DMEM_CONTROL(ctrl); |
| 60 | SSYNC(); | 67 | SSYNC(); |
| 61 | } | 68 | } |
diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c index c8ad051742e2..3302719173ca 100644 --- a/arch/blackfin/kernel/early_printk.c +++ b/arch/blackfin/kernel/early_printk.c | |||
| @@ -178,25 +178,15 @@ int __init setup_early_printk(char *buf) | |||
| 178 | 178 | ||
| 179 | asmlinkage void __init init_early_exception_vectors(void) | 179 | asmlinkage void __init init_early_exception_vectors(void) |
| 180 | { | 180 | { |
| 181 | u32 evt; | ||
| 181 | SSYNC(); | 182 | SSYNC(); |
| 182 | 183 | ||
| 183 | /* cannot program in software: | 184 | /* cannot program in software: |
| 184 | * evt0 - emulation (jtag) | 185 | * evt0 - emulation (jtag) |
| 185 | * evt1 - reset | 186 | * evt1 - reset |
| 186 | */ | 187 | */ |
| 187 | bfin_write_EVT2(early_trap); | 188 | for (evt = EVT2; evt <= EVT15; evt += 4) |
| 188 | bfin_write_EVT3(early_trap); | 189 | bfin_write32(evt, early_trap); |
| 189 | bfin_write_EVT5(early_trap); | ||
| 190 | bfin_write_EVT6(early_trap); | ||
| 191 | bfin_write_EVT7(early_trap); | ||
| 192 | bfin_write_EVT8(early_trap); | ||
| 193 | bfin_write_EVT9(early_trap); | ||
| 194 | bfin_write_EVT10(early_trap); | ||
| 195 | bfin_write_EVT11(early_trap); | ||
| 196 | bfin_write_EVT12(early_trap); | ||
| 197 | bfin_write_EVT13(early_trap); | ||
| 198 | bfin_write_EVT14(early_trap); | ||
| 199 | bfin_write_EVT15(early_trap); | ||
| 200 | CSYNC(); | 190 | CSYNC(); |
| 201 | 191 | ||
| 202 | /* Set all the return from interrupt, exception, NMI to a known place | 192 | /* Set all the return from interrupt, exception, NMI to a known place |
diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c index 3a3e9615b002..7281a91d26b5 100644 --- a/arch/blackfin/kernel/gptimers.c +++ b/arch/blackfin/kernel/gptimers.c | |||
| @@ -189,10 +189,10 @@ void set_gptimer_status(int group, uint32_t value) | |||
| 189 | } | 189 | } |
| 190 | EXPORT_SYMBOL(set_gptimer_status); | 190 | EXPORT_SYMBOL(set_gptimer_status); |
| 191 | 191 | ||
| 192 | uint16_t get_gptimer_intr(int timer_id) | 192 | int get_gptimer_intr(int timer_id) |
| 193 | { | 193 | { |
| 194 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); | 194 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); |
| 195 | return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]) ? 1 : 0; | 195 | return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]); |
| 196 | } | 196 | } |
| 197 | EXPORT_SYMBOL(get_gptimer_intr); | 197 | EXPORT_SYMBOL(get_gptimer_intr); |
| 198 | 198 | ||
| @@ -203,10 +203,10 @@ void clear_gptimer_intr(int timer_id) | |||
| 203 | } | 203 | } |
| 204 | EXPORT_SYMBOL(clear_gptimer_intr); | 204 | EXPORT_SYMBOL(clear_gptimer_intr); |
| 205 | 205 | ||
| 206 | uint16_t get_gptimer_over(int timer_id) | 206 | int get_gptimer_over(int timer_id) |
| 207 | { | 207 | { |
| 208 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); | 208 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); |
| 209 | return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]) ? 1 : 0; | 209 | return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]); |
| 210 | } | 210 | } |
| 211 | EXPORT_SYMBOL(get_gptimer_over); | 211 | EXPORT_SYMBOL(get_gptimer_over); |
| 212 | 212 | ||
| @@ -217,6 +217,13 @@ void clear_gptimer_over(int timer_id) | |||
| 217 | } | 217 | } |
| 218 | EXPORT_SYMBOL(clear_gptimer_over); | 218 | EXPORT_SYMBOL(clear_gptimer_over); |
| 219 | 219 | ||
| 220 | int get_gptimer_run(int timer_id) | ||
| 221 | { | ||
| 222 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); | ||
| 223 | return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & trun_mask[timer_id]); | ||
| 224 | } | ||
| 225 | EXPORT_SYMBOL(get_gptimer_run); | ||
| 226 | |||
| 220 | void set_gptimer_config(int timer_id, uint16_t config) | 227 | void set_gptimer_config(int timer_id, uint16_t config) |
| 221 | { | 228 | { |
| 222 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); | 229 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); |
| @@ -244,7 +251,7 @@ void enable_gptimers(uint16_t mask) | |||
| 244 | } | 251 | } |
| 245 | EXPORT_SYMBOL(enable_gptimers); | 252 | EXPORT_SYMBOL(enable_gptimers); |
| 246 | 253 | ||
| 247 | void disable_gptimers(uint16_t mask) | 254 | static void _disable_gptimers(uint16_t mask) |
| 248 | { | 255 | { |
| 249 | int i; | 256 | int i; |
| 250 | uint16_t m = mask; | 257 | uint16_t m = mask; |
| @@ -253,6 +260,12 @@ void disable_gptimers(uint16_t mask) | |||
| 253 | group_regs[i]->disable = m & 0xFF; | 260 | group_regs[i]->disable = m & 0xFF; |
| 254 | m >>= 8; | 261 | m >>= 8; |
| 255 | } | 262 | } |
| 263 | } | ||
| 264 | |||
| 265 | void disable_gptimers(uint16_t mask) | ||
| 266 | { | ||
| 267 | int i; | ||
| 268 | _disable_gptimers(mask); | ||
| 256 | for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i) | 269 | for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i) |
| 257 | if (mask & (1 << i)) | 270 | if (mask & (1 << i)) |
| 258 | group_regs[BFIN_TIMER_OCTET(i)]->status |= trun_mask[i]; | 271 | group_regs[BFIN_TIMER_OCTET(i)]->status |= trun_mask[i]; |
| @@ -260,6 +273,13 @@ void disable_gptimers(uint16_t mask) | |||
| 260 | } | 273 | } |
| 261 | EXPORT_SYMBOL(disable_gptimers); | 274 | EXPORT_SYMBOL(disable_gptimers); |
| 262 | 275 | ||
| 276 | void disable_gptimers_sync(uint16_t mask) | ||
| 277 | { | ||
| 278 | _disable_gptimers(mask); | ||
| 279 | SSYNC(); | ||
| 280 | } | ||
| 281 | EXPORT_SYMBOL(disable_gptimers_sync); | ||
| 282 | |||
| 263 | void set_gptimer_pulse_hi(int timer_id) | 283 | void set_gptimer_pulse_hi(int timer_id) |
| 264 | { | 284 | { |
| 265 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); | 285 | tassert(timer_id < MAX_BLACKFIN_GPTIMERS); |
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c index a5de8d45424c..5fc424803a17 100644 --- a/arch/blackfin/kernel/ipipe.c +++ b/arch/blackfin/kernel/ipipe.c | |||
| @@ -167,7 +167,7 @@ int __ipipe_check_root(void) | |||
| 167 | void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) | 167 | void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) |
| 168 | { | 168 | { |
| 169 | struct irq_desc *desc = irq_to_desc(irq); | 169 | struct irq_desc *desc = irq_to_desc(irq); |
| 170 | int prio = desc->ic_prio; | 170 | int prio = __ipipe_get_irq_priority(irq); |
| 171 | 171 | ||
| 172 | desc->depth = 0; | 172 | desc->depth = 0; |
| 173 | if (ipd != &ipipe_root && | 173 | if (ipd != &ipipe_root && |
| @@ -178,8 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc); | |||
| 178 | 178 | ||
| 179 | void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) | 179 | void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) |
| 180 | { | 180 | { |
| 181 | struct irq_desc *desc = irq_to_desc(irq); | 181 | int prio = __ipipe_get_irq_priority(irq); |
| 182 | int prio = desc->ic_prio; | ||
| 183 | 182 | ||
| 184 | if (ipd != &ipipe_root && | 183 | if (ipd != &ipipe_root && |
| 185 | atomic_dec_and_test(&__ipipe_irq_lvdepth[prio])) | 184 | atomic_dec_and_test(&__ipipe_irq_lvdepth[prio])) |
| @@ -310,12 +309,16 @@ int ipipe_trigger_irq(unsigned irq) | |||
| 310 | 309 | ||
| 311 | asmlinkage void __ipipe_sync_root(void) | 310 | asmlinkage void __ipipe_sync_root(void) |
| 312 | { | 311 | { |
| 312 | void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; | ||
| 313 | unsigned long flags; | 313 | unsigned long flags; |
| 314 | 314 | ||
| 315 | BUG_ON(irqs_disabled()); | 315 | BUG_ON(irqs_disabled()); |
| 316 | 316 | ||
| 317 | local_irq_save_hw(flags); | 317 | local_irq_save_hw(flags); |
| 318 | 318 | ||
| 319 | if (irq_tail_hook) | ||
| 320 | irq_tail_hook(); | ||
| 321 | |||
| 319 | clear_thread_flag(TIF_IRQ_SYNC); | 322 | clear_thread_flag(TIF_IRQ_SYNC); |
| 320 | 323 | ||
| 321 | if (ipipe_root_cpudom_var(irqpend_himask) != 0) | 324 | if (ipipe_root_cpudom_var(irqpend_himask) != 0) |
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 401bd32aa499..6e31e935bb31 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c | |||
| @@ -59,12 +59,14 @@ static struct irq_chip bad_chip = { | |||
| 59 | .unmask = dummy_mask_unmask_irq, | 59 | .unmask = dummy_mask_unmask_irq, |
| 60 | }; | 60 | }; |
| 61 | 61 | ||
| 62 | static int bad_stats; | ||
| 62 | static struct irq_desc bad_irq_desc = { | 63 | static struct irq_desc bad_irq_desc = { |
| 63 | .status = IRQ_DISABLED, | 64 | .status = IRQ_DISABLED, |
| 64 | .chip = &bad_chip, | 65 | .chip = &bad_chip, |
| 65 | .handle_irq = handle_bad_irq, | 66 | .handle_irq = handle_bad_irq, |
| 66 | .depth = 1, | 67 | .depth = 1, |
| 67 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), | 68 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), |
| 69 | .kstat_irqs = &bad_stats, | ||
| 68 | #ifdef CONFIG_SMP | 70 | #ifdef CONFIG_SMP |
| 69 | .affinity = CPU_MASK_ALL | 71 | .affinity = CPU_MASK_ALL |
| 70 | #endif | 72 | #endif |
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index b163f6d3330d..da28f796ad78 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c | |||
| @@ -466,7 +466,7 @@ static int validate_memory_access_address(unsigned long addr, int size) | |||
| 466 | int cpu = raw_smp_processor_id(); | 466 | int cpu = raw_smp_processor_id(); |
| 467 | 467 | ||
| 468 | if (size < 0) | 468 | if (size < 0) |
| 469 | return EFAULT; | 469 | return -EFAULT; |
| 470 | if (addr >= 0x1000 && (addr + size) <= physical_mem_end) | 470 | if (addr >= 0x1000 && (addr + size) <= physical_mem_end) |
| 471 | return 0; | 471 | return 0; |
| 472 | if (addr >= SYSMMR_BASE) | 472 | if (addr >= SYSMMR_BASE) |
| @@ -498,7 +498,7 @@ static int validate_memory_access_address(unsigned long addr, int size) | |||
| 498 | if (IN_MEM(addr, size, L2_START, L2_LENGTH)) | 498 | if (IN_MEM(addr, size, L2_START, L2_LENGTH)) |
| 499 | return 0; | 499 | return 0; |
| 500 | 500 | ||
| 501 | return EFAULT; | 501 | return -EFAULT; |
| 502 | } | 502 | } |
| 503 | 503 | ||
| 504 | /* | 504 | /* |
| @@ -508,14 +508,15 @@ static int validate_memory_access_address(unsigned long addr, int size) | |||
| 508 | int kgdb_mem2hex(char *mem, char *buf, int count) | 508 | int kgdb_mem2hex(char *mem, char *buf, int count) |
| 509 | { | 509 | { |
| 510 | char *tmp; | 510 | char *tmp; |
| 511 | int err = 0; | 511 | int err; |
| 512 | unsigned char *pch; | 512 | unsigned char *pch; |
| 513 | unsigned short mmr16; | 513 | unsigned short mmr16; |
| 514 | unsigned long mmr32; | 514 | unsigned long mmr32; |
| 515 | int cpu = raw_smp_processor_id(); | 515 | int cpu = raw_smp_processor_id(); |
| 516 | 516 | ||
| 517 | if (validate_memory_access_address((unsigned long)mem, count)) | 517 | err = validate_memory_access_address((unsigned long)mem, count); |
| 518 | return EFAULT; | 518 | if (err) |
| 519 | return err; | ||
| 519 | 520 | ||
| 520 | /* | 521 | /* |
| 521 | * We use the upper half of buf as an intermediate buffer for the | 522 | * We use the upper half of buf as an intermediate buffer for the |
| @@ -533,7 +534,7 @@ int kgdb_mem2hex(char *mem, char *buf, int count) | |||
| 533 | *tmp++ = *pch++; | 534 | *tmp++ = *pch++; |
| 534 | tmp -= 2; | 535 | tmp -= 2; |
| 535 | } else | 536 | } else |
| 536 | err = EFAULT; | 537 | err = -EFAULT; |
| 537 | break; | 538 | break; |
| 538 | case 4: | 539 | case 4: |
| 539 | if ((unsigned int)mem % 4 == 0) { | 540 | if ((unsigned int)mem % 4 == 0) { |
| @@ -545,10 +546,10 @@ int kgdb_mem2hex(char *mem, char *buf, int count) | |||
| 545 | *tmp++ = *pch++; | 546 | *tmp++ = *pch++; |
| 546 | tmp -= 4; | 547 | tmp -= 4; |
| 547 | } else | 548 | } else |
| 548 | err = EFAULT; | 549 | err = -EFAULT; |
| 549 | break; | 550 | break; |
| 550 | default: | 551 | default: |
| 551 | err = EFAULT; | 552 | err = -EFAULT; |
| 552 | } | 553 | } |
| 553 | } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH)) | 554 | } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH)) |
| 554 | #ifdef CONFIG_SMP | 555 | #ifdef CONFIG_SMP |
| @@ -557,7 +558,7 @@ int kgdb_mem2hex(char *mem, char *buf, int count) | |||
| 557 | ) { | 558 | ) { |
| 558 | /* access L1 instruction SRAM*/ | 559 | /* access L1 instruction SRAM*/ |
| 559 | if (dma_memcpy(tmp, mem, count) == NULL) | 560 | if (dma_memcpy(tmp, mem, count) == NULL) |
| 560 | err = EFAULT; | 561 | err = -EFAULT; |
| 561 | } else | 562 | } else |
| 562 | err = probe_kernel_read(tmp, mem, count); | 563 | err = probe_kernel_read(tmp, mem, count); |
| 563 | 564 | ||
| @@ -585,24 +586,24 @@ int kgdb_ebin2mem(char *buf, char *mem, int count) | |||
| 585 | char *tmp_new; | 586 | char *tmp_new; |
| 586 | unsigned short *mmr16; | 587 | unsigned short *mmr16; |
| 587 | unsigned long *mmr32; | 588 | unsigned long *mmr32; |
| 588 | int err = 0; | 589 | int err; |
| 589 | int size = 0; | 590 | int size; |
| 590 | int cpu = raw_smp_processor_id(); | 591 | int cpu = raw_smp_processor_id(); |
| 591 | 592 | ||
| 592 | tmp_old = tmp_new = buf; | 593 | tmp_old = tmp_new = buf; |
| 593 | 594 | ||
| 594 | while (count-- > 0) { | 595 | for (size = 0; size < count; ++size) { |
| 595 | if (*tmp_old == 0x7d) | 596 | if (*tmp_old == 0x7d) |
| 596 | *tmp_new = *(++tmp_old) ^ 0x20; | 597 | *tmp_new = *(++tmp_old) ^ 0x20; |
| 597 | else | 598 | else |
| 598 | *tmp_new = *tmp_old; | 599 | *tmp_new = *tmp_old; |
| 599 | tmp_new++; | 600 | tmp_new++; |
| 600 | tmp_old++; | 601 | tmp_old++; |
| 601 | size++; | ||
| 602 | } | 602 | } |
| 603 | 603 | ||
| 604 | if (validate_memory_access_address((unsigned long)mem, size)) | 604 | err = validate_memory_access_address((unsigned long)mem, size); |
| 605 | return EFAULT; | 605 | if (err) |
| 606 | return err; | ||
| 606 | 607 | ||
| 607 | if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/ | 608 | if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/ |
| 608 | switch (size) { | 609 | switch (size) { |
| @@ -611,17 +612,17 @@ int kgdb_ebin2mem(char *buf, char *mem, int count) | |||
| 611 | mmr16 = (unsigned short *)buf; | 612 | mmr16 = (unsigned short *)buf; |
| 612 | *(unsigned short *)mem = *mmr16; | 613 | *(unsigned short *)mem = *mmr16; |
| 613 | } else | 614 | } else |
| 614 | return EFAULT; | 615 | err = -EFAULT; |
| 615 | break; | 616 | break; |
| 616 | case 4: | 617 | case 4: |
| 617 | if ((unsigned int)mem % 4 == 0) { | 618 | if ((unsigned int)mem % 4 == 0) { |
| 618 | mmr32 = (unsigned long *)buf; | 619 | mmr32 = (unsigned long *)buf; |
| 619 | *(unsigned long *)mem = *mmr32; | 620 | *(unsigned long *)mem = *mmr32; |
| 620 | } else | 621 | } else |
| 621 | return EFAULT; | 622 | err = -EFAULT; |
| 622 | break; | 623 | break; |
| 623 | default: | 624 | default: |
| 624 | return EFAULT; | 625 | err = -EFAULT; |
| 625 | } | 626 | } |
| 626 | } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH)) | 627 | } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH)) |
| 627 | #ifdef CONFIG_SMP | 628 | #ifdef CONFIG_SMP |
| @@ -630,7 +631,7 @@ int kgdb_ebin2mem(char *buf, char *mem, int count) | |||
| 630 | ) { | 631 | ) { |
| 631 | /* access L1 instruction SRAM */ | 632 | /* access L1 instruction SRAM */ |
| 632 | if (dma_memcpy(mem, buf, size) == NULL) | 633 | if (dma_memcpy(mem, buf, size) == NULL) |
| 633 | err = EFAULT; | 634 | err = -EFAULT; |
| 634 | } else | 635 | } else |
| 635 | err = probe_kernel_write(mem, buf, size); | 636 | err = probe_kernel_write(mem, buf, size); |
| 636 | 637 | ||
| @@ -648,10 +649,12 @@ int kgdb_hex2mem(char *buf, char *mem, int count) | |||
| 648 | char *tmp_hex; | 649 | char *tmp_hex; |
| 649 | unsigned short *mmr16; | 650 | unsigned short *mmr16; |
| 650 | unsigned long *mmr32; | 651 | unsigned long *mmr32; |
| 652 | int err; | ||
| 651 | int cpu = raw_smp_processor_id(); | 653 | int cpu = raw_smp_processor_id(); |
| 652 | 654 | ||
| 653 | if (validate_memory_access_address((unsigned long)mem, count)) | 655 | err = validate_memory_access_address((unsigned long)mem, count); |
| 654 | return EFAULT; | 656 | if (err) |
| 657 | return err; | ||
| 655 | 658 | ||
| 656 | /* | 659 | /* |
| 657 | * We use the upper half of buf as an intermediate buffer for the | 660 | * We use the upper half of buf as an intermediate buffer for the |
| @@ -673,17 +676,17 @@ int kgdb_hex2mem(char *buf, char *mem, int count) | |||
| 673 | mmr16 = (unsigned short *)tmp_raw; | 676 | mmr16 = (unsigned short *)tmp_raw; |
| 674 | *(unsigned short *)mem = *mmr16; | 677 | *(unsigned short *)mem = *mmr16; |
| 675 | } else | 678 | } else |
| 676 | return EFAULT; | 679 | err = -EFAULT; |
| 677 | break; | 680 | break; |
| 678 | case 4: | 681 | case 4: |
| 679 | if ((unsigned int)mem % 4 == 0) { | 682 | if ((unsigned int)mem % 4 == 0) { |
| 680 | mmr32 = (unsigned long *)tmp_raw; | 683 | mmr32 = (unsigned long *)tmp_raw; |
| 681 | *(unsigned long *)mem = *mmr32; | 684 | *(unsigned long *)mem = *mmr32; |
| 682 | } else | 685 | } else |
| 683 | return EFAULT; | 686 | err = -EFAULT; |
| 684 | break; | 687 | break; |
| 685 | default: | 688 | default: |
| 686 | return EFAULT; | 689 | err = -EFAULT; |
| 687 | } | 690 | } |
| 688 | } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH)) | 691 | } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH)) |
| 689 | #ifdef CONFIG_SMP | 692 | #ifdef CONFIG_SMP |
| @@ -692,10 +695,11 @@ int kgdb_hex2mem(char *buf, char *mem, int count) | |||
| 692 | ) { | 695 | ) { |
| 693 | /* access L1 instruction SRAM */ | 696 | /* access L1 instruction SRAM */ |
| 694 | if (dma_memcpy(mem, tmp_raw, count) == NULL) | 697 | if (dma_memcpy(mem, tmp_raw, count) == NULL) |
| 695 | return EFAULT; | 698 | err = -EFAULT; |
| 696 | } else | 699 | } else |
| 697 | return probe_kernel_write(mem, tmp_raw, count); | 700 | err = probe_kernel_write(mem, tmp_raw, count); |
| 698 | return 0; | 701 | |
| 702 | return err; | ||
| 699 | } | 703 | } |
| 700 | 704 | ||
| 701 | int kgdb_validate_break_address(unsigned long addr) | 705 | int kgdb_validate_break_address(unsigned long addr) |
| @@ -715,7 +719,7 @@ int kgdb_validate_break_address(unsigned long addr) | |||
| 715 | if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH)) | 719 | if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH)) |
| 716 | return 0; | 720 | return 0; |
| 717 | 721 | ||
| 718 | return EFAULT; | 722 | return -EFAULT; |
| 719 | } | 723 | } |
| 720 | 724 | ||
| 721 | int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr) | 725 | int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr) |
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c index 1bd7f2d018a8..d5aee3626688 100644 --- a/arch/blackfin/kernel/module.c +++ b/arch/blackfin/kernel/module.c | |||
| @@ -201,8 +201,8 @@ apply_relocate(Elf_Shdr * sechdrs, const char *strtab, | |||
| 201 | /* Arithmetic relocations are handled. */ | 201 | /* Arithmetic relocations are handled. */ |
| 202 | /* We do not expect LSETUP to be split and hence is not */ | 202 | /* We do not expect LSETUP to be split and hence is not */ |
| 203 | /* handled. */ | 203 | /* handled. */ |
| 204 | /* R_byte and R_byte2 are also not handled as the gas */ | 204 | /* R_BFIN_BYTE and R_BFIN_BYTE2 are also not handled as the */ |
| 205 | /* does not generate it. */ | 205 | /* gas does not generate it. */ |
| 206 | /*************************************************************************/ | 206 | /*************************************************************************/ |
| 207 | int | 207 | int |
| 208 | apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, | 208 | apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, |
| @@ -243,8 +243,8 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, | |||
| 243 | #endif | 243 | #endif |
| 244 | switch (ELF32_R_TYPE(rel[i].r_info)) { | 244 | switch (ELF32_R_TYPE(rel[i].r_info)) { |
| 245 | 245 | ||
| 246 | case R_pcrel24: | 246 | case R_BFIN_PCREL24: |
| 247 | case R_pcrel24_jump_l: | 247 | case R_BFIN_PCREL24_JUMP_L: |
| 248 | /* Add the value, subtract its postition */ | 248 | /* Add the value, subtract its postition */ |
| 249 | location16 = | 249 | location16 = |
| 250 | (uint16_t *) (sechdrs[sechdrs[relsec].sh_info]. | 250 | (uint16_t *) (sechdrs[sechdrs[relsec].sh_info]. |
| @@ -266,18 +266,18 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, | |||
| 266 | (*location16 & 0xff00) | (value >> 16 & 0x00ff); | 266 | (*location16 & 0xff00) | (value >> 16 & 0x00ff); |
| 267 | *(location16 + 1) = value & 0xffff; | 267 | *(location16 + 1) = value & 0xffff; |
| 268 | break; | 268 | break; |
| 269 | case R_pcrel12_jump: | 269 | case R_BFIN_PCREL12_JUMP: |
| 270 | case R_pcrel12_jump_s: | 270 | case R_BFIN_PCREL12_JUMP_S: |
| 271 | value -= (uint32_t) location32; | 271 | value -= (uint32_t) location32; |
| 272 | value >>= 1; | 272 | value >>= 1; |
| 273 | *location16 = (value & 0xfff); | 273 | *location16 = (value & 0xfff); |
| 274 | break; | 274 | break; |
| 275 | case R_pcrel10: | 275 | case R_BFIN_PCREL10: |
| 276 | value -= (uint32_t) location32; | 276 | value -= (uint32_t) location32; |
| 277 | value >>= 1; | 277 | value >>= 1; |
| 278 | *location16 = (value & 0x3ff); | 278 | *location16 = (value & 0x3ff); |
| 279 | break; | 279 | break; |
| 280 | case R_luimm16: | 280 | case R_BFIN_LUIMM16: |
| 281 | pr_debug("before %x after %x\n", *location16, | 281 | pr_debug("before %x after %x\n", *location16, |
| 282 | (value & 0xffff)); | 282 | (value & 0xffff)); |
| 283 | tmp = (value & 0xffff); | 283 | tmp = (value & 0xffff); |
| @@ -286,7 +286,7 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, | |||
| 286 | } else | 286 | } else |
| 287 | *location16 = tmp; | 287 | *location16 = tmp; |
| 288 | break; | 288 | break; |
| 289 | case R_huimm16: | 289 | case R_BFIN_HUIMM16: |
| 290 | pr_debug("before %x after %x\n", *location16, | 290 | pr_debug("before %x after %x\n", *location16, |
| 291 | ((value >> 16) & 0xffff)); | 291 | ((value >> 16) & 0xffff)); |
| 292 | tmp = ((value >> 16) & 0xffff); | 292 | tmp = ((value >> 16) & 0xffff); |
| @@ -295,10 +295,10 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab, | |||
| 295 | } else | 295 | } else |
| 296 | *location16 = tmp; | 296 | *location16 = tmp; |
| 297 | break; | 297 | break; |
| 298 | case R_rimm16: | 298 | case R_BFIN_RIMM16: |
| 299 | *location16 = (value & 0xffff); | 299 | *location16 = (value & 0xffff); |
| 300 | break; | 300 | break; |
| 301 | case R_byte4_data: | 301 | case R_BFIN_BYTE4_DATA: |
| 302 | pr_debug("before %x after %x\n", *location32, value); | 302 | pr_debug("before %x after %x\n", *location32, value); |
| 303 | *location32 = value; | 303 | *location32 = value; |
| 304 | break; | 304 | break; |
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index e040e03335ea..30d0843ed701 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c | |||
| @@ -322,6 +322,9 @@ void finish_atomic_sections (struct pt_regs *regs) | |||
| 322 | } | 322 | } |
| 323 | 323 | ||
| 324 | #if defined(CONFIG_ACCESS_CHECK) | 324 | #if defined(CONFIG_ACCESS_CHECK) |
| 325 | #ifdef CONFIG_ACCESS_OK_L1 | ||
| 326 | __attribute__((l1_text)) | ||
| 327 | #endif | ||
| 325 | /* Return 1 if access to memory range is OK, 0 otherwise */ | 328 | /* Return 1 if access to memory range is OK, 0 otherwise */ |
| 326 | int _access_ok(unsigned long addr, unsigned long size) | 329 | int _access_ok(unsigned long addr, unsigned long size) |
| 327 | { | 330 | { |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index a58687bdee6a..80447f99c2b5 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
| @@ -18,9 +18,12 @@ | |||
| 18 | #include <linux/tty.h> | 18 | #include <linux/tty.h> |
| 19 | #include <linux/pfn.h> | 19 | #include <linux/pfn.h> |
| 20 | 20 | ||
| 21 | #ifdef CONFIG_MTD_UCLINUX | ||
| 22 | #include <linux/mtd/map.h> | ||
| 21 | #include <linux/ext2_fs.h> | 23 | #include <linux/ext2_fs.h> |
| 22 | #include <linux/cramfs_fs.h> | 24 | #include <linux/cramfs_fs.h> |
| 23 | #include <linux/romfs_fs.h> | 25 | #include <linux/romfs_fs.h> |
| 26 | #endif | ||
| 24 | 27 | ||
| 25 | #include <asm/cplb.h> | 28 | #include <asm/cplb.h> |
| 26 | #include <asm/cacheflush.h> | 29 | #include <asm/cacheflush.h> |
| @@ -45,6 +48,7 @@ EXPORT_SYMBOL(_ramend); | |||
| 45 | EXPORT_SYMBOL(reserved_mem_dcache_on); | 48 | EXPORT_SYMBOL(reserved_mem_dcache_on); |
| 46 | 49 | ||
| 47 | #ifdef CONFIG_MTD_UCLINUX | 50 | #ifdef CONFIG_MTD_UCLINUX |
| 51 | extern struct map_info uclinux_ram_map; | ||
| 48 | unsigned long memory_mtd_end, memory_mtd_start, mtd_size; | 52 | unsigned long memory_mtd_end, memory_mtd_start, mtd_size; |
| 49 | unsigned long _ebss; | 53 | unsigned long _ebss; |
| 50 | EXPORT_SYMBOL(memory_mtd_end); | 54 | EXPORT_SYMBOL(memory_mtd_end); |
| @@ -150,40 +154,45 @@ void __init bfin_relocate_l1_mem(void) | |||
| 150 | unsigned long l1_data_b_length; | 154 | unsigned long l1_data_b_length; |
| 151 | unsigned long l2_length; | 155 | unsigned long l2_length; |
| 152 | 156 | ||
| 157 | /* | ||
| 158 | * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S | ||
| 159 | * we know that everything about l1 text/data is nice and aligned, | ||
| 160 | * so copy by 4 byte chunks, and don't worry about overlapping | ||
| 161 | * src/dest. | ||
| 162 | * | ||
| 163 | * We can't use the dma_memcpy functions, since they can call | ||
| 164 | * scheduler functions which might be in L1 :( and core writes | ||
| 165 | * into L1 instruction cause bad access errors, so we are stuck, | ||
| 166 | * we are required to use DMA, but can't use the common dma | ||
| 167 | * functions. We can't use memcpy either - since that might be | ||
| 168 | * going to be in the relocated L1 | ||
| 169 | */ | ||
| 170 | |||
| 153 | blackfin_dma_early_init(); | 171 | blackfin_dma_early_init(); |
| 154 | 172 | ||
| 173 | /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */ | ||
| 155 | l1_code_length = _etext_l1 - _stext_l1; | 174 | l1_code_length = _etext_l1 - _stext_l1; |
| 156 | if (l1_code_length > L1_CODE_LENGTH) | 175 | if (l1_code_length) |
| 157 | panic("L1 Instruction SRAM Overflow\n"); | 176 | early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length); |
| 158 | /* cannot complain as printk is not available as yet. | ||
| 159 | * But we can continue booting and complain later! | ||
| 160 | */ | ||
| 161 | |||
| 162 | /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */ | ||
| 163 | dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length); | ||
| 164 | 177 | ||
| 178 | /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */ | ||
| 165 | l1_data_a_length = _sbss_l1 - _sdata_l1; | 179 | l1_data_a_length = _sbss_l1 - _sdata_l1; |
| 166 | if (l1_data_a_length > L1_DATA_A_LENGTH) | 180 | if (l1_data_a_length) |
| 167 | panic("L1 Data SRAM Bank A Overflow\n"); | 181 | early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length); |
| 168 | |||
| 169 | /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */ | ||
| 170 | dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length); | ||
| 171 | 182 | ||
| 183 | /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */ | ||
| 172 | l1_data_b_length = _sbss_b_l1 - _sdata_b_l1; | 184 | l1_data_b_length = _sbss_b_l1 - _sdata_b_l1; |
| 173 | if (l1_data_b_length > L1_DATA_B_LENGTH) | 185 | if (l1_data_b_length) |
| 174 | panic("L1 Data SRAM Bank B Overflow\n"); | 186 | early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + |
| 175 | |||
| 176 | /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */ | ||
| 177 | dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + | ||
| 178 | l1_data_a_length, l1_data_b_length); | 187 | l1_data_a_length, l1_data_b_length); |
| 179 | 188 | ||
| 189 | early_dma_memcpy_done(); | ||
| 190 | |||
| 191 | /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */ | ||
| 180 | if (L2_LENGTH != 0) { | 192 | if (L2_LENGTH != 0) { |
| 181 | l2_length = _sbss_l2 - _stext_l2; | 193 | l2_length = _sbss_l2 - _stext_l2; |
| 182 | if (l2_length > L2_LENGTH) | 194 | if (l2_length) |
| 183 | panic("L2 SRAM Overflow\n"); | 195 | memcpy(_stext_l2, _l2_lma_start, l2_length); |
| 184 | |||
| 185 | /* Copy _stext_l2 to _edata_l2 to L2 SRAM */ | ||
| 186 | dma_memcpy(_stext_l2, _l2_lma_start, l2_length); | ||
| 187 | } | 196 | } |
| 188 | } | 197 | } |
| 189 | 198 | ||
| @@ -472,7 +481,7 @@ static __init void memory_setup(void) | |||
| 472 | 481 | ||
| 473 | if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) { | 482 | if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) { |
| 474 | console_init(); | 483 | console_init(); |
| 475 | panic("DMA region exceeds memory limit: %lu.\n", | 484 | panic("DMA region exceeds memory limit: %lu.", |
| 476 | _ramend - _ramstart); | 485 | _ramend - _ramstart); |
| 477 | } | 486 | } |
| 478 | memory_end = _ramend - DMA_UNCACHED_REGION; | 487 | memory_end = _ramend - DMA_UNCACHED_REGION; |
| @@ -526,14 +535,13 @@ static __init void memory_setup(void) | |||
| 526 | 535 | ||
| 527 | if (mtd_size == 0) { | 536 | if (mtd_size == 0) { |
| 528 | console_init(); | 537 | console_init(); |
| 529 | panic("Don't boot kernel without rootfs attached.\n"); | 538 | panic("Don't boot kernel without rootfs attached."); |
| 530 | } | 539 | } |
| 531 | 540 | ||
| 532 | /* Relocate MTD image to the top of memory after the uncached memory area */ | 541 | /* Relocate MTD image to the top of memory after the uncached memory area */ |
| 533 | dma_memcpy((char *)memory_end, _end, mtd_size); | 542 | uclinux_ram_map.phys = memory_mtd_start = memory_end; |
| 534 | 543 | uclinux_ram_map.size = mtd_size; | |
| 535 | memory_mtd_start = memory_end; | 544 | dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size); |
| 536 | _ebss = memory_mtd_start; /* define _ebss for compatible */ | ||
| 537 | #endif /* CONFIG_MTD_UCLINUX */ | 545 | #endif /* CONFIG_MTD_UCLINUX */ |
| 538 | 546 | ||
| 539 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) | 547 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) |
| @@ -796,10 +804,8 @@ void __init setup_arch(char **cmdline_p) | |||
| 796 | cclk = get_cclk(); | 804 | cclk = get_cclk(); |
| 797 | sclk = get_sclk(); | 805 | sclk = get_sclk(); |
| 798 | 806 | ||
| 799 | #if !defined(CONFIG_BFIN_KERNEL_CLOCK) | 807 | if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk) |
| 800 | if (ANOMALY_05000273 && cclk == sclk) | 808 | panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK"); |
| 801 | panic("ANOMALY 05000273, SCLK can not be same as CCLK"); | ||
| 802 | #endif | ||
| 803 | 809 | ||
| 804 | #ifdef BF561_FAMILY | 810 | #ifdef BF561_FAMILY |
| 805 | if (ANOMALY_05000266) { | 811 | if (ANOMALY_05000266) { |
| @@ -881,7 +887,7 @@ void __init setup_arch(char **cmdline_p) | |||
| 881 | printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", | 887 | printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", |
| 882 | bfin_compiled_revid(), bfin_revid()); | 888 | bfin_compiled_revid(), bfin_revid()); |
| 883 | if (bfin_compiled_revid() > bfin_revid()) | 889 | if (bfin_compiled_revid() > bfin_revid()) |
| 884 | panic("Error: you are missing anomaly workarounds for this rev\n"); | 890 | panic("Error: you are missing anomaly workarounds for this rev"); |
| 885 | } | 891 | } |
| 886 | } | 892 | } |
| 887 | if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX) | 893 | if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX) |
| @@ -891,16 +897,13 @@ void __init setup_arch(char **cmdline_p) | |||
| 891 | 897 | ||
| 892 | /* We can't run on BF548-0.1 due to ANOMALY 05000448 */ | 898 | /* We can't run on BF548-0.1 due to ANOMALY 05000448 */ |
| 893 | if (bfin_cpuid() == 0x27de && bfin_revid() == 1) | 899 | if (bfin_cpuid() == 0x27de && bfin_revid() == 1) |
| 894 | panic("You can't run on this processor due to 05000448\n"); | 900 | panic("You can't run on this processor due to 05000448"); |
| 895 | 901 | ||
| 896 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); | 902 | printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); |
| 897 | 903 | ||
| 898 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", | 904 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", |
| 899 | cclk / 1000000, sclk / 1000000); | 905 | cclk / 1000000, sclk / 1000000); |
| 900 | 906 | ||
| 901 | if (ANOMALY_05000273 && (cclk >> 1) <= sclk) | ||
| 902 | printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); | ||
| 903 | |||
| 904 | setup_bootmem_allocator(); | 907 | setup_bootmem_allocator(); |
| 905 | 908 | ||
| 906 | paging_init(); | 909 | paging_init(); |
diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c index fce49d7cf001..a8f1329c15a4 100644 --- a/arch/blackfin/kernel/sys_bfin.c +++ b/arch/blackfin/kernel/sys_bfin.c | |||
| @@ -78,11 +78,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, | |||
| 78 | return do_mmap2(addr, len, prot, flags, fd, pgoff); | 78 | return do_mmap2(addr, len, prot, flags, fd, pgoff); |
| 79 | } | 79 | } |
| 80 | 80 | ||
| 81 | asmlinkage int sys_getpagesize(void) | ||
| 82 | { | ||
| 83 | return PAGE_SIZE; | ||
| 84 | } | ||
| 85 | |||
| 86 | asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags) | 81 | asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags) |
| 87 | { | 82 | { |
| 88 | return sram_alloc_with_lsl(size, flags); | 83 | return sram_alloc_with_lsl(size, flags); |
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c index 27646121280a..0791eba40d9f 100644 --- a/arch/blackfin/kernel/time-ts.c +++ b/arch/blackfin/kernel/time-ts.c | |||
| @@ -20,8 +20,9 @@ | |||
| 20 | 20 | ||
| 21 | #include <asm/blackfin.h> | 21 | #include <asm/blackfin.h> |
| 22 | #include <asm/time.h> | 22 | #include <asm/time.h> |
| 23 | #include <asm/gptimers.h> | ||
| 23 | 24 | ||
| 24 | #ifdef CONFIG_CYCLES_CLOCKSOURCE | 25 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) |
| 25 | 26 | ||
| 26 | /* Accelerators for sched_clock() | 27 | /* Accelerators for sched_clock() |
| 27 | * convert from cycles(64bits) => nanoseconds (64bits) | 28 | * convert from cycles(64bits) => nanoseconds (64bits) |
| @@ -58,15 +59,15 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc) | |||
| 58 | return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR; | 59 | return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR; |
| 59 | } | 60 | } |
| 60 | 61 | ||
| 61 | static cycle_t read_cycles(struct clocksource *cs) | 62 | static cycle_t bfin_read_cycles(struct clocksource *cs) |
| 62 | { | 63 | { |
| 63 | return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod); | 64 | return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod); |
| 64 | } | 65 | } |
| 65 | 66 | ||
| 66 | static struct clocksource clocksource_bfin = { | 67 | static struct clocksource bfin_cs_cycles = { |
| 67 | .name = "bfin_cycles", | 68 | .name = "bfin_cs_cycles", |
| 68 | .rating = 350, | 69 | .rating = 350, |
| 69 | .read = read_cycles, | 70 | .read = bfin_read_cycles, |
| 70 | .mask = CLOCKSOURCE_MASK(64), | 71 | .mask = CLOCKSOURCE_MASK(64), |
| 71 | .shift = 22, | 72 | .shift = 22, |
| 72 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 73 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| @@ -74,53 +75,198 @@ static struct clocksource clocksource_bfin = { | |||
| 74 | 75 | ||
| 75 | unsigned long long sched_clock(void) | 76 | unsigned long long sched_clock(void) |
| 76 | { | 77 | { |
| 77 | return cycles_2_ns(read_cycles(&clocksource_bfin)); | 78 | return cycles_2_ns(bfin_read_cycles(&bfin_cs_cycles)); |
| 78 | } | 79 | } |
| 79 | 80 | ||
| 80 | static int __init bfin_clocksource_init(void) | 81 | static int __init bfin_cs_cycles_init(void) |
| 81 | { | 82 | { |
| 82 | set_cyc2ns_scale(get_cclk() / 1000); | 83 | set_cyc2ns_scale(get_cclk() / 1000); |
| 83 | 84 | ||
| 84 | clocksource_bfin.mult = clocksource_hz2mult(get_cclk(), clocksource_bfin.shift); | 85 | bfin_cs_cycles.mult = \ |
| 86 | clocksource_hz2mult(get_cclk(), bfin_cs_cycles.shift); | ||
| 85 | 87 | ||
| 86 | if (clocksource_register(&clocksource_bfin)) | 88 | if (clocksource_register(&bfin_cs_cycles)) |
| 87 | panic("failed to register clocksource"); | 89 | panic("failed to register clocksource"); |
| 88 | 90 | ||
| 89 | return 0; | 91 | return 0; |
| 90 | } | 92 | } |
| 93 | #else | ||
| 94 | # define bfin_cs_cycles_init() | ||
| 95 | #endif | ||
| 96 | |||
| 97 | #ifdef CONFIG_GPTMR0_CLOCKSOURCE | ||
| 98 | |||
| 99 | void __init setup_gptimer0(void) | ||
| 100 | { | ||
| 101 | disable_gptimers(TIMER0bit); | ||
| 102 | |||
| 103 | set_gptimer_config(TIMER0_id, \ | ||
| 104 | TIMER_OUT_DIS | TIMER_PERIOD_CNT | TIMER_MODE_PWM); | ||
| 105 | set_gptimer_period(TIMER0_id, -1); | ||
| 106 | set_gptimer_pwidth(TIMER0_id, -2); | ||
| 107 | SSYNC(); | ||
| 108 | enable_gptimers(TIMER0bit); | ||
| 109 | } | ||
| 110 | |||
| 111 | static cycle_t bfin_read_gptimer0(void) | ||
| 112 | { | ||
| 113 | return bfin_read_TIMER0_COUNTER(); | ||
| 114 | } | ||
| 115 | |||
| 116 | static struct clocksource bfin_cs_gptimer0 = { | ||
| 117 | .name = "bfin_cs_gptimer0", | ||
| 118 | .rating = 400, | ||
| 119 | .read = bfin_read_gptimer0, | ||
| 120 | .mask = CLOCKSOURCE_MASK(32), | ||
| 121 | .shift = 22, | ||
| 122 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 123 | }; | ||
| 124 | |||
| 125 | static int __init bfin_cs_gptimer0_init(void) | ||
| 126 | { | ||
| 127 | setup_gptimer0(); | ||
| 91 | 128 | ||
| 129 | bfin_cs_gptimer0.mult = \ | ||
| 130 | clocksource_hz2mult(get_sclk(), bfin_cs_gptimer0.shift); | ||
| 131 | |||
| 132 | if (clocksource_register(&bfin_cs_gptimer0)) | ||
| 133 | panic("failed to register clocksource"); | ||
| 134 | |||
| 135 | return 0; | ||
| 136 | } | ||
| 92 | #else | 137 | #else |
| 93 | # define bfin_clocksource_init() | 138 | # define bfin_cs_gptimer0_init() |
| 94 | #endif | 139 | #endif |
| 95 | 140 | ||
| 141 | #ifdef CONFIG_CORE_TIMER_IRQ_L1 | ||
| 142 | __attribute__((l1_text)) | ||
| 143 | #endif | ||
| 144 | irqreturn_t timer_interrupt(int irq, void *dev_id); | ||
| 145 | |||
| 146 | static int bfin_timer_set_next_event(unsigned long, \ | ||
| 147 | struct clock_event_device *); | ||
| 148 | |||
| 149 | static void bfin_timer_set_mode(enum clock_event_mode, \ | ||
| 150 | struct clock_event_device *); | ||
| 151 | |||
| 152 | static struct clock_event_device clockevent_bfin = { | ||
| 153 | #if defined(CONFIG_TICKSOURCE_GPTMR0) | ||
| 154 | .name = "bfin_gptimer0", | ||
| 155 | .rating = 300, | ||
| 156 | .irq = IRQ_TIMER0, | ||
| 157 | #else | ||
| 158 | .name = "bfin_core_timer", | ||
| 159 | .rating = 350, | ||
| 160 | .irq = IRQ_CORETMR, | ||
| 161 | #endif | ||
| 162 | .shift = 32, | ||
| 163 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
| 164 | .set_next_event = bfin_timer_set_next_event, | ||
| 165 | .set_mode = bfin_timer_set_mode, | ||
| 166 | }; | ||
| 167 | |||
| 168 | static struct irqaction bfin_timer_irq = { | ||
| 169 | #if defined(CONFIG_TICKSOURCE_GPTMR0) | ||
| 170 | .name = "Blackfin GPTimer0", | ||
| 171 | #else | ||
| 172 | .name = "Blackfin CoreTimer", | ||
| 173 | #endif | ||
| 174 | .flags = IRQF_DISABLED | IRQF_TIMER | \ | ||
| 175 | IRQF_IRQPOLL | IRQF_PERCPU, | ||
| 176 | .handler = timer_interrupt, | ||
| 177 | .dev_id = &clockevent_bfin, | ||
| 178 | }; | ||
| 179 | |||
| 180 | #if defined(CONFIG_TICKSOURCE_GPTMR0) | ||
| 96 | static int bfin_timer_set_next_event(unsigned long cycles, | 181 | static int bfin_timer_set_next_event(unsigned long cycles, |
| 97 | struct clock_event_device *evt) | 182 | struct clock_event_device *evt) |
| 98 | { | 183 | { |
| 184 | disable_gptimers(TIMER0bit); | ||
| 185 | |||
| 186 | /* it starts counting three SCLK cycles after the TIMENx bit is set */ | ||
| 187 | set_gptimer_pwidth(TIMER0_id, cycles - 3); | ||
| 188 | enable_gptimers(TIMER0bit); | ||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | |||
| 192 | static void bfin_timer_set_mode(enum clock_event_mode mode, | ||
| 193 | struct clock_event_device *evt) | ||
| 194 | { | ||
| 195 | switch (mode) { | ||
| 196 | case CLOCK_EVT_MODE_PERIODIC: { | ||
| 197 | set_gptimer_config(TIMER0_id, \ | ||
| 198 | TIMER_OUT_DIS | TIMER_IRQ_ENA | \ | ||
| 199 | TIMER_PERIOD_CNT | TIMER_MODE_PWM); | ||
| 200 | set_gptimer_period(TIMER0_id, get_sclk() / HZ); | ||
| 201 | set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1); | ||
| 202 | enable_gptimers(TIMER0bit); | ||
| 203 | break; | ||
| 204 | } | ||
| 205 | case CLOCK_EVT_MODE_ONESHOT: | ||
| 206 | disable_gptimers(TIMER0bit); | ||
| 207 | set_gptimer_config(TIMER0_id, \ | ||
| 208 | TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM); | ||
| 209 | set_gptimer_period(TIMER0_id, 0); | ||
| 210 | break; | ||
| 211 | case CLOCK_EVT_MODE_UNUSED: | ||
| 212 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 213 | disable_gptimers(TIMER0bit); | ||
| 214 | break; | ||
| 215 | case CLOCK_EVT_MODE_RESUME: | ||
| 216 | break; | ||
| 217 | } | ||
| 218 | } | ||
| 219 | |||
| 220 | static void bfin_timer_ack(void) | ||
| 221 | { | ||
| 222 | set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0); | ||
| 223 | } | ||
| 224 | |||
| 225 | static void __init bfin_timer_init(void) | ||
| 226 | { | ||
| 227 | disable_gptimers(TIMER0bit); | ||
| 228 | } | ||
| 229 | |||
| 230 | static unsigned long __init bfin_clockevent_check(void) | ||
| 231 | { | ||
| 232 | setup_irq(IRQ_TIMER0, &bfin_timer_irq); | ||
| 233 | return get_sclk(); | ||
| 234 | } | ||
| 235 | |||
| 236 | #else /* CONFIG_TICKSOURCE_CORETMR */ | ||
| 237 | |||
| 238 | static int bfin_timer_set_next_event(unsigned long cycles, | ||
| 239 | struct clock_event_device *evt) | ||
| 240 | { | ||
| 241 | bfin_write_TCNTL(TMPWR); | ||
| 242 | CSYNC(); | ||
| 99 | bfin_write_TCOUNT(cycles); | 243 | bfin_write_TCOUNT(cycles); |
| 100 | CSYNC(); | 244 | CSYNC(); |
| 245 | bfin_write_TCNTL(TMPWR | TMREN); | ||
| 101 | return 0; | 246 | return 0; |
| 102 | } | 247 | } |
| 103 | 248 | ||
| 104 | static void bfin_timer_set_mode(enum clock_event_mode mode, | 249 | static void bfin_timer_set_mode(enum clock_event_mode mode, |
| 105 | struct clock_event_device *evt) | 250 | struct clock_event_device *evt) |
| 106 | { | 251 | { |
| 107 | switch (mode) { | 252 | switch (mode) { |
| 108 | case CLOCK_EVT_MODE_PERIODIC: { | 253 | case CLOCK_EVT_MODE_PERIODIC: { |
| 109 | unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); | 254 | unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); |
| 110 | bfin_write_TCNTL(TMPWR); | 255 | bfin_write_TCNTL(TMPWR); |
| 111 | bfin_write_TSCALE(TIME_SCALE - 1); | ||
| 112 | CSYNC(); | 256 | CSYNC(); |
| 257 | bfin_write_TSCALE(TIME_SCALE - 1); | ||
| 113 | bfin_write_TPERIOD(tcount); | 258 | bfin_write_TPERIOD(tcount); |
| 114 | bfin_write_TCOUNT(tcount); | 259 | bfin_write_TCOUNT(tcount); |
| 115 | bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD); | ||
| 116 | CSYNC(); | 260 | CSYNC(); |
| 261 | bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD); | ||
| 117 | break; | 262 | break; |
| 118 | } | 263 | } |
| 119 | case CLOCK_EVT_MODE_ONESHOT: | 264 | case CLOCK_EVT_MODE_ONESHOT: |
| 265 | bfin_write_TCNTL(TMPWR); | ||
| 266 | CSYNC(); | ||
| 120 | bfin_write_TSCALE(TIME_SCALE - 1); | 267 | bfin_write_TSCALE(TIME_SCALE - 1); |
| 268 | bfin_write_TPERIOD(0); | ||
| 121 | bfin_write_TCOUNT(0); | 269 | bfin_write_TCOUNT(0); |
| 122 | bfin_write_TCNTL(TMPWR | TMREN); | ||
| 123 | CSYNC(); | ||
| 124 | break; | 270 | break; |
| 125 | case CLOCK_EVT_MODE_UNUSED: | 271 | case CLOCK_EVT_MODE_UNUSED: |
| 126 | case CLOCK_EVT_MODE_SHUTDOWN: | 272 | case CLOCK_EVT_MODE_SHUTDOWN: |
| @@ -132,6 +278,10 @@ static void bfin_timer_set_mode(enum clock_event_mode mode, | |||
| 132 | } | 278 | } |
| 133 | } | 279 | } |
| 134 | 280 | ||
| 281 | static void bfin_timer_ack(void) | ||
| 282 | { | ||
| 283 | } | ||
| 284 | |||
| 135 | static void __init bfin_timer_init(void) | 285 | static void __init bfin_timer_init(void) |
| 136 | { | 286 | { |
| 137 | /* power up the timer, but don't enable it just yet */ | 287 | /* power up the timer, but don't enable it just yet */ |
| @@ -145,38 +295,32 @@ static void __init bfin_timer_init(void) | |||
| 145 | bfin_write_TPERIOD(0); | 295 | bfin_write_TPERIOD(0); |
| 146 | bfin_write_TCOUNT(0); | 296 | bfin_write_TCOUNT(0); |
| 147 | 297 | ||
| 148 | /* now enable the timer */ | ||
| 149 | CSYNC(); | 298 | CSYNC(); |
| 150 | } | 299 | } |
| 151 | 300 | ||
| 301 | static unsigned long __init bfin_clockevent_check(void) | ||
| 302 | { | ||
| 303 | setup_irq(IRQ_CORETMR, &bfin_timer_irq); | ||
| 304 | return get_cclk() / TIME_SCALE; | ||
| 305 | } | ||
| 306 | |||
| 307 | void __init setup_core_timer(void) | ||
| 308 | { | ||
| 309 | bfin_timer_init(); | ||
| 310 | bfin_timer_set_mode(CLOCK_EVT_MODE_PERIODIC, NULL); | ||
| 311 | } | ||
| 312 | #endif /* CONFIG_TICKSOURCE_GPTMR0 */ | ||
| 313 | |||
| 152 | /* | 314 | /* |
| 153 | * timer_interrupt() needs to keep up the real-time clock, | 315 | * timer_interrupt() needs to keep up the real-time clock, |
| 154 | * as well as call the "do_timer()" routine every clocktick | 316 | * as well as call the "do_timer()" routine every clocktick |
| 155 | */ | 317 | */ |
| 156 | #ifdef CONFIG_CORE_TIMER_IRQ_L1 | ||
| 157 | __attribute__((l1_text)) | ||
| 158 | #endif | ||
| 159 | irqreturn_t timer_interrupt(int irq, void *dev_id); | ||
| 160 | |||
| 161 | static struct clock_event_device clockevent_bfin = { | ||
| 162 | .name = "bfin_core_timer", | ||
| 163 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
| 164 | .shift = 32, | ||
| 165 | .set_next_event = bfin_timer_set_next_event, | ||
| 166 | .set_mode = bfin_timer_set_mode, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static struct irqaction bfin_timer_irq = { | ||
| 170 | .name = "Blackfin Core Timer", | ||
| 171 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
| 172 | .handler = timer_interrupt, | ||
| 173 | .dev_id = &clockevent_bfin, | ||
| 174 | }; | ||
| 175 | |||
| 176 | irqreturn_t timer_interrupt(int irq, void *dev_id) | 318 | irqreturn_t timer_interrupt(int irq, void *dev_id) |
| 177 | { | 319 | { |
| 178 | struct clock_event_device *evt = dev_id; | 320 | struct clock_event_device *evt = dev_id; |
| 321 | smp_mb(); | ||
| 179 | evt->event_handler(evt); | 322 | evt->event_handler(evt); |
| 323 | bfin_timer_ack(); | ||
| 180 | return IRQ_HANDLED; | 324 | return IRQ_HANDLED; |
| 181 | } | 325 | } |
| 182 | 326 | ||
| @@ -184,9 +328,8 @@ static int __init bfin_clockevent_init(void) | |||
| 184 | { | 328 | { |
| 185 | unsigned long timer_clk; | 329 | unsigned long timer_clk; |
| 186 | 330 | ||
| 187 | timer_clk = get_cclk() / TIME_SCALE; | 331 | timer_clk = bfin_clockevent_check(); |
| 188 | 332 | ||
| 189 | setup_irq(IRQ_CORETMR, &bfin_timer_irq); | ||
| 190 | bfin_timer_init(); | 333 | bfin_timer_init(); |
| 191 | 334 | ||
| 192 | clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift); | 335 | clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift); |
| @@ -218,6 +361,7 @@ void __init time_init(void) | |||
| 218 | xtime.tv_nsec = 0; | 361 | xtime.tv_nsec = 0; |
| 219 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); | 362 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); |
| 220 | 363 | ||
| 221 | bfin_clocksource_init(); | 364 | bfin_cs_cycles_init(); |
| 365 | bfin_cs_gptimer0_init(); | ||
| 222 | bfin_clockevent_init(); | 366 | bfin_clockevent_init(); |
| 223 | } | 367 | } |
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c index 1bbacfbd4c5d..adb54aa7d7c8 100644 --- a/arch/blackfin/kernel/time.c +++ b/arch/blackfin/kernel/time.c | |||
| @@ -24,14 +24,10 @@ | |||
| 24 | 24 | ||
| 25 | static struct irqaction bfin_timer_irq = { | 25 | static struct irqaction bfin_timer_irq = { |
| 26 | .name = "Blackfin Timer Tick", | 26 | .name = "Blackfin Timer Tick", |
| 27 | #ifdef CONFIG_IRQ_PER_CPU | ||
| 28 | .flags = IRQF_DISABLED | IRQF_PERCPU, | ||
| 29 | #else | ||
| 30 | .flags = IRQF_DISABLED | 27 | .flags = IRQF_DISABLED |
| 31 | #endif | ||
| 32 | }; | 28 | }; |
| 33 | 29 | ||
| 34 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE) | 30 | #if defined(CONFIG_IPIPE) |
| 35 | void __init setup_system_timer0(void) | 31 | void __init setup_system_timer0(void) |
| 36 | { | 32 | { |
| 37 | /* Power down the core timer, just to play safe. */ | 33 | /* Power down the core timer, just to play safe. */ |
| @@ -74,7 +70,7 @@ void __init setup_core_timer(void) | |||
| 74 | static void __init | 70 | static void __init |
| 75 | time_sched_init(irqreturn_t(*timer_routine) (int, void *)) | 71 | time_sched_init(irqreturn_t(*timer_routine) (int, void *)) |
| 76 | { | 72 | { |
| 77 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE) | 73 | #if defined(CONFIG_IPIPE) |
| 78 | setup_system_timer0(); | 74 | setup_system_timer0(); |
| 79 | bfin_timer_irq.handler = timer_routine; | 75 | bfin_timer_irq.handler = timer_routine; |
| 80 | setup_irq(IRQ_TIMER0, &bfin_timer_irq); | 76 | setup_irq(IRQ_TIMER0, &bfin_timer_irq); |
| @@ -94,7 +90,7 @@ static unsigned long gettimeoffset(void) | |||
| 94 | unsigned long offset; | 90 | unsigned long offset; |
| 95 | unsigned long clocks_per_jiffy; | 91 | unsigned long clocks_per_jiffy; |
| 96 | 92 | ||
| 97 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE) | 93 | #if defined(CONFIG_IPIPE) |
| 98 | clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); | 94 | clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); |
| 99 | offset = bfin_read_TIMER0_COUNTER() / \ | 95 | offset = bfin_read_TIMER0_COUNTER() / \ |
| 100 | (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); | 96 | (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); |
| @@ -133,36 +129,25 @@ irqreturn_t timer_interrupt(int irq, void *dummy) | |||
| 133 | static long last_rtc_update; | 129 | static long last_rtc_update; |
| 134 | 130 | ||
| 135 | write_seqlock(&xtime_lock); | 131 | write_seqlock(&xtime_lock); |
| 136 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) | 132 | do_timer(1); |
| 133 | |||
| 137 | /* | 134 | /* |
| 138 | * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is | 135 | * If we have an externally synchronized Linux clock, then update |
| 139 | * enabled. | 136 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be |
| 137 | * called as close as possible to 500 ms before the new second starts. | ||
| 140 | */ | 138 | */ |
| 141 | if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { | 139 | if (ntp_synced() && |
| 142 | #endif | 140 | xtime.tv_sec > last_rtc_update + 660 && |
| 143 | do_timer(1); | 141 | (xtime.tv_nsec / NSEC_PER_USEC) >= |
| 144 | 142 | 500000 - ((unsigned)TICK_SIZE) / 2 | |
| 145 | /* | 143 | && (xtime.tv_nsec / NSEC_PER_USEC) <= |
| 146 | * If we have an externally synchronized Linux clock, then update | 144 | 500000 + ((unsigned)TICK_SIZE) / 2) { |
| 147 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | 145 | if (set_rtc_mmss(xtime.tv_sec) == 0) |
| 148 | * called as close as possible to 500 ms before the new second starts. | 146 | last_rtc_update = xtime.tv_sec; |
| 149 | */ | 147 | else |
| 150 | if (ntp_synced() && | 148 | /* Do it again in 60s. */ |
| 151 | xtime.tv_sec > last_rtc_update + 660 && | 149 | last_rtc_update = xtime.tv_sec - 600; |
| 152 | (xtime.tv_nsec / NSEC_PER_USEC) >= | ||
| 153 | 500000 - ((unsigned)TICK_SIZE) / 2 | ||
| 154 | && (xtime.tv_nsec / NSEC_PER_USEC) <= | ||
| 155 | 500000 + ((unsigned)TICK_SIZE) / 2) { | ||
| 156 | if (set_rtc_mmss(xtime.tv_sec) == 0) | ||
| 157 | last_rtc_update = xtime.tv_sec; | ||
| 158 | else | ||
| 159 | /* Do it again in 60s. */ | ||
| 160 | last_rtc_update = xtime.tv_sec - 600; | ||
| 161 | } | ||
| 162 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE) | ||
| 163 | set_gptimer_status(0, TIMER_STATUS_TIMIL0); | ||
| 164 | } | 150 | } |
| 165 | #endif | ||
| 166 | write_sequnlock(&xtime_lock); | 151 | write_sequnlock(&xtime_lock); |
| 167 | 152 | ||
| 168 | #ifdef CONFIG_IPIPE | 153 | #ifdef CONFIG_IPIPE |
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index ffe7fb53eccb..aa76dfb0226e 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c | |||
| @@ -68,6 +68,13 @@ | |||
| 68 | ({ if (0) printk(fmt, ##arg); 0; }) | 68 | ({ if (0) printk(fmt, ##arg); 0; }) |
| 69 | #endif | 69 | #endif |
| 70 | 70 | ||
| 71 | #if defined(CONFIG_DEBUG_MMRS) || defined(CONFIG_DEBUG_MMRS_MODULE) | ||
| 72 | u32 last_seqstat; | ||
| 73 | #ifdef CONFIG_DEBUG_MMRS_MODULE | ||
| 74 | EXPORT_SYMBOL(last_seqstat); | ||
| 75 | #endif | ||
| 76 | #endif | ||
| 77 | |||
| 71 | /* Initiate the event table handler */ | 78 | /* Initiate the event table handler */ |
| 72 | void __init trap_init(void) | 79 | void __init trap_init(void) |
| 73 | { | 80 | { |
| @@ -79,7 +86,6 @@ void __init trap_init(void) | |||
| 79 | static void decode_address(char *buf, unsigned long address) | 86 | static void decode_address(char *buf, unsigned long address) |
| 80 | { | 87 | { |
| 81 | #ifdef CONFIG_DEBUG_VERBOSE | 88 | #ifdef CONFIG_DEBUG_VERBOSE |
| 82 | struct vm_list_struct *vml; | ||
| 83 | struct task_struct *p; | 89 | struct task_struct *p; |
| 84 | struct mm_struct *mm; | 90 | struct mm_struct *mm; |
| 85 | unsigned long flags, offset; | 91 | unsigned long flags, offset; |
| @@ -196,6 +202,11 @@ done: | |||
| 196 | 202 | ||
| 197 | asmlinkage void double_fault_c(struct pt_regs *fp) | 203 | asmlinkage void double_fault_c(struct pt_regs *fp) |
| 198 | { | 204 | { |
| 205 | #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON | ||
| 206 | int j; | ||
| 207 | trace_buffer_save(j); | ||
| 208 | #endif | ||
| 209 | |||
| 199 | console_verbose(); | 210 | console_verbose(); |
| 200 | oops_in_progress = 1; | 211 | oops_in_progress = 1; |
| 201 | #ifdef CONFIG_DEBUG_VERBOSE | 212 | #ifdef CONFIG_DEBUG_VERBOSE |
| @@ -220,9 +231,10 @@ asmlinkage void double_fault_c(struct pt_regs *fp) | |||
| 220 | dump_bfin_process(fp); | 231 | dump_bfin_process(fp); |
| 221 | dump_bfin_mem(fp); | 232 | dump_bfin_mem(fp); |
| 222 | show_regs(fp); | 233 | show_regs(fp); |
| 234 | dump_bfin_trace_buffer(); | ||
| 223 | } | 235 | } |
| 224 | #endif | 236 | #endif |
| 225 | panic("Double Fault - unrecoverable event\n"); | 237 | panic("Double Fault - unrecoverable event"); |
| 226 | 238 | ||
| 227 | } | 239 | } |
| 228 | 240 | ||
| @@ -239,6 +251,9 @@ asmlinkage void trap_c(struct pt_regs *fp) | |||
| 239 | unsigned long trapnr = fp->seqstat & SEQSTAT_EXCAUSE; | 251 | unsigned long trapnr = fp->seqstat & SEQSTAT_EXCAUSE; |
| 240 | 252 | ||
| 241 | trace_buffer_save(j); | 253 | trace_buffer_save(j); |
| 254 | #if defined(CONFIG_DEBUG_MMRS) || defined(CONFIG_DEBUG_MMRS_MODULE) | ||
| 255 | last_seqstat = (u32)fp->seqstat; | ||
| 256 | #endif | ||
| 242 | 257 | ||
| 243 | /* Important - be very careful dereferncing pointers - will lead to | 258 | /* Important - be very careful dereferncing pointers - will lead to |
| 244 | * double faults if the stack has become corrupt | 259 | * double faults if the stack has become corrupt |
| @@ -588,6 +603,9 @@ asmlinkage void trap_c(struct pt_regs *fp) | |||
| 588 | force_sig_info(sig, &info, current); | 603 | force_sig_info(sig, &info, current); |
| 589 | } | 604 | } |
| 590 | 605 | ||
| 606 | if (ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8)) | ||
| 607 | fp->pc = SAFE_USER_INSTRUCTION; | ||
| 608 | |||
| 591 | trace_buffer_restore(j); | 609 | trace_buffer_restore(j); |
| 592 | return; | 610 | return; |
| 593 | } | 611 | } |
| @@ -832,6 +850,11 @@ void show_stack(struct task_struct *task, unsigned long *stack) | |||
| 832 | decode_address(buf, (unsigned int)stack); | 850 | decode_address(buf, (unsigned int)stack); |
| 833 | printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); | 851 | printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); |
| 834 | 852 | ||
| 853 | if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) { | ||
| 854 | printk(KERN_NOTICE "Invalid stack pointer\n"); | ||
| 855 | return; | ||
| 856 | } | ||
| 857 | |||
| 835 | /* First thing is to look for a frame pointer */ | 858 | /* First thing is to look for a frame pointer */ |
| 836 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) { | 859 | for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) { |
| 837 | if (*addr & 0x1) | 860 | if (*addr & 0x1) |
| @@ -1066,6 +1089,29 @@ void show_regs(struct pt_regs *fp) | |||
| 1066 | unsigned int cpu = smp_processor_id(); | 1089 | unsigned int cpu = smp_processor_id(); |
| 1067 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); | 1090 | unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic(); |
| 1068 | 1091 | ||
| 1092 | verbose_printk(KERN_NOTICE "\n"); | ||
| 1093 | if (CPUID != bfin_cpuid()) | ||
| 1094 | verbose_printk(KERN_NOTICE "Compiled for cpu family 0x%04x (Rev %d), " | ||
| 1095 | "but running on:0x%04x (Rev %d)\n", | ||
| 1096 | CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid()); | ||
| 1097 | |||
| 1098 | verbose_printk(KERN_NOTICE "ADSP-%s-0.%d", | ||
| 1099 | CPU, bfin_compiled_revid()); | ||
| 1100 | |||
| 1101 | if (bfin_compiled_revid() != bfin_revid()) | ||
| 1102 | verbose_printk("(Detected 0.%d)", bfin_revid()); | ||
| 1103 | |||
| 1104 | verbose_printk(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n", | ||
| 1105 | get_cclk()/1000000, get_sclk()/1000000, | ||
| 1106 | #ifdef CONFIG_MPU | ||
| 1107 | "mpu on" | ||
| 1108 | #else | ||
| 1109 | "mpu off" | ||
| 1110 | #endif | ||
| 1111 | ); | ||
| 1112 | |||
| 1113 | verbose_printk(KERN_NOTICE "%s", linux_banner); | ||
| 1114 | |||
| 1069 | verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); | 1115 | verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); |
| 1070 | verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", | 1116 | verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", |
| 1071 | (long)fp->seqstat, fp->ipend, fp->syscfg); | 1117 | (long)fp->seqstat, fp->ipend, fp->syscfg); |
| @@ -1246,5 +1292,5 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp) | |||
| 1246 | dump_bfin_mem(fp); | 1292 | dump_bfin_mem(fp); |
| 1247 | show_regs(fp); | 1293 | show_regs(fp); |
| 1248 | dump_stack(); | 1294 | dump_stack(); |
| 1249 | panic("Unrecoverable event\n"); | 1295 | panic("Unrecoverable event"); |
| 1250 | } | 1296 | } |
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index 27952ae047d8..8b67167cb4f4 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S | |||
| @@ -50,7 +50,9 @@ SECTIONS | |||
| 50 | _text = .; | 50 | _text = .; |
| 51 | __stext = .; | 51 | __stext = .; |
| 52 | TEXT_TEXT | 52 | TEXT_TEXT |
| 53 | #ifndef CONFIG_SCHEDULE_L1 | ||
| 53 | SCHED_TEXT | 54 | SCHED_TEXT |
| 55 | #endif | ||
| 54 | LOCK_TEXT | 56 | LOCK_TEXT |
| 55 | KPROBES_TEXT | 57 | KPROBES_TEXT |
| 56 | *(.text.*) | 58 | *(.text.*) |
| @@ -180,6 +182,9 @@ SECTIONS | |||
| 180 | . = ALIGN(4); | 182 | . = ALIGN(4); |
| 181 | __stext_l1 = .; | 183 | __stext_l1 = .; |
| 182 | *(.l1.text) | 184 | *(.l1.text) |
| 185 | #ifdef CONFIG_SCHEDULE_L1 | ||
| 186 | SCHED_TEXT | ||
| 187 | #endif | ||
| 183 | . = ALIGN(4); | 188 | . = ALIGN(4); |
| 184 | __etext_l1 = .; | 189 | __etext_l1 = .; |
| 185 | } | 190 | } |
diff --git a/arch/blackfin/mach-bf518/Kconfig b/arch/blackfin/mach-bf518/Kconfig index f397ede006bf..4c76fefb7a3b 100644 --- a/arch/blackfin/mach-bf518/Kconfig +++ b/arch/blackfin/mach-bf518/Kconfig | |||
| @@ -156,6 +156,7 @@ config IRQ_PORTH_INTB | |||
| 156 | default 11 | 156 | default 11 |
| 157 | config IRQ_TIMER0 | 157 | config IRQ_TIMER0 |
| 158 | int "IRQ_TIMER0" | 158 | int "IRQ_TIMER0" |
| 159 | default 7 if TICKSOURCE_GPTMR0 | ||
| 159 | default 8 | 160 | default 8 |
| 160 | config IRQ_TIMER1 | 161 | config IRQ_TIMER1 |
| 161 | int "IRQ_TIMER1" | 162 | int "IRQ_TIMER1" |
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index 41f2eacfef20..62bba09bcce6 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c | |||
| @@ -82,7 +82,11 @@ static struct physmap_flash_data ezbrd_flash_data = { | |||
| 82 | 82 | ||
| 83 | static struct resource ezbrd_flash_resource = { | 83 | static struct resource ezbrd_flash_resource = { |
| 84 | .start = 0x20000000, | 84 | .start = 0x20000000, |
| 85 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 86 | .end = 0x202fffff, | ||
| 87 | #else | ||
| 85 | .end = 0x203fffff, | 88 | .end = 0x203fffff, |
| 89 | #endif | ||
| 86 | .flags = IORESOURCE_MEM, | 90 | .flags = IORESOURCE_MEM, |
| 87 | }; | 91 | }; |
| 88 | 92 | ||
| @@ -162,8 +166,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 162 | }; | 166 | }; |
| 163 | #endif | 167 | #endif |
| 164 | 168 | ||
| 165 | #if defined(CONFIG_SPI_ADC_BF533) \ | 169 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 166 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 170 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 167 | /* SPI ADC chip */ | 171 | /* SPI ADC chip */ |
| 168 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 172 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 169 | .enable_dma = 1, /* use dma transfer with this chip*/ | 173 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -249,8 +253,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 249 | }, | 253 | }, |
| 250 | #endif | 254 | #endif |
| 251 | 255 | ||
| 252 | #if defined(CONFIG_SPI_ADC_BF533) \ | 256 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 253 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 257 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 254 | { | 258 | { |
| 255 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 259 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 256 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 260 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| @@ -514,7 +518,7 @@ static struct platform_device i2c_bfin_twi_device = { | |||
| 514 | #endif | 518 | #endif |
| 515 | 519 | ||
| 516 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 520 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
| 517 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 521 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 518 | { | 522 | { |
| 519 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 523 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 520 | }, | 524 | }, |
| @@ -678,6 +682,11 @@ static int __init ezbrd_init(void) | |||
| 678 | ARRAY_SIZE(bfin_i2c_board_info)); | 682 | ARRAY_SIZE(bfin_i2c_board_info)); |
| 679 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 683 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
| 680 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 684 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 685 | /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */ | ||
| 686 | peripheral_request(P_AMS2, "ParaFlash"); | ||
| 687 | #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE) | ||
| 688 | peripheral_request(P_AMS3, "ParaFlash"); | ||
| 689 | #endif | ||
| 681 | return 0; | 690 | return 0; |
| 682 | } | 691 | } |
| 683 | 692 | ||
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h index c847bb101076..b69bd9af38dd 100644 --- a/arch/blackfin/mach-bf518/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h | |||
| @@ -6,14 +6,19 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List | 10 | * - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | /* We plan on not supporting 0.0 silicon, but 0.1 isn't out yet - sorry */ | ||
| 14 | #if __SILICON_REVISION__ < 0 | ||
| 15 | # error will not work on BF518 silicon version | ||
| 16 | #endif | ||
| 17 | |||
| 13 | #ifndef _MACH_ANOMALY_H_ | 18 | #ifndef _MACH_ANOMALY_H_ |
| 14 | #define _MACH_ANOMALY_H_ | 19 | #define _MACH_ANOMALY_H_ |
| 15 | 20 | ||
| 16 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ | 21 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ |
| 17 | #define ANOMALY_05000074 (1) | 22 | #define ANOMALY_05000074 (1) |
| 18 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ | 23 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ |
| 19 | #define ANOMALY_05000122 (1) | 24 | #define ANOMALY_05000122 (1) |
| @@ -47,7 +52,7 @@ | |||
| 47 | #define ANOMALY_05000435 (1) | 52 | #define ANOMALY_05000435 (1) |
| 48 | /* PORTx_DRIVE and PORTx_HYSTERESIS Registers Read Back Incorrect Values */ | 53 | /* PORTx_DRIVE and PORTx_HYSTERESIS Registers Read Back Incorrect Values */ |
| 49 | #define ANOMALY_05000438 (1) | 54 | #define ANOMALY_05000438 (1) |
| 50 | /* Preboot Cannot be Used to Program the PLL_DIV Register */ | 55 | /* Preboot Cannot be Used to Alter the PLL_DIV Register */ |
| 51 | #define ANOMALY_05000439 (1) | 56 | #define ANOMALY_05000439 (1) |
| 52 | /* bfrom_SysControl() Cannot be Used to Write the PLL_DIV Register */ | 57 | /* bfrom_SysControl() Cannot be Used to Write the PLL_DIV Register */ |
| 53 | #define ANOMALY_05000440 (1) | 58 | #define ANOMALY_05000440 (1) |
| @@ -61,32 +66,56 @@ | |||
| 61 | #define ANOMALY_05000453 (1) | 66 | #define ANOMALY_05000453 (1) |
| 62 | /* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */ | 67 | /* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */ |
| 63 | #define ANOMALY_05000455 (1) | 68 | #define ANOMALY_05000455 (1) |
| 69 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 70 | #define ANOMALY_05000461 (1) | ||
| 64 | 71 | ||
| 65 | /* Anomalies that don't exist on this proc */ | 72 | /* Anomalies that don't exist on this proc */ |
| 73 | #define ANOMALY_05000099 (0) | ||
| 74 | #define ANOMALY_05000119 (0) | ||
| 75 | #define ANOMALY_05000120 (0) | ||
| 66 | #define ANOMALY_05000125 (0) | 76 | #define ANOMALY_05000125 (0) |
| 77 | #define ANOMALY_05000149 (0) | ||
| 67 | #define ANOMALY_05000158 (0) | 78 | #define ANOMALY_05000158 (0) |
| 79 | #define ANOMALY_05000171 (0) | ||
| 80 | #define ANOMALY_05000179 (0) | ||
| 68 | #define ANOMALY_05000183 (0) | 81 | #define ANOMALY_05000183 (0) |
| 69 | #define ANOMALY_05000198 (0) | 82 | #define ANOMALY_05000198 (0) |
| 83 | #define ANOMALY_05000215 (0) | ||
| 84 | #define ANOMALY_05000220 (0) | ||
| 85 | #define ANOMALY_05000227 (0) | ||
| 70 | #define ANOMALY_05000230 (0) | 86 | #define ANOMALY_05000230 (0) |
| 87 | #define ANOMALY_05000231 (0) | ||
| 88 | #define ANOMALY_05000233 (0) | ||
| 89 | #define ANOMALY_05000242 (0) | ||
| 71 | #define ANOMALY_05000244 (0) | 90 | #define ANOMALY_05000244 (0) |
| 91 | #define ANOMALY_05000248 (0) | ||
| 92 | #define ANOMALY_05000250 (0) | ||
| 72 | #define ANOMALY_05000261 (0) | 93 | #define ANOMALY_05000261 (0) |
| 73 | #define ANOMALY_05000263 (0) | 94 | #define ANOMALY_05000263 (0) |
| 74 | #define ANOMALY_05000266 (0) | 95 | #define ANOMALY_05000266 (0) |
| 75 | #define ANOMALY_05000273 (0) | 96 | #define ANOMALY_05000273 (0) |
| 97 | #define ANOMALY_05000274 (0) | ||
| 76 | #define ANOMALY_05000278 (0) | 98 | #define ANOMALY_05000278 (0) |
| 77 | #define ANOMALY_05000285 (0) | 99 | #define ANOMALY_05000285 (0) |
| 100 | #define ANOMALY_05000287 (0) | ||
| 101 | #define ANOMALY_05000301 (0) | ||
| 78 | #define ANOMALY_05000305 (0) | 102 | #define ANOMALY_05000305 (0) |
| 79 | #define ANOMALY_05000307 (0) | 103 | #define ANOMALY_05000307 (0) |
| 80 | #define ANOMALY_05000311 (0) | 104 | #define ANOMALY_05000311 (0) |
| 81 | #define ANOMALY_05000312 (0) | 105 | #define ANOMALY_05000312 (0) |
| 82 | #define ANOMALY_05000323 (0) | 106 | #define ANOMALY_05000323 (0) |
| 83 | #define ANOMALY_05000353 (0) | 107 | #define ANOMALY_05000353 (0) |
| 108 | #define ANOMALY_05000362 (1) | ||
| 84 | #define ANOMALY_05000363 (0) | 109 | #define ANOMALY_05000363 (0) |
| 85 | #define ANOMALY_05000380 (0) | 110 | #define ANOMALY_05000380 (0) |
| 86 | #define ANOMALY_05000386 (0) | 111 | #define ANOMALY_05000386 (0) |
| 112 | #define ANOMALY_05000389 (0) | ||
| 113 | #define ANOMALY_05000400 (0) | ||
| 87 | #define ANOMALY_05000412 (0) | 114 | #define ANOMALY_05000412 (0) |
| 88 | #define ANOMALY_05000432 (0) | 115 | #define ANOMALY_05000432 (0) |
| 89 | #define ANOMALY_05000447 (0) | 116 | #define ANOMALY_05000447 (0) |
| 90 | #define ANOMALY_05000448 (0) | 117 | #define ANOMALY_05000448 (0) |
| 118 | #define ANOMALY_05000456 (0) | ||
| 119 | #define ANOMALY_05000450 (0) | ||
| 91 | 120 | ||
| 92 | #endif | 121 | #endif |
diff --git a/arch/blackfin/mach-bf518/include/mach/portmux.h b/arch/blackfin/mach-bf518/include/mach/portmux.h index f618b487b2b0..a0fc77fd3315 100644 --- a/arch/blackfin/mach-bf518/include/mach/portmux.h +++ b/arch/blackfin/mach-bf518/include/mach/portmux.h | |||
| @@ -185,6 +185,10 @@ | |||
| 185 | #define P_PTP_PPS (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(2)) | 185 | #define P_PTP_PPS (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(2)) |
| 186 | #define P_PTP_CLKOUT (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(2)) | 186 | #define P_PTP_CLKOUT (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(2)) |
| 187 | 187 | ||
| 188 | #define P_HWAIT (P_DEFINED | P_IDENT(GPIO_PG000000000) | P_FUNCT(1)) | 188 | /* AMS */ |
| 189 | #define P_AMS2 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1)) | ||
| 190 | #define P_AMS3 (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(2)) | ||
| 191 | |||
| 192 | #define P_HWAIT (P_DEFINED | P_IDENT(GPIO_PG000000000) | P_FUNCT(1)) | ||
| 189 | 193 | ||
| 190 | #endif /* _MACH_PORTMUX_H_ */ | 194 | #endif /* _MACH_PORTMUX_H_ */ |
diff --git a/arch/blackfin/mach-bf527/Kconfig b/arch/blackfin/mach-bf527/Kconfig index 8438ec6d6679..848ac6f86823 100644 --- a/arch/blackfin/mach-bf527/Kconfig +++ b/arch/blackfin/mach-bf527/Kconfig | |||
| @@ -170,6 +170,7 @@ config IRQ_PORTH_INTB | |||
| 170 | default 11 | 170 | default 11 |
| 171 | config IRQ_TIMER0 | 171 | config IRQ_TIMER0 |
| 172 | int "IRQ_TIMER0" | 172 | int "IRQ_TIMER0" |
| 173 | default 7 if TICKSOURCE_GPTMR0 | ||
| 173 | default 8 | 174 | default 8 |
| 174 | config IRQ_TIMER1 | 175 | config IRQ_TIMER1 |
| 175 | int "IRQ_TIMER1" | 176 | int "IRQ_TIMER1" |
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c index 48e69eecdba4..6d6f9effa0bb 100644 --- a/arch/blackfin/mach-bf527/boards/cm_bf527.c +++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c | |||
| @@ -463,8 +463,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 463 | }; | 463 | }; |
| 464 | #endif | 464 | #endif |
| 465 | 465 | ||
| 466 | #if defined(CONFIG_SPI_ADC_BF533) \ | 466 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 467 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 467 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 468 | /* SPI ADC chip */ | 468 | /* SPI ADC chip */ |
| 469 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 469 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 470 | .enable_dma = 1, /* use dma transfer with this chip*/ | 470 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -554,8 +554,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 554 | }, | 554 | }, |
| 555 | #endif | 555 | #endif |
| 556 | 556 | ||
| 557 | #if defined(CONFIG_SPI_ADC_BF533) \ | 557 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 558 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 558 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 559 | { | 559 | { |
| 560 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 560 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 561 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 561 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| @@ -789,7 +789,7 @@ static struct platform_device i2c_bfin_twi_device = { | |||
| 789 | #endif | 789 | #endif |
| 790 | 790 | ||
| 791 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 791 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
| 792 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 792 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 793 | { | 793 | { |
| 794 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 794 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 795 | .type = "pcf8574_lcd", | 795 | .type = "pcf8574_lcd", |
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c index 7fe480e4ebe8..1435c5d38cd5 100644 --- a/arch/blackfin/mach-bf527/boards/ezbrd.c +++ b/arch/blackfin/mach-bf527/boards/ezbrd.c | |||
| @@ -247,8 +247,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 247 | }; | 247 | }; |
| 248 | #endif | 248 | #endif |
| 249 | 249 | ||
| 250 | #if defined(CONFIG_SPI_ADC_BF533) \ | 250 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 251 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 251 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 252 | /* SPI ADC chip */ | 252 | /* SPI ADC chip */ |
| 253 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 253 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 254 | .enable_dma = 1, /* use dma transfer with this chip*/ | 254 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -354,8 +354,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 354 | }, | 354 | }, |
| 355 | #endif | 355 | #endif |
| 356 | 356 | ||
| 357 | #if defined(CONFIG_SPI_ADC_BF533) \ | 357 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 358 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 358 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 359 | { | 359 | { |
| 360 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 360 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 361 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 361 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| @@ -586,7 +586,7 @@ static struct platform_device i2c_bfin_twi_device = { | |||
| 586 | #endif | 586 | #endif |
| 587 | 587 | ||
| 588 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 588 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
| 589 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 589 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 590 | { | 590 | { |
| 591 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 591 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 592 | }, | 592 | }, |
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index d0864111ef59..147edd1eb1ad 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c | |||
| @@ -485,8 +485,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 485 | }; | 485 | }; |
| 486 | #endif | 486 | #endif |
| 487 | 487 | ||
| 488 | #if defined(CONFIG_SPI_ADC_BF533) \ | 488 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 489 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 489 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 490 | /* SPI ADC chip */ | 490 | /* SPI ADC chip */ |
| 491 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 491 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 492 | .enable_dma = 1, /* use dma transfer with this chip*/ | 492 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -509,6 +509,13 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = { | |||
| 509 | }; | 509 | }; |
| 510 | #endif | 510 | #endif |
| 511 | 511 | ||
| 512 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
| 513 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | ||
| 514 | .enable_dma = 0, | ||
| 515 | .bits_per_word = 8, | ||
| 516 | }; | ||
| 517 | #endif | ||
| 518 | |||
| 512 | #if defined(CONFIG_PBX) | 519 | #if defined(CONFIG_PBX) |
| 513 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | 520 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { |
| 514 | .ctl_reg = 0x4, /* send zero */ | 521 | .ctl_reg = 0x4, /* send zero */ |
| @@ -593,8 +600,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 593 | }, | 600 | }, |
| 594 | #endif | 601 | #endif |
| 595 | 602 | ||
| 596 | #if defined(CONFIG_SPI_ADC_BF533) \ | 603 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 597 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 604 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 598 | { | 605 | { |
| 599 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 606 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 600 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 607 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| @@ -624,6 +631,17 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 624 | .controller_data = &ad9960_spi_chip_info, | 631 | .controller_data = &ad9960_spi_chip_info, |
| 625 | }, | 632 | }, |
| 626 | #endif | 633 | #endif |
| 634 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
| 635 | { | ||
| 636 | .modalias = "mmc_spi", | ||
| 637 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | ||
| 638 | .bus_num = 0, | ||
| 639 | .chip_select = 3, | ||
| 640 | .controller_data = &mmc_spi_chip_info, | ||
| 641 | .mode = SPI_MODE_0, | ||
| 642 | }, | ||
| 643 | #endif | ||
| 644 | |||
| 627 | #if defined(CONFIG_PBX) | 645 | #if defined(CONFIG_PBX) |
| 628 | { | 646 | { |
| 629 | .modalias = "fxs-spi", | 647 | .modalias = "fxs-spi", |
| @@ -836,7 +854,7 @@ static struct platform_device i2c_bfin_twi_device = { | |||
| 836 | #endif | 854 | #endif |
| 837 | 855 | ||
| 838 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | 856 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
| 839 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 857 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 840 | { | 858 | { |
| 841 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 859 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 842 | }, | 860 | }, |
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h index df6808d8a6ef..c84ddea95749 100644 --- a/arch/blackfin/mach-bf527/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h | |||
| @@ -6,14 +6,19 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision B, 08/12/2008; ADSP-BF526 Blackfin Processor Anomaly List | 10 | * - Revision C, 03/13/2009; ADSP-BF526 Blackfin Processor Anomaly List |
| 11 | * - Revision E, 08/18/2008; ADSP-BF527 Blackfin Processor Anomaly List | 11 | * - Revision F, 03/03/2009; ADSP-BF527 Blackfin Processor Anomaly List |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #ifndef _MACH_ANOMALY_H_ | 14 | #ifndef _MACH_ANOMALY_H_ |
| 15 | #define _MACH_ANOMALY_H_ | 15 | #define _MACH_ANOMALY_H_ |
| 16 | 16 | ||
| 17 | /* We do not support old silicon - sorry */ | ||
| 18 | #if __SILICON_REVISION__ < 0 | ||
| 19 | # error will not work on BF526/BF527 silicon version | ||
| 20 | #endif | ||
| 21 | |||
| 17 | #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__) | 22 | #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__) |
| 18 | # define ANOMALY_BF526 1 | 23 | # define ANOMALY_BF526 1 |
| 19 | #else | 24 | #else |
| @@ -25,158 +30,203 @@ | |||
| 25 | # define ANOMALY_BF527 0 | 30 | # define ANOMALY_BF527 0 |
| 26 | #endif | 31 | #endif |
| 27 | 32 | ||
| 28 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ | 33 | #define _ANOMALY_BF526(rev526) (ANOMALY_BF526 && __SILICON_REVISION__ rev526) |
| 34 | #define _ANOMALY_BF527(rev527) (ANOMALY_BF527 && __SILICON_REVISION__ rev527) | ||
| 35 | #define _ANOMALY_BF526_BF527(rev526, rev527) (_ANOMALY_BF526(rev526) || _ANOMALY_BF527(rev527)) | ||
| 36 | |||
| 37 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ | ||
| 29 | #define ANOMALY_05000074 (1) | 38 | #define ANOMALY_05000074 (1) |
| 30 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ | 39 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ |
| 31 | #define ANOMALY_05000119 (1) /* note: brokenness is noted in documentation, not anomaly sheet */ | 40 | #define ANOMALY_05000119 (1) /* note: brokenness is noted in documentation, not anomaly sheet */ |
| 32 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ | 41 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ |
| 33 | #define ANOMALY_05000122 (1) | 42 | #define ANOMALY_05000122 (1) |
| 34 | /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ | 43 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 35 | #define ANOMALY_05000245 (1) | 44 | #define ANOMALY_05000245 (1) |
| 45 | /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */ | ||
| 46 | #define ANOMALY_05000254 (1) | ||
| 36 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ | 47 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ |
| 37 | #define ANOMALY_05000265 (1) | 48 | #define ANOMALY_05000265 (1) |
| 38 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 49 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
| 39 | #define ANOMALY_05000310 (1) | 50 | #define ANOMALY_05000310 (1) |
| 40 | /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ | 51 | /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ |
| 41 | #define ANOMALY_05000313 (__SILICON_REVISION__ < 2) | 52 | #define ANOMALY_05000313 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 42 | /* Incorrect Access of OTP_STATUS During otp_write() Function */ | 53 | /* Incorrect Access of OTP_STATUS During otp_write() Function */ |
| 43 | #define ANOMALY_05000328 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 54 | #define ANOMALY_05000328 (_ANOMALY_BF527(< 2)) |
| 55 | /* Host DMA Boot Modes Are Not Functional */ | ||
| 56 | #define ANOMALY_05000330 (__SILICON_REVISION__ < 2) | ||
| 44 | /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ | 57 | /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ |
| 45 | #define ANOMALY_05000337 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 58 | #define ANOMALY_05000337 (_ANOMALY_BF527(< 2)) |
| 46 | /* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */ | 59 | /* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */ |
| 47 | #define ANOMALY_05000341 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 60 | #define ANOMALY_05000341 (_ANOMALY_BF527(< 2)) |
| 48 | /* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */ | 61 | /* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */ |
| 49 | #define ANOMALY_05000342 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 62 | #define ANOMALY_05000342 (_ANOMALY_BF527(< 2)) |
| 50 | /* USB Calibration Value Is Not Initialized */ | 63 | /* USB Calibration Value Is Not Initialized */ |
| 51 | #define ANOMALY_05000346 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 64 | #define ANOMALY_05000346 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 52 | /* USB Calibration Value to use */ | 65 | /* USB Calibration Value to use */ |
| 53 | #define ANOMALY_05000346_value 0xE510 | 66 | #define ANOMALY_05000346_value 0xE510 |
| 54 | /* Preboot Routine Incorrectly Alters Reset Value of USB Register */ | 67 | /* Preboot Routine Incorrectly Alters Reset Value of USB Register */ |
| 55 | #define ANOMALY_05000347 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 68 | #define ANOMALY_05000347 (_ANOMALY_BF527(< 2)) |
| 56 | /* Security Features Are Not Functional */ | 69 | /* Security Features Are Not Functional */ |
| 57 | #define ANOMALY_05000348 (ANOMALY_BF527 && __SILICON_REVISION__ < 1) | 70 | #define ANOMALY_05000348 (_ANOMALY_BF527(< 1)) |
| 58 | /* bfrom_SysControl() Firmware Function Performs Improper System Reset */ | 71 | /* bfrom_SysControl() Firmware Function Performs Improper System Reset */ |
| 59 | #define ANOMALY_05000353 (ANOMALY_BF526) | 72 | #define ANOMALY_05000353 (_ANOMALY_BF526(< 1)) |
| 60 | /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ | 73 | /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ |
| 61 | #define ANOMALY_05000355 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 74 | #define ANOMALY_05000355 (_ANOMALY_BF527(< 2)) |
| 62 | /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ | 75 | /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ |
| 63 | #define ANOMALY_05000357 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 76 | #define ANOMALY_05000357 (_ANOMALY_BF527(< 2)) |
| 64 | /* Incorrect Revision Number in DSPID Register */ | 77 | /* Incorrect Revision Number in DSPID Register */ |
| 65 | #define ANOMALY_05000364 (ANOMALY_BF527 && __SILICON_REVISION__ == 1) | 78 | #define ANOMALY_05000364 (_ANOMALY_BF527(== 1)) |
| 66 | /* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */ | 79 | /* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */ |
| 67 | #define ANOMALY_05000366 (1) | 80 | #define ANOMALY_05000366 (1) |
| 68 | /* Incorrect Default CSEL Value in PLL_DIV */ | 81 | /* Incorrect Default CSEL Value in PLL_DIV */ |
| 69 | #define ANOMALY_05000368 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 82 | #define ANOMALY_05000368 (_ANOMALY_BF527(< 2)) |
| 70 | /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ | 83 | /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ |
| 71 | #define ANOMALY_05000371 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 84 | #define ANOMALY_05000371 (_ANOMALY_BF527(< 2)) |
| 72 | /* Authentication Fails To Initiate */ | 85 | /* Authentication Fails To Initiate */ |
| 73 | #define ANOMALY_05000376 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 86 | #define ANOMALY_05000376 (_ANOMALY_BF527(< 2)) |
| 74 | /* Data Read From L3 Memory by USB DMA May be Corrupted */ | 87 | /* Data Read From L3 Memory by USB DMA May be Corrupted */ |
| 75 | #define ANOMALY_05000380 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 88 | #define ANOMALY_05000380 (_ANOMALY_BF527(< 2)) |
| 76 | /* 8-Bit NAND Flash Boot Mode Not Functional */ | 89 | /* 8-Bit NAND Flash Boot Mode Not Functional */ |
| 77 | #define ANOMALY_05000382 (__SILICON_REVISION__ < 2) | 90 | #define ANOMALY_05000382 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 78 | /* Host Must Not Read Back During Host DMA Boot */ | ||
| 79 | #define ANOMALY_05000384 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | ||
| 80 | /* Boot from OTP Memory Not Functional */ | 91 | /* Boot from OTP Memory Not Functional */ |
| 81 | #define ANOMALY_05000385 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 92 | #define ANOMALY_05000385 (_ANOMALY_BF527(< 2)) |
| 82 | /* bfrom_SysControl() Firmware Routine Not Functional */ | 93 | /* bfrom_SysControl() Firmware Routine Not Functional */ |
| 83 | #define ANOMALY_05000386 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 94 | #define ANOMALY_05000386 (_ANOMALY_BF527(< 2)) |
| 84 | /* Programmable Preboot Settings Not Functional */ | 95 | /* Programmable Preboot Settings Not Functional */ |
| 85 | #define ANOMALY_05000387 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 96 | #define ANOMALY_05000387 (_ANOMALY_BF527(< 2)) |
| 86 | /* CRC32 Checksum Support Not Functional */ | 97 | /* CRC32 Checksum Support Not Functional */ |
| 87 | #define ANOMALY_05000388 (__SILICON_REVISION__ < 2) | 98 | #define ANOMALY_05000388 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 88 | /* Reset Vector Must Not Be in SDRAM Memory Space */ | 99 | /* Reset Vector Must Not Be in SDRAM Memory Space */ |
| 89 | #define ANOMALY_05000389 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 100 | #define ANOMALY_05000389 (_ANOMALY_BF527(< 2)) |
| 90 | /* pTempCurrent Not Present in ADI_BOOT_DATA Structure */ | 101 | /* pTempCurrent Not Present in ADI_BOOT_DATA Structure */ |
| 91 | #define ANOMALY_05000392 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 102 | #define ANOMALY_05000392 (_ANOMALY_BF527(< 2)) |
| 92 | /* Deprecated Value of dTempByteCount in ADI_BOOT_DATA Structure */ | 103 | /* Deprecated Value of dTempByteCount in ADI_BOOT_DATA Structure */ |
| 93 | #define ANOMALY_05000393 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 104 | #define ANOMALY_05000393 (_ANOMALY_BF527(< 2)) |
| 94 | /* Log Buffer Not Functional */ | 105 | /* Log Buffer Not Functional */ |
| 95 | #define ANOMALY_05000394 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 106 | #define ANOMALY_05000394 (_ANOMALY_BF527(< 2)) |
| 96 | /* Hook Routine Not Functional */ | 107 | /* Hook Routine Not Functional */ |
| 97 | #define ANOMALY_05000395 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 108 | #define ANOMALY_05000395 (_ANOMALY_BF527(< 2)) |
| 98 | /* Header Indirect Bit Not Functional */ | 109 | /* Header Indirect Bit Not Functional */ |
| 99 | #define ANOMALY_05000396 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 110 | #define ANOMALY_05000396 (_ANOMALY_BF527(< 2)) |
| 100 | /* BK_ONES, BK_ZEROS, and BK_DATECODE Constants Not Functional */ | 111 | /* BK_ONES, BK_ZEROS, and BK_DATECODE Constants Not Functional */ |
| 101 | #define ANOMALY_05000397 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 112 | #define ANOMALY_05000397 (_ANOMALY_BF527(< 2)) |
| 102 | /* SWRESET, DFRESET and WDRESET Bits in the SYSCR Register Not Functional */ | 113 | /* SWRESET, DFRESET and WDRESET Bits in the SYSCR Register Not Functional */ |
| 103 | #define ANOMALY_05000398 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 114 | #define ANOMALY_05000398 (_ANOMALY_BF527(< 2)) |
| 104 | /* BCODE_NOBOOT in BCODE Field of SYSCR Register Not Functional */ | 115 | /* BCODE_NOBOOT in BCODE Field of SYSCR Register Not Functional */ |
| 105 | #define ANOMALY_05000399 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 116 | #define ANOMALY_05000399 (_ANOMALY_BF527(< 2)) |
| 106 | /* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */ | 117 | /* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */ |
| 107 | #define ANOMALY_05000401 (__SILICON_REVISION__ < 2) | 118 | #define ANOMALY_05000401 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 108 | /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ | 119 | /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ |
| 109 | #define ANOMALY_05000403 (__SILICON_REVISION__ < 2) | 120 | #define ANOMALY_05000403 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 110 | /* Lockbox SESR Disallows Certain User Interrupts */ | 121 | /* Lockbox SESR Disallows Certain User Interrupts */ |
| 111 | #define ANOMALY_05000404 (__SILICON_REVISION__ < 2) | 122 | #define ANOMALY_05000404 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 112 | /* Lockbox SESR Firmware Does Not Save/Restore Full Context */ | 123 | /* Lockbox SESR Firmware Does Not Save/Restore Full Context */ |
| 113 | #define ANOMALY_05000405 (1) | 124 | #define ANOMALY_05000405 (1) |
| 114 | /* Lockbox SESR Firmware Arguments Are Not Retained After First Initialization */ | 125 | /* Lockbox SESR Firmware Arguments Are Not Retained After First Initialization */ |
| 115 | #define ANOMALY_05000407 (__SILICON_REVISION__ < 2) | 126 | #define ANOMALY_05000407 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 116 | /* Lockbox Firmware Memory Cleanup Routine Does not Clear Registers */ | 127 | /* Lockbox Firmware Memory Cleanup Routine Does not Clear Registers */ |
| 117 | #define ANOMALY_05000408 (1) | 128 | #define ANOMALY_05000408 (1) |
| 118 | /* Lockbox firmware leaves MDMA0 channel enabled */ | 129 | /* Lockbox firmware leaves MDMA0 channel enabled */ |
| 119 | #define ANOMALY_05000409 (__SILICON_REVISION__ < 2) | 130 | #define ANOMALY_05000409 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 120 | /* Incorrect Default Internal Voltage Regulator Setting */ | 131 | /* Incorrect Default Internal Voltage Regulator Setting */ |
| 121 | #define ANOMALY_05000410 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 132 | #define ANOMALY_05000410 (_ANOMALY_BF527(< 2)) |
| 122 | /* bfrom_SysControl() Firmware Function Cannot be Used to Enter Power Saving Modes */ | 133 | /* bfrom_SysControl() Firmware Function Cannot be Used to Enter Power Saving Modes */ |
| 123 | #define ANOMALY_05000411 (__SILICON_REVISION__ < 2) | 134 | #define ANOMALY_05000411 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 124 | /* OTP_CHECK_FOR_PREV_WRITE Bit is Not Functional in bfrom_OtpWrite() API */ | 135 | /* OTP_CHECK_FOR_PREV_WRITE Bit is Not Functional in bfrom_OtpWrite() API */ |
| 125 | #define ANOMALY_05000414 (__SILICON_REVISION__ < 2) | 136 | #define ANOMALY_05000414 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 126 | /* DEB2_URGENT Bit Not Functional */ | 137 | /* DEB2_URGENT Bit Not Functional */ |
| 127 | #define ANOMALY_05000415 (__SILICON_REVISION__ < 2) | 138 | #define ANOMALY_05000415 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 128 | /* Speculative Fetches Can Cause Undesired External FIFO Operations */ | 139 | /* Speculative Fetches Can Cause Undesired External FIFO Operations */ |
| 129 | #define ANOMALY_05000416 (1) | 140 | #define ANOMALY_05000416 (1) |
| 130 | /* SPORT0 Ignores External TSCLK0 on PG14 When TMR6 is an Output */ | 141 | /* SPORT0 Ignores External TSCLK0 on PG14 When TMR6 is an Output */ |
| 131 | #define ANOMALY_05000417 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 142 | #define ANOMALY_05000417 (_ANOMALY_BF527(< 2)) |
| 132 | /* tSFSPE and tHFSPE Do Not Meet Data Sheet Specifications */ | 143 | /* PPI Timing Requirements tSFSPE and tHFSPE Do Not Meet Data Sheet Specifications */ |
| 133 | #define ANOMALY_05000418 (__SILICON_REVISION__ < 2) | 144 | #define ANOMALY_05000418 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 134 | /* USB PLL_STABLE Bit May Not Accurately Reflect the USB PLL's Status */ | 145 | /* USB PLL_STABLE Bit May Not Accurately Reflect the USB PLL's Status */ |
| 135 | #define ANOMALY_05000420 (__SILICON_REVISION__ < 2) | 146 | #define ANOMALY_05000420 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 136 | /* TWI Fall Time (Tof) May Violate the Minimum I2C Specification */ | 147 | /* TWI Fall Time (Tof) May Violate the Minimum I2C Specification */ |
| 137 | #define ANOMALY_05000421 (1) | 148 | #define ANOMALY_05000421 (1) |
| 138 | /* TWI Input Capacitance (Ci) May Violate the Maximum I2C Specification */ | 149 | /* TWI Input Capacitance (Ci) May Violate the Maximum I2C Specification */ |
| 139 | #define ANOMALY_05000422 (ANOMALY_BF527 && __SILICON_REVISION__ > 1) | 150 | #define ANOMALY_05000422 (_ANOMALY_BF526_BF527(> 0, > 1)) |
| 140 | /* Certain Ethernet Frames With Errors are Misclassified in RMII Mode */ | 151 | /* Certain Ethernet Frames With Errors are Misclassified in RMII Mode */ |
| 141 | #define ANOMALY_05000423 (__SILICON_REVISION__ < 2) | 152 | #define ANOMALY_05000423 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 142 | /* Internal Voltage Regulator Not Trimmed */ | 153 | /* Internal Voltage Regulator Not Trimmed */ |
| 143 | #define ANOMALY_05000424 (ANOMALY_BF527 && __SILICON_REVISION__ < 2) | 154 | #define ANOMALY_05000424 (_ANOMALY_BF527(< 2)) |
| 144 | /* Multichannel SPORT Channel Misalignment Under Specific Configuration */ | 155 | /* Multichannel SPORT Channel Misalignment Under Specific Configuration */ |
| 145 | #define ANOMALY_05000425 (__SILICON_REVISION__ < 2) | 156 | #define ANOMALY_05000425 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 146 | /* Speculative Fetches of Indirect-Pointer Instructions Can Cause Spurious Hardware Errors */ | 157 | /* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */ |
| 147 | #define ANOMALY_05000426 (1) | 158 | #define ANOMALY_05000426 (1) |
| 148 | /* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Reflects Buffer Status Instead of IRQ Status */ | 159 | /* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Reflects Buffer Status Instead of IRQ Status */ |
| 149 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) | 160 | #define ANOMALY_05000429 (_ANOMALY_BF526_BF527(< 1, < 2)) |
| 150 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ | 161 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ |
| 151 | #define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1) | 162 | #define ANOMALY_05000430 (_ANOMALY_BF527(> 1)) |
| 163 | /* Incorrect Use of Stack in Lockbox Firmware During Authentication */ | ||
| 164 | #define ANOMALY_05000431 (1) | ||
| 152 | /* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */ | 165 | /* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */ |
| 153 | #define ANOMALY_05000432 (ANOMALY_BF526) | 166 | #define ANOMALY_05000432 (_ANOMALY_BF526(< 1)) |
| 154 | /* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */ | 167 | /* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */ |
| 155 | #define ANOMALY_05000435 ((ANOMALY_BF526 && __SILICON_REVISION__ < 1) || ANOMALY_BF527) | 168 | #define ANOMALY_05000435 (_ANOMALY_BF526_BF527(< 1, >= 0)) |
| 169 | /* Preboot Cannot be Used to Alter the PLL_DIV Register */ | ||
| 170 | #define ANOMALY_05000439 (_ANOMALY_BF526_BF527(< 1, >= 0)) | ||
| 171 | /* bfrom_SysControl() Cannot be Used to Write the PLL_DIV Register */ | ||
| 172 | #define ANOMALY_05000440 (_ANOMALY_BF526_BF527(< 1, >= 0)) | ||
| 173 | /* OTP Write Accesses Not Supported */ | ||
| 174 | #define ANOMALY_05000442 (_ANOMALY_BF527(< 1)) | ||
| 156 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 175 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
| 157 | #define ANOMALY_05000443 (1) | 176 | #define ANOMALY_05000443 (1) |
| 177 | /* The WURESET Bit in the SYSCR Register is not Functional */ | ||
| 178 | #define ANOMALY_05000445 (1) | ||
| 179 | /* BCODE_QUICKBOOT, BCODE_ALLBOOT, and BCODE_FULLBOOT Settings in SYSCR Register Not Functional */ | ||
| 180 | #define ANOMALY_05000451 (1) | ||
| 181 | /* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */ | ||
| 182 | #define ANOMALY_05000452 (_ANOMALY_BF526_BF527(< 1, >= 0)) | ||
| 183 | /* USB Receive Interrupt Is Not Generated in DMA Mode 1 */ | ||
| 184 | #define ANOMALY_05000456 (1) | ||
| 185 | /* Host DMA Port Responds to Certain Bus Activity Without HOST_CE Assertion */ | ||
| 186 | #define ANOMALY_05000457 (1) | ||
| 187 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 188 | #define ANOMALY_05000461 (1) | ||
| 158 | 189 | ||
| 159 | /* Anomalies that don't exist on this proc */ | 190 | /* Anomalies that don't exist on this proc */ |
| 191 | #define ANOMALY_05000099 (0) | ||
| 192 | #define ANOMALY_05000120 (0) | ||
| 160 | #define ANOMALY_05000125 (0) | 193 | #define ANOMALY_05000125 (0) |
| 194 | #define ANOMALY_05000149 (0) | ||
| 161 | #define ANOMALY_05000158 (0) | 195 | #define ANOMALY_05000158 (0) |
| 196 | #define ANOMALY_05000171 (0) | ||
| 197 | #define ANOMALY_05000179 (0) | ||
| 162 | #define ANOMALY_05000183 (0) | 198 | #define ANOMALY_05000183 (0) |
| 163 | #define ANOMALY_05000198 (0) | 199 | #define ANOMALY_05000198 (0) |
| 200 | #define ANOMALY_05000215 (0) | ||
| 201 | #define ANOMALY_05000220 (0) | ||
| 202 | #define ANOMALY_05000227 (0) | ||
| 164 | #define ANOMALY_05000230 (0) | 203 | #define ANOMALY_05000230 (0) |
| 204 | #define ANOMALY_05000231 (0) | ||
| 205 | #define ANOMALY_05000233 (0) | ||
| 206 | #define ANOMALY_05000242 (0) | ||
| 165 | #define ANOMALY_05000244 (0) | 207 | #define ANOMALY_05000244 (0) |
| 208 | #define ANOMALY_05000248 (0) | ||
| 209 | #define ANOMALY_05000250 (0) | ||
| 166 | #define ANOMALY_05000261 (0) | 210 | #define ANOMALY_05000261 (0) |
| 167 | #define ANOMALY_05000263 (0) | 211 | #define ANOMALY_05000263 (0) |
| 168 | #define ANOMALY_05000266 (0) | 212 | #define ANOMALY_05000266 (0) |
| 169 | #define ANOMALY_05000273 (0) | 213 | #define ANOMALY_05000273 (0) |
| 214 | #define ANOMALY_05000274 (0) | ||
| 170 | #define ANOMALY_05000278 (0) | 215 | #define ANOMALY_05000278 (0) |
| 171 | #define ANOMALY_05000285 (0) | 216 | #define ANOMALY_05000285 (0) |
| 217 | #define ANOMALY_05000287 (0) | ||
| 218 | #define ANOMALY_05000301 (0) | ||
| 172 | #define ANOMALY_05000305 (0) | 219 | #define ANOMALY_05000305 (0) |
| 173 | #define ANOMALY_05000307 (0) | 220 | #define ANOMALY_05000307 (0) |
| 174 | #define ANOMALY_05000311 (0) | 221 | #define ANOMALY_05000311 (0) |
| 175 | #define ANOMALY_05000312 (0) | 222 | #define ANOMALY_05000312 (0) |
| 176 | #define ANOMALY_05000323 (0) | 223 | #define ANOMALY_05000323 (0) |
| 224 | #define ANOMALY_05000362 (1) | ||
| 177 | #define ANOMALY_05000363 (0) | 225 | #define ANOMALY_05000363 (0) |
| 226 | #define ANOMALY_05000400 (0) | ||
| 178 | #define ANOMALY_05000412 (0) | 227 | #define ANOMALY_05000412 (0) |
| 179 | #define ANOMALY_05000447 (0) | 228 | #define ANOMALY_05000447 (0) |
| 180 | #define ANOMALY_05000448 (0) | 229 | #define ANOMALY_05000448 (0) |
| 230 | #define ANOMALY_05000450 (0) | ||
| 181 | 231 | ||
| 182 | #endif | 232 | #endif |
diff --git a/arch/blackfin/mach-bf533/Kconfig b/arch/blackfin/mach-bf533/Kconfig index 14427de7d77f..4c572443147e 100644 --- a/arch/blackfin/mach-bf533/Kconfig +++ b/arch/blackfin/mach-bf533/Kconfig | |||
| @@ -59,6 +59,7 @@ config DMA7_UARTTX | |||
| 59 | default 10 | 59 | default 10 |
| 60 | config TIMER0 | 60 | config TIMER0 |
| 61 | int "TIMER0" | 61 | int "TIMER0" |
| 62 | default 7 if TICKSOURCE_GPTMR0 | ||
| 62 | default 8 | 63 | default 8 |
| 63 | config TIMER1 | 64 | config TIMER1 |
| 64 | int "TIMER1" | 65 | int "TIMER1" |
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c index 0c66bf44cfab..895f213ea454 100644 --- a/arch/blackfin/mach-bf533/boards/H8606.c +++ b/arch/blackfin/mach-bf533/boards/H8606.c | |||
| @@ -173,7 +173,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 173 | }; | 173 | }; |
| 174 | #endif | 174 | #endif |
| 175 | 175 | ||
| 176 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 176 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 177 | /* SPI ADC chip */ | 177 | /* SPI ADC chip */ |
| 178 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 178 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 179 | .ctl_reg = 0x1000, | 179 | .ctl_reg = 0x1000, |
| @@ -216,7 +216,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 216 | }, | 216 | }, |
| 217 | #endif | 217 | #endif |
| 218 | 218 | ||
| 219 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 219 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 220 | { | 220 | { |
| 221 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 221 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 222 | .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ | 222 | .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ |
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c index e8974878d8c2..a727e538fa28 100644 --- a/arch/blackfin/mach-bf533/boards/cm_bf533.c +++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c | |||
| @@ -82,7 +82,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 82 | #endif | 82 | #endif |
| 83 | 83 | ||
| 84 | /* SPI ADC chip */ | 84 | /* SPI ADC chip */ |
| 85 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 85 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 86 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 86 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 87 | .enable_dma = 1, /* use dma transfer with this chip*/ | 87 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| 88 | .bits_per_word = 16, | 88 | .bits_per_word = 16, |
| @@ -117,7 +117,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 117 | }, | 117 | }, |
| 118 | #endif | 118 | #endif |
| 119 | 119 | ||
| 120 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 120 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 121 | { | 121 | { |
| 122 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 122 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 123 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 123 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c index 08cd0969de47..842f1c9c2393 100644 --- a/arch/blackfin/mach-bf533/boards/ezkit.c +++ b/arch/blackfin/mach-bf533/boards/ezkit.c | |||
| @@ -118,7 +118,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 118 | }; | 118 | }; |
| 119 | #endif | 119 | #endif |
| 120 | 120 | ||
| 121 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 121 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 122 | /* SPI ADC chip */ | 122 | /* SPI ADC chip */ |
| 123 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 123 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 124 | .enable_dma = 1, /* use dma transfer with this chip*/ | 124 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -154,7 +154,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 154 | }, | 154 | }, |
| 155 | #endif | 155 | #endif |
| 156 | 156 | ||
| 157 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 157 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 158 | { | 158 | { |
| 159 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 159 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 160 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 160 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c index db96f33f72e2..e19c565ade16 100644 --- a/arch/blackfin/mach-bf533/boards/stamp.c +++ b/arch/blackfin/mach-bf533/boards/stamp.c | |||
| @@ -192,7 +192,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 192 | }; | 192 | }; |
| 193 | #endif | 193 | #endif |
| 194 | 194 | ||
| 195 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 195 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 196 | /* SPI ADC chip */ | 196 | /* SPI ADC chip */ |
| 197 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 197 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 198 | .enable_dma = 1, /* use dma transfer with this chip*/ | 198 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -237,7 +237,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 237 | }, | 237 | }, |
| 238 | #endif | 238 | #endif |
| 239 | 239 | ||
| 240 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 240 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 241 | { | 241 | { |
| 242 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 242 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 243 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 243 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| @@ -448,7 +448,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
| 448 | .irq = 39, | 448 | .irq = 39, |
| 449 | }, | 449 | }, |
| 450 | #endif | 450 | #endif |
| 451 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 451 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 452 | { | 452 | { |
| 453 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 453 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 454 | }, | 454 | }, |
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h index 1cf893e2e55b..31145b509e20 100644 --- a/arch/blackfin/mach-bf533/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List | 10 | * - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| @@ -34,12 +34,12 @@ | |||
| 34 | # define ANOMALY_BF533 0 | 34 | # define ANOMALY_BF533 0 |
| 35 | #endif | 35 | #endif |
| 36 | 36 | ||
| 37 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */ | 37 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ |
| 38 | #define ANOMALY_05000074 (1) | 38 | #define ANOMALY_05000074 (1) |
| 39 | /* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */ | 39 | /* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */ |
| 40 | #define ANOMALY_05000099 (__SILICON_REVISION__ < 5) | 40 | #define ANOMALY_05000099 (__SILICON_REVISION__ < 5) |
| 41 | /* Watchpoint Status Register (WPSTAT) Bits Are Set on Every Corresponding Match */ | 41 | /* Watchpoint Status Register (WPSTAT) Bits Are Set on Every Corresponding Match */ |
| 42 | #define ANOMALY_05000105 (1) | 42 | #define ANOMALY_05000105 (__SILICON_REVISION__ > 2) |
| 43 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ | 43 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ |
| 44 | #define ANOMALY_05000119 (1) | 44 | #define ANOMALY_05000119 (1) |
| 45 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ | 45 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ |
| @@ -48,7 +48,7 @@ | |||
| 48 | #define ANOMALY_05000158 (__SILICON_REVISION__ < 5) | 48 | #define ANOMALY_05000158 (__SILICON_REVISION__ < 5) |
| 49 | /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */ | 49 | /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */ |
| 50 | #define ANOMALY_05000166 (1) | 50 | #define ANOMALY_05000166 (1) |
| 51 | /* Turning Serial Ports on with External Frame Syncs */ | 51 | /* Turning SPORTs on while External Frame Sync Is Active May Corrupt Data */ |
| 52 | #define ANOMALY_05000167 (1) | 52 | #define ANOMALY_05000167 (1) |
| 53 | /* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */ | 53 | /* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */ |
| 54 | #define ANOMALY_05000179 (__SILICON_REVISION__ < 5) | 54 | #define ANOMALY_05000179 (__SILICON_REVISION__ < 5) |
| @@ -67,9 +67,9 @@ | |||
| 67 | /* Current DMA Address Shows Wrong Value During Carry Fix */ | 67 | /* Current DMA Address Shows Wrong Value During Carry Fix */ |
| 68 | #define ANOMALY_05000199 (__SILICON_REVISION__ < 4) | 68 | #define ANOMALY_05000199 (__SILICON_REVISION__ < 4) |
| 69 | /* SPORT TFS and DT Are Incorrectly Driven During Inactive Channels in Certain Conditions */ | 69 | /* SPORT TFS and DT Are Incorrectly Driven During Inactive Channels in Certain Conditions */ |
| 70 | #define ANOMALY_05000200 (__SILICON_REVISION__ < 5) | 70 | #define ANOMALY_05000200 (__SILICON_REVISION__ == 3 || __SILICON_REVISION__ == 4) |
| 71 | /* Receive Frame Sync Not Ignored During Active Frames in SPORT Multi-Channel Mode */ | 71 | /* Receive Frame Sync Not Ignored During Active Frames in SPORT Multi-Channel Mode */ |
| 72 | #define ANOMALY_05000201 (__SILICON_REVISION__ < 4) | 72 | #define ANOMALY_05000201 (__SILICON_REVISION__ == 3) |
| 73 | /* Possible Infinite Stall with Specific Dual-DAG Situation */ | 73 | /* Possible Infinite Stall with Specific Dual-DAG Situation */ |
| 74 | #define ANOMALY_05000202 (__SILICON_REVISION__ < 5) | 74 | #define ANOMALY_05000202 (__SILICON_REVISION__ < 5) |
| 75 | /* Specific Sequence That Can Cause DMA Error or DMA Stopping */ | 75 | /* Specific Sequence That Can Cause DMA Error or DMA Stopping */ |
| @@ -104,7 +104,7 @@ | |||
| 104 | #define ANOMALY_05000242 (__SILICON_REVISION__ < 5) | 104 | #define ANOMALY_05000242 (__SILICON_REVISION__ < 5) |
| 105 | /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ | 105 | /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ |
| 106 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 5) | 106 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 5) |
| 107 | /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ | 107 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 108 | #define ANOMALY_05000245 (1) | 108 | #define ANOMALY_05000245 (1) |
| 109 | /* Data CPLBs Should Prevent Spurious Hardware Errors */ | 109 | /* Data CPLBs Should Prevent Spurious Hardware Errors */ |
| 110 | #define ANOMALY_05000246 (__SILICON_REVISION__ < 5) | 110 | #define ANOMALY_05000246 (__SILICON_REVISION__ < 5) |
| @@ -137,7 +137,7 @@ | |||
| 137 | /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */ | 137 | /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */ |
| 138 | #define ANOMALY_05000270 (__SILICON_REVISION__ < 5) | 138 | #define ANOMALY_05000270 (__SILICON_REVISION__ < 5) |
| 139 | /* Spontaneous Reset of Internal Voltage Regulator */ | 139 | /* Spontaneous Reset of Internal Voltage Regulator */ |
| 140 | #define ANOMALY_05000271 (__SILICON_REVISION__ < 4) | 140 | #define ANOMALY_05000271 (__SILICON_REVISION__ == 3) |
| 141 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ | 141 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ |
| 142 | #define ANOMALY_05000272 (1) | 142 | #define ANOMALY_05000272 (1) |
| 143 | /* Writes to Synchronous SDRAM Memory May Be Lost */ | 143 | /* Writes to Synchronous SDRAM Memory May Be Lost */ |
| @@ -165,14 +165,14 @@ | |||
| 165 | /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ | 165 | /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ |
| 166 | #define ANOMALY_05000306 (__SILICON_REVISION__ < 5) | 166 | #define ANOMALY_05000306 (__SILICON_REVISION__ < 5) |
| 167 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ | 167 | /* SCKELOW Bit Does Not Maintain State Through Hibernate */ |
| 168 | #define ANOMALY_05000307 (1) | 168 | #define ANOMALY_05000307 (1) /* note: brokenness is noted in documentation, not anomaly sheet */ |
| 169 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 169 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
| 170 | #define ANOMALY_05000310 (1) | 170 | #define ANOMALY_05000310 (1) |
| 171 | /* Erroneous Flag (GPIO) Pin Operations under Specific Sequences */ | 171 | /* Erroneous Flag (GPIO) Pin Operations under Specific Sequences */ |
| 172 | #define ANOMALY_05000311 (__SILICON_REVISION__ < 6) | 172 | #define ANOMALY_05000311 (__SILICON_REVISION__ < 6) |
| 173 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ | 173 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ |
| 174 | #define ANOMALY_05000312 (__SILICON_REVISION__ < 6) | 174 | #define ANOMALY_05000312 (__SILICON_REVISION__ < 6) |
| 175 | /* PPI Is Level-Sensitive on First Transfer */ | 175 | /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ |
| 176 | #define ANOMALY_05000313 (__SILICON_REVISION__ < 6) | 176 | #define ANOMALY_05000313 (__SILICON_REVISION__ < 6) |
| 177 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ | 177 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ |
| 178 | #define ANOMALY_05000315 (__SILICON_REVISION__ < 6) | 178 | #define ANOMALY_05000315 (__SILICON_REVISION__ < 6) |
| @@ -200,17 +200,63 @@ | |||
| 200 | #define ANOMALY_05000426 (1) | 200 | #define ANOMALY_05000426 (1) |
| 201 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 201 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
| 202 | #define ANOMALY_05000443 (1) | 202 | #define ANOMALY_05000443 (1) |
| 203 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 204 | #define ANOMALY_05000461 (1) | ||
| 203 | 205 | ||
| 204 | /* These anomalies have been "phased" out of analog.com anomaly sheets and are | 206 | /* These anomalies have been "phased" out of analog.com anomaly sheets and are |
| 205 | * here to show running on older silicon just isn't feasible. | 207 | * here to show running on older silicon just isn't feasible. |
| 206 | */ | 208 | */ |
| 207 | 209 | ||
| 210 | /* Internal voltage regulator can't be modified via register writes */ | ||
| 211 | #define ANOMALY_05000066 (__SILICON_REVISION__ < 2) | ||
| 208 | /* Watchpoints (Hardware Breakpoints) are not supported */ | 212 | /* Watchpoints (Hardware Breakpoints) are not supported */ |
| 209 | #define ANOMALY_05000067 (__SILICON_REVISION__ < 3) | 213 | #define ANOMALY_05000067 (__SILICON_REVISION__ < 3) |
| 214 | /* SDRAM PSSE bit cannot be set again after SDRAM Powerup */ | ||
| 215 | #define ANOMALY_05000070 (__SILICON_REVISION__ < 2) | ||
| 216 | /* Writing FIO_DIR can corrupt a programmable flag's data */ | ||
| 217 | #define ANOMALY_05000079 (__SILICON_REVISION__ < 2) | ||
| 218 | /* Timer Auto-Baud Mode requires the UART clock to be enabled */ | ||
| 219 | #define ANOMALY_05000086 (__SILICON_REVISION__ < 2) | ||
| 220 | /* Internal Clocking Modes on SPORT0 not supported */ | ||
| 221 | #define ANOMALY_05000088 (__SILICON_REVISION__ < 2) | ||
| 222 | /* Internal voltage regulator does not wake up from an RTC wakeup */ | ||
| 223 | #define ANOMALY_05000092 (__SILICON_REVISION__ < 2) | ||
| 224 | /* The IFLUSH instruction must be preceded by a CSYNC instruction */ | ||
| 225 | #define ANOMALY_05000093 (__SILICON_REVISION__ < 2) | ||
| 226 | /* Vectoring to an instruction that is presently being filled into the instruction cache may cause erroneous behavior */ | ||
| 227 | #define ANOMALY_05000095 (__SILICON_REVISION__ < 2) | ||
| 228 | /* PREFETCH, FLUSH, and FLUSHINV must be followed by a CSYNC */ | ||
| 229 | #define ANOMALY_05000096 (__SILICON_REVISION__ < 2) | ||
| 230 | /* Performance Monitor 0 and 1 are swapped when monitoring memory events */ | ||
| 231 | #define ANOMALY_05000097 (__SILICON_REVISION__ < 2) | ||
| 232 | /* 32-bit SPORT DMA will be word reversed */ | ||
| 233 | #define ANOMALY_05000098 (__SILICON_REVISION__ < 2) | ||
| 234 | /* Incorrect status in the UART_IIR register */ | ||
| 235 | #define ANOMALY_05000100 (__SILICON_REVISION__ < 2) | ||
| 236 | /* Reading X_MODIFY or Y_MODIFY while DMA channel is active */ | ||
| 237 | #define ANOMALY_05000101 (__SILICON_REVISION__ < 2) | ||
| 238 | /* Descriptor-based MemDMA may lock up with 32-bit transfers or if transfers span 64KB buffers */ | ||
| 239 | #define ANOMALY_05000102 (__SILICON_REVISION__ < 2) | ||
| 240 | /* Incorrect value written to the cycle counters */ | ||
| 241 | #define ANOMALY_05000103 (__SILICON_REVISION__ < 2) | ||
| 242 | /* Stores to L1 Data memory incorrect when a specific sequence is followed */ | ||
| 243 | #define ANOMALY_05000104 (__SILICON_REVISION__ < 2) | ||
| 244 | /* Programmable Flag (PF3) functionality not supported in all PPI modes */ | ||
| 245 | #define ANOMALY_05000106 (__SILICON_REVISION__ < 2) | ||
| 246 | /* Data store can be lost when targeting a cache line fill */ | ||
| 247 | #define ANOMALY_05000107 (__SILICON_REVISION__ < 2) | ||
| 210 | /* Reserved bits in SYSCFG register not set at power on */ | 248 | /* Reserved bits in SYSCFG register not set at power on */ |
| 211 | #define ANOMALY_05000109 (__SILICON_REVISION__ < 3) | 249 | #define ANOMALY_05000109 (__SILICON_REVISION__ < 3) |
| 250 | /* Infinite Core Stall */ | ||
| 251 | #define ANOMALY_05000114 (__SILICON_REVISION__ < 2) | ||
| 252 | /* PPI_FSx may glitch when generated by the on chip Timers */ | ||
| 253 | #define ANOMALY_05000115 (__SILICON_REVISION__ < 2) | ||
| 212 | /* Trace Buffers may record discontinuities into emulation mode and/or exception, NMI, reset handlers */ | 254 | /* Trace Buffers may record discontinuities into emulation mode and/or exception, NMI, reset handlers */ |
| 213 | #define ANOMALY_05000116 (__SILICON_REVISION__ < 3) | 255 | #define ANOMALY_05000116 (__SILICON_REVISION__ < 3) |
| 256 | /* DTEST registers allow access to Data Cache when DTEST_COMMAND< 14 >= 0 */ | ||
| 257 | #define ANOMALY_05000117 (__SILICON_REVISION__ < 2) | ||
| 258 | /* Booting from an 8-bit or 24-bit Addressable SPI device is not supported */ | ||
| 259 | #define ANOMALY_05000118 (__SILICON_REVISION__ < 2) | ||
| 214 | /* DTEST_COMMAND initiated memory access may be incorrect if data cache or DMA is active */ | 260 | /* DTEST_COMMAND initiated memory access may be incorrect if data cache or DMA is active */ |
| 215 | #define ANOMALY_05000123 (__SILICON_REVISION__ < 3) | 261 | #define ANOMALY_05000123 (__SILICON_REVISION__ < 3) |
| 216 | /* DMA Lock-up at CCLK to SCLK ratios of 4:1, 2:1, or 1:1 */ | 262 | /* DMA Lock-up at CCLK to SCLK ratios of 4:1, 2:1, or 1:1 */ |
| @@ -222,7 +268,9 @@ | |||
| 222 | /* DMEM_CONTROL is not set on Reset */ | 268 | /* DMEM_CONTROL is not set on Reset */ |
| 223 | #define ANOMALY_05000137 (__SILICON_REVISION__ < 3) | 269 | #define ANOMALY_05000137 (__SILICON_REVISION__ < 3) |
| 224 | /* SPI boot will not complete if there is a zero fill block in the loader file */ | 270 | /* SPI boot will not complete if there is a zero fill block in the loader file */ |
| 225 | #define ANOMALY_05000138 (__SILICON_REVISION__ < 3) | 271 | #define ANOMALY_05000138 (__SILICON_REVISION__ == 2) |
| 272 | /* Timerx_Config must be set for using the PPI in GP output mode with internal Frame Syncs */ | ||
| 273 | #define ANOMALY_05000139 (__SILICON_REVISION__ < 2) | ||
| 226 | /* Allowing the SPORT RX FIFO to fill will cause an overflow */ | 274 | /* Allowing the SPORT RX FIFO to fill will cause an overflow */ |
| 227 | #define ANOMALY_05000140 (__SILICON_REVISION__ < 3) | 275 | #define ANOMALY_05000140 (__SILICON_REVISION__ < 3) |
| 228 | /* An Infinite Stall occurs with a particular sequence of consecutive dual dag events */ | 276 | /* An Infinite Stall occurs with a particular sequence of consecutive dual dag events */ |
| @@ -237,17 +285,17 @@ | |||
| 237 | #define ANOMALY_05000145 (__SILICON_REVISION__ < 3) | 285 | #define ANOMALY_05000145 (__SILICON_REVISION__ < 3) |
| 238 | /* MDMA may lose the first few words of a descriptor chain */ | 286 | /* MDMA may lose the first few words of a descriptor chain */ |
| 239 | #define ANOMALY_05000146 (__SILICON_REVISION__ < 3) | 287 | #define ANOMALY_05000146 (__SILICON_REVISION__ < 3) |
| 240 | /* The source MDMA descriptor may stop with a DMA Error */ | 288 | /* Source MDMA descriptor may stop with a DMA Error near beginning of descriptor fetch */ |
| 241 | #define ANOMALY_05000147 (__SILICON_REVISION__ < 3) | 289 | #define ANOMALY_05000147 (__SILICON_REVISION__ < 3) |
| 242 | /* When booting from a 16-bit asynchronous memory device, the upper 8-bits of each word must be 0x00 */ | 290 | /* When booting from a 16-bit asynchronous memory device, the upper 8-bits of each word must be 0x00 */ |
| 243 | #define ANOMALY_05000148 (__SILICON_REVISION__ < 3) | 291 | #define ANOMALY_05000148 (__SILICON_REVISION__ < 3) |
| 244 | /* Frame Delay in SPORT Multichannel Mode */ | 292 | /* Frame Delay in SPORT Multichannel Mode */ |
| 245 | #define ANOMALY_05000153 (__SILICON_REVISION__ < 3) | 293 | #define ANOMALY_05000153 (__SILICON_REVISION__ < 3) |
| 246 | /* SPORT TFS signal is active in Multi-channel mode outside of valid channels */ | 294 | /* SPORT TFS signal stays active in multichannel mode outside of valid channels */ |
| 247 | #define ANOMALY_05000154 (__SILICON_REVISION__ < 3) | 295 | #define ANOMALY_05000154 (__SILICON_REVISION__ < 3) |
| 248 | /* Timer1 can not be used for PWMOUT mode when a certain PPI mode is in use */ | 296 | /* Timer1 can not be used for PWMOUT mode when a certain PPI mode is in use */ |
| 249 | #define ANOMALY_05000155 (__SILICON_REVISION__ < 3) | 297 | #define ANOMALY_05000155 (__SILICON_REVISION__ < 3) |
| 250 | /* A killed 32-bit System MMR write will lead to the next system MMR access thinking it should be 32-bit. */ | 298 | /* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */ |
| 251 | #define ANOMALY_05000157 (__SILICON_REVISION__ < 3) | 299 | #define ANOMALY_05000157 (__SILICON_REVISION__ < 3) |
| 252 | /* SPORT transmit data is not gated by external frame sync in certain conditions */ | 300 | /* SPORT transmit data is not gated by external frame sync in certain conditions */ |
| 253 | #define ANOMALY_05000163 (__SILICON_REVISION__ < 3) | 301 | #define ANOMALY_05000163 (__SILICON_REVISION__ < 3) |
| @@ -275,15 +323,27 @@ | |||
| 275 | #define ANOMALY_05000206 (__SILICON_REVISION__ < 3) | 323 | #define ANOMALY_05000206 (__SILICON_REVISION__ < 3) |
| 276 | 324 | ||
| 277 | /* Anomalies that don't exist on this proc */ | 325 | /* Anomalies that don't exist on this proc */ |
| 326 | #define ANOMALY_05000120 (0) | ||
| 327 | #define ANOMALY_05000149 (0) | ||
| 328 | #define ANOMALY_05000171 (0) | ||
| 329 | #define ANOMALY_05000220 (0) | ||
| 330 | #define ANOMALY_05000248 (0) | ||
| 278 | #define ANOMALY_05000266 (0) | 331 | #define ANOMALY_05000266 (0) |
| 332 | #define ANOMALY_05000274 (0) | ||
| 333 | #define ANOMALY_05000287 (0) | ||
| 279 | #define ANOMALY_05000323 (0) | 334 | #define ANOMALY_05000323 (0) |
| 280 | #define ANOMALY_05000353 (1) | 335 | #define ANOMALY_05000353 (1) |
| 336 | #define ANOMALY_05000362 (1) | ||
| 281 | #define ANOMALY_05000380 (0) | 337 | #define ANOMALY_05000380 (0) |
| 282 | #define ANOMALY_05000386 (1) | 338 | #define ANOMALY_05000386 (1) |
| 339 | #define ANOMALY_05000389 (0) | ||
| 283 | #define ANOMALY_05000412 (0) | 340 | #define ANOMALY_05000412 (0) |
| 341 | #define ANOMALY_05000430 (0) | ||
| 284 | #define ANOMALY_05000432 (0) | 342 | #define ANOMALY_05000432 (0) |
| 285 | #define ANOMALY_05000435 (0) | 343 | #define ANOMALY_05000435 (0) |
| 286 | #define ANOMALY_05000447 (0) | 344 | #define ANOMALY_05000447 (0) |
| 287 | #define ANOMALY_05000448 (0) | 345 | #define ANOMALY_05000448 (0) |
| 346 | #define ANOMALY_05000456 (0) | ||
| 347 | #define ANOMALY_05000450 (0) | ||
| 288 | 348 | ||
| 289 | #endif | 349 | #endif |
diff --git a/arch/blackfin/mach-bf537/Kconfig b/arch/blackfin/mach-bf537/Kconfig index bbc08fd4f122..d81224f9d723 100644 --- a/arch/blackfin/mach-bf537/Kconfig +++ b/arch/blackfin/mach-bf537/Kconfig | |||
| @@ -66,6 +66,7 @@ config IRQ_MAC_TX | |||
| 66 | default 11 | 66 | default 11 |
| 67 | config IRQ_TIMER0 | 67 | config IRQ_TIMER0 |
| 68 | int "IRQ_TIMER0" | 68 | int "IRQ_TIMER0" |
| 69 | default 7 if TICKSOURCE_GPTMR0 | ||
| 69 | default 8 | 70 | default 8 |
| 70 | config IRQ_TIMER1 | 71 | config IRQ_TIMER1 |
| 71 | int "IRQ_TIMER1" | 72 | int "IRQ_TIMER1" |
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c index 41c75b9bfac0..4fee19673127 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c | |||
| @@ -86,7 +86,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 86 | }; | 86 | }; |
| 87 | #endif | 87 | #endif |
| 88 | 88 | ||
| 89 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 89 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 90 | /* SPI ADC chip */ | 90 | /* SPI ADC chip */ |
| 91 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 91 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 92 | .enable_dma = 1, /* use dma transfer with this chip*/ | 92 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -129,7 +129,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 129 | }, | 129 | }, |
| 130 | #endif | 130 | #endif |
| 131 | 131 | ||
| 132 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 132 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 133 | { | 133 | { |
| 134 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 134 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 135 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 135 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c index 4e1de1e53f89..26707ce39f29 100644 --- a/arch/blackfin/mach-bf537/boards/pnav10.c +++ b/arch/blackfin/mach-bf537/boards/pnav10.c | |||
| @@ -265,8 +265,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 265 | }; | 265 | }; |
| 266 | #endif | 266 | #endif |
| 267 | 267 | ||
| 268 | #if defined(CONFIG_SPI_ADC_BF533) \ | 268 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 269 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 269 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 270 | /* SPI ADC chip */ | 270 | /* SPI ADC chip */ |
| 271 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 271 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 272 | .enable_dma = 1, /* use dma transfer with this chip*/ | 272 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -333,8 +333,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 333 | }, | 333 | }, |
| 334 | #endif | 334 | #endif |
| 335 | 335 | ||
| 336 | #if defined(CONFIG_SPI_ADC_BF533) \ | 336 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 337 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 337 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 338 | { | 338 | { |
| 339 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 339 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 340 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 340 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 0572926da23f..dfb5036f8a6b 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
| @@ -508,8 +508,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 508 | }; | 508 | }; |
| 509 | #endif | 509 | #endif |
| 510 | 510 | ||
| 511 | #if defined(CONFIG_SPI_ADC_BF533) \ | 511 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 512 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 512 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 513 | /* SPI ADC chip */ | 513 | /* SPI ADC chip */ |
| 514 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 514 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 515 | .enable_dma = 1, /* use dma transfer with this chip*/ | 515 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -607,6 +607,43 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = { | |||
| 607 | }; | 607 | }; |
| 608 | #endif | 608 | #endif |
| 609 | 609 | ||
| 610 | #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE) | ||
| 611 | #include <linux/input.h> | ||
| 612 | #include <linux/spi/adxl34x.h> | ||
| 613 | static const struct adxl34x_platform_data adxl34x_info = { | ||
| 614 | .x_axis_offset = 0, | ||
| 615 | .y_axis_offset = 0, | ||
| 616 | .z_axis_offset = 0, | ||
| 617 | .tap_threshold = 0x31, | ||
| 618 | .tap_duration = 0x10, | ||
| 619 | .tap_latency = 0x60, | ||
| 620 | .tap_window = 0xF0, | ||
| 621 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, | ||
| 622 | .act_axis_control = 0xFF, | ||
| 623 | .activity_threshold = 5, | ||
| 624 | .inactivity_threshold = 3, | ||
| 625 | .inactivity_time = 4, | ||
| 626 | .free_fall_threshold = 0x7, | ||
| 627 | .free_fall_time = 0x20, | ||
| 628 | .data_rate = 0x8, | ||
| 629 | .data_range = ADXL_FULL_RES, | ||
| 630 | |||
| 631 | .ev_type = EV_ABS, | ||
| 632 | .ev_code_x = ABS_X, /* EV_REL */ | ||
| 633 | .ev_code_y = ABS_Y, /* EV_REL */ | ||
| 634 | .ev_code_z = ABS_Z, /* EV_REL */ | ||
| 635 | |||
| 636 | .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */ | ||
| 637 | .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */ | ||
| 638 | .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */ | ||
| 639 | |||
| 640 | /* .ev_code_ff = KEY_F,*/ /* EV_KEY */ | ||
| 641 | /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */ | ||
| 642 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, | ||
| 643 | .fifo_mode = ADXL_FIFO_STREAM, | ||
| 644 | }; | ||
| 645 | #endif | ||
| 646 | |||
| 610 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | 647 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
| 611 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | 648 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { |
| 612 | .enable_dma = 0, | 649 | .enable_dma = 0, |
| @@ -695,8 +732,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 695 | .mode = SPI_MODE_3, | 732 | .mode = SPI_MODE_3, |
| 696 | }, | 733 | }, |
| 697 | #endif | 734 | #endif |
| 698 | #if defined(CONFIG_SPI_ADC_BF533) \ | 735 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 699 | || defined(CONFIG_SPI_ADC_BF533_MODULE) | 736 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 700 | { | 737 | { |
| 701 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 738 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 702 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 739 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| @@ -1280,7 +1317,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
| 1280 | .irq = IRQ_PF5, | 1317 | .irq = IRQ_PF5, |
| 1281 | }, | 1318 | }, |
| 1282 | #endif | 1319 | #endif |
| 1283 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 1320 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 1284 | { | 1321 | { |
| 1285 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 1322 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 1286 | }, | 1323 | }, |
| @@ -1312,6 +1349,13 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = { | |||
| 1312 | .platform_data = (void *)&adp5520_pdev_data, | 1349 | .platform_data = (void *)&adp5520_pdev_data, |
| 1313 | }, | 1350 | }, |
| 1314 | #endif | 1351 | #endif |
| 1352 | #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE) | ||
| 1353 | { | ||
| 1354 | I2C_BOARD_INFO("adxl34x", 0x53), | ||
| 1355 | .irq = IRQ_PG3, | ||
| 1356 | .platform_data = (void *)&adxl34x_info, | ||
| 1357 | }, | ||
| 1358 | #endif | ||
| 1315 | }; | 1359 | }; |
| 1316 | 1360 | ||
| 1317 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | 1361 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| @@ -1358,16 +1402,18 @@ static struct resource bfin_pata_resources[] = { | |||
| 1358 | static struct pata_platform_info bfin_pata_platform_data = { | 1402 | static struct pata_platform_info bfin_pata_platform_data = { |
| 1359 | .ioport_shift = 0, | 1403 | .ioport_shift = 0, |
| 1360 | }; | 1404 | }; |
| 1361 | 1405 | /* CompactFlash Storage Card Memory Mapped Adressing | |
| 1406 | * /REG = A11 = 1 | ||
| 1407 | */ | ||
| 1362 | static struct resource bfin_pata_resources[] = { | 1408 | static struct resource bfin_pata_resources[] = { |
| 1363 | { | 1409 | { |
| 1364 | .start = 0x20211820, | 1410 | .start = 0x20211800, |
| 1365 | .end = 0x2021183F, | 1411 | .end = 0x20211807, |
| 1366 | .flags = IORESOURCE_MEM, | 1412 | .flags = IORESOURCE_MEM, |
| 1367 | }, | 1413 | }, |
| 1368 | { | 1414 | { |
| 1369 | .start = 0x2021181C, | 1415 | .start = 0x2021180E, /* Device Ctl */ |
| 1370 | .end = 0x2021181F, | 1416 | .end = 0x2021180E, |
| 1371 | .flags = IORESOURCE_MEM, | 1417 | .flags = IORESOURCE_MEM, |
| 1372 | }, | 1418 | }, |
| 1373 | }; | 1419 | }; |
| @@ -1527,7 +1573,8 @@ static int __init stamp_init(void) | |||
| 1527 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); | 1573 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
| 1528 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | 1574 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 1529 | 1575 | ||
| 1530 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | 1576 | #if (defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)) \ |
| 1577 | && defined(PATA_INT) | ||
| 1531 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | 1578 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; |
| 1532 | #endif | 1579 | #endif |
| 1533 | 1580 | ||
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c index 53ad10f3cd76..280574591201 100644 --- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c | |||
| @@ -86,7 +86,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 86 | }; | 86 | }; |
| 87 | #endif | 87 | #endif |
| 88 | 88 | ||
| 89 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 89 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 90 | /* SPI ADC chip */ | 90 | /* SPI ADC chip */ |
| 91 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 91 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 92 | .enable_dma = 1, /* use dma transfer with this chip*/ | 92 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -129,7 +129,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 129 | }, | 129 | }, |
| 130 | #endif | 130 | #endif |
| 131 | 131 | ||
| 132 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 132 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 133 | { | 133 | { |
| 134 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 134 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 135 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 135 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h index 1bfd80c26c90..fc9663425465 100644 --- a/arch/blackfin/mach-bf537/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List | 10 | * - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| @@ -36,77 +36,75 @@ | |||
| 36 | 36 | ||
| 37 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ | 37 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ |
| 38 | #define ANOMALY_05000074 (1) | 38 | #define ANOMALY_05000074 (1) |
| 39 | /* DMA_RUN bit is not valid after a Peripheral Receive Channel DMA stops */ | 39 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ |
| 40 | #define ANOMALY_05000119 (1) | 40 | #define ANOMALY_05000119 (1) |
| 41 | /* Rx.H cannot be used to access 16-bit System MMR registers */ | 41 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ |
| 42 | #define ANOMALY_05000122 (1) | 42 | #define ANOMALY_05000122 (1) |
| 43 | /* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */ | 43 | /* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */ |
| 44 | #define ANOMALY_05000157 (__SILICON_REVISION__ < 2) | 44 | #define ANOMALY_05000157 (__SILICON_REVISION__ < 2) |
| 45 | /* Turning SPORTs on while External Frame Sync Is Active May Corrupt Data */ | 45 | /* PPI_DELAY Not Functional in PPI Modes with 0 Frame Syncs */ |
| 46 | #define ANOMALY_05000167 (1) | ||
| 47 | /* PPI_DELAY not functional in PPI modes with 0 frame syncs */ | ||
| 48 | #define ANOMALY_05000180 (1) | 46 | #define ANOMALY_05000180 (1) |
| 49 | /* Instruction Cache Is Not Functional */ | 47 | /* Instruction Cache Is Not Functional */ |
| 50 | #define ANOMALY_05000237 (__SILICON_REVISION__ < 2) | 48 | #define ANOMALY_05000237 (__SILICON_REVISION__ < 2) |
| 51 | /* If i-cache is on, CSYNC/SSYNC/IDLE around Change of Control causes failures */ | 49 | /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ |
| 52 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 3) | 50 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 3) |
| 53 | /* Spurious Hardware Error from an access in the shadow of a conditional branch */ | 51 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 54 | #define ANOMALY_05000245 (1) | 52 | #define ANOMALY_05000245 (1) |
| 55 | /* CLKIN Buffer Output Enable Reset Behavior Is Changed */ | 53 | /* CLKIN Buffer Output Enable Reset Behavior Is Changed */ |
| 56 | #define ANOMALY_05000247 (1) | 54 | #define ANOMALY_05000247 (1) |
| 57 | /* Incorrect Bit-Shift of Data Word in Multichannel (TDM) mode in certain conditions */ | 55 | /* Incorrect Bit Shift of Data Word in Multichannel (TDM) Mode in Certain Conditions */ |
| 58 | #define ANOMALY_05000250 (__SILICON_REVISION__ < 3) | 56 | #define ANOMALY_05000250 (__SILICON_REVISION__ < 3) |
| 59 | /* EMAC Tx DMA error after an early frame abort */ | 57 | /* EMAC Tx DMA error after an early frame abort */ |
| 60 | #define ANOMALY_05000252 (__SILICON_REVISION__ < 3) | 58 | #define ANOMALY_05000252 (__SILICON_REVISION__ < 3) |
| 61 | /* Maximum external clock speed for Timers */ | 59 | /* Maximum External Clock Speed for Timers */ |
| 62 | #define ANOMALY_05000253 (__SILICON_REVISION__ < 3) | 60 | #define ANOMALY_05000253 (__SILICON_REVISION__ < 3) |
| 63 | /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT mode with external clock */ | 61 | /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */ |
| 64 | #define ANOMALY_05000254 (__SILICON_REVISION__ > 2) | 62 | #define ANOMALY_05000254 (__SILICON_REVISION__ > 2) |
| 65 | /* Entering Hibernate Mode with RTC Seconds event interrupt not functional */ | 63 | /* Entering Hibernate State with RTC Seconds Interrupt Not Functional */ |
| 66 | #define ANOMALY_05000255 (__SILICON_REVISION__ < 3) | 64 | #define ANOMALY_05000255 (__SILICON_REVISION__ < 3) |
| 67 | /* EMAC MDIO input latched on wrong MDC edge */ | 65 | /* EMAC MDIO input latched on wrong MDC edge */ |
| 68 | #define ANOMALY_05000256 (__SILICON_REVISION__ < 3) | 66 | #define ANOMALY_05000256 (__SILICON_REVISION__ < 3) |
| 69 | /* Interrupt/Exception during short hardware loop may cause bad instruction fetches */ | 67 | /* Interrupt/Exception During Short Hardware Loop May Cause Bad Instruction Fetches */ |
| 70 | #define ANOMALY_05000257 (__SILICON_REVISION__ < 3) | 68 | #define ANOMALY_05000257 (__SILICON_REVISION__ < 3) |
| 71 | /* Instruction Cache is corrupted when bits 9 and 12 of the ICPLB Data registers differ */ | 69 | /* Instruction Cache Is Corrupted When Bits 9 and 12 of the ICPLB Data Registers Differ */ |
| 72 | #define ANOMALY_05000258 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ == 1) || __SILICON_REVISION__ == 2) | 70 | #define ANOMALY_05000258 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ == 1) || __SILICON_REVISION__ == 2) |
| 73 | /* ICPLB_STATUS MMR register may be corrupted */ | 71 | /* ICPLB_STATUS MMR Register May Be Corrupted */ |
| 74 | #define ANOMALY_05000260 (__SILICON_REVISION__ == 2) | 72 | #define ANOMALY_05000260 (__SILICON_REVISION__ == 2) |
| 75 | /* DCPLB_FAULT_ADDR MMR register may be corrupted */ | 73 | /* DCPLB_FAULT_ADDR MMR Register May Be Corrupted */ |
| 76 | #define ANOMALY_05000261 (__SILICON_REVISION__ < 3) | 74 | #define ANOMALY_05000261 (__SILICON_REVISION__ < 3) |
| 77 | /* Stores to data cache may be lost */ | 75 | /* Stores To Data Cache May Be Lost */ |
| 78 | #define ANOMALY_05000262 (__SILICON_REVISION__ < 3) | 76 | #define ANOMALY_05000262 (__SILICON_REVISION__ < 3) |
| 79 | /* Hardware loop corrupted when taking an ICPLB exception */ | 77 | /* Hardware Loop Corrupted When Taking an ICPLB Exception */ |
| 80 | #define ANOMALY_05000263 (__SILICON_REVISION__ == 2) | 78 | #define ANOMALY_05000263 (__SILICON_REVISION__ == 2) |
| 81 | /* CSYNC/SSYNC/IDLE causes infinite stall in second to last instruction in hardware loop */ | 79 | /* CSYNC/SSYNC/IDLE Causes Infinite Stall in Penultimate Instruction in Hardware Loop */ |
| 82 | #define ANOMALY_05000264 (__SILICON_REVISION__ < 3) | 80 | #define ANOMALY_05000264 (__SILICON_REVISION__ < 3) |
| 83 | /* Sensitivity to noise with slow input edge rates on external SPORT TX and RX clocks */ | 81 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ |
| 84 | #define ANOMALY_05000265 (1) | 82 | #define ANOMALY_05000265 (1) |
| 85 | /* Memory DMA error when peripheral DMA is running with non-zero DEB_TRAFFIC_PERIOD */ | 83 | /* Memory DMA error when peripheral DMA is running with non-zero DEB_TRAFFIC_PERIOD */ |
| 86 | #define ANOMALY_05000268 (__SILICON_REVISION__ < 3) | 84 | #define ANOMALY_05000268 (__SILICON_REVISION__ < 3) |
| 87 | /* High I/O activity causes output voltage of internal voltage regulator (VDDint) to decrease */ | 85 | /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */ |
| 88 | #define ANOMALY_05000270 (__SILICON_REVISION__ < 3) | 86 | #define ANOMALY_05000270 (__SILICON_REVISION__ < 3) |
| 89 | /* Certain data cache write through modes fail for VDDint <=0.9V */ | 87 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ |
| 90 | #define ANOMALY_05000272 (1) | 88 | #define ANOMALY_05000272 (1) |
| 91 | /* Writes to Synchronous SDRAM memory may be lost */ | 89 | /* Writes to Synchronous SDRAM Memory May Be Lost */ |
| 92 | #define ANOMALY_05000273 (__SILICON_REVISION__ < 3) | 90 | #define ANOMALY_05000273 (__SILICON_REVISION__ < 3) |
| 93 | /* Writes to an I/O data register one SCLK cycle after an edge is detected may clear interrupt */ | 91 | /* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */ |
| 94 | #define ANOMALY_05000277 (__SILICON_REVISION__ < 3) | 92 | #define ANOMALY_05000277 (__SILICON_REVISION__ < 3) |
| 95 | /* Disabling Peripherals with DMA running may cause DMA system instability */ | 93 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ |
| 96 | #define ANOMALY_05000278 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ < 3) || (ANOMALY_BF534 && __SILICON_REVISION__ < 2)) | 94 | #define ANOMALY_05000278 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ < 3) || (ANOMALY_BF534 && __SILICON_REVISION__ < 2)) |
| 97 | /* SPI Master boot mode does not work well with Atmel Data flash devices */ | 95 | /* SPI Master boot mode does not work well with Atmel Data flash devices */ |
| 98 | #define ANOMALY_05000280 (1) | 96 | #define ANOMALY_05000280 (1) |
| 99 | /* False Hardware Error Exception when ISR context is not restored */ | 97 | /* False Hardware Error Exception When ISR Context Is Not Restored */ |
| 100 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 3) | 98 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 3) |
| 101 | /* Memory DMA corruption with 32-bit data and traffic control */ | 99 | /* Memory DMA Corruption with 32-Bit Data and Traffic Control */ |
| 102 | #define ANOMALY_05000282 (__SILICON_REVISION__ < 3) | 100 | #define ANOMALY_05000282 (__SILICON_REVISION__ < 3) |
| 103 | /* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */ | 101 | /* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */ |
| 104 | #define ANOMALY_05000283 (__SILICON_REVISION__ < 3) | 102 | #define ANOMALY_05000283 (__SILICON_REVISION__ < 3) |
| 105 | /* New Feature: EMAC TX DMA Word Alignment (Not Available On Older Silicon) */ | 103 | /* New Feature: EMAC TX DMA Word Alignment (Not Available On Older Silicon) */ |
| 106 | #define ANOMALY_05000285 (__SILICON_REVISION__ < 3) | 104 | #define ANOMALY_05000285 (__SILICON_REVISION__ < 3) |
| 107 | /* SPORTs may receive bad data if FIFOs fill up */ | 105 | /* SPORTs May Receive Bad Data If FIFOs Fill Up */ |
| 108 | #define ANOMALY_05000288 (__SILICON_REVISION__ < 3) | 106 | #define ANOMALY_05000288 (__SILICON_REVISION__ < 3) |
| 109 | /* Memory to memory DMA source/destination descriptors must be in same memory space */ | 107 | /* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */ |
| 110 | #define ANOMALY_05000301 (1) | 108 | #define ANOMALY_05000301 (1) |
| 111 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ | 109 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ |
| 112 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 3) | 110 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 3) |
| @@ -116,11 +114,11 @@ | |||
| 116 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 3) | 114 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 3) |
| 117 | /* Writing UART_THR while UART clock is disabled sends erroneous start bit */ | 115 | /* Writing UART_THR while UART clock is disabled sends erroneous start bit */ |
| 118 | #define ANOMALY_05000309 (__SILICON_REVISION__ < 3) | 116 | #define ANOMALY_05000309 (__SILICON_REVISION__ < 3) |
| 119 | /* False hardware errors caused by fetches at the boundary of reserved memory */ | 117 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
| 120 | #define ANOMALY_05000310 (1) | 118 | #define ANOMALY_05000310 (1) |
| 121 | /* Errors when SSYNC, CSYNC, or loads to LT, LB and LC registers are interrupted */ | 119 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ |
| 122 | #define ANOMALY_05000312 (1) | 120 | #define ANOMALY_05000312 (1) |
| 123 | /* PPI is level sensitive on first transfer */ | 121 | /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ |
| 124 | #define ANOMALY_05000313 (1) | 122 | #define ANOMALY_05000313 (1) |
| 125 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ | 123 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ |
| 126 | #define ANOMALY_05000315 (__SILICON_REVISION__ < 3) | 124 | #define ANOMALY_05000315 (__SILICON_REVISION__ < 3) |
| @@ -156,24 +154,46 @@ | |||
| 156 | #define ANOMALY_05000426 (1) | 154 | #define ANOMALY_05000426 (1) |
| 157 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 155 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
| 158 | #define ANOMALY_05000443 (1) | 156 | #define ANOMALY_05000443 (1) |
| 157 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 158 | #define ANOMALY_05000461 (1) | ||
| 159 | 159 | ||
| 160 | /* Anomalies that don't exist on this proc */ | 160 | /* Anomalies that don't exist on this proc */ |
| 161 | #define ANOMALY_05000099 (0) | ||
| 162 | #define ANOMALY_05000120 (0) | ||
| 161 | #define ANOMALY_05000125 (0) | 163 | #define ANOMALY_05000125 (0) |
| 164 | #define ANOMALY_05000149 (0) | ||
| 162 | #define ANOMALY_05000158 (0) | 165 | #define ANOMALY_05000158 (0) |
| 166 | #define ANOMALY_05000171 (0) | ||
| 167 | #define ANOMALY_05000179 (0) | ||
| 163 | #define ANOMALY_05000183 (0) | 168 | #define ANOMALY_05000183 (0) |
| 164 | #define ANOMALY_05000198 (0) | 169 | #define ANOMALY_05000198 (0) |
| 170 | #define ANOMALY_05000215 (0) | ||
| 171 | #define ANOMALY_05000220 (0) | ||
| 172 | #define ANOMALY_05000227 (0) | ||
| 165 | #define ANOMALY_05000230 (0) | 173 | #define ANOMALY_05000230 (0) |
| 174 | #define ANOMALY_05000231 (0) | ||
| 175 | #define ANOMALY_05000233 (0) | ||
| 176 | #define ANOMALY_05000242 (0) | ||
| 177 | #define ANOMALY_05000248 (0) | ||
| 166 | #define ANOMALY_05000266 (0) | 178 | #define ANOMALY_05000266 (0) |
| 179 | #define ANOMALY_05000274 (0) | ||
| 180 | #define ANOMALY_05000287 (0) | ||
| 167 | #define ANOMALY_05000311 (0) | 181 | #define ANOMALY_05000311 (0) |
| 168 | #define ANOMALY_05000323 (0) | 182 | #define ANOMALY_05000323 (0) |
| 169 | #define ANOMALY_05000353 (1) | 183 | #define ANOMALY_05000353 (1) |
| 184 | #define ANOMALY_05000362 (1) | ||
| 170 | #define ANOMALY_05000363 (0) | 185 | #define ANOMALY_05000363 (0) |
| 171 | #define ANOMALY_05000380 (0) | 186 | #define ANOMALY_05000380 (0) |
| 172 | #define ANOMALY_05000386 (1) | 187 | #define ANOMALY_05000386 (1) |
| 188 | #define ANOMALY_05000389 (0) | ||
| 189 | #define ANOMALY_05000400 (0) | ||
| 173 | #define ANOMALY_05000412 (0) | 190 | #define ANOMALY_05000412 (0) |
| 191 | #define ANOMALY_05000430 (0) | ||
| 174 | #define ANOMALY_05000432 (0) | 192 | #define ANOMALY_05000432 (0) |
| 175 | #define ANOMALY_05000435 (0) | 193 | #define ANOMALY_05000435 (0) |
| 176 | #define ANOMALY_05000447 (0) | 194 | #define ANOMALY_05000447 (0) |
| 177 | #define ANOMALY_05000448 (0) | 195 | #define ANOMALY_05000448 (0) |
| 196 | #define ANOMALY_05000456 (0) | ||
| 197 | #define ANOMALY_05000450 (0) | ||
| 178 | 198 | ||
| 179 | #endif | 199 | #endif |
diff --git a/arch/blackfin/mach-bf538/Kconfig b/arch/blackfin/mach-bf538/Kconfig index f068c3523cdc..2d280f504ab0 100644 --- a/arch/blackfin/mach-bf538/Kconfig +++ b/arch/blackfin/mach-bf538/Kconfig | |||
| @@ -57,6 +57,7 @@ config IRQ_UART0_TX | |||
| 57 | default 10 | 57 | default 10 |
| 58 | config IRQ_TIMER0 | 58 | config IRQ_TIMER0 |
| 59 | int "IRQ_TIMER0" | 59 | int "IRQ_TIMER0" |
| 60 | default 7 if TICKSOURCE_GPTMR0 | ||
| 60 | default 8 | 61 | default 8 |
| 61 | config IRQ_TIMER1 | 62 | config IRQ_TIMER1 |
| 62 | int "IRQ_TIMER1" | 63 | int "IRQ_TIMER1" |
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h index 3a5699827363..175ca9ef7232 100644 --- a/arch/blackfin/mach-bf538/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision G, 09/18/2008; ADSP-BF538/BF538F Blackfin Processor Anomaly List | 10 | * - Revision G, 09/18/2008; ADSP-BF538/BF538F Blackfin Processor Anomaly List |
| 11 | * - Revision L, 09/18/2008; ADSP-BF539/BF539F Blackfin Processor Anomaly List | 11 | * - Revision L, 09/18/2008; ADSP-BF539/BF539F Blackfin Processor Anomaly List |
| 12 | */ | 12 | */ |
| @@ -14,17 +14,29 @@ | |||
| 14 | #ifndef _MACH_ANOMALY_H_ | 14 | #ifndef _MACH_ANOMALY_H_ |
| 15 | #define _MACH_ANOMALY_H_ | 15 | #define _MACH_ANOMALY_H_ |
| 16 | 16 | ||
| 17 | /* We do not support old silicon - sorry */ | ||
| 17 | #if __SILICON_REVISION__ < 4 | 18 | #if __SILICON_REVISION__ < 4 |
| 18 | # error will not work on BF538 silicon version 0.0, 0.1, 0.2, or 0.3 | 19 | # error will not work on BF538/BF539 silicon version 0.0, 0.1, 0.2, or 0.3 |
| 19 | #endif | 20 | #endif |
| 20 | 21 | ||
| 21 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ | 22 | #if defined(__ADSPBF538__) |
| 23 | # define ANOMALY_BF538 1 | ||
| 24 | #else | ||
| 25 | # define ANOMALY_BF538 0 | ||
| 26 | #endif | ||
| 27 | #if defined(__ADSPBF539__) | ||
| 28 | # define ANOMALY_BF539 1 | ||
| 29 | #else | ||
| 30 | # define ANOMALY_BF539 0 | ||
| 31 | #endif | ||
| 32 | |||
| 33 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ | ||
| 22 | #define ANOMALY_05000074 (1) | 34 | #define ANOMALY_05000074 (1) |
| 23 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ | 35 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ |
| 24 | #define ANOMALY_05000119 (1) | 36 | #define ANOMALY_05000119 (1) |
| 25 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ | 37 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ |
| 26 | #define ANOMALY_05000122 (1) | 38 | #define ANOMALY_05000122 (1) |
| 27 | /* PPI Data Lengths between 8 and 16 Do Not Zero Out Upper Bits */ | 39 | /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */ |
| 28 | #define ANOMALY_05000166 (1) | 40 | #define ANOMALY_05000166 (1) |
| 29 | /* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */ | 41 | /* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */ |
| 30 | #define ANOMALY_05000179 (1) | 42 | #define ANOMALY_05000179 (1) |
| @@ -40,13 +52,13 @@ | |||
| 40 | #define ANOMALY_05000229 (1) | 52 | #define ANOMALY_05000229 (1) |
| 41 | /* PPI_FS3 Is Not Driven in 2 or 3 Internal Frame Sync Transmit Modes */ | 53 | /* PPI_FS3 Is Not Driven in 2 or 3 Internal Frame Sync Transmit Modes */ |
| 42 | #define ANOMALY_05000233 (1) | 54 | #define ANOMALY_05000233 (1) |
| 43 | /* If i-cache is on, CSYNC/SSYNC/IDLE around Change of Control causes failures */ | 55 | /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ |
| 44 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 3) | 56 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 3) |
| 45 | /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ | 57 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 46 | #define ANOMALY_05000245 (1) | 58 | #define ANOMALY_05000245 (1) |
| 47 | /* Maximum External Clock Speed for Timers */ | 59 | /* Maximum External Clock Speed for Timers */ |
| 48 | #define ANOMALY_05000253 (1) | 60 | #define ANOMALY_05000253 (1) |
| 49 | /* DCPLB_FAULT_ADDR MMR register may be corrupted */ | 61 | /* DCPLB_FAULT_ADDR MMR Register May Be Corrupted */ |
| 50 | #define ANOMALY_05000261 (__SILICON_REVISION__ < 3) | 62 | #define ANOMALY_05000261 (__SILICON_REVISION__ < 3) |
| 51 | /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */ | 63 | /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */ |
| 52 | #define ANOMALY_05000270 (__SILICON_REVISION__ < 4) | 64 | #define ANOMALY_05000270 (__SILICON_REVISION__ < 4) |
| @@ -58,11 +70,11 @@ | |||
| 58 | #define ANOMALY_05000277 (__SILICON_REVISION__ < 4) | 70 | #define ANOMALY_05000277 (__SILICON_REVISION__ < 4) |
| 59 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ | 71 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ |
| 60 | #define ANOMALY_05000278 (__SILICON_REVISION__ < 4) | 72 | #define ANOMALY_05000278 (__SILICON_REVISION__ < 4) |
| 61 | /* False Hardware Error Exception when ISR Context Is Not Restored */ | 73 | /* False Hardware Error Exception When ISR Context Is Not Restored */ |
| 62 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 4) | 74 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 4) |
| 63 | /* Memory DMA Corruption with 32-Bit Data and Traffic Control */ | 75 | /* Memory DMA Corruption with 32-Bit Data and Traffic Control */ |
| 64 | #define ANOMALY_05000282 (__SILICON_REVISION__ < 4) | 76 | #define ANOMALY_05000282 (__SILICON_REVISION__ < 4) |
| 65 | /* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */ | 77 | /* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */ |
| 66 | #define ANOMALY_05000283 (__SILICON_REVISION__ < 4) | 78 | #define ANOMALY_05000283 (__SILICON_REVISION__ < 4) |
| 67 | /* SPORTs May Receive Bad Data If FIFOs Fill Up */ | 79 | /* SPORTs May Receive Bad Data If FIFOs Fill Up */ |
| 68 | #define ANOMALY_05000288 (__SILICON_REVISION__ < 4) | 80 | #define ANOMALY_05000288 (__SILICON_REVISION__ < 4) |
| @@ -80,14 +92,14 @@ | |||
| 80 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 4) | 92 | #define ANOMALY_05000307 (__SILICON_REVISION__ < 4) |
| 81 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 93 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
| 82 | #define ANOMALY_05000310 (1) | 94 | #define ANOMALY_05000310 (1) |
| 83 | /* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ | 95 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ |
| 84 | #define ANOMALY_05000312 (__SILICON_REVISION__ < 5) | 96 | #define ANOMALY_05000312 (__SILICON_REVISION__ < 5) |
| 85 | /* PPI Is Level-Sensitive on First Transfer */ | 97 | /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ |
| 86 | #define ANOMALY_05000313 (__SILICON_REVISION__ < 4) | 98 | #define ANOMALY_05000313 (__SILICON_REVISION__ < 4) |
| 87 | /* Killed System MMR Write Completes Erroneously on Next System MMR Access */ | 99 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ |
| 88 | #define ANOMALY_05000315 (__SILICON_REVISION__ < 4) | 100 | #define ANOMALY_05000315 (__SILICON_REVISION__ < 4) |
| 89 | /* PFx Glitch on Write to FIO_FLAG_D or FIO_FLAG_T */ | 101 | /* PFx Glitch on Write to FIO_FLAG_D or FIO_FLAG_T */ |
| 90 | #define ANOMALY_05000318 (__SILICON_REVISION__ < 4) | 102 | #define ANOMALY_05000318 (ANOMALY_BF539 && __SILICON_REVISION__ < 4) |
| 91 | /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ | 103 | /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ |
| 92 | #define ANOMALY_05000355 (__SILICON_REVISION__ < 5) | 104 | #define ANOMALY_05000355 (__SILICON_REVISION__ < 5) |
| 93 | /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ | 105 | /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ |
| @@ -114,23 +126,45 @@ | |||
| 114 | #define ANOMALY_05000436 (__SILICON_REVISION__ > 3) | 126 | #define ANOMALY_05000436 (__SILICON_REVISION__ > 3) |
| 115 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 127 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
| 116 | #define ANOMALY_05000443 (1) | 128 | #define ANOMALY_05000443 (1) |
| 129 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 130 | #define ANOMALY_05000461 (1) | ||
| 117 | 131 | ||
| 118 | /* Anomalies that don't exist on this proc */ | 132 | /* Anomalies that don't exist on this proc */ |
| 133 | #define ANOMALY_05000099 (0) | ||
| 134 | #define ANOMALY_05000120 (0) | ||
| 135 | #define ANOMALY_05000149 (0) | ||
| 119 | #define ANOMALY_05000158 (0) | 136 | #define ANOMALY_05000158 (0) |
| 137 | #define ANOMALY_05000171 (0) | ||
| 120 | #define ANOMALY_05000198 (0) | 138 | #define ANOMALY_05000198 (0) |
| 139 | #define ANOMALY_05000215 (0) | ||
| 140 | #define ANOMALY_05000220 (0) | ||
| 141 | #define ANOMALY_05000227 (0) | ||
| 121 | #define ANOMALY_05000230 (0) | 142 | #define ANOMALY_05000230 (0) |
| 143 | #define ANOMALY_05000231 (0) | ||
| 144 | #define ANOMALY_05000242 (0) | ||
| 145 | #define ANOMALY_05000248 (0) | ||
| 146 | #define ANOMALY_05000250 (0) | ||
| 147 | #define ANOMALY_05000254 (0) | ||
| 122 | #define ANOMALY_05000263 (0) | 148 | #define ANOMALY_05000263 (0) |
| 149 | #define ANOMALY_05000274 (0) | ||
| 150 | #define ANOMALY_05000287 (0) | ||
| 123 | #define ANOMALY_05000305 (0) | 151 | #define ANOMALY_05000305 (0) |
| 124 | #define ANOMALY_05000311 (0) | 152 | #define ANOMALY_05000311 (0) |
| 125 | #define ANOMALY_05000323 (0) | 153 | #define ANOMALY_05000323 (0) |
| 126 | #define ANOMALY_05000353 (1) | 154 | #define ANOMALY_05000353 (1) |
| 155 | #define ANOMALY_05000362 (1) | ||
| 127 | #define ANOMALY_05000363 (0) | 156 | #define ANOMALY_05000363 (0) |
| 128 | #define ANOMALY_05000380 (0) | 157 | #define ANOMALY_05000380 (0) |
| 129 | #define ANOMALY_05000386 (1) | 158 | #define ANOMALY_05000386 (1) |
| 159 | #define ANOMALY_05000389 (0) | ||
| 160 | #define ANOMALY_05000400 (0) | ||
| 130 | #define ANOMALY_05000412 (0) | 161 | #define ANOMALY_05000412 (0) |
| 162 | #define ANOMALY_05000430 (0) | ||
| 131 | #define ANOMALY_05000432 (0) | 163 | #define ANOMALY_05000432 (0) |
| 132 | #define ANOMALY_05000435 (0) | 164 | #define ANOMALY_05000435 (0) |
| 133 | #define ANOMALY_05000447 (0) | 165 | #define ANOMALY_05000447 (0) |
| 134 | #define ANOMALY_05000448 (0) | 166 | #define ANOMALY_05000448 (0) |
| 167 | #define ANOMALY_05000456 (0) | ||
| 168 | #define ANOMALY_05000450 (0) | ||
| 135 | 169 | ||
| 136 | #endif | 170 | #endif |
diff --git a/arch/blackfin/mach-bf538/include/mach/blackfin.h b/arch/blackfin/mach-bf538/include/mach/blackfin.h index ea25371a922b..6f628353dde3 100644 --- a/arch/blackfin/mach-bf538/include/mach/blackfin.h +++ b/arch/blackfin/mach-bf538/include/mach/blackfin.h | |||
| @@ -68,25 +68,6 @@ | |||
| 68 | #define OFFSET_SCR 0x1C /* SCR Scratch Register */ | 68 | #define OFFSET_SCR 0x1C /* SCR Scratch Register */ |
| 69 | #define OFFSET_GCTL 0x24 /* Global Control Register */ | 69 | #define OFFSET_GCTL 0x24 /* Global Control Register */ |
| 70 | 70 | ||
| 71 | |||
| 72 | #define bfin_write_MDMA_D0_IRQ_STATUS bfin_write_MDMA0_D0_IRQ_STATUS | ||
| 73 | #define bfin_write_MDMA_D0_START_ADDR bfin_write_MDMA0_D0_START_ADDR | ||
| 74 | #define bfin_write_MDMA_S0_START_ADDR bfin_write_MDMA0_S0_START_ADDR | ||
| 75 | #define bfin_write_MDMA_D0_X_COUNT bfin_write_MDMA0_D0_X_COUNT | ||
| 76 | #define bfin_write_MDMA_S0_X_COUNT bfin_write_MDMA0_S0_X_COUNT | ||
| 77 | #define bfin_write_MDMA_D0_Y_COUNT bfin_write_MDMA0_D0_Y_COUNT | ||
| 78 | #define bfin_write_MDMA_S0_Y_COUNT bfin_write_MDMA0_S0_Y_COUNT | ||
| 79 | #define bfin_write_MDMA_D0_X_MODIFY bfin_write_MDMA0_D0_X_MODIFY | ||
| 80 | #define bfin_write_MDMA_S0_X_MODIFY bfin_write_MDMA0_S0_X_MODIFY | ||
| 81 | #define bfin_write_MDMA_D0_Y_MODIFY bfin_write_MDMA0_D0_Y_MODIFY | ||
| 82 | #define bfin_write_MDMA_S0_Y_MODIFY bfin_write_MDMA0_S0_Y_MODIFY | ||
| 83 | #define bfin_write_MDMA_S0_CONFIG bfin_write_MDMA0_S0_CONFIG | ||
| 84 | #define bfin_write_MDMA_D0_CONFIG bfin_write_MDMA0_D0_CONFIG | ||
| 85 | #define bfin_read_MDMA_S0_CONFIG bfin_read_MDMA0_S0_CONFIG | ||
| 86 | #define bfin_read_MDMA_D0_IRQ_STATUS bfin_read_MDMA0_D0_IRQ_STATUS | ||
| 87 | #define bfin_write_MDMA_S0_IRQ_STATUS bfin_write_MDMA0_S0_IRQ_STATUS | ||
| 88 | |||
| 89 | |||
| 90 | /* DPMC*/ | 71 | /* DPMC*/ |
| 91 | #define bfin_read_STOPCK_OFF() bfin_read_STOPCK() | 72 | #define bfin_read_STOPCK_OFF() bfin_read_STOPCK() |
| 92 | #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) | 73 | #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) |
diff --git a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h index 241725bc6988..99ca3f4305e2 100644 --- a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h +++ b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h | |||
| @@ -67,14 +67,14 @@ | |||
| 67 | #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val) | 67 | #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val) |
| 68 | #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1) | 68 | #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1) |
| 69 | #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val) | 69 | #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val) |
| 70 | #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0)) | 70 | #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0)) |
| 71 | #define bfin_write_SIC_ISR(x, val) bfin_write32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0), val) | 71 | #define bfin_write_SIC_ISR(x, val) bfin_write32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0), val) |
| 72 | #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0) | 72 | #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0) |
| 73 | #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val) | 73 | #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val) |
| 74 | #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1) | 74 | #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1) |
| 75 | #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val) | 75 | #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val) |
| 76 | #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0)) | 76 | #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0)) |
| 77 | #define bfin_write_SIC_IWR(x, val) bfin_write32((SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val) | 77 | #define bfin_write_SIC_IWR(x, val) bfin_write32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val) |
| 78 | #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0) | 78 | #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0) |
| 79 | #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val) | 79 | #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val) |
| 80 | #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1) | 80 | #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1) |
| @@ -1247,6 +1247,65 @@ | |||
| 1247 | #define bfin_write_MDMA1_S1_CURR_X_COUNT(val) bfin_write16(MDMA1_S1_CURR_X_COUNT, val) | 1247 | #define bfin_write_MDMA1_S1_CURR_X_COUNT(val) bfin_write16(MDMA1_S1_CURR_X_COUNT, val) |
| 1248 | #define bfin_read_MDMA1_S1_CURR_Y_COUNT() bfin_read16(MDMA1_S1_CURR_Y_COUNT) | 1248 | #define bfin_read_MDMA1_S1_CURR_Y_COUNT() bfin_read16(MDMA1_S1_CURR_Y_COUNT) |
| 1249 | #define bfin_write_MDMA1_S1_CURR_Y_COUNT(val) bfin_write16(MDMA1_S1_CURR_Y_COUNT, val) | 1249 | #define bfin_write_MDMA1_S1_CURR_Y_COUNT(val) bfin_write16(MDMA1_S1_CURR_Y_COUNT, val) |
| 1250 | |||
| 1251 | #define bfin_read_MDMA_S0_CONFIG() bfin_read_MDMA0_S0_CONFIG() | ||
| 1252 | #define bfin_write_MDMA_S0_CONFIG(val) bfin_write_MDMA0_S0_CONFIG(val) | ||
| 1253 | #define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read_MDMA0_S0_IRQ_STATUS() | ||
| 1254 | #define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write_MDMA0_S0_IRQ_STATUS(val) | ||
| 1255 | #define bfin_read_MDMA_S0_X_MODIFY() bfin_read_MDMA0_S0_X_MODIFY() | ||
| 1256 | #define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write_MDMA0_S0_X_MODIFY(val) | ||
| 1257 | #define bfin_read_MDMA_S0_Y_MODIFY() bfin_read_MDMA0_S0_Y_MODIFY() | ||
| 1258 | #define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write_MDMA0_S0_Y_MODIFY(val) | ||
| 1259 | #define bfin_read_MDMA_S0_X_COUNT() bfin_read_MDMA0_S0_X_COUNT() | ||
| 1260 | #define bfin_write_MDMA_S0_X_COUNT(val) bfin_write_MDMA0_S0_X_COUNT(val) | ||
| 1261 | #define bfin_read_MDMA_S0_Y_COUNT() bfin_read_MDMA0_S0_Y_COUNT() | ||
| 1262 | #define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write_MDMA0_S0_Y_COUNT(val) | ||
| 1263 | #define bfin_read_MDMA_S0_START_ADDR() bfin_read_MDMA0_S0_START_ADDR() | ||
| 1264 | #define bfin_write_MDMA_S0_START_ADDR(val) bfin_write_MDMA0_S0_START_ADDR(val) | ||
| 1265 | #define bfin_read_MDMA_D0_CONFIG() bfin_read_MDMA0_D0_CONFIG() | ||
| 1266 | #define bfin_write_MDMA_D0_CONFIG(val) bfin_write_MDMA0_D0_CONFIG(val) | ||
| 1267 | #define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read_MDMA0_D0_IRQ_STATUS() | ||
| 1268 | #define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write_MDMA0_D0_IRQ_STATUS(val) | ||
| 1269 | #define bfin_read_MDMA_D0_X_MODIFY() bfin_read_MDMA0_D0_X_MODIFY() | ||
| 1270 | #define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write_MDMA0_D0_X_MODIFY(val) | ||
| 1271 | #define bfin_read_MDMA_D0_Y_MODIFY() bfin_read_MDMA0_D0_Y_MODIFY() | ||
| 1272 | #define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write_MDMA0_D0_Y_MODIFY(val) | ||
| 1273 | #define bfin_read_MDMA_D0_X_COUNT() bfin_read_MDMA0_D0_X_COUNT() | ||
| 1274 | #define bfin_write_MDMA_D0_X_COUNT(val) bfin_write_MDMA0_D0_X_COUNT(val) | ||
| 1275 | #define bfin_read_MDMA_D0_Y_COUNT() bfin_read_MDMA0_D0_Y_COUNT() | ||
| 1276 | #define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write_MDMA0_D0_Y_COUNT(val) | ||
| 1277 | #define bfin_read_MDMA_D0_START_ADDR() bfin_read_MDMA0_D0_START_ADDR() | ||
| 1278 | #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write_MDMA0_D0_START_ADDR(val) | ||
| 1279 | |||
| 1280 | #define bfin_read_MDMA_S1_CONFIG() bfin_read_MDMA0_S1_CONFIG() | ||
| 1281 | #define bfin_write_MDMA_S1_CONFIG(val) bfin_write_MDMA0_S1_CONFIG(val) | ||
| 1282 | #define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read_MDMA0_S1_IRQ_STATUS() | ||
| 1283 | #define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write_MDMA0_S1_IRQ_STATUS(val) | ||
| 1284 | #define bfin_read_MDMA_S1_X_MODIFY() bfin_read_MDMA0_S1_X_MODIFY() | ||
| 1285 | #define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write_MDMA0_S1_X_MODIFY(val) | ||
| 1286 | #define bfin_read_MDMA_S1_Y_MODIFY() bfin_read_MDMA0_S1_Y_MODIFY() | ||
| 1287 | #define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write_MDMA0_S1_Y_MODIFY(val) | ||
| 1288 | #define bfin_read_MDMA_S1_X_COUNT() bfin_read_MDMA0_S1_X_COUNT() | ||
| 1289 | #define bfin_write_MDMA_S1_X_COUNT(val) bfin_write_MDMA0_S1_X_COUNT(val) | ||
| 1290 | #define bfin_read_MDMA_S1_Y_COUNT() bfin_read_MDMA0_S1_Y_COUNT() | ||
| 1291 | #define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write_MDMA0_S1_Y_COUNT(val) | ||
| 1292 | #define bfin_read_MDMA_S1_START_ADDR() bfin_read_MDMA0_S1_START_ADDR() | ||
| 1293 | #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write_MDMA0_S1_START_ADDR(val) | ||
| 1294 | #define bfin_read_MDMA_D1_CONFIG() bfin_read_MDMA0_D1_CONFIG() | ||
| 1295 | #define bfin_write_MDMA_D1_CONFIG(val) bfin_write_MDMA0_D1_CONFIG(val) | ||
| 1296 | #define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read_MDMA0_D1_IRQ_STATUS() | ||
| 1297 | #define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write_MDMA0_D1_IRQ_STATUS(val) | ||
| 1298 | #define bfin_read_MDMA_D1_X_MODIFY() bfin_read_MDMA0_D1_X_MODIFY() | ||
| 1299 | #define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write_MDMA0_D1_X_MODIFY(val) | ||
| 1300 | #define bfin_read_MDMA_D1_Y_MODIFY() bfin_read_MDMA0_D1_Y_MODIFY() | ||
| 1301 | #define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write_MDMA0_D1_Y_MODIFY(val) | ||
| 1302 | #define bfin_read_MDMA_D1_X_COUNT() bfin_read_MDMA0_D1_X_COUNT() | ||
| 1303 | #define bfin_write_MDMA_D1_X_COUNT(val) bfin_write_MDMA0_D1_X_COUNT(val) | ||
| 1304 | #define bfin_read_MDMA_D1_Y_COUNT() bfin_read_MDMA0_D1_Y_COUNT() | ||
| 1305 | #define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write_MDMA0_D1_Y_COUNT(val) | ||
| 1306 | #define bfin_read_MDMA_D1_START_ADDR() bfin_read_MDMA0_D1_START_ADDR() | ||
| 1307 | #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write_MDMA0_D1_START_ADDR(val) | ||
| 1308 | |||
| 1250 | #define bfin_read_PPI_CONTROL() bfin_read16(PPI_CONTROL) | 1309 | #define bfin_read_PPI_CONTROL() bfin_read16(PPI_CONTROL) |
| 1251 | #define bfin_write_PPI_CONTROL(val) bfin_write16(PPI_CONTROL, val) | 1310 | #define bfin_write_PPI_CONTROL(val) bfin_write16(PPI_CONTROL, val) |
| 1252 | #define bfin_read_PPI_STATUS() bfin_read16(PPI_STATUS) | 1311 | #define bfin_read_PPI_STATUS() bfin_read16(PPI_STATUS) |
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h index 6adbfcc65a35..bdc330cd0e1c 100644 --- a/arch/blackfin/mach-bf538/include/mach/defBF539.h +++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h | |||
| @@ -412,6 +412,62 @@ | |||
| 412 | #define MDMA0_S1_CURR_X_COUNT 0xFFC00EF0 /* MemDMA0 Stream 1 Source Current X Count Register */ | 412 | #define MDMA0_S1_CURR_X_COUNT 0xFFC00EF0 /* MemDMA0 Stream 1 Source Current X Count Register */ |
| 413 | #define MDMA0_S1_CURR_Y_COUNT 0xFFC00EF8 /* MemDMA0 Stream 1 Source Current Y Count Register */ | 413 | #define MDMA0_S1_CURR_Y_COUNT 0xFFC00EF8 /* MemDMA0 Stream 1 Source Current Y Count Register */ |
| 414 | 414 | ||
| 415 | #define MDMA_D0_NEXT_DESC_PTR MDMA0_D0_NEXT_DESC_PTR | ||
| 416 | #define MDMA_D0_START_ADDR MDMA0_D0_START_ADDR | ||
| 417 | #define MDMA_D0_CONFIG MDMA0_D0_CONFIG | ||
| 418 | #define MDMA_D0_X_COUNT MDMA0_D0_X_COUNT | ||
| 419 | #define MDMA_D0_X_MODIFY MDMA0_D0_X_MODIFY | ||
| 420 | #define MDMA_D0_Y_COUNT MDMA0_D0_Y_COUNT | ||
| 421 | #define MDMA_D0_Y_MODIFY MDMA0_D0_Y_MODIFY | ||
| 422 | #define MDMA_D0_CURR_DESC_PTR MDMA0_D0_CURR_DESC_PTR | ||
| 423 | #define MDMA_D0_CURR_ADDR MDMA0_D0_CURR_ADDR | ||
| 424 | #define MDMA_D0_IRQ_STATUS MDMA0_D0_IRQ_STATUS | ||
| 425 | #define MDMA_D0_PERIPHERAL_MAP MDMA0_D0_PERIPHERAL_MAP | ||
| 426 | #define MDMA_D0_CURR_X_COUNT MDMA0_D0_CURR_X_COUNT | ||
| 427 | #define MDMA_D0_CURR_Y_COUNT MDMA0_D0_CURR_Y_COUNT | ||
| 428 | |||
| 429 | #define MDMA_S0_NEXT_DESC_PTR MDMA0_S0_NEXT_DESC_PTR | ||
| 430 | #define MDMA_S0_START_ADDR MDMA0_S0_START_ADDR | ||
| 431 | #define MDMA_S0_CONFIG MDMA0_S0_CONFIG | ||
| 432 | #define MDMA_S0_X_COUNT MDMA0_S0_X_COUNT | ||
| 433 | #define MDMA_S0_X_MODIFY MDMA0_S0_X_MODIFY | ||
| 434 | #define MDMA_S0_Y_COUNT MDMA0_S0_Y_COUNT | ||
| 435 | #define MDMA_S0_Y_MODIFY MDMA0_S0_Y_MODIFY | ||
| 436 | #define MDMA_S0_CURR_DESC_PTR MDMA0_S0_CURR_DESC_PTR | ||
| 437 | #define MDMA_S0_CURR_ADDR MDMA0_S0_CURR_ADDR | ||
| 438 | #define MDMA_S0_IRQ_STATUS MDMA0_S0_IRQ_STATUS | ||
| 439 | #define MDMA_S0_PERIPHERAL_MAP MDMA0_S0_PERIPHERAL_MAP | ||
| 440 | #define MDMA_S0_CURR_X_COUNT MDMA0_S0_CURR_X_COUNT | ||
| 441 | #define MDMA_S0_CURR_Y_COUNT MDMA0_S0_CURR_Y_COUNT | ||
| 442 | |||
| 443 | #define MDMA_D1_NEXT_DESC_PTR MDMA0_D1_NEXT_DESC_PTR | ||
| 444 | #define MDMA_D1_START_ADDR MDMA0_D1_START_ADDR | ||
| 445 | #define MDMA_D1_CONFIG MDMA0_D1_CONFIG | ||
| 446 | #define MDMA_D1_X_COUNT MDMA0_D1_X_COUNT | ||
| 447 | #define MDMA_D1_X_MODIFY MDMA0_D1_X_MODIFY | ||
| 448 | #define MDMA_D1_Y_COUNT MDMA0_D1_Y_COUNT | ||
| 449 | #define MDMA_D1_Y_MODIFY MDMA0_D1_Y_MODIFY | ||
| 450 | #define MDMA_D1_CURR_DESC_PTR MDMA0_D1_CURR_DESC_PTR | ||
| 451 | #define MDMA_D1_CURR_ADDR MDMA0_D1_CURR_ADDR | ||
| 452 | #define MDMA_D1_IRQ_STATUS MDMA0_D1_IRQ_STATUS | ||
| 453 | #define MDMA_D1_PERIPHERAL_MAP MDMA0_D1_PERIPHERAL_MAP | ||
| 454 | #define MDMA_D1_CURR_X_COUNT MDMA0_D1_CURR_X_COUNT | ||
| 455 | #define MDMA_D1_CURR_Y_COUNT MDMA0_D1_CURR_Y_COUNT | ||
| 456 | |||
| 457 | #define MDMA_S1_NEXT_DESC_PTR MDMA0_S1_NEXT_DESC_PTR | ||
| 458 | #define MDMA_S1_START_ADDR MDMA0_S1_START_ADDR | ||
| 459 | #define MDMA_S1_CONFIG MDMA0_S1_CONFIG | ||
| 460 | #define MDMA_S1_X_COUNT MDMA0_S1_X_COUNT | ||
| 461 | #define MDMA_S1_X_MODIFY MDMA0_S1_X_MODIFY | ||
| 462 | #define MDMA_S1_Y_COUNT MDMA0_S1_Y_COUNT | ||
| 463 | #define MDMA_S1_Y_MODIFY MDMA0_S1_Y_MODIFY | ||
| 464 | #define MDMA_S1_CURR_DESC_PTR MDMA0_S1_CURR_DESC_PTR | ||
| 465 | #define MDMA_S1_CURR_ADDR MDMA0_S1_CURR_ADDR | ||
| 466 | #define MDMA_S1_IRQ_STATUS MDMA0_S1_IRQ_STATUS | ||
| 467 | #define MDMA_S1_PERIPHERAL_MAP MDMA0_S1_PERIPHERAL_MAP | ||
| 468 | #define MDMA_S1_CURR_X_COUNT MDMA0_S1_CURR_X_COUNT | ||
| 469 | #define MDMA_S1_CURR_Y_COUNT MDMA0_S1_CURR_Y_COUNT | ||
| 470 | |||
| 415 | 471 | ||
| 416 | /* Parallel Peripheral Interface (PPI) (0xFFC01000 - 0xFFC010FF) */ | 472 | /* Parallel Peripheral Interface (PPI) (0xFFC01000 - 0xFFC010FF) */ |
| 417 | #define PPI_CONTROL 0xFFC01000 /* PPI Control Register */ | 473 | #define PPI_CONTROL 0xFFC01000 /* PPI Control Register */ |
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig index dcf657159051..a09623dfd550 100644 --- a/arch/blackfin/mach-bf548/Kconfig +++ b/arch/blackfin/mach-bf548/Kconfig | |||
| @@ -11,6 +11,13 @@ config DEB_DMA_URGENT | |||
| 11 | help | 11 | help |
| 12 | Treat any DEB1, DEB2 and DEB3 request as Urgent | 12 | Treat any DEB1, DEB2 and DEB3 request as Urgent |
| 13 | 13 | ||
| 14 | config BF548_ATAPI_ALTERNATIVE_PORT | ||
| 15 | bool "BF548 ATAPI alternative port via GPIO" | ||
| 16 | help | ||
| 17 | BF548 ATAPI data and address PINs can be routed through | ||
| 18 | async address or GPIO port F and G. Select y to route it | ||
| 19 | to GPIO. | ||
| 20 | |||
| 14 | comment "Interrupt Priority Assignment" | 21 | comment "Interrupt Priority Assignment" |
| 15 | menu "Priority" | 22 | menu "Priority" |
| 16 | 23 | ||
| @@ -250,6 +257,7 @@ config IRQ_OTPSEC | |||
| 250 | default 11 | 257 | default 11 |
| 251 | config IRQ_TIMER0 | 258 | config IRQ_TIMER0 |
| 252 | int "IRQ_TIMER0" | 259 | int "IRQ_TIMER0" |
| 260 | default 7 if TICKSOURCE_GPTMR0 | ||
| 253 | default 8 | 261 | default 8 |
| 254 | config IRQ_TIMER1 | 262 | config IRQ_TIMER1 |
| 255 | int "IRQ_TIMER1" | 263 | int "IRQ_TIMER1" |
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 096e661700a7..add5a17452ce 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
| @@ -208,6 +208,43 @@ static struct platform_device bfin_rotary_device = { | |||
| 208 | }; | 208 | }; |
| 209 | #endif | 209 | #endif |
| 210 | 210 | ||
| 211 | #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE) | ||
| 212 | #include <linux/input.h> | ||
| 213 | #include <linux/spi/adxl34x.h> | ||
| 214 | static const struct adxl34x_platform_data adxl34x_info = { | ||
| 215 | .x_axis_offset = 0, | ||
| 216 | .y_axis_offset = 0, | ||
| 217 | .z_axis_offset = 0, | ||
| 218 | .tap_threshold = 0x31, | ||
| 219 | .tap_duration = 0x10, | ||
| 220 | .tap_latency = 0x60, | ||
| 221 | .tap_window = 0xF0, | ||
| 222 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, | ||
| 223 | .act_axis_control = 0xFF, | ||
| 224 | .activity_threshold = 5, | ||
| 225 | .inactivity_threshold = 3, | ||
| 226 | .inactivity_time = 4, | ||
| 227 | .free_fall_threshold = 0x7, | ||
| 228 | .free_fall_time = 0x20, | ||
| 229 | .data_rate = 0x8, | ||
| 230 | .data_range = ADXL_FULL_RES, | ||
| 231 | |||
| 232 | .ev_type = EV_ABS, | ||
| 233 | .ev_code_x = ABS_X, /* EV_REL */ | ||
| 234 | .ev_code_y = ABS_Y, /* EV_REL */ | ||
| 235 | .ev_code_z = ABS_Z, /* EV_REL */ | ||
| 236 | |||
| 237 | .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */ | ||
| 238 | .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */ | ||
| 239 | .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */ | ||
| 240 | |||
| 241 | /* .ev_code_ff = KEY_F,*/ /* EV_KEY */ | ||
| 242 | /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */ | ||
| 243 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, | ||
| 244 | .fifo_mode = ADXL_FIFO_STREAM, | ||
| 245 | }; | ||
| 246 | #endif | ||
| 247 | |||
| 211 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | 248 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 212 | static struct platform_device rtc_device = { | 249 | static struct platform_device rtc_device = { |
| 213 | .name = "rtc-bfin", | 250 | .name = "rtc-bfin", |
| @@ -628,6 +665,14 @@ static struct bfin5xx_spi_chip spidev_chip_info = { | |||
| 628 | }; | 665 | }; |
| 629 | #endif | 666 | #endif |
| 630 | 667 | ||
| 668 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) | ||
| 669 | static struct bfin5xx_spi_chip spi_adxl34x_chip_info = { | ||
| 670 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
| 671 | .bits_per_word = 8, | ||
| 672 | .cs_change_per_word = 0, | ||
| 673 | }; | ||
| 674 | #endif | ||
| 675 | |||
| 631 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 676 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| 632 | #if defined(CONFIG_MTD_M25P80) \ | 677 | #if defined(CONFIG_MTD_M25P80) \ |
| 633 | || defined(CONFIG_MTD_M25P80_MODULE) | 678 | || defined(CONFIG_MTD_M25P80_MODULE) |
| @@ -653,15 +698,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 653 | }, | 698 | }, |
| 654 | #endif | 699 | #endif |
| 655 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 700 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
| 656 | { | 701 | { |
| 657 | .modalias = "ad7877", | 702 | .modalias = "ad7877", |
| 658 | .platform_data = &bfin_ad7877_ts_info, | 703 | .platform_data = &bfin_ad7877_ts_info, |
| 659 | .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */ | 704 | .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */ |
| 660 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 705 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
| 661 | .bus_num = 0, | 706 | .bus_num = 0, |
| 662 | .chip_select = 2, | 707 | .chip_select = 2, |
| 663 | .controller_data = &spi_ad7877_chip_info, | 708 | .controller_data = &spi_ad7877_chip_info, |
| 664 | }, | 709 | }, |
| 665 | #endif | 710 | #endif |
| 666 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | 711 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| 667 | { | 712 | { |
| @@ -672,8 +717,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 672 | .controller_data = &spidev_chip_info, | 717 | .controller_data = &spidev_chip_info, |
| 673 | }, | 718 | }, |
| 674 | #endif | 719 | #endif |
| 720 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) | ||
| 721 | { | ||
| 722 | .modalias = "adxl34x", | ||
| 723 | .platform_data = &adxl34x_info, | ||
| 724 | .irq = IRQ_PC5, | ||
| 725 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | ||
| 726 | .bus_num = 1, | ||
| 727 | .chip_select = 2, | ||
| 728 | .controller_data = &spi_adxl34x_chip_info, | ||
| 729 | .mode = SPI_MODE_3, | ||
| 730 | }, | ||
| 731 | #endif | ||
| 675 | }; | 732 | }; |
| 676 | |||
| 677 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 733 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 678 | /* SPI (0) */ | 734 | /* SPI (0) */ |
| 679 | static struct resource bfin_spi0_resource[] = { | 735 | static struct resource bfin_spi0_resource[] = { |
| @@ -786,7 +842,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info0[] = { | |||
| 786 | 842 | ||
| 787 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ | 843 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ |
| 788 | static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { | 844 | static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { |
| 789 | #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) | 845 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
| 790 | { | 846 | { |
| 791 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | 847 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 792 | }, | 848 | }, |
| @@ -797,6 +853,13 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { | |||
| 797 | .irq = 212, | 853 | .irq = 212, |
| 798 | }, | 854 | }, |
| 799 | #endif | 855 | #endif |
| 856 | #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE) | ||
| 857 | { | ||
| 858 | I2C_BOARD_INFO("adxl34x", 0x53), | ||
| 859 | .irq = IRQ_PC5, | ||
| 860 | .platform_data = (void *)&adxl34x_info, | ||
| 861 | }, | ||
| 862 | #endif | ||
| 800 | }; | 863 | }; |
| 801 | #endif | 864 | #endif |
| 802 | 865 | ||
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h index 882e40ccf0d1..c510ae688e28 100644 --- a/arch/blackfin/mach-bf548/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h | |||
| @@ -6,26 +6,31 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List | 10 | * - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #ifndef _MACH_ANOMALY_H_ | 13 | #ifndef _MACH_ANOMALY_H_ |
| 14 | #define _MACH_ANOMALY_H_ | 14 | #define _MACH_ANOMALY_H_ |
| 15 | 15 | ||
| 16 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ | 16 | /* We do not support 0.0 or 0.1 silicon - sorry */ |
| 17 | #if __SILICON_REVISION__ < 2 | ||
| 18 | # error will not work on BF548 silicon version 0.0, or 0.1 | ||
| 19 | #endif | ||
| 20 | |||
| 21 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ | ||
| 17 | #define ANOMALY_05000074 (1) | 22 | #define ANOMALY_05000074 (1) |
| 18 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ | 23 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ |
| 19 | #define ANOMALY_05000119 (1) | 24 | #define ANOMALY_05000119 (1) |
| 20 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ | 25 | /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ |
| 21 | #define ANOMALY_05000122 (1) | 26 | #define ANOMALY_05000122 (1) |
| 22 | /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ | 27 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 23 | #define ANOMALY_05000245 (1) | 28 | #define ANOMALY_05000245 (1) |
| 24 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ | 29 | /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ |
| 25 | #define ANOMALY_05000265 (1) | 30 | #define ANOMALY_05000265 (1) |
| 26 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ | 31 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ |
| 27 | #define ANOMALY_05000272 (1) | 32 | #define ANOMALY_05000272 (1) |
| 28 | /* False Hardware Error Exception when ISR context is not restored */ | 33 | /* False Hardware Error Exception When ISR Context Is Not Restored */ |
| 29 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 1) | 34 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 1) |
| 30 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ | 35 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ |
| 31 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 1) | 36 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 1) |
| @@ -59,7 +64,7 @@ | |||
| 59 | #define ANOMALY_05000340 (__SILICON_REVISION__ < 1) | 64 | #define ANOMALY_05000340 (__SILICON_REVISION__ < 1) |
| 60 | /* Boot Host Wait (HWAIT) and Boot Host Wait Alternate (HWAITA) Signals Are Swapped */ | 65 | /* Boot Host Wait (HWAIT) and Boot Host Wait Alternate (HWAITA) Signals Are Swapped */ |
| 61 | #define ANOMALY_05000344 (__SILICON_REVISION__ < 1) | 66 | #define ANOMALY_05000344 (__SILICON_REVISION__ < 1) |
| 62 | /* USB Calibration Value Is Not Intialized */ | 67 | /* USB Calibration Value Is Not Initialized */ |
| 63 | #define ANOMALY_05000346 (__SILICON_REVISION__ < 1) | 68 | #define ANOMALY_05000346 (__SILICON_REVISION__ < 1) |
| 64 | /* USB Calibration Value to use */ | 69 | /* USB Calibration Value to use */ |
| 65 | #define ANOMALY_05000346_value 0x5411 | 70 | #define ANOMALY_05000346_value 0x5411 |
| @@ -147,11 +152,11 @@ | |||
| 147 | #define ANOMALY_05000416 (1) | 152 | #define ANOMALY_05000416 (1) |
| 148 | /* Multichannel SPORT Channel Misalignment Under Specific Configuration */ | 153 | /* Multichannel SPORT Channel Misalignment Under Specific Configuration */ |
| 149 | #define ANOMALY_05000425 (1) | 154 | #define ANOMALY_05000425 (1) |
| 150 | /* Speculative Fetches of Indirect-Pointer Instructions Can Cause Spurious Hardware Errors */ | 155 | /* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */ |
| 151 | #define ANOMALY_05000426 (1) | 156 | #define ANOMALY_05000426 (1) |
| 152 | /* CORE_EPPI_PRIO bit and SYS_EPPI_PRIO bit in the HMDMA1_CONTROL register are not functional */ | 157 | /* CORE_EPPI_PRIO bit and SYS_EPPI_PRIO bit in the HMDMA1_CONTROL register are not functional */ |
| 153 | #define ANOMALY_05000427 (__SILICON_REVISION__ < 2) | 158 | #define ANOMALY_05000427 (__SILICON_REVISION__ < 2) |
| 154 | /* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Behaves as a Buffer Status Bit Instead of an IRQ Status Bit */ | 159 | /* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Reflects Buffer Status Instead of IRQ Status */ |
| 155 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) | 160 | #define ANOMALY_05000429 (__SILICON_REVISION__ < 2) |
| 156 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ | 161 | /* Software System Reset Corrupts PLL_LOCKCNT Register */ |
| 157 | #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) | 162 | #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2) |
| @@ -170,26 +175,49 @@ | |||
| 170 | /* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */ | 175 | /* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */ |
| 171 | #define ANOMALY_05000449 (__SILICON_REVISION__ == 1) | 176 | #define ANOMALY_05000449 (__SILICON_REVISION__ == 1) |
| 172 | /* USB DMA Mode 1 Short Packet Data Corruption */ | 177 | /* USB DMA Mode 1 Short Packet Data Corruption */ |
| 173 | #define ANOMALY_05000450 (1 | 178 | #define ANOMALY_05000450 (1) |
| 179 | /* USB Receive Interrupt Is Not Generated in DMA Mode 1 */ | ||
| 180 | #define ANOMALY_05000456 (__SILICON_REVISION__ < 3) | ||
| 181 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 182 | #define ANOMALY_05000461 (1) | ||
| 174 | 183 | ||
| 175 | /* Anomalies that don't exist on this proc */ | 184 | /* Anomalies that don't exist on this proc */ |
| 185 | #define ANOMALY_05000099 (0) | ||
| 186 | #define ANOMALY_05000120 (0) | ||
| 176 | #define ANOMALY_05000125 (0) | 187 | #define ANOMALY_05000125 (0) |
| 188 | #define ANOMALY_05000149 (0) | ||
| 177 | #define ANOMALY_05000158 (0) | 189 | #define ANOMALY_05000158 (0) |
| 190 | #define ANOMALY_05000171 (0) | ||
| 191 | #define ANOMALY_05000179 (0) | ||
| 178 | #define ANOMALY_05000183 (0) | 192 | #define ANOMALY_05000183 (0) |
| 179 | #define ANOMALY_05000198 (0) | 193 | #define ANOMALY_05000198 (0) |
| 194 | #define ANOMALY_05000215 (0) | ||
| 195 | #define ANOMALY_05000220 (0) | ||
| 196 | #define ANOMALY_05000227 (0) | ||
| 180 | #define ANOMALY_05000230 (0) | 197 | #define ANOMALY_05000230 (0) |
| 198 | #define ANOMALY_05000231 (0) | ||
| 199 | #define ANOMALY_05000233 (0) | ||
| 200 | #define ANOMALY_05000242 (0) | ||
| 181 | #define ANOMALY_05000244 (0) | 201 | #define ANOMALY_05000244 (0) |
| 202 | #define ANOMALY_05000248 (0) | ||
| 203 | #define ANOMALY_05000250 (0) | ||
| 204 | #define ANOMALY_05000254 (0) | ||
| 182 | #define ANOMALY_05000261 (0) | 205 | #define ANOMALY_05000261 (0) |
| 183 | #define ANOMALY_05000263 (0) | 206 | #define ANOMALY_05000263 (0) |
| 184 | #define ANOMALY_05000266 (0) | 207 | #define ANOMALY_05000266 (0) |
| 185 | #define ANOMALY_05000273 (0) | 208 | #define ANOMALY_05000273 (0) |
| 209 | #define ANOMALY_05000274 (0) | ||
| 186 | #define ANOMALY_05000278 (0) | 210 | #define ANOMALY_05000278 (0) |
| 211 | #define ANOMALY_05000287 (0) | ||
| 212 | #define ANOMALY_05000301 (0) | ||
| 187 | #define ANOMALY_05000305 (0) | 213 | #define ANOMALY_05000305 (0) |
| 188 | #define ANOMALY_05000307 (0) | 214 | #define ANOMALY_05000307 (0) |
| 189 | #define ANOMALY_05000311 (0) | 215 | #define ANOMALY_05000311 (0) |
| 190 | #define ANOMALY_05000323 (0) | 216 | #define ANOMALY_05000323 (0) |
| 217 | #define ANOMALY_05000362 (1) | ||
| 191 | #define ANOMALY_05000363 (0) | 218 | #define ANOMALY_05000363 (0) |
| 192 | #define ANOMALY_05000380 (0) | 219 | #define ANOMALY_05000380 (0) |
| 220 | #define ANOMALY_05000400 (0) | ||
| 193 | #define ANOMALY_05000412 (0) | 221 | #define ANOMALY_05000412 (0) |
| 194 | #define ANOMALY_05000432 (0) | 222 | #define ANOMALY_05000432 (0) |
| 195 | #define ANOMALY_05000435 (0) | 223 | #define ANOMALY_05000435 (0) |
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h b/arch/blackfin/mach-bf548/include/mach/portmux.h index ffb1d0a44b4d..ce372ba0f046 100644 --- a/arch/blackfin/mach-bf548/include/mach/portmux.h +++ b/arch/blackfin/mach-bf548/include/mach/portmux.h | |||
| @@ -167,22 +167,42 @@ | |||
| 167 | #define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0)) | 167 | #define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0)) |
| 168 | #define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0)) | 168 | #define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0)) |
| 169 | #define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0)) | 169 | #define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0)) |
| 170 | #define P_ATAPI_D0A (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1)) | 170 | |
| 171 | #define P_ATAPI_D1A (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1)) | 171 | #ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT |
| 172 | #define P_ATAPI_D2A (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1)) | 172 | # define P_ATAPI_D0A (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1)) |
| 173 | #define P_ATAPI_D3A (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1)) | 173 | # define P_ATAPI_D1A (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1)) |
| 174 | #define P_ATAPI_D4A (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1)) | 174 | # define P_ATAPI_D2A (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1)) |
| 175 | #define P_ATAPI_D5A (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1)) | 175 | # define P_ATAPI_D3A (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1)) |
| 176 | #define P_ATAPI_D6A (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1)) | 176 | # define P_ATAPI_D4A (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1)) |
| 177 | #define P_ATAPI_D7A (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1)) | 177 | # define P_ATAPI_D5A (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1)) |
| 178 | #define P_ATAPI_D8A (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1)) | 178 | # define P_ATAPI_D6A (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1)) |
| 179 | #define P_ATAPI_D9A (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) | 179 | # define P_ATAPI_D7A (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1)) |
| 180 | #define P_ATAPI_D10A (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1)) | 180 | # define P_ATAPI_D8A (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1)) |
| 181 | #define P_ATAPI_D11A (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1)) | 181 | # define P_ATAPI_D9A (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) |
| 182 | #define P_ATAPI_D12A (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1)) | 182 | # define P_ATAPI_D10A (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1)) |
| 183 | #define P_ATAPI_D13A (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1)) | 183 | # define P_ATAPI_D11A (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1)) |
| 184 | #define P_ATAPI_D14A (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) | 184 | # define P_ATAPI_D12A (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1)) |
| 185 | #define P_ATAPI_D15A (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) | 185 | # define P_ATAPI_D13A (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1)) |
| 186 | # define P_ATAPI_D14A (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) | ||
| 187 | # define P_ATAPI_D15A (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) | ||
| 188 | #else | ||
| 189 | # define P_ATAPI_D0A (P_DONTCARE) | ||
| 190 | # define P_ATAPI_D1A (P_DONTCARE) | ||
| 191 | # define P_ATAPI_D2A (P_DONTCARE) | ||
| 192 | # define P_ATAPI_D3A (P_DONTCARE) | ||
| 193 | # define P_ATAPI_D4A (P_DONTCARE) | ||
| 194 | # define P_ATAPI_D5A (P_DONTCARE) | ||
| 195 | # define P_ATAPI_D6A (P_DONTCARE) | ||
| 196 | # define P_ATAPI_D7A (P_DONTCARE) | ||
| 197 | # define P_ATAPI_D8A (P_DONTCARE) | ||
| 198 | # define P_ATAPI_D9A (P_DONTCARE) | ||
| 199 | # define P_ATAPI_D10A (P_DONTCARE) | ||
| 200 | # define P_ATAPI_D11A (P_DONTCARE) | ||
| 201 | # define P_ATAPI_D12A (P_DONTCARE) | ||
| 202 | # define P_ATAPI_D13A (P_DONTCARE) | ||
| 203 | # define P_ATAPI_D14A (P_DONTCARE) | ||
| 204 | # define P_ATAPI_D15A (P_DONTCARE) | ||
| 205 | #endif | ||
| 186 | 206 | ||
| 187 | #define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) | 207 | #define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) |
| 188 | #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) | 208 | #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) |
| @@ -200,9 +220,15 @@ | |||
| 200 | #define P_CAN0_RX (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0)) | 220 | #define P_CAN0_RX (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0)) |
| 201 | #define P_CAN1_TX (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0)) | 221 | #define P_CAN1_TX (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0)) |
| 202 | #define P_CAN1_RX (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0)) | 222 | #define P_CAN1_RX (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0)) |
| 203 | #define P_ATAPI_A0A (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1)) | 223 | #ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT |
| 204 | #define P_ATAPI_A1A (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1)) | 224 | # define P_ATAPI_A0A (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1)) |
| 205 | #define P_ATAPI_A2A (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1)) | 225 | # define P_ATAPI_A1A (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1)) |
| 226 | # define P_ATAPI_A2A (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1)) | ||
| 227 | #else | ||
| 228 | # define P_ATAPI_A0A (P_DONTCARE) | ||
| 229 | # define P_ATAPI_A1A (P_DONTCARE) | ||
| 230 | # define P_ATAPI_A2A (P_DONTCARE) | ||
| 231 | #endif | ||
| 206 | #define P_HOST_CE (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1)) | 232 | #define P_HOST_CE (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1)) |
| 207 | #define P_HOST_RD (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1)) | 233 | #define P_HOST_RD (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1)) |
| 208 | #define P_HOST_WR (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1)) | 234 | #define P_HOST_WR (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1)) |
diff --git a/arch/blackfin/mach-bf561/Kconfig b/arch/blackfin/mach-bf561/Kconfig index 638ec38ca470..cb9743641511 100644 --- a/arch/blackfin/mach-bf561/Kconfig +++ b/arch/blackfin/mach-bf561/Kconfig | |||
| @@ -9,22 +9,9 @@ if (!SMP) | |||
| 9 | comment "Core B Support" | 9 | comment "Core B Support" |
| 10 | 10 | ||
| 11 | config BF561_COREB | 11 | config BF561_COREB |
| 12 | bool "Enable Core B support" | 12 | bool "Enable Core B loader" |
| 13 | default y | 13 | default y |
| 14 | 14 | ||
| 15 | config BF561_COREB_RESET | ||
| 16 | bool "Enable Core B reset support" | ||
| 17 | default n | ||
| 18 | help | ||
| 19 | This requires code in the application that is loaded | ||
| 20 | into Core B. In order to reset, the application needs | ||
| 21 | to install an interrupt handler for Supplemental | ||
| 22 | Interrupt 0, that sets RETI to 0xff600000 and writes | ||
| 23 | bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0. | ||
| 24 | This causes Core B to stall when Supplemental Interrupt | ||
| 25 | 0 is set, and will reset PC to 0xff600000 when | ||
| 26 | COREB_SRAM_INIT is cleared. | ||
| 27 | |||
| 28 | endif | 15 | endif |
| 29 | 16 | ||
| 30 | comment "Interrupt Priority Assignment" | 17 | comment "Interrupt Priority Assignment" |
| @@ -138,6 +125,7 @@ config IRQ_DMA2_11 | |||
| 138 | default 9 | 125 | default 9 |
| 139 | config IRQ_TIMER0 | 126 | config IRQ_TIMER0 |
| 140 | int "TIMER 0 Interrupt" | 127 | int "TIMER 0 Interrupt" |
| 128 | default 7 if TICKSOURCE_GPTMR0 | ||
| 141 | default 8 | 129 | default 8 |
| 142 | config IRQ_TIMER1 | 130 | config IRQ_TIMER1 |
| 143 | int "TIMER 1 Interrupt" | 131 | int "TIMER 1 Interrupt" |
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index f623c6b0719f..0dd9685e5d53 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c | |||
| @@ -83,7 +83,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
| 83 | }; | 83 | }; |
| 84 | #endif | 84 | #endif |
| 85 | 85 | ||
| 86 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 86 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 87 | /* SPI ADC chip */ | 87 | /* SPI ADC chip */ |
| 88 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | 88 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 89 | .enable_dma = 1, /* use dma transfer with this chip*/ | 89 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| @@ -126,7 +126,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
| 126 | }, | 126 | }, |
| 127 | #endif | 127 | #endif |
| 128 | 128 | ||
| 129 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | 129 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
| 130 | { | 130 | { |
| 131 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | 131 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 132 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | 132 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
diff --git a/arch/blackfin/mach-bf561/coreb.c b/arch/blackfin/mach-bf561/coreb.c index 8598098c0840..93635a766f9c 100644 --- a/arch/blackfin/mach-bf561/coreb.c +++ b/arch/blackfin/mach-bf561/coreb.c | |||
| @@ -1,406 +1,74 @@ | |||
| 1 | /* | 1 | /* Load firmware into Core B on a BF561 |
| 2 | * File: arch/blackfin/mach-bf561/coreb.c | ||
| 3 | * Based on: | ||
| 4 | * Author: | ||
| 5 | * | 2 | * |
| 6 | * Created: | 3 | * Copyright 2004-2009 Analog Devices Inc. |
| 7 | * Description: Handle CoreB on a BF561 | 4 | * Licensed under the GPL-2 or later. |
| 8 | * | 5 | */ |
| 9 | * Modified: | 6 | |
| 10 | * Copyright 2004-2006 Analog Devices Inc. | 7 | /* The Core B reset func requires code in the application that is loaded into |
| 11 | * | 8 | * Core B. In order to reset, the application needs to install an interrupt |
| 12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 9 | * handler for Supplemental Interrupt 0, that sets RETI to 0xff600000 and |
| 13 | * | 10 | * writes bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0. This causes Core |
| 14 | * This program is free software; you can redistribute it and/or modify | 11 | * B to stall when Supplemental Interrupt 0 is set, and will reset PC to |
| 15 | * it under the terms of the GNU General Public License as published by | 12 | * 0xff600000 when COREB_SRAM_INIT is cleared. |
| 16 | * the Free Software Foundation; either version 2 of the License, or | ||
| 17 | * (at your option) any later version. | ||
| 18 | * | ||
| 19 | * This program is distributed in the hope that it will be useful, | ||
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 22 | * GNU General Public License for more details. | ||
| 23 | * | ||
| 24 | * You should have received a copy of the GNU General Public License | ||
| 25 | * along with this program; if not, see the file COPYING, or write | ||
| 26 | * to the Free Software Foundation, Inc., | ||
| 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 28 | */ | 13 | */ |
| 29 | 14 | ||
| 30 | #include <linux/mm.h> | ||
| 31 | #include <linux/miscdevice.h> | ||
| 32 | #include <linux/device.h> | 15 | #include <linux/device.h> |
| 33 | #include <linux/ioport.h> | ||
| 34 | #include <linux/module.h> | ||
| 35 | #include <linux/uaccess.h> | ||
| 36 | #include <linux/fs.h> | 16 | #include <linux/fs.h> |
| 37 | #include <asm/dma.h> | 17 | #include <linux/kernel.h> |
| 38 | #include <asm/cacheflush.h> | 18 | #include <linux/miscdevice.h> |
| 39 | 19 | #include <linux/module.h> | |
| 40 | #define MODULE_VER "v0.1" | ||
| 41 | |||
| 42 | static spinlock_t coreb_lock; | ||
| 43 | static wait_queue_head_t coreb_dma_wait; | ||
| 44 | |||
| 45 | #define COREB_IS_OPEN 0x00000001 | ||
| 46 | #define COREB_IS_RUNNING 0x00000010 | ||
| 47 | 20 | ||
| 48 | #define CMD_COREB_INDEX 1 | ||
| 49 | #define CMD_COREB_START 2 | 21 | #define CMD_COREB_START 2 |
| 50 | #define CMD_COREB_STOP 3 | 22 | #define CMD_COREB_STOP 3 |
| 51 | #define CMD_COREB_RESET 4 | 23 | #define CMD_COREB_RESET 4 |
| 52 | 24 | ||
| 53 | #define COREB_MINOR 229 | 25 | static int |
| 54 | 26 | coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
| 55 | static unsigned long coreb_status = 0; | ||
| 56 | static unsigned long coreb_base = 0xff600000; | ||
| 57 | static unsigned long coreb_size = 0x4000; | ||
| 58 | int coreb_dma_done; | ||
| 59 | |||
| 60 | static loff_t coreb_lseek(struct file *file, loff_t offset, int origin); | ||
| 61 | static ssize_t coreb_read(struct file *file, char *buf, size_t count, | ||
| 62 | loff_t * ppos); | ||
| 63 | static ssize_t coreb_write(struct file *file, const char *buf, size_t count, | ||
| 64 | loff_t * ppos); | ||
| 65 | static int coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | ||
| 66 | unsigned long arg); | ||
| 67 | static int coreb_open(struct inode *inode, struct file *file); | ||
| 68 | static int coreb_release(struct inode *inode, struct file *file); | ||
| 69 | |||
| 70 | static irqreturn_t coreb_dma_interrupt(int irq, void *dev_id) | ||
| 71 | { | ||
| 72 | clear_dma_irqstat(CH_MEM_STREAM2_DEST); | ||
| 73 | coreb_dma_done = 1; | ||
| 74 | wake_up_interruptible(&coreb_dma_wait); | ||
| 75 | return IRQ_HANDLED; | ||
| 76 | } | ||
| 77 | |||
| 78 | static ssize_t coreb_write(struct file *file, const char *buf, size_t count, | ||
| 79 | loff_t * ppos) | ||
| 80 | { | ||
| 81 | unsigned long p = *ppos; | ||
| 82 | ssize_t wrote = 0; | ||
| 83 | |||
| 84 | if (p + count > coreb_size) | ||
| 85 | return -EFAULT; | ||
| 86 | |||
| 87 | while (count > 0) { | ||
| 88 | int len = count; | ||
| 89 | |||
| 90 | if (len > PAGE_SIZE) | ||
| 91 | len = PAGE_SIZE; | ||
| 92 | |||
| 93 | coreb_dma_done = 0; | ||
| 94 | |||
| 95 | flush_dcache_range((unsigned long)buf, (unsigned long)(buf+len)); | ||
| 96 | /* Source Channel */ | ||
| 97 | set_dma_start_addr(CH_MEM_STREAM2_SRC, (unsigned long)buf); | ||
| 98 | set_dma_x_count(CH_MEM_STREAM2_SRC, len); | ||
| 99 | set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char)); | ||
| 100 | set_dma_config(CH_MEM_STREAM2_SRC, 0); | ||
| 101 | /* Destination Channel */ | ||
| 102 | set_dma_start_addr(CH_MEM_STREAM2_DEST, coreb_base + p); | ||
| 103 | set_dma_x_count(CH_MEM_STREAM2_DEST, len); | ||
| 104 | set_dma_x_modify(CH_MEM_STREAM2_DEST, sizeof(char)); | ||
| 105 | set_dma_config(CH_MEM_STREAM2_DEST, WNR | RESTART | DI_EN); | ||
| 106 | |||
| 107 | enable_dma(CH_MEM_STREAM2_SRC); | ||
| 108 | enable_dma(CH_MEM_STREAM2_DEST); | ||
| 109 | |||
| 110 | wait_event_interruptible(coreb_dma_wait, coreb_dma_done); | ||
| 111 | |||
| 112 | disable_dma(CH_MEM_STREAM2_SRC); | ||
| 113 | disable_dma(CH_MEM_STREAM2_DEST); | ||
| 114 | |||
| 115 | count -= len; | ||
| 116 | wrote += len; | ||
| 117 | buf += len; | ||
| 118 | p += len; | ||
| 119 | } | ||
| 120 | *ppos = p; | ||
| 121 | return wrote; | ||
| 122 | } | ||
| 123 | |||
| 124 | static ssize_t coreb_read(struct file *file, char *buf, size_t count, | ||
| 125 | loff_t * ppos) | ||
| 126 | { | ||
| 127 | unsigned long p = *ppos; | ||
| 128 | ssize_t read = 0; | ||
| 129 | |||
| 130 | if ((p + count) > coreb_size) | ||
| 131 | return -EFAULT; | ||
| 132 | |||
| 133 | while (count > 0) { | ||
| 134 | int len = count; | ||
| 135 | |||
| 136 | if (len > PAGE_SIZE) | ||
| 137 | len = PAGE_SIZE; | ||
| 138 | |||
| 139 | coreb_dma_done = 0; | ||
| 140 | |||
| 141 | invalidate_dcache_range((unsigned long)buf, (unsigned long)(buf+len)); | ||
| 142 | /* Source Channel */ | ||
| 143 | set_dma_start_addr(CH_MEM_STREAM2_SRC, coreb_base + p); | ||
| 144 | set_dma_x_count(CH_MEM_STREAM2_SRC, len); | ||
| 145 | set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char)); | ||
| 146 | set_dma_config(CH_MEM_STREAM2_SRC, 0); | ||
| 147 | /* Destination Channel */ | ||
| 148 | set_dma_start_addr(CH_MEM_STREAM2_DEST, (unsigned long)buf); | ||
| 149 | set_dma_x_count(CH_MEM_STREAM2_DEST, len); | ||
| 150 | set_dma_x_modify(CH_MEM_STREAM2_DEST, sizeof(char)); | ||
| 151 | set_dma_config(CH_MEM_STREAM2_DEST, WNR | RESTART | DI_EN); | ||
| 152 | |||
| 153 | enable_dma(CH_MEM_STREAM2_SRC); | ||
| 154 | enable_dma(CH_MEM_STREAM2_DEST); | ||
| 155 | |||
| 156 | wait_event_interruptible(coreb_dma_wait, coreb_dma_done); | ||
| 157 | |||
| 158 | disable_dma(CH_MEM_STREAM2_SRC); | ||
| 159 | disable_dma(CH_MEM_STREAM2_DEST); | ||
| 160 | |||
| 161 | count -= len; | ||
| 162 | read += len; | ||
| 163 | buf += len; | ||
| 164 | p += len; | ||
| 165 | } | ||
| 166 | |||
| 167 | return read; | ||
| 168 | } | ||
| 169 | |||
| 170 | static loff_t coreb_lseek(struct file *file, loff_t offset, int origin) | ||
| 171 | { | 27 | { |
| 172 | loff_t ret; | 28 | int ret = 0; |
| 173 | |||
| 174 | mutex_lock(&file->f_dentry->d_inode->i_mutex); | ||
| 175 | |||
| 176 | switch (origin) { | ||
| 177 | case 0 /* SEEK_SET */ : | ||
| 178 | if (offset < coreb_size) { | ||
| 179 | file->f_pos = offset; | ||
| 180 | ret = file->f_pos; | ||
| 181 | } else | ||
| 182 | ret = -EINVAL; | ||
| 183 | break; | ||
| 184 | case 1 /* SEEK_CUR */ : | ||
| 185 | if ((offset + file->f_pos) < coreb_size) { | ||
| 186 | file->f_pos += offset; | ||
| 187 | ret = file->f_pos; | ||
| 188 | } else | ||
| 189 | ret = -EINVAL; | ||
| 190 | default: | ||
| 191 | ret = -EINVAL; | ||
| 192 | } | ||
| 193 | mutex_unlock(&file->f_dentry->d_inode->i_mutex); | ||
| 194 | return ret; | ||
| 195 | } | ||
| 196 | |||
| 197 | /* No BKL needed here */ | ||
| 198 | static int coreb_open(struct inode *inode, struct file *file) | ||
| 199 | { | ||
| 200 | spin_lock_irq(&coreb_lock); | ||
| 201 | |||
| 202 | if (coreb_status & COREB_IS_OPEN) | ||
| 203 | goto out_busy; | ||
| 204 | |||
| 205 | coreb_status |= COREB_IS_OPEN; | ||
| 206 | |||
| 207 | spin_unlock_irq(&coreb_lock); | ||
| 208 | return 0; | ||
| 209 | |||
| 210 | out_busy: | ||
| 211 | spin_unlock_irq(&coreb_lock); | ||
| 212 | return -EBUSY; | ||
| 213 | } | ||
| 214 | |||
| 215 | static int coreb_release(struct inode *inode, struct file *file) | ||
| 216 | { | ||
| 217 | spin_lock_irq(&coreb_lock); | ||
| 218 | coreb_status &= ~COREB_IS_OPEN; | ||
| 219 | spin_unlock_irq(&coreb_lock); | ||
| 220 | return 0; | ||
| 221 | } | ||
| 222 | |||
| 223 | static int coreb_ioctl(struct inode *inode, struct file *file, | ||
| 224 | unsigned int cmd, unsigned long arg) | ||
| 225 | { | ||
| 226 | int retval = 0; | ||
| 227 | int coreb_index = 0; | ||
| 228 | 29 | ||
| 229 | switch (cmd) { | 30 | switch (cmd) { |
| 230 | case CMD_COREB_INDEX: | ||
| 231 | if (copy_from_user(&coreb_index, (int *)arg, sizeof(int))) { | ||
| 232 | retval = -EFAULT; | ||
| 233 | break; | ||
| 234 | } | ||
| 235 | |||
| 236 | spin_lock_irq(&coreb_lock); | ||
| 237 | switch (coreb_index) { | ||
| 238 | case 0: | ||
| 239 | coreb_base = 0xff600000; | ||
| 240 | coreb_size = 0x4000; | ||
| 241 | break; | ||
| 242 | case 1: | ||
| 243 | coreb_base = 0xff610000; | ||
| 244 | coreb_size = 0x4000; | ||
| 245 | break; | ||
| 246 | case 2: | ||
| 247 | coreb_base = 0xff500000; | ||
| 248 | coreb_size = 0x8000; | ||
| 249 | break; | ||
| 250 | case 3: | ||
| 251 | coreb_base = 0xff400000; | ||
| 252 | coreb_size = 0x8000; | ||
| 253 | break; | ||
| 254 | default: | ||
| 255 | retval = -EINVAL; | ||
| 256 | break; | ||
| 257 | } | ||
| 258 | spin_unlock_irq(&coreb_lock); | ||
| 259 | |||
| 260 | mutex_lock(&file->f_dentry->d_inode->i_mutex); | ||
| 261 | file->f_pos = 0; | ||
| 262 | mutex_unlock(&file->f_dentry->d_inode->i_mutex); | ||
| 263 | break; | ||
| 264 | case CMD_COREB_START: | 31 | case CMD_COREB_START: |
| 265 | spin_lock_irq(&coreb_lock); | ||
| 266 | if (coreb_status & COREB_IS_RUNNING) { | ||
| 267 | retval = -EBUSY; | ||
| 268 | break; | ||
| 269 | } | ||
| 270 | printk(KERN_INFO "Starting Core B\n"); | ||
| 271 | coreb_status |= COREB_IS_RUNNING; | ||
| 272 | bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~0x0020); | 32 | bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~0x0020); |
| 273 | SSYNC(); | ||
| 274 | spin_unlock_irq(&coreb_lock); | ||
| 275 | break; | 33 | break; |
| 276 | #if defined(CONFIG_BF561_COREB_RESET) | ||
| 277 | case CMD_COREB_STOP: | 34 | case CMD_COREB_STOP: |
| 278 | spin_lock_irq(&coreb_lock); | ||
| 279 | printk(KERN_INFO "Stopping Core B\n"); | ||
| 280 | bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() | 0x0020); | 35 | bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() | 0x0020); |
| 281 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); | 36 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); |
| 282 | coreb_status &= ~COREB_IS_RUNNING; | ||
| 283 | spin_unlock_irq(&coreb_lock); | ||
| 284 | break; | 37 | break; |
| 285 | case CMD_COREB_RESET: | 38 | case CMD_COREB_RESET: |
| 286 | printk(KERN_INFO "Resetting Core B\n"); | ||
| 287 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); | 39 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); |
| 288 | break; | 40 | break; |
| 289 | #endif | 41 | default: |
| 42 | ret = -EINVAL; | ||
| 43 | break; | ||
| 290 | } | 44 | } |
| 291 | 45 | ||
| 292 | return retval; | 46 | CSYNC(); |
| 47 | |||
| 48 | return ret; | ||
| 293 | } | 49 | } |
| 294 | 50 | ||
| 295 | static struct file_operations coreb_fops = { | 51 | static struct file_operations coreb_fops = { |
| 296 | .owner = THIS_MODULE, | 52 | .owner = THIS_MODULE, |
| 297 | .llseek = coreb_lseek, | 53 | .ioctl = coreb_ioctl, |
| 298 | .read = coreb_read, | ||
| 299 | .write = coreb_write, | ||
| 300 | .ioctl = coreb_ioctl, | ||
| 301 | .open = coreb_open, | ||
| 302 | .release = coreb_release | ||
| 303 | }; | 54 | }; |
| 304 | 55 | ||
| 305 | static struct miscdevice coreb_dev = { | 56 | static struct miscdevice coreb_dev = { |
| 306 | COREB_MINOR, | 57 | .minor = MISC_DYNAMIC_MINOR, |
| 307 | "coreb", | 58 | .name = "coreb", |
| 308 | &coreb_fops | 59 | .fops = &coreb_fops, |
| 309 | }; | 60 | }; |
| 310 | 61 | ||
| 311 | static ssize_t coreb_show_status(struct device *dev, struct device_attribute *attr, char *buf) | 62 | static int __init bf561_coreb_init(void) |
| 312 | { | 63 | { |
| 313 | return sprintf(buf, | 64 | return misc_register(&coreb_dev); |
| 314 | "Base Address:\t0x%08lx\n" | ||
| 315 | "Core B is %s\n" | ||
| 316 | "SICA_SYSCR:\t%04x\n" | ||
| 317 | "SICB_SYSCR:\t%04x\n" | ||
| 318 | "\n" | ||
| 319 | "IRQ Status:\tCore A\t\tCore B\n" | ||
| 320 | "ISR0:\t\t%08x\t\t%08x\n" | ||
| 321 | "ISR1:\t\t%08x\t\t%08x\n" | ||
| 322 | "IMASK0:\t\t%08x\t\t%08x\n" | ||
| 323 | "IMASK1:\t\t%08x\t\t%08x\n", | ||
| 324 | coreb_base, | ||
| 325 | coreb_status & COREB_IS_RUNNING ? "running" : "stalled", | ||
| 326 | bfin_read_SICA_SYSCR(), bfin_read_SICB_SYSCR(), | ||
| 327 | bfin_read_SICA_ISR0(), bfin_read_SICB_ISR0(), | ||
| 328 | bfin_read_SICA_ISR1(), bfin_read_SICB_ISR0(), | ||
| 329 | bfin_read_SICA_IMASK0(), bfin_read_SICB_IMASK0(), | ||
| 330 | bfin_read_SICA_IMASK1(), bfin_read_SICB_IMASK1()); | ||
| 331 | } | ||
| 332 | |||
| 333 | static DEVICE_ATTR(coreb_status, S_IRUGO, coreb_show_status, NULL); | ||
| 334 | |||
| 335 | int __init bf561_coreb_init(void) | ||
| 336 | { | ||
| 337 | init_waitqueue_head(&coreb_dma_wait); | ||
| 338 | |||
| 339 | spin_lock_init(&coreb_lock); | ||
| 340 | /* Request the core memory regions for Core B */ | ||
| 341 | if (request_mem_region(0xff600000, 0x4000, | ||
| 342 | "Core B - Instruction SRAM") == NULL) | ||
| 343 | goto exit; | ||
| 344 | |||
| 345 | if (request_mem_region(0xFF610000, 0x4000, | ||
| 346 | "Core B - Instruction SRAM") == NULL) | ||
| 347 | goto release_instruction_a_sram; | ||
| 348 | |||
| 349 | if (request_mem_region(0xFF500000, 0x8000, | ||
| 350 | "Core B - Data Bank B SRAM") == NULL) | ||
| 351 | goto release_instruction_b_sram; | ||
| 352 | |||
| 353 | if (request_mem_region(0xff400000, 0x8000, | ||
| 354 | "Core B - Data Bank A SRAM") == NULL) | ||
| 355 | goto release_data_b_sram; | ||
| 356 | |||
| 357 | if (request_dma(CH_MEM_STREAM2_DEST, "Core B - DMA Destination") < 0) | ||
| 358 | goto release_data_a_sram; | ||
| 359 | |||
| 360 | if (request_dma(CH_MEM_STREAM2_SRC, "Core B - DMA Source") < 0) | ||
| 361 | goto release_dma_dest; | ||
| 362 | |||
| 363 | set_dma_callback(CH_MEM_STREAM2_DEST, coreb_dma_interrupt, NULL); | ||
| 364 | |||
| 365 | misc_register(&coreb_dev); | ||
| 366 | |||
| 367 | if (device_create_file(coreb_dev.this_device, &dev_attr_coreb_status)) | ||
| 368 | goto release_dma_src; | ||
| 369 | |||
| 370 | printk(KERN_INFO "BF561 Core B driver %s initialized.\n", MODULE_VER); | ||
| 371 | return 0; | ||
| 372 | |||
| 373 | release_dma_src: | ||
| 374 | free_dma(CH_MEM_STREAM2_SRC); | ||
| 375 | release_dma_dest: | ||
| 376 | free_dma(CH_MEM_STREAM2_DEST); | ||
| 377 | release_data_a_sram: | ||
| 378 | release_mem_region(0xff400000, 0x8000); | ||
| 379 | release_data_b_sram: | ||
| 380 | release_mem_region(0xff500000, 0x8000); | ||
| 381 | release_instruction_b_sram: | ||
| 382 | release_mem_region(0xff610000, 0x4000); | ||
| 383 | release_instruction_a_sram: | ||
| 384 | release_mem_region(0xff600000, 0x4000); | ||
| 385 | exit: | ||
| 386 | return -ENOMEM; | ||
| 387 | } | 65 | } |
| 66 | module_init(bf561_coreb_init); | ||
| 388 | 67 | ||
| 389 | void __exit bf561_coreb_exit(void) | 68 | static void __exit bf561_coreb_exit(void) |
| 390 | { | 69 | { |
| 391 | device_remove_file(coreb_dev.this_device, &dev_attr_coreb_status); | ||
| 392 | misc_deregister(&coreb_dev); | 70 | misc_deregister(&coreb_dev); |
| 393 | |||
| 394 | release_mem_region(0xff610000, 0x4000); | ||
| 395 | release_mem_region(0xff600000, 0x4000); | ||
| 396 | release_mem_region(0xff500000, 0x8000); | ||
| 397 | release_mem_region(0xff400000, 0x8000); | ||
| 398 | |||
| 399 | free_dma(CH_MEM_STREAM2_DEST); | ||
| 400 | free_dma(CH_MEM_STREAM2_SRC); | ||
| 401 | } | 71 | } |
| 402 | |||
| 403 | module_init(bf561_coreb_init); | ||
| 404 | module_exit(bf561_coreb_exit); | 72 | module_exit(bf561_coreb_exit); |
| 405 | 73 | ||
| 406 | MODULE_AUTHOR("Bas Vermeulen <bvermeul@blackstar.xs4all.nl>"); | 74 | MODULE_AUTHOR("Bas Vermeulen <bvermeul@blackstar.xs4all.nl>"); |
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index d0b0b3506440..dccd396cd931 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | /* This file shoule be up to date with: | 9 | /* This file should be up to date with: |
| 10 | * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List | 10 | * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| @@ -18,11 +18,11 @@ | |||
| 18 | # error will not work on BF561 silicon version 0.0, 0.1, 0.2, or 0.4 | 18 | # error will not work on BF561 silicon version 0.0, 0.1, 0.2, or 0.4 |
| 19 | #endif | 19 | #endif |
| 20 | 20 | ||
| 21 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */ | 21 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ |
| 22 | #define ANOMALY_05000074 (1) | 22 | #define ANOMALY_05000074 (1) |
| 23 | /* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */ | 23 | /* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */ |
| 24 | #define ANOMALY_05000099 (__SILICON_REVISION__ < 5) | 24 | #define ANOMALY_05000099 (__SILICON_REVISION__ < 5) |
| 25 | /* Trace Buffers may contain errors in emulation mode and/or exception, NMI, reset handlers */ | 25 | /* Trace Buffers may record discontinuities into emulation mode and/or exception, NMI, reset handlers */ |
| 26 | #define ANOMALY_05000116 (__SILICON_REVISION__ < 3) | 26 | #define ANOMALY_05000116 (__SILICON_REVISION__ < 3) |
| 27 | /* Testset instructions restricted to 32-bit aligned memory locations */ | 27 | /* Testset instructions restricted to 32-bit aligned memory locations */ |
| 28 | #define ANOMALY_05000120 (1) | 28 | #define ANOMALY_05000120 (1) |
| @@ -40,7 +40,7 @@ | |||
| 40 | #define ANOMALY_05000136 (__SILICON_REVISION__ < 3) | 40 | #define ANOMALY_05000136 (__SILICON_REVISION__ < 3) |
| 41 | /* Allowing the SPORT RX FIFO to fill will cause an overflow */ | 41 | /* Allowing the SPORT RX FIFO to fill will cause an overflow */ |
| 42 | #define ANOMALY_05000140 (__SILICON_REVISION__ < 3) | 42 | #define ANOMALY_05000140 (__SILICON_REVISION__ < 3) |
| 43 | /* Infinite Stall may occur with a particular sequence of consecutive dual dag events */ | 43 | /* An Infinite Stall occurs with a particular sequence of consecutive dual dag events */ |
| 44 | #define ANOMALY_05000141 (__SILICON_REVISION__ < 3) | 44 | #define ANOMALY_05000141 (__SILICON_REVISION__ < 3) |
| 45 | /* Interrupts may be lost when a programmable input flag is configured to be edge sensitive */ | 45 | /* Interrupts may be lost when a programmable input flag is configured to be edge sensitive */ |
| 46 | #define ANOMALY_05000142 (__SILICON_REVISION__ < 3) | 46 | #define ANOMALY_05000142 (__SILICON_REVISION__ < 3) |
| @@ -80,7 +80,7 @@ | |||
| 80 | #define ANOMALY_05000163 (__SILICON_REVISION__ < 3) | 80 | #define ANOMALY_05000163 (__SILICON_REVISION__ < 3) |
| 81 | /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */ | 81 | /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */ |
| 82 | #define ANOMALY_05000166 (1) | 82 | #define ANOMALY_05000166 (1) |
| 83 | /* Turning Serial Ports on with External Frame Syncs */ | 83 | /* Turning SPORTs on while External Frame Sync Is Active May Corrupt Data */ |
| 84 | #define ANOMALY_05000167 (1) | 84 | #define ANOMALY_05000167 (1) |
| 85 | /* SDRAM auto-refresh and subsequent Power Ups */ | 85 | /* SDRAM auto-refresh and subsequent Power Ups */ |
| 86 | #define ANOMALY_05000168 (__SILICON_REVISION__ < 5) | 86 | #define ANOMALY_05000168 (__SILICON_REVISION__ < 5) |
| @@ -164,7 +164,7 @@ | |||
| 164 | #define ANOMALY_05000242 (__SILICON_REVISION__ < 5) | 164 | #define ANOMALY_05000242 (__SILICON_REVISION__ < 5) |
| 165 | /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ | 165 | /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ |
| 166 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 5) | 166 | #define ANOMALY_05000244 (__SILICON_REVISION__ < 5) |
| 167 | /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ | 167 | /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ |
| 168 | #define ANOMALY_05000245 (__SILICON_REVISION__ < 5) | 168 | #define ANOMALY_05000245 (__SILICON_REVISION__ < 5) |
| 169 | /* TESTSET operation forces stall on the other core */ | 169 | /* TESTSET operation forces stall on the other core */ |
| 170 | #define ANOMALY_05000248 (__SILICON_REVISION__ < 5) | 170 | #define ANOMALY_05000248 (__SILICON_REVISION__ < 5) |
| @@ -208,7 +208,7 @@ | |||
| 208 | #define ANOMALY_05000275 (__SILICON_REVISION__ > 2) | 208 | #define ANOMALY_05000275 (__SILICON_REVISION__ > 2) |
| 209 | /* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */ | 209 | /* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */ |
| 210 | #define ANOMALY_05000276 (__SILICON_REVISION__ < 5) | 210 | #define ANOMALY_05000276 (__SILICON_REVISION__ < 5) |
| 211 | /* Writes to an I/O data register one SCLK cycle after an edge is detected may clear interrupt */ | 211 | /* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */ |
| 212 | #define ANOMALY_05000277 (__SILICON_REVISION__ < 3) | 212 | #define ANOMALY_05000277 (__SILICON_REVISION__ < 3) |
| 213 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ | 213 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ |
| 214 | #define ANOMALY_05000278 (__SILICON_REVISION__ < 5) | 214 | #define ANOMALY_05000278 (__SILICON_REVISION__ < 5) |
| @@ -232,7 +232,7 @@ | |||
| 232 | #define ANOMALY_05000310 (1) | 232 | #define ANOMALY_05000310 (1) |
| 233 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ | 233 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ |
| 234 | #define ANOMALY_05000312 (1) | 234 | #define ANOMALY_05000312 (1) |
| 235 | /* PPI Is Level-Sensitive on First Transfer */ | 235 | /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */ |
| 236 | #define ANOMALY_05000313 (1) | 236 | #define ANOMALY_05000313 (1) |
| 237 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ | 237 | /* Killed System MMR Write Completes Erroneously On Next System MMR Access */ |
| 238 | #define ANOMALY_05000315 (1) | 238 | #define ANOMALY_05000315 (1) |
| @@ -276,18 +276,27 @@ | |||
| 276 | #define ANOMALY_05000428 (__SILICON_REVISION__ > 3) | 276 | #define ANOMALY_05000428 (__SILICON_REVISION__ > 3) |
| 277 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ | 277 | /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ |
| 278 | #define ANOMALY_05000443 (1) | 278 | #define ANOMALY_05000443 (1) |
| 279 | /* False Hardware Error when RETI points to invalid memory */ | ||
| 280 | #define ANOMALY_05000461 (1) | ||
| 279 | 281 | ||
| 280 | /* Anomalies that don't exist on this proc */ | 282 | /* Anomalies that don't exist on this proc */ |
| 283 | #define ANOMALY_05000119 (0) | ||
| 281 | #define ANOMALY_05000158 (0) | 284 | #define ANOMALY_05000158 (0) |
| 282 | #define ANOMALY_05000183 (0) | 285 | #define ANOMALY_05000183 (0) |
| 286 | #define ANOMALY_05000233 (0) | ||
| 283 | #define ANOMALY_05000273 (0) | 287 | #define ANOMALY_05000273 (0) |
| 284 | #define ANOMALY_05000311 (0) | 288 | #define ANOMALY_05000311 (0) |
| 285 | #define ANOMALY_05000353 (1) | 289 | #define ANOMALY_05000353 (1) |
| 286 | #define ANOMALY_05000380 (0) | 290 | #define ANOMALY_05000380 (0) |
| 287 | #define ANOMALY_05000386 (1) | 291 | #define ANOMALY_05000386 (1) |
| 292 | #define ANOMALY_05000389 (0) | ||
| 293 | #define ANOMALY_05000400 (0) | ||
| 294 | #define ANOMALY_05000430 (0) | ||
| 288 | #define ANOMALY_05000432 (0) | 295 | #define ANOMALY_05000432 (0) |
| 289 | #define ANOMALY_05000435 (0) | 296 | #define ANOMALY_05000435 (0) |
| 290 | #define ANOMALY_05000447 (0) | 297 | #define ANOMALY_05000447 (0) |
| 291 | #define ANOMALY_05000448 (0) | 298 | #define ANOMALY_05000448 (0) |
| 299 | #define ANOMALY_05000456 (0) | ||
| 300 | #define ANOMALY_05000450 (0) | ||
| 292 | 301 | ||
| 293 | #endif | 302 | #endif |
diff --git a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h index 95d609f11c97..9d9858c2be68 100644 --- a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h | |||
| @@ -1526,6 +1526,35 @@ | |||
| 1526 | #define bfin_read_MDMA_D0_START_ADDR() bfin_read_MDMA1_D0_START_ADDR() | 1526 | #define bfin_read_MDMA_D0_START_ADDR() bfin_read_MDMA1_D0_START_ADDR() |
| 1527 | #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write_MDMA1_D0_START_ADDR(val) | 1527 | #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write_MDMA1_D0_START_ADDR(val) |
| 1528 | 1528 | ||
| 1529 | #define bfin_read_MDMA_S1_CONFIG() bfin_read_MDMA1_S1_CONFIG() | ||
| 1530 | #define bfin_write_MDMA_S1_CONFIG(val) bfin_write_MDMA1_S1_CONFIG(val) | ||
| 1531 | #define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read_MDMA1_S1_IRQ_STATUS() | ||
| 1532 | #define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write_MDMA1_S1_IRQ_STATUS(val) | ||
| 1533 | #define bfin_read_MDMA_S1_X_MODIFY() bfin_read_MDMA1_S1_X_MODIFY() | ||
| 1534 | #define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write_MDMA1_S1_X_MODIFY(val) | ||
| 1535 | #define bfin_read_MDMA_S1_Y_MODIFY() bfin_read_MDMA1_S1_Y_MODIFY() | ||
| 1536 | #define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write_MDMA1_S1_Y_MODIFY(val) | ||
| 1537 | #define bfin_read_MDMA_S1_X_COUNT() bfin_read_MDMA1_S1_X_COUNT() | ||
| 1538 | #define bfin_write_MDMA_S1_X_COUNT(val) bfin_write_MDMA1_S1_X_COUNT(val) | ||
| 1539 | #define bfin_read_MDMA_S1_Y_COUNT() bfin_read_MDMA1_S1_Y_COUNT() | ||
| 1540 | #define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write_MDMA1_S1_Y_COUNT(val) | ||
| 1541 | #define bfin_read_MDMA_S1_START_ADDR() bfin_read_MDMA1_S1_START_ADDR() | ||
| 1542 | #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write_MDMA1_S1_START_ADDR(val) | ||
| 1543 | #define bfin_read_MDMA_D1_CONFIG() bfin_read_MDMA1_D1_CONFIG() | ||
| 1544 | #define bfin_write_MDMA_D1_CONFIG(val) bfin_write_MDMA1_D1_CONFIG(val) | ||
| 1545 | #define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read_MDMA1_D1_IRQ_STATUS() | ||
| 1546 | #define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write_MDMA1_D1_IRQ_STATUS(val) | ||
| 1547 | #define bfin_read_MDMA_D1_X_MODIFY() bfin_read_MDMA1_D1_X_MODIFY() | ||
| 1548 | #define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write_MDMA1_D1_X_MODIFY(val) | ||
| 1549 | #define bfin_read_MDMA_D1_Y_MODIFY() bfin_read_MDMA1_D1_Y_MODIFY() | ||
| 1550 | #define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write_MDMA1_D1_Y_MODIFY(val) | ||
| 1551 | #define bfin_read_MDMA_D1_X_COUNT() bfin_read_MDMA1_D1_X_COUNT() | ||
| 1552 | #define bfin_write_MDMA_D1_X_COUNT(val) bfin_write_MDMA1_D1_X_COUNT(val) | ||
| 1553 | #define bfin_read_MDMA_D1_Y_COUNT() bfin_read_MDMA1_D1_Y_COUNT() | ||
| 1554 | #define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write_MDMA1_D1_Y_COUNT(val) | ||
| 1555 | #define bfin_read_MDMA_D1_START_ADDR() bfin_read_MDMA1_D1_START_ADDR() | ||
| 1556 | #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write_MDMA1_D1_START_ADDR(val) | ||
| 1557 | |||
| 1529 | /* These need to be last due to the cdef/linux inter-dependencies */ | 1558 | /* These need to be last due to the cdef/linux inter-dependencies */ |
| 1530 | #include <asm/irq.h> | 1559 | #include <asm/irq.h> |
| 1531 | 1560 | ||
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h index cf922295f4ce..5fc0f05026e0 100644 --- a/arch/blackfin/mach-bf561/include/mach/defBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h | |||
| @@ -796,6 +796,62 @@ | |||
| 796 | #define MDMA2_S1_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */ | 796 | #define MDMA2_S1_IRQ_STATUS 0xFFC00FE8 /*MemDMA2 Stream 1 Source Interrupt/Status Register */ |
| 797 | #define MDMA2_S1_PERIPHERAL_MAP 0xFFC00FEC /*MemDMA2 Stream 1 Source Peripheral Map register */ | 797 | #define MDMA2_S1_PERIPHERAL_MAP 0xFFC00FEC /*MemDMA2 Stream 1 Source Peripheral Map register */ |
| 798 | 798 | ||
| 799 | #define MDMA_D0_NEXT_DESC_PTR MDMA1_D0_NEXT_DESC_PTR | ||
| 800 | #define MDMA_D0_START_ADDR MDMA1_D0_START_ADDR | ||
| 801 | #define MDMA_D0_CONFIG MDMA1_D0_CONFIG | ||
| 802 | #define MDMA_D0_X_COUNT MDMA1_D0_X_COUNT | ||
| 803 | #define MDMA_D0_X_MODIFY MDMA1_D0_X_MODIFY | ||
| 804 | #define MDMA_D0_Y_COUNT MDMA1_D0_Y_COUNT | ||
| 805 | #define MDMA_D0_Y_MODIFY MDMA1_D0_Y_MODIFY | ||
| 806 | #define MDMA_D0_CURR_DESC_PTR MDMA1_D0_CURR_DESC_PTR | ||
| 807 | #define MDMA_D0_CURR_ADDR MDMA1_D0_CURR_ADDR | ||
| 808 | #define MDMA_D0_IRQ_STATUS MDMA1_D0_IRQ_STATUS | ||
| 809 | #define MDMA_D0_PERIPHERAL_MAP MDMA1_D0_PERIPHERAL_MAP | ||
| 810 | #define MDMA_D0_CURR_X_COUNT MDMA1_D0_CURR_X_COUNT | ||
| 811 | #define MDMA_D0_CURR_Y_COUNT MDMA1_D0_CURR_Y_COUNT | ||
| 812 | |||
| 813 | #define MDMA_S0_NEXT_DESC_PTR MDMA1_S0_NEXT_DESC_PTR | ||
| 814 | #define MDMA_S0_START_ADDR MDMA1_S0_START_ADDR | ||
| 815 | #define MDMA_S0_CONFIG MDMA1_S0_CONFIG | ||
| 816 | #define MDMA_S0_X_COUNT MDMA1_S0_X_COUNT | ||
| 817 | #define MDMA_S0_X_MODIFY MDMA1_S0_X_MODIFY | ||
| 818 | #define MDMA_S0_Y_COUNT MDMA1_S0_Y_COUNT | ||
| 819 | #define MDMA_S0_Y_MODIFY MDMA1_S0_Y_MODIFY | ||
| 820 | #define MDMA_S0_CURR_DESC_PTR MDMA1_S0_CURR_DESC_PTR | ||
| 821 | #define MDMA_S0_CURR_ADDR MDMA1_S0_CURR_ADDR | ||
| 822 | #define MDMA_S0_IRQ_STATUS MDMA1_S0_IRQ_STATUS | ||
| 823 | #define MDMA_S0_PERIPHERAL_MAP MDMA1_S0_PERIPHERAL_MAP | ||
| 824 | #define MDMA_S0_CURR_X_COUNT MDMA1_S0_CURR_X_COUNT | ||
| 825 | #define MDMA_S0_CURR_Y_COUNT MDMA1_S0_CURR_Y_COUNT | ||
| 826 | |||
| 827 | #define MDMA_D1_NEXT_DESC_PTR MDMA1_D1_NEXT_DESC_PTR | ||
| 828 | #define MDMA_D1_START_ADDR MDMA1_D1_START_ADDR | ||
| 829 | #define MDMA_D1_CONFIG MDMA1_D1_CONFIG | ||
| 830 | #define MDMA_D1_X_COUNT MDMA1_D1_X_COUNT | ||
| 831 | #define MDMA_D1_X_MODIFY MDMA1_D1_X_MODIFY | ||
| 832 | #define MDMA_D1_Y_COUNT MDMA1_D1_Y_COUNT | ||
| 833 | #define MDMA_D1_Y_MODIFY MDMA1_D1_Y_MODIFY | ||
| 834 | #define MDMA_D1_CURR_DESC_PTR MDMA1_D1_CURR_DESC_PTR | ||
| 835 | #define MDMA_D1_CURR_ADDR MDMA1_D1_CURR_ADDR | ||
| 836 | #define MDMA_D1_IRQ_STATUS MDMA1_D1_IRQ_STATUS | ||
| 837 | #define MDMA_D1_PERIPHERAL_MAP MDMA1_D1_PERIPHERAL_MAP | ||
| 838 | #define MDMA_D1_CURR_X_COUNT MDMA1_D1_CURR_X_COUNT | ||
| 839 | #define MDMA_D1_CURR_Y_COUNT MDMA1_D1_CURR_Y_COUNT | ||
| 840 | |||
| 841 | #define MDMA_S1_NEXT_DESC_PTR MDMA1_S1_NEXT_DESC_PTR | ||
| 842 | #define MDMA_S1_START_ADDR MDMA1_S1_START_ADDR | ||
| 843 | #define MDMA_S1_CONFIG MDMA1_S1_CONFIG | ||
| 844 | #define MDMA_S1_X_COUNT MDMA1_S1_X_COUNT | ||
| 845 | #define MDMA_S1_X_MODIFY MDMA1_S1_X_MODIFY | ||
| 846 | #define MDMA_S1_Y_COUNT MDMA1_S1_Y_COUNT | ||
| 847 | #define MDMA_S1_Y_MODIFY MDMA1_S1_Y_MODIFY | ||
| 848 | #define MDMA_S1_CURR_DESC_PTR MDMA1_S1_CURR_DESC_PTR | ||
| 849 | #define MDMA_S1_CURR_ADDR MDMA1_S1_CURR_ADDR | ||
| 850 | #define MDMA_S1_IRQ_STATUS MDMA1_S1_IRQ_STATUS | ||
| 851 | #define MDMA_S1_PERIPHERAL_MAP MDMA1_S1_PERIPHERAL_MAP | ||
| 852 | #define MDMA_S1_CURR_X_COUNT MDMA1_S1_CURR_X_COUNT | ||
| 853 | #define MDMA_S1_CURR_Y_COUNT MDMA1_S1_CURR_Y_COUNT | ||
| 854 | |||
| 799 | /* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */ | 855 | /* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */ |
| 800 | #define IMDMA_D0_CONFIG 0xFFC01808 /*IMDMA Stream 0 Destination Configuration */ | 856 | #define IMDMA_D0_CONFIG 0xFFC01808 /*IMDMA Stream 0 Destination Configuration */ |
| 801 | #define IMDMA_D0_NEXT_DESC_PTR 0xFFC01800 /*IMDMA Stream 0 Destination Next Descriptor Ptr Reg */ | 857 | #define IMDMA_D0_NEXT_DESC_PTR 0xFFC01800 /*IMDMA Stream 0 Destination Next Descriptor Ptr Reg */ |
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index 9b27e698c0b2..8c10701c251f 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c | |||
| @@ -133,9 +133,9 @@ void __init platform_request_ipi(irq_handler_t handler) | |||
| 133 | int ret; | 133 | int ret; |
| 134 | 134 | ||
| 135 | ret = request_irq(IRQ_SUPPLE_0, handler, IRQF_DISABLED, | 135 | ret = request_irq(IRQ_SUPPLE_0, handler, IRQF_DISABLED, |
| 136 | "SMP interrupt", handler); | 136 | "Supplemental Interrupt0", handler); |
| 137 | if (ret) | 137 | if (ret) |
| 138 | panic("Cannot request supplemental interrupt 0 for IPI service\n"); | 138 | panic("Cannot request supplemental interrupt 0 for IPI service"); |
| 139 | } | 139 | } |
| 140 | 140 | ||
| 141 | void platform_send_ipi(cpumask_t callmap) | 141 | void platform_send_ipi(cpumask_t callmap) |
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c index 80d39b2f9db2..da93d9207165 100644 --- a/arch/blackfin/mach-common/arch_checks.c +++ b/arch/blackfin/mach-common/arch_checks.c | |||
| @@ -71,3 +71,10 @@ | |||
| 71 | #if ANOMALY_05000448 | 71 | #if ANOMALY_05000448 |
| 72 | # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes. | 72 | # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes. |
| 73 | #endif | 73 | #endif |
| 74 | |||
| 75 | /* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */ | ||
| 76 | #if ANOMALY_05000220 && \ | ||
| 77 | ((defined(CONFIG_BFIN_WB) && defined(CONFIG_BFIN_L2_NOT_CACHED)) || \ | ||
| 78 | (!defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_L2_WB))) | ||
| 79 | # error You are exposing Anomaly 220 in this config, either config L2 as Write Through, or make External Memory WB. | ||
| 80 | #endif | ||
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index aa0648c6a9fe..d9666fe6c3d6 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S | |||
| @@ -15,6 +15,13 @@ | |||
| 15 | 15 | ||
| 16 | .text | 16 | .text |
| 17 | 17 | ||
| 18 | /* 05000443 - IFLUSH cannot be last instruction in hardware loop */ | ||
| 19 | #if ANOMALY_05000443 | ||
| 20 | # define BROK_FLUSH_INST "IFLUSH" | ||
| 21 | #else | ||
| 22 | # define BROK_FLUSH_INST "no anomaly! yeah!" | ||
| 23 | #endif | ||
| 24 | |||
| 18 | /* Since all L1 caches work the same way, we use the same method for flushing | 25 | /* Since all L1 caches work the same way, we use the same method for flushing |
| 19 | * them. Only the actual flush instruction differs. We write this in asm as | 26 | * them. Only the actual flush instruction differs. We write this in asm as |
| 20 | * GCC can be hard to coax into writing nice hardware loops. | 27 | * GCC can be hard to coax into writing nice hardware loops. |
| @@ -23,7 +30,7 @@ | |||
| 23 | * R0 = start address | 30 | * R0 = start address |
| 24 | * R1 = end address | 31 | * R1 = end address |
| 25 | */ | 32 | */ |
| 26 | .macro do_flush flushins:req optflushins optnopins label | 33 | .macro do_flush flushins:req label |
| 27 | 34 | ||
| 28 | R2 = -L1_CACHE_BYTES; | 35 | R2 = -L1_CACHE_BYTES; |
| 29 | 36 | ||
| @@ -44,22 +51,15 @@ | |||
| 44 | \label : | 51 | \label : |
| 45 | .endif | 52 | .endif |
| 46 | P0 = R0; | 53 | P0 = R0; |
| 54 | |||
| 47 | LSETUP (1f, 2f) LC1 = P1; | 55 | LSETUP (1f, 2f) LC1 = P1; |
| 48 | 1: | 56 | 1: |
| 49 | .ifnb \optflushins | 57 | .ifeqs "\flushins", BROK_FLUSH_INST |
| 50 | \optflushins [P0]; | ||
| 51 | .endif | ||
| 52 | #if ANOMALY_05000443 | ||
| 53 | .ifb \optnopins | ||
| 54 | 2: | ||
| 55 | .endif | ||
| 56 | \flushins [P0++]; | 58 | \flushins [P0++]; |
| 57 | .ifnb \optnopins | 59 | 2: nop; |
| 58 | 2: \optnopins; | 60 | .else |
| 59 | .endif | ||
| 60 | #else | ||
| 61 | 2: \flushins [P0++]; | 61 | 2: \flushins [P0++]; |
| 62 | #endif | 62 | .endif |
| 63 | 63 | ||
| 64 | RTS; | 64 | RTS; |
| 65 | .endm | 65 | .endm |
| @@ -77,25 +77,9 @@ ENTRY(_blackfin_icache_flush_range) | |||
| 77 | */ | 77 | */ |
| 78 | P0 = R0; | 78 | P0 = R0; |
| 79 | IFLUSH[P0]; | 79 | IFLUSH[P0]; |
| 80 | do_flush IFLUSH, , nop | 80 | do_flush IFLUSH |
| 81 | ENDPROC(_blackfin_icache_flush_range) | 81 | ENDPROC(_blackfin_icache_flush_range) |
| 82 | 82 | ||
| 83 | /* Flush all cache lines assocoiated with this area of memory. */ | ||
| 84 | ENTRY(_blackfin_icache_dcache_flush_range) | ||
| 85 | /* | ||
| 86 | * Walkaround to avoid loading wrong instruction after invalidating icache | ||
| 87 | * and following sequence is met. | ||
| 88 | * | ||
| 89 | * 1) One instruction address is cached in the instruction cache. | ||
| 90 | * 2) This instruction in SDRAM is changed. | ||
| 91 | * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range(). | ||
| 92 | * 4) This instruction is executed again, but the old one is loaded. | ||
| 93 | */ | ||
| 94 | P0 = R0; | ||
| 95 | IFLUSH[P0]; | ||
| 96 | do_flush FLUSH, IFLUSH | ||
| 97 | ENDPROC(_blackfin_icache_dcache_flush_range) | ||
| 98 | |||
| 99 | /* Throw away all D-cached data in specified region without any obligation to | 83 | /* Throw away all D-cached data in specified region without any obligation to |
| 100 | * write them back. Since the Blackfin ISA does not have an "invalidate" | 84 | * write them back. Since the Blackfin ISA does not have an "invalidate" |
| 101 | * instruction, we use flush/invalidate. Perhaps as a speed optimization we | 85 | * instruction, we use flush/invalidate. Perhaps as a speed optimization we |
| @@ -107,7 +91,7 @@ ENDPROC(_blackfin_dcache_invalidate_range) | |||
| 107 | 91 | ||
| 108 | /* Flush all data cache lines assocoiated with this memory area */ | 92 | /* Flush all data cache lines assocoiated with this memory area */ |
| 109 | ENTRY(_blackfin_dcache_flush_range) | 93 | ENTRY(_blackfin_dcache_flush_range) |
| 110 | do_flush FLUSH, , , .Ldfr | 94 | do_flush FLUSH, .Ldfr |
| 111 | ENDPROC(_blackfin_dcache_flush_range) | 95 | ENDPROC(_blackfin_dcache_flush_range) |
| 112 | 96 | ||
| 113 | /* Our headers convert the page structure to an address, so just need to flush | 97 | /* Our headers convert the page structure to an address, so just need to flush |
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c index 35393651359b..ef6870e9eea6 100644 --- a/arch/blackfin/mach-common/clocks-init.c +++ b/arch/blackfin/mach-common/clocks-init.c | |||
| @@ -72,6 +72,7 @@ void init_clocks(void) | |||
| 72 | #endif | 72 | #endif |
| 73 | bfin_write_PLL_LOCKCNT(0x300); | 73 | bfin_write_PLL_LOCKCNT(0x300); |
| 74 | do_sync(); | 74 | do_sync(); |
| 75 | /* We always write PLL_CTL thus avoiding Anomaly 05000242 */ | ||
| 75 | bfin_write16(PLL_CTL, PLL_CTL_VAL); | 76 | bfin_write16(PLL_CTL, PLL_CTL_VAL); |
| 76 | __asm__ __volatile__("IDLE;"); | 77 | __asm__ __volatile__("IDLE;"); |
| 77 | bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); | 78 | bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); |
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index 72e16605ca09..70e3411f558c 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c | |||
| @@ -140,7 +140,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy) | |||
| 140 | cclk = get_cclk() / 1000; | 140 | cclk = get_cclk() / 1000; |
| 141 | sclk = get_sclk() / 1000; | 141 | sclk = get_sclk() / 1000; |
| 142 | 142 | ||
| 143 | #if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE)) | 143 | #if ANOMALY_05000273 || ANOMALY_05000274 || \ |
| 144 | (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE)) | ||
| 144 | min_cclk = sclk * 2; | 145 | min_cclk = sclk * 2; |
| 145 | #else | 146 | #else |
| 146 | min_cclk = sclk; | 147 | min_cclk = sclk; |
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index a063a434f7e3..da0558ad1b1a 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S | |||
| @@ -36,7 +36,6 @@ | |||
| 36 | #include <linux/init.h> | 36 | #include <linux/init.h> |
| 37 | #include <linux/linkage.h> | 37 | #include <linux/linkage.h> |
| 38 | #include <linux/unistd.h> | 38 | #include <linux/unistd.h> |
| 39 | #include <linux/threads.h> | ||
| 40 | #include <asm/blackfin.h> | 39 | #include <asm/blackfin.h> |
| 41 | #include <asm/errno.h> | 40 | #include <asm/errno.h> |
| 42 | #include <asm/fixed_code.h> | 41 | #include <asm/fixed_code.h> |
| @@ -201,7 +200,18 @@ ENTRY(_ex_single_step) | |||
| 201 | cc = r7 == 0; | 200 | cc = r7 == 0; |
| 202 | if !cc jump 1f; | 201 | if !cc jump 1f; |
| 203 | #endif | 202 | #endif |
| 204 | 203 | #ifdef CONFIG_EXACT_HWERR | |
| 204 | /* Read the ILAT, and to check to see if the process we are | ||
| 205 | * single stepping caused a previous hardware error | ||
| 206 | * If so, do not single step, (which lowers to IRQ5, and makes | ||
| 207 | * us miss the error). | ||
| 208 | */ | ||
| 209 | p5.l = lo(ILAT); | ||
| 210 | p5.h = hi(ILAT); | ||
| 211 | r7 = [p5]; | ||
| 212 | cc = bittst(r7, EVT_IVHW_P); | ||
| 213 | if cc jump 1f; | ||
| 214 | #endif | ||
| 205 | /* Single stepping only a single instruction, so clear the trace | 215 | /* Single stepping only a single instruction, so clear the trace |
| 206 | * bit here. */ | 216 | * bit here. */ |
| 207 | r7 = syscfg; | 217 | r7 = syscfg; |
| @@ -263,15 +273,6 @@ ENTRY(_bfin_return_from_exception) | |||
| 263 | r6 = 0x25; | 273 | r6 = 0x25; |
| 264 | CC = R7 == R6; | 274 | CC = R7 == R6; |
| 265 | if CC JUMP _double_fault; | 275 | if CC JUMP _double_fault; |
| 266 | |||
| 267 | /* Did we cause a HW error? */ | ||
| 268 | p5.l = lo(ILAT); | ||
| 269 | p5.h = hi(ILAT); | ||
| 270 | r6 = [p5]; | ||
| 271 | r7 = 0x20; /* Did I just cause anther HW error? */ | ||
| 272 | r6 = r7 & r6; | ||
| 273 | CC = R7 == R6; | ||
| 274 | if CC JUMP _double_fault; | ||
| 275 | #endif | 276 | #endif |
| 276 | 277 | ||
| 277 | (R7:6,P5:4) = [sp++]; | 278 | (R7:6,P5:4) = [sp++]; |
| @@ -473,6 +474,16 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/ | |||
| 473 | [--sp] = ASTAT; | 474 | [--sp] = ASTAT; |
| 474 | [--sp] = (R7:6,P5:4); | 475 | [--sp] = (R7:6,P5:4); |
| 475 | 476 | ||
| 477 | #ifdef CONFIG_EXACT_HWERR | ||
| 478 | /* Make sure all pending read/writes complete. This will ensure any | ||
| 479 | * accesses which could cause hardware errors completes, and signal | ||
| 480 | * the the hardware before we do something silly, like crash the | ||
| 481 | * kernel. We don't need to work around anomaly 05000312, since | ||
| 482 | * we are already atomic | ||
| 483 | */ | ||
| 484 | ssync; | ||
| 485 | #endif | ||
| 486 | |||
| 476 | #if ANOMALY_05000283 || ANOMALY_05000315 | 487 | #if ANOMALY_05000283 || ANOMALY_05000315 |
| 477 | cc = r7 == r7; | 488 | cc = r7 == r7; |
| 478 | p5.h = HI(CHIPID); | 489 | p5.h = HI(CHIPID); |
| @@ -855,7 +866,7 @@ ENTRY(_ret_from_exception) | |||
| 855 | p1.h = _schedule_and_signal; | 866 | p1.h = _schedule_and_signal; |
| 856 | [p0] = p1; | 867 | [p0] = p1; |
| 857 | csync; | 868 | csync; |
| 858 | raise 15; /* raise evt14 to do signal or reschedule */ | 869 | raise 15; /* raise evt15 to do signal or reschedule */ |
| 859 | 4: | 870 | 4: |
| 860 | r0 = syscfg; | 871 | r0 = syscfg; |
| 861 | bitclr(r0, 0); | 872 | bitclr(r0, 0); |
| @@ -916,7 +927,7 @@ ENTRY(_return_from_int) | |||
| 916 | p1.h = _schedule_and_signal_from_int; | 927 | p1.h = _schedule_and_signal_from_int; |
| 917 | [p0] = p1; | 928 | [p0] = p1; |
| 918 | csync; | 929 | csync; |
| 919 | #if ANOMALY_05000281 | 930 | #if ANOMALY_05000281 || ANOMALY_05000461 |
| 920 | r0.l = lo(SAFE_USER_INSTRUCTION); | 931 | r0.l = lo(SAFE_USER_INSTRUCTION); |
| 921 | r0.h = hi(SAFE_USER_INSTRUCTION); | 932 | r0.h = hi(SAFE_USER_INSTRUCTION); |
| 922 | reti = r0; | 933 | reti = r0; |
| @@ -930,18 +941,27 @@ ENTRY(_return_from_int) | |||
| 930 | ENDPROC(_return_from_int) | 941 | ENDPROC(_return_from_int) |
| 931 | 942 | ||
| 932 | ENTRY(_lower_to_irq14) | 943 | ENTRY(_lower_to_irq14) |
| 933 | #if ANOMALY_05000281 | 944 | #if ANOMALY_05000281 || ANOMALY_05000461 |
| 934 | r0.l = lo(SAFE_USER_INSTRUCTION); | 945 | r0.l = lo(SAFE_USER_INSTRUCTION); |
| 935 | r0.h = hi(SAFE_USER_INSTRUCTION); | 946 | r0.h = hi(SAFE_USER_INSTRUCTION); |
| 936 | reti = r0; | 947 | reti = r0; |
| 937 | #endif | 948 | #endif |
| 938 | r0 = 0x401f; | 949 | |
| 950 | #ifdef CONFIG_DEBUG_HWERR | ||
| 951 | /* enable irq14 & hwerr interrupt, until we transition to _evt14_softirq */ | ||
| 952 | r0 = (EVT_IVG14 | EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU); | ||
| 953 | #else | ||
| 954 | /* Only enable irq14 interrupt, until we transition to _evt14_softirq */ | ||
| 955 | r0 = (EVT_IVG14 | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU); | ||
| 956 | #endif | ||
| 939 | sti r0; | 957 | sti r0; |
| 940 | raise 14; | 958 | raise 14; |
| 941 | rti; | 959 | rti; |
| 960 | ENDPROC(_lower_to_irq14) | ||
| 961 | |||
| 942 | ENTRY(_evt14_softirq) | 962 | ENTRY(_evt14_softirq) |
| 943 | #ifdef CONFIG_DEBUG_HWERR | 963 | #ifdef CONFIG_DEBUG_HWERR |
| 944 | r0 = 0x3f; | 964 | r0 = (EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU); |
| 945 | sti r0; | 965 | sti r0; |
| 946 | #else | 966 | #else |
| 947 | cli r0; | 967 | cli r0; |
| @@ -949,8 +969,9 @@ ENTRY(_evt14_softirq) | |||
| 949 | [--sp] = RETI; | 969 | [--sp] = RETI; |
| 950 | SP += 4; | 970 | SP += 4; |
| 951 | rts; | 971 | rts; |
| 972 | ENDPROC(_evt14_softirq) | ||
| 952 | 973 | ||
| 953 | _schedule_and_signal_from_int: | 974 | ENTRY(_schedule_and_signal_from_int) |
| 954 | /* To end up here, vector 15 was changed - so we have to change it | 975 | /* To end up here, vector 15 was changed - so we have to change it |
| 955 | * back. | 976 | * back. |
| 956 | */ | 977 | */ |
| @@ -983,8 +1004,9 @@ _schedule_and_signal_from_int: | |||
| 983 | call _finish_atomic_sections; | 1004 | call _finish_atomic_sections; |
| 984 | sp += 12; | 1005 | sp += 12; |
| 985 | jump.s .Lresume_userspace; | 1006 | jump.s .Lresume_userspace; |
| 1007 | ENDPROC(_schedule_and_signal_from_int) | ||
| 986 | 1008 | ||
| 987 | _schedule_and_signal: | 1009 | ENTRY(_schedule_and_signal) |
| 988 | SAVE_CONTEXT_SYSCALL | 1010 | SAVE_CONTEXT_SYSCALL |
| 989 | /* To end up here, vector 15 was changed - so we have to change it | 1011 | /* To end up here, vector 15 was changed - so we have to change it |
| 990 | * back. | 1012 | * back. |
| @@ -1002,7 +1024,7 @@ _schedule_and_signal: | |||
| 1002 | 1: | 1024 | 1: |
| 1003 | RESTORE_CONTEXT | 1025 | RESTORE_CONTEXT |
| 1004 | rti; | 1026 | rti; |
| 1005 | ENDPROC(_lower_to_irq14) | 1027 | ENDPROC(_schedule_and_signal) |
| 1006 | 1028 | ||
| 1007 | /* We handle this 100% in exception space - to reduce overhead | 1029 | /* We handle this 100% in exception space - to reduce overhead |
| 1008 | * Only potiential problem is if the software buffer gets swapped out of the | 1030 | * Only potiential problem is if the software buffer gets swapped out of the |
| @@ -1588,19 +1610,3 @@ ENTRY(_sys_call_table) | |||
| 1588 | .long _sys_ni_syscall | 1610 | .long _sys_ni_syscall |
| 1589 | .endr | 1611 | .endr |
| 1590 | END(_sys_call_table) | 1612 | END(_sys_call_table) |
| 1591 | |||
| 1592 | #ifdef CONFIG_EXCEPTION_L1_SCRATCH | ||
| 1593 | /* .section .l1.bss.scratch */ | ||
| 1594 | .set _exception_stack_top, L1_SCRATCH_START + L1_SCRATCH_LENGTH | ||
| 1595 | #else | ||
| 1596 | #ifdef CONFIG_SYSCALL_TAB_L1 | ||
| 1597 | .section .l1.bss | ||
| 1598 | #else | ||
| 1599 | .bss | ||
| 1600 | #endif | ||
| 1601 | ENTRY(_exception_stack) | ||
| 1602 | .rept 1024 * NR_CPUS | ||
| 1603 | .long 0 | ||
| 1604 | .endr | ||
| 1605 | _exception_stack_top: | ||
| 1606 | #endif | ||
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index 698d4c05947e..f826f6b9f917 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S | |||
| @@ -30,8 +30,6 @@ ENTRY(__init_clear_bss) | |||
| 30 | rts; | 30 | rts; |
| 31 | ENDPROC(__init_clear_bss) | 31 | ENDPROC(__init_clear_bss) |
| 32 | 32 | ||
| 33 | #define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) | ||
| 34 | |||
| 35 | ENTRY(__start) | 33 | ENTRY(__start) |
| 36 | /* R0: argument of command line string, passed from uboot, save it */ | 34 | /* R0: argument of command line string, passed from uboot, save it */ |
| 37 | R7 = R0; | 35 | R7 = R0; |
| @@ -126,30 +124,30 @@ ENTRY(__start) | |||
| 126 | * below | 124 | * below |
| 127 | */ | 125 | */ |
| 128 | GET_PDA(p0, r0); | 126 | GET_PDA(p0, r0); |
| 129 | r7 = [p0 + PDA_RETX]; | 127 | r6 = [p0 + PDA_RETX]; |
| 130 | p1.l = _init_saved_retx; | 128 | p1.l = _init_saved_retx; |
| 131 | p1.h = _init_saved_retx; | 129 | p1.h = _init_saved_retx; |
| 132 | [p1] = r7; | 130 | [p1] = r6; |
| 133 | 131 | ||
| 134 | r7 = [p0 + PDA_DCPLB]; | 132 | r6 = [p0 + PDA_DCPLB]; |
| 135 | p1.l = _init_saved_dcplb_fault_addr; | 133 | p1.l = _init_saved_dcplb_fault_addr; |
| 136 | p1.h = _init_saved_dcplb_fault_addr; | 134 | p1.h = _init_saved_dcplb_fault_addr; |
| 137 | [p1] = r7; | 135 | [p1] = r6; |
| 138 | 136 | ||
| 139 | r7 = [p0 + PDA_ICPLB]; | 137 | r6 = [p0 + PDA_ICPLB]; |
| 140 | p1.l = _init_saved_icplb_fault_addr; | 138 | p1.l = _init_saved_icplb_fault_addr; |
| 141 | p1.h = _init_saved_icplb_fault_addr; | 139 | p1.h = _init_saved_icplb_fault_addr; |
| 142 | [p1] = r7; | 140 | [p1] = r6; |
| 143 | 141 | ||
| 144 | r7 = [p0 + PDA_SEQSTAT]; | 142 | r6 = [p0 + PDA_SEQSTAT]; |
| 145 | p1.l = _init_saved_seqstat; | 143 | p1.l = _init_saved_seqstat; |
| 146 | p1.h = _init_saved_seqstat; | 144 | p1.h = _init_saved_seqstat; |
| 147 | [p1] = r7; | 145 | [p1] = r6; |
| 148 | #endif | 146 | #endif |
| 149 | 147 | ||
| 150 | /* Initialize stack pointer */ | 148 | /* Initialize stack pointer */ |
| 151 | sp.l = lo(INITIAL_STACK); | 149 | sp.l = _init_thread_union; |
| 152 | sp.h = hi(INITIAL_STACK); | 150 | sp.h = _init_thread_union; |
| 153 | fp = sp; | 151 | fp = sp; |
| 154 | usp = sp; | 152 | usp = sp; |
| 155 | 153 | ||
| @@ -189,7 +187,15 @@ ENTRY(__start) | |||
| 189 | /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ | 187 | /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ |
| 190 | call _bfin_relocate_l1_mem; | 188 | call _bfin_relocate_l1_mem; |
| 191 | #ifdef CONFIG_BFIN_KERNEL_CLOCK | 189 | #ifdef CONFIG_BFIN_KERNEL_CLOCK |
| 190 | /* Only use on-chip scratch space for stack when absolutely required | ||
| 191 | * to avoid Anomaly 05000227 ... we know the init_clocks() func only | ||
| 192 | * uses L1 text and stack space and no other memory region. | ||
| 193 | */ | ||
| 194 | # define KERNEL_CLOCK_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) | ||
| 195 | sp.l = lo(KERNEL_CLOCK_STACK); | ||
| 196 | sp.h = hi(KERNEL_CLOCK_STACK); | ||
| 192 | call _init_clocks; | 197 | call _init_clocks; |
| 198 | sp = usp; /* usp hasnt been touched, so restore from there */ | ||
| 193 | #endif | 199 | #endif |
| 194 | 200 | ||
| 195 | /* This section keeps the processor in supervisor mode | 201 | /* This section keeps the processor in supervisor mode |
| @@ -243,9 +249,7 @@ ENTRY(_real_start) | |||
| 243 | call _cmdline_init; | 249 | call _cmdline_init; |
| 244 | 250 | ||
| 245 | /* Load the current thread pointer and stack */ | 251 | /* Load the current thread pointer and stack */ |
| 246 | sp.l = _init_thread_union; | 252 | p1 = THREAD_SIZE + 4 (z); /* +4 is for reti loading */ |
| 247 | sp.h = _init_thread_union; | ||
| 248 | p1 = THREAD_SIZE (z); | ||
| 249 | sp = sp + p1; | 253 | sp = sp + p1; |
| 250 | usp = sp; | 254 | usp = sp; |
| 251 | fp = sp; | 255 | fp = sp; |
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index 0069c2dd4625..9c46680186e4 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S | |||
| @@ -145,6 +145,14 @@ __common_int_entry: | |||
| 145 | 145 | ||
| 146 | /* interrupt routine for ivhw - 5 */ | 146 | /* interrupt routine for ivhw - 5 */ |
| 147 | ENTRY(_evt_ivhw) | 147 | ENTRY(_evt_ivhw) |
| 148 | /* In case a single action kicks off multiple memory transactions, (like | ||
| 149 | * a cache line fetch, - this can cause multiple hardware errors, let's | ||
| 150 | * catch them all. First - make sure all the actions are complete, and | ||
| 151 | * the core sees the hardware errors. | ||
| 152 | */ | ||
| 153 | SSYNC; | ||
| 154 | SSYNC; | ||
| 155 | |||
| 148 | SAVE_ALL_SYS | 156 | SAVE_ALL_SYS |
| 149 | #ifdef CONFIG_FRAME_POINTER | 157 | #ifdef CONFIG_FRAME_POINTER |
| 150 | fp = 0; | 158 | fp = 0; |
| @@ -159,6 +167,25 @@ ENTRY(_evt_ivhw) | |||
| 159 | 1: | 167 | 1: |
| 160 | #endif | 168 | #endif |
| 161 | 169 | ||
| 170 | /* Handle all stacked hardware errors | ||
| 171 | * To make sure we don't hang forever, only do it 10 times | ||
| 172 | */ | ||
| 173 | R0 = 0; | ||
| 174 | R2 = 10; | ||
| 175 | 1: | ||
| 176 | P0.L = LO(ILAT); | ||
| 177 | P0.H = HI(ILAT); | ||
| 178 | R1 = [P0]; | ||
| 179 | CC = BITTST(R1, EVT_IVHW_P); | ||
| 180 | IF ! CC JUMP 2f; | ||
| 181 | /* OK a hardware error is pending - clear it */ | ||
| 182 | R1 = EVT_IVHW_P; | ||
| 183 | [P0] = R1; | ||
| 184 | R0 += 1; | ||
| 185 | CC = R1 == R2; | ||
| 186 | if CC JUMP 2f; | ||
| 187 | JUMP 1b; | ||
| 188 | 2: | ||
| 162 | # We are going to dump something out, so make sure we print IPEND properly | 189 | # We are going to dump something out, so make sure we print IPEND properly |
| 163 | p2.l = lo(IPEND); | 190 | p2.l = lo(IPEND); |
| 164 | p2.h = hi(IPEND); | 191 | p2.h = hi(IPEND); |
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index a7d7b2dd4059..351afd0e36d8 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
| @@ -1052,7 +1052,7 @@ int __init init_arch_irq(void) | |||
| 1052 | set_irq_chained_handler(irq, bfin_demux_error_irq); | 1052 | set_irq_chained_handler(irq, bfin_demux_error_irq); |
| 1053 | break; | 1053 | break; |
| 1054 | #endif | 1054 | #endif |
| 1055 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE) | 1055 | #if defined(CONFIG_TICKSOURCE_GPTMR0) |
| 1056 | case IRQ_TIMER0: | 1056 | case IRQ_TIMER0: |
| 1057 | set_irq_handler(irq, handle_percpu_irq); | 1057 | set_irq_handler(irq, handle_percpu_irq); |
| 1058 | break; | 1058 | break; |
| @@ -1116,6 +1116,9 @@ int __init init_arch_irq(void) | |||
| 1116 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 1116 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
| 1117 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 1117 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
| 1118 | 1118 | ||
| 1119 | /* This implicitly covers ANOMALY_05000171 | ||
| 1120 | * Boot-ROM code modifies SICA_IWRx wakeup registers | ||
| 1121 | */ | ||
| 1119 | #ifdef SIC_IWR0 | 1122 | #ifdef SIC_IWR0 |
| 1120 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); | 1123 | bfin_write_SIC_IWR0(IWR_DISABLE_ALL); |
| 1121 | # ifdef SIC_IWR1 | 1124 | # ifdef SIC_IWR1 |
| @@ -1136,13 +1139,6 @@ int __init init_arch_irq(void) | |||
| 1136 | bfin_write_SIC_IWR(IWR_DISABLE_ALL); | 1139 | bfin_write_SIC_IWR(IWR_DISABLE_ALL); |
| 1137 | #endif | 1140 | #endif |
| 1138 | 1141 | ||
| 1139 | #ifdef CONFIG_IPIPE | ||
| 1140 | for (irq = 0; irq < NR_IRQS; irq++) { | ||
| 1141 | struct irq_desc *desc = irq_to_desc(irq); | ||
| 1142 | desc->ic_prio = __ipipe_get_irq_priority(irq); | ||
| 1143 | } | ||
| 1144 | #endif /* CONFIG_IPIPE */ | ||
| 1145 | |||
| 1146 | return 0; | 1142 | return 0; |
| 1147 | } | 1143 | } |
| 1148 | 1144 | ||
| @@ -1156,23 +1152,22 @@ void do_irq(int vec, struct pt_regs *fp) | |||
| 1156 | } else { | 1152 | } else { |
| 1157 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; | 1153 | struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst; |
| 1158 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; | 1154 | struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop; |
| 1159 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ | 1155 | #if defined(SIC_ISR0) || defined(SICA_ISR0) |
| 1160 | || defined(BF538_FAMILY) || defined(CONFIG_BF51x) | ||
| 1161 | unsigned long sic_status[3]; | 1156 | unsigned long sic_status[3]; |
| 1162 | 1157 | ||
| 1163 | if (smp_processor_id()) { | 1158 | if (smp_processor_id()) { |
| 1164 | #ifdef CONFIG_SMP | 1159 | # ifdef SICB_ISR0 |
| 1165 | /* This will be optimized out in UP mode. */ | 1160 | /* This will be optimized out in UP mode. */ |
| 1166 | sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); | 1161 | sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0(); |
| 1167 | sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); | 1162 | sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1(); |
| 1168 | #endif | 1163 | # endif |
| 1169 | } else { | 1164 | } else { |
| 1170 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | 1165 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); |
| 1171 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); | 1166 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); |
| 1172 | } | 1167 | } |
| 1173 | #ifdef CONFIG_BF54x | 1168 | # ifdef SIC_ISR2 |
| 1174 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); | 1169 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); |
| 1175 | #endif | 1170 | # endif |
| 1176 | for (;; ivg++) { | 1171 | for (;; ivg++) { |
| 1177 | if (ivg >= ivg_stop) { | 1172 | if (ivg >= ivg_stop) { |
| 1178 | atomic_inc(&num_spurious); | 1173 | atomic_inc(&num_spurious); |
| @@ -1236,20 +1231,16 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
| 1236 | 1231 | ||
| 1237 | if (likely(vec == EVT_IVTMR_P)) { | 1232 | if (likely(vec == EVT_IVTMR_P)) { |
| 1238 | irq = IRQ_CORETMR; | 1233 | irq = IRQ_CORETMR; |
| 1239 | goto core_tick; | ||
| 1240 | } | ||
| 1241 | 1234 | ||
| 1242 | SSYNC(); | 1235 | } else { |
| 1243 | 1236 | #if defined(SIC_ISR0) || defined(SICA_ISR0) | |
| 1244 | #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) | ||
| 1245 | { | ||
| 1246 | unsigned long sic_status[3]; | 1237 | unsigned long sic_status[3]; |
| 1247 | 1238 | ||
| 1248 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); | 1239 | sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0(); |
| 1249 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); | 1240 | sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1(); |
| 1250 | #ifdef CONFIG_BF54x | 1241 | # ifdef SIC_ISR2 |
| 1251 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); | 1242 | sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2(); |
| 1252 | #endif | 1243 | # endif |
| 1253 | for (;; ivg++) { | 1244 | for (;; ivg++) { |
| 1254 | if (ivg >= ivg_stop) { | 1245 | if (ivg >= ivg_stop) { |
| 1255 | atomic_inc(&num_spurious); | 1246 | atomic_inc(&num_spurious); |
| @@ -1258,9 +1249,7 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
| 1258 | if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag) | 1249 | if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag) |
| 1259 | break; | 1250 | break; |
| 1260 | } | 1251 | } |
| 1261 | } | ||
| 1262 | #else | 1252 | #else |
| 1263 | { | ||
| 1264 | unsigned long sic_status; | 1253 | unsigned long sic_status; |
| 1265 | 1254 | ||
| 1266 | sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR(); | 1255 | sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR(); |
| @@ -1272,15 +1261,13 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) | |||
| 1272 | } else if (sic_status & ivg->isrflag) | 1261 | } else if (sic_status & ivg->isrflag) |
| 1273 | break; | 1262 | break; |
| 1274 | } | 1263 | } |
| 1275 | } | ||
| 1276 | #endif | 1264 | #endif |
| 1277 | 1265 | ||
| 1278 | irq = ivg->irqno; | 1266 | irq = ivg->irqno; |
| 1267 | } | ||
| 1279 | 1268 | ||
| 1280 | if (irq == IRQ_SYSTMR) { | 1269 | if (irq == IRQ_SYSTMR) { |
| 1281 | #ifdef CONFIG_GENERIC_CLOCKEVENTS | 1270 | #ifndef CONFIG_GENERIC_CLOCKEVENTS |
| 1282 | core_tick: | ||
| 1283 | #else | ||
| 1284 | bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ | 1271 | bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */ |
| 1285 | #endif | 1272 | #endif |
| 1286 | /* This is basically what we need from the register frame. */ | 1273 | /* This is basically what we need from the register frame. */ |
| @@ -1292,9 +1279,6 @@ core_tick: | |||
| 1292 | __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; | 1279 | __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; |
| 1293 | } | 1280 | } |
| 1294 | 1281 | ||
| 1295 | #ifndef CONFIG_GENERIC_CLOCKEVENTS | ||
| 1296 | core_tick: | ||
| 1297 | #endif | ||
| 1298 | if (this_domain == ipipe_root_domain) { | 1282 | if (this_domain == ipipe_root_domain) { |
| 1299 | s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status); | 1283 | s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status); |
| 1300 | barrier(); | 1284 | barrier(); |
| @@ -1312,7 +1296,7 @@ core_tick: | |||
| 1312 | } | 1296 | } |
| 1313 | } | 1297 | } |
| 1314 | 1298 | ||
| 1315 | return 0; | 1299 | return 0; |
| 1316 | } | 1300 | } |
| 1317 | 1301 | ||
| 1318 | #endif /* CONFIG_IPIPE */ | 1302 | #endif /* CONFIG_IPIPE */ |
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 93eab6146079..3b8ebaee77f2 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
| @@ -43,8 +43,13 @@ | |||
| 43 | #include <asm/processor.h> | 43 | #include <asm/processor.h> |
| 44 | #include <asm/ptrace.h> | 44 | #include <asm/ptrace.h> |
| 45 | #include <asm/cpu.h> | 45 | #include <asm/cpu.h> |
| 46 | #include <asm/time.h> | ||
| 46 | #include <linux/err.h> | 47 | #include <linux/err.h> |
| 47 | 48 | ||
| 49 | /* | ||
| 50 | * Anomaly notes: | ||
| 51 | * 05000120 - we always define corelock as 32-bit integer in L2 | ||
| 52 | */ | ||
| 48 | struct corelock_slot corelock __attribute__ ((__section__(".l2.bss"))); | 53 | struct corelock_slot corelock __attribute__ ((__section__(".l2.bss"))); |
| 49 | 54 | ||
| 50 | void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb, | 55 | void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb, |
| @@ -352,7 +357,7 @@ int __cpuinit __cpu_up(unsigned int cpu) | |||
| 352 | 357 | ||
| 353 | static void __cpuinit setup_secondary(unsigned int cpu) | 358 | static void __cpuinit setup_secondary(unsigned int cpu) |
| 354 | { | 359 | { |
| 355 | #if !(defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)) | 360 | #if !defined(CONFIG_TICKSOURCE_GPTMR0) |
| 356 | struct irq_desc *timer_desc; | 361 | struct irq_desc *timer_desc; |
| 357 | #endif | 362 | #endif |
| 358 | unsigned long ilat; | 363 | unsigned long ilat; |
| @@ -364,16 +369,13 @@ static void __cpuinit setup_secondary(unsigned int cpu) | |||
| 364 | bfin_write_ILAT(ilat); | 369 | bfin_write_ILAT(ilat); |
| 365 | CSYNC(); | 370 | CSYNC(); |
| 366 | 371 | ||
| 367 | /* Reserve the PDA space for the secondary CPU. */ | ||
| 368 | reserve_pda(); | ||
| 369 | |||
| 370 | /* Enable interrupt levels IVG7-15. IARs have been already | 372 | /* Enable interrupt levels IVG7-15. IARs have been already |
| 371 | * programmed by the boot CPU. */ | 373 | * programmed by the boot CPU. */ |
| 372 | bfin_irq_flags |= IMASK_IVG15 | | 374 | bfin_irq_flags |= IMASK_IVG15 | |
| 373 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 375 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
| 374 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 376 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
| 375 | 377 | ||
| 376 | #if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE) | 378 | #if defined(CONFIG_TICKSOURCE_GPTMR0) |
| 377 | /* Power down the core timer, just to play safe. */ | 379 | /* Power down the core timer, just to play safe. */ |
| 378 | bfin_write_TCNTL(0); | 380 | bfin_write_TCNTL(0); |
| 379 | 381 | ||
diff --git a/arch/blackfin/mm/blackfin_sram.h b/arch/blackfin/mm/blackfin_sram.h index 8cb0945563f9..bc0062884fde 100644 --- a/arch/blackfin/mm/blackfin_sram.h +++ b/arch/blackfin/mm/blackfin_sram.h | |||
| @@ -30,7 +30,6 @@ | |||
| 30 | #ifndef __BLACKFIN_SRAM_H__ | 30 | #ifndef __BLACKFIN_SRAM_H__ |
| 31 | #define __BLACKFIN_SRAM_H__ | 31 | #define __BLACKFIN_SRAM_H__ |
| 32 | 32 | ||
| 33 | extern void bfin_sram_init(void); | ||
| 34 | extern void *l1sram_alloc(size_t); | 33 | extern void *l1sram_alloc(size_t); |
| 35 | 34 | ||
| 36 | #endif | 35 | #endif |
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c index 9c3629b9a689..014a55abd09a 100644 --- a/arch/blackfin/mm/init.c +++ b/arch/blackfin/mm/init.c | |||
| @@ -52,9 +52,14 @@ static unsigned long empty_bad_page_table; | |||
| 52 | 52 | ||
| 53 | static unsigned long empty_bad_page; | 53 | static unsigned long empty_bad_page; |
| 54 | 54 | ||
| 55 | unsigned long empty_zero_page; | 55 | static unsigned long empty_zero_page; |
| 56 | 56 | ||
| 57 | extern unsigned long exception_stack[NR_CPUS][1024]; | 57 | #ifndef CONFIG_EXCEPTION_L1_SCRATCH |
| 58 | #if defined CONFIG_SYSCALL_TAB_L1 | ||
| 59 | __attribute__((l1_data)) | ||
| 60 | #endif | ||
| 61 | static unsigned long exception_stack[NR_CPUS][1024]; | ||
| 62 | #endif | ||
| 58 | 63 | ||
| 59 | struct blackfin_pda cpu_pda[NR_CPUS]; | 64 | struct blackfin_pda cpu_pda[NR_CPUS]; |
| 60 | EXPORT_SYMBOL(cpu_pda); | 65 | EXPORT_SYMBOL(cpu_pda); |
| @@ -117,19 +122,18 @@ asmlinkage void __init init_pda(void) | |||
| 117 | cpu_pda[0].next = &cpu_pda[1]; | 122 | cpu_pda[0].next = &cpu_pda[1]; |
| 118 | cpu_pda[1].next = &cpu_pda[0]; | 123 | cpu_pda[1].next = &cpu_pda[0]; |
| 119 | 124 | ||
| 125 | #ifdef CONFIG_EXCEPTION_L1_SCRATCH | ||
| 126 | cpu_pda[cpu].ex_stack = (unsigned long *)(L1_SCRATCH_START + \ | ||
| 127 | L1_SCRATCH_LENGTH); | ||
| 128 | #else | ||
| 120 | cpu_pda[cpu].ex_stack = exception_stack[cpu + 1]; | 129 | cpu_pda[cpu].ex_stack = exception_stack[cpu + 1]; |
| 130 | #endif | ||
| 121 | 131 | ||
| 122 | #ifdef CONFIG_SMP | 132 | #ifdef CONFIG_SMP |
| 123 | cpu_pda[cpu].imask = 0x1f; | 133 | cpu_pda[cpu].imask = 0x1f; |
| 124 | #endif | 134 | #endif |
| 125 | } | 135 | } |
| 126 | 136 | ||
| 127 | void __cpuinit reserve_pda(void) | ||
| 128 | { | ||
| 129 | printk(KERN_INFO "PDA for CPU%u reserved at %p\n", smp_processor_id(), | ||
| 130 | &cpu_pda[smp_processor_id()]); | ||
| 131 | } | ||
| 132 | |||
| 133 | void __init mem_init(void) | 137 | void __init mem_init(void) |
| 134 | { | 138 | { |
| 135 | unsigned int codek = 0, datak = 0, initk = 0; | 139 | unsigned int codek = 0, datak = 0, initk = 0; |
| @@ -171,19 +175,6 @@ void __init mem_init(void) | |||
| 171 | initk, codek, datak, DMA_UNCACHED_REGION >> 10, (reservedpages << (PAGE_SHIFT-10))); | 175 | initk, codek, datak, DMA_UNCACHED_REGION >> 10, (reservedpages << (PAGE_SHIFT-10))); |
| 172 | } | 176 | } |
| 173 | 177 | ||
| 174 | static int __init sram_init(void) | ||
| 175 | { | ||
| 176 | /* Initialize the blackfin L1 Memory. */ | ||
| 177 | bfin_sram_init(); | ||
| 178 | |||
| 179 | /* Reserve the PDA space for the boot CPU right after we | ||
| 180 | * initialized the scratch memory allocator. | ||
| 181 | */ | ||
| 182 | reserve_pda(); | ||
| 183 | return 0; | ||
| 184 | } | ||
| 185 | pure_initcall(sram_init); | ||
| 186 | |||
| 187 | static void __init free_init_pages(const char *what, unsigned long begin, unsigned long end) | 178 | static void __init free_init_pages(const char *what, unsigned long begin, unsigned long end) |
| 188 | { | 179 | { |
| 189 | unsigned long addr; | 180 | unsigned long addr; |
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c index 22913e7a1818..c080e70f98b0 100644 --- a/arch/blackfin/mm/isram-driver.c +++ b/arch/blackfin/mm/isram-driver.c | |||
| @@ -125,7 +125,7 @@ static bool isram_check_addr(const void *addr, size_t n) | |||
| 125 | { | 125 | { |
| 126 | if ((addr >= (void *)L1_CODE_START) && | 126 | if ((addr >= (void *)L1_CODE_START) && |
| 127 | (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) { | 127 | (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) { |
| 128 | if ((addr + n) >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) { | 128 | if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) { |
| 129 | show_stack(NULL, NULL); | 129 | show_stack(NULL, NULL); |
| 130 | printk(KERN_ERR "isram_memcpy: copy involving %p length " | 130 | printk(KERN_ERR "isram_memcpy: copy involving %p length " |
| 131 | "(%zu) too long\n", addr, n); | 131 | "(%zu) too long\n", addr, n); |
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c index 530d1393a232..0bc3c4ef0aad 100644 --- a/arch/blackfin/mm/sram-alloc.c +++ b/arch/blackfin/mm/sram-alloc.c | |||
| @@ -83,6 +83,14 @@ static struct kmem_cache *sram_piece_cache; | |||
| 83 | static void __init l1sram_init(void) | 83 | static void __init l1sram_init(void) |
| 84 | { | 84 | { |
| 85 | unsigned int cpu; | 85 | unsigned int cpu; |
| 86 | unsigned long reserve; | ||
| 87 | |||
| 88 | #ifdef CONFIG_SMP | ||
| 89 | reserve = 0; | ||
| 90 | #else | ||
| 91 | reserve = sizeof(struct l1_scratch_task_info); | ||
| 92 | #endif | ||
| 93 | |||
| 86 | for (cpu = 0; cpu < num_possible_cpus(); ++cpu) { | 94 | for (cpu = 0; cpu < num_possible_cpus(); ++cpu) { |
| 87 | per_cpu(free_l1_ssram_head, cpu).next = | 95 | per_cpu(free_l1_ssram_head, cpu).next = |
| 88 | kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); | 96 | kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); |
| @@ -91,8 +99,8 @@ static void __init l1sram_init(void) | |||
| 91 | return; | 99 | return; |
| 92 | } | 100 | } |
| 93 | 101 | ||
| 94 | per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu); | 102 | per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu) + reserve; |
| 95 | per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH; | 103 | per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH - reserve; |
| 96 | per_cpu(free_l1_ssram_head, cpu).next->pid = 0; | 104 | per_cpu(free_l1_ssram_head, cpu).next->pid = 0; |
| 97 | per_cpu(free_l1_ssram_head, cpu).next->next = NULL; | 105 | per_cpu(free_l1_ssram_head, cpu).next->next = NULL; |
| 98 | 106 | ||
| @@ -223,7 +231,7 @@ static void __init l2_sram_init(void) | |||
| 223 | spin_lock_init(&l2_sram_lock); | 231 | spin_lock_init(&l2_sram_lock); |
| 224 | } | 232 | } |
| 225 | 233 | ||
| 226 | void __init bfin_sram_init(void) | 234 | static int __init bfin_sram_init(void) |
| 227 | { | 235 | { |
| 228 | sram_piece_cache = kmem_cache_create("sram_piece_cache", | 236 | sram_piece_cache = kmem_cache_create("sram_piece_cache", |
| 229 | sizeof(struct sram_piece), | 237 | sizeof(struct sram_piece), |
| @@ -233,7 +241,10 @@ void __init bfin_sram_init(void) | |||
| 233 | l1_data_sram_init(); | 241 | l1_data_sram_init(); |
| 234 | l1_inst_sram_init(); | 242 | l1_inst_sram_init(); |
| 235 | l2_sram_init(); | 243 | l2_sram_init(); |
| 244 | |||
| 245 | return 0; | ||
| 236 | } | 246 | } |
| 247 | pure_initcall(bfin_sram_init); | ||
| 237 | 248 | ||
| 238 | /* SRAM allocate function */ | 249 | /* SRAM allocate function */ |
| 239 | static void *_sram_alloc(size_t size, struct sram_piece *pfree_head, | 250 | static void *_sram_alloc(size_t size, struct sram_piece *pfree_head, |
| @@ -732,6 +743,10 @@ found: | |||
| 732 | } | 743 | } |
| 733 | EXPORT_SYMBOL(sram_free_with_lsl); | 744 | EXPORT_SYMBOL(sram_free_with_lsl); |
| 734 | 745 | ||
| 746 | /* Allocate memory and keep in L1 SRAM List (lsl) so that the resources are | ||
| 747 | * tracked. These are designed for userspace so that when a process exits, | ||
| 748 | * we can safely reap their resources. | ||
| 749 | */ | ||
| 735 | void *sram_alloc_with_lsl(size_t size, unsigned long flags) | 750 | void *sram_alloc_with_lsl(size_t size, unsigned long flags) |
| 736 | { | 751 | { |
| 737 | void *addr = NULL; | 752 | void *addr = NULL; |
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 8cc312b5d4dc..b50b845fdd50 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig | |||
| @@ -6,6 +6,7 @@ mainmenu "Linux/Microblaze Kernel Configuration" | |||
| 6 | config MICROBLAZE | 6 | config MICROBLAZE |
| 7 | def_bool y | 7 | def_bool y |
| 8 | select HAVE_LMB | 8 | select HAVE_LMB |
| 9 | select ARCH_WANT_OPTIONAL_GPIOLIB | ||
| 9 | 10 | ||
| 10 | config SWAP | 11 | config SWAP |
| 11 | def_bool n | 12 | def_bool n |
| @@ -49,13 +50,14 @@ config GENERIC_CLOCKEVENTS | |||
| 49 | config GENERIC_HARDIRQS_NO__DO_IRQ | 50 | config GENERIC_HARDIRQS_NO__DO_IRQ |
| 50 | def_bool y | 51 | def_bool y |
| 51 | 52 | ||
| 53 | config GENERIC_GPIO | ||
| 54 | def_bool y | ||
| 55 | |||
| 52 | config PCI | 56 | config PCI |
| 53 | depends on !MMU | ||
| 54 | def_bool n | 57 | def_bool n |
| 55 | 58 | ||
| 56 | config NO_DMA | 59 | config NO_DMA |
| 57 | depends on !MMU | 60 | def_bool y |
| 58 | def_bool n | ||
| 59 | 61 | ||
| 60 | source "init/Kconfig" | 62 | source "init/Kconfig" |
| 61 | 63 | ||
| @@ -72,7 +74,8 @@ source "kernel/Kconfig.preempt" | |||
| 72 | source "kernel/Kconfig.hz" | 74 | source "kernel/Kconfig.hz" |
| 73 | 75 | ||
| 74 | config MMU | 76 | config MMU |
| 75 | def_bool n | 77 | bool "MMU support" |
| 78 | default n | ||
| 76 | 79 | ||
| 77 | config NO_MMU | 80 | config NO_MMU |
| 78 | bool | 81 | bool |
| @@ -105,9 +108,6 @@ config CMDLINE_FORCE | |||
| 105 | config OF | 108 | config OF |
| 106 | def_bool y | 109 | def_bool y |
| 107 | 110 | ||
| 108 | config OF_DEVICE | ||
| 109 | def_bool y | ||
| 110 | |||
| 111 | config PROC_DEVICETREE | 111 | config PROC_DEVICETREE |
| 112 | bool "Support for device tree in /proc" | 112 | bool "Support for device tree in /proc" |
| 113 | depends on PROC_FS | 113 | depends on PROC_FS |
| @@ -118,6 +118,113 @@ config PROC_DEVICETREE | |||
| 118 | 118 | ||
| 119 | endmenu | 119 | endmenu |
| 120 | 120 | ||
| 121 | menu "Advanced setup" | ||
| 122 | |||
| 123 | config ADVANCED_OPTIONS | ||
| 124 | bool "Prompt for advanced kernel configuration options" | ||
| 125 | depends on MMU | ||
| 126 | help | ||
| 127 | This option will enable prompting for a variety of advanced kernel | ||
| 128 | configuration options. These options can cause the kernel to not | ||
| 129 | work if they are set incorrectly, but can be used to optimize certain | ||
| 130 | aspects of kernel memory management. | ||
| 131 | |||
| 132 | Unless you know what you are doing, say N here. | ||
| 133 | |||
| 134 | comment "Default settings for advanced configuration options are used" | ||
| 135 | depends on !ADVANCED_OPTIONS | ||
| 136 | |||
| 137 | config HIGHMEM_START_BOOL | ||
| 138 | bool "Set high memory pool address" | ||
| 139 | depends on ADVANCED_OPTIONS && HIGHMEM | ||
| 140 | help | ||
| 141 | This option allows you to set the base address of the kernel virtual | ||
| 142 | area used to map high memory pages. This can be useful in | ||
| 143 | optimizing the layout of kernel virtual memory. | ||
| 144 | |||
| 145 | Say N here unless you know what you are doing. | ||
| 146 | |||
| 147 | config HIGHMEM_START | ||
| 148 | hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL | ||
| 149 | depends on MMU | ||
| 150 | default "0xfe000000" | ||
| 151 | |||
| 152 | config LOWMEM_SIZE_BOOL | ||
| 153 | bool "Set maximum low memory" | ||
| 154 | depends on ADVANCED_OPTIONS | ||
| 155 | help | ||
| 156 | This option allows you to set the maximum amount of memory which | ||
| 157 | will be used as "low memory", that is, memory which the kernel can | ||
| 158 | access directly, without having to set up a kernel virtual mapping. | ||
| 159 | This can be useful in optimizing the layout of kernel virtual | ||
| 160 | memory. | ||
| 161 | |||
| 162 | Say N here unless you know what you are doing. | ||
| 163 | |||
| 164 | config LOWMEM_SIZE | ||
| 165 | hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL | ||
| 166 | depends on MMU | ||
| 167 | default "0x30000000" | ||
| 168 | |||
| 169 | config KERNEL_START_BOOL | ||
| 170 | bool "Set custom kernel base address" | ||
| 171 | depends on ADVANCED_OPTIONS | ||
| 172 | help | ||
| 173 | This option allows you to set the kernel virtual address at which | ||
| 174 | the kernel will map low memory (the kernel image will be linked at | ||
| 175 | this address). This can be useful in optimizing the virtual memory | ||
| 176 | layout of the system. | ||
| 177 | |||
| 178 | Say N here unless you know what you are doing. | ||
| 179 | |||
| 180 | config KERNEL_START | ||
| 181 | hex "Virtual address of kernel base" if KERNEL_START_BOOL | ||
| 182 | default "0xc0000000" if MMU | ||
| 183 | default KERNEL_BASE_ADDR if !MMU | ||
| 184 | |||
| 185 | config TASK_SIZE_BOOL | ||
| 186 | bool "Set custom user task size" | ||
| 187 | depends on ADVANCED_OPTIONS | ||
| 188 | help | ||
| 189 | This option allows you to set the amount of virtual address space | ||
| 190 | allocated to user tasks. This can be useful in optimizing the | ||
| 191 | virtual memory layout of the system. | ||
| 192 | |||
| 193 | Say N here unless you know what you are doing. | ||
| 194 | |||
| 195 | config TASK_SIZE | ||
| 196 | hex "Size of user task space" if TASK_SIZE_BOOL | ||
| 197 | depends on MMU | ||
| 198 | default "0x80000000" | ||
| 199 | |||
| 200 | config CONSISTENT_START_BOOL | ||
| 201 | bool "Set custom consistent memory pool address" | ||
| 202 | depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE | ||
| 203 | help | ||
| 204 | This option allows you to set the base virtual address | ||
| 205 | of the the consistent memory pool. This pool of virtual | ||
| 206 | memory is used to make consistent memory allocations. | ||
| 207 | |||
| 208 | config CONSISTENT_START | ||
| 209 | hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL | ||
| 210 | depends on MMU | ||
| 211 | default "0xff100000" if NOT_COHERENT_CACHE | ||
| 212 | |||
| 213 | config CONSISTENT_SIZE_BOOL | ||
| 214 | bool "Set custom consistent memory pool size" | ||
| 215 | depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE | ||
| 216 | help | ||
| 217 | This option allows you to set the size of the the | ||
| 218 | consistent memory pool. This pool of virtual memory | ||
| 219 | is used to make consistent memory allocations. | ||
| 220 | |||
| 221 | config CONSISTENT_SIZE | ||
| 222 | hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL | ||
| 223 | depends on MMU | ||
| 224 | default "0x00200000" if NOT_COHERENT_CACHE | ||
| 225 | |||
| 226 | endmenu | ||
| 227 | |||
| 121 | source "mm/Kconfig" | 228 | source "mm/Kconfig" |
| 122 | 229 | ||
| 123 | menu "Exectuable file formats" | 230 | menu "Exectuable file formats" |
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile index aaadfa701da3..d0bcf80a1136 100644 --- a/arch/microblaze/Makefile +++ b/arch/microblaze/Makefile | |||
| @@ -1,4 +1,8 @@ | |||
| 1 | ifeq ($(CONFIG_MMU),y) | ||
| 2 | UTS_SYSNAME = -DUTS_SYSNAME=\"Linux\" | ||
| 3 | else | ||
| 1 | UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\" | 4 | UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\" |
| 5 | endif | ||
| 2 | 6 | ||
| 3 | # What CPU vesion are we building for, and crack it open | 7 | # What CPU vesion are we building for, and crack it open |
| 4 | # as major.minor.rev | 8 | # as major.minor.rev |
| @@ -36,6 +40,8 @@ CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER)) | |||
| 36 | # r31 holds current when in kernel mode | 40 | # r31 holds current when in kernel mode |
| 37 | CFLAGS_KERNEL += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2) | 41 | CFLAGS_KERNEL += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2) |
| 38 | 42 | ||
| 43 | LDFLAGS := | ||
| 44 | LDFLAGS_vmlinux := | ||
| 39 | LDFLAGS_BLOB := --format binary --oformat elf32-microblaze | 45 | LDFLAGS_BLOB := --format binary --oformat elf32-microblaze |
| 40 | 46 | ||
| 41 | LIBGCC := $(shell $(CC) $(CFLAGS_KERNEL) -print-libgcc-file-name) | 47 | LIBGCC := $(shell $(CC) $(CFLAGS_KERNEL) -print-libgcc-file-name) |
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile index 844edf406d34..c2bb043a029d 100644 --- a/arch/microblaze/boot/Makefile +++ b/arch/microblaze/boot/Makefile | |||
| @@ -7,6 +7,8 @@ targets := linux.bin linux.bin.gz | |||
| 7 | OBJCOPYFLAGS_linux.bin := -O binary | 7 | OBJCOPYFLAGS_linux.bin := -O binary |
| 8 | 8 | ||
| 9 | $(obj)/linux.bin: vmlinux FORCE | 9 | $(obj)/linux.bin: vmlinux FORCE |
| 10 | [ -n $(CONFIG_INITRAMFS_SOURCE) ] && [ ! -e $(CONFIG_INITRAMFS_SOURCE) ] && \ | ||
| 11 | touch $(CONFIG_INITRAMFS_SOURCE) || echo "No CPIO image" | ||
| 10 | $(call if_changed,objcopy) | 12 | $(call if_changed,objcopy) |
| 11 | @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' | 13 | @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' |
| 12 | 14 | ||
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig new file mode 100644 index 000000000000..bd0b85ec38f5 --- /dev/null +++ b/arch/microblaze/configs/mmu_defconfig | |||
| @@ -0,0 +1,798 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.30-rc6 | ||
| 4 | # Fri May 22 10:02:33 2009 | ||
| 5 | # | ||
| 6 | CONFIG_MICROBLAZE=y | ||
| 7 | # CONFIG_SWAP is not set | ||
| 8 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 9 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 10 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 11 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 12 | CONFIG_GENERIC_HWEIGHT=y | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 15 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 16 | CONFIG_GENERIC_TIME=y | ||
| 17 | # CONFIG_GENERIC_TIME_VSYSCALL is not set | ||
| 18 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 19 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 20 | CONFIG_GENERIC_GPIO=y | ||
| 21 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 22 | |||
| 23 | # | ||
| 24 | # General setup | ||
| 25 | # | ||
| 26 | CONFIG_EXPERIMENTAL=y | ||
| 27 | CONFIG_BROKEN_ON_SMP=y | ||
| 28 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 29 | CONFIG_LOCALVERSION="" | ||
| 30 | CONFIG_LOCALVERSION_AUTO=y | ||
| 31 | CONFIG_SYSVIPC=y | ||
| 32 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 33 | # CONFIG_POSIX_MQUEUE is not set | ||
| 34 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 35 | # CONFIG_TASKSTATS is not set | ||
| 36 | # CONFIG_AUDIT is not set | ||
| 37 | |||
| 38 | # | ||
| 39 | # RCU Subsystem | ||
| 40 | # | ||
| 41 | CONFIG_CLASSIC_RCU=y | ||
| 42 | # CONFIG_TREE_RCU is not set | ||
| 43 | # CONFIG_PREEMPT_RCU is not set | ||
| 44 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 45 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 46 | CONFIG_IKCONFIG=y | ||
| 47 | CONFIG_IKCONFIG_PROC=y | ||
| 48 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 49 | # CONFIG_GROUP_SCHED is not set | ||
| 50 | # CONFIG_CGROUPS is not set | ||
| 51 | CONFIG_SYSFS_DEPRECATED=y | ||
| 52 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 53 | # CONFIG_RELAY is not set | ||
| 54 | # CONFIG_NAMESPACES is not set | ||
| 55 | CONFIG_BLK_DEV_INITRD=y | ||
| 56 | CONFIG_INITRAMFS_SOURCE="rootfs.cpio" | ||
| 57 | CONFIG_INITRAMFS_ROOT_UID=0 | ||
| 58 | CONFIG_INITRAMFS_ROOT_GID=0 | ||
| 59 | CONFIG_RD_GZIP=y | ||
| 60 | # CONFIG_RD_BZIP2 is not set | ||
| 61 | # CONFIG_RD_LZMA is not set | ||
| 62 | CONFIG_INITRAMFS_COMPRESSION_NONE=y | ||
| 63 | # CONFIG_INITRAMFS_COMPRESSION_GZIP is not set | ||
| 64 | # CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set | ||
| 65 | # CONFIG_INITRAMFS_COMPRESSION_LZMA is not set | ||
| 66 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 67 | CONFIG_SYSCTL=y | ||
| 68 | CONFIG_ANON_INODES=y | ||
| 69 | CONFIG_EMBEDDED=y | ||
| 70 | CONFIG_SYSCTL_SYSCALL=y | ||
| 71 | CONFIG_KALLSYMS=y | ||
| 72 | CONFIG_KALLSYMS_ALL=y | ||
| 73 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
| 74 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 75 | # CONFIG_HOTPLUG is not set | ||
| 76 | CONFIG_PRINTK=y | ||
| 77 | CONFIG_BUG=y | ||
| 78 | CONFIG_ELF_CORE=y | ||
| 79 | # CONFIG_BASE_FULL is not set | ||
| 80 | # CONFIG_FUTEX is not set | ||
| 81 | # CONFIG_EPOLL is not set | ||
| 82 | # CONFIG_SIGNALFD is not set | ||
| 83 | CONFIG_TIMERFD=y | ||
| 84 | CONFIG_EVENTFD=y | ||
| 85 | # CONFIG_SHMEM is not set | ||
| 86 | CONFIG_AIO=y | ||
| 87 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 88 | CONFIG_COMPAT_BRK=y | ||
| 89 | CONFIG_SLAB=y | ||
| 90 | # CONFIG_SLUB is not set | ||
| 91 | # CONFIG_SLOB is not set | ||
| 92 | # CONFIG_PROFILING is not set | ||
| 93 | # CONFIG_MARKERS is not set | ||
| 94 | # CONFIG_SLOW_WORK is not set | ||
| 95 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
| 96 | CONFIG_SLABINFO=y | ||
| 97 | CONFIG_BASE_SMALL=1 | ||
| 98 | CONFIG_MODULES=y | ||
| 99 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 100 | CONFIG_MODULE_UNLOAD=y | ||
| 101 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 102 | # CONFIG_MODVERSIONS is not set | ||
| 103 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 104 | CONFIG_BLOCK=y | ||
| 105 | # CONFIG_LBD is not set | ||
| 106 | # CONFIG_BLK_DEV_BSG is not set | ||
| 107 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 108 | |||
| 109 | # | ||
| 110 | # IO Schedulers | ||
| 111 | # | ||
| 112 | CONFIG_IOSCHED_NOOP=y | ||
| 113 | CONFIG_IOSCHED_AS=y | ||
| 114 | CONFIG_IOSCHED_DEADLINE=y | ||
| 115 | CONFIG_IOSCHED_CFQ=y | ||
| 116 | # CONFIG_DEFAULT_AS is not set | ||
| 117 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 118 | CONFIG_DEFAULT_CFQ=y | ||
| 119 | # CONFIG_DEFAULT_NOOP is not set | ||
| 120 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 121 | # CONFIG_FREEZER is not set | ||
| 122 | |||
| 123 | # | ||
| 124 | # Platform options | ||
| 125 | # | ||
| 126 | CONFIG_PLATFORM_GENERIC=y | ||
| 127 | CONFIG_OPT_LIB_FUNCTION=y | ||
| 128 | CONFIG_OPT_LIB_ASM=y | ||
| 129 | CONFIG_ALLOW_EDIT_AUTO=y | ||
| 130 | |||
| 131 | # | ||
| 132 | # Automatic platform settings from Kconfig.auto | ||
| 133 | # | ||
| 134 | |||
| 135 | # | ||
| 136 | # Definitions for MICROBLAZE0 | ||
| 137 | # | ||
| 138 | CONFIG_KERNEL_BASE_ADDR=0x90000000 | ||
| 139 | CONFIG_XILINX_MICROBLAZE0_FAMILY="virtex5" | ||
| 140 | CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 | ||
| 141 | CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1 | ||
| 142 | CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 | ||
| 143 | CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 | ||
| 144 | CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2 | ||
| 145 | CONFIG_XILINX_MICROBLAZE0_USE_FPU=2 | ||
| 146 | CONFIG_XILINX_MICROBLAZE0_HW_VER="7.10.d" | ||
| 147 | |||
| 148 | # | ||
| 149 | # Processor type and features | ||
| 150 | # | ||
| 151 | # CONFIG_NO_HZ is not set | ||
| 152 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 153 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 154 | CONFIG_PREEMPT_NONE=y | ||
| 155 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 156 | # CONFIG_PREEMPT is not set | ||
| 157 | CONFIG_HZ_100=y | ||
| 158 | # CONFIG_HZ_250 is not set | ||
| 159 | # CONFIG_HZ_300 is not set | ||
| 160 | # CONFIG_HZ_1000 is not set | ||
| 161 | CONFIG_HZ=100 | ||
| 162 | # CONFIG_SCHED_HRTICK is not set | ||
| 163 | CONFIG_MMU=y | ||
| 164 | |||
| 165 | # | ||
| 166 | # Boot options | ||
| 167 | # | ||
| 168 | CONFIG_CMDLINE_BOOL=y | ||
| 169 | CONFIG_CMDLINE="console=ttyUL0,115200" | ||
| 170 | CONFIG_CMDLINE_FORCE=y | ||
| 171 | CONFIG_OF=y | ||
| 172 | CONFIG_PROC_DEVICETREE=y | ||
| 173 | |||
| 174 | # | ||
| 175 | # Advanced setup | ||
| 176 | # | ||
| 177 | # CONFIG_ADVANCED_OPTIONS is not set | ||
| 178 | |||
| 179 | # | ||
| 180 | # Default settings for advanced configuration options are used | ||
| 181 | # | ||
| 182 | CONFIG_HIGHMEM_START=0xfe000000 | ||
| 183 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
| 184 | CONFIG_KERNEL_START=0xc0000000 | ||
| 185 | CONFIG_TASK_SIZE=0x80000000 | ||
| 186 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 187 | CONFIG_FLATMEM_MANUAL=y | ||
| 188 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 189 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 190 | CONFIG_FLATMEM=y | ||
| 191 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 192 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 193 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 194 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 195 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 196 | CONFIG_VIRT_TO_BUS=y | ||
| 197 | CONFIG_UNEVICTABLE_LRU=y | ||
| 198 | CONFIG_HAVE_MLOCK=y | ||
| 199 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 200 | |||
| 201 | # | ||
| 202 | # Exectuable file formats | ||
| 203 | # | ||
| 204 | CONFIG_BINFMT_ELF=y | ||
| 205 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 206 | # CONFIG_HAVE_AOUT is not set | ||
| 207 | # CONFIG_BINFMT_MISC is not set | ||
| 208 | CONFIG_NET=y | ||
| 209 | |||
| 210 | # | ||
| 211 | # Networking options | ||
| 212 | # | ||
| 213 | CONFIG_PACKET=y | ||
| 214 | # CONFIG_PACKET_MMAP is not set | ||
| 215 | CONFIG_UNIX=y | ||
| 216 | CONFIG_XFRM=y | ||
| 217 | # CONFIG_XFRM_USER is not set | ||
| 218 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 219 | # CONFIG_XFRM_MIGRATE is not set | ||
| 220 | # CONFIG_XFRM_STATISTICS is not set | ||
| 221 | # CONFIG_NET_KEY is not set | ||
| 222 | CONFIG_INET=y | ||
| 223 | # CONFIG_IP_MULTICAST is not set | ||
| 224 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 225 | CONFIG_IP_FIB_HASH=y | ||
| 226 | # CONFIG_IP_PNP is not set | ||
| 227 | # CONFIG_NET_IPIP is not set | ||
| 228 | # CONFIG_NET_IPGRE is not set | ||
| 229 | # CONFIG_ARPD is not set | ||
| 230 | # CONFIG_SYN_COOKIES is not set | ||
| 231 | # CONFIG_INET_AH is not set | ||
| 232 | # CONFIG_INET_ESP is not set | ||
| 233 | # CONFIG_INET_IPCOMP is not set | ||
| 234 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 235 | # CONFIG_INET_TUNNEL is not set | ||
| 236 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 237 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 238 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 239 | # CONFIG_INET_LRO is not set | ||
| 240 | CONFIG_INET_DIAG=y | ||
| 241 | CONFIG_INET_TCP_DIAG=y | ||
| 242 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 243 | CONFIG_TCP_CONG_CUBIC=y | ||
| 244 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 245 | # CONFIG_TCP_MD5SIG is not set | ||
| 246 | # CONFIG_IPV6 is not set | ||
| 247 | # CONFIG_NETWORK_SECMARK is not set | ||
| 248 | # CONFIG_NETFILTER is not set | ||
| 249 | # CONFIG_IP_DCCP is not set | ||
| 250 | # CONFIG_IP_SCTP is not set | ||
| 251 | # CONFIG_TIPC is not set | ||
| 252 | # CONFIG_ATM is not set | ||
| 253 | # CONFIG_BRIDGE is not set | ||
| 254 | # CONFIG_NET_DSA is not set | ||
| 255 | # CONFIG_VLAN_8021Q is not set | ||
| 256 | # CONFIG_DECNET is not set | ||
| 257 | # CONFIG_LLC2 is not set | ||
| 258 | # CONFIG_IPX is not set | ||
| 259 | # CONFIG_ATALK is not set | ||
| 260 | # CONFIG_X25 is not set | ||
| 261 | # CONFIG_LAPB is not set | ||
| 262 | # CONFIG_ECONET is not set | ||
| 263 | # CONFIG_WAN_ROUTER is not set | ||
| 264 | # CONFIG_PHONET is not set | ||
| 265 | # CONFIG_NET_SCHED is not set | ||
| 266 | # CONFIG_DCB is not set | ||
| 267 | |||
| 268 | # | ||
| 269 | # Network testing | ||
| 270 | # | ||
| 271 | # CONFIG_NET_PKTGEN is not set | ||
| 272 | # CONFIG_HAMRADIO is not set | ||
| 273 | # CONFIG_CAN is not set | ||
| 274 | # CONFIG_IRDA is not set | ||
| 275 | # CONFIG_BT is not set | ||
| 276 | # CONFIG_AF_RXRPC is not set | ||
| 277 | # CONFIG_WIRELESS is not set | ||
| 278 | # CONFIG_WIMAX is not set | ||
| 279 | # CONFIG_RFKILL is not set | ||
| 280 | # CONFIG_NET_9P is not set | ||
| 281 | |||
| 282 | # | ||
| 283 | # Device Drivers | ||
| 284 | # | ||
| 285 | |||
| 286 | # | ||
| 287 | # Generic Driver Options | ||
| 288 | # | ||
| 289 | CONFIG_STANDALONE=y | ||
| 290 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 291 | # CONFIG_DEBUG_DRIVER is not set | ||
| 292 | # CONFIG_DEBUG_DEVRES is not set | ||
| 293 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 294 | # CONFIG_CONNECTOR is not set | ||
| 295 | # CONFIG_MTD is not set | ||
| 296 | CONFIG_OF_DEVICE=y | ||
| 297 | # CONFIG_PARPORT is not set | ||
| 298 | CONFIG_BLK_DEV=y | ||
| 299 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 300 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 301 | # CONFIG_BLK_DEV_NBD is not set | ||
| 302 | CONFIG_BLK_DEV_RAM=y | ||
| 303 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 304 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
| 305 | # CONFIG_BLK_DEV_XIP is not set | ||
| 306 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 307 | # CONFIG_ATA_OVER_ETH is not set | ||
| 308 | # CONFIG_XILINX_SYSACE is not set | ||
| 309 | CONFIG_MISC_DEVICES=y | ||
| 310 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 311 | # CONFIG_C2PORT is not set | ||
| 312 | |||
| 313 | # | ||
| 314 | # EEPROM support | ||
| 315 | # | ||
| 316 | # CONFIG_EEPROM_93CX6 is not set | ||
| 317 | |||
| 318 | # | ||
| 319 | # SCSI device support | ||
| 320 | # | ||
| 321 | # CONFIG_RAID_ATTRS is not set | ||
| 322 | # CONFIG_SCSI is not set | ||
| 323 | # CONFIG_SCSI_DMA is not set | ||
| 324 | # CONFIG_SCSI_NETLINK is not set | ||
| 325 | # CONFIG_ATA is not set | ||
| 326 | # CONFIG_MD is not set | ||
| 327 | CONFIG_NETDEVICES=y | ||
| 328 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 329 | # CONFIG_DUMMY is not set | ||
| 330 | # CONFIG_BONDING is not set | ||
| 331 | # CONFIG_MACVLAN is not set | ||
| 332 | # CONFIG_EQUALIZER is not set | ||
| 333 | # CONFIG_TUN is not set | ||
| 334 | # CONFIG_VETH is not set | ||
| 335 | # CONFIG_PHYLIB is not set | ||
| 336 | CONFIG_NET_ETHERNET=y | ||
| 337 | # CONFIG_MII is not set | ||
| 338 | # CONFIG_ETHOC is not set | ||
| 339 | # CONFIG_DNET is not set | ||
| 340 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 341 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 342 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 343 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 344 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 345 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 346 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 347 | # CONFIG_B44 is not set | ||
| 348 | CONFIG_NETDEV_1000=y | ||
| 349 | CONFIG_NETDEV_10000=y | ||
| 350 | |||
| 351 | # | ||
| 352 | # Wireless LAN | ||
| 353 | # | ||
| 354 | # CONFIG_WLAN_PRE80211 is not set | ||
| 355 | # CONFIG_WLAN_80211 is not set | ||
| 356 | |||
| 357 | # | ||
| 358 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 359 | # | ||
| 360 | # CONFIG_WAN is not set | ||
| 361 | # CONFIG_PPP is not set | ||
| 362 | # CONFIG_SLIP is not set | ||
| 363 | # CONFIG_NETCONSOLE is not set | ||
| 364 | # CONFIG_NETPOLL is not set | ||
| 365 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 366 | # CONFIG_ISDN is not set | ||
| 367 | # CONFIG_PHONE is not set | ||
| 368 | |||
| 369 | # | ||
| 370 | # Input device support | ||
| 371 | # | ||
| 372 | # CONFIG_INPUT is not set | ||
| 373 | |||
| 374 | # | ||
| 375 | # Hardware I/O ports | ||
| 376 | # | ||
| 377 | # CONFIG_SERIO is not set | ||
| 378 | # CONFIG_GAMEPORT is not set | ||
| 379 | |||
| 380 | # | ||
| 381 | # Character devices | ||
| 382 | # | ||
| 383 | # CONFIG_VT is not set | ||
| 384 | CONFIG_DEVKMEM=y | ||
| 385 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 386 | |||
| 387 | # | ||
| 388 | # Serial drivers | ||
| 389 | # | ||
| 390 | # CONFIG_SERIAL_8250 is not set | ||
| 391 | |||
| 392 | # | ||
| 393 | # Non-8250 serial port support | ||
| 394 | # | ||
| 395 | CONFIG_SERIAL_UARTLITE=y | ||
| 396 | CONFIG_SERIAL_UARTLITE_CONSOLE=y | ||
| 397 | CONFIG_SERIAL_CORE=y | ||
| 398 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 399 | CONFIG_UNIX98_PTYS=y | ||
| 400 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 401 | CONFIG_LEGACY_PTYS=y | ||
| 402 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 403 | # CONFIG_IPMI_HANDLER is not set | ||
| 404 | # CONFIG_HW_RANDOM is not set | ||
| 405 | # CONFIG_RTC is not set | ||
| 406 | # CONFIG_GEN_RTC is not set | ||
| 407 | # CONFIG_XILINX_HWICAP is not set | ||
| 408 | # CONFIG_R3964 is not set | ||
| 409 | # CONFIG_RAW_DRIVER is not set | ||
| 410 | # CONFIG_TCG_TPM is not set | ||
| 411 | # CONFIG_I2C is not set | ||
| 412 | # CONFIG_SPI is not set | ||
| 413 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
| 414 | # CONFIG_GPIOLIB is not set | ||
| 415 | # CONFIG_W1 is not set | ||
| 416 | # CONFIG_POWER_SUPPLY is not set | ||
| 417 | # CONFIG_HWMON is not set | ||
| 418 | # CONFIG_THERMAL is not set | ||
| 419 | # CONFIG_THERMAL_HWMON is not set | ||
| 420 | # CONFIG_WATCHDOG is not set | ||
| 421 | CONFIG_SSB_POSSIBLE=y | ||
| 422 | |||
| 423 | # | ||
| 424 | # Sonics Silicon Backplane | ||
| 425 | # | ||
| 426 | # CONFIG_SSB is not set | ||
| 427 | |||
| 428 | # | ||
| 429 | # Multifunction device drivers | ||
| 430 | # | ||
| 431 | # CONFIG_MFD_CORE is not set | ||
| 432 | # CONFIG_MFD_SM501 is not set | ||
| 433 | # CONFIG_HTC_PASIC3 is not set | ||
| 434 | # CONFIG_MFD_TMIO is not set | ||
| 435 | # CONFIG_REGULATOR is not set | ||
| 436 | |||
| 437 | # | ||
| 438 | # Multimedia devices | ||
| 439 | # | ||
| 440 | |||
| 441 | # | ||
| 442 | # Multimedia core support | ||
| 443 | # | ||
| 444 | # CONFIG_VIDEO_DEV is not set | ||
| 445 | # CONFIG_DVB_CORE is not set | ||
| 446 | # CONFIG_VIDEO_MEDIA is not set | ||
| 447 | |||
| 448 | # | ||
| 449 | # Multimedia drivers | ||
| 450 | # | ||
| 451 | # CONFIG_DAB is not set | ||
| 452 | |||
| 453 | # | ||
| 454 | # Graphics support | ||
| 455 | # | ||
| 456 | # CONFIG_VGASTATE is not set | ||
| 457 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 458 | # CONFIG_FB is not set | ||
| 459 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 460 | |||
| 461 | # | ||
| 462 | # Display device support | ||
| 463 | # | ||
| 464 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 465 | # CONFIG_SOUND is not set | ||
| 466 | # CONFIG_USB_SUPPORT is not set | ||
| 467 | # CONFIG_MMC is not set | ||
| 468 | # CONFIG_MEMSTICK is not set | ||
| 469 | # CONFIG_NEW_LEDS is not set | ||
| 470 | # CONFIG_ACCESSIBILITY is not set | ||
| 471 | # CONFIG_RTC_CLASS is not set | ||
| 472 | # CONFIG_DMADEVICES is not set | ||
| 473 | # CONFIG_AUXDISPLAY is not set | ||
| 474 | # CONFIG_UIO is not set | ||
| 475 | # CONFIG_STAGING is not set | ||
| 476 | |||
| 477 | # | ||
| 478 | # File systems | ||
| 479 | # | ||
| 480 | CONFIG_EXT2_FS=y | ||
| 481 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 482 | # CONFIG_EXT2_FS_XIP is not set | ||
| 483 | # CONFIG_EXT3_FS is not set | ||
| 484 | # CONFIG_EXT4_FS is not set | ||
| 485 | # CONFIG_REISERFS_FS is not set | ||
| 486 | # CONFIG_JFS_FS is not set | ||
| 487 | # CONFIG_FS_POSIX_ACL is not set | ||
| 488 | CONFIG_FILE_LOCKING=y | ||
| 489 | # CONFIG_XFS_FS is not set | ||
| 490 | # CONFIG_OCFS2_FS is not set | ||
| 491 | # CONFIG_BTRFS_FS is not set | ||
| 492 | # CONFIG_DNOTIFY is not set | ||
| 493 | # CONFIG_INOTIFY is not set | ||
| 494 | # CONFIG_QUOTA is not set | ||
| 495 | # CONFIG_AUTOFS_FS is not set | ||
| 496 | # CONFIG_AUTOFS4_FS is not set | ||
| 497 | # CONFIG_FUSE_FS is not set | ||
| 498 | |||
| 499 | # | ||
| 500 | # Caches | ||
| 501 | # | ||
| 502 | # CONFIG_FSCACHE is not set | ||
| 503 | |||
| 504 | # | ||
| 505 | # CD-ROM/DVD Filesystems | ||
| 506 | # | ||
| 507 | # CONFIG_ISO9660_FS is not set | ||
| 508 | # CONFIG_UDF_FS is not set | ||
| 509 | |||
| 510 | # | ||
| 511 | # DOS/FAT/NT Filesystems | ||
| 512 | # | ||
| 513 | # CONFIG_MSDOS_FS is not set | ||
| 514 | # CONFIG_VFAT_FS is not set | ||
| 515 | # CONFIG_NTFS_FS is not set | ||
| 516 | |||
| 517 | # | ||
| 518 | # Pseudo filesystems | ||
| 519 | # | ||
| 520 | CONFIG_PROC_FS=y | ||
| 521 | # CONFIG_PROC_KCORE is not set | ||
| 522 | CONFIG_PROC_SYSCTL=y | ||
| 523 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 524 | CONFIG_SYSFS=y | ||
| 525 | CONFIG_TMPFS=y | ||
| 526 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 527 | # CONFIG_HUGETLB_PAGE is not set | ||
| 528 | # CONFIG_CONFIGFS_FS is not set | ||
| 529 | CONFIG_MISC_FILESYSTEMS=y | ||
| 530 | # CONFIG_ADFS_FS is not set | ||
| 531 | # CONFIG_AFFS_FS is not set | ||
| 532 | # CONFIG_HFS_FS is not set | ||
| 533 | # CONFIG_HFSPLUS_FS is not set | ||
| 534 | # CONFIG_BEFS_FS is not set | ||
| 535 | # CONFIG_BFS_FS is not set | ||
| 536 | # CONFIG_EFS_FS is not set | ||
| 537 | # CONFIG_CRAMFS is not set | ||
| 538 | # CONFIG_SQUASHFS is not set | ||
| 539 | # CONFIG_VXFS_FS is not set | ||
| 540 | # CONFIG_MINIX_FS is not set | ||
| 541 | # CONFIG_OMFS_FS is not set | ||
| 542 | # CONFIG_HPFS_FS is not set | ||
| 543 | # CONFIG_QNX4FS_FS is not set | ||
| 544 | # CONFIG_ROMFS_FS is not set | ||
| 545 | # CONFIG_SYSV_FS is not set | ||
| 546 | # CONFIG_UFS_FS is not set | ||
| 547 | # CONFIG_NILFS2_FS is not set | ||
| 548 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 549 | CONFIG_NFS_FS=y | ||
| 550 | CONFIG_NFS_V3=y | ||
| 551 | # CONFIG_NFS_V3_ACL is not set | ||
| 552 | # CONFIG_NFS_V4 is not set | ||
| 553 | # CONFIG_NFSD is not set | ||
| 554 | CONFIG_LOCKD=y | ||
| 555 | CONFIG_LOCKD_V4=y | ||
| 556 | CONFIG_NFS_COMMON=y | ||
| 557 | CONFIG_SUNRPC=y | ||
| 558 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 559 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 560 | # CONFIG_SMB_FS is not set | ||
| 561 | CONFIG_CIFS=y | ||
| 562 | CONFIG_CIFS_STATS=y | ||
| 563 | CONFIG_CIFS_STATS2=y | ||
| 564 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
| 565 | # CONFIG_CIFS_XATTR is not set | ||
| 566 | # CONFIG_CIFS_DEBUG2 is not set | ||
| 567 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
| 568 | # CONFIG_NCP_FS is not set | ||
| 569 | # CONFIG_CODA_FS is not set | ||
| 570 | # CONFIG_AFS_FS is not set | ||
| 571 | |||
| 572 | # | ||
| 573 | # Partition Types | ||
| 574 | # | ||
| 575 | CONFIG_PARTITION_ADVANCED=y | ||
| 576 | # CONFIG_ACORN_PARTITION is not set | ||
| 577 | # CONFIG_OSF_PARTITION is not set | ||
| 578 | # CONFIG_AMIGA_PARTITION is not set | ||
| 579 | # CONFIG_ATARI_PARTITION is not set | ||
| 580 | # CONFIG_MAC_PARTITION is not set | ||
| 581 | CONFIG_MSDOS_PARTITION=y | ||
| 582 | # CONFIG_BSD_DISKLABEL is not set | ||
| 583 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 584 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 585 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 586 | # CONFIG_LDM_PARTITION is not set | ||
| 587 | # CONFIG_SGI_PARTITION is not set | ||
| 588 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 589 | # CONFIG_SUN_PARTITION is not set | ||
| 590 | # CONFIG_KARMA_PARTITION is not set | ||
| 591 | # CONFIG_EFI_PARTITION is not set | ||
| 592 | # CONFIG_SYSV68_PARTITION is not set | ||
| 593 | CONFIG_NLS=y | ||
| 594 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 595 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 596 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 597 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 598 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 599 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 600 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 601 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 602 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 603 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 604 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 605 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 606 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 607 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 608 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 609 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 610 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 611 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 612 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 613 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 614 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 615 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 616 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 617 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 618 | # CONFIG_NLS_ASCII is not set | ||
| 619 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 620 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 621 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 622 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 623 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 624 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 625 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 626 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 627 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 628 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 629 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 630 | # CONFIG_NLS_KOI8_R is not set | ||
| 631 | # CONFIG_NLS_KOI8_U is not set | ||
| 632 | # CONFIG_NLS_UTF8 is not set | ||
| 633 | # CONFIG_DLM is not set | ||
| 634 | |||
| 635 | # | ||
| 636 | # Kernel hacking | ||
| 637 | # | ||
| 638 | # CONFIG_PRINTK_TIME is not set | ||
| 639 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 640 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 641 | CONFIG_FRAME_WARN=1024 | ||
| 642 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 643 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 644 | # CONFIG_DEBUG_FS is not set | ||
| 645 | # CONFIG_HEADERS_CHECK is not set | ||
| 646 | CONFIG_DEBUG_KERNEL=y | ||
| 647 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 648 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 649 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 650 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 651 | CONFIG_DETECT_HUNG_TASK=y | ||
| 652 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 653 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 654 | CONFIG_SCHED_DEBUG=y | ||
| 655 | # CONFIG_SCHEDSTATS is not set | ||
| 656 | # CONFIG_TIMER_STATS is not set | ||
| 657 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 658 | CONFIG_DEBUG_SLAB=y | ||
| 659 | # CONFIG_DEBUG_SLAB_LEAK is not set | ||
| 660 | CONFIG_DEBUG_SPINLOCK=y | ||
| 661 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 662 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 663 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 664 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 665 | CONFIG_DEBUG_INFO=y | ||
| 666 | # CONFIG_DEBUG_VM is not set | ||
| 667 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 668 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 669 | # CONFIG_DEBUG_LIST is not set | ||
| 670 | # CONFIG_DEBUG_SG is not set | ||
| 671 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 672 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 673 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 674 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 675 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 676 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 677 | # CONFIG_FAULT_INJECTION is not set | ||
| 678 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 679 | # CONFIG_PAGE_POISONING is not set | ||
| 680 | # CONFIG_SAMPLES is not set | ||
| 681 | CONFIG_EARLY_PRINTK=y | ||
| 682 | CONFIG_HEART_BEAT=y | ||
| 683 | CONFIG_DEBUG_BOOTMEM=y | ||
| 684 | |||
| 685 | # | ||
| 686 | # Security options | ||
| 687 | # | ||
| 688 | # CONFIG_KEYS is not set | ||
| 689 | # CONFIG_SECURITY is not set | ||
| 690 | # CONFIG_SECURITYFS is not set | ||
| 691 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 692 | CONFIG_CRYPTO=y | ||
| 693 | |||
| 694 | # | ||
| 695 | # Crypto core or helper | ||
| 696 | # | ||
| 697 | # CONFIG_CRYPTO_FIPS is not set | ||
| 698 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 699 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 700 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 701 | # CONFIG_CRYPTO_NULL is not set | ||
| 702 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 703 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 704 | # CONFIG_CRYPTO_TEST is not set | ||
| 705 | |||
| 706 | # | ||
| 707 | # Authenticated Encryption with Associated Data | ||
| 708 | # | ||
| 709 | # CONFIG_CRYPTO_CCM is not set | ||
| 710 | # CONFIG_CRYPTO_GCM is not set | ||
| 711 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 712 | |||
| 713 | # | ||
| 714 | # Block modes | ||
| 715 | # | ||
| 716 | # CONFIG_CRYPTO_CBC is not set | ||
| 717 | # CONFIG_CRYPTO_CTR is not set | ||
| 718 | # CONFIG_CRYPTO_CTS is not set | ||
| 719 | # CONFIG_CRYPTO_ECB is not set | ||
| 720 | # CONFIG_CRYPTO_LRW is not set | ||
| 721 | # CONFIG_CRYPTO_PCBC is not set | ||
| 722 | # CONFIG_CRYPTO_XTS is not set | ||
| 723 | |||
| 724 | # | ||
| 725 | # Hash modes | ||
| 726 | # | ||
| 727 | # CONFIG_CRYPTO_HMAC is not set | ||
| 728 | # CONFIG_CRYPTO_XCBC is not set | ||
| 729 | |||
| 730 | # | ||
| 731 | # Digest | ||
| 732 | # | ||
| 733 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 734 | # CONFIG_CRYPTO_MD4 is not set | ||
| 735 | # CONFIG_CRYPTO_MD5 is not set | ||
| 736 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 737 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 738 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 739 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 740 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 741 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 742 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 743 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 744 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 745 | # CONFIG_CRYPTO_WP512 is not set | ||
| 746 | |||
| 747 | # | ||
| 748 | # Ciphers | ||
| 749 | # | ||
| 750 | # CONFIG_CRYPTO_AES is not set | ||
| 751 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 752 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 753 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 754 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 755 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 756 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 757 | # CONFIG_CRYPTO_DES is not set | ||
| 758 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 759 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 760 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 761 | # CONFIG_CRYPTO_SEED is not set | ||
| 762 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 763 | # CONFIG_CRYPTO_TEA is not set | ||
| 764 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 765 | |||
| 766 | # | ||
| 767 | # Compression | ||
| 768 | # | ||
| 769 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 770 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 771 | # CONFIG_CRYPTO_LZO is not set | ||
| 772 | |||
| 773 | # | ||
| 774 | # Random Number Generation | ||
| 775 | # | ||
| 776 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 777 | CONFIG_CRYPTO_HW=y | ||
| 778 | # CONFIG_BINARY_PRINTF is not set | ||
| 779 | |||
| 780 | # | ||
| 781 | # Library routines | ||
| 782 | # | ||
| 783 | CONFIG_BITREVERSE=y | ||
| 784 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 785 | # CONFIG_CRC_CCITT is not set | ||
| 786 | # CONFIG_CRC16 is not set | ||
| 787 | # CONFIG_CRC_T10DIF is not set | ||
| 788 | # CONFIG_CRC_ITU_T is not set | ||
| 789 | CONFIG_CRC32=y | ||
| 790 | # CONFIG_CRC7 is not set | ||
| 791 | # CONFIG_LIBCRC32C is not set | ||
| 792 | CONFIG_ZLIB_INFLATE=y | ||
| 793 | CONFIG_DECOMPRESS_GZIP=y | ||
| 794 | CONFIG_HAS_IOMEM=y | ||
| 795 | CONFIG_HAS_IOPORT=y | ||
| 796 | CONFIG_HAS_DMA=y | ||
| 797 | CONFIG_HAVE_LMB=y | ||
| 798 | CONFIG_NLATTR=y | ||
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild index 31820dfef56b..db5294c30caf 100644 --- a/arch/microblaze/include/asm/Kbuild +++ b/arch/microblaze/include/asm/Kbuild | |||
| @@ -1,26 +1,3 @@ | |||
| 1 | include include/asm-generic/Kbuild.asm | 1 | include include/asm-generic/Kbuild.asm |
| 2 | 2 | ||
| 3 | header-y += auxvec.h | 3 | header-y += elf.h |
| 4 | header-y += errno.h | ||
| 5 | header-y += fcntl.h | ||
| 6 | header-y += ioctl.h | ||
| 7 | header-y += ioctls.h | ||
| 8 | header-y += ipcbuf.h | ||
| 9 | header-y += linkage.h | ||
| 10 | header-y += msgbuf.h | ||
| 11 | header-y += poll.h | ||
| 12 | header-y += resource.h | ||
| 13 | header-y += sembuf.h | ||
| 14 | header-y += shmbuf.h | ||
| 15 | header-y += sigcontext.h | ||
| 16 | header-y += siginfo.h | ||
| 17 | header-y += socket.h | ||
| 18 | header-y += sockios.h | ||
| 19 | header-y += statfs.h | ||
| 20 | header-y += stat.h | ||
| 21 | header-y += termbits.h | ||
| 22 | header-y += ucontext.h | ||
| 23 | |||
| 24 | unifdef-y += cputable.h | ||
| 25 | unifdef-y += elf.h | ||
| 26 | unifdef-y += termios.h | ||
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h index 3300b785049b..f989d6aad648 100644 --- a/arch/microblaze/include/asm/cacheflush.h +++ b/arch/microblaze/include/asm/cacheflush.h | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2007 PetaLogix | 2 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2007-2009 PetaLogix | ||
| 3 | * Copyright (C) 2007 John Williams <john.williams@petalogix.com> | 4 | * Copyright (C) 2007 John Williams <john.williams@petalogix.com> |
| 4 | * based on v850 version which was | 5 | * based on v850 version which was |
| 5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | 6 | * Copyright (C) 2001,02,03 NEC Electronics Corporation |
| @@ -43,6 +44,23 @@ | |||
| 43 | #define flush_icache_range(start, len) __invalidate_icache_range(start, len) | 44 | #define flush_icache_range(start, len) __invalidate_icache_range(start, len) |
| 44 | #define flush_icache_page(vma, pg) do { } while (0) | 45 | #define flush_icache_page(vma, pg) do { } while (0) |
| 45 | 46 | ||
| 47 | #ifndef CONFIG_MMU | ||
| 48 | # define flush_icache_user_range(start, len) do { } while (0) | ||
| 49 | #else | ||
| 50 | # define flush_icache_user_range(vma, pg, adr, len) __invalidate_icache_all() | ||
| 51 | |||
| 52 | # define flush_page_to_ram(page) do { } while (0) | ||
| 53 | |||
| 54 | # define flush_icache() __invalidate_icache_all() | ||
| 55 | # define flush_cache_sigtramp(vaddr) \ | ||
| 56 | __invalidate_icache_range(vaddr, vaddr + 8) | ||
| 57 | |||
| 58 | # define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 59 | # define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 60 | |||
| 61 | # define flush_cache_dup_mm(mm) do { } while (0) | ||
| 62 | #endif | ||
| 63 | |||
| 46 | #define flush_cache_vmap(start, end) do { } while (0) | 64 | #define flush_cache_vmap(start, end) do { } while (0) |
| 47 | #define flush_cache_vunmap(start, end) do { } while (0) | 65 | #define flush_cache_vunmap(start, end) do { } while (0) |
| 48 | 66 | ||
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h index 92b30762ce59..97ea46b5cf80 100644 --- a/arch/microblaze/include/asm/checksum.h +++ b/arch/microblaze/include/asm/checksum.h | |||
| @@ -51,7 +51,8 @@ extern __wsum csum_partial(const void *buff, int len, __wsum sum); | |||
| 51 | * here even more important to align src and dst on a 32-bit (or even | 51 | * here even more important to align src and dst on a 32-bit (or even |
| 52 | * better 64-bit) boundary | 52 | * better 64-bit) boundary |
| 53 | */ | 53 | */ |
| 54 | extern __wsum csum_partial_copy(const char *src, char *dst, int len, int sum); | 54 | extern __wsum csum_partial_copy(const void *src, void *dst, int len, |
| 55 | __wsum sum); | ||
| 55 | 56 | ||
| 56 | /* | 57 | /* |
| 57 | * the same as csum_partial_copy, but copies from user space. | 58 | * the same as csum_partial_copy, but copies from user space. |
| @@ -59,8 +60,8 @@ extern __wsum csum_partial_copy(const char *src, char *dst, int len, int sum); | |||
| 59 | * here even more important to align src and dst on a 32-bit (or even | 60 | * here even more important to align src and dst on a 32-bit (or even |
| 60 | * better 64-bit) boundary | 61 | * better 64-bit) boundary |
| 61 | */ | 62 | */ |
| 62 | extern __wsum csum_partial_copy_from_user(const char *src, char *dst, | 63 | extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, |
| 63 | int len, int sum, int *csum_err); | 64 | int len, __wsum sum, int *csum_err); |
| 64 | 65 | ||
| 65 | #define csum_partial_copy_nocheck(src, dst, len, sum) \ | 66 | #define csum_partial_copy_nocheck(src, dst, len, sum) \ |
| 66 | csum_partial_copy((src), (dst), (len), (sum)) | 67 | csum_partial_copy((src), (dst), (len), (sum)) |
| @@ -75,11 +76,12 @@ extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); | |||
| 75 | /* | 76 | /* |
| 76 | * Fold a partial checksum | 77 | * Fold a partial checksum |
| 77 | */ | 78 | */ |
| 78 | static inline __sum16 csum_fold(unsigned int sum) | 79 | static inline __sum16 csum_fold(__wsum csum) |
| 79 | { | 80 | { |
| 81 | u32 sum = (__force u32)csum; | ||
| 80 | sum = (sum & 0xffff) + (sum >> 16); | 82 | sum = (sum & 0xffff) + (sum >> 16); |
| 81 | sum = (sum & 0xffff) + (sum >> 16); | 83 | sum = (sum & 0xffff) + (sum >> 16); |
| 82 | return ~sum; | 84 | return (__force __sum16)~sum; |
| 83 | } | 85 | } |
| 84 | 86 | ||
| 85 | static inline __sum16 | 87 | static inline __sum16 |
| @@ -93,6 +95,6 @@ csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, | |||
| 93 | * this routine is used for miscellaneous IP-like checksums, mainly | 95 | * this routine is used for miscellaneous IP-like checksums, mainly |
| 94 | * in icmp.c | 96 | * in icmp.c |
| 95 | */ | 97 | */ |
| 96 | extern __sum16 ip_compute_csum(const unsigned char *buff, int len); | 98 | extern __sum16 ip_compute_csum(const void *buff, int len); |
| 97 | 99 | ||
| 98 | #endif /* _ASM_MICROBLAZE_CHECKSUM_H */ | 100 | #endif /* _ASM_MICROBLAZE_CHECKSUM_H */ |
diff --git a/arch/microblaze/include/asm/current.h b/arch/microblaze/include/asm/current.h index 8375ea991e26..29303ed825cc 100644 --- a/arch/microblaze/include/asm/current.h +++ b/arch/microblaze/include/asm/current.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -9,6 +11,12 @@ | |||
| 9 | #ifndef _ASM_MICROBLAZE_CURRENT_H | 11 | #ifndef _ASM_MICROBLAZE_CURRENT_H |
| 10 | #define _ASM_MICROBLAZE_CURRENT_H | 12 | #define _ASM_MICROBLAZE_CURRENT_H |
| 11 | 13 | ||
| 14 | /* | ||
| 15 | * Register used to hold the current task pointer while in the kernel. | ||
| 16 | * Any `call clobbered' register without a special meaning should be OK, | ||
| 17 | * but check asm/microblaze/kernel/entry.S to be sure. | ||
| 18 | */ | ||
| 19 | #define CURRENT_TASK r31 | ||
| 12 | # ifndef __ASSEMBLY__ | 20 | # ifndef __ASSEMBLY__ |
| 13 | /* | 21 | /* |
| 14 | * Dedicate r31 to keeping the current task pointer | 22 | * Dedicate r31 to keeping the current task pointer |
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h index 17336252a9b8..d00e40099165 100644 --- a/arch/microblaze/include/asm/dma-mapping.h +++ b/arch/microblaze/include/asm/dma-mapping.h | |||
| @@ -1,129 +1 @@ | |||
| 1 | /* | #include <asm-generic/dma-mapping-broken.h> | |
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
| 3 | * | ||
| 4 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | * License. See the file "COPYING" in the main directory of this archive | ||
| 6 | * for more details. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef _ASM_MICROBLAZE_DMA_MAPPING_H | ||
| 10 | #define _ASM_MICROBLAZE_DMA_MAPPING_H | ||
| 11 | |||
| 12 | #include <asm/cacheflush.h> | ||
| 13 | #include <linux/io.h> | ||
| 14 | #include <linux/bug.h> | ||
| 15 | |||
| 16 | struct scatterlist; | ||
| 17 | |||
| 18 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | ||
| 19 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | ||
| 20 | |||
| 21 | /* FIXME */ | ||
| 22 | static inline int | ||
| 23 | dma_supported(struct device *dev, u64 mask) | ||
| 24 | { | ||
| 25 | return 1; | ||
| 26 | } | ||
| 27 | |||
| 28 | static inline dma_addr_t | ||
| 29 | dma_map_page(struct device *dev, struct page *page, | ||
| 30 | unsigned long offset, size_t size, | ||
| 31 | enum dma_data_direction direction) | ||
| 32 | { | ||
| 33 | BUG(); | ||
| 34 | return 0; | ||
| 35 | } | ||
| 36 | |||
| 37 | static inline void | ||
| 38 | dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | ||
| 39 | enum dma_data_direction direction) | ||
| 40 | { | ||
| 41 | BUG(); | ||
| 42 | } | ||
| 43 | |||
| 44 | static inline int | ||
| 45 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | ||
| 46 | enum dma_data_direction direction) | ||
| 47 | { | ||
| 48 | BUG(); | ||
| 49 | return 0; | ||
| 50 | } | ||
| 51 | |||
| 52 | static inline void | ||
| 53 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | ||
| 54 | enum dma_data_direction direction) | ||
| 55 | { | ||
| 56 | BUG(); | ||
| 57 | } | ||
| 58 | |||
| 59 | static inline void | ||
| 60 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, | ||
| 61 | enum dma_data_direction direction) | ||
| 62 | { | ||
| 63 | BUG(); | ||
| 64 | } | ||
| 65 | |||
| 66 | static inline void | ||
| 67 | dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, | ||
| 68 | size_t size, enum dma_data_direction direction) | ||
| 69 | { | ||
| 70 | BUG(); | ||
| 71 | } | ||
| 72 | |||
| 73 | static inline void | ||
| 74 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | ||
| 75 | enum dma_data_direction direction) | ||
| 76 | { | ||
| 77 | BUG(); | ||
| 78 | } | ||
| 79 | |||
| 80 | static inline void | ||
| 81 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | ||
| 82 | enum dma_data_direction direction) | ||
| 83 | { | ||
| 84 | BUG(); | ||
| 85 | } | ||
| 86 | |||
| 87 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | ||
| 88 | { | ||
| 89 | return 0; | ||
| 90 | } | ||
| 91 | |||
| 92 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, | ||
| 93 | dma_addr_t *dma_handle, int flag) | ||
| 94 | { | ||
| 95 | return NULL; /* consistent_alloc(flag, size, dma_handle); */ | ||
| 96 | } | ||
| 97 | |||
| 98 | static inline void dma_free_coherent(struct device *dev, size_t size, | ||
| 99 | void *vaddr, dma_addr_t dma_handle) | ||
| 100 | { | ||
| 101 | BUG(); | ||
| 102 | } | ||
| 103 | |||
| 104 | static inline dma_addr_t | ||
| 105 | dma_map_single(struct device *dev, void *ptr, size_t size, | ||
| 106 | enum dma_data_direction direction) | ||
| 107 | { | ||
| 108 | BUG_ON(direction == DMA_NONE); | ||
| 109 | |||
| 110 | return virt_to_bus(ptr); | ||
| 111 | } | ||
| 112 | |||
| 113 | static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, | ||
| 114 | size_t size, | ||
| 115 | enum dma_data_direction direction) | ||
| 116 | { | ||
| 117 | switch (direction) { | ||
| 118 | case DMA_FROM_DEVICE: | ||
| 119 | flush_dcache_range((unsigned)dma_addr, | ||
| 120 | (unsigned)dma_addr + size); | ||
| 121 | /* Fall through */ | ||
| 122 | case DMA_TO_DEVICE: | ||
| 123 | break; | ||
| 124 | default: | ||
| 125 | BUG(); | ||
| 126 | } | ||
| 127 | } | ||
| 128 | |||
| 129 | #endif /* _ASM_MICROBLAZE_DMA_MAPPING_H */ | ||
diff --git a/arch/microblaze/include/asm/dma.h b/arch/microblaze/include/asm/dma.h index 0967fa04fc5e..08c073badf19 100644 --- a/arch/microblaze/include/asm/dma.h +++ b/arch/microblaze/include/asm/dma.h | |||
| @@ -9,8 +9,13 @@ | |||
| 9 | #ifndef _ASM_MICROBLAZE_DMA_H | 9 | #ifndef _ASM_MICROBLAZE_DMA_H |
| 10 | #define _ASM_MICROBLAZE_DMA_H | 10 | #define _ASM_MICROBLAZE_DMA_H |
| 11 | 11 | ||
| 12 | #ifndef CONFIG_MMU | ||
| 12 | /* we don't have dma address limit. define it as zero to be | 13 | /* we don't have dma address limit. define it as zero to be |
| 13 | * unlimited. */ | 14 | * unlimited. */ |
| 14 | #define MAX_DMA_ADDRESS (0) | 15 | #define MAX_DMA_ADDRESS (0) |
| 16 | #else | ||
| 17 | /* Virtual address corresponding to last available physical memory address. */ | ||
| 18 | #define MAX_DMA_ADDRESS (CONFIG_KERNEL_START + memory_size - 1) | ||
| 19 | #endif | ||
| 15 | 20 | ||
| 16 | #endif /* _ASM_MICROBLAZE_DMA_H */ | 21 | #endif /* _ASM_MICROBLAZE_DMA_H */ |
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h index 81337f241347..f92fc0dda006 100644 --- a/arch/microblaze/include/asm/elf.h +++ b/arch/microblaze/include/asm/elf.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -27,4 +29,95 @@ | |||
| 27 | */ | 29 | */ |
| 28 | #define ELF_CLASS ELFCLASS32 | 30 | #define ELF_CLASS ELFCLASS32 |
| 29 | 31 | ||
| 32 | #ifndef __uClinux__ | ||
| 33 | |||
| 34 | /* | ||
| 35 | * ELF register definitions.. | ||
| 36 | */ | ||
| 37 | |||
| 38 | #include <asm/ptrace.h> | ||
| 39 | #include <asm/byteorder.h> | ||
| 40 | |||
| 41 | #ifndef ELF_GREG_T | ||
| 42 | #define ELF_GREG_T | ||
| 43 | typedef unsigned long elf_greg_t; | ||
| 44 | #endif | ||
| 45 | |||
| 46 | #ifndef ELF_NGREG | ||
| 47 | #define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t)) | ||
| 48 | #endif | ||
| 49 | |||
| 50 | #ifndef ELF_GREGSET_T | ||
| 51 | #define ELF_GREGSET_T | ||
| 52 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
| 53 | #endif | ||
| 54 | |||
| 55 | #ifndef ELF_FPREGSET_T | ||
| 56 | #define ELF_FPREGSET_T | ||
| 57 | |||
| 58 | /* TBD */ | ||
| 59 | #define ELF_NFPREG 33 /* includes fsr */ | ||
| 60 | typedef unsigned long elf_fpreg_t; | ||
| 61 | typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; | ||
| 62 | |||
| 63 | /* typedef struct user_fpu_struct elf_fpregset_t; */ | ||
| 64 | #endif | ||
| 65 | |||
| 66 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
| 67 | * use of this is to invoke "./ld.so someprog" to test out a new version of | ||
| 68 | * the loader. We need to make sure that it is out of the way of the program | ||
| 69 | * that it will "exec", and that there is sufficient room for the brk. | ||
| 70 | */ | ||
| 71 | |||
| 72 | #define ELF_ET_DYN_BASE (0x08000000) | ||
| 73 | |||
| 74 | #ifdef __LITTLE_ENDIAN__ | ||
| 75 | #define ELF_DATA ELFDATA2LSB | ||
| 76 | #else | ||
| 77 | #define ELF_DATA ELFDATA2MSB | ||
| 78 | #endif | ||
| 79 | |||
| 80 | #define USE_ELF_CORE_DUMP | ||
| 81 | #define ELF_EXEC_PAGESIZE 4096 | ||
| 82 | |||
| 83 | |||
| 84 | #define ELF_CORE_COPY_REGS(_dest, _regs) \ | ||
| 85 | memcpy((char *) &_dest, (char *) _regs, \ | ||
| 86 | sizeof(struct pt_regs)); | ||
| 87 | |||
| 88 | /* This yields a mask that user programs can use to figure out what | ||
| 89 | * instruction set this CPU supports. This could be done in user space, | ||
| 90 | * but it's not easy, and we've already done it here. | ||
| 91 | */ | ||
| 92 | #define ELF_HWCAP (0) | ||
| 93 | |||
| 94 | /* This yields a string that ld.so will use to load implementation | ||
| 95 | * specific libraries for optimization. This is more specific in | ||
| 96 | * intent than poking at uname or /proc/cpuinfo. | ||
| 97 | |||
| 98 | * For the moment, we have only optimizations for the Intel generations, | ||
| 99 | * but that could change... | ||
| 100 | */ | ||
| 101 | #define ELF_PLATFORM (NULL) | ||
| 102 | |||
| 103 | /* Added _f parameter. Is this definition correct: TBD */ | ||
| 104 | #define ELF_PLAT_INIT(_r, _f) \ | ||
| 105 | do { \ | ||
| 106 | _r->r1 = _r->r1 = _r->r2 = _r->r3 = \ | ||
| 107 | _r->r4 = _r->r5 = _r->r6 = _r->r7 = \ | ||
| 108 | _r->r8 = _r->r9 = _r->r10 = _r->r11 = \ | ||
| 109 | _r->r12 = _r->r13 = _r->r14 = _r->r15 = \ | ||
| 110 | _r->r16 = _r->r17 = _r->r18 = _r->r19 = \ | ||
| 111 | _r->r20 = _r->r21 = _r->r22 = _r->r23 = \ | ||
| 112 | _r->r24 = _r->r25 = _r->r26 = _r->r27 = \ | ||
| 113 | _r->r28 = _r->r29 = _r->r30 = _r->r31 = \ | ||
| 114 | 0; \ | ||
| 115 | } while (0) | ||
| 116 | |||
| 117 | #ifdef __KERNEL__ | ||
| 118 | #define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT) | ||
| 119 | #endif | ||
| 120 | |||
| 121 | #endif /* __uClinux__ */ | ||
| 122 | |||
| 30 | #endif /* _ASM_MICROBLAZE_ELF_H */ | 123 | #endif /* _ASM_MICROBLAZE_ELF_H */ |
diff --git a/arch/microblaze/include/asm/entry.h b/arch/microblaze/include/asm/entry.h index e4c3aef884df..61abbd232640 100644 --- a/arch/microblaze/include/asm/entry.h +++ b/arch/microblaze/include/asm/entry.h | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Definitions used by low-level trap handlers | 2 | * Definitions used by low-level trap handlers |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2008 Michal Simek | 4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
| 5 | * Copyright (C) 2007 - 2008 PetaLogix | 5 | * Copyright (C) 2007-2009 PetaLogix |
| 6 | * Copyright (C) 2007 John Williams <john.williams@petalogix.com> | 6 | * Copyright (C) 2007 John Williams <john.williams@petalogix.com> |
| 7 | * | 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General | 8 | * This file is subject to the terms and conditions of the GNU General |
| @@ -31,7 +31,40 @@ DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */ | |||
| 31 | DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */ | 31 | DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */ |
| 32 | # endif /* __ASSEMBLY__ */ | 32 | # endif /* __ASSEMBLY__ */ |
| 33 | 33 | ||
| 34 | #ifndef CONFIG_MMU | ||
| 35 | |||
| 34 | /* noMMU hasn't any space for args */ | 36 | /* noMMU hasn't any space for args */ |
| 35 | # define STATE_SAVE_ARG_SPACE (0) | 37 | # define STATE_SAVE_ARG_SPACE (0) |
| 36 | 38 | ||
| 39 | #else /* CONFIG_MMU */ | ||
| 40 | |||
| 41 | /* If true, system calls save and restore all registers (except result | ||
| 42 | * registers, of course). If false, then `call clobbered' registers | ||
| 43 | * will not be preserved, on the theory that system calls are basically | ||
| 44 | * function calls anyway, and the caller should be able to deal with it. | ||
| 45 | * This is a security risk, of course, as `internal' values may leak out | ||
| 46 | * after a system call, but that certainly doesn't matter very much for | ||
| 47 | * a processor with no MMU protection! For a protected-mode kernel, it | ||
| 48 | * would be faster to just zero those registers before returning. | ||
| 49 | * | ||
| 50 | * I can not rely on the glibc implementation. If you turn it off make | ||
| 51 | * sure that r11/r12 is saved in user-space. --KAA | ||
| 52 | * | ||
| 53 | * These are special variables using by the kernel trap/interrupt code | ||
| 54 | * to save registers in, at a time when there are no spare registers we | ||
| 55 | * can use to do so, and we can't depend on the value of the stack | ||
| 56 | * pointer. This means that they must be within a signed 16-bit | ||
| 57 | * displacement of 0x00000000. | ||
| 58 | */ | ||
| 59 | |||
| 60 | /* A `state save frame' is a struct pt_regs preceded by some extra space | ||
| 61 | * suitable for a function call stack frame. */ | ||
| 62 | |||
| 63 | /* Amount of room on the stack reserved for arguments and to satisfy the | ||
| 64 | * C calling conventions, in addition to the space used by the struct | ||
| 65 | * pt_regs that actually holds saved values. */ | ||
| 66 | #define STATE_SAVE_ARG_SPACE (6*4) /* Up to six arguments */ | ||
| 67 | |||
| 68 | #endif /* CONFIG_MMU */ | ||
| 69 | |||
| 37 | #endif /* _ASM_MICROBLAZE_ENTRY_H */ | 70 | #endif /* _ASM_MICROBLAZE_ENTRY_H */ |
diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h index 24ca540e77c0..90731df9e574 100644 --- a/arch/microblaze/include/asm/exceptions.h +++ b/arch/microblaze/include/asm/exceptions.h | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Preliminary support for HW exception handing for Microblaze | 2 | * Preliminary support for HW exception handing for Microblaze |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2008 Michal Simek | 4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
| 5 | * Copyright (C) 2008 PetaLogix | 5 | * Copyright (C) 2008-2009 PetaLogix |
| 6 | * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au> | 6 | * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au> |
| 7 | * | 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General | 8 | * This file is subject to the terms and conditions of the GNU General |
| @@ -64,21 +64,13 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, | |||
| 64 | void die(const char *str, struct pt_regs *fp, long err); | 64 | void die(const char *str, struct pt_regs *fp, long err); |
| 65 | void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); | 65 | void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); |
| 66 | 66 | ||
| 67 | #if defined(CONFIG_XMON) | 67 | #ifdef CONFIG_MMU |
| 68 | extern void xmon(struct pt_regs *regs); | 68 | void __bug(const char *file, int line, void *data); |
| 69 | extern int xmon_bpt(struct pt_regs *regs); | 69 | int bad_trap(int trap_num, struct pt_regs *regs); |
| 70 | extern int xmon_sstep(struct pt_regs *regs); | 70 | int debug_trap(struct pt_regs *regs); |
| 71 | extern int xmon_iabr_match(struct pt_regs *regs); | 71 | #endif /* CONFIG_MMU */ |
| 72 | extern int xmon_dabr_match(struct pt_regs *regs); | ||
| 73 | extern void (*xmon_fault_handler)(struct pt_regs *regs); | ||
| 74 | 72 | ||
| 75 | void (*debugger)(struct pt_regs *regs) = xmon; | 73 | #if defined(CONFIG_KGDB) |
| 76 | int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt; | ||
| 77 | int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep; | ||
| 78 | int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match; | ||
| 79 | int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match; | ||
| 80 | void (*debugger_fault_handler)(struct pt_regs *regs); | ||
| 81 | #elif defined(CONFIG_KGDB) | ||
| 82 | void (*debugger)(struct pt_regs *regs); | 74 | void (*debugger)(struct pt_regs *regs); |
| 83 | int (*debugger_bpt)(struct pt_regs *regs); | 75 | int (*debugger_bpt)(struct pt_regs *regs); |
| 84 | int (*debugger_sstep)(struct pt_regs *regs); | 76 | int (*debugger_sstep)(struct pt_regs *regs); |
diff --git a/arch/microblaze/include/asm/flat.h b/arch/microblaze/include/asm/flat.h index acf0da543ef1..6847c1512c7b 100644 --- a/arch/microblaze/include/asm/flat.h +++ b/arch/microblaze/include/asm/flat.h | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | 13 | ||
| 14 | #include <asm/unaligned.h> | 14 | #include <asm/unaligned.h> |
| 15 | 15 | ||
| 16 | #define flat_stack_align(sp) /* nothing needed */ | ||
| 17 | #define flat_argvp_envp_on_stack() 0 | 16 | #define flat_argvp_envp_on_stack() 0 |
| 18 | #define flat_old_ram_flag(flags) (flags) | 17 | #define flat_old_ram_flag(flags) (flags) |
| 19 | #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) | 18 | #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) |
diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h index ea04632399d8..2345ac354d9b 100644 --- a/arch/microblaze/include/asm/gpio.h +++ b/arch/microblaze/include/asm/gpio.h | |||
| @@ -11,8 +11,8 @@ | |||
| 11 | * (at your option) any later version. | 11 | * (at your option) any later version. |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #ifndef __ASM_POWERPC_GPIO_H | 14 | #ifndef _ASM_MICROBLAZE_GPIO_H |
| 15 | #define __ASM_POWERPC_GPIO_H | 15 | #define _ASM_MICROBLAZE_GPIO_H |
| 16 | 16 | ||
| 17 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
| 18 | #include <asm-generic/gpio.h> | 18 | #include <asm-generic/gpio.h> |
| @@ -53,4 +53,4 @@ static inline int irq_to_gpio(unsigned int irq) | |||
| 53 | 53 | ||
| 54 | #endif /* CONFIG_GPIOLIB */ | 54 | #endif /* CONFIG_GPIOLIB */ |
| 55 | 55 | ||
| 56 | #endif /* __ASM_POWERPC_GPIO_H */ | 56 | #endif /* _ASM_MICROBLAZE_GPIO_H */ |
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 8b5853ee6b5c..5c173424d074 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2007-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -12,6 +14,9 @@ | |||
| 12 | #include <asm/byteorder.h> | 14 | #include <asm/byteorder.h> |
| 13 | #include <asm/page.h> | 15 | #include <asm/page.h> |
| 14 | #include <linux/types.h> | 16 | #include <linux/types.h> |
| 17 | #include <asm/byteorder.h> | ||
| 18 | #include <linux/mm.h> /* Get struct page {...} */ | ||
| 19 | |||
| 15 | 20 | ||
| 16 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | 21 | #define IO_SPACE_LIMIT (0xFFFFFFFF) |
| 17 | 22 | ||
| @@ -112,6 +117,30 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) | |||
| 112 | #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) | 117 | #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) |
| 113 | #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) | 118 | #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) |
| 114 | 119 | ||
| 120 | #ifdef CONFIG_MMU | ||
| 121 | |||
| 122 | #define mm_ptov(addr) ((void *)__phys_to_virt(addr)) | ||
| 123 | #define mm_vtop(addr) ((unsigned long)__virt_to_phys(addr)) | ||
| 124 | #define phys_to_virt(addr) ((void *)__phys_to_virt(addr)) | ||
| 125 | #define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr)) | ||
| 126 | #define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr)) | ||
| 127 | |||
| 128 | #define __page_address(page) \ | ||
| 129 | (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) | ||
| 130 | #define page_to_phys(page) virt_to_phys((void *)__page_address(page)) | ||
| 131 | #define page_to_bus(page) (page_to_phys(page)) | ||
| 132 | #define bus_to_virt(addr) (phys_to_virt(addr)) | ||
| 133 | |||
| 134 | extern void iounmap(void *addr); | ||
| 135 | /*extern void *__ioremap(phys_addr_t address, unsigned long size, | ||
| 136 | unsigned long flags);*/ | ||
| 137 | extern void __iomem *ioremap(phys_addr_t address, unsigned long size); | ||
| 138 | #define ioremap_writethrough(addr, size) ioremap((addr), (size)) | ||
| 139 | #define ioremap_nocache(addr, size) ioremap((addr), (size)) | ||
| 140 | #define ioremap_fullcache(addr, size) ioremap((addr), (size)) | ||
| 141 | |||
| 142 | #else /* CONFIG_MMU */ | ||
| 143 | |||
| 115 | /** | 144 | /** |
| 116 | * virt_to_phys - map virtual addresses to physical | 145 | * virt_to_phys - map virtual addresses to physical |
| 117 | * @address: address to remap | 146 | * @address: address to remap |
| @@ -160,6 +189,8 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size, | |||
| 160 | #define iounmap(addr) ((void)0) | 189 | #define iounmap(addr) ((void)0) |
| 161 | #define ioremap_nocache(physaddr, size) ioremap(physaddr, size) | 190 | #define ioremap_nocache(physaddr, size) ioremap(physaddr, size) |
| 162 | 191 | ||
| 192 | #endif /* CONFIG_MMU */ | ||
| 193 | |||
| 163 | /* | 194 | /* |
| 164 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | 195 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
| 165 | * access | 196 | * access |
diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h index 0e0431d61635..66cad6a99d77 100644 --- a/arch/microblaze/include/asm/mmu.h +++ b/arch/microblaze/include/asm/mmu.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -9,11 +11,109 @@ | |||
| 9 | #ifndef _ASM_MICROBLAZE_MMU_H | 11 | #ifndef _ASM_MICROBLAZE_MMU_H |
| 10 | #define _ASM_MICROBLAZE_MMU_H | 12 | #define _ASM_MICROBLAZE_MMU_H |
| 11 | 13 | ||
| 12 | #ifndef __ASSEMBLY__ | 14 | # ifndef CONFIG_MMU |
| 15 | # ifndef __ASSEMBLY__ | ||
| 13 | typedef struct { | 16 | typedef struct { |
| 14 | struct vm_list_struct *vmlist; | 17 | struct vm_list_struct *vmlist; |
| 15 | unsigned long end_brk; | 18 | unsigned long end_brk; |
| 16 | } mm_context_t; | 19 | } mm_context_t; |
| 17 | #endif /* __ASSEMBLY__ */ | 20 | # endif /* __ASSEMBLY__ */ |
| 21 | # else /* CONFIG_MMU */ | ||
| 22 | # ifdef __KERNEL__ | ||
| 23 | # ifndef __ASSEMBLY__ | ||
| 18 | 24 | ||
| 25 | /* Default "unsigned long" context */ | ||
| 26 | typedef unsigned long mm_context_t; | ||
| 27 | |||
| 28 | /* Hardware Page Table Entry */ | ||
| 29 | typedef struct _PTE { | ||
| 30 | unsigned long v:1; /* Entry is valid */ | ||
| 31 | unsigned long vsid:24; /* Virtual segment identifier */ | ||
| 32 | unsigned long h:1; /* Hash algorithm indicator */ | ||
| 33 | unsigned long api:6; /* Abbreviated page index */ | ||
| 34 | unsigned long rpn:20; /* Real (physical) page number */ | ||
| 35 | unsigned long :3; /* Unused */ | ||
| 36 | unsigned long r:1; /* Referenced */ | ||
| 37 | unsigned long c:1; /* Changed */ | ||
| 38 | unsigned long w:1; /* Write-thru cache mode */ | ||
| 39 | unsigned long i:1; /* Cache inhibited */ | ||
| 40 | unsigned long m:1; /* Memory coherence */ | ||
| 41 | unsigned long g:1; /* Guarded */ | ||
| 42 | unsigned long :1; /* Unused */ | ||
| 43 | unsigned long pp:2; /* Page protection */ | ||
| 44 | } PTE; | ||
| 45 | |||
| 46 | /* Values for PP (assumes Ks=0, Kp=1) */ | ||
| 47 | # define PP_RWXX 0 /* Supervisor read/write, User none */ | ||
| 48 | # define PP_RWRX 1 /* Supervisor read/write, User read */ | ||
| 49 | # define PP_RWRW 2 /* Supervisor read/write, User read/write */ | ||
| 50 | # define PP_RXRX 3 /* Supervisor read, User read */ | ||
| 51 | |||
| 52 | /* Segment Register */ | ||
| 53 | typedef struct _SEGREG { | ||
| 54 | unsigned long t:1; /* Normal or I/O type */ | ||
| 55 | unsigned long ks:1; /* Supervisor 'key' (normally 0) */ | ||
| 56 | unsigned long kp:1; /* User 'key' (normally 1) */ | ||
| 57 | unsigned long n:1; /* No-execute */ | ||
| 58 | unsigned long :4; /* Unused */ | ||
| 59 | unsigned long vsid:24; /* Virtual Segment Identifier */ | ||
| 60 | } SEGREG; | ||
| 61 | |||
| 62 | extern void _tlbie(unsigned long va); /* invalidate a TLB entry */ | ||
| 63 | extern void _tlbia(void); /* invalidate all TLB entries */ | ||
| 64 | # endif /* __ASSEMBLY__ */ | ||
| 65 | |||
| 66 | /* | ||
| 67 | * The MicroBlaze processor has a TLB architecture identical to PPC-40x. The | ||
| 68 | * instruction and data sides share a unified, 64-entry, semi-associative | ||
| 69 | * TLB which is maintained totally under software control. In addition, the | ||
| 70 | * instruction side has a hardware-managed, 2,4, or 8-entry, fully-associative | ||
| 71 | * TLB which serves as a first level to the shared TLB. These two TLBs are | ||
| 72 | * known as the UTLB and ITLB, respectively. | ||
| 73 | */ | ||
| 74 | |||
| 75 | # define MICROBLAZE_TLB_SIZE 64 | ||
| 76 | |||
| 77 | /* | ||
| 78 | * TLB entries are defined by a "high" tag portion and a "low" data | ||
| 79 | * portion. The data portion is 32-bits. | ||
| 80 | * | ||
| 81 | * TLB entries are managed entirely under software control by reading, | ||
| 82 | * writing, and searching using the MTS and MFS instructions. | ||
| 83 | */ | ||
| 84 | |||
| 85 | # define TLB_LO 1 | ||
| 86 | # define TLB_HI 0 | ||
| 87 | # define TLB_DATA TLB_LO | ||
| 88 | # define TLB_TAG TLB_HI | ||
| 89 | |||
| 90 | /* Tag portion */ | ||
| 91 | # define TLB_EPN_MASK 0xFFFFFC00 /* Effective Page Number */ | ||
| 92 | # define TLB_PAGESZ_MASK 0x00000380 | ||
| 93 | # define TLB_PAGESZ(x) (((x) & 0x7) << 7) | ||
| 94 | # define PAGESZ_1K 0 | ||
| 95 | # define PAGESZ_4K 1 | ||
| 96 | # define PAGESZ_16K 2 | ||
| 97 | # define PAGESZ_64K 3 | ||
| 98 | # define PAGESZ_256K 4 | ||
| 99 | # define PAGESZ_1M 5 | ||
| 100 | # define PAGESZ_4M 6 | ||
| 101 | # define PAGESZ_16M 7 | ||
| 102 | # define TLB_VALID 0x00000040 /* Entry is valid */ | ||
| 103 | |||
| 104 | /* Data portion */ | ||
| 105 | # define TLB_RPN_MASK 0xFFFFFC00 /* Real Page Number */ | ||
| 106 | # define TLB_PERM_MASK 0x00000300 | ||
| 107 | # define TLB_EX 0x00000200 /* Instruction execution allowed */ | ||
| 108 | # define TLB_WR 0x00000100 /* Writes permitted */ | ||
| 109 | # define TLB_ZSEL_MASK 0x000000F0 | ||
| 110 | # define TLB_ZSEL(x) (((x) & 0xF) << 4) | ||
| 111 | # define TLB_ATTR_MASK 0x0000000F | ||
| 112 | # define TLB_W 0x00000008 /* Caching is write-through */ | ||
| 113 | # define TLB_I 0x00000004 /* Caching is inhibited */ | ||
| 114 | # define TLB_M 0x00000002 /* Memory is coherent */ | ||
| 115 | # define TLB_G 0x00000001 /* Memory is guarded from prefetch */ | ||
| 116 | |||
| 117 | # endif /* __KERNEL__ */ | ||
| 118 | # endif /* CONFIG_MMU */ | ||
| 19 | #endif /* _ASM_MICROBLAZE_MMU_H */ | 119 | #endif /* _ASM_MICROBLAZE_MMU_H */ |
diff --git a/arch/microblaze/include/asm/mmu_context.h b/arch/microblaze/include/asm/mmu_context.h index 150ca01b74ba..385fed16bbfb 100644 --- a/arch/microblaze/include/asm/mmu_context.h +++ b/arch/microblaze/include/asm/mmu_context.h | |||
| @@ -1,21 +1,5 @@ | |||
| 1 | /* | 1 | #ifdef CONFIG_MMU |
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 2 | # include "mmu_context_mm.h" |
| 3 | * | 3 | #else |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 4 | # include "mmu_context_no.h" |
| 5 | * License. See the file "COPYING" in the main directory of this archive | 5 | #endif |
| 6 | * for more details. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
| 10 | #define _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
| 11 | |||
| 12 | # define init_new_context(tsk, mm) ({ 0; }) | ||
| 13 | |||
| 14 | # define enter_lazy_tlb(mm, tsk) do {} while (0) | ||
| 15 | # define change_mm_context(old, ctx, _pml4) do {} while (0) | ||
| 16 | # define destroy_context(mm) do {} while (0) | ||
| 17 | # define deactivate_mm(tsk, mm) do {} while (0) | ||
| 18 | # define switch_mm(prev, next, tsk) do {} while (0) | ||
| 19 | # define activate_mm(prev, next) do {} while (0) | ||
| 20 | |||
| 21 | #endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */ | ||
diff --git a/arch/microblaze/include/asm/mmu_context_mm.h b/arch/microblaze/include/asm/mmu_context_mm.h new file mode 100644 index 000000000000..3e5c254e8d1c --- /dev/null +++ b/arch/microblaze/include/asm/mmu_context_mm.h | |||
| @@ -0,0 +1,140 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
| 12 | #define _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
| 13 | |||
| 14 | #include <asm/atomic.h> | ||
| 15 | #include <asm/bitops.h> | ||
| 16 | #include <asm/mmu.h> | ||
| 17 | #include <asm-generic/mm_hooks.h> | ||
| 18 | |||
| 19 | # ifdef __KERNEL__ | ||
| 20 | /* | ||
| 21 | * This function defines the mapping from contexts to VSIDs (virtual | ||
| 22 | * segment IDs). We use a skew on both the context and the high 4 bits | ||
| 23 | * of the 32-bit virtual address (the "effective segment ID") in order | ||
| 24 | * to spread out the entries in the MMU hash table. | ||
| 25 | */ | ||
| 26 | # define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \ | ||
| 27 | & 0xffffff) | ||
| 28 | |||
| 29 | /* | ||
| 30 | MicroBlaze has 256 contexts, so we can just rotate through these | ||
| 31 | as a way of "switching" contexts. If the TID of the TLB is zero, | ||
| 32 | the PID/TID comparison is disabled, so we can use a TID of zero | ||
| 33 | to represent all kernel pages as shared among all contexts. | ||
| 34 | */ | ||
| 35 | |||
| 36 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | ||
| 37 | { | ||
| 38 | } | ||
| 39 | |||
| 40 | # define NO_CONTEXT 256 | ||
| 41 | # define LAST_CONTEXT 255 | ||
| 42 | # define FIRST_CONTEXT 1 | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Set the current MMU context. | ||
| 46 | * This is done byloading up the segment registers for the user part of the | ||
| 47 | * address space. | ||
| 48 | * | ||
| 49 | * Since the PGD is immediately available, it is much faster to simply | ||
| 50 | * pass this along as a second parameter, which is required for 8xx and | ||
| 51 | * can be used for debugging on all processors (if you happen to have | ||
| 52 | * an Abatron). | ||
| 53 | */ | ||
| 54 | extern void set_context(mm_context_t context, pgd_t *pgd); | ||
| 55 | |||
| 56 | /* | ||
| 57 | * Bitmap of contexts in use. | ||
| 58 | * The size of this bitmap is LAST_CONTEXT + 1 bits. | ||
| 59 | */ | ||
| 60 | extern unsigned long context_map[]; | ||
| 61 | |||
| 62 | /* | ||
| 63 | * This caches the next context number that we expect to be free. | ||
| 64 | * Its use is an optimization only, we can't rely on this context | ||
| 65 | * number to be free, but it usually will be. | ||
| 66 | */ | ||
| 67 | extern mm_context_t next_mmu_context; | ||
| 68 | |||
| 69 | /* | ||
| 70 | * Since we don't have sufficient contexts to give one to every task | ||
| 71 | * that could be in the system, we need to be able to steal contexts. | ||
| 72 | * These variables support that. | ||
| 73 | */ | ||
| 74 | extern atomic_t nr_free_contexts; | ||
| 75 | extern struct mm_struct *context_mm[LAST_CONTEXT+1]; | ||
| 76 | extern void steal_context(void); | ||
| 77 | |||
| 78 | /* | ||
| 79 | * Get a new mmu context for the address space described by `mm'. | ||
| 80 | */ | ||
| 81 | static inline void get_mmu_context(struct mm_struct *mm) | ||
| 82 | { | ||
| 83 | mm_context_t ctx; | ||
| 84 | |||
| 85 | if (mm->context != NO_CONTEXT) | ||
| 86 | return; | ||
| 87 | while (atomic_dec_if_positive(&nr_free_contexts) < 0) | ||
| 88 | steal_context(); | ||
| 89 | ctx = next_mmu_context; | ||
| 90 | while (test_and_set_bit(ctx, context_map)) { | ||
| 91 | ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx); | ||
| 92 | if (ctx > LAST_CONTEXT) | ||
| 93 | ctx = 0; | ||
| 94 | } | ||
| 95 | next_mmu_context = (ctx + 1) & LAST_CONTEXT; | ||
| 96 | mm->context = ctx; | ||
| 97 | context_mm[ctx] = mm; | ||
| 98 | } | ||
| 99 | |||
| 100 | /* | ||
| 101 | * Set up the context for a new address space. | ||
| 102 | */ | ||
| 103 | # define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) | ||
| 104 | |||
| 105 | /* | ||
| 106 | * We're finished using the context for an address space. | ||
| 107 | */ | ||
| 108 | static inline void destroy_context(struct mm_struct *mm) | ||
| 109 | { | ||
| 110 | if (mm->context != NO_CONTEXT) { | ||
| 111 | clear_bit(mm->context, context_map); | ||
| 112 | mm->context = NO_CONTEXT; | ||
| 113 | atomic_inc(&nr_free_contexts); | ||
| 114 | } | ||
| 115 | } | ||
| 116 | |||
| 117 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | ||
| 118 | struct task_struct *tsk) | ||
| 119 | { | ||
| 120 | tsk->thread.pgdir = next->pgd; | ||
| 121 | get_mmu_context(next); | ||
| 122 | set_context(next->context, next->pgd); | ||
| 123 | } | ||
| 124 | |||
| 125 | /* | ||
| 126 | * After we have set current->mm to a new value, this activates | ||
| 127 | * the context for the new mm so we see the new mappings. | ||
| 128 | */ | ||
| 129 | static inline void activate_mm(struct mm_struct *active_mm, | ||
| 130 | struct mm_struct *mm) | ||
| 131 | { | ||
| 132 | current->thread.pgdir = mm->pgd; | ||
| 133 | get_mmu_context(mm); | ||
| 134 | set_context(mm->context, mm->pgd); | ||
| 135 | } | ||
| 136 | |||
| 137 | extern void mmu_context_init(void); | ||
| 138 | |||
| 139 | # endif /* __KERNEL__ */ | ||
| 140 | #endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */ | ||
diff --git a/arch/microblaze/include/asm/mmu_context_no.h b/arch/microblaze/include/asm/mmu_context_no.h new file mode 100644 index 000000000000..ba5567190154 --- /dev/null +++ b/arch/microblaze/include/asm/mmu_context_no.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
| 12 | #define _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
| 13 | |||
| 14 | # define init_new_context(tsk, mm) ({ 0; }) | ||
| 15 | |||
| 16 | # define enter_lazy_tlb(mm, tsk) do {} while (0) | ||
| 17 | # define change_mm_context(old, ctx, _pml4) do {} while (0) | ||
| 18 | # define destroy_context(mm) do {} while (0) | ||
| 19 | # define deactivate_mm(tsk, mm) do {} while (0) | ||
| 20 | # define switch_mm(prev, next, tsk) do {} while (0) | ||
| 21 | # define activate_mm(prev, next) do {} while (0) | ||
| 22 | |||
| 23 | #endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */ | ||
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h index 7238dcfcc517..210e584974f7 100644 --- a/arch/microblaze/include/asm/page.h +++ b/arch/microblaze/include/asm/page.h | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008 Michal Simek | 2 | * VM ops |
| 3 | * Copyright (C) 2008 PetaLogix | 3 | * |
| 4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 5 | * Copyright (C) 2008-2009 PetaLogix | ||
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | 6 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 5 | * Changes for MMU support: | 7 | * Changes for MMU support: |
| 6 | * Copyright (C) 2007 Xilinx, Inc. All rights reserved. | 8 | * Copyright (C) 2007 Xilinx, Inc. All rights reserved. |
| @@ -15,14 +17,15 @@ | |||
| 15 | 17 | ||
| 16 | #include <linux/pfn.h> | 18 | #include <linux/pfn.h> |
| 17 | #include <asm/setup.h> | 19 | #include <asm/setup.h> |
| 20 | #include <linux/const.h> | ||
| 21 | |||
| 22 | #ifdef __KERNEL__ | ||
| 18 | 23 | ||
| 19 | /* PAGE_SHIFT determines the page size */ | 24 | /* PAGE_SHIFT determines the page size */ |
| 20 | #define PAGE_SHIFT (12) | 25 | #define PAGE_SHIFT (12) |
| 21 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | 26 | #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) |
| 22 | #define PAGE_MASK (~(PAGE_SIZE-1)) | 27 | #define PAGE_MASK (~(PAGE_SIZE-1)) |
| 23 | 28 | ||
| 24 | #ifdef __KERNEL__ | ||
| 25 | |||
| 26 | #ifndef __ASSEMBLY__ | 29 | #ifndef __ASSEMBLY__ |
| 27 | 30 | ||
| 28 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) | 31 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) |
| @@ -35,6 +38,7 @@ | |||
| 35 | /* align addr on a size boundary - adjust address up if needed */ | 38 | /* align addr on a size boundary - adjust address up if needed */ |
| 36 | #define _ALIGN(addr, size) _ALIGN_UP(addr, size) | 39 | #define _ALIGN(addr, size) _ALIGN_UP(addr, size) |
| 37 | 40 | ||
| 41 | #ifndef CONFIG_MMU | ||
| 38 | /* | 42 | /* |
| 39 | * PAGE_OFFSET -- the first address of the first page of memory. When not | 43 | * PAGE_OFFSET -- the first address of the first page of memory. When not |
| 40 | * using MMU this corresponds to the first free page in physical memory (aligned | 44 | * using MMU this corresponds to the first free page in physical memory (aligned |
| @@ -43,15 +47,44 @@ | |||
| 43 | extern unsigned int __page_offset; | 47 | extern unsigned int __page_offset; |
| 44 | #define PAGE_OFFSET __page_offset | 48 | #define PAGE_OFFSET __page_offset |
| 45 | 49 | ||
| 46 | #define copy_page(to, from) memcpy((to), (from), PAGE_SIZE) | 50 | #else /* CONFIG_MMU */ |
| 47 | #define get_user_page(vaddr) __get_free_page(GFP_KERNEL) | ||
| 48 | #define free_user_page(page, addr) free_page(addr) | ||
| 49 | 51 | ||
| 50 | #define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE) | 52 | /* |
| 53 | * PAGE_OFFSET -- the first address of the first page of memory. With MMU | ||
| 54 | * it is set to the kernel start address (aligned on a page boundary). | ||
| 55 | * | ||
| 56 | * CONFIG_KERNEL_START is defined in arch/microblaze/config.in and used | ||
| 57 | * in arch/microblaze/Makefile. | ||
| 58 | */ | ||
| 59 | #define PAGE_OFFSET CONFIG_KERNEL_START | ||
| 51 | 60 | ||
| 61 | /* | ||
| 62 | * MAP_NR -- given an address, calculate the index of the page struct which | ||
| 63 | * points to the address's page. | ||
| 64 | */ | ||
| 65 | #define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT) | ||
| 52 | 66 | ||
| 53 | #define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE) | 67 | /* |
| 54 | #define copy_user_page(vto, vfrom, vaddr, topg) \ | 68 | * The basic type of a PTE - 32 bit physical addressing. |
| 69 | */ | ||
| 70 | typedef unsigned long pte_basic_t; | ||
| 71 | #define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */ | ||
| 72 | #define PTE_FMT "%.8lx" | ||
| 73 | |||
| 74 | #endif /* CONFIG_MMU */ | ||
| 75 | |||
| 76 | # ifndef CONFIG_MMU | ||
| 77 | # define copy_page(to, from) memcpy((to), (from), PAGE_SIZE) | ||
| 78 | # define get_user_page(vaddr) __get_free_page(GFP_KERNEL) | ||
| 79 | # define free_user_page(page, addr) free_page(addr) | ||
| 80 | # else /* CONFIG_MMU */ | ||
| 81 | extern void copy_page(void *to, void *from); | ||
| 82 | # endif /* CONFIG_MMU */ | ||
| 83 | |||
| 84 | # define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE) | ||
| 85 | |||
| 86 | # define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE) | ||
| 87 | # define copy_user_page(vto, vfrom, vaddr, topg) \ | ||
| 55 | memcpy((vto), (vfrom), PAGE_SIZE) | 88 | memcpy((vto), (vfrom), PAGE_SIZE) |
| 56 | 89 | ||
| 57 | /* | 90 | /* |
| @@ -60,21 +93,32 @@ extern unsigned int __page_offset; | |||
| 60 | typedef struct page *pgtable_t; | 93 | typedef struct page *pgtable_t; |
| 61 | typedef struct { unsigned long pte; } pte_t; | 94 | typedef struct { unsigned long pte; } pte_t; |
| 62 | typedef struct { unsigned long pgprot; } pgprot_t; | 95 | typedef struct { unsigned long pgprot; } pgprot_t; |
| 96 | /* FIXME this can depend on linux kernel version */ | ||
| 97 | # ifdef CONFIG_MMU | ||
| 98 | typedef struct { unsigned long pmd; } pmd_t; | ||
| 99 | typedef struct { unsigned long pgd; } pgd_t; | ||
| 100 | # else /* CONFIG_MMU */ | ||
| 63 | typedef struct { unsigned long ste[64]; } pmd_t; | 101 | typedef struct { unsigned long ste[64]; } pmd_t; |
| 64 | typedef struct { pmd_t pue[1]; } pud_t; | 102 | typedef struct { pmd_t pue[1]; } pud_t; |
| 65 | typedef struct { pud_t pge[1]; } pgd_t; | 103 | typedef struct { pud_t pge[1]; } pgd_t; |
| 104 | # endif /* CONFIG_MMU */ | ||
| 66 | 105 | ||
| 106 | # define pte_val(x) ((x).pte) | ||
| 107 | # define pgprot_val(x) ((x).pgprot) | ||
| 67 | 108 | ||
| 68 | #define pte_val(x) ((x).pte) | 109 | # ifdef CONFIG_MMU |
| 69 | #define pgprot_val(x) ((x).pgprot) | 110 | # define pmd_val(x) ((x).pmd) |
| 70 | #define pmd_val(x) ((x).ste[0]) | 111 | # define pgd_val(x) ((x).pgd) |
| 71 | #define pud_val(x) ((x).pue[0]) | 112 | # else /* CONFIG_MMU */ |
| 72 | #define pgd_val(x) ((x).pge[0]) | 113 | # define pmd_val(x) ((x).ste[0]) |
| 114 | # define pud_val(x) ((x).pue[0]) | ||
| 115 | # define pgd_val(x) ((x).pge[0]) | ||
| 116 | # endif /* CONFIG_MMU */ | ||
| 73 | 117 | ||
| 74 | #define __pte(x) ((pte_t) { (x) }) | 118 | # define __pte(x) ((pte_t) { (x) }) |
| 75 | #define __pmd(x) ((pmd_t) { (x) }) | 119 | # define __pmd(x) ((pmd_t) { (x) }) |
| 76 | #define __pgd(x) ((pgd_t) { (x) }) | 120 | # define __pgd(x) ((pgd_t) { (x) }) |
| 77 | #define __pgprot(x) ((pgprot_t) { (x) }) | 121 | # define __pgprot(x) ((pgprot_t) { (x) }) |
| 78 | 122 | ||
| 79 | /** | 123 | /** |
| 80 | * Conversions for virtual address, physical address, pfn, and struct | 124 | * Conversions for virtual address, physical address, pfn, and struct |
| @@ -94,44 +138,80 @@ extern unsigned long max_low_pfn; | |||
| 94 | extern unsigned long min_low_pfn; | 138 | extern unsigned long min_low_pfn; |
| 95 | extern unsigned long max_pfn; | 139 | extern unsigned long max_pfn; |
| 96 | 140 | ||
| 97 | #define __pa(vaddr) ((unsigned long) (vaddr)) | 141 | extern unsigned long memory_start; |
| 98 | #define __va(paddr) ((void *) (paddr)) | 142 | extern unsigned long memory_end; |
| 143 | extern unsigned long memory_size; | ||
| 99 | 144 | ||
| 100 | #define phys_to_pfn(phys) (PFN_DOWN(phys)) | 145 | extern int page_is_ram(unsigned long pfn); |
| 101 | #define pfn_to_phys(pfn) (PFN_PHYS(pfn)) | ||
| 102 | 146 | ||
| 103 | #define virt_to_pfn(vaddr) (phys_to_pfn((__pa(vaddr)))) | 147 | # define phys_to_pfn(phys) (PFN_DOWN(phys)) |
| 104 | #define pfn_to_virt(pfn) __va(pfn_to_phys((pfn))) | 148 | # define pfn_to_phys(pfn) (PFN_PHYS(pfn)) |
| 105 | 149 | ||
| 106 | #define virt_to_page(vaddr) (pfn_to_page(virt_to_pfn(vaddr))) | 150 | # define virt_to_pfn(vaddr) (phys_to_pfn((__pa(vaddr)))) |
| 107 | #define page_to_virt(page) (pfn_to_virt(page_to_pfn(page))) | 151 | # define pfn_to_virt(pfn) __va(pfn_to_phys((pfn))) |
| 108 | 152 | ||
| 109 | #define page_to_phys(page) (pfn_to_phys(page_to_pfn(page))) | 153 | # ifdef CONFIG_MMU |
| 110 | #define page_to_bus(page) (page_to_phys(page)) | 154 | # define virt_to_page(kaddr) (mem_map + MAP_NR(kaddr)) |
| 111 | #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) | 155 | # else /* CONFIG_MMU */ |
| 156 | # define virt_to_page(vaddr) (pfn_to_page(virt_to_pfn(vaddr))) | ||
| 157 | # define page_to_virt(page) (pfn_to_virt(page_to_pfn(page))) | ||
| 158 | # define page_to_phys(page) (pfn_to_phys(page_to_pfn(page))) | ||
| 159 | # define page_to_bus(page) (page_to_phys(page)) | ||
| 160 | # define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) | ||
| 161 | # endif /* CONFIG_MMU */ | ||
| 112 | 162 | ||
| 113 | extern unsigned int memory_start; | 163 | # ifndef CONFIG_MMU |
| 114 | extern unsigned int memory_end; | 164 | # define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) <= max_mapnr) |
| 115 | extern unsigned int memory_size; | 165 | # define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) |
| 166 | # else /* CONFIG_MMU */ | ||
| 167 | # define ARCH_PFN_OFFSET (memory_start >> PAGE_SHIFT) | ||
| 168 | # define pfn_valid(pfn) ((pfn) < (max_mapnr + ARCH_PFN_OFFSET)) | ||
| 169 | # define VALID_PAGE(page) ((page - mem_map) < max_mapnr) | ||
| 170 | # endif /* CONFIG_MMU */ | ||
| 116 | 171 | ||
| 117 | #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_mapnr) | 172 | # endif /* __ASSEMBLY__ */ |
| 118 | 173 | ||
| 119 | #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) | 174 | #define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr))) |
| 120 | 175 | ||
| 121 | #else | ||
| 122 | #define tophys(rd, rs) (addik rd, rs, 0) | ||
| 123 | #define tovirt(rd, rs) (addik rd, rs, 0) | ||
| 124 | #endif /* __ASSEMBLY__ */ | ||
| 125 | 176 | ||
| 126 | #define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr))) | 177 | # ifndef CONFIG_MMU |
| 178 | # define __pa(vaddr) ((unsigned long) (vaddr)) | ||
| 179 | # define __va(paddr) ((void *) (paddr)) | ||
| 180 | # else /* CONFIG_MMU */ | ||
| 181 | # define __pa(x) __virt_to_phys((unsigned long)(x)) | ||
| 182 | # define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) | ||
| 183 | # endif /* CONFIG_MMU */ | ||
| 184 | |||
| 127 | 185 | ||
| 128 | /* Convert between virtual and physical address for MMU. */ | 186 | /* Convert between virtual and physical address for MMU. */ |
| 129 | /* Handle MicroBlaze processor with virtual memory. */ | 187 | /* Handle MicroBlaze processor with virtual memory. */ |
| 188 | #ifndef CONFIG_MMU | ||
| 130 | #define __virt_to_phys(addr) addr | 189 | #define __virt_to_phys(addr) addr |
| 131 | #define __phys_to_virt(addr) addr | 190 | #define __phys_to_virt(addr) addr |
| 191 | #define tophys(rd, rs) addik rd, rs, 0 | ||
| 192 | #define tovirt(rd, rs) addik rd, rs, 0 | ||
| 193 | #else | ||
| 194 | #define __virt_to_phys(addr) \ | ||
| 195 | ((addr) + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START) | ||
| 196 | #define __phys_to_virt(addr) \ | ||
| 197 | ((addr) + CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR) | ||
| 198 | #define tophys(rd, rs) \ | ||
| 199 | addik rd, rs, (CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START) | ||
| 200 | #define tovirt(rd, rs) \ | ||
| 201 | addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR) | ||
| 202 | #endif /* CONFIG_MMU */ | ||
| 132 | 203 | ||
| 133 | #define TOPHYS(addr) __virt_to_phys(addr) | 204 | #define TOPHYS(addr) __virt_to_phys(addr) |
| 134 | 205 | ||
| 206 | #ifdef CONFIG_MMU | ||
| 207 | #ifdef CONFIG_CONTIGUOUS_PAGE_ALLOC | ||
| 208 | #define WANT_PAGE_VIRTUAL 1 /* page alloc 2 relies on this */ | ||
| 209 | #endif | ||
| 210 | |||
| 211 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | ||
| 212 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
| 213 | #endif /* CONFIG_MMU */ | ||
| 214 | |||
| 135 | #endif /* __KERNEL__ */ | 215 | #endif /* __KERNEL__ */ |
| 136 | 216 | ||
| 137 | #include <asm-generic/memory_model.h> | 217 | #include <asm-generic/memory_model.h> |
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h index 2a4b35484010..59a757e46ba5 100644 --- a/arch/microblaze/include/asm/pgalloc.h +++ b/arch/microblaze/include/asm/pgalloc.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -9,6 +11,195 @@ | |||
| 9 | #ifndef _ASM_MICROBLAZE_PGALLOC_H | 11 | #ifndef _ASM_MICROBLAZE_PGALLOC_H |
| 10 | #define _ASM_MICROBLAZE_PGALLOC_H | 12 | #define _ASM_MICROBLAZE_PGALLOC_H |
| 11 | 13 | ||
| 14 | #ifdef CONFIG_MMU | ||
| 15 | |||
| 16 | #include <linux/kernel.h> /* For min/max macros */ | ||
| 17 | #include <linux/highmem.h> | ||
| 18 | #include <asm/setup.h> | ||
| 19 | #include <asm/io.h> | ||
| 20 | #include <asm/page.h> | ||
| 21 | #include <asm/cache.h> | ||
| 22 | |||
| 23 | #define PGDIR_ORDER 0 | ||
| 24 | |||
| 25 | /* | ||
| 26 | * This is handled very differently on MicroBlaze since out page tables | ||
| 27 | * are all 0's and I want to be able to use these zero'd pages elsewhere | ||
| 28 | * as well - it gives us quite a speedup. | ||
| 29 | * -- Cort | ||
| 30 | */ | ||
| 31 | extern struct pgtable_cache_struct { | ||
| 32 | unsigned long *pgd_cache; | ||
| 33 | unsigned long *pte_cache; | ||
| 34 | unsigned long pgtable_cache_sz; | ||
| 35 | } quicklists; | ||
| 36 | |||
| 37 | #define pgd_quicklist (quicklists.pgd_cache) | ||
| 38 | #define pmd_quicklist ((unsigned long *)0) | ||
| 39 | #define pte_quicklist (quicklists.pte_cache) | ||
| 40 | #define pgtable_cache_size (quicklists.pgtable_cache_sz) | ||
| 41 | |||
| 42 | extern unsigned long *zero_cache; /* head linked list of pre-zero'd pages */ | ||
| 43 | extern atomic_t zero_sz; /* # currently pre-zero'd pages */ | ||
| 44 | extern atomic_t zeropage_hits; /* # zero'd pages request that we've done */ | ||
| 45 | extern atomic_t zeropage_calls; /* # zero'd pages request that've been made */ | ||
| 46 | extern atomic_t zerototal; /* # pages zero'd over time */ | ||
| 47 | |||
| 48 | #define zero_quicklist (zero_cache) | ||
| 49 | #define zero_cache_sz (zero_sz) | ||
| 50 | #define zero_cache_calls (zeropage_calls) | ||
| 51 | #define zero_cache_hits (zeropage_hits) | ||
| 52 | #define zero_cache_total (zerototal) | ||
| 53 | |||
| 54 | /* | ||
| 55 | * return a pre-zero'd page from the list, | ||
| 56 | * return NULL if none available -- Cort | ||
| 57 | */ | ||
| 58 | extern unsigned long get_zero_page_fast(void); | ||
| 59 | |||
| 60 | extern void __bad_pte(pmd_t *pmd); | ||
| 61 | |||
| 62 | extern inline pgd_t *get_pgd_slow(void) | ||
| 63 | { | ||
| 64 | pgd_t *ret; | ||
| 65 | |||
| 66 | ret = (pgd_t *)__get_free_pages(GFP_KERNEL, PGDIR_ORDER); | ||
| 67 | if (ret != NULL) | ||
| 68 | clear_page(ret); | ||
| 69 | return ret; | ||
| 70 | } | ||
| 71 | |||
| 72 | extern inline pgd_t *get_pgd_fast(void) | ||
| 73 | { | ||
| 74 | unsigned long *ret; | ||
| 75 | |||
| 76 | ret = pgd_quicklist; | ||
| 77 | if (ret != NULL) { | ||
| 78 | pgd_quicklist = (unsigned long *)(*ret); | ||
| 79 | ret[0] = 0; | ||
| 80 | pgtable_cache_size--; | ||
| 81 | } else | ||
| 82 | ret = (unsigned long *)get_pgd_slow(); | ||
| 83 | return (pgd_t *)ret; | ||
| 84 | } | ||
| 85 | |||
| 86 | extern inline void free_pgd_fast(pgd_t *pgd) | ||
| 87 | { | ||
| 88 | *(unsigned long **)pgd = pgd_quicklist; | ||
| 89 | pgd_quicklist = (unsigned long *) pgd; | ||
| 90 | pgtable_cache_size++; | ||
| 91 | } | ||
| 92 | |||
| 93 | extern inline void free_pgd_slow(pgd_t *pgd) | ||
| 94 | { | ||
| 95 | free_page((unsigned long)pgd); | ||
| 96 | } | ||
| 97 | |||
| 98 | #define pgd_free(mm, pgd) free_pgd_fast(pgd) | ||
| 99 | #define pgd_alloc(mm) get_pgd_fast() | ||
| 100 | |||
| 101 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
| 102 | |||
| 103 | /* | ||
| 104 | * We don't have any real pmd's, and this code never triggers because | ||
| 105 | * the pgd will always be present.. | ||
| 106 | */ | ||
| 107 | #define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); }) | ||
| 108 | #define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); }) | ||
| 109 | /* FIXME two definition - look below */ | ||
| 110 | #define pmd_free(mm, x) do { } while (0) | ||
| 111 | #define pgd_populate(mm, pmd, pte) BUG() | ||
| 112 | |||
| 113 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | ||
| 114 | unsigned long address) | ||
| 115 | { | ||
| 116 | pte_t *pte; | ||
| 117 | extern int mem_init_done; | ||
| 118 | extern void *early_get_page(void); | ||
| 119 | if (mem_init_done) { | ||
| 120 | pte = (pte_t *)__get_free_page(GFP_KERNEL | | ||
| 121 | __GFP_REPEAT | __GFP_ZERO); | ||
| 122 | } else { | ||
| 123 | pte = (pte_t *)early_get_page(); | ||
| 124 | if (pte) | ||
| 125 | clear_page(pte); | ||
| 126 | } | ||
| 127 | return pte; | ||
| 128 | } | ||
| 129 | |||
| 130 | static inline struct page *pte_alloc_one(struct mm_struct *mm, | ||
| 131 | unsigned long address) | ||
| 132 | { | ||
| 133 | struct page *ptepage; | ||
| 134 | |||
| 135 | #ifdef CONFIG_HIGHPTE | ||
| 136 | int flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT; | ||
| 137 | #else | ||
| 138 | int flags = GFP_KERNEL | __GFP_REPEAT; | ||
| 139 | #endif | ||
| 140 | |||
| 141 | ptepage = alloc_pages(flags, 0); | ||
| 142 | if (ptepage) | ||
| 143 | clear_highpage(ptepage); | ||
| 144 | return ptepage; | ||
| 145 | } | ||
| 146 | |||
| 147 | static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, | ||
| 148 | unsigned long address) | ||
| 149 | { | ||
| 150 | unsigned long *ret; | ||
| 151 | |||
| 152 | ret = pte_quicklist; | ||
| 153 | if (ret != NULL) { | ||
| 154 | pte_quicklist = (unsigned long *)(*ret); | ||
| 155 | ret[0] = 0; | ||
| 156 | pgtable_cache_size--; | ||
| 157 | } | ||
| 158 | return (pte_t *)ret; | ||
| 159 | } | ||
| 160 | |||
| 161 | extern inline void pte_free_fast(pte_t *pte) | ||
| 162 | { | ||
| 163 | *(unsigned long **)pte = pte_quicklist; | ||
| 164 | pte_quicklist = (unsigned long *) pte; | ||
| 165 | pgtable_cache_size++; | ||
| 166 | } | ||
| 167 | |||
| 168 | extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
| 169 | { | ||
| 170 | free_page((unsigned long)pte); | ||
| 171 | } | ||
| 172 | |||
| 173 | extern inline void pte_free_slow(struct page *ptepage) | ||
| 174 | { | ||
| 175 | __free_page(ptepage); | ||
| 176 | } | ||
| 177 | |||
| 178 | extern inline void pte_free(struct mm_struct *mm, struct page *ptepage) | ||
| 179 | { | ||
| 180 | __free_page(ptepage); | ||
| 181 | } | ||
| 182 | |||
| 183 | #define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte)) | ||
| 184 | |||
| 185 | #define pmd_populate(mm, pmd, pte) (pmd_val(*(pmd)) = page_address(pte)) | ||
| 186 | |||
| 187 | #define pmd_populate_kernel(mm, pmd, pte) \ | ||
| 188 | (pmd_val(*(pmd)) = (unsigned long) (pte)) | ||
| 189 | |||
| 190 | /* | ||
| 191 | * We don't have any real pmd's, and this code never triggers because | ||
| 192 | * the pgd will always be present.. | ||
| 193 | */ | ||
| 194 | #define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); }) | ||
| 195 | /*#define pmd_free(mm, x) do { } while (0)*/ | ||
| 196 | #define __pmd_free_tlb(tlb, x) do { } while (0) | ||
| 197 | #define pgd_populate(mm, pmd, pte) BUG() | ||
| 198 | |||
| 199 | extern int do_check_pgt_cache(int, int); | ||
| 200 | |||
| 201 | #endif /* CONFIG_MMU */ | ||
| 202 | |||
| 12 | #define check_pgt_cache() do {} while (0) | 203 | #define check_pgt_cache() do {} while (0) |
| 13 | 204 | ||
| 14 | #endif /* _ASM_MICROBLAZE_PGALLOC_H */ | 205 | #endif /* _ASM_MICROBLAZE_PGALLOC_H */ |
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h index 4df31e46568e..4c57a586a989 100644 --- a/arch/microblaze/include/asm/pgtable.h +++ b/arch/microblaze/include/asm/pgtable.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -14,6 +16,8 @@ | |||
| 14 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | 16 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ |
| 15 | remap_pfn_range(vma, vaddr, pfn, size, prot) | 17 | remap_pfn_range(vma, vaddr, pfn, size, prot) |
| 16 | 18 | ||
| 19 | #ifndef CONFIG_MMU | ||
| 20 | |||
| 17 | #define pgd_present(pgd) (1) /* pages are always present on non MMU */ | 21 | #define pgd_present(pgd) (1) /* pages are always present on non MMU */ |
| 18 | #define pgd_none(pgd) (0) | 22 | #define pgd_none(pgd) (0) |
| 19 | #define pgd_bad(pgd) (0) | 23 | #define pgd_bad(pgd) (0) |
| @@ -27,6 +31,8 @@ | |||
| 27 | #define PAGE_READONLY __pgprot(0) /* these mean nothing to non MMU */ | 31 | #define PAGE_READONLY __pgprot(0) /* these mean nothing to non MMU */ |
| 28 | #define PAGE_KERNEL __pgprot(0) /* these mean nothing to non MMU */ | 32 | #define PAGE_KERNEL __pgprot(0) /* these mean nothing to non MMU */ |
| 29 | 33 | ||
| 34 | #define pgprot_noncached(x) (x) | ||
| 35 | |||
| 30 | #define __swp_type(x) (0) | 36 | #define __swp_type(x) (0) |
| 31 | #define __swp_offset(x) (0) | 37 | #define __swp_offset(x) (0) |
| 32 | #define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) | 38 | #define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) |
| @@ -45,6 +51,538 @@ static inline int pte_file(pte_t pte) { return 0; } | |||
| 45 | 51 | ||
| 46 | #define arch_enter_lazy_cpu_mode() do {} while (0) | 52 | #define arch_enter_lazy_cpu_mode() do {} while (0) |
| 47 | 53 | ||
| 54 | #else /* CONFIG_MMU */ | ||
| 55 | |||
| 56 | #include <asm-generic/4level-fixup.h> | ||
| 57 | |||
| 58 | #ifdef __KERNEL__ | ||
| 59 | #ifndef __ASSEMBLY__ | ||
| 60 | |||
| 61 | #include <linux/sched.h> | ||
| 62 | #include <linux/threads.h> | ||
| 63 | #include <asm/processor.h> /* For TASK_SIZE */ | ||
| 64 | #include <asm/mmu.h> | ||
| 65 | #include <asm/page.h> | ||
| 66 | |||
| 67 | #define FIRST_USER_ADDRESS 0 | ||
| 68 | |||
| 69 | extern unsigned long va_to_phys(unsigned long address); | ||
| 70 | extern pte_t *va_to_pte(unsigned long address); | ||
| 71 | extern unsigned long ioremap_bot, ioremap_base; | ||
| 72 | |||
| 73 | /* | ||
| 74 | * The following only work if pte_present() is true. | ||
| 75 | * Undefined behaviour if not.. | ||
| 76 | */ | ||
| 77 | |||
| 78 | static inline int pte_special(pte_t pte) { return 0; } | ||
| 79 | |||
| 80 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | ||
| 81 | |||
| 82 | /* Start and end of the vmalloc area. */ | ||
| 83 | /* Make sure to map the vmalloc area above the pinned kernel memory area | ||
| 84 | of 32Mb. */ | ||
| 85 | #define VMALLOC_START (CONFIG_KERNEL_START + \ | ||
| 86 | max(32 * 1024 * 1024UL, memory_size)) | ||
| 87 | #define VMALLOC_END ioremap_bot | ||
| 88 | #define VMALLOC_VMADDR(x) ((unsigned long)(x)) | ||
| 89 | |||
| 90 | #endif /* __ASSEMBLY__ */ | ||
| 91 | |||
| 92 | /* | ||
| 93 | * The MicroBlaze MMU is identical to the PPC-40x MMU, and uses a hash | ||
| 94 | * table containing PTEs, together with a set of 16 segment registers, to | ||
| 95 | * define the virtual to physical address mapping. | ||
| 96 | * | ||
| 97 | * We use the hash table as an extended TLB, i.e. a cache of currently | ||
| 98 | * active mappings. We maintain a two-level page table tree, much | ||
| 99 | * like that used by the i386, for the sake of the Linux memory | ||
| 100 | * management code. Low-level assembler code in hashtable.S | ||
| 101 | * (procedure hash_page) is responsible for extracting ptes from the | ||
| 102 | * tree and putting them into the hash table when necessary, and | ||
| 103 | * updating the accessed and modified bits in the page table tree. | ||
| 104 | */ | ||
| 105 | |||
| 106 | /* | ||
| 107 | * The MicroBlaze processor has a TLB architecture identical to PPC-40x. The | ||
| 108 | * instruction and data sides share a unified, 64-entry, semi-associative | ||
| 109 | * TLB which is maintained totally under software control. In addition, the | ||
| 110 | * instruction side has a hardware-managed, 2,4, or 8-entry, fully-associative | ||
| 111 | * TLB which serves as a first level to the shared TLB. These two TLBs are | ||
| 112 | * known as the UTLB and ITLB, respectively (see "mmu.h" for definitions). | ||
| 113 | */ | ||
| 114 | |||
| 115 | /* | ||
| 116 | * The normal case is that PTEs are 32-bits and we have a 1-page | ||
| 117 | * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus | ||
| 118 | * | ||
| 119 | */ | ||
| 120 | |||
| 121 | /* PMD_SHIFT determines the size of the area mapped by the PTE pages */ | ||
| 122 | #define PMD_SHIFT (PAGE_SHIFT + PTE_SHIFT) | ||
| 123 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
| 124 | #define PMD_MASK (~(PMD_SIZE-1)) | ||
| 125 | |||
| 126 | /* PGDIR_SHIFT determines what a top-level page table entry can map */ | ||
| 127 | #define PGDIR_SHIFT PMD_SHIFT | ||
| 128 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
| 129 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | ||
| 130 | |||
| 131 | /* | ||
| 132 | * entries per page directory level: our page-table tree is two-level, so | ||
| 133 | * we don't really have any PMD directory. | ||
| 134 | */ | ||
| 135 | #define PTRS_PER_PTE (1 << PTE_SHIFT) | ||
| 136 | #define PTRS_PER_PMD 1 | ||
| 137 | #define PTRS_PER_PGD (1 << (32 - PGDIR_SHIFT)) | ||
| 138 | |||
| 139 | #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) | ||
| 140 | #define FIRST_USER_PGD_NR 0 | ||
| 141 | |||
| 142 | #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT) | ||
| 143 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS) | ||
| 144 | |||
| 145 | #define pte_ERROR(e) \ | ||
| 146 | printk(KERN_ERR "%s:%d: bad pte "PTE_FMT".\n", \ | ||
| 147 | __FILE__, __LINE__, pte_val(e)) | ||
| 148 | #define pmd_ERROR(e) \ | ||
| 149 | printk(KERN_ERR "%s:%d: bad pmd %08lx.\n", \ | ||
| 150 | __FILE__, __LINE__, pmd_val(e)) | ||
| 151 | #define pgd_ERROR(e) \ | ||
| 152 | printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \ | ||
| 153 | __FILE__, __LINE__, pgd_val(e)) | ||
| 154 | |||
| 155 | /* | ||
| 156 | * Bits in a linux-style PTE. These match the bits in the | ||
| 157 | * (hardware-defined) PTE as closely as possible. | ||
| 158 | */ | ||
| 159 | |||
| 160 | /* There are several potential gotchas here. The hardware TLBLO | ||
| 161 | * field looks like this: | ||
| 162 | * | ||
| 163 | * 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
| 164 | * RPN..................... 0 0 EX WR ZSEL....... W I M G | ||
| 165 | * | ||
| 166 | * Where possible we make the Linux PTE bits match up with this | ||
| 167 | * | ||
| 168 | * - bits 20 and 21 must be cleared, because we use 4k pages (4xx can | ||
| 169 | * support down to 1k pages), this is done in the TLBMiss exception | ||
| 170 | * handler. | ||
| 171 | * - We use only zones 0 (for kernel pages) and 1 (for user pages) | ||
| 172 | * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB | ||
| 173 | * miss handler. Bit 27 is PAGE_USER, thus selecting the correct | ||
| 174 | * zone. | ||
| 175 | * - PRESENT *must* be in the bottom two bits because swap cache | ||
| 176 | * entries use the top 30 bits. Because 4xx doesn't support SMP | ||
| 177 | * anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30 | ||
| 178 | * is cleared in the TLB miss handler before the TLB entry is loaded. | ||
| 179 | * - All other bits of the PTE are loaded into TLBLO without | ||
| 180 | * * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for | ||
| 181 | * software PTE bits. We actually use use bits 21, 24, 25, and | ||
| 182 | * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and | ||
| 183 | * PRESENT. | ||
| 184 | */ | ||
| 185 | |||
| 186 | /* Definitions for MicroBlaze. */ | ||
| 187 | #define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */ | ||
| 188 | #define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */ | ||
| 189 | #define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */ | ||
| 190 | #define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ | ||
| 191 | #define _PAGE_USER 0x010 /* matches one of the zone permission bits */ | ||
| 192 | #define _PAGE_RW 0x040 /* software: Writes permitted */ | ||
| 193 | #define _PAGE_DIRTY 0x080 /* software: dirty page */ | ||
| 194 | #define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */ | ||
| 195 | #define _PAGE_HWEXEC 0x200 /* hardware: EX permission */ | ||
| 196 | #define _PAGE_ACCESSED 0x400 /* software: R: page referenced */ | ||
| 197 | #define _PMD_PRESENT PAGE_MASK | ||
| 198 | |||
| 199 | /* | ||
| 200 | * Some bits are unused... | ||
| 201 | */ | ||
| 202 | #ifndef _PAGE_HASHPTE | ||
| 203 | #define _PAGE_HASHPTE 0 | ||
| 204 | #endif | ||
| 205 | #ifndef _PTE_NONE_MASK | ||
| 206 | #define _PTE_NONE_MASK 0 | ||
| 207 | #endif | ||
| 208 | #ifndef _PAGE_SHARED | ||
| 209 | #define _PAGE_SHARED 0 | ||
| 210 | #endif | ||
| 211 | #ifndef _PAGE_HWWRITE | ||
| 212 | #define _PAGE_HWWRITE 0 | ||
| 213 | #endif | ||
| 214 | #ifndef _PAGE_HWEXEC | ||
| 215 | #define _PAGE_HWEXEC 0 | ||
| 216 | #endif | ||
| 217 | #ifndef _PAGE_EXEC | ||
| 218 | #define _PAGE_EXEC 0 | ||
| 219 | #endif | ||
| 220 | |||
| 221 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
| 222 | |||
| 223 | /* | ||
| 224 | * Note: the _PAGE_COHERENT bit automatically gets set in the hardware | ||
| 225 | * PTE if CONFIG_SMP is defined (hash_page does this); there is no need | ||
| 226 | * to have it in the Linux PTE, and in fact the bit could be reused for | ||
| 227 | * another purpose. -- paulus. | ||
| 228 | */ | ||
| 229 | #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED) | ||
| 230 | #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE) | ||
| 231 | |||
| 232 | #define _PAGE_KERNEL \ | ||
| 233 | (_PAGE_BASE | _PAGE_WRENABLE | _PAGE_SHARED | _PAGE_HWEXEC) | ||
| 234 | |||
| 235 | #define _PAGE_IO (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED) | ||
| 236 | |||
| 237 | #define PAGE_NONE __pgprot(_PAGE_BASE) | ||
| 238 | #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
| 239 | #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
| 240 | #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) | ||
| 241 | #define PAGE_SHARED_X \ | ||
| 242 | __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC) | ||
| 243 | #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
| 244 | #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
| 245 | |||
| 246 | #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) | ||
| 247 | #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_SHARED) | ||
| 248 | #define PAGE_KERNEL_CI __pgprot(_PAGE_IO) | ||
| 249 | |||
| 250 | /* | ||
| 251 | * We consider execute permission the same as read. | ||
| 252 | * Also, write permissions imply read permissions. | ||
| 253 | */ | ||
| 254 | #define __P000 PAGE_NONE | ||
| 255 | #define __P001 PAGE_READONLY_X | ||
| 256 | #define __P010 PAGE_COPY | ||
| 257 | #define __P011 PAGE_COPY_X | ||
| 258 | #define __P100 PAGE_READONLY | ||
| 259 | #define __P101 PAGE_READONLY_X | ||
| 260 | #define __P110 PAGE_COPY | ||
| 261 | #define __P111 PAGE_COPY_X | ||
| 262 | |||
| 263 | #define __S000 PAGE_NONE | ||
| 264 | #define __S001 PAGE_READONLY_X | ||
| 265 | #define __S010 PAGE_SHARED | ||
| 266 | #define __S011 PAGE_SHARED_X | ||
| 267 | #define __S100 PAGE_READONLY | ||
| 268 | #define __S101 PAGE_READONLY_X | ||
| 269 | #define __S110 PAGE_SHARED | ||
| 270 | #define __S111 PAGE_SHARED_X | ||
| 271 | |||
| 272 | #ifndef __ASSEMBLY__ | ||
| 273 | /* | ||
| 274 | * ZERO_PAGE is a global shared page that is always zero: used | ||
| 275 | * for zero-mapped memory areas etc.. | ||
| 276 | */ | ||
| 277 | extern unsigned long empty_zero_page[1024]; | ||
| 278 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) | ||
| 279 | |||
| 280 | #endif /* __ASSEMBLY__ */ | ||
| 281 | |||
| 282 | #define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0) | ||
| 283 | #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) | ||
| 284 | #define pte_clear(mm, addr, ptep) \ | ||
| 285 | do { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0) | ||
| 286 | |||
| 287 | #define pmd_none(pmd) (!pmd_val(pmd)) | ||
| 288 | #define pmd_bad(pmd) ((pmd_val(pmd) & _PMD_PRESENT) == 0) | ||
| 289 | #define pmd_present(pmd) ((pmd_val(pmd) & _PMD_PRESENT) != 0) | ||
| 290 | #define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0) | ||
| 291 | |||
| 292 | #define pte_page(x) (mem_map + (unsigned long) \ | ||
| 293 | ((pte_val(x) - memory_start) >> PAGE_SHIFT)) | ||
| 294 | #define PFN_SHIFT_OFFSET (PAGE_SHIFT) | ||
| 295 | |||
| 296 | #define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) | ||
| 297 | |||
| 298 | #define pfn_pte(pfn, prot) \ | ||
| 299 | __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) | pgprot_val(prot)) | ||
| 300 | |||
| 301 | #ifndef __ASSEMBLY__ | ||
| 302 | /* | ||
| 303 | * The "pgd_xxx()" functions here are trivial for a folded two-level | ||
| 304 | * setup: the pgd is never bad, and a pmd always exists (as it's folded | ||
| 305 | * into the pgd entry) | ||
| 306 | */ | ||
| 307 | static inline int pgd_none(pgd_t pgd) { return 0; } | ||
| 308 | static inline int pgd_bad(pgd_t pgd) { return 0; } | ||
| 309 | static inline int pgd_present(pgd_t pgd) { return 1; } | ||
| 310 | #define pgd_clear(xp) do { } while (0) | ||
| 311 | #define pgd_page(pgd) \ | ||
| 312 | ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK)) | ||
| 313 | |||
| 314 | /* | ||
| 315 | * The following only work if pte_present() is true. | ||
| 316 | * Undefined behaviour if not.. | ||
| 317 | */ | ||
| 318 | static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } | ||
| 319 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } | ||
| 320 | static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; } | ||
| 321 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } | ||
| 322 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } | ||
| 323 | /* FIXME */ | ||
| 324 | static inline int pte_file(pte_t pte) { return 0; } | ||
| 325 | |||
| 326 | static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } | ||
| 327 | static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } | ||
| 328 | |||
| 329 | static inline pte_t pte_rdprotect(pte_t pte) \ | ||
| 330 | { pte_val(pte) &= ~_PAGE_USER; return pte; } | ||
| 331 | static inline pte_t pte_wrprotect(pte_t pte) \ | ||
| 332 | { pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; } | ||
| 333 | static inline pte_t pte_exprotect(pte_t pte) \ | ||
| 334 | { pte_val(pte) &= ~_PAGE_EXEC; return pte; } | ||
| 335 | static inline pte_t pte_mkclean(pte_t pte) \ | ||
| 336 | { pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; } | ||
| 337 | static inline pte_t pte_mkold(pte_t pte) \ | ||
| 338 | { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } | ||
| 339 | |||
| 340 | static inline pte_t pte_mkread(pte_t pte) \ | ||
| 341 | { pte_val(pte) |= _PAGE_USER; return pte; } | ||
| 342 | static inline pte_t pte_mkexec(pte_t pte) \ | ||
| 343 | { pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; } | ||
| 344 | static inline pte_t pte_mkwrite(pte_t pte) \ | ||
| 345 | { pte_val(pte) |= _PAGE_RW; return pte; } | ||
| 346 | static inline pte_t pte_mkdirty(pte_t pte) \ | ||
| 347 | { pte_val(pte) |= _PAGE_DIRTY; return pte; } | ||
| 348 | static inline pte_t pte_mkyoung(pte_t pte) \ | ||
| 349 | { pte_val(pte) |= _PAGE_ACCESSED; return pte; } | ||
| 350 | |||
| 351 | /* | ||
| 352 | * Conversion functions: convert a page and protection to a page entry, | ||
| 353 | * and a page entry and page directory to the page they refer to. | ||
| 354 | */ | ||
| 355 | |||
| 356 | static inline pte_t mk_pte_phys(phys_addr_t physpage, pgprot_t pgprot) | ||
| 357 | { | ||
| 358 | pte_t pte; | ||
| 359 | pte_val(pte) = physpage | pgprot_val(pgprot); | ||
| 360 | return pte; | ||
| 361 | } | ||
| 362 | |||
| 363 | #define mk_pte(page, pgprot) \ | ||
| 364 | ({ \ | ||
| 365 | pte_t pte; \ | ||
| 366 | pte_val(pte) = (((page - mem_map) << PAGE_SHIFT) + memory_start) | \ | ||
| 367 | pgprot_val(pgprot); \ | ||
| 368 | pte; \ | ||
| 369 | }) | ||
| 370 | |||
| 371 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
| 372 | { | ||
| 373 | pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); | ||
| 374 | return pte; | ||
| 375 | } | ||
| 376 | |||
| 377 | /* | ||
| 378 | * Atomic PTE updates. | ||
| 379 | * | ||
| 380 | * pte_update clears and sets bit atomically, and returns | ||
| 381 | * the old pte value. | ||
| 382 | * The ((unsigned long)(p+1) - 4) hack is to get to the least-significant | ||
| 383 | * 32 bits of the PTE regardless of whether PTEs are 32 or 64 bits. | ||
| 384 | */ | ||
| 385 | static inline unsigned long pte_update(pte_t *p, unsigned long clr, | ||
| 386 | unsigned long set) | ||
| 387 | { | ||
| 388 | unsigned long old, tmp, msr; | ||
| 389 | |||
| 390 | __asm__ __volatile__("\ | ||
| 391 | msrclr %2, 0x2\n\ | ||
| 392 | nop\n\ | ||
| 393 | lw %0, %4, r0\n\ | ||
| 394 | andn %1, %0, %5\n\ | ||
| 395 | or %1, %1, %6\n\ | ||
| 396 | sw %1, %4, r0\n\ | ||
| 397 | mts rmsr, %2\n\ | ||
| 398 | nop" | ||
| 399 | : "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p) | ||
| 400 | : "r" ((unsigned long)(p+1) - 4), "r" (clr), "r" (set), "m" (*p) | ||
| 401 | : "cc"); | ||
| 402 | |||
| 403 | return old; | ||
| 404 | } | ||
| 405 | |||
| 406 | /* | ||
| 407 | * set_pte stores a linux PTE into the linux page table. | ||
| 408 | */ | ||
| 409 | static inline void set_pte(struct mm_struct *mm, unsigned long addr, | ||
| 410 | pte_t *ptep, pte_t pte) | ||
| 411 | { | ||
| 412 | *ptep = pte; | ||
| 413 | } | ||
| 414 | |||
| 415 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
| 416 | pte_t *ptep, pte_t pte) | ||
| 417 | { | ||
| 418 | *ptep = pte; | ||
| 419 | } | ||
| 420 | |||
| 421 | static inline int ptep_test_and_clear_young(struct mm_struct *mm, | ||
| 422 | unsigned long addr, pte_t *ptep) | ||
| 423 | { | ||
| 424 | return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0; | ||
| 425 | } | ||
| 426 | |||
| 427 | static inline int ptep_test_and_clear_dirty(struct mm_struct *mm, | ||
| 428 | unsigned long addr, pte_t *ptep) | ||
| 429 | { | ||
| 430 | return (pte_update(ptep, \ | ||
| 431 | (_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0; | ||
| 432 | } | ||
| 433 | |||
| 434 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, | ||
| 435 | unsigned long addr, pte_t *ptep) | ||
| 436 | { | ||
| 437 | return __pte(pte_update(ptep, ~_PAGE_HASHPTE, 0)); | ||
| 438 | } | ||
| 439 | |||
| 440 | /*static inline void ptep_set_wrprotect(struct mm_struct *mm, | ||
| 441 | unsigned long addr, pte_t *ptep) | ||
| 442 | { | ||
| 443 | pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), 0); | ||
| 444 | }*/ | ||
| 445 | |||
| 446 | static inline void ptep_mkdirty(struct mm_struct *mm, | ||
| 447 | unsigned long addr, pte_t *ptep) | ||
| 448 | { | ||
| 449 | pte_update(ptep, 0, _PAGE_DIRTY); | ||
| 450 | } | ||
| 451 | |||
| 452 | /*#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)*/ | ||
| 453 | |||
| 454 | /* Convert pmd entry to page */ | ||
| 455 | /* our pmd entry is an effective address of pte table*/ | ||
| 456 | /* returns effective address of the pmd entry*/ | ||
| 457 | #define pmd_page_kernel(pmd) ((unsigned long) (pmd_val(pmd) & PAGE_MASK)) | ||
| 458 | |||
| 459 | /* returns struct *page of the pmd entry*/ | ||
| 460 | #define pmd_page(pmd) (pfn_to_page(__pa(pmd_val(pmd)) >> PAGE_SHIFT)) | ||
| 461 | |||
| 462 | /* to find an entry in a kernel page-table-directory */ | ||
| 463 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
| 464 | |||
| 465 | /* to find an entry in a page-table-directory */ | ||
| 466 | #define pgd_index(address) ((address) >> PGDIR_SHIFT) | ||
| 467 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | ||
| 468 | |||
| 469 | /* Find an entry in the second-level page table.. */ | ||
| 470 | static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address) | ||
| 471 | { | ||
| 472 | return (pmd_t *) dir; | ||
| 473 | } | ||
| 474 | |||
| 475 | /* Find an entry in the third-level page table.. */ | ||
| 476 | #define pte_index(address) \ | ||
| 477 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
| 478 | #define pte_offset_kernel(dir, addr) \ | ||
| 479 | ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(addr)) | ||
| 480 | #define pte_offset_map(dir, addr) \ | ||
| 481 | ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE0) + pte_index(addr)) | ||
| 482 | #define pte_offset_map_nested(dir, addr) \ | ||
| 483 | ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE1) + pte_index(addr)) | ||
| 484 | |||
| 485 | #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0) | ||
| 486 | #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1) | ||
| 487 | |||
| 488 | /* Encode and decode a nonlinear file mapping entry */ | ||
| 489 | #define PTE_FILE_MAX_BITS 29 | ||
| 490 | #define pte_to_pgoff(pte) (pte_val(pte) >> 3) | ||
| 491 | #define pgoff_to_pte(off) ((pte_t) { ((off) << 3) }) | ||
| 492 | |||
| 493 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | ||
| 494 | |||
| 495 | /* | ||
| 496 | * When flushing the tlb entry for a page, we also need to flush the hash | ||
| 497 | * table entry. flush_hash_page is assembler (for speed) in hashtable.S. | ||
| 498 | */ | ||
| 499 | extern int flush_hash_page(unsigned context, unsigned long va, pte_t *ptep); | ||
| 500 | |||
| 501 | /* Add an HPTE to the hash table */ | ||
| 502 | extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep); | ||
| 503 | |||
| 504 | /* | ||
| 505 | * Encode and decode a swap entry. | ||
| 506 | * Note that the bits we use in a PTE for representing a swap entry | ||
| 507 | * must not include the _PAGE_PRESENT bit, or the _PAGE_HASHPTE bit | ||
| 508 | * (if used). -- paulus | ||
| 509 | */ | ||
| 510 | #define __swp_type(entry) ((entry).val & 0x3f) | ||
| 511 | #define __swp_offset(entry) ((entry).val >> 6) | ||
| 512 | #define __swp_entry(type, offset) \ | ||
| 513 | ((swp_entry_t) { (type) | ((offset) << 6) }) | ||
| 514 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 }) | ||
| 515 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 }) | ||
| 516 | |||
| 517 | |||
| 518 | /* CONFIG_APUS */ | ||
| 519 | /* For virtual address to physical address conversion */ | ||
| 520 | extern void cache_clear(__u32 addr, int length); | ||
| 521 | extern void cache_push(__u32 addr, int length); | ||
| 522 | extern int mm_end_of_chunk(unsigned long addr, int len); | ||
| 523 | extern unsigned long iopa(unsigned long addr); | ||
| 524 | /* extern unsigned long mm_ptov(unsigned long addr) \ | ||
| 525 | __attribute__ ((const)); TBD */ | ||
| 526 | |||
| 527 | /* Values for nocacheflag and cmode */ | ||
| 528 | /* These are not used by the APUS kernel_map, but prevents | ||
| 529 | * compilation errors. | ||
| 530 | */ | ||
| 531 | #define IOMAP_FULL_CACHING 0 | ||
| 532 | #define IOMAP_NOCACHE_SER 1 | ||
| 533 | #define IOMAP_NOCACHE_NONSER 2 | ||
| 534 | #define IOMAP_NO_COPYBACK 3 | ||
| 535 | |||
| 536 | /* | ||
| 537 | * Map some physical address range into the kernel address space. | ||
| 538 | */ | ||
| 539 | extern unsigned long kernel_map(unsigned long paddr, unsigned long size, | ||
| 540 | int nocacheflag, unsigned long *memavailp); | ||
| 541 | |||
| 542 | /* | ||
| 543 | * Set cache mode of (kernel space) address range. | ||
| 544 | */ | ||
| 545 | extern void kernel_set_cachemode(unsigned long address, unsigned long size, | ||
| 546 | unsigned int cmode); | ||
| 547 | |||
| 548 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ | ||
| 549 | #define kern_addr_valid(addr) (1) | ||
| 550 | |||
| 551 | #define io_remap_page_range remap_page_range | ||
| 552 | |||
| 553 | /* | ||
| 554 | * No page table caches to initialise | ||
| 555 | */ | ||
| 556 | #define pgtable_cache_init() do { } while (0) | ||
| 557 | |||
| 558 | void do_page_fault(struct pt_regs *regs, unsigned long address, | ||
| 559 | unsigned long error_code); | ||
| 560 | |||
| 561 | void __init io_block_mapping(unsigned long virt, phys_addr_t phys, | ||
| 562 | unsigned int size, int flags); | ||
| 563 | |||
| 564 | void __init adjust_total_lowmem(void); | ||
| 565 | void mapin_ram(void); | ||
| 566 | int map_page(unsigned long va, phys_addr_t pa, int flags); | ||
| 567 | |||
| 568 | extern int mem_init_done; | ||
| 569 | extern unsigned long ioremap_base; | ||
| 570 | extern unsigned long ioremap_bot; | ||
| 571 | |||
| 572 | asmlinkage void __init mmu_init(void); | ||
| 573 | |||
| 574 | void __init *early_get_page(void); | ||
| 575 | |||
| 576 | void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle); | ||
| 577 | void consistent_free(void *vaddr); | ||
| 578 | void consistent_sync(void *vaddr, size_t size, int direction); | ||
| 579 | void consistent_sync_page(struct page *page, unsigned long offset, | ||
| 580 | size_t size, int direction); | ||
| 581 | #endif /* __ASSEMBLY__ */ | ||
| 582 | #endif /* __KERNEL__ */ | ||
| 583 | |||
| 584 | #endif /* CONFIG_MMU */ | ||
| 585 | |||
| 48 | #ifndef __ASSEMBLY__ | 586 | #ifndef __ASSEMBLY__ |
| 49 | #include <asm-generic/pgtable.h> | 587 | #include <asm-generic/pgtable.h> |
| 50 | 588 | ||
diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h index b4df41c5dde2..8c758b231f37 100644 --- a/arch/microblaze/include/asm/posix_types.h +++ b/arch/microblaze/include/asm/posix_types.h | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | */ | 16 | */ |
| 17 | 17 | ||
| 18 | typedef unsigned long __kernel_ino_t; | 18 | typedef unsigned long __kernel_ino_t; |
| 19 | typedef unsigned int __kernel_mode_t; | 19 | typedef unsigned short __kernel_mode_t; |
| 20 | typedef unsigned int __kernel_nlink_t; | 20 | typedef unsigned int __kernel_nlink_t; |
| 21 | typedef long __kernel_off_t; | 21 | typedef long __kernel_off_t; |
| 22 | typedef int __kernel_pid_t; | 22 | typedef int __kernel_pid_t; |
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index 9329029d2614..563c6b9453f0 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008 Michal Simek | 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2008 PetaLogix | 3 | * Copyright (C) 2008-2009 PetaLogix |
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 5 | * | 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -26,14 +26,15 @@ extern const struct seq_operations cpuinfo_op; | |||
| 26 | # define cpu_sleep() do {} while (0) | 26 | # define cpu_sleep() do {} while (0) |
| 27 | # define prepare_to_copy(tsk) do {} while (0) | 27 | # define prepare_to_copy(tsk) do {} while (0) |
| 28 | 28 | ||
| 29 | # endif /* __ASSEMBLY__ */ | ||
| 30 | |||
| 31 | #define task_pt_regs(tsk) \ | 29 | #define task_pt_regs(tsk) \ |
| 32 | (((struct pt_regs *)(THREAD_SIZE + task_stack_page(tsk))) - 1) | 30 | (((struct pt_regs *)(THREAD_SIZE + task_stack_page(tsk))) - 1) |
| 33 | 31 | ||
| 34 | /* Do necessary setup to start up a newly executed thread. */ | 32 | /* Do necessary setup to start up a newly executed thread. */ |
| 35 | void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp); | 33 | void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp); |
| 36 | 34 | ||
| 35 | # endif /* __ASSEMBLY__ */ | ||
| 36 | |||
| 37 | # ifndef CONFIG_MMU | ||
| 37 | /* | 38 | /* |
| 38 | * User space process size: memory size | 39 | * User space process size: memory size |
| 39 | * | 40 | * |
| @@ -85,4 +86,90 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); | |||
| 85 | # define KSTK_EIP(tsk) (0) | 86 | # define KSTK_EIP(tsk) (0) |
| 86 | # define KSTK_ESP(tsk) (0) | 87 | # define KSTK_ESP(tsk) (0) |
| 87 | 88 | ||
| 89 | # else /* CONFIG_MMU */ | ||
| 90 | |||
| 91 | /* | ||
| 92 | * This is used to define STACK_TOP, and with MMU it must be below | ||
| 93 | * kernel base to select the correct PGD when handling MMU exceptions. | ||
| 94 | */ | ||
| 95 | # define TASK_SIZE (CONFIG_KERNEL_START) | ||
| 96 | |||
| 97 | /* | ||
| 98 | * This decides where the kernel will search for a free chunk of vm | ||
| 99 | * space during mmap's. | ||
| 100 | */ | ||
| 101 | # define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) | ||
| 102 | |||
| 103 | # define THREAD_KSP 0 | ||
| 104 | |||
| 105 | # ifndef __ASSEMBLY__ | ||
| 106 | |||
| 107 | /* | ||
| 108 | * Default implementation of macro that returns current | ||
| 109 | * instruction pointer ("program counter"). | ||
| 110 | */ | ||
| 111 | # define current_text_addr() ({ __label__ _l; _l: &&_l; }) | ||
| 112 | |||
| 113 | /* If you change this, you must change the associated assembly-languages | ||
| 114 | * constants defined below, THREAD_*. | ||
| 115 | */ | ||
| 116 | struct thread_struct { | ||
| 117 | /* kernel stack pointer (must be first field in structure) */ | ||
| 118 | unsigned long ksp; | ||
| 119 | unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ | ||
| 120 | void *pgdir; /* root of page-table tree */ | ||
| 121 | struct pt_regs *regs; /* Pointer to saved register state */ | ||
| 122 | }; | ||
| 123 | |||
| 124 | # define INIT_THREAD { \ | ||
| 125 | .ksp = sizeof init_stack + (unsigned long)init_stack, \ | ||
| 126 | .pgdir = swapper_pg_dir, \ | ||
| 127 | } | ||
| 128 | |||
| 129 | /* Do necessary setup to start up a newly executed thread. */ | ||
| 130 | void start_thread(struct pt_regs *regs, | ||
| 131 | unsigned long pc, unsigned long usp); | ||
| 132 | |||
| 133 | /* Free all resources held by a thread. */ | ||
| 134 | extern inline void release_thread(struct task_struct *dead_task) | ||
| 135 | { | ||
| 136 | } | ||
| 137 | |||
| 138 | extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); | ||
| 139 | |||
| 140 | /* Free current thread data structures etc. */ | ||
| 141 | static inline void exit_thread(void) | ||
| 142 | { | ||
| 143 | } | ||
| 144 | |||
| 145 | /* Return saved (kernel) PC of a blocked thread. */ | ||
| 146 | # define thread_saved_pc(tsk) \ | ||
| 147 | ((tsk)->thread.regs ? (tsk)->thread.regs->r15 : 0) | ||
| 148 | |||
| 149 | unsigned long get_wchan(struct task_struct *p); | ||
| 150 | |||
| 151 | /* The size allocated for kernel stacks. This _must_ be a power of two! */ | ||
| 152 | # define KERNEL_STACK_SIZE 0x2000 | ||
| 153 | |||
| 154 | /* Return some info about the user process TASK. */ | ||
| 155 | # define task_tos(task) ((unsigned long)(task) + KERNEL_STACK_SIZE) | ||
| 156 | # define task_regs(task) ((struct pt_regs *)task_tos(task) - 1) | ||
| 157 | |||
| 158 | # define task_pt_regs_plus_args(tsk) \ | ||
| 159 | (((void *)task_pt_regs(tsk)) - STATE_SAVE_ARG_SPACE) | ||
| 160 | |||
| 161 | # define task_sp(task) (task_regs(task)->r1) | ||
| 162 | # define task_pc(task) (task_regs(task)->pc) | ||
| 163 | /* Grotty old names for some. */ | ||
| 164 | # define KSTK_EIP(task) (task_pc(task)) | ||
| 165 | # define KSTK_ESP(task) (task_sp(task)) | ||
| 166 | |||
| 167 | /* FIXME */ | ||
| 168 | # define deactivate_mm(tsk, mm) do { } while (0) | ||
| 169 | |||
| 170 | # define STACK_TOP TASK_SIZE | ||
| 171 | # define STACK_TOP_MAX STACK_TOP | ||
| 172 | |||
| 173 | # endif /* __ASSEMBLY__ */ | ||
| 174 | # endif /* CONFIG_MMU */ | ||
| 88 | #endif /* _ASM_MICROBLAZE_PROCESSOR_H */ | 175 | #endif /* _ASM_MICROBLAZE_PROCESSOR_H */ |
diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h index 55015bce5e47..a917dc517736 100644 --- a/arch/microblaze/include/asm/ptrace.h +++ b/arch/microblaze/include/asm/ptrace.h | |||
| @@ -10,7 +10,6 @@ | |||
| 10 | #define _ASM_MICROBLAZE_PTRACE_H | 10 | #define _ASM_MICROBLAZE_PTRACE_H |
| 11 | 11 | ||
| 12 | #ifndef __ASSEMBLY__ | 12 | #ifndef __ASSEMBLY__ |
| 13 | #include <linux/types.h> | ||
| 14 | 13 | ||
| 15 | typedef unsigned long microblaze_reg_t; | 14 | typedef unsigned long microblaze_reg_t; |
| 16 | 15 | ||
diff --git a/arch/microblaze/include/asm/registers.h b/arch/microblaze/include/asm/registers.h index 834142d9356f..68c3afb73877 100644 --- a/arch/microblaze/include/asm/registers.h +++ b/arch/microblaze/include/asm/registers.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008 Michal Simek | 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2008 PetaLogix | 3 | * Copyright (C) 2008-2009 PetaLogix |
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 5 | * | 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -30,4 +30,21 @@ | |||
| 30 | #define FSR_UF (1<<1) /* Underflow */ | 30 | #define FSR_UF (1<<1) /* Underflow */ |
| 31 | #define FSR_DO (1<<0) /* Denormalized operand error */ | 31 | #define FSR_DO (1<<0) /* Denormalized operand error */ |
| 32 | 32 | ||
| 33 | # ifdef CONFIG_MMU | ||
| 34 | /* Machine State Register (MSR) Fields */ | ||
| 35 | # define MSR_UM (1<<11) /* User Mode */ | ||
| 36 | # define MSR_UMS (1<<12) /* User Mode Save */ | ||
| 37 | # define MSR_VM (1<<13) /* Virtual Mode */ | ||
| 38 | # define MSR_VMS (1<<14) /* Virtual Mode Save */ | ||
| 39 | |||
| 40 | # define MSR_KERNEL (MSR_EE | MSR_VM) | ||
| 41 | /* # define MSR_USER (MSR_KERNEL | MSR_UM | MSR_IE) */ | ||
| 42 | # define MSR_KERNEL_VMS (MSR_EE | MSR_VMS) | ||
| 43 | /* # define MSR_USER_VMS (MSR_KERNEL_VMS | MSR_UMS | MSR_IE) */ | ||
| 44 | |||
| 45 | /* Exception State Register (ESR) Fields */ | ||
| 46 | # define ESR_DIZ (1<<11) /* Zone Protection */ | ||
| 47 | # define ESR_S (1<<10) /* Store instruction */ | ||
| 48 | |||
| 49 | # endif /* CONFIG_MMU */ | ||
| 33 | #endif /* _ASM_MICROBLAZE_REGISTERS_H */ | 50 | #endif /* _ASM_MICROBLAZE_REGISTERS_H */ |
diff --git a/arch/microblaze/include/asm/sections.h b/arch/microblaze/include/asm/sections.h index 8434a43e5421..4487e150b455 100644 --- a/arch/microblaze/include/asm/sections.h +++ b/arch/microblaze/include/asm/sections.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -14,6 +16,7 @@ | |||
| 14 | # ifndef __ASSEMBLY__ | 16 | # ifndef __ASSEMBLY__ |
| 15 | extern char _ssbss[], _esbss[]; | 17 | extern char _ssbss[], _esbss[]; |
| 16 | extern unsigned long __ivt_start[], __ivt_end[]; | 18 | extern unsigned long __ivt_start[], __ivt_end[]; |
| 19 | extern char _etext[], _stext[]; | ||
| 17 | 20 | ||
| 18 | # ifdef CONFIG_MTD_UCLINUX | 21 | # ifdef CONFIG_MTD_UCLINUX |
| 19 | extern char *_ebss; | 22 | extern char *_ebss; |
diff --git a/arch/microblaze/include/asm/segment.h b/arch/microblaze/include/asm/segment.h index 7f5dcc56eea1..0e7102c3fb11 100644 --- a/arch/microblaze/include/asm/segment.h +++ b/arch/microblaze/include/asm/segment.h | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008 Michal Simek | 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2008 PetaLogix | 3 | * Copyright (C) 2008-2009 PetaLogix |
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 5 | * | 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -11,7 +11,7 @@ | |||
| 11 | #ifndef _ASM_MICROBLAZE_SEGMENT_H | 11 | #ifndef _ASM_MICROBLAZE_SEGMENT_H |
| 12 | #define _ASM_MICROBLAZE_SEGMENT_H | 12 | #define _ASM_MICROBLAZE_SEGMENT_H |
| 13 | 13 | ||
| 14 | #ifndef __ASSEMBLY__ | 14 | # ifndef __ASSEMBLY__ |
| 15 | 15 | ||
| 16 | typedef struct { | 16 | typedef struct { |
| 17 | unsigned long seg; | 17 | unsigned long seg; |
| @@ -29,15 +29,21 @@ typedef struct { | |||
| 29 | * | 29 | * |
| 30 | * For non-MMU arch like Microblaze, KERNEL_DS and USER_DS is equal. | 30 | * For non-MMU arch like Microblaze, KERNEL_DS and USER_DS is equal. |
| 31 | */ | 31 | */ |
| 32 | # define KERNEL_DS ((mm_segment_t){0}) | 32 | # define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) |
| 33 | |||
| 34 | # ifndef CONFIG_MMU | ||
| 35 | # define KERNEL_DS MAKE_MM_SEG(0) | ||
| 33 | # define USER_DS KERNEL_DS | 36 | # define USER_DS KERNEL_DS |
| 37 | # else | ||
| 38 | # define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
| 39 | # define USER_DS MAKE_MM_SEG(TASK_SIZE - 1) | ||
| 40 | # endif | ||
| 34 | 41 | ||
| 35 | # define get_ds() (KERNEL_DS) | 42 | # define get_ds() (KERNEL_DS) |
| 36 | # define get_fs() (current_thread_info()->addr_limit) | 43 | # define get_fs() (current_thread_info()->addr_limit) |
| 37 | # define set_fs(x) \ | 44 | # define set_fs(val) (current_thread_info()->addr_limit = (val)) |
| 38 | do { current_thread_info()->addr_limit = (x); } while (0) | ||
| 39 | 45 | ||
| 40 | # define segment_eq(a, b) ((a).seg == (b).seg) | 46 | # define segment_eq(a, b) ((a).seg == (b).seg) |
| 41 | 47 | ||
| 42 | # endif /* __ASSEMBLY__ */ | 48 | # endif /* __ASSEMBLY__ */ |
| 43 | #endif /* _ASM_MICROBLAZE_SEGMENT_H */ | 49 | #endif /* _ASM_MICROBLAZE_SEGMENT_H */ |
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h index 9b98e8e6abae..27f8dafd8c34 100644 --- a/arch/microblaze/include/asm/setup.h +++ b/arch/microblaze/include/asm/setup.h | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu> | 2 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> |
| 3 | * Copyright (C) 2007-2009 PetaLogix | ||
| 3 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 4 | * | 5 | * |
| 5 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -18,7 +19,6 @@ | |||
| 18 | extern unsigned int boot_cpuid; /* move to smp.h */ | 19 | extern unsigned int boot_cpuid; /* move to smp.h */ |
| 19 | 20 | ||
| 20 | extern char cmd_line[COMMAND_LINE_SIZE]; | 21 | extern char cmd_line[COMMAND_LINE_SIZE]; |
| 21 | # endif/* __KERNEL__ */ | ||
| 22 | 22 | ||
| 23 | void early_printk(const char *fmt, ...); | 23 | void early_printk(const char *fmt, ...); |
| 24 | 24 | ||
| @@ -30,6 +30,11 @@ void setup_heartbeat(void); | |||
| 30 | 30 | ||
| 31 | unsigned long long sched_clock(void); | 31 | unsigned long long sched_clock(void); |
| 32 | 32 | ||
| 33 | # ifdef CONFIG_MMU | ||
| 34 | extern void mmu_reset(void); | ||
| 35 | extern void early_console_reg_tlb_alloc(unsigned int addr); | ||
| 36 | # endif /* CONFIG_MMU */ | ||
| 37 | |||
| 33 | void time_init(void); | 38 | void time_init(void); |
| 34 | void init_IRQ(void); | 39 | void init_IRQ(void); |
| 35 | void machine_early_init(const char *cmdline, unsigned int ram, | 40 | void machine_early_init(const char *cmdline, unsigned int ram, |
| @@ -40,5 +45,6 @@ void machine_shutdown(void); | |||
| 40 | void machine_halt(void); | 45 | void machine_halt(void); |
| 41 | void machine_power_off(void); | 46 | void machine_power_off(void); |
| 42 | 47 | ||
| 48 | # endif/* __KERNEL__ */ | ||
| 43 | # endif /* __ASSEMBLY__ */ | 49 | # endif /* __ASSEMBLY__ */ |
| 44 | #endif /* _ASM_MICROBLAZE_SETUP_H */ | 50 | #endif /* _ASM_MICROBLAZE_SETUP_H */ |
diff --git a/arch/microblaze/include/asm/stat.h b/arch/microblaze/include/asm/stat.h index 5f18b8aed220..a15f77520bfd 100644 --- a/arch/microblaze/include/asm/stat.h +++ b/arch/microblaze/include/asm/stat.h | |||
| @@ -16,58 +16,53 @@ | |||
| 16 | 16 | ||
| 17 | #include <linux/posix_types.h> | 17 | #include <linux/posix_types.h> |
| 18 | 18 | ||
| 19 | #define STAT_HAVE_NSEC 1 | ||
| 20 | |||
| 19 | struct stat { | 21 | struct stat { |
| 20 | unsigned int st_dev; | 22 | unsigned long st_dev; |
| 21 | unsigned long st_ino; | 23 | unsigned long st_ino; |
| 22 | unsigned int st_mode; | 24 | unsigned int st_mode; |
| 23 | unsigned int st_nlink; | 25 | unsigned int st_nlink; |
| 24 | unsigned int st_uid; | 26 | unsigned int st_uid; |
| 25 | unsigned int st_gid; | 27 | unsigned int st_gid; |
| 26 | unsigned int st_rdev; | 28 | unsigned long st_rdev; |
| 27 | unsigned long st_size; | 29 | unsigned long __pad1; |
| 28 | unsigned long st_blksize; | 30 | long st_size; |
| 29 | unsigned long st_blocks; | 31 | int st_blksize; |
| 30 | unsigned long st_atime; | 32 | int __pad2; |
| 31 | unsigned long __unused1; /* unsigned long st_atime_nsec */ | 33 | long st_blocks; |
| 32 | unsigned long st_mtime; | 34 | int st_atime; |
| 33 | unsigned long __unused2; /* unsigned long st_mtime_nsec */ | 35 | unsigned int st_atime_nsec; |
| 34 | unsigned long st_ctime; | 36 | int st_mtime; |
| 35 | unsigned long __unused3; /* unsigned long st_ctime_nsec */ | 37 | unsigned int st_mtime_nsec; |
| 38 | int st_ctime; | ||
| 39 | unsigned int st_ctime_nsec; | ||
| 36 | unsigned long __unused4; | 40 | unsigned long __unused4; |
| 37 | unsigned long __unused5; | 41 | unsigned long __unused5; |
| 38 | }; | 42 | }; |
| 39 | 43 | ||
| 40 | struct stat64 { | 44 | struct stat64 { |
| 41 | unsigned long long st_dev; | 45 | unsigned long long st_dev; /* Device. */ |
| 42 | unsigned long __unused1; | 46 | unsigned long long st_ino; /* File serial number. */ |
| 43 | 47 | unsigned int st_mode; /* File mode. */ | |
| 44 | unsigned long long st_ino; | 48 | unsigned int st_nlink; /* Link count. */ |
| 45 | 49 | unsigned int st_uid; /* User ID of the file's owner. */ | |
| 46 | unsigned int st_mode; | 50 | unsigned int st_gid; /* Group ID of the file's group. */ |
| 47 | unsigned int st_nlink; | 51 | unsigned long long st_rdev; /* Device number, if device. */ |
| 48 | 52 | unsigned long long __pad1; | |
| 49 | unsigned int st_uid; | 53 | long long st_size; /* Size of file, in bytes. */ |
| 50 | unsigned int st_gid; | 54 | int st_blksize; /* Optimal block size for I/O. */ |
| 51 | 55 | int __pad2; | |
| 52 | unsigned long long st_rdev; | 56 | long long st_blocks; /* Number 512-byte blocks allocated. */ |
| 53 | unsigned long __unused3; | 57 | int st_atime; /* Time of last access. */ |
| 54 | 58 | unsigned int st_atime_nsec; | |
| 55 | long long st_size; | 59 | int st_mtime; /* Time of last modification. */ |
| 56 | unsigned long st_blksize; | 60 | unsigned int st_mtime_nsec; |
| 57 | 61 | int st_ctime; /* Time of last status change. */ | |
| 58 | unsigned long st_blocks; /* No. of 512-byte blocks allocated */ | 62 | unsigned int st_ctime_nsec; |
| 59 | unsigned long __unused4; /* future possible st_blocks high bits */ | 63 | unsigned int __unused4; |
| 60 | 64 | unsigned int __unused5; | |
| 61 | unsigned long st_atime; | ||
| 62 | unsigned long st_atime_nsec; | ||
| 63 | |||
| 64 | unsigned long st_mtime; | ||
| 65 | unsigned long st_mtime_nsec; | ||
| 66 | |||
| 67 | unsigned long st_ctime; | ||
| 68 | unsigned long st_ctime_nsec; | ||
| 69 | |||
| 70 | unsigned long __unused8; | ||
| 71 | }; | 65 | }; |
| 72 | 66 | ||
| 73 | #endif /* _ASM_MICROBLAZE_STAT_H */ | 67 | #endif /* _ASM_MICROBLAZE_STAT_H */ |
| 68 | |||
diff --git a/arch/microblaze/include/asm/string.h b/arch/microblaze/include/asm/string.h index f7728c90fc18..aec2f59298b8 100644 --- a/arch/microblaze/include/asm/string.h +++ b/arch/microblaze/include/asm/string.h | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | #ifndef _ASM_MICROBLAZE_STRING_H | 9 | #ifndef _ASM_MICROBLAZE_STRING_H |
| 10 | #define _ASM_MICROBLAZE_STRING_H | 10 | #define _ASM_MICROBLAZE_STRING_H |
| 11 | 11 | ||
| 12 | #ifndef __KERNEL__ | 12 | #ifdef __KERNEL__ |
| 13 | 13 | ||
| 14 | #define __HAVE_ARCH_MEMSET | 14 | #define __HAVE_ARCH_MEMSET |
| 15 | #define __HAVE_ARCH_MEMCPY | 15 | #define __HAVE_ARCH_MEMCPY |
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h index 9cb4ff0edeb2..ddea9eb31f8d 100644 --- a/arch/microblaze/include/asm/syscalls.h +++ b/arch/microblaze/include/asm/syscalls.h | |||
| @@ -34,6 +34,9 @@ asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, | |||
| 34 | asmlinkage int sys_sigaction(int sig, const struct old_sigaction *act, | 34 | asmlinkage int sys_sigaction(int sig, const struct old_sigaction *act, |
| 35 | struct old_sigaction *oact); | 35 | struct old_sigaction *oact); |
| 36 | 36 | ||
| 37 | asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, | ||
| 38 | struct sigaction __user *oact, size_t sigsetsize); | ||
| 39 | |||
| 37 | asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, | 40 | asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, |
| 38 | struct pt_regs *regs); | 41 | struct pt_regs *regs); |
| 39 | 42 | ||
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h index 4c3943e3f403..7fac44498445 100644 --- a/arch/microblaze/include/asm/thread_info.h +++ b/arch/microblaze/include/asm/thread_info.h | |||
| @@ -122,6 +122,8 @@ static inline struct thread_info *current_thread_info(void) | |||
| 122 | #define TIF_SINGLESTEP 4 | 122 | #define TIF_SINGLESTEP 4 |
| 123 | #define TIF_IRET 5 /* return with iret */ | 123 | #define TIF_IRET 5 /* return with iret */ |
| 124 | #define TIF_MEMDIE 6 | 124 | #define TIF_MEMDIE 6 |
| 125 | #define TIF_SYSCALL_AUDIT 9 /* syscall auditing active */ | ||
| 126 | #define TIF_SECCOMP 10 /* secure computing */ | ||
| 125 | #define TIF_FREEZE 14 /* Freezing for suspend */ | 127 | #define TIF_FREEZE 14 /* Freezing for suspend */ |
| 126 | 128 | ||
| 127 | /* FIXME change in entry.S */ | 129 | /* FIXME change in entry.S */ |
| @@ -138,10 +140,17 @@ static inline struct thread_info *current_thread_info(void) | |||
| 138 | #define _TIF_IRET (1<<TIF_IRET) | 140 | #define _TIF_IRET (1<<TIF_IRET) |
| 139 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | 141 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) |
| 140 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 142 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
| 143 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | ||
| 144 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) | ||
| 141 | #define _TIF_KERNEL_TRACE (1 << TIF_KERNEL_TRACE) | 145 | #define _TIF_KERNEL_TRACE (1 << TIF_KERNEL_TRACE) |
| 142 | 146 | ||
| 147 | /* work to do in syscall trace */ | ||
| 148 | #define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \ | ||
| 149 | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP) | ||
| 150 | |||
| 143 | /* work to do on interrupt/exception return */ | 151 | /* work to do on interrupt/exception return */ |
| 144 | #define _TIF_WORK_MASK 0x0000FFFE | 152 | #define _TIF_WORK_MASK 0x0000FFFE |
| 153 | |||
| 145 | /* work to do on any return to u-space */ | 154 | /* work to do on any return to u-space */ |
| 146 | #define _TIF_ALLWORK_MASK 0x0000FFFF | 155 | #define _TIF_ALLWORK_MASK 0x0000FFFF |
| 147 | 156 | ||
| @@ -154,6 +163,17 @@ static inline struct thread_info *current_thread_info(void) | |||
| 154 | */ | 163 | */ |
| 155 | /* FPU was used by this task this quantum (SMP) */ | 164 | /* FPU was used by this task this quantum (SMP) */ |
| 156 | #define TS_USEDFPU 0x0001 | 165 | #define TS_USEDFPU 0x0001 |
| 166 | #define TS_RESTORE_SIGMASK 0x0002 | ||
| 167 | |||
| 168 | #ifndef __ASSEMBLY__ | ||
| 169 | #define HAVE_SET_RESTORE_SIGMASK 1 | ||
| 170 | static inline void set_restore_sigmask(void) | ||
| 171 | { | ||
| 172 | struct thread_info *ti = current_thread_info(); | ||
| 173 | ti->status |= TS_RESTORE_SIGMASK; | ||
| 174 | set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags); | ||
| 175 | } | ||
| 176 | #endif | ||
| 157 | 177 | ||
| 158 | #endif /* __KERNEL__ */ | 178 | #endif /* __KERNEL__ */ |
| 159 | #endif /* _ASM_MICROBLAZE_THREAD_INFO_H */ | 179 | #endif /* _ASM_MICROBLAZE_THREAD_INFO_H */ |
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h index d1dfe3791127..c472d2801132 100644 --- a/arch/microblaze/include/asm/tlb.h +++ b/arch/microblaze/include/asm/tlb.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -13,4 +15,10 @@ | |||
| 13 | 15 | ||
| 14 | #include <asm-generic/tlb.h> | 16 | #include <asm-generic/tlb.h> |
| 15 | 17 | ||
| 18 | #ifdef CONFIG_MMU | ||
| 19 | #define tlb_start_vma(tlb, vma) do { } while (0) | ||
| 20 | #define tlb_end_vma(tlb, vma) do { } while (0) | ||
| 21 | #define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) | ||
| 22 | #endif | ||
| 23 | |||
| 16 | #endif /* _ASM_MICROBLAZE_TLB_H */ | 24 | #endif /* _ASM_MICROBLAZE_TLB_H */ |
diff --git a/arch/microblaze/include/asm/tlbflush.h b/arch/microblaze/include/asm/tlbflush.h index d7fe7629001b..eb31a0e8a772 100644 --- a/arch/microblaze/include/asm/tlbflush.h +++ b/arch/microblaze/include/asm/tlbflush.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -9,6 +11,50 @@ | |||
| 9 | #ifndef _ASM_MICROBLAZE_TLBFLUSH_H | 11 | #ifndef _ASM_MICROBLAZE_TLBFLUSH_H |
| 10 | #define _ASM_MICROBLAZE_TLBFLUSH_H | 12 | #define _ASM_MICROBLAZE_TLBFLUSH_H |
| 11 | 13 | ||
| 14 | #ifdef CONFIG_MMU | ||
| 15 | |||
| 16 | #include <linux/sched.h> | ||
| 17 | #include <linux/threads.h> | ||
| 18 | #include <asm/processor.h> /* For TASK_SIZE */ | ||
| 19 | #include <asm/mmu.h> | ||
| 20 | #include <asm/page.h> | ||
| 21 | #include <asm/pgalloc.h> | ||
| 22 | |||
| 23 | extern void _tlbie(unsigned long address); | ||
| 24 | extern void _tlbia(void); | ||
| 25 | |||
| 26 | #define __tlbia() _tlbia() | ||
| 27 | |||
| 28 | static inline void local_flush_tlb_all(void) | ||
| 29 | { __tlbia(); } | ||
| 30 | static inline void local_flush_tlb_mm(struct mm_struct *mm) | ||
| 31 | { __tlbia(); } | ||
| 32 | static inline void local_flush_tlb_page(struct vm_area_struct *vma, | ||
| 33 | unsigned long vmaddr) | ||
| 34 | { _tlbie(vmaddr); } | ||
| 35 | static inline void local_flush_tlb_range(struct vm_area_struct *vma, | ||
| 36 | unsigned long start, unsigned long end) | ||
| 37 | { __tlbia(); } | ||
| 38 | |||
| 39 | #define flush_tlb_kernel_range(start, end) do { } while (0) | ||
| 40 | |||
| 41 | #define update_mmu_cache(vma, addr, pte) do { } while (0) | ||
| 42 | |||
| 43 | #define flush_tlb_all local_flush_tlb_all | ||
| 44 | #define flush_tlb_mm local_flush_tlb_mm | ||
| 45 | #define flush_tlb_page local_flush_tlb_page | ||
| 46 | #define flush_tlb_range local_flush_tlb_range | ||
| 47 | |||
| 48 | /* | ||
| 49 | * This is called in munmap when we have freed up some page-table | ||
| 50 | * pages. We don't need to do anything here, there's nothing special | ||
| 51 | * about our page-table pages. -- paulus | ||
| 52 | */ | ||
| 53 | static inline void flush_tlb_pgtables(struct mm_struct *mm, | ||
| 54 | unsigned long start, unsigned long end) { } | ||
| 55 | |||
| 56 | #else /* CONFIG_MMU */ | ||
| 57 | |||
| 12 | #define flush_tlb() BUG() | 58 | #define flush_tlb() BUG() |
| 13 | #define flush_tlb_all() BUG() | 59 | #define flush_tlb_all() BUG() |
| 14 | #define flush_tlb_mm(mm) BUG() | 60 | #define flush_tlb_mm(mm) BUG() |
| @@ -17,4 +63,6 @@ | |||
| 17 | #define flush_tlb_pgtables(mm, start, end) BUG() | 63 | #define flush_tlb_pgtables(mm, start, end) BUG() |
| 18 | #define flush_tlb_kernel_range(start, end) BUG() | 64 | #define flush_tlb_kernel_range(start, end) BUG() |
| 19 | 65 | ||
| 66 | #endif /* CONFIG_MMU */ | ||
| 67 | |||
| 20 | #endif /* _ASM_MICROBLAZE_TLBFLUSH_H */ | 68 | #endif /* _ASM_MICROBLAZE_TLBFLUSH_H */ |
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h index 5a3ffc308e12..65adad61e7e9 100644 --- a/arch/microblaze/include/asm/uaccess.h +++ b/arch/microblaze/include/asm/uaccess.h | |||
| @@ -1,4 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2008-2009 PetaLogix | ||
| 2 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 3 | * | 5 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -26,6 +28,10 @@ | |||
| 26 | #define VERIFY_READ 0 | 28 | #define VERIFY_READ 0 |
| 27 | #define VERIFY_WRITE 1 | 29 | #define VERIFY_WRITE 1 |
| 28 | 30 | ||
| 31 | #define __clear_user(addr, n) (memset((void *)(addr), 0, (n)), 0) | ||
| 32 | |||
| 33 | #ifndef CONFIG_MMU | ||
| 34 | |||
| 29 | extern int ___range_ok(unsigned long addr, unsigned long size); | 35 | extern int ___range_ok(unsigned long addr, unsigned long size); |
| 30 | 36 | ||
| 31 | #define __range_ok(addr, size) \ | 37 | #define __range_ok(addr, size) \ |
| @@ -34,68 +40,68 @@ extern int ___range_ok(unsigned long addr, unsigned long size); | |||
| 34 | #define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0) | 40 | #define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0) |
| 35 | #define __access_ok(add, size) (__range_ok((addr), (size)) == 0) | 41 | #define __access_ok(add, size) (__range_ok((addr), (size)) == 0) |
| 36 | 42 | ||
| 37 | extern inline int bad_user_access_length(void) | 43 | /* Undefined function to trigger linker error */ |
| 38 | { | 44 | extern int bad_user_access_length(void); |
| 39 | return 0; | 45 | |
| 40 | } | ||
| 41 | /* FIXME this is function for optimalization -> memcpy */ | 46 | /* FIXME this is function for optimalization -> memcpy */ |
| 42 | #define __get_user(var, ptr) \ | 47 | #define __get_user(var, ptr) \ |
| 43 | ({ \ | 48 | ({ \ |
| 44 | int __gu_err = 0; \ | 49 | int __gu_err = 0; \ |
| 45 | switch (sizeof(*(ptr))) { \ | 50 | switch (sizeof(*(ptr))) { \ |
| 46 | case 1: \ | 51 | case 1: \ |
| 47 | case 2: \ | 52 | case 2: \ |
| 48 | case 4: \ | 53 | case 4: \ |
| 49 | (var) = *(ptr); \ | 54 | (var) = *(ptr); \ |
| 50 | break; \ | 55 | break; \ |
| 51 | case 8: \ | 56 | case 8: \ |
| 52 | memcpy((void *) &(var), (ptr), 8); \ | 57 | memcpy((void *) &(var), (ptr), 8); \ |
| 53 | break; \ | 58 | break; \ |
| 54 | default: \ | 59 | default: \ |
| 55 | (var) = 0; \ | 60 | (var) = 0; \ |
| 56 | __gu_err = __get_user_bad(); \ | 61 | __gu_err = __get_user_bad(); \ |
| 57 | break; \ | 62 | break; \ |
| 58 | } \ | 63 | } \ |
| 59 | __gu_err; \ | 64 | __gu_err; \ |
| 60 | }) | 65 | }) |
| 61 | 66 | ||
| 62 | #define __get_user_bad() (bad_user_access_length(), (-EFAULT)) | 67 | #define __get_user_bad() (bad_user_access_length(), (-EFAULT)) |
| 63 | 68 | ||
| 69 | /* FIXME is not there defined __pu_val */ | ||
| 64 | #define __put_user(var, ptr) \ | 70 | #define __put_user(var, ptr) \ |
| 65 | ({ \ | 71 | ({ \ |
| 66 | int __pu_err = 0; \ | 72 | int __pu_err = 0; \ |
| 67 | switch (sizeof(*(ptr))) { \ | 73 | switch (sizeof(*(ptr))) { \ |
| 68 | case 1: \ | 74 | case 1: \ |
| 69 | case 2: \ | 75 | case 2: \ |
| 70 | case 4: \ | 76 | case 4: \ |
| 71 | *(ptr) = (var); \ | 77 | *(ptr) = (var); \ |
| 72 | break; \ | 78 | break; \ |
| 73 | case 8: { \ | 79 | case 8: { \ |
| 74 | typeof(*(ptr)) __pu_val = var; \ | 80 | typeof(*(ptr)) __pu_val = (var); \ |
| 75 | memcpy(ptr, &__pu_val, sizeof(__pu_val));\ | 81 | memcpy(ptr, &__pu_val, sizeof(__pu_val)); \ |
| 76 | } \ | 82 | } \ |
| 77 | break; \ | 83 | break; \ |
| 78 | default: \ | 84 | default: \ |
| 79 | __pu_err = __put_user_bad(); \ | 85 | __pu_err = __put_user_bad(); \ |
| 80 | break; \ | 86 | break; \ |
| 81 | } \ | 87 | } \ |
| 82 | __pu_err; \ | 88 | __pu_err; \ |
| 83 | }) | 89 | }) |
| 84 | 90 | ||
| 85 | #define __put_user_bad() (bad_user_access_length(), (-EFAULT)) | 91 | #define __put_user_bad() (bad_user_access_length(), (-EFAULT)) |
| 86 | 92 | ||
| 87 | #define put_user(x, ptr) __put_user(x, ptr) | 93 | #define put_user(x, ptr) __put_user((x), (ptr)) |
| 88 | #define get_user(x, ptr) __get_user(x, ptr) | 94 | #define get_user(x, ptr) __get_user((x), (ptr)) |
| 89 | 95 | ||
| 90 | #define copy_to_user(to, from, n) (memcpy(to, from, n), 0) | 96 | #define copy_to_user(to, from, n) (memcpy((to), (from), (n)), 0) |
| 91 | #define copy_from_user(to, from, n) (memcpy(to, from, n), 0) | 97 | #define copy_from_user(to, from, n) (memcpy((to), (from), (n)), 0) |
| 92 | 98 | ||
| 93 | #define __copy_to_user(to, from, n) (copy_to_user(to, from, n)) | 99 | #define __copy_to_user(to, from, n) (copy_to_user((to), (from), (n))) |
| 94 | #define __copy_from_user(to, from, n) (copy_from_user(to, from, n)) | 100 | #define __copy_from_user(to, from, n) (copy_from_user((to), (from), (n))) |
| 95 | #define __copy_to_user_inatomic(to, from, n) (__copy_to_user(to, from, n)) | 101 | #define __copy_to_user_inatomic(to, from, n) \ |
| 96 | #define __copy_from_user_inatomic(to, from, n) (__copy_from_user(to, from, n)) | 102 | (__copy_to_user((to), (from), (n))) |
| 97 | 103 | #define __copy_from_user_inatomic(to, from, n) \ | |
| 98 | #define __clear_user(addr, n) (memset((void *)addr, 0, n), 0) | 104 | (__copy_from_user((to), (from), (n))) |
| 99 | 105 | ||
| 100 | static inline unsigned long clear_user(void *addr, unsigned long size) | 106 | static inline unsigned long clear_user(void *addr, unsigned long size) |
| 101 | { | 107 | { |
| @@ -104,13 +110,200 @@ static inline unsigned long clear_user(void *addr, unsigned long size) | |||
| 104 | return size; | 110 | return size; |
| 105 | } | 111 | } |
| 106 | 112 | ||
| 107 | /* Returns 0 if exception not found and fixup otherwise. */ | 113 | /* Returns 0 if exception not found and fixup otherwise. */ |
| 108 | extern unsigned long search_exception_table(unsigned long); | 114 | extern unsigned long search_exception_table(unsigned long); |
| 109 | 115 | ||
| 116 | extern long strncpy_from_user(char *dst, const char *src, long count); | ||
| 117 | extern long strnlen_user(const char *src, long count); | ||
| 118 | |||
| 119 | #else /* CONFIG_MMU */ | ||
| 120 | |||
| 121 | /* | ||
| 122 | * Address is valid if: | ||
| 123 | * - "addr", "addr + size" and "size" are all below the limit | ||
| 124 | */ | ||
| 125 | #define access_ok(type, addr, size) \ | ||
| 126 | (get_fs().seg > (((unsigned long)(addr)) | \ | ||
| 127 | (size) | ((unsigned long)(addr) + (size)))) | ||
| 128 | |||
| 129 | /* || printk("access_ok failed for %s at 0x%08lx (size %d), seg 0x%08x\n", | ||
| 130 | type?"WRITE":"READ",addr,size,get_fs().seg)) */ | ||
| 131 | |||
| 132 | /* | ||
| 133 | * All the __XXX versions macros/functions below do not perform | ||
| 134 | * access checking. It is assumed that the necessary checks have been | ||
| 135 | * already performed before the finction (macro) is called. | ||
| 136 | */ | ||
| 137 | |||
| 138 | #define get_user(x, ptr) \ | ||
| 139 | ({ \ | ||
| 140 | access_ok(VERIFY_READ, (ptr), sizeof(*(ptr))) \ | ||
| 141 | ? __get_user((x), (ptr)) : -EFAULT; \ | ||
| 142 | }) | ||
| 143 | |||
| 144 | #define put_user(x, ptr) \ | ||
| 145 | ({ \ | ||
| 146 | access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr))) \ | ||
| 147 | ? __put_user((x), (ptr)) : -EFAULT; \ | ||
| 148 | }) | ||
| 149 | |||
| 150 | #define __get_user(x, ptr) \ | ||
| 151 | ({ \ | ||
| 152 | unsigned long __gu_val; \ | ||
| 153 | /*unsigned long __gu_ptr = (unsigned long)(ptr);*/ \ | ||
| 154 | long __gu_err; \ | ||
| 155 | switch (sizeof(*(ptr))) { \ | ||
| 156 | case 1: \ | ||
| 157 | __get_user_asm("lbu", (ptr), __gu_val, __gu_err); \ | ||
| 158 | break; \ | ||
| 159 | case 2: \ | ||
| 160 | __get_user_asm("lhu", (ptr), __gu_val, __gu_err); \ | ||
| 161 | break; \ | ||
| 162 | case 4: \ | ||
| 163 | __get_user_asm("lw", (ptr), __gu_val, __gu_err); \ | ||
| 164 | break; \ | ||
| 165 | default: \ | ||
| 166 | __gu_val = 0; __gu_err = -EINVAL; \ | ||
| 167 | } \ | ||
| 168 | x = (__typeof__(*(ptr))) __gu_val; \ | ||
| 169 | __gu_err; \ | ||
| 170 | }) | ||
| 171 | |||
| 172 | #define __get_user_asm(insn, __gu_ptr, __gu_val, __gu_err) \ | ||
| 173 | ({ \ | ||
| 174 | __asm__ __volatile__ ( \ | ||
| 175 | "1:" insn " %1, %2, r0; \ | ||
| 176 | addk %0, r0, r0; \ | ||
| 177 | 2: \ | ||
| 178 | .section .fixup,\"ax\"; \ | ||
| 179 | 3: brid 2b; \ | ||
| 180 | addik %0, r0, %3; \ | ||
| 181 | .previous; \ | ||
| 182 | .section __ex_table,\"a\"; \ | ||
| 183 | .word 1b,3b; \ | ||
| 184 | .previous;" \ | ||
| 185 | : "=r"(__gu_err), "=r"(__gu_val) \ | ||
| 186 | : "r"(__gu_ptr), "i"(-EFAULT) \ | ||
| 187 | ); \ | ||
| 188 | }) | ||
| 189 | |||
| 190 | #define __put_user(x, ptr) \ | ||
| 191 | ({ \ | ||
| 192 | __typeof__(*(ptr)) __gu_val = x; \ | ||
| 193 | long __gu_err = 0; \ | ||
| 194 | switch (sizeof(__gu_val)) { \ | ||
| 195 | case 1: \ | ||
| 196 | __put_user_asm("sb", (ptr), __gu_val, __gu_err); \ | ||
| 197 | break; \ | ||
| 198 | case 2: \ | ||
| 199 | __put_user_asm("sh", (ptr), __gu_val, __gu_err); \ | ||
| 200 | break; \ | ||
| 201 | case 4: \ | ||
| 202 | __put_user_asm("sw", (ptr), __gu_val, __gu_err); \ | ||
| 203 | break; \ | ||
| 204 | case 8: \ | ||
| 205 | __put_user_asm_8((ptr), __gu_val, __gu_err); \ | ||
| 206 | break; \ | ||
| 207 | default: \ | ||
| 208 | __gu_err = -EINVAL; \ | ||
| 209 | } \ | ||
| 210 | __gu_err; \ | ||
| 211 | }) | ||
| 212 | |||
| 213 | #define __put_user_asm_8(__gu_ptr, __gu_val, __gu_err) \ | ||
| 214 | ({ \ | ||
| 215 | __asm__ __volatile__ (" lwi %0, %1, 0; \ | ||
| 216 | 1: swi %0, %2, 0; \ | ||
| 217 | lwi %0, %1, 4; \ | ||
| 218 | 2: swi %0, %2, 4; \ | ||
| 219 | addk %0,r0,r0; \ | ||
| 220 | 3: \ | ||
| 221 | .section .fixup,\"ax\"; \ | ||
| 222 | 4: brid 3b; \ | ||
| 223 | addik %0, r0, %3; \ | ||
| 224 | .previous; \ | ||
| 225 | .section __ex_table,\"a\"; \ | ||
| 226 | .word 1b,4b,2b,4b; \ | ||
| 227 | .previous;" \ | ||
| 228 | : "=&r"(__gu_err) \ | ||
| 229 | : "r"(&__gu_val), \ | ||
| 230 | "r"(__gu_ptr), "i"(-EFAULT) \ | ||
| 231 | ); \ | ||
| 232 | }) | ||
| 233 | |||
| 234 | #define __put_user_asm(insn, __gu_ptr, __gu_val, __gu_err) \ | ||
| 235 | ({ \ | ||
| 236 | __asm__ __volatile__ ( \ | ||
| 237 | "1:" insn " %1, %2, r0; \ | ||
| 238 | addk %0, r0, r0; \ | ||
| 239 | 2: \ | ||
| 240 | .section .fixup,\"ax\"; \ | ||
| 241 | 3: brid 2b; \ | ||
| 242 | addik %0, r0, %3; \ | ||
| 243 | .previous; \ | ||
| 244 | .section __ex_table,\"a\"; \ | ||
| 245 | .word 1b,3b; \ | ||
| 246 | .previous;" \ | ||
| 247 | : "=r"(__gu_err) \ | ||
| 248 | : "r"(__gu_val), "r"(__gu_ptr), "i"(-EFAULT) \ | ||
| 249 | ); \ | ||
| 250 | }) | ||
| 251 | |||
| 252 | /* | ||
| 253 | * Return: number of not copied bytes, i.e. 0 if OK or non-zero if fail. | ||
| 254 | */ | ||
| 255 | static inline int clear_user(char *to, int size) | ||
| 256 | { | ||
| 257 | if (size && access_ok(VERIFY_WRITE, to, size)) { | ||
| 258 | __asm__ __volatile__ (" \ | ||
| 259 | 1: \ | ||
| 260 | sb r0, %2, r0; \ | ||
| 261 | addik %0, %0, -1; \ | ||
| 262 | bneid %0, 1b; \ | ||
| 263 | addik %2, %2, 1; \ | ||
| 264 | 2: \ | ||
| 265 | .section __ex_table,\"a\"; \ | ||
| 266 | .word 1b,2b; \ | ||
| 267 | .section .text;" \ | ||
| 268 | : "=r"(size) \ | ||
| 269 | : "0"(size), "r"(to) | ||
| 270 | ); | ||
| 271 | } | ||
| 272 | return size; | ||
| 273 | } | ||
| 274 | |||
| 275 | extern unsigned long __copy_tofrom_user(void __user *to, | ||
| 276 | const void __user *from, unsigned long size); | ||
| 277 | |||
| 278 | #define copy_to_user(to, from, n) \ | ||
| 279 | (access_ok(VERIFY_WRITE, (to), (n)) ? \ | ||
| 280 | __copy_tofrom_user((void __user *)(to), \ | ||
| 281 | (__force const void __user *)(from), (n)) \ | ||
| 282 | : -EFAULT) | ||
| 283 | |||
| 284 | #define __copy_to_user(to, from, n) copy_to_user((to), (from), (n)) | ||
| 285 | #define __copy_to_user_inatomic(to, from, n) copy_to_user((to), (from), (n)) | ||
| 286 | |||
| 287 | #define copy_from_user(to, from, n) \ | ||
| 288 | (access_ok(VERIFY_READ, (from), (n)) ? \ | ||
| 289 | __copy_tofrom_user((__force void __user *)(to), \ | ||
| 290 | (void __user *)(from), (n)) \ | ||
| 291 | : -EFAULT) | ||
| 292 | |||
| 293 | #define __copy_from_user(to, from, n) copy_from_user((to), (from), (n)) | ||
| 294 | #define __copy_from_user_inatomic(to, from, n) \ | ||
| 295 | copy_from_user((to), (from), (n)) | ||
| 296 | |||
| 297 | extern int __strncpy_user(char *to, const char __user *from, int len); | ||
| 298 | extern int __strnlen_user(const char __user *sstr, int len); | ||
| 299 | |||
| 300 | #define strncpy_from_user(to, from, len) \ | ||
| 301 | (access_ok(VERIFY_READ, from, 1) ? \ | ||
| 302 | __strncpy_user(to, from, len) : -EFAULT) | ||
| 303 | #define strnlen_user(str, len) \ | ||
| 304 | (access_ok(VERIFY_READ, str, 1) ? __strnlen_user(str, len) : 0) | ||
| 110 | 305 | ||
| 111 | extern long strncpy_from_user(char *dst, const char __user *src, long count); | 306 | #endif /* CONFIG_MMU */ |
| 112 | extern long strnlen_user(const char __user *src, long count); | ||
| 113 | extern long __strncpy_from_user(char *dst, const char __user *src, long count); | ||
| 114 | 307 | ||
| 115 | /* | 308 | /* |
| 116 | * The exception table consists of pairs of addresses: the first is the | 309 | * The exception table consists of pairs of addresses: the first is the |
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h index 9d66b640c910..3658d91ac0fb 100644 --- a/arch/microblaze/include/asm/unaligned.h +++ b/arch/microblaze/include/asm/unaligned.h | |||
| @@ -12,7 +12,8 @@ | |||
| 12 | 12 | ||
| 13 | # ifdef __KERNEL__ | 13 | # ifdef __KERNEL__ |
| 14 | 14 | ||
| 15 | # include <linux/unaligned/access_ok.h> | 15 | # include <linux/unaligned/be_struct.h> |
| 16 | # include <linux/unaligned/le_byteshift.h> | ||
| 16 | # include <linux/unaligned/generic.h> | 17 | # include <linux/unaligned/generic.h> |
| 17 | 18 | ||
| 18 | # define get_unaligned __get_unaligned_be | 19 | # define get_unaligned __get_unaligned_be |
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile index da94bec4ecba..f4a5e19a20eb 100644 --- a/arch/microblaze/kernel/Makefile +++ b/arch/microblaze/kernel/Makefile | |||
| @@ -15,5 +15,6 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | |||
| 15 | obj-$(CONFIG_SELFMOD) += selfmod.o | 15 | obj-$(CONFIG_SELFMOD) += selfmod.o |
| 16 | obj-$(CONFIG_HEART_BEAT) += heartbeat.o | 16 | obj-$(CONFIG_HEART_BEAT) += heartbeat.o |
| 17 | obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o | 17 | obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o |
| 18 | obj-$(CONFIG_MMU) += misc.o | ||
| 18 | 19 | ||
| 19 | obj-y += entry$(MMUEXT).o | 20 | obj-y += entry$(MMUEXT).o |
diff --git a/arch/microblaze/kernel/asm-offsets.c b/arch/microblaze/kernel/asm-offsets.c index aabd9e9423a6..7bc7b68f97db 100644 --- a/arch/microblaze/kernel/asm-offsets.c +++ b/arch/microblaze/kernel/asm-offsets.c | |||
| @@ -1,4 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> | ||
| 2 | * Copyright (C) 2007-2009 PetaLogix | 3 | * Copyright (C) 2007-2009 PetaLogix |
| 3 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 4 | * | 5 | * |
| @@ -68,16 +69,26 @@ int main(int argc, char *argv[]) | |||
| 68 | 69 | ||
| 69 | /* struct task_struct */ | 70 | /* struct task_struct */ |
| 70 | DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack)); | 71 | DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack)); |
| 72 | #ifdef CONFIG_MMU | ||
| 73 | DEFINE(TASK_STATE, offsetof(struct task_struct, state)); | ||
| 74 | DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags)); | ||
| 75 | DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace)); | ||
| 76 | DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked)); | ||
| 77 | DEFINE(TASK_MM, offsetof(struct task_struct, mm)); | ||
| 78 | DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); | ||
| 79 | DEFINE(TASK_PID, offsetof(struct task_struct, pid)); | ||
| 80 | DEFINE(TASK_THREAD, offsetof(struct task_struct, thread)); | ||
| 81 | DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); | ||
| 82 | BLANK(); | ||
| 83 | |||
| 84 | DEFINE(PGDIR, offsetof(struct thread_struct, pgdir)); | ||
| 85 | BLANK(); | ||
| 86 | #endif | ||
| 71 | 87 | ||
| 72 | /* struct thread_info */ | 88 | /* struct thread_info */ |
| 73 | DEFINE(TI_TASK, offsetof(struct thread_info, task)); | 89 | DEFINE(TI_TASK, offsetof(struct thread_info, task)); |
| 74 | DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); | ||
| 75 | DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); | 90 | DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); |
| 76 | DEFINE(TI_STATUS, offsetof(struct thread_info, status)); | ||
| 77 | DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); | ||
| 78 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); | ||
| 79 | DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); | 91 | DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); |
| 80 | DEFINE(TI_RESTART_BLOCK, offsetof(struct thread_info, restart_block)); | ||
| 81 | DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context)); | 92 | DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context)); |
| 82 | BLANK(); | 93 | BLANK(); |
| 83 | 94 | ||
diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c index 4b0f0fdb9ca0..7de84923ba07 100644 --- a/arch/microblaze/kernel/early_printk.c +++ b/arch/microblaze/kernel/early_printk.c | |||
| @@ -87,6 +87,9 @@ int __init setup_early_printk(char *opt) | |||
| 87 | base_addr = early_uartlite_console(); | 87 | base_addr = early_uartlite_console(); |
| 88 | if (base_addr) { | 88 | if (base_addr) { |
| 89 | early_console_initialized = 1; | 89 | early_console_initialized = 1; |
| 90 | #ifdef CONFIG_MMU | ||
| 91 | early_console_reg_tlb_alloc(base_addr); | ||
| 92 | #endif | ||
| 90 | early_printk("early_printk_console is enabled at 0x%08x\n", | 93 | early_printk("early_printk_console is enabled at 0x%08x\n", |
| 91 | base_addr); | 94 | base_addr); |
| 92 | 95 | ||
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S index f24b1268baaf..1fce6b803f54 100644 --- a/arch/microblaze/kernel/entry-nommu.S +++ b/arch/microblaze/kernel/entry-nommu.S | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | 10 | ||
| 11 | #include <linux/linkage.h> | 11 | #include <linux/linkage.h> |
| 12 | #include <asm/thread_info.h> | 12 | #include <asm/thread_info.h> |
| 13 | #include <asm/errno.h> | 13 | #include <linux/errno.h> |
| 14 | #include <asm/entry.h> | 14 | #include <asm/entry.h> |
| 15 | #include <asm/asm-offsets.h> | 15 | #include <asm/asm-offsets.h> |
| 16 | #include <asm/registers.h> | 16 | #include <asm/registers.h> |
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S new file mode 100644 index 000000000000..91a0e7b185dd --- /dev/null +++ b/arch/microblaze/kernel/entry.S | |||
| @@ -0,0 +1,1116 @@ | |||
| 1 | /* | ||
| 2 | * Low-level system-call handling, trap handlers and context-switching | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 5 | * Copyright (C) 2008-2009 PetaLogix | ||
| 6 | * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> | ||
| 7 | * Copyright (C) 2001,2002 NEC Corporation | ||
| 8 | * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> | ||
| 9 | * | ||
| 10 | * This file is subject to the terms and conditions of the GNU General | ||
| 11 | * Public License. See the file COPYING in the main directory of this | ||
| 12 | * archive for more details. | ||
| 13 | * | ||
| 14 | * Written by Miles Bader <miles@gnu.org> | ||
| 15 | * Heavily modified by John Williams for Microblaze | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/sys.h> | ||
| 19 | #include <linux/linkage.h> | ||
| 20 | |||
| 21 | #include <asm/entry.h> | ||
| 22 | #include <asm/current.h> | ||
| 23 | #include <asm/processor.h> | ||
| 24 | #include <asm/exceptions.h> | ||
| 25 | #include <asm/asm-offsets.h> | ||
| 26 | #include <asm/thread_info.h> | ||
| 27 | |||
| 28 | #include <asm/page.h> | ||
| 29 | #include <asm/unistd.h> | ||
| 30 | |||
| 31 | #include <linux/errno.h> | ||
| 32 | #include <asm/signal.h> | ||
| 33 | |||
| 34 | /* The size of a state save frame. */ | ||
| 35 | #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE) | ||
| 36 | |||
| 37 | /* The offset of the struct pt_regs in a `state save frame' on the stack. */ | ||
| 38 | #define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */ | ||
| 39 | |||
| 40 | #define C_ENTRY(name) .globl name; .align 4; name | ||
| 41 | |||
| 42 | /* | ||
| 43 | * Various ways of setting and clearing BIP in flags reg. | ||
| 44 | * This is mucky, but necessary using microblaze version that | ||
| 45 | * allows msr ops to write to BIP | ||
| 46 | */ | ||
| 47 | #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR | ||
| 48 | .macro clear_bip | ||
| 49 | msrclr r11, MSR_BIP | ||
| 50 | nop | ||
| 51 | .endm | ||
| 52 | |||
| 53 | .macro set_bip | ||
| 54 | msrset r11, MSR_BIP | ||
| 55 | nop | ||
| 56 | .endm | ||
| 57 | |||
| 58 | .macro clear_eip | ||
| 59 | msrclr r11, MSR_EIP | ||
| 60 | nop | ||
| 61 | .endm | ||
| 62 | |||
| 63 | .macro set_ee | ||
| 64 | msrset r11, MSR_EE | ||
| 65 | nop | ||
| 66 | .endm | ||
| 67 | |||
| 68 | .macro disable_irq | ||
| 69 | msrclr r11, MSR_IE | ||
| 70 | nop | ||
| 71 | .endm | ||
| 72 | |||
| 73 | .macro enable_irq | ||
| 74 | msrset r11, MSR_IE | ||
| 75 | nop | ||
| 76 | .endm | ||
| 77 | |||
| 78 | .macro set_ums | ||
| 79 | msrset r11, MSR_UMS | ||
| 80 | nop | ||
| 81 | msrclr r11, MSR_VMS | ||
| 82 | nop | ||
| 83 | .endm | ||
| 84 | |||
| 85 | .macro set_vms | ||
| 86 | msrclr r11, MSR_UMS | ||
| 87 | nop | ||
| 88 | msrset r11, MSR_VMS | ||
| 89 | nop | ||
| 90 | .endm | ||
| 91 | |||
| 92 | .macro clear_vms_ums | ||
| 93 | msrclr r11, MSR_VMS | ||
| 94 | nop | ||
| 95 | msrclr r11, MSR_UMS | ||
| 96 | nop | ||
| 97 | .endm | ||
| 98 | #else | ||
| 99 | .macro clear_bip | ||
| 100 | mfs r11, rmsr | ||
| 101 | nop | ||
| 102 | andi r11, r11, ~MSR_BIP | ||
| 103 | mts rmsr, r11 | ||
| 104 | nop | ||
| 105 | .endm | ||
| 106 | |||
| 107 | .macro set_bip | ||
| 108 | mfs r11, rmsr | ||
| 109 | nop | ||
| 110 | ori r11, r11, MSR_BIP | ||
| 111 | mts rmsr, r11 | ||
| 112 | nop | ||
| 113 | .endm | ||
| 114 | |||
| 115 | .macro clear_eip | ||
| 116 | mfs r11, rmsr | ||
| 117 | nop | ||
| 118 | andi r11, r11, ~MSR_EIP | ||
| 119 | mts rmsr, r11 | ||
| 120 | nop | ||
| 121 | .endm | ||
| 122 | |||
| 123 | .macro set_ee | ||
| 124 | mfs r11, rmsr | ||
| 125 | nop | ||
| 126 | ori r11, r11, MSR_EE | ||
| 127 | mts rmsr, r11 | ||
| 128 | nop | ||
| 129 | .endm | ||
| 130 | |||
| 131 | .macro disable_irq | ||
| 132 | mfs r11, rmsr | ||
| 133 | nop | ||
| 134 | andi r11, r11, ~MSR_IE | ||
| 135 | mts rmsr, r11 | ||
| 136 | nop | ||
| 137 | .endm | ||
| 138 | |||
| 139 | .macro enable_irq | ||
| 140 | mfs r11, rmsr | ||
| 141 | nop | ||
| 142 | ori r11, r11, MSR_IE | ||
| 143 | mts rmsr, r11 | ||
| 144 | nop | ||
| 145 | .endm | ||
| 146 | |||
| 147 | .macro set_ums | ||
| 148 | mfs r11, rmsr | ||
| 149 | nop | ||
| 150 | ori r11, r11, MSR_VMS | ||
| 151 | andni r11, r11, MSR_UMS | ||
| 152 | mts rmsr, r11 | ||
| 153 | nop | ||
| 154 | .endm | ||
| 155 | |||
| 156 | .macro set_vms | ||
| 157 | mfs r11, rmsr | ||
| 158 | nop | ||
| 159 | ori r11, r11, MSR_VMS | ||
| 160 | andni r11, r11, MSR_UMS | ||
| 161 | mts rmsr, r11 | ||
| 162 | nop | ||
| 163 | .endm | ||
| 164 | |||
| 165 | .macro clear_vms_ums | ||
| 166 | mfs r11, rmsr | ||
| 167 | nop | ||
| 168 | andni r11, r11, (MSR_VMS|MSR_UMS) | ||
| 169 | mts rmsr,r11 | ||
| 170 | nop | ||
| 171 | .endm | ||
| 172 | #endif | ||
| 173 | |||
| 174 | /* Define how to call high-level functions. With MMU, virtual mode must be | ||
| 175 | * enabled when calling the high-level function. Clobbers R11. | ||
| 176 | * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL | ||
| 177 | */ | ||
| 178 | |||
| 179 | /* turn on virtual protected mode save */ | ||
| 180 | #define VM_ON \ | ||
| 181 | set_ums; \ | ||
| 182 | rted r0, 2f; \ | ||
| 183 | 2: nop; | ||
| 184 | |||
| 185 | /* turn off virtual protected mode save and user mode save*/ | ||
| 186 | #define VM_OFF \ | ||
| 187 | clear_vms_ums; \ | ||
| 188 | rted r0, TOPHYS(1f); \ | ||
| 189 | 1: nop; | ||
| 190 | |||
| 191 | #define SAVE_REGS \ | ||
| 192 | swi r2, r1, PTO+PT_R2; /* Save SDA */ \ | ||
| 193 | swi r5, r1, PTO+PT_R5; \ | ||
| 194 | swi r6, r1, PTO+PT_R6; \ | ||
| 195 | swi r7, r1, PTO+PT_R7; \ | ||
| 196 | swi r8, r1, PTO+PT_R8; \ | ||
| 197 | swi r9, r1, PTO+PT_R9; \ | ||
| 198 | swi r10, r1, PTO+PT_R10; \ | ||
| 199 | swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\ | ||
| 200 | swi r12, r1, PTO+PT_R12; \ | ||
| 201 | swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \ | ||
| 202 | swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \ | ||
| 203 | swi r15, r1, PTO+PT_R15; /* Save LP */ \ | ||
| 204 | swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \ | ||
| 205 | swi r19, r1, PTO+PT_R19; \ | ||
| 206 | swi r20, r1, PTO+PT_R20; \ | ||
| 207 | swi r21, r1, PTO+PT_R21; \ | ||
| 208 | swi r22, r1, PTO+PT_R22; \ | ||
| 209 | swi r23, r1, PTO+PT_R23; \ | ||
| 210 | swi r24, r1, PTO+PT_R24; \ | ||
| 211 | swi r25, r1, PTO+PT_R25; \ | ||
| 212 | swi r26, r1, PTO+PT_R26; \ | ||
| 213 | swi r27, r1, PTO+PT_R27; \ | ||
| 214 | swi r28, r1, PTO+PT_R28; \ | ||
| 215 | swi r29, r1, PTO+PT_R29; \ | ||
| 216 | swi r30, r1, PTO+PT_R30; \ | ||
| 217 | swi r31, r1, PTO+PT_R31; /* Save current task reg */ \ | ||
| 218 | mfs r11, rmsr; /* save MSR */ \ | ||
| 219 | nop; \ | ||
| 220 | swi r11, r1, PTO+PT_MSR; | ||
| 221 | |||
| 222 | #define RESTORE_REGS \ | ||
| 223 | lwi r11, r1, PTO+PT_MSR; \ | ||
| 224 | mts rmsr , r11; \ | ||
| 225 | nop; \ | ||
| 226 | lwi r2, r1, PTO+PT_R2; /* restore SDA */ \ | ||
| 227 | lwi r5, r1, PTO+PT_R5; \ | ||
| 228 | lwi r6, r1, PTO+PT_R6; \ | ||
| 229 | lwi r7, r1, PTO+PT_R7; \ | ||
| 230 | lwi r8, r1, PTO+PT_R8; \ | ||
| 231 | lwi r9, r1, PTO+PT_R9; \ | ||
| 232 | lwi r10, r1, PTO+PT_R10; \ | ||
| 233 | lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\ | ||
| 234 | lwi r12, r1, PTO+PT_R12; \ | ||
| 235 | lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \ | ||
| 236 | lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ | ||
| 237 | lwi r15, r1, PTO+PT_R15; /* restore LP */ \ | ||
| 238 | lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \ | ||
| 239 | lwi r19, r1, PTO+PT_R19; \ | ||
| 240 | lwi r20, r1, PTO+PT_R20; \ | ||
| 241 | lwi r21, r1, PTO+PT_R21; \ | ||
| 242 | lwi r22, r1, PTO+PT_R22; \ | ||
| 243 | lwi r23, r1, PTO+PT_R23; \ | ||
| 244 | lwi r24, r1, PTO+PT_R24; \ | ||
| 245 | lwi r25, r1, PTO+PT_R25; \ | ||
| 246 | lwi r26, r1, PTO+PT_R26; \ | ||
| 247 | lwi r27, r1, PTO+PT_R27; \ | ||
| 248 | lwi r28, r1, PTO+PT_R28; \ | ||
| 249 | lwi r29, r1, PTO+PT_R29; \ | ||
| 250 | lwi r30, r1, PTO+PT_R30; \ | ||
| 251 | lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */ | ||
| 252 | |||
| 253 | .text | ||
| 254 | |||
| 255 | /* | ||
| 256 | * User trap. | ||
| 257 | * | ||
| 258 | * System calls are handled here. | ||
| 259 | * | ||
| 260 | * Syscall protocol: | ||
| 261 | * Syscall number in r12, args in r5-r10 | ||
| 262 | * Return value in r3 | ||
| 263 | * | ||
| 264 | * Trap entered via brki instruction, so BIP bit is set, and interrupts | ||
| 265 | * are masked. This is nice, means we don't have to CLI before state save | ||
| 266 | */ | ||
| 267 | C_ENTRY(_user_exception): | ||
| 268 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ | ||
| 269 | addi r14, r14, 4 /* return address is 4 byte after call */ | ||
| 270 | swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */ | ||
| 271 | |||
| 272 | lwi r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/ | ||
| 273 | beqi r11, 1f; /* Jump ahead if coming from user */ | ||
| 274 | /* Kernel-mode state save. */ | ||
| 275 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ | ||
| 276 | tophys(r1,r11); | ||
| 277 | swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */ | ||
| 278 | lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */ | ||
| 279 | |||
| 280 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | ||
| 281 | SAVE_REGS | ||
| 282 | |||
| 283 | addi r11, r0, 1; /* Was in kernel-mode. */ | ||
| 284 | swi r11, r1, PTO+PT_MODE; /* pt_regs -> kernel mode */ | ||
| 285 | brid 2f; | ||
| 286 | nop; /* Fill delay slot */ | ||
| 287 | |||
| 288 | /* User-mode state save. */ | ||
| 289 | 1: | ||
| 290 | lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */ | ||
| 291 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | ||
| 292 | tophys(r1,r1); | ||
| 293 | lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */ | ||
| 294 | /* calculate kernel stack pointer from task struct 8k */ | ||
| 295 | addik r1, r1, THREAD_SIZE; | ||
| 296 | tophys(r1,r1); | ||
| 297 | |||
| 298 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | ||
| 299 | SAVE_REGS | ||
| 300 | |||
| 301 | swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ | ||
| 302 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | ||
| 303 | swi r11, r1, PTO+PT_R1; /* Store user SP. */ | ||
| 304 | addi r11, r0, 1; | ||
| 305 | swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode. */ | ||
| 306 | 2: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | ||
| 307 | /* Save away the syscall number. */ | ||
| 308 | swi r12, r1, PTO+PT_R0; | ||
| 309 | tovirt(r1,r1) | ||
| 310 | |||
| 311 | la r15, r0, ret_from_trap-8 | ||
| 312 | /* where the trap should return need -8 to adjust for rtsd r15, 8*/ | ||
| 313 | /* Jump to the appropriate function for the system call number in r12 | ||
| 314 | * (r12 is not preserved), or return an error if r12 is not valid. The LP | ||
| 315 | * register should point to the location where | ||
| 316 | * the called function should return. [note that MAKE_SYS_CALL uses label 1] */ | ||
| 317 | /* See if the system call number is valid. */ | ||
| 318 | addi r11, r12, -__NR_syscalls; | ||
| 319 | bgei r11,1f; | ||
| 320 | /* Figure out which function to use for this system call. */ | ||
| 321 | /* Note Microblaze barrel shift is optional, so don't rely on it */ | ||
| 322 | add r12, r12, r12; /* convert num -> ptr */ | ||
| 323 | add r12, r12, r12; | ||
| 324 | |||
| 325 | /* Trac syscalls and stored them to r0_ram */ | ||
| 326 | lwi r3, r12, 0x400 + TOPHYS(r0_ram) | ||
| 327 | addi r3, r3, 1 | ||
| 328 | swi r3, r12, 0x400 + TOPHYS(r0_ram) | ||
| 329 | |||
| 330 | lwi r12, r12, TOPHYS(sys_call_table); /* Function ptr */ | ||
| 331 | /* Make the system call. to r12*/ | ||
| 332 | set_vms; | ||
| 333 | rtid r12, 0; | ||
| 334 | nop; | ||
| 335 | /* The syscall number is invalid, return an error. */ | ||
| 336 | 1: VM_ON; /* RETURN() expects virtual mode*/ | ||
| 337 | addi r3, r0, -ENOSYS; | ||
| 338 | rtsd r15,8; /* looks like a normal subroutine return */ | ||
| 339 | or r0, r0, r0 | ||
| 340 | |||
| 341 | |||
| 342 | /* Entry point used to return from a syscall/trap. */ | ||
| 343 | /* We re-enable BIP bit before state restore */ | ||
| 344 | C_ENTRY(ret_from_trap): | ||
| 345 | set_bip; /* Ints masked for state restore*/ | ||
| 346 | lwi r11, r1, PTO+PT_MODE; | ||
| 347 | /* See if returning to kernel mode, if so, skip resched &c. */ | ||
| 348 | bnei r11, 2f; | ||
| 349 | |||
| 350 | /* We're returning to user mode, so check for various conditions that | ||
| 351 | * trigger rescheduling. */ | ||
| 352 | /* Get current task ptr into r11 */ | ||
| 353 | add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 354 | lwi r11, r11, TS_THREAD_INFO; /* get thread info */ | ||
| 355 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 356 | andi r11, r11, _TIF_NEED_RESCHED; | ||
| 357 | beqi r11, 5f; | ||
| 358 | |||
| 359 | swi r3, r1, PTO + PT_R3; /* store syscall result */ | ||
| 360 | swi r4, r1, PTO + PT_R4; | ||
| 361 | bralid r15, schedule; /* Call scheduler */ | ||
| 362 | nop; /* delay slot */ | ||
| 363 | lwi r3, r1, PTO + PT_R3; /* restore syscall result */ | ||
| 364 | lwi r4, r1, PTO + PT_R4; | ||
| 365 | |||
| 366 | /* Maybe handle a signal */ | ||
| 367 | 5: add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 368 | lwi r11, r11, TS_THREAD_INFO; /* get thread info */ | ||
| 369 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 370 | andi r11, r11, _TIF_SIGPENDING; | ||
| 371 | beqi r11, 1f; /* Signals to handle, handle them */ | ||
| 372 | |||
| 373 | swi r3, r1, PTO + PT_R3; /* store syscall result */ | ||
| 374 | swi r4, r1, PTO + PT_R4; | ||
| 375 | la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ | ||
| 376 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ | ||
| 377 | addi r7, r0, 1; /* Arg 3: int in_syscall */ | ||
| 378 | bralid r15, do_signal; /* Handle any signals */ | ||
| 379 | nop; | ||
| 380 | lwi r3, r1, PTO + PT_R3; /* restore syscall result */ | ||
| 381 | lwi r4, r1, PTO + PT_R4; | ||
| 382 | |||
| 383 | /* Finally, return to user state. */ | ||
| 384 | 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */ | ||
| 385 | add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 386 | swi r11, r0, PER_CPU(CURRENT_SAVE); /* save current */ | ||
| 387 | VM_OFF; | ||
| 388 | tophys(r1,r1); | ||
| 389 | RESTORE_REGS; | ||
| 390 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | ||
| 391 | lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ | ||
| 392 | bri 6f; | ||
| 393 | |||
| 394 | /* Return to kernel state. */ | ||
| 395 | 2: VM_OFF; | ||
| 396 | tophys(r1,r1); | ||
| 397 | RESTORE_REGS; | ||
| 398 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | ||
| 399 | tovirt(r1,r1); | ||
| 400 | 6: | ||
| 401 | TRAP_return: /* Make global symbol for debugging */ | ||
| 402 | rtbd r14, 0; /* Instructions to return from an IRQ */ | ||
| 403 | nop; | ||
| 404 | |||
| 405 | |||
| 406 | /* These syscalls need access to the struct pt_regs on the stack, so we | ||
| 407 | implement them in assembly (they're basically all wrappers anyway). */ | ||
| 408 | |||
| 409 | C_ENTRY(sys_fork_wrapper): | ||
| 410 | addi r5, r0, SIGCHLD /* Arg 0: flags */ | ||
| 411 | lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */ | ||
| 412 | la r7, r1, PTO /* Arg 2: parent context */ | ||
| 413 | add r8. r0, r0 /* Arg 3: (unused) */ | ||
| 414 | add r9, r0, r0; /* Arg 4: (unused) */ | ||
| 415 | add r10, r0, r0; /* Arg 5: (unused) */ | ||
| 416 | brid do_fork /* Do real work (tail-call) */ | ||
| 417 | nop; | ||
| 418 | |||
| 419 | /* This the initial entry point for a new child thread, with an appropriate | ||
| 420 | stack in place that makes it look the the child is in the middle of an | ||
| 421 | syscall. This function is actually `returned to' from switch_thread | ||
| 422 | (copy_thread makes ret_from_fork the return address in each new thread's | ||
| 423 | saved context). */ | ||
| 424 | C_ENTRY(ret_from_fork): | ||
| 425 | bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ | ||
| 426 | add r3, r5, r0; /* switch_thread returns the prev task */ | ||
| 427 | /* ( in the delay slot ) */ | ||
| 428 | add r3, r0, r0; /* Child's fork call should return 0. */ | ||
| 429 | brid ret_from_trap; /* Do normal trap return */ | ||
| 430 | nop; | ||
| 431 | |||
| 432 | C_ENTRY(sys_vfork_wrapper): | ||
| 433 | la r5, r1, PTO | ||
| 434 | brid sys_vfork /* Do real work (tail-call) */ | ||
| 435 | nop | ||
| 436 | |||
| 437 | C_ENTRY(sys_clone_wrapper): | ||
| 438 | bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ | ||
| 439 | lwi r6, r1, PTO+PT_R1; /* If so, use paret's stack ptr */ | ||
| 440 | 1: la r7, r1, PTO; /* Arg 2: parent context */ | ||
| 441 | add r8, r0, r0; /* Arg 3: (unused) */ | ||
| 442 | add r9, r0, r0; /* Arg 4: (unused) */ | ||
| 443 | add r10, r0, r0; /* Arg 5: (unused) */ | ||
| 444 | brid do_fork /* Do real work (tail-call) */ | ||
| 445 | nop; | ||
| 446 | |||
| 447 | C_ENTRY(sys_execve_wrapper): | ||
| 448 | la r8, r1, PTO; /* add user context as 4th arg */ | ||
| 449 | brid sys_execve; /* Do real work (tail-call).*/ | ||
| 450 | nop; | ||
| 451 | |||
| 452 | C_ENTRY(sys_sigsuspend_wrapper): | ||
| 453 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 454 | swi r4, r1, PTO+PT_R4; | ||
| 455 | la r6, r1, PTO; /* add user context as 2nd arg */ | ||
| 456 | bralid r15, sys_sigsuspend; /* Do real work.*/ | ||
| 457 | nop; | ||
| 458 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 459 | lwi r4, r1, PTO+PT_R4; | ||
| 460 | bri ret_from_trap /* fall through will not work here due to align */ | ||
| 461 | nop; | ||
| 462 | |||
| 463 | C_ENTRY(sys_rt_sigsuspend_wrapper): | ||
| 464 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 465 | swi r4, r1, PTO+PT_R4; | ||
| 466 | la r7, r1, PTO; /* add user context as 3rd arg */ | ||
| 467 | brlid r15, sys_rt_sigsuspend; /* Do real work.*/ | ||
| 468 | nop; | ||
| 469 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 470 | lwi r4, r1, PTO+PT_R4; | ||
| 471 | bri ret_from_trap /* fall through will not work here due to align */ | ||
| 472 | nop; | ||
| 473 | |||
| 474 | |||
| 475 | C_ENTRY(sys_sigreturn_wrapper): | ||
| 476 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 477 | swi r4, r1, PTO+PT_R4; | ||
| 478 | la r5, r1, PTO; /* add user context as 1st arg */ | ||
| 479 | brlid r15, sys_sigreturn; /* Do real work.*/ | ||
| 480 | nop; | ||
| 481 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 482 | lwi r4, r1, PTO+PT_R4; | ||
| 483 | bri ret_from_trap /* fall through will not work here due to align */ | ||
| 484 | nop; | ||
| 485 | |||
| 486 | C_ENTRY(sys_rt_sigreturn_wrapper): | ||
| 487 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 488 | swi r4, r1, PTO+PT_R4; | ||
| 489 | la r5, r1, PTO; /* add user context as 1st arg */ | ||
| 490 | brlid r15, sys_rt_sigreturn /* Do real work */ | ||
| 491 | nop; | ||
| 492 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 493 | lwi r4, r1, PTO+PT_R4; | ||
| 494 | bri ret_from_trap /* fall through will not work here due to align */ | ||
| 495 | nop; | ||
| 496 | |||
| 497 | /* | ||
| 498 | * HW EXCEPTION rutine start | ||
| 499 | */ | ||
| 500 | |||
| 501 | #define SAVE_STATE \ | ||
| 502 | swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */ \ | ||
| 503 | set_bip; /*equalize initial state for all possible entries*/\ | ||
| 504 | clear_eip; \ | ||
| 505 | enable_irq; \ | ||
| 506 | set_ee; \ | ||
| 507 | /* See if already in kernel mode.*/ \ | ||
| 508 | lwi r11, r0, TOPHYS(PER_CPU(KM)); \ | ||
| 509 | beqi r11, 1f; /* Jump ahead if coming from user */\ | ||
| 510 | /* Kernel-mode state save. */ \ | ||
| 511 | /* Reload kernel stack-ptr. */ \ | ||
| 512 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ | ||
| 513 | tophys(r1,r11); \ | ||
| 514 | swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */ \ | ||
| 515 | lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\ | ||
| 516 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\ | ||
| 517 | /* store return registers separately because \ | ||
| 518 | * this macros is use for others exceptions */ \ | ||
| 519 | swi r3, r1, PTO + PT_R3; \ | ||
| 520 | swi r4, r1, PTO + PT_R4; \ | ||
| 521 | SAVE_REGS \ | ||
| 522 | /* PC, before IRQ/trap - this is one instruction above */ \ | ||
| 523 | swi r17, r1, PTO+PT_PC; \ | ||
| 524 | \ | ||
| 525 | addi r11, r0, 1; /* Was in kernel-mode. */ \ | ||
| 526 | swi r11, r1, PTO+PT_MODE; \ | ||
| 527 | brid 2f; \ | ||
| 528 | nop; /* Fill delay slot */ \ | ||
| 529 | 1: /* User-mode state save. */ \ | ||
| 530 | lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\ | ||
| 531 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ | ||
| 532 | tophys(r1,r1); \ | ||
| 533 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \ | ||
| 534 | addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */\ | ||
| 535 | tophys(r1,r1); \ | ||
| 536 | \ | ||
| 537 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\ | ||
| 538 | /* store return registers separately because this macros \ | ||
| 539 | * is use for others exceptions */ \ | ||
| 540 | swi r3, r1, PTO + PT_R3; \ | ||
| 541 | swi r4, r1, PTO + PT_R4; \ | ||
| 542 | SAVE_REGS \ | ||
| 543 | /* PC, before IRQ/trap - this is one instruction above FIXME*/ \ | ||
| 544 | swi r17, r1, PTO+PT_PC; \ | ||
| 545 | \ | ||
| 546 | swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ \ | ||
| 547 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ | ||
| 548 | swi r11, r1, PTO+PT_R1; /* Store user SP. */ \ | ||
| 549 | addi r11, r0, 1; \ | ||
| 550 | swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode.*/\ | ||
| 551 | 2: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ | ||
| 552 | /* Save away the syscall number. */ \ | ||
| 553 | swi r0, r1, PTO+PT_R0; \ | ||
| 554 | tovirt(r1,r1) | ||
| 555 | |||
| 556 | C_ENTRY(full_exception_trap): | ||
| 557 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ | ||
| 558 | /* adjust exception address for privileged instruction | ||
| 559 | * for finding where is it */ | ||
| 560 | addik r17, r17, -4 | ||
| 561 | SAVE_STATE /* Save registers */ | ||
| 562 | /* FIXME this can be store directly in PT_ESR reg. | ||
| 563 | * I tested it but there is a fault */ | ||
| 564 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | ||
| 565 | la r15, r0, ret_from_exc - 8 | ||
| 566 | la r5, r1, PTO /* parameter struct pt_regs * regs */ | ||
| 567 | mfs r6, resr | ||
| 568 | nop | ||
| 569 | mfs r7, rfsr; /* save FSR */ | ||
| 570 | nop | ||
| 571 | la r12, r0, full_exception | ||
| 572 | set_vms; | ||
| 573 | rtbd r12, 0; | ||
| 574 | nop; | ||
| 575 | |||
| 576 | /* | ||
| 577 | * Unaligned data trap. | ||
| 578 | * | ||
| 579 | * Unaligned data trap last on 4k page is handled here. | ||
| 580 | * | ||
| 581 | * Trap entered via exception, so EE bit is set, and interrupts | ||
| 582 | * are masked. This is nice, means we don't have to CLI before state save | ||
| 583 | * | ||
| 584 | * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S" | ||
| 585 | */ | ||
| 586 | C_ENTRY(unaligned_data_trap): | ||
| 587 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ | ||
| 588 | SAVE_STATE /* Save registers.*/ | ||
| 589 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | ||
| 590 | la r15, r0, ret_from_exc-8 | ||
| 591 | mfs r3, resr /* ESR */ | ||
| 592 | nop | ||
| 593 | mfs r4, rear /* EAR */ | ||
| 594 | nop | ||
| 595 | la r7, r1, PTO /* parameter struct pt_regs * regs */ | ||
| 596 | la r12, r0, _unaligned_data_exception | ||
| 597 | set_vms; | ||
| 598 | rtbd r12, 0; /* interrupts enabled */ | ||
| 599 | nop; | ||
| 600 | |||
| 601 | /* | ||
| 602 | * Page fault traps. | ||
| 603 | * | ||
| 604 | * If the real exception handler (from hw_exception_handler.S) didn't find | ||
| 605 | * the mapping for the process, then we're thrown here to handle such situation. | ||
| 606 | * | ||
| 607 | * Trap entered via exceptions, so EE bit is set, and interrupts | ||
| 608 | * are masked. This is nice, means we don't have to CLI before state save | ||
| 609 | * | ||
| 610 | * Build a standard exception frame for TLB Access errors. All TLB exceptions | ||
| 611 | * will bail out to this point if they can't resolve the lightweight TLB fault. | ||
| 612 | * | ||
| 613 | * The C function called is in "arch/microblaze/mm/fault.c", declared as: | ||
| 614 | * void do_page_fault(struct pt_regs *regs, | ||
| 615 | * unsigned long address, | ||
| 616 | * unsigned long error_code) | ||
| 617 | */ | ||
| 618 | /* data and intruction trap - which is choose is resolved int fault.c */ | ||
| 619 | C_ENTRY(page_fault_data_trap): | ||
| 620 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ | ||
| 621 | SAVE_STATE /* Save registers.*/ | ||
| 622 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | ||
| 623 | la r15, r0, ret_from_exc-8 | ||
| 624 | la r5, r1, PTO /* parameter struct pt_regs * regs */ | ||
| 625 | mfs r6, rear /* parameter unsigned long address */ | ||
| 626 | nop | ||
| 627 | mfs r7, resr /* parameter unsigned long error_code */ | ||
| 628 | nop | ||
| 629 | la r12, r0, do_page_fault | ||
| 630 | set_vms; | ||
| 631 | rtbd r12, 0; /* interrupts enabled */ | ||
| 632 | nop; | ||
| 633 | |||
| 634 | C_ENTRY(page_fault_instr_trap): | ||
| 635 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ | ||
| 636 | SAVE_STATE /* Save registers.*/ | ||
| 637 | /* where the trap should return need -8 to adjust for rtsd r15, 8 */ | ||
| 638 | la r15, r0, ret_from_exc-8 | ||
| 639 | la r5, r1, PTO /* parameter struct pt_regs * regs */ | ||
| 640 | mfs r6, rear /* parameter unsigned long address */ | ||
| 641 | nop | ||
| 642 | ori r7, r0, 0 /* parameter unsigned long error_code */ | ||
| 643 | la r12, r0, do_page_fault | ||
| 644 | set_vms; | ||
| 645 | rtbd r12, 0; /* interrupts enabled */ | ||
| 646 | nop; | ||
| 647 | |||
| 648 | /* Entry point used to return from an exception. */ | ||
| 649 | C_ENTRY(ret_from_exc): | ||
| 650 | set_bip; /* Ints masked for state restore*/ | ||
| 651 | lwi r11, r1, PTO+PT_MODE; | ||
| 652 | bnei r11, 2f; /* See if returning to kernel mode, */ | ||
| 653 | /* ... if so, skip resched &c. */ | ||
| 654 | |||
| 655 | /* We're returning to user mode, so check for various conditions that | ||
| 656 | trigger rescheduling. */ | ||
| 657 | /* Get current task ptr into r11 */ | ||
| 658 | add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 659 | lwi r11, r11, TS_THREAD_INFO; /* get thread info */ | ||
| 660 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 661 | andi r11, r11, _TIF_NEED_RESCHED; | ||
| 662 | beqi r11, 5f; | ||
| 663 | |||
| 664 | /* Call the scheduler before returning from a syscall/trap. */ | ||
| 665 | bralid r15, schedule; /* Call scheduler */ | ||
| 666 | nop; /* delay slot */ | ||
| 667 | |||
| 668 | /* Maybe handle a signal */ | ||
| 669 | 5: add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 670 | lwi r11, r11, TS_THREAD_INFO; /* get thread info */ | ||
| 671 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 672 | andi r11, r11, _TIF_SIGPENDING; | ||
| 673 | beqi r11, 1f; /* Signals to handle, handle them */ | ||
| 674 | |||
| 675 | /* | ||
| 676 | * Handle a signal return; Pending signals should be in r18. | ||
| 677 | * | ||
| 678 | * Not all registers are saved by the normal trap/interrupt entry | ||
| 679 | * points (for instance, call-saved registers (because the normal | ||
| 680 | * C-compiler calling sequence in the kernel makes sure they're | ||
| 681 | * preserved), and call-clobbered registers in the case of | ||
| 682 | * traps), but signal handlers may want to examine or change the | ||
| 683 | * complete register state. Here we save anything not saved by | ||
| 684 | * the normal entry sequence, so that it may be safely restored | ||
| 685 | * (in a possibly modified form) after do_signal returns. | ||
| 686 | * store return registers separately because this macros is use | ||
| 687 | * for others exceptions */ | ||
| 688 | swi r3, r1, PTO + PT_R3; | ||
| 689 | swi r4, r1, PTO + PT_R4; | ||
| 690 | la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ | ||
| 691 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ | ||
| 692 | addi r7, r0, 0; /* Arg 3: int in_syscall */ | ||
| 693 | bralid r15, do_signal; /* Handle any signals */ | ||
| 694 | nop; | ||
| 695 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 696 | lwi r4, r1, PTO+PT_R4; | ||
| 697 | |||
| 698 | /* Finally, return to user state. */ | ||
| 699 | 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */ | ||
| 700 | add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 701 | swi r11, r0, PER_CPU(CURRENT_SAVE); /* save current */ | ||
| 702 | VM_OFF; | ||
| 703 | tophys(r1,r1); | ||
| 704 | |||
| 705 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 706 | lwi r4, r1, PTO+PT_R4; | ||
| 707 | RESTORE_REGS; | ||
| 708 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | ||
| 709 | |||
| 710 | lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ | ||
| 711 | bri 6f; | ||
| 712 | /* Return to kernel state. */ | ||
| 713 | 2: VM_OFF; | ||
| 714 | tophys(r1,r1); | ||
| 715 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 716 | lwi r4, r1, PTO+PT_R4; | ||
| 717 | RESTORE_REGS; | ||
| 718 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | ||
| 719 | |||
| 720 | tovirt(r1,r1); | ||
| 721 | 6: | ||
| 722 | EXC_return: /* Make global symbol for debugging */ | ||
| 723 | rtbd r14, 0; /* Instructions to return from an IRQ */ | ||
| 724 | nop; | ||
| 725 | |||
| 726 | /* | ||
| 727 | * HW EXCEPTION rutine end | ||
| 728 | */ | ||
| 729 | |||
| 730 | /* | ||
| 731 | * Hardware maskable interrupts. | ||
| 732 | * | ||
| 733 | * The stack-pointer (r1) should have already been saved to the memory | ||
| 734 | * location PER_CPU(ENTRY_SP). | ||
| 735 | */ | ||
| 736 | C_ENTRY(_interrupt): | ||
| 737 | /* MS: we are in physical address */ | ||
| 738 | /* Save registers, switch to proper stack, convert SP to virtual.*/ | ||
| 739 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | ||
| 740 | swi r11, r0, TOPHYS(PER_CPU(R11_SAVE)); | ||
| 741 | /* MS: See if already in kernel mode. */ | ||
| 742 | lwi r11, r0, TOPHYS(PER_CPU(KM)); | ||
| 743 | beqi r11, 1f; /* MS: Jump ahead if coming from user */ | ||
| 744 | |||
| 745 | /* Kernel-mode state save. */ | ||
| 746 | or r11, r1, r0 | ||
| 747 | tophys(r1,r11); /* MS: I have in r1 physical address where stack is */ | ||
| 748 | /* MS: Save original SP - position PT_R1 to next stack frame 4 *1 - 152*/ | ||
| 749 | swi r11, r1, (PT_R1 - PT_SIZE); | ||
| 750 | /* MS: restore r11 because of saving in SAVE_REGS */ | ||
| 751 | lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE)); | ||
| 752 | /* save registers */ | ||
| 753 | /* MS: Make room on the stack -> activation record */ | ||
| 754 | addik r1, r1, -STATE_SAVE_SIZE; | ||
| 755 | /* MS: store return registers separately because | ||
| 756 | * this macros is use for others exceptions */ | ||
| 757 | swi r3, r1, PTO + PT_R3; | ||
| 758 | swi r4, r1, PTO + PT_R4; | ||
| 759 | SAVE_REGS | ||
| 760 | /* MS: store mode */ | ||
| 761 | addi r11, r0, 1; /* MS: Was in kernel-mode. */ | ||
| 762 | swi r11, r1, PTO + PT_MODE; /* MS: and save it */ | ||
| 763 | brid 2f; | ||
| 764 | nop; /* MS: Fill delay slot */ | ||
| 765 | |||
| 766 | 1: | ||
| 767 | /* User-mode state save. */ | ||
| 768 | /* MS: restore r11 -> FIXME move before SAVE_REG */ | ||
| 769 | lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE)); | ||
| 770 | /* MS: get the saved current */ | ||
| 771 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | ||
| 772 | tophys(r1,r1); | ||
| 773 | lwi r1, r1, TS_THREAD_INFO; | ||
| 774 | addik r1, r1, THREAD_SIZE; | ||
| 775 | tophys(r1,r1); | ||
| 776 | /* save registers */ | ||
| 777 | addik r1, r1, -STATE_SAVE_SIZE; | ||
| 778 | swi r3, r1, PTO+PT_R3; | ||
| 779 | swi r4, r1, PTO+PT_R4; | ||
| 780 | SAVE_REGS | ||
| 781 | /* calculate mode */ | ||
| 782 | swi r0, r1, PTO + PT_MODE; | ||
| 783 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | ||
| 784 | swi r11, r1, PTO+PT_R1; | ||
| 785 | /* setup kernel mode to KM */ | ||
| 786 | addi r11, r0, 1; | ||
| 787 | swi r11, r0, TOPHYS(PER_CPU(KM)); | ||
| 788 | |||
| 789 | 2: | ||
| 790 | lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); | ||
| 791 | swi r0, r1, PTO + PT_R0; | ||
| 792 | tovirt(r1,r1) | ||
| 793 | la r5, r1, PTO; | ||
| 794 | set_vms; | ||
| 795 | la r11, r0, do_IRQ; | ||
| 796 | la r15, r0, irq_call; | ||
| 797 | irq_call:rtbd r11, 0; | ||
| 798 | nop; | ||
| 799 | |||
| 800 | /* MS: we are in virtual mode */ | ||
| 801 | ret_from_irq: | ||
| 802 | lwi r11, r1, PTO + PT_MODE; | ||
| 803 | bnei r11, 2f; | ||
| 804 | |||
| 805 | add r11, r0, CURRENT_TASK; | ||
| 806 | lwi r11, r11, TS_THREAD_INFO; | ||
| 807 | lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */ | ||
| 808 | andi r11, r11, _TIF_NEED_RESCHED; | ||
| 809 | beqi r11, 5f | ||
| 810 | bralid r15, schedule; | ||
| 811 | nop; /* delay slot */ | ||
| 812 | |||
| 813 | /* Maybe handle a signal */ | ||
| 814 | 5: add r11, r0, CURRENT_TASK; | ||
| 815 | lwi r11, r11, TS_THREAD_INFO; /* MS: get thread info */ | ||
| 816 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 817 | andi r11, r11, _TIF_SIGPENDING; | ||
| 818 | beqid r11, no_intr_resched | ||
| 819 | /* Handle a signal return; Pending signals should be in r18. */ | ||
| 820 | addi r7, r0, 0; /* Arg 3: int in_syscall */ | ||
| 821 | la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ | ||
| 822 | bralid r15, do_signal; /* Handle any signals */ | ||
| 823 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ | ||
| 824 | |||
| 825 | /* Finally, return to user state. */ | ||
| 826 | no_intr_resched: | ||
| 827 | /* Disable interrupts, we are now committed to the state restore */ | ||
| 828 | disable_irq | ||
| 829 | swi r0, r0, PER_CPU(KM); /* MS: Now officially in user state. */ | ||
| 830 | add r11, r0, CURRENT_TASK; | ||
| 831 | swi r11, r0, PER_CPU(CURRENT_SAVE); | ||
| 832 | VM_OFF; | ||
| 833 | tophys(r1,r1); | ||
| 834 | lwi r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */ | ||
| 835 | lwi r4, r1, PTO + PT_R4; | ||
| 836 | RESTORE_REGS | ||
| 837 | addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ | ||
| 838 | lwi r1, r1, PT_R1 - PT_SIZE; | ||
| 839 | bri 6f; | ||
| 840 | /* MS: Return to kernel state. */ | ||
| 841 | 2: VM_OFF /* MS: turn off MMU */ | ||
| 842 | tophys(r1,r1) | ||
| 843 | lwi r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */ | ||
| 844 | lwi r4, r1, PTO + PT_R4; | ||
| 845 | RESTORE_REGS | ||
| 846 | addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ | ||
| 847 | tovirt(r1,r1); | ||
| 848 | 6: | ||
| 849 | IRQ_return: /* MS: Make global symbol for debugging */ | ||
| 850 | rtid r14, 0 | ||
| 851 | nop | ||
| 852 | |||
| 853 | /* | ||
| 854 | * `Debug' trap | ||
| 855 | * We enter dbtrap in "BIP" (breakpoint) mode. | ||
| 856 | * So we exit the breakpoint mode with an 'rtbd' and proceed with the | ||
| 857 | * original dbtrap. | ||
| 858 | * however, wait to save state first | ||
| 859 | */ | ||
| 860 | C_ENTRY(_debug_exception): | ||
| 861 | /* BIP bit is set on entry, no interrupts can occur */ | ||
| 862 | swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) | ||
| 863 | |||
| 864 | swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */ | ||
| 865 | set_bip; /*equalize initial state for all possible entries*/ | ||
| 866 | clear_eip; | ||
| 867 | enable_irq; | ||
| 868 | lwi r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/ | ||
| 869 | beqi r11, 1f; /* Jump ahead if coming from user */ | ||
| 870 | /* Kernel-mode state save. */ | ||
| 871 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ | ||
| 872 | tophys(r1,r11); | ||
| 873 | swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */ | ||
| 874 | lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */ | ||
| 875 | |||
| 876 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | ||
| 877 | swi r3, r1, PTO + PT_R3; | ||
| 878 | swi r4, r1, PTO + PT_R4; | ||
| 879 | SAVE_REGS; | ||
| 880 | |||
| 881 | addi r11, r0, 1; /* Was in kernel-mode. */ | ||
| 882 | swi r11, r1, PTO + PT_MODE; | ||
| 883 | brid 2f; | ||
| 884 | nop; /* Fill delay slot */ | ||
| 885 | 1: /* User-mode state save. */ | ||
| 886 | lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */ | ||
| 887 | lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | ||
| 888 | tophys(r1,r1); | ||
| 889 | lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ | ||
| 890 | addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ | ||
| 891 | tophys(r1,r1); | ||
| 892 | |||
| 893 | addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ | ||
| 894 | swi r3, r1, PTO + PT_R3; | ||
| 895 | swi r4, r1, PTO + PT_R4; | ||
| 896 | SAVE_REGS; | ||
| 897 | |||
| 898 | swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ | ||
| 899 | lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); | ||
| 900 | swi r11, r1, PTO+PT_R1; /* Store user SP. */ | ||
| 901 | addi r11, r0, 1; | ||
| 902 | swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode. */ | ||
| 903 | 2: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ | ||
| 904 | /* Save away the syscall number. */ | ||
| 905 | swi r0, r1, PTO+PT_R0; | ||
| 906 | tovirt(r1,r1) | ||
| 907 | |||
| 908 | addi r5, r0, SIGTRAP /* send the trap signal */ | ||
| 909 | add r6, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 910 | addk r7, r0, r0 /* 3rd param zero */ | ||
| 911 | |||
| 912 | set_vms; | ||
| 913 | la r11, r0, send_sig; | ||
| 914 | la r15, r0, dbtrap_call; | ||
| 915 | dbtrap_call: rtbd r11, 0; | ||
| 916 | nop; | ||
| 917 | |||
| 918 | set_bip; /* Ints masked for state restore*/ | ||
| 919 | lwi r11, r1, PTO+PT_MODE; | ||
| 920 | bnei r11, 2f; | ||
| 921 | |||
| 922 | /* Get current task ptr into r11 */ | ||
| 923 | add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 924 | lwi r11, r11, TS_THREAD_INFO; /* get thread info */ | ||
| 925 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 926 | andi r11, r11, _TIF_NEED_RESCHED; | ||
| 927 | beqi r11, 5f; | ||
| 928 | |||
| 929 | /* Call the scheduler before returning from a syscall/trap. */ | ||
| 930 | |||
| 931 | bralid r15, schedule; /* Call scheduler */ | ||
| 932 | nop; /* delay slot */ | ||
| 933 | /* XXX Is PT_DTRACE handling needed here? */ | ||
| 934 | /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here. */ | ||
| 935 | |||
| 936 | /* Maybe handle a signal */ | ||
| 937 | 5: add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 938 | lwi r11, r11, TS_THREAD_INFO; /* get thread info */ | ||
| 939 | lwi r11, r11, TI_FLAGS; /* get flags in thread info */ | ||
| 940 | andi r11, r11, _TIF_SIGPENDING; | ||
| 941 | beqi r11, 1f; /* Signals to handle, handle them */ | ||
| 942 | |||
| 943 | /* Handle a signal return; Pending signals should be in r18. */ | ||
| 944 | /* Not all registers are saved by the normal trap/interrupt entry | ||
| 945 | points (for instance, call-saved registers (because the normal | ||
| 946 | C-compiler calling sequence in the kernel makes sure they're | ||
| 947 | preserved), and call-clobbered registers in the case of | ||
| 948 | traps), but signal handlers may want to examine or change the | ||
| 949 | complete register state. Here we save anything not saved by | ||
| 950 | the normal entry sequence, so that it may be safely restored | ||
| 951 | (in a possibly modified form) after do_signal returns. */ | ||
| 952 | |||
| 953 | la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ | ||
| 954 | add r6, r0, r0; /* Arg 2: sigset_t *oldset */ | ||
| 955 | addi r7, r0, 0; /* Arg 3: int in_syscall */ | ||
| 956 | bralid r15, do_signal; /* Handle any signals */ | ||
| 957 | nop; | ||
| 958 | |||
| 959 | |||
| 960 | /* Finally, return to user state. */ | ||
| 961 | 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */ | ||
| 962 | add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */ | ||
| 963 | swi r11, r0, PER_CPU(CURRENT_SAVE); /* save current */ | ||
| 964 | VM_OFF; | ||
| 965 | tophys(r1,r1); | ||
| 966 | |||
| 967 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 968 | lwi r4, r1, PTO+PT_R4; | ||
| 969 | RESTORE_REGS | ||
| 970 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | ||
| 971 | |||
| 972 | |||
| 973 | lwi r1, r1, PT_R1 - PT_SIZE; | ||
| 974 | /* Restore user stack pointer. */ | ||
| 975 | bri 6f; | ||
| 976 | |||
| 977 | /* Return to kernel state. */ | ||
| 978 | 2: VM_OFF; | ||
| 979 | tophys(r1,r1); | ||
| 980 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
| 981 | lwi r4, r1, PTO+PT_R4; | ||
| 982 | RESTORE_REGS | ||
| 983 | addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ | ||
| 984 | |||
| 985 | tovirt(r1,r1); | ||
| 986 | 6: | ||
| 987 | DBTRAP_return: /* Make global symbol for debugging */ | ||
| 988 | rtbd r14, 0; /* Instructions to return from an IRQ */ | ||
| 989 | nop; | ||
| 990 | |||
| 991 | |||
| 992 | |||
| 993 | ENTRY(_switch_to) | ||
| 994 | /* prepare return value */ | ||
| 995 | addk r3, r0, r31 | ||
| 996 | |||
| 997 | /* save registers in cpu_context */ | ||
| 998 | /* use r11 and r12, volatile registers, as temp register */ | ||
| 999 | /* give start of cpu_context for previous process */ | ||
| 1000 | addik r11, r5, TI_CPU_CONTEXT | ||
| 1001 | swi r1, r11, CC_R1 | ||
| 1002 | swi r2, r11, CC_R2 | ||
| 1003 | /* skip volatile registers. | ||
| 1004 | * they are saved on stack when we jumped to _switch_to() */ | ||
| 1005 | /* dedicated registers */ | ||
| 1006 | swi r13, r11, CC_R13 | ||
| 1007 | swi r14, r11, CC_R14 | ||
| 1008 | swi r15, r11, CC_R15 | ||
| 1009 | swi r16, r11, CC_R16 | ||
| 1010 | swi r17, r11, CC_R17 | ||
| 1011 | swi r18, r11, CC_R18 | ||
| 1012 | /* save non-volatile registers */ | ||
| 1013 | swi r19, r11, CC_R19 | ||
| 1014 | swi r20, r11, CC_R20 | ||
| 1015 | swi r21, r11, CC_R21 | ||
| 1016 | swi r22, r11, CC_R22 | ||
| 1017 | swi r23, r11, CC_R23 | ||
| 1018 | swi r24, r11, CC_R24 | ||
| 1019 | swi r25, r11, CC_R25 | ||
| 1020 | swi r26, r11, CC_R26 | ||
| 1021 | swi r27, r11, CC_R27 | ||
| 1022 | swi r28, r11, CC_R28 | ||
| 1023 | swi r29, r11, CC_R29 | ||
| 1024 | swi r30, r11, CC_R30 | ||
| 1025 | /* special purpose registers */ | ||
| 1026 | mfs r12, rmsr | ||
| 1027 | nop | ||
| 1028 | swi r12, r11, CC_MSR | ||
| 1029 | mfs r12, rear | ||
| 1030 | nop | ||
| 1031 | swi r12, r11, CC_EAR | ||
| 1032 | mfs r12, resr | ||
| 1033 | nop | ||
| 1034 | swi r12, r11, CC_ESR | ||
| 1035 | mfs r12, rfsr | ||
| 1036 | nop | ||
| 1037 | swi r12, r11, CC_FSR | ||
| 1038 | |||
| 1039 | /* update r31, the current */ | ||
| 1040 | lwi r31, r6, TI_TASK/* give me pointer to task which will be next */ | ||
| 1041 | /* stored it to current_save too */ | ||
| 1042 | swi r31, r0, PER_CPU(CURRENT_SAVE) | ||
| 1043 | |||
| 1044 | /* get new process' cpu context and restore */ | ||
| 1045 | /* give me start where start context of next task */ | ||
| 1046 | addik r11, r6, TI_CPU_CONTEXT | ||
| 1047 | |||
| 1048 | /* non-volatile registers */ | ||
| 1049 | lwi r30, r11, CC_R30 | ||
| 1050 | lwi r29, r11, CC_R29 | ||
| 1051 | lwi r28, r11, CC_R28 | ||
| 1052 | lwi r27, r11, CC_R27 | ||
| 1053 | lwi r26, r11, CC_R26 | ||
| 1054 | lwi r25, r11, CC_R25 | ||
| 1055 | lwi r24, r11, CC_R24 | ||
| 1056 | lwi r23, r11, CC_R23 | ||
| 1057 | lwi r22, r11, CC_R22 | ||
| 1058 | lwi r21, r11, CC_R21 | ||
| 1059 | lwi r20, r11, CC_R20 | ||
| 1060 | lwi r19, r11, CC_R19 | ||
| 1061 | /* dedicated registers */ | ||
| 1062 | lwi r18, r11, CC_R18 | ||
| 1063 | lwi r17, r11, CC_R17 | ||
| 1064 | lwi r16, r11, CC_R16 | ||
| 1065 | lwi r15, r11, CC_R15 | ||
| 1066 | lwi r14, r11, CC_R14 | ||
| 1067 | lwi r13, r11, CC_R13 | ||
| 1068 | /* skip volatile registers */ | ||
| 1069 | lwi r2, r11, CC_R2 | ||
| 1070 | lwi r1, r11, CC_R1 | ||
| 1071 | |||
| 1072 | /* special purpose registers */ | ||
| 1073 | lwi r12, r11, CC_FSR | ||
| 1074 | mts rfsr, r12 | ||
| 1075 | nop | ||
| 1076 | lwi r12, r11, CC_MSR | ||
| 1077 | mts rmsr, r12 | ||
| 1078 | nop | ||
| 1079 | |||
| 1080 | rtsd r15, 8 | ||
| 1081 | nop | ||
| 1082 | |||
| 1083 | ENTRY(_reset) | ||
| 1084 | brai 0x70; /* Jump back to FS-boot */ | ||
| 1085 | |||
| 1086 | ENTRY(_break) | ||
| 1087 | mfs r5, rmsr | ||
| 1088 | nop | ||
| 1089 | swi r5, r0, 0x250 + TOPHYS(r0_ram) | ||
| 1090 | mfs r5, resr | ||
| 1091 | nop | ||
| 1092 | swi r5, r0, 0x254 + TOPHYS(r0_ram) | ||
| 1093 | bri 0 | ||
| 1094 | |||
| 1095 | /* These are compiled and loaded into high memory, then | ||
| 1096 | * copied into place in mach_early_setup */ | ||
| 1097 | .section .init.ivt, "ax" | ||
| 1098 | .org 0x0 | ||
| 1099 | /* this is very important - here is the reset vector */ | ||
| 1100 | /* in current MMU branch you don't care what is here - it is | ||
| 1101 | * used from bootloader site - but this is correct for FS-BOOT */ | ||
| 1102 | brai 0x70 | ||
| 1103 | nop | ||
| 1104 | brai TOPHYS(_user_exception); /* syscall handler */ | ||
| 1105 | brai TOPHYS(_interrupt); /* Interrupt handler */ | ||
| 1106 | brai TOPHYS(_break); /* nmi trap handler */ | ||
| 1107 | brai TOPHYS(_hw_exception_handler); /* HW exception handler */ | ||
| 1108 | |||
| 1109 | .org 0x60 | ||
| 1110 | brai TOPHYS(_debug_exception); /* debug trap handler*/ | ||
| 1111 | |||
| 1112 | .section .rodata,"a" | ||
| 1113 | #include "syscall_table.S" | ||
| 1114 | |||
| 1115 | syscall_table_size=(.-sys_call_table) | ||
| 1116 | |||
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c index 4a8a4064c7ee..0cb64a31e89a 100644 --- a/arch/microblaze/kernel/exceptions.c +++ b/arch/microblaze/kernel/exceptions.c | |||
| @@ -21,9 +21,9 @@ | |||
| 21 | 21 | ||
| 22 | #include <asm/exceptions.h> | 22 | #include <asm/exceptions.h> |
| 23 | #include <asm/entry.h> /* For KM CPU var */ | 23 | #include <asm/entry.h> /* For KM CPU var */ |
| 24 | #include <asm/uaccess.h> | 24 | #include <linux/uaccess.h> |
| 25 | #include <asm/errno.h> | 25 | #include <linux/errno.h> |
| 26 | #include <asm/ptrace.h> | 26 | #include <linux/ptrace.h> |
| 27 | #include <asm/current.h> | 27 | #include <asm/current.h> |
| 28 | 28 | ||
| 29 | #define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02 | 29 | #define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02 |
| @@ -31,7 +31,7 @@ | |||
| 31 | #define MICROBLAZE_DBUS_EXCEPTION 0x04 | 31 | #define MICROBLAZE_DBUS_EXCEPTION 0x04 |
| 32 | #define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05 | 32 | #define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05 |
| 33 | #define MICROBLAZE_FPU_EXCEPTION 0x06 | 33 | #define MICROBLAZE_FPU_EXCEPTION 0x06 |
| 34 | #define MICROBLAZE_PRIVILEG_EXCEPTION 0x07 | 34 | #define MICROBLAZE_PRIVILEGED_EXCEPTION 0x07 |
| 35 | 35 | ||
| 36 | static DEFINE_SPINLOCK(die_lock); | 36 | static DEFINE_SPINLOCK(die_lock); |
| 37 | 37 | ||
| @@ -66,6 +66,11 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) | |||
| 66 | asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, | 66 | asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, |
| 67 | int fsr, int addr) | 67 | int fsr, int addr) |
| 68 | { | 68 | { |
| 69 | #ifdef CONFIG_MMU | ||
| 70 | int code; | ||
| 71 | addr = regs->pc; | ||
| 72 | #endif | ||
| 73 | |||
| 69 | #if 0 | 74 | #if 0 |
| 70 | printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n", | 75 | printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n", |
| 71 | type, user_mode(regs) ? "user" : "kernel", fsr, | 76 | type, user_mode(regs) ? "user" : "kernel", fsr, |
| @@ -74,7 +79,13 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, | |||
| 74 | 79 | ||
| 75 | switch (type & 0x1F) { | 80 | switch (type & 0x1F) { |
| 76 | case MICROBLAZE_ILL_OPCODE_EXCEPTION: | 81 | case MICROBLAZE_ILL_OPCODE_EXCEPTION: |
| 77 | _exception(SIGILL, regs, ILL_ILLOPC, addr); | 82 | if (user_mode(regs)) { |
| 83 | printk(KERN_WARNING "Illegal opcode exception in user mode.\n"); | ||
| 84 | _exception(SIGILL, regs, ILL_ILLOPC, addr); | ||
| 85 | return; | ||
| 86 | } | ||
| 87 | printk(KERN_WARNING "Illegal opcode exception in kernel mode.\n"); | ||
| 88 | die("opcode exception", regs, SIGBUS); | ||
| 78 | break; | 89 | break; |
| 79 | case MICROBLAZE_IBUS_EXCEPTION: | 90 | case MICROBLAZE_IBUS_EXCEPTION: |
| 80 | if (user_mode(regs)) { | 91 | if (user_mode(regs)) { |
| @@ -95,11 +106,16 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, | |||
| 95 | die("bus exception", regs, SIGBUS); | 106 | die("bus exception", regs, SIGBUS); |
| 96 | break; | 107 | break; |
| 97 | case MICROBLAZE_DIV_ZERO_EXCEPTION: | 108 | case MICROBLAZE_DIV_ZERO_EXCEPTION: |
| 98 | printk(KERN_WARNING "Divide by zero exception\n"); | 109 | if (user_mode(regs)) { |
| 99 | _exception(SIGILL, regs, ILL_ILLOPC, addr); | 110 | printk(KERN_WARNING "Divide by zero exception in user mode\n"); |
| 111 | _exception(SIGILL, regs, ILL_ILLOPC, addr); | ||
| 112 | return; | ||
| 113 | } | ||
| 114 | printk(KERN_WARNING "Divide by zero exception in kernel mode.\n"); | ||
| 115 | die("Divide by exception", regs, SIGBUS); | ||
| 100 | break; | 116 | break; |
| 101 | |||
| 102 | case MICROBLAZE_FPU_EXCEPTION: | 117 | case MICROBLAZE_FPU_EXCEPTION: |
| 118 | printk(KERN_WARNING "FPU exception\n"); | ||
| 103 | /* IEEE FP exception */ | 119 | /* IEEE FP exception */ |
| 104 | /* I removed fsr variable and use code var for storing fsr */ | 120 | /* I removed fsr variable and use code var for storing fsr */ |
| 105 | if (fsr & FSR_IO) | 121 | if (fsr & FSR_IO) |
| @@ -115,7 +131,20 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, | |||
| 115 | _exception(SIGFPE, regs, fsr, addr); | 131 | _exception(SIGFPE, regs, fsr, addr); |
| 116 | break; | 132 | break; |
| 117 | 133 | ||
| 134 | #ifdef CONFIG_MMU | ||
| 135 | case MICROBLAZE_PRIVILEGED_EXCEPTION: | ||
| 136 | printk(KERN_WARNING "Privileged exception\n"); | ||
| 137 | /* "brk r0,r0" - used as debug breakpoint */ | ||
| 138 | if (get_user(code, (unsigned long *)regs->pc) == 0 | ||
| 139 | && code == 0x980c0000) { | ||
| 140 | _exception(SIGTRAP, regs, TRAP_BRKPT, addr); | ||
| 141 | } else { | ||
| 142 | _exception(SIGILL, regs, ILL_PRVOPC, addr); | ||
| 143 | } | ||
| 144 | break; | ||
| 145 | #endif | ||
| 118 | default: | 146 | default: |
| 147 | /* FIXME what to do in unexpected exception */ | ||
| 119 | printk(KERN_WARNING "Unexpected exception %02x " | 148 | printk(KERN_WARNING "Unexpected exception %02x " |
| 120 | "PC=%08x in %s mode\n", type, (unsigned int) addr, | 149 | "PC=%08x in %s mode\n", type, (unsigned int) addr, |
| 121 | kernel_mode(regs) ? "kernel" : "user"); | 150 | kernel_mode(regs) ? "kernel" : "user"); |
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S index 319dc35fc922..e568d6ec621b 100644 --- a/arch/microblaze/kernel/head.S +++ b/arch/microblaze/kernel/head.S | |||
| @@ -3,6 +3,26 @@ | |||
| 3 | * Copyright (C) 2007-2009 PetaLogix | 3 | * Copyright (C) 2007-2009 PetaLogix |
| 4 | * Copyright (C) 2006 Atmark Techno, Inc. | 4 | * Copyright (C) 2006 Atmark Techno, Inc. |
| 5 | * | 5 | * |
| 6 | * MMU code derived from arch/ppc/kernel/head_4xx.S: | ||
| 7 | * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org> | ||
| 8 | * Initial PowerPC version. | ||
| 9 | * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu> | ||
| 10 | * Rewritten for PReP | ||
| 11 | * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au> | ||
| 12 | * Low-level exception handers, MMU support, and rewrite. | ||
| 13 | * Copyright (c) 1997 Dan Malek <dmalek@jlc.net> | ||
| 14 | * PowerPC 8xx modifications. | ||
| 15 | * Copyright (c) 1998-1999 TiVo, Inc. | ||
| 16 | * PowerPC 403GCX modifications. | ||
| 17 | * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu> | ||
| 18 | * PowerPC 403GCX/405GP modifications. | ||
| 19 | * Copyright 2000 MontaVista Software Inc. | ||
| 20 | * PPC405 modifications | ||
| 21 | * PowerPC 403GCX/405GP modifications. | ||
| 22 | * Author: MontaVista Software, Inc. | ||
| 23 | * frank_rowand@mvista.com or source@mvista.com | ||
| 24 | * debbie_chu@mvista.com | ||
| 25 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | 26 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file "COPYING" in the main directory of this archive | 27 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | * for more details. | 28 | * for more details. |
| @@ -12,6 +32,22 @@ | |||
| 12 | #include <asm/thread_info.h> | 32 | #include <asm/thread_info.h> |
| 13 | #include <asm/page.h> | 33 | #include <asm/page.h> |
| 14 | 34 | ||
| 35 | #ifdef CONFIG_MMU | ||
| 36 | #include <asm/setup.h> /* COMMAND_LINE_SIZE */ | ||
| 37 | #include <asm/mmu.h> | ||
| 38 | #include <asm/processor.h> | ||
| 39 | |||
| 40 | .data | ||
| 41 | .global empty_zero_page | ||
| 42 | .align 12 | ||
| 43 | empty_zero_page: | ||
| 44 | .space 4096 | ||
| 45 | .global swapper_pg_dir | ||
| 46 | swapper_pg_dir: | ||
| 47 | .space 4096 | ||
| 48 | |||
| 49 | #endif /* CONFIG_MMU */ | ||
| 50 | |||
| 15 | .text | 51 | .text |
| 16 | ENTRY(_start) | 52 | ENTRY(_start) |
| 17 | mfs r1, rmsr | 53 | mfs r1, rmsr |
| @@ -32,6 +68,123 @@ _copy_fdt: | |||
| 32 | addik r3, r3, -4 /* descrement loop */ | 68 | addik r3, r3, -4 /* descrement loop */ |
| 33 | no_fdt_arg: | 69 | no_fdt_arg: |
| 34 | 70 | ||
| 71 | #ifdef CONFIG_MMU | ||
| 72 | |||
| 73 | #ifndef CONFIG_CMDLINE_BOOL | ||
| 74 | /* | ||
| 75 | * handling command line | ||
| 76 | * copy command line to __init_end. There is space for storing command line. | ||
| 77 | */ | ||
| 78 | or r6, r0, r0 /* incremment */ | ||
| 79 | ori r4, r0, __init_end /* load address of command line */ | ||
| 80 | tophys(r4,r4) /* convert to phys address */ | ||
| 81 | ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */ | ||
| 82 | _copy_command_line: | ||
| 83 | lbu r7, r5, r6 /* r7=r5+r6 - r5 contain pointer to command line */ | ||
| 84 | sb r7, r4, r6 /* addr[r4+r6]= r7*/ | ||
| 85 | addik r6, r6, 1 /* increment counting */ | ||
| 86 | bgtid r3, _copy_command_line /* loop for all entries */ | ||
| 87 | addik r3, r3, -1 /* descrement loop */ | ||
| 88 | addik r5, r4, 0 /* add new space for command line */ | ||
| 89 | tovirt(r5,r5) | ||
| 90 | #endif /* CONFIG_CMDLINE_BOOL */ | ||
| 91 | |||
| 92 | #ifdef NOT_COMPILE | ||
| 93 | /* save bram context */ | ||
| 94 | or r6, r0, r0 /* incremment */ | ||
| 95 | ori r4, r0, TOPHYS(_bram_load_start) /* save bram context */ | ||
| 96 | ori r3, r0, (LMB_SIZE - 4) | ||
| 97 | _copy_bram: | ||
| 98 | lw r7, r0, r6 /* r7 = r0 + r6 */ | ||
| 99 | sw r7, r4, r6 /* addr[r4 + r6] = r7*/ | ||
| 100 | addik r6, r6, 4 /* increment counting */ | ||
| 101 | bgtid r3, _copy_bram /* loop for all entries */ | ||
| 102 | addik r3, r3, -4 /* descrement loop */ | ||
| 103 | #endif | ||
| 104 | /* We have to turn on the MMU right away. */ | ||
| 105 | |||
| 106 | /* | ||
| 107 | * Set up the initial MMU state so we can do the first level of | ||
| 108 | * kernel initialization. This maps the first 16 MBytes of memory 1:1 | ||
| 109 | * virtual to physical. | ||
| 110 | */ | ||
| 111 | nop | ||
| 112 | addik r3, r0, 63 /* Invalidate all TLB entries */ | ||
| 113 | _invalidate: | ||
| 114 | mts rtlbx, r3 | ||
| 115 | mts rtlbhi, r0 /* flush: ensure V is clear */ | ||
| 116 | bgtid r3, _invalidate /* loop for all entries */ | ||
| 117 | addik r3, r3, -1 | ||
| 118 | /* sync */ | ||
| 119 | |||
| 120 | /* | ||
| 121 | * We should still be executing code at physical address area | ||
| 122 | * RAM_BASEADDR at this point. However, kernel code is at | ||
| 123 | * a virtual address. So, set up a TLB mapping to cover this once | ||
| 124 | * translation is enabled. | ||
| 125 | */ | ||
| 126 | |||
| 127 | addik r3,r0, CONFIG_KERNEL_START /* Load the kernel virtual address */ | ||
| 128 | tophys(r4,r3) /* Load the kernel physical address */ | ||
| 129 | |||
| 130 | mts rpid,r0 /* Load the kernel PID */ | ||
| 131 | nop | ||
| 132 | bri 4 | ||
| 133 | |||
| 134 | /* | ||
| 135 | * Configure and load two entries into TLB slots 0 and 1. | ||
| 136 | * In case we are pinning TLBs, these are reserved in by the | ||
| 137 | * other TLB functions. If not reserving, then it doesn't | ||
| 138 | * matter where they are loaded. | ||
| 139 | */ | ||
| 140 | andi r4,r4,0xfffffc00 /* Mask off the real page number */ | ||
| 141 | ori r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */ | ||
| 142 | |||
| 143 | andi r3,r3,0xfffffc00 /* Mask off the effective page number */ | ||
| 144 | ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M)) | ||
| 145 | |||
| 146 | mts rtlbx,r0 /* TLB slow 0 */ | ||
| 147 | |||
| 148 | mts rtlblo,r4 /* Load the data portion of the entry */ | ||
| 149 | mts rtlbhi,r3 /* Load the tag portion of the entry */ | ||
| 150 | |||
| 151 | addik r4, r4, 0x01000000 /* Map next 16 M entries */ | ||
| 152 | addik r3, r3, 0x01000000 | ||
| 153 | |||
| 154 | ori r6,r0,1 /* TLB slot 1 */ | ||
| 155 | mts rtlbx,r6 | ||
| 156 | |||
| 157 | mts rtlblo,r4 /* Load the data portion of the entry */ | ||
| 158 | mts rtlbhi,r3 /* Load the tag portion of the entry */ | ||
| 159 | |||
| 160 | /* | ||
| 161 | * Load a TLB entry for LMB, since we need access to | ||
| 162 | * the exception vectors, using a 4k real==virtual mapping. | ||
| 163 | */ | ||
| 164 | ori r6,r0,3 /* TLB slot 3 */ | ||
| 165 | mts rtlbx,r6 | ||
| 166 | |||
| 167 | ori r4,r0,(TLB_WR | TLB_EX) | ||
| 168 | ori r3,r0,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K)) | ||
| 169 | |||
| 170 | mts rtlblo,r4 /* Load the data portion of the entry */ | ||
| 171 | mts rtlbhi,r3 /* Load the tag portion of the entry */ | ||
| 172 | |||
| 173 | /* | ||
| 174 | * We now have the lower 16 Meg of RAM mapped into TLB entries, and the | ||
| 175 | * caches ready to work. | ||
| 176 | */ | ||
| 177 | turn_on_mmu: | ||
| 178 | ori r15,r0,start_here | ||
| 179 | ori r4,r0,MSR_KERNEL_VMS | ||
| 180 | mts rmsr,r4 | ||
| 181 | nop | ||
| 182 | rted r15,0 /* enables MMU */ | ||
| 183 | nop | ||
| 184 | |||
| 185 | start_here: | ||
| 186 | #endif /* CONFIG_MMU */ | ||
| 187 | |||
| 35 | /* Initialize small data anchors */ | 188 | /* Initialize small data anchors */ |
| 36 | la r13, r0, _KERNEL_SDA_BASE_ | 189 | la r13, r0, _KERNEL_SDA_BASE_ |
| 37 | la r2, r0, _KERNEL_SDA2_BASE_ | 190 | la r2, r0, _KERNEL_SDA2_BASE_ |
| @@ -51,6 +204,43 @@ no_fdt_arg: | |||
| 51 | brald r15, r8 | 204 | brald r15, r8 |
| 52 | nop | 205 | nop |
| 53 | 206 | ||
| 207 | #ifndef CONFIG_MMU | ||
| 54 | la r15, r0, machine_halt | 208 | la r15, r0, machine_halt |
| 55 | braid start_kernel | 209 | braid start_kernel |
| 56 | nop | 210 | nop |
| 211 | #else | ||
| 212 | /* | ||
| 213 | * Initialize the MMU. | ||
| 214 | */ | ||
| 215 | bralid r15, mmu_init | ||
| 216 | nop | ||
| 217 | |||
| 218 | /* Go back to running unmapped so we can load up new values | ||
| 219 | * and change to using our exception vectors. | ||
| 220 | * On the MicroBlaze, all we invalidate the used TLB entries to clear | ||
| 221 | * the old 16M byte TLB mappings. | ||
| 222 | */ | ||
| 223 | ori r15,r0,TOPHYS(kernel_load_context) | ||
| 224 | ori r4,r0,MSR_KERNEL | ||
| 225 | mts rmsr,r4 | ||
| 226 | nop | ||
| 227 | bri 4 | ||
| 228 | rted r15,0 | ||
| 229 | nop | ||
| 230 | |||
| 231 | /* Load up the kernel context */ | ||
| 232 | kernel_load_context: | ||
| 233 | # Keep entry 0 and 1 valid. Entry 3 mapped to LMB can go away. | ||
| 234 | ori r5,r0,3 | ||
| 235 | mts rtlbx,r5 | ||
| 236 | nop | ||
| 237 | mts rtlbhi,r0 | ||
| 238 | nop | ||
| 239 | addi r15, r0, machine_halt | ||
| 240 | ori r17, r0, start_kernel | ||
| 241 | ori r4, r0, MSR_KERNEL_VMS | ||
| 242 | mts rmsr, r4 | ||
| 243 | nop | ||
| 244 | rted r17, 0 /* enable MMU and jump to start_kernel */ | ||
| 245 | nop | ||
| 246 | #endif /* CONFIG_MMU */ | ||
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index cf9486d99838..9d591cd74fc2 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S | |||
| @@ -53,6 +53,12 @@ | |||
| 53 | * - Illegal instruction opcode | 53 | * - Illegal instruction opcode |
| 54 | * - Divide-by-zero | 54 | * - Divide-by-zero |
| 55 | * | 55 | * |
| 56 | * - Privileged instruction exception (MMU) | ||
| 57 | * - Data storage exception (MMU) | ||
| 58 | * - Instruction storage exception (MMU) | ||
| 59 | * - Data TLB miss exception (MMU) | ||
| 60 | * - Instruction TLB miss exception (MMU) | ||
| 61 | * | ||
| 56 | * Note we disable interrupts during exception handling, otherwise we will | 62 | * Note we disable interrupts during exception handling, otherwise we will |
| 57 | * possibly get multiple re-entrancy if interrupt handles themselves cause | 63 | * possibly get multiple re-entrancy if interrupt handles themselves cause |
| 58 | * exceptions. JW | 64 | * exceptions. JW |
| @@ -71,9 +77,24 @@ | |||
| 71 | #include <asm/asm-offsets.h> | 77 | #include <asm/asm-offsets.h> |
| 72 | 78 | ||
| 73 | /* Helpful Macros */ | 79 | /* Helpful Macros */ |
| 80 | #ifndef CONFIG_MMU | ||
| 74 | #define EX_HANDLER_STACK_SIZ (4*19) | 81 | #define EX_HANDLER_STACK_SIZ (4*19) |
| 82 | #endif | ||
| 75 | #define NUM_TO_REG(num) r ## num | 83 | #define NUM_TO_REG(num) r ## num |
| 76 | 84 | ||
| 85 | #ifdef CONFIG_MMU | ||
| 86 | /* FIXME you can't change first load of MSR because there is | ||
| 87 | * hardcoded jump bri 4 */ | ||
| 88 | #define RESTORE_STATE \ | ||
| 89 | lwi r3, r1, PT_R3; \ | ||
| 90 | lwi r4, r1, PT_R4; \ | ||
| 91 | lwi r5, r1, PT_R5; \ | ||
| 92 | lwi r6, r1, PT_R6; \ | ||
| 93 | lwi r11, r1, PT_R11; \ | ||
| 94 | lwi r31, r1, PT_R31; \ | ||
| 95 | lwi r1, r0, TOPHYS(r0_ram + 0); | ||
| 96 | #endif /* CONFIG_MMU */ | ||
| 97 | |||
| 77 | #define LWREG_NOP \ | 98 | #define LWREG_NOP \ |
| 78 | bri ex_handler_unhandled; \ | 99 | bri ex_handler_unhandled; \ |
| 79 | nop; | 100 | nop; |
| @@ -106,6 +127,54 @@ | |||
| 106 | or r3, r0, NUM_TO_REG (regnum); \ | 127 | or r3, r0, NUM_TO_REG (regnum); \ |
| 107 | bri ex_sw_tail; | 128 | bri ex_sw_tail; |
| 108 | 129 | ||
| 130 | #ifdef CONFIG_MMU | ||
| 131 | #define R3_TO_LWREG_VM_V(regnum) \ | ||
| 132 | brid ex_lw_end_vm; \ | ||
| 133 | swi r3, r7, 4 * regnum; | ||
| 134 | |||
| 135 | #define R3_TO_LWREG_VM(regnum) \ | ||
| 136 | brid ex_lw_end_vm; \ | ||
| 137 | or NUM_TO_REG (regnum), r0, r3; | ||
| 138 | |||
| 139 | #define SWREG_TO_R3_VM_V(regnum) \ | ||
| 140 | brid ex_sw_tail_vm; \ | ||
| 141 | lwi r3, r7, 4 * regnum; | ||
| 142 | |||
| 143 | #define SWREG_TO_R3_VM(regnum) \ | ||
| 144 | brid ex_sw_tail_vm; \ | ||
| 145 | or r3, r0, NUM_TO_REG (regnum); | ||
| 146 | |||
| 147 | /* Shift right instruction depending on available configuration */ | ||
| 148 | #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0 | ||
| 149 | #define BSRLI(rD, rA, imm) \ | ||
| 150 | bsrli rD, rA, imm | ||
| 151 | #elif CONFIG_XILINX_MICROBLAZE0_USE_DIV > 0 | ||
| 152 | #define BSRLI(rD, rA, imm) \ | ||
| 153 | ori rD, r0, (1 << imm); \ | ||
| 154 | idivu rD, rD, rA | ||
| 155 | #else | ||
| 156 | #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA) | ||
| 157 | /* Only the used shift constants defined here - add more if needed */ | ||
| 158 | #define BSRLI2(rD, rA) \ | ||
| 159 | srl rD, rA; /* << 1 */ \ | ||
| 160 | srl rD, rD; /* << 2 */ | ||
| 161 | #define BSRLI10(rD, rA) \ | ||
| 162 | srl rD, rA; /* << 1 */ \ | ||
| 163 | srl rD, rD; /* << 2 */ \ | ||
| 164 | srl rD, rD; /* << 3 */ \ | ||
| 165 | srl rD, rD; /* << 4 */ \ | ||
| 166 | srl rD, rD; /* << 5 */ \ | ||
| 167 | srl rD, rD; /* << 6 */ \ | ||
| 168 | srl rD, rD; /* << 7 */ \ | ||
| 169 | srl rD, rD; /* << 8 */ \ | ||
| 170 | srl rD, rD; /* << 9 */ \ | ||
| 171 | srl rD, rD /* << 10 */ | ||
| 172 | #define BSRLI20(rD, rA) \ | ||
| 173 | BSRLI10(rD, rA); \ | ||
| 174 | BSRLI10(rD, rD) | ||
| 175 | #endif | ||
| 176 | #endif /* CONFIG_MMU */ | ||
| 177 | |||
| 109 | .extern other_exception_handler /* Defined in exception.c */ | 178 | .extern other_exception_handler /* Defined in exception.c */ |
| 110 | 179 | ||
| 111 | /* | 180 | /* |
| @@ -163,34 +232,119 @@ | |||
| 163 | 232 | ||
| 164 | /* wrappers to restore state before coming to entry.S */ | 233 | /* wrappers to restore state before coming to entry.S */ |
| 165 | 234 | ||
| 235 | #ifdef CONFIG_MMU | ||
| 236 | .section .rodata | ||
| 237 | .align 4 | ||
| 238 | _MB_HW_ExceptionVectorTable: | ||
| 239 | /* 0 - Undefined */ | ||
| 240 | .long TOPHYS(ex_handler_unhandled) | ||
| 241 | /* 1 - Unaligned data access exception */ | ||
| 242 | .long TOPHYS(handle_unaligned_ex) | ||
| 243 | /* 2 - Illegal op-code exception */ | ||
| 244 | .long TOPHYS(full_exception_trapw) | ||
| 245 | /* 3 - Instruction bus error exception */ | ||
| 246 | .long TOPHYS(full_exception_trapw) | ||
| 247 | /* 4 - Data bus error exception */ | ||
| 248 | .long TOPHYS(full_exception_trapw) | ||
| 249 | /* 5 - Divide by zero exception */ | ||
| 250 | .long TOPHYS(full_exception_trapw) | ||
| 251 | /* 6 - Floating point unit exception */ | ||
| 252 | .long TOPHYS(full_exception_trapw) | ||
| 253 | /* 7 - Privileged instruction exception */ | ||
| 254 | .long TOPHYS(full_exception_trapw) | ||
| 255 | /* 8 - 15 - Undefined */ | ||
| 256 | .long TOPHYS(ex_handler_unhandled) | ||
| 257 | .long TOPHYS(ex_handler_unhandled) | ||
| 258 | .long TOPHYS(ex_handler_unhandled) | ||
| 259 | .long TOPHYS(ex_handler_unhandled) | ||
| 260 | .long TOPHYS(ex_handler_unhandled) | ||
| 261 | .long TOPHYS(ex_handler_unhandled) | ||
| 262 | .long TOPHYS(ex_handler_unhandled) | ||
| 263 | .long TOPHYS(ex_handler_unhandled) | ||
| 264 | /* 16 - Data storage exception */ | ||
| 265 | .long TOPHYS(handle_data_storage_exception) | ||
| 266 | /* 17 - Instruction storage exception */ | ||
| 267 | .long TOPHYS(handle_instruction_storage_exception) | ||
| 268 | /* 18 - Data TLB miss exception */ | ||
| 269 | .long TOPHYS(handle_data_tlb_miss_exception) | ||
| 270 | /* 19 - Instruction TLB miss exception */ | ||
| 271 | .long TOPHYS(handle_instruction_tlb_miss_exception) | ||
| 272 | /* 20 - 31 - Undefined */ | ||
| 273 | .long TOPHYS(ex_handler_unhandled) | ||
| 274 | .long TOPHYS(ex_handler_unhandled) | ||
| 275 | .long TOPHYS(ex_handler_unhandled) | ||
| 276 | .long TOPHYS(ex_handler_unhandled) | ||
| 277 | .long TOPHYS(ex_handler_unhandled) | ||
| 278 | .long TOPHYS(ex_handler_unhandled) | ||
| 279 | .long TOPHYS(ex_handler_unhandled) | ||
| 280 | .long TOPHYS(ex_handler_unhandled) | ||
| 281 | .long TOPHYS(ex_handler_unhandled) | ||
| 282 | .long TOPHYS(ex_handler_unhandled) | ||
| 283 | .long TOPHYS(ex_handler_unhandled) | ||
| 284 | .long TOPHYS(ex_handler_unhandled) | ||
| 285 | #endif | ||
| 286 | |||
| 166 | .global _hw_exception_handler | 287 | .global _hw_exception_handler |
| 167 | .section .text | 288 | .section .text |
| 168 | .align 4 | 289 | .align 4 |
| 169 | .ent _hw_exception_handler | 290 | .ent _hw_exception_handler |
| 170 | _hw_exception_handler: | 291 | _hw_exception_handler: |
| 292 | #ifndef CONFIG_MMU | ||
| 171 | addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */ | 293 | addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */ |
| 294 | #else | ||
| 295 | swi r1, r0, TOPHYS(r0_ram + 0); /* GET_SP */ | ||
| 296 | /* Save date to kernel memory. Here is the problem | ||
| 297 | * when you came from user space */ | ||
| 298 | ori r1, r0, TOPHYS(r0_ram + 28); | ||
| 299 | #endif | ||
| 172 | swi r3, r1, PT_R3 | 300 | swi r3, r1, PT_R3 |
| 173 | swi r4, r1, PT_R4 | 301 | swi r4, r1, PT_R4 |
| 174 | swi r5, r1, PT_R5 | 302 | swi r5, r1, PT_R5 |
| 175 | swi r6, r1, PT_R6 | 303 | swi r6, r1, PT_R6 |
| 176 | 304 | ||
| 177 | mfs r5, rmsr; | 305 | #ifdef CONFIG_MMU |
| 178 | nop | 306 | swi r11, r1, PT_R11 |
| 179 | swi r5, r1, 0; | 307 | swi r31, r1, PT_R31 |
| 180 | mfs r4, rbtr /* Save BTR before jumping to handler */ | 308 | lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */ |
| 181 | nop | 309 | #endif |
| 310 | |||
| 182 | mfs r3, resr | 311 | mfs r3, resr |
| 183 | nop | 312 | nop |
| 313 | mfs r4, rear; | ||
| 314 | nop | ||
| 184 | 315 | ||
| 316 | #ifndef CONFIG_MMU | ||
| 185 | andi r5, r3, 0x1000; /* Check ESR[DS] */ | 317 | andi r5, r3, 0x1000; /* Check ESR[DS] */ |
| 186 | beqi r5, not_in_delay_slot; /* Branch if ESR[DS] not set */ | 318 | beqi r5, not_in_delay_slot; /* Branch if ESR[DS] not set */ |
| 187 | mfs r17, rbtr; /* ESR[DS] set - return address in BTR */ | 319 | mfs r17, rbtr; /* ESR[DS] set - return address in BTR */ |
| 188 | nop | 320 | nop |
| 189 | not_in_delay_slot: | 321 | not_in_delay_slot: |
| 190 | swi r17, r1, PT_R17 | 322 | swi r17, r1, PT_R17 |
| 323 | #endif | ||
| 191 | 324 | ||
| 192 | andi r5, r3, 0x1F; /* Extract ESR[EXC] */ | 325 | andi r5, r3, 0x1F; /* Extract ESR[EXC] */ |
| 193 | 326 | ||
| 327 | #ifdef CONFIG_MMU | ||
| 328 | /* Calculate exception vector offset = r5 << 2 */ | ||
| 329 | addk r6, r5, r5; /* << 1 */ | ||
| 330 | addk r6, r6, r6; /* << 2 */ | ||
| 331 | |||
| 332 | /* counting which exception happen */ | ||
| 333 | lwi r5, r0, 0x200 + TOPHYS(r0_ram) | ||
| 334 | addi r5, r5, 1 | ||
| 335 | swi r5, r0, 0x200 + TOPHYS(r0_ram) | ||
| 336 | lwi r5, r6, 0x200 + TOPHYS(r0_ram) | ||
| 337 | addi r5, r5, 1 | ||
| 338 | swi r5, r6, 0x200 + TOPHYS(r0_ram) | ||
| 339 | /* end */ | ||
| 340 | /* Load the HW Exception vector */ | ||
| 341 | lwi r6, r6, TOPHYS(_MB_HW_ExceptionVectorTable) | ||
| 342 | bra r6 | ||
| 343 | |||
| 344 | full_exception_trapw: | ||
| 345 | RESTORE_STATE | ||
| 346 | bri full_exception_trap | ||
| 347 | #else | ||
| 194 | /* Exceptions enabled here. This will allow nested exceptions */ | 348 | /* Exceptions enabled here. This will allow nested exceptions */ |
| 195 | mfs r6, rmsr; | 349 | mfs r6, rmsr; |
| 196 | nop | 350 | nop |
| @@ -254,6 +408,7 @@ handle_other_ex: /* Handle Other exceptions here */ | |||
| 254 | lwi r18, r1, PT_R18 | 408 | lwi r18, r1, PT_R18 |
| 255 | 409 | ||
| 256 | bri ex_handler_done; /* Complete exception handling */ | 410 | bri ex_handler_done; /* Complete exception handling */ |
| 411 | #endif | ||
| 257 | 412 | ||
| 258 | /* 0x01 - Unaligned data access exception | 413 | /* 0x01 - Unaligned data access exception |
| 259 | * This occurs when a word access is not aligned on a word boundary, | 414 | * This occurs when a word access is not aligned on a word boundary, |
| @@ -265,11 +420,28 @@ handle_other_ex: /* Handle Other exceptions here */ | |||
| 265 | handle_unaligned_ex: | 420 | handle_unaligned_ex: |
| 266 | /* Working registers already saved: R3, R4, R5, R6 | 421 | /* Working registers already saved: R3, R4, R5, R6 |
| 267 | * R3 = ESR | 422 | * R3 = ESR |
| 268 | * R4 = BTR | 423 | * R4 = EAR |
| 269 | */ | 424 | */ |
| 270 | mfs r4, rear; | 425 | #ifdef CONFIG_MMU |
| 426 | andi r6, r3, 0x1000 /* Check ESR[DS] */ | ||
| 427 | beqi r6, _no_delayslot /* Branch if ESR[DS] not set */ | ||
| 428 | mfs r17, rbtr; /* ESR[DS] set - return address in BTR */ | ||
| 271 | nop | 429 | nop |
| 430 | _no_delayslot: | ||
| 431 | #endif | ||
| 432 | |||
| 433 | #ifdef CONFIG_MMU | ||
| 434 | /* Check if unaligned address is last on a 4k page */ | ||
| 435 | andi r5, r4, 0xffc | ||
| 436 | xori r5, r5, 0xffc | ||
| 437 | bnei r5, _unaligned_ex2 | ||
| 438 | _unaligned_ex1: | ||
| 439 | RESTORE_STATE; | ||
| 440 | /* Another page must be accessed or physical address not in page table */ | ||
| 441 | bri unaligned_data_trap | ||
| 272 | 442 | ||
| 443 | _unaligned_ex2: | ||
| 444 | #endif | ||
| 273 | andi r6, r3, 0x3E0; /* Mask and extract the register operand */ | 445 | andi r6, r3, 0x3E0; /* Mask and extract the register operand */ |
| 274 | srl r6, r6; /* r6 >> 5 */ | 446 | srl r6, r6; /* r6 >> 5 */ |
| 275 | srl r6, r6; | 447 | srl r6, r6; |
| @@ -278,6 +450,45 @@ handle_unaligned_ex: | |||
| 278 | srl r6, r6; | 450 | srl r6, r6; |
| 279 | /* Store the register operand in a temporary location */ | 451 | /* Store the register operand in a temporary location */ |
| 280 | sbi r6, r0, TOPHYS(ex_reg_op); | 452 | sbi r6, r0, TOPHYS(ex_reg_op); |
| 453 | #ifdef CONFIG_MMU | ||
| 454 | /* Get physical address */ | ||
| 455 | /* If we are faulting a kernel address, we have to use the | ||
| 456 | * kernel page tables. | ||
| 457 | */ | ||
| 458 | ori r5, r0, CONFIG_KERNEL_START | ||
| 459 | cmpu r5, r4, r5 | ||
| 460 | bgti r5, _unaligned_ex3 | ||
| 461 | ori r5, r0, swapper_pg_dir | ||
| 462 | bri _unaligned_ex4 | ||
| 463 | |||
| 464 | /* Get the PGD for the current thread. */ | ||
| 465 | _unaligned_ex3: /* user thread */ | ||
| 466 | addi r5 ,CURRENT_TASK, TOPHYS(0); /* get current task address */ | ||
| 467 | lwi r5, r5, TASK_THREAD + PGDIR | ||
| 468 | _unaligned_ex4: | ||
| 469 | tophys(r5,r5) | ||
| 470 | BSRLI(r6,r4,20) /* Create L1 (pgdir/pmd) address */ | ||
| 471 | andi r6, r6, 0xffc | ||
| 472 | /* Assume pgdir aligned on 4K boundary, no need for "andi r5,r5,0xfffff003" */ | ||
| 473 | or r5, r5, r6 | ||
| 474 | lwi r6, r5, 0 /* Get L1 entry */ | ||
| 475 | andi r5, r6, 0xfffff000 /* Extract L2 (pte) base address. */ | ||
| 476 | beqi r5, _unaligned_ex1 /* Bail if no table */ | ||
| 477 | |||
| 478 | tophys(r5,r5) | ||
| 479 | BSRLI(r6,r4,10) /* Compute PTE address */ | ||
| 480 | andi r6, r6, 0xffc | ||
| 481 | andi r5, r5, 0xfffff003 | ||
| 482 | or r5, r5, r6 | ||
| 483 | lwi r5, r5, 0 /* Get Linux PTE */ | ||
| 484 | |||
| 485 | andi r6, r5, _PAGE_PRESENT | ||
| 486 | beqi r6, _unaligned_ex1 /* Bail if no page */ | ||
| 487 | |||
| 488 | andi r5, r5, 0xfffff000 /* Extract RPN */ | ||
| 489 | andi r4, r4, 0x00000fff /* Extract offset */ | ||
| 490 | or r4, r4, r5 /* Create physical address */ | ||
| 491 | #endif /* CONFIG_MMU */ | ||
| 281 | 492 | ||
| 282 | andi r6, r3, 0x400; /* Extract ESR[S] */ | 493 | andi r6, r3, 0x400; /* Extract ESR[S] */ |
| 283 | bnei r6, ex_sw; | 494 | bnei r6, ex_sw; |
| @@ -355,6 +566,7 @@ ex_shw: | |||
| 355 | ex_sw_end: /* Exception handling of store word, ends. */ | 566 | ex_sw_end: /* Exception handling of store word, ends. */ |
| 356 | 567 | ||
| 357 | ex_handler_done: | 568 | ex_handler_done: |
| 569 | #ifndef CONFIG_MMU | ||
| 358 | lwi r5, r1, 0 /* RMSR */ | 570 | lwi r5, r1, 0 /* RMSR */ |
| 359 | mts rmsr, r5 | 571 | mts rmsr, r5 |
| 360 | nop | 572 | nop |
| @@ -366,13 +578,455 @@ ex_handler_done: | |||
| 366 | 578 | ||
| 367 | rted r17, 0 | 579 | rted r17, 0 |
| 368 | addik r1, r1, (EX_HANDLER_STACK_SIZ); /* Restore stack frame */ | 580 | addik r1, r1, (EX_HANDLER_STACK_SIZ); /* Restore stack frame */ |
| 581 | #else | ||
| 582 | RESTORE_STATE; | ||
| 583 | rted r17, 0 | ||
| 584 | nop | ||
| 585 | #endif | ||
| 586 | |||
| 587 | #ifdef CONFIG_MMU | ||
| 588 | /* Exception vector entry code. This code runs with address translation | ||
| 589 | * turned off (i.e. using physical addresses). */ | ||
| 590 | |||
| 591 | /* Exception vectors. */ | ||
| 592 | |||
| 593 | /* 0x10 - Data Storage Exception | ||
| 594 | * This happens for just a few reasons. U0 set (but we don't do that), | ||
| 595 | * or zone protection fault (user violation, write to protected page). | ||
| 596 | * If this is just an update of modified status, we do that quickly | ||
| 597 | * and exit. Otherwise, we call heavyweight functions to do the work. | ||
| 598 | */ | ||
| 599 | handle_data_storage_exception: | ||
| 600 | /* Working registers already saved: R3, R4, R5, R6 | ||
| 601 | * R3 = ESR | ||
| 602 | */ | ||
| 603 | mfs r11, rpid | ||
| 604 | nop | ||
| 605 | bri 4 | ||
| 606 | mfs r3, rear /* Get faulting address */ | ||
| 607 | nop | ||
| 608 | /* If we are faulting a kernel address, we have to use the | ||
| 609 | * kernel page tables. | ||
| 610 | */ | ||
| 611 | ori r4, r0, CONFIG_KERNEL_START | ||
| 612 | cmpu r4, r3, r4 | ||
| 613 | bgti r4, ex3 | ||
| 614 | /* First, check if it was a zone fault (which means a user | ||
| 615 | * tried to access a kernel or read-protected page - always | ||
| 616 | * a SEGV). All other faults here must be stores, so no | ||
| 617 | * need to check ESR_S as well. */ | ||
| 618 | mfs r4, resr | ||
| 619 | nop | ||
| 620 | andi r4, r4, 0x800 /* ESR_Z - zone protection */ | ||
| 621 | bnei r4, ex2 | ||
| 622 | |||
| 623 | ori r4, r0, swapper_pg_dir | ||
| 624 | mts rpid, r0 /* TLB will have 0 TID */ | ||
| 625 | nop | ||
| 626 | bri ex4 | ||
| 627 | |||
| 628 | /* Get the PGD for the current thread. */ | ||
| 629 | ex3: | ||
| 630 | /* First, check if it was a zone fault (which means a user | ||
| 631 | * tried to access a kernel or read-protected page - always | ||
| 632 | * a SEGV). All other faults here must be stores, so no | ||
| 633 | * need to check ESR_S as well. */ | ||
| 634 | mfs r4, resr | ||
| 635 | nop | ||
| 636 | andi r4, r4, 0x800 /* ESR_Z */ | ||
| 637 | bnei r4, ex2 | ||
| 638 | /* get current task address */ | ||
| 639 | addi r4 ,CURRENT_TASK, TOPHYS(0); | ||
| 640 | lwi r4, r4, TASK_THREAD+PGDIR | ||
| 641 | ex4: | ||
| 642 | tophys(r4,r4) | ||
| 643 | BSRLI(r5,r3,20) /* Create L1 (pgdir/pmd) address */ | ||
| 644 | andi r5, r5, 0xffc | ||
| 645 | /* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */ | ||
| 646 | or r4, r4, r5 | ||
| 647 | lwi r4, r4, 0 /* Get L1 entry */ | ||
| 648 | andi r5, r4, 0xfffff000 /* Extract L2 (pte) base address */ | ||
| 649 | beqi r5, ex2 /* Bail if no table */ | ||
| 650 | |||
| 651 | tophys(r5,r5) | ||
| 652 | BSRLI(r6,r3,10) /* Compute PTE address */ | ||
| 653 | andi r6, r6, 0xffc | ||
| 654 | andi r5, r5, 0xfffff003 | ||
| 655 | or r5, r5, r6 | ||
| 656 | lwi r4, r5, 0 /* Get Linux PTE */ | ||
| 657 | |||
| 658 | andi r6, r4, _PAGE_RW /* Is it writeable? */ | ||
| 659 | beqi r6, ex2 /* Bail if not */ | ||
| 660 | |||
| 661 | /* Update 'changed' */ | ||
| 662 | ori r4, r4, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE | ||
| 663 | swi r4, r5, 0 /* Update Linux page table */ | ||
| 664 | |||
| 665 | /* Most of the Linux PTE is ready to load into the TLB LO. | ||
| 666 | * We set ZSEL, where only the LS-bit determines user access. | ||
| 667 | * We set execute, because we don't have the granularity to | ||
| 668 | * properly set this at the page level (Linux problem). | ||
| 669 | * If shared is set, we cause a zero PID->TID load. | ||
| 670 | * Many of these bits are software only. Bits we don't set | ||
| 671 | * here we (properly should) assume have the appropriate value. | ||
| 672 | */ | ||
| 673 | andni r4, r4, 0x0ce2 /* Make sure 20, 21 are zero */ | ||
| 674 | ori r4, r4, _PAGE_HWEXEC /* make it executable */ | ||
| 675 | |||
| 676 | /* find the TLB index that caused the fault. It has to be here*/ | ||
| 677 | mts rtlbsx, r3 | ||
| 678 | nop | ||
| 679 | mfs r5, rtlbx /* DEBUG: TBD */ | ||
| 680 | nop | ||
| 681 | mts rtlblo, r4 /* Load TLB LO */ | ||
| 682 | nop | ||
| 683 | /* Will sync shadow TLBs */ | ||
| 684 | |||
| 685 | /* Done...restore registers and get out of here. */ | ||
| 686 | mts rpid, r11 | ||
| 687 | nop | ||
| 688 | bri 4 | ||
| 689 | |||
| 690 | RESTORE_STATE; | ||
| 691 | rted r17, 0 | ||
| 692 | nop | ||
| 693 | ex2: | ||
| 694 | /* The bailout. Restore registers to pre-exception conditions | ||
| 695 | * and call the heavyweights to help us out. */ | ||
| 696 | mts rpid, r11 | ||
| 697 | nop | ||
| 698 | bri 4 | ||
| 699 | RESTORE_STATE; | ||
| 700 | bri page_fault_data_trap | ||
| 701 | |||
| 702 | |||
| 703 | /* 0x11 - Instruction Storage Exception | ||
| 704 | * This is caused by a fetch from non-execute or guarded pages. */ | ||
| 705 | handle_instruction_storage_exception: | ||
| 706 | /* Working registers already saved: R3, R4, R5, R6 | ||
| 707 | * R3 = ESR | ||
| 708 | */ | ||
| 709 | |||
| 710 | mfs r3, rear /* Get faulting address */ | ||
| 711 | nop | ||
| 712 | RESTORE_STATE; | ||
| 713 | bri page_fault_instr_trap | ||
| 714 | |||
| 715 | /* 0x12 - Data TLB Miss Exception | ||
| 716 | * As the name implies, translation is not in the MMU, so search the | ||
| 717 | * page tables and fix it. The only purpose of this function is to | ||
| 718 | * load TLB entries from the page table if they exist. | ||
| 719 | */ | ||
| 720 | handle_data_tlb_miss_exception: | ||
| 721 | /* Working registers already saved: R3, R4, R5, R6 | ||
| 722 | * R3 = ESR | ||
| 723 | */ | ||
| 724 | mfs r11, rpid | ||
| 725 | nop | ||
| 726 | bri 4 | ||
| 727 | mfs r3, rear /* Get faulting address */ | ||
| 728 | nop | ||
| 729 | |||
| 730 | /* If we are faulting a kernel address, we have to use the | ||
| 731 | * kernel page tables. */ | ||
| 732 | ori r4, r0, CONFIG_KERNEL_START | ||
| 733 | cmpu r4, r3, r4 | ||
| 734 | bgti r4, ex5 | ||
| 735 | ori r4, r0, swapper_pg_dir | ||
| 736 | mts rpid, r0 /* TLB will have 0 TID */ | ||
| 737 | nop | ||
| 738 | bri ex6 | ||
| 369 | 739 | ||
| 740 | /* Get the PGD for the current thread. */ | ||
| 741 | ex5: | ||
| 742 | /* get current task address */ | ||
| 743 | addi r4 ,CURRENT_TASK, TOPHYS(0); | ||
| 744 | lwi r4, r4, TASK_THREAD+PGDIR | ||
| 745 | ex6: | ||
| 746 | tophys(r4,r4) | ||
| 747 | BSRLI(r5,r3,20) /* Create L1 (pgdir/pmd) address */ | ||
| 748 | andi r5, r5, 0xffc | ||
| 749 | /* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */ | ||
| 750 | or r4, r4, r5 | ||
| 751 | lwi r4, r4, 0 /* Get L1 entry */ | ||
| 752 | andi r5, r4, 0xfffff000 /* Extract L2 (pte) base address */ | ||
| 753 | beqi r5, ex7 /* Bail if no table */ | ||
| 754 | |||
| 755 | tophys(r5,r5) | ||
| 756 | BSRLI(r6,r3,10) /* Compute PTE address */ | ||
| 757 | andi r6, r6, 0xffc | ||
| 758 | andi r5, r5, 0xfffff003 | ||
| 759 | or r5, r5, r6 | ||
| 760 | lwi r4, r5, 0 /* Get Linux PTE */ | ||
| 761 | |||
| 762 | andi r6, r4, _PAGE_PRESENT | ||
| 763 | beqi r6, ex7 | ||
| 764 | |||
| 765 | ori r4, r4, _PAGE_ACCESSED | ||
| 766 | swi r4, r5, 0 | ||
| 767 | |||
| 768 | /* Most of the Linux PTE is ready to load into the TLB LO. | ||
| 769 | * We set ZSEL, where only the LS-bit determines user access. | ||
| 770 | * We set execute, because we don't have the granularity to | ||
| 771 | * properly set this at the page level (Linux problem). | ||
| 772 | * If shared is set, we cause a zero PID->TID load. | ||
| 773 | * Many of these bits are software only. Bits we don't set | ||
| 774 | * here we (properly should) assume have the appropriate value. | ||
| 775 | */ | ||
| 776 | andni r4, r4, 0x0ce2 /* Make sure 20, 21 are zero */ | ||
| 777 | |||
| 778 | bri finish_tlb_load | ||
| 779 | ex7: | ||
| 780 | /* The bailout. Restore registers to pre-exception conditions | ||
| 781 | * and call the heavyweights to help us out. | ||
| 782 | */ | ||
| 783 | mts rpid, r11 | ||
| 784 | nop | ||
| 785 | bri 4 | ||
| 786 | RESTORE_STATE; | ||
| 787 | bri page_fault_data_trap | ||
| 788 | |||
| 789 | /* 0x13 - Instruction TLB Miss Exception | ||
| 790 | * Nearly the same as above, except we get our information from | ||
| 791 | * different registers and bailout to a different point. | ||
| 792 | */ | ||
| 793 | handle_instruction_tlb_miss_exception: | ||
| 794 | /* Working registers already saved: R3, R4, R5, R6 | ||
| 795 | * R3 = ESR | ||
| 796 | */ | ||
| 797 | mfs r11, rpid | ||
| 798 | nop | ||
| 799 | bri 4 | ||
| 800 | mfs r3, rear /* Get faulting address */ | ||
| 801 | nop | ||
| 802 | |||
| 803 | /* If we are faulting a kernel address, we have to use the | ||
| 804 | * kernel page tables. | ||
| 805 | */ | ||
| 806 | ori r4, r0, CONFIG_KERNEL_START | ||
| 807 | cmpu r4, r3, r4 | ||
| 808 | bgti r4, ex8 | ||
| 809 | ori r4, r0, swapper_pg_dir | ||
| 810 | mts rpid, r0 /* TLB will have 0 TID */ | ||
| 811 | nop | ||
| 812 | bri ex9 | ||
| 813 | |||
| 814 | /* Get the PGD for the current thread. */ | ||
| 815 | ex8: | ||
| 816 | /* get current task address */ | ||
| 817 | addi r4 ,CURRENT_TASK, TOPHYS(0); | ||
| 818 | lwi r4, r4, TASK_THREAD+PGDIR | ||
| 819 | ex9: | ||
| 820 | tophys(r4,r4) | ||
| 821 | BSRLI(r5,r3,20) /* Create L1 (pgdir/pmd) address */ | ||
| 822 | andi r5, r5, 0xffc | ||
| 823 | /* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */ | ||
| 824 | or r4, r4, r5 | ||
| 825 | lwi r4, r4, 0 /* Get L1 entry */ | ||
| 826 | andi r5, r4, 0xfffff000 /* Extract L2 (pte) base address */ | ||
| 827 | beqi r5, ex10 /* Bail if no table */ | ||
| 828 | |||
| 829 | tophys(r5,r5) | ||
| 830 | BSRLI(r6,r3,10) /* Compute PTE address */ | ||
| 831 | andi r6, r6, 0xffc | ||
| 832 | andi r5, r5, 0xfffff003 | ||
| 833 | or r5, r5, r6 | ||
| 834 | lwi r4, r5, 0 /* Get Linux PTE */ | ||
| 835 | |||
| 836 | andi r6, r4, _PAGE_PRESENT | ||
| 837 | beqi r6, ex7 | ||
| 838 | |||
| 839 | ori r4, r4, _PAGE_ACCESSED | ||
| 840 | swi r4, r5, 0 | ||
| 841 | |||
| 842 | /* Most of the Linux PTE is ready to load into the TLB LO. | ||
| 843 | * We set ZSEL, where only the LS-bit determines user access. | ||
| 844 | * We set execute, because we don't have the granularity to | ||
| 845 | * properly set this at the page level (Linux problem). | ||
| 846 | * If shared is set, we cause a zero PID->TID load. | ||
| 847 | * Many of these bits are software only. Bits we don't set | ||
| 848 | * here we (properly should) assume have the appropriate value. | ||
| 849 | */ | ||
| 850 | andni r4, r4, 0x0ce2 /* Make sure 20, 21 are zero */ | ||
| 851 | |||
| 852 | bri finish_tlb_load | ||
| 853 | ex10: | ||
| 854 | /* The bailout. Restore registers to pre-exception conditions | ||
| 855 | * and call the heavyweights to help us out. | ||
| 856 | */ | ||
| 857 | mts rpid, r11 | ||
| 858 | nop | ||
| 859 | bri 4 | ||
| 860 | RESTORE_STATE; | ||
| 861 | bri page_fault_instr_trap | ||
| 862 | |||
| 863 | /* Both the instruction and data TLB miss get to this point to load the TLB. | ||
| 864 | * r3 - EA of fault | ||
| 865 | * r4 - TLB LO (info from Linux PTE) | ||
| 866 | * r5, r6 - available to use | ||
| 867 | * PID - loaded with proper value when we get here | ||
| 868 | * Upon exit, we reload everything and RFI. | ||
| 869 | * A common place to load the TLB. | ||
| 870 | */ | ||
| 871 | tlb_index: | ||
| 872 | .long 1 /* MS: storing last used tlb index */ | ||
| 873 | finish_tlb_load: | ||
| 874 | /* MS: load the last used TLB index. */ | ||
| 875 | lwi r5, r0, TOPHYS(tlb_index) | ||
| 876 | addik r5, r5, 1 /* MS: inc tlb_index -> use next one */ | ||
| 877 | |||
| 878 | /* MS: FIXME this is potential fault, because this is mask not count */ | ||
| 879 | andi r5, r5, (MICROBLAZE_TLB_SIZE-1) | ||
| 880 | ori r6, r0, 1 | ||
| 881 | cmp r31, r5, r6 | ||
| 882 | blti r31, sem | ||
| 883 | addik r5, r6, 1 | ||
| 884 | sem: | ||
| 885 | /* MS: save back current TLB index */ | ||
| 886 | swi r5, r0, TOPHYS(tlb_index) | ||
| 887 | |||
| 888 | ori r4, r4, _PAGE_HWEXEC /* make it executable */ | ||
| 889 | mts rtlbx, r5 /* MS: save current TLB */ | ||
| 890 | nop | ||
| 891 | mts rtlblo, r4 /* MS: save to TLB LO */ | ||
| 892 | nop | ||
| 893 | |||
| 894 | /* Create EPN. This is the faulting address plus a static | ||
| 895 | * set of bits. These are size, valid, E, U0, and ensure | ||
| 896 | * bits 20 and 21 are zero. | ||
| 897 | */ | ||
| 898 | andi r3, r3, 0xfffff000 | ||
| 899 | ori r3, r3, 0x0c0 | ||
| 900 | mts rtlbhi, r3 /* Load TLB HI */ | ||
| 901 | nop | ||
| 902 | |||
| 903 | /* Done...restore registers and get out of here. */ | ||
| 904 | ex12: | ||
| 905 | mts rpid, r11 | ||
| 906 | nop | ||
| 907 | bri 4 | ||
| 908 | RESTORE_STATE; | ||
| 909 | rted r17, 0 | ||
| 910 | nop | ||
| 911 | |||
| 912 | /* extern void giveup_fpu(struct task_struct *prev) | ||
| 913 | * | ||
| 914 | * The MicroBlaze processor may have an FPU, so this should not just | ||
| 915 | * return: TBD. | ||
| 916 | */ | ||
| 917 | .globl giveup_fpu; | ||
| 918 | .align 4; | ||
| 919 | giveup_fpu: | ||
| 920 | bralid r15,0 /* TBD */ | ||
| 921 | nop | ||
| 922 | |||
| 923 | /* At present, this routine just hangs. - extern void abort(void) */ | ||
| 924 | .globl abort; | ||
| 925 | .align 4; | ||
| 926 | abort: | ||
| 927 | br r0 | ||
| 928 | |||
| 929 | .globl set_context; | ||
| 930 | .align 4; | ||
| 931 | set_context: | ||
| 932 | mts rpid, r5 /* Shadow TLBs are automatically */ | ||
| 933 | nop | ||
| 934 | bri 4 /* flushed by changing PID */ | ||
| 935 | rtsd r15,8 | ||
| 936 | nop | ||
| 937 | |||
| 938 | #endif | ||
| 370 | .end _hw_exception_handler | 939 | .end _hw_exception_handler |
| 371 | 940 | ||
| 941 | #ifdef CONFIG_MMU | ||
| 942 | /* Unaligned data access exception last on a 4k page for MMU. | ||
| 943 | * When this is called, we are in virtual mode with exceptions enabled | ||
| 944 | * and registers 1-13,15,17,18 saved. | ||
| 945 | * | ||
| 946 | * R3 = ESR | ||
| 947 | * R4 = EAR | ||
| 948 | * R7 = pointer to saved registers (struct pt_regs *regs) | ||
| 949 | * | ||
| 950 | * This handler perform the access, and returns via ret_from_exc. | ||
| 951 | */ | ||
| 952 | .global _unaligned_data_exception | ||
| 953 | .ent _unaligned_data_exception | ||
| 954 | _unaligned_data_exception: | ||
| 955 | andi r8, r3, 0x3E0; /* Mask and extract the register operand */ | ||
| 956 | BSRLI(r8,r8,2); /* r8 >> 2 = register operand * 8 */ | ||
| 957 | andi r6, r3, 0x400; /* Extract ESR[S] */ | ||
| 958 | bneid r6, ex_sw_vm; | ||
| 959 | andi r6, r3, 0x800; /* Extract ESR[W] - delay slot */ | ||
| 960 | ex_lw_vm: | ||
| 961 | beqid r6, ex_lhw_vm; | ||
| 962 | lbui r5, r4, 0; /* Exception address in r4 - delay slot */ | ||
| 963 | /* Load a word, byte-by-byte from destination address and save it in tmp space*/ | ||
| 964 | la r6, r0, ex_tmp_data_loc_0; | ||
| 965 | sbi r5, r6, 0; | ||
| 966 | lbui r5, r4, 1; | ||
| 967 | sbi r5, r6, 1; | ||
| 968 | lbui r5, r4, 2; | ||
| 969 | sbi r5, r6, 2; | ||
| 970 | lbui r5, r4, 3; | ||
| 971 | sbi r5, r6, 3; | ||
| 972 | brid ex_lw_tail_vm; | ||
| 973 | /* Get the destination register value into r3 - delay slot */ | ||
| 974 | lwi r3, r6, 0; | ||
| 975 | ex_lhw_vm: | ||
| 976 | /* Load a half-word, byte-by-byte from destination address and | ||
| 977 | * save it in tmp space */ | ||
| 978 | la r6, r0, ex_tmp_data_loc_0; | ||
| 979 | sbi r5, r6, 0; | ||
| 980 | lbui r5, r4, 1; | ||
| 981 | sbi r5, r6, 1; | ||
| 982 | lhui r3, r6, 0; /* Get the destination register value into r3 */ | ||
| 983 | ex_lw_tail_vm: | ||
| 984 | /* Form load_word jump table offset (lw_table_vm + (8 * regnum)) */ | ||
| 985 | addik r5, r8, lw_table_vm; | ||
| 986 | bra r5; | ||
| 987 | ex_lw_end_vm: /* Exception handling of load word, ends */ | ||
| 988 | brai ret_from_exc; | ||
| 989 | ex_sw_vm: | ||
| 990 | /* Form store_word jump table offset (sw_table_vm + (8 * regnum)) */ | ||
| 991 | addik r5, r8, sw_table_vm; | ||
| 992 | bra r5; | ||
| 993 | ex_sw_tail_vm: | ||
| 994 | la r5, r0, ex_tmp_data_loc_0; | ||
| 995 | beqid r6, ex_shw_vm; | ||
| 996 | swi r3, r5, 0; /* Get the word - delay slot */ | ||
| 997 | /* Store the word, byte-by-byte into destination address */ | ||
| 998 | lbui r3, r5, 0; | ||
| 999 | sbi r3, r4, 0; | ||
| 1000 | lbui r3, r5, 1; | ||
| 1001 | sbi r3, r4, 1; | ||
| 1002 | lbui r3, r5, 2; | ||
| 1003 | sbi r3, r4, 2; | ||
| 1004 | lbui r3, r5, 3; | ||
| 1005 | brid ret_from_exc; | ||
| 1006 | sbi r3, r4, 3; /* Delay slot */ | ||
| 1007 | ex_shw_vm: | ||
| 1008 | /* Store the lower half-word, byte-by-byte into destination address */ | ||
| 1009 | lbui r3, r5, 2; | ||
| 1010 | sbi r3, r4, 0; | ||
| 1011 | lbui r3, r5, 3; | ||
| 1012 | brid ret_from_exc; | ||
| 1013 | sbi r3, r4, 1; /* Delay slot */ | ||
| 1014 | ex_sw_end_vm: /* Exception handling of store word, ends. */ | ||
| 1015 | .end _unaligned_data_exception | ||
| 1016 | #endif /* CONFIG_MMU */ | ||
| 1017 | |||
| 372 | ex_handler_unhandled: | 1018 | ex_handler_unhandled: |
| 373 | /* FIXME add handle function for unhandled exception - dump register */ | 1019 | /* FIXME add handle function for unhandled exception - dump register */ |
| 374 | bri 0 | 1020 | bri 0 |
| 375 | 1021 | ||
| 1022 | /* | ||
| 1023 | * hw_exception_handler Jump Table | ||
| 1024 | * - Contains code snippets for each register that caused the unalign exception | ||
| 1025 | * - Hence exception handler is NOT self-modifying | ||
| 1026 | * - Separate table for load exceptions and store exceptions. | ||
| 1027 | * - Each table is of size: (8 * 32) = 256 bytes | ||
| 1028 | */ | ||
| 1029 | |||
| 376 | .section .text | 1030 | .section .text |
| 377 | .align 4 | 1031 | .align 4 |
| 378 | lw_table: | 1032 | lw_table: |
| @@ -407,7 +1061,11 @@ lw_r27: R3_TO_LWREG (27); | |||
| 407 | lw_r28: R3_TO_LWREG (28); | 1061 | lw_r28: R3_TO_LWREG (28); |
| 408 | lw_r29: R3_TO_LWREG (29); | 1062 | lw_r29: R3_TO_LWREG (29); |
| 409 | lw_r30: R3_TO_LWREG (30); | 1063 | lw_r30: R3_TO_LWREG (30); |
| 1064 | #ifdef CONFIG_MMU | ||
| 1065 | lw_r31: R3_TO_LWREG_V (31); | ||
| 1066 | #else | ||
| 410 | lw_r31: R3_TO_LWREG (31); | 1067 | lw_r31: R3_TO_LWREG (31); |
| 1068 | #endif | ||
| 411 | 1069 | ||
| 412 | sw_table: | 1070 | sw_table: |
| 413 | sw_r0: SWREG_TO_R3 (0); | 1071 | sw_r0: SWREG_TO_R3 (0); |
| @@ -441,7 +1099,81 @@ sw_r27: SWREG_TO_R3 (27); | |||
| 441 | sw_r28: SWREG_TO_R3 (28); | 1099 | sw_r28: SWREG_TO_R3 (28); |
| 442 | sw_r29: SWREG_TO_R3 (29); | 1100 | sw_r29: SWREG_TO_R3 (29); |
| 443 | sw_r30: SWREG_TO_R3 (30); | 1101 | sw_r30: SWREG_TO_R3 (30); |
| 1102 | #ifdef CONFIG_MMU | ||
| 1103 | sw_r31: SWREG_TO_R3_V (31); | ||
| 1104 | #else | ||
| 444 | sw_r31: SWREG_TO_R3 (31); | 1105 | sw_r31: SWREG_TO_R3 (31); |
| 1106 | #endif | ||
| 1107 | |||
| 1108 | #ifdef CONFIG_MMU | ||
| 1109 | lw_table_vm: | ||
| 1110 | lw_r0_vm: R3_TO_LWREG_VM (0); | ||
| 1111 | lw_r1_vm: R3_TO_LWREG_VM_V (1); | ||
| 1112 | lw_r2_vm: R3_TO_LWREG_VM_V (2); | ||
| 1113 | lw_r3_vm: R3_TO_LWREG_VM_V (3); | ||
| 1114 | lw_r4_vm: R3_TO_LWREG_VM_V (4); | ||
| 1115 | lw_r5_vm: R3_TO_LWREG_VM_V (5); | ||
| 1116 | lw_r6_vm: R3_TO_LWREG_VM_V (6); | ||
| 1117 | lw_r7_vm: R3_TO_LWREG_VM_V (7); | ||
| 1118 | lw_r8_vm: R3_TO_LWREG_VM_V (8); | ||
| 1119 | lw_r9_vm: R3_TO_LWREG_VM_V (9); | ||
| 1120 | lw_r10_vm: R3_TO_LWREG_VM_V (10); | ||
| 1121 | lw_r11_vm: R3_TO_LWREG_VM_V (11); | ||
| 1122 | lw_r12_vm: R3_TO_LWREG_VM_V (12); | ||
| 1123 | lw_r13_vm: R3_TO_LWREG_VM_V (13); | ||
| 1124 | lw_r14_vm: R3_TO_LWREG_VM (14); | ||
| 1125 | lw_r15_vm: R3_TO_LWREG_VM_V (15); | ||
| 1126 | lw_r16_vm: R3_TO_LWREG_VM (16); | ||
| 1127 | lw_r17_vm: R3_TO_LWREG_VM_V (17); | ||
| 1128 | lw_r18_vm: R3_TO_LWREG_VM_V (18); | ||
| 1129 | lw_r19_vm: R3_TO_LWREG_VM (19); | ||
| 1130 | lw_r20_vm: R3_TO_LWREG_VM (20); | ||
| 1131 | lw_r21_vm: R3_TO_LWREG_VM (21); | ||
| 1132 | lw_r22_vm: R3_TO_LWREG_VM (22); | ||
| 1133 | lw_r23_vm: R3_TO_LWREG_VM (23); | ||
| 1134 | lw_r24_vm: R3_TO_LWREG_VM (24); | ||
| 1135 | lw_r25_vm: R3_TO_LWREG_VM (25); | ||
| 1136 | lw_r26_vm: R3_TO_LWREG_VM (26); | ||
| 1137 | lw_r27_vm: R3_TO_LWREG_VM (27); | ||
| 1138 | lw_r28_vm: R3_TO_LWREG_VM (28); | ||
| 1139 | lw_r29_vm: R3_TO_LWREG_VM (29); | ||
| 1140 | lw_r30_vm: R3_TO_LWREG_VM (30); | ||
| 1141 | lw_r31_vm: R3_TO_LWREG_VM_V (31); | ||
| 1142 | |||
| 1143 | sw_table_vm: | ||
| 1144 | sw_r0_vm: SWREG_TO_R3_VM (0); | ||
| 1145 | sw_r1_vm: SWREG_TO_R3_VM_V (1); | ||
| 1146 | sw_r2_vm: SWREG_TO_R3_VM_V (2); | ||
| 1147 | sw_r3_vm: SWREG_TO_R3_VM_V (3); | ||
| 1148 | sw_r4_vm: SWREG_TO_R3_VM_V (4); | ||
| 1149 | sw_r5_vm: SWREG_TO_R3_VM_V (5); | ||
| 1150 | sw_r6_vm: SWREG_TO_R3_VM_V (6); | ||
| 1151 | sw_r7_vm: SWREG_TO_R3_VM_V (7); | ||
| 1152 | sw_r8_vm: SWREG_TO_R3_VM_V (8); | ||
| 1153 | sw_r9_vm: SWREG_TO_R3_VM_V (9); | ||
| 1154 | sw_r10_vm: SWREG_TO_R3_VM_V (10); | ||
| 1155 | sw_r11_vm: SWREG_TO_R3_VM_V (11); | ||
| 1156 | sw_r12_vm: SWREG_TO_R3_VM_V (12); | ||
| 1157 | sw_r13_vm: SWREG_TO_R3_VM_V (13); | ||
| 1158 | sw_r14_vm: SWREG_TO_R3_VM (14); | ||
| 1159 | sw_r15_vm: SWREG_TO_R3_VM_V (15); | ||
| 1160 | sw_r16_vm: SWREG_TO_R3_VM (16); | ||
| 1161 | sw_r17_vm: SWREG_TO_R3_VM_V (17); | ||
| 1162 | sw_r18_vm: SWREG_TO_R3_VM_V (18); | ||
| 1163 | sw_r19_vm: SWREG_TO_R3_VM (19); | ||
| 1164 | sw_r20_vm: SWREG_TO_R3_VM (20); | ||
| 1165 | sw_r21_vm: SWREG_TO_R3_VM (21); | ||
| 1166 | sw_r22_vm: SWREG_TO_R3_VM (22); | ||
| 1167 | sw_r23_vm: SWREG_TO_R3_VM (23); | ||
| 1168 | sw_r24_vm: SWREG_TO_R3_VM (24); | ||
| 1169 | sw_r25_vm: SWREG_TO_R3_VM (25); | ||
| 1170 | sw_r26_vm: SWREG_TO_R3_VM (26); | ||
| 1171 | sw_r27_vm: SWREG_TO_R3_VM (27); | ||
| 1172 | sw_r28_vm: SWREG_TO_R3_VM (28); | ||
| 1173 | sw_r29_vm: SWREG_TO_R3_VM (29); | ||
| 1174 | sw_r30_vm: SWREG_TO_R3_VM (30); | ||
| 1175 | sw_r31_vm: SWREG_TO_R3_VM_V (31); | ||
| 1176 | #endif /* CONFIG_MMU */ | ||
| 445 | 1177 | ||
| 446 | /* Temporary data structures used in the handler */ | 1178 | /* Temporary data structures used in the handler */ |
| 447 | .section .data | 1179 | .section .data |
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c index 5f71790e3c3c..59ff20e33e0c 100644 --- a/arch/microblaze/kernel/microblaze_ksyms.c +++ b/arch/microblaze/kernel/microblaze_ksyms.c | |||
| @@ -45,3 +45,5 @@ extern void __udivsi3(void); | |||
| 45 | EXPORT_SYMBOL(__udivsi3); | 45 | EXPORT_SYMBOL(__udivsi3); |
| 46 | extern void __umodsi3(void); | 46 | extern void __umodsi3(void); |
| 47 | EXPORT_SYMBOL(__umodsi3); | 47 | EXPORT_SYMBOL(__umodsi3); |
| 48 | extern char *_ebss; | ||
| 49 | EXPORT_SYMBOL_GPL(_ebss); | ||
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S new file mode 100644 index 000000000000..df16c6287a8e --- /dev/null +++ b/arch/microblaze/kernel/misc.S | |||
| @@ -0,0 +1,120 @@ | |||
| 1 | /* | ||
| 2 | * Miscellaneous low-level MMU functions. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
| 5 | * Copyright (C) 2008-2009 PetaLogix | ||
| 6 | * Copyright (C) 2007 Xilinx, Inc. All rights reserved. | ||
| 7 | * | ||
| 8 | * Derived from arch/ppc/kernel/misc.S | ||
| 9 | * | ||
| 10 | * This file is subject to the terms and conditions of the GNU General | ||
| 11 | * Public License. See the file COPYING in the main directory of this | ||
| 12 | * archive for more details. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/linkage.h> | ||
| 16 | #include <linux/sys.h> | ||
| 17 | #include <asm/unistd.h> | ||
| 18 | #include <linux/errno.h> | ||
| 19 | #include <asm/mmu.h> | ||
| 20 | #include <asm/page.h> | ||
| 21 | |||
| 22 | .text | ||
| 23 | /* | ||
| 24 | * Flush MMU TLB | ||
| 25 | * | ||
| 26 | * We avoid flushing the pinned 0, 1 and possibly 2 entries. | ||
| 27 | */ | ||
| 28 | .globl _tlbia; | ||
| 29 | .align 4; | ||
| 30 | _tlbia: | ||
| 31 | addik r12, r0, 63 /* flush all entries (63 - 3) */ | ||
| 32 | /* isync */ | ||
| 33 | _tlbia_1: | ||
| 34 | mts rtlbx, r12 | ||
| 35 | nop | ||
| 36 | mts rtlbhi, r0 /* flush: ensure V is clear */ | ||
| 37 | nop | ||
| 38 | addik r11, r12, -2 | ||
| 39 | bneid r11, _tlbia_1 /* loop for all entries */ | ||
| 40 | addik r12, r12, -1 | ||
| 41 | /* sync */ | ||
| 42 | rtsd r15, 8 | ||
| 43 | nop | ||
| 44 | |||
| 45 | /* | ||
| 46 | * Flush MMU TLB for a particular address (in r5) | ||
| 47 | */ | ||
| 48 | .globl _tlbie; | ||
| 49 | .align 4; | ||
| 50 | _tlbie: | ||
| 51 | mts rtlbsx, r5 /* look up the address in TLB */ | ||
| 52 | nop | ||
| 53 | mfs r12, rtlbx /* Retrieve index */ | ||
| 54 | nop | ||
| 55 | blti r12, _tlbie_1 /* Check if found */ | ||
| 56 | mts rtlbhi, r0 /* flush: ensure V is clear */ | ||
| 57 | nop | ||
| 58 | _tlbie_1: | ||
| 59 | rtsd r15, 8 | ||
| 60 | nop | ||
| 61 | |||
| 62 | /* | ||
| 63 | * Allocate TLB entry for early console | ||
| 64 | */ | ||
| 65 | .globl early_console_reg_tlb_alloc; | ||
| 66 | .align 4; | ||
| 67 | early_console_reg_tlb_alloc: | ||
| 68 | /* | ||
| 69 | * Load a TLB entry for the UART, so that microblaze_progress() can use | ||
| 70 | * the UARTs nice and early. We use a 4k real==virtual mapping. | ||
| 71 | */ | ||
| 72 | ori r4, r0, 63 | ||
| 73 | mts rtlbx, r4 /* TLB slot 2 */ | ||
| 74 | |||
| 75 | or r4,r5,r0 | ||
| 76 | andi r4,r4,0xfffff000 | ||
| 77 | ori r4,r4,(TLB_WR|TLB_I|TLB_M|TLB_G) | ||
| 78 | |||
| 79 | andi r5,r5,0xfffff000 | ||
| 80 | ori r5,r5,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K)) | ||
| 81 | |||
| 82 | mts rtlblo,r4 /* Load the data portion of the entry */ | ||
| 83 | nop | ||
| 84 | mts rtlbhi,r5 /* Load the tag portion of the entry */ | ||
| 85 | nop | ||
| 86 | rtsd r15, 8 | ||
| 87 | nop | ||
| 88 | |||
| 89 | /* | ||
| 90 | * Copy a whole page (4096 bytes). | ||
| 91 | */ | ||
| 92 | #define COPY_16_BYTES \ | ||
| 93 | lwi r7, r6, 0; \ | ||
| 94 | lwi r8, r6, 4; \ | ||
| 95 | lwi r9, r6, 8; \ | ||
| 96 | lwi r10, r6, 12; \ | ||
| 97 | swi r7, r5, 0; \ | ||
| 98 | swi r8, r5, 4; \ | ||
| 99 | swi r9, r5, 8; \ | ||
| 100 | swi r10, r5, 12 | ||
| 101 | |||
| 102 | |||
| 103 | /* FIXME DCACHE_LINE_BYTES (CONFIG_XILINX_MICROBLAZE0_DCACHE_LINE_LEN * 4)*/ | ||
| 104 | #define DCACHE_LINE_BYTES (4 * 4) | ||
| 105 | |||
| 106 | .globl copy_page; | ||
| 107 | .align 4; | ||
| 108 | copy_page: | ||
| 109 | ori r11, r0, (PAGE_SIZE/DCACHE_LINE_BYTES) - 1 | ||
| 110 | _copy_page_loop: | ||
| 111 | COPY_16_BYTES | ||
| 112 | #if DCACHE_LINE_BYTES >= 32 | ||
| 113 | COPY_16_BYTES | ||
| 114 | #endif | ||
| 115 | addik r6, r6, DCACHE_LINE_BYTES | ||
| 116 | addik r5, r5, DCACHE_LINE_BYTES | ||
| 117 | bneid r11, _copy_page_loop | ||
| 118 | addik r11, r11, -1 | ||
| 119 | rtsd r15, 8 | ||
| 120 | nop | ||
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c index 07d4fa339eda..00b12c6d5326 100644 --- a/arch/microblaze/kernel/process.c +++ b/arch/microblaze/kernel/process.c | |||
| @@ -126,9 +126,54 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
| 126 | else | 126 | else |
| 127 | childregs->r1 = ((unsigned long) ti) + THREAD_SIZE; | 127 | childregs->r1 = ((unsigned long) ti) + THREAD_SIZE; |
| 128 | 128 | ||
| 129 | #ifndef CONFIG_MMU | ||
| 129 | memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); | 130 | memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); |
| 130 | ti->cpu_context.r1 = (unsigned long)childregs; | 131 | ti->cpu_context.r1 = (unsigned long)childregs; |
| 131 | ti->cpu_context.msr = (unsigned long)childregs->msr; | 132 | ti->cpu_context.msr = (unsigned long)childregs->msr; |
| 133 | #else | ||
| 134 | |||
| 135 | /* if creating a kernel thread then update the current reg (we don't | ||
| 136 | * want to use the parent's value when restoring by POP_STATE) */ | ||
| 137 | if (kernel_mode(regs)) | ||
| 138 | /* save new current on stack to use POP_STATE */ | ||
| 139 | childregs->CURRENT_TASK = (unsigned long)p; | ||
| 140 | /* if returning to user then use the parent's value of this register */ | ||
| 141 | |||
| 142 | /* if we're creating a new kernel thread then just zeroing all | ||
| 143 | * the registers. That's OK for a brand new thread.*/ | ||
| 144 | /* Pls. note that some of them will be restored in POP_STATE */ | ||
| 145 | if (kernel_mode(regs)) | ||
| 146 | memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); | ||
| 147 | /* if this thread is created for fork/vfork/clone, then we want to | ||
| 148 | * restore all the parent's context */ | ||
| 149 | /* in addition to the registers which will be restored by POP_STATE */ | ||
| 150 | else { | ||
| 151 | ti->cpu_context = *(struct cpu_context *)regs; | ||
| 152 | childregs->msr |= MSR_UMS; | ||
| 153 | } | ||
| 154 | |||
| 155 | /* FIXME STATE_SAVE_PT_OFFSET; */ | ||
| 156 | ti->cpu_context.r1 = (unsigned long)childregs - STATE_SAVE_ARG_SPACE; | ||
| 157 | /* we should consider the fact that childregs is a copy of the parent | ||
| 158 | * regs which were saved immediately after entering the kernel state | ||
| 159 | * before enabling VM. This MSR will be restored in switch_to and | ||
| 160 | * RETURN() and we want to have the right machine state there | ||
| 161 | * specifically this state must have INTs disabled before and enabled | ||
| 162 | * after performing rtbd | ||
| 163 | * compose the right MSR for RETURN(). It will work for switch_to also | ||
| 164 | * excepting for VM and UMS | ||
| 165 | * don't touch UMS , CARRY and cache bits | ||
| 166 | * right now MSR is a copy of parent one */ | ||
| 167 | childregs->msr |= MSR_BIP; | ||
| 168 | childregs->msr &= ~MSR_EIP; | ||
| 169 | childregs->msr |= MSR_IE; | ||
| 170 | childregs->msr &= ~MSR_VM; | ||
| 171 | childregs->msr |= MSR_VMS; | ||
| 172 | childregs->msr |= MSR_EE; /* exceptions will be enabled*/ | ||
| 173 | |||
| 174 | ti->cpu_context.msr = (childregs->msr|MSR_VM); | ||
| 175 | ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */ | ||
| 176 | #endif | ||
| 132 | ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8; | 177 | ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8; |
| 133 | 178 | ||
| 134 | if (clone_flags & CLONE_SETTLS) | 179 | if (clone_flags & CLONE_SETTLS) |
| @@ -137,6 +182,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
| 137 | return 0; | 182 | return 0; |
| 138 | } | 183 | } |
| 139 | 184 | ||
| 185 | #ifndef CONFIG_MMU | ||
| 140 | /* | 186 | /* |
| 141 | * Return saved PC of a blocked thread. | 187 | * Return saved PC of a blocked thread. |
| 142 | */ | 188 | */ |
| @@ -151,6 +197,7 @@ unsigned long thread_saved_pc(struct task_struct *tsk) | |||
| 151 | else | 197 | else |
| 152 | return ctx->r14; | 198 | return ctx->r14; |
| 153 | } | 199 | } |
| 200 | #endif | ||
| 154 | 201 | ||
| 155 | static void kernel_thread_helper(int (*fn)(void *), void *arg) | 202 | static void kernel_thread_helper(int (*fn)(void *), void *arg) |
| 156 | { | 203 | { |
| @@ -173,6 +220,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) | |||
| 173 | return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, | 220 | return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, |
| 174 | ®s, 0, NULL, NULL); | 221 | ®s, 0, NULL, NULL); |
| 175 | } | 222 | } |
| 223 | EXPORT_SYMBOL_GPL(kernel_thread); | ||
| 176 | 224 | ||
| 177 | unsigned long get_wchan(struct task_struct *p) | 225 | unsigned long get_wchan(struct task_struct *p) |
| 178 | { | 226 | { |
| @@ -188,3 +236,14 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp) | |||
| 188 | regs->r1 = usp; | 236 | regs->r1 = usp; |
| 189 | regs->pt_mode = 0; | 237 | regs->pt_mode = 0; |
| 190 | } | 238 | } |
| 239 | |||
| 240 | #ifdef CONFIG_MMU | ||
| 241 | #include <linux/elfcore.h> | ||
| 242 | /* | ||
| 243 | * Set up a thread for executing a new program | ||
| 244 | */ | ||
| 245 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs) | ||
| 246 | { | ||
| 247 | return 0; /* MicroBlaze has no separate FPU registers */ | ||
| 248 | } | ||
| 249 | #endif /* CONFIG_MMU */ | ||
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c index 34c48718061a..c005cc6f1aaf 100644 --- a/arch/microblaze/kernel/prom.c +++ b/arch/microblaze/kernel/prom.c | |||
| @@ -509,12 +509,13 @@ static void __init early_init_dt_check_for_initrd(unsigned long node) | |||
| 509 | 509 | ||
| 510 | prop = of_get_flat_dt_prop(node, "linux,initrd-start", &l); | 510 | prop = of_get_flat_dt_prop(node, "linux,initrd-start", &l); |
| 511 | if (prop) { | 511 | if (prop) { |
| 512 | initrd_start = (unsigned long)__va(of_read_ulong(prop, l/4)); | 512 | initrd_start = (unsigned long) |
| 513 | __va((u32)of_read_ulong(prop, l/4)); | ||
| 513 | 514 | ||
| 514 | prop = of_get_flat_dt_prop(node, "linux,initrd-end", &l); | 515 | prop = of_get_flat_dt_prop(node, "linux,initrd-end", &l); |
| 515 | if (prop) { | 516 | if (prop) { |
| 516 | initrd_end = (unsigned long) | 517 | initrd_end = (unsigned long) |
| 517 | __va(of_read_ulong(prop, l/4)); | 518 | __va((u32)of_read_ulong(prop, 1/4)); |
| 518 | initrd_below_start_ok = 1; | 519 | initrd_below_start_ok = 1; |
| 519 | } else { | 520 | } else { |
| 520 | initrd_start = 0; | 521 | initrd_start = 0; |
| @@ -563,7 +564,9 @@ static int __init early_init_dt_scan_chosen(unsigned long node, | |||
| 563 | strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE)); | 564 | strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE)); |
| 564 | 565 | ||
| 565 | #ifdef CONFIG_CMDLINE | 566 | #ifdef CONFIG_CMDLINE |
| 567 | #ifndef CONFIG_CMDLINE_FORCE | ||
| 566 | if (p == NULL || l == 0 || (l == 1 && (*p) == 0)) | 568 | if (p == NULL || l == 0 || (l == 1 && (*p) == 0)) |
| 569 | #endif | ||
| 567 | strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE); | 570 | strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE); |
| 568 | #endif /* CONFIG_CMDLINE */ | 571 | #endif /* CONFIG_CMDLINE */ |
| 569 | 572 | ||
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c index eb6b41758e23..8709bea09604 100644 --- a/arch/microblaze/kernel/setup.c +++ b/arch/microblaze/kernel/setup.c | |||
| @@ -42,10 +42,6 @@ char cmd_line[COMMAND_LINE_SIZE]; | |||
| 42 | 42 | ||
| 43 | void __init setup_arch(char **cmdline_p) | 43 | void __init setup_arch(char **cmdline_p) |
| 44 | { | 44 | { |
| 45 | #ifdef CONFIG_CMDLINE_FORCE | ||
| 46 | strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE); | ||
| 47 | strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE); | ||
| 48 | #endif | ||
| 49 | *cmdline_p = cmd_line; | 45 | *cmdline_p = cmd_line; |
| 50 | 46 | ||
| 51 | console_verbose(); | 47 | console_verbose(); |
| @@ -102,14 +98,34 @@ void __init machine_early_init(const char *cmdline, unsigned int ram, | |||
| 102 | { | 98 | { |
| 103 | unsigned long *src, *dst = (unsigned long *)0x0; | 99 | unsigned long *src, *dst = (unsigned long *)0x0; |
| 104 | 100 | ||
| 101 | /* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the | ||
| 102 | * end of kernel. There are two position which we want to check. | ||
| 103 | * The first is __init_end and the second __bss_start. | ||
| 104 | */ | ||
| 105 | #ifdef CONFIG_MTD_UCLINUX | ||
| 106 | int romfs_size; | ||
| 107 | unsigned int romfs_base; | ||
| 108 | char *old_klimit = klimit; | ||
| 109 | |||
| 110 | romfs_base = (ram ? ram : (unsigned int)&__init_end); | ||
| 111 | romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base)); | ||
| 112 | if (!romfs_size) { | ||
| 113 | romfs_base = (unsigned int)&__bss_start; | ||
| 114 | romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base)); | ||
| 115 | } | ||
| 116 | |||
| 117 | /* Move ROMFS out of BSS before clearing it */ | ||
| 118 | if (romfs_size > 0) { | ||
| 119 | memmove(&_ebss, (int *)romfs_base, romfs_size); | ||
| 120 | klimit += romfs_size; | ||
| 121 | } | ||
| 122 | #endif | ||
| 123 | |||
| 105 | /* clearing bss section */ | 124 | /* clearing bss section */ |
| 106 | memset(__bss_start, 0, __bss_stop-__bss_start); | 125 | memset(__bss_start, 0, __bss_stop-__bss_start); |
| 107 | memset(_ssbss, 0, _esbss-_ssbss); | 126 | memset(_ssbss, 0, _esbss-_ssbss); |
| 108 | 127 | ||
| 109 | /* | 128 | /* Copy command line passed from bootloader */ |
| 110 | * Copy command line passed from bootloader, or use default | ||
| 111 | * if none provided, or forced | ||
| 112 | */ | ||
| 113 | #ifndef CONFIG_CMDLINE_BOOL | 129 | #ifndef CONFIG_CMDLINE_BOOL |
| 114 | if (cmdline && cmdline[0] != '\0') | 130 | if (cmdline && cmdline[0] != '\0') |
| 115 | strlcpy(cmd_line, cmdline, COMMAND_LINE_SIZE); | 131 | strlcpy(cmd_line, cmdline, COMMAND_LINE_SIZE); |
| @@ -126,27 +142,15 @@ void __init machine_early_init(const char *cmdline, unsigned int ram, | |||
| 126 | printk(KERN_NOTICE "Found FDT at 0x%08x\n", fdt); | 142 | printk(KERN_NOTICE "Found FDT at 0x%08x\n", fdt); |
| 127 | 143 | ||
| 128 | #ifdef CONFIG_MTD_UCLINUX | 144 | #ifdef CONFIG_MTD_UCLINUX |
| 129 | { | 145 | early_printk("Found romfs @ 0x%08x (0x%08x)\n", |
| 130 | int size; | 146 | romfs_base, romfs_size); |
| 131 | unsigned int romfs_base; | 147 | early_printk("#### klimit %p ####\n", old_klimit); |
| 132 | romfs_base = (ram ? ram : (unsigned int)&__init_end); | 148 | BUG_ON(romfs_size < 0); /* What else can we do? */ |
| 133 | /* if CONFIG_MTD_UCLINUX_EBSS is defined, assume ROMFS is at the | 149 | |
| 134 | * end of kernel, which is ROMFS_LOCATION defined above. */ | 150 | early_printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n", |
| 135 | size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base)); | 151 | romfs_size, romfs_base, (unsigned)&_ebss); |
| 136 | early_printk("Found romfs @ 0x%08x (0x%08x)\n", | 152 | |
| 137 | romfs_base, size); | 153 | early_printk("New klimit: 0x%08x\n", (unsigned)klimit); |
| 138 | early_printk("#### klimit %p ####\n", klimit); | ||
| 139 | BUG_ON(size < 0); /* What else can we do? */ | ||
| 140 | |||
| 141 | /* Use memmove to handle likely case of memory overlap */ | ||
| 142 | early_printk("Moving 0x%08x bytes from 0x%08x to 0x%08x\n", | ||
| 143 | size, romfs_base, (unsigned)&_ebss); | ||
| 144 | memmove(&_ebss, (int *)romfs_base, size); | ||
| 145 | |||
| 146 | /* update klimit */ | ||
| 147 | klimit += PAGE_ALIGN(size); | ||
| 148 | early_printk("New klimit: 0x%08x\n", (unsigned)klimit); | ||
| 149 | } | ||
| 150 | #endif | 154 | #endif |
| 151 | 155 | ||
| 152 | for (src = __ivt_start; src < __ivt_end; src++, dst++) | 156 | for (src = __ivt_start; src < __ivt_end; src++, dst++) |
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c index 40d36931e363..4c0e6521b114 100644 --- a/arch/microblaze/kernel/signal.c +++ b/arch/microblaze/kernel/signal.c | |||
| @@ -152,8 +152,8 @@ struct rt_sigframe { | |||
| 152 | unsigned long tramp[2]; /* signal trampoline */ | 152 | unsigned long tramp[2]; /* signal trampoline */ |
| 153 | }; | 153 | }; |
| 154 | 154 | ||
| 155 | static int | 155 | static int restore_sigcontext(struct pt_regs *regs, |
| 156 | restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *rval_p) | 156 | struct sigcontext __user *sc, int *rval_p) |
| 157 | { | 157 | { |
| 158 | unsigned int err = 0; | 158 | unsigned int err = 0; |
| 159 | 159 | ||
| @@ -211,11 +211,10 @@ badframe: | |||
| 211 | 211 | ||
| 212 | asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) | 212 | asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) |
| 213 | { | 213 | { |
| 214 | struct rt_sigframe *frame = | 214 | struct rt_sigframe __user *frame = |
| 215 | (struct rt_sigframe *)(regs->r1 + STATE_SAVE_ARG_SPACE); | 215 | (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE); |
| 216 | 216 | ||
| 217 | sigset_t set; | 217 | sigset_t set; |
| 218 | stack_t st; | ||
| 219 | int rval; | 218 | int rval; |
| 220 | 219 | ||
| 221 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | 220 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) |
| @@ -233,11 +232,10 @@ asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) | |||
| 233 | if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval)) | 232 | if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval)) |
| 234 | goto badframe; | 233 | goto badframe; |
| 235 | 234 | ||
| 236 | if (__copy_from_user((void *)&st, &frame->uc.uc_stack, sizeof(st))) | ||
| 237 | goto badframe; | ||
| 238 | /* It is more difficult to avoid calling this function than to | 235 | /* It is more difficult to avoid calling this function than to |
| 239 | call it and ignore errors. */ | 236 | call it and ignore errors. */ |
| 240 | do_sigaltstack(&st, NULL, regs->r1); | 237 | if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1)) |
| 238 | goto badframe; | ||
| 241 | 239 | ||
| 242 | return rval; | 240 | return rval; |
| 243 | 241 | ||
| @@ -251,7 +249,7 @@ badframe: | |||
| 251 | */ | 249 | */ |
| 252 | 250 | ||
| 253 | static int | 251 | static int |
| 254 | setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, | 252 | setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, |
| 255 | unsigned long mask) | 253 | unsigned long mask) |
| 256 | { | 254 | { |
| 257 | int err = 0; | 255 | int err = 0; |
| @@ -278,7 +276,7 @@ setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, | |||
| 278 | /* | 276 | /* |
| 279 | * Determine which stack to use.. | 277 | * Determine which stack to use.. |
| 280 | */ | 278 | */ |
| 281 | static inline void * | 279 | static inline void __user * |
| 282 | get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) | 280 | get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) |
| 283 | { | 281 | { |
| 284 | /* Default to using normal stack */ | 282 | /* Default to using normal stack */ |
| @@ -287,87 +285,13 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) | |||
| 287 | if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && !on_sig_stack(sp)) | 285 | if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && !on_sig_stack(sp)) |
| 288 | sp = current->sas_ss_sp + current->sas_ss_size; | 286 | sp = current->sas_ss_sp + current->sas_ss_size; |
| 289 | 287 | ||
| 290 | return (void *)((sp - frame_size) & -8UL); | 288 | return (void __user *)((sp - frame_size) & -8UL); |
| 291 | } | ||
| 292 | |||
| 293 | static void setup_frame(int sig, struct k_sigaction *ka, | ||
| 294 | sigset_t *set, struct pt_regs *regs) | ||
| 295 | { | ||
| 296 | struct sigframe *frame; | ||
| 297 | int err = 0; | ||
| 298 | int signal; | ||
| 299 | |||
| 300 | frame = get_sigframe(ka, regs, sizeof(*frame)); | ||
| 301 | |||
| 302 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
| 303 | goto give_sigsegv; | ||
| 304 | |||
| 305 | signal = current_thread_info()->exec_domain | ||
| 306 | && current_thread_info()->exec_domain->signal_invmap | ||
| 307 | && sig < 32 | ||
| 308 | ? current_thread_info()->exec_domain->signal_invmap[sig] | ||
| 309 | : sig; | ||
| 310 | |||
| 311 | err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); | ||
| 312 | |||
| 313 | if (_NSIG_WORDS > 1) { | ||
| 314 | err |= __copy_to_user(frame->extramask, &set->sig[1], | ||
| 315 | sizeof(frame->extramask)); | ||
| 316 | } | ||
| 317 | |||
| 318 | /* Set up to return from userspace. If provided, use a stub | ||
| 319 | already in userspace. */ | ||
| 320 | /* minus 8 is offset to cater for "rtsd r15,8" offset */ | ||
| 321 | if (ka->sa.sa_flags & SA_RESTORER) { | ||
| 322 | regs->r15 = ((unsigned long)ka->sa.sa_restorer)-8; | ||
| 323 | } else { | ||
| 324 | /* Note, these encodings are _big endian_! */ | ||
| 325 | |||
| 326 | /* addi r12, r0, __NR_sigreturn */ | ||
| 327 | err |= __put_user(0x31800000 | __NR_sigreturn , | ||
| 328 | frame->tramp + 0); | ||
| 329 | /* brki r14, 0x8 */ | ||
| 330 | err |= __put_user(0xb9cc0008, frame->tramp + 1); | ||
| 331 | |||
| 332 | /* Return from sighandler will jump to the tramp. | ||
| 333 | Negative 8 offset because return is rtsd r15, 8 */ | ||
| 334 | regs->r15 = ((unsigned long)frame->tramp)-8; | ||
| 335 | |||
| 336 | __invalidate_cache_sigtramp((unsigned long)frame->tramp); | ||
| 337 | } | ||
| 338 | |||
| 339 | if (err) | ||
| 340 | goto give_sigsegv; | ||
| 341 | |||
| 342 | /* Set up registers for signal handler */ | ||
| 343 | regs->r1 = (unsigned long) frame - STATE_SAVE_ARG_SPACE; | ||
| 344 | |||
| 345 | /* Signal handler args: */ | ||
| 346 | regs->r5 = signal; /* Arg 0: signum */ | ||
| 347 | regs->r6 = (unsigned long) &frame->sc; /* arg 1: sigcontext */ | ||
| 348 | |||
| 349 | /* Offset of 4 to handle microblaze rtid r14, 0 */ | ||
| 350 | regs->pc = (unsigned long)ka->sa.sa_handler; | ||
| 351 | |||
| 352 | set_fs(USER_DS); | ||
| 353 | |||
| 354 | #ifdef DEBUG_SIG | ||
| 355 | printk(KERN_INFO "SIG deliver (%s:%d): sp=%p pc=%08lx\n", | ||
| 356 | current->comm, current->pid, frame, regs->pc); | ||
| 357 | #endif | ||
| 358 | |||
| 359 | return; | ||
| 360 | |||
| 361 | give_sigsegv: | ||
| 362 | if (sig == SIGSEGV) | ||
| 363 | ka->sa.sa_handler = SIG_DFL; | ||
| 364 | force_sig(SIGSEGV, current); | ||
| 365 | } | 289 | } |
| 366 | 290 | ||
| 367 | static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | 291 | static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, |
| 368 | sigset_t *set, struct pt_regs *regs) | 292 | sigset_t *set, struct pt_regs *regs) |
| 369 | { | 293 | { |
| 370 | struct rt_sigframe *frame; | 294 | struct rt_sigframe __user *frame; |
| 371 | int err = 0; | 295 | int err = 0; |
| 372 | int signal; | 296 | int signal; |
| 373 | 297 | ||
| @@ -382,7 +306,8 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 382 | ? current_thread_info()->exec_domain->signal_invmap[sig] | 306 | ? current_thread_info()->exec_domain->signal_invmap[sig] |
| 383 | : sig; | 307 | : sig; |
| 384 | 308 | ||
| 385 | err |= copy_siginfo_to_user(&frame->info, info); | 309 | if (info) |
| 310 | err |= copy_siginfo_to_user(&frame->info, info); | ||
| 386 | 311 | ||
| 387 | /* Create the ucontext. */ | 312 | /* Create the ucontext. */ |
| 388 | err |= __put_user(0, &frame->uc.uc_flags); | 313 | err |= __put_user(0, &frame->uc.uc_flags); |
| @@ -463,7 +388,15 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler) | |||
| 463 | case -ERESTARTNOINTR: | 388 | case -ERESTARTNOINTR: |
| 464 | do_restart: | 389 | do_restart: |
| 465 | /* offset of 4 bytes to re-execute trap (brki) instruction */ | 390 | /* offset of 4 bytes to re-execute trap (brki) instruction */ |
| 391 | #ifndef CONFIG_MMU | ||
| 466 | regs->pc -= 4; | 392 | regs->pc -= 4; |
| 393 | #else | ||
| 394 | /* offset of 8 bytes required = 4 for rtbd | ||
| 395 | offset, plus 4 for size of | ||
| 396 | "brki r14,8" | ||
| 397 | instruction. */ | ||
| 398 | regs->pc -= 8; | ||
| 399 | #endif | ||
| 467 | break; | 400 | break; |
| 468 | } | 401 | } |
| 469 | } | 402 | } |
| @@ -480,7 +413,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, | |||
| 480 | if (ka->sa.sa_flags & SA_SIGINFO) | 413 | if (ka->sa.sa_flags & SA_SIGINFO) |
| 481 | setup_rt_frame(sig, ka, info, oldset, regs); | 414 | setup_rt_frame(sig, ka, info, oldset, regs); |
| 482 | else | 415 | else |
| 483 | setup_frame(sig, ka, oldset, regs); | 416 | setup_rt_frame(sig, ka, NULL, oldset, regs); |
| 484 | 417 | ||
| 485 | if (ka->sa.sa_flags & SA_ONESHOT) | 418 | if (ka->sa.sa_flags & SA_ONESHOT) |
| 486 | ka->sa.sa_handler = SIG_DFL; | 419 | ka->sa.sa_handler = SIG_DFL; |
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S index 3bb42ec924c2..376d1789f7c0 100644 --- a/arch/microblaze/kernel/syscall_table.S +++ b/arch/microblaze/kernel/syscall_table.S | |||
| @@ -2,7 +2,11 @@ ENTRY(sys_call_table) | |||
| 2 | .long sys_restart_syscall /* 0 - old "setup()" system call, | 2 | .long sys_restart_syscall /* 0 - old "setup()" system call, |
| 3 | * used for restarting */ | 3 | * used for restarting */ |
| 4 | .long sys_exit | 4 | .long sys_exit |
| 5 | .long sys_ni_syscall /* was fork */ | 5 | #ifdef CONFIG_MMU |
| 6 | .long sys_fork_wrapper | ||
| 7 | #else | ||
| 8 | .long sys_ni_syscall | ||
| 9 | #endif | ||
| 6 | .long sys_read | 10 | .long sys_read |
| 7 | .long sys_write | 11 | .long sys_write |
| 8 | .long sys_open /* 5 */ | 12 | .long sys_open /* 5 */ |
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c index 293ef486013a..eaaaf805f31b 100644 --- a/arch/microblaze/kernel/traps.c +++ b/arch/microblaze/kernel/traps.c | |||
| @@ -22,14 +22,6 @@ void trap_init(void) | |||
| 22 | __enable_hw_exceptions(); | 22 | __enable_hw_exceptions(); |
| 23 | } | 23 | } |
| 24 | 24 | ||
| 25 | void __bad_xchg(volatile void *ptr, int size) | ||
| 26 | { | ||
| 27 | printk(KERN_INFO "xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n", | ||
| 28 | __builtin_return_address(0), ptr, size); | ||
| 29 | BUG(); | ||
| 30 | } | ||
| 31 | EXPORT_SYMBOL(__bad_xchg); | ||
| 32 | |||
| 33 | static int kstack_depth_to_print = 24; | 25 | static int kstack_depth_to_print = 24; |
| 34 | 26 | ||
| 35 | static int __init kstack_setup(char *s) | 27 | static int __init kstack_setup(char *s) |
| @@ -105,3 +97,37 @@ void dump_stack(void) | |||
| 105 | show_stack(NULL, NULL); | 97 | show_stack(NULL, NULL); |
| 106 | } | 98 | } |
| 107 | EXPORT_SYMBOL(dump_stack); | 99 | EXPORT_SYMBOL(dump_stack); |
| 100 | |||
| 101 | #ifdef CONFIG_MMU | ||
| 102 | void __bug(const char *file, int line, void *data) | ||
| 103 | { | ||
| 104 | if (data) | ||
| 105 | printk(KERN_CRIT "kernel BUG at %s:%d (data = %p)!\n", | ||
| 106 | file, line, data); | ||
| 107 | else | ||
| 108 | printk(KERN_CRIT "kernel BUG at %s:%d!\n", file, line); | ||
| 109 | |||
| 110 | machine_halt(); | ||
| 111 | } | ||
| 112 | |||
| 113 | int bad_trap(int trap_num, struct pt_regs *regs) | ||
| 114 | { | ||
| 115 | printk(KERN_CRIT | ||
| 116 | "unimplemented trap %d called at 0x%08lx, pid %d!\n", | ||
| 117 | trap_num, regs->pc, current->pid); | ||
| 118 | return -ENOSYS; | ||
| 119 | } | ||
| 120 | |||
| 121 | int debug_trap(struct pt_regs *regs) | ||
| 122 | { | ||
| 123 | int i; | ||
| 124 | printk(KERN_CRIT "debug trap\n"); | ||
| 125 | for (i = 0; i < 32; i++) { | ||
| 126 | /* printk("r%i:%08X\t",i,regs->gpr[i]); */ | ||
| 127 | if ((i % 4) == 3) | ||
| 128 | printk(KERN_CRIT "\n"); | ||
| 129 | } | ||
| 130 | printk(KERN_CRIT "pc:%08lX\tmsr:%08lX\n", regs->pc, regs->msr); | ||
| 131 | return -ENOSYS; | ||
| 132 | } | ||
| 133 | #endif | ||
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S index 840385e51291..8ae807ab7a51 100644 --- a/arch/microblaze/kernel/vmlinux.lds.S +++ b/arch/microblaze/kernel/vmlinux.lds.S | |||
| @@ -17,8 +17,7 @@ ENTRY(_start) | |||
| 17 | jiffies = jiffies_64 + 4; | 17 | jiffies = jiffies_64 + 4; |
| 18 | 18 | ||
| 19 | SECTIONS { | 19 | SECTIONS { |
| 20 | . = CONFIG_KERNEL_BASE_ADDR; | 20 | . = CONFIG_KERNEL_START; |
| 21 | |||
| 22 | .text : { | 21 | .text : { |
| 23 | _text = . ; | 22 | _text = . ; |
| 24 | _stext = . ; | 23 | _stext = . ; |
| @@ -132,6 +131,8 @@ SECTIONS { | |||
| 132 | __con_initcall_end = .; | 131 | __con_initcall_end = .; |
| 133 | } | 132 | } |
| 134 | 133 | ||
| 134 | SECURITY_INIT | ||
| 135 | |||
| 135 | __init_end_before_initramfs = .; | 136 | __init_end_before_initramfs = .; |
| 136 | 137 | ||
| 137 | .init.ramfs ALIGN(4096) : { | 138 | .init.ramfs ALIGN(4096) : { |
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile index d27126bf306a..71c8cb6c9e43 100644 --- a/arch/microblaze/lib/Makefile +++ b/arch/microblaze/lib/Makefile | |||
| @@ -10,4 +10,5 @@ else | |||
| 10 | lib-y += memcpy.o memmove.o | 10 | lib-y += memcpy.o memmove.o |
| 11 | endif | 11 | endif |
| 12 | 12 | ||
| 13 | lib-y += uaccess.o | 13 | lib-$(CONFIG_NO_MMU) += uaccess.o |
| 14 | lib-$(CONFIG_MMU) += uaccess_old.o | ||
diff --git a/arch/microblaze/lib/checksum.c b/arch/microblaze/lib/checksum.c index 809340070a13..f08e74591418 100644 --- a/arch/microblaze/lib/checksum.c +++ b/arch/microblaze/lib/checksum.c | |||
| @@ -32,9 +32,10 @@ | |||
| 32 | /* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access | 32 | /* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access |
| 33 | kills, so most of the assembly has to go. */ | 33 | kills, so most of the assembly has to go. */ |
| 34 | 34 | ||
| 35 | #include <net/checksum.h> | ||
| 36 | #include <asm/checksum.h> | ||
| 37 | #include <linux/module.h> | 35 | #include <linux/module.h> |
| 36 | #include <net/checksum.h> | ||
| 37 | |||
| 38 | #include <asm/byteorder.h> | ||
| 38 | 39 | ||
| 39 | static inline unsigned short from32to16(unsigned long x) | 40 | static inline unsigned short from32to16(unsigned long x) |
| 40 | { | 41 | { |
| @@ -102,6 +103,7 @@ __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | |||
| 102 | { | 103 | { |
| 103 | return (__force __sum16)~do_csum(iph, ihl*4); | 104 | return (__force __sum16)~do_csum(iph, ihl*4); |
| 104 | } | 105 | } |
| 106 | EXPORT_SYMBOL(ip_fast_csum); | ||
| 105 | 107 | ||
| 106 | /* | 108 | /* |
| 107 | * computes the checksum of a memory block at buff, length len, | 109 | * computes the checksum of a memory block at buff, length len, |
| @@ -115,15 +117,16 @@ __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | |||
| 115 | * | 117 | * |
| 116 | * it's best to have buff aligned on a 32-bit boundary | 118 | * it's best to have buff aligned on a 32-bit boundary |
| 117 | */ | 119 | */ |
| 118 | __wsum csum_partial(const void *buff, int len, __wsum sum) | 120 | __wsum csum_partial(const void *buff, int len, __wsum wsum) |
| 119 | { | 121 | { |
| 122 | unsigned int sum = (__force unsigned int)wsum; | ||
| 120 | unsigned int result = do_csum(buff, len); | 123 | unsigned int result = do_csum(buff, len); |
| 121 | 124 | ||
| 122 | /* add in old sum, and carry.. */ | 125 | /* add in old sum, and carry.. */ |
| 123 | result += sum; | 126 | result += sum; |
| 124 | if (sum > result) | 127 | if (sum > result) |
| 125 | result += 1; | 128 | result += 1; |
| 126 | return result; | 129 | return (__force __wsum)result; |
| 127 | } | 130 | } |
| 128 | EXPORT_SYMBOL(csum_partial); | 131 | EXPORT_SYMBOL(csum_partial); |
| 129 | 132 | ||
| @@ -131,9 +134,9 @@ EXPORT_SYMBOL(csum_partial); | |||
| 131 | * this routine is used for miscellaneous IP-like checksums, mainly | 134 | * this routine is used for miscellaneous IP-like checksums, mainly |
| 132 | * in icmp.c | 135 | * in icmp.c |
| 133 | */ | 136 | */ |
| 134 | __sum16 ip_compute_csum(const unsigned char *buff, int len) | 137 | __sum16 ip_compute_csum(const void *buff, int len) |
| 135 | { | 138 | { |
| 136 | return ~do_csum(buff, len); | 139 | return (__force __sum16)~do_csum(buff, len); |
| 137 | } | 140 | } |
| 138 | EXPORT_SYMBOL(ip_compute_csum); | 141 | EXPORT_SYMBOL(ip_compute_csum); |
| 139 | 142 | ||
| @@ -141,12 +144,18 @@ EXPORT_SYMBOL(ip_compute_csum); | |||
| 141 | * copy from fs while checksumming, otherwise like csum_partial | 144 | * copy from fs while checksumming, otherwise like csum_partial |
| 142 | */ | 145 | */ |
| 143 | __wsum | 146 | __wsum |
| 144 | csum_partial_copy_from_user(const char __user *src, char *dst, int len, | 147 | csum_partial_copy_from_user(const void __user *src, void *dst, int len, |
| 145 | int sum, int *csum_err) | 148 | __wsum sum, int *csum_err) |
| 146 | { | 149 | { |
| 147 | if (csum_err) | 150 | int missing; |
| 151 | |||
| 152 | missing = __copy_from_user(dst, src, len); | ||
| 153 | if (missing) { | ||
| 154 | memset(dst + len - missing, 0, missing); | ||
| 155 | *csum_err = -EFAULT; | ||
| 156 | } else | ||
| 148 | *csum_err = 0; | 157 | *csum_err = 0; |
| 149 | memcpy(dst, src, len); | 158 | |
| 150 | return csum_partial(dst, len, sum); | 159 | return csum_partial(dst, len, sum); |
| 151 | } | 160 | } |
| 152 | EXPORT_SYMBOL(csum_partial_copy_from_user); | 161 | EXPORT_SYMBOL(csum_partial_copy_from_user); |
| @@ -155,7 +164,7 @@ EXPORT_SYMBOL(csum_partial_copy_from_user); | |||
| 155 | * copy from ds while checksumming, otherwise like csum_partial | 164 | * copy from ds while checksumming, otherwise like csum_partial |
| 156 | */ | 165 | */ |
| 157 | __wsum | 166 | __wsum |
| 158 | csum_partial_copy(const char *src, char *dst, int len, int sum) | 167 | csum_partial_copy(const void *src, void *dst, int len, __wsum sum) |
| 159 | { | 168 | { |
| 160 | memcpy(dst, src, len); | 169 | memcpy(dst, src, len); |
| 161 | return csum_partial(dst, len, sum); | 170 | return csum_partial(dst, len, sum); |
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c index 5880119c4487..6a907c58a4bc 100644 --- a/arch/microblaze/lib/memcpy.c +++ b/arch/microblaze/lib/memcpy.c | |||
| @@ -154,8 +154,3 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c) | |||
| 154 | } | 154 | } |
| 155 | EXPORT_SYMBOL(memcpy); | 155 | EXPORT_SYMBOL(memcpy); |
| 156 | #endif /* __HAVE_ARCH_MEMCPY */ | 156 | #endif /* __HAVE_ARCH_MEMCPY */ |
| 157 | |||
| 158 | void *cacheable_memcpy(void *d, const void *s, __kernel_size_t c) | ||
| 159 | { | ||
| 160 | return memcpy(d, s, c); | ||
| 161 | } | ||
diff --git a/arch/microblaze/lib/uaccess_old.S b/arch/microblaze/lib/uaccess_old.S new file mode 100644 index 000000000000..67f991c14b8a --- /dev/null +++ b/arch/microblaze/lib/uaccess_old.S | |||
| @@ -0,0 +1,135 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Michal Simek <monstr@monstr.eu> | ||
| 3 | * Copyright (C) 2009 PetaLogix | ||
| 4 | * Copyright (C) 2007 LynuxWorks, Inc. | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/errno.h> | ||
| 12 | #include <linux/linkage.h> | ||
| 13 | |||
| 14 | /* | ||
| 15 | * int __strncpy_user(char *to, char *from, int len); | ||
| 16 | * | ||
| 17 | * Returns: | ||
| 18 | * -EFAULT for an exception | ||
| 19 | * len if we hit the buffer limit | ||
| 20 | * bytes copied | ||
| 21 | */ | ||
| 22 | |||
| 23 | .text | ||
| 24 | .globl __strncpy_user; | ||
| 25 | .align 4; | ||
| 26 | __strncpy_user: | ||
| 27 | |||
| 28 | /* | ||
| 29 | * r5 - to | ||
| 30 | * r6 - from | ||
| 31 | * r7 - len | ||
| 32 | * r3 - temp count | ||
| 33 | * r4 - temp val | ||
| 34 | */ | ||
| 35 | addik r3,r7,0 /* temp_count = len */ | ||
| 36 | beqi r3,3f | ||
| 37 | 1: | ||
| 38 | lbu r4,r6,r0 | ||
| 39 | sb r4,r5,r0 | ||
| 40 | |||
| 41 | addik r3,r3,-1 | ||
| 42 | beqi r3,2f /* break on len */ | ||
| 43 | |||
| 44 | addik r5,r5,1 | ||
| 45 | bneid r4,1b | ||
| 46 | addik r6,r6,1 /* delay slot */ | ||
| 47 | addik r3,r3,1 /* undo "temp_count--" */ | ||
| 48 | 2: | ||
| 49 | rsubk r3,r3,r7 /* temp_count = len - temp_count */ | ||
| 50 | 3: | ||
| 51 | rtsd r15,8 | ||
| 52 | nop | ||
| 53 | |||
| 54 | |||
| 55 | .section .fixup, "ax" | ||
| 56 | .align 2 | ||
| 57 | 4: | ||
| 58 | brid 3b | ||
| 59 | addik r3,r0, -EFAULT | ||
| 60 | |||
| 61 | .section __ex_table, "a" | ||
| 62 | .word 1b,4b | ||
| 63 | |||
| 64 | /* | ||
| 65 | * int __strnlen_user(char __user *str, int maxlen); | ||
| 66 | * | ||
| 67 | * Returns: | ||
| 68 | * 0 on error | ||
| 69 | * maxlen + 1 if no NUL byte found within maxlen bytes | ||
| 70 | * size of the string (including NUL byte) | ||
| 71 | */ | ||
| 72 | |||
| 73 | .text | ||
| 74 | .globl __strnlen_user; | ||
| 75 | .align 4; | ||
| 76 | __strnlen_user: | ||
| 77 | addik r3,r6,0 | ||
| 78 | beqi r3,3f | ||
| 79 | 1: | ||
| 80 | lbu r4,r5,r0 | ||
| 81 | beqid r4,2f /* break on NUL */ | ||
| 82 | addik r3,r3,-1 /* delay slot */ | ||
| 83 | |||
| 84 | bneid r3,1b | ||
| 85 | addik r5,r5,1 /* delay slot */ | ||
| 86 | |||
| 87 | addik r3,r3,-1 /* for break on len */ | ||
| 88 | 2: | ||
| 89 | rsubk r3,r3,r6 | ||
| 90 | 3: | ||
| 91 | rtsd r15,8 | ||
| 92 | nop | ||
| 93 | |||
| 94 | |||
| 95 | .section .fixup,"ax" | ||
| 96 | 4: | ||
| 97 | brid 3b | ||
| 98 | addk r3,r0,r0 | ||
| 99 | |||
| 100 | .section __ex_table,"a" | ||
| 101 | .word 1b,4b | ||
| 102 | |||
| 103 | /* | ||
| 104 | * int __copy_tofrom_user(char *to, char *from, int len) | ||
| 105 | * Return: | ||
| 106 | * 0 on success | ||
| 107 | * number of not copied bytes on error | ||
| 108 | */ | ||
| 109 | .text | ||
| 110 | .globl __copy_tofrom_user; | ||
| 111 | .align 4; | ||
| 112 | __copy_tofrom_user: | ||
| 113 | /* | ||
| 114 | * r5 - to | ||
| 115 | * r6 - from | ||
| 116 | * r7, r3 - count | ||
| 117 | * r4 - tempval | ||
| 118 | */ | ||
| 119 | addik r3,r7,0 | ||
| 120 | beqi r3,3f | ||
| 121 | 1: | ||
| 122 | lbu r4,r6,r0 | ||
| 123 | addik r6,r6,1 | ||
| 124 | 2: | ||
| 125 | sb r4,r5,r0 | ||
| 126 | addik r3,r3,-1 | ||
| 127 | bneid r3,1b | ||
| 128 | addik r5,r5,1 /* delay slot */ | ||
| 129 | 3: | ||
| 130 | rtsd r15,8 | ||
| 131 | nop | ||
| 132 | |||
| 133 | |||
| 134 | .section __ex_table,"a" | ||
| 135 | .word 1b,3b,2b,3b | ||
diff --git a/arch/microblaze/mm/Makefile b/arch/microblaze/mm/Makefile index bf9e4479a1fd..6c8a924d9e26 100644 --- a/arch/microblaze/mm/Makefile +++ b/arch/microblaze/mm/Makefile | |||
| @@ -3,3 +3,5 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-y := init.o | 5 | obj-y := init.o |
| 6 | |||
| 7 | obj-$(CONFIG_MMU) += pgtable.o mmu_context.o fault.o | ||
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c new file mode 100644 index 000000000000..5e67cd1fab40 --- /dev/null +++ b/arch/microblaze/mm/fault.c | |||
| @@ -0,0 +1,304 @@ | |||
| 1 | /* | ||
| 2 | * arch/microblaze/mm/fault.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007 Xilinx, Inc. All rights reserved. | ||
| 5 | * | ||
| 6 | * Derived from "arch/ppc/mm/fault.c" | ||
| 7 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
| 8 | * | ||
| 9 | * Derived from "arch/i386/mm/fault.c" | ||
| 10 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | ||
| 11 | * | ||
| 12 | * Modified by Cort Dougan and Paul Mackerras. | ||
| 13 | * | ||
| 14 | * This file is subject to the terms and conditions of the GNU General | ||
| 15 | * Public License. See the file COPYING in the main directory of this | ||
| 16 | * archive for more details. | ||
| 17 | * | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/signal.h> | ||
| 22 | #include <linux/sched.h> | ||
| 23 | #include <linux/kernel.h> | ||
| 24 | #include <linux/errno.h> | ||
| 25 | #include <linux/string.h> | ||
| 26 | #include <linux/types.h> | ||
| 27 | #include <linux/ptrace.h> | ||
| 28 | #include <linux/mman.h> | ||
| 29 | #include <linux/mm.h> | ||
| 30 | #include <linux/interrupt.h> | ||
| 31 | |||
| 32 | #include <asm/page.h> | ||
| 33 | #include <asm/pgtable.h> | ||
| 34 | #include <asm/mmu.h> | ||
| 35 | #include <asm/mmu_context.h> | ||
| 36 | #include <asm/system.h> | ||
| 37 | #include <linux/uaccess.h> | ||
| 38 | #include <asm/exceptions.h> | ||
| 39 | |||
| 40 | #if defined(CONFIG_KGDB) | ||
| 41 | int debugger_kernel_faults = 1; | ||
| 42 | #endif | ||
| 43 | |||
| 44 | static unsigned long pte_misses; /* updated by do_page_fault() */ | ||
| 45 | static unsigned long pte_errors; /* updated by do_page_fault() */ | ||
| 46 | |||
| 47 | /* | ||
| 48 | * Check whether the instruction at regs->pc is a store using | ||
| 49 | * an update addressing form which will update r1. | ||
| 50 | */ | ||
| 51 | static int store_updates_sp(struct pt_regs *regs) | ||
| 52 | { | ||
| 53 | unsigned int inst; | ||
| 54 | |||
| 55 | if (get_user(inst, (unsigned int *)regs->pc)) | ||
| 56 | return 0; | ||
| 57 | /* check for 1 in the rD field */ | ||
| 58 | if (((inst >> 21) & 0x1f) != 1) | ||
| 59 | return 0; | ||
| 60 | /* check for store opcodes */ | ||
| 61 | if ((inst & 0xd0000000) == 0xd0000000) | ||
| 62 | return 1; | ||
| 63 | return 0; | ||
| 64 | } | ||
| 65 | |||
| 66 | |||
| 67 | /* | ||
| 68 | * bad_page_fault is called when we have a bad access from the kernel. | ||
| 69 | * It is called from do_page_fault above and from some of the procedures | ||
| 70 | * in traps.c. | ||
| 71 | */ | ||
| 72 | static void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig) | ||
| 73 | { | ||
| 74 | const struct exception_table_entry *fixup; | ||
| 75 | /* MS: no context */ | ||
| 76 | /* Are we prepared to handle this fault? */ | ||
| 77 | fixup = search_exception_tables(regs->pc); | ||
| 78 | if (fixup) { | ||
| 79 | regs->pc = fixup->fixup; | ||
| 80 | return; | ||
| 81 | } | ||
| 82 | |||
| 83 | /* kernel has accessed a bad area */ | ||
| 84 | #if defined(CONFIG_KGDB) | ||
| 85 | if (debugger_kernel_faults) | ||
| 86 | debugger(regs); | ||
| 87 | #endif | ||
| 88 | die("kernel access of bad area", regs, sig); | ||
| 89 | } | ||
| 90 | |||
| 91 | /* | ||
| 92 | * The error_code parameter is ESR for a data fault, | ||
| 93 | * 0 for an instruction fault. | ||
| 94 | */ | ||
| 95 | void do_page_fault(struct pt_regs *regs, unsigned long address, | ||
| 96 | unsigned long error_code) | ||
| 97 | { | ||
| 98 | struct vm_area_struct *vma; | ||
| 99 | struct mm_struct *mm = current->mm; | ||
| 100 | siginfo_t info; | ||
| 101 | int code = SEGV_MAPERR; | ||
| 102 | int is_write = error_code & ESR_S; | ||
| 103 | int fault; | ||
| 104 | |||
| 105 | regs->ear = address; | ||
| 106 | regs->esr = error_code; | ||
| 107 | |||
| 108 | /* On a kernel SLB miss we can only check for a valid exception entry */ | ||
| 109 | if (kernel_mode(regs) && (address >= TASK_SIZE)) { | ||
| 110 | printk(KERN_WARNING "kernel task_size exceed"); | ||
| 111 | _exception(SIGSEGV, regs, code, address); | ||
| 112 | } | ||
| 113 | |||
| 114 | /* for instr TLB miss and instr storage exception ESR_S is undefined */ | ||
| 115 | if ((error_code & 0x13) == 0x13 || (error_code & 0x11) == 0x11) | ||
| 116 | is_write = 0; | ||
| 117 | |||
| 118 | #if defined(CONFIG_KGDB) | ||
| 119 | if (debugger_fault_handler && regs->trap == 0x300) { | ||
| 120 | debugger_fault_handler(regs); | ||
| 121 | return; | ||
| 122 | } | ||
| 123 | #endif /* CONFIG_KGDB */ | ||
| 124 | |||
| 125 | if (in_atomic() || mm == NULL) { | ||
| 126 | /* FIXME */ | ||
| 127 | if (kernel_mode(regs)) { | ||
| 128 | printk(KERN_EMERG | ||
| 129 | "Page fault in kernel mode - Oooou!!! pid %d\n", | ||
| 130 | current->pid); | ||
| 131 | _exception(SIGSEGV, regs, code, address); | ||
| 132 | return; | ||
| 133 | } | ||
| 134 | /* in_atomic() in user mode is really bad, | ||
| 135 | as is current->mm == NULL. */ | ||
| 136 | printk(KERN_EMERG "Page fault in user mode with " | ||
| 137 | "in_atomic(), mm = %p\n", mm); | ||
| 138 | printk(KERN_EMERG "r15 = %lx MSR = %lx\n", | ||
| 139 | regs->r15, regs->msr); | ||
| 140 | die("Weird page fault", regs, SIGSEGV); | ||
| 141 | } | ||
| 142 | |||
| 143 | /* When running in the kernel we expect faults to occur only to | ||
| 144 | * addresses in user space. All other faults represent errors in the | ||
| 145 | * kernel and should generate an OOPS. Unfortunately, in the case of an | ||
| 146 | * erroneous fault occurring in a code path which already holds mmap_sem | ||
| 147 | * we will deadlock attempting to validate the fault against the | ||
| 148 | * address space. Luckily the kernel only validly references user | ||
| 149 | * space from well defined areas of code, which are listed in the | ||
| 150 | * exceptions table. | ||
| 151 | * | ||
| 152 | * As the vast majority of faults will be valid we will only perform | ||
| 153 | * the source reference check when there is a possibility of a deadlock. | ||
| 154 | * Attempt to lock the address space, if we cannot we then validate the | ||
| 155 | * source. If this is invalid we can skip the address space check, | ||
| 156 | * thus avoiding the deadlock. | ||
| 157 | */ | ||
| 158 | if (!down_read_trylock(&mm->mmap_sem)) { | ||
| 159 | if (kernel_mode(regs) && !search_exception_tables(regs->pc)) | ||
| 160 | goto bad_area_nosemaphore; | ||
| 161 | |||
| 162 | down_read(&mm->mmap_sem); | ||
| 163 | } | ||
| 164 | |||
| 165 | vma = find_vma(mm, address); | ||
| 166 | if (!vma) | ||
| 167 | goto bad_area; | ||
| 168 | |||
| 169 | if (vma->vm_start <= address) | ||
| 170 | goto good_area; | ||
| 171 | |||
| 172 | if (!(vma->vm_flags & VM_GROWSDOWN)) | ||
| 173 | goto bad_area; | ||
| 174 | |||
| 175 | if (!is_write) | ||
| 176 | goto bad_area; | ||
| 177 | |||
| 178 | /* | ||
| 179 | * N.B. The ABI allows programs to access up to | ||
| 180 | * a few hundred bytes below the stack pointer (TBD). | ||
| 181 | * The kernel signal delivery code writes up to about 1.5kB | ||
| 182 | * below the stack pointer (r1) before decrementing it. | ||
| 183 | * The exec code can write slightly over 640kB to the stack | ||
| 184 | * before setting the user r1. Thus we allow the stack to | ||
| 185 | * expand to 1MB without further checks. | ||
| 186 | */ | ||
| 187 | if (address + 0x100000 < vma->vm_end) { | ||
| 188 | |||
| 189 | /* get user regs even if this fault is in kernel mode */ | ||
| 190 | struct pt_regs *uregs = current->thread.regs; | ||
| 191 | if (uregs == NULL) | ||
| 192 | goto bad_area; | ||
| 193 | |||
| 194 | /* | ||
| 195 | * A user-mode access to an address a long way below | ||
| 196 | * the stack pointer is only valid if the instruction | ||
| 197 | * is one which would update the stack pointer to the | ||
| 198 | * address accessed if the instruction completed, | ||
| 199 | * i.e. either stwu rs,n(r1) or stwux rs,r1,rb | ||
| 200 | * (or the byte, halfword, float or double forms). | ||
| 201 | * | ||
| 202 | * If we don't check this then any write to the area | ||
| 203 | * between the last mapped region and the stack will | ||
| 204 | * expand the stack rather than segfaulting. | ||
| 205 | */ | ||
| 206 | if (address + 2048 < uregs->r1 | ||
| 207 | && (kernel_mode(regs) || !store_updates_sp(regs))) | ||
| 208 | goto bad_area; | ||
| 209 | } | ||
| 210 | if (expand_stack(vma, address)) | ||
| 211 | goto bad_area; | ||
| 212 | |||
| 213 | good_area: | ||
| 214 | code = SEGV_ACCERR; | ||
| 215 | |||
| 216 | /* a write */ | ||
| 217 | if (is_write) { | ||
| 218 | if (!(vma->vm_flags & VM_WRITE)) | ||
| 219 | goto bad_area; | ||
| 220 | /* a read */ | ||
| 221 | } else { | ||
| 222 | /* protection fault */ | ||
| 223 | if (error_code & 0x08000000) | ||
| 224 | goto bad_area; | ||
| 225 | if (!(vma->vm_flags & (VM_READ | VM_EXEC))) | ||
| 226 | goto bad_area; | ||
| 227 | } | ||
| 228 | |||
| 229 | /* | ||
| 230 | * If for any reason at all we couldn't handle the fault, | ||
| 231 | * make sure we exit gracefully rather than endlessly redo | ||
| 232 | * the fault. | ||
| 233 | */ | ||
| 234 | survive: | ||
| 235 | fault = handle_mm_fault(mm, vma, address, is_write); | ||
| 236 | if (unlikely(fault & VM_FAULT_ERROR)) { | ||
| 237 | if (fault & VM_FAULT_OOM) | ||
| 238 | goto out_of_memory; | ||
| 239 | else if (fault & VM_FAULT_SIGBUS) | ||
| 240 | goto do_sigbus; | ||
| 241 | BUG(); | ||
| 242 | } | ||
| 243 | if (fault & VM_FAULT_MAJOR) | ||
| 244 | current->maj_flt++; | ||
| 245 | else | ||
| 246 | current->min_flt++; | ||
| 247 | up_read(&mm->mmap_sem); | ||
| 248 | /* | ||
| 249 | * keep track of tlb+htab misses that are good addrs but | ||
| 250 | * just need pte's created via handle_mm_fault() | ||
| 251 | * -- Cort | ||
| 252 | */ | ||
| 253 | pte_misses++; | ||
| 254 | return; | ||
| 255 | |||
| 256 | bad_area: | ||
| 257 | up_read(&mm->mmap_sem); | ||
| 258 | |||
| 259 | bad_area_nosemaphore: | ||
| 260 | pte_errors++; | ||
| 261 | |||
| 262 | /* User mode accesses cause a SIGSEGV */ | ||
| 263 | if (user_mode(regs)) { | ||
| 264 | _exception(SIGSEGV, regs, code, address); | ||
| 265 | /* info.si_signo = SIGSEGV; | ||
| 266 | info.si_errno = 0; | ||
| 267 | info.si_code = code; | ||
| 268 | info.si_addr = (void *) address; | ||
| 269 | force_sig_info(SIGSEGV, &info, current);*/ | ||
| 270 | return; | ||
| 271 | } | ||
| 272 | |||
| 273 | bad_page_fault(regs, address, SIGSEGV); | ||
| 274 | return; | ||
| 275 | |||
| 276 | /* | ||
| 277 | * We ran out of memory, or some other thing happened to us that made | ||
| 278 | * us unable to handle the page fault gracefully. | ||
| 279 | */ | ||
| 280 | out_of_memory: | ||
| 281 | if (current->pid == 1) { | ||
| 282 | yield(); | ||
| 283 | down_read(&mm->mmap_sem); | ||
| 284 | goto survive; | ||
| 285 | } | ||
| 286 | up_read(&mm->mmap_sem); | ||
| 287 | printk(KERN_WARNING "VM: killing process %s\n", current->comm); | ||
| 288 | if (user_mode(regs)) | ||
| 289 | do_exit(SIGKILL); | ||
| 290 | bad_page_fault(regs, address, SIGKILL); | ||
| 291 | return; | ||
| 292 | |||
| 293 | do_sigbus: | ||
| 294 | up_read(&mm->mmap_sem); | ||
| 295 | if (user_mode(regs)) { | ||
| 296 | info.si_signo = SIGBUS; | ||
| 297 | info.si_errno = 0; | ||
| 298 | info.si_code = BUS_ADRERR; | ||
| 299 | info.si_addr = (void __user *)address; | ||
| 300 | force_sig_info(SIGBUS, &info, current); | ||
| 301 | return; | ||
| 302 | } | ||
| 303 | bad_page_fault(regs, address, SIGBUS); | ||
| 304 | } | ||
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c index b0c8213cd6cf..b5a701cd71e0 100644 --- a/arch/microblaze/mm/init.c +++ b/arch/microblaze/mm/init.c | |||
| @@ -23,8 +23,16 @@ | |||
| 23 | #include <asm/sections.h> | 23 | #include <asm/sections.h> |
| 24 | #include <asm/tlb.h> | 24 | #include <asm/tlb.h> |
| 25 | 25 | ||
| 26 | #ifndef CONFIG_MMU | ||
| 26 | unsigned int __page_offset; | 27 | unsigned int __page_offset; |
| 27 | /* EXPORT_SYMBOL(__page_offset); */ | 28 | EXPORT_SYMBOL(__page_offset); |
| 29 | |||
| 30 | #else | ||
| 31 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | ||
| 32 | |||
| 33 | int mem_init_done; | ||
| 34 | static int init_bootmem_done; | ||
| 35 | #endif /* CONFIG_MMU */ | ||
| 28 | 36 | ||
| 29 | char *klimit = _end; | 37 | char *klimit = _end; |
| 30 | 38 | ||
| @@ -32,28 +40,26 @@ char *klimit = _end; | |||
| 32 | * Initialize the bootmem system and give it all the memory we | 40 | * Initialize the bootmem system and give it all the memory we |
| 33 | * have available. | 41 | * have available. |
| 34 | */ | 42 | */ |
| 35 | unsigned int memory_start; | 43 | unsigned long memory_start; |
| 36 | unsigned int memory_end; /* due to mm/nommu.c */ | 44 | unsigned long memory_end; /* due to mm/nommu.c */ |
| 37 | unsigned int memory_size; | 45 | unsigned long memory_size; |
| 38 | 46 | ||
| 39 | /* | 47 | /* |
| 40 | * paging_init() sets up the page tables - in fact we've already done this. | 48 | * paging_init() sets up the page tables - in fact we've already done this. |
| 41 | */ | 49 | */ |
| 42 | static void __init paging_init(void) | 50 | static void __init paging_init(void) |
| 43 | { | 51 | { |
| 44 | int i; | ||
| 45 | unsigned long zones_size[MAX_NR_ZONES]; | 52 | unsigned long zones_size[MAX_NR_ZONES]; |
| 46 | 53 | ||
| 54 | /* Clean every zones */ | ||
| 55 | memset(zones_size, 0, sizeof(zones_size)); | ||
| 56 | |||
| 47 | /* | 57 | /* |
| 48 | * old: we can DMA to/from any address.put all page into ZONE_DMA | 58 | * old: we can DMA to/from any address.put all page into ZONE_DMA |
| 49 | * We use only ZONE_NORMAL | 59 | * We use only ZONE_NORMAL |
| 50 | */ | 60 | */ |
| 51 | zones_size[ZONE_NORMAL] = max_mapnr; | 61 | zones_size[ZONE_NORMAL] = max_mapnr; |
| 52 | 62 | ||
| 53 | /* every other zones are empty */ | ||
| 54 | for (i = 1; i < MAX_NR_ZONES; i++) | ||
| 55 | zones_size[i] = 0; | ||
| 56 | |||
| 57 | free_area_init(zones_size); | 63 | free_area_init(zones_size); |
| 58 | } | 64 | } |
| 59 | 65 | ||
| @@ -61,6 +67,7 @@ void __init setup_memory(void) | |||
| 61 | { | 67 | { |
| 62 | int i; | 68 | int i; |
| 63 | unsigned long map_size; | 69 | unsigned long map_size; |
| 70 | #ifndef CONFIG_MMU | ||
| 64 | u32 kernel_align_start, kernel_align_size; | 71 | u32 kernel_align_start, kernel_align_size; |
| 65 | 72 | ||
| 66 | /* Find main memory where is the kernel */ | 73 | /* Find main memory where is the kernel */ |
| @@ -93,6 +100,7 @@ void __init setup_memory(void) | |||
| 93 | __func__, kernel_align_start, kernel_align_start | 100 | __func__, kernel_align_start, kernel_align_start |
| 94 | + kernel_align_size, kernel_align_size); | 101 | + kernel_align_size, kernel_align_size); |
| 95 | 102 | ||
| 103 | #endif | ||
| 96 | /* | 104 | /* |
| 97 | * Kernel: | 105 | * Kernel: |
| 98 | * start: base phys address of kernel - page align | 106 | * start: base phys address of kernel - page align |
| @@ -121,9 +129,13 @@ void __init setup_memory(void) | |||
| 121 | * for 4GB of memory, using 4kB pages), plus 1 page | 129 | * for 4GB of memory, using 4kB pages), plus 1 page |
| 122 | * (in case the address isn't page-aligned). | 130 | * (in case the address isn't page-aligned). |
| 123 | */ | 131 | */ |
| 132 | #ifndef CONFIG_MMU | ||
| 124 | map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(TOPHYS((u32)_end)), | 133 | map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(TOPHYS((u32)_end)), |
| 125 | min_low_pfn, max_low_pfn); | 134 | min_low_pfn, max_low_pfn); |
| 126 | 135 | #else | |
| 136 | map_size = init_bootmem_node(&contig_page_data, | ||
| 137 | PFN_UP(TOPHYS((u32)_end)), min_low_pfn, max_low_pfn); | ||
| 138 | #endif | ||
| 127 | lmb_reserve(PFN_UP(TOPHYS((u32)_end)) << PAGE_SHIFT, map_size); | 139 | lmb_reserve(PFN_UP(TOPHYS((u32)_end)) << PAGE_SHIFT, map_size); |
| 128 | 140 | ||
| 129 | /* free bootmem is whole main memory */ | 141 | /* free bootmem is whole main memory */ |
| @@ -137,6 +149,9 @@ void __init setup_memory(void) | |||
| 137 | reserve_bootmem(lmb.reserved.region[i].base, | 149 | reserve_bootmem(lmb.reserved.region[i].base, |
| 138 | lmb_size_bytes(&lmb.reserved, i) - 1, BOOTMEM_DEFAULT); | 150 | lmb_size_bytes(&lmb.reserved, i) - 1, BOOTMEM_DEFAULT); |
| 139 | } | 151 | } |
| 152 | #ifdef CONFIG_MMU | ||
| 153 | init_bootmem_done = 1; | ||
| 154 | #endif | ||
| 140 | paging_init(); | 155 | paging_init(); |
| 141 | } | 156 | } |
| 142 | 157 | ||
| @@ -191,11 +206,145 @@ void __init mem_init(void) | |||
| 191 | printk(KERN_INFO "Memory: %luk/%luk available\n", | 206 | printk(KERN_INFO "Memory: %luk/%luk available\n", |
| 192 | (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), | 207 | (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), |
| 193 | num_physpages << (PAGE_SHIFT-10)); | 208 | num_physpages << (PAGE_SHIFT-10)); |
| 209 | #ifdef CONFIG_MMU | ||
| 210 | mem_init_done = 1; | ||
| 211 | #endif | ||
| 194 | } | 212 | } |
| 195 | 213 | ||
| 214 | #ifndef CONFIG_MMU | ||
| 196 | /* Check against bounds of physical memory */ | 215 | /* Check against bounds of physical memory */ |
| 197 | int ___range_ok(unsigned long addr, unsigned long size) | 216 | int ___range_ok(unsigned long addr, unsigned long size) |
| 198 | { | 217 | { |
| 199 | return ((addr < memory_start) || | 218 | return ((addr < memory_start) || |
| 200 | ((addr + size) > memory_end)); | 219 | ((addr + size) > memory_end)); |
| 201 | } | 220 | } |
| 221 | EXPORT_SYMBOL(___range_ok); | ||
| 222 | |||
| 223 | #else | ||
| 224 | int page_is_ram(unsigned long pfn) | ||
| 225 | { | ||
| 226 | return pfn < max_low_pfn; | ||
| 227 | } | ||
| 228 | |||
| 229 | /* | ||
| 230 | * Check for command-line options that affect what MMU_init will do. | ||
| 231 | */ | ||
| 232 | static void mm_cmdline_setup(void) | ||
| 233 | { | ||
| 234 | unsigned long maxmem = 0; | ||
| 235 | char *p = cmd_line; | ||
| 236 | |||
| 237 | /* Look for mem= option on command line */ | ||
| 238 | p = strstr(cmd_line, "mem="); | ||
| 239 | if (p) { | ||
| 240 | p += 4; | ||
| 241 | maxmem = memparse(p, &p); | ||
| 242 | if (maxmem && memory_size > maxmem) { | ||
| 243 | memory_size = maxmem; | ||
| 244 | memory_end = memory_start + memory_size; | ||
| 245 | lmb.memory.region[0].size = memory_size; | ||
| 246 | } | ||
| 247 | } | ||
| 248 | } | ||
| 249 | |||
| 250 | /* | ||
| 251 | * MMU_init_hw does the chip-specific initialization of the MMU hardware. | ||
| 252 | */ | ||
| 253 | static void __init mmu_init_hw(void) | ||
| 254 | { | ||
| 255 | /* | ||
| 256 | * The Zone Protection Register (ZPR) defines how protection will | ||
| 257 | * be applied to every page which is a member of a given zone. At | ||
| 258 | * present, we utilize only two of the zones. | ||
| 259 | * The zone index bits (of ZSEL) in the PTE are used for software | ||
| 260 | * indicators, except the LSB. For user access, zone 1 is used, | ||
| 261 | * for kernel access, zone 0 is used. We set all but zone 1 | ||
| 262 | * to zero, allowing only kernel access as indicated in the PTE. | ||
| 263 | * For zone 1, we set a 01 binary (a value of 10 will not work) | ||
| 264 | * to allow user access as indicated in the PTE. This also allows | ||
| 265 | * kernel access as indicated in the PTE. | ||
| 266 | */ | ||
| 267 | __asm__ __volatile__ ("ori r11, r0, 0x10000000;" \ | ||
| 268 | "mts rzpr, r11;" | ||
| 269 | : : : "r11"); | ||
| 270 | } | ||
| 271 | |||
| 272 | /* | ||
| 273 | * MMU_init sets up the basic memory mappings for the kernel, | ||
| 274 | * including both RAM and possibly some I/O regions, | ||
| 275 | * and sets up the page tables and the MMU hardware ready to go. | ||
| 276 | */ | ||
| 277 | |||
| 278 | /* called from head.S */ | ||
| 279 | asmlinkage void __init mmu_init(void) | ||
| 280 | { | ||
| 281 | unsigned int kstart, ksize; | ||
| 282 | |||
| 283 | if (!lmb.reserved.cnt) { | ||
| 284 | printk(KERN_EMERG "Error memory count\n"); | ||
| 285 | machine_restart(NULL); | ||
| 286 | } | ||
| 287 | |||
| 288 | if ((u32) lmb.memory.region[0].size < 0x1000000) { | ||
| 289 | printk(KERN_EMERG "Memory must be greater than 16MB\n"); | ||
| 290 | machine_restart(NULL); | ||
| 291 | } | ||
| 292 | /* Find main memory where the kernel is */ | ||
| 293 | memory_start = (u32) lmb.memory.region[0].base; | ||
| 294 | memory_end = (u32) lmb.memory.region[0].base + | ||
| 295 | (u32) lmb.memory.region[0].size; | ||
| 296 | memory_size = memory_end - memory_start; | ||
| 297 | |||
| 298 | mm_cmdline_setup(); /* FIXME parse args from command line - not used */ | ||
| 299 | |||
| 300 | /* | ||
| 301 | * Map out the kernel text/data/bss from the available physical | ||
| 302 | * memory. | ||
| 303 | */ | ||
| 304 | kstart = __pa(CONFIG_KERNEL_START); /* kernel start */ | ||
| 305 | /* kernel size */ | ||
| 306 | ksize = PAGE_ALIGN(((u32)_end - (u32)CONFIG_KERNEL_START)); | ||
| 307 | lmb_reserve(kstart, ksize); | ||
| 308 | |||
| 309 | #if defined(CONFIG_BLK_DEV_INITRD) | ||
| 310 | /* Remove the init RAM disk from the available memory. */ | ||
| 311 | /* if (initrd_start) { | ||
| 312 | mem_pieces_remove(&phys_avail, __pa(initrd_start), | ||
| 313 | initrd_end - initrd_start, 1); | ||
| 314 | }*/ | ||
| 315 | #endif /* CONFIG_BLK_DEV_INITRD */ | ||
| 316 | |||
| 317 | /* Initialize the MMU hardware */ | ||
| 318 | mmu_init_hw(); | ||
| 319 | |||
| 320 | /* Map in all of RAM starting at CONFIG_KERNEL_START */ | ||
| 321 | mapin_ram(); | ||
| 322 | |||
| 323 | #ifdef HIGHMEM_START_BOOL | ||
| 324 | ioremap_base = HIGHMEM_START; | ||
| 325 | #else | ||
| 326 | ioremap_base = 0xfe000000UL; /* for now, could be 0xfffff000 */ | ||
| 327 | #endif /* CONFIG_HIGHMEM */ | ||
| 328 | ioremap_bot = ioremap_base; | ||
| 329 | |||
| 330 | /* Initialize the context management stuff */ | ||
| 331 | mmu_context_init(); | ||
| 332 | } | ||
| 333 | |||
| 334 | /* This is only called until mem_init is done. */ | ||
| 335 | void __init *early_get_page(void) | ||
| 336 | { | ||
| 337 | void *p; | ||
| 338 | if (init_bootmem_done) { | ||
| 339 | p = alloc_bootmem_pages(PAGE_SIZE); | ||
| 340 | } else { | ||
| 341 | /* | ||
| 342 | * Mem start + 32MB -> here is limit | ||
| 343 | * because of mem mapping from head.S | ||
| 344 | */ | ||
| 345 | p = __va(lmb_alloc_base(PAGE_SIZE, PAGE_SIZE, | ||
| 346 | memory_start + 0x2000000)); | ||
| 347 | } | ||
| 348 | return p; | ||
| 349 | } | ||
| 350 | #endif /* CONFIG_MMU */ | ||
diff --git a/arch/microblaze/mm/mmu_context.c b/arch/microblaze/mm/mmu_context.c new file mode 100644 index 000000000000..26ff82f4fa8f --- /dev/null +++ b/arch/microblaze/mm/mmu_context.c | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* | ||
| 2 | * This file contains the routines for handling the MMU. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007 Xilinx, Inc. All rights reserved. | ||
| 5 | * | ||
| 6 | * Derived from arch/ppc/mm/4xx_mmu.c: | ||
| 7 | * -- paulus | ||
| 8 | * | ||
| 9 | * Derived from arch/ppc/mm/init.c: | ||
| 10 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
| 11 | * | ||
| 12 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) | ||
| 13 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) | ||
| 14 | * Copyright (C) 1996 Paul Mackerras | ||
| 15 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | ||
| 16 | * | ||
| 17 | * Derived from "arch/i386/mm/init.c" | ||
| 18 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | ||
| 19 | * | ||
| 20 | * This program is free software; you can redistribute it and/or | ||
| 21 | * modify it under the terms of the GNU General Public License | ||
| 22 | * as published by the Free Software Foundation; either version | ||
| 23 | * 2 of the License, or (at your option) any later version. | ||
| 24 | * | ||
| 25 | */ | ||
| 26 | |||
| 27 | #include <linux/mm.h> | ||
| 28 | #include <linux/init.h> | ||
| 29 | |||
| 30 | #include <asm/tlbflush.h> | ||
| 31 | #include <asm/mmu_context.h> | ||
| 32 | |||
| 33 | mm_context_t next_mmu_context; | ||
| 34 | unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1]; | ||
| 35 | atomic_t nr_free_contexts; | ||
| 36 | struct mm_struct *context_mm[LAST_CONTEXT+1]; | ||
| 37 | |||
| 38 | /* | ||
| 39 | * Initialize the context management stuff. | ||
| 40 | */ | ||
| 41 | void __init mmu_context_init(void) | ||
| 42 | { | ||
| 43 | /* | ||
| 44 | * The use of context zero is reserved for the kernel. | ||
| 45 | * This code assumes FIRST_CONTEXT < 32. | ||
| 46 | */ | ||
| 47 | context_map[0] = (1 << FIRST_CONTEXT) - 1; | ||
| 48 | next_mmu_context = FIRST_CONTEXT; | ||
| 49 | atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1); | ||
| 50 | } | ||
| 51 | |||
| 52 | /* | ||
| 53 | * Steal a context from a task that has one at the moment. | ||
| 54 | * | ||
| 55 | * This isn't an LRU system, it just frees up each context in | ||
| 56 | * turn (sort-of pseudo-random replacement :). This would be the | ||
| 57 | * place to implement an LRU scheme if anyone were motivated to do it. | ||
| 58 | */ | ||
| 59 | void steal_context(void) | ||
| 60 | { | ||
| 61 | struct mm_struct *mm; | ||
| 62 | |||
| 63 | /* free up context `next_mmu_context' */ | ||
| 64 | /* if we shouldn't free context 0, don't... */ | ||
| 65 | if (next_mmu_context < FIRST_CONTEXT) | ||
| 66 | next_mmu_context = FIRST_CONTEXT; | ||
| 67 | mm = context_mm[next_mmu_context]; | ||
| 68 | flush_tlb_mm(mm); | ||
| 69 | destroy_context(mm); | ||
| 70 | } | ||
diff --git a/arch/microblaze/mm/pgtable.c b/arch/microblaze/mm/pgtable.c new file mode 100644 index 000000000000..46c4ca5d15c5 --- /dev/null +++ b/arch/microblaze/mm/pgtable.c | |||
| @@ -0,0 +1,286 @@ | |||
| 1 | /* | ||
| 2 | * This file contains the routines setting up the linux page tables. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Michal Simek | ||
| 5 | * Copyright (C) 2008 PetaLogix | ||
| 6 | * | ||
| 7 | * Copyright (C) 2007 Xilinx, Inc. All rights reserved. | ||
| 8 | * | ||
| 9 | * Derived from arch/ppc/mm/pgtable.c: | ||
| 10 | * -- paulus | ||
| 11 | * | ||
| 12 | * Derived from arch/ppc/mm/init.c: | ||
| 13 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
| 14 | * | ||
| 15 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) | ||
| 16 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) | ||
| 17 | * Copyright (C) 1996 Paul Mackerras | ||
| 18 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | ||
| 19 | * | ||
| 20 | * Derived from "arch/i386/mm/init.c" | ||
| 21 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | ||
| 22 | * | ||
| 23 | * This file is subject to the terms and conditions of the GNU General | ||
| 24 | * Public License. See the file COPYING in the main directory of this | ||
| 25 | * archive for more details. | ||
| 26 | * | ||
| 27 | */ | ||
| 28 | |||
| 29 | #include <linux/kernel.h> | ||
| 30 | #include <linux/module.h> | ||
| 31 | #include <linux/types.h> | ||
| 32 | #include <linux/vmalloc.h> | ||
| 33 | #include <linux/init.h> | ||
| 34 | |||
| 35 | #include <asm/pgtable.h> | ||
| 36 | #include <asm/pgalloc.h> | ||
| 37 | #include <linux/io.h> | ||
| 38 | #include <asm/mmu.h> | ||
| 39 | #include <asm/sections.h> | ||
| 40 | |||
| 41 | #define flush_HPTE(X, va, pg) _tlbie(va) | ||
| 42 | |||
| 43 | unsigned long ioremap_base; | ||
| 44 | unsigned long ioremap_bot; | ||
| 45 | |||
| 46 | /* The maximum lowmem defaults to 768Mb, but this can be configured to | ||
| 47 | * another value. | ||
| 48 | */ | ||
| 49 | #define MAX_LOW_MEM CONFIG_LOWMEM_SIZE | ||
| 50 | |||
| 51 | #ifndef CONFIG_SMP | ||
| 52 | struct pgtable_cache_struct quicklists; | ||
| 53 | #endif | ||
| 54 | |||
| 55 | static void __iomem *__ioremap(phys_addr_t addr, unsigned long size, | ||
| 56 | unsigned long flags) | ||
| 57 | { | ||
| 58 | unsigned long v, i; | ||
| 59 | phys_addr_t p; | ||
| 60 | int err; | ||
| 61 | |||
| 62 | /* | ||
| 63 | * Choose an address to map it to. | ||
| 64 | * Once the vmalloc system is running, we use it. | ||
| 65 | * Before then, we use space going down from ioremap_base | ||
| 66 | * (ioremap_bot records where we're up to). | ||
| 67 | */ | ||
| 68 | p = addr & PAGE_MASK; | ||
| 69 | size = PAGE_ALIGN(addr + size) - p; | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Don't allow anybody to remap normal RAM that we're using. | ||
| 73 | * mem_init() sets high_memory so only do the check after that. | ||
| 74 | * | ||
| 75 | * However, allow remap of rootfs: TBD | ||
| 76 | */ | ||
| 77 | if (mem_init_done && | ||
| 78 | p >= memory_start && p < virt_to_phys(high_memory) && | ||
| 79 | !(p >= virt_to_phys((unsigned long)&__bss_stop) && | ||
| 80 | p < virt_to_phys((unsigned long)__bss_stop))) { | ||
| 81 | printk(KERN_WARNING "__ioremap(): phys addr "PTE_FMT | ||
| 82 | " is RAM lr %p\n", (unsigned long)p, | ||
| 83 | __builtin_return_address(0)); | ||
| 84 | return NULL; | ||
| 85 | } | ||
| 86 | |||
| 87 | if (size == 0) | ||
| 88 | return NULL; | ||
| 89 | |||
| 90 | /* | ||
| 91 | * Is it already mapped? If the whole area is mapped then we're | ||
| 92 | * done, otherwise remap it since we want to keep the virt addrs for | ||
| 93 | * each request contiguous. | ||
| 94 | * | ||
| 95 | * We make the assumption here that if the bottom and top | ||
| 96 | * of the range we want are mapped then it's mapped to the | ||
| 97 | * same virt address (and this is contiguous). | ||
| 98 | * -- Cort | ||
| 99 | */ | ||
| 100 | |||
| 101 | if (mem_init_done) { | ||
| 102 | struct vm_struct *area; | ||
| 103 | area = get_vm_area(size, VM_IOREMAP); | ||
| 104 | if (area == NULL) | ||
| 105 | return NULL; | ||
| 106 | v = VMALLOC_VMADDR(area->addr); | ||
| 107 | } else { | ||
| 108 | v = (ioremap_bot -= size); | ||
| 109 | } | ||
| 110 | |||
| 111 | if ((flags & _PAGE_PRESENT) == 0) | ||
| 112 | flags |= _PAGE_KERNEL; | ||
| 113 | if (flags & _PAGE_NO_CACHE) | ||
| 114 | flags |= _PAGE_GUARDED; | ||
| 115 | |||
| 116 | err = 0; | ||
| 117 | for (i = 0; i < size && err == 0; i += PAGE_SIZE) | ||
| 118 | err = map_page(v + i, p + i, flags); | ||
| 119 | if (err) { | ||
| 120 | if (mem_init_done) | ||
| 121 | vfree((void *)v); | ||
| 122 | return NULL; | ||
| 123 | } | ||
| 124 | |||
| 125 | return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK)); | ||
| 126 | } | ||
| 127 | |||
| 128 | void __iomem *ioremap(phys_addr_t addr, unsigned long size) | ||
| 129 | { | ||
| 130 | return __ioremap(addr, size, _PAGE_NO_CACHE); | ||
| 131 | } | ||
| 132 | EXPORT_SYMBOL(ioremap); | ||
| 133 | |||
| 134 | void iounmap(void *addr) | ||
| 135 | { | ||
| 136 | if (addr > high_memory && (unsigned long) addr < ioremap_bot) | ||
| 137 | vfree((void *) (PAGE_MASK & (unsigned long) addr)); | ||
| 138 | } | ||
| 139 | EXPORT_SYMBOL(iounmap); | ||
| 140 | |||
| 141 | |||
| 142 | int map_page(unsigned long va, phys_addr_t pa, int flags) | ||
| 143 | { | ||
| 144 | pmd_t *pd; | ||
| 145 | pte_t *pg; | ||
| 146 | int err = -ENOMEM; | ||
| 147 | /* spin_lock(&init_mm.page_table_lock); */ | ||
| 148 | /* Use upper 10 bits of VA to index the first level map */ | ||
| 149 | pd = pmd_offset(pgd_offset_k(va), va); | ||
| 150 | /* Use middle 10 bits of VA to index the second-level map */ | ||
| 151 | pg = pte_alloc_kernel(pd, va); /* from powerpc - pgtable.c */ | ||
| 152 | /* pg = pte_alloc_kernel(&init_mm, pd, va); */ | ||
| 153 | |||
| 154 | if (pg != NULL) { | ||
| 155 | err = 0; | ||
| 156 | set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, | ||
| 157 | __pgprot(flags))); | ||
| 158 | if (mem_init_done) | ||
| 159 | flush_HPTE(0, va, pmd_val(*pd)); | ||
| 160 | /* flush_HPTE(0, va, pg); */ | ||
| 161 | |||
| 162 | } | ||
| 163 | /* spin_unlock(&init_mm.page_table_lock); */ | ||
| 164 | return err; | ||
| 165 | } | ||
| 166 | |||
| 167 | void __init adjust_total_lowmem(void) | ||
| 168 | { | ||
| 169 | /* TBD */ | ||
| 170 | #if 0 | ||
| 171 | unsigned long max_low_mem = MAX_LOW_MEM; | ||
| 172 | |||
| 173 | if (total_lowmem > max_low_mem) { | ||
| 174 | total_lowmem = max_low_mem; | ||
| 175 | #ifndef CONFIG_HIGHMEM | ||
| 176 | printk(KERN_INFO "Warning, memory limited to %ld Mb, use " | ||
| 177 | "CONFIG_HIGHMEM to reach %ld Mb\n", | ||
| 178 | max_low_mem >> 20, total_memory >> 20); | ||
| 179 | total_memory = total_lowmem; | ||
| 180 | #endif /* CONFIG_HIGHMEM */ | ||
| 181 | } | ||
| 182 | #endif | ||
| 183 | } | ||
| 184 | |||
| 185 | static void show_tmem(unsigned long tmem) | ||
| 186 | { | ||
| 187 | volatile unsigned long a; | ||
| 188 | a = a + tmem; | ||
| 189 | } | ||
| 190 | |||
| 191 | /* | ||
| 192 | * Map in all of physical memory starting at CONFIG_KERNEL_START. | ||
| 193 | */ | ||
| 194 | void __init mapin_ram(void) | ||
| 195 | { | ||
| 196 | unsigned long v, p, s, f; | ||
| 197 | |||
| 198 | v = CONFIG_KERNEL_START; | ||
| 199 | p = memory_start; | ||
| 200 | show_tmem(memory_size); | ||
| 201 | for (s = 0; s < memory_size; s += PAGE_SIZE) { | ||
| 202 | f = _PAGE_PRESENT | _PAGE_ACCESSED | | ||
| 203 | _PAGE_SHARED | _PAGE_HWEXEC; | ||
| 204 | if ((char *) v < _stext || (char *) v >= _etext) | ||
| 205 | f |= _PAGE_WRENABLE; | ||
| 206 | else | ||
| 207 | /* On the MicroBlaze, no user access | ||
| 208 | forces R/W kernel access */ | ||
| 209 | f |= _PAGE_USER; | ||
| 210 | map_page(v, p, f); | ||
| 211 | v += PAGE_SIZE; | ||
| 212 | p += PAGE_SIZE; | ||
| 213 | } | ||
| 214 | } | ||
| 215 | |||
| 216 | /* is x a power of 2? */ | ||
| 217 | #define is_power_of_2(x) ((x) != 0 && (((x) & ((x) - 1)) == 0)) | ||
| 218 | |||
| 219 | /* | ||
| 220 | * Set up a mapping for a block of I/O. | ||
| 221 | * virt, phys, size must all be page-aligned. | ||
| 222 | * This should only be called before ioremap is called. | ||
| 223 | */ | ||
| 224 | void __init io_block_mapping(unsigned long virt, phys_addr_t phys, | ||
| 225 | unsigned int size, int flags) | ||
| 226 | { | ||
| 227 | int i; | ||
| 228 | |||
| 229 | if (virt > CONFIG_KERNEL_START && virt < ioremap_bot) | ||
| 230 | ioremap_bot = ioremap_base = virt; | ||
| 231 | |||
| 232 | /* Put it in the page tables. */ | ||
| 233 | for (i = 0; i < size; i += PAGE_SIZE) | ||
| 234 | map_page(virt + i, phys + i, flags); | ||
| 235 | } | ||
| 236 | |||
| 237 | /* Scan the real Linux page tables and return a PTE pointer for | ||
| 238 | * a virtual address in a context. | ||
| 239 | * Returns true (1) if PTE was found, zero otherwise. The pointer to | ||
| 240 | * the PTE pointer is unmodified if PTE is not found. | ||
| 241 | */ | ||
| 242 | static int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep) | ||
| 243 | { | ||
| 244 | pgd_t *pgd; | ||
| 245 | pmd_t *pmd; | ||
| 246 | pte_t *pte; | ||
| 247 | int retval = 0; | ||
| 248 | |||
| 249 | pgd = pgd_offset(mm, addr & PAGE_MASK); | ||
| 250 | if (pgd) { | ||
| 251 | pmd = pmd_offset(pgd, addr & PAGE_MASK); | ||
| 252 | if (pmd_present(*pmd)) { | ||
| 253 | pte = pte_offset_kernel(pmd, addr & PAGE_MASK); | ||
| 254 | if (pte) { | ||
| 255 | retval = 1; | ||
| 256 | *ptep = pte; | ||
| 257 | } | ||
| 258 | } | ||
| 259 | } | ||
| 260 | return retval; | ||
| 261 | } | ||
| 262 | |||
| 263 | /* Find physical address for this virtual address. Normally used by | ||
| 264 | * I/O functions, but anyone can call it. | ||
| 265 | */ | ||
| 266 | unsigned long iopa(unsigned long addr) | ||
| 267 | { | ||
| 268 | unsigned long pa; | ||
| 269 | |||
| 270 | pte_t *pte; | ||
| 271 | struct mm_struct *mm; | ||
| 272 | |||
| 273 | /* Allow mapping of user addresses (within the thread) | ||
| 274 | * for DMA if necessary. | ||
| 275 | */ | ||
| 276 | if (addr < TASK_SIZE) | ||
| 277 | mm = current->mm; | ||
| 278 | else | ||
| 279 | mm = &init_mm; | ||
| 280 | |||
| 281 | pa = 0; | ||
| 282 | if (get_pteptr(mm, addr, &pte)) | ||
| 283 | pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK); | ||
| 284 | |||
| 285 | return pa; | ||
| 286 | } | ||
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c index b3f7d1216bae..b72e7a19d054 100644 --- a/arch/powerpc/kernel/power7-pmu.c +++ b/arch/powerpc/kernel/power7-pmu.c | |||
| @@ -294,12 +294,12 @@ static void power7_disable_pmc(unsigned int pmc, u64 mmcr[]) | |||
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | static int power7_generic_events[] = { | 296 | static int power7_generic_events[] = { |
| 297 | [PERF_COUNT_CPU_CYCLES] = 0x1e, | 297 | [PERF_COUNT_HW_CPU_CYCLES] = 0x1e, |
| 298 | [PERF_COUNT_INSTRUCTIONS] = 2, | 298 | [PERF_COUNT_HW_INSTRUCTIONS] = 2, |
| 299 | [PERF_COUNT_CACHE_REFERENCES] = 0xc880, /* LD_REF_L1_LSU */ | 299 | [PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880, /* LD_REF_L1_LSU*/ |
| 300 | [PERF_COUNT_CACHE_MISSES] = 0x400f0, /* LD_MISS_L1 */ | 300 | [PERF_COUNT_HW_CACHE_MISSES] = 0x400f0, /* LD_MISS_L1 */ |
| 301 | [PERF_COUNT_BRANCH_INSTRUCTIONS] = 0x10068, /* BRU_FIN */ | 301 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068, /* BRU_FIN */ |
| 302 | [PERF_COUNT_BRANCH_MISSES] = 0x400f6, /* BR_MPRED */ | 302 | [PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6, /* BR_MPRED */ |
| 303 | }; | 303 | }; |
| 304 | 304 | ||
| 305 | #define C(x) PERF_COUNT_HW_CACHE_##x | 305 | #define C(x) PERF_COUNT_HW_CACHE_##x |
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c index 895c82e78455..275bc142cd5d 100644 --- a/arch/x86/kernel/cpu/perf_counter.c +++ b/arch/x86/kernel/cpu/perf_counter.c | |||
| @@ -968,6 +968,13 @@ fixed_mode_idx(struct perf_counter *counter, struct hw_perf_counter *hwc) | |||
| 968 | if (!x86_pmu.num_counters_fixed) | 968 | if (!x86_pmu.num_counters_fixed) |
| 969 | return -1; | 969 | return -1; |
| 970 | 970 | ||
| 971 | /* | ||
| 972 | * Quirk, IA32_FIXED_CTRs do not work on current Atom processors: | ||
| 973 | */ | ||
| 974 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && | ||
| 975 | boot_cpu_data.x86_model == 28) | ||
| 976 | return -1; | ||
| 977 | |||
| 971 | event = hwc->config & ARCH_PERFMON_EVENT_MASK; | 978 | event = hwc->config & ARCH_PERFMON_EVENT_MASK; |
| 972 | 979 | ||
| 973 | if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS))) | 980 | if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS))) |
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index f42fa50d3550..ac5e05a98b2f 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig | |||
| @@ -438,7 +438,7 @@ source "drivers/s390/block/Kconfig" | |||
| 438 | 438 | ||
| 439 | config XILINX_SYSACE | 439 | config XILINX_SYSACE |
| 440 | tristate "Xilinx SystemACE support" | 440 | tristate "Xilinx SystemACE support" |
| 441 | depends on 4xx | 441 | depends on 4xx || MICROBLAZE |
| 442 | help | 442 | help |
| 443 | Include support for the Xilinx SystemACE CompactFlash interface | 443 | Include support for the Xilinx SystemACE CompactFlash interface |
| 444 | 444 | ||
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 02ecfd5fa61c..b1e9652c0d9d 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig | |||
| @@ -906,7 +906,7 @@ config DTLK | |||
| 906 | 906 | ||
| 907 | config XILINX_HWICAP | 907 | config XILINX_HWICAP |
| 908 | tristate "Xilinx HWICAP Support" | 908 | tristate "Xilinx HWICAP Support" |
| 909 | depends on XILINX_VIRTEX | 909 | depends on XILINX_VIRTEX || MICROBLAZE |
| 910 | help | 910 | help |
| 911 | This option enables support for Xilinx Internal Configuration | 911 | This option enables support for Xilinx Internal Configuration |
| 912 | Access Port (ICAP) driver. The ICAP is used on Xilinx Virtex | 912 | Access Port (ICAP) driver. The ICAP is used on Xilinx Virtex |
diff --git a/drivers/char/vt.c b/drivers/char/vt.c index de9ebee8657b..c796a86ab7f3 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c | |||
| @@ -103,7 +103,6 @@ | |||
| 103 | #include <linux/io.h> | 103 | #include <linux/io.h> |
| 104 | #include <asm/system.h> | 104 | #include <asm/system.h> |
| 105 | #include <linux/uaccess.h> | 105 | #include <linux/uaccess.h> |
| 106 | #include <linux/kmemleak.h> | ||
| 107 | 106 | ||
| 108 | #define MAX_NR_CON_DRIVER 16 | 107 | #define MAX_NR_CON_DRIVER 16 |
| 109 | 108 | ||
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index edb02530e461..11f373971fa5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
| @@ -69,7 +69,7 @@ comment "Memory mapped GPIO expanders:" | |||
| 69 | 69 | ||
| 70 | config GPIO_XILINX | 70 | config GPIO_XILINX |
| 71 | bool "Xilinx GPIO support" | 71 | bool "Xilinx GPIO support" |
| 72 | depends on PPC_OF | 72 | depends on PPC_OF || MICROBLAZE |
| 73 | help | 73 | help |
| 74 | Say yes here to support the Xilinx FPGA GPIO device | 74 | Say yes here to support the Xilinx FPGA GPIO device |
| 75 | 75 | ||
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig index da3c3a5d2689..c4b3fbd1a80f 100644 --- a/drivers/input/serio/Kconfig +++ b/drivers/input/serio/Kconfig | |||
| @@ -192,7 +192,7 @@ config SERIO_RAW | |||
| 192 | 192 | ||
| 193 | config SERIO_XILINX_XPS_PS2 | 193 | config SERIO_XILINX_XPS_PS2 |
| 194 | tristate "Xilinx XPS PS/2 Controller Support" | 194 | tristate "Xilinx XPS PS/2 Controller Support" |
| 195 | depends on PPC | 195 | depends on PPC || MICROBLAZE |
| 196 | help | 196 | help |
| 197 | This driver supports XPS PS/2 IP from the Xilinx EDK on | 197 | This driver supports XPS PS/2 IP from the Xilinx EDK on |
| 198 | PowerPC platform. | 198 | PowerPC platform. |
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index f821dbc952a4..27f3b81333de 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig | |||
| @@ -1,21 +1,21 @@ | |||
| 1 | config OF_DEVICE | 1 | config OF_DEVICE |
| 2 | def_bool y | 2 | def_bool y |
| 3 | depends on OF && (SPARC || PPC_OF) | 3 | depends on OF && (SPARC || PPC_OF || MICROBLAZE) |
| 4 | 4 | ||
| 5 | config OF_GPIO | 5 | config OF_GPIO |
| 6 | def_bool y | 6 | def_bool y |
| 7 | depends on OF && PPC_OF && GPIOLIB | 7 | depends on OF && (PPC_OF || MICROBLAZE) && GPIOLIB |
| 8 | help | 8 | help |
| 9 | OpenFirmware GPIO accessors | 9 | OpenFirmware GPIO accessors |
| 10 | 10 | ||
| 11 | config OF_I2C | 11 | config OF_I2C |
| 12 | def_tristate I2C | 12 | def_tristate I2C |
| 13 | depends on PPC_OF && I2C | 13 | depends on (PPC_OF || MICROBLAZE) && I2C |
| 14 | help | 14 | help |
| 15 | OpenFirmware I2C accessors | 15 | OpenFirmware I2C accessors |
| 16 | 16 | ||
| 17 | config OF_SPI | 17 | config OF_SPI |
| 18 | def_tristate SPI | 18 | def_tristate SPI |
| 19 | depends on OF && PPC_OF && SPI | 19 | depends on OF && (PPC_OF || MICROBLAZE) && SPI |
| 20 | help | 20 | help |
| 21 | OpenFirmware SPI accessors | 21 | OpenFirmware SPI accessors |
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 83a185d52961..957494775413 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
| @@ -212,7 +212,7 @@ config SPI_TXX9 | |||
| 212 | 212 | ||
| 213 | config SPI_XILINX | 213 | config SPI_XILINX |
| 214 | tristate "Xilinx SPI controller" | 214 | tristate "Xilinx SPI controller" |
| 215 | depends on XILINX_VIRTEX && EXPERIMENTAL | 215 | depends on (XILINX_VIRTEX || MICROBLAZE) && EXPERIMENTAL |
| 216 | select SPI_BITBANG | 216 | select SPI_BITBANG |
| 217 | help | 217 | help |
| 218 | This exposes the SPI controller IP from the Xilinx EDK. | 218 | This exposes the SPI controller IP from the Xilinx EDK. |
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index c6c816b7ecb5..5eee3f82be5d 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig | |||
| @@ -22,6 +22,7 @@ config USB_ARCH_HAS_HCD | |||
| 22 | default y if PCMCIA && !M32R # sl811_cs | 22 | default y if PCMCIA && !M32R # sl811_cs |
| 23 | default y if ARM # SL-811 | 23 | default y if ARM # SL-811 |
| 24 | default y if SUPERH # r8a66597-hcd | 24 | default y if SUPERH # r8a66597-hcd |
| 25 | default y if MICROBLAZE | ||
| 25 | default PCI | 26 | default PCI |
| 26 | 27 | ||
| 27 | # many non-PCI SOC chips embed OHCI | 28 | # many non-PCI SOC chips embed OHCI |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 0048f1185a60..74712cb8399a 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
| @@ -1996,7 +1996,7 @@ config FB_PS3_DEFAULT_SIZE_M | |||
| 1996 | 1996 | ||
| 1997 | config FB_XILINX | 1997 | config FB_XILINX |
| 1998 | tristate "Xilinx frame buffer support" | 1998 | tristate "Xilinx frame buffer support" |
| 1999 | depends on FB && XILINX_VIRTEX | 1999 | depends on FB && (XILINX_VIRTEX || MICROBLAZE) |
| 2000 | select FB_CFB_FILLRECT | 2000 | select FB_CFB_FILLRECT |
| 2001 | select FB_CFB_COPYAREA | 2001 | select FB_CFB_COPYAREA |
| 2002 | select FB_CFB_IMAGEBLIT | 2002 | select FB_CFB_IMAGEBLIT |
diff --git a/fs/dlm/dir.c b/fs/dlm/dir.c index 858fba14aaa6..c4dfa1dcc86f 100644 --- a/fs/dlm/dir.c +++ b/fs/dlm/dir.c | |||
| @@ -49,7 +49,8 @@ static struct dlm_direntry *get_free_de(struct dlm_ls *ls, int len) | |||
| 49 | spin_unlock(&ls->ls_recover_list_lock); | 49 | spin_unlock(&ls->ls_recover_list_lock); |
| 50 | 50 | ||
| 51 | if (!found) | 51 | if (!found) |
| 52 | de = kzalloc(sizeof(struct dlm_direntry) + len, GFP_KERNEL); | 52 | de = kzalloc(sizeof(struct dlm_direntry) + len, |
| 53 | ls->ls_allocation); | ||
| 53 | return de; | 54 | return de; |
| 54 | } | 55 | } |
| 55 | 56 | ||
| @@ -211,7 +212,7 @@ int dlm_recover_directory(struct dlm_ls *ls) | |||
| 211 | 212 | ||
| 212 | dlm_dir_clear(ls); | 213 | dlm_dir_clear(ls); |
| 213 | 214 | ||
| 214 | last_name = kmalloc(DLM_RESNAME_MAXLEN, GFP_KERNEL); | 215 | last_name = kmalloc(DLM_RESNAME_MAXLEN, ls->ls_allocation); |
| 215 | if (!last_name) | 216 | if (!last_name) |
| 216 | goto out; | 217 | goto out; |
| 217 | 218 | ||
| @@ -322,7 +323,7 @@ static int get_entry(struct dlm_ls *ls, int nodeid, char *name, | |||
| 322 | if (namelen > DLM_RESNAME_MAXLEN) | 323 | if (namelen > DLM_RESNAME_MAXLEN) |
| 323 | return -EINVAL; | 324 | return -EINVAL; |
| 324 | 325 | ||
| 325 | de = kzalloc(sizeof(struct dlm_direntry) + namelen, GFP_KERNEL); | 326 | de = kzalloc(sizeof(struct dlm_direntry) + namelen, ls->ls_allocation); |
| 326 | if (!de) | 327 | if (!de) |
| 327 | return -ENOMEM; | 328 | return -ENOMEM; |
| 328 | 329 | ||
diff --git a/fs/dlm/lockspace.c b/fs/dlm/lockspace.c index cd8e2df3c295..d489fcc86713 100644 --- a/fs/dlm/lockspace.c +++ b/fs/dlm/lockspace.c | |||
| @@ -384,7 +384,7 @@ static void threads_stop(void) | |||
| 384 | dlm_astd_stop(); | 384 | dlm_astd_stop(); |
| 385 | } | 385 | } |
| 386 | 386 | ||
| 387 | static int new_lockspace(char *name, int namelen, void **lockspace, | 387 | static int new_lockspace(const char *name, int namelen, void **lockspace, |
| 388 | uint32_t flags, int lvblen) | 388 | uint32_t flags, int lvblen) |
| 389 | { | 389 | { |
| 390 | struct dlm_ls *ls; | 390 | struct dlm_ls *ls; |
| @@ -419,16 +419,14 @@ static int new_lockspace(char *name, int namelen, void **lockspace, | |||
| 419 | break; | 419 | break; |
| 420 | } | 420 | } |
| 421 | ls->ls_create_count++; | 421 | ls->ls_create_count++; |
| 422 | module_put(THIS_MODULE); | 422 | *lockspace = ls; |
| 423 | error = 1; /* not an error, return 0 */ | 423 | error = 1; |
| 424 | break; | 424 | break; |
| 425 | } | 425 | } |
| 426 | spin_unlock(&lslist_lock); | 426 | spin_unlock(&lslist_lock); |
| 427 | 427 | ||
| 428 | if (error < 0) | ||
| 429 | goto out; | ||
| 430 | if (error) | 428 | if (error) |
| 431 | goto ret_zero; | 429 | goto out; |
| 432 | 430 | ||
| 433 | error = -ENOMEM; | 431 | error = -ENOMEM; |
| 434 | 432 | ||
| @@ -583,7 +581,6 @@ static int new_lockspace(char *name, int namelen, void **lockspace, | |||
| 583 | dlm_create_debug_file(ls); | 581 | dlm_create_debug_file(ls); |
| 584 | 582 | ||
| 585 | log_debug(ls, "join complete"); | 583 | log_debug(ls, "join complete"); |
| 586 | ret_zero: | ||
| 587 | *lockspace = ls; | 584 | *lockspace = ls; |
| 588 | return 0; | 585 | return 0; |
| 589 | 586 | ||
| @@ -614,7 +611,7 @@ static int new_lockspace(char *name, int namelen, void **lockspace, | |||
| 614 | return error; | 611 | return error; |
| 615 | } | 612 | } |
| 616 | 613 | ||
| 617 | int dlm_new_lockspace(char *name, int namelen, void **lockspace, | 614 | int dlm_new_lockspace(const char *name, int namelen, void **lockspace, |
| 618 | uint32_t flags, int lvblen) | 615 | uint32_t flags, int lvblen) |
| 619 | { | 616 | { |
| 620 | int error = 0; | 617 | int error = 0; |
| @@ -628,7 +625,9 @@ int dlm_new_lockspace(char *name, int namelen, void **lockspace, | |||
| 628 | error = new_lockspace(name, namelen, lockspace, flags, lvblen); | 625 | error = new_lockspace(name, namelen, lockspace, flags, lvblen); |
| 629 | if (!error) | 626 | if (!error) |
| 630 | ls_count++; | 627 | ls_count++; |
| 631 | else if (!ls_count) | 628 | if (error > 0) |
| 629 | error = 0; | ||
| 630 | if (!ls_count) | ||
| 632 | threads_stop(); | 631 | threads_stop(); |
| 633 | out: | 632 | out: |
| 634 | mutex_unlock(&ls_lock); | 633 | mutex_unlock(&ls_lock); |
diff --git a/fs/dlm/lowcomms.c b/fs/dlm/lowcomms.c index 609108a83267..cdb580a9c7a2 100644 --- a/fs/dlm/lowcomms.c +++ b/fs/dlm/lowcomms.c | |||
| @@ -309,6 +309,20 @@ static void lowcomms_state_change(struct sock *sk) | |||
| 309 | lowcomms_write_space(sk); | 309 | lowcomms_write_space(sk); |
| 310 | } | 310 | } |
| 311 | 311 | ||
| 312 | int dlm_lowcomms_connect_node(int nodeid) | ||
| 313 | { | ||
| 314 | struct connection *con; | ||
| 315 | |||
| 316 | if (nodeid == dlm_our_nodeid()) | ||
| 317 | return 0; | ||
| 318 | |||
| 319 | con = nodeid2con(nodeid, GFP_NOFS); | ||
| 320 | if (!con) | ||
| 321 | return -ENOMEM; | ||
| 322 | lowcomms_connect_sock(con); | ||
| 323 | return 0; | ||
| 324 | } | ||
| 325 | |||
| 312 | /* Make a socket active */ | 326 | /* Make a socket active */ |
| 313 | static int add_sock(struct socket *sock, struct connection *con) | 327 | static int add_sock(struct socket *sock, struct connection *con) |
| 314 | { | 328 | { |
| @@ -486,7 +500,7 @@ static void process_sctp_notification(struct connection *con, | |||
| 486 | return; | 500 | return; |
| 487 | } | 501 | } |
| 488 | 502 | ||
| 489 | new_con = nodeid2con(nodeid, GFP_KERNEL); | 503 | new_con = nodeid2con(nodeid, GFP_NOFS); |
| 490 | if (!new_con) | 504 | if (!new_con) |
| 491 | return; | 505 | return; |
| 492 | 506 | ||
| @@ -722,7 +736,7 @@ static int tcp_accept_from_sock(struct connection *con) | |||
| 722 | * the same time and the connections cross on the wire. | 736 | * the same time and the connections cross on the wire. |
| 723 | * In this case we store the incoming one in "othercon" | 737 | * In this case we store the incoming one in "othercon" |
| 724 | */ | 738 | */ |
| 725 | newcon = nodeid2con(nodeid, GFP_KERNEL); | 739 | newcon = nodeid2con(nodeid, GFP_NOFS); |
| 726 | if (!newcon) { | 740 | if (!newcon) { |
| 727 | result = -ENOMEM; | 741 | result = -ENOMEM; |
| 728 | goto accept_err; | 742 | goto accept_err; |
| @@ -732,7 +746,7 @@ static int tcp_accept_from_sock(struct connection *con) | |||
| 732 | struct connection *othercon = newcon->othercon; | 746 | struct connection *othercon = newcon->othercon; |
| 733 | 747 | ||
| 734 | if (!othercon) { | 748 | if (!othercon) { |
| 735 | othercon = kmem_cache_zalloc(con_cache, GFP_KERNEL); | 749 | othercon = kmem_cache_zalloc(con_cache, GFP_NOFS); |
| 736 | if (!othercon) { | 750 | if (!othercon) { |
| 737 | log_print("failed to allocate incoming socket"); | 751 | log_print("failed to allocate incoming socket"); |
| 738 | mutex_unlock(&newcon->sock_mutex); | 752 | mutex_unlock(&newcon->sock_mutex); |
| @@ -1421,7 +1435,7 @@ static int work_start(void) | |||
| 1421 | static void stop_conn(struct connection *con) | 1435 | static void stop_conn(struct connection *con) |
| 1422 | { | 1436 | { |
| 1423 | con->flags |= 0x0F; | 1437 | con->flags |= 0x0F; |
| 1424 | if (con->sock) | 1438 | if (con->sock && con->sock->sk) |
| 1425 | con->sock->sk->sk_user_data = NULL; | 1439 | con->sock->sk->sk_user_data = NULL; |
| 1426 | } | 1440 | } |
| 1427 | 1441 | ||
diff --git a/fs/dlm/lowcomms.h b/fs/dlm/lowcomms.h index a9a9618c0d3f..1311e6426287 100644 --- a/fs/dlm/lowcomms.h +++ b/fs/dlm/lowcomms.h | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | ******************************************************************************* | 2 | ******************************************************************************* |
| 3 | ** | 3 | ** |
| 4 | ** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved. | 4 | ** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved. |
| 5 | ** Copyright (C) 2004-2005 Red Hat, Inc. All rights reserved. | 5 | ** Copyright (C) 2004-2009 Red Hat, Inc. All rights reserved. |
| 6 | ** | 6 | ** |
| 7 | ** This copyrighted material is made available to anyone wishing to use, | 7 | ** This copyrighted material is made available to anyone wishing to use, |
| 8 | ** modify, copy, or redistribute it subject to the terms and conditions | 8 | ** modify, copy, or redistribute it subject to the terms and conditions |
| @@ -19,6 +19,7 @@ void dlm_lowcomms_stop(void); | |||
| 19 | int dlm_lowcomms_close(int nodeid); | 19 | int dlm_lowcomms_close(int nodeid); |
| 20 | void *dlm_lowcomms_get_buffer(int nodeid, int len, gfp_t allocation, char **ppc); | 20 | void *dlm_lowcomms_get_buffer(int nodeid, int len, gfp_t allocation, char **ppc); |
| 21 | void dlm_lowcomms_commit_buffer(void *mh); | 21 | void dlm_lowcomms_commit_buffer(void *mh); |
| 22 | int dlm_lowcomms_connect_node(int nodeid); | ||
| 22 | 23 | ||
| 23 | #endif /* __LOWCOMMS_DOT_H__ */ | 24 | #endif /* __LOWCOMMS_DOT_H__ */ |
| 24 | 25 | ||
diff --git a/fs/dlm/member.c b/fs/dlm/member.c index 26133f05ae3a..b128775913b2 100644 --- a/fs/dlm/member.c +++ b/fs/dlm/member.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /****************************************************************************** | 1 | /****************************************************************************** |
| 2 | ******************************************************************************* | 2 | ******************************************************************************* |
| 3 | ** | 3 | ** |
| 4 | ** Copyright (C) 2005-2008 Red Hat, Inc. All rights reserved. | 4 | ** Copyright (C) 2005-2009 Red Hat, Inc. All rights reserved. |
| 5 | ** | 5 | ** |
| 6 | ** This copyrighted material is made available to anyone wishing to use, | 6 | ** This copyrighted material is made available to anyone wishing to use, |
| 7 | ** modify, copy, or redistribute it subject to the terms and conditions | 7 | ** modify, copy, or redistribute it subject to the terms and conditions |
| @@ -17,6 +17,7 @@ | |||
| 17 | #include "recover.h" | 17 | #include "recover.h" |
| 18 | #include "rcom.h" | 18 | #include "rcom.h" |
| 19 | #include "config.h" | 19 | #include "config.h" |
| 20 | #include "lowcomms.h" | ||
| 20 | 21 | ||
| 21 | static void add_ordered_member(struct dlm_ls *ls, struct dlm_member *new) | 22 | static void add_ordered_member(struct dlm_ls *ls, struct dlm_member *new) |
| 22 | { | 23 | { |
| @@ -45,9 +46,9 @@ static void add_ordered_member(struct dlm_ls *ls, struct dlm_member *new) | |||
| 45 | static int dlm_add_member(struct dlm_ls *ls, int nodeid) | 46 | static int dlm_add_member(struct dlm_ls *ls, int nodeid) |
| 46 | { | 47 | { |
| 47 | struct dlm_member *memb; | 48 | struct dlm_member *memb; |
| 48 | int w; | 49 | int w, error; |
| 49 | 50 | ||
| 50 | memb = kzalloc(sizeof(struct dlm_member), GFP_KERNEL); | 51 | memb = kzalloc(sizeof(struct dlm_member), ls->ls_allocation); |
| 51 | if (!memb) | 52 | if (!memb) |
| 52 | return -ENOMEM; | 53 | return -ENOMEM; |
| 53 | 54 | ||
| @@ -57,6 +58,12 @@ static int dlm_add_member(struct dlm_ls *ls, int nodeid) | |||
| 57 | return w; | 58 | return w; |
| 58 | } | 59 | } |
| 59 | 60 | ||
| 61 | error = dlm_lowcomms_connect_node(nodeid); | ||
| 62 | if (error < 0) { | ||
| 63 | kfree(memb); | ||
| 64 | return error; | ||
| 65 | } | ||
| 66 | |||
| 60 | memb->nodeid = nodeid; | 67 | memb->nodeid = nodeid; |
| 61 | memb->weight = w; | 68 | memb->weight = w; |
| 62 | add_ordered_member(ls, memb); | 69 | add_ordered_member(ls, memb); |
| @@ -136,7 +143,7 @@ static void make_member_array(struct dlm_ls *ls) | |||
| 136 | 143 | ||
| 137 | ls->ls_total_weight = total; | 144 | ls->ls_total_weight = total; |
| 138 | 145 | ||
| 139 | array = kmalloc(sizeof(int) * total, GFP_KERNEL); | 146 | array = kmalloc(sizeof(int) * total, ls->ls_allocation); |
| 140 | if (!array) | 147 | if (!array) |
| 141 | return; | 148 | return; |
| 142 | 149 | ||
| @@ -219,7 +226,7 @@ int dlm_recover_members(struct dlm_ls *ls, struct dlm_recover *rv, int *neg_out) | |||
| 219 | continue; | 226 | continue; |
| 220 | log_debug(ls, "new nodeid %d is a re-added member", rv->new[i]); | 227 | log_debug(ls, "new nodeid %d is a re-added member", rv->new[i]); |
| 221 | 228 | ||
| 222 | memb = kzalloc(sizeof(struct dlm_member), GFP_KERNEL); | 229 | memb = kzalloc(sizeof(struct dlm_member), ls->ls_allocation); |
| 223 | if (!memb) | 230 | if (!memb) |
| 224 | return -ENOMEM; | 231 | return -ENOMEM; |
| 225 | memb->nodeid = rv->new[i]; | 232 | memb->nodeid = rv->new[i]; |
| @@ -334,7 +341,7 @@ int dlm_ls_start(struct dlm_ls *ls) | |||
| 334 | int *ids = NULL, *new = NULL; | 341 | int *ids = NULL, *new = NULL; |
| 335 | int error, ids_count = 0, new_count = 0; | 342 | int error, ids_count = 0, new_count = 0; |
| 336 | 343 | ||
| 337 | rv = kzalloc(sizeof(struct dlm_recover), GFP_KERNEL); | 344 | rv = kzalloc(sizeof(struct dlm_recover), ls->ls_allocation); |
| 338 | if (!rv) | 345 | if (!rv) |
| 339 | return -ENOMEM; | 346 | return -ENOMEM; |
| 340 | 347 | ||
diff --git a/fs/dlm/requestqueue.c b/fs/dlm/requestqueue.c index daa4183fbb84..7a2307c08911 100644 --- a/fs/dlm/requestqueue.c +++ b/fs/dlm/requestqueue.c | |||
| @@ -35,7 +35,7 @@ void dlm_add_requestqueue(struct dlm_ls *ls, int nodeid, struct dlm_message *ms) | |||
| 35 | struct rq_entry *e; | 35 | struct rq_entry *e; |
| 36 | int length = ms->m_header.h_length - sizeof(struct dlm_message); | 36 | int length = ms->m_header.h_length - sizeof(struct dlm_message); |
| 37 | 37 | ||
| 38 | e = kmalloc(sizeof(struct rq_entry) + length, GFP_KERNEL); | 38 | e = kmalloc(sizeof(struct rq_entry) + length, ls->ls_allocation); |
| 39 | if (!e) { | 39 | if (!e) { |
| 40 | log_print("dlm_add_requestqueue: out of memory len %d", length); | 40 | log_print("dlm_add_requestqueue: out of memory len %d", length); |
| 41 | return; | 41 | return; |
diff --git a/include/linux/dlm.h b/include/linux/dlm.h index b9cd38603fd8..0b3518c42356 100644 --- a/include/linux/dlm.h +++ b/include/linux/dlm.h | |||
| @@ -81,8 +81,8 @@ struct dlm_lksb { | |||
| 81 | * the cluster, the calling node joins it. | 81 | * the cluster, the calling node joins it. |
| 82 | */ | 82 | */ |
| 83 | 83 | ||
| 84 | int dlm_new_lockspace(char *name, int namelen, dlm_lockspace_t **lockspace, | 84 | int dlm_new_lockspace(const char *name, int namelen, |
| 85 | uint32_t flags, int lvblen); | 85 | dlm_lockspace_t **lockspace, uint32_t flags, int lvblen); |
| 86 | 86 | ||
| 87 | /* | 87 | /* |
| 88 | * dlm_release_lockspace | 88 | * dlm_release_lockspace |
diff --git a/include/linux/perf_counter.h b/include/linux/perf_counter.h index 6e133954e2e4..1b3118a1023a 100644 --- a/include/linux/perf_counter.h +++ b/include/linux/perf_counter.h | |||
| @@ -120,6 +120,8 @@ enum perf_counter_sample_format { | |||
| 120 | PERF_SAMPLE_ID = 1U << 6, | 120 | PERF_SAMPLE_ID = 1U << 6, |
| 121 | PERF_SAMPLE_CPU = 1U << 7, | 121 | PERF_SAMPLE_CPU = 1U << 7, |
| 122 | PERF_SAMPLE_PERIOD = 1U << 8, | 122 | PERF_SAMPLE_PERIOD = 1U << 8, |
| 123 | |||
| 124 | PERF_SAMPLE_MAX = 1U << 9, /* non-ABI */ | ||
| 123 | }; | 125 | }; |
| 124 | 126 | ||
| 125 | /* | 127 | /* |
| @@ -131,17 +133,26 @@ enum perf_counter_read_format { | |||
| 131 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, | 133 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
| 132 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | 134 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, |
| 133 | PERF_FORMAT_ID = 1U << 2, | 135 | PERF_FORMAT_ID = 1U << 2, |
| 136 | |||
| 137 | PERF_FORMAT_MAX = 1U << 3, /* non-ABI */ | ||
| 134 | }; | 138 | }; |
| 135 | 139 | ||
| 140 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ | ||
| 141 | |||
| 136 | /* | 142 | /* |
| 137 | * Hardware event to monitor via a performance monitoring counter: | 143 | * Hardware event to monitor via a performance monitoring counter: |
| 138 | */ | 144 | */ |
| 139 | struct perf_counter_attr { | 145 | struct perf_counter_attr { |
| 146 | |||
| 140 | /* | 147 | /* |
| 141 | * Major type: hardware/software/tracepoint/etc. | 148 | * Major type: hardware/software/tracepoint/etc. |
| 142 | */ | 149 | */ |
| 143 | __u32 type; | 150 | __u32 type; |
| 144 | __u32 __reserved_1; | 151 | |
| 152 | /* | ||
| 153 | * Size of the attr structure, for fwd/bwd compat. | ||
| 154 | */ | ||
| 155 | __u32 size; | ||
| 145 | 156 | ||
| 146 | /* | 157 | /* |
| 147 | * Type specific configuration information. | 158 | * Type specific configuration information. |
| @@ -168,12 +179,12 @@ struct perf_counter_attr { | |||
| 168 | comm : 1, /* include comm data */ | 179 | comm : 1, /* include comm data */ |
| 169 | freq : 1, /* use freq, not period */ | 180 | freq : 1, /* use freq, not period */ |
| 170 | 181 | ||
| 171 | __reserved_2 : 53; | 182 | __reserved_1 : 53; |
| 172 | 183 | ||
| 173 | __u32 wakeup_events; /* wakeup every n events */ | 184 | __u32 wakeup_events; /* wakeup every n events */ |
| 174 | __u32 __reserved_3; | 185 | __u32 __reserved_2; |
| 175 | 186 | ||
| 176 | __u64 __reserved_4; | 187 | __u64 __reserved_3; |
| 177 | }; | 188 | }; |
| 178 | 189 | ||
| 179 | /* | 190 | /* |
| @@ -621,7 +632,8 @@ extern int perf_counter_overflow(struct perf_counter *counter, int nmi, | |||
| 621 | static inline int is_software_counter(struct perf_counter *counter) | 632 | static inline int is_software_counter(struct perf_counter *counter) |
| 622 | { | 633 | { |
| 623 | return (counter->attr.type != PERF_TYPE_RAW) && | 634 | return (counter->attr.type != PERF_TYPE_RAW) && |
| 624 | (counter->attr.type != PERF_TYPE_HARDWARE); | 635 | (counter->attr.type != PERF_TYPE_HARDWARE) && |
| 636 | (counter->attr.type != PERF_TYPE_HW_CACHE); | ||
| 625 | } | 637 | } |
| 626 | 638 | ||
| 627 | extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64); | 639 | extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64); |
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index c6c84ad8bd71..418d90f5effe 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h | |||
| @@ -758,6 +758,6 @@ int kernel_execve(const char *filename, char *const argv[], char *const envp[]); | |||
| 758 | 758 | ||
| 759 | 759 | ||
| 760 | asmlinkage long sys_perf_counter_open( | 760 | asmlinkage long sys_perf_counter_open( |
| 761 | const struct perf_counter_attr __user *attr_uptr, | 761 | struct perf_counter_attr __user *attr_uptr, |
| 762 | pid_t pid, int cpu, int group_fd, unsigned long flags); | 762 | pid_t pid, int cpu, int group_fd, unsigned long flags); |
| 763 | #endif | 763 | #endif |
diff --git a/init/Kconfig b/init/Kconfig index c649657e2259..d3a50967c337 100644 --- a/init/Kconfig +++ b/init/Kconfig | |||
| @@ -936,6 +936,8 @@ config AIO | |||
| 936 | 936 | ||
| 937 | config HAVE_PERF_COUNTERS | 937 | config HAVE_PERF_COUNTERS |
| 938 | bool | 938 | bool |
| 939 | help | ||
| 940 | See tools/perf/design.txt for details. | ||
| 939 | 941 | ||
| 940 | menu "Performance Counters" | 942 | menu "Performance Counters" |
| 941 | 943 | ||
diff --git a/kernel/perf_counter.c b/kernel/perf_counter.c index ef5d8a5b2453..29b685f551aa 100644 --- a/kernel/perf_counter.c +++ b/kernel/perf_counter.c | |||
| @@ -3570,12 +3570,8 @@ perf_counter_alloc(struct perf_counter_attr *attr, | |||
| 3570 | if (attr->inherit && (attr->sample_type & PERF_SAMPLE_GROUP)) | 3570 | if (attr->inherit && (attr->sample_type & PERF_SAMPLE_GROUP)) |
| 3571 | goto done; | 3571 | goto done; |
| 3572 | 3572 | ||
| 3573 | if (attr->type == PERF_TYPE_RAW) { | ||
| 3574 | pmu = hw_perf_counter_init(counter); | ||
| 3575 | goto done; | ||
| 3576 | } | ||
| 3577 | |||
| 3578 | switch (attr->type) { | 3573 | switch (attr->type) { |
| 3574 | case PERF_TYPE_RAW: | ||
| 3579 | case PERF_TYPE_HARDWARE: | 3575 | case PERF_TYPE_HARDWARE: |
| 3580 | case PERF_TYPE_HW_CACHE: | 3576 | case PERF_TYPE_HW_CACHE: |
| 3581 | pmu = hw_perf_counter_init(counter); | 3577 | pmu = hw_perf_counter_init(counter); |
| @@ -3588,6 +3584,9 @@ perf_counter_alloc(struct perf_counter_attr *attr, | |||
| 3588 | case PERF_TYPE_TRACEPOINT: | 3584 | case PERF_TYPE_TRACEPOINT: |
| 3589 | pmu = tp_perf_counter_init(counter); | 3585 | pmu = tp_perf_counter_init(counter); |
| 3590 | break; | 3586 | break; |
| 3587 | |||
| 3588 | default: | ||
| 3589 | break; | ||
| 3591 | } | 3590 | } |
| 3592 | done: | 3591 | done: |
| 3593 | err = 0; | 3592 | err = 0; |
| @@ -3614,6 +3613,85 @@ done: | |||
| 3614 | return counter; | 3613 | return counter; |
| 3615 | } | 3614 | } |
| 3616 | 3615 | ||
| 3616 | static int perf_copy_attr(struct perf_counter_attr __user *uattr, | ||
| 3617 | struct perf_counter_attr *attr) | ||
| 3618 | { | ||
| 3619 | int ret; | ||
| 3620 | u32 size; | ||
| 3621 | |||
| 3622 | if (!access_ok(VERIFY_WRITE, uattr, PERF_ATTR_SIZE_VER0)) | ||
| 3623 | return -EFAULT; | ||
| 3624 | |||
| 3625 | /* | ||
| 3626 | * zero the full structure, so that a short copy will be nice. | ||
| 3627 | */ | ||
| 3628 | memset(attr, 0, sizeof(*attr)); | ||
| 3629 | |||
| 3630 | ret = get_user(size, &uattr->size); | ||
| 3631 | if (ret) | ||
| 3632 | return ret; | ||
| 3633 | |||
| 3634 | if (size > PAGE_SIZE) /* silly large */ | ||
| 3635 | goto err_size; | ||
| 3636 | |||
| 3637 | if (!size) /* abi compat */ | ||
| 3638 | size = PERF_ATTR_SIZE_VER0; | ||
| 3639 | |||
| 3640 | if (size < PERF_ATTR_SIZE_VER0) | ||
| 3641 | goto err_size; | ||
| 3642 | |||
| 3643 | /* | ||
| 3644 | * If we're handed a bigger struct than we know of, | ||
| 3645 | * ensure all the unknown bits are 0. | ||
| 3646 | */ | ||
| 3647 | if (size > sizeof(*attr)) { | ||
| 3648 | unsigned long val; | ||
| 3649 | unsigned long __user *addr; | ||
| 3650 | unsigned long __user *end; | ||
| 3651 | |||
| 3652 | addr = PTR_ALIGN((void __user *)uattr + sizeof(*attr), | ||
| 3653 | sizeof(unsigned long)); | ||
| 3654 | end = PTR_ALIGN((void __user *)uattr + size, | ||
| 3655 | sizeof(unsigned long)); | ||
| 3656 | |||
| 3657 | for (; addr < end; addr += sizeof(unsigned long)) { | ||
| 3658 | ret = get_user(val, addr); | ||
| 3659 | if (ret) | ||
| 3660 | return ret; | ||
| 3661 | if (val) | ||
| 3662 | goto err_size; | ||
| 3663 | } | ||
| 3664 | } | ||
| 3665 | |||
| 3666 | ret = copy_from_user(attr, uattr, size); | ||
| 3667 | if (ret) | ||
| 3668 | return -EFAULT; | ||
| 3669 | |||
| 3670 | /* | ||
| 3671 | * If the type exists, the corresponding creation will verify | ||
| 3672 | * the attr->config. | ||
| 3673 | */ | ||
| 3674 | if (attr->type >= PERF_TYPE_MAX) | ||
| 3675 | return -EINVAL; | ||
| 3676 | |||
| 3677 | if (attr->__reserved_1 || attr->__reserved_2 || attr->__reserved_3) | ||
| 3678 | return -EINVAL; | ||
| 3679 | |||
| 3680 | if (attr->sample_type & ~(PERF_SAMPLE_MAX-1)) | ||
| 3681 | return -EINVAL; | ||
| 3682 | |||
| 3683 | if (attr->read_format & ~(PERF_FORMAT_MAX-1)) | ||
| 3684 | return -EINVAL; | ||
| 3685 | |||
| 3686 | out: | ||
| 3687 | return ret; | ||
| 3688 | |||
| 3689 | err_size: | ||
| 3690 | put_user(sizeof(*attr), &uattr->size); | ||
| 3691 | ret = -E2BIG; | ||
| 3692 | goto out; | ||
| 3693 | } | ||
| 3694 | |||
| 3617 | /** | 3695 | /** |
| 3618 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu | 3696 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
| 3619 | * | 3697 | * |
| @@ -3623,7 +3701,7 @@ done: | |||
| 3623 | * @group_fd: group leader counter fd | 3701 | * @group_fd: group leader counter fd |
| 3624 | */ | 3702 | */ |
| 3625 | SYSCALL_DEFINE5(perf_counter_open, | 3703 | SYSCALL_DEFINE5(perf_counter_open, |
| 3626 | const struct perf_counter_attr __user *, attr_uptr, | 3704 | struct perf_counter_attr __user *, attr_uptr, |
| 3627 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) | 3705 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
| 3628 | { | 3706 | { |
| 3629 | struct perf_counter *counter, *group_leader; | 3707 | struct perf_counter *counter, *group_leader; |
| @@ -3639,8 +3717,9 @@ SYSCALL_DEFINE5(perf_counter_open, | |||
| 3639 | if (flags) | 3717 | if (flags) |
| 3640 | return -EINVAL; | 3718 | return -EINVAL; |
| 3641 | 3719 | ||
| 3642 | if (copy_from_user(&attr, attr_uptr, sizeof(attr)) != 0) | 3720 | ret = perf_copy_attr(attr_uptr, &attr); |
| 3643 | return -EFAULT; | 3721 | if (ret) |
| 3722 | return ret; | ||
| 3644 | 3723 | ||
| 3645 | if (!attr.exclude_kernel) { | 3724 | if (!attr.exclude_kernel) { |
| 3646 | if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN)) | 3725 | if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN)) |
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c index 29259e74dcfa..0f5771f615da 100644 --- a/tools/perf/builtin-record.c +++ b/tools/perf/builtin-record.c | |||
| @@ -568,8 +568,11 @@ int cmd_record(int argc, const char **argv, const char *prefix) | |||
| 568 | if (!argc && target_pid == -1 && !system_wide) | 568 | if (!argc && target_pid == -1 && !system_wide) |
| 569 | usage_with_options(record_usage, options); | 569 | usage_with_options(record_usage, options); |
| 570 | 570 | ||
| 571 | if (!nr_counters) | 571 | if (!nr_counters) { |
| 572 | nr_counters = 1; | 572 | nr_counters = 1; |
| 573 | attrs[0].type = PERF_TYPE_HARDWARE; | ||
| 574 | attrs[0].config = PERF_COUNT_HW_CPU_CYCLES; | ||
| 575 | } | ||
| 573 | 576 | ||
| 574 | for (counter = 0; counter < nr_counters; counter++) { | 577 | for (counter = 0; counter < nr_counters; counter++) { |
| 575 | if (attrs[counter].sample_period) | 578 | if (attrs[counter].sample_period) |
diff --git a/tools/perf/design.txt b/tools/perf/design.txt index 860e116d979c..f71e0d245cba 100644 --- a/tools/perf/design.txt +++ b/tools/perf/design.txt | |||
| @@ -440,3 +440,18 @@ by this process or by another, and doesn't affect any counters that | |||
| 440 | this process has created on other processes. It only enables or | 440 | this process has created on other processes. It only enables or |
| 441 | disables the group leaders, not any other members in the groups. | 441 | disables the group leaders, not any other members in the groups. |
| 442 | 442 | ||
| 443 | |||
| 444 | Arch requirements | ||
| 445 | ----------------- | ||
| 446 | |||
| 447 | If your architecture does not have hardware performance metrics, you can | ||
| 448 | still use the generic software counters based on hrtimers for sampling. | ||
| 449 | |||
| 450 | So to start with, in order to add HAVE_PERF_COUNTERS to your Kconfig, you | ||
| 451 | will need at least this: | ||
| 452 | - asm/perf_counter.h - a basic stub will suffice at first | ||
| 453 | - support for atomic64 types (and associated helper functions) | ||
| 454 | - set_perf_counter_pending() implemented | ||
| 455 | |||
| 456 | If your architecture does have hardware capabilities, you can override the | ||
| 457 | weak stub hw_perf_counter_init() to register hardware counters. | ||
diff --git a/tools/perf/perf.h b/tools/perf/perf.h index af0a5046d743..87a1aca4a424 100644 --- a/tools/perf/perf.h +++ b/tools/perf/perf.h | |||
| @@ -53,11 +53,12 @@ static inline unsigned long long rdclock(void) | |||
| 53 | _min1 < _min2 ? _min1 : _min2; }) | 53 | _min1 < _min2 ? _min1 : _min2; }) |
| 54 | 54 | ||
| 55 | static inline int | 55 | static inline int |
| 56 | sys_perf_counter_open(struct perf_counter_attr *attr_uptr, | 56 | sys_perf_counter_open(struct perf_counter_attr *attr, |
| 57 | pid_t pid, int cpu, int group_fd, | 57 | pid_t pid, int cpu, int group_fd, |
| 58 | unsigned long flags) | 58 | unsigned long flags) |
| 59 | { | 59 | { |
| 60 | return syscall(__NR_perf_counter_open, attr_uptr, pid, cpu, | 60 | attr->size = sizeof(*attr); |
| 61 | return syscall(__NR_perf_counter_open, attr, pid, cpu, | ||
| 61 | group_fd, flags); | 62 | group_fd, flags); |
| 62 | } | 63 | } |
| 63 | 64 | ||
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c index 9d5f1ca50e6f..5a72586e1df0 100644 --- a/tools/perf/util/parse-events.c +++ b/tools/perf/util/parse-events.c | |||
| @@ -75,7 +75,7 @@ static char *sw_event_names[] = { | |||
| 75 | #define MAX_ALIASES 8 | 75 | #define MAX_ALIASES 8 |
| 76 | 76 | ||
| 77 | static char *hw_cache [][MAX_ALIASES] = { | 77 | static char *hw_cache [][MAX_ALIASES] = { |
| 78 | { "L1-data" , "l1-d", "l1d", "l1" }, | 78 | { "L1-data" , "l1-d", "l1d" }, |
| 79 | { "L1-instruction" , "l1-i", "l1i" }, | 79 | { "L1-instruction" , "l1-i", "l1i" }, |
| 80 | { "L2" , "l2" }, | 80 | { "L2" , "l2" }, |
| 81 | { "Data-TLB" , "dtlb", "d-tlb" }, | 81 | { "Data-TLB" , "dtlb", "d-tlb" }, |