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-rw-r--r--arch/sh/Kconfig13
-rw-r--r--arch/sh/boards/snapgear/rtc.c27
-rw-r--r--arch/sh/kernel/cpu/Makefile1
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c2
-rw-r--r--arch/sh/kernel/cpu/rtc.c128
-rw-r--r--arch/sh/kernel/time.c41
-rw-r--r--drivers/char/Kconfig2
-rw-r--r--include/asm-sh/mc146818rtc.h169
-rw-r--r--include/asm-sh/rtc.h21
9 files changed, 23 insertions, 381 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5bec3af164e5..c7e3596dcde1 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -296,19 +296,6 @@ config CPU_LITTLE_ENDIAN
296 endian byte order. These modes require different kernels. Say Y if 296 endian byte order. These modes require different kernels. Say Y if
297 your machine is little endian, N if it's a big endian machine. 297 your machine is little endian, N if it's a big endian machine.
298 298
299# The SH7750 RTC module is disabled in the Dreamcast
300config SH_RTC
301 bool
302 depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \
303 !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \
304 !SH_R7780RP && !SH_SHMIN
305 default y
306 help
307 Selecting this option will allow the Linux kernel to emulate
308 PC's RTC.
309
310 If unsure, say N.
311
312config SH_FPU 299config SH_FPU
313 bool "FPU support" 300 bool "FPU support"
314 depends on !CPU_SH3 301 depends on !CPU_SH3
diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c
index 722479deb55a..1659fdd6695a 100644
--- a/arch/sh/boards/snapgear/rtc.c
+++ b/arch/sh/boards/snapgear/rtc.c
@@ -19,9 +19,7 @@
19#include <linux/mc146818rtc.h> 19#include <linux/mc146818rtc.h>
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22/****************************************************************************/ 22static int use_ds1302;
23
24static int use_ds1302 = 0;
25 23
26/****************************************************************************/ 24/****************************************************************************/
27/* 25/*
@@ -79,10 +77,6 @@ static unsigned int ds1302_readbyte(unsigned int addr)
79 unsigned int val; 77 unsigned int val;
80 unsigned long flags; 78 unsigned long flags;
81 79
82#if 0
83 printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr);
84#endif
85
86 local_irq_save(flags); 80 local_irq_save(flags);
87 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); 81 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
88 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 82 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -101,10 +95,6 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val)
101{ 95{
102 unsigned long flags; 96 unsigned long flags;
103 97
104#if 0
105 printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr);
106#endif
107
108 local_irq_save(flags); 98 local_irq_save(flags);
109 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); 99 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
110 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 100 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -167,9 +157,6 @@ void __init secureedge5410_rtc_init(void)
167 if (use_ds1302) { 157 if (use_ds1302) {
168 rtc_sh_get_time = snapgear_rtc_gettimeofday; 158 rtc_sh_get_time = snapgear_rtc_gettimeofday;
169 rtc_sh_set_time = snapgear_rtc_settimeofday; 159 rtc_sh_set_time = snapgear_rtc_settimeofday;
170 } else {
171 rtc_sh_get_time = sh_rtc_gettimeofday;
172 rtc_sh_set_time = sh_rtc_settimeofday;
173 } 160 }
174 161
175 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal"); 162 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal");
@@ -184,10 +171,8 @@ void snapgear_rtc_gettimeofday(struct timespec *ts)
184{ 171{
185 unsigned int sec, min, hr, day, mon, yr; 172 unsigned int sec, min, hr, day, mon, yr;
186 173
187 if (!use_ds1302) { 174 if (!use_ds1302)
188 sh_rtc_gettimeofday(ts);
189 return; 175 return;
190 }
191 176
192 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC)); 177 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC));
193 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN)); 178 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
@@ -228,7 +213,7 @@ int snapgear_rtc_settimeofday(const time_t secs)
228 unsigned long nowtime; 213 unsigned long nowtime;
229 214
230 if (!use_ds1302) 215 if (!use_ds1302)
231 return sh_rtc_settimeofday(secs); 216 return 0;
232 217
233/* 218/*
234 * This is called direct from the kernel timer handling code. 219 * This is called direct from the kernel timer handling code.
@@ -237,10 +222,6 @@ int snapgear_rtc_settimeofday(const time_t secs)
237 222
238 nowtime = secs; 223 nowtime = secs;
239 224
240#if 1
241 printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime);
242#endif
243
244 /* STOP RTC */ 225 /* STOP RTC */
245 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); 226 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
246 227
@@ -326,5 +307,3 @@ void secureedge5410_cmos_write(unsigned char val, int addr)
326 default: break; 307 default: break;
327 } 308 }
328} 309}
329
330/****************************************************************************/
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 59d5b748752f..fb5dac069382 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -8,6 +8,5 @@ obj-$(CONFIG_CPU_SH2) += sh2/
8obj-$(CONFIG_CPU_SH3) += sh3/ 8obj-$(CONFIG_CPU_SH3) += sh3/
9obj-$(CONFIG_CPU_SH4) += sh4/ 9obj-$(CONFIG_CPU_SH4) += sh4/
10 10
11obj-$(CONFIG_SH_RTC) += rtc.o
12obj-$(CONFIG_UBC_WAKEUP) += ubc.o 11obj-$(CONFIG_UBC_WAKEUP) += ubc.o
13obj-$(CONFIG_SH_ADC) += adc.o 12obj-$(CONFIG_SH_ADC) += adc.o
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index d2b715a04c7e..00edee971bcb 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -124,7 +124,7 @@ void __init init_IRQ(void)
124#ifndef CONFIG_CPU_SUBTYPE_SH7780 124#ifndef CONFIG_CPU_SUBTYPE_SH7780
125 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); 125 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
126 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); 126 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
127#if defined(CONFIG_SH_RTC) 127#ifdef RTC_IRQ
128 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); 128 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
129#endif 129#endif
130 130
diff --git a/arch/sh/kernel/cpu/rtc.c b/arch/sh/kernel/cpu/rtc.c
deleted file mode 100644
index 4304cf75cfa2..000000000000
--- a/arch/sh/kernel/cpu/rtc.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/*
2 * linux/arch/sh/kernel/rtc.c -- SH3 / SH4 on-chip RTC support
3 *
4 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
5 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
6 */
7
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/time.h>
12#include <linux/bcd.h>
13#include <asm/io.h>
14#include <asm/rtc.h>
15
16void sh_rtc_gettimeofday(struct timespec *ts)
17{
18 unsigned int sec128, sec, sec2, min, hr, wk, day, mon, yr, yr100, cf_bit;
19 unsigned long flags;
20
21 again:
22 do {
23 local_irq_save(flags);
24 ctrl_outb(0, RCR1); /* Clear CF-bit */
25 sec128 = ctrl_inb(R64CNT);
26 sec = ctrl_inb(RSECCNT);
27 min = ctrl_inb(RMINCNT);
28 hr = ctrl_inb(RHRCNT);
29 wk = ctrl_inb(RWKCNT);
30 day = ctrl_inb(RDAYCNT);
31 mon = ctrl_inb(RMONCNT);
32#if defined(CONFIG_CPU_SH4)
33 yr = ctrl_inw(RYRCNT);
34 yr100 = (yr >> 8);
35 yr &= 0xff;
36#else
37 yr = ctrl_inb(RYRCNT);
38 yr100 = (yr == 0x99) ? 0x19 : 0x20;
39#endif
40 sec2 = ctrl_inb(R64CNT);
41 cf_bit = ctrl_inb(RCR1) & RCR1_CF;
42 local_irq_restore(flags);
43 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
44
45 BCD_TO_BIN(yr100);
46 BCD_TO_BIN(yr);
47 BCD_TO_BIN(mon);
48 BCD_TO_BIN(day);
49 BCD_TO_BIN(hr);
50 BCD_TO_BIN(min);
51 BCD_TO_BIN(sec);
52
53 if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
54 hr > 23 || min > 59 || sec > 59) {
55 printk(KERN_ERR
56 "SH RTC: invalid value, resetting to 1 Jan 2000\n");
57 local_irq_save(flags);
58 ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */
59 ctrl_outb(0, RSECCNT);
60 ctrl_outb(0, RMINCNT);
61 ctrl_outb(0, RHRCNT);
62 ctrl_outb(6, RWKCNT);
63 ctrl_outb(1, RDAYCNT);
64 ctrl_outb(1, RMONCNT);
65#if defined(CONFIG_CPU_SH4)
66 ctrl_outw(0x2000, RYRCNT);
67#else
68 ctrl_outb(0, RYRCNT);
69#endif
70 ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */
71 goto again;
72 }
73
74#if RTC_BIT_INVERTED != 0
75 if ((sec128 & RTC_BIT_INVERTED))
76 sec--;
77#endif
78
79 ts->tv_sec = mktime(yr100 * 100 + yr, mon, day, hr, min, sec);
80 ts->tv_nsec = ((sec128 * 1000000) / 128) * 1000;
81}
82
83/*
84 * Changed to only care about tv_sec, and not the full timespec struct
85 * (i.e. tv_nsec). It can easily be switched to timespec for future cpus
86 * that support setting usec or nsec RTC values.
87 */
88int sh_rtc_settimeofday(const time_t secs)
89{
90 int retval = 0;
91 int real_seconds, real_minutes, cmos_minutes;
92 unsigned long flags;
93
94 local_irq_save(flags);
95 ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */
96
97 cmos_minutes = ctrl_inb(RMINCNT);
98 BCD_TO_BIN(cmos_minutes);
99
100 /*
101 * since we're only adjusting minutes and seconds,
102 * don't interfere with hour overflow. This avoids
103 * messing with unknown time zones but requires your
104 * RTC not to be off by more than 15 minutes
105 */
106 real_seconds = secs % 60;
107 real_minutes = secs / 60;
108 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
109 real_minutes += 30; /* correct for half hour time zone */
110 real_minutes %= 60;
111
112 if (abs(real_minutes - cmos_minutes) < 30) {
113 BIN_TO_BCD(real_seconds);
114 BIN_TO_BCD(real_minutes);
115 ctrl_outb(real_seconds, RSECCNT);
116 ctrl_outb(real_minutes, RMINCNT);
117 } else {
118 printk(KERN_WARNING
119 "set_rtc_time: can't update from %d to %d\n",
120 cmos_minutes, real_minutes);
121 retval = -1;
122 }
123
124 ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */
125 local_irq_restore(flags);
126
127 return retval;
128}
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 8acd70bffe76..149d9713eddf 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -3,13 +3,12 @@
3 * 3 *
4 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka 4 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> 5 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
6 * Copyright (C) 2002, 2003, 2004, 2005 Paul Mundt 6 * Copyright (C) 2002 - 2006 Paul Mundt
7 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> 7 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
8 * 8 *
9 * Some code taken from i386 version. 9 * Some code taken from i386 version.
10 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 10 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
11 */ 11 */
12
13#include <linux/kernel.h> 12#include <linux/kernel.h>
14#include <linux/module.h> 13#include <linux/module.h>
15#include <linux/init.h> 14#include <linux/init.h>
@@ -26,15 +25,20 @@ struct sys_timer *sys_timer;
26DEFINE_SPINLOCK(rtc_lock); 25DEFINE_SPINLOCK(rtc_lock);
27EXPORT_SYMBOL(rtc_lock); 26EXPORT_SYMBOL(rtc_lock);
28 27
29/* XXX: Can we initialize this in a routine somewhere? Dreamcast doesn't want 28/* Dummy RTC ops */
30 * these routines anywhere... */ 29static void null_rtc_get_time(struct timespec *tv)
31#ifdef CONFIG_SH_RTC 30{
32void (*rtc_sh_get_time)(struct timespec *) = sh_rtc_gettimeofday; 31 tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
33int (*rtc_sh_set_time)(const time_t) = sh_rtc_settimeofday; 32 tv->tv_nsec = 0;
34#else 33}
35void (*rtc_sh_get_time)(struct timespec *); 34
36int (*rtc_sh_set_time)(const time_t); 35static int null_rtc_set_time(const time_t secs)
37#endif 36{
37 return 0;
38}
39
40void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
41int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
38 42
39/* 43/*
40 * Scheduler clock - returns current time in nanosec units. 44 * Scheduler clock - returns current time in nanosec units.
@@ -70,7 +74,6 @@ void do_gettimeofday(struct timeval *tv)
70 tv->tv_sec = sec; 74 tv->tv_sec = sec;
71 tv->tv_usec = usec; 75 tv->tv_usec = usec;
72} 76}
73
74EXPORT_SYMBOL(do_gettimeofday); 77EXPORT_SYMBOL(do_gettimeofday);
75 78
76int do_settimeofday(struct timespec *tv) 79int do_settimeofday(struct timespec *tv)
@@ -103,7 +106,6 @@ int do_settimeofday(struct timespec *tv)
103 106
104 return 0; 107 return 0;
105} 108}
106
107EXPORT_SYMBOL(do_settimeofday); 109EXPORT_SYMBOL(do_settimeofday);
108 110
109/* last time the RTC clock got updated */ 111/* last time the RTC clock got updated */
@@ -181,7 +183,6 @@ static int __init timer_init_sysfs(void)
181 sys_timer->dev.cls = &timer_sysclass; 183 sys_timer->dev.cls = &timer_sysclass;
182 return sysdev_register(&sys_timer->dev); 184 return sysdev_register(&sys_timer->dev);
183} 185}
184
185device_initcall(timer_init_sysfs); 186device_initcall(timer_init_sysfs);
186 187
187void (*board_time_init)(void); 188void (*board_time_init)(void);
@@ -193,15 +194,9 @@ void __init time_init(void)
193 194
194 clk_init(); 195 clk_init();
195 196
196 if (rtc_sh_get_time) { 197 rtc_sh_get_time(&xtime);
197 rtc_sh_get_time(&xtime); 198 set_normalized_timespec(&wall_to_monotonic,
198 } else { 199 -xtime.tv_sec, -xtime.tv_nsec);
199 xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
200 xtime.tv_nsec = 0;
201 }
202
203 set_normalized_timespec(&wall_to_monotonic,
204 -xtime.tv_sec, -xtime.tv_nsec);
205 200
206 /* 201 /*
207 * Find the timer to use as the system timer, it will be 202 * Find the timer to use as the system timer, it will be
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 52ea94b891f5..7f0d323b4725 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -739,7 +739,7 @@ config NVRAM
739 739
740config RTC 740config RTC
741 tristate "Enhanced Real Time Clock Support" 741 tristate "Enhanced Real Time Clock Support"
742 depends on !PPC && !PARISC && !IA64 && !M68K && (!SPARC || PCI) && !FRV && !ARM 742 depends on !PPC && !PARISC && !IA64 && !M68K && (!SPARC || PCI) && !FRV && !ARM && !SUPERH
743 ---help--- 743 ---help---
744 If you say Y here and create a character special file /dev/rtc with 744 If you say Y here and create a character special file /dev/rtc with
745 major number 10 and minor number 135 using mknod ("man mknod"), you 745 major number 10 and minor number 135 using mknod ("man mknod"), you
diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h
index adc6e67c6b75..0aee96a97330 100644
--- a/include/asm-sh/mc146818rtc.h
+++ b/include/asm-sh/mc146818rtc.h
@@ -4,173 +4,4 @@
4#ifndef _ASM_MC146818RTC_H 4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H 5#define _ASM_MC146818RTC_H
6 6
7#ifdef CONFIG_SH_MPC1211
8#undef _ASM_MC146818RTC_H
9#undef RTC_IRQ
10#include <asm/mpc1211/mc146818rtc.h>
11#else
12
13#include <asm/rtc.h>
14
15#define RTC_ALWAYS_BCD 1
16
17/* FIXME:RTC Interrupt feature is not implemented yet. */
18#undef RTC_IRQ
19#define RTC_IRQ 0
20
21#if defined(CONFIG_CPU_SH3)
22#define RTC_PORT(n) (R64CNT+(n)*2)
23#define CMOS_READ(addr) __CMOS_READ(addr,b)
24#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b)
25
26#elif defined(CONFIG_SH_SECUREEDGE5410)
27#include <asm/snapgear.h>
28
29#define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR
30#define CMOS_READ(addr) secureedge5410_cmos_read(addr)
31#define CMOS_WRITE(val,addr) secureedge5410_cmos_write(val,addr)
32extern unsigned char secureedge5410_cmos_read(int addr);
33extern void secureedge5410_cmos_write(unsigned char val, int addr);
34
35#elif defined(CONFIG_CPU_SH4)
36#define RTC_PORT(n) (R64CNT+(n)*4)
37#define CMOS_READ(addr) __CMOS_READ(addr,w)
38#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,w)
39#endif
40
41#define __CMOS_READ(addr, s) ({ \
42 unsigned char val=0, rcr1, rcr2, r64cnt, retry; \
43 switch(addr) { \
44 case RTC_SECONDS: \
45 val = ctrl_inb(RSECCNT); \
46 break; \
47 case RTC_SECONDS_ALARM: \
48 val = ctrl_inb(RSECAR); \
49 break; \
50 case RTC_MINUTES: \
51 val = ctrl_inb(RMINCNT); \
52 break; \
53 case RTC_MINUTES_ALARM: \
54 val = ctrl_inb(RMINAR); \
55 break; \
56 case RTC_HOURS: \
57 val = ctrl_inb(RHRCNT); \
58 break; \
59 case RTC_HOURS_ALARM: \
60 val = ctrl_inb(RHRAR); \
61 break; \
62 case RTC_DAY_OF_WEEK: \
63 val = ctrl_inb(RWKCNT); \
64 break; \
65 case RTC_DAY_OF_MONTH: \
66 val = ctrl_inb(RDAYCNT); \
67 break; \
68 case RTC_MONTH: \
69 val = ctrl_inb(RMONCNT); \
70 break; \
71 case RTC_YEAR: \
72 val = ctrl_in##s(RYRCNT); \
73 break; \
74 case RTC_REG_A: /* RTC_FREQ_SELECT */ \
75 rcr2 = ctrl_inb(RCR2); \
76 val = (rcr2 & RCR2_PESMASK) >> 4; \
77 rcr1 = ctrl_inb(RCR1); \
78 rcr1 = (rcr1 & (RCR1_CIE | RCR1_AIE)) | RCR1_AF;\
79 retry = 0; \
80 do { \
81 ctrl_outb(rcr1, RCR1); /* clear CF */ \
82 r64cnt = ctrl_inb(R64CNT); \
83 } while((ctrl_inb(RCR1) & RCR1_CF) && retry++ < 1000);\
84 r64cnt ^= RTC_BIT_INVERTED; \
85 if(r64cnt == 0x7f || r64cnt == 0) \
86 val |= RTC_UIP; \
87 break; \
88 case RTC_REG_B: /* RTC_CONTROL */ \
89 rcr1 = ctrl_inb(RCR1); \
90 rcr2 = ctrl_inb(RCR2); \
91 if(rcr1 & RCR1_CIE) val |= RTC_UIE; \
92 if(rcr1 & RCR1_AIE) val |= RTC_AIE; \
93 if(rcr2 & RCR2_PESMASK) val |= RTC_PIE; \
94 if(!(rcr2 & RCR2_START))val |= RTC_SET; \
95 val |= RTC_24H; \
96 break; \
97 case RTC_REG_C: /* RTC_INTR_FLAGS */ \
98 rcr1 = ctrl_inb(RCR1); \
99 rcr1 &= ~(RCR1_CF | RCR1_AF); \
100 ctrl_outb(rcr1, RCR1); \
101 rcr2 = ctrl_inb(RCR2); \
102 rcr2 &= ~RCR2_PEF; \
103 ctrl_outb(rcr2, RCR2); \
104 break; \
105 case RTC_REG_D: /* RTC_VALID */ \
106 /* Always valid ... */ \
107 val = RTC_VRT; \
108 break; \
109 default: \
110 break; \
111 } \
112 val; \
113})
114
115#define __CMOS_WRITE(val, addr, s) ({ \
116 unsigned char rcr1,rcr2; \
117 switch(addr) { \
118 case RTC_SECONDS: \
119 ctrl_outb(val, RSECCNT); \
120 break; \
121 case RTC_SECONDS_ALARM: \
122 ctrl_outb(val, RSECAR); \
123 break; \
124 case RTC_MINUTES: \
125 ctrl_outb(val, RMINCNT); \
126 break; \
127 case RTC_MINUTES_ALARM: \
128 ctrl_outb(val, RMINAR); \
129 break; \
130 case RTC_HOURS: \
131 ctrl_outb(val, RHRCNT); \
132 break; \
133 case RTC_HOURS_ALARM: \
134 ctrl_outb(val, RHRAR); \
135 break; \
136 case RTC_DAY_OF_WEEK: \
137 ctrl_outb(val, RWKCNT); \
138 break; \
139 case RTC_DAY_OF_MONTH: \
140 ctrl_outb(val, RDAYCNT); \
141 break; \
142 case RTC_MONTH: \
143 ctrl_outb(val, RMONCNT); \
144 break; \
145 case RTC_YEAR: \
146 ctrl_out##s((ctrl_in##s(RYRCNT) & 0xff00) | (val & 0xff), RYRCNT);\
147 break; \
148 case RTC_REG_A: /* RTC_FREQ_SELECT */ \
149 rcr2 = ctrl_inb(RCR2); \
150 if((val & RTC_DIV_CTL) == RTC_DIV_RESET2) \
151 rcr2 |= RCR2_RESET; \
152 ctrl_outb(rcr2, RCR2); \
153 break; \
154 case RTC_REG_B: /* RTC_CONTROL */ \
155 rcr1 = (ctrl_inb(RCR1) & 0x99) | RCR1_AF; \
156 if(val & RTC_AIE) rcr1 |= RCR1_AIE; \
157 else rcr1 &= ~RCR1_AIE; \
158 if(val & RTC_UIE) rcr1 |= RCR1_CIE; \
159 else rcr1 &= ~RCR1_CIE; \
160 ctrl_outb(rcr1, RCR1); \
161 rcr2 = ctrl_inb(RCR2); \
162 if(val & RTC_SET) rcr2 &= ~RCR2_START; \
163 else rcr2 |= RCR2_START; \
164 ctrl_outb(rcr2, RCR2); \
165 break; \
166 case RTC_REG_C: /* RTC_INTR_FLAGS */ \
167 break; \
168 case RTC_REG_D: /* RTC_VALID */ \
169 break; \
170 default: \
171 break; \
172 } \
173})
174
175#endif /* CONFIG_SH_MPC1211 */
176#endif /* _ASM_MC146818RTC_H */ 7#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h
index 4c7be859c9c0..91aacc96151b 100644
--- a/include/asm-sh/rtc.h
+++ b/include/asm-sh/rtc.h
@@ -1,29 +1,8 @@
1#ifndef _ASM_RTC_H 1#ifndef _ASM_RTC_H
2#define _ASM_RTC_H 2#define _ASM_RTC_H
3#ifdef __KERNEL__
4 3
5#include <asm/machvec.h>
6#include <asm/cpu/rtc.h>
7
8extern void sh_rtc_gettimeofday(struct timespec *ts);
9extern int sh_rtc_settimeofday(const time_t secs);
10extern void (*board_time_init)(void); 4extern void (*board_time_init)(void);
11extern void (*rtc_sh_get_time)(struct timespec *); 5extern void (*rtc_sh_get_time)(struct timespec *);
12extern int (*rtc_sh_set_time)(const time_t); 6extern int (*rtc_sh_set_time)(const time_t);
13 7
14/* RCR1 Bits */
15#define RCR1_CF 0x80 /* Carry Flag */
16#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
17#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
18#define RCR1_AF 0x01 /* Alarm Flag */
19
20/* RCR2 Bits */
21#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
22#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
23#define RCR2_RTCEN 0x08 /* ENable RTC */
24#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
25#define RCR2_RESET 0x02 /* Reset bit */
26#define RCR2_START 0x01 /* Start bit */
27
28#endif /* __KERNEL__ */
29#endif /* _ASM_RTC_H */ 8#endif /* _ASM_RTC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 13:52:36 -0500