diff options
134 files changed, 4873 insertions, 3955 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 1d2a772506cf..948f6417a40b 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt | |||
| @@ -57,7 +57,10 @@ Table of Contents | |||
| 57 | n) 4xx/Axon EMAC ethernet nodes | 57 | n) 4xx/Axon EMAC ethernet nodes |
| 58 | o) Xilinx IP cores | 58 | o) Xilinx IP cores |
| 59 | p) Freescale Synchronous Serial Interface | 59 | p) Freescale Synchronous Serial Interface |
| 60 | q) USB EHCI controllers | 60 | q) USB EHCI controllers |
| 61 | r) Freescale Display Interface Unit | ||
| 62 | s) Freescale on board FPGA | ||
| 63 | t) Freescael MSI interrupt controller | ||
| 61 | 64 | ||
| 62 | VII - Marvell Discovery mv64[345]6x System Controller chips | 65 | VII - Marvell Discovery mv64[345]6x System Controller chips |
| 63 | 1) The /system-controller node | 66 | 1) The /system-controller node |
| @@ -1360,14 +1363,11 @@ platforms are moved over to use the flattened-device-tree model. | |||
| 1360 | 1363 | ||
| 1361 | pic@40000 { | 1364 | pic@40000 { |
| 1362 | linux,phandle = <40000>; | 1365 | linux,phandle = <40000>; |
| 1363 | clock-frequency = <0>; | ||
| 1364 | interrupt-controller; | 1366 | interrupt-controller; |
| 1365 | #address-cells = <0>; | 1367 | #address-cells = <0>; |
| 1366 | reg = <40000 40000>; | 1368 | reg = <40000 40000>; |
| 1367 | built-in; | ||
| 1368 | compatible = "chrp,open-pic"; | 1369 | compatible = "chrp,open-pic"; |
| 1369 | device_type = "open-pic"; | 1370 | device_type = "open-pic"; |
| 1370 | big-endian; | ||
| 1371 | }; | 1371 | }; |
| 1372 | 1372 | ||
| 1373 | 1373 | ||
| @@ -2870,6 +2870,44 @@ platforms are moved over to use the flattened-device-tree model. | |||
| 2870 | reg = <0xe8000000 32>; | 2870 | reg = <0xe8000000 32>; |
| 2871 | }; | 2871 | }; |
| 2872 | 2872 | ||
| 2873 | t) Freescale MSI interrupt controller | ||
| 2874 | |||
| 2875 | Reguired properities: | ||
| 2876 | - compatible : compatible list, contains 2 entries, | ||
| 2877 | first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572, | ||
| 2878 | etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on | ||
| 2879 | the parent type. | ||
| 2880 | - reg : should contain the address and the length of the shared message | ||
| 2881 | interrupt register set. | ||
| 2882 | - msi-available-ranges: use <start count> style section to define which | ||
| 2883 | msi interrupt can be used in the 256 msi interrupts. This property is | ||
| 2884 | optional, without this, all the 256 MSI interrupts can be used. | ||
| 2885 | - interrupts : each one of the interrupts here is one entry per 32 MSIs, | ||
| 2886 | and routed to the host interrupt controller. the interrupts should | ||
| 2887 | be set as edge sensitive. | ||
| 2888 | - interrupt-parent: the phandle for the interrupt controller | ||
| 2889 | that services interrupts for this device. for 83xx cpu, the interrupts | ||
| 2890 | are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed | ||
| 2891 | to MPIC. | ||
| 2892 | |||
| 2893 | Example | ||
| 2894 | msi@41600 { | ||
| 2895 | compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; | ||
| 2896 | reg = <0x41600 0x80>; | ||
| 2897 | msi-available-ranges = <0 0x100>; | ||
| 2898 | interrupts = < | ||
| 2899 | 0xe0 0 | ||
| 2900 | 0xe1 0 | ||
| 2901 | 0xe2 0 | ||
| 2902 | 0xe3 0 | ||
| 2903 | 0xe4 0 | ||
| 2904 | 0xe5 0 | ||
| 2905 | 0xe6 0 | ||
| 2906 | 0xe7 0>; | ||
| 2907 | interrupt-parent = <&mpic>; | ||
| 2908 | }; | ||
| 2909 | |||
| 2910 | |||
| 2873 | VII - Marvell Discovery mv64[345]6x System Controller chips | 2911 | VII - Marvell Discovery mv64[345]6x System Controller chips |
| 2874 | =========================================================== | 2912 | =========================================================== |
| 2875 | 2913 | ||
| @@ -3622,14 +3660,11 @@ not necessary as they are usually the same as the root node. | |||
| 3622 | 3660 | ||
| 3623 | pic@40000 { | 3661 | pic@40000 { |
| 3624 | linux,phandle = <40000>; | 3662 | linux,phandle = <40000>; |
| 3625 | clock-frequency = <0>; | ||
| 3626 | interrupt-controller; | 3663 | interrupt-controller; |
| 3627 | #address-cells = <0>; | 3664 | #address-cells = <0>; |
| 3628 | reg = <40000 40000>; | 3665 | reg = <40000 40000>; |
| 3629 | built-in; | ||
| 3630 | compatible = "chrp,open-pic"; | 3666 | compatible = "chrp,open-pic"; |
| 3631 | device_type = "open-pic"; | 3667 | device_type = "open-pic"; |
| 3632 | big-endian; | ||
| 3633 | }; | 3668 | }; |
| 3634 | 3669 | ||
| 3635 | i2c@3000 { | 3670 | i2c@3000 { |
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index d53b84e761a9..c3585bed1970 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
| @@ -66,7 +66,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c | |||
| 66 | fixed-head.S ep88xc.c ep405.c \ | 66 | fixed-head.S ep88xc.c ep405.c \ |
| 67 | cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ | 67 | cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ |
| 68 | cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ | 68 | cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ |
| 69 | virtex405-head.S | 69 | virtex405-head.S redboot-83xx.c |
| 70 | src-boot := $(src-wlib) $(src-plat) empty.c | 70 | src-boot := $(src-wlib) $(src-plat) empty.c |
| 71 | 71 | ||
| 72 | src-boot := $(addprefix $(obj)/, $(src-boot)) | 72 | src-boot := $(addprefix $(obj)/, $(src-boot)) |
| @@ -242,6 +242,7 @@ image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \ | |||
| 242 | cuImage.mpc8349emitxgp | 242 | cuImage.mpc8349emitxgp |
| 243 | image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds | 243 | image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds |
| 244 | image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds | 244 | image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds |
| 245 | image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot | ||
| 245 | 246 | ||
| 246 | # Board ports in arch/powerpc/platform/85xx/Kconfig | 247 | # Board ports in arch/powerpc/platform/85xx/Kconfig |
| 247 | image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads | 248 | image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads |
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c index eb108a877492..21780210057d 100644 --- a/arch/powerpc/boot/cuboot-warp.c +++ b/arch/powerpc/boot/cuboot-warp.c | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | #include "ops.h" | 10 | #include "ops.h" |
| 11 | #include "4xx.h" | 11 | #include "4xx.h" |
| 12 | #include "cuboot.h" | 12 | #include "cuboot.h" |
| 13 | #include "stdio.h" | ||
| 13 | 14 | ||
| 14 | #define TARGET_4xx | 15 | #define TARGET_4xx |
| 15 | #define TARGET_44x | 16 | #define TARGET_44x |
| @@ -17,14 +18,54 @@ | |||
| 17 | 18 | ||
| 18 | static bd_t bd; | 19 | static bd_t bd; |
| 19 | 20 | ||
| 20 | static void warp_fixups(void) | 21 | static void warp_fixup_one_nor(u32 from, u32 to) |
| 21 | { | 22 | { |
| 22 | unsigned long sysclk = 66000000; | 23 | void *devp; |
| 24 | char name[50]; | ||
| 25 | u32 v[2]; | ||
| 26 | |||
| 27 | sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from); | ||
| 28 | |||
| 29 | devp = finddevice(name); | ||
| 30 | if (!devp) | ||
| 31 | return; | ||
| 32 | |||
| 33 | if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { | ||
| 34 | v[0] = to; | ||
| 35 | setprop(devp, "reg", v, sizeof(v)); | ||
| 36 | |||
| 37 | printf("NOR 64M fixup %x -> %x\r\n", from, to); | ||
| 38 | } | ||
| 39 | } | ||
| 40 | |||
| 23 | 41 | ||
| 24 | ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); | 42 | static void warp_fixups(void) |
| 43 | { | ||
| 44 | ibm440ep_fixup_clocks(66000000, 11059200, 50000000); | ||
| 25 | ibm4xx_sdram_fixup_memsize(); | 45 | ibm4xx_sdram_fixup_memsize(); |
| 26 | ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); | 46 | ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); |
| 27 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); | 47 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); |
| 48 | |||
| 49 | /* Fixup for 64M flash on Rev A boards. */ | ||
| 50 | if (bd.bi_flashsize == 0x4000000) { | ||
| 51 | void *devp; | ||
| 52 | u32 v[3]; | ||
| 53 | |||
| 54 | devp = finddevice("/plb/opb/ebc/nor_flash@0,0"); | ||
| 55 | if (!devp) | ||
| 56 | return; | ||
| 57 | |||
| 58 | /* Fixup the size */ | ||
| 59 | if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { | ||
| 60 | v[2] = bd.bi_flashsize; | ||
| 61 | setprop(devp, "reg", v, sizeof(v)); | ||
| 62 | } | ||
| 63 | |||
| 64 | /* Fixup parition offsets */ | ||
| 65 | warp_fixup_one_nor(0x300000, 0x3f00000); | ||
| 66 | warp_fixup_one_nor(0x340000, 0x3f40000); | ||
| 67 | warp_fixup_one_nor(0x380000, 0x3f80000); | ||
| 68 | } | ||
| 28 | } | 69 | } |
| 29 | 70 | ||
| 30 | 71 | ||
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts new file mode 100644 index 000000000000..972cf78fff65 --- /dev/null +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts | |||
| @@ -0,0 +1,247 @@ | |||
| 1 | /* | ||
| 2 | * Analogue & Micro ASP8347 Device Tree Source | ||
| 3 | * | ||
| 4 | * Copyright 2008 Codehermit | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify it | ||
| 7 | * under the terms of the GNU General Public License as published by the | ||
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 9 | * option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | /dts-v1/; | ||
| 13 | |||
| 14 | / { | ||
| 15 | model = "Analogue & Micro ASP8347E"; | ||
| 16 | compatible = "analogue-and-micro,asp8347e"; | ||
| 17 | #address-cells = <1>; | ||
| 18 | #size-cells = <1>; | ||
| 19 | |||
| 20 | aliases { | ||
| 21 | ethernet0 = &enet0; | ||
| 22 | ethernet1 = &enet1; | ||
| 23 | serial0 = &serial0; | ||
| 24 | serial1 = &serial1; | ||
| 25 | }; | ||
| 26 | |||
| 27 | cpus { | ||
| 28 | #address-cells = <1>; | ||
| 29 | #size-cells = <0>; | ||
| 30 | |||
| 31 | PowerPC,8347@0 { | ||
| 32 | device_type = "cpu"; | ||
| 33 | reg = <0x0>; | ||
| 34 | d-cache-line-size = <32>; | ||
| 35 | i-cache-line-size = <32>; | ||
| 36 | d-cache-size = <32768>; | ||
| 37 | i-cache-size = <32768>; | ||
| 38 | timebase-frequency = <0>; // from bootloader | ||
| 39 | bus-frequency = <0>; // from bootloader | ||
| 40 | clock-frequency = <0>; // from bootloader | ||
| 41 | }; | ||
| 42 | }; | ||
| 43 | |||
| 44 | memory { | ||
| 45 | device_type = "memory"; | ||
| 46 | reg = <0x00000000 0x8000000>; // 128MB at 0 | ||
| 47 | }; | ||
| 48 | |||
| 49 | localbus@ff005000 { | ||
| 50 | #address-cells = <2>; | ||
| 51 | #size-cells = <1>; | ||
| 52 | compatible = "fsl,mpc8347e-localbus", | ||
| 53 | "fsl,pq2pro-localbus", | ||
| 54 | "simple-bus"; | ||
| 55 | reg = <0xff005000 0x1000>; | ||
| 56 | interrupts = <77 0x8>; | ||
| 57 | interrupt-parent = <&ipic>; | ||
| 58 | |||
| 59 | ranges = < | ||
| 60 | 0 0 0xf0000000 0x02000000 | ||
| 61 | >; | ||
| 62 | |||
| 63 | flash@0,0 { | ||
| 64 | compatible = "cfi-flash"; | ||
| 65 | reg = <0 0 0x02000000>; | ||
| 66 | bank-width = <2>; | ||
| 67 | device-width = <2>; | ||
| 68 | }; | ||
| 69 | }; | ||
| 70 | |||
| 71 | soc8349@ff000000 { | ||
| 72 | #address-cells = <1>; | ||
| 73 | #size-cells = <1>; | ||
| 74 | device_type = "soc"; | ||
| 75 | ranges = <0x0 0xff000000 0x00100000>; | ||
| 76 | reg = <0xff000000 0x00000200>; | ||
| 77 | bus-frequency = <0>; | ||
| 78 | |||
| 79 | wdt@200 { | ||
| 80 | device_type = "watchdog"; | ||
| 81 | compatible = "mpc83xx_wdt"; | ||
| 82 | reg = <0x200 0x100>; | ||
| 83 | }; | ||
| 84 | |||
| 85 | i2c@3000 { | ||
| 86 | #address-cells = <1>; | ||
| 87 | #size-cells = <0>; | ||
| 88 | cell-index = <0>; | ||
| 89 | compatible = "fsl-i2c"; | ||
| 90 | reg = <0x3000 0x100>; | ||
| 91 | interrupts = <14 0x8>; | ||
| 92 | interrupt-parent = <&ipic>; | ||
| 93 | dfsrr; | ||
| 94 | |||
| 95 | rtc@68 { | ||
| 96 | compatible = "dallas,ds1374"; | ||
| 97 | reg = <0x68>; | ||
| 98 | }; | ||
| 99 | }; | ||
| 100 | |||
| 101 | i2c@3100 { | ||
| 102 | #address-cells = <1>; | ||
| 103 | #size-cells = <0>; | ||
| 104 | cell-index = <1>; | ||
| 105 | compatible = "fsl-i2c"; | ||
| 106 | reg = <0x3100 0x100>; | ||
| 107 | interrupts = <15 0x8>; | ||
| 108 | interrupt-parent = <&ipic>; | ||
| 109 | dfsrr; | ||
| 110 | }; | ||
| 111 | |||
| 112 | spi@7000 { | ||
| 113 | cell-index = <0>; | ||
| 114 | compatible = "fsl,spi"; | ||
| 115 | reg = <0x7000 0x1000>; | ||
| 116 | interrupts = <16 0x8>; | ||
| 117 | interrupt-parent = <&ipic>; | ||
| 118 | mode = "cpu"; | ||
| 119 | }; | ||
| 120 | |||
| 121 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ | ||
| 122 | /* port = 0 or 1 */ | ||
| 123 | usb@22000 { | ||
| 124 | compatible = "fsl-usb2-mph"; | ||
| 125 | reg = <0x22000 0x1000>; | ||
| 126 | #address-cells = <1>; | ||
| 127 | #size-cells = <0>; | ||
| 128 | interrupt-parent = <&ipic>; | ||
| 129 | interrupts = <39 0x8>; | ||
| 130 | phy_type = "ulpi"; | ||
| 131 | port1; | ||
| 132 | }; | ||
| 133 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | ||
| 134 | usb@23000 { | ||
| 135 | compatible = "fsl-usb2-dr"; | ||
| 136 | reg = <0x23000 0x1000>; | ||
| 137 | #address-cells = <1>; | ||
| 138 | #size-cells = <0>; | ||
| 139 | interrupt-parent = <&ipic>; | ||
| 140 | interrupts = <38 0x8>; | ||
| 141 | dr_mode = "otg"; | ||
| 142 | phy_type = "ulpi"; | ||
| 143 | }; | ||
| 144 | |||
| 145 | mdio@24520 { | ||
| 146 | #address-cells = <1>; | ||
| 147 | #size-cells = <0>; | ||
| 148 | compatible = "fsl,gianfar-mdio"; | ||
| 149 | reg = <0x24520 0x20>; | ||
| 150 | |||
| 151 | phy0: ethernet-phy@0 { | ||
| 152 | interrupt-parent = <&ipic>; | ||
| 153 | interrupts = <17 0x8>; | ||
| 154 | reg = <0x1>; | ||
| 155 | device_type = "ethernet-phy"; | ||
| 156 | }; | ||
| 157 | phy1: ethernet-phy@1 { | ||
| 158 | interrupt-parent = <&ipic>; | ||
| 159 | interrupts = <18 0x8>; | ||
| 160 | reg = <0x2>; | ||
| 161 | device_type = "ethernet-phy"; | ||
| 162 | }; | ||
| 163 | }; | ||
| 164 | |||
| 165 | enet0: ethernet@24000 { | ||
| 166 | cell-index = <0>; | ||
| 167 | device_type = "network"; | ||
| 168 | model = "TSEC"; | ||
| 169 | compatible = "gianfar"; | ||
| 170 | reg = <0x24000 0x1000>; | ||
| 171 | local-mac-address = [ 00 08 e5 11 32 33 ]; | ||
| 172 | interrupts = <32 0x8 33 0x8 34 0x8>; | ||
| 173 | interrupt-parent = <&ipic>; | ||
| 174 | phy-handle = <&phy0>; | ||
| 175 | linux,network-index = <0>; | ||
| 176 | }; | ||
| 177 | |||
| 178 | enet1: ethernet@25000 { | ||
| 179 | cell-index = <1>; | ||
| 180 | device_type = "network"; | ||
| 181 | model = "TSEC"; | ||
| 182 | compatible = "gianfar"; | ||
| 183 | reg = <0x25000 0x1000>; | ||
| 184 | local-mac-address = [ 00 08 e5 11 32 34 ]; | ||
| 185 | interrupts = <35 0x8 36 0x8 37 0x8>; | ||
| 186 | interrupt-parent = <&ipic>; | ||
| 187 | phy-handle = <&phy1>; | ||
| 188 | linux,network-index = <1>; | ||
| 189 | }; | ||
| 190 | |||
| 191 | serial0: serial@4500 { | ||
| 192 | cell-index = <0>; | ||
| 193 | device_type = "serial"; | ||
| 194 | compatible = "ns16550"; | ||
| 195 | reg = <0x4500 0x100>; | ||
| 196 | clock-frequency = <400000000>; | ||
| 197 | interrupts = <9 0x8>; | ||
| 198 | interrupt-parent = <&ipic>; | ||
| 199 | }; | ||
| 200 | |||
| 201 | serial1: serial@4600 { | ||
| 202 | cell-index = <1>; | ||
| 203 | device_type = "serial"; | ||
| 204 | compatible = "ns16550"; | ||
| 205 | reg = <0x4600 0x100>; | ||
| 206 | clock-frequency = <400000000>; | ||
| 207 | interrupts = <10 0x8>; | ||
| 208 | interrupt-parent = <&ipic>; | ||
| 209 | }; | ||
| 210 | |||
| 211 | /* May need to remove if on a part without crypto engine */ | ||
| 212 | crypto@30000 { | ||
| 213 | device_type = "crypto"; | ||
| 214 | model = "SEC2"; | ||
| 215 | compatible = "talitos"; | ||
| 216 | reg = <0x30000 0x10000>; | ||
| 217 | interrupts = <11 0x8>; | ||
| 218 | interrupt-parent = <&ipic>; | ||
| 219 | num-channels = <4>; | ||
| 220 | channel-fifo-len = <24>; | ||
| 221 | exec-units-mask = <0x0000007e>; | ||
| 222 | /* desc mask is for rev2.0, | ||
| 223 | * we need runtime fixup for >2.0 */ | ||
| 224 | descriptor-types-mask = <0x01010ebf>; | ||
| 225 | }; | ||
| 226 | |||
| 227 | /* IPIC | ||
| 228 | * interrupts cell = <intr #, sense> | ||
| 229 | * sense values match linux IORESOURCE_IRQ_* defines: | ||
| 230 | * sense == 8: Level, low assertion | ||
| 231 | * sense == 2: Edge, high-to-low change | ||
| 232 | */ | ||
| 233 | ipic: pic@700 { | ||
| 234 | interrupt-controller; | ||
| 235 | #address-cells = <0>; | ||
| 236 | #interrupt-cells = <2>; | ||
| 237 | reg = <0x700 0x100>; | ||
| 238 | device_type = "ipic"; | ||
| 239 | }; | ||
| 240 | }; | ||
| 241 | |||
| 242 | chosen { | ||
| 243 | bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2"; | ||
| 244 | linux,stdout-path = &serial0; | ||
| 245 | }; | ||
| 246 | |||
| 247 | }; | ||
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts index ba2521bdaab1..6ce0cc2c0208 100644 --- a/arch/powerpc/boot/dts/bamboo.dts +++ b/arch/powerpc/boot/dts/bamboo.dts | |||
| @@ -11,12 +11,14 @@ | |||
| 11 | * any warranty of any kind, whether express or implied. | 11 | * any warranty of any kind, whether express or implied. |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | /dts-v1/; | ||
| 15 | |||
| 14 | / { | 16 | / { |
| 15 | #address-cells = <2>; | 17 | #address-cells = <2>; |
| 16 | #size-cells = <1>; | 18 | #size-cells = <1>; |
| 17 | model = "amcc,bamboo"; | 19 | model = "amcc,bamboo"; |
| 18 | compatible = "amcc,bamboo"; | 20 | compatible = "amcc,bamboo"; |
| 19 | dcr-parent = <&/cpus/cpu@0>; | 21 | dcr-parent = <&{/cpus/cpu@0}>; |
| 20 | 22 | ||
| 21 | aliases { | 23 | aliases { |
| 22 | ethernet0 = &EMAC0; | 24 | ethernet0 = &EMAC0; |
| @@ -34,13 +36,13 @@ | |||
| 34 | cpu@0 { | 36 | cpu@0 { |
| 35 | device_type = "cpu"; | 37 | device_type = "cpu"; |
| 36 | model = "PowerPC,440EP"; | 38 | model = "PowerPC,440EP"; |
| 37 | reg = <0>; | 39 | reg = <0x00000000>; |
| 38 | clock-frequency = <0>; /* Filled in by zImage */ | 40 | clock-frequency = <0>; /* Filled in by zImage */ |
| 39 | timebase-frequency = <0>; /* Filled in by zImage */ | 41 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 40 | i-cache-line-size = <20>; | 42 | i-cache-line-size = <32>; |
| 41 | d-cache-line-size = <20>; | 43 | d-cache-line-size = <32>; |
| 42 | i-cache-size = <8000>; | 44 | i-cache-size = <32768>; |
| 43 | d-cache-size = <8000>; | 45 | d-cache-size = <32768>; |
| 44 | dcr-controller; | 46 | dcr-controller; |
| 45 | dcr-access-method = "native"; | 47 | dcr-access-method = "native"; |
| 46 | }; | 48 | }; |
| @@ -48,14 +50,14 @@ | |||
| 48 | 50 | ||
| 49 | memory { | 51 | memory { |
| 50 | device_type = "memory"; | 52 | device_type = "memory"; |
| 51 | reg = <0 0 0>; /* Filled in by zImage */ | 53 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
| 52 | }; | 54 | }; |
| 53 | 55 | ||
| 54 | UIC0: interrupt-controller0 { | 56 | UIC0: interrupt-controller0 { |
| 55 | compatible = "ibm,uic-440ep","ibm,uic"; | 57 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 56 | interrupt-controller; | 58 | interrupt-controller; |
| 57 | cell-index = <0>; | 59 | cell-index = <0>; |
| 58 | dcr-reg = <0c0 009>; | 60 | dcr-reg = <0x0c0 0x009>; |
| 59 | #address-cells = <0>; | 61 | #address-cells = <0>; |
| 60 | #size-cells = <0>; | 62 | #size-cells = <0>; |
| 61 | #interrupt-cells = <2>; | 63 | #interrupt-cells = <2>; |
| @@ -65,22 +67,22 @@ | |||
| 65 | compatible = "ibm,uic-440ep","ibm,uic"; | 67 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 66 | interrupt-controller; | 68 | interrupt-controller; |
| 67 | cell-index = <1>; | 69 | cell-index = <1>; |
| 68 | dcr-reg = <0d0 009>; | 70 | dcr-reg = <0x0d0 0x009>; |
| 69 | #address-cells = <0>; | 71 | #address-cells = <0>; |
| 70 | #size-cells = <0>; | 72 | #size-cells = <0>; |
| 71 | #interrupt-cells = <2>; | 73 | #interrupt-cells = <2>; |
| 72 | interrupts = <1e 4 1f 4>; /* cascade */ | 74 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 73 | interrupt-parent = <&UIC0>; | 75 | interrupt-parent = <&UIC0>; |
| 74 | }; | 76 | }; |
| 75 | 77 | ||
| 76 | SDR0: sdr { | 78 | SDR0: sdr { |
| 77 | compatible = "ibm,sdr-440ep"; | 79 | compatible = "ibm,sdr-440ep"; |
| 78 | dcr-reg = <00e 002>; | 80 | dcr-reg = <0x00e 0x002>; |
| 79 | }; | 81 | }; |
| 80 | 82 | ||
| 81 | CPR0: cpr { | 83 | CPR0: cpr { |
| 82 | compatible = "ibm,cpr-440ep"; | 84 | compatible = "ibm,cpr-440ep"; |
| 83 | dcr-reg = <00c 002>; | 85 | dcr-reg = <0x00c 0x002>; |
| 84 | }; | 86 | }; |
| 85 | 87 | ||
| 86 | plb { | 88 | plb { |
| @@ -92,29 +94,29 @@ | |||
| 92 | 94 | ||
| 93 | SDRAM0: sdram { | 95 | SDRAM0: sdram { |
| 94 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 96 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
| 95 | dcr-reg = <010 2>; | 97 | dcr-reg = <0x010 0x002>; |
| 96 | }; | 98 | }; |
| 97 | 99 | ||
| 98 | DMA0: dma { | 100 | DMA0: dma { |
| 99 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 101 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
| 100 | dcr-reg = <100 027>; | 102 | dcr-reg = <0x100 0x027>; |
| 101 | }; | 103 | }; |
| 102 | 104 | ||
| 103 | MAL0: mcmal { | 105 | MAL0: mcmal { |
| 104 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 106 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
| 105 | dcr-reg = <180 62>; | 107 | dcr-reg = <0x180 0x062>; |
| 106 | num-tx-chans = <4>; | 108 | num-tx-chans = <4>; |
| 107 | num-rx-chans = <2>; | 109 | num-rx-chans = <2>; |
| 108 | interrupt-parent = <&MAL0>; | 110 | interrupt-parent = <&MAL0>; |
| 109 | interrupts = <0 1 2 3 4>; | 111 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 110 | #interrupt-cells = <1>; | 112 | #interrupt-cells = <1>; |
| 111 | #address-cells = <0>; | 113 | #address-cells = <0>; |
| 112 | #size-cells = <0>; | 114 | #size-cells = <0>; |
| 113 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 115 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 114 | /*RXEOB*/ 1 &UIC0 b 4 | 116 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 115 | /*SERR*/ 2 &UIC1 0 4 | 117 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 116 | /*TXDE*/ 3 &UIC1 1 4 | 118 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 117 | /*RXDE*/ 4 &UIC1 2 4>; | 119 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 118 | }; | 120 | }; |
| 119 | 121 | ||
| 120 | POB0: opb { | 122 | POB0: opb { |
| @@ -124,101 +126,101 @@ | |||
| 124 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | 126 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN |
| 125 | * bits. | 127 | * bits. |
| 126 | */ | 128 | */ |
| 127 | ranges = <00000000 0 00000000 80000000 | 129 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
| 128 | 80000000 0 80000000 80000000>; | 130 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
| 129 | interrupt-parent = <&UIC1>; | 131 | interrupt-parent = <&UIC1>; |
| 130 | interrupts = <7 4>; | 132 | interrupts = <0x7 0x4>; |
| 131 | clock-frequency = <0>; /* Filled in by zImage */ | 133 | clock-frequency = <0>; /* Filled in by zImage */ |
| 132 | 134 | ||
| 133 | EBC0: ebc { | 135 | EBC0: ebc { |
| 134 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 136 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
| 135 | dcr-reg = <012 2>; | 137 | dcr-reg = <0x012 0x002>; |
| 136 | #address-cells = <2>; | 138 | #address-cells = <2>; |
| 137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
| 138 | clock-frequency = <0>; /* Filled in by zImage */ | 140 | clock-frequency = <0>; /* Filled in by zImage */ |
| 139 | interrupts = <5 1>; | 141 | interrupts = <0x5 0x1>; |
| 140 | interrupt-parent = <&UIC1>; | 142 | interrupt-parent = <&UIC1>; |
| 141 | }; | 143 | }; |
| 142 | 144 | ||
| 143 | UART0: serial@ef600300 { | 145 | UART0: serial@ef600300 { |
| 144 | device_type = "serial"; | 146 | device_type = "serial"; |
| 145 | compatible = "ns16550"; | 147 | compatible = "ns16550"; |
| 146 | reg = <ef600300 8>; | 148 | reg = <0xef600300 0x00000008>; |
| 147 | virtual-reg = <ef600300>; | 149 | virtual-reg = <0xef600300>; |
| 148 | clock-frequency = <0>; /* Filled in by zImage */ | 150 | clock-frequency = <0>; /* Filled in by zImage */ |
| 149 | current-speed = <1c200>; | 151 | current-speed = <115200>; |
| 150 | interrupt-parent = <&UIC0>; | 152 | interrupt-parent = <&UIC0>; |
| 151 | interrupts = <0 4>; | 153 | interrupts = <0x0 0x4>; |
| 152 | }; | 154 | }; |
| 153 | 155 | ||
| 154 | UART1: serial@ef600400 { | 156 | UART1: serial@ef600400 { |
| 155 | device_type = "serial"; | 157 | device_type = "serial"; |
| 156 | compatible = "ns16550"; | 158 | compatible = "ns16550"; |
| 157 | reg = <ef600400 8>; | 159 | reg = <0xef600400 0x00000008>; |
| 158 | virtual-reg = <ef600400>; | 160 | virtual-reg = <0xef600400>; |
| 159 | clock-frequency = <0>; | 161 | clock-frequency = <0>; |
| 160 | current-speed = <0>; | 162 | current-speed = <0>; |
| 161 | interrupt-parent = <&UIC0>; | 163 | interrupt-parent = <&UIC0>; |
| 162 | interrupts = <1 4>; | 164 | interrupts = <0x1 0x4>; |
| 163 | }; | 165 | }; |
| 164 | 166 | ||
| 165 | UART2: serial@ef600500 { | 167 | UART2: serial@ef600500 { |
| 166 | device_type = "serial"; | 168 | device_type = "serial"; |
| 167 | compatible = "ns16550"; | 169 | compatible = "ns16550"; |
| 168 | reg = <ef600500 8>; | 170 | reg = <0xef600500 0x00000008>; |
| 169 | virtual-reg = <ef600500>; | 171 | virtual-reg = <0xef600500>; |
| 170 | clock-frequency = <0>; | 172 | clock-frequency = <0>; |
| 171 | current-speed = <0>; | 173 | current-speed = <0>; |
| 172 | interrupt-parent = <&UIC0>; | 174 | interrupt-parent = <&UIC0>; |
| 173 | interrupts = <3 4>; | 175 | interrupts = <0x3 0x4>; |
| 174 | }; | 176 | }; |
| 175 | 177 | ||
| 176 | UART3: serial@ef600600 { | 178 | UART3: serial@ef600600 { |
| 177 | device_type = "serial"; | 179 | device_type = "serial"; |
| 178 | compatible = "ns16550"; | 180 | compatible = "ns16550"; |
| 179 | reg = <ef600600 8>; | 181 | reg = <0xef600600 0x00000008>; |
| 180 | virtual-reg = <ef600600>; | 182 | virtual-reg = <0xef600600>; |
| 181 | clock-frequency = <0>; | 183 | clock-frequency = <0>; |
| 182 | current-speed = <0>; | 184 | current-speed = <0>; |
| 183 | interrupt-parent = <&UIC0>; | 185 | interrupt-parent = <&UIC0>; |
| 184 | interrupts = <4 4>; | 186 | interrupts = <0x4 0x4>; |
| 185 | }; | 187 | }; |
| 186 | 188 | ||
| 187 | IIC0: i2c@ef600700 { | 189 | IIC0: i2c@ef600700 { |
| 188 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 190 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 189 | reg = <ef600700 14>; | 191 | reg = <0xef600700 0x00000014>; |
| 190 | interrupt-parent = <&UIC0>; | 192 | interrupt-parent = <&UIC0>; |
| 191 | interrupts = <2 4>; | 193 | interrupts = <0x2 0x4>; |
| 192 | }; | 194 | }; |
| 193 | 195 | ||
| 194 | IIC1: i2c@ef600800 { | 196 | IIC1: i2c@ef600800 { |
| 195 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 197 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 196 | reg = <ef600800 14>; | 198 | reg = <0xef600800 0x00000014>; |
| 197 | interrupt-parent = <&UIC0>; | 199 | interrupt-parent = <&UIC0>; |
| 198 | interrupts = <7 4>; | 200 | interrupts = <0x7 0x4>; |
| 199 | }; | 201 | }; |
| 200 | 202 | ||
| 201 | ZMII0: emac-zmii@ef600d00 { | 203 | ZMII0: emac-zmii@ef600d00 { |
| 202 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 204 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
| 203 | reg = <ef600d00 c>; | 205 | reg = <0xef600d00 0x0000000c>; |
| 204 | }; | 206 | }; |
| 205 | 207 | ||
| 206 | EMAC0: ethernet@ef600e00 { | 208 | EMAC0: ethernet@ef600e00 { |
| 207 | device_type = "network"; | 209 | device_type = "network"; |
| 208 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 210 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 209 | interrupt-parent = <&UIC1>; | 211 | interrupt-parent = <&UIC1>; |
| 210 | interrupts = <1c 4 1d 4>; | 212 | interrupts = <0x1c 0x4 0x1d 0x4>; |
| 211 | reg = <ef600e00 70>; | 213 | reg = <0xef600e00 0x00000070>; |
| 212 | local-mac-address = [000000000000]; | 214 | local-mac-address = [000000000000]; |
| 213 | mal-device = <&MAL0>; | 215 | mal-device = <&MAL0>; |
| 214 | mal-tx-channel = <0 1>; | 216 | mal-tx-channel = <0 1>; |
| 215 | mal-rx-channel = <0>; | 217 | mal-rx-channel = <0>; |
| 216 | cell-index = <0>; | 218 | cell-index = <0>; |
| 217 | max-frame-size = <5dc>; | 219 | max-frame-size = <1500>; |
| 218 | rx-fifo-size = <1000>; | 220 | rx-fifo-size = <4096>; |
| 219 | tx-fifo-size = <800>; | 221 | tx-fifo-size = <2048>; |
| 220 | phy-mode = "rmii"; | 222 | phy-mode = "rmii"; |
| 221 | phy-map = <00000000>; | 223 | phy-map = <0x00000000>; |
| 222 | zmii-device = <&ZMII0>; | 224 | zmii-device = <&ZMII0>; |
| 223 | zmii-channel = <0>; | 225 | zmii-channel = <0>; |
| 224 | }; | 226 | }; |
| @@ -227,26 +229,26 @@ | |||
| 227 | device_type = "network"; | 229 | device_type = "network"; |
| 228 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 230 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 229 | interrupt-parent = <&UIC1>; | 231 | interrupt-parent = <&UIC1>; |
| 230 | interrupts = <1e 4 1f 4>; | 232 | interrupts = <0x1e 0x4 0x1f 0x4>; |
| 231 | reg = <ef600f00 70>; | 233 | reg = <0xef600f00 0x00000070>; |
| 232 | local-mac-address = [000000000000]; | 234 | local-mac-address = [000000000000]; |
| 233 | mal-device = <&MAL0>; | 235 | mal-device = <&MAL0>; |
| 234 | mal-tx-channel = <2 3>; | 236 | mal-tx-channel = <2 3>; |
| 235 | mal-rx-channel = <1>; | 237 | mal-rx-channel = <1>; |
| 236 | cell-index = <1>; | 238 | cell-index = <1>; |
| 237 | max-frame-size = <5dc>; | 239 | max-frame-size = <1500>; |
| 238 | rx-fifo-size = <1000>; | 240 | rx-fifo-size = <4096>; |
| 239 | tx-fifo-size = <800>; | 241 | tx-fifo-size = <2048>; |
| 240 | phy-mode = "rmii"; | 242 | phy-mode = "rmii"; |
| 241 | phy-map = <00000000>; | 243 | phy-map = <0x00000000>; |
| 242 | zmii-device = <&ZMII0>; | 244 | zmii-device = <&ZMII0>; |
| 243 | zmii-channel = <1>; | 245 | zmii-channel = <1>; |
| 244 | }; | 246 | }; |
| 245 | 247 | ||
| 246 | usb@ef601000 { | 248 | usb@ef601000 { |
| 247 | compatible = "ohci-be"; | 249 | compatible = "ohci-be"; |
| 248 | reg = <ef601000 80>; | 250 | reg = <0xef601000 0x00000080>; |
| 249 | interrupts = <8 1 9 1>; | 251 | interrupts = <0x8 0x1 0x9 0x1>; |
| 250 | interrupt-parent = < &UIC1 >; | 252 | interrupt-parent = < &UIC1 >; |
| 251 | }; | 253 | }; |
| 252 | }; | 254 | }; |
| @@ -258,35 +260,35 @@ | |||
| 258 | #address-cells = <3>; | 260 | #address-cells = <3>; |
| 259 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | 261 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; |
| 260 | primary; | 262 | primary; |
| 261 | reg = <0 eec00000 8 /* Config space access */ | 263 | reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ |
| 262 | 0 eed00000 4 /* IACK */ | 264 | 0x00000000 0xeed00000 0x00000004 /* IACK */ |
| 263 | 0 eed00000 4 /* Special cycle */ | 265 | 0x00000000 0xeed00000 0x00000004 /* Special cycle */ |
| 264 | 0 ef400000 40>; /* Internal registers */ | 266 | 0x00000000 0xef400000 0x00000040>; /* Internal registers */ |
| 265 | 267 | ||
| 266 | /* Outbound ranges, one memory and one IO, | 268 | /* Outbound ranges, one memory and one IO, |
| 267 | * later cannot be changed. Chip supports a second | 269 | * later cannot be changed. Chip supports a second |
| 268 | * IO range but we don't use it for now | 270 | * IO range but we don't use it for now |
| 269 | */ | 271 | */ |
| 270 | ranges = <02000000 0 a0000000 0 a0000000 0 20000000 | 272 | ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 |
| 271 | 01000000 0 00000000 0 e8000000 0 00010000>; | 273 | 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
| 272 | 274 | ||
| 273 | /* Inbound 2GB range starting at 0 */ | 275 | /* Inbound 2GB range starting at 0 */ |
| 274 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 276 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 275 | 277 | ||
| 276 | /* Bamboo has all 4 IRQ pins tied together per slot */ | 278 | /* Bamboo has all 4 IRQ pins tied together per slot */ |
| 277 | interrupt-map-mask = <f800 0 0 0>; | 279 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
| 278 | interrupt-map = < | 280 | interrupt-map = < |
| 279 | /* IDSEL 1 */ | 281 | /* IDSEL 1 */ |
| 280 | 0800 0 0 0 &UIC0 1c 8 | 282 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
| 281 | 283 | ||
| 282 | /* IDSEL 2 */ | 284 | /* IDSEL 2 */ |
| 283 | 1000 0 0 0 &UIC0 1b 8 | 285 | 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 |
| 284 | 286 | ||
| 285 | /* IDSEL 3 */ | 287 | /* IDSEL 3 */ |
| 286 | 1800 0 0 0 &UIC0 1a 8 | 288 | 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
| 287 | 289 | ||
| 288 | /* IDSEL 4 */ | 290 | /* IDSEL 4 */ |
| 289 | 2000 0 0 0 &UIC0 19 8 | 291 | 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 |
| 290 | >; | 292 | >; |
| 291 | }; | 293 | }; |
| 292 | }; | 294 | }; |
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 39634124929b..f9fe03252150 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts | |||
| @@ -8,12 +8,14 @@ | |||
| 8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | /dts-v1/; | ||
| 12 | |||
| 11 | / { | 13 | / { |
| 12 | #address-cells = <2>; | 14 | #address-cells = <2>; |
| 13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
| 14 | model = "amcc,canyonlands"; | 16 | model = "amcc,canyonlands"; |
| 15 | compatible = "amcc,canyonlands"; | 17 | compatible = "amcc,canyonlands"; |
| 16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
| 17 | 19 | ||
| 18 | aliases { | 20 | aliases { |
| 19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
| @@ -29,13 +31,13 @@ | |||
| 29 | cpu@0 { | 31 | cpu@0 { |
| 30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
| 31 | model = "PowerPC,460EX"; | 33 | model = "PowerPC,460EX"; |
| 32 | reg = <0>; | 34 | reg = <0x00000000>; |
| 33 | clock-frequency = <0>; /* Filled in by U-Boot */ | 35 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
| 35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
| 36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
| 37 | i-cache-size = <8000>; | 39 | i-cache-size = <32768>; |
| 38 | d-cache-size = <8000>; | 40 | d-cache-size = <32768>; |
| 39 | dcr-controller; | 41 | dcr-controller; |
| 40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
| 41 | }; | 43 | }; |
| @@ -43,14 +45,14 @@ | |||
| 43 | 45 | ||
| 44 | memory { | 46 | memory { |
| 45 | device_type = "memory"; | 47 | device_type = "memory"; |
| 46 | reg = <0 0 0>; /* Filled in by U-Boot */ | 48 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ |
| 47 | }; | 49 | }; |
| 48 | 50 | ||
| 49 | UIC0: interrupt-controller0 { | 51 | UIC0: interrupt-controller0 { |
| 50 | compatible = "ibm,uic-460ex","ibm,uic"; | 52 | compatible = "ibm,uic-460ex","ibm,uic"; |
| 51 | interrupt-controller; | 53 | interrupt-controller; |
| 52 | cell-index = <0>; | 54 | cell-index = <0>; |
| 53 | dcr-reg = <0c0 009>; | 55 | dcr-reg = <0x0c0 0x009>; |
| 54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
| 55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
| 56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
| @@ -60,11 +62,11 @@ | |||
| 60 | compatible = "ibm,uic-460ex","ibm,uic"; | 62 | compatible = "ibm,uic-460ex","ibm,uic"; |
| 61 | interrupt-controller; | 63 | interrupt-controller; |
| 62 | cell-index = <1>; | 64 | cell-index = <1>; |
| 63 | dcr-reg = <0d0 009>; | 65 | dcr-reg = <0x0d0 0x009>; |
| 64 | #address-cells = <0>; | 66 | #address-cells = <0>; |
| 65 | #size-cells = <0>; | 67 | #size-cells = <0>; |
| 66 | #interrupt-cells = <2>; | 68 | #interrupt-cells = <2>; |
| 67 | interrupts = <1e 4 1f 4>; /* cascade */ | 69 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 68 | interrupt-parent = <&UIC0>; | 70 | interrupt-parent = <&UIC0>; |
| 69 | }; | 71 | }; |
| 70 | 72 | ||
| @@ -72,11 +74,11 @@ | |||
| 72 | compatible = "ibm,uic-460ex","ibm,uic"; | 74 | compatible = "ibm,uic-460ex","ibm,uic"; |
| 73 | interrupt-controller; | 75 | interrupt-controller; |
| 74 | cell-index = <2>; | 76 | cell-index = <2>; |
| 75 | dcr-reg = <0e0 009>; | 77 | dcr-reg = <0x0e0 0x009>; |
| 76 | #address-cells = <0>; | 78 | #address-cells = <0>; |
| 77 | #size-cells = <0>; | 79 | #size-cells = <0>; |
| 78 | #interrupt-cells = <2>; | 80 | #interrupt-cells = <2>; |
| 79 | interrupts = <a 4 b 4>; /* cascade */ | 81 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
| 80 | interrupt-parent = <&UIC0>; | 82 | interrupt-parent = <&UIC0>; |
| 81 | }; | 83 | }; |
| 82 | 84 | ||
| @@ -84,22 +86,22 @@ | |||
| 84 | compatible = "ibm,uic-460ex","ibm,uic"; | 86 | compatible = "ibm,uic-460ex","ibm,uic"; |
| 85 | interrupt-controller; | 87 | interrupt-controller; |
| 86 | cell-index = <3>; | 88 | cell-index = <3>; |
| 87 | dcr-reg = <0f0 009>; | 89 | dcr-reg = <0x0f0 0x009>; |
| 88 | #address-cells = <0>; | 90 | #address-cells = <0>; |
| 89 | #size-cells = <0>; | 91 | #size-cells = <0>; |
| 90 | #interrupt-cells = <2>; | 92 | #interrupt-cells = <2>; |
| 91 | interrupts = <10 4 11 4>; /* cascade */ | 93 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
| 92 | interrupt-parent = <&UIC0>; | 94 | interrupt-parent = <&UIC0>; |
| 93 | }; | 95 | }; |
| 94 | 96 | ||
| 95 | SDR0: sdr { | 97 | SDR0: sdr { |
| 96 | compatible = "ibm,sdr-460ex"; | 98 | compatible = "ibm,sdr-460ex"; |
| 97 | dcr-reg = <00e 002>; | 99 | dcr-reg = <0x00e 0x002>; |
| 98 | }; | 100 | }; |
| 99 | 101 | ||
| 100 | CPR0: cpr { | 102 | CPR0: cpr { |
| 101 | compatible = "ibm,cpr-460ex"; | 103 | compatible = "ibm,cpr-460ex"; |
| 102 | dcr-reg = <00c 002>; | 104 | dcr-reg = <0x00c 0x002>; |
| 103 | }; | 105 | }; |
| 104 | 106 | ||
| 105 | plb { | 107 | plb { |
| @@ -111,74 +113,74 @@ | |||
| 111 | 113 | ||
| 112 | SDRAM0: sdram { | 114 | SDRAM0: sdram { |
| 113 | compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; | 115 | compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; |
| 114 | dcr-reg = <010 2>; | 116 | dcr-reg = <0x010 0x002>; |
| 115 | }; | 117 | }; |
| 116 | 118 | ||
| 117 | MAL0: mcmal { | 119 | MAL0: mcmal { |
| 118 | compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; | 120 | compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; |
| 119 | dcr-reg = <180 62>; | 121 | dcr-reg = <0x180 0x062>; |
| 120 | num-tx-chans = <2>; | 122 | num-tx-chans = <2>; |
| 121 | num-rx-chans = <10>; | 123 | num-rx-chans = <16>; |
| 122 | #address-cells = <0>; | 124 | #address-cells = <0>; |
| 123 | #size-cells = <0>; | 125 | #size-cells = <0>; |
| 124 | interrupt-parent = <&UIC2>; | 126 | interrupt-parent = <&UIC2>; |
| 125 | interrupts = < /*TXEOB*/ 6 4 | 127 | interrupts = < /*TXEOB*/ 0x6 0x4 |
| 126 | /*RXEOB*/ 7 4 | 128 | /*RXEOB*/ 0x7 0x4 |
| 127 | /*SERR*/ 3 4 | 129 | /*SERR*/ 0x3 0x4 |
| 128 | /*TXDE*/ 4 4 | 130 | /*TXDE*/ 0x4 0x4 |
| 129 | /*RXDE*/ 5 4>; | 131 | /*RXDE*/ 0x5 0x4>; |
| 130 | }; | 132 | }; |
| 131 | 133 | ||
| 132 | POB0: opb { | 134 | POB0: opb { |
| 133 | compatible = "ibm,opb-460ex", "ibm,opb"; | 135 | compatible = "ibm,opb-460ex", "ibm,opb"; |
| 134 | #address-cells = <1>; | 136 | #address-cells = <1>; |
| 135 | #size-cells = <1>; | 137 | #size-cells = <1>; |
| 136 | ranges = <b0000000 4 b0000000 50000000>; | 138 | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; |
| 137 | clock-frequency = <0>; /* Filled in by U-Boot */ | 139 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 138 | 140 | ||
| 139 | EBC0: ebc { | 141 | EBC0: ebc { |
| 140 | compatible = "ibm,ebc-460ex", "ibm,ebc"; | 142 | compatible = "ibm,ebc-460ex", "ibm,ebc"; |
| 141 | dcr-reg = <012 2>; | 143 | dcr-reg = <0x012 0x002>; |
| 142 | #address-cells = <2>; | 144 | #address-cells = <2>; |
| 143 | #size-cells = <1>; | 145 | #size-cells = <1>; |
| 144 | clock-frequency = <0>; /* Filled in by U-Boot */ | 146 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 145 | /* ranges property is supplied by U-Boot */ | 147 | /* ranges property is supplied by U-Boot */ |
| 146 | interrupts = <6 4>; | 148 | interrupts = <0x6 0x4>; |
| 147 | interrupt-parent = <&UIC1>; | 149 | interrupt-parent = <&UIC1>; |
| 148 | 150 | ||
| 149 | nor_flash@0,0 { | 151 | nor_flash@0,0 { |
| 150 | compatible = "amd,s29gl512n", "cfi-flash"; | 152 | compatible = "amd,s29gl512n", "cfi-flash"; |
| 151 | bank-width = <2>; | 153 | bank-width = <2>; |
| 152 | reg = <0 000000 4000000>; | 154 | reg = <0x00000000 0x00000000 0x04000000>; |
| 153 | #address-cells = <1>; | 155 | #address-cells = <1>; |
| 154 | #size-cells = <1>; | 156 | #size-cells = <1>; |
| 155 | partition@0 { | 157 | partition@0 { |
| 156 | label = "kernel"; | 158 | label = "kernel"; |
| 157 | reg = <0 1e0000>; | 159 | reg = <0x00000000 0x001e0000>; |
| 158 | }; | 160 | }; |
| 159 | partition@1e0000 { | 161 | partition@1e0000 { |
| 160 | label = "dtb"; | 162 | label = "dtb"; |
| 161 | reg = <1e0000 20000>; | 163 | reg = <0x001e0000 0x00020000>; |
| 162 | }; | 164 | }; |
| 163 | partition@200000 { | 165 | partition@200000 { |
| 164 | label = "ramdisk"; | 166 | label = "ramdisk"; |
| 165 | reg = <200000 1400000>; | 167 | reg = <0x00200000 0x01400000>; |
| 166 | }; | 168 | }; |
| 167 | partition@1600000 { | 169 | partition@1600000 { |
| 168 | label = "jffs2"; | 170 | label = "jffs2"; |
| 169 | reg = <1600000 400000>; | 171 | reg = <0x01600000 0x00400000>; |
| 170 | }; | 172 | }; |
| 171 | partition@1a00000 { | 173 | partition@1a00000 { |
| 172 | label = "user"; | 174 | label = "user"; |
| 173 | reg = <1a00000 2560000>; | 175 | reg = <0x01a00000 0x02560000>; |
| 174 | }; | 176 | }; |
| 175 | partition@3f60000 { | 177 | partition@3f60000 { |
| 176 | label = "env"; | 178 | label = "env"; |
| 177 | reg = <3f60000 40000>; | 179 | reg = <0x03f60000 0x00040000>; |
| 178 | }; | 180 | }; |
| 179 | partition@3fa0000 { | 181 | partition@3fa0000 { |
| 180 | label = "u-boot"; | 182 | label = "u-boot"; |
| 181 | reg = <3fa0000 60000>; | 183 | reg = <0x03fa0000 0x00060000>; |
| 182 | }; | 184 | }; |
| 183 | }; | 185 | }; |
| 184 | }; | 186 | }; |
| @@ -186,103 +188,103 @@ | |||
| 186 | UART0: serial@ef600300 { | 188 | UART0: serial@ef600300 { |
| 187 | device_type = "serial"; | 189 | device_type = "serial"; |
| 188 | compatible = "ns16550"; | 190 | compatible = "ns16550"; |
| 189 | reg = <ef600300 8>; | 191 | reg = <0xef600300 0x00000008>; |
| 190 | virtual-reg = <ef600300>; | 192 | virtual-reg = <0xef600300>; |
| 191 | clock-frequency = <0>; /* Filled in by U-Boot */ | 193 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 192 | current-speed = <0>; /* Filled in by U-Boot */ | 194 | current-speed = <0>; /* Filled in by U-Boot */ |
| 193 | interrupt-parent = <&UIC1>; | 195 | interrupt-parent = <&UIC1>; |
| 194 | interrupts = <1 4>; | 196 | interrupts = <0x1 0x4>; |
| 195 | }; | 197 | }; |
| 196 | 198 | ||
| 197 | UART1: serial@ef600400 { | 199 | UART1: serial@ef600400 { |
| 198 | device_type = "serial"; | 200 | device_type = "serial"; |
| 199 | compatible = "ns16550"; | 201 | compatible = "ns16550"; |
| 200 | reg = <ef600400 8>; | 202 | reg = <0xef600400 0x00000008>; |
| 201 | virtual-reg = <ef600400>; | 203 | virtual-reg = <0xef600400>; |
| 202 | clock-frequency = <0>; /* Filled in by U-Boot */ | 204 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 203 | current-speed = <0>; /* Filled in by U-Boot */ | 205 | current-speed = <0>; /* Filled in by U-Boot */ |
| 204 | interrupt-parent = <&UIC0>; | 206 | interrupt-parent = <&UIC0>; |
| 205 | interrupts = <1 4>; | 207 | interrupts = <0x1 0x4>; |
| 206 | }; | 208 | }; |
| 207 | 209 | ||
| 208 | UART2: serial@ef600500 { | 210 | UART2: serial@ef600500 { |
| 209 | device_type = "serial"; | 211 | device_type = "serial"; |
| 210 | compatible = "ns16550"; | 212 | compatible = "ns16550"; |
| 211 | reg = <ef600500 8>; | 213 | reg = <0xef600500 0x00000008>; |
| 212 | virtual-reg = <ef600500>; | 214 | virtual-reg = <0xef600500>; |
| 213 | clock-frequency = <0>; /* Filled in by U-Boot */ | 215 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 214 | current-speed = <0>; /* Filled in by U-Boot */ | 216 | current-speed = <0>; /* Filled in by U-Boot */ |
| 215 | interrupt-parent = <&UIC1>; | 217 | interrupt-parent = <&UIC1>; |
| 216 | interrupts = <1d 4>; | 218 | interrupts = <0x1d 0x4>; |
| 217 | }; | 219 | }; |
| 218 | 220 | ||
| 219 | UART3: serial@ef600600 { | 221 | UART3: serial@ef600600 { |
| 220 | device_type = "serial"; | 222 | device_type = "serial"; |
| 221 | compatible = "ns16550"; | 223 | compatible = "ns16550"; |
| 222 | reg = <ef600600 8>; | 224 | reg = <0xef600600 0x00000008>; |
| 223 | virtual-reg = <ef600600>; | 225 | virtual-reg = <0xef600600>; |
| 224 | clock-frequency = <0>; /* Filled in by U-Boot */ | 226 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 225 | current-speed = <0>; /* Filled in by U-Boot */ | 227 | current-speed = <0>; /* Filled in by U-Boot */ |
| 226 | interrupt-parent = <&UIC1>; | 228 | interrupt-parent = <&UIC1>; |
| 227 | interrupts = <1e 4>; | 229 | interrupts = <0x1e 0x4>; |
| 228 | }; | 230 | }; |
| 229 | 231 | ||
| 230 | IIC0: i2c@ef600700 { | 232 | IIC0: i2c@ef600700 { |
| 231 | compatible = "ibm,iic-460ex", "ibm,iic"; | 233 | compatible = "ibm,iic-460ex", "ibm,iic"; |
| 232 | reg = <ef600700 14>; | 234 | reg = <0xef600700 0x00000014>; |
| 233 | interrupt-parent = <&UIC0>; | 235 | interrupt-parent = <&UIC0>; |
| 234 | interrupts = <2 4>; | 236 | interrupts = <0x2 0x4>; |
| 235 | }; | 237 | }; |
| 236 | 238 | ||
| 237 | IIC1: i2c@ef600800 { | 239 | IIC1: i2c@ef600800 { |
| 238 | compatible = "ibm,iic-460ex", "ibm,iic"; | 240 | compatible = "ibm,iic-460ex", "ibm,iic"; |
| 239 | reg = <ef600800 14>; | 241 | reg = <0xef600800 0x00000014>; |
| 240 | interrupt-parent = <&UIC0>; | 242 | interrupt-parent = <&UIC0>; |
| 241 | interrupts = <3 4>; | 243 | interrupts = <0x3 0x4>; |
| 242 | }; | 244 | }; |
| 243 | 245 | ||
| 244 | ZMII0: emac-zmii@ef600d00 { | 246 | ZMII0: emac-zmii@ef600d00 { |
| 245 | compatible = "ibm,zmii-460ex", "ibm,zmii"; | 247 | compatible = "ibm,zmii-460ex", "ibm,zmii"; |
| 246 | reg = <ef600d00 c>; | 248 | reg = <0xef600d00 0x0000000c>; |
| 247 | }; | 249 | }; |
| 248 | 250 | ||
| 249 | RGMII0: emac-rgmii@ef601500 { | 251 | RGMII0: emac-rgmii@ef601500 { |
| 250 | compatible = "ibm,rgmii-460ex", "ibm,rgmii"; | 252 | compatible = "ibm,rgmii-460ex", "ibm,rgmii"; |
| 251 | reg = <ef601500 8>; | 253 | reg = <0xef601500 0x00000008>; |
| 252 | has-mdio; | 254 | has-mdio; |
| 253 | }; | 255 | }; |
| 254 | 256 | ||
| 255 | TAH0: emac-tah@ef601350 { | 257 | TAH0: emac-tah@ef601350 { |
| 256 | compatible = "ibm,tah-460ex", "ibm,tah"; | 258 | compatible = "ibm,tah-460ex", "ibm,tah"; |
| 257 | reg = <ef601350 30>; | 259 | reg = <0xef601350 0x00000030>; |
| 258 | }; | 260 | }; |
| 259 | 261 | ||
| 260 | TAH1: emac-tah@ef601450 { | 262 | TAH1: emac-tah@ef601450 { |
| 261 | compatible = "ibm,tah-460ex", "ibm,tah"; | 263 | compatible = "ibm,tah-460ex", "ibm,tah"; |
| 262 | reg = <ef601450 30>; | 264 | reg = <0xef601450 0x00000030>; |
| 263 | }; | 265 | }; |
| 264 | 266 | ||
| 265 | EMAC0: ethernet@ef600e00 { | 267 | EMAC0: ethernet@ef600e00 { |
| 266 | device_type = "network"; | 268 | device_type = "network"; |
| 267 | compatible = "ibm,emac-460ex", "ibm,emac4"; | 269 | compatible = "ibm,emac-460ex", "ibm,emac4"; |
| 268 | interrupt-parent = <&EMAC0>; | 270 | interrupt-parent = <&EMAC0>; |
| 269 | interrupts = <0 1>; | 271 | interrupts = <0x0 0x1>; |
| 270 | #interrupt-cells = <1>; | 272 | #interrupt-cells = <1>; |
| 271 | #address-cells = <0>; | 273 | #address-cells = <0>; |
| 272 | #size-cells = <0>; | 274 | #size-cells = <0>; |
| 273 | interrupt-map = </*Status*/ 0 &UIC2 10 4 | 275 | interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 |
| 274 | /*Wake*/ 1 &UIC2 14 4>; | 276 | /*Wake*/ 0x1 &UIC2 0x14 0x4>; |
| 275 | reg = <ef600e00 70>; | 277 | reg = <0xef600e00 0x00000070>; |
| 276 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 278 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 277 | mal-device = <&MAL0>; | 279 | mal-device = <&MAL0>; |
| 278 | mal-tx-channel = <0>; | 280 | mal-tx-channel = <0>; |
| 279 | mal-rx-channel = <0>; | 281 | mal-rx-channel = <0>; |
| 280 | cell-index = <0>; | 282 | cell-index = <0>; |
| 281 | max-frame-size = <2328>; | 283 | max-frame-size = <9000>; |
| 282 | rx-fifo-size = <1000>; | 284 | rx-fifo-size = <4096>; |
| 283 | tx-fifo-size = <800>; | 285 | tx-fifo-size = <2048>; |
| 284 | phy-mode = "rgmii"; | 286 | phy-mode = "rgmii"; |
| 285 | phy-map = <00000000>; | 287 | phy-map = <0x00000000>; |
| 286 | rgmii-device = <&RGMII0>; | 288 | rgmii-device = <&RGMII0>; |
| 287 | rgmii-channel = <0>; | 289 | rgmii-channel = <0>; |
| 288 | tah-device = <&TAH0>; | 290 | tah-device = <&TAH0>; |
| @@ -295,23 +297,23 @@ | |||
| 295 | device_type = "network"; | 297 | device_type = "network"; |
| 296 | compatible = "ibm,emac-460ex", "ibm,emac4"; | 298 | compatible = "ibm,emac-460ex", "ibm,emac4"; |
| 297 | interrupt-parent = <&EMAC1>; | 299 | interrupt-parent = <&EMAC1>; |
| 298 | interrupts = <0 1>; | 300 | interrupts = <0x0 0x1>; |
| 299 | #interrupt-cells = <1>; | 301 | #interrupt-cells = <1>; |
| 300 | #address-cells = <0>; | 302 | #address-cells = <0>; |
| 301 | #size-cells = <0>; | 303 | #size-cells = <0>; |
| 302 | interrupt-map = </*Status*/ 0 &UIC2 11 4 | 304 | interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 |
| 303 | /*Wake*/ 1 &UIC2 15 4>; | 305 | /*Wake*/ 0x1 &UIC2 0x15 0x4>; |
| 304 | reg = <ef600f00 70>; | 306 | reg = <0xef600f00 0x00000070>; |
| 305 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 307 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 306 | mal-device = <&MAL0>; | 308 | mal-device = <&MAL0>; |
| 307 | mal-tx-channel = <1>; | 309 | mal-tx-channel = <1>; |
| 308 | mal-rx-channel = <8>; | 310 | mal-rx-channel = <8>; |
| 309 | cell-index = <1>; | 311 | cell-index = <1>; |
| 310 | max-frame-size = <2328>; | 312 | max-frame-size = <9000>; |
| 311 | rx-fifo-size = <1000>; | 313 | rx-fifo-size = <4096>; |
| 312 | tx-fifo-size = <800>; | 314 | tx-fifo-size = <2048>; |
| 313 | phy-mode = "rgmii"; | 315 | phy-mode = "rgmii"; |
| 314 | phy-map = <00000000>; | 316 | phy-map = <0x00000000>; |
| 315 | rgmii-device = <&RGMII0>; | 317 | rgmii-device = <&RGMII0>; |
| 316 | rgmii-channel = <1>; | 318 | rgmii-channel = <1>; |
| 317 | tah-device = <&TAH1>; | 319 | tah-device = <&TAH1>; |
| @@ -331,27 +333,27 @@ | |||
| 331 | primary; | 333 | primary; |
| 332 | large-inbound-windows; | 334 | large-inbound-windows; |
| 333 | enable-msi-hole; | 335 | enable-msi-hole; |
| 334 | reg = <c 0ec00000 8 /* Config space access */ | 336 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ |
| 335 | 0 0 0 /* no IACK cycles */ | 337 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
| 336 | c 0ed00000 4 /* Special cycles */ | 338 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ |
| 337 | c 0ec80000 100 /* Internal registers */ | 339 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ |
| 338 | c 0ec80100 fc>; /* Internal messaging registers */ | 340 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
| 339 | 341 | ||
| 340 | /* Outbound ranges, one memory and one IO, | 342 | /* Outbound ranges, one memory and one IO, |
| 341 | * later cannot be changed | 343 | * later cannot be changed |
| 342 | */ | 344 | */ |
| 343 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | 345 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 |
| 344 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | 346 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; |
| 345 | 347 | ||
| 346 | /* Inbound 2GB range starting at 0 */ | 348 | /* Inbound 2GB range starting at 0 */ |
| 347 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 349 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 348 | 350 | ||
| 349 | /* This drives busses 0 to 0x3f */ | 351 | /* This drives busses 0 to 0x3f */ |
| 350 | bus-range = <0 3f>; | 352 | bus-range = <0x0 0x3f>; |
| 351 | 353 | ||
| 352 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ | 354 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ |
| 353 | interrupt-map-mask = <0000 0 0 0>; | 355 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
| 354 | interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; | 356 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; |
| 355 | }; | 357 | }; |
| 356 | 358 | ||
| 357 | PCIE0: pciex@d00000000 { | 359 | PCIE0: pciex@d00000000 { |
| @@ -361,23 +363,23 @@ | |||
| 361 | #address-cells = <3>; | 363 | #address-cells = <3>; |
| 362 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 364 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
| 363 | primary; | 365 | primary; |
| 364 | port = <0>; /* port number */ | 366 | port = <0x0>; /* port number */ |
| 365 | reg = <d 00000000 20000000 /* Config space access */ | 367 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
| 366 | c 08010000 00001000>; /* Registers */ | 368 | 0x0000000c 0x08010000 0x00001000>; /* Registers */ |
| 367 | dcr-reg = <100 020>; | 369 | dcr-reg = <0x100 0x020>; |
| 368 | sdr-base = <300>; | 370 | sdr-base = <0x300>; |
| 369 | 371 | ||
| 370 | /* Outbound ranges, one memory and one IO, | 372 | /* Outbound ranges, one memory and one IO, |
| 371 | * later cannot be changed | 373 | * later cannot be changed |
| 372 | */ | 374 | */ |
| 373 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | 375 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
| 374 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | 376 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
| 375 | 377 | ||
| 376 | /* Inbound 2GB range starting at 0 */ | 378 | /* Inbound 2GB range starting at 0 */ |
| 377 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 379 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 378 | 380 | ||
| 379 | /* This drives busses 40 to 0x7f */ | 381 | /* This drives busses 40 to 0x7f */ |
| 380 | bus-range = <40 7f>; | 382 | bus-range = <0x40 0x7f>; |
| 381 | 383 | ||
| 382 | /* Legacy interrupts (note the weird polarity, the bridge seems | 384 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 383 | * to invert PCIe legacy interrupts). | 385 | * to invert PCIe legacy interrupts). |
| @@ -387,12 +389,12 @@ | |||
| 387 | * below are basically de-swizzled numbers. | 389 | * below are basically de-swizzled numbers. |
| 388 | * The real slot is on idsel 0, so the swizzling is 1:1 | 390 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 389 | */ | 391 | */ |
| 390 | interrupt-map-mask = <0000 0 0 7>; | 392 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 391 | interrupt-map = < | 393 | interrupt-map = < |
| 392 | 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ | 394 | 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ |
| 393 | 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ | 395 | 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ |
| 394 | 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ | 396 | 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ |
| 395 | 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; | 397 | 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; |
| 396 | }; | 398 | }; |
| 397 | 399 | ||
| 398 | PCIE1: pciex@d20000000 { | 400 | PCIE1: pciex@d20000000 { |
| @@ -402,23 +404,23 @@ | |||
| 402 | #address-cells = <3>; | 404 | #address-cells = <3>; |
| 403 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 405 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
| 404 | primary; | 406 | primary; |
| 405 | port = <1>; /* port number */ | 407 | port = <0x1>; /* port number */ |
| 406 | reg = <d 20000000 20000000 /* Config space access */ | 408 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ |
| 407 | c 08011000 00001000>; /* Registers */ | 409 | 0x0000000c 0x08011000 0x00001000>; /* Registers */ |
| 408 | dcr-reg = <120 020>; | 410 | dcr-reg = <0x120 0x020>; |
| 409 | sdr-base = <340>; | 411 | sdr-base = <0x340>; |
| 410 | 412 | ||
| 411 | /* Outbound ranges, one memory and one IO, | 413 | /* Outbound ranges, one memory and one IO, |
| 412 | * later cannot be changed | 414 | * later cannot be changed |
| 413 | */ | 415 | */ |
| 414 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | 416 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 |
| 415 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | 417 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; |
| 416 | 418 | ||
| 417 | /* Inbound 2GB range starting at 0 */ | 419 | /* Inbound 2GB range starting at 0 */ |
| 418 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 420 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 419 | 421 | ||
| 420 | /* This drives busses 80 to 0xbf */ | 422 | /* This drives busses 80 to 0xbf */ |
| 421 | bus-range = <80 bf>; | 423 | bus-range = <0x80 0xbf>; |
| 422 | 424 | ||
| 423 | /* Legacy interrupts (note the weird polarity, the bridge seems | 425 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 424 | * to invert PCIe legacy interrupts). | 426 | * to invert PCIe legacy interrupts). |
| @@ -428,12 +430,12 @@ | |||
| 428 | * below are basically de-swizzled numbers. | 430 | * below are basically de-swizzled numbers. |
| 429 | * The real slot is on idsel 0, so the swizzling is 1:1 | 431 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 430 | */ | 432 | */ |
| 431 | interrupt-map-mask = <0000 0 0 7>; | 433 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 432 | interrupt-map = < | 434 | interrupt-map = < |
| 433 | 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ | 435 | 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ |
| 434 | 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ | 436 | 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ |
| 435 | 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ | 437 | 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ |
| 436 | 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; | 438 | 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; |
| 437 | }; | 439 | }; |
| 438 | }; | 440 | }; |
| 439 | }; | 441 | }; |
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index 5079dc890e0e..ec2d142291b4 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts | |||
| @@ -11,12 +11,14 @@ | |||
| 11 | * any warranty of any kind, whether express or implied. | 11 | * any warranty of any kind, whether express or implied. |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | /dts-v1/; | ||
| 15 | |||
| 14 | / { | 16 | / { |
| 15 | #address-cells = <2>; | 17 | #address-cells = <2>; |
| 16 | #size-cells = <1>; | 18 | #size-cells = <1>; |
| 17 | model = "ibm,ebony"; | 19 | model = "ibm,ebony"; |
| 18 | compatible = "ibm,ebony"; | 20 | compatible = "ibm,ebony"; |
| 19 | dcr-parent = <&/cpus/cpu@0>; | 21 | dcr-parent = <&{/cpus/cpu@0}>; |
| 20 | 22 | ||
| 21 | aliases { | 23 | aliases { |
| 22 | ethernet0 = &EMAC0; | 24 | ethernet0 = &EMAC0; |
| @@ -32,13 +34,13 @@ | |||
| 32 | cpu@0 { | 34 | cpu@0 { |
| 33 | device_type = "cpu"; | 35 | device_type = "cpu"; |
| 34 | model = "PowerPC,440GP"; | 36 | model = "PowerPC,440GP"; |
| 35 | reg = <0>; | 37 | reg = <0x00000000>; |
| 36 | clock-frequency = <0>; // Filled in by zImage | 38 | clock-frequency = <0>; // Filled in by zImage |
| 37 | timebase-frequency = <0>; // Filled in by zImage | 39 | timebase-frequency = <0>; // Filled in by zImage |
| 38 | i-cache-line-size = <20>; | 40 | i-cache-line-size = <32>; |
| 39 | d-cache-line-size = <20>; | 41 | d-cache-line-size = <32>; |
| 40 | i-cache-size = <8000>; /* 32 kB */ | 42 | i-cache-size = <32768>; /* 32 kB */ |
| 41 | d-cache-size = <8000>; /* 32 kB */ | 43 | d-cache-size = <32768>; /* 32 kB */ |
| 42 | dcr-controller; | 44 | dcr-controller; |
| 43 | dcr-access-method = "native"; | 45 | dcr-access-method = "native"; |
| 44 | }; | 46 | }; |
| @@ -46,14 +48,14 @@ | |||
| 46 | 48 | ||
| 47 | memory { | 49 | memory { |
| 48 | device_type = "memory"; | 50 | device_type = "memory"; |
| 49 | reg = <0 0 0>; // Filled in by zImage | 51 | reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage |
| 50 | }; | 52 | }; |
| 51 | 53 | ||
| 52 | UIC0: interrupt-controller0 { | 54 | UIC0: interrupt-controller0 { |
| 53 | compatible = "ibm,uic-440gp", "ibm,uic"; | 55 | compatible = "ibm,uic-440gp", "ibm,uic"; |
| 54 | interrupt-controller; | 56 | interrupt-controller; |
| 55 | cell-index = <0>; | 57 | cell-index = <0>; |
| 56 | dcr-reg = <0c0 009>; | 58 | dcr-reg = <0x0c0 0x009>; |
| 57 | #address-cells = <0>; | 59 | #address-cells = <0>; |
| 58 | #size-cells = <0>; | 60 | #size-cells = <0>; |
| 59 | #interrupt-cells = <2>; | 61 | #interrupt-cells = <2>; |
| @@ -64,17 +66,17 @@ | |||
| 64 | compatible = "ibm,uic-440gp", "ibm,uic"; | 66 | compatible = "ibm,uic-440gp", "ibm,uic"; |
| 65 | interrupt-controller; | 67 | interrupt-controller; |
| 66 | cell-index = <1>; | 68 | cell-index = <1>; |
| 67 | dcr-reg = <0d0 009>; | 69 | dcr-reg = <0x0d0 0x009>; |
| 68 | #address-cells = <0>; | 70 | #address-cells = <0>; |
| 69 | #size-cells = <0>; | 71 | #size-cells = <0>; |
| 70 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
| 71 | interrupts = <1e 4 1f 4>; /* cascade */ | 73 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 72 | interrupt-parent = <&UIC0>; | 74 | interrupt-parent = <&UIC0>; |
| 73 | }; | 75 | }; |
| 74 | 76 | ||
| 75 | CPC0: cpc { | 77 | CPC0: cpc { |
| 76 | compatible = "ibm,cpc-440gp"; | 78 | compatible = "ibm,cpc-440gp"; |
| 77 | dcr-reg = <0b0 003 0e0 010>; | 79 | dcr-reg = <0x0b0 0x003 0x0e0 0x010>; |
| 78 | // FIXME: anything else? | 80 | // FIXME: anything else? |
| 79 | }; | 81 | }; |
| 80 | 82 | ||
| @@ -87,37 +89,37 @@ | |||
| 87 | 89 | ||
| 88 | SDRAM0: memory-controller { | 90 | SDRAM0: memory-controller { |
| 89 | compatible = "ibm,sdram-440gp"; | 91 | compatible = "ibm,sdram-440gp"; |
| 90 | dcr-reg = <010 2>; | 92 | dcr-reg = <0x010 0x002>; |
| 91 | // FIXME: anything else? | 93 | // FIXME: anything else? |
| 92 | }; | 94 | }; |
| 93 | 95 | ||
| 94 | SRAM0: sram { | 96 | SRAM0: sram { |
| 95 | compatible = "ibm,sram-440gp"; | 97 | compatible = "ibm,sram-440gp"; |
| 96 | dcr-reg = <020 8 00a 1>; | 98 | dcr-reg = <0x020 0x008 0x00a 0x001>; |
| 97 | }; | 99 | }; |
| 98 | 100 | ||
| 99 | DMA0: dma { | 101 | DMA0: dma { |
| 100 | // FIXME: ??? | 102 | // FIXME: ??? |
| 101 | compatible = "ibm,dma-440gp"; | 103 | compatible = "ibm,dma-440gp"; |
| 102 | dcr-reg = <100 027>; | 104 | dcr-reg = <0x100 0x027>; |
| 103 | }; | 105 | }; |
| 104 | 106 | ||
| 105 | MAL0: mcmal { | 107 | MAL0: mcmal { |
| 106 | compatible = "ibm,mcmal-440gp", "ibm,mcmal"; | 108 | compatible = "ibm,mcmal-440gp", "ibm,mcmal"; |
| 107 | dcr-reg = <180 62>; | 109 | dcr-reg = <0x180 0x062>; |
| 108 | num-tx-chans = <4>; | 110 | num-tx-chans = <4>; |
| 109 | num-rx-chans = <4>; | 111 | num-rx-chans = <4>; |
| 110 | interrupt-parent = <&MAL0>; | 112 | interrupt-parent = <&MAL0>; |
| 111 | interrupts = <0 1 2 3 4>; | 113 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 112 | #interrupt-cells = <1>; | 114 | #interrupt-cells = <1>; |
| 113 | #address-cells = <0>; | 115 | #address-cells = <0>; |
| 114 | #size-cells = <0>; | 116 | #size-cells = <0>; |
| 115 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 117 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 116 | /*RXEOB*/ 1 &UIC0 b 4 | 118 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 117 | /*SERR*/ 2 &UIC1 0 4 | 119 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 118 | /*TXDE*/ 3 &UIC1 1 4 | 120 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 119 | /*RXDE*/ 4 &UIC1 2 4>; | 121 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 120 | interrupt-map-mask = <ffffffff>; | 122 | interrupt-map-mask = <0xffffffff>; |
| 121 | }; | 123 | }; |
| 122 | 124 | ||
| 123 | POB0: opb { | 125 | POB0: opb { |
| @@ -126,34 +128,34 @@ | |||
| 126 | #size-cells = <1>; | 128 | #size-cells = <1>; |
| 127 | /* Wish there was a nicer way of specifying a full 32-bit | 129 | /* Wish there was a nicer way of specifying a full 32-bit |
| 128 | range */ | 130 | range */ |
| 129 | ranges = <00000000 1 00000000 80000000 | 131 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
| 130 | 80000000 1 80000000 80000000>; | 132 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
| 131 | dcr-reg = <090 00b>; | 133 | dcr-reg = <0x090 0x00b>; |
| 132 | interrupt-parent = <&UIC1>; | 134 | interrupt-parent = <&UIC1>; |
| 133 | interrupts = <7 4>; | 135 | interrupts = <0x7 0x4>; |
| 134 | clock-frequency = <0>; // Filled in by zImage | 136 | clock-frequency = <0>; // Filled in by zImage |
| 135 | 137 | ||
| 136 | EBC0: ebc { | 138 | EBC0: ebc { |
| 137 | compatible = "ibm,ebc-440gp", "ibm,ebc"; | 139 | compatible = "ibm,ebc-440gp", "ibm,ebc"; |
| 138 | dcr-reg = <012 2>; | 140 | dcr-reg = <0x012 0x002>; |
| 139 | #address-cells = <2>; | 141 | #address-cells = <2>; |
| 140 | #size-cells = <1>; | 142 | #size-cells = <1>; |
| 141 | clock-frequency = <0>; // Filled in by zImage | 143 | clock-frequency = <0>; // Filled in by zImage |
| 142 | // ranges property is supplied by zImage | 144 | // ranges property is supplied by zImage |
| 143 | // based on firmware's configuration of the | 145 | // based on firmware's configuration of the |
| 144 | // EBC bridge | 146 | // EBC bridge |
| 145 | interrupts = <5 4>; | 147 | interrupts = <0x5 0x4>; |
| 146 | interrupt-parent = <&UIC1>; | 148 | interrupt-parent = <&UIC1>; |
| 147 | 149 | ||
| 148 | small-flash@0,80000 { | 150 | small-flash@0,80000 { |
| 149 | compatible = "jedec-flash"; | 151 | compatible = "jedec-flash"; |
| 150 | bank-width = <1>; | 152 | bank-width = <1>; |
| 151 | reg = <0 80000 80000>; | 153 | reg = <0x00000000 0x00080000 0x00080000>; |
| 152 | #address-cells = <1>; | 154 | #address-cells = <1>; |
| 153 | #size-cells = <1>; | 155 | #size-cells = <1>; |
| 154 | partition@0 { | 156 | partition@0 { |
| 155 | label = "OpenBIOS"; | 157 | label = "OpenBIOS"; |
| 156 | reg = <0 80000>; | 158 | reg = <0x00000000 0x00080000>; |
| 157 | read-only; | 159 | read-only; |
| 158 | }; | 160 | }; |
| 159 | }; | 161 | }; |
| @@ -161,101 +163,101 @@ | |||
| 161 | nvram@1,0 { | 163 | nvram@1,0 { |
| 162 | /* NVRAM & RTC */ | 164 | /* NVRAM & RTC */ |
| 163 | compatible = "ds1743-nvram"; | 165 | compatible = "ds1743-nvram"; |
| 164 | #bytes = <2000>; | 166 | #bytes = <0x2000>; |
| 165 | reg = <1 0 2000>; | 167 | reg = <0x00000001 0x00000000 0x00002000>; |
| 166 | }; | 168 | }; |
| 167 | 169 | ||
| 168 | large-flash@2,0 { | 170 | large-flash@2,0 { |
| 169 | compatible = "jedec-flash"; | 171 | compatible = "jedec-flash"; |
| 170 | bank-width = <1>; | 172 | bank-width = <1>; |
| 171 | reg = <2 0 400000>; | 173 | reg = <0x00000002 0x00000000 0x00400000>; |
| 172 | #address-cells = <1>; | 174 | #address-cells = <1>; |
| 173 | #size-cells = <1>; | 175 | #size-cells = <1>; |
| 174 | partition@0 { | 176 | partition@0 { |
| 175 | label = "fs"; | 177 | label = "fs"; |
| 176 | reg = <0 380000>; | 178 | reg = <0x00000000 0x00380000>; |
| 177 | }; | 179 | }; |
| 178 | partition@380000 { | 180 | partition@380000 { |
| 179 | label = "firmware"; | 181 | label = "firmware"; |
| 180 | reg = <380000 80000>; | 182 | reg = <0x00380000 0x00080000>; |
| 181 | }; | 183 | }; |
| 182 | }; | 184 | }; |
| 183 | 185 | ||
| 184 | ir@3,0 { | 186 | ir@3,0 { |
| 185 | reg = <3 0 10>; | 187 | reg = <0x00000003 0x00000000 0x00000010>; |
| 186 | }; | 188 | }; |
| 187 | 189 | ||
| 188 | fpga@7,0 { | 190 | fpga@7,0 { |
| 189 | compatible = "Ebony-FPGA"; | 191 | compatible = "Ebony-FPGA"; |
| 190 | reg = <7 0 10>; | 192 | reg = <0x00000007 0x00000000 0x00000010>; |
| 191 | virtual-reg = <e8300000>; | 193 | virtual-reg = <0xe8300000>; |
| 192 | }; | 194 | }; |
| 193 | }; | 195 | }; |
| 194 | 196 | ||
| 195 | UART0: serial@40000200 { | 197 | UART0: serial@40000200 { |
| 196 | device_type = "serial"; | 198 | device_type = "serial"; |
| 197 | compatible = "ns16550"; | 199 | compatible = "ns16550"; |
| 198 | reg = <40000200 8>; | 200 | reg = <0x40000200 0x00000008>; |
| 199 | virtual-reg = <e0000200>; | 201 | virtual-reg = <0xe0000200>; |
| 200 | clock-frequency = <A8C000>; | 202 | clock-frequency = <11059200>; |
| 201 | current-speed = <2580>; | 203 | current-speed = <9600>; |
| 202 | interrupt-parent = <&UIC0>; | 204 | interrupt-parent = <&UIC0>; |
| 203 | interrupts = <0 4>; | 205 | interrupts = <0x0 0x4>; |
| 204 | }; | 206 | }; |
| 205 | 207 | ||
| 206 | UART1: serial@40000300 { | 208 | UART1: serial@40000300 { |
| 207 | device_type = "serial"; | 209 | device_type = "serial"; |
| 208 | compatible = "ns16550"; | 210 | compatible = "ns16550"; |
| 209 | reg = <40000300 8>; | 211 | reg = <0x40000300 0x00000008>; |
| 210 | virtual-reg = <e0000300>; | 212 | virtual-reg = <0xe0000300>; |
| 211 | clock-frequency = <A8C000>; | 213 | clock-frequency = <11059200>; |
| 212 | current-speed = <2580>; | 214 | current-speed = <9600>; |
| 213 | interrupt-parent = <&UIC0>; | 215 | interrupt-parent = <&UIC0>; |
| 214 | interrupts = <1 4>; | 216 | interrupts = <0x1 0x4>; |
| 215 | }; | 217 | }; |
| 216 | 218 | ||
| 217 | IIC0: i2c@40000400 { | 219 | IIC0: i2c@40000400 { |
| 218 | /* FIXME */ | 220 | /* FIXME */ |
| 219 | compatible = "ibm,iic-440gp", "ibm,iic"; | 221 | compatible = "ibm,iic-440gp", "ibm,iic"; |
| 220 | reg = <40000400 14>; | 222 | reg = <0x40000400 0x00000014>; |
| 221 | interrupt-parent = <&UIC0>; | 223 | interrupt-parent = <&UIC0>; |
| 222 | interrupts = <2 4>; | 224 | interrupts = <0x2 0x4>; |
| 223 | }; | 225 | }; |
| 224 | IIC1: i2c@40000500 { | 226 | IIC1: i2c@40000500 { |
| 225 | /* FIXME */ | 227 | /* FIXME */ |
| 226 | compatible = "ibm,iic-440gp", "ibm,iic"; | 228 | compatible = "ibm,iic-440gp", "ibm,iic"; |
| 227 | reg = <40000500 14>; | 229 | reg = <0x40000500 0x00000014>; |
| 228 | interrupt-parent = <&UIC0>; | 230 | interrupt-parent = <&UIC0>; |
| 229 | interrupts = <3 4>; | 231 | interrupts = <0x3 0x4>; |
| 230 | }; | 232 | }; |
| 231 | 233 | ||
| 232 | GPIO0: gpio@40000700 { | 234 | GPIO0: gpio@40000700 { |
| 233 | /* FIXME */ | 235 | /* FIXME */ |
| 234 | compatible = "ibm,gpio-440gp"; | 236 | compatible = "ibm,gpio-440gp"; |
| 235 | reg = <40000700 20>; | 237 | reg = <0x40000700 0x00000020>; |
| 236 | }; | 238 | }; |
| 237 | 239 | ||
| 238 | ZMII0: emac-zmii@40000780 { | 240 | ZMII0: emac-zmii@40000780 { |
| 239 | compatible = "ibm,zmii-440gp", "ibm,zmii"; | 241 | compatible = "ibm,zmii-440gp", "ibm,zmii"; |
| 240 | reg = <40000780 c>; | 242 | reg = <0x40000780 0x0000000c>; |
| 241 | }; | 243 | }; |
| 242 | 244 | ||
| 243 | EMAC0: ethernet@40000800 { | 245 | EMAC0: ethernet@40000800 { |
| 244 | device_type = "network"; | 246 | device_type = "network"; |
| 245 | compatible = "ibm,emac-440gp", "ibm,emac"; | 247 | compatible = "ibm,emac-440gp", "ibm,emac"; |
| 246 | interrupt-parent = <&UIC1>; | 248 | interrupt-parent = <&UIC1>; |
| 247 | interrupts = <1c 4 1d 4>; | 249 | interrupts = <0x1c 0x4 0x1d 0x4>; |
| 248 | reg = <40000800 70>; | 250 | reg = <0x40000800 0x00000070>; |
| 249 | local-mac-address = [000000000000]; // Filled in by zImage | 251 | local-mac-address = [000000000000]; // Filled in by zImage |
| 250 | mal-device = <&MAL0>; | 252 | mal-device = <&MAL0>; |
| 251 | mal-tx-channel = <0 1>; | 253 | mal-tx-channel = <0 1>; |
| 252 | mal-rx-channel = <0>; | 254 | mal-rx-channel = <0>; |
| 253 | cell-index = <0>; | 255 | cell-index = <0>; |
| 254 | max-frame-size = <5dc>; | 256 | max-frame-size = <1500>; |
| 255 | rx-fifo-size = <1000>; | 257 | rx-fifo-size = <4096>; |
| 256 | tx-fifo-size = <800>; | 258 | tx-fifo-size = <2048>; |
| 257 | phy-mode = "rmii"; | 259 | phy-mode = "rmii"; |
| 258 | phy-map = <00000001>; | 260 | phy-map = <0x00000001>; |
| 259 | zmii-device = <&ZMII0>; | 261 | zmii-device = <&ZMII0>; |
| 260 | zmii-channel = <0>; | 262 | zmii-channel = <0>; |
| 261 | }; | 263 | }; |
| @@ -263,18 +265,18 @@ | |||
| 263 | device_type = "network"; | 265 | device_type = "network"; |
| 264 | compatible = "ibm,emac-440gp", "ibm,emac"; | 266 | compatible = "ibm,emac-440gp", "ibm,emac"; |
| 265 | interrupt-parent = <&UIC1>; | 267 | interrupt-parent = <&UIC1>; |
| 266 | interrupts = <1e 4 1f 4>; | 268 | interrupts = <0x1e 0x4 0x1f 0x4>; |
| 267 | reg = <40000900 70>; | 269 | reg = <0x40000900 0x00000070>; |
| 268 | local-mac-address = [000000000000]; // Filled in by zImage | 270 | local-mac-address = [000000000000]; // Filled in by zImage |
| 269 | mal-device = <&MAL0>; | 271 | mal-device = <&MAL0>; |
| 270 | mal-tx-channel = <2 3>; | 272 | mal-tx-channel = <2 3>; |
| 271 | mal-rx-channel = <1>; | 273 | mal-rx-channel = <1>; |
| 272 | cell-index = <1>; | 274 | cell-index = <1>; |
| 273 | max-frame-size = <5dc>; | 275 | max-frame-size = <1500>; |
| 274 | rx-fifo-size = <1000>; | 276 | rx-fifo-size = <4096>; |
| 275 | tx-fifo-size = <800>; | 277 | tx-fifo-size = <2048>; |
| 276 | phy-mode = "rmii"; | 278 | phy-mode = "rmii"; |
| 277 | phy-map = <00000001>; | 279 | phy-map = <0x00000001>; |
| 278 | zmii-device = <&ZMII0>; | 280 | zmii-device = <&ZMII0>; |
| 279 | zmii-channel = <1>; | 281 | zmii-channel = <1>; |
| 280 | }; | 282 | }; |
| @@ -282,9 +284,9 @@ | |||
| 282 | 284 | ||
| 283 | GPT0: gpt@40000a00 { | 285 | GPT0: gpt@40000a00 { |
| 284 | /* FIXME */ | 286 | /* FIXME */ |
| 285 | reg = <40000a00 d4>; | 287 | reg = <0x40000a00 0x000000d4>; |
| 286 | interrupt-parent = <&UIC0>; | 288 | interrupt-parent = <&UIC0>; |
| 287 | interrupts = <12 4 13 4 14 4 15 4 16 4>; | 289 | interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; |
| 288 | }; | 290 | }; |
| 289 | 291 | ||
| 290 | }; | 292 | }; |
| @@ -296,35 +298,35 @@ | |||
| 296 | #address-cells = <3>; | 298 | #address-cells = <3>; |
| 297 | compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; | 299 | compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; |
| 298 | primary; | 300 | primary; |
| 299 | reg = <2 0ec00000 8 /* Config space access */ | 301 | reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ |
| 300 | 0 0 0 /* no IACK cycles */ | 302 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
| 301 | 2 0ed00000 4 /* Special cycles */ | 303 | 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ |
| 302 | 2 0ec80000 f0 /* Internal registers */ | 304 | 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */ |
| 303 | 2 0ec80100 fc>; /* Internal messaging registers */ | 305 | 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
| 304 | 306 | ||
| 305 | /* Outbound ranges, one memory and one IO, | 307 | /* Outbound ranges, one memory and one IO, |
| 306 | * later cannot be changed | 308 | * later cannot be changed |
| 307 | */ | 309 | */ |
| 308 | ranges = <02000000 0 80000000 00000003 80000000 0 80000000 | 310 | ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 |
| 309 | 01000000 0 00000000 00000002 08000000 0 00010000>; | 311 | 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; |
| 310 | 312 | ||
| 311 | /* Inbound 2GB range starting at 0 */ | 313 | /* Inbound 2GB range starting at 0 */ |
| 312 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 314 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 313 | 315 | ||
| 314 | /* Ebony has all 4 IRQ pins tied together per slot */ | 316 | /* Ebony has all 4 IRQ pins tied together per slot */ |
| 315 | interrupt-map-mask = <f800 0 0 0>; | 317 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
| 316 | interrupt-map = < | 318 | interrupt-map = < |
| 317 | /* IDSEL 1 */ | 319 | /* IDSEL 1 */ |
| 318 | 0800 0 0 0 &UIC0 17 8 | 320 | 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8 |
| 319 | 321 | ||
| 320 | /* IDSEL 2 */ | 322 | /* IDSEL 2 */ |
| 321 | 1000 0 0 0 &UIC0 18 8 | 323 | 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8 |
| 322 | 324 | ||
| 323 | /* IDSEL 3 */ | 325 | /* IDSEL 3 */ |
| 324 | 1800 0 0 0 &UIC0 19 8 | 326 | 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8 |
| 325 | 327 | ||
| 326 | /* IDSEL 4 */ | 328 | /* IDSEL 4 */ |
| 327 | 2000 0 0 0 &UIC0 1a 8 | 329 | 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
| 328 | >; | 330 | >; |
| 329 | }; | 331 | }; |
| 330 | }; | 332 | }; |
diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts index 92938557ac8a..53ef06cc2134 100644 --- a/arch/powerpc/boot/dts/ep405.dts +++ b/arch/powerpc/boot/dts/ep405.dts | |||
| @@ -9,12 +9,14 @@ | |||
| 9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | /dts-v1/; | ||
| 13 | |||
| 12 | / { | 14 | / { |
| 13 | #address-cells = <1>; | 15 | #address-cells = <1>; |
| 14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
| 15 | model = "ep405"; | 17 | model = "ep405"; |
| 16 | compatible = "ep405"; | 18 | compatible = "ep405"; |
| 17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
| 18 | 20 | ||
| 19 | aliases { | 21 | aliases { |
| 20 | ethernet0 = &EMAC; | 22 | ethernet0 = &EMAC; |
| @@ -29,13 +31,13 @@ | |||
| 29 | cpu@0 { | 31 | cpu@0 { |
| 30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
| 31 | model = "PowerPC,405GP"; | 33 | model = "PowerPC,405GP"; |
| 32 | reg = <0>; | 34 | reg = <0x00000000>; |
| 33 | clock-frequency = <bebc200>; /* Filled in by zImage */ | 35 | clock-frequency = <200000000>; /* Filled in by zImage */ |
| 34 | timebase-frequency = <0>; /* Filled in by zImage */ | 36 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
| 36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
| 37 | i-cache-size = <4000>; | 39 | i-cache-size = <16384>; |
| 38 | d-cache-size = <4000>; | 40 | d-cache-size = <16384>; |
| 39 | dcr-controller; | 41 | dcr-controller; |
| 40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
| 41 | }; | 43 | }; |
| @@ -43,14 +45,14 @@ | |||
| 43 | 45 | ||
| 44 | memory { | 46 | memory { |
| 45 | device_type = "memory"; | 47 | device_type = "memory"; |
| 46 | reg = <0 0>; /* Filled in by zImage */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by zImage */ |
| 47 | }; | 49 | }; |
| 48 | 50 | ||
| 49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
| 50 | compatible = "ibm,uic"; | 52 | compatible = "ibm,uic"; |
| 51 | interrupt-controller; | 53 | interrupt-controller; |
| 52 | cell-index = <0>; | 54 | cell-index = <0>; |
| 53 | dcr-reg = <0c0 9>; | 55 | dcr-reg = <0x0c0 0x009>; |
| 54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
| 55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
| 56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
| @@ -65,91 +67,91 @@ | |||
| 65 | 67 | ||
| 66 | SDRAM0: memory-controller { | 68 | SDRAM0: memory-controller { |
| 67 | compatible = "ibm,sdram-405gp"; | 69 | compatible = "ibm,sdram-405gp"; |
| 68 | dcr-reg = <010 2>; | 70 | dcr-reg = <0x010 0x002>; |
| 69 | }; | 71 | }; |
| 70 | 72 | ||
| 71 | MAL: mcmal { | 73 | MAL: mcmal { |
| 72 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; | 74 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; |
| 73 | dcr-reg = <180 62>; | 75 | dcr-reg = <0x180 0x062>; |
| 74 | num-tx-chans = <1>; | 76 | num-tx-chans = <1>; |
| 75 | num-rx-chans = <1>; | 77 | num-rx-chans = <1>; |
| 76 | interrupt-parent = <&UIC0>; | 78 | interrupt-parent = <&UIC0>; |
| 77 | interrupts = < | 79 | interrupts = < |
| 78 | b 4 /* TXEOB */ | 80 | 0xb 0x4 /* TXEOB */ |
| 79 | c 4 /* RXEOB */ | 81 | 0xc 0x4 /* RXEOB */ |
| 80 | a 4 /* SERR */ | 82 | 0xa 0x4 /* SERR */ |
| 81 | d 4 /* TXDE */ | 83 | 0xd 0x4 /* TXDE */ |
| 82 | e 4 /* RXDE */>; | 84 | 0xe 0x4 /* RXDE */>; |
| 83 | }; | 85 | }; |
| 84 | 86 | ||
| 85 | POB0: opb { | 87 | POB0: opb { |
| 86 | compatible = "ibm,opb-405gp", "ibm,opb"; | 88 | compatible = "ibm,opb-405gp", "ibm,opb"; |
| 87 | #address-cells = <1>; | 89 | #address-cells = <1>; |
| 88 | #size-cells = <1>; | 90 | #size-cells = <1>; |
| 89 | ranges = <ef600000 ef600000 a00000>; | 91 | ranges = <0xef600000 0xef600000 0x00a00000>; |
| 90 | dcr-reg = <0a0 5>; | 92 | dcr-reg = <0x0a0 0x005>; |
| 91 | clock-frequency = <0>; /* Filled in by zImage */ | 93 | clock-frequency = <0>; /* Filled in by zImage */ |
| 92 | 94 | ||
| 93 | UART0: serial@ef600300 { | 95 | UART0: serial@ef600300 { |
| 94 | device_type = "serial"; | 96 | device_type = "serial"; |
| 95 | compatible = "ns16550"; | 97 | compatible = "ns16550"; |
| 96 | reg = <ef600300 8>; | 98 | reg = <0xef600300 0x00000008>; |
| 97 | virtual-reg = <ef600300>; | 99 | virtual-reg = <0xef600300>; |
| 98 | clock-frequency = <0>; /* Filled in by zImage */ | 100 | clock-frequency = <0>; /* Filled in by zImage */ |
| 99 | current-speed = <2580>; | 101 | current-speed = <9600>; |
| 100 | interrupt-parent = <&UIC0>; | 102 | interrupt-parent = <&UIC0>; |
| 101 | interrupts = <0 4>; | 103 | interrupts = <0x0 0x4>; |
| 102 | }; | 104 | }; |
| 103 | 105 | ||
| 104 | UART1: serial@ef600400 { | 106 | UART1: serial@ef600400 { |
| 105 | device_type = "serial"; | 107 | device_type = "serial"; |
| 106 | compatible = "ns16550"; | 108 | compatible = "ns16550"; |
| 107 | reg = <ef600400 8>; | 109 | reg = <0xef600400 0x00000008>; |
| 108 | virtual-reg = <ef600400>; | 110 | virtual-reg = <0xef600400>; |
| 109 | clock-frequency = <0>; /* Filled in by zImage */ | 111 | clock-frequency = <0>; /* Filled in by zImage */ |
| 110 | current-speed = <2580>; | 112 | current-speed = <9600>; |
| 111 | interrupt-parent = <&UIC0>; | 113 | interrupt-parent = <&UIC0>; |
| 112 | interrupts = <1 4>; | 114 | interrupts = <0x1 0x4>; |
| 113 | }; | 115 | }; |
| 114 | 116 | ||
| 115 | IIC: i2c@ef600500 { | 117 | IIC: i2c@ef600500 { |
| 116 | compatible = "ibm,iic-405gp", "ibm,iic"; | 118 | compatible = "ibm,iic-405gp", "ibm,iic"; |
| 117 | reg = <ef600500 11>; | 119 | reg = <0xef600500 0x00000011>; |
| 118 | interrupt-parent = <&UIC0>; | 120 | interrupt-parent = <&UIC0>; |
| 119 | interrupts = <2 4>; | 121 | interrupts = <0x2 0x4>; |
| 120 | }; | 122 | }; |
| 121 | 123 | ||
| 122 | GPIO: gpio@ef600700 { | 124 | GPIO: gpio@ef600700 { |
| 123 | compatible = "ibm,gpio-405gp"; | 125 | compatible = "ibm,gpio-405gp"; |
| 124 | reg = <ef600700 20>; | 126 | reg = <0xef600700 0x00000020>; |
| 125 | }; | 127 | }; |
| 126 | 128 | ||
| 127 | EMAC: ethernet@ef600800 { | 129 | EMAC: ethernet@ef600800 { |
| 128 | linux,network-index = <0>; | 130 | linux,network-index = <0x0>; |
| 129 | device_type = "network"; | 131 | device_type = "network"; |
| 130 | compatible = "ibm,emac-405gp", "ibm,emac"; | 132 | compatible = "ibm,emac-405gp", "ibm,emac"; |
| 131 | interrupt-parent = <&UIC0>; | 133 | interrupt-parent = <&UIC0>; |
| 132 | interrupts = < | 134 | interrupts = < |
| 133 | f 4 /* Ethernet */ | 135 | 0xf 0x4 /* Ethernet */ |
| 134 | 9 4 /* Ethernet Wake Up */>; | 136 | 0x9 0x4 /* Ethernet Wake Up */>; |
| 135 | local-mac-address = [000000000000]; /* Filled in by zImage */ | 137 | local-mac-address = [000000000000]; /* Filled in by zImage */ |
| 136 | reg = <ef600800 70>; | 138 | reg = <0xef600800 0x00000070>; |
| 137 | mal-device = <&MAL>; | 139 | mal-device = <&MAL>; |
| 138 | mal-tx-channel = <0>; | 140 | mal-tx-channel = <0>; |
| 139 | mal-rx-channel = <0>; | 141 | mal-rx-channel = <0>; |
| 140 | cell-index = <0>; | 142 | cell-index = <0>; |
| 141 | max-frame-size = <5dc>; | 143 | max-frame-size = <1500>; |
| 142 | rx-fifo-size = <1000>; | 144 | rx-fifo-size = <4096>; |
| 143 | tx-fifo-size = <800>; | 145 | tx-fifo-size = <2048>; |
| 144 | phy-mode = "rmii"; | 146 | phy-mode = "rmii"; |
| 145 | phy-map = <00000000>; | 147 | phy-map = <0x00000000>; |
| 146 | }; | 148 | }; |
| 147 | 149 | ||
| 148 | }; | 150 | }; |
| 149 | 151 | ||
| 150 | EBC0: ebc { | 152 | EBC0: ebc { |
| 151 | compatible = "ibm,ebc-405gp", "ibm,ebc"; | 153 | compatible = "ibm,ebc-405gp", "ibm,ebc"; |
| 152 | dcr-reg = <012 2>; | 154 | dcr-reg = <0x012 0x002>; |
| 153 | #address-cells = <2>; | 155 | #address-cells = <2>; |
| 154 | #size-cells = <1>; | 156 | #size-cells = <1>; |
| 155 | 157 | ||
| @@ -163,13 +165,13 @@ | |||
| 163 | /* NVRAM and RTC */ | 165 | /* NVRAM and RTC */ |
| 164 | nvrtc@4,200000 { | 166 | nvrtc@4,200000 { |
| 165 | compatible = "ds1742"; | 167 | compatible = "ds1742"; |
| 166 | reg = <4 200000 0>; /* size fixed up by zImage */ | 168 | reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */ |
| 167 | }; | 169 | }; |
| 168 | 170 | ||
| 169 | /* "BCSR" CPLD contains a PCI irq controller */ | 171 | /* "BCSR" CPLD contains a PCI irq controller */ |
| 170 | bcsr@4,0 { | 172 | bcsr@4,0 { |
| 171 | compatible = "ep405-bcsr"; | 173 | compatible = "ep405-bcsr"; |
| 172 | reg = <4 0 10>; | 174 | reg = <0x00000004 0x00000000 0x00000010>; |
| 173 | interrupt-controller; | 175 | interrupt-controller; |
| 174 | /* Routing table */ | 176 | /* Routing table */ |
| 175 | irq-routing = [ 00 /* SYSERR */ | 177 | irq-routing = [ 00 /* SYSERR */ |
| @@ -198,26 +200,26 @@ | |||
| 198 | #address-cells = <3>; | 200 | #address-cells = <3>; |
| 199 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; | 201 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; |
| 200 | primary; | 202 | primary; |
| 201 | reg = <eec00000 8 /* Config space access */ | 203 | reg = <0xeec00000 0x00000008 /* Config space access */ |
| 202 | eed80000 4 /* IACK */ | 204 | 0xeed80000 0x00000004 /* IACK */ |
| 203 | eed80000 4 /* Special cycle */ | 205 | 0xeed80000 0x00000004 /* Special cycle */ |
| 204 | ef480000 40>; /* Internal registers */ | 206 | 0xef480000 0x00000040>; /* Internal registers */ |
| 205 | 207 | ||
| 206 | /* Outbound ranges, one memory and one IO, | 208 | /* Outbound ranges, one memory and one IO, |
| 207 | * later cannot be changed. Chip supports a second | 209 | * later cannot be changed. Chip supports a second |
| 208 | * IO range but we don't use it for now | 210 | * IO range but we don't use it for now |
| 209 | */ | 211 | */ |
| 210 | ranges = <02000000 0 80000000 80000000 0 20000000 | 212 | ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 |
| 211 | 01000000 0 00000000 e8000000 0 00010000>; | 213 | 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
| 212 | 214 | ||
| 213 | /* Inbound 2GB range starting at 0 */ | 215 | /* Inbound 2GB range starting at 0 */ |
| 214 | dma-ranges = <42000000 0 0 0 0 80000000>; | 216 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 215 | 217 | ||
| 216 | /* That's all I know about IRQs on that thing ... */ | 218 | /* That's all I know about IRQs on that thing ... */ |
| 217 | interrupt-map-mask = <f800 0 0 0>; | 219 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
| 218 | interrupt-map = < | 220 | interrupt-map = < |
| 219 | /* USB */ | 221 | /* USB */ |
| 220 | 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */ | 222 | 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */ |
| 221 | >; | 223 | >; |
| 222 | }; | 224 | }; |
| 223 | }; | 225 | }; |
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts index 0f2fc077d8db..463650c5f61d 100644 --- a/arch/powerpc/boot/dts/glacier.dts +++ b/arch/powerpc/boot/dts/glacier.dts | |||
| @@ -8,12 +8,14 @@ | |||
| 8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | /dts-v1/; | ||
| 12 | |||
| 11 | / { | 13 | / { |
| 12 | #address-cells = <2>; | 14 | #address-cells = <2>; |
| 13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
| 14 | model = "amcc,glacier"; | 16 | model = "amcc,glacier"; |
| 15 | compatible = "amcc,glacier", "amcc,canyonlands"; | 17 | compatible = "amcc,glacier", "amcc,canyonlands"; |
| 16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
| 17 | 19 | ||
| 18 | aliases { | 20 | aliases { |
| 19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
| @@ -31,13 +33,13 @@ | |||
| 31 | cpu@0 { | 33 | cpu@0 { |
| 32 | device_type = "cpu"; | 34 | device_type = "cpu"; |
| 33 | model = "PowerPC,460GT"; | 35 | model = "PowerPC,460GT"; |
| 34 | reg = <0>; | 36 | reg = <0x00000000>; |
| 35 | clock-frequency = <0>; /* Filled in by U-Boot */ | 37 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 38 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
| 37 | i-cache-line-size = <20>; | 39 | i-cache-line-size = <32>; |
| 38 | d-cache-line-size = <20>; | 40 | d-cache-line-size = <32>; |
| 39 | i-cache-size = <8000>; | 41 | i-cache-size = <32768>; |
| 40 | d-cache-size = <8000>; | 42 | d-cache-size = <32768>; |
| 41 | dcr-controller; | 43 | dcr-controller; |
| 42 | dcr-access-method = "native"; | 44 | dcr-access-method = "native"; |
| 43 | }; | 45 | }; |
| @@ -45,14 +47,14 @@ | |||
| 45 | 47 | ||
| 46 | memory { | 48 | memory { |
| 47 | device_type = "memory"; | 49 | device_type = "memory"; |
| 48 | reg = <0 0 0>; /* Filled in by U-Boot */ | 50 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ |
| 49 | }; | 51 | }; |
| 50 | 52 | ||
| 51 | UIC0: interrupt-controller0 { | 53 | UIC0: interrupt-controller0 { |
| 52 | compatible = "ibm,uic-460gt","ibm,uic"; | 54 | compatible = "ibm,uic-460gt","ibm,uic"; |
| 53 | interrupt-controller; | 55 | interrupt-controller; |
| 54 | cell-index = <0>; | 56 | cell-index = <0>; |
| 55 | dcr-reg = <0c0 009>; | 57 | dcr-reg = <0x0c0 0x009>; |
| 56 | #address-cells = <0>; | 58 | #address-cells = <0>; |
| 57 | #size-cells = <0>; | 59 | #size-cells = <0>; |
| 58 | #interrupt-cells = <2>; | 60 | #interrupt-cells = <2>; |
| @@ -62,11 +64,11 @@ | |||
| 62 | compatible = "ibm,uic-460gt","ibm,uic"; | 64 | compatible = "ibm,uic-460gt","ibm,uic"; |
| 63 | interrupt-controller; | 65 | interrupt-controller; |
| 64 | cell-index = <1>; | 66 | cell-index = <1>; |
| 65 | dcr-reg = <0d0 009>; | 67 | dcr-reg = <0x0d0 0x009>; |
| 66 | #address-cells = <0>; | 68 | #address-cells = <0>; |
| 67 | #size-cells = <0>; | 69 | #size-cells = <0>; |
| 68 | #interrupt-cells = <2>; | 70 | #interrupt-cells = <2>; |
| 69 | interrupts = <1e 4 1f 4>; /* cascade */ | 71 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 70 | interrupt-parent = <&UIC0>; | 72 | interrupt-parent = <&UIC0>; |
| 71 | }; | 73 | }; |
| 72 | 74 | ||
| @@ -74,11 +76,11 @@ | |||
| 74 | compatible = "ibm,uic-460gt","ibm,uic"; | 76 | compatible = "ibm,uic-460gt","ibm,uic"; |
| 75 | interrupt-controller; | 77 | interrupt-controller; |
| 76 | cell-index = <2>; | 78 | cell-index = <2>; |
| 77 | dcr-reg = <0e0 009>; | 79 | dcr-reg = <0x0e0 0x009>; |
| 78 | #address-cells = <0>; | 80 | #address-cells = <0>; |
| 79 | #size-cells = <0>; | 81 | #size-cells = <0>; |
| 80 | #interrupt-cells = <2>; | 82 | #interrupt-cells = <2>; |
| 81 | interrupts = <a 4 b 4>; /* cascade */ | 83 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
| 82 | interrupt-parent = <&UIC0>; | 84 | interrupt-parent = <&UIC0>; |
| 83 | }; | 85 | }; |
| 84 | 86 | ||
| @@ -86,22 +88,22 @@ | |||
| 86 | compatible = "ibm,uic-460gt","ibm,uic"; | 88 | compatible = "ibm,uic-460gt","ibm,uic"; |
| 87 | interrupt-controller; | 89 | interrupt-controller; |
| 88 | cell-index = <3>; | 90 | cell-index = <3>; |
| 89 | dcr-reg = <0f0 009>; | 91 | dcr-reg = <0x0f0 0x009>; |
| 90 | #address-cells = <0>; | 92 | #address-cells = <0>; |
| 91 | #size-cells = <0>; | 93 | #size-cells = <0>; |
| 92 | #interrupt-cells = <2>; | 94 | #interrupt-cells = <2>; |
| 93 | interrupts = <10 4 11 4>; /* cascade */ | 95 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
| 94 | interrupt-parent = <&UIC0>; | 96 | interrupt-parent = <&UIC0>; |
| 95 | }; | 97 | }; |
| 96 | 98 | ||
| 97 | SDR0: sdr { | 99 | SDR0: sdr { |
| 98 | compatible = "ibm,sdr-460gt"; | 100 | compatible = "ibm,sdr-460gt"; |
| 99 | dcr-reg = <00e 002>; | 101 | dcr-reg = <0x00e 0x002>; |
| 100 | }; | 102 | }; |
| 101 | 103 | ||
| 102 | CPR0: cpr { | 104 | CPR0: cpr { |
| 103 | compatible = "ibm,cpr-460gt"; | 105 | compatible = "ibm,cpr-460gt"; |
| 104 | dcr-reg = <00c 002>; | 106 | dcr-reg = <0x00c 0x002>; |
| 105 | }; | 107 | }; |
| 106 | 108 | ||
| 107 | plb { | 109 | plb { |
| @@ -113,75 +115,75 @@ | |||
| 113 | 115 | ||
| 114 | SDRAM0: sdram { | 116 | SDRAM0: sdram { |
| 115 | compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; | 117 | compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; |
| 116 | dcr-reg = <010 2>; | 118 | dcr-reg = <0x010 0x002>; |
| 117 | }; | 119 | }; |
| 118 | 120 | ||
| 119 | MAL0: mcmal { | 121 | MAL0: mcmal { |
| 120 | compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; | 122 | compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; |
| 121 | dcr-reg = <180 62>; | 123 | dcr-reg = <0x180 0x062>; |
| 122 | num-tx-chans = <4>; | 124 | num-tx-chans = <4>; |
| 123 | num-rx-chans = <20>; | 125 | num-rx-chans = <32>; |
| 124 | #address-cells = <0>; | 126 | #address-cells = <0>; |
| 125 | #size-cells = <0>; | 127 | #size-cells = <0>; |
| 126 | interrupt-parent = <&UIC2>; | 128 | interrupt-parent = <&UIC2>; |
| 127 | interrupts = < /*TXEOB*/ 6 4 | 129 | interrupts = < /*TXEOB*/ 0x6 0x4 |
| 128 | /*RXEOB*/ 7 4 | 130 | /*RXEOB*/ 0x7 0x4 |
| 129 | /*SERR*/ 3 4 | 131 | /*SERR*/ 0x3 0x4 |
| 130 | /*TXDE*/ 4 4 | 132 | /*TXDE*/ 0x4 0x4 |
| 131 | /*RXDE*/ 5 4>; | 133 | /*RXDE*/ 0x5 0x4>; |
| 132 | desc-base-addr-high = <8>; | 134 | desc-base-addr-high = <0x8>; |
| 133 | }; | 135 | }; |
| 134 | 136 | ||
| 135 | POB0: opb { | 137 | POB0: opb { |
| 136 | compatible = "ibm,opb-460gt", "ibm,opb"; | 138 | compatible = "ibm,opb-460gt", "ibm,opb"; |
| 137 | #address-cells = <1>; | 139 | #address-cells = <1>; |
| 138 | #size-cells = <1>; | 140 | #size-cells = <1>; |
| 139 | ranges = <b0000000 4 b0000000 50000000>; | 141 | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; |
| 140 | clock-frequency = <0>; /* Filled in by U-Boot */ | 142 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 141 | 143 | ||
| 142 | EBC0: ebc { | 144 | EBC0: ebc { |
| 143 | compatible = "ibm,ebc-460gt", "ibm,ebc"; | 145 | compatible = "ibm,ebc-460gt", "ibm,ebc"; |
| 144 | dcr-reg = <012 2>; | 146 | dcr-reg = <0x012 0x002>; |
| 145 | #address-cells = <2>; | 147 | #address-cells = <2>; |
| 146 | #size-cells = <1>; | 148 | #size-cells = <1>; |
| 147 | clock-frequency = <0>; /* Filled in by U-Boot */ | 149 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 148 | /* ranges property is supplied by U-Boot */ | 150 | /* ranges property is supplied by U-Boot */ |
| 149 | interrupts = <6 4>; | 151 | interrupts = <0x6 0x4>; |
| 150 | interrupt-parent = <&UIC1>; | 152 | interrupt-parent = <&UIC1>; |
| 151 | 153 | ||
| 152 | nor_flash@0,0 { | 154 | nor_flash@0,0 { |
| 153 | compatible = "amd,s29gl512n", "cfi-flash"; | 155 | compatible = "amd,s29gl512n", "cfi-flash"; |
| 154 | bank-width = <2>; | 156 | bank-width = <2>; |
| 155 | reg = <0 000000 4000000>; | 157 | reg = <0x00000000 0x00000000 0x04000000>; |
| 156 | #address-cells = <1>; | 158 | #address-cells = <1>; |
| 157 | #size-cells = <1>; | 159 | #size-cells = <1>; |
| 158 | partition@0 { | 160 | partition@0 { |
| 159 | label = "kernel"; | 161 | label = "kernel"; |
| 160 | reg = <0 1e0000>; | 162 | reg = <0x00000000 0x001e0000>; |
| 161 | }; | 163 | }; |
| 162 | partition@1e0000 { | 164 | partition@1e0000 { |
| 163 | label = "dtb"; | 165 | label = "dtb"; |
| 164 | reg = <1e0000 20000>; | 166 | reg = <0x001e0000 0x00020000>; |
| 165 | }; | 167 | }; |
| 166 | partition@200000 { | 168 | partition@200000 { |
| 167 | label = "ramdisk"; | 169 | label = "ramdisk"; |
| 168 | reg = <200000 1400000>; | 170 | reg = <0x00200000 0x01400000>; |
| 169 | }; | 171 | }; |
| 170 | partition@1600000 { | 172 | partition@1600000 { |
| 171 | label = "jffs2"; | 173 | label = "jffs2"; |
| 172 | reg = <1600000 400000>; | 174 | reg = <0x01600000 0x00400000>; |
| 173 | }; | 175 | }; |
| 174 | partition@1a00000 { | 176 | partition@1a00000 { |
| 175 | label = "user"; | 177 | label = "user"; |
| 176 | reg = <1a00000 2560000>; | 178 | reg = <0x01a00000 0x02560000>; |
| 177 | }; | 179 | }; |
| 178 | partition@3f60000 { | 180 | partition@3f60000 { |
| 179 | label = "env"; | 181 | label = "env"; |
| 180 | reg = <3f60000 40000>; | 182 | reg = <0x03f60000 0x00040000>; |
| 181 | }; | 183 | }; |
| 182 | partition@3fa0000 { | 184 | partition@3fa0000 { |
| 183 | label = "u-boot"; | 185 | label = "u-boot"; |
| 184 | reg = <3fa0000 60000>; | 186 | reg = <0x03fa0000 0x00060000>; |
| 185 | }; | 187 | }; |
| 186 | }; | 188 | }; |
| 187 | }; | 189 | }; |
| @@ -189,109 +191,109 @@ | |||
| 189 | UART0: serial@ef600300 { | 191 | UART0: serial@ef600300 { |
| 190 | device_type = "serial"; | 192 | device_type = "serial"; |
| 191 | compatible = "ns16550"; | 193 | compatible = "ns16550"; |
| 192 | reg = <ef600300 8>; | 194 | reg = <0xef600300 0x00000008>; |
| 193 | virtual-reg = <ef600300>; | 195 | virtual-reg = <0xef600300>; |
| 194 | clock-frequency = <0>; /* Filled in by U-Boot */ | 196 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 195 | current-speed = <0>; /* Filled in by U-Boot */ | 197 | current-speed = <0>; /* Filled in by U-Boot */ |
| 196 | interrupt-parent = <&UIC1>; | 198 | interrupt-parent = <&UIC1>; |
| 197 | interrupts = <1 4>; | 199 | interrupts = <0x1 0x4>; |
| 198 | }; | 200 | }; |
| 199 | 201 | ||
| 200 | UART1: serial@ef600400 { | 202 | UART1: serial@ef600400 { |
| 201 | device_type = "serial"; | 203 | device_type = "serial"; |
| 202 | compatible = "ns16550"; | 204 | compatible = "ns16550"; |
| 203 | reg = <ef600400 8>; | 205 | reg = <0xef600400 0x00000008>; |
| 204 | virtual-reg = <ef600400>; | 206 | virtual-reg = <0xef600400>; |
| 205 | clock-frequency = <0>; /* Filled in by U-Boot */ | 207 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 206 | current-speed = <0>; /* Filled in by U-Boot */ | 208 | current-speed = <0>; /* Filled in by U-Boot */ |
| 207 | interrupt-parent = <&UIC0>; | 209 | interrupt-parent = <&UIC0>; |
| 208 | interrupts = <1 4>; | 210 | interrupts = <0x1 0x4>; |
| 209 | }; | 211 | }; |
| 210 | 212 | ||
| 211 | UART2: serial@ef600500 { | 213 | UART2: serial@ef600500 { |
| 212 | device_type = "serial"; | 214 | device_type = "serial"; |
| 213 | compatible = "ns16550"; | 215 | compatible = "ns16550"; |
| 214 | reg = <ef600500 8>; | 216 | reg = <0xef600500 0x00000008>; |
| 215 | virtual-reg = <ef600500>; | 217 | virtual-reg = <0xef600500>; |
| 216 | clock-frequency = <0>; /* Filled in by U-Boot */ | 218 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 217 | current-speed = <0>; /* Filled in by U-Boot */ | 219 | current-speed = <0>; /* Filled in by U-Boot */ |
| 218 | interrupt-parent = <&UIC1>; | 220 | interrupt-parent = <&UIC1>; |
| 219 | interrupts = <1d 4>; | 221 | interrupts = <0x1d 0x4>; |
| 220 | }; | 222 | }; |
| 221 | 223 | ||
| 222 | UART3: serial@ef600600 { | 224 | UART3: serial@ef600600 { |
| 223 | device_type = "serial"; | 225 | device_type = "serial"; |
| 224 | compatible = "ns16550"; | 226 | compatible = "ns16550"; |
| 225 | reg = <ef600600 8>; | 227 | reg = <0xef600600 0x00000008>; |
| 226 | virtual-reg = <ef600600>; | 228 | virtual-reg = <0xef600600>; |
| 227 | clock-frequency = <0>; /* Filled in by U-Boot */ | 229 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 228 | current-speed = <0>; /* Filled in by U-Boot */ | 230 | current-speed = <0>; /* Filled in by U-Boot */ |
| 229 | interrupt-parent = <&UIC1>; | 231 | interrupt-parent = <&UIC1>; |
| 230 | interrupts = <1e 4>; | 232 | interrupts = <0x1e 0x4>; |
| 231 | }; | 233 | }; |
| 232 | 234 | ||
| 233 | IIC0: i2c@ef600700 { | 235 | IIC0: i2c@ef600700 { |
| 234 | compatible = "ibm,iic-460gt", "ibm,iic"; | 236 | compatible = "ibm,iic-460gt", "ibm,iic"; |
| 235 | reg = <ef600700 14>; | 237 | reg = <0xef600700 0x00000014>; |
| 236 | interrupt-parent = <&UIC0>; | 238 | interrupt-parent = <&UIC0>; |
| 237 | interrupts = <2 4>; | 239 | interrupts = <0x2 0x4>; |
| 238 | }; | 240 | }; |
| 239 | 241 | ||
| 240 | IIC1: i2c@ef600800 { | 242 | IIC1: i2c@ef600800 { |
| 241 | compatible = "ibm,iic-460gt", "ibm,iic"; | 243 | compatible = "ibm,iic-460gt", "ibm,iic"; |
| 242 | reg = <ef600800 14>; | 244 | reg = <0xef600800 0x00000014>; |
| 243 | interrupt-parent = <&UIC0>; | 245 | interrupt-parent = <&UIC0>; |
| 244 | interrupts = <3 4>; | 246 | interrupts = <0x3 0x4>; |
| 245 | }; | 247 | }; |
| 246 | 248 | ||
| 247 | ZMII0: emac-zmii@ef600d00 { | 249 | ZMII0: emac-zmii@ef600d00 { |
| 248 | compatible = "ibm,zmii-460gt", "ibm,zmii"; | 250 | compatible = "ibm,zmii-460gt", "ibm,zmii"; |
| 249 | reg = <ef600d00 c>; | 251 | reg = <0xef600d00 0x0000000c>; |
| 250 | }; | 252 | }; |
| 251 | 253 | ||
| 252 | RGMII0: emac-rgmii@ef601500 { | 254 | RGMII0: emac-rgmii@ef601500 { |
| 253 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; | 255 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; |
| 254 | reg = <ef601500 8>; | 256 | reg = <0xef601500 0x00000008>; |
| 255 | has-mdio; | 257 | has-mdio; |
| 256 | }; | 258 | }; |
| 257 | 259 | ||
| 258 | RGMII1: emac-rgmii@ef601600 { | 260 | RGMII1: emac-rgmii@ef601600 { |
| 259 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; | 261 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; |
| 260 | reg = <ef601600 8>; | 262 | reg = <0xef601600 0x00000008>; |
| 261 | has-mdio; | 263 | has-mdio; |
| 262 | }; | 264 | }; |
| 263 | 265 | ||
| 264 | TAH0: emac-tah@ef601350 { | 266 | TAH0: emac-tah@ef601350 { |
| 265 | compatible = "ibm,tah-460gt", "ibm,tah"; | 267 | compatible = "ibm,tah-460gt", "ibm,tah"; |
| 266 | reg = <ef601350 30>; | 268 | reg = <0xef601350 0x00000030>; |
| 267 | }; | 269 | }; |
| 268 | 270 | ||
| 269 | TAH1: emac-tah@ef601450 { | 271 | TAH1: emac-tah@ef601450 { |
| 270 | compatible = "ibm,tah-460gt", "ibm,tah"; | 272 | compatible = "ibm,tah-460gt", "ibm,tah"; |
| 271 | reg = <ef601450 30>; | 273 | reg = <0xef601450 0x00000030>; |
| 272 | }; | 274 | }; |
| 273 | 275 | ||
| 274 | EMAC0: ethernet@ef600e00 { | 276 | EMAC0: ethernet@ef600e00 { |
| 275 | device_type = "network"; | 277 | device_type = "network"; |
| 276 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 278 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
| 277 | interrupt-parent = <&EMAC0>; | 279 | interrupt-parent = <&EMAC0>; |
| 278 | interrupts = <0 1>; | 280 | interrupts = <0x0 0x1>; |
| 279 | #interrupt-cells = <1>; | 281 | #interrupt-cells = <1>; |
| 280 | #address-cells = <0>; | 282 | #address-cells = <0>; |
| 281 | #size-cells = <0>; | 283 | #size-cells = <0>; |
| 282 | interrupt-map = </*Status*/ 0 &UIC2 10 4 | 284 | interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 |
| 283 | /*Wake*/ 1 &UIC2 14 4>; | 285 | /*Wake*/ 0x1 &UIC2 0x14 0x4>; |
| 284 | reg = <ef600e00 70>; | 286 | reg = <0xef600e00 0x00000070>; |
| 285 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 287 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 286 | mal-device = <&MAL0>; | 288 | mal-device = <&MAL0>; |
| 287 | mal-tx-channel = <0>; | 289 | mal-tx-channel = <0>; |
| 288 | mal-rx-channel = <0>; | 290 | mal-rx-channel = <0>; |
| 289 | cell-index = <0>; | 291 | cell-index = <0>; |
| 290 | max-frame-size = <2328>; | 292 | max-frame-size = <9000>; |
| 291 | rx-fifo-size = <1000>; | 293 | rx-fifo-size = <4096>; |
| 292 | tx-fifo-size = <800>; | 294 | tx-fifo-size = <2048>; |
| 293 | phy-mode = "rgmii"; | 295 | phy-mode = "rgmii"; |
| 294 | phy-map = <00000000>; | 296 | phy-map = <0x00000000>; |
| 295 | rgmii-device = <&RGMII0>; | 297 | rgmii-device = <&RGMII0>; |
| 296 | rgmii-channel = <0>; | 298 | rgmii-channel = <0>; |
| 297 | tah-device = <&TAH0>; | 299 | tah-device = <&TAH0>; |
| @@ -304,23 +306,23 @@ | |||
| 304 | device_type = "network"; | 306 | device_type = "network"; |
| 305 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 307 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
| 306 | interrupt-parent = <&EMAC1>; | 308 | interrupt-parent = <&EMAC1>; |
| 307 | interrupts = <0 1>; | 309 | interrupts = <0x0 0x1>; |
| 308 | #interrupt-cells = <1>; | 310 | #interrupt-cells = <1>; |
| 309 | #address-cells = <0>; | 311 | #address-cells = <0>; |
| 310 | #size-cells = <0>; | 312 | #size-cells = <0>; |
| 311 | interrupt-map = </*Status*/ 0 &UIC2 11 4 | 313 | interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 |
| 312 | /*Wake*/ 1 &UIC2 15 4>; | 314 | /*Wake*/ 0x1 &UIC2 0x15 0x4>; |
| 313 | reg = <ef600f00 70>; | 315 | reg = <0xef600f00 0x00000070>; |
| 314 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 316 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 315 | mal-device = <&MAL0>; | 317 | mal-device = <&MAL0>; |
| 316 | mal-tx-channel = <1>; | 318 | mal-tx-channel = <1>; |
| 317 | mal-rx-channel = <8>; | 319 | mal-rx-channel = <8>; |
| 318 | cell-index = <1>; | 320 | cell-index = <1>; |
| 319 | max-frame-size = <2328>; | 321 | max-frame-size = <9000>; |
| 320 | rx-fifo-size = <1000>; | 322 | rx-fifo-size = <4096>; |
| 321 | tx-fifo-size = <800>; | 323 | tx-fifo-size = <2048>; |
| 322 | phy-mode = "rgmii"; | 324 | phy-mode = "rgmii"; |
| 323 | phy-map = <00000000>; | 325 | phy-map = <0x00000000>; |
| 324 | rgmii-device = <&RGMII0>; | 326 | rgmii-device = <&RGMII0>; |
| 325 | rgmii-channel = <1>; | 327 | rgmii-channel = <1>; |
| 326 | tah-device = <&TAH1>; | 328 | tah-device = <&TAH1>; |
| @@ -334,23 +336,23 @@ | |||
| 334 | device_type = "network"; | 336 | device_type = "network"; |
| 335 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 337 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
| 336 | interrupt-parent = <&EMAC2>; | 338 | interrupt-parent = <&EMAC2>; |
| 337 | interrupts = <0 1>; | 339 | interrupts = <0x0 0x1>; |
| 338 | #interrupt-cells = <1>; | 340 | #interrupt-cells = <1>; |
| 339 | #address-cells = <0>; | 341 | #address-cells = <0>; |
| 340 | #size-cells = <0>; | 342 | #size-cells = <0>; |
| 341 | interrupt-map = </*Status*/ 0 &UIC2 12 4 | 343 | interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 |
| 342 | /*Wake*/ 1 &UIC2 16 4>; | 344 | /*Wake*/ 0x1 &UIC2 0x16 0x4>; |
| 343 | reg = <ef601100 70>; | 345 | reg = <0xef601100 0x00000070>; |
| 344 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 346 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 345 | mal-device = <&MAL0>; | 347 | mal-device = <&MAL0>; |
| 346 | mal-tx-channel = <2>; | 348 | mal-tx-channel = <2>; |
| 347 | mal-rx-channel = <10>; | 349 | mal-rx-channel = <16>; |
| 348 | cell-index = <2>; | 350 | cell-index = <2>; |
| 349 | max-frame-size = <2328>; | 351 | max-frame-size = <9000>; |
| 350 | rx-fifo-size = <1000>; | 352 | rx-fifo-size = <4096>; |
| 351 | tx-fifo-size = <800>; | 353 | tx-fifo-size = <2048>; |
| 352 | phy-mode = "rgmii"; | 354 | phy-mode = "rgmii"; |
| 353 | phy-map = <00000000>; | 355 | phy-map = <0x00000000>; |
| 354 | rgmii-device = <&RGMII1>; | 356 | rgmii-device = <&RGMII1>; |
| 355 | rgmii-channel = <0>; | 357 | rgmii-channel = <0>; |
| 356 | has-inverted-stacr-oc; | 358 | has-inverted-stacr-oc; |
| @@ -362,23 +364,23 @@ | |||
| 362 | device_type = "network"; | 364 | device_type = "network"; |
| 363 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 365 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
| 364 | interrupt-parent = <&EMAC3>; | 366 | interrupt-parent = <&EMAC3>; |
| 365 | interrupts = <0 1>; | 367 | interrupts = <0x0 0x1>; |
| 366 | #interrupt-cells = <1>; | 368 | #interrupt-cells = <1>; |
| 367 | #address-cells = <0>; | 369 | #address-cells = <0>; |
| 368 | #size-cells = <0>; | 370 | #size-cells = <0>; |
| 369 | interrupt-map = </*Status*/ 0 &UIC2 13 4 | 371 | interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4 |
| 370 | /*Wake*/ 1 &UIC2 17 4>; | 372 | /*Wake*/ 0x1 &UIC2 0x17 0x4>; |
| 371 | reg = <ef601200 70>; | 373 | reg = <0xef601200 0x00000070>; |
| 372 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 374 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 373 | mal-device = <&MAL0>; | 375 | mal-device = <&MAL0>; |
| 374 | mal-tx-channel = <3>; | 376 | mal-tx-channel = <3>; |
| 375 | mal-rx-channel = <18>; | 377 | mal-rx-channel = <24>; |
| 376 | cell-index = <3>; | 378 | cell-index = <3>; |
| 377 | max-frame-size = <2328>; | 379 | max-frame-size = <9000>; |
| 378 | rx-fifo-size = <1000>; | 380 | rx-fifo-size = <4096>; |
| 379 | tx-fifo-size = <800>; | 381 | tx-fifo-size = <2048>; |
| 380 | phy-mode = "rgmii"; | 382 | phy-mode = "rgmii"; |
| 381 | phy-map = <00000000>; | 383 | phy-map = <0x00000000>; |
| 382 | rgmii-device = <&RGMII1>; | 384 | rgmii-device = <&RGMII1>; |
| 383 | rgmii-channel = <1>; | 385 | rgmii-channel = <1>; |
| 384 | has-inverted-stacr-oc; | 386 | has-inverted-stacr-oc; |
| @@ -396,27 +398,27 @@ | |||
| 396 | primary; | 398 | primary; |
| 397 | large-inbound-windows; | 399 | large-inbound-windows; |
| 398 | enable-msi-hole; | 400 | enable-msi-hole; |
| 399 | reg = <c 0ec00000 8 /* Config space access */ | 401 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ |
| 400 | 0 0 0 /* no IACK cycles */ | 402 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
| 401 | c 0ed00000 4 /* Special cycles */ | 403 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ |
| 402 | c 0ec80000 100 /* Internal registers */ | 404 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ |
| 403 | c 0ec80100 fc>; /* Internal messaging registers */ | 405 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
| 404 | 406 | ||
| 405 | /* Outbound ranges, one memory and one IO, | 407 | /* Outbound ranges, one memory and one IO, |
| 406 | * later cannot be changed | 408 | * later cannot be changed |
| 407 | */ | 409 | */ |
| 408 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | 410 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 |
| 409 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | 411 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; |
| 410 | 412 | ||
| 411 | /* Inbound 2GB range starting at 0 */ | 413 | /* Inbound 2GB range starting at 0 */ |
| 412 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 414 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 413 | 415 | ||
| 414 | /* This drives busses 0 to 0x3f */ | 416 | /* This drives busses 0 to 0x3f */ |
| 415 | bus-range = <0 3f>; | 417 | bus-range = <0x0 0x3f>; |
| 416 | 418 | ||
| 417 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ | 419 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ |
| 418 | interrupt-map-mask = <0000 0 0 0>; | 420 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
| 419 | interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; | 421 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; |
| 420 | }; | 422 | }; |
| 421 | 423 | ||
| 422 | PCIE0: pciex@d00000000 { | 424 | PCIE0: pciex@d00000000 { |
| @@ -426,23 +428,23 @@ | |||
| 426 | #address-cells = <3>; | 428 | #address-cells = <3>; |
| 427 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 429 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
| 428 | primary; | 430 | primary; |
| 429 | port = <0>; /* port number */ | 431 | port = <0x0>; /* port number */ |
| 430 | reg = <d 00000000 20000000 /* Config space access */ | 432 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
| 431 | c 08010000 00001000>; /* Registers */ | 433 | 0x0000000c 0x08010000 0x00001000>; /* Registers */ |
| 432 | dcr-reg = <100 020>; | 434 | dcr-reg = <0x100 0x020>; |
| 433 | sdr-base = <300>; | 435 | sdr-base = <0x300>; |
| 434 | 436 | ||
| 435 | /* Outbound ranges, one memory and one IO, | 437 | /* Outbound ranges, one memory and one IO, |
| 436 | * later cannot be changed | 438 | * later cannot be changed |
| 437 | */ | 439 | */ |
| 438 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | 440 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
| 439 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | 441 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
| 440 | 442 | ||
| 441 | /* Inbound 2GB range starting at 0 */ | 443 | /* Inbound 2GB range starting at 0 */ |
| 442 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 444 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 443 | 445 | ||
| 444 | /* This drives busses 40 to 0x7f */ | 446 | /* This drives busses 40 to 0x7f */ |
| 445 | bus-range = <40 7f>; | 447 | bus-range = <0x40 0x7f>; |
| 446 | 448 | ||
| 447 | /* Legacy interrupts (note the weird polarity, the bridge seems | 449 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 448 | * to invert PCIe legacy interrupts). | 450 | * to invert PCIe legacy interrupts). |
| @@ -452,12 +454,12 @@ | |||
| 452 | * below are basically de-swizzled numbers. | 454 | * below are basically de-swizzled numbers. |
| 453 | * The real slot is on idsel 0, so the swizzling is 1:1 | 455 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 454 | */ | 456 | */ |
| 455 | interrupt-map-mask = <0000 0 0 7>; | 457 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 456 | interrupt-map = < | 458 | interrupt-map = < |
| 457 | 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ | 459 | 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ |
| 458 | 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ | 460 | 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ |
| 459 | 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ | 461 | 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ |
| 460 | 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; | 462 | 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; |
| 461 | }; | 463 | }; |
| 462 | 464 | ||
| 463 | PCIE1: pciex@d20000000 { | 465 | PCIE1: pciex@d20000000 { |
| @@ -467,23 +469,23 @@ | |||
| 467 | #address-cells = <3>; | 469 | #address-cells = <3>; |
| 468 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 470 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
| 469 | primary; | 471 | primary; |
| 470 | port = <1>; /* port number */ | 472 | port = <0x1>; /* port number */ |
| 471 | reg = <d 20000000 20000000 /* Config space access */ | 473 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ |
| 472 | c 08011000 00001000>; /* Registers */ | 474 | 0x0000000c 0x08011000 0x00001000>; /* Registers */ |
| 473 | dcr-reg = <120 020>; | 475 | dcr-reg = <0x120 0x020>; |
| 474 | sdr-base = <340>; | 476 | sdr-base = <0x340>; |
| 475 | 477 | ||
| 476 | /* Outbound ranges, one memory and one IO, | 478 | /* Outbound ranges, one memory and one IO, |
| 477 | * later cannot be changed | 479 | * later cannot be changed |
| 478 | */ | 480 | */ |
| 479 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | 481 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 |
| 480 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | 482 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; |
| 481 | 483 | ||
| 482 | /* Inbound 2GB range starting at 0 */ | 484 | /* Inbound 2GB range starting at 0 */ |
| 483 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 485 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 484 | 486 | ||
| 485 | /* This drives busses 80 to 0xbf */ | 487 | /* This drives busses 80 to 0xbf */ |
| 486 | bus-range = <80 bf>; | 488 | bus-range = <0x80 0xbf>; |
| 487 | 489 | ||
| 488 | /* Legacy interrupts (note the weird polarity, the bridge seems | 490 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 489 | * to invert PCIe legacy interrupts). | 491 | * to invert PCIe legacy interrupts). |
| @@ -493,12 +495,12 @@ | |||
| 493 | * below are basically de-swizzled numbers. | 495 | * below are basically de-swizzled numbers. |
| 494 | * The real slot is on idsel 0, so the swizzling is 1:1 | 496 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 495 | */ | 497 | */ |
| 496 | interrupt-map-mask = <0000 0 0 7>; | 498 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 497 | interrupt-map = < | 499 | interrupt-map = < |
| 498 | 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ | 500 | 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ |
| 499 | 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ | 501 | 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ |
| 500 | 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ | 502 | 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ |
| 501 | 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; | 503 | 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; |
| 502 | }; | 504 | }; |
| 503 | }; | 505 | }; |
| 504 | }; | 506 | }; |
diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts index b5d95ac24dbf..2c2fceaabbcd 100644 --- a/arch/powerpc/boot/dts/haleakala.dts +++ b/arch/powerpc/boot/dts/haleakala.dts | |||
| @@ -8,12 +8,14 @@ | |||
| 8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | /dts-v1/; | ||
| 12 | |||
| 11 | / { | 13 | / { |
| 12 | #address-cells = <1>; | 14 | #address-cells = <1>; |
| 13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
| 14 | model = "amcc,haleakala"; | 16 | model = "amcc,haleakala"; |
| 15 | compatible = "amcc,haleakala", "amcc,kilauea"; | 17 | compatible = "amcc,haleakala", "amcc,kilauea"; |
| 16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
| 17 | 19 | ||
| 18 | aliases { | 20 | aliases { |
| 19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
| @@ -28,13 +30,13 @@ | |||
| 28 | cpu@0 { | 30 | cpu@0 { |
| 29 | device_type = "cpu"; | 31 | device_type = "cpu"; |
| 30 | model = "PowerPC,405EXr"; | 32 | model = "PowerPC,405EXr"; |
| 31 | reg = <0>; | 33 | reg = <0x00000000>; |
| 32 | clock-frequency = <0>; /* Filled in by U-Boot */ | 34 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 33 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 35 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
| 34 | i-cache-line-size = <20>; | 36 | i-cache-line-size = <32>; |
| 35 | d-cache-line-size = <20>; | 37 | d-cache-line-size = <32>; |
| 36 | i-cache-size = <4000>; /* 16 kB */ | 38 | i-cache-size = <16384>; /* 16 kB */ |
| 37 | d-cache-size = <4000>; /* 16 kB */ | 39 | d-cache-size = <16384>; /* 16 kB */ |
| 38 | dcr-controller; | 40 | dcr-controller; |
| 39 | dcr-access-method = "native"; | 41 | dcr-access-method = "native"; |
| 40 | }; | 42 | }; |
| @@ -42,14 +44,14 @@ | |||
| 42 | 44 | ||
| 43 | memory { | 45 | memory { |
| 44 | device_type = "memory"; | 46 | device_type = "memory"; |
| 45 | reg = <0 0>; /* Filled in by U-Boot */ | 47 | reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ |
| 46 | }; | 48 | }; |
| 47 | 49 | ||
| 48 | UIC0: interrupt-controller { | 50 | UIC0: interrupt-controller { |
| 49 | compatible = "ibm,uic-405exr", "ibm,uic"; | 51 | compatible = "ibm,uic-405exr", "ibm,uic"; |
| 50 | interrupt-controller; | 52 | interrupt-controller; |
| 51 | cell-index = <0>; | 53 | cell-index = <0>; |
| 52 | dcr-reg = <0c0 009>; | 54 | dcr-reg = <0x0c0 0x009>; |
| 53 | #address-cells = <0>; | 55 | #address-cells = <0>; |
| 54 | #size-cells = <0>; | 56 | #size-cells = <0>; |
| 55 | #interrupt-cells = <2>; | 57 | #interrupt-cells = <2>; |
| @@ -59,11 +61,11 @@ | |||
| 59 | compatible = "ibm,uic-405exr","ibm,uic"; | 61 | compatible = "ibm,uic-405exr","ibm,uic"; |
| 60 | interrupt-controller; | 62 | interrupt-controller; |
| 61 | cell-index = <1>; | 63 | cell-index = <1>; |
| 62 | dcr-reg = <0d0 009>; | 64 | dcr-reg = <0x0d0 0x009>; |
| 63 | #address-cells = <0>; | 65 | #address-cells = <0>; |
| 64 | #size-cells = <0>; | 66 | #size-cells = <0>; |
| 65 | #interrupt-cells = <2>; | 67 | #interrupt-cells = <2>; |
| 66 | interrupts = <1e 4 1f 4>; /* cascade */ | 68 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 67 | interrupt-parent = <&UIC0>; | 69 | interrupt-parent = <&UIC0>; |
| 68 | }; | 70 | }; |
| 69 | 71 | ||
| @@ -71,11 +73,11 @@ | |||
| 71 | compatible = "ibm,uic-405exr","ibm,uic"; | 73 | compatible = "ibm,uic-405exr","ibm,uic"; |
| 72 | interrupt-controller; | 74 | interrupt-controller; |
| 73 | cell-index = <2>; | 75 | cell-index = <2>; |
| 74 | dcr-reg = <0e0 009>; | 76 | dcr-reg = <0x0e0 0x009>; |
| 75 | #address-cells = <0>; | 77 | #address-cells = <0>; |
| 76 | #size-cells = <0>; | 78 | #size-cells = <0>; |
| 77 | #interrupt-cells = <2>; | 79 | #interrupt-cells = <2>; |
| 78 | interrupts = <1c 4 1d 4>; /* cascade */ | 80 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
| 79 | interrupt-parent = <&UIC0>; | 81 | interrupt-parent = <&UIC0>; |
| 80 | }; | 82 | }; |
| 81 | 83 | ||
| @@ -88,72 +90,72 @@ | |||
| 88 | 90 | ||
| 89 | SDRAM0: memory-controller { | 91 | SDRAM0: memory-controller { |
| 90 | compatible = "ibm,sdram-405exr"; | 92 | compatible = "ibm,sdram-405exr"; |
| 91 | dcr-reg = <010 2>; | 93 | dcr-reg = <0x010 0x002>; |
| 92 | }; | 94 | }; |
| 93 | 95 | ||
| 94 | MAL0: mcmal { | 96 | MAL0: mcmal { |
| 95 | compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; | 97 | compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; |
| 96 | dcr-reg = <180 62>; | 98 | dcr-reg = <0x180 0x062>; |
| 97 | num-tx-chans = <2>; | 99 | num-tx-chans = <2>; |
| 98 | num-rx-chans = <2>; | 100 | num-rx-chans = <2>; |
| 99 | interrupt-parent = <&MAL0>; | 101 | interrupt-parent = <&MAL0>; |
| 100 | interrupts = <0 1 2 3 4>; | 102 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 101 | #interrupt-cells = <1>; | 103 | #interrupt-cells = <1>; |
| 102 | #address-cells = <0>; | 104 | #address-cells = <0>; |
| 103 | #size-cells = <0>; | 105 | #size-cells = <0>; |
| 104 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 106 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 105 | /*RXEOB*/ 1 &UIC0 b 4 | 107 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 106 | /*SERR*/ 2 &UIC1 0 4 | 108 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 107 | /*TXDE*/ 3 &UIC1 1 4 | 109 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 108 | /*RXDE*/ 4 &UIC1 2 4>; | 110 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 109 | interrupt-map-mask = <ffffffff>; | 111 | interrupt-map-mask = <0xffffffff>; |
| 110 | }; | 112 | }; |
| 111 | 113 | ||
| 112 | POB0: opb { | 114 | POB0: opb { |
| 113 | compatible = "ibm,opb-405exr", "ibm,opb"; | 115 | compatible = "ibm,opb-405exr", "ibm,opb"; |
| 114 | #address-cells = <1>; | 116 | #address-cells = <1>; |
| 115 | #size-cells = <1>; | 117 | #size-cells = <1>; |
| 116 | ranges = <80000000 80000000 10000000 | 118 | ranges = <0x80000000 0x80000000 0x10000000 |
| 117 | ef600000 ef600000 a00000 | 119 | 0xef600000 0xef600000 0x00a00000 |
| 118 | f0000000 f0000000 10000000>; | 120 | 0xf0000000 0xf0000000 0x10000000>; |
| 119 | dcr-reg = <0a0 5>; | 121 | dcr-reg = <0x0a0 0x005>; |
| 120 | clock-frequency = <0>; /* Filled in by U-Boot */ | 122 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 121 | 123 | ||
| 122 | EBC0: ebc { | 124 | EBC0: ebc { |
| 123 | compatible = "ibm,ebc-405exr", "ibm,ebc"; | 125 | compatible = "ibm,ebc-405exr", "ibm,ebc"; |
| 124 | dcr-reg = <012 2>; | 126 | dcr-reg = <0x012 0x002>; |
| 125 | #address-cells = <2>; | 127 | #address-cells = <2>; |
| 126 | #size-cells = <1>; | 128 | #size-cells = <1>; |
| 127 | clock-frequency = <0>; /* Filled in by U-Boot */ | 129 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 128 | /* ranges property is supplied by U-Boot */ | 130 | /* ranges property is supplied by U-Boot */ |
| 129 | interrupts = <5 1>; | 131 | interrupts = <0x5 0x1>; |
| 130 | interrupt-parent = <&UIC1>; | 132 | interrupt-parent = <&UIC1>; |
| 131 | 133 | ||
| 132 | nor_flash@0,0 { | 134 | nor_flash@0,0 { |
| 133 | compatible = "amd,s29gl512n", "cfi-flash"; | 135 | compatible = "amd,s29gl512n", "cfi-flash"; |
| 134 | bank-width = <2>; | 136 | bank-width = <2>; |
| 135 | reg = <0 000000 4000000>; | 137 | reg = <0x00000000 0x00000000 0x04000000>; |
| 136 | #address-cells = <1>; | 138 | #address-cells = <1>; |
| 137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
| 138 | partition@0 { | 140 | partition@0 { |
| 139 | label = "kernel"; | 141 | label = "kernel"; |
| 140 | reg = <0 200000>; | 142 | reg = <0x00000000 0x00200000>; |
| 141 | }; | 143 | }; |
| 142 | partition@200000 { | 144 | partition@200000 { |
| 143 | label = "root"; | 145 | label = "root"; |
| 144 | reg = <200000 200000>; | 146 | reg = <0x00200000 0x00200000>; |
| 145 | }; | 147 | }; |
| 146 | partition@400000 { | 148 | partition@400000 { |
| 147 | label = "user"; | 149 | label = "user"; |
| 148 | reg = <400000 3b60000>; | 150 | reg = <0x00400000 0x03b60000>; |
| 149 | }; | 151 | }; |
| 150 | partition@3f60000 { | 152 | partition@3f60000 { |
| 151 | label = "env"; | 153 | label = "env"; |
| 152 | reg = <3f60000 40000>; | 154 | reg = <0x03f60000 0x00040000>; |
| 153 | }; | 155 | }; |
| 154 | partition@3fa0000 { | 156 | partition@3fa0000 { |
| 155 | label = "u-boot"; | 157 | label = "u-boot"; |
| 156 | reg = <3fa0000 60000>; | 158 | reg = <0x03fa0000 0x00060000>; |
| 157 | }; | 159 | }; |
| 158 | }; | 160 | }; |
| 159 | }; | 161 | }; |
| @@ -161,68 +163,68 @@ | |||
| 161 | UART0: serial@ef600200 { | 163 | UART0: serial@ef600200 { |
| 162 | device_type = "serial"; | 164 | device_type = "serial"; |
| 163 | compatible = "ns16550"; | 165 | compatible = "ns16550"; |
| 164 | reg = <ef600200 8>; | 166 | reg = <0xef600200 0x00000008>; |
| 165 | virtual-reg = <ef600200>; | 167 | virtual-reg = <0xef600200>; |
| 166 | clock-frequency = <0>; /* Filled in by U-Boot */ | 168 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 167 | current-speed = <0>; | 169 | current-speed = <0>; |
| 168 | interrupt-parent = <&UIC0>; | 170 | interrupt-parent = <&UIC0>; |
| 169 | interrupts = <1a 4>; | 171 | interrupts = <0x1a 0x4>; |
| 170 | }; | 172 | }; |
| 171 | 173 | ||
| 172 | UART1: serial@ef600300 { | 174 | UART1: serial@ef600300 { |
| 173 | device_type = "serial"; | 175 | device_type = "serial"; |
| 174 | compatible = "ns16550"; | 176 | compatible = "ns16550"; |
| 175 | reg = <ef600300 8>; | 177 | reg = <0xef600300 0x00000008>; |
| 176 | virtual-reg = <ef600300>; | 178 | virtual-reg = <0xef600300>; |
| 177 | clock-frequency = <0>; /* Filled in by U-Boot */ | 179 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 178 | current-speed = <0>; | 180 | current-speed = <0>; |
| 179 | interrupt-parent = <&UIC0>; | 181 | interrupt-parent = <&UIC0>; |
| 180 | interrupts = <1 4>; | 182 | interrupts = <0x1 0x4>; |
| 181 | }; | 183 | }; |
| 182 | 184 | ||
| 183 | IIC0: i2c@ef600400 { | 185 | IIC0: i2c@ef600400 { |
| 184 | compatible = "ibm,iic-405exr", "ibm,iic"; | 186 | compatible = "ibm,iic-405exr", "ibm,iic"; |
| 185 | reg = <ef600400 14>; | 187 | reg = <0xef600400 0x00000014>; |
| 186 | interrupt-parent = <&UIC0>; | 188 | interrupt-parent = <&UIC0>; |
| 187 | interrupts = <2 4>; | 189 | interrupts = <0x2 0x4>; |
| 188 | }; | 190 | }; |
| 189 | 191 | ||
| 190 | IIC1: i2c@ef600500 { | 192 | IIC1: i2c@ef600500 { |
| 191 | compatible = "ibm,iic-405exr", "ibm,iic"; | 193 | compatible = "ibm,iic-405exr", "ibm,iic"; |
| 192 | reg = <ef600500 14>; | 194 | reg = <0xef600500 0x00000014>; |
| 193 | interrupt-parent = <&UIC0>; | 195 | interrupt-parent = <&UIC0>; |
| 194 | interrupts = <7 4>; | 196 | interrupts = <0x7 0x4>; |
| 195 | }; | 197 | }; |
| 196 | 198 | ||
| 197 | 199 | ||
| 198 | RGMII0: emac-rgmii@ef600b00 { | 200 | RGMII0: emac-rgmii@ef600b00 { |
| 199 | compatible = "ibm,rgmii-405exr", "ibm,rgmii"; | 201 | compatible = "ibm,rgmii-405exr", "ibm,rgmii"; |
| 200 | reg = <ef600b00 104>; | 202 | reg = <0xef600b00 0x00000104>; |
| 201 | has-mdio; | 203 | has-mdio; |
| 202 | }; | 204 | }; |
| 203 | 205 | ||
| 204 | EMAC0: ethernet@ef600900 { | 206 | EMAC0: ethernet@ef600900 { |
| 205 | linux,network-index = <0>; | 207 | linux,network-index = <0x0>; |
| 206 | device_type = "network"; | 208 | device_type = "network"; |
| 207 | compatible = "ibm,emac-405exr", "ibm,emac4"; | 209 | compatible = "ibm,emac-405exr", "ibm,emac4"; |
| 208 | interrupt-parent = <&EMAC0>; | 210 | interrupt-parent = <&EMAC0>; |
| 209 | interrupts = <0 1>; | 211 | interrupts = <0x0 0x1>; |
| 210 | #interrupt-cells = <1>; | 212 | #interrupt-cells = <1>; |
| 211 | #address-cells = <0>; | 213 | #address-cells = <0>; |
| 212 | #size-cells = <0>; | 214 | #size-cells = <0>; |
| 213 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 215 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
| 214 | /*Wake*/ 1 &UIC1 1d 4>; | 216 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
| 215 | reg = <ef600900 70>; | 217 | reg = <0xef600900 0x00000070>; |
| 216 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 218 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 217 | mal-device = <&MAL0>; | 219 | mal-device = <&MAL0>; |
| 218 | mal-tx-channel = <0>; | 220 | mal-tx-channel = <0>; |
| 219 | mal-rx-channel = <0>; | 221 | mal-rx-channel = <0>; |
| 220 | cell-index = <0>; | 222 | cell-index = <0>; |
| 221 | max-frame-size = <2328>; | 223 | max-frame-size = <9000>; |
| 222 | rx-fifo-size = <1000>; | 224 | rx-fifo-size = <4096>; |
| 223 | tx-fifo-size = <800>; | 225 | tx-fifo-size = <2048>; |
| 224 | phy-mode = "rgmii"; | 226 | phy-mode = "rgmii"; |
| 225 | phy-map = <00000000>; | 227 | phy-map = <0x00000000>; |
| 226 | rgmii-device = <&RGMII0>; | 228 | rgmii-device = <&RGMII0>; |
| 227 | rgmii-channel = <0>; | 229 | rgmii-channel = <0>; |
| 228 | has-inverted-stacr-oc; | 230 | has-inverted-stacr-oc; |
| @@ -237,23 +239,23 @@ | |||
| 237 | #address-cells = <3>; | 239 | #address-cells = <3>; |
| 238 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 240 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
| 239 | primary; | 241 | primary; |
| 240 | port = <0>; /* port number */ | 242 | port = <0x0>; /* port number */ |
| 241 | reg = <a0000000 20000000 /* Config space access */ | 243 | reg = <0xa0000000 0x20000000 /* Config space access */ |
| 242 | ef000000 00001000>; /* Registers */ | 244 | 0xef000000 0x00001000>; /* Registers */ |
| 243 | dcr-reg = <040 020>; | 245 | dcr-reg = <0x040 0x020>; |
| 244 | sdr-base = <400>; | 246 | sdr-base = <0x400>; |
| 245 | 247 | ||
| 246 | /* Outbound ranges, one memory and one IO, | 248 | /* Outbound ranges, one memory and one IO, |
| 247 | * later cannot be changed | 249 | * later cannot be changed |
| 248 | */ | 250 | */ |
| 249 | ranges = <02000000 0 80000000 90000000 0 08000000 | 251 | ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 |
| 250 | 01000000 0 00000000 e0000000 0 00010000>; | 252 | 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; |
| 251 | 253 | ||
| 252 | /* Inbound 2GB range starting at 0 */ | 254 | /* Inbound 2GB range starting at 0 */ |
| 253 | dma-ranges = <42000000 0 0 0 0 80000000>; | 255 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 254 | 256 | ||
| 255 | /* This drives busses 0x00 to 0x3f */ | 257 | /* This drives busses 0x00 to 0x3f */ |
| 256 | bus-range = <00 3f>; | 258 | bus-range = <0x0 0x3f>; |
| 257 | 259 | ||
| 258 | /* Legacy interrupts (note the weird polarity, the bridge seems | 260 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 259 | * to invert PCIe legacy interrupts). | 261 | * to invert PCIe legacy interrupts). |
| @@ -263,12 +265,12 @@ | |||
| 263 | * below are basically de-swizzled numbers. | 265 | * below are basically de-swizzled numbers. |
| 264 | * The real slot is on idsel 0, so the swizzling is 1:1 | 266 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 265 | */ | 267 | */ |
| 266 | interrupt-map-mask = <0000 0 0 7>; | 268 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 267 | interrupt-map = < | 269 | interrupt-map = < |
| 268 | 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ | 270 | 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ |
| 269 | 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ | 271 | 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ |
| 270 | 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ | 272 | 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ |
| 271 | 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; | 273 | 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; |
| 272 | }; | 274 | }; |
| 273 | }; | 275 | }; |
| 274 | }; | 276 | }; |
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts index b5d87895fe06..f87fe7b9ced9 100644 --- a/arch/powerpc/boot/dts/holly.dts +++ b/arch/powerpc/boot/dts/holly.dts | |||
| @@ -10,6 +10,8 @@ | |||
| 10 | * any warranty of any kind, whether express or implied. | 10 | * any warranty of any kind, whether express or implied. |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | /dts-v1/; | ||
| 14 | |||
| 13 | / { | 15 | / { |
| 14 | model = "41K7339"; | 16 | model = "41K7339"; |
| 15 | compatible = "ibm,holly"; | 17 | compatible = "ibm,holly"; |
| @@ -21,22 +23,22 @@ | |||
| 21 | #size-cells =<0>; | 23 | #size-cells =<0>; |
| 22 | PowerPC,750CL@0 { | 24 | PowerPC,750CL@0 { |
| 23 | device_type = "cpu"; | 25 | device_type = "cpu"; |
| 24 | reg = <0>; | 26 | reg = <0x00000000>; |
| 25 | d-cache-line-size = <20>; | 27 | d-cache-line-size = <32>; |
| 26 | i-cache-line-size = <20>; | 28 | i-cache-line-size = <32>; |
| 27 | d-cache-size = <8000>; | 29 | d-cache-size = <32768>; |
| 28 | i-cache-size = <8000>; | 30 | i-cache-size = <32768>; |
| 29 | d-cache-sets = <80>; | 31 | d-cache-sets = <128>; |
| 30 | i-cache-sets = <80>; | 32 | i-cache-sets = <128>; |
| 31 | timebase-frequency = <2faf080>; | 33 | timebase-frequency = <50000000>; |
| 32 | clock-frequency = <23c34600>; | 34 | clock-frequency = <600000000>; |
| 33 | bus-frequency = <bebc200>; | 35 | bus-frequency = <200000000>; |
| 34 | }; | 36 | }; |
| 35 | }; | 37 | }; |
| 36 | 38 | ||
| 37 | memory@0 { | 39 | memory@0 { |
| 38 | device_type = "memory"; | 40 | device_type = "memory"; |
| 39 | reg = <00000000 20000000>; | 41 | reg = <0x00000000 0x20000000>; |
| 40 | }; | 42 | }; |
| 41 | 43 | ||
| 42 | tsi109@c0000000 { | 44 | tsi109@c0000000 { |
| @@ -44,33 +46,33 @@ | |||
| 44 | compatible = "tsi109-bridge", "tsi108-bridge"; | 46 | compatible = "tsi109-bridge", "tsi108-bridge"; |
| 45 | #address-cells = <1>; | 47 | #address-cells = <1>; |
| 46 | #size-cells = <1>; | 48 | #size-cells = <1>; |
| 47 | ranges = <00000000 c0000000 00010000>; | 49 | ranges = <0x00000000 0xc0000000 0x00010000>; |
| 48 | reg = <c0000000 00010000>; | 50 | reg = <0xc0000000 0x00010000>; |
| 49 | 51 | ||
| 50 | i2c@7000 { | 52 | i2c@7000 { |
| 51 | device_type = "i2c"; | 53 | device_type = "i2c"; |
| 52 | compatible = "tsi109-i2c", "tsi108-i2c"; | 54 | compatible = "tsi109-i2c", "tsi108-i2c"; |
| 53 | interrupt-parent = <&MPIC>; | 55 | interrupt-parent = <&MPIC>; |
| 54 | interrupts = <e 2>; | 56 | interrupts = <0xe 0x2>; |
| 55 | reg = <7000 400>; | 57 | reg = <0x00007000 0x00000400>; |
| 56 | }; | 58 | }; |
| 57 | 59 | ||
| 58 | MDIO: mdio@6000 { | 60 | MDIO: mdio@6000 { |
| 59 | device_type = "mdio"; | 61 | device_type = "mdio"; |
| 60 | compatible = "tsi109-mdio", "tsi108-mdio"; | 62 | compatible = "tsi109-mdio", "tsi108-mdio"; |
| 61 | reg = <6000 50>; | 63 | reg = <0x00006000 0x00000050>; |
| 62 | #address-cells = <1>; | 64 | #address-cells = <1>; |
| 63 | #size-cells = <0>; | 65 | #size-cells = <0>; |
| 64 | 66 | ||
| 65 | PHY1: ethernet-phy@1 { | 67 | PHY1: ethernet-phy@1 { |
| 66 | compatible = "bcm5461a"; | 68 | compatible = "bcm5461a"; |
| 67 | reg = <1>; | 69 | reg = <0x00000001>; |
| 68 | txc-rxc-delay-disable; | 70 | txc-rxc-delay-disable; |
| 69 | }; | 71 | }; |
| 70 | 72 | ||
| 71 | PHY2: ethernet-phy@2 { | 73 | PHY2: ethernet-phy@2 { |
| 72 | compatible = "bcm5461a"; | 74 | compatible = "bcm5461a"; |
| 73 | reg = <2>; | 75 | reg = <0x00000002>; |
| 74 | txc-rxc-delay-disable; | 76 | txc-rxc-delay-disable; |
| 75 | }; | 77 | }; |
| 76 | }; | 78 | }; |
| @@ -80,10 +82,10 @@ | |||
| 80 | compatible = "tsi109-ethernet", "tsi108-ethernet"; | 82 | compatible = "tsi109-ethernet", "tsi108-ethernet"; |
| 81 | #address-cells = <1>; | 83 | #address-cells = <1>; |
| 82 | #size-cells = <0>; | 84 | #size-cells = <0>; |
| 83 | reg = <6000 200>; | 85 | reg = <0x00006000 0x00000200>; |
| 84 | local-mac-address = [ 00 00 00 00 00 00 ]; | 86 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 85 | interrupt-parent = <&MPIC>; | 87 | interrupt-parent = <&MPIC>; |
| 86 | interrupts = <10 2>; | 88 | interrupts = <0x10 0x2>; |
| 87 | mdio-handle = <&MDIO>; | 89 | mdio-handle = <&MDIO>; |
| 88 | phy-handle = <&PHY1>; | 90 | phy-handle = <&PHY1>; |
| 89 | }; | 91 | }; |
| @@ -93,10 +95,10 @@ | |||
| 93 | compatible = "tsi109-ethernet", "tsi108-ethernet"; | 95 | compatible = "tsi109-ethernet", "tsi108-ethernet"; |
| 94 | #address-cells = <1>; | 96 | #address-cells = <1>; |
| 95 | #size-cells = <0>; | 97 | #size-cells = <0>; |
| 96 | reg = <6400 200>; | 98 | reg = <0x00006400 0x00000200>; |
| 97 | local-mac-address = [ 00 00 00 00 00 00 ]; | 99 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 98 | interrupt-parent = <&MPIC>; | 100 | interrupt-parent = <&MPIC>; |
| 99 | interrupts = <11 2>; | 101 | interrupts = <0x11 0x2>; |
| 100 | mdio-handle = <&MDIO>; | 102 | mdio-handle = <&MDIO>; |
| 101 | phy-handle = <&PHY2>; | 103 | phy-handle = <&PHY2>; |
| 102 | }; | 104 | }; |
| @@ -104,23 +106,23 @@ | |||
| 104 | serial@7808 { | 106 | serial@7808 { |
| 105 | device_type = "serial"; | 107 | device_type = "serial"; |
| 106 | compatible = "ns16550"; | 108 | compatible = "ns16550"; |
| 107 | reg = <7808 200>; | 109 | reg = <0x00007808 0x00000200>; |
| 108 | virtual-reg = <c0007808>; | 110 | virtual-reg = <0xc0007808>; |
| 109 | clock-frequency = <3F9C6000>; | 111 | clock-frequency = <1067212800>; |
| 110 | current-speed = <1c200>; | 112 | current-speed = <115200>; |
| 111 | interrupt-parent = <&MPIC>; | 113 | interrupt-parent = <&MPIC>; |
| 112 | interrupts = <c 2>; | 114 | interrupts = <0xc 0x2>; |
| 113 | }; | 115 | }; |
| 114 | 116 | ||
| 115 | serial@7c08 { | 117 | serial@7c08 { |
| 116 | device_type = "serial"; | 118 | device_type = "serial"; |
| 117 | compatible = "ns16550"; | 119 | compatible = "ns16550"; |
| 118 | reg = <7c08 200>; | 120 | reg = <0x00007c08 0x00000200>; |
| 119 | virtual-reg = <c0007c08>; | 121 | virtual-reg = <0xc0007c08>; |
| 120 | clock-frequency = <3F9C6000>; | 122 | clock-frequency = <1067212800>; |
| 121 | current-speed = <1c200>; | 123 | current-speed = <115200>; |
| 122 | interrupt-parent = <&MPIC>; | 124 | interrupt-parent = <&MPIC>; |
| 123 | interrupts = <d 2>; | 125 | interrupts = <0xd 0x2>; |
| 124 | }; | 126 | }; |
| 125 | 127 | ||
| 126 | MPIC: pic@7400 { | 128 | MPIC: pic@7400 { |
| @@ -128,7 +130,7 @@ | |||
| 128 | compatible = "chrp,open-pic"; | 130 | compatible = "chrp,open-pic"; |
| 129 | interrupt-controller; | 131 | interrupt-controller; |
| 130 | #interrupt-cells = <2>; | 132 | #interrupt-cells = <2>; |
| 131 | reg = <7400 400>; | 133 | reg = <0x00007400 0x00000400>; |
| 132 | big-endian; | 134 | big-endian; |
| 133 | }; | 135 | }; |
| 134 | 136 | ||
| @@ -138,42 +140,42 @@ | |||
| 138 | #interrupt-cells = <1>; | 140 | #interrupt-cells = <1>; |
| 139 | #size-cells = <2>; | 141 | #size-cells = <2>; |
| 140 | #address-cells = <3>; | 142 | #address-cells = <3>; |
| 141 | reg = <1000 1000>; | 143 | reg = <0x00001000 0x00001000>; |
| 142 | bus-range = <0 0>; | 144 | bus-range = <0x0 0x0>; |
| 143 | /*----------------------------------------------------+ | 145 | /*----------------------------------------------------+ |
| 144 | | PCI memory range. | 146 | | PCI memory range. |
| 145 | | 01 denotes I/O space | 147 | | 01 denotes I/O space |
| 146 | | 02 denotes 32-bit memory space | 148 | | 02 denotes 32-bit memory space |
| 147 | +----------------------------------------------------*/ | 149 | +----------------------------------------------------*/ |
| 148 | ranges = <02000000 0 40000000 40000000 0 10000000 | 150 | ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 |
| 149 | 01000000 0 00000000 7e000000 0 00010000>; | 151 | 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; |
| 150 | clock-frequency = <7f28154>; | 152 | clock-frequency = <133333332>; |
| 151 | interrupt-parent = <&MPIC>; | 153 | interrupt-parent = <&MPIC>; |
| 152 | interrupts = <17 2>; | 154 | interrupts = <0x17 0x2>; |
| 153 | interrupt-map-mask = <f800 0 0 7>; | 155 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 154 | /*----------------------------------------------------+ | 156 | /*----------------------------------------------------+ |
| 155 | | The INTA, INTB, INTC, INTD are shared. | 157 | | The INTA, INTB, INTC, INTD are shared. |
| 156 | +----------------------------------------------------*/ | 158 | +----------------------------------------------------*/ |
| 157 | interrupt-map = < | 159 | interrupt-map = < |
| 158 | 0800 0 0 1 &RT0 24 0 | 160 | 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 |
| 159 | 0800 0 0 2 &RT0 25 0 | 161 | 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 |
| 160 | 0800 0 0 3 &RT0 26 0 | 162 | 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 |
| 161 | 0800 0 0 4 &RT0 27 0 | 163 | 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 |
| 162 | 164 | ||
| 163 | 1000 0 0 1 &RT0 25 0 | 165 | 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 |
| 164 | 1000 0 0 2 &RT0 26 0 | 166 | 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 |
| 165 | 1000 0 0 3 &RT0 27 0 | 167 | 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 |
| 166 | 1000 0 0 4 &RT0 24 0 | 168 | 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 |
| 167 | 169 | ||
| 168 | 1800 0 0 1 &RT0 26 0 | 170 | 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 |
| 169 | 1800 0 0 2 &RT0 27 0 | 171 | 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 |
| 170 | 1800 0 0 3 &RT0 24 0 | 172 | 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 |
| 171 | 1800 0 0 4 &RT0 25 0 | 173 | 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 |
| 172 | 174 | ||
| 173 | 2000 0 0 1 &RT0 27 0 | 175 | 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 |
| 174 | 2000 0 0 2 &RT0 24 0 | 176 | 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 |
| 175 | 2000 0 0 3 &RT0 25 0 | 177 | 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 |
| 176 | 2000 0 0 4 &RT0 26 0 | 178 | 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 |
| 177 | >; | 179 | >; |
| 178 | 180 | ||
| 179 | RT0: router@1180 { | 181 | RT0: router@1180 { |
| @@ -183,7 +185,7 @@ | |||
| 183 | clock-frequency = <0>; | 185 | clock-frequency = <0>; |
| 184 | #address-cells = <0>; | 186 | #address-cells = <0>; |
| 185 | #interrupt-cells = <2>; | 187 | #interrupt-cells = <2>; |
| 186 | interrupts = <17 2>; | 188 | interrupts = <0x17 0x2>; |
| 187 | interrupt-parent = <&MPIC>; | 189 | interrupt-parent = <&MPIC>; |
| 188 | }; | 190 | }; |
| 189 | }; | 191 | }; |
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index cc2873a531d2..b94bf61b9bcc 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts | |||
| @@ -12,12 +12,14 @@ | |||
| 12 | * any warranty of any kind, whether express or implied. | 12 | * any warranty of any kind, whether express or implied. |
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | /dts-v1/; | ||
| 16 | |||
| 15 | / { | 17 | / { |
| 16 | #address-cells = <2>; | 18 | #address-cells = <2>; |
| 17 | #size-cells = <1>; | 19 | #size-cells = <1>; |
| 18 | model = "amcc,katmai"; | 20 | model = "amcc,katmai"; |
| 19 | compatible = "amcc,katmai"; | 21 | compatible = "amcc,katmai"; |
| 20 | dcr-parent = <&/cpus/cpu@0>; | 22 | dcr-parent = <&{/cpus/cpu@0}>; |
| 21 | 23 | ||
| 22 | aliases { | 24 | aliases { |
| 23 | ethernet0 = &EMAC0; | 25 | ethernet0 = &EMAC0; |
| @@ -33,13 +35,13 @@ | |||
| 33 | cpu@0 { | 35 | cpu@0 { |
| 34 | device_type = "cpu"; | 36 | device_type = "cpu"; |
| 35 | model = "PowerPC,440SPe"; | 37 | model = "PowerPC,440SPe"; |
| 36 | reg = <0>; | 38 | reg = <0x00000000>; |
| 37 | clock-frequency = <0>; /* Filled in by zImage */ | 39 | clock-frequency = <0>; /* Filled in by zImage */ |
| 38 | timebase-frequency = <0>; /* Filled in by zImage */ | 40 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 39 | i-cache-line-size = <20>; | 41 | i-cache-line-size = <32>; |
| 40 | d-cache-line-size = <20>; | 42 | d-cache-line-size = <32>; |
| 41 | i-cache-size = <8000>; | 43 | i-cache-size = <32768>; |
| 42 | d-cache-size = <8000>; | 44 | d-cache-size = <32768>; |
| 43 | dcr-controller; | 45 | dcr-controller; |
| 44 | dcr-access-method = "native"; | 46 | dcr-access-method = "native"; |
| 45 | }; | 47 | }; |
| @@ -47,14 +49,14 @@ | |||
| 47 | 49 | ||
| 48 | memory { | 50 | memory { |
| 49 | device_type = "memory"; | 51 | device_type = "memory"; |
| 50 | reg = <0 0 0>; /* Filled in by zImage */ | 52 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
| 51 | }; | 53 | }; |
| 52 | 54 | ||
| 53 | UIC0: interrupt-controller0 { | 55 | UIC0: interrupt-controller0 { |
| 54 | compatible = "ibm,uic-440spe","ibm,uic"; | 56 | compatible = "ibm,uic-440spe","ibm,uic"; |
| 55 | interrupt-controller; | 57 | interrupt-controller; |
| 56 | cell-index = <0>; | 58 | cell-index = <0>; |
| 57 | dcr-reg = <0c0 009>; | 59 | dcr-reg = <0x0c0 0x009>; |
| 58 | #address-cells = <0>; | 60 | #address-cells = <0>; |
| 59 | #size-cells = <0>; | 61 | #size-cells = <0>; |
| 60 | #interrupt-cells = <2>; | 62 | #interrupt-cells = <2>; |
| @@ -64,11 +66,11 @@ | |||
| 64 | compatible = "ibm,uic-440spe","ibm,uic"; | 66 | compatible = "ibm,uic-440spe","ibm,uic"; |
| 65 | interrupt-controller; | 67 | interrupt-controller; |
| 66 | cell-index = <1>; | 68 | cell-index = <1>; |
| 67 | dcr-reg = <0d0 009>; | 69 | dcr-reg = <0x0d0 0x009>; |
| 68 | #address-cells = <0>; | 70 | #address-cells = <0>; |
| 69 | #size-cells = <0>; | 71 | #size-cells = <0>; |
| 70 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
| 71 | interrupts = <1e 4 1f 4>; /* cascade */ | 73 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 72 | interrupt-parent = <&UIC0>; | 74 | interrupt-parent = <&UIC0>; |
| 73 | }; | 75 | }; |
| 74 | 76 | ||
| @@ -76,11 +78,11 @@ | |||
| 76 | compatible = "ibm,uic-440spe","ibm,uic"; | 78 | compatible = "ibm,uic-440spe","ibm,uic"; |
| 77 | interrupt-controller; | 79 | interrupt-controller; |
| 78 | cell-index = <2>; | 80 | cell-index = <2>; |
| 79 | dcr-reg = <0e0 009>; | 81 | dcr-reg = <0x0e0 0x009>; |
| 80 | #address-cells = <0>; | 82 | #address-cells = <0>; |
| 81 | #size-cells = <0>; | 83 | #size-cells = <0>; |
| 82 | #interrupt-cells = <2>; | 84 | #interrupt-cells = <2>; |
| 83 | interrupts = <a 4 b 4>; /* cascade */ | 85 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
| 84 | interrupt-parent = <&UIC0>; | 86 | interrupt-parent = <&UIC0>; |
| 85 | }; | 87 | }; |
| 86 | 88 | ||
| @@ -88,22 +90,22 @@ | |||
| 88 | compatible = "ibm,uic-440spe","ibm,uic"; | 90 | compatible = "ibm,uic-440spe","ibm,uic"; |
| 89 | interrupt-controller; | 91 | interrupt-controller; |
| 90 | cell-index = <3>; | 92 | cell-index = <3>; |
| 91 | dcr-reg = <0f0 009>; | 93 | dcr-reg = <0x0f0 0x009>; |
| 92 | #address-cells = <0>; | 94 | #address-cells = <0>; |
| 93 | #size-cells = <0>; | 95 | #size-cells = <0>; |
| 94 | #interrupt-cells = <2>; | 96 | #interrupt-cells = <2>; |
| 95 | interrupts = <10 4 11 4>; /* cascade */ | 97 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
| 96 | interrupt-parent = <&UIC0>; | 98 | interrupt-parent = <&UIC0>; |
| 97 | }; | 99 | }; |
| 98 | 100 | ||
| 99 | SDR0: sdr { | 101 | SDR0: sdr { |
| 100 | compatible = "ibm,sdr-440spe"; | 102 | compatible = "ibm,sdr-440spe"; |
| 101 | dcr-reg = <00e 002>; | 103 | dcr-reg = <0x00e 0x002>; |
| 102 | }; | 104 | }; |
| 103 | 105 | ||
| 104 | CPR0: cpr { | 106 | CPR0: cpr { |
| 105 | compatible = "ibm,cpr-440spe"; | 107 | compatible = "ibm,cpr-440spe"; |
| 106 | dcr-reg = <00c 002>; | 108 | dcr-reg = <0x00c 0x002>; |
| 107 | }; | 109 | }; |
| 108 | 110 | ||
| 109 | plb { | 111 | plb { |
| @@ -115,108 +117,108 @@ | |||
| 115 | 117 | ||
| 116 | SDRAM0: sdram { | 118 | SDRAM0: sdram { |
| 117 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; | 119 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; |
| 118 | dcr-reg = <010 2>; | 120 | dcr-reg = <0x010 0x002>; |
| 119 | }; | 121 | }; |
| 120 | 122 | ||
| 121 | MAL0: mcmal { | 123 | MAL0: mcmal { |
| 122 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; | 124 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; |
| 123 | dcr-reg = <180 62>; | 125 | dcr-reg = <0x180 0x062>; |
| 124 | num-tx-chans = <2>; | 126 | num-tx-chans = <2>; |
| 125 | num-rx-chans = <1>; | 127 | num-rx-chans = <1>; |
| 126 | interrupt-parent = <&MAL0>; | 128 | interrupt-parent = <&MAL0>; |
| 127 | interrupts = <0 1 2 3 4>; | 129 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 128 | #interrupt-cells = <1>; | 130 | #interrupt-cells = <1>; |
| 129 | #address-cells = <0>; | 131 | #address-cells = <0>; |
| 130 | #size-cells = <0>; | 132 | #size-cells = <0>; |
| 131 | interrupt-map = </*TXEOB*/ 0 &UIC1 6 4 | 133 | interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 |
| 132 | /*RXEOB*/ 1 &UIC1 7 4 | 134 | /*RXEOB*/ 0x1 &UIC1 0x7 0x4 |
| 133 | /*SERR*/ 2 &UIC1 1 4 | 135 | /*SERR*/ 0x2 &UIC1 0x1 0x4 |
| 134 | /*TXDE*/ 3 &UIC1 2 4 | 136 | /*TXDE*/ 0x3 &UIC1 0x2 0x4 |
| 135 | /*RXDE*/ 4 &UIC1 3 4>; | 137 | /*RXDE*/ 0x4 &UIC1 0x3 0x4>; |
| 136 | }; | 138 | }; |
| 137 | 139 | ||
| 138 | POB0: opb { | 140 | POB0: opb { |
| 139 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; | 141 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; |
| 140 | #address-cells = <1>; | 142 | #address-cells = <1>; |
| 141 | #size-cells = <1>; | 143 | #size-cells = <1>; |
| 142 | ranges = <00000000 4 e0000000 20000000>; | 144 | ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>; |
| 143 | clock-frequency = <0>; /* Filled in by zImage */ | 145 | clock-frequency = <0>; /* Filled in by zImage */ |
| 144 | 146 | ||
| 145 | EBC0: ebc { | 147 | EBC0: ebc { |
| 146 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; | 148 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; |
| 147 | dcr-reg = <012 2>; | 149 | dcr-reg = <0x012 0x002>; |
| 148 | #address-cells = <2>; | 150 | #address-cells = <2>; |
| 149 | #size-cells = <1>; | 151 | #size-cells = <1>; |
| 150 | clock-frequency = <0>; /* Filled in by zImage */ | 152 | clock-frequency = <0>; /* Filled in by zImage */ |
| 151 | interrupts = <5 1>; | 153 | interrupts = <0x5 0x1>; |
| 152 | interrupt-parent = <&UIC1>; | 154 | interrupt-parent = <&UIC1>; |
| 153 | }; | 155 | }; |
| 154 | 156 | ||
| 155 | UART0: serial@10000200 { | 157 | UART0: serial@10000200 { |
| 156 | device_type = "serial"; | 158 | device_type = "serial"; |
| 157 | compatible = "ns16550"; | 159 | compatible = "ns16550"; |
| 158 | reg = <10000200 8>; | 160 | reg = <0x10000200 0x00000008>; |
| 159 | virtual-reg = <a0000200>; | 161 | virtual-reg = <0xa0000200>; |
| 160 | clock-frequency = <0>; /* Filled in by zImage */ | 162 | clock-frequency = <0>; /* Filled in by zImage */ |
| 161 | current-speed = <1c200>; | 163 | current-speed = <115200>; |
| 162 | interrupt-parent = <&UIC0>; | 164 | interrupt-parent = <&UIC0>; |
| 163 | interrupts = <0 4>; | 165 | interrupts = <0x0 0x4>; |
| 164 | }; | 166 | }; |
| 165 | 167 | ||
| 166 | UART1: serial@10000300 { | 168 | UART1: serial@10000300 { |
| 167 | device_type = "serial"; | 169 | device_type = "serial"; |
| 168 | compatible = "ns16550"; | 170 | compatible = "ns16550"; |
| 169 | reg = <10000300 8>; | 171 | reg = <0x10000300 0x00000008>; |
| 170 | virtual-reg = <a0000300>; | 172 | virtual-reg = <0xa0000300>; |
| 171 | clock-frequency = <0>; | 173 | clock-frequency = <0>; |
| 172 | current-speed = <0>; | 174 | current-speed = <0>; |
| 173 | interrupt-parent = <&UIC0>; | 175 | interrupt-parent = <&UIC0>; |
| 174 | interrupts = <1 4>; | 176 | interrupts = <0x1 0x4>; |
| 175 | }; | 177 | }; |
| 176 | 178 | ||
| 177 | 179 | ||
| 178 | UART2: serial@10000600 { | 180 | UART2: serial@10000600 { |
| 179 | device_type = "serial"; | 181 | device_type = "serial"; |
| 180 | compatible = "ns16550"; | 182 | compatible = "ns16550"; |
| 181 | reg = <10000600 8>; | 183 | reg = <0x10000600 0x00000008>; |
| 182 | virtual-reg = <a0000600>; | 184 | virtual-reg = <0xa0000600>; |
| 183 | clock-frequency = <0>; | 185 | clock-frequency = <0>; |
| 184 | current-speed = <0>; | 186 | current-speed = <0>; |
| 185 | interrupt-parent = <&UIC1>; | 187 | interrupt-parent = <&UIC1>; |
| 186 | interrupts = <5 4>; | 188 | interrupts = <0x5 0x4>; |
| 187 | }; | 189 | }; |
| 188 | 190 | ||
| 189 | IIC0: i2c@10000400 { | 191 | IIC0: i2c@10000400 { |
| 190 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | 192 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; |
| 191 | reg = <10000400 14>; | 193 | reg = <0x10000400 0x00000014>; |
| 192 | interrupt-parent = <&UIC0>; | 194 | interrupt-parent = <&UIC0>; |
| 193 | interrupts = <2 4>; | 195 | interrupts = <0x2 0x4>; |
| 194 | }; | 196 | }; |
| 195 | 197 | ||
| 196 | IIC1: i2c@10000500 { | 198 | IIC1: i2c@10000500 { |
| 197 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | 199 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; |
| 198 | reg = <10000500 14>; | 200 | reg = <0x10000500 0x00000014>; |
| 199 | interrupt-parent = <&UIC0>; | 201 | interrupt-parent = <&UIC0>; |
| 200 | interrupts = <3 4>; | 202 | interrupts = <0x3 0x4>; |
| 201 | }; | 203 | }; |
| 202 | 204 | ||
| 203 | EMAC0: ethernet@10000800 { | 205 | EMAC0: ethernet@10000800 { |
| 204 | linux,network-index = <0>; | 206 | linux,network-index = <0x0>; |
| 205 | device_type = "network"; | 207 | device_type = "network"; |
| 206 | compatible = "ibm,emac-440spe", "ibm,emac4"; | 208 | compatible = "ibm,emac-440spe", "ibm,emac4"; |
| 207 | interrupt-parent = <&UIC1>; | 209 | interrupt-parent = <&UIC1>; |
| 208 | interrupts = <1c 4 1d 4>; | 210 | interrupts = <0x1c 0x4 0x1d 0x4>; |
| 209 | reg = <10000800 70>; | 211 | reg = <0x10000800 0x00000070>; |
| 210 | local-mac-address = [000000000000]; | 212 | local-mac-address = [000000000000]; |
| 211 | mal-device = <&MAL0>; | 213 | mal-device = <&MAL0>; |
| 212 | mal-tx-channel = <0>; | 214 | mal-tx-channel = <0>; |
| 213 | mal-rx-channel = <0>; | 215 | mal-rx-channel = <0>; |
| 214 | cell-index = <0>; | 216 | cell-index = <0>; |
| 215 | max-frame-size = <2328>; | 217 | max-frame-size = <9000>; |
| 216 | rx-fifo-size = <1000>; | 218 | rx-fifo-size = <4096>; |
| 217 | tx-fifo-size = <800>; | 219 | tx-fifo-size = <2048>; |
| 218 | phy-mode = "gmii"; | 220 | phy-mode = "gmii"; |
| 219 | phy-map = <00000000>; | 221 | phy-map = <0x00000000>; |
| 220 | has-inverted-stacr-oc; | 222 | has-inverted-stacr-oc; |
| 221 | has-new-stacr-staopc; | 223 | has-new-stacr-staopc; |
| 222 | }; | 224 | }; |
| @@ -231,23 +233,23 @@ | |||
| 231 | primary; | 233 | primary; |
| 232 | large-inbound-windows; | 234 | large-inbound-windows; |
| 233 | enable-msi-hole; | 235 | enable-msi-hole; |
| 234 | reg = <c 0ec00000 8 /* Config space access */ | 236 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ |
| 235 | 0 0 0 /* no IACK cycles */ | 237 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
| 236 | c 0ed00000 4 /* Special cycles */ | 238 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ |
| 237 | c 0ec80000 100 /* Internal registers */ | 239 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ |
| 238 | c 0ec80100 fc>; /* Internal messaging registers */ | 240 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
| 239 | 241 | ||
| 240 | /* Outbound ranges, one memory and one IO, | 242 | /* Outbound ranges, one memory and one IO, |
| 241 | * later cannot be changed | 243 | * later cannot be changed |
| 242 | */ | 244 | */ |
| 243 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | 245 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 |
| 244 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | 246 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; |
| 245 | 247 | ||
| 246 | /* Inbound 2GB range starting at 0 */ | 248 | /* Inbound 2GB range starting at 0 */ |
| 247 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 249 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 248 | 250 | ||
| 249 | /* This drives busses 0 to 0xf */ | 251 | /* This drives busses 0 to 0xf */ |
| 250 | bus-range = <0 f>; | 252 | bus-range = <0x0 0xf>; |
| 251 | 253 | ||
| 252 | /* | 254 | /* |
| 253 | * On Katmai, the following PCI-X interrupts signals | 255 | * On Katmai, the following PCI-X interrupts signals |
| @@ -258,13 +260,13 @@ | |||
| 258 | * INTC: J2: 1-2 | 260 | * INTC: J2: 1-2 |
| 259 | * INTD: J1: 1-2 | 261 | * INTD: J1: 1-2 |
| 260 | */ | 262 | */ |
| 261 | interrupt-map-mask = <f800 0 0 7>; | 263 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 262 | interrupt-map = < | 264 | interrupt-map = < |
| 263 | /* IDSEL 1 */ | 265 | /* IDSEL 1 */ |
| 264 | 0800 0 0 1 &UIC1 14 8 | 266 | 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 |
| 265 | 0800 0 0 2 &UIC1 13 8 | 267 | 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 |
| 266 | 0800 0 0 3 &UIC1 12 8 | 268 | 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 |
| 267 | 0800 0 0 4 &UIC1 11 8 | 269 | 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 |
| 268 | >; | 270 | >; |
| 269 | }; | 271 | }; |
| 270 | 272 | ||
| @@ -275,23 +277,23 @@ | |||
| 275 | #address-cells = <3>; | 277 | #address-cells = <3>; |
| 276 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | 278 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
| 277 | primary; | 279 | primary; |
| 278 | port = <0>; /* port number */ | 280 | port = <0x0>; /* port number */ |
| 279 | reg = <d 00000000 20000000 /* Config space access */ | 281 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
| 280 | c 10000000 00001000>; /* Registers */ | 282 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ |
| 281 | dcr-reg = <100 020>; | 283 | dcr-reg = <0x100 0x020>; |
| 282 | sdr-base = <300>; | 284 | sdr-base = <0x300>; |
| 283 | 285 | ||
| 284 | /* Outbound ranges, one memory and one IO, | 286 | /* Outbound ranges, one memory and one IO, |
| 285 | * later cannot be changed | 287 | * later cannot be changed |
| 286 | */ | 288 | */ |
| 287 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | 289 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
| 288 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | 290 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
| 289 | 291 | ||
| 290 | /* Inbound 2GB range starting at 0 */ | 292 | /* Inbound 2GB range starting at 0 */ |
| 291 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 293 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 292 | 294 | ||
| 293 | /* This drives busses 10 to 0x1f */ | 295 | /* This drives busses 10 to 0x1f */ |
| 294 | bus-range = <10 1f>; | 296 | bus-range = <0x10 0x1f>; |
| 295 | 297 | ||
| 296 | /* Legacy interrupts (note the weird polarity, the bridge seems | 298 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 297 | * to invert PCIe legacy interrupts). | 299 | * to invert PCIe legacy interrupts). |
| @@ -301,12 +303,12 @@ | |||
| 301 | * below are basically de-swizzled numbers. | 303 | * below are basically de-swizzled numbers. |
| 302 | * The real slot is on idsel 0, so the swizzling is 1:1 | 304 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 303 | */ | 305 | */ |
| 304 | interrupt-map-mask = <0000 0 0 7>; | 306 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 305 | interrupt-map = < | 307 | interrupt-map = < |
| 306 | 0000 0 0 1 &UIC3 0 4 /* swizzled int A */ | 308 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ |
| 307 | 0000 0 0 2 &UIC3 1 4 /* swizzled int B */ | 309 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ |
| 308 | 0000 0 0 3 &UIC3 2 4 /* swizzled int C */ | 310 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ |
| 309 | 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>; | 311 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; |
| 310 | }; | 312 | }; |
| 311 | 313 | ||
| 312 | PCIE1: pciex@d20000000 { | 314 | PCIE1: pciex@d20000000 { |
| @@ -316,23 +318,23 @@ | |||
| 316 | #address-cells = <3>; | 318 | #address-cells = <3>; |
| 317 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | 319 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
| 318 | primary; | 320 | primary; |
| 319 | port = <1>; /* port number */ | 321 | port = <0x1>; /* port number */ |
| 320 | reg = <d 20000000 20000000 /* Config space access */ | 322 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ |
| 321 | c 10001000 00001000>; /* Registers */ | 323 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ |
| 322 | dcr-reg = <120 020>; | 324 | dcr-reg = <0x120 0x020>; |
| 323 | sdr-base = <340>; | 325 | sdr-base = <0x340>; |
| 324 | 326 | ||
| 325 | /* Outbound ranges, one memory and one IO, | 327 | /* Outbound ranges, one memory and one IO, |
| 326 | * later cannot be changed | 328 | * later cannot be changed |
| 327 | */ | 329 | */ |
| 328 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | 330 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 |
| 329 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | 331 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; |
| 330 | 332 | ||
| 331 | /* Inbound 2GB range starting at 0 */ | 333 | /* Inbound 2GB range starting at 0 */ |
| 332 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 334 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 333 | 335 | ||
| 334 | /* This drives busses 10 to 0x1f */ | 336 | /* This drives busses 10 to 0x1f */ |
| 335 | bus-range = <20 2f>; | 337 | bus-range = <0x20 0x2f>; |
| 336 | 338 | ||
| 337 | /* Legacy interrupts (note the weird polarity, the bridge seems | 339 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 338 | * to invert PCIe legacy interrupts). | 340 | * to invert PCIe legacy interrupts). |
| @@ -342,12 +344,12 @@ | |||
| 342 | * below are basically de-swizzled numbers. | 344 | * below are basically de-swizzled numbers. |
| 343 | * The real slot is on idsel 0, so the swizzling is 1:1 | 345 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 344 | */ | 346 | */ |
| 345 | interrupt-map-mask = <0000 0 0 7>; | 347 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 346 | interrupt-map = < | 348 | interrupt-map = < |
| 347 | 0000 0 0 1 &UIC3 4 4 /* swizzled int A */ | 349 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ |
| 348 | 0000 0 0 2 &UIC3 5 4 /* swizzled int B */ | 350 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ |
| 349 | 0000 0 0 3 &UIC3 6 4 /* swizzled int C */ | 351 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ |
| 350 | 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>; | 352 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; |
| 351 | }; | 353 | }; |
| 352 | 354 | ||
| 353 | PCIE2: pciex@d40000000 { | 355 | PCIE2: pciex@d40000000 { |
| @@ -357,23 +359,23 @@ | |||
| 357 | #address-cells = <3>; | 359 | #address-cells = <3>; |
| 358 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | 360 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
| 359 | primary; | 361 | primary; |
| 360 | port = <2>; /* port number */ | 362 | port = <0x2>; /* port number */ |
| 361 | reg = <d 40000000 20000000 /* Config space access */ | 363 | reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ |
| 362 | c 10002000 00001000>; /* Registers */ | 364 | 0x0000000c 0x10002000 0x00001000>; /* Registers */ |
| 363 | dcr-reg = <140 020>; | 365 | dcr-reg = <0x140 0x020>; |
| 364 | sdr-base = <370>; | 366 | sdr-base = <0x370>; |
| 365 | 367 | ||
| 366 | /* Outbound ranges, one memory and one IO, | 368 | /* Outbound ranges, one memory and one IO, |
| 367 | * later cannot be changed | 369 | * later cannot be changed |
| 368 | */ | 370 | */ |
| 369 | ranges = <02000000 0 80000000 0000000f 00000000 0 80000000 | 371 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 |
| 370 | 01000000 0 00000000 0000000f 80020000 0 00010000>; | 372 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; |
| 371 | 373 | ||
| 372 | /* Inbound 2GB range starting at 0 */ | 374 | /* Inbound 2GB range starting at 0 */ |
| 373 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 375 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 374 | 376 | ||
| 375 | /* This drives busses 10 to 0x1f */ | 377 | /* This drives busses 10 to 0x1f */ |
| 376 | bus-range = <30 3f>; | 378 | bus-range = <0x30 0x3f>; |
| 377 | 379 | ||
| 378 | /* Legacy interrupts (note the weird polarity, the bridge seems | 380 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 379 | * to invert PCIe legacy interrupts). | 381 | * to invert PCIe legacy interrupts). |
| @@ -383,12 +385,12 @@ | |||
| 383 | * below are basically de-swizzled numbers. | 385 | * below are basically de-swizzled numbers. |
| 384 | * The real slot is on idsel 0, so the swizzling is 1:1 | 386 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 385 | */ | 387 | */ |
| 386 | interrupt-map-mask = <0000 0 0 7>; | 388 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 387 | interrupt-map = < | 389 | interrupt-map = < |
| 388 | 0000 0 0 1 &UIC3 8 4 /* swizzled int A */ | 390 | 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ |
| 389 | 0000 0 0 2 &UIC3 9 4 /* swizzled int B */ | 391 | 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ |
| 390 | 0000 0 0 3 &UIC3 a 4 /* swizzled int C */ | 392 | 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ |
| 391 | 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>; | 393 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; |
| 392 | }; | 394 | }; |
| 393 | }; | 395 | }; |
| 394 | 396 | ||
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 48c9a6e71f1a..3ed6a8fee1d5 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts | |||
| @@ -8,12 +8,14 @@ | |||
| 8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | /dts-v1/; | ||
| 12 | |||
| 11 | / { | 13 | / { |
| 12 | #address-cells = <1>; | 14 | #address-cells = <1>; |
| 13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
| 14 | model = "amcc,kilauea"; | 16 | model = "amcc,kilauea"; |
| 15 | compatible = "amcc,kilauea"; | 17 | compatible = "amcc,kilauea"; |
| 16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
| 17 | 19 | ||
| 18 | aliases { | 20 | aliases { |
| 19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
| @@ -29,13 +31,13 @@ | |||
| 29 | cpu@0 { | 31 | cpu@0 { |
| 30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
| 31 | model = "PowerPC,405EX"; | 33 | model = "PowerPC,405EX"; |
| 32 | reg = <0>; | 34 | reg = <0x00000000>; |
| 33 | clock-frequency = <0>; /* Filled in by U-Boot */ | 35 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
| 35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
| 36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
| 37 | i-cache-size = <4000>; /* 16 kB */ | 39 | i-cache-size = <16384>; /* 16 kB */ |
| 38 | d-cache-size = <4000>; /* 16 kB */ | 40 | d-cache-size = <16384>; /* 16 kB */ |
| 39 | dcr-controller; | 41 | dcr-controller; |
| 40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
| 41 | }; | 43 | }; |
| @@ -43,14 +45,14 @@ | |||
| 43 | 45 | ||
| 44 | memory { | 46 | memory { |
| 45 | device_type = "memory"; | 47 | device_type = "memory"; |
| 46 | reg = <0 0>; /* Filled in by U-Boot */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ |
| 47 | }; | 49 | }; |
| 48 | 50 | ||
| 49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
| 50 | compatible = "ibm,uic-405ex", "ibm,uic"; | 52 | compatible = "ibm,uic-405ex", "ibm,uic"; |
| 51 | interrupt-controller; | 53 | interrupt-controller; |
| 52 | cell-index = <0>; | 54 | cell-index = <0>; |
| 53 | dcr-reg = <0c0 009>; | 55 | dcr-reg = <0x0c0 0x009>; |
| 54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
| 55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
| 56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
| @@ -60,11 +62,11 @@ | |||
| 60 | compatible = "ibm,uic-405ex","ibm,uic"; | 62 | compatible = "ibm,uic-405ex","ibm,uic"; |
| 61 | interrupt-controller; | 63 | interrupt-controller; |
| 62 | cell-index = <1>; | 64 | cell-index = <1>; |
| 63 | dcr-reg = <0d0 009>; | 65 | dcr-reg = <0x0d0 0x009>; |
| 64 | #address-cells = <0>; | 66 | #address-cells = <0>; |
| 65 | #size-cells = <0>; | 67 | #size-cells = <0>; |
| 66 | #interrupt-cells = <2>; | 68 | #interrupt-cells = <2>; |
| 67 | interrupts = <1e 4 1f 4>; /* cascade */ | 69 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 68 | interrupt-parent = <&UIC0>; | 70 | interrupt-parent = <&UIC0>; |
| 69 | }; | 71 | }; |
| 70 | 72 | ||
| @@ -72,11 +74,11 @@ | |||
| 72 | compatible = "ibm,uic-405ex","ibm,uic"; | 74 | compatible = "ibm,uic-405ex","ibm,uic"; |
| 73 | interrupt-controller; | 75 | interrupt-controller; |
| 74 | cell-index = <2>; | 76 | cell-index = <2>; |
| 75 | dcr-reg = <0e0 009>; | 77 | dcr-reg = <0x0e0 0x009>; |
| 76 | #address-cells = <0>; | 78 | #address-cells = <0>; |
| 77 | #size-cells = <0>; | 79 | #size-cells = <0>; |
| 78 | #interrupt-cells = <2>; | 80 | #interrupt-cells = <2>; |
| 79 | interrupts = <1c 4 1d 4>; /* cascade */ | 81 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
| 80 | interrupt-parent = <&UIC0>; | 82 | interrupt-parent = <&UIC0>; |
| 81 | }; | 83 | }; |
| 82 | 84 | ||
| @@ -89,72 +91,72 @@ | |||
| 89 | 91 | ||
| 90 | SDRAM0: memory-controller { | 92 | SDRAM0: memory-controller { |
| 91 | compatible = "ibm,sdram-405ex"; | 93 | compatible = "ibm,sdram-405ex"; |
| 92 | dcr-reg = <010 2>; | 94 | dcr-reg = <0x010 0x002>; |
| 93 | }; | 95 | }; |
| 94 | 96 | ||
| 95 | MAL0: mcmal { | 97 | MAL0: mcmal { |
| 96 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; | 98 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; |
| 97 | dcr-reg = <180 62>; | 99 | dcr-reg = <0x180 0x062>; |
| 98 | num-tx-chans = <2>; | 100 | num-tx-chans = <2>; |
| 99 | num-rx-chans = <2>; | 101 | num-rx-chans = <2>; |
| 100 | interrupt-parent = <&MAL0>; | 102 | interrupt-parent = <&MAL0>; |
| 101 | interrupts = <0 1 2 3 4>; | 103 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 102 | #interrupt-cells = <1>; | 104 | #interrupt-cells = <1>; |
| 103 | #address-cells = <0>; | 105 | #address-cells = <0>; |
| 104 | #size-cells = <0>; | 106 | #size-cells = <0>; |
| 105 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 107 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 106 | /*RXEOB*/ 1 &UIC0 b 4 | 108 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 107 | /*SERR*/ 2 &UIC1 0 4 | 109 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 108 | /*TXDE*/ 3 &UIC1 1 4 | 110 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 109 | /*RXDE*/ 4 &UIC1 2 4>; | 111 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 110 | interrupt-map-mask = <ffffffff>; | 112 | interrupt-map-mask = <0xffffffff>; |
| 111 | }; | 113 | }; |
| 112 | 114 | ||
| 113 | POB0: opb { | 115 | POB0: opb { |
| 114 | compatible = "ibm,opb-405ex", "ibm,opb"; | 116 | compatible = "ibm,opb-405ex", "ibm,opb"; |
| 115 | #address-cells = <1>; | 117 | #address-cells = <1>; |
| 116 | #size-cells = <1>; | 118 | #size-cells = <1>; |
| 117 | ranges = <80000000 80000000 10000000 | 119 | ranges = <0x80000000 0x80000000 0x10000000 |
| 118 | ef600000 ef600000 a00000 | 120 | 0xef600000 0xef600000 0x00a00000 |
| 119 | f0000000 f0000000 10000000>; | 121 | 0xf0000000 0xf0000000 0x10000000>; |
| 120 | dcr-reg = <0a0 5>; | 122 | dcr-reg = <0x0a0 0x005>; |
| 121 | clock-frequency = <0>; /* Filled in by U-Boot */ | 123 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 122 | 124 | ||
| 123 | EBC0: ebc { | 125 | EBC0: ebc { |
| 124 | compatible = "ibm,ebc-405ex", "ibm,ebc"; | 126 | compatible = "ibm,ebc-405ex", "ibm,ebc"; |
| 125 | dcr-reg = <012 2>; | 127 | dcr-reg = <0x012 0x002>; |
| 126 | #address-cells = <2>; | 128 | #address-cells = <2>; |
| 127 | #size-cells = <1>; | 129 | #size-cells = <1>; |
| 128 | clock-frequency = <0>; /* Filled in by U-Boot */ | 130 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 129 | /* ranges property is supplied by U-Boot */ | 131 | /* ranges property is supplied by U-Boot */ |
| 130 | interrupts = <5 1>; | 132 | interrupts = <0x5 0x1>; |
| 131 | interrupt-parent = <&UIC1>; | 133 | interrupt-parent = <&UIC1>; |
| 132 | 134 | ||
| 133 | nor_flash@0,0 { | 135 | nor_flash@0,0 { |
| 134 | compatible = "amd,s29gl512n", "cfi-flash"; | 136 | compatible = "amd,s29gl512n", "cfi-flash"; |
| 135 | bank-width = <2>; | 137 | bank-width = <2>; |
| 136 | reg = <0 000000 4000000>; | 138 | reg = <0x00000000 0x00000000 0x04000000>; |
| 137 | #address-cells = <1>; | 139 | #address-cells = <1>; |
| 138 | #size-cells = <1>; | 140 | #size-cells = <1>; |
| 139 | partition@0 { | 141 | partition@0 { |
| 140 | label = "kernel"; | 142 | label = "kernel"; |
| 141 | reg = <0 200000>; | 143 | reg = <0x00000000 0x00200000>; |
| 142 | }; | 144 | }; |
| 143 | partition@200000 { | 145 | partition@200000 { |
| 144 | label = "root"; | 146 | label = "root"; |
| 145 | reg = <200000 200000>; | 147 | reg = <0x00200000 0x00200000>; |
| 146 | }; | 148 | }; |
| 147 | partition@400000 { | 149 | partition@400000 { |
| 148 | label = "user"; | 150 | label = "user"; |
| 149 | reg = <400000 3b60000>; | 151 | reg = <0x00400000 0x03b60000>; |
| 150 | }; | 152 | }; |
| 151 | partition@3f60000 { | 153 | partition@3f60000 { |
| 152 | label = "env"; | 154 | label = "env"; |
| 153 | reg = <3f60000 40000>; | 155 | reg = <0x03f60000 0x00040000>; |
| 154 | }; | 156 | }; |
| 155 | partition@3fa0000 { | 157 | partition@3fa0000 { |
| 156 | label = "u-boot"; | 158 | label = "u-boot"; |
| 157 | reg = <3fa0000 60000>; | 159 | reg = <0x03fa0000 0x00060000>; |
| 158 | }; | 160 | }; |
| 159 | }; | 161 | }; |
| 160 | }; | 162 | }; |
| @@ -162,68 +164,68 @@ | |||
| 162 | UART0: serial@ef600200 { | 164 | UART0: serial@ef600200 { |
| 163 | device_type = "serial"; | 165 | device_type = "serial"; |
| 164 | compatible = "ns16550"; | 166 | compatible = "ns16550"; |
| 165 | reg = <ef600200 8>; | 167 | reg = <0xef600200 0x00000008>; |
| 166 | virtual-reg = <ef600200>; | 168 | virtual-reg = <0xef600200>; |
| 167 | clock-frequency = <0>; /* Filled in by U-Boot */ | 169 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 168 | current-speed = <0>; | 170 | current-speed = <0>; |
| 169 | interrupt-parent = <&UIC0>; | 171 | interrupt-parent = <&UIC0>; |
| 170 | interrupts = <1a 4>; | 172 | interrupts = <0x1a 0x4>; |
| 171 | }; | 173 | }; |
| 172 | 174 | ||
| 173 | UART1: serial@ef600300 { | 175 | UART1: serial@ef600300 { |
| 174 | device_type = "serial"; | 176 | device_type = "serial"; |
| 175 | compatible = "ns16550"; | 177 | compatible = "ns16550"; |
| 176 | reg = <ef600300 8>; | 178 | reg = <0xef600300 0x00000008>; |
| 177 | virtual-reg = <ef600300>; | 179 | virtual-reg = <0xef600300>; |
| 178 | clock-frequency = <0>; /* Filled in by U-Boot */ | 180 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 179 | current-speed = <0>; | 181 | current-speed = <0>; |
| 180 | interrupt-parent = <&UIC0>; | 182 | interrupt-parent = <&UIC0>; |
| 181 | interrupts = <1 4>; | 183 | interrupts = <0x1 0x4>; |
| 182 | }; | 184 | }; |
| 183 | 185 | ||
| 184 | IIC0: i2c@ef600400 { | 186 | IIC0: i2c@ef600400 { |
| 185 | compatible = "ibm,iic-405ex", "ibm,iic"; | 187 | compatible = "ibm,iic-405ex", "ibm,iic"; |
| 186 | reg = <ef600400 14>; | 188 | reg = <0xef600400 0x00000014>; |
| 187 | interrupt-parent = <&UIC0>; | 189 | interrupt-parent = <&UIC0>; |
| 188 | interrupts = <2 4>; | 190 | interrupts = <0x2 0x4>; |
| 189 | }; | 191 | }; |
| 190 | 192 | ||
| 191 | IIC1: i2c@ef600500 { | 193 | IIC1: i2c@ef600500 { |
| 192 | compatible = "ibm,iic-405ex", "ibm,iic"; | 194 | compatible = "ibm,iic-405ex", "ibm,iic"; |
| 193 | reg = <ef600500 14>; | 195 | reg = <0xef600500 0x00000014>; |
| 194 | interrupt-parent = <&UIC0>; | 196 | interrupt-parent = <&UIC0>; |
| 195 | interrupts = <7 4>; | 197 | interrupts = <0x7 0x4>; |
| 196 | }; | 198 | }; |
| 197 | 199 | ||
| 198 | 200 | ||
| 199 | RGMII0: emac-rgmii@ef600b00 { | 201 | RGMII0: emac-rgmii@ef600b00 { |
| 200 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; | 202 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; |
| 201 | reg = <ef600b00 104>; | 203 | reg = <0xef600b00 0x00000104>; |
| 202 | has-mdio; | 204 | has-mdio; |
| 203 | }; | 205 | }; |
| 204 | 206 | ||
| 205 | EMAC0: ethernet@ef600900 { | 207 | EMAC0: ethernet@ef600900 { |
| 206 | linux,network-index = <0>; | 208 | linux,network-index = <0x0>; |
| 207 | device_type = "network"; | 209 | device_type = "network"; |
| 208 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 210 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
| 209 | interrupt-parent = <&EMAC0>; | 211 | interrupt-parent = <&EMAC0>; |
| 210 | interrupts = <0 1>; | 212 | interrupts = <0x0 0x1>; |
| 211 | #interrupt-cells = <1>; | 213 | #interrupt-cells = <1>; |
| 212 | #address-cells = <0>; | 214 | #address-cells = <0>; |
| 213 | #size-cells = <0>; | 215 | #size-cells = <0>; |
| 214 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 216 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
| 215 | /*Wake*/ 1 &UIC1 1d 4>; | 217 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
| 216 | reg = <ef600900 70>; | 218 | reg = <0xef600900 0x00000070>; |
| 217 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 219 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 218 | mal-device = <&MAL0>; | 220 | mal-device = <&MAL0>; |
| 219 | mal-tx-channel = <0>; | 221 | mal-tx-channel = <0>; |
| 220 | mal-rx-channel = <0>; | 222 | mal-rx-channel = <0>; |
| 221 | cell-index = <0>; | 223 | cell-index = <0>; |
| 222 | max-frame-size = <2328>; | 224 | max-frame-size = <9000>; |
| 223 | rx-fifo-size = <1000>; | 225 | rx-fifo-size = <4096>; |
| 224 | tx-fifo-size = <800>; | 226 | tx-fifo-size = <2048>; |
| 225 | phy-mode = "rgmii"; | 227 | phy-mode = "rgmii"; |
| 226 | phy-map = <00000000>; | 228 | phy-map = <0x00000000>; |
| 227 | rgmii-device = <&RGMII0>; | 229 | rgmii-device = <&RGMII0>; |
| 228 | rgmii-channel = <0>; | 230 | rgmii-channel = <0>; |
| 229 | has-inverted-stacr-oc; | 231 | has-inverted-stacr-oc; |
| @@ -231,27 +233,27 @@ | |||
| 231 | }; | 233 | }; |
| 232 | 234 | ||
| 233 | EMAC1: ethernet@ef600a00 { | 235 | EMAC1: ethernet@ef600a00 { |
| 234 | linux,network-index = <1>; | 236 | linux,network-index = <0x1>; |
| 235 | device_type = "network"; | 237 | device_type = "network"; |
| 236 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 238 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
| 237 | interrupt-parent = <&EMAC1>; | 239 | interrupt-parent = <&EMAC1>; |
| 238 | interrupts = <0 1>; | 240 | interrupts = <0x0 0x1>; |
| 239 | #interrupt-cells = <1>; | 241 | #interrupt-cells = <1>; |
| 240 | #address-cells = <0>; | 242 | #address-cells = <0>; |
| 241 | #size-cells = <0>; | 243 | #size-cells = <0>; |
| 242 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 244 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
| 243 | /*Wake*/ 1 &UIC1 1f 4>; | 245 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
| 244 | reg = <ef600a00 70>; | 246 | reg = <0xef600a00 0x00000070>; |
| 245 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 247 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 246 | mal-device = <&MAL0>; | 248 | mal-device = <&MAL0>; |
| 247 | mal-tx-channel = <1>; | 249 | mal-tx-channel = <1>; |
| 248 | mal-rx-channel = <1>; | 250 | mal-rx-channel = <1>; |
| 249 | cell-index = <1>; | 251 | cell-index = <1>; |
| 250 | max-frame-size = <2328>; | 252 | max-frame-size = <9000>; |
| 251 | rx-fifo-size = <1000>; | 253 | rx-fifo-size = <4096>; |
| 252 | tx-fifo-size = <800>; | 254 | tx-fifo-size = <2048>; |
| 253 | phy-mode = "rgmii"; | 255 | phy-mode = "rgmii"; |
| 254 | phy-map = <00000000>; | 256 | phy-map = <0x00000000>; |
| 255 | rgmii-device = <&RGMII0>; | 257 | rgmii-device = <&RGMII0>; |
| 256 | rgmii-channel = <1>; | 258 | rgmii-channel = <1>; |
| 257 | has-inverted-stacr-oc; | 259 | has-inverted-stacr-oc; |
| @@ -266,23 +268,23 @@ | |||
| 266 | #address-cells = <3>; | 268 | #address-cells = <3>; |
| 267 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 269 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
| 268 | primary; | 270 | primary; |
| 269 | port = <0>; /* port number */ | 271 | port = <0x0>; /* port number */ |
| 270 | reg = <a0000000 20000000 /* Config space access */ | 272 | reg = <0xa0000000 0x20000000 /* Config space access */ |
| 271 | ef000000 00001000>; /* Registers */ | 273 | 0xef000000 0x00001000>; /* Registers */ |
| 272 | dcr-reg = <040 020>; | 274 | dcr-reg = <0x040 0x020>; |
| 273 | sdr-base = <400>; | 275 | sdr-base = <0x400>; |
| 274 | 276 | ||
| 275 | /* Outbound ranges, one memory and one IO, | 277 | /* Outbound ranges, one memory and one IO, |
| 276 | * later cannot be changed | 278 | * later cannot be changed |
| 277 | */ | 279 | */ |
| 278 | ranges = <02000000 0 80000000 90000000 0 08000000 | 280 | ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 |
| 279 | 01000000 0 00000000 e0000000 0 00010000>; | 281 | 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; |
| 280 | 282 | ||
| 281 | /* Inbound 2GB range starting at 0 */ | 283 | /* Inbound 2GB range starting at 0 */ |
| 282 | dma-ranges = <42000000 0 0 0 0 80000000>; | 284 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 283 | 285 | ||
| 284 | /* This drives busses 0x00 to 0x3f */ | 286 | /* This drives busses 0x00 to 0x3f */ |
| 285 | bus-range = <00 3f>; | 287 | bus-range = <0x0 0x3f>; |
| 286 | 288 | ||
| 287 | /* Legacy interrupts (note the weird polarity, the bridge seems | 289 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 288 | * to invert PCIe legacy interrupts). | 290 | * to invert PCIe legacy interrupts). |
| @@ -292,12 +294,12 @@ | |||
| 292 | * below are basically de-swizzled numbers. | 294 | * below are basically de-swizzled numbers. |
| 293 | * The real slot is on idsel 0, so the swizzling is 1:1 | 295 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 294 | */ | 296 | */ |
| 295 | interrupt-map-mask = <0000 0 0 7>; | 297 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 296 | interrupt-map = < | 298 | interrupt-map = < |
| 297 | 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ | 299 | 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ |
| 298 | 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ | 300 | 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ |
| 299 | 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ | 301 | 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ |
| 300 | 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; | 302 | 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; |
| 301 | }; | 303 | }; |
| 302 | 304 | ||
| 303 | PCIE1: pciex@0c0000000 { | 305 | PCIE1: pciex@0c0000000 { |
| @@ -307,23 +309,23 @@ | |||
| 307 | #address-cells = <3>; | 309 | #address-cells = <3>; |
| 308 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 310 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
| 309 | primary; | 311 | primary; |
| 310 | port = <1>; /* port number */ | 312 | port = <0x1>; /* port number */ |
| 311 | reg = <c0000000 20000000 /* Config space access */ | 313 | reg = <0xc0000000 0x20000000 /* Config space access */ |
| 312 | ef001000 00001000>; /* Registers */ | 314 | 0xef001000 0x00001000>; /* Registers */ |
| 313 | dcr-reg = <060 020>; | 315 | dcr-reg = <0x060 0x020>; |
| 314 | sdr-base = <440>; | 316 | sdr-base = <0x440>; |
| 315 | 317 | ||
| 316 | /* Outbound ranges, one memory and one IO, | 318 | /* Outbound ranges, one memory and one IO, |
| 317 | * later cannot be changed | 319 | * later cannot be changed |
| 318 | */ | 320 | */ |
| 319 | ranges = <02000000 0 80000000 98000000 0 08000000 | 321 | ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 |
| 320 | 01000000 0 00000000 e0010000 0 00010000>; | 322 | 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; |
| 321 | 323 | ||
| 322 | /* Inbound 2GB range starting at 0 */ | 324 | /* Inbound 2GB range starting at 0 */ |
| 323 | dma-ranges = <42000000 0 0 0 0 80000000>; | 325 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 324 | 326 | ||
| 325 | /* This drives busses 0x40 to 0x7f */ | 327 | /* This drives busses 0x40 to 0x7f */ |
| 326 | bus-range = <40 7f>; | 328 | bus-range = <0x40 0x7f>; |
| 327 | 329 | ||
| 328 | /* Legacy interrupts (note the weird polarity, the bridge seems | 330 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 329 | * to invert PCIe legacy interrupts). | 331 | * to invert PCIe legacy interrupts). |
| @@ -333,12 +335,12 @@ | |||
| 333 | * below are basically de-swizzled numbers. | 335 | * below are basically de-swizzled numbers. |
| 334 | * The real slot is on idsel 0, so the swizzling is 1:1 | 336 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 335 | */ | 337 | */ |
| 336 | interrupt-map-mask = <0000 0 0 7>; | 338 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 337 | interrupt-map = < | 339 | interrupt-map = < |
| 338 | 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ | 340 | 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ |
| 339 | 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ | 341 | 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ |
| 340 | 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ | 342 | 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ |
| 341 | 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; | 343 | 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; |
| 342 | }; | 344 | }; |
| 343 | }; | 345 | }; |
| 344 | }; | 346 | }; |
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts index f869ce3ca0b7..6eb7c771f6a4 100644 --- a/arch/powerpc/boot/dts/ksi8560.dts +++ b/arch/powerpc/boot/dts/ksi8560.dts | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | timebase-frequency = <0>; /* From U-boot */ | 40 | timebase-frequency = <0>; /* From U-boot */ |
| 41 | bus-frequency = <0>; /* From U-boot */ | 41 | bus-frequency = <0>; /* From U-boot */ |
| 42 | clock-frequency = <0>; /* From U-boot */ | 42 | clock-frequency = <0>; /* From U-boot */ |
| 43 | next-level-cache = <&L2>; | ||
| 43 | }; | 44 | }; |
| 44 | }; | 45 | }; |
| 45 | 46 | ||
| @@ -62,7 +63,7 @@ | |||
| 62 | interrupts = <0x12 0x2>; | 63 | interrupts = <0x12 0x2>; |
| 63 | }; | 64 | }; |
| 64 | 65 | ||
| 65 | l2-cache-controller@20000 { | 66 | L2: l2-cache-controller@20000 { |
| 66 | compatible = "fsl,8540-l2-cache-controller"; | 67 | compatible = "fsl,8540-l2-cache-controller"; |
| 67 | reg = <0x20000 0x1000>; | 68 | reg = <0x20000 0x1000>; |
| 68 | cache-line-size = <0x20>; /* 32 bytes */ | 69 | cache-line-size = <0x20>; /* 32 bytes */ |
diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts index 84cc5e72ddd8..1dfcd7ed199c 100644 --- a/arch/powerpc/boot/dts/makalu.dts +++ b/arch/powerpc/boot/dts/makalu.dts | |||
| @@ -8,12 +8,14 @@ | |||
| 8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | /dts-v1/; | ||
| 12 | |||
| 11 | / { | 13 | / { |
| 12 | #address-cells = <1>; | 14 | #address-cells = <1>; |
| 13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
| 14 | model = "amcc,makalu"; | 16 | model = "amcc,makalu"; |
| 15 | compatible = "amcc,makalu"; | 17 | compatible = "amcc,makalu"; |
| 16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
| 17 | 19 | ||
| 18 | aliases { | 20 | aliases { |
| 19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
| @@ -29,13 +31,13 @@ | |||
| 29 | cpu@0 { | 31 | cpu@0 { |
| 30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
| 31 | model = "PowerPC,405EX"; | 33 | model = "PowerPC,405EX"; |
| 32 | reg = <0>; | 34 | reg = <0x00000000>; |
| 33 | clock-frequency = <0>; /* Filled in by U-Boot */ | 35 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
| 35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
| 36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
| 37 | i-cache-size = <4000>; /* 16 kB */ | 39 | i-cache-size = <16384>; /* 16 kB */ |
| 38 | d-cache-size = <4000>; /* 16 kB */ | 40 | d-cache-size = <16384>; /* 16 kB */ |
| 39 | dcr-controller; | 41 | dcr-controller; |
| 40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
| 41 | }; | 43 | }; |
| @@ -43,14 +45,14 @@ | |||
| 43 | 45 | ||
| 44 | memory { | 46 | memory { |
| 45 | device_type = "memory"; | 47 | device_type = "memory"; |
| 46 | reg = <0 0>; /* Filled in by U-Boot */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ |
| 47 | }; | 49 | }; |
| 48 | 50 | ||
| 49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
| 50 | compatible = "ibm,uic-405ex", "ibm,uic"; | 52 | compatible = "ibm,uic-405ex", "ibm,uic"; |
| 51 | interrupt-controller; | 53 | interrupt-controller; |
| 52 | cell-index = <0>; | 54 | cell-index = <0>; |
| 53 | dcr-reg = <0c0 009>; | 55 | dcr-reg = <0x0c0 0x009>; |
| 54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
| 55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
| 56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
| @@ -60,11 +62,11 @@ | |||
| 60 | compatible = "ibm,uic-405ex","ibm,uic"; | 62 | compatible = "ibm,uic-405ex","ibm,uic"; |
| 61 | interrupt-controller; | 63 | interrupt-controller; |
| 62 | cell-index = <1>; | 64 | cell-index = <1>; |
| 63 | dcr-reg = <0d0 009>; | 65 | dcr-reg = <0x0d0 0x009>; |
| 64 | #address-cells = <0>; | 66 | #address-cells = <0>; |
| 65 | #size-cells = <0>; | 67 | #size-cells = <0>; |
| 66 | #interrupt-cells = <2>; | 68 | #interrupt-cells = <2>; |
| 67 | interrupts = <1e 4 1f 4>; /* cascade */ | 69 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 68 | interrupt-parent = <&UIC0>; | 70 | interrupt-parent = <&UIC0>; |
| 69 | }; | 71 | }; |
| 70 | 72 | ||
| @@ -72,11 +74,11 @@ | |||
| 72 | compatible = "ibm,uic-405ex","ibm,uic"; | 74 | compatible = "ibm,uic-405ex","ibm,uic"; |
| 73 | interrupt-controller; | 75 | interrupt-controller; |
| 74 | cell-index = <2>; | 76 | cell-index = <2>; |
| 75 | dcr-reg = <0e0 009>; | 77 | dcr-reg = <0x0e0 0x009>; |
| 76 | #address-cells = <0>; | 78 | #address-cells = <0>; |
| 77 | #size-cells = <0>; | 79 | #size-cells = <0>; |
| 78 | #interrupt-cells = <2>; | 80 | #interrupt-cells = <2>; |
| 79 | interrupts = <1c 4 1d 4>; /* cascade */ | 81 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
| 80 | interrupt-parent = <&UIC0>; | 82 | interrupt-parent = <&UIC0>; |
| 81 | }; | 83 | }; |
| 82 | 84 | ||
| @@ -89,72 +91,72 @@ | |||
| 89 | 91 | ||
| 90 | SDRAM0: memory-controller { | 92 | SDRAM0: memory-controller { |
| 91 | compatible = "ibm,sdram-405ex"; | 93 | compatible = "ibm,sdram-405ex"; |
| 92 | dcr-reg = <010 2>; | 94 | dcr-reg = <0x010 0x002>; |
| 93 | }; | 95 | }; |
| 94 | 96 | ||
| 95 | MAL0: mcmal { | 97 | MAL0: mcmal { |
| 96 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; | 98 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; |
| 97 | dcr-reg = <180 62>; | 99 | dcr-reg = <0x180 0x062>; |
| 98 | num-tx-chans = <2>; | 100 | num-tx-chans = <2>; |
| 99 | num-rx-chans = <2>; | 101 | num-rx-chans = <2>; |
| 100 | interrupt-parent = <&MAL0>; | 102 | interrupt-parent = <&MAL0>; |
| 101 | interrupts = <0 1 2 3 4>; | 103 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 102 | #interrupt-cells = <1>; | 104 | #interrupt-cells = <1>; |
| 103 | #address-cells = <0>; | 105 | #address-cells = <0>; |
| 104 | #size-cells = <0>; | 106 | #size-cells = <0>; |
| 105 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 107 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 106 | /*RXEOB*/ 1 &UIC0 b 4 | 108 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 107 | /*SERR*/ 2 &UIC1 0 4 | 109 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 108 | /*TXDE*/ 3 &UIC1 1 4 | 110 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 109 | /*RXDE*/ 4 &UIC1 2 4>; | 111 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 110 | interrupt-map-mask = <ffffffff>; | 112 | interrupt-map-mask = <0xffffffff>; |
| 111 | }; | 113 | }; |
| 112 | 114 | ||
| 113 | POB0: opb { | 115 | POB0: opb { |
| 114 | compatible = "ibm,opb-405ex", "ibm,opb"; | 116 | compatible = "ibm,opb-405ex", "ibm,opb"; |
| 115 | #address-cells = <1>; | 117 | #address-cells = <1>; |
| 116 | #size-cells = <1>; | 118 | #size-cells = <1>; |
| 117 | ranges = <80000000 80000000 10000000 | 119 | ranges = <0x80000000 0x80000000 0x10000000 |
| 118 | ef600000 ef600000 a00000 | 120 | 0xef600000 0xef600000 0x00a00000 |
| 119 | f0000000 f0000000 10000000>; | 121 | 0xf0000000 0xf0000000 0x10000000>; |
| 120 | dcr-reg = <0a0 5>; | 122 | dcr-reg = <0x0a0 0x005>; |
| 121 | clock-frequency = <0>; /* Filled in by U-Boot */ | 123 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 122 | 124 | ||
| 123 | EBC0: ebc { | 125 | EBC0: ebc { |
| 124 | compatible = "ibm,ebc-405ex", "ibm,ebc"; | 126 | compatible = "ibm,ebc-405ex", "ibm,ebc"; |
| 125 | dcr-reg = <012 2>; | 127 | dcr-reg = <0x012 0x002>; |
| 126 | #address-cells = <2>; | 128 | #address-cells = <2>; |
| 127 | #size-cells = <1>; | 129 | #size-cells = <1>; |
| 128 | clock-frequency = <0>; /* Filled in by U-Boot */ | 130 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 129 | /* ranges property is supplied by U-Boot */ | 131 | /* ranges property is supplied by U-Boot */ |
| 130 | interrupts = <5 1>; | 132 | interrupts = <0x5 0x1>; |
| 131 | interrupt-parent = <&UIC1>; | 133 | interrupt-parent = <&UIC1>; |
| 132 | 134 | ||
| 133 | nor_flash@0,0 { | 135 | nor_flash@0,0 { |
| 134 | compatible = "amd,s29gl512n", "cfi-flash"; | 136 | compatible = "amd,s29gl512n", "cfi-flash"; |
| 135 | bank-width = <2>; | 137 | bank-width = <2>; |
| 136 | reg = <0 000000 4000000>; | 138 | reg = <0x00000000 0x00000000 0x04000000>; |
| 137 | #address-cells = <1>; | 139 | #address-cells = <1>; |
| 138 | #size-cells = <1>; | 140 | #size-cells = <1>; |
| 139 | partition@0 { | 141 | partition@0 { |
| 140 | label = "kernel"; | 142 | label = "kernel"; |
| 141 | reg = <0 200000>; | 143 | reg = <0x00000000 0x00200000>; |
| 142 | }; | 144 | }; |
| 143 | partition@200000 { | 145 | partition@200000 { |
| 144 | label = "root"; | 146 | label = "root"; |
| 145 | reg = <200000 200000>; | 147 | reg = <0x00200000 0x00200000>; |
| 146 | }; | 148 | }; |
| 147 | partition@400000 { | 149 | partition@400000 { |
| 148 | label = "user"; | 150 | label = "user"; |
| 149 | reg = <400000 3b60000>; | 151 | reg = <0x00400000 0x03b60000>; |
| 150 | }; | 152 | }; |
| 151 | partition@3f60000 { | 153 | partition@3f60000 { |
| 152 | label = "env"; | 154 | label = "env"; |
| 153 | reg = <3f60000 40000>; | 155 | reg = <0x03f60000 0x00040000>; |
| 154 | }; | 156 | }; |
| 155 | partition@3fa0000 { | 157 | partition@3fa0000 { |
| 156 | label = "u-boot"; | 158 | label = "u-boot"; |
| 157 | reg = <3fa0000 60000>; | 159 | reg = <0x03fa0000 0x00060000>; |
| 158 | }; | 160 | }; |
| 159 | }; | 161 | }; |
| 160 | }; | 162 | }; |
| @@ -162,68 +164,68 @@ | |||
| 162 | UART0: serial@ef600200 { | 164 | UART0: serial@ef600200 { |
| 163 | device_type = "serial"; | 165 | device_type = "serial"; |
| 164 | compatible = "ns16550"; | 166 | compatible = "ns16550"; |
| 165 | reg = <ef600200 8>; | 167 | reg = <0xef600200 0x00000008>; |
| 166 | virtual-reg = <ef600200>; | 168 | virtual-reg = <0xef600200>; |
| 167 | clock-frequency = <0>; /* Filled in by U-Boot */ | 169 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 168 | current-speed = <0>; | 170 | current-speed = <0>; |
| 169 | interrupt-parent = <&UIC0>; | 171 | interrupt-parent = <&UIC0>; |
| 170 | interrupts = <1a 4>; | 172 | interrupts = <0x1a 0x4>; |
| 171 | }; | 173 | }; |
| 172 | 174 | ||
| 173 | UART1: serial@ef600300 { | 175 | UART1: serial@ef600300 { |
| 174 | device_type = "serial"; | 176 | device_type = "serial"; |
| 175 | compatible = "ns16550"; | 177 | compatible = "ns16550"; |
| 176 | reg = <ef600300 8>; | 178 | reg = <0xef600300 0x00000008>; |
| 177 | virtual-reg = <ef600300>; | 179 | virtual-reg = <0xef600300>; |
| 178 | clock-frequency = <0>; /* Filled in by U-Boot */ | 180 | clock-frequency = <0>; /* Filled in by U-Boot */ |
| 179 | current-speed = <0>; | 181 | current-speed = <0>; |
| 180 | interrupt-parent = <&UIC0>; | 182 | interrupt-parent = <&UIC0>; |
| 181 | interrupts = <1 4>; | 183 | interrupts = <0x1 0x4>; |
| 182 | }; | 184 | }; |
| 183 | 185 | ||
| 184 | IIC0: i2c@ef600400 { | 186 | IIC0: i2c@ef600400 { |
| 185 | compatible = "ibm,iic-405ex", "ibm,iic"; | 187 | compatible = "ibm,iic-405ex", "ibm,iic"; |
| 186 | reg = <ef600400 14>; | 188 | reg = <0xef600400 0x00000014>; |
| 187 | interrupt-parent = <&UIC0>; | 189 | interrupt-parent = <&UIC0>; |
| 188 | interrupts = <2 4>; | 190 | interrupts = <0x2 0x4>; |
| 189 | }; | 191 | }; |
| 190 | 192 | ||
| 191 | IIC1: i2c@ef600500 { | 193 | IIC1: i2c@ef600500 { |
| 192 | compatible = "ibm,iic-405ex", "ibm,iic"; | 194 | compatible = "ibm,iic-405ex", "ibm,iic"; |
| 193 | reg = <ef600500 14>; | 195 | reg = <0xef600500 0x00000014>; |
| 194 | interrupt-parent = <&UIC0>; | 196 | interrupt-parent = <&UIC0>; |
| 195 | interrupts = <7 4>; | 197 | interrupts = <0x7 0x4>; |
| 196 | }; | 198 | }; |
| 197 | 199 | ||
| 198 | 200 | ||
| 199 | RGMII0: emac-rgmii@ef600b00 { | 201 | RGMII0: emac-rgmii@ef600b00 { |
| 200 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; | 202 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; |
| 201 | reg = <ef600b00 104>; | 203 | reg = <0xef600b00 0x00000104>; |
| 202 | has-mdio; | 204 | has-mdio; |
| 203 | }; | 205 | }; |
| 204 | 206 | ||
| 205 | EMAC0: ethernet@ef600900 { | 207 | EMAC0: ethernet@ef600900 { |
| 206 | linux,network-index = <0>; | 208 | linux,network-index = <0x0>; |
| 207 | device_type = "network"; | 209 | device_type = "network"; |
| 208 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 210 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
| 209 | interrupt-parent = <&EMAC0>; | 211 | interrupt-parent = <&EMAC0>; |
| 210 | interrupts = <0 1>; | 212 | interrupts = <0x0 0x1>; |
| 211 | #interrupt-cells = <1>; | 213 | #interrupt-cells = <1>; |
| 212 | #address-cells = <0>; | 214 | #address-cells = <0>; |
| 213 | #size-cells = <0>; | 215 | #size-cells = <0>; |
| 214 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 216 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
| 215 | /*Wake*/ 1 &UIC1 1d 4>; | 217 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
| 216 | reg = <ef600900 70>; | 218 | reg = <0xef600900 0x00000070>; |
| 217 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 219 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 218 | mal-device = <&MAL0>; | 220 | mal-device = <&MAL0>; |
| 219 | mal-tx-channel = <0>; | 221 | mal-tx-channel = <0>; |
| 220 | mal-rx-channel = <0>; | 222 | mal-rx-channel = <0>; |
| 221 | cell-index = <0>; | 223 | cell-index = <0>; |
| 222 | max-frame-size = <2328>; | 224 | max-frame-size = <9000>; |
| 223 | rx-fifo-size = <1000>; | 225 | rx-fifo-size = <4096>; |
| 224 | tx-fifo-size = <800>; | 226 | tx-fifo-size = <2048>; |
| 225 | phy-mode = "rgmii"; | 227 | phy-mode = "rgmii"; |
| 226 | phy-map = <0000003f>; /* Start at 6 */ | 228 | phy-map = <0x0000003f>; /* Start at 6 */ |
| 227 | rgmii-device = <&RGMII0>; | 229 | rgmii-device = <&RGMII0>; |
| 228 | rgmii-channel = <0>; | 230 | rgmii-channel = <0>; |
| 229 | has-inverted-stacr-oc; | 231 | has-inverted-stacr-oc; |
| @@ -231,27 +233,27 @@ | |||
| 231 | }; | 233 | }; |
| 232 | 234 | ||
| 233 | EMAC1: ethernet@ef600a00 { | 235 | EMAC1: ethernet@ef600a00 { |
| 234 | linux,network-index = <1>; | 236 | linux,network-index = <0x1>; |
| 235 | device_type = "network"; | 237 | device_type = "network"; |
| 236 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 238 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
| 237 | interrupt-parent = <&EMAC1>; | 239 | interrupt-parent = <&EMAC1>; |
| 238 | interrupts = <0 1>; | 240 | interrupts = <0x0 0x1>; |
| 239 | #interrupt-cells = <1>; | 241 | #interrupt-cells = <1>; |
| 240 | #address-cells = <0>; | 242 | #address-cells = <0>; |
| 241 | #size-cells = <0>; | 243 | #size-cells = <0>; |
| 242 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 244 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
| 243 | /*Wake*/ 1 &UIC1 1f 4>; | 245 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
| 244 | reg = <ef600a00 70>; | 246 | reg = <0xef600a00 0x00000070>; |
| 245 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 247 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
| 246 | mal-device = <&MAL0>; | 248 | mal-device = <&MAL0>; |
| 247 | mal-tx-channel = <1>; | 249 | mal-tx-channel = <1>; |
| 248 | mal-rx-channel = <1>; | 250 | mal-rx-channel = <1>; |
| 249 | cell-index = <1>; | 251 | cell-index = <1>; |
| 250 | max-frame-size = <2328>; | 252 | max-frame-size = <9000>; |
| 251 | rx-fifo-size = <1000>; | 253 | rx-fifo-size = <4096>; |
| 252 | tx-fifo-size = <800>; | 254 | tx-fifo-size = <2048>; |
| 253 | phy-mode = "rgmii"; | 255 | phy-mode = "rgmii"; |
| 254 | phy-map = <00000000>; | 256 | phy-map = <0x00000000>; |
| 255 | rgmii-device = <&RGMII0>; | 257 | rgmii-device = <&RGMII0>; |
| 256 | rgmii-channel = <1>; | 258 | rgmii-channel = <1>; |
| 257 | has-inverted-stacr-oc; | 259 | has-inverted-stacr-oc; |
| @@ -266,23 +268,23 @@ | |||
| 266 | #address-cells = <3>; | 268 | #address-cells = <3>; |
| 267 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 269 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
| 268 | primary; | 270 | primary; |
| 269 | port = <0>; /* port number */ | 271 | port = <0x0>; /* port number */ |
| 270 | reg = <a0000000 20000000 /* Config space access */ | 272 | reg = <0xa0000000 0x20000000 /* Config space access */ |
| 271 | ef000000 00001000>; /* Registers */ | 273 | 0xef000000 0x00001000>; /* Registers */ |
| 272 | dcr-reg = <040 020>; | 274 | dcr-reg = <0x040 0x020>; |
| 273 | sdr-base = <400>; | 275 | sdr-base = <0x400>; |
| 274 | 276 | ||
| 275 | /* Outbound ranges, one memory and one IO, | 277 | /* Outbound ranges, one memory and one IO, |
| 276 | * later cannot be changed | 278 | * later cannot be changed |
| 277 | */ | 279 | */ |
| 278 | ranges = <02000000 0 80000000 90000000 0 08000000 | 280 | ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 |
| 279 | 01000000 0 00000000 e0000000 0 00010000>; | 281 | 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; |
| 280 | 282 | ||
| 281 | /* Inbound 2GB range starting at 0 */ | 283 | /* Inbound 2GB range starting at 0 */ |
| 282 | dma-ranges = <42000000 0 0 0 0 80000000>; | 284 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 283 | 285 | ||
| 284 | /* This drives busses 0x00 to 0x3f */ | 286 | /* This drives busses 0x00 to 0x3f */ |
| 285 | bus-range = <00 3f>; | 287 | bus-range = <0x0 0x3f>; |
| 286 | 288 | ||
| 287 | /* Legacy interrupts (note the weird polarity, the bridge seems | 289 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 288 | * to invert PCIe legacy interrupts). | 290 | * to invert PCIe legacy interrupts). |
| @@ -292,12 +294,12 @@ | |||
| 292 | * below are basically de-swizzled numbers. | 294 | * below are basically de-swizzled numbers. |
| 293 | * The real slot is on idsel 0, so the swizzling is 1:1 | 295 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 294 | */ | 296 | */ |
| 295 | interrupt-map-mask = <0000 0 0 7>; | 297 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 296 | interrupt-map = < | 298 | interrupt-map = < |
| 297 | 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ | 299 | 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ |
| 298 | 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ | 300 | 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ |
| 299 | 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ | 301 | 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ |
| 300 | 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; | 302 | 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; |
| 301 | }; | 303 | }; |
| 302 | 304 | ||
| 303 | PCIE1: pciex@0c0000000 { | 305 | PCIE1: pciex@0c0000000 { |
| @@ -307,23 +309,23 @@ | |||
| 307 | #address-cells = <3>; | 309 | #address-cells = <3>; |
| 308 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 310 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
| 309 | primary; | 311 | primary; |
| 310 | port = <1>; /* port number */ | 312 | port = <0x1>; /* port number */ |
| 311 | reg = <c0000000 20000000 /* Config space access */ | 313 | reg = <0xc0000000 0x20000000 /* Config space access */ |
| 312 | ef001000 00001000>; /* Registers */ | 314 | 0xef001000 0x00001000>; /* Registers */ |
| 313 | dcr-reg = <060 020>; | 315 | dcr-reg = <0x060 0x020>; |
| 314 | sdr-base = <440>; | 316 | sdr-base = <0x440>; |
| 315 | 317 | ||
| 316 | /* Outbound ranges, one memory and one IO, | 318 | /* Outbound ranges, one memory and one IO, |
| 317 | * later cannot be changed | 319 | * later cannot be changed |
| 318 | */ | 320 | */ |
| 319 | ranges = <02000000 0 80000000 98000000 0 08000000 | 321 | ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 |
| 320 | 01000000 0 00000000 e0010000 0 00010000>; | 322 | 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; |
| 321 | 323 | ||
| 322 | /* Inbound 2GB range starting at 0 */ | 324 | /* Inbound 2GB range starting at 0 */ |
| 323 | dma-ranges = <42000000 0 0 0 0 80000000>; | 325 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 324 | 326 | ||
| 325 | /* This drives busses 0x40 to 0x7f */ | 327 | /* This drives busses 0x40 to 0x7f */ |
| 326 | bus-range = <40 7f>; | 328 | bus-range = <0x40 0x7f>; |
| 327 | 329 | ||
| 328 | /* Legacy interrupts (note the weird polarity, the bridge seems | 330 | /* Legacy interrupts (note the weird polarity, the bridge seems |
| 329 | * to invert PCIe legacy interrupts). | 331 | * to invert PCIe legacy interrupts). |
| @@ -333,12 +335,12 @@ | |||
| 333 | * below are basically de-swizzled numbers. | 335 | * below are basically de-swizzled numbers. |
| 334 | * The real slot is on idsel 0, so the swizzling is 1:1 | 336 | * The real slot is on idsel 0, so the swizzling is 1:1 |
| 335 | */ | 337 | */ |
| 336 | interrupt-map-mask = <0000 0 0 7>; | 338 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 337 | interrupt-map = < | 339 | interrupt-map = < |
| 338 | 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ | 340 | 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ |
| 339 | 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ | 341 | 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ |
| 340 | 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ | 342 | 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ |
| 341 | 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; | 343 | 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; |
| 342 | }; | 344 | }; |
| 343 | }; | 345 | }; |
| 344 | }; | 346 | }; |
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts index 4936349b87cd..705c23c14f32 100644 --- a/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts | |||
| @@ -124,14 +124,12 @@ | |||
| 124 | }; | 124 | }; |
| 125 | 125 | ||
| 126 | mpic: pic@7400 { | 126 | mpic: pic@7400 { |
| 127 | clock-frequency = <0>; | ||
| 128 | interrupt-controller; | 127 | interrupt-controller; |
| 129 | #address-cells = <0>; | 128 | #address-cells = <0>; |
| 130 | #interrupt-cells = <2>; | 129 | #interrupt-cells = <2>; |
| 131 | reg = <0x7400 0x400>; | 130 | reg = <0x7400 0x400>; |
| 132 | compatible = "chrp,open-pic"; | 131 | compatible = "chrp,open-pic"; |
| 133 | device_type = "open-pic"; | 132 | device_type = "open-pic"; |
| 134 | big-endian; | ||
| 135 | }; | 133 | }; |
| 136 | pci@1000 { | 134 | pci@1000 { |
| 137 | compatible = "tsi108-pci"; | 135 | compatible = "tsi108-pci"; |
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 18033ed0b535..79881a1fb8aa 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | timebase-frequency = <0>; // 33 MHz, from uboot | 40 | timebase-frequency = <0>; // 33 MHz, from uboot |
| 41 | bus-frequency = <0>; // 166 MHz | 41 | bus-frequency = <0>; // 166 MHz |
| 42 | clock-frequency = <0>; // 825 MHz, from uboot | 42 | clock-frequency = <0>; // 825 MHz, from uboot |
| 43 | next-level-cache = <&L2>; | ||
| 43 | }; | 44 | }; |
| 44 | }; | 45 | }; |
| 45 | 46 | ||
| @@ -63,7 +64,7 @@ | |||
| 63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 67 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
| 68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 69 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
| @@ -165,14 +166,12 @@ | |||
| 165 | interrupt-parent = <&mpic>; | 166 | interrupt-parent = <&mpic>; |
| 166 | }; | 167 | }; |
| 167 | mpic: pic@40000 { | 168 | mpic: pic@40000 { |
| 168 | clock-frequency = <0>; | ||
| 169 | interrupt-controller; | 169 | interrupt-controller; |
| 170 | #address-cells = <0>; | 170 | #address-cells = <0>; |
| 171 | #interrupt-cells = <2>; | 171 | #interrupt-cells = <2>; |
| 172 | reg = <0x40000 0x40000>; | 172 | reg = <0x40000 0x40000>; |
| 173 | compatible = "chrp,open-pic"; | 173 | compatible = "chrp,open-pic"; |
| 174 | device_type = "open-pic"; | 174 | device_type = "open-pic"; |
| 175 | big-endian; | ||
| 176 | }; | 175 | }; |
| 177 | }; | 176 | }; |
| 178 | 177 | ||
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 663c7c50ca45..66192aa0f311 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | timebase-frequency = <0>; // 33 MHz, from uboot | 40 | timebase-frequency = <0>; // 33 MHz, from uboot |
| 41 | bus-frequency = <0>; // 166 MHz | 41 | bus-frequency = <0>; // 166 MHz |
| 42 | clock-frequency = <0>; // 825 MHz, from uboot | 42 | clock-frequency = <0>; // 825 MHz, from uboot |
| 43 | next-level-cache = <&L2>; | ||
| 43 | }; | 44 | }; |
| 44 | }; | 45 | }; |
| 45 | 46 | ||
| @@ -63,7 +64,7 @@ | |||
| 63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 67 | compatible = "fsl,8541-l2-cache-controller"; | 68 | compatible = "fsl,8541-l2-cache-controller"; |
| 68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 69 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
| @@ -148,14 +149,12 @@ | |||
| 148 | }; | 149 | }; |
| 149 | 150 | ||
| 150 | mpic: pic@40000 { | 151 | mpic: pic@40000 { |
| 151 | clock-frequency = <0>; | ||
| 152 | interrupt-controller; | 152 | interrupt-controller; |
| 153 | #address-cells = <0>; | 153 | #address-cells = <0>; |
| 154 | #interrupt-cells = <2>; | 154 | #interrupt-cells = <2>; |
| 155 | reg = <0x40000 0x40000>; | 155 | reg = <0x40000 0x40000>; |
| 156 | compatible = "chrp,open-pic"; | 156 | compatible = "chrp,open-pic"; |
| 157 | device_type = "open-pic"; | 157 | device_type = "open-pic"; |
| 158 | big-endian; | ||
| 159 | }; | 158 | }; |
| 160 | 159 | ||
| 161 | cpm@919c0 { | 160 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 6a0d8db96d97..6cf533f4b5fb 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
| @@ -41,6 +41,7 @@ | |||
| 41 | timebase-frequency = <0>; | 41 | timebase-frequency = <0>; |
| 42 | bus-frequency = <0>; | 42 | bus-frequency = <0>; |
| 43 | clock-frequency = <0>; | 43 | clock-frequency = <0>; |
| 44 | next-level-cache = <&L2>; | ||
| 44 | }; | 45 | }; |
| 45 | }; | 46 | }; |
| 46 | 47 | ||
| @@ -65,7 +66,7 @@ | |||
| 65 | interrupts = <18 2>; | 66 | interrupts = <18 2>; |
| 66 | }; | 67 | }; |
| 67 | 68 | ||
| 68 | l2-cache-controller@20000 { | 69 | L2: l2-cache-controller@20000 { |
| 69 | compatible = "fsl,8544-l2-cache-controller"; | 70 | compatible = "fsl,8544-l2-cache-controller"; |
| 70 | reg = <0x20000 0x1000>; | 71 | reg = <0x20000 0x1000>; |
| 71 | cache-line-size = <32>; // 32 bytes | 72 | cache-line-size = <32>; // 32 bytes |
| @@ -210,14 +211,28 @@ | |||
| 210 | }; | 211 | }; |
| 211 | 212 | ||
| 212 | mpic: pic@40000 { | 213 | mpic: pic@40000 { |
| 213 | clock-frequency = <0>; | ||
| 214 | interrupt-controller; | 214 | interrupt-controller; |
| 215 | #address-cells = <0>; | 215 | #address-cells = <0>; |
| 216 | #interrupt-cells = <2>; | 216 | #interrupt-cells = <2>; |
| 217 | reg = <0x40000 0x40000>; | 217 | reg = <0x40000 0x40000>; |
| 218 | compatible = "chrp,open-pic"; | 218 | compatible = "chrp,open-pic"; |
| 219 | device_type = "open-pic"; | 219 | device_type = "open-pic"; |
| 220 | big-endian; | 220 | }; |
| 221 | |||
| 222 | msi@41600 { | ||
| 223 | compatible = "fsl,mpc8544-msi", "fsl,mpic-msi"; | ||
| 224 | reg = <0x41600 0x80>; | ||
| 225 | msi-available-ranges = <0 0x100>; | ||
| 226 | interrupts = < | ||
| 227 | 0xe0 0 | ||
| 228 | 0xe1 0 | ||
| 229 | 0xe2 0 | ||
| 230 | 0xe3 0 | ||
| 231 | 0xe4 0 | ||
| 232 | 0xe5 0 | ||
| 233 | 0xe6 0 | ||
| 234 | 0xe7 0>; | ||
| 235 | interrupt-parent = <&mpic>; | ||
| 221 | }; | 236 | }; |
| 222 | }; | 237 | }; |
| 223 | 238 | ||
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index fa298a8c81cc..205598d51f25 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
| @@ -45,6 +45,7 @@ | |||
| 45 | timebase-frequency = <0>; // 33 MHz, from uboot | 45 | timebase-frequency = <0>; // 33 MHz, from uboot |
| 46 | bus-frequency = <0>; // 166 MHz | 46 | bus-frequency = <0>; // 166 MHz |
| 47 | clock-frequency = <0>; // 825 MHz, from uboot | 47 | clock-frequency = <0>; // 825 MHz, from uboot |
| 48 | next-level-cache = <&L2>; | ||
| 48 | }; | 49 | }; |
| 49 | }; | 50 | }; |
| 50 | 51 | ||
| @@ -68,7 +69,7 @@ | |||
| 68 | interrupts = <18 2>; | 69 | interrupts = <18 2>; |
| 69 | }; | 70 | }; |
| 70 | 71 | ||
| 71 | l2-cache-controller@20000 { | 72 | L2: l2-cache-controller@20000 { |
| 72 | compatible = "fsl,8548-l2-cache-controller"; | 73 | compatible = "fsl,8548-l2-cache-controller"; |
| 73 | reg = <0x20000 0x1000>; | 74 | reg = <0x20000 0x1000>; |
| 74 | cache-line-size = <32>; // 32 bytes | 75 | cache-line-size = <32>; // 32 bytes |
| @@ -208,14 +209,12 @@ | |||
| 208 | }; | 209 | }; |
| 209 | 210 | ||
| 210 | mpic: pic@40000 { | 211 | mpic: pic@40000 { |
| 211 | clock-frequency = <0>; | ||
| 212 | interrupt-controller; | 212 | interrupt-controller; |
| 213 | #address-cells = <0>; | 213 | #address-cells = <0>; |
| 214 | #interrupt-cells = <2>; | 214 | #interrupt-cells = <2>; |
| 215 | reg = <0x40000 0x40000>; | 215 | reg = <0x40000 0x40000>; |
| 216 | compatible = "chrp,open-pic"; | 216 | compatible = "chrp,open-pic"; |
| 217 | device_type = "open-pic"; | 217 | device_type = "open-pic"; |
| 218 | big-endian; | ||
| 219 | }; | 218 | }; |
| 220 | }; | 219 | }; |
| 221 | 220 | ||
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index b025c566c10d..7c9d0b16d7e5 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | timebase-frequency = <0>; // 33 MHz, from uboot | 40 | timebase-frequency = <0>; // 33 MHz, from uboot |
| 41 | bus-frequency = <0>; // 166 MHz | 41 | bus-frequency = <0>; // 166 MHz |
| 42 | clock-frequency = <0>; // 825 MHz, from uboot | 42 | clock-frequency = <0>; // 825 MHz, from uboot |
| 43 | next-level-cache = <&L2>; | ||
| 43 | }; | 44 | }; |
| 44 | }; | 45 | }; |
| 45 | 46 | ||
| @@ -63,7 +64,7 @@ | |||
| 63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 67 | compatible = "fsl,8555-l2-cache-controller"; | 68 | compatible = "fsl,8555-l2-cache-controller"; |
| 68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 69 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
| @@ -148,14 +149,12 @@ | |||
| 148 | }; | 149 | }; |
| 149 | 150 | ||
| 150 | mpic: pic@40000 { | 151 | mpic: pic@40000 { |
| 151 | clock-frequency = <0>; | ||
| 152 | interrupt-controller; | 152 | interrupt-controller; |
| 153 | #address-cells = <0>; | 153 | #address-cells = <0>; |
| 154 | #interrupt-cells = <2>; | 154 | #interrupt-cells = <2>; |
| 155 | reg = <0x40000 0x40000>; | 155 | reg = <0x40000 0x40000>; |
| 156 | compatible = "chrp,open-pic"; | 156 | compatible = "chrp,open-pic"; |
| 157 | device_type = "open-pic"; | 157 | device_type = "open-pic"; |
| 158 | big-endian; | ||
| 159 | }; | 158 | }; |
| 160 | 159 | ||
| 161 | cpm@919c0 { | 160 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 0cc16ab305d1..5d9f3c4b5b71 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
| @@ -64,7 +64,7 @@ | |||
| 64 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 68 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
| 69 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 70 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
| @@ -134,6 +134,7 @@ | |||
| 134 | #address-cells = <0>; | 134 | #address-cells = <0>; |
| 135 | #interrupt-cells = <2>; | 135 | #interrupt-cells = <2>; |
| 136 | reg = <0x40000 0x40000>; | 136 | reg = <0x40000 0x40000>; |
| 137 | compatible = "chrp,open-pic"; | ||
| 137 | device_type = "open-pic"; | 138 | device_type = "open-pic"; |
| 138 | }; | 139 | }; |
| 139 | 140 | ||
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index a025a8ededc5..d7af8db1a22f 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
| @@ -42,6 +42,7 @@ | |||
| 42 | timebase-frequency = <0>; | 42 | timebase-frequency = <0>; |
| 43 | bus-frequency = <0>; | 43 | bus-frequency = <0>; |
| 44 | clock-frequency = <0>; | 44 | clock-frequency = <0>; |
| 45 | next-level-cache = <&L2>; | ||
| 45 | }; | 46 | }; |
| 46 | }; | 47 | }; |
| 47 | 48 | ||
| @@ -70,7 +71,7 @@ | |||
| 70 | interrupts = <18 2>; | 71 | interrupts = <18 2>; |
| 71 | }; | 72 | }; |
| 72 | 73 | ||
| 73 | l2-cache-controller@20000 { | 74 | L2: l2-cache-controller@20000 { |
| 74 | compatible = "fsl,8568-l2-cache-controller"; | 75 | compatible = "fsl,8568-l2-cache-controller"; |
| 75 | reg = <0x20000 0x1000>; | 76 | reg = <0x20000 0x1000>; |
| 76 | cache-line-size = <32>; // 32 bytes | 77 | cache-line-size = <32>; // 32 bytes |
| @@ -202,14 +203,12 @@ | |||
| 202 | }; | 203 | }; |
| 203 | 204 | ||
| 204 | mpic: pic@40000 { | 205 | mpic: pic@40000 { |
| 205 | clock-frequency = <0>; | ||
| 206 | interrupt-controller; | 206 | interrupt-controller; |
| 207 | #address-cells = <0>; | 207 | #address-cells = <0>; |
| 208 | #interrupt-cells = <2>; | 208 | #interrupt-cells = <2>; |
| 209 | reg = <0x40000 0x40000>; | 209 | reg = <0x40000 0x40000>; |
| 210 | compatible = "chrp,open-pic"; | 210 | compatible = "chrp,open-pic"; |
| 211 | device_type = "open-pic"; | 211 | device_type = "open-pic"; |
| 212 | big-endian; | ||
| 213 | }; | 212 | }; |
| 214 | 213 | ||
| 215 | par_io@e0100 { | 214 | par_io@e0100 { |
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index 66f27ab613a2..a444e6a2387d 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts | |||
| @@ -42,6 +42,7 @@ | |||
| 42 | timebase-frequency = <0>; | 42 | timebase-frequency = <0>; |
| 43 | bus-frequency = <0>; | 43 | bus-frequency = <0>; |
| 44 | clock-frequency = <0>; | 44 | clock-frequency = <0>; |
| 45 | next-level-cache = <&L2>; | ||
| 45 | }; | 46 | }; |
| 46 | 47 | ||
| 47 | PowerPC,8572@1 { | 48 | PowerPC,8572@1 { |
| @@ -54,6 +55,7 @@ | |||
| 54 | timebase-frequency = <0>; | 55 | timebase-frequency = <0>; |
| 55 | bus-frequency = <0>; | 56 | bus-frequency = <0>; |
| 56 | clock-frequency = <0>; | 57 | clock-frequency = <0>; |
| 58 | next-level-cache = <&L2>; | ||
| 57 | }; | 59 | }; |
| 58 | }; | 60 | }; |
| 59 | 61 | ||
| @@ -84,7 +86,7 @@ | |||
| 84 | interrupts = <18 2>; | 86 | interrupts = <18 2>; |
| 85 | }; | 87 | }; |
| 86 | 88 | ||
| 87 | l2-cache-controller@20000 { | 89 | L2: l2-cache-controller@20000 { |
| 88 | compatible = "fsl,mpc8572-l2-cache-controller"; | 90 | compatible = "fsl,mpc8572-l2-cache-controller"; |
| 89 | reg = <0x20000 0x1000>; | 91 | reg = <0x20000 0x1000>; |
| 90 | cache-line-size = <32>; // 32 bytes | 92 | cache-line-size = <32>; // 32 bytes |
| @@ -221,15 +223,29 @@ | |||
| 221 | fsl,has-rstcr; | 223 | fsl,has-rstcr; |
| 222 | }; | 224 | }; |
| 223 | 225 | ||
| 226 | msi@41600 { | ||
| 227 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
| 228 | reg = <0x41600 0x80>; | ||
| 229 | msi-available-ranges = <0 0x100>; | ||
| 230 | interrupts = < | ||
| 231 | 0xe0 0 | ||
| 232 | 0xe1 0 | ||
| 233 | 0xe2 0 | ||
| 234 | 0xe3 0 | ||
| 235 | 0xe4 0 | ||
| 236 | 0xe5 0 | ||
| 237 | 0xe6 0 | ||
| 238 | 0xe7 0>; | ||
| 239 | interrupt-parent = <&mpic>; | ||
| 240 | }; | ||
| 241 | |||
| 224 | mpic: pic@40000 { | 242 | mpic: pic@40000 { |
| 225 | clock-frequency = <0>; | ||
| 226 | interrupt-controller; | 243 | interrupt-controller; |
| 227 | #address-cells = <0>; | 244 | #address-cells = <0>; |
| 228 | #interrupt-cells = <2>; | 245 | #interrupt-cells = <2>; |
| 229 | reg = <0x40000 0x40000>; | 246 | reg = <0x40000 0x40000>; |
| 230 | compatible = "chrp,open-pic"; | 247 | compatible = "chrp,open-pic"; |
| 231 | device_type = "open-pic"; | 248 | device_type = "open-pic"; |
| 232 | big-endian; | ||
| 233 | }; | 249 | }; |
| 234 | }; | 250 | }; |
| 235 | 251 | ||
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index fa9b6bbeb5af..65a5f64b2339 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts | |||
| @@ -172,14 +172,28 @@ | |||
| 172 | }; | 172 | }; |
| 173 | 173 | ||
| 174 | mpic: interrupt-controller@40000 { | 174 | mpic: interrupt-controller@40000 { |
| 175 | clock-frequency = <0>; | ||
| 176 | interrupt-controller; | 175 | interrupt-controller; |
| 177 | #address-cells = <0>; | 176 | #address-cells = <0>; |
| 178 | #interrupt-cells = <2>; | 177 | #interrupt-cells = <2>; |
| 179 | reg = <0x40000 0x40000>; | 178 | reg = <0x40000 0x40000>; |
| 180 | compatible = "chrp,open-pic"; | 179 | compatible = "chrp,open-pic"; |
| 181 | device_type = "open-pic"; | 180 | device_type = "open-pic"; |
| 182 | big-endian; | 181 | }; |
| 182 | |||
| 183 | msi@41600 { | ||
| 184 | compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; | ||
| 185 | reg = <0x41600 0x80>; | ||
| 186 | msi-available-ranges = <0 0x100>; | ||
| 187 | interrupts = < | ||
| 188 | 0xe0 0 | ||
| 189 | 0xe1 0 | ||
| 190 | 0xe2 0 | ||
| 191 | 0xe3 0 | ||
| 192 | 0xe4 0 | ||
| 193 | 0xe5 0 | ||
| 194 | 0xe6 0 | ||
| 195 | 0xe7 0>; | ||
| 196 | interrupt-parent = <&mpic>; | ||
| 183 | }; | 197 | }; |
| 184 | 198 | ||
| 185 | global-utilities@e0000 { | 199 | global-utilities@e0000 { |
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 1e4bfe9cadb9..14f718d5e50b 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
| @@ -239,14 +239,12 @@ | |||
| 239 | }; | 239 | }; |
| 240 | 240 | ||
| 241 | mpic: pic@40000 { | 241 | mpic: pic@40000 { |
| 242 | clock-frequency = <0>; | ||
| 243 | interrupt-controller; | 242 | interrupt-controller; |
| 244 | #address-cells = <0>; | 243 | #address-cells = <0>; |
| 245 | #interrupt-cells = <2>; | 244 | #interrupt-cells = <2>; |
| 246 | reg = <0x40000 0x40000>; | 245 | reg = <0x40000 0x40000>; |
| 247 | compatible = "chrp,open-pic"; | 246 | compatible = "chrp,open-pic"; |
| 248 | device_type = "open-pic"; | 247 | device_type = "open-pic"; |
| 249 | big-endian; | ||
| 250 | }; | 248 | }; |
| 251 | 249 | ||
| 252 | global-utilities@e0000 { | 250 | global-utilities@e0000 { |
diff --git a/arch/powerpc/boot/dts/ps3.dts b/arch/powerpc/boot/dts/ps3.dts index 379ded282d5e..96ba5b512afe 100644 --- a/arch/powerpc/boot/dts/ps3.dts +++ b/arch/powerpc/boot/dts/ps3.dts | |||
| @@ -18,6 +18,8 @@ | |||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ | 19 | */ |
| 20 | 20 | ||
| 21 | /dts-v1/; | ||
| 22 | |||
| 21 | / { | 23 | / { |
| 22 | model = "SonyPS3"; | 24 | model = "SonyPS3"; |
| 23 | compatible = "sony,ps3"; | 25 | compatible = "sony,ps3"; |
| @@ -34,7 +36,7 @@ | |||
| 34 | 36 | ||
| 35 | memory { | 37 | memory { |
| 36 | device_type = "memory"; | 38 | device_type = "memory"; |
| 37 | reg = <0 0 0 0>; | 39 | reg = <0x00000000 0x00000000 0x00000000 0x00000000>; |
| 38 | }; | 40 | }; |
| 39 | 41 | ||
| 40 | /* | 42 | /* |
| @@ -55,14 +57,14 @@ | |||
| 55 | 57 | ||
| 56 | cpu@0 { | 58 | cpu@0 { |
| 57 | device_type = "cpu"; | 59 | device_type = "cpu"; |
| 58 | reg = <0>; | 60 | reg = <0x00000000>; |
| 59 | ibm,ppc-interrupt-server#s = <0 1>; | 61 | ibm,ppc-interrupt-server#s = <0x0 0x1>; |
| 60 | clock-frequency = <0>; | 62 | clock-frequency = <0>; |
| 61 | timebase-frequency = <0>; | 63 | timebase-frequency = <0>; |
| 62 | i-cache-size = <8000>; | 64 | i-cache-size = <32768>; |
| 63 | d-cache-size = <8000>; | 65 | d-cache-size = <32768>; |
| 64 | i-cache-line-size = <80>; | 66 | i-cache-line-size = <128>; |
| 65 | d-cache-line-size = <80>; | 67 | d-cache-line-size = <128>; |
| 66 | }; | 68 | }; |
| 67 | }; | 69 | }; |
| 68 | }; | 70 | }; |
diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts index 6a8fa7089ea2..2afb63a42ea9 100644 --- a/arch/powerpc/boot/dts/rainier.dts +++ b/arch/powerpc/boot/dts/rainier.dts | |||
| @@ -12,12 +12,14 @@ | |||
| 12 | * | 12 | * |
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | /dts-v1/; | ||
| 16 | |||
| 15 | / { | 17 | / { |
| 16 | #address-cells = <2>; | 18 | #address-cells = <2>; |
| 17 | #size-cells = <1>; | 19 | #size-cells = <1>; |
| 18 | model = "amcc,rainier"; | 20 | model = "amcc,rainier"; |
| 19 | compatible = "amcc,rainier"; | 21 | compatible = "amcc,rainier"; |
| 20 | dcr-parent = <&/cpus/cpu@0>; | 22 | dcr-parent = <&{/cpus/cpu@0}>; |
| 21 | 23 | ||
| 22 | aliases { | 24 | aliases { |
| 23 | ethernet0 = &EMAC0; | 25 | ethernet0 = &EMAC0; |
| @@ -35,13 +37,13 @@ | |||
| 35 | cpu@0 { | 37 | cpu@0 { |
| 36 | device_type = "cpu"; | 38 | device_type = "cpu"; |
| 37 | model = "PowerPC,440GRx"; | 39 | model = "PowerPC,440GRx"; |
| 38 | reg = <0>; | 40 | reg = <0x00000000>; |
| 39 | clock-frequency = <0>; /* Filled in by zImage */ | 41 | clock-frequency = <0>; /* Filled in by zImage */ |
| 40 | timebase-frequency = <0>; /* Filled in by zImage */ | 42 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 41 | i-cache-line-size = <20>; | 43 | i-cache-line-size = <32>; |
| 42 | d-cache-line-size = <20>; | 44 | d-cache-line-size = <32>; |
| 43 | i-cache-size = <8000>; | 45 | i-cache-size = <32768>; |
| 44 | d-cache-size = <8000>; | 46 | d-cache-size = <32768>; |
| 45 | dcr-controller; | 47 | dcr-controller; |
| 46 | dcr-access-method = "native"; | 48 | dcr-access-method = "native"; |
| 47 | }; | 49 | }; |
| @@ -49,14 +51,14 @@ | |||
| 49 | 51 | ||
| 50 | memory { | 52 | memory { |
| 51 | device_type = "memory"; | 53 | device_type = "memory"; |
| 52 | reg = <0 0 0>; /* Filled in by zImage */ | 54 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
| 53 | }; | 55 | }; |
| 54 | 56 | ||
| 55 | UIC0: interrupt-controller0 { | 57 | UIC0: interrupt-controller0 { |
| 56 | compatible = "ibm,uic-440grx","ibm,uic"; | 58 | compatible = "ibm,uic-440grx","ibm,uic"; |
| 57 | interrupt-controller; | 59 | interrupt-controller; |
| 58 | cell-index = <0>; | 60 | cell-index = <0>; |
| 59 | dcr-reg = <0c0 009>; | 61 | dcr-reg = <0x0c0 0x009>; |
| 60 | #address-cells = <0>; | 62 | #address-cells = <0>; |
| 61 | #size-cells = <0>; | 63 | #size-cells = <0>; |
| 62 | #interrupt-cells = <2>; | 64 | #interrupt-cells = <2>; |
| @@ -66,11 +68,11 @@ | |||
| 66 | compatible = "ibm,uic-440grx","ibm,uic"; | 68 | compatible = "ibm,uic-440grx","ibm,uic"; |
| 67 | interrupt-controller; | 69 | interrupt-controller; |
| 68 | cell-index = <1>; | 70 | cell-index = <1>; |
| 69 | dcr-reg = <0d0 009>; | 71 | dcr-reg = <0x0d0 0x009>; |
| 70 | #address-cells = <0>; | 72 | #address-cells = <0>; |
| 71 | #size-cells = <0>; | 73 | #size-cells = <0>; |
| 72 | #interrupt-cells = <2>; | 74 | #interrupt-cells = <2>; |
| 73 | interrupts = <1e 4 1f 4>; /* cascade */ | 75 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 74 | interrupt-parent = <&UIC0>; | 76 | interrupt-parent = <&UIC0>; |
| 75 | }; | 77 | }; |
| 76 | 78 | ||
| @@ -78,22 +80,22 @@ | |||
| 78 | compatible = "ibm,uic-440grx","ibm,uic"; | 80 | compatible = "ibm,uic-440grx","ibm,uic"; |
| 79 | interrupt-controller; | 81 | interrupt-controller; |
| 80 | cell-index = <2>; | 82 | cell-index = <2>; |
| 81 | dcr-reg = <0e0 009>; | 83 | dcr-reg = <0x0e0 0x009>; |
| 82 | #address-cells = <0>; | 84 | #address-cells = <0>; |
| 83 | #size-cells = <0>; | 85 | #size-cells = <0>; |
| 84 | #interrupt-cells = <2>; | 86 | #interrupt-cells = <2>; |
| 85 | interrupts = <1c 4 1d 4>; /* cascade */ | 87 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
| 86 | interrupt-parent = <&UIC0>; | 88 | interrupt-parent = <&UIC0>; |
| 87 | }; | 89 | }; |
| 88 | 90 | ||
| 89 | SDR0: sdr { | 91 | SDR0: sdr { |
| 90 | compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; | 92 | compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; |
| 91 | dcr-reg = <00e 002>; | 93 | dcr-reg = <0x00e 0x002>; |
| 92 | }; | 94 | }; |
| 93 | 95 | ||
| 94 | CPR0: cpr { | 96 | CPR0: cpr { |
| 95 | compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; | 97 | compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; |
| 96 | dcr-reg = <00c 002>; | 98 | dcr-reg = <0x00c 0x002>; |
| 97 | }; | 99 | }; |
| 98 | 100 | ||
| 99 | plb { | 101 | plb { |
| @@ -105,80 +107,80 @@ | |||
| 105 | 107 | ||
| 106 | SDRAM0: sdram { | 108 | SDRAM0: sdram { |
| 107 | compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; | 109 | compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; |
| 108 | dcr-reg = <010 2>; | 110 | dcr-reg = <0x010 0x002>; |
| 109 | }; | 111 | }; |
| 110 | 112 | ||
| 111 | DMA0: dma { | 113 | DMA0: dma { |
| 112 | compatible = "ibm,dma-440grx", "ibm,dma-4xx"; | 114 | compatible = "ibm,dma-440grx", "ibm,dma-4xx"; |
| 113 | dcr-reg = <100 027>; | 115 | dcr-reg = <0x100 0x027>; |
| 114 | }; | 116 | }; |
| 115 | 117 | ||
| 116 | MAL0: mcmal { | 118 | MAL0: mcmal { |
| 117 | compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; | 119 | compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; |
| 118 | dcr-reg = <180 62>; | 120 | dcr-reg = <0x180 0x062>; |
| 119 | num-tx-chans = <2>; | 121 | num-tx-chans = <2>; |
| 120 | num-rx-chans = <2>; | 122 | num-rx-chans = <2>; |
| 121 | interrupt-parent = <&MAL0>; | 123 | interrupt-parent = <&MAL0>; |
| 122 | interrupts = <0 1 2 3 4>; | 124 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 123 | #interrupt-cells = <1>; | 125 | #interrupt-cells = <1>; |
| 124 | #address-cells = <0>; | 126 | #address-cells = <0>; |
| 125 | #size-cells = <0>; | 127 | #size-cells = <0>; |
| 126 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 128 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 127 | /*RXEOB*/ 1 &UIC0 b 4 | 129 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 128 | /*SERR*/ 2 &UIC1 0 4 | 130 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 129 | /*TXDE*/ 3 &UIC1 1 4 | 131 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 130 | /*RXDE*/ 4 &UIC1 2 4>; | 132 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 131 | interrupt-map-mask = <ffffffff>; | 133 | interrupt-map-mask = <0xffffffff>; |
| 132 | }; | 134 | }; |
| 133 | 135 | ||
| 134 | POB0: opb { | 136 | POB0: opb { |
| 135 | compatible = "ibm,opb-440grx", "ibm,opb"; | 137 | compatible = "ibm,opb-440grx", "ibm,opb"; |
| 136 | #address-cells = <1>; | 138 | #address-cells = <1>; |
| 137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
| 138 | ranges = <00000000 1 00000000 80000000 | 140 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
| 139 | 80000000 1 80000000 80000000>; | 141 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
| 140 | interrupt-parent = <&UIC1>; | 142 | interrupt-parent = <&UIC1>; |
| 141 | interrupts = <7 4>; | 143 | interrupts = <0x7 0x4>; |
| 142 | clock-frequency = <0>; /* Filled in by zImage */ | 144 | clock-frequency = <0>; /* Filled in by zImage */ |
| 143 | 145 | ||
| 144 | EBC0: ebc { | 146 | EBC0: ebc { |
| 145 | compatible = "ibm,ebc-440grx", "ibm,ebc"; | 147 | compatible = "ibm,ebc-440grx", "ibm,ebc"; |
| 146 | dcr-reg = <012 2>; | 148 | dcr-reg = <0x012 0x002>; |
| 147 | #address-cells = <2>; | 149 | #address-cells = <2>; |
| 148 | #size-cells = <1>; | 150 | #size-cells = <1>; |
| 149 | clock-frequency = <0>; /* Filled in by zImage */ | 151 | clock-frequency = <0>; /* Filled in by zImage */ |
| 150 | interrupts = <5 1>; | 152 | interrupts = <0x5 0x1>; |
| 151 | interrupt-parent = <&UIC1>; | 153 | interrupt-parent = <&UIC1>; |
| 152 | 154 | ||
| 153 | nor_flash@0,0 { | 155 | nor_flash@0,0 { |
| 154 | compatible = "amd,s29gl256n", "cfi-flash"; | 156 | compatible = "amd,s29gl256n", "cfi-flash"; |
| 155 | bank-width = <2>; | 157 | bank-width = <2>; |
| 156 | reg = <0 000000 4000000>; | 158 | reg = <0x00000000 0x00000000 0x04000000>; |
| 157 | #address-cells = <1>; | 159 | #address-cells = <1>; |
| 158 | #size-cells = <1>; | 160 | #size-cells = <1>; |
| 159 | partition@0 { | 161 | partition@0 { |
| 160 | label = "Kernel"; | 162 | label = "Kernel"; |
| 161 | reg = <0 180000>; | 163 | reg = <0x00000000 0x00180000>; |
| 162 | }; | 164 | }; |
| 163 | partition@180000 { | 165 | partition@180000 { |
| 164 | label = "ramdisk"; | 166 | label = "ramdisk"; |
| 165 | reg = <180000 200000>; | 167 | reg = <0x00180000 0x00200000>; |
| 166 | }; | 168 | }; |
| 167 | partition@380000 { | 169 | partition@380000 { |
| 168 | label = "file system"; | 170 | label = "file system"; |
| 169 | reg = <380000 3aa0000>; | 171 | reg = <0x00380000 0x03aa0000>; |
| 170 | }; | 172 | }; |
| 171 | partition@3e20000 { | 173 | partition@3e20000 { |
| 172 | label = "kozio"; | 174 | label = "kozio"; |
| 173 | reg = <3e20000 140000>; | 175 | reg = <0x03e20000 0x00140000>; |
| 174 | }; | 176 | }; |
| 175 | partition@3f60000 { | 177 | partition@3f60000 { |
| 176 | label = "env"; | 178 | label = "env"; |
| 177 | reg = <3f60000 40000>; | 179 | reg = <0x03f60000 0x00040000>; |
| 178 | }; | 180 | }; |
| 179 | partition@3fa0000 { | 181 | partition@3fa0000 { |
| 180 | label = "u-boot"; | 182 | label = "u-boot"; |
| 181 | reg = <3fa0000 60000>; | 183 | reg = <0x03fa0000 0x00060000>; |
| 182 | }; | 184 | }; |
| 183 | }; | 185 | }; |
| 184 | 186 | ||
| @@ -187,69 +189,69 @@ | |||
| 187 | UART0: serial@ef600300 { | 189 | UART0: serial@ef600300 { |
| 188 | device_type = "serial"; | 190 | device_type = "serial"; |
| 189 | compatible = "ns16550"; | 191 | compatible = "ns16550"; |
| 190 | reg = <ef600300 8>; | 192 | reg = <0xef600300 0x00000008>; |
| 191 | virtual-reg = <ef600300>; | 193 | virtual-reg = <0xef600300>; |
| 192 | clock-frequency = <0>; /* Filled in by zImage */ | 194 | clock-frequency = <0>; /* Filled in by zImage */ |
| 193 | current-speed = <1c200>; | 195 | current-speed = <115200>; |
| 194 | interrupt-parent = <&UIC0>; | 196 | interrupt-parent = <&UIC0>; |
| 195 | interrupts = <0 4>; | 197 | interrupts = <0x0 0x4>; |
| 196 | }; | 198 | }; |
| 197 | 199 | ||
| 198 | UART1: serial@ef600400 { | 200 | UART1: serial@ef600400 { |
| 199 | device_type = "serial"; | 201 | device_type = "serial"; |
| 200 | compatible = "ns16550"; | 202 | compatible = "ns16550"; |
| 201 | reg = <ef600400 8>; | 203 | reg = <0xef600400 0x00000008>; |
| 202 | virtual-reg = <ef600400>; | 204 | virtual-reg = <0xef600400>; |
| 203 | clock-frequency = <0>; | 205 | clock-frequency = <0>; |
| 204 | current-speed = <0>; | 206 | current-speed = <0>; |
| 205 | interrupt-parent = <&UIC0>; | 207 | interrupt-parent = <&UIC0>; |
| 206 | interrupts = <1 4>; | 208 | interrupts = <0x1 0x4>; |
| 207 | }; | 209 | }; |
| 208 | 210 | ||
| 209 | UART2: serial@ef600500 { | 211 | UART2: serial@ef600500 { |
| 210 | device_type = "serial"; | 212 | device_type = "serial"; |
| 211 | compatible = "ns16550"; | 213 | compatible = "ns16550"; |
| 212 | reg = <ef600500 8>; | 214 | reg = <0xef600500 0x00000008>; |
| 213 | virtual-reg = <ef600500>; | 215 | virtual-reg = <0xef600500>; |
| 214 | clock-frequency = <0>; | 216 | clock-frequency = <0>; |
| 215 | current-speed = <0>; | 217 | current-speed = <0>; |
| 216 | interrupt-parent = <&UIC1>; | 218 | interrupt-parent = <&UIC1>; |
| 217 | interrupts = <3 4>; | 219 | interrupts = <0x3 0x4>; |
| 218 | }; | 220 | }; |
| 219 | 221 | ||
| 220 | UART3: serial@ef600600 { | 222 | UART3: serial@ef600600 { |
| 221 | device_type = "serial"; | 223 | device_type = "serial"; |
| 222 | compatible = "ns16550"; | 224 | compatible = "ns16550"; |
| 223 | reg = <ef600600 8>; | 225 | reg = <0xef600600 0x00000008>; |
| 224 | virtual-reg = <ef600600>; | 226 | virtual-reg = <0xef600600>; |
| 225 | clock-frequency = <0>; | 227 | clock-frequency = <0>; |
| 226 | current-speed = <0>; | 228 | current-speed = <0>; |
| 227 | interrupt-parent = <&UIC1>; | 229 | interrupt-parent = <&UIC1>; |
| 228 | interrupts = <4 4>; | 230 | interrupts = <0x4 0x4>; |
| 229 | }; | 231 | }; |
| 230 | 232 | ||
| 231 | IIC0: i2c@ef600700 { | 233 | IIC0: i2c@ef600700 { |
| 232 | compatible = "ibm,iic-440grx", "ibm,iic"; | 234 | compatible = "ibm,iic-440grx", "ibm,iic"; |
| 233 | reg = <ef600700 14>; | 235 | reg = <0xef600700 0x00000014>; |
| 234 | interrupt-parent = <&UIC0>; | 236 | interrupt-parent = <&UIC0>; |
| 235 | interrupts = <2 4>; | 237 | interrupts = <0x2 0x4>; |
| 236 | }; | 238 | }; |
| 237 | 239 | ||
| 238 | IIC1: i2c@ef600800 { | 240 | IIC1: i2c@ef600800 { |
| 239 | compatible = "ibm,iic-440grx", "ibm,iic"; | 241 | compatible = "ibm,iic-440grx", "ibm,iic"; |
| 240 | reg = <ef600800 14>; | 242 | reg = <0xef600800 0x00000014>; |
| 241 | interrupt-parent = <&UIC0>; | 243 | interrupt-parent = <&UIC0>; |
| 242 | interrupts = <7 4>; | 244 | interrupts = <0x7 0x4>; |
| 243 | }; | 245 | }; |
| 244 | 246 | ||
| 245 | ZMII0: emac-zmii@ef600d00 { | 247 | ZMII0: emac-zmii@ef600d00 { |
| 246 | compatible = "ibm,zmii-440grx", "ibm,zmii"; | 248 | compatible = "ibm,zmii-440grx", "ibm,zmii"; |
| 247 | reg = <ef600d00 c>; | 249 | reg = <0xef600d00 0x0000000c>; |
| 248 | }; | 250 | }; |
| 249 | 251 | ||
| 250 | RGMII0: emac-rgmii@ef601000 { | 252 | RGMII0: emac-rgmii@ef601000 { |
| 251 | compatible = "ibm,rgmii-440grx", "ibm,rgmii"; | 253 | compatible = "ibm,rgmii-440grx", "ibm,rgmii"; |
| 252 | reg = <ef601000 8>; | 254 | reg = <0xef601000 0x00000008>; |
| 253 | has-mdio; | 255 | has-mdio; |
| 254 | }; | 256 | }; |
| 255 | 257 | ||
| @@ -257,23 +259,23 @@ | |||
| 257 | device_type = "network"; | 259 | device_type = "network"; |
| 258 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; | 260 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; |
| 259 | interrupt-parent = <&EMAC0>; | 261 | interrupt-parent = <&EMAC0>; |
| 260 | interrupts = <0 1>; | 262 | interrupts = <0x0 0x1>; |
| 261 | #interrupt-cells = <1>; | 263 | #interrupt-cells = <1>; |
| 262 | #address-cells = <0>; | 264 | #address-cells = <0>; |
| 263 | #size-cells = <0>; | 265 | #size-cells = <0>; |
| 264 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 266 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
| 265 | /*Wake*/ 1 &UIC1 1d 4>; | 267 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
| 266 | reg = <ef600e00 70>; | 268 | reg = <0xef600e00 0x00000070>; |
| 267 | local-mac-address = [000000000000]; | 269 | local-mac-address = [000000000000]; |
| 268 | mal-device = <&MAL0>; | 270 | mal-device = <&MAL0>; |
| 269 | mal-tx-channel = <0>; | 271 | mal-tx-channel = <0>; |
| 270 | mal-rx-channel = <0>; | 272 | mal-rx-channel = <0>; |
| 271 | cell-index = <0>; | 273 | cell-index = <0>; |
| 272 | max-frame-size = <2328>; | 274 | max-frame-size = <9000>; |
| 273 | rx-fifo-size = <1000>; | 275 | rx-fifo-size = <4096>; |
| 274 | tx-fifo-size = <800>; | 276 | tx-fifo-size = <2048>; |
| 275 | phy-mode = "rgmii"; | 277 | phy-mode = "rgmii"; |
| 276 | phy-map = <00000000>; | 278 | phy-map = <0x00000000>; |
| 277 | zmii-device = <&ZMII0>; | 279 | zmii-device = <&ZMII0>; |
| 278 | zmii-channel = <0>; | 280 | zmii-channel = <0>; |
| 279 | rgmii-device = <&RGMII0>; | 281 | rgmii-device = <&RGMII0>; |
| @@ -286,23 +288,23 @@ | |||
| 286 | device_type = "network"; | 288 | device_type = "network"; |
| 287 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; | 289 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; |
| 288 | interrupt-parent = <&EMAC1>; | 290 | interrupt-parent = <&EMAC1>; |
| 289 | interrupts = <0 1>; | 291 | interrupts = <0x0 0x1>; |
| 290 | #interrupt-cells = <1>; | 292 | #interrupt-cells = <1>; |
| 291 | #address-cells = <0>; | 293 | #address-cells = <0>; |
| 292 | #size-cells = <0>; | 294 | #size-cells = <0>; |
| 293 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 295 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
| 294 | /*Wake*/ 1 &UIC1 1f 4>; | 296 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
| 295 | reg = <ef600f00 70>; | 297 | reg = <0xef600f00 0x00000070>; |
| 296 | local-mac-address = [000000000000]; | 298 | local-mac-address = [000000000000]; |
| 297 | mal-device = <&MAL0>; | 299 | mal-device = <&MAL0>; |
| 298 | mal-tx-channel = <1>; | 300 | mal-tx-channel = <1>; |
| 299 | mal-rx-channel = <1>; | 301 | mal-rx-channel = <1>; |
| 300 | cell-index = <1>; | 302 | cell-index = <1>; |
| 301 | max-frame-size = <2328>; | 303 | max-frame-size = <9000>; |
| 302 | rx-fifo-size = <1000>; | 304 | rx-fifo-size = <4096>; |
| 303 | tx-fifo-size = <800>; | 305 | tx-fifo-size = <2048>; |
| 304 | phy-mode = "rgmii"; | 306 | phy-mode = "rgmii"; |
| 305 | phy-map = <00000000>; | 307 | phy-map = <0x00000000>; |
| 306 | zmii-device = <&ZMII0>; | 308 | zmii-device = <&ZMII0>; |
| 307 | zmii-channel = <1>; | 309 | zmii-channel = <1>; |
| 308 | rgmii-device = <&RGMII0>; | 310 | rgmii-device = <&RGMII0>; |
| @@ -319,24 +321,25 @@ | |||
| 319 | #address-cells = <3>; | 321 | #address-cells = <3>; |
| 320 | compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; | 322 | compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; |
| 321 | primary; | 323 | primary; |
| 322 | reg = <1 eec00000 8 /* Config space access */ | 324 | reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ |
| 323 | 1 eed00000 4 /* IACK */ | 325 | 0x00000001 0xeed00000 0x00000004 /* IACK */ |
| 324 | 1 eed00000 4 /* Special cycle */ | 326 | 0x00000001 0xeed00000 0x00000004 /* Special cycle */ |
| 325 | 1 ef400000 40>; /* Internal registers */ | 327 | 0x00000001 0xef400000 0x00000040>; /* Internal registers */ |
| 326 | 328 | ||
| 327 | /* Outbound ranges, one memory and one IO, | 329 | /* Outbound ranges, one memory and one IO, |
| 328 | * later cannot be changed. Chip supports a second | 330 | * later cannot be changed. Chip supports a second |
| 329 | * IO range but we don't use it for now | 331 | * IO range but we don't use it for now |
| 330 | */ | 332 | */ |
| 331 | ranges = <02000000 0 80000000 1 80000000 0 10000000 | 333 | ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000 |
| 332 | 01000000 0 00000000 1 e8000000 0 00100000>; | 334 | 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000 |
| 335 | 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>; | ||
| 333 | 336 | ||
| 334 | /* Inbound 2GB range starting at 0 */ | 337 | /* Inbound 2GB range starting at 0 */ |
| 335 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 338 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 336 | 339 | ||
| 337 | /* All PCI interrupts are routed to IRQ 67 */ | 340 | /* All PCI interrupts are routed to IRQ 67 */ |
| 338 | interrupt-map-mask = <0000 0 0 0>; | 341 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
| 339 | interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; | 342 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; |
| 340 | }; | 343 | }; |
| 341 | }; | 344 | }; |
| 342 | 345 | ||
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index 22d967178fe9..d252e38283e7 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts | |||
| @@ -44,6 +44,7 @@ | |||
| 44 | timebase-frequency = <0>; // From uboot | 44 | timebase-frequency = <0>; // From uboot |
| 45 | bus-frequency = <0>; | 45 | bus-frequency = <0>; |
| 46 | clock-frequency = <0>; | 46 | clock-frequency = <0>; |
| 47 | next-level-cache = <&L2>; | ||
| 47 | }; | 48 | }; |
| 48 | }; | 49 | }; |
| 49 | 50 | ||
| @@ -161,7 +162,7 @@ | |||
| 161 | interrupts = <0x12 0x2>; | 162 | interrupts = <0x12 0x2>; |
| 162 | }; | 163 | }; |
| 163 | 164 | ||
| 164 | l2-cache-controller@20000 { | 165 | L2: l2-cache-controller@20000 { |
| 165 | compatible = "fsl,8548-l2-cache-controller"; | 166 | compatible = "fsl,8548-l2-cache-controller"; |
| 166 | reg = <0x20000 0x1000>; | 167 | reg = <0x20000 0x1000>; |
| 167 | cache-line-size = <0x20>; // 32 bytes | 168 | cache-line-size = <0x20>; // 32 bytes |
| @@ -265,12 +266,10 @@ | |||
| 265 | mpic: pic@40000 { | 266 | mpic: pic@40000 { |
| 266 | interrupt-controller; | 267 | interrupt-controller; |
| 267 | #address-cells = <0>; | 268 | #address-cells = <0>; |
| 268 | #size-cells = <0>; | ||
| 269 | #interrupt-cells = <2>; | 269 | #interrupt-cells = <2>; |
| 270 | reg = <0x40000 0x40000>; | 270 | reg = <0x40000 0x40000>; |
| 271 | compatible = "chrp,open-pic"; | 271 | compatible = "chrp,open-pic"; |
| 272 | device_type = "open-pic"; | 272 | device_type = "open-pic"; |
| 273 | big-endian; | ||
| 274 | }; | 273 | }; |
| 275 | }; | 274 | }; |
| 276 | 275 | ||
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts index 0476802fba60..e556c5a4cf95 100644 --- a/arch/powerpc/boot/dts/sbc8560.dts +++ b/arch/powerpc/boot/dts/sbc8560.dts | |||
| @@ -43,6 +43,7 @@ | |||
| 43 | timebase-frequency = <0>; // From uboot | 43 | timebase-frequency = <0>; // From uboot |
| 44 | bus-frequency = <0>; | 44 | bus-frequency = <0>; |
| 45 | clock-frequency = <0>; | 45 | clock-frequency = <0>; |
| 46 | next-level-cache = <&L2>; | ||
| 46 | }; | 47 | }; |
| 47 | }; | 48 | }; |
| 48 | 49 | ||
| @@ -66,7 +67,7 @@ | |||
| 66 | interrupts = <0x12 0x2>; | 67 | interrupts = <0x12 0x2>; |
| 67 | }; | 68 | }; |
| 68 | 69 | ||
| 69 | l2-cache-controller@20000 { | 70 | L2: l2-cache-controller@20000 { |
| 70 | compatible = "fsl,8560-l2-cache-controller"; | 71 | compatible = "fsl,8560-l2-cache-controller"; |
| 71 | reg = <0x20000 0x1000>; | 72 | reg = <0x20000 0x1000>; |
| 72 | cache-line-size = <0x20>; // 32 bytes | 73 | cache-line-size = <0x20>; // 32 bytes |
| @@ -155,8 +156,8 @@ | |||
| 155 | mpic: pic@40000 { | 156 | mpic: pic@40000 { |
| 156 | interrupt-controller; | 157 | interrupt-controller; |
| 157 | #address-cells = <0>; | 158 | #address-cells = <0>; |
| 158 | #size-cells = <0>; | ||
| 159 | #interrupt-cells = <2>; | 159 | #interrupt-cells = <2>; |
| 160 | compatible = "chrp,open-pic"; | ||
| 160 | reg = <0x40000 0x40000>; | 161 | reg = <0x40000 0x40000>; |
| 161 | device_type = "open-pic"; | 162 | device_type = "open-pic"; |
| 162 | }; | 163 | }; |
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts index 72d67564bdfc..149dabc55217 100644 --- a/arch/powerpc/boot/dts/sequoia.dts +++ b/arch/powerpc/boot/dts/sequoia.dts | |||
| @@ -12,12 +12,14 @@ | |||
| 12 | * | 12 | * |
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | /dts-v1/; | ||
| 16 | |||
| 15 | / { | 17 | / { |
| 16 | #address-cells = <2>; | 18 | #address-cells = <2>; |
| 17 | #size-cells = <1>; | 19 | #size-cells = <1>; |
| 18 | model = "amcc,sequoia"; | 20 | model = "amcc,sequoia"; |
| 19 | compatible = "amcc,sequoia"; | 21 | compatible = "amcc,sequoia"; |
| 20 | dcr-parent = <&/cpus/cpu@0>; | 22 | dcr-parent = <&{/cpus/cpu@0}>; |
| 21 | 23 | ||
| 22 | aliases { | 24 | aliases { |
| 23 | ethernet0 = &EMAC0; | 25 | ethernet0 = &EMAC0; |
| @@ -35,13 +37,13 @@ | |||
| 35 | cpu@0 { | 37 | cpu@0 { |
| 36 | device_type = "cpu"; | 38 | device_type = "cpu"; |
| 37 | model = "PowerPC,440EPx"; | 39 | model = "PowerPC,440EPx"; |
| 38 | reg = <0>; | 40 | reg = <0x00000000>; |
| 39 | clock-frequency = <0>; /* Filled in by zImage */ | 41 | clock-frequency = <0>; /* Filled in by zImage */ |
| 40 | timebase-frequency = <0>; /* Filled in by zImage */ | 42 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 41 | i-cache-line-size = <20>; | 43 | i-cache-line-size = <32>; |
| 42 | d-cache-line-size = <20>; | 44 | d-cache-line-size = <32>; |
| 43 | i-cache-size = <8000>; | 45 | i-cache-size = <32768>; |
| 44 | d-cache-size = <8000>; | 46 | d-cache-size = <32768>; |
| 45 | dcr-controller; | 47 | dcr-controller; |
| 46 | dcr-access-method = "native"; | 48 | dcr-access-method = "native"; |
| 47 | }; | 49 | }; |
| @@ -49,14 +51,14 @@ | |||
| 49 | 51 | ||
| 50 | memory { | 52 | memory { |
| 51 | device_type = "memory"; | 53 | device_type = "memory"; |
| 52 | reg = <0 0 0>; /* Filled in by zImage */ | 54 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
| 53 | }; | 55 | }; |
| 54 | 56 | ||
| 55 | UIC0: interrupt-controller0 { | 57 | UIC0: interrupt-controller0 { |
| 56 | compatible = "ibm,uic-440epx","ibm,uic"; | 58 | compatible = "ibm,uic-440epx","ibm,uic"; |
| 57 | interrupt-controller; | 59 | interrupt-controller; |
| 58 | cell-index = <0>; | 60 | cell-index = <0>; |
| 59 | dcr-reg = <0c0 009>; | 61 | dcr-reg = <0x0c0 0x009>; |
| 60 | #address-cells = <0>; | 62 | #address-cells = <0>; |
| 61 | #size-cells = <0>; | 63 | #size-cells = <0>; |
| 62 | #interrupt-cells = <2>; | 64 | #interrupt-cells = <2>; |
| @@ -66,11 +68,11 @@ | |||
| 66 | compatible = "ibm,uic-440epx","ibm,uic"; | 68 | compatible = "ibm,uic-440epx","ibm,uic"; |
| 67 | interrupt-controller; | 69 | interrupt-controller; |
| 68 | cell-index = <1>; | 70 | cell-index = <1>; |
| 69 | dcr-reg = <0d0 009>; | 71 | dcr-reg = <0x0d0 0x009>; |
| 70 | #address-cells = <0>; | 72 | #address-cells = <0>; |
| 71 | #size-cells = <0>; | 73 | #size-cells = <0>; |
| 72 | #interrupt-cells = <2>; | 74 | #interrupt-cells = <2>; |
| 73 | interrupts = <1e 4 1f 4>; /* cascade */ | 75 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 74 | interrupt-parent = <&UIC0>; | 76 | interrupt-parent = <&UIC0>; |
| 75 | }; | 77 | }; |
| 76 | 78 | ||
| @@ -78,22 +80,22 @@ | |||
| 78 | compatible = "ibm,uic-440epx","ibm,uic"; | 80 | compatible = "ibm,uic-440epx","ibm,uic"; |
| 79 | interrupt-controller; | 81 | interrupt-controller; |
| 80 | cell-index = <2>; | 82 | cell-index = <2>; |
| 81 | dcr-reg = <0e0 009>; | 83 | dcr-reg = <0x0e0 0x009>; |
| 82 | #address-cells = <0>; | 84 | #address-cells = <0>; |
| 83 | #size-cells = <0>; | 85 | #size-cells = <0>; |
| 84 | #interrupt-cells = <2>; | 86 | #interrupt-cells = <2>; |
| 85 | interrupts = <1c 4 1d 4>; /* cascade */ | 87 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
| 86 | interrupt-parent = <&UIC0>; | 88 | interrupt-parent = <&UIC0>; |
| 87 | }; | 89 | }; |
| 88 | 90 | ||
| 89 | SDR0: sdr { | 91 | SDR0: sdr { |
| 90 | compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; | 92 | compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; |
| 91 | dcr-reg = <00e 002>; | 93 | dcr-reg = <0x00e 0x002>; |
| 92 | }; | 94 | }; |
| 93 | 95 | ||
| 94 | CPR0: cpr { | 96 | CPR0: cpr { |
| 95 | compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; | 97 | compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; |
| 96 | dcr-reg = <00c 002>; | 98 | dcr-reg = <0x00c 0x002>; |
| 97 | }; | 99 | }; |
| 98 | 100 | ||
| 99 | plb { | 101 | plb { |
| @@ -105,44 +107,44 @@ | |||
| 105 | 107 | ||
| 106 | SDRAM0: sdram { | 108 | SDRAM0: sdram { |
| 107 | compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; | 109 | compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; |
| 108 | dcr-reg = <010 2>; | 110 | dcr-reg = <0x010 0x002>; |
| 109 | }; | 111 | }; |
| 110 | 112 | ||
| 111 | DMA0: dma { | 113 | DMA0: dma { |
| 112 | compatible = "ibm,dma-440epx", "ibm,dma-4xx"; | 114 | compatible = "ibm,dma-440epx", "ibm,dma-4xx"; |
| 113 | dcr-reg = <100 027>; | 115 | dcr-reg = <0x100 0x027>; |
| 114 | }; | 116 | }; |
| 115 | 117 | ||
| 116 | MAL0: mcmal { | 118 | MAL0: mcmal { |
| 117 | compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; | 119 | compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; |
| 118 | dcr-reg = <180 62>; | 120 | dcr-reg = <0x180 0x062>; |
| 119 | num-tx-chans = <2>; | 121 | num-tx-chans = <2>; |
| 120 | num-rx-chans = <2>; | 122 | num-rx-chans = <2>; |
| 121 | interrupt-parent = <&MAL0>; | 123 | interrupt-parent = <&MAL0>; |
| 122 | interrupts = <0 1 2 3 4>; | 124 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 123 | #interrupt-cells = <1>; | 125 | #interrupt-cells = <1>; |
| 124 | #address-cells = <0>; | 126 | #address-cells = <0>; |
| 125 | #size-cells = <0>; | 127 | #size-cells = <0>; |
| 126 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 128 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 127 | /*RXEOB*/ 1 &UIC0 b 4 | 129 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 128 | /*SERR*/ 2 &UIC1 0 4 | 130 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 129 | /*TXDE*/ 3 &UIC1 1 4 | 131 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 130 | /*RXDE*/ 4 &UIC1 2 4>; | 132 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 131 | interrupt-map-mask = <ffffffff>; | 133 | interrupt-map-mask = <0xffffffff>; |
| 132 | }; | 134 | }; |
| 133 | 135 | ||
| 134 | USB1: usb@e0000400 { | 136 | USB1: usb@e0000400 { |
| 135 | compatible = "ohci-be"; | 137 | compatible = "ohci-be"; |
| 136 | reg = <0 e0000400 60>; | 138 | reg = <0x00000000 0xe0000400 0x00000060>; |
| 137 | interrupt-parent = <&UIC0>; | 139 | interrupt-parent = <&UIC0>; |
| 138 | interrupts = <15 8>; | 140 | interrupts = <0x15 0x8>; |
| 139 | }; | 141 | }; |
| 140 | 142 | ||
| 141 | USB0: ehci@e0000300 { | 143 | USB0: ehci@e0000300 { |
| 142 | compatible = "ibm,usb-ehci-440epx", "usb-ehci"; | 144 | compatible = "ibm,usb-ehci-440epx", "usb-ehci"; |
| 143 | interrupt-parent = <&UIC0>; | 145 | interrupt-parent = <&UIC0>; |
| 144 | interrupts = <1a 4>; | 146 | interrupts = <0x1a 0x4>; |
| 145 | reg = <0 e0000300 90 0 e0000390 70>; | 147 | reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>; |
| 146 | big-endian; | 148 | big-endian; |
| 147 | }; | 149 | }; |
| 148 | 150 | ||
| @@ -150,50 +152,50 @@ | |||
| 150 | compatible = "ibm,opb-440epx", "ibm,opb"; | 152 | compatible = "ibm,opb-440epx", "ibm,opb"; |
| 151 | #address-cells = <1>; | 153 | #address-cells = <1>; |
| 152 | #size-cells = <1>; | 154 | #size-cells = <1>; |
| 153 | ranges = <00000000 1 00000000 80000000 | 155 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
| 154 | 80000000 1 80000000 80000000>; | 156 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
| 155 | interrupt-parent = <&UIC1>; | 157 | interrupt-parent = <&UIC1>; |
| 156 | interrupts = <7 4>; | 158 | interrupts = <0x7 0x4>; |
| 157 | clock-frequency = <0>; /* Filled in by zImage */ | 159 | clock-frequency = <0>; /* Filled in by zImage */ |
| 158 | 160 | ||
| 159 | EBC0: ebc { | 161 | EBC0: ebc { |
| 160 | compatible = "ibm,ebc-440epx", "ibm,ebc"; | 162 | compatible = "ibm,ebc-440epx", "ibm,ebc"; |
| 161 | dcr-reg = <012 2>; | 163 | dcr-reg = <0x012 0x002>; |
| 162 | #address-cells = <2>; | 164 | #address-cells = <2>; |
| 163 | #size-cells = <1>; | 165 | #size-cells = <1>; |
| 164 | clock-frequency = <0>; /* Filled in by zImage */ | 166 | clock-frequency = <0>; /* Filled in by zImage */ |
| 165 | interrupts = <5 1>; | 167 | interrupts = <0x5 0x1>; |
| 166 | interrupt-parent = <&UIC1>; | 168 | interrupt-parent = <&UIC1>; |
| 167 | 169 | ||
| 168 | nor_flash@0,0 { | 170 | nor_flash@0,0 { |
| 169 | compatible = "amd,s29gl256n", "cfi-flash"; | 171 | compatible = "amd,s29gl256n", "cfi-flash"; |
| 170 | bank-width = <2>; | 172 | bank-width = <2>; |
| 171 | reg = <0 000000 4000000>; | 173 | reg = <0x00000000 0x00000000 0x04000000>; |
| 172 | #address-cells = <1>; | 174 | #address-cells = <1>; |
| 173 | #size-cells = <1>; | 175 | #size-cells = <1>; |
| 174 | partition@0 { | 176 | partition@0 { |
| 175 | label = "Kernel"; | 177 | label = "Kernel"; |
| 176 | reg = <0 180000>; | 178 | reg = <0x00000000 0x00180000>; |
| 177 | }; | 179 | }; |
| 178 | partition@180000 { | 180 | partition@180000 { |
| 179 | label = "ramdisk"; | 181 | label = "ramdisk"; |
| 180 | reg = <180000 200000>; | 182 | reg = <0x00180000 0x00200000>; |
| 181 | }; | 183 | }; |
| 182 | partition@380000 { | 184 | partition@380000 { |
| 183 | label = "file system"; | 185 | label = "file system"; |
| 184 | reg = <380000 3aa0000>; | 186 | reg = <0x00380000 0x03aa0000>; |
| 185 | }; | 187 | }; |
| 186 | partition@3e20000 { | 188 | partition@3e20000 { |
| 187 | label = "kozio"; | 189 | label = "kozio"; |
| 188 | reg = <3e20000 140000>; | 190 | reg = <0x03e20000 0x00140000>; |
| 189 | }; | 191 | }; |
| 190 | partition@3f60000 { | 192 | partition@3f60000 { |
| 191 | label = "env"; | 193 | label = "env"; |
| 192 | reg = <3f60000 40000>; | 194 | reg = <0x03f60000 0x00040000>; |
| 193 | }; | 195 | }; |
| 194 | partition@3fa0000 { | 196 | partition@3fa0000 { |
| 195 | label = "u-boot"; | 197 | label = "u-boot"; |
| 196 | reg = <3fa0000 60000>; | 198 | reg = <0x03fa0000 0x00060000>; |
| 197 | }; | 199 | }; |
| 198 | }; | 200 | }; |
| 199 | 201 | ||
| @@ -202,69 +204,69 @@ | |||
| 202 | UART0: serial@ef600300 { | 204 | UART0: serial@ef600300 { |
| 203 | device_type = "serial"; | 205 | device_type = "serial"; |
| 204 | compatible = "ns16550"; | 206 | compatible = "ns16550"; |
| 205 | reg = <ef600300 8>; | 207 | reg = <0xef600300 0x00000008>; |
| 206 | virtual-reg = <ef600300>; | 208 | virtual-reg = <0xef600300>; |
| 207 | clock-frequency = <0>; /* Filled in by zImage */ | 209 | clock-frequency = <0>; /* Filled in by zImage */ |
| 208 | current-speed = <1c200>; | 210 | current-speed = <115200>; |
| 209 | interrupt-parent = <&UIC0>; | 211 | interrupt-parent = <&UIC0>; |
| 210 | interrupts = <0 4>; | 212 | interrupts = <0x0 0x4>; |
| 211 | }; | 213 | }; |
| 212 | 214 | ||
| 213 | UART1: serial@ef600400 { | 215 | UART1: serial@ef600400 { |
| 214 | device_type = "serial"; | 216 | device_type = "serial"; |
| 215 | compatible = "ns16550"; | 217 | compatible = "ns16550"; |
| 216 | reg = <ef600400 8>; | 218 | reg = <0xef600400 0x00000008>; |
| 217 | virtual-reg = <ef600400>; | 219 | virtual-reg = <0xef600400>; |
| 218 | clock-frequency = <0>; | 220 | clock-frequency = <0>; |
| 219 | current-speed = <0>; | 221 | current-speed = <0>; |
| 220 | interrupt-parent = <&UIC0>; | 222 | interrupt-parent = <&UIC0>; |
| 221 | interrupts = <1 4>; | 223 | interrupts = <0x1 0x4>; |
| 222 | }; | 224 | }; |
| 223 | 225 | ||
| 224 | UART2: serial@ef600500 { | 226 | UART2: serial@ef600500 { |
| 225 | device_type = "serial"; | 227 | device_type = "serial"; |
| 226 | compatible = "ns16550"; | 228 | compatible = "ns16550"; |
| 227 | reg = <ef600500 8>; | 229 | reg = <0xef600500 0x00000008>; |
| 228 | virtual-reg = <ef600500>; | 230 | virtual-reg = <0xef600500>; |
| 229 | clock-frequency = <0>; | 231 | clock-frequency = <0>; |
| 230 | current-speed = <0>; | 232 | current-speed = <0>; |
| 231 | interrupt-parent = <&UIC1>; | 233 | interrupt-parent = <&UIC1>; |
| 232 | interrupts = <3 4>; | 234 | interrupts = <0x3 0x4>; |
| 233 | }; | 235 | }; |
| 234 | 236 | ||
| 235 | UART3: serial@ef600600 { | 237 | UART3: serial@ef600600 { |
| 236 | device_type = "serial"; | 238 | device_type = "serial"; |
| 237 | compatible = "ns16550"; | 239 | compatible = "ns16550"; |
| 238 | reg = <ef600600 8>; | 240 | reg = <0xef600600 0x00000008>; |
| 239 | virtual-reg = <ef600600>; | 241 | virtual-reg = <0xef600600>; |
| 240 | clock-frequency = <0>; | 242 | clock-frequency = <0>; |
| 241 | current-speed = <0>; | 243 | current-speed = <0>; |
| 242 | interrupt-parent = <&UIC1>; | 244 | interrupt-parent = <&UIC1>; |
| 243 | interrupts = <4 4>; | 245 | interrupts = <0x4 0x4>; |
| 244 | }; | 246 | }; |
| 245 | 247 | ||
| 246 | IIC0: i2c@ef600700 { | 248 | IIC0: i2c@ef600700 { |
| 247 | compatible = "ibm,iic-440epx", "ibm,iic"; | 249 | compatible = "ibm,iic-440epx", "ibm,iic"; |
| 248 | reg = <ef600700 14>; | 250 | reg = <0xef600700 0x00000014>; |
| 249 | interrupt-parent = <&UIC0>; | 251 | interrupt-parent = <&UIC0>; |
| 250 | interrupts = <2 4>; | 252 | interrupts = <0x2 0x4>; |
| 251 | }; | 253 | }; |
| 252 | 254 | ||
| 253 | IIC1: i2c@ef600800 { | 255 | IIC1: i2c@ef600800 { |
| 254 | compatible = "ibm,iic-440epx", "ibm,iic"; | 256 | compatible = "ibm,iic-440epx", "ibm,iic"; |
| 255 | reg = <ef600800 14>; | 257 | reg = <0xef600800 0x00000014>; |
| 256 | interrupt-parent = <&UIC0>; | 258 | interrupt-parent = <&UIC0>; |
| 257 | interrupts = <7 4>; | 259 | interrupts = <0x7 0x4>; |
| 258 | }; | 260 | }; |
| 259 | 261 | ||
| 260 | ZMII0: emac-zmii@ef600d00 { | 262 | ZMII0: emac-zmii@ef600d00 { |
| 261 | compatible = "ibm,zmii-440epx", "ibm,zmii"; | 263 | compatible = "ibm,zmii-440epx", "ibm,zmii"; |
| 262 | reg = <ef600d00 c>; | 264 | reg = <0xef600d00 0x0000000c>; |
| 263 | }; | 265 | }; |
| 264 | 266 | ||
| 265 | RGMII0: emac-rgmii@ef601000 { | 267 | RGMII0: emac-rgmii@ef601000 { |
| 266 | compatible = "ibm,rgmii-440epx", "ibm,rgmii"; | 268 | compatible = "ibm,rgmii-440epx", "ibm,rgmii"; |
| 267 | reg = <ef601000 8>; | 269 | reg = <0xef601000 0x00000008>; |
| 268 | has-mdio; | 270 | has-mdio; |
| 269 | }; | 271 | }; |
| 270 | 272 | ||
| @@ -272,23 +274,23 @@ | |||
| 272 | device_type = "network"; | 274 | device_type = "network"; |
| 273 | compatible = "ibm,emac-440epx", "ibm,emac4"; | 275 | compatible = "ibm,emac-440epx", "ibm,emac4"; |
| 274 | interrupt-parent = <&EMAC0>; | 276 | interrupt-parent = <&EMAC0>; |
| 275 | interrupts = <0 1>; | 277 | interrupts = <0x0 0x1>; |
| 276 | #interrupt-cells = <1>; | 278 | #interrupt-cells = <1>; |
| 277 | #address-cells = <0>; | 279 | #address-cells = <0>; |
| 278 | #size-cells = <0>; | 280 | #size-cells = <0>; |
| 279 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 281 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
| 280 | /*Wake*/ 1 &UIC1 1d 4>; | 282 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
| 281 | reg = <ef600e00 70>; | 283 | reg = <0xef600e00 0x00000070>; |
| 282 | local-mac-address = [000000000000]; | 284 | local-mac-address = [000000000000]; |
| 283 | mal-device = <&MAL0>; | 285 | mal-device = <&MAL0>; |
| 284 | mal-tx-channel = <0>; | 286 | mal-tx-channel = <0>; |
| 285 | mal-rx-channel = <0>; | 287 | mal-rx-channel = <0>; |
| 286 | cell-index = <0>; | 288 | cell-index = <0>; |
| 287 | max-frame-size = <2328>; | 289 | max-frame-size = <9000>; |
| 288 | rx-fifo-size = <1000>; | 290 | rx-fifo-size = <4096>; |
| 289 | tx-fifo-size = <800>; | 291 | tx-fifo-size = <2048>; |
| 290 | phy-mode = "rgmii"; | 292 | phy-mode = "rgmii"; |
| 291 | phy-map = <00000000>; | 293 | phy-map = <0x00000000>; |
| 292 | zmii-device = <&ZMII0>; | 294 | zmii-device = <&ZMII0>; |
| 293 | zmii-channel = <0>; | 295 | zmii-channel = <0>; |
| 294 | rgmii-device = <&RGMII0>; | 296 | rgmii-device = <&RGMII0>; |
| @@ -301,23 +303,23 @@ | |||
| 301 | device_type = "network"; | 303 | device_type = "network"; |
| 302 | compatible = "ibm,emac-440epx", "ibm,emac4"; | 304 | compatible = "ibm,emac-440epx", "ibm,emac4"; |
| 303 | interrupt-parent = <&EMAC1>; | 305 | interrupt-parent = <&EMAC1>; |
| 304 | interrupts = <0 1>; | 306 | interrupts = <0x0 0x1>; |
| 305 | #interrupt-cells = <1>; | 307 | #interrupt-cells = <1>; |
| 306 | #address-cells = <0>; | 308 | #address-cells = <0>; |
| 307 | #size-cells = <0>; | 309 | #size-cells = <0>; |
| 308 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 310 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
| 309 | /*Wake*/ 1 &UIC1 1f 4>; | 311 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
| 310 | reg = <ef600f00 70>; | 312 | reg = <0xef600f00 0x00000070>; |
| 311 | local-mac-address = [000000000000]; | 313 | local-mac-address = [000000000000]; |
| 312 | mal-device = <&MAL0>; | 314 | mal-device = <&MAL0>; |
| 313 | mal-tx-channel = <1>; | 315 | mal-tx-channel = <1>; |
| 314 | mal-rx-channel = <1>; | 316 | mal-rx-channel = <1>; |
| 315 | cell-index = <1>; | 317 | cell-index = <1>; |
| 316 | max-frame-size = <2328>; | 318 | max-frame-size = <9000>; |
| 317 | rx-fifo-size = <1000>; | 319 | rx-fifo-size = <4096>; |
| 318 | tx-fifo-size = <800>; | 320 | tx-fifo-size = <2048>; |
| 319 | phy-mode = "rgmii"; | 321 | phy-mode = "rgmii"; |
| 320 | phy-map = <00000000>; | 322 | phy-map = <0x00000000>; |
| 321 | zmii-device = <&ZMII0>; | 323 | zmii-device = <&ZMII0>; |
| 322 | zmii-channel = <1>; | 324 | zmii-channel = <1>; |
| 323 | rgmii-device = <&RGMII0>; | 325 | rgmii-device = <&RGMII0>; |
| @@ -334,10 +336,10 @@ | |||
| 334 | #address-cells = <3>; | 336 | #address-cells = <3>; |
| 335 | compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; | 337 | compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; |
| 336 | primary; | 338 | primary; |
| 337 | reg = <1 eec00000 8 /* Config space access */ | 339 | reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ |
| 338 | 1 eed00000 4 /* IACK */ | 340 | 0x00000001 0xeed00000 0x00000004 /* IACK */ |
| 339 | 1 eed00000 4 /* Special cycle */ | 341 | 0x00000001 0xeed00000 0x00000004 /* Special cycle */ |
| 340 | 1 ef400000 40>; /* Internal registers */ | 342 | 0x00000001 0xef400000 0x00000040>; /* Internal registers */ |
| 341 | 343 | ||
| 342 | /* Outbound ranges, one memory and one IO, | 344 | /* Outbound ranges, one memory and one IO, |
| 343 | * later cannot be changed. Chip supports a second | 345 | * later cannot be changed. Chip supports a second |
| @@ -347,16 +349,16 @@ | |||
| 347 | * I/O 1 E800 0000 1 E800 FFFF 64KB | 349 | * I/O 1 E800 0000 1 E800 FFFF 64KB |
| 348 | * I/O 1 E880 0000 1 EBFF FFFF 56MB | 350 | * I/O 1 E880 0000 1 EBFF FFFF 56MB |
| 349 | */ | 351 | */ |
| 350 | ranges = <02000000 0 80000000 1 80000000 0 40000000 | 352 | ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000 |
| 351 | 01000000 0 00000000 1 e8000000 0 00010000 | 353 | 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000 |
| 352 | 01000000 0 00000000 1 e8800000 0 03800000>; | 354 | 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>; |
| 353 | 355 | ||
| 354 | /* Inbound 2GB range starting at 0 */ | 356 | /* Inbound 2GB range starting at 0 */ |
| 355 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 357 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 356 | 358 | ||
| 357 | /* All PCI interrupts are routed to IRQ 67 */ | 359 | /* All PCI interrupts are routed to IRQ 67 */ |
| 358 | interrupt-map-mask = <0000 0 0 0>; | 360 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
| 359 | interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; | 361 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; |
| 360 | }; | 362 | }; |
| 361 | }; | 363 | }; |
| 362 | 364 | ||
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts index 5893816c0bce..eab680ce10da 100644 --- a/arch/powerpc/boot/dts/storcenter.dts +++ b/arch/powerpc/boot/dts/storcenter.dts | |||
| @@ -95,6 +95,7 @@ | |||
| 95 | 95 | ||
| 96 | mpic: interrupt-controller@40000 { | 96 | mpic: interrupt-controller@40000 { |
| 97 | #interrupt-cells = <2>; | 97 | #interrupt-cells = <2>; |
| 98 | #address-cells = <0>; | ||
| 98 | device_type = "open-pic"; | 99 | device_type = "open-pic"; |
| 99 | compatible = "chrp,open-pic"; | 100 | compatible = "chrp,open-pic"; |
| 100 | interrupt-controller; | 101 | interrupt-controller; |
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index f81fd7fdb29e..1e612836b248 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts | |||
| @@ -38,6 +38,7 @@ | |||
| 38 | timebase-frequency = <0>; | 38 | timebase-frequency = <0>; |
| 39 | bus-frequency = <0>; | 39 | bus-frequency = <0>; |
| 40 | clock-frequency = <0>; | 40 | clock-frequency = <0>; |
| 41 | next-level-cache = <&L2>; | ||
| 41 | }; | 42 | }; |
| 42 | }; | 43 | }; |
| 43 | 44 | ||
| @@ -62,7 +63,7 @@ | |||
| 62 | interrupts = <18 2>; | 63 | interrupts = <18 2>; |
| 63 | }; | 64 | }; |
| 64 | 65 | ||
| 65 | l2-cache-controller@20000 { | 66 | L2: l2-cache-controller@20000 { |
| 66 | compatible = "fsl,8540-l2-cache-controller"; | 67 | compatible = "fsl,8540-l2-cache-controller"; |
| 67 | reg = <0x20000 0x1000>; | 68 | reg = <0x20000 0x1000>; |
| 68 | cache-line-size = <32>; | 69 | cache-line-size = <32>; |
| @@ -131,6 +132,7 @@ | |||
| 131 | #address-cells = <0>; | 132 | #address-cells = <0>; |
| 132 | #interrupt-cells = <2>; | 133 | #interrupt-cells = <2>; |
| 133 | reg = <0x40000 0x40000>; | 134 | reg = <0x40000 0x40000>; |
| 135 | compatible = "chrp,open-pic"; | ||
| 134 | device_type = "open-pic"; | 136 | device_type = "open-pic"; |
| 135 | }; | 137 | }; |
| 136 | 138 | ||
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts index e808e1c5593a..dcb749884b6d 100644 --- a/arch/powerpc/boot/dts/taishan.dts +++ b/arch/powerpc/boot/dts/taishan.dts | |||
| @@ -10,12 +10,14 @@ | |||
| 10 | * any warranty of any kind, whether express or implied. | 10 | * any warranty of any kind, whether express or implied. |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | /dts-v1/; | ||
| 14 | |||
| 13 | / { | 15 | / { |
| 14 | #address-cells = <2>; | 16 | #address-cells = <2>; |
| 15 | #size-cells = <1>; | 17 | #size-cells = <1>; |
| 16 | model = "amcc,taishan"; | 18 | model = "amcc,taishan"; |
| 17 | compatible = "amcc,taishan"; | 19 | compatible = "amcc,taishan"; |
| 18 | dcr-parent = <&/cpus/cpu@0>; | 20 | dcr-parent = <&{/cpus/cpu@0}>; |
| 19 | 21 | ||
| 20 | aliases { | 22 | aliases { |
| 21 | ethernet0 = &EMAC2; | 23 | ethernet0 = &EMAC2; |
| @@ -31,13 +33,13 @@ | |||
| 31 | cpu@0 { | 33 | cpu@0 { |
| 32 | device_type = "cpu"; | 34 | device_type = "cpu"; |
| 33 | model = "PowerPC,440GX"; | 35 | model = "PowerPC,440GX"; |
| 34 | reg = <0>; | 36 | reg = <0x00000000>; |
| 35 | clock-frequency = <2FAF0800>; // 800MHz | 37 | clock-frequency = <800000000>; // 800MHz |
| 36 | timebase-frequency = <0>; // Filled in by zImage | 38 | timebase-frequency = <0>; // Filled in by zImage |
| 37 | i-cache-line-size = <32>; | 39 | i-cache-line-size = <50>; |
| 38 | d-cache-line-size = <32>; | 40 | d-cache-line-size = <50>; |
| 39 | i-cache-size = <8000>; /* 32 kB */ | 41 | i-cache-size = <32768>; /* 32 kB */ |
| 40 | d-cache-size = <8000>; /* 32 kB */ | 42 | d-cache-size = <32768>; /* 32 kB */ |
| 41 | dcr-controller; | 43 | dcr-controller; |
| 42 | dcr-access-method = "native"; | 44 | dcr-access-method = "native"; |
| 43 | }; | 45 | }; |
| @@ -45,7 +47,7 @@ | |||
| 45 | 47 | ||
| 46 | memory { | 48 | memory { |
| 47 | device_type = "memory"; | 49 | device_type = "memory"; |
| 48 | reg = <0 0 0>; // Filled in by zImage | 50 | reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage |
| 49 | }; | 51 | }; |
| 50 | 52 | ||
| 51 | 53 | ||
| @@ -53,7 +55,7 @@ | |||
| 53 | compatible = "ibm,uic-440gx", "ibm,uic"; | 55 | compatible = "ibm,uic-440gx", "ibm,uic"; |
| 54 | interrupt-controller; | 56 | interrupt-controller; |
| 55 | cell-index = <3>; | 57 | cell-index = <3>; |
| 56 | dcr-reg = <200 009>; | 58 | dcr-reg = <0x200 0x009>; |
| 57 | #address-cells = <0>; | 59 | #address-cells = <0>; |
| 58 | #size-cells = <0>; | 60 | #size-cells = <0>; |
| 59 | #interrupt-cells = <2>; | 61 | #interrupt-cells = <2>; |
| @@ -64,11 +66,11 @@ | |||
| 64 | compatible = "ibm,uic-440gx", "ibm,uic"; | 66 | compatible = "ibm,uic-440gx", "ibm,uic"; |
| 65 | interrupt-controller; | 67 | interrupt-controller; |
| 66 | cell-index = <0>; | 68 | cell-index = <0>; |
| 67 | dcr-reg = <0c0 009>; | 69 | dcr-reg = <0x0c0 0x009>; |
| 68 | #address-cells = <0>; | 70 | #address-cells = <0>; |
| 69 | #size-cells = <0>; | 71 | #size-cells = <0>; |
| 70 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
| 71 | interrupts = <01 4 00 4>; /* cascade - first non-critical */ | 73 | interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */ |
| 72 | interrupt-parent = <&UICB0>; | 74 | interrupt-parent = <&UICB0>; |
| 73 | 75 | ||
| 74 | }; | 76 | }; |
| @@ -77,11 +79,11 @@ | |||
| 77 | compatible = "ibm,uic-440gx", "ibm,uic"; | 79 | compatible = "ibm,uic-440gx", "ibm,uic"; |
| 78 | interrupt-controller; | 80 | interrupt-controller; |
| 79 | cell-index = <1>; | 81 | cell-index = <1>; |
| 80 | dcr-reg = <0d0 009>; | 82 | dcr-reg = <0x0d0 0x009>; |
| 81 | #address-cells = <0>; | 83 | #address-cells = <0>; |
| 82 | #size-cells = <0>; | 84 | #size-cells = <0>; |
| 83 | #interrupt-cells = <2>; | 85 | #interrupt-cells = <2>; |
| 84 | interrupts = <03 4 02 4>; /* cascade */ | 86 | interrupts = <0x3 0x4 0x2 0x4>; /* cascade */ |
| 85 | interrupt-parent = <&UICB0>; | 87 | interrupt-parent = <&UICB0>; |
| 86 | }; | 88 | }; |
| 87 | 89 | ||
| @@ -89,29 +91,29 @@ | |||
| 89 | compatible = "ibm,uic-440gx", "ibm,uic"; | 91 | compatible = "ibm,uic-440gx", "ibm,uic"; |
| 90 | interrupt-controller; | 92 | interrupt-controller; |
| 91 | cell-index = <2>; /* was 1 */ | 93 | cell-index = <2>; /* was 1 */ |
| 92 | dcr-reg = <210 009>; | 94 | dcr-reg = <0x210 0x009>; |
| 93 | #address-cells = <0>; | 95 | #address-cells = <0>; |
| 94 | #size-cells = <0>; | 96 | #size-cells = <0>; |
| 95 | #interrupt-cells = <2>; | 97 | #interrupt-cells = <2>; |
| 96 | interrupts = <05 4 04 4>; /* cascade */ | 98 | interrupts = <0x5 0x4 0x4 0x4>; /* cascade */ |
| 97 | interrupt-parent = <&UICB0>; | 99 | interrupt-parent = <&UICB0>; |
| 98 | }; | 100 | }; |
| 99 | 101 | ||
| 100 | 102 | ||
| 101 | CPC0: cpc { | 103 | CPC0: cpc { |
| 102 | compatible = "ibm,cpc-440gp"; | 104 | compatible = "ibm,cpc-440gp"; |
| 103 | dcr-reg = <0b0 003 0e0 010>; | 105 | dcr-reg = <0x0b0 0x003 0x0e0 0x010>; |
| 104 | // FIXME: anything else? | 106 | // FIXME: anything else? |
| 105 | }; | 107 | }; |
| 106 | 108 | ||
| 107 | L2C0: l2c { | 109 | L2C0: l2c { |
| 108 | compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; | 110 | compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; |
| 109 | dcr-reg = <20 8 /* Internal SRAM DCR's */ | 111 | dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ |
| 110 | 30 8>; /* L2 cache DCR's */ | 112 | 0x030 0x008>; /* L2 cache DCR's */ |
| 111 | cache-line-size = <20>; /* 32 bytes */ | 113 | cache-line-size = <32>; /* 32 bytes */ |
| 112 | cache-size = <40000>; /* L2, 256K */ | 114 | cache-size = <262144>; /* L2, 256K */ |
| 113 | interrupt-parent = <&UIC2>; | 115 | interrupt-parent = <&UIC2>; |
| 114 | interrupts = <17 1>; | 116 | interrupts = <0x17 0x1>; |
| 115 | }; | 117 | }; |
| 116 | 118 | ||
| 117 | plb { | 119 | plb { |
| @@ -119,41 +121,41 @@ | |||
| 119 | #address-cells = <2>; | 121 | #address-cells = <2>; |
| 120 | #size-cells = <1>; | 122 | #size-cells = <1>; |
| 121 | ranges; | 123 | ranges; |
| 122 | clock-frequency = <9896800>; // 160MHz | 124 | clock-frequency = <160000000>; // 160MHz |
| 123 | 125 | ||
| 124 | SDRAM0: memory-controller { | 126 | SDRAM0: memory-controller { |
| 125 | compatible = "ibm,sdram-440gp"; | 127 | compatible = "ibm,sdram-440gp"; |
| 126 | dcr-reg = <010 2>; | 128 | dcr-reg = <0x010 0x002>; |
| 127 | // FIXME: anything else? | 129 | // FIXME: anything else? |
| 128 | }; | 130 | }; |
| 129 | 131 | ||
| 130 | SRAM0: sram { | 132 | SRAM0: sram { |
| 131 | compatible = "ibm,sram-440gp"; | 133 | compatible = "ibm,sram-440gp"; |
| 132 | dcr-reg = <020 8 00a 1>; | 134 | dcr-reg = <0x020 0x008 0x00a 0x001>; |
| 133 | }; | 135 | }; |
| 134 | 136 | ||
| 135 | DMA0: dma { | 137 | DMA0: dma { |
| 136 | // FIXME: ??? | 138 | // FIXME: ??? |
| 137 | compatible = "ibm,dma-440gp"; | 139 | compatible = "ibm,dma-440gp"; |
| 138 | dcr-reg = <100 027>; | 140 | dcr-reg = <0x100 0x027>; |
| 139 | }; | 141 | }; |
| 140 | 142 | ||
| 141 | MAL0: mcmal { | 143 | MAL0: mcmal { |
| 142 | compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; | 144 | compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; |
| 143 | dcr-reg = <180 62>; | 145 | dcr-reg = <0x180 0x062>; |
| 144 | num-tx-chans = <4>; | 146 | num-tx-chans = <4>; |
| 145 | num-rx-chans = <4>; | 147 | num-rx-chans = <4>; |
| 146 | interrupt-parent = <&MAL0>; | 148 | interrupt-parent = <&MAL0>; |
| 147 | interrupts = <0 1 2 3 4>; | 149 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 148 | #interrupt-cells = <1>; | 150 | #interrupt-cells = <1>; |
| 149 | #address-cells = <0>; | 151 | #address-cells = <0>; |
| 150 | #size-cells = <0>; | 152 | #size-cells = <0>; |
| 151 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 153 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 152 | /*RXEOB*/ 1 &UIC0 b 4 | 154 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 153 | /*SERR*/ 2 &UIC1 0 4 | 155 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 154 | /*TXDE*/ 3 &UIC1 1 4 | 156 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 155 | /*RXDE*/ 4 &UIC1 2 4>; | 157 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 156 | interrupt-map-mask = <ffffffff>; | 158 | interrupt-map-mask = <0xffffffff>; |
| 157 | }; | 159 | }; |
| 158 | 160 | ||
| 159 | POB0: opb { | 161 | POB0: opb { |
| @@ -162,26 +164,26 @@ | |||
| 162 | #size-cells = <1>; | 164 | #size-cells = <1>; |
| 163 | /* Wish there was a nicer way of specifying a full 32-bit | 165 | /* Wish there was a nicer way of specifying a full 32-bit |
| 164 | range */ | 166 | range */ |
| 165 | ranges = <00000000 1 00000000 80000000 | 167 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
| 166 | 80000000 1 80000000 80000000>; | 168 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
| 167 | dcr-reg = <090 00b>; | 169 | dcr-reg = <0x090 0x00b>; |
| 168 | interrupt-parent = <&UIC1>; | 170 | interrupt-parent = <&UIC1>; |
| 169 | interrupts = <7 4>; | 171 | interrupts = <0x7 0x4>; |
| 170 | clock-frequency = <4C4B400>; // 80MHz | 172 | clock-frequency = <80000000>; // 80MHz |
| 171 | 173 | ||
| 172 | 174 | ||
| 173 | EBC0: ebc { | 175 | EBC0: ebc { |
| 174 | compatible = "ibm,ebc-440gx", "ibm,ebc"; | 176 | compatible = "ibm,ebc-440gx", "ibm,ebc"; |
| 175 | dcr-reg = <012 2>; | 177 | dcr-reg = <0x012 0x002>; |
| 176 | #address-cells = <2>; | 178 | #address-cells = <2>; |
| 177 | #size-cells = <1>; | 179 | #size-cells = <1>; |
| 178 | clock-frequency = <4C4B400>; // 80MHz | 180 | clock-frequency = <80000000>; // 80MHz |
| 179 | 181 | ||
| 180 | /* ranges property is supplied by zImage | 182 | /* ranges property is supplied by zImage |
| 181 | * based on firmware's configuration of the | 183 | * based on firmware's configuration of the |
| 182 | * EBC bridge */ | 184 | * EBC bridge */ |
| 183 | 185 | ||
| 184 | interrupts = <5 4>; | 186 | interrupts = <0x5 0x4>; |
| 185 | interrupt-parent = <&UIC1>; | 187 | interrupt-parent = <&UIC1>; |
| 186 | 188 | ||
| 187 | /* TODO: Add other EBC devices */ | 189 | /* TODO: Add other EBC devices */ |
| @@ -192,103 +194,103 @@ | |||
| 192 | UART0: serial@40000200 { | 194 | UART0: serial@40000200 { |
| 193 | device_type = "serial"; | 195 | device_type = "serial"; |
| 194 | compatible = "ns16550"; | 196 | compatible = "ns16550"; |
| 195 | reg = <40000200 8>; | 197 | reg = <0x40000200 0x00000008>; |
| 196 | virtual-reg = <e0000200>; | 198 | virtual-reg = <0xe0000200>; |
| 197 | clock-frequency = <A8C000>; | 199 | clock-frequency = <11059200>; |
| 198 | current-speed = <1C200>; /* 115200 */ | 200 | current-speed = <115200>; /* 115200 */ |
| 199 | interrupt-parent = <&UIC0>; | 201 | interrupt-parent = <&UIC0>; |
| 200 | interrupts = <0 4>; | 202 | interrupts = <0x0 0x4>; |
| 201 | }; | 203 | }; |
| 202 | 204 | ||
| 203 | UART1: serial@40000300 { | 205 | UART1: serial@40000300 { |
| 204 | device_type = "serial"; | 206 | device_type = "serial"; |
| 205 | compatible = "ns16550"; | 207 | compatible = "ns16550"; |
| 206 | reg = <40000300 8>; | 208 | reg = <0x40000300 0x00000008>; |
| 207 | virtual-reg = <e0000300>; | 209 | virtual-reg = <0xe0000300>; |
| 208 | clock-frequency = <A8C000>; | 210 | clock-frequency = <11059200>; |
| 209 | current-speed = <1C200>; /* 115200 */ | 211 | current-speed = <115200>; /* 115200 */ |
| 210 | interrupt-parent = <&UIC0>; | 212 | interrupt-parent = <&UIC0>; |
| 211 | interrupts = <1 4>; | 213 | interrupts = <0x1 0x4>; |
| 212 | }; | 214 | }; |
| 213 | 215 | ||
| 214 | IIC0: i2c@40000400 { | 216 | IIC0: i2c@40000400 { |
| 215 | /* FIXME */ | 217 | /* FIXME */ |
| 216 | compatible = "ibm,iic-440gp", "ibm,iic"; | 218 | compatible = "ibm,iic-440gp", "ibm,iic"; |
| 217 | reg = <40000400 14>; | 219 | reg = <0x40000400 0x00000014>; |
| 218 | interrupt-parent = <&UIC0>; | 220 | interrupt-parent = <&UIC0>; |
| 219 | interrupts = <2 4>; | 221 | interrupts = <0x2 0x4>; |
| 220 | }; | 222 | }; |
| 221 | IIC1: i2c@40000500 { | 223 | IIC1: i2c@40000500 { |
| 222 | /* FIXME */ | 224 | /* FIXME */ |
| 223 | compatible = "ibm,iic-440gp", "ibm,iic"; | 225 | compatible = "ibm,iic-440gp", "ibm,iic"; |
| 224 | reg = <40000500 14>; | 226 | reg = <0x40000500 0x00000014>; |
| 225 | interrupt-parent = <&UIC0>; | 227 | interrupt-parent = <&UIC0>; |
| 226 | interrupts = <3 4>; | 228 | interrupts = <0x3 0x4>; |
| 227 | }; | 229 | }; |
| 228 | 230 | ||
| 229 | GPIO0: gpio@40000700 { | 231 | GPIO0: gpio@40000700 { |
| 230 | /* FIXME */ | 232 | /* FIXME */ |
| 231 | compatible = "ibm,gpio-440gp"; | 233 | compatible = "ibm,gpio-440gp"; |
| 232 | reg = <40000700 20>; | 234 | reg = <0x40000700 0x00000020>; |
| 233 | }; | 235 | }; |
| 234 | 236 | ||
| 235 | ZMII0: emac-zmii@40000780 { | 237 | ZMII0: emac-zmii@40000780 { |
| 236 | compatible = "ibm,zmii-440gx", "ibm,zmii"; | 238 | compatible = "ibm,zmii-440gx", "ibm,zmii"; |
| 237 | reg = <40000780 c>; | 239 | reg = <0x40000780 0x0000000c>; |
| 238 | }; | 240 | }; |
| 239 | 241 | ||
| 240 | RGMII0: emac-rgmii@40000790 { | 242 | RGMII0: emac-rgmii@40000790 { |
| 241 | compatible = "ibm,rgmii"; | 243 | compatible = "ibm,rgmii"; |
| 242 | reg = <40000790 8>; | 244 | reg = <0x40000790 0x00000008>; |
| 243 | }; | 245 | }; |
| 244 | 246 | ||
| 245 | TAH0: emac-tah@40000b50 { | 247 | TAH0: emac-tah@40000b50 { |
| 246 | compatible = "ibm,tah-440gx", "ibm,tah"; | 248 | compatible = "ibm,tah-440gx", "ibm,tah"; |
| 247 | reg = <40000b50 30>; | 249 | reg = <0x40000b50 0x00000030>; |
| 248 | }; | 250 | }; |
| 249 | 251 | ||
| 250 | TAH1: emac-tah@40000d50 { | 252 | TAH1: emac-tah@40000d50 { |
| 251 | compatible = "ibm,tah-440gx", "ibm,tah"; | 253 | compatible = "ibm,tah-440gx", "ibm,tah"; |
| 252 | reg = <40000d50 30>; | 254 | reg = <0x40000d50 0x00000030>; |
| 253 | }; | 255 | }; |
| 254 | 256 | ||
| 255 | EMAC0: ethernet@40000800 { | 257 | EMAC0: ethernet@40000800 { |
| 256 | unused = <1>; | 258 | unused = <0x1>; |
| 257 | device_type = "network"; | 259 | device_type = "network"; |
| 258 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 260 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
| 259 | interrupt-parent = <&UIC1>; | 261 | interrupt-parent = <&UIC1>; |
| 260 | interrupts = <1c 4 1d 4>; | 262 | interrupts = <0x1c 0x4 0x1d 0x4>; |
| 261 | reg = <40000800 70>; | 263 | reg = <0x40000800 0x00000070>; |
| 262 | local-mac-address = [000000000000]; // Filled in by zImage | 264 | local-mac-address = [000000000000]; // Filled in by zImage |
| 263 | mal-device = <&MAL0>; | 265 | mal-device = <&MAL0>; |
| 264 | mal-tx-channel = <0>; | 266 | mal-tx-channel = <0>; |
| 265 | mal-rx-channel = <0>; | 267 | mal-rx-channel = <0>; |
| 266 | cell-index = <0>; | 268 | cell-index = <0>; |
| 267 | max-frame-size = <5dc>; | 269 | max-frame-size = <1500>; |
| 268 | rx-fifo-size = <1000>; | 270 | rx-fifo-size = <4096>; |
| 269 | tx-fifo-size = <800>; | 271 | tx-fifo-size = <2048>; |
| 270 | phy-mode = "rmii"; | 272 | phy-mode = "rmii"; |
| 271 | phy-map = <00000001>; | 273 | phy-map = <0x00000001>; |
| 272 | zmii-device = <&ZMII0>; | 274 | zmii-device = <&ZMII0>; |
| 273 | zmii-channel = <0>; | 275 | zmii-channel = <0>; |
| 274 | }; | 276 | }; |
| 275 | EMAC1: ethernet@40000900 { | 277 | EMAC1: ethernet@40000900 { |
| 276 | unused = <1>; | 278 | unused = <0x1>; |
| 277 | device_type = "network"; | 279 | device_type = "network"; |
| 278 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 280 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
| 279 | interrupt-parent = <&UIC1>; | 281 | interrupt-parent = <&UIC1>; |
| 280 | interrupts = <1e 4 1f 4>; | 282 | interrupts = <0x1e 0x4 0x1f 0x4>; |
| 281 | reg = <40000900 70>; | 283 | reg = <0x40000900 0x00000070>; |
| 282 | local-mac-address = [000000000000]; // Filled in by zImage | 284 | local-mac-address = [000000000000]; // Filled in by zImage |
| 283 | mal-device = <&MAL0>; | 285 | mal-device = <&MAL0>; |
| 284 | mal-tx-channel = <1>; | 286 | mal-tx-channel = <1>; |
| 285 | mal-rx-channel = <1>; | 287 | mal-rx-channel = <1>; |
| 286 | cell-index = <1>; | 288 | cell-index = <1>; |
| 287 | max-frame-size = <5dc>; | 289 | max-frame-size = <1500>; |
| 288 | rx-fifo-size = <1000>; | 290 | rx-fifo-size = <4096>; |
| 289 | tx-fifo-size = <800>; | 291 | tx-fifo-size = <2048>; |
| 290 | phy-mode = "rmii"; | 292 | phy-mode = "rmii"; |
| 291 | phy-map = <00000001>; | 293 | phy-map = <0x00000001>; |
| 292 | zmii-device = <&ZMII0>; | 294 | zmii-device = <&ZMII0>; |
| 293 | zmii-channel = <1>; | 295 | zmii-channel = <1>; |
| 294 | }; | 296 | }; |
| @@ -297,18 +299,18 @@ | |||
| 297 | device_type = "network"; | 299 | device_type = "network"; |
| 298 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 300 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
| 299 | interrupt-parent = <&UIC2>; | 301 | interrupt-parent = <&UIC2>; |
| 300 | interrupts = <0 4 1 4>; | 302 | interrupts = <0x0 0x4 0x1 0x4>; |
| 301 | reg = <40000c00 70>; | 303 | reg = <0x40000c00 0x00000070>; |
| 302 | local-mac-address = [000000000000]; // Filled in by zImage | 304 | local-mac-address = [000000000000]; // Filled in by zImage |
| 303 | mal-device = <&MAL0>; | 305 | mal-device = <&MAL0>; |
| 304 | mal-tx-channel = <2>; | 306 | mal-tx-channel = <2>; |
| 305 | mal-rx-channel = <2>; | 307 | mal-rx-channel = <2>; |
| 306 | cell-index = <2>; | 308 | cell-index = <2>; |
| 307 | max-frame-size = <2328>; | 309 | max-frame-size = <9000>; |
| 308 | rx-fifo-size = <1000>; | 310 | rx-fifo-size = <4096>; |
| 309 | tx-fifo-size = <800>; | 311 | tx-fifo-size = <2048>; |
| 310 | phy-mode = "rgmii"; | 312 | phy-mode = "rgmii"; |
| 311 | phy-map = <00000001>; | 313 | phy-map = <0x00000001>; |
| 312 | rgmii-device = <&RGMII0>; | 314 | rgmii-device = <&RGMII0>; |
| 313 | rgmii-channel = <0>; | 315 | rgmii-channel = <0>; |
| 314 | zmii-device = <&ZMII0>; | 316 | zmii-device = <&ZMII0>; |
| @@ -321,18 +323,18 @@ | |||
| 321 | device_type = "network"; | 323 | device_type = "network"; |
| 322 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 324 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
| 323 | interrupt-parent = <&UIC2>; | 325 | interrupt-parent = <&UIC2>; |
| 324 | interrupts = <2 4 3 4>; | 326 | interrupts = <0x2 0x4 0x3 0x4>; |
| 325 | reg = <40000e00 70>; | 327 | reg = <0x40000e00 0x00000070>; |
| 326 | local-mac-address = [000000000000]; // Filled in by zImage | 328 | local-mac-address = [000000000000]; // Filled in by zImage |
| 327 | mal-device = <&MAL0>; | 329 | mal-device = <&MAL0>; |
| 328 | mal-tx-channel = <3>; | 330 | mal-tx-channel = <3>; |
| 329 | mal-rx-channel = <3>; | 331 | mal-rx-channel = <3>; |
| 330 | cell-index = <3>; | 332 | cell-index = <3>; |
| 331 | max-frame-size = <2328>; | 333 | max-frame-size = <9000>; |
| 332 | rx-fifo-size = <1000>; | 334 | rx-fifo-size = <4096>; |
| 333 | tx-fifo-size = <800>; | 335 | tx-fifo-size = <2048>; |
| 334 | phy-mode = "rgmii"; | 336 | phy-mode = "rgmii"; |
| 335 | phy-map = <00000003>; | 337 | phy-map = <0x00000003>; |
| 336 | rgmii-device = <&RGMII0>; | 338 | rgmii-device = <&RGMII0>; |
| 337 | rgmii-channel = <1>; | 339 | rgmii-channel = <1>; |
| 338 | zmii-device = <&ZMII0>; | 340 | zmii-device = <&ZMII0>; |
| @@ -344,9 +346,9 @@ | |||
| 344 | 346 | ||
| 345 | GPT0: gpt@40000a00 { | 347 | GPT0: gpt@40000a00 { |
| 346 | /* FIXME */ | 348 | /* FIXME */ |
| 347 | reg = <40000a00 d4>; | 349 | reg = <0x40000a00 0x000000d4>; |
| 348 | interrupt-parent = <&UIC0>; | 350 | interrupt-parent = <&UIC0>; |
| 349 | interrupts = <12 4 13 4 14 4 15 4 16 4>; | 351 | interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; |
| 350 | }; | 352 | }; |
| 351 | 353 | ||
| 352 | }; | 354 | }; |
| @@ -360,34 +362,34 @@ | |||
| 360 | primary; | 362 | primary; |
| 361 | large-inbound-windows; | 363 | large-inbound-windows; |
| 362 | enable-msi-hole; | 364 | enable-msi-hole; |
| 363 | reg = <2 0ec00000 8 /* Config space access */ | 365 | reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ |
| 364 | 0 0 0 /* no IACK cycles */ | 366 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
| 365 | 2 0ed00000 4 /* Special cycles */ | 367 | 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ |
| 366 | 2 0ec80000 100 /* Internal registers */ | 368 | 0x00000002 0x0ec80000 0x00000100 /* Internal registers */ |
| 367 | 2 0ec80100 fc>; /* Internal messaging registers */ | 369 | 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
| 368 | 370 | ||
| 369 | /* Outbound ranges, one memory and one IO, | 371 | /* Outbound ranges, one memory and one IO, |
| 370 | * later cannot be changed | 372 | * later cannot be changed |
| 371 | */ | 373 | */ |
| 372 | ranges = <02000000 0 80000000 00000003 80000000 0 80000000 | 374 | ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 |
| 373 | 01000000 0 00000000 00000002 08000000 0 00010000>; | 375 | 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; |
| 374 | 376 | ||
| 375 | /* Inbound 2GB range starting at 0 */ | 377 | /* Inbound 2GB range starting at 0 */ |
| 376 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 378 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 377 | 379 | ||
| 378 | interrupt-map-mask = <f800 0 0 7>; | 380 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 379 | interrupt-map = < | 381 | interrupt-map = < |
| 380 | /* IDSEL 1 */ | 382 | /* IDSEL 1 */ |
| 381 | 0800 0 0 1 &UIC0 17 8 | 383 | 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8 |
| 382 | 0800 0 0 2 &UIC0 18 8 | 384 | 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8 |
| 383 | 0800 0 0 3 &UIC0 19 8 | 385 | 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8 |
| 384 | 0800 0 0 4 &UIC0 1a 8 | 386 | 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8 |
| 385 | 387 | ||
| 386 | /* IDSEL 2 */ | 388 | /* IDSEL 2 */ |
| 387 | 1000 0 0 1 &UIC0 18 8 | 389 | 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8 |
| 388 | 1000 0 0 2 &UIC0 19 8 | 390 | 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8 |
| 389 | 1000 0 0 3 &UIC0 1a 8 | 391 | 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8 |
| 390 | 1000 0 0 4 &UIC0 17 8 | 392 | 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8 |
| 391 | >; | 393 | >; |
| 392 | }; | 394 | }; |
| 393 | }; | 395 | }; |
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index 1addb3ae719e..7b653a583a2d 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | timebase-frequency = <0>; | 40 | timebase-frequency = <0>; |
| 41 | bus-frequency = <0>; | 41 | bus-frequency = <0>; |
| 42 | clock-frequency = <0>; | 42 | clock-frequency = <0>; |
| 43 | next-level-cache = <&L2>; | ||
| 43 | }; | 44 | }; |
| 44 | }; | 45 | }; |
| 45 | 46 | ||
| @@ -64,7 +65,7 @@ | |||
| 64 | interrupts = <18 2>; | 65 | interrupts = <18 2>; |
| 65 | }; | 66 | }; |
| 66 | 67 | ||
| 67 | l2-cache-controller@20000 { | 68 | L2: l2-cache-controller@20000 { |
| 68 | compatible = "fsl,8540-l2-cache-controller"; | 69 | compatible = "fsl,8540-l2-cache-controller"; |
| 69 | reg = <0x20000 0x1000>; | 70 | reg = <0x20000 0x1000>; |
| 70 | cache-line-size = <32>; | 71 | cache-line-size = <32>; |
| @@ -177,6 +178,7 @@ | |||
| 177 | #interrupt-cells = <2>; | 178 | #interrupt-cells = <2>; |
| 178 | reg = <0x40000 0x40000>; | 179 | reg = <0x40000 0x40000>; |
| 179 | device_type = "open-pic"; | 180 | device_type = "open-pic"; |
| 181 | compatible = "chrp,open-pic"; | ||
| 180 | }; | 182 | }; |
| 181 | }; | 183 | }; |
| 182 | 184 | ||
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index 9e01093f496e..8fe73ef34195 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts | |||
| @@ -39,6 +39,7 @@ | |||
| 39 | timebase-frequency = <0>; | 39 | timebase-frequency = <0>; |
| 40 | bus-frequency = <0>; | 40 | bus-frequency = <0>; |
| 41 | clock-frequency = <0>; | 41 | clock-frequency = <0>; |
| 42 | next-level-cache = <&L2>; | ||
| 42 | }; | 43 | }; |
| 43 | }; | 44 | }; |
| 44 | 45 | ||
| @@ -63,7 +64,7 @@ | |||
| 63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 67 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
| 68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 69 | cache-line-size = <32>; | 70 | cache-line-size = <32>; |
| @@ -164,6 +165,7 @@ | |||
| 164 | #interrupt-cells = <2>; | 165 | #interrupt-cells = <2>; |
| 165 | reg = <0x40000 0x40000>; | 166 | reg = <0x40000 0x40000>; |
| 166 | device_type = "open-pic"; | 167 | device_type = "open-pic"; |
| 168 | compatible = "chrp,open-pic"; | ||
| 167 | }; | 169 | }; |
| 168 | 170 | ||
| 169 | cpm@919c0 { | 171 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index a20eb06c482f..0a53bb9ce76f 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts | |||
| @@ -39,6 +39,7 @@ | |||
| 39 | timebase-frequency = <0>; | 39 | timebase-frequency = <0>; |
| 40 | bus-frequency = <0>; | 40 | bus-frequency = <0>; |
| 41 | clock-frequency = <0>; | 41 | clock-frequency = <0>; |
| 42 | next-level-cache = <&L2>; | ||
| 42 | }; | 43 | }; |
| 43 | }; | 44 | }; |
| 44 | 45 | ||
| @@ -63,7 +64,7 @@ | |||
| 63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| 66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 67 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
| 68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 69 | cache-line-size = <32>; | 70 | cache-line-size = <32>; |
| @@ -164,6 +165,7 @@ | |||
| 164 | #interrupt-cells = <2>; | 165 | #interrupt-cells = <2>; |
| 165 | reg = <0x40000 0x40000>; | 166 | reg = <0x40000 0x40000>; |
| 166 | device_type = "open-pic"; | 167 | device_type = "open-pic"; |
| 168 | compatible = "chrp,open-pic"; | ||
| 167 | }; | 169 | }; |
| 168 | 170 | ||
| 169 | cpm@919c0 { | 171 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index b9ac6c943b89..a4ee596e97bc 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | timebase-frequency = <0>; | 40 | timebase-frequency = <0>; |
| 41 | bus-frequency = <0>; | 41 | bus-frequency = <0>; |
| 42 | clock-frequency = <0>; | 42 | clock-frequency = <0>; |
| 43 | next-level-cache = <&L2>; | ||
| 43 | }; | 44 | }; |
| 44 | }; | 45 | }; |
| 45 | 46 | ||
| @@ -64,7 +65,7 @@ | |||
| 64 | interrupts = <18 2>; | 65 | interrupts = <18 2>; |
| 65 | }; | 66 | }; |
| 66 | 67 | ||
| 67 | l2-cache-controller@20000 { | 68 | L2: l2-cache-controller@20000 { |
| 68 | compatible = "fsl,8540-l2-cache-controller"; | 69 | compatible = "fsl,8540-l2-cache-controller"; |
| 69 | reg = <0x20000 0x1000>; | 70 | reg = <0x20000 0x1000>; |
| 70 | cache-line-size = <32>; | 71 | cache-line-size = <32>; |
| @@ -145,6 +146,7 @@ | |||
| 145 | #interrupt-cells = <2>; | 146 | #interrupt-cells = <2>; |
| 146 | reg = <0x40000 0x40000>; | 147 | reg = <0x40000 0x40000>; |
| 147 | device_type = "open-pic"; | 148 | device_type = "open-pic"; |
| 149 | compatible = "chrp,open-pic"; | ||
| 148 | }; | 150 | }; |
| 149 | 151 | ||
| 150 | cpm@919c0 { | 152 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts index a328607c8f84..4a9f726ada13 100644 --- a/arch/powerpc/boot/dts/walnut.dts +++ b/arch/powerpc/boot/dts/walnut.dts | |||
| @@ -9,12 +9,14 @@ | |||
| 9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | /dts-v1/; | ||
| 13 | |||
| 12 | / { | 14 | / { |
| 13 | #address-cells = <1>; | 15 | #address-cells = <1>; |
| 14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
| 15 | model = "ibm,walnut"; | 17 | model = "ibm,walnut"; |
| 16 | compatible = "ibm,walnut"; | 18 | compatible = "ibm,walnut"; |
| 17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
| 18 | 20 | ||
| 19 | aliases { | 21 | aliases { |
| 20 | ethernet0 = &EMAC; | 22 | ethernet0 = &EMAC; |
| @@ -29,13 +31,13 @@ | |||
| 29 | cpu@0 { | 31 | cpu@0 { |
| 30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
| 31 | model = "PowerPC,405GP"; | 33 | model = "PowerPC,405GP"; |
| 32 | reg = <0>; | 34 | reg = <0x00000000>; |
| 33 | clock-frequency = <bebc200>; /* Filled in by zImage */ | 35 | clock-frequency = <200000000>; /* Filled in by zImage */ |
| 34 | timebase-frequency = <0>; /* Filled in by zImage */ | 36 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
| 36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
| 37 | i-cache-size = <4000>; | 39 | i-cache-size = <16384>; |
| 38 | d-cache-size = <4000>; | 40 | d-cache-size = <16384>; |
| 39 | dcr-controller; | 41 | dcr-controller; |
| 40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
| 41 | }; | 43 | }; |
| @@ -43,14 +45,14 @@ | |||
| 43 | 45 | ||
| 44 | memory { | 46 | memory { |
| 45 | device_type = "memory"; | 47 | device_type = "memory"; |
| 46 | reg = <0 0>; /* Filled in by zImage */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by zImage */ |
| 47 | }; | 49 | }; |
| 48 | 50 | ||
| 49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
| 50 | compatible = "ibm,uic"; | 52 | compatible = "ibm,uic"; |
| 51 | interrupt-controller; | 53 | interrupt-controller; |
| 52 | cell-index = <0>; | 54 | cell-index = <0>; |
| 53 | dcr-reg = <0c0 9>; | 55 | dcr-reg = <0x0c0 0x009>; |
| 54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
| 55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
| 56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
| @@ -65,63 +67,63 @@ | |||
| 65 | 67 | ||
| 66 | SDRAM0: memory-controller { | 68 | SDRAM0: memory-controller { |
| 67 | compatible = "ibm,sdram-405gp"; | 69 | compatible = "ibm,sdram-405gp"; |
| 68 | dcr-reg = <010 2>; | 70 | dcr-reg = <0x010 0x002>; |
| 69 | }; | 71 | }; |
| 70 | 72 | ||
| 71 | MAL: mcmal { | 73 | MAL: mcmal { |
| 72 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; | 74 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; |
| 73 | dcr-reg = <180 62>; | 75 | dcr-reg = <0x180 0x062>; |
| 74 | num-tx-chans = <1>; | 76 | num-tx-chans = <1>; |
| 75 | num-rx-chans = <1>; | 77 | num-rx-chans = <1>; |
| 76 | interrupt-parent = <&UIC0>; | 78 | interrupt-parent = <&UIC0>; |
| 77 | interrupts = < | 79 | interrupts = < |
| 78 | b 4 /* TXEOB */ | 80 | 0xb 0x4 /* TXEOB */ |
| 79 | c 4 /* RXEOB */ | 81 | 0xc 0x4 /* RXEOB */ |
| 80 | a 4 /* SERR */ | 82 | 0xa 0x4 /* SERR */ |
| 81 | d 4 /* TXDE */ | 83 | 0xd 0x4 /* TXDE */ |
| 82 | e 4 /* RXDE */>; | 84 | 0xe 0x4 /* RXDE */>; |
| 83 | }; | 85 | }; |
| 84 | 86 | ||
| 85 | POB0: opb { | 87 | POB0: opb { |
| 86 | compatible = "ibm,opb-405gp", "ibm,opb"; | 88 | compatible = "ibm,opb-405gp", "ibm,opb"; |
| 87 | #address-cells = <1>; | 89 | #address-cells = <1>; |
| 88 | #size-cells = <1>; | 90 | #size-cells = <1>; |
| 89 | ranges = <ef600000 ef600000 a00000>; | 91 | ranges = <0xef600000 0xef600000 0x00a00000>; |
| 90 | dcr-reg = <0a0 5>; | 92 | dcr-reg = <0x0a0 0x005>; |
| 91 | clock-frequency = <0>; /* Filled in by zImage */ | 93 | clock-frequency = <0>; /* Filled in by zImage */ |
| 92 | 94 | ||
| 93 | UART0: serial@ef600300 { | 95 | UART0: serial@ef600300 { |
| 94 | device_type = "serial"; | 96 | device_type = "serial"; |
| 95 | compatible = "ns16550"; | 97 | compatible = "ns16550"; |
| 96 | reg = <ef600300 8>; | 98 | reg = <0xef600300 0x00000008>; |
| 97 | virtual-reg = <ef600300>; | 99 | virtual-reg = <0xef600300>; |
| 98 | clock-frequency = <0>; /* Filled in by zImage */ | 100 | clock-frequency = <0>; /* Filled in by zImage */ |
| 99 | current-speed = <2580>; | 101 | current-speed = <9600>; |
| 100 | interrupt-parent = <&UIC0>; | 102 | interrupt-parent = <&UIC0>; |
| 101 | interrupts = <0 4>; | 103 | interrupts = <0x0 0x4>; |
| 102 | }; | 104 | }; |
| 103 | 105 | ||
| 104 | UART1: serial@ef600400 { | 106 | UART1: serial@ef600400 { |
| 105 | device_type = "serial"; | 107 | device_type = "serial"; |
| 106 | compatible = "ns16550"; | 108 | compatible = "ns16550"; |
| 107 | reg = <ef600400 8>; | 109 | reg = <0xef600400 0x00000008>; |
| 108 | virtual-reg = <ef600400>; | 110 | virtual-reg = <0xef600400>; |
| 109 | clock-frequency = <0>; /* Filled in by zImage */ | 111 | clock-frequency = <0>; /* Filled in by zImage */ |
| 110 | current-speed = <2580>; | 112 | current-speed = <9600>; |
| 111 | interrupt-parent = <&UIC0>; | 113 | interrupt-parent = <&UIC0>; |
| 112 | interrupts = <1 4>; | 114 | interrupts = <0x1 0x4>; |
| 113 | }; | 115 | }; |
| 114 | 116 | ||
| 115 | IIC: i2c@ef600500 { | 117 | IIC: i2c@ef600500 { |
| 116 | compatible = "ibm,iic-405gp", "ibm,iic"; | 118 | compatible = "ibm,iic-405gp", "ibm,iic"; |
| 117 | reg = <ef600500 11>; | 119 | reg = <0xef600500 0x00000011>; |
| 118 | interrupt-parent = <&UIC0>; | 120 | interrupt-parent = <&UIC0>; |
| 119 | interrupts = <2 4>; | 121 | interrupts = <0x2 0x4>; |
| 120 | }; | 122 | }; |
| 121 | 123 | ||
| 122 | GPIO: gpio@ef600700 { | 124 | GPIO: gpio@ef600700 { |
| 123 | compatible = "ibm,gpio-405gp"; | 125 | compatible = "ibm,gpio-405gp"; |
| 124 | reg = <ef600700 20>; | 126 | reg = <0xef600700 0x00000020>; |
| 125 | }; | 127 | }; |
| 126 | 128 | ||
| 127 | EMAC: ethernet@ef600800 { | 129 | EMAC: ethernet@ef600800 { |
| @@ -129,26 +131,26 @@ | |||
| 129 | compatible = "ibm,emac-405gp", "ibm,emac"; | 131 | compatible = "ibm,emac-405gp", "ibm,emac"; |
| 130 | interrupt-parent = <&UIC0>; | 132 | interrupt-parent = <&UIC0>; |
| 131 | interrupts = < | 133 | interrupts = < |
| 132 | f 4 /* Ethernet */ | 134 | 0xf 0x4 /* Ethernet */ |
| 133 | 9 4 /* Ethernet Wake Up */>; | 135 | 0x9 0x4 /* Ethernet Wake Up */>; |
| 134 | local-mac-address = [000000000000]; /* Filled in by zImage */ | 136 | local-mac-address = [000000000000]; /* Filled in by zImage */ |
| 135 | reg = <ef600800 70>; | 137 | reg = <0xef600800 0x00000070>; |
| 136 | mal-device = <&MAL>; | 138 | mal-device = <&MAL>; |
| 137 | mal-tx-channel = <0>; | 139 | mal-tx-channel = <0>; |
| 138 | mal-rx-channel = <0>; | 140 | mal-rx-channel = <0>; |
| 139 | cell-index = <0>; | 141 | cell-index = <0>; |
| 140 | max-frame-size = <5dc>; | 142 | max-frame-size = <1500>; |
| 141 | rx-fifo-size = <1000>; | 143 | rx-fifo-size = <4096>; |
| 142 | tx-fifo-size = <800>; | 144 | tx-fifo-size = <2048>; |
| 143 | phy-mode = "rmii"; | 145 | phy-mode = "rmii"; |
| 144 | phy-map = <00000001>; | 146 | phy-map = <0x00000001>; |
| 145 | }; | 147 | }; |
| 146 | 148 | ||
| 147 | }; | 149 | }; |
| 148 | 150 | ||
| 149 | EBC0: ebc { | 151 | EBC0: ebc { |
| 150 | compatible = "ibm,ebc-405gp", "ibm,ebc"; | 152 | compatible = "ibm,ebc-405gp", "ibm,ebc"; |
| 151 | dcr-reg = <012 2>; | 153 | dcr-reg = <0x012 0x002>; |
| 152 | #address-cells = <2>; | 154 | #address-cells = <2>; |
| 153 | #size-cells = <1>; | 155 | #size-cells = <1>; |
| 154 | /* The ranges property is supplied by the bootwrapper | 156 | /* The ranges property is supplied by the bootwrapper |
| @@ -158,18 +160,18 @@ | |||
| 158 | clock-frequency = <0>; /* Filled in by zImage */ | 160 | clock-frequency = <0>; /* Filled in by zImage */ |
| 159 | 161 | ||
| 160 | sram@0,0 { | 162 | sram@0,0 { |
| 161 | reg = <0 0 80000>; | 163 | reg = <0x00000000 0x00000000 0x00080000>; |
| 162 | }; | 164 | }; |
| 163 | 165 | ||
| 164 | flash@0,80000 { | 166 | flash@0,80000 { |
| 165 | compatible = "jedec-flash"; | 167 | compatible = "jedec-flash"; |
| 166 | bank-width = <1>; | 168 | bank-width = <1>; |
| 167 | reg = <0 80000 80000>; | 169 | reg = <0x00000000 0x00080000 0x00080000>; |
| 168 | #address-cells = <1>; | 170 | #address-cells = <1>; |
| 169 | #size-cells = <1>; | 171 | #size-cells = <1>; |
| 170 | partition@0 { | 172 | partition@0 { |
| 171 | label = "OpenBIOS"; | 173 | label = "OpenBIOS"; |
| 172 | reg = <0 80000>; | 174 | reg = <0x00000000 0x00080000>; |
| 173 | read-only; | 175 | read-only; |
| 174 | }; | 176 | }; |
| 175 | }; | 177 | }; |
| @@ -177,24 +179,24 @@ | |||
| 177 | nvram@1,0 { | 179 | nvram@1,0 { |
| 178 | /* NVRAM and RTC */ | 180 | /* NVRAM and RTC */ |
| 179 | compatible = "ds1743-nvram"; | 181 | compatible = "ds1743-nvram"; |
| 180 | #bytes = <2000>; | 182 | #bytes = <0x2000>; |
| 181 | reg = <1 0 2000>; | 183 | reg = <0x00000001 0x00000000 0x00002000>; |
| 182 | }; | 184 | }; |
| 183 | 185 | ||
| 184 | keyboard@2,0 { | 186 | keyboard@2,0 { |
| 185 | compatible = "intel,82C42PC"; | 187 | compatible = "intel,82C42PC"; |
| 186 | reg = <2 0 2>; | 188 | reg = <0x00000002 0x00000000 0x00000002>; |
| 187 | }; | 189 | }; |
| 188 | 190 | ||
| 189 | ir@3,0 { | 191 | ir@3,0 { |
| 190 | compatible = "ti,TIR2000PAG"; | 192 | compatible = "ti,TIR2000PAG"; |
| 191 | reg = <3 0 10>; | 193 | reg = <0x00000003 0x00000000 0x00000010>; |
| 192 | }; | 194 | }; |
| 193 | 195 | ||
| 194 | fpga@7,0 { | 196 | fpga@7,0 { |
| 195 | compatible = "Walnut-FPGA"; | 197 | compatible = "Walnut-FPGA"; |
| 196 | reg = <7 0 10>; | 198 | reg = <0x00000007 0x00000000 0x00000010>; |
| 197 | virtual-reg = <f0300005>; | 199 | virtual-reg = <0xf0300005>; |
| 198 | }; | 200 | }; |
| 199 | }; | 201 | }; |
| 200 | 202 | ||
| @@ -205,35 +207,35 @@ | |||
| 205 | #address-cells = <3>; | 207 | #address-cells = <3>; |
| 206 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; | 208 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; |
| 207 | primary; | 209 | primary; |
| 208 | reg = <eec00000 8 /* Config space access */ | 210 | reg = <0xeec00000 0x00000008 /* Config space access */ |
| 209 | eed80000 4 /* IACK */ | 211 | 0xeed80000 0x00000004 /* IACK */ |
| 210 | eed80000 4 /* Special cycle */ | 212 | 0xeed80000 0x00000004 /* Special cycle */ |
| 211 | ef480000 40>; /* Internal registers */ | 213 | 0xef480000 0x00000040>; /* Internal registers */ |
| 212 | 214 | ||
| 213 | /* Outbound ranges, one memory and one IO, | 215 | /* Outbound ranges, one memory and one IO, |
| 214 | * later cannot be changed. Chip supports a second | 216 | * later cannot be changed. Chip supports a second |
| 215 | * IO range but we don't use it for now | 217 | * IO range but we don't use it for now |
| 216 | */ | 218 | */ |
| 217 | ranges = <02000000 0 80000000 80000000 0 20000000 | 219 | ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 |
| 218 | 01000000 0 00000000 e8000000 0 00010000>; | 220 | 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
| 219 | 221 | ||
| 220 | /* Inbound 2GB range starting at 0 */ | 222 | /* Inbound 2GB range starting at 0 */ |
| 221 | dma-ranges = <42000000 0 0 0 0 80000000>; | 223 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
| 222 | 224 | ||
| 223 | /* Walnut has all 4 IRQ pins tied together per slot */ | 225 | /* Walnut has all 4 IRQ pins tied together per slot */ |
| 224 | interrupt-map-mask = <f800 0 0 0>; | 226 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
| 225 | interrupt-map = < | 227 | interrupt-map = < |
| 226 | /* IDSEL 1 */ | 228 | /* IDSEL 1 */ |
| 227 | 0800 0 0 0 &UIC0 1c 8 | 229 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
| 228 | 230 | ||
| 229 | /* IDSEL 2 */ | 231 | /* IDSEL 2 */ |
| 230 | 1000 0 0 0 &UIC0 1d 8 | 232 | 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8 |
| 231 | 233 | ||
| 232 | /* IDSEL 3 */ | 234 | /* IDSEL 3 */ |
| 233 | 1800 0 0 0 &UIC0 1e 8 | 235 | 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8 |
| 234 | 236 | ||
| 235 | /* IDSEL 4 */ | 237 | /* IDSEL 4 */ |
| 236 | 2000 0 0 0 &UIC0 1f 8 | 238 | 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8 |
| 237 | >; | 239 | >; |
| 238 | }; | 240 | }; |
| 239 | }; | 241 | }; |
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts index b04a52e22bf5..340018cf16b7 100644 --- a/arch/powerpc/boot/dts/warp.dts +++ b/arch/powerpc/boot/dts/warp.dts | |||
| @@ -9,12 +9,14 @@ | |||
| 9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | /dts-v1/; | ||
| 13 | |||
| 12 | / { | 14 | / { |
| 13 | #address-cells = <2>; | 15 | #address-cells = <2>; |
| 14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
| 15 | model = "pika,warp"; | 17 | model = "pika,warp"; |
| 16 | compatible = "pika,warp"; | 18 | compatible = "pika,warp"; |
| 17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
| 18 | 20 | ||
| 19 | aliases { | 21 | aliases { |
| 20 | ethernet0 = &EMAC0; | 22 | ethernet0 = &EMAC0; |
| @@ -28,13 +30,13 @@ | |||
| 28 | cpu@0 { | 30 | cpu@0 { |
| 29 | device_type = "cpu"; | 31 | device_type = "cpu"; |
| 30 | model = "PowerPC,440EP"; | 32 | model = "PowerPC,440EP"; |
| 31 | reg = <0>; | 33 | reg = <0x00000000>; |
| 32 | clock-frequency = <0>; /* Filled in by zImage */ | 34 | clock-frequency = <0>; /* Filled in by zImage */ |
| 33 | timebase-frequency = <0>; /* Filled in by zImage */ | 35 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 34 | i-cache-line-size = <20>; | 36 | i-cache-line-size = <32>; |
| 35 | d-cache-line-size = <20>; | 37 | d-cache-line-size = <32>; |
| 36 | i-cache-size = <8000>; | 38 | i-cache-size = <32768>; |
| 37 | d-cache-size = <8000>; | 39 | d-cache-size = <32768>; |
| 38 | dcr-controller; | 40 | dcr-controller; |
| 39 | dcr-access-method = "native"; | 41 | dcr-access-method = "native"; |
| 40 | }; | 42 | }; |
| @@ -42,14 +44,14 @@ | |||
| 42 | 44 | ||
| 43 | memory { | 45 | memory { |
| 44 | device_type = "memory"; | 46 | device_type = "memory"; |
| 45 | reg = <0 0 0>; /* Filled in by zImage */ | 47 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
| 46 | }; | 48 | }; |
| 47 | 49 | ||
| 48 | UIC0: interrupt-controller0 { | 50 | UIC0: interrupt-controller0 { |
| 49 | compatible = "ibm,uic-440ep","ibm,uic"; | 51 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 50 | interrupt-controller; | 52 | interrupt-controller; |
| 51 | cell-index = <0>; | 53 | cell-index = <0>; |
| 52 | dcr-reg = <0c0 009>; | 54 | dcr-reg = <0x0c0 0x009>; |
| 53 | #address-cells = <0>; | 55 | #address-cells = <0>; |
| 54 | #size-cells = <0>; | 56 | #size-cells = <0>; |
| 55 | #interrupt-cells = <2>; | 57 | #interrupt-cells = <2>; |
| @@ -59,22 +61,22 @@ | |||
| 59 | compatible = "ibm,uic-440ep","ibm,uic"; | 61 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 60 | interrupt-controller; | 62 | interrupt-controller; |
| 61 | cell-index = <1>; | 63 | cell-index = <1>; |
| 62 | dcr-reg = <0d0 009>; | 64 | dcr-reg = <0x0d0 0x009>; |
| 63 | #address-cells = <0>; | 65 | #address-cells = <0>; |
| 64 | #size-cells = <0>; | 66 | #size-cells = <0>; |
| 65 | #interrupt-cells = <2>; | 67 | #interrupt-cells = <2>; |
| 66 | interrupts = <1e 4 1f 4>; /* cascade */ | 68 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 67 | interrupt-parent = <&UIC0>; | 69 | interrupt-parent = <&UIC0>; |
| 68 | }; | 70 | }; |
| 69 | 71 | ||
| 70 | SDR0: sdr { | 72 | SDR0: sdr { |
| 71 | compatible = "ibm,sdr-440ep"; | 73 | compatible = "ibm,sdr-440ep"; |
| 72 | dcr-reg = <00e 002>; | 74 | dcr-reg = <0x00e 0x002>; |
| 73 | }; | 75 | }; |
| 74 | 76 | ||
| 75 | CPR0: cpr { | 77 | CPR0: cpr { |
| 76 | compatible = "ibm,cpr-440ep"; | 78 | compatible = "ibm,cpr-440ep"; |
| 77 | dcr-reg = <00c 002>; | 79 | dcr-reg = <0x00c 0x002>; |
| 78 | }; | 80 | }; |
| 79 | 81 | ||
| 80 | plb { | 82 | plb { |
| @@ -86,86 +88,79 @@ | |||
| 86 | 88 | ||
| 87 | SDRAM0: sdram { | 89 | SDRAM0: sdram { |
| 88 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 90 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
| 89 | dcr-reg = <010 2>; | 91 | dcr-reg = <0x010 0x002>; |
| 90 | }; | 92 | }; |
| 91 | 93 | ||
| 92 | DMA0: dma { | 94 | DMA0: dma { |
| 93 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 95 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
| 94 | dcr-reg = <100 027>; | 96 | dcr-reg = <0x100 0x027>; |
| 95 | }; | 97 | }; |
| 96 | 98 | ||
| 97 | MAL0: mcmal { | 99 | MAL0: mcmal { |
| 98 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 100 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
| 99 | dcr-reg = <180 62>; | 101 | dcr-reg = <0x180 0x062>; |
| 100 | num-tx-chans = <4>; | 102 | num-tx-chans = <4>; |
| 101 | num-rx-chans = <2>; | 103 | num-rx-chans = <2>; |
| 102 | interrupt-parent = <&MAL0>; | 104 | interrupt-parent = <&MAL0>; |
| 103 | interrupts = <0 1 2 3 4>; | 105 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 104 | #interrupt-cells = <1>; | 106 | #interrupt-cells = <1>; |
| 105 | #address-cells = <0>; | 107 | #address-cells = <0>; |
| 106 | #size-cells = <0>; | 108 | #size-cells = <0>; |
| 107 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 109 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 108 | /*RXEOB*/ 1 &UIC0 b 4 | 110 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 109 | /*SERR*/ 2 &UIC1 0 4 | 111 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 110 | /*TXDE*/ 3 &UIC1 1 4 | 112 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 111 | /*RXDE*/ 4 &UIC1 2 4>; | 113 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 112 | }; | 114 | }; |
| 113 | 115 | ||
| 114 | POB0: opb { | 116 | POB0: opb { |
| 115 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; | 117 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; |
| 116 | #address-cells = <1>; | 118 | #address-cells = <1>; |
| 117 | #size-cells = <1>; | 119 | #size-cells = <1>; |
| 118 | ranges = <00000000 0 00000000 80000000 | 120 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
| 119 | 80000000 0 80000000 80000000>; | 121 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
| 120 | interrupt-parent = <&UIC1>; | 122 | interrupt-parent = <&UIC1>; |
| 121 | interrupts = <7 4>; | 123 | interrupts = <0x7 0x4>; |
| 122 | clock-frequency = <0>; /* Filled in by zImage */ | 124 | clock-frequency = <0>; /* Filled in by zImage */ |
| 123 | 125 | ||
| 124 | EBC0: ebc { | 126 | EBC0: ebc { |
| 125 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 127 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
| 126 | dcr-reg = <012 2>; | 128 | dcr-reg = <0x012 0x002>; |
| 127 | #address-cells = <2>; | 129 | #address-cells = <2>; |
| 128 | #size-cells = <1>; | 130 | #size-cells = <1>; |
| 129 | clock-frequency = <0>; /* Filled in by zImage */ | 131 | clock-frequency = <0>; /* Filled in by zImage */ |
| 130 | interrupts = <5 1>; | 132 | interrupts = <0x5 0x1>; |
| 131 | interrupt-parent = <&UIC1>; | 133 | interrupt-parent = <&UIC1>; |
| 132 | 134 | ||
| 133 | fpga@2,0 { | 135 | fpga@2,0 { |
| 134 | compatible = "pika,fpga"; | 136 | compatible = "pika,fpga"; |
| 135 | reg = <2 0 2200>; | 137 | reg = <0x00000002 0x00000000 0x00001000>; |
| 136 | interrupts = <18 8>; | 138 | interrupts = <0x18 0x8>; |
| 137 | interrupt-parent = <&UIC0>; | 139 | interrupt-parent = <&UIC0>; |
| 138 | }; | 140 | }; |
| 139 | 141 | ||
| 142 | fpga@2,4000 { | ||
| 143 | compatible = "pika,fpga-sd"; | ||
| 144 | reg = <0x00000002 0x00004000 0x00000A00>; | ||
| 145 | }; | ||
| 146 | |||
| 140 | nor_flash@0,0 { | 147 | nor_flash@0,0 { |
| 141 | compatible = "amd,s29gl512n", "cfi-flash"; | 148 | compatible = "amd,s29gl032a", "cfi-flash"; |
| 142 | bank-width = <2>; | 149 | bank-width = <2>; |
| 143 | reg = <0 0 4000000>; | 150 | reg = <0x00000000 0x00000000 0x00400000>; |
| 144 | #address-cells = <1>; | 151 | #address-cells = <1>; |
| 145 | #size-cells = <1>; | 152 | #size-cells = <1>; |
| 146 | partition@0 { | 153 | partition@300000 { |
| 147 | label = "kernel"; | ||
| 148 | reg = <0 180000>; | ||
| 149 | }; | ||
| 150 | partition@180000 { | ||
| 151 | label = "root"; | ||
| 152 | reg = <180000 3480000>; | ||
| 153 | }; | ||
| 154 | partition@3600000 { | ||
| 155 | label = "user"; | ||
| 156 | reg = <3600000 900000>; | ||
| 157 | }; | ||
| 158 | partition@3f00000 { | ||
| 159 | label = "fpga"; | 154 | label = "fpga"; |
| 160 | reg = <3f00000 40000>; | 155 | reg = <0x0030000 0x00040000>; |
| 161 | }; | 156 | }; |
| 162 | partition@3f40000 { | 157 | partition@340000 { |
| 163 | label = "env"; | 158 | label = "env"; |
| 164 | reg = <3f40000 40000>; | 159 | reg = <0x0340000 0x00040000>; |
| 165 | }; | 160 | }; |
| 166 | partition@3f80000 { | 161 | partition@380000 { |
| 167 | label = "u-boot"; | 162 | label = "u-boot"; |
| 168 | reg = <3f80000 80000>; | 163 | reg = <0x0380000 0x00080000>; |
| 169 | }; | 164 | }; |
| 170 | }; | 165 | }; |
| 171 | }; | 166 | }; |
| @@ -173,60 +168,80 @@ | |||
| 173 | UART0: serial@ef600300 { | 168 | UART0: serial@ef600300 { |
| 174 | device_type = "serial"; | 169 | device_type = "serial"; |
| 175 | compatible = "ns16550"; | 170 | compatible = "ns16550"; |
| 176 | reg = <ef600300 8>; | 171 | reg = <0xef600300 0x00000008>; |
| 177 | virtual-reg = <ef600300>; | 172 | virtual-reg = <0xef600300>; |
| 178 | clock-frequency = <0>; /* Filled in by zImage */ | 173 | clock-frequency = <0>; /* Filled in by zImage */ |
| 179 | current-speed = <1c200>; | 174 | current-speed = <115200>; |
| 180 | interrupt-parent = <&UIC0>; | 175 | interrupt-parent = <&UIC0>; |
| 181 | interrupts = <0 4>; | 176 | interrupts = <0x0 0x4>; |
| 182 | }; | 177 | }; |
| 183 | 178 | ||
| 184 | IIC0: i2c@ef600700 { | 179 | IIC0: i2c@ef600700 { |
| 185 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 180 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 186 | reg = <ef600700 14>; | 181 | reg = <0xef600700 0x00000014>; |
| 187 | interrupt-parent = <&UIC0>; | 182 | interrupt-parent = <&UIC0>; |
| 188 | interrupts = <2 4>; | 183 | interrupts = <0x2 0x4>; |
| 184 | index = <0x0>; | ||
| 185 | #address-cells = <1>; | ||
| 186 | #size-cells = <0>; | ||
| 187 | |||
| 188 | ad7414@4a { | ||
| 189 | compatible = "adi,ad7414"; | ||
| 190 | reg = <0x4a>; | ||
| 191 | interrupts = <0x19 0x8>; | ||
| 192 | interrupt-parent = <&UIC0>; | ||
| 193 | }; | ||
| 189 | }; | 194 | }; |
| 190 | 195 | ||
| 191 | GPIO0: gpio@ef600b00 { | 196 | GPIO0: gpio@ef600b00 { |
| 192 | compatible = "ibm,gpio-440ep"; | 197 | compatible = "ibm,gpio-440ep"; |
| 193 | reg = <ef600b00 48>; | 198 | reg = <0xef600b00 0x00000048>; |
| 199 | #gpio-cells = <2>; | ||
| 200 | gpio-controller; | ||
| 194 | }; | 201 | }; |
| 195 | 202 | ||
| 196 | GPIO1: gpio@ef600c00 { | 203 | GPIO1: gpio@ef600c00 { |
| 197 | compatible = "ibm,gpio-440ep"; | 204 | compatible = "ibm,gpio-440ep"; |
| 198 | reg = <ef600c00 48>; | 205 | reg = <0xef600c00 0x00000048>; |
| 206 | #gpio-cells = <2>; | ||
| 207 | gpio-controller; | ||
| 208 | |||
| 209 | led@31 { | ||
| 210 | compatible = "linux,gpio-led"; | ||
| 211 | linux,name = ":green:"; | ||
| 212 | gpios = <&GPIO1 0x30 0>; | ||
| 213 | }; | ||
| 199 | }; | 214 | }; |
| 200 | 215 | ||
| 201 | ZMII0: emac-zmii@ef600d00 { | 216 | ZMII0: emac-zmii@ef600d00 { |
| 202 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 217 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
| 203 | reg = <ef600d00 c>; | 218 | reg = <0xef600d00 0x0000000c>; |
| 204 | }; | 219 | }; |
| 205 | 220 | ||
| 206 | EMAC0: ethernet@ef600e00 { | 221 | EMAC0: ethernet@ef600e00 { |
| 207 | device_type = "network"; | 222 | device_type = "network"; |
| 208 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 223 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 209 | interrupt-parent = <&UIC1>; | 224 | interrupt-parent = <&UIC1>; |
| 210 | interrupts = <1c 4 1d 4>; | 225 | interrupts = <0x1c 0x4 0x1d 0x4>; |
| 211 | reg = <ef600e00 70>; | 226 | reg = <0xef600e00 0x00000070>; |
| 212 | local-mac-address = [000000000000]; | 227 | local-mac-address = [000000000000]; |
| 213 | mal-device = <&MAL0>; | 228 | mal-device = <&MAL0>; |
| 214 | mal-tx-channel = <0 1>; | 229 | mal-tx-channel = <0 1>; |
| 215 | mal-rx-channel = <0>; | 230 | mal-rx-channel = <0>; |
| 216 | cell-index = <0>; | 231 | cell-index = <0>; |
| 217 | max-frame-size = <5dc>; | 232 | max-frame-size = <1500>; |
| 218 | rx-fifo-size = <1000>; | 233 | rx-fifo-size = <4096>; |
| 219 | tx-fifo-size = <800>; | 234 | tx-fifo-size = <2048>; |
| 220 | phy-mode = "rmii"; | 235 | phy-mode = "rmii"; |
| 221 | phy-map = <00000000>; | 236 | phy-map = <0x00000000>; |
| 222 | zmii-device = <&ZMII0>; | 237 | zmii-device = <&ZMII0>; |
| 223 | zmii-channel = <0>; | 238 | zmii-channel = <0>; |
| 224 | }; | 239 | }; |
| 225 | 240 | ||
| 226 | usb@ef601000 { | 241 | usb@ef601000 { |
| 227 | compatible = "ohci-be"; | 242 | compatible = "ohci-be"; |
| 228 | reg = <ef601000 80>; | 243 | reg = <0xef601000 0x00000080>; |
| 229 | interrupts = <8 1 9 1>; | 244 | interrupts = <0x8 0x1 0x9 0x1>; |
| 230 | interrupt-parent = < &UIC1 >; | 245 | interrupt-parent = < &UIC1 >; |
| 231 | }; | 246 | }; |
| 232 | }; | 247 | }; |
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts index 0d6d332814e0..e39422aa0d85 100644 --- a/arch/powerpc/boot/dts/yosemite.dts +++ b/arch/powerpc/boot/dts/yosemite.dts | |||
| @@ -9,12 +9,14 @@ | |||
| 9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | /dts-v1/; | ||
| 13 | |||
| 12 | / { | 14 | / { |
| 13 | #address-cells = <2>; | 15 | #address-cells = <2>; |
| 14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
| 15 | model = "amcc,yosemite"; | 17 | model = "amcc,yosemite"; |
| 16 | compatible = "amcc,yosemite","amcc,bamboo"; | 18 | compatible = "amcc,yosemite","amcc,bamboo"; |
| 17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
| 18 | 20 | ||
| 19 | aliases { | 21 | aliases { |
| 20 | ethernet0 = &EMAC0; | 22 | ethernet0 = &EMAC0; |
| @@ -32,13 +34,13 @@ | |||
| 32 | cpu@0 { | 34 | cpu@0 { |
| 33 | device_type = "cpu"; | 35 | device_type = "cpu"; |
| 34 | model = "PowerPC,440EP"; | 36 | model = "PowerPC,440EP"; |
| 35 | reg = <0>; | 37 | reg = <0x00000000>; |
| 36 | clock-frequency = <0>; /* Filled in by zImage */ | 38 | clock-frequency = <0>; /* Filled in by zImage */ |
| 37 | timebase-frequency = <0>; /* Filled in by zImage */ | 39 | timebase-frequency = <0>; /* Filled in by zImage */ |
| 38 | i-cache-line-size = <20>; | 40 | i-cache-line-size = <32>; |
| 39 | d-cache-line-size = <20>; | 41 | d-cache-line-size = <32>; |
| 40 | i-cache-size = <8000>; | 42 | i-cache-size = <32768>; |
| 41 | d-cache-size = <8000>; | 43 | d-cache-size = <32768>; |
| 42 | dcr-controller; | 44 | dcr-controller; |
| 43 | dcr-access-method = "native"; | 45 | dcr-access-method = "native"; |
| 44 | }; | 46 | }; |
| @@ -46,14 +48,14 @@ | |||
| 46 | 48 | ||
| 47 | memory { | 49 | memory { |
| 48 | device_type = "memory"; | 50 | device_type = "memory"; |
| 49 | reg = <0 0 0>; /* Filled in by zImage */ | 51 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
| 50 | }; | 52 | }; |
| 51 | 53 | ||
| 52 | UIC0: interrupt-controller0 { | 54 | UIC0: interrupt-controller0 { |
| 53 | compatible = "ibm,uic-440ep","ibm,uic"; | 55 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 54 | interrupt-controller; | 56 | interrupt-controller; |
| 55 | cell-index = <0>; | 57 | cell-index = <0>; |
| 56 | dcr-reg = <0c0 009>; | 58 | dcr-reg = <0x0c0 0x009>; |
| 57 | #address-cells = <0>; | 59 | #address-cells = <0>; |
| 58 | #size-cells = <0>; | 60 | #size-cells = <0>; |
| 59 | #interrupt-cells = <2>; | 61 | #interrupt-cells = <2>; |
| @@ -63,22 +65,22 @@ | |||
| 63 | compatible = "ibm,uic-440ep","ibm,uic"; | 65 | compatible = "ibm,uic-440ep","ibm,uic"; |
| 64 | interrupt-controller; | 66 | interrupt-controller; |
| 65 | cell-index = <1>; | 67 | cell-index = <1>; |
| 66 | dcr-reg = <0d0 009>; | 68 | dcr-reg = <0x0d0 0x009>; |
| 67 | #address-cells = <0>; | 69 | #address-cells = <0>; |
| 68 | #size-cells = <0>; | 70 | #size-cells = <0>; |
| 69 | #interrupt-cells = <2>; | 71 | #interrupt-cells = <2>; |
| 70 | interrupts = <1e 4 1f 4>; /* cascade */ | 72 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
| 71 | interrupt-parent = <&UIC0>; | 73 | interrupt-parent = <&UIC0>; |
| 72 | }; | 74 | }; |
| 73 | 75 | ||
| 74 | SDR0: sdr { | 76 | SDR0: sdr { |
| 75 | compatible = "ibm,sdr-440ep"; | 77 | compatible = "ibm,sdr-440ep"; |
| 76 | dcr-reg = <00e 002>; | 78 | dcr-reg = <0x00e 0x002>; |
| 77 | }; | 79 | }; |
| 78 | 80 | ||
| 79 | CPR0: cpr { | 81 | CPR0: cpr { |
| 80 | compatible = "ibm,cpr-440ep"; | 82 | compatible = "ibm,cpr-440ep"; |
| 81 | dcr-reg = <00c 002>; | 83 | dcr-reg = <0x00c 0x002>; |
| 82 | }; | 84 | }; |
| 83 | 85 | ||
| 84 | plb { | 86 | plb { |
| @@ -90,29 +92,29 @@ | |||
| 90 | 92 | ||
| 91 | SDRAM0: sdram { | 93 | SDRAM0: sdram { |
| 92 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 94 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
| 93 | dcr-reg = <010 2>; | 95 | dcr-reg = <0x010 0x002>; |
| 94 | }; | 96 | }; |
| 95 | 97 | ||
| 96 | DMA0: dma { | 98 | DMA0: dma { |
| 97 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 99 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
| 98 | dcr-reg = <100 027>; | 100 | dcr-reg = <0x100 0x027>; |
| 99 | }; | 101 | }; |
| 100 | 102 | ||
| 101 | MAL0: mcmal { | 103 | MAL0: mcmal { |
| 102 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 104 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
| 103 | dcr-reg = <180 62>; | 105 | dcr-reg = <0x180 0x062>; |
| 104 | num-tx-chans = <4>; | 106 | num-tx-chans = <4>; |
| 105 | num-rx-chans = <2>; | 107 | num-rx-chans = <2>; |
| 106 | interrupt-parent = <&MAL0>; | 108 | interrupt-parent = <&MAL0>; |
| 107 | interrupts = <0 1 2 3 4>; | 109 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
| 108 | #interrupt-cells = <1>; | 110 | #interrupt-cells = <1>; |
| 109 | #address-cells = <0>; | 111 | #address-cells = <0>; |
| 110 | #size-cells = <0>; | 112 | #size-cells = <0>; |
| 111 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 113 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
| 112 | /*RXEOB*/ 1 &UIC0 b 4 | 114 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
| 113 | /*SERR*/ 2 &UIC1 0 4 | 115 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
| 114 | /*TXDE*/ 3 &UIC1 1 4 | 116 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
| 115 | /*RXDE*/ 4 &UIC1 2 4>; | 117 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
| 116 | }; | 118 | }; |
| 117 | 119 | ||
| 118 | POB0: opb { | 120 | POB0: opb { |
| @@ -122,110 +124,110 @@ | |||
| 122 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | 124 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN |
| 123 | * bits. | 125 | * bits. |
| 124 | */ | 126 | */ |
| 125 | ranges = <00000000 0 00000000 80000000 | 127 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
| 126 | 80000000 0 80000000 80000000>; | 128 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
| 127 | interrupt-parent = <&UIC1>; | 129 | interrupt-parent = <&UIC1>; |
| 128 | interrupts = <7 4>; | 130 | interrupts = <0x7 0x4>; |
| 129 | clock-frequency = <0>; /* Filled in by zImage */ | 131 | clock-frequency = <0>; /* Filled in by zImage */ |
| 130 | 132 | ||
| 131 | EBC0: ebc { | 133 | EBC0: ebc { |
| 132 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 134 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
| 133 | dcr-reg = <012 2>; | 135 | dcr-reg = <0x012 0x002>; |
| 134 | #address-cells = <2>; | 136 | #address-cells = <2>; |
| 135 | #size-cells = <1>; | 137 | #size-cells = <1>; |
| 136 | clock-frequency = <0>; /* Filled in by zImage */ | 138 | clock-frequency = <0>; /* Filled in by zImage */ |
| 137 | interrupts = <5 1>; | 139 | interrupts = <0x5 0x1>; |
| 138 | interrupt-parent = <&UIC1>; | 140 | interrupt-parent = <&UIC1>; |
| 139 | }; | 141 | }; |
| 140 | 142 | ||
| 141 | UART0: serial@ef600300 { | 143 | UART0: serial@ef600300 { |
| 142 | device_type = "serial"; | 144 | device_type = "serial"; |
| 143 | compatible = "ns16550"; | 145 | compatible = "ns16550"; |
| 144 | reg = <ef600300 8>; | 146 | reg = <0xef600300 0x00000008>; |
| 145 | virtual-reg = <ef600300>; | 147 | virtual-reg = <0xef600300>; |
| 146 | clock-frequency = <0>; /* Filled in by zImage */ | 148 | clock-frequency = <0>; /* Filled in by zImage */ |
| 147 | current-speed = <1c200>; | 149 | current-speed = <115200>; |
| 148 | interrupt-parent = <&UIC0>; | 150 | interrupt-parent = <&UIC0>; |
| 149 | interrupts = <0 4>; | 151 | interrupts = <0x0 0x4>; |
| 150 | }; | 152 | }; |
| 151 | 153 | ||
| 152 | UART1: serial@ef600400 { | 154 | UART1: serial@ef600400 { |
| 153 | device_type = "serial"; | 155 | device_type = "serial"; |
| 154 | compatible = "ns16550"; | 156 | compatible = "ns16550"; |
| 155 | reg = <ef600400 8>; | 157 | reg = <0xef600400 0x00000008>; |
| 156 | virtual-reg = <ef600400>; | 158 | virtual-reg = <0xef600400>; |
| 157 | clock-frequency = <0>; | 159 | clock-frequency = <0>; |
| 158 | current-speed = <0>; | 160 | current-speed = <0>; |
| 159 | interrupt-parent = <&UIC0>; | 161 | interrupt-parent = <&UIC0>; |
| 160 | interrupts = <1 4>; | 162 | interrupts = <0x1 0x4>; |
| 161 | }; | 163 | }; |
| 162 | 164 | ||
| 163 | UART2: serial@ef600500 { | 165 | UART2: serial@ef600500 { |
| 164 | device_type = "serial"; | 166 | device_type = "serial"; |
| 165 | compatible = "ns16550"; | 167 | compatible = "ns16550"; |
| 166 | reg = <ef600500 8>; | 168 | reg = <0xef600500 0x00000008>; |
| 167 | virtual-reg = <ef600500>; | 169 | virtual-reg = <0xef600500>; |
| 168 | clock-frequency = <0>; | 170 | clock-frequency = <0>; |
| 169 | current-speed = <0>; | 171 | current-speed = <0>; |
| 170 | interrupt-parent = <&UIC0>; | 172 | interrupt-parent = <&UIC0>; |
| 171 | interrupts = <3 4>; | 173 | interrupts = <0x3 0x4>; |
| 172 | status = "disabled"; | 174 | status = "disabled"; |
| 173 | }; | 175 | }; |
| 174 | 176 | ||
| 175 | UART3: serial@ef600600 { | 177 | UART3: serial@ef600600 { |
| 176 | device_type = "serial"; | 178 | device_type = "serial"; |
| 177 | compatible = "ns16550"; | 179 | compatible = "ns16550"; |
| 178 | reg = <ef600600 8>; | 180 | reg = <0xef600600 0x00000008>; |
| 179 | virtual-reg = <ef600600>; | 181 | virtual-reg = <0xef600600>; |
| 180 | clock-frequency = <0>; | 182 | clock-frequency = <0>; |
| 181 | current-speed = <0>; | 183 | current-speed = <0>; |
| 182 | interrupt-parent = <&UIC0>; | 184 | interrupt-parent = <&UIC0>; |
| 183 | interrupts = <4 4>; | 185 | interrupts = <0x4 0x4>; |
| 184 | status = "disabled"; | 186 | status = "disabled"; |
| 185 | }; | 187 | }; |
| 186 | 188 | ||
| 187 | IIC0: i2c@ef600700 { | 189 | IIC0: i2c@ef600700 { |
| 188 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 190 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 189 | reg = <ef600700 14>; | 191 | reg = <0xef600700 0x00000014>; |
| 190 | interrupt-parent = <&UIC0>; | 192 | interrupt-parent = <&UIC0>; |
| 191 | interrupts = <2 4>; | 193 | interrupts = <0x2 0x4>; |
| 192 | }; | 194 | }; |
| 193 | 195 | ||
| 194 | IIC1: i2c@ef600800 { | 196 | IIC1: i2c@ef600800 { |
| 195 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 197 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
| 196 | reg = <ef600800 14>; | 198 | reg = <0xef600800 0x00000014>; |
| 197 | interrupt-parent = <&UIC0>; | 199 | interrupt-parent = <&UIC0>; |
| 198 | interrupts = <7 4>; | 200 | interrupts = <0x7 0x4>; |
| 199 | }; | 201 | }; |
| 200 | 202 | ||
| 201 | spi@ef600900 { | 203 | spi@ef600900 { |
| 202 | compatible = "amcc,spi-440ep"; | 204 | compatible = "amcc,spi-440ep"; |
| 203 | reg = <ef600900 6>; | 205 | reg = <0xef600900 0x00000006>; |
| 204 | interrupts = <8 4>; | 206 | interrupts = <0x8 0x4>; |
| 205 | interrupt-parent = <&UIC0>; | 207 | interrupt-parent = <&UIC0>; |
| 206 | }; | 208 | }; |
| 207 | 209 | ||
| 208 | ZMII0: emac-zmii@ef600d00 { | 210 | ZMII0: emac-zmii@ef600d00 { |
| 209 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 211 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
| 210 | reg = <ef600d00 c>; | 212 | reg = <0xef600d00 0x0000000c>; |
| 211 | }; | 213 | }; |
| 212 | 214 | ||
| 213 | EMAC0: ethernet@ef600e00 { | 215 | EMAC0: ethernet@ef600e00 { |
| 214 | device_type = "network"; | 216 | device_type = "network"; |
| 215 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 217 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 216 | interrupt-parent = <&UIC1>; | 218 | interrupt-parent = <&UIC1>; |
| 217 | interrupts = <1c 4 1d 4>; | 219 | interrupts = <0x1c 0x4 0x1d 0x4>; |
| 218 | reg = <ef600e00 70>; | 220 | reg = <0xef600e00 0x00000070>; |
| 219 | local-mac-address = [000000000000]; | 221 | local-mac-address = [000000000000]; |
| 220 | mal-device = <&MAL0>; | 222 | mal-device = <&MAL0>; |
| 221 | mal-tx-channel = <0 1>; | 223 | mal-tx-channel = <0 1>; |
| 222 | mal-rx-channel = <0>; | 224 | mal-rx-channel = <0>; |
| 223 | cell-index = <0>; | 225 | cell-index = <0>; |
| 224 | max-frame-size = <5dc>; | 226 | max-frame-size = <1500>; |
| 225 | rx-fifo-size = <1000>; | 227 | rx-fifo-size = <4096>; |
| 226 | tx-fifo-size = <800>; | 228 | tx-fifo-size = <2048>; |
| 227 | phy-mode = "rmii"; | 229 | phy-mode = "rmii"; |
| 228 | phy-map = <00000000>; | 230 | phy-map = <0x00000000>; |
| 229 | zmii-device = <&ZMII0>; | 231 | zmii-device = <&ZMII0>; |
| 230 | zmii-channel = <0>; | 232 | zmii-channel = <0>; |
| 231 | }; | 233 | }; |
| @@ -234,26 +236,26 @@ | |||
| 234 | device_type = "network"; | 236 | device_type = "network"; |
| 235 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 237 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
| 236 | interrupt-parent = <&UIC1>; | 238 | interrupt-parent = <&UIC1>; |
| 237 | interrupts = <1e 4 1f 4>; | 239 | interrupts = <0x1e 0x4 0x1f 0x4>; |
| 238 | reg = <ef600f00 70>; | 240 | reg = <0xef600f00 0x00000070>; |
| 239 | local-mac-address = [000000000000]; | 241 | local-mac-address = [000000000000]; |
| 240 | mal-device = <&MAL0>; | 242 | mal-device = <&MAL0>; |
| 241 | mal-tx-channel = <2 3>; | 243 | mal-tx-channel = <2 3>; |
| 242 | mal-rx-channel = <1>; | 244 | mal-rx-channel = <1>; |
| 243 | cell-index = <1>; | 245 | cell-index = <1>; |
| 244 | max-frame-size = <5dc>; | 246 | max-frame-size = <1500>; |
| 245 | rx-fifo-size = <1000>; | 247 | rx-fifo-size = <4096>; |
| 246 | tx-fifo-size = <800>; | 248 | tx-fifo-size = <2048>; |
| 247 | phy-mode = "rmii"; | 249 | phy-mode = "rmii"; |
| 248 | phy-map = <00000000>; | 250 | phy-map = <0x00000000>; |
| 249 | zmii-device = <&ZMII0>; | 251 | zmii-device = <&ZMII0>; |
| 250 | zmii-channel = <1>; | 252 | zmii-channel = <1>; |
| 251 | }; | 253 | }; |
| 252 | 254 | ||
| 253 | usb@ef601000 { | 255 | usb@ef601000 { |
| 254 | compatible = "ohci-be"; | 256 | compatible = "ohci-be"; |
| 255 | reg = <ef601000 80>; | 257 | reg = <0xef601000 0x00000080>; |
| 256 | interrupts = <8 4 9 4>; | 258 | interrupts = <0x8 0x4 0x9 0x4>; |
| 257 | interrupt-parent = < &UIC1 >; | 259 | interrupt-parent = < &UIC1 >; |
| 258 | }; | 260 | }; |
| 259 | }; | 261 | }; |
| @@ -265,35 +267,35 @@ | |||
| 265 | #address-cells = <3>; | 267 | #address-cells = <3>; |
| 266 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | 268 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; |
| 267 | primary; | 269 | primary; |
| 268 | reg = <0 eec00000 8 /* Config space access */ | 270 | reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ |
| 269 | 0 eed00000 4 /* IACK */ | 271 | 0x00000000 0xeed00000 0x00000004 /* IACK */ |
| 270 | 0 eed00000 4 /* Special cycle */ | 272 | 0x00000000 0xeed00000 0x00000004 /* Special cycle */ |
| 271 | 0 ef400000 40>; /* Internal registers */ | 273 | 0x00000000 0xef400000 0x00000040>; /* Internal registers */ |
| 272 | 274 | ||
| 273 | /* Outbound ranges, one memory and one IO, | 275 | /* Outbound ranges, one memory and one IO, |
| 274 | * later cannot be changed. Chip supports a second | 276 | * later cannot be changed. Chip supports a second |
| 275 | * IO range but we don't use it for now | 277 | * IO range but we don't use it for now |
| 276 | */ | 278 | */ |
| 277 | ranges = <02000000 0 a0000000 0 a0000000 0 20000000 | 279 | ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 |
| 278 | 01000000 0 00000000 0 e8000000 0 00010000>; | 280 | 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
| 279 | 281 | ||
| 280 | /* Inbound 2GB range starting at 0 */ | 282 | /* Inbound 2GB range starting at 0 */ |
| 281 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 283 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
| 282 | 284 | ||
| 283 | /* Bamboo has all 4 IRQ pins tied together per slot */ | 285 | /* Bamboo has all 4 IRQ pins tied together per slot */ |
| 284 | interrupt-map-mask = <f800 0 0 0>; | 286 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
| 285 | interrupt-map = < | 287 | interrupt-map = < |
| 286 | /* IDSEL 1 */ | 288 | /* IDSEL 1 */ |
| 287 | 0800 0 0 0 &UIC0 1c 8 | 289 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
| 288 | 290 | ||
| 289 | /* IDSEL 2 */ | 291 | /* IDSEL 2 */ |
| 290 | 1000 0 0 0 &UIC0 1b 8 | 292 | 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 |
| 291 | 293 | ||
| 292 | /* IDSEL 3 */ | 294 | /* IDSEL 3 */ |
| 293 | 1800 0 0 0 &UIC0 1a 8 | 295 | 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
| 294 | 296 | ||
| 295 | /* IDSEL 4 */ | 297 | /* IDSEL 4 */ |
| 296 | 2000 0 0 0 &UIC0 19 8 | 298 | 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 |
| 297 | >; | 299 | >; |
| 298 | }; | 300 | }; |
| 299 | }; | 301 | }; |
diff --git a/arch/powerpc/boot/redboot-83xx.c b/arch/powerpc/boot/redboot-83xx.c new file mode 100644 index 000000000000..79aa9e151fa7 --- /dev/null +++ b/arch/powerpc/boot/redboot-83xx.c | |||
| @@ -0,0 +1,60 @@ | |||
| 1 | /* | ||
| 2 | * RedBoot firmware support | ||
| 3 | * | ||
| 4 | * Author: Scott Wood <scottwood@freescale.com> | ||
| 5 | * | ||
| 6 | * Copyright (c) 2007 Freescale Semiconductor, Inc. | ||
| 7 | * Copyright (c) 2008 Codehermit | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License version 2 as published | ||
| 11 | * by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include "ops.h" | ||
| 15 | #include "stdio.h" | ||
| 16 | #include "redboot.h" | ||
| 17 | #include "fsl-soc.h" | ||
| 18 | #include "io.h" | ||
| 19 | |||
| 20 | static bd_t bd; | ||
| 21 | BSS_STACK(4096); | ||
| 22 | |||
| 23 | #define MHZ(x) ((x + 500000) / 1000000) | ||
| 24 | |||
| 25 | static void platform_fixups(void) | ||
| 26 | { | ||
| 27 | void *node; | ||
| 28 | |||
| 29 | dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); | ||
| 30 | dt_fixup_mac_addresses(bd.bi_enetaddr); | ||
| 31 | dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); | ||
| 32 | |||
| 33 | node = finddevice("/soc/cpm/brg"); | ||
| 34 | if (node) { | ||
| 35 | printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", | ||
| 36 | bd.bi_busfreq, MHZ(bd.bi_busfreq)); | ||
| 37 | setprop(node, "clock-frequency", &bd.bi_busfreq, 4); | ||
| 38 | } | ||
| 39 | |||
| 40 | } | ||
| 41 | |||
| 42 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
| 43 | unsigned long r6, unsigned long r7) | ||
| 44 | { | ||
| 45 | memcpy(&bd, (char *)r3, sizeof(bd)); | ||
| 46 | |||
| 47 | if (bd.bi_tag != 0x42444944) | ||
| 48 | return; | ||
| 49 | |||
| 50 | simple_alloc_init(_end, | ||
| 51 | bd.bi_memstart + bd.bi_memsize - (unsigned long)_end, | ||
| 52 | 32, 64); | ||
| 53 | |||
| 54 | fdt_init(_dtb_start); | ||
| 55 | serial_console_init(); | ||
| 56 | platform_ops.fixups = platform_fixups; | ||
| 57 | |||
| 58 | loader_info.cmdline = (char *)bd.bi_cmdline; | ||
| 59 | loader_info.cmdline_len = strlen((char *)bd.bi_cmdline); | ||
| 60 | } | ||
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index d6c96d9ab291..4832be880998 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper | |||
| @@ -171,7 +171,7 @@ cuboot*) | |||
| 171 | *-mpc824*) | 171 | *-mpc824*) |
| 172 | platformo=$object/cuboot-824x.o | 172 | platformo=$object/cuboot-824x.o |
| 173 | ;; | 173 | ;; |
| 174 | *-mpc83*) | 174 | *-mpc83*|*-asp834x*) |
| 175 | platformo=$object/cuboot-83xx.o | 175 | platformo=$object/cuboot-83xx.o |
| 176 | ;; | 176 | ;; |
| 177 | *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) | 177 | *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) |
| @@ -203,6 +203,10 @@ simpleboot-virtex405-*) | |||
| 203 | platformo="$object/virtex405-head.o $object/simpleboot.o" | 203 | platformo="$object/virtex405-head.o $object/simpleboot.o" |
| 204 | binary=y | 204 | binary=y |
| 205 | ;; | 205 | ;; |
| 206 | asp834x-redboot) | ||
| 207 | platformo="$object/fixed-head.o $object/redboot-83xx.o" | ||
| 208 | binary=y | ||
| 209 | ;; | ||
| 206 | esac | 210 | esac |
| 207 | 211 | ||
| 208 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" | 212 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" |
diff --git a/arch/powerpc/configs/asp8347_defconfig b/arch/powerpc/configs/asp8347_defconfig new file mode 100644 index 000000000000..60bb4d106c87 --- /dev/null +++ b/arch/powerpc/configs/asp8347_defconfig | |||
| @@ -0,0 +1,1214 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.25-rc6 | ||
| 4 | # Tue May 6 02:21:00 2008 | ||
| 5 | # | ||
| 6 | # CONFIG_PPC64 is not set | ||
| 7 | |||
| 8 | # | ||
| 9 | # Processor support | ||
| 10 | # | ||
| 11 | CONFIG_6xx=y | ||
| 12 | # CONFIG_PPC_85xx is not set | ||
| 13 | # CONFIG_PPC_8xx is not set | ||
| 14 | # CONFIG_40x is not set | ||
| 15 | # CONFIG_44x is not set | ||
| 16 | # CONFIG_E200 is not set | ||
| 17 | CONFIG_PPC_FPU=y | ||
| 18 | CONFIG_FSL_EMB_PERFMON=y | ||
| 19 | CONFIG_PPC_STD_MMU=y | ||
| 20 | CONFIG_PPC_STD_MMU_32=y | ||
| 21 | # CONFIG_PPC_MM_SLICES is not set | ||
| 22 | # CONFIG_SMP is not set | ||
| 23 | CONFIG_PPC32=y | ||
| 24 | CONFIG_WORD_SIZE=32 | ||
| 25 | CONFIG_PPC_MERGE=y | ||
| 26 | CONFIG_MMU=y | ||
| 27 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
| 28 | CONFIG_GENERIC_TIME=y | ||
| 29 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
| 30 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 31 | CONFIG_GENERIC_HARDIRQS=y | ||
| 32 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
| 33 | CONFIG_IRQ_PER_CPU=y | ||
| 34 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
| 35 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
| 36 | CONFIG_GENERIC_HWEIGHT=y | ||
| 37 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 38 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 39 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
| 40 | CONFIG_PPC=y | ||
| 41 | CONFIG_EARLY_PRINTK=y | ||
| 42 | CONFIG_GENERIC_NVRAM=y | ||
| 43 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
| 44 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
| 45 | CONFIG_PPC_OF=y | ||
| 46 | CONFIG_OF=y | ||
| 47 | CONFIG_PPC_UDBG_16550=y | ||
| 48 | # CONFIG_GENERIC_TBSYNC is not set | ||
| 49 | CONFIG_AUDIT_ARCH=y | ||
| 50 | CONFIG_GENERIC_BUG=y | ||
| 51 | # CONFIG_DEFAULT_UIMAGE is not set | ||
| 52 | CONFIG_REDBOOT=y | ||
| 53 | # CONFIG_PPC_DCR_NATIVE is not set | ||
| 54 | # CONFIG_PPC_DCR_MMIO is not set | ||
| 55 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 56 | |||
| 57 | # | ||
| 58 | # General setup | ||
| 59 | # | ||
| 60 | CONFIG_EXPERIMENTAL=y | ||
| 61 | CONFIG_BROKEN_ON_SMP=y | ||
| 62 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 63 | CONFIG_LOCALVERSION="" | ||
| 64 | CONFIG_LOCALVERSION_AUTO=y | ||
| 65 | CONFIG_SWAP=y | ||
| 66 | CONFIG_SYSVIPC=y | ||
| 67 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 68 | # CONFIG_POSIX_MQUEUE is not set | ||
| 69 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 70 | # CONFIG_TASKSTATS is not set | ||
| 71 | # CONFIG_AUDIT is not set | ||
| 72 | # CONFIG_IKCONFIG is not set | ||
| 73 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 74 | # CONFIG_CGROUPS is not set | ||
| 75 | CONFIG_GROUP_SCHED=y | ||
| 76 | # CONFIG_FAIR_GROUP_SCHED is not set | ||
| 77 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 78 | CONFIG_USER_SCHED=y | ||
| 79 | # CONFIG_CGROUP_SCHED is not set | ||
| 80 | CONFIG_SYSFS_DEPRECATED=y | ||
| 81 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 82 | # CONFIG_RELAY is not set | ||
| 83 | # CONFIG_NAMESPACES is not set | ||
| 84 | CONFIG_BLK_DEV_INITRD=y | ||
| 85 | CONFIG_INITRAMFS_SOURCE="" | ||
| 86 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 87 | CONFIG_SYSCTL=y | ||
| 88 | CONFIG_EMBEDDED=y | ||
| 89 | CONFIG_SYSCTL_SYSCALL=y | ||
| 90 | # CONFIG_KALLSYMS is not set | ||
| 91 | CONFIG_HOTPLUG=y | ||
| 92 | CONFIG_PRINTK=y | ||
| 93 | CONFIG_BUG=y | ||
| 94 | CONFIG_ELF_CORE=y | ||
| 95 | CONFIG_COMPAT_BRK=y | ||
| 96 | CONFIG_BASE_FULL=y | ||
| 97 | CONFIG_FUTEX=y | ||
| 98 | CONFIG_ANON_INODES=y | ||
| 99 | # CONFIG_EPOLL is not set | ||
| 100 | CONFIG_SIGNALFD=y | ||
| 101 | CONFIG_TIMERFD=y | ||
| 102 | CONFIG_EVENTFD=y | ||
| 103 | CONFIG_SHMEM=y | ||
| 104 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 105 | CONFIG_SLUB_DEBUG=y | ||
| 106 | # CONFIG_SLAB is not set | ||
| 107 | CONFIG_SLUB=y | ||
| 108 | # CONFIG_SLOB is not set | ||
| 109 | # CONFIG_PROFILING is not set | ||
| 110 | # CONFIG_MARKERS is not set | ||
| 111 | CONFIG_HAVE_OPROFILE=y | ||
| 112 | CONFIG_HAVE_KPROBES=y | ||
| 113 | CONFIG_HAVE_KRETPROBES=y | ||
| 114 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 115 | CONFIG_SLABINFO=y | ||
| 116 | CONFIG_RT_MUTEXES=y | ||
| 117 | # CONFIG_TINY_SHMEM is not set | ||
| 118 | CONFIG_BASE_SMALL=0 | ||
| 119 | CONFIG_MODULES=y | ||
| 120 | CONFIG_MODULE_UNLOAD=y | ||
| 121 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 122 | # CONFIG_MODVERSIONS is not set | ||
| 123 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 124 | # CONFIG_KMOD is not set | ||
| 125 | CONFIG_BLOCK=y | ||
| 126 | # CONFIG_LBD is not set | ||
| 127 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 128 | # CONFIG_LSF is not set | ||
| 129 | # CONFIG_BLK_DEV_BSG is not set | ||
| 130 | |||
| 131 | # | ||
| 132 | # IO Schedulers | ||
| 133 | # | ||
| 134 | CONFIG_IOSCHED_NOOP=y | ||
| 135 | CONFIG_IOSCHED_AS=y | ||
| 136 | CONFIG_IOSCHED_DEADLINE=y | ||
| 137 | CONFIG_IOSCHED_CFQ=y | ||
| 138 | CONFIG_DEFAULT_AS=y | ||
| 139 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 140 | # CONFIG_DEFAULT_CFQ is not set | ||
| 141 | # CONFIG_DEFAULT_NOOP is not set | ||
| 142 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 143 | CONFIG_CLASSIC_RCU=y | ||
| 144 | |||
| 145 | # | ||
| 146 | # Platform support | ||
| 147 | # | ||
| 148 | # CONFIG_PPC_MULTIPLATFORM is not set | ||
| 149 | # CONFIG_PPC_82xx is not set | ||
| 150 | CONFIG_PPC_83xx=y | ||
| 151 | # CONFIG_PPC_86xx is not set | ||
| 152 | # CONFIG_PPC_MPC512x is not set | ||
| 153 | # CONFIG_PPC_MPC5121 is not set | ||
| 154 | # CONFIG_PPC_CELL is not set | ||
| 155 | # CONFIG_PPC_CELL_NATIVE is not set | ||
| 156 | # CONFIG_PQ2ADS is not set | ||
| 157 | CONFIG_MPC83xx=y | ||
| 158 | # CONFIG_MPC831x_RDB is not set | ||
| 159 | # CONFIG_MPC832x_MDS is not set | ||
| 160 | # CONFIG_MPC832x_RDB is not set | ||
| 161 | # CONFIG_MPC834x_MDS is not set | ||
| 162 | # CONFIG_MPC834x_ITX is not set | ||
| 163 | # CONFIG_MPC836x_MDS is not set | ||
| 164 | # CONFIG_MPC837x_MDS is not set | ||
| 165 | # CONFIG_MPC837x_RDB is not set | ||
| 166 | # CONFIG_SBC834x is not set | ||
| 167 | CONFIG_ASP834x=y | ||
| 168 | CONFIG_PPC_MPC834x=y | ||
| 169 | CONFIG_IPIC=y | ||
| 170 | # CONFIG_MPIC is not set | ||
| 171 | # CONFIG_MPIC_WEIRD is not set | ||
| 172 | # CONFIG_PPC_I8259 is not set | ||
| 173 | # CONFIG_PPC_RTAS is not set | ||
| 174 | # CONFIG_MMIO_NVRAM is not set | ||
| 175 | # CONFIG_PPC_MPC106 is not set | ||
| 176 | # CONFIG_PPC_970_NAP is not set | ||
| 177 | # CONFIG_PPC_INDIRECT_IO is not set | ||
| 178 | # CONFIG_GENERIC_IOMAP is not set | ||
| 179 | # CONFIG_CPU_FREQ is not set | ||
| 180 | # CONFIG_FSL_ULI1575 is not set | ||
| 181 | |||
| 182 | # | ||
| 183 | # Kernel options | ||
| 184 | # | ||
| 185 | # CONFIG_HIGHMEM is not set | ||
| 186 | CONFIG_TICK_ONESHOT=y | ||
| 187 | CONFIG_NO_HZ=y | ||
| 188 | CONFIG_HIGH_RES_TIMERS=y | ||
| 189 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 190 | # CONFIG_HZ_100 is not set | ||
| 191 | CONFIG_HZ_250=y | ||
| 192 | # CONFIG_HZ_300 is not set | ||
| 193 | # CONFIG_HZ_1000 is not set | ||
| 194 | CONFIG_HZ=250 | ||
| 195 | # CONFIG_SCHED_HRTICK is not set | ||
| 196 | CONFIG_PREEMPT_NONE=y | ||
| 197 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 198 | # CONFIG_PREEMPT is not set | ||
| 199 | CONFIG_BINFMT_ELF=y | ||
| 200 | # CONFIG_BINFMT_MISC is not set | ||
| 201 | # CONFIG_IOMMU_HELPER is not set | ||
| 202 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
| 203 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
| 204 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
| 205 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 206 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 207 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 208 | CONFIG_FLATMEM_MANUAL=y | ||
| 209 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 210 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 211 | CONFIG_FLATMEM=y | ||
| 212 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 213 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 214 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 215 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 216 | # CONFIG_RESOURCES_64BIT is not set | ||
| 217 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 218 | CONFIG_BOUNCE=y | ||
| 219 | CONFIG_VIRT_TO_BUS=y | ||
| 220 | CONFIG_PROC_DEVICETREE=y | ||
| 221 | # CONFIG_CMDLINE_BOOL is not set | ||
| 222 | # CONFIG_PM is not set | ||
| 223 | CONFIG_SECCOMP=y | ||
| 224 | CONFIG_ISA_DMA_API=y | ||
| 225 | |||
| 226 | # | ||
| 227 | # Bus options | ||
| 228 | # | ||
| 229 | CONFIG_ZONE_DMA=y | ||
| 230 | CONFIG_GENERIC_ISA_DMA=y | ||
| 231 | CONFIG_PPC_INDIRECT_PCI=y | ||
| 232 | CONFIG_FSL_SOC=y | ||
| 233 | CONFIG_PCI=y | ||
| 234 | CONFIG_PCI_DOMAINS=y | ||
| 235 | CONFIG_PCI_SYSCALL=y | ||
| 236 | # CONFIG_PCIEPORTBUS is not set | ||
| 237 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
| 238 | # CONFIG_PCI_MSI is not set | ||
| 239 | CONFIG_PCI_LEGACY=y | ||
| 240 | # CONFIG_PCCARD is not set | ||
| 241 | # CONFIG_HOTPLUG_PCI is not set | ||
| 242 | |||
| 243 | # | ||
| 244 | # Advanced setup | ||
| 245 | # | ||
| 246 | # CONFIG_ADVANCED_OPTIONS is not set | ||
| 247 | |||
| 248 | # | ||
| 249 | # Default settings for advanced configuration options are used | ||
| 250 | # | ||
| 251 | CONFIG_HIGHMEM_START=0xfe000000 | ||
| 252 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
| 253 | CONFIG_KERNEL_START=0xc0000000 | ||
| 254 | CONFIG_TASK_SIZE=0xc0000000 | ||
| 255 | CONFIG_BOOT_LOAD=0x00800000 | ||
| 256 | |||
| 257 | # | ||
| 258 | # Networking | ||
| 259 | # | ||
| 260 | CONFIG_NET=y | ||
| 261 | |||
| 262 | # | ||
| 263 | # Networking options | ||
| 264 | # | ||
| 265 | CONFIG_PACKET=y | ||
| 266 | # CONFIG_PACKET_MMAP is not set | ||
| 267 | CONFIG_UNIX=y | ||
| 268 | CONFIG_XFRM=y | ||
| 269 | CONFIG_XFRM_USER=m | ||
| 270 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 271 | # CONFIG_XFRM_MIGRATE is not set | ||
| 272 | # CONFIG_XFRM_STATISTICS is not set | ||
| 273 | # CONFIG_NET_KEY is not set | ||
| 274 | CONFIG_INET=y | ||
| 275 | CONFIG_IP_MULTICAST=y | ||
| 276 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 277 | CONFIG_IP_FIB_HASH=y | ||
| 278 | CONFIG_IP_PNP=y | ||
| 279 | CONFIG_IP_PNP_DHCP=y | ||
| 280 | CONFIG_IP_PNP_BOOTP=y | ||
| 281 | # CONFIG_IP_PNP_RARP is not set | ||
| 282 | # CONFIG_NET_IPIP is not set | ||
| 283 | # CONFIG_NET_IPGRE is not set | ||
| 284 | # CONFIG_IP_MROUTE is not set | ||
| 285 | # CONFIG_ARPD is not set | ||
| 286 | CONFIG_SYN_COOKIES=y | ||
| 287 | # CONFIG_INET_AH is not set | ||
| 288 | # CONFIG_INET_ESP is not set | ||
| 289 | # CONFIG_INET_IPCOMP is not set | ||
| 290 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 291 | # CONFIG_INET_TUNNEL is not set | ||
| 292 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 293 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 294 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 295 | # CONFIG_INET_LRO is not set | ||
| 296 | CONFIG_INET_DIAG=y | ||
| 297 | CONFIG_INET_TCP_DIAG=y | ||
| 298 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 299 | CONFIG_TCP_CONG_CUBIC=y | ||
| 300 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 301 | # CONFIG_TCP_MD5SIG is not set | ||
| 302 | # CONFIG_IPV6 is not set | ||
| 303 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 304 | # CONFIG_INET6_TUNNEL is not set | ||
| 305 | # CONFIG_NETWORK_SECMARK is not set | ||
| 306 | # CONFIG_NETFILTER is not set | ||
| 307 | # CONFIG_IP_DCCP is not set | ||
| 308 | # CONFIG_IP_SCTP is not set | ||
| 309 | # CONFIG_TIPC is not set | ||
| 310 | # CONFIG_ATM is not set | ||
| 311 | # CONFIG_BRIDGE is not set | ||
| 312 | # CONFIG_VLAN_8021Q is not set | ||
| 313 | # CONFIG_DECNET is not set | ||
| 314 | # CONFIG_LLC2 is not set | ||
| 315 | # CONFIG_IPX is not set | ||
| 316 | # CONFIG_ATALK is not set | ||
| 317 | # CONFIG_X25 is not set | ||
| 318 | # CONFIG_LAPB is not set | ||
| 319 | # CONFIG_ECONET is not set | ||
| 320 | # CONFIG_WAN_ROUTER is not set | ||
| 321 | # CONFIG_NET_SCHED is not set | ||
| 322 | |||
| 323 | # | ||
| 324 | # Network testing | ||
| 325 | # | ||
| 326 | # CONFIG_NET_PKTGEN is not set | ||
| 327 | # CONFIG_HAMRADIO is not set | ||
| 328 | # CONFIG_CAN is not set | ||
| 329 | # CONFIG_IRDA is not set | ||
| 330 | # CONFIG_BT is not set | ||
| 331 | # CONFIG_AF_RXRPC is not set | ||
| 332 | |||
| 333 | # | ||
| 334 | # Wireless | ||
| 335 | # | ||
| 336 | # CONFIG_CFG80211 is not set | ||
| 337 | # CONFIG_WIRELESS_EXT is not set | ||
| 338 | # CONFIG_MAC80211 is not set | ||
| 339 | # CONFIG_IEEE80211 is not set | ||
| 340 | # CONFIG_RFKILL is not set | ||
| 341 | # CONFIG_NET_9P is not set | ||
| 342 | |||
| 343 | # | ||
| 344 | # Device Drivers | ||
| 345 | # | ||
| 346 | |||
| 347 | # | ||
| 348 | # Generic Driver Options | ||
| 349 | # | ||
| 350 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 351 | CONFIG_STANDALONE=y | ||
| 352 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 353 | # CONFIG_FW_LOADER is not set | ||
| 354 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 355 | # CONFIG_CONNECTOR is not set | ||
| 356 | CONFIG_MTD=y | ||
| 357 | # CONFIG_MTD_DEBUG is not set | ||
| 358 | # CONFIG_MTD_CONCAT is not set | ||
| 359 | CONFIG_MTD_PARTITIONS=y | ||
| 360 | CONFIG_MTD_REDBOOT_PARTS=y | ||
| 361 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | ||
| 362 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y | ||
| 363 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
| 364 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 365 | CONFIG_MTD_OF_PARTS=y | ||
| 366 | |||
| 367 | # | ||
| 368 | # User Modules And Translation Layers | ||
| 369 | # | ||
| 370 | CONFIG_MTD_CHAR=y | ||
| 371 | CONFIG_MTD_BLKDEVS=y | ||
| 372 | CONFIG_MTD_BLOCK=y | ||
| 373 | # CONFIG_FTL is not set | ||
| 374 | # CONFIG_NFTL is not set | ||
| 375 | # CONFIG_INFTL is not set | ||
| 376 | # CONFIG_RFD_FTL is not set | ||
| 377 | # CONFIG_SSFDC is not set | ||
| 378 | # CONFIG_MTD_OOPS is not set | ||
| 379 | |||
| 380 | # | ||
| 381 | # RAM/ROM/Flash chip drivers | ||
| 382 | # | ||
| 383 | CONFIG_MTD_CFI=y | ||
| 384 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 385 | CONFIG_MTD_GEN_PROBE=y | ||
| 386 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 387 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 388 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 389 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 390 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 391 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 392 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 393 | CONFIG_MTD_CFI_I1=y | ||
| 394 | CONFIG_MTD_CFI_I2=y | ||
| 395 | # CONFIG_MTD_CFI_I4 is not set | ||
| 396 | # CONFIG_MTD_CFI_I8 is not set | ||
| 397 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 398 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 399 | # CONFIG_MTD_CFI_STAA is not set | ||
| 400 | CONFIG_MTD_CFI_UTIL=y | ||
| 401 | # CONFIG_MTD_RAM is not set | ||
| 402 | # CONFIG_MTD_ROM is not set | ||
| 403 | # CONFIG_MTD_ABSENT is not set | ||
| 404 | |||
| 405 | # | ||
| 406 | # Mapping drivers for chip access | ||
| 407 | # | ||
| 408 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 409 | # CONFIG_MTD_PHYSMAP is not set | ||
| 410 | CONFIG_MTD_PHYSMAP_OF=y | ||
| 411 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
| 412 | # CONFIG_MTD_PLATRAM is not set | ||
| 413 | |||
| 414 | # | ||
| 415 | # Self-contained MTD device drivers | ||
| 416 | # | ||
| 417 | # CONFIG_MTD_PMC551 is not set | ||
| 418 | # CONFIG_MTD_SLRAM is not set | ||
| 419 | # CONFIG_MTD_PHRAM is not set | ||
| 420 | # CONFIG_MTD_MTDRAM is not set | ||
| 421 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 422 | |||
| 423 | # | ||
| 424 | # Disk-On-Chip Device Drivers | ||
| 425 | # | ||
| 426 | # CONFIG_MTD_DOC2000 is not set | ||
| 427 | # CONFIG_MTD_DOC2001 is not set | ||
| 428 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 429 | # CONFIG_MTD_NAND is not set | ||
| 430 | # CONFIG_MTD_ONENAND is not set | ||
| 431 | |||
| 432 | # | ||
| 433 | # UBI - Unsorted block images | ||
| 434 | # | ||
| 435 | # CONFIG_MTD_UBI is not set | ||
| 436 | CONFIG_OF_DEVICE=y | ||
| 437 | # CONFIG_PARPORT is not set | ||
| 438 | CONFIG_BLK_DEV=y | ||
| 439 | # CONFIG_BLK_DEV_FD is not set | ||
| 440 | # CONFIG_BLK_CPQ_DA is not set | ||
| 441 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
| 442 | # CONFIG_BLK_DEV_DAC960 is not set | ||
| 443 | # CONFIG_BLK_DEV_UMEM is not set | ||
| 444 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 445 | CONFIG_BLK_DEV_LOOP=y | ||
| 446 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 447 | # CONFIG_BLK_DEV_NBD is not set | ||
| 448 | # CONFIG_BLK_DEV_SX8 is not set | ||
| 449 | # CONFIG_BLK_DEV_UB is not set | ||
| 450 | CONFIG_BLK_DEV_RAM=y | ||
| 451 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 452 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
| 453 | # CONFIG_BLK_DEV_XIP is not set | ||
| 454 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 455 | # CONFIG_ATA_OVER_ETH is not set | ||
| 456 | CONFIG_MISC_DEVICES=y | ||
| 457 | # CONFIG_PHANTOM is not set | ||
| 458 | # CONFIG_EEPROM_93CX6 is not set | ||
| 459 | # CONFIG_SGI_IOC4 is not set | ||
| 460 | # CONFIG_TIFM_CORE is not set | ||
| 461 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 462 | CONFIG_HAVE_IDE=y | ||
| 463 | # CONFIG_IDE is not set | ||
| 464 | |||
| 465 | # | ||
| 466 | # SCSI device support | ||
| 467 | # | ||
| 468 | # CONFIG_RAID_ATTRS is not set | ||
| 469 | # CONFIG_SCSI is not set | ||
| 470 | # CONFIG_SCSI_DMA is not set | ||
| 471 | # CONFIG_SCSI_NETLINK is not set | ||
| 472 | # CONFIG_ATA is not set | ||
| 473 | # CONFIG_MD is not set | ||
| 474 | # CONFIG_FUSION is not set | ||
| 475 | |||
| 476 | # | ||
| 477 | # IEEE 1394 (FireWire) support | ||
| 478 | # | ||
| 479 | # CONFIG_FIREWIRE is not set | ||
| 480 | # CONFIG_IEEE1394 is not set | ||
| 481 | # CONFIG_I2O is not set | ||
| 482 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
| 483 | CONFIG_NETDEVICES=y | ||
| 484 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 485 | # CONFIG_DUMMY is not set | ||
| 486 | # CONFIG_BONDING is not set | ||
| 487 | # CONFIG_MACVLAN is not set | ||
| 488 | # CONFIG_EQUALIZER is not set | ||
| 489 | # CONFIG_TUN is not set | ||
| 490 | # CONFIG_VETH is not set | ||
| 491 | # CONFIG_ARCNET is not set | ||
| 492 | CONFIG_PHYLIB=y | ||
| 493 | |||
| 494 | # | ||
| 495 | # MII PHY device drivers | ||
| 496 | # | ||
| 497 | # CONFIG_MARVELL_PHY is not set | ||
| 498 | # CONFIG_DAVICOM_PHY is not set | ||
| 499 | # CONFIG_QSEMI_PHY is not set | ||
| 500 | # CONFIG_LXT_PHY is not set | ||
| 501 | # CONFIG_CICADA_PHY is not set | ||
| 502 | # CONFIG_VITESSE_PHY is not set | ||
| 503 | # CONFIG_SMSC_PHY is not set | ||
| 504 | # CONFIG_BROADCOM_PHY is not set | ||
| 505 | # CONFIG_ICPLUS_PHY is not set | ||
| 506 | # CONFIG_REALTEK_PHY is not set | ||
| 507 | # CONFIG_FIXED_PHY is not set | ||
| 508 | # CONFIG_MDIO_BITBANG is not set | ||
| 509 | CONFIG_NET_ETHERNET=y | ||
| 510 | CONFIG_MII=y | ||
| 511 | # CONFIG_HAPPYMEAL is not set | ||
| 512 | # CONFIG_SUNGEM is not set | ||
| 513 | # CONFIG_CASSINI is not set | ||
| 514 | # CONFIG_NET_VENDOR_3COM is not set | ||
| 515 | # CONFIG_NET_TULIP is not set | ||
| 516 | # CONFIG_HP100 is not set | ||
| 517 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 518 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 519 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 520 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 521 | # CONFIG_NET_PCI is not set | ||
| 522 | # CONFIG_B44 is not set | ||
| 523 | CONFIG_NETDEV_1000=y | ||
| 524 | # CONFIG_ACENIC is not set | ||
| 525 | # CONFIG_DL2K is not set | ||
| 526 | # CONFIG_E1000 is not set | ||
| 527 | # CONFIG_E1000E is not set | ||
| 528 | # CONFIG_E1000E_ENABLED is not set | ||
| 529 | # CONFIG_IP1000 is not set | ||
| 530 | # CONFIG_IGB is not set | ||
| 531 | # CONFIG_NS83820 is not set | ||
| 532 | # CONFIG_HAMACHI is not set | ||
| 533 | # CONFIG_YELLOWFIN is not set | ||
| 534 | # CONFIG_R8169 is not set | ||
| 535 | # CONFIG_SIS190 is not set | ||
| 536 | # CONFIG_SKGE is not set | ||
| 537 | # CONFIG_SKY2 is not set | ||
| 538 | # CONFIG_SK98LIN is not set | ||
| 539 | # CONFIG_VIA_VELOCITY is not set | ||
| 540 | # CONFIG_TIGON3 is not set | ||
| 541 | # CONFIG_BNX2 is not set | ||
| 542 | CONFIG_GIANFAR=y | ||
| 543 | # CONFIG_GFAR_NAPI is not set | ||
| 544 | # CONFIG_QLA3XXX is not set | ||
| 545 | # CONFIG_ATL1 is not set | ||
| 546 | # CONFIG_NETDEV_10000 is not set | ||
| 547 | # CONFIG_TR is not set | ||
| 548 | |||
| 549 | # | ||
| 550 | # Wireless LAN | ||
| 551 | # | ||
| 552 | # CONFIG_WLAN_PRE80211 is not set | ||
| 553 | # CONFIG_WLAN_80211 is not set | ||
| 554 | |||
| 555 | # | ||
| 556 | # USB Network Adapters | ||
| 557 | # | ||
| 558 | # CONFIG_USB_CATC is not set | ||
| 559 | # CONFIG_USB_KAWETH is not set | ||
| 560 | # CONFIG_USB_PEGASUS is not set | ||
| 561 | # CONFIG_USB_RTL8150 is not set | ||
| 562 | # CONFIG_USB_USBNET is not set | ||
| 563 | # CONFIG_WAN is not set | ||
| 564 | # CONFIG_FDDI is not set | ||
| 565 | # CONFIG_HIPPI is not set | ||
| 566 | # CONFIG_PPP is not set | ||
| 567 | # CONFIG_SLIP is not set | ||
| 568 | # CONFIG_NETCONSOLE is not set | ||
| 569 | # CONFIG_NETPOLL is not set | ||
| 570 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 571 | # CONFIG_ISDN is not set | ||
| 572 | # CONFIG_PHONE is not set | ||
| 573 | |||
| 574 | # | ||
| 575 | # Input device support | ||
| 576 | # | ||
| 577 | CONFIG_INPUT=y | ||
| 578 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 579 | # CONFIG_INPUT_POLLDEV is not set | ||
| 580 | |||
| 581 | # | ||
| 582 | # Userland interfaces | ||
| 583 | # | ||
| 584 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 585 | # CONFIG_INPUT_JOYDEV is not set | ||
| 586 | # CONFIG_INPUT_EVDEV is not set | ||
| 587 | # CONFIG_INPUT_EVBUG is not set | ||
| 588 | |||
| 589 | # | ||
| 590 | # Input Device Drivers | ||
| 591 | # | ||
| 592 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 593 | # CONFIG_INPUT_MOUSE is not set | ||
| 594 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 595 | # CONFIG_INPUT_TABLET is not set | ||
| 596 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 597 | # CONFIG_INPUT_MISC is not set | ||
| 598 | |||
| 599 | # | ||
| 600 | # Hardware I/O ports | ||
| 601 | # | ||
| 602 | # CONFIG_SERIO is not set | ||
| 603 | # CONFIG_GAMEPORT is not set | ||
| 604 | |||
| 605 | # | ||
| 606 | # Character devices | ||
| 607 | # | ||
| 608 | # CONFIG_VT is not set | ||
| 609 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 610 | # CONFIG_NOZOMI is not set | ||
| 611 | |||
| 612 | # | ||
| 613 | # Serial drivers | ||
| 614 | # | ||
| 615 | CONFIG_SERIAL_8250=y | ||
| 616 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 617 | CONFIG_SERIAL_8250_PCI=y | ||
| 618 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 619 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 620 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 621 | |||
| 622 | # | ||
| 623 | # Non-8250 serial port support | ||
| 624 | # | ||
| 625 | # CONFIG_SERIAL_UARTLITE is not set | ||
| 626 | CONFIG_SERIAL_CORE=y | ||
| 627 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 628 | # CONFIG_SERIAL_JSM is not set | ||
| 629 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
| 630 | CONFIG_UNIX98_PTYS=y | ||
| 631 | CONFIG_LEGACY_PTYS=y | ||
| 632 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 633 | # CONFIG_IPMI_HANDLER is not set | ||
| 634 | # CONFIG_HW_RANDOM is not set | ||
| 635 | # CONFIG_NVRAM is not set | ||
| 636 | CONFIG_GEN_RTC=y | ||
| 637 | # CONFIG_GEN_RTC_X is not set | ||
| 638 | # CONFIG_R3964 is not set | ||
| 639 | # CONFIG_APPLICOM is not set | ||
| 640 | # CONFIG_RAW_DRIVER is not set | ||
| 641 | # CONFIG_TCG_TPM is not set | ||
| 642 | CONFIG_DEVPORT=y | ||
| 643 | CONFIG_I2C=y | ||
| 644 | CONFIG_I2C_BOARDINFO=y | ||
| 645 | CONFIG_I2C_CHARDEV=y | ||
| 646 | |||
| 647 | # | ||
| 648 | # I2C Algorithms | ||
| 649 | # | ||
| 650 | # CONFIG_I2C_ALGOBIT is not set | ||
| 651 | # CONFIG_I2C_ALGOPCF is not set | ||
| 652 | # CONFIG_I2C_ALGOPCA is not set | ||
| 653 | |||
| 654 | # | ||
| 655 | # I2C Hardware Bus support | ||
| 656 | # | ||
| 657 | # CONFIG_I2C_ALI1535 is not set | ||
| 658 | # CONFIG_I2C_ALI1563 is not set | ||
| 659 | # CONFIG_I2C_ALI15X3 is not set | ||
| 660 | # CONFIG_I2C_AMD756 is not set | ||
| 661 | # CONFIG_I2C_AMD8111 is not set | ||
| 662 | # CONFIG_I2C_I801 is not set | ||
| 663 | # CONFIG_I2C_I810 is not set | ||
| 664 | # CONFIG_I2C_PIIX4 is not set | ||
| 665 | CONFIG_I2C_MPC=y | ||
| 666 | # CONFIG_I2C_NFORCE2 is not set | ||
| 667 | # CONFIG_I2C_OCORES is not set | ||
| 668 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 669 | # CONFIG_I2C_PROSAVAGE is not set | ||
| 670 | # CONFIG_I2C_SAVAGE4 is not set | ||
| 671 | # CONFIG_I2C_SIMTEC is not set | ||
| 672 | # CONFIG_I2C_SIS5595 is not set | ||
| 673 | # CONFIG_I2C_SIS630 is not set | ||
| 674 | # CONFIG_I2C_SIS96X is not set | ||
| 675 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 676 | # CONFIG_I2C_STUB is not set | ||
| 677 | # CONFIG_I2C_TINY_USB is not set | ||
| 678 | # CONFIG_I2C_VIA is not set | ||
| 679 | # CONFIG_I2C_VIAPRO is not set | ||
| 680 | # CONFIG_I2C_VOODOO3 is not set | ||
| 681 | |||
| 682 | # | ||
| 683 | # Miscellaneous I2C Chip support | ||
| 684 | # | ||
| 685 | # CONFIG_DS1682 is not set | ||
| 686 | # CONFIG_SENSORS_EEPROM is not set | ||
| 687 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 688 | # CONFIG_PCF8575 is not set | ||
| 689 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 690 | # CONFIG_TPS65010 is not set | ||
| 691 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 692 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 693 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 694 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 695 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 696 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 697 | |||
| 698 | # | ||
| 699 | # SPI support | ||
| 700 | # | ||
| 701 | # CONFIG_SPI is not set | ||
| 702 | # CONFIG_SPI_MASTER is not set | ||
| 703 | # CONFIG_W1 is not set | ||
| 704 | # CONFIG_POWER_SUPPLY is not set | ||
| 705 | CONFIG_HWMON=y | ||
| 706 | # CONFIG_HWMON_VID is not set | ||
| 707 | # CONFIG_SENSORS_AD7418 is not set | ||
| 708 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 709 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 710 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 711 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 712 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 713 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 714 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 715 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 716 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 717 | # CONFIG_SENSORS_DS1621 is not set | ||
| 718 | # CONFIG_SENSORS_I5K_AMB is not set | ||
| 719 | # CONFIG_SENSORS_F71805F is not set | ||
| 720 | # CONFIG_SENSORS_F71882FG is not set | ||
| 721 | # CONFIG_SENSORS_F75375S is not set | ||
| 722 | # CONFIG_SENSORS_GL518SM is not set | ||
| 723 | # CONFIG_SENSORS_GL520SM is not set | ||
| 724 | # CONFIG_SENSORS_IT87 is not set | ||
| 725 | # CONFIG_SENSORS_LM63 is not set | ||
| 726 | # CONFIG_SENSORS_LM75 is not set | ||
| 727 | # CONFIG_SENSORS_LM77 is not set | ||
| 728 | # CONFIG_SENSORS_LM78 is not set | ||
| 729 | # CONFIG_SENSORS_LM80 is not set | ||
| 730 | # CONFIG_SENSORS_LM83 is not set | ||
| 731 | # CONFIG_SENSORS_LM85 is not set | ||
| 732 | # CONFIG_SENSORS_LM87 is not set | ||
| 733 | # CONFIG_SENSORS_LM90 is not set | ||
| 734 | # CONFIG_SENSORS_LM92 is not set | ||
| 735 | # CONFIG_SENSORS_LM93 is not set | ||
| 736 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 737 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 738 | # CONFIG_SENSORS_PC87360 is not set | ||
| 739 | # CONFIG_SENSORS_PC87427 is not set | ||
| 740 | # CONFIG_SENSORS_SIS5595 is not set | ||
| 741 | # CONFIG_SENSORS_DME1737 is not set | ||
| 742 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 743 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 744 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 745 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 746 | # CONFIG_SENSORS_THMC50 is not set | ||
| 747 | # CONFIG_SENSORS_VIA686A is not set | ||
| 748 | # CONFIG_SENSORS_VT1211 is not set | ||
| 749 | # CONFIG_SENSORS_VT8231 is not set | ||
| 750 | # CONFIG_SENSORS_W83781D is not set | ||
| 751 | # CONFIG_SENSORS_W83791D is not set | ||
| 752 | # CONFIG_SENSORS_W83792D is not set | ||
| 753 | # CONFIG_SENSORS_W83793 is not set | ||
| 754 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 755 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 756 | # CONFIG_SENSORS_W83627HF is not set | ||
| 757 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 758 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 759 | CONFIG_THERMAL=y | ||
| 760 | CONFIG_WATCHDOG=y | ||
| 761 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 762 | |||
| 763 | # | ||
| 764 | # Watchdog Device Drivers | ||
| 765 | # | ||
| 766 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 767 | CONFIG_83xx_WDT=y | ||
| 768 | |||
| 769 | # | ||
| 770 | # PCI-based Watchdog Cards | ||
| 771 | # | ||
| 772 | # CONFIG_PCIPCWATCHDOG is not set | ||
| 773 | # CONFIG_WDTPCI is not set | ||
| 774 | |||
| 775 | # | ||
| 776 | # USB-based Watchdog Cards | ||
| 777 | # | ||
| 778 | # CONFIG_USBPCWATCHDOG is not set | ||
| 779 | |||
| 780 | # | ||
| 781 | # Sonics Silicon Backplane | ||
| 782 | # | ||
| 783 | CONFIG_SSB_POSSIBLE=y | ||
| 784 | # CONFIG_SSB is not set | ||
| 785 | |||
| 786 | # | ||
| 787 | # Multifunction device drivers | ||
| 788 | # | ||
| 789 | # CONFIG_MFD_SM501 is not set | ||
| 790 | |||
| 791 | # | ||
| 792 | # Multimedia devices | ||
| 793 | # | ||
| 794 | # CONFIG_VIDEO_DEV is not set | ||
| 795 | # CONFIG_DVB_CORE is not set | ||
| 796 | CONFIG_DAB=y | ||
| 797 | # CONFIG_USB_DABUSB is not set | ||
| 798 | |||
| 799 | # | ||
| 800 | # Graphics support | ||
| 801 | # | ||
| 802 | # CONFIG_AGP is not set | ||
| 803 | # CONFIG_DRM is not set | ||
| 804 | # CONFIG_VGASTATE is not set | ||
| 805 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 806 | # CONFIG_FB is not set | ||
| 807 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 808 | |||
| 809 | # | ||
| 810 | # Display device support | ||
| 811 | # | ||
| 812 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 813 | |||
| 814 | # | ||
| 815 | # Sound | ||
| 816 | # | ||
| 817 | # CONFIG_SOUND is not set | ||
| 818 | # CONFIG_HID_SUPPORT is not set | ||
| 819 | CONFIG_USB_SUPPORT=y | ||
| 820 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 821 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 822 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 823 | CONFIG_USB=y | ||
| 824 | # CONFIG_USB_DEBUG is not set | ||
| 825 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 826 | |||
| 827 | # | ||
| 828 | # Miscellaneous USB options | ||
| 829 | # | ||
| 830 | # CONFIG_USB_DEVICEFS is not set | ||
| 831 | CONFIG_USB_DEVICE_CLASS=y | ||
| 832 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 833 | # CONFIG_USB_OTG is not set | ||
| 834 | |||
| 835 | # | ||
| 836 | # USB Host Controller Drivers | ||
| 837 | # | ||
| 838 | CONFIG_USB_EHCI_HCD=y | ||
| 839 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
| 840 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 841 | CONFIG_USB_EHCI_FSL=y | ||
| 842 | CONFIG_USB_EHCI_HCD_PPC_OF=y | ||
| 843 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 844 | # CONFIG_USB_OHCI_HCD is not set | ||
| 845 | # CONFIG_USB_UHCI_HCD is not set | ||
| 846 | # CONFIG_USB_SL811_HCD is not set | ||
| 847 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 848 | |||
| 849 | # | ||
| 850 | # USB Device Class drivers | ||
| 851 | # | ||
| 852 | # CONFIG_USB_ACM is not set | ||
| 853 | # CONFIG_USB_PRINTER is not set | ||
| 854 | |||
| 855 | # | ||
| 856 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
| 857 | # | ||
| 858 | |||
| 859 | # | ||
| 860 | # may also be needed; see USB_STORAGE Help for more information | ||
| 861 | # | ||
| 862 | # CONFIG_USB_LIBUSUAL is not set | ||
| 863 | |||
| 864 | # | ||
| 865 | # USB Imaging devices | ||
| 866 | # | ||
| 867 | # CONFIG_USB_MDC800 is not set | ||
| 868 | CONFIG_USB_MON=y | ||
| 869 | |||
| 870 | # | ||
| 871 | # USB port drivers | ||
| 872 | # | ||
| 873 | # CONFIG_USB_SERIAL is not set | ||
| 874 | |||
| 875 | # | ||
| 876 | # USB Miscellaneous drivers | ||
| 877 | # | ||
| 878 | # CONFIG_USB_EMI62 is not set | ||
| 879 | # CONFIG_USB_EMI26 is not set | ||
| 880 | # CONFIG_USB_ADUTUX is not set | ||
| 881 | # CONFIG_USB_AUERSWALD is not set | ||
| 882 | # CONFIG_USB_RIO500 is not set | ||
| 883 | # CONFIG_USB_LEGOTOWER is not set | ||
| 884 | # CONFIG_USB_LCD is not set | ||
| 885 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 886 | # CONFIG_USB_LED is not set | ||
| 887 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 888 | # CONFIG_USB_CYTHERM is not set | ||
| 889 | # CONFIG_USB_PHIDGET is not set | ||
| 890 | # CONFIG_USB_IDMOUSE is not set | ||
| 891 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 892 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 893 | # CONFIG_USB_SISUSBVGA is not set | ||
| 894 | # CONFIG_USB_LD is not set | ||
| 895 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 896 | # CONFIG_USB_IOWARRIOR is not set | ||
| 897 | # CONFIG_USB_GADGET is not set | ||
| 898 | # CONFIG_MMC is not set | ||
| 899 | # CONFIG_MEMSTICK is not set | ||
| 900 | # CONFIG_NEW_LEDS is not set | ||
| 901 | # CONFIG_INFINIBAND is not set | ||
| 902 | # CONFIG_EDAC is not set | ||
| 903 | CONFIG_RTC_LIB=y | ||
| 904 | CONFIG_RTC_CLASS=y | ||
| 905 | |||
| 906 | # | ||
| 907 | # Conflicting RTC option has been selected, check GEN_RTC and RTC | ||
| 908 | # | ||
| 909 | CONFIG_RTC_HCTOSYS=y | ||
| 910 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 911 | # CONFIG_RTC_DEBUG is not set | ||
| 912 | |||
| 913 | # | ||
| 914 | # RTC interfaces | ||
| 915 | # | ||
| 916 | CONFIG_RTC_INTF_SYSFS=y | ||
| 917 | CONFIG_RTC_INTF_PROC=y | ||
| 918 | CONFIG_RTC_INTF_DEV=y | ||
| 919 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 920 | # CONFIG_RTC_DRV_TEST is not set | ||
| 921 | |||
| 922 | # | ||
| 923 | # I2C RTC drivers | ||
| 924 | # | ||
| 925 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 926 | CONFIG_RTC_DRV_DS1374=y | ||
| 927 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 928 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 929 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 930 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 931 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 932 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 933 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 934 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 935 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 936 | |||
| 937 | # | ||
| 938 | # SPI RTC drivers | ||
| 939 | # | ||
| 940 | |||
| 941 | # | ||
| 942 | # Platform RTC drivers | ||
| 943 | # | ||
| 944 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 945 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 946 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 947 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 948 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 949 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 950 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 951 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 952 | |||
| 953 | # | ||
| 954 | # on-CPU RTC drivers | ||
| 955 | # | ||
| 956 | # CONFIG_DMADEVICES is not set | ||
| 957 | |||
| 958 | # | ||
| 959 | # Userspace I/O | ||
| 960 | # | ||
| 961 | # CONFIG_UIO is not set | ||
| 962 | |||
| 963 | # | ||
| 964 | # File systems | ||
| 965 | # | ||
| 966 | CONFIG_EXT2_FS=y | ||
| 967 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 968 | # CONFIG_EXT2_FS_XIP is not set | ||
| 969 | CONFIG_EXT3_FS=y | ||
| 970 | CONFIG_EXT3_FS_XATTR=y | ||
| 971 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 972 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 973 | # CONFIG_EXT4DEV_FS is not set | ||
| 974 | CONFIG_JBD=y | ||
| 975 | CONFIG_FS_MBCACHE=y | ||
| 976 | # CONFIG_REISERFS_FS is not set | ||
| 977 | # CONFIG_JFS_FS is not set | ||
| 978 | # CONFIG_FS_POSIX_ACL is not set | ||
| 979 | # CONFIG_XFS_FS is not set | ||
| 980 | # CONFIG_GFS2_FS is not set | ||
| 981 | # CONFIG_OCFS2_FS is not set | ||
| 982 | CONFIG_DNOTIFY=y | ||
| 983 | CONFIG_INOTIFY=y | ||
| 984 | CONFIG_INOTIFY_USER=y | ||
| 985 | # CONFIG_QUOTA is not set | ||
| 986 | # CONFIG_AUTOFS_FS is not set | ||
| 987 | # CONFIG_AUTOFS4_FS is not set | ||
| 988 | # CONFIG_FUSE_FS is not set | ||
| 989 | |||
| 990 | # | ||
| 991 | # CD-ROM/DVD Filesystems | ||
| 992 | # | ||
| 993 | # CONFIG_ISO9660_FS is not set | ||
| 994 | # CONFIG_UDF_FS is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # DOS/FAT/NT Filesystems | ||
| 998 | # | ||
| 999 | # CONFIG_MSDOS_FS is not set | ||
| 1000 | # CONFIG_VFAT_FS is not set | ||
| 1001 | # CONFIG_NTFS_FS is not set | ||
| 1002 | |||
| 1003 | # | ||
| 1004 | # Pseudo filesystems | ||
| 1005 | # | ||
| 1006 | CONFIG_PROC_FS=y | ||
| 1007 | CONFIG_PROC_KCORE=y | ||
| 1008 | CONFIG_PROC_SYSCTL=y | ||
| 1009 | CONFIG_SYSFS=y | ||
| 1010 | CONFIG_TMPFS=y | ||
| 1011 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1012 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1013 | # CONFIG_CONFIGFS_FS is not set | ||
| 1014 | |||
| 1015 | # | ||
| 1016 | # Miscellaneous filesystems | ||
| 1017 | # | ||
| 1018 | # CONFIG_ADFS_FS is not set | ||
| 1019 | # CONFIG_AFFS_FS is not set | ||
| 1020 | # CONFIG_HFS_FS is not set | ||
| 1021 | # CONFIG_HFSPLUS_FS is not set | ||
| 1022 | # CONFIG_BEFS_FS is not set | ||
| 1023 | # CONFIG_BFS_FS is not set | ||
| 1024 | # CONFIG_EFS_FS is not set | ||
| 1025 | CONFIG_JFFS2_FS=y | ||
| 1026 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 1027 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 1028 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 1029 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 1030 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 1031 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 1032 | CONFIG_JFFS2_ZLIB=y | ||
| 1033 | # CONFIG_JFFS2_LZO is not set | ||
| 1034 | CONFIG_JFFS2_RTIME=y | ||
| 1035 | # CONFIG_JFFS2_RUBIN is not set | ||
| 1036 | # CONFIG_CRAMFS is not set | ||
| 1037 | # CONFIG_VXFS_FS is not set | ||
| 1038 | # CONFIG_MINIX_FS is not set | ||
| 1039 | # CONFIG_HPFS_FS is not set | ||
| 1040 | # CONFIG_QNX4FS_FS is not set | ||
| 1041 | # CONFIG_ROMFS_FS is not set | ||
| 1042 | # CONFIG_SYSV_FS is not set | ||
| 1043 | # CONFIG_UFS_FS is not set | ||
| 1044 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1045 | CONFIG_NFS_FS=y | ||
| 1046 | CONFIG_NFS_V3=y | ||
| 1047 | # CONFIG_NFS_V3_ACL is not set | ||
| 1048 | CONFIG_NFS_V4=y | ||
| 1049 | # CONFIG_NFS_DIRECTIO is not set | ||
| 1050 | # CONFIG_NFSD is not set | ||
| 1051 | CONFIG_ROOT_NFS=y | ||
| 1052 | CONFIG_LOCKD=y | ||
| 1053 | CONFIG_LOCKD_V4=y | ||
| 1054 | CONFIG_NFS_COMMON=y | ||
| 1055 | CONFIG_SUNRPC=y | ||
| 1056 | CONFIG_SUNRPC_GSS=y | ||
| 1057 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 1058 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 1059 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1060 | # CONFIG_SMB_FS is not set | ||
| 1061 | # CONFIG_CIFS is not set | ||
| 1062 | # CONFIG_NCP_FS is not set | ||
| 1063 | # CONFIG_CODA_FS is not set | ||
| 1064 | # CONFIG_AFS_FS is not set | ||
| 1065 | |||
| 1066 | # | ||
| 1067 | # Partition Types | ||
| 1068 | # | ||
| 1069 | CONFIG_PARTITION_ADVANCED=y | ||
| 1070 | # CONFIG_ACORN_PARTITION is not set | ||
| 1071 | # CONFIG_OSF_PARTITION is not set | ||
| 1072 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1073 | # CONFIG_ATARI_PARTITION is not set | ||
| 1074 | # CONFIG_MAC_PARTITION is not set | ||
| 1075 | # CONFIG_MSDOS_PARTITION is not set | ||
| 1076 | # CONFIG_LDM_PARTITION is not set | ||
| 1077 | # CONFIG_SGI_PARTITION is not set | ||
| 1078 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1079 | # CONFIG_SUN_PARTITION is not set | ||
| 1080 | # CONFIG_KARMA_PARTITION is not set | ||
| 1081 | # CONFIG_EFI_PARTITION is not set | ||
| 1082 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1083 | CONFIG_NLS=y | ||
| 1084 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1085 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 1086 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1087 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1088 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1089 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1090 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1091 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1092 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1093 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1094 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1095 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1096 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1097 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1098 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1099 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1100 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1101 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1102 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1103 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1104 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1105 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1106 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1107 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1108 | # CONFIG_NLS_ASCII is not set | ||
| 1109 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 1110 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1111 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1112 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1113 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1114 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1115 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1116 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1117 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1118 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1119 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1120 | # CONFIG_NLS_KOI8_R is not set | ||
| 1121 | # CONFIG_NLS_KOI8_U is not set | ||
| 1122 | # CONFIG_NLS_UTF8 is not set | ||
| 1123 | # CONFIG_DLM is not set | ||
| 1124 | |||
| 1125 | # | ||
| 1126 | # Library routines | ||
| 1127 | # | ||
| 1128 | CONFIG_BITREVERSE=y | ||
| 1129 | # CONFIG_CRC_CCITT is not set | ||
| 1130 | # CONFIG_CRC16 is not set | ||
| 1131 | # CONFIG_CRC_ITU_T is not set | ||
| 1132 | CONFIG_CRC32=y | ||
| 1133 | # CONFIG_CRC7 is not set | ||
| 1134 | # CONFIG_LIBCRC32C is not set | ||
| 1135 | CONFIG_ZLIB_INFLATE=y | ||
| 1136 | CONFIG_ZLIB_DEFLATE=y | ||
| 1137 | CONFIG_PLIST=y | ||
| 1138 | CONFIG_HAS_IOMEM=y | ||
| 1139 | CONFIG_HAS_IOPORT=y | ||
| 1140 | CONFIG_HAS_DMA=y | ||
| 1141 | CONFIG_HAVE_LMB=y | ||
| 1142 | |||
| 1143 | # | ||
| 1144 | # Kernel hacking | ||
| 1145 | # | ||
| 1146 | # CONFIG_PRINTK_TIME is not set | ||
| 1147 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1148 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1149 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1150 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1151 | # CONFIG_DEBUG_FS is not set | ||
| 1152 | # CONFIG_HEADERS_CHECK is not set | ||
| 1153 | # CONFIG_DEBUG_KERNEL is not set | ||
| 1154 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1155 | # CONFIG_SLUB_STATS is not set | ||
| 1156 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1157 | # CONFIG_SAMPLES is not set | ||
| 1158 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
| 1159 | |||
| 1160 | # | ||
| 1161 | # Security options | ||
| 1162 | # | ||
| 1163 | # CONFIG_KEYS is not set | ||
| 1164 | # CONFIG_SECURITY is not set | ||
| 1165 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1166 | CONFIG_CRYPTO=y | ||
| 1167 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1168 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1169 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1170 | CONFIG_CRYPTO_MANAGER=y | ||
| 1171 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1172 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1173 | # CONFIG_CRYPTO_NULL is not set | ||
| 1174 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1175 | CONFIG_CRYPTO_MD5=y | ||
| 1176 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1177 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1178 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1179 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1180 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1181 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1182 | CONFIG_CRYPTO_ECB=m | ||
| 1183 | CONFIG_CRYPTO_CBC=y | ||
| 1184 | CONFIG_CRYPTO_PCBC=m | ||
| 1185 | # CONFIG_CRYPTO_LRW is not set | ||
| 1186 | # CONFIG_CRYPTO_XTS is not set | ||
| 1187 | # CONFIG_CRYPTO_CTR is not set | ||
| 1188 | # CONFIG_CRYPTO_GCM is not set | ||
| 1189 | # CONFIG_CRYPTO_CCM is not set | ||
| 1190 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1191 | CONFIG_CRYPTO_DES=y | ||
| 1192 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1193 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1194 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1195 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1196 | # CONFIG_CRYPTO_AES is not set | ||
| 1197 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1198 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1199 | # CONFIG_CRYPTO_TEA is not set | ||
| 1200 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1201 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1202 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1203 | # CONFIG_CRYPTO_SEED is not set | ||
| 1204 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1205 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1206 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1207 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1208 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1209 | # CONFIG_CRYPTO_TEST is not set | ||
| 1210 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1211 | # CONFIG_CRYPTO_LZO is not set | ||
| 1212 | CONFIG_CRYPTO_HW=y | ||
| 1213 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
| 1214 | # CONFIG_PPC_CLOCK is not set | ||
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index ec9228d687b0..8655c7670350 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c | |||
| @@ -52,6 +52,10 @@ | |||
| 52 | #include <asm/iseries/alpaca.h> | 52 | #include <asm/iseries/alpaca.h> |
| 53 | #endif | 53 | #endif |
| 54 | 54 | ||
| 55 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
| 56 | #include "head_booke.h" | ||
| 57 | #endif | ||
| 58 | |||
| 55 | int main(void) | 59 | int main(void) |
| 56 | { | 60 | { |
| 57 | DEFINE(THREAD, offsetof(struct task_struct, thread)); | 61 | DEFINE(THREAD, offsetof(struct task_struct, thread)); |
| @@ -242,6 +246,25 @@ int main(void) | |||
| 242 | DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8); | 246 | DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8); |
| 243 | #endif /* CONFIG_PPC64 */ | 247 | #endif /* CONFIG_PPC64 */ |
| 244 | 248 | ||
| 249 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
| 250 | DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE); | ||
| 251 | DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0)); | ||
| 252 | /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */ | ||
| 253 | DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0)); | ||
| 254 | DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1)); | ||
| 255 | DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2)); | ||
| 256 | DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3)); | ||
| 257 | DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6)); | ||
| 258 | DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7)); | ||
| 259 | DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0)); | ||
| 260 | DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1)); | ||
| 261 | DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0)); | ||
| 262 | DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1)); | ||
| 263 | DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0)); | ||
| 264 | DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1)); | ||
| 265 | DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit)); | ||
| 266 | #endif | ||
| 267 | |||
| 245 | DEFINE(CLONE_VM, CLONE_VM); | 268 | DEFINE(CLONE_VM, CLONE_VM); |
| 246 | DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); | 269 | DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); |
| 247 | 270 | ||
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 0c8614d9875c..fe21674d4f06 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S | |||
| @@ -44,29 +44,54 @@ | |||
| 44 | #endif | 44 | #endif |
| 45 | 45 | ||
| 46 | #ifdef CONFIG_BOOKE | 46 | #ifdef CONFIG_BOOKE |
| 47 | #include "head_booke.h" | ||
| 48 | #define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \ | ||
| 49 | mtspr exc_level##_SPRG,r8; \ | ||
| 50 | BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \ | ||
| 51 | lwz r0,GPR10-INT_FRAME_SIZE(r8); \ | ||
| 52 | stw r0,GPR10(r11); \ | ||
| 53 | lwz r0,GPR11-INT_FRAME_SIZE(r8); \ | ||
| 54 | stw r0,GPR11(r11); \ | ||
| 55 | mfspr r8,exc_level##_SPRG | ||
| 56 | |||
| 57 | .globl mcheck_transfer_to_handler | 47 | .globl mcheck_transfer_to_handler |
| 58 | mcheck_transfer_to_handler: | 48 | mcheck_transfer_to_handler: |
| 59 | TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK) | 49 | mfspr r0,SPRN_DSRR0 |
| 60 | b transfer_to_handler_full | 50 | stw r0,_DSRR0(r11) |
| 51 | mfspr r0,SPRN_DSRR1 | ||
| 52 | stw r0,_DSRR1(r11) | ||
| 53 | /* fall through */ | ||
| 61 | 54 | ||
| 62 | .globl debug_transfer_to_handler | 55 | .globl debug_transfer_to_handler |
| 63 | debug_transfer_to_handler: | 56 | debug_transfer_to_handler: |
| 64 | TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG) | 57 | mfspr r0,SPRN_CSRR0 |
| 65 | b transfer_to_handler_full | 58 | stw r0,_CSRR0(r11) |
| 59 | mfspr r0,SPRN_CSRR1 | ||
| 60 | stw r0,_CSRR1(r11) | ||
| 61 | /* fall through */ | ||
| 66 | 62 | ||
| 67 | .globl crit_transfer_to_handler | 63 | .globl crit_transfer_to_handler |
| 68 | crit_transfer_to_handler: | 64 | crit_transfer_to_handler: |
| 69 | TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT) | 65 | #ifdef CONFIG_FSL_BOOKE |
| 66 | mfspr r0,SPRN_MAS0 | ||
| 67 | stw r0,MAS0(r11) | ||
| 68 | mfspr r0,SPRN_MAS1 | ||
| 69 | stw r0,MAS1(r11) | ||
| 70 | mfspr r0,SPRN_MAS2 | ||
| 71 | stw r0,MAS2(r11) | ||
| 72 | mfspr r0,SPRN_MAS3 | ||
| 73 | stw r0,MAS3(r11) | ||
| 74 | mfspr r0,SPRN_MAS6 | ||
| 75 | stw r0,MAS6(r11) | ||
| 76 | #ifdef CONFIG_PHYS_64BIT | ||
| 77 | mfspr r0,SPRN_MAS7 | ||
| 78 | stw r0,MAS7(r11) | ||
| 79 | #endif /* CONFIG_PHYS_64BIT */ | ||
| 80 | #endif /* CONFIG_FSL_BOOKE */ | ||
| 81 | #ifdef CONFIG_44x | ||
| 82 | mfspr r0,SPRN_MMUCR | ||
| 83 | stw r0,MMUCR(r11) | ||
| 84 | #endif | ||
| 85 | mfspr r0,SPRN_SRR0 | ||
| 86 | stw r0,_SRR0(r11) | ||
| 87 | mfspr r0,SPRN_SRR1 | ||
| 88 | stw r0,_SRR1(r11) | ||
| 89 | |||
| 90 | mfspr r8,SPRN_SPRG3 | ||
| 91 | lwz r0,KSP_LIMIT(r8) | ||
| 92 | stw r0,SAVED_KSP_LIMIT(r11) | ||
| 93 | rlwimi r0,r1,0,0,(31-THREAD_SHIFT) | ||
| 94 | stw r0,KSP_LIMIT(r8) | ||
| 70 | /* fall through */ | 95 | /* fall through */ |
| 71 | #endif | 96 | #endif |
| 72 | 97 | ||
| @@ -77,6 +102,16 @@ crit_transfer_to_handler: | |||
| 77 | stw r0,GPR10(r11) | 102 | stw r0,GPR10(r11) |
| 78 | lwz r0,crit_r11@l(0) | 103 | lwz r0,crit_r11@l(0) |
| 79 | stw r0,GPR11(r11) | 104 | stw r0,GPR11(r11) |
| 105 | mfspr r0,SPRN_SRR0 | ||
| 106 | stw r0,crit_srr0@l(0) | ||
| 107 | mfspr r0,SPRN_SRR1 | ||
| 108 | stw r0,crit_srr1@l(0) | ||
| 109 | |||
| 110 | mfspr r8,SPRN_SPRG3 | ||
| 111 | lwz r0,KSP_LIMIT(r8) | ||
| 112 | stw r0,saved_ksp_limit@l(0) | ||
| 113 | rlwimi r0,r1,0,0,(31-THREAD_SHIFT) | ||
| 114 | stw r0,KSP_LIMIT(r8) | ||
| 80 | /* fall through */ | 115 | /* fall through */ |
| 81 | #endif | 116 | #endif |
| 82 | 117 | ||
| @@ -147,6 +182,7 @@ transfer_to_handler: | |||
| 147 | lwz r12,TI_LOCAL_FLAGS(r9) | 182 | lwz r12,TI_LOCAL_FLAGS(r9) |
| 148 | mtcrf 0x01,r12 | 183 | mtcrf 0x01,r12 |
| 149 | bt- 31-TLF_NAPPING,4f | 184 | bt- 31-TLF_NAPPING,4f |
| 185 | bt- 31-TLF_SLEEPING,7f | ||
| 150 | #endif /* CONFIG_6xx */ | 186 | #endif /* CONFIG_6xx */ |
| 151 | .globl transfer_to_handler_cont | 187 | .globl transfer_to_handler_cont |
| 152 | transfer_to_handler_cont: | 188 | transfer_to_handler_cont: |
| @@ -164,6 +200,13 @@ transfer_to_handler_cont: | |||
| 164 | 4: rlwinm r12,r12,0,~_TLF_NAPPING | 200 | 4: rlwinm r12,r12,0,~_TLF_NAPPING |
| 165 | stw r12,TI_LOCAL_FLAGS(r9) | 201 | stw r12,TI_LOCAL_FLAGS(r9) |
| 166 | b power_save_6xx_restore | 202 | b power_save_6xx_restore |
| 203 | |||
| 204 | 7: rlwinm r12,r12,0,~_TLF_SLEEPING | ||
| 205 | stw r12,TI_LOCAL_FLAGS(r9) | ||
| 206 | lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */ | ||
| 207 | rlwinm r9,r9,0,~MSR_EE | ||
| 208 | lwz r12,_LINK(r11) /* and return to address in LR */ | ||
| 209 | b fast_exception_return | ||
| 167 | #endif | 210 | #endif |
| 168 | 211 | ||
| 169 | /* | 212 | /* |
| @@ -668,7 +711,7 @@ user_exc_return: /* r10 contains MSR_KERNEL here */ | |||
| 668 | /* Check current_thread_info()->flags */ | 711 | /* Check current_thread_info()->flags */ |
| 669 | rlwinm r9,r1,0,0,(31-THREAD_SHIFT) | 712 | rlwinm r9,r1,0,0,(31-THREAD_SHIFT) |
| 670 | lwz r9,TI_FLAGS(r9) | 713 | lwz r9,TI_FLAGS(r9) |
| 671 | andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED) | 714 | andi. r0,r9,_TIF_USER_WORK_MASK |
| 672 | bne do_work | 715 | bne do_work |
| 673 | 716 | ||
| 674 | restore_user: | 717 | restore_user: |
| @@ -859,17 +902,90 @@ exc_exit_restart_end: | |||
| 859 | exc_lvl_rfi; \ | 902 | exc_lvl_rfi; \ |
| 860 | b .; /* prevent prefetch past exc_lvl_rfi */ | 903 | b .; /* prevent prefetch past exc_lvl_rfi */ |
| 861 | 904 | ||
| 905 | #define RESTORE_xSRR(exc_lvl_srr0, exc_lvl_srr1) \ | ||
| 906 | lwz r9,_##exc_lvl_srr0(r1); \ | ||
| 907 | lwz r10,_##exc_lvl_srr1(r1); \ | ||
| 908 | mtspr SPRN_##exc_lvl_srr0,r9; \ | ||
| 909 | mtspr SPRN_##exc_lvl_srr1,r10; | ||
| 910 | |||
| 911 | #if defined(CONFIG_FSL_BOOKE) | ||
| 912 | #ifdef CONFIG_PHYS_64BIT | ||
| 913 | #define RESTORE_MAS7 \ | ||
| 914 | lwz r11,MAS7(r1); \ | ||
| 915 | mtspr SPRN_MAS7,r11; | ||
| 916 | #else | ||
| 917 | #define RESTORE_MAS7 | ||
| 918 | #endif /* CONFIG_PHYS_64BIT */ | ||
| 919 | #define RESTORE_MMU_REGS \ | ||
| 920 | lwz r9,MAS0(r1); \ | ||
| 921 | lwz r10,MAS1(r1); \ | ||
| 922 | lwz r11,MAS2(r1); \ | ||
| 923 | mtspr SPRN_MAS0,r9; \ | ||
| 924 | lwz r9,MAS3(r1); \ | ||
| 925 | mtspr SPRN_MAS1,r10; \ | ||
| 926 | lwz r10,MAS6(r1); \ | ||
| 927 | mtspr SPRN_MAS2,r11; \ | ||
| 928 | mtspr SPRN_MAS3,r9; \ | ||
| 929 | mtspr SPRN_MAS6,r10; \ | ||
| 930 | RESTORE_MAS7; | ||
| 931 | #elif defined(CONFIG_44x) | ||
| 932 | #define RESTORE_MMU_REGS \ | ||
| 933 | lwz r9,MMUCR(r1); \ | ||
| 934 | mtspr SPRN_MMUCR,r9; | ||
| 935 | #else | ||
| 936 | #define RESTORE_MMU_REGS | ||
| 937 | #endif | ||
| 938 | |||
| 939 | #ifdef CONFIG_40x | ||
| 862 | .globl ret_from_crit_exc | 940 | .globl ret_from_crit_exc |
| 863 | ret_from_crit_exc: | 941 | ret_from_crit_exc: |
| 942 | mfspr r9,SPRN_SPRG3 | ||
| 943 | lis r10,saved_ksp_limit@ha; | ||
| 944 | lwz r10,saved_ksp_limit@l(r10); | ||
| 945 | tovirt(r9,r9); | ||
| 946 | stw r10,KSP_LIMIT(r9) | ||
| 947 | lis r9,crit_srr0@ha; | ||
| 948 | lwz r9,crit_srr0@l(r9); | ||
| 949 | lis r10,crit_srr1@ha; | ||
| 950 | lwz r10,crit_srr1@l(r10); | ||
| 951 | mtspr SPRN_SRR0,r9; | ||
| 952 | mtspr SPRN_SRR1,r10; | ||
| 864 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) | 953 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) |
| 954 | #endif /* CONFIG_40x */ | ||
| 865 | 955 | ||
| 866 | #ifdef CONFIG_BOOKE | 956 | #ifdef CONFIG_BOOKE |
| 957 | .globl ret_from_crit_exc | ||
| 958 | ret_from_crit_exc: | ||
| 959 | mfspr r9,SPRN_SPRG3 | ||
| 960 | lwz r10,SAVED_KSP_LIMIT(r1) | ||
| 961 | stw r10,KSP_LIMIT(r9) | ||
| 962 | RESTORE_xSRR(SRR0,SRR1); | ||
| 963 | RESTORE_MMU_REGS; | ||
| 964 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) | ||
| 965 | |||
| 867 | .globl ret_from_debug_exc | 966 | .globl ret_from_debug_exc |
| 868 | ret_from_debug_exc: | 967 | ret_from_debug_exc: |
| 968 | mfspr r9,SPRN_SPRG3 | ||
| 969 | lwz r10,SAVED_KSP_LIMIT(r1) | ||
| 970 | stw r10,KSP_LIMIT(r9) | ||
| 971 | lwz r9,THREAD_INFO-THREAD(r9) | ||
| 972 | rlwinm r10,r1,0,0,(31-THREAD_SHIFT) | ||
| 973 | lwz r10,TI_PREEMPT(r10) | ||
| 974 | stw r10,TI_PREEMPT(r9) | ||
| 975 | RESTORE_xSRR(SRR0,SRR1); | ||
| 976 | RESTORE_xSRR(CSRR0,CSRR1); | ||
| 977 | RESTORE_MMU_REGS; | ||
| 869 | RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) | 978 | RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) |
| 870 | 979 | ||
| 871 | .globl ret_from_mcheck_exc | 980 | .globl ret_from_mcheck_exc |
| 872 | ret_from_mcheck_exc: | 981 | ret_from_mcheck_exc: |
| 982 | mfspr r9,SPRN_SPRG3 | ||
| 983 | lwz r10,SAVED_KSP_LIMIT(r1) | ||
| 984 | stw r10,KSP_LIMIT(r9) | ||
| 985 | RESTORE_xSRR(SRR0,SRR1); | ||
| 986 | RESTORE_xSRR(CSRR0,CSRR1); | ||
| 987 | RESTORE_xSRR(DSRR0,DSRR1); | ||
| 988 | RESTORE_MMU_REGS; | ||
| 873 | RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) | 989 | RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) |
| 874 | #endif /* CONFIG_BOOKE */ | 990 | #endif /* CONFIG_BOOKE */ |
| 875 | 991 | ||
| @@ -925,7 +1041,7 @@ recheck: | |||
| 925 | lwz r9,TI_FLAGS(r9) | 1041 | lwz r9,TI_FLAGS(r9) |
| 926 | andi. r0,r9,_TIF_NEED_RESCHED | 1042 | andi. r0,r9,_TIF_NEED_RESCHED |
| 927 | bne- do_resched | 1043 | bne- do_resched |
| 928 | andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK | 1044 | andi. r0,r9,_TIF_USER_WORK_MASK |
| 929 | beq restore_user | 1045 | beq restore_user |
| 930 | do_user_signal: /* r10 contains MSR_KERNEL here */ | 1046 | do_user_signal: /* r10 contains MSR_KERNEL here */ |
| 931 | ori r10,r10,MSR_EE | 1047 | ori r10,r10,MSR_EE |
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 8552e67e3a8b..56d8e5d90c5b 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S | |||
| @@ -93,6 +93,12 @@ _ENTRY(crit_r10) | |||
| 93 | .space 4 | 93 | .space 4 |
| 94 | _ENTRY(crit_r11) | 94 | _ENTRY(crit_r11) |
| 95 | .space 4 | 95 | .space 4 |
| 96 | _ENTRY(crit_srr0) | ||
| 97 | .space 4 | ||
| 98 | _ENTRY(crit_srr1) | ||
| 99 | .space 4 | ||
| 100 | _ENTRY(saved_ksp_limit) | ||
| 101 | .space 4 | ||
| 96 | 102 | ||
| 97 | /* | 103 | /* |
| 98 | * Exception vector entry code. This code runs with address translation | 104 | * Exception vector entry code. This code runs with address translation |
| @@ -148,14 +154,14 @@ _ENTRY(crit_r11) | |||
| 148 | mfcr r10; /* save CR in r10 for now */\ | 154 | mfcr r10; /* save CR in r10 for now */\ |
| 149 | mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ | 155 | mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ |
| 150 | andi. r11,r11,MSR_PR; \ | 156 | andi. r11,r11,MSR_PR; \ |
| 151 | lis r11,critical_stack_top@h; \ | 157 | lis r11,critirq_ctx@ha; \ |
| 152 | ori r11,r11,critical_stack_top@l; \ | 158 | tophys(r11,r11); \ |
| 159 | lwz r11,critirq_ctx@l(r11); \ | ||
| 153 | beq 1f; \ | 160 | beq 1f; \ |
| 154 | /* COMING FROM USER MODE */ \ | 161 | /* COMING FROM USER MODE */ \ |
| 155 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ | 162 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ |
| 156 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ | 163 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ |
| 157 | addi r11,r11,THREAD_SIZE; \ | 164 | 1: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\ |
| 158 | 1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ | ||
| 159 | tophys(r11,r11); \ | 165 | tophys(r11,r11); \ |
| 160 | stw r10,_CCR(r11); /* save various registers */\ | 166 | stw r10,_CCR(r11); /* save various registers */\ |
| 161 | stw r12,GPR12(r11); \ | 167 | stw r12,GPR12(r11); \ |
| @@ -996,16 +1002,6 @@ empty_zero_page: | |||
| 996 | swapper_pg_dir: | 1002 | swapper_pg_dir: |
| 997 | .space PGD_TABLE_SIZE | 1003 | .space PGD_TABLE_SIZE |
| 998 | 1004 | ||
| 999 | |||
| 1000 | /* Stack for handling critical exceptions from kernel mode */ | ||
| 1001 | .section .bss | ||
| 1002 | .align 12 | ||
| 1003 | exception_stack_bottom: | ||
| 1004 | .space 4096 | ||
| 1005 | critical_stack_top: | ||
| 1006 | .globl exception_stack_top | ||
| 1007 | exception_stack_top: | ||
| 1008 | |||
| 1009 | /* Room for two PTE pointers, usually the kernel and current user pointers | 1005 | /* Room for two PTE pointers, usually the kernel and current user pointers |
| 1010 | * to their respective root page table. | 1006 | * to their respective root page table. |
| 1011 | */ | 1007 | */ |
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index c2b9dc4fce5d..47ea8affad23 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S | |||
| @@ -737,15 +737,6 @@ empty_zero_page: | |||
| 737 | swapper_pg_dir: | 737 | swapper_pg_dir: |
| 738 | .space PGD_TABLE_SIZE | 738 | .space PGD_TABLE_SIZE |
| 739 | 739 | ||
| 740 | /* Reserved 4k for the critical exception stack & 4k for the machine | ||
| 741 | * check stack per CPU for kernel mode exceptions */ | ||
| 742 | .section .bss | ||
| 743 | .align 12 | ||
| 744 | exception_stack_bottom: | ||
| 745 | .space BOOKE_EXCEPTION_STACK_SIZE | ||
| 746 | .globl exception_stack_top | ||
| 747 | exception_stack_top: | ||
| 748 | |||
| 749 | /* | 740 | /* |
| 750 | * Room for two PTE pointers, usually the kernel and current user pointers | 741 | * Room for two PTE pointers, usually the kernel and current user pointers |
| 751 | * to their respective root page table. | 742 | * to their respective root page table. |
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index aefafc6330c9..f277fade1932 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h | |||
| @@ -43,9 +43,7 @@ | |||
| 43 | SAVE_2GPRS(7, r11) | 43 | SAVE_2GPRS(7, r11) |
| 44 | 44 | ||
| 45 | /* To handle the additional exception priority levels on 40x and Book-E | 45 | /* To handle the additional exception priority levels on 40x and Book-E |
| 46 | * processors we allocate a 4k stack per additional priority level. The various | 46 | * processors we allocate a stack per additional priority level. |
| 47 | * head_xxx.S files allocate space (exception_stack_top) for each priority's | ||
| 48 | * stack times the number of CPUs | ||
| 49 | * | 47 | * |
| 50 | * On 40x critical is the only additional level | 48 | * On 40x critical is the only additional level |
| 51 | * On 44x/e500 we have critical and machine check | 49 | * On 44x/e500 we have critical and machine check |
| @@ -61,36 +59,33 @@ | |||
| 61 | * going to critical or their own debug level we aren't currently | 59 | * going to critical or their own debug level we aren't currently |
| 62 | * providing configurations that micro-optimize space usage. | 60 | * providing configurations that micro-optimize space usage. |
| 63 | */ | 61 | */ |
| 64 | #ifdef CONFIG_44x | ||
| 65 | #define NUM_EXCEPTION_LVLS 2 | ||
| 66 | #else | ||
| 67 | #define NUM_EXCEPTION_LVLS 3 | ||
| 68 | #endif | ||
| 69 | #define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS) | ||
| 70 | 62 | ||
| 71 | /* CRIT_SPRG only used in critical exception handling */ | 63 | /* CRIT_SPRG only used in critical exception handling */ |
| 72 | #define CRIT_SPRG SPRN_SPRG2 | 64 | #define CRIT_SPRG SPRN_SPRG2 |
| 73 | /* MCHECK_SPRG only used in machine check exception handling */ | 65 | /* MCHECK_SPRG only used in machine check exception handling */ |
| 74 | #define MCHECK_SPRG SPRN_SPRG6W | 66 | #define MCHECK_SPRG SPRN_SPRG6W |
| 75 | 67 | ||
| 76 | #define MCHECK_STACK_TOP (exception_stack_top - 4096) | 68 | #define MCHECK_STACK_BASE mcheckirq_ctx |
| 77 | #define CRIT_STACK_TOP (exception_stack_top) | 69 | #define CRIT_STACK_BASE critirq_ctx |
| 78 | 70 | ||
| 79 | /* only on e200 for now */ | 71 | /* only on e200 for now */ |
| 80 | #define DEBUG_STACK_TOP (exception_stack_top - 8192) | 72 | #define DEBUG_STACK_BASE dbgirq_ctx |
| 81 | #define DEBUG_SPRG SPRN_SPRG6W | 73 | #define DEBUG_SPRG SPRN_SPRG6W |
| 82 | 74 | ||
| 75 | #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) | ||
| 76 | |||
| 83 | #ifdef CONFIG_SMP | 77 | #ifdef CONFIG_SMP |
| 84 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ | 78 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ |
| 85 | mfspr r8,SPRN_PIR; \ | 79 | mfspr r8,SPRN_PIR; \ |
| 86 | mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \ | 80 | slwi r8,r8,2; \ |
| 87 | neg r8,r8; \ | 81 | addis r8,r8,level##_STACK_BASE@ha; \ |
| 88 | addis r8,r8,level##_STACK_TOP@ha; \ | 82 | lwz r8,level##_STACK_BASE@l(r8); \ |
| 89 | addi r8,r8,level##_STACK_TOP@l | 83 | addi r8,r8,EXC_LVL_FRAME_OVERHEAD; |
| 90 | #else | 84 | #else |
| 91 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ | 85 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ |
| 92 | lis r8,level##_STACK_TOP@h; \ | 86 | lis r8,level##_STACK_BASE@ha; \ |
| 93 | ori r8,r8,level##_STACK_TOP@l | 87 | lwz r8,level##_STACK_BASE@l(r8); \ |
| 88 | addi r8,r8,EXC_LVL_FRAME_OVERHEAD; | ||
| 94 | #endif | 89 | #endif |
| 95 | 90 | ||
| 96 | /* | 91 | /* |
| @@ -104,22 +99,36 @@ | |||
| 104 | #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ | 99 | #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ |
| 105 | mtspr exc_level##_SPRG,r8; \ | 100 | mtspr exc_level##_SPRG,r8; \ |
| 106 | BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ | 101 | BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ |
| 107 | stw r10,GPR10-INT_FRAME_SIZE(r8); \ | 102 | stw r9,GPR9(r8); /* save various registers */\ |
| 108 | stw r11,GPR11-INT_FRAME_SIZE(r8); \ | 103 | mfcr r9; /* save CR in r9 for now */\ |
| 109 | mfcr r10; /* save CR in r10 for now */\ | 104 | stw r10,GPR10(r8); \ |
| 110 | mfspr r11,exc_level_srr1; /* check whether user or kernel */\ | 105 | stw r11,GPR11(r8); \ |
| 111 | andi. r11,r11,MSR_PR; \ | 106 | stw r9,_CCR(r8); /* save CR on stack */\ |
| 112 | mr r11,r8; \ | 107 | mfspr r10,exc_level_srr1; /* check whether user or kernel */\ |
| 113 | mfspr r8,exc_level##_SPRG; \ | 108 | andi. r10,r10,MSR_PR; \ |
| 114 | beq 1f; \ | ||
| 115 | /* COMING FROM USER MODE */ \ | ||
| 116 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ | 109 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ |
| 117 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ | 110 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ |
| 118 | addi r11,r11,THREAD_SIZE; \ | 111 | addi r11,r11,EXC_LVL_FRAME_OVERHEAD; /* allocate stack frame */\ |
| 119 | 1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ | 112 | beq 1f; \ |
| 120 | stw r10,_CCR(r11); /* save various registers */\ | 113 | /* COMING FROM USER MODE */ \ |
| 121 | stw r12,GPR12(r11); \ | 114 | stw r9,_CCR(r11); /* save CR */\ |
| 115 | lwz r10,GPR10(r8); /* copy regs from exception stack */\ | ||
| 116 | lwz r9,GPR9(r8); \ | ||
| 117 | stw r10,GPR10(r11); \ | ||
| 118 | lwz r10,GPR11(r8); \ | ||
| 122 | stw r9,GPR9(r11); \ | 119 | stw r9,GPR9(r11); \ |
| 120 | stw r10,GPR11(r11); \ | ||
| 121 | b 2f; \ | ||
| 122 | /* COMING FROM PRIV MODE */ \ | ||
| 123 | 1: lwz r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r11); \ | ||
| 124 | lwz r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r11); \ | ||
| 125 | stw r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r8); \ | ||
| 126 | stw r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r8); \ | ||
| 127 | lwz r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r11); \ | ||
| 128 | stw r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r8); \ | ||
| 129 | mr r11,r8; \ | ||
| 130 | 2: mfspr r8,exc_level##_SPRG; \ | ||
| 131 | stw r12,GPR12(r11); /* save various registers */\ | ||
| 123 | mflr r10; \ | 132 | mflr r10; \ |
| 124 | stw r10,_LINK(r11); \ | 133 | stw r10,_LINK(r11); \ |
| 125 | mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ | 134 | mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ |
| @@ -262,8 +271,8 @@ label: | |||
| 262 | lwz r12,GPR12(r11); \ | 271 | lwz r12,GPR12(r11); \ |
| 263 | mtspr DEBUG_SPRG,r8; \ | 272 | mtspr DEBUG_SPRG,r8; \ |
| 264 | BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \ | 273 | BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \ |
| 265 | lwz r10,GPR10-INT_FRAME_SIZE(r8); \ | 274 | lwz r10,GPR10(r8); \ |
| 266 | lwz r11,GPR11-INT_FRAME_SIZE(r8); \ | 275 | lwz r11,GPR11(r8); \ |
| 267 | mfspr r8,DEBUG_SPRG; \ | 276 | mfspr r8,DEBUG_SPRG; \ |
| 268 | \ | 277 | \ |
| 269 | RFDI; \ | 278 | RFDI; \ |
| @@ -272,7 +281,7 @@ label: | |||
| 272 | /* continue normal handling for a critical exception... */ \ | 281 | /* continue normal handling for a critical exception... */ \ |
| 273 | 2: mfspr r4,SPRN_DBSR; \ | 282 | 2: mfspr r4,SPRN_DBSR; \ |
| 274 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | 283 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| 275 | EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) | 284 | EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) |
| 276 | 285 | ||
| 277 | #define DEBUG_CRIT_EXCEPTION \ | 286 | #define DEBUG_CRIT_EXCEPTION \ |
| 278 | START_EXCEPTION(DebugCrit); \ | 287 | START_EXCEPTION(DebugCrit); \ |
| @@ -315,8 +324,8 @@ label: | |||
| 315 | lwz r12,GPR12(r11); \ | 324 | lwz r12,GPR12(r11); \ |
| 316 | mtspr CRIT_SPRG,r8; \ | 325 | mtspr CRIT_SPRG,r8; \ |
| 317 | BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ | 326 | BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ |
| 318 | lwz r10,GPR10-INT_FRAME_SIZE(r8); \ | 327 | lwz r10,GPR10(r8); \ |
| 319 | lwz r11,GPR11-INT_FRAME_SIZE(r8); \ | 328 | lwz r11,GPR11(r8); \ |
| 320 | mfspr r8,CRIT_SPRG; \ | 329 | mfspr r8,CRIT_SPRG; \ |
| 321 | \ | 330 | \ |
| 322 | rfci; \ | 331 | rfci; \ |
| @@ -367,4 +376,25 @@ label: | |||
| 367 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | 376 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
| 368 | EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) | 377 | EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) |
| 369 | 378 | ||
| 379 | #ifndef __ASSEMBLY__ | ||
| 380 | struct exception_regs { | ||
| 381 | unsigned long mas0; | ||
| 382 | unsigned long mas1; | ||
| 383 | unsigned long mas2; | ||
| 384 | unsigned long mas3; | ||
| 385 | unsigned long mas6; | ||
| 386 | unsigned long mas7; | ||
| 387 | unsigned long srr0; | ||
| 388 | unsigned long srr1; | ||
| 389 | unsigned long csrr0; | ||
| 390 | unsigned long csrr1; | ||
| 391 | unsigned long dsrr0; | ||
| 392 | unsigned long dsrr1; | ||
| 393 | unsigned long saved_ksp_limit; | ||
| 394 | }; | ||
| 395 | |||
| 396 | /* ensure this structure is always sized to a multiple of the stack alignment */ | ||
| 397 | #define STACK_EXC_LVL_FRAME_SIZE _ALIGN_UP(sizeof (struct exception_regs), 16) | ||
| 398 | |||
| 399 | #endif /* __ASSEMBLY__ */ | ||
| 370 | #endif /* __HEAD_BOOKE_H__ */ | 400 | #endif /* __HEAD_BOOKE_H__ */ |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index e581524d85bc..503f86030b6e 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
| @@ -1080,15 +1080,6 @@ empty_zero_page: | |||
| 1080 | swapper_pg_dir: | 1080 | swapper_pg_dir: |
| 1081 | .space PGD_TABLE_SIZE | 1081 | .space PGD_TABLE_SIZE |
| 1082 | 1082 | ||
| 1083 | /* Reserved 4k for the critical exception stack & 4k for the machine | ||
| 1084 | * check stack per CPU for kernel mode exceptions */ | ||
| 1085 | .section .bss | ||
| 1086 | .align 12 | ||
| 1087 | exception_stack_bottom: | ||
| 1088 | .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS | ||
| 1089 | .globl exception_stack_top | ||
| 1090 | exception_stack_top: | ||
| 1091 | |||
| 1092 | /* | 1083 | /* |
| 1093 | * Room for two PTE pointers, usually the kernel and current user pointers | 1084 | * Room for two PTE pointers, usually the kernel and current user pointers |
| 1094 | * to their respective root page table. | 1085 | * to their respective root page table. |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 2f73f705d564..b5199752ac60 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
| @@ -356,9 +356,42 @@ void __init init_IRQ(void) | |||
| 356 | { | 356 | { |
| 357 | if (ppc_md.init_IRQ) | 357 | if (ppc_md.init_IRQ) |
| 358 | ppc_md.init_IRQ(); | 358 | ppc_md.init_IRQ(); |
| 359 | |||
| 360 | exc_lvl_ctx_init(); | ||
| 361 | |||
| 359 | irq_ctx_init(); | 362 | irq_ctx_init(); |
| 360 | } | 363 | } |
| 361 | 364 | ||
| 365 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
| 366 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | ||
| 367 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | ||
| 368 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | ||
| 369 | |||
| 370 | void exc_lvl_ctx_init(void) | ||
| 371 | { | ||
| 372 | struct thread_info *tp; | ||
| 373 | int i; | ||
| 374 | |||
| 375 | for_each_possible_cpu(i) { | ||
| 376 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | ||
| 377 | tp = critirq_ctx[i]; | ||
| 378 | tp->cpu = i; | ||
| 379 | tp->preempt_count = 0; | ||
| 380 | |||
| 381 | #ifdef CONFIG_BOOKE | ||
| 382 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | ||
| 383 | tp = dbgirq_ctx[i]; | ||
| 384 | tp->cpu = i; | ||
| 385 | tp->preempt_count = 0; | ||
| 386 | |||
| 387 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | ||
| 388 | tp = mcheckirq_ctx[i]; | ||
| 389 | tp->cpu = i; | ||
| 390 | tp->preempt_count = HARDIRQ_OFFSET; | ||
| 391 | #endif | ||
| 392 | } | ||
| 393 | } | ||
| 394 | #endif | ||
| 362 | 395 | ||
| 363 | #ifdef CONFIG_IRQSTACKS | 396 | #ifdef CONFIG_IRQSTACKS |
| 364 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; | 397 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index c176c513566b..23545a2f51f3 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c | |||
| @@ -498,7 +498,7 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | |||
| 498 | #ifdef CONFIG_PPC64 | 498 | #ifdef CONFIG_PPC64 |
| 499 | unsigned long arch_deref_entry_point(void *entry) | 499 | unsigned long arch_deref_entry_point(void *entry) |
| 500 | { | 500 | { |
| 501 | return (unsigned long)(((func_descr_t *)entry)->entry); | 501 | return ((func_descr_t *)entry)->entry; |
| 502 | } | 502 | } |
| 503 | #endif | 503 | #endif |
| 504 | 504 | ||
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index 1e656b43ad7f..827a5726a035 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c | |||
| @@ -573,7 +573,7 @@ static int lparcfg_open(struct inode *inode, struct file *file) | |||
| 573 | return single_open(file, lparcfg_data, NULL); | 573 | return single_open(file, lparcfg_data, NULL); |
| 574 | } | 574 | } |
| 575 | 575 | ||
| 576 | const struct file_operations lparcfg_fops = { | 576 | static const struct file_operations lparcfg_fops = { |
| 577 | .owner = THIS_MODULE, | 577 | .owner = THIS_MODULE, |
| 578 | .read = seq_read, | 578 | .read = seq_read, |
| 579 | .write = lparcfg_write, | 579 | .write = lparcfg_write, |
| @@ -581,7 +581,7 @@ const struct file_operations lparcfg_fops = { | |||
| 581 | .release = single_release, | 581 | .release = single_release, |
| 582 | }; | 582 | }; |
| 583 | 583 | ||
| 584 | int __init lparcfg_init(void) | 584 | static int __init lparcfg_init(void) |
| 585 | { | 585 | { |
| 586 | struct proc_dir_entry *ent; | 586 | struct proc_dir_entry *ent; |
| 587 | mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; | 587 | mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; |
| @@ -601,7 +601,7 @@ int __init lparcfg_init(void) | |||
| 601 | return 0; | 601 | return 0; |
| 602 | } | 602 | } |
| 603 | 603 | ||
| 604 | void __exit lparcfg_cleanup(void) | 604 | static void __exit lparcfg_cleanup(void) |
| 605 | { | 605 | { |
| 606 | if (proc_ppc64_lparcfg) | 606 | if (proc_ppc64_lparcfg) |
| 607 | remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent); | 607 | remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent); |
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index 704375bda73a..631dfd614b21 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c | |||
| @@ -158,7 +158,7 @@ void kexec_copy_flush(struct kimage *image) | |||
| 158 | * on calling the interrupts, but we would like to call it off irq level | 158 | * on calling the interrupts, but we would like to call it off irq level |
| 159 | * so that the interrupt controller is clean. | 159 | * so that the interrupt controller is clean. |
| 160 | */ | 160 | */ |
| 161 | void kexec_smp_down(void *arg) | 161 | static void kexec_smp_down(void *arg) |
| 162 | { | 162 | { |
| 163 | if (ppc_md.kexec_cpu_down) | 163 | if (ppc_md.kexec_cpu_down) |
| 164 | ppc_md.kexec_cpu_down(0, 1); | 164 | ppc_md.kexec_cpu_down(0, 1); |
| @@ -249,7 +249,7 @@ static void kexec_prepare_cpus(void) | |||
| 249 | * We could use a smaller stack if we don't care about anything using | 249 | * We could use a smaller stack if we don't care about anything using |
| 250 | * current, but that audit has not been performed. | 250 | * current, but that audit has not been performed. |
| 251 | */ | 251 | */ |
| 252 | union thread_union kexec_stack | 252 | static union thread_union kexec_stack |
| 253 | __attribute__((__section__(".data.init_task"))) = { }; | 253 | __attribute__((__section__(".data.init_task"))) = { }; |
| 254 | 254 | ||
| 255 | /* Our assembly helper, in kexec_stub.S */ | 255 | /* Our assembly helper, in kexec_stub.S */ |
diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c index c62d1012c013..3bb7d3dd28be 100644 --- a/arch/powerpc/kernel/msi.c +++ b/arch/powerpc/kernel/msi.c | |||
| @@ -34,5 +34,5 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
| 34 | 34 | ||
| 35 | void arch_teardown_msi_irqs(struct pci_dev *dev) | 35 | void arch_teardown_msi_irqs(struct pci_dev *dev) |
| 36 | { | 36 | { |
| 37 | return ppc_md.teardown_msi_irqs(dev); | 37 | ppc_md.teardown_msi_irqs(dev); |
| 38 | } | 38 | } |
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c index 5748ddb47d9f..e9be908f199b 100644 --- a/arch/powerpc/kernel/of_device.c +++ b/arch/powerpc/kernel/of_device.c | |||
| @@ -89,54 +89,6 @@ struct of_device *of_device_alloc(struct device_node *np, | |||
| 89 | } | 89 | } |
| 90 | EXPORT_SYMBOL(of_device_alloc); | 90 | EXPORT_SYMBOL(of_device_alloc); |
| 91 | 91 | ||
| 92 | ssize_t of_device_get_modalias(struct of_device *ofdev, | ||
| 93 | char *str, ssize_t len) | ||
| 94 | { | ||
| 95 | const char *compat; | ||
| 96 | int cplen, i; | ||
| 97 | ssize_t tsize, csize, repend; | ||
| 98 | |||
| 99 | /* Name & Type */ | ||
| 100 | csize = snprintf(str, len, "of:N%sT%s", | ||
| 101 | ofdev->node->name, ofdev->node->type); | ||
| 102 | |||
| 103 | /* Get compatible property if any */ | ||
| 104 | compat = of_get_property(ofdev->node, "compatible", &cplen); | ||
| 105 | if (!compat) | ||
| 106 | return csize; | ||
| 107 | |||
| 108 | /* Find true end (we tolerate multiple \0 at the end */ | ||
| 109 | for (i=(cplen-1); i>=0 && !compat[i]; i--) | ||
| 110 | cplen--; | ||
| 111 | if (!cplen) | ||
| 112 | return csize; | ||
| 113 | cplen++; | ||
| 114 | |||
| 115 | /* Check space (need cplen+1 chars including final \0) */ | ||
| 116 | tsize = csize + cplen; | ||
| 117 | repend = tsize; | ||
| 118 | |||
| 119 | if (csize>=len) /* @ the limit, all is already filled */ | ||
| 120 | return tsize; | ||
| 121 | |||
| 122 | if (tsize>=len) { /* limit compat list */ | ||
| 123 | cplen = len-csize-1; | ||
| 124 | repend = len; | ||
| 125 | } | ||
| 126 | |||
| 127 | /* Copy and do char replacement */ | ||
| 128 | memcpy(&str[csize+1], compat, cplen); | ||
| 129 | for (i=csize; i<repend; i++) { | ||
| 130 | char c = str[i]; | ||
| 131 | if (c=='\0') | ||
| 132 | str[i] = 'C'; | ||
| 133 | else if (c==' ') | ||
| 134 | str[i] = '_'; | ||
| 135 | } | ||
| 136 | |||
| 137 | return tsize; | ||
| 138 | } | ||
| 139 | |||
| 140 | int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) | 92 | int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) |
| 141 | { | 93 | { |
| 142 | struct of_device *ofdev; | 94 | struct of_device *ofdev; |
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c index f9c6abc84a94..1be9fe38bcb5 100644 --- a/arch/powerpc/kernel/rtas-proc.c +++ b/arch/powerpc/kernel/rtas-proc.c | |||
| @@ -160,7 +160,7 @@ static int sensors_open(struct inode *inode, struct file *file) | |||
| 160 | return single_open(file, ppc_rtas_sensors_show, NULL); | 160 | return single_open(file, ppc_rtas_sensors_show, NULL); |
| 161 | } | 161 | } |
| 162 | 162 | ||
| 163 | const struct file_operations ppc_rtas_sensors_operations = { | 163 | static const struct file_operations ppc_rtas_sensors_operations = { |
| 164 | .open = sensors_open, | 164 | .open = sensors_open, |
| 165 | .read = seq_read, | 165 | .read = seq_read, |
| 166 | .llseek = seq_lseek, | 166 | .llseek = seq_lseek, |
| @@ -172,7 +172,7 @@ static int poweron_open(struct inode *inode, struct file *file) | |||
| 172 | return single_open(file, ppc_rtas_poweron_show, NULL); | 172 | return single_open(file, ppc_rtas_poweron_show, NULL); |
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | const struct file_operations ppc_rtas_poweron_operations = { | 175 | static const struct file_operations ppc_rtas_poweron_operations = { |
| 176 | .open = poweron_open, | 176 | .open = poweron_open, |
| 177 | .read = seq_read, | 177 | .read = seq_read, |
| 178 | .llseek = seq_lseek, | 178 | .llseek = seq_lseek, |
| @@ -185,7 +185,7 @@ static int progress_open(struct inode *inode, struct file *file) | |||
| 185 | return single_open(file, ppc_rtas_progress_show, NULL); | 185 | return single_open(file, ppc_rtas_progress_show, NULL); |
| 186 | } | 186 | } |
| 187 | 187 | ||
| 188 | const struct file_operations ppc_rtas_progress_operations = { | 188 | static const struct file_operations ppc_rtas_progress_operations = { |
| 189 | .open = progress_open, | 189 | .open = progress_open, |
| 190 | .read = seq_read, | 190 | .read = seq_read, |
| 191 | .llseek = seq_lseek, | 191 | .llseek = seq_lseek, |
| @@ -198,7 +198,7 @@ static int clock_open(struct inode *inode, struct file *file) | |||
| 198 | return single_open(file, ppc_rtas_clock_show, NULL); | 198 | return single_open(file, ppc_rtas_clock_show, NULL); |
| 199 | } | 199 | } |
| 200 | 200 | ||
| 201 | const struct file_operations ppc_rtas_clock_operations = { | 201 | static const struct file_operations ppc_rtas_clock_operations = { |
| 202 | .open = clock_open, | 202 | .open = clock_open, |
| 203 | .read = seq_read, | 203 | .read = seq_read, |
| 204 | .llseek = seq_lseek, | 204 | .llseek = seq_lseek, |
| @@ -211,7 +211,7 @@ static int tone_freq_open(struct inode *inode, struct file *file) | |||
| 211 | return single_open(file, ppc_rtas_tone_freq_show, NULL); | 211 | return single_open(file, ppc_rtas_tone_freq_show, NULL); |
| 212 | } | 212 | } |
| 213 | 213 | ||
| 214 | const struct file_operations ppc_rtas_tone_freq_operations = { | 214 | static const struct file_operations ppc_rtas_tone_freq_operations = { |
| 215 | .open = tone_freq_open, | 215 | .open = tone_freq_open, |
| 216 | .read = seq_read, | 216 | .read = seq_read, |
| 217 | .llseek = seq_lseek, | 217 | .llseek = seq_lseek, |
| @@ -224,7 +224,7 @@ static int tone_volume_open(struct inode *inode, struct file *file) | |||
| 224 | return single_open(file, ppc_rtas_tone_volume_show, NULL); | 224 | return single_open(file, ppc_rtas_tone_volume_show, NULL); |
| 225 | } | 225 | } |
| 226 | 226 | ||
| 227 | const struct file_operations ppc_rtas_tone_volume_operations = { | 227 | static const struct file_operations ppc_rtas_tone_volume_operations = { |
| 228 | .open = tone_volume_open, | 228 | .open = tone_volume_open, |
| 229 | .read = seq_read, | 229 | .read = seq_read, |
| 230 | .llseek = seq_lseek, | 230 | .llseek = seq_lseek, |
| @@ -237,7 +237,7 @@ static int rmo_buf_open(struct inode *inode, struct file *file) | |||
| 237 | return single_open(file, ppc_rtas_rmo_buf_show, NULL); | 237 | return single_open(file, ppc_rtas_rmo_buf_show, NULL); |
| 238 | } | 238 | } |
| 239 | 239 | ||
| 240 | const struct file_operations ppc_rtas_rmo_buf_ops = { | 240 | static const struct file_operations ppc_rtas_rmo_buf_ops = { |
| 241 | .open = rmo_buf_open, | 241 | .open = rmo_buf_open, |
| 242 | .read = seq_read, | 242 | .read = seq_read, |
| 243 | .llseek = seq_lseek, | 243 | .llseek = seq_lseek, |
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 34843c318419..2a60bd3e3afa 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
| @@ -340,8 +340,8 @@ int rtas_get_error_log_max(void) | |||
| 340 | EXPORT_SYMBOL(rtas_get_error_log_max); | 340 | EXPORT_SYMBOL(rtas_get_error_log_max); |
| 341 | 341 | ||
| 342 | 342 | ||
| 343 | char rtas_err_buf[RTAS_ERROR_LOG_MAX]; | 343 | static char rtas_err_buf[RTAS_ERROR_LOG_MAX]; |
| 344 | int rtas_last_error_token; | 344 | static int rtas_last_error_token; |
| 345 | 345 | ||
| 346 | /** Return a copy of the detailed error text associated with the | 346 | /** Return a copy of the detailed error text associated with the |
| 347 | * most recent failed call to rtas. Because the error text | 347 | * most recent failed call to rtas. Because the error text |
| @@ -484,7 +484,7 @@ unsigned int rtas_busy_delay(int status) | |||
| 484 | } | 484 | } |
| 485 | EXPORT_SYMBOL(rtas_busy_delay); | 485 | EXPORT_SYMBOL(rtas_busy_delay); |
| 486 | 486 | ||
| 487 | int rtas_error_rc(int rtas_rc) | 487 | static int rtas_error_rc(int rtas_rc) |
| 488 | { | 488 | { |
| 489 | int rc; | 489 | int rc; |
| 490 | 490 | ||
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c index 0a5e22b22729..09ded5c424a9 100644 --- a/arch/powerpc/kernel/rtas_flash.c +++ b/arch/powerpc/kernel/rtas_flash.c | |||
| @@ -731,7 +731,7 @@ static const struct file_operations validate_flash_operations = { | |||
| 731 | .release = validate_flash_release, | 731 | .release = validate_flash_release, |
| 732 | }; | 732 | }; |
| 733 | 733 | ||
| 734 | int __init rtas_flash_init(void) | 734 | static int __init rtas_flash_init(void) |
| 735 | { | 735 | { |
| 736 | int rc; | 736 | int rc; |
| 737 | 737 | ||
| @@ -817,7 +817,7 @@ cleanup: | |||
| 817 | return rc; | 817 | return rc; |
| 818 | } | 818 | } |
| 819 | 819 | ||
| 820 | void __exit rtas_flash_cleanup(void) | 820 | static void __exit rtas_flash_cleanup(void) |
| 821 | { | 821 | { |
| 822 | rtas_flash_term_hook = NULL; | 822 | rtas_flash_term_hook = NULL; |
| 823 | 823 | ||
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c index 3ab88a9dc70d..589a2797eac2 100644 --- a/arch/powerpc/kernel/rtas_pci.c +++ b/arch/powerpc/kernel/rtas_pci.c | |||
| @@ -155,12 +155,12 @@ static int rtas_pci_write_config(struct pci_bus *bus, | |||
| 155 | return PCIBIOS_DEVICE_NOT_FOUND; | 155 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | struct pci_ops rtas_pci_ops = { | 158 | static struct pci_ops rtas_pci_ops = { |
| 159 | .read = rtas_pci_read_config, | 159 | .read = rtas_pci_read_config, |
| 160 | .write = rtas_pci_write_config, | 160 | .write = rtas_pci_write_config, |
| 161 | }; | 161 | }; |
| 162 | 162 | ||
| 163 | int is_python(struct device_node *dev) | 163 | static int is_python(struct device_node *dev) |
| 164 | { | 164 | { |
| 165 | const char *model = of_get_property(dev, "model", NULL); | 165 | const char *model = of_get_property(dev, "model", NULL); |
| 166 | 166 | ||
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 5112a4aa801d..bef0be3fd98b 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
| @@ -248,6 +248,28 @@ static void __init irqstack_early_init(void) | |||
| 248 | #define irqstack_early_init() | 248 | #define irqstack_early_init() |
| 249 | #endif | 249 | #endif |
| 250 | 250 | ||
| 251 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
| 252 | static void __init exc_lvl_early_init(void) | ||
| 253 | { | ||
| 254 | unsigned int i; | ||
| 255 | |||
| 256 | /* interrupt stacks must be in lowmem, we get that for free on ppc32 | ||
| 257 | * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ | ||
| 258 | for_each_possible_cpu(i) { | ||
| 259 | critirq_ctx[i] = (struct thread_info *) | ||
| 260 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | ||
| 261 | #ifdef CONFIG_BOOKE | ||
| 262 | dbgirq_ctx[i] = (struct thread_info *) | ||
| 263 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | ||
| 264 | mcheckirq_ctx[i] = (struct thread_info *) | ||
| 265 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | ||
| 266 | #endif | ||
| 267 | } | ||
| 268 | } | ||
| 269 | #else | ||
| 270 | #define exc_lvl_early_init() | ||
| 271 | #endif | ||
| 272 | |||
| 251 | /* Warning, IO base is not yet inited */ | 273 | /* Warning, IO base is not yet inited */ |
| 252 | void __init setup_arch(char **cmdline_p) | 274 | void __init setup_arch(char **cmdline_p) |
| 253 | { | 275 | { |
| @@ -305,6 +327,8 @@ void __init setup_arch(char **cmdline_p) | |||
| 305 | init_mm.end_data = (unsigned long) _edata; | 327 | init_mm.end_data = (unsigned long) _edata; |
| 306 | init_mm.brk = klimit; | 328 | init_mm.brk = klimit; |
| 307 | 329 | ||
| 330 | exc_lvl_early_init(); | ||
| 331 | |||
| 308 | irqstack_early_init(); | 332 | irqstack_early_init(); |
| 309 | 333 | ||
| 310 | /* set up the bootmem stuff with available memory */ | 334 | /* set up the bootmem stuff with available memory */ |
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c index a65a44fbe523..ad55488939c3 100644 --- a/arch/powerpc/kernel/signal.c +++ b/arch/powerpc/kernel/signal.c | |||
| @@ -120,7 +120,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
| 120 | int ret; | 120 | int ret; |
| 121 | int is32 = is_32bit_task(); | 121 | int is32 = is_32bit_task(); |
| 122 | 122 | ||
| 123 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | 123 | if (current_thread_info()->local_flags & _TLF_RESTORE_SIGMASK) |
| 124 | oldset = ¤t->saved_sigmask; | 124 | oldset = ¤t->saved_sigmask; |
| 125 | else if (!oldset) | 125 | else if (!oldset) |
| 126 | oldset = ¤t->blocked; | 126 | oldset = ¤t->blocked; |
| @@ -131,9 +131,10 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
| 131 | check_syscall_restart(regs, &ka, signr > 0); | 131 | check_syscall_restart(regs, &ka, signr > 0); |
| 132 | 132 | ||
| 133 | if (signr <= 0) { | 133 | if (signr <= 0) { |
| 134 | struct thread_info *ti = current_thread_info(); | ||
| 134 | /* No signal to deliver -- put the saved sigmask back */ | 135 | /* No signal to deliver -- put the saved sigmask back */ |
| 135 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) { | 136 | if (ti->local_flags & _TLF_RESTORE_SIGMASK) { |
| 136 | clear_thread_flag(TIF_RESTORE_SIGMASK); | 137 | ti->local_flags &= ~_TLF_RESTORE_SIGMASK; |
| 137 | sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); | 138 | sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); |
| 138 | } | 139 | } |
| 139 | return 0; /* no signals delivered */ | 140 | return 0; /* no signals delivered */ |
| @@ -169,10 +170,9 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
| 169 | 170 | ||
| 170 | /* | 171 | /* |
| 171 | * A signal was successfully delivered; the saved sigmask is in | 172 | * A signal was successfully delivered; the saved sigmask is in |
| 172 | * its frame, and we can clear the TIF_RESTORE_SIGMASK flag. | 173 | * its frame, and we can clear the TLF_RESTORE_SIGMASK flag. |
| 173 | */ | 174 | */ |
| 174 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | 175 | current_thread_info()->local_flags &= ~_TLF_RESTORE_SIGMASK; |
| 175 | clear_thread_flag(TIF_RESTORE_SIGMASK); | ||
| 176 | } | 176 | } |
| 177 | 177 | ||
| 178 | return ret; | 178 | return ret; |
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c index ad6943468ee9..4ae16d179803 100644 --- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c | |||
| @@ -243,7 +243,7 @@ long sys_sigsuspend(old_sigset_t mask) | |||
| 243 | 243 | ||
| 244 | current->state = TASK_INTERRUPTIBLE; | 244 | current->state = TASK_INTERRUPTIBLE; |
| 245 | schedule(); | 245 | schedule(); |
| 246 | set_thread_flag(TIF_RESTORE_SIGMASK); | 246 | set_restore_sigmask(); |
| 247 | return -ERESTARTNOHAND; | 247 | return -ERESTARTNOHAND; |
| 248 | } | 248 | } |
| 249 | 249 | ||
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 1457aa0a08f1..ba7989ffaeee 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c | |||
| @@ -365,12 +365,8 @@ void smp_call_function_interrupt(void) | |||
| 365 | } | 365 | } |
| 366 | } | 366 | } |
| 367 | 367 | ||
| 368 | extern struct gettimeofday_struct do_gtod; | ||
| 369 | |||
| 370 | struct thread_info *current_set[NR_CPUS]; | 368 | struct thread_info *current_set[NR_CPUS]; |
| 371 | 369 | ||
| 372 | DECLARE_PER_CPU(unsigned int, pvr); | ||
| 373 | |||
| 374 | static void __devinit smp_store_cpu_info(int id) | 370 | static void __devinit smp_store_cpu_info(int id) |
| 375 | { | 371 | { |
| 376 | per_cpu(pvr, id) = mfspr(SPRN_PVR); | 372 | per_cpu(pvr, id) = mfspr(SPRN_PVR); |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 73401e83739a..c73fc33aa817 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
| @@ -129,7 +129,7 @@ static unsigned long __initdata iSeries_recal_titan; | |||
| 129 | static signed long __initdata iSeries_recal_tb; | 129 | static signed long __initdata iSeries_recal_tb; |
| 130 | 130 | ||
| 131 | /* Forward declaration is only needed for iSereis compiles */ | 131 | /* Forward declaration is only needed for iSereis compiles */ |
| 132 | void __init clocksource_init(void); | 132 | static void __init clocksource_init(void); |
| 133 | #endif | 133 | #endif |
| 134 | 134 | ||
| 135 | #define XSEC_PER_SEC (1024*1024) | 135 | #define XSEC_PER_SEC (1024*1024) |
| @@ -150,8 +150,8 @@ u64 tb_to_xs; | |||
| 150 | unsigned tb_to_us; | 150 | unsigned tb_to_us; |
| 151 | 151 | ||
| 152 | #define TICKLEN_SCALE NTP_SCALE_SHIFT | 152 | #define TICKLEN_SCALE NTP_SCALE_SHIFT |
| 153 | u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ | 153 | static u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ |
| 154 | u64 ticklen_to_xs; /* 0.64 fraction */ | 154 | static u64 ticklen_to_xs; /* 0.64 fraction */ |
| 155 | 155 | ||
| 156 | /* If last_tick_len corresponds to about 1/HZ seconds, then | 156 | /* If last_tick_len corresponds to about 1/HZ seconds, then |
| 157 | last_tick_len << TICKLEN_SHIFT will be about 2^63. */ | 157 | last_tick_len << TICKLEN_SHIFT will be about 2^63. */ |
| @@ -164,7 +164,7 @@ static u64 tb_to_ns_scale __read_mostly; | |||
| 164 | static unsigned tb_to_ns_shift __read_mostly; | 164 | static unsigned tb_to_ns_shift __read_mostly; |
| 165 | static unsigned long boot_tb __read_mostly; | 165 | static unsigned long boot_tb __read_mostly; |
| 166 | 166 | ||
| 167 | struct gettimeofday_struct do_gtod; | 167 | static struct gettimeofday_struct do_gtod; |
| 168 | 168 | ||
| 169 | extern struct timezone sys_tz; | 169 | extern struct timezone sys_tz; |
| 170 | static long timezone_offset; | 170 | static long timezone_offset; |
| @@ -832,7 +832,7 @@ void update_vsyscall_tz(void) | |||
| 832 | ++vdso_data->tb_update_count; | 832 | ++vdso_data->tb_update_count; |
| 833 | } | 833 | } |
| 834 | 834 | ||
| 835 | void __init clocksource_init(void) | 835 | static void __init clocksource_init(void) |
| 836 | { | 836 | { |
| 837 | struct clocksource *clock; | 837 | struct clocksource *clock; |
| 838 | 838 | ||
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S index 932b3fdb34b9..7d6585f90277 100644 --- a/arch/powerpc/kernel/vdso64/vdso64.lds.S +++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S | |||
| @@ -43,15 +43,15 @@ SECTIONS | |||
| 43 | .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } | 43 | .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } |
| 44 | .rodata1 : { *(.rodata1) } | 44 | .rodata1 : { *(.rodata1) } |
| 45 | 45 | ||
| 46 | .dynamic : { *(.dynamic) } :text :dynamic | ||
| 47 | |||
| 46 | .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr | 48 | .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr |
| 47 | .eh_frame : { KEEP (*(.eh_frame)) } :text | 49 | .eh_frame : { KEEP (*(.eh_frame)) } :text |
| 48 | .gcc_except_table : { *(.gcc_except_table) } | 50 | .gcc_except_table : { *(.gcc_except_table) } |
| 51 | .rela.dyn ALIGN(8) : { *(.rela.dyn) } | ||
| 49 | 52 | ||
| 50 | .opd ALIGN(8) : { KEEP (*(.opd)) } | 53 | .opd ALIGN(8) : { KEEP (*(.opd)) } |
| 51 | .got ALIGN(8) : { *(.got .toc) } | 54 | .got ALIGN(8) : { *(.got .toc) } |
| 52 | .rela.dyn ALIGN(8) : { *(.rela.dyn) } | ||
| 53 | |||
| 54 | .dynamic : { *(.dynamic) } :text :dynamic | ||
| 55 | 55 | ||
| 56 | _end = .; | 56 | _end = .; |
| 57 | PROVIDE(end = .); | 57 | PROVIDE(end = .); |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 0f2d239d94c4..bf5b6d7ed30f 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
| @@ -120,7 +120,7 @@ static DEFINE_SPINLOCK(linear_map_hash_lock); | |||
| 120 | 120 | ||
| 121 | /* Pre-POWER4 CPUs (4k pages only) | 121 | /* Pre-POWER4 CPUs (4k pages only) |
| 122 | */ | 122 | */ |
| 123 | struct mmu_psize_def mmu_psize_defaults_old[] = { | 123 | static struct mmu_psize_def mmu_psize_defaults_old[] = { |
| 124 | [MMU_PAGE_4K] = { | 124 | [MMU_PAGE_4K] = { |
| 125 | .shift = 12, | 125 | .shift = 12, |
| 126 | .sllp = 0, | 126 | .sllp = 0, |
| @@ -134,7 +134,7 @@ struct mmu_psize_def mmu_psize_defaults_old[] = { | |||
| 134 | * | 134 | * |
| 135 | * Support for 16Mb large pages | 135 | * Support for 16Mb large pages |
| 136 | */ | 136 | */ |
| 137 | struct mmu_psize_def mmu_psize_defaults_gp[] = { | 137 | static struct mmu_psize_def mmu_psize_defaults_gp[] = { |
| 138 | [MMU_PAGE_4K] = { | 138 | [MMU_PAGE_4K] = { |
| 139 | .shift = 12, | 139 | .shift = 12, |
| 140 | .sllp = 0, | 140 | .sllp = 0, |
| @@ -533,8 +533,6 @@ void __init htab_initialize(void) | |||
| 533 | unsigned long base = 0, size = 0, limit; | 533 | unsigned long base = 0, size = 0, limit; |
| 534 | int i; | 534 | int i; |
| 535 | 535 | ||
| 536 | extern unsigned long tce_alloc_start, tce_alloc_end; | ||
| 537 | |||
| 538 | DBG(" -> htab_initialize()\n"); | 536 | DBG(" -> htab_initialize()\n"); |
| 539 | 537 | ||
| 540 | /* Initialize segment sizes */ | 538 | /* Initialize segment sizes */ |
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index 1952b4d3fa7f..45418590b6a9 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c | |||
| @@ -43,6 +43,7 @@ | |||
| 43 | #include <asm/btext.h> | 43 | #include <asm/btext.h> |
| 44 | #include <asm/tlb.h> | 44 | #include <asm/tlb.h> |
| 45 | #include <asm/sections.h> | 45 | #include <asm/sections.h> |
| 46 | #include <asm/system.h> | ||
| 46 | 47 | ||
| 47 | #include "mmu_decl.h" | 48 | #include "mmu_decl.h" |
| 48 | 49 | ||
| @@ -76,8 +77,6 @@ void MMU_init(void); | |||
| 76 | /* XXX should be in current.h -- paulus */ | 77 | /* XXX should be in current.h -- paulus */ |
| 77 | extern struct task_struct *current_set[NR_CPUS]; | 78 | extern struct task_struct *current_set[NR_CPUS]; |
| 78 | 79 | ||
| 79 | extern int init_bootmem_done; | ||
| 80 | |||
| 81 | /* | 80 | /* |
| 82 | * this tells the system to map all of ram with the segregs | 81 | * this tells the system to map all of ram with the segregs |
| 83 | * (i.e. page tables) instead of the bats. | 82 | * (i.e. page tables) instead of the bats. |
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c index 6aa65375abf5..6ef63caca682 100644 --- a/arch/powerpc/mm/init_64.c +++ b/arch/powerpc/mm/init_64.c | |||
| @@ -185,7 +185,7 @@ void pgtable_cache_init(void) | |||
| 185 | * do this by hand as the proffered address may not be correctly aligned. | 185 | * do this by hand as the proffered address may not be correctly aligned. |
| 186 | * Subtraction of non-aligned pointers produces undefined results. | 186 | * Subtraction of non-aligned pointers produces undefined results. |
| 187 | */ | 187 | */ |
| 188 | unsigned long __meminit vmemmap_section_start(unsigned long page) | 188 | static unsigned long __meminit vmemmap_section_start(unsigned long page) |
| 189 | { | 189 | { |
| 190 | unsigned long offset = page - ((unsigned long)(vmemmap)); | 190 | unsigned long offset = page - ((unsigned long)(vmemmap)); |
| 191 | 191 | ||
| @@ -198,7 +198,7 @@ unsigned long __meminit vmemmap_section_start(unsigned long page) | |||
| 198 | * which overlaps this vmemmap page is initialised then this page is | 198 | * which overlaps this vmemmap page is initialised then this page is |
| 199 | * initialised already. | 199 | * initialised already. |
| 200 | */ | 200 | */ |
| 201 | int __meminit vmemmap_populated(unsigned long start, int page_size) | 201 | static int __meminit vmemmap_populated(unsigned long start, int page_size) |
| 202 | { | 202 | { |
| 203 | unsigned long end = start + page_size; | 203 | unsigned long end = start + page_size; |
| 204 | 204 | ||
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c index efbbd13d93e5..60e6032a8088 100644 --- a/arch/powerpc/mm/stab.c +++ b/arch/powerpc/mm/stab.c | |||
| @@ -30,8 +30,8 @@ struct stab_entry { | |||
| 30 | }; | 30 | }; |
| 31 | 31 | ||
| 32 | #define NR_STAB_CACHE_ENTRIES 8 | 32 | #define NR_STAB_CACHE_ENTRIES 8 |
| 33 | DEFINE_PER_CPU(long, stab_cache_ptr); | 33 | static DEFINE_PER_CPU(long, stab_cache_ptr); |
| 34 | DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); | 34 | static DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); |
| 35 | 35 | ||
| 36 | /* | 36 | /* |
| 37 | * Create a segment table entry for the given esid/vsid pair. | 37 | * Create a segment table entry for the given esid/vsid pair. |
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c index e2d867ce1c7e..509bc560159b 100644 --- a/arch/powerpc/mm/tlb_64.c +++ b/arch/powerpc/mm/tlb_64.c | |||
| @@ -37,8 +37,8 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); | |||
| 37 | * include/asm-powerpc/tlb.h file -- tgall | 37 | * include/asm-powerpc/tlb.h file -- tgall |
| 38 | */ | 38 | */ |
| 39 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | 39 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); |
| 40 | DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); | 40 | static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); |
| 41 | unsigned long pte_freelist_forced_free; | 41 | static unsigned long pte_freelist_forced_free; |
| 42 | 42 | ||
| 43 | struct pte_freelist_batch | 43 | struct pte_freelist_batch |
| 44 | { | 44 | { |
| @@ -47,9 +47,6 @@ struct pte_freelist_batch | |||
| 47 | pgtable_free_t tables[0]; | 47 | pgtable_free_t tables[0]; |
| 48 | }; | 48 | }; |
| 49 | 49 | ||
| 50 | DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); | ||
| 51 | unsigned long pte_freelist_forced_free; | ||
| 52 | |||
| 53 | #define PTE_FREELIST_SIZE \ | 50 | #define PTE_FREELIST_SIZE \ |
| 54 | ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \ | 51 | ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \ |
| 55 | / sizeof(pgtable_free_t)) | 52 | / sizeof(pgtable_free_t)) |
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c index 9150318cfc56..d293c702e734 100644 --- a/arch/powerpc/platforms/44x/warp-nand.c +++ b/arch/powerpc/platforms/44x/warp-nand.c | |||
| @@ -11,8 +11,10 @@ | |||
| 11 | #include <linux/mtd/partitions.h> | 11 | #include <linux/mtd/partitions.h> |
| 12 | #include <linux/mtd/nand.h> | 12 | #include <linux/mtd/nand.h> |
| 13 | #include <linux/mtd/ndfc.h> | 13 | #include <linux/mtd/ndfc.h> |
| 14 | #include <linux/of.h> | ||
| 14 | #include <asm/machdep.h> | 15 | #include <asm/machdep.h> |
| 15 | 16 | ||
| 17 | |||
| 16 | #ifdef CONFIG_MTD_NAND_NDFC | 18 | #ifdef CONFIG_MTD_NAND_NDFC |
| 17 | 19 | ||
| 18 | #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ | 20 | #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ |
| @@ -35,13 +37,23 @@ static struct mtd_partition nand_parts[] = { | |||
| 35 | { | 37 | { |
| 36 | .name = "root", | 38 | .name = "root", |
| 37 | .offset = 0x0200000, | 39 | .offset = 0x0200000, |
| 38 | .size = 0x3400000 | 40 | .size = 0x3E00000 |
| 41 | }, | ||
| 42 | { | ||
| 43 | .name = "persistent", | ||
| 44 | .offset = 0x4000000, | ||
| 45 | .size = 0x4000000 | ||
| 39 | }, | 46 | }, |
| 40 | { | 47 | { |
| 41 | .name = "user", | 48 | .name = "persistent1", |
| 42 | .offset = 0x3600000, | 49 | .offset = 0x8000000, |
| 43 | .size = 0x0A00000 | 50 | .size = 0x4000000 |
| 44 | }, | 51 | }, |
| 52 | { | ||
| 53 | .name = "persistent2", | ||
| 54 | .offset = 0xC000000, | ||
| 55 | .size = 0x4000000 | ||
| 56 | } | ||
| 45 | }; | 57 | }; |
| 46 | 58 | ||
| 47 | struct ndfc_controller_settings warp_ndfc_settings = { | 59 | struct ndfc_controller_settings warp_ndfc_settings = { |
| @@ -67,19 +79,15 @@ static struct platform_device warp_ndfc_device = { | |||
| 67 | .resource = &warp_ndfc, | 79 | .resource = &warp_ndfc, |
| 68 | }; | 80 | }; |
| 69 | 81 | ||
| 70 | static struct nand_ecclayout nand_oob_16 = { | 82 | /* Do NOT set the ecclayout: let it default so it is correct for both |
| 71 | .eccbytes = 3, | 83 | * 64M and 256M flash chips. |
| 72 | .eccpos = { 0, 1, 2, 3, 6, 7 }, | 84 | */ |
| 73 | .oobfree = { {.offset = 8, .length = 16} } | ||
| 74 | }; | ||
| 75 | |||
| 76 | static struct platform_nand_chip warp_nand_chip0 = { | 85 | static struct platform_nand_chip warp_nand_chip0 = { |
| 77 | .nr_chips = 1, | 86 | .nr_chips = 1, |
| 78 | .chip_offset = CS_NAND_0, | 87 | .chip_offset = CS_NAND_0, |
| 79 | .nr_partitions = ARRAY_SIZE(nand_parts), | 88 | .nr_partitions = ARRAY_SIZE(nand_parts), |
| 80 | .partitions = nand_parts, | 89 | .partitions = nand_parts, |
| 81 | .chip_delay = 50, | 90 | .chip_delay = 20, |
| 82 | .ecclayout = &nand_oob_16, | ||
| 83 | .priv = &warp_chip0_settings, | 91 | .priv = &warp_chip0_settings, |
| 84 | }; | 92 | }; |
| 85 | 93 | ||
| @@ -96,6 +104,23 @@ static struct platform_device warp_nand_device = { | |||
| 96 | 104 | ||
| 97 | static int warp_setup_nand_flash(void) | 105 | static int warp_setup_nand_flash(void) |
| 98 | { | 106 | { |
| 107 | struct device_node *np; | ||
| 108 | |||
| 109 | /* Try to detect a rev A based on NOR size. */ | ||
| 110 | np = of_find_compatible_node(NULL, NULL, "cfi-flash"); | ||
| 111 | if (np) { | ||
| 112 | struct property *pp; | ||
| 113 | |||
| 114 | pp = of_find_property(np, "reg", NULL); | ||
| 115 | if (pp && (pp->length == 12)) { | ||
| 116 | u32 *v = pp->value; | ||
| 117 | if (v[2] == 0x4000000) | ||
| 118 | /* Rev A = 64M NAND */ | ||
| 119 | warp_nand_chip0.nr_partitions = 2; | ||
| 120 | } | ||
| 121 | of_node_put(np); | ||
| 122 | } | ||
| 123 | |||
| 99 | platform_device_register(&warp_ndfc_device); | 124 | platform_device_register(&warp_ndfc_device); |
| 100 | platform_device_register(&warp_nand_device); | 125 | platform_device_register(&warp_nand_device); |
| 101 | 126 | ||
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index 39cf6150a72b..9565995cba7f 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c | |||
| @@ -12,6 +12,9 @@ | |||
| 12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 13 | #include <linux/of_platform.h> | 13 | #include <linux/of_platform.h> |
| 14 | #include <linux/kthread.h> | 14 | #include <linux/kthread.h> |
| 15 | #include <linux/i2c.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/delay.h> | ||
| 15 | 18 | ||
| 16 | #include <asm/machdep.h> | 19 | #include <asm/machdep.h> |
| 17 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
| @@ -27,6 +30,18 @@ static __initdata struct of_device_id warp_of_bus[] = { | |||
| 27 | {}, | 30 | {}, |
| 28 | }; | 31 | }; |
| 29 | 32 | ||
| 33 | static __initdata struct i2c_board_info warp_i2c_info[] = { | ||
| 34 | { I2C_BOARD_INFO("ad7414", 0x4a) } | ||
| 35 | }; | ||
| 36 | |||
| 37 | static int __init warp_arch_init(void) | ||
| 38 | { | ||
| 39 | /* This should go away once support is moved to the dts. */ | ||
| 40 | i2c_register_board_info(0, warp_i2c_info, ARRAY_SIZE(warp_i2c_info)); | ||
| 41 | return 0; | ||
| 42 | } | ||
| 43 | machine_arch_initcall(warp, warp_arch_init); | ||
| 44 | |||
| 30 | static int __init warp_device_probe(void) | 45 | static int __init warp_device_probe(void) |
| 31 | { | 46 | { |
| 32 | of_platform_bus_probe(NULL, warp_of_bus, NULL); | 47 | of_platform_bus_probe(NULL, warp_of_bus, NULL); |
| @@ -52,61 +67,232 @@ define_machine(warp) { | |||
| 52 | }; | 67 | }; |
| 53 | 68 | ||
| 54 | 69 | ||
| 55 | #define LED_GREEN (0x80000000 >> 0) | 70 | /* I am not sure this is the best place for this... */ |
| 56 | #define LED_RED (0x80000000 >> 1) | 71 | static int __init warp_post_info(void) |
| 72 | { | ||
| 73 | struct device_node *np; | ||
| 74 | void __iomem *fpga; | ||
| 75 | u32 post1, post2; | ||
| 76 | |||
| 77 | /* Sighhhh... POST information is in the sd area. */ | ||
| 78 | np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd"); | ||
| 79 | if (np == NULL) | ||
| 80 | return -ENOENT; | ||
| 81 | |||
| 82 | fpga = of_iomap(np, 0); | ||
| 83 | of_node_put(np); | ||
| 84 | if (fpga == NULL) | ||
| 85 | return -ENOENT; | ||
| 86 | |||
| 87 | post1 = in_be32(fpga + 0x40); | ||
| 88 | post2 = in_be32(fpga + 0x44); | ||
| 89 | |||
| 90 | iounmap(fpga); | ||
| 91 | |||
| 92 | if (post1 || post2) | ||
| 93 | printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2); | ||
| 94 | else | ||
| 95 | printk(KERN_INFO "Warp POST OK\n"); | ||
| 96 | |||
| 97 | return 0; | ||
| 98 | } | ||
| 99 | machine_late_initcall(warp, warp_post_info); | ||
| 100 | |||
| 101 | |||
| 102 | #ifdef CONFIG_SENSORS_AD7414 | ||
| 103 | |||
| 104 | static LIST_HEAD(dtm_shutdown_list); | ||
| 105 | static void __iomem *dtm_fpga; | ||
| 106 | static void __iomem *gpio_base; | ||
| 107 | |||
| 108 | |||
| 109 | struct dtm_shutdown { | ||
| 110 | struct list_head list; | ||
| 111 | void (*func)(void *arg); | ||
| 112 | void *arg; | ||
| 113 | }; | ||
| 57 | 114 | ||
| 58 | 115 | ||
| 59 | /* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */ | 116 | int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) |
| 60 | void warp_set_power_leds(int green, int red) | ||
| 61 | { | 117 | { |
| 62 | static void __iomem *gpio_base = NULL; | 118 | struct dtm_shutdown *shutdown; |
| 63 | unsigned leds; | 119 | |
| 64 | 120 | shutdown = kmalloc(sizeof(struct dtm_shutdown), GFP_KERNEL); | |
| 65 | if (gpio_base == NULL) { | 121 | if (shutdown == NULL) |
| 66 | struct device_node *np; | 122 | return -ENOMEM; |
| 67 | 123 | ||
| 68 | /* Power LEDS are on the second GPIO controller */ | 124 | shutdown->func = func; |
| 69 | np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP"); | 125 | shutdown->arg = arg; |
| 70 | if (np) | 126 | |
| 71 | np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP"); | 127 | list_add(&shutdown->list, &dtm_shutdown_list); |
| 72 | if (np == NULL) { | 128 | |
| 73 | printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); | 129 | return 0; |
| 74 | return; | 130 | } |
| 131 | |||
| 132 | int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) | ||
| 133 | { | ||
| 134 | struct dtm_shutdown *shutdown; | ||
| 135 | |||
| 136 | list_for_each_entry(shutdown, &dtm_shutdown_list, list) | ||
| 137 | if (shutdown->func == func && shutdown->arg == arg) { | ||
| 138 | list_del(&shutdown->list); | ||
| 139 | kfree(shutdown); | ||
| 140 | return 0; | ||
| 141 | } | ||
| 142 | |||
| 143 | return -EINVAL; | ||
| 144 | } | ||
| 145 | |||
| 146 | static irqreturn_t temp_isr(int irq, void *context) | ||
| 147 | { | ||
| 148 | struct dtm_shutdown *shutdown; | ||
| 149 | |||
| 150 | local_irq_disable(); | ||
| 151 | |||
| 152 | /* Run through the shutdown list. */ | ||
| 153 | list_for_each_entry(shutdown, &dtm_shutdown_list, list) | ||
| 154 | shutdown->func(shutdown->arg); | ||
| 155 | |||
| 156 | printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n"); | ||
| 157 | |||
| 158 | while (1) { | ||
| 159 | if (dtm_fpga) { | ||
| 160 | unsigned reset = in_be32(dtm_fpga + 0x14); | ||
| 161 | out_be32(dtm_fpga + 0x14, reset); | ||
| 75 | } | 162 | } |
| 76 | 163 | ||
| 77 | gpio_base = of_iomap(np, 0); | 164 | if (gpio_base) { |
| 78 | of_node_put(np); | 165 | unsigned leds = in_be32(gpio_base); |
| 79 | if (gpio_base == NULL) { | 166 | |
| 80 | printk(KERN_ERR __FILE__ ": Unable to map gpio"); | 167 | /* green off, red toggle */ |
| 81 | return; | 168 | leds &= ~0x80000000; |
| 169 | leds ^= 0x40000000; | ||
| 170 | |||
| 171 | out_be32(gpio_base, leds); | ||
| 82 | } | 172 | } |
| 173 | |||
| 174 | mdelay(500); | ||
| 175 | } | ||
| 176 | } | ||
| 177 | |||
| 178 | static int pika_setup_leds(void) | ||
| 179 | { | ||
| 180 | struct device_node *np; | ||
| 181 | const u32 *gpios; | ||
| 182 | int len; | ||
| 183 | |||
| 184 | np = of_find_compatible_node(NULL, NULL, "linux,gpio-led"); | ||
| 185 | if (!np) { | ||
| 186 | printk(KERN_ERR __FILE__ ": Unable to find gpio-led\n"); | ||
| 187 | return -ENOENT; | ||
| 83 | } | 188 | } |
| 84 | 189 | ||
| 85 | leds = in_be32(gpio_base); | 190 | gpios = of_get_property(np, "gpios", &len); |
| 191 | of_node_put(np); | ||
| 192 | if (!gpios || len < 4) { | ||
| 193 | printk(KERN_ERR __FILE__ | ||
| 194 | ": Unable to get gpios property (%d)\n", len); | ||
| 195 | return -ENOENT; | ||
| 196 | } | ||
| 86 | 197 | ||
| 87 | switch (green) { | 198 | np = of_find_node_by_phandle(gpios[0]); |
| 88 | case 0: leds &= ~LED_GREEN; break; | 199 | if (!np) { |
| 89 | case 1: leds |= LED_GREEN; break; | 200 | printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); |
| 201 | return -ENOENT; | ||
| 90 | } | 202 | } |
| 91 | switch (red) { | 203 | |
| 92 | case 0: leds &= ~LED_RED; break; | 204 | gpio_base = of_iomap(np, 0); |
| 93 | case 1: leds |= LED_RED; break; | 205 | of_node_put(np); |
| 206 | if (!gpio_base) { | ||
| 207 | printk(KERN_ERR __FILE__ ": Unable to map gpio"); | ||
| 208 | return -ENOMEM; | ||
| 94 | } | 209 | } |
| 95 | 210 | ||
| 96 | out_be32(gpio_base, leds); | 211 | return 0; |
| 97 | } | 212 | } |
| 98 | EXPORT_SYMBOL(warp_set_power_leds); | ||
| 99 | 213 | ||
| 214 | static void pika_setup_critical_temp(struct i2c_client *client) | ||
| 215 | { | ||
| 216 | struct device_node *np; | ||
| 217 | int irq, rc; | ||
| 218 | |||
| 219 | /* Do this before enabling critical temp interrupt since we | ||
| 220 | * may immediately interrupt. | ||
| 221 | */ | ||
| 222 | pika_setup_leds(); | ||
| 223 | |||
| 224 | /* These registers are in 1 degree increments. */ | ||
| 225 | i2c_smbus_write_byte_data(client, 2, 65); /* Thigh */ | ||
| 226 | i2c_smbus_write_byte_data(client, 3, 55); /* Tlow */ | ||
| 227 | |||
| 228 | np = of_find_compatible_node(NULL, NULL, "adi,ad7414"); | ||
| 229 | if (np == NULL) { | ||
| 230 | printk(KERN_ERR __FILE__ ": Unable to find ad7414\n"); | ||
| 231 | return; | ||
| 232 | } | ||
| 233 | |||
| 234 | irq = irq_of_parse_and_map(np, 0); | ||
| 235 | of_node_put(np); | ||
| 236 | if (irq == NO_IRQ) { | ||
| 237 | printk(KERN_ERR __FILE__ ": Unable to get ad7414 irq\n"); | ||
| 238 | return; | ||
| 239 | } | ||
| 240 | |||
| 241 | rc = request_irq(irq, temp_isr, 0, "ad7414", NULL); | ||
| 242 | if (rc) { | ||
| 243 | printk(KERN_ERR __FILE__ | ||
| 244 | ": Unable to request ad7414 irq %d = %d\n", irq, rc); | ||
| 245 | return; | ||
| 246 | } | ||
| 247 | } | ||
| 248 | |||
| 249 | static inline void pika_dtm_check_fan(void __iomem *fpga) | ||
| 250 | { | ||
| 251 | static int fan_state; | ||
| 252 | u32 fan = in_be32(fpga + 0x34) & (1 << 14); | ||
| 253 | |||
| 254 | if (fan_state != fan) { | ||
| 255 | fan_state = fan; | ||
| 256 | if (fan) | ||
| 257 | printk(KERN_WARNING "Fan rotation error detected." | ||
| 258 | " Please check hardware.\n"); | ||
| 259 | } | ||
| 260 | } | ||
| 100 | 261 | ||
| 101 | #ifdef CONFIG_SENSORS_AD7414 | ||
| 102 | static int pika_dtm_thread(void __iomem *fpga) | 262 | static int pika_dtm_thread(void __iomem *fpga) |
| 103 | { | 263 | { |
| 104 | extern int ad7414_get_temp(int index); | 264 | struct i2c_adapter *adap; |
| 265 | struct i2c_client *client; | ||
| 266 | |||
| 267 | /* We loop in case either driver was compiled as a module and | ||
| 268 | * has not been insmoded yet. | ||
| 269 | */ | ||
| 270 | while (!(adap = i2c_get_adapter(0))) { | ||
| 271 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 272 | schedule_timeout(HZ); | ||
| 273 | } | ||
| 274 | |||
| 275 | while (1) { | ||
| 276 | list_for_each_entry(client, &adap->clients, list) | ||
| 277 | if (client->addr == 0x4a) | ||
| 278 | goto found_it; | ||
| 279 | |||
| 280 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 281 | schedule_timeout(HZ); | ||
| 282 | } | ||
| 283 | |||
| 284 | found_it: | ||
| 285 | i2c_put_adapter(adap); | ||
| 286 | |||
| 287 | pika_setup_critical_temp(client); | ||
| 288 | |||
| 289 | printk(KERN_INFO "PIKA DTM thread running.\n"); | ||
| 105 | 290 | ||
| 106 | while (!kthread_should_stop()) { | 291 | while (!kthread_should_stop()) { |
| 107 | int temp = ad7414_get_temp(0); | 292 | u16 temp = swab16(i2c_smbus_read_word_data(client, 0)); |
| 293 | out_be32(fpga + 0x20, temp); | ||
| 108 | 294 | ||
| 109 | out_be32(fpga, temp); | 295 | pika_dtm_check_fan(fpga); |
| 110 | 296 | ||
| 111 | set_current_state(TASK_INTERRUPTIBLE); | 297 | set_current_state(TASK_INTERRUPTIBLE); |
| 112 | schedule_timeout(HZ); | 298 | schedule_timeout(HZ); |
| @@ -115,37 +301,44 @@ static int pika_dtm_thread(void __iomem *fpga) | |||
| 115 | return 0; | 301 | return 0; |
| 116 | } | 302 | } |
| 117 | 303 | ||
| 304 | |||
| 118 | static int __init pika_dtm_start(void) | 305 | static int __init pika_dtm_start(void) |
| 119 | { | 306 | { |
| 120 | struct task_struct *dtm_thread; | 307 | struct task_struct *dtm_thread; |
| 121 | struct device_node *np; | 308 | struct device_node *np; |
| 122 | struct resource res; | ||
| 123 | void __iomem *fpga; | ||
| 124 | 309 | ||
| 125 | np = of_find_compatible_node(NULL, NULL, "pika,fpga"); | 310 | np = of_find_compatible_node(NULL, NULL, "pika,fpga"); |
| 126 | if (np == NULL) | 311 | if (np == NULL) |
| 127 | return -ENOENT; | 312 | return -ENOENT; |
| 128 | 313 | ||
| 129 | /* We do not call of_iomap here since it would map in the entire | 314 | dtm_fpga = of_iomap(np, 0); |
| 130 | * fpga space, which is over 8k. | ||
| 131 | */ | ||
| 132 | if (of_address_to_resource(np, 0, &res)) { | ||
| 133 | of_node_put(np); | ||
| 134 | return -ENOENT; | ||
| 135 | } | ||
| 136 | of_node_put(np); | 315 | of_node_put(np); |
| 137 | 316 | if (dtm_fpga == NULL) | |
| 138 | fpga = ioremap(res.start, 0x24); | ||
| 139 | if (fpga == NULL) | ||
| 140 | return -ENOENT; | 317 | return -ENOENT; |
| 141 | 318 | ||
| 142 | dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm"); | 319 | dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm"); |
| 143 | if (IS_ERR(dtm_thread)) { | 320 | if (IS_ERR(dtm_thread)) { |
| 144 | iounmap(fpga); | 321 | iounmap(dtm_fpga); |
| 145 | return PTR_ERR(dtm_thread); | 322 | return PTR_ERR(dtm_thread); |
| 146 | } | 323 | } |
| 147 | 324 | ||
| 148 | return 0; | 325 | return 0; |
| 149 | } | 326 | } |
| 150 | device_initcall(pika_dtm_start); | 327 | machine_late_initcall(warp, pika_dtm_start); |
| 328 | |||
| 329 | #else /* !CONFIG_SENSORS_AD7414 */ | ||
| 330 | |||
| 331 | int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) | ||
| 332 | { | ||
| 333 | return 0; | ||
| 334 | } | ||
| 335 | |||
| 336 | int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) | ||
| 337 | { | ||
| 338 | return 0; | ||
| 339 | } | ||
| 340 | |||
| 151 | #endif | 341 | #endif |
| 342 | |||
| 343 | EXPORT_SYMBOL(pika_dtm_register_shutdown); | ||
| 344 | EXPORT_SYMBOL(pika_dtm_unregister_shutdown); | ||
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 13587e2e8680..583b0c7409c9 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
| @@ -79,6 +79,15 @@ config SBC834x | |||
| 79 | help | 79 | help |
| 80 | This option enables support for the Wind River SBC834x board. | 80 | This option enables support for the Wind River SBC834x board. |
| 81 | 81 | ||
| 82 | config ASP834x | ||
| 83 | bool "Analogue & Micro ASP 834x" | ||
| 84 | select PPC_MPC834x | ||
| 85 | select REDBOOT | ||
| 86 | help | ||
| 87 | This enables support for the Analogue & Micro ASP 83xx | ||
| 88 | board. | ||
| 89 | |||
| 90 | |||
| 82 | endif | 91 | endif |
| 83 | 92 | ||
| 84 | # used for usb | 93 | # used for usb |
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 7e6dd3e259d8..76494bed69ae 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile | |||
| @@ -12,3 +12,4 @@ obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o | |||
| 12 | obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o | 12 | obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o |
| 13 | obj-$(CONFIG_SBC834x) += sbc834x.o | 13 | obj-$(CONFIG_SBC834x) += sbc834x.o |
| 14 | obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o | 14 | obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o |
| 15 | obj-$(CONFIG_ASP834x) += asp834x.o | ||
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c new file mode 100644 index 000000000000..bb30d67ad0a2 --- /dev/null +++ b/arch/powerpc/platforms/83xx/asp834x.c | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | /* | ||
| 2 | * arch/powerpc/platforms/83xx/asp834x.c | ||
| 3 | * | ||
| 4 | * Analogue & Micro ASP8347 board specific routines | ||
| 5 | * clone of mpc834x_itx | ||
| 6 | * | ||
| 7 | * Copyright 2008 Codehermit | ||
| 8 | * | ||
| 9 | * Maintainer: Bryan O'Donoghue <bodonoghue@codhermit.ie> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify it | ||
| 12 | * under the terms of the GNU General Public License as published by the | ||
| 13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 14 | * option) any later version. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/pci.h> | ||
| 18 | #include <linux/of_platform.h> | ||
| 19 | |||
| 20 | #include <asm/time.h> | ||
| 21 | #include <asm/ipic.h> | ||
| 22 | #include <asm/udbg.h> | ||
| 23 | |||
| 24 | #include "mpc83xx.h" | ||
| 25 | |||
| 26 | /* ************************************************************************ | ||
| 27 | * | ||
| 28 | * Setup the architecture | ||
| 29 | * | ||
| 30 | */ | ||
| 31 | static void __init asp834x_setup_arch(void) | ||
| 32 | { | ||
| 33 | if (ppc_md.progress) | ||
| 34 | ppc_md.progress("asp834x_setup_arch()", 0); | ||
| 35 | |||
| 36 | mpc834x_usb_cfg(); | ||
| 37 | } | ||
| 38 | |||
| 39 | static void __init asp834x_init_IRQ(void) | ||
| 40 | { | ||
| 41 | struct device_node *np; | ||
| 42 | |||
| 43 | np = of_find_node_by_type(NULL, "ipic"); | ||
| 44 | if (!np) | ||
| 45 | return; | ||
| 46 | |||
| 47 | ipic_init(np, 0); | ||
| 48 | |||
| 49 | of_node_put(np); | ||
| 50 | |||
| 51 | /* Initialize the default interrupt mapping priorities, | ||
| 52 | * in case the boot rom changed something on us. | ||
| 53 | */ | ||
| 54 | ipic_set_default_priority(); | ||
| 55 | } | ||
| 56 | |||
| 57 | static struct __initdata of_device_id asp8347_ids[] = { | ||
| 58 | { .type = "soc", }, | ||
| 59 | { .compatible = "soc", }, | ||
| 60 | { .compatible = "simple-bus", }, | ||
| 61 | {}, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static int __init asp8347_declare_of_platform_devices(void) | ||
| 65 | { | ||
| 66 | of_platform_bus_probe(NULL, asp8347_ids, NULL); | ||
| 67 | return 0; | ||
| 68 | } | ||
| 69 | machine_device_initcall(asp834x, asp8347_declare_of_platform_devices); | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Called very early, MMU is off, device-tree isn't unflattened | ||
| 73 | */ | ||
| 74 | static int __init asp834x_probe(void) | ||
| 75 | { | ||
| 76 | unsigned long root = of_get_flat_dt_root(); | ||
| 77 | return of_flat_dt_is_compatible(root, "analogue-and-micro,asp8347e"); | ||
| 78 | } | ||
| 79 | |||
| 80 | define_machine(asp834x) { | ||
| 81 | .name = "ASP8347E", | ||
| 82 | .probe = asp834x_probe, | ||
| 83 | .setup_arch = asp834x_setup_arch, | ||
| 84 | .init_IRQ = asp834x_init_IRQ, | ||
| 85 | .get_irq = ipic_get_irq, | ||
| 86 | .restart = mpc83xx_restart, | ||
| 87 | .time_init = mpc83xx_time_init, | ||
| 88 | .calibrate_decr = generic_calibrate_decr, | ||
| 89 | .progress = udbg_progress, | ||
| 90 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index dfd8b4ad9b28..b010dc9dec65 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
| @@ -78,7 +78,8 @@ void __init mpc85xx_ds_pic_init(void) | |||
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | mpic = mpic_alloc(np, r.start, | 80 | mpic = mpic_alloc(np, r.start, |
| 81 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 81 | MPIC_PRIMARY | MPIC_WANTS_RESET | |
| 82 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, | ||
| 82 | 0, 256, " OpenPIC "); | 83 | 0, 256, " OpenPIC "); |
| 83 | BUG_ON(mpic == NULL); | 84 | BUG_ON(mpic == NULL); |
| 84 | 85 | ||
| @@ -195,6 +196,7 @@ static int __init mpc85xxds_publish_devices(void) | |||
| 195 | return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); | 196 | return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); |
| 196 | } | 197 | } |
| 197 | machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); | 198 | machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); |
| 199 | machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); | ||
| 198 | 200 | ||
| 199 | /* | 201 | /* |
| 200 | * Called very early, device-tree isn't unflattened | 202 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index dea13208bf64..eb16208b29d9 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
| @@ -70,7 +70,8 @@ static void __init mpc86xx_hpcd_init_irq(void) | |||
| 70 | 70 | ||
| 71 | /* Alloc mpic structure and per isu has 16 INT entries. */ | 71 | /* Alloc mpic structure and per isu has 16 INT entries. */ |
| 72 | mpic1 = mpic_alloc(np, res.start, | 72 | mpic1 = mpic_alloc(np, res.start, |
| 73 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 73 | MPIC_PRIMARY | MPIC_WANTS_RESET | |
| 74 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, | ||
| 74 | 0, 256, " MPIC "); | 75 | 0, 256, " MPIC "); |
| 75 | BUG_ON(mpic1 == NULL); | 76 | BUG_ON(mpic1 == NULL); |
| 76 | 77 | ||
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index c39f5c225f2e..8b055bce27fe 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
| 15 | #include <linux/msi.h> | 15 | #include <linux/msi.h> |
| 16 | #include <linux/of_platform.h> | 16 | #include <linux/of_platform.h> |
| 17 | #include <linux/debugfs.h> | ||
| 17 | 18 | ||
| 18 | #include <asm/dcr.h> | 19 | #include <asm/dcr.h> |
| 19 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
| @@ -69,8 +70,19 @@ struct axon_msic { | |||
| 69 | dma_addr_t fifo_phys; | 70 | dma_addr_t fifo_phys; |
| 70 | dcr_host_t dcr_host; | 71 | dcr_host_t dcr_host; |
| 71 | u32 read_offset; | 72 | u32 read_offset; |
| 73 | #ifdef DEBUG | ||
| 74 | u32 __iomem *trigger; | ||
| 75 | #endif | ||
| 72 | }; | 76 | }; |
| 73 | 77 | ||
| 78 | #ifdef DEBUG | ||
| 79 | void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic); | ||
| 80 | #else | ||
| 81 | static inline void axon_msi_debug_setup(struct device_node *dn, | ||
| 82 | struct axon_msic *msic) { } | ||
| 83 | #endif | ||
| 84 | |||
| 85 | |||
| 74 | static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) | 86 | static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) |
| 75 | { | 87 | { |
| 76 | pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); | 88 | pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); |
| @@ -381,6 +393,8 @@ static int axon_msi_probe(struct of_device *device, | |||
| 381 | ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs; | 393 | ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs; |
| 382 | ppc_md.msi_check_device = axon_msi_check_device; | 394 | ppc_md.msi_check_device = axon_msi_check_device; |
| 383 | 395 | ||
| 396 | axon_msi_debug_setup(dn, msic); | ||
| 397 | |||
| 384 | printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name); | 398 | printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name); |
| 385 | 399 | ||
| 386 | return 0; | 400 | return 0; |
| @@ -418,3 +432,47 @@ static int __init axon_msi_init(void) | |||
| 418 | return of_register_platform_driver(&axon_msi_driver); | 432 | return of_register_platform_driver(&axon_msi_driver); |
| 419 | } | 433 | } |
| 420 | subsys_initcall(axon_msi_init); | 434 | subsys_initcall(axon_msi_init); |
| 435 | |||
| 436 | |||
| 437 | #ifdef DEBUG | ||
| 438 | static int msic_set(void *data, u64 val) | ||
| 439 | { | ||
| 440 | struct axon_msic *msic = data; | ||
| 441 | out_le32(msic->trigger, val); | ||
| 442 | return 0; | ||
| 443 | } | ||
| 444 | |||
| 445 | static int msic_get(void *data, u64 *val) | ||
| 446 | { | ||
| 447 | *val = 0; | ||
| 448 | return 0; | ||
| 449 | } | ||
| 450 | |||
| 451 | DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n"); | ||
| 452 | |||
| 453 | void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic) | ||
| 454 | { | ||
| 455 | char name[8]; | ||
| 456 | u64 addr; | ||
| 457 | |||
| 458 | addr = of_translate_address(dn, of_get_property(dn, "reg", NULL)); | ||
| 459 | if (addr == OF_BAD_ADDR) { | ||
| 460 | pr_debug("axon_msi: couldn't translate reg property\n"); | ||
| 461 | return; | ||
| 462 | } | ||
| 463 | |||
| 464 | msic->trigger = ioremap(addr, 0x4); | ||
| 465 | if (!msic->trigger) { | ||
| 466 | pr_debug("axon_msi: ioremap failed\n"); | ||
| 467 | return; | ||
| 468 | } | ||
| 469 | |||
| 470 | snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn)); | ||
| 471 | |||
| 472 | if (!debugfs_create_file(name, 0600, powerpc_debugfs_root, | ||
| 473 | msic, &fops_msic)) { | ||
| 474 | pr_debug("axon_msi: debugfs_create_file failed!\n"); | ||
| 475 | return; | ||
| 476 | } | ||
| 477 | } | ||
| 478 | #endif /* DEBUG */ | ||
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 116babbaaf81..1ba7ce5aafae 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
| @@ -63,13 +63,6 @@ static struct mpic *chrp_mpic; | |||
| 63 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); | 63 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); |
| 64 | unsigned long event_scan_interval; | 64 | unsigned long event_scan_interval; |
| 65 | 65 | ||
| 66 | /* | ||
| 67 | * XXX this should be in xmon.h, but putting it there means xmon.h | ||
| 68 | * has to include <linux/interrupt.h> (to get irqreturn_t), which | ||
| 69 | * causes all sorts of problems. -- paulus | ||
| 70 | */ | ||
| 71 | extern irqreturn_t xmon_irq(int, void *); | ||
| 72 | |||
| 73 | extern unsigned long loops_per_jiffy; | 66 | extern unsigned long loops_per_jiffy; |
| 74 | 67 | ||
| 75 | /* To be replaced by RTAS when available */ | 68 | /* To be replaced by RTAS when available */ |
diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c index 9f7579b38c72..53bca132fb48 100644 --- a/arch/powerpc/platforms/maple/time.c +++ b/arch/powerpc/platforms/maple/time.c | |||
| @@ -41,8 +41,6 @@ | |||
| 41 | #define DBG(x...) | 41 | #define DBG(x...) |
| 42 | #endif | 42 | #endif |
| 43 | 43 | ||
| 44 | extern void GregorianDay(struct rtc_time * tm); | ||
| 45 | |||
| 46 | static int maple_rtc_addr; | 44 | static int maple_rtc_addr; |
| 47 | 45 | ||
| 48 | static int maple_clock_read(int addr) | 46 | static int maple_clock_read(int addr) |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 829b8b02527b..6d149ae8ffa7 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
| @@ -34,16 +34,10 @@ | |||
| 34 | #include <asm/time.h> | 34 | #include <asm/time.h> |
| 35 | #include <asm/pmac_feature.h> | 35 | #include <asm/pmac_feature.h> |
| 36 | #include <asm/mpic.h> | 36 | #include <asm/mpic.h> |
| 37 | #include <asm/xmon.h> | ||
| 37 | 38 | ||
| 38 | #include "pmac.h" | 39 | #include "pmac.h" |
| 39 | 40 | ||
| 40 | /* | ||
| 41 | * XXX this should be in xmon.h, but putting it there means xmon.h | ||
| 42 | * has to include <linux/interrupt.h> (to get irqreturn_t), which | ||
| 43 | * causes all sorts of problems. -- paulus | ||
| 44 | */ | ||
| 45 | extern irqreturn_t xmon_irq(int, void *); | ||
| 46 | |||
| 47 | #ifdef CONFIG_PPC32 | 41 | #ifdef CONFIG_PPC32 |
| 48 | struct pmac_irq_hw { | 42 | struct pmac_irq_hw { |
| 49 | unsigned int event; | 43 | unsigned int event; |
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c index 9d3a40f45974..5a707da3f5c2 100644 --- a/arch/powerpc/platforms/pseries/firmware.c +++ b/arch/powerpc/platforms/pseries/firmware.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | #include <asm/prom.h> | 26 | #include <asm/prom.h> |
| 27 | #include <asm/udbg.h> | 27 | #include <asm/udbg.h> |
| 28 | 28 | ||
| 29 | #include "pseries.h" | ||
| 29 | 30 | ||
| 30 | typedef struct { | 31 | typedef struct { |
| 31 | unsigned long val; | 32 | unsigned long val; |
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 176f1f39d2d5..9a12908510fb 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
| @@ -135,9 +135,10 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, | |||
| 135 | u64 rpn; | 135 | u64 rpn; |
| 136 | long l, limit; | 136 | long l, limit; |
| 137 | 137 | ||
| 138 | if (npages == 1) | 138 | if (npages == 1) { |
| 139 | return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, | 139 | tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, direction); |
| 140 | direction); | 140 | return; |
| 141 | } | ||
| 141 | 142 | ||
| 142 | tcep = __get_cpu_var(tce_page); | 143 | tcep = __get_cpu_var(tce_page); |
| 143 | 144 | ||
| @@ -147,9 +148,11 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, | |||
| 147 | if (!tcep) { | 148 | if (!tcep) { |
| 148 | tcep = (u64 *)__get_free_page(GFP_ATOMIC); | 149 | tcep = (u64 *)__get_free_page(GFP_ATOMIC); |
| 149 | /* If allocation fails, fall back to the loop implementation */ | 150 | /* If allocation fails, fall back to the loop implementation */ |
| 150 | if (!tcep) | 151 | if (!tcep) { |
| 151 | return tce_build_pSeriesLP(tbl, tcenum, npages, | 152 | tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, |
| 152 | uaddr, direction); | 153 | direction); |
| 154 | return; | ||
| 155 | } | ||
| 153 | __get_cpu_var(tce_page) = tcep; | 156 | __get_cpu_var(tce_page) = tcep; |
| 154 | } | 157 | } |
| 155 | 158 | ||
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 2cbaedb17f3e..3b4651b6ee05 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c | |||
| @@ -52,7 +52,7 @@ EXPORT_SYMBOL(plpar_hcall_norets); | |||
| 52 | extern void pSeries_find_serial_port(void); | 52 | extern void pSeries_find_serial_port(void); |
| 53 | 53 | ||
| 54 | 54 | ||
| 55 | int vtermno; /* virtual terminal# for udbg */ | 55 | static int vtermno; /* virtual terminal# for udbg */ |
| 56 | 56 | ||
| 57 | #define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) | 57 | #define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) |
| 58 | static void udbg_hvsi_putc(char c) | 58 | static void udbg_hvsi_putc(char c) |
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index 2b548afd1003..d20b96e22c2e 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
| @@ -55,7 +55,7 @@ | |||
| 55 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; | 55 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; |
| 56 | static DEFINE_SPINLOCK(ras_log_buf_lock); | 56 | static DEFINE_SPINLOCK(ras_log_buf_lock); |
| 57 | 57 | ||
| 58 | char mce_data_buf[RTAS_ERROR_LOG_MAX]; | 58 | static char mce_data_buf[RTAS_ERROR_LOG_MAX]; |
| 59 | 59 | ||
| 60 | static int ras_get_sensor_state_token; | 60 | static int ras_get_sensor_state_token; |
| 61 | static int ras_check_exception_token; | 61 | static int ras_check_exception_token; |
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c index 7d3e2b0bd4d2..c9ffd8c225f1 100644 --- a/arch/powerpc/platforms/pseries/rtasd.c +++ b/arch/powerpc/platforms/pseries/rtasd.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | 32 | ||
| 33 | static DEFINE_SPINLOCK(rtasd_log_lock); | 33 | static DEFINE_SPINLOCK(rtasd_log_lock); |
| 34 | 34 | ||
| 35 | DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); | 35 | static DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); |
| 36 | 36 | ||
| 37 | static char *rtas_log_buf; | 37 | static char *rtas_log_buf; |
| 38 | static unsigned long rtas_log_start; | 38 | static unsigned long rtas_log_start; |
| @@ -329,7 +329,7 @@ static unsigned int rtas_log_poll(struct file *file, poll_table * wait) | |||
| 329 | return 0; | 329 | return 0; |
| 330 | } | 330 | } |
| 331 | 331 | ||
| 332 | const struct file_operations proc_rtas_log_operations = { | 332 | static const struct file_operations proc_rtas_log_operations = { |
| 333 | .read = rtas_log_read, | 333 | .read = rtas_log_read, |
| 334 | .poll = rtas_log_poll, | 334 | .poll = rtas_log_poll, |
| 335 | .open = rtas_log_open, | 335 | .open = rtas_log_open, |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index f5d29f5b13c1..90beb444e1dd 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
| @@ -109,7 +109,7 @@ static void __init fwnmi_init(void) | |||
| 109 | fwnmi_active = 1; | 109 | fwnmi_active = 1; |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) | 112 | static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) |
| 113 | { | 113 | { |
| 114 | unsigned int cascade_irq = i8259_irq(); | 114 | unsigned int cascade_irq = i8259_irq(); |
| 115 | if (cascade_irq != NO_IRQ) | 115 | if (cascade_irq != NO_IRQ) |
| @@ -482,7 +482,7 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus) | |||
| 482 | * possible with power button press. If ibm,power-off-ups token is used | 482 | * possible with power button press. If ibm,power-off-ups token is used |
| 483 | * it will allow auto poweron after power is restored. | 483 | * it will allow auto poweron after power is restored. |
| 484 | */ | 484 | */ |
| 485 | void pSeries_power_off(void) | 485 | static void pSeries_power_off(void) |
| 486 | { | 486 | { |
| 487 | int rc; | 487 | int rc; |
| 488 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | 488 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); |
diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S new file mode 100644 index 000000000000..21cda085d926 --- /dev/null +++ b/arch/powerpc/sysdev/6xx-suspend.S | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | /* | ||
| 2 | * Enter and leave sleep state on chips with 6xx-style HID0 | ||
| 3 | * power management bits, which don't leave sleep state via reset. | ||
| 4 | * | ||
| 5 | * Author: Scott Wood <scottwood@freescale.com> | ||
| 6 | * | ||
| 7 | * Copyright (c) 2006-2007 Freescale Semiconductor, Inc. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify it | ||
| 10 | * under the terms of the GNU General Public License version 2 as published | ||
| 11 | * by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <asm/ppc_asm.h> | ||
| 15 | #include <asm/reg.h> | ||
| 16 | #include <asm/thread_info.h> | ||
| 17 | #include <asm/asm-offsets.h> | ||
| 18 | |||
| 19 | _GLOBAL(mpc6xx_enter_standby) | ||
| 20 | mflr r4 | ||
| 21 | |||
| 22 | mfspr r5, SPRN_HID0 | ||
| 23 | rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP) | ||
| 24 | oris r5, r5, HID0_SLEEP@h | ||
| 25 | mtspr SPRN_HID0, r5 | ||
| 26 | isync | ||
| 27 | |||
| 28 | lis r5, ret_from_standby@h | ||
| 29 | ori r5, r5, ret_from_standby@l | ||
| 30 | mtlr r5 | ||
| 31 | |||
| 32 | rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT | ||
| 33 | lwz r6, TI_LOCAL_FLAGS(r5) | ||
| 34 | ori r6, r6, _TLF_SLEEPING | ||
| 35 | stw r6, TI_LOCAL_FLAGS(r5) | ||
| 36 | |||
| 37 | mfmsr r5 | ||
| 38 | ori r5, r5, MSR_EE | ||
| 39 | oris r5, r5, MSR_POW@h | ||
| 40 | sync | ||
| 41 | mtmsr r5 | ||
| 42 | isync | ||
| 43 | |||
| 44 | 1: b 1b | ||
| 45 | |||
| 46 | ret_from_standby: | ||
| 47 | mfspr r5, SPRN_HID0 | ||
| 48 | rlwinm r5, r5, 0, ~HID0_SLEEP | ||
| 49 | mtspr SPRN_HID0, r5 | ||
| 50 | |||
| 51 | mtlr r4 | ||
| 52 | blr | ||
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 6d386d0071a0..dd6dff3ffb0f 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
| @@ -4,6 +4,7 @@ endif | |||
| 4 | 4 | ||
| 5 | mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o | 5 | mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o |
| 6 | obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) | 6 | obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) |
| 7 | fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o | ||
| 7 | 8 | ||
| 8 | obj-$(CONFIG_PPC_MPC106) += grackle.o | 9 | obj-$(CONFIG_PPC_MPC106) += grackle.o |
| 9 | obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o | 10 | obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o |
| @@ -11,7 +12,7 @@ obj-$(CONFIG_PPC_PMI) += pmi.o | |||
| 11 | obj-$(CONFIG_U3_DART) += dart_iommu.o | 12 | obj-$(CONFIG_U3_DART) += dart_iommu.o |
| 12 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o | 13 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
| 13 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 14 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
| 14 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o | 15 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) |
| 15 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o | 16 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o |
| 16 | obj-$(CONFIG_RAPIDIO) += fsl_rio.o | 17 | obj-$(CONFIG_RAPIDIO) += fsl_rio.o |
| 17 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o | 18 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o |
| @@ -44,3 +45,7 @@ obj-$(CONFIG_PPC_DCR) += dcr.o | |||
| 44 | obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o | 45 | obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o |
| 45 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o | 46 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o |
| 46 | endif | 47 | endif |
| 48 | |||
| 49 | ifeq ($(CONFIG_SUSPEND),y) | ||
| 50 | obj-$(CONFIG_6xx) += 6xx-suspend.o | ||
| 51 | endif | ||
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c index 437e48d3ae33..a8ba9983dd5a 100644 --- a/arch/powerpc/sysdev/dcr.c +++ b/arch/powerpc/sysdev/dcr.c | |||
| @@ -23,6 +23,107 @@ | |||
| 23 | #include <asm/prom.h> | 23 | #include <asm/prom.h> |
| 24 | #include <asm/dcr.h> | 24 | #include <asm/dcr.h> |
| 25 | 25 | ||
| 26 | #ifdef CONFIG_PPC_DCR_MMIO | ||
| 27 | static struct device_node *find_dcr_parent(struct device_node *node) | ||
| 28 | { | ||
| 29 | struct device_node *par, *tmp; | ||
| 30 | const u32 *p; | ||
| 31 | |||
| 32 | for (par = of_node_get(node); par;) { | ||
| 33 | if (of_get_property(par, "dcr-controller", NULL)) | ||
| 34 | break; | ||
| 35 | p = of_get_property(par, "dcr-parent", NULL); | ||
| 36 | tmp = par; | ||
| 37 | if (p == NULL) | ||
| 38 | par = of_get_parent(par); | ||
| 39 | else | ||
| 40 | par = of_find_node_by_phandle(*p); | ||
| 41 | of_node_put(tmp); | ||
| 42 | } | ||
| 43 | return par; | ||
| 44 | } | ||
| 45 | #endif | ||
| 46 | |||
| 47 | #if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) | ||
| 48 | |||
| 49 | bool dcr_map_ok_generic(dcr_host_t host) | ||
| 50 | { | ||
| 51 | if (host.type == DCR_HOST_NATIVE) | ||
| 52 | return dcr_map_ok_native(host.host.native); | ||
| 53 | else if (host.type == DCR_HOST_MMIO) | ||
| 54 | return dcr_map_ok_mmio(host.host.mmio); | ||
| 55 | else | ||
| 56 | return 0; | ||
| 57 | } | ||
| 58 | EXPORT_SYMBOL_GPL(dcr_map_ok_generic); | ||
| 59 | |||
| 60 | dcr_host_t dcr_map_generic(struct device_node *dev, | ||
| 61 | unsigned int dcr_n, | ||
| 62 | unsigned int dcr_c) | ||
| 63 | { | ||
| 64 | dcr_host_t host; | ||
| 65 | struct device_node *dp; | ||
| 66 | const char *prop; | ||
| 67 | |||
| 68 | host.type = DCR_HOST_INVALID; | ||
| 69 | |||
| 70 | dp = find_dcr_parent(dev); | ||
| 71 | if (dp == NULL) | ||
| 72 | return host; | ||
| 73 | |||
| 74 | prop = of_get_property(dp, "dcr-access-method", NULL); | ||
| 75 | |||
| 76 | pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop); | ||
| 77 | |||
| 78 | if (!strcmp(prop, "native")) { | ||
| 79 | host.type = DCR_HOST_NATIVE; | ||
| 80 | host.host.native = dcr_map_native(dev, dcr_n, dcr_c); | ||
| 81 | } else if (!strcmp(prop, "mmio")) { | ||
| 82 | host.type = DCR_HOST_MMIO; | ||
| 83 | host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c); | ||
| 84 | } | ||
| 85 | |||
| 86 | of_node_put(dp); | ||
| 87 | return host; | ||
| 88 | } | ||
| 89 | EXPORT_SYMBOL_GPL(dcr_map_generic); | ||
| 90 | |||
| 91 | void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c) | ||
| 92 | { | ||
| 93 | if (host.type == DCR_HOST_NATIVE) | ||
| 94 | dcr_unmap_native(host.host.native, dcr_c); | ||
| 95 | else if (host.type == DCR_HOST_MMIO) | ||
| 96 | dcr_unmap_mmio(host.host.mmio, dcr_c); | ||
| 97 | else /* host.type == DCR_HOST_INVALID */ | ||
| 98 | WARN_ON(true); | ||
| 99 | } | ||
| 100 | EXPORT_SYMBOL_GPL(dcr_unmap_generic); | ||
| 101 | |||
| 102 | u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n) | ||
| 103 | { | ||
| 104 | if (host.type == DCR_HOST_NATIVE) | ||
| 105 | return dcr_read_native(host.host.native, dcr_n); | ||
| 106 | else if (host.type == DCR_HOST_MMIO) | ||
| 107 | return dcr_read_mmio(host.host.mmio, dcr_n); | ||
| 108 | else /* host.type == DCR_HOST_INVALID */ | ||
| 109 | WARN_ON(true); | ||
| 110 | return 0; | ||
| 111 | } | ||
| 112 | EXPORT_SYMBOL_GPL(dcr_read_generic); | ||
| 113 | |||
| 114 | void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value) | ||
| 115 | { | ||
| 116 | if (host.type == DCR_HOST_NATIVE) | ||
| 117 | dcr_write_native(host.host.native, dcr_n, value); | ||
| 118 | else if (host.type == DCR_HOST_MMIO) | ||
| 119 | dcr_write_mmio(host.host.mmio, dcr_n, value); | ||
| 120 | else /* host.type == DCR_HOST_INVALID */ | ||
| 121 | WARN_ON(true); | ||
| 122 | } | ||
| 123 | EXPORT_SYMBOL_GPL(dcr_write_generic); | ||
| 124 | |||
| 125 | #endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ | ||
| 126 | |||
| 26 | unsigned int dcr_resource_start(struct device_node *np, unsigned int index) | 127 | unsigned int dcr_resource_start(struct device_node *np, unsigned int index) |
| 27 | { | 128 | { |
| 28 | unsigned int ds; | 129 | unsigned int ds; |
| @@ -47,26 +148,7 @@ unsigned int dcr_resource_len(struct device_node *np, unsigned int index) | |||
| 47 | } | 148 | } |
| 48 | EXPORT_SYMBOL_GPL(dcr_resource_len); | 149 | EXPORT_SYMBOL_GPL(dcr_resource_len); |
| 49 | 150 | ||
| 50 | #ifndef CONFIG_PPC_DCR_NATIVE | 151 | #ifdef CONFIG_PPC_DCR_MMIO |
| 51 | |||
| 52 | static struct device_node * find_dcr_parent(struct device_node * node) | ||
| 53 | { | ||
| 54 | struct device_node *par, *tmp; | ||
| 55 | const u32 *p; | ||
| 56 | |||
| 57 | for (par = of_node_get(node); par;) { | ||
| 58 | if (of_get_property(par, "dcr-controller", NULL)) | ||
| 59 | break; | ||
| 60 | p = of_get_property(par, "dcr-parent", NULL); | ||
| 61 | tmp = par; | ||
| 62 | if (p == NULL) | ||
| 63 | par = of_get_parent(par); | ||
| 64 | else | ||
| 65 | par = of_find_node_by_phandle(*p); | ||
| 66 | of_node_put(tmp); | ||
| 67 | } | ||
| 68 | return par; | ||
| 69 | } | ||
| 70 | 152 | ||
| 71 | u64 of_translate_dcr_address(struct device_node *dev, | 153 | u64 of_translate_dcr_address(struct device_node *dev, |
| 72 | unsigned int dcr_n, | 154 | unsigned int dcr_n, |
| @@ -75,7 +157,7 @@ u64 of_translate_dcr_address(struct device_node *dev, | |||
| 75 | struct device_node *dp; | 157 | struct device_node *dp; |
| 76 | const u32 *p; | 158 | const u32 *p; |
| 77 | unsigned int stride; | 159 | unsigned int stride; |
| 78 | u64 ret; | 160 | u64 ret = OF_BAD_ADDR; |
| 79 | 161 | ||
| 80 | dp = find_dcr_parent(dev); | 162 | dp = find_dcr_parent(dev); |
| 81 | if (dp == NULL) | 163 | if (dp == NULL) |
| @@ -90,7 +172,7 @@ u64 of_translate_dcr_address(struct device_node *dev, | |||
| 90 | if (p == NULL) | 172 | if (p == NULL) |
| 91 | p = of_get_property(dp, "dcr-mmio-space", NULL); | 173 | p = of_get_property(dp, "dcr-mmio-space", NULL); |
| 92 | if (p == NULL) | 174 | if (p == NULL) |
| 93 | return OF_BAD_ADDR; | 175 | goto done; |
| 94 | 176 | ||
| 95 | /* Maybe could do some better range checking here */ | 177 | /* Maybe could do some better range checking here */ |
| 96 | ret = of_translate_address(dp, p); | 178 | ret = of_translate_address(dp, p); |
| @@ -98,21 +180,25 @@ u64 of_translate_dcr_address(struct device_node *dev, | |||
| 98 | ret += (u64)(stride) * (u64)dcr_n; | 180 | ret += (u64)(stride) * (u64)dcr_n; |
| 99 | if (out_stride) | 181 | if (out_stride) |
| 100 | *out_stride = stride; | 182 | *out_stride = stride; |
| 183 | |||
| 184 | done: | ||
| 185 | of_node_put(dp); | ||
| 101 | return ret; | 186 | return ret; |
| 102 | } | 187 | } |
| 103 | 188 | ||
| 104 | dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, | 189 | dcr_host_mmio_t dcr_map_mmio(struct device_node *dev, |
| 105 | unsigned int dcr_c) | 190 | unsigned int dcr_n, |
| 191 | unsigned int dcr_c) | ||
| 106 | { | 192 | { |
| 107 | dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; | 193 | dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; |
| 108 | u64 addr; | 194 | u64 addr; |
| 109 | 195 | ||
| 110 | pr_debug("dcr_map(%s, 0x%x, 0x%x)\n", | 196 | pr_debug("dcr_map(%s, 0x%x, 0x%x)\n", |
| 111 | dev->full_name, dcr_n, dcr_c); | 197 | dev->full_name, dcr_n, dcr_c); |
| 112 | 198 | ||
| 113 | addr = of_translate_dcr_address(dev, dcr_n, &ret.stride); | 199 | addr = of_translate_dcr_address(dev, dcr_n, &ret.stride); |
| 114 | pr_debug("translates to addr: 0x%lx, stride: 0x%x\n", | 200 | pr_debug("translates to addr: 0x%llx, stride: 0x%x\n", |
| 115 | addr, ret.stride); | 201 | (unsigned long long) addr, ret.stride); |
| 116 | if (addr == OF_BAD_ADDR) | 202 | if (addr == OF_BAD_ADDR) |
| 117 | return ret; | 203 | return ret; |
| 118 | pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride); | 204 | pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride); |
| @@ -124,11 +210,11 @@ dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, | |||
| 124 | ret.token -= dcr_n * ret.stride; | 210 | ret.token -= dcr_n * ret.stride; |
| 125 | return ret; | 211 | return ret; |
| 126 | } | 212 | } |
| 127 | EXPORT_SYMBOL_GPL(dcr_map); | 213 | EXPORT_SYMBOL_GPL(dcr_map_mmio); |
| 128 | 214 | ||
| 129 | void dcr_unmap(dcr_host_t host, unsigned int dcr_c) | 215 | void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c) |
| 130 | { | 216 | { |
| 131 | dcr_host_t h = host; | 217 | dcr_host_mmio_t h = host; |
| 132 | 218 | ||
| 133 | if (h.token == NULL) | 219 | if (h.token == NULL) |
| 134 | return; | 220 | return; |
| @@ -136,7 +222,11 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_c) | |||
| 136 | iounmap(h.token); | 222 | iounmap(h.token); |
| 137 | h.token = NULL; | 223 | h.token = NULL; |
| 138 | } | 224 | } |
| 139 | EXPORT_SYMBOL_GPL(dcr_unmap); | 225 | EXPORT_SYMBOL_GPL(dcr_unmap_mmio); |
| 140 | #else /* defined(CONFIG_PPC_DCR_NATIVE) */ | 226 | |
| 227 | #endif /* defined(CONFIG_PPC_DCR_MMIO) */ | ||
| 228 | |||
| 229 | #ifdef CONFIG_PPC_DCR_NATIVE | ||
| 141 | DEFINE_SPINLOCK(dcr_ind_lock); | 230 | DEFINE_SPINLOCK(dcr_ind_lock); |
| 142 | #endif /* !defined(CONFIG_PPC_DCR_NATIVE) */ | 231 | #endif /* defined(CONFIG_PPC_DCR_NATIVE) */ |
| 232 | |||
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c new file mode 100644 index 000000000000..2c5187cc8a24 --- /dev/null +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
| @@ -0,0 +1,429 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. | ||
| 3 | * | ||
| 4 | * Author: Tony Li <tony.li@freescale.com> | ||
| 5 | * Jason Jin <Jason.jin@freescale.com> | ||
| 6 | * | ||
| 7 | * The hwirq alloc and free code reuse from sysdev/mpic_msi.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or | ||
| 10 | * modify it under the terms of the GNU General Public License | ||
| 11 | * as published by the Free Software Foundation; version 2 of the | ||
| 12 | * License. | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/bootmem.h> | ||
| 17 | #include <linux/bitmap.h> | ||
| 18 | #include <linux/msi.h> | ||
| 19 | #include <linux/pci.h> | ||
| 20 | #include <linux/of_platform.h> | ||
| 21 | #include <sysdev/fsl_soc.h> | ||
| 22 | #include <asm/prom.h> | ||
| 23 | #include <asm/hw_irq.h> | ||
| 24 | #include <asm/ppc-pci.h> | ||
| 25 | #include "fsl_msi.h" | ||
| 26 | |||
| 27 | struct fsl_msi_feature { | ||
| 28 | u32 fsl_pic_ip; | ||
| 29 | u32 msiir_offset; | ||
| 30 | }; | ||
| 31 | |||
| 32 | static struct fsl_msi *fsl_msi; | ||
| 33 | |||
| 34 | static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg) | ||
| 35 | { | ||
| 36 | return in_be32(base + (reg >> 2)); | ||
| 37 | } | ||
| 38 | |||
| 39 | /* | ||
| 40 | * We do not need this actually. The MSIR register has been read once | ||
| 41 | * in the cascade interrupt. So, this MSI interrupt has been acked | ||
| 42 | */ | ||
| 43 | static void fsl_msi_end_irq(unsigned int virq) | ||
| 44 | { | ||
| 45 | } | ||
| 46 | |||
| 47 | static struct irq_chip fsl_msi_chip = { | ||
| 48 | .mask = mask_msi_irq, | ||
| 49 | .unmask = unmask_msi_irq, | ||
| 50 | .ack = fsl_msi_end_irq, | ||
| 51 | .typename = " FSL-MSI ", | ||
| 52 | }; | ||
| 53 | |||
| 54 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | ||
| 55 | irq_hw_number_t hw) | ||
| 56 | { | ||
| 57 | struct irq_chip *chip = &fsl_msi_chip; | ||
| 58 | |||
| 59 | get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; | ||
| 60 | |||
| 61 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); | ||
| 62 | |||
| 63 | return 0; | ||
| 64 | } | ||
| 65 | |||
| 66 | static struct irq_host_ops fsl_msi_host_ops = { | ||
| 67 | .map = fsl_msi_host_map, | ||
| 68 | }; | ||
| 69 | |||
| 70 | static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num) | ||
| 71 | { | ||
| 72 | unsigned long flags; | ||
| 73 | int order = get_count_order(num); | ||
| 74 | int offset; | ||
| 75 | |||
| 76 | spin_lock_irqsave(&msi->bitmap_lock, flags); | ||
| 77 | |||
| 78 | offset = bitmap_find_free_region(msi->fsl_msi_bitmap, | ||
| 79 | NR_MSI_IRQS, order); | ||
| 80 | |||
| 81 | spin_unlock_irqrestore(&msi->bitmap_lock, flags); | ||
| 82 | |||
| 83 | pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n", | ||
| 84 | __func__, num, order, offset); | ||
| 85 | |||
| 86 | return offset; | ||
| 87 | } | ||
| 88 | |||
| 89 | static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num) | ||
| 90 | { | ||
| 91 | unsigned long flags; | ||
| 92 | int order = get_count_order(num); | ||
| 93 | |||
| 94 | pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n", | ||
| 95 | __func__, num, order, offset); | ||
| 96 | |||
| 97 | spin_lock_irqsave(&msi->bitmap_lock, flags); | ||
| 98 | bitmap_release_region(msi->fsl_msi_bitmap, offset, order); | ||
| 99 | spin_unlock_irqrestore(&msi->bitmap_lock, flags); | ||
| 100 | } | ||
| 101 | |||
| 102 | static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) | ||
| 103 | { | ||
| 104 | int i; | ||
| 105 | int len; | ||
| 106 | const u32 *p; | ||
| 107 | |||
| 108 | bitmap_allocate_region(msi->fsl_msi_bitmap, 0, | ||
| 109 | get_count_order(NR_MSI_IRQS)); | ||
| 110 | |||
| 111 | p = of_get_property(msi->of_node, "msi-available-ranges", &len); | ||
| 112 | |||
| 113 | if (!p) { | ||
| 114 | /* No msi-available-ranges property, | ||
| 115 | * All the 256 MSI interrupts can be used | ||
| 116 | */ | ||
| 117 | fsl_msi_free_hwirqs(msi, 0, 0x100); | ||
| 118 | return 0; | ||
| 119 | } | ||
| 120 | |||
| 121 | if ((len % (2 * sizeof(u32))) != 0) { | ||
| 122 | printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges " | ||
| 123 | "property on %s\n", msi->of_node->full_name); | ||
| 124 | return -EINVAL; | ||
| 125 | } | ||
| 126 | |||
| 127 | /* Format is: (<u32 start> <u32 count>)+ */ | ||
| 128 | len /= 2 * sizeof(u32); | ||
| 129 | for (i = 0; i < len; i++, p += 2) | ||
| 130 | fsl_msi_free_hwirqs(msi, *p, *(p + 1)); | ||
| 131 | |||
| 132 | return 0; | ||
| 133 | } | ||
| 134 | |||
| 135 | static int fsl_msi_init_allocator(struct fsl_msi *msi_data) | ||
| 136 | { | ||
| 137 | int rc; | ||
| 138 | int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32); | ||
| 139 | |||
| 140 | msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL); | ||
| 141 | |||
| 142 | if (msi_data->fsl_msi_bitmap == NULL) { | ||
| 143 | pr_debug("%s: ENOMEM allocating allocator bitmap!\n", | ||
| 144 | __func__); | ||
| 145 | return -ENOMEM; | ||
| 146 | } | ||
| 147 | |||
| 148 | rc = fsl_msi_free_dt_hwirqs(msi_data); | ||
| 149 | if (rc) | ||
| 150 | goto out_free; | ||
| 151 | |||
| 152 | return 0; | ||
| 153 | out_free: | ||
| 154 | kfree(msi_data->fsl_msi_bitmap); | ||
| 155 | |||
| 156 | msi_data->fsl_msi_bitmap = NULL; | ||
| 157 | return rc; | ||
| 158 | |||
| 159 | } | ||
| 160 | |||
| 161 | static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type) | ||
| 162 | { | ||
| 163 | if (type == PCI_CAP_ID_MSIX) | ||
| 164 | pr_debug("fslmsi: MSI-X untested, trying anyway.\n"); | ||
| 165 | |||
| 166 | return 0; | ||
| 167 | } | ||
| 168 | |||
| 169 | static void fsl_teardown_msi_irqs(struct pci_dev *pdev) | ||
| 170 | { | ||
| 171 | struct msi_desc *entry; | ||
| 172 | struct fsl_msi *msi_data = fsl_msi; | ||
| 173 | |||
| 174 | list_for_each_entry(entry, &pdev->msi_list, list) { | ||
| 175 | if (entry->irq == NO_IRQ) | ||
| 176 | continue; | ||
| 177 | set_irq_msi(entry->irq, NULL); | ||
| 178 | fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1); | ||
| 179 | irq_dispose_mapping(entry->irq); | ||
| 180 | } | ||
| 181 | |||
| 182 | return; | ||
| 183 | } | ||
| 184 | |||
| 185 | static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, | ||
| 186 | struct msi_msg *msg) | ||
| 187 | { | ||
| 188 | struct fsl_msi *msi_data = fsl_msi; | ||
| 189 | |||
| 190 | msg->address_lo = msi_data->msi_addr_lo; | ||
| 191 | msg->address_hi = msi_data->msi_addr_hi; | ||
| 192 | msg->data = hwirq; | ||
| 193 | |||
| 194 | pr_debug("%s: allocated srs: %d, ibs: %d\n", | ||
| 195 | __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG); | ||
| 196 | } | ||
| 197 | |||
| 198 | static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | ||
| 199 | { | ||
| 200 | irq_hw_number_t hwirq; | ||
| 201 | int rc; | ||
| 202 | unsigned int virq; | ||
| 203 | struct msi_desc *entry; | ||
| 204 | struct msi_msg msg; | ||
| 205 | struct fsl_msi *msi_data = fsl_msi; | ||
| 206 | |||
| 207 | list_for_each_entry(entry, &pdev->msi_list, list) { | ||
| 208 | hwirq = fsl_msi_alloc_hwirqs(msi_data, 1); | ||
| 209 | if (hwirq < 0) { | ||
| 210 | rc = hwirq; | ||
| 211 | pr_debug("%s: fail allocating msi interrupt\n", | ||
| 212 | __func__); | ||
| 213 | goto out_free; | ||
| 214 | } | ||
| 215 | |||
| 216 | virq = irq_create_mapping(msi_data->irqhost, hwirq); | ||
| 217 | |||
| 218 | if (virq == NO_IRQ) { | ||
| 219 | pr_debug("%s: fail mapping hwirq 0x%lx\n", | ||
| 220 | __func__, hwirq); | ||
| 221 | fsl_msi_free_hwirqs(msi_data, hwirq, 1); | ||
| 222 | rc = -ENOSPC; | ||
| 223 | goto out_free; | ||
| 224 | } | ||
| 225 | set_irq_msi(virq, entry); | ||
| 226 | |||
| 227 | fsl_compose_msi_msg(pdev, hwirq, &msg); | ||
| 228 | write_msi_msg(virq, &msg); | ||
| 229 | } | ||
| 230 | return 0; | ||
| 231 | |||
| 232 | out_free: | ||
| 233 | return rc; | ||
| 234 | } | ||
| 235 | |||
| 236 | static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | ||
| 237 | { | ||
| 238 | unsigned int cascade_irq; | ||
| 239 | struct fsl_msi *msi_data = fsl_msi; | ||
| 240 | int msir_index = -1; | ||
| 241 | u32 msir_value = 0; | ||
| 242 | u32 intr_index; | ||
| 243 | u32 have_shift = 0; | ||
| 244 | |||
| 245 | spin_lock(&desc->lock); | ||
| 246 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { | ||
| 247 | if (desc->chip->mask_ack) | ||
| 248 | desc->chip->mask_ack(irq); | ||
| 249 | else { | ||
| 250 | desc->chip->mask(irq); | ||
| 251 | desc->chip->ack(irq); | ||
| 252 | } | ||
| 253 | } | ||
| 254 | |||
| 255 | if (unlikely(desc->status & IRQ_INPROGRESS)) | ||
| 256 | goto unlock; | ||
| 257 | |||
| 258 | msir_index = (int)desc->handler_data; | ||
| 259 | |||
| 260 | if (msir_index >= NR_MSI_REG) | ||
| 261 | cascade_irq = NO_IRQ; | ||
| 262 | |||
| 263 | desc->status |= IRQ_INPROGRESS; | ||
| 264 | switch (fsl_msi->feature & FSL_PIC_IP_MASK) { | ||
| 265 | case FSL_PIC_IP_MPIC: | ||
| 266 | msir_value = fsl_msi_read(msi_data->msi_regs, | ||
| 267 | msir_index * 0x10); | ||
| 268 | break; | ||
| 269 | case FSL_PIC_IP_IPIC: | ||
| 270 | msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4); | ||
| 271 | break; | ||
| 272 | } | ||
| 273 | |||
| 274 | while (msir_value) { | ||
| 275 | intr_index = ffs(msir_value) - 1; | ||
| 276 | |||
| 277 | cascade_irq = irq_linear_revmap(msi_data->irqhost, | ||
| 278 | msir_index * IRQS_PER_MSI_REG + | ||
| 279 | intr_index + have_shift); | ||
| 280 | if (cascade_irq != NO_IRQ) | ||
| 281 | generic_handle_irq(cascade_irq); | ||
| 282 | have_shift += intr_index + 1; | ||
| 283 | msir_value = msir_value >> (intr_index + 1); | ||
| 284 | } | ||
| 285 | desc->status &= ~IRQ_INPROGRESS; | ||
| 286 | |||
| 287 | switch (msi_data->feature & FSL_PIC_IP_MASK) { | ||
| 288 | case FSL_PIC_IP_MPIC: | ||
| 289 | desc->chip->eoi(irq); | ||
| 290 | break; | ||
| 291 | case FSL_PIC_IP_IPIC: | ||
| 292 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | ||
| 293 | desc->chip->unmask(irq); | ||
| 294 | break; | ||
| 295 | } | ||
| 296 | unlock: | ||
| 297 | spin_unlock(&desc->lock); | ||
| 298 | } | ||
| 299 | |||
| 300 | static int __devinit fsl_of_msi_probe(struct of_device *dev, | ||
| 301 | const struct of_device_id *match) | ||
| 302 | { | ||
| 303 | struct fsl_msi *msi; | ||
| 304 | struct resource res; | ||
| 305 | int err, i, count; | ||
| 306 | int rc; | ||
| 307 | int virt_msir; | ||
| 308 | const u32 *p; | ||
| 309 | struct fsl_msi_feature *features = match->data; | ||
| 310 | |||
| 311 | printk(KERN_DEBUG "Setting up Freescale MSI support\n"); | ||
| 312 | |||
| 313 | msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL); | ||
| 314 | if (!msi) { | ||
| 315 | dev_err(&dev->dev, "No memory for MSI structure\n"); | ||
| 316 | err = -ENOMEM; | ||
| 317 | goto error_out; | ||
| 318 | } | ||
| 319 | |||
| 320 | msi->of_node = of_node_get(dev->node); | ||
| 321 | |||
| 322 | msi->irqhost = irq_alloc_host(of_node_get(dev->node), | ||
| 323 | IRQ_HOST_MAP_LINEAR, | ||
| 324 | NR_MSI_IRQS, &fsl_msi_host_ops, 0); | ||
| 325 | if (msi->irqhost == NULL) { | ||
| 326 | dev_err(&dev->dev, "No memory for MSI irqhost\n"); | ||
| 327 | of_node_put(dev->node); | ||
| 328 | err = -ENOMEM; | ||
| 329 | goto error_out; | ||
| 330 | } | ||
| 331 | |||
| 332 | /* Get the MSI reg base */ | ||
| 333 | err = of_address_to_resource(dev->node, 0, &res); | ||
| 334 | if (err) { | ||
| 335 | dev_err(&dev->dev, "%s resource error!\n", | ||
| 336 | dev->node->full_name); | ||
| 337 | goto error_out; | ||
| 338 | } | ||
| 339 | |||
| 340 | msi->msi_regs = ioremap(res.start, res.end - res.start + 1); | ||
| 341 | if (!msi->msi_regs) { | ||
| 342 | dev_err(&dev->dev, "ioremap problem failed\n"); | ||
| 343 | goto error_out; | ||
| 344 | } | ||
| 345 | |||
| 346 | msi->feature = features->fsl_pic_ip; | ||
| 347 | |||
| 348 | msi->irqhost->host_data = msi; | ||
| 349 | |||
| 350 | msi->msi_addr_hi = 0x0; | ||
| 351 | msi->msi_addr_lo = res.start + features->msiir_offset; | ||
| 352 | |||
| 353 | rc = fsl_msi_init_allocator(msi); | ||
| 354 | if (rc) { | ||
| 355 | dev_err(&dev->dev, "Error allocating MSI bitmap\n"); | ||
| 356 | goto error_out; | ||
| 357 | } | ||
| 358 | |||
| 359 | p = of_get_property(dev->node, "interrupts", &count); | ||
| 360 | if (!p) { | ||
| 361 | dev_err(&dev->dev, "no interrupts property found on %s\n", | ||
| 362 | dev->node->full_name); | ||
| 363 | err = -ENODEV; | ||
| 364 | goto error_out; | ||
| 365 | } | ||
| 366 | if (count % 8 != 0) { | ||
| 367 | dev_err(&dev->dev, "Malformed interrupts property on %s\n", | ||
| 368 | dev->node->full_name); | ||
| 369 | err = -EINVAL; | ||
| 370 | goto error_out; | ||
| 371 | } | ||
| 372 | |||
| 373 | count /= sizeof(u32); | ||
| 374 | for (i = 0; i < count / 2; i++) { | ||
| 375 | if (i > NR_MSI_REG) | ||
| 376 | break; | ||
| 377 | virt_msir = irq_of_parse_and_map(dev->node, i); | ||
| 378 | if (virt_msir != NO_IRQ) { | ||
| 379 | set_irq_data(virt_msir, (void *)i); | ||
| 380 | set_irq_chained_handler(virt_msir, fsl_msi_cascade); | ||
| 381 | } | ||
| 382 | } | ||
| 383 | |||
| 384 | fsl_msi = msi; | ||
| 385 | |||
| 386 | WARN_ON(ppc_md.setup_msi_irqs); | ||
| 387 | ppc_md.setup_msi_irqs = fsl_setup_msi_irqs; | ||
| 388 | ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs; | ||
| 389 | ppc_md.msi_check_device = fsl_msi_check_device; | ||
| 390 | return 0; | ||
| 391 | error_out: | ||
| 392 | kfree(msi); | ||
| 393 | return err; | ||
| 394 | } | ||
| 395 | |||
| 396 | static const struct fsl_msi_feature mpic_msi_feature = { | ||
| 397 | .fsl_pic_ip = FSL_PIC_IP_MPIC, | ||
| 398 | .msiir_offset = 0x140, | ||
| 399 | }; | ||
| 400 | |||
| 401 | static const struct fsl_msi_feature ipic_msi_feature = { | ||
| 402 | .fsl_pic_ip = FSL_PIC_IP_IPIC, | ||
| 403 | .msiir_offset = 0x38, | ||
| 404 | }; | ||
| 405 | |||
| 406 | static const struct of_device_id fsl_of_msi_ids[] = { | ||
| 407 | { | ||
| 408 | .compatible = "fsl,mpic-msi", | ||
| 409 | .data = (void *)&mpic_msi_feature, | ||
| 410 | }, | ||
| 411 | { | ||
| 412 | .compatible = "fsl,ipic-msi", | ||
| 413 | .data = (void *)&ipic_msi_feature, | ||
| 414 | }, | ||
| 415 | {} | ||
| 416 | }; | ||
| 417 | |||
| 418 | static struct of_platform_driver fsl_of_msi_driver = { | ||
| 419 | .name = "fsl-msi", | ||
| 420 | .match_table = fsl_of_msi_ids, | ||
| 421 | .probe = fsl_of_msi_probe, | ||
| 422 | }; | ||
| 423 | |||
| 424 | static __init int fsl_of_msi_init(void) | ||
| 425 | { | ||
| 426 | return of_register_platform_driver(&fsl_of_msi_driver); | ||
| 427 | } | ||
| 428 | |||
| 429 | subsys_initcall(fsl_of_msi_init); | ||
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h new file mode 100644 index 000000000000..a653468521fa --- /dev/null +++ b/arch/powerpc/sysdev/fsl_msi.h | |||
| @@ -0,0 +1,42 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. | ||
| 3 | * | ||
| 4 | * Author: Tony Li <tony.li@freescale.com> | ||
| 5 | * Jason Jin <Jason.jin@freescale.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or | ||
| 8 | * modify it under the terms of the GNU General Public License | ||
| 9 | * as published by the Free Software Foundation; version 2 of the | ||
| 10 | * License. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | #ifndef _POWERPC_SYSDEV_FSL_MSI_H | ||
| 14 | #define _POWERPC_SYSDEV_FSL_MSI_H | ||
| 15 | |||
| 16 | #define NR_MSI_REG 8 | ||
| 17 | #define IRQS_PER_MSI_REG 32 | ||
| 18 | #define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG) | ||
| 19 | |||
| 20 | #define FSL_PIC_IP_MASK 0x0000000F | ||
| 21 | #define FSL_PIC_IP_MPIC 0x00000001 | ||
| 22 | #define FSL_PIC_IP_IPIC 0x00000002 | ||
| 23 | |||
| 24 | struct fsl_msi { | ||
| 25 | /* Device node of the MSI interrupt*/ | ||
| 26 | struct device_node *of_node; | ||
| 27 | |||
| 28 | struct irq_host *irqhost; | ||
| 29 | |||
| 30 | unsigned long cascade_irq; | ||
| 31 | |||
| 32 | u32 msi_addr_lo; | ||
| 33 | u32 msi_addr_hi; | ||
| 34 | void __iomem *msi_regs; | ||
| 35 | u32 feature; | ||
| 36 | |||
| 37 | unsigned long *fsl_msi_bitmap; | ||
| 38 | spinlock_t bitmap_lock; | ||
| 39 | }; | ||
| 40 | |||
| 41 | #endif /* _POWERPC_SYSDEV_FSL_MSI_H */ | ||
| 42 | |||
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index bf13c2174a4e..489ca5a397b1 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
| @@ -106,6 +106,16 @@ void __init setup_pci_cmd(struct pci_controller *hose) | |||
| 106 | } | 106 | } |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | static void __init setup_pci_pcsrbar(struct pci_controller *hose) | ||
| 110 | { | ||
| 111 | #ifdef CONFIG_PCI_MSI | ||
| 112 | phys_addr_t immr_base; | ||
| 113 | |||
| 114 | immr_base = get_immrbase(); | ||
| 115 | early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base); | ||
| 116 | #endif | ||
| 117 | } | ||
| 118 | |||
| 109 | static int fsl_pcie_bus_fixup; | 119 | static int fsl_pcie_bus_fixup; |
| 110 | 120 | ||
| 111 | static void __init quirk_fsl_pcie_header(struct pci_dev *dev) | 121 | static void __init quirk_fsl_pcie_header(struct pci_dev *dev) |
| @@ -211,6 +221,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) | |||
| 211 | /* Setup PEX window registers */ | 221 | /* Setup PEX window registers */ |
| 212 | setup_pci_atmu(hose, &rsrc); | 222 | setup_pci_atmu(hose, &rsrc); |
| 213 | 223 | ||
| 224 | /* Setup PEXCSRBAR */ | ||
| 225 | setup_pci_pcsrbar(hose); | ||
| 214 | return 0; | 226 | return 0; |
| 215 | } | 227 | } |
| 216 | 228 | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 019657c110b6..ca54563d5c7e 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
| @@ -433,6 +433,7 @@ static struct i2c_driver_device i2c_devices[] __initdata = { | |||
| 433 | {"dallas,ds1340", "ds1340"}, | 433 | {"dallas,ds1340", "ds1340"}, |
| 434 | {"stm,m41t00", "m41t00"}, | 434 | {"stm,m41t00", "m41t00"}, |
| 435 | {"dallas,ds1374", "ds1374"}, | 435 | {"dallas,ds1374", "ds1374"}, |
| 436 | {"cirrus,cs4270", "cs4270"}, | ||
| 436 | }; | 437 | }; |
| 437 | 438 | ||
| 438 | static int __init of_find_i2c_driver(struct device_node *node, | 439 | static int __init of_find_i2c_driver(struct device_node *node, |
| @@ -448,6 +449,10 @@ static int __init of_find_i2c_driver(struct device_node *node, | |||
| 448 | return -ENOMEM; | 449 | return -ENOMEM; |
| 449 | return 0; | 450 | return 0; |
| 450 | } | 451 | } |
| 452 | |||
| 453 | pr_warning("fsl_soc.c: unrecognized i2c node %s\n", | ||
| 454 | (const char *) of_get_property(node, "compatible", NULL)); | ||
| 455 | |||
| 451 | return -ENODEV; | 456 | return -ENODEV; |
| 452 | } | 457 | } |
| 453 | 458 | ||
| @@ -491,6 +496,8 @@ static int __init fsl_i2c_of_init(void) | |||
| 491 | struct resource r[2]; | 496 | struct resource r[2]; |
| 492 | struct fsl_i2c_platform_data i2c_data; | 497 | struct fsl_i2c_platform_data i2c_data; |
| 493 | const unsigned char *flags = NULL; | 498 | const unsigned char *flags = NULL; |
| 499 | int idx; | ||
| 500 | const u32 *iprop; | ||
| 494 | 501 | ||
| 495 | memset(&r, 0, sizeof(r)); | 502 | memset(&r, 0, sizeof(r)); |
| 496 | memset(&i2c_data, 0, sizeof(i2c_data)); | 503 | memset(&i2c_data, 0, sizeof(i2c_data)); |
| @@ -501,7 +508,10 @@ static int __init fsl_i2c_of_init(void) | |||
| 501 | 508 | ||
| 502 | of_irq_to_resource(np, 0, &r[1]); | 509 | of_irq_to_resource(np, 0, &r[1]); |
| 503 | 510 | ||
| 504 | i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); | 511 | iprop = of_get_property(np, "cell-index", NULL); |
| 512 | idx = iprop ? *iprop : i; | ||
| 513 | |||
| 514 | i2c_dev = platform_device_register_simple("fsl-i2c", idx, r, 2); | ||
| 505 | if (IS_ERR(i2c_dev)) { | 515 | if (IS_ERR(i2c_dev)) { |
| 506 | ret = PTR_ERR(i2c_dev); | 516 | ret = PTR_ERR(i2c_dev); |
| 507 | goto err; | 517 | goto err; |
| @@ -523,7 +533,8 @@ static int __init fsl_i2c_of_init(void) | |||
| 523 | if (ret) | 533 | if (ret) |
| 524 | goto unreg; | 534 | goto unreg; |
| 525 | 535 | ||
| 526 | of_register_i2c_devices(np, i++); | 536 | of_register_i2c_devices(np, idx); |
| 537 | i++; | ||
| 527 | } | 538 | } |
| 528 | 539 | ||
| 529 | return 0; | 540 | return 0; |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 7680001676a6..f99f81abbd5c 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
| @@ -1144,9 +1144,12 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
| 1144 | mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK) | 1144 | mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK) |
| 1145 | >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; | 1145 | >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; |
| 1146 | if (isu_size == 0) | 1146 | if (isu_size == 0) |
| 1147 | mpic->num_sources = | 1147 | if (flags & MPIC_BROKEN_FRR_NIRQS) |
| 1148 | ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) | 1148 | mpic->num_sources = mpic->irq_count; |
| 1149 | >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; | 1149 | else |
| 1150 | mpic->num_sources = | ||
| 1151 | ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) | ||
| 1152 | >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; | ||
| 1150 | 1153 | ||
| 1151 | /* Map the per-CPU registers */ | 1154 | /* Map the per-CPU registers */ |
| 1152 | for (i = 0; i < mpic->num_cpus; i++) { | 1155 | for (i = 0; i < mpic->num_cpus; i++) { |
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c index d272a52ecd24..de3e5e8bc324 100644 --- a/arch/powerpc/sysdev/mpic_msi.c +++ b/arch/powerpc/sysdev/mpic_msi.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | #include <asm/hw_irq.h> | 16 | #include <asm/hw_irq.h> |
| 17 | #include <asm/ppc-pci.h> | 17 | #include <asm/ppc-pci.h> |
| 18 | 18 | ||
| 19 | #include <sysdev/mpic.h> | ||
| 19 | 20 | ||
| 20 | static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) | 21 | static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) |
| 21 | { | 22 | { |
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 33cbfb22ce3e..68aff6076675 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c | |||
| @@ -95,6 +95,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
| 95 | unsigned int virq; | 95 | unsigned int virq; |
| 96 | struct msi_desc *entry; | 96 | struct msi_desc *entry; |
| 97 | struct msi_msg msg; | 97 | struct msi_msg msg; |
| 98 | int ret; | ||
| 98 | 99 | ||
| 99 | pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", | 100 | pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", |
| 100 | pdev, nvec, type); | 101 | pdev, nvec, type); |
| @@ -108,8 +109,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
| 108 | * few MSIs for someone, but restrictions will apply to how the | 109 | * few MSIs for someone, but restrictions will apply to how the |
| 109 | * sources can be changed independently. | 110 | * sources can be changed independently. |
| 110 | */ | 111 | */ |
| 111 | hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); | 112 | ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); |
| 112 | if (hwirq < 0) { | 113 | hwirq = ret; |
| 114 | if (ret < 0) { | ||
| 113 | pr_debug("pasemi_msi: failed allocating hwirq\n"); | 115 | pr_debug("pasemi_msi: failed allocating hwirq\n"); |
| 114 | return hwirq; | 116 | return hwirq; |
| 115 | } | 117 | } |
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c index 1d5a40899b74..6e2f8686fdfc 100644 --- a/arch/powerpc/sysdev/mpic_u3msi.c +++ b/arch/powerpc/sysdev/mpic_u3msi.c | |||
| @@ -115,17 +115,19 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
| 115 | struct msi_desc *entry; | 115 | struct msi_desc *entry; |
| 116 | struct msi_msg msg; | 116 | struct msi_msg msg; |
| 117 | u64 addr; | 117 | u64 addr; |
| 118 | int ret; | ||
| 118 | 119 | ||
| 119 | addr = find_ht_magic_addr(pdev); | 120 | addr = find_ht_magic_addr(pdev); |
| 120 | msg.address_lo = addr & 0xFFFFFFFF; | 121 | msg.address_lo = addr & 0xFFFFFFFF; |
| 121 | msg.address_hi = addr >> 32; | 122 | msg.address_hi = addr >> 32; |
| 122 | 123 | ||
| 123 | list_for_each_entry(entry, &pdev->msi_list, list) { | 124 | list_for_each_entry(entry, &pdev->msi_list, list) { |
| 124 | hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1); | 125 | ret = mpic_msi_alloc_hwirqs(msi_mpic, 1); |
| 125 | if (hwirq < 0) { | 126 | if (ret < 0) { |
| 126 | pr_debug("u3msi: failed allocating hwirq\n"); | 127 | pr_debug("u3msi: failed allocating hwirq\n"); |
| 127 | return hwirq; | 128 | return ret; |
| 128 | } | 129 | } |
| 130 | hwirq = ret; | ||
| 129 | 131 | ||
| 130 | virq = irq_create_mapping(msi_mpic->irqhost, hwirq); | 132 | virq = irq_create_mapping(msi_mpic->irqhost, hwirq); |
| 131 | if (virq == NO_IRQ) { | 133 | if (virq == NO_IRQ) { |
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index a132e0de8ca5..32e0ad0ebea8 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | #include <linux/console.h> | 15 | #include <linux/console.h> |
| 16 | #include <linux/mv643xx.h> | 16 | #include <linux/mv643xx.h> |
| 17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/of_platform.h> | ||
| 18 | 19 | ||
| 19 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
| 20 | 21 | ||
| @@ -25,6 +26,11 @@ | |||
| 25 | * PowerPC of_platform_bus_type. They support platform_bus_type instead. | 26 | * PowerPC of_platform_bus_type. They support platform_bus_type instead. |
| 26 | */ | 27 | */ |
| 27 | 28 | ||
| 29 | static struct of_device_id __initdata of_mv64x60_devices[] = { | ||
| 30 | { .compatible = "marvell,mv64306-devctrl", }, | ||
| 31 | {} | ||
| 32 | }; | ||
| 33 | |||
| 28 | /* | 34 | /* |
| 29 | * Create MPSC platform devices | 35 | * Create MPSC platform devices |
| 30 | */ | 36 | */ |
| @@ -484,6 +490,10 @@ static int __init mv64x60_device_setup(void) | |||
| 484 | of_node_put(np); | 490 | of_node_put(np); |
| 485 | } | 491 | } |
| 486 | 492 | ||
| 493 | /* Now add every node that is on the device bus */ | ||
| 494 | for_each_compatible_node(np, NULL, "marvell,mv64360") | ||
| 495 | of_platform_bus_probe(np, of_mv64x60_devices, NULL); | ||
| 496 | |||
| 487 | return 0; | 497 | return 0; |
| 488 | } | 498 | } |
| 489 | arch_initcall(mv64x60_device_setup); | 499 | arch_initcall(mv64x60_device_setup); |
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 1702de9395ee..6726da07c065 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
| @@ -54,7 +54,7 @@ | |||
| 54 | #define skipbl xmon_skipbl | 54 | #define skipbl xmon_skipbl |
| 55 | 55 | ||
| 56 | #ifdef CONFIG_SMP | 56 | #ifdef CONFIG_SMP |
| 57 | cpumask_t cpus_in_xmon = CPU_MASK_NONE; | 57 | static cpumask_t cpus_in_xmon = CPU_MASK_NONE; |
| 58 | static unsigned long xmon_taken = 1; | 58 | static unsigned long xmon_taken = 1; |
| 59 | static int xmon_owner; | 59 | static int xmon_owner; |
| 60 | static int xmon_gate; | 60 | static int xmon_gate; |
| @@ -154,7 +154,7 @@ static int do_spu_cmd(void); | |||
| 154 | static void dump_tlb_44x(void); | 154 | static void dump_tlb_44x(void); |
| 155 | #endif | 155 | #endif |
| 156 | 156 | ||
| 157 | int xmon_no_auto_backtrace; | 157 | static int xmon_no_auto_backtrace; |
| 158 | 158 | ||
| 159 | extern void xmon_enter(void); | 159 | extern void xmon_enter(void); |
| 160 | extern void xmon_leave(void); | 160 | extern void xmon_leave(void); |
| @@ -327,6 +327,11 @@ static void release_output_lock(void) | |||
| 327 | { | 327 | { |
| 328 | xmon_speaker = 0; | 328 | xmon_speaker = 0; |
| 329 | } | 329 | } |
| 330 | |||
| 331 | int cpus_are_in_xmon(void) | ||
| 332 | { | ||
| 333 | return !cpus_empty(cpus_in_xmon); | ||
| 334 | } | ||
| 330 | #endif | 335 | #endif |
| 331 | 336 | ||
| 332 | static int xmon_core(struct pt_regs *regs, int fromipi) | 337 | static int xmon_core(struct pt_regs *regs, int fromipi) |
| @@ -593,7 +598,7 @@ static int xmon_iabr_match(struct pt_regs *regs) | |||
| 593 | { | 598 | { |
| 594 | if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) | 599 | if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) |
| 595 | return 0; | 600 | return 0; |
| 596 | if (iabr == 0) | 601 | if (iabr == NULL) |
| 597 | return 0; | 602 | return 0; |
| 598 | xmon_core(regs, 0); | 603 | xmon_core(regs, 0); |
| 599 | return 1; | 604 | return 1; |
| @@ -1142,7 +1147,7 @@ bpt_cmds(void) | |||
| 1142 | } else { | 1147 | } else { |
| 1143 | /* assume a breakpoint address */ | 1148 | /* assume a breakpoint address */ |
| 1144 | bp = at_breakpoint(a); | 1149 | bp = at_breakpoint(a); |
| 1145 | if (bp == 0) { | 1150 | if (bp == NULL) { |
| 1146 | printf("No breakpoint at %x\n", a); | 1151 | printf("No breakpoint at %x\n", a); |
| 1147 | break; | 1152 | break; |
| 1148 | } | 1153 | } |
| @@ -1370,7 +1375,7 @@ static void print_bug_trap(struct pt_regs *regs) | |||
| 1370 | #endif | 1375 | #endif |
| 1371 | } | 1376 | } |
| 1372 | 1377 | ||
| 1373 | void excprint(struct pt_regs *fp) | 1378 | static void excprint(struct pt_regs *fp) |
| 1374 | { | 1379 | { |
| 1375 | unsigned long trap; | 1380 | unsigned long trap; |
| 1376 | 1381 | ||
| @@ -1408,7 +1413,7 @@ void excprint(struct pt_regs *fp) | |||
| 1408 | print_bug_trap(fp); | 1413 | print_bug_trap(fp); |
| 1409 | } | 1414 | } |
| 1410 | 1415 | ||
| 1411 | void prregs(struct pt_regs *fp) | 1416 | static void prregs(struct pt_regs *fp) |
| 1412 | { | 1417 | { |
| 1413 | int n, trap; | 1418 | int n, trap; |
| 1414 | unsigned long base; | 1419 | unsigned long base; |
| @@ -1463,7 +1468,7 @@ void prregs(struct pt_regs *fp) | |||
| 1463 | printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); | 1468 | printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); |
| 1464 | } | 1469 | } |
| 1465 | 1470 | ||
| 1466 | void cacheflush(void) | 1471 | static void cacheflush(void) |
| 1467 | { | 1472 | { |
| 1468 | int cmd; | 1473 | int cmd; |
| 1469 | unsigned long nflush; | 1474 | unsigned long nflush; |
| @@ -1495,7 +1500,7 @@ void cacheflush(void) | |||
| 1495 | catch_memory_errors = 0; | 1500 | catch_memory_errors = 0; |
| 1496 | } | 1501 | } |
| 1497 | 1502 | ||
| 1498 | unsigned long | 1503 | static unsigned long |
| 1499 | read_spr(int n) | 1504 | read_spr(int n) |
| 1500 | { | 1505 | { |
| 1501 | unsigned int instrs[2]; | 1506 | unsigned int instrs[2]; |
| @@ -1533,7 +1538,7 @@ read_spr(int n) | |||
| 1533 | return ret; | 1538 | return ret; |
| 1534 | } | 1539 | } |
| 1535 | 1540 | ||
| 1536 | void | 1541 | static void |
| 1537 | write_spr(int n, unsigned long val) | 1542 | write_spr(int n, unsigned long val) |
| 1538 | { | 1543 | { |
| 1539 | unsigned int instrs[2]; | 1544 | unsigned int instrs[2]; |
| @@ -1571,7 +1576,7 @@ static unsigned long regno; | |||
| 1571 | extern char exc_prolog; | 1576 | extern char exc_prolog; |
| 1572 | extern char dec_exc; | 1577 | extern char dec_exc; |
| 1573 | 1578 | ||
| 1574 | void super_regs(void) | 1579 | static void super_regs(void) |
| 1575 | { | 1580 | { |
| 1576 | int cmd; | 1581 | int cmd; |
| 1577 | unsigned long val; | 1582 | unsigned long val; |
| @@ -1629,7 +1634,7 @@ void super_regs(void) | |||
| 1629 | /* | 1634 | /* |
| 1630 | * Stuff for reading and writing memory safely | 1635 | * Stuff for reading and writing memory safely |
| 1631 | */ | 1636 | */ |
| 1632 | int | 1637 | static int |
| 1633 | mread(unsigned long adrs, void *buf, int size) | 1638 | mread(unsigned long adrs, void *buf, int size) |
| 1634 | { | 1639 | { |
| 1635 | volatile int n; | 1640 | volatile int n; |
| @@ -1666,7 +1671,7 @@ mread(unsigned long adrs, void *buf, int size) | |||
| 1666 | return n; | 1671 | return n; |
| 1667 | } | 1672 | } |
| 1668 | 1673 | ||
| 1669 | int | 1674 | static int |
| 1670 | mwrite(unsigned long adrs, void *buf, int size) | 1675 | mwrite(unsigned long adrs, void *buf, int size) |
| 1671 | { | 1676 | { |
| 1672 | volatile int n; | 1677 | volatile int n; |
| @@ -1731,7 +1736,7 @@ static int handle_fault(struct pt_regs *regs) | |||
| 1731 | 1736 | ||
| 1732 | #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) | 1737 | #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) |
| 1733 | 1738 | ||
| 1734 | void | 1739 | static void |
| 1735 | byterev(unsigned char *val, int size) | 1740 | byterev(unsigned char *val, int size) |
| 1736 | { | 1741 | { |
| 1737 | int t; | 1742 | int t; |
| @@ -1793,7 +1798,7 @@ static char *memex_subcmd_help_string = | |||
| 1793 | " x exit this mode\n" | 1798 | " x exit this mode\n" |
| 1794 | ""; | 1799 | ""; |
| 1795 | 1800 | ||
| 1796 | void | 1801 | static void |
| 1797 | memex(void) | 1802 | memex(void) |
| 1798 | { | 1803 | { |
| 1799 | int cmd, inc, i, nslash; | 1804 | int cmd, inc, i, nslash; |
| @@ -1944,7 +1949,7 @@ memex(void) | |||
| 1944 | } | 1949 | } |
| 1945 | } | 1950 | } |
| 1946 | 1951 | ||
| 1947 | int | 1952 | static int |
| 1948 | bsesc(void) | 1953 | bsesc(void) |
| 1949 | { | 1954 | { |
| 1950 | int c; | 1955 | int c; |
| @@ -1984,7 +1989,7 @@ static void xmon_rawdump (unsigned long adrs, long ndump) | |||
| 1984 | #define isxdigit(c) (('0' <= (c) && (c) <= '9') \ | 1989 | #define isxdigit(c) (('0' <= (c) && (c) <= '9') \ |
| 1985 | || ('a' <= (c) && (c) <= 'f') \ | 1990 | || ('a' <= (c) && (c) <= 'f') \ |
| 1986 | || ('A' <= (c) && (c) <= 'F')) | 1991 | || ('A' <= (c) && (c) <= 'F')) |
| 1987 | void | 1992 | static void |
| 1988 | dump(void) | 1993 | dump(void) |
| 1989 | { | 1994 | { |
| 1990 | int c; | 1995 | int c; |
| @@ -2022,7 +2027,7 @@ dump(void) | |||
| 2022 | } | 2027 | } |
| 2023 | } | 2028 | } |
| 2024 | 2029 | ||
| 2025 | void | 2030 | static void |
| 2026 | prdump(unsigned long adrs, long ndump) | 2031 | prdump(unsigned long adrs, long ndump) |
| 2027 | { | 2032 | { |
| 2028 | long n, m, c, r, nr; | 2033 | long n, m, c, r, nr; |
| @@ -2066,7 +2071,7 @@ prdump(unsigned long adrs, long ndump) | |||
| 2066 | 2071 | ||
| 2067 | typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); | 2072 | typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); |
| 2068 | 2073 | ||
| 2069 | int | 2074 | static int |
| 2070 | generic_inst_dump(unsigned long adr, long count, int praddr, | 2075 | generic_inst_dump(unsigned long adr, long count, int praddr, |
| 2071 | instruction_dump_func dump_func) | 2076 | instruction_dump_func dump_func) |
| 2072 | { | 2077 | { |
| @@ -2104,7 +2109,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, | |||
| 2104 | return adr - first_adr; | 2109 | return adr - first_adr; |
| 2105 | } | 2110 | } |
| 2106 | 2111 | ||
| 2107 | int | 2112 | static int |
| 2108 | ppc_inst_dump(unsigned long adr, long count, int praddr) | 2113 | ppc_inst_dump(unsigned long adr, long count, int praddr) |
| 2109 | { | 2114 | { |
| 2110 | return generic_inst_dump(adr, count, praddr, print_insn_powerpc); | 2115 | return generic_inst_dump(adr, count, praddr, print_insn_powerpc); |
| @@ -2126,7 +2131,7 @@ static unsigned long mval; /* byte value to set memory to */ | |||
| 2126 | static unsigned long mcount; /* # bytes to affect */ | 2131 | static unsigned long mcount; /* # bytes to affect */ |
| 2127 | static unsigned long mdiffs; /* max # differences to print */ | 2132 | static unsigned long mdiffs; /* max # differences to print */ |
| 2128 | 2133 | ||
| 2129 | void | 2134 | static void |
| 2130 | memops(int cmd) | 2135 | memops(int cmd) |
| 2131 | { | 2136 | { |
| 2132 | scanhex((void *)&mdest); | 2137 | scanhex((void *)&mdest); |
| @@ -2152,7 +2157,7 @@ memops(int cmd) | |||
| 2152 | } | 2157 | } |
| 2153 | } | 2158 | } |
| 2154 | 2159 | ||
| 2155 | void | 2160 | static void |
| 2156 | memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) | 2161 | memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) |
| 2157 | { | 2162 | { |
| 2158 | unsigned n, prt; | 2163 | unsigned n, prt; |
| @@ -2170,7 +2175,7 @@ memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) | |||
| 2170 | static unsigned mend; | 2175 | static unsigned mend; |
| 2171 | static unsigned mask; | 2176 | static unsigned mask; |
| 2172 | 2177 | ||
| 2173 | void | 2178 | static void |
| 2174 | memlocate(void) | 2179 | memlocate(void) |
| 2175 | { | 2180 | { |
| 2176 | unsigned a, n; | 2181 | unsigned a, n; |
| @@ -2203,7 +2208,7 @@ memlocate(void) | |||
| 2203 | static unsigned long mskip = 0x1000; | 2208 | static unsigned long mskip = 0x1000; |
| 2204 | static unsigned long mlim = 0xffffffff; | 2209 | static unsigned long mlim = 0xffffffff; |
| 2205 | 2210 | ||
| 2206 | void | 2211 | static void |
| 2207 | memzcan(void) | 2212 | memzcan(void) |
| 2208 | { | 2213 | { |
| 2209 | unsigned char v; | 2214 | unsigned char v; |
| @@ -2230,7 +2235,7 @@ memzcan(void) | |||
| 2230 | printf("%.8x\n", a - mskip); | 2235 | printf("%.8x\n", a - mskip); |
| 2231 | } | 2236 | } |
| 2232 | 2237 | ||
| 2233 | void proccall(void) | 2238 | static void proccall(void) |
| 2234 | { | 2239 | { |
| 2235 | unsigned long args[8]; | 2240 | unsigned long args[8]; |
| 2236 | unsigned long ret; | 2241 | unsigned long ret; |
| @@ -2388,7 +2393,7 @@ scanhex(unsigned long *vp) | |||
| 2388 | return 1; | 2393 | return 1; |
| 2389 | } | 2394 | } |
| 2390 | 2395 | ||
| 2391 | void | 2396 | static void |
| 2392 | scannl(void) | 2397 | scannl(void) |
| 2393 | { | 2398 | { |
| 2394 | int c; | 2399 | int c; |
| @@ -2399,7 +2404,7 @@ scannl(void) | |||
| 2399 | c = inchar(); | 2404 | c = inchar(); |
| 2400 | } | 2405 | } |
| 2401 | 2406 | ||
| 2402 | int hexdigit(int c) | 2407 | static int hexdigit(int c) |
| 2403 | { | 2408 | { |
| 2404 | if( '0' <= c && c <= '9' ) | 2409 | if( '0' <= c && c <= '9' ) |
| 2405 | return c - '0'; | 2410 | return c - '0'; |
| @@ -2430,13 +2435,13 @@ getstring(char *s, int size) | |||
| 2430 | static char line[256]; | 2435 | static char line[256]; |
| 2431 | static char *lineptr; | 2436 | static char *lineptr; |
| 2432 | 2437 | ||
| 2433 | void | 2438 | static void |
| 2434 | flush_input(void) | 2439 | flush_input(void) |
| 2435 | { | 2440 | { |
| 2436 | lineptr = NULL; | 2441 | lineptr = NULL; |
| 2437 | } | 2442 | } |
| 2438 | 2443 | ||
| 2439 | int | 2444 | static int |
| 2440 | inchar(void) | 2445 | inchar(void) |
| 2441 | { | 2446 | { |
| 2442 | if (lineptr == NULL || *lineptr == 0) { | 2447 | if (lineptr == NULL || *lineptr == 0) { |
| @@ -2449,7 +2454,7 @@ inchar(void) | |||
| 2449 | return *lineptr++; | 2454 | return *lineptr++; |
| 2450 | } | 2455 | } |
| 2451 | 2456 | ||
| 2452 | void | 2457 | static void |
| 2453 | take_input(char *str) | 2458 | take_input(char *str) |
| 2454 | { | 2459 | { |
| 2455 | lineptr = str; | 2460 | lineptr = str; |
| @@ -2618,7 +2623,8 @@ static void dump_tlb_44x(void) | |||
| 2618 | } | 2623 | } |
| 2619 | } | 2624 | } |
| 2620 | #endif /* CONFIG_44x */ | 2625 | #endif /* CONFIG_44x */ |
| 2621 | void xmon_init(int enable) | 2626 | |
| 2627 | static void xmon_init(int enable) | ||
| 2622 | { | 2628 | { |
| 2623 | #ifdef CONFIG_PPC_ISERIES | 2629 | #ifdef CONFIG_PPC_ISERIES |
| 2624 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | 2630 | if (firmware_has_feature(FW_FEATURE_ISERIES)) |
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S index 5f3a5d068a5c..fcd830a292e2 100644 --- a/arch/ppc/kernel/entry.S +++ b/arch/ppc/kernel/entry.S | |||
| @@ -647,7 +647,7 @@ user_exc_return: /* r10 contains MSR_KERNEL here */ | |||
| 647 | /* Check current_thread_info()->flags */ | 647 | /* Check current_thread_info()->flags */ |
| 648 | rlwinm r9,r1,0,0,18 | 648 | rlwinm r9,r1,0,0,18 |
| 649 | lwz r9,TI_FLAGS(r9) | 649 | lwz r9,TI_FLAGS(r9) |
| 650 | andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED) | 650 | andi. r0,r9,_TIF_USER_WORK_MASK |
| 651 | bne do_work | 651 | bne do_work |
| 652 | 652 | ||
| 653 | restore_user: | 653 | restore_user: |
| @@ -898,7 +898,7 @@ recheck: | |||
| 898 | lwz r9,TI_FLAGS(r9) | 898 | lwz r9,TI_FLAGS(r9) |
| 899 | andi. r0,r9,_TIF_NEED_RESCHED | 899 | andi. r0,r9,_TIF_NEED_RESCHED |
| 900 | bne- do_resched | 900 | bne- do_resched |
| 901 | andi. r0,r9,_TIF_SIGPENDING | 901 | andi. r0,r9,_TIF_USER_WORK_MASK |
| 902 | beq restore_user | 902 | beq restore_user |
| 903 | do_user_signal: /* r10 contains MSR_KERNEL here */ | 903 | do_user_signal: /* r10 contains MSR_KERNEL here */ |
| 904 | ori r10,r10,MSR_EE | 904 | ori r10,r10,MSR_EE |
diff --git a/drivers/char/hvc_console.c b/drivers/char/hvc_console.c index 44160d5ebca0..2f9759d625cc 100644 --- a/drivers/char/hvc_console.c +++ b/drivers/char/hvc_console.c | |||
| @@ -675,12 +675,6 @@ static int hvc_poll(struct hvc_struct *hp) | |||
| 675 | return poll_mask; | 675 | return poll_mask; |
| 676 | } | 676 | } |
| 677 | 677 | ||
| 678 | #if defined(CONFIG_XMON) && defined(CONFIG_SMP) | ||
| 679 | extern cpumask_t cpus_in_xmon; | ||
| 680 | #else | ||
| 681 | static const cpumask_t cpus_in_xmon = CPU_MASK_NONE; | ||
| 682 | #endif | ||
| 683 | |||
| 684 | /* | 678 | /* |
| 685 | * This kthread is either polling or interrupt driven. This is determined by | 679 | * This kthread is either polling or interrupt driven. This is determined by |
| 686 | * calling hvc_poll() who determines whether a console adapter support | 680 | * calling hvc_poll() who determines whether a console adapter support |
| @@ -698,7 +692,7 @@ static int khvcd(void *unused) | |||
| 698 | hvc_kicked = 0; | 692 | hvc_kicked = 0; |
| 699 | try_to_freeze(); | 693 | try_to_freeze(); |
| 700 | wmb(); | 694 | wmb(); |
| 701 | if (cpus_empty(cpus_in_xmon)) { | 695 | if (!cpus_are_in_xmon()) { |
| 702 | spin_lock(&hvc_structs_lock); | 696 | spin_lock(&hvc_structs_lock); |
| 703 | list_for_each_entry(hp, &hvc_structs, next) { | 697 | list_for_each_entry(hp, &hvc_structs, next) { |
| 704 | poll_mask |= hvc_poll(hp); | 698 | poll_mask |= hvc_poll(hp); |
diff --git a/drivers/char/hvc_console.h b/drivers/char/hvc_console.h index 8c59818050e6..42ffb17e15df 100644 --- a/drivers/char/hvc_console.h +++ b/drivers/char/hvc_console.h | |||
| @@ -60,4 +60,14 @@ extern struct hvc_struct * __devinit hvc_alloc(uint32_t vtermno, int irq, | |||
| 60 | /* remove a vterm from hvc tty operation (modele_exit or hotplug remove) */ | 60 | /* remove a vterm from hvc tty operation (modele_exit or hotplug remove) */ |
| 61 | extern int __devexit hvc_remove(struct hvc_struct *hp); | 61 | extern int __devexit hvc_remove(struct hvc_struct *hp); |
| 62 | 62 | ||
| 63 | |||
| 64 | #if defined(CONFIG_XMON) && defined(CONFIG_SMP) | ||
| 65 | #include <asm/xmon.h> | ||
| 66 | #else | ||
| 67 | static inline int cpus_are_in_xmon(void) | ||
| 68 | { | ||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | #endif | ||
| 72 | |||
| 63 | #endif // HVC_CONSOLE_H | 73 | #endif // HVC_CONSOLE_H |
diff --git a/drivers/macintosh/macio_sysfs.c b/drivers/macintosh/macio_sysfs.c index 112e5ef728f1..9e9453b58425 100644 --- a/drivers/macintosh/macio_sysfs.c +++ b/drivers/macintosh/macio_sysfs.c | |||
| @@ -44,7 +44,7 @@ static ssize_t modalias_show (struct device *dev, struct device_attribute *attr, | |||
| 44 | struct of_device *ofdev = to_of_device(dev); | 44 | struct of_device *ofdev = to_of_device(dev); |
| 45 | int len; | 45 | int len; |
| 46 | 46 | ||
| 47 | len = of_device_get_modalias(ofdev, buf, PAGE_SIZE); | 47 | len = of_device_get_modalias(ofdev, buf, PAGE_SIZE - 2); |
| 48 | 48 | ||
| 49 | buf[len] = '\n'; | 49 | buf[len] = '\n'; |
| 50 | buf[len+1] = 0; | 50 | buf[len+1] = 0; |
| @@ -52,6 +52,15 @@ static ssize_t modalias_show (struct device *dev, struct device_attribute *attr, | |||
| 52 | return len+1; | 52 | return len+1; |
| 53 | } | 53 | } |
| 54 | 54 | ||
| 55 | static ssize_t devspec_show(struct device *dev, | ||
| 56 | struct device_attribute *attr, char *buf) | ||
| 57 | { | ||
| 58 | struct of_device *ofdev; | ||
| 59 | |||
| 60 | ofdev = to_of_device(dev); | ||
| 61 | return sprintf(buf, "%s\n", ofdev->node->full_name); | ||
| 62 | } | ||
| 63 | |||
| 55 | macio_config_of_attr (name, "%s\n"); | 64 | macio_config_of_attr (name, "%s\n"); |
| 56 | macio_config_of_attr (type, "%s\n"); | 65 | macio_config_of_attr (type, "%s\n"); |
| 57 | 66 | ||
| @@ -60,5 +69,6 @@ struct device_attribute macio_dev_attrs[] = { | |||
| 60 | __ATTR_RO(type), | 69 | __ATTR_RO(type), |
| 61 | __ATTR_RO(compatible), | 70 | __ATTR_RO(compatible), |
| 62 | __ATTR_RO(modalias), | 71 | __ATTR_RO(modalias), |
| 72 | __ATTR_RO(devspec), | ||
| 63 | __ATTR_NULL | 73 | __ATTR_NULL |
| 64 | }; | 74 | }; |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index f4182cfffe9d..8e3e968b2957 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
| @@ -1884,7 +1884,6 @@ config NE_H8300 | |||
| 1884 | Say Y here if you want to use the NE2000 compatible | 1884 | Say Y here if you want to use the NE2000 compatible |
| 1885 | controller on the Renesas H8/300 processor. | 1885 | controller on the Renesas H8/300 processor. |
| 1886 | 1886 | ||
| 1887 | source "drivers/net/fec_8xx/Kconfig" | ||
| 1888 | source "drivers/net/fs_enet/Kconfig" | 1887 | source "drivers/net/fs_enet/Kconfig" |
| 1889 | 1888 | ||
| 1890 | endif # NET_ETHERNET | 1889 | endif # NET_ETHERNET |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index dcbfe8421154..9010e58da0f2 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
| @@ -217,7 +217,6 @@ obj-$(CONFIG_SMC91X) += smc91x.o | |||
| 217 | obj-$(CONFIG_SMC911X) += smc911x.o | 217 | obj-$(CONFIG_SMC911X) += smc911x.o |
| 218 | obj-$(CONFIG_BFIN_MAC) += bfin_mac.o | 218 | obj-$(CONFIG_BFIN_MAC) += bfin_mac.o |
| 219 | obj-$(CONFIG_DM9000) += dm9000.o | 219 | obj-$(CONFIG_DM9000) += dm9000.o |
| 220 | obj-$(CONFIG_FEC_8XX) += fec_8xx/ | ||
| 221 | obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o | 220 | obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o |
| 222 | pasemi_mac_driver-objs := pasemi_mac.o pasemi_mac_ethtool.o | 221 | pasemi_mac_driver-objs := pasemi_mac.o pasemi_mac_ethtool.o |
| 223 | obj-$(CONFIG_MLX4_CORE) += mlx4/ | 222 | obj-$(CONFIG_MLX4_CORE) += mlx4/ |
diff --git a/drivers/net/fec_8xx/Kconfig b/drivers/net/fec_8xx/Kconfig deleted file mode 100644 index afb34ded26ee..000000000000 --- a/drivers/net/fec_8xx/Kconfig +++ /dev/null | |||
| @@ -1,20 +0,0 @@ | |||
| 1 | config FEC_8XX | ||
| 2 | tristate "Motorola 8xx FEC driver" | ||
| 3 | depends on 8XX | ||
| 4 | select MII | ||
| 5 | |||
| 6 | config FEC_8XX_GENERIC_PHY | ||
| 7 | bool "Support any generic PHY" | ||
| 8 | depends on FEC_8XX | ||
| 9 | default y | ||
| 10 | |||
| 11 | config FEC_8XX_DM9161_PHY | ||
| 12 | bool "Support DM9161 PHY" | ||
| 13 | depends on FEC_8XX | ||
| 14 | default n | ||
| 15 | |||
| 16 | config FEC_8XX_LXT971_PHY | ||
| 17 | bool "Support LXT971/LXT972 PHY" | ||
| 18 | depends on FEC_8XX | ||
| 19 | default n | ||
| 20 | |||
diff --git a/drivers/net/fec_8xx/Makefile b/drivers/net/fec_8xx/Makefile deleted file mode 100644 index 70c54f8c48e5..000000000000 --- a/drivers/net/fec_8xx/Makefile +++ /dev/null | |||
| @@ -1,12 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Motorola 8xx FEC ethernet controller | ||
| 3 | # | ||
| 4 | |||
| 5 | obj-$(CONFIG_FEC_8XX) += fec_8xx.o | ||
| 6 | |||
| 7 | fec_8xx-objs := fec_main.o fec_mii.o | ||
| 8 | |||
| 9 | # the platform instantatiation objects | ||
| 10 | ifeq ($(CONFIG_NETTA),y) | ||
| 11 | fec_8xx-objs += fec_8xx-netta.o | ||
| 12 | endif | ||
diff --git a/drivers/net/fec_8xx/fec_8xx-netta.c b/drivers/net/fec_8xx/fec_8xx-netta.c deleted file mode 100644 index 79deee222e28..000000000000 --- a/drivers/net/fec_8xx/fec_8xx-netta.c +++ /dev/null | |||
| @@ -1,151 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * FEC instantatiation file for NETTA | ||
| 3 | */ | ||
| 4 | |||
| 5 | #include <linux/kernel.h> | ||
| 6 | #include <linux/types.h> | ||
| 7 | #include <linux/string.h> | ||
| 8 | #include <linux/ptrace.h> | ||
| 9 | #include <linux/errno.h> | ||
| 10 | #include <linux/ioport.h> | ||
| 11 | #include <linux/slab.h> | ||
| 12 | #include <linux/interrupt.h> | ||
| 13 | #include <linux/pci.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/netdevice.h> | ||
| 17 | #include <linux/etherdevice.h> | ||
| 18 | #include <linux/skbuff.h> | ||
| 19 | #include <linux/spinlock.h> | ||
| 20 | #include <linux/mii.h> | ||
| 21 | #include <linux/ethtool.h> | ||
| 22 | #include <linux/bitops.h> | ||
| 23 | |||
| 24 | #include <asm/8xx_immap.h> | ||
| 25 | #include <asm/pgtable.h> | ||
| 26 | #include <asm/mpc8xx.h> | ||
| 27 | #include <asm/irq.h> | ||
| 28 | #include <asm/uaccess.h> | ||
| 29 | #include <asm/cpm1.h> | ||
| 30 | |||
| 31 | #include "fec_8xx.h" | ||
| 32 | |||
| 33 | /*************************************************/ | ||
| 34 | |||
| 35 | static struct fec_platform_info fec1_info = { | ||
| 36 | .fec_no = 0, | ||
| 37 | .use_mdio = 1, | ||
| 38 | .phy_addr = 8, | ||
| 39 | .fec_irq = SIU_LEVEL1, | ||
| 40 | .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC6, | ||
| 41 | .rx_ring = 128, | ||
| 42 | .tx_ring = 16, | ||
| 43 | .rx_copybreak = 240, | ||
| 44 | .use_napi = 1, | ||
| 45 | .napi_weight = 17, | ||
| 46 | }; | ||
| 47 | |||
| 48 | static struct fec_platform_info fec2_info = { | ||
| 49 | .fec_no = 1, | ||
| 50 | .use_mdio = 1, | ||
| 51 | .phy_addr = 2, | ||
| 52 | .fec_irq = SIU_LEVEL3, | ||
| 53 | .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC7, | ||
| 54 | .rx_ring = 128, | ||
| 55 | .tx_ring = 16, | ||
| 56 | .rx_copybreak = 240, | ||
| 57 | .use_napi = 1, | ||
| 58 | .napi_weight = 17, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct net_device *fec1_dev; | ||
| 62 | static struct net_device *fec2_dev; | ||
| 63 | |||
| 64 | /* XXX custom u-boot & Linux startup needed */ | ||
| 65 | extern const char *__fw_getenv(const char *var); | ||
| 66 | |||
| 67 | /* access ports */ | ||
| 68 | #define setbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) | (_v)) | ||
| 69 | #define clrbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) & ~(_v)) | ||
| 70 | |||
| 71 | #define setbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) | (_v)) | ||
| 72 | #define clrbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) & ~(_v)) | ||
| 73 | |||
| 74 | int fec_8xx_platform_init(void) | ||
| 75 | { | ||
| 76 | immap_t *immap = (immap_t *)IMAP_ADDR; | ||
| 77 | bd_t *bd = (bd_t *) __res; | ||
| 78 | const char *s; | ||
| 79 | char *e; | ||
| 80 | int i; | ||
| 81 | |||
| 82 | /* use MDC for MII */ | ||
| 83 | setbits16(immap->im_ioport.iop_pdpar, 0x0080); | ||
| 84 | clrbits16(immap->im_ioport.iop_pddir, 0x0080); | ||
| 85 | |||
| 86 | /* configure FEC1 pins */ | ||
| 87 | setbits16(immap->im_ioport.iop_papar, 0xe810); | ||
| 88 | setbits16(immap->im_ioport.iop_padir, 0x0810); | ||
| 89 | clrbits16(immap->im_ioport.iop_padir, 0xe000); | ||
| 90 | |||
| 91 | setbits32(immap->im_cpm.cp_pbpar, 0x00000001); | ||
| 92 | clrbits32(immap->im_cpm.cp_pbdir, 0x00000001); | ||
| 93 | |||
| 94 | setbits32(immap->im_cpm.cp_cptr, 0x00000100); | ||
| 95 | clrbits32(immap->im_cpm.cp_cptr, 0x00000050); | ||
| 96 | |||
| 97 | clrbits16(immap->im_ioport.iop_pcpar, 0x0200); | ||
| 98 | clrbits16(immap->im_ioport.iop_pcdir, 0x0200); | ||
| 99 | clrbits16(immap->im_ioport.iop_pcso, 0x0200); | ||
| 100 | setbits16(immap->im_ioport.iop_pcint, 0x0200); | ||
| 101 | |||
| 102 | /* configure FEC2 pins */ | ||
| 103 | setbits32(immap->im_cpm.cp_pepar, 0x00039620); | ||
| 104 | setbits32(immap->im_cpm.cp_pedir, 0x00039620); | ||
| 105 | setbits32(immap->im_cpm.cp_peso, 0x00031000); | ||
| 106 | clrbits32(immap->im_cpm.cp_peso, 0x00008620); | ||
| 107 | |||
| 108 | setbits32(immap->im_cpm.cp_cptr, 0x00000080); | ||
| 109 | clrbits32(immap->im_cpm.cp_cptr, 0x00000028); | ||
| 110 | |||
| 111 | clrbits16(immap->im_ioport.iop_pcpar, 0x0200); | ||
| 112 | clrbits16(immap->im_ioport.iop_pcdir, 0x0200); | ||
| 113 | clrbits16(immap->im_ioport.iop_pcso, 0x0200); | ||
| 114 | setbits16(immap->im_ioport.iop_pcint, 0x0200); | ||
| 115 | |||
| 116 | /* fill up */ | ||
| 117 | fec1_info.sys_clk = bd->bi_intfreq; | ||
| 118 | fec2_info.sys_clk = bd->bi_intfreq; | ||
| 119 | |||
| 120 | s = __fw_getenv("ethaddr"); | ||
| 121 | if (s != NULL) { | ||
| 122 | for (i = 0; i < 6; i++) { | ||
| 123 | fec1_info.macaddr[i] = simple_strtoul(s, &e, 16); | ||
| 124 | if (*e) | ||
| 125 | s = e + 1; | ||
| 126 | } | ||
| 127 | } | ||
| 128 | |||
| 129 | s = __fw_getenv("eth1addr"); | ||
| 130 | if (s != NULL) { | ||
| 131 | for (i = 0; i < 6; i++) { | ||
| 132 | fec2_info.macaddr[i] = simple_strtoul(s, &e, 16); | ||
| 133 | if (*e) | ||
| 134 | s = e + 1; | ||
| 135 | } | ||
| 136 | } | ||
| 137 | |||
| 138 | fec_8xx_init_one(&fec1_info, &fec1_dev); | ||
| 139 | fec_8xx_init_one(&fec2_info, &fec2_dev); | ||
| 140 | |||
| 141 | return fec1_dev != NULL && fec2_dev != NULL ? 0 : -1; | ||
| 142 | } | ||
| 143 | |||
| 144 | void fec_8xx_platform_cleanup(void) | ||
| 145 | { | ||
| 146 | if (fec2_dev != NULL) | ||
| 147 | fec_8xx_cleanup_one(fec2_dev); | ||
| 148 | |||
| 149 | if (fec1_dev != NULL) | ||
| 150 | fec_8xx_cleanup_one(fec1_dev); | ||
| 151 | } | ||
diff --git a/drivers/net/fec_8xx/fec_8xx.h b/drivers/net/fec_8xx/fec_8xx.h deleted file mode 100644 index f3b1c6fbba8b..000000000000 --- a/drivers/net/fec_8xx/fec_8xx.h +++ /dev/null | |||
| @@ -1,220 +0,0 @@ | |||
| 1 | #ifndef FEC_8XX_H | ||
| 2 | #define FEC_8XX_H | ||
| 3 | |||
| 4 | #include <linux/mii.h> | ||
| 5 | #include <linux/netdevice.h> | ||
| 6 | |||
| 7 | #include <linux/types.h> | ||
| 8 | |||
| 9 | /* HW info */ | ||
| 10 | |||
| 11 | /* CRC polynomium used by the FEC for the multicast group filtering */ | ||
| 12 | #define FEC_CRC_POLY 0x04C11DB7 | ||
| 13 | |||
| 14 | #define MII_ADVERTISE_HALF (ADVERTISE_100HALF | \ | ||
| 15 | ADVERTISE_10HALF | ADVERTISE_CSMA) | ||
| 16 | #define MII_ADVERTISE_ALL (ADVERTISE_100FULL | \ | ||
| 17 | ADVERTISE_10FULL | MII_ADVERTISE_HALF) | ||
| 18 | |||
| 19 | /* Interrupt events/masks. | ||
| 20 | */ | ||
| 21 | #define FEC_ENET_HBERR 0x80000000U /* Heartbeat error */ | ||
| 22 | #define FEC_ENET_BABR 0x40000000U /* Babbling receiver */ | ||
| 23 | #define FEC_ENET_BABT 0x20000000U /* Babbling transmitter */ | ||
| 24 | #define FEC_ENET_GRA 0x10000000U /* Graceful stop complete */ | ||
| 25 | #define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */ | ||
| 26 | #define FEC_ENET_TXB 0x04000000U /* A buffer was transmitted */ | ||
| 27 | #define FEC_ENET_RXF 0x02000000U /* Full frame received */ | ||
| 28 | #define FEC_ENET_RXB 0x01000000U /* A buffer was received */ | ||
| 29 | #define FEC_ENET_MII 0x00800000U /* MII interrupt */ | ||
| 30 | #define FEC_ENET_EBERR 0x00400000U /* SDMA bus error */ | ||
| 31 | |||
| 32 | #define FEC_ECNTRL_PINMUX 0x00000004 | ||
| 33 | #define FEC_ECNTRL_ETHER_EN 0x00000002 | ||
| 34 | #define FEC_ECNTRL_RESET 0x00000001 | ||
| 35 | |||
| 36 | #define FEC_RCNTRL_BC_REJ 0x00000010 | ||
| 37 | #define FEC_RCNTRL_PROM 0x00000008 | ||
| 38 | #define FEC_RCNTRL_MII_MODE 0x00000004 | ||
| 39 | #define FEC_RCNTRL_DRT 0x00000002 | ||
| 40 | #define FEC_RCNTRL_LOOP 0x00000001 | ||
| 41 | |||
| 42 | #define FEC_TCNTRL_FDEN 0x00000004 | ||
| 43 | #define FEC_TCNTRL_HBC 0x00000002 | ||
| 44 | #define FEC_TCNTRL_GTS 0x00000001 | ||
| 45 | |||
| 46 | /* values for MII phy_status */ | ||
| 47 | |||
| 48 | #define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ | ||
| 49 | #define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ | ||
| 50 | #define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ | ||
| 51 | #define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ | ||
| 52 | #define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ | ||
| 53 | #define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ | ||
| 54 | #define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ | ||
| 55 | |||
| 56 | #define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ | ||
| 57 | #define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ | ||
| 58 | #define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ | ||
| 59 | #define PHY_STAT_SPMASK 0xf000 /* mask for speed */ | ||
| 60 | #define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ | ||
| 61 | #define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ | ||
| 62 | #define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ | ||
| 63 | #define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ | ||
| 64 | |||
| 65 | typedef struct phy_info { | ||
| 66 | unsigned int id; | ||
| 67 | const char *name; | ||
| 68 | void (*startup) (struct net_device * dev); | ||
| 69 | void (*shutdown) (struct net_device * dev); | ||
| 70 | void (*ack_int) (struct net_device * dev); | ||
| 71 | } phy_info_t; | ||
| 72 | |||
| 73 | /* The FEC stores dest/src/type, data, and checksum for receive packets. | ||
| 74 | */ | ||
| 75 | #define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */ | ||
| 76 | #define MIN_MTU 46 /* this is data size */ | ||
| 77 | #define CRC_LEN 4 | ||
| 78 | |||
| 79 | #define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN) | ||
| 80 | #define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN) | ||
| 81 | |||
| 82 | /* Must be a multiple of 4 */ | ||
| 83 | #define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE+3) & ~3) | ||
| 84 | /* This is needed so that invalidate_xxx wont invalidate too much */ | ||
| 85 | #define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE) | ||
| 86 | |||
| 87 | /* platform interface */ | ||
| 88 | |||
| 89 | struct fec_platform_info { | ||
| 90 | int fec_no; /* FEC index */ | ||
| 91 | int use_mdio; /* use external MII */ | ||
| 92 | int phy_addr; /* the phy address */ | ||
| 93 | int fec_irq, phy_irq; /* the irq for the controller */ | ||
| 94 | int rx_ring, tx_ring; /* number of buffers on rx */ | ||
| 95 | int sys_clk; /* system clock */ | ||
| 96 | __u8 macaddr[6]; /* mac address */ | ||
| 97 | int rx_copybreak; /* limit we copy small frames */ | ||
| 98 | int use_napi; /* use NAPI */ | ||
| 99 | int napi_weight; /* NAPI weight */ | ||
| 100 | }; | ||
| 101 | |||
| 102 | /* forward declaration */ | ||
| 103 | struct fec; | ||
| 104 | |||
| 105 | struct fec_enet_private { | ||
| 106 | spinlock_t lock; /* during all ops except TX pckt processing */ | ||
| 107 | spinlock_t tx_lock; /* during fec_start_xmit and fec_tx */ | ||
| 108 | struct net_device *dev; | ||
| 109 | struct napi_struct napi; | ||
| 110 | int fecno; | ||
| 111 | struct fec *fecp; | ||
| 112 | const struct fec_platform_info *fpi; | ||
| 113 | int rx_ring, tx_ring; | ||
| 114 | dma_addr_t ring_mem_addr; | ||
| 115 | void *ring_base; | ||
| 116 | struct sk_buff **rx_skbuff; | ||
| 117 | struct sk_buff **tx_skbuff; | ||
| 118 | cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ | ||
| 119 | cbd_t *tx_bd_base; | ||
| 120 | cbd_t *dirty_tx; /* ring entries to be free()ed. */ | ||
| 121 | cbd_t *cur_rx; | ||
| 122 | cbd_t *cur_tx; | ||
| 123 | int tx_free; | ||
| 124 | struct net_device_stats stats; | ||
| 125 | struct timer_list phy_timer_list; | ||
| 126 | const struct phy_info *phy; | ||
| 127 | unsigned int fec_phy_speed; | ||
| 128 | __u32 msg_enable; | ||
| 129 | struct mii_if_info mii_if; | ||
| 130 | }; | ||
| 131 | |||
| 132 | /***************************************************************************/ | ||
| 133 | |||
| 134 | void fec_restart(struct net_device *dev, int duplex, int speed); | ||
| 135 | void fec_stop(struct net_device *dev); | ||
| 136 | |||
| 137 | /***************************************************************************/ | ||
| 138 | |||
| 139 | int fec_mii_read(struct net_device *dev, int phy_id, int location); | ||
| 140 | void fec_mii_write(struct net_device *dev, int phy_id, int location, int value); | ||
| 141 | |||
| 142 | int fec_mii_phy_id_detect(struct net_device *dev); | ||
| 143 | void fec_mii_startup(struct net_device *dev); | ||
| 144 | void fec_mii_shutdown(struct net_device *dev); | ||
| 145 | void fec_mii_ack_int(struct net_device *dev); | ||
| 146 | |||
| 147 | void fec_mii_link_status_change_check(struct net_device *dev, int init_media); | ||
| 148 | |||
| 149 | /***************************************************************************/ | ||
| 150 | |||
| 151 | #define FEC1_NO 0x00 | ||
| 152 | #define FEC2_NO 0x01 | ||
| 153 | #define FEC3_NO 0x02 | ||
| 154 | |||
| 155 | int fec_8xx_init_one(const struct fec_platform_info *fpi, | ||
| 156 | struct net_device **devp); | ||
| 157 | int fec_8xx_cleanup_one(struct net_device *dev); | ||
| 158 | |||
| 159 | /***************************************************************************/ | ||
| 160 | |||
| 161 | #define DRV_MODULE_NAME "fec_8xx" | ||
| 162 | #define PFX DRV_MODULE_NAME ": " | ||
| 163 | #define DRV_MODULE_VERSION "0.1" | ||
| 164 | #define DRV_MODULE_RELDATE "May 6, 2004" | ||
| 165 | |||
| 166 | /***************************************************************************/ | ||
| 167 | |||
| 168 | int fec_8xx_platform_init(void); | ||
| 169 | void fec_8xx_platform_cleanup(void); | ||
| 170 | |||
| 171 | /***************************************************************************/ | ||
| 172 | |||
| 173 | /* FEC access macros */ | ||
| 174 | #if defined(CONFIG_8xx) | ||
| 175 | /* for a 8xx __raw_xxx's are sufficient */ | ||
| 176 | #define __fec_out32(addr, x) __raw_writel(x, addr) | ||
| 177 | #define __fec_out16(addr, x) __raw_writew(x, addr) | ||
| 178 | #define __fec_in32(addr) __raw_readl(addr) | ||
| 179 | #define __fec_in16(addr) __raw_readw(addr) | ||
| 180 | #else | ||
| 181 | /* for others play it safe */ | ||
| 182 | #define __fec_out32(addr, x) out_be32(addr, x) | ||
| 183 | #define __fec_out16(addr, x) out_be16(addr, x) | ||
| 184 | #define __fec_in32(addr) in_be32(addr) | ||
| 185 | #define __fec_in16(addr) in_be16(addr) | ||
| 186 | #endif | ||
| 187 | |||
| 188 | /* write */ | ||
| 189 | #define FW(_fecp, _reg, _v) __fec_out32(&(_fecp)->fec_ ## _reg, (_v)) | ||
| 190 | |||
| 191 | /* read */ | ||
| 192 | #define FR(_fecp, _reg) __fec_in32(&(_fecp)->fec_ ## _reg) | ||
| 193 | |||
| 194 | /* set bits */ | ||
| 195 | #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v)) | ||
| 196 | |||
| 197 | /* clear bits */ | ||
| 198 | #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v)) | ||
| 199 | |||
| 200 | /* buffer descriptor access macros */ | ||
| 201 | |||
| 202 | /* write */ | ||
| 203 | #define CBDW_SC(_cbd, _sc) __fec_out16(&(_cbd)->cbd_sc, (_sc)) | ||
| 204 | #define CBDW_DATLEN(_cbd, _datlen) __fec_out16(&(_cbd)->cbd_datlen, (_datlen)) | ||
| 205 | #define CBDW_BUFADDR(_cbd, _bufaddr) __fec_out32(&(_cbd)->cbd_bufaddr, (_bufaddr)) | ||
| 206 | |||
| 207 | /* read */ | ||
| 208 | #define CBDR_SC(_cbd) __fec_in16(&(_cbd)->cbd_sc) | ||
| 209 | #define CBDR_DATLEN(_cbd) __fec_in16(&(_cbd)->cbd_datlen) | ||
| 210 | #define CBDR_BUFADDR(_cbd) __fec_in32(&(_cbd)->cbd_bufaddr) | ||
| 211 | |||
| 212 | /* set bits */ | ||
| 213 | #define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc)) | ||
| 214 | |||
| 215 | /* clear bits */ | ||
| 216 | #define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc)) | ||
| 217 | |||
| 218 | /***************************************************************************/ | ||
| 219 | |||
| 220 | #endif | ||
diff --git a/drivers/net/fec_8xx/fec_main.c b/drivers/net/fec_8xx/fec_main.c deleted file mode 100644 index ca8d2e83ab03..000000000000 --- a/drivers/net/fec_8xx/fec_main.c +++ /dev/null | |||
| @@ -1,1264 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx. | ||
| 3 | * | ||
| 4 | * Copyright (c) 2003 Intracom S.A. | ||
| 5 | * by Pantelis Antoniou <panto@intracom.gr> | ||
| 6 | * | ||
| 7 | * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com> | ||
| 8 | * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se> | ||
| 9 | * | ||
| 10 | * Released under the GPL | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/string.h> | ||
| 17 | #include <linux/ptrace.h> | ||
| 18 | #include <linux/errno.h> | ||
| 19 | #include <linux/ioport.h> | ||
| 20 | #include <linux/slab.h> | ||
| 21 | #include <linux/interrupt.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/netdevice.h> | ||
| 25 | #include <linux/etherdevice.h> | ||
| 26 | #include <linux/skbuff.h> | ||
| 27 | #include <linux/spinlock.h> | ||
| 28 | #include <linux/mii.h> | ||
| 29 | #include <linux/ethtool.h> | ||
| 30 | #include <linux/bitops.h> | ||
| 31 | #include <linux/dma-mapping.h> | ||
| 32 | |||
| 33 | #include <asm/8xx_immap.h> | ||
| 34 | #include <asm/pgtable.h> | ||
| 35 | #include <asm/mpc8xx.h> | ||
| 36 | #include <asm/irq.h> | ||
| 37 | #include <asm/uaccess.h> | ||
| 38 | #include <asm/cpm1.h> | ||
| 39 | |||
| 40 | #include "fec_8xx.h" | ||
| 41 | |||
| 42 | /*************************************************/ | ||
| 43 | |||
| 44 | #define FEC_MAX_MULTICAST_ADDRS 64 | ||
| 45 | |||
| 46 | /*************************************************/ | ||
| 47 | |||
| 48 | static char version[] __devinitdata = | ||
| 49 | DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n"; | ||
| 50 | |||
| 51 | MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>"); | ||
| 52 | MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver"); | ||
| 53 | MODULE_LICENSE("GPL"); | ||
| 54 | |||
| 55 | int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */ | ||
| 56 | module_param(fec_8xx_debug, int, 0); | ||
| 57 | MODULE_PARM_DESC(fec_8xx_debug, | ||
| 58 | "FEC 8xx bitmapped debugging message enable value"); | ||
| 59 | |||
| 60 | |||
| 61 | /*************************************************/ | ||
| 62 | |||
| 63 | /* | ||
| 64 | * Delay to wait for FEC reset command to complete (in us) | ||
| 65 | */ | ||
| 66 | #define FEC_RESET_DELAY 50 | ||
| 67 | |||
| 68 | /*****************************************************************************************/ | ||
| 69 | |||
| 70 | static void fec_whack_reset(fec_t * fecp) | ||
| 71 | { | ||
| 72 | int i; | ||
| 73 | |||
| 74 | /* | ||
| 75 | * Whack a reset. We should wait for this. | ||
| 76 | */ | ||
| 77 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET); | ||
| 78 | for (i = 0; | ||
| 79 | (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY; | ||
| 80 | i++) | ||
| 81 | udelay(1); | ||
| 82 | |||
| 83 | if (i == FEC_RESET_DELAY) | ||
| 84 | printk(KERN_WARNING "FEC Reset timeout!\n"); | ||
| 85 | |||
| 86 | } | ||
| 87 | |||
| 88 | /****************************************************************************/ | ||
| 89 | |||
| 90 | /* | ||
| 91 | * Transmitter timeout. | ||
| 92 | */ | ||
| 93 | #define TX_TIMEOUT (2*HZ) | ||
| 94 | |||
| 95 | /****************************************************************************/ | ||
| 96 | |||
| 97 | /* | ||
| 98 | * Returns the CRC needed when filling in the hash table for | ||
| 99 | * multicast group filtering | ||
| 100 | * pAddr must point to a MAC address (6 bytes) | ||
| 101 | */ | ||
| 102 | static __u32 fec_mulicast_calc_crc(char *pAddr) | ||
| 103 | { | ||
| 104 | u8 byte; | ||
| 105 | int byte_count; | ||
| 106 | int bit_count; | ||
| 107 | __u32 crc = 0xffffffff; | ||
| 108 | u8 msb; | ||
| 109 | |||
| 110 | for (byte_count = 0; byte_count < 6; byte_count++) { | ||
| 111 | byte = pAddr[byte_count]; | ||
| 112 | for (bit_count = 0; bit_count < 8; bit_count++) { | ||
| 113 | msb = crc >> 31; | ||
| 114 | crc <<= 1; | ||
| 115 | if (msb ^ (byte & 0x1)) { | ||
| 116 | crc ^= FEC_CRC_POLY; | ||
| 117 | } | ||
| 118 | byte >>= 1; | ||
| 119 | } | ||
| 120 | } | ||
| 121 | return (crc); | ||
| 122 | } | ||
| 123 | |||
| 124 | /* | ||
| 125 | * Set or clear the multicast filter for this adaptor. | ||
| 126 | * Skeleton taken from sunlance driver. | ||
| 127 | * The CPM Ethernet implementation allows Multicast as well as individual | ||
| 128 | * MAC address filtering. Some of the drivers check to make sure it is | ||
| 129 | * a group multicast address, and discard those that are not. I guess I | ||
| 130 | * will do the same for now, but just remove the test if you want | ||
| 131 | * individual filtering as well (do the upper net layers want or support | ||
| 132 | * this kind of feature?). | ||
| 133 | */ | ||
| 134 | static void fec_set_multicast_list(struct net_device *dev) | ||
| 135 | { | ||
| 136 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 137 | fec_t *fecp = fep->fecp; | ||
| 138 | struct dev_mc_list *pmc; | ||
| 139 | __u32 crc; | ||
| 140 | int temp; | ||
| 141 | __u32 csrVal; | ||
| 142 | int hash_index; | ||
| 143 | __u32 hthi, htlo; | ||
| 144 | unsigned long flags; | ||
| 145 | |||
| 146 | |||
| 147 | if ((dev->flags & IFF_PROMISC) != 0) { | ||
| 148 | |||
| 149 | spin_lock_irqsave(&fep->lock, flags); | ||
| 150 | FS(fecp, r_cntrl, FEC_RCNTRL_PROM); | ||
| 151 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 152 | |||
| 153 | /* | ||
| 154 | * Log any net taps. | ||
| 155 | */ | ||
| 156 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 157 | ": %s: Promiscuous mode enabled.\n", dev->name); | ||
| 158 | return; | ||
| 159 | |||
| 160 | } | ||
| 161 | |||
| 162 | if ((dev->flags & IFF_ALLMULTI) != 0 || | ||
| 163 | dev->mc_count > FEC_MAX_MULTICAST_ADDRS) { | ||
| 164 | /* | ||
| 165 | * Catch all multicast addresses, set the filter to all 1's. | ||
| 166 | */ | ||
| 167 | hthi = 0xffffffffU; | ||
| 168 | htlo = 0xffffffffU; | ||
| 169 | } else { | ||
| 170 | hthi = 0; | ||
| 171 | htlo = 0; | ||
| 172 | |||
| 173 | /* | ||
| 174 | * Now populate the hash table | ||
| 175 | */ | ||
| 176 | for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) { | ||
| 177 | crc = fec_mulicast_calc_crc(pmc->dmi_addr); | ||
| 178 | temp = (crc & 0x3f) >> 1; | ||
| 179 | hash_index = ((temp & 0x01) << 4) | | ||
| 180 | ((temp & 0x02) << 2) | | ||
| 181 | ((temp & 0x04)) | | ||
| 182 | ((temp & 0x08) >> 2) | | ||
| 183 | ((temp & 0x10) >> 4); | ||
| 184 | csrVal = (1 << hash_index); | ||
| 185 | if (crc & 1) | ||
| 186 | hthi |= csrVal; | ||
| 187 | else | ||
| 188 | htlo |= csrVal; | ||
| 189 | } | ||
| 190 | } | ||
| 191 | |||
| 192 | spin_lock_irqsave(&fep->lock, flags); | ||
| 193 | FC(fecp, r_cntrl, FEC_RCNTRL_PROM); | ||
| 194 | FW(fecp, hash_table_high, hthi); | ||
| 195 | FW(fecp, hash_table_low, htlo); | ||
| 196 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 197 | } | ||
| 198 | |||
| 199 | static int fec_set_mac_address(struct net_device *dev, void *addr) | ||
| 200 | { | ||
| 201 | struct sockaddr *mac = addr; | ||
| 202 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 203 | struct fec *fecp = fep->fecp; | ||
| 204 | int i; | ||
| 205 | __u32 addrhi, addrlo; | ||
| 206 | unsigned long flags; | ||
| 207 | |||
| 208 | /* Get pointer to SCC area in parameter RAM. */ | ||
| 209 | for (i = 0; i < 6; i++) | ||
| 210 | dev->dev_addr[i] = mac->sa_data[i]; | ||
| 211 | |||
| 212 | /* | ||
| 213 | * Set station address. | ||
| 214 | */ | ||
| 215 | addrhi = ((__u32) dev->dev_addr[0] << 24) | | ||
| 216 | ((__u32) dev->dev_addr[1] << 16) | | ||
| 217 | ((__u32) dev->dev_addr[2] << 8) | | ||
| 218 | (__u32) dev->dev_addr[3]; | ||
| 219 | addrlo = ((__u32) dev->dev_addr[4] << 24) | | ||
| 220 | ((__u32) dev->dev_addr[5] << 16); | ||
| 221 | |||
| 222 | spin_lock_irqsave(&fep->lock, flags); | ||
| 223 | FW(fecp, addr_low, addrhi); | ||
| 224 | FW(fecp, addr_high, addrlo); | ||
| 225 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 226 | |||
| 227 | return 0; | ||
| 228 | } | ||
| 229 | |||
| 230 | /* | ||
| 231 | * This function is called to start or restart the FEC during a link | ||
| 232 | * change. This only happens when switching between half and full | ||
| 233 | * duplex. | ||
| 234 | */ | ||
| 235 | void fec_restart(struct net_device *dev, int duplex, int speed) | ||
| 236 | { | ||
| 237 | #ifdef CONFIG_DUET | ||
| 238 | immap_t *immap = (immap_t *) IMAP_ADDR; | ||
| 239 | __u32 cptr; | ||
| 240 | #endif | ||
| 241 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 242 | struct fec *fecp = fep->fecp; | ||
| 243 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 244 | cbd_t *bdp; | ||
| 245 | struct sk_buff *skb; | ||
| 246 | int i; | ||
| 247 | __u32 addrhi, addrlo; | ||
| 248 | |||
| 249 | fec_whack_reset(fep->fecp); | ||
| 250 | |||
| 251 | /* | ||
| 252 | * Set station address. | ||
| 253 | */ | ||
| 254 | addrhi = ((__u32) dev->dev_addr[0] << 24) | | ||
| 255 | ((__u32) dev->dev_addr[1] << 16) | | ||
| 256 | ((__u32) dev->dev_addr[2] << 8) | | ||
| 257 | (__u32) dev->dev_addr[3]; | ||
| 258 | addrlo = ((__u32) dev->dev_addr[4] << 24) | | ||
| 259 | ((__u32) dev->dev_addr[5] << 16); | ||
| 260 | FW(fecp, addr_low, addrhi); | ||
| 261 | FW(fecp, addr_high, addrlo); | ||
| 262 | |||
| 263 | /* | ||
| 264 | * Reset all multicast. | ||
| 265 | */ | ||
| 266 | FW(fecp, hash_table_high, 0); | ||
| 267 | FW(fecp, hash_table_low, 0); | ||
| 268 | |||
| 269 | /* | ||
| 270 | * Set maximum receive buffer size. | ||
| 271 | */ | ||
| 272 | FW(fecp, r_buff_size, PKT_MAXBLR_SIZE); | ||
| 273 | FW(fecp, r_hash, PKT_MAXBUF_SIZE); | ||
| 274 | |||
| 275 | /* | ||
| 276 | * Set receive and transmit descriptor base. | ||
| 277 | */ | ||
| 278 | FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base))); | ||
| 279 | FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base))); | ||
| 280 | |||
| 281 | fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; | ||
| 282 | fep->tx_free = fep->tx_ring; | ||
| 283 | fep->cur_rx = fep->rx_bd_base; | ||
| 284 | |||
| 285 | /* | ||
| 286 | * Reset SKB receive buffers | ||
| 287 | */ | ||
| 288 | for (i = 0; i < fep->rx_ring; i++) { | ||
| 289 | if ((skb = fep->rx_skbuff[i]) == NULL) | ||
| 290 | continue; | ||
| 291 | fep->rx_skbuff[i] = NULL; | ||
| 292 | dev_kfree_skb(skb); | ||
| 293 | } | ||
| 294 | |||
| 295 | /* | ||
| 296 | * Initialize the receive buffer descriptors. | ||
| 297 | */ | ||
| 298 | for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) { | ||
| 299 | skb = dev_alloc_skb(ENET_RX_FRSIZE); | ||
| 300 | if (skb == NULL) { | ||
| 301 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 302 | ": %s Memory squeeze, unable to allocate skb\n", | ||
| 303 | dev->name); | ||
| 304 | fep->stats.rx_dropped++; | ||
| 305 | break; | ||
| 306 | } | ||
| 307 | fep->rx_skbuff[i] = skb; | ||
| 308 | skb->dev = dev; | ||
| 309 | CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data, | ||
| 310 | L1_CACHE_ALIGN(PKT_MAXBUF_SIZE), | ||
| 311 | DMA_FROM_DEVICE)); | ||
| 312 | CBDW_DATLEN(bdp, 0); /* zero */ | ||
| 313 | CBDW_SC(bdp, BD_ENET_RX_EMPTY | | ||
| 314 | ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP)); | ||
| 315 | } | ||
| 316 | /* | ||
| 317 | * if we failed, fillup remainder | ||
| 318 | */ | ||
| 319 | for (; i < fep->rx_ring; i++, bdp++) { | ||
| 320 | fep->rx_skbuff[i] = NULL; | ||
| 321 | CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP); | ||
| 322 | } | ||
| 323 | |||
| 324 | /* | ||
| 325 | * Reset SKB transmit buffers. | ||
| 326 | */ | ||
| 327 | for (i = 0; i < fep->tx_ring; i++) { | ||
| 328 | if ((skb = fep->tx_skbuff[i]) == NULL) | ||
| 329 | continue; | ||
| 330 | fep->tx_skbuff[i] = NULL; | ||
| 331 | dev_kfree_skb(skb); | ||
| 332 | } | ||
| 333 | |||
| 334 | /* | ||
| 335 | * ...and the same for transmit. | ||
| 336 | */ | ||
| 337 | for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) { | ||
| 338 | fep->tx_skbuff[i] = NULL; | ||
| 339 | CBDW_BUFADDR(bdp, virt_to_bus(NULL)); | ||
| 340 | CBDW_DATLEN(bdp, 0); | ||
| 341 | CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP); | ||
| 342 | } | ||
| 343 | |||
| 344 | /* | ||
| 345 | * Enable big endian and don't care about SDMA FC. | ||
| 346 | */ | ||
| 347 | FW(fecp, fun_code, 0x78000000); | ||
| 348 | |||
| 349 | /* | ||
| 350 | * Set MII speed. | ||
| 351 | */ | ||
| 352 | FW(fecp, mii_speed, fep->fec_phy_speed); | ||
| 353 | |||
| 354 | /* | ||
| 355 | * Clear any outstanding interrupt. | ||
| 356 | */ | ||
| 357 | FW(fecp, ievent, 0xffc0); | ||
| 358 | FW(fecp, ivec, (fpi->fec_irq / 2) << 29); | ||
| 359 | |||
| 360 | /* | ||
| 361 | * adjust to speed (only for DUET & RMII) | ||
| 362 | */ | ||
| 363 | #ifdef CONFIG_DUET | ||
| 364 | cptr = in_be32(&immap->im_cpm.cp_cptr); | ||
| 365 | switch (fpi->fec_no) { | ||
| 366 | case 0: | ||
| 367 | /* | ||
| 368 | * check if in RMII mode | ||
| 369 | */ | ||
| 370 | if ((cptr & 0x100) == 0) | ||
| 371 | break; | ||
| 372 | |||
| 373 | if (speed == 10) | ||
| 374 | cptr |= 0x0000010; | ||
| 375 | else if (speed == 100) | ||
| 376 | cptr &= ~0x0000010; | ||
| 377 | break; | ||
| 378 | case 1: | ||
| 379 | /* | ||
| 380 | * check if in RMII mode | ||
| 381 | */ | ||
| 382 | if ((cptr & 0x80) == 0) | ||
| 383 | break; | ||
| 384 | |||
| 385 | if (speed == 10) | ||
| 386 | cptr |= 0x0000008; | ||
| 387 | else if (speed == 100) | ||
| 388 | cptr &= ~0x0000008; | ||
| 389 | break; | ||
| 390 | default: | ||
| 391 | break; | ||
| 392 | } | ||
| 393 | out_be32(&immap->im_cpm.cp_cptr, cptr); | ||
| 394 | #endif | ||
| 395 | |||
| 396 | FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ | ||
| 397 | /* | ||
| 398 | * adjust to duplex mode | ||
| 399 | */ | ||
| 400 | if (duplex) { | ||
| 401 | FC(fecp, r_cntrl, FEC_RCNTRL_DRT); | ||
| 402 | FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */ | ||
| 403 | } else { | ||
| 404 | FS(fecp, r_cntrl, FEC_RCNTRL_DRT); | ||
| 405 | FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */ | ||
| 406 | } | ||
| 407 | |||
| 408 | /* | ||
| 409 | * Enable interrupts we wish to service. | ||
| 410 | */ | ||
| 411 | FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB | | ||
| 412 | FEC_ENET_RXF | FEC_ENET_RXB); | ||
| 413 | |||
| 414 | /* | ||
| 415 | * And last, enable the transmit and receive processing. | ||
| 416 | */ | ||
| 417 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); | ||
| 418 | FW(fecp, r_des_active, 0x01000000); | ||
| 419 | } | ||
| 420 | |||
| 421 | void fec_stop(struct net_device *dev) | ||
| 422 | { | ||
| 423 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 424 | fec_t *fecp = fep->fecp; | ||
| 425 | struct sk_buff *skb; | ||
| 426 | int i; | ||
| 427 | |||
| 428 | if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0) | ||
| 429 | return; /* already down */ | ||
| 430 | |||
| 431 | FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */ | ||
| 432 | for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) && | ||
| 433 | i < FEC_RESET_DELAY; i++) | ||
| 434 | udelay(1); | ||
| 435 | |||
| 436 | if (i == FEC_RESET_DELAY) | ||
| 437 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 438 | ": %s FEC timeout on graceful transmit stop\n", | ||
| 439 | dev->name); | ||
| 440 | /* | ||
| 441 | * Disable FEC. Let only MII interrupts. | ||
| 442 | */ | ||
| 443 | FW(fecp, imask, 0); | ||
| 444 | FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN); | ||
| 445 | |||
| 446 | /* | ||
| 447 | * Reset SKB transmit buffers. | ||
| 448 | */ | ||
| 449 | for (i = 0; i < fep->tx_ring; i++) { | ||
| 450 | if ((skb = fep->tx_skbuff[i]) == NULL) | ||
| 451 | continue; | ||
| 452 | fep->tx_skbuff[i] = NULL; | ||
| 453 | dev_kfree_skb(skb); | ||
| 454 | } | ||
| 455 | |||
| 456 | /* | ||
| 457 | * Reset SKB receive buffers | ||
| 458 | */ | ||
| 459 | for (i = 0; i < fep->rx_ring; i++) { | ||
| 460 | if ((skb = fep->rx_skbuff[i]) == NULL) | ||
| 461 | continue; | ||
| 462 | fep->rx_skbuff[i] = NULL; | ||
| 463 | dev_kfree_skb(skb); | ||
| 464 | } | ||
| 465 | } | ||
| 466 | |||
| 467 | /* common receive function */ | ||
| 468 | static int fec_enet_rx_common(struct fec_enet_private *ep, | ||
| 469 | struct net_device *dev, int budget) | ||
| 470 | { | ||
| 471 | fec_t *fecp = fep->fecp; | ||
| 472 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 473 | cbd_t *bdp; | ||
| 474 | struct sk_buff *skb, *skbn, *skbt; | ||
| 475 | int received = 0; | ||
| 476 | __u16 pkt_len, sc; | ||
| 477 | int curidx; | ||
| 478 | |||
| 479 | /* | ||
| 480 | * First, grab all of the stats for the incoming packet. | ||
| 481 | * These get messed up if we get called due to a busy condition. | ||
| 482 | */ | ||
| 483 | bdp = fep->cur_rx; | ||
| 484 | |||
| 485 | /* clear RX status bits for napi*/ | ||
| 486 | if (fpi->use_napi) | ||
| 487 | FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB); | ||
| 488 | |||
| 489 | while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) { | ||
| 490 | |||
| 491 | curidx = bdp - fep->rx_bd_base; | ||
| 492 | |||
| 493 | /* | ||
| 494 | * Since we have allocated space to hold a complete frame, | ||
| 495 | * the last indicator should be set. | ||
| 496 | */ | ||
| 497 | if ((sc & BD_ENET_RX_LAST) == 0) | ||
| 498 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 499 | ": %s rcv is not +last\n", | ||
| 500 | dev->name); | ||
| 501 | |||
| 502 | /* | ||
| 503 | * Check for errors. | ||
| 504 | */ | ||
| 505 | if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL | | ||
| 506 | BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) { | ||
| 507 | fep->stats.rx_errors++; | ||
| 508 | /* Frame too long or too short. */ | ||
| 509 | if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) | ||
| 510 | fep->stats.rx_length_errors++; | ||
| 511 | /* Frame alignment */ | ||
| 512 | if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL)) | ||
| 513 | fep->stats.rx_frame_errors++; | ||
| 514 | /* CRC Error */ | ||
| 515 | if (sc & BD_ENET_RX_CR) | ||
| 516 | fep->stats.rx_crc_errors++; | ||
| 517 | /* FIFO overrun */ | ||
| 518 | if (sc & BD_ENET_RX_OV) | ||
| 519 | fep->stats.rx_crc_errors++; | ||
| 520 | |||
| 521 | skbn = fep->rx_skbuff[curidx]; | ||
| 522 | BUG_ON(skbn == NULL); | ||
| 523 | |||
| 524 | } else { | ||
| 525 | skb = fep->rx_skbuff[curidx]; | ||
| 526 | BUG_ON(skb == NULL); | ||
| 527 | |||
| 528 | /* | ||
| 529 | * Process the incoming frame. | ||
| 530 | */ | ||
| 531 | fep->stats.rx_packets++; | ||
| 532 | pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */ | ||
| 533 | fep->stats.rx_bytes += pkt_len + 4; | ||
| 534 | |||
| 535 | if (pkt_len <= fpi->rx_copybreak) { | ||
| 536 | /* +2 to make IP header L1 cache aligned */ | ||
| 537 | skbn = dev_alloc_skb(pkt_len + 2); | ||
| 538 | if (skbn != NULL) { | ||
| 539 | skb_reserve(skbn, 2); /* align IP header */ | ||
| 540 | skb_copy_from_linear_data(skb, | ||
| 541 | skbn->data, | ||
| 542 | pkt_len); | ||
| 543 | /* swap */ | ||
| 544 | skbt = skb; | ||
| 545 | skb = skbn; | ||
| 546 | skbn = skbt; | ||
| 547 | } | ||
| 548 | } else | ||
| 549 | skbn = dev_alloc_skb(ENET_RX_FRSIZE); | ||
| 550 | |||
| 551 | if (skbn != NULL) { | ||
| 552 | skb_put(skb, pkt_len); /* Make room */ | ||
| 553 | skb->protocol = eth_type_trans(skb, dev); | ||
| 554 | received++; | ||
| 555 | if (!fpi->use_napi) | ||
| 556 | netif_rx(skb); | ||
| 557 | else | ||
| 558 | netif_receive_skb(skb); | ||
| 559 | } else { | ||
| 560 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 561 | ": %s Memory squeeze, dropping packet.\n", | ||
| 562 | dev->name); | ||
| 563 | fep->stats.rx_dropped++; | ||
| 564 | skbn = skb; | ||
| 565 | } | ||
| 566 | } | ||
| 567 | |||
| 568 | fep->rx_skbuff[curidx] = skbn; | ||
| 569 | CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data, | ||
| 570 | L1_CACHE_ALIGN(PKT_MAXBUF_SIZE), | ||
| 571 | DMA_FROM_DEVICE)); | ||
| 572 | CBDW_DATLEN(bdp, 0); | ||
| 573 | CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY); | ||
| 574 | |||
| 575 | /* | ||
| 576 | * Update BD pointer to next entry. | ||
| 577 | */ | ||
| 578 | if ((sc & BD_ENET_RX_WRAP) == 0) | ||
| 579 | bdp++; | ||
| 580 | else | ||
| 581 | bdp = fep->rx_bd_base; | ||
| 582 | |||
| 583 | /* | ||
| 584 | * Doing this here will keep the FEC running while we process | ||
| 585 | * incoming frames. On a heavily loaded network, we should be | ||
| 586 | * able to keep up at the expense of system resources. | ||
| 587 | */ | ||
| 588 | FW(fecp, r_des_active, 0x01000000); | ||
| 589 | |||
| 590 | if (received >= budget) | ||
| 591 | break; | ||
| 592 | |||
| 593 | } | ||
| 594 | |||
| 595 | fep->cur_rx = bdp; | ||
| 596 | |||
| 597 | if (fpi->use_napi) { | ||
| 598 | if (received < budget) { | ||
| 599 | netif_rx_complete(dev, &fep->napi); | ||
| 600 | |||
| 601 | /* enable RX interrupt bits */ | ||
| 602 | FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB); | ||
| 603 | } | ||
| 604 | } | ||
| 605 | |||
| 606 | return received; | ||
| 607 | } | ||
| 608 | |||
| 609 | static void fec_enet_tx(struct net_device *dev) | ||
| 610 | { | ||
| 611 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 612 | cbd_t *bdp; | ||
| 613 | struct sk_buff *skb; | ||
| 614 | int dirtyidx, do_wake; | ||
| 615 | __u16 sc; | ||
| 616 | |||
| 617 | spin_lock(&fep->lock); | ||
| 618 | bdp = fep->dirty_tx; | ||
| 619 | |||
| 620 | do_wake = 0; | ||
| 621 | while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) { | ||
| 622 | |||
| 623 | dirtyidx = bdp - fep->tx_bd_base; | ||
| 624 | |||
| 625 | if (fep->tx_free == fep->tx_ring) | ||
| 626 | break; | ||
| 627 | |||
| 628 | skb = fep->tx_skbuff[dirtyidx]; | ||
| 629 | |||
| 630 | /* | ||
| 631 | * Check for errors. | ||
| 632 | */ | ||
| 633 | if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC | | ||
| 634 | BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) { | ||
| 635 | fep->stats.tx_errors++; | ||
| 636 | if (sc & BD_ENET_TX_HB) /* No heartbeat */ | ||
| 637 | fep->stats.tx_heartbeat_errors++; | ||
| 638 | if (sc & BD_ENET_TX_LC) /* Late collision */ | ||
| 639 | fep->stats.tx_window_errors++; | ||
| 640 | if (sc & BD_ENET_TX_RL) /* Retrans limit */ | ||
| 641 | fep->stats.tx_aborted_errors++; | ||
| 642 | if (sc & BD_ENET_TX_UN) /* Underrun */ | ||
| 643 | fep->stats.tx_fifo_errors++; | ||
| 644 | if (sc & BD_ENET_TX_CSL) /* Carrier lost */ | ||
| 645 | fep->stats.tx_carrier_errors++; | ||
| 646 | } else | ||
| 647 | fep->stats.tx_packets++; | ||
| 648 | |||
| 649 | if (sc & BD_ENET_TX_READY) | ||
| 650 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 651 | ": %s HEY! Enet xmit interrupt and TX_READY.\n", | ||
| 652 | dev->name); | ||
| 653 | |||
| 654 | /* | ||
| 655 | * Deferred means some collisions occurred during transmit, | ||
| 656 | * but we eventually sent the packet OK. | ||
| 657 | */ | ||
| 658 | if (sc & BD_ENET_TX_DEF) | ||
| 659 | fep->stats.collisions++; | ||
| 660 | |||
| 661 | /* | ||
| 662 | * Free the sk buffer associated with this last transmit. | ||
| 663 | */ | ||
| 664 | dev_kfree_skb_irq(skb); | ||
| 665 | fep->tx_skbuff[dirtyidx] = NULL; | ||
| 666 | |||
| 667 | /* | ||
| 668 | * Update pointer to next buffer descriptor to be transmitted. | ||
| 669 | */ | ||
| 670 | if ((sc & BD_ENET_TX_WRAP) == 0) | ||
| 671 | bdp++; | ||
| 672 | else | ||
| 673 | bdp = fep->tx_bd_base; | ||
| 674 | |||
| 675 | /* | ||
| 676 | * Since we have freed up a buffer, the ring is no longer | ||
| 677 | * full. | ||
| 678 | */ | ||
| 679 | if (!fep->tx_free++) | ||
| 680 | do_wake = 1; | ||
| 681 | } | ||
| 682 | |||
| 683 | fep->dirty_tx = bdp; | ||
| 684 | |||
| 685 | spin_unlock(&fep->lock); | ||
| 686 | |||
| 687 | if (do_wake && netif_queue_stopped(dev)) | ||
| 688 | netif_wake_queue(dev); | ||
| 689 | } | ||
| 690 | |||
| 691 | /* | ||
| 692 | * The interrupt handler. | ||
| 693 | * This is called from the MPC core interrupt. | ||
| 694 | */ | ||
| 695 | static irqreturn_t | ||
| 696 | fec_enet_interrupt(int irq, void *dev_id) | ||
| 697 | { | ||
| 698 | struct net_device *dev = dev_id; | ||
| 699 | struct fec_enet_private *fep; | ||
| 700 | const struct fec_platform_info *fpi; | ||
| 701 | fec_t *fecp; | ||
| 702 | __u32 int_events; | ||
| 703 | __u32 int_events_napi; | ||
| 704 | |||
| 705 | if (unlikely(dev == NULL)) | ||
| 706 | return IRQ_NONE; | ||
| 707 | |||
| 708 | fep = netdev_priv(dev); | ||
| 709 | fecp = fep->fecp; | ||
| 710 | fpi = fep->fpi; | ||
| 711 | |||
| 712 | /* | ||
| 713 | * Get the interrupt events that caused us to be here. | ||
| 714 | */ | ||
| 715 | while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) { | ||
| 716 | |||
| 717 | if (!fpi->use_napi) | ||
| 718 | FW(fecp, ievent, int_events); | ||
| 719 | else { | ||
| 720 | int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB); | ||
| 721 | FW(fecp, ievent, int_events_napi); | ||
| 722 | } | ||
| 723 | |||
| 724 | if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR | | ||
| 725 | FEC_ENET_BABT | FEC_ENET_EBERR)) != 0) | ||
| 726 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 727 | ": %s FEC ERROR(s) 0x%x\n", | ||
| 728 | dev->name, int_events); | ||
| 729 | |||
| 730 | if ((int_events & FEC_ENET_RXF) != 0) { | ||
| 731 | if (!fpi->use_napi) | ||
| 732 | fec_enet_rx_common(fep, dev, ~0); | ||
| 733 | else { | ||
| 734 | if (netif_rx_schedule_prep(dev, &fep->napi)) { | ||
| 735 | /* disable rx interrupts */ | ||
| 736 | FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB); | ||
| 737 | __netif_rx_schedule(dev, &fep->napi); | ||
| 738 | } else { | ||
| 739 | printk(KERN_ERR DRV_MODULE_NAME | ||
| 740 | ": %s driver bug! interrupt while in poll!\n", | ||
| 741 | dev->name); | ||
| 742 | FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB); | ||
| 743 | } | ||
| 744 | } | ||
| 745 | } | ||
| 746 | |||
| 747 | if ((int_events & FEC_ENET_TXF) != 0) | ||
| 748 | fec_enet_tx(dev); | ||
| 749 | } | ||
| 750 | |||
| 751 | return IRQ_HANDLED; | ||
| 752 | } | ||
| 753 | |||
| 754 | /* This interrupt occurs when the PHY detects a link change. */ | ||
| 755 | static irqreturn_t | ||
| 756 | fec_mii_link_interrupt(int irq, void *dev_id) | ||
| 757 | { | ||
| 758 | struct net_device *dev = dev_id; | ||
| 759 | struct fec_enet_private *fep; | ||
| 760 | const struct fec_platform_info *fpi; | ||
| 761 | |||
| 762 | if (unlikely(dev == NULL)) | ||
| 763 | return IRQ_NONE; | ||
| 764 | |||
| 765 | fep = netdev_priv(dev); | ||
| 766 | fpi = fep->fpi; | ||
| 767 | |||
| 768 | if (!fpi->use_mdio) | ||
| 769 | return IRQ_NONE; | ||
| 770 | |||
| 771 | /* | ||
| 772 | * Acknowledge the interrupt if possible. If we have not | ||
| 773 | * found the PHY yet we can't process or acknowledge the | ||
| 774 | * interrupt now. Instead we ignore this interrupt for now, | ||
| 775 | * which we can do since it is edge triggered. It will be | ||
| 776 | * acknowledged later by fec_enet_open(). | ||
| 777 | */ | ||
| 778 | if (!fep->phy) | ||
| 779 | return IRQ_NONE; | ||
| 780 | |||
| 781 | fec_mii_ack_int(dev); | ||
| 782 | fec_mii_link_status_change_check(dev, 0); | ||
| 783 | |||
| 784 | return IRQ_HANDLED; | ||
| 785 | } | ||
| 786 | |||
| 787 | |||
| 788 | /**********************************************************************************/ | ||
| 789 | |||
| 790 | static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
| 791 | { | ||
| 792 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 793 | fec_t *fecp = fep->fecp; | ||
| 794 | cbd_t *bdp; | ||
| 795 | int curidx; | ||
| 796 | unsigned long flags; | ||
| 797 | |||
| 798 | spin_lock_irqsave(&fep->tx_lock, flags); | ||
| 799 | |||
| 800 | /* | ||
| 801 | * Fill in a Tx ring entry | ||
| 802 | */ | ||
| 803 | bdp = fep->cur_tx; | ||
| 804 | |||
| 805 | if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) { | ||
| 806 | netif_stop_queue(dev); | ||
| 807 | spin_unlock_irqrestore(&fep->tx_lock, flags); | ||
| 808 | |||
| 809 | /* | ||
| 810 | * Ooops. All transmit buffers are full. Bail out. | ||
| 811 | * This should not happen, since the tx queue should be stopped. | ||
| 812 | */ | ||
| 813 | printk(KERN_WARNING DRV_MODULE_NAME | ||
| 814 | ": %s tx queue full!.\n", dev->name); | ||
| 815 | return 1; | ||
| 816 | } | ||
| 817 | |||
| 818 | curidx = bdp - fep->tx_bd_base; | ||
| 819 | /* | ||
| 820 | * Clear all of the status flags. | ||
| 821 | */ | ||
| 822 | CBDC_SC(bdp, BD_ENET_TX_STATS); | ||
| 823 | |||
| 824 | /* | ||
| 825 | * Save skb pointer. | ||
| 826 | */ | ||
| 827 | fep->tx_skbuff[curidx] = skb; | ||
| 828 | |||
| 829 | fep->stats.tx_bytes += skb->len; | ||
| 830 | |||
| 831 | /* | ||
| 832 | * Push the data cache so the CPM does not get stale memory data. | ||
| 833 | */ | ||
| 834 | CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data, | ||
| 835 | skb->len, DMA_TO_DEVICE)); | ||
| 836 | CBDW_DATLEN(bdp, skb->len); | ||
| 837 | |||
| 838 | dev->trans_start = jiffies; | ||
| 839 | |||
| 840 | /* | ||
| 841 | * If this was the last BD in the ring, start at the beginning again. | ||
| 842 | */ | ||
| 843 | if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0) | ||
| 844 | fep->cur_tx++; | ||
| 845 | else | ||
| 846 | fep->cur_tx = fep->tx_bd_base; | ||
| 847 | |||
| 848 | if (!--fep->tx_free) | ||
| 849 | netif_stop_queue(dev); | ||
| 850 | |||
| 851 | /* | ||
| 852 | * Trigger transmission start | ||
| 853 | */ | ||
| 854 | CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR | | ||
| 855 | BD_ENET_TX_LAST | BD_ENET_TX_TC); | ||
| 856 | FW(fecp, x_des_active, 0x01000000); | ||
| 857 | |||
| 858 | spin_unlock_irqrestore(&fep->tx_lock, flags); | ||
| 859 | |||
| 860 | return 0; | ||
| 861 | } | ||
| 862 | |||
| 863 | static void fec_timeout(struct net_device *dev) | ||
| 864 | { | ||
| 865 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 866 | |||
| 867 | fep->stats.tx_errors++; | ||
| 868 | |||
| 869 | if (fep->tx_free) | ||
| 870 | netif_wake_queue(dev); | ||
| 871 | |||
| 872 | /* check link status again */ | ||
| 873 | fec_mii_link_status_change_check(dev, 0); | ||
| 874 | } | ||
| 875 | |||
| 876 | static int fec_enet_open(struct net_device *dev) | ||
| 877 | { | ||
| 878 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 879 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 880 | unsigned long flags; | ||
| 881 | |||
| 882 | napi_enable(&fep->napi); | ||
| 883 | |||
| 884 | /* Install our interrupt handler. */ | ||
| 885 | if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) { | ||
| 886 | printk(KERN_ERR DRV_MODULE_NAME | ||
| 887 | ": %s Could not allocate FEC IRQ!", dev->name); | ||
| 888 | napi_disable(&fep->napi); | ||
| 889 | return -EINVAL; | ||
| 890 | } | ||
| 891 | |||
| 892 | /* Install our phy interrupt handler */ | ||
| 893 | if (fpi->phy_irq != -1 && | ||
| 894 | request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy", | ||
| 895 | dev) != 0) { | ||
| 896 | printk(KERN_ERR DRV_MODULE_NAME | ||
| 897 | ": %s Could not allocate PHY IRQ!", dev->name); | ||
| 898 | free_irq(fpi->fec_irq, dev); | ||
| 899 | napi_disable(&fep->napi); | ||
| 900 | return -EINVAL; | ||
| 901 | } | ||
| 902 | |||
| 903 | if (fpi->use_mdio) { | ||
| 904 | fec_mii_startup(dev); | ||
| 905 | netif_carrier_off(dev); | ||
| 906 | fec_mii_link_status_change_check(dev, 1); | ||
| 907 | } else { | ||
| 908 | spin_lock_irqsave(&fep->lock, flags); | ||
| 909 | fec_restart(dev, 1, 100); /* XXX this sucks */ | ||
| 910 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 911 | |||
| 912 | netif_carrier_on(dev); | ||
| 913 | netif_start_queue(dev); | ||
| 914 | } | ||
| 915 | return 0; | ||
| 916 | } | ||
| 917 | |||
| 918 | static int fec_enet_close(struct net_device *dev) | ||
| 919 | { | ||
| 920 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 921 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 922 | unsigned long flags; | ||
| 923 | |||
| 924 | netif_stop_queue(dev); | ||
| 925 | napi_disable(&fep->napi); | ||
| 926 | netif_carrier_off(dev); | ||
| 927 | |||
| 928 | if (fpi->use_mdio) | ||
| 929 | fec_mii_shutdown(dev); | ||
| 930 | |||
| 931 | spin_lock_irqsave(&fep->lock, flags); | ||
| 932 | fec_stop(dev); | ||
| 933 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 934 | |||
| 935 | /* release any irqs */ | ||
| 936 | if (fpi->phy_irq != -1) | ||
| 937 | free_irq(fpi->phy_irq, dev); | ||
| 938 | free_irq(fpi->fec_irq, dev); | ||
| 939 | |||
| 940 | return 0; | ||
| 941 | } | ||
| 942 | |||
| 943 | static struct net_device_stats *fec_enet_get_stats(struct net_device *dev) | ||
| 944 | { | ||
| 945 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 946 | return &fep->stats; | ||
| 947 | } | ||
| 948 | |||
| 949 | static int fec_enet_poll(struct napi_struct *napi, int budget) | ||
| 950 | { | ||
| 951 | struct fec_enet_private *fep = container_of(napi, struct fec_enet_private, napi); | ||
| 952 | struct net_device *dev = fep->dev; | ||
| 953 | |||
| 954 | return fec_enet_rx_common(fep, dev, budget); | ||
| 955 | } | ||
| 956 | |||
| 957 | /*************************************************************************/ | ||
| 958 | |||
| 959 | static void fec_get_drvinfo(struct net_device *dev, | ||
| 960 | struct ethtool_drvinfo *info) | ||
| 961 | { | ||
| 962 | strcpy(info->driver, DRV_MODULE_NAME); | ||
| 963 | strcpy(info->version, DRV_MODULE_VERSION); | ||
| 964 | } | ||
| 965 | |||
| 966 | static int fec_get_regs_len(struct net_device *dev) | ||
| 967 | { | ||
| 968 | return sizeof(fec_t); | ||
| 969 | } | ||
| 970 | |||
| 971 | static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs, | ||
| 972 | void *p) | ||
| 973 | { | ||
| 974 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 975 | unsigned long flags; | ||
| 976 | |||
| 977 | if (regs->len < sizeof(fec_t)) | ||
| 978 | return; | ||
| 979 | |||
| 980 | regs->version = 0; | ||
| 981 | spin_lock_irqsave(&fep->lock, flags); | ||
| 982 | memcpy_fromio(p, fep->fecp, sizeof(fec_t)); | ||
| 983 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 984 | } | ||
| 985 | |||
| 986 | static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
| 987 | { | ||
| 988 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 989 | unsigned long flags; | ||
| 990 | int rc; | ||
| 991 | |||
| 992 | spin_lock_irqsave(&fep->lock, flags); | ||
| 993 | rc = mii_ethtool_gset(&fep->mii_if, cmd); | ||
| 994 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 995 | |||
| 996 | return rc; | ||
| 997 | } | ||
| 998 | |||
| 999 | static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
| 1000 | { | ||
| 1001 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 1002 | unsigned long flags; | ||
| 1003 | int rc; | ||
| 1004 | |||
| 1005 | spin_lock_irqsave(&fep->lock, flags); | ||
| 1006 | rc = mii_ethtool_sset(&fep->mii_if, cmd); | ||
| 1007 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 1008 | |||
| 1009 | return rc; | ||
| 1010 | } | ||
| 1011 | |||
| 1012 | static int fec_nway_reset(struct net_device *dev) | ||
| 1013 | { | ||
| 1014 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 1015 | return mii_nway_restart(&fep->mii_if); | ||
| 1016 | } | ||
| 1017 | |||
| 1018 | static __u32 fec_get_msglevel(struct net_device *dev) | ||
| 1019 | { | ||
| 1020 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 1021 | return fep->msg_enable; | ||
| 1022 | } | ||
| 1023 | |||
| 1024 | static void fec_set_msglevel(struct net_device *dev, __u32 value) | ||
| 1025 | { | ||
| 1026 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 1027 | fep->msg_enable = value; | ||
| 1028 | } | ||
| 1029 | |||
| 1030 | static const struct ethtool_ops fec_ethtool_ops = { | ||
| 1031 | .get_drvinfo = fec_get_drvinfo, | ||
| 1032 | .get_regs_len = fec_get_regs_len, | ||
| 1033 | .get_settings = fec_get_settings, | ||
| 1034 | .set_settings = fec_set_settings, | ||
| 1035 | .nway_reset = fec_nway_reset, | ||
| 1036 | .get_link = ethtool_op_get_link, | ||
| 1037 | .get_msglevel = fec_get_msglevel, | ||
| 1038 | .set_msglevel = fec_set_msglevel, | ||
| 1039 | .set_tx_csum = ethtool_op_set_tx_csum, /* local! */ | ||
| 1040 | .set_sg = ethtool_op_set_sg, | ||
| 1041 | .get_regs = fec_get_regs, | ||
| 1042 | }; | ||
| 1043 | |||
| 1044 | static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | ||
| 1045 | { | ||
| 1046 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 1047 | struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data; | ||
| 1048 | unsigned long flags; | ||
| 1049 | int rc; | ||
| 1050 | |||
| 1051 | if (!netif_running(dev)) | ||
| 1052 | return -EINVAL; | ||
| 1053 | |||
| 1054 | spin_lock_irqsave(&fep->lock, flags); | ||
| 1055 | rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL); | ||
| 1056 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 1057 | return rc; | ||
| 1058 | } | ||
| 1059 | |||
| 1060 | int fec_8xx_init_one(const struct fec_platform_info *fpi, | ||
| 1061 | struct net_device **devp) | ||
| 1062 | { | ||
| 1063 | immap_t *immap = (immap_t *) IMAP_ADDR; | ||
| 1064 | static int fec_8xx_version_printed = 0; | ||
| 1065 | struct net_device *dev = NULL; | ||
| 1066 | struct fec_enet_private *fep = NULL; | ||
| 1067 | fec_t *fecp = NULL; | ||
| 1068 | int i; | ||
| 1069 | int err = 0; | ||
| 1070 | int registered = 0; | ||
| 1071 | __u32 siel; | ||
| 1072 | |||
| 1073 | *devp = NULL; | ||
| 1074 | |||
| 1075 | switch (fpi->fec_no) { | ||
| 1076 | case 0: | ||
| 1077 | fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec; | ||
| 1078 | break; | ||
| 1079 | #ifdef CONFIG_DUET | ||
| 1080 | case 1: | ||
| 1081 | fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2; | ||
| 1082 | break; | ||
| 1083 | #endif | ||
| 1084 | default: | ||
| 1085 | return -EINVAL; | ||
| 1086 | } | ||
| 1087 | |||
| 1088 | if (fec_8xx_version_printed++ == 0) | ||
| 1089 | printk(KERN_INFO "%s", version); | ||
| 1090 | |||
| 1091 | i = sizeof(*fep) + (sizeof(struct sk_buff **) * | ||
| 1092 | (fpi->rx_ring + fpi->tx_ring)); | ||
| 1093 | |||
| 1094 | dev = alloc_etherdev(i); | ||
| 1095 | if (!dev) { | ||
| 1096 | err = -ENOMEM; | ||
| 1097 | goto err; | ||
| 1098 | } | ||
| 1099 | |||
| 1100 | fep = netdev_priv(dev); | ||
| 1101 | fep->dev = dev; | ||
| 1102 | |||
| 1103 | /* partial reset of FEC */ | ||
| 1104 | fec_whack_reset(fecp); | ||
| 1105 | |||
| 1106 | /* point rx_skbuff, tx_skbuff */ | ||
| 1107 | fep->rx_skbuff = (struct sk_buff **)&fep[1]; | ||
| 1108 | fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring; | ||
| 1109 | |||
| 1110 | fep->fecp = fecp; | ||
| 1111 | fep->fpi = fpi; | ||
| 1112 | |||
| 1113 | /* init locks */ | ||
| 1114 | spin_lock_init(&fep->lock); | ||
| 1115 | spin_lock_init(&fep->tx_lock); | ||
| 1116 | |||
| 1117 | /* | ||
| 1118 | * Set the Ethernet address. | ||
| 1119 | */ | ||
| 1120 | for (i = 0; i < 6; i++) | ||
| 1121 | dev->dev_addr[i] = fpi->macaddr[i]; | ||
| 1122 | |||
| 1123 | fep->ring_base = dma_alloc_coherent(NULL, | ||
| 1124 | (fpi->tx_ring + fpi->rx_ring) * | ||
| 1125 | sizeof(cbd_t), &fep->ring_mem_addr, | ||
| 1126 | GFP_KERNEL); | ||
| 1127 | if (fep->ring_base == NULL) { | ||
| 1128 | printk(KERN_ERR DRV_MODULE_NAME | ||
| 1129 | ": %s dma alloc failed.\n", dev->name); | ||
| 1130 | err = -ENOMEM; | ||
| 1131 | goto err; | ||
| 1132 | } | ||
| 1133 | |||
| 1134 | /* | ||
| 1135 | * Set receive and transmit descriptor base. | ||
| 1136 | */ | ||
| 1137 | fep->rx_bd_base = fep->ring_base; | ||
| 1138 | fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring; | ||
| 1139 | |||
| 1140 | /* initialize ring size variables */ | ||
| 1141 | fep->tx_ring = fpi->tx_ring; | ||
| 1142 | fep->rx_ring = fpi->rx_ring; | ||
| 1143 | |||
| 1144 | /* SIU interrupt */ | ||
| 1145 | if (fpi->phy_irq != -1 && | ||
| 1146 | (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) { | ||
| 1147 | |||
| 1148 | siel = in_be32(&immap->im_siu_conf.sc_siel); | ||
| 1149 | if ((fpi->phy_irq & 1) == 0) | ||
| 1150 | siel |= (0x80000000 >> fpi->phy_irq); | ||
| 1151 | else | ||
| 1152 | siel &= ~(0x80000000 >> (fpi->phy_irq & ~1)); | ||
| 1153 | out_be32(&immap->im_siu_conf.sc_siel, siel); | ||
| 1154 | } | ||
| 1155 | |||
| 1156 | /* | ||
| 1157 | * The FEC Ethernet specific entries in the device structure. | ||
| 1158 | */ | ||
| 1159 | dev->open = fec_enet_open; | ||
| 1160 | dev->hard_start_xmit = fec_enet_start_xmit; | ||
| 1161 | dev->tx_timeout = fec_timeout; | ||
| 1162 | dev->watchdog_timeo = TX_TIMEOUT; | ||
| 1163 | dev->stop = fec_enet_close; | ||
| 1164 | dev->get_stats = fec_enet_get_stats; | ||
| 1165 | dev->set_multicast_list = fec_set_multicast_list; | ||
| 1166 | dev->set_mac_address = fec_set_mac_address; | ||
| 1167 | netif_napi_add(dev, &fec->napi, | ||
| 1168 | fec_enet_poll, fpi->napi_weight); | ||
| 1169 | |||
| 1170 | dev->ethtool_ops = &fec_ethtool_ops; | ||
| 1171 | dev->do_ioctl = fec_ioctl; | ||
| 1172 | |||
| 1173 | fep->fec_phy_speed = | ||
| 1174 | ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
| 1175 | |||
| 1176 | init_timer(&fep->phy_timer_list); | ||
| 1177 | |||
| 1178 | /* partial reset of FEC so that only MII works */ | ||
| 1179 | FW(fecp, mii_speed, fep->fec_phy_speed); | ||
| 1180 | FW(fecp, ievent, 0xffc0); | ||
| 1181 | FW(fecp, ivec, (fpi->fec_irq / 2) << 29); | ||
| 1182 | FW(fecp, imask, 0); | ||
| 1183 | FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ | ||
| 1184 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); | ||
| 1185 | |||
| 1186 | netif_carrier_off(dev); | ||
| 1187 | |||
| 1188 | err = register_netdev(dev); | ||
| 1189 | if (err != 0) | ||
| 1190 | goto err; | ||
| 1191 | registered = 1; | ||
| 1192 | |||
| 1193 | if (fpi->use_mdio) { | ||
| 1194 | fep->mii_if.dev = dev; | ||
| 1195 | fep->mii_if.mdio_read = fec_mii_read; | ||
| 1196 | fep->mii_if.mdio_write = fec_mii_write; | ||
| 1197 | fep->mii_if.phy_id_mask = 0x1f; | ||
| 1198 | fep->mii_if.reg_num_mask = 0x1f; | ||
| 1199 | fep->mii_if.phy_id = fec_mii_phy_id_detect(dev); | ||
| 1200 | } | ||
| 1201 | |||
| 1202 | *devp = dev; | ||
| 1203 | |||
| 1204 | return 0; | ||
| 1205 | |||
| 1206 | err: | ||
| 1207 | if (dev != NULL) { | ||
| 1208 | if (fecp != NULL) | ||
| 1209 | fec_whack_reset(fecp); | ||
| 1210 | |||
| 1211 | if (registered) | ||
| 1212 | unregister_netdev(dev); | ||
| 1213 | |||
| 1214 | if (fep != NULL) { | ||
| 1215 | if (fep->ring_base) | ||
| 1216 | dma_free_coherent(NULL, | ||
| 1217 | (fpi->tx_ring + | ||
| 1218 | fpi->rx_ring) * | ||
| 1219 | sizeof(cbd_t), fep->ring_base, | ||
| 1220 | fep->ring_mem_addr); | ||
| 1221 | } | ||
| 1222 | free_netdev(dev); | ||
| 1223 | } | ||
| 1224 | return err; | ||
| 1225 | } | ||
| 1226 | |||
| 1227 | int fec_8xx_cleanup_one(struct net_device *dev) | ||
| 1228 | { | ||
| 1229 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 1230 | fec_t *fecp = fep->fecp; | ||
| 1231 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 1232 | |||
| 1233 | fec_whack_reset(fecp); | ||
| 1234 | |||
| 1235 | unregister_netdev(dev); | ||
| 1236 | |||
| 1237 | dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t), | ||
| 1238 | fep->ring_base, fep->ring_mem_addr); | ||
| 1239 | |||
| 1240 | free_netdev(dev); | ||
| 1241 | |||
| 1242 | return 0; | ||
| 1243 | } | ||
| 1244 | |||
| 1245 | /**************************************************************************************/ | ||
| 1246 | /**************************************************************************************/ | ||
| 1247 | /**************************************************************************************/ | ||
| 1248 | |||
| 1249 | static int __init fec_8xx_init(void) | ||
| 1250 | { | ||
| 1251 | return fec_8xx_platform_init(); | ||
| 1252 | } | ||
| 1253 | |||
| 1254 | static void __exit fec_8xx_cleanup(void) | ||
| 1255 | { | ||
| 1256 | fec_8xx_platform_cleanup(); | ||
| 1257 | } | ||
| 1258 | |||
| 1259 | /**************************************************************************************/ | ||
| 1260 | /**************************************************************************************/ | ||
| 1261 | /**************************************************************************************/ | ||
| 1262 | |||
| 1263 | module_init(fec_8xx_init); | ||
| 1264 | module_exit(fec_8xx_cleanup); | ||
diff --git a/drivers/net/fec_8xx/fec_mii.c b/drivers/net/fec_8xx/fec_mii.c deleted file mode 100644 index 3b6ca29d31f2..000000000000 --- a/drivers/net/fec_8xx/fec_mii.c +++ /dev/null | |||
| @@ -1,418 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx. | ||
| 3 | * | ||
| 4 | * Copyright (c) 2003 Intracom S.A. | ||
| 5 | * by Pantelis Antoniou <panto@intracom.gr> | ||
| 6 | * | ||
| 7 | * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com> | ||
| 8 | * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se> | ||
| 9 | * | ||
| 10 | * Released under the GPL | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/string.h> | ||
| 17 | #include <linux/ptrace.h> | ||
| 18 | #include <linux/errno.h> | ||
| 19 | #include <linux/ioport.h> | ||
| 20 | #include <linux/slab.h> | ||
| 21 | #include <linux/interrupt.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/netdevice.h> | ||
| 25 | #include <linux/etherdevice.h> | ||
| 26 | #include <linux/skbuff.h> | ||
| 27 | #include <linux/spinlock.h> | ||
| 28 | #include <linux/mii.h> | ||
| 29 | #include <linux/ethtool.h> | ||
| 30 | #include <linux/bitops.h> | ||
| 31 | |||
| 32 | #include <asm/8xx_immap.h> | ||
| 33 | #include <asm/pgtable.h> | ||
| 34 | #include <asm/mpc8xx.h> | ||
| 35 | #include <asm/irq.h> | ||
| 36 | #include <asm/uaccess.h> | ||
| 37 | #include <asm/cpm1.h> | ||
| 38 | |||
| 39 | /*************************************************/ | ||
| 40 | |||
| 41 | #include "fec_8xx.h" | ||
| 42 | |||
| 43 | /*************************************************/ | ||
| 44 | |||
| 45 | /* Make MII read/write commands for the FEC. | ||
| 46 | */ | ||
| 47 | #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) | ||
| 48 | #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) | ||
| 49 | #define mk_mii_end 0 | ||
| 50 | |||
| 51 | /*************************************************/ | ||
| 52 | |||
| 53 | /* XXX both FECs use the MII interface of FEC1 */ | ||
| 54 | static DEFINE_SPINLOCK(fec_mii_lock); | ||
| 55 | |||
| 56 | #define FEC_MII_LOOPS 10000 | ||
| 57 | |||
| 58 | int fec_mii_read(struct net_device *dev, int phy_id, int location) | ||
| 59 | { | ||
| 60 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 61 | fec_t *fecp; | ||
| 62 | int i, ret = -1; | ||
| 63 | unsigned long flags; | ||
| 64 | |||
| 65 | /* XXX MII interface is only connected to FEC1 */ | ||
| 66 | fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec; | ||
| 67 | |||
| 68 | spin_lock_irqsave(&fec_mii_lock, flags); | ||
| 69 | |||
| 70 | if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) { | ||
| 71 | FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ | ||
| 72 | FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); | ||
| 73 | FW(fecp, ievent, FEC_ENET_MII); | ||
| 74 | } | ||
| 75 | |||
| 76 | /* Add PHY address to register command. */ | ||
| 77 | FW(fecp, mii_speed, fep->fec_phy_speed); | ||
| 78 | FW(fecp, mii_data, (phy_id << 23) | mk_mii_read(location)); | ||
| 79 | |||
| 80 | for (i = 0; i < FEC_MII_LOOPS; i++) | ||
| 81 | if ((FR(fecp, ievent) & FEC_ENET_MII) != 0) | ||
| 82 | break; | ||
| 83 | |||
| 84 | if (i < FEC_MII_LOOPS) { | ||
| 85 | FW(fecp, ievent, FEC_ENET_MII); | ||
| 86 | ret = FR(fecp, mii_data) & 0xffff; | ||
| 87 | } | ||
| 88 | |||
| 89 | spin_unlock_irqrestore(&fec_mii_lock, flags); | ||
| 90 | |||
| 91 | return ret; | ||
| 92 | } | ||
| 93 | |||
| 94 | void fec_mii_write(struct net_device *dev, int phy_id, int location, int value) | ||
| 95 | { | ||
| 96 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 97 | fec_t *fecp; | ||
| 98 | unsigned long flags; | ||
| 99 | int i; | ||
| 100 | |||
| 101 | /* XXX MII interface is only connected to FEC1 */ | ||
| 102 | fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec; | ||
| 103 | |||
| 104 | spin_lock_irqsave(&fec_mii_lock, flags); | ||
| 105 | |||
| 106 | if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) { | ||
| 107 | FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ | ||
| 108 | FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); | ||
| 109 | FW(fecp, ievent, FEC_ENET_MII); | ||
| 110 | } | ||
| 111 | |||
| 112 | /* Add PHY address to register command. */ | ||
| 113 | FW(fecp, mii_speed, fep->fec_phy_speed); /* always adapt mii speed */ | ||
| 114 | FW(fecp, mii_data, (phy_id << 23) | mk_mii_write(location, value)); | ||
| 115 | |||
| 116 | for (i = 0; i < FEC_MII_LOOPS; i++) | ||
| 117 | if ((FR(fecp, ievent) & FEC_ENET_MII) != 0) | ||
| 118 | break; | ||
| 119 | |||
| 120 | if (i < FEC_MII_LOOPS) | ||
| 121 | FW(fecp, ievent, FEC_ENET_MII); | ||
| 122 | |||
| 123 | spin_unlock_irqrestore(&fec_mii_lock, flags); | ||
| 124 | } | ||
| 125 | |||
| 126 | /*************************************************/ | ||
| 127 | |||
| 128 | #ifdef CONFIG_FEC_8XX_GENERIC_PHY | ||
| 129 | |||
| 130 | /* | ||
| 131 | * Generic PHY support. | ||
| 132 | * Should work for all PHYs, but link change is detected by polling | ||
| 133 | */ | ||
| 134 | |||
| 135 | static void generic_timer_callback(unsigned long data) | ||
| 136 | { | ||
| 137 | struct net_device *dev = (struct net_device *)data; | ||
| 138 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 139 | |||
| 140 | fep->phy_timer_list.expires = jiffies + HZ / 2; | ||
| 141 | |||
| 142 | add_timer(&fep->phy_timer_list); | ||
| 143 | |||
| 144 | fec_mii_link_status_change_check(dev, 0); | ||
| 145 | } | ||
| 146 | |||
| 147 | static void generic_startup(struct net_device *dev) | ||
| 148 | { | ||
| 149 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 150 | |||
| 151 | fep->phy_timer_list.expires = jiffies + HZ / 2; /* every 500ms */ | ||
| 152 | fep->phy_timer_list.data = (unsigned long)dev; | ||
| 153 | fep->phy_timer_list.function = generic_timer_callback; | ||
| 154 | add_timer(&fep->phy_timer_list); | ||
| 155 | } | ||
| 156 | |||
| 157 | static void generic_shutdown(struct net_device *dev) | ||
| 158 | { | ||
| 159 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 160 | |||
| 161 | del_timer_sync(&fep->phy_timer_list); | ||
| 162 | } | ||
| 163 | |||
| 164 | #endif | ||
| 165 | |||
| 166 | #ifdef CONFIG_FEC_8XX_DM9161_PHY | ||
| 167 | |||
| 168 | /* ------------------------------------------------------------------------- */ | ||
| 169 | /* The Davicom DM9161 is used on the NETTA board */ | ||
| 170 | |||
| 171 | /* register definitions */ | ||
| 172 | |||
| 173 | #define MII_DM9161_ACR 16 /* Aux. Config Register */ | ||
| 174 | #define MII_DM9161_ACSR 17 /* Aux. Config/Status Register */ | ||
| 175 | #define MII_DM9161_10TCSR 18 /* 10BaseT Config/Status Reg. */ | ||
| 176 | #define MII_DM9161_INTR 21 /* Interrupt Register */ | ||
| 177 | #define MII_DM9161_RECR 22 /* Receive Error Counter Reg. */ | ||
| 178 | #define MII_DM9161_DISCR 23 /* Disconnect Counter Register */ | ||
| 179 | |||
| 180 | static void dm9161_startup(struct net_device *dev) | ||
| 181 | { | ||
| 182 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 183 | |||
| 184 | fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0000); | ||
| 185 | } | ||
| 186 | |||
| 187 | static void dm9161_ack_int(struct net_device *dev) | ||
| 188 | { | ||
| 189 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 190 | |||
| 191 | fec_mii_read(dev, fep->mii_if.phy_id, MII_DM9161_INTR); | ||
| 192 | } | ||
| 193 | |||
| 194 | static void dm9161_shutdown(struct net_device *dev) | ||
| 195 | { | ||
| 196 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 197 | |||
| 198 | fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0f00); | ||
| 199 | } | ||
| 200 | |||
| 201 | #endif | ||
| 202 | |||
| 203 | #ifdef CONFIG_FEC_8XX_LXT971_PHY | ||
| 204 | |||
| 205 | /* Support for LXT971/972 PHY */ | ||
| 206 | |||
| 207 | #define MII_LXT971_PCR 16 /* Port Control Register */ | ||
| 208 | #define MII_LXT971_SR2 17 /* Status Register 2 */ | ||
| 209 | #define MII_LXT971_IER 18 /* Interrupt Enable Register */ | ||
| 210 | #define MII_LXT971_ISR 19 /* Interrupt Status Register */ | ||
| 211 | #define MII_LXT971_LCR 20 /* LED Control Register */ | ||
| 212 | #define MII_LXT971_TCR 30 /* Transmit Control Register */ | ||
| 213 | |||
| 214 | static void lxt971_startup(struct net_device *dev) | ||
| 215 | { | ||
| 216 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 217 | |||
| 218 | fec_mii_write(dev, fep->mii_if.phy_id, MII_LXT971_IER, 0x00F2); | ||
| 219 | } | ||
| 220 | |||
| 221 | static void lxt971_ack_int(struct net_device *dev) | ||
| 222 | { | ||
| 223 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 224 | |||
| 225 | fec_mii_read(dev, fep->mii_if.phy_id, MII_LXT971_ISR); | ||
| 226 | } | ||
| 227 | |||
| 228 | static void lxt971_shutdown(struct net_device *dev) | ||
| 229 | { | ||
| 230 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 231 | |||
| 232 | fec_mii_write(dev, fep->mii_if.phy_id, MII_LXT971_IER, 0x0000); | ||
| 233 | } | ||
| 234 | #endif | ||
| 235 | |||
| 236 | /**********************************************************************************/ | ||
| 237 | |||
| 238 | static const struct phy_info phy_info[] = { | ||
| 239 | #ifdef CONFIG_FEC_8XX_DM9161_PHY | ||
| 240 | { | ||
| 241 | .id = 0x00181b88, | ||
| 242 | .name = "DM9161", | ||
| 243 | .startup = dm9161_startup, | ||
| 244 | .ack_int = dm9161_ack_int, | ||
| 245 | .shutdown = dm9161_shutdown, | ||
| 246 | }, | ||
| 247 | #endif | ||
| 248 | #ifdef CONFIG_FEC_8XX_LXT971_PHY | ||
| 249 | { | ||
| 250 | .id = 0x0001378e, | ||
| 251 | .name = "LXT971/972", | ||
| 252 | .startup = lxt971_startup, | ||
| 253 | .ack_int = lxt971_ack_int, | ||
| 254 | .shutdown = lxt971_shutdown, | ||
| 255 | }, | ||
| 256 | #endif | ||
| 257 | #ifdef CONFIG_FEC_8XX_GENERIC_PHY | ||
| 258 | { | ||
| 259 | .id = 0, | ||
| 260 | .name = "GENERIC", | ||
| 261 | .startup = generic_startup, | ||
| 262 | .shutdown = generic_shutdown, | ||
| 263 | }, | ||
| 264 | #endif | ||
| 265 | }; | ||
| 266 | |||
| 267 | /**********************************************************************************/ | ||
| 268 | |||
| 269 | int fec_mii_phy_id_detect(struct net_device *dev) | ||
| 270 | { | ||
| 271 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 272 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 273 | int i, r, start, end, phytype, physubtype; | ||
| 274 | const struct phy_info *phy; | ||
| 275 | int phy_hwid, phy_id; | ||
| 276 | |||
| 277 | /* if no MDIO */ | ||
| 278 | if (fpi->use_mdio == 0) | ||
| 279 | return -1; | ||
| 280 | |||
| 281 | phy_hwid = -1; | ||
| 282 | fep->phy = NULL; | ||
| 283 | |||
| 284 | /* auto-detect? */ | ||
| 285 | if (fpi->phy_addr == -1) { | ||
| 286 | start = 0; | ||
| 287 | end = 32; | ||
| 288 | } else { /* direct */ | ||
| 289 | start = fpi->phy_addr; | ||
| 290 | end = start + 1; | ||
| 291 | } | ||
| 292 | |||
| 293 | for (phy_id = start; phy_id < end; phy_id++) { | ||
| 294 | r = fec_mii_read(dev, phy_id, MII_PHYSID1); | ||
| 295 | if (r == -1 || (phytype = (r & 0xffff)) == 0xffff) | ||
| 296 | continue; | ||
| 297 | r = fec_mii_read(dev, phy_id, MII_PHYSID2); | ||
| 298 | if (r == -1 || (physubtype = (r & 0xffff)) == 0xffff) | ||
| 299 | continue; | ||
| 300 | phy_hwid = (phytype << 16) | physubtype; | ||
| 301 | if (phy_hwid != -1) | ||
| 302 | break; | ||
| 303 | } | ||
| 304 | |||
| 305 | if (phy_hwid == -1) { | ||
| 306 | printk(KERN_ERR DRV_MODULE_NAME | ||
| 307 | ": %s No PHY detected!\n", dev->name); | ||
| 308 | return -1; | ||
| 309 | } | ||
| 310 | |||
| 311 | for (i = 0, phy = phy_info; i < ARRAY_SIZE(phy_info); i++, phy++) | ||
| 312 | if (phy->id == (phy_hwid >> 4) || phy->id == 0) | ||
| 313 | break; | ||
| 314 | |||
| 315 | if (i >= ARRAY_SIZE(phy_info)) { | ||
| 316 | printk(KERN_ERR DRV_MODULE_NAME | ||
| 317 | ": %s PHY id 0x%08x is not supported!\n", | ||
| 318 | dev->name, phy_hwid); | ||
| 319 | return -1; | ||
| 320 | } | ||
| 321 | |||
| 322 | fep->phy = phy; | ||
| 323 | |||
| 324 | printk(KERN_INFO DRV_MODULE_NAME | ||
| 325 | ": %s Phy @ 0x%x, type %s (0x%08x)\n", | ||
| 326 | dev->name, phy_id, fep->phy->name, phy_hwid); | ||
| 327 | |||
| 328 | return phy_id; | ||
| 329 | } | ||
| 330 | |||
| 331 | void fec_mii_startup(struct net_device *dev) | ||
| 332 | { | ||
| 333 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 334 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 335 | |||
| 336 | if (!fpi->use_mdio || fep->phy == NULL) | ||
| 337 | return; | ||
| 338 | |||
| 339 | if (fep->phy->startup == NULL) | ||
| 340 | return; | ||
| 341 | |||
| 342 | (*fep->phy->startup) (dev); | ||
| 343 | } | ||
| 344 | |||
| 345 | void fec_mii_shutdown(struct net_device *dev) | ||
| 346 | { | ||
| 347 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 348 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 349 | |||
| 350 | if (!fpi->use_mdio || fep->phy == NULL) | ||
| 351 | return; | ||
| 352 | |||
| 353 | if (fep->phy->shutdown == NULL) | ||
| 354 | return; | ||
| 355 | |||
| 356 | (*fep->phy->shutdown) (dev); | ||
| 357 | } | ||
| 358 | |||
| 359 | void fec_mii_ack_int(struct net_device *dev) | ||
| 360 | { | ||
| 361 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 362 | const struct fec_platform_info *fpi = fep->fpi; | ||
| 363 | |||
| 364 | if (!fpi->use_mdio || fep->phy == NULL) | ||
| 365 | return; | ||
| 366 | |||
| 367 | if (fep->phy->ack_int == NULL) | ||
| 368 | return; | ||
| 369 | |||
| 370 | (*fep->phy->ack_int) (dev); | ||
| 371 | } | ||
| 372 | |||
| 373 | /* helper function */ | ||
| 374 | static int mii_negotiated(struct mii_if_info *mii) | ||
| 375 | { | ||
| 376 | int advert, lpa, val; | ||
| 377 | |||
| 378 | if (!mii_link_ok(mii)) | ||
| 379 | return 0; | ||
| 380 | |||
| 381 | val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); | ||
| 382 | if ((val & BMSR_ANEGCOMPLETE) == 0) | ||
| 383 | return 0; | ||
| 384 | |||
| 385 | advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); | ||
| 386 | lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); | ||
| 387 | |||
| 388 | return mii_nway_result(advert & lpa); | ||
| 389 | } | ||
| 390 | |||
| 391 | void fec_mii_link_status_change_check(struct net_device *dev, int init_media) | ||
| 392 | { | ||
| 393 | struct fec_enet_private *fep = netdev_priv(dev); | ||
| 394 | unsigned int media; | ||
| 395 | unsigned long flags; | ||
| 396 | |||
| 397 | if (mii_check_media(&fep->mii_if, netif_msg_link(fep), init_media) == 0) | ||
| 398 | return; | ||
| 399 | |||
| 400 | media = mii_negotiated(&fep->mii_if); | ||
| 401 | |||
| 402 | if (netif_carrier_ok(dev)) { | ||
| 403 | spin_lock_irqsave(&fep->lock, flags); | ||
| 404 | fec_restart(dev, !!(media & ADVERTISE_FULL), | ||
| 405 | (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)) ? | ||
| 406 | 100 : 10); | ||
| 407 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 408 | |||
| 409 | netif_start_queue(dev); | ||
| 410 | } else { | ||
| 411 | netif_stop_queue(dev); | ||
| 412 | |||
| 413 | spin_lock_irqsave(&fep->lock, flags); | ||
| 414 | fec_stop(dev); | ||
| 415 | spin_unlock_irqrestore(&fep->lock, flags); | ||
| 416 | |||
| 417 | } | ||
| 418 | } | ||
diff --git a/drivers/of/device.c b/drivers/of/device.c index 29681c4b700b..8a1d93a2bb81 100644 --- a/drivers/of/device.c +++ b/drivers/of/device.c | |||
| @@ -48,16 +48,32 @@ void of_dev_put(struct of_device *dev) | |||
| 48 | } | 48 | } |
| 49 | EXPORT_SYMBOL(of_dev_put); | 49 | EXPORT_SYMBOL(of_dev_put); |
| 50 | 50 | ||
| 51 | static ssize_t dev_show_devspec(struct device *dev, | 51 | static ssize_t devspec_show(struct device *dev, |
| 52 | struct device_attribute *attr, char *buf) | 52 | struct device_attribute *attr, char *buf) |
| 53 | { | 53 | { |
| 54 | struct of_device *ofdev; | 54 | struct of_device *ofdev; |
| 55 | 55 | ||
| 56 | ofdev = to_of_device(dev); | 56 | ofdev = to_of_device(dev); |
| 57 | return sprintf(buf, "%s", ofdev->node->full_name); | 57 | return sprintf(buf, "%s\n", ofdev->node->full_name); |
| 58 | } | 58 | } |
| 59 | 59 | ||
| 60 | static DEVICE_ATTR(devspec, S_IRUGO, dev_show_devspec, NULL); | 60 | static ssize_t modalias_show(struct device *dev, |
| 61 | struct device_attribute *attr, char *buf) | ||
| 62 | { | ||
| 63 | struct of_device *ofdev = to_of_device(dev); | ||
| 64 | ssize_t len = 0; | ||
| 65 | |||
| 66 | len = of_device_get_modalias(ofdev, buf, PAGE_SIZE - 2); | ||
| 67 | buf[len] = '\n'; | ||
| 68 | buf[len+1] = 0; | ||
| 69 | return len+1; | ||
| 70 | } | ||
| 71 | |||
| 72 | struct device_attribute of_platform_device_attrs[] = { | ||
| 73 | __ATTR_RO(devspec), | ||
| 74 | __ATTR_RO(modalias), | ||
| 75 | __ATTR_NULL | ||
| 76 | }; | ||
| 61 | 77 | ||
| 62 | /** | 78 | /** |
| 63 | * of_release_dev - free an of device structure when all users of it are finished. | 79 | * of_release_dev - free an of device structure when all users of it are finished. |
| @@ -78,25 +94,61 @@ EXPORT_SYMBOL(of_release_dev); | |||
| 78 | 94 | ||
| 79 | int of_device_register(struct of_device *ofdev) | 95 | int of_device_register(struct of_device *ofdev) |
| 80 | { | 96 | { |
| 81 | int rc; | ||
| 82 | |||
| 83 | BUG_ON(ofdev->node == NULL); | 97 | BUG_ON(ofdev->node == NULL); |
| 84 | 98 | return device_register(&ofdev->dev); | |
| 85 | rc = device_register(&ofdev->dev); | ||
| 86 | if (rc) | ||
| 87 | return rc; | ||
| 88 | |||
| 89 | rc = device_create_file(&ofdev->dev, &dev_attr_devspec); | ||
| 90 | if (rc) | ||
| 91 | device_unregister(&ofdev->dev); | ||
| 92 | |||
| 93 | return rc; | ||
| 94 | } | 99 | } |
| 95 | EXPORT_SYMBOL(of_device_register); | 100 | EXPORT_SYMBOL(of_device_register); |
| 96 | 101 | ||
| 97 | void of_device_unregister(struct of_device *ofdev) | 102 | void of_device_unregister(struct of_device *ofdev) |
| 98 | { | 103 | { |
| 99 | device_remove_file(&ofdev->dev, &dev_attr_devspec); | ||
| 100 | device_unregister(&ofdev->dev); | 104 | device_unregister(&ofdev->dev); |
| 101 | } | 105 | } |
| 102 | EXPORT_SYMBOL(of_device_unregister); | 106 | EXPORT_SYMBOL(of_device_unregister); |
| 107 | |||
| 108 | ssize_t of_device_get_modalias(struct of_device *ofdev, | ||
| 109 | char *str, ssize_t len) | ||
| 110 | { | ||
| 111 | const char *compat; | ||
| 112 | int cplen, i; | ||
| 113 | ssize_t tsize, csize, repend; | ||
| 114 | |||
| 115 | /* Name & Type */ | ||
| 116 | csize = snprintf(str, len, "of:N%sT%s", | ||
| 117 | ofdev->node->name, ofdev->node->type); | ||
| 118 | |||
| 119 | /* Get compatible property if any */ | ||
| 120 | compat = of_get_property(ofdev->node, "compatible", &cplen); | ||
| 121 | if (!compat) | ||
| 122 | return csize; | ||
| 123 | |||
| 124 | /* Find true end (we tolerate multiple \0 at the end */ | ||
| 125 | for (i = (cplen - 1); i >= 0 && !compat[i]; i--) | ||
| 126 | cplen--; | ||
| 127 | if (!cplen) | ||
| 128 | return csize; | ||
| 129 | cplen++; | ||
| 130 | |||
| 131 | /* Check space (need cplen+1 chars including final \0) */ | ||
| 132 | tsize = csize + cplen; | ||
| 133 | repend = tsize; | ||
| 134 | |||
| 135 | if (csize >= len) /* @ the limit, all is already filled */ | ||
| 136 | return tsize; | ||
| 137 | |||
| 138 | if (tsize >= len) { /* limit compat list */ | ||
| 139 | cplen = len - csize - 1; | ||
| 140 | repend = len; | ||
| 141 | } | ||
| 142 | |||
| 143 | /* Copy and do char replacement */ | ||
| 144 | memcpy(&str[csize + 1], compat, cplen); | ||
| 145 | for (i = csize; i < repend; i++) { | ||
| 146 | char c = str[i]; | ||
| 147 | if (c == '\0') | ||
| 148 | str[i] = 'C'; | ||
| 149 | else if (c == ' ') | ||
| 150 | str[i] = '_'; | ||
| 151 | } | ||
| 152 | |||
| 153 | return tsize; | ||
| 154 | } | ||
diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c index 000681e98f2c..1c9cab844f10 100644 --- a/drivers/of/gpio.c +++ b/drivers/of/gpio.c | |||
| @@ -137,38 +137,6 @@ int of_gpio_simple_xlate(struct of_gpio_chip *of_gc, struct device_node *np, | |||
| 137 | } | 137 | } |
| 138 | EXPORT_SYMBOL(of_gpio_simple_xlate); | 138 | EXPORT_SYMBOL(of_gpio_simple_xlate); |
| 139 | 139 | ||
| 140 | /* Should be sufficient for now, later we'll use dynamic bases. */ | ||
| 141 | #if defined(CONFIG_PPC32) || defined(CONFIG_SPARC32) | ||
| 142 | #define GPIOS_PER_CHIP 32 | ||
| 143 | #else | ||
| 144 | #define GPIOS_PER_CHIP 64 | ||
| 145 | #endif | ||
| 146 | |||
| 147 | static int of_get_gpiochip_base(struct device_node *np) | ||
| 148 | { | ||
| 149 | struct device_node *gc = NULL; | ||
| 150 | int gpiochip_base = 0; | ||
| 151 | |||
| 152 | while ((gc = of_find_all_nodes(gc))) { | ||
| 153 | if (!of_get_property(gc, "gpio-controller", NULL)) | ||
| 154 | continue; | ||
| 155 | |||
| 156 | if (gc != np) { | ||
| 157 | gpiochip_base += GPIOS_PER_CHIP; | ||
| 158 | continue; | ||
| 159 | } | ||
| 160 | |||
| 161 | of_node_put(gc); | ||
| 162 | |||
| 163 | if (gpiochip_base >= ARCH_NR_GPIOS) | ||
| 164 | return -ENOSPC; | ||
| 165 | |||
| 166 | return gpiochip_base; | ||
| 167 | } | ||
| 168 | |||
| 169 | return -ENOENT; | ||
| 170 | } | ||
| 171 | |||
| 172 | /** | 140 | /** |
| 173 | * of_mm_gpiochip_add - Add memory mapped GPIO chip (bank) | 141 | * of_mm_gpiochip_add - Add memory mapped GPIO chip (bank) |
| 174 | * @np: device node of the GPIO chip | 142 | * @np: device node of the GPIO chip |
| @@ -205,11 +173,7 @@ int of_mm_gpiochip_add(struct device_node *np, | |||
| 205 | if (!mm_gc->regs) | 173 | if (!mm_gc->regs) |
| 206 | goto err1; | 174 | goto err1; |
| 207 | 175 | ||
| 208 | gc->base = of_get_gpiochip_base(np); | 176 | gc->base = -1; |
| 209 | if (gc->base < 0) { | ||
| 210 | ret = gc->base; | ||
| 211 | goto err1; | ||
| 212 | } | ||
| 213 | 177 | ||
| 214 | if (!of_gc->xlate) | 178 | if (!of_gc->xlate) |
| 215 | of_gc->xlate = of_gpio_simple_xlate; | 179 | of_gc->xlate = of_gpio_simple_xlate; |
diff --git a/drivers/of/platform.c b/drivers/of/platform.c index ca09a63a64db..298de0f95d70 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c | |||
| @@ -17,6 +17,8 @@ | |||
| 17 | #include <linux/of_device.h> | 17 | #include <linux/of_device.h> |
| 18 | #include <linux/of_platform.h> | 18 | #include <linux/of_platform.h> |
| 19 | 19 | ||
| 20 | extern struct device_attribute of_platform_device_attrs[]; | ||
| 21 | |||
| 20 | static int of_platform_bus_match(struct device *dev, struct device_driver *drv) | 22 | static int of_platform_bus_match(struct device *dev, struct device_driver *drv) |
| 21 | { | 23 | { |
| 22 | struct of_device *of_dev = to_of_device(dev); | 24 | struct of_device *of_dev = to_of_device(dev); |
| @@ -103,6 +105,7 @@ int of_bus_type_init(struct bus_type *bus, const char *name) | |||
| 103 | bus->suspend = of_platform_device_suspend; | 105 | bus->suspend = of_platform_device_suspend; |
| 104 | bus->resume = of_platform_device_resume; | 106 | bus->resume = of_platform_device_resume; |
| 105 | bus->shutdown = of_platform_device_shutdown; | 107 | bus->shutdown = of_platform_device_shutdown; |
| 108 | bus->dev_attrs = of_platform_device_attrs; | ||
| 106 | return bus_register(bus); | 109 | return bus_register(bus); |
| 107 | } | 110 | } |
| 108 | 111 | ||
diff --git a/include/asm-powerpc/dcr-generic.h b/include/asm-powerpc/dcr-generic.h new file mode 100644 index 000000000000..35b71599ec46 --- /dev/null +++ b/include/asm-powerpc/dcr-generic.h | |||
| @@ -0,0 +1,49 @@ | |||
| 1 | /* | ||
| 2 | * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. | ||
| 3 | * <benh@kernel.crashing.org> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See | ||
| 13 | * the GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef _ASM_POWERPC_DCR_GENERIC_H | ||
| 21 | #define _ASM_POWERPC_DCR_GENERIC_H | ||
| 22 | #ifdef __KERNEL__ | ||
| 23 | #ifndef __ASSEMBLY__ | ||
| 24 | |||
| 25 | enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID}; | ||
| 26 | |||
| 27 | typedef struct { | ||
| 28 | enum host_type_t type; | ||
| 29 | union { | ||
| 30 | dcr_host_mmio_t mmio; | ||
| 31 | dcr_host_native_t native; | ||
| 32 | } host; | ||
| 33 | } dcr_host_t; | ||
| 34 | |||
| 35 | extern bool dcr_map_ok_generic(dcr_host_t host); | ||
| 36 | |||
| 37 | extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n, | ||
| 38 | unsigned int dcr_c); | ||
| 39 | extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c); | ||
| 40 | |||
| 41 | extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n); | ||
| 42 | |||
| 43 | extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value); | ||
| 44 | |||
| 45 | #endif /* __ASSEMBLY__ */ | ||
| 46 | #endif /* __KERNEL__ */ | ||
| 47 | #endif /* _ASM_POWERPC_DCR_GENERIC_H */ | ||
| 48 | |||
| 49 | |||
diff --git a/include/asm-powerpc/dcr-mmio.h b/include/asm-powerpc/dcr-mmio.h index 08532ff1899c..acd491dbd45a 100644 --- a/include/asm-powerpc/dcr-mmio.h +++ b/include/asm-powerpc/dcr-mmio.h | |||
| @@ -27,20 +27,26 @@ typedef struct { | |||
| 27 | void __iomem *token; | 27 | void __iomem *token; |
| 28 | unsigned int stride; | 28 | unsigned int stride; |
| 29 | unsigned int base; | 29 | unsigned int base; |
| 30 | } dcr_host_t; | 30 | } dcr_host_mmio_t; |
| 31 | 31 | ||
| 32 | #define DCR_MAP_OK(host) ((host).token != NULL) | 32 | static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host) |
| 33 | { | ||
| 34 | return host.token != NULL; | ||
| 35 | } | ||
| 33 | 36 | ||
| 34 | extern dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, | 37 | extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev, |
| 35 | unsigned int dcr_c); | 38 | unsigned int dcr_n, |
| 36 | extern void dcr_unmap(dcr_host_t host, unsigned int dcr_c); | 39 | unsigned int dcr_c); |
| 40 | extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c); | ||
| 37 | 41 | ||
| 38 | static inline u32 dcr_read(dcr_host_t host, unsigned int dcr_n) | 42 | static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n) |
| 39 | { | 43 | { |
| 40 | return in_be32(host.token + ((host.base + dcr_n) * host.stride)); | 44 | return in_be32(host.token + ((host.base + dcr_n) * host.stride)); |
| 41 | } | 45 | } |
| 42 | 46 | ||
| 43 | static inline void dcr_write(dcr_host_t host, unsigned int dcr_n, u32 value) | 47 | static inline void dcr_write_mmio(dcr_host_mmio_t host, |
| 48 | unsigned int dcr_n, | ||
| 49 | u32 value) | ||
| 44 | { | 50 | { |
| 45 | out_be32(host.token + ((host.base + dcr_n) * host.stride), value); | 51 | out_be32(host.token + ((host.base + dcr_n) * host.stride), value); |
| 46 | } | 52 | } |
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h index f8398ce80372..72d2b72c7390 100644 --- a/include/asm-powerpc/dcr-native.h +++ b/include/asm-powerpc/dcr-native.h | |||
| @@ -26,14 +26,18 @@ | |||
| 26 | 26 | ||
| 27 | typedef struct { | 27 | typedef struct { |
| 28 | unsigned int base; | 28 | unsigned int base; |
| 29 | } dcr_host_t; | 29 | } dcr_host_native_t; |
| 30 | 30 | ||
| 31 | #define DCR_MAP_OK(host) (1) | 31 | static inline bool dcr_map_ok_native(dcr_host_native_t host) |
| 32 | { | ||
| 33 | return 1; | ||
| 34 | } | ||
| 32 | 35 | ||
| 33 | #define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){ .base = (dcr_n) }) | 36 | #define dcr_map_native(dev, dcr_n, dcr_c) \ |
| 34 | #define dcr_unmap(host, dcr_c) do {} while (0) | 37 | ((dcr_host_native_t){ .base = (dcr_n) }) |
| 35 | #define dcr_read(host, dcr_n) mfdcr(dcr_n + host.base) | 38 | #define dcr_unmap_native(host, dcr_c) do {} while (0) |
| 36 | #define dcr_write(host, dcr_n, value) mtdcr(dcr_n + host.base, value) | 39 | #define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base) |
| 40 | #define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value) | ||
| 37 | 41 | ||
| 38 | /* Device Control Registers */ | 42 | /* Device Control Registers */ |
| 39 | void __mtdcr(int reg, unsigned int val); | 43 | void __mtdcr(int reg, unsigned int val); |
diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h index 9338d50538f1..53b283050ab3 100644 --- a/include/asm-powerpc/dcr.h +++ b/include/asm-powerpc/dcr.h | |||
| @@ -20,14 +20,50 @@ | |||
| 20 | #ifndef _ASM_POWERPC_DCR_H | 20 | #ifndef _ASM_POWERPC_DCR_H |
| 21 | #define _ASM_POWERPC_DCR_H | 21 | #define _ASM_POWERPC_DCR_H |
| 22 | #ifdef __KERNEL__ | 22 | #ifdef __KERNEL__ |
| 23 | #ifndef __ASSEMBLY__ | ||
| 23 | #ifdef CONFIG_PPC_DCR | 24 | #ifdef CONFIG_PPC_DCR |
| 24 | 25 | ||
| 25 | #ifdef CONFIG_PPC_DCR_NATIVE | 26 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 26 | #include <asm/dcr-native.h> | 27 | #include <asm/dcr-native.h> |
| 27 | #else | 28 | #endif |
| 29 | |||
| 30 | #ifdef CONFIG_PPC_DCR_MMIO | ||
| 28 | #include <asm/dcr-mmio.h> | 31 | #include <asm/dcr-mmio.h> |
| 29 | #endif | 32 | #endif |
| 30 | 33 | ||
| 34 | |||
| 35 | /* Indirection layer for providing both NATIVE and MMIO support. */ | ||
| 36 | |||
| 37 | #if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) | ||
| 38 | |||
| 39 | #include <asm/dcr-generic.h> | ||
| 40 | |||
| 41 | #define DCR_MAP_OK(host) dcr_map_ok_generic(host) | ||
| 42 | #define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c) | ||
| 43 | #define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c) | ||
| 44 | #define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n) | ||
| 45 | #define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value) | ||
| 46 | |||
| 47 | #else | ||
| 48 | |||
| 49 | #ifdef CONFIG_PPC_DCR_NATIVE | ||
| 50 | typedef dcr_host_native_t dcr_host_t; | ||
| 51 | #define DCR_MAP_OK(host) dcr_map_ok_native(host) | ||
| 52 | #define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c) | ||
| 53 | #define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c) | ||
| 54 | #define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n) | ||
| 55 | #define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value) | ||
| 56 | #else | ||
| 57 | typedef dcr_host_mmio_t dcr_host_t; | ||
| 58 | #define DCR_MAP_OK(host) dcr_map_ok_mmio(host) | ||
| 59 | #define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c) | ||
| 60 | #define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c) | ||
| 61 | #define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n) | ||
| 62 | #define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value) | ||
| 63 | #endif | ||
| 64 | |||
| 65 | #endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ | ||
| 66 | |||
| 31 | /* | 67 | /* |
| 32 | * On CONFIG_PPC_MERGE, we have additional helpers to read the DCR | 68 | * On CONFIG_PPC_MERGE, we have additional helpers to read the DCR |
| 33 | * base from the device-tree | 69 | * base from the device-tree |
| @@ -41,5 +77,6 @@ extern unsigned int dcr_resource_len(struct device_node *np, | |||
| 41 | #endif /* CONFIG_PPC_MERGE */ | 77 | #endif /* CONFIG_PPC_MERGE */ |
| 42 | 78 | ||
| 43 | #endif /* CONFIG_PPC_DCR */ | 79 | #endif /* CONFIG_PPC_DCR */ |
| 80 | #endif /* __ASSEMBLY__ */ | ||
| 44 | #endif /* __KERNEL__ */ | 81 | #endif /* __KERNEL__ */ |
| 45 | #endif /* _ASM_POWERPC_DCR_H */ | 82 | #endif /* _ASM_POWERPC_DCR_H */ |
diff --git a/include/asm-powerpc/ioctl.h b/include/asm-powerpc/ioctl.h index 8eb99848c402..57d68304218b 100644 --- a/include/asm-powerpc/ioctl.h +++ b/include/asm-powerpc/ioctl.h | |||
| @@ -1,69 +1,13 @@ | |||
| 1 | #ifndef _ASM_POWERPC_IOCTL_H | 1 | #ifndef _ASM_POWERPC_IOCTL_H |
| 2 | #define _ASM_POWERPC_IOCTL_H | 2 | #define _ASM_POWERPC_IOCTL_H |
| 3 | 3 | ||
| 4 | |||
| 5 | /* | ||
| 6 | * this was copied from the alpha as it's a bit cleaner there. | ||
| 7 | * -- Cort | ||
| 8 | */ | ||
| 9 | |||
| 10 | #define _IOC_NRBITS 8 | ||
| 11 | #define _IOC_TYPEBITS 8 | ||
| 12 | #define _IOC_SIZEBITS 13 | 4 | #define _IOC_SIZEBITS 13 |
| 13 | #define _IOC_DIRBITS 3 | 5 | #define _IOC_DIRBITS 3 |
| 14 | 6 | ||
| 15 | #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) | ||
| 16 | #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) | ||
| 17 | #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) | ||
| 18 | #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) | ||
| 19 | |||
| 20 | #define _IOC_NRSHIFT 0 | ||
| 21 | #define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) | ||
| 22 | #define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) | ||
| 23 | #define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) | ||
| 24 | |||
| 25 | /* | ||
| 26 | * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit. | ||
| 27 | * And this turns out useful to catch old ioctl numbers in header | ||
| 28 | * files for us. | ||
| 29 | */ | ||
| 30 | #define _IOC_NONE 1U | 7 | #define _IOC_NONE 1U |
| 31 | #define _IOC_READ 2U | 8 | #define _IOC_READ 2U |
| 32 | #define _IOC_WRITE 4U | 9 | #define _IOC_WRITE 4U |
| 33 | 10 | ||
| 34 | #define _IOC(dir,type,nr,size) \ | 11 | #include <asm-generic/ioctl.h> |
| 35 | (((dir) << _IOC_DIRSHIFT) | \ | ||
| 36 | ((type) << _IOC_TYPESHIFT) | \ | ||
| 37 | ((nr) << _IOC_NRSHIFT) | \ | ||
| 38 | ((size) << _IOC_SIZESHIFT)) | ||
| 39 | |||
| 40 | /* provoke compile error for invalid uses of size argument */ | ||
| 41 | extern unsigned int __invalid_size_argument_for_IOC; | ||
| 42 | #define _IOC_TYPECHECK(t) \ | ||
| 43 | ((sizeof(t) == sizeof(t[1]) && \ | ||
| 44 | sizeof(t) < (1 << _IOC_SIZEBITS)) ? \ | ||
| 45 | sizeof(t) : __invalid_size_argument_for_IOC) | ||
| 46 | |||
| 47 | /* used to create numbers */ | ||
| 48 | #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) | ||
| 49 | #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size))) | ||
| 50 | #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) | ||
| 51 | #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) | ||
| 52 | #define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) | ||
| 53 | #define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) | ||
| 54 | #define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) | ||
| 55 | |||
| 56 | /* used to decode them.. */ | ||
| 57 | #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) | ||
| 58 | #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) | ||
| 59 | #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) | ||
| 60 | #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) | ||
| 61 | |||
| 62 | /* various drivers, such as the pcmcia stuff, need these... */ | ||
| 63 | #define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) | ||
| 64 | #define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) | ||
| 65 | #define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) | ||
| 66 | #define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) | ||
| 67 | #define IOCSIZE_SHIFT (_IOC_SIZESHIFT) | ||
| 68 | 12 | ||
| 69 | #endif /* _ASM_POWERPC_IOCTL_H */ | 13 | #endif /* _ASM_POWERPC_IOCTL_H */ |
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h index 5089deb8fec3..1ef8e304e0ea 100644 --- a/include/asm-powerpc/irq.h +++ b/include/asm-powerpc/irq.h | |||
| @@ -619,6 +619,19 @@ struct pt_regs; | |||
| 619 | 619 | ||
| 620 | #define __ARCH_HAS_DO_SOFTIRQ | 620 | #define __ARCH_HAS_DO_SOFTIRQ |
| 621 | 621 | ||
| 622 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
| 623 | /* | ||
| 624 | * Per-cpu stacks for handling critical, debug and machine check | ||
| 625 | * level interrupts. | ||
| 626 | */ | ||
| 627 | extern struct thread_info *critirq_ctx[NR_CPUS]; | ||
| 628 | extern struct thread_info *dbgirq_ctx[NR_CPUS]; | ||
| 629 | extern struct thread_info *mcheckirq_ctx[NR_CPUS]; | ||
| 630 | extern void exc_lvl_ctx_init(void); | ||
| 631 | #else | ||
| 632 | #define exc_lvl_ctx_init() | ||
| 633 | #endif | ||
| 634 | |||
| 622 | #ifdef CONFIG_IRQSTACKS | 635 | #ifdef CONFIG_IRQSTACKS |
| 623 | /* | 636 | /* |
| 624 | * Per-cpu stacks for handling hard and soft interrupts. | 637 | * Per-cpu stacks for handling hard and soft interrupts. |
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h index 39c5c5f62bf5..d1dc16afb118 100644 --- a/include/asm-powerpc/mmu-hash64.h +++ b/include/asm-powerpc/mmu-hash64.h | |||
| @@ -182,6 +182,7 @@ extern int mmu_io_psize; | |||
| 182 | extern int mmu_kernel_ssize; | 182 | extern int mmu_kernel_ssize; |
| 183 | extern int mmu_highuser_ssize; | 183 | extern int mmu_highuser_ssize; |
| 184 | extern u16 mmu_slb_size; | 184 | extern u16 mmu_slb_size; |
| 185 | extern unsigned long tce_alloc_start, tce_alloc_end; | ||
| 185 | 186 | ||
| 186 | /* | 187 | /* |
| 187 | * If the processor supports 64k normal pages but not 64k cache | 188 | * If the processor supports 64k normal pages but not 64k cache |
diff --git a/include/asm-powerpc/mpc6xx.h b/include/asm-powerpc/mpc6xx.h new file mode 100644 index 000000000000..effc2291beb2 --- /dev/null +++ b/include/asm-powerpc/mpc6xx.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef __ASM_POWERPC_MPC6xx_H | ||
| 2 | #define __ASM_POWERPC_MPC6xx_H | ||
| 3 | |||
| 4 | void mpc6xx_enter_standby(void); | ||
| 5 | |||
| 6 | #endif | ||
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index a4d0f876b427..fe566a348a86 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h | |||
| @@ -353,6 +353,8 @@ struct mpic | |||
| 353 | #define MPIC_ENABLE_MCK 0x00000200 | 353 | #define MPIC_ENABLE_MCK 0x00000200 |
| 354 | /* Disable bias among target selection, spread interrupts evenly */ | 354 | /* Disable bias among target selection, spread interrupts evenly */ |
| 355 | #define MPIC_NO_BIAS 0x00000400 | 355 | #define MPIC_NO_BIAS 0x00000400 |
| 356 | /* Ignore NIRQS as reported by FRR */ | ||
| 357 | #define MPIC_BROKEN_FRR_NIRQS 0x00000800 | ||
| 356 | 358 | ||
| 357 | /* MPIC HW modification ID */ | 359 | /* MPIC HW modification ID */ |
| 358 | #define MPIC_REGSET_MASK 0xf0000000 | 360 | #define MPIC_REGSET_MASK 0xf0000000 |
diff --git a/include/asm-powerpc/of_device.h b/include/asm-powerpc/of_device.h index 6526e139a463..3c123990ca2e 100644 --- a/include/asm-powerpc/of_device.h +++ b/include/asm-powerpc/of_device.h | |||
| @@ -21,8 +21,6 @@ extern struct of_device *of_device_alloc(struct device_node *np, | |||
| 21 | const char *bus_id, | 21 | const char *bus_id, |
| 22 | struct device *parent); | 22 | struct device *parent); |
| 23 | 23 | ||
| 24 | extern ssize_t of_device_get_modalias(struct of_device *ofdev, | ||
| 25 | char *str, ssize_t len); | ||
| 26 | extern int of_device_uevent(struct device *dev, | 24 | extern int of_device_uevent(struct device *dev, |
| 27 | struct kobj_uevent_env *env); | 25 | struct kobj_uevent_env *env); |
| 28 | 26 | ||
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h index 2dbd4e7884fa..ef96bfd4ef4c 100644 --- a/include/asm-powerpc/ppc_asm.h +++ b/include/asm-powerpc/ppc_asm.h | |||
| @@ -356,6 +356,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) | |||
| 356 | #define toreal(rd) | 356 | #define toreal(rd) |
| 357 | #define fromreal(rd) | 357 | #define fromreal(rd) |
| 358 | 358 | ||
| 359 | /* | ||
| 360 | * We use addis to ensure compatibility with the "classic" ppc versions of | ||
| 361 | * these macros, which use rs = 0 to get the tophys offset in rd, rather than | ||
| 362 | * converting the address in r0, and so this version has to do that too | ||
| 363 | * (i.e. set register rd to 0 when rs == 0). | ||
| 364 | */ | ||
| 359 | #define tophys(rd,rs) \ | 365 | #define tophys(rd,rs) \ |
| 360 | addis rd,rs,0 | 366 | addis rd,rs,0 |
| 361 | 367 | ||
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h index 39023dde1cc4..38d87e5e569d 100644 --- a/include/asm-powerpc/ptrace.h +++ b/include/asm-powerpc/ptrace.h | |||
| @@ -119,6 +119,7 @@ extern int ptrace_put_reg(struct task_struct *task, int regno, | |||
| 119 | #ifndef __powerpc64__ | 119 | #ifndef __powerpc64__ |
| 120 | #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0) | 120 | #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0) |
| 121 | #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0) | 121 | #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0) |
| 122 | #define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0) | ||
| 122 | #endif /* ! __powerpc64__ */ | 123 | #endif /* ! __powerpc64__ */ |
| 123 | #define TRAP(regs) ((regs)->trap & ~0xF) | 124 | #define TRAP(regs) ((regs)->trap & ~0xF) |
| 124 | #ifdef __powerpc64__ | 125 | #ifdef __powerpc64__ |
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h index 505f35bacaa9..1cd43e3d94fb 100644 --- a/include/asm-powerpc/smp.h +++ b/include/asm-powerpc/smp.h | |||
| @@ -37,6 +37,8 @@ extern void cpu_die(void); | |||
| 37 | extern void smp_send_debugger_break(int cpu); | 37 | extern void smp_send_debugger_break(int cpu); |
| 38 | extern void smp_message_recv(int); | 38 | extern void smp_message_recv(int); |
| 39 | 39 | ||
| 40 | DECLARE_PER_CPU(unsigned int, pvr); | ||
| 41 | |||
| 40 | #ifdef CONFIG_HOTPLUG_CPU | 42 | #ifdef CONFIG_HOTPLUG_CPU |
| 41 | extern void fixup_irqs(cpumask_t map); | 43 | extern void fixup_irqs(cpumask_t map); |
| 42 | int generic_cpu_disable(void); | 44 | int generic_cpu_disable(void); |
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index 2b6559a6d113..df781adac6dd 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h | |||
| @@ -190,6 +190,7 @@ extern struct task_struct *_switch(struct thread_struct *prev, | |||
| 190 | 190 | ||
| 191 | extern unsigned int rtas_data; | 191 | extern unsigned int rtas_data; |
| 192 | extern int mem_init_done; /* set on boot once kmalloc can be called */ | 192 | extern int mem_init_done; /* set on boot once kmalloc can be called */ |
| 193 | extern int init_bootmem_done; /* set on !NUMA once bootmem is available */ | ||
| 193 | extern unsigned long memory_limit; | 194 | extern unsigned long memory_limit; |
| 194 | extern unsigned long klimit; | 195 | extern unsigned long klimit; |
| 195 | 196 | ||
diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h index d030f5ce39ad..b705c2a7651a 100644 --- a/include/asm-powerpc/thread_info.h +++ b/include/asm-powerpc/thread_info.h | |||
| @@ -116,7 +116,6 @@ static inline struct thread_info *current_thread_info(void) | |||
| 116 | #define TIF_SECCOMP 10 /* secure computing */ | 116 | #define TIF_SECCOMP 10 /* secure computing */ |
| 117 | #define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ | 117 | #define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ |
| 118 | #define TIF_NOERROR 12 /* Force successful syscall return */ | 118 | #define TIF_NOERROR 12 /* Force successful syscall return */ |
| 119 | #define TIF_RESTORE_SIGMASK 13 /* Restore signal mask in do_signal */ | ||
| 120 | #define TIF_FREEZE 14 /* Freezing for suspend */ | 119 | #define TIF_FREEZE 14 /* Freezing for suspend */ |
| 121 | #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ | 120 | #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ |
| 122 | #define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ | 121 | #define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ |
| @@ -134,21 +133,33 @@ static inline struct thread_info *current_thread_info(void) | |||
| 134 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) | 133 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) |
| 135 | #define _TIF_RESTOREALL (1<<TIF_RESTOREALL) | 134 | #define _TIF_RESTOREALL (1<<TIF_RESTOREALL) |
| 136 | #define _TIF_NOERROR (1<<TIF_NOERROR) | 135 | #define _TIF_NOERROR (1<<TIF_NOERROR) |
| 137 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | ||
| 138 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 136 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
| 139 | #define _TIF_RUNLATCH (1<<TIF_RUNLATCH) | 137 | #define _TIF_RUNLATCH (1<<TIF_RUNLATCH) |
| 140 | #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) | 138 | #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) |
| 141 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) | 139 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) |
| 142 | 140 | ||
| 143 | #define _TIF_USER_WORK_MASK ( _TIF_SIGPENDING | \ | 141 | #define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED) |
| 144 | _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK) | ||
| 145 | #define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR) | 142 | #define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR) |
| 146 | 143 | ||
| 147 | /* Bits in local_flags */ | 144 | /* Bits in local_flags */ |
| 148 | /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ | 145 | /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ |
| 149 | #define TLF_NAPPING 0 /* idle thread enabled NAP mode */ | 146 | #define TLF_NAPPING 0 /* idle thread enabled NAP mode */ |
| 147 | #define TLF_SLEEPING 1 /* suspend code enabled SLEEP mode */ | ||
| 148 | #define TLF_RESTORE_SIGMASK 2 /* Restore signal mask in do_signal */ | ||
| 150 | 149 | ||
| 151 | #define _TLF_NAPPING (1 << TLF_NAPPING) | 150 | #define _TLF_NAPPING (1 << TLF_NAPPING) |
| 151 | #define _TLF_SLEEPING (1 << TLF_SLEEPING) | ||
| 152 | #define _TLF_RESTORE_SIGMASK (1 << TLF_RESTORE_SIGMASK) | ||
| 153 | |||
| 154 | #ifndef __ASSEMBLY__ | ||
| 155 | #define HAVE_SET_RESTORE_SIGMASK 1 | ||
| 156 | static inline void set_restore_sigmask(void) | ||
| 157 | { | ||
| 158 | struct thread_info *ti = current_thread_info(); | ||
| 159 | ti->local_flags |= _TLF_RESTORE_SIGMASK; | ||
| 160 | set_bit(TIF_SIGPENDING, &ti->flags); | ||
| 161 | } | ||
| 162 | #endif /* !__ASSEMBLY__ */ | ||
| 152 | 163 | ||
| 153 | #endif /* __KERNEL__ */ | 164 | #endif /* __KERNEL__ */ |
| 154 | 165 | ||
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index ce5de6e0e690..febd581ec9b0 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h | |||
| @@ -33,6 +33,7 @@ extern unsigned tb_to_us; | |||
| 33 | 33 | ||
| 34 | struct rtc_time; | 34 | struct rtc_time; |
| 35 | extern void to_tm(int tim, struct rtc_time * tm); | 35 | extern void to_tm(int tim, struct rtc_time * tm); |
| 36 | extern void GregorianDay(struct rtc_time *tm); | ||
| 36 | extern time_t last_rtc_update; | 37 | extern time_t last_rtc_update; |
| 37 | 38 | ||
| 38 | extern void generic_calibrate_decr(void); | 39 | extern void generic_calibrate_decr(void); |
diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h index 88320a05f0a8..5eb8e599e5cc 100644 --- a/include/asm-powerpc/xmon.h +++ b/include/asm-powerpc/xmon.h | |||
| @@ -12,13 +12,22 @@ | |||
| 12 | 12 | ||
| 13 | #ifdef __KERNEL__ | 13 | #ifdef __KERNEL__ |
| 14 | 14 | ||
| 15 | #include <linux/irqreturn.h> | ||
| 16 | |||
| 15 | #ifdef CONFIG_XMON | 17 | #ifdef CONFIG_XMON |
| 16 | extern void xmon_setup(void); | 18 | extern void xmon_setup(void); |
| 17 | extern void xmon_register_spus(struct list_head *list); | 19 | extern void xmon_register_spus(struct list_head *list); |
| 20 | struct pt_regs; | ||
| 21 | extern int xmon(struct pt_regs *excp); | ||
| 22 | extern irqreturn_t xmon_irq(int, void *); | ||
| 18 | #else | 23 | #else |
| 19 | static inline void xmon_setup(void) { }; | 24 | static inline void xmon_setup(void) { }; |
| 20 | static inline void xmon_register_spus(struct list_head *list) { }; | 25 | static inline void xmon_register_spus(struct list_head *list) { }; |
| 21 | #endif | 26 | #endif |
| 22 | 27 | ||
| 28 | #if defined(CONFIG_XMON) && defined(CONFIG_SMP) | ||
| 29 | extern int cpus_are_in_xmon(void); | ||
| 30 | #endif | ||
| 31 | |||
| 23 | #endif /* __KERNEL __ */ | 32 | #endif /* __KERNEL __ */ |
| 24 | #endif /* __ASM_POWERPC_XMON_H */ | 33 | #endif /* __ASM_POWERPC_XMON_H */ |
diff --git a/include/linux/of_device.h b/include/linux/of_device.h index afe338217d91..d3a74e00a3e1 100644 --- a/include/linux/of_device.h +++ b/include/linux/of_device.h | |||
| @@ -24,4 +24,7 @@ static inline void of_device_free(struct of_device *dev) | |||
| 24 | of_release_dev(&dev->dev); | 24 | of_release_dev(&dev->dev); |
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | extern ssize_t of_device_get_modalias(struct of_device *ofdev, | ||
| 28 | char *str, ssize_t len); | ||
| 29 | |||
| 27 | #endif /* _LINUX_OF_DEVICE_H */ | 30 | #endif /* _LINUX_OF_DEVICE_H */ |